Move std_detect tests into a separate crate

library/Cargo.lock

@@ -358,6 +358,10 @@ dependencies = [
  "rustc-std-workspace-core",
 ]
 
+[[package]]
+name = "std_detect_tests"
+version = "0.0.0"
+
 [[package]]
 name = "sysroot"
 version = "0.0.0"

library/Cargo.toml

@@ -7,6 +7,7 @@ members = [
   "sysroot",
   "coretests",
   "alloctests",
+  "std_detect_tests",
 ]
 
 exclude = [

library/std_detect/src/detect/arch/mod.rs

@@ -66,7 +66,7 @@ cfg_select! {
     _ => {
         // Unimplemented architecture:
         #[doc(hidden)]
-        pub(crate) enum Feature {
+        pub enum Feature {
             Null
         }
         #[doc(hidden)]

library/std_detect/src/detect/cache.rs

@@ -30,21 +30,21 @@ const CACHE_CAPACITY: u32 = 93;
 // The derived `Default` implementation will initialize the field to zero,
 // which is what we want.
 #[derive(Copy, Clone, Default, PartialEq, Eq)]
-pub(crate) struct Initializer(u128);
+pub struct Initializer(u128);
 
 // NOTE: the `debug_assert!` would catch that we do not add more Features than
 // the one fitting our cache.
 impl Initializer {
     /// Tests the `bit` of the cache.
     #[inline]
-    pub(crate) fn test(self, bit: u32) -> bool {
+    pub fn test(self, bit: u32) -> bool {
         debug_assert!(bit < CACHE_CAPACITY, "too many features, time to increase the cache size!");
         test_bit(self.0, bit)
     }
 
     /// Sets the `bit` of the cache.
     #[inline]
-    pub(crate) fn set(&mut self, bit: u32) {
+    pub fn set(&mut self, bit: u32) {
         debug_assert!(bit < CACHE_CAPACITY, "too many features, time to increase the cache size!");
         let v = self.0;
         self.0 = set_bit(v, bit);

library/std_detect/src/detect/macros.rs

@@ -149,7 +149,7 @@ macro_rules! features {
         #[repr(u8)]
         #[unstable(feature = "stdarch_internal", issue = "none")]
         #[cfg($cfg)]
-        pub(crate) enum Feature {
+        pub enum Feature {
             $(
                 $(#[$feature_comment])*
                 $feature,

library/std_detect/src/detect/mod.rs

@@ -32,6 +32,11 @@ pub(crate) use self::arch::Feature;
 mod bit;
 mod cache;
 
+pub mod __test {
+    pub use super::arch::Feature;
+    pub use super::cache::Initializer;
+}
+
 cfg_select! {
     miri => {
         // When running under miri all target-features that are not enabled at
@@ -53,6 +58,14 @@ cfg_select! {
         mod riscv;
         #[path = "os/linux/mod.rs"]
         mod os;
+        #[unstable(feature = "stdarch_internal", issue = "none")]
+        pub mod __test_os {
+            #[cfg(any(target_arch = "riscv32", target_arch = "riscv64"))]
+            pub use super::riscv::imply_features;
+            #[cfg(target_arch = "aarch64")]
+            pub use super::os::aarch64::AtHwcap;
+            pub use super::os::auxvec::{auxv, auxv_from_file};
+        }
     }
     target_os = "freebsd" => {
         #[cfg(target_arch = "aarch64")]

library/std_detect/src/detect/os/linux/aarch64.rs

@@ -35,106 +35,106 @@ pub(crate) fn detect_features() -> cache::Initializer {
 ///
 /// [hwcap]: https://github.com/torvalds/linux/blob/master/arch/arm64/include/uapi/asm/hwcap.h
 #[derive(Debug, Default, PartialEq)]
-struct AtHwcap {
+pub struct AtHwcap {
     // AT_HWCAP
-    fp: bool,
-    asimd: bool,
-    // evtstrm: No LLVM support.
-    aes: bool,
-    pmull: bool,
-    sha1: bool,
-    sha2: bool,
-    crc32: bool,
-    atomics: bool,
-    fphp: bool,
-    asimdhp: bool,
-    // cpuid: No LLVM support.
-    asimdrdm: bool,
-    jscvt: bool,
-    fcma: bool,
-    lrcpc: bool,
-    dcpop: bool,
-    sha3: bool,
-    sm3: bool,
-    sm4: bool,
-    asimddp: bool,
-    sha512: bool,
-    sve: bool,
-    fhm: bool,
-    dit: bool,
-    uscat: bool,
-    ilrcpc: bool,
-    flagm: bool,
-    ssbs: bool,
-    sb: bool,
-    paca: bool,
-    pacg: bool,
+    pub fp: bool,
+    pub asimd: bool,
+    // pub evtstrm: No LLVM support.
+    pub aes: bool,
+    pub pmull: bool,
+    pub sha1: bool,
+    pub sha2: bool,
+    pub crc32: bool,
+    pub atomics: bool,
+    pub fphp: bool,
+    pub asimdhp: bool,
+    // pub cpuid: No LLVM support.
+    pub asimdrdm: bool,
+    pub jscvt: bool,
+    pub fcma: bool,
+    pub lrcpc: bool,
+    pub dcpop: bool,
+    pub sha3: bool,
+    pub sm3: bool,
+    pub sm4: bool,
+    pub asimddp: bool,
+    pub sha512: bool,
+    pub sve: bool,
+    pub fhm: bool,
+    pub dit: bool,
+    pub uscat: bool,
+    pub ilrcpc: bool,
+    pub flagm: bool,
+    pub ssbs: bool,
+    pub sb: bool,
+    pub paca: bool,
+    pub pacg: bool,
 
     // AT_HWCAP2
-    dcpodp: bool,
-    sve2: bool,
-    sveaes: bool,
-    svepmull: bool,
-    svebitperm: bool,
-    svesha3: bool,
-    svesm4: bool,
-    flagm2: bool,
-    frint: bool,
-    // svei8mm: See i8mm feature.
-    svef32mm: bool,
-    svef64mm: bool,
-    // svebf16: See bf16 feature.
-    i8mm: bool,
-    bf16: bool,
-    // dgh: No LLVM support.
-    rng: bool,
-    bti: bool,
-    mte: bool,
-    ecv: bool,
-    // afp: bool,
-    // rpres: bool,
-    // mte3: bool,
-    sme: bool,
-    smei16i64: bool,
-    smef64f64: bool,
-    // smei8i32: bool,
-    // smef16f32: bool,
-    // smeb16f32: bool,
-    // smef32f32: bool,
-    smefa64: bool,
-    wfxt: bool,
-    // ebf16: bool,
-    // sveebf16: bool,
-    cssc: bool,
-    // rprfm: bool,
-    sve2p1: bool,
-    sme2: bool,
-    sme2p1: bool,
-    // smei16i32: bool,
-    // smebi32i32: bool,
-    smeb16b16: bool,
-    smef16f16: bool,
-    mops: bool,
-    hbc: bool,
-    sveb16b16: bool,
-    lrcpc3: bool,
-    lse128: bool,
-    fpmr: bool,
-    lut: bool,
-    faminmax: bool,
-    f8cvt: bool,
-    f8fma: bool,
-    f8dp4: bool,
-    f8dp2: bool,
-    f8e4m3: bool,
-    f8e5m2: bool,
-    smelutv2: bool,
-    smef8f16: bool,
-    smef8f32: bool,
-    smesf8fma: bool,
-    smesf8dp4: bool,
-    smesf8dp2: bool,
-    // pauthlr: bool,
+    pub dcpodp: bool,
+    pub sve2: bool,
+    pub sveaes: bool,
+    pub svepmull: bool,
+    pub svebitperm: bool,
+    pub svesha3: bool,
+    pub svesm4: bool,
+    pub flagm2: bool,
+    pub frint: bool,
+    // pub svei8mm: See i8mm feature.
+    pub svef32mm: bool,
+    pub svef64mm: bool,
+    // pub svebf16: See bf16 feature.
+    pub i8mm: bool,
+    pub bf16: bool,
+    // pub dgh: No LLVM support.
+    pub rng: bool,
+    pub bti: bool,
+    pub mte: bool,
+    pub ecv: bool,
+    // pub afp: bool,
+    // pub rpres: bool,
+    // pub mte3: bool,
+    pub sme: bool,
+    pub smei16i64: bool,
+    pub smef64f64: bool,
+    // pub smei8i32: bool,
+    // pub smef16f32: bool,
+    // pub smeb16f32: bool,
+    // pub smef32f32: bool,
+    pub smefa64: bool,
+    pub wfxt: bool,
+    // pub ebf16: bool,
+    // pub sveebf16: bool,
+    pub cssc: bool,
+    // pub rprfm: bool,
+    pub sve2p1: bool,
+    pub sme2: bool,
+    pub sme2p1: bool,
+    // pub smei16i32: bool,
+    // pub smebi32i32: bool,
+    pub smeb16b16: bool,
+    pub smef16f16: bool,
+    pub mops: bool,
+    pub hbc: bool,
+    pub sveb16b16: bool,
+    pub lrcpc3: bool,
+    pub lse128: bool,
+    pub fpmr: bool,
+    pub lut: bool,
+    pub faminmax: bool,
+    pub f8cvt: bool,
+    pub f8fma: bool,
+    pub f8dp4: bool,
+    pub f8dp2: bool,
+    pub f8e4m3: bool,
+    pub f8e5m2: bool,
+    pub smelutv2: bool,
+    pub smef8f16: bool,
+    pub smef8f32: bool,
+    pub smesf8fma: bool,
+    pub smesf8dp4: bool,
+    pub smesf8dp2: bool,
+    // pub pauthlr: bool,
 }
 
 impl From<auxvec::AuxVec> for AtHwcap {
@@ -403,7 +403,3 @@ impl AtHwcap {
         value
     }
 }
-
-#[cfg(target_endian = "little")]
-#[cfg(test)]
-mod tests;

library/std_detect/src/detect/os/linux/auxvec.rs

@@ -20,8 +20,8 @@ pub(crate) const AT_HWCAP2: usize = 26;
 /// If an entry cannot be read all the bits in the bitfield are set to zero.
 /// This should be interpreted as all the features being disabled.
 #[derive(Debug, Copy, Clone)]
-#[cfg_attr(test, derive(PartialEq))]
-pub(crate) struct AuxVec {
+#[derive(PartialEq)]
+pub struct AuxVec {
     pub hwcap: usize,
     #[cfg(any(
         target_arch = "aarch64",
@@ -68,7 +68,7 @@ pub(crate) struct AuxVec {
 /// [auxvec_h]: https://github.com/torvalds/linux/blob/master/include/uapi/linux/auxvec.h
 /// [auxv_docs]: https://docs.rs/auxv/0.3.3/auxv/
 /// [`getauxval`]: https://man7.org/linux/man-pages/man3/getauxval.3.html
-pub(crate) fn auxv() -> Result<AuxVec, ()> {
+pub fn auxv() -> Result<AuxVec, ()> {
     // Try to call a getauxval function.
     if let Ok(hwcap) = getauxval(AT_HWCAP) {
         // Targets with only AT_HWCAP:
@@ -146,13 +146,9 @@ fn getauxval(key: usize) -> Result<usize, ()> {
 
 /// Tries to read the auxiliary vector from the `file`. If this fails, this
 /// function returns `Err`.
-pub(super) fn auxv_from_file(file: &str) -> Result<AuxVec, alloc::string::String> {
-    let file = super::read_file(file)?;
-    auxv_from_file_bytes(&file)
-}
+pub fn auxv_from_file(file: &str) -> Result<AuxVec, alloc::string::String> {
+    let bytes = super::read_file(file)?;
 
-/// Read auxiliary vector from a slice of bytes.
-pub(super) fn auxv_from_file_bytes(bytes: &[u8]) -> Result<AuxVec, alloc::string::String> {
     // See <https://github.com/torvalds/linux/blob/v5.15/include/uapi/linux/auxvec.h>.
     //
     // The auxiliary vector contains at most 34 (key,value) fields: from
@@ -216,6 +212,3 @@ fn auxv_from_buf(buf: &[usize]) -> Result<AuxVec, alloc::string::String> {
     let _ = buf;
     Err(alloc::string::String::from("hwcap not found"))
 }
-
-#[cfg(test)]
-mod tests;

library/std_detect/src/detect/os/linux/mod.rs

@@ -2,7 +2,7 @@
 
 use alloc::vec::Vec;
 
-mod auxvec;
+pub(super) mod auxvec;
 
 fn read_file(orig_path: &str) -> Result<Vec<u8>, alloc::string::String> {
     use alloc::format;
@@ -37,7 +37,7 @@ fn read_file(orig_path: &str) -> Result<Vec<u8>, alloc::string::String> {
 
 cfg_select! {
     target_arch = "aarch64" => {
-        mod aarch64;
+        pub(super) mod aarch64;
         pub(crate) use self::aarch64::detect_features;
     }
     target_arch = "arm" => {

library/std_detect/src/detect/os/riscv.rs

@@ -18,7 +18,7 @@ use crate::detect::{Feature, cache};
 /// conflicting extensions and/or complicated requirements.  Eliminating such
 /// inconsistencies is the responsibility of the feature detection logic and
 /// its provider(s).
-pub(crate) fn imply_features(mut value: cache::Initializer) -> cache::Initializer {
+pub fn imply_features(mut value: cache::Initializer) -> cache::Initializer {
     loop {
         // Check convergence of the feature flags later.
         let prev = value;
@@ -153,7 +153,3 @@ pub(crate) fn imply_features(mut value: cache::Initializer) -> cache::Initialize
         }
     }
 }
-
-#[cfg(test)]
-#[path = "riscv/tests.rs"]
-mod tests;

library/std_detect_tests/Cargo.toml

@@ -0,0 +1,6 @@
+[package]
+name = "std_detect_tests"
+version = "0.0.0"
+license = "MIT OR Apache-2.0"
+description = "Tests for std_detect"
+edition = "2024"