cpu: rv64: add support for f32 layer normalization using RVV #4453
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Description
This PR introduces optimized layer normalization primitive for RV64 architectures using RVV (RISC-V Vector) intrinsics.
Features and Limitations
Supported:
Not supported:
Implementation Details
The implementation uses an LMUL=1 configuration with 4-way loop unrolling to maximize throughput while maintaining register pressure. For statistics calculation, the kernel uses double-precision (f64) accumulators via widening operations to maintain numerical accuracy across large reduction operations. The normalization pass applies the standard formula
((x - mean) / std) × scale + shiftusing fused multiply-accumulate instructions to efficiently compute the final output.Checklist
General
make testandmake test_benchdnn_*) pass locally for each commit?BenchDNN test log: test_lnorm_all.log
Performance improvements
Performance Results
Test Platform: Banana Pi F3