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Load Typed

Simon Amtoft Pedersen edited this page May 22, 2020 · 5 revisions

Table showcasing an example of each Load Typed instruction.

Example Explanation
lbc r16 = [r2 + 127] Loads the byte content from the data cache from the absolute address r2 + 127 to the register r16.
lbl r16 = [r2 + 127] Loads the byte content from the local scratchpad memory from the absolute address r2 + 127 to the register r16.
lbm r16 = [r2 + 127] Loads the byte content from the global memory from the absolute address r2 + 127 to the register r16.
lbs r16 = [r2 + 127] Loads the byte content from the stack cache from the absolute address r2 + 127 to the register r16.
lbuc r16 = [r2 + 127] Loads the unsigned byte content from the data cache from the absolute address r2 + 127 to the register r16.
lbul r16 = [r2 + 127] Loads the unsigned byte content from the local scratchpad memory from the absolute address r2 + 127 to the register r16.
lbum r16 = [r2 + 127] Loads the unsigned byte content from the global memory from the absolute address r2 + 127 to the register r16.
lbus r16 = [r2 + 127] Loads the unsigned byte content from the stack cache from the absolute address r2 + 127 to the register r16.
lhc r24 = [r2 + 2] Loads the half-word content from the data cache from the absolute address r2 + 4 to the register r24.
lhl r24 = [r2 + 2] Loads the half-word content from the local scratchpad memory from the absolute address r2 + 4 to the register r24.
lhm r24 = [r2 + 2] Loads the half-word content from the global memory from the absolute address r2 + 4 to the register r24.
lhs r24 = [r2 + 2] Loads the half-word content from the stack cache from the absolute address r2 + 4 to the register r24.
lhuc r24 = [r2 + 2] Loads the unsigned half-word content from the data cache from the absolute address r2 + 4 to the register r24.
lhul r24 = [r2 + 2] Loads the unsigned half-word content from the local scratchpad memory from the absolute address r2 + 4 to the register r24.
lhum r24 = [r2 + 2] Loads the unsigned half-word content from the global memory from the absolute address r2 + 4 to the register r24.
lhus r24 = [r2 + 2] Loads the unsigned half-word content from the stack cache from the absolute address r2 + 4 to the register r24.
lwc r24 = [r2 + 2] Loads the word content from the data cache from the absolute address r2 + 8 to the register r24.
lwl r24 = [r2 + 2] Loads the word content from the local scratchpad memory from the absolute address r2 + 8 to the register r24.\
lwm r24 = [r2 + 2] Loads the word content from the global memory from the absolute address r2 + 8 to the register r24.
lws r24 = [r2 + 2] Loads the word content from the stack cache from the absolute address r2 + 8 to the register r24.

Note: Since there is only one memory (the global memory gm), all loads will work on the global memory, and thus many of these instructions will show the same behavior in Chora, but this would be different in Patmos.

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