Codegen tests for Arm Cortex-R82 #151378
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Codegen tests for Arm Cortex-R82 #151378
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Some changes occurred in src/doc/rustc/src/platform-support cc @Noratrieb Some changes occurred in tests/codegen-llvm/sanitizer cc @rcvalle |
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…8r-unknown-none-softfloat`. The existing `aarch64-unknown-none` target assumes Armv8.0-A as a baseline. However, Arm recently released the Arm Cortex-R82 processor which is the first to implement the Armv8-R AArch64 mode architecture. This architecture is similar to Armv8-A AArch64, however it has a different set of mandatory features, and is based off of Armv8.4. It is largely unrelated to the existing Armv8-R architecture target (`armv8r-none-eabihf`), which only operates in AArch32 mode. The second `aarch64v8r-unknown-none-softfloat` target allows for possible Armv8-R AArch64 CPUs with no FPU, or for use-cases where FPU register stacking is not desired. As with the existing `aarch64-unknown-none` target we have coupled FPU support and Neon support together - there is no 'has FPU but does not have NEON' target proposed even though the architecture technically allows for it. This PR was developed by Ferrous Systems on behalf of Arm. Arm is the owner of these changes.
- line wrapping - extend the mapping of target_arch to llvm_component in tidy itself so it can handle target tuples that start with an aarch64v8r component - fix needs-llvm-component directive in `aarch64v8r` UI assembly test - extend `tests/assembly-llvm/targets/targets-elf.rs` as per target policy check
This PR adds checks to the `aarch64v8r-unknown-none` target to verify that if the Cortex-R82 CPU is enabled (with `-Ctarget-cpu=cortex-r82`), that the appropriate additional AArch64 features are enabled. This is important because Cortex-R82 is (currently) the only processor implementing Armv8-R AArch64 and it implements a number of Armv8 features over and above the baseline for the architecture. Many of these features are of interest to safety-critical firmware development (for example `FEAT_RASv1p1`, which adds support for the *RAS Common Fault Injection Model Extension*) and so we anticipate them being enabled when building such firmware. We are offering these tests upstream in-lieu of a full Cortex-R82 specific target because we understand the Project has a preference for architecture-baseline targets over CPU-specific targets. This PR builds on and requires rust-lang#150863, but we've pulled them out as a separate PR. This PR was developed by Ferrous Systems on behalf of Arm. Arm is the owner of these changes.
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This PR was rebased onto a different main commit. Here's a range-diff highlighting what actually changed. Rebasing is a normal part of keeping PRs up to date, so no action is needed—this note is just to help reviewers. |
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This PR adds checks to the
aarch64v8r-unknown-nonetarget to verify that if the Cortex-R82 CPU is enabled (with-Ctarget-cpu=cortex-r82), that the appropriate additional AArch64 features are enabled.This is important because Cortex-R82 is (currently) the only processor implementing Armv8-R AArch64 and it implements a number of Armv8 features over and above the baseline for the architecture. Many of these features are of interest to safety-critical firmware development (for example
FEAT_RASv1p1, which adds support for the RAS Common Fault Injection Model Extension) and so we anticipate them being enabled when building such firmware.We are offering these tests upstream in-lieu of a full Cortex-R82 specific target because we understand the Project has a preference for architecture-baseline targets over CPU-specific targets.
This PR builds on and requires #150863, but we've pulled them out as a separate PR.
Ownership
This PR was developed by Ferrous Systems on behalf of Arm. Arm is the owner of these changes.