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2 changes: 2 additions & 0 deletions compiler/rustc_target/src/spec/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1704,6 +1704,8 @@ supported_targets! {
("aarch64-unknown-none-softfloat", aarch64_unknown_none_softfloat),
("aarch64_be-unknown-none-softfloat", aarch64_be_unknown_none_softfloat),
("aarch64-unknown-nuttx", aarch64_unknown_nuttx),
("aarch64v8r-unknown-none", aarch64v8r_unknown_none),
("aarch64v8r-unknown-none-softfloat", aarch64v8r_unknown_none_softfloat),

("x86_64-fortanix-unknown-sgx", x86_64_fortanix_unknown_sgx),

Expand Down
37 changes: 37 additions & 0 deletions compiler/rustc_target/src/spec/targets/aarch64v8r_unknown_none.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,37 @@
use crate::spec::{
Arch, Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, SanitizerSet, StackProbeType, Target,
TargetMetadata, TargetOptions,
};

pub(crate) fn target() -> Target {
let opts = TargetOptions {
// based off the aarch64-unknown-none target at time of addition
linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes),
linker: Some("rust-lld".into()),
supported_sanitizers: SanitizerSet::KCFI | SanitizerSet::KERNELADDRESS,
relocation_model: RelocModel::Static,
disable_redzone: true,
max_atomic_width: Some(128),
stack_probes: StackProbeType::Inline,
panic_strategy: PanicStrategy::Abort,
default_uwtable: true,

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Given the discussion around #149622, I wonder if these targets should be added with

Suggested change
position_independent_executables: true,
static_position_independent_executables: true,

since the consensus seemed to be that it would make sense for our existing aarch64 targets to be configured that way except it could break people already using the targets.

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@jonathanpallant jonathanpallant Jan 15, 2026

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We tried that and things broke (IIRC), so we wanted to (or you to) fix all the breakages in the existing target before we flipped that switch.

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We tried that and things broke (IIRC),

On this specfic point, as far as I could test the patch in #149622 breaks existing aarch64-unknown-none code that uses the aarch64-rt and/or the semihosting crate. This can be observed in this example: QEMU hangs and no output is printed; but the behavior can be observed in simpler programs as well.

As the AArch64 v8-R ISA builds on top of the Armv8.4-A ISA taking that patch has the same effect on this target.

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I don't currently have cycles to drive that work so I don't want to block this on it.

// deviations from aarch64-unknown-none: `+v8a` -> `+v8r`; `+v8r` implies `+neon`
features: "+v8r,+strict-align".into(),
..Default::default()
};
Target {
llvm_target: "aarch64-unknown-none".into(),
metadata: TargetMetadata {
description: Some("Bare Armv8-R AArch64, hardfloat".into()),
tier: Some(3),
host_tools: Some(false),
std: Some(false),
},
pointer_width: 64,
// $ clang-21 -S -emit-llvm -target aarch64 -mcpu=cortex-r82 stub.c
data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: Arch::AArch64,
options: opts,
}
}
Original file line number Diff line number Diff line change
@@ -0,0 +1,36 @@
use crate::spec::{
Abi, Arch, Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, SanitizerSet, StackProbeType,
Target, TargetMetadata, TargetOptions,
};

pub(crate) fn target() -> Target {
let opts = TargetOptions {
abi: Abi::SoftFloat,
linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes),
linker: Some("rust-lld".into()),
relocation_model: RelocModel::Static,
disable_redzone: true,
max_atomic_width: Some(128),
supported_sanitizers: SanitizerSet::KCFI | SanitizerSet::KERNELADDRESS,
stack_probes: StackProbeType::Inline,
panic_strategy: PanicStrategy::Abort,
default_uwtable: true,

// deviations from aarch64-unknown-none: `+v8a` -> `+v8r`
features: "+v8r,+strict-align,-neon".into(),
..Default::default()
};
Target {
llvm_target: "aarch64-unknown-none".into(),
metadata: TargetMetadata {
description: Some("Bare Armv8-R AArch64, softfloat".into()),
tier: Some(3),
host_tools: Some(false),
std: Some(false),
},
pointer_width: 64,
data_layout: "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32".into(),
arch: Arch::AArch64,
options: opts,
}
}
2 changes: 2 additions & 0 deletions src/bootstrap/src/core/sanity.rs
Original file line number Diff line number Diff line change
Expand Up @@ -38,6 +38,8 @@ pub struct Finder {
const STAGE0_MISSING_TARGETS: &[&str] = &[
// just a dummy comment so the list doesn't get onelined
"x86_64-unknown-linux-gnuasan",
"aarch64v8r-unknown-none",
"aarch64v8r-unknown-none-softfloat",
];

/// Minimum version threshold for libstdc++ required when using prebuilt LLVM
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1 change: 1 addition & 0 deletions src/doc/rustc/src/SUMMARY.md
Original file line number Diff line number Diff line change
Expand Up @@ -50,6 +50,7 @@
- [aarch64-unknown-linux-gnu](platform-support/aarch64-unknown-linux-gnu.md)
- [aarch64-unknown-linux-musl](platform-support/aarch64-unknown-linux-musl.md)
- [aarch64-unknown-none*](platform-support/aarch64-unknown-none.md)
- [aarch64v8r-unknown-none*](platform-support/aarch64v8r-unknown-none.md)
- [aarch64_be-unknown-none-softfloat](platform-support/aarch64_be-unknown-none-softfloat.md)
- [aarch64_be-unknown-linux-musl](platform-support/aarch64_be-unknown-linux-musl.md)
- [amdgcn-amd-amdhsa](platform-support/amdgcn-amd-amdhsa.md)
Expand Down
2 changes: 2 additions & 0 deletions src/doc/rustc/src/platform-support.md
Original file line number Diff line number Diff line change
Expand Up @@ -274,6 +274,8 @@ target | std | host | notes
[`aarch64-unknown-trusty`](platform-support/trusty.md) | ✓ | |
[`aarch64-uwp-windows-msvc`](platform-support/uwp-windows-msvc.md) | ✓ | |
[`aarch64-wrs-vxworks`](platform-support/vxworks.md) | ✓ | | ARM64 VxWorks OS
[`aarch64v8r-unknown-none`](platform-support/aarch64v8r-unknown-none.md) | * | | Bare Armv8-R in AArch64 mode, hardfloat
[`aarch64v8r-unknown-none-softfloat`](platform-support/aarch64v8r-unknown-none.md) | * | | Bare Armv8-R in AArch64 mode, softfloat
[`aarch64_be-unknown-hermit`](platform-support/hermit.md) | ✓ | | ARM64 Hermit (big-endian)
`aarch64_be-unknown-linux-gnu` | ✓ | ✓ | ARM64 Linux (big-endian)
`aarch64_be-unknown-linux-gnu_ilp32` | ✓ | ✓ | ARM64 Linux (big-endian, ILP32 ABI)
Expand Down
84 changes: 84 additions & 0 deletions src/doc/rustc/src/platform-support/aarch64v8r-unknown-none.md
Original file line number Diff line number Diff line change
@@ -0,0 +1,84 @@
# `aarch64v8r-unknown-none` and `aarch64v8r-unknown-none-softfloat`

* **Tier: 3**
* **Library Support:** core and alloc (bare-metal, `#![no_std]`)

Bare-metal target for CPUs in the Armv8-R architecture family, running in
AArch64 mode. Processors in this family include the
[Arm Cortex-R82][cortex-r82].

For Armv8-R CPUs running in AArch32 mode (such as the Arm Cortex-R52), see
[`armv8r-none-eabihf`](armv8r-none-eabihf.md) instead.

[cortex-r82]: https://developer.arm.com/processors/Cortex-R82

## Target maintainers

- [Rust Embedded Devices Working Group Arm Team]
- [@rust-lang/arm-maintainers][arm_maintainers] ([rust@arm.com][arm_email])

[Rust Embedded Devices Working Group Arm Team]: https://github.com/rust-embedded/wg?tab=readme-ov-file#the-arm-team
[arm_maintainers]: https://github.com/rust-lang/team/blob/master/teams/arm-maintainers.toml
[arm_email]: mailto:rust@arm.com

## Target CPU and Target Feature options

Unlike AArch64 v8-A processors, not all AArch64 v8-R processors include an FPU
(that is, not all Armv8-R AArch64 processors implement the optional Armv8
`FEAT_FP` extension). If you do not have an FPU, or have an FPU but wish to use
a soft-float ABI anyway, you should use the `aarch64v8r-unknown-none-softfloat`
target. If you wish to use the standard hard-float Arm AArch64 calling
convention, and you have an FPU, you can use the `aarch64v8r-unknown-none`
target.

When using the `aarch64v8r-unknown-none` target, the minimum floating-point
features assumed are the Advanced SIMD features (`FEAT_AdvSIMD`, or `+neon`),
the implementation of which is branded Arm NEON.

If your processor supports a different set of floating-point features than the
default expectations then these should also be enabled or disabled as needed
with [`-C target-feature=(+/-)`][target-feature]. However, note that currently
Rust does not support building hard-float AArch64 targets with Advanced SIMD
support disabled. It is also possible to tell Rust (or LLVM) that you have a
specific model of Arm processor, using the [`-Ctarget-cpu`][target-cpu] option.
Doing so may change the default set of target-features enabled.

[target-feature]: https://doc.rust-lang.org/rustc/codegen-options/index.html#target-feature
[target-cpu]: https://doc.rust-lang.org/rustc/codegen-options/index.html#target-cpu

## Requirements

These targets are cross-compiled and use static linking.

By default, the `lld` linker included with Rust will be used; however, you may
want to use the GNU linker instead. This can be obtained for Windows/Mac/Linux
from the [Arm Developer Website][arm-gnu-toolchain], or possibly from your OS's
package manager. To use it, add the following to your `.cargo/config.toml`:

```toml
[target.aarch64-unknown-none]
linker = "aarch64-none-elf-ld"
```

The GNU linker can also be used by specifying `aarch64-none-elf-gcc` as the
linker. This is needed when using GCC's link time optimization.

These targets don't provide a linker script, so you'll need to bring your own
according to the specific device you are using. Pass
`-Clink-arg=-Tyour_script.ld` as a rustc argument to make the linker use
`your_script.ld` during linking.

[arm-gnu-toolchain]: https://developer.arm.com/Tools%20and%20Software/GNU%20Toolchain

## Cross-compilation toolchains and C code

This target supports C code compiled with the `aarch64-none-elf` target
triple and a suitable `-march` or `-mcpu` flag.

## Start-up and Low-Level Code

The [Rust Embedded Devices Working Group Arm Team] maintain the
[`aarch64-cpu`] crate, which may be useful for writing bare-metal code using
this target.

[`aarch64-cpu`]: https://docs.rs/aarch64-cpu
3 changes: 3 additions & 0 deletions src/doc/rustc/src/platform-support/armv8r-none-eabihf.md
Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,9 @@ and [Cortex-R52+][cortex-r52-plus].
See [`arm-none-eabi`](arm-none-eabi.md) for information applicable to all
`arm-none-eabi` targets.

For Armv8-R CPUs running in AArch64 mode (such as the Arm Cortex-R82), see
[`aarch64v8r-unknown-none`](aarch64v8r-unknown-none.md) instead.

[cortex-r52]: https://www.arm.com/products/silicon-ip-cpu/cortex-r/cortex-r52
[cortex-r52-plus]: https://www.arm.com/products/silicon-ip-cpu/cortex-r/cortex-r52-plus

Expand Down
2 changes: 1 addition & 1 deletion src/tools/tidy/src/target_specific_tests.rs
Original file line number Diff line number Diff line change
Expand Up @@ -98,7 +98,7 @@ fn arch_to_llvm_component(arch: &str) -> String {
// enough for the purpose of this tidy check.
match arch {
"amdgcn" => "amdgpu".into(),
"aarch64_be" | "arm64_32" | "arm64e" | "arm64ec" => "aarch64".into(),
"aarch64v8r" | "aarch64_be" | "arm64_32" | "arm64e" | "arm64ec" => "aarch64".into(),
"i386" | "i586" | "i686" | "x86" | "x86_64" | "x86_64h" => "x86".into(),
"loongarch32" | "loongarch64" => "loongarch".into(),
"nvptx64" => "nvptx".into(),
Expand Down
6 changes: 6 additions & 0 deletions tests/assembly-llvm/targets/targets-elf.rs
Original file line number Diff line number Diff line change
Expand Up @@ -67,6 +67,12 @@
//@ revisions: aarch64_unknown_none_softfloat
//@ [aarch64_unknown_none_softfloat] compile-flags: --target aarch64-unknown-none-softfloat
//@ [aarch64_unknown_none_softfloat] needs-llvm-components: aarch64
//@ revisions: aarch64v8r_unknown_none
//@ [aarch64v8r_unknown_none] compile-flags: --target aarch64v8r-unknown-none
//@ [aarch64v8r_unknown_none] needs-llvm-components: aarch64
//@ revisions: aarch64v8r_unknown_none_softfloat
//@ [aarch64v8r_unknown_none_softfloat] compile-flags: --target aarch64v8r-unknown-none-softfloat
//@ [aarch64v8r_unknown_none_softfloat] needs-llvm-components: aarch64
//@ revisions: aarch64_unknown_nto_qnx700
//@ [aarch64_unknown_nto_qnx700] compile-flags: --target aarch64-unknown-nto-qnx700
//@ [aarch64_unknown_nto_qnx700] needs-llvm-components: aarch64
Expand Down
45 changes: 45 additions & 0 deletions tests/codegen-llvm/aarch64v8r-softfloat.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,45 @@
//@ add-minicore
//@ compile-flags: --target aarch64v8r-unknown-none-softfloat -Zmerge-functions=disabled
//@ needs-llvm-components: aarch64
#![crate_type = "lib"]
#![feature(no_core, lang_items)]
#![no_core]

extern crate minicore;
use minicore::*;

// CHECK: i64 @pass_f64_C(i64 {{[^,]*}})
#[no_mangle]
extern "C" fn pass_f64_C(x: f64) -> f64 {
x
}

// CHECK: i64 @pass_f32_pair_C(i64 {{[^,]*}})
#[no_mangle]
extern "C" fn pass_f32_pair_C(x: (f32, f32)) -> (f32, f32) {
x
}

// CHECK: [2 x i64] @pass_f64_pair_C([2 x i64] {{[^,]*}})
#[no_mangle]
extern "C" fn pass_f64_pair_C(x: (f64, f64)) -> (f64, f64) {
x
}

// CHECK: i64 @pass_f64_Rust(i64 {{[^,]*}})
#[no_mangle]
fn pass_f64_Rust(x: f64) -> f64 {
x
}

// CHECK: i64 @pass_f32_pair_Rust(i64 {{[^,]*}})
#[no_mangle]
fn pass_f32_pair_Rust(x: (f32, f32)) -> (f32, f32) {
x
}

// CHECK: void @pass_f64_pair_Rust(ptr {{.*}}%{{[^ ]+}}, ptr {{.*}}%{{[^ ]+}})
#[no_mangle]
fn pass_f64_pair_Rust(x: (f64, f64)) -> (f64, f64) {
x
}
4 changes: 3 additions & 1 deletion tests/codegen-llvm/sanitizer/kasan-emits-instrumentation.rs
Original file line number Diff line number Diff line change
Expand Up @@ -2,9 +2,11 @@

//@ add-minicore
//@ compile-flags: -Zsanitizer=kernel-address -Copt-level=0
//@ revisions: aarch64 riscv64imac riscv64gc x86_64
//@ revisions: aarch64 aarch64v8r riscv64imac riscv64gc x86_64
//@[aarch64] compile-flags: --target aarch64-unknown-none
//@[aarch64] needs-llvm-components: aarch64
//@[aarch64v8r] compile-flags: --target aarch64v8r-unknown-none
//@[aarch64v8r] needs-llvm-components: aarch64
//@[riscv64imac] compile-flags: --target riscv64imac-unknown-none-elf
//@[riscv64imac] needs-llvm-components: riscv
//@[riscv64gc] compile-flags: --target riscv64gc-unknown-none-elf
Expand Down
Original file line number Diff line number Diff line change
@@ -1,9 +1,11 @@
// Verifies that "cfi-normalize-integers" module flag is added.
//
//@ add-minicore
//@ revisions: aarch64 x86_64
//@ revisions: aarch64 aarch64v8r x86_64
//@ [aarch64] compile-flags: --target aarch64-unknown-none
//@ [aarch64] needs-llvm-components: aarch64
//@ [aarch64v8r] compile-flags: --target aarch64v8r-unknown-none
//@ [aarch64v8r] needs-llvm-components: aarch64
//@ [x86_64] compile-flags: --target x86_64-unknown-none
//@ [x86_64] needs-llvm-components: x86
//@ compile-flags: -Ctarget-feature=-crt-static -Zsanitizer=kcfi -Zsanitizer-cfi-normalize-integers
Expand Down
4 changes: 3 additions & 1 deletion tests/codegen-llvm/sanitizer/kcfi/add-kcfi-flag.rs
Original file line number Diff line number Diff line change
@@ -1,9 +1,11 @@
// Verifies that "kcfi" module flag is added.
//
//@ add-minicore
//@ revisions: aarch64 x86_64
//@ revisions: aarch64 aarch64v8r x86_64
//@ [aarch64] compile-flags: --target aarch64-unknown-none
//@ [aarch64] needs-llvm-components: aarch64
//@ [aarch64v8r] compile-flags: --target aarch64v8r-unknown-none
//@ [aarch64v8r] needs-llvm-components: aarch64
//@ [x86_64] compile-flags: --target x86_64-unknown-none
//@ [x86_64] needs-llvm-components: x86
//@ compile-flags: -Ctarget-feature=-crt-static -Zsanitizer=kcfi
Expand Down
4 changes: 3 additions & 1 deletion tests/codegen-llvm/sanitizer/kcfi/add-kcfi-offset-flag.rs
Original file line number Diff line number Diff line change
@@ -1,9 +1,11 @@
// Verifies that "kcfi-offset" module flag is added.
//
//@ add-minicore
//@ revisions: aarch64 x86_64
//@ revisions: aarch64 aarch64v8r x86_64
//@ [aarch64] compile-flags: --target aarch64-unknown-none
//@ [aarch64] needs-llvm-components: aarch64
//@ [aarch64v8r] compile-flags: --target aarch64v8r-unknown-none
//@ [aarch64v8r] needs-llvm-components: aarch64
//@ [x86_64] compile-flags: --target x86_64-unknown-none
//@ [x86_64] needs-llvm-components: x86
//@ compile-flags: -Ctarget-feature=-crt-static -Zsanitizer=kcfi -Z patchable-function-entry=4,3
Expand Down
Original file line number Diff line number Diff line change
@@ -1,9 +1,11 @@
// Verifies that KCFI operand bundles are omitted.
//
//@ add-minicore
//@ revisions: aarch64 x86_64
//@ revisions: aarch64 aarch64v8r x86_64
//@ [aarch64] compile-flags: --target aarch64-unknown-none
//@ [aarch64] needs-llvm-components: aarch64
//@ [aarch64v8r] compile-flags: --target aarch64v8r-unknown-none
//@ [aarch64v8r] needs-llvm-components: aarch64
//@ [x86_64] compile-flags: --target x86_64-unknown-none
//@ [x86_64] needs-llvm-components: x86
//@ compile-flags: -Cno-prepopulate-passes -Zsanitizer=kcfi -Copt-level=0
Expand Down
Original file line number Diff line number Diff line change
@@ -1,9 +1,11 @@
// Verifies that generalized KCFI type metadata for functions are emitted.
//
//@ add-minicore
//@ revisions: aarch64 x86_64
//@ revisions: aarch64 aarch64v8r x86_64
//@ [aarch64] compile-flags: --target aarch64-unknown-none
//@ [aarch64] needs-llvm-components: aarch64
//@ [aarch64v8r] compile-flags: --target aarch64v8r-unknown-none
//@ [aarch64v8r] needs-llvm-components: aarch64
//@ [x86_64] compile-flags: --target x86_64-unknown-none
//@ [x86_64] needs-llvm-components: x86
//@ compile-flags: -Cno-prepopulate-passes -Zsanitizer=kcfi -Zsanitizer-cfi-generalize-pointers
Expand Down
Original file line number Diff line number Diff line change
@@ -1,9 +1,11 @@
// Verifies that normalized and generalized KCFI type metadata for functions are emitted.
//
//@ add-minicore
//@ revisions: aarch64 x86_64
//@ revisions: aarch64 aarch64v8r x86_64
//@ [aarch64] compile-flags: --target aarch64-unknown-none
//@ [aarch64] needs-llvm-components: aarch64
//@ [aarch64v8r] compile-flags: --target aarch64v8r-unknown-none
//@ [aarch64v8r] needs-llvm-components: aarch64
//@ [x86_64] compile-flags: --target x86_64-unknown-none
//@ [x86_64] needs-llvm-components: x86
//@ compile-flags: -Cno-prepopulate-passes -Zsanitizer=kcfi -Zsanitizer-cfi-normalize-integers -Zsanitizer-cfi-generalize-pointers
Expand Down
Original file line number Diff line number Diff line change
@@ -1,9 +1,11 @@
// Verifies that normalized KCFI type metadata for functions are emitted.
//
//@ add-minicore
//@ revisions: aarch64 x86_64
//@ revisions: aarch64 aarch64v8r x86_64
//@ [aarch64] compile-flags: --target aarch64-unknown-none
//@ [aarch64] needs-llvm-components: aarch64
//@ [aarch64v8r] compile-flags: --target aarch64v8r-unknown-none
//@ [aarch64v8r] needs-llvm-components: aarch64
//@ [x86_64] compile-flags: --target x86_64-unknown-none
//@ [x86_64] needs-llvm-components: x86
//@ compile-flags: -Cno-prepopulate-passes -Zsanitizer=kcfi -Zsanitizer-cfi-normalize-integers
Expand Down
Original file line number Diff line number Diff line change
@@ -1,9 +1,11 @@
// Verifies that KCFI type metadata for functions are emitted.
//
//@ add-minicore
//@ revisions: aarch64 x86_64
//@ revisions: aarch64 aarch64v8r x86_64
//@ [aarch64] compile-flags: --target aarch64-unknown-none
//@ [aarch64] needs-llvm-components: aarch64
//@ [aarch64v8r] compile-flags: --target aarch64v8r-unknown-none
//@ [aarch64v8r] needs-llvm-components: aarch64
//@ [x86_64] compile-flags: --target x86_64-unknown-none
//@ [x86_64] needs-llvm-components: x86
//@ compile-flags: -Cno-prepopulate-passes -Zsanitizer=kcfi -Copt-level=0
Expand Down
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