WIP: synthesis using yosys-slang

[phsauter]

Work in progress.

Adding a simple reference synthesis flow to Cheshire using yosys-slang.

TODOs:

• Discuss addition of riscv-dbg nextdm with Paul and implement (riscv-dbg v0.9.0)
• New tech_cells and clint release without description field in Bender.yml
• cva6_icache error: cannot select range of 64 elements from 'logic[3:0]' caused by a mismatch of FETCH_USER_WDTH and the mem_rtrn_i.user field (line 424 and 442), can be fixed by setting AxiUserWidth to a multiple of 8; fix in cva6?
• riscv-dbg dmi_jtag error: identifier 'dtmcs_q' used before its declaration fixed with dmi_jtag: Fix used before declare on dtmcs_q riscv-dbg#183
• axi_id_prepend warning: implicit conversion from 'slv_aw_chan_t' to 'mst_aw_chan_t can be ignored (fixed with axi_id_prepend: Fix implicit conversion linter warning axi#397)
• cva6 axi_adapter warning: finish argument must have value of 0, 1, or 2 code missing, fixed with pulp-v2
• axi_llc_tag_store error: no implicit conversion from 'bit[0:0]' to 'tag_mode_e' solved with v0.2.2
• cheshire_idma_wrap warning: port 'reg_id_o' has no connection can be ignored