This is an environment setup script for creating layouts for the ISHI-kai version of OpenMPW.
It runs on Ubuntu 22.04 and Ubuntu 24.04 on WSL2 (Windows Subsystem for Linux), as well as Ubuntu 22.04 and Ubuntu 24.04 on macOS.
Simply execute the command below.
bash eda-setup.sh
You must install the PDK tailored to the shuttle. Please select and install only one PDK tailored to the shuttle.
In the case of changing the PDK, please delete it once and then reinstall it.
bash pdk_PTC06-setup.sh
bash pdk_TR10-setup.sh
bash pdk_MF20-setup.sh
bash pdk_ihp-sg13g2-setup.sh
bash pdk_sky130-setup.sh
bash pdk_gf180-setup.sh
bash uninstall.sh
If you wish to change the PDK, please delete the existing PDK and then install only the PDK.
macOS installations may fail due to subtle version differences.
Furthermore, as various tools and libraries are installed directly into your environment, this may impact your development setup. If you wish to avoid this, a VMware image is provided for your use.
- Image for Apple Silicon version of OR1 (Phenitec)
- Image for Apple Silicon version of TR10 (Tokai Rika)
- Image for Apple Silicon version of MF20
- Image for Apple Silicon version of IHP
- Image for Apple Silicon version of TinyTapeout
- Image for Intel-based OR1 (Phenetic)
- Image for Intel version of TR10 (Tokai Rika)
- ID: ishi-kai
- Pass: ishi-kai
Depending on your WSL environment, installation may not be possible; therefore, we have also prepared an image for WSL.
- Image for WSL version of OR1 (Phenitec)
- ID: ishi-kai
- Pass: ishi-kai
- Image for WSL version of TR10 (Tokai Rika)
- ID: ishi-kai
- Pass: ishi-kai
wsl --import-in-place ubuntu2204_ishi-kai_EDA .\ubuntu2204_ishi-kai_EDA\ext4.vhdx
The above command will be recognised. To execute it, please use the included "ubuntu2204_ishi-kai_EDA.lnk".
Please note that image files will also be deleted.
wsl --unregister ubuntu2204_ishi-kai_EDA
Sheet resistance obtained from TEG (Resistance and L/W obtained from TEG's V-I characteristics are shown in brackets)
- Poly : 20Ω□(500Ω, 45um/1.8um)
- Nwell : 1.1kΩ□(10kΩ, 45um/4.8um)
- Nact : - (- , 45um/3.0um)※Diode characteristics, rendering measurement impossible
- Pact : 42Ω□(625Ω, 45um/3.0um)
Capacity determined from TEG (in brackets: capacity and L/W determined from TEG's C-f characteristics)
- Poly-Metal (ACTEG15) 3.06fF/um^2 (44pF, 120um/120um)
- nMOS Cap (ACTEG14) 5.42fF(Accumulation and Strong Reversal)/3.82fF(Weak Reversal) (78pF/55pF, 120um/120um)
- pMOS Cap (ACTEG07) 5.34fF(Accumulation and Strong Reversal)/3.54fF(Weak Reversal) (77pF/51pF, 120um/120um)
- Reference Manual
- Installation Manual
- Circuit Simulation Guidelines
- Layout Verification Guidelines
- ESD Protection Device Guidelines
- Standard Cell Lineup
- Element Connection Guidelines
Please calculate the resistance values and capacitor capacitance using the tools below.
When calculating by hand, please use the values below.
Only Metal Layer 1 (ML1) and Metal Layer 2 (ML2) are available for use. Metal Layer 3 (ML3) also exists as a layer, but is reserved for placement and routing and therefore cannot be used.
Mr.URA has provided the schematic for the first part of the contest; please use it when performing LVS and similar tasks.
Schematic for the first part of the contest
Select "OpenRule1umPDK" under Technology.
Select 'ICPS2023_5' via the technology.
This is the pad layout. Please base your design on this.
Pin numbers are counted counter-clockwise, starting from the bottom left corner (south face, west edge) as pin 1.
The production pads incorporate ESD protection. (Although they may appear to be plain metal pads, they will be replaced with ESD-protected pads for the final submission.)
If ESD protection is unnecessary for your implementation (e.g., for analogue circuits) or you wish to implement it yourself, please follow the steps below to use the non-ESD-protected pads.
There are no frames provided for the iHP shuttle. You will need to design your own to suit the bonding machine and package supplier.
- Filler Scripts -- Please change variable of "$INPUT" and "$OUTPUT" to your GDS file name.
Various samples are available within Samples.
An automated generation tool is available.
Generates files for the FastHenry2 inductor simulator and GDS files.
- R
- Inner I.D.[um]
- S
- Space between wires[um]
- W
- Wire Width[um]
- N
- Number of rolls
- T
- Wire Thickness[um]
- GuardRing_S
- Distance from inductor to guard ring[um]
- GuardRing_W
- Guard ring wire thickness[um]
- GuardRing
- Because inductors are very susceptible to other wires, wire enclosures are provided as a safety distance.
Setup scripts for tools that will not be used in the hands-on but may be needed in some situations.
Set up as needed.
bash eda-qflow-option.sh
bash eda-Qucs-S-option.sh
bash eda-xyce-option.sh










