DreamRAM analytically models custom 3D die-stacked DRAM architectures based on High Bandwidth Memory (HBM3). DreamRAM models bandwidth, capacity, energy, latency, and area by exposing fine-grained design parameters at the MAT, subarray, bank, and inter-bank levels. Providing a unified and extensible exploration framework, DreamRAM enables researchers and designers to uncover new opportunities for workload-tailored memory design.
DreamRAM has been accepted to DATE 2026. You can find the DreamRAM paper here: https://arxiv.org/abs/2512.12106
DreamRAM requires standard packages such as: numpy csv sys itertools json getopt os
For plotting paretos, DreamRAM uses matplotlib, mpl_toolkits, and paretoset:
pip install paretoset
python3 dreamram.py [-m MEMORY_CONFIG] [-t TECH_CONFIG] [-o OUTPUT_LABEL]
The default output label is "default", i.e., the default output file is data/default/hbm3_default.csv. Other labels are given output directories and files in the same structure. Data is overwritten without checking existance. Be sure you have the unique output label if you do not want to overwrite your previous run.
python3 plot.py [-i INPUT_LABEL]
The input label should match the output label of your run. Plots are saved to the plot/ directory.
DreamRAM has been accepted to DATE 2026. In the meantime, you can find our paper at https://arxiv.org/abs/2512.12106
Victor Cai, Jennifer Zhou, Haebin Do, David Brooks, and Gu-Yeon Wei
Harvard University, 2025
Please direct further inquiries to victorcai@college.harvard.edu