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allow zero length straight rings#199

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joamatab merged 1 commit intomainfrom
allow_zero_length_straight_rings
Feb 1, 2026
Merged

allow zero length straight rings#199
joamatab merged 1 commit intomainfrom
allow_zero_length_straight_rings

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@joamatab joamatab commented Jan 31, 2026

  • remove samples from wheel
  • add_version

Summary by Sourcery

Allow ring_single components to support zero-length straight segments without causing port overlap issues in both C-band and O-band libraries.

New Features:

  • Support ring_single configurations where horizontal and/or vertical straight segment lengths are zero by constructing a custom component topology instead of delegating to the generic factory.

Bug Fixes:

  • Prevent port overlap and invalid geometry when ring_single is called with zero-length straight segments in C-band and O-band cells.

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sourcery-ai bot commented Jan 31, 2026

Reviewer's Guide

Special-cases ring_single implementations in both si220 cband and oband to correctly build ring layouts when horizontal or vertical straight sections have zero length, avoiding port overlap and preserving ring coupler behavior.

Sequence diagram for constructing ring_single with zero-length straights

sequenceDiagram
  participant Caller
  participant ring_single
  participant gf
  participant Component_c
  Caller->>ring_single: ring_single(gap, radius, length_x, length_y, cross_section, length_extension)
  ring_single->>ring_single: check length_x == 0 or length_y == 0
  alt length_x == 0 or length_y == 0
    ring_single->>gf: get_component(coupler_ring, settings)
    gf-->>ring_single: coupler
    ring_single->>Component_c: create Component
    ring_single->>Component_c: place coupler as cb
    ring_single->>gf: get_component(bend_euler, cross_section, radius)
    gf-->>ring_single: bend
    ring_single->>Component_c: place bl and br
    ring_single->>ring_single: branch on length_x and length_y
    alt length_x == 0 and length_y == 0
      ring_single->>Component_c: connect bl.o2 to cb.o2
      ring_single->>Component_c: connect br.o2 to bl.o1
      ring_single->>Component_c: connect br.o1 to cb.o3
    else length_y == 0 and length_x != 0
      ring_single->>gf: get_component(straight, length_x, cross_section)
      gf-->>ring_single: straight_x
      ring_single->>Component_c: place st
      ring_single->>Component_c: connect bl.o2 to cb.o2
      ring_single->>Component_c: connect st.o2 to bl.o1
      ring_single->>Component_c: connect br.o2 to st.o1
      ring_single->>Component_c: connect br.o1 to cb.o3
    else length_x == 0 and length_y != 0
      ring_single->>gf: get_component(straight, length_y, cross_section)
      gf-->>ring_single: straight_y
      ring_single->>Component_c: place sl and sr
      ring_single->>Component_c: connect sl.o1 to cb.o2
      ring_single->>Component_c: connect bl.o2 to sl.o2
      ring_single->>Component_c: connect br.o2 to bl.o1
      ring_single->>Component_c: connect sr.o1 to br.o1
      ring_single->>Component_c: connect sr.o2 to cb.o3
    end
    ring_single->>Component_c: add ports o1,o2 from coupler ports
    ring_single->>Component_c: set info radius from coupler.info radius
    ring_single-->>Caller: Component_c
  else neither length_x nor length_y is zero
    ring_single->>gf: c.ring_single(gap, radius, length_x, length_y, cross_section, length_extension)
    gf-->>ring_single: component
    ring_single-->>Caller: component
  end
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File-Level Changes

Change Details Files
Add explicit ring_single construction path for zero-length straight segments to avoid port overlap while maintaining correct routing and ports.
  • Detect cases where length_x or length_y is zero and bypass the generic gf.c.ring_single helper.
  • Manually instantiate a coupler_ring with appropriate settings and place it into a new Component.
  • Create left and right bend_euler bends and connect them and optional straight segments depending on which lengths are zero.
  • Handle three subcases: both lengths zero, only vertical length zero (horizontal straight only), and only horizontal length zero (vertical straights only).
  • Expose external ports by re-exporting coupler ports and propagate radius info from the coupler to the top-level component.
cspdk/si220/cband/cells/rings.py
cspdk/si220/oband/cells/rings.py

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Hey - I've left some high level feedback:

  • The zero-length handling logic in cband and oband is nearly identical; consider extracting a shared helper to avoid duplication and reduce the chance of the two implementations drifting out of sync.
  • In the cband version settings includes length_extension but the oband version does not; if both bands should behave consistently for zero-length cases, double-check whether length_extension should also be passed in oband.
  • You special-case length_x == 0 and length_y == 0 but don't guard against negative values; consider explicit validation or normalization of these parameters so the geometry and port layout remains well-defined for unexpected inputs.
Prompt for AI Agents
Please address the comments from this code review:

## Overall Comments
- The zero-length handling logic in cband and oband is nearly identical; consider extracting a shared helper to avoid duplication and reduce the chance of the two implementations drifting out of sync.
- In the cband version `settings` includes `length_extension` but the oband version does not; if both bands should behave consistently for zero-length cases, double-check whether `length_extension` should also be passed in oband.
- You special-case `length_x == 0` and `length_y == 0` but don't guard against negative values; consider explicit validation or normalization of these parameters so the geometry and port layout remains well-defined for unexpected inputs.

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@joamatab joamatab added the bug Something isn't working label Feb 1, 2026
@joamatab joamatab merged commit a0edd54 into main Feb 1, 2026
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