GitHub - donegaci/Digital_Systems_Design: 3rd year college course on FPGA prototyping using Verilog HDL

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3rd year college course on FPGA prototyping using Verilog HDL

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Name		Name	Last commit message	Last commit date
Latest commit History 11 Commits
6bit_Adder		6bit_Adder
D_Flip_Flop		D_Flip_Flop
LFSR		LFSR
Mini_ALU		Mini_ALU
Sequence_Detector		Sequence_Detector

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3rd year college course on FPGA prototyping using Verilog HDL

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