Add option to use regalloc3 as the register allocator

Cargo.toml

@@ -619,3 +619,6 @@ debug = "line-tables-only"
 inherits = "release"
 codegen-units = 1
 lto = true
+
+[patch.crates-io]
+regalloc2 = { git = "https://github.com/Amanieu/regalloc2.git", branch = "regalloc3" }

cranelift/codegen/meta/src/shared/settings.rs

@@ -43,7 +43,7 @@ pub(crate) fn define() -> SettingGroup {
             have adequate support for the kinds of allocations required by exception
             handling (https://github.com/bytecodealliance/regalloc2/issues/217).
         "#,
-        vec!["backtracking"],
+        vec!["backtracking", "regalloc3"],
     );
 
     settings.add_enum(

cranelift/codegen/src/isa/x64/inst/emit.rs

@@ -1984,7 +1984,12 @@ fn emit_return_call_common_sequence<T>(
                  but the current implementation relies on them being present"
     );
 
-    let tmp = call_info.tmp.to_writable_reg();
+    // Hard-coded register which doesn't conflict with function arguments or
+    // callee-saved registers.
+    let tmp = Writable::from_reg(regs::r11());
+    for pair in &call_info.uses {
+        debug_assert_ne!(pair.preg, regs::r11());
+    }
 
     for inst in
         X64ABIMachineSpec::gen_clobber_restore(CallConv::Tail, &info.flags, state.frame_layout())

cranelift/codegen/src/isa/x64/inst/mod.rs

@@ -50,9 +50,6 @@ pub struct ReturnCallInfo<T> {
 
     /// The in-register arguments and their constraints.
     pub uses: CallArgList,
-
-    /// A temporary for use when moving the return address.
-    pub tmp: WritableGpr,
 }
 
 #[test]
@@ -676,11 +673,9 @@ impl PrettyPrint for Inst {
                 let ReturnCallInfo {
                     uses,
                     new_stack_arg_size,
-                    tmp,
                     dest,
                 } = &**info;
-                let tmp = pretty_print_reg(tmp.to_reg().to_reg(), 8);
-                let mut s = format!("return_call_known {dest:?} ({new_stack_arg_size}) tmp={tmp}");
+                let mut s = format!("return_call_known {dest:?} ({new_stack_arg_size})");
                 for ret in uses {
                     let preg = regs::show_reg(ret.preg);
                     let vreg = pretty_print_reg(ret.vreg, 8);
@@ -693,13 +688,10 @@ impl PrettyPrint for Inst {
                 let ReturnCallInfo {
                     uses,
                     new_stack_arg_size,
-                    tmp,
                     dest,
                 } = &**info;
                 let callee = pretty_print_reg(*dest, 8);
-                let tmp = pretty_print_reg(tmp.to_reg().to_reg(), 8);
-                let mut s =
-                    format!("return_call_unknown {callee} ({new_stack_arg_size}) tmp={tmp}");
+                let mut s = format!("return_call_unknown {callee} ({new_stack_arg_size})");
                 for ret in uses {
                     let preg = regs::show_reg(ret.preg);
                     let vreg = pretty_print_reg(ret.vreg, 8);
@@ -1133,10 +1125,7 @@ fn x64_get_operands(inst: &mut Inst, collector: &mut impl OperandVisitor) {
         }
 
         Inst::ReturnCallKnown { info } => {
-            let ReturnCallInfo {
-                dest, uses, tmp, ..
-            } = &mut **info;
-            collector.reg_fixed_def(tmp, regs::r11());
+            let ReturnCallInfo { dest, uses, .. } = &mut **info;
             // Same as in the `Inst::CallKnown` branch.
             debug_assert_ne!(*dest, ExternalName::LibCall(LibCall::Probestack));
             for CallArgPair { vreg, preg } in uses {
@@ -1145,9 +1134,7 @@ fn x64_get_operands(inst: &mut Inst, collector: &mut impl OperandVisitor) {
         }
 
         Inst::ReturnCallUnknown { info } => {
-            let ReturnCallInfo {
-                dest, uses, tmp, ..
-            } = &mut **info;
+            let ReturnCallInfo { dest, uses, .. } = &mut **info;
 
             // TODO(https://github.com/bytecodealliance/regalloc2/issues/145):
             // This shouldn't be a fixed register constraint, but it's not clear how to
@@ -1156,7 +1143,6 @@ fn x64_get_operands(inst: &mut Inst, collector: &mut impl OperandVisitor) {
             // safe to use.
             collector.reg_fixed_use(dest, regs::r10());
 
-            collector.reg_fixed_def(tmp, regs::r11());
             for CallArgPair { vreg, preg } in uses {
                 collector.reg_fixed_use(vreg, *preg);
             }

cranelift/codegen/src/isa/x64/lower/isle.rs

@@ -131,7 +131,6 @@ impl Context for IsleContext<'_, '_, MInst, X64Backend> {
         Box::new(ReturnCallInfo {
             dest,
             uses,
-            tmp: self.lower_ctx.temp_writable_gpr(),
             new_stack_arg_size,
         })
     }
@@ -150,7 +149,6 @@ impl Context for IsleContext<'_, '_, MInst, X64Backend> {
         Box::new(ReturnCallInfo {
             dest,
             uses,
-            tmp: self.lower_ctx.temp_writable_gpr(),
             new_stack_arg_size,
         })
     }

cranelift/codegen/src/machinst/compile.rs

@@ -66,6 +66,7 @@ pub fn compile<B: LowerBackend + TargetIsa>(
 
         options.algorithm = match b.flags().regalloc_algorithm() {
             RegallocAlgorithm::Backtracking => Algorithm::Ion,
+            RegallocAlgorithm::Regalloc3 => Algorithm::Regalloc3,
             // Note: single-pass is currently disabled
             // (https://github.com/bytecodealliance/regalloc2/issues/217).
         };