Development

CMakeLists.txt

@@ -2,6 +2,7 @@
 # VoidFrame CMake Build Script - v0.0.2-development4
 # ============================================================================
 cmake_minimum_required(VERSION 3.30)
+set_property(GLOBAL PROPERTY RULE_MESSAGES OFF)
 project(VoidFrame
         VERSION 0.0.2
         LANGUAGES C CXX ASM_NASM
@@ -18,10 +19,10 @@ include(cache)
 include(features)
 include(variable)
 include(dependencies)
-include(flags)
 include(configuration)
 include(source)
 include(rust_utils)
+include(flags)
 
 # ============================================================================
 # Platform Checks
@@ -87,16 +88,28 @@ set(RUST_ATOMIC_MANIFEST_PATH "${CMAKE_SOURCE_DIR}/kernel/atomic/rust/Cargo.toml
 # ============================================================================
 # Corrosion
 # ============================================================================
+
 add_subdirectory(corrosion)
 corrosion_import_crate(
         MANIFEST_PATH ${RUST_HEAP_MANIFEST_PATH}
         NO_STD
+        ${Corrosion_CARGO_BUILD_FLAGS}
 )
 corrosion_import_crate(
         MANIFEST_PATH ${RUST_ATOMIC_MANIFEST_PATH}
         NO_STD
+        ${Corrosion_CARGO_BUILD_FLAGS}
 )
 
+if (SILENT_BUILD)
+    corrosion_add_target_rustflags(voidframe_mm "-A" "warnings" "-C" "link-arg=-s")
+    corrosion_add_target_rustflags(voidframe_spinlock "-A" "warnings" "-C" "link-arg=-s")
+endif()
+
+# ============================================================================
+# Flags setup
+# ============================================================================
+
 # ============================================================================
 # Kernel Linking
 # ============================================================================

arch/x86_64/asm/pxs.asm

@@ -34,7 +34,7 @@ vbe_tag_end:
     dd 8    ; size
 header_end:
 
-bits 32
+[bits 32]
 
 section .text
 
@@ -187,29 +187,29 @@ start:
 
 
 ; Parse multiboot memory map and find highest available address
-; Returns: highest_phys_addr in [highest_phys_addr_low:highest_phys_addr_high] 
+; Returns: highest_phys_addr in [highest_phys_addr_low:highest_phys_addr_high]
 parse_memory_map:
     pusha
-    
+
     ; Get multiboot info pointer
     mov esi, [multiboot_info]
-    
+
     ; Skip multiboot header (8 bytes: total_size + reserved)
     add esi, 8
-    
+
     ; Initialize highest address to 0
     mov dword [highest_phys_addr_low], 0
     mov dword [highest_phys_addr_high], 0
-    
+
 .find_mmap_tag:
     ; Check if we've reached end tag (type = 0)
     cmp dword [esi], 0
     je .parse_done
-    
+
     ; Check if this is memory map tag (type = 6)
     cmp dword [esi], 6
     je .process_mmap
-    
+
     ; Move to next tag (aligned to 8 bytes)
     mov eax, [esi + 4]      ; Get tag size
     add eax, 7              ; Round up to 8-byte boundary
@@ -223,67 +223,67 @@ parse_memory_map:
     sub ecx, 16             ; Subtract tag header size
     mov edx, [esi + 12]     ; Get entry size
     add esi, 16             ; Skip to first entry
-    
+
 .process_entry:
     cmp ecx, 0
     jle .parse_done
-    
+
     ; Check if this is available memory (type = 1)
     cmp dword [esi + 16], 1
     jne .next_entry
-    
+
     ; Calculate end address (base + length)
     mov eax, [esi]          ; base_addr_low
     mov ebx, [esi + 4]      ; base_addr_high
     add eax, [esi + 8]      ; + length_low
     adc ebx, [esi + 12]     ; + length_high (with carry)
-    
+
     ; Compare with current highest address
     cmp ebx, [highest_phys_addr_high]
     ja .update_highest
     jb .next_entry
-    
+
     ; High parts equal, compare low parts
     cmp eax, [highest_phys_addr_low]
     jbe .next_entry
-    
+
 .update_highest:
     mov [highest_phys_addr_low], eax
     mov [highest_phys_addr_high], ebx
-    
+
 .next_entry:
     add esi, edx            ; Move to next entry
     sub ecx, edx            ; Decrease remaining size
     jmp .process_entry
-    
+
 .parse_done:
     popa
     ret
 
 ; Setup dynamic paging based on detected physical memory
 setup_dynamic_paging:
     pusha
-    
+
     ; Calculate how much memory we need to map (round up to 1GB boundary)
     mov eax, [highest_phys_addr_low]
     mov ebx, [highest_phys_addr_high]
-    
+
     ; For simplicity, cap at 64GB to avoid too many page tables
     cmp ebx, 0x10           ; 64GB = 0x1000000000
     jb .size_ok
     mov ebx, 0x10
     mov eax, 0
-    
+
 .size_ok:
     ; Round up to 1GB boundary (0x40000000)
     add eax, 0x3FFFFFFF
     adc ebx, 0
     and eax, 0xC0000000     ; Clear lower 30 bits
-    
+
     ; Store the total size to map
     mov [memory_to_map_low], eax
     mov [memory_to_map_high], ebx
-    
+
     ; Calculate number of 1GB regions needed
     ; Each PDP entry covers 1GB, so we need (total_size / 1GB) entries
     push edx
@@ -292,76 +292,76 @@ setup_dynamic_paging:
     mov ecx, 0x40000000     ; 1GB
     div ecx                 ; EAX = number of 1GB regions
     pop edx
-    
+
     ; Cap at 512 entries (512GB max)
     cmp eax, 512
     jbe .pdp_entries_ok
     mov eax, 512
-    
+
 .pdp_entries_ok:
     mov [num_pdp_entries], eax
-    
+
     ; Zero out initial page tables
     mov edi, pml4_table
     mov ecx, 4096 * 6       ; Clear PML4, PDP, and 4 initial PD tables
     xor eax, eax
     rep stosb
     debug_print 'Z'         ; Page Tables Zeroed
-    
+
     ; Set CR3 to PML4
     mov eax, pml4_table
     mov cr3, eax
     debug_print '4'         ; CR3 Loaded
-    
+
     ; Setup PML4[0] -> PDP Table
     mov edi, pml4_table
     lea eax, [pdp_table + 3]
     mov [edi], eax
-    
+
     ; Setup PDP entries and corresponding PD tables
     mov edi, pdp_table
     mov esi, pd_table       ; Start with first PD table
     mov ecx, [num_pdp_entries]
-    
+
 .setup_pdp_loop:
     push ecx
-    
+
     ; Link PDP entry to PD table
     lea eax, [esi + 3]      ; PD table address + flags
     mov [edi], eax
-    
+
     ; Fill the PD table with 2MB pages
     push edi
     push esi
     mov edi, esi            ; EDI = current PD table
     mov ebx, 512            ; 512 entries per PD table
-    
+
     ; Calculate starting physical address for this PD table
     mov eax, [num_pdp_entries]
     sub eax, ecx            ; Current PDP index
     push edx
-    mov edx, 0x40000000     ; 1GB per PDP entry  
+    mov edx, 0x40000000     ; 1GB per PDP entry
     mul edx                 ; EAX = starting physical address
     pop edx
     or eax, 0x83            ; Add Present + Writable + Large page flags
-    
+
 .fill_pd_loop:
     mov [edi], eax          ; Store PDE
     add edi, 8              ; Next PDE
     add eax, 0x200000       ; Next 2MB physical address
     dec ebx
     jnz .fill_pd_loop
-    
+
     pop esi
     pop edi
-    
+
     ; Move to next PDP entry and PD table
     add edi, 8              ; Next PDP entry
     add esi, 4096           ; Next PD table
-    
+
     pop ecx
     loop .setup_pdp_loop
-    
+
     popa
     ret
 
@@ -441,9 +441,9 @@ check_and_enable_features:
 .no_cpuid_present:
     ret
 
-bits 64
+[bits 64]
 
-extern KernelMain
+[extern KernelMain]
 
 long_mode:
     debug_print '8' ; Entered 64-bit mode
@@ -463,6 +463,7 @@ long_mode:
     ; RDI is the first argument in the System V AMD64 ABI
     ; RSI is the second argument
     ; Use RDI/RSI directly, as Multiboot2 info pointer can be > 4GB
+    [default rel]
     mov edi, [multiboot_magic] ; EAX holds magic, so EDI will get the 32-bit magic
     mov rsi, [multiboot_info]  ; EBX holds info pointer, but could be 64-bit, so use RSI
 

arch/x86_64/interrupts/Interrupts.asm

@@ -142,75 +142,6 @@ isr%1:
     iretq
 %endmacro
 
-%macro ISR_ERRCODE 1
-section .text
-global isr%1
-isr%1:
-    ; CPU pushes: Error Code, RIP, CS, RFLAGS, RSP, SS
-    ; Push interrupt number
-    push qword %1
-    ; Push general purpose registers
-    push r15
-    push r14
-    push r13
-    push r12
-    push r11
-    push r10
-    push r9
-    push r8
-    push rbp
-    push rsi
-    push rdi
-    push rdx
-    push rcx
-    push rbx
-    push rax
-    ; Push segment registers (in reverse order of struct: gs, fs, es, ds)
-    ; Use general-purpose registers to push/pop segment register values
-    mov rax, gs
-    push rax
-    mov rax, fs
-    push rax
-    mov rax, es
-    push rax
-    mov rax, ds
-    push rax
-
-    ; The pointer to the Registers struct should be RSP
-    mov rdi, rsp
-    call InterruptHandler
-
-    ; Pop segment registers (in order: ds, es, fs, gs)
-    pop rax
-    mov ds, rax
-    pop rax
-    mov es, rax
-    pop rax
-    mov fs, rax
-    pop rax
-    mov gs, rax
-    ; Pop general purpose registers
-    pop rax
-    pop rbx
-    pop rcx
-    pop rdx
-    pop rdi
-    pop rsi
-    pop rbp
-    pop r8
-    pop r9
-    pop r10
-    pop r11
-    pop r12
-    pop r13
-    pop r14
-    pop r15
-
-    ; Pop interrupt number
-    add rsp, 8
-    iretq
-%endmacro
-
 ISR_NOERRCODE 0
 ISR_NOERRCODE 1
 ISR_NOERRCODE 2

cmake/flags.cmake

@@ -5,6 +5,10 @@ set(C_FLAGS " -m64 -target x86_64-unknown-none-elf -O2 -fno-omit-frame-pointer -
 
 if(SILENT_BUILD)
     string(APPEND C_FLAGS " -w")
+    string(APPEND CMAKE_ASM_NASM_FLAGS " -w-all -Wno-all")
+    set(Corrosion_CARGO_BUILD_FLAGS FLAGS "--quiet")
+else()
+    set(Corrosion_CARGO_BUILD_FLAGS "")
 endif()
 
 if(STACK_PROTECTION)