add Pinctl Driver

Documentation/devicetree/bindings/mfd/syscon.yaml

@@ -84,6 +84,8 @@ select:
           - mediatek,mt2701-pctl-a-syscfg
           - mediatek,mt2712-pctl-a-syscfg
           - mediatek,mt6397-pctl-pmic-syscfg
+          - mediatek,mt6589-pctl-a-syscfg
+          - mediatek,mt6589-pctl-b-syscfg
           - mediatek,mt7988-topmisc
           - mediatek,mt8135-pctl-a-syscfg
           - mediatek,mt8135-pctl-b-syscfg
@@ -190,6 +192,8 @@ properties:
           - mediatek,mt2701-pctl-a-syscfg
           - mediatek,mt2712-pctl-a-syscfg
           - mediatek,mt6397-pctl-pmic-syscfg
+          - mediatek,mt6589-pctl-a-syscfg
+          - mediatek,mt6589-pctl-b-syscfg
           - mediatek,mt7988-topmisc
           - mediatek,mt8135-pctl-a-syscfg
           - mediatek,mt8135-pctl-b-syscfg

Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml

@@ -18,6 +18,7 @@ properties:
       - mediatek,mt2701-pinctrl
       - mediatek,mt2712-pinctrl
       - mediatek,mt6397-pinctrl
+      - mediatek,mt6589-pinctrl
       - mediatek,mt7623-pinctrl
       - mediatek,mt8127-pinctrl
       - mediatek,mt8135-pinctrl

arch/arm/boot/dts/mediatek/mt6589.dtsi

@@ -143,6 +143,33 @@
 			#clock-cells = <1>;
 		};
 
+		/*
+		 * EINT registers: 0x1000b000
+		 * GPIO base: 0x10005000, GPIO1 base 0x1020c000
+		 */
+		pio: pinctrl@10005000 {
+			compatible = "mediatek,mt6589-pinctrl";
+			reg = <0 0x1000b000 0 0x1000>;
+			mediatek,pctl-regmap = <&syscfg_pctl_a &syscfg_pctl_b>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
+		syscfg_pctl_a: syscfg_pctl_a@10005000 {
+			compatible = "mediatek,mt6589-pctl-a-syscfg", "syscon";
+			reg = <0 0x10005000 0 0x1000>;
+		};
+
+		syscfg_pctl_b: syscfg_pctl_b@1020c000 {
+			compatible = "mediatek,mt6589-pctl-b-syscfg", "syscon";
+			reg = <0 0x1020c000 0 0x1000>;
+		};
+
 		timer: timer@10008000 {
 			compatible = "mediatek,mt6577-timer";
 			reg = <0x10008000 0x80>;

arch/arm/configs/lenovo-blade_defconfig

@@ -79,7 +79,7 @@ CONFIG_SPI_MT65XX=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_MTK=y
 CONFIG_EINT_MTK=y
-#CONFIG_PINCTRL_MT6589=y # not ported
+CONFIG_PINCTRL_MT6589=y
 
 ## GPIO
 

drivers/pinctrl/mediatek/Kconfig

@@ -97,6 +97,13 @@ config PINCTRL_MT2701
 	default MACH_MT2701
 	select PINCTRL_MTK
 
+config PINCTRL_MT6589
+	bool "MediaTek MT6589 pin control"
+	depends on MACH_MT6589 || COMPILE_TEST
+	depends on OF
+	default MACH_MT6589
+	select PINCTRL_MTK
+
 config PINCTRL_MT7623
 	bool "MediaTek MT7623 pin control with generic binding"
 	depends on MACH_MT7623 || COMPILE_TEST

drivers/pinctrl/mediatek/Makefile

@@ -19,6 +19,7 @@ obj-$(CONFIG_PINCTRL_MT2701)		+= pinctrl-mt2701.o
 obj-$(CONFIG_PINCTRL_MT2712)		+= pinctrl-mt2712.o
 obj-$(CONFIG_PINCTRL_MT8135)		+= pinctrl-mt8135.o
 obj-$(CONFIG_PINCTRL_MT8127)		+= pinctrl-mt8127.o
+obj-$(CONFIG_PINCTRL_MT6589)		+= pinctrl-mt6589.o
 obj-$(CONFIG_PINCTRL_MT6765)		+= pinctrl-mt6765.o
 obj-$(CONFIG_PINCTRL_MT6779)		+= pinctrl-mt6779.o
 obj-$(CONFIG_PINCTRL_MT6795)		+= pinctrl-mt6795.o