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Yuqing li - config regs/baud rate#53

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DevQing66 wants to merge 3 commits intomainfrom
Yuqing-Li-UART
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Yuqing li - config regs/baud rate#53
DevQing66 wants to merge 3 commits intomainfrom
Yuqing-Li-UART

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@DevQing66
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some edit still need to be done.

Implement UART module with AXI-Lite interface and FIFO support.
the code for config register
@Meowcaroni Meowcaroni assigned Doppl-r and unassigned Doppl-r Feb 8, 2026
@Meowcaroni Meowcaroni requested a review from Doppl-r February 8, 2026 18:02
@Meowcaroni
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@DevQing66 Please change the merge's target branch from main to I/O where all I/O sub-group code should go before pushing to main.

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3 participants