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EswarAdithya011/README.md

πŸ‘‹ Hi, my name is Eswar Adithya

Hi there πŸ‘‹, I'm Eswar


"I code until it clicks. Then break it, just to learn more."


πŸ–₯️ Programming Languages

πŸ› οΈ Technical Skills

Digital Circuit Design CMOS Design RTL Coding UVM AMBA AHB APB STA Floorplanning Routing FPGA Arduino ESP8266

🧰 Tools & Platforms

Cadence Virtuoso Cadence NCsim Xilinx Vivado ModelSim Intel Quartus Prime MATLAB VS Code EDAPlayground Microcontrollers


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  1. 100DaysRTLChallenge 100DaysRTLChallenge Public

    This repo contains implementation of digital circuits and some projects related to them in Verilog language at different abstraction levels..

    Verilog