From 6ee04f11253fa074ecdf7cec04796f489b986cbe Mon Sep 17 00:00:00 2001 From: Ivan-Velickovic Date: Mon, 10 Mar 2025 12:57:01 +1100 Subject: [PATCH] platforms.yml: fix RISC-V march I think this is only used for the name of the CI job and nothing else. Now that the kernel defaults to FPU support on for RISC-V, we should probably change all of these to reflect that. Signed-off-by: Ivan-Velickovic --- seL4-platforms/platforms.yml | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/seL4-platforms/platforms.yml b/seL4-platforms/platforms.yml index 645a4c32..d5fb8fec 100644 --- a/seL4-platforms/platforms.yml +++ b/seL4-platforms/platforms.yml @@ -37,7 +37,7 @@ platforms: modes: [64] platform: spike has_simulation: true - march: rv64imac + march: rv64imafdc no_hw_test: true no_hw_build: true @@ -46,7 +46,7 @@ platforms: modes: [64] platform: qemu-riscv-virt has_simulation: true - march: rv64imac + march: rv64imafdc no_hw_test: true no_hw_build: true @@ -65,14 +65,14 @@ platforms: smp: [64] platform: hifive req: [hifive] # , hifive1] - march: rv64imac + march: rv64imafdc POLARFIRE: arch: riscv modes: [64] smp: [64] platform: polarfire - march: rv64imac + march: rv64imafdc no_hw_test: true SABRE: