diff --git a/FreeRTOS-Plus/Demo/AWS/Fleet_Provisioning_Windows_Simulator/CSR_Demo/FleetProvisioningDemoExample.c b/FreeRTOS-Plus/Demo/AWS/Fleet_Provisioning_Windows_Simulator/CSR_Demo/FleetProvisioningDemoExample.c
index c8e75dd0a6c..c796ca6f4c2 100644
--- a/FreeRTOS-Plus/Demo/AWS/Fleet_Provisioning_Windows_Simulator/CSR_Demo/FleetProvisioningDemoExample.c
+++ b/FreeRTOS-Plus/Demo/AWS/Fleet_Provisioning_Windows_Simulator/CSR_Demo/FleetProvisioningDemoExample.c
@@ -606,8 +606,6 @@ int prvFleetProvisioningTask( void * pvParameters )
             {
                 LogError( ( "Failed to generate Key and Certificate Signing Request." ) );
             }
-
-            xPkcs11CloseSession( xP11Session );
         }
 
         /**** Connect to AWS IoT Core with provisioning claim credentials *****/
@@ -825,6 +823,8 @@ int prvFleetProvisioningTask( void * pvParameters )
 
         /**** Retry in case of failure ****************************************/
 
+        xPkcs11CloseSession( xP11Session );
+
         /* Increment the demo run count. */
         ulDemoRunCount++;
 
diff --git a/FreeRTOS-Plus/Demo/AWS/Fleet_Provisioning_Windows_Simulator/CSR_Demo/pkcs11_operations.c b/FreeRTOS-Plus/Demo/AWS/Fleet_Provisioning_Windows_Simulator/CSR_Demo/pkcs11_operations.c
index 4cf1af25f49..fb727a252d4 100644
--- a/FreeRTOS-Plus/Demo/AWS/Fleet_Provisioning_Windows_Simulator/CSR_Demo/pkcs11_operations.c
+++ b/FreeRTOS-Plus/Demo/AWS/Fleet_Provisioning_Windows_Simulator/CSR_Demo/pkcs11_operations.c
@@ -392,11 +392,6 @@ bool xPkcs11CloseSession( CK_SESSION_HANDLE xP11Session )
         xResult = xFunctionList->C_CloseSession( xP11Session );
     }
 
-    if( xResult == CKR_OK )
-    {
-        xResult = xFunctionList->C_Finalize( NULL );
-    }
-
     return( xResult == CKR_OK );
 }
 
diff --git a/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53_bsp/psu_cortexa53_0/libsrc/sdps_v3_4/src/xsdps_options.c b/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53_bsp/psu_cortexa53_0/libsrc/sdps_v3_4/src/xsdps_options.c
index bcd7c689b8b..6478b95aaf1 100644
--- a/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53_bsp/psu_cortexa53_0/libsrc/sdps_v3_4/src/xsdps_options.c
+++ b/FreeRTOS/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53_bsp/psu_cortexa53_0/libsrc/sdps_v3_4/src/xsdps_options.c
@@ -773,7 +773,7 @@ s32 XSdPs_Change_ClkFreq(XSdPs *InstancePtr, u32 SelFreq)
 				XSDPS_CLK_CTRL_OFFSET);
 	while((ReadReg & XSDPS_CC_INT_CLK_STABLE_MASK) == 0U) {
 		ReadReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
-					XSDPS_CLK_CTRL_OFFSET);;
+					XSDPS_CLK_CTRL_OFFSET);
 	}
 
 	/* Enable SD clock */
diff --git a/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/AtmelFiles/utils/lcd_draw.c b/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/AtmelFiles/utils/lcd_draw.c
index 1441a6ae8ba..b588953f1a9 100644
--- a/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/AtmelFiles/utils/lcd_draw.c
+++ b/FreeRTOS/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/AtmelFiles/utils/lcd_draw.c
@@ -591,11 +591,11 @@ void lcdd_draw_string_with_bgcolor(uint32_t x, uint32_t y,
 
 	while (*p_string) {
 		if (*p_string == '\n') {
-			y += height + char_space;;
+			y += height + char_space;
 			x = xorg;
 		} else {
 			lcdd_draw_char_with_bgcolor(x, y, *p_string, fontColor, bgColor);
-			x += width + char_space;;
+			x += width + char_space;
 		}
 		p_string++;
 	}
diff --git a/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/Altera_Code/HardwareLibrary/alt_dma_program.c b/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/Altera_Code/HardwareLibrary/alt_dma_program.c
index 3b4e670b99f..e2bf5b1040e 100644
--- a/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/Altera_Code/HardwareLibrary/alt_dma_program.c
+++ b/FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/Altera_Code/HardwareLibrary/alt_dma_program.c
@@ -741,7 +741,7 @@ ALT_STATUS_CODE alt_dma_program_DMAMOV(ALT_DMA_PROGRAM_t * pgm,
     uint8_t * buffer = pgm->program + pgm->buffer_start + pgm->code_size;
 
     // Assemble DMAMOV
-    buffer[0] = 0xbc;;
+    buffer[0] = 0xbc;
     buffer[1] = rd_mask;
     buffer[2] = (uint8_t)((val >>  0) & 0xff);
     buffer[3] = (uint8_t)((val >>  8) & 0xff);
diff --git a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo_bsp/ps7_cortexa9_0/libsrc/sdps_v3_4/src/xsdps_options.c b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo_bsp/ps7_cortexa9_0/libsrc/sdps_v3_4/src/xsdps_options.c
index bcd7c689b8b..6478b95aaf1 100644
--- a/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo_bsp/ps7_cortexa9_0/libsrc/sdps_v3_4/src/xsdps_options.c
+++ b/FreeRTOS/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo_bsp/ps7_cortexa9_0/libsrc/sdps_v3_4/src/xsdps_options.c
@@ -773,7 +773,7 @@ s32 XSdPs_Change_ClkFreq(XSdPs *InstancePtr, u32 SelFreq)
 				XSDPS_CLK_CTRL_OFFSET);
 	while((ReadReg & XSDPS_CC_INT_CLK_STABLE_MASK) == 0U) {
 		ReadReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
-					XSDPS_CLK_CTRL_OFFSET);;
+					XSDPS_CLK_CTRL_OFFSET);
 	}
 
 	/* Enable SD clock */
diff --git a/FreeRTOS/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/CMSIS/cmsis_iccarm.h b/FreeRTOS/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/CMSIS/cmsis_iccarm.h
index 7b3f7f7681c..d908e7fdac0 100644
--- a/FreeRTOS/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/CMSIS/cmsis_iccarm.h
+++ b/FreeRTOS/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/CMSIS/cmsis_iccarm.h
@@ -182,7 +182,7 @@ __IAR_FT uint16_t __iar_uint16_read(void const *ptr)
 #pragma language=extended
 __IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
 {
-  *(__packed uint16_t*)(ptr) = val;;
+  *(__packed uint16_t*)(ptr) = val;
 }
 #pragma language=restore
 #define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)
@@ -204,7 +204,7 @@ __IAR_FT uint32_t __iar_uint32_read(void const *ptr)
 #pragma language=extended
 __IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
 {
-  *(__packed uint32_t*)(ptr) = val;;
+  *(__packed uint32_t*)(ptr) = val;
 }
 #pragma language=restore
 #define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)
diff --git a/FreeRTOS/Demo/CORTEX_M0+_NUCLEO_L010RB_GCC_IAR/ST_Code/Drivers/CMSIS/Include/cmsis_iccarm.h b/FreeRTOS/Demo/CORTEX_M0+_NUCLEO_L010RB_GCC_IAR/ST_Code/Drivers/CMSIS/Include/cmsis_iccarm.h
index 11c4af0eba7..c68784cbc27 100644
--- a/FreeRTOS/Demo/CORTEX_M0+_NUCLEO_L010RB_GCC_IAR/ST_Code/Drivers/CMSIS/Include/cmsis_iccarm.h
+++ b/FreeRTOS/Demo/CORTEX_M0+_NUCLEO_L010RB_GCC_IAR/ST_Code/Drivers/CMSIS/Include/cmsis_iccarm.h
@@ -182,7 +182,7 @@ __IAR_FT uint16_t __iar_uint16_read(void const *ptr)
 #pragma language=extended
 __IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
 {
-  *(__packed uint16_t*)(ptr) = val;;
+  *(__packed uint16_t*)(ptr) = val;
 }
 #pragma language=restore
 #define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)
@@ -204,7 +204,7 @@ __IAR_FT uint32_t __iar_uint32_read(void const *ptr)
 #pragma language=extended
 __IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
 {
-  *(__packed uint32_t*)(ptr) = val;;
+  *(__packed uint32_t*)(ptr) = val;
 }
 #pragma language=restore
 #define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)
diff --git a/FreeRTOS/Demo/CORTEX_M4_SimpleLink_CC3220SF_CCS/ti/drivers/I2S.h b/FreeRTOS/Demo/CORTEX_M4_SimpleLink_CC3220SF_CCS/ti/drivers/I2S.h
index ebb9727eb8c..98574f930e8 100644
--- a/FreeRTOS/Demo/CORTEX_M4_SimpleLink_CC3220SF_CCS/ti/drivers/I2S.h
+++ b/FreeRTOS/Demo/CORTEX_M4_SimpleLink_CC3220SF_CCS/ti/drivers/I2S.h
@@ -187,7 +187,7 @@
  *
  *  while(1) {
  *      ret = I2S_writeReclaim(handle, &pDesc);
- *      pDesc->bufPtr  = &hello;;
+ *      pDesc->bufPtr  = &hello;
  *      pDesc->bufSize = sizeof(hello);
  *      ret = I2S_writeIssue(handle, pDesc);
  *  }
diff --git a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/libchip_samv7/source/afe_dma.c b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/libchip_samv7/source/afe_dma.c
index 09dda641967..d204459b216 100644
--- a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/libchip_samv7/source/afe_dma.c
+++ b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/libchip_samv7/source/afe_dma.c
@@ -244,5 +244,5 @@ uint32_t Afe_SendData( AfeDma *pAfed, AfeCmd *pCommand)
 	if (XDMAD_StartTransfer( pAfed->pXdmad, afeDmaRxChannel )) 
 		return AFE_ERROR_LOCK;
 
-	return AFE_OK;;
+	return AFE_OK;
 }
diff --git a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/libchip_samv7/source/afec.c b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/libchip_samv7/source/afec.c
index 476793b3190..d605032476c 100644
--- a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/libchip_samv7/source/afec.c
+++ b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/libchip_samv7/source/afec.c
@@ -432,7 +432,7 @@ void AFEC_SetAnalogOffset( Afec *pAFE, uint32_t dwChannel,uint32_t aoffset )
 {
 	assert( dwChannel < 12 ) ;
 	pAFE->AFEC_CSELR = dwChannel;
-	pAFE->AFEC_COCR = (aoffset & AFEC_COCR_AOFF_Msk);;
+	pAFE->AFEC_COCR = (aoffset & AFEC_COCR_AOFF_Msk);
 }
 
 /**
diff --git a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/libchip_samv7/source/dac_dma.c b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/libchip_samv7/source/dac_dma.c
index c664f774616..80f00a6f301 100644
--- a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/libchip_samv7/source/dac_dma.c
+++ b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/libchip_samv7/source/dac_dma.c
@@ -230,5 +230,5 @@ uint32_t Dac_SendData( DacDma *pDacd, DacCmd *pCommand)
 	/* Start DMA TX */
 	if (XDMAD_StartTransfer( pDacd->pXdmad, dacDmaTxChannel )) 
 		return DAC_ERROR_LOCK;
-	return DAC_OK;;
+	return DAC_OK;
 }
diff --git a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/libchip_samv7/source/afe_dma.c b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/libchip_samv7/source/afe_dma.c
index a6638b80ac2..866c9954f10 100644
--- a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/libchip_samv7/source/afe_dma.c
+++ b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/libchip_samv7/source/afe_dma.c
@@ -157,7 +157,7 @@ static uint8_t _Afe_configureLinkList(Afec *pAfeHw, void *pXdmad, AfeCmd *pComma
     xdmadRxCfg.mbr_ubc = XDMA_UBC_NVIEW_NDV0 |
         XDMA_UBC_NDE_FETCH_EN|
         XDMA_UBC_NDEN_UPDATED |
-        pCommand->RxSize;;
+        pCommand->RxSize;
     xdmadRxCfg.mbr_da = (uint32_t)pCommand->pRxBuff;
     xdmadRxCfg.mbr_sa = (uint32_t)&(pAfeHw->AFEC_LCDR);
     xdmadRxCfg.mbr_cfg = XDMAC_CC_TYPE_PER_TRAN |
@@ -253,5 +253,5 @@ uint32_t Afe_SendData( AfeDma *pAfed, AfeCmd *pCommand)
     if (XDMAD_StartTransfer( pAfed->pXdmad, afeDmaRxChannel )) 
         return AFE_ERROR_LOCK;
 
-    return AFE_OK;;
+    return AFE_OK;
 }
diff --git a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/libchip_samv7/source/afec.c b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/libchip_samv7/source/afec.c
index 60318e38dea..1094449da1d 100644
--- a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/libchip_samv7/source/afec.c
+++ b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/libchip_samv7/source/afec.c
@@ -449,7 +449,7 @@ void AFEC_SetAnalogOffset( Afec *pAFE, uint32_t dwChannel,uint32_t aoffset )
 {
     assert( dwChannel < 12 ) ;
     pAFE->AFEC_CSELR = dwChannel;
-    pAFE->AFEC_COCR = (aoffset & AFEC_COCR_AOFF_Msk);;
+    pAFE->AFEC_COCR = (aoffset & AFEC_COCR_AOFF_Msk);
 }
 
 /**
diff --git a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/libchip_samv7/source/dac_dma.c b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/libchip_samv7/source/dac_dma.c
index 05dab14d787..d1a6f8d4dfb 100644
--- a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/libchip_samv7/source/dac_dma.c
+++ b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/libchip_samv7/source/dac_dma.c
@@ -226,7 +226,7 @@ uint32_t Dac_SendData( DacDma *pDacd, DacCmd *pCommand)
     /* Start DMA TX */
     if (XDMAD_StartTransfer( pDacd->pXdmad, dacDmaTxChannel )) 
         return DAC_ERROR_LOCK;
-    return DAC_OK;;
+    return DAC_OK;
 }
 
 
diff --git a/FreeRTOS/Demo/CORTEX_MPS2_QEMU_IAR_GCC/CMSIS/cmsis_iccarm.h b/FreeRTOS/Demo/CORTEX_MPS2_QEMU_IAR_GCC/CMSIS/cmsis_iccarm.h
index 4020ad76e7e..388772bf465 100644
--- a/FreeRTOS/Demo/CORTEX_MPS2_QEMU_IAR_GCC/CMSIS/cmsis_iccarm.h
+++ b/FreeRTOS/Demo/CORTEX_MPS2_QEMU_IAR_GCC/CMSIS/cmsis_iccarm.h
@@ -192,7 +192,7 @@ __IAR_FT uint16_t __iar_uint16_read(void const *ptr)
 #pragma language=extended
 __IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
 {
-  *(__packed uint16_t*)(ptr) = val;;
+  *(__packed uint16_t*)(ptr) = val;
 }
 #pragma language=restore
 #define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)
@@ -214,7 +214,7 @@ __IAR_FT uint32_t __iar_uint32_read(void const *ptr)
 #pragma language=extended
 __IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
 {
-  *(__packed uint32_t*)(ptr) = val;;
+  *(__packed uint32_t*)(ptr) = val;
 }
 #pragma language=restore
 #define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)
diff --git a/FreeRTOS/Demo/CORTEX_MPU_LPC54018_MCUXpresso/NXP_Code/CMSIS/cmsis_iccarm.h b/FreeRTOS/Demo/CORTEX_MPU_LPC54018_MCUXpresso/NXP_Code/CMSIS/cmsis_iccarm.h
index 682849e6103..0295ba3f92d 100644
--- a/FreeRTOS/Demo/CORTEX_MPU_LPC54018_MCUXpresso/NXP_Code/CMSIS/cmsis_iccarm.h
+++ b/FreeRTOS/Demo/CORTEX_MPU_LPC54018_MCUXpresso/NXP_Code/CMSIS/cmsis_iccarm.h
@@ -187,7 +187,7 @@ __IAR_FT uint16_t __iar_uint16_read(void const *ptr)
 #pragma language=extended
 __IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
 {
-  *(__packed uint16_t*)(ptr) = val;;
+  *(__packed uint16_t*)(ptr) = val;
 }
 #pragma language=restore
 #define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)
@@ -209,7 +209,7 @@ __IAR_FT uint32_t __iar_uint32_read(void const *ptr)
 #pragma language=extended
 __IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
 {
-  *(__packed uint32_t*)(ptr) = val;;
+  *(__packed uint32_t*)(ptr) = val;
 }
 #pragma language=restore
 #define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)
diff --git a/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/CMSIS/cmsis_iccarm.h b/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/CMSIS/cmsis_iccarm.h
index 65b824b009c..402ec3dad2d 100644
--- a/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/CMSIS/cmsis_iccarm.h
+++ b/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/CMSIS/cmsis_iccarm.h
@@ -194,7 +194,7 @@ __IAR_FT uint16_t __iar_uint16_read(void const *ptr)
 #pragma language=extended
 __IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
 {
-  *(__packed uint16_t*)(ptr) = val;;
+  *(__packed uint16_t*)(ptr) = val;
 }
 #pragma language=restore
 #define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)
@@ -216,7 +216,7 @@ __IAR_FT uint32_t __iar_uint32_read(void const *ptr)
 #pragma language=extended
 __IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
 {
-  *(__packed uint32_t*)(ptr) = val;;
+  *(__packed uint32_t*)(ptr) = val;
 }
 #pragma language=restore
 #define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)
diff --git a/FreeRTOS/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/ST_Code/Drivers/CMSIS/Include/cmsis_iccarm.h b/FreeRTOS/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/ST_Code/Drivers/CMSIS/Include/cmsis_iccarm.h
index 3c90a2cdc39..77bab254a36 100644
--- a/FreeRTOS/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/ST_Code/Drivers/CMSIS/Include/cmsis_iccarm.h
+++ b/FreeRTOS/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/ST_Code/Drivers/CMSIS/Include/cmsis_iccarm.h
@@ -182,7 +182,7 @@ __IAR_FT uint16_t __iar_uint16_read(void const *ptr)
 #pragma language=extended
 __IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
 {
-  *(__packed uint16_t*)(ptr) = val;;
+  *(__packed uint16_t*)(ptr) = val;
 }
 #pragma language=restore
 #define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)
@@ -204,7 +204,7 @@ __IAR_FT uint32_t __iar_uint32_read(void const *ptr)
 #pragma language=extended
 __IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
 {
-  *(__packed uint32_t*)(ptr) = val;;
+  *(__packed uint32_t*)(ptr) = val;
 }
 #pragma language=restore
 #define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)
diff --git a/FreeRTOS/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/ST_Code/Drivers/CMSIS/Include/cmsis_iccarm.h b/FreeRTOS/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/ST_Code/Drivers/CMSIS/Include/cmsis_iccarm.h
index 11c4af0eba7..c68784cbc27 100644
--- a/FreeRTOS/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/ST_Code/Drivers/CMSIS/Include/cmsis_iccarm.h
+++ b/FreeRTOS/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/ST_Code/Drivers/CMSIS/Include/cmsis_iccarm.h
@@ -182,7 +182,7 @@ __IAR_FT uint16_t __iar_uint16_read(void const *ptr)
 #pragma language=extended
 __IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
 {
-  *(__packed uint16_t*)(ptr) = val;;
+  *(__packed uint16_t*)(ptr) = val;
 }
 #pragma language=restore
 #define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)
@@ -204,7 +204,7 @@ __IAR_FT uint32_t __iar_uint32_read(void const *ptr)
 #pragma language=extended
 __IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
 {
-  *(__packed uint32_t*)(ptr) = val;;
+  *(__packed uint32_t*)(ptr) = val;
 }
 #pragma language=restore
 #define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)
diff --git a/FreeRTOS/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/ST_Code/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cryp.c b/FreeRTOS/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/ST_Code/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cryp.c
index 2d8beb449dc..893746d4e42 100644
--- a/FreeRTOS/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/ST_Code/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cryp.c
+++ b/FreeRTOS/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/ST_Code/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cryp.c
@@ -849,7 +849,7 @@ HAL_StatusTypeDef HAL_CRYP_UnRegisterCallback(CRYP_HandleTypeDef *hcryp, HAL_CRY
   else
   {
     /* Update the error code */
-    hcryp->ErrorCode |= HAL_CRYP_ERROR_INVALID_CALLBACK;;
+    hcryp->ErrorCode |= HAL_CRYP_ERROR_INVALID_CALLBACK;
     /* Return error status */
     status =  HAL_ERROR;
   }
diff --git a/FreeRTOS/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/ST_Code/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth_ex.c b/FreeRTOS/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/ST_Code/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth_ex.c
index 8504f75b150..f9e6cca9899 100644
--- a/FreeRTOS/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/ST_Code/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth_ex.c
+++ b/FreeRTOS/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/ST_Code/Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth_ex.c
@@ -410,7 +410,7 @@ HAL_StatusTypeDef HAL_ETHEx_GetTxVLANConfig(ETH_HandleTypeDef *heth, uint32_t VL
     pVlanConfig->VLANTagControl = READ_BIT(heth->Instance->MACVIR, (ETH_MACVIR_VLP | ETH_MACVIR_VLC));
   }
 
-  return HAL_OK;;
+  return HAL_OK;
 }
 
 /**
diff --git a/FreeRTOS/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/ST_Code/Drivers/CMSIS/Include/cmsis_iccarm.h b/FreeRTOS/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/ST_Code/Drivers/CMSIS/Include/cmsis_iccarm.h
index 3c90a2cdc39..77bab254a36 100644
--- a/FreeRTOS/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/ST_Code/Drivers/CMSIS/Include/cmsis_iccarm.h
+++ b/FreeRTOS/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/ST_Code/Drivers/CMSIS/Include/cmsis_iccarm.h
@@ -182,7 +182,7 @@ __IAR_FT uint16_t __iar_uint16_read(void const *ptr)
 #pragma language=extended
 __IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
 {
-  *(__packed uint16_t*)(ptr) = val;;
+  *(__packed uint16_t*)(ptr) = val;
 }
 #pragma language=restore
 #define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)
@@ -204,7 +204,7 @@ __IAR_FT uint32_t __iar_uint32_read(void const *ptr)
 #pragma language=extended
 __IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
 {
-  *(__packed uint32_t*)(ptr) = val;;
+  *(__packed uint32_t*)(ptr) = val;
 }
 #pragma language=restore
 #define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)
diff --git a/FreeRTOS/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/ST_Code/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c b/FreeRTOS/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/ST_Code/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c
index 5a30708b57f..b4f7bb295be 100644
--- a/FreeRTOS/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/ST_Code/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c
+++ b/FreeRTOS/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/ST_Code/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c
@@ -1249,7 +1249,7 @@ static void FLASH_OB_GetPCROP(uint32_t * PCROPConfig, uint32_t * PCROPStartAddr,
       *PCROPStartAddr = (reg_value << 4) + FLASH_BASE;
 
       reg_value     = (READ_REG(FLASH->PCROP2ER) & FLASH_PCROP2ER_PCROP2_END);
-      *PCROPEndAddr = (reg_value << 4) + FLASH_BASE + 0xFU;;
+      *PCROPEndAddr = (reg_value << 4) + FLASH_BASE + 0xFU;
     }
     else
     {
diff --git a/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/sdps_v3_4/src/xsdps_options.c b/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/sdps_v3_4/src/xsdps_options.c
index bcd7c689b8b..6478b95aaf1 100644
--- a/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/sdps_v3_4/src/xsdps_options.c
+++ b/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/sdps_v3_4/src/xsdps_options.c
@@ -773,7 +773,7 @@ s32 XSdPs_Change_ClkFreq(XSdPs *InstancePtr, u32 SelFreq)
 				XSDPS_CLK_CTRL_OFFSET);
 	while((ReadReg & XSDPS_CC_INT_CLK_STABLE_MASK) == 0U) {
 		ReadReg = XSdPs_ReadReg16(InstancePtr->Config.BaseAddress,
-					XSDPS_CLK_CTRL_OFFSET);;
+					XSDPS_CLK_CTRL_OFFSET);
 	}
 
 	/* Enable SD clock */
diff --git a/FreeRTOS/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/common/rv32m1_sdk_riscv/devices/RV32M1/system_RV32M1_ri5cy.c b/FreeRTOS/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/common/rv32m1_sdk_riscv/devices/RV32M1/system_RV32M1_ri5cy.c
index 87838a8adb0..56808185e69 100644
--- a/FreeRTOS/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/common/rv32m1_sdk_riscv/devices/RV32M1/system_RV32M1_ri5cy.c
+++ b/FreeRTOS/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/common/rv32m1_sdk_riscv/devices/RV32M1/system_RV32M1_ri5cy.c
@@ -547,7 +547,7 @@ uint8_t EVENT_GetIRQPriority(IRQn_Type IRQn)
 
 bool SystemInISR(void)
 {
-    return ((EVENT_UNIT->INTPTENACTIVE) != 0);;
+    return ((EVENT_UNIT->INTPTENACTIVE) != 0);
 }
 
 void EVENT_SystemReset(void)
diff --git a/FreeRTOS/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/common/rv32m1_sdk_riscv/devices/RV32M1/system_RV32M1_zero_riscy.c b/FreeRTOS/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/common/rv32m1_sdk_riscv/devices/RV32M1/system_RV32M1_zero_riscy.c
index 03700975f1e..6175c2d0445 100644
--- a/FreeRTOS/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/common/rv32m1_sdk_riscv/devices/RV32M1/system_RV32M1_zero_riscy.c
+++ b/FreeRTOS/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/common/rv32m1_sdk_riscv/devices/RV32M1/system_RV32M1_zero_riscy.c
@@ -526,7 +526,7 @@ void EVENT_SetIRQPriority(IRQn_Type IRQn, uint8_t intPriority)
 
 bool SystemInISR(void)
 {
-    return ((EVENT_UNIT->INTPTENACTIVE) != 0);;
+    return ((EVENT_UNIT->INTPTENACTIVE) != 0);
 }
 
 void EVENT_SystemReset(void)
diff --git a/FreeRTOS/Demo/Safer_Interrupts_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/CMSIS/cmsis_iccarm.h b/FreeRTOS/Demo/Safer_Interrupts_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/CMSIS/cmsis_iccarm.h
index 12d68fd9a63..2b2e286d1c9 100644
--- a/FreeRTOS/Demo/Safer_Interrupts_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/CMSIS/cmsis_iccarm.h
+++ b/FreeRTOS/Demo/Safer_Interrupts_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/CMSIS/cmsis_iccarm.h
@@ -192,7 +192,7 @@ __IAR_FT uint16_t __iar_uint16_read(void const *ptr)
 #pragma language=extended
 __IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
 {
-  *(__packed uint16_t*)(ptr) = val;;
+  *(__packed uint16_t*)(ptr) = val;
 }
 #pragma language=restore
 #define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)
@@ -214,7 +214,7 @@ __IAR_FT uint32_t __iar_uint32_read(void const *ptr)
 #pragma language=extended
 __IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
 {
-  *(__packed uint32_t*)(ptr) = val;;
+  *(__packed uint32_t*)(ptr) = val;
 }
 #pragma language=restore
 #define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)