From 763f4ae0813cbc50e0cb317ec60e2e3e5b42dadf Mon Sep 17 00:00:00 2001 From: Arya Saraei Date: Wed, 12 Mar 2025 18:11:21 +0100 Subject: [PATCH 1/5] Adding carfields's and cl_dma's regfile documentation md files --- docs/CL_DMA.md | 268 +++++++++++ docs/carfield.md | 1126 ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 1394 insertions(+) create mode 100644 docs/CL_DMA.md create mode 100644 docs/carfield.md diff --git a/docs/CL_DMA.md b/docs/CL_DMA.md new file mode 100644 index 00000000..541f1c7f --- /dev/null +++ b/docs/CL_DMA.md @@ -0,0 +1,268 @@ +## Summary + +| Name | Offset | Length | Description | +|:----------------------------------------|:---------|---------:|:--------------------------------------------------------------------------------------------------------| +| dma.[`INTR_STATE`](#intr_state) | 0x0 | 4 | Interrupt State Register | +| dma.[`INTR_ENABLE`](#intr_enable) | 0x4 | 4 | Interrupt Enable Register | +| dma.[`INTR_TEST`](#intr_test) | 0x8 | 4 | Interrupt Test Register | +| dma.[`ALERT_TEST`](#alert_test) | 0xc | 4 | Alert Test Register | +| dma.[`CMD`](#cmd) | 0x10 | 4 | ? | +| dma.[`TID`](#tid) | 0x14 | 4 | Transfer identifier value bitfield. | +| dma.[`TCDM_ADDR`](#tcdm_addr) | 0x18 | 4 | Transfer L1 base address configuration bitfield. | +| dma.[`EXT_ADDR`](#ext_addr) | 0x1c | 4 | Transfer L2 base address configuration bitfield. | +| dma.[`EXT_COUNT_2D`](#ext_count_2d) | 0x20 | 4 | EXT 2D transfer conut value configuration bitfield. | +| dma.[`EXT_STRIDE_2D`](#ext_stride_2d) | 0x24 | 4 | EXT 2D transfer stride value configuration bitfield. | +| dma.[`TCDM_COUNT_2D`](#tcdm_count_2d) | 0x28 | 4 | TCDM 2D transfer conut value configuration bitfield. | +| dma.[`TCDM_STRIDE_2D`](#tcdm_stride_2d) | 0x2c | 4 | TCDM 2D transfer stride value configuration bitfield. | +| dma.[`STATUS`](#status) | 0x30 | 4 | ? | +| dma.[`TID_FREE`](#tid_free) | 0x34 | 4 | Transfer canceller configuration bitfield. Writing a 1'b1 in TID_FREE[i] will free transfer with TID i. | + +## INTR_STATE +Interrupt State Register +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "dma_done", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "dma_chunk_done", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "dma_error", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 160}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:--------------------------------------------------------------------------| +| 31:3 | | | | Reserved | +| 2 | ro | 0x0 | dma_error | DMA error has occurred. DMA_STATUS.error_code register shows the details. | +| 1 | ro | 0x0 | dma_chunk_done | Indicates the transfer of a single chunk has been completed. | +| 0 | ro | 0x0 | dma_done | DMA operation has been completed. | + +## INTR_ENABLE +Interrupt Enable Register +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "dma_done", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "dma_chunk_done", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "dma_error", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 160}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:-------------------------------------------------------------------------| +| 31:3 | | | | Reserved | +| 2 | rw | 0x0 | dma_error | Enable interrupt when [`INTR_STATE.dma_error`](#intr_state) is set. | +| 1 | rw | 0x0 | dma_chunk_done | Enable interrupt when [`INTR_STATE.dma_chunk_done`](#intr_state) is set. | +| 0 | rw | 0x0 | dma_done | Enable interrupt when [`INTR_STATE.dma_done`](#intr_state) is set. | + +## INTR_TEST +Interrupt Test Register +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "dma_done", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "dma_chunk_done", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "dma_error", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 160}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:------------------------------------------------------------------| +| 31:3 | | | | Reserved | +| 2 | wo | 0x0 | dma_error | Write 1 to force [`INTR_STATE.dma_error`](#intr_state) to 1. | +| 1 | wo | 0x0 | dma_chunk_done | Write 1 to force [`INTR_STATE.dma_chunk_done`](#intr_state) to 1. | +| 0 | wo | 0x0 | dma_done | Write 1 to force [`INTR_STATE.dma_done`](#intr_state) to 1. | + +## ALERT_TEST +Alert Test Register +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "fatal_fault", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:-------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | fatal_fault | Write 1 to trigger one alert event of this kind. | + +## CMD +? +? +? +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "LEN", "bits": 17, "attr": ["wo"], "rotate": 0}, {"name": "TYPE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "INC", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "EXT_2D", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "ELE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "ILE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "BLE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "TCDM_2D", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:24 | | | | Reserved | +| 23 | wo | 0x0 | TCDM_2D | Transfer type configuration bitfield: -1'b0: linear transfer in TCDM interface -1'b1: 2D transfer in TCDM interface | +| 22 | wo | 0x0 | BLE | Transfer event or interrupt broadcast configuration bitfield: 1'b0: event or interrupt is routed to the cluster core who initiated the transfer. 1'b1: event or interrupt are broadcasted to all cluster cores. | +| 21 | wo | 0x0 | ILE | Transfer interrupt generation configuration bitfield: -1'b0: disabled. -1'b1: enabled. | +| 20 | wo | 0x0 | ELE | Transfer event generation configuration bitfield: -1'b0: disabled. -1'b1: enabled. | +| 19 | wo | 0x0 | EXT_2D | Transfer type configuration bitfield: -1'b0: linear transfer in EXT interface. -1'b1: 2D transfer in EXT interface. | +| 18 | wo | 0x0 | INC | Transfer incremental configuration bitfield: -1'b0: non incremental. -1'b1: incremental. | +| 17 | wo | 0x0 | TYPE | Transfer direction configuration bitfield: -1'b0: L1 to L2 -1'b1: L2 to L1 | +| 16:0 | wo | 0x0 | LEN | Transfer length in bytes configuration bitfield. | + +## TID +Transfer identifier value bitfield. +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0xf` + +### Fields + +```wavejson +{"reg": [{"name": "get_tid", "bits": 4, "attr": ["ro"], "rotate": -90}, {"bits": 28}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:------------------------------------| +| 31:4 | | | | Reserved | +| 3:0 | ro | 0x0 | get_tid | Transfer identifier value bitfield. | + +## TCDM_ADDR +Transfer L1 base address configuration bitfield. +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "tcdm_addr", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-------------------------------------------------| +| 31:0 | wo | 0x0 | tcdm_addr | Transfer L1 base address configuration bitfield. | + +## EXT_ADDR +Transfer L2 base address configuration bitfield. +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "ext_addr", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:-------------------------------------------------| +| 31:0 | wo | 0x0 | ext_addr | Transfer L2 base address configuration bitfield. | + +## EXT_COUNT_2D +EXT 2D transfer conut value configuration bitfield. +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "ext_count_2D", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:----------------------------------------------------| +| 31:0 | wo | 0x0 | ext_count_2D | EXT 2D transfer conut value configuration bitfield. | + +## EXT_STRIDE_2D +EXT 2D transfer stride value configuration bitfield. +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "ext_stride_2D", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:-----------------------------------------------------| +| 31:0 | wo | 0x0 | ext_stride_2D | EXT 2D transfer stride value configuration bitfield. | + +## TCDM_COUNT_2D +TCDM 2D transfer conut value configuration bitfield. +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "tcdm_count_2D", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:-----------------------------------------------------| +| 31:0 | wo | 0x0 | tcdm_count_2D | TCDM 2D transfer conut value configuration bitfield. | + +## TCDM_STRIDE_2D +TCDM 2D transfer stride value configuration bitfield. +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "tcdm_stride_2D", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:------------------------------------------------------| +| 31:0 | wo | 0x0 | tcdm_stride_2D | TCDM 2D transfer stride value configuration bitfield. | + +## STATUS +? +? +? +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "TID_TR", "bits": 16, "attr": ["ro"], "rotate": 0}, {"name": "TID_ALLOC", "bits": 16, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:--------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:16 | ro | 0x0 | TID_ALLOC | Transfer status bitfield: - TID_TR[i]=1'b0 means that transfer allocator with TID i-16 is free. - TID_TR[i]=1'b1 means that transfer allocator with TID i-16 is reserved. | +| 15:0 | ro | 0x0 | TID_TR | Transfer status bitfield: TID_TR[i]=1'b1 means that transfer with TID i is active. | + +## TID_FREE +Transfer canceller configuration bitfield. Writing a 1'b1 in TID_FREE[i] will free transfer with TID i. +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "tid_free", "bits": 16, "attr": ["wo"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------------------------------------------------------------------------------------------------| +| 31:16 | | | | Reserved | +| 15:0 | wo | 0x0 | tid_free | Transfer canceller configuration bitfield. Writing a 1'b1 in TID_FREE[i] will free transfer with TID i. | + diff --git a/docs/carfield.md b/docs/carfield.md new file mode 100644 index 00000000..d4e1fa9e --- /dev/null +++ b/docs/carfield.md @@ -0,0 +1,1126 @@ +## Summary + +| Name | Offset | Length | Description | +|:-----------------------------------------------------------------------------|:---------|---------:|:-----------------------------------------------------------------------| +| carfield.[`VERSION0`](#version0) | 0x0 | 4 | Cheshire sha256 commit | +| carfield.[`VERSION1`](#version1) | 0x4 | 4 | Safety Island sha256 commit | +| carfield.[`VERSION2`](#version2) | 0x8 | 4 | Security Island sha256 commit | +| carfield.[`VERSION3`](#version3) | 0xc | 4 | PULP Cluster sha256 commit | +| carfield.[`VERSION4`](#version4) | 0x10 | 4 | Spatz CLuster sha256 commit | +| carfield.[`JEDEC_IDCODE`](#jedec_idcode) | 0x14 | 4 | JEDEC ID CODE -TODO assign- | +| carfield.[`GENERIC_SCRATCH0`](#generic_scratch0) | 0x18 | 4 | Scratch | +| carfield.[`GENERIC_SCRATCH1`](#generic_scratch1) | 0x1c | 4 | Scratch | +| carfield.[`HOST_RST`](#host_rst) | 0x20 | 4 | Host Domain reset -active high, inverted in HW- | +| carfield.[`PERIPH_RST`](#periph_rst) | 0x24 | 4 | Periph Domain reset -active high, inverted in HW- | +| carfield.[`SAFETY_ISLAND_RST`](#safety_island_rst) | 0x28 | 4 | Safety Island reset -active high, inverted in HW- | +| carfield.[`SECURITY_ISLAND_RST`](#security_island_rst) | 0x2c | 4 | Security Island reset -active high, inverted in HW- | +| carfield.[`PULP_CLUSTER_RST`](#pulp_cluster_rst) | 0x30 | 4 | PULP Cluster reset -active high, inverted in HW- | +| carfield.[`SPATZ_CLUSTER_RST`](#spatz_cluster_rst) | 0x34 | 4 | Spatz Cluster reset -active high, inverted in HW- | +| carfield.[`L2_RST`](#l2_rst) | 0x38 | 4 | L2 reset -active high, inverted in HW- | +| carfield.[`PERIPH_ISOLATE`](#periph_isolate) | 0x3c | 4 | Periph Domain AXI isolate | +| carfield.[`SAFETY_ISLAND_ISOLATE`](#safety_island_isolate) | 0x40 | 4 | Safety Island AXI isolate | +| carfield.[`SECURITY_ISLAND_ISOLATE`](#security_island_isolate) | 0x44 | 4 | Security Island AXI isolate | +| carfield.[`PULP_CLUSTER_ISOLATE`](#pulp_cluster_isolate) | 0x48 | 4 | PULP Cluster AXI isolate | +| carfield.[`SPATZ_CLUSTER_ISOLATE`](#spatz_cluster_isolate) | 0x4c | 4 | Spatz Cluster AXI isolate | +| carfield.[`L2_ISOLATE`](#l2_isolate) | 0x50 | 4 | L2 AXI isolate | +| carfield.[`PERIPH_ISOLATE_STATUS`](#periph_isolate_status) | 0x54 | 4 | Periph Domain AXI isolate status | +| carfield.[`SAFETY_ISLAND_ISOLATE_STATUS`](#safety_island_isolate_status) | 0x58 | 4 | Safety Island AXI isolate status | +| carfield.[`SECURITY_ISLAND_ISOLATE_STATUS`](#security_island_isolate_status) | 0x5c | 4 | Security Island AXI isolate status | +| carfield.[`PULP_CLUSTER_ISOLATE_STATUS`](#pulp_cluster_isolate_status) | 0x60 | 4 | PULP Cluster AXI isolate status | +| carfield.[`SPATZ_CLUSTER_ISOLATE_STATUS`](#spatz_cluster_isolate_status) | 0x64 | 4 | Spatz Cluster AXI isolate status | +| carfield.[`L2_ISOLATE_STATUS`](#l2_isolate_status) | 0x68 | 4 | L2 AXI isolate status | +| carfield.[`PERIPH_CLK_EN`](#periph_clk_en) | 0x6c | 4 | Periph Domain clk gate enable | +| carfield.[`SAFETY_ISLAND_CLK_EN`](#safety_island_clk_en) | 0x70 | 4 | Safety Island clk gate enable | +| carfield.[`SECURITY_ISLAND_CLK_EN`](#security_island_clk_en) | 0x74 | 4 | Security Island clk gate enable | +| carfield.[`PULP_CLUSTER_CLK_EN`](#pulp_cluster_clk_en) | 0x78 | 4 | PULP Cluster clk gate enable | +| carfield.[`SPATZ_CLUSTER_CLK_EN`](#spatz_cluster_clk_en) | 0x7c | 4 | Spatz Cluster clk gate enable | +| carfield.[`L2_CLK_EN`](#l2_clk_en) | 0x80 | 4 | Shared L2 memory clk gate enable | +| carfield.[`PERIPH_CLK_SEL`](#periph_clk_sel) | 0x84 | 4 | Periph Domain pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`SAFETY_ISLAND_CLK_SEL`](#safety_island_clk_sel) | 0x88 | 4 | Safety Island pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`SECURITY_ISLAND_CLK_SEL`](#security_island_clk_sel) | 0x8c | 4 | Security Island pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`PULP_CLUSTER_CLK_SEL`](#pulp_cluster_clk_sel) | 0x90 | 4 | PULP Cluster pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`SPATZ_CLUSTER_CLK_SEL`](#spatz_cluster_clk_sel) | 0x94 | 4 | Spatz Cluster pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`L2_CLK_SEL`](#l2_clk_sel) | 0x98 | 4 | L2 Memory pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`PERIPH_CLK_DIV_VALUE`](#periph_clk_div_value) | 0x9c | 4 | Periph Domain clk divider value | +| carfield.[`SAFETY_ISLAND_CLK_DIV_VALUE`](#safety_island_clk_div_value) | 0xa0 | 4 | Safety Island clk divider value | +| carfield.[`SECURITY_ISLAND_CLK_DIV_VALUE`](#security_island_clk_div_value) | 0xa4 | 4 | Security Island clk divider value | +| carfield.[`PULP_CLUSTER_CLK_DIV_VALUE`](#pulp_cluster_clk_div_value) | 0xa8 | 4 | PULP Cluster clk divider value | +| carfield.[`SPATZ_CLUSTER_CLK_DIV_VALUE`](#spatz_cluster_clk_div_value) | 0xac | 4 | Spatz Cluster clk divider value | +| carfield.[`L2_CLK_DIV_VALUE`](#l2_clk_div_value) | 0xb0 | 4 | L2 Memory clk divider value | +| carfield.[`HOST_FETCH_ENABLE`](#host_fetch_enable) | 0xb4 | 4 | Host Domain fetch enable | +| carfield.[`SAFETY_ISLAND_FETCH_ENABLE`](#safety_island_fetch_enable) | 0xb8 | 4 | Safety Island fetch enable | +| carfield.[`SECURITY_ISLAND_FETCH_ENABLE`](#security_island_fetch_enable) | 0xbc | 4 | Security Island fetch enable | +| carfield.[`PULP_CLUSTER_FETCH_ENABLE`](#pulp_cluster_fetch_enable) | 0xc0 | 4 | PULP Cluster fetch enable | +| carfield.[`SPATZ_CLUSTER_DEBUG_REQ`](#spatz_cluster_debug_req) | 0xc4 | 4 | Spatz Cluster debug req | +| carfield.[`HOST_BOOT_ADDR`](#host_boot_addr) | 0xc8 | 4 | Host boot address | +| carfield.[`SAFETY_ISLAND_BOOT_ADDR`](#safety_island_boot_addr) | 0xcc | 4 | Safety Island boot address | +| carfield.[`SECURITY_ISLAND_BOOT_ADDR`](#security_island_boot_addr) | 0xd0 | 4 | Security Island boot address | +| carfield.[`PULP_CLUSTER_BOOT_ADDR`](#pulp_cluster_boot_addr) | 0xd4 | 4 | PULP Cluster boot address | +| carfield.[`SPATZ_CLUSTER_BOOT_ADDR`](#spatz_cluster_boot_addr) | 0xd8 | 4 | Spatz Cluster boot address | +| carfield.[`PULP_CLUSTER_BOOT_ENABLE`](#pulp_cluster_boot_enable) | 0xdc | 4 | PULP Cluster boot enable | +| carfield.[`SPATZ_CLUSTER_BUSY`](#spatz_cluster_busy) | 0xe0 | 4 | Spatz Cluster busy | +| carfield.[`PULP_CLUSTER_BUSY`](#pulp_cluster_busy) | 0xe4 | 4 | PULP Cluster busy | +| carfield.[`PULP_CLUSTER_EOC`](#pulp_cluster_eoc) | 0xe8 | 4 | PULP Cluster end of computation | +| carfield.[`ETH_RGMII_PHY_CLK_DIV_EN`](#eth_rgmii_phy_clk_div_en) | 0xec | 4 | Ethernet RGMII PHY clock divider enable bit | +| carfield.[`ETH_RGMII_PHY_CLK_DIV_VALUE`](#eth_rgmii_phy_clk_div_value) | 0xf0 | 4 | Ethernet RGMII PHY clock divider value | +| carfield.[`ETH_MDIO_CLK_DIV_EN`](#eth_mdio_clk_div_en) | 0xf4 | 4 | Ethernet MDIO clock divider enable bit | +| carfield.[`ETH_MDIO_CLK_DIV_VALUE`](#eth_mdio_clk_div_value) | 0xf8 | 4 | Ethernet MDIO clock divider value | + +## VERSION0 +Cheshire sha256 commit +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VERSION0", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:0 | ro | 0x0 | VERSION0 | | + +## VERSION1 +Safety Island sha256 commit +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VERSION1", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:0 | ro | 0x0 | VERSION1 | | + +## VERSION2 +Security Island sha256 commit +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VERSION2", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:0 | ro | 0x0 | VERSION2 | | + +## VERSION3 +PULP Cluster sha256 commit +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VERSION3", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:0 | ro | 0x0 | VERSION3 | | + +## VERSION4 +Spatz CLuster sha256 commit +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VERSION4", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:0 | ro | 0x0 | VERSION4 | | + +## JEDEC_IDCODE +JEDEC ID CODE -TODO assign- +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "JEDEC_IDCODE", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:--------------| +| 31:0 | rw | 0x0 | JEDEC_IDCODE | | + +## GENERIC_SCRATCH0 +Scratch +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "GENERIC_SCRATCH0", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:0 | rw | 0x0 | GENERIC_SCRATCH0 | | + +## GENERIC_SCRATCH1 +Scratch +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "GENERIC_SCRATCH1", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:0 | rw | 0x0 | GENERIC_SCRATCH1 | | + +## HOST_RST +Host Domain reset -active high, inverted in HW- +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "HOST_RST", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 100}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | HOST_RST | | + +## PERIPH_RST +Periph Domain reset -active high, inverted in HW- +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PERIPH_RST | | + +## SAFETY_ISLAND_RST +Safety Island reset -active high, inverted in HW- +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SAFETY_ISLAND_RST | | + +## SECURITY_ISLAND_RST +Security Island reset -active high, inverted in HW- +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 210}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SECURITY_ISLAND_RST | | + +## PULP_CLUSTER_RST +PULP Cluster reset -active high, inverted in HW- +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PULP_CLUSTER_RST | | + +## SPATZ_CLUSTER_RST +Spatz Cluster reset -active high, inverted in HW- +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SPATZ_CLUSTER_RST | | + +## L2_RST +L2 reset -active high, inverted in HW- +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "L2_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | L2_RST | | + +## PERIPH_ISOLATE +Periph Domain AXI isolate +- Offset: `0x3c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 160}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PERIPH_ISOLATE | | + +## SAFETY_ISLAND_ISOLATE +Safety Island AXI isolate +- Offset: `0x40` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | SAFETY_ISLAND_ISOLATE | | + +## SECURITY_ISLAND_ISOLATE +Security Island AXI isolate +- Offset: `0x44` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 250}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | SECURITY_ISLAND_ISOLATE | | + +## PULP_CLUSTER_ISOLATE +PULP Cluster AXI isolate +- Offset: `0x48` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 220}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | PULP_CLUSTER_ISOLATE | | + +## SPATZ_CLUSTER_ISOLATE +Spatz Cluster AXI isolate +- Offset: `0x4c` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | SPATZ_CLUSTER_ISOLATE | | + +## L2_ISOLATE +L2 AXI isolate +- Offset: `0x50` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "L2_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | L2_ISOLATE | | + +## PERIPH_ISOLATE_STATUS +Periph Domain AXI isolate status +- Offset: `0x54` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PERIPH_ISOLATE_STATUS | | + +## SAFETY_ISLAND_ISOLATE_STATUS +Safety Island AXI isolate status +- Offset: `0x58` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 300}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SAFETY_ISLAND_ISOLATE_STATUS | | + +## SECURITY_ISLAND_ISOLATE_STATUS +Security Island AXI isolate status +- Offset: `0x5c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 320}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SECURITY_ISLAND_ISOLATE_STATUS | | + +## PULP_CLUSTER_ISOLATE_STATUS +PULP Cluster AXI isolate status +- Offset: `0x60` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 290}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PULP_CLUSTER_ISOLATE_STATUS | | + +## SPATZ_CLUSTER_ISOLATE_STATUS +Spatz Cluster AXI isolate status +- Offset: `0x64` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 300}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SPATZ_CLUSTER_ISOLATE_STATUS | | + +## L2_ISOLATE_STATUS +L2 AXI isolate status +- Offset: `0x68` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "L2_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | L2_ISOLATE_STATUS | | + +## PERIPH_CLK_EN +Periph Domain clk gate enable +- Offset: `0x6c` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 150}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | PERIPH_CLK_EN | | + +## SAFETY_ISLAND_CLK_EN +Safety Island clk gate enable +- Offset: `0x70` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 220}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SAFETY_ISLAND_CLK_EN | | + +## SECURITY_ISLAND_CLK_EN +Security Island clk gate enable +- Offset: `0x74` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 240}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SECURITY_ISLAND_CLK_EN | | + +## PULP_CLUSTER_CLK_EN +PULP Cluster clk gate enable +- Offset: `0x78` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 210}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PULP_CLUSTER_CLK_EN | | + +## SPATZ_CLUSTER_CLK_EN +Spatz Cluster clk gate enable +- Offset: `0x7c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 220}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SPATZ_CLUSTER_CLK_EN | | + +## L2_CLK_EN +Shared L2 memory clk gate enable +- Offset: `0x80` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "L2_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | L2_CLK_EN | | + +## PERIPH_CLK_SEL +Periph Domain pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x84` +- Reset default: `0x2` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 160}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x2 | PERIPH_CLK_SEL | | + +## SAFETY_ISLAND_CLK_SEL +Safety Island pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x88` +- Reset default: `0x1` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x1 | SAFETY_ISLAND_CLK_SEL | | + +## SECURITY_ISLAND_CLK_SEL +Security Island pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x8c` +- Reset default: `0x1` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 250}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x1 | SECURITY_ISLAND_CLK_SEL | | + +## PULP_CLUSTER_CLK_SEL +PULP Cluster pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x90` +- Reset default: `0x1` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 220}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x1 | PULP_CLUSTER_CLK_SEL | | + +## SPATZ_CLUSTER_CLK_SEL +Spatz Cluster pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x94` +- Reset default: `0x1` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x1 | SPATZ_CLUSTER_CLK_SEL | | + +## L2_CLK_SEL +L2 Memory pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x98` +- Reset default: `0x1` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "L2_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x1 | L2_CLK_SEL | | + +## PERIPH_CLK_DIV_VALUE +Periph Domain clk divider value +- Offset: `0x9c` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | PERIPH_CLK_DIV_VALUE | | + +## SAFETY_ISLAND_CLK_DIV_VALUE +Safety Island clk divider value +- Offset: `0xa0` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | SAFETY_ISLAND_CLK_DIV_VALUE | | + +## SECURITY_ISLAND_CLK_DIV_VALUE +Security Island clk divider value +- Offset: `0xa4` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | SECURITY_ISLAND_CLK_DIV_VALUE | | + +## PULP_CLUSTER_CLK_DIV_VALUE +PULP Cluster clk divider value +- Offset: `0xa8` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | PULP_CLUSTER_CLK_DIV_VALUE | | + +## SPATZ_CLUSTER_CLK_DIV_VALUE +Spatz Cluster clk divider value +- Offset: `0xac` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | SPATZ_CLUSTER_CLK_DIV_VALUE | | + +## L2_CLK_DIV_VALUE +L2 Memory clk divider value +- Offset: `0xb0` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "L2_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | L2_CLK_DIV_VALUE | | + +## HOST_FETCH_ENABLE +Host Domain fetch enable +- Offset: `0xb4` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "HOST_FETCH_ENABLE", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | HOST_FETCH_ENABLE | | + +## SAFETY_ISLAND_FETCH_ENABLE +Safety Island fetch enable +- Offset: `0xb8` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_FETCH_ENABLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 280}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SAFETY_ISLAND_FETCH_ENABLE | | + +## SECURITY_ISLAND_FETCH_ENABLE +Security Island fetch enable +- Offset: `0xbc` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_FETCH_ENABLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 300}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SECURITY_ISLAND_FETCH_ENABLE | | + +## PULP_CLUSTER_FETCH_ENABLE +PULP Cluster fetch enable +- Offset: `0xc0` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_FETCH_ENABLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 270}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PULP_CLUSTER_FETCH_ENABLE | | + +## SPATZ_CLUSTER_DEBUG_REQ +Spatz Cluster debug req +- Offset: `0xc4` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_DEBUG_REQ", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 250}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x0 | SPATZ_CLUSTER_DEBUG_REQ | | + +## HOST_BOOT_ADDR +Host boot address +- Offset: `0xc8` +- Reset default: `0x1000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "HOST_BOOT_ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:--------------| +| 31:0 | rw | 0x1000 | HOST_BOOT_ADDR | | + +## SAFETY_ISLAND_BOOT_ADDR +Safety Island boot address +- Offset: `0xcc` +- Reset default: `0x70000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_BOOT_ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:------------------------|:--------------| +| 31:0 | rw | 0x70000000 | SAFETY_ISLAND_BOOT_ADDR | | + +## SECURITY_ISLAND_BOOT_ADDR +Security Island boot address +- Offset: `0xd0` +- Reset default: `0x70000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_BOOT_ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:--------------------------|:--------------| +| 31:0 | rw | 0x70000000 | SECURITY_ISLAND_BOOT_ADDR | | + +## PULP_CLUSTER_BOOT_ADDR +PULP Cluster boot address +- Offset: `0xd4` +- Reset default: `0x70000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_BOOT_ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:-----------------------|:--------------| +| 31:0 | rw | 0x70000000 | PULP_CLUSTER_BOOT_ADDR | | + +## SPATZ_CLUSTER_BOOT_ADDR +Spatz Cluster boot address +- Offset: `0xd8` +- Reset default: `0x70000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_BOOT_ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:------------------------|:--------------| +| 31:0 | rw | 0x70000000 | SPATZ_CLUSTER_BOOT_ADDR | | + +## PULP_CLUSTER_BOOT_ENABLE +PULP Cluster boot enable +- Offset: `0xdc` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_BOOT_ENABLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 260}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PULP_CLUSTER_BOOT_ENABLE | | + +## SPATZ_CLUSTER_BUSY +Spatz Cluster busy +- Offset: `0xe0` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_BUSY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 200}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | SPATZ_CLUSTER_BUSY | | + +## PULP_CLUSTER_BUSY +PULP Cluster busy +- Offset: `0xe4` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_BUSY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | PULP_CLUSTER_BUSY | | + +## PULP_CLUSTER_EOC +PULP Cluster end of computation +- Offset: `0xe8` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_EOC", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | PULP_CLUSTER_EOC | | + +## ETH_RGMII_PHY_CLK_DIV_EN +Ethernet RGMII PHY clock divider enable bit +- Offset: `0xec` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "ETH_RGMII_PHY_CLK_DIV_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 260}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | ETH_RGMII_PHY_CLK_DIV_EN | | + +## ETH_RGMII_PHY_CLK_DIV_VALUE +Ethernet RGMII PHY clock divider value +- Offset: `0xf0` +- Reset default: `0x64` +- Reset mask: `0xfffff` + +### Fields + +```wavejson +{"reg": [{"name": "ETH_RGMII_PHY_CLK_DIV_VALUE", "bits": 20, "attr": ["rw"], "rotate": 0}, {"bits": 12}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------------|:--------------| +| 31:20 | | | | Reserved | +| 19:0 | rw | 0x64 | ETH_RGMII_PHY_CLK_DIV_VALUE | | + +## ETH_MDIO_CLK_DIV_EN +Ethernet MDIO clock divider enable bit +- Offset: `0xf4` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "ETH_MDIO_CLK_DIV_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 210}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | ETH_MDIO_CLK_DIV_EN | | + +## ETH_MDIO_CLK_DIV_VALUE +Ethernet MDIO clock divider value +- Offset: `0xf8` +- Reset default: `0x64` +- Reset mask: `0xfffff` + +### Fields + +```wavejson +{"reg": [{"name": "ETH_MDIO_CLK_DIV_VALUE", "bits": 20, "attr": ["rw"], "rotate": 0}, {"bits": 12}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------|:--------------| +| 31:20 | | | | Reserved | +| 19:0 | rw | 0x64 | ETH_MDIO_CLK_DIV_VALUE | | + From 0b1b2cb0a7f917d5575a7d0961492ce6c152f9e0 Mon Sep 17 00:00:00 2001 From: Arya Saraei Date: Wed, 12 Mar 2025 18:36:53 +0100 Subject: [PATCH 2/5] Adding .hjson files of cl_dma and carfield's regfile --- hw/regs/CL_DMA/CL_DMA.hjson | 327 +++++++++++++++ hw/regs/carfield_regs_Doc.hjson | 713 ++++++++++++++++++++++++++++++++ 2 files changed, 1040 insertions(+) create mode 100644 hw/regs/CL_DMA/CL_DMA.hjson create mode 100644 hw/regs/carfield_regs_Doc.hjson diff --git a/hw/regs/CL_DMA/CL_DMA.hjson b/hw/regs/CL_DMA/CL_DMA.hjson new file mode 100644 index 00000000..4777ef75 --- /dev/null +++ b/hw/regs/CL_DMA/CL_DMA.hjson @@ -0,0 +1,327 @@ +// Copyright lowRISC contributors (OpenTitan project). +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 +// +# DMA register template +{ + name: "dma" + human_name: "DMA Controller" + one_line_desc: "DMA Controller for the integrated OpenTitan." + one_paragraph_desc: ''' + Cluster DMA component manages the following features: + - parametric number of RX/TX full-duplex channels + - Up to 16 outstanding transfers between L1 and L2 memories + - Linear or 2D transfers modes on both TCDM or EXT (L2) sides + ''' + cip_id: "36", + design_spec: "../doc" + dv_doc: "../doc/dv" + version: "1.0.0" + + clocking: [{clock: "clk_i", reset: "rst_ni", primary: true}] + scan: "true" // Enable `scanmode_i` port + bus_interfaces: [ + { protocol: "tlul", direction: "device", hier_path: "u_dma_reg" } + { protocol: "tlul", direction: "host", name: "host" } + ] + param_list: [ + { name: "NumIntClearSources", + desc: "Number of interrupt clearing sources to process", + type: "int", + default: "11", + local: "true" + }, + { name: "EnableDataIntgGen", + desc: "Compute integrity bits for A channel data on all TL-UL host ports", + type: "bit", + default: "1'b1", + local: "false", + expose: "true", + }, + { name: "EnableRspDataIntgCheck", + desc: "Enable integrity checks on the response TL-UL D channel", + type: "bit", + default: "1'b1", + local: "false", + expose: "true", + }, + { name: "TlUserRsvd", + desc: "Value of `rsvd` field in A channel of all TL-UL host ports", + type: "logic [tlul_pkg::RsvdWidth-1:0]" + default: "'0", + local: "false", + expose: "true", + }, + { name: "SysRacl", + desc: "Value of `racl_vec` field in `sys` output", + type: "logic [dma_pkg::SYS_RACL_WIDTH-1:0]" + default: "'0", + local: "false", + expose: "true", + }, + { name: "OtAgentId", + desc: "OT Agent ID" + type: "int unsigned" + default: "0", + local: "false", + expose: "true", + }, + ], + inter_signal_list: [ + { name: "lsio_trigger" + type: "uni", + act: "rcv", + package: "dma_pkg", + struct: "lsio_trigger", + width: "1" + } + { name: "sys" + type: "req_rsp" + struct: "sys" + package: "dma_pkg" + act: "req" + width: "1" + } + { struct: "tl_h2d" + package: "tlul_pkg" + type: "uni" + name: "ctn_tl_h2d" + act: "req" + desc: "TL-UL host port for egress into CTN (request part), synchronous" + } + { struct: "tl_d2h" + package: "tlul_pkg" + type: "uni" + name: "ctn_tl_d2h" + act: "rcv" + desc: "TL-UL host port for egress into CTN (response part), synchronous" + } + ] + interrupt_list: [ + { name: "dma_done" + desc: "DMA operation has been completed." + type: "status" + } + { name: "dma_chunk_done" + desc: "Indicates the transfer of a single chunk has been completed." + type: "status" + } + { name: "dma_error" + desc: "DMA error has occurred. DMA_STATUS.error_code register shows the details." + type: "status" + } + ] + alert_list: [ + { name: "fatal_fault" + desc: "This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected." + } + ] + countermeasures: [ + { name: "BUS.INTEGRITY", + desc: "End-to-end bus integrity scheme." + } + { name: "ASID.INTERSIG.MUBI", + desc: "Destination and source ASID signals are multibit encoded." + } + { name: "RANGE.CONFIG.REGWEN_MUBI", + desc: "DMA enabled memory range is software multibit lockable." + } + ] + regwidth: "32" + registers: [ + { name: "CMD" + desc: ''' + ? + ? + ? + ''' + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "16:0" + name: "LEN" + resval: 0x0 + desc: "Transfer length in bytes configuration bitfield." + } + { bits: "17" + name: "TYPE" + resval: 0x0 + desc: '''Transfer direction configuration bitfield: + -1'b0: L1 to L2 + -1'b1: L2 to L1 + ''' + } + { bits: "18" + name: "INC" + resval: 0x0 + desc: '''Transfer incremental configuration bitfield: + -1'b0: non incremental. + -1'b1: incremental. + ''' + } + { bits: "19" + name: "EXT_2D" + resval: 0x0 + desc: '''Transfer type configuration bitfield: + -1'b0: linear transfer in EXT interface. + -1'b1: 2D transfer in EXT interface. + ''' + } + { bits: "20" + name: "ELE" + resval: 0x0 + desc: '''Transfer event generation configuration bitfield: + -1'b0: disabled. + -1'b1: enabled. + ''' + } + { bits: "21" + name: "ILE" + resval: 0x0 + desc: '''Transfer interrupt generation configuration bitfield: + -1'b0: disabled. + -1'b1: enabled. + ''' + } + { bits: "22" + name: "BLE" + resval: 0x0 + desc: '''Transfer event or interrupt broadcast configuration bitfield: + 1'b0: event or interrupt is routed to the cluster core who initiated the transfer. + 1'b1: event or interrupt are broadcasted to all cluster cores. + ''' + } + { bits: "23" + name: "TCDM_2D" + resval: 0x0 + desc: '''Transfer type configuration bitfield: + -1'b0: linear transfer in TCDM interface + -1'b1: 2D transfer in TCDM interface + ''' + } + ] + } + { name: "TID" + desc: "Transfer identifier value bitfield." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "3:0" + name: "get_tid" + resval: 0x0 + desc: "Transfer identifier value bitfield." + } + ] + } + { name: "TCDM_ADDR" + desc: "Transfer L1 base address configuration bitfield." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "tcdm_addr" + resval: 0x0 + desc: "Transfer L1 base address configuration bitfield." + } + ] + } + { name: "EXT_ADDR" + desc: "Transfer L2 base address configuration bitfield." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "ext_addr" + resval: 0x0 + desc: "Transfer L2 base address configuration bitfield." + } + ] + } + { name: "EXT_COUNT_2D" + desc: "EXT 2D transfer conut value configuration bitfield." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "ext_count_2D" + resval: 0x0 + desc: "EXT 2D transfer conut value configuration bitfield." + } + ] + } + { name: "EXT_STRIDE_2D" + desc: "EXT 2D transfer stride value configuration bitfield." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "ext_stride_2D" + resval: 0x0 + desc: "EXT 2D transfer stride value configuration bitfield." + } + ] + } + { name: "TCDM_COUNT_2D" + desc: "TCDM 2D transfer conut value configuration bitfield." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "tcdm_count_2D" + resval: 0x0 + desc: "TCDM 2D transfer conut value configuration bitfield." + } + ] + } + { name: "TCDM_STRIDE_2D" + desc: "TCDM 2D transfer stride value configuration bitfield." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "tcdm_stride_2D" + resval: 0x0 + desc: "TCDM 2D transfer stride value configuration bitfield." + } + ] + } + { name: "STATUS" + desc: ''' + ? + ? + ? + ''' + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "15:0" + name: "TID_TR" + resval: 0x0 + desc: '''Transfer status bitfield: + TID_TR[i]=1'b1 means that transfer with TID i is active. + ''' + } + { bits: "31:16" + name: "TID_ALLOC" + resval: 0x0 + desc: '''Transfer status bitfield: + - TID_TR[i]=1'b0 means that transfer allocator with TID i-16 is free. + - TID_TR[i]=1'b1 means that transfer allocator with TID i-16 is reserved. + ''' + } + ] + } + { name: "TID_FREE" + desc: "Transfer canceller configuration bitfield. Writing a 1'b1 in TID_FREE[i] will free transfer with TID i." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "15:0" + name: "tid_free" + resval: 0x0 + desc: "Transfer canceller configuration bitfield. Writing a 1'b1 in TID_FREE[i] will free transfer with TID i." + } + ] + } + ] +} diff --git a/hw/regs/carfield_regs_Doc.hjson b/hw/regs/carfield_regs_Doc.hjson new file mode 100644 index 00000000..dad20d5d --- /dev/null +++ b/hw/regs/carfield_regs_Doc.hjson @@ -0,0 +1,713 @@ +// Copyright lowRISC contributors (OpenTitan project). +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 +// +// Robert Balas +// Luca Valente +{ + name: "carfield", + cip_id: "2", + version: "1.0.1", + clocking: [ + {clock: "clk_i", reset: "rst_ni", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device" } + ], + regwidth: "32", + registers :[ + + { name: "VERSION0", + desc: "Cheshire sha256 commit", + swaccess: "ro", + hwaccess: "none", + resval: "0", + hwqe: "0", + fields: [ + { bits: "31:0" } + ], + } + + { name: "VERSION1", + desc: "Safety Island sha256 commit", + swaccess: "ro", + hwaccess: "none", + resval: "0", + hwqe: "0", + fields: [ + { bits: "31:0" } + ], + } + + { name: "VERSION2", + desc: "Security Island sha256 commit", + swaccess: "ro", + hwaccess: "none", + resval: "0", + hwqe: "0", + fields: [ + { bits: "31:0" } + ], + } + + { name: "VERSION3", + desc: "PULP Cluster sha256 commit", + swaccess: "ro", + hwaccess: "none", + resval: "0", + hwqe: "0", + fields: [ + { bits: "31:0" } + ], + } + + { name: "VERSION4", + desc: "Spatz CLuster sha256 commit", + swaccess: "ro", + hwaccess: "none", + resval: "0", + hwqe: "0", + fields: [ + { bits: "31:0" } + ], + } + + { name: "JEDEC_IDCODE", + desc: "JEDEC ID CODE -TODO assign-", + swaccess: "rw", + hwaccess: "none", + resval: "0", + hwqe: "0", + fields: [ + { bits: "31:0" } + ], + } + + { name: "GENERIC_SCRATCH0", + desc: "Scratch", + swaccess: "rw", + hwaccess: "hrw", + resval: "0", + hwqe: "0", + fields: [ + { bits: "31:0" } + ], + } + + { name: "GENERIC_SCRATCH1", + desc: "Scratch", + swaccess: "rw", + hwaccess: "hrw", + resval: "0", + hwqe: "0", + fields: [ + { bits: "31:0" } + ], + } + + { name: "HOST_RST", + desc: "Host Domain reset -active high, inverted in HW-", + swaccess: "ro", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "PERIPH_RST", + desc: "Periph Domain reset -active high, inverted in HW-", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SAFETY_ISLAND_RST", + desc: "Safety Island reset -active high, inverted in HW-", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SECURITY_ISLAND_RST", + desc: "Security Island reset -active high, inverted in HW-", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "PULP_CLUSTER_RST", + desc: "PULP Cluster reset -active high, inverted in HW-", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SPATZ_CLUSTER_RST", + desc: "Spatz Cluster reset -active high, inverted in HW-", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "L2_RST", + desc: "L2 reset -active high, inverted in HW-", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "PERIPH_ISOLATE", + desc: "Periph Domain AXI isolate", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SAFETY_ISLAND_ISOLATE", + desc: "Safety Island AXI isolate", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SECURITY_ISLAND_ISOLATE", + desc: "Security Island AXI isolate", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "PULP_CLUSTER_ISOLATE", + desc: "PULP Cluster AXI isolate", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SPATZ_CLUSTER_ISOLATE", + desc: "Spatz Cluster AXI isolate", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "L2_ISOLATE", + desc: "L2 AXI isolate", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "PERIPH_ISOLATE_STATUS", + desc: "Periph Domain AXI isolate status", + swaccess: "rw", + hwaccess: "hwo", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SAFETY_ISLAND_ISOLATE_STATUS", + desc: "Safety Island AXI isolate status", + swaccess: "rw", + hwaccess: "hwo", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SECURITY_ISLAND_ISOLATE_STATUS", + desc: "Security Island AXI isolate status", + swaccess: "rw", + hwaccess: "hwo", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "PULP_CLUSTER_ISOLATE_STATUS", + desc: "PULP Cluster AXI isolate status", + swaccess: "rw", + hwaccess: "hwo", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SPATZ_CLUSTER_ISOLATE_STATUS", + desc: "Spatz Cluster AXI isolate status", + swaccess: "rw", + hwaccess: "hwo", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "L2_ISOLATE_STATUS", + desc: "L2 AXI isolate status", + swaccess: "rw", + hwaccess: "hwo", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "PERIPH_CLK_EN", + desc: "Periph Domain clk gate enable", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SAFETY_ISLAND_CLK_EN", + desc: "Safety Island clk gate enable", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SECURITY_ISLAND_CLK_EN", + desc: "Security Island clk gate enable", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "PULP_CLUSTER_CLK_EN", + desc: "PULP Cluster clk gate enable", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SPATZ_CLUSTER_CLK_EN", + desc: "Spatz Cluster clk gate enable", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "L2_CLK_EN", + desc: "Shared L2 memory clk gate enable", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "PERIPH_CLK_SEL", + desc: "Periph Domain pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll)", + swaccess: "rw", + hwaccess: "hro", + resval: "2", + hwqe: "0", + fields: [ + { bits: "1:0" } + ], + } + + { name: "SAFETY_ISLAND_CLK_SEL", + desc: "Safety Island pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll)", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "0", + fields: [ + { bits: "1:0" } + ], + } + + { name: "SECURITY_ISLAND_CLK_SEL", + desc: "Security Island pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll)", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "0", + fields: [ + { bits: "1:0" } + ], + } + + { name: "PULP_CLUSTER_CLK_SEL", + desc: "PULP Cluster pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll)", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "0", + fields: [ + { bits: "1:0" } + ], + } + + { name: "SPATZ_CLUSTER_CLK_SEL", + desc: "Spatz Cluster pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll)", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "0", + fields: [ + { bits: "1:0" } + ], + } + + { name: "L2_CLK_SEL", + desc: "L2 Memory pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll)", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "0", + fields: [ + { bits: "1:0" } + ], + } + + { name: "PERIPH_CLK_DIV_VALUE", + desc: "Periph Domain clk divider value", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "1", + fields: [ + { bits: "23:0" } + ], + } + + { name: "SAFETY_ISLAND_CLK_DIV_VALUE", + desc: "Safety Island clk divider value", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "1", + fields: [ + { bits: "23:0" } + ], + } + + { name: "SECURITY_ISLAND_CLK_DIV_VALUE", + desc: "Security Island clk divider value", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "1", + fields: [ + { bits: "23:0" } + ], + } + + { name: "PULP_CLUSTER_CLK_DIV_VALUE", + desc: "PULP Cluster clk divider value", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "1", + fields: [ + { bits: "23:0" } + ], + } + + { name: "SPATZ_CLUSTER_CLK_DIV_VALUE", + desc: "Spatz Cluster clk divider value", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "1", + fields: [ + { bits: "23:0" } + ], + } + + { name: "L2_CLK_DIV_VALUE", + desc: "L2 Memory clk divider value", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "1", + fields: [ + { bits: "23:0" } + ], + } + + { name: "HOST_FETCH_ENABLE", + desc: "Host Domain fetch enable", + swaccess: "ro", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SAFETY_ISLAND_FETCH_ENABLE", + desc: "Safety Island fetch enable", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SECURITY_ISLAND_FETCH_ENABLE", + desc: "Security Island fetch enable", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "PULP_CLUSTER_FETCH_ENABLE", + desc: "PULP Cluster fetch enable", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SPATZ_CLUSTER_DEBUG_REQ", + desc: "Spatz Cluster debug req", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "1:0" } + ], + } + + { name: "HOST_BOOT_ADDR", + desc: "Host boot address", + swaccess: "rw", + hwaccess: "hro", + resval: "0x1000", + hwqe: "0", + fields: [ + { bits: "31:0" } + ], + } + + { name: "SAFETY_ISLAND_BOOT_ADDR", + desc: "Safety Island boot address", + swaccess: "rw", + hwaccess: "hro", + resval: "0x70000000", + hwqe: "0", + fields: [ + { bits: "31:0" } + ], + } + + { name: "SECURITY_ISLAND_BOOT_ADDR", + desc: "Security Island boot address", + swaccess: "rw", + hwaccess: "hro", + resval: "0x70000000", + hwqe: "0", + fields: [ + { bits: "31:0" } + ], + } + + { name: "PULP_CLUSTER_BOOT_ADDR", + desc: "PULP Cluster boot address", + swaccess: "rw", + hwaccess: "hro", + resval: "0x70000000", + hwqe: "0", + fields: [ + { bits: "31:0" } + ], + } + + { name: "SPATZ_CLUSTER_BOOT_ADDR", + desc: "Spatz Cluster boot address", + swaccess: "rw", + hwaccess: "hro", + resval: "0x70000000", + hwqe: "0", + fields: [ + { bits: "31:0" } + ], + } + + { name: "PULP_CLUSTER_BOOT_ENABLE", + desc: "PULP Cluster boot enable", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SPATZ_CLUSTER_BUSY", + desc: "Spatz Cluster busy", + swaccess: "ro", + hwaccess: "hrw", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "PULP_CLUSTER_BUSY", + desc: "PULP Cluster busy", + swaccess: "ro", + hwaccess: "hrw", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "PULP_CLUSTER_EOC", + desc: "PULP Cluster end of computation", + swaccess: "ro", + hwaccess: "hrw", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "ETH_RGMII_PHY_CLK_DIV_EN", + desc: "Ethernet RGMII PHY clock divider enable bit", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "1", + fields: [ + { bits: "0:0" } + ], + } + + { name: "ETH_RGMII_PHY_CLK_DIV_VALUE", + desc: "Ethernet RGMII PHY clock divider value", + swaccess: "rw", + hwaccess: "hro", + resval: "100", + hwqe: "1", + fields: [ + { bits: "19:0" } + ], + } + + { name: "ETH_MDIO_CLK_DIV_EN", + desc: "Ethernet MDIO clock divider enable bit", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "1", + fields: [ + { bits: "0:0" } + ], + } + + { name: "ETH_MDIO_CLK_DIV_VALUE", + desc: "Ethernet MDIO clock divider value", + swaccess: "rw", + hwaccess: "hro", + resval: "100", + hwqe: "1", + fields: [ + { bits: "19:0" } + ], + } + ], +} From dc3f7d608c5d1871978dda848f1a9f925ffe1694 Mon Sep 17 00:00:00 2001 From: Arya Saraei Date: Thu, 22 May 2025 10:27:05 +0200 Subject: [PATCH 3/5] Add new Carfield registers documentation in directory /docs/um/ip --- docs/carfield_regs.md | 1126 ++ .../data/spatz_cluster_peripheral_reg.hjson | 431 + .../spatz_cluster_peripheral_reg_doc.hjson | 435 + docs/um/ip/FP_Cluster/doc/registers.md | 386 + .../data/timer_unit.hjson | 282 + .../GP_timer1_System_timer/doc/registers.md | 197 + .../data/apb_adv_timer.hjson | 1020 ++ .../GP_timer2_Advanced_timer/doc/registers.md | 1088 ++ .../L2_ECC_Config/data/ecc_sram_wrapper.hjson | 86 + .../data/ecc_sram_wrapper_doc.hjson | 94 + docs/um/ip/L2_ECC_Config/doc/registers.md | 108 + .../data/idma_desc64_frontend.hjson | 67 + .../data/idma_desc64_frontend_doc.hjson | 71 + .../data/idma_reg32_2d_frontend.hjson | 147 + .../data/idma_reg32_2d_frontend_doc.hjson | 150 + .../data/idma_reg64_2d_frontend.hjson | 142 + .../data/idma_reg64_2d_frontend_doc.hjson | 145 + .../data/idma_reg64_frontend.hjson | 108 + .../data/idma_reg64_frontend_doc.hjson | 111 + .../doc/idma_desc64_frontend_doc.md | 42 + .../doc/idma_reg32_2d_frontend_doc.md | 180 + .../doc/idma_reg64_2d_frontend_doc.md | 179 + .../doc/idma_reg64_frontend_doc.md | 128 + docs/um/ip/axi_llc/data/axi_llc_regs.hjson | 166 + .../um/ip/axi_llc/data/axi_llc_regs_doc.hjson | 168 + docs/um/ip/axi_llc/doc/registers.md | 313 + docs/um/ip/axi_realm/data/axi_rt_regs.hjson | 466 + .../ip/axi_realm/data/axi_rt_regs_doc.hjson | 470 + docs/um/ip/axi_realm/doc/registers.md | 1069 ++ docs/um/ip/can_bus/data/can_bus_regs.hjson | 11535 ++++++++++++ docs/um/ip/can_bus/doc/registers.md | 15050 ++++++++++++++++ docs/um/ip/clic/data/clicint.hjson | 40 + docs/um/ip/clic/data/clicint_doc.hjson | 45 + docs/um/ip/clic/data/clictv.hjson | 40 + docs/um/ip/clic/data/clictv_doc.hjson | 42 + docs/um/ip/clic/data/clicvs.hjson | 36 + docs/um/ip/clic/data/clicvs_doc.hjson | 40 + docs/um/ip/clic/data/mclic.hjson | 47 + docs/um/ip/clic/data/mclic_doc.hjson | 51 + docs/um/ip/clic/doc/clicint_registers.md | 30 + docs/um/ip/clic/doc/clictv_registers.md | 33 + docs/um/ip/clic/doc/clicvs_registers.md | 29 + docs/um/ip/clic/doc/mclic_registers.md | 46 + docs/um/ip/clint/data/clint.hjson | 76 + docs/um/ip/clint/data/clint.hjson~ | 0 docs/um/ip/clint/data/clint_Doc.hjson | 97 + docs/um/ip/clint/doc/registers.md | 133 + .../cl_dma/Data/CL_DMA.hjson | 327 + .../cluster_peripherals/cl_dma/Doc/CL_DMA.md | 268 + .../data/cl_event_unit_regs.hjson | 1588 ++ .../data/cl_event_unit_regs.hjson~ | 1500 ++ .../cl_event_unit/doc/registers.md | 2032 +++ .../data/cluster_crtl_unit_regs.hjson | 418 + .../cluster_ctrl_unit/doc/registers.md | 230 + .../data/cluster_icache_ctrl_regs.hjson | 150 + .../data/cluster_icache_ctrl_regs.hjson~ | 150 + .../cluster_icache_ctrl/doc/registers.md | 101 + .../ip/ethernet/data/eth_framing_regs.hjson | 65 + .../ethernet/data/eth_framing_regs_doc.hjson | 75 + .../ethernet/data/eth_framing_regs_doc.hjson~ | 75 + docs/um/ip/ethernet/doc/registers.md | 78 + docs/um/ip/gpio/data/gpio.hjson | 290 + docs/um/ip/gpio/data/gpio_doc.hjson | 294 + docs/um/ip/gpio/doc/registers.md | 337 + docs/um/ip/hyperbus/data/hyperbus.hjson | 273 + docs/um/ip/hyperbus/data/hyperbus.hjson~ | 273 + docs/um/ip/hyperbus/doc/registers.md | 321 + docs/um/ip/i2c/data/i2c_ot.hjson | 1138 ++ docs/um/ip/i2c/doc/registers.md | 913 + .../ip/irq_router/data/irq_router_regs.hjson | 32 + .../irq_router/data/irq_router_regs_doc.hjson | 36 + docs/um/ip/irq_router/doc/registers.md | 22 + docs/um/ip/mailbox/data/mailbox.hjson | 146 + docs/um/ip/mailbox/data/mailbox_doc.hjson | 150 + docs/um/ip/mailbox/doc/registers.md | 183 + docs/um/ip/plic/data/plic.hjson | 412 + docs/um/ip/plic/data/plic_doc.hjson | 416 + docs/um/ip/plic/doc/registers.md | 751 + .../data/safety_soc_ctrl_regs.hjson | 68 + .../data/safety_soc_ctrl_regs_doc.hjson | 71 + docs/um/ip/safety_island/doc/registers.md | 75 + .../serial_link/data/serial_link_regs.hjson | 421 + .../data/serial_link_regs_doc.hjson | 424 + docs/um/ip/serial_link/doc/registers.md | 833 + docs/um/ip/spim/data/spi_host_ot.hjson | 673 + docs/um/ip/spim/doc/registers.md | 459 + docs/um/ip/tagger/data/tagger_regs.hjson | 80 + docs/um/ip/tagger/data/tagger_regs_doc.hjson | 83 + docs/um/ip/tagger/data/tagger_regs_doc.hjson~ | 83 + docs/um/ip/tagger/doc/registers.md | 126 + docs/um/ip/uart/data/uart_ot.hjson | 476 + docs/um/ip/uart/doc/registers.md | 365 + docs/um/ip/unbent/data/err_unit_regs.hjson | 70 + .../um/ip/unbent/data/err_unit_regs_doc.hjson | 70 + docs/um/ip/unbent/doc/registers.md | 73 + docs/um/ip/vga/data/axi_vga_regs.hjson | 246 + docs/um/ip/vga/data/axi_vga_regs_doc.hjson | 251 + docs/um/ip/vga/doc/registers.md | 248 + .../um/ip/watchdog_timer/data/aon_timer.hjson | 265 + .../ip/watchdog_timer/data/aon_timer.hjson~ | 0 .../watchdog_timer/data/aon_timer_doc.hjson | 266 + .../watchdog_timer/data/aon_timer_doc.hjson~ | 266 + docs/um/ip/watchdog_timer/doc/registers.md | 223 + 103 files changed, 56004 insertions(+) create mode 100644 docs/carfield_regs.md create mode 100644 docs/um/ip/FP_Cluster/data/spatz_cluster_peripheral_reg.hjson create mode 100644 docs/um/ip/FP_Cluster/data/spatz_cluster_peripheral_reg_doc.hjson create mode 100644 docs/um/ip/FP_Cluster/doc/registers.md create mode 100644 docs/um/ip/GP_timer1_System_timer/data/timer_unit.hjson create mode 100644 docs/um/ip/GP_timer1_System_timer/doc/registers.md create mode 100644 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0x4 | 4 | Safety Island sha256 commit | +| carfield.[`VERSION2`](#version2) | 0x8 | 4 | Security Island sha256 commit | +| carfield.[`VERSION3`](#version3) | 0xc | 4 | PULP Cluster sha256 commit | +| carfield.[`VERSION4`](#version4) | 0x10 | 4 | Spatz CLuster sha256 commit | +| carfield.[`JEDEC_IDCODE`](#jedec_idcode) | 0x14 | 4 | JEDEC ID CODE -TODO assign- | +| carfield.[`GENERIC_SCRATCH0`](#generic_scratch0) | 0x18 | 4 | Scratch | +| carfield.[`GENERIC_SCRATCH1`](#generic_scratch1) | 0x1c | 4 | Scratch | +| carfield.[`HOST_RST`](#host_rst) | 0x20 | 4 | Host Domain reset -active high, inverted in HW- | +| carfield.[`PERIPH_RST`](#periph_rst) | 0x24 | 4 | Periph Domain reset -active high, inverted in HW- | +| carfield.[`SAFETY_ISLAND_RST`](#safety_island_rst) | 0x28 | 4 | Safety Island reset -active high, inverted in HW- | +| carfield.[`SECURITY_ISLAND_RST`](#security_island_rst) | 0x2c | 4 | Security Island reset -active high, inverted in HW- | +| carfield.[`PULP_CLUSTER_RST`](#pulp_cluster_rst) | 0x30 | 4 | PULP Cluster reset -active high, inverted in HW- | +| carfield.[`SPATZ_CLUSTER_RST`](#spatz_cluster_rst) | 0x34 | 4 | Spatz Cluster reset -active high, inverted in HW- | +| carfield.[`L2_RST`](#l2_rst) | 0x38 | 4 | L2 reset -active high, inverted in HW- | +| carfield.[`PERIPH_ISOLATE`](#periph_isolate) | 0x3c | 4 | Periph Domain AXI isolate | +| carfield.[`SAFETY_ISLAND_ISOLATE`](#safety_island_isolate) | 0x40 | 4 | Safety Island AXI isolate | +| carfield.[`SECURITY_ISLAND_ISOLATE`](#security_island_isolate) | 0x44 | 4 | Security Island AXI isolate | +| carfield.[`PULP_CLUSTER_ISOLATE`](#pulp_cluster_isolate) | 0x48 | 4 | PULP Cluster AXI isolate | +| carfield.[`SPATZ_CLUSTER_ISOLATE`](#spatz_cluster_isolate) | 0x4c | 4 | Spatz Cluster AXI isolate | +| carfield.[`L2_ISOLATE`](#l2_isolate) | 0x50 | 4 | L2 AXI isolate | +| carfield.[`PERIPH_ISOLATE_STATUS`](#periph_isolate_status) | 0x54 | 4 | Periph Domain AXI isolate status | +| carfield.[`SAFETY_ISLAND_ISOLATE_STATUS`](#safety_island_isolate_status) | 0x58 | 4 | Safety Island AXI isolate status | +| carfield.[`SECURITY_ISLAND_ISOLATE_STATUS`](#security_island_isolate_status) | 0x5c | 4 | Security Island AXI isolate status | +| carfield.[`PULP_CLUSTER_ISOLATE_STATUS`](#pulp_cluster_isolate_status) | 0x60 | 4 | PULP Cluster AXI isolate status | +| carfield.[`SPATZ_CLUSTER_ISOLATE_STATUS`](#spatz_cluster_isolate_status) | 0x64 | 4 | Spatz Cluster AXI isolate status | +| carfield.[`L2_ISOLATE_STATUS`](#l2_isolate_status) | 0x68 | 4 | L2 AXI isolate status | +| carfield.[`PERIPH_CLK_EN`](#periph_clk_en) | 0x6c | 4 | Periph Domain clk gate enable | +| carfield.[`SAFETY_ISLAND_CLK_EN`](#safety_island_clk_en) | 0x70 | 4 | Safety Island clk gate enable | +| carfield.[`SECURITY_ISLAND_CLK_EN`](#security_island_clk_en) | 0x74 | 4 | Security Island clk gate enable | +| carfield.[`PULP_CLUSTER_CLK_EN`](#pulp_cluster_clk_en) | 0x78 | 4 | PULP Cluster clk gate enable | +| carfield.[`SPATZ_CLUSTER_CLK_EN`](#spatz_cluster_clk_en) | 0x7c | 4 | Spatz Cluster clk gate enable | +| carfield.[`L2_CLK_EN`](#l2_clk_en) | 0x80 | 4 | Shared L2 memory clk gate enable | +| carfield.[`PERIPH_CLK_SEL`](#periph_clk_sel) | 0x84 | 4 | Periph Domain pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`SAFETY_ISLAND_CLK_SEL`](#safety_island_clk_sel) | 0x88 | 4 | Safety Island pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`SECURITY_ISLAND_CLK_SEL`](#security_island_clk_sel) | 0x8c | 4 | Security Island pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`PULP_CLUSTER_CLK_SEL`](#pulp_cluster_clk_sel) | 0x90 | 4 | PULP Cluster pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`SPATZ_CLUSTER_CLK_SEL`](#spatz_cluster_clk_sel) | 0x94 | 4 | Spatz Cluster pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`L2_CLK_SEL`](#l2_clk_sel) | 0x98 | 4 | L2 Memory pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`PERIPH_CLK_DIV_VALUE`](#periph_clk_div_value) | 0x9c | 4 | Periph Domain clk divider value | +| carfield.[`SAFETY_ISLAND_CLK_DIV_VALUE`](#safety_island_clk_div_value) | 0xa0 | 4 | Safety Island clk divider value | +| carfield.[`SECURITY_ISLAND_CLK_DIV_VALUE`](#security_island_clk_div_value) | 0xa4 | 4 | Security Island clk divider value | +| carfield.[`PULP_CLUSTER_CLK_DIV_VALUE`](#pulp_cluster_clk_div_value) | 0xa8 | 4 | PULP Cluster clk divider value | +| carfield.[`SPATZ_CLUSTER_CLK_DIV_VALUE`](#spatz_cluster_clk_div_value) | 0xac | 4 | Spatz Cluster clk divider value | +| carfield.[`L2_CLK_DIV_VALUE`](#l2_clk_div_value) | 0xb0 | 4 | L2 Memory clk divider value | +| carfield.[`HOST_FETCH_ENABLE`](#host_fetch_enable) | 0xb4 | 4 | Host Domain fetch enable | +| carfield.[`SAFETY_ISLAND_FETCH_ENABLE`](#safety_island_fetch_enable) | 0xb8 | 4 | Safety Island fetch enable | +| carfield.[`SECURITY_ISLAND_FETCH_ENABLE`](#security_island_fetch_enable) | 0xbc | 4 | Security Island fetch enable | +| carfield.[`PULP_CLUSTER_FETCH_ENABLE`](#pulp_cluster_fetch_enable) | 0xc0 | 4 | PULP Cluster fetch enable | +| carfield.[`SPATZ_CLUSTER_DEBUG_REQ`](#spatz_cluster_debug_req) | 0xc4 | 4 | Spatz Cluster debug req | +| carfield.[`HOST_BOOT_ADDR`](#host_boot_addr) | 0xc8 | 4 | Host boot address | +| carfield.[`SAFETY_ISLAND_BOOT_ADDR`](#safety_island_boot_addr) | 0xcc | 4 | Safety Island boot address | +| carfield.[`SECURITY_ISLAND_BOOT_ADDR`](#security_island_boot_addr) | 0xd0 | 4 | Security Island boot address | +| carfield.[`PULP_CLUSTER_BOOT_ADDR`](#pulp_cluster_boot_addr) | 0xd4 | 4 | PULP Cluster boot address | +| carfield.[`SPATZ_CLUSTER_BOOT_ADDR`](#spatz_cluster_boot_addr) | 0xd8 | 4 | Spatz Cluster boot address | +| carfield.[`PULP_CLUSTER_BOOT_ENABLE`](#pulp_cluster_boot_enable) | 0xdc | 4 | PULP Cluster boot enable | +| carfield.[`SPATZ_CLUSTER_BUSY`](#spatz_cluster_busy) | 0xe0 | 4 | Spatz Cluster busy | +| carfield.[`PULP_CLUSTER_BUSY`](#pulp_cluster_busy) | 0xe4 | 4 | PULP Cluster busy | +| carfield.[`PULP_CLUSTER_EOC`](#pulp_cluster_eoc) | 0xe8 | 4 | PULP Cluster end of computation | +| carfield.[`ETH_RGMII_PHY_CLK_DIV_EN`](#eth_rgmii_phy_clk_div_en) | 0xec | 4 | Ethernet RGMII PHY clock divider enable bit | +| carfield.[`ETH_RGMII_PHY_CLK_DIV_VALUE`](#eth_rgmii_phy_clk_div_value) | 0xf0 | 4 | Ethernet RGMII PHY clock divider value | +| carfield.[`ETH_MDIO_CLK_DIV_EN`](#eth_mdio_clk_div_en) | 0xf4 | 4 | Ethernet MDIO clock divider enable bit | +| carfield.[`ETH_MDIO_CLK_DIV_VALUE`](#eth_mdio_clk_div_value) | 0xf8 | 4 | Ethernet MDIO clock divider value | + +## VERSION0 +Cheshire sha256 commit +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VERSION0", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:0 | ro | 0x0 | VERSION0 | | + +## VERSION1 +Safety Island sha256 commit +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VERSION1", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:0 | ro | 0x0 | VERSION1 | | + +## VERSION2 +Security Island sha256 commit +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VERSION2", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:0 | ro | 0x0 | VERSION2 | | + +## VERSION3 +PULP Cluster sha256 commit +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VERSION3", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:0 | ro | 0x0 | VERSION3 | | + +## VERSION4 +Spatz CLuster sha256 commit +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VERSION4", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:0 | ro | 0x0 | VERSION4 | | + +## JEDEC_IDCODE +JEDEC ID CODE -TODO assign- +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "JEDEC_IDCODE", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:--------------| +| 31:0 | rw | 0x0 | JEDEC_IDCODE | | + +## GENERIC_SCRATCH0 +Scratch +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "GENERIC_SCRATCH0", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:0 | rw | 0x0 | GENERIC_SCRATCH0 | | + +## GENERIC_SCRATCH1 +Scratch +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "GENERIC_SCRATCH1", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:0 | rw | 0x0 | GENERIC_SCRATCH1 | | + +## HOST_RST +Host Domain reset -active high, inverted in HW- +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "HOST_RST", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 100}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | HOST_RST | | + +## PERIPH_RST +Periph Domain reset -active high, inverted in HW- +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PERIPH_RST | | + +## SAFETY_ISLAND_RST +Safety Island reset -active high, inverted in HW- +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SAFETY_ISLAND_RST | | + +## SECURITY_ISLAND_RST +Security Island reset -active high, inverted in HW- +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 210}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SECURITY_ISLAND_RST | | + +## PULP_CLUSTER_RST +PULP Cluster reset -active high, inverted in HW- +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PULP_CLUSTER_RST | | + +## SPATZ_CLUSTER_RST +Spatz Cluster reset -active high, inverted in HW- +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SPATZ_CLUSTER_RST | | + +## L2_RST +L2 reset -active high, inverted in HW- +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "L2_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | L2_RST | | + +## PERIPH_ISOLATE +Periph Domain AXI isolate +- Offset: `0x3c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 160}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PERIPH_ISOLATE | | + +## SAFETY_ISLAND_ISOLATE +Safety Island AXI isolate +- Offset: `0x40` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | SAFETY_ISLAND_ISOLATE | | + +## SECURITY_ISLAND_ISOLATE +Security Island AXI isolate +- Offset: `0x44` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 250}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | SECURITY_ISLAND_ISOLATE | | + +## PULP_CLUSTER_ISOLATE +PULP Cluster AXI isolate +- Offset: `0x48` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 220}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | PULP_CLUSTER_ISOLATE | | + +## SPATZ_CLUSTER_ISOLATE +Spatz Cluster AXI isolate +- Offset: `0x4c` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | SPATZ_CLUSTER_ISOLATE | | + +## L2_ISOLATE +L2 AXI isolate +- Offset: `0x50` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "L2_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | L2_ISOLATE | | + +## PERIPH_ISOLATE_STATUS +Periph Domain AXI isolate status +- Offset: `0x54` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PERIPH_ISOLATE_STATUS | | + +## SAFETY_ISLAND_ISOLATE_STATUS +Safety Island AXI isolate status +- Offset: `0x58` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 300}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SAFETY_ISLAND_ISOLATE_STATUS | | + +## SECURITY_ISLAND_ISOLATE_STATUS +Security Island AXI isolate status +- Offset: `0x5c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 320}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SECURITY_ISLAND_ISOLATE_STATUS | | + +## PULP_CLUSTER_ISOLATE_STATUS +PULP Cluster AXI isolate status +- Offset: `0x60` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 290}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PULP_CLUSTER_ISOLATE_STATUS | | + +## SPATZ_CLUSTER_ISOLATE_STATUS +Spatz Cluster AXI isolate status +- Offset: `0x64` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 300}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SPATZ_CLUSTER_ISOLATE_STATUS | | + +## L2_ISOLATE_STATUS +L2 AXI isolate status +- Offset: `0x68` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "L2_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | L2_ISOLATE_STATUS | | + +## PERIPH_CLK_EN +Periph Domain clk gate enable +- Offset: `0x6c` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 150}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | PERIPH_CLK_EN | | + +## SAFETY_ISLAND_CLK_EN +Safety Island clk gate enable +- Offset: `0x70` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 220}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SAFETY_ISLAND_CLK_EN | | + +## SECURITY_ISLAND_CLK_EN +Security Island clk gate enable +- Offset: `0x74` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 240}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SECURITY_ISLAND_CLK_EN | | + +## PULP_CLUSTER_CLK_EN +PULP Cluster clk gate enable +- Offset: `0x78` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 210}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PULP_CLUSTER_CLK_EN | | + +## SPATZ_CLUSTER_CLK_EN +Spatz Cluster clk gate enable +- Offset: `0x7c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 220}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SPATZ_CLUSTER_CLK_EN | | + +## L2_CLK_EN +Shared L2 memory clk gate enable +- Offset: `0x80` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "L2_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | L2_CLK_EN | | + +## PERIPH_CLK_SEL +Periph Domain pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x84` +- Reset default: `0x2` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 160}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x2 | PERIPH_CLK_SEL | | + +## SAFETY_ISLAND_CLK_SEL +Safety Island pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x88` +- Reset default: `0x1` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x1 | SAFETY_ISLAND_CLK_SEL | | + +## SECURITY_ISLAND_CLK_SEL +Security Island pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x8c` +- Reset default: `0x1` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 250}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x1 | SECURITY_ISLAND_CLK_SEL | | + +## PULP_CLUSTER_CLK_SEL +PULP Cluster pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x90` +- Reset default: `0x1` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 220}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x1 | PULP_CLUSTER_CLK_SEL | | + +## SPATZ_CLUSTER_CLK_SEL +Spatz Cluster pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x94` +- Reset default: `0x1` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x1 | SPATZ_CLUSTER_CLK_SEL | | + +## L2_CLK_SEL +L2 Memory pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x98` +- Reset default: `0x1` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "L2_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x1 | L2_CLK_SEL | | + +## PERIPH_CLK_DIV_VALUE +Periph Domain clk divider value +- Offset: `0x9c` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | PERIPH_CLK_DIV_VALUE | | + +## SAFETY_ISLAND_CLK_DIV_VALUE +Safety Island clk divider value +- Offset: `0xa0` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | SAFETY_ISLAND_CLK_DIV_VALUE | | + +## SECURITY_ISLAND_CLK_DIV_VALUE +Security Island clk divider value +- Offset: `0xa4` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | SECURITY_ISLAND_CLK_DIV_VALUE | | + +## PULP_CLUSTER_CLK_DIV_VALUE +PULP Cluster clk divider value +- Offset: `0xa8` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | PULP_CLUSTER_CLK_DIV_VALUE | | + +## SPATZ_CLUSTER_CLK_DIV_VALUE +Spatz Cluster clk divider value +- Offset: `0xac` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | SPATZ_CLUSTER_CLK_DIV_VALUE | | + +## L2_CLK_DIV_VALUE +L2 Memory clk divider value +- Offset: `0xb0` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "L2_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | L2_CLK_DIV_VALUE | | + +## HOST_FETCH_ENABLE +Host Domain fetch enable +- Offset: `0xb4` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "HOST_FETCH_ENABLE", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | HOST_FETCH_ENABLE | | + +## SAFETY_ISLAND_FETCH_ENABLE +Safety Island fetch enable +- Offset: `0xb8` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_FETCH_ENABLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 280}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SAFETY_ISLAND_FETCH_ENABLE | | + +## SECURITY_ISLAND_FETCH_ENABLE +Security Island fetch enable +- Offset: `0xbc` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_FETCH_ENABLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 300}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SECURITY_ISLAND_FETCH_ENABLE | | + +## PULP_CLUSTER_FETCH_ENABLE +PULP Cluster fetch enable +- Offset: `0xc0` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_FETCH_ENABLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 270}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PULP_CLUSTER_FETCH_ENABLE | | + +## SPATZ_CLUSTER_DEBUG_REQ +Spatz Cluster debug req +- Offset: `0xc4` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_DEBUG_REQ", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 250}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x0 | SPATZ_CLUSTER_DEBUG_REQ | | + +## HOST_BOOT_ADDR +Host boot address +- Offset: `0xc8` +- Reset default: `0x1000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "HOST_BOOT_ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:--------------| +| 31:0 | rw | 0x1000 | HOST_BOOT_ADDR | | + +## SAFETY_ISLAND_BOOT_ADDR +Safety Island boot address +- Offset: `0xcc` +- Reset default: `0x70000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_BOOT_ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:------------------------|:--------------| +| 31:0 | rw | 0x70000000 | SAFETY_ISLAND_BOOT_ADDR | | + +## SECURITY_ISLAND_BOOT_ADDR +Security Island boot address +- Offset: `0xd0` +- Reset default: `0x70000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_BOOT_ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:--------------------------|:--------------| +| 31:0 | rw | 0x70000000 | SECURITY_ISLAND_BOOT_ADDR | | + +## PULP_CLUSTER_BOOT_ADDR +PULP Cluster boot address +- Offset: `0xd4` +- Reset default: `0x70000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_BOOT_ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:-----------------------|:--------------| +| 31:0 | rw | 0x70000000 | PULP_CLUSTER_BOOT_ADDR | | + +## SPATZ_CLUSTER_BOOT_ADDR +Spatz Cluster boot address +- Offset: `0xd8` +- Reset default: `0x70000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_BOOT_ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:------------------------|:--------------| +| 31:0 | rw | 0x70000000 | SPATZ_CLUSTER_BOOT_ADDR | | + +## PULP_CLUSTER_BOOT_ENABLE +PULP Cluster boot enable +- Offset: `0xdc` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_BOOT_ENABLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 260}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PULP_CLUSTER_BOOT_ENABLE | | + +## SPATZ_CLUSTER_BUSY +Spatz Cluster busy +- Offset: `0xe0` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_BUSY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 200}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | SPATZ_CLUSTER_BUSY | | + +## PULP_CLUSTER_BUSY +PULP Cluster busy +- Offset: `0xe4` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_BUSY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | PULP_CLUSTER_BUSY | | + +## PULP_CLUSTER_EOC +PULP Cluster end of computation +- Offset: `0xe8` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_EOC", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | PULP_CLUSTER_EOC | | + +## ETH_RGMII_PHY_CLK_DIV_EN +Ethernet RGMII PHY clock divider enable bit +- Offset: `0xec` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "ETH_RGMII_PHY_CLK_DIV_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 260}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | ETH_RGMII_PHY_CLK_DIV_EN | | + +## ETH_RGMII_PHY_CLK_DIV_VALUE +Ethernet RGMII PHY clock divider value +- Offset: `0xf0` +- Reset default: `0x64` +- Reset mask: `0xfffff` + +### Fields + +```wavejson +{"reg": [{"name": "ETH_RGMII_PHY_CLK_DIV_VALUE", "bits": 20, "attr": ["rw"], "rotate": 0}, {"bits": 12}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------------|:--------------| +| 31:20 | | | | Reserved | +| 19:0 | rw | 0x64 | ETH_RGMII_PHY_CLK_DIV_VALUE | | + +## ETH_MDIO_CLK_DIV_EN +Ethernet MDIO clock divider enable bit +- Offset: `0xf4` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "ETH_MDIO_CLK_DIV_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 210}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | ETH_MDIO_CLK_DIV_EN | | + +## ETH_MDIO_CLK_DIV_VALUE +Ethernet MDIO clock divider value +- Offset: `0xf8` +- Reset default: `0x64` +- Reset mask: `0xfffff` + +### Fields + +```wavejson +{"reg": [{"name": "ETH_MDIO_CLK_DIV_VALUE", "bits": 20, "attr": ["rw"], "rotate": 0}, {"bits": 12}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------|:--------------| +| 31:20 | | | | Reserved | +| 19:0 | rw | 0x64 | ETH_MDIO_CLK_DIV_VALUE | | + diff --git a/docs/um/ip/FP_Cluster/data/spatz_cluster_peripheral_reg.hjson b/docs/um/ip/FP_Cluster/data/spatz_cluster_peripheral_reg.hjson new file mode 100644 index 00000000..0be5f06a --- /dev/null +++ b/docs/um/ip/FP_Cluster/data/spatz_cluster_peripheral_reg.hjson @@ -0,0 +1,431 @@ +// Copyright 2020 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51, see LICENSE for details. +{ + param_list: [ + { name: "NumPerfCounters", + desc: "Number of performance counters", + type: "int", + default: "2" + }, + ], + name: "spatz_cluster_peripheral", + clock_primary: "clk_i", + bus_interfaces: [ + { protocol: "reg_iface", direction: "device"} + ] + regwidth: 64, + registers: [{ + multireg: { + name: "PERF_COUNTER_ENABLE", + desc: "Enable particular performance counter and start tracking.", + swaccess: "rw", + hwaccess: "hro", + count: "NumPerfCounters", + cname: "performance_counter_enable", + fields: [{ + bits: "0:0", + resval: "0", + name: "CYCLE", + desc: ''' + Cycle counter. Counts up as long as the cluster is powered. + ''' + }, + { + bits: "1:1", + resval: "0", + name: "TCDM_ACCESSED" + desc: ''' + Increased whenever the TCDM is accessed. Each individual access is tracked, + so if `n` cores access the TCDM, `n` will be added. Accesses are tracked at the TCDM, + so it doesn't matter whether the cores or the for example the SSR hardware accesses + the TCDM. _This is a cluster-global signal._ + ''' + }, + { + bits: "2:2", + resval: "0", + name: "TCDM_CONGESTED" + desc: ''' + Incremented whenever an access twoards the TCDM is made but the arbitration + logic didn't grant the access (due to congestion). Is strictly less than TCDM_ACCESSED. + _This is a cluster-global signal._ + ''' + }, + { + bits: "3:3", + resval: "0", + name: "ISSUE_FPU" + desc: ''' + Core operations performed in the FPU. _This is a hart-local signal._ + ''' + }, + { + bits: "4:4", + resval: "0", + name: "ISSUE_FPU_SEQ" + desc: ''' + Incremented whenever the FPU Sequencer issues an FPU instruction. + Might be non available if the hardware doesn't support FREP. + _This is a hart-local signal._ + ''' + }, + { + bits: "5:5", + resval: "0", + name: "ISSUE_CORE_TO_FPU" + desc: '''Incremented whenever the core issues an FPU instruction. + _This is a hart-local signal._''' + }, + { + bits: "6:6", + resval: "0", + name: "RETIRED_INSTR" + desc: ''' + Instructions retired by the core. _This is a hart-local signal._ + ''' + }, + { + bits: "7:7", + resval: "0", + name: "RETIRED_LOAD" + desc: ''' + Load instructions retired by the core. _This is a hart-local signal._ + ''' + }, + { + bits: "8:8", + resval: "0", + name: "RETIRED_I" + desc: ''' + Base instructions retired by the core. _This is a hart-local signal._ + ''' + }, + { + bits: "9:9", + resval: "0", + name: "RETIRED_ACC" + desc: ''' + Offloaded instructions retired by the core. _This is a hart-local signal._ + ''' + }, + { + bits: "10:10", + resval: "0", + name: "DMA_AW_STALL" + desc: ''' + Incremented whenever aw_valid = 1 but aw_ready = 0. + _This is a DMA-local signal_ + ''' + }, + { + bits: "11:11", + resval: "0", + name: "DMA_AR_STALL" + desc: ''' + Incremented whenever ar_valid = 1 but ar_ready = 0. + _This is a DMA-local signal_ + ''' + }, + { + bits: "12:12", + resval: "0", + name: "DMA_R_STALL" + desc: ''' + Incremented whenever r_ready = 1 but r_valid = 0. + _This is a DMA-local signal_ + ''' + }, + { + bits: "13:13", + resval: "0", + name: "DMA_W_STALL" + desc: ''' + Incremented whenever w_valid = 1 but w_ready = 0. + _This is a DMA-local signal_ + ''' + }, + { + bits: "14:14", + resval: "0", + name: "DMA_BUF_W_STALL" + desc: ''' + Incremented whenever w_ready = 1 but w_valid = 0. + _This is a DMA-local signal_ + ''' + }, + { + bits: "15:15", + resval: "0", + name: "DMA_BUF_R_STALL" + desc: ''' + Incremented whenever r_valid = 1 but r_ready = 0. + _This is a DMA-local signal_ + ''' + }, + { + bits: "16:16", + resval: "0", + name: "DMA_AW_DONE" + desc: ''' + Incremented whenever AW handshake occurs. + _This is a DMA-local signal_ + ''' + }, + { + bits: "17:17", + resval: "0", + name: "DMA_AW_BW" + desc: ''' + Whenever AW handshake occurs, the counter is incremented + by the number of bytes transfered for this transaction + _This is a DMA-local signal_ + ''' + }, + { + bits: "18:18", + resval: "0", + name: "DMA_AR_DONE" + desc: ''' + Incremented whenever AR handshake occurs. + _This is a DMA-local signal_ + ''' + }, + { + bits: "19:19", + resval: "0", + name: "DMA_AR_BW" + desc: ''' + Whenever AR handshake occurs, the counter is incremented + by the number of bytes transfered for this transaction + _This is a DMA-local signal_ + ''' + }, + { + bits: "20:20", + resval: "0", + name: "DMA_R_DONE" + desc: ''' + Incremented whenever R handshake occurs. + _This is a DMA-local signal_ + ''' + }, + { + bits: "21:21", + resval: "0", + name: "DMA_R_BW" + desc: ''' + Whenever R handshake occurs, the counter is incremented + by the number of bytes transfered in this cycle + _This is a DMA-local signal_ + ''' + }, + { + bits: "22:22", + resval: "0", + name: "DMA_W_DONE" + desc: ''' + Incremented whenvever W handshake occurs. + _This is a DMA-local signal_ + ''' + }, + { + bits: "23:23", + resval: "0", + name: "DMA_W_BW" + desc: ''' + Whenever W handshake occurs, the counter is incremented + by the number of bytes transfered in this cycle + _This is a DMA-local signal_ + ''' + }, + { + bits: "24:24", + resval: "0", + name: "DMA_B_DONE" + desc: ''' + Incremented whenever B handshake occurs. + _This is a DMA-local signal_ + ''' + }, + { + bits: "25:25", + resval: "0", + name: "DMA_BUSY" + desc: ''' + Incremented whenever DMA is busy. + _This is a DMA-local signal_ + ''' + }, + { + bits: "26:26", + resval: "0", + name: "ICACHE_MISS" + desc: ''' + Incremented for instruction cache misses. + _This is a hart-local signal_ + ''' + }, + { + bits: "27:27", + resval: "0", + name: "ICACHE_HIT" + desc: ''' + Incremented for instruction cache hits. + _This is a hart-local signal_ + ''' + }, + { + bits: "28:28", + resval: "0", + name: "ICACHE_PREFETCH" + desc: ''' + Incremented for instruction cache prefetches. + _This is a hart-local signal_ + ''' + }, + { + bits: "29:29", + resval: "0", + name: "ICACHE_DOUBLE_HIT" + desc: ''' + Incremented for instruction cache double hit. + _This is a hart-local signal_ + ''' + }, + { + bits: "30:30", + resval: "0", + name: "ICACHE_STALL" + desc: ''' + Incremented for instruction cache stalls. + _This is a hart-local signal_ + ''' + }, + ] + } + }, + { + multireg: { + name: "HART_SELECT", + desc: '''Select from which hart in the cluster, starting from `0`, + the event should be counted. For each performance counter + the cores can be selected individually. If a hart greater + than the clusters total hart size is selected the selection + will wrap and the hart corresponding to `hart_select % total_harts_in_cluster` + will be selected.''' + swaccess: "rw", + hwaccess: "hro", + count: "NumPerfCounters", + cname: "hart_select", + compact: "false", + fields: [{ + bits: "9:0", + name: "HART_SELECT", + desc: "Select source of per-hart performance counter" + }] + } + } + { + multireg: { + name: "PERF_COUNTER", + desc: '''Performance counter. Set corresponding PERF_COUNTER_ENABLE bits depending on what + performance metric you would like to track.''' + swaccess: "rw", + hwaccess: "hrw", + count: "NumPerfCounters", + cname: "performance_counter", + hwext: "true", + hwqe: "true", + fields: [{ + bits: "47:0", + name: "PERF_COUNTER", + desc: "Performance counter" + }] + } + }, + { + name: "CL_CLINT_SET", + desc: ''' + Set bits in the cluster-local CLINT. Writing a 1 at location i sets the cluster-local interrupt + of hart i, where i is relative to the first hart in the cluster, ignoring the cluster base hart ID. + ''' + hwext: "true", + hwqe: "true", + swaccess: "wo", + hwaccess: "hro", + fields: [{ + bits: "31:0", + name: "CL_CLINT_SET", + desc: "Set cluster-local interrupt of hart i" + }] + }, + { + name: "CL_CLINT_CLEAR", + desc: ''' + Clear bits in the cluster-local CLINT. Writing a 1 at location i clears the cluster-local interrupt + of hart i, where i is relative to the first hart in the cluster, ignoring the cluster base hart ID. + ''' + hwext: "true", + hwqe: "true", + swaccess: "wo", + hwaccess: "hro", + fields: [{ + bits: "31:0", + name: "CL_CLINT_CLEAR", + desc: "Clear cluster-local interrupt of hart i" + }] + }, + { + name: "HW_BARRIER", + desc: '''Hardware barrier register. Loads to this register will block until all cores have + performed the load. At this stage we know that they reached the same point in the control flow, + i.e., the cores are synchronized.''' + swaccess: "ro", + hwaccess: "hrw", + hwext: "true", + fields: [{ + bits: "31:0", + name: "HW_BARRIER", + desc: "Hardware barrier register." + }] + }, + { + name: "ICACHE_PREFETCH_ENABLE", + desc: '''Controls prefetching of the instruction cache.''' + swaccess: "wo", + hwaccess: "hro", + resval: "1", + fields: [{ + bits: "0:0", + name: "ICACHE_PREFETCH_ENABLE", + desc: "Hardware barrier register." + }] + }, + { + name: "SPATZ_STATUS", + desc: '''Sets the status of the Spatz cluster.''' + swaccess: "wo", + hwaccess: "hro", + fields: [{ + bits: "0:0", + resval: "0", + name: "SPATZ_CLUSTER_PROBE", + desc: "Indicates the cluster is computing a kernel." + }] + }, + { + name: "CLUSTER_BOOT_CONTROL", + desc: '''Controls the cluster boot process.''' + swaccess: "rw", + hwaccess: "hro", + resval: "0", + fields: [{ + bits: "31:0", + name: "ENTRY_POINT", + desc: "Post-bootstrapping entry point." + }] + } + ] +} \ No newline at end of file diff --git a/docs/um/ip/FP_Cluster/data/spatz_cluster_peripheral_reg_doc.hjson b/docs/um/ip/FP_Cluster/data/spatz_cluster_peripheral_reg_doc.hjson new file mode 100644 index 00000000..17337b00 --- /dev/null +++ b/docs/um/ip/FP_Cluster/data/spatz_cluster_peripheral_reg_doc.hjson @@ -0,0 +1,435 @@ +// Copyright 2020 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51, see LICENSE for details. +{ + param_list: [ + { name: "NumPerfCounters", + desc: "Number of performance counters", + type: "int", + default: "2" + }, + ], + name: "spatz_cluster_peripheral", + cip_id: "36", + version: "0.4.3", + clocking: [ + {clock: "clk_i", reset: "rst_ni", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device"} + ] + regwidth: 64, + registers: [{ + multireg: { + name: "PERF_COUNTER_ENABLE", + desc: "Enable particular performance counter and start tracking.", + swaccess: "rw", + hwaccess: "hro", + count: "NumPerfCounters", + cname: "performance_counter_enable", + fields: [{ + bits: "0:0", + resval: "0", + name: "CYCLE", + desc: ''' + Cycle counter. Counts up as long as the cluster is powered. + ''' + }, + { + bits: "1:1", + resval: "0", + name: "TCDM_ACCESSED" + desc: ''' + Increased whenever the TCDM is accessed. Each individual access is tracked, + so if `n` cores access the TCDM, `n` will be added. Accesses are tracked at the TCDM, + so it doesn't matter whether the cores or the for example the SSR hardware accesses + the TCDM. _This is a cluster-global signal._ + ''' + }, + { + bits: "2:2", + resval: "0", + name: "TCDM_CONGESTED" + desc: ''' + Incremented whenever an access twoards the TCDM is made but the arbitration + logic didn't grant the access (due to congestion). Is strictly less than TCDM_ACCESSED. + _This is a cluster-global signal._ + ''' + }, + { + bits: "3:3", + resval: "0", + name: "ISSUE_FPU" + desc: ''' + Core operations performed in the FPU. _This is a hart-local signal._ + ''' + }, + { + bits: "4:4", + resval: "0", + name: "ISSUE_FPU_SEQ" + desc: ''' + Incremented whenever the FPU Sequencer issues an FPU instruction. + Might be non available if the hardware doesn't support FREP. + _This is a hart-local signal._ + ''' + }, + { + bits: "5:5", + resval: "0", + name: "ISSUE_CORE_TO_FPU" + desc: '''Incremented whenever the core issues an FPU instruction. + _This is a hart-local signal._''' + }, + { + bits: "6:6", + resval: "0", + name: "RETIRED_INSTR" + desc: ''' + Instructions retired by the core. _This is a hart-local signal._ + ''' + }, + { + bits: "7:7", + resval: "0", + name: "RETIRED_LOAD" + desc: ''' + Load instructions retired by the core. _This is a hart-local signal._ + ''' + }, + { + bits: "8:8", + resval: "0", + name: "RETIRED_I" + desc: ''' + Base instructions retired by the core. _This is a hart-local signal._ + ''' + }, + { + bits: "9:9", + resval: "0", + name: "RETIRED_ACC" + desc: ''' + Offloaded instructions retired by the core. _This is a hart-local signal._ + ''' + }, + { + bits: "10:10", + resval: "0", + name: "DMA_AW_STALL" + desc: ''' + Incremented whenever aw_valid = 1 but aw_ready = 0. + _This is a DMA-local signal_ + ''' + }, + { + bits: "11:11", + resval: "0", + name: "DMA_AR_STALL" + desc: ''' + Incremented whenever ar_valid = 1 but ar_ready = 0. + _This is a DMA-local signal_ + ''' + }, + { + bits: "12:12", + resval: "0", + name: "DMA_R_STALL" + desc: ''' + Incremented whenever r_ready = 1 but r_valid = 0. + _This is a DMA-local signal_ + ''' + }, + { + bits: "13:13", + resval: "0", + name: "DMA_W_STALL" + desc: ''' + Incremented whenever w_valid = 1 but w_ready = 0. + _This is a DMA-local signal_ + ''' + }, + { + bits: "14:14", + resval: "0", + name: "DMA_BUF_W_STALL" + desc: ''' + Incremented whenever w_ready = 1 but w_valid = 0. + _This is a DMA-local signal_ + ''' + }, + { + bits: "15:15", + resval: "0", + name: "DMA_BUF_R_STALL" + desc: ''' + Incremented whenever r_valid = 1 but r_ready = 0. + _This is a DMA-local signal_ + ''' + }, + { + bits: "16:16", + resval: "0", + name: "DMA_AW_DONE" + desc: ''' + Incremented whenever AW handshake occurs. + _This is a DMA-local signal_ + ''' + }, + { + bits: "17:17", + resval: "0", + name: "DMA_AW_BW" + desc: ''' + Whenever AW handshake occurs, the counter is incremented + by the number of bytes transfered for this transaction + _This is a DMA-local signal_ + ''' + }, + { + bits: "18:18", + resval: "0", + name: "DMA_AR_DONE" + desc: ''' + Incremented whenever AR handshake occurs. + _This is a DMA-local signal_ + ''' + }, + { + bits: "19:19", + resval: "0", + name: "DMA_AR_BW" + desc: ''' + Whenever AR handshake occurs, the counter is incremented + by the number of bytes transfered for this transaction + _This is a DMA-local signal_ + ''' + }, + { + bits: "20:20", + resval: "0", + name: "DMA_R_DONE" + desc: ''' + Incremented whenever R handshake occurs. + _This is a DMA-local signal_ + ''' + }, + { + bits: "21:21", + resval: "0", + name: "DMA_R_BW" + desc: ''' + Whenever R handshake occurs, the counter is incremented + by the number of bytes transfered in this cycle + _This is a DMA-local signal_ + ''' + }, + { + bits: "22:22", + resval: "0", + name: "DMA_W_DONE" + desc: ''' + Incremented whenvever W handshake occurs. + _This is a DMA-local signal_ + ''' + }, + { + bits: "23:23", + resval: "0", + name: "DMA_W_BW" + desc: ''' + Whenever W handshake occurs, the counter is incremented + by the number of bytes transfered in this cycle + _This is a DMA-local signal_ + ''' + }, + { + bits: "24:24", + resval: "0", + name: "DMA_B_DONE" + desc: ''' + Incremented whenever B handshake occurs. + _This is a DMA-local signal_ + ''' + }, + { + bits: "25:25", + resval: "0", + name: "DMA_BUSY" + desc: ''' + Incremented whenever DMA is busy. + _This is a DMA-local signal_ + ''' + }, + { + bits: "26:26", + resval: "0", + name: "ICACHE_MISS" + desc: ''' + Incremented for instruction cache misses. + _This is a hart-local signal_ + ''' + }, + { + bits: "27:27", + resval: "0", + name: "ICACHE_HIT" + desc: ''' + Incremented for instruction cache hits. + _This is a hart-local signal_ + ''' + }, + { + bits: "28:28", + resval: "0", + name: "ICACHE_PREFETCH" + desc: ''' + Incremented for instruction cache prefetches. + _This is a hart-local signal_ + ''' + }, + { + bits: "29:29", + resval: "0", + name: "ICACHE_DOUBLE_HIT" + desc: ''' + Incremented for instruction cache double hit. + _This is a hart-local signal_ + ''' + }, + { + bits: "30:30", + resval: "0", + name: "ICACHE_STALL" + desc: ''' + Incremented for instruction cache stalls. + _This is a hart-local signal_ + ''' + }, + ] + } + }, + { + multireg: { + name: "HART_SELECT", + desc: '''Select from which hart in the cluster, starting from `0`, + the event should be counted. For each performance counter + the cores can be selected individually. If a hart greater + than the clusters total hart size is selected the selection + will wrap and the hart corresponding to `hart_select % total_harts_in_cluster` + will be selected.''' + swaccess: "rw", + hwaccess: "hro", + count: "NumPerfCounters", + cname: "hart_select", + compact: "false", + fields: [{ + bits: "9:0", + name: "HART_SELECT", + desc: "Select source of per-hart performance counter" + }] + } + } + { + multireg: { + name: "PERF_COUNTER", + desc: '''Performance counter. Set corresponding PERF_COUNTER_ENABLE bits depending on what + performance metric you would like to track.''' + swaccess: "rw", + hwaccess: "hrw", + count: "NumPerfCounters", + cname: "performance_counter", + hwext: "true", + hwqe: "true", + fields: [{ + bits: "47:0", + name: "PERF_COUNTER", + desc: "Performance counter" + }] + } + }, + { + name: "CL_CLINT_SET", + desc: ''' + Set bits in the cluster-local CLINT. Writing a 1 at location i sets the cluster-local interrupt + of hart i, where i is relative to the first hart in the cluster, ignoring the cluster base hart ID. + ''' + hwext: "true", + hwqe: "true", + swaccess: "wo", + hwaccess: "hro", + fields: [{ + bits: "31:0", + name: "CL_CLINT_SET", + desc: "Set cluster-local interrupt of hart i" + }] + }, + { + name: "CL_CLINT_CLEAR", + desc: ''' + Clear bits in the cluster-local CLINT. Writing a 1 at location i clears the cluster-local interrupt + of hart i, where i is relative to the first hart in the cluster, ignoring the cluster base hart ID. + ''' + hwext: "true", + hwqe: "true", + swaccess: "wo", + hwaccess: "hro", + fields: [{ + bits: "31:0", + name: "CL_CLINT_CLEAR", + desc: "Clear cluster-local interrupt of hart i" + }] + }, + { + name: "HW_BARRIER", + desc: '''Hardware barrier register. Loads to this register will block until all cores have + performed the load. At this stage we know that they reached the same point in the control flow, + i.e., the cores are synchronized.''' + swaccess: "ro", + hwaccess: "hrw", + hwext: "true", + fields: [{ + bits: "31:0", + name: "HW_BARRIER", + desc: "Hardware barrier register." + }] + }, + { + name: "ICACHE_PREFETCH_ENABLE", + desc: '''Controls prefetching of the instruction cache.''' + swaccess: "wo", + hwaccess: "hro", + resval: "1", + fields: [{ + bits: "0:0", + name: "ICACHE_PREFETCH_ENABLE", + desc: "Hardware barrier register." + }] + }, + { + name: "SPATZ_STATUS", + desc: '''Sets the status of the Spatz cluster.''' + swaccess: "wo", + hwaccess: "hro", + fields: [{ + bits: "0:0", + resval: "0", + name: "SPATZ_CLUSTER_PROBE", + desc: "Indicates the cluster is computing a kernel." + }] + }, + { + name: "CLUSTER_BOOT_CONTROL", + desc: '''Controls the cluster boot process.''' + swaccess: "rw", + hwaccess: "hro", + resval: "0", + fields: [{ + bits: "31:0", + name: "ENTRY_POINT", + desc: "Post-bootstrapping entry point." + }] + } + ] +} \ No newline at end of file diff --git a/docs/um/ip/FP_Cluster/doc/registers.md b/docs/um/ip/FP_Cluster/doc/registers.md new file mode 100644 index 00000000..79bc211c --- /dev/null +++ b/docs/um/ip/FP_Cluster/doc/registers.md @@ -0,0 +1,386 @@ +## Summary + +| Name | Offset | Length | Description | +|:-----------------------------------------------------------------------------|:---------|---------:|:----------------------------------------------------------------------------------------------------| +| spatz_cluster_peripheral.[`PERF_COUNTER_ENABLE_0`](#perf_counter_enable) | 0x0 | 8 | Enable particular performance counter and start tracking. | +| spatz_cluster_peripheral.[`PERF_COUNTER_ENABLE_1`](#perf_counter_enable) | 0x8 | 8 | Enable particular performance counter and start tracking. | +| spatz_cluster_peripheral.[`HART_SELECT_0`](#hart_select) | 0x10 | 8 | Select from which hart in the cluster, starting from `0`, | +| spatz_cluster_peripheral.[`HART_SELECT_1`](#hart_select) | 0x18 | 8 | Select from which hart in the cluster, starting from `0`, | +| spatz_cluster_peripheral.[`PERF_COUNTER_0`](#perf_counter) | 0x20 | 8 | Performance counter. Set corresponding PERF_COUNTER_ENABLE bits depending on what | +| spatz_cluster_peripheral.[`PERF_COUNTER_1`](#perf_counter) | 0x28 | 8 | Performance counter. Set corresponding PERF_COUNTER_ENABLE bits depending on what | +| spatz_cluster_peripheral.[`CL_CLINT_SET`](#cl_clint_set) | 0x30 | 8 | Set bits in the cluster-local CLINT. Writing a 1 at location i sets the cluster-local interrupt | +| spatz_cluster_peripheral.[`CL_CLINT_CLEAR`](#cl_clint_clear) | 0x38 | 8 | Clear bits in the cluster-local CLINT. Writing a 1 at location i clears the cluster-local interrupt | +| spatz_cluster_peripheral.[`HW_BARRIER`](#hw_barrier) | 0x40 | 8 | Hardware barrier register. Loads to this register will block until all cores have | +| spatz_cluster_peripheral.[`ICACHE_PREFETCH_ENABLE`](#icache_prefetch_enable) | 0x48 | 8 | Controls prefetching of the instruction cache. | +| spatz_cluster_peripheral.[`SPATZ_STATUS`](#spatz_status) | 0x50 | 8 | Sets the status of the Spatz cluster. | +| spatz_cluster_peripheral.[`CLUSTER_BOOT_CONTROL`](#cluster_boot_control) | 0x58 | 8 | Controls the cluster boot process. | + +## PERF_COUNTER_ENABLE +Enable particular performance counter and start tracking. +- Reset default: `0x0` +- Reset mask: `0x7fffffff` + +### Instances + +| Name | Offset | +|:----------------------|:---------| +| PERF_COUNTER_ENABLE_0 | 0x0 | +| PERF_COUNTER_ENABLE_1 | 0x8 | + + +### Fields + +```wavejson +{"reg": [{"name": "CYCLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "TCDM_ACCESSED", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "TCDM_CONGESTED", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ISSUE_FPU", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ISSUE_FPU_SEQ", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ISSUE_CORE_TO_FPU", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RETIRED_INSTR", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RETIRED_LOAD", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RETIRED_I", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RETIRED_ACC", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_AW_STALL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_AR_STALL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_R_STALL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_W_STALL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_BUF_W_STALL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_BUF_R_STALL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_AW_DONE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_AW_BW", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_AR_DONE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_AR_BW", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_R_DONE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_R_BW", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_W_DONE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_W_BW", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_B_DONE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_BUSY", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ICACHE_MISS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ICACHE_HIT", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ICACHE_PREFETCH", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ICACHE_DOUBLE_HIT", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ICACHE_STALL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 33}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-------------------------------------------------------------| +| 63:31 | | | Reserved | +| 30 | rw | 0x0 | [ICACHE_STALL](#perf_counter_enable--icache_stall) | +| 29 | rw | 0x0 | [ICACHE_DOUBLE_HIT](#perf_counter_enable--icache_double_hit) | +| 28 | rw | 0x0 | [ICACHE_PREFETCH](#perf_counter_enable--icache_prefetch) | +| 27 | rw | 0x0 | [ICACHE_HIT](#perf_counter_enable--icache_hit) | +| 26 | rw | 0x0 | [ICACHE_MISS](#perf_counter_enable--icache_miss) | +| 25 | rw | 0x0 | [DMA_BUSY](#perf_counter_enable--dma_busy) | +| 24 | rw | 0x0 | [DMA_B_DONE](#perf_counter_enable--dma_b_done) | +| 23 | rw | 0x0 | [DMA_W_BW](#perf_counter_enable--dma_w_bw) | +| 22 | rw | 0x0 | [DMA_W_DONE](#perf_counter_enable--dma_w_done) | +| 21 | rw | 0x0 | [DMA_R_BW](#perf_counter_enable--dma_r_bw) | +| 20 | rw | 0x0 | [DMA_R_DONE](#perf_counter_enable--dma_r_done) | +| 19 | rw | 0x0 | [DMA_AR_BW](#perf_counter_enable--dma_ar_bw) | +| 18 | rw | 0x0 | [DMA_AR_DONE](#perf_counter_enable--dma_ar_done) | +| 17 | rw | 0x0 | [DMA_AW_BW](#perf_counter_enable--dma_aw_bw) | +| 16 | rw | 0x0 | [DMA_AW_DONE](#perf_counter_enable--dma_aw_done) | +| 15 | rw | 0x0 | [DMA_BUF_R_STALL](#perf_counter_enable--dma_buf_r_stall) | +| 14 | rw | 0x0 | [DMA_BUF_W_STALL](#perf_counter_enable--dma_buf_w_stall) | +| 13 | rw | 0x0 | [DMA_W_STALL](#perf_counter_enable--dma_w_stall) | +| 12 | rw | 0x0 | [DMA_R_STALL](#perf_counter_enable--dma_r_stall) | +| 11 | rw | 0x0 | [DMA_AR_STALL](#perf_counter_enable--dma_ar_stall) | +| 10 | rw | 0x0 | [DMA_AW_STALL](#perf_counter_enable--dma_aw_stall) | +| 9 | rw | 0x0 | [RETIRED_ACC](#perf_counter_enable--retired_acc) | +| 8 | rw | 0x0 | [RETIRED_I](#perf_counter_enable--retired_i) | +| 7 | rw | 0x0 | [RETIRED_LOAD](#perf_counter_enable--retired_load) | +| 6 | rw | 0x0 | [RETIRED_INSTR](#perf_counter_enable--retired_instr) | +| 5 | rw | 0x0 | [ISSUE_CORE_TO_FPU](#perf_counter_enable--issue_core_to_fpu) | +| 4 | rw | 0x0 | [ISSUE_FPU_SEQ](#perf_counter_enable--issue_fpu_seq) | +| 3 | rw | 0x0 | [ISSUE_FPU](#perf_counter_enable--issue_fpu) | +| 2 | rw | 0x0 | [TCDM_CONGESTED](#perf_counter_enable--tcdm_congested) | +| 1 | rw | 0x0 | [TCDM_ACCESSED](#perf_counter_enable--tcdm_accessed) | +| 0 | rw | 0x0 | [CYCLE](#perf_counter_enable--cycle) | + +### PERF_COUNTER_ENABLE . ICACHE_STALL + Incremented for instruction cache stalls. + _This is a hart-local signal_ + + +### PERF_COUNTER_ENABLE . ICACHE_DOUBLE_HIT + Incremented for instruction cache double hit. + _This is a hart-local signal_ + + +### PERF_COUNTER_ENABLE . ICACHE_PREFETCH + Incremented for instruction cache prefetches. + _This is a hart-local signal_ + + +### PERF_COUNTER_ENABLE . ICACHE_HIT + Incremented for instruction cache hits. + _This is a hart-local signal_ + + +### PERF_COUNTER_ENABLE . ICACHE_MISS + Incremented for instruction cache misses. + _This is a hart-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_BUSY + Incremented whenever DMA is busy. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_B_DONE + Incremented whenever B handshake occurs. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_W_BW + Whenever W handshake occurs, the counter is incremented + by the number of bytes transfered in this cycle + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_W_DONE + Incremented whenvever W handshake occurs. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_R_BW + Whenever R handshake occurs, the counter is incremented + by the number of bytes transfered in this cycle + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_R_DONE + Incremented whenever R handshake occurs. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_AR_BW + Whenever AR handshake occurs, the counter is incremented + by the number of bytes transfered for this transaction + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_AR_DONE + Incremented whenever AR handshake occurs. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_AW_BW + Whenever AW handshake occurs, the counter is incremented + by the number of bytes transfered for this transaction + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_AW_DONE + Incremented whenever AW handshake occurs. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_BUF_R_STALL + Incremented whenever r_valid = 1 but r_ready = 0. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_BUF_W_STALL + Incremented whenever w_ready = 1 but w_valid = 0. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_W_STALL + Incremented whenever w_valid = 1 but w_ready = 0. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_R_STALL + Incremented whenever r_ready = 1 but r_valid = 0. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_AR_STALL + Incremented whenever ar_valid = 1 but ar_ready = 0. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_AW_STALL + Incremented whenever aw_valid = 1 but aw_ready = 0. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . RETIRED_ACC + Offloaded instructions retired by the core. _This is a hart-local signal._ + + +### PERF_COUNTER_ENABLE . RETIRED_I + Base instructions retired by the core. _This is a hart-local signal._ + + +### PERF_COUNTER_ENABLE . RETIRED_LOAD + Load instructions retired by the core. _This is a hart-local signal._ + + +### PERF_COUNTER_ENABLE . RETIRED_INSTR + Instructions retired by the core. _This is a hart-local signal._ + + +### PERF_COUNTER_ENABLE . ISSUE_CORE_TO_FPU +Incremented whenever the core issues an FPU instruction. + _This is a hart-local signal._ + +### PERF_COUNTER_ENABLE . ISSUE_FPU_SEQ + Incremented whenever the FPU Sequencer issues an FPU instruction. + Might be non available if the hardware doesn't support FREP. + _This is a hart-local signal._ + + +### PERF_COUNTER_ENABLE . ISSUE_FPU + Core operations performed in the FPU. _This is a hart-local signal._ + + +### PERF_COUNTER_ENABLE . TCDM_CONGESTED + Incremented whenever an access twoards the TCDM is made but the arbitration + logic didn't grant the access (due to congestion). Is strictly less than TCDM_ACCESSED. + _This is a cluster-global signal._ + + +### PERF_COUNTER_ENABLE . TCDM_ACCESSED + Increased whenever the TCDM is accessed. Each individual access is tracked, + so if `n` cores access the TCDM, `n` will be added. Accesses are tracked at the TCDM, + so it doesn't matter whether the cores or the for example the SSR hardware accesses + the TCDM. _This is a cluster-global signal._ + + +### PERF_COUNTER_ENABLE . CYCLE +Cycle counter. Counts up as long as the cluster is powered. + +## HART_SELECT +Select from which hart in the cluster, starting from `0`, + the event should be counted. For each performance counter + the cores can be selected individually. If a hart greater + than the clusters total hart size is selected the selection + will wrap and the hart corresponding to `hart_select % total_harts_in_cluster` + will be selected. +- Reset default: `0x0` +- Reset mask: `0x3ff` + +### Instances + +| Name | Offset | +|:--------------|:---------| +| HART_SELECT_0 | 0x10 | +| HART_SELECT_1 | 0x18 | + + +### Fields + +```wavejson +{"reg": [{"name": "HART_SELECT", "bits": 10, "attr": ["rw"], "rotate": -90}, {"bits": 54}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:----------------------------------------------| +| 63:10 | | | | Reserved | +| 9:0 | rw | 0x0 | HART_SELECT | Select source of per-hart performance counter | + +## PERF_COUNTER +Performance counter. Set corresponding PERF_COUNTER_ENABLE bits depending on what +performance metric you would like to track. +- Reset default: `0x0` +- Reset mask: `0xffffffffffff` + +### Instances + +| Name | Offset | +|:---------------|:---------| +| PERF_COUNTER_0 | 0x20 | +| PERF_COUNTER_1 | 0x28 | + + +### Fields + +```wavejson +{"reg": [{"name": "PERF_COUNTER", "bits": 48, "attr": ["rw"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:--------------------| +| 63:48 | | | | Reserved | +| 47:0 | rw | x | PERF_COUNTER | Performance counter | + +## CL_CLINT_SET +Set bits in the cluster-local CLINT. Writing a 1 at location i sets the cluster-local interrupt +of hart i, where i is relative to the first hart in the cluster, ignoring the cluster base hart ID. +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CL_CLINT_SET", "bits": 32, "attr": ["wo"], "rotate": 0}, {"bits": 32}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:--------------------------------------| +| 63:32 | | | | Reserved | +| 31:0 | wo | x | CL_CLINT_SET | Set cluster-local interrupt of hart i | + +## CL_CLINT_CLEAR +Clear bits in the cluster-local CLINT. Writing a 1 at location i clears the cluster-local interrupt +of hart i, where i is relative to the first hart in the cluster, ignoring the cluster base hart ID. +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CL_CLINT_CLEAR", "bits": 32, "attr": ["wo"], "rotate": 0}, {"bits": 32}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:----------------------------------------| +| 63:32 | | | | Reserved | +| 31:0 | wo | x | CL_CLINT_CLEAR | Clear cluster-local interrupt of hart i | + +## HW_BARRIER +Hardware barrier register. Loads to this register will block until all cores have +performed the load. At this stage we know that they reached the same point in the control flow, +i.e., the cores are synchronized. +- Offset: `0x40` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "HW_BARRIER", "bits": 32, "attr": ["ro"], "rotate": 0}, {"bits": 32}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:---------------------------| +| 63:32 | | | | Reserved | +| 31:0 | ro | x | HW_BARRIER | Hardware barrier register. | + +## ICACHE_PREFETCH_ENABLE +Controls prefetching of the instruction cache. +- Offset: `0x48` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "ICACHE_PREFETCH_ENABLE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 63}], "config": {"lanes": 1, "fontsize": 10, "vspace": 240}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------|:---------------------------| +| 63:1 | | | | Reserved | +| 0 | wo | 0x1 | ICACHE_PREFETCH_ENABLE | Hardware barrier register. | + +## SPATZ_STATUS +Sets the status of the Spatz cluster. +- Offset: `0x50` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_PROBE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 63}], "config": {"lanes": 1, "fontsize": 10, "vspace": 210}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------|:---------------------------------------------| +| 63:1 | | | | Reserved | +| 0 | wo | 0x0 | SPATZ_CLUSTER_PROBE | Indicates the cluster is computing a kernel. | + +## CLUSTER_BOOT_CONTROL +Controls the cluster boot process. +- Offset: `0x58` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "ENTRY_POINT", "bits": 32, "attr": ["rw"], "rotate": 0}, {"bits": 32}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:--------------------------------| +| 63:32 | | | | Reserved | +| 31:0 | rw | 0x0 | ENTRY_POINT | Post-bootstrapping entry point. | + diff --git a/docs/um/ip/GP_timer1_System_timer/data/timer_unit.hjson b/docs/um/ip/GP_timer1_System_timer/data/timer_unit.hjson new file mode 100644 index 00000000..2065c2cb --- /dev/null +++ b/docs/um/ip/GP_timer1_System_timer/data/timer_unit.hjson @@ -0,0 +1,282 @@ +// Copyright 2018-2021 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51, see LICENSE for details. +// +// Author: Florent Rotenberg +# timer unit(system timer) register + +{ + name: "timer_unit" + one_paragraph_desc: ''' + BASIC TIMER component manages the following features: + - 2 general purpose 32bits up counter timers + - Input trigger sources: + - FLL clock + - FLL clock + Prescaler + - Reference clock at 32kHz + - External event + - 8bit programmable prescaler to FLL clock + - Counting modes: + - One shot mode: timer is stopped after first comparison match + - Continuous mode: timer continues counting after comparison match + - Cycle mode: timer resets to 0 after comparison match and continues counting + - 64 bit cascaded mode + - Interrupt request generation on comparison match + ''' + cip_id: "36", + version: "1.0.3" + clocking: [ + {clock: "clk_i", reset: "rst_ni", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device" } + ], + regwidth: "32" + registers: [ + { name: "CFG_LO" + desc: "Timer Low Configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "0" + name: "ENABLE" + resval: 0x0 + desc: '''Timer low enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "1" + name: "RESET" + resval: 0x0 + desc: "Timer low counter reset command bitfield. Cleared after Timer Low reset execution." + } + { bits: "2" + name: "IRQEN" + resval: 0x0 + desc: '''Timer low compare match interrupt enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "3" + name: "IEM" + resval: 0x0 + desc: '''Timer low input event mask configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "4" + name: "MODE" + resval: 0x0 + desc: '''Timer low continuous mode configuration bitfield: + - 1'b0: Continue mode - continue incrementing Timer low counter when compare match with CMP_LO occurs. + - 1'b1: Cycle mode - reset Timer low counter when compare match with CMP_LO occurs. + ''' + } + { bits: "5" + name: "ONE_S" + resval: 0x0 + desc: '''Timer low one shot configuration bitfield: + - 1'b0: let Timer low enabled counting when compare match with CMP_LO occurs. + - 1'b1: disable Timer low when compare match with CMP_LO occurs. + ''' + } + { bits: "6" + name: "PEN" + resval: 0x0 + desc: '''Timer low prescaler enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "7" + name: "CCFG" + resval: 0x0 + desc: '''Timer low clock source configuration bitfield: + - 1'b0: FLL or FLL+Prescaler + - 1'b1: Reference clock at 32kHz + ''' + } + { bits: "15:8" + name: "PVAL" + resval: 0x0 + desc: "Timer low prescaler value bitfield. Ftimer = Fclk / (1 + PRESC_VAL)" + } + { bits: "31" + name: "CASC" + resval: 0x0 + desc: "Timer low + Timer high 64bit cascaded mode configuration bitfield." + } + ] + } + { name: "CFG_HI" + desc: "Timer HIGH Configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "0" + name: "ENABLE" + resval: 0x0 + desc: '''Timer high enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "1" + name: "RESET" + swaccess: "wo" + hwaccess: "hro" + resval: 0x0 + desc: "Timer high counter reset command bitfield. Cleared after Timer high reset execution." + } + { bits: "2" + name: "IRQEN" + resval: 0x0 + desc: '''Timer high compare match interrupt enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "3" + name: "IEM" + resval: 0x0 + desc: '''Timer high input event mask configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "4" + name: "MODE" + resval: 0x0 + desc: '''Timer high continuous mode configuration bitfield: + - 1'b0: Continue mode - continue incrementing Timer high counter when compare match with CMP_HI occurs. + - 1'b1: Cycle mode - reset Timer high counter when compare match with CMP_HI occurs. + ''' + } + { bits: "5" + name: "ONE_S" + resval: 0x0 + desc: '''Timer high one shot configuration bitfield: + - 1'b0: let Timer high enabled counting when compare match with CMP_HI occurs. + - 1'b1: disable Timer high when compare match with CMP_HI occurs. + ''' + } + { bits: "6" + name: "PEN" + resval: 0x0 + desc: '''Timer high prescaler enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "7" + name: "CLKCFG" + resval: 0x0 + desc: '''Timer high clock source configuration bitfield: + - 1'b0: FLL or FLL+Prescaler + - 1'b1: Reference clock at 32kHz + ''' + } + ] + } + { name: "CNT_LO" + desc: "Timer Low counter value register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "31:0" + name: "cnt_lo" + resval: 0x0 + desc: "Timer Low counter value bitfield." + } + ] + } + { name: "CNT_HI" + desc: "Timer High counter value register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "31:0" + name: "cnt_hi" + resval: 0x0 + desc: "Timer High counter value bitfield." + } + ] + } + { name: "CMP_LO" + desc: "Timer Low comparator value register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "31:0" + name: "cmp_lo" + resval: 0x0 + desc: "Timer Low comparator value bitfield." + } + ] + } + { name: "CMP_HI" + desc: "Timer High comparator value register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "31:0" + name: "cmp_hi" + resval: 0x0 + desc: "Timer High comparator value bitfield." + } + ] + } + { name: "START_LO" + desc: "Start Timer Low counting register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "0:0" + name: "strt_lo" + resval: 0x0 + desc: "Timer Low start command bitfield. When executed, CFG_LO.ENABLE is set." + } + ] + } + { name: "START_HI" + desc: "Start Timer High counting register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "0:0" + name: "strt_hi" + resval: 0x0 + desc: "Timer High start command bitfield. When executed, CFG_HI.ENABLE is set." + } + ] + } + { name: "RESET_LO" + desc: "Reset Timer Low counter register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "0:0" + name: "rst_lo" + resval: 0x0 + desc: "Timer Low counter reset command bitfield. When executed, CFG_LO.RESET is set." + } + ] + } + { name: "RESET_HI" + desc: "Reset Timer High counter register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "0:0" + name: "rst_hi" + resval: 0x0 + desc: "Timer High counter reset command bitfield. When executed, CFG_HI.RESET is set." + } + ] + } + ] +} diff --git a/docs/um/ip/GP_timer1_System_timer/doc/registers.md b/docs/um/ip/GP_timer1_System_timer/doc/registers.md new file mode 100644 index 00000000..c4dc75d0 --- /dev/null +++ b/docs/um/ip/GP_timer1_System_timer/doc/registers.md @@ -0,0 +1,197 @@ +## Summary + +| Name | Offset | Length | Description | +|:-----------------------------------|:---------|---------:|:--------------------------------------| +| timer_unit.[`CFG_LO`](#cfg_lo) | 0x0 | 4 | Timer Low Configuration register. | +| timer_unit.[`CFG_HI`](#cfg_hi) | 0x4 | 4 | Timer HIGH Configuration register. | +| timer_unit.[`CNT_LO`](#cnt_lo) | 0x8 | 4 | Timer Low counter value register. | +| timer_unit.[`CNT_HI`](#cnt_hi) | 0xc | 4 | Timer High counter value register. | +| timer_unit.[`CMP_LO`](#cmp_lo) | 0x10 | 4 | Timer Low comparator value register. | +| timer_unit.[`CMP_HI`](#cmp_hi) | 0x14 | 4 | Timer High comparator value register. | +| timer_unit.[`START_LO`](#start_lo) | 0x18 | 4 | Start Timer Low counting register. | +| timer_unit.[`START_HI`](#start_hi) | 0x1c | 4 | Start Timer High counting register. | +| timer_unit.[`RESET_LO`](#reset_lo) | 0x20 | 4 | Reset Timer Low counter register. | +| timer_unit.[`RESET_HI`](#reset_hi) | 0x24 | 4 | Reset Timer High counter register. | + +## CFG_LO +Timer Low Configuration register. +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0x8000ffff` + +### Fields + +```wavejson +{"reg": [{"name": "ENABLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RESET", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "IRQEN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "IEM", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "MODE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ONE_S", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "PEN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CCFG", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "PVAL", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 15}, {"name": "CASC", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31 | rw | 0x0 | CASC | Timer low + Timer high 64bit cascaded mode configuration bitfield. | +| 30:16 | | | | Reserved | +| 15:8 | rw | 0x0 | PVAL | Timer low prescaler value bitfield. Ftimer = Fclk / (1 + PRESC_VAL) | +| 7 | rw | 0x0 | CCFG | Timer low clock source configuration bitfield: - 1'b0: FLL or FLL+Prescaler - 1'b1: Reference clock at 32kHz | +| 6 | rw | 0x0 | PEN | Timer low prescaler enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 5 | rw | 0x0 | ONE_S | Timer low one shot configuration bitfield: - 1'b0: let Timer low enabled counting when compare match with CMP_LO occurs. - 1'b1: disable Timer low when compare match with CMP_LO occurs. | +| 4 | rw | 0x0 | MODE | Timer low continuous mode configuration bitfield: - 1'b0: Continue mode - continue incrementing Timer low counter when compare match with CMP_LO occurs. - 1'b1: Cycle mode - reset Timer low counter when compare match with CMP_LO occurs. | +| 3 | rw | 0x0 | IEM | Timer low input event mask configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 2 | rw | 0x0 | IRQEN | Timer low compare match interrupt enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 1 | rw | 0x0 | RESET | Timer low counter reset command bitfield. Cleared after Timer Low reset execution. | +| 0 | rw | 0x0 | ENABLE | Timer low enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | + +## CFG_HI +Timer HIGH Configuration register. +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "ENABLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RESET", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "IRQEN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "IEM", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "MODE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ONE_S", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "PEN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CLKCFG", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7 | rw | 0x0 | CLKCFG | Timer high clock source configuration bitfield: - 1'b0: FLL or FLL+Prescaler - 1'b1: Reference clock at 32kHz | +| 6 | rw | 0x0 | PEN | Timer high prescaler enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 5 | rw | 0x0 | ONE_S | Timer high one shot configuration bitfield: - 1'b0: let Timer high enabled counting when compare match with CMP_HI occurs. - 1'b1: disable Timer high when compare match with CMP_HI occurs. | +| 4 | rw | 0x0 | MODE | Timer high continuous mode configuration bitfield: - 1'b0: Continue mode - continue incrementing Timer high counter when compare match with CMP_HI occurs. - 1'b1: Cycle mode - reset Timer high counter when compare match with CMP_HI occurs. | +| 3 | rw | 0x0 | IEM | Timer high input event mask configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 2 | rw | 0x0 | IRQEN | Timer high compare match interrupt enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 1 | wo | 0x0 | RESET | Timer high counter reset command bitfield. Cleared after Timer high reset execution. | +| 0 | rw | 0x0 | ENABLE | Timer high enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | + +## CNT_LO +Timer Low counter value register. +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "cnt_lo", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------| +| 31:0 | rw | 0x0 | cnt_lo | Timer Low counter value bitfield. | + +## CNT_HI +Timer High counter value register. +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "cnt_hi", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------| +| 31:0 | rw | 0x0 | cnt_hi | Timer High counter value bitfield. | + +## CMP_LO +Timer Low comparator value register. +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "cmp_lo", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------| +| 31:0 | rw | 0x0 | cmp_lo | Timer Low comparator value bitfield. | + +## CMP_HI +Timer High comparator value register. +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "cmp_hi", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------| +| 31:0 | rw | 0x0 | cmp_hi | Timer High comparator value bitfield. | + +## START_LO +Start Timer Low counting register. +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "strt_lo", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:-----------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | strt_lo | Timer Low start command bitfield. When executed, CFG_LO.ENABLE is set. | + +## START_HI +Start Timer High counting register. +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "strt_hi", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | strt_hi | Timer High start command bitfield. When executed, CFG_HI.ENABLE is set. | + +## RESET_LO +Reset Timer Low counter register. +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "rst_lo", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | rst_lo | Timer Low counter reset command bitfield. When executed, CFG_LO.RESET is set. | + +## RESET_HI +Reset Timer High counter register. +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "rst_hi", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | rst_hi | Timer High counter reset command bitfield. When executed, CFG_HI.RESET is set. | + diff --git a/docs/um/ip/GP_timer2_Advanced_timer/data/apb_adv_timer.hjson b/docs/um/ip/GP_timer2_Advanced_timer/data/apb_adv_timer.hjson new file mode 100644 index 00000000..016be8a8 --- /dev/null +++ b/docs/um/ip/GP_timer2_Advanced_timer/data/apb_adv_timer.hjson @@ -0,0 +1,1020 @@ +// Copyright 2018-2021 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51, see LICENSE for details. +// +// Author: Florent Rotenberg +# APB Advanced timer register +{ + name: "apb_adv_timer" + one_paragraph_desc: ''' + ADV_ TIMER component manages the following features: + - 4 advanced timers with 4 output signal channels each. Provides PWM generation functionality + - multiple trigger input sources: + - output signal channels of all timers + - 32 GPIOs + - reference clock at 32kHz + - FLL clock + - configurable input trigger modes + - configurable prescaler for each timer + - configurable counting mode for each timer + - configurable channel threshold action for each timer + - 4 configurable output events + - configurable clock gating of each timer + ''' + cip_id: "36", + version: "1.0.4" + clocking: [ + {clock: "clk_i", reset: "rst_ni", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device" } + ], + regwidth: "32" + registers: [ + { name: "T0_CMD" + desc: "ADV_TIMER0 command register." + swaccess: "wo" + hwaccess: "hwo" + fields: [ + { bits: "0" + name: "START" + resval: 0x0 + desc: "ADV_TIMER0 start command bitfield." + } + { bits: "1" + name: "STOP" + resval: 0x0 + desc: "ADV_TIMER0 stop command bitfield." + } + { bits: "2" + name: "UPDATE" + resval: 0x0 + desc: "ADV_TIMER0 update command bitfield." + } + { bits: "3" + name: "RESET" + resval: 0x0 + desc: "ADV_TIMER0 reset command bitfield." + } + { bits: "4" + name: "ARM" + resval: 0x0 + desc: "ADV_TIMER0 arm command bitfield." + } + { bits: "31:5" + name: "RFU" + resval: 0x0 + desc: "?" + } + ] + } + { name: "T0_CONFIG" + desc: "ADV_TIMER0 configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "7:0" + name: "INSEL" + resval: 0x0 + desc: '''ADV_TIMER0 input source configuration bitfield: + - 0-31: GPIO[0] to GPIO[31] + - 32-35: Channel 0 to 3 of ADV_TIMER0 + - 36-39: Channel 0 to 3 of ADV_TIMER1 + - 40-43: Channel 0 to 3 of ADV_TIMER2 + - 44-47: Channel 0 to 3 of ADV_TIMER3 + ''' + } + { bits: "10:8" + name: "MODE" + swaccess: "rw" + hwaccess: "hrw" + resval: 0x0 + desc: '''ADV_TIMER0 trigger mode configuration bitfield: + - 3'h0: trigger event at each clock cycle. + - 3'h1: trigger event if input source is 0 + - 3'h2: trigger event if input source is 1 + - 3'h3: trigger event on input source rising edge + - 3'h4: trigger event on input source falling edge + - 3'h5: trigger event on input source falling or rising edge + - 3'h6: trigger event on input source rising edge when armed + - 3'h7: trigger event on input source falling edge when armed + ''' + } + { bits: "11" + name: "CLKSEL" + resval: 0x0 + desc: '''ADV_TIMER0 clock source configuration bitfield: + - 1'b0: FLL + - 1'b1: reference clock at 32kHz + ''' + } + { bits: "12" + name: "UPDOWNSEL" + resval: 0x1 + desc: '''ADV_TIMER0 center-aligned mode configuration bitfield: + - 1'b0: The counter counts up and down alternatively. + - 1'b1: The counter counts up and resets to 0 when reach threshold. + ''' + } + { bits: "23:16" + name: "PRESC" + resval: 0x0 + desc: "ADV_TIMER0 prescaler value configuration bitfield." + } + ] + } + { name: "T0_THRESHOLD" + desc: "ADV_TIMER0 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH_LO" + resval: 0x0 + desc: "ADV_TIMER0 threshold low part configuration bitfield. It defines start counter value." + } + { bits: "31:16" + name: "TH_HI" + resval: 0x0 + desc: "ADV_TIMER0 threshold high part configuration bitfield. It defines end counter value." + } + ] + } + { name: "T0_TH_CHANNEL0" + desc: "ADV_TIMER0 channel 0 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER0 channel 0 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER0 channel 0 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T0_TH_CHANNEL1" + desc: "ADV_TIMER0 channel 1 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER0 channel 1 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER0 channel 1 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T0_TH_CHANNEL2" + desc: "ADV_TIMER0 channel 2 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER0 channel 2 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER0 channel 2 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T0_TH_CHANNEL3" + desc: "ADV_TIMER0 channel 3 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER0 channel 3 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER0 channel 3 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T0_COUNTER" + desc: "ADV_TIMER0 counter register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "15:0" + name: "COUNTER" + resval: 0x0 + desc: "ADV_TIMER0 counter value." + } + ] + } + { name: "T1_CMD" + desc: "ADV_TIMER1 command register." + swaccess: "wo" + hwaccess: "hwo" + fields: [ + { bits: "0" + name: "START" + resval: 0x0 + desc: "ADV_TIMER1 start command bitfield." + } + { bits: "1" + name: "STOP" + resval: 0x0 + desc: "ADV_TIMER1 stop command bitfield." + } + { bits: "2" + name: "UPDATE" + resval: 0x0 + desc: "ADV_TIMER1 update command bitfield." + } + { bits: "3" + name: "RESET" + resval: 0x0 + desc: "ADV_TIMER1 reset command bitfield." + } + { bits: "4" + name: "ARM" + resval: 0x0 + desc: "ADV_TIMER1 arm command bitfield." + } + ] + } + { name: "T1_CONFIG" + desc: "ADV_TIMER1 configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "7:0" + name: "INSEL" + resval: 0x0 + desc: '''ADV_TIMER1 input source configuration bitfield: + - 0-31: GPIO[0] to GPIO[31] + - 32-35: Channel 0 to 3 of ADV_TIMER0 + - 36-39: Channel 0 to 3 of ADV_TIMER1 + - 40-43: Channel 0 to 3 of ADV_TIMER2 + - 44-47: Channel 0 to 3 of ADV_TIMER3 + ''' + } + { bits: "10:8" + name: "MODE" + swaccess: "rw" + hwaccess: "hrw" + resval: 0x0 + desc: '''ADV_TIMER1 trigger mode configuration bitfield: + - 3'h0: trigger event at each clock cycle. + - 3'h1: trigger event if input source is 0 + - 3'h2: trigger event if input source is 1 + - 3'h3: trigger event on input source rising edge + - 3'h4: trigger event on input source falling edge + - 3'h5: trigger event on input source falling or rising edge + - 3'h6: trigger event on input source rising edge when armed + - 3'h7: trigger event on input source falling edge when armed + ''' + } + { bits: "11" + name: "CLKSEL" + resval: 0x0 + desc: '''ADV_TIMER1 clock source configuration bitfield: + - 1'b0: FLL + - 1'b1: reference clock at 32kHz + ''' + } + { bits: "12" + name: "UPDOWNSEL" + resval: 0x1 + desc: '''ADV_TIMER1 center-aligned mode configuration bitfield: + - 1'b0: The counter counts up and down alternatively. + - 1'b1: The counter counts up and resets to 0 when reach threshold. + ''' + } + { bits: "23:16" + name: "PRESC" + resval: 0x0 + desc: "ADV_TIMER1 prescaler value configuration bitfield." + } + ] + } + { name: "T1_THRESHOLD" + desc: "ADV_TIMER1 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH_LO" + resval: 0x0 + desc: "ADV_TIMER1 threshold low part configuration bitfield. It defines start counter value." + } + { bits: "31:16" + name: "TH_HI" + resval: 0x0 + desc: "ADV_TIMER1 threshold high part configuration bitfield. It defines end counter value." + } + ] + } + { name: "T1_TH_CHANNEL0" + desc: "ADV_TIMER1 channel 0 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER1 channel 0 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER1 channel 0 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T1_TH_CHANNEL1" + desc: "ADV_TIMER1 channel 1 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER1 channel 1 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER1 channel 1 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T1_TH_CHANNEL2" + desc: "ADV_TIMER1 channel 2 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER1 channel 2 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER1 channel 2 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T1_TH_CHANNEL3" + desc: "ADV_TIMER1 channel 3 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER1 channel 3 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER1 channel 3 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T1_COUNTER" + desc: "ADV_TIMER1 counter register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "15:0" + name: "COUNTER" + resval: 0x0 + desc: "ADV_TIMER1 counter value." + } + ] + } + { name: "T2_CMD" + desc: "ADV_TIMER2 command register." + swaccess: "wo" + hwaccess: "hwo" + fields: [ + { bits: "0" + name: "START" + resval: 0x0 + desc: "ADV_TIMER2 start command bitfield." + } + { bits: "1" + name: "STOP" + resval: 0x0 + desc: "ADV_TIMER2 stop command bitfield." + } + { bits: "2" + name: "UPDATE" + resval: 0x0 + desc: "ADV_TIMER2 update command bitfield." + } + { bits: "3" + name: "RESET" + resval: 0x0 + desc: "ADV_TIMER2 reset command bitfield." + } + { bits: "4" + name: "ARM" + resval: 0x0 + desc: "ADV_TIMER2 arm command bitfield." + } + ] + } + { name: "T2_CONFIG" + desc: "ADV_TIMER2 configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "7:0" + name: "INSEL" + resval: 0x0 + desc: '''ADV_TIMER2 input source configuration bitfield: + - 0-31: GPIO[0] to GPIO[31] + - 32-35: Channel 0 to 3 of ADV_TIMER0 + - 36-39: Channel 0 to 3 of ADV_TIMER1 + - 40-43: Channel 0 to 3 of ADV_TIMER2 + - 44-47: Channel 0 to 3 of ADV_TIMER3 + ''' + } + { bits: "10:8" + name: "MODE" + swaccess: "rw" + hwaccess: "hrw" + resval: 0x0 + desc: '''ADV_TIMER2 trigger mode configuration bitfield: + - 3'h0: trigger event at each clock cycle. + - 3'h1: trigger event if input source is 0 + - 3'h2: trigger event if input source is 1 + - 3'h3: trigger event on input source rising edge + - 3'h4: trigger event on input source falling edge + - 3'h5: trigger event on input source falling or rising edge + - 3'h6: trigger event on input source rising edge when armed + - 3'h7: trigger event on input source falling edge when armed + ''' + } + { bits: "11" + name: "CLKSEL" + resval: 0x0 + desc: '''ADV_TIMER2 clock source configuration bitfield: + - 1'b0: FLL + - 1'b1: reference clock at 32kHz + ''' + } + { bits: "12" + name: "UPDOWNSEL" + resval: 0x1 + desc: '''ADV_TIMER2 center-aligned mode configuration bitfield: + - 1'b0: The counter counts up and down alternatively. + - 1'b1: The counter counts up and resets to 0 when reach threshold. + ''' + } + { bits: "23:16" + name: "PRESC" + resval: 0x0 + desc: "ADV_TIMER2 prescaler value configuration bitfield." + } + ] + } + { name: "T2_THRESHOLD" + desc: "ADV_TIMER2 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH_LO" + resval: 0x0 + desc: "ADV_TIMER2 threshold low part configuration bitfield. It defines start counter value." + } + { bits: "31:16" + name: "TH_HI" + resval: 0x0 + desc: "ADV_TIMER2 threshold high part configuration bitfield. It defines end counter value." + } + ] + } + { name: "T2_TH_CHANNEL0" + desc: "ADV_TIMER2 channel 0 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER2 channel 0 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER2 channel 0 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T2_TH_CHANNEL1" + desc: "ADV_TIMER2 channel 1 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER2 channel 1 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER2 channel 1 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T2_TH_CHANNEL2" + desc: "ADV_TIMER2 channel 2 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER2 channel 2 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER2 channel 2 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T2_TH_CHANNEL3" + desc: "ADV_TIMER2 channel 3 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER2 channel 3 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER2 channel 3 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T2_COUNTER" + desc: "ADV_TIMER2 counter register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "15:0" + name: "COUNTER" + resval: 0x0 + desc: "ADV_TIMER2 counter value." + } + ] + } + { name: "T3_CMD" + desc: "ADV_TIMER3 command register." + swaccess: "wo" + hwaccess: "hwo" + fields: [ + { bits: "0" + name: "START" + resval: 0x0 + desc: "ADV_TIMER3 start command bitfield." + } + { bits: "1" + name: "STOP" + resval: 0x0 + desc: "ADV_TIMER3 stop command bitfield." + } + { bits: "2" + name: "UPDATE" + resval: 0x0 + desc: "ADV_TIMER3 update command bitfield." + } + { bits: "3" + name: "RESET" + resval: 0x0 + desc: "ADV_TIMER3 reset command bitfield." + } + { bits: "4" + name: "ARM" + resval: 0x0 + desc: "ADV_TIMER3 arm command bitfield." + } + ] + } + { name: "T3_CONFIG" + desc: "ADV_TIMER3 configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "7:0" + name: "INSEL" + resval: 0x0 + desc: '''ADV_TIMER3 input source configuration bitfield: + - 0-31: GPIO[0] to GPIO[31] + - 32-35: Channel 0 to 3 of ADV_TIMER0 + - 36-39: Channel 0 to 3 of ADV_TIMER1 + - 40-43: Channel 0 to 3 of ADV_TIMER2 + - 44-47: Channel 0 to 3 of ADV_TIMER3 + ''' + } + { bits: "10:8" + name: "MODE" + swaccess: "rw" + hwaccess: "hrw" + resval: 0x0 + desc: '''ADV_TIMER3 trigger mode configuration bitfield: + - 3'h0: trigger event at each clock cycle. + - 3'h1: trigger event if input source is 0 + - 3'h2: trigger event if input source is 1 + - 3'h3: trigger event on input source rising edge + - 3'h4: trigger event on input source falling edge + - 3'h5: trigger event on input source falling or rising edge + - 3'h6: trigger event on input source rising edge when armed + - 3'h7: trigger event on input source falling edge when armed + ''' + } + { bits: "11" + name: "CLKSEL" + resval: 0x0 + desc: '''ADV_TIMER3 clock source configuration bitfield: + - 1'b0: FLL + - 1'b1: reference clock at 32kHz + ''' + } + { bits: "12" + name: "UPDOWNSEL" + resval: 0x1 + desc: '''ADV_TIMER3 center-aligned mode configuration bitfield: + - 1'b0: The counter counts up and down alternatively. + - 1'b1: The counter counts up and resets to 0 when reach threshold. + ''' + } + { bits: "23:16" + name: "PRESC" + resval: 0x0 + desc: "ADV_TIMER3 prescaler value configuration bitfield." + } + ] + } + { name: "T3_THRESHOLD" + desc: "ADV_TIMER3 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH_LO" + resval: 0x0 + desc: "ADV_TIMER3 threshold low part configuration bitfield. It defines start counter value." + } + { bits: "31:16" + name: "TH_HI" + resval: 0x0 + desc: "ADV_TIMER3 threshold high part configuration bitfield. It defines end counter value." + } + ] + } + { name: "T3_TH_CHANNEL0" + desc: "ADV_TIMER3 channel 0 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER3 channel 0 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER3 channel 0 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T3_TH_CHANNEL1" + desc: "ADV_TIMER3 channel 1 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER3 channel 1 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER3 channel 1 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T3_TH_CHANNEL2" + desc: "ADV_TIMER3 channel 2 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER3 channel 2 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER3 channel 2 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T3_TH_CHANNEL3" + desc: "ADV_TIMER3 channel 3 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER3 channel 3 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER3 channel 3 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T3_COUNTER" + desc: "ADV_TIMER3 counter register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "15:0" + name: "COUNTER" + resval: 0x0 + desc: "ADV_TIMER3 counter value." + } + ] + } + { name: "EVENT_CFG" + desc: "ADV_TIMERS events configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "3:0" + name: "SEL0" + resval: 0x0 + desc: '''ADV_TIMER output event 0 source configuration bitfiled: + - 4'h0: ADV_TIMER0 channel 0. + - 4'h1: ADV_TIMER0 channel 1. + - 4'h2: ADV_TIMER0 channel 2. + - 4'h3: ADV_TIMER0 channel 3. + - 4'h4: ADV_TIMER1 channel 0. + - 4'h5: ADV_TIMER1 channel 1. + - 4'h6: ADV_TIMER1 channel 2. + - 4'h7: ADV_TIMER1 channel 3. + - 4'h8: ADV_TIMER2 channel 0. + - 4'h9: ADV_TIMER2 channel 1. + - 4'hA: ADV_TIMER2 channel 2. + - 4'hB: ADV_TIMER2 channel 3. + - 4'hC: ADV_TIMER3 channel 0. + - 4'hD: ADV_TIMER3 channel 1. + - 4'hE: ADV_TIMER3 channel 2. + - 4'hF: ADV_TIMER3 channel 3. + ''' + } + { bits: "7:4" + name: "SEL1" + resval: 0x0 + desc: '''ADV_TIMER output event 1 source configuration bitfiled: + - 4'h0: ADV_TIMER0 channel 0. + - 4'h1: ADV_TIMER0 channel 1. + - 4'h2: ADV_TIMER0 channel 2. + - 4'h3: ADV_TIMER0 channel 3. + - 4'h4: ADV_TIMER1 channel 0. + - 4'h5: ADV_TIMER1 channel 1. + - 4'h6: ADV_TIMER1 channel 2. + - 4'h7: ADV_TIMER1 channel 3. + - 4'h8: ADV_TIMER2 channel 0. + - 4'h9: ADV_TIMER2 channel 1. + - 4'hA: ADV_TIMER2 channel 2. + - 4'hB: ADV_TIMER2 channel 3. + - 4'hC: ADV_TIMER3 channel 0. + - 4'hD: ADV_TIMER3 channel 1. + - 4'hE: ADV_TIMER3 channel 2. + - 4'hF: ADV_TIMER3 channel 3. + ''' + } + { bits: "11:8" + name: "SEL2" + resval: 0x0 + desc: '''ADV_TIMER output event 2 source configuration bitfiled: + - 4'h0: ADV_TIMER0 channel 0. + - 4'h1: ADV_TIMER0 channel 1. + - 4'h2: ADV_TIMER0 channel 2. + - 4'h3: ADV_TIMER0 channel 3. + - 4'h4: ADV_TIMER1 channel 0. + - 4'h5: ADV_TIMER1 channel 1. + - 4'h6: ADV_TIMER1 channel 2. + - 4'h7: ADV_TIMER1 channel 3. + - 4'h8: ADV_TIMER2 channel 0. + - 4'h9: ADV_TIMER2 channel 1. + - 4'hA: ADV_TIMER2 channel 2. + - 4'hB: ADV_TIMER2 channel 3. + - 4'hC: ADV_TIMER3 channel 0. + - 4'hD: ADV_TIMER3 channel 1. + - 4'hE: ADV_TIMER3 channel 2. + - 4'hF: ADV_TIMER3 channel 3. + ''' + } + { bits: "15:12" + name: "SEL3" + resval: 0x0 + desc: '''ADV_TIMER output event 3 source configuration bitfiled: + - 4'h0: ADV_TIMER0 channel 0. + - 4'h1: ADV_TIMER0 channel 1. + - 4'h2: ADV_TIMER0 channel 2. + - 4'h3: ADV_TIMER0 channel 3. + - 4'h4: ADV_TIMER1 channel 0. + - 4'h5: ADV_TIMER1 channel 1. + - 4'h6: ADV_TIMER1 channel 2. + - 4'h7: ADV_TIMER1 channel 3. + - 4'h8: ADV_TIMER2 channel 0. + - 4'h9: ADV_TIMER2 channel 1. + - 4'hA: ADV_TIMER2 channel 2. + - 4'hB: ADV_TIMER2 channel 3. + - 4'hC: ADV_TIMER3 channel 0. + - 4'hD: ADV_TIMER3 channel 1. + - 4'hE: ADV_TIMER3 channel 2. + - 4'hF: ADV_TIMER3 channel 3. + ''' + } + { bits: "19:16" + name: "ENA" + resval: 0x0 + desc: "ADV_TIMER output event enable configuration bitfield. ENA[i]=1 enables output event i generation." + } + ] + } + { name: "CG" + desc: "ADV_TIMERS channels clock gating configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "3:0" + name: "ENA" + resval: 0x0 + desc: '''ADV_TIMER clock gating configuration bitfield. + - ENA[i]=0: clock gate ADV_TIMERi. + - ENA[i]=1: enable ADV_TIMERi. + ''' + } + ] + } + ] +} diff --git a/docs/um/ip/GP_timer2_Advanced_timer/doc/registers.md b/docs/um/ip/GP_timer2_Advanced_timer/doc/registers.md new file mode 100644 index 00000000..d52b1b7b --- /dev/null +++ b/docs/um/ip/GP_timer2_Advanced_timer/doc/registers.md @@ -0,0 +1,1088 @@ +## Summary + +| Name | Offset | Length | Description | +|:--------------------------------------------------|:---------|---------:|:---------------------------------------------------------| +| apb_adv_timer.[`T0_CMD`](#t0_cmd) | 0x0 | 4 | ADV_TIMER0 command register. | +| apb_adv_timer.[`T0_CONFIG`](#t0_config) | 0x4 | 4 | ADV_TIMER0 configuration register. | +| apb_adv_timer.[`T0_THRESHOLD`](#t0_threshold) | 0x8 | 4 | ADV_TIMER0 threshold configuration register. | +| apb_adv_timer.[`T0_TH_CHANNEL0`](#t0_th_channel0) | 0xc | 4 | ADV_TIMER0 channel 0 threshold configuration register. | +| apb_adv_timer.[`T0_TH_CHANNEL1`](#t0_th_channel1) | 0x10 | 4 | ADV_TIMER0 channel 1 threshold configuration register. | +| apb_adv_timer.[`T0_TH_CHANNEL2`](#t0_th_channel2) | 0x14 | 4 | ADV_TIMER0 channel 2 threshold configuration register. | +| apb_adv_timer.[`T0_TH_CHANNEL3`](#t0_th_channel3) | 0x18 | 4 | ADV_TIMER0 channel 3 threshold configuration register. | +| apb_adv_timer.[`T0_COUNTER`](#t0_counter) | 0x1c | 4 | ADV_TIMER0 counter register. | +| apb_adv_timer.[`T1_CMD`](#t1_cmd) | 0x20 | 4 | ADV_TIMER1 command register. | +| apb_adv_timer.[`T1_CONFIG`](#t1_config) | 0x24 | 4 | ADV_TIMER1 configuration register. | +| apb_adv_timer.[`T1_THRESHOLD`](#t1_threshold) | 0x28 | 4 | ADV_TIMER1 threshold configuration register. | +| apb_adv_timer.[`T1_TH_CHANNEL0`](#t1_th_channel0) | 0x2c | 4 | ADV_TIMER1 channel 0 threshold configuration register. | +| apb_adv_timer.[`T1_TH_CHANNEL1`](#t1_th_channel1) | 0x30 | 4 | ADV_TIMER1 channel 1 threshold configuration register. | +| apb_adv_timer.[`T1_TH_CHANNEL2`](#t1_th_channel2) | 0x34 | 4 | ADV_TIMER1 channel 2 threshold configuration register. | +| apb_adv_timer.[`T1_TH_CHANNEL3`](#t1_th_channel3) | 0x38 | 4 | ADV_TIMER1 channel 3 threshold configuration register. | +| apb_adv_timer.[`T1_COUNTER`](#t1_counter) | 0x3c | 4 | ADV_TIMER1 counter register. | +| apb_adv_timer.[`T2_CMD`](#t2_cmd) | 0x40 | 4 | ADV_TIMER2 command register. | +| apb_adv_timer.[`T2_CONFIG`](#t2_config) | 0x44 | 4 | ADV_TIMER2 configuration register. | +| apb_adv_timer.[`T2_THRESHOLD`](#t2_threshold) | 0x48 | 4 | ADV_TIMER2 threshold configuration register. | +| apb_adv_timer.[`T2_TH_CHANNEL0`](#t2_th_channel0) | 0x4c | 4 | ADV_TIMER2 channel 0 threshold configuration register. | +| apb_adv_timer.[`T2_TH_CHANNEL1`](#t2_th_channel1) | 0x50 | 4 | ADV_TIMER2 channel 1 threshold configuration register. | +| apb_adv_timer.[`T2_TH_CHANNEL2`](#t2_th_channel2) | 0x54 | 4 | ADV_TIMER2 channel 2 threshold configuration register. | +| apb_adv_timer.[`T2_TH_CHANNEL3`](#t2_th_channel3) | 0x58 | 4 | ADV_TIMER2 channel 3 threshold configuration register. | +| apb_adv_timer.[`T2_COUNTER`](#t2_counter) | 0x5c | 4 | ADV_TIMER2 counter register. | +| apb_adv_timer.[`T3_CMD`](#t3_cmd) | 0x60 | 4 | ADV_TIMER3 command register. | +| apb_adv_timer.[`T3_CONFIG`](#t3_config) | 0x64 | 4 | ADV_TIMER3 configuration register. | +| apb_adv_timer.[`T3_THRESHOLD`](#t3_threshold) | 0x68 | 4 | ADV_TIMER3 threshold configuration register. | +| apb_adv_timer.[`T3_TH_CHANNEL0`](#t3_th_channel0) | 0x6c | 4 | ADV_TIMER3 channel 0 threshold configuration register. | +| apb_adv_timer.[`T3_TH_CHANNEL1`](#t3_th_channel1) | 0x70 | 4 | ADV_TIMER3 channel 1 threshold configuration register. | +| apb_adv_timer.[`T3_TH_CHANNEL2`](#t3_th_channel2) | 0x74 | 4 | ADV_TIMER3 channel 2 threshold configuration register. | +| apb_adv_timer.[`T3_TH_CHANNEL3`](#t3_th_channel3) | 0x78 | 4 | ADV_TIMER3 channel 3 threshold configuration register. | +| apb_adv_timer.[`T3_COUNTER`](#t3_counter) | 0x7c | 4 | ADV_TIMER3 counter register. | +| apb_adv_timer.[`EVENT_CFG`](#event_cfg) | 0x80 | 4 | ADV_TIMERS events configuration register. | +| apb_adv_timer.[`CG`](#cg) | 0x84 | 4 | ADV_TIMERS channels clock gating configuration register. | + +## T0_CMD +ADV_TIMER0 command register. +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "START", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "STOP", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "UPDATE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RESET", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "ARM", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RFU", "bits": 27, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------| +| 31:5 | wo | 0x0 | RFU | ? | +| 4 | wo | 0x0 | ARM | ADV_TIMER0 arm command bitfield. | +| 3 | wo | 0x0 | RESET | ADV_TIMER0 reset command bitfield. | +| 2 | wo | 0x0 | UPDATE | ADV_TIMER0 update command bitfield. | +| 1 | wo | 0x0 | STOP | ADV_TIMER0 stop command bitfield. | +| 0 | wo | 0x0 | START | ADV_TIMER0 start command bitfield. | + +## T0_CONFIG +ADV_TIMER0 configuration register. +- Offset: `0x4` +- Reset default: `0x1000` +- Reset mask: `0xff1fff` + +### Fields + +```wavejson +{"reg": [{"name": "INSEL", "bits": 8, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"name": "CLKSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "UPDOWNSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 3}, {"name": "PRESC", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------------| +| 31:24 | | | Reserved | +| 23:16 | rw | 0x0 | [PRESC](#t0_config--presc) | +| 15:13 | | | Reserved | +| 12 | rw | 0x1 | [UPDOWNSEL](#t0_config--updownsel) | +| 11 | rw | 0x0 | [CLKSEL](#t0_config--clksel) | +| 10:8 | rw | 0x0 | [MODE](#t0_config--mode) | +| 7:0 | rw | 0x0 | [INSEL](#t0_config--insel) | + +### T0_CONFIG . PRESC +ADV_TIMER0 prescaler value configuration bitfield. + +### T0_CONFIG . UPDOWNSEL +ADV_TIMER0 center-aligned mode configuration bitfield: +- 1'b0: The counter counts up and down alternatively. +- 1'b1: The counter counts up and resets to 0 when reach threshold. + +### T0_CONFIG . CLKSEL +ADV_TIMER0 clock source configuration bitfield: +- 1'b0: FLL +- 1'b1: reference clock at 32kHz + +### T0_CONFIG . MODE +ADV_TIMER0 trigger mode configuration bitfield: +- 3'h0: trigger event at each clock cycle. +- 3'h1: trigger event if input source is 0 +- 3'h2: trigger event if input source is 1 +- 3'h3: trigger event on input source rising edge +- 3'h4: trigger event on input source falling edge +- 3'h5: trigger event on input source falling or rising edge +- 3'h6: trigger event on input source rising edge when armed +- 3'h7: trigger event on input source falling edge when armed + +### T0_CONFIG . INSEL +ADV_TIMER0 input source configuration bitfield: +- 0-31: GPIO[0] to GPIO[31] +- 32-35: Channel 0 to 3 of ADV_TIMER0 +- 36-39: Channel 0 to 3 of ADV_TIMER1 +- 40-43: Channel 0 to 3 of ADV_TIMER2 +- 44-47: Channel 0 to 3 of ADV_TIMER3 + +## T0_THRESHOLD +ADV_TIMER0 threshold configuration register. +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH_LO", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "TH_HI", "bits": 16, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------| +| 31:16 | rw | 0x0 | TH_HI | ADV_TIMER0 threshold high part configuration bitfield. It defines end counter value. | +| 15:0 | rw | 0x0 | TH_LO | ADV_TIMER0 threshold low part configuration bitfield. It defines start counter value. | + +## T0_TH_CHANNEL0 +ADV_TIMER0 channel 0 threshold configuration register. +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t0_th_channel0--mode) | +| 15:0 | rw | 0x0 | [TH](#t0_th_channel0--th) | + +### T0_TH_CHANNEL0 . MODE +ADV_TIMER0 channel 0 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T0_TH_CHANNEL0 . TH +ADV_TIMER0 channel 0 threshold configuration bitfield. + +## T0_TH_CHANNEL1 +ADV_TIMER0 channel 1 threshold configuration register. +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t0_th_channel1--mode) | +| 15:0 | rw | 0x0 | [TH](#t0_th_channel1--th) | + +### T0_TH_CHANNEL1 . MODE +ADV_TIMER0 channel 1 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T0_TH_CHANNEL1 . TH +ADV_TIMER0 channel 1 threshold configuration bitfield. + +## T0_TH_CHANNEL2 +ADV_TIMER0 channel 2 threshold configuration register. +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t0_th_channel2--mode) | +| 15:0 | rw | 0x0 | [TH](#t0_th_channel2--th) | + +### T0_TH_CHANNEL2 . MODE +ADV_TIMER0 channel 2 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T0_TH_CHANNEL2 . TH +ADV_TIMER0 channel 2 threshold configuration bitfield. + +## T0_TH_CHANNEL3 +ADV_TIMER0 channel 3 threshold configuration register. +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t0_th_channel3--mode) | +| 15:0 | rw | 0x0 | [TH](#t0_th_channel3--th) | + +### T0_TH_CHANNEL3 . MODE +ADV_TIMER0 channel 3 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T0_TH_CHANNEL3 . TH +ADV_TIMER0 channel 3 threshold configuration bitfield. + +## T0_COUNTER +ADV_TIMER0 counter register. +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "COUNTER", "bits": 16, "attr": ["ro"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------------------| +| 31:16 | | | | Reserved | +| 15:0 | ro | 0x0 | COUNTER | ADV_TIMER0 counter value. | + +## T1_CMD +ADV_TIMER1 command register. +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0x1f` + +### Fields + +```wavejson +{"reg": [{"name": "START", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "STOP", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "UPDATE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RESET", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "ARM", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 27}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------| +| 31:5 | | | | Reserved | +| 4 | wo | 0x0 | ARM | ADV_TIMER1 arm command bitfield. | +| 3 | wo | 0x0 | RESET | ADV_TIMER1 reset command bitfield. | +| 2 | wo | 0x0 | UPDATE | ADV_TIMER1 update command bitfield. | +| 1 | wo | 0x0 | STOP | ADV_TIMER1 stop command bitfield. | +| 0 | wo | 0x0 | START | ADV_TIMER1 start command bitfield. | + +## T1_CONFIG +ADV_TIMER1 configuration register. +- Offset: `0x24` +- Reset default: `0x1000` +- Reset mask: `0xff1fff` + +### Fields + +```wavejson +{"reg": [{"name": "INSEL", "bits": 8, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"name": "CLKSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "UPDOWNSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 3}, {"name": "PRESC", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------------| +| 31:24 | | | Reserved | +| 23:16 | rw | 0x0 | [PRESC](#t1_config--presc) | +| 15:13 | | | Reserved | +| 12 | rw | 0x1 | [UPDOWNSEL](#t1_config--updownsel) | +| 11 | rw | 0x0 | [CLKSEL](#t1_config--clksel) | +| 10:8 | rw | 0x0 | [MODE](#t1_config--mode) | +| 7:0 | rw | 0x0 | [INSEL](#t1_config--insel) | + +### T1_CONFIG . PRESC +ADV_TIMER1 prescaler value configuration bitfield. + +### T1_CONFIG . UPDOWNSEL +ADV_TIMER1 center-aligned mode configuration bitfield: +- 1'b0: The counter counts up and down alternatively. +- 1'b1: The counter counts up and resets to 0 when reach threshold. + +### T1_CONFIG . CLKSEL +ADV_TIMER1 clock source configuration bitfield: +- 1'b0: FLL +- 1'b1: reference clock at 32kHz + +### T1_CONFIG . MODE +ADV_TIMER1 trigger mode configuration bitfield: +- 3'h0: trigger event at each clock cycle. +- 3'h1: trigger event if input source is 0 +- 3'h2: trigger event if input source is 1 +- 3'h3: trigger event on input source rising edge +- 3'h4: trigger event on input source falling edge +- 3'h5: trigger event on input source falling or rising edge +- 3'h6: trigger event on input source rising edge when armed +- 3'h7: trigger event on input source falling edge when armed + +### T1_CONFIG . INSEL +ADV_TIMER1 input source configuration bitfield: +- 0-31: GPIO[0] to GPIO[31] +- 32-35: Channel 0 to 3 of ADV_TIMER0 +- 36-39: Channel 0 to 3 of ADV_TIMER1 +- 40-43: Channel 0 to 3 of ADV_TIMER2 +- 44-47: Channel 0 to 3 of ADV_TIMER3 + +## T1_THRESHOLD +ADV_TIMER1 threshold configuration register. +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH_LO", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "TH_HI", "bits": 16, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------| +| 31:16 | rw | 0x0 | TH_HI | ADV_TIMER1 threshold high part configuration bitfield. It defines end counter value. | +| 15:0 | rw | 0x0 | TH_LO | ADV_TIMER1 threshold low part configuration bitfield. It defines start counter value. | + +## T1_TH_CHANNEL0 +ADV_TIMER1 channel 0 threshold configuration register. +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t1_th_channel0--mode) | +| 15:0 | rw | 0x0 | [TH](#t1_th_channel0--th) | + +### T1_TH_CHANNEL0 . MODE +ADV_TIMER1 channel 0 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T1_TH_CHANNEL0 . TH +ADV_TIMER1 channel 0 threshold configuration bitfield. + +## T1_TH_CHANNEL1 +ADV_TIMER1 channel 1 threshold configuration register. +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t1_th_channel1--mode) | +| 15:0 | rw | 0x0 | [TH](#t1_th_channel1--th) | + +### T1_TH_CHANNEL1 . MODE +ADV_TIMER1 channel 1 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T1_TH_CHANNEL1 . TH +ADV_TIMER1 channel 1 threshold configuration bitfield. + +## T1_TH_CHANNEL2 +ADV_TIMER1 channel 2 threshold configuration register. +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t1_th_channel2--mode) | +| 15:0 | rw | 0x0 | [TH](#t1_th_channel2--th) | + +### T1_TH_CHANNEL2 . MODE +ADV_TIMER1 channel 2 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T1_TH_CHANNEL2 . TH +ADV_TIMER1 channel 2 threshold configuration bitfield. + +## T1_TH_CHANNEL3 +ADV_TIMER1 channel 3 threshold configuration register. +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t1_th_channel3--mode) | +| 15:0 | rw | 0x0 | [TH](#t1_th_channel3--th) | + +### T1_TH_CHANNEL3 . MODE +ADV_TIMER1 channel 3 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T1_TH_CHANNEL3 . TH +ADV_TIMER1 channel 3 threshold configuration bitfield. + +## T1_COUNTER +ADV_TIMER1 counter register. +- Offset: `0x3c` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "COUNTER", "bits": 16, "attr": ["ro"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------------------| +| 31:16 | | | | Reserved | +| 15:0 | ro | 0x0 | COUNTER | ADV_TIMER1 counter value. | + +## T2_CMD +ADV_TIMER2 command register. +- Offset: `0x40` +- Reset default: `0x0` +- Reset mask: `0x1f` + +### Fields + +```wavejson +{"reg": [{"name": "START", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "STOP", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "UPDATE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RESET", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "ARM", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 27}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------| +| 31:5 | | | | Reserved | +| 4 | wo | 0x0 | ARM | ADV_TIMER2 arm command bitfield. | +| 3 | wo | 0x0 | RESET | ADV_TIMER2 reset command bitfield. | +| 2 | wo | 0x0 | UPDATE | ADV_TIMER2 update command bitfield. | +| 1 | wo | 0x0 | STOP | ADV_TIMER2 stop command bitfield. | +| 0 | wo | 0x0 | START | ADV_TIMER2 start command bitfield. | + +## T2_CONFIG +ADV_TIMER2 configuration register. +- Offset: `0x44` +- Reset default: `0x1000` +- Reset mask: `0xff1fff` + +### Fields + +```wavejson +{"reg": [{"name": "INSEL", "bits": 8, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"name": "CLKSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "UPDOWNSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 3}, {"name": "PRESC", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------------| +| 31:24 | | | Reserved | +| 23:16 | rw | 0x0 | [PRESC](#t2_config--presc) | +| 15:13 | | | Reserved | +| 12 | rw | 0x1 | [UPDOWNSEL](#t2_config--updownsel) | +| 11 | rw | 0x0 | [CLKSEL](#t2_config--clksel) | +| 10:8 | rw | 0x0 | [MODE](#t2_config--mode) | +| 7:0 | rw | 0x0 | [INSEL](#t2_config--insel) | + +### T2_CONFIG . PRESC +ADV_TIMER2 prescaler value configuration bitfield. + +### T2_CONFIG . UPDOWNSEL +ADV_TIMER2 center-aligned mode configuration bitfield: +- 1'b0: The counter counts up and down alternatively. +- 1'b1: The counter counts up and resets to 0 when reach threshold. + +### T2_CONFIG . CLKSEL +ADV_TIMER2 clock source configuration bitfield: +- 1'b0: FLL +- 1'b1: reference clock at 32kHz + +### T2_CONFIG . MODE +ADV_TIMER2 trigger mode configuration bitfield: +- 3'h0: trigger event at each clock cycle. +- 3'h1: trigger event if input source is 0 +- 3'h2: trigger event if input source is 1 +- 3'h3: trigger event on input source rising edge +- 3'h4: trigger event on input source falling edge +- 3'h5: trigger event on input source falling or rising edge +- 3'h6: trigger event on input source rising edge when armed +- 3'h7: trigger event on input source falling edge when armed + +### T2_CONFIG . INSEL +ADV_TIMER2 input source configuration bitfield: +- 0-31: GPIO[0] to GPIO[31] +- 32-35: Channel 0 to 3 of ADV_TIMER0 +- 36-39: Channel 0 to 3 of ADV_TIMER1 +- 40-43: Channel 0 to 3 of ADV_TIMER2 +- 44-47: Channel 0 to 3 of ADV_TIMER3 + +## T2_THRESHOLD +ADV_TIMER2 threshold configuration register. +- Offset: `0x48` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH_LO", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "TH_HI", "bits": 16, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------| +| 31:16 | rw | 0x0 | TH_HI | ADV_TIMER2 threshold high part configuration bitfield. It defines end counter value. | +| 15:0 | rw | 0x0 | TH_LO | ADV_TIMER2 threshold low part configuration bitfield. It defines start counter value. | + +## T2_TH_CHANNEL0 +ADV_TIMER2 channel 0 threshold configuration register. +- Offset: `0x4c` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t2_th_channel0--mode) | +| 15:0 | rw | 0x0 | [TH](#t2_th_channel0--th) | + +### T2_TH_CHANNEL0 . MODE +ADV_TIMER2 channel 0 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T2_TH_CHANNEL0 . TH +ADV_TIMER2 channel 0 threshold configuration bitfield. + +## T2_TH_CHANNEL1 +ADV_TIMER2 channel 1 threshold configuration register. +- Offset: `0x50` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t2_th_channel1--mode) | +| 15:0 | rw | 0x0 | [TH](#t2_th_channel1--th) | + +### T2_TH_CHANNEL1 . MODE +ADV_TIMER2 channel 1 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T2_TH_CHANNEL1 . TH +ADV_TIMER2 channel 1 threshold configuration bitfield. + +## T2_TH_CHANNEL2 +ADV_TIMER2 channel 2 threshold configuration register. +- Offset: `0x54` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t2_th_channel2--mode) | +| 15:0 | rw | 0x0 | [TH](#t2_th_channel2--th) | + +### T2_TH_CHANNEL2 . MODE +ADV_TIMER2 channel 2 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T2_TH_CHANNEL2 . TH +ADV_TIMER2 channel 2 threshold configuration bitfield. + +## T2_TH_CHANNEL3 +ADV_TIMER2 channel 3 threshold configuration register. +- Offset: `0x58` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t2_th_channel3--mode) | +| 15:0 | rw | 0x0 | [TH](#t2_th_channel3--th) | + +### T2_TH_CHANNEL3 . MODE +ADV_TIMER2 channel 3 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T2_TH_CHANNEL3 . TH +ADV_TIMER2 channel 3 threshold configuration bitfield. + +## T2_COUNTER +ADV_TIMER2 counter register. +- Offset: `0x5c` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "COUNTER", "bits": 16, "attr": ["ro"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------------------| +| 31:16 | | | | Reserved | +| 15:0 | ro | 0x0 | COUNTER | ADV_TIMER2 counter value. | + +## T3_CMD +ADV_TIMER3 command register. +- Offset: `0x60` +- Reset default: `0x0` +- Reset mask: `0x1f` + +### Fields + +```wavejson +{"reg": [{"name": "START", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "STOP", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "UPDATE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RESET", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "ARM", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 27}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------| +| 31:5 | | | | Reserved | +| 4 | wo | 0x0 | ARM | ADV_TIMER3 arm command bitfield. | +| 3 | wo | 0x0 | RESET | ADV_TIMER3 reset command bitfield. | +| 2 | wo | 0x0 | UPDATE | ADV_TIMER3 update command bitfield. | +| 1 | wo | 0x0 | STOP | ADV_TIMER3 stop command bitfield. | +| 0 | wo | 0x0 | START | ADV_TIMER3 start command bitfield. | + +## T3_CONFIG +ADV_TIMER3 configuration register. +- Offset: `0x64` +- Reset default: `0x1000` +- Reset mask: `0xff1fff` + +### Fields + +```wavejson +{"reg": [{"name": "INSEL", "bits": 8, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"name": "CLKSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "UPDOWNSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 3}, {"name": "PRESC", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------------| +| 31:24 | | | Reserved | +| 23:16 | rw | 0x0 | [PRESC](#t3_config--presc) | +| 15:13 | | | Reserved | +| 12 | rw | 0x1 | [UPDOWNSEL](#t3_config--updownsel) | +| 11 | rw | 0x0 | [CLKSEL](#t3_config--clksel) | +| 10:8 | rw | 0x0 | [MODE](#t3_config--mode) | +| 7:0 | rw | 0x0 | [INSEL](#t3_config--insel) | + +### T3_CONFIG . PRESC +ADV_TIMER3 prescaler value configuration bitfield. + +### T3_CONFIG . UPDOWNSEL +ADV_TIMER3 center-aligned mode configuration bitfield: +- 1'b0: The counter counts up and down alternatively. +- 1'b1: The counter counts up and resets to 0 when reach threshold. + +### T3_CONFIG . CLKSEL +ADV_TIMER3 clock source configuration bitfield: +- 1'b0: FLL +- 1'b1: reference clock at 32kHz + +### T3_CONFIG . MODE +ADV_TIMER3 trigger mode configuration bitfield: +- 3'h0: trigger event at each clock cycle. +- 3'h1: trigger event if input source is 0 +- 3'h2: trigger event if input source is 1 +- 3'h3: trigger event on input source rising edge +- 3'h4: trigger event on input source falling edge +- 3'h5: trigger event on input source falling or rising edge +- 3'h6: trigger event on input source rising edge when armed +- 3'h7: trigger event on input source falling edge when armed + +### T3_CONFIG . INSEL +ADV_TIMER3 input source configuration bitfield: +- 0-31: GPIO[0] to GPIO[31] +- 32-35: Channel 0 to 3 of ADV_TIMER0 +- 36-39: Channel 0 to 3 of ADV_TIMER1 +- 40-43: Channel 0 to 3 of ADV_TIMER2 +- 44-47: Channel 0 to 3 of ADV_TIMER3 + +## T3_THRESHOLD +ADV_TIMER3 threshold configuration register. +- Offset: `0x68` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH_LO", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "TH_HI", "bits": 16, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------| +| 31:16 | rw | 0x0 | TH_HI | ADV_TIMER3 threshold high part configuration bitfield. It defines end counter value. | +| 15:0 | rw | 0x0 | TH_LO | ADV_TIMER3 threshold low part configuration bitfield. It defines start counter value. | + +## T3_TH_CHANNEL0 +ADV_TIMER3 channel 0 threshold configuration register. +- Offset: `0x6c` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t3_th_channel0--mode) | +| 15:0 | rw | 0x0 | [TH](#t3_th_channel0--th) | + +### T3_TH_CHANNEL0 . MODE +ADV_TIMER3 channel 0 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T3_TH_CHANNEL0 . TH +ADV_TIMER3 channel 0 threshold configuration bitfield. + +## T3_TH_CHANNEL1 +ADV_TIMER3 channel 1 threshold configuration register. +- Offset: `0x70` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t3_th_channel1--mode) | +| 15:0 | rw | 0x0 | [TH](#t3_th_channel1--th) | + +### T3_TH_CHANNEL1 . MODE +ADV_TIMER3 channel 1 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T3_TH_CHANNEL1 . TH +ADV_TIMER3 channel 1 threshold configuration bitfield. + +## T3_TH_CHANNEL2 +ADV_TIMER3 channel 2 threshold configuration register. +- Offset: `0x74` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t3_th_channel2--mode) | +| 15:0 | rw | 0x0 | [TH](#t3_th_channel2--th) | + +### T3_TH_CHANNEL2 . MODE +ADV_TIMER3 channel 2 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T3_TH_CHANNEL2 . TH +ADV_TIMER3 channel 2 threshold configuration bitfield. + +## T3_TH_CHANNEL3 +ADV_TIMER3 channel 3 threshold configuration register. +- Offset: `0x78` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t3_th_channel3--mode) | +| 15:0 | rw | 0x0 | [TH](#t3_th_channel3--th) | + +### T3_TH_CHANNEL3 . MODE +ADV_TIMER3 channel 3 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T3_TH_CHANNEL3 . TH +ADV_TIMER3 channel 3 threshold configuration bitfield. + +## T3_COUNTER +ADV_TIMER3 counter register. +- Offset: `0x7c` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "COUNTER", "bits": 16, "attr": ["ro"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------------------| +| 31:16 | | | | Reserved | +| 15:0 | ro | 0x0 | COUNTER | ADV_TIMER3 counter value. | + +## EVENT_CFG +ADV_TIMERS events configuration register. +- Offset: `0x80` +- Reset default: `0x0` +- Reset mask: `0xfffff` + +### Fields + +```wavejson +{"reg": [{"name": "SEL0", "bits": 4, "attr": ["rw"], "rotate": 0}, {"name": "SEL1", "bits": 4, "attr": ["rw"], "rotate": 0}, {"name": "SEL2", "bits": 4, "attr": ["rw"], "rotate": 0}, {"name": "SEL3", "bits": 4, "attr": ["rw"], "rotate": 0}, {"name": "ENA", "bits": 4, "attr": ["rw"], "rotate": 0}, {"bits": 12}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-------------------------| +| 31:20 | | | Reserved | +| 19:16 | rw | 0x0 | [ENA](#event_cfg--ena) | +| 15:12 | rw | 0x0 | [SEL3](#event_cfg--sel3) | +| 11:8 | rw | 0x0 | [SEL2](#event_cfg--sel2) | +| 7:4 | rw | 0x0 | [SEL1](#event_cfg--sel1) | +| 3:0 | rw | 0x0 | [SEL0](#event_cfg--sel0) | + +### EVENT_CFG . ENA +ADV_TIMER output event enable configuration bitfield. ENA[i]=1 enables output event i generation. + +### EVENT_CFG . SEL3 +ADV_TIMER output event 3 source configuration bitfiled: +- 4'h0: ADV_TIMER0 channel 0. +- 4'h1: ADV_TIMER0 channel 1. +- 4'h2: ADV_TIMER0 channel 2. +- 4'h3: ADV_TIMER0 channel 3. +- 4'h4: ADV_TIMER1 channel 0. +- 4'h5: ADV_TIMER1 channel 1. +- 4'h6: ADV_TIMER1 channel 2. +- 4'h7: ADV_TIMER1 channel 3. +- 4'h8: ADV_TIMER2 channel 0. +- 4'h9: ADV_TIMER2 channel 1. +- 4'hA: ADV_TIMER2 channel 2. +- 4'hB: ADV_TIMER2 channel 3. +- 4'hC: ADV_TIMER3 channel 0. +- 4'hD: ADV_TIMER3 channel 1. +- 4'hE: ADV_TIMER3 channel 2. +- 4'hF: ADV_TIMER3 channel 3. + +### EVENT_CFG . SEL2 +ADV_TIMER output event 2 source configuration bitfiled: +- 4'h0: ADV_TIMER0 channel 0. +- 4'h1: ADV_TIMER0 channel 1. +- 4'h2: ADV_TIMER0 channel 2. +- 4'h3: ADV_TIMER0 channel 3. +- 4'h4: ADV_TIMER1 channel 0. +- 4'h5: ADV_TIMER1 channel 1. +- 4'h6: ADV_TIMER1 channel 2. +- 4'h7: ADV_TIMER1 channel 3. +- 4'h8: ADV_TIMER2 channel 0. +- 4'h9: ADV_TIMER2 channel 1. +- 4'hA: ADV_TIMER2 channel 2. +- 4'hB: ADV_TIMER2 channel 3. +- 4'hC: ADV_TIMER3 channel 0. +- 4'hD: ADV_TIMER3 channel 1. +- 4'hE: ADV_TIMER3 channel 2. +- 4'hF: ADV_TIMER3 channel 3. + +### EVENT_CFG . SEL1 +ADV_TIMER output event 1 source configuration bitfiled: +- 4'h0: ADV_TIMER0 channel 0. +- 4'h1: ADV_TIMER0 channel 1. +- 4'h2: ADV_TIMER0 channel 2. +- 4'h3: ADV_TIMER0 channel 3. +- 4'h4: ADV_TIMER1 channel 0. +- 4'h5: ADV_TIMER1 channel 1. +- 4'h6: ADV_TIMER1 channel 2. +- 4'h7: ADV_TIMER1 channel 3. +- 4'h8: ADV_TIMER2 channel 0. +- 4'h9: ADV_TIMER2 channel 1. +- 4'hA: ADV_TIMER2 channel 2. +- 4'hB: ADV_TIMER2 channel 3. +- 4'hC: ADV_TIMER3 channel 0. +- 4'hD: ADV_TIMER3 channel 1. +- 4'hE: ADV_TIMER3 channel 2. +- 4'hF: ADV_TIMER3 channel 3. + +### EVENT_CFG . SEL0 +ADV_TIMER output event 0 source configuration bitfiled: +- 4'h0: ADV_TIMER0 channel 0. +- 4'h1: ADV_TIMER0 channel 1. +- 4'h2: ADV_TIMER0 channel 2. +- 4'h3: ADV_TIMER0 channel 3. +- 4'h4: ADV_TIMER1 channel 0. +- 4'h5: ADV_TIMER1 channel 1. +- 4'h6: ADV_TIMER1 channel 2. +- 4'h7: ADV_TIMER1 channel 3. +- 4'h8: ADV_TIMER2 channel 0. +- 4'h9: ADV_TIMER2 channel 1. +- 4'hA: ADV_TIMER2 channel 2. +- 4'hB: ADV_TIMER2 channel 3. +- 4'hC: ADV_TIMER3 channel 0. +- 4'hD: ADV_TIMER3 channel 1. +- 4'hE: ADV_TIMER3 channel 2. +- 4'hF: ADV_TIMER3 channel 3. + +## CG +ADV_TIMERS channels clock gating configuration register. +- Offset: `0x84` +- Reset default: `0x0` +- Reset mask: `0xf` + +### Fields + +```wavejson +{"reg": [{"name": "ENA", "bits": 4, "attr": ["rw"], "rotate": 0}, {"bits": 28}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------------------------------------------| +| 31:4 | | | | Reserved | +| 3:0 | rw | 0x0 | ENA | ADV_TIMER clock gating configuration bitfield. - ENA[i]=0: clock gate ADV_TIMERi. - ENA[i]=1: enable ADV_TIMERi. | + diff --git a/docs/um/ip/L2_ECC_Config/data/ecc_sram_wrapper.hjson b/docs/um/ip/L2_ECC_Config/data/ecc_sram_wrapper.hjson new file mode 100644 index 00000000..412bda5d --- /dev/null +++ b/docs/um/ip/L2_ECC_Config/data/ecc_sram_wrapper.hjson @@ -0,0 +1,86 @@ +{ + name: "ECC_manager", + clock_primary: "clk_i", + reset_primary: "rst_ni", + bus_interfaces: [ + { protocol: "reg_iface", + direction: "device" + } + ], + + regwidth: "32", + + registers: [ + { name: "mismatch_count", + desc: "Correctable mismatches caught by ecc on access", + swaccess: "rw0c", + hwaccess: "hrw", + resval: "0", + fields: [ + { bits: "31:0", + name: "correctable_mismatches", + desc: "Correctable mismatches caught by ecc on access" + } + ] + }, + { name: "scrub_interval", + desc: "Interval between scrubs", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0" + name: "scrub_interval" + desc: "Interval between scrubs" + } + ] + }, + { name: "scrub_fix_count", + desc: "Correctable mismatches caught by ecc on scrub", + swaccess: "rw0c", + hwaccess: "hrw", + resval: "0", + fields: [ + { bits: "31:0", + name: "correctable_mismatches", + desc: "Correctable mismatches caught by ecc on scrub" + } + ] + }, + { name: "scrub_uncorrectable_count", + desc: "Uncorrectable mismatches caught by ecc on scrub", + swaccess: "rw0c", + hwaccess: "hrw", + resval: "0", + fields: [ + { bits: "31:0", + name: "uncorrectable_mismatches", + desc: "Uncorrectable mismatches caught by ecc on scrub" + } + ] + }, + { name: "write_mask_data_n", + desc: "Testing: Inverted write mask for data bits", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + fields: [ + { bits: "31:0", + name: "write_mask_data_n", + desc: "Testing: Inverted write mask for data bits" + } + ] + }, + { name: "write_mask_ecc_n", + desc: "Testing: Inverted write mask for ECC bits", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + fields: [ + { bits: "6:0", + name: "write_mask_ecc_n", + desc: "Testing: Inverted write mask for ECC bits" + } + ] + } + ], +} \ No newline at end of file diff --git a/docs/um/ip/L2_ECC_Config/data/ecc_sram_wrapper_doc.hjson b/docs/um/ip/L2_ECC_Config/data/ecc_sram_wrapper_doc.hjson new file mode 100644 index 00000000..7a2db8a3 --- /dev/null +++ b/docs/um/ip/L2_ECC_Config/data/ecc_sram_wrapper_doc.hjson @@ -0,0 +1,94 @@ +// Copyright 2020 ETH Zurich and University of Bologna. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 +// +// Author: Michael Rogenmoser + +{ + name: "ECC_manager", + cip_id: "36", + version: "0.0.0", // null, commit 5616a36 + clocking: [ + {clock: "clk_i", reset: "rst_ni", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", + direction: "device" + } + ], + + regwidth: "32", + registers: [ + { name: "mismatch_count", + desc: "Correctable mismatches caught by ecc on access", + swaccess: "rw0c", + hwaccess: "hrw", + resval: "0", + fields: [ + { bits: "31:0", + name: "correctable_mismatches", + desc: "Correctable mismatches caught by ecc on access" + } + ] + }, + { name: "scrub_interval", + desc: "Interval between scrubs", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0" + name: "scrub_interval" + desc: "Interval between scrubs" + } + ] + }, + { name: "scrub_fix_count", + desc: "Correctable mismatches caught by ecc on scrub", + swaccess: "rw0c", + hwaccess: "hrw", + resval: "0", + fields: [ + { bits: "31:0", + name: "correctable_mismatches", + desc: "Correctable mismatches caught by ecc on scrub" + } + ] + }, + { name: "scrub_uncorrectable_count", + desc: "Uncorrectable mismatches caught by ecc on scrub", + swaccess: "rw0c", + hwaccess: "hrw", + resval: "0", + fields: [ + { bits: "31:0", + name: "uncorrectable_mismatches", + desc: "Uncorrectable mismatches caught by ecc on scrub" + } + ] + }, + { name: "write_mask_data_n", + desc: "Testing: Inverted write mask for data bits", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + fields: [ + { bits: "31:0", + name: "write_mask_data_n", + desc: "Testing: Inverted write mask for data bits" + } + ] + }, + { name: "write_mask_ecc_n", + desc: "Testing: Inverted write mask for ECC bits", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + fields: [ + { bits: "6:0", + name: "write_mask_ecc_n", + desc: "Testing: Inverted write mask for ECC bits" + } + ] + } + ], +} \ No newline at end of file diff --git a/docs/um/ip/L2_ECC_Config/doc/registers.md b/docs/um/ip/L2_ECC_Config/doc/registers.md new file mode 100644 index 00000000..6a6d27df --- /dev/null +++ b/docs/um/ip/L2_ECC_Config/doc/registers.md @@ -0,0 +1,108 @@ +## Summary + +| Name | Offset | Length | Description | +|:----------------------------------------------------------------------|:---------|---------:|:------------------------------------------------| +| ECC_manager.[`mismatch_count`](#mismatch_count) | 0x0 | 4 | Correctable mismatches caught by ecc on access | +| ECC_manager.[`scrub_interval`](#scrub_interval) | 0x4 | 4 | Interval between scrubs | +| ECC_manager.[`scrub_fix_count`](#scrub_fix_count) | 0x8 | 4 | Correctable mismatches caught by ecc on scrub | +| ECC_manager.[`scrub_uncorrectable_count`](#scrub_uncorrectable_count) | 0xc | 4 | Uncorrectable mismatches caught by ecc on scrub | +| ECC_manager.[`write_mask_data_n`](#write_mask_data_n) | 0x10 | 4 | Testing: Inverted write mask for data bits | +| ECC_manager.[`write_mask_ecc_n`](#write_mask_ecc_n) | 0x14 | 4 | Testing: Inverted write mask for ECC bits | + +## mismatch_count +Correctable mismatches caught by ecc on access +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "correctable_mismatches", "bits": 32, "attr": ["rw0c"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------|:-----------------------------------------------| +| 31:0 | rw0c | 0x0 | correctable_mismatches | Correctable mismatches caught by ecc on access | + +## scrub_interval +Interval between scrubs +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "scrub_interval", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:------------------------| +| 31:0 | rw | 0x0 | scrub_interval | Interval between scrubs | + +## scrub_fix_count +Correctable mismatches caught by ecc on scrub +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "correctable_mismatches", "bits": 32, "attr": ["rw0c"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------|:----------------------------------------------| +| 31:0 | rw0c | 0x0 | correctable_mismatches | Correctable mismatches caught by ecc on scrub | + +## scrub_uncorrectable_count +Uncorrectable mismatches caught by ecc on scrub +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "uncorrectable_mismatches", "bits": 32, "attr": ["rw0c"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------------|:------------------------------------------------| +| 31:0 | rw0c | 0x0 | uncorrectable_mismatches | Uncorrectable mismatches caught by ecc on scrub | + +## write_mask_data_n +Testing: Inverted write mask for data bits +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "write_mask_data_n", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:-------------------------------------------| +| 31:0 | rw | 0x0 | write_mask_data_n | Testing: Inverted write mask for data bits | + +## write_mask_ecc_n +Testing: Inverted write mask for ECC bits +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0x7f` + +### Fields + +```wavejson +{"reg": [{"name": "write_mask_ecc_n", "bits": 7, "attr": ["rw"], "rotate": -90}, {"bits": 25}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:------------------------------------------| +| 31:7 | | | | Reserved | +| 6:0 | rw | 0x0 | write_mask_ecc_n | Testing: Inverted write mask for ECC bits | + diff --git a/docs/um/ip/axi_dma_config/data/idma_desc64_frontend.hjson b/docs/um/ip/axi_dma_config/data/idma_desc64_frontend.hjson new file mode 100644 index 00000000..020cb557 --- /dev/null +++ b/docs/um/ip/axi_dma_config/data/idma_desc64_frontend.hjson @@ -0,0 +1,67 @@ + +// Copyright 2022 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51 + +// Axel Vanoni + +{ + name: idma_desc64 + regwidth: 64 + clock_primary: clk_i + bus_interfaces: [ + { + protocol: reg_iface + direction: device + } + ] + registers: [ + { + name: desc_addr + desc: + ''' + This register specifies the bus address at which the first transfer + descriptor can be found. A write to this register starts the transfer. + ''' + swaccess: wo + hwaccess: hro + hwqe: true + resval: 0xFFFFFFFFFFFFFFFF + fields: [ + { + bits: "63:0" + } + ] + } + { + name: status + desc: + ''' + This register contains status information for the DMA. + ''' + swaccess: ro + hwaccess: hwo + resval: 0 + fields: [ + { + name: "busy" + desc: + ''' + The DMA is busy + ''' + bits: "0" + } + { + name: "fifo_full" + desc: + ''' + If this bit is set, the buffers of the DMA are full. Any further submissions via the + desc_addr register may overwrite previously submitted jobs or get lost. + ''' + bits: "1" + } + ] + } + ] +} diff --git a/docs/um/ip/axi_dma_config/data/idma_desc64_frontend_doc.hjson b/docs/um/ip/axi_dma_config/data/idma_desc64_frontend_doc.hjson new file mode 100644 index 00000000..59c619e4 --- /dev/null +++ b/docs/um/ip/axi_dma_config/data/idma_desc64_frontend_doc.hjson @@ -0,0 +1,71 @@ + +// Copyright 2022 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51 + +// Axel Vanoni + +{ + name: idma_desc64 + regwidth: 64 + cip_id: "36", + version: "0.5.1", + clocking: [ + {clock: "clk_i", reset: "rst_ni", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { + protocol: tlul + direction: device + } + ] + registers: [ + { + name: desc_addr + desc: + ''' + This register specifies the bus address at which the first transfer + descriptor can be found. A write to this register starts the transfer. + ''' + swaccess: wo + hwaccess: hro + hwqe: true + resval: 0xFFFFFFFFFFFFFFFF + fields: [ + { + bits: "63:0" + } + ] + } + { + name: status + desc: + ''' + This register contains status information for the DMA. + ''' + swaccess: ro + hwaccess: hwo + resval: 0 + fields: [ + { + name: "busy" + desc: + ''' + The DMA is busy + ''' + bits: "0" + } + { + name: "fifo_full" + desc: + ''' + If this bit is set, the buffers of the DMA are full. Any further submissions via the + desc_addr register may overwrite previously submitted jobs or get lost. + ''' + bits: "1" + } + ] + } + ] +} diff --git a/docs/um/ip/axi_dma_config/data/idma_reg32_2d_frontend.hjson b/docs/um/ip/axi_dma_config/data/idma_reg32_2d_frontend.hjson new file mode 100644 index 00000000..63e8ff3a --- /dev/null +++ b/docs/um/ip/axi_dma_config/data/idma_reg32_2d_frontend.hjson @@ -0,0 +1,147 @@ +// Copyright 2022 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51 + +{ + name: "idma_reg32_2d_frontend", + clock_primary: "clk_i", + reset_primary: "rst_ni", + bus_interfaces: [ + { protocol: "reg_iface", + direction: "device" + } + ], + + regwidth: "32", + registers: [ + { name: "src_addr", + desc: "Source Address", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0", + name: "src_addr", + desc: "Source Address" + } + ] + }, + { name: "dst_addr", + desc: "Destination Address", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0", + name: "dst_addr", + desc: "Destination Address" + } + ] + }, + { name: "num_bytes", + desc: "Number of bytes", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0", + name: "num_bytes", + desc: "Number of bytes" + } + ] + }, + { name: "conf", + desc: "Configuration Register for DMA settings", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "0", + name: "decouple", + desc: "Decouple enable" + }, + { bits: "1", + name: "deburst", + desc: "Deburst enable" + }, + { bits: "2", + name: "serialize", + desc: "Serialize enable" + }, + { bits: "3", + name: "twod", + desc: "2D transfer" + } + ] + }, + { name: "stride_src", + desc: "Source Stride", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0", + name: "stride_src", + desc: "Source Stride" + } + ] + }, + { name: "stride_dst" + desc: "Destination Stride", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0", + name: "stride_dst", + desc: "Destination Stride" + } + ] + }, + { name: "num_repetitions" + desc: "Number of 2D repetitions", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0", + name: "num_repetitions", + desc: "Number of 2D repetitions", + resval: "1" + } + ] + }, + { name: "status", + desc: "DMA Status", + swaccess: "ro", + hwaccess: "hwo", + hwext: "true", + fields: [ + { bits: "15:0", + name: "busy", + desc: "DMA busy" + } + ] + }, + { name: "next_id", + desc: "Next ID, launches transfer, returns 0 if transfer not set up properly.", + swaccess: "ro", + hwaccess: "hrw", + hwext: "true", + hwre: "true", + fields: [ + { bits: "31:0", + name: "next_id", + desc: "Next ID, launches transfer, returns 0 if transfer not set up properly." + } + ] + }, + { name: "done", + desc: "Get ID of finished transactions.", + swaccess: "ro", + hwaccess: "hrw", + hwext: "true", + hwre: "true", + fields: [ + { bits: "31:0", + name: "done", + desc: "Get ID of finished transactions." + } + ] + } + ] +} \ No newline at end of file diff --git a/docs/um/ip/axi_dma_config/data/idma_reg32_2d_frontend_doc.hjson b/docs/um/ip/axi_dma_config/data/idma_reg32_2d_frontend_doc.hjson new file mode 100644 index 00000000..d3a0bb2b --- /dev/null +++ b/docs/um/ip/axi_dma_config/data/idma_reg32_2d_frontend_doc.hjson @@ -0,0 +1,150 @@ +// Copyright 2022 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51 + +{ + name: "idma_reg32_2d_frontend", + cip_id: "36", + version: "0.5.1", + clocking: [ + {clock: "clk_i", reset: "rst_ni", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", + direction: "device" + } + ], + + regwidth: "32", + registers: [ + { name: "src_addr", + desc: "Source Address", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0", + name: "src_addr", + desc: "Source Address" + } + ] + }, + { name: "dst_addr", + desc: "Destination Address", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0", + name: "dst_addr", + desc: "Destination Address" + } + ] + }, + { name: "num_bytes", + desc: "Number of bytes", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0", + name: "num_bytes", + desc: "Number of bytes" + } + ] + }, + { name: "conf", + desc: "Configuration Register for DMA settings", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "0", + name: "decouple", + desc: "Decouple enable" + }, + { bits: "1", + name: "deburst", + desc: "Deburst enable" + }, + { bits: "2", + name: "serialize", + desc: "Serialize enable" + }, + { bits: "3", + name: "twod", + desc: "2D transfer" + } + ] + }, + { name: "stride_src", + desc: "Source Stride", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0", + name: "stride_src", + desc: "Source Stride" + } + ] + }, + { name: "stride_dst" + desc: "Destination Stride", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0", + name: "stride_dst", + desc: "Destination Stride" + } + ] + }, + { name: "num_repetitions" + desc: "Number of 2D repetitions", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0", + name: "num_repetitions", + desc: "Number of 2D repetitions", + resval: "1" + } + ] + }, + { name: "status", + desc: "DMA Status", + swaccess: "ro", + hwaccess: "hwo", + hwext: "true", + fields: [ + { bits: "15:0", + name: "busy", + desc: "DMA busy" + } + ] + }, + { name: "next_id", + desc: "Next ID, launches transfer, returns 0 if transfer not set up properly.", + swaccess: "ro", + hwaccess: "hrw", + hwext: "true", + hwre: "true", + fields: [ + { bits: "31:0", + name: "next_id", + desc: "Next ID, launches transfer, returns 0 if transfer not set up properly." + } + ] + }, + { name: "done", + desc: "Get ID of finished transactions.", + swaccess: "ro", + hwaccess: "hrw", + hwext: "true", + hwre: "true", + fields: [ + { bits: "31:0", + name: "done", + desc: "Get ID of finished transactions." + } + ] + } + ] +} \ No newline at end of file diff --git a/docs/um/ip/axi_dma_config/data/idma_reg64_2d_frontend.hjson b/docs/um/ip/axi_dma_config/data/idma_reg64_2d_frontend.hjson new file mode 100644 index 00000000..89b602d8 --- /dev/null +++ b/docs/um/ip/axi_dma_config/data/idma_reg64_2d_frontend.hjson @@ -0,0 +1,142 @@ +// Copyright 2022 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51 + +{ + name: "idma_reg64_2d_frontend", + clock_primary: "clk_i", + reset_primary: "rst_ni", + bus_interfaces: [ + { protocol: "reg_iface", + direction: "device" + } + ], + regwidth: "64", + registers: [ + { name: "src_addr", + desc: "Source Address", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "63:0", + name: "src_addr", + desc: "Source Address" + } + ] + }, + { name: "dst_addr", + desc: "Destination Address", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "63:0", + name: "dst_addr", + desc: "Destination Address" + } + ] + }, + { name: "num_bytes", + desc: "Number of bytes", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "63:0", + name: "num_bytes", + desc: "Number of bytes" + } + ] + }, + { name: "conf", + desc: "Configuration Register for DMA settings", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "0", + name: "decouple", + desc: "Decouple enable" + }, + { bits: "1", + name: "deburst", + desc: "Deburst enable" + }, + { bits: "2", + name: "serialize", + desc: "Serialize enable" + } + ] + }, + { name: "status", + desc: "DMA Status", + swaccess: "ro", + hwaccess: "hwo", + hwext: "true", + fields: [ + { bits: "0", + name: "busy", + desc: "DMA busy" + } + ] + }, + { name: "next_id", + desc: "Next ID, launches transfer, returns 0 if transfer not set up properly.", + swaccess: "ro", + hwaccess: "hrw", + hwext: "true", + hwre: "true", + fields: [ + { bits: "63:0", + name: "next_id", + desc: "Next ID, launches transfer, returns 0 if transfer not set up properly." + } + ] + }, + { name: "done", + desc: "Get ID of finished transactions.", + swaccess: "ro", + hwaccess: "hrw", + hwext: "true", + hwre: "true", + fields: [ + { bits: "63:0", + name: "done", + desc: "Get ID of finished transactions." + } + ] + }, + { name: "stride_src", + desc: "Source Stride", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "63:0", + name: "stride_src", + desc: "Source Stride" + } + ] + }, + { name: "stride_dst" + desc: "Destination Stride", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "63:0", + name: "stride_dst", + desc: "Destination Stride" + } + ] + }, + { name: "num_repetitions" + desc: "Number of 2D repetitions", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "63:0", + name: "num_repetitions", + desc: "Number of 2D repetitions", + resval: "0" + } + ] + } + ] +} \ No newline at end of file diff --git a/docs/um/ip/axi_dma_config/data/idma_reg64_2d_frontend_doc.hjson b/docs/um/ip/axi_dma_config/data/idma_reg64_2d_frontend_doc.hjson new file mode 100644 index 00000000..38eaf6b3 --- /dev/null +++ b/docs/um/ip/axi_dma_config/data/idma_reg64_2d_frontend_doc.hjson @@ -0,0 +1,145 @@ +// Copyright 2022 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51 + +{ + name: "idma_reg64_2d_frontend", + cip_id: "36", + version: "0.5.1", + clocking: [ + {clock: "clk_i", reset: "rst_ni", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", + direction: "device" + } + ], + regwidth: "64", + registers: [ + { name: "src_addr", + desc: "Source Address", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "63:0", + name: "src_addr", + desc: "Source Address" + } + ] + }, + { name: "dst_addr", + desc: "Destination Address", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "63:0", + name: "dst_addr", + desc: "Destination Address" + } + ] + }, + { name: "num_bytes", + desc: "Number of bytes", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "63:0", + name: "num_bytes", + desc: "Number of bytes" + } + ] + }, + { name: "conf", + desc: "Configuration Register for DMA settings", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "0", + name: "decouple", + desc: "Decouple enable" + }, + { bits: "1", + name: "deburst", + desc: "Deburst enable" + }, + { bits: "2", + name: "serialize", + desc: "Serialize enable" + } + ] + }, + { name: "status", + desc: "DMA Status", + swaccess: "ro", + hwaccess: "hwo", + hwext: "true", + fields: [ + { bits: "0", + name: "busy", + desc: "DMA busy" + } + ] + }, + { name: "next_id", + desc: "Next ID, launches transfer, returns 0 if transfer not set up properly.", + swaccess: "ro", + hwaccess: "hrw", + hwext: "true", + hwre: "true", + fields: [ + { bits: "63:0", + name: "next_id", + desc: "Next ID, launches transfer, returns 0 if transfer not set up properly." + } + ] + }, + { name: "done", + desc: "Get ID of finished transactions.", + swaccess: "ro", + hwaccess: "hrw", + hwext: "true", + hwre: "true", + fields: [ + { bits: "63:0", + name: "done", + desc: "Get ID of finished transactions." + } + ] + }, + { name: "stride_src", + desc: "Source Stride", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "63:0", + name: "stride_src", + desc: "Source Stride" + } + ] + }, + { name: "stride_dst" + desc: "Destination Stride", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "63:0", + name: "stride_dst", + desc: "Destination Stride" + } + ] + }, + { name: "num_repetitions" + desc: "Number of 2D repetitions", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "63:0", + name: "num_repetitions", + desc: "Number of 2D repetitions", + resval: "0" + } + ] + } + ] +} \ No newline at end of file diff --git a/docs/um/ip/axi_dma_config/data/idma_reg64_frontend.hjson b/docs/um/ip/axi_dma_config/data/idma_reg64_frontend.hjson new file mode 100644 index 00000000..8516a501 --- /dev/null +++ b/docs/um/ip/axi_dma_config/data/idma_reg64_frontend.hjson @@ -0,0 +1,108 @@ +// Copyright 2022 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51 + +{ + name: "idma_reg64_frontend", + clock_primary: "clk_i", + reset_primary: "rst_ni", + bus_interfaces: [ + { protocol: "reg_iface", + direction: "device" + } + ], + regwidth: "64", + registers: [ + { name: "src_addr", + desc: "Source Address", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "63:0", + name: "src_addr", + desc: "Source Address" + } + ] + }, + { name: "dst_addr", + desc: "Destination Address", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "63:0", + name: "dst_addr", + desc: "Destination Address" + } + ] + }, + { name: "num_bytes", + desc: "Number of bytes", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "63:0", + name: "num_bytes", + desc: "Number of bytes" + } + ] + }, + { name: "conf", + desc: "Configuration Register for DMA settings", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "0", + name: "decouple", + desc: "Decouple enable" + }, + { bits: "1", + name: "deburst", + desc: "Deburst enable" + }, + { bits: "2", + name: "serialize", + desc: "Serialize enable" + } + ] + }, + { name: "status", + desc: "DMA Status", + swaccess: "ro", + hwaccess: "hwo", + hwext: "true", + fields: [ + { bits: "0", + name: "busy", + desc: "DMA busy" + } + ] + }, + { name: "next_id", + desc: "Next ID, launches transfer, returns 0 if transfer not set up properly.", + swaccess: "ro", + hwaccess: "hrw", + hwext: "true", + hwre: "true", + fields: [ + { bits: "63:0", + name: "next_id", + desc: "Next ID, launches transfer, returns 0 if transfer not set up properly." + } + ] + }, + { name: "done", + desc: "Get ID of finished transactions.", + swaccess: "ro", + hwaccess: "hrw", + hwext: "true", + hwre: "true", + fields: [ + { bits: "63:0", + name: "done", + desc: "Get ID of finished transactions." + } + ] + } + ] +} \ No newline at end of file diff --git a/docs/um/ip/axi_dma_config/data/idma_reg64_frontend_doc.hjson b/docs/um/ip/axi_dma_config/data/idma_reg64_frontend_doc.hjson new file mode 100644 index 00000000..ca0903d1 --- /dev/null +++ b/docs/um/ip/axi_dma_config/data/idma_reg64_frontend_doc.hjson @@ -0,0 +1,111 @@ +// Copyright 2022 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51 + +{ + name: "idma_reg64_frontend", + cip_id: "36", + version: "0.5.1", + clocking: [ + {clock: "clk_i", reset: "rst_ni", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", + direction: "device" + } + ], + regwidth: "64", + registers: [ + { name: "src_addr", + desc: "Source Address", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "63:0", + name: "src_addr", + desc: "Source Address" + } + ] + }, + { name: "dst_addr", + desc: "Destination Address", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "63:0", + name: "dst_addr", + desc: "Destination Address" + } + ] + }, + { name: "num_bytes", + desc: "Number of bytes", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "63:0", + name: "num_bytes", + desc: "Number of bytes" + } + ] + }, + { name: "conf", + desc: "Configuration Register for DMA settings", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "0", + name: "decouple", + desc: "Decouple enable" + }, + { bits: "1", + name: "deburst", + desc: "Deburst enable" + }, + { bits: "2", + name: "serialize", + desc: "Serialize enable" + } + ] + }, + { name: "status", + desc: "DMA Status", + swaccess: "ro", + hwaccess: "hwo", + hwext: "true", + fields: [ + { bits: "0", + name: "busy", + desc: "DMA busy" + } + ] + }, + { name: "next_id", + desc: "Next ID, launches transfer, returns 0 if transfer not set up properly.", + swaccess: "ro", + hwaccess: "hrw", + hwext: "true", + hwre: "true", + fields: [ + { bits: "63:0", + name: "next_id", + desc: "Next ID, launches transfer, returns 0 if transfer not set up properly." + } + ] + }, + { name: "done", + desc: "Get ID of finished transactions.", + swaccess: "ro", + hwaccess: "hrw", + hwext: "true", + hwre: "true", + fields: [ + { bits: "63:0", + name: "done", + desc: "Get ID of finished transactions." + } + ] + } + ] +} \ No newline at end of file diff --git a/docs/um/ip/axi_dma_config/doc/idma_desc64_frontend_doc.md b/docs/um/ip/axi_dma_config/doc/idma_desc64_frontend_doc.md new file mode 100644 index 00000000..50798b23 --- /dev/null +++ b/docs/um/ip/axi_dma_config/doc/idma_desc64_frontend_doc.md @@ -0,0 +1,42 @@ +## Summary + +| Name | Offset | Length | Description | +|:--------------------------------------|:---------|---------:|:--------------------------------------------------------------------| +| idma_desc64.[`desc_addr`](#desc_addr) | 0x0 | 8 | This register specifies the bus address at which the first transfer | +| idma_desc64.[`status`](#status) | 0x8 | 8 | This register contains status information for the DMA. | + +## desc_addr +This register specifies the bus address at which the first transfer +descriptor can be found. A write to this register starts the transfer. +- Offset: `0x0` +- Reset default: `0xffffffffffffffff` +- Reset mask: `0xffffffffffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "desc_addr", "bits": 64, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:------------------:|:----------|:--------------| +| 63:0 | wo | 0xffffffffffffffff | desc_addr | | + +## status +This register contains status information for the DMA. +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "busy", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "fifo_full", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 62}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 63:2 | | | | Reserved | +| 1 | ro | 0x0 | fifo_full | If this bit is set, the buffers of the DMA are full. Any further submissions via the desc_addr register may overwrite previously submitted jobs or get lost. | +| 0 | ro | 0x0 | busy | The DMA is busy | + diff --git a/docs/um/ip/axi_dma_config/doc/idma_reg32_2d_frontend_doc.md b/docs/um/ip/axi_dma_config/doc/idma_reg32_2d_frontend_doc.md new file mode 100644 index 00000000..d1e8a969 --- /dev/null +++ b/docs/um/ip/axi_dma_config/doc/idma_reg32_2d_frontend_doc.md @@ -0,0 +1,180 @@ +## Summary + +| Name | Offset | Length | Description | +|:-------------------------------------------------------------|:---------|---------:|:-----------------------------------------------------------------------| +| idma_reg32_2d_frontend.[`src_addr`](#src_addr) | 0x0 | 4 | Source Address | +| idma_reg32_2d_frontend.[`dst_addr`](#dst_addr) | 0x4 | 4 | Destination Address | +| idma_reg32_2d_frontend.[`num_bytes`](#num_bytes) | 0x8 | 4 | Number of bytes | +| idma_reg32_2d_frontend.[`conf`](#conf) | 0xc | 4 | Configuration Register for DMA settings | +| idma_reg32_2d_frontend.[`stride_src`](#stride_src) | 0x10 | 4 | Source Stride | +| idma_reg32_2d_frontend.[`stride_dst`](#stride_dst) | 0x14 | 4 | Destination Stride | +| idma_reg32_2d_frontend.[`num_repetitions`](#num_repetitions) | 0x18 | 4 | Number of 2D repetitions | +| idma_reg32_2d_frontend.[`status`](#status) | 0x1c | 4 | DMA Status | +| idma_reg32_2d_frontend.[`next_id`](#next_id) | 0x20 | 4 | Next ID, launches transfer, returns 0 if transfer not set up properly. | +| idma_reg32_2d_frontend.[`done`](#done) | 0x24 | 4 | Get ID of finished transactions. | + +## src_addr +Source Address +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "src_addr", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:---------------| +| 31:0 | rw | 0x0 | src_addr | Source Address | + +## dst_addr +Destination Address +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "dst_addr", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------------| +| 31:0 | rw | 0x0 | dst_addr | Destination Address | + +## num_bytes +Number of bytes +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "num_bytes", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:----------------| +| 31:0 | rw | 0x0 | num_bytes | Number of bytes | + +## conf +Configuration Register for DMA settings +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xf` + +### Fields + +```wavejson +{"reg": [{"name": "decouple", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "deburst", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "serialize", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "twod", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 28}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-----------------| +| 31:4 | | | | Reserved | +| 3 | rw | 0x0 | twod | 2D transfer | +| 2 | rw | 0x0 | serialize | Serialize enable | +| 1 | rw | 0x0 | deburst | Deburst enable | +| 0 | rw | 0x0 | decouple | Decouple enable | + +## stride_src +Source Stride +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "stride_src", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:0 | rw | 0x0 | stride_src | Source Stride | + +## stride_dst +Destination Stride +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "stride_dst", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:-------------------| +| 31:0 | rw | 0x0 | stride_dst | Destination Stride | + +## num_repetitions +Number of 2D repetitions +- Offset: `0x18` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "num_repetitions", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------|:-------------------------| +| 31:0 | rw | 0x1 | num_repetitions | Number of 2D repetitions | + +## status +DMA Status +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "busy", "bits": 16, "attr": ["ro"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:16 | | | | Reserved | +| 15:0 | ro | x | busy | DMA busy | + +## next_id +Next ID, launches transfer, returns 0 if transfer not set up properly. +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "next_id", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:-----------------------------------------------------------------------| +| 31:0 | ro | x | next_id | Next ID, launches transfer, returns 0 if transfer not set up properly. | + +## done +Get ID of finished transactions. +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "done", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------| +| 31:0 | ro | x | done | Get ID of finished transactions. | + diff --git a/docs/um/ip/axi_dma_config/doc/idma_reg64_2d_frontend_doc.md b/docs/um/ip/axi_dma_config/doc/idma_reg64_2d_frontend_doc.md new file mode 100644 index 00000000..b9a35267 --- /dev/null +++ b/docs/um/ip/axi_dma_config/doc/idma_reg64_2d_frontend_doc.md @@ -0,0 +1,179 @@ +## Summary + +| Name | Offset | Length | Description | +|:-------------------------------------------------------------|:---------|---------:|:-----------------------------------------------------------------------| +| idma_reg64_2d_frontend.[`src_addr`](#src_addr) | 0x0 | 8 | Source Address | +| idma_reg64_2d_frontend.[`dst_addr`](#dst_addr) | 0x8 | 8 | Destination Address | +| idma_reg64_2d_frontend.[`num_bytes`](#num_bytes) | 0x10 | 8 | Number of bytes | +| idma_reg64_2d_frontend.[`conf`](#conf) | 0x18 | 8 | Configuration Register for DMA settings | +| idma_reg64_2d_frontend.[`status`](#status) | 0x20 | 8 | DMA Status | +| idma_reg64_2d_frontend.[`next_id`](#next_id) | 0x28 | 8 | Next ID, launches transfer, returns 0 if transfer not set up properly. | +| idma_reg64_2d_frontend.[`done`](#done) | 0x30 | 8 | Get ID of finished transactions. | +| idma_reg64_2d_frontend.[`stride_src`](#stride_src) | 0x38 | 8 | Source Stride | +| idma_reg64_2d_frontend.[`stride_dst`](#stride_dst) | 0x40 | 8 | Destination Stride | +| idma_reg64_2d_frontend.[`num_repetitions`](#num_repetitions) | 0x48 | 8 | Number of 2D repetitions | + +## src_addr +Source Address +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffffffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "src_addr", "bits": 64, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:---------------| +| 63:0 | rw | 0x0 | src_addr | Source Address | + +## dst_addr +Destination Address +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffffffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "dst_addr", "bits": 64, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------------| +| 63:0 | rw | 0x0 | dst_addr | Destination Address | + +## num_bytes +Number of bytes +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffffffffffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "num_bytes", "bits": 64, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:----------------| +| 63:0 | rw | 0x0 | num_bytes | Number of bytes | + +## conf +Configuration Register for DMA settings +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "decouple", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "deburst", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "serialize", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 61}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-----------------| +| 63:3 | | | | Reserved | +| 2 | rw | 0x0 | serialize | Serialize enable | +| 1 | rw | 0x0 | deburst | Deburst enable | +| 0 | rw | 0x0 | decouple | Decouple enable | + +## status +DMA Status +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "busy", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 63}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 63:1 | | | | Reserved | +| 0 | ro | x | busy | DMA busy | + +## next_id +Next ID, launches transfer, returns 0 if transfer not set up properly. +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0xffffffffffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "next_id", "bits": 64, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:-----------------------------------------------------------------------| +| 63:0 | ro | x | next_id | Next ID, launches transfer, returns 0 if transfer not set up properly. | + +## done +Get ID of finished transactions. +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0xffffffffffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "done", "bits": 64, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------| +| 63:0 | ro | x | done | Get ID of finished transactions. | + +## stride_src +Source Stride +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0xffffffffffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "stride_src", "bits": 64, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 63:0 | rw | 0x0 | stride_src | Source Stride | + +## stride_dst +Destination Stride +- Offset: `0x40` +- Reset default: `0x0` +- Reset mask: `0xffffffffffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "stride_dst", "bits": 64, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:-------------------| +| 63:0 | rw | 0x0 | stride_dst | Destination Stride | + +## num_repetitions +Number of 2D repetitions +- Offset: `0x48` +- Reset default: `0x0` +- Reset mask: `0xffffffffffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "num_repetitions", "bits": 64, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------|:-------------------------| +| 63:0 | rw | 0x0 | num_repetitions | Number of 2D repetitions | + diff --git a/docs/um/ip/axi_dma_config/doc/idma_reg64_frontend_doc.md b/docs/um/ip/axi_dma_config/doc/idma_reg64_frontend_doc.md new file mode 100644 index 00000000..946466b5 --- /dev/null +++ b/docs/um/ip/axi_dma_config/doc/idma_reg64_frontend_doc.md @@ -0,0 +1,128 @@ +## Summary + +| Name | Offset | Length | Description | +|:----------------------------------------------|:---------|---------:|:-----------------------------------------------------------------------| +| idma_reg64_frontend.[`src_addr`](#src_addr) | 0x0 | 8 | Source Address | +| idma_reg64_frontend.[`dst_addr`](#dst_addr) | 0x8 | 8 | Destination Address | +| idma_reg64_frontend.[`num_bytes`](#num_bytes) | 0x10 | 8 | Number of bytes | +| idma_reg64_frontend.[`conf`](#conf) | 0x18 | 8 | Configuration Register for DMA settings | +| idma_reg64_frontend.[`status`](#status) | 0x20 | 8 | DMA Status | +| idma_reg64_frontend.[`next_id`](#next_id) | 0x28 | 8 | Next ID, launches transfer, returns 0 if transfer not set up properly. | +| idma_reg64_frontend.[`done`](#done) | 0x30 | 8 | Get ID of finished transactions. | + +## src_addr +Source Address +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffffffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "src_addr", "bits": 64, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:---------------| +| 63:0 | rw | 0x0 | src_addr | Source Address | + +## dst_addr +Destination Address +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffffffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "dst_addr", "bits": 64, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------------| +| 63:0 | rw | 0x0 | dst_addr | Destination Address | + +## num_bytes +Number of bytes +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffffffffffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "num_bytes", "bits": 64, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:----------------| +| 63:0 | rw | 0x0 | num_bytes | Number of bytes | + +## conf +Configuration Register for DMA settings +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "decouple", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "deburst", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "serialize", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 61}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-----------------| +| 63:3 | | | | Reserved | +| 2 | rw | 0x0 | serialize | Serialize enable | +| 1 | rw | 0x0 | deburst | Deburst enable | +| 0 | rw | 0x0 | decouple | Decouple enable | + +## status +DMA Status +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "busy", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 63}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 63:1 | | | | Reserved | +| 0 | ro | x | busy | DMA busy | + +## next_id +Next ID, launches transfer, returns 0 if transfer not set up properly. +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0xffffffffffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "next_id", "bits": 64, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:-----------------------------------------------------------------------| +| 63:0 | ro | x | next_id | Next ID, launches transfer, returns 0 if transfer not set up properly. | + +## done +Get ID of finished transactions. +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0xffffffffffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "done", "bits": 64, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------| +| 63:0 | ro | x | done | Get ID of finished transactions. | + diff --git a/docs/um/ip/axi_llc/data/axi_llc_regs.hjson b/docs/um/ip/axi_llc/data/axi_llc_regs.hjson new file mode 100644 index 00000000..7ba04860 --- /dev/null +++ b/docs/um/ip/axi_llc/data/axi_llc_regs.hjson @@ -0,0 +1,166 @@ +// Copyright 2018-2021 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// +// Authors: +// Nicole Narr +// Christopher Reinwardt + + + +{ + name: "axi_llc", + clock_primary: "clk_i", + bus_interfaces: [ + { protocol: "reg_iface", direction: "device" } + ], + regwidth: 32, + registers: [ + + { name: "CFG_SPM_LOW", + desc: "SPM Configuration (lower 32 bit)", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + {bits: "31:0", resval: 0, name: "low", desc: "lower 32 bit"} + ] + }, + { name: "CFG_SPM_HIGH", + desc: "SPM Configuration (upper 32 bit)", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + {bits: "31:0", name: "high", desc: "upper 32 bit"} + ] + }, + { name: "CFG_FLUSH_LOW", + desc: "Flush Configuration (lower 32 bit)", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + {bits: "31:0", name: "low", desc: "lower 32 bit"} + ] + }, + { name: "CFG_FLUSH_HIGH", + desc: "Flush Configuration (upper 32 bit)", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + {bits: "31:0", name: "high", desc: "upper 32 bit"} + ] + }, + { name: "COMMIT_CFG", + desc: "Commit the configuration", + swaccess: "rw1s", + hwaccess: "hrw", + fields: [ + {bits: "0", name: "commit", desc: "commit configuration"} + ] + }, + {skipto: "0x18"} + { name: "FLUSHED_LOW", + desc: "Flushed Flag (lower 32 bit)", + swaccess: "ro", + hwaccess: "hrw", + fields: [ + {bits: "31:0", name: "low", desc: "lower 32 bit"} + ] + }, + { name: "FLUSHED_HIGH", + desc: "Flushed Flag (upper 32 bit)", + swaccess: "ro", + hwaccess: "hrw", + fields: [ + {bits: "31:0", name: "high", desc: "upper 32 bit"} + ] + }, + { name: "BIST_OUT_LOW", + desc: "Tag Storage BIST Result (lower 32 bit)", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + {bits: "31:0", name: "low", desc: "lower 32 bit"} + ] + }, + { name: "BIST_OUT_HIGH", + desc: "Tag Storage BIST Result (upper 32 bit)", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + {bits: "31:0", name: "high", desc: "upper 32 bit"} + ] + }, + { name: "SET_ASSO_LOW", + desc: "Instantiated Set-Associativity (lower 32 bit)", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + {bits: "31:0", name: "low", desc: "lower 32 bit"} + ] + }, + { name: "SET_ASSO_HIGH", + desc: "Instantiated Set-Associativity (upper 32 bit)", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + {bits: "31:0", name: "high", desc: "upper 32 bit"} + ] + }, + { name: "NUM_LINES_LOW", + desc: "Instantiated Number of Cache-Lines (lower 32 bit)", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + {bits: "31:0", name: "low", desc: "lower 32 bit"} + ] + }, + { name: "NUM_LINES_HIGH", + desc: "Instantiated Number of Cache-Lines (upper 32 bit)", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + {bits: "31:0", name: "high", desc: "upper 32 bit"} + ] + }, + { name: "NUM_BLOCKS_LOW", + desc: "Instantiated Number of Blocks (lower 32 bit)", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + {bits: "31:0", name: "low", desc: "lower 32 bit"} + ] + }, + { name: "NUM_BLOCKS_HIGH", + desc: "Instantiated Number of Blocks (upper 32 bit)", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + {bits: "31:0", name: "high", desc: "upper 32 bit"} + ] + }, + { name: "VERSION_LOW", + desc: "AXI LLC Version (lower 32 bit)", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + {bits: "31:0", name: "low", desc: "lower 32 bit"} + ] + }, + { name: "VERSION_HIGH", + desc: "AXI LLC Version (upper 32 bit)", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + {bits: "31:0", name: "high", desc: "upper 32 bit"} + ] + }, + { name: "BIST_STATUS", + desc: "Status register of the BIST", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + {bits: "0:0", name: "done", desc: "BIST successfully completed"} + ] + } + ] +} \ No newline at end of file diff --git a/docs/um/ip/axi_llc/data/axi_llc_regs_doc.hjson b/docs/um/ip/axi_llc/data/axi_llc_regs_doc.hjson new file mode 100644 index 00000000..0cb0bb0f --- /dev/null +++ b/docs/um/ip/axi_llc/data/axi_llc_regs_doc.hjson @@ -0,0 +1,168 @@ +// Copyright 2018-2021 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51, see LICENSE for details. +// +// Authors: +// Nicole Narr +// Christopher Reinwardt + +{ + name: "axi_llc", + cip_id: "36", + version: "0.2.2", + clocking: [ + {clock: "clk_i", reset: "rst_ni", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device" } + ], + regwidth: 32, + registers: [ + { name: "CFG_SPM_LOW", + desc: "SPM Configuration (lower 32 bit)", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + {bits: "31:0", resval: "0", name: "low", desc: "lower 32 bit"} + ] + }, + { name: "CFG_SPM_HIGH", + desc: "SPM Configuration (upper 32 bit)", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + {bits: "31:0", name: "high", desc: "upper 32 bit"} + ] + }, + { name: "CFG_FLUSH_LOW", + desc: "Flush Configuration (lower 32 bit)", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + {bits: "31:0", name: "low", desc: "lower 32 bit"} + ] + }, + { name: "CFG_FLUSH_HIGH", + desc: "Flush Configuration (upper 32 bit)", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + {bits: "31:0", name: "high", desc: "upper 32 bit"} + ] + }, + { name: "COMMIT_CFG", + desc: "Commit the configuration", + swaccess: "rw1s", + hwaccess: "hrw", + fields: [ + {bits: "0", name: "commit", desc: "commit configuration"} + ] + }, + { skipto: "0x18"} + { name: "FLUSHED_LOW", + desc: "Flushed Flag (lower 32 bit)", + swaccess: "ro", + hwaccess: "hrw", + fields: [ + {bits: "31:0", name: "low", desc: "lower 32 bit"} + ] + }, + { name: "FLUSHED_HIGH", + desc: "Flushed Flag (upper 32 bit)", + swaccess: "ro", + hwaccess: "hrw", + fields: [ + {bits: "31:0", name: "high", desc: "upper 32 bit"} + ] + }, + { name: "BIST_OUT_LOW", + desc: "Tag Storage BIST Result (lower 32 bit)", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + {bits: "31:0", name: "low", desc: "lower 32 bit"} + ] + }, + { name: "BIST_OUT_HIGH", + desc: "Tag Storage BIST Result (upper 32 bit)", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + {bits: "31:0", name: "high", desc: "upper 32 bit"} + ] + }, + { name: "SET_ASSO_LOW", + desc: "Instantiated Set-Associativity (lower 32 bit)", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + {bits: "31:0", name: "low", desc: "lower 32 bit"} + ] + }, + { name: "SET_ASSO_HIGH", + desc: "Instantiated Set-Associativity (upper 32 bit)", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + {bits: "31:0", name: "high", desc: "upper 32 bit"} + ] + }, + { name: "NUM_LINES_LOW", + desc: "Instantiated Number of Cache-Lines (lower 32 bit)", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + {bits: "31:0", name: "low", desc: "lower 32 bit"} + ] + }, + { name: "NUM_LINES_HIGH", + desc: "Instantiated Number of Cache-Lines (upper 32 bit)", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + {bits: "31:0", name: "high", desc: "upper 32 bit"} + ] + }, + { name: "NUM_BLOCKS_LOW", + desc: "Instantiated Number of Blocks (lower 32 bit)", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + {bits: "31:0", name: "low", desc: "lower 32 bit"} + ] + }, + { name: "NUM_BLOCKS_HIGH", + desc: "Instantiated Number of Blocks (upper 32 bit)", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + {bits: "31:0", name: "high", desc: "upper 32 bit"} + ] + }, + { name: "VERSION_LOW", + desc: "AXI LLC Version (lower 32 bit)", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + {bits: "31:0", name: "low", desc: "lower 32 bit"} + ] + }, + { name: "VERSION_HIGH", + desc: "AXI LLC Version (upper 32 bit)", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + {bits: "31:0", name: "high", desc: "upper 32 bit"} + ] + }, + { name: "BIST_STATUS", + desc: "Status register of the BIST", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + {bits: "0:0", name: "done", desc: "BIST successfully completed"} + ] + } + ] +} \ No newline at end of file diff --git a/docs/um/ip/axi_llc/doc/registers.md b/docs/um/ip/axi_llc/doc/registers.md new file mode 100644 index 00000000..35aaad5c --- /dev/null +++ b/docs/um/ip/axi_llc/doc/registers.md @@ -0,0 +1,313 @@ +## Summary + +| Name | Offset | Length | Description | +|:----------------------------------------------|:---------|---------:|:--------------------------------------------------| +| axi_llc.[`CFG_SPM_LOW`](#cfg_spm_low) | 0x0 | 4 | SPM Configuration (lower 32 bit) | +| axi_llc.[`CFG_SPM_HIGH`](#cfg_spm_high) | 0x4 | 4 | SPM Configuration (upper 32 bit) | +| axi_llc.[`CFG_FLUSH_LOW`](#cfg_flush_low) | 0x8 | 4 | Flush Configuration (lower 32 bit) | +| axi_llc.[`CFG_FLUSH_HIGH`](#cfg_flush_high) | 0xc | 4 | Flush Configuration (upper 32 bit) | +| axi_llc.[`COMMIT_CFG`](#commit_cfg) | 0x10 | 4 | Commit the configuration | +| axi_llc.[`FLUSHED_LOW`](#flushed_low) | 0x18 | 4 | Flushed Flag (lower 32 bit) | +| axi_llc.[`FLUSHED_HIGH`](#flushed_high) | 0x1c | 4 | Flushed Flag (upper 32 bit) | +| axi_llc.[`BIST_OUT_LOW`](#bist_out_low) | 0x20 | 4 | Tag Storage BIST Result (lower 32 bit) | +| axi_llc.[`BIST_OUT_HIGH`](#bist_out_high) | 0x24 | 4 | Tag Storage BIST Result (upper 32 bit) | +| axi_llc.[`SET_ASSO_LOW`](#set_asso_low) | 0x28 | 4 | Instantiated Set-Associativity (lower 32 bit) | +| axi_llc.[`SET_ASSO_HIGH`](#set_asso_high) | 0x2c | 4 | Instantiated Set-Associativity (upper 32 bit) | +| axi_llc.[`NUM_LINES_LOW`](#num_lines_low) | 0x30 | 4 | Instantiated Number of Cache-Lines (lower 32 bit) | +| axi_llc.[`NUM_LINES_HIGH`](#num_lines_high) | 0x34 | 4 | Instantiated Number of Cache-Lines (upper 32 bit) | +| axi_llc.[`NUM_BLOCKS_LOW`](#num_blocks_low) | 0x38 | 4 | Instantiated Number of Blocks (lower 32 bit) | +| axi_llc.[`NUM_BLOCKS_HIGH`](#num_blocks_high) | 0x3c | 4 | Instantiated Number of Blocks (upper 32 bit) | +| axi_llc.[`VERSION_LOW`](#version_low) | 0x40 | 4 | AXI LLC Version (lower 32 bit) | +| axi_llc.[`VERSION_HIGH`](#version_high) | 0x44 | 4 | AXI LLC Version (upper 32 bit) | +| axi_llc.[`BIST_STATUS`](#bist_status) | 0x48 | 4 | Status register of the BIST | + +## CFG_SPM_LOW +SPM Configuration (lower 32 bit) +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "low", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | rw | 0x0 | low | lower 32 bit | + +## CFG_SPM_HIGH +SPM Configuration (upper 32 bit) +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "high", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | rw | 0x0 | high | upper 32 bit | + +## CFG_FLUSH_LOW +Flush Configuration (lower 32 bit) +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "low", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | rw | 0x0 | low | lower 32 bit | + +## CFG_FLUSH_HIGH +Flush Configuration (upper 32 bit) +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "high", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | rw | 0x0 | high | upper 32 bit | + +## COMMIT_CFG +Commit the configuration +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "commit", "bits": 1, "attr": ["rw1s"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------| +| 31:1 | | | | Reserved | +| 0 | rw1s | 0x0 | commit | commit configuration | + +## FLUSHED_LOW +Flushed Flag (lower 32 bit) +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "low", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | ro | 0x0 | low | lower 32 bit | + +## FLUSHED_HIGH +Flushed Flag (upper 32 bit) +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "high", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | ro | 0x0 | high | upper 32 bit | + +## BIST_OUT_LOW +Tag Storage BIST Result (lower 32 bit) +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "low", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | ro | 0x0 | low | lower 32 bit | + +## BIST_OUT_HIGH +Tag Storage BIST Result (upper 32 bit) +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "high", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | ro | 0x0 | high | upper 32 bit | + +## SET_ASSO_LOW +Instantiated Set-Associativity (lower 32 bit) +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "low", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | ro | 0x0 | low | lower 32 bit | + +## SET_ASSO_HIGH +Instantiated Set-Associativity (upper 32 bit) +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "high", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | ro | 0x0 | high | upper 32 bit | + +## NUM_LINES_LOW +Instantiated Number of Cache-Lines (lower 32 bit) +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "low", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | ro | 0x0 | low | lower 32 bit | + +## NUM_LINES_HIGH +Instantiated Number of Cache-Lines (upper 32 bit) +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "high", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | ro | 0x0 | high | upper 32 bit | + +## NUM_BLOCKS_LOW +Instantiated Number of Blocks (lower 32 bit) +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "low", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | ro | 0x0 | low | lower 32 bit | + +## NUM_BLOCKS_HIGH +Instantiated Number of Blocks (upper 32 bit) +- Offset: `0x3c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "high", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | ro | 0x0 | high | upper 32 bit | + +## VERSION_LOW +AXI LLC Version (lower 32 bit) +- Offset: `0x40` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "low", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | ro | 0x0 | low | lower 32 bit | + +## VERSION_HIGH +AXI LLC Version (upper 32 bit) +- Offset: `0x44` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "high", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | ro | 0x0 | high | upper 32 bit | + +## BIST_STATUS +Status register of the BIST +- Offset: `0x48` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "done", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | done | BIST successfully completed | + diff --git a/docs/um/ip/axi_realm/data/axi_rt_regs.hjson b/docs/um/ip/axi_realm/data/axi_rt_regs.hjson new file mode 100644 index 00000000..218252e5 --- /dev/null +++ b/docs/um/ip/axi_realm/data/axi_rt_regs.hjson @@ -0,0 +1,466 @@ + + +// Copyright 2022 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51, see LICENSE for details. +// +// Automatically generated by ./src/regs/gen_hjson.py +// +// Authors: +// - Thomas Benz + + +{ + name: "axi_rt" + clock_primary: "clk_i" + bus_interfaces: [ + { protocol: "reg_iface", direction: "device" } + ], + regwidth: 32 + + param_list: [ + { name: "NumMrg", + desc: "Maximum number of managers.", + type: "int", + default: "8" + }, + { name: "NumSub", + desc: "Configured number of subordinate regions.", + type: "int", + default: "2" + } + { name: "NumReg", + desc: "Configured number of required registers.", + type: "int", + default: "16" + } + ], + + registers: [ + + { name: "major_version" + desc: "Value of the major_version." + swaccess: "ro" + resval: "0" + fields: [ + { bits: "31:0", name: "major_version", desc: "Value of the major_version." } + ] + } + + { name: "minor_version" + desc: "Value of the minor_version." + swaccess: "ro" + resval: "0" + fields: [ + { bits: "31:0", name: "minor_version", desc: "Value of the minor_version." } + ] + } + + { name: "patch_version" + desc: "Value of the patch_version." + swaccess: "ro" + resval: "0" + fields: [ + { bits: "31:0", name: "patch_version", desc: "Value of the patch_version." } + ] + } + + { multireg: + { name: "rt_enable" + desc: "Enable RT feature on master" + swaccess: "wo" + hwaccess: "hro" + count: "NumMrg" + cname: "rt_enable" + resval: "0" + fields: [ + { bits: "0:0", name: "enable", desc: "Enable RT feature on master" } + ] + } + } + + { multireg: + { name: "rt_bypassed" + desc: "Is the RT inactive?" + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + count: "NumMrg" + cname: "rt_bypassed" + fields: [ + { bits: "0:0", name: "bypassed", desc: "Is the RT inactive?" } + ] + } + } + + { multireg: + { name: "len_limit" + desc: "Fragmentation of the bursts in beats." + swaccess: "wo" + hwaccess: "hro" + count: "NumMrg" + cname: "len_limit" + resval: "0" + fields: [ + { bits: "7:0", name: "len", desc: "Fragmentation of the bursts in beats." } + ] + } + } + + { multireg: + { name: "imtu_enable" + desc: "Enables the IMTU." + swaccess: "wo" + hwaccess: "hro" + count: "NumMrg" + cname: "imtu_enable" + resval: "0" + fields: [ + { bits: "0:0", name: "enable", desc: "Enables the IMTU." } + ] + } + } + + { multireg: + { name: "imtu_abort" + desc: "Resets both the period and the budget." + swaccess: "wo" + hwaccess: "hro" + count: "NumMrg" + cname: "imtu_abort" + resval: "0" + fields: [ + { bits: "0:0", name: "abort", desc: "Resets both the period and the budget." } + ] + } + } + + { multireg: + { name: "start_addr_sub_low" + desc: "The lower 32bit of the start address." + swaccess: "wo" + hwaccess: "hro" + count: "NumReg" + cname: "start_addr_sub_low" + resval: "0" + fields: [ + { bits: "31:0", name: "write_budget", desc: "The lower 32bit of the start address." } + ] + } + } + + { multireg: + { name: "start_addr_sub_high" + desc: "The higher 32bit of the start address." + swaccess: "wo" + hwaccess: "hro" + count: "NumReg" + cname: "start_addr_sub_high" + resval: "0" + fields: [ + { bits: "31:0", name: "write_budget", desc: "The higher 32bit of the start address." } + ] + } + } + + { multireg: + { name: "end_addr_sub_low" + desc: "The lower 32bit of the end address." + swaccess: "wo" + hwaccess: "hro" + count: "NumReg" + cname: "end_addr_sub_low" + resval: "0" + fields: [ + { bits: "31:0", name: "write_budget", desc: "The lower 32bit of the end address." } + ] + } + } + + { multireg: + { name: "end_addr_sub_high" + desc: "The higher 32bit of the end address." + swaccess: "wo" + hwaccess: "hro" + count: "NumReg" + cname: "end_addr_sub_high" + resval: "0" + fields: [ + { bits: "31:0", name: "write_budget", desc: "The higher 32bit of the end address." } + ] + } + } + + { multireg: + { name: "write_budget" + desc: "The budget for writes." + swaccess: "wo" + hwaccess: "hro" + count: "NumReg" + cname: "write_budget" + resval: "0" + fields: [ + { bits: "31:0", name: "write_budget", desc: "The budget for writes." } + ] + } + } + + { multireg: + { name: "read_budget" + desc: "The budget for reads." + swaccess: "wo" + hwaccess: "hro" + count: "NumReg" + cname: "read_budget" + resval: "0" + fields: [ + { bits: "31:0", name: "read_budget", desc: "The budget for reads." } + ] + } + } + + { multireg: + { name: "write_period" + desc: "The period for writes." + swaccess: "wo" + hwaccess: "hro" + count: "NumReg" + cname: "write_period" + resval: "0" + fields: [ + { bits: "31:0", name: "write_period", desc: "The period for writes." } + ] + } + } + + { multireg: + { name: "read_period" + desc: "The period for reads." + swaccess: "wo" + hwaccess: "hro" + count: "NumReg" + cname: "read_period" + resval: "0" + fields: [ + { bits: "31:0", name: "read_period", desc: "The period for reads." } + ] + } + } + + { multireg: + { name: "write_budget_left" + desc: "The budget left for writes." + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + count: "NumReg" + cname: "write_budget_left" + resval: "0" + fields: [ + { bits: "31:0", name: "write_budget_left", desc: "The budget left for writes." } + ] + } + } + + { multireg: + { name: "read_budget_left" + desc: "The budget left for reads." + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + count: "NumReg" + cname: "read_budget_left" + resval: "0" + fields: [ + { bits: "31:0", name: "read_budget_left", desc: "The budget left for reads." } + ] + } + } + + { multireg: + { name: "write_period_left" + desc: "The period left for writes." + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + count: "NumReg" + cname: "write_period_left" + resval: "0" + fields: [ + { bits: "31:0", name: "write_period_left", desc: "The period left for writes." } + ] + } + } + + { multireg: + { name: "read_period_left" + desc: "The period left for reads." + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + count: "NumReg" + cname: "read_period_left" + resval: "0" + fields: [ + { bits: "31:0", name: "read_period_left", desc: "The period left for reads." } + ] + } + } + + { multireg: + { name: "isolate" + desc: "Is the interface requested to be isolated?" + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + count: "NumMrg" + cname: "isolate" + fields: [ + { bits: "0:0", name: "isolate", desc: "Is the interface requested to be isolated?" } + ] + } + } + + { multireg: + { name: "isolated" + desc: "Is the interface isolated?" + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + count: "NumMrg" + cname: "isolated" + fields: [ + { bits: "0:0", name: "isolated", desc: "Is the interface isolated?" } + ] + } + } + + { name: "num_managers" + desc: "Value of the num_managers parameter." + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + fields: [ + { bits: "31:0", name: "num_managers", desc: "Value of the num_managers parameter." } + ] + } + + { name: "addr_width" + desc: "Value of the addr_width parameter." + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + fields: [ + { bits: "31:0", name: "addr_width", desc: "Value of the addr_width parameter." } + ] + } + + { name: "data_width" + desc: "Value of the data_width parameter." + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + fields: [ + { bits: "31:0", name: "data_width", desc: "Value of the data_width parameter." } + ] + } + + { name: "id_width" + desc: "Value of the id_width parameter." + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + fields: [ + { bits: "31:0", name: "id_width", desc: "Value of the id_width parameter." } + ] + } + + { name: "user_width" + desc: "Value of the user_width parameter." + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + fields: [ + { bits: "31:0", name: "user_width", desc: "Value of the user_width parameter." } + ] + } + + { name: "num_pending" + desc: "Value of the num_pending parameter." + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + fields: [ + { bits: "31:0", name: "num_pending", desc: "Value of the num_pending parameter." } + ] + } + + { name: "w_buffer_depth" + desc: "Value of the w_buffer_depth parameter." + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + fields: [ + { bits: "31:0", name: "w_buffer_depth", desc: "Value of the w_buffer_depth parameter." } + ] + } + + { name: "num_addr_regions" + desc: "Value of the num_addr_regions parameter." + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + fields: [ + { bits: "31:0", name: "num_addr_regions", desc: "Value of the num_addr_regions parameter." } + ] + } + + { name: "period_width" + desc: "Value of the period_width parameter." + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + fields: [ + { bits: "31:0", name: "period_width", desc: "Value of the period_width parameter." } + ] + } + + { name: "budget_width" + desc: "Value of the budget_width parameter." + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + fields: [ + { bits: "31:0", name: "budget_width", desc: "Value of the budget_width parameter." } + ] + } + + { name: "max_num_managers" + desc: "Value of the max_num_managers parameter." + swaccess: "ro" + resval: "8" + fields: [ + { bits: "31:0", name: "max_num_managers", desc: "Value of the max_num_managers parameter." } + ] + } + + ] +} diff --git a/docs/um/ip/axi_realm/data/axi_rt_regs_doc.hjson b/docs/um/ip/axi_realm/data/axi_rt_regs_doc.hjson new file mode 100644 index 00000000..46fa10aa --- /dev/null +++ b/docs/um/ip/axi_realm/data/axi_rt_regs_doc.hjson @@ -0,0 +1,470 @@ + + +// Copyright 2022 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51, see LICENSE for details. +// +// Automatically generated by ./src/regs/gen_hjson.py +// +// Authors: +// - Thomas Benz + + +{ + name: "axi_rt" + cip_id: "36", + version: "0.0.0-alpha.4", // commit 7d7fc13 + clocking: [ + {clock: "clk_i", reset: "rst_ni", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device" } + ], + regwidth: 32 + + param_list: [ + { name: "NumMrg", + desc: "Maximum number of managers.", + type: "int", + default: "8" + }, + { name: "NumSub", + desc: "Configured number of subordinate regions.", + type: "int", + default: "2" + } + { name: "NumReg", + desc: "Configured number of required registers.", + type: "int", + default: "16" + } + ], + + registers: [ + + { name: "major_version" + desc: "Value of the major_version." + swaccess: "ro" + resval: "0" + fields: [ + { bits: "31:0", name: "major_version", desc: "Value of the major_version." } + ] + } + + { name: "minor_version" + desc: "Value of the minor_version." + swaccess: "ro" + resval: "0" + fields: [ + { bits: "31:0", name: "minor_version", desc: "Value of the minor_version." } + ] + } + + { name: "patch_version" + desc: "Value of the patch_version." + swaccess: "ro" + resval: "0" + fields: [ + { bits: "31:0", name: "patch_version", desc: "Value of the patch_version." } + ] + } + + { multireg: + { name: "rt_enable" + desc: "Enable RT feature on master" + swaccess: "wo" + hwaccess: "hro" + count: "NumMrg" + cname: "rt_enable" + resval: "0" + fields: [ + { bits: "0:0", name: "enable", desc: "Enable RT feature on master" } + ] + } + } + + { multireg: + { name: "rt_bypassed" + desc: "Is the RT inactive?" + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + count: "NumMrg" + cname: "rt_bypassed" + fields: [ + { bits: "0:0", name: "bypassed", desc: "Is the RT inactive?" } + ] + } + } + + { multireg: + { name: "len_limit" + desc: "Fragmentation of the bursts in beats." + swaccess: "wo" + hwaccess: "hro" + count: "NumMrg" + cname: "len_limit" + resval: "0" + fields: [ + { bits: "7:0", name: "len", desc: "Fragmentation of the bursts in beats." } + ] + } + } + + { multireg: + { name: "imtu_enable" + desc: "Enables the IMTU." + swaccess: "wo" + hwaccess: "hro" + count: "NumMrg" + cname: "imtu_enable" + resval: "0" + fields: [ + { bits: "0:0", name: "enable", desc: "Enables the IMTU." } + ] + } + } + + { multireg: + { name: "imtu_abort" + desc: "Resets both the period and the budget." + swaccess: "wo" + hwaccess: "hro" + count: "NumMrg" + cname: "imtu_abort" + resval: "0" + fields: [ + { bits: "0:0", name: "abort", desc: "Resets both the period and the budget." } + ] + } + } + + { multireg: + { name: "start_addr_sub_low" + desc: "The lower 32bit of the start address." + swaccess: "wo" + hwaccess: "hro" + count: "NumReg" + cname: "start_addr_sub_low" + resval: "0" + fields: [ + { bits: "31:0", name: "write_budget", desc: "The lower 32bit of the start address." } + ] + } + } + + { multireg: + { name: "start_addr_sub_high" + desc: "The higher 32bit of the start address." + swaccess: "wo" + hwaccess: "hro" + count: "NumReg" + cname: "start_addr_sub_high" + resval: "0" + fields: [ + { bits: "31:0", name: "write_budget", desc: "The higher 32bit of the start address." } + ] + } + } + + { multireg: + { name: "end_addr_sub_low" + desc: "The lower 32bit of the end address." + swaccess: "wo" + hwaccess: "hro" + count: "NumReg" + cname: "end_addr_sub_low" + resval: "0" + fields: [ + { bits: "31:0", name: "write_budget", desc: "The lower 32bit of the end address." } + ] + } + } + + { multireg: + { name: "end_addr_sub_high" + desc: "The higher 32bit of the end address." + swaccess: "wo" + hwaccess: "hro" + count: "NumReg" + cname: "end_addr_sub_high" + resval: "0" + fields: [ + { bits: "31:0", name: "write_budget", desc: "The higher 32bit of the end address." } + ] + } + } + + { multireg: + { name: "write_budget" + desc: "The budget for writes." + swaccess: "wo" + hwaccess: "hro" + count: "NumReg" + cname: "write_budget" + resval: "0" + fields: [ + { bits: "31:0", name: "write_budget", desc: "The budget for writes." } + ] + } + } + + { multireg: + { name: "read_budget" + desc: "The budget for reads." + swaccess: "wo" + hwaccess: "hro" + count: "NumReg" + cname: "read_budget" + resval: "0" + fields: [ + { bits: "31:0", name: "read_budget", desc: "The budget for reads." } + ] + } + } + + { multireg: + { name: "write_period" + desc: "The period for writes." + swaccess: "wo" + hwaccess: "hro" + count: "NumReg" + cname: "write_period" + resval: "0" + fields: [ + { bits: "31:0", name: "write_period", desc: "The period for writes." } + ] + } + } + + { multireg: + { name: "read_period" + desc: "The period for reads." + swaccess: "wo" + hwaccess: "hro" + count: "NumReg" + cname: "read_period" + resval: "0" + fields: [ + { bits: "31:0", name: "read_period", desc: "The period for reads." } + ] + } + } + + { multireg: + { name: "write_budget_left" + desc: "The budget left for writes." + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + count: "NumReg" + cname: "write_budget_left" + resval: "0" + fields: [ + { bits: "31:0", name: "write_budget_left", desc: "The budget left for writes." } + ] + } + } + + { multireg: + { name: "read_budget_left" + desc: "The budget left for reads." + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + count: "NumReg" + cname: "read_budget_left" + resval: "0" + fields: [ + { bits: "31:0", name: "read_budget_left", desc: "The budget left for reads." } + ] + } + } + + { multireg: + { name: "write_period_left" + desc: "The period left for writes." + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + count: "NumReg" + cname: "write_period_left" + resval: "0" + fields: [ + { bits: "31:0", name: "write_period_left", desc: "The period left for writes." } + ] + } + } + + { multireg: + { name: "read_period_left" + desc: "The period left for reads." + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + count: "NumReg" + cname: "read_period_left" + resval: "0" + fields: [ + { bits: "31:0", name: "read_period_left", desc: "The period left for reads." } + ] + } + } + + { multireg: + { name: "isolate" + desc: "Is the interface requested to be isolated?" + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + count: "NumMrg" + cname: "isolate" + fields: [ + { bits: "0:0", name: "isolate", desc: "Is the interface requested to be isolated?" } + ] + } + } + + { multireg: + { name: "isolated" + desc: "Is the interface isolated?" + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + count: "NumMrg" + cname: "isolated" + fields: [ + { bits: "0:0", name: "isolated", desc: "Is the interface isolated?" } + ] + } + } + + { name: "num_managers" + desc: "Value of the num_managers parameter." + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + fields: [ + { bits: "31:0", name: "num_managers", desc: "Value of the num_managers parameter." } + ] + } + + { name: "addr_width" + desc: "Value of the addr_width parameter." + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + fields: [ + { bits: "31:0", name: "addr_width", desc: "Value of the addr_width parameter." } + ] + } + + { name: "data_width" + desc: "Value of the data_width parameter." + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + fields: [ + { bits: "31:0", name: "data_width", desc: "Value of the data_width parameter." } + ] + } + + { name: "id_width" + desc: "Value of the id_width parameter." + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + fields: [ + { bits: "31:0", name: "id_width", desc: "Value of the id_width parameter." } + ] + } + + { name: "user_width" + desc: "Value of the user_width parameter." + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + fields: [ + { bits: "31:0", name: "user_width", desc: "Value of the user_width parameter." } + ] + } + + { name: "num_pending" + desc: "Value of the num_pending parameter." + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + fields: [ + { bits: "31:0", name: "num_pending", desc: "Value of the num_pending parameter." } + ] + } + + { name: "w_buffer_depth" + desc: "Value of the w_buffer_depth parameter." + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + fields: [ + { bits: "31:0", name: "w_buffer_depth", desc: "Value of the w_buffer_depth parameter." } + ] + } + + { name: "num_addr_regions" + desc: "Value of the num_addr_regions parameter." + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + fields: [ + { bits: "31:0", name: "num_addr_regions", desc: "Value of the num_addr_regions parameter." } + ] + } + + { name: "period_width" + desc: "Value of the period_width parameter." + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + fields: [ + { bits: "31:0", name: "period_width", desc: "Value of the period_width parameter." } + ] + } + + { name: "budget_width" + desc: "Value of the budget_width parameter." + swaccess: "ro" + hwaccess: "hwo" + hwqe: "true" + hwext: "true" + fields: [ + { bits: "31:0", name: "budget_width", desc: "Value of the budget_width parameter." } + ] + } + + { name: "max_num_managers" + desc: "Value of the max_num_managers parameter." + swaccess: "ro" + resval: "8" + fields: [ + { bits: "31:0", name: "max_num_managers", desc: "Value of the max_num_managers parameter." } + ] + } + + ] +} diff --git a/docs/um/ip/axi_realm/doc/registers.md b/docs/um/ip/axi_realm/doc/registers.md new file mode 100644 index 00000000..14964c68 --- /dev/null +++ b/docs/um/ip/axi_realm/doc/registers.md @@ -0,0 +1,1069 @@ +## Summary + +| Name | Offset | Length | Description | +|:--------------------------------------------------------|:---------|---------:|:-------------------------------------------| +| axi_rt.[`major_version`](#major_version) | 0x0 | 4 | Value of the major_version. | +| axi_rt.[`minor_version`](#minor_version) | 0x4 | 4 | Value of the minor_version. | +| axi_rt.[`patch_version`](#patch_version) | 0x8 | 4 | Value of the patch_version. | +| axi_rt.[`rt_enable`](#rt_enable) | 0xc | 4 | Enable RT feature on master | +| axi_rt.[`rt_bypassed`](#rt_bypassed) | 0x10 | 4 | Is the RT inactive? | +| axi_rt.[`len_limit_0`](#len_limit_0) | 0x14 | 4 | Fragmentation of the bursts in beats. | +| axi_rt.[`len_limit_1`](#len_limit_1) | 0x18 | 4 | Fragmentation of the bursts in beats. | +| axi_rt.[`imtu_enable`](#imtu_enable) | 0x1c | 4 | Enables the IMTU. | +| axi_rt.[`imtu_abort`](#imtu_abort) | 0x20 | 4 | Resets both the period and the budget. | +| axi_rt.[`start_addr_sub_low_0`](#start_addr_sub_low) | 0x24 | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_1`](#start_addr_sub_low) | 0x28 | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_2`](#start_addr_sub_low) | 0x2c | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_3`](#start_addr_sub_low) | 0x30 | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_4`](#start_addr_sub_low) | 0x34 | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_5`](#start_addr_sub_low) | 0x38 | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_6`](#start_addr_sub_low) | 0x3c | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_7`](#start_addr_sub_low) | 0x40 | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_8`](#start_addr_sub_low) | 0x44 | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_9`](#start_addr_sub_low) | 0x48 | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_10`](#start_addr_sub_low) | 0x4c | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_11`](#start_addr_sub_low) | 0x50 | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_12`](#start_addr_sub_low) | 0x54 | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_13`](#start_addr_sub_low) | 0x58 | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_14`](#start_addr_sub_low) | 0x5c | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_15`](#start_addr_sub_low) | 0x60 | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_0`](#start_addr_sub_high) | 0x64 | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_1`](#start_addr_sub_high) | 0x68 | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_2`](#start_addr_sub_high) | 0x6c | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_3`](#start_addr_sub_high) | 0x70 | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_4`](#start_addr_sub_high) | 0x74 | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_5`](#start_addr_sub_high) | 0x78 | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_6`](#start_addr_sub_high) | 0x7c | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_7`](#start_addr_sub_high) | 0x80 | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_8`](#start_addr_sub_high) | 0x84 | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_9`](#start_addr_sub_high) | 0x88 | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_10`](#start_addr_sub_high) | 0x8c | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_11`](#start_addr_sub_high) | 0x90 | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_12`](#start_addr_sub_high) | 0x94 | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_13`](#start_addr_sub_high) | 0x98 | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_14`](#start_addr_sub_high) | 0x9c | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_15`](#start_addr_sub_high) | 0xa0 | 4 | The higher 32bit of the start address. | +| axi_rt.[`end_addr_sub_low_0`](#end_addr_sub_low) | 0xa4 | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_1`](#end_addr_sub_low) | 0xa8 | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_2`](#end_addr_sub_low) | 0xac | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_3`](#end_addr_sub_low) | 0xb0 | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_4`](#end_addr_sub_low) | 0xb4 | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_5`](#end_addr_sub_low) | 0xb8 | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_6`](#end_addr_sub_low) | 0xbc | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_7`](#end_addr_sub_low) | 0xc0 | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_8`](#end_addr_sub_low) | 0xc4 | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_9`](#end_addr_sub_low) | 0xc8 | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_10`](#end_addr_sub_low) | 0xcc | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_11`](#end_addr_sub_low) | 0xd0 | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_12`](#end_addr_sub_low) | 0xd4 | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_13`](#end_addr_sub_low) | 0xd8 | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_14`](#end_addr_sub_low) | 0xdc | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_15`](#end_addr_sub_low) | 0xe0 | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_0`](#end_addr_sub_high) | 0xe4 | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_1`](#end_addr_sub_high) | 0xe8 | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_2`](#end_addr_sub_high) | 0xec | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_3`](#end_addr_sub_high) | 0xf0 | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_4`](#end_addr_sub_high) | 0xf4 | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_5`](#end_addr_sub_high) | 0xf8 | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_6`](#end_addr_sub_high) | 0xfc | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_7`](#end_addr_sub_high) | 0x100 | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_8`](#end_addr_sub_high) | 0x104 | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_9`](#end_addr_sub_high) | 0x108 | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_10`](#end_addr_sub_high) | 0x10c | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_11`](#end_addr_sub_high) | 0x110 | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_12`](#end_addr_sub_high) | 0x114 | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_13`](#end_addr_sub_high) | 0x118 | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_14`](#end_addr_sub_high) | 0x11c | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_15`](#end_addr_sub_high) | 0x120 | 4 | The higher 32bit of the end address. | +| axi_rt.[`write_budget_0`](#write_budget) | 0x124 | 4 | The budget for writes. | +| axi_rt.[`write_budget_1`](#write_budget) | 0x128 | 4 | The budget for writes. | +| axi_rt.[`write_budget_2`](#write_budget) | 0x12c | 4 | The budget for writes. | +| axi_rt.[`write_budget_3`](#write_budget) | 0x130 | 4 | The budget for writes. | +| axi_rt.[`write_budget_4`](#write_budget) | 0x134 | 4 | The budget for writes. | +| axi_rt.[`write_budget_5`](#write_budget) | 0x138 | 4 | The budget for writes. | +| axi_rt.[`write_budget_6`](#write_budget) | 0x13c | 4 | The budget for writes. | +| axi_rt.[`write_budget_7`](#write_budget) | 0x140 | 4 | The budget for writes. | +| axi_rt.[`write_budget_8`](#write_budget) | 0x144 | 4 | The budget for writes. | +| axi_rt.[`write_budget_9`](#write_budget) | 0x148 | 4 | The budget for writes. | +| axi_rt.[`write_budget_10`](#write_budget) | 0x14c | 4 | The budget for writes. | +| axi_rt.[`write_budget_11`](#write_budget) | 0x150 | 4 | The budget for writes. | +| axi_rt.[`write_budget_12`](#write_budget) | 0x154 | 4 | The budget for writes. | +| axi_rt.[`write_budget_13`](#write_budget) | 0x158 | 4 | The budget for writes. | +| axi_rt.[`write_budget_14`](#write_budget) | 0x15c | 4 | The budget for writes. | +| axi_rt.[`write_budget_15`](#write_budget) | 0x160 | 4 | The budget for writes. | +| axi_rt.[`read_budget_0`](#read_budget) | 0x164 | 4 | The budget for reads. | +| axi_rt.[`read_budget_1`](#read_budget) | 0x168 | 4 | The budget for reads. | +| axi_rt.[`read_budget_2`](#read_budget) | 0x16c | 4 | The budget for reads. | +| axi_rt.[`read_budget_3`](#read_budget) | 0x170 | 4 | The budget for reads. | +| axi_rt.[`read_budget_4`](#read_budget) | 0x174 | 4 | The budget for reads. | +| axi_rt.[`read_budget_5`](#read_budget) | 0x178 | 4 | The budget for reads. | +| axi_rt.[`read_budget_6`](#read_budget) | 0x17c | 4 | The budget for reads. | +| axi_rt.[`read_budget_7`](#read_budget) | 0x180 | 4 | The budget for reads. | +| axi_rt.[`read_budget_8`](#read_budget) | 0x184 | 4 | The budget for reads. | +| axi_rt.[`read_budget_9`](#read_budget) | 0x188 | 4 | The budget for reads. | +| axi_rt.[`read_budget_10`](#read_budget) | 0x18c | 4 | The budget for reads. | +| axi_rt.[`read_budget_11`](#read_budget) | 0x190 | 4 | The budget for reads. | +| axi_rt.[`read_budget_12`](#read_budget) | 0x194 | 4 | The budget for reads. | +| axi_rt.[`read_budget_13`](#read_budget) | 0x198 | 4 | The budget for reads. | +| axi_rt.[`read_budget_14`](#read_budget) | 0x19c | 4 | The budget for reads. | +| axi_rt.[`read_budget_15`](#read_budget) | 0x1a0 | 4 | The budget for reads. | +| axi_rt.[`write_period_0`](#write_period) | 0x1a4 | 4 | The period for writes. | +| axi_rt.[`write_period_1`](#write_period) | 0x1a8 | 4 | The period for writes. | +| axi_rt.[`write_period_2`](#write_period) | 0x1ac | 4 | The period for writes. | +| axi_rt.[`write_period_3`](#write_period) | 0x1b0 | 4 | The period for writes. | +| axi_rt.[`write_period_4`](#write_period) | 0x1b4 | 4 | The period for writes. | +| axi_rt.[`write_period_5`](#write_period) | 0x1b8 | 4 | The period for writes. | +| axi_rt.[`write_period_6`](#write_period) | 0x1bc | 4 | The period for writes. | +| axi_rt.[`write_period_7`](#write_period) | 0x1c0 | 4 | The period for writes. | +| axi_rt.[`write_period_8`](#write_period) | 0x1c4 | 4 | The period for writes. | +| axi_rt.[`write_period_9`](#write_period) | 0x1c8 | 4 | The period for writes. | +| axi_rt.[`write_period_10`](#write_period) | 0x1cc | 4 | The period for writes. | +| axi_rt.[`write_period_11`](#write_period) | 0x1d0 | 4 | The period for writes. | +| axi_rt.[`write_period_12`](#write_period) | 0x1d4 | 4 | The period for writes. | +| axi_rt.[`write_period_13`](#write_period) | 0x1d8 | 4 | The period for writes. | +| axi_rt.[`write_period_14`](#write_period) | 0x1dc | 4 | The period for writes. | +| axi_rt.[`write_period_15`](#write_period) | 0x1e0 | 4 | The period for writes. | +| axi_rt.[`read_period_0`](#read_period) | 0x1e4 | 4 | The period for reads. | +| axi_rt.[`read_period_1`](#read_period) | 0x1e8 | 4 | The period for reads. | +| axi_rt.[`read_period_2`](#read_period) | 0x1ec | 4 | The period for reads. | +| axi_rt.[`read_period_3`](#read_period) | 0x1f0 | 4 | The period for reads. | +| axi_rt.[`read_period_4`](#read_period) | 0x1f4 | 4 | The period for reads. | +| axi_rt.[`read_period_5`](#read_period) | 0x1f8 | 4 | The period for reads. | +| axi_rt.[`read_period_6`](#read_period) | 0x1fc | 4 | The period for reads. | +| axi_rt.[`read_period_7`](#read_period) | 0x200 | 4 | The period for reads. | +| axi_rt.[`read_period_8`](#read_period) | 0x204 | 4 | The period for reads. | +| axi_rt.[`read_period_9`](#read_period) | 0x208 | 4 | The period for reads. | +| axi_rt.[`read_period_10`](#read_period) | 0x20c | 4 | The period for reads. | +| axi_rt.[`read_period_11`](#read_period) | 0x210 | 4 | The period for reads. | +| axi_rt.[`read_period_12`](#read_period) | 0x214 | 4 | The period for reads. | +| axi_rt.[`read_period_13`](#read_period) | 0x218 | 4 | The period for reads. | +| axi_rt.[`read_period_14`](#read_period) | 0x21c | 4 | The period for reads. | +| axi_rt.[`read_period_15`](#read_period) | 0x220 | 4 | The period for reads. | +| axi_rt.[`write_budget_left_0`](#write_budget_left) | 0x224 | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_1`](#write_budget_left) | 0x228 | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_2`](#write_budget_left) | 0x22c | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_3`](#write_budget_left) | 0x230 | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_4`](#write_budget_left) | 0x234 | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_5`](#write_budget_left) | 0x238 | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_6`](#write_budget_left) | 0x23c | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_7`](#write_budget_left) | 0x240 | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_8`](#write_budget_left) | 0x244 | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_9`](#write_budget_left) | 0x248 | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_10`](#write_budget_left) | 0x24c | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_11`](#write_budget_left) | 0x250 | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_12`](#write_budget_left) | 0x254 | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_13`](#write_budget_left) | 0x258 | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_14`](#write_budget_left) | 0x25c | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_15`](#write_budget_left) | 0x260 | 4 | The budget left for writes. | +| axi_rt.[`read_budget_left_0`](#read_budget_left) | 0x264 | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_1`](#read_budget_left) | 0x268 | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_2`](#read_budget_left) | 0x26c | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_3`](#read_budget_left) | 0x270 | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_4`](#read_budget_left) | 0x274 | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_5`](#read_budget_left) | 0x278 | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_6`](#read_budget_left) | 0x27c | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_7`](#read_budget_left) | 0x280 | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_8`](#read_budget_left) | 0x284 | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_9`](#read_budget_left) | 0x288 | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_10`](#read_budget_left) | 0x28c | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_11`](#read_budget_left) | 0x290 | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_12`](#read_budget_left) | 0x294 | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_13`](#read_budget_left) | 0x298 | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_14`](#read_budget_left) | 0x29c | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_15`](#read_budget_left) | 0x2a0 | 4 | The budget left for reads. | +| axi_rt.[`write_period_left_0`](#write_period_left) | 0x2a4 | 4 | The period left for writes. | +| axi_rt.[`write_period_left_1`](#write_period_left) | 0x2a8 | 4 | The period left for writes. | +| axi_rt.[`write_period_left_2`](#write_period_left) | 0x2ac | 4 | The period left for writes. | +| axi_rt.[`write_period_left_3`](#write_period_left) | 0x2b0 | 4 | The period left for writes. | +| axi_rt.[`write_period_left_4`](#write_period_left) | 0x2b4 | 4 | The period left for writes. | +| axi_rt.[`write_period_left_5`](#write_period_left) | 0x2b8 | 4 | The period left for writes. | +| axi_rt.[`write_period_left_6`](#write_period_left) | 0x2bc | 4 | The period left for writes. | +| axi_rt.[`write_period_left_7`](#write_period_left) | 0x2c0 | 4 | The period left for writes. | +| axi_rt.[`write_period_left_8`](#write_period_left) | 0x2c4 | 4 | The period left for writes. | +| axi_rt.[`write_period_left_9`](#write_period_left) | 0x2c8 | 4 | The period left for writes. | +| axi_rt.[`write_period_left_10`](#write_period_left) | 0x2cc | 4 | The period left for writes. | +| axi_rt.[`write_period_left_11`](#write_period_left) | 0x2d0 | 4 | The period left for writes. | +| axi_rt.[`write_period_left_12`](#write_period_left) | 0x2d4 | 4 | The period left for writes. | +| axi_rt.[`write_period_left_13`](#write_period_left) | 0x2d8 | 4 | The period left for writes. | +| axi_rt.[`write_period_left_14`](#write_period_left) | 0x2dc | 4 | The period left for writes. | +| axi_rt.[`write_period_left_15`](#write_period_left) | 0x2e0 | 4 | The period left for writes. | +| axi_rt.[`read_period_left_0`](#read_period_left) | 0x2e4 | 4 | The period left for reads. | +| axi_rt.[`read_period_left_1`](#read_period_left) | 0x2e8 | 4 | The period left for reads. | +| axi_rt.[`read_period_left_2`](#read_period_left) | 0x2ec | 4 | The period left for reads. | +| axi_rt.[`read_period_left_3`](#read_period_left) | 0x2f0 | 4 | The period left for reads. | +| axi_rt.[`read_period_left_4`](#read_period_left) | 0x2f4 | 4 | The period left for reads. | +| axi_rt.[`read_period_left_5`](#read_period_left) | 0x2f8 | 4 | The period left for reads. | +| axi_rt.[`read_period_left_6`](#read_period_left) | 0x2fc | 4 | The period left for reads. | +| axi_rt.[`read_period_left_7`](#read_period_left) | 0x300 | 4 | The period left for reads. | +| axi_rt.[`read_period_left_8`](#read_period_left) | 0x304 | 4 | The period left for reads. | +| axi_rt.[`read_period_left_9`](#read_period_left) | 0x308 | 4 | The period left for reads. | +| axi_rt.[`read_period_left_10`](#read_period_left) | 0x30c | 4 | The period left for reads. | +| axi_rt.[`read_period_left_11`](#read_period_left) | 0x310 | 4 | The period left for reads. | +| axi_rt.[`read_period_left_12`](#read_period_left) | 0x314 | 4 | The period left for reads. | +| axi_rt.[`read_period_left_13`](#read_period_left) | 0x318 | 4 | The period left for reads. | +| axi_rt.[`read_period_left_14`](#read_period_left) | 0x31c | 4 | The period left for reads. | +| axi_rt.[`read_period_left_15`](#read_period_left) | 0x320 | 4 | The period left for reads. | +| axi_rt.[`isolate`](#isolate) | 0x324 | 4 | Is the interface requested to be isolated? | +| axi_rt.[`isolated`](#isolated) | 0x328 | 4 | Is the interface isolated? | +| axi_rt.[`num_managers`](#num_managers) | 0x32c | 4 | Value of the num_managers parameter. | +| axi_rt.[`addr_width`](#addr_width) | 0x330 | 4 | Value of the addr_width parameter. | +| axi_rt.[`data_width`](#data_width) | 0x334 | 4 | Value of the data_width parameter. | +| axi_rt.[`id_width`](#id_width) | 0x338 | 4 | Value of the id_width parameter. | +| axi_rt.[`user_width`](#user_width) | 0x33c | 4 | Value of the user_width parameter. | +| axi_rt.[`num_pending`](#num_pending) | 0x340 | 4 | Value of the num_pending parameter. | +| axi_rt.[`w_buffer_depth`](#w_buffer_depth) | 0x344 | 4 | Value of the w_buffer_depth parameter. | +| axi_rt.[`num_addr_regions`](#num_addr_regions) | 0x348 | 4 | Value of the num_addr_regions parameter. | +| axi_rt.[`period_width`](#period_width) | 0x34c | 4 | Value of the period_width parameter. | +| axi_rt.[`budget_width`](#budget_width) | 0x350 | 4 | Value of the budget_width parameter. | +| axi_rt.[`max_num_managers`](#max_num_managers) | 0x354 | 4 | Value of the max_num_managers parameter. | + +## major_version +Value of the major_version. +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "major_version", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:----------------------------| +| 31:0 | ro | 0x0 | major_version | Value of the major_version. | + +## minor_version +Value of the minor_version. +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "minor_version", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:----------------------------| +| 31:0 | ro | 0x0 | minor_version | Value of the minor_version. | + +## patch_version +Value of the patch_version. +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "patch_version", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:----------------------------| +| 31:0 | ro | 0x0 | patch_version | Value of the patch_version. | + +## rt_enable +Enable RT feature on master +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "enable_0", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "enable_1", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "enable_2", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "enable_3", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "enable_4", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "enable_5", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "enable_6", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "enable_7", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 100}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:----------------------------| +| 31:8 | | | | Reserved | +| 7 | wo | 0x0 | enable_7 | Enable RT feature on master | +| 6 | wo | 0x0 | enable_6 | Enable RT feature on master | +| 5 | wo | 0x0 | enable_5 | Enable RT feature on master | +| 4 | wo | 0x0 | enable_4 | Enable RT feature on master | +| 3 | wo | 0x0 | enable_3 | Enable RT feature on master | +| 2 | wo | 0x0 | enable_2 | Enable RT feature on master | +| 1 | wo | 0x0 | enable_1 | Enable RT feature on master | +| 0 | wo | 0x0 | enable_0 | Enable RT feature on master | + +## rt_bypassed +Is the RT inactive? +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "bypassed_0", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "bypassed_1", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "bypassed_2", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "bypassed_3", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "bypassed_4", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "bypassed_5", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "bypassed_6", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "bypassed_7", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------------| +| 31:8 | | | | Reserved | +| 7 | ro | x | bypassed_7 | Is the RT inactive? | +| 6 | ro | x | bypassed_6 | Is the RT inactive? | +| 5 | ro | x | bypassed_5 | Is the RT inactive? | +| 4 | ro | x | bypassed_4 | Is the RT inactive? | +| 3 | ro | x | bypassed_3 | Is the RT inactive? | +| 2 | ro | x | bypassed_2 | Is the RT inactive? | +| 1 | ro | x | bypassed_1 | Is the RT inactive? | +| 0 | ro | x | bypassed_0 | Is the RT inactive? | + +## len_limit_0 +Fragmentation of the bursts in beats. +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "len_0", "bits": 8, "attr": ["wo"], "rotate": 0}, {"name": "len_1", "bits": 8, "attr": ["wo"], "rotate": 0}, {"name": "len_2", "bits": 8, "attr": ["wo"], "rotate": 0}, {"name": "len_3", "bits": 8, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------| +| 31:24 | wo | 0x0 | len_3 | Fragmentation of the bursts in beats. | +| 23:16 | wo | 0x0 | len_2 | Fragmentation of the bursts in beats. | +| 15:8 | wo | 0x0 | len_1 | Fragmentation of the bursts in beats. | +| 7:0 | wo | 0x0 | len_0 | Fragmentation of the bursts in beats. | + +## len_limit_1 +Fragmentation of the bursts in beats. +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "len_4", "bits": 8, "attr": ["wo"], "rotate": 0}, {"name": "len_5", "bits": 8, "attr": ["wo"], "rotate": 0}, {"name": "len_6", "bits": 8, "attr": ["wo"], "rotate": 0}, {"name": "len_7", "bits": 8, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------| +| 31:24 | wo | 0x0 | len_7 | For len_limit1 | +| 23:16 | wo | 0x0 | len_6 | For len_limit1 | +| 15:8 | wo | 0x0 | len_5 | For len_limit1 | +| 7:0 | wo | 0x0 | len_4 | For len_limit1 | + +## imtu_enable +Enables the IMTU. +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "enable_0", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "enable_1", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "enable_2", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "enable_3", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "enable_4", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "enable_5", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "enable_6", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "enable_7", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 100}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:------------------| +| 31:8 | | | | Reserved | +| 7 | wo | 0x0 | enable_7 | Enables the IMTU. | +| 6 | wo | 0x0 | enable_6 | Enables the IMTU. | +| 5 | wo | 0x0 | enable_5 | Enables the IMTU. | +| 4 | wo | 0x0 | enable_4 | Enables the IMTU. | +| 3 | wo | 0x0 | enable_3 | Enables the IMTU. | +| 2 | wo | 0x0 | enable_2 | Enables the IMTU. | +| 1 | wo | 0x0 | enable_1 | Enables the IMTU. | +| 0 | wo | 0x0 | enable_0 | Enables the IMTU. | + +## imtu_abort +Resets both the period and the budget. +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "abort_0", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "abort_1", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "abort_2", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "abort_3", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "abort_4", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "abort_5", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "abort_6", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "abort_7", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:---------------------------------------| +| 31:8 | | | | Reserved | +| 7 | wo | 0x0 | abort_7 | Resets both the period and the budget. | +| 6 | wo | 0x0 | abort_6 | Resets both the period and the budget. | +| 5 | wo | 0x0 | abort_5 | Resets both the period and the budget. | +| 4 | wo | 0x0 | abort_4 | Resets both the period and the budget. | +| 3 | wo | 0x0 | abort_3 | Resets both the period and the budget. | +| 2 | wo | 0x0 | abort_2 | Resets both the period and the budget. | +| 1 | wo | 0x0 | abort_1 | Resets both the period and the budget. | +| 0 | wo | 0x0 | abort_0 | Resets both the period and the budget. | + +## start_addr_sub_low +The lower 32bit of the start address. +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:----------------------|:---------| +| start_addr_sub_low_0 | 0x24 | +| start_addr_sub_low_1 | 0x28 | +| start_addr_sub_low_2 | 0x2c | +| start_addr_sub_low_3 | 0x30 | +| start_addr_sub_low_4 | 0x34 | +| start_addr_sub_low_5 | 0x38 | +| start_addr_sub_low_6 | 0x3c | +| start_addr_sub_low_7 | 0x40 | +| start_addr_sub_low_8 | 0x44 | +| start_addr_sub_low_9 | 0x48 | +| start_addr_sub_low_10 | 0x4c | +| start_addr_sub_low_11 | 0x50 | +| start_addr_sub_low_12 | 0x54 | +| start_addr_sub_low_13 | 0x58 | +| start_addr_sub_low_14 | 0x5c | +| start_addr_sub_low_15 | 0x60 | + + +### Fields + +```wavejson +{"reg": [{"name": "write_budget", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:--------------------------------------| +| 31:0 | wo | 0x0 | write_budget | The lower 32bit of the start address. | + +## start_addr_sub_high +The higher 32bit of the start address. +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:-----------------------|:---------| +| start_addr_sub_high_0 | 0x64 | +| start_addr_sub_high_1 | 0x68 | +| start_addr_sub_high_2 | 0x6c | +| start_addr_sub_high_3 | 0x70 | +| start_addr_sub_high_4 | 0x74 | +| start_addr_sub_high_5 | 0x78 | +| start_addr_sub_high_6 | 0x7c | +| start_addr_sub_high_7 | 0x80 | +| start_addr_sub_high_8 | 0x84 | +| start_addr_sub_high_9 | 0x88 | +| start_addr_sub_high_10 | 0x8c | +| start_addr_sub_high_11 | 0x90 | +| start_addr_sub_high_12 | 0x94 | +| start_addr_sub_high_13 | 0x98 | +| start_addr_sub_high_14 | 0x9c | +| start_addr_sub_high_15 | 0xa0 | + + +### Fields + +```wavejson +{"reg": [{"name": "write_budget", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:---------------------------------------| +| 31:0 | wo | 0x0 | write_budget | The higher 32bit of the start address. | + +## end_addr_sub_low +The lower 32bit of the end address. +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:--------------------|:---------| +| end_addr_sub_low_0 | 0xa4 | +| end_addr_sub_low_1 | 0xa8 | +| end_addr_sub_low_2 | 0xac | +| end_addr_sub_low_3 | 0xb0 | +| end_addr_sub_low_4 | 0xb4 | +| end_addr_sub_low_5 | 0xb8 | +| end_addr_sub_low_6 | 0xbc | +| end_addr_sub_low_7 | 0xc0 | +| end_addr_sub_low_8 | 0xc4 | +| end_addr_sub_low_9 | 0xc8 | +| end_addr_sub_low_10 | 0xcc | +| end_addr_sub_low_11 | 0xd0 | +| end_addr_sub_low_12 | 0xd4 | +| end_addr_sub_low_13 | 0xd8 | +| end_addr_sub_low_14 | 0xdc | +| end_addr_sub_low_15 | 0xe0 | + + +### Fields + +```wavejson +{"reg": [{"name": "write_budget", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:------------------------------------| +| 31:0 | wo | 0x0 | write_budget | The lower 32bit of the end address. | + +## end_addr_sub_high +The higher 32bit of the end address. +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:---------------------|:---------| +| end_addr_sub_high_0 | 0xe4 | +| end_addr_sub_high_1 | 0xe8 | +| end_addr_sub_high_2 | 0xec | +| end_addr_sub_high_3 | 0xf0 | +| end_addr_sub_high_4 | 0xf4 | +| end_addr_sub_high_5 | 0xf8 | +| end_addr_sub_high_6 | 0xfc | +| end_addr_sub_high_7 | 0x100 | +| end_addr_sub_high_8 | 0x104 | +| end_addr_sub_high_9 | 0x108 | +| end_addr_sub_high_10 | 0x10c | +| end_addr_sub_high_11 | 0x110 | +| end_addr_sub_high_12 | 0x114 | +| end_addr_sub_high_13 | 0x118 | +| end_addr_sub_high_14 | 0x11c | +| end_addr_sub_high_15 | 0x120 | + + +### Fields + +```wavejson +{"reg": [{"name": "write_budget", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:-------------------------------------| +| 31:0 | wo | 0x0 | write_budget | The higher 32bit of the end address. | + +## write_budget +The budget for writes. +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:----------------|:---------| +| write_budget_0 | 0x124 | +| write_budget_1 | 0x128 | +| write_budget_2 | 0x12c | +| write_budget_3 | 0x130 | +| write_budget_4 | 0x134 | +| write_budget_5 | 0x138 | +| write_budget_6 | 0x13c | +| write_budget_7 | 0x140 | +| write_budget_8 | 0x144 | +| write_budget_9 | 0x148 | +| write_budget_10 | 0x14c | +| write_budget_11 | 0x150 | +| write_budget_12 | 0x154 | +| write_budget_13 | 0x158 | +| write_budget_14 | 0x15c | +| write_budget_15 | 0x160 | + + +### Fields + +```wavejson +{"reg": [{"name": "write_budget", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:-----------------------| +| 31:0 | wo | 0x0 | write_budget | The budget for writes. | + +## read_budget +The budget for reads. +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:---------------|:---------| +| read_budget_0 | 0x164 | +| read_budget_1 | 0x168 | +| read_budget_2 | 0x16c | +| read_budget_3 | 0x170 | +| read_budget_4 | 0x174 | +| read_budget_5 | 0x178 | +| read_budget_6 | 0x17c | +| read_budget_7 | 0x180 | +| read_budget_8 | 0x184 | +| read_budget_9 | 0x188 | +| read_budget_10 | 0x18c | +| read_budget_11 | 0x190 | +| read_budget_12 | 0x194 | +| read_budget_13 | 0x198 | +| read_budget_14 | 0x19c | +| read_budget_15 | 0x1a0 | + + +### Fields + +```wavejson +{"reg": [{"name": "read_budget", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:----------------------| +| 31:0 | wo | 0x0 | read_budget | The budget for reads. | + +## write_period +The period for writes. +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:----------------|:---------| +| write_period_0 | 0x1a4 | +| write_period_1 | 0x1a8 | +| write_period_2 | 0x1ac | +| write_period_3 | 0x1b0 | +| write_period_4 | 0x1b4 | +| write_period_5 | 0x1b8 | +| write_period_6 | 0x1bc | +| write_period_7 | 0x1c0 | +| write_period_8 | 0x1c4 | +| write_period_9 | 0x1c8 | +| write_period_10 | 0x1cc | +| write_period_11 | 0x1d0 | +| write_period_12 | 0x1d4 | +| write_period_13 | 0x1d8 | +| write_period_14 | 0x1dc | +| write_period_15 | 0x1e0 | + + +### Fields + +```wavejson +{"reg": [{"name": "write_period", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:-----------------------| +| 31:0 | wo | 0x0 | write_period | The period for writes. | + +## read_period +The period for reads. +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:---------------|:---------| +| read_period_0 | 0x1e4 | +| read_period_1 | 0x1e8 | +| read_period_2 | 0x1ec | +| read_period_3 | 0x1f0 | +| read_period_4 | 0x1f4 | +| read_period_5 | 0x1f8 | +| read_period_6 | 0x1fc | +| read_period_7 | 0x200 | +| read_period_8 | 0x204 | +| read_period_9 | 0x208 | +| read_period_10 | 0x20c | +| read_period_11 | 0x210 | +| read_period_12 | 0x214 | +| read_period_13 | 0x218 | +| read_period_14 | 0x21c | +| read_period_15 | 0x220 | + + +### Fields + +```wavejson +{"reg": [{"name": "read_period", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:----------------------| +| 31:0 | wo | 0x0 | read_period | The period for reads. | + +## write_budget_left +The budget left for writes. +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:---------------------|:---------| +| write_budget_left_0 | 0x224 | +| write_budget_left_1 | 0x228 | +| write_budget_left_2 | 0x22c | +| write_budget_left_3 | 0x230 | +| write_budget_left_4 | 0x234 | +| write_budget_left_5 | 0x238 | +| write_budget_left_6 | 0x23c | +| write_budget_left_7 | 0x240 | +| write_budget_left_8 | 0x244 | +| write_budget_left_9 | 0x248 | +| write_budget_left_10 | 0x24c | +| write_budget_left_11 | 0x250 | +| write_budget_left_12 | 0x254 | +| write_budget_left_13 | 0x258 | +| write_budget_left_14 | 0x25c | +| write_budget_left_15 | 0x260 | + + +### Fields + +```wavejson +{"reg": [{"name": "write_budget_left", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:----------------------------| +| 31:0 | ro | 0x0 | write_budget_left | The budget left for writes. | + +## read_budget_left +The budget left for reads. +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:--------------------|:---------| +| read_budget_left_0 | 0x264 | +| read_budget_left_1 | 0x268 | +| read_budget_left_2 | 0x26c | +| read_budget_left_3 | 0x270 | +| read_budget_left_4 | 0x274 | +| read_budget_left_5 | 0x278 | +| read_budget_left_6 | 0x27c | +| read_budget_left_7 | 0x280 | +| read_budget_left_8 | 0x284 | +| read_budget_left_9 | 0x288 | +| read_budget_left_10 | 0x28c | +| read_budget_left_11 | 0x290 | +| read_budget_left_12 | 0x294 | +| read_budget_left_13 | 0x298 | +| read_budget_left_14 | 0x29c | +| read_budget_left_15 | 0x2a0 | + + +### Fields + +```wavejson +{"reg": [{"name": "read_budget_left", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:---------------------------| +| 31:0 | ro | 0x0 | read_budget_left | The budget left for reads. | + +## write_period_left +The period left for writes. +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:---------------------|:---------| +| write_period_left_0 | 0x2a4 | +| write_period_left_1 | 0x2a8 | +| write_period_left_2 | 0x2ac | +| write_period_left_3 | 0x2b0 | +| write_period_left_4 | 0x2b4 | +| write_period_left_5 | 0x2b8 | +| write_period_left_6 | 0x2bc | +| write_period_left_7 | 0x2c0 | +| write_period_left_8 | 0x2c4 | +| write_period_left_9 | 0x2c8 | +| write_period_left_10 | 0x2cc | +| write_period_left_11 | 0x2d0 | +| write_period_left_12 | 0x2d4 | +| write_period_left_13 | 0x2d8 | +| write_period_left_14 | 0x2dc | +| write_period_left_15 | 0x2e0 | + + +### Fields + +```wavejson +{"reg": [{"name": "write_period_left", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:----------------------------| +| 31:0 | ro | 0x0 | write_period_left | The period left for writes. | + +## read_period_left +The period left for reads. +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:--------------------|:---------| +| read_period_left_0 | 0x2e4 | +| read_period_left_1 | 0x2e8 | +| read_period_left_2 | 0x2ec | +| read_period_left_3 | 0x2f0 | +| read_period_left_4 | 0x2f4 | +| read_period_left_5 | 0x2f8 | +| read_period_left_6 | 0x2fc | +| read_period_left_7 | 0x300 | +| read_period_left_8 | 0x304 | +| read_period_left_9 | 0x308 | +| read_period_left_10 | 0x30c | +| read_period_left_11 | 0x310 | +| read_period_left_12 | 0x314 | +| read_period_left_13 | 0x318 | +| read_period_left_14 | 0x31c | +| read_period_left_15 | 0x320 | + + +### Fields + +```wavejson +{"reg": [{"name": "read_period_left", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:---------------------------| +| 31:0 | ro | 0x0 | read_period_left | The period left for reads. | + +## isolate +Is the interface requested to be isolated? +- Offset: `0x324` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "isolate_0", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "isolate_1", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "isolate_2", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "isolate_3", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "isolate_4", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "isolate_5", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "isolate_6", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "isolate_7", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-------------------------------------------| +| 31:8 | | | | Reserved | +| 7 | ro | x | isolate_7 | Is the interface requested to be isolated? | +| 6 | ro | x | isolate_6 | Is the interface requested to be isolated? | +| 5 | ro | x | isolate_5 | Is the interface requested to be isolated? | +| 4 | ro | x | isolate_4 | Is the interface requested to be isolated? | +| 3 | ro | x | isolate_3 | Is the interface requested to be isolated? | +| 2 | ro | x | isolate_2 | Is the interface requested to be isolated? | +| 1 | ro | x | isolate_1 | Is the interface requested to be isolated? | +| 0 | ro | x | isolate_0 | Is the interface requested to be isolated? | + +## isolated +Is the interface isolated? +- Offset: `0x328` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "isolated_0", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "isolated_1", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "isolated_2", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "isolated_3", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "isolated_4", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "isolated_5", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "isolated_6", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "isolated_7", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:---------------------------| +| 31:8 | | | | Reserved | +| 7 | ro | x | isolated_7 | Is the interface isolated? | +| 6 | ro | x | isolated_6 | Is the interface isolated? | +| 5 | ro | x | isolated_5 | Is the interface isolated? | +| 4 | ro | x | isolated_4 | Is the interface isolated? | +| 3 | ro | x | isolated_3 | Is the interface isolated? | +| 2 | ro | x | isolated_2 | Is the interface isolated? | +| 1 | ro | x | isolated_1 | Is the interface isolated? | +| 0 | ro | x | isolated_0 | Is the interface isolated? | + +## num_managers +Value of the num_managers parameter. +- Offset: `0x32c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "num_managers", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:-------------------------------------| +| 31:0 | ro | x | num_managers | Value of the num_managers parameter. | + +## addr_width +Value of the addr_width parameter. +- Offset: `0x330` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "addr_width", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:-----------------------------------| +| 31:0 | ro | x | addr_width | Value of the addr_width parameter. | + +## data_width +Value of the data_width parameter. +- Offset: `0x334` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "data_width", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:-----------------------------------| +| 31:0 | ro | x | data_width | Value of the data_width parameter. | + +## id_width +Value of the id_width parameter. +- Offset: `0x338` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "id_width", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:---------------------------------| +| 31:0 | ro | x | id_width | Value of the id_width parameter. | + +## user_width +Value of the user_width parameter. +- Offset: `0x33c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "user_width", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:-----------------------------------| +| 31:0 | ro | x | user_width | Value of the user_width parameter. | + +## num_pending +Value of the num_pending parameter. +- Offset: `0x340` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "num_pending", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:------------------------------------| +| 31:0 | ro | x | num_pending | Value of the num_pending parameter. | + +## w_buffer_depth +Value of the w_buffer_depth parameter. +- Offset: `0x344` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "w_buffer_depth", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:---------------------------------------| +| 31:0 | ro | x | w_buffer_depth | Value of the w_buffer_depth parameter. | + +## num_addr_regions +Value of the num_addr_regions parameter. +- Offset: `0x348` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "num_addr_regions", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:-----------------------------------------| +| 31:0 | ro | x | num_addr_regions | Value of the num_addr_regions parameter. | + +## period_width +Value of the period_width parameter. +- Offset: `0x34c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "period_width", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:-------------------------------------| +| 31:0 | ro | x | period_width | Value of the period_width parameter. | + +## budget_width +Value of the budget_width parameter. +- Offset: `0x350` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "budget_width", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:-------------------------------------| +| 31:0 | ro | x | budget_width | Value of the budget_width parameter. | + +## max_num_managers +Value of the max_num_managers parameter. +- Offset: `0x354` +- Reset default: `0x8` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "max_num_managers", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:-----------------------------------------| +| 31:0 | ro | 0x8 | max_num_managers | Value of the max_num_managers parameter. | + diff --git a/docs/um/ip/can_bus/data/can_bus_regs.hjson b/docs/um/ip/can_bus/data/can_bus_regs.hjson new file mode 100644 index 00000000..15588bf4 --- /dev/null +++ b/docs/um/ip/can_bus/data/can_bus_regs.hjson @@ -0,0 +1,11535 @@ +// Copyright 2015-2024 Czech Technical University in Prague +// Licensed under a dual MIT / Non-commercial license; see LICENSE for details. +// SPDX-License-Identifier: MIT AND LicenseRef-CTU-NC +// +// Developed by: +// Ondrej Ille +// Martin Jerabek +// +// CTU CAN FD IP Core – Department of Measurement, CTU in Prague +// Register layout of CAN BUS + +{ + name: "can_bus", + human_name: "CAN Bus Controller", + one_line_desc: "Controller for CAN Bus communication", + one_paragraph_desc: '''The CAN Bus Controller IP facilitates communication over the Controller Area Network (CAN) protocol. + It supports both standard and extended frames, with configurable baud rates, interrupt handling, and filtering capabilities. + ''', + cip_id: "36", + version: "0.0.0", //null, 0ec0bf8 + regwidth: "32", + clocking: [ + { clock: "clk_i", reset: "rst_ni", idle: "idle_o", primary: true } + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device" } + ], + registers: [ + { + name: "ahb_ifc_hsel_valid", + desc: "Auto-extracted signal hsel_valid from ahb_ifc.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "ahb_ifc_write_acc_d", + desc: "Auto-extracted signal write_acc_d from ahb_ifc.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "ahb_ifc_write_acc_q", + desc: "Auto-extracted signal write_acc_q from ahb_ifc.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "ahb_ifc_haddr_q", + desc: "Auto-extracted signal haddr_q from ahb_ifc.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "ahb_ifc_h_ready_raw", + desc: "Auto-extracted signal h_ready_raw from ahb_ifc.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "ahb_ifc_sbe_d", + desc: "Auto-extracted signal sbe_d from ahb_ifc.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "ahb_ifc_sbe_q", + desc: "Auto-extracted signal sbe_q from ahb_ifc.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "ahb_ifc_swr_i", + desc: "Auto-extracted signal swr_i from ahb_ifc.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "ahb_ifc_srd_i", + desc: "Auto-extracted signal srd_i from ahb_ifc.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_destuffing_discard_stuff_bit", + desc: "Auto-extracted signal discard_stuff_bit from bit_destuffing.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_destuffing_non_fix_to_fix_chng", + desc: "Auto-extracted signal non_fix_to_fix_chng from bit_destuffing.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_destuffing_stuff_lvl_reached", + desc: "Auto-extracted signal stuff_lvl_reached from bit_destuffing.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_destuffing_stuff_rule_violate", + desc: "Auto-extracted signal stuff_rule_violate from bit_destuffing.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_destuffing_enable_prev", + desc: "Auto-extracted signal enable_prev from bit_destuffing.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_destuffing_fixed_prev_q", + desc: "Auto-extracted signal fixed_prev_q from bit_destuffing.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_destuffing_fixed_prev_d", + desc: "Auto-extracted signal fixed_prev_d from bit_destuffing.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_destuffing_same_bits_erase", + desc: "Auto-extracted signal same_bits_erase from bit_destuffing.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_destuffing_destuffed_q", + desc: "Auto-extracted signal destuffed_q from bit_destuffing.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_destuffing_destuffed_d", + desc: "Auto-extracted signal destuffed_d from bit_destuffing.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_destuffing_stuff_err_q", + desc: "Auto-extracted signal stuff_err_q from bit_destuffing.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_destuffing_stuff_err_d", + desc: "Auto-extracted signal stuff_err_d from bit_destuffing.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_destuffing_prev_val_q", + desc: "Auto-extracted signal prev_val_q from bit_destuffing.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_destuffing_prev_val_d", + desc: "Auto-extracted signal prev_val_d from bit_destuffing.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_err_detector_bit_err_d", + desc: "Auto-extracted signal bit_err_d from bit_err_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_err_detector_bit_err_q", + desc: "Auto-extracted signal bit_err_q from bit_err_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_err_detector_bit_err_ssp_capt_d", + desc: "Auto-extracted signal bit_err_ssp_capt_d from bit_err_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_err_detector_bit_err_ssp_capt_q", + desc: "Auto-extracted signal bit_err_ssp_capt_q from bit_err_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_err_detector_bit_err_ssp_valid", + desc: "Auto-extracted signal bit_err_ssp_valid from bit_err_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_err_detector_bit_err_ssp_condition", + desc: "Auto-extracted signal bit_err_ssp_condition from bit_err_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_err_detector_bit_err_norm_valid", + desc: "Auto-extracted signal bit_err_norm_valid from bit_err_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_filter_masked_input", + desc: "Auto-extracted signal masked_input from bit_filter.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_filter_masked_value", + desc: "Auto-extracted signal masked_value from bit_filter.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_segment_meter_sel_tseg1", + desc: "Auto-extracted signal sel_tseg1 from bit_segment_meter.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_segment_meter_exp_seg_length_ce", + desc: "Auto-extracted signal exp_seg_length_ce from bit_segment_meter.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_segment_meter_phase_err_mt_sjw", + desc: "Auto-extracted signal phase_err_mt_sjw from bit_segment_meter.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_segment_meter_phase_err_eq_sjw", + desc: "Auto-extracted signal phase_err_eq_sjw from bit_segment_meter.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_segment_meter_exit_ph2_immediate", + desc: "Auto-extracted signal exit_ph2_immediate from bit_segment_meter.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_segment_meter_exit_segm_regular", + desc: "Auto-extracted signal exit_segm_regular from bit_segment_meter.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_segment_meter_exit_segm_regular_tseg1", + desc: "Auto-extracted signal exit_segm_regular_tseg1 from bit_segment_meter.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_segment_meter_exit_segm_regular_tseg2", + desc: "Auto-extracted signal exit_segm_regular_tseg2 from bit_segment_meter.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_segment_meter_sjw_mt_zero", + desc: "Auto-extracted signal sjw_mt_zero from bit_segment_meter.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_segment_meter_use_basic_segm_length", + desc: "Auto-extracted signal use_basic_segm_length from bit_segment_meter.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_segment_meter_phase_err_sjw_by_one", + desc: "Auto-extracted signal phase_err_sjw_by_one from bit_segment_meter.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_segment_meter_shorten_tseg1_after_tseg2", + desc: "Auto-extracted signal shorten_tseg1_after_tseg2 from bit_segment_meter.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_stuffing_data_out_i", + desc: "Auto-extracted signal data_out_i from bit_stuffing.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_stuffing_data_halt_q", + desc: "Auto-extracted signal data_halt_q from bit_stuffing.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_stuffing_data_halt_d", + desc: "Auto-extracted signal data_halt_d from bit_stuffing.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_stuffing_fixed_reg_q", + desc: "Auto-extracted signal fixed_reg_q from bit_stuffing.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_stuffing_fixed_reg_d", + desc: "Auto-extracted signal fixed_reg_d from bit_stuffing.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_stuffing_enable_prev", + desc: "Auto-extracted signal enable_prev from bit_stuffing.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_stuffing_non_fix_to_fix_chng", + desc: "Auto-extracted signal non_fix_to_fix_chng from bit_stuffing.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_stuffing_stuff_lvl_reached", + desc: "Auto-extracted signal stuff_lvl_reached from bit_stuffing.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_stuffing_same_bits_rst_trig", + desc: "Auto-extracted signal same_bits_rst_trig from bit_stuffing.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_stuffing_same_bits_rst", + desc: "Auto-extracted signal same_bits_rst from bit_stuffing.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_stuffing_insert_stuff_bit", + desc: "Auto-extracted signal insert_stuff_bit from bit_stuffing.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_stuffing_data_out_d_ena", + desc: "Auto-extracted signal data_out_d_ena from bit_stuffing.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_stuffing_data_out_d", + desc: "Auto-extracted signal data_out_d from bit_stuffing.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_stuffing_data_out_ce", + desc: "Auto-extracted signal data_out_ce from bit_stuffing.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_time_cfg_capture_drv_tq_nbt", + desc: "Auto-extracted signal drv_tq_nbt from bit_time_cfg_capture.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_time_cfg_capture_drv_prs_nbt", + desc: "Auto-extracted signal drv_prs_nbt from bit_time_cfg_capture.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_time_cfg_capture_drv_ph1_nbt", + desc: "Auto-extracted signal drv_ph1_nbt from bit_time_cfg_capture.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_time_cfg_capture_drv_ph2_nbt", + desc: "Auto-extracted signal drv_ph2_nbt from bit_time_cfg_capture.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_time_cfg_capture_drv_sjw_nbt", + desc: "Auto-extracted signal drv_sjw_nbt from bit_time_cfg_capture.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_time_cfg_capture_drv_tq_dbt", + desc: "Auto-extracted signal drv_tq_dbt from bit_time_cfg_capture.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_time_cfg_capture_drv_prs_dbt", + desc: "Auto-extracted signal drv_prs_dbt from bit_time_cfg_capture.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_time_cfg_capture_drv_ph1_dbt", + desc: "Auto-extracted signal drv_ph1_dbt from bit_time_cfg_capture.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_time_cfg_capture_drv_ph2_dbt", + desc: "Auto-extracted signal drv_ph2_dbt from bit_time_cfg_capture.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_time_cfg_capture_drv_sjw_dbt", + desc: "Auto-extracted signal drv_sjw_dbt from bit_time_cfg_capture.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_time_cfg_capture_tseg1_nbt_d", + desc: "Auto-extracted signal tseg1_nbt_d from bit_time_cfg_capture.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_time_cfg_capture_tseg1_dbt_d", + desc: "Auto-extracted signal tseg1_dbt_d from bit_time_cfg_capture.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_time_cfg_capture_drv_ena", + desc: "Auto-extracted signal drv_ena from bit_time_cfg_capture.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_time_cfg_capture_drv_ena_reg", + desc: "Auto-extracted signal drv_ena_reg from bit_time_cfg_capture.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_time_cfg_capture_drv_ena_reg_2", + desc: "Auto-extracted signal drv_ena_reg_2 from bit_time_cfg_capture.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_time_cfg_capture_capture", + desc: "Auto-extracted signal capture from bit_time_cfg_capture.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_time_counters_tq_counter_d", + desc: "Auto-extracted signal tq_counter_d from bit_time_counters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_time_counters_tq_counter_q", + desc: "Auto-extracted signal tq_counter_q from bit_time_counters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_time_counters_tq_counter_ce", + desc: "Auto-extracted signal tq_counter_ce from bit_time_counters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_time_counters_tq_counter_allow", + desc: "Auto-extracted signal tq_counter_allow from bit_time_counters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_time_counters_tq_edge_i", + desc: "Auto-extracted signal tq_edge_i from bit_time_counters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_time_counters_segm_counter_d", + desc: "Auto-extracted signal segm_counter_d from bit_time_counters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_time_counters_segm_counter_q", + desc: "Auto-extracted signal segm_counter_q from bit_time_counters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_time_counters_segm_counter_ce", + desc: "Auto-extracted signal segm_counter_ce from bit_time_counters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bit_time_fsm_bt_fsm_ce", + desc: "Auto-extracted signal bt_fsm_ce from bit_time_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bus_sampling_drv_ena", + desc: "Auto-extracted signal drv_ena from bus_sampling.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bus_sampling_drv_ssp_offset", + desc: "Auto-extracted signal drv_ssp_offset from bus_sampling.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bus_sampling_drv_ssp_delay_select", + desc: "Auto-extracted signal drv_ssp_delay_select from bus_sampling.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bus_sampling_data_rx_synced", + desc: "Auto-extracted signal data_rx_synced from bus_sampling.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bus_sampling_prev_Sample", + desc: "Auto-extracted signal prev_Sample from bus_sampling.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bus_sampling_sample_sec_i", + desc: "Auto-extracted signal sample_sec_i from bus_sampling.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bus_sampling_data_tx_delayed", + desc: "Auto-extracted signal data_tx_delayed from bus_sampling.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bus_sampling_edge_rx_valid", + desc: "Auto-extracted signal edge_rx_valid from bus_sampling.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bus_sampling_edge_tx_valid", + desc: "Auto-extracted signal edge_tx_valid from bus_sampling.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bus_sampling_ssp_delay", + desc: "Auto-extracted signal ssp_delay from bus_sampling.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bus_sampling_tx_trigger_q", + desc: "Auto-extracted signal tx_trigger_q from bus_sampling.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bus_sampling_tx_trigger_ssp", + desc: "Auto-extracted signal tx_trigger_ssp from bus_sampling.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bus_sampling_shift_regs_res_d", + desc: "Auto-extracted signal shift_regs_res_d from bus_sampling.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bus_sampling_shift_regs_res_q", + desc: "Auto-extracted signal shift_regs_res_q from bus_sampling.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bus_sampling_shift_regs_res_q_scan", + desc: "Auto-extracted signal shift_regs_res_q_scan from bus_sampling.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bus_sampling_ssp_enable", + desc: "Auto-extracted signal ssp_enable from bus_sampling.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bus_traffic_counters_tx_ctr_i", + desc: "Auto-extracted signal tx_ctr_i from bus_traffic_counters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bus_traffic_counters_rx_ctr_i", + desc: "Auto-extracted signal rx_ctr_i from bus_traffic_counters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bus_traffic_counters_tx_ctr_rst_n_d", + desc: "Auto-extracted signal tx_ctr_rst_n_d from bus_traffic_counters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bus_traffic_counters_tx_ctr_rst_n_q", + desc: "Auto-extracted signal tx_ctr_rst_n_q from bus_traffic_counters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bus_traffic_counters_tx_ctr_rst_n_q_scan", + desc: "Auto-extracted signal tx_ctr_rst_n_q_scan from bus_traffic_counters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bus_traffic_counters_rx_ctr_rst_n_d", + desc: "Auto-extracted signal rx_ctr_rst_n_d from bus_traffic_counters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bus_traffic_counters_rx_ctr_rst_n_q", + desc: "Auto-extracted signal rx_ctr_rst_n_q from bus_traffic_counters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "bus_traffic_counters_rx_ctr_rst_n_q_scan", + desc: "Auto-extracted signal rx_ctr_rst_n_q_scan from bus_traffic_counters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_apb_tb_s_apb_paddr", + desc: "Auto-extracted signal s_apb_paddr from can_apb_tb.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_apb_tb_s_apb_penable", + desc: "Auto-extracted signal s_apb_penable from can_apb_tb.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_apb_tb_s_apb_pprot", + desc: "Auto-extracted signal s_apb_pprot from can_apb_tb.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_apb_tb_s_apb_prdata", + desc: "Auto-extracted signal s_apb_prdata from can_apb_tb.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_apb_tb_s_apb_pready", + desc: "Auto-extracted signal s_apb_pready from can_apb_tb.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_apb_tb_s_apb_psel", + desc: "Auto-extracted signal s_apb_psel from can_apb_tb.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_apb_tb_s_apb_pslverr", + desc: "Auto-extracted signal s_apb_pslverr from can_apb_tb.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_apb_tb_s_apb_pstrb", + desc: "Auto-extracted signal s_apb_pstrb from can_apb_tb.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_apb_tb_s_apb_pwdata", + desc: "Auto-extracted signal s_apb_pwdata from can_apb_tb.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_apb_tb_s_apb_pwrite", + desc: "Auto-extracted signal s_apb_pwrite from can_apb_tb.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_drv_clr_rx_ctr", + desc: "Auto-extracted signal drv_clr_rx_ctr from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_drv_clr_tx_ctr", + desc: "Auto-extracted signal drv_clr_tx_ctr from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_drv_bus_mon_ena", + desc: "Auto-extracted signal drv_bus_mon_ena from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_drv_ena", + desc: "Auto-extracted signal drv_ena from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_rec_ident_i", + desc: "Auto-extracted signal rec_ident_i from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_rec_dlc_i", + desc: "Auto-extracted signal rec_dlc_i from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_rec_ident_type_i", + desc: "Auto-extracted signal rec_ident_type_i from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_rec_frame_type_i", + desc: "Auto-extracted signal rec_frame_type_i from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_rec_is_rtr_i", + desc: "Auto-extracted signal rec_is_rtr_i from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_rec_brs_i", + desc: "Auto-extracted signal rec_brs_i from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_rec_esi_i", + desc: "Auto-extracted signal rec_esi_i from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_alc", + desc: "Auto-extracted signal alc from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_erc_capture", + desc: "Auto-extracted signal erc_capture from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_is_transmitter", + desc: "Auto-extracted signal is_transmitter from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_is_receiver", + desc: "Auto-extracted signal is_receiver from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_is_idle", + desc: "Auto-extracted signal is_idle from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_arbitration_lost_i", + desc: "Auto-extracted signal arbitration_lost_i from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_set_transmitter", + desc: "Auto-extracted signal set_transmitter from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_set_receiver", + desc: "Auto-extracted signal set_receiver from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_set_idle", + desc: "Auto-extracted signal set_idle from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_is_err_active", + desc: "Auto-extracted signal is_err_active from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_is_err_passive", + desc: "Auto-extracted signal is_err_passive from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_is_bus_off_i", + desc: "Auto-extracted signal is_bus_off_i from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_err_detected_i", + desc: "Auto-extracted signal err_detected_i from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_primary_err", + desc: "Auto-extracted signal primary_err from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_act_err_ovr_flag", + desc: "Auto-extracted signal act_err_ovr_flag from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_err_delim_late", + desc: "Auto-extracted signal err_delim_late from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_set_err_active", + desc: "Auto-extracted signal set_err_active from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_err_ctrs_unchanged", + desc: "Auto-extracted signal err_ctrs_unchanged from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_stuff_enable", + desc: "Auto-extracted signal stuff_enable from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_destuff_enable", + desc: "Auto-extracted signal destuff_enable from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_fixed_stuff", + desc: "Auto-extracted signal fixed_stuff from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_tx_frame_no_sof", + desc: "Auto-extracted signal tx_frame_no_sof from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_stuff_length", + desc: "Auto-extracted signal stuff_length from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_dst_ctr", + desc: "Auto-extracted signal dst_ctr from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_bst_ctr", + desc: "Auto-extracted signal bst_ctr from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_stuff_err", + desc: "Auto-extracted signal stuff_err from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_crc_enable", + desc: "Auto-extracted signal crc_enable from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_crc_spec_enable", + desc: "Auto-extracted signal crc_spec_enable from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_crc_calc_from_rx", + desc: "Auto-extracted signal crc_calc_from_rx from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_crc_15", + desc: "Auto-extracted signal crc_15 from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_crc_17", + desc: "Auto-extracted signal crc_17 from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_crc_21", + desc: "Auto-extracted signal crc_21 from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_sp_control_i", + desc: "Auto-extracted signal sp_control_i from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_sp_control_q", + desc: "Auto-extracted signal sp_control_q from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_sync_control_i", + desc: "Auto-extracted signal sync_control_i from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_ssp_reset_i", + desc: "Auto-extracted signal ssp_reset_i from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_tran_delay_meas_i", + desc: "Auto-extracted signal tran_delay_meas_i from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_tran_valid_i", + desc: "Auto-extracted signal tran_valid_i from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_rec_valid_i", + desc: "Auto-extracted signal rec_valid_i from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_br_shifted_i", + desc: "Auto-extracted signal br_shifted_i from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_fcs_changed_i", + desc: "Auto-extracted signal fcs_changed_i from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_err_warning_limit_i", + desc: "Auto-extracted signal err_warning_limit_i from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_tx_err_ctr", + desc: "Auto-extracted signal tx_err_ctr from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_rx_err_ctr", + desc: "Auto-extracted signal rx_err_ctr from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_norm_err_ctr", + desc: "Auto-extracted signal norm_err_ctr from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_data_err_ctr", + desc: "Auto-extracted signal data_err_ctr from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_pc_tx_trigger", + desc: "Auto-extracted signal pc_tx_trigger from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_pc_rx_trigger", + desc: "Auto-extracted signal pc_rx_trigger from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_pc_tx_data_nbs", + desc: "Auto-extracted signal pc_tx_data_nbs from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_pc_rx_data_nbs", + desc: "Auto-extracted signal pc_rx_data_nbs from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_crc_data_tx_wbs", + desc: "Auto-extracted signal crc_data_tx_wbs from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_crc_data_tx_nbs", + desc: "Auto-extracted signal crc_data_tx_nbs from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_crc_data_rx_wbs", + desc: "Auto-extracted signal crc_data_rx_wbs from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_crc_data_rx_nbs", + desc: "Auto-extracted signal crc_data_rx_nbs from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_crc_trig_tx_wbs", + desc: "Auto-extracted signal crc_trig_tx_wbs from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_crc_trig_tx_nbs", + desc: "Auto-extracted signal crc_trig_tx_nbs from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_crc_trig_rx_wbs", + desc: "Auto-extracted signal crc_trig_rx_wbs from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_crc_trig_rx_nbs", + desc: "Auto-extracted signal crc_trig_rx_nbs from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_bst_data_in", + desc: "Auto-extracted signal bst_data_in from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_bst_data_out", + desc: "Auto-extracted signal bst_data_out from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_bst_trigger", + desc: "Auto-extracted signal bst_trigger from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_data_halt", + desc: "Auto-extracted signal data_halt from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_bds_data_in", + desc: "Auto-extracted signal bds_data_in from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_bds_data_out", + desc: "Auto-extracted signal bds_data_out from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_bds_trigger", + desc: "Auto-extracted signal bds_trigger from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_destuffed", + desc: "Auto-extracted signal destuffed from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_tx_ctr", + desc: "Auto-extracted signal tx_ctr from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_rx_ctr", + desc: "Auto-extracted signal rx_ctr from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_tx_data_wbs_i", + desc: "Auto-extracted signal tx_data_wbs_i from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_lpb_dominant", + desc: "Auto-extracted signal lpb_dominant from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_form_err", + desc: "Auto-extracted signal form_err from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_ack_err", + desc: "Auto-extracted signal ack_err from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_crc_err", + desc: "Auto-extracted signal crc_err from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_is_arbitration", + desc: "Auto-extracted signal is_arbitration from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_is_control", + desc: "Auto-extracted signal is_control from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_is_data", + desc: "Auto-extracted signal is_data from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_is_stuff_count", + desc: "Auto-extracted signal is_stuff_count from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_is_crc", + desc: "Auto-extracted signal is_crc from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_is_crc_delim", + desc: "Auto-extracted signal is_crc_delim from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_is_ack_field", + desc: "Auto-extracted signal is_ack_field from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_is_ack_delim", + desc: "Auto-extracted signal is_ack_delim from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_is_eof", + desc: "Auto-extracted signal is_eof from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_is_err_frm", + desc: "Auto-extracted signal is_err_frm from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_is_intermission", + desc: "Auto-extracted signal is_intermission from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_is_suspend", + desc: "Auto-extracted signal is_suspend from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_is_overload_i", + desc: "Auto-extracted signal is_overload_i from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_is_sof", + desc: "Auto-extracted signal is_sof from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_sof_pulse_i", + desc: "Auto-extracted signal sof_pulse_i from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_load_init_vect", + desc: "Auto-extracted signal load_init_vect from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_retr_ctr_i", + desc: "Auto-extracted signal retr_ctr_i from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_decrement_rec", + desc: "Auto-extracted signal decrement_rec from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_bit_err_after_ack_err", + desc: "Auto-extracted signal bit_err_after_ack_err from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_core_is_pexs", + desc: "Auto-extracted signal is_pexs from can_core.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_crc_drv_fd_type", + desc: "Auto-extracted signal drv_fd_type from can_crc.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_crc_init_vect_15", + desc: "Auto-extracted signal init_vect_15 from can_crc.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_crc_init_vect_17", + desc: "Auto-extracted signal init_vect_17 from can_crc.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_crc_init_vect_21", + desc: "Auto-extracted signal init_vect_21 from can_crc.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_crc_crc_17_21_data_in", + desc: "Auto-extracted signal crc_17_21_data_in from can_crc.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_crc_crc_17_21_trigger", + desc: "Auto-extracted signal crc_17_21_trigger from can_crc.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_crc_crc_15_data_in", + desc: "Auto-extracted signal crc_15_data_in from can_crc.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_crc_crc_15_trigger", + desc: "Auto-extracted signal crc_15_trigger from can_crc.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_crc_crc_ena_15", + desc: "Auto-extracted signal crc_ena_15 from can_crc.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_crc_crc_ena_17_21", + desc: "Auto-extracted signal crc_ena_17_21 from can_crc.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_ahb_ctu_can_data_in", + desc: "Auto-extracted signal ctu_can_data_in from can_top_ahb.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_ahb_ctu_can_data_out", + desc: "Auto-extracted signal ctu_can_data_out from can_top_ahb.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_ahb_ctu_can_adress", + desc: "Auto-extracted signal ctu_can_adress from can_top_ahb.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_ahb_ctu_can_scs", + desc: "Auto-extracted signal ctu_can_scs from can_top_ahb.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_ahb_ctu_can_srd", + desc: "Auto-extracted signal ctu_can_srd from can_top_ahb.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_ahb_ctu_can_swr", + desc: "Auto-extracted signal ctu_can_swr from can_top_ahb.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_ahb_ctu_can_sbe", + desc: "Auto-extracted signal ctu_can_sbe from can_top_ahb.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_ahb_res_n_out_i", + desc: "Auto-extracted signal res_n_out_i from can_top_ahb.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_apb_reg_data_in", + desc: "Auto-extracted signal reg_data_in from can_top_apb.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_apb_reg_data_out", + desc: "Auto-extracted signal reg_data_out from can_top_apb.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_apb_reg_addr", + desc: "Auto-extracted signal reg_addr from can_top_apb.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_apb_reg_be", + desc: "Auto-extracted signal reg_be from can_top_apb.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_apb_reg_rden", + desc: "Auto-extracted signal reg_rden from can_top_apb.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_apb_reg_wren", + desc: "Auto-extracted signal reg_wren from can_top_apb.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_drv_bus", + desc: "Auto-extracted signal drv_bus from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_stat_bus", + desc: "Auto-extracted signal stat_bus from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_res_n_sync", + desc: "Auto-extracted signal res_n_sync from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_res_core_n", + desc: "Auto-extracted signal res_core_n from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_res_soft_n", + desc: "Auto-extracted signal res_soft_n from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_sp_control", + desc: "Auto-extracted signal sp_control from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_rx_buf_size", + desc: "Auto-extracted signal rx_buf_size from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_rx_full", + desc: "Auto-extracted signal rx_full from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_rx_empty", + desc: "Auto-extracted signal rx_empty from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_rx_frame_count", + desc: "Auto-extracted signal rx_frame_count from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_rx_mem_free", + desc: "Auto-extracted signal rx_mem_free from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_rx_read_pointer", + desc: "Auto-extracted signal rx_read_pointer from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_rx_write_pointer", + desc: "Auto-extracted signal rx_write_pointer from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_rx_data_overrun", + desc: "Auto-extracted signal rx_data_overrun from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_rx_read_buff", + desc: "Auto-extracted signal rx_read_buff from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_rx_mof", + desc: "Auto-extracted signal rx_mof from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_txtb_port_a_data", + desc: "Auto-extracted signal txtb_port_a_data from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_txtb_port_a_address", + desc: "Auto-extracted signal txtb_port_a_address from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_txtb_port_a_cs", + desc: "Auto-extracted signal txtb_port_a_cs from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_txtb_port_a_be", + desc: "Auto-extracted signal txtb_port_a_be from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_txtb_sw_cmd_index", + desc: "Auto-extracted signal txtb_sw_cmd_index from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_txt_buf_failed_bof", + desc: "Auto-extracted signal txt_buf_failed_bof from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_int_vector", + desc: "Auto-extracted signal int_vector from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_int_ena", + desc: "Auto-extracted signal int_ena from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_int_mask", + desc: "Auto-extracted signal int_mask from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_rec_ident", + desc: "Auto-extracted signal rec_ident from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_rec_dlc", + desc: "Auto-extracted signal rec_dlc from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_rec_ident_type", + desc: "Auto-extracted signal rec_ident_type from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_rec_frame_type", + desc: "Auto-extracted signal rec_frame_type from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_rec_is_rtr", + desc: "Auto-extracted signal rec_is_rtr from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_rec_brs", + desc: "Auto-extracted signal rec_brs from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_rec_esi", + desc: "Auto-extracted signal rec_esi from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_store_data_word", + desc: "Auto-extracted signal store_data_word from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_sof_pulse", + desc: "Auto-extracted signal sof_pulse from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_store_metadata", + desc: "Auto-extracted signal store_metadata from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_store_data", + desc: "Auto-extracted signal store_data from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_rec_valid", + desc: "Auto-extracted signal rec_valid from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_rec_abort", + desc: "Auto-extracted signal rec_abort from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_store_metadata_f", + desc: "Auto-extracted signal store_metadata_f from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_store_data_f", + desc: "Auto-extracted signal store_data_f from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_rec_valid_f", + desc: "Auto-extracted signal rec_valid_f from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_rec_abort_f", + desc: "Auto-extracted signal rec_abort_f from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_txtb_hw_cmd_int", + desc: "Auto-extracted signal txtb_hw_cmd_int from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_is_bus_off", + desc: "Auto-extracted signal is_bus_off from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_txtb_available", + desc: "Auto-extracted signal txtb_available from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_txtb_port_b_clk_en", + desc: "Auto-extracted signal txtb_port_b_clk_en from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_tran_dlc", + desc: "Auto-extracted signal tran_dlc from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_tran_is_rtr", + desc: "Auto-extracted signal tran_is_rtr from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_tran_ident_type", + desc: "Auto-extracted signal tran_ident_type from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_tran_frame_type", + desc: "Auto-extracted signal tran_frame_type from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_tran_brs", + desc: "Auto-extracted signal tran_brs from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_tran_identifier", + desc: "Auto-extracted signal tran_identifier from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_tran_word", + desc: "Auto-extracted signal tran_word from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_tran_frame_valid", + desc: "Auto-extracted signal tran_frame_valid from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_txtb_changed", + desc: "Auto-extracted signal txtb_changed from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_txtb_clk_en", + desc: "Auto-extracted signal txtb_clk_en from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_err_detected", + desc: "Auto-extracted signal err_detected from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_fcs_changed", + desc: "Auto-extracted signal fcs_changed from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_err_warning_limit", + desc: "Auto-extracted signal err_warning_limit from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_arbitration_lost", + desc: "Auto-extracted signal arbitration_lost from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_tran_valid", + desc: "Auto-extracted signal tran_valid from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_br_shifted", + desc: "Auto-extracted signal br_shifted from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_is_overload", + desc: "Auto-extracted signal is_overload from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_rx_triggers", + desc: "Auto-extracted signal rx_triggers from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_tx_trigger", + desc: "Auto-extracted signal tx_trigger from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_sync_control", + desc: "Auto-extracted signal sync_control from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_no_pos_resync", + desc: "Auto-extracted signal no_pos_resync from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_nbt_ctrs_en", + desc: "Auto-extracted signal nbt_ctrs_en from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_dbt_ctrs_en", + desc: "Auto-extracted signal dbt_ctrs_en from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_trv_delay", + desc: "Auto-extracted signal trv_delay from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_rx_data_wbs", + desc: "Auto-extracted signal rx_data_wbs from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_tx_data_wbs", + desc: "Auto-extracted signal tx_data_wbs from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_ssp_reset", + desc: "Auto-extracted signal ssp_reset from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_tran_delay_meas", + desc: "Auto-extracted signal tran_delay_meas from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_bit_err", + desc: "Auto-extracted signal bit_err from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_sample_sec", + desc: "Auto-extracted signal sample_sec from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_btmc_reset", + desc: "Auto-extracted signal btmc_reset from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_dbt_measure_start", + desc: "Auto-extracted signal dbt_measure_start from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_gen_first_ssp", + desc: "Auto-extracted signal gen_first_ssp from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_sync_edge", + desc: "Auto-extracted signal sync_edge from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_tq_edge", + desc: "Auto-extracted signal tq_edge from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "can_top_level_tst_rdata_rx_buf", + desc: "Auto-extracted signal tst_rdata_rx_buf from can_top_level.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "clk_gate_clk_en_q", + desc: "Auto-extracted signal clk_en_q from clk_gate.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "control_counter_ctrl_ctr_ce", + desc: "Auto-extracted signal ctrl_ctr_ce from control_counter.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "control_counter_compl_ctr_ce", + desc: "Auto-extracted signal compl_ctr_ce from control_counter.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "control_registers_reg_map_reg_sel", + desc: "Auto-extracted signal reg_sel from control_registers_reg_map.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "control_registers_reg_map_read_data_mux_in", + desc: "Auto-extracted signal read_data_mux_in from control_registers_reg_map.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "control_registers_reg_map_read_data_mask_n", + desc: "Auto-extracted signal read_data_mask_n from control_registers_reg_map.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "control_registers_reg_map_read_mux_ena", + desc: "Auto-extracted signal read_mux_ena from control_registers_reg_map.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "crc_calc_crc_q", + desc: "Auto-extracted signal crc_q from crc_calc.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "crc_calc_crc_nxt", + desc: "Auto-extracted signal crc_nxt from crc_calc.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "crc_calc_crc_shift", + desc: "Auto-extracted signal crc_shift from crc_calc.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "crc_calc_crc_shift_n_xor", + desc: "Auto-extracted signal crc_shift_n_xor from crc_calc.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "crc_calc_crc_d", + desc: "Auto-extracted signal crc_d from crc_calc.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "crc_calc_crc_ce", + desc: "Auto-extracted signal crc_ce from crc_calc.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "data_edge_detector_rx_data_prev", + desc: "Auto-extracted signal rx_data_prev from data_edge_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "data_edge_detector_tx_data_prev", + desc: "Auto-extracted signal tx_data_prev from data_edge_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "data_edge_detector_rx_data_sync_prev", + desc: "Auto-extracted signal rx_data_sync_prev from data_edge_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "data_edge_detector_rx_edge_i", + desc: "Auto-extracted signal rx_edge_i from data_edge_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "data_edge_detector_tx_edge_i", + desc: "Auto-extracted signal tx_edge_i from data_edge_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "data_mux_sel_data", + desc: "Auto-extracted signal sel_data from data_mux.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "data_mux_saturated_data", + desc: "Auto-extracted signal saturated_data from data_mux.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "data_mux_masked_data", + desc: "Auto-extracted signal masked_data from data_mux.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "dlc_decoder_data_len_8_to_64", + desc: "Auto-extracted signal data_len_8_to_64 from dlc_decoder.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "dlc_decoder_data_len_can_2_0", + desc: "Auto-extracted signal data_len_can_2_0 from dlc_decoder.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "dlc_decoder_data_len_can_fd", + desc: "Auto-extracted signal data_len_can_fd from dlc_decoder.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "endian_swapper_swapped", + desc: "Auto-extracted signal swapped from endian_swapper.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "err_counters_tx_err_ctr_ce", + desc: "Auto-extracted signal tx_err_ctr_ce from err_counters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "err_counters_rx_err_ctr_ce", + desc: "Auto-extracted signal rx_err_ctr_ce from err_counters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "err_counters_modif_tx_ctr", + desc: "Auto-extracted signal modif_tx_ctr from err_counters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "err_counters_modif_rx_ctr", + desc: "Auto-extracted signal modif_rx_ctr from err_counters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "err_counters_nom_err_ctr_ce", + desc: "Auto-extracted signal nom_err_ctr_ce from err_counters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "err_counters_data_err_ctr_ce", + desc: "Auto-extracted signal data_err_ctr_ce from err_counters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "err_counters_res_err_ctrs_d", + desc: "Auto-extracted signal res_err_ctrs_d from err_counters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "err_counters_res_err_ctrs_q", + desc: "Auto-extracted signal res_err_ctrs_q from err_counters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "err_counters_res_err_ctrs_q_scan", + desc: "Auto-extracted signal res_err_ctrs_q_scan from err_counters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "err_detector_err_frm_req_i", + desc: "Auto-extracted signal err_frm_req_i from err_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "err_detector_err_type_d", + desc: "Auto-extracted signal err_type_d from err_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "err_detector_err_type_q", + desc: "Auto-extracted signal err_type_q from err_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "err_detector_err_pos_q", + desc: "Auto-extracted signal err_pos_q from err_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "err_detector_form_err_i", + desc: "Auto-extracted signal form_err_i from err_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "err_detector_crc_match_c", + desc: "Auto-extracted signal crc_match_c from err_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "err_detector_crc_match_d", + desc: "Auto-extracted signal crc_match_d from err_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "err_detector_crc_match_q", + desc: "Auto-extracted signal crc_match_q from err_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "err_detector_dst_ctr_grey", + desc: "Auto-extracted signal dst_ctr_grey from err_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "err_detector_dst_parity", + desc: "Auto-extracted signal dst_parity from err_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "err_detector_stuff_count_check", + desc: "Auto-extracted signal stuff_count_check from err_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "err_detector_crc_15_ok", + desc: "Auto-extracted signal crc_15_ok from err_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "err_detector_crc_17_ok", + desc: "Auto-extracted signal crc_17_ok from err_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "err_detector_crc_21_ok", + desc: "Auto-extracted signal crc_21_ok from err_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "err_detector_stuff_count_ok", + desc: "Auto-extracted signal stuff_count_ok from err_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "err_detector_rx_crc_15", + desc: "Auto-extracted signal rx_crc_15 from err_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "err_detector_rx_crc_17", + desc: "Auto-extracted signal rx_crc_17 from err_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "err_detector_rx_crc_21", + desc: "Auto-extracted signal rx_crc_21 from err_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "fault_confinement_drv_ewl", + desc: "Auto-extracted signal drv_ewl from fault_confinement.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "fault_confinement_drv_erp", + desc: "Auto-extracted signal drv_erp from fault_confinement.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "fault_confinement_drv_ctr_val", + desc: "Auto-extracted signal drv_ctr_val from fault_confinement.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "fault_confinement_drv_ctr_sel", + desc: "Auto-extracted signal drv_ctr_sel from fault_confinement.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "fault_confinement_drv_ena", + desc: "Auto-extracted signal drv_ena from fault_confinement.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "fault_confinement_tx_err_ctr_i", + desc: "Auto-extracted signal tx_err_ctr_i from fault_confinement.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "fault_confinement_rx_err_ctr_i", + desc: "Auto-extracted signal rx_err_ctr_i from fault_confinement.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "fault_confinement_inc_one", + desc: "Auto-extracted signal inc_one from fault_confinement.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "fault_confinement_inc_eight", + desc: "Auto-extracted signal inc_eight from fault_confinement.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "fault_confinement_dec_one", + desc: "Auto-extracted signal dec_one from fault_confinement.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "fault_confinement_drv_rom_ena", + desc: "Auto-extracted signal drv_rom_ena from fault_confinement.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "fault_confinement_fsm_tx_err_ctr_mt_erp", + desc: "Auto-extracted signal tx_err_ctr_mt_erp from fault_confinement_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "fault_confinement_fsm_rx_err_ctr_mt_erp", + desc: "Auto-extracted signal rx_err_ctr_mt_erp from fault_confinement_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "fault_confinement_fsm_tx_err_ctr_mt_ewl", + desc: "Auto-extracted signal tx_err_ctr_mt_ewl from fault_confinement_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "fault_confinement_fsm_rx_err_ctr_mt_ewl", + desc: "Auto-extracted signal rx_err_ctr_mt_ewl from fault_confinement_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "fault_confinement_fsm_tx_err_ctr_mt_255", + desc: "Auto-extracted signal tx_err_ctr_mt_255 from fault_confinement_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "fault_confinement_fsm_err_warning_limit_d", + desc: "Auto-extracted signal err_warning_limit_d from fault_confinement_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "fault_confinement_fsm_err_warning_limit_q", + desc: "Auto-extracted signal err_warning_limit_q from fault_confinement_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "fault_confinement_fsm_fc_fsm_res_d", + desc: "Auto-extracted signal fc_fsm_res_d from fault_confinement_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "fault_confinement_fsm_fc_fsm_res_q", + desc: "Auto-extracted signal fc_fsm_res_q from fault_confinement_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "fault_confinement_rules_inc_one_i", + desc: "Auto-extracted signal inc_one_i from fault_confinement_rules.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "fault_confinement_rules_inc_eight_i", + desc: "Auto-extracted signal inc_eight_i from fault_confinement_rules.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "frame_filters_drv_filter_A_mask", + desc: "Auto-extracted signal drv_filter_A_mask from frame_filters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "frame_filters_drv_filter_A_ctrl", + desc: "Auto-extracted signal drv_filter_A_ctrl from frame_filters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "frame_filters_drv_filter_A_bits", + desc: "Auto-extracted signal drv_filter_A_bits from frame_filters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "frame_filters_int_filter_A_valid", + desc: "Auto-extracted signal int_filter_A_valid from frame_filters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "frame_filters_drv_filter_B_mask", + desc: "Auto-extracted signal drv_filter_B_mask from frame_filters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "frame_filters_drv_filter_B_ctrl", + desc: "Auto-extracted signal drv_filter_B_ctrl from frame_filters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "frame_filters_drv_filter_B_bits", + desc: "Auto-extracted signal drv_filter_B_bits from frame_filters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "frame_filters_int_filter_B_valid", + desc: "Auto-extracted signal int_filter_B_valid from frame_filters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "frame_filters_drv_filter_C_mask", + desc: "Auto-extracted signal drv_filter_C_mask from frame_filters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "frame_filters_drv_filter_C_ctrl", + desc: "Auto-extracted signal drv_filter_C_ctrl from frame_filters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "frame_filters_drv_filter_C_bits", + desc: "Auto-extracted signal drv_filter_C_bits from frame_filters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "frame_filters_int_filter_C_valid", + desc: "Auto-extracted signal int_filter_C_valid from frame_filters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "frame_filters_drv_filter_ran_ctrl", + desc: "Auto-extracted signal drv_filter_ran_ctrl from frame_filters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "frame_filters_drv_filter_ran_lo_th", + desc: "Auto-extracted signal drv_filter_ran_lo_th from frame_filters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "frame_filters_drv_filter_ran_hi_th", + desc: "Auto-extracted signal drv_filter_ran_hi_th from frame_filters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "frame_filters_int_filter_ran_valid", + desc: "Auto-extracted signal int_filter_ran_valid from frame_filters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "frame_filters_drv_filters_ena", + desc: "Auto-extracted signal drv_filters_ena from frame_filters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "frame_filters_int_data_type", + desc: "Auto-extracted signal int_data_type from frame_filters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "frame_filters_int_data_ctrl", + desc: "Auto-extracted signal int_data_ctrl from frame_filters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "frame_filters_filter_A_enable", + desc: "Auto-extracted signal filter_A_enable from frame_filters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "frame_filters_filter_B_enable", + desc: "Auto-extracted signal filter_B_enable from frame_filters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "frame_filters_filter_C_enable", + desc: "Auto-extracted signal filter_C_enable from frame_filters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "frame_filters_filter_range_enable", + desc: "Auto-extracted signal filter_range_enable from frame_filters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "frame_filters_filter_result", + desc: "Auto-extracted signal filter_result from frame_filters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "frame_filters_ident_valid_d", + desc: "Auto-extracted signal ident_valid_d from frame_filters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "frame_filters_ident_valid_q", + desc: "Auto-extracted signal ident_valid_q from frame_filters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "frame_filters_drv_drop_remote_frames", + desc: "Auto-extracted signal drv_drop_remote_frames from frame_filters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "frame_filters_drop_rtr_frame", + desc: "Auto-extracted signal drop_rtr_frame from frame_filters.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "inf_ram_wrapper_int_read_data", + desc: "Auto-extracted signal int_read_data from inf_ram_wrapper.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "inf_ram_wrapper_byte_we", + desc: "Auto-extracted signal byte_we from inf_ram_wrapper.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "int_manager_drv_int_vect_clr", + desc: "Auto-extracted signal drv_int_vect_clr from int_manager.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "int_manager_drv_int_ena_set", + desc: "Auto-extracted signal drv_int_ena_set from int_manager.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "int_manager_drv_int_ena_clr", + desc: "Auto-extracted signal drv_int_ena_clr from int_manager.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "int_manager_drv_int_mask_set", + desc: "Auto-extracted signal drv_int_mask_set from int_manager.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "int_manager_drv_int_mask_clr", + desc: "Auto-extracted signal drv_int_mask_clr from int_manager.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "int_manager_int_ena_i", + desc: "Auto-extracted signal int_ena_i from int_manager.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "int_manager_int_mask_i", + desc: "Auto-extracted signal int_mask_i from int_manager.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "int_manager_int_vect_i", + desc: "Auto-extracted signal int_vect_i from int_manager.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "int_manager_int_input_active", + desc: "Auto-extracted signal int_input_active from int_manager.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "int_manager_int_i", + desc: "Auto-extracted signal int_i from int_manager.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "int_module_int_mask_i", + desc: "Auto-extracted signal int_mask_i from int_module.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "int_module_int_ena_i", + desc: "Auto-extracted signal int_ena_i from int_module.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "int_module_int_mask_load", + desc: "Auto-extracted signal int_mask_load from int_module.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "int_module_int_mask_next", + desc: "Auto-extracted signal int_mask_next from int_module.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "memory_reg_reg_value_r", + desc: "Auto-extracted signal reg_value_r from memory_reg.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "memory_reg_wr_select", + desc: "Auto-extracted signal wr_select from memory_reg.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "memory_reg_wr_select_expanded", + desc: "Auto-extracted signal wr_select_expanded from memory_reg.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "memory_registers_status_comb", + desc: "Auto-extracted signal status_comb from memory_registers.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "memory_registers_can_core_cs", + desc: "Auto-extracted signal can_core_cs from memory_registers.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "memory_registers_control_registers_cs", + desc: "Auto-extracted signal control_registers_cs from memory_registers.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "memory_registers_control_registers_cs_reg", + desc: "Auto-extracted signal control_registers_cs_reg from memory_registers.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "memory_registers_test_registers_cs", + desc: "Auto-extracted signal test_registers_cs from memory_registers.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "memory_registers_test_registers_cs_reg", + desc: "Auto-extracted signal test_registers_cs_reg from memory_registers.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "memory_registers_control_registers_rdata", + desc: "Auto-extracted signal control_registers_rdata from memory_registers.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "memory_registers_test_registers_rdata", + desc: "Auto-extracted signal test_registers_rdata from memory_registers.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "memory_registers_is_err_active", + desc: "Auto-extracted signal is_err_active from memory_registers.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "memory_registers_is_err_passive", + desc: "Auto-extracted signal is_err_passive from memory_registers.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "memory_registers_is_bus_off", + desc: "Auto-extracted signal is_bus_off from memory_registers.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "memory_registers_is_transmitter", + desc: "Auto-extracted signal is_transmitter from memory_registers.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "memory_registers_is_receiver", + desc: "Auto-extracted signal is_receiver from memory_registers.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "memory_registers_is_idle", + desc: "Auto-extracted signal is_idle from memory_registers.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "memory_registers_reg_lock_1_active", + desc: "Auto-extracted signal reg_lock_1_active from memory_registers.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "memory_registers_reg_lock_2_active", + desc: "Auto-extracted signal reg_lock_2_active from memory_registers.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "memory_registers_soft_res_q_n", + desc: "Auto-extracted signal soft_res_q_n from memory_registers.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "memory_registers_ewl_padded", + desc: "Auto-extracted signal ewl_padded from memory_registers.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "memory_registers_control_regs_clk_en", + desc: "Auto-extracted signal control_regs_clk_en from memory_registers.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "memory_registers_test_regs_clk_en", + desc: "Auto-extracted signal test_regs_clk_en from memory_registers.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "memory_registers_clk_control_regs", + desc: "Auto-extracted signal clk_control_regs from memory_registers.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "memory_registers_clk_test_regs", + desc: "Auto-extracted signal clk_test_regs from memory_registers.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "memory_registers_rx_buf_mode", + desc: "Auto-extracted signal rx_buf_mode from memory_registers.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "memory_registers_rx_move_cmd", + desc: "Auto-extracted signal rx_move_cmd from memory_registers.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "memory_registers_ctr_pres_sel_q", + desc: "Auto-extracted signal ctr_pres_sel_q from memory_registers.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "operation_control_drv_ena", + desc: "Auto-extracted signal drv_ena from operation_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "operation_control_go_to_off", + desc: "Auto-extracted signal go_to_off from operation_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "prescaler_drv_ena", + desc: "Auto-extracted signal drv_ena from prescaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "prescaler_tseg1_nbt", + desc: "Auto-extracted signal tseg1_nbt from prescaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "prescaler_tseg2_nbt", + desc: "Auto-extracted signal tseg2_nbt from prescaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "prescaler_brp_nbt", + desc: "Auto-extracted signal brp_nbt from prescaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "prescaler_sjw_nbt", + desc: "Auto-extracted signal sjw_nbt from prescaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "prescaler_tseg1_dbt", + desc: "Auto-extracted signal tseg1_dbt from prescaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "prescaler_tseg2_dbt", + desc: "Auto-extracted signal tseg2_dbt from prescaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "prescaler_brp_dbt", + desc: "Auto-extracted signal brp_dbt from prescaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "prescaler_sjw_dbt", + desc: "Auto-extracted signal sjw_dbt from prescaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "prescaler_segment_end", + desc: "Auto-extracted signal segment_end from prescaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "prescaler_h_sync_valid", + desc: "Auto-extracted signal h_sync_valid from prescaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "prescaler_is_tseg1", + desc: "Auto-extracted signal is_tseg1 from prescaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "prescaler_is_tseg2", + desc: "Auto-extracted signal is_tseg2 from prescaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "prescaler_resync_edge_valid", + desc: "Auto-extracted signal resync_edge_valid from prescaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "prescaler_h_sync_edge_valid", + desc: "Auto-extracted signal h_sync_edge_valid from prescaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "prescaler_segm_counter_nbt", + desc: "Auto-extracted signal segm_counter_nbt from prescaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "prescaler_segm_counter_dbt", + desc: "Auto-extracted signal segm_counter_dbt from prescaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "prescaler_exit_segm_req_nbt", + desc: "Auto-extracted signal exit_segm_req_nbt from prescaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "prescaler_exit_segm_req_dbt", + desc: "Auto-extracted signal exit_segm_req_dbt from prescaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "prescaler_tq_edge_nbt", + desc: "Auto-extracted signal tq_edge_nbt from prescaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "prescaler_tq_edge_dbt", + desc: "Auto-extracted signal tq_edge_dbt from prescaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "prescaler_rx_trig_req", + desc: "Auto-extracted signal rx_trig_req from prescaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "prescaler_tx_trig_req", + desc: "Auto-extracted signal tx_trig_req from prescaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "prescaler_start_edge", + desc: "Auto-extracted signal start_edge from prescaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "prescaler_bt_ctr_clear", + desc: "Auto-extracted signal bt_ctr_clear from prescaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "priority_decoder_l0_valid", + desc: "Auto-extracted signal l0_valid from priority_decoder.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "priority_decoder_l1_valid", + desc: "Auto-extracted signal l1_valid from priority_decoder.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "priority_decoder_l1_winner", + desc: "Auto-extracted signal l1_winner from priority_decoder.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "priority_decoder_l2_valid", + desc: "Auto-extracted signal l2_valid from priority_decoder.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "priority_decoder_l2_winner", + desc: "Auto-extracted signal l2_winner from priority_decoder.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "priority_decoder_l3_valid", + desc: "Auto-extracted signal l3_valid from priority_decoder.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "priority_decoder_l3_winner", + desc: "Auto-extracted signal l3_winner from priority_decoder.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_drv_can_fd_ena", + desc: "Auto-extracted signal drv_can_fd_ena from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_drv_bus_mon_ena", + desc: "Auto-extracted signal drv_bus_mon_ena from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_drv_retr_lim_ena", + desc: "Auto-extracted signal drv_retr_lim_ena from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_drv_retr_th", + desc: "Auto-extracted signal drv_retr_th from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_drv_self_test_ena", + desc: "Auto-extracted signal drv_self_test_ena from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_drv_ack_forb", + desc: "Auto-extracted signal drv_ack_forb from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_drv_ena", + desc: "Auto-extracted signal drv_ena from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_drv_fd_type", + desc: "Auto-extracted signal drv_fd_type from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_drv_int_loopback_ena", + desc: "Auto-extracted signal drv_int_loopback_ena from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_drv_bus_off_reset", + desc: "Auto-extracted signal drv_bus_off_reset from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_drv_ssp_delay_select", + desc: "Auto-extracted signal drv_ssp_delay_select from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_drv_pex", + desc: "Auto-extracted signal drv_pex from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_drv_cpexs", + desc: "Auto-extracted signal drv_cpexs from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_tran_word_swapped", + desc: "Auto-extracted signal tran_word_swapped from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_err_frm_req", + desc: "Auto-extracted signal err_frm_req from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_tx_load_base_id", + desc: "Auto-extracted signal tx_load_base_id from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_tx_load_ext_id", + desc: "Auto-extracted signal tx_load_ext_id from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_tx_load_dlc", + desc: "Auto-extracted signal tx_load_dlc from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_tx_load_data_word", + desc: "Auto-extracted signal tx_load_data_word from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_tx_load_stuff_count", + desc: "Auto-extracted signal tx_load_stuff_count from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_tx_load_crc", + desc: "Auto-extracted signal tx_load_crc from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_tx_shift_ena", + desc: "Auto-extracted signal tx_shift_ena from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_tx_dominant", + desc: "Auto-extracted signal tx_dominant from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_rx_clear", + desc: "Auto-extracted signal rx_clear from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_rx_store_base_id", + desc: "Auto-extracted signal rx_store_base_id from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_rx_store_ext_id", + desc: "Auto-extracted signal rx_store_ext_id from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_rx_store_ide", + desc: "Auto-extracted signal rx_store_ide from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_rx_store_rtr", + desc: "Auto-extracted signal rx_store_rtr from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_rx_store_edl", + desc: "Auto-extracted signal rx_store_edl from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_rx_store_dlc", + desc: "Auto-extracted signal rx_store_dlc from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_rx_store_esi", + desc: "Auto-extracted signal rx_store_esi from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_rx_store_brs", + desc: "Auto-extracted signal rx_store_brs from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_rx_store_stuff_count", + desc: "Auto-extracted signal rx_store_stuff_count from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_rx_shift_ena", + desc: "Auto-extracted signal rx_shift_ena from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_rx_shift_in_sel", + desc: "Auto-extracted signal rx_shift_in_sel from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_rec_is_rtr_i", + desc: "Auto-extracted signal rec_is_rtr_i from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_rec_dlc_d", + desc: "Auto-extracted signal rec_dlc_d from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_rec_dlc_q", + desc: "Auto-extracted signal rec_dlc_q from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_rec_frame_type_i", + desc: "Auto-extracted signal rec_frame_type_i from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_ctrl_ctr_pload", + desc: "Auto-extracted signal ctrl_ctr_pload from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_ctrl_ctr_pload_val", + desc: "Auto-extracted signal ctrl_ctr_pload_val from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_ctrl_ctr_ena", + desc: "Auto-extracted signal ctrl_ctr_ena from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_ctrl_ctr_zero", + desc: "Auto-extracted signal ctrl_ctr_zero from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_ctrl_ctr_one", + desc: "Auto-extracted signal ctrl_ctr_one from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_ctrl_counted_byte", + desc: "Auto-extracted signal ctrl_counted_byte from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_ctrl_counted_byte_index", + desc: "Auto-extracted signal ctrl_counted_byte_index from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_ctrl_ctr_mem_index", + desc: "Auto-extracted signal ctrl_ctr_mem_index from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_compl_ctr_ena", + desc: "Auto-extracted signal compl_ctr_ena from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_reinteg_ctr_clr", + desc: "Auto-extracted signal reinteg_ctr_clr from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_reinteg_ctr_enable", + desc: "Auto-extracted signal reinteg_ctr_enable from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_reinteg_ctr_expired", + desc: "Auto-extracted signal reinteg_ctr_expired from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_retr_ctr_clear", + desc: "Auto-extracted signal retr_ctr_clear from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_retr_ctr_add", + desc: "Auto-extracted signal retr_ctr_add from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_retr_limit_reached", + desc: "Auto-extracted signal retr_limit_reached from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_form_err_i", + desc: "Auto-extracted signal form_err_i from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_ack_err_i", + desc: "Auto-extracted signal ack_err_i from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_crc_check", + desc: "Auto-extracted signal crc_check from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_bit_err_arb", + desc: "Auto-extracted signal bit_err_arb from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_crc_match", + desc: "Auto-extracted signal crc_match from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_crc_err_i", + desc: "Auto-extracted signal crc_err_i from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_crc_clear_match_flag", + desc: "Auto-extracted signal crc_clear_match_flag from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_crc_src", + desc: "Auto-extracted signal crc_src from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_err_pos", + desc: "Auto-extracted signal err_pos from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_is_arbitration_i", + desc: "Auto-extracted signal is_arbitration_i from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_bit_err_enable", + desc: "Auto-extracted signal bit_err_enable from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_tx_data_nbs_i", + desc: "Auto-extracted signal tx_data_nbs_i from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_rx_crc", + desc: "Auto-extracted signal rx_crc from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_rx_stuff_count", + desc: "Auto-extracted signal rx_stuff_count from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fixed_stuff_i", + desc: "Auto-extracted signal fixed_stuff_i from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_arbitration_lost_i", + desc: "Auto-extracted signal arbitration_lost_i from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_alc_id_field", + desc: "Auto-extracted signal alc_id_field from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_drv_rom_ena", + desc: "Auto-extracted signal drv_rom_ena from protocol_control.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_state_reg_ce", + desc: "Auto-extracted signal state_reg_ce from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_no_data_transmitter", + desc: "Auto-extracted signal no_data_transmitter from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_no_data_receiver", + desc: "Auto-extracted signal no_data_receiver from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_no_data_field", + desc: "Auto-extracted signal no_data_field from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_ctrl_ctr_pload_i", + desc: "Auto-extracted signal ctrl_ctr_pload_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_ctrl_ctr_pload_unaliged", + desc: "Auto-extracted signal ctrl_ctr_pload_unaliged from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_crc_use_21", + desc: "Auto-extracted signal crc_use_21 from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_crc_use_17", + desc: "Auto-extracted signal crc_use_17 from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_crc_src_i", + desc: "Auto-extracted signal crc_src_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_crc_length_i", + desc: "Auto-extracted signal crc_length_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_tran_data_length", + desc: "Auto-extracted signal tran_data_length from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_rec_data_length", + desc: "Auto-extracted signal rec_data_length from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_rec_data_length_c", + desc: "Auto-extracted signal rec_data_length_c from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_data_length_c", + desc: "Auto-extracted signal data_length_c from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_data_length_shifted_c", + desc: "Auto-extracted signal data_length_shifted_c from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_data_length_bits_c", + desc: "Auto-extracted signal data_length_bits_c from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_is_fd_frame", + desc: "Auto-extracted signal is_fd_frame from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_frame_start", + desc: "Auto-extracted signal frame_start from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_tx_frame_ready", + desc: "Auto-extracted signal tx_frame_ready from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_ide_is_arbitration", + desc: "Auto-extracted signal ide_is_arbitration from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_arbitration_lost_condition", + desc: "Auto-extracted signal arbitration_lost_condition from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_arbitration_lost_i", + desc: "Auto-extracted signal arbitration_lost_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_tx_failed", + desc: "Auto-extracted signal tx_failed from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_store_metadata_d", + desc: "Auto-extracted signal store_metadata_d from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_store_data_d", + desc: "Auto-extracted signal store_data_d from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_rec_valid_d", + desc: "Auto-extracted signal rec_valid_d from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_rec_abort_d", + desc: "Auto-extracted signal rec_abort_d from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_go_to_suspend", + desc: "Auto-extracted signal go_to_suspend from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_go_to_stuff_count", + desc: "Auto-extracted signal go_to_stuff_count from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_rx_store_base_id_i", + desc: "Auto-extracted signal rx_store_base_id_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_rx_store_ext_id_i", + desc: "Auto-extracted signal rx_store_ext_id_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_rx_store_ide_i", + desc: "Auto-extracted signal rx_store_ide_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_rx_store_rtr_i", + desc: "Auto-extracted signal rx_store_rtr_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_rx_store_edl_i", + desc: "Auto-extracted signal rx_store_edl_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_rx_store_dlc_i", + desc: "Auto-extracted signal rx_store_dlc_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_rx_store_esi_i", + desc: "Auto-extracted signal rx_store_esi_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_rx_store_brs_i", + desc: "Auto-extracted signal rx_store_brs_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_rx_store_stuff_count_i", + desc: "Auto-extracted signal rx_store_stuff_count_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_rx_clear_i", + desc: "Auto-extracted signal rx_clear_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_tx_load_base_id_i", + desc: "Auto-extracted signal tx_load_base_id_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_tx_load_ext_id_i", + desc: "Auto-extracted signal tx_load_ext_id_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_tx_load_dlc_i", + desc: "Auto-extracted signal tx_load_dlc_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_tx_load_data_word_i", + desc: "Auto-extracted signal tx_load_data_word_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_tx_load_stuff_count_i", + desc: "Auto-extracted signal tx_load_stuff_count_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_tx_load_crc_i", + desc: "Auto-extracted signal tx_load_crc_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_tx_shift_ena_i", + desc: "Auto-extracted signal tx_shift_ena_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_form_err_i", + desc: "Auto-extracted signal form_err_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_ack_err_i", + desc: "Auto-extracted signal ack_err_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_ack_err_flag", + desc: "Auto-extracted signal ack_err_flag from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_ack_err_flag_clr", + desc: "Auto-extracted signal ack_err_flag_clr from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_crc_err_i", + desc: "Auto-extracted signal crc_err_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_bit_err_arb_i", + desc: "Auto-extracted signal bit_err_arb_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_sp_control_switch_data", + desc: "Auto-extracted signal sp_control_switch_data from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_sp_control_switch_nominal", + desc: "Auto-extracted signal sp_control_switch_nominal from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_switch_to_ssp", + desc: "Auto-extracted signal switch_to_ssp from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_sp_control_ce", + desc: "Auto-extracted signal sp_control_ce from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_sp_control_d", + desc: "Auto-extracted signal sp_control_d from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_sp_control_q_i", + desc: "Auto-extracted signal sp_control_q_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_ssp_reset_i", + desc: "Auto-extracted signal ssp_reset_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_sync_control_d", + desc: "Auto-extracted signal sync_control_d from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_sync_control_q", + desc: "Auto-extracted signal sync_control_q from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_perform_hsync", + desc: "Auto-extracted signal perform_hsync from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_primary_err_i", + desc: "Auto-extracted signal primary_err_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_err_delim_late_i", + desc: "Auto-extracted signal err_delim_late_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_set_err_active_i", + desc: "Auto-extracted signal set_err_active_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_set_transmitter_i", + desc: "Auto-extracted signal set_transmitter_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_set_receiver_i", + desc: "Auto-extracted signal set_receiver_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_set_idle_i", + desc: "Auto-extracted signal set_idle_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_first_err_delim_d", + desc: "Auto-extracted signal first_err_delim_d from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_first_err_delim_q", + desc: "Auto-extracted signal first_err_delim_q from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_stuff_enable_set", + desc: "Auto-extracted signal stuff_enable_set from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_stuff_enable_clear", + desc: "Auto-extracted signal stuff_enable_clear from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_destuff_enable_set", + desc: "Auto-extracted signal destuff_enable_set from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_destuff_enable_clear", + desc: "Auto-extracted signal destuff_enable_clear from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_bit_err_disable", + desc: "Auto-extracted signal bit_err_disable from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_bit_err_disable_receiver", + desc: "Auto-extracted signal bit_err_disable_receiver from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_sof_pulse_i", + desc: "Auto-extracted signal sof_pulse_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_compl_ctr_ena_i", + desc: "Auto-extracted signal compl_ctr_ena_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_tick_state_reg", + desc: "Auto-extracted signal tick_state_reg from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_br_shifted_i", + desc: "Auto-extracted signal br_shifted_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_is_arbitration_i", + desc: "Auto-extracted signal is_arbitration_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_crc_spec_enable_i", + desc: "Auto-extracted signal crc_spec_enable_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_load_init_vect_i", + desc: "Auto-extracted signal load_init_vect_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_drv_bus_off_reset_q", + desc: "Auto-extracted signal drv_bus_off_reset_q from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_retr_ctr_clear_i", + desc: "Auto-extracted signal retr_ctr_clear_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_retr_ctr_add_i", + desc: "Auto-extracted signal retr_ctr_add_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_decrement_rec_i", + desc: "Auto-extracted signal decrement_rec_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_retr_ctr_add_block", + desc: "Auto-extracted signal retr_ctr_add_block from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_retr_ctr_add_block_clr", + desc: "Auto-extracted signal retr_ctr_add_block_clr from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_block_txtb_unlock", + desc: "Auto-extracted signal block_txtb_unlock from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_tx_frame_no_sof_d", + desc: "Auto-extracted signal tx_frame_no_sof_d from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_tx_frame_no_sof_q", + desc: "Auto-extracted signal tx_frame_no_sof_q from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_ctrl_signal_upd", + desc: "Auto-extracted signal ctrl_signal_upd from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_clr_bus_off_rst_flg", + desc: "Auto-extracted signal clr_bus_off_rst_flg from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_pex_on_fdf_enable", + desc: "Auto-extracted signal pex_on_fdf_enable from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_pex_on_res_enable", + desc: "Auto-extracted signal pex_on_res_enable from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_rx_data_nbs_prev", + desc: "Auto-extracted signal rx_data_nbs_prev from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_pexs_set", + desc: "Auto-extracted signal pexs_set from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_tran_frame_type_i", + desc: "Auto-extracted signal tran_frame_type_i from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_txtb_clk_en_d", + desc: "Auto-extracted signal txtb_clk_en_d from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "protocol_control_fsm_txtb_clk_en_q", + desc: "Auto-extracted signal txtb_clk_en_q from protocol_control_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "reintegration_counter_reinteg_ctr_ce", + desc: "Auto-extracted signal reinteg_ctr_ce from reintegration_counter.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "retransmitt_counter_retr_ctr_ce", + desc: "Auto-extracted signal retr_ctr_ce from retransmitt_counter.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rst_sync_rff", + desc: "Auto-extracted signal rff from rst_sync.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_drv_erase_rx", + desc: "Auto-extracted signal drv_erase_rx from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_drv_read_start", + desc: "Auto-extracted signal drv_read_start from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_drv_clr_ovr", + desc: "Auto-extracted signal drv_clr_ovr from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_drv_rtsopt", + desc: "Auto-extracted signal drv_rtsopt from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_read_pointer", + desc: "Auto-extracted signal read_pointer from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_read_pointer_inc_1", + desc: "Auto-extracted signal read_pointer_inc_1 from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_write_pointer", + desc: "Auto-extracted signal write_pointer from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_write_pointer_raw", + desc: "Auto-extracted signal write_pointer_raw from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_write_pointer_ts", + desc: "Auto-extracted signal write_pointer_ts from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_rx_mem_free_i", + desc: "Auto-extracted signal rx_mem_free_i from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_memory_write_data", + desc: "Auto-extracted signal memory_write_data from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_data_overrun_flg", + desc: "Auto-extracted signal data_overrun_flg from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_data_overrun_i", + desc: "Auto-extracted signal data_overrun_i from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_overrun_condition", + desc: "Auto-extracted signal overrun_condition from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_rx_empty_i", + desc: "Auto-extracted signal rx_empty_i from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_is_free_word", + desc: "Auto-extracted signal is_free_word from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_commit_rx_frame", + desc: "Auto-extracted signal commit_rx_frame from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_commit_overrun_abort", + desc: "Auto-extracted signal commit_overrun_abort from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_read_increment", + desc: "Auto-extracted signal read_increment from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_write_raw_OK", + desc: "Auto-extracted signal write_raw_OK from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_write_raw_intent", + desc: "Auto-extracted signal write_raw_intent from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_write_ts", + desc: "Auto-extracted signal write_ts from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_stored_ts", + desc: "Auto-extracted signal stored_ts from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_data_selector", + desc: "Auto-extracted signal data_selector from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_store_ts_wr_ptr", + desc: "Auto-extracted signal store_ts_wr_ptr from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_inc_ts_wr_ptr", + desc: "Auto-extracted signal inc_ts_wr_ptr from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_reset_overrun_flag", + desc: "Auto-extracted signal reset_overrun_flag from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_frame_form_w", + desc: "Auto-extracted signal frame_form_w from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_timestamp_capture", + desc: "Auto-extracted signal timestamp_capture from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_timestamp_capture_ce", + desc: "Auto-extracted signal timestamp_capture_ce from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_RAM_write", + desc: "Auto-extracted signal RAM_write from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_RAM_data_out", + desc: "Auto-extracted signal RAM_data_out from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_RAM_write_address", + desc: "Auto-extracted signal RAM_write_address from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_RAM_read_address", + desc: "Auto-extracted signal RAM_read_address from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_rx_buf_res_n_d", + desc: "Auto-extracted signal rx_buf_res_n_d from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_rx_buf_res_n_q", + desc: "Auto-extracted signal rx_buf_res_n_q from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_rx_buf_res_n_q_scan", + desc: "Auto-extracted signal rx_buf_res_n_q_scan from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_rx_buf_ram_clk_en", + desc: "Auto-extracted signal rx_buf_ram_clk_en from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_clk_ram", + desc: "Auto-extracted signal clk_ram from rx_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_fsm_rx_fsm_ce", + desc: "Auto-extracted signal rx_fsm_ce from rx_buffer_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_fsm_cmd_join", + desc: "Auto-extracted signal cmd_join from rx_buffer_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_pointers_write_pointer_raw_ce", + desc: "Auto-extracted signal write_pointer_raw_ce from rx_buffer_pointers.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_pointers_write_pointer_ts_ce", + desc: "Auto-extracted signal write_pointer_ts_ce from rx_buffer_pointers.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_ram_port_a_address_i", + desc: "Auto-extracted signal port_a_address_i from rx_buffer_ram.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_ram_port_a_write_i", + desc: "Auto-extracted signal port_a_write_i from rx_buffer_ram.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_ram_port_a_data_in_i", + desc: "Auto-extracted signal port_a_data_in_i from rx_buffer_ram.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_ram_port_b_address_i", + desc: "Auto-extracted signal port_b_address_i from rx_buffer_ram.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_ram_port_b_data_out_i", + desc: "Auto-extracted signal port_b_data_out_i from rx_buffer_ram.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_ram_tst_ena", + desc: "Auto-extracted signal tst_ena from rx_buffer_ram.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_buffer_ram_tst_addr", + desc: "Auto-extracted signal tst_addr from rx_buffer_ram.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_shift_reg_res_n_i_d", + desc: "Auto-extracted signal res_n_i_d from rx_shift_reg.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_shift_reg_res_n_i_q", + desc: "Auto-extracted signal res_n_i_q from rx_shift_reg.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_shift_reg_res_n_i_q_scan", + desc: "Auto-extracted signal res_n_i_q_scan from rx_shift_reg.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_shift_reg_rx_shift_reg_q", + desc: "Auto-extracted signal rx_shift_reg_q from rx_shift_reg.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_shift_reg_rx_shift_cmd", + desc: "Auto-extracted signal rx_shift_cmd from rx_shift_reg.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_shift_reg_rx_shift_in_sel_demuxed", + desc: "Auto-extracted signal rx_shift_in_sel_demuxed from rx_shift_reg.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_shift_reg_rec_is_rtr_i", + desc: "Auto-extracted signal rec_is_rtr_i from rx_shift_reg.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "rx_shift_reg_rec_frame_type_i", + desc: "Auto-extracted signal rec_frame_type_i from rx_shift_reg.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "sample_mux_sample", + desc: "Auto-extracted signal sample from sample_mux.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "sample_mux_prev_sample_d", + desc: "Auto-extracted signal prev_sample_d from sample_mux.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "sample_mux_prev_sample_q", + desc: "Auto-extracted signal prev_sample_q from sample_mux.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "segment_end_detector_req_input", + desc: "Auto-extracted signal req_input from segment_end_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "segment_end_detector_segm_end_req_capt_d", + desc: "Auto-extracted signal segm_end_req_capt_d from segment_end_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "segment_end_detector_segm_end_req_capt_q", + desc: "Auto-extracted signal segm_end_req_capt_q from segment_end_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "segment_end_detector_segm_end_req_capt_ce", + desc: "Auto-extracted signal segm_end_req_capt_ce from segment_end_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "segment_end_detector_segm_end_req_capt_clr", + desc: "Auto-extracted signal segm_end_req_capt_clr from segment_end_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "segment_end_detector_segm_end_req_capt_dq", + desc: "Auto-extracted signal segm_end_req_capt_dq from segment_end_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "segment_end_detector_segm_end_nbt_valid", + desc: "Auto-extracted signal segm_end_nbt_valid from segment_end_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "segment_end_detector_segm_end_dbt_valid", + desc: "Auto-extracted signal segm_end_dbt_valid from segment_end_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "segment_end_detector_segm_end_nbt_dbt_valid", + desc: "Auto-extracted signal segm_end_nbt_dbt_valid from segment_end_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "segment_end_detector_tseg1_end_req_valid", + desc: "Auto-extracted signal tseg1_end_req_valid from segment_end_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "segment_end_detector_tseg2_end_req_valid", + desc: "Auto-extracted signal tseg2_end_req_valid from segment_end_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "segment_end_detector_h_sync_valid_i", + desc: "Auto-extracted signal h_sync_valid_i from segment_end_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "segment_end_detector_segment_end_i", + desc: "Auto-extracted signal segment_end_i from segment_end_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "segment_end_detector_nbt_tq_active", + desc: "Auto-extracted signal nbt_tq_active from segment_end_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "segment_end_detector_dbt_tq_active", + desc: "Auto-extracted signal dbt_tq_active from segment_end_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "segment_end_detector_bt_ctr_clear_i", + desc: "Auto-extracted signal bt_ctr_clear_i from segment_end_detector.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "shift_reg_shift_regs", + desc: "Auto-extracted signal shift_regs from shift_reg.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "shift_reg_next_shift_reg_val", + desc: "Auto-extracted signal next_shift_reg_val from shift_reg.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "shift_reg_byte_shift_reg_in", + desc: "Auto-extracted signal shift_reg_in from shift_reg_byte.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "shift_reg_preload_shift_regs", + desc: "Auto-extracted signal shift_regs from shift_reg_preload.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "shift_reg_preload_next_shift_reg_val", + desc: "Auto-extracted signal next_shift_reg_val from shift_reg_preload.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "sig_sync_rff", + desc: "Auto-extracted signal rff from sig_sync.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "ssp_generator_btmc_d", + desc: "Auto-extracted signal btmc_d from ssp_generator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "ssp_generator_btmc_q", + desc: "Auto-extracted signal btmc_q from ssp_generator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "ssp_generator_btmc_add", + desc: "Auto-extracted signal btmc_add from ssp_generator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "ssp_generator_btmc_ce", + desc: "Auto-extracted signal btmc_ce from ssp_generator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "ssp_generator_btmc_meas_running_d", + desc: "Auto-extracted signal btmc_meas_running_d from ssp_generator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "ssp_generator_btmc_meas_running_q", + desc: "Auto-extracted signal btmc_meas_running_q from ssp_generator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "ssp_generator_sspc_d", + desc: "Auto-extracted signal sspc_d from ssp_generator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "ssp_generator_sspc_q", + desc: "Auto-extracted signal sspc_q from ssp_generator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "ssp_generator_sspc_ce", + desc: "Auto-extracted signal sspc_ce from ssp_generator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "ssp_generator_sspc_expired", + desc: "Auto-extracted signal sspc_expired from ssp_generator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "ssp_generator_sspc_threshold", + desc: "Auto-extracted signal sspc_threshold from ssp_generator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "ssp_generator_sspc_add", + desc: "Auto-extracted signal sspc_add from ssp_generator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "ssp_generator_first_ssp_d", + desc: "Auto-extracted signal first_ssp_d from ssp_generator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "ssp_generator_first_ssp_q", + desc: "Auto-extracted signal first_ssp_q from ssp_generator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "ssp_generator_sspc_ena_d", + desc: "Auto-extracted signal sspc_ena_d from ssp_generator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "ssp_generator_sspc_ena_q", + desc: "Auto-extracted signal sspc_ena_q from ssp_generator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "ssp_generator_ssp_delay_padded", + desc: "Auto-extracted signal ssp_delay_padded from ssp_generator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "synchronisation_checker_resync_edge", + desc: "Auto-extracted signal resync_edge from synchronisation_checker.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "synchronisation_checker_h_sync_edge", + desc: "Auto-extracted signal h_sync_edge from synchronisation_checker.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "synchronisation_checker_h_or_re_sync_edge", + desc: "Auto-extracted signal h_or_re_sync_edge from synchronisation_checker.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "synchronisation_checker_sync_flag", + desc: "Auto-extracted signal sync_flag from synchronisation_checker.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "synchronisation_checker_sync_flag_ce", + desc: "Auto-extracted signal sync_flag_ce from synchronisation_checker.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "synchronisation_checker_sync_flag_nxt", + desc: "Auto-extracted signal sync_flag_nxt from synchronisation_checker.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "test_registers_reg_map_reg_sel", + desc: "Auto-extracted signal reg_sel from test_registers_reg_map.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "test_registers_reg_map_read_data_mux_in", + desc: "Auto-extracted signal read_data_mux_in from test_registers_reg_map.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "test_registers_reg_map_read_data_mask_n", + desc: "Auto-extracted signal read_data_mask_n from test_registers_reg_map.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "test_registers_reg_map_read_mux_ena", + desc: "Auto-extracted signal read_mux_ena from test_registers_reg_map.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "trigger_generator_rx_trig_req_q", + desc: "Auto-extracted signal rx_trig_req_q from trigger_generator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "trigger_generator_tx_trig_req_flag_d", + desc: "Auto-extracted signal tx_trig_req_flag_d from trigger_generator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "trigger_generator_tx_trig_req_flag_q", + desc: "Auto-extracted signal tx_trig_req_flag_q from trigger_generator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "trigger_generator_tx_trig_req_flag_dq", + desc: "Auto-extracted signal tx_trig_req_flag_dq from trigger_generator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "trigger_mux_tx_trigger_q", + desc: "Auto-extracted signal tx_trigger_q from trigger_mux.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "trv_delay_meas_trv_meas_progress_d", + desc: "Auto-extracted signal trv_meas_progress_d from trv_delay_meas.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "trv_delay_meas_trv_meas_progress_q", + desc: "Auto-extracted signal trv_meas_progress_q from trv_delay_meas.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "trv_delay_meas_trv_meas_progress_del", + desc: "Auto-extracted signal trv_meas_progress_del from trv_delay_meas.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "trv_delay_meas_trv_delay_ctr_q", + desc: "Auto-extracted signal trv_delay_ctr_q from trv_delay_meas.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "trv_delay_meas_trv_delay_ctr_d", + desc: "Auto-extracted signal trv_delay_ctr_d from trv_delay_meas.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "trv_delay_meas_trv_delay_ctr_add", + desc: "Auto-extracted signal trv_delay_ctr_add from trv_delay_meas.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "trv_delay_meas_trv_delay_ctr_q_padded", + desc: "Auto-extracted signal trv_delay_ctr_q_padded from trv_delay_meas.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "trv_delay_meas_trv_delay_ctr_rst_d", + desc: "Auto-extracted signal trv_delay_ctr_rst_d from trv_delay_meas.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "trv_delay_meas_trv_delay_ctr_rst_q", + desc: "Auto-extracted signal trv_delay_ctr_rst_q from trv_delay_meas.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "trv_delay_meas_trv_delay_ctr_rst_q_scan", + desc: "Auto-extracted signal trv_delay_ctr_rst_q_scan from trv_delay_meas.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "trv_delay_meas_ssp_shadow_ce", + desc: "Auto-extracted signal ssp_shadow_ce from trv_delay_meas.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "trv_delay_meas_ssp_delay_raw", + desc: "Auto-extracted signal ssp_delay_raw from trv_delay_meas.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "trv_delay_meas_ssp_delay_saturated", + desc: "Auto-extracted signal ssp_delay_saturated from trv_delay_meas.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "trv_delay_meas_trv_delay_sum", + desc: "Auto-extracted signal trv_delay_sum from trv_delay_meas.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_select_buf_avail", + desc: "Auto-extracted signal select_buf_avail from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_txtb_selected_input", + desc: "Auto-extracted signal txtb_selected_input from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_txtb_timestamp", + desc: "Auto-extracted signal txtb_timestamp from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_timestamp_valid", + desc: "Auto-extracted signal timestamp_valid from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_select_index_changed", + desc: "Auto-extracted signal select_index_changed from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_validated_buffer", + desc: "Auto-extracted signal validated_buffer from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_ts_low_internal", + desc: "Auto-extracted signal ts_low_internal from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_tran_dlc_dbl_buf", + desc: "Auto-extracted signal tran_dlc_dbl_buf from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_tran_is_rtr_dbl_buf", + desc: "Auto-extracted signal tran_is_rtr_dbl_buf from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_tran_ident_type_dbl_buf", + desc: "Auto-extracted signal tran_ident_type_dbl_buf from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_tran_frame_type_dbl_buf", + desc: "Auto-extracted signal tran_frame_type_dbl_buf from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_tran_brs_dbl_buf", + desc: "Auto-extracted signal tran_brs_dbl_buf from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_tran_dlc_com", + desc: "Auto-extracted signal tran_dlc_com from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_tran_is_rtr_com", + desc: "Auto-extracted signal tran_is_rtr_com from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_tran_ident_type_com", + desc: "Auto-extracted signal tran_ident_type_com from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_tran_frame_type_com", + desc: "Auto-extracted signal tran_frame_type_com from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_tran_brs_com", + desc: "Auto-extracted signal tran_brs_com from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_tran_frame_valid_com", + desc: "Auto-extracted signal tran_frame_valid_com from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_tran_identifier_com", + desc: "Auto-extracted signal tran_identifier_com from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_load_ts_lw_addr", + desc: "Auto-extracted signal load_ts_lw_addr from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_load_ts_uw_addr", + desc: "Auto-extracted signal load_ts_uw_addr from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_load_ffmt_w_addr", + desc: "Auto-extracted signal load_ffmt_w_addr from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_load_ident_w_addr", + desc: "Auto-extracted signal load_ident_w_addr from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_store_ts_l_w", + desc: "Auto-extracted signal store_ts_l_w from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_store_md_w", + desc: "Auto-extracted signal store_md_w from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_store_ident_w", + desc: "Auto-extracted signal store_ident_w from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_buffer_md_w", + desc: "Auto-extracted signal buffer_md_w from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_store_last_txtb_index", + desc: "Auto-extracted signal store_last_txtb_index from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_frame_valid_com_set", + desc: "Auto-extracted signal frame_valid_com_set from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_frame_valid_com_clear", + desc: "Auto-extracted signal frame_valid_com_clear from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_tx_arb_locked", + desc: "Auto-extracted signal tx_arb_locked from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_txtb_meta_clk_en", + desc: "Auto-extracted signal txtb_meta_clk_en from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_drv_tttm_ena", + desc: "Auto-extracted signal drv_tttm_ena from tx_arbitrator.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_fsm_tx_arb_fsm_ce", + desc: "Auto-extracted signal tx_arb_fsm_ce from tx_arbitrator_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_fsm_fsm_wait_state_d", + desc: "Auto-extracted signal fsm_wait_state_d from tx_arbitrator_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_arbitrator_fsm_fsm_wait_state_q", + desc: "Auto-extracted signal fsm_wait_state_q from tx_arbitrator_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_data_cache_tx_cache_mem", + desc: "Auto-extracted signal tx_cache_mem from tx_data_cache.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_shift_reg_tx_sr_output", + desc: "Auto-extracted signal tx_sr_output from tx_shift_reg.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_shift_reg_tx_sr_ce", + desc: "Auto-extracted signal tx_sr_ce from tx_shift_reg.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_shift_reg_tx_sr_pload", + desc: "Auto-extracted signal tx_sr_pload from tx_shift_reg.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_shift_reg_tx_sr_pload_val", + desc: "Auto-extracted signal tx_sr_pload_val from tx_shift_reg.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_shift_reg_tx_base_id", + desc: "Auto-extracted signal tx_base_id from tx_shift_reg.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_shift_reg_tx_ext_id", + desc: "Auto-extracted signal tx_ext_id from tx_shift_reg.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_shift_reg_tx_crc", + desc: "Auto-extracted signal tx_crc from tx_shift_reg.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_shift_reg_bst_ctr_grey", + desc: "Auto-extracted signal bst_ctr_grey from tx_shift_reg.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_shift_reg_bst_parity", + desc: "Auto-extracted signal bst_parity from tx_shift_reg.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "tx_shift_reg_stuff_count", + desc: "Auto-extracted signal stuff_count from tx_shift_reg.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "txt_buffer_txtb_user_accessible", + desc: "Auto-extracted signal txtb_user_accessible from txt_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "txt_buffer_hw_cbs", + desc: "Auto-extracted signal hw_cbs from txt_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "txt_buffer_sw_cbs", + desc: "Auto-extracted signal sw_cbs from txt_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "txt_buffer_txtb_unmask_data_ram", + desc: "Auto-extracted signal txtb_unmask_data_ram from txt_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "txt_buffer_txtb_port_b_data_i", + desc: "Auto-extracted signal txtb_port_b_data_i from txt_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "txt_buffer_ram_write", + desc: "Auto-extracted signal ram_write from txt_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "txt_buffer_ram_read_address", + desc: "Auto-extracted signal ram_read_address from txt_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "txt_buffer_txtb_ram_clk_en", + desc: "Auto-extracted signal txtb_ram_clk_en from txt_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "txt_buffer_clk_ram", + desc: "Auto-extracted signal clk_ram from txt_buffer.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "txt_buffer_fsm_abort_applied", + desc: "Auto-extracted signal abort_applied from txt_buffer_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "txt_buffer_fsm_txt_fsm_ce", + desc: "Auto-extracted signal txt_fsm_ce from txt_buffer_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "txt_buffer_fsm_go_to_failed", + desc: "Auto-extracted signal go_to_failed from txt_buffer_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "txt_buffer_fsm_transient_state", + desc: "Auto-extracted signal transient_state from txt_buffer_fsm.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "txt_buffer_ram_port_a_address_i", + desc: "Auto-extracted signal port_a_address_i from txt_buffer_ram.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "txt_buffer_ram_port_a_write_i", + desc: "Auto-extracted signal port_a_write_i from txt_buffer_ram.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "txt_buffer_ram_port_a_data_in_i", + desc: "Auto-extracted signal port_a_data_in_i from txt_buffer_ram.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "txt_buffer_ram_port_b_address_i", + desc: "Auto-extracted signal port_b_address_i from txt_buffer_ram.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "txt_buffer_ram_port_b_data_out_i", + desc: "Auto-extracted signal port_b_data_out_i from txt_buffer_ram.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "txt_buffer_ram_tst_ena", + desc: "Auto-extracted signal tst_ena from txt_buffer_ram.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "txt_buffer_ram_tst_addr", + desc: "Auto-extracted signal tst_addr from txt_buffer_ram.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "access_signaler_be_active", + desc: "Auto-extracted signal be_active from access_signaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "access_signaler_access_in", + desc: "Auto-extracted signal access_in from access_signaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "access_signaler_access_active", + desc: "Auto-extracted signal access_active from access_signaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "access_signaler_access_active_reg", + desc: "Auto-extracted signal access_active_reg from access_signaler.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "address_decoder_addr_dec_i", + desc: "Auto-extracted signal addr_dec_i from address_decoder.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + }, + { + name: "address_decoder_addr_dec_enabled_i", + desc: "Auto-extracted signal addr_dec_enabled_i from address_decoder.vhd", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { + name: "value", + bits: "31:0", + desc: "Placeholder 32-bit field for extracted signal" + } + ] + } + ] +} \ No newline at end of file diff --git a/docs/um/ip/can_bus/doc/registers.md b/docs/um/ip/can_bus/doc/registers.md new file mode 100644 index 00000000..a3c19b02 --- /dev/null +++ b/docs/um/ip/can_bus/doc/registers.md @@ -0,0 +1,15050 @@ +## Summary + +| Name | Offset | Length | Description | +|:--------------------------------------------------------------------------------------------------------------|:---------|---------:|:-------------------------------------------------------------------------------| +| can_bus.[`ahb_ifc_hsel_valid`](#ahb_ifc_hsel_valid) | 0x0 | 4 | Auto-extracted signal hsel_valid from ahb_ifc.vhd | +| can_bus.[`ahb_ifc_write_acc_d`](#ahb_ifc_write_acc_d) | 0x4 | 4 | Auto-extracted signal write_acc_d from ahb_ifc.vhd | +| can_bus.[`ahb_ifc_write_acc_q`](#ahb_ifc_write_acc_q) | 0x8 | 4 | Auto-extracted signal write_acc_q from ahb_ifc.vhd | +| can_bus.[`ahb_ifc_haddr_q`](#ahb_ifc_haddr_q) | 0xc | 4 | Auto-extracted signal haddr_q from ahb_ifc.vhd | +| can_bus.[`ahb_ifc_h_ready_raw`](#ahb_ifc_h_ready_raw) | 0x10 | 4 | Auto-extracted signal h_ready_raw from ahb_ifc.vhd | +| can_bus.[`ahb_ifc_sbe_d`](#ahb_ifc_sbe_d) | 0x14 | 4 | Auto-extracted signal sbe_d from ahb_ifc.vhd | +| can_bus.[`ahb_ifc_sbe_q`](#ahb_ifc_sbe_q) | 0x18 | 4 | Auto-extracted signal sbe_q from ahb_ifc.vhd | +| can_bus.[`ahb_ifc_swr_i`](#ahb_ifc_swr_i) | 0x1c | 4 | Auto-extracted signal swr_i from ahb_ifc.vhd | +| can_bus.[`ahb_ifc_srd_i`](#ahb_ifc_srd_i) | 0x20 | 4 | Auto-extracted signal srd_i from ahb_ifc.vhd | +| can_bus.[`bit_destuffing_discard_stuff_bit`](#bit_destuffing_discard_stuff_bit) | 0x24 | 4 | Auto-extracted signal discard_stuff_bit from bit_destuffing.vhd | +| can_bus.[`bit_destuffing_non_fix_to_fix_chng`](#bit_destuffing_non_fix_to_fix_chng) | 0x28 | 4 | Auto-extracted signal non_fix_to_fix_chng from bit_destuffing.vhd | +| can_bus.[`bit_destuffing_stuff_lvl_reached`](#bit_destuffing_stuff_lvl_reached) | 0x2c | 4 | Auto-extracted signal stuff_lvl_reached from bit_destuffing.vhd | +| can_bus.[`bit_destuffing_stuff_rule_violate`](#bit_destuffing_stuff_rule_violate) | 0x30 | 4 | Auto-extracted signal stuff_rule_violate from bit_destuffing.vhd | +| can_bus.[`bit_destuffing_enable_prev`](#bit_destuffing_enable_prev) | 0x34 | 4 | Auto-extracted signal enable_prev from bit_destuffing.vhd | +| can_bus.[`bit_destuffing_fixed_prev_q`](#bit_destuffing_fixed_prev_q) | 0x38 | 4 | Auto-extracted signal fixed_prev_q from bit_destuffing.vhd | +| can_bus.[`bit_destuffing_fixed_prev_d`](#bit_destuffing_fixed_prev_d) | 0x3c | 4 | Auto-extracted signal fixed_prev_d from bit_destuffing.vhd | +| can_bus.[`bit_destuffing_same_bits_erase`](#bit_destuffing_same_bits_erase) | 0x40 | 4 | Auto-extracted signal same_bits_erase from bit_destuffing.vhd | +| can_bus.[`bit_destuffing_destuffed_q`](#bit_destuffing_destuffed_q) | 0x44 | 4 | Auto-extracted signal destuffed_q from bit_destuffing.vhd | +| can_bus.[`bit_destuffing_destuffed_d`](#bit_destuffing_destuffed_d) | 0x48 | 4 | Auto-extracted signal destuffed_d from bit_destuffing.vhd | +| can_bus.[`bit_destuffing_stuff_err_q`](#bit_destuffing_stuff_err_q) | 0x4c | 4 | Auto-extracted signal stuff_err_q from bit_destuffing.vhd | +| can_bus.[`bit_destuffing_stuff_err_d`](#bit_destuffing_stuff_err_d) | 0x50 | 4 | Auto-extracted signal stuff_err_d from bit_destuffing.vhd | +| can_bus.[`bit_destuffing_prev_val_q`](#bit_destuffing_prev_val_q) | 0x54 | 4 | Auto-extracted signal prev_val_q from bit_destuffing.vhd | +| can_bus.[`bit_destuffing_prev_val_d`](#bit_destuffing_prev_val_d) | 0x58 | 4 | Auto-extracted signal prev_val_d from bit_destuffing.vhd | +| can_bus.[`bit_err_detector_bit_err_d`](#bit_err_detector_bit_err_d) | 0x5c | 4 | Auto-extracted signal bit_err_d from bit_err_detector.vhd | +| can_bus.[`bit_err_detector_bit_err_q`](#bit_err_detector_bit_err_q) | 0x60 | 4 | Auto-extracted signal bit_err_q from bit_err_detector.vhd | +| can_bus.[`bit_err_detector_bit_err_ssp_capt_d`](#bit_err_detector_bit_err_ssp_capt_d) | 0x64 | 4 | Auto-extracted signal bit_err_ssp_capt_d from bit_err_detector.vhd | +| can_bus.[`bit_err_detector_bit_err_ssp_capt_q`](#bit_err_detector_bit_err_ssp_capt_q) | 0x68 | 4 | Auto-extracted signal bit_err_ssp_capt_q from bit_err_detector.vhd | +| can_bus.[`bit_err_detector_bit_err_ssp_valid`](#bit_err_detector_bit_err_ssp_valid) | 0x6c | 4 | Auto-extracted signal bit_err_ssp_valid from bit_err_detector.vhd | +| can_bus.[`bit_err_detector_bit_err_ssp_condition`](#bit_err_detector_bit_err_ssp_condition) | 0x70 | 4 | Auto-extracted signal bit_err_ssp_condition from bit_err_detector.vhd | +| can_bus.[`bit_err_detector_bit_err_norm_valid`](#bit_err_detector_bit_err_norm_valid) | 0x74 | 4 | Auto-extracted signal bit_err_norm_valid from bit_err_detector.vhd | +| can_bus.[`bit_filter_masked_input`](#bit_filter_masked_input) | 0x78 | 4 | Auto-extracted signal masked_input from bit_filter.vhd | +| can_bus.[`bit_filter_masked_value`](#bit_filter_masked_value) | 0x7c | 4 | Auto-extracted signal masked_value from bit_filter.vhd | +| can_bus.[`bit_segment_meter_sel_tseg1`](#bit_segment_meter_sel_tseg1) | 0x80 | 4 | Auto-extracted signal sel_tseg1 from bit_segment_meter.vhd | +| can_bus.[`bit_segment_meter_exp_seg_length_ce`](#bit_segment_meter_exp_seg_length_ce) | 0x84 | 4 | Auto-extracted signal exp_seg_length_ce from bit_segment_meter.vhd | +| can_bus.[`bit_segment_meter_phase_err_mt_sjw`](#bit_segment_meter_phase_err_mt_sjw) | 0x88 | 4 | Auto-extracted signal phase_err_mt_sjw from bit_segment_meter.vhd | +| can_bus.[`bit_segment_meter_phase_err_eq_sjw`](#bit_segment_meter_phase_err_eq_sjw) | 0x8c | 4 | Auto-extracted signal phase_err_eq_sjw from bit_segment_meter.vhd | +| can_bus.[`bit_segment_meter_exit_ph2_immediate`](#bit_segment_meter_exit_ph2_immediate) | 0x90 | 4 | Auto-extracted signal exit_ph2_immediate from bit_segment_meter.vhd | +| can_bus.[`bit_segment_meter_exit_segm_regular`](#bit_segment_meter_exit_segm_regular) | 0x94 | 4 | Auto-extracted signal exit_segm_regular from bit_segment_meter.vhd | +| can_bus.[`bit_segment_meter_exit_segm_regular_tseg1`](#bit_segment_meter_exit_segm_regular_tseg1) | 0x98 | 4 | Auto-extracted signal exit_segm_regular_tseg1 from bit_segment_meter.vhd | +| can_bus.[`bit_segment_meter_exit_segm_regular_tseg2`](#bit_segment_meter_exit_segm_regular_tseg2) | 0x9c | 4 | Auto-extracted signal exit_segm_regular_tseg2 from bit_segment_meter.vhd | +| can_bus.[`bit_segment_meter_sjw_mt_zero`](#bit_segment_meter_sjw_mt_zero) | 0xa0 | 4 | Auto-extracted signal sjw_mt_zero from bit_segment_meter.vhd | +| can_bus.[`bit_segment_meter_use_basic_segm_length`](#bit_segment_meter_use_basic_segm_length) | 0xa4 | 4 | Auto-extracted signal use_basic_segm_length from bit_segment_meter.vhd | +| can_bus.[`bit_segment_meter_phase_err_sjw_by_one`](#bit_segment_meter_phase_err_sjw_by_one) | 0xa8 | 4 | Auto-extracted signal phase_err_sjw_by_one from bit_segment_meter.vhd | +| can_bus.[`bit_segment_meter_shorten_tseg1_after_tseg2`](#bit_segment_meter_shorten_tseg1_after_tseg2) | 0xac | 4 | Auto-extracted signal shorten_tseg1_after_tseg2 from bit_segment_meter.vhd | +| can_bus.[`bit_stuffing_data_out_i`](#bit_stuffing_data_out_i) | 0xb0 | 4 | Auto-extracted signal data_out_i from bit_stuffing.vhd | +| can_bus.[`bit_stuffing_data_halt_q`](#bit_stuffing_data_halt_q) | 0xb4 | 4 | Auto-extracted signal data_halt_q from bit_stuffing.vhd | +| can_bus.[`bit_stuffing_data_halt_d`](#bit_stuffing_data_halt_d) | 0xb8 | 4 | Auto-extracted signal data_halt_d from bit_stuffing.vhd | +| can_bus.[`bit_stuffing_fixed_reg_q`](#bit_stuffing_fixed_reg_q) | 0xbc | 4 | Auto-extracted signal fixed_reg_q from bit_stuffing.vhd | +| can_bus.[`bit_stuffing_fixed_reg_d`](#bit_stuffing_fixed_reg_d) | 0xc0 | 4 | Auto-extracted signal fixed_reg_d from bit_stuffing.vhd | +| can_bus.[`bit_stuffing_enable_prev`](#bit_stuffing_enable_prev) | 0xc4 | 4 | Auto-extracted signal enable_prev from bit_stuffing.vhd | +| can_bus.[`bit_stuffing_non_fix_to_fix_chng`](#bit_stuffing_non_fix_to_fix_chng) | 0xc8 | 4 | Auto-extracted signal non_fix_to_fix_chng from bit_stuffing.vhd | +| can_bus.[`bit_stuffing_stuff_lvl_reached`](#bit_stuffing_stuff_lvl_reached) | 0xcc | 4 | Auto-extracted signal stuff_lvl_reached from bit_stuffing.vhd | +| can_bus.[`bit_stuffing_same_bits_rst_trig`](#bit_stuffing_same_bits_rst_trig) | 0xd0 | 4 | Auto-extracted signal same_bits_rst_trig from bit_stuffing.vhd | +| can_bus.[`bit_stuffing_same_bits_rst`](#bit_stuffing_same_bits_rst) | 0xd4 | 4 | Auto-extracted signal same_bits_rst from bit_stuffing.vhd | +| can_bus.[`bit_stuffing_insert_stuff_bit`](#bit_stuffing_insert_stuff_bit) | 0xd8 | 4 | Auto-extracted signal insert_stuff_bit from bit_stuffing.vhd | +| can_bus.[`bit_stuffing_data_out_d_ena`](#bit_stuffing_data_out_d_ena) | 0xdc | 4 | Auto-extracted signal data_out_d_ena from bit_stuffing.vhd | +| can_bus.[`bit_stuffing_data_out_d`](#bit_stuffing_data_out_d) | 0xe0 | 4 | Auto-extracted signal data_out_d from bit_stuffing.vhd | +| can_bus.[`bit_stuffing_data_out_ce`](#bit_stuffing_data_out_ce) | 0xe4 | 4 | Auto-extracted signal data_out_ce from bit_stuffing.vhd | +| can_bus.[`bit_time_cfg_capture_drv_tq_nbt`](#bit_time_cfg_capture_drv_tq_nbt) | 0xe8 | 4 | Auto-extracted signal drv_tq_nbt from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_drv_prs_nbt`](#bit_time_cfg_capture_drv_prs_nbt) | 0xec | 4 | Auto-extracted signal drv_prs_nbt from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_drv_ph1_nbt`](#bit_time_cfg_capture_drv_ph1_nbt) | 0xf0 | 4 | Auto-extracted signal drv_ph1_nbt from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_drv_ph2_nbt`](#bit_time_cfg_capture_drv_ph2_nbt) | 0xf4 | 4 | Auto-extracted signal drv_ph2_nbt from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_drv_sjw_nbt`](#bit_time_cfg_capture_drv_sjw_nbt) | 0xf8 | 4 | Auto-extracted signal drv_sjw_nbt from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_drv_tq_dbt`](#bit_time_cfg_capture_drv_tq_dbt) | 0xfc | 4 | Auto-extracted signal drv_tq_dbt from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_drv_prs_dbt`](#bit_time_cfg_capture_drv_prs_dbt) | 0x100 | 4 | Auto-extracted signal drv_prs_dbt from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_drv_ph1_dbt`](#bit_time_cfg_capture_drv_ph1_dbt) | 0x104 | 4 | Auto-extracted signal drv_ph1_dbt from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_drv_ph2_dbt`](#bit_time_cfg_capture_drv_ph2_dbt) | 0x108 | 4 | Auto-extracted signal drv_ph2_dbt from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_drv_sjw_dbt`](#bit_time_cfg_capture_drv_sjw_dbt) | 0x10c | 4 | Auto-extracted signal drv_sjw_dbt from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_tseg1_nbt_d`](#bit_time_cfg_capture_tseg1_nbt_d) | 0x110 | 4 | Auto-extracted signal tseg1_nbt_d from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_tseg1_dbt_d`](#bit_time_cfg_capture_tseg1_dbt_d) | 0x114 | 4 | Auto-extracted signal tseg1_dbt_d from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_drv_ena`](#bit_time_cfg_capture_drv_ena) | 0x118 | 4 | Auto-extracted signal drv_ena from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_drv_ena_reg`](#bit_time_cfg_capture_drv_ena_reg) | 0x11c | 4 | Auto-extracted signal drv_ena_reg from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_drv_ena_reg_2`](#bit_time_cfg_capture_drv_ena_reg_2) | 0x120 | 4 | Auto-extracted signal drv_ena_reg_2 from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_capture`](#bit_time_cfg_capture_capture) | 0x124 | 4 | Auto-extracted signal capture from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_counters_tq_counter_d`](#bit_time_counters_tq_counter_d) | 0x128 | 4 | Auto-extracted signal tq_counter_d from bit_time_counters.vhd | +| can_bus.[`bit_time_counters_tq_counter_q`](#bit_time_counters_tq_counter_q) | 0x12c | 4 | Auto-extracted signal tq_counter_q from bit_time_counters.vhd | +| can_bus.[`bit_time_counters_tq_counter_ce`](#bit_time_counters_tq_counter_ce) | 0x130 | 4 | Auto-extracted signal tq_counter_ce from bit_time_counters.vhd | +| can_bus.[`bit_time_counters_tq_counter_allow`](#bit_time_counters_tq_counter_allow) | 0x134 | 4 | Auto-extracted signal tq_counter_allow from bit_time_counters.vhd | +| can_bus.[`bit_time_counters_tq_edge_i`](#bit_time_counters_tq_edge_i) | 0x138 | 4 | Auto-extracted signal tq_edge_i from bit_time_counters.vhd | +| can_bus.[`bit_time_counters_segm_counter_d`](#bit_time_counters_segm_counter_d) | 0x13c | 4 | Auto-extracted signal segm_counter_d from bit_time_counters.vhd | +| can_bus.[`bit_time_counters_segm_counter_q`](#bit_time_counters_segm_counter_q) | 0x140 | 4 | Auto-extracted signal segm_counter_q from bit_time_counters.vhd | +| can_bus.[`bit_time_counters_segm_counter_ce`](#bit_time_counters_segm_counter_ce) | 0x144 | 4 | Auto-extracted signal segm_counter_ce from bit_time_counters.vhd | +| can_bus.[`bit_time_fsm_bt_fsm_ce`](#bit_time_fsm_bt_fsm_ce) | 0x148 | 4 | Auto-extracted signal bt_fsm_ce from bit_time_fsm.vhd | +| can_bus.[`bus_sampling_drv_ena`](#bus_sampling_drv_ena) | 0x14c | 4 | Auto-extracted signal drv_ena from bus_sampling.vhd | +| can_bus.[`bus_sampling_drv_ssp_offset`](#bus_sampling_drv_ssp_offset) | 0x150 | 4 | Auto-extracted signal drv_ssp_offset from bus_sampling.vhd | +| can_bus.[`bus_sampling_drv_ssp_delay_select`](#bus_sampling_drv_ssp_delay_select) | 0x154 | 4 | Auto-extracted signal drv_ssp_delay_select from bus_sampling.vhd | +| can_bus.[`bus_sampling_data_rx_synced`](#bus_sampling_data_rx_synced) | 0x158 | 4 | Auto-extracted signal data_rx_synced from bus_sampling.vhd | +| can_bus.[`bus_sampling_prev_Sample`](#bus_sampling_prev_sample) | 0x15c | 4 | Auto-extracted signal prev_Sample from bus_sampling.vhd | +| can_bus.[`bus_sampling_sample_sec_i`](#bus_sampling_sample_sec_i) | 0x160 | 4 | Auto-extracted signal sample_sec_i from bus_sampling.vhd | +| can_bus.[`bus_sampling_data_tx_delayed`](#bus_sampling_data_tx_delayed) | 0x164 | 4 | Auto-extracted signal data_tx_delayed from bus_sampling.vhd | +| can_bus.[`bus_sampling_edge_rx_valid`](#bus_sampling_edge_rx_valid) | 0x168 | 4 | Auto-extracted signal edge_rx_valid from bus_sampling.vhd | +| can_bus.[`bus_sampling_edge_tx_valid`](#bus_sampling_edge_tx_valid) | 0x16c | 4 | Auto-extracted signal edge_tx_valid from bus_sampling.vhd | +| can_bus.[`bus_sampling_ssp_delay`](#bus_sampling_ssp_delay) | 0x170 | 4 | Auto-extracted signal ssp_delay from bus_sampling.vhd | +| can_bus.[`bus_sampling_tx_trigger_q`](#bus_sampling_tx_trigger_q) | 0x174 | 4 | Auto-extracted signal tx_trigger_q from bus_sampling.vhd | +| can_bus.[`bus_sampling_tx_trigger_ssp`](#bus_sampling_tx_trigger_ssp) | 0x178 | 4 | Auto-extracted signal tx_trigger_ssp from bus_sampling.vhd | +| can_bus.[`bus_sampling_shift_regs_res_d`](#bus_sampling_shift_regs_res_d) | 0x17c | 4 | Auto-extracted signal shift_regs_res_d from bus_sampling.vhd | +| can_bus.[`bus_sampling_shift_regs_res_q`](#bus_sampling_shift_regs_res_q) | 0x180 | 4 | Auto-extracted signal shift_regs_res_q from bus_sampling.vhd | +| can_bus.[`bus_sampling_shift_regs_res_q_scan`](#bus_sampling_shift_regs_res_q_scan) | 0x184 | 4 | Auto-extracted signal shift_regs_res_q_scan from bus_sampling.vhd | +| can_bus.[`bus_sampling_ssp_enable`](#bus_sampling_ssp_enable) | 0x188 | 4 | Auto-extracted signal ssp_enable from bus_sampling.vhd | +| can_bus.[`bus_traffic_counters_tx_ctr_i`](#bus_traffic_counters_tx_ctr_i) | 0x18c | 4 | Auto-extracted signal tx_ctr_i from bus_traffic_counters.vhd | +| can_bus.[`bus_traffic_counters_rx_ctr_i`](#bus_traffic_counters_rx_ctr_i) | 0x190 | 4 | Auto-extracted signal rx_ctr_i from bus_traffic_counters.vhd | +| can_bus.[`bus_traffic_counters_tx_ctr_rst_n_d`](#bus_traffic_counters_tx_ctr_rst_n_d) | 0x194 | 4 | Auto-extracted signal tx_ctr_rst_n_d from bus_traffic_counters.vhd | +| can_bus.[`bus_traffic_counters_tx_ctr_rst_n_q`](#bus_traffic_counters_tx_ctr_rst_n_q) | 0x198 | 4 | Auto-extracted signal tx_ctr_rst_n_q from bus_traffic_counters.vhd | +| can_bus.[`bus_traffic_counters_tx_ctr_rst_n_q_scan`](#bus_traffic_counters_tx_ctr_rst_n_q_scan) | 0x19c | 4 | Auto-extracted signal tx_ctr_rst_n_q_scan from bus_traffic_counters.vhd | +| can_bus.[`bus_traffic_counters_rx_ctr_rst_n_d`](#bus_traffic_counters_rx_ctr_rst_n_d) | 0x1a0 | 4 | Auto-extracted signal rx_ctr_rst_n_d from bus_traffic_counters.vhd | +| can_bus.[`bus_traffic_counters_rx_ctr_rst_n_q`](#bus_traffic_counters_rx_ctr_rst_n_q) | 0x1a4 | 4 | Auto-extracted signal rx_ctr_rst_n_q from bus_traffic_counters.vhd | +| can_bus.[`bus_traffic_counters_rx_ctr_rst_n_q_scan`](#bus_traffic_counters_rx_ctr_rst_n_q_scan) | 0x1a8 | 4 | Auto-extracted signal rx_ctr_rst_n_q_scan from bus_traffic_counters.vhd | +| can_bus.[`can_apb_tb_s_apb_paddr`](#can_apb_tb_s_apb_paddr) | 0x1ac | 4 | Auto-extracted signal s_apb_paddr from can_apb_tb.vhd | +| can_bus.[`can_apb_tb_s_apb_penable`](#can_apb_tb_s_apb_penable) | 0x1b0 | 4 | Auto-extracted signal s_apb_penable from can_apb_tb.vhd | +| can_bus.[`can_apb_tb_s_apb_pprot`](#can_apb_tb_s_apb_pprot) | 0x1b4 | 4 | Auto-extracted signal s_apb_pprot from can_apb_tb.vhd | +| can_bus.[`can_apb_tb_s_apb_prdata`](#can_apb_tb_s_apb_prdata) | 0x1b8 | 4 | Auto-extracted signal s_apb_prdata from can_apb_tb.vhd | +| can_bus.[`can_apb_tb_s_apb_pready`](#can_apb_tb_s_apb_pready) | 0x1bc | 4 | Auto-extracted signal s_apb_pready from can_apb_tb.vhd | +| can_bus.[`can_apb_tb_s_apb_psel`](#can_apb_tb_s_apb_psel) | 0x1c0 | 4 | Auto-extracted signal s_apb_psel from can_apb_tb.vhd | +| can_bus.[`can_apb_tb_s_apb_pslverr`](#can_apb_tb_s_apb_pslverr) | 0x1c4 | 4 | Auto-extracted signal s_apb_pslverr from can_apb_tb.vhd | +| can_bus.[`can_apb_tb_s_apb_pstrb`](#can_apb_tb_s_apb_pstrb) | 0x1c8 | 4 | Auto-extracted signal s_apb_pstrb from can_apb_tb.vhd | +| can_bus.[`can_apb_tb_s_apb_pwdata`](#can_apb_tb_s_apb_pwdata) | 0x1cc | 4 | Auto-extracted signal s_apb_pwdata from can_apb_tb.vhd | +| can_bus.[`can_apb_tb_s_apb_pwrite`](#can_apb_tb_s_apb_pwrite) | 0x1d0 | 4 | Auto-extracted signal s_apb_pwrite from can_apb_tb.vhd | +| can_bus.[`can_core_drv_clr_rx_ctr`](#can_core_drv_clr_rx_ctr) | 0x1d4 | 4 | Auto-extracted signal drv_clr_rx_ctr from can_core.vhd | +| can_bus.[`can_core_drv_clr_tx_ctr`](#can_core_drv_clr_tx_ctr) | 0x1d8 | 4 | Auto-extracted signal drv_clr_tx_ctr from can_core.vhd | +| can_bus.[`can_core_drv_bus_mon_ena`](#can_core_drv_bus_mon_ena) | 0x1dc | 4 | Auto-extracted signal drv_bus_mon_ena from can_core.vhd | +| can_bus.[`can_core_drv_ena`](#can_core_drv_ena) | 0x1e0 | 4 | Auto-extracted signal drv_ena from can_core.vhd | +| can_bus.[`can_core_rec_ident_i`](#can_core_rec_ident_i) | 0x1e4 | 4 | Auto-extracted signal rec_ident_i from can_core.vhd | +| can_bus.[`can_core_rec_dlc_i`](#can_core_rec_dlc_i) | 0x1e8 | 4 | Auto-extracted signal rec_dlc_i from can_core.vhd | +| can_bus.[`can_core_rec_ident_type_i`](#can_core_rec_ident_type_i) | 0x1ec | 4 | Auto-extracted signal rec_ident_type_i from can_core.vhd | +| can_bus.[`can_core_rec_frame_type_i`](#can_core_rec_frame_type_i) | 0x1f0 | 4 | Auto-extracted signal rec_frame_type_i from can_core.vhd | +| can_bus.[`can_core_rec_is_rtr_i`](#can_core_rec_is_rtr_i) | 0x1f4 | 4 | Auto-extracted signal rec_is_rtr_i from can_core.vhd | +| can_bus.[`can_core_rec_brs_i`](#can_core_rec_brs_i) | 0x1f8 | 4 | Auto-extracted signal rec_brs_i from can_core.vhd | +| can_bus.[`can_core_rec_esi_i`](#can_core_rec_esi_i) | 0x1fc | 4 | Auto-extracted signal rec_esi_i from can_core.vhd | +| can_bus.[`can_core_alc`](#can_core_alc) | 0x200 | 4 | Auto-extracted signal alc from can_core.vhd | +| can_bus.[`can_core_erc_capture`](#can_core_erc_capture) | 0x204 | 4 | Auto-extracted signal erc_capture from can_core.vhd | +| can_bus.[`can_core_is_transmitter`](#can_core_is_transmitter) | 0x208 | 4 | Auto-extracted signal is_transmitter from can_core.vhd | +| can_bus.[`can_core_is_receiver`](#can_core_is_receiver) | 0x20c | 4 | Auto-extracted signal is_receiver from can_core.vhd | +| can_bus.[`can_core_is_idle`](#can_core_is_idle) | 0x210 | 4 | Auto-extracted signal is_idle from can_core.vhd | +| can_bus.[`can_core_arbitration_lost_i`](#can_core_arbitration_lost_i) | 0x214 | 4 | Auto-extracted signal arbitration_lost_i from can_core.vhd | +| can_bus.[`can_core_set_transmitter`](#can_core_set_transmitter) | 0x218 | 4 | Auto-extracted signal set_transmitter from can_core.vhd | +| can_bus.[`can_core_set_receiver`](#can_core_set_receiver) | 0x21c | 4 | Auto-extracted signal set_receiver from can_core.vhd | +| can_bus.[`can_core_set_idle`](#can_core_set_idle) | 0x220 | 4 | Auto-extracted signal set_idle from can_core.vhd | +| can_bus.[`can_core_is_err_active`](#can_core_is_err_active) | 0x224 | 4 | Auto-extracted signal is_err_active from can_core.vhd | +| can_bus.[`can_core_is_err_passive`](#can_core_is_err_passive) | 0x228 | 4 | Auto-extracted signal is_err_passive from can_core.vhd | +| can_bus.[`can_core_is_bus_off_i`](#can_core_is_bus_off_i) | 0x22c | 4 | Auto-extracted signal is_bus_off_i from can_core.vhd | +| can_bus.[`can_core_err_detected_i`](#can_core_err_detected_i) | 0x230 | 4 | Auto-extracted signal err_detected_i from can_core.vhd | +| can_bus.[`can_core_primary_err`](#can_core_primary_err) | 0x234 | 4 | Auto-extracted signal primary_err from can_core.vhd | +| can_bus.[`can_core_act_err_ovr_flag`](#can_core_act_err_ovr_flag) | 0x238 | 4 | Auto-extracted signal act_err_ovr_flag from can_core.vhd | +| can_bus.[`can_core_err_delim_late`](#can_core_err_delim_late) | 0x23c | 4 | Auto-extracted signal err_delim_late from can_core.vhd | +| can_bus.[`can_core_set_err_active`](#can_core_set_err_active) | 0x240 | 4 | Auto-extracted signal set_err_active from can_core.vhd | +| can_bus.[`can_core_err_ctrs_unchanged`](#can_core_err_ctrs_unchanged) | 0x244 | 4 | Auto-extracted signal err_ctrs_unchanged from can_core.vhd | +| can_bus.[`can_core_stuff_enable`](#can_core_stuff_enable) | 0x248 | 4 | Auto-extracted signal stuff_enable from can_core.vhd | +| can_bus.[`can_core_destuff_enable`](#can_core_destuff_enable) | 0x24c | 4 | Auto-extracted signal destuff_enable from can_core.vhd | +| can_bus.[`can_core_fixed_stuff`](#can_core_fixed_stuff) | 0x250 | 4 | Auto-extracted signal fixed_stuff from can_core.vhd | +| can_bus.[`can_core_tx_frame_no_sof`](#can_core_tx_frame_no_sof) | 0x254 | 4 | Auto-extracted signal tx_frame_no_sof from can_core.vhd | +| can_bus.[`can_core_stuff_length`](#can_core_stuff_length) | 0x258 | 4 | Auto-extracted signal stuff_length from can_core.vhd | +| can_bus.[`can_core_dst_ctr`](#can_core_dst_ctr) | 0x25c | 4 | Auto-extracted signal dst_ctr from can_core.vhd | +| can_bus.[`can_core_bst_ctr`](#can_core_bst_ctr) | 0x260 | 4 | Auto-extracted signal bst_ctr from can_core.vhd | +| can_bus.[`can_core_stuff_err`](#can_core_stuff_err) | 0x264 | 4 | Auto-extracted signal stuff_err from can_core.vhd | +| can_bus.[`can_core_crc_enable`](#can_core_crc_enable) | 0x268 | 4 | Auto-extracted signal crc_enable from can_core.vhd | +| can_bus.[`can_core_crc_spec_enable`](#can_core_crc_spec_enable) | 0x26c | 4 | Auto-extracted signal crc_spec_enable from can_core.vhd | +| can_bus.[`can_core_crc_calc_from_rx`](#can_core_crc_calc_from_rx) | 0x270 | 4 | Auto-extracted signal crc_calc_from_rx from can_core.vhd | +| can_bus.[`can_core_crc_15`](#can_core_crc_15) | 0x274 | 4 | Auto-extracted signal crc_15 from can_core.vhd | +| can_bus.[`can_core_crc_17`](#can_core_crc_17) | 0x278 | 4 | Auto-extracted signal crc_17 from can_core.vhd | +| can_bus.[`can_core_crc_21`](#can_core_crc_21) | 0x27c | 4 | Auto-extracted signal crc_21 from can_core.vhd | +| can_bus.[`can_core_sp_control_i`](#can_core_sp_control_i) | 0x280 | 4 | Auto-extracted signal sp_control_i from can_core.vhd | +| can_bus.[`can_core_sp_control_q`](#can_core_sp_control_q) | 0x284 | 4 | Auto-extracted signal sp_control_q from can_core.vhd | +| can_bus.[`can_core_sync_control_i`](#can_core_sync_control_i) | 0x288 | 4 | Auto-extracted signal sync_control_i from can_core.vhd | +| can_bus.[`can_core_ssp_reset_i`](#can_core_ssp_reset_i) | 0x28c | 4 | Auto-extracted signal ssp_reset_i from can_core.vhd | +| can_bus.[`can_core_tran_delay_meas_i`](#can_core_tran_delay_meas_i) | 0x290 | 4 | Auto-extracted signal tran_delay_meas_i from can_core.vhd | +| can_bus.[`can_core_tran_valid_i`](#can_core_tran_valid_i) | 0x294 | 4 | Auto-extracted signal tran_valid_i from can_core.vhd | +| can_bus.[`can_core_rec_valid_i`](#can_core_rec_valid_i) | 0x298 | 4 | Auto-extracted signal rec_valid_i from can_core.vhd | +| can_bus.[`can_core_br_shifted_i`](#can_core_br_shifted_i) | 0x29c | 4 | Auto-extracted signal br_shifted_i from can_core.vhd | +| can_bus.[`can_core_fcs_changed_i`](#can_core_fcs_changed_i) | 0x2a0 | 4 | Auto-extracted signal fcs_changed_i from can_core.vhd | +| can_bus.[`can_core_err_warning_limit_i`](#can_core_err_warning_limit_i) | 0x2a4 | 4 | Auto-extracted signal err_warning_limit_i from can_core.vhd | +| can_bus.[`can_core_tx_err_ctr`](#can_core_tx_err_ctr) | 0x2a8 | 4 | Auto-extracted signal tx_err_ctr from can_core.vhd | +| can_bus.[`can_core_rx_err_ctr`](#can_core_rx_err_ctr) | 0x2ac | 4 | Auto-extracted signal rx_err_ctr from can_core.vhd | +| can_bus.[`can_core_norm_err_ctr`](#can_core_norm_err_ctr) | 0x2b0 | 4 | Auto-extracted signal norm_err_ctr from can_core.vhd | +| can_bus.[`can_core_data_err_ctr`](#can_core_data_err_ctr) | 0x2b4 | 4 | Auto-extracted signal data_err_ctr from can_core.vhd | +| can_bus.[`can_core_pc_tx_trigger`](#can_core_pc_tx_trigger) | 0x2b8 | 4 | Auto-extracted signal pc_tx_trigger from can_core.vhd | +| can_bus.[`can_core_pc_rx_trigger`](#can_core_pc_rx_trigger) | 0x2bc | 4 | Auto-extracted signal pc_rx_trigger from can_core.vhd | +| can_bus.[`can_core_pc_tx_data_nbs`](#can_core_pc_tx_data_nbs) | 0x2c0 | 4 | Auto-extracted signal pc_tx_data_nbs from can_core.vhd | +| can_bus.[`can_core_pc_rx_data_nbs`](#can_core_pc_rx_data_nbs) | 0x2c4 | 4 | Auto-extracted signal pc_rx_data_nbs from can_core.vhd | +| can_bus.[`can_core_crc_data_tx_wbs`](#can_core_crc_data_tx_wbs) | 0x2c8 | 4 | Auto-extracted signal crc_data_tx_wbs from can_core.vhd | +| can_bus.[`can_core_crc_data_tx_nbs`](#can_core_crc_data_tx_nbs) | 0x2cc | 4 | Auto-extracted signal crc_data_tx_nbs from can_core.vhd | +| can_bus.[`can_core_crc_data_rx_wbs`](#can_core_crc_data_rx_wbs) | 0x2d0 | 4 | Auto-extracted signal crc_data_rx_wbs from can_core.vhd | +| can_bus.[`can_core_crc_data_rx_nbs`](#can_core_crc_data_rx_nbs) | 0x2d4 | 4 | Auto-extracted signal crc_data_rx_nbs from can_core.vhd | +| can_bus.[`can_core_crc_trig_tx_wbs`](#can_core_crc_trig_tx_wbs) | 0x2d8 | 4 | Auto-extracted signal crc_trig_tx_wbs from can_core.vhd | +| can_bus.[`can_core_crc_trig_tx_nbs`](#can_core_crc_trig_tx_nbs) | 0x2dc | 4 | Auto-extracted signal crc_trig_tx_nbs from can_core.vhd | +| can_bus.[`can_core_crc_trig_rx_wbs`](#can_core_crc_trig_rx_wbs) | 0x2e0 | 4 | Auto-extracted signal crc_trig_rx_wbs from can_core.vhd | +| can_bus.[`can_core_crc_trig_rx_nbs`](#can_core_crc_trig_rx_nbs) | 0x2e4 | 4 | Auto-extracted signal crc_trig_rx_nbs from can_core.vhd | +| can_bus.[`can_core_bst_data_in`](#can_core_bst_data_in) | 0x2e8 | 4 | Auto-extracted signal bst_data_in from can_core.vhd | +| can_bus.[`can_core_bst_data_out`](#can_core_bst_data_out) | 0x2ec | 4 | Auto-extracted signal bst_data_out from can_core.vhd | +| can_bus.[`can_core_bst_trigger`](#can_core_bst_trigger) | 0x2f0 | 4 | Auto-extracted signal bst_trigger from can_core.vhd | +| can_bus.[`can_core_data_halt`](#can_core_data_halt) | 0x2f4 | 4 | Auto-extracted signal data_halt from can_core.vhd | +| can_bus.[`can_core_bds_data_in`](#can_core_bds_data_in) | 0x2f8 | 4 | Auto-extracted signal bds_data_in from can_core.vhd | +| can_bus.[`can_core_bds_data_out`](#can_core_bds_data_out) | 0x2fc | 4 | Auto-extracted signal bds_data_out from can_core.vhd | +| can_bus.[`can_core_bds_trigger`](#can_core_bds_trigger) | 0x300 | 4 | Auto-extracted signal bds_trigger from can_core.vhd | +| can_bus.[`can_core_destuffed`](#can_core_destuffed) | 0x304 | 4 | Auto-extracted signal destuffed from can_core.vhd | +| can_bus.[`can_core_tx_ctr`](#can_core_tx_ctr) | 0x308 | 4 | Auto-extracted signal tx_ctr from can_core.vhd | +| can_bus.[`can_core_rx_ctr`](#can_core_rx_ctr) | 0x30c | 4 | Auto-extracted signal rx_ctr from can_core.vhd | +| can_bus.[`can_core_tx_data_wbs_i`](#can_core_tx_data_wbs_i) | 0x310 | 4 | Auto-extracted signal tx_data_wbs_i from can_core.vhd | +| can_bus.[`can_core_lpb_dominant`](#can_core_lpb_dominant) | 0x314 | 4 | Auto-extracted signal lpb_dominant from can_core.vhd | +| can_bus.[`can_core_form_err`](#can_core_form_err) | 0x318 | 4 | Auto-extracted signal form_err from can_core.vhd | +| can_bus.[`can_core_ack_err`](#can_core_ack_err) | 0x31c | 4 | Auto-extracted signal ack_err from can_core.vhd | +| can_bus.[`can_core_crc_err`](#can_core_crc_err) | 0x320 | 4 | Auto-extracted signal crc_err from can_core.vhd | +| can_bus.[`can_core_is_arbitration`](#can_core_is_arbitration) | 0x324 | 4 | Auto-extracted signal is_arbitration from can_core.vhd | +| can_bus.[`can_core_is_control`](#can_core_is_control) | 0x328 | 4 | Auto-extracted signal is_control from can_core.vhd | +| can_bus.[`can_core_is_data`](#can_core_is_data) | 0x32c | 4 | Auto-extracted signal is_data from can_core.vhd | +| can_bus.[`can_core_is_stuff_count`](#can_core_is_stuff_count) | 0x330 | 4 | Auto-extracted signal is_stuff_count from can_core.vhd | +| can_bus.[`can_core_is_crc`](#can_core_is_crc) | 0x334 | 4 | Auto-extracted signal is_crc from can_core.vhd | +| can_bus.[`can_core_is_crc_delim`](#can_core_is_crc_delim) | 0x338 | 4 | Auto-extracted signal is_crc_delim from can_core.vhd | +| can_bus.[`can_core_is_ack_field`](#can_core_is_ack_field) | 0x33c | 4 | Auto-extracted signal is_ack_field from can_core.vhd | +| can_bus.[`can_core_is_ack_delim`](#can_core_is_ack_delim) | 0x340 | 4 | Auto-extracted signal is_ack_delim from can_core.vhd | +| can_bus.[`can_core_is_eof`](#can_core_is_eof) | 0x344 | 4 | Auto-extracted signal is_eof from can_core.vhd | +| can_bus.[`can_core_is_err_frm`](#can_core_is_err_frm) | 0x348 | 4 | Auto-extracted signal is_err_frm from can_core.vhd | +| can_bus.[`can_core_is_intermission`](#can_core_is_intermission) | 0x34c | 4 | Auto-extracted signal is_intermission from can_core.vhd | +| can_bus.[`can_core_is_suspend`](#can_core_is_suspend) | 0x350 | 4 | Auto-extracted signal is_suspend from can_core.vhd | +| can_bus.[`can_core_is_overload_i`](#can_core_is_overload_i) | 0x354 | 4 | Auto-extracted signal is_overload_i from can_core.vhd | +| can_bus.[`can_core_is_sof`](#can_core_is_sof) | 0x358 | 4 | Auto-extracted signal is_sof from can_core.vhd | +| can_bus.[`can_core_sof_pulse_i`](#can_core_sof_pulse_i) | 0x35c | 4 | Auto-extracted signal sof_pulse_i from can_core.vhd | +| can_bus.[`can_core_load_init_vect`](#can_core_load_init_vect) | 0x360 | 4 | Auto-extracted signal load_init_vect from can_core.vhd | +| can_bus.[`can_core_retr_ctr_i`](#can_core_retr_ctr_i) | 0x364 | 4 | Auto-extracted signal retr_ctr_i from can_core.vhd | +| can_bus.[`can_core_decrement_rec`](#can_core_decrement_rec) | 0x368 | 4 | Auto-extracted signal decrement_rec from can_core.vhd | +| can_bus.[`can_core_bit_err_after_ack_err`](#can_core_bit_err_after_ack_err) | 0x36c | 4 | Auto-extracted signal bit_err_after_ack_err from can_core.vhd | +| can_bus.[`can_core_is_pexs`](#can_core_is_pexs) | 0x370 | 4 | Auto-extracted signal is_pexs from can_core.vhd | +| can_bus.[`can_crc_drv_fd_type`](#can_crc_drv_fd_type) | 0x374 | 4 | Auto-extracted signal drv_fd_type from can_crc.vhd | +| can_bus.[`can_crc_init_vect_15`](#can_crc_init_vect_15) | 0x378 | 4 | Auto-extracted signal init_vect_15 from can_crc.vhd | +| can_bus.[`can_crc_init_vect_17`](#can_crc_init_vect_17) | 0x37c | 4 | Auto-extracted signal init_vect_17 from can_crc.vhd | +| can_bus.[`can_crc_init_vect_21`](#can_crc_init_vect_21) | 0x380 | 4 | Auto-extracted signal init_vect_21 from can_crc.vhd | +| can_bus.[`can_crc_crc_17_21_data_in`](#can_crc_crc_17_21_data_in) | 0x384 | 4 | Auto-extracted signal crc_17_21_data_in from can_crc.vhd | +| can_bus.[`can_crc_crc_17_21_trigger`](#can_crc_crc_17_21_trigger) | 0x388 | 4 | Auto-extracted signal crc_17_21_trigger from can_crc.vhd | +| can_bus.[`can_crc_crc_15_data_in`](#can_crc_crc_15_data_in) | 0x38c | 4 | Auto-extracted signal crc_15_data_in from can_crc.vhd | +| can_bus.[`can_crc_crc_15_trigger`](#can_crc_crc_15_trigger) | 0x390 | 4 | Auto-extracted signal crc_15_trigger from can_crc.vhd | +| can_bus.[`can_crc_crc_ena_15`](#can_crc_crc_ena_15) | 0x394 | 4 | Auto-extracted signal crc_ena_15 from can_crc.vhd | +| can_bus.[`can_crc_crc_ena_17_21`](#can_crc_crc_ena_17_21) | 0x398 | 4 | Auto-extracted signal crc_ena_17_21 from can_crc.vhd | +| can_bus.[`can_top_ahb_ctu_can_data_in`](#can_top_ahb_ctu_can_data_in) | 0x39c | 4 | Auto-extracted signal ctu_can_data_in from can_top_ahb.vhd | +| can_bus.[`can_top_ahb_ctu_can_data_out`](#can_top_ahb_ctu_can_data_out) | 0x3a0 | 4 | Auto-extracted signal ctu_can_data_out from can_top_ahb.vhd | +| can_bus.[`can_top_ahb_ctu_can_adress`](#can_top_ahb_ctu_can_adress) | 0x3a4 | 4 | Auto-extracted signal ctu_can_adress from can_top_ahb.vhd | +| can_bus.[`can_top_ahb_ctu_can_scs`](#can_top_ahb_ctu_can_scs) | 0x3a8 | 4 | Auto-extracted signal ctu_can_scs from can_top_ahb.vhd | +| can_bus.[`can_top_ahb_ctu_can_srd`](#can_top_ahb_ctu_can_srd) | 0x3ac | 4 | Auto-extracted signal ctu_can_srd from can_top_ahb.vhd | +| can_bus.[`can_top_ahb_ctu_can_swr`](#can_top_ahb_ctu_can_swr) | 0x3b0 | 4 | Auto-extracted signal ctu_can_swr from can_top_ahb.vhd | +| can_bus.[`can_top_ahb_ctu_can_sbe`](#can_top_ahb_ctu_can_sbe) | 0x3b4 | 4 | Auto-extracted signal ctu_can_sbe from can_top_ahb.vhd | +| can_bus.[`can_top_ahb_res_n_out_i`](#can_top_ahb_res_n_out_i) | 0x3b8 | 4 | Auto-extracted signal res_n_out_i from can_top_ahb.vhd | +| can_bus.[`can_top_apb_reg_data_in`](#can_top_apb_reg_data_in) | 0x3bc | 4 | Auto-extracted signal reg_data_in from can_top_apb.vhd | +| can_bus.[`can_top_apb_reg_data_out`](#can_top_apb_reg_data_out) | 0x3c0 | 4 | Auto-extracted signal reg_data_out from can_top_apb.vhd | +| can_bus.[`can_top_apb_reg_addr`](#can_top_apb_reg_addr) | 0x3c4 | 4 | Auto-extracted signal reg_addr from can_top_apb.vhd | +| can_bus.[`can_top_apb_reg_be`](#can_top_apb_reg_be) | 0x3c8 | 4 | Auto-extracted signal reg_be from can_top_apb.vhd | +| can_bus.[`can_top_apb_reg_rden`](#can_top_apb_reg_rden) | 0x3cc | 4 | Auto-extracted signal reg_rden from can_top_apb.vhd | +| can_bus.[`can_top_apb_reg_wren`](#can_top_apb_reg_wren) | 0x3d0 | 4 | Auto-extracted signal reg_wren from can_top_apb.vhd | +| can_bus.[`can_top_level_drv_bus`](#can_top_level_drv_bus) | 0x3d4 | 4 | Auto-extracted signal drv_bus from can_top_level.vhd | +| can_bus.[`can_top_level_stat_bus`](#can_top_level_stat_bus) | 0x3d8 | 4 | Auto-extracted signal stat_bus from can_top_level.vhd | +| can_bus.[`can_top_level_res_n_sync`](#can_top_level_res_n_sync) | 0x3dc | 4 | Auto-extracted signal res_n_sync from can_top_level.vhd | +| can_bus.[`can_top_level_res_core_n`](#can_top_level_res_core_n) | 0x3e0 | 4 | Auto-extracted signal res_core_n from can_top_level.vhd | +| can_bus.[`can_top_level_res_soft_n`](#can_top_level_res_soft_n) | 0x3e4 | 4 | Auto-extracted signal res_soft_n from can_top_level.vhd | +| can_bus.[`can_top_level_sp_control`](#can_top_level_sp_control) | 0x3e8 | 4 | Auto-extracted signal sp_control from can_top_level.vhd | +| can_bus.[`can_top_level_rx_buf_size`](#can_top_level_rx_buf_size) | 0x3ec | 4 | Auto-extracted signal rx_buf_size from can_top_level.vhd | +| can_bus.[`can_top_level_rx_full`](#can_top_level_rx_full) | 0x3f0 | 4 | Auto-extracted signal rx_full from can_top_level.vhd | +| can_bus.[`can_top_level_rx_empty`](#can_top_level_rx_empty) | 0x3f4 | 4 | Auto-extracted signal rx_empty from can_top_level.vhd | +| can_bus.[`can_top_level_rx_frame_count`](#can_top_level_rx_frame_count) | 0x3f8 | 4 | Auto-extracted signal rx_frame_count from can_top_level.vhd | +| can_bus.[`can_top_level_rx_mem_free`](#can_top_level_rx_mem_free) | 0x3fc | 4 | Auto-extracted signal rx_mem_free from can_top_level.vhd | +| can_bus.[`can_top_level_rx_read_pointer`](#can_top_level_rx_read_pointer) | 0x400 | 4 | Auto-extracted signal rx_read_pointer from can_top_level.vhd | +| can_bus.[`can_top_level_rx_write_pointer`](#can_top_level_rx_write_pointer) | 0x404 | 4 | Auto-extracted signal rx_write_pointer from can_top_level.vhd | +| can_bus.[`can_top_level_rx_data_overrun`](#can_top_level_rx_data_overrun) | 0x408 | 4 | Auto-extracted signal rx_data_overrun from can_top_level.vhd | +| can_bus.[`can_top_level_rx_read_buff`](#can_top_level_rx_read_buff) | 0x40c | 4 | Auto-extracted signal rx_read_buff from can_top_level.vhd | +| can_bus.[`can_top_level_rx_mof`](#can_top_level_rx_mof) | 0x410 | 4 | Auto-extracted signal rx_mof from can_top_level.vhd | +| can_bus.[`can_top_level_txtb_port_a_data`](#can_top_level_txtb_port_a_data) | 0x414 | 4 | Auto-extracted signal txtb_port_a_data from can_top_level.vhd | +| can_bus.[`can_top_level_txtb_port_a_address`](#can_top_level_txtb_port_a_address) | 0x418 | 4 | Auto-extracted signal txtb_port_a_address from can_top_level.vhd | +| can_bus.[`can_top_level_txtb_port_a_cs`](#can_top_level_txtb_port_a_cs) | 0x41c | 4 | Auto-extracted signal txtb_port_a_cs from can_top_level.vhd | +| can_bus.[`can_top_level_txtb_port_a_be`](#can_top_level_txtb_port_a_be) | 0x420 | 4 | Auto-extracted signal txtb_port_a_be from can_top_level.vhd | +| can_bus.[`can_top_level_txtb_sw_cmd_index`](#can_top_level_txtb_sw_cmd_index) | 0x424 | 4 | Auto-extracted signal txtb_sw_cmd_index from can_top_level.vhd | +| can_bus.[`can_top_level_txt_buf_failed_bof`](#can_top_level_txt_buf_failed_bof) | 0x428 | 4 | Auto-extracted signal txt_buf_failed_bof from can_top_level.vhd | +| can_bus.[`can_top_level_int_vector`](#can_top_level_int_vector) | 0x42c | 4 | Auto-extracted signal int_vector from can_top_level.vhd | +| can_bus.[`can_top_level_int_ena`](#can_top_level_int_ena) | 0x430 | 4 | Auto-extracted signal int_ena from can_top_level.vhd | +| can_bus.[`can_top_level_int_mask`](#can_top_level_int_mask) | 0x434 | 4 | Auto-extracted signal int_mask from can_top_level.vhd | +| can_bus.[`can_top_level_rec_ident`](#can_top_level_rec_ident) | 0x438 | 4 | Auto-extracted signal rec_ident from can_top_level.vhd | +| can_bus.[`can_top_level_rec_dlc`](#can_top_level_rec_dlc) | 0x43c | 4 | Auto-extracted signal rec_dlc from can_top_level.vhd | +| can_bus.[`can_top_level_rec_ident_type`](#can_top_level_rec_ident_type) | 0x440 | 4 | Auto-extracted signal rec_ident_type from can_top_level.vhd | +| can_bus.[`can_top_level_rec_frame_type`](#can_top_level_rec_frame_type) | 0x444 | 4 | Auto-extracted signal rec_frame_type from can_top_level.vhd | +| can_bus.[`can_top_level_rec_is_rtr`](#can_top_level_rec_is_rtr) | 0x448 | 4 | Auto-extracted signal rec_is_rtr from can_top_level.vhd | +| can_bus.[`can_top_level_rec_brs`](#can_top_level_rec_brs) | 0x44c | 4 | Auto-extracted signal rec_brs from can_top_level.vhd | +| can_bus.[`can_top_level_rec_esi`](#can_top_level_rec_esi) | 0x450 | 4 | Auto-extracted signal rec_esi from can_top_level.vhd | +| can_bus.[`can_top_level_store_data_word`](#can_top_level_store_data_word) | 0x454 | 4 | Auto-extracted signal store_data_word from can_top_level.vhd | +| can_bus.[`can_top_level_sof_pulse`](#can_top_level_sof_pulse) | 0x458 | 4 | Auto-extracted signal sof_pulse from can_top_level.vhd | +| can_bus.[`can_top_level_store_metadata`](#can_top_level_store_metadata) | 0x45c | 4 | Auto-extracted signal store_metadata from can_top_level.vhd | +| can_bus.[`can_top_level_store_data`](#can_top_level_store_data) | 0x460 | 4 | Auto-extracted signal store_data from can_top_level.vhd | +| can_bus.[`can_top_level_rec_valid`](#can_top_level_rec_valid) | 0x464 | 4 | Auto-extracted signal rec_valid from can_top_level.vhd | +| can_bus.[`can_top_level_rec_abort`](#can_top_level_rec_abort) | 0x468 | 4 | Auto-extracted signal rec_abort from can_top_level.vhd | +| can_bus.[`can_top_level_store_metadata_f`](#can_top_level_store_metadata_f) | 0x46c | 4 | Auto-extracted signal store_metadata_f from can_top_level.vhd | +| can_bus.[`can_top_level_store_data_f`](#can_top_level_store_data_f) | 0x470 | 4 | Auto-extracted signal store_data_f from can_top_level.vhd | +| can_bus.[`can_top_level_rec_valid_f`](#can_top_level_rec_valid_f) | 0x474 | 4 | Auto-extracted signal rec_valid_f from can_top_level.vhd | +| can_bus.[`can_top_level_rec_abort_f`](#can_top_level_rec_abort_f) | 0x478 | 4 | Auto-extracted signal rec_abort_f from can_top_level.vhd | +| can_bus.[`can_top_level_txtb_hw_cmd_int`](#can_top_level_txtb_hw_cmd_int) | 0x47c | 4 | Auto-extracted signal txtb_hw_cmd_int from can_top_level.vhd | +| can_bus.[`can_top_level_is_bus_off`](#can_top_level_is_bus_off) | 0x480 | 4 | Auto-extracted signal is_bus_off from can_top_level.vhd | +| can_bus.[`can_top_level_txtb_available`](#can_top_level_txtb_available) | 0x484 | 4 | Auto-extracted signal txtb_available from can_top_level.vhd | +| can_bus.[`can_top_level_txtb_port_b_clk_en`](#can_top_level_txtb_port_b_clk_en) | 0x488 | 4 | Auto-extracted signal txtb_port_b_clk_en from can_top_level.vhd | +| can_bus.[`can_top_level_tran_dlc`](#can_top_level_tran_dlc) | 0x48c | 4 | Auto-extracted signal tran_dlc from can_top_level.vhd | +| can_bus.[`can_top_level_tran_is_rtr`](#can_top_level_tran_is_rtr) | 0x490 | 4 | Auto-extracted signal tran_is_rtr from can_top_level.vhd | +| can_bus.[`can_top_level_tran_ident_type`](#can_top_level_tran_ident_type) | 0x494 | 4 | Auto-extracted signal tran_ident_type from can_top_level.vhd | +| can_bus.[`can_top_level_tran_frame_type`](#can_top_level_tran_frame_type) | 0x498 | 4 | Auto-extracted signal tran_frame_type from can_top_level.vhd | +| can_bus.[`can_top_level_tran_brs`](#can_top_level_tran_brs) | 0x49c | 4 | Auto-extracted signal tran_brs from can_top_level.vhd | +| can_bus.[`can_top_level_tran_identifier`](#can_top_level_tran_identifier) | 0x4a0 | 4 | Auto-extracted signal tran_identifier from can_top_level.vhd | +| can_bus.[`can_top_level_tran_word`](#can_top_level_tran_word) | 0x4a4 | 4 | Auto-extracted signal tran_word from can_top_level.vhd | +| can_bus.[`can_top_level_tran_frame_valid`](#can_top_level_tran_frame_valid) | 0x4a8 | 4 | Auto-extracted signal tran_frame_valid from can_top_level.vhd | +| can_bus.[`can_top_level_txtb_changed`](#can_top_level_txtb_changed) | 0x4ac | 4 | Auto-extracted signal txtb_changed from can_top_level.vhd | +| can_bus.[`can_top_level_txtb_clk_en`](#can_top_level_txtb_clk_en) | 0x4b0 | 4 | Auto-extracted signal txtb_clk_en from can_top_level.vhd | +| can_bus.[`can_top_level_err_detected`](#can_top_level_err_detected) | 0x4b4 | 4 | Auto-extracted signal err_detected from can_top_level.vhd | +| can_bus.[`can_top_level_fcs_changed`](#can_top_level_fcs_changed) | 0x4b8 | 4 | Auto-extracted signal fcs_changed from can_top_level.vhd | +| can_bus.[`can_top_level_err_warning_limit`](#can_top_level_err_warning_limit) | 0x4bc | 4 | Auto-extracted signal err_warning_limit from can_top_level.vhd | +| can_bus.[`can_top_level_arbitration_lost`](#can_top_level_arbitration_lost) | 0x4c0 | 4 | Auto-extracted signal arbitration_lost from can_top_level.vhd | +| can_bus.[`can_top_level_tran_valid`](#can_top_level_tran_valid) | 0x4c4 | 4 | Auto-extracted signal tran_valid from can_top_level.vhd | +| can_bus.[`can_top_level_br_shifted`](#can_top_level_br_shifted) | 0x4c8 | 4 | Auto-extracted signal br_shifted from can_top_level.vhd | +| can_bus.[`can_top_level_is_overload`](#can_top_level_is_overload) | 0x4cc | 4 | Auto-extracted signal is_overload from can_top_level.vhd | +| can_bus.[`can_top_level_rx_triggers`](#can_top_level_rx_triggers) | 0x4d0 | 4 | Auto-extracted signal rx_triggers from can_top_level.vhd | +| can_bus.[`can_top_level_tx_trigger`](#can_top_level_tx_trigger) | 0x4d4 | 4 | Auto-extracted signal tx_trigger from can_top_level.vhd | +| can_bus.[`can_top_level_sync_control`](#can_top_level_sync_control) | 0x4d8 | 4 | Auto-extracted signal sync_control from can_top_level.vhd | +| can_bus.[`can_top_level_no_pos_resync`](#can_top_level_no_pos_resync) | 0x4dc | 4 | Auto-extracted signal no_pos_resync from can_top_level.vhd | +| can_bus.[`can_top_level_nbt_ctrs_en`](#can_top_level_nbt_ctrs_en) | 0x4e0 | 4 | Auto-extracted signal nbt_ctrs_en from can_top_level.vhd | +| can_bus.[`can_top_level_dbt_ctrs_en`](#can_top_level_dbt_ctrs_en) | 0x4e4 | 4 | Auto-extracted signal dbt_ctrs_en from can_top_level.vhd | +| can_bus.[`can_top_level_trv_delay`](#can_top_level_trv_delay) | 0x4e8 | 4 | Auto-extracted signal trv_delay from can_top_level.vhd | +| can_bus.[`can_top_level_rx_data_wbs`](#can_top_level_rx_data_wbs) | 0x4ec | 4 | Auto-extracted signal rx_data_wbs from can_top_level.vhd | +| can_bus.[`can_top_level_tx_data_wbs`](#can_top_level_tx_data_wbs) | 0x4f0 | 4 | Auto-extracted signal tx_data_wbs from can_top_level.vhd | +| can_bus.[`can_top_level_ssp_reset`](#can_top_level_ssp_reset) | 0x4f4 | 4 | Auto-extracted signal ssp_reset from can_top_level.vhd | +| can_bus.[`can_top_level_tran_delay_meas`](#can_top_level_tran_delay_meas) | 0x4f8 | 4 | Auto-extracted signal tran_delay_meas from can_top_level.vhd | +| can_bus.[`can_top_level_bit_err`](#can_top_level_bit_err) | 0x4fc | 4 | Auto-extracted signal bit_err from can_top_level.vhd | +| can_bus.[`can_top_level_sample_sec`](#can_top_level_sample_sec) | 0x500 | 4 | Auto-extracted signal sample_sec from can_top_level.vhd | +| can_bus.[`can_top_level_btmc_reset`](#can_top_level_btmc_reset) | 0x504 | 4 | Auto-extracted signal btmc_reset from can_top_level.vhd | +| can_bus.[`can_top_level_dbt_measure_start`](#can_top_level_dbt_measure_start) | 0x508 | 4 | Auto-extracted signal dbt_measure_start from can_top_level.vhd | +| can_bus.[`can_top_level_gen_first_ssp`](#can_top_level_gen_first_ssp) | 0x50c | 4 | Auto-extracted signal gen_first_ssp from can_top_level.vhd | +| can_bus.[`can_top_level_sync_edge`](#can_top_level_sync_edge) | 0x510 | 4 | Auto-extracted signal sync_edge from can_top_level.vhd | +| can_bus.[`can_top_level_tq_edge`](#can_top_level_tq_edge) | 0x514 | 4 | Auto-extracted signal tq_edge from can_top_level.vhd | +| can_bus.[`can_top_level_tst_rdata_rx_buf`](#can_top_level_tst_rdata_rx_buf) | 0x518 | 4 | Auto-extracted signal tst_rdata_rx_buf from can_top_level.vhd | +| can_bus.[`clk_gate_clk_en_q`](#clk_gate_clk_en_q) | 0x51c | 4 | Auto-extracted signal clk_en_q from clk_gate.vhd | +| can_bus.[`control_counter_ctrl_ctr_ce`](#control_counter_ctrl_ctr_ce) | 0x520 | 4 | Auto-extracted signal ctrl_ctr_ce from control_counter.vhd | +| can_bus.[`control_counter_compl_ctr_ce`](#control_counter_compl_ctr_ce) | 0x524 | 4 | Auto-extracted signal compl_ctr_ce from control_counter.vhd | +| can_bus.[`control_registers_reg_map_reg_sel`](#control_registers_reg_map_reg_sel) | 0x528 | 4 | Auto-extracted signal reg_sel from control_registers_reg_map.vhd | +| can_bus.[`control_registers_reg_map_read_data_mux_in`](#control_registers_reg_map_read_data_mux_in) | 0x52c | 4 | Auto-extracted signal read_data_mux_in from control_registers_reg_map.vhd | +| can_bus.[`control_registers_reg_map_read_data_mask_n`](#control_registers_reg_map_read_data_mask_n) | 0x530 | 4 | Auto-extracted signal read_data_mask_n from control_registers_reg_map.vhd | +| can_bus.[`control_registers_reg_map_read_mux_ena`](#control_registers_reg_map_read_mux_ena) | 0x534 | 4 | Auto-extracted signal read_mux_ena from control_registers_reg_map.vhd | +| can_bus.[`crc_calc_crc_q`](#crc_calc_crc_q) | 0x538 | 4 | Auto-extracted signal crc_q from crc_calc.vhd | +| can_bus.[`crc_calc_crc_nxt`](#crc_calc_crc_nxt) | 0x53c | 4 | Auto-extracted signal crc_nxt from crc_calc.vhd | +| can_bus.[`crc_calc_crc_shift`](#crc_calc_crc_shift) | 0x540 | 4 | Auto-extracted signal crc_shift from crc_calc.vhd | +| can_bus.[`crc_calc_crc_shift_n_xor`](#crc_calc_crc_shift_n_xor) | 0x544 | 4 | Auto-extracted signal crc_shift_n_xor from crc_calc.vhd | +| can_bus.[`crc_calc_crc_d`](#crc_calc_crc_d) | 0x548 | 4 | Auto-extracted signal crc_d from crc_calc.vhd | +| can_bus.[`crc_calc_crc_ce`](#crc_calc_crc_ce) | 0x54c | 4 | Auto-extracted signal crc_ce from crc_calc.vhd | +| can_bus.[`data_edge_detector_rx_data_prev`](#data_edge_detector_rx_data_prev) | 0x550 | 4 | Auto-extracted signal rx_data_prev from data_edge_detector.vhd | +| can_bus.[`data_edge_detector_tx_data_prev`](#data_edge_detector_tx_data_prev) | 0x554 | 4 | Auto-extracted signal tx_data_prev from data_edge_detector.vhd | +| can_bus.[`data_edge_detector_rx_data_sync_prev`](#data_edge_detector_rx_data_sync_prev) | 0x558 | 4 | Auto-extracted signal rx_data_sync_prev from data_edge_detector.vhd | +| can_bus.[`data_edge_detector_rx_edge_i`](#data_edge_detector_rx_edge_i) | 0x55c | 4 | Auto-extracted signal rx_edge_i from data_edge_detector.vhd | +| can_bus.[`data_edge_detector_tx_edge_i`](#data_edge_detector_tx_edge_i) | 0x560 | 4 | Auto-extracted signal tx_edge_i from data_edge_detector.vhd | +| can_bus.[`data_mux_sel_data`](#data_mux_sel_data) | 0x564 | 4 | Auto-extracted signal sel_data from data_mux.vhd | +| can_bus.[`data_mux_saturated_data`](#data_mux_saturated_data) | 0x568 | 4 | Auto-extracted signal saturated_data from data_mux.vhd | +| can_bus.[`data_mux_masked_data`](#data_mux_masked_data) | 0x56c | 4 | Auto-extracted signal masked_data from data_mux.vhd | +| can_bus.[`dlc_decoder_data_len_8_to_64`](#dlc_decoder_data_len_8_to_64) | 0x570 | 4 | Auto-extracted signal data_len_8_to_64 from dlc_decoder.vhd | +| can_bus.[`dlc_decoder_data_len_can_2_0`](#dlc_decoder_data_len_can_2_0) | 0x574 | 4 | Auto-extracted signal data_len_can_2_0 from dlc_decoder.vhd | +| can_bus.[`dlc_decoder_data_len_can_fd`](#dlc_decoder_data_len_can_fd) | 0x578 | 4 | Auto-extracted signal data_len_can_fd from dlc_decoder.vhd | +| can_bus.[`endian_swapper_swapped`](#endian_swapper_swapped) | 0x57c | 4 | Auto-extracted signal swapped from endian_swapper.vhd | +| can_bus.[`err_counters_tx_err_ctr_ce`](#err_counters_tx_err_ctr_ce) | 0x580 | 4 | Auto-extracted signal tx_err_ctr_ce from err_counters.vhd | +| can_bus.[`err_counters_rx_err_ctr_ce`](#err_counters_rx_err_ctr_ce) | 0x584 | 4 | Auto-extracted signal rx_err_ctr_ce from err_counters.vhd | +| can_bus.[`err_counters_modif_tx_ctr`](#err_counters_modif_tx_ctr) | 0x588 | 4 | Auto-extracted signal modif_tx_ctr from err_counters.vhd | +| can_bus.[`err_counters_modif_rx_ctr`](#err_counters_modif_rx_ctr) | 0x58c | 4 | Auto-extracted signal modif_rx_ctr from err_counters.vhd | +| can_bus.[`err_counters_nom_err_ctr_ce`](#err_counters_nom_err_ctr_ce) | 0x590 | 4 | Auto-extracted signal nom_err_ctr_ce from err_counters.vhd | +| can_bus.[`err_counters_data_err_ctr_ce`](#err_counters_data_err_ctr_ce) | 0x594 | 4 | Auto-extracted signal data_err_ctr_ce from err_counters.vhd | +| can_bus.[`err_counters_res_err_ctrs_d`](#err_counters_res_err_ctrs_d) | 0x598 | 4 | Auto-extracted signal res_err_ctrs_d from err_counters.vhd | +| can_bus.[`err_counters_res_err_ctrs_q`](#err_counters_res_err_ctrs_q) | 0x59c | 4 | Auto-extracted signal res_err_ctrs_q from err_counters.vhd | +| can_bus.[`err_counters_res_err_ctrs_q_scan`](#err_counters_res_err_ctrs_q_scan) | 0x5a0 | 4 | Auto-extracted signal res_err_ctrs_q_scan from err_counters.vhd | +| can_bus.[`err_detector_err_frm_req_i`](#err_detector_err_frm_req_i) | 0x5a4 | 4 | Auto-extracted signal err_frm_req_i from err_detector.vhd | +| can_bus.[`err_detector_err_type_d`](#err_detector_err_type_d) | 0x5a8 | 4 | Auto-extracted signal err_type_d from err_detector.vhd | +| can_bus.[`err_detector_err_type_q`](#err_detector_err_type_q) | 0x5ac | 4 | Auto-extracted signal err_type_q from err_detector.vhd | +| can_bus.[`err_detector_err_pos_q`](#err_detector_err_pos_q) | 0x5b0 | 4 | Auto-extracted signal err_pos_q from err_detector.vhd | +| can_bus.[`err_detector_form_err_i`](#err_detector_form_err_i) | 0x5b4 | 4 | Auto-extracted signal form_err_i from err_detector.vhd | +| can_bus.[`err_detector_crc_match_c`](#err_detector_crc_match_c) | 0x5b8 | 4 | Auto-extracted signal crc_match_c from err_detector.vhd | +| can_bus.[`err_detector_crc_match_d`](#err_detector_crc_match_d) | 0x5bc | 4 | Auto-extracted signal crc_match_d from err_detector.vhd | +| can_bus.[`err_detector_crc_match_q`](#err_detector_crc_match_q) | 0x5c0 | 4 | Auto-extracted signal crc_match_q from err_detector.vhd | +| can_bus.[`err_detector_dst_ctr_grey`](#err_detector_dst_ctr_grey) | 0x5c4 | 4 | Auto-extracted signal dst_ctr_grey from err_detector.vhd | +| can_bus.[`err_detector_dst_parity`](#err_detector_dst_parity) | 0x5c8 | 4 | Auto-extracted signal dst_parity from err_detector.vhd | +| can_bus.[`err_detector_stuff_count_check`](#err_detector_stuff_count_check) | 0x5cc | 4 | Auto-extracted signal stuff_count_check from err_detector.vhd | +| can_bus.[`err_detector_crc_15_ok`](#err_detector_crc_15_ok) | 0x5d0 | 4 | Auto-extracted signal crc_15_ok from err_detector.vhd | +| can_bus.[`err_detector_crc_17_ok`](#err_detector_crc_17_ok) | 0x5d4 | 4 | Auto-extracted signal crc_17_ok from err_detector.vhd | +| can_bus.[`err_detector_crc_21_ok`](#err_detector_crc_21_ok) | 0x5d8 | 4 | Auto-extracted signal crc_21_ok from err_detector.vhd | +| can_bus.[`err_detector_stuff_count_ok`](#err_detector_stuff_count_ok) | 0x5dc | 4 | Auto-extracted signal stuff_count_ok from err_detector.vhd | +| can_bus.[`err_detector_rx_crc_15`](#err_detector_rx_crc_15) | 0x5e0 | 4 | Auto-extracted signal rx_crc_15 from err_detector.vhd | +| can_bus.[`err_detector_rx_crc_17`](#err_detector_rx_crc_17) | 0x5e4 | 4 | Auto-extracted signal rx_crc_17 from err_detector.vhd | +| can_bus.[`err_detector_rx_crc_21`](#err_detector_rx_crc_21) | 0x5e8 | 4 | Auto-extracted signal rx_crc_21 from err_detector.vhd | +| can_bus.[`fault_confinement_drv_ewl`](#fault_confinement_drv_ewl) | 0x5ec | 4 | Auto-extracted signal drv_ewl from fault_confinement.vhd | +| can_bus.[`fault_confinement_drv_erp`](#fault_confinement_drv_erp) | 0x5f0 | 4 | Auto-extracted signal drv_erp from fault_confinement.vhd | +| can_bus.[`fault_confinement_drv_ctr_val`](#fault_confinement_drv_ctr_val) | 0x5f4 | 4 | Auto-extracted signal drv_ctr_val from fault_confinement.vhd | +| can_bus.[`fault_confinement_drv_ctr_sel`](#fault_confinement_drv_ctr_sel) | 0x5f8 | 4 | Auto-extracted signal drv_ctr_sel from fault_confinement.vhd | +| can_bus.[`fault_confinement_drv_ena`](#fault_confinement_drv_ena) | 0x5fc | 4 | Auto-extracted signal drv_ena from fault_confinement.vhd | +| can_bus.[`fault_confinement_tx_err_ctr_i`](#fault_confinement_tx_err_ctr_i) | 0x600 | 4 | Auto-extracted signal tx_err_ctr_i from fault_confinement.vhd | +| can_bus.[`fault_confinement_rx_err_ctr_i`](#fault_confinement_rx_err_ctr_i) | 0x604 | 4 | Auto-extracted signal rx_err_ctr_i from fault_confinement.vhd | +| can_bus.[`fault_confinement_inc_one`](#fault_confinement_inc_one) | 0x608 | 4 | Auto-extracted signal inc_one from fault_confinement.vhd | +| can_bus.[`fault_confinement_inc_eight`](#fault_confinement_inc_eight) | 0x60c | 4 | Auto-extracted signal inc_eight from fault_confinement.vhd | +| can_bus.[`fault_confinement_dec_one`](#fault_confinement_dec_one) | 0x610 | 4 | Auto-extracted signal dec_one from fault_confinement.vhd | +| can_bus.[`fault_confinement_drv_rom_ena`](#fault_confinement_drv_rom_ena) | 0x614 | 4 | Auto-extracted signal drv_rom_ena from fault_confinement.vhd | +| can_bus.[`fault_confinement_fsm_tx_err_ctr_mt_erp`](#fault_confinement_fsm_tx_err_ctr_mt_erp) | 0x618 | 4 | Auto-extracted signal tx_err_ctr_mt_erp from fault_confinement_fsm.vhd | +| can_bus.[`fault_confinement_fsm_rx_err_ctr_mt_erp`](#fault_confinement_fsm_rx_err_ctr_mt_erp) | 0x61c | 4 | Auto-extracted signal rx_err_ctr_mt_erp from fault_confinement_fsm.vhd | +| can_bus.[`fault_confinement_fsm_tx_err_ctr_mt_ewl`](#fault_confinement_fsm_tx_err_ctr_mt_ewl) | 0x620 | 4 | Auto-extracted signal tx_err_ctr_mt_ewl from fault_confinement_fsm.vhd | +| can_bus.[`fault_confinement_fsm_rx_err_ctr_mt_ewl`](#fault_confinement_fsm_rx_err_ctr_mt_ewl) | 0x624 | 4 | Auto-extracted signal rx_err_ctr_mt_ewl from fault_confinement_fsm.vhd | +| can_bus.[`fault_confinement_fsm_tx_err_ctr_mt_255`](#fault_confinement_fsm_tx_err_ctr_mt_255) | 0x628 | 4 | Auto-extracted signal tx_err_ctr_mt_255 from fault_confinement_fsm.vhd | +| can_bus.[`fault_confinement_fsm_err_warning_limit_d`](#fault_confinement_fsm_err_warning_limit_d) | 0x62c | 4 | Auto-extracted signal err_warning_limit_d from fault_confinement_fsm.vhd | +| can_bus.[`fault_confinement_fsm_err_warning_limit_q`](#fault_confinement_fsm_err_warning_limit_q) | 0x630 | 4 | Auto-extracted signal err_warning_limit_q from fault_confinement_fsm.vhd | +| can_bus.[`fault_confinement_fsm_fc_fsm_res_d`](#fault_confinement_fsm_fc_fsm_res_d) | 0x634 | 4 | Auto-extracted signal fc_fsm_res_d from fault_confinement_fsm.vhd | +| can_bus.[`fault_confinement_fsm_fc_fsm_res_q`](#fault_confinement_fsm_fc_fsm_res_q) | 0x638 | 4 | Auto-extracted signal fc_fsm_res_q from fault_confinement_fsm.vhd | +| can_bus.[`fault_confinement_rules_inc_one_i`](#fault_confinement_rules_inc_one_i) | 0x63c | 4 | Auto-extracted signal inc_one_i from fault_confinement_rules.vhd | +| can_bus.[`fault_confinement_rules_inc_eight_i`](#fault_confinement_rules_inc_eight_i) | 0x640 | 4 | Auto-extracted signal inc_eight_i from fault_confinement_rules.vhd | +| can_bus.[`frame_filters_drv_filter_A_mask`](#frame_filters_drv_filter_a_mask) | 0x644 | 4 | Auto-extracted signal drv_filter_A_mask from frame_filters.vhd | +| can_bus.[`frame_filters_drv_filter_A_ctrl`](#frame_filters_drv_filter_a_ctrl) | 0x648 | 4 | Auto-extracted signal drv_filter_A_ctrl from frame_filters.vhd | +| can_bus.[`frame_filters_drv_filter_A_bits`](#frame_filters_drv_filter_a_bits) | 0x64c | 4 | Auto-extracted signal drv_filter_A_bits from frame_filters.vhd | +| can_bus.[`frame_filters_int_filter_A_valid`](#frame_filters_int_filter_a_valid) | 0x650 | 4 | Auto-extracted signal int_filter_A_valid from frame_filters.vhd | +| can_bus.[`frame_filters_drv_filter_B_mask`](#frame_filters_drv_filter_b_mask) | 0x654 | 4 | Auto-extracted signal drv_filter_B_mask from frame_filters.vhd | +| can_bus.[`frame_filters_drv_filter_B_ctrl`](#frame_filters_drv_filter_b_ctrl) | 0x658 | 4 | Auto-extracted signal drv_filter_B_ctrl from frame_filters.vhd | +| can_bus.[`frame_filters_drv_filter_B_bits`](#frame_filters_drv_filter_b_bits) | 0x65c | 4 | Auto-extracted signal drv_filter_B_bits from frame_filters.vhd | +| can_bus.[`frame_filters_int_filter_B_valid`](#frame_filters_int_filter_b_valid) | 0x660 | 4 | Auto-extracted signal int_filter_B_valid from frame_filters.vhd | +| can_bus.[`frame_filters_drv_filter_C_mask`](#frame_filters_drv_filter_c_mask) | 0x664 | 4 | Auto-extracted signal drv_filter_C_mask from frame_filters.vhd | +| can_bus.[`frame_filters_drv_filter_C_ctrl`](#frame_filters_drv_filter_c_ctrl) | 0x668 | 4 | Auto-extracted signal drv_filter_C_ctrl from frame_filters.vhd | +| can_bus.[`frame_filters_drv_filter_C_bits`](#frame_filters_drv_filter_c_bits) | 0x66c | 4 | Auto-extracted signal drv_filter_C_bits from frame_filters.vhd | +| can_bus.[`frame_filters_int_filter_C_valid`](#frame_filters_int_filter_c_valid) | 0x670 | 4 | Auto-extracted signal int_filter_C_valid from frame_filters.vhd | +| can_bus.[`frame_filters_drv_filter_ran_ctrl`](#frame_filters_drv_filter_ran_ctrl) | 0x674 | 4 | Auto-extracted signal drv_filter_ran_ctrl from frame_filters.vhd | +| can_bus.[`frame_filters_drv_filter_ran_lo_th`](#frame_filters_drv_filter_ran_lo_th) | 0x678 | 4 | Auto-extracted signal drv_filter_ran_lo_th from frame_filters.vhd | +| can_bus.[`frame_filters_drv_filter_ran_hi_th`](#frame_filters_drv_filter_ran_hi_th) | 0x67c | 4 | Auto-extracted signal drv_filter_ran_hi_th from frame_filters.vhd | +| can_bus.[`frame_filters_int_filter_ran_valid`](#frame_filters_int_filter_ran_valid) | 0x680 | 4 | Auto-extracted signal int_filter_ran_valid from frame_filters.vhd | +| can_bus.[`frame_filters_drv_filters_ena`](#frame_filters_drv_filters_ena) | 0x684 | 4 | Auto-extracted signal drv_filters_ena from frame_filters.vhd | +| can_bus.[`frame_filters_int_data_type`](#frame_filters_int_data_type) | 0x688 | 4 | Auto-extracted signal int_data_type from frame_filters.vhd | +| can_bus.[`frame_filters_int_data_ctrl`](#frame_filters_int_data_ctrl) | 0x68c | 4 | Auto-extracted signal int_data_ctrl from frame_filters.vhd | +| can_bus.[`frame_filters_filter_A_enable`](#frame_filters_filter_a_enable) | 0x690 | 4 | Auto-extracted signal filter_A_enable from frame_filters.vhd | +| can_bus.[`frame_filters_filter_B_enable`](#frame_filters_filter_b_enable) | 0x694 | 4 | Auto-extracted signal filter_B_enable from frame_filters.vhd | +| can_bus.[`frame_filters_filter_C_enable`](#frame_filters_filter_c_enable) | 0x698 | 4 | Auto-extracted signal filter_C_enable from frame_filters.vhd | +| can_bus.[`frame_filters_filter_range_enable`](#frame_filters_filter_range_enable) | 0x69c | 4 | Auto-extracted signal filter_range_enable from frame_filters.vhd | +| can_bus.[`frame_filters_filter_result`](#frame_filters_filter_result) | 0x6a0 | 4 | Auto-extracted signal filter_result from frame_filters.vhd | +| can_bus.[`frame_filters_ident_valid_d`](#frame_filters_ident_valid_d) | 0x6a4 | 4 | Auto-extracted signal ident_valid_d from frame_filters.vhd | +| can_bus.[`frame_filters_ident_valid_q`](#frame_filters_ident_valid_q) | 0x6a8 | 4 | Auto-extracted signal ident_valid_q from frame_filters.vhd | +| can_bus.[`frame_filters_drv_drop_remote_frames`](#frame_filters_drv_drop_remote_frames) | 0x6ac | 4 | Auto-extracted signal drv_drop_remote_frames from frame_filters.vhd | +| can_bus.[`frame_filters_drop_rtr_frame`](#frame_filters_drop_rtr_frame) | 0x6b0 | 4 | Auto-extracted signal drop_rtr_frame from frame_filters.vhd | +| can_bus.[`inf_ram_wrapper_int_read_data`](#inf_ram_wrapper_int_read_data) | 0x6b4 | 4 | Auto-extracted signal int_read_data from inf_ram_wrapper.vhd | +| can_bus.[`inf_ram_wrapper_byte_we`](#inf_ram_wrapper_byte_we) | 0x6b8 | 4 | Auto-extracted signal byte_we from inf_ram_wrapper.vhd | +| can_bus.[`int_manager_drv_int_vect_clr`](#int_manager_drv_int_vect_clr) | 0x6bc | 4 | Auto-extracted signal drv_int_vect_clr from int_manager.vhd | +| can_bus.[`int_manager_drv_int_ena_set`](#int_manager_drv_int_ena_set) | 0x6c0 | 4 | Auto-extracted signal drv_int_ena_set from int_manager.vhd | +| can_bus.[`int_manager_drv_int_ena_clr`](#int_manager_drv_int_ena_clr) | 0x6c4 | 4 | Auto-extracted signal drv_int_ena_clr from int_manager.vhd | +| can_bus.[`int_manager_drv_int_mask_set`](#int_manager_drv_int_mask_set) | 0x6c8 | 4 | Auto-extracted signal drv_int_mask_set from int_manager.vhd | +| can_bus.[`int_manager_drv_int_mask_clr`](#int_manager_drv_int_mask_clr) | 0x6cc | 4 | Auto-extracted signal drv_int_mask_clr from int_manager.vhd | +| can_bus.[`int_manager_int_ena_i`](#int_manager_int_ena_i) | 0x6d0 | 4 | Auto-extracted signal int_ena_i from int_manager.vhd | +| can_bus.[`int_manager_int_mask_i`](#int_manager_int_mask_i) | 0x6d4 | 4 | Auto-extracted signal int_mask_i from int_manager.vhd | +| can_bus.[`int_manager_int_vect_i`](#int_manager_int_vect_i) | 0x6d8 | 4 | Auto-extracted signal int_vect_i from int_manager.vhd | +| can_bus.[`int_manager_int_input_active`](#int_manager_int_input_active) | 0x6dc | 4 | Auto-extracted signal int_input_active from int_manager.vhd | +| can_bus.[`int_manager_int_i`](#int_manager_int_i) | 0x6e0 | 4 | Auto-extracted signal int_i from int_manager.vhd | +| can_bus.[`int_module_int_mask_i`](#int_module_int_mask_i) | 0x6e4 | 4 | Auto-extracted signal int_mask_i from int_module.vhd | +| can_bus.[`int_module_int_ena_i`](#int_module_int_ena_i) | 0x6e8 | 4 | Auto-extracted signal int_ena_i from int_module.vhd | +| can_bus.[`int_module_int_mask_load`](#int_module_int_mask_load) | 0x6ec | 4 | Auto-extracted signal int_mask_load from int_module.vhd | +| can_bus.[`int_module_int_mask_next`](#int_module_int_mask_next) | 0x6f0 | 4 | Auto-extracted signal int_mask_next from int_module.vhd | +| can_bus.[`memory_reg_reg_value_r`](#memory_reg_reg_value_r) | 0x6f4 | 4 | Auto-extracted signal reg_value_r from memory_reg.vhd | +| can_bus.[`memory_reg_wr_select`](#memory_reg_wr_select) | 0x6f8 | 4 | Auto-extracted signal wr_select from memory_reg.vhd | +| can_bus.[`memory_reg_wr_select_expanded`](#memory_reg_wr_select_expanded) | 0x6fc | 4 | Auto-extracted signal wr_select_expanded from memory_reg.vhd | +| can_bus.[`memory_registers_status_comb`](#memory_registers_status_comb) | 0x700 | 4 | Auto-extracted signal status_comb from memory_registers.vhd | +| can_bus.[`memory_registers_can_core_cs`](#memory_registers_can_core_cs) | 0x704 | 4 | Auto-extracted signal can_core_cs from memory_registers.vhd | +| can_bus.[`memory_registers_control_registers_cs`](#memory_registers_control_registers_cs) | 0x708 | 4 | Auto-extracted signal control_registers_cs from memory_registers.vhd | +| can_bus.[`memory_registers_control_registers_cs_reg`](#memory_registers_control_registers_cs_reg) | 0x70c | 4 | Auto-extracted signal control_registers_cs_reg from memory_registers.vhd | +| can_bus.[`memory_registers_test_registers_cs`](#memory_registers_test_registers_cs) | 0x710 | 4 | Auto-extracted signal test_registers_cs from memory_registers.vhd | +| can_bus.[`memory_registers_test_registers_cs_reg`](#memory_registers_test_registers_cs_reg) | 0x714 | 4 | Auto-extracted signal test_registers_cs_reg from memory_registers.vhd | +| can_bus.[`memory_registers_control_registers_rdata`](#memory_registers_control_registers_rdata) | 0x718 | 4 | Auto-extracted signal control_registers_rdata from memory_registers.vhd | +| can_bus.[`memory_registers_test_registers_rdata`](#memory_registers_test_registers_rdata) | 0x71c | 4 | Auto-extracted signal test_registers_rdata from memory_registers.vhd | +| can_bus.[`memory_registers_is_err_active`](#memory_registers_is_err_active) | 0x720 | 4 | Auto-extracted signal is_err_active from memory_registers.vhd | +| can_bus.[`memory_registers_is_err_passive`](#memory_registers_is_err_passive) | 0x724 | 4 | Auto-extracted signal is_err_passive from memory_registers.vhd | +| can_bus.[`memory_registers_is_bus_off`](#memory_registers_is_bus_off) | 0x728 | 4 | Auto-extracted signal is_bus_off from memory_registers.vhd | +| can_bus.[`memory_registers_is_transmitter`](#memory_registers_is_transmitter) | 0x72c | 4 | Auto-extracted signal is_transmitter from memory_registers.vhd | +| can_bus.[`memory_registers_is_receiver`](#memory_registers_is_receiver) | 0x730 | 4 | Auto-extracted signal is_receiver from memory_registers.vhd | +| can_bus.[`memory_registers_is_idle`](#memory_registers_is_idle) | 0x734 | 4 | Auto-extracted signal is_idle from memory_registers.vhd | +| can_bus.[`memory_registers_reg_lock_1_active`](#memory_registers_reg_lock_1_active) | 0x738 | 4 | Auto-extracted signal reg_lock_1_active from memory_registers.vhd | +| can_bus.[`memory_registers_reg_lock_2_active`](#memory_registers_reg_lock_2_active) | 0x73c | 4 | Auto-extracted signal reg_lock_2_active from memory_registers.vhd | +| can_bus.[`memory_registers_soft_res_q_n`](#memory_registers_soft_res_q_n) | 0x740 | 4 | Auto-extracted signal soft_res_q_n from memory_registers.vhd | +| can_bus.[`memory_registers_ewl_padded`](#memory_registers_ewl_padded) | 0x744 | 4 | Auto-extracted signal ewl_padded from memory_registers.vhd | +| can_bus.[`memory_registers_control_regs_clk_en`](#memory_registers_control_regs_clk_en) | 0x748 | 4 | Auto-extracted signal control_regs_clk_en from memory_registers.vhd | +| can_bus.[`memory_registers_test_regs_clk_en`](#memory_registers_test_regs_clk_en) | 0x74c | 4 | Auto-extracted signal test_regs_clk_en from memory_registers.vhd | +| can_bus.[`memory_registers_clk_control_regs`](#memory_registers_clk_control_regs) | 0x750 | 4 | Auto-extracted signal clk_control_regs from memory_registers.vhd | +| can_bus.[`memory_registers_clk_test_regs`](#memory_registers_clk_test_regs) | 0x754 | 4 | Auto-extracted signal clk_test_regs from memory_registers.vhd | +| can_bus.[`memory_registers_rx_buf_mode`](#memory_registers_rx_buf_mode) | 0x758 | 4 | Auto-extracted signal rx_buf_mode from memory_registers.vhd | +| can_bus.[`memory_registers_rx_move_cmd`](#memory_registers_rx_move_cmd) | 0x75c | 4 | Auto-extracted signal rx_move_cmd from memory_registers.vhd | +| can_bus.[`memory_registers_ctr_pres_sel_q`](#memory_registers_ctr_pres_sel_q) | 0x760 | 4 | Auto-extracted signal ctr_pres_sel_q from memory_registers.vhd | +| can_bus.[`operation_control_drv_ena`](#operation_control_drv_ena) | 0x764 | 4 | Auto-extracted signal drv_ena from operation_control.vhd | +| can_bus.[`operation_control_go_to_off`](#operation_control_go_to_off) | 0x768 | 4 | Auto-extracted signal go_to_off from operation_control.vhd | +| can_bus.[`prescaler_drv_ena`](#prescaler_drv_ena) | 0x76c | 4 | Auto-extracted signal drv_ena from prescaler.vhd | +| can_bus.[`prescaler_tseg1_nbt`](#prescaler_tseg1_nbt) | 0x770 | 4 | Auto-extracted signal tseg1_nbt from prescaler.vhd | +| can_bus.[`prescaler_tseg2_nbt`](#prescaler_tseg2_nbt) | 0x774 | 4 | Auto-extracted signal tseg2_nbt from prescaler.vhd | +| can_bus.[`prescaler_brp_nbt`](#prescaler_brp_nbt) | 0x778 | 4 | Auto-extracted signal brp_nbt from prescaler.vhd | +| can_bus.[`prescaler_sjw_nbt`](#prescaler_sjw_nbt) | 0x77c | 4 | Auto-extracted signal sjw_nbt from prescaler.vhd | +| can_bus.[`prescaler_tseg1_dbt`](#prescaler_tseg1_dbt) | 0x780 | 4 | Auto-extracted signal tseg1_dbt from prescaler.vhd | +| can_bus.[`prescaler_tseg2_dbt`](#prescaler_tseg2_dbt) | 0x784 | 4 | Auto-extracted signal tseg2_dbt from prescaler.vhd | +| can_bus.[`prescaler_brp_dbt`](#prescaler_brp_dbt) | 0x788 | 4 | Auto-extracted signal brp_dbt from prescaler.vhd | +| can_bus.[`prescaler_sjw_dbt`](#prescaler_sjw_dbt) | 0x78c | 4 | Auto-extracted signal sjw_dbt from prescaler.vhd | +| can_bus.[`prescaler_segment_end`](#prescaler_segment_end) | 0x790 | 4 | Auto-extracted signal segment_end from prescaler.vhd | +| can_bus.[`prescaler_h_sync_valid`](#prescaler_h_sync_valid) | 0x794 | 4 | Auto-extracted signal h_sync_valid from prescaler.vhd | +| can_bus.[`prescaler_is_tseg1`](#prescaler_is_tseg1) | 0x798 | 4 | Auto-extracted signal is_tseg1 from prescaler.vhd | +| can_bus.[`prescaler_is_tseg2`](#prescaler_is_tseg2) | 0x79c | 4 | Auto-extracted signal is_tseg2 from prescaler.vhd | +| can_bus.[`prescaler_resync_edge_valid`](#prescaler_resync_edge_valid) | 0x7a0 | 4 | Auto-extracted signal resync_edge_valid from prescaler.vhd | +| can_bus.[`prescaler_h_sync_edge_valid`](#prescaler_h_sync_edge_valid) | 0x7a4 | 4 | Auto-extracted signal h_sync_edge_valid from prescaler.vhd | +| can_bus.[`prescaler_segm_counter_nbt`](#prescaler_segm_counter_nbt) | 0x7a8 | 4 | Auto-extracted signal segm_counter_nbt from prescaler.vhd | +| can_bus.[`prescaler_segm_counter_dbt`](#prescaler_segm_counter_dbt) | 0x7ac | 4 | Auto-extracted signal segm_counter_dbt from prescaler.vhd | +| can_bus.[`prescaler_exit_segm_req_nbt`](#prescaler_exit_segm_req_nbt) | 0x7b0 | 4 | Auto-extracted signal exit_segm_req_nbt from prescaler.vhd | +| can_bus.[`prescaler_exit_segm_req_dbt`](#prescaler_exit_segm_req_dbt) | 0x7b4 | 4 | Auto-extracted signal exit_segm_req_dbt from prescaler.vhd | +| can_bus.[`prescaler_tq_edge_nbt`](#prescaler_tq_edge_nbt) | 0x7b8 | 4 | Auto-extracted signal tq_edge_nbt from prescaler.vhd | +| can_bus.[`prescaler_tq_edge_dbt`](#prescaler_tq_edge_dbt) | 0x7bc | 4 | Auto-extracted signal tq_edge_dbt from prescaler.vhd | +| can_bus.[`prescaler_rx_trig_req`](#prescaler_rx_trig_req) | 0x7c0 | 4 | Auto-extracted signal rx_trig_req from prescaler.vhd | +| can_bus.[`prescaler_tx_trig_req`](#prescaler_tx_trig_req) | 0x7c4 | 4 | Auto-extracted signal tx_trig_req from prescaler.vhd | +| can_bus.[`prescaler_start_edge`](#prescaler_start_edge) | 0x7c8 | 4 | Auto-extracted signal start_edge from prescaler.vhd | +| can_bus.[`prescaler_bt_ctr_clear`](#prescaler_bt_ctr_clear) | 0x7cc | 4 | Auto-extracted signal bt_ctr_clear from prescaler.vhd | +| can_bus.[`priority_decoder_l0_valid`](#priority_decoder_l0_valid) | 0x7d0 | 4 | Auto-extracted signal l0_valid from priority_decoder.vhd | +| can_bus.[`priority_decoder_l1_valid`](#priority_decoder_l1_valid) | 0x7d4 | 4 | Auto-extracted signal l1_valid from priority_decoder.vhd | +| can_bus.[`priority_decoder_l1_winner`](#priority_decoder_l1_winner) | 0x7d8 | 4 | Auto-extracted signal l1_winner from priority_decoder.vhd | +| can_bus.[`priority_decoder_l2_valid`](#priority_decoder_l2_valid) | 0x7dc | 4 | Auto-extracted signal l2_valid from priority_decoder.vhd | +| can_bus.[`priority_decoder_l2_winner`](#priority_decoder_l2_winner) | 0x7e0 | 4 | Auto-extracted signal l2_winner from priority_decoder.vhd | +| can_bus.[`priority_decoder_l3_valid`](#priority_decoder_l3_valid) | 0x7e4 | 4 | Auto-extracted signal l3_valid from priority_decoder.vhd | +| can_bus.[`priority_decoder_l3_winner`](#priority_decoder_l3_winner) | 0x7e8 | 4 | Auto-extracted signal l3_winner from priority_decoder.vhd | +| can_bus.[`protocol_control_drv_can_fd_ena`](#protocol_control_drv_can_fd_ena) | 0x7ec | 4 | Auto-extracted signal drv_can_fd_ena from protocol_control.vhd | +| can_bus.[`protocol_control_drv_bus_mon_ena`](#protocol_control_drv_bus_mon_ena) | 0x7f0 | 4 | Auto-extracted signal drv_bus_mon_ena from protocol_control.vhd | +| can_bus.[`protocol_control_drv_retr_lim_ena`](#protocol_control_drv_retr_lim_ena) | 0x7f4 | 4 | Auto-extracted signal drv_retr_lim_ena from protocol_control.vhd | +| can_bus.[`protocol_control_drv_retr_th`](#protocol_control_drv_retr_th) | 0x7f8 | 4 | Auto-extracted signal drv_retr_th from protocol_control.vhd | +| can_bus.[`protocol_control_drv_self_test_ena`](#protocol_control_drv_self_test_ena) | 0x7fc | 4 | Auto-extracted signal drv_self_test_ena from protocol_control.vhd | +| can_bus.[`protocol_control_drv_ack_forb`](#protocol_control_drv_ack_forb) | 0x800 | 4 | Auto-extracted signal drv_ack_forb from protocol_control.vhd | +| can_bus.[`protocol_control_drv_ena`](#protocol_control_drv_ena) | 0x804 | 4 | Auto-extracted signal drv_ena from protocol_control.vhd | +| can_bus.[`protocol_control_drv_fd_type`](#protocol_control_drv_fd_type) | 0x808 | 4 | Auto-extracted signal drv_fd_type from protocol_control.vhd | +| can_bus.[`protocol_control_drv_int_loopback_ena`](#protocol_control_drv_int_loopback_ena) | 0x80c | 4 | Auto-extracted signal drv_int_loopback_ena from protocol_control.vhd | +| can_bus.[`protocol_control_drv_bus_off_reset`](#protocol_control_drv_bus_off_reset) | 0x810 | 4 | Auto-extracted signal drv_bus_off_reset from protocol_control.vhd | +| can_bus.[`protocol_control_drv_ssp_delay_select`](#protocol_control_drv_ssp_delay_select) | 0x814 | 4 | Auto-extracted signal drv_ssp_delay_select from protocol_control.vhd | +| can_bus.[`protocol_control_drv_pex`](#protocol_control_drv_pex) | 0x818 | 4 | Auto-extracted signal drv_pex from protocol_control.vhd | +| can_bus.[`protocol_control_drv_cpexs`](#protocol_control_drv_cpexs) | 0x81c | 4 | Auto-extracted signal drv_cpexs from protocol_control.vhd | +| can_bus.[`protocol_control_tran_word_swapped`](#protocol_control_tran_word_swapped) | 0x820 | 4 | Auto-extracted signal tran_word_swapped from protocol_control.vhd | +| can_bus.[`protocol_control_err_frm_req`](#protocol_control_err_frm_req) | 0x824 | 4 | Auto-extracted signal err_frm_req from protocol_control.vhd | +| can_bus.[`protocol_control_tx_load_base_id`](#protocol_control_tx_load_base_id) | 0x828 | 4 | Auto-extracted signal tx_load_base_id from protocol_control.vhd | +| can_bus.[`protocol_control_tx_load_ext_id`](#protocol_control_tx_load_ext_id) | 0x82c | 4 | Auto-extracted signal tx_load_ext_id from protocol_control.vhd | +| can_bus.[`protocol_control_tx_load_dlc`](#protocol_control_tx_load_dlc) | 0x830 | 4 | Auto-extracted signal tx_load_dlc from protocol_control.vhd | +| can_bus.[`protocol_control_tx_load_data_word`](#protocol_control_tx_load_data_word) | 0x834 | 4 | Auto-extracted signal tx_load_data_word from protocol_control.vhd | +| can_bus.[`protocol_control_tx_load_stuff_count`](#protocol_control_tx_load_stuff_count) | 0x838 | 4 | Auto-extracted signal tx_load_stuff_count from protocol_control.vhd | +| can_bus.[`protocol_control_tx_load_crc`](#protocol_control_tx_load_crc) | 0x83c | 4 | Auto-extracted signal tx_load_crc from protocol_control.vhd | +| can_bus.[`protocol_control_tx_shift_ena`](#protocol_control_tx_shift_ena) | 0x840 | 4 | Auto-extracted signal tx_shift_ena from protocol_control.vhd | +| can_bus.[`protocol_control_tx_dominant`](#protocol_control_tx_dominant) | 0x844 | 4 | Auto-extracted signal tx_dominant from protocol_control.vhd | +| can_bus.[`protocol_control_rx_clear`](#protocol_control_rx_clear) | 0x848 | 4 | Auto-extracted signal rx_clear from protocol_control.vhd | +| can_bus.[`protocol_control_rx_store_base_id`](#protocol_control_rx_store_base_id) | 0x84c | 4 | Auto-extracted signal rx_store_base_id from protocol_control.vhd | +| can_bus.[`protocol_control_rx_store_ext_id`](#protocol_control_rx_store_ext_id) | 0x850 | 4 | Auto-extracted signal rx_store_ext_id from protocol_control.vhd | +| can_bus.[`protocol_control_rx_store_ide`](#protocol_control_rx_store_ide) | 0x854 | 4 | Auto-extracted signal rx_store_ide from protocol_control.vhd | +| can_bus.[`protocol_control_rx_store_rtr`](#protocol_control_rx_store_rtr) | 0x858 | 4 | Auto-extracted signal rx_store_rtr from protocol_control.vhd | +| can_bus.[`protocol_control_rx_store_edl`](#protocol_control_rx_store_edl) | 0x85c | 4 | Auto-extracted signal rx_store_edl from protocol_control.vhd | +| can_bus.[`protocol_control_rx_store_dlc`](#protocol_control_rx_store_dlc) | 0x860 | 4 | Auto-extracted signal rx_store_dlc from protocol_control.vhd | +| can_bus.[`protocol_control_rx_store_esi`](#protocol_control_rx_store_esi) | 0x864 | 4 | Auto-extracted signal rx_store_esi from protocol_control.vhd | +| can_bus.[`protocol_control_rx_store_brs`](#protocol_control_rx_store_brs) | 0x868 | 4 | Auto-extracted signal rx_store_brs from protocol_control.vhd | +| can_bus.[`protocol_control_rx_store_stuff_count`](#protocol_control_rx_store_stuff_count) | 0x86c | 4 | Auto-extracted signal rx_store_stuff_count from protocol_control.vhd | +| can_bus.[`protocol_control_rx_shift_ena`](#protocol_control_rx_shift_ena) | 0x870 | 4 | Auto-extracted signal rx_shift_ena from protocol_control.vhd | +| can_bus.[`protocol_control_rx_shift_in_sel`](#protocol_control_rx_shift_in_sel) | 0x874 | 4 | Auto-extracted signal rx_shift_in_sel from protocol_control.vhd | +| can_bus.[`protocol_control_rec_is_rtr_i`](#protocol_control_rec_is_rtr_i) | 0x878 | 4 | Auto-extracted signal rec_is_rtr_i from protocol_control.vhd | +| can_bus.[`protocol_control_rec_dlc_d`](#protocol_control_rec_dlc_d) | 0x87c | 4 | Auto-extracted signal rec_dlc_d from protocol_control.vhd | +| can_bus.[`protocol_control_rec_dlc_q`](#protocol_control_rec_dlc_q) | 0x880 | 4 | Auto-extracted signal rec_dlc_q from protocol_control.vhd | +| can_bus.[`protocol_control_rec_frame_type_i`](#protocol_control_rec_frame_type_i) | 0x884 | 4 | Auto-extracted signal rec_frame_type_i from protocol_control.vhd | +| can_bus.[`protocol_control_ctrl_ctr_pload`](#protocol_control_ctrl_ctr_pload) | 0x888 | 4 | Auto-extracted signal ctrl_ctr_pload from protocol_control.vhd | +| can_bus.[`protocol_control_ctrl_ctr_pload_val`](#protocol_control_ctrl_ctr_pload_val) | 0x88c | 4 | Auto-extracted signal ctrl_ctr_pload_val from protocol_control.vhd | +| can_bus.[`protocol_control_ctrl_ctr_ena`](#protocol_control_ctrl_ctr_ena) | 0x890 | 4 | Auto-extracted signal ctrl_ctr_ena from protocol_control.vhd | +| can_bus.[`protocol_control_ctrl_ctr_zero`](#protocol_control_ctrl_ctr_zero) | 0x894 | 4 | Auto-extracted signal ctrl_ctr_zero from protocol_control.vhd | +| can_bus.[`protocol_control_ctrl_ctr_one`](#protocol_control_ctrl_ctr_one) | 0x898 | 4 | Auto-extracted signal ctrl_ctr_one from protocol_control.vhd | +| can_bus.[`protocol_control_ctrl_counted_byte`](#protocol_control_ctrl_counted_byte) | 0x89c | 4 | Auto-extracted signal ctrl_counted_byte from protocol_control.vhd | +| can_bus.[`protocol_control_ctrl_counted_byte_index`](#protocol_control_ctrl_counted_byte_index) | 0x8a0 | 4 | Auto-extracted signal ctrl_counted_byte_index from protocol_control.vhd | +| can_bus.[`protocol_control_ctrl_ctr_mem_index`](#protocol_control_ctrl_ctr_mem_index) | 0x8a4 | 4 | Auto-extracted signal ctrl_ctr_mem_index from protocol_control.vhd | +| can_bus.[`protocol_control_compl_ctr_ena`](#protocol_control_compl_ctr_ena) | 0x8a8 | 4 | Auto-extracted signal compl_ctr_ena from protocol_control.vhd | +| can_bus.[`protocol_control_reinteg_ctr_clr`](#protocol_control_reinteg_ctr_clr) | 0x8ac | 4 | Auto-extracted signal reinteg_ctr_clr from protocol_control.vhd | +| can_bus.[`protocol_control_reinteg_ctr_enable`](#protocol_control_reinteg_ctr_enable) | 0x8b0 | 4 | Auto-extracted signal reinteg_ctr_enable from protocol_control.vhd | +| can_bus.[`protocol_control_reinteg_ctr_expired`](#protocol_control_reinteg_ctr_expired) | 0x8b4 | 4 | Auto-extracted signal reinteg_ctr_expired from protocol_control.vhd | +| can_bus.[`protocol_control_retr_ctr_clear`](#protocol_control_retr_ctr_clear) | 0x8b8 | 4 | Auto-extracted signal retr_ctr_clear from protocol_control.vhd | +| can_bus.[`protocol_control_retr_ctr_add`](#protocol_control_retr_ctr_add) | 0x8bc | 4 | Auto-extracted signal retr_ctr_add from protocol_control.vhd | +| can_bus.[`protocol_control_retr_limit_reached`](#protocol_control_retr_limit_reached) | 0x8c0 | 4 | Auto-extracted signal retr_limit_reached from protocol_control.vhd | +| can_bus.[`protocol_control_form_err_i`](#protocol_control_form_err_i) | 0x8c4 | 4 | Auto-extracted signal form_err_i from protocol_control.vhd | +| can_bus.[`protocol_control_ack_err_i`](#protocol_control_ack_err_i) | 0x8c8 | 4 | Auto-extracted signal ack_err_i from protocol_control.vhd | +| can_bus.[`protocol_control_crc_check`](#protocol_control_crc_check) | 0x8cc | 4 | Auto-extracted signal crc_check from protocol_control.vhd | +| can_bus.[`protocol_control_bit_err_arb`](#protocol_control_bit_err_arb) | 0x8d0 | 4 | Auto-extracted signal bit_err_arb from protocol_control.vhd | +| can_bus.[`protocol_control_crc_match`](#protocol_control_crc_match) | 0x8d4 | 4 | Auto-extracted signal crc_match from protocol_control.vhd | +| can_bus.[`protocol_control_crc_err_i`](#protocol_control_crc_err_i) | 0x8d8 | 4 | Auto-extracted signal crc_err_i from protocol_control.vhd | +| can_bus.[`protocol_control_crc_clear_match_flag`](#protocol_control_crc_clear_match_flag) | 0x8dc | 4 | Auto-extracted signal crc_clear_match_flag from protocol_control.vhd | +| can_bus.[`protocol_control_crc_src`](#protocol_control_crc_src) | 0x8e0 | 4 | Auto-extracted signal crc_src from protocol_control.vhd | +| can_bus.[`protocol_control_err_pos`](#protocol_control_err_pos) | 0x8e4 | 4 | Auto-extracted signal err_pos from protocol_control.vhd | +| can_bus.[`protocol_control_is_arbitration_i`](#protocol_control_is_arbitration_i) | 0x8e8 | 4 | Auto-extracted signal is_arbitration_i from protocol_control.vhd | +| can_bus.[`protocol_control_bit_err_enable`](#protocol_control_bit_err_enable) | 0x8ec | 4 | Auto-extracted signal bit_err_enable from protocol_control.vhd | +| can_bus.[`protocol_control_tx_data_nbs_i`](#protocol_control_tx_data_nbs_i) | 0x8f0 | 4 | Auto-extracted signal tx_data_nbs_i from protocol_control.vhd | +| can_bus.[`protocol_control_rx_crc`](#protocol_control_rx_crc) | 0x8f4 | 4 | Auto-extracted signal rx_crc from protocol_control.vhd | +| can_bus.[`protocol_control_rx_stuff_count`](#protocol_control_rx_stuff_count) | 0x8f8 | 4 | Auto-extracted signal rx_stuff_count from protocol_control.vhd | +| can_bus.[`protocol_control_fixed_stuff_i`](#protocol_control_fixed_stuff_i) | 0x8fc | 4 | Auto-extracted signal fixed_stuff_i from protocol_control.vhd | +| can_bus.[`protocol_control_arbitration_lost_i`](#protocol_control_arbitration_lost_i) | 0x900 | 4 | Auto-extracted signal arbitration_lost_i from protocol_control.vhd | +| can_bus.[`protocol_control_alc_id_field`](#protocol_control_alc_id_field) | 0x904 | 4 | Auto-extracted signal alc_id_field from protocol_control.vhd | +| can_bus.[`protocol_control_drv_rom_ena`](#protocol_control_drv_rom_ena) | 0x908 | 4 | Auto-extracted signal drv_rom_ena from protocol_control.vhd | +| can_bus.[`protocol_control_fsm_state_reg_ce`](#protocol_control_fsm_state_reg_ce) | 0x90c | 4 | Auto-extracted signal state_reg_ce from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_no_data_transmitter`](#protocol_control_fsm_no_data_transmitter) | 0x910 | 4 | Auto-extracted signal no_data_transmitter from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_no_data_receiver`](#protocol_control_fsm_no_data_receiver) | 0x914 | 4 | Auto-extracted signal no_data_receiver from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_no_data_field`](#protocol_control_fsm_no_data_field) | 0x918 | 4 | Auto-extracted signal no_data_field from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_ctrl_ctr_pload_i`](#protocol_control_fsm_ctrl_ctr_pload_i) | 0x91c | 4 | Auto-extracted signal ctrl_ctr_pload_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_ctrl_ctr_pload_unaliged`](#protocol_control_fsm_ctrl_ctr_pload_unaliged) | 0x920 | 4 | Auto-extracted signal ctrl_ctr_pload_unaliged from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_crc_use_21`](#protocol_control_fsm_crc_use_21) | 0x924 | 4 | Auto-extracted signal crc_use_21 from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_crc_use_17`](#protocol_control_fsm_crc_use_17) | 0x928 | 4 | Auto-extracted signal crc_use_17 from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_crc_src_i`](#protocol_control_fsm_crc_src_i) | 0x92c | 4 | Auto-extracted signal crc_src_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_crc_length_i`](#protocol_control_fsm_crc_length_i) | 0x930 | 4 | Auto-extracted signal crc_length_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_tran_data_length`](#protocol_control_fsm_tran_data_length) | 0x934 | 4 | Auto-extracted signal tran_data_length from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rec_data_length`](#protocol_control_fsm_rec_data_length) | 0x938 | 4 | Auto-extracted signal rec_data_length from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rec_data_length_c`](#protocol_control_fsm_rec_data_length_c) | 0x93c | 4 | Auto-extracted signal rec_data_length_c from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_data_length_c`](#protocol_control_fsm_data_length_c) | 0x940 | 4 | Auto-extracted signal data_length_c from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_data_length_shifted_c`](#protocol_control_fsm_data_length_shifted_c) | 0x944 | 4 | Auto-extracted signal data_length_shifted_c from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_data_length_bits_c`](#protocol_control_fsm_data_length_bits_c) | 0x948 | 4 | Auto-extracted signal data_length_bits_c from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_is_fd_frame`](#protocol_control_fsm_is_fd_frame) | 0x94c | 4 | Auto-extracted signal is_fd_frame from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_frame_start`](#protocol_control_fsm_frame_start) | 0x950 | 4 | Auto-extracted signal frame_start from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_tx_frame_ready`](#protocol_control_fsm_tx_frame_ready) | 0x954 | 4 | Auto-extracted signal tx_frame_ready from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_ide_is_arbitration`](#protocol_control_fsm_ide_is_arbitration) | 0x958 | 4 | Auto-extracted signal ide_is_arbitration from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_arbitration_lost_condition`](#protocol_control_fsm_arbitration_lost_condition) | 0x95c | 4 | Auto-extracted signal arbitration_lost_condition from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_arbitration_lost_i`](#protocol_control_fsm_arbitration_lost_i) | 0x960 | 4 | Auto-extracted signal arbitration_lost_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_tx_failed`](#protocol_control_fsm_tx_failed) | 0x964 | 4 | Auto-extracted signal tx_failed from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_store_metadata_d`](#protocol_control_fsm_store_metadata_d) | 0x968 | 4 | Auto-extracted signal store_metadata_d from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_store_data_d`](#protocol_control_fsm_store_data_d) | 0x96c | 4 | Auto-extracted signal store_data_d from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rec_valid_d`](#protocol_control_fsm_rec_valid_d) | 0x970 | 4 | Auto-extracted signal rec_valid_d from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rec_abort_d`](#protocol_control_fsm_rec_abort_d) | 0x974 | 4 | Auto-extracted signal rec_abort_d from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_go_to_suspend`](#protocol_control_fsm_go_to_suspend) | 0x978 | 4 | Auto-extracted signal go_to_suspend from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_go_to_stuff_count`](#protocol_control_fsm_go_to_stuff_count) | 0x97c | 4 | Auto-extracted signal go_to_stuff_count from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rx_store_base_id_i`](#protocol_control_fsm_rx_store_base_id_i) | 0x980 | 4 | Auto-extracted signal rx_store_base_id_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rx_store_ext_id_i`](#protocol_control_fsm_rx_store_ext_id_i) | 0x984 | 4 | Auto-extracted signal rx_store_ext_id_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rx_store_ide_i`](#protocol_control_fsm_rx_store_ide_i) | 0x988 | 4 | Auto-extracted signal rx_store_ide_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rx_store_rtr_i`](#protocol_control_fsm_rx_store_rtr_i) | 0x98c | 4 | Auto-extracted signal rx_store_rtr_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rx_store_edl_i`](#protocol_control_fsm_rx_store_edl_i) | 0x990 | 4 | Auto-extracted signal rx_store_edl_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rx_store_dlc_i`](#protocol_control_fsm_rx_store_dlc_i) | 0x994 | 4 | Auto-extracted signal rx_store_dlc_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rx_store_esi_i`](#protocol_control_fsm_rx_store_esi_i) | 0x998 | 4 | Auto-extracted signal rx_store_esi_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rx_store_brs_i`](#protocol_control_fsm_rx_store_brs_i) | 0x99c | 4 | Auto-extracted signal rx_store_brs_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rx_store_stuff_count_i`](#protocol_control_fsm_rx_store_stuff_count_i) | 0x9a0 | 4 | Auto-extracted signal rx_store_stuff_count_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rx_clear_i`](#protocol_control_fsm_rx_clear_i) | 0x9a4 | 4 | Auto-extracted signal rx_clear_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_tx_load_base_id_i`](#protocol_control_fsm_tx_load_base_id_i) | 0x9a8 | 4 | Auto-extracted signal tx_load_base_id_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_tx_load_ext_id_i`](#protocol_control_fsm_tx_load_ext_id_i) | 0x9ac | 4 | Auto-extracted signal tx_load_ext_id_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_tx_load_dlc_i`](#protocol_control_fsm_tx_load_dlc_i) | 0x9b0 | 4 | Auto-extracted signal tx_load_dlc_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_tx_load_data_word_i`](#protocol_control_fsm_tx_load_data_word_i) | 0x9b4 | 4 | Auto-extracted signal tx_load_data_word_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_tx_load_stuff_count_i`](#protocol_control_fsm_tx_load_stuff_count_i) | 0x9b8 | 4 | Auto-extracted signal tx_load_stuff_count_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_tx_load_crc_i`](#protocol_control_fsm_tx_load_crc_i) | 0x9bc | 4 | Auto-extracted signal tx_load_crc_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_tx_shift_ena_i`](#protocol_control_fsm_tx_shift_ena_i) | 0x9c0 | 4 | Auto-extracted signal tx_shift_ena_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_form_err_i`](#protocol_control_fsm_form_err_i) | 0x9c4 | 4 | Auto-extracted signal form_err_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_ack_err_i`](#protocol_control_fsm_ack_err_i) | 0x9c8 | 4 | Auto-extracted signal ack_err_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_ack_err_flag`](#protocol_control_fsm_ack_err_flag) | 0x9cc | 4 | Auto-extracted signal ack_err_flag from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_ack_err_flag_clr`](#protocol_control_fsm_ack_err_flag_clr) | 0x9d0 | 4 | Auto-extracted signal ack_err_flag_clr from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_crc_err_i`](#protocol_control_fsm_crc_err_i) | 0x9d4 | 4 | Auto-extracted signal crc_err_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_bit_err_arb_i`](#protocol_control_fsm_bit_err_arb_i) | 0x9d8 | 4 | Auto-extracted signal bit_err_arb_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_sp_control_switch_data`](#protocol_control_fsm_sp_control_switch_data) | 0x9dc | 4 | Auto-extracted signal sp_control_switch_data from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_sp_control_switch_nominal`](#protocol_control_fsm_sp_control_switch_nominal) | 0x9e0 | 4 | Auto-extracted signal sp_control_switch_nominal from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_switch_to_ssp`](#protocol_control_fsm_switch_to_ssp) | 0x9e4 | 4 | Auto-extracted signal switch_to_ssp from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_sp_control_ce`](#protocol_control_fsm_sp_control_ce) | 0x9e8 | 4 | Auto-extracted signal sp_control_ce from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_sp_control_d`](#protocol_control_fsm_sp_control_d) | 0x9ec | 4 | Auto-extracted signal sp_control_d from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_sp_control_q_i`](#protocol_control_fsm_sp_control_q_i) | 0x9f0 | 4 | Auto-extracted signal sp_control_q_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_ssp_reset_i`](#protocol_control_fsm_ssp_reset_i) | 0x9f4 | 4 | Auto-extracted signal ssp_reset_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_sync_control_d`](#protocol_control_fsm_sync_control_d) | 0x9f8 | 4 | Auto-extracted signal sync_control_d from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_sync_control_q`](#protocol_control_fsm_sync_control_q) | 0x9fc | 4 | Auto-extracted signal sync_control_q from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_perform_hsync`](#protocol_control_fsm_perform_hsync) | 0xa00 | 4 | Auto-extracted signal perform_hsync from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_primary_err_i`](#protocol_control_fsm_primary_err_i) | 0xa04 | 4 | Auto-extracted signal primary_err_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_err_delim_late_i`](#protocol_control_fsm_err_delim_late_i) | 0xa08 | 4 | Auto-extracted signal err_delim_late_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_set_err_active_i`](#protocol_control_fsm_set_err_active_i) | 0xa0c | 4 | Auto-extracted signal set_err_active_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_set_transmitter_i`](#protocol_control_fsm_set_transmitter_i) | 0xa10 | 4 | Auto-extracted signal set_transmitter_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_set_receiver_i`](#protocol_control_fsm_set_receiver_i) | 0xa14 | 4 | Auto-extracted signal set_receiver_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_set_idle_i`](#protocol_control_fsm_set_idle_i) | 0xa18 | 4 | Auto-extracted signal set_idle_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_first_err_delim_d`](#protocol_control_fsm_first_err_delim_d) | 0xa1c | 4 | Auto-extracted signal first_err_delim_d from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_first_err_delim_q`](#protocol_control_fsm_first_err_delim_q) | 0xa20 | 4 | Auto-extracted signal first_err_delim_q from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_stuff_enable_set`](#protocol_control_fsm_stuff_enable_set) | 0xa24 | 4 | Auto-extracted signal stuff_enable_set from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_stuff_enable_clear`](#protocol_control_fsm_stuff_enable_clear) | 0xa28 | 4 | Auto-extracted signal stuff_enable_clear from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_destuff_enable_set`](#protocol_control_fsm_destuff_enable_set) | 0xa2c | 4 | Auto-extracted signal destuff_enable_set from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_destuff_enable_clear`](#protocol_control_fsm_destuff_enable_clear) | 0xa30 | 4 | Auto-extracted signal destuff_enable_clear from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_bit_err_disable`](#protocol_control_fsm_bit_err_disable) | 0xa34 | 4 | Auto-extracted signal bit_err_disable from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_bit_err_disable_receiver`](#protocol_control_fsm_bit_err_disable_receiver) | 0xa38 | 4 | Auto-extracted signal bit_err_disable_receiver from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_sof_pulse_i`](#protocol_control_fsm_sof_pulse_i) | 0xa3c | 4 | Auto-extracted signal sof_pulse_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_compl_ctr_ena_i`](#protocol_control_fsm_compl_ctr_ena_i) | 0xa40 | 4 | Auto-extracted signal compl_ctr_ena_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_tick_state_reg`](#protocol_control_fsm_tick_state_reg) | 0xa44 | 4 | Auto-extracted signal tick_state_reg from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_br_shifted_i`](#protocol_control_fsm_br_shifted_i) | 0xa48 | 4 | Auto-extracted signal br_shifted_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_is_arbitration_i`](#protocol_control_fsm_is_arbitration_i) | 0xa4c | 4 | Auto-extracted signal is_arbitration_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_crc_spec_enable_i`](#protocol_control_fsm_crc_spec_enable_i) | 0xa50 | 4 | Auto-extracted signal crc_spec_enable_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_load_init_vect_i`](#protocol_control_fsm_load_init_vect_i) | 0xa54 | 4 | Auto-extracted signal load_init_vect_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_drv_bus_off_reset_q`](#protocol_control_fsm_drv_bus_off_reset_q) | 0xa58 | 4 | Auto-extracted signal drv_bus_off_reset_q from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_retr_ctr_clear_i`](#protocol_control_fsm_retr_ctr_clear_i) | 0xa5c | 4 | Auto-extracted signal retr_ctr_clear_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_retr_ctr_add_i`](#protocol_control_fsm_retr_ctr_add_i) | 0xa60 | 4 | Auto-extracted signal retr_ctr_add_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_decrement_rec_i`](#protocol_control_fsm_decrement_rec_i) | 0xa64 | 4 | Auto-extracted signal decrement_rec_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_retr_ctr_add_block`](#protocol_control_fsm_retr_ctr_add_block) | 0xa68 | 4 | Auto-extracted signal retr_ctr_add_block from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_retr_ctr_add_block_clr`](#protocol_control_fsm_retr_ctr_add_block_clr) | 0xa6c | 4 | Auto-extracted signal retr_ctr_add_block_clr from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_block_txtb_unlock`](#protocol_control_fsm_block_txtb_unlock) | 0xa70 | 4 | Auto-extracted signal block_txtb_unlock from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_tx_frame_no_sof_d`](#protocol_control_fsm_tx_frame_no_sof_d) | 0xa74 | 4 | Auto-extracted signal tx_frame_no_sof_d from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_tx_frame_no_sof_q`](#protocol_control_fsm_tx_frame_no_sof_q) | 0xa78 | 4 | Auto-extracted signal tx_frame_no_sof_q from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_ctrl_signal_upd`](#protocol_control_fsm_ctrl_signal_upd) | 0xa7c | 4 | Auto-extracted signal ctrl_signal_upd from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_clr_bus_off_rst_flg`](#protocol_control_fsm_clr_bus_off_rst_flg) | 0xa80 | 4 | Auto-extracted signal clr_bus_off_rst_flg from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_pex_on_fdf_enable`](#protocol_control_fsm_pex_on_fdf_enable) | 0xa84 | 4 | Auto-extracted signal pex_on_fdf_enable from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_pex_on_res_enable`](#protocol_control_fsm_pex_on_res_enable) | 0xa88 | 4 | Auto-extracted signal pex_on_res_enable from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rx_data_nbs_prev`](#protocol_control_fsm_rx_data_nbs_prev) | 0xa8c | 4 | Auto-extracted signal rx_data_nbs_prev from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_pexs_set`](#protocol_control_fsm_pexs_set) | 0xa90 | 4 | Auto-extracted signal pexs_set from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_tran_frame_type_i`](#protocol_control_fsm_tran_frame_type_i) | 0xa94 | 4 | Auto-extracted signal tran_frame_type_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_txtb_clk_en_d`](#protocol_control_fsm_txtb_clk_en_d) | 0xa98 | 4 | Auto-extracted signal txtb_clk_en_d from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_txtb_clk_en_q`](#protocol_control_fsm_txtb_clk_en_q) | 0xa9c | 4 | Auto-extracted signal txtb_clk_en_q from protocol_control_fsm.vhd | +| can_bus.[`reintegration_counter_reinteg_ctr_ce`](#reintegration_counter_reinteg_ctr_ce) | 0xaa0 | 4 | Auto-extracted signal reinteg_ctr_ce from reintegration_counter.vhd | +| can_bus.[`retransmitt_counter_retr_ctr_ce`](#retransmitt_counter_retr_ctr_ce) | 0xaa4 | 4 | Auto-extracted signal retr_ctr_ce from retransmitt_counter.vhd | +| can_bus.[`rst_sync_rff`](#rst_sync_rff) | 0xaa8 | 4 | Auto-extracted signal rff from rst_sync.vhd | +| can_bus.[`rx_buffer_drv_erase_rx`](#rx_buffer_drv_erase_rx) | 0xaac | 4 | Auto-extracted signal drv_erase_rx from rx_buffer.vhd | +| can_bus.[`rx_buffer_drv_read_start`](#rx_buffer_drv_read_start) | 0xab0 | 4 | Auto-extracted signal drv_read_start from rx_buffer.vhd | +| can_bus.[`rx_buffer_drv_clr_ovr`](#rx_buffer_drv_clr_ovr) | 0xab4 | 4 | Auto-extracted signal drv_clr_ovr from rx_buffer.vhd | +| can_bus.[`rx_buffer_drv_rtsopt`](#rx_buffer_drv_rtsopt) | 0xab8 | 4 | Auto-extracted signal drv_rtsopt from rx_buffer.vhd | +| can_bus.[`rx_buffer_read_pointer`](#rx_buffer_read_pointer) | 0xabc | 4 | Auto-extracted signal read_pointer from rx_buffer.vhd | +| can_bus.[`rx_buffer_read_pointer_inc_1`](#rx_buffer_read_pointer_inc_1) | 0xac0 | 4 | Auto-extracted signal read_pointer_inc_1 from rx_buffer.vhd | +| can_bus.[`rx_buffer_write_pointer`](#rx_buffer_write_pointer) | 0xac4 | 4 | Auto-extracted signal write_pointer from rx_buffer.vhd | +| can_bus.[`rx_buffer_write_pointer_raw`](#rx_buffer_write_pointer_raw) | 0xac8 | 4 | Auto-extracted signal write_pointer_raw from rx_buffer.vhd | +| can_bus.[`rx_buffer_write_pointer_ts`](#rx_buffer_write_pointer_ts) | 0xacc | 4 | Auto-extracted signal write_pointer_ts from rx_buffer.vhd | +| can_bus.[`rx_buffer_rx_mem_free_i`](#rx_buffer_rx_mem_free_i) | 0xad0 | 4 | Auto-extracted signal rx_mem_free_i from rx_buffer.vhd | +| can_bus.[`rx_buffer_memory_write_data`](#rx_buffer_memory_write_data) | 0xad4 | 4 | Auto-extracted signal memory_write_data from rx_buffer.vhd | +| can_bus.[`rx_buffer_data_overrun_flg`](#rx_buffer_data_overrun_flg) | 0xad8 | 4 | Auto-extracted signal data_overrun_flg from rx_buffer.vhd | +| can_bus.[`rx_buffer_data_overrun_i`](#rx_buffer_data_overrun_i) | 0xadc | 4 | Auto-extracted signal data_overrun_i from rx_buffer.vhd | +| can_bus.[`rx_buffer_overrun_condition`](#rx_buffer_overrun_condition) | 0xae0 | 4 | Auto-extracted signal overrun_condition from rx_buffer.vhd | +| can_bus.[`rx_buffer_rx_empty_i`](#rx_buffer_rx_empty_i) | 0xae4 | 4 | Auto-extracted signal rx_empty_i from rx_buffer.vhd | +| can_bus.[`rx_buffer_is_free_word`](#rx_buffer_is_free_word) | 0xae8 | 4 | Auto-extracted signal is_free_word from rx_buffer.vhd | +| can_bus.[`rx_buffer_commit_rx_frame`](#rx_buffer_commit_rx_frame) | 0xaec | 4 | Auto-extracted signal commit_rx_frame from rx_buffer.vhd | +| can_bus.[`rx_buffer_commit_overrun_abort`](#rx_buffer_commit_overrun_abort) | 0xaf0 | 4 | Auto-extracted signal commit_overrun_abort from rx_buffer.vhd | +| can_bus.[`rx_buffer_read_increment`](#rx_buffer_read_increment) | 0xaf4 | 4 | Auto-extracted signal read_increment from rx_buffer.vhd | +| can_bus.[`rx_buffer_write_raw_OK`](#rx_buffer_write_raw_ok) | 0xaf8 | 4 | Auto-extracted signal write_raw_OK from rx_buffer.vhd | +| can_bus.[`rx_buffer_write_raw_intent`](#rx_buffer_write_raw_intent) | 0xafc | 4 | Auto-extracted signal write_raw_intent from rx_buffer.vhd | +| can_bus.[`rx_buffer_write_ts`](#rx_buffer_write_ts) | 0xb00 | 4 | Auto-extracted signal write_ts from rx_buffer.vhd | +| can_bus.[`rx_buffer_stored_ts`](#rx_buffer_stored_ts) | 0xb04 | 4 | Auto-extracted signal stored_ts from rx_buffer.vhd | +| can_bus.[`rx_buffer_data_selector`](#rx_buffer_data_selector) | 0xb08 | 4 | Auto-extracted signal data_selector from rx_buffer.vhd | +| can_bus.[`rx_buffer_store_ts_wr_ptr`](#rx_buffer_store_ts_wr_ptr) | 0xb0c | 4 | Auto-extracted signal store_ts_wr_ptr from rx_buffer.vhd | +| can_bus.[`rx_buffer_inc_ts_wr_ptr`](#rx_buffer_inc_ts_wr_ptr) | 0xb10 | 4 | Auto-extracted signal inc_ts_wr_ptr from rx_buffer.vhd | +| can_bus.[`rx_buffer_reset_overrun_flag`](#rx_buffer_reset_overrun_flag) | 0xb14 | 4 | Auto-extracted signal reset_overrun_flag from rx_buffer.vhd | +| can_bus.[`rx_buffer_frame_form_w`](#rx_buffer_frame_form_w) | 0xb18 | 4 | Auto-extracted signal frame_form_w from rx_buffer.vhd | +| can_bus.[`rx_buffer_timestamp_capture`](#rx_buffer_timestamp_capture) | 0xb1c | 4 | Auto-extracted signal timestamp_capture from rx_buffer.vhd | +| can_bus.[`rx_buffer_timestamp_capture_ce`](#rx_buffer_timestamp_capture_ce) | 0xb20 | 4 | Auto-extracted signal timestamp_capture_ce from rx_buffer.vhd | +| can_bus.[`rx_buffer_RAM_write`](#rx_buffer_ram_write) | 0xb24 | 4 | Auto-extracted signal RAM_write from rx_buffer.vhd | +| can_bus.[`rx_buffer_RAM_data_out`](#rx_buffer_ram_data_out) | 0xb28 | 4 | Auto-extracted signal RAM_data_out from rx_buffer.vhd | +| can_bus.[`rx_buffer_RAM_write_address`](#rx_buffer_ram_write_address) | 0xb2c | 4 | Auto-extracted signal RAM_write_address from rx_buffer.vhd | +| can_bus.[`rx_buffer_RAM_read_address`](#rx_buffer_ram_read_address) | 0xb30 | 4 | Auto-extracted signal RAM_read_address from rx_buffer.vhd | +| can_bus.[`rx_buffer_rx_buf_res_n_d`](#rx_buffer_rx_buf_res_n_d) | 0xb34 | 4 | Auto-extracted signal rx_buf_res_n_d from rx_buffer.vhd | +| can_bus.[`rx_buffer_rx_buf_res_n_q`](#rx_buffer_rx_buf_res_n_q) | 0xb38 | 4 | Auto-extracted signal rx_buf_res_n_q from rx_buffer.vhd | +| can_bus.[`rx_buffer_rx_buf_res_n_q_scan`](#rx_buffer_rx_buf_res_n_q_scan) | 0xb3c | 4 | Auto-extracted signal rx_buf_res_n_q_scan from rx_buffer.vhd | +| can_bus.[`rx_buffer_rx_buf_ram_clk_en`](#rx_buffer_rx_buf_ram_clk_en) | 0xb40 | 4 | Auto-extracted signal rx_buf_ram_clk_en from rx_buffer.vhd | +| can_bus.[`rx_buffer_clk_ram`](#rx_buffer_clk_ram) | 0xb44 | 4 | Auto-extracted signal clk_ram from rx_buffer.vhd | +| can_bus.[`rx_buffer_fsm_rx_fsm_ce`](#rx_buffer_fsm_rx_fsm_ce) | 0xb48 | 4 | Auto-extracted signal rx_fsm_ce from rx_buffer_fsm.vhd | +| can_bus.[`rx_buffer_fsm_cmd_join`](#rx_buffer_fsm_cmd_join) | 0xb4c | 4 | Auto-extracted signal cmd_join from rx_buffer_fsm.vhd | +| can_bus.[`rx_buffer_pointers_write_pointer_raw_ce`](#rx_buffer_pointers_write_pointer_raw_ce) | 0xb50 | 4 | Auto-extracted signal write_pointer_raw_ce from rx_buffer_pointers.vhd | +| can_bus.[`rx_buffer_pointers_write_pointer_ts_ce`](#rx_buffer_pointers_write_pointer_ts_ce) | 0xb54 | 4 | Auto-extracted signal write_pointer_ts_ce from rx_buffer_pointers.vhd | +| can_bus.[`rx_buffer_ram_port_a_address_i`](#rx_buffer_ram_port_a_address_i) | 0xb58 | 4 | Auto-extracted signal port_a_address_i from rx_buffer_ram.vhd | +| can_bus.[`rx_buffer_ram_port_a_write_i`](#rx_buffer_ram_port_a_write_i) | 0xb5c | 4 | Auto-extracted signal port_a_write_i from rx_buffer_ram.vhd | +| can_bus.[`rx_buffer_ram_port_a_data_in_i`](#rx_buffer_ram_port_a_data_in_i) | 0xb60 | 4 | Auto-extracted signal port_a_data_in_i from rx_buffer_ram.vhd | +| can_bus.[`rx_buffer_ram_port_b_address_i`](#rx_buffer_ram_port_b_address_i) | 0xb64 | 4 | Auto-extracted signal port_b_address_i from rx_buffer_ram.vhd | +| can_bus.[`rx_buffer_ram_port_b_data_out_i`](#rx_buffer_ram_port_b_data_out_i) | 0xb68 | 4 | Auto-extracted signal port_b_data_out_i from rx_buffer_ram.vhd | +| can_bus.[`rx_buffer_ram_tst_ena`](#rx_buffer_ram_tst_ena) | 0xb6c | 4 | Auto-extracted signal tst_ena from rx_buffer_ram.vhd | +| can_bus.[`rx_buffer_ram_tst_addr`](#rx_buffer_ram_tst_addr) | 0xb70 | 4 | Auto-extracted signal tst_addr from rx_buffer_ram.vhd | +| can_bus.[`rx_shift_reg_res_n_i_d`](#rx_shift_reg_res_n_i_d) | 0xb74 | 4 | Auto-extracted signal res_n_i_d from rx_shift_reg.vhd | +| can_bus.[`rx_shift_reg_res_n_i_q`](#rx_shift_reg_res_n_i_q) | 0xb78 | 4 | Auto-extracted signal res_n_i_q from rx_shift_reg.vhd | +| can_bus.[`rx_shift_reg_res_n_i_q_scan`](#rx_shift_reg_res_n_i_q_scan) | 0xb7c | 4 | Auto-extracted signal res_n_i_q_scan from rx_shift_reg.vhd | +| can_bus.[`rx_shift_reg_rx_shift_reg_q`](#rx_shift_reg_rx_shift_reg_q) | 0xb80 | 4 | Auto-extracted signal rx_shift_reg_q from rx_shift_reg.vhd | +| can_bus.[`rx_shift_reg_rx_shift_cmd`](#rx_shift_reg_rx_shift_cmd) | 0xb84 | 4 | Auto-extracted signal rx_shift_cmd from rx_shift_reg.vhd | +| can_bus.[`rx_shift_reg_rx_shift_in_sel_demuxed`](#rx_shift_reg_rx_shift_in_sel_demuxed) | 0xb88 | 4 | Auto-extracted signal rx_shift_in_sel_demuxed from rx_shift_reg.vhd | +| can_bus.[`rx_shift_reg_rec_is_rtr_i`](#rx_shift_reg_rec_is_rtr_i) | 0xb8c | 4 | Auto-extracted signal rec_is_rtr_i from rx_shift_reg.vhd | +| can_bus.[`rx_shift_reg_rec_frame_type_i`](#rx_shift_reg_rec_frame_type_i) | 0xb90 | 4 | Auto-extracted signal rec_frame_type_i from rx_shift_reg.vhd | +| can_bus.[`sample_mux_sample`](#sample_mux_sample) | 0xb94 | 4 | Auto-extracted signal sample from sample_mux.vhd | +| can_bus.[`sample_mux_prev_sample_d`](#sample_mux_prev_sample_d) | 0xb98 | 4 | Auto-extracted signal prev_sample_d from sample_mux.vhd | +| can_bus.[`sample_mux_prev_sample_q`](#sample_mux_prev_sample_q) | 0xb9c | 4 | Auto-extracted signal prev_sample_q from sample_mux.vhd | +| can_bus.[`segment_end_detector_req_input`](#segment_end_detector_req_input) | 0xba0 | 4 | Auto-extracted signal req_input from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_segm_end_req_capt_d`](#segment_end_detector_segm_end_req_capt_d) | 0xba4 | 4 | Auto-extracted signal segm_end_req_capt_d from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_segm_end_req_capt_q`](#segment_end_detector_segm_end_req_capt_q) | 0xba8 | 4 | Auto-extracted signal segm_end_req_capt_q from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_segm_end_req_capt_ce`](#segment_end_detector_segm_end_req_capt_ce) | 0xbac | 4 | Auto-extracted signal segm_end_req_capt_ce from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_segm_end_req_capt_clr`](#segment_end_detector_segm_end_req_capt_clr) | 0xbb0 | 4 | Auto-extracted signal segm_end_req_capt_clr from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_segm_end_req_capt_dq`](#segment_end_detector_segm_end_req_capt_dq) | 0xbb4 | 4 | Auto-extracted signal segm_end_req_capt_dq from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_segm_end_nbt_valid`](#segment_end_detector_segm_end_nbt_valid) | 0xbb8 | 4 | Auto-extracted signal segm_end_nbt_valid from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_segm_end_dbt_valid`](#segment_end_detector_segm_end_dbt_valid) | 0xbbc | 4 | Auto-extracted signal segm_end_dbt_valid from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_segm_end_nbt_dbt_valid`](#segment_end_detector_segm_end_nbt_dbt_valid) | 0xbc0 | 4 | Auto-extracted signal segm_end_nbt_dbt_valid from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_tseg1_end_req_valid`](#segment_end_detector_tseg1_end_req_valid) | 0xbc4 | 4 | Auto-extracted signal tseg1_end_req_valid from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_tseg2_end_req_valid`](#segment_end_detector_tseg2_end_req_valid) | 0xbc8 | 4 | Auto-extracted signal tseg2_end_req_valid from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_h_sync_valid_i`](#segment_end_detector_h_sync_valid_i) | 0xbcc | 4 | Auto-extracted signal h_sync_valid_i from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_segment_end_i`](#segment_end_detector_segment_end_i) | 0xbd0 | 4 | Auto-extracted signal segment_end_i from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_nbt_tq_active`](#segment_end_detector_nbt_tq_active) | 0xbd4 | 4 | Auto-extracted signal nbt_tq_active from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_dbt_tq_active`](#segment_end_detector_dbt_tq_active) | 0xbd8 | 4 | Auto-extracted signal dbt_tq_active from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_bt_ctr_clear_i`](#segment_end_detector_bt_ctr_clear_i) | 0xbdc | 4 | Auto-extracted signal bt_ctr_clear_i from segment_end_detector.vhd | +| can_bus.[`shift_reg_shift_regs`](#shift_reg_shift_regs) | 0xbe0 | 4 | Auto-extracted signal shift_regs from shift_reg.vhd | +| can_bus.[`shift_reg_next_shift_reg_val`](#shift_reg_next_shift_reg_val) | 0xbe4 | 4 | Auto-extracted signal next_shift_reg_val from shift_reg.vhd | +| can_bus.[`shift_reg_byte_shift_reg_in`](#shift_reg_byte_shift_reg_in) | 0xbe8 | 4 | Auto-extracted signal shift_reg_in from shift_reg_byte.vhd | +| can_bus.[`shift_reg_preload_shift_regs`](#shift_reg_preload_shift_regs) | 0xbec | 4 | Auto-extracted signal shift_regs from shift_reg_preload.vhd | +| can_bus.[`shift_reg_preload_next_shift_reg_val`](#shift_reg_preload_next_shift_reg_val) | 0xbf0 | 4 | Auto-extracted signal next_shift_reg_val from shift_reg_preload.vhd | +| can_bus.[`sig_sync_rff`](#sig_sync_rff) | 0xbf4 | 4 | Auto-extracted signal rff from sig_sync.vhd | +| can_bus.[`ssp_generator_btmc_d`](#ssp_generator_btmc_d) | 0xbf8 | 4 | Auto-extracted signal btmc_d from ssp_generator.vhd | +| can_bus.[`ssp_generator_btmc_q`](#ssp_generator_btmc_q) | 0xbfc | 4 | Auto-extracted signal btmc_q from ssp_generator.vhd | +| can_bus.[`ssp_generator_btmc_add`](#ssp_generator_btmc_add) | 0xc00 | 4 | Auto-extracted signal btmc_add from ssp_generator.vhd | +| can_bus.[`ssp_generator_btmc_ce`](#ssp_generator_btmc_ce) | 0xc04 | 4 | Auto-extracted signal btmc_ce from ssp_generator.vhd | +| can_bus.[`ssp_generator_btmc_meas_running_d`](#ssp_generator_btmc_meas_running_d) | 0xc08 | 4 | Auto-extracted signal btmc_meas_running_d from ssp_generator.vhd | +| can_bus.[`ssp_generator_btmc_meas_running_q`](#ssp_generator_btmc_meas_running_q) | 0xc0c | 4 | Auto-extracted signal btmc_meas_running_q from ssp_generator.vhd | +| can_bus.[`ssp_generator_sspc_d`](#ssp_generator_sspc_d) | 0xc10 | 4 | Auto-extracted signal sspc_d from ssp_generator.vhd | +| can_bus.[`ssp_generator_sspc_q`](#ssp_generator_sspc_q) | 0xc14 | 4 | Auto-extracted signal sspc_q from ssp_generator.vhd | +| can_bus.[`ssp_generator_sspc_ce`](#ssp_generator_sspc_ce) | 0xc18 | 4 | Auto-extracted signal sspc_ce from ssp_generator.vhd | +| can_bus.[`ssp_generator_sspc_expired`](#ssp_generator_sspc_expired) | 0xc1c | 4 | Auto-extracted signal sspc_expired from ssp_generator.vhd | +| can_bus.[`ssp_generator_sspc_threshold`](#ssp_generator_sspc_threshold) | 0xc20 | 4 | Auto-extracted signal sspc_threshold from ssp_generator.vhd | +| can_bus.[`ssp_generator_sspc_add`](#ssp_generator_sspc_add) | 0xc24 | 4 | Auto-extracted signal sspc_add from ssp_generator.vhd | +| can_bus.[`ssp_generator_first_ssp_d`](#ssp_generator_first_ssp_d) | 0xc28 | 4 | Auto-extracted signal first_ssp_d from ssp_generator.vhd | +| can_bus.[`ssp_generator_first_ssp_q`](#ssp_generator_first_ssp_q) | 0xc2c | 4 | Auto-extracted signal first_ssp_q from ssp_generator.vhd | +| can_bus.[`ssp_generator_sspc_ena_d`](#ssp_generator_sspc_ena_d) | 0xc30 | 4 | Auto-extracted signal sspc_ena_d from ssp_generator.vhd | +| can_bus.[`ssp_generator_sspc_ena_q`](#ssp_generator_sspc_ena_q) | 0xc34 | 4 | Auto-extracted signal sspc_ena_q from ssp_generator.vhd | +| can_bus.[`ssp_generator_ssp_delay_padded`](#ssp_generator_ssp_delay_padded) | 0xc38 | 4 | Auto-extracted signal ssp_delay_padded from ssp_generator.vhd | +| can_bus.[`synchronisation_checker_resync_edge`](#synchronisation_checker_resync_edge) | 0xc3c | 4 | Auto-extracted signal resync_edge from synchronisation_checker.vhd | +| can_bus.[`synchronisation_checker_h_sync_edge`](#synchronisation_checker_h_sync_edge) | 0xc40 | 4 | Auto-extracted signal h_sync_edge from synchronisation_checker.vhd | +| can_bus.[`synchronisation_checker_h_or_re_sync_edge`](#synchronisation_checker_h_or_re_sync_edge) | 0xc44 | 4 | Auto-extracted signal h_or_re_sync_edge from synchronisation_checker.vhd | +| can_bus.[`synchronisation_checker_sync_flag`](#synchronisation_checker_sync_flag) | 0xc48 | 4 | Auto-extracted signal sync_flag from synchronisation_checker.vhd | +| can_bus.[`synchronisation_checker_sync_flag_ce`](#synchronisation_checker_sync_flag_ce) | 0xc4c | 4 | Auto-extracted signal sync_flag_ce from synchronisation_checker.vhd | +| can_bus.[`synchronisation_checker_sync_flag_nxt`](#synchronisation_checker_sync_flag_nxt) | 0xc50 | 4 | Auto-extracted signal sync_flag_nxt from synchronisation_checker.vhd | +| can_bus.[`test_registers_reg_map_reg_sel`](#test_registers_reg_map_reg_sel) | 0xc54 | 4 | Auto-extracted signal reg_sel from test_registers_reg_map.vhd | +| can_bus.[`test_registers_reg_map_read_data_mux_in`](#test_registers_reg_map_read_data_mux_in) | 0xc58 | 4 | Auto-extracted signal read_data_mux_in from test_registers_reg_map.vhd | +| can_bus.[`test_registers_reg_map_read_data_mask_n`](#test_registers_reg_map_read_data_mask_n) | 0xc5c | 4 | Auto-extracted signal read_data_mask_n from test_registers_reg_map.vhd | +| can_bus.[`test_registers_reg_map_read_mux_ena`](#test_registers_reg_map_read_mux_ena) | 0xc60 | 4 | Auto-extracted signal read_mux_ena from test_registers_reg_map.vhd | +| can_bus.[`trigger_generator_rx_trig_req_q`](#trigger_generator_rx_trig_req_q) | 0xc64 | 4 | Auto-extracted signal rx_trig_req_q from trigger_generator.vhd | +| can_bus.[`trigger_generator_tx_trig_req_flag_d`](#trigger_generator_tx_trig_req_flag_d) | 0xc68 | 4 | Auto-extracted signal tx_trig_req_flag_d from trigger_generator.vhd | +| can_bus.[`trigger_generator_tx_trig_req_flag_q`](#trigger_generator_tx_trig_req_flag_q) | 0xc6c | 4 | Auto-extracted signal tx_trig_req_flag_q from trigger_generator.vhd | +| can_bus.[`trigger_generator_tx_trig_req_flag_dq`](#trigger_generator_tx_trig_req_flag_dq) | 0xc70 | 4 | Auto-extracted signal tx_trig_req_flag_dq from trigger_generator.vhd | +| can_bus.[`trigger_mux_tx_trigger_q`](#trigger_mux_tx_trigger_q) | 0xc74 | 4 | Auto-extracted signal tx_trigger_q from trigger_mux.vhd | +| can_bus.[`trv_delay_meas_trv_meas_progress_d`](#trv_delay_meas_trv_meas_progress_d) | 0xc78 | 4 | Auto-extracted signal trv_meas_progress_d from trv_delay_meas.vhd | +| can_bus.[`trv_delay_meas_trv_meas_progress_q`](#trv_delay_meas_trv_meas_progress_q) | 0xc7c | 4 | Auto-extracted signal trv_meas_progress_q from trv_delay_meas.vhd | +| can_bus.[`trv_delay_meas_trv_meas_progress_del`](#trv_delay_meas_trv_meas_progress_del) | 0xc80 | 4 | Auto-extracted signal trv_meas_progress_del from trv_delay_meas.vhd | +| can_bus.[`trv_delay_meas_trv_delay_ctr_q`](#trv_delay_meas_trv_delay_ctr_q) | 0xc84 | 4 | Auto-extracted signal trv_delay_ctr_q from trv_delay_meas.vhd | +| can_bus.[`trv_delay_meas_trv_delay_ctr_d`](#trv_delay_meas_trv_delay_ctr_d) | 0xc88 | 4 | Auto-extracted signal trv_delay_ctr_d from trv_delay_meas.vhd | +| can_bus.[`trv_delay_meas_trv_delay_ctr_add`](#trv_delay_meas_trv_delay_ctr_add) | 0xc8c | 4 | Auto-extracted signal trv_delay_ctr_add from trv_delay_meas.vhd | +| can_bus.[`trv_delay_meas_trv_delay_ctr_q_padded`](#trv_delay_meas_trv_delay_ctr_q_padded) | 0xc90 | 4 | Auto-extracted signal trv_delay_ctr_q_padded from trv_delay_meas.vhd | +| can_bus.[`trv_delay_meas_trv_delay_ctr_rst_d`](#trv_delay_meas_trv_delay_ctr_rst_d) | 0xc94 | 4 | Auto-extracted signal trv_delay_ctr_rst_d from trv_delay_meas.vhd | +| can_bus.[`trv_delay_meas_trv_delay_ctr_rst_q`](#trv_delay_meas_trv_delay_ctr_rst_q) | 0xc98 | 4 | Auto-extracted signal trv_delay_ctr_rst_q from trv_delay_meas.vhd | +| can_bus.[`trv_delay_meas_trv_delay_ctr_rst_q_scan`](#trv_delay_meas_trv_delay_ctr_rst_q_scan) | 0xc9c | 4 | Auto-extracted signal trv_delay_ctr_rst_q_scan from trv_delay_meas.vhd | +| can_bus.[`trv_delay_meas_ssp_shadow_ce`](#trv_delay_meas_ssp_shadow_ce) | 0xca0 | 4 | Auto-extracted signal ssp_shadow_ce from trv_delay_meas.vhd | +| can_bus.[`trv_delay_meas_ssp_delay_raw`](#trv_delay_meas_ssp_delay_raw) | 0xca4 | 4 | Auto-extracted signal ssp_delay_raw from trv_delay_meas.vhd | +| can_bus.[`trv_delay_meas_ssp_delay_saturated`](#trv_delay_meas_ssp_delay_saturated) | 0xca8 | 4 | Auto-extracted signal ssp_delay_saturated from trv_delay_meas.vhd | +| can_bus.[`trv_delay_meas_trv_delay_sum`](#trv_delay_meas_trv_delay_sum) | 0xcac | 4 | Auto-extracted signal trv_delay_sum from trv_delay_meas.vhd | +| can_bus.[`tx_arbitrator_select_buf_avail`](#tx_arbitrator_select_buf_avail) | 0xcb0 | 4 | Auto-extracted signal select_buf_avail from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_txtb_selected_input`](#tx_arbitrator_txtb_selected_input) | 0xcb4 | 4 | Auto-extracted signal txtb_selected_input from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_txtb_timestamp`](#tx_arbitrator_txtb_timestamp) | 0xcb8 | 4 | Auto-extracted signal txtb_timestamp from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_timestamp_valid`](#tx_arbitrator_timestamp_valid) | 0xcbc | 4 | Auto-extracted signal timestamp_valid from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_select_index_changed`](#tx_arbitrator_select_index_changed) | 0xcc0 | 4 | Auto-extracted signal select_index_changed from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_validated_buffer`](#tx_arbitrator_validated_buffer) | 0xcc4 | 4 | Auto-extracted signal validated_buffer from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_ts_low_internal`](#tx_arbitrator_ts_low_internal) | 0xcc8 | 4 | Auto-extracted signal ts_low_internal from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_tran_dlc_dbl_buf`](#tx_arbitrator_tran_dlc_dbl_buf) | 0xccc | 4 | Auto-extracted signal tran_dlc_dbl_buf from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_tran_is_rtr_dbl_buf`](#tx_arbitrator_tran_is_rtr_dbl_buf) | 0xcd0 | 4 | Auto-extracted signal tran_is_rtr_dbl_buf from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_tran_ident_type_dbl_buf`](#tx_arbitrator_tran_ident_type_dbl_buf) | 0xcd4 | 4 | Auto-extracted signal tran_ident_type_dbl_buf from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_tran_frame_type_dbl_buf`](#tx_arbitrator_tran_frame_type_dbl_buf) | 0xcd8 | 4 | Auto-extracted signal tran_frame_type_dbl_buf from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_tran_brs_dbl_buf`](#tx_arbitrator_tran_brs_dbl_buf) | 0xcdc | 4 | Auto-extracted signal tran_brs_dbl_buf from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_tran_dlc_com`](#tx_arbitrator_tran_dlc_com) | 0xce0 | 4 | Auto-extracted signal tran_dlc_com from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_tran_is_rtr_com`](#tx_arbitrator_tran_is_rtr_com) | 0xce4 | 4 | Auto-extracted signal tran_is_rtr_com from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_tran_ident_type_com`](#tx_arbitrator_tran_ident_type_com) | 0xce8 | 4 | Auto-extracted signal tran_ident_type_com from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_tran_frame_type_com`](#tx_arbitrator_tran_frame_type_com) | 0xcec | 4 | Auto-extracted signal tran_frame_type_com from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_tran_brs_com`](#tx_arbitrator_tran_brs_com) | 0xcf0 | 4 | Auto-extracted signal tran_brs_com from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_tran_frame_valid_com`](#tx_arbitrator_tran_frame_valid_com) | 0xcf4 | 4 | Auto-extracted signal tran_frame_valid_com from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_tran_identifier_com`](#tx_arbitrator_tran_identifier_com) | 0xcf8 | 4 | Auto-extracted signal tran_identifier_com from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_load_ts_lw_addr`](#tx_arbitrator_load_ts_lw_addr) | 0xcfc | 4 | Auto-extracted signal load_ts_lw_addr from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_load_ts_uw_addr`](#tx_arbitrator_load_ts_uw_addr) | 0xd00 | 4 | Auto-extracted signal load_ts_uw_addr from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_load_ffmt_w_addr`](#tx_arbitrator_load_ffmt_w_addr) | 0xd04 | 4 | Auto-extracted signal load_ffmt_w_addr from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_load_ident_w_addr`](#tx_arbitrator_load_ident_w_addr) | 0xd08 | 4 | Auto-extracted signal load_ident_w_addr from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_store_ts_l_w`](#tx_arbitrator_store_ts_l_w) | 0xd0c | 4 | Auto-extracted signal store_ts_l_w from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_store_md_w`](#tx_arbitrator_store_md_w) | 0xd10 | 4 | Auto-extracted signal store_md_w from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_store_ident_w`](#tx_arbitrator_store_ident_w) | 0xd14 | 4 | Auto-extracted signal store_ident_w from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_buffer_md_w`](#tx_arbitrator_buffer_md_w) | 0xd18 | 4 | Auto-extracted signal buffer_md_w from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_store_last_txtb_index`](#tx_arbitrator_store_last_txtb_index) | 0xd1c | 4 | Auto-extracted signal store_last_txtb_index from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_frame_valid_com_set`](#tx_arbitrator_frame_valid_com_set) | 0xd20 | 4 | Auto-extracted signal frame_valid_com_set from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_frame_valid_com_clear`](#tx_arbitrator_frame_valid_com_clear) | 0xd24 | 4 | Auto-extracted signal frame_valid_com_clear from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_tx_arb_locked`](#tx_arbitrator_tx_arb_locked) | 0xd28 | 4 | Auto-extracted signal tx_arb_locked from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_txtb_meta_clk_en`](#tx_arbitrator_txtb_meta_clk_en) | 0xd2c | 4 | Auto-extracted signal txtb_meta_clk_en from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_drv_tttm_ena`](#tx_arbitrator_drv_tttm_ena) | 0xd30 | 4 | Auto-extracted signal drv_tttm_ena from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_fsm_tx_arb_fsm_ce`](#tx_arbitrator_fsm_tx_arb_fsm_ce) | 0xd34 | 4 | Auto-extracted signal tx_arb_fsm_ce from tx_arbitrator_fsm.vhd | +| can_bus.[`tx_arbitrator_fsm_fsm_wait_state_d`](#tx_arbitrator_fsm_fsm_wait_state_d) | 0xd38 | 4 | Auto-extracted signal fsm_wait_state_d from tx_arbitrator_fsm.vhd | +| can_bus.[`tx_arbitrator_fsm_fsm_wait_state_q`](#tx_arbitrator_fsm_fsm_wait_state_q) | 0xd3c | 4 | Auto-extracted signal fsm_wait_state_q from tx_arbitrator_fsm.vhd | +| can_bus.[`tx_data_cache_tx_cache_mem`](#tx_data_cache_tx_cache_mem) | 0xd40 | 4 | Auto-extracted signal tx_cache_mem from tx_data_cache.vhd | +| can_bus.[`tx_shift_reg_tx_sr_output`](#tx_shift_reg_tx_sr_output) | 0xd44 | 4 | Auto-extracted signal tx_sr_output from tx_shift_reg.vhd | +| can_bus.[`tx_shift_reg_tx_sr_ce`](#tx_shift_reg_tx_sr_ce) | 0xd48 | 4 | Auto-extracted signal tx_sr_ce from tx_shift_reg.vhd | +| can_bus.[`tx_shift_reg_tx_sr_pload`](#tx_shift_reg_tx_sr_pload) | 0xd4c | 4 | Auto-extracted signal tx_sr_pload from tx_shift_reg.vhd | +| can_bus.[`tx_shift_reg_tx_sr_pload_val`](#tx_shift_reg_tx_sr_pload_val) | 0xd50 | 4 | Auto-extracted signal tx_sr_pload_val from tx_shift_reg.vhd | +| can_bus.[`tx_shift_reg_tx_base_id`](#tx_shift_reg_tx_base_id) | 0xd54 | 4 | Auto-extracted signal tx_base_id from tx_shift_reg.vhd | +| can_bus.[`tx_shift_reg_tx_ext_id`](#tx_shift_reg_tx_ext_id) | 0xd58 | 4 | Auto-extracted signal tx_ext_id from tx_shift_reg.vhd | +| can_bus.[`tx_shift_reg_tx_crc`](#tx_shift_reg_tx_crc) | 0xd5c | 4 | Auto-extracted signal tx_crc from tx_shift_reg.vhd | +| can_bus.[`tx_shift_reg_bst_ctr_grey`](#tx_shift_reg_bst_ctr_grey) | 0xd60 | 4 | Auto-extracted signal bst_ctr_grey from tx_shift_reg.vhd | +| can_bus.[`tx_shift_reg_bst_parity`](#tx_shift_reg_bst_parity) | 0xd64 | 4 | Auto-extracted signal bst_parity from tx_shift_reg.vhd | +| can_bus.[`tx_shift_reg_stuff_count`](#tx_shift_reg_stuff_count) | 0xd68 | 4 | Auto-extracted signal stuff_count from tx_shift_reg.vhd | +| can_bus.[`txt_buffer_txtb_user_accessible`](#txt_buffer_txtb_user_accessible) | 0xd6c | 4 | Auto-extracted signal txtb_user_accessible from txt_buffer.vhd | +| can_bus.[`txt_buffer_hw_cbs`](#txt_buffer_hw_cbs) | 0xd70 | 4 | Auto-extracted signal hw_cbs from txt_buffer.vhd | +| can_bus.[`txt_buffer_sw_cbs`](#txt_buffer_sw_cbs) | 0xd74 | 4 | Auto-extracted signal sw_cbs from txt_buffer.vhd | +| can_bus.[`txt_buffer_txtb_unmask_data_ram`](#txt_buffer_txtb_unmask_data_ram) | 0xd78 | 4 | Auto-extracted signal txtb_unmask_data_ram from txt_buffer.vhd | +| can_bus.[`txt_buffer_txtb_port_b_data_i`](#txt_buffer_txtb_port_b_data_i) | 0xd7c | 4 | Auto-extracted signal txtb_port_b_data_i from txt_buffer.vhd | +| can_bus.[`txt_buffer_ram_write`](#txt_buffer_ram_write) | 0xd80 | 4 | Auto-extracted signal ram_write from txt_buffer.vhd | +| can_bus.[`txt_buffer_ram_read_address`](#txt_buffer_ram_read_address) | 0xd84 | 4 | Auto-extracted signal ram_read_address from txt_buffer.vhd | +| can_bus.[`txt_buffer_txtb_ram_clk_en`](#txt_buffer_txtb_ram_clk_en) | 0xd88 | 4 | Auto-extracted signal txtb_ram_clk_en from txt_buffer.vhd | +| can_bus.[`txt_buffer_clk_ram`](#txt_buffer_clk_ram) | 0xd8c | 4 | Auto-extracted signal clk_ram from txt_buffer.vhd | +| can_bus.[`txt_buffer_fsm_abort_applied`](#txt_buffer_fsm_abort_applied) | 0xd90 | 4 | Auto-extracted signal abort_applied from txt_buffer_fsm.vhd | +| can_bus.[`txt_buffer_fsm_txt_fsm_ce`](#txt_buffer_fsm_txt_fsm_ce) | 0xd94 | 4 | Auto-extracted signal txt_fsm_ce from txt_buffer_fsm.vhd | +| can_bus.[`txt_buffer_fsm_go_to_failed`](#txt_buffer_fsm_go_to_failed) | 0xd98 | 4 | Auto-extracted signal go_to_failed from txt_buffer_fsm.vhd | +| can_bus.[`txt_buffer_fsm_transient_state`](#txt_buffer_fsm_transient_state) | 0xd9c | 4 | Auto-extracted signal transient_state from txt_buffer_fsm.vhd | +| can_bus.[`txt_buffer_ram_port_a_address_i`](#txt_buffer_ram_port_a_address_i) | 0xda0 | 4 | Auto-extracted signal port_a_address_i from txt_buffer_ram.vhd | +| can_bus.[`txt_buffer_ram_port_a_write_i`](#txt_buffer_ram_port_a_write_i) | 0xda4 | 4 | Auto-extracted signal port_a_write_i from txt_buffer_ram.vhd | +| can_bus.[`txt_buffer_ram_port_a_data_in_i`](#txt_buffer_ram_port_a_data_in_i) | 0xda8 | 4 | Auto-extracted signal port_a_data_in_i from txt_buffer_ram.vhd | +| can_bus.[`txt_buffer_ram_port_b_address_i`](#txt_buffer_ram_port_b_address_i) | 0xdac | 4 | Auto-extracted signal port_b_address_i from txt_buffer_ram.vhd | +| can_bus.[`txt_buffer_ram_port_b_data_out_i`](#txt_buffer_ram_port_b_data_out_i) | 0xdb0 | 4 | Auto-extracted signal port_b_data_out_i from txt_buffer_ram.vhd | +| can_bus.[`txt_buffer_ram_tst_ena`](#txt_buffer_ram_tst_ena) | 0xdb4 | 4 | Auto-extracted signal tst_ena from txt_buffer_ram.vhd | +| can_bus.[`txt_buffer_ram_tst_addr`](#txt_buffer_ram_tst_addr) | 0xdb8 | 4 | Auto-extracted signal tst_addr from txt_buffer_ram.vhd | +| can_bus.[`access_signaler_be_active`](#access_signaler_be_active) | 0xdbc | 4 | Auto-extracted signal be_active from access_signaler.vhd | +| can_bus.[`access_signaler_access_in`](#access_signaler_access_in) | 0xdc0 | 4 | Auto-extracted signal access_in from access_signaler.vhd | +| can_bus.[`access_signaler_access_active`](#access_signaler_access_active) | 0xdc4 | 4 | Auto-extracted signal access_active from access_signaler.vhd | +| can_bus.[`access_signaler_access_active_reg`](#access_signaler_access_active_reg) | 0xdc8 | 4 | Auto-extracted signal access_active_reg from access_signaler.vhd | +| can_bus.[`address_decoder_addr_dec_i`](#address_decoder_addr_dec_i) | 0xdcc | 4 | Auto-extracted signal addr_dec_i from address_decoder.vhd | +| can_bus.[`address_decoder_addr_dec_enabled_i`](#address_decoder_addr_dec_enabled_i) | 0xdd0 | 4 | Auto-extracted signal addr_dec_enabled_i from address_decoder.vhd | + +## ahb_ifc_hsel_valid +Auto-extracted signal hsel_valid from ahb_ifc.vhd +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ahb_ifc_write_acc_d +Auto-extracted signal write_acc_d from ahb_ifc.vhd +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ahb_ifc_write_acc_q +Auto-extracted signal write_acc_q from ahb_ifc.vhd +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ahb_ifc_haddr_q +Auto-extracted signal haddr_q from ahb_ifc.vhd +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ahb_ifc_h_ready_raw +Auto-extracted signal h_ready_raw from ahb_ifc.vhd +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ahb_ifc_sbe_d +Auto-extracted signal sbe_d from ahb_ifc.vhd +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ahb_ifc_sbe_q +Auto-extracted signal sbe_q from ahb_ifc.vhd +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ahb_ifc_swr_i +Auto-extracted signal swr_i from ahb_ifc.vhd +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ahb_ifc_srd_i +Auto-extracted signal srd_i from ahb_ifc.vhd +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_destuffing_discard_stuff_bit +Auto-extracted signal discard_stuff_bit from bit_destuffing.vhd +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_destuffing_non_fix_to_fix_chng +Auto-extracted signal non_fix_to_fix_chng from bit_destuffing.vhd +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_destuffing_stuff_lvl_reached +Auto-extracted signal stuff_lvl_reached from bit_destuffing.vhd +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_destuffing_stuff_rule_violate +Auto-extracted signal stuff_rule_violate from bit_destuffing.vhd +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_destuffing_enable_prev +Auto-extracted signal enable_prev from bit_destuffing.vhd +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_destuffing_fixed_prev_q +Auto-extracted signal fixed_prev_q from bit_destuffing.vhd +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_destuffing_fixed_prev_d +Auto-extracted signal fixed_prev_d from bit_destuffing.vhd +- Offset: `0x3c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_destuffing_same_bits_erase +Auto-extracted signal same_bits_erase from bit_destuffing.vhd +- Offset: `0x40` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_destuffing_destuffed_q +Auto-extracted signal destuffed_q from bit_destuffing.vhd +- Offset: `0x44` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_destuffing_destuffed_d +Auto-extracted signal destuffed_d from bit_destuffing.vhd +- Offset: `0x48` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_destuffing_stuff_err_q +Auto-extracted signal stuff_err_q from bit_destuffing.vhd +- Offset: `0x4c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_destuffing_stuff_err_d +Auto-extracted signal stuff_err_d from bit_destuffing.vhd +- Offset: `0x50` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_destuffing_prev_val_q +Auto-extracted signal prev_val_q from bit_destuffing.vhd +- Offset: `0x54` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_destuffing_prev_val_d +Auto-extracted signal prev_val_d from bit_destuffing.vhd +- Offset: `0x58` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_err_detector_bit_err_d +Auto-extracted signal bit_err_d from bit_err_detector.vhd +- Offset: `0x5c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_err_detector_bit_err_q +Auto-extracted signal bit_err_q from bit_err_detector.vhd +- Offset: `0x60` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_err_detector_bit_err_ssp_capt_d +Auto-extracted signal bit_err_ssp_capt_d from bit_err_detector.vhd +- Offset: `0x64` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_err_detector_bit_err_ssp_capt_q +Auto-extracted signal bit_err_ssp_capt_q from bit_err_detector.vhd +- Offset: `0x68` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_err_detector_bit_err_ssp_valid +Auto-extracted signal bit_err_ssp_valid from bit_err_detector.vhd +- Offset: `0x6c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_err_detector_bit_err_ssp_condition +Auto-extracted signal bit_err_ssp_condition from bit_err_detector.vhd +- Offset: `0x70` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_err_detector_bit_err_norm_valid +Auto-extracted signal bit_err_norm_valid from bit_err_detector.vhd +- Offset: `0x74` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_filter_masked_input +Auto-extracted signal masked_input from bit_filter.vhd +- Offset: `0x78` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_filter_masked_value +Auto-extracted signal masked_value from bit_filter.vhd +- Offset: `0x7c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_segment_meter_sel_tseg1 +Auto-extracted signal sel_tseg1 from bit_segment_meter.vhd +- Offset: `0x80` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_segment_meter_exp_seg_length_ce +Auto-extracted signal exp_seg_length_ce from bit_segment_meter.vhd +- Offset: `0x84` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_segment_meter_phase_err_mt_sjw +Auto-extracted signal phase_err_mt_sjw from bit_segment_meter.vhd +- Offset: `0x88` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_segment_meter_phase_err_eq_sjw +Auto-extracted signal phase_err_eq_sjw from bit_segment_meter.vhd +- Offset: `0x8c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_segment_meter_exit_ph2_immediate +Auto-extracted signal exit_ph2_immediate from bit_segment_meter.vhd +- Offset: `0x90` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_segment_meter_exit_segm_regular +Auto-extracted signal exit_segm_regular from bit_segment_meter.vhd +- Offset: `0x94` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_segment_meter_exit_segm_regular_tseg1 +Auto-extracted signal exit_segm_regular_tseg1 from bit_segment_meter.vhd +- Offset: `0x98` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_segment_meter_exit_segm_regular_tseg2 +Auto-extracted signal exit_segm_regular_tseg2 from bit_segment_meter.vhd +- Offset: `0x9c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_segment_meter_sjw_mt_zero +Auto-extracted signal sjw_mt_zero from bit_segment_meter.vhd +- Offset: `0xa0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_segment_meter_use_basic_segm_length +Auto-extracted signal use_basic_segm_length from bit_segment_meter.vhd +- Offset: `0xa4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_segment_meter_phase_err_sjw_by_one +Auto-extracted signal phase_err_sjw_by_one from bit_segment_meter.vhd +- Offset: `0xa8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_segment_meter_shorten_tseg1_after_tseg2 +Auto-extracted signal shorten_tseg1_after_tseg2 from bit_segment_meter.vhd +- Offset: `0xac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_stuffing_data_out_i +Auto-extracted signal data_out_i from bit_stuffing.vhd +- Offset: `0xb0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_stuffing_data_halt_q +Auto-extracted signal data_halt_q from bit_stuffing.vhd +- Offset: `0xb4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_stuffing_data_halt_d +Auto-extracted signal data_halt_d from bit_stuffing.vhd +- Offset: `0xb8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_stuffing_fixed_reg_q +Auto-extracted signal fixed_reg_q from bit_stuffing.vhd +- Offset: `0xbc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_stuffing_fixed_reg_d +Auto-extracted signal fixed_reg_d from bit_stuffing.vhd +- Offset: `0xc0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_stuffing_enable_prev +Auto-extracted signal enable_prev from bit_stuffing.vhd +- Offset: `0xc4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_stuffing_non_fix_to_fix_chng +Auto-extracted signal non_fix_to_fix_chng from bit_stuffing.vhd +- Offset: `0xc8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_stuffing_stuff_lvl_reached +Auto-extracted signal stuff_lvl_reached from bit_stuffing.vhd +- Offset: `0xcc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_stuffing_same_bits_rst_trig +Auto-extracted signal same_bits_rst_trig from bit_stuffing.vhd +- Offset: `0xd0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_stuffing_same_bits_rst +Auto-extracted signal same_bits_rst from bit_stuffing.vhd +- Offset: `0xd4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_stuffing_insert_stuff_bit +Auto-extracted signal insert_stuff_bit from bit_stuffing.vhd +- Offset: `0xd8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_stuffing_data_out_d_ena +Auto-extracted signal data_out_d_ena from bit_stuffing.vhd +- Offset: `0xdc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_stuffing_data_out_d +Auto-extracted signal data_out_d from bit_stuffing.vhd +- Offset: `0xe0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_stuffing_data_out_ce +Auto-extracted signal data_out_ce from bit_stuffing.vhd +- Offset: `0xe4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_drv_tq_nbt +Auto-extracted signal drv_tq_nbt from bit_time_cfg_capture.vhd +- Offset: `0xe8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_drv_prs_nbt +Auto-extracted signal drv_prs_nbt from bit_time_cfg_capture.vhd +- Offset: `0xec` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_drv_ph1_nbt +Auto-extracted signal drv_ph1_nbt from bit_time_cfg_capture.vhd +- Offset: `0xf0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_drv_ph2_nbt +Auto-extracted signal drv_ph2_nbt from bit_time_cfg_capture.vhd +- Offset: `0xf4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_drv_sjw_nbt +Auto-extracted signal drv_sjw_nbt from bit_time_cfg_capture.vhd +- Offset: `0xf8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_drv_tq_dbt +Auto-extracted signal drv_tq_dbt from bit_time_cfg_capture.vhd +- Offset: `0xfc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_drv_prs_dbt +Auto-extracted signal drv_prs_dbt from bit_time_cfg_capture.vhd +- Offset: `0x100` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_drv_ph1_dbt +Auto-extracted signal drv_ph1_dbt from bit_time_cfg_capture.vhd +- Offset: `0x104` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_drv_ph2_dbt +Auto-extracted signal drv_ph2_dbt from bit_time_cfg_capture.vhd +- Offset: `0x108` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_drv_sjw_dbt +Auto-extracted signal drv_sjw_dbt from bit_time_cfg_capture.vhd +- Offset: `0x10c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_tseg1_nbt_d +Auto-extracted signal tseg1_nbt_d from bit_time_cfg_capture.vhd +- Offset: `0x110` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_tseg1_dbt_d +Auto-extracted signal tseg1_dbt_d from bit_time_cfg_capture.vhd +- Offset: `0x114` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_drv_ena +Auto-extracted signal drv_ena from bit_time_cfg_capture.vhd +- Offset: `0x118` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_drv_ena_reg +Auto-extracted signal drv_ena_reg from bit_time_cfg_capture.vhd +- Offset: `0x11c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_drv_ena_reg_2 +Auto-extracted signal drv_ena_reg_2 from bit_time_cfg_capture.vhd +- Offset: `0x120` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_capture +Auto-extracted signal capture from bit_time_cfg_capture.vhd +- Offset: `0x124` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_counters_tq_counter_d +Auto-extracted signal tq_counter_d from bit_time_counters.vhd +- Offset: `0x128` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_counters_tq_counter_q +Auto-extracted signal tq_counter_q from bit_time_counters.vhd +- Offset: `0x12c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_counters_tq_counter_ce +Auto-extracted signal tq_counter_ce from bit_time_counters.vhd +- Offset: `0x130` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_counters_tq_counter_allow +Auto-extracted signal tq_counter_allow from bit_time_counters.vhd +- Offset: `0x134` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_counters_tq_edge_i +Auto-extracted signal tq_edge_i from bit_time_counters.vhd +- Offset: `0x138` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_counters_segm_counter_d +Auto-extracted signal segm_counter_d from bit_time_counters.vhd +- Offset: `0x13c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_counters_segm_counter_q +Auto-extracted signal segm_counter_q from bit_time_counters.vhd +- Offset: `0x140` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_counters_segm_counter_ce +Auto-extracted signal segm_counter_ce from bit_time_counters.vhd +- Offset: `0x144` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_fsm_bt_fsm_ce +Auto-extracted signal bt_fsm_ce from bit_time_fsm.vhd +- Offset: `0x148` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_drv_ena +Auto-extracted signal drv_ena from bus_sampling.vhd +- Offset: `0x14c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_drv_ssp_offset +Auto-extracted signal drv_ssp_offset from bus_sampling.vhd +- Offset: `0x150` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_drv_ssp_delay_select +Auto-extracted signal drv_ssp_delay_select from bus_sampling.vhd +- Offset: `0x154` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_data_rx_synced +Auto-extracted signal data_rx_synced from bus_sampling.vhd +- Offset: `0x158` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_prev_Sample +Auto-extracted signal prev_Sample from bus_sampling.vhd +- Offset: `0x15c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_sample_sec_i +Auto-extracted signal sample_sec_i from bus_sampling.vhd +- Offset: `0x160` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_data_tx_delayed +Auto-extracted signal data_tx_delayed from bus_sampling.vhd +- Offset: `0x164` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_edge_rx_valid +Auto-extracted signal edge_rx_valid from bus_sampling.vhd +- Offset: `0x168` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_edge_tx_valid +Auto-extracted signal edge_tx_valid from bus_sampling.vhd +- Offset: `0x16c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_ssp_delay +Auto-extracted signal ssp_delay from bus_sampling.vhd +- Offset: `0x170` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_tx_trigger_q +Auto-extracted signal tx_trigger_q from bus_sampling.vhd +- Offset: `0x174` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_tx_trigger_ssp +Auto-extracted signal tx_trigger_ssp from bus_sampling.vhd +- Offset: `0x178` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_shift_regs_res_d +Auto-extracted signal shift_regs_res_d from bus_sampling.vhd +- Offset: `0x17c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_shift_regs_res_q +Auto-extracted signal shift_regs_res_q from bus_sampling.vhd +- Offset: `0x180` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_shift_regs_res_q_scan +Auto-extracted signal shift_regs_res_q_scan from bus_sampling.vhd +- Offset: `0x184` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_ssp_enable +Auto-extracted signal ssp_enable from bus_sampling.vhd +- Offset: `0x188` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_traffic_counters_tx_ctr_i +Auto-extracted signal tx_ctr_i from bus_traffic_counters.vhd +- Offset: `0x18c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_traffic_counters_rx_ctr_i +Auto-extracted signal rx_ctr_i from bus_traffic_counters.vhd +- Offset: `0x190` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_traffic_counters_tx_ctr_rst_n_d +Auto-extracted signal tx_ctr_rst_n_d from bus_traffic_counters.vhd +- Offset: `0x194` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_traffic_counters_tx_ctr_rst_n_q +Auto-extracted signal tx_ctr_rst_n_q from bus_traffic_counters.vhd +- Offset: `0x198` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_traffic_counters_tx_ctr_rst_n_q_scan +Auto-extracted signal tx_ctr_rst_n_q_scan from bus_traffic_counters.vhd +- Offset: `0x19c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_traffic_counters_rx_ctr_rst_n_d +Auto-extracted signal rx_ctr_rst_n_d from bus_traffic_counters.vhd +- Offset: `0x1a0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_traffic_counters_rx_ctr_rst_n_q +Auto-extracted signal rx_ctr_rst_n_q from bus_traffic_counters.vhd +- Offset: `0x1a4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_traffic_counters_rx_ctr_rst_n_q_scan +Auto-extracted signal rx_ctr_rst_n_q_scan from bus_traffic_counters.vhd +- Offset: `0x1a8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_apb_tb_s_apb_paddr +Auto-extracted signal s_apb_paddr from can_apb_tb.vhd +- Offset: `0x1ac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_apb_tb_s_apb_penable +Auto-extracted signal s_apb_penable from can_apb_tb.vhd +- Offset: `0x1b0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_apb_tb_s_apb_pprot +Auto-extracted signal s_apb_pprot from can_apb_tb.vhd +- Offset: `0x1b4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_apb_tb_s_apb_prdata +Auto-extracted signal s_apb_prdata from can_apb_tb.vhd +- Offset: `0x1b8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_apb_tb_s_apb_pready +Auto-extracted signal s_apb_pready from can_apb_tb.vhd +- Offset: `0x1bc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_apb_tb_s_apb_psel +Auto-extracted signal s_apb_psel from can_apb_tb.vhd +- Offset: `0x1c0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_apb_tb_s_apb_pslverr +Auto-extracted signal s_apb_pslverr from can_apb_tb.vhd +- Offset: `0x1c4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_apb_tb_s_apb_pstrb +Auto-extracted signal s_apb_pstrb from can_apb_tb.vhd +- Offset: `0x1c8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_apb_tb_s_apb_pwdata +Auto-extracted signal s_apb_pwdata from can_apb_tb.vhd +- Offset: `0x1cc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_apb_tb_s_apb_pwrite +Auto-extracted signal s_apb_pwrite from can_apb_tb.vhd +- Offset: `0x1d0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_drv_clr_rx_ctr +Auto-extracted signal drv_clr_rx_ctr from can_core.vhd +- Offset: `0x1d4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_drv_clr_tx_ctr +Auto-extracted signal drv_clr_tx_ctr from can_core.vhd +- Offset: `0x1d8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_drv_bus_mon_ena +Auto-extracted signal drv_bus_mon_ena from can_core.vhd +- Offset: `0x1dc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_drv_ena +Auto-extracted signal drv_ena from can_core.vhd +- Offset: `0x1e0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_rec_ident_i +Auto-extracted signal rec_ident_i from can_core.vhd +- Offset: `0x1e4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_rec_dlc_i +Auto-extracted signal rec_dlc_i from can_core.vhd +- Offset: `0x1e8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_rec_ident_type_i +Auto-extracted signal rec_ident_type_i from can_core.vhd +- Offset: `0x1ec` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_rec_frame_type_i +Auto-extracted signal rec_frame_type_i from can_core.vhd +- Offset: `0x1f0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_rec_is_rtr_i +Auto-extracted signal rec_is_rtr_i from can_core.vhd +- Offset: `0x1f4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_rec_brs_i +Auto-extracted signal rec_brs_i from can_core.vhd +- Offset: `0x1f8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_rec_esi_i +Auto-extracted signal rec_esi_i from can_core.vhd +- Offset: `0x1fc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_alc +Auto-extracted signal alc from can_core.vhd +- Offset: `0x200` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_erc_capture +Auto-extracted signal erc_capture from can_core.vhd +- Offset: `0x204` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_transmitter +Auto-extracted signal is_transmitter from can_core.vhd +- Offset: `0x208` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_receiver +Auto-extracted signal is_receiver from can_core.vhd +- Offset: `0x20c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_idle +Auto-extracted signal is_idle from can_core.vhd +- Offset: `0x210` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_arbitration_lost_i +Auto-extracted signal arbitration_lost_i from can_core.vhd +- Offset: `0x214` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_set_transmitter +Auto-extracted signal set_transmitter from can_core.vhd +- Offset: `0x218` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_set_receiver +Auto-extracted signal set_receiver from can_core.vhd +- Offset: `0x21c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_set_idle +Auto-extracted signal set_idle from can_core.vhd +- Offset: `0x220` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_err_active +Auto-extracted signal is_err_active from can_core.vhd +- Offset: `0x224` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_err_passive +Auto-extracted signal is_err_passive from can_core.vhd +- Offset: `0x228` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_bus_off_i +Auto-extracted signal is_bus_off_i from can_core.vhd +- Offset: `0x22c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_err_detected_i +Auto-extracted signal err_detected_i from can_core.vhd +- Offset: `0x230` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_primary_err +Auto-extracted signal primary_err from can_core.vhd +- Offset: `0x234` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_act_err_ovr_flag +Auto-extracted signal act_err_ovr_flag from can_core.vhd +- Offset: `0x238` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_err_delim_late +Auto-extracted signal err_delim_late from can_core.vhd +- Offset: `0x23c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_set_err_active +Auto-extracted signal set_err_active from can_core.vhd +- Offset: `0x240` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_err_ctrs_unchanged +Auto-extracted signal err_ctrs_unchanged from can_core.vhd +- Offset: `0x244` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_stuff_enable +Auto-extracted signal stuff_enable from can_core.vhd +- Offset: `0x248` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_destuff_enable +Auto-extracted signal destuff_enable from can_core.vhd +- Offset: `0x24c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_fixed_stuff +Auto-extracted signal fixed_stuff from can_core.vhd +- Offset: `0x250` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_tx_frame_no_sof +Auto-extracted signal tx_frame_no_sof from can_core.vhd +- Offset: `0x254` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_stuff_length +Auto-extracted signal stuff_length from can_core.vhd +- Offset: `0x258` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_dst_ctr +Auto-extracted signal dst_ctr from can_core.vhd +- Offset: `0x25c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_bst_ctr +Auto-extracted signal bst_ctr from can_core.vhd +- Offset: `0x260` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_stuff_err +Auto-extracted signal stuff_err from can_core.vhd +- Offset: `0x264` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_enable +Auto-extracted signal crc_enable from can_core.vhd +- Offset: `0x268` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_spec_enable +Auto-extracted signal crc_spec_enable from can_core.vhd +- Offset: `0x26c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_calc_from_rx +Auto-extracted signal crc_calc_from_rx from can_core.vhd +- Offset: `0x270` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_15 +Auto-extracted signal crc_15 from can_core.vhd +- Offset: `0x274` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_17 +Auto-extracted signal crc_17 from can_core.vhd +- Offset: `0x278` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_21 +Auto-extracted signal crc_21 from can_core.vhd +- Offset: `0x27c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_sp_control_i +Auto-extracted signal sp_control_i from can_core.vhd +- Offset: `0x280` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_sp_control_q +Auto-extracted signal sp_control_q from can_core.vhd +- Offset: `0x284` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_sync_control_i +Auto-extracted signal sync_control_i from can_core.vhd +- Offset: `0x288` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_ssp_reset_i +Auto-extracted signal ssp_reset_i from can_core.vhd +- Offset: `0x28c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_tran_delay_meas_i +Auto-extracted signal tran_delay_meas_i from can_core.vhd +- Offset: `0x290` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_tran_valid_i +Auto-extracted signal tran_valid_i from can_core.vhd +- Offset: `0x294` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_rec_valid_i +Auto-extracted signal rec_valid_i from can_core.vhd +- Offset: `0x298` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_br_shifted_i +Auto-extracted signal br_shifted_i from can_core.vhd +- Offset: `0x29c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_fcs_changed_i +Auto-extracted signal fcs_changed_i from can_core.vhd +- Offset: `0x2a0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_err_warning_limit_i +Auto-extracted signal err_warning_limit_i from can_core.vhd +- Offset: `0x2a4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_tx_err_ctr +Auto-extracted signal tx_err_ctr from can_core.vhd +- Offset: `0x2a8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_rx_err_ctr +Auto-extracted signal rx_err_ctr from can_core.vhd +- Offset: `0x2ac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_norm_err_ctr +Auto-extracted signal norm_err_ctr from can_core.vhd +- Offset: `0x2b0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_data_err_ctr +Auto-extracted signal data_err_ctr from can_core.vhd +- Offset: `0x2b4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_pc_tx_trigger +Auto-extracted signal pc_tx_trigger from can_core.vhd +- Offset: `0x2b8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_pc_rx_trigger +Auto-extracted signal pc_rx_trigger from can_core.vhd +- Offset: `0x2bc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_pc_tx_data_nbs +Auto-extracted signal pc_tx_data_nbs from can_core.vhd +- Offset: `0x2c0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_pc_rx_data_nbs +Auto-extracted signal pc_rx_data_nbs from can_core.vhd +- Offset: `0x2c4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_data_tx_wbs +Auto-extracted signal crc_data_tx_wbs from can_core.vhd +- Offset: `0x2c8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_data_tx_nbs +Auto-extracted signal crc_data_tx_nbs from can_core.vhd +- Offset: `0x2cc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_data_rx_wbs +Auto-extracted signal crc_data_rx_wbs from can_core.vhd +- Offset: `0x2d0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_data_rx_nbs +Auto-extracted signal crc_data_rx_nbs from can_core.vhd +- Offset: `0x2d4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_trig_tx_wbs +Auto-extracted signal crc_trig_tx_wbs from can_core.vhd +- Offset: `0x2d8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_trig_tx_nbs +Auto-extracted signal crc_trig_tx_nbs from can_core.vhd +- Offset: `0x2dc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_trig_rx_wbs +Auto-extracted signal crc_trig_rx_wbs from can_core.vhd +- Offset: `0x2e0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_trig_rx_nbs +Auto-extracted signal crc_trig_rx_nbs from can_core.vhd +- Offset: `0x2e4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_bst_data_in +Auto-extracted signal bst_data_in from can_core.vhd +- Offset: `0x2e8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_bst_data_out +Auto-extracted signal bst_data_out from can_core.vhd +- Offset: `0x2ec` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_bst_trigger +Auto-extracted signal bst_trigger from can_core.vhd +- Offset: `0x2f0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_data_halt +Auto-extracted signal data_halt from can_core.vhd +- Offset: `0x2f4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_bds_data_in +Auto-extracted signal bds_data_in from can_core.vhd +- Offset: `0x2f8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_bds_data_out +Auto-extracted signal bds_data_out from can_core.vhd +- Offset: `0x2fc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_bds_trigger +Auto-extracted signal bds_trigger from can_core.vhd +- Offset: `0x300` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_destuffed +Auto-extracted signal destuffed from can_core.vhd +- Offset: `0x304` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_tx_ctr +Auto-extracted signal tx_ctr from can_core.vhd +- Offset: `0x308` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_rx_ctr +Auto-extracted signal rx_ctr from can_core.vhd +- Offset: `0x30c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_tx_data_wbs_i +Auto-extracted signal tx_data_wbs_i from can_core.vhd +- Offset: `0x310` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_lpb_dominant +Auto-extracted signal lpb_dominant from can_core.vhd +- Offset: `0x314` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_form_err +Auto-extracted signal form_err from can_core.vhd +- Offset: `0x318` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_ack_err +Auto-extracted signal ack_err from can_core.vhd +- Offset: `0x31c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_err +Auto-extracted signal crc_err from can_core.vhd +- Offset: `0x320` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_arbitration +Auto-extracted signal is_arbitration from can_core.vhd +- Offset: `0x324` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_control +Auto-extracted signal is_control from can_core.vhd +- Offset: `0x328` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_data +Auto-extracted signal is_data from can_core.vhd +- Offset: `0x32c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_stuff_count +Auto-extracted signal is_stuff_count from can_core.vhd +- Offset: `0x330` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_crc +Auto-extracted signal is_crc from can_core.vhd +- Offset: `0x334` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_crc_delim +Auto-extracted signal is_crc_delim from can_core.vhd +- Offset: `0x338` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_ack_field +Auto-extracted signal is_ack_field from can_core.vhd +- Offset: `0x33c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_ack_delim +Auto-extracted signal is_ack_delim from can_core.vhd +- Offset: `0x340` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_eof +Auto-extracted signal is_eof from can_core.vhd +- Offset: `0x344` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_err_frm +Auto-extracted signal is_err_frm from can_core.vhd +- Offset: `0x348` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_intermission +Auto-extracted signal is_intermission from can_core.vhd +- Offset: `0x34c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_suspend +Auto-extracted signal is_suspend from can_core.vhd +- Offset: `0x350` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_overload_i +Auto-extracted signal is_overload_i from can_core.vhd +- Offset: `0x354` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_sof +Auto-extracted signal is_sof from can_core.vhd +- Offset: `0x358` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_sof_pulse_i +Auto-extracted signal sof_pulse_i from can_core.vhd +- Offset: `0x35c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_load_init_vect +Auto-extracted signal load_init_vect from can_core.vhd +- Offset: `0x360` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_retr_ctr_i +Auto-extracted signal retr_ctr_i from can_core.vhd +- Offset: `0x364` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_decrement_rec +Auto-extracted signal decrement_rec from can_core.vhd +- Offset: `0x368` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_bit_err_after_ack_err +Auto-extracted signal bit_err_after_ack_err from can_core.vhd +- Offset: `0x36c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_pexs +Auto-extracted signal is_pexs from can_core.vhd +- Offset: `0x370` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_crc_drv_fd_type +Auto-extracted signal drv_fd_type from can_crc.vhd +- Offset: `0x374` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_crc_init_vect_15 +Auto-extracted signal init_vect_15 from can_crc.vhd +- Offset: `0x378` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_crc_init_vect_17 +Auto-extracted signal init_vect_17 from can_crc.vhd +- Offset: `0x37c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_crc_init_vect_21 +Auto-extracted signal init_vect_21 from can_crc.vhd +- Offset: `0x380` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_crc_crc_17_21_data_in +Auto-extracted signal crc_17_21_data_in from can_crc.vhd +- Offset: `0x384` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_crc_crc_17_21_trigger +Auto-extracted signal crc_17_21_trigger from can_crc.vhd +- Offset: `0x388` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_crc_crc_15_data_in +Auto-extracted signal crc_15_data_in from can_crc.vhd +- Offset: `0x38c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_crc_crc_15_trigger +Auto-extracted signal crc_15_trigger from can_crc.vhd +- Offset: `0x390` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_crc_crc_ena_15 +Auto-extracted signal crc_ena_15 from can_crc.vhd +- Offset: `0x394` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_crc_crc_ena_17_21 +Auto-extracted signal crc_ena_17_21 from can_crc.vhd +- Offset: `0x398` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_ahb_ctu_can_data_in +Auto-extracted signal ctu_can_data_in from can_top_ahb.vhd +- Offset: `0x39c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_ahb_ctu_can_data_out +Auto-extracted signal ctu_can_data_out from can_top_ahb.vhd +- Offset: `0x3a0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_ahb_ctu_can_adress +Auto-extracted signal ctu_can_adress from can_top_ahb.vhd +- Offset: `0x3a4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_ahb_ctu_can_scs +Auto-extracted signal ctu_can_scs from can_top_ahb.vhd +- Offset: `0x3a8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_ahb_ctu_can_srd +Auto-extracted signal ctu_can_srd from can_top_ahb.vhd +- Offset: `0x3ac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_ahb_ctu_can_swr +Auto-extracted signal ctu_can_swr from can_top_ahb.vhd +- Offset: `0x3b0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_ahb_ctu_can_sbe +Auto-extracted signal ctu_can_sbe from can_top_ahb.vhd +- Offset: `0x3b4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_ahb_res_n_out_i +Auto-extracted signal res_n_out_i from can_top_ahb.vhd +- Offset: `0x3b8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_apb_reg_data_in +Auto-extracted signal reg_data_in from can_top_apb.vhd +- Offset: `0x3bc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_apb_reg_data_out +Auto-extracted signal reg_data_out from can_top_apb.vhd +- Offset: `0x3c0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_apb_reg_addr +Auto-extracted signal reg_addr from can_top_apb.vhd +- Offset: `0x3c4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_apb_reg_be +Auto-extracted signal reg_be from can_top_apb.vhd +- Offset: `0x3c8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_apb_reg_rden +Auto-extracted signal reg_rden from can_top_apb.vhd +- Offset: `0x3cc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_apb_reg_wren +Auto-extracted signal reg_wren from can_top_apb.vhd +- Offset: `0x3d0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_drv_bus +Auto-extracted signal drv_bus from can_top_level.vhd +- Offset: `0x3d4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_stat_bus +Auto-extracted signal stat_bus from can_top_level.vhd +- Offset: `0x3d8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_res_n_sync +Auto-extracted signal res_n_sync from can_top_level.vhd +- Offset: `0x3dc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_res_core_n +Auto-extracted signal res_core_n from can_top_level.vhd +- Offset: `0x3e0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_res_soft_n +Auto-extracted signal res_soft_n from can_top_level.vhd +- Offset: `0x3e4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_sp_control +Auto-extracted signal sp_control from can_top_level.vhd +- Offset: `0x3e8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rx_buf_size +Auto-extracted signal rx_buf_size from can_top_level.vhd +- Offset: `0x3ec` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rx_full +Auto-extracted signal rx_full from can_top_level.vhd +- Offset: `0x3f0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rx_empty +Auto-extracted signal rx_empty from can_top_level.vhd +- Offset: `0x3f4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rx_frame_count +Auto-extracted signal rx_frame_count from can_top_level.vhd +- Offset: `0x3f8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rx_mem_free +Auto-extracted signal rx_mem_free from can_top_level.vhd +- Offset: `0x3fc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rx_read_pointer +Auto-extracted signal rx_read_pointer from can_top_level.vhd +- Offset: `0x400` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rx_write_pointer +Auto-extracted signal rx_write_pointer from can_top_level.vhd +- Offset: `0x404` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rx_data_overrun +Auto-extracted signal rx_data_overrun from can_top_level.vhd +- Offset: `0x408` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rx_read_buff +Auto-extracted signal rx_read_buff from can_top_level.vhd +- Offset: `0x40c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rx_mof +Auto-extracted signal rx_mof from can_top_level.vhd +- Offset: `0x410` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_txtb_port_a_data +Auto-extracted signal txtb_port_a_data from can_top_level.vhd +- Offset: `0x414` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_txtb_port_a_address +Auto-extracted signal txtb_port_a_address from can_top_level.vhd +- Offset: `0x418` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_txtb_port_a_cs +Auto-extracted signal txtb_port_a_cs from can_top_level.vhd +- Offset: `0x41c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_txtb_port_a_be +Auto-extracted signal txtb_port_a_be from can_top_level.vhd +- Offset: `0x420` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_txtb_sw_cmd_index +Auto-extracted signal txtb_sw_cmd_index from can_top_level.vhd +- Offset: `0x424` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_txt_buf_failed_bof +Auto-extracted signal txt_buf_failed_bof from can_top_level.vhd +- Offset: `0x428` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_int_vector +Auto-extracted signal int_vector from can_top_level.vhd +- Offset: `0x42c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_int_ena +Auto-extracted signal int_ena from can_top_level.vhd +- Offset: `0x430` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_int_mask +Auto-extracted signal int_mask from can_top_level.vhd +- Offset: `0x434` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rec_ident +Auto-extracted signal rec_ident from can_top_level.vhd +- Offset: `0x438` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rec_dlc +Auto-extracted signal rec_dlc from can_top_level.vhd +- Offset: `0x43c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rec_ident_type +Auto-extracted signal rec_ident_type from can_top_level.vhd +- Offset: `0x440` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rec_frame_type +Auto-extracted signal rec_frame_type from can_top_level.vhd +- Offset: `0x444` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rec_is_rtr +Auto-extracted signal rec_is_rtr from can_top_level.vhd +- Offset: `0x448` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rec_brs +Auto-extracted signal rec_brs from can_top_level.vhd +- Offset: `0x44c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rec_esi +Auto-extracted signal rec_esi from can_top_level.vhd +- Offset: `0x450` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_store_data_word +Auto-extracted signal store_data_word from can_top_level.vhd +- Offset: `0x454` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_sof_pulse +Auto-extracted signal sof_pulse from can_top_level.vhd +- Offset: `0x458` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_store_metadata +Auto-extracted signal store_metadata from can_top_level.vhd +- Offset: `0x45c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_store_data +Auto-extracted signal store_data from can_top_level.vhd +- Offset: `0x460` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rec_valid +Auto-extracted signal rec_valid from can_top_level.vhd +- Offset: `0x464` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rec_abort +Auto-extracted signal rec_abort from can_top_level.vhd +- Offset: `0x468` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_store_metadata_f +Auto-extracted signal store_metadata_f from can_top_level.vhd +- Offset: `0x46c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_store_data_f +Auto-extracted signal store_data_f from can_top_level.vhd +- Offset: `0x470` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rec_valid_f +Auto-extracted signal rec_valid_f from can_top_level.vhd +- Offset: `0x474` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rec_abort_f +Auto-extracted signal rec_abort_f from can_top_level.vhd +- Offset: `0x478` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_txtb_hw_cmd_int +Auto-extracted signal txtb_hw_cmd_int from can_top_level.vhd +- Offset: `0x47c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_is_bus_off +Auto-extracted signal is_bus_off from can_top_level.vhd +- Offset: `0x480` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_txtb_available +Auto-extracted signal txtb_available from can_top_level.vhd +- Offset: `0x484` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_txtb_port_b_clk_en +Auto-extracted signal txtb_port_b_clk_en from can_top_level.vhd +- Offset: `0x488` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_tran_dlc +Auto-extracted signal tran_dlc from can_top_level.vhd +- Offset: `0x48c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_tran_is_rtr +Auto-extracted signal tran_is_rtr from can_top_level.vhd +- Offset: `0x490` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_tran_ident_type +Auto-extracted signal tran_ident_type from can_top_level.vhd +- Offset: `0x494` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_tran_frame_type +Auto-extracted signal tran_frame_type from can_top_level.vhd +- Offset: `0x498` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_tran_brs +Auto-extracted signal tran_brs from can_top_level.vhd +- Offset: `0x49c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_tran_identifier +Auto-extracted signal tran_identifier from can_top_level.vhd +- Offset: `0x4a0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_tran_word +Auto-extracted signal tran_word from can_top_level.vhd +- Offset: `0x4a4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_tran_frame_valid +Auto-extracted signal tran_frame_valid from can_top_level.vhd +- Offset: `0x4a8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_txtb_changed +Auto-extracted signal txtb_changed from can_top_level.vhd +- Offset: `0x4ac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_txtb_clk_en +Auto-extracted signal txtb_clk_en from can_top_level.vhd +- Offset: `0x4b0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_err_detected +Auto-extracted signal err_detected from can_top_level.vhd +- Offset: `0x4b4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_fcs_changed +Auto-extracted signal fcs_changed from can_top_level.vhd +- Offset: `0x4b8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_err_warning_limit +Auto-extracted signal err_warning_limit from can_top_level.vhd +- Offset: `0x4bc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_arbitration_lost +Auto-extracted signal arbitration_lost from can_top_level.vhd +- Offset: `0x4c0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_tran_valid +Auto-extracted signal tran_valid from can_top_level.vhd +- Offset: `0x4c4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_br_shifted +Auto-extracted signal br_shifted from can_top_level.vhd +- Offset: `0x4c8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_is_overload +Auto-extracted signal is_overload from can_top_level.vhd +- Offset: `0x4cc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rx_triggers +Auto-extracted signal rx_triggers from can_top_level.vhd +- Offset: `0x4d0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_tx_trigger +Auto-extracted signal tx_trigger from can_top_level.vhd +- Offset: `0x4d4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_sync_control +Auto-extracted signal sync_control from can_top_level.vhd +- Offset: `0x4d8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_no_pos_resync +Auto-extracted signal no_pos_resync from can_top_level.vhd +- Offset: `0x4dc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_nbt_ctrs_en +Auto-extracted signal nbt_ctrs_en from can_top_level.vhd +- Offset: `0x4e0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_dbt_ctrs_en +Auto-extracted signal dbt_ctrs_en from can_top_level.vhd +- Offset: `0x4e4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_trv_delay +Auto-extracted signal trv_delay from can_top_level.vhd +- Offset: `0x4e8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rx_data_wbs +Auto-extracted signal rx_data_wbs from can_top_level.vhd +- Offset: `0x4ec` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_tx_data_wbs +Auto-extracted signal tx_data_wbs from can_top_level.vhd +- Offset: `0x4f0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_ssp_reset +Auto-extracted signal ssp_reset from can_top_level.vhd +- Offset: `0x4f4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_tran_delay_meas +Auto-extracted signal tran_delay_meas from can_top_level.vhd +- Offset: `0x4f8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_bit_err +Auto-extracted signal bit_err from can_top_level.vhd +- Offset: `0x4fc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_sample_sec +Auto-extracted signal sample_sec from can_top_level.vhd +- Offset: `0x500` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_btmc_reset +Auto-extracted signal btmc_reset from can_top_level.vhd +- Offset: `0x504` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_dbt_measure_start +Auto-extracted signal dbt_measure_start from can_top_level.vhd +- Offset: `0x508` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_gen_first_ssp +Auto-extracted signal gen_first_ssp from can_top_level.vhd +- Offset: `0x50c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_sync_edge +Auto-extracted signal sync_edge from can_top_level.vhd +- Offset: `0x510` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_tq_edge +Auto-extracted signal tq_edge from can_top_level.vhd +- Offset: `0x514` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_tst_rdata_rx_buf +Auto-extracted signal tst_rdata_rx_buf from can_top_level.vhd +- Offset: `0x518` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## clk_gate_clk_en_q +Auto-extracted signal clk_en_q from clk_gate.vhd +- Offset: `0x51c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## control_counter_ctrl_ctr_ce +Auto-extracted signal ctrl_ctr_ce from control_counter.vhd +- Offset: `0x520` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## control_counter_compl_ctr_ce +Auto-extracted signal compl_ctr_ce from control_counter.vhd +- Offset: `0x524` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## control_registers_reg_map_reg_sel +Auto-extracted signal reg_sel from control_registers_reg_map.vhd +- Offset: `0x528` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## control_registers_reg_map_read_data_mux_in +Auto-extracted signal read_data_mux_in from control_registers_reg_map.vhd +- Offset: `0x52c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## control_registers_reg_map_read_data_mask_n +Auto-extracted signal read_data_mask_n from control_registers_reg_map.vhd +- Offset: `0x530` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## control_registers_reg_map_read_mux_ena +Auto-extracted signal read_mux_ena from control_registers_reg_map.vhd +- Offset: `0x534` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## crc_calc_crc_q +Auto-extracted signal crc_q from crc_calc.vhd +- Offset: `0x538` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## crc_calc_crc_nxt +Auto-extracted signal crc_nxt from crc_calc.vhd +- Offset: `0x53c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## crc_calc_crc_shift +Auto-extracted signal crc_shift from crc_calc.vhd +- Offset: `0x540` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## crc_calc_crc_shift_n_xor +Auto-extracted signal crc_shift_n_xor from crc_calc.vhd +- Offset: `0x544` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## crc_calc_crc_d +Auto-extracted signal crc_d from crc_calc.vhd +- Offset: `0x548` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## crc_calc_crc_ce +Auto-extracted signal crc_ce from crc_calc.vhd +- Offset: `0x54c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## data_edge_detector_rx_data_prev +Auto-extracted signal rx_data_prev from data_edge_detector.vhd +- Offset: `0x550` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## data_edge_detector_tx_data_prev +Auto-extracted signal tx_data_prev from data_edge_detector.vhd +- Offset: `0x554` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## data_edge_detector_rx_data_sync_prev +Auto-extracted signal rx_data_sync_prev from data_edge_detector.vhd +- Offset: `0x558` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## data_edge_detector_rx_edge_i +Auto-extracted signal rx_edge_i from data_edge_detector.vhd +- Offset: `0x55c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## data_edge_detector_tx_edge_i +Auto-extracted signal tx_edge_i from data_edge_detector.vhd +- Offset: `0x560` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## data_mux_sel_data +Auto-extracted signal sel_data from data_mux.vhd +- Offset: `0x564` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## data_mux_saturated_data +Auto-extracted signal saturated_data from data_mux.vhd +- Offset: `0x568` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## data_mux_masked_data +Auto-extracted signal masked_data from data_mux.vhd +- Offset: `0x56c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## dlc_decoder_data_len_8_to_64 +Auto-extracted signal data_len_8_to_64 from dlc_decoder.vhd +- Offset: `0x570` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## dlc_decoder_data_len_can_2_0 +Auto-extracted signal data_len_can_2_0 from dlc_decoder.vhd +- Offset: `0x574` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## dlc_decoder_data_len_can_fd +Auto-extracted signal data_len_can_fd from dlc_decoder.vhd +- Offset: `0x578` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## endian_swapper_swapped +Auto-extracted signal swapped from endian_swapper.vhd +- Offset: `0x57c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_counters_tx_err_ctr_ce +Auto-extracted signal tx_err_ctr_ce from err_counters.vhd +- Offset: `0x580` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_counters_rx_err_ctr_ce +Auto-extracted signal rx_err_ctr_ce from err_counters.vhd +- Offset: `0x584` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_counters_modif_tx_ctr +Auto-extracted signal modif_tx_ctr from err_counters.vhd +- Offset: `0x588` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_counters_modif_rx_ctr +Auto-extracted signal modif_rx_ctr from err_counters.vhd +- Offset: `0x58c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_counters_nom_err_ctr_ce +Auto-extracted signal nom_err_ctr_ce from err_counters.vhd +- Offset: `0x590` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_counters_data_err_ctr_ce +Auto-extracted signal data_err_ctr_ce from err_counters.vhd +- Offset: `0x594` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_counters_res_err_ctrs_d +Auto-extracted signal res_err_ctrs_d from err_counters.vhd +- Offset: `0x598` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_counters_res_err_ctrs_q +Auto-extracted signal res_err_ctrs_q from err_counters.vhd +- Offset: `0x59c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_counters_res_err_ctrs_q_scan +Auto-extracted signal res_err_ctrs_q_scan from err_counters.vhd +- Offset: `0x5a0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_err_frm_req_i +Auto-extracted signal err_frm_req_i from err_detector.vhd +- Offset: `0x5a4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_err_type_d +Auto-extracted signal err_type_d from err_detector.vhd +- Offset: `0x5a8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_err_type_q +Auto-extracted signal err_type_q from err_detector.vhd +- Offset: `0x5ac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_err_pos_q +Auto-extracted signal err_pos_q from err_detector.vhd +- Offset: `0x5b0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_form_err_i +Auto-extracted signal form_err_i from err_detector.vhd +- Offset: `0x5b4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_crc_match_c +Auto-extracted signal crc_match_c from err_detector.vhd +- Offset: `0x5b8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_crc_match_d +Auto-extracted signal crc_match_d from err_detector.vhd +- Offset: `0x5bc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_crc_match_q +Auto-extracted signal crc_match_q from err_detector.vhd +- Offset: `0x5c0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_dst_ctr_grey +Auto-extracted signal dst_ctr_grey from err_detector.vhd +- Offset: `0x5c4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_dst_parity +Auto-extracted signal dst_parity from err_detector.vhd +- Offset: `0x5c8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_stuff_count_check +Auto-extracted signal stuff_count_check from err_detector.vhd +- Offset: `0x5cc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_crc_15_ok +Auto-extracted signal crc_15_ok from err_detector.vhd +- Offset: `0x5d0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_crc_17_ok +Auto-extracted signal crc_17_ok from err_detector.vhd +- Offset: `0x5d4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_crc_21_ok +Auto-extracted signal crc_21_ok from err_detector.vhd +- Offset: `0x5d8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_stuff_count_ok +Auto-extracted signal stuff_count_ok from err_detector.vhd +- Offset: `0x5dc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_rx_crc_15 +Auto-extracted signal rx_crc_15 from err_detector.vhd +- Offset: `0x5e0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_rx_crc_17 +Auto-extracted signal rx_crc_17 from err_detector.vhd +- Offset: `0x5e4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_rx_crc_21 +Auto-extracted signal rx_crc_21 from err_detector.vhd +- Offset: `0x5e8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_drv_ewl +Auto-extracted signal drv_ewl from fault_confinement.vhd +- Offset: `0x5ec` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_drv_erp +Auto-extracted signal drv_erp from fault_confinement.vhd +- Offset: `0x5f0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_drv_ctr_val +Auto-extracted signal drv_ctr_val from fault_confinement.vhd +- Offset: `0x5f4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_drv_ctr_sel +Auto-extracted signal drv_ctr_sel from fault_confinement.vhd +- Offset: `0x5f8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_drv_ena +Auto-extracted signal drv_ena from fault_confinement.vhd +- Offset: `0x5fc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_tx_err_ctr_i +Auto-extracted signal tx_err_ctr_i from fault_confinement.vhd +- Offset: `0x600` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_rx_err_ctr_i +Auto-extracted signal rx_err_ctr_i from fault_confinement.vhd +- Offset: `0x604` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_inc_one +Auto-extracted signal inc_one from fault_confinement.vhd +- Offset: `0x608` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_inc_eight +Auto-extracted signal inc_eight from fault_confinement.vhd +- Offset: `0x60c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_dec_one +Auto-extracted signal dec_one from fault_confinement.vhd +- Offset: `0x610` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_drv_rom_ena +Auto-extracted signal drv_rom_ena from fault_confinement.vhd +- Offset: `0x614` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_fsm_tx_err_ctr_mt_erp +Auto-extracted signal tx_err_ctr_mt_erp from fault_confinement_fsm.vhd +- Offset: `0x618` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_fsm_rx_err_ctr_mt_erp +Auto-extracted signal rx_err_ctr_mt_erp from fault_confinement_fsm.vhd +- Offset: `0x61c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_fsm_tx_err_ctr_mt_ewl +Auto-extracted signal tx_err_ctr_mt_ewl from fault_confinement_fsm.vhd +- Offset: `0x620` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_fsm_rx_err_ctr_mt_ewl +Auto-extracted signal rx_err_ctr_mt_ewl from fault_confinement_fsm.vhd +- Offset: `0x624` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_fsm_tx_err_ctr_mt_255 +Auto-extracted signal tx_err_ctr_mt_255 from fault_confinement_fsm.vhd +- Offset: `0x628` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_fsm_err_warning_limit_d +Auto-extracted signal err_warning_limit_d from fault_confinement_fsm.vhd +- Offset: `0x62c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_fsm_err_warning_limit_q +Auto-extracted signal err_warning_limit_q from fault_confinement_fsm.vhd +- Offset: `0x630` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_fsm_fc_fsm_res_d +Auto-extracted signal fc_fsm_res_d from fault_confinement_fsm.vhd +- Offset: `0x634` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_fsm_fc_fsm_res_q +Auto-extracted signal fc_fsm_res_q from fault_confinement_fsm.vhd +- Offset: `0x638` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_rules_inc_one_i +Auto-extracted signal inc_one_i from fault_confinement_rules.vhd +- Offset: `0x63c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_rules_inc_eight_i +Auto-extracted signal inc_eight_i from fault_confinement_rules.vhd +- Offset: `0x640` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drv_filter_A_mask +Auto-extracted signal drv_filter_A_mask from frame_filters.vhd +- Offset: `0x644` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drv_filter_A_ctrl +Auto-extracted signal drv_filter_A_ctrl from frame_filters.vhd +- Offset: `0x648` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drv_filter_A_bits +Auto-extracted signal drv_filter_A_bits from frame_filters.vhd +- Offset: `0x64c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_int_filter_A_valid +Auto-extracted signal int_filter_A_valid from frame_filters.vhd +- Offset: `0x650` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drv_filter_B_mask +Auto-extracted signal drv_filter_B_mask from frame_filters.vhd +- Offset: `0x654` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drv_filter_B_ctrl +Auto-extracted signal drv_filter_B_ctrl from frame_filters.vhd +- Offset: `0x658` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drv_filter_B_bits +Auto-extracted signal drv_filter_B_bits from frame_filters.vhd +- Offset: `0x65c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_int_filter_B_valid +Auto-extracted signal int_filter_B_valid from frame_filters.vhd +- Offset: `0x660` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drv_filter_C_mask +Auto-extracted signal drv_filter_C_mask from frame_filters.vhd +- Offset: `0x664` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drv_filter_C_ctrl +Auto-extracted signal drv_filter_C_ctrl from frame_filters.vhd +- Offset: `0x668` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drv_filter_C_bits +Auto-extracted signal drv_filter_C_bits from frame_filters.vhd +- Offset: `0x66c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_int_filter_C_valid +Auto-extracted signal int_filter_C_valid from frame_filters.vhd +- Offset: `0x670` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drv_filter_ran_ctrl +Auto-extracted signal drv_filter_ran_ctrl from frame_filters.vhd +- Offset: `0x674` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drv_filter_ran_lo_th +Auto-extracted signal drv_filter_ran_lo_th from frame_filters.vhd +- Offset: `0x678` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drv_filter_ran_hi_th +Auto-extracted signal drv_filter_ran_hi_th from frame_filters.vhd +- Offset: `0x67c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_int_filter_ran_valid +Auto-extracted signal int_filter_ran_valid from frame_filters.vhd +- Offset: `0x680` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drv_filters_ena +Auto-extracted signal drv_filters_ena from frame_filters.vhd +- Offset: `0x684` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_int_data_type +Auto-extracted signal int_data_type from frame_filters.vhd +- Offset: `0x688` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_int_data_ctrl +Auto-extracted signal int_data_ctrl from frame_filters.vhd +- Offset: `0x68c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_filter_A_enable +Auto-extracted signal filter_A_enable from frame_filters.vhd +- Offset: `0x690` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_filter_B_enable +Auto-extracted signal filter_B_enable from frame_filters.vhd +- Offset: `0x694` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_filter_C_enable +Auto-extracted signal filter_C_enable from frame_filters.vhd +- Offset: `0x698` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_filter_range_enable +Auto-extracted signal filter_range_enable from frame_filters.vhd +- Offset: `0x69c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_filter_result +Auto-extracted signal filter_result from frame_filters.vhd +- Offset: `0x6a0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_ident_valid_d +Auto-extracted signal ident_valid_d from frame_filters.vhd +- Offset: `0x6a4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_ident_valid_q +Auto-extracted signal ident_valid_q from frame_filters.vhd +- Offset: `0x6a8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drv_drop_remote_frames +Auto-extracted signal drv_drop_remote_frames from frame_filters.vhd +- Offset: `0x6ac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drop_rtr_frame +Auto-extracted signal drop_rtr_frame from frame_filters.vhd +- Offset: `0x6b0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## inf_ram_wrapper_int_read_data +Auto-extracted signal int_read_data from inf_ram_wrapper.vhd +- Offset: `0x6b4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## inf_ram_wrapper_byte_we +Auto-extracted signal byte_we from inf_ram_wrapper.vhd +- Offset: `0x6b8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## int_manager_drv_int_vect_clr +Auto-extracted signal drv_int_vect_clr from int_manager.vhd +- Offset: `0x6bc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## int_manager_drv_int_ena_set +Auto-extracted signal drv_int_ena_set from int_manager.vhd +- Offset: `0x6c0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## int_manager_drv_int_ena_clr +Auto-extracted signal drv_int_ena_clr from int_manager.vhd +- Offset: `0x6c4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## int_manager_drv_int_mask_set +Auto-extracted signal drv_int_mask_set from int_manager.vhd +- Offset: `0x6c8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## int_manager_drv_int_mask_clr +Auto-extracted signal drv_int_mask_clr from int_manager.vhd +- Offset: `0x6cc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## int_manager_int_ena_i +Auto-extracted signal int_ena_i from int_manager.vhd +- Offset: `0x6d0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## int_manager_int_mask_i +Auto-extracted signal int_mask_i from int_manager.vhd +- Offset: `0x6d4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## int_manager_int_vect_i +Auto-extracted signal int_vect_i from int_manager.vhd +- Offset: `0x6d8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## int_manager_int_input_active +Auto-extracted signal int_input_active from int_manager.vhd +- Offset: `0x6dc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## int_manager_int_i +Auto-extracted signal int_i from int_manager.vhd +- Offset: `0x6e0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## int_module_int_mask_i +Auto-extracted signal int_mask_i from int_module.vhd +- Offset: `0x6e4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## int_module_int_ena_i +Auto-extracted signal int_ena_i from int_module.vhd +- Offset: `0x6e8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## int_module_int_mask_load +Auto-extracted signal int_mask_load from int_module.vhd +- Offset: `0x6ec` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## int_module_int_mask_next +Auto-extracted signal int_mask_next from int_module.vhd +- Offset: `0x6f0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_reg_reg_value_r +Auto-extracted signal reg_value_r from memory_reg.vhd +- Offset: `0x6f4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_reg_wr_select +Auto-extracted signal wr_select from memory_reg.vhd +- Offset: `0x6f8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_reg_wr_select_expanded +Auto-extracted signal wr_select_expanded from memory_reg.vhd +- Offset: `0x6fc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_status_comb +Auto-extracted signal status_comb from memory_registers.vhd +- Offset: `0x700` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_can_core_cs +Auto-extracted signal can_core_cs from memory_registers.vhd +- Offset: `0x704` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_control_registers_cs +Auto-extracted signal control_registers_cs from memory_registers.vhd +- Offset: `0x708` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_control_registers_cs_reg +Auto-extracted signal control_registers_cs_reg from memory_registers.vhd +- Offset: `0x70c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_test_registers_cs +Auto-extracted signal test_registers_cs from memory_registers.vhd +- Offset: `0x710` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_test_registers_cs_reg +Auto-extracted signal test_registers_cs_reg from memory_registers.vhd +- Offset: `0x714` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_control_registers_rdata +Auto-extracted signal control_registers_rdata from memory_registers.vhd +- Offset: `0x718` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_test_registers_rdata +Auto-extracted signal test_registers_rdata from memory_registers.vhd +- Offset: `0x71c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_is_err_active +Auto-extracted signal is_err_active from memory_registers.vhd +- Offset: `0x720` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_is_err_passive +Auto-extracted signal is_err_passive from memory_registers.vhd +- Offset: `0x724` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_is_bus_off +Auto-extracted signal is_bus_off from memory_registers.vhd +- Offset: `0x728` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_is_transmitter +Auto-extracted signal is_transmitter from memory_registers.vhd +- Offset: `0x72c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_is_receiver +Auto-extracted signal is_receiver from memory_registers.vhd +- Offset: `0x730` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_is_idle +Auto-extracted signal is_idle from memory_registers.vhd +- Offset: `0x734` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_reg_lock_1_active +Auto-extracted signal reg_lock_1_active from memory_registers.vhd +- Offset: `0x738` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_reg_lock_2_active +Auto-extracted signal reg_lock_2_active from memory_registers.vhd +- Offset: `0x73c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_soft_res_q_n +Auto-extracted signal soft_res_q_n from memory_registers.vhd +- Offset: `0x740` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_ewl_padded +Auto-extracted signal ewl_padded from memory_registers.vhd +- Offset: `0x744` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_control_regs_clk_en +Auto-extracted signal control_regs_clk_en from memory_registers.vhd +- Offset: `0x748` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_test_regs_clk_en +Auto-extracted signal test_regs_clk_en from memory_registers.vhd +- Offset: `0x74c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_clk_control_regs +Auto-extracted signal clk_control_regs from memory_registers.vhd +- Offset: `0x750` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_clk_test_regs +Auto-extracted signal clk_test_regs from memory_registers.vhd +- Offset: `0x754` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_rx_buf_mode +Auto-extracted signal rx_buf_mode from memory_registers.vhd +- Offset: `0x758` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_rx_move_cmd +Auto-extracted signal rx_move_cmd from memory_registers.vhd +- Offset: `0x75c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_ctr_pres_sel_q +Auto-extracted signal ctr_pres_sel_q from memory_registers.vhd +- Offset: `0x760` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## operation_control_drv_ena +Auto-extracted signal drv_ena from operation_control.vhd +- Offset: `0x764` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## operation_control_go_to_off +Auto-extracted signal go_to_off from operation_control.vhd +- Offset: `0x768` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_drv_ena +Auto-extracted signal drv_ena from prescaler.vhd +- Offset: `0x76c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_tseg1_nbt +Auto-extracted signal tseg1_nbt from prescaler.vhd +- Offset: `0x770` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_tseg2_nbt +Auto-extracted signal tseg2_nbt from prescaler.vhd +- Offset: `0x774` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_brp_nbt +Auto-extracted signal brp_nbt from prescaler.vhd +- Offset: `0x778` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_sjw_nbt +Auto-extracted signal sjw_nbt from prescaler.vhd +- Offset: `0x77c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_tseg1_dbt +Auto-extracted signal tseg1_dbt from prescaler.vhd +- Offset: `0x780` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_tseg2_dbt +Auto-extracted signal tseg2_dbt from prescaler.vhd +- Offset: `0x784` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_brp_dbt +Auto-extracted signal brp_dbt from prescaler.vhd +- Offset: `0x788` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_sjw_dbt +Auto-extracted signal sjw_dbt from prescaler.vhd +- Offset: `0x78c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_segment_end +Auto-extracted signal segment_end from prescaler.vhd +- Offset: `0x790` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_h_sync_valid +Auto-extracted signal h_sync_valid from prescaler.vhd +- Offset: `0x794` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_is_tseg1 +Auto-extracted signal is_tseg1 from prescaler.vhd +- Offset: `0x798` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_is_tseg2 +Auto-extracted signal is_tseg2 from prescaler.vhd +- Offset: `0x79c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_resync_edge_valid +Auto-extracted signal resync_edge_valid from prescaler.vhd +- Offset: `0x7a0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_h_sync_edge_valid +Auto-extracted signal h_sync_edge_valid from prescaler.vhd +- Offset: `0x7a4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_segm_counter_nbt +Auto-extracted signal segm_counter_nbt from prescaler.vhd +- Offset: `0x7a8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_segm_counter_dbt +Auto-extracted signal segm_counter_dbt from prescaler.vhd +- Offset: `0x7ac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_exit_segm_req_nbt +Auto-extracted signal exit_segm_req_nbt from prescaler.vhd +- Offset: `0x7b0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_exit_segm_req_dbt +Auto-extracted signal exit_segm_req_dbt from prescaler.vhd +- Offset: `0x7b4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_tq_edge_nbt +Auto-extracted signal tq_edge_nbt from prescaler.vhd +- Offset: `0x7b8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_tq_edge_dbt +Auto-extracted signal tq_edge_dbt from prescaler.vhd +- Offset: `0x7bc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_rx_trig_req +Auto-extracted signal rx_trig_req from prescaler.vhd +- Offset: `0x7c0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_tx_trig_req +Auto-extracted signal tx_trig_req from prescaler.vhd +- Offset: `0x7c4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_start_edge +Auto-extracted signal start_edge from prescaler.vhd +- Offset: `0x7c8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_bt_ctr_clear +Auto-extracted signal bt_ctr_clear from prescaler.vhd +- Offset: `0x7cc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## priority_decoder_l0_valid +Auto-extracted signal l0_valid from priority_decoder.vhd +- Offset: `0x7d0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## priority_decoder_l1_valid +Auto-extracted signal l1_valid from priority_decoder.vhd +- Offset: `0x7d4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## priority_decoder_l1_winner +Auto-extracted signal l1_winner from priority_decoder.vhd +- Offset: `0x7d8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## priority_decoder_l2_valid +Auto-extracted signal l2_valid from priority_decoder.vhd +- Offset: `0x7dc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## priority_decoder_l2_winner +Auto-extracted signal l2_winner from priority_decoder.vhd +- Offset: `0x7e0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## priority_decoder_l3_valid +Auto-extracted signal l3_valid from priority_decoder.vhd +- Offset: `0x7e4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## priority_decoder_l3_winner +Auto-extracted signal l3_winner from priority_decoder.vhd +- Offset: `0x7e8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_drv_can_fd_ena +Auto-extracted signal drv_can_fd_ena from protocol_control.vhd +- Offset: `0x7ec` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_drv_bus_mon_ena +Auto-extracted signal drv_bus_mon_ena from protocol_control.vhd +- Offset: `0x7f0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_drv_retr_lim_ena +Auto-extracted signal drv_retr_lim_ena from protocol_control.vhd +- Offset: `0x7f4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_drv_retr_th +Auto-extracted signal drv_retr_th from protocol_control.vhd +- Offset: `0x7f8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_drv_self_test_ena +Auto-extracted signal drv_self_test_ena from protocol_control.vhd +- Offset: `0x7fc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_drv_ack_forb +Auto-extracted signal drv_ack_forb from protocol_control.vhd +- Offset: `0x800` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_drv_ena +Auto-extracted signal drv_ena from protocol_control.vhd +- Offset: `0x804` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_drv_fd_type +Auto-extracted signal drv_fd_type from protocol_control.vhd +- Offset: `0x808` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_drv_int_loopback_ena +Auto-extracted signal drv_int_loopback_ena from protocol_control.vhd +- Offset: `0x80c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_drv_bus_off_reset +Auto-extracted signal drv_bus_off_reset from protocol_control.vhd +- Offset: `0x810` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_drv_ssp_delay_select +Auto-extracted signal drv_ssp_delay_select from protocol_control.vhd +- Offset: `0x814` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_drv_pex +Auto-extracted signal drv_pex from protocol_control.vhd +- Offset: `0x818` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_drv_cpexs +Auto-extracted signal drv_cpexs from protocol_control.vhd +- Offset: `0x81c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_tran_word_swapped +Auto-extracted signal tran_word_swapped from protocol_control.vhd +- Offset: `0x820` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_err_frm_req +Auto-extracted signal err_frm_req from protocol_control.vhd +- Offset: `0x824` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_tx_load_base_id +Auto-extracted signal tx_load_base_id from protocol_control.vhd +- Offset: `0x828` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_tx_load_ext_id +Auto-extracted signal tx_load_ext_id from protocol_control.vhd +- Offset: `0x82c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_tx_load_dlc +Auto-extracted signal tx_load_dlc from protocol_control.vhd +- Offset: `0x830` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_tx_load_data_word +Auto-extracted signal tx_load_data_word from protocol_control.vhd +- Offset: `0x834` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_tx_load_stuff_count +Auto-extracted signal tx_load_stuff_count from protocol_control.vhd +- Offset: `0x838` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_tx_load_crc +Auto-extracted signal tx_load_crc from protocol_control.vhd +- Offset: `0x83c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_tx_shift_ena +Auto-extracted signal tx_shift_ena from protocol_control.vhd +- Offset: `0x840` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_tx_dominant +Auto-extracted signal tx_dominant from protocol_control.vhd +- Offset: `0x844` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rx_clear +Auto-extracted signal rx_clear from protocol_control.vhd +- Offset: `0x848` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rx_store_base_id +Auto-extracted signal rx_store_base_id from protocol_control.vhd +- Offset: `0x84c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rx_store_ext_id +Auto-extracted signal rx_store_ext_id from protocol_control.vhd +- Offset: `0x850` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rx_store_ide +Auto-extracted signal rx_store_ide from protocol_control.vhd +- Offset: `0x854` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rx_store_rtr +Auto-extracted signal rx_store_rtr from protocol_control.vhd +- Offset: `0x858` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rx_store_edl +Auto-extracted signal rx_store_edl from protocol_control.vhd +- Offset: `0x85c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rx_store_dlc +Auto-extracted signal rx_store_dlc from protocol_control.vhd +- Offset: `0x860` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rx_store_esi +Auto-extracted signal rx_store_esi from protocol_control.vhd +- Offset: `0x864` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rx_store_brs +Auto-extracted signal rx_store_brs from protocol_control.vhd +- Offset: `0x868` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rx_store_stuff_count +Auto-extracted signal rx_store_stuff_count from protocol_control.vhd +- Offset: `0x86c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rx_shift_ena +Auto-extracted signal rx_shift_ena from protocol_control.vhd +- Offset: `0x870` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rx_shift_in_sel +Auto-extracted signal rx_shift_in_sel from protocol_control.vhd +- Offset: `0x874` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rec_is_rtr_i +Auto-extracted signal rec_is_rtr_i from protocol_control.vhd +- Offset: `0x878` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rec_dlc_d +Auto-extracted signal rec_dlc_d from protocol_control.vhd +- Offset: `0x87c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rec_dlc_q +Auto-extracted signal rec_dlc_q from protocol_control.vhd +- Offset: `0x880` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rec_frame_type_i +Auto-extracted signal rec_frame_type_i from protocol_control.vhd +- Offset: `0x884` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_ctrl_ctr_pload +Auto-extracted signal ctrl_ctr_pload from protocol_control.vhd +- Offset: `0x888` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_ctrl_ctr_pload_val +Auto-extracted signal ctrl_ctr_pload_val from protocol_control.vhd +- Offset: `0x88c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_ctrl_ctr_ena +Auto-extracted signal ctrl_ctr_ena from protocol_control.vhd +- Offset: `0x890` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_ctrl_ctr_zero +Auto-extracted signal ctrl_ctr_zero from protocol_control.vhd +- Offset: `0x894` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_ctrl_ctr_one +Auto-extracted signal ctrl_ctr_one from protocol_control.vhd +- Offset: `0x898` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_ctrl_counted_byte +Auto-extracted signal ctrl_counted_byte from protocol_control.vhd +- Offset: `0x89c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_ctrl_counted_byte_index +Auto-extracted signal ctrl_counted_byte_index from protocol_control.vhd +- Offset: `0x8a0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_ctrl_ctr_mem_index +Auto-extracted signal ctrl_ctr_mem_index from protocol_control.vhd +- Offset: `0x8a4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_compl_ctr_ena +Auto-extracted signal compl_ctr_ena from protocol_control.vhd +- Offset: `0x8a8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_reinteg_ctr_clr +Auto-extracted signal reinteg_ctr_clr from protocol_control.vhd +- Offset: `0x8ac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_reinteg_ctr_enable +Auto-extracted signal reinteg_ctr_enable from protocol_control.vhd +- Offset: `0x8b0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_reinteg_ctr_expired +Auto-extracted signal reinteg_ctr_expired from protocol_control.vhd +- Offset: `0x8b4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_retr_ctr_clear +Auto-extracted signal retr_ctr_clear from protocol_control.vhd +- Offset: `0x8b8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_retr_ctr_add +Auto-extracted signal retr_ctr_add from protocol_control.vhd +- Offset: `0x8bc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_retr_limit_reached +Auto-extracted signal retr_limit_reached from protocol_control.vhd +- Offset: `0x8c0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_form_err_i +Auto-extracted signal form_err_i from protocol_control.vhd +- Offset: `0x8c4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_ack_err_i +Auto-extracted signal ack_err_i from protocol_control.vhd +- Offset: `0x8c8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_crc_check +Auto-extracted signal crc_check from protocol_control.vhd +- Offset: `0x8cc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_bit_err_arb +Auto-extracted signal bit_err_arb from protocol_control.vhd +- Offset: `0x8d0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_crc_match +Auto-extracted signal crc_match from protocol_control.vhd +- Offset: `0x8d4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_crc_err_i +Auto-extracted signal crc_err_i from protocol_control.vhd +- Offset: `0x8d8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_crc_clear_match_flag +Auto-extracted signal crc_clear_match_flag from protocol_control.vhd +- Offset: `0x8dc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_crc_src +Auto-extracted signal crc_src from protocol_control.vhd +- Offset: `0x8e0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_err_pos +Auto-extracted signal err_pos from protocol_control.vhd +- Offset: `0x8e4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_is_arbitration_i +Auto-extracted signal is_arbitration_i from protocol_control.vhd +- Offset: `0x8e8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_bit_err_enable +Auto-extracted signal bit_err_enable from protocol_control.vhd +- Offset: `0x8ec` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_tx_data_nbs_i +Auto-extracted signal tx_data_nbs_i from protocol_control.vhd +- Offset: `0x8f0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rx_crc +Auto-extracted signal rx_crc from protocol_control.vhd +- Offset: `0x8f4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rx_stuff_count +Auto-extracted signal rx_stuff_count from protocol_control.vhd +- Offset: `0x8f8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fixed_stuff_i +Auto-extracted signal fixed_stuff_i from protocol_control.vhd +- Offset: `0x8fc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_arbitration_lost_i +Auto-extracted signal arbitration_lost_i from protocol_control.vhd +- Offset: `0x900` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_alc_id_field +Auto-extracted signal alc_id_field from protocol_control.vhd +- Offset: `0x904` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_drv_rom_ena +Auto-extracted signal drv_rom_ena from protocol_control.vhd +- Offset: `0x908` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_state_reg_ce +Auto-extracted signal state_reg_ce from protocol_control_fsm.vhd +- Offset: `0x90c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_no_data_transmitter +Auto-extracted signal no_data_transmitter from protocol_control_fsm.vhd +- Offset: `0x910` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_no_data_receiver +Auto-extracted signal no_data_receiver from protocol_control_fsm.vhd +- Offset: `0x914` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_no_data_field +Auto-extracted signal no_data_field from protocol_control_fsm.vhd +- Offset: `0x918` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_ctrl_ctr_pload_i +Auto-extracted signal ctrl_ctr_pload_i from protocol_control_fsm.vhd +- Offset: `0x91c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_ctrl_ctr_pload_unaliged +Auto-extracted signal ctrl_ctr_pload_unaliged from protocol_control_fsm.vhd +- Offset: `0x920` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_crc_use_21 +Auto-extracted signal crc_use_21 from protocol_control_fsm.vhd +- Offset: `0x924` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_crc_use_17 +Auto-extracted signal crc_use_17 from protocol_control_fsm.vhd +- Offset: `0x928` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_crc_src_i +Auto-extracted signal crc_src_i from protocol_control_fsm.vhd +- Offset: `0x92c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_crc_length_i +Auto-extracted signal crc_length_i from protocol_control_fsm.vhd +- Offset: `0x930` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_tran_data_length +Auto-extracted signal tran_data_length from protocol_control_fsm.vhd +- Offset: `0x934` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rec_data_length +Auto-extracted signal rec_data_length from protocol_control_fsm.vhd +- Offset: `0x938` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rec_data_length_c +Auto-extracted signal rec_data_length_c from protocol_control_fsm.vhd +- Offset: `0x93c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_data_length_c +Auto-extracted signal data_length_c from protocol_control_fsm.vhd +- Offset: `0x940` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_data_length_shifted_c +Auto-extracted signal data_length_shifted_c from protocol_control_fsm.vhd +- Offset: `0x944` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_data_length_bits_c +Auto-extracted signal data_length_bits_c from protocol_control_fsm.vhd +- Offset: `0x948` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_is_fd_frame +Auto-extracted signal is_fd_frame from protocol_control_fsm.vhd +- Offset: `0x94c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_frame_start +Auto-extracted signal frame_start from protocol_control_fsm.vhd +- Offset: `0x950` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_tx_frame_ready +Auto-extracted signal tx_frame_ready from protocol_control_fsm.vhd +- Offset: `0x954` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_ide_is_arbitration +Auto-extracted signal ide_is_arbitration from protocol_control_fsm.vhd +- Offset: `0x958` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_arbitration_lost_condition +Auto-extracted signal arbitration_lost_condition from protocol_control_fsm.vhd +- Offset: `0x95c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_arbitration_lost_i +Auto-extracted signal arbitration_lost_i from protocol_control_fsm.vhd +- Offset: `0x960` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_tx_failed +Auto-extracted signal tx_failed from protocol_control_fsm.vhd +- Offset: `0x964` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_store_metadata_d +Auto-extracted signal store_metadata_d from protocol_control_fsm.vhd +- Offset: `0x968` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_store_data_d +Auto-extracted signal store_data_d from protocol_control_fsm.vhd +- Offset: `0x96c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rec_valid_d +Auto-extracted signal rec_valid_d from protocol_control_fsm.vhd +- Offset: `0x970` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rec_abort_d +Auto-extracted signal rec_abort_d from protocol_control_fsm.vhd +- Offset: `0x974` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_go_to_suspend +Auto-extracted signal go_to_suspend from protocol_control_fsm.vhd +- Offset: `0x978` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_go_to_stuff_count +Auto-extracted signal go_to_stuff_count from protocol_control_fsm.vhd +- Offset: `0x97c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rx_store_base_id_i +Auto-extracted signal rx_store_base_id_i from protocol_control_fsm.vhd +- Offset: `0x980` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rx_store_ext_id_i +Auto-extracted signal rx_store_ext_id_i from protocol_control_fsm.vhd +- Offset: `0x984` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rx_store_ide_i +Auto-extracted signal rx_store_ide_i from protocol_control_fsm.vhd +- Offset: `0x988` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rx_store_rtr_i +Auto-extracted signal rx_store_rtr_i from protocol_control_fsm.vhd +- Offset: `0x98c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rx_store_edl_i +Auto-extracted signal rx_store_edl_i from protocol_control_fsm.vhd +- Offset: `0x990` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rx_store_dlc_i +Auto-extracted signal rx_store_dlc_i from protocol_control_fsm.vhd +- Offset: `0x994` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rx_store_esi_i +Auto-extracted signal rx_store_esi_i from protocol_control_fsm.vhd +- Offset: `0x998` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rx_store_brs_i +Auto-extracted signal rx_store_brs_i from protocol_control_fsm.vhd +- Offset: `0x99c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rx_store_stuff_count_i +Auto-extracted signal rx_store_stuff_count_i from protocol_control_fsm.vhd +- Offset: `0x9a0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rx_clear_i +Auto-extracted signal rx_clear_i from protocol_control_fsm.vhd +- Offset: `0x9a4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_tx_load_base_id_i +Auto-extracted signal tx_load_base_id_i from protocol_control_fsm.vhd +- Offset: `0x9a8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_tx_load_ext_id_i +Auto-extracted signal tx_load_ext_id_i from protocol_control_fsm.vhd +- Offset: `0x9ac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_tx_load_dlc_i +Auto-extracted signal tx_load_dlc_i from protocol_control_fsm.vhd +- Offset: `0x9b0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_tx_load_data_word_i +Auto-extracted signal tx_load_data_word_i from protocol_control_fsm.vhd +- Offset: `0x9b4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_tx_load_stuff_count_i +Auto-extracted signal tx_load_stuff_count_i from protocol_control_fsm.vhd +- Offset: `0x9b8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_tx_load_crc_i +Auto-extracted signal tx_load_crc_i from protocol_control_fsm.vhd +- Offset: `0x9bc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_tx_shift_ena_i +Auto-extracted signal tx_shift_ena_i from protocol_control_fsm.vhd +- Offset: `0x9c0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_form_err_i +Auto-extracted signal form_err_i from protocol_control_fsm.vhd +- Offset: `0x9c4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_ack_err_i +Auto-extracted signal ack_err_i from protocol_control_fsm.vhd +- Offset: `0x9c8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_ack_err_flag +Auto-extracted signal ack_err_flag from protocol_control_fsm.vhd +- Offset: `0x9cc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_ack_err_flag_clr +Auto-extracted signal ack_err_flag_clr from protocol_control_fsm.vhd +- Offset: `0x9d0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_crc_err_i +Auto-extracted signal crc_err_i from protocol_control_fsm.vhd +- Offset: `0x9d4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_bit_err_arb_i +Auto-extracted signal bit_err_arb_i from protocol_control_fsm.vhd +- Offset: `0x9d8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_sp_control_switch_data +Auto-extracted signal sp_control_switch_data from protocol_control_fsm.vhd +- Offset: `0x9dc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_sp_control_switch_nominal +Auto-extracted signal sp_control_switch_nominal from protocol_control_fsm.vhd +- Offset: `0x9e0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_switch_to_ssp +Auto-extracted signal switch_to_ssp from protocol_control_fsm.vhd +- Offset: `0x9e4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_sp_control_ce +Auto-extracted signal sp_control_ce from protocol_control_fsm.vhd +- Offset: `0x9e8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_sp_control_d +Auto-extracted signal sp_control_d from protocol_control_fsm.vhd +- Offset: `0x9ec` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_sp_control_q_i +Auto-extracted signal sp_control_q_i from protocol_control_fsm.vhd +- Offset: `0x9f0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_ssp_reset_i +Auto-extracted signal ssp_reset_i from protocol_control_fsm.vhd +- Offset: `0x9f4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_sync_control_d +Auto-extracted signal sync_control_d from protocol_control_fsm.vhd +- Offset: `0x9f8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_sync_control_q +Auto-extracted signal sync_control_q from protocol_control_fsm.vhd +- Offset: `0x9fc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_perform_hsync +Auto-extracted signal perform_hsync from protocol_control_fsm.vhd +- Offset: `0xa00` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_primary_err_i +Auto-extracted signal primary_err_i from protocol_control_fsm.vhd +- Offset: `0xa04` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_err_delim_late_i +Auto-extracted signal err_delim_late_i from protocol_control_fsm.vhd +- Offset: `0xa08` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_set_err_active_i +Auto-extracted signal set_err_active_i from protocol_control_fsm.vhd +- Offset: `0xa0c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_set_transmitter_i +Auto-extracted signal set_transmitter_i from protocol_control_fsm.vhd +- Offset: `0xa10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_set_receiver_i +Auto-extracted signal set_receiver_i from protocol_control_fsm.vhd +- Offset: `0xa14` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_set_idle_i +Auto-extracted signal set_idle_i from protocol_control_fsm.vhd +- Offset: `0xa18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_first_err_delim_d +Auto-extracted signal first_err_delim_d from protocol_control_fsm.vhd +- Offset: `0xa1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_first_err_delim_q +Auto-extracted signal first_err_delim_q from protocol_control_fsm.vhd +- Offset: `0xa20` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_stuff_enable_set +Auto-extracted signal stuff_enable_set from protocol_control_fsm.vhd +- Offset: `0xa24` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_stuff_enable_clear +Auto-extracted signal stuff_enable_clear from protocol_control_fsm.vhd +- Offset: `0xa28` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_destuff_enable_set +Auto-extracted signal destuff_enable_set from protocol_control_fsm.vhd +- Offset: `0xa2c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_destuff_enable_clear +Auto-extracted signal destuff_enable_clear from protocol_control_fsm.vhd +- Offset: `0xa30` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_bit_err_disable +Auto-extracted signal bit_err_disable from protocol_control_fsm.vhd +- Offset: `0xa34` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_bit_err_disable_receiver +Auto-extracted signal bit_err_disable_receiver from protocol_control_fsm.vhd +- Offset: `0xa38` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_sof_pulse_i +Auto-extracted signal sof_pulse_i from protocol_control_fsm.vhd +- Offset: `0xa3c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_compl_ctr_ena_i +Auto-extracted signal compl_ctr_ena_i from protocol_control_fsm.vhd +- Offset: `0xa40` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_tick_state_reg +Auto-extracted signal tick_state_reg from protocol_control_fsm.vhd +- Offset: `0xa44` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_br_shifted_i +Auto-extracted signal br_shifted_i from protocol_control_fsm.vhd +- Offset: `0xa48` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_is_arbitration_i +Auto-extracted signal is_arbitration_i from protocol_control_fsm.vhd +- Offset: `0xa4c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_crc_spec_enable_i +Auto-extracted signal crc_spec_enable_i from protocol_control_fsm.vhd +- Offset: `0xa50` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_load_init_vect_i +Auto-extracted signal load_init_vect_i from protocol_control_fsm.vhd +- Offset: `0xa54` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_drv_bus_off_reset_q +Auto-extracted signal drv_bus_off_reset_q from protocol_control_fsm.vhd +- Offset: `0xa58` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_retr_ctr_clear_i +Auto-extracted signal retr_ctr_clear_i from protocol_control_fsm.vhd +- Offset: `0xa5c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_retr_ctr_add_i +Auto-extracted signal retr_ctr_add_i from protocol_control_fsm.vhd +- Offset: `0xa60` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_decrement_rec_i +Auto-extracted signal decrement_rec_i from protocol_control_fsm.vhd +- Offset: `0xa64` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_retr_ctr_add_block +Auto-extracted signal retr_ctr_add_block from protocol_control_fsm.vhd +- Offset: `0xa68` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_retr_ctr_add_block_clr +Auto-extracted signal retr_ctr_add_block_clr from protocol_control_fsm.vhd +- Offset: `0xa6c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_block_txtb_unlock +Auto-extracted signal block_txtb_unlock from protocol_control_fsm.vhd +- Offset: `0xa70` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_tx_frame_no_sof_d +Auto-extracted signal tx_frame_no_sof_d from protocol_control_fsm.vhd +- Offset: `0xa74` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_tx_frame_no_sof_q +Auto-extracted signal tx_frame_no_sof_q from protocol_control_fsm.vhd +- Offset: `0xa78` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_ctrl_signal_upd +Auto-extracted signal ctrl_signal_upd from protocol_control_fsm.vhd +- Offset: `0xa7c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_clr_bus_off_rst_flg +Auto-extracted signal clr_bus_off_rst_flg from protocol_control_fsm.vhd +- Offset: `0xa80` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_pex_on_fdf_enable +Auto-extracted signal pex_on_fdf_enable from protocol_control_fsm.vhd +- Offset: `0xa84` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_pex_on_res_enable +Auto-extracted signal pex_on_res_enable from protocol_control_fsm.vhd +- Offset: `0xa88` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rx_data_nbs_prev +Auto-extracted signal rx_data_nbs_prev from protocol_control_fsm.vhd +- Offset: `0xa8c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_pexs_set +Auto-extracted signal pexs_set from protocol_control_fsm.vhd +- Offset: `0xa90` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_tran_frame_type_i +Auto-extracted signal tran_frame_type_i from protocol_control_fsm.vhd +- Offset: `0xa94` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_txtb_clk_en_d +Auto-extracted signal txtb_clk_en_d from protocol_control_fsm.vhd +- Offset: `0xa98` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_txtb_clk_en_q +Auto-extracted signal txtb_clk_en_q from protocol_control_fsm.vhd +- Offset: `0xa9c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## reintegration_counter_reinteg_ctr_ce +Auto-extracted signal reinteg_ctr_ce from reintegration_counter.vhd +- Offset: `0xaa0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## retransmitt_counter_retr_ctr_ce +Auto-extracted signal retr_ctr_ce from retransmitt_counter.vhd +- Offset: `0xaa4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rst_sync_rff +Auto-extracted signal rff from rst_sync.vhd +- Offset: `0xaa8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_drv_erase_rx +Auto-extracted signal drv_erase_rx from rx_buffer.vhd +- Offset: `0xaac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_drv_read_start +Auto-extracted signal drv_read_start from rx_buffer.vhd +- Offset: `0xab0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_drv_clr_ovr +Auto-extracted signal drv_clr_ovr from rx_buffer.vhd +- Offset: `0xab4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_drv_rtsopt +Auto-extracted signal drv_rtsopt from rx_buffer.vhd +- Offset: `0xab8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_read_pointer +Auto-extracted signal read_pointer from rx_buffer.vhd +- Offset: `0xabc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_read_pointer_inc_1 +Auto-extracted signal read_pointer_inc_1 from rx_buffer.vhd +- Offset: `0xac0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_write_pointer +Auto-extracted signal write_pointer from rx_buffer.vhd +- Offset: `0xac4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_write_pointer_raw +Auto-extracted signal write_pointer_raw from rx_buffer.vhd +- Offset: `0xac8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_write_pointer_ts +Auto-extracted signal write_pointer_ts from rx_buffer.vhd +- Offset: `0xacc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_rx_mem_free_i +Auto-extracted signal rx_mem_free_i from rx_buffer.vhd +- Offset: `0xad0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_memory_write_data +Auto-extracted signal memory_write_data from rx_buffer.vhd +- Offset: `0xad4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_data_overrun_flg +Auto-extracted signal data_overrun_flg from rx_buffer.vhd +- Offset: `0xad8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_data_overrun_i +Auto-extracted signal data_overrun_i from rx_buffer.vhd +- Offset: `0xadc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_overrun_condition +Auto-extracted signal overrun_condition from rx_buffer.vhd +- Offset: `0xae0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_rx_empty_i +Auto-extracted signal rx_empty_i from rx_buffer.vhd +- Offset: `0xae4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_is_free_word +Auto-extracted signal is_free_word from rx_buffer.vhd +- Offset: `0xae8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_commit_rx_frame +Auto-extracted signal commit_rx_frame from rx_buffer.vhd +- Offset: `0xaec` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_commit_overrun_abort +Auto-extracted signal commit_overrun_abort from rx_buffer.vhd +- Offset: `0xaf0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_read_increment +Auto-extracted signal read_increment from rx_buffer.vhd +- Offset: `0xaf4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_write_raw_OK +Auto-extracted signal write_raw_OK from rx_buffer.vhd +- Offset: `0xaf8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_write_raw_intent +Auto-extracted signal write_raw_intent from rx_buffer.vhd +- Offset: `0xafc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_write_ts +Auto-extracted signal write_ts from rx_buffer.vhd +- Offset: `0xb00` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_stored_ts +Auto-extracted signal stored_ts from rx_buffer.vhd +- Offset: `0xb04` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_data_selector +Auto-extracted signal data_selector from rx_buffer.vhd +- Offset: `0xb08` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_store_ts_wr_ptr +Auto-extracted signal store_ts_wr_ptr from rx_buffer.vhd +- Offset: `0xb0c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_inc_ts_wr_ptr +Auto-extracted signal inc_ts_wr_ptr from rx_buffer.vhd +- Offset: `0xb10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_reset_overrun_flag +Auto-extracted signal reset_overrun_flag from rx_buffer.vhd +- Offset: `0xb14` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_frame_form_w +Auto-extracted signal frame_form_w from rx_buffer.vhd +- Offset: `0xb18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_timestamp_capture +Auto-extracted signal timestamp_capture from rx_buffer.vhd +- Offset: `0xb1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_timestamp_capture_ce +Auto-extracted signal timestamp_capture_ce from rx_buffer.vhd +- Offset: `0xb20` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_RAM_write +Auto-extracted signal RAM_write from rx_buffer.vhd +- Offset: `0xb24` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_RAM_data_out +Auto-extracted signal RAM_data_out from rx_buffer.vhd +- Offset: `0xb28` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_RAM_write_address +Auto-extracted signal RAM_write_address from rx_buffer.vhd +- Offset: `0xb2c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_RAM_read_address +Auto-extracted signal RAM_read_address from rx_buffer.vhd +- Offset: `0xb30` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_rx_buf_res_n_d +Auto-extracted signal rx_buf_res_n_d from rx_buffer.vhd +- Offset: `0xb34` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_rx_buf_res_n_q +Auto-extracted signal rx_buf_res_n_q from rx_buffer.vhd +- Offset: `0xb38` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_rx_buf_res_n_q_scan +Auto-extracted signal rx_buf_res_n_q_scan from rx_buffer.vhd +- Offset: `0xb3c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_rx_buf_ram_clk_en +Auto-extracted signal rx_buf_ram_clk_en from rx_buffer.vhd +- Offset: `0xb40` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_clk_ram +Auto-extracted signal clk_ram from rx_buffer.vhd +- Offset: `0xb44` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_fsm_rx_fsm_ce +Auto-extracted signal rx_fsm_ce from rx_buffer_fsm.vhd +- Offset: `0xb48` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_fsm_cmd_join +Auto-extracted signal cmd_join from rx_buffer_fsm.vhd +- Offset: `0xb4c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_pointers_write_pointer_raw_ce +Auto-extracted signal write_pointer_raw_ce from rx_buffer_pointers.vhd +- Offset: `0xb50` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_pointers_write_pointer_ts_ce +Auto-extracted signal write_pointer_ts_ce from rx_buffer_pointers.vhd +- Offset: `0xb54` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_ram_port_a_address_i +Auto-extracted signal port_a_address_i from rx_buffer_ram.vhd +- Offset: `0xb58` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_ram_port_a_write_i +Auto-extracted signal port_a_write_i from rx_buffer_ram.vhd +- Offset: `0xb5c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_ram_port_a_data_in_i +Auto-extracted signal port_a_data_in_i from rx_buffer_ram.vhd +- Offset: `0xb60` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_ram_port_b_address_i +Auto-extracted signal port_b_address_i from rx_buffer_ram.vhd +- Offset: `0xb64` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_ram_port_b_data_out_i +Auto-extracted signal port_b_data_out_i from rx_buffer_ram.vhd +- Offset: `0xb68` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_ram_tst_ena +Auto-extracted signal tst_ena from rx_buffer_ram.vhd +- Offset: `0xb6c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_ram_tst_addr +Auto-extracted signal tst_addr from rx_buffer_ram.vhd +- Offset: `0xb70` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_shift_reg_res_n_i_d +Auto-extracted signal res_n_i_d from rx_shift_reg.vhd +- Offset: `0xb74` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_shift_reg_res_n_i_q +Auto-extracted signal res_n_i_q from rx_shift_reg.vhd +- Offset: `0xb78` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_shift_reg_res_n_i_q_scan +Auto-extracted signal res_n_i_q_scan from rx_shift_reg.vhd +- Offset: `0xb7c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_shift_reg_rx_shift_reg_q +Auto-extracted signal rx_shift_reg_q from rx_shift_reg.vhd +- Offset: `0xb80` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_shift_reg_rx_shift_cmd +Auto-extracted signal rx_shift_cmd from rx_shift_reg.vhd +- Offset: `0xb84` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_shift_reg_rx_shift_in_sel_demuxed +Auto-extracted signal rx_shift_in_sel_demuxed from rx_shift_reg.vhd +- Offset: `0xb88` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_shift_reg_rec_is_rtr_i +Auto-extracted signal rec_is_rtr_i from rx_shift_reg.vhd +- Offset: `0xb8c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_shift_reg_rec_frame_type_i +Auto-extracted signal rec_frame_type_i from rx_shift_reg.vhd +- Offset: `0xb90` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## sample_mux_sample +Auto-extracted signal sample from sample_mux.vhd +- Offset: `0xb94` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## sample_mux_prev_sample_d +Auto-extracted signal prev_sample_d from sample_mux.vhd +- Offset: `0xb98` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## sample_mux_prev_sample_q +Auto-extracted signal prev_sample_q from sample_mux.vhd +- Offset: `0xb9c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_req_input +Auto-extracted signal req_input from segment_end_detector.vhd +- Offset: `0xba0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_segm_end_req_capt_d +Auto-extracted signal segm_end_req_capt_d from segment_end_detector.vhd +- Offset: `0xba4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_segm_end_req_capt_q +Auto-extracted signal segm_end_req_capt_q from segment_end_detector.vhd +- Offset: `0xba8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_segm_end_req_capt_ce +Auto-extracted signal segm_end_req_capt_ce from segment_end_detector.vhd +- Offset: `0xbac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_segm_end_req_capt_clr +Auto-extracted signal segm_end_req_capt_clr from segment_end_detector.vhd +- Offset: `0xbb0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_segm_end_req_capt_dq +Auto-extracted signal segm_end_req_capt_dq from segment_end_detector.vhd +- Offset: `0xbb4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_segm_end_nbt_valid +Auto-extracted signal segm_end_nbt_valid from segment_end_detector.vhd +- Offset: `0xbb8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_segm_end_dbt_valid +Auto-extracted signal segm_end_dbt_valid from segment_end_detector.vhd +- Offset: `0xbbc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_segm_end_nbt_dbt_valid +Auto-extracted signal segm_end_nbt_dbt_valid from segment_end_detector.vhd +- Offset: `0xbc0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_tseg1_end_req_valid +Auto-extracted signal tseg1_end_req_valid from segment_end_detector.vhd +- Offset: `0xbc4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_tseg2_end_req_valid +Auto-extracted signal tseg2_end_req_valid from segment_end_detector.vhd +- Offset: `0xbc8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_h_sync_valid_i +Auto-extracted signal h_sync_valid_i from segment_end_detector.vhd +- Offset: `0xbcc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_segment_end_i +Auto-extracted signal segment_end_i from segment_end_detector.vhd +- Offset: `0xbd0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_nbt_tq_active +Auto-extracted signal nbt_tq_active from segment_end_detector.vhd +- Offset: `0xbd4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_dbt_tq_active +Auto-extracted signal dbt_tq_active from segment_end_detector.vhd +- Offset: `0xbd8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_bt_ctr_clear_i +Auto-extracted signal bt_ctr_clear_i from segment_end_detector.vhd +- Offset: `0xbdc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## shift_reg_shift_regs +Auto-extracted signal shift_regs from shift_reg.vhd +- Offset: `0xbe0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## shift_reg_next_shift_reg_val +Auto-extracted signal next_shift_reg_val from shift_reg.vhd +- Offset: `0xbe4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## shift_reg_byte_shift_reg_in +Auto-extracted signal shift_reg_in from shift_reg_byte.vhd +- Offset: `0xbe8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## shift_reg_preload_shift_regs +Auto-extracted signal shift_regs from shift_reg_preload.vhd +- Offset: `0xbec` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## shift_reg_preload_next_shift_reg_val +Auto-extracted signal next_shift_reg_val from shift_reg_preload.vhd +- Offset: `0xbf0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## sig_sync_rff +Auto-extracted signal rff from sig_sync.vhd +- Offset: `0xbf4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_btmc_d +Auto-extracted signal btmc_d from ssp_generator.vhd +- Offset: `0xbf8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_btmc_q +Auto-extracted signal btmc_q from ssp_generator.vhd +- Offset: `0xbfc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_btmc_add +Auto-extracted signal btmc_add from ssp_generator.vhd +- Offset: `0xc00` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_btmc_ce +Auto-extracted signal btmc_ce from ssp_generator.vhd +- Offset: `0xc04` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_btmc_meas_running_d +Auto-extracted signal btmc_meas_running_d from ssp_generator.vhd +- Offset: `0xc08` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_btmc_meas_running_q +Auto-extracted signal btmc_meas_running_q from ssp_generator.vhd +- Offset: `0xc0c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_sspc_d +Auto-extracted signal sspc_d from ssp_generator.vhd +- Offset: `0xc10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_sspc_q +Auto-extracted signal sspc_q from ssp_generator.vhd +- Offset: `0xc14` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_sspc_ce +Auto-extracted signal sspc_ce from ssp_generator.vhd +- Offset: `0xc18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_sspc_expired +Auto-extracted signal sspc_expired from ssp_generator.vhd +- Offset: `0xc1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_sspc_threshold +Auto-extracted signal sspc_threshold from ssp_generator.vhd +- Offset: `0xc20` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_sspc_add +Auto-extracted signal sspc_add from ssp_generator.vhd +- Offset: `0xc24` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_first_ssp_d +Auto-extracted signal first_ssp_d from ssp_generator.vhd +- Offset: `0xc28` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_first_ssp_q +Auto-extracted signal first_ssp_q from ssp_generator.vhd +- Offset: `0xc2c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_sspc_ena_d +Auto-extracted signal sspc_ena_d from ssp_generator.vhd +- Offset: `0xc30` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_sspc_ena_q +Auto-extracted signal sspc_ena_q from ssp_generator.vhd +- Offset: `0xc34` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_ssp_delay_padded +Auto-extracted signal ssp_delay_padded from ssp_generator.vhd +- Offset: `0xc38` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## synchronisation_checker_resync_edge +Auto-extracted signal resync_edge from synchronisation_checker.vhd +- Offset: `0xc3c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## synchronisation_checker_h_sync_edge +Auto-extracted signal h_sync_edge from synchronisation_checker.vhd +- Offset: `0xc40` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## synchronisation_checker_h_or_re_sync_edge +Auto-extracted signal h_or_re_sync_edge from synchronisation_checker.vhd +- Offset: `0xc44` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## synchronisation_checker_sync_flag +Auto-extracted signal sync_flag from synchronisation_checker.vhd +- Offset: `0xc48` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## synchronisation_checker_sync_flag_ce +Auto-extracted signal sync_flag_ce from synchronisation_checker.vhd +- Offset: `0xc4c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## synchronisation_checker_sync_flag_nxt +Auto-extracted signal sync_flag_nxt from synchronisation_checker.vhd +- Offset: `0xc50` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## test_registers_reg_map_reg_sel +Auto-extracted signal reg_sel from test_registers_reg_map.vhd +- Offset: `0xc54` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## test_registers_reg_map_read_data_mux_in +Auto-extracted signal read_data_mux_in from test_registers_reg_map.vhd +- Offset: `0xc58` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## test_registers_reg_map_read_data_mask_n +Auto-extracted signal read_data_mask_n from test_registers_reg_map.vhd +- Offset: `0xc5c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## test_registers_reg_map_read_mux_ena +Auto-extracted signal read_mux_ena from test_registers_reg_map.vhd +- Offset: `0xc60` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trigger_generator_rx_trig_req_q +Auto-extracted signal rx_trig_req_q from trigger_generator.vhd +- Offset: `0xc64` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trigger_generator_tx_trig_req_flag_d +Auto-extracted signal tx_trig_req_flag_d from trigger_generator.vhd +- Offset: `0xc68` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trigger_generator_tx_trig_req_flag_q +Auto-extracted signal tx_trig_req_flag_q from trigger_generator.vhd +- Offset: `0xc6c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trigger_generator_tx_trig_req_flag_dq +Auto-extracted signal tx_trig_req_flag_dq from trigger_generator.vhd +- Offset: `0xc70` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trigger_mux_tx_trigger_q +Auto-extracted signal tx_trigger_q from trigger_mux.vhd +- Offset: `0xc74` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trv_delay_meas_trv_meas_progress_d +Auto-extracted signal trv_meas_progress_d from trv_delay_meas.vhd +- Offset: `0xc78` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trv_delay_meas_trv_meas_progress_q +Auto-extracted signal trv_meas_progress_q from trv_delay_meas.vhd +- Offset: `0xc7c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trv_delay_meas_trv_meas_progress_del +Auto-extracted signal trv_meas_progress_del from trv_delay_meas.vhd +- Offset: `0xc80` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trv_delay_meas_trv_delay_ctr_q +Auto-extracted signal trv_delay_ctr_q from trv_delay_meas.vhd +- Offset: `0xc84` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trv_delay_meas_trv_delay_ctr_d +Auto-extracted signal trv_delay_ctr_d from trv_delay_meas.vhd +- Offset: `0xc88` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trv_delay_meas_trv_delay_ctr_add +Auto-extracted signal trv_delay_ctr_add from trv_delay_meas.vhd +- Offset: `0xc8c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trv_delay_meas_trv_delay_ctr_q_padded +Auto-extracted signal trv_delay_ctr_q_padded from trv_delay_meas.vhd +- Offset: `0xc90` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trv_delay_meas_trv_delay_ctr_rst_d +Auto-extracted signal trv_delay_ctr_rst_d from trv_delay_meas.vhd +- Offset: `0xc94` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trv_delay_meas_trv_delay_ctr_rst_q +Auto-extracted signal trv_delay_ctr_rst_q from trv_delay_meas.vhd +- Offset: `0xc98` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trv_delay_meas_trv_delay_ctr_rst_q_scan +Auto-extracted signal trv_delay_ctr_rst_q_scan from trv_delay_meas.vhd +- Offset: `0xc9c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trv_delay_meas_ssp_shadow_ce +Auto-extracted signal ssp_shadow_ce from trv_delay_meas.vhd +- Offset: `0xca0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trv_delay_meas_ssp_delay_raw +Auto-extracted signal ssp_delay_raw from trv_delay_meas.vhd +- Offset: `0xca4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trv_delay_meas_ssp_delay_saturated +Auto-extracted signal ssp_delay_saturated from trv_delay_meas.vhd +- Offset: `0xca8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trv_delay_meas_trv_delay_sum +Auto-extracted signal trv_delay_sum from trv_delay_meas.vhd +- Offset: `0xcac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_select_buf_avail +Auto-extracted signal select_buf_avail from tx_arbitrator.vhd +- Offset: `0xcb0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_txtb_selected_input +Auto-extracted signal txtb_selected_input from tx_arbitrator.vhd +- Offset: `0xcb4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_txtb_timestamp +Auto-extracted signal txtb_timestamp from tx_arbitrator.vhd +- Offset: `0xcb8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_timestamp_valid +Auto-extracted signal timestamp_valid from tx_arbitrator.vhd +- Offset: `0xcbc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_select_index_changed +Auto-extracted signal select_index_changed from tx_arbitrator.vhd +- Offset: `0xcc0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_validated_buffer +Auto-extracted signal validated_buffer from tx_arbitrator.vhd +- Offset: `0xcc4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_ts_low_internal +Auto-extracted signal ts_low_internal from tx_arbitrator.vhd +- Offset: `0xcc8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_tran_dlc_dbl_buf +Auto-extracted signal tran_dlc_dbl_buf from tx_arbitrator.vhd +- Offset: `0xccc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_tran_is_rtr_dbl_buf +Auto-extracted signal tran_is_rtr_dbl_buf from tx_arbitrator.vhd +- Offset: `0xcd0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_tran_ident_type_dbl_buf +Auto-extracted signal tran_ident_type_dbl_buf from tx_arbitrator.vhd +- Offset: `0xcd4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_tran_frame_type_dbl_buf +Auto-extracted signal tran_frame_type_dbl_buf from tx_arbitrator.vhd +- Offset: `0xcd8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_tran_brs_dbl_buf +Auto-extracted signal tran_brs_dbl_buf from tx_arbitrator.vhd +- Offset: `0xcdc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_tran_dlc_com +Auto-extracted signal tran_dlc_com from tx_arbitrator.vhd +- Offset: `0xce0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_tran_is_rtr_com +Auto-extracted signal tran_is_rtr_com from tx_arbitrator.vhd +- Offset: `0xce4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_tran_ident_type_com +Auto-extracted signal tran_ident_type_com from tx_arbitrator.vhd +- Offset: `0xce8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_tran_frame_type_com +Auto-extracted signal tran_frame_type_com from tx_arbitrator.vhd +- Offset: `0xcec` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_tran_brs_com +Auto-extracted signal tran_brs_com from tx_arbitrator.vhd +- Offset: `0xcf0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_tran_frame_valid_com +Auto-extracted signal tran_frame_valid_com from tx_arbitrator.vhd +- Offset: `0xcf4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_tran_identifier_com +Auto-extracted signal tran_identifier_com from tx_arbitrator.vhd +- Offset: `0xcf8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_load_ts_lw_addr +Auto-extracted signal load_ts_lw_addr from tx_arbitrator.vhd +- Offset: `0xcfc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_load_ts_uw_addr +Auto-extracted signal load_ts_uw_addr from tx_arbitrator.vhd +- Offset: `0xd00` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_load_ffmt_w_addr +Auto-extracted signal load_ffmt_w_addr from tx_arbitrator.vhd +- Offset: `0xd04` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_load_ident_w_addr +Auto-extracted signal load_ident_w_addr from tx_arbitrator.vhd +- Offset: `0xd08` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_store_ts_l_w +Auto-extracted signal store_ts_l_w from tx_arbitrator.vhd +- Offset: `0xd0c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_store_md_w +Auto-extracted signal store_md_w from tx_arbitrator.vhd +- Offset: `0xd10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_store_ident_w +Auto-extracted signal store_ident_w from tx_arbitrator.vhd +- Offset: `0xd14` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_buffer_md_w +Auto-extracted signal buffer_md_w from tx_arbitrator.vhd +- Offset: `0xd18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_store_last_txtb_index +Auto-extracted signal store_last_txtb_index from tx_arbitrator.vhd +- Offset: `0xd1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_frame_valid_com_set +Auto-extracted signal frame_valid_com_set from tx_arbitrator.vhd +- Offset: `0xd20` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_frame_valid_com_clear +Auto-extracted signal frame_valid_com_clear from tx_arbitrator.vhd +- Offset: `0xd24` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_tx_arb_locked +Auto-extracted signal tx_arb_locked from tx_arbitrator.vhd +- Offset: `0xd28` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_txtb_meta_clk_en +Auto-extracted signal txtb_meta_clk_en from tx_arbitrator.vhd +- Offset: `0xd2c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_drv_tttm_ena +Auto-extracted signal drv_tttm_ena from tx_arbitrator.vhd +- Offset: `0xd30` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_fsm_tx_arb_fsm_ce +Auto-extracted signal tx_arb_fsm_ce from tx_arbitrator_fsm.vhd +- Offset: `0xd34` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_fsm_fsm_wait_state_d +Auto-extracted signal fsm_wait_state_d from tx_arbitrator_fsm.vhd +- Offset: `0xd38` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_fsm_fsm_wait_state_q +Auto-extracted signal fsm_wait_state_q from tx_arbitrator_fsm.vhd +- Offset: `0xd3c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_data_cache_tx_cache_mem +Auto-extracted signal tx_cache_mem from tx_data_cache.vhd +- Offset: `0xd40` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_shift_reg_tx_sr_output +Auto-extracted signal tx_sr_output from tx_shift_reg.vhd +- Offset: `0xd44` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_shift_reg_tx_sr_ce +Auto-extracted signal tx_sr_ce from tx_shift_reg.vhd +- Offset: `0xd48` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_shift_reg_tx_sr_pload +Auto-extracted signal tx_sr_pload from tx_shift_reg.vhd +- Offset: `0xd4c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_shift_reg_tx_sr_pload_val +Auto-extracted signal tx_sr_pload_val from tx_shift_reg.vhd +- Offset: `0xd50` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_shift_reg_tx_base_id +Auto-extracted signal tx_base_id from tx_shift_reg.vhd +- Offset: `0xd54` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_shift_reg_tx_ext_id +Auto-extracted signal tx_ext_id from tx_shift_reg.vhd +- Offset: `0xd58` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_shift_reg_tx_crc +Auto-extracted signal tx_crc from tx_shift_reg.vhd +- Offset: `0xd5c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_shift_reg_bst_ctr_grey +Auto-extracted signal bst_ctr_grey from tx_shift_reg.vhd +- Offset: `0xd60` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_shift_reg_bst_parity +Auto-extracted signal bst_parity from tx_shift_reg.vhd +- Offset: `0xd64` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_shift_reg_stuff_count +Auto-extracted signal stuff_count from tx_shift_reg.vhd +- Offset: `0xd68` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_txtb_user_accessible +Auto-extracted signal txtb_user_accessible from txt_buffer.vhd +- Offset: `0xd6c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_hw_cbs +Auto-extracted signal hw_cbs from txt_buffer.vhd +- Offset: `0xd70` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_sw_cbs +Auto-extracted signal sw_cbs from txt_buffer.vhd +- Offset: `0xd74` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_txtb_unmask_data_ram +Auto-extracted signal txtb_unmask_data_ram from txt_buffer.vhd +- Offset: `0xd78` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_txtb_port_b_data_i +Auto-extracted signal txtb_port_b_data_i from txt_buffer.vhd +- Offset: `0xd7c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_ram_write +Auto-extracted signal ram_write from txt_buffer.vhd +- Offset: `0xd80` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_ram_read_address +Auto-extracted signal ram_read_address from txt_buffer.vhd +- Offset: `0xd84` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_txtb_ram_clk_en +Auto-extracted signal txtb_ram_clk_en from txt_buffer.vhd +- Offset: `0xd88` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_clk_ram +Auto-extracted signal clk_ram from txt_buffer.vhd +- Offset: `0xd8c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_fsm_abort_applied +Auto-extracted signal abort_applied from txt_buffer_fsm.vhd +- Offset: `0xd90` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_fsm_txt_fsm_ce +Auto-extracted signal txt_fsm_ce from txt_buffer_fsm.vhd +- Offset: `0xd94` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_fsm_go_to_failed +Auto-extracted signal go_to_failed from txt_buffer_fsm.vhd +- Offset: `0xd98` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_fsm_transient_state +Auto-extracted signal transient_state from txt_buffer_fsm.vhd +- Offset: `0xd9c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_ram_port_a_address_i +Auto-extracted signal port_a_address_i from txt_buffer_ram.vhd +- Offset: `0xda0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_ram_port_a_write_i +Auto-extracted signal port_a_write_i from txt_buffer_ram.vhd +- Offset: `0xda4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_ram_port_a_data_in_i +Auto-extracted signal port_a_data_in_i from txt_buffer_ram.vhd +- Offset: `0xda8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_ram_port_b_address_i +Auto-extracted signal port_b_address_i from txt_buffer_ram.vhd +- Offset: `0xdac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_ram_port_b_data_out_i +Auto-extracted signal port_b_data_out_i from txt_buffer_ram.vhd +- Offset: `0xdb0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_ram_tst_ena +Auto-extracted signal tst_ena from txt_buffer_ram.vhd +- Offset: `0xdb4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_ram_tst_addr +Auto-extracted signal tst_addr from txt_buffer_ram.vhd +- Offset: `0xdb8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## access_signaler_be_active +Auto-extracted signal be_active from access_signaler.vhd +- Offset: `0xdbc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## access_signaler_access_in +Auto-extracted signal access_in from access_signaler.vhd +- Offset: `0xdc0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## access_signaler_access_active +Auto-extracted signal access_active from access_signaler.vhd +- Offset: `0xdc4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## access_signaler_access_active_reg +Auto-extracted signal access_active_reg from access_signaler.vhd +- Offset: `0xdc8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## address_decoder_addr_dec_i +Auto-extracted signal addr_dec_i from address_decoder.vhd +- Offset: `0xdcc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## address_decoder_addr_dec_enabled_i +Auto-extracted signal addr_dec_enabled_i from address_decoder.vhd +- Offset: `0xdd0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + diff --git a/docs/um/ip/clic/data/clicint.hjson b/docs/um/ip/clic/data/clicint.hjson new file mode 100644 index 00000000..72fed33d --- /dev/null +++ b/docs/um/ip/clic/data/clicint.hjson @@ -0,0 +1,40 @@ +// Copyright 2022 ETH Zurich and University of Bologna. +// Copyright and related rights are licensed under the Solderpad Hardware +// License, Version 0.51 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://solderpad.org/licenses/SHL-0.51. Unless required by applicable law +// or agreed to in writing, software, hardware and materials distributed under +// this License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR +// CONDITIONS OF ANY KIND, either express or implied. See the License for the +// specific language governing permissions and limitations under the License. + +// SPDX-License-Identifier: Apache-2.0 + +// CLIC interrupt register +{ + name: "CLICINT", + clock_primary: "clk_i", + bus_interfaces: [ + { protocol: "reg_iface", direction: "device" } + ], + + regwidth: "32", + registers: [ + { name: "CLICINT", + desc: "CLIC interrupt pending, enable, attribute and control", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:24", name: "CTL", desc: "interrupt control for interrupt" }, + { bits: "23:22", name: "ATTR_MODE", desc: "privilege mode of this interrupt", resval: 3}, + //{ bits: "21:19", name: "reserved" }, + { bits: "18:17", name: "ATTR_TRIG", desc: "specify trigger type for this interrupt" }, + { bits: "16", name: "ATTR_SHV", desc: "enable hardware vectoring for this interrupt" }, + + { bits: "8", name: "IE", desc: "interrupt enable for interrupt" }, + + { bits: "0", name: "IP", desc: "interrupt pending for interrupt", hwaccess: "hrw" }, + ], + } + ] +} \ No newline at end of file diff --git a/docs/um/ip/clic/data/clicint_doc.hjson b/docs/um/ip/clic/data/clicint_doc.hjson new file mode 100644 index 00000000..c7b75aba --- /dev/null +++ b/docs/um/ip/clic/data/clicint_doc.hjson @@ -0,0 +1,45 @@ + +// Copyright 2022 ETH Zurich and University of Bologna. +// Copyright and related rights are licensed under the Solderpad Hardware +// License, Version 0.51 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://solderpad.org/licenses/SHL-0.51. Unless required by applicable law +// or agreed to in writing, software, hardware and materials distributed under +// this License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR +// CONDITIONS OF ANY KIND, either express or implied. See the License for the +// specific language governing permissions and limitations under the License. + +// SPDX-License-Identifier: Apache-2.0 + +// CLIC interrupt register +{ + name: "CLICINT", + cip_id: "36", + version: "3.0.0", //3.0.0-for-carfield + clocking: [ + {clock: "clk_i", reset: "rst_ni", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device" } + ], + + regwidth: "32", + registers: [ + { name: "CLICINT", + desc: "CLIC interrupt pending, enable, attribute and control", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:24", name: "CTL", desc: "interrupt control for interrupt" }, + { bits: "23:22", name: "ATTR_MODE", desc: "privilege mode of this interrupt", resval: 3}, + //{ bits: "21:19", name: "reserved" }, + { bits: "18:17", name: "ATTR_TRIG", desc: "specify trigger type for this interrupt" }, + { bits: "16", name: "ATTR_SHV", desc: "enable hardware vectoring for this interrupt" }, + + { bits: "8", name: "IE", desc: "interrupt enable for interrupt" }, + + { bits: "0", name: "IP", desc: "interrupt pending for interrupt", hwaccess: "hrw" }, + ], + } + ] +} diff --git a/docs/um/ip/clic/data/clictv.hjson b/docs/um/ip/clic/data/clictv.hjson new file mode 100644 index 00000000..6f4b8c9f --- /dev/null +++ b/docs/um/ip/clic/data/clictv.hjson @@ -0,0 +1,40 @@ + +// Copyright 2022 ETH Zurich and University of Bologna. +// Copyright and related rights are licensed under the Solderpad Hardware +// License, Version 0.51 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://solderpad.org/licenses/SHL-0.51. Unless required by applicable law +// or agreed to in writing, software, hardware and materials distributed under +// this License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR +// CONDITIONS OF ANY KIND, either express or implied. See the License for the +// specific language governing permissions and limitations under the License. + +// SPDX-License-Identifier: Apache-2.0 + +// CLIC virtual supervisor interrupt register +{ + name: "CLICINTV", + clock_primary: "clk_i", + bus_interfaces: [ + { protocol: "reg_iface", direction: "device" } + ], + + regwidth: "32", + registers: [ + { name: "CLICINTV", + desc: "CLIC interrupt virtualization", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:26", name: "VSID3", desc: "interrupt VS id" }, + { bits: "24", name: "V3", desc: "interrupt delegated to VS-mode"}, + { bits: "23:18", name: "VSID2", desc: "interrupt VS id" }, + { bits: "16", name: "V2", desc: "interrupt delegated to VS-mode"}, + { bits: "15:10", name: "VSID1", desc: "interrupt VS id" }, + { bits: "8", name: "V1", desc: "interrupt delegated to VS-mode"}, + { bits: "7:2", name: "VSID0", desc: "interrupt VS id" }, + { bits: "0", name: "V0", desc: "interrupt delegated to VS-mode"}, + ], + } + ] +} diff --git a/docs/um/ip/clic/data/clictv_doc.hjson b/docs/um/ip/clic/data/clictv_doc.hjson new file mode 100644 index 00000000..2f5eb771 --- /dev/null +++ b/docs/um/ip/clic/data/clictv_doc.hjson @@ -0,0 +1,42 @@ +// Copyright 2022 ETH Zurich and University of Bologna. +// Copyright and related rights are licensed under the Solderpad Hardware +// License, Version 0.51 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://solderpad.org/licenses/SHL-0.51. Unless required by applicable law +// or agreed to in writing, software, hardware and materials distributed under +// this License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR +// CONDITIONS OF ANY KIND, either express or implied. See the License for the +// specific language governing permissions and limitations under the License. + +// SPDX-License-Identifier: Apache-2.0 + +// CLIC virtual supervisor interrupt register +{ + name: "CLICINTV", + cip_id: "36", + version: "3.0.0", //3.0.0-for-carfield + clocking: [ + {clock: "clk_i", reset: "rst_ni", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device" } + ], + regwidth: "32", + registers: [ + { name: "CLICINTV", + desc: "CLIC interrupt virtualization", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:26", name: "VSID3", desc: "interrupt VS id" }, + { bits: "24", name: "V3", desc: "interrupt delegated to VS-mode"}, + { bits: "23:18", name: "VSID2", desc: "interrupt VS id" }, + { bits: "16", name: "V2", desc: "interrupt delegated to VS-mode"}, + { bits: "15:10", name: "VSID1", desc: "interrupt VS id" }, + { bits: "8", name: "V1", desc: "interrupt delegated to VS-mode"}, + { bits: "7:2", name: "VSID0", desc: "interrupt VS id" }, + { bits: "0", name: "V0", desc: "interrupt delegated to VS-mode"}, + ], + } + ] +} \ No newline at end of file diff --git a/docs/um/ip/clic/data/clicvs.hjson b/docs/um/ip/clic/data/clicvs.hjson new file mode 100644 index 00000000..8cd2c357 --- /dev/null +++ b/docs/um/ip/clic/data/clicvs.hjson @@ -0,0 +1,36 @@ + +// Copyright 2022 ETH Zurich and University of Bologna. +// Copyright and related rights are licensed under the Solderpad Hardware +// License, Version 0.51 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://solderpad.org/licenses/SHL-0.51. Unless required by applicable law +// or agreed to in writing, software, hardware and materials distributed under +// this License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR +// CONDITIONS OF ANY KIND, either express or implied. See the License for the +// specific language governing permissions and limitations under the License. + +// SPDX-License-Identifier: Apache-2.0 + +// CLIC virtual supervisor configuration register +{ + name: "CLICVS", + clock_primary: "clk_i", + bus_interfaces: [ + { protocol: "reg_iface", direction: "device" } + ], + + regwidth: "32", + registers: [ + { name: "vsprio", + desc: "CLIC virtual supervisor priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "24", name: "prio3", desc: "VS3 priority" }, + { bits: "16", name: "prio2", desc: "VS2 priority" }, + { bits: "8", name: "prio1", desc: "VS1 priority" }, + { bits: "0", name: "prio0", desc: "VS0 priority" }, + ], + } + ] +} diff --git a/docs/um/ip/clic/data/clicvs_doc.hjson b/docs/um/ip/clic/data/clicvs_doc.hjson new file mode 100644 index 00000000..39420d5f --- /dev/null +++ b/docs/um/ip/clic/data/clicvs_doc.hjson @@ -0,0 +1,40 @@ + +// Copyright 2022 ETH Zurich and University of Bologna. +// Copyright and related rights are licensed under the Solderpad Hardware +// License, Version 0.51 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://solderpad.org/licenses/SHL-0.51. Unless required by applicable law +// or agreed to in writing, software, hardware and materials distributed under +// this License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR +// CONDITIONS OF ANY KIND, either express or implied. See the License for the +// specific language governing permissions and limitations under the License. + +// SPDX-License-Identifier: Apache-2.0 + +// CLIC virtual supervisor configuration register +{ + name: "CLICVS", + cip_id: "36", + version: "3.0.0", //3.0.0-for-carfield + clocking: [ + {clock: "clk_i", reset: "rst_ni", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device" } + ], + + regwidth: "32", + registers: [ + { name: "vsprio", + desc: "CLIC virtual supervisor priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "24", name: "prio3", desc: "VS3 priority" }, + { bits: "16", name: "prio2", desc: "VS2 priority" }, + { bits: "8", name: "prio1", desc: "VS1 priority" }, + { bits: "0", name: "prio0", desc: "VS0 priority" }, + ], + } + ] +} diff --git a/docs/um/ip/clic/data/mclic.hjson b/docs/um/ip/clic/data/mclic.hjson new file mode 100644 index 00000000..a136919d --- /dev/null +++ b/docs/um/ip/clic/data/mclic.hjson @@ -0,0 +1,47 @@ + +// Copyright 2022 ETH Zurich and University of Bologna. +// Copyright and related rights are licensed under the Solderpad Hardware +// License, Version 0.51 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://solderpad.org/licenses/SHL-0.51. Unless required by applicable law +// or agreed to in writing, software, hardware and materials distributed under +// this License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR +// CONDITIONS OF ANY KIND, either express or implied. See the License for the +// specific language governing permissions and limitations under the License. + +// SPDX-License-Identifier: Apache-2.0 + +# CLIC m-mode registers +{ + name: "MCLIC", + clock_primary: "clk_i", + bus_interfaces: [ + { protocol: "reg_iface", direction: "device" } + ], + + regwidth: "32", + registers: [ + { name: "MCLICCFG", + desc: "CLIC configuration", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:28", name: "reserved", desc: "reserved", swaccess: "ro", hwaccess: "none" }, # workaround for full 32-bit access + { bits: "27:24", name: "unlbits", desc: "number of privilege mode bits in user mode" }, + //{ bits: "23:20", name: "reserved" }, + { bits: "19:16", name: "snlbits", desc: "number of privilege mode bits in supervisor mode" }, + //{ bits: "15:6", name: "reserved" }, + { bits: "5:4", name: "nmbits", desc: "number of privilege mode bits" }, + { bits: "3:0", name: "mnlbits", desc: "number of interrupt level bits in machine mode" }, + ], + }, + { name: "CLICMNXTICONF", + desc: "CLIC enable mnxti irq forwarding logic", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "0" } + ], + }, + ] +} diff --git a/docs/um/ip/clic/data/mclic_doc.hjson b/docs/um/ip/clic/data/mclic_doc.hjson new file mode 100644 index 00000000..272de2cd --- /dev/null +++ b/docs/um/ip/clic/data/mclic_doc.hjson @@ -0,0 +1,51 @@ + +// Copyright 2022 ETH Zurich and University of Bologna. +// Copyright and related rights are licensed under the Solderpad Hardware +// License, Version 0.51 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://solderpad.org/licenses/SHL-0.51. Unless required by applicable law +// or agreed to in writing, software, hardware and materials distributed under +// this License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR +// CONDITIONS OF ANY KIND, either express or implied. See the License for the +// specific language governing permissions and limitations under the License. + +// SPDX-License-Identifier: Apache-2.0 + +# CLIC m-mode registers +{ + name: "MCLIC", + cip_id: "36", + version: "3.0.0", //3.0.0-for-carfield + clocking: [ + {clock: "clk_i", reset: "rst_ni", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device" } + ], + + regwidth: "32", + registers: [ + { name: "MCLICCFG", + desc: "CLIC configuration", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:28", name: "reserved", desc: "reserved", swaccess: "ro", hwaccess: "none" }, # workaround for full 32-bit access + { bits: "27:24", name: "unlbits", desc: "number of privilege mode bits in user mode" }, + //{ bits: "23:20", name: "reserved" }, + { bits: "19:16", name: "snlbits", desc: "number of privilege mode bits in supervisor mode" }, + //{ bits: "15:6", name: "reserved" }, + { bits: "5:4", name: "nmbits", desc: "number of privilege mode bits" }, + { bits: "3:0", name: "mnlbits", desc: "number of interrupt level bits in machine mode" }, + ], + }, + { name: "CLICMNXTICONF", + desc: "CLIC enable mnxti irq forwarding logic", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "0" } + ], + }, + ] +} diff --git a/docs/um/ip/clic/doc/clicint_registers.md b/docs/um/ip/clic/doc/clicint_registers.md new file mode 100644 index 00000000..063ddf9b --- /dev/null +++ b/docs/um/ip/clic/doc/clicint_registers.md @@ -0,0 +1,30 @@ +## Summary + +| Name | Offset | Length | Description | +|:------------------------------|:---------|---------:|:------------------------------------------------------| +| CLICINT.[`CLICINT`](#clicint) | 0x0 | 4 | CLIC interrupt pending, enable, attribute and control | + +## CLICINT +CLIC interrupt pending, enable, attribute and control +- Offset: `0x0` +- Reset default: `0xc00000` +- Reset mask: `0xffc70101` + +### Fields + +```wavejson +{"reg": [{"name": "IP", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 7}, {"name": "IE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 7}, {"name": "ATTR_SHV", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ATTR_TRIG", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 3}, {"name": "ATTR_MODE", "bits": 2, "attr": ["rw"], "rotate": -90}, {"name": "CTL", "bits": 8, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:---------------------------------------------| +| 31:24 | rw | 0x0 | CTL | interrupt control for interrupt | +| 23:22 | rw | 0x3 | ATTR_MODE | privilege mode of this interrupt | +| 21:19 | | | | Reserved | +| 18:17 | rw | 0x0 | ATTR_TRIG | specify trigger type for this interrupt | +| 16 | rw | 0x0 | ATTR_SHV | enable hardware vectoring for this interrupt | +| 15:9 | | | | Reserved | +| 8 | rw | 0x0 | IE | interrupt enable for interrupt | +| 7:1 | | | | Reserved | +| 0 | rw | 0x0 | IP | interrupt pending for interrupt | + diff --git a/docs/um/ip/clic/doc/clictv_registers.md b/docs/um/ip/clic/doc/clictv_registers.md new file mode 100644 index 00000000..08e3109e --- /dev/null +++ b/docs/um/ip/clic/doc/clictv_registers.md @@ -0,0 +1,33 @@ +## Summary + +| Name | Offset | Length | Description | +|:---------------------------------|:---------|---------:|:------------------------------| +| CLICINTV.[`CLICINTV`](#clicintv) | 0x0 | 4 | CLIC interrupt virtualization | + +## CLICINTV +CLIC interrupt virtualization +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xfdfdfdfd` + +### Fields + +```wavejson +{"reg": [{"name": "V0", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 1}, {"name": "VSID0", "bits": 6, "attr": ["rw"], "rotate": 0}, {"name": "V1", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 1}, {"name": "VSID1", "bits": 6, "attr": ["rw"], "rotate": 0}, {"name": "V2", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 1}, {"name": "VSID2", "bits": 6, "attr": ["rw"], "rotate": 0}, {"name": "V3", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 1}, {"name": "VSID3", "bits": 6, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------| +| 31:26 | rw | 0x0 | VSID3 | interrupt VS id | +| 25 | | | | Reserved | +| 24 | rw | 0x0 | V3 | interrupt delegated to VS-mode | +| 23:18 | rw | 0x0 | VSID2 | interrupt VS id | +| 17 | | | | Reserved | +| 16 | rw | 0x0 | V2 | interrupt delegated to VS-mode | +| 15:10 | rw | 0x0 | VSID1 | interrupt VS id | +| 9 | | | | Reserved | +| 8 | rw | 0x0 | V1 | interrupt delegated to VS-mode | +| 7:2 | rw | 0x0 | VSID0 | interrupt VS id | +| 1 | | | | Reserved | +| 0 | rw | 0x0 | V0 | interrupt delegated to VS-mode | + diff --git a/docs/um/ip/clic/doc/clicvs_registers.md b/docs/um/ip/clic/doc/clicvs_registers.md new file mode 100644 index 00000000..f4c54193 --- /dev/null +++ b/docs/um/ip/clic/doc/clicvs_registers.md @@ -0,0 +1,29 @@ +## Summary + +| Name | Offset | Length | Description | +|:---------------------------|:---------|---------:|:---------------------------------| +| CLICVS.[`vsprio`](#vsprio) | 0x0 | 4 | CLIC virtual supervisor priority | + +## vsprio +CLIC virtual supervisor priority +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0x1010101` + +### Fields + +```wavejson +{"reg": [{"name": "prio0", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 7}, {"name": "prio1", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 7}, {"name": "prio2", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 7}, {"name": "prio3", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 7}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:25 | | | | Reserved | +| 24 | rw | 0x0 | prio3 | VS3 priority | +| 23:17 | | | | Reserved | +| 16 | rw | 0x0 | prio2 | VS2 priority | +| 15:9 | | | | Reserved | +| 8 | rw | 0x0 | prio1 | VS1 priority | +| 7:1 | | | | Reserved | +| 0 | rw | 0x0 | prio0 | VS0 priority | + diff --git a/docs/um/ip/clic/doc/mclic_registers.md b/docs/um/ip/clic/doc/mclic_registers.md new file mode 100644 index 00000000..8c70c34f --- /dev/null +++ b/docs/um/ip/clic/doc/mclic_registers.md @@ -0,0 +1,46 @@ +## Summary + +| Name | Offset | Length | Description | +|:----------------------------------------|:---------|---------:|:---------------------------------------| +| MCLIC.[`MCLICCFG`](#mcliccfg) | 0x0 | 4 | CLIC configuration | +| MCLIC.[`CLICMNXTICONF`](#clicmnxticonf) | 0x4 | 4 | CLIC enable mnxti irq forwarding logic | + +## MCLICCFG +CLIC configuration +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xff0f003f` + +### Fields + +```wavejson +{"reg": [{"name": "mnlbits", "bits": 4, "attr": ["rw"], "rotate": -90}, {"name": "nmbits", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 10}, {"name": "snlbits", "bits": 4, "attr": ["rw"], "rotate": -90}, {"bits": 4}, {"name": "unlbits", "bits": 4, "attr": ["rw"], "rotate": -90}, {"name": "reserved", "bits": 4, "attr": ["ro"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 100}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:-------------------------------------------------| +| 31:28 | ro | 0x0 | reserved | reserved | +| 27:24 | rw | 0x0 | unlbits | number of privilege mode bits in user mode | +| 23:20 | | | | Reserved | +| 19:16 | rw | 0x0 | snlbits | number of privilege mode bits in supervisor mode | +| 15:6 | | | | Reserved | +| 5:4 | rw | 0x0 | nmbits | number of privilege mode bits | +| 3:0 | rw | 0x0 | mnlbits | number of interrupt level bits in machine mode | + +## CLICMNXTICONF +CLIC enable mnxti irq forwarding logic +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "CLICMNXTICONF", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 150}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | CLICMNXTICONF | | + diff --git a/docs/um/ip/clint/data/clint.hjson b/docs/um/ip/clint/data/clint.hjson new file mode 100644 index 00000000..6692b7cb --- /dev/null +++ b/docs/um/ip/clint/data/clint.hjson @@ -0,0 +1,76 @@ +// Copyright 2020 ETH Zurich and University of Bologna. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 +// +// Author: Florian Zaruba + +{ + name: "CLINT", + clock_primary: "clk_i", + bus_interfaces: [ + { protocol: "reg_iface", direction: "device" } + ], + regwidth: "32", + param_list: [ + { name: "NumCores", + desc: "Number of cores", + type: "int", + default: "${cores}", + local: "true" + } + ], + registers: [ + { multireg: { + name: "MSIP", + desc: "Machine Software Interrupt Pending ", + count: "NumCores", + cname: "MSIP", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "0", name: "P", desc: "Machine Software Interrupt Pending" }, + { bits: "31:1", name: "RSVD", desc: "Reserved", resval: "0", swaccess: "ro", hwaccess: "none" } + ] + } + }, + { skipto: "0x4000" }, +% for i in range(cores): + { name: "MTIMECMP_LOW${i}", + desc: "Machine Timer Compare", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0", name: "MTIMECMP_LOW", desc: "Machine Time Compare (Low) Core ${i}" } + ] + }, + { + name: "MTIMECMP_HIGH${i}", + desc: "Machine Timer Compare", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0", name: "MTIMECMP_HIGH", desc: "Machine Time Compare (High) Core ${i}" } + ] + }, +% endfor + { skipto: "0xBFF8" }, + { + name: "MTIME_LOW", + desc: "Timer Register Low", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { bits: "31:0", name: "MTIME_LOW", desc: "Machine Time (Low)" } + ] + }, + { + name: "MTIME_HIGH", + desc: "Timer Register High", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { bits: "31:0", name: "MTIME_HIGH", desc: "Machine Time (High)" } + ] + }, + ] +} \ No newline at end of file diff --git a/docs/um/ip/clint/data/clint.hjson~ b/docs/um/ip/clint/data/clint.hjson~ new file mode 100644 index 00000000..e69de29b diff --git a/docs/um/ip/clint/data/clint_Doc.hjson b/docs/um/ip/clint/data/clint_Doc.hjson new file mode 100644 index 00000000..285ce1ac --- /dev/null +++ b/docs/um/ip/clint/data/clint_Doc.hjson @@ -0,0 +1,97 @@ +// Copyright 2020 ETH Zurich and University of Bologna. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 +// +// Author: Florian Zaruba + +{ + name: "CLINT", + cip_id: "2", + version: "0.2.0", + clocking: [ + {clock: "clk_i", reset: "rst_ni", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device" } + ], + regwidth: "32", + param_list: [ + { name: "NumCores", + desc: "Number of cores", + type: "int", + default: "2", + local: "true" + } + ], + registers: [ + { multireg: { + name: "MSIP", + desc: "Machine Software Interrupt Pending", + count: "2", // Number of cores + cname: "MSIP", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "0", name: "P", desc: "Machine Software Interrupt Pending" }, + { bits: "31:1", name: "RSVD", desc: "Reserved", resval: "0", swaccess: "ro", hwaccess: "none" } + ] + } + }, + { skipto: "0x4000" }, + + // Core 0 MTIMECMP Registers + { name: "MTIMECMP_LOW0", + desc: "Machine Timer Compare for Core 0", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0", name: "MTIMECMP_LOW", desc: "Machine Time Compare (Low) Core 0" } + ] + }, + { name: "MTIMECMP_HIGH0", + desc: "Machine Timer Compare for Core 0", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0", name: "MTIMECMP_HIGH", desc: "Machine Time Compare (High) Core 0" } + ] + }, + + // Core 1 MTIMECMP Registers + { name: "MTIMECMP_LOW1", + desc: "Machine Timer Compare for Core 1", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0", name: "MTIMECMP_LOW", desc: "Machine Time Compare (Low) Core 1" } + ] + }, + { name: "MTIMECMP_HIGH1", + desc: "Machine Timer Compare for Core 1", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0", name: "MTIMECMP_HIGH", desc: "Machine Time Compare (High) Core 1" } + ] + }, + + { skipto: "0xBFF8" }, + + { name: "MTIME_LOW", + desc: "Timer Register Low", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { bits: "31:0", name: "MTIME_LOW", desc: "Machine Time (Low)" } + ] + }, + { name: "MTIME_HIGH", + desc: "Timer Register High", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { bits: "31:0", name: "MTIME_HIGH", desc: "Machine Time (High)" } + ] + } + ] +} \ No newline at end of file diff --git a/docs/um/ip/clint/doc/registers.md b/docs/um/ip/clint/doc/registers.md new file mode 100644 index 00000000..78fe425d --- /dev/null +++ b/docs/um/ip/clint/doc/registers.md @@ -0,0 +1,133 @@ +## Summary + +| Name | Offset | Length | Description | +|:------------------------------------------|:---------|---------:|:-----------------------------------| +| CLINT.[`MSIP_0`](#msip) | 0x0 | 4 | Machine Software Interrupt Pending | +| CLINT.[`MSIP_1`](#msip) | 0x4 | 4 | Machine Software Interrupt Pending | +| CLINT.[`MTIMECMP_LOW0`](#mtimecmp_low0) | 0x4000 | 4 | Machine Timer Compare for Core 0 | +| CLINT.[`MTIMECMP_HIGH0`](#mtimecmp_high0) | 0x4004 | 4 | Machine Timer Compare for Core 0 | +| CLINT.[`MTIMECMP_LOW1`](#mtimecmp_low1) | 0x4008 | 4 | Machine Timer Compare for Core 1 | +| CLINT.[`MTIMECMP_HIGH1`](#mtimecmp_high1) | 0x400c | 4 | Machine Timer Compare for Core 1 | +| CLINT.[`MTIME_LOW`](#mtime_low) | 0xbff8 | 4 | Timer Register Low | +| CLINT.[`MTIME_HIGH`](#mtime_high) | 0xbffc | 4 | Timer Register High | + +## MSIP +Machine Software Interrupt Pending +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:-------|:---------| +| MSIP_0 | 0x0 | +| MSIP_1 | 0x4 | + + +### Fields + +```wavejson +{"reg": [{"name": "P", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RSVD", "bits": 31, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------| +| 31:1 | ro | 0x0 | RSVD | Reserved | +| 0 | rw | 0x0 | P | Machine Software Interrupt Pending | + +## MTIMECMP_LOW0 +Machine Timer Compare for Core 0 +- Offset: `0x4000` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MTIMECMP_LOW", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:----------------------------------| +| 31:0 | rw | 0x0 | MTIMECMP_LOW | Machine Time Compare (Low) Core 0 | + +## MTIMECMP_HIGH0 +Machine Timer Compare for Core 0 +- Offset: `0x4004` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MTIMECMP_HIGH", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:-----------------------------------| +| 31:0 | rw | 0x0 | MTIMECMP_HIGH | Machine Time Compare (High) Core 0 | + +## MTIMECMP_LOW1 +Machine Timer Compare for Core 1 +- Offset: `0x4008` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MTIMECMP_LOW", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:----------------------------------| +| 31:0 | rw | 0x0 | MTIMECMP_LOW | Machine Time Compare (Low) Core 1 | + +## MTIMECMP_HIGH1 +Machine Timer Compare for Core 1 +- Offset: `0x400c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MTIMECMP_HIGH", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:-----------------------------------| +| 31:0 | rw | 0x0 | MTIMECMP_HIGH | Machine Time Compare (High) Core 1 | + +## MTIME_LOW +Timer Register Low +- Offset: `0xbff8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MTIME_LOW", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-------------------| +| 31:0 | rw | 0x0 | MTIME_LOW | Machine Time (Low) | + +## MTIME_HIGH +Timer Register High +- Offset: `0xbffc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MTIME_HIGH", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------------| +| 31:0 | rw | 0x0 | MTIME_HIGH | Machine Time (High) | + diff --git a/docs/um/ip/cluster_peripherals/cl_dma/Data/CL_DMA.hjson b/docs/um/ip/cluster_peripherals/cl_dma/Data/CL_DMA.hjson new file mode 100644 index 00000000..4777ef75 --- /dev/null +++ b/docs/um/ip/cluster_peripherals/cl_dma/Data/CL_DMA.hjson @@ -0,0 +1,327 @@ +// Copyright lowRISC contributors (OpenTitan project). +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 +// +# DMA register template +{ + name: "dma" + human_name: "DMA Controller" + one_line_desc: "DMA Controller for the integrated OpenTitan." + one_paragraph_desc: ''' + Cluster DMA component manages the following features: + - parametric number of RX/TX full-duplex channels + - Up to 16 outstanding transfers between L1 and L2 memories + - Linear or 2D transfers modes on both TCDM or EXT (L2) sides + ''' + cip_id: "36", + design_spec: "../doc" + dv_doc: "../doc/dv" + version: "1.0.0" + + clocking: [{clock: "clk_i", reset: "rst_ni", primary: true}] + scan: "true" // Enable `scanmode_i` port + bus_interfaces: [ + { protocol: "tlul", direction: "device", hier_path: "u_dma_reg" } + { protocol: "tlul", direction: "host", name: "host" } + ] + param_list: [ + { name: "NumIntClearSources", + desc: "Number of interrupt clearing sources to process", + type: "int", + default: "11", + local: "true" + }, + { name: "EnableDataIntgGen", + desc: "Compute integrity bits for A channel data on all TL-UL host ports", + type: "bit", + default: "1'b1", + local: "false", + expose: "true", + }, + { name: "EnableRspDataIntgCheck", + desc: "Enable integrity checks on the response TL-UL D channel", + type: "bit", + default: "1'b1", + local: "false", + expose: "true", + }, + { name: "TlUserRsvd", + desc: "Value of `rsvd` field in A channel of all TL-UL host ports", + type: "logic [tlul_pkg::RsvdWidth-1:0]" + default: "'0", + local: "false", + expose: "true", + }, + { name: "SysRacl", + desc: "Value of `racl_vec` field in `sys` output", + type: "logic [dma_pkg::SYS_RACL_WIDTH-1:0]" + default: "'0", + local: "false", + expose: "true", + }, + { name: "OtAgentId", + desc: "OT Agent ID" + type: "int unsigned" + default: "0", + local: "false", + expose: "true", + }, + ], + inter_signal_list: [ + { name: "lsio_trigger" + type: "uni", + act: "rcv", + package: "dma_pkg", + struct: "lsio_trigger", + width: "1" + } + { name: "sys" + type: "req_rsp" + struct: "sys" + package: "dma_pkg" + act: "req" + width: "1" + } + { struct: "tl_h2d" + package: "tlul_pkg" + type: "uni" + name: "ctn_tl_h2d" + act: "req" + desc: "TL-UL host port for egress into CTN (request part), synchronous" + } + { struct: "tl_d2h" + package: "tlul_pkg" + type: "uni" + name: "ctn_tl_d2h" + act: "rcv" + desc: "TL-UL host port for egress into CTN (response part), synchronous" + } + ] + interrupt_list: [ + { name: "dma_done" + desc: "DMA operation has been completed." + type: "status" + } + { name: "dma_chunk_done" + desc: "Indicates the transfer of a single chunk has been completed." + type: "status" + } + { name: "dma_error" + desc: "DMA error has occurred. DMA_STATUS.error_code register shows the details." + type: "status" + } + ] + alert_list: [ + { name: "fatal_fault" + desc: "This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected." + } + ] + countermeasures: [ + { name: "BUS.INTEGRITY", + desc: "End-to-end bus integrity scheme." + } + { name: "ASID.INTERSIG.MUBI", + desc: "Destination and source ASID signals are multibit encoded." + } + { name: "RANGE.CONFIG.REGWEN_MUBI", + desc: "DMA enabled memory range is software multibit lockable." + } + ] + regwidth: "32" + registers: [ + { name: "CMD" + desc: ''' + ? + ? + ? + ''' + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "16:0" + name: "LEN" + resval: 0x0 + desc: "Transfer length in bytes configuration bitfield." + } + { bits: "17" + name: "TYPE" + resval: 0x0 + desc: '''Transfer direction configuration bitfield: + -1'b0: L1 to L2 + -1'b1: L2 to L1 + ''' + } + { bits: "18" + name: "INC" + resval: 0x0 + desc: '''Transfer incremental configuration bitfield: + -1'b0: non incremental. + -1'b1: incremental. + ''' + } + { bits: "19" + name: "EXT_2D" + resval: 0x0 + desc: '''Transfer type configuration bitfield: + -1'b0: linear transfer in EXT interface. + -1'b1: 2D transfer in EXT interface. + ''' + } + { bits: "20" + name: "ELE" + resval: 0x0 + desc: '''Transfer event generation configuration bitfield: + -1'b0: disabled. + -1'b1: enabled. + ''' + } + { bits: "21" + name: "ILE" + resval: 0x0 + desc: '''Transfer interrupt generation configuration bitfield: + -1'b0: disabled. + -1'b1: enabled. + ''' + } + { bits: "22" + name: "BLE" + resval: 0x0 + desc: '''Transfer event or interrupt broadcast configuration bitfield: + 1'b0: event or interrupt is routed to the cluster core who initiated the transfer. + 1'b1: event or interrupt are broadcasted to all cluster cores. + ''' + } + { bits: "23" + name: "TCDM_2D" + resval: 0x0 + desc: '''Transfer type configuration bitfield: + -1'b0: linear transfer in TCDM interface + -1'b1: 2D transfer in TCDM interface + ''' + } + ] + } + { name: "TID" + desc: "Transfer identifier value bitfield." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "3:0" + name: "get_tid" + resval: 0x0 + desc: "Transfer identifier value bitfield." + } + ] + } + { name: "TCDM_ADDR" + desc: "Transfer L1 base address configuration bitfield." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "tcdm_addr" + resval: 0x0 + desc: "Transfer L1 base address configuration bitfield." + } + ] + } + { name: "EXT_ADDR" + desc: "Transfer L2 base address configuration bitfield." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "ext_addr" + resval: 0x0 + desc: "Transfer L2 base address configuration bitfield." + } + ] + } + { name: "EXT_COUNT_2D" + desc: "EXT 2D transfer conut value configuration bitfield." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "ext_count_2D" + resval: 0x0 + desc: "EXT 2D transfer conut value configuration bitfield." + } + ] + } + { name: "EXT_STRIDE_2D" + desc: "EXT 2D transfer stride value configuration bitfield." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "ext_stride_2D" + resval: 0x0 + desc: "EXT 2D transfer stride value configuration bitfield." + } + ] + } + { name: "TCDM_COUNT_2D" + desc: "TCDM 2D transfer conut value configuration bitfield." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "tcdm_count_2D" + resval: 0x0 + desc: "TCDM 2D transfer conut value configuration bitfield." + } + ] + } + { name: "TCDM_STRIDE_2D" + desc: "TCDM 2D transfer stride value configuration bitfield." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "tcdm_stride_2D" + resval: 0x0 + desc: "TCDM 2D transfer stride value configuration bitfield." + } + ] + } + { name: "STATUS" + desc: ''' + ? + ? + ? + ''' + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "15:0" + name: "TID_TR" + resval: 0x0 + desc: '''Transfer status bitfield: + TID_TR[i]=1'b1 means that transfer with TID i is active. + ''' + } + { bits: "31:16" + name: "TID_ALLOC" + resval: 0x0 + desc: '''Transfer status bitfield: + - TID_TR[i]=1'b0 means that transfer allocator with TID i-16 is free. + - TID_TR[i]=1'b1 means that transfer allocator with TID i-16 is reserved. + ''' + } + ] + } + { name: "TID_FREE" + desc: "Transfer canceller configuration bitfield. Writing a 1'b1 in TID_FREE[i] will free transfer with TID i." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "15:0" + name: "tid_free" + resval: 0x0 + desc: "Transfer canceller configuration bitfield. Writing a 1'b1 in TID_FREE[i] will free transfer with TID i." + } + ] + } + ] +} diff --git a/docs/um/ip/cluster_peripherals/cl_dma/Doc/CL_DMA.md b/docs/um/ip/cluster_peripherals/cl_dma/Doc/CL_DMA.md new file mode 100644 index 00000000..541f1c7f --- /dev/null +++ b/docs/um/ip/cluster_peripherals/cl_dma/Doc/CL_DMA.md @@ -0,0 +1,268 @@ +## Summary + +| Name | Offset | Length | Description | +|:----------------------------------------|:---------|---------:|:--------------------------------------------------------------------------------------------------------| +| dma.[`INTR_STATE`](#intr_state) | 0x0 | 4 | Interrupt State Register | +| dma.[`INTR_ENABLE`](#intr_enable) | 0x4 | 4 | Interrupt Enable Register | +| dma.[`INTR_TEST`](#intr_test) | 0x8 | 4 | Interrupt Test Register | +| dma.[`ALERT_TEST`](#alert_test) | 0xc | 4 | Alert Test Register | +| dma.[`CMD`](#cmd) | 0x10 | 4 | ? | +| dma.[`TID`](#tid) | 0x14 | 4 | Transfer identifier value bitfield. | +| dma.[`TCDM_ADDR`](#tcdm_addr) | 0x18 | 4 | Transfer L1 base address configuration bitfield. | +| dma.[`EXT_ADDR`](#ext_addr) | 0x1c | 4 | Transfer L2 base address configuration bitfield. | +| dma.[`EXT_COUNT_2D`](#ext_count_2d) | 0x20 | 4 | EXT 2D transfer conut value configuration bitfield. | +| dma.[`EXT_STRIDE_2D`](#ext_stride_2d) | 0x24 | 4 | EXT 2D transfer stride value configuration bitfield. | +| dma.[`TCDM_COUNT_2D`](#tcdm_count_2d) | 0x28 | 4 | TCDM 2D transfer conut value configuration bitfield. | +| dma.[`TCDM_STRIDE_2D`](#tcdm_stride_2d) | 0x2c | 4 | TCDM 2D transfer stride value configuration bitfield. | +| dma.[`STATUS`](#status) | 0x30 | 4 | ? | +| dma.[`TID_FREE`](#tid_free) | 0x34 | 4 | Transfer canceller configuration bitfield. Writing a 1'b1 in TID_FREE[i] will free transfer with TID i. | + +## INTR_STATE +Interrupt State Register +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "dma_done", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "dma_chunk_done", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "dma_error", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 160}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:--------------------------------------------------------------------------| +| 31:3 | | | | Reserved | +| 2 | ro | 0x0 | dma_error | DMA error has occurred. DMA_STATUS.error_code register shows the details. | +| 1 | ro | 0x0 | dma_chunk_done | Indicates the transfer of a single chunk has been completed. | +| 0 | ro | 0x0 | dma_done | DMA operation has been completed. | + +## INTR_ENABLE +Interrupt Enable Register +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "dma_done", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "dma_chunk_done", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "dma_error", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 160}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:-------------------------------------------------------------------------| +| 31:3 | | | | Reserved | +| 2 | rw | 0x0 | dma_error | Enable interrupt when [`INTR_STATE.dma_error`](#intr_state) is set. | +| 1 | rw | 0x0 | dma_chunk_done | Enable interrupt when [`INTR_STATE.dma_chunk_done`](#intr_state) is set. | +| 0 | rw | 0x0 | dma_done | Enable interrupt when [`INTR_STATE.dma_done`](#intr_state) is set. | + +## INTR_TEST +Interrupt Test Register +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "dma_done", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "dma_chunk_done", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "dma_error", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 160}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:------------------------------------------------------------------| +| 31:3 | | | | Reserved | +| 2 | wo | 0x0 | dma_error | Write 1 to force [`INTR_STATE.dma_error`](#intr_state) to 1. | +| 1 | wo | 0x0 | dma_chunk_done | Write 1 to force [`INTR_STATE.dma_chunk_done`](#intr_state) to 1. | +| 0 | wo | 0x0 | dma_done | Write 1 to force [`INTR_STATE.dma_done`](#intr_state) to 1. | + +## ALERT_TEST +Alert Test Register +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "fatal_fault", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:-------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | fatal_fault | Write 1 to trigger one alert event of this kind. | + +## CMD +? +? +? +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "LEN", "bits": 17, "attr": ["wo"], "rotate": 0}, {"name": "TYPE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "INC", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "EXT_2D", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "ELE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "ILE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "BLE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "TCDM_2D", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:24 | | | | Reserved | +| 23 | wo | 0x0 | TCDM_2D | Transfer type configuration bitfield: -1'b0: linear transfer in TCDM interface -1'b1: 2D transfer in TCDM interface | +| 22 | wo | 0x0 | BLE | Transfer event or interrupt broadcast configuration bitfield: 1'b0: event or interrupt is routed to the cluster core who initiated the transfer. 1'b1: event or interrupt are broadcasted to all cluster cores. | +| 21 | wo | 0x0 | ILE | Transfer interrupt generation configuration bitfield: -1'b0: disabled. -1'b1: enabled. | +| 20 | wo | 0x0 | ELE | Transfer event generation configuration bitfield: -1'b0: disabled. -1'b1: enabled. | +| 19 | wo | 0x0 | EXT_2D | Transfer type configuration bitfield: -1'b0: linear transfer in EXT interface. -1'b1: 2D transfer in EXT interface. | +| 18 | wo | 0x0 | INC | Transfer incremental configuration bitfield: -1'b0: non incremental. -1'b1: incremental. | +| 17 | wo | 0x0 | TYPE | Transfer direction configuration bitfield: -1'b0: L1 to L2 -1'b1: L2 to L1 | +| 16:0 | wo | 0x0 | LEN | Transfer length in bytes configuration bitfield. | + +## TID +Transfer identifier value bitfield. +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0xf` + +### Fields + +```wavejson +{"reg": [{"name": "get_tid", "bits": 4, "attr": ["ro"], "rotate": -90}, {"bits": 28}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:------------------------------------| +| 31:4 | | | | Reserved | +| 3:0 | ro | 0x0 | get_tid | Transfer identifier value bitfield. | + +## TCDM_ADDR +Transfer L1 base address configuration bitfield. +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "tcdm_addr", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-------------------------------------------------| +| 31:0 | wo | 0x0 | tcdm_addr | Transfer L1 base address configuration bitfield. | + +## EXT_ADDR +Transfer L2 base address configuration bitfield. +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "ext_addr", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:-------------------------------------------------| +| 31:0 | wo | 0x0 | ext_addr | Transfer L2 base address configuration bitfield. | + +## EXT_COUNT_2D +EXT 2D transfer conut value configuration bitfield. +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "ext_count_2D", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:----------------------------------------------------| +| 31:0 | wo | 0x0 | ext_count_2D | EXT 2D transfer conut value configuration bitfield. | + +## EXT_STRIDE_2D +EXT 2D transfer stride value configuration bitfield. +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "ext_stride_2D", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:-----------------------------------------------------| +| 31:0 | wo | 0x0 | ext_stride_2D | EXT 2D transfer stride value configuration bitfield. | + +## TCDM_COUNT_2D +TCDM 2D transfer conut value configuration bitfield. +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "tcdm_count_2D", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:-----------------------------------------------------| +| 31:0 | wo | 0x0 | tcdm_count_2D | TCDM 2D transfer conut value configuration bitfield. | + +## TCDM_STRIDE_2D +TCDM 2D transfer stride value configuration bitfield. +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "tcdm_stride_2D", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:------------------------------------------------------| +| 31:0 | wo | 0x0 | tcdm_stride_2D | TCDM 2D transfer stride value configuration bitfield. | + +## STATUS +? +? +? +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "TID_TR", "bits": 16, "attr": ["ro"], "rotate": 0}, {"name": "TID_ALLOC", "bits": 16, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:--------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:16 | ro | 0x0 | TID_ALLOC | Transfer status bitfield: - TID_TR[i]=1'b0 means that transfer allocator with TID i-16 is free. - TID_TR[i]=1'b1 means that transfer allocator with TID i-16 is reserved. | +| 15:0 | ro | 0x0 | TID_TR | Transfer status bitfield: TID_TR[i]=1'b1 means that transfer with TID i is active. | + +## TID_FREE +Transfer canceller configuration bitfield. Writing a 1'b1 in TID_FREE[i] will free transfer with TID i. +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "tid_free", "bits": 16, "attr": ["wo"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------------------------------------------------------------------------------------------------| +| 31:16 | | | | Reserved | +| 15:0 | wo | 0x0 | tid_free | Transfer canceller configuration bitfield. Writing a 1'b1 in TID_FREE[i] will free transfer with TID i. | + diff --git a/docs/um/ip/cluster_peripherals/cl_event_unit/data/cl_event_unit_regs.hjson b/docs/um/ip/cluster_peripherals/cl_event_unit/data/cl_event_unit_regs.hjson new file mode 100644 index 00000000..acb68128 --- /dev/null +++ b/docs/um/ip/cluster_peripherals/cl_event_unit/data/cl_event_unit_regs.hjson @@ -0,0 +1,1588 @@ +// Copyright 2014-2018 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51, see LICENSE for details. +// +// Author: Michael Gautschi + +{ + name: "cluster_event_unit" + one_paragraph_desc: ''' + Cluster event unit component manages the following features: + - Cluster software events generation + - Cluster cores clock gate control + - Wait for event functionality + - Input event mask configuration + - Cluster cores IRQ generation + - 2 hardware mutex + - 8 hardware barriers + - 1 message dispatcher + Events managed by Cluster event unit are: + - 1 SoC peripheral event: when this event occurs, the SoC peripheral events fifo must be read to get the SoC event ID. + - 1 message dispatcher event + - 1 barrier event + - up to 4 hardware accelerator events + - 2 Cluster timer events + - 2 DMA events + - 8 software events that can come from cluster cores directly or external triggering. + ''' + cip_id: "36", + version: "0.0.0" // null, commit c015839 + clocking: [ + {clock: "clk_i", reset: "rst_ni", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device" } + ], + regwidth: "32" + registers: [ + { name: "EVT_MASK" // periph base address core id offset : 0x40, periph base address offset : 0x0, demux base address offset : 0x0, Address : 0x0 + desc: "Input event mask configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "29:0" + name: "EMCL" + resval: 0x0 + desc: '''Cluster internal input event mask configuration bitfield: + - EMCL[i]=1'b0: Input event request i is masked + - EMCL[i]=1'b1: Input event request i is not masked + ''' + } + { bits: "30:30" + name: "EMINTCL" + resval: 0x0 + desc: '''Inter-cluster input event mask configuration bitfield: + - EMINTCL[i]=1'b0: Input event request i is masked + - EMINTCL[i]=1'b1: Input event request i is not masked + ''' + } + { bits: "31:31" + name: "EMSOC" + resval: 0x0 + desc: '''Soc peripheral input event mask configuration bitfield: + - EMSOC[i]=1'b0: Input event request i is masked + - EMSOC[i]=1'b1: Input event request i is not masked + ''' + } + ] + } + { name: "EVT_MASK_AND" // periph base address core id offset : 0x40, periph base address offset : 0x0, demux base address offset : 0x0, Address : 0x4 + desc: "Input event mask update command register with bitwise AND operation." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "EMA" + resval: 0x0 + desc: '''Input event mask configuration bitfield update with bitwise AND operation. + It allows clearing EMCL[i], EMINTCL[i] or EMSOC[i] if EMA[i]=1'b1. + ''' + } + ] + } + { name: "EVT_MASK_OR" // periph base address core id offset : 0x40, periph base address offset : 0x0, demux base address offset : 0x0, Address : 0x8 + desc: "Input event mask update command register with bitwise OR operation." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "EMO" + resval: 0x0 + desc: '''Input event mask configuration bitfield update with bitwise OR operation. + It allows setting EMCL[i], EMINTCL[i] or EMSOC[i] if EMO[i]=1'b1. + ''' + } + ] + } + { name: "IRQ_MASK" // periph base address core id offset : 0x40, periph base address offset : 0x0, demux base address offset : 0x0, Address : 0xC + desc: "Interrupt request mask configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "29:0" + name: "IMCL" + resval: 0x0 + desc: '''Cluster internal interrupt request mask configuration bitfield: + - bit[i]=1'b0: Interrupt request i is masked + - bit[i]=1'b1: Interrupt request i is not masked + ''' + } + { bits: "30:30" + name: "IMINTCL" + resval: 0x0 + desc: '''Inter-cluster interrupt request mask configuration bitfield: + - bit[i]=1'b0: Interrupt request i is masked + - bit[i]=1'b1: Interrupt request i is not masked + ''' + } + { bits: "31:31" + name: "IMSOC" + resval: 0x0 + desc: '''Soc peripheral interrupt request mask configuration bitfield: + - bit[i]=1'b0: Interrupt request i is masked + - bit[i]=1'b1: Interrupt request i is not masked + ''' + } + ] + } + { name: "IRQ_MASK_AND" // periph base address core id offset : 0x40, periph base address offset : 0x0, demux base address offset : 0x0, Address : 0x10 + desc: "Interrupt request mask update command register with bitwise AND operation." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "IMA" + resval: 0x0 + desc: '''Interrupt request mask configuration bitfield update with bitwise AND operation. + It allows clearing IMCL[i], IMINTCL[i] or IMSOC[i] if IMA[i]=1'b1. + ''' + } + ] + } + { name: "IRQ_MASK_OR" // periph base address core id offset : 0x40, periph base address offset : 0x0, demux base address offset : 0x0, Address : 0x14 + desc: "Interrupt request mask update command register with bitwise OR operation." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "IMO" + resval: 0x0 + desc: '''Interrupt request mask configuration bitfield update with bitwise OR operation. + It allows setting IMCL[i], IMINTCL[i] or IMSOC[i] if IMO[i]=1'b1. + ''' + } + ] + } + { name: "CLOCK_STATUS" // periph base address core id offset : 0x40, periph base address offset : 0x0, demux base address offset : 0x0, Address : 0x18 + desc: "Cluster cores clock status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "0:0" + name: "CS" + resval: 0x0 + desc: '''Cluster core clock status bitfield: + - 1'b0: Cluster core clocked is gated + - 1'b1: Cluster core clocked is running + ''' + } + ] + } + { name: "EVENT_BUFFER" // periph base address core id offset : 0x40, periph base address offset : 0x0, demux base address offset : 0x0, Address : 0x1C + desc: "Pending input events status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EB" + resval: 0x0 + desc: '''Pending input events status bitfield. + EB[i]=1'b1: one or more input event i request are pending. + ''' + } + ] + } + { name: "EVENT_BUFFER_MASKED" // periph base address core id offset : 0x40, periph base address offset : 0x0, demux base address offset : 0x0, Address : 0x20 + desc: "Pending input events status register with EVT_MASK applied." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Pending input events status bitfield with EVT_MASK applied. + EBM[i]=1'b1: one or more input event i request are pending. + ''' + } + ] + } + { name: "EVENT_BUFFER_IRQ_MASKED" // periph base address core id offset : 0x40, periph base address offset : 0x0, demux base address offset : 0x0, Address : 0x24 + desc: "Pending input events status register with IRQ_MASK applied." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "IBM" + resval: 0x0 + desc: '''Pending input events status bitfield with IRQ_MASK applied. + IBM[i]=1'b1: one or more input events i are pending. + ''' + } + ] + } + { name: "EVENT_BUFFER_CLEAR" // periph base address core id offset : 0x40, periph base address offset : 0x0, demux base address offset : 0x0, Address : 0x28 + desc: "Pending input events status clear command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "EBC" + resval: 0x0 + desc: '''Pending input events status clear command bitfield. + It allows clearing EB[i] if EBC[i]=1'b1. + ''' + } + ] + } + { name: "SW_EVENT_MASK" // periph base address core id offset : 0x40, periph base address offset : 0x0, demux base address offset : 0x0, Address : 0x2C + desc: "Software events cluster cores destination mask configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "SWEM" + resval: 0x0 + desc: '''Software events mask configuration bitfield: + - bit[i]=1'b0: software events are masked for CL_CORE[i] + - bit[i]=1'b1: software events are not masked for CL_CORE[i] + ''' + } + ] + } + { name: "SW_EVENT_MASK_AND" // periph base address core id offset : 0x40, periph base address offset : 0x0, demux base address offset : 0x0, Address : 0x30 + desc: "Software events cluster cores destination mask update command register with bitwise AND operation." + swaccess: "wo" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "SWEMA" + resval: 0x0 + desc: '''Software event mask configuration bitfield update with bitwise AND operation. + It allows clearing SWEM[i] if SWEMA[i]=1'b1. + ''' + } + ] + } + { name: "SW_EVENT_MASK_OR" // periph base address core id offset : 0x40, periph base address offset : 0x0, demux base address offset : 0x0, Address : 0x34 + desc: "Software events cluster cores destination mask update command register with bitwise OR operation." + swaccess: "wo" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "SWEMO" + resval: 0x0 + desc: '''Software event mask configuration bitfield update with bitwise OR operation. + It allows setting SWEM[i] if SWEMO[i]=1'b1. + ''' + } + ] + } + { name: "EVENT_WAIT" // demux base address offset : 0x0, Address : 0x38 + desc: "Input event wait command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Reading this register will gate the Cluster core clock until at least one unmasked event occurs. + The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "EVENT_WAIT_CLEAR" // demux base address offset : 0x0, Address : 0x3C + desc: "Input event wait and clear command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Reading this register has the same effect as reading EVENT_WAIT.EBM. + In addition, EVENT_BUFFER.EB[i] bits are cleared if EVT_MASK[i]=1'b1. + The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "HW_DISPATCH_PUSH_TASK" // demux base address offset : 0x80, Address : 0x0 + desc: "Hardware task dispatcher push command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "MSG" + resval: 0x0 + desc: "Message to dispatch to all cluster cores selected in HW_DISPATCH_PUSH_TEAM_CONFIG.CT configuration bitfield." + } + ] + } + { name: "HW_DISPATCH_POP_TASK" // demux base address offset : 0x80, Address : 0x0 + desc: "Hardware task dispatcher pop command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "MSG" + resval: 0x0 + desc: "Message dispatched using HW_DISPATCH_PUSH_TASK command and popped by cluster core who issued HW_DISPATCH_POP_TASK command." + } + ] + } + { name: "HW_DISPATCH_PUSH_TEAM_CONFIG" // demux base address offset : 0x80, Address : 0x4 + desc: "Hardware task dispatcher cluster core team configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "CT" + resval: 0x0 + desc: '''Cluster cores team selection configuration bitfield. + It allows to transmit HW_DISPATCH_PUSH_TASK.MSG to cluster core i if CT[i]=1'b1. + ''' + } + ] + } + { name: "HW_MUTEX_0_MSG_PUT" // demux base address offset : 0xC0, Address : 0x0 + desc: "Hardware mutex 0 non-blocking put command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "MSG" + resval: 0x0 + desc: "Message pushed when releasing hardware mutex 0 configuration bitfiled. It is a non-blocking access." + } + ] + } + { name: "HW_MUTEX_0_MSG_GET" // demux base address offset : 0xC0, Address : 0x0 + desc: "Hardware mutex 0 blocking get command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "MSG" + resval: 0x0 + desc: "Message popped when taking hardware mutex 0 data bitfiled. It is a blocking access." + } + ] + } + { name: "HW_MUTEX_1_MSG_PUT" // demux base address offset : 0xC0, Address : 0x4 + desc: "Hardware mutex 1 non-blocking put command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "MSG" + resval: 0x0 + desc: "Message pushed when releasing hardware mutex 1 configuration bitfiled. It is a non-blocking access." + } + ] + } + { name: "HW_MUTEX_1_MSG_GET" // demux base address offset : 0xC0, Address : 0x4 + desc: "Hardware mutex 1 blocking get command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "MSG" + resval: 0x0 + desc: "Message popped when taking hardware mutex 1 data bitfiled. It is a blocking access." + } + ] + } + { name: "SW_EVENT_0_TRIG" // periph base address offset : 0x600, demux base address offset : 0x100, Address : 0x0 + desc: "Cluster Software event 0 trigger command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "SW0T" + resval: 0x0 + desc: "Triggers software event 0 for cluster core i if SW0T[i]=1'b1." + } + ] + } + { name: "SW_EVENT_1_TRIG" // periph base address offset : 0x600, demux base address offset : 0x100, Address : 0x4 + desc: "Cluster Software event 1 trigger command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "SW1T" + resval: 0x0 + desc: "Triggers software event 1 for cluster core i if SW1T[i]=1'b1." + } + ] + } + { name: "SW_EVENT_2_TRIG" // periph base address offset : 0x600, demux base address offset : 0x100, Address : 0x8 + desc: "Cluster Software event 2 trigger command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "SW2T" + resval: 0x0 + desc: "Triggers software event 2 for cluster core i if SW2T[i]=1'b1." + } + ] + } + { name: "SW_EVENT_3_TRIG" // periph base address offset : 0x600, demux base address offset : 0x100, Address : 0xC + desc: "Cluster Software event 3 trigger command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "SW3T" + resval: 0x0 + desc: "Triggers software event 3 for cluster core i if SW3T[i]=1'b1." + } + ] + } + { name: "SW_EVENT_4_TRIG" // periph base address offset : 0x600, demux base address offset : 0x100, Address : 0x10 + desc: "Cluster Software event 4 trigger command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "SW4T" + resval: 0x0 + desc: "Triggers software event 4 for cluster core i if SW4T[i]=1'b1." + } + ] + } + { name: "SW_EVENT_5_TRIG" // periph base address offset : 0x600, demux base address offset : 0x100, Address : 0x14 + desc: "Cluster Software event 5 trigger command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "SW5T" + resval: 0x0 + desc: "Triggers software event 5 for cluster core i if SW5T[i]=1'b1." + } + ] + } + { name: "SW_EVENT_6_TRIG" // periph base address offset : 0x600, demux base address offset : 0x100, Address : 0x18 + desc: "Cluster Software event 6 trigger command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "SW6T" + resval: 0x0 + desc: "Triggers software event 6 for cluster core i if SW6T[i]=1'b1." + } + ] + } + { name: "SW_EVENT_7_TRIG" // periph base address offset : 0x600, demux base address offset : 0x100, Address : 0x1C + desc: "Cluster Software event 7 trigger command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "SW7T" + resval: 0x0 + desc: "Triggers software event 7 for cluster core i if SW7T[i]=1'b1." + } + ] + } + { name: "SW_EVENT_0_TRIG_WAIT" // demux base address offset : 0x140, Address : 0x0 + desc: "Cluster Software event 0 trigger and wait command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 0 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_1_TRIG_WAIT" // demux base address offset : 0x140, Address : 0x4 + desc: "Cluster Software event 1 trigger and wait command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 1 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_2_TRIG_WAIT" // demux base address offset : 0x140, Address : 0x8 + desc: "Cluster Software event 2 trigger and wait command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 2 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_3_TRIG_WAIT" // demux base address offset : 0x140, Address : 0xC + desc: "Cluster Software event 3 trigger and wait command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 3 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_4_TRIG_WAIT" // demux base address offset : 0x140, Address : 0x10 + desc: "Cluster Software event 4 trigger and wait command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 4 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_5_TRIG_WAIT" // demux base address offset : 0x140, Address : 0x14 + desc: "Cluster Software event 5 trigger and wait command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 5 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_6_TRIG_WAIT" // demux base address offset : 0x140, Address : 0x18 + desc: "Cluster Software event 6 trigger and wait command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 6 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_7_TRIG_WAIT" // demux base address offset : 0x140, Address : 0x1C + desc: "Cluster Software event 7 trigger and wait command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 7 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_0_TRIG_WAIT_CLEAR" // demux base address offset : 0x180, Address : 0x0 + desc: "Cluster Software event 0 trigger, wait and clear command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 0 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_1_TRIG_WAIT_CLEAR" // demux base address offset : 0x180, Address : 0x4 + desc: "Cluster Software event 1 trigger, wait and clear command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 1 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_2_TRIG_WAIT_CLEAR" // demux base address offset : 0x180, Address : 0x8 + desc: "Cluster Software event 2 trigger, wait and clear command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 2 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_3_TRIG_WAIT_CLEAR" // demux base address offset : 0x180, Address : 0xC + desc: "Cluster Software event 3 trigger, wait and clear command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 3 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_4_TRIG_WAIT_CLEAR" // demux base address offset : 0x180, Address : 0x10 + desc: "Cluster Software event 4 trigger, wait and clear command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 4 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_5_TRIG_WAIT_CLEAR" // demux base address offset : 0x180, Address : 0x14 + desc: "Cluster Software event 5 trigger, wait and clear command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 5 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_6_TRIG_WAIT_CLEAR" // demux base address offset : 0x180, Address : 0x18 + desc: "Cluster Software event 6 trigger, wait and clear command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 6 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_7_TRIG_WAIT_CLEAR" // demux base address offset : 0x180, Address : 0x1C + desc: "Cluster Software event 7 trigger, wait and clear command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 7 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SOC_PERIPH_EVENT_ID" // periph base address offset: 0x700, Address : 0x0 + desc: "Cluster SoC peripheral event ID status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "ID" + resval: 0x0 + desc: "Oldest SoC peripheral event ID status bitfield." + } + { bits: "31:31" + name: "VALID" + resval: 0x0 + desc: "Validity bit of SOC_PERIPH_EVENT_ID.ID bitfield." + } + ] + } + { name: "HW_BARRIER_0_TRIG_MASK" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x0 + desc: "Cluster hardware barrier 0 trigger mask configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "HB0TM" + resval: 0x0 + desc: '''Trigger mask for hardware barrier 0 bitfield. + Hardware barrier 0 will be triggered only if for all HB0TM[i] = 1'b1, HW_BARRIER_0_STATUS.HB0S[i]=1'b1. + HB0TM=0 means that hardware barrier 0 is disabled. + ''' + } + ] + } + { name: "HW_BARRIER_1_TRIG_MASK" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x20 + desc: "Cluster hardware barrier 1 trigger mask configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "HB1TM" + resval: 0x0 + desc: '''Trigger mask for hardware barrier 1 bitfield. + Hardware barrier 1 will be triggered only if for all HB1TM[i] = 1'b1, HW_BARRIER_1_STATUS.HB1S[i]=1'b1. + HB1TM=0 means that hardware barrier 1 is disabled. + ''' + } + ] + } + { name: "HW_BARRIER_2_TRIG_MASK" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x40 + desc: "Cluster hardware barrier 2 trigger mask configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "HB2TM" + resval: 0x0 + desc: '''Trigger mask for hardware barrier 2 bitfield. + Hardware barrier 2 will be triggered only if for all HB2TM[i] = 1'b1, HW_BARRIER_2_STATUS.HB2S[i]=1'b1. + HB2TM=0 means that hardware barrier 2 is disabled. + ''' + } + ] + } + { name: "HW_BARRIER_3_TRIG_MASK" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x60 + desc: "Cluster hardware barrier 3 trigger mask configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "HB3TM" + resval: 0x0 + desc: '''Trigger mask for hardware barrier 3 bitfield. + Hardware barrier 3 will be triggered only if for all HB3TM[i] = 1'b1, HW_BARRIER_3_STATUS.HB3S[i]=1'b1. + HB3TM=0 means that hardware barrier 3 is disabled. + ''' + } + ] + } + { name: "HW_BARRIER_4_TRIG_MASK" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x80 + desc: "Cluster hardware barrier 4 trigger mask configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "HB4TM" + resval: 0x0 + desc: '''Trigger mask for hardware barrier 4 bitfield. + Hardware barrier 4 will be triggered only if for all HB4TM[i] = 1'b1, HW_BARRIER_4_STATUS.HB4S[i]=1'b1. + HB4TM=0 means that hardware barrier 4 is disabled. + ''' + } + ] + } + { name: "HW_BARRIER_5_TRIG_MASK" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0xA0 + desc: "Cluster hardware barrier 5 trigger mask configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "HB5TM" + resval: 0x0 + desc: '''Trigger mask for hardware barrier 5 bitfield. + Hardware barrier 5 will be triggered only if for all HB5TM[i] = 1'b1, HW_BARRIER_5_STATUS.HB5S[i]=1'b1. + HB5TM=0 means that hardware barrier 5 is disabled. + ''' + } + ] + } + { name: "HW_BARRIER_6_TRIG_MASK" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0xC0 + desc: "Cluster hardware barrier 6 trigger mask configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "HB6TM" + resval: 0x0 + desc: '''Trigger mask for hardware barrier 6 bitfield. + Hardware barrier 6 will be triggered only if for all HB6TM[i] = 1'b1, HW_BARRIER_6_STATUS.HB6S[i]=1'b1. + HB6TM=0 means that hardware barrier 6 is disabled. + ''' + } + ] + } + { name: "HW_BARRIER_7_TRIG_MASK" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0xE0 + desc: "Cluster hardware barrier 7 trigger mask configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "HB7TM" + resval: 0x0 + desc: '''Trigger mask for hardware barrier 7 bitfield. + Hardware barrier 7 will be triggered only if for all HB7TM[i] = 1'b1, HW_BARRIER_7_STATUS.HB7S[i]=1'b1. + HB7TM=0 means that hardware barrier 7 is disabled. + ''' + } + ] + } + { name: "HW_BARRIER_0_STATUS" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x4 + desc: "Cluster hardware barrier 0 status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBS" + resval: 0x0 + desc: '''Current status of hardware barrier 0 bitfield. + HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 0. + It is cleared when HBS matches HW_BARRIER_0_TRIG_MASK.HB0TM. + ''' + } + ] + } + { name: "HW_BARRIER_1_STATUS" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x24 + desc: "Cluster hardware barrier 1 status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBS" + resval: 0x0 + desc: '''Current status of hardware barrier 1 bitfield. + HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 1. + It is cleared when HBS matches HW_BARRIER_1_TRIG_MASK.HB1TM. + ''' + } + ] + } + { name: "HW_BARRIER_2_STATUS" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x44 + desc: "Cluster hardware barrier 2 status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBS" + resval: 0x0 + desc: '''Current status of hardware barrier 2 bitfield. + HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 2. + It is cleared when HBS matches HW_BARRIER_2_TRIG_MASK.HB2TM. + ''' + } + ] + } + { name: "HW_BARRIER_3_STATUS" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x64 + desc: "Cluster hardware barrier 3 status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBS" + resval: 0x0 + desc: '''Current status of hardware barrier 3 bitfield. + HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 3. + It is cleared when HBS matches HW_BARRIER_3_TRIG_MASK.HB3TM. + ''' + } + ] + } + { name: "HW_BARRIER_4_STATUS" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x84 + desc: "Cluster hardware barrier 4 status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBS" + resval: 0x0 + desc: '''Current status of hardware barrier 4 bitfield. + HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 4. + It is cleared when HBS matches HW_BARRIER_4_TRIG_MASK.HB4TM. + ''' + } + ] + } + { name: "HW_BARRIER_5_STATUS" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0xA4 + desc: "Cluster hardware barrier 5 status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBS" + resval: 0x0 + desc: '''Current status of hardware barrier 5 bitfield. + HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 5. + It is cleared when HBS matches HW_BARRIER_5_TRIG_MASK.HB5TM. + ''' + } + ] + } + { name: "HW_BARRIER_6_STATUS" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0xC4 + desc: "Cluster hardware barrier 6 status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBS" + resval: 0x0 + desc: '''Current status of hardware barrier 6 bitfield. + HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 6. + It is cleared when HBS matches HW_BARRIER_6_TRIG_MASK.HB6TM. + ''' + } + ] + } + { name: "HW_BARRIER_7_STATUS" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0xE4 + desc: "Cluster hardware barrier 7 status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBS" + resval: 0x0 + desc: '''Current status of hardware barrier 7 bitfield. + HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 7. + It is cleared when HBS matches HW_BARRIER_7_TRIG_MASK.HB7TM. + ''' + } + ] + } + { name: "HW_BARRIER_0_STATUS_SUM" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x8 + desc: "Cluster hardware barrier summary status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBSS" + resval: 0x0 + desc: "Current status of hardware barrier 0. HBSS[i] represents a summary of the barrier status for core i." + } + ] + } + { name: "HW_BARRIER_1_STATUS_SUM" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x28 + desc: "Cluster hardware barrier summary status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBSS" + resval: 0x0 + desc: "Current status of hardware barrier 1. HBSS[i] represents a summary of the barrier status for core i." + } + ] + } + { name: "HW_BARRIER_2_STATUS_SUM" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x48 + desc: "Cluster hardware barrier summary status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBSS" + resval: 0x0 + desc: "Current status of hardware barrier 2. HBSS[i] represents a summary of the barrier status for core i." + } + ] + } + { name: "HW_BARRIER_3_STATUS_SUM" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x68 + desc: "Cluster hardware barrier summary status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBSS" + resval: 0x0 + desc: "Current status of hardware barrier 3. HBSS[i] represents a summary of the barrier status for core i." + } + ] + } + { name: "HW_BARRIER_4_STATUS_SUM" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x88 + desc: "Cluster hardware barrier summary status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBSS" + resval: 0x0 + desc: "Current status of hardware barrier 4. HBSS[i] represents a summary of the barrier status for core i." + } + ] + } + { name: "HW_BARRIER_5_STATUS_SUM" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0xA8 + desc: "Cluster hardware barrier summary status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBSS" + resval: 0x0 + desc: "Current status of hardware barrier 5. HBSS[i] represents a summary of the barrier status for core i." + } + ] + } + { name: "HW_BARRIER_6_STATUS_SUM" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0xC8 + desc: "Cluster hardware barrier summary status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBSS" + resval: 0x0 + desc: "Current status of hardware barrier 6. HBSS[i] represents a summary of the barrier status for core i." + } + ] + } + { name: "HW_BARRIER_7_STATUS_SUM" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0xE8 + desc: "Cluster hardware barrier summary status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBSS" + resval: 0x0 + desc: "Current status of hardware barrier 7. HBSS[i] represents a summary of the barrier status for core i." + } + ] + } + { name: "HW_BARRIER_0_TARGET_MASK" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0xC + desc: "Cluster hardware barrier 0 target mask configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "HBTAM" + resval: 0x0 + desc: '''Cluster hardware barrier 0 target mask configuration bitfield. + HBATM[i]=1'b1 means that cluster core i will receive hardware barrier 0 event when HW_BARRIER_0_STATUS will match HW_BARRIER_0_TRIG_MASK. + ''' + } + ] + } + { name: "HW_BARRIER_1_TARGET_MASK" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x2C + desc: "Cluster hardware barrier 1 target mask configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "HBTAM" + resval: 0x0 + desc: '''Cluster hardware barrier 1 target mask configuration bitfield. + HBATM[i]=1'b1 means that cluster core i will receive hardware barrier 1 event when HW_BARRIER_1_STATUS will match HW_BARRIER_1_TRIG_MASK. + ''' + } + ] + } + { name: "HW_BARRIER_2_TARGET_MASK" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x4C + desc: "Cluster hardware barrier 2 target mask configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "HBTAM" + resval: 0x0 + desc: '''Cluster hardware barrier 2 target mask configuration bitfield. + HBATM[i]=1'b1 means that cluster core i will receive hardware barrier 2 event when HW_BARRIER_2_STATUS will match HW_BARRIER_2_TRIG_MASK. + ''' + } + ] + } + { name: "HW_BARRIER_3_TARGET_MASK" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x6C + desc: "Cluster hardware barrier 3 target mask configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "HBTAM" + resval: 0x0 + desc: '''Cluster hardware barrier 3 target mask configuration bitfield. + HBATM[i]=1'b1 means that cluster core i will receive hardware barrier 3 event when HW_BARRIER_3_STATUS will match HW_BARRIER_3_TRIG_MASK. + ''' + } + ] + } + { name: "HW_BARRIER_4_TARGET_MASK" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x8C + desc: "Cluster hardware barrier 4 target mask configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "HBTAM" + resval: 0x0 + desc: '''Cluster hardware barrier 4 target mask configuration bitfield. + HBATM[i]=1'b1 means that cluster core i will receive hardware barrier 4 event when HW_BARRIER_4_STATUS will match HW_BARRIER_4_TRIG_MASK. + ''' + } + ] + } + { name: "HW_BARRIER_5_TARGET_MASK" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0xAC + desc: "Cluster hardware barrier 5 target mask configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "HBTAM" + resval: 0x0 + desc: '''Cluster hardware barrier 5 target mask configuration bitfield. + HBATM[i]=1'b1 means that cluster core i will receive hardware barrier 5 event when HW_BARRIER_5_STATUS will match HW_BARRIER_5_TRIG_MASK. + ''' + } + ] + } + { name: "HW_BARRIER_6_TARGET_MASK" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0xCC + desc: "Cluster hardware barrier 6 target mask configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "HBTAM" + resval: 0x0 + desc: '''Cluster hardware barrier 6 target mask configuration bitfield. + HBATM[i]=1'b1 means that cluster core i will receive hardware barrier 6 event when HW_BARRIER_6_STATUS will match HW_BARRIER_6_TRIG_MASK. + ''' + } + ] + } + { name: "HW_BARRIER_7_TARGET_MASK" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0xEC + desc: "Cluster hardware barrier 7 target mask configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "HBTAM" + resval: 0x0 + desc: '''Cluster hardware barrier 7 target mask configuration bitfield. + HBATM[i]=1'b1 means that cluster core i will receive hardware barrier 7 event when HW_BARRIER_7_STATUS will match HW_BARRIER_7_TRIG_MASK. + ''' + } + ] + } + { name: "HW_BARRIER_0_TRIG" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x10 + desc: "Cluster hardware barrier 0 trigger command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "T" + resval: 0x0 + desc: "Sets HW_BARRIER_0_STATUS.HBS[i] to 1'b1 when T[i]=1'b1." + } + ] + } + { name: "HW_BARRIER_1_TRIG" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x30 + desc: "Cluster hardware barrier 1 trigger command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "T" + resval: 0x0 + desc: "Sets HW_BARRIER_1_STATUS.HBS[i] to 1'b1 when T[i]=1'b1." + } + ] + } + { name: "HW_BARRIER_2_TRIG" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x50 + desc: "Cluster hardware barrier 2 trigger command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "T" + resval: 0x0 + desc: "Sets HW_BARRIER_2_STATUS.HBS[i] to 1'b1 when T[i]=1'b1." + } + ] + } + { name: "HW_BARRIER_3_TRIG" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x70 + desc: "Cluster hardware barrier 3 trigger command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "T" + resval: 0x0 + desc: "Sets HW_BARRIER_3_STATUS.HBS[i] to 1'b1 when T[i]=1'b1." + } + ] + } + { name: "HW_BARRIER_4_TRIG" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x90 + desc: "Cluster hardware barrier 4 trigger command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "T" + resval: 0x0 + desc: "Sets HW_BARRIER_4_STATUS.HBS[i] to 1'b1 when T[i]=1'b1." + } + ] + } + { name: "HW_BARRIER_5_TRIG" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0xB0 + desc: "Cluster hardware barrier 5 trigger command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "T" + resval: 0x0 + desc: "Sets HW_BARRIER_5_STATUS.HBS[i] to 1'b1 when T[i]=1'b1." + } + ] + } + { name: "HW_BARRIER_6_TRIG" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0xD0 + desc: "Cluster hardware barrier 6 trigger command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "T" + resval: 0x0 + desc: "Sets HW_BARRIER_6_STATUS.HBS[i] to 1'b1 when T[i]=1'b1." + } + ] + } + { name: "HW_BARRIER_7_TRIG" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0xF0 + desc: "Cluster hardware barrier 7 trigger command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "T" + resval: 0x0 + desc: "Sets HW_BARRIER_7_STATUS.HBS[i] to 1'b1 when T[i]=1'b1." + } + ] + } + { name: "HW_BARRIER_0_SELF_TRIG" // demux base address offset : 0x200, Address : 0x14 + desc: "Cluster hardware barrier 0 self trigger command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "T" + resval: 0x0 + desc: "Sets HW_BARRIER_0_STATUS.HBS[i] to 1'b1 when issued by cluster core i." + } + ] + } + { name: "HW_BARRIER_1_SELF_TRIG" // demux base address offset : 0x200, Address : 0x34 + desc: "Cluster hardware barrier 1 self trigger command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "T" + resval: 0x0 + desc: "Sets HW_BARRIER_1_STATUS.HBS[i] to 1'b1 when issued by cluster core i." + } + ] + } + { name: "HW_BARRIER_2_SELF_TRIG" // demux base address offset : 0x200, Address : 0x54 + desc: "Cluster hardware barrier 2 self trigger command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "T" + resval: 0x0 + desc: "Sets HW_BARRIER_2_STATUS.HBS[i] to 1'b1 when issued by cluster core i." + } + ] + } + { name: "HW_BARRIER_3_SELF_TRIG" // demux base address offset : 0x200, Address : 0x74 + desc: "Cluster hardware barrier 3 self trigger command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "T" + resval: 0x0 + desc: "Sets HW_BARRIER_3_STATUS.HBS[i] to 1'b1 when issued by cluster core i." + } + ] + } + { name: "HW_BARRIER_4_SELF_TRIG" // demux base address offset : 0x200, Address : 0x94 + desc: "Cluster hardware barrier 4 self trigger command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "T" + resval: 0x0 + desc: "Sets HW_BARRIER_4_STATUS.HBS[i] to 1'b1 when issued by cluster core i." + } + ] + } + { name: "HW_BARRIER_5_SELF_TRIG" // demux base address offset : 0x200, Address : 0xB4 + desc: "Cluster hardware barrier 5 self trigger command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "T" + resval: 0x0 + desc: "Sets HW_BARRIER_5_STATUS.HBS[i] to 1'b1 when issued by cluster core i." + } + ] + } + { name: "HW_BARRIER_6_SELF_TRIG" // demux base address offset : 0x200, Address : 0xD4 + desc: "Cluster hardware barrier 6 self trigger command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "T" + resval: 0x0 + desc: "Sets HW_BARRIER_6_STATUS.HBS[i] to 1'b1 when issued by cluster core i." + } + ] + } + { name: "HW_BARRIER_7_SELF_TRIG" // demux base address offset : 0x200, Address : 0xF4 + desc: "Cluster hardware barrier 7 self trigger command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "T" + resval: 0x0 + desc: "Sets HW_BARRIER_7_STATUS.HBS[i] to 1'b1 when issued by cluster core i." + } + ] + } + { name: "HW_BARRIER_0_TRIG_WAIT" // demux base address offset : 0x200, Address : 0x18 + desc: "Cluster hardware barrier 0 trigger and wait command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Set HW_BARRIER_0[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_0 is released. + The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "HW_BARRIER_1_TRIG_WAIT" // demux base address offset : 0x200, Address : 0x38 + desc: "Cluster hardware barrier 1 trigger and wait command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Set HW_BARRIER_1[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_1 is released. + The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "HW_BARRIER_2_TRIG_WAIT" // demux base address offset : 0x200, Address : 0x58 + desc: "Cluster hardware barrier 2 trigger and wait command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Set HW_BARRIER_2[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_2 is released. + The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "HW_BARRIER_3_TRIG_WAIT" // demux base address offset : 0x200, Address : 0x78 + desc: "Cluster hardware barrier 3 trigger and wait command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Set HW_BARRIER_3[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_3 is released. + The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "HW_BARRIER_4_TRIG_WAIT" // demux base address offset : 0x200, Address : 0x98 + desc: "Cluster hardware barrier 4 trigger and wait command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Set HW_BARRIER_4[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_4 is released. + The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "HW_BARRIER_5_TRIG_WAIT" // demux base address offset : 0x200, Address : 0xB8 + desc: "Cluster hardware barrier 5 trigger and wait command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Set HW_BARRIER_5[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_5 is released. + The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "HW_BARRIER_6_TRIG_WAIT" // demux base address offset : 0x200, Address : 0xD8 + desc: "Cluster hardware barrier 6 trigger and wait command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Set HW_BARRIER_6[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_6 is released. + The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "HW_BARRIER_7_TRIG_WAIT" // demux base address offset : 0x200, Address : 0xF8 + desc: "Cluster hardware barrier 7 trigger and wait command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Set HW_BARRIER_7[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_7 is released. + The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "HW_BARRIER_0_TRIG_WAIT_CLEAR" // demux base address offset : 0x200, Address : 0x1C + desc: "Cluster hardware barrier 0 trigger, wait and clear command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Set HW_BARRIER_0[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_0 is released. + In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "HW_BARRIER_1_TRIG_WAIT_CLEAR" // demux base address offset : 0x200, Address : 0x3C + desc: "Cluster hardware barrier 1 trigger, wait and clear command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Set HW_BARRIER_1[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_1 is released. + In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "HW_BARRIER_2_TRIG_WAIT_CLEAR" // demux base address offset : 0x200, Address : 0x5C + desc: "Cluster hardware barrier 2 trigger, wait and clear command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Set HW_BARRIER_2[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_2 is released. + In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "HW_BARRIER_3_TRIG_WAIT_CLEAR" // demux base address offset : 0x200, Address : 0x7C + desc: "Cluster hardware barrier 3 trigger, wait and clear command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Set HW_BARRIER_3[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_3 is released. + In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "HW_BARRIER_4_TRIG_WAIT_CLEAR" // demux base address offset : 0x200, Address : 0x9C + desc: "Cluster hardware barrier 4 trigger, wait and clear command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Set HW_BARRIER_4[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_4 is released. + In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "HW_BARRIER_5_TRIG_WAIT_CLEAR" // demux base address offset : 0x200, Address : 0xBC + desc: "Cluster hardware barrier 5 trigger, wait and clear command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Set HW_BARRIER_5[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_5 is released. + In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "HW_BARRIER_6_TRIG_WAIT_CLEAR" // demux base address offset : 0x200, Address : 0xDC + desc: "Cluster hardware barrier 6 trigger, wait and clear command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Set HW_BARRIER_6[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_6 is released. + In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "HW_BARRIER_7_TRIG_WAIT_CLEAR" // demux base address offset : 0x200, Address : 0xFC + desc: "Cluster hardware barrier 7 trigger, wait and clear command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Set HW_BARRIER_7[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_7 is released. + In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + ] +} diff --git a/docs/um/ip/cluster_peripherals/cl_event_unit/data/cl_event_unit_regs.hjson~ b/docs/um/ip/cluster_peripherals/cl_event_unit/data/cl_event_unit_regs.hjson~ new file mode 100644 index 00000000..28f5c05f --- /dev/null +++ b/docs/um/ip/cluster_peripherals/cl_event_unit/data/cl_event_unit_regs.hjson~ @@ -0,0 +1,1500 @@ +// Copyright 2014-2018 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51, see LICENSE for details. +// +// Author: Michael Gautschi + +{ + name: "cluster_event_unit" + one_paragraph_desc: ''' + Cluster event unit component manages the following features: + - Cluster software events generation + - Cluster cores clock gate control + - Wait for event functionality + - Input event mask configuration + - Cluster cores IRQ generation + - 2 hardware mutex + - 8 hardware barriers + - 1 message dispatcher + Events managed by Cluster event unit are: + - 1 SoC peripheral event: when this event occurs, the SoC peripheral events fifo must be read to get the SoC event ID. + - 1 message dispatcher event + - 1 barrier event + - up to 4 hardware accelerator events + - 2 Cluster timer events + - 2 DMA events + - 8 software events that can come from cluster cores directly or external triggering. + ''' + cip_id: "36", + version: "0.0.0" // null, commit c015839 + clocking: [ + {clock: "clk_i", reset: "rst_ni", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device" } + ], + regwidth: "32" + registers: [ + { name: "EVT_MASK" // periph base address core id offset : 0x40, periph base address offset : 0x0, demux base address offset : 0x0, Address : 0x0 + desc: "Input event mask configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "29:0" + name: "EMCL" + resval: 0x0 + desc: '''Cluster internal input event mask configuration bitfield: + - EMCL[i]=1'b0: Input event request i is masked + - EMCL[i]=1'b1: Input event request i is not masked + ''' + } + { bits: "30:30" + name: "EMINTCL" + resval: 0x0 + desc: '''Inter-cluster input event mask configuration bitfield: + - EMINTCL[i]=1'b0: Input event request i is masked + - EMINTCL[i]=1'b1: Input event request i is not masked + ''' + } + { bits: "31:31" + name: "EMSOC" + resval: 0x0 + desc: '''Soc peripheral input event mask configuration bitfield: + - EMSOC[i]=1'b0: Input event request i is masked + - EMSOC[i]=1'b1: Input event request i is not masked + ''' + } + ] + } + { name: "EVT_MASK_AND" // periph base address core id offset : 0x40, periph base address offset : 0x0, demux base address offset : 0x0, Address : 0x4 + desc: "Input event mask update command register with bitwise AND operation." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "EMA" + resval: 0x0 + desc: '''Input event mask configuration bitfield update with bitwise AND operation. + It allows clearing EMCL[i], EMINTCL[i] or EMSOC[i] if EMA[i]=1'b1. + ''' + } + ] + } + { name: "EVT_MASK_OR" // periph base address core id offset : 0x40, periph base address offset : 0x0, demux base address offset : 0x0, Address : 0x8 + desc: "Input event mask update command register with bitwise OR operation." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "EMO" + resval: 0x0 + desc: '''Input event mask configuration bitfield update with bitwise OR operation. + It allows setting EMCL[i], EMINTCL[i] or EMSOC[i] if EMO[i]=1'b1. + ''' + } + ] + } + { name: "IRQ_MASK" // periph base address core id offset : 0x40, periph base address offset : 0x0, demux base address offset : 0x0, Address : 0xC + desc: "Interrupt request mask configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "29:0" + name: "IMCL" + resval: 0x0 + desc: '''Cluster internal interrupt request mask configuration bitfield: + - bit[i]=1'b0: Interrupt request i is masked + - bit[i]=1'b1: Interrupt request i is not masked + ''' + } + { bits: "30:30" + name: "IMINTCL" + resval: 0x0 + desc: '''Inter-cluster interrupt request mask configuration bitfield: + - bit[i]=1'b0: Interrupt request i is masked + - bit[i]=1'b1: Interrupt request i is not masked + ''' + } + { bits: "31:31" + name: "IMSOC" + resval: 0x0 + desc: '''Soc peripheral interrupt request mask configuration bitfield: + - bit[i]=1'b0: Interrupt request i is masked + - bit[i]=1'b1: Interrupt request i is not masked + ''' + } + ] + } + { name: "IRQ_MASK_AND" // periph base address core id offset : 0x40, periph base address offset : 0x0, demux base address offset : 0x0, Address : 0x10 + desc: "Interrupt request mask update command register with bitwise AND operation." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "IMA" + resval: 0x0 + desc: '''Interrupt request mask configuration bitfield update with bitwise AND operation. + It allows clearing IMCL[i], IMINTCL[i] or IMSOC[i] if IMA[i]=1'b1. + ''' + } + ] + } + { name: "IRQ_MASK_OR" // periph base address core id offset : 0x40, periph base address offset : 0x0, demux base address offset : 0x0, Address : 0x14 + desc: "Interrupt request mask update command register with bitwise OR operation." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "IMO" + resval: 0x0 + desc: '''Interrupt request mask configuration bitfield update with bitwise OR operation. + It allows setting IMCL[i], IMINTCL[i] or IMSOC[i] if IMO[i]=1'b1. + ''' + } + ] + } + { name: "CLOCK_STATUS" // periph base address core id offset : 0x40, periph base address offset : 0x0, demux base address offset : 0x0, Address : 0x18 + desc: "Cluster cores clock status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "0:0" + name: "CS" + resval: 0x0 + desc: '''Cluster core clock status bitfield: + - 1'b0: Cluster core clocked is gated + - 1'b1: Cluster core clocked is running + ''' + } + ] + } + { name: "EVENT_BUFFER" // periph base address core id offset : 0x40, periph base address offset : 0x0, demux base address offset : 0x0, Address : 0x1C + desc: "Pending input events status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EB" + resval: 0x0 + desc: '''Pending input events status bitfield. + EB[i]=1'b1: one or more input event i request are pending. + ''' + } + ] + } + { name: "EVENT_BUFFER_MASKED" // periph base address core id offset : 0x40, periph base address offset : 0x0, demux base address offset : 0x0, Address : 0x20 + desc: "Pending input events status register with EVT_MASK applied." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Pending input events status bitfield with EVT_MASK applied. + EBM[i]=1'b1: one or more input event i request are pending. + ''' + } + ] + } + { name: "EVENT_BUFFER_IRQ_MASKED" // periph base address core id offset : 0x40, periph base address offset : 0x0, demux base address offset : 0x0, Address : 0x24 + desc: "Pending input events status register with IRQ_MASK applied." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "IBM" + resval: 0x0 + desc: '''Pending input events status bitfield with IRQ_MASK applied. + IBM[i]=1'b1: one or more input events i are pending. + ''' + } + ] + } + { name: "EVENT_BUFFER_CLEAR" // periph base address core id offset : 0x40, periph base address offset : 0x0, demux base address offset : 0x0, Address : 0x28 + desc: "Pending input events status clear command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "EBC" + resval: 0x0 + desc: '''Pending input events status clear command bitfield. + It allows clearing EB[i] if EBC[i]=1'b1. + ''' + } + ] + } + { name: "SW_EVENT_MASK" // periph base address core id offset : 0x40, periph base address offset : 0x0, demux base address offset : 0x0, Address : 0x2C + desc: "Software events cluster cores destination mask configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "SWEM" + resval: 0x0 + desc: '''Software events mask configuration bitfield: + - bit[i]=1'b0: software events are masked for CL_CORE[i] + - bit[i]=1'b1: software events are not masked for CL_CORE[i] + ''' + } + ] + } + { name: "SW_EVENT_MASK_AND" // periph base address core id offset : 0x40, periph base address offset : 0x0, demux base address offset : 0x0, Address : 0x30 + desc: "Software events cluster cores destination mask update command register with bitwise AND operation." + swaccess: "wo" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "SWEMA" + resval: 0x0 + desc: '''Software event mask configuration bitfield update with bitwise AND operation. + It allows clearing SWEM[i] if SWEMA[i]=1'b1. + ''' + } + ] + } + { name: "SW_EVENT_MASK_OR" // periph base address core id offset : 0x40, periph base address offset : 0x0, demux base address offset : 0x0, Address : 0x34 + desc: "Software events cluster cores destination mask update command register with bitwise OR operation." + swaccess: "wo" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "SWEMO" + resval: 0x0 + desc: '''Software event mask configuration bitfield update with bitwise OR operation. + It allows setting SWEM[i] if SWEMO[i]=1'b1. + ''' + } + ] + } + { name: "EVENT_WAIT" // demux base address offset : 0x0, Address : 0x38 + desc: "Input event wait command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Reading this register will gate the Cluster core clock until at least one unmasked event occurs. + The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "EVENT_WAIT_CLEAR" // demux base address offset : 0x0, Address : 0x3C + desc: "Input event wait and clear command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Reading this register has the same effect as reading EVENT_WAIT.EBM. + In addition, EVENT_BUFFER.EB[i] bits are cleared if EVT_MASK[i]=1'b1. + The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "HW_DISPATCH_PUSH_TASK" // demux base address offset : 0x80, Address : 0x0 + desc: "Hardware task dispatcher push command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "MSG" + resval: 0x0 + desc: "Message to dispatch to all cluster cores selected in HW_DISPATCH_PUSH_TEAM_CONFIG.CT configuration bitfield." + } + ] + } + { name: "HW_DISPATCH_POP_TASK" // demux base address offset : 0x80, Address : 0x0 + desc: "Hardware task dispatcher pop command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "MSG" + resval: 0x0 + desc: "Message dispatched using HW_DISPATCH_PUSH_TASK command and popped by cluster core who issued HW_DISPATCH_POP_TASK command." + } + ] + } + { name: "HW_DISPATCH_PUSH_TEAM_CONFIG" // demux base address offset : 0x80, Address : 0x4 + desc: "Hardware task dispatcher cluster core team configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "CT" + resval: 0x0 + desc: '''Cluster cores team selection configuration bitfield. + It allows to transmit HW_DISPATCH_PUSH_TASK.MSG to cluster core i if CT[i]=1'b1. + ''' + } + ] + } + { name: "HW_MUTEX_0_MSG_PUT" // demux base address offset : 0xC0, Address : 0x0 + desc: "Hardware mutex 0 non-blocking put command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "MSG" + resval: 0x0 + desc: "Message pushed when releasing hardware mutex 0 configuration bitfiled. It is a non-blocking access." + } + ] + } + { name: "HW_MUTEX_0_MSG_GET" // demux base address offset : 0xC0, Address : 0x0 + desc: "Hardware mutex 0 blocking get command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "MSG" + resval: 0x0 + desc: "Message popped when taking hardware mutex 0 data bitfiled. It is a blocking access." + } + ] + } + { name: "HW_MUTEX_1_MSG_PUT" // demux base address offset : 0xC0, Address : 0x4 + desc: "Hardware mutex 1 non-blocking put command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "MSG" + resval: 0x0 + desc: "Message pushed when releasing hardware mutex 1 configuration bitfiled. It is a non-blocking access." + } + ] + } + { name: "HW_MUTEX_1_MSG_GET" // demux base address offset : 0xC0, Address : 0x4 + desc: "Hardware mutex 1 blocking get command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "MSG" + resval: 0x0 + desc: "Message popped when taking hardware mutex 1 data bitfiled. It is a blocking access." + } + ] + } + { name: "SW_EVENT_0_TRIG" // periph base address offset : 0x600, demux base address offset : 0x100, Address : 0x0 + desc: "Cluster Software event 0 trigger command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "SW0T" + resval: 0x0 + desc: "Triggers software event 0 for cluster core i if SW0T[i]=1'b1." + } + ] + } + { name: "SW_EVENT_1_TRIG" // periph base address offset : 0x600, demux base address offset : 0x100, Address : 0x4 + desc: "Cluster Software event 1 trigger command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "SW1T" + resval: 0x0 + desc: "Triggers software event 1 for cluster core i if SW1T[i]=1'b1." + } + ] + } + { name: "SW_EVENT_2_TRIG" // periph base address offset : 0x600, demux base address offset : 0x100, Address : 0x8 + desc: "Cluster Software event 2 trigger command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "SW2T" + resval: 0x0 + desc: "Triggers software event 2 for cluster core i if SW2T[i]=1'b1." + } + ] + } + { name: "SW_EVENT_3_TRIG" // periph base address offset : 0x600, demux base address offset : 0x100, Address : 0xC + desc: "Cluster Software event 3 trigger command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "SW3T" + resval: 0x0 + desc: "Triggers software event 3 for cluster core i if SW3T[i]=1'b1." + } + ] + } + { name: "SW_EVENT_4_TRIG" // periph base address offset : 0x600, demux base address offset : 0x100, Address : 0x10 + desc: "Cluster Software event 4 trigger command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "SW4T" + resval: 0x0 + desc: "Triggers software event 4 for cluster core i if SW4T[i]=1'b1." + } + ] + } + { name: "SW_EVENT_5_TRIG" // periph base address offset : 0x600, demux base address offset : 0x100, Address : 0x14 + desc: "Cluster Software event 5 trigger command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "SW5T" + resval: 0x0 + desc: "Triggers software event 5 for cluster core i if SW5T[i]=1'b1." + } + ] + } + { name: "SW_EVENT_6_TRIG" // periph base address offset : 0x600, demux base address offset : 0x100, Address : 0x18 + desc: "Cluster Software event 6 trigger command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "SW6T" + resval: 0x0 + desc: "Triggers software event 6 for cluster core i if SW6T[i]=1'b1." + } + ] + } + { name: "SW_EVENT_7_TRIG" // periph base address offset : 0x600, demux base address offset : 0x100, Address : 0x1C + desc: "Cluster Software event 7 trigger command register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "SW7T" + resval: 0x0 + desc: "Triggers software event 7 for cluster core i if SW7T[i]=1'b1." + } + ] + } + { name: "SW_EVENT_0_TRIG_WAIT" // demux base address offset : 0x140, Address : 0x0 + desc: "Cluster Software event 0 trigger and wait command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 0 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_1_TRIG_WAIT" // demux base address offset : 0x140, Address : 0x4 + desc: "Cluster Software event 1 trigger and wait command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 1 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_2_TRIG_WAIT" // demux base address offset : 0x140, Address : 0x8 + desc: "Cluster Software event 2 trigger and wait command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 2 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_3_TRIG_WAIT" // demux base address offset : 0x140, Address : 0xC + desc: "Cluster Software event 3 trigger and wait command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 3 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_4_TRIG_WAIT" // demux base address offset : 0x140, Address : 0x10 + desc: "Cluster Software event 4 trigger and wait command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 4 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_5_TRIG_WAIT" // demux base address offset : 0x140, Address : 0x14 + desc: "Cluster Software event 5 trigger and wait command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 5 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_6_TRIG_WAIT" // demux base address offset : 0x140, Address : 0x18 + desc: "Cluster Software event 6 trigger and wait command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 6 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_7_TRIG_WAIT" // demux base address offset : 0x140, Address : 0x1C + desc: "Cluster Software event 7 trigger and wait command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 7 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_0_TRIG_WAIT_CLEAR" // demux base address offset : 0x180, Address : 0x0 + desc: "Cluster Software event 0 trigger, wait and clear command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 0 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_1_TRIG_WAIT_CLEAR" // demux base address offset : 0x180, Address : 0x4 + desc: "Cluster Software event 1 trigger, wait and clear command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 1 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_2_TRIG_WAIT_CLEAR" // demux base address offset : 0x180, Address : 0x8 + desc: "Cluster Software event 2 trigger, wait and clear command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 2 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_3_TRIG_WAIT_CLEAR" // demux base address offset : 0x180, Address : 0xC + desc: "Cluster Software event 3 trigger, wait and clear command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 3 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_4_TRIG_WAIT_CLEAR" // demux base address offset : 0x180, Address : 0x10 + desc: "Cluster Software event 4 trigger, wait and clear command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 4 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_5_TRIG_WAIT_CLEAR" // demux base address offset : 0x180, Address : 0x14 + desc: "Cluster Software event 5 trigger, wait and clear command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 5 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_6_TRIG_WAIT_CLEAR" // demux base address offset : 0x180, Address : 0x18 + desc: "Cluster Software event 6 trigger, wait and clear command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 6 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SW_EVENT_7_TRIG_WAIT_CLEAR" // demux base address offset : 0x180, Address : 0x1C + desc: "Cluster Software event 7 trigger, wait and clear command register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "31:0" + name: "EBM" + resval: 0x0 + desc: '''Triggers software event 7 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. + In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + ''' + } + ] + } + { name: "SOC_PERIPH_EVENT_ID" // periph base address offset: 0x700, Address : 0x0 + desc: "Cluster SoC peripheral event ID status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "ID" + resval: 0x0 + desc: "Oldest SoC peripheral event ID status bitfield." + } + { bits: "31:31" + name: "VALID" + resval: 0x0 + desc: "Validity bit of SOC_PERIPH_EVENT_ID.ID bitfield." + } + ] + } + { name: "HW_BARRIER_0_TRIG_MASK" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x0 + desc: "Cluster hardware barrier 0 trigger mask configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "HB0TM" + resval: 0x0 + desc: '''Trigger mask for hardware barrier 0 bitfield. + Hardware barrier 0 will be triggered only if for all HB0TM[i] = 1'b1, HW_BARRIER_0_STATUS.HB0S[i]=1'b1. + HB0TM=0 means that hardware barrier 0 is disabled. + ''' + } + ] + } + { name: "HW_BARRIER_1_TRIG_MASK" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x20 + desc: "Cluster hardware barrier 1 trigger mask configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "HB1TM" + resval: 0x0 + desc: '''Trigger mask for hardware barrier 1 bitfield. + Hardware barrier 1 will be triggered only if for all HB1TM[i] = 1'b1, HW_BARRIER_1_STATUS.HB1S[i]=1'b1. + HB1TM=0 means that hardware barrier 1 is disabled. + ''' + } + ] + } + { name: "HW_BARRIER_2_TRIG_MASK" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x40 + desc: "Cluster hardware barrier 2 trigger mask configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "HB2TM" + resval: 0x0 + desc: '''Trigger mask for hardware barrier 2 bitfield. + Hardware barrier 2 will be triggered only if for all HB2TM[i] = 1'b1, HW_BARRIER_2_STATUS.HB2S[i]=1'b1. + HB2TM=0 means that hardware barrier 2 is disabled. + ''' + } + ] + } + { name: "HW_BARRIER_3_TRIG_MASK" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x60 + desc: "Cluster hardware barrier 3 trigger mask configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "HB3TM" + resval: 0x0 + desc: '''Trigger mask for hardware barrier 3 bitfield. + Hardware barrier 3 will be triggered only if for all HB3TM[i] = 1'b1, HW_BARRIER_3_STATUS.HB3S[i]=1'b1. + HB3TM=0 means that hardware barrier 3 is disabled. + ''' + } + ] + } + { name: "HW_BARRIER_4_TRIG_MASK" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x80 + desc: "Cluster hardware barrier 4 trigger mask configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "HB4TM" + resval: 0x0 + desc: '''Trigger mask for hardware barrier 4 bitfield. + Hardware barrier 4 will be triggered only if for all HB4TM[i] = 1'b1, HW_BARRIER_4_STATUS.HB4S[i]=1'b1. + HB4TM=0 means that hardware barrier 4 is disabled. + ''' + } + ] + } + { name: "HW_BARRIER_5_TRIG_MASK" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0xA0 + desc: "Cluster hardware barrier 5 trigger mask configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "HB5TM" + resval: 0x0 + desc: '''Trigger mask for hardware barrier 5 bitfield. + Hardware barrier 5 will be triggered only if for all HB5TM[i] = 1'b1, HW_BARRIER_5_STATUS.HB5S[i]=1'b1. + HB5TM=0 means that hardware barrier 5 is disabled. + ''' + } + ] + } + { name: "HW_BARRIER_6_TRIG_MASK" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0xC0 + desc: "Cluster hardware barrier 6 trigger mask configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "HB6TM" + resval: 0x0 + desc: '''Trigger mask for hardware barrier 6 bitfield. + Hardware barrier 6 will be triggered only if for all HB6TM[i] = 1'b1, HW_BARRIER_6_STATUS.HB6S[i]=1'b1. + HB6TM=0 means that hardware barrier 6 is disabled. + ''' + } + ] + } + { name: "HW_BARRIER_7_TRIG_MASK" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0xE0 + desc: "Cluster hardware barrier 7 trigger mask configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "7:0" + name: "HB7TM" + resval: 0x0 + desc: '''Trigger mask for hardware barrier 7 bitfield. + Hardware barrier 7 will be triggered only if for all HB7TM[i] = 1'b1, HW_BARRIER_7_STATUS.HB7S[i]=1'b1. + HB7TM=0 means that hardware barrier 7 is disabled. + ''' + } + ] + } + { name: "HW_BARRIER_0_STATUS" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x4 + desc: "Cluster hardware barrier 0 status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBS" + resval: 0x0 + desc: '''Current status of hardware barrier 0 bitfield. + HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 0. + It is cleared when HBS matches HW_BARRIER_0_TRIG_MASK.HB0TM. + ''' + } + ] + } + { name: "HW_BARRIER_1_STATUS" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x24 + desc: "Cluster hardware barrier 1 status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBS" + resval: 0x0 + desc: '''Current status of hardware barrier 1 bitfield. + HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 1. + It is cleared when HBS matches HW_BARRIER_1_TRIG_MASK.HB1TM. + ''' + } + ] + } + { name: "HW_BARRIER_2_STATUS" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x44 + desc: "Cluster hardware barrier 2 status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBS" + resval: 0x0 + desc: '''Current status of hardware barrier 2 bitfield. + HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 2. + It is cleared when HBS matches HW_BARRIER_2_TRIG_MASK.HB2TM. + ''' + } + ] + } + { name: "HW_BARRIER_3_STATUS" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x64 + desc: "Cluster hardware barrier 3 status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBS" + resval: 0x0 + desc: '''Current status of hardware barrier 3 bitfield. + HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 3. + It is cleared when HBS matches HW_BARRIER_3_TRIG_MASK.HB3TM. + ''' + } + ] + } + { name: "HW_BARRIER_4_STATUS" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x84 + desc: "Cluster hardware barrier 4 status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBS" + resval: 0x0 + desc: '''Current status of hardware barrier 4 bitfield. + HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 4. + It is cleared when HBS matches HW_BARRIER_4_TRIG_MASK.HB4TM. + ''' + } + ] + } + { name: "HW_BARRIER_5_STATUS" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0xA4 + desc: "Cluster hardware barrier 5 status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBS" + resval: 0x0 + desc: '''Current status of hardware barrier 5 bitfield. + HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 5. + It is cleared when HBS matches HW_BARRIER_5_TRIG_MASK.HB5TM. + ''' + } + ] + } + { name: "HW_BARRIER_6_STATUS" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0xC4 + desc: "Cluster hardware barrier 6 status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBS" + resval: 0x0 + desc: '''Current status of hardware barrier 6 bitfield. + HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 6. + It is cleared when HBS matches HW_BARRIER_6_TRIG_MASK.HB6TM. + ''' + } + ] + } + { name: "HW_BARRIER_7_STATUS" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0xE4 + desc: "Cluster hardware barrier 7 status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBS" + resval: 0x0 + desc: '''Current status of hardware barrier 7 bitfield. + HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 7. + It is cleared when HBS matches HW_BARRIER_7_TRIG_MASK.HB7TM. + ''' + } + ] + } + { name: "HW_BARRIER_0_STATUS_SUM" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x8 + desc: "Cluster hardware barrier summary status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBSS" + resval: 0x0 + desc: "Current status of hardware barrier 0. HBSS[i] represents a summary of the barrier status for core i." + } + ] + } + { name: "HW_BARRIER_1_STATUS_SUM" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x28 + desc: "Cluster hardware barrier summary status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBSS" + resval: 0x0 + desc: "Current status of hardware barrier 1. HBSS[i] represents a summary of the barrier status for core i." + } + ] + } + { name: "HW_BARRIER_2_STATUS_SUM" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x48 + desc: "Cluster hardware barrier summary status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBSS" + resval: 0x0 + desc: "Current status of hardware barrier 2. HBSS[i] represents a summary of the barrier status for core i." + } + ] + } + { name: "HW_BARRIER_3_STATUS_SUM" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x68 + desc: "Cluster hardware barrier summary status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBSS" + resval: 0x0 + desc: "Current status of hardware barrier 3. HBSS[i] represents a summary of the barrier status for core i." + } + ] + } + { name: "HW_BARRIER_4_STATUS_SUM" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0x88 + desc: "Cluster hardware barrier summary status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBSS" + resval: 0x0 + desc: "Current status of hardware barrier 4. HBSS[i] represents a summary of the barrier status for core i." + } + ] + } + { name: "HW_BARRIER_5_STATUS_SUM" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0xA8 + desc: "Cluster hardware barrier summary status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBSS" + resval: 0x0 + desc: "Current status of hardware barrier 5. HBSS[i] represents a summary of the barrier status for core i." + } + ] + } + { name: "HW_BARRIER_6_STATUS_SUM" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0xC8 + desc: "Cluster hardware barrier summary status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBSS" + resval: 0x0 + desc: "Current status of hardware barrier 6. HBSS[i] represents a summary of the barrier status for core i." + } + ] + } + { name: "HW_BARRIER_7_STATUS_SUM" // periph base address offset : 0x400, demux base address offset : 0x200, Address : 0xE8 + desc: "Cluster hardware barrier summary status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "7:0" + name: "HBSS" + resval: 0x0 + desc: "Current status of hardware barrier 7. HBSS[i] represents a summary of the barrier status for core i." + } + ] + } + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + { name: "FETCH_EN" + desc: "Cluster cores fetch enable configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "0" + name: "CORE0" + resval: 0x0 + desc: '''Core 0 fetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "1" + name: "CORE1" + resval: 0x0 + desc: '''Core 1 fetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "2" + name: "CORE2" + resval: 0x0 + desc: '''Core 2 fetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "3" + name: "CORE3" + resval: 0x0 + desc: '''Core 3 fetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "4" + name: "CORE4" + resval: 0x0 + desc: '''Core 4 fetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "5" + name: "CORE5" + resval: 0x0 + desc: '''Core 5 fetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "6" + name: "CORE6" + resval: 0x0 + desc: '''Core 6 fetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "7" + name: "CORE7" + resval: 0x0 + desc: '''Core 7 fetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + ] + } + { name: "CLOCK_GATE" + desc: "Cluster clock gate configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "0:0" + name: "EN" + resval: 0x0 + desc: '''Cluster clock gate configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + ] + } + { name: "DBG_RESUME" + desc: "Cluster cores debug resume register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "0" + name: "CORE0" + resval: 0x0 + desc: '''Core 0 debug resume configuration bitfield: + - 1'b0: stay halted + - 1'b1: resume core 0 + ''' + } + { bits: "1" + name: "CORE1" + resval: 0x0 + desc: '''Core 1 debug resume configuration bitfield: + - 1'b0: stay halted + - 1'b1: resume core 1 + ''' + } + { bits: "2" + name: "CORE2" + resval: 0x0 + desc: '''Core 2 debug resume configuration bitfield: + - 1'b0: stay halted + - 1'b1: resume core 2 + ''' + } + { bits: "3" + name: "CORE3" + resval: 0x0 + desc: '''Core 3 debug resume configuration bitfield: + - 1'b0: stay halted + - 1'b1: resume core 3 + ''' + } + { bits: "4" + name: "CORE4" + resval: 0x0 + desc: '''Core 4 debug resume configuration bitfield: + - 1'b0: stay halted + - 1'b1: resume core 4 + ''' + } + { bits: "5" + name: "CORE5" + resval: 0x0 + desc: '''Core 5 debug resume configuration bitfield: + - 1'b0: stay halted + - 1'b1: resume core 5 + ''' + } + { bits: "6" + name: "CORE6" + resval: 0x0 + desc: '''Core 6 debug resume configuration bitfield: + - 1'b0: stay halted + - 1'b1: resume core 6 + ''' + } + { bits: "7" + name: "CORE7" + resval: 0x0 + desc: '''Core 7 debug resume configuration bitfield: + - 1'b0: stay halted + - 1'b1: resume core 7 + ''' + } + ] + } + { name: "DBG_HALT_STATUS" + desc: "Cluster cores debug halt status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "0" + name: "CORE0" + resval: 0x0 + desc: '''Core 0 debug halt status flag bitfield: + - 1'b0: running + - 1'b1: halted + ''' + } + { bits: "1" + name: "CORE1" + resval: 0x0 + desc: '''Core 1 debug halt status flag bitfield: + - 1'b0: running + - 1'b1: halted + ''' + } + { bits: "2" + name: "CORE2" + resval: 0x0 + desc: '''Core 2 debug halt status flag bitfield: + - 1'b0: running + - 1'b1: halted + ''' + } + { bits: "3" + name: "CORE3" + resval: 0x0 + desc: '''Core 3 debug halt status flag bitfield: + - 1'b0: running + - 1'b1: halted + ''' + } + { bits: "4" + name: "CORE4" + resval: 0x0 + desc: '''Core 4 debug halt status flag bitfield: + - 1'b0: running + - 1'b1: halted + ''' + } + { bits: "5" + name: "CORE5" + resval: 0x0 + desc: '''Core 5 debug halt status flag bitfield: + - 1'b0: running + - 1'b1: halted + ''' + } + { bits: "6" + name: "CORE6" + resval: 0x0 + desc: '''Core 6 debug halt status flag bitfield: + - 1'b0: running + - 1'b1: halted + ''' + } + { bits: "7" + name: "CORE7" + resval: 0x0 + desc: '''Core 7 debug halt status flag bitfield: + - 1'b0: running + - 1'b1: halted + ''' + } + ] + } + { name: "DBG_HALT_MASK" + desc: "Cluster cores debug halt mask configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "0" + name: "CORE0" + resval: 0x0 + desc: '''Core 0 debug halt mask bitfield. When bit is set, + core will be part of mask group and stopped when one + of the members of the group stops. + ''' + } + { bits: "1" + name: "CORE1" + resval: 0x0 + desc: '''Core 1 debug halt mask bitfield. When bit is set, + core will be part of mask group and stopped when one + of the members of the group stops. + ''' + } + { bits: "2" + name: "CORE2" + resval: 0x0 + desc: '''Core 2 debug halt mask bitfield. When bit is set, + core will be part of mask group and stopped when one + of the members of the group stops. + ''' + } + { bits: "3" + name: "CORE3" + resval: 0x0 + desc: '''Core 3 debug halt mask bitfield. When bit is set, + core will be part of mask group and stopped when one + of the members of the group stops. + ''' + } + { bits: "4" + name: "CORE4" + resval: 0x0 + desc: '''Core 4 debug halt mask bitfield. When bit is set, + core will be part of mask group and stopped when one + of the members of the group stops. + ''' + } + { bits: "5" + name: "CORE5" + resval: 0x0 + desc: '''Core 5 debug halt mask bitfield. When bit is set, + core will be part of mask group and stopped when one + of the members of the group stops. + ''' + } + { bits: "6" + name: "CORE6" + resval: 0x0 + desc: '''Core 6 debug halt mask bitfield. When bit is set, + core will be part of mask group and stopped when one + of the members of the group stops. + ''' + } + { bits: "7" + name: "CORE7" + resval: 0x0 + desc: '''Core 7 debug halt mask bitfield. When bit is set, + core will be part of mask group and stopped when one + of the members of the group stops. + ''' + } + ] + } + { name: "BOOT_ADDR0" + desc: "Cluster core 0 boot address configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "BA" + resval: 0x0 + desc: "Cluster core 0 boot address configuration bitfield." + } + ] + } + { name: "TCDM_ARB_POLICY_CH0" + desc: "TCDM arbitration policy ch0 for cluster cores configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "0:0" + name: "POL" + resval: 0x0 + desc: '''TCDM arbitration policy for cluster cores configuration bitfield: + - 1'b0: fair round robin + - 1'b1: fixed order + ''' + } + ] + } + { name: "TCDM_ARB_POLICY_CH1" + desc: "TCDM arbitration policy ch1 for DMA/HWCE configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "0:0" + name: "POL" + resval: 0x0 + desc: '''TCDM arbitration policy for DMA/HWCE configuration bitfield: + - 1'b0: fair round robin + - 1'b1: fixed order + ''' + } + ] + } + { name: "TCDM_ARB_POLICY_CH0_REP" + desc: "Read only duplicate of TCDM_ARB_POLICY_CH0 register" + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "0:0" + name: "POL" + resval: 0x0 + desc: '''TCDM arbitration policy for cluster cores configuration bitfield: + - 1'b0: fair round robin + - 1'b1: fixed order + ''' + } + ] + } + { name: "TCDM_ARB_POLICY_CH1_REP" + desc: "Read only duplicate of TCDM_ARB_POLICY_CH1 register" + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "0:0" + name: "POL" + resval: 0x0 + desc: '''TCDM arbitration policy for DMA/HWCE configuration bitfield: + - 1'b0: fair round robin + - 1'b1: fixed order + ''' + } + ] + } + ] +} diff --git a/docs/um/ip/cluster_peripherals/cl_event_unit/doc/registers.md b/docs/um/ip/cluster_peripherals/cl_event_unit/doc/registers.md new file mode 100644 index 00000000..b894546f --- /dev/null +++ b/docs/um/ip/cluster_peripherals/cl_event_unit/doc/registers.md @@ -0,0 +1,2032 @@ +## Summary + +| Name | Offset | Length | Description | +|:-----------------------------------------------------------------------------------|:---------|---------:|:---------------------------------------------------------------------------------------------------| +| cluster_event_unit.[`EVT_MASK`](#evt_mask) | 0x0 | 4 | Input event mask configuration register. | +| cluster_event_unit.[`EVT_MASK_AND`](#evt_mask_and) | 0x4 | 4 | Input event mask update command register with bitwise AND operation. | +| cluster_event_unit.[`EVT_MASK_OR`](#evt_mask_or) | 0x8 | 4 | Input event mask update command register with bitwise OR operation. | +| cluster_event_unit.[`IRQ_MASK`](#irq_mask) | 0xc | 4 | Interrupt request mask configuration register. | +| cluster_event_unit.[`IRQ_MASK_AND`](#irq_mask_and) | 0x10 | 4 | Interrupt request mask update command register with bitwise AND operation. | +| cluster_event_unit.[`IRQ_MASK_OR`](#irq_mask_or) | 0x14 | 4 | Interrupt request mask update command register with bitwise OR operation. | +| cluster_event_unit.[`CLOCK_STATUS`](#clock_status) | 0x18 | 4 | Cluster cores clock status register. | +| cluster_event_unit.[`EVENT_BUFFER`](#event_buffer) | 0x1c | 4 | Pending input events status register. | +| cluster_event_unit.[`EVENT_BUFFER_MASKED`](#event_buffer_masked) | 0x20 | 4 | Pending input events status register with EVT_MASK applied. | +| cluster_event_unit.[`EVENT_BUFFER_IRQ_MASKED`](#event_buffer_irq_masked) | 0x24 | 4 | Pending input events status register with IRQ_MASK applied. | +| cluster_event_unit.[`EVENT_BUFFER_CLEAR`](#event_buffer_clear) | 0x28 | 4 | Pending input events status clear command register. | +| cluster_event_unit.[`SW_EVENT_MASK`](#sw_event_mask) | 0x2c | 4 | Software events cluster cores destination mask configuration register. | +| cluster_event_unit.[`SW_EVENT_MASK_AND`](#sw_event_mask_and) | 0x30 | 4 | Software events cluster cores destination mask update command register with bitwise AND operation. | +| cluster_event_unit.[`SW_EVENT_MASK_OR`](#sw_event_mask_or) | 0x34 | 4 | Software events cluster cores destination mask update command register with bitwise OR operation. | +| cluster_event_unit.[`EVENT_WAIT`](#event_wait) | 0x38 | 4 | Input event wait command register. | +| cluster_event_unit.[`EVENT_WAIT_CLEAR`](#event_wait_clear) | 0x3c | 4 | Input event wait and clear command register. | +| cluster_event_unit.[`HW_DISPATCH_PUSH_TASK`](#hw_dispatch_push_task) | 0x40 | 4 | Hardware task dispatcher push command register. | +| cluster_event_unit.[`HW_DISPATCH_POP_TASK`](#hw_dispatch_pop_task) | 0x44 | 4 | Hardware task dispatcher pop command register. | +| cluster_event_unit.[`HW_DISPATCH_PUSH_TEAM_CONFIG`](#hw_dispatch_push_team_config) | 0x48 | 4 | Hardware task dispatcher cluster core team configuration register. | +| cluster_event_unit.[`HW_MUTEX_0_MSG_PUT`](#hw_mutex_0_msg_put) | 0x4c | 4 | Hardware mutex 0 non-blocking put command register. | +| cluster_event_unit.[`HW_MUTEX_0_MSG_GET`](#hw_mutex_0_msg_get) | 0x50 | 4 | Hardware mutex 0 blocking get command register. | +| cluster_event_unit.[`HW_MUTEX_1_MSG_PUT`](#hw_mutex_1_msg_put) | 0x54 | 4 | Hardware mutex 1 non-blocking put command register. | +| cluster_event_unit.[`HW_MUTEX_1_MSG_GET`](#hw_mutex_1_msg_get) | 0x58 | 4 | Hardware mutex 1 blocking get command register. | +| cluster_event_unit.[`SW_EVENT_0_TRIG`](#sw_event_0_trig) | 0x5c | 4 | Cluster Software event 0 trigger command register. | +| cluster_event_unit.[`SW_EVENT_1_TRIG`](#sw_event_1_trig) | 0x60 | 4 | Cluster Software event 1 trigger command register. | +| cluster_event_unit.[`SW_EVENT_2_TRIG`](#sw_event_2_trig) | 0x64 | 4 | Cluster Software event 2 trigger command register. | +| cluster_event_unit.[`SW_EVENT_3_TRIG`](#sw_event_3_trig) | 0x68 | 4 | Cluster Software event 3 trigger command register. | +| cluster_event_unit.[`SW_EVENT_4_TRIG`](#sw_event_4_trig) | 0x6c | 4 | Cluster Software event 4 trigger command register. | +| cluster_event_unit.[`SW_EVENT_5_TRIG`](#sw_event_5_trig) | 0x70 | 4 | Cluster Software event 5 trigger command register. | +| cluster_event_unit.[`SW_EVENT_6_TRIG`](#sw_event_6_trig) | 0x74 | 4 | Cluster Software event 6 trigger command register. | +| cluster_event_unit.[`SW_EVENT_7_TRIG`](#sw_event_7_trig) | 0x78 | 4 | Cluster Software event 7 trigger command register. | +| cluster_event_unit.[`SW_EVENT_0_TRIG_WAIT`](#sw_event_0_trig_wait) | 0x7c | 4 | Cluster Software event 0 trigger and wait command register. | +| cluster_event_unit.[`SW_EVENT_1_TRIG_WAIT`](#sw_event_1_trig_wait) | 0x80 | 4 | Cluster Software event 1 trigger and wait command register. | +| cluster_event_unit.[`SW_EVENT_2_TRIG_WAIT`](#sw_event_2_trig_wait) | 0x84 | 4 | Cluster Software event 2 trigger and wait command register. | +| cluster_event_unit.[`SW_EVENT_3_TRIG_WAIT`](#sw_event_3_trig_wait) | 0x88 | 4 | Cluster Software event 3 trigger and wait command register. | +| cluster_event_unit.[`SW_EVENT_4_TRIG_WAIT`](#sw_event_4_trig_wait) | 0x8c | 4 | Cluster Software event 4 trigger and wait command register. | +| cluster_event_unit.[`SW_EVENT_5_TRIG_WAIT`](#sw_event_5_trig_wait) | 0x90 | 4 | Cluster Software event 5 trigger and wait command register. | +| cluster_event_unit.[`SW_EVENT_6_TRIG_WAIT`](#sw_event_6_trig_wait) | 0x94 | 4 | Cluster Software event 6 trigger and wait command register. | +| cluster_event_unit.[`SW_EVENT_7_TRIG_WAIT`](#sw_event_7_trig_wait) | 0x98 | 4 | Cluster Software event 7 trigger and wait command register. | +| cluster_event_unit.[`SW_EVENT_0_TRIG_WAIT_CLEAR`](#sw_event_0_trig_wait_clear) | 0x9c | 4 | Cluster Software event 0 trigger, wait and clear command register. | +| cluster_event_unit.[`SW_EVENT_1_TRIG_WAIT_CLEAR`](#sw_event_1_trig_wait_clear) | 0xa0 | 4 | Cluster Software event 1 trigger, wait and clear command register. | +| cluster_event_unit.[`SW_EVENT_2_TRIG_WAIT_CLEAR`](#sw_event_2_trig_wait_clear) | 0xa4 | 4 | Cluster Software event 2 trigger, wait and clear command register. | +| cluster_event_unit.[`SW_EVENT_3_TRIG_WAIT_CLEAR`](#sw_event_3_trig_wait_clear) | 0xa8 | 4 | Cluster Software event 3 trigger, wait and clear command register. | +| cluster_event_unit.[`SW_EVENT_4_TRIG_WAIT_CLEAR`](#sw_event_4_trig_wait_clear) | 0xac | 4 | Cluster Software event 4 trigger, wait and clear command register. | +| cluster_event_unit.[`SW_EVENT_5_TRIG_WAIT_CLEAR`](#sw_event_5_trig_wait_clear) | 0xb0 | 4 | Cluster Software event 5 trigger, wait and clear command register. | +| cluster_event_unit.[`SW_EVENT_6_TRIG_WAIT_CLEAR`](#sw_event_6_trig_wait_clear) | 0xb4 | 4 | Cluster Software event 6 trigger, wait and clear command register. | +| cluster_event_unit.[`SW_EVENT_7_TRIG_WAIT_CLEAR`](#sw_event_7_trig_wait_clear) | 0xb8 | 4 | Cluster Software event 7 trigger, wait and clear command register. | +| cluster_event_unit.[`SOC_PERIPH_EVENT_ID`](#soc_periph_event_id) | 0xbc | 4 | Cluster SoC peripheral event ID status register. | +| cluster_event_unit.[`HW_BARRIER_0_TRIG_MASK`](#hw_barrier_0_trig_mask) | 0xc0 | 4 | Cluster hardware barrier 0 trigger mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_1_TRIG_MASK`](#hw_barrier_1_trig_mask) | 0xc4 | 4 | Cluster hardware barrier 1 trigger mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_2_TRIG_MASK`](#hw_barrier_2_trig_mask) | 0xc8 | 4 | Cluster hardware barrier 2 trigger mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_3_TRIG_MASK`](#hw_barrier_3_trig_mask) | 0xcc | 4 | Cluster hardware barrier 3 trigger mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_4_TRIG_MASK`](#hw_barrier_4_trig_mask) | 0xd0 | 4 | Cluster hardware barrier 4 trigger mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_5_TRIG_MASK`](#hw_barrier_5_trig_mask) | 0xd4 | 4 | Cluster hardware barrier 5 trigger mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_6_TRIG_MASK`](#hw_barrier_6_trig_mask) | 0xd8 | 4 | Cluster hardware barrier 6 trigger mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_7_TRIG_MASK`](#hw_barrier_7_trig_mask) | 0xdc | 4 | Cluster hardware barrier 7 trigger mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_0_STATUS`](#hw_barrier_0_status) | 0xe0 | 4 | Cluster hardware barrier 0 status register. | +| cluster_event_unit.[`HW_BARRIER_1_STATUS`](#hw_barrier_1_status) | 0xe4 | 4 | Cluster hardware barrier 1 status register. | +| cluster_event_unit.[`HW_BARRIER_2_STATUS`](#hw_barrier_2_status) | 0xe8 | 4 | Cluster hardware barrier 2 status register. | +| cluster_event_unit.[`HW_BARRIER_3_STATUS`](#hw_barrier_3_status) | 0xec | 4 | Cluster hardware barrier 3 status register. | +| cluster_event_unit.[`HW_BARRIER_4_STATUS`](#hw_barrier_4_status) | 0xf0 | 4 | Cluster hardware barrier 4 status register. | +| cluster_event_unit.[`HW_BARRIER_5_STATUS`](#hw_barrier_5_status) | 0xf4 | 4 | Cluster hardware barrier 5 status register. | +| cluster_event_unit.[`HW_BARRIER_6_STATUS`](#hw_barrier_6_status) | 0xf8 | 4 | Cluster hardware barrier 6 status register. | +| cluster_event_unit.[`HW_BARRIER_7_STATUS`](#hw_barrier_7_status) | 0xfc | 4 | Cluster hardware barrier 7 status register. | +| cluster_event_unit.[`HW_BARRIER_0_STATUS_SUM`](#hw_barrier_0_status_sum) | 0x100 | 4 | Cluster hardware barrier summary status register. | +| cluster_event_unit.[`HW_BARRIER_1_STATUS_SUM`](#hw_barrier_1_status_sum) | 0x104 | 4 | Cluster hardware barrier summary status register. | +| cluster_event_unit.[`HW_BARRIER_2_STATUS_SUM`](#hw_barrier_2_status_sum) | 0x108 | 4 | Cluster hardware barrier summary status register. | +| cluster_event_unit.[`HW_BARRIER_3_STATUS_SUM`](#hw_barrier_3_status_sum) | 0x10c | 4 | Cluster hardware barrier summary status register. | +| cluster_event_unit.[`HW_BARRIER_4_STATUS_SUM`](#hw_barrier_4_status_sum) | 0x110 | 4 | Cluster hardware barrier summary status register. | +| cluster_event_unit.[`HW_BARRIER_5_STATUS_SUM`](#hw_barrier_5_status_sum) | 0x114 | 4 | Cluster hardware barrier summary status register. | +| cluster_event_unit.[`HW_BARRIER_6_STATUS_SUM`](#hw_barrier_6_status_sum) | 0x118 | 4 | Cluster hardware barrier summary status register. | +| cluster_event_unit.[`HW_BARRIER_7_STATUS_SUM`](#hw_barrier_7_status_sum) | 0x11c | 4 | Cluster hardware barrier summary status register. | +| cluster_event_unit.[`HW_BARRIER_0_TARGET_MASK`](#hw_barrier_0_target_mask) | 0x120 | 4 | Cluster hardware barrier 0 target mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_1_TARGET_MASK`](#hw_barrier_1_target_mask) | 0x124 | 4 | Cluster hardware barrier 1 target mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_2_TARGET_MASK`](#hw_barrier_2_target_mask) | 0x128 | 4 | Cluster hardware barrier 2 target mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_3_TARGET_MASK`](#hw_barrier_3_target_mask) | 0x12c | 4 | Cluster hardware barrier 3 target mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_4_TARGET_MASK`](#hw_barrier_4_target_mask) | 0x130 | 4 | Cluster hardware barrier 4 target mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_5_TARGET_MASK`](#hw_barrier_5_target_mask) | 0x134 | 4 | Cluster hardware barrier 5 target mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_6_TARGET_MASK`](#hw_barrier_6_target_mask) | 0x138 | 4 | Cluster hardware barrier 6 target mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_7_TARGET_MASK`](#hw_barrier_7_target_mask) | 0x13c | 4 | Cluster hardware barrier 7 target mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_0_TRIG`](#hw_barrier_0_trig) | 0x140 | 4 | Cluster hardware barrier 0 trigger command register. | +| cluster_event_unit.[`HW_BARRIER_1_TRIG`](#hw_barrier_1_trig) | 0x144 | 4 | Cluster hardware barrier 1 trigger command register. | +| cluster_event_unit.[`HW_BARRIER_2_TRIG`](#hw_barrier_2_trig) | 0x148 | 4 | Cluster hardware barrier 2 trigger command register. | +| cluster_event_unit.[`HW_BARRIER_3_TRIG`](#hw_barrier_3_trig) | 0x14c | 4 | Cluster hardware barrier 3 trigger command register. | +| cluster_event_unit.[`HW_BARRIER_4_TRIG`](#hw_barrier_4_trig) | 0x150 | 4 | Cluster hardware barrier 4 trigger command register. | +| cluster_event_unit.[`HW_BARRIER_5_TRIG`](#hw_barrier_5_trig) | 0x154 | 4 | Cluster hardware barrier 5 trigger command register. | +| cluster_event_unit.[`HW_BARRIER_6_TRIG`](#hw_barrier_6_trig) | 0x158 | 4 | Cluster hardware barrier 6 trigger command register. | +| cluster_event_unit.[`HW_BARRIER_7_TRIG`](#hw_barrier_7_trig) | 0x15c | 4 | Cluster hardware barrier 7 trigger command register. | +| cluster_event_unit.[`HW_BARRIER_0_SELF_TRIG`](#hw_barrier_0_self_trig) | 0x160 | 4 | Cluster hardware barrier 0 self trigger command register. | +| cluster_event_unit.[`HW_BARRIER_1_SELF_TRIG`](#hw_barrier_1_self_trig) | 0x164 | 4 | Cluster hardware barrier 1 self trigger command register. | +| cluster_event_unit.[`HW_BARRIER_2_SELF_TRIG`](#hw_barrier_2_self_trig) | 0x168 | 4 | Cluster hardware barrier 2 self trigger command register. | +| cluster_event_unit.[`HW_BARRIER_3_SELF_TRIG`](#hw_barrier_3_self_trig) | 0x16c | 4 | Cluster hardware barrier 3 self trigger command register. | +| cluster_event_unit.[`HW_BARRIER_4_SELF_TRIG`](#hw_barrier_4_self_trig) | 0x170 | 4 | Cluster hardware barrier 4 self trigger command register. | +| cluster_event_unit.[`HW_BARRIER_5_SELF_TRIG`](#hw_barrier_5_self_trig) | 0x174 | 4 | Cluster hardware barrier 5 self trigger command register. | +| cluster_event_unit.[`HW_BARRIER_6_SELF_TRIG`](#hw_barrier_6_self_trig) | 0x178 | 4 | Cluster hardware barrier 6 self trigger command register. | +| cluster_event_unit.[`HW_BARRIER_7_SELF_TRIG`](#hw_barrier_7_self_trig) | 0x17c | 4 | Cluster hardware barrier 7 self trigger command register. | +| cluster_event_unit.[`HW_BARRIER_0_TRIG_WAIT`](#hw_barrier_0_trig_wait) | 0x180 | 4 | Cluster hardware barrier 0 trigger and wait command register. | +| cluster_event_unit.[`HW_BARRIER_1_TRIG_WAIT`](#hw_barrier_1_trig_wait) | 0x184 | 4 | Cluster hardware barrier 1 trigger and wait command register. | +| cluster_event_unit.[`HW_BARRIER_2_TRIG_WAIT`](#hw_barrier_2_trig_wait) | 0x188 | 4 | Cluster hardware barrier 2 trigger and wait command register. | +| cluster_event_unit.[`HW_BARRIER_3_TRIG_WAIT`](#hw_barrier_3_trig_wait) | 0x18c | 4 | Cluster hardware barrier 3 trigger and wait command register. | +| cluster_event_unit.[`HW_BARRIER_4_TRIG_WAIT`](#hw_barrier_4_trig_wait) | 0x190 | 4 | Cluster hardware barrier 4 trigger and wait command register. | +| cluster_event_unit.[`HW_BARRIER_5_TRIG_WAIT`](#hw_barrier_5_trig_wait) | 0x194 | 4 | Cluster hardware barrier 5 trigger and wait command register. | +| cluster_event_unit.[`HW_BARRIER_6_TRIG_WAIT`](#hw_barrier_6_trig_wait) | 0x198 | 4 | Cluster hardware barrier 6 trigger and wait command register. | +| cluster_event_unit.[`HW_BARRIER_7_TRIG_WAIT`](#hw_barrier_7_trig_wait) | 0x19c | 4 | Cluster hardware barrier 7 trigger and wait command register. | +| cluster_event_unit.[`HW_BARRIER_0_TRIG_WAIT_CLEAR`](#hw_barrier_0_trig_wait_clear) | 0x1a0 | 4 | Cluster hardware barrier 0 trigger, wait and clear command register. | +| cluster_event_unit.[`HW_BARRIER_1_TRIG_WAIT_CLEAR`](#hw_barrier_1_trig_wait_clear) | 0x1a4 | 4 | Cluster hardware barrier 1 trigger, wait and clear command register. | +| cluster_event_unit.[`HW_BARRIER_2_TRIG_WAIT_CLEAR`](#hw_barrier_2_trig_wait_clear) | 0x1a8 | 4 | Cluster hardware barrier 2 trigger, wait and clear command register. | +| cluster_event_unit.[`HW_BARRIER_3_TRIG_WAIT_CLEAR`](#hw_barrier_3_trig_wait_clear) | 0x1ac | 4 | Cluster hardware barrier 3 trigger, wait and clear command register. | +| cluster_event_unit.[`HW_BARRIER_4_TRIG_WAIT_CLEAR`](#hw_barrier_4_trig_wait_clear) | 0x1b0 | 4 | Cluster hardware barrier 4 trigger, wait and clear command register. | +| cluster_event_unit.[`HW_BARRIER_5_TRIG_WAIT_CLEAR`](#hw_barrier_5_trig_wait_clear) | 0x1b4 | 4 | Cluster hardware barrier 5 trigger, wait and clear command register. | +| cluster_event_unit.[`HW_BARRIER_6_TRIG_WAIT_CLEAR`](#hw_barrier_6_trig_wait_clear) | 0x1b8 | 4 | Cluster hardware barrier 6 trigger, wait and clear command register. | +| cluster_event_unit.[`HW_BARRIER_7_TRIG_WAIT_CLEAR`](#hw_barrier_7_trig_wait_clear) | 0x1bc | 4 | Cluster hardware barrier 7 trigger, wait and clear command register. | + +## EVT_MASK +Input event mask configuration register. +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EMCL", "bits": 30, "attr": ["rw"], "rotate": 0}, {"name": "EMINTCL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "EMSOC", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:-----------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31 | rw | 0x0 | EMSOC | Soc peripheral input event mask configuration bitfield: - EMSOC[i]=1'b0: Input event request i is masked - EMSOC[i]=1'b1: Input event request i is not masked | +| 30 | rw | 0x0 | EMINTCL | Inter-cluster input event mask configuration bitfield: - EMINTCL[i]=1'b0: Input event request i is masked - EMINTCL[i]=1'b1: Input event request i is not masked | +| 29:0 | rw | 0x0 | EMCL | Cluster internal input event mask configuration bitfield: - EMCL[i]=1'b0: Input event request i is masked - EMCL[i]=1'b1: Input event request i is not masked | + +## EVT_MASK_AND +Input event mask update command register with bitwise AND operation. +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EMA", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | wo | 0x0 | EMA | Input event mask configuration bitfield update with bitwise AND operation. It allows clearing EMCL[i], EMINTCL[i] or EMSOC[i] if EMA[i]=1'b1. | + +## EVT_MASK_OR +Input event mask update command register with bitwise OR operation. +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EMO", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | wo | 0x0 | EMO | Input event mask configuration bitfield update with bitwise OR operation. It allows setting EMCL[i], EMINTCL[i] or EMSOC[i] if EMO[i]=1'b1. | + +## IRQ_MASK +Interrupt request mask configuration register. +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "IMCL", "bits": 30, "attr": ["rw"], "rotate": 0}, {"name": "IMINTCL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "IMSOC", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31 | rw | 0x0 | IMSOC | Soc peripheral interrupt request mask configuration bitfield: - bit[i]=1'b0: Interrupt request i is masked - bit[i]=1'b1: Interrupt request i is not masked | +| 30 | rw | 0x0 | IMINTCL | Inter-cluster interrupt request mask configuration bitfield: - bit[i]=1'b0: Interrupt request i is masked - bit[i]=1'b1: Interrupt request i is not masked | +| 29:0 | rw | 0x0 | IMCL | Cluster internal interrupt request mask configuration bitfield: - bit[i]=1'b0: Interrupt request i is masked - bit[i]=1'b1: Interrupt request i is not masked | + +## IRQ_MASK_AND +Interrupt request mask update command register with bitwise AND operation. +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "IMA", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | wo | 0x0 | IMA | Interrupt request mask configuration bitfield update with bitwise AND operation. It allows clearing IMCL[i], IMINTCL[i] or IMSOC[i] if IMA[i]=1'b1. | + +## IRQ_MASK_OR +Interrupt request mask update command register with bitwise OR operation. +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "IMO", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | wo | 0x0 | IMO | Interrupt request mask configuration bitfield update with bitwise OR operation. It allows setting IMCL[i], IMINTCL[i] or IMSOC[i] if IMO[i]=1'b1. | + +## CLOCK_STATUS +Cluster cores clock status register. +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "CS", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | CS | Cluster core clock status bitfield: - 1'b0: Cluster core clocked is gated - 1'b1: Cluster core clocked is running | + +## EVENT_BUFFER +Pending input events status register. +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EB", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EB | Pending input events status bitfield. EB[i]=1'b1: one or more input event i request are pending. | + +## EVENT_BUFFER_MASKED +Pending input events status register with EVT_MASK applied. +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Pending input events status bitfield with EVT_MASK applied. EBM[i]=1'b1: one or more input event i request are pending. | + +## EVENT_BUFFER_IRQ_MASKED +Pending input events status register with IRQ_MASK applied. +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "IBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | IBM | Pending input events status bitfield with IRQ_MASK applied. IBM[i]=1'b1: one or more input events i are pending. | + +## EVENT_BUFFER_CLEAR +Pending input events status clear command register. +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBC", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------| +| 31:0 | wo | 0x0 | EBC | Pending input events status clear command bitfield. It allows clearing EB[i] if EBC[i]=1'b1. | + +## SW_EVENT_MASK +Software events cluster cores destination mask configuration register. +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "SWEM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | SWEM | Software events mask configuration bitfield: - bit[i]=1'b0: software events are masked for CL_CORE[i] - bit[i]=1'b1: software events are not masked for CL_CORE[i] | + +## SW_EVENT_MASK_AND +Software events cluster cores destination mask update command register with bitwise AND operation. +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "SWEMA", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | SWEMA | Software event mask configuration bitfield update with bitwise AND operation. It allows clearing SWEM[i] if SWEMA[i]=1'b1. | + +## SW_EVENT_MASK_OR +Software events cluster cores destination mask update command register with bitwise OR operation. +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "SWEMO", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | SWEMO | Software event mask configuration bitfield update with bitwise OR operation. It allows setting SWEM[i] if SWEMO[i]=1'b1. | + +## EVENT_WAIT +Input event wait command register. +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Reading this register will gate the Cluster core clock until at least one unmasked event occurs. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## EVENT_WAIT_CLEAR +Input event wait and clear command register. +- Offset: `0x3c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Reading this register has the same effect as reading EVENT_WAIT.EBM. In addition, EVENT_BUFFER.EB[i] bits are cleared if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## HW_DISPATCH_PUSH_TASK +Hardware task dispatcher push command register. +- Offset: `0x40` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MSG", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------------------| +| 31:0 | wo | 0x0 | MSG | Message to dispatch to all cluster cores selected in HW_DISPATCH_PUSH_TEAM_CONFIG.CT configuration bitfield. | + +## HW_DISPATCH_POP_TASK +Hardware task dispatcher pop command register. +- Offset: `0x44` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MSG", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | MSG | Message dispatched using HW_DISPATCH_PUSH_TASK command and popped by cluster core who issued HW_DISPATCH_POP_TASK command. | + +## HW_DISPATCH_PUSH_TEAM_CONFIG +Hardware task dispatcher cluster core team configuration register. +- Offset: `0x48` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "CT", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | CT | Cluster cores team selection configuration bitfield. It allows to transmit HW_DISPATCH_PUSH_TASK.MSG to cluster core i if CT[i]=1'b1. | + +## HW_MUTEX_0_MSG_PUT +Hardware mutex 0 non-blocking put command register. +- Offset: `0x4c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MSG", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------| +| 31:0 | wo | 0x0 | MSG | Message pushed when releasing hardware mutex 0 configuration bitfiled. It is a non-blocking access. | + +## HW_MUTEX_0_MSG_GET +Hardware mutex 0 blocking get command register. +- Offset: `0x50` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MSG", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | MSG | Message popped when taking hardware mutex 0 data bitfiled. It is a blocking access. | + +## HW_MUTEX_1_MSG_PUT +Hardware mutex 1 non-blocking put command register. +- Offset: `0x54` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MSG", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------| +| 31:0 | wo | 0x0 | MSG | Message pushed when releasing hardware mutex 1 configuration bitfiled. It is a non-blocking access. | + +## HW_MUTEX_1_MSG_GET +Hardware mutex 1 blocking get command register. +- Offset: `0x58` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MSG", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | MSG | Message popped when taking hardware mutex 1 data bitfiled. It is a blocking access. | + +## SW_EVENT_0_TRIG +Cluster Software event 0 trigger command register. +- Offset: `0x5c` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "SW0T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | SW0T | Triggers software event 0 for cluster core i if SW0T[i]=1'b1. | + +## SW_EVENT_1_TRIG +Cluster Software event 1 trigger command register. +- Offset: `0x60` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "SW1T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | SW1T | Triggers software event 1 for cluster core i if SW1T[i]=1'b1. | + +## SW_EVENT_2_TRIG +Cluster Software event 2 trigger command register. +- Offset: `0x64` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "SW2T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | SW2T | Triggers software event 2 for cluster core i if SW2T[i]=1'b1. | + +## SW_EVENT_3_TRIG +Cluster Software event 3 trigger command register. +- Offset: `0x68` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "SW3T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | SW3T | Triggers software event 3 for cluster core i if SW3T[i]=1'b1. | + +## SW_EVENT_4_TRIG +Cluster Software event 4 trigger command register. +- Offset: `0x6c` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "SW4T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | SW4T | Triggers software event 4 for cluster core i if SW4T[i]=1'b1. | + +## SW_EVENT_5_TRIG +Cluster Software event 5 trigger command register. +- Offset: `0x70` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "SW5T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | SW5T | Triggers software event 5 for cluster core i if SW5T[i]=1'b1. | + +## SW_EVENT_6_TRIG +Cluster Software event 6 trigger command register. +- Offset: `0x74` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "SW6T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | SW6T | Triggers software event 6 for cluster core i if SW6T[i]=1'b1. | + +## SW_EVENT_7_TRIG +Cluster Software event 7 trigger command register. +- Offset: `0x78` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "SW7T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | SW7T | Triggers software event 7 for cluster core i if SW7T[i]=1'b1. | + +## SW_EVENT_0_TRIG_WAIT +Cluster Software event 0 trigger and wait command register. +- Offset: `0x7c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Triggers software event 0 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## SW_EVENT_1_TRIG_WAIT +Cluster Software event 1 trigger and wait command register. +- Offset: `0x80` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Triggers software event 1 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## SW_EVENT_2_TRIG_WAIT +Cluster Software event 2 trigger and wait command register. +- Offset: `0x84` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Triggers software event 2 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## SW_EVENT_3_TRIG_WAIT +Cluster Software event 3 trigger and wait command register. +- Offset: `0x88` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Triggers software event 3 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## SW_EVENT_4_TRIG_WAIT +Cluster Software event 4 trigger and wait command register. +- Offset: `0x8c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Triggers software event 4 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## SW_EVENT_5_TRIG_WAIT +Cluster Software event 5 trigger and wait command register. +- Offset: `0x90` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Triggers software event 5 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## SW_EVENT_6_TRIG_WAIT +Cluster Software event 6 trigger and wait command register. +- Offset: `0x94` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Triggers software event 6 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## SW_EVENT_7_TRIG_WAIT +Cluster Software event 7 trigger and wait command register. +- Offset: `0x98` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Triggers software event 7 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## SW_EVENT_0_TRIG_WAIT_CLEAR +Cluster Software event 0 trigger, wait and clear command register. +- Offset: `0x9c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:----------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#sw_event_0_trig_wait_clear--ebm) | + +### SW_EVENT_0_TRIG_WAIT_CLEAR . EBM +Triggers software event 0 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## SW_EVENT_1_TRIG_WAIT_CLEAR +Cluster Software event 1 trigger, wait and clear command register. +- Offset: `0xa0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:----------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#sw_event_1_trig_wait_clear--ebm) | + +### SW_EVENT_1_TRIG_WAIT_CLEAR . EBM +Triggers software event 1 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## SW_EVENT_2_TRIG_WAIT_CLEAR +Cluster Software event 2 trigger, wait and clear command register. +- Offset: `0xa4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:----------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#sw_event_2_trig_wait_clear--ebm) | + +### SW_EVENT_2_TRIG_WAIT_CLEAR . EBM +Triggers software event 2 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## SW_EVENT_3_TRIG_WAIT_CLEAR +Cluster Software event 3 trigger, wait and clear command register. +- Offset: `0xa8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:----------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#sw_event_3_trig_wait_clear--ebm) | + +### SW_EVENT_3_TRIG_WAIT_CLEAR . EBM +Triggers software event 3 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## SW_EVENT_4_TRIG_WAIT_CLEAR +Cluster Software event 4 trigger, wait and clear command register. +- Offset: `0xac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:----------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#sw_event_4_trig_wait_clear--ebm) | + +### SW_EVENT_4_TRIG_WAIT_CLEAR . EBM +Triggers software event 4 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## SW_EVENT_5_TRIG_WAIT_CLEAR +Cluster Software event 5 trigger, wait and clear command register. +- Offset: `0xb0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:----------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#sw_event_5_trig_wait_clear--ebm) | + +### SW_EVENT_5_TRIG_WAIT_CLEAR . EBM +Triggers software event 5 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## SW_EVENT_6_TRIG_WAIT_CLEAR +Cluster Software event 6 trigger, wait and clear command register. +- Offset: `0xb4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:----------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#sw_event_6_trig_wait_clear--ebm) | + +### SW_EVENT_6_TRIG_WAIT_CLEAR . EBM +Triggers software event 6 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## SW_EVENT_7_TRIG_WAIT_CLEAR +Cluster Software event 7 trigger, wait and clear command register. +- Offset: `0xb8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:----------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#sw_event_7_trig_wait_clear--ebm) | + +### SW_EVENT_7_TRIG_WAIT_CLEAR . EBM +Triggers software event 7 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## SOC_PERIPH_EVENT_ID +Cluster SoC peripheral event ID status register. +- Offset: `0xbc` +- Reset default: `0x0` +- Reset mask: `0x800000ff` + +### Fields + +```wavejson +{"reg": [{"name": "ID", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 23}, {"name": "VALID", "bits": 1, "attr": ["ro"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------| +| 31 | ro | 0x0 | VALID | Validity bit of SOC_PERIPH_EVENT_ID.ID bitfield. | +| 30:8 | | | | Reserved | +| 7:0 | ro | 0x0 | ID | Oldest SoC peripheral event ID status bitfield. | + +## HW_BARRIER_0_TRIG_MASK +Cluster hardware barrier 0 trigger mask configuration register. +- Offset: `0xc0` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HB0TM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HB0TM | Trigger mask for hardware barrier 0 bitfield. Hardware barrier 0 will be triggered only if for all HB0TM[i] = 1'b1, HW_BARRIER_0_STATUS.HB0S[i]=1'b1. HB0TM=0 means that hardware barrier 0 is disabled. | + +## HW_BARRIER_1_TRIG_MASK +Cluster hardware barrier 1 trigger mask configuration register. +- Offset: `0xc4` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HB1TM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HB1TM | Trigger mask for hardware barrier 1 bitfield. Hardware barrier 1 will be triggered only if for all HB1TM[i] = 1'b1, HW_BARRIER_1_STATUS.HB1S[i]=1'b1. HB1TM=0 means that hardware barrier 1 is disabled. | + +## HW_BARRIER_2_TRIG_MASK +Cluster hardware barrier 2 trigger mask configuration register. +- Offset: `0xc8` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HB2TM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HB2TM | Trigger mask for hardware barrier 2 bitfield. Hardware barrier 2 will be triggered only if for all HB2TM[i] = 1'b1, HW_BARRIER_2_STATUS.HB2S[i]=1'b1. HB2TM=0 means that hardware barrier 2 is disabled. | + +## HW_BARRIER_3_TRIG_MASK +Cluster hardware barrier 3 trigger mask configuration register. +- Offset: `0xcc` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HB3TM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HB3TM | Trigger mask for hardware barrier 3 bitfield. Hardware barrier 3 will be triggered only if for all HB3TM[i] = 1'b1, HW_BARRIER_3_STATUS.HB3S[i]=1'b1. HB3TM=0 means that hardware barrier 3 is disabled. | + +## HW_BARRIER_4_TRIG_MASK +Cluster hardware barrier 4 trigger mask configuration register. +- Offset: `0xd0` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HB4TM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HB4TM | Trigger mask for hardware barrier 4 bitfield. Hardware barrier 4 will be triggered only if for all HB4TM[i] = 1'b1, HW_BARRIER_4_STATUS.HB4S[i]=1'b1. HB4TM=0 means that hardware barrier 4 is disabled. | + +## HW_BARRIER_5_TRIG_MASK +Cluster hardware barrier 5 trigger mask configuration register. +- Offset: `0xd4` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HB5TM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HB5TM | Trigger mask for hardware barrier 5 bitfield. Hardware barrier 5 will be triggered only if for all HB5TM[i] = 1'b1, HW_BARRIER_5_STATUS.HB5S[i]=1'b1. HB5TM=0 means that hardware barrier 5 is disabled. | + +## HW_BARRIER_6_TRIG_MASK +Cluster hardware barrier 6 trigger mask configuration register. +- Offset: `0xd8` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HB6TM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HB6TM | Trigger mask for hardware barrier 6 bitfield. Hardware barrier 6 will be triggered only if for all HB6TM[i] = 1'b1, HW_BARRIER_6_STATUS.HB6S[i]=1'b1. HB6TM=0 means that hardware barrier 6 is disabled. | + +## HW_BARRIER_7_TRIG_MASK +Cluster hardware barrier 7 trigger mask configuration register. +- Offset: `0xdc` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HB7TM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HB7TM | Trigger mask for hardware barrier 7 bitfield. Hardware barrier 7 will be triggered only if for all HB7TM[i] = 1'b1, HW_BARRIER_7_STATUS.HB7S[i]=1'b1. HB7TM=0 means that hardware barrier 7 is disabled. | + +## HW_BARRIER_0_STATUS +Cluster hardware barrier 0 status register. +- Offset: `0xe0` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBS | Current status of hardware barrier 0 bitfield. HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 0. It is cleared when HBS matches HW_BARRIER_0_TRIG_MASK.HB0TM. | + +## HW_BARRIER_1_STATUS +Cluster hardware barrier 1 status register. +- Offset: `0xe4` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBS | Current status of hardware barrier 1 bitfield. HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 1. It is cleared when HBS matches HW_BARRIER_1_TRIG_MASK.HB1TM. | + +## HW_BARRIER_2_STATUS +Cluster hardware barrier 2 status register. +- Offset: `0xe8` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBS | Current status of hardware barrier 2 bitfield. HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 2. It is cleared when HBS matches HW_BARRIER_2_TRIG_MASK.HB2TM. | + +## HW_BARRIER_3_STATUS +Cluster hardware barrier 3 status register. +- Offset: `0xec` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBS | Current status of hardware barrier 3 bitfield. HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 3. It is cleared when HBS matches HW_BARRIER_3_TRIG_MASK.HB3TM. | + +## HW_BARRIER_4_STATUS +Cluster hardware barrier 4 status register. +- Offset: `0xf0` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBS | Current status of hardware barrier 4 bitfield. HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 4. It is cleared when HBS matches HW_BARRIER_4_TRIG_MASK.HB4TM. | + +## HW_BARRIER_5_STATUS +Cluster hardware barrier 5 status register. +- Offset: `0xf4` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBS | Current status of hardware barrier 5 bitfield. HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 5. It is cleared when HBS matches HW_BARRIER_5_TRIG_MASK.HB5TM. | + +## HW_BARRIER_6_STATUS +Cluster hardware barrier 6 status register. +- Offset: `0xf8` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBS | Current status of hardware barrier 6 bitfield. HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 6. It is cleared when HBS matches HW_BARRIER_6_TRIG_MASK.HB6TM. | + +## HW_BARRIER_7_STATUS +Cluster hardware barrier 7 status register. +- Offset: `0xfc` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBS | Current status of hardware barrier 7 bitfield. HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 7. It is cleared when HBS matches HW_BARRIER_7_TRIG_MASK.HB7TM. | + +## HW_BARRIER_0_STATUS_SUM +Cluster hardware barrier summary status register. +- Offset: `0x100` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBSS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBSS | Current status of hardware barrier 0. HBSS[i] represents a summary of the barrier status for core i. | + +## HW_BARRIER_1_STATUS_SUM +Cluster hardware barrier summary status register. +- Offset: `0x104` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBSS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBSS | Current status of hardware barrier 1. HBSS[i] represents a summary of the barrier status for core i. | + +## HW_BARRIER_2_STATUS_SUM +Cluster hardware barrier summary status register. +- Offset: `0x108` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBSS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBSS | Current status of hardware barrier 2. HBSS[i] represents a summary of the barrier status for core i. | + +## HW_BARRIER_3_STATUS_SUM +Cluster hardware barrier summary status register. +- Offset: `0x10c` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBSS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBSS | Current status of hardware barrier 3. HBSS[i] represents a summary of the barrier status for core i. | + +## HW_BARRIER_4_STATUS_SUM +Cluster hardware barrier summary status register. +- Offset: `0x110` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBSS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBSS | Current status of hardware barrier 4. HBSS[i] represents a summary of the barrier status for core i. | + +## HW_BARRIER_5_STATUS_SUM +Cluster hardware barrier summary status register. +- Offset: `0x114` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBSS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBSS | Current status of hardware barrier 5. HBSS[i] represents a summary of the barrier status for core i. | + +## HW_BARRIER_6_STATUS_SUM +Cluster hardware barrier summary status register. +- Offset: `0x118` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBSS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBSS | Current status of hardware barrier 6. HBSS[i] represents a summary of the barrier status for core i. | + +## HW_BARRIER_7_STATUS_SUM +Cluster hardware barrier summary status register. +- Offset: `0x11c` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBSS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBSS | Current status of hardware barrier 7. HBSS[i] represents a summary of the barrier status for core i. | + +## HW_BARRIER_0_TARGET_MASK +Cluster hardware barrier 0 target mask configuration register. +- Offset: `0x120` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBTAM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HBTAM | Cluster hardware barrier 0 target mask configuration bitfield. HBATM[i]=1'b1 means that cluster core i will receive hardware barrier 0 event when HW_BARRIER_0_STATUS will match HW_BARRIER_0_TRIG_MASK. | + +## HW_BARRIER_1_TARGET_MASK +Cluster hardware barrier 1 target mask configuration register. +- Offset: `0x124` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBTAM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HBTAM | Cluster hardware barrier 1 target mask configuration bitfield. HBATM[i]=1'b1 means that cluster core i will receive hardware barrier 1 event when HW_BARRIER_1_STATUS will match HW_BARRIER_1_TRIG_MASK. | + +## HW_BARRIER_2_TARGET_MASK +Cluster hardware barrier 2 target mask configuration register. +- Offset: `0x128` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBTAM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HBTAM | Cluster hardware barrier 2 target mask configuration bitfield. HBATM[i]=1'b1 means that cluster core i will receive hardware barrier 2 event when HW_BARRIER_2_STATUS will match HW_BARRIER_2_TRIG_MASK. | + +## HW_BARRIER_3_TARGET_MASK +Cluster hardware barrier 3 target mask configuration register. +- Offset: `0x12c` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBTAM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HBTAM | Cluster hardware barrier 3 target mask configuration bitfield. HBATM[i]=1'b1 means that cluster core i will receive hardware barrier 3 event when HW_BARRIER_3_STATUS will match HW_BARRIER_3_TRIG_MASK. | + +## HW_BARRIER_4_TARGET_MASK +Cluster hardware barrier 4 target mask configuration register. +- Offset: `0x130` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBTAM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HBTAM | Cluster hardware barrier 4 target mask configuration bitfield. HBATM[i]=1'b1 means that cluster core i will receive hardware barrier 4 event when HW_BARRIER_4_STATUS will match HW_BARRIER_4_TRIG_MASK. | + +## HW_BARRIER_5_TARGET_MASK +Cluster hardware barrier 5 target mask configuration register. +- Offset: `0x134` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBTAM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HBTAM | Cluster hardware barrier 5 target mask configuration bitfield. HBATM[i]=1'b1 means that cluster core i will receive hardware barrier 5 event when HW_BARRIER_5_STATUS will match HW_BARRIER_5_TRIG_MASK. | + +## HW_BARRIER_6_TARGET_MASK +Cluster hardware barrier 6 target mask configuration register. +- Offset: `0x138` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBTAM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HBTAM | Cluster hardware barrier 6 target mask configuration bitfield. HBATM[i]=1'b1 means that cluster core i will receive hardware barrier 6 event when HW_BARRIER_6_STATUS will match HW_BARRIER_6_TRIG_MASK. | + +## HW_BARRIER_7_TARGET_MASK +Cluster hardware barrier 7 target mask configuration register. +- Offset: `0x13c` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBTAM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HBTAM | Cluster hardware barrier 7 target mask configuration bitfield. HBATM[i]=1'b1 means that cluster core i will receive hardware barrier 7 event when HW_BARRIER_7_STATUS will match HW_BARRIER_7_TRIG_MASK. | + +## HW_BARRIER_0_TRIG +Cluster hardware barrier 0 trigger command register. +- Offset: `0x140` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | T | Sets HW_BARRIER_0_STATUS.HBS[i] to 1'b1 when T[i]=1'b1. | + +## HW_BARRIER_1_TRIG +Cluster hardware barrier 1 trigger command register. +- Offset: `0x144` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | T | Sets HW_BARRIER_1_STATUS.HBS[i] to 1'b1 when T[i]=1'b1. | + +## HW_BARRIER_2_TRIG +Cluster hardware barrier 2 trigger command register. +- Offset: `0x148` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | T | Sets HW_BARRIER_2_STATUS.HBS[i] to 1'b1 when T[i]=1'b1. | + +## HW_BARRIER_3_TRIG +Cluster hardware barrier 3 trigger command register. +- Offset: `0x14c` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | T | Sets HW_BARRIER_3_STATUS.HBS[i] to 1'b1 when T[i]=1'b1. | + +## HW_BARRIER_4_TRIG +Cluster hardware barrier 4 trigger command register. +- Offset: `0x150` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | T | Sets HW_BARRIER_4_STATUS.HBS[i] to 1'b1 when T[i]=1'b1. | + +## HW_BARRIER_5_TRIG +Cluster hardware barrier 5 trigger command register. +- Offset: `0x154` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | T | Sets HW_BARRIER_5_STATUS.HBS[i] to 1'b1 when T[i]=1'b1. | + +## HW_BARRIER_6_TRIG +Cluster hardware barrier 6 trigger command register. +- Offset: `0x158` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | T | Sets HW_BARRIER_6_STATUS.HBS[i] to 1'b1 when T[i]=1'b1. | + +## HW_BARRIER_7_TRIG +Cluster hardware barrier 7 trigger command register. +- Offset: `0x15c` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | T | Sets HW_BARRIER_7_STATUS.HBS[i] to 1'b1 when T[i]=1'b1. | + +## HW_BARRIER_0_SELF_TRIG +Cluster hardware barrier 0 self trigger command register. +- Offset: `0x160` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------| +| 31:0 | ro | 0x0 | T | Sets HW_BARRIER_0_STATUS.HBS[i] to 1'b1 when issued by cluster core i. | + +## HW_BARRIER_1_SELF_TRIG +Cluster hardware barrier 1 self trigger command register. +- Offset: `0x164` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------| +| 31:0 | ro | 0x0 | T | Sets HW_BARRIER_1_STATUS.HBS[i] to 1'b1 when issued by cluster core i. | + +## HW_BARRIER_2_SELF_TRIG +Cluster hardware barrier 2 self trigger command register. +- Offset: `0x168` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------| +| 31:0 | ro | 0x0 | T | Sets HW_BARRIER_2_STATUS.HBS[i] to 1'b1 when issued by cluster core i. | + +## HW_BARRIER_3_SELF_TRIG +Cluster hardware barrier 3 self trigger command register. +- Offset: `0x16c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------| +| 31:0 | ro | 0x0 | T | Sets HW_BARRIER_3_STATUS.HBS[i] to 1'b1 when issued by cluster core i. | + +## HW_BARRIER_4_SELF_TRIG +Cluster hardware barrier 4 self trigger command register. +- Offset: `0x170` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------| +| 31:0 | ro | 0x0 | T | Sets HW_BARRIER_4_STATUS.HBS[i] to 1'b1 when issued by cluster core i. | + +## HW_BARRIER_5_SELF_TRIG +Cluster hardware barrier 5 self trigger command register. +- Offset: `0x174` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------| +| 31:0 | ro | 0x0 | T | Sets HW_BARRIER_5_STATUS.HBS[i] to 1'b1 when issued by cluster core i. | + +## HW_BARRIER_6_SELF_TRIG +Cluster hardware barrier 6 self trigger command register. +- Offset: `0x178` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------| +| 31:0 | ro | 0x0 | T | Sets HW_BARRIER_6_STATUS.HBS[i] to 1'b1 when issued by cluster core i. | + +## HW_BARRIER_7_SELF_TRIG +Cluster hardware barrier 7 self trigger command register. +- Offset: `0x17c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------| +| 31:0 | ro | 0x0 | T | Sets HW_BARRIER_7_STATUS.HBS[i] to 1'b1 when issued by cluster core i. | + +## HW_BARRIER_0_TRIG_WAIT +Cluster hardware barrier 0 trigger and wait command register. +- Offset: `0x180` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Set HW_BARRIER_0[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_0 is released. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## HW_BARRIER_1_TRIG_WAIT +Cluster hardware barrier 1 trigger and wait command register. +- Offset: `0x184` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Set HW_BARRIER_1[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_1 is released. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## HW_BARRIER_2_TRIG_WAIT +Cluster hardware barrier 2 trigger and wait command register. +- Offset: `0x188` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Set HW_BARRIER_2[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_2 is released. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## HW_BARRIER_3_TRIG_WAIT +Cluster hardware barrier 3 trigger and wait command register. +- Offset: `0x18c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Set HW_BARRIER_3[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_3 is released. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## HW_BARRIER_4_TRIG_WAIT +Cluster hardware barrier 4 trigger and wait command register. +- Offset: `0x190` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Set HW_BARRIER_4[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_4 is released. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## HW_BARRIER_5_TRIG_WAIT +Cluster hardware barrier 5 trigger and wait command register. +- Offset: `0x194` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Set HW_BARRIER_5[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_5 is released. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## HW_BARRIER_6_TRIG_WAIT +Cluster hardware barrier 6 trigger and wait command register. +- Offset: `0x198` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Set HW_BARRIER_6[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_6 is released. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## HW_BARRIER_7_TRIG_WAIT +Cluster hardware barrier 7 trigger and wait command register. +- Offset: `0x19c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Set HW_BARRIER_7[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_7 is released. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## HW_BARRIER_0_TRIG_WAIT_CLEAR +Cluster hardware barrier 0 trigger, wait and clear command register. +- Offset: `0x1a0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#hw_barrier_0_trig_wait_clear--ebm) | + +### HW_BARRIER_0_TRIG_WAIT_CLEAR . EBM +Set HW_BARRIER_0[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_0 is released. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## HW_BARRIER_1_TRIG_WAIT_CLEAR +Cluster hardware barrier 1 trigger, wait and clear command register. +- Offset: `0x1a4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#hw_barrier_1_trig_wait_clear--ebm) | + +### HW_BARRIER_1_TRIG_WAIT_CLEAR . EBM +Set HW_BARRIER_1[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_1 is released. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## HW_BARRIER_2_TRIG_WAIT_CLEAR +Cluster hardware barrier 2 trigger, wait and clear command register. +- Offset: `0x1a8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#hw_barrier_2_trig_wait_clear--ebm) | + +### HW_BARRIER_2_TRIG_WAIT_CLEAR . EBM +Set HW_BARRIER_2[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_2 is released. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## HW_BARRIER_3_TRIG_WAIT_CLEAR +Cluster hardware barrier 3 trigger, wait and clear command register. +- Offset: `0x1ac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#hw_barrier_3_trig_wait_clear--ebm) | + +### HW_BARRIER_3_TRIG_WAIT_CLEAR . EBM +Set HW_BARRIER_3[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_3 is released. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## HW_BARRIER_4_TRIG_WAIT_CLEAR +Cluster hardware barrier 4 trigger, wait and clear command register. +- Offset: `0x1b0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#hw_barrier_4_trig_wait_clear--ebm) | + +### HW_BARRIER_4_TRIG_WAIT_CLEAR . EBM +Set HW_BARRIER_4[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_4 is released. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## HW_BARRIER_5_TRIG_WAIT_CLEAR +Cluster hardware barrier 5 trigger, wait and clear command register. +- Offset: `0x1b4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#hw_barrier_5_trig_wait_clear--ebm) | + +### HW_BARRIER_5_TRIG_WAIT_CLEAR . EBM +Set HW_BARRIER_5[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_5 is released. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## HW_BARRIER_6_TRIG_WAIT_CLEAR +Cluster hardware barrier 6 trigger, wait and clear command register. +- Offset: `0x1b8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#hw_barrier_6_trig_wait_clear--ebm) | + +### HW_BARRIER_6_TRIG_WAIT_CLEAR . EBM +Set HW_BARRIER_6[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_6 is released. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## HW_BARRIER_7_TRIG_WAIT_CLEAR +Cluster hardware barrier 7 trigger, wait and clear command register. +- Offset: `0x1bc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#hw_barrier_7_trig_wait_clear--ebm) | + +### HW_BARRIER_7_TRIG_WAIT_CLEAR . EBM +Set HW_BARRIER_7[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_7 is released. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + diff --git a/docs/um/ip/cluster_peripherals/cluster_ctrl_unit/data/cluster_crtl_unit_regs.hjson b/docs/um/ip/cluster_peripherals/cluster_ctrl_unit/data/cluster_crtl_unit_regs.hjson new file mode 100644 index 00000000..0130c267 --- /dev/null +++ b/docs/um/ip/cluster_peripherals/cluster_ctrl_unit/data/cluster_crtl_unit_regs.hjson @@ -0,0 +1,418 @@ +// Copyright 2018-2021 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51, see LICENSE for details. +// +// Author: Davide Rossi + +{ + name: "cluster_control_unit" + one_paragraph_desc: ''' + CL_CTRL_UNIT component manages the following features: + - End of Computation status flag + - Configurable fetch activation for all cores of the Cluster + - Configurable core 0 boot address to define where to fetch first instruction in CL_CORE_0 after releasing the reset + - Configurable full cluster clock gating + - Configurable Cluster L1 memory arbitration policy + - Cluster cores resume command control + - Cluster cores halt status flags + - Configurable cluster cores debug halt command group mask policy + ''' + cip_id: "36", + version: "0.0.0" // null, commit c015839 + clocking: [ + {clock: "clk_i", reset: "rst_ni", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device" } + ], + regwidth: "32" + registers: [ + { name: "EOC" + desc: "End Of Computation status register." + swaccess: "rw" + hwaccess: "hwo" + fields: [ + { bits: "0:0" + name: "eoc" + resval: 0x0 + desc: '''End of computation status flag bitfield: + - 1'b0: program execution under going + - 1'b1: end of computation reached + ''' + } + ] + } + { name: "FETCH_EN" + desc: "Cluster cores fetch enable configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "0" + name: "CORE0" + resval: 0x0 + desc: '''Core 0 fetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "1" + name: "CORE1" + resval: 0x0 + desc: '''Core 1 fetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "2" + name: "CORE2" + resval: 0x0 + desc: '''Core 2 fetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "3" + name: "CORE3" + resval: 0x0 + desc: '''Core 3 fetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "4" + name: "CORE4" + resval: 0x0 + desc: '''Core 4 fetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "5" + name: "CORE5" + resval: 0x0 + desc: '''Core 5 fetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "6" + name: "CORE6" + resval: 0x0 + desc: '''Core 6 fetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "7" + name: "CORE7" + resval: 0x0 + desc: '''Core 7 fetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + ] + } + { name: "CLOCK_GATE" + desc: "Cluster clock gate configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "0:0" + name: "EN" + resval: 0x0 + desc: '''Cluster clock gate configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + ] + } + { name: "DBG_RESUME" + desc: "Cluster cores debug resume register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "0" + name: "CORE0" + resval: 0x0 + desc: '''Core 0 debug resume configuration bitfield: + - 1'b0: stay halted + - 1'b1: resume core 0 + ''' + } + { bits: "1" + name: "CORE1" + resval: 0x0 + desc: '''Core 1 debug resume configuration bitfield: + - 1'b0: stay halted + - 1'b1: resume core 1 + ''' + } + { bits: "2" + name: "CORE2" + resval: 0x0 + desc: '''Core 2 debug resume configuration bitfield: + - 1'b0: stay halted + - 1'b1: resume core 2 + ''' + } + { bits: "3" + name: "CORE3" + resval: 0x0 + desc: '''Core 3 debug resume configuration bitfield: + - 1'b0: stay halted + - 1'b1: resume core 3 + ''' + } + { bits: "4" + name: "CORE4" + resval: 0x0 + desc: '''Core 4 debug resume configuration bitfield: + - 1'b0: stay halted + - 1'b1: resume core 4 + ''' + } + { bits: "5" + name: "CORE5" + resval: 0x0 + desc: '''Core 5 debug resume configuration bitfield: + - 1'b0: stay halted + - 1'b1: resume core 5 + ''' + } + { bits: "6" + name: "CORE6" + resval: 0x0 + desc: '''Core 6 debug resume configuration bitfield: + - 1'b0: stay halted + - 1'b1: resume core 6 + ''' + } + { bits: "7" + name: "CORE7" + resval: 0x0 + desc: '''Core 7 debug resume configuration bitfield: + - 1'b0: stay halted + - 1'b1: resume core 7 + ''' + } + ] + } + { name: "DBG_HALT_STATUS" + desc: "Cluster cores debug halt status register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "0" + name: "CORE0" + resval: 0x0 + desc: '''Core 0 debug halt status flag bitfield: + - 1'b0: running + - 1'b1: halted + ''' + } + { bits: "1" + name: "CORE1" + resval: 0x0 + desc: '''Core 1 debug halt status flag bitfield: + - 1'b0: running + - 1'b1: halted + ''' + } + { bits: "2" + name: "CORE2" + resval: 0x0 + desc: '''Core 2 debug halt status flag bitfield: + - 1'b0: running + - 1'b1: halted + ''' + } + { bits: "3" + name: "CORE3" + resval: 0x0 + desc: '''Core 3 debug halt status flag bitfield: + - 1'b0: running + - 1'b1: halted + ''' + } + { bits: "4" + name: "CORE4" + resval: 0x0 + desc: '''Core 4 debug halt status flag bitfield: + - 1'b0: running + - 1'b1: halted + ''' + } + { bits: "5" + name: "CORE5" + resval: 0x0 + desc: '''Core 5 debug halt status flag bitfield: + - 1'b0: running + - 1'b1: halted + ''' + } + { bits: "6" + name: "CORE6" + resval: 0x0 + desc: '''Core 6 debug halt status flag bitfield: + - 1'b0: running + - 1'b1: halted + ''' + } + { bits: "7" + name: "CORE7" + resval: 0x0 + desc: '''Core 7 debug halt status flag bitfield: + - 1'b0: running + - 1'b1: halted + ''' + } + ] + } + { name: "DBG_HALT_MASK" + desc: "Cluster cores debug halt mask configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "0" + name: "CORE0" + resval: 0x0 + desc: '''Core 0 debug halt mask bitfield. When bit is set, + core will be part of mask group and stopped when one + of the members of the group stops. + ''' + } + { bits: "1" + name: "CORE1" + resval: 0x0 + desc: '''Core 1 debug halt mask bitfield. When bit is set, + core will be part of mask group and stopped when one + of the members of the group stops. + ''' + } + { bits: "2" + name: "CORE2" + resval: 0x0 + desc: '''Core 2 debug halt mask bitfield. When bit is set, + core will be part of mask group and stopped when one + of the members of the group stops. + ''' + } + { bits: "3" + name: "CORE3" + resval: 0x0 + desc: '''Core 3 debug halt mask bitfield. When bit is set, + core will be part of mask group and stopped when one + of the members of the group stops. + ''' + } + { bits: "4" + name: "CORE4" + resval: 0x0 + desc: '''Core 4 debug halt mask bitfield. When bit is set, + core will be part of mask group and stopped when one + of the members of the group stops. + ''' + } + { bits: "5" + name: "CORE5" + resval: 0x0 + desc: '''Core 5 debug halt mask bitfield. When bit is set, + core will be part of mask group and stopped when one + of the members of the group stops. + ''' + } + { bits: "6" + name: "CORE6" + resval: 0x0 + desc: '''Core 6 debug halt mask bitfield. When bit is set, + core will be part of mask group and stopped when one + of the members of the group stops. + ''' + } + { bits: "7" + name: "CORE7" + resval: 0x0 + desc: '''Core 7 debug halt mask bitfield. When bit is set, + core will be part of mask group and stopped when one + of the members of the group stops. + ''' + } + ] + } + { name: "BOOT_ADDR0" + desc: "Cluster core 0 boot address configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "BA" + resval: 0x0 + desc: "Cluster core 0 boot address configuration bitfield." + } + ] + } + { name: "TCDM_ARB_POLICY_CH0" + desc: "TCDM arbitration policy ch0 for cluster cores configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "0:0" + name: "POL" + resval: 0x0 + desc: '''TCDM arbitration policy for cluster cores configuration bitfield: + - 1'b0: fair round robin + - 1'b1: fixed order + ''' + } + ] + } + { name: "TCDM_ARB_POLICY_CH1" + desc: "TCDM arbitration policy ch1 for DMA/HWCE configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "0:0" + name: "POL" + resval: 0x0 + desc: '''TCDM arbitration policy for DMA/HWCE configuration bitfield: + - 1'b0: fair round robin + - 1'b1: fixed order + ''' + } + ] + } + { name: "TCDM_ARB_POLICY_CH0_REP" + desc: "Read only duplicate of TCDM_ARB_POLICY_CH0 register" + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "0:0" + name: "POL" + resval: 0x0 + desc: '''TCDM arbitration policy for cluster cores configuration bitfield: + - 1'b0: fair round robin + - 1'b1: fixed order + ''' + } + ] + } + { name: "TCDM_ARB_POLICY_CH1_REP" + desc: "Read only duplicate of TCDM_ARB_POLICY_CH1 register" + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "0:0" + name: "POL" + resval: 0x0 + desc: '''TCDM arbitration policy for DMA/HWCE configuration bitfield: + - 1'b0: fair round robin + - 1'b1: fixed order + ''' + } + ] + } + ] +} diff --git a/docs/um/ip/cluster_peripherals/cluster_ctrl_unit/doc/registers.md b/docs/um/ip/cluster_peripherals/cluster_ctrl_unit/doc/registers.md new file mode 100644 index 00000000..67fcdc95 --- /dev/null +++ b/docs/um/ip/cluster_peripherals/cluster_ctrl_unit/doc/registers.md @@ -0,0 +1,230 @@ +## Summary + +| Name | Offset | Length | Description | +|:---------------------------------------------------------------------------|:---------|---------:|:----------------------------------------------------------------------| +| cluster_control_unit.[`EOC`](#eoc) | 0x0 | 4 | End Of Computation status register. | +| cluster_control_unit.[`FETCH_EN`](#fetch_en) | 0x4 | 4 | Cluster cores fetch enable configuration register. | +| cluster_control_unit.[`CLOCK_GATE`](#clock_gate) | 0x8 | 4 | Cluster clock gate configuration register. | +| cluster_control_unit.[`DBG_RESUME`](#dbg_resume) | 0xc | 4 | Cluster cores debug resume register. | +| cluster_control_unit.[`DBG_HALT_STATUS`](#dbg_halt_status) | 0x10 | 4 | Cluster cores debug halt status register. | +| cluster_control_unit.[`DBG_HALT_MASK`](#dbg_halt_mask) | 0x14 | 4 | Cluster cores debug halt mask configuration register. | +| cluster_control_unit.[`BOOT_ADDR0`](#boot_addr0) | 0x18 | 4 | Cluster core 0 boot address configuration register. | +| cluster_control_unit.[`TCDM_ARB_POLICY_CH0`](#tcdm_arb_policy_ch0) | 0x1c | 4 | TCDM arbitration policy ch0 for cluster cores configuration register. | +| cluster_control_unit.[`TCDM_ARB_POLICY_CH1`](#tcdm_arb_policy_ch1) | 0x20 | 4 | TCDM arbitration policy ch1 for DMA/HWCE configuration register. | +| cluster_control_unit.[`TCDM_ARB_POLICY_CH0_REP`](#tcdm_arb_policy_ch0_rep) | 0x24 | 4 | Read only duplicate of TCDM_ARB_POLICY_CH0 register | +| cluster_control_unit.[`TCDM_ARB_POLICY_CH1_REP`](#tcdm_arb_policy_ch1_rep) | 0x28 | 4 | Read only duplicate of TCDM_ARB_POLICY_CH1 register | + +## EOC +End Of Computation status register. +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "eoc", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | eoc | End of computation status flag bitfield: - 1'b0: program execution under going - 1'b1: end of computation reached | + +## FETCH_EN +Cluster cores fetch enable configuration register. +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "CORE0", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE1", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE2", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE3", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE4", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE5", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE6", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE7", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7 | rw | 0x0 | CORE7 | Core 7 fetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 6 | rw | 0x0 | CORE6 | Core 6 fetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 5 | rw | 0x0 | CORE5 | Core 5 fetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 4 | rw | 0x0 | CORE4 | Core 4 fetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 3 | rw | 0x0 | CORE3 | Core 3 fetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 2 | rw | 0x0 | CORE2 | Core 2 fetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 1 | rw | 0x0 | CORE1 | Core 1 fetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 0 | rw | 0x0 | CORE0 | Core 0 fetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | + +## CLOCK_GATE +Cluster clock gate configuration register. +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | EN | Cluster clock gate configuration bitfield: - 1'b0: disabled - 1'b1: enabled | + +## DBG_RESUME +Cluster cores debug resume register. +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "CORE0", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "CORE1", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "CORE2", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "CORE3", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "CORE4", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "CORE5", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "CORE6", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "CORE7", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7 | wo | 0x0 | CORE7 | Core 7 debug resume configuration bitfield: - 1'b0: stay halted - 1'b1: resume core 7 | +| 6 | wo | 0x0 | CORE6 | Core 6 debug resume configuration bitfield: - 1'b0: stay halted - 1'b1: resume core 6 | +| 5 | wo | 0x0 | CORE5 | Core 5 debug resume configuration bitfield: - 1'b0: stay halted - 1'b1: resume core 5 | +| 4 | wo | 0x0 | CORE4 | Core 4 debug resume configuration bitfield: - 1'b0: stay halted - 1'b1: resume core 4 | +| 3 | wo | 0x0 | CORE3 | Core 3 debug resume configuration bitfield: - 1'b0: stay halted - 1'b1: resume core 3 | +| 2 | wo | 0x0 | CORE2 | Core 2 debug resume configuration bitfield: - 1'b0: stay halted - 1'b1: resume core 2 | +| 1 | wo | 0x0 | CORE1 | Core 1 debug resume configuration bitfield: - 1'b0: stay halted - 1'b1: resume core 1 | +| 0 | wo | 0x0 | CORE0 | Core 0 debug resume configuration bitfield: - 1'b0: stay halted - 1'b1: resume core 0 | + +## DBG_HALT_STATUS +Cluster cores debug halt status register. +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "CORE0", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "CORE1", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "CORE2", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "CORE3", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "CORE4", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "CORE5", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "CORE6", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "CORE7", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7 | ro | 0x0 | CORE7 | Core 7 debug halt status flag bitfield: - 1'b0: running - 1'b1: halted | +| 6 | ro | 0x0 | CORE6 | Core 6 debug halt status flag bitfield: - 1'b0: running - 1'b1: halted | +| 5 | ro | 0x0 | CORE5 | Core 5 debug halt status flag bitfield: - 1'b0: running - 1'b1: halted | +| 4 | ro | 0x0 | CORE4 | Core 4 debug halt status flag bitfield: - 1'b0: running - 1'b1: halted | +| 3 | ro | 0x0 | CORE3 | Core 3 debug halt status flag bitfield: - 1'b0: running - 1'b1: halted | +| 2 | ro | 0x0 | CORE2 | Core 2 debug halt status flag bitfield: - 1'b0: running - 1'b1: halted | +| 1 | ro | 0x0 | CORE1 | Core 1 debug halt status flag bitfield: - 1'b0: running - 1'b1: halted | +| 0 | ro | 0x0 | CORE0 | Core 0 debug halt status flag bitfield: - 1'b0: running - 1'b1: halted | + +## DBG_HALT_MASK +Cluster cores debug halt mask configuration register. +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "CORE0", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE1", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE2", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE3", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE4", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE5", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE6", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE7", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7 | rw | 0x0 | CORE7 | Core 7 debug halt mask bitfield. When bit is set, core will be part of mask group and stopped when one of the members of the group stops. | +| 6 | rw | 0x0 | CORE6 | Core 6 debug halt mask bitfield. When bit is set, core will be part of mask group and stopped when one of the members of the group stops. | +| 5 | rw | 0x0 | CORE5 | Core 5 debug halt mask bitfield. When bit is set, core will be part of mask group and stopped when one of the members of the group stops. | +| 4 | rw | 0x0 | CORE4 | Core 4 debug halt mask bitfield. When bit is set, core will be part of mask group and stopped when one of the members of the group stops. | +| 3 | rw | 0x0 | CORE3 | Core 3 debug halt mask bitfield. When bit is set, core will be part of mask group and stopped when one of the members of the group stops. | +| 2 | rw | 0x0 | CORE2 | Core 2 debug halt mask bitfield. When bit is set, core will be part of mask group and stopped when one of the members of the group stops. | +| 1 | rw | 0x0 | CORE1 | Core 1 debug halt mask bitfield. When bit is set, core will be part of mask group and stopped when one of the members of the group stops. | +| 0 | rw | 0x0 | CORE0 | Core 0 debug halt mask bitfield. When bit is set, core will be part of mask group and stopped when one of the members of the group stops. | + +## BOOT_ADDR0 +Cluster core 0 boot address configuration register. +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "BA", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------| +| 31:0 | rw | 0x0 | BA | Cluster core 0 boot address configuration bitfield. | + +## TCDM_ARB_POLICY_CH0 +TCDM arbitration policy ch0 for cluster cores configuration register. +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "POL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | POL | TCDM arbitration policy for cluster cores configuration bitfield: - 1'b0: fair round robin - 1'b1: fixed order | + +## TCDM_ARB_POLICY_CH1 +TCDM arbitration policy ch1 for DMA/HWCE configuration register. +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "POL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | POL | TCDM arbitration policy for DMA/HWCE configuration bitfield: - 1'b0: fair round robin - 1'b1: fixed order | + +## TCDM_ARB_POLICY_CH0_REP +Read only duplicate of TCDM_ARB_POLICY_CH0 register +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "POL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | POL | TCDM arbitration policy for cluster cores configuration bitfield: - 1'b0: fair round robin - 1'b1: fixed order | + +## TCDM_ARB_POLICY_CH1_REP +Read only duplicate of TCDM_ARB_POLICY_CH1 register +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "POL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | POL | TCDM arbitration policy for DMA/HWCE configuration bitfield: - 1'b0: fair round robin - 1'b1: fixed order | + diff --git a/docs/um/ip/cluster_peripherals/cluster_icache_ctrl/data/cluster_icache_ctrl_regs.hjson b/docs/um/ip/cluster_peripherals/cluster_icache_ctrl/data/cluster_icache_ctrl_regs.hjson new file mode 100644 index 00000000..609ea93c --- /dev/null +++ b/docs/um/ip/cluster_peripherals/cluster_icache_ctrl/data/cluster_icache_ctrl_regs.hjson @@ -0,0 +1,150 @@ +// Copyright 2014-2018 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51, see LICENSE for details. +// +// Author: Igor Loi + + +{ + name: "cluster_icache_ctrl" + one_paragraph_desc: '''CL_ICACHE_CTRL component manages the following features: + - Bypassable Cluster instruction cache controller + - Flush and selective flush commands + ''' + cip_id: "36", + version: "0.0.0" // null, commit c015839 + clocking: [ + {clock: "clk_i", reset: "rst_ni", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device" } + ], + regwidth: "32" + registers: [ + { name: "ENABLE" // Address : 0x0 + desc: "Cluster instruction cache unit enable configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "0:0" + name: "EN" + resval: 0x0 + desc: '''Cluster instruction cache enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + ] + } + { name: "FLUSH" // Address : 0x4 + desc: "Cluster instruction cache unit flush command register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "0:0" + name: "FL" + resval: 0x0 + desc: "Cluster instruction cache full flush command." + } + ] + } + { name: "L0_FLUSH" // Address : 0x8 + desc: "Cluster level 0 instruction cache unit flush command register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "0:0" + name: "L0_FL" + resval: 0x0 + desc: "Cluster level 0 instruction cache full flush command." + } + ] + } + { name: "SEL_FLUSH" // Address : 0xC + desc: "Cluster instruction cache unit selective flush command register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "ADDR" + resval: 0x0 + desc: "Cluster instruction cache selective flush address configuration bitfield." + } + ] + } + + + { name: "L1_L15_PREFETCH" // Address : 0x1C + desc: "Enable L1 and L1.5 prefetch register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "0" + name: "CORE0" + resval: 0x0 + desc: '''Core 0 icache prefetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "1" + name: "CORE1" + resval: 0x0 + desc: '''Core 1 icache prefetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "2" + name: "CORE2" + resval: 0x0 + desc: '''Core 2 icache prefetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "3" + name: "CORE3" + resval: 0x0 + desc: '''Core 3 icache prefetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "4" + name: "CORE4" + resval: 0x0 + desc: '''Core 4 icache prefetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "5" + name: "CORE5" + resval: 0x0 + desc: '''Core 5 icache prefetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "6" + name: "CORE6" + resval: 0x0 + desc: '''Core 6 icache prefetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "7" + name: "CORE7" + resval: 0x0 + desc: '''Core 7 icache prefetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + ] + } + ] +} diff --git a/docs/um/ip/cluster_peripherals/cluster_icache_ctrl/data/cluster_icache_ctrl_regs.hjson~ b/docs/um/ip/cluster_peripherals/cluster_icache_ctrl/data/cluster_icache_ctrl_regs.hjson~ new file mode 100644 index 00000000..ca9a0299 --- /dev/null +++ b/docs/um/ip/cluster_peripherals/cluster_icache_ctrl/data/cluster_icache_ctrl_regs.hjson~ @@ -0,0 +1,150 @@ +// Copyright 2014-2018 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51, see LICENSE for details. +// +// Author: Michael Gautschi + + +{ + name: "cluster_icache_ctrl" + one_paragraph_desc: '''CL_ICACHE_CTRL component manages the following features: + - Bypassable Cluster instruction cache controller + - Flush and selective flush commands + ''' + cip_id: "36", + version: "0.0.0" // null, commit c015839 + clocking: [ + {clock: "clk_i", reset: "rst_ni", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device" } + ], + regwidth: "32" + registers: [ + { name: "ENABLE" // Address : 0x0 + desc: "Cluster instruction cache unit enable configuration register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "0:0" + name: "EN" + resval: 0x0 + desc: '''Cluster instruction cache enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + ] + } + { name: "FLUSH" // Address : 0x4 + desc: "Cluster instruction cache unit flush command register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "0:0" + name: "FL" + resval: 0x0 + desc: "Cluster instruction cache full flush command." + } + ] + } + { name: "L0_FLUSH" // Address : 0x8 + desc: "Cluster level 0 instruction cache unit flush command register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "0:0" + name: "L0_FL" + resval: 0x0 + desc: "Cluster level 0 instruction cache full flush command." + } + ] + } + { name: "SEL_FLUSH" // Address : 0xC + desc: "Cluster instruction cache unit selective flush command register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "31:0" + name: "ADDR" + resval: 0x0 + desc: "Cluster instruction cache selective flush address configuration bitfield." + } + ] + } + + + { name: "L1_L15_PREFETCH" // Address : 0x1C + desc: "Enable L1 and L1.5 prefetch register." + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "0" + name: "CORE0" + resval: 0x0 + desc: '''Core 0 icache prefetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "1" + name: "CORE1" + resval: 0x0 + desc: '''Core 1 icache prefetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "2" + name: "CORE2" + resval: 0x0 + desc: '''Core 2 icache prefetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "3" + name: "CORE3" + resval: 0x0 + desc: '''Core 3 icache prefetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "4" + name: "CORE4" + resval: 0x0 + desc: '''Core 4 icache prefetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "5" + name: "CORE5" + resval: 0x0 + desc: '''Core 5 icache prefetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "6" + name: "CORE6" + resval: 0x0 + desc: '''Core 6 icache prefetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "7" + name: "CORE7" + resval: 0x0 + desc: '''Core 7 icache prefetch enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + ] + } + ] +} diff --git a/docs/um/ip/cluster_peripherals/cluster_icache_ctrl/doc/registers.md b/docs/um/ip/cluster_peripherals/cluster_icache_ctrl/doc/registers.md new file mode 100644 index 00000000..0b62aa39 --- /dev/null +++ b/docs/um/ip/cluster_peripherals/cluster_icache_ctrl/doc/registers.md @@ -0,0 +1,101 @@ +## Summary + +| Name | Offset | Length | Description | +|:----------------------------------------------------------|:---------|---------:|:-----------------------------------------------------------------| +| cluster_icache_ctrl.[`ENABLE`](#enable) | 0x0 | 4 | Cluster instruction cache unit enable configuration register. | +| cluster_icache_ctrl.[`FLUSH`](#flush) | 0x4 | 4 | Cluster instruction cache unit flush command register. | +| cluster_icache_ctrl.[`L0_FLUSH`](#l0_flush) | 0x8 | 4 | Cluster level 0 instruction cache unit flush command register. | +| cluster_icache_ctrl.[`SEL_FLUSH`](#sel_flush) | 0xc | 4 | Cluster instruction cache unit selective flush command register. | +| cluster_icache_ctrl.[`L1_L15_PREFETCH`](#l1_l15_prefetch) | 0x10 | 4 | Enable L1 and L1.5 prefetch register. | + +## ENABLE +Cluster instruction cache unit enable configuration register. +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | EN | Cluster instruction cache enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | + +## FLUSH +Cluster instruction cache unit flush command register. +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "FL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | FL | Cluster instruction cache full flush command. | + +## L0_FLUSH +Cluster level 0 instruction cache unit flush command register. +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "L0_FL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | L0_FL | Cluster level 0 instruction cache full flush command. | + +## SEL_FLUSH +Cluster instruction cache unit selective flush command register. +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------| +| 31:0 | rw | 0x0 | ADDR | Cluster instruction cache selective flush address configuration bitfield. | + +## L1_L15_PREFETCH +Enable L1 and L1.5 prefetch register. +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "CORE0", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE1", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE2", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE3", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE4", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE5", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE6", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE7", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7 | rw | 0x0 | CORE7 | Core 7 icache prefetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 6 | rw | 0x0 | CORE6 | Core 6 icache prefetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 5 | rw | 0x0 | CORE5 | Core 5 icache prefetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 4 | rw | 0x0 | CORE4 | Core 4 icache prefetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 3 | rw | 0x0 | CORE3 | Core 3 icache prefetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 2 | rw | 0x0 | CORE2 | Core 2 icache prefetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 1 | rw | 0x0 | CORE1 | Core 1 icache prefetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 0 | rw | 0x0 | CORE0 | Core 0 icache prefetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | + diff --git a/docs/um/ip/ethernet/data/eth_framing_regs.hjson b/docs/um/ip/ethernet/data/eth_framing_regs.hjson new file mode 100644 index 00000000..b025661c --- /dev/null +++ b/docs/um/ip/ethernet/data/eth_framing_regs.hjson @@ -0,0 +1,65 @@ +{ + name: "eth_framing", + clock_primary: "msoc_clk", + reset_primary: "rst_int", + bus_interfaces: [ + { protocol: "reg_iface", direction: "device"} + ] + regwidth: "32", + registers: [ + { name: "CONFIG0", + desc: "Configures the lower 4 bytes of the devices MAC address", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0", name: "lower_mac_address", + desc: "Lower 32 bit of the devices MAC address" + resval: "8980226" + } + ] + }, + { name: "CONFIG1", + desc: "Configures the: upper 2 bytes of the devices MAC address, promiscuous flag, MDIO interface", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "15:0", name: "upper_mac_address", + desc: "Upper 16 bit of the devices MAC address" + resval: "8961" + }, + { bits: "16", name: "promiscuous", + desc: "promiscuous flag" + }, + { bits: "17", name: "phy_mdclk", + desc: "MDIO clock" + }, + { bits: "18", name: "phy_mdio_o", + desc: "MDIO output" + }, + { bits: "19", name: "phy_mdio_oe", + desc: "MDIO output enable" + } + ] + }, + { name: "CONFIG2", + desc: "The FCS TX status", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + { bits: "31:0", name: "tx_fcs_reg", + desc: "FCS TX status" + } + ] + }, + { name: "CONFIG3", + desc: "The FCS RX status", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + { bits: "31:0", name: "rx_fcs_reg", + desc: "FCS RX status" + } + ] + } + ] +} \ No newline at end of file diff --git a/docs/um/ip/ethernet/data/eth_framing_regs_doc.hjson b/docs/um/ip/ethernet/data/eth_framing_regs_doc.hjson new file mode 100644 index 00000000..702fac60 --- /dev/null +++ b/docs/um/ip/ethernet/data/eth_framing_regs_doc.hjson @@ -0,0 +1,75 @@ +// Unless specified otherwise in the respective file headers, all code checked into this repository is made available under a permissive license. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51, see LICENSE for details. +// +// Authors: + +{ + name: "eth_framing", + cip_id: "36", + version: "0.0.0", // null, bdc8031 + clocking: [ + {clock: "clk_i", reset: "rst_int", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device"} + ] + regwidth: "32", + registers: [ + { name: "CONFIG0", + desc: "Configures the lower 4 bytes of the devices MAC address", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0", name: "lower_mac_address", + desc: "Lower 32 bit of the devices MAC address" + resval: "8980226" + } + ] + }, + { name: "CONFIG1", + desc: "Configures the: upper 2 bytes of the devices MAC address, promiscuous flag, MDIO interface", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "15:0", name: "upper_mac_address", + desc: "Upper 16 bit of the devices MAC address" + resval: "8961" + }, + { bits: "16", name: "promiscuous", + desc: "promiscuous flag" + }, + { bits: "17", name: "phy_mdclk", + desc: "MDIO clock" + }, + { bits: "18", name: "phy_mdio_o", + desc: "MDIO output" + }, + { bits: "19", name: "phy_mdio_oe", + desc: "MDIO output enable" + } + ] + }, + { name: "CONFIG2", + desc: "The FCS TX status", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + { bits: "31:0", name: "tx_fcs_reg", + desc: "FCS TX status" + } + ] + }, + { name: "CONFIG3", + desc: "The FCS RX status", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + { bits: "31:0", name: "rx_fcs_reg", + desc: "FCS RX status" + } + ] + } + ] +} diff --git a/docs/um/ip/ethernet/data/eth_framing_regs_doc.hjson~ b/docs/um/ip/ethernet/data/eth_framing_regs_doc.hjson~ new file mode 100644 index 00000000..e4eadcf7 --- /dev/null +++ b/docs/um/ip/ethernet/data/eth_framing_regs_doc.hjson~ @@ -0,0 +1,75 @@ +// Unless specified otherwise in the respective file headers, all code checked into this repository is made available under a permissive license. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51, see LICENSE for details. +// +// Authors: + +{ + name: "eth_framing", + cip_id: "36", + version: "0.0.0", // null + clocking: [ + {clock: "clk_i", reset: "rst_int", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device"} + ] + regwidth: "32", + registers: [ + { name: "CONFIG0", + desc: "Configures the lower 4 bytes of the devices MAC address", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0", name: "lower_mac_address", + desc: "Lower 32 bit of the devices MAC address" + resval: "8980226" + } + ] + }, + { name: "CONFIG1", + desc: "Configures the: upper 2 bytes of the devices MAC address, promiscuous flag, MDIO interface", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "15:0", name: "upper_mac_address", + desc: "Upper 16 bit of the devices MAC address" + resval: "8961" + }, + { bits: "16", name: "promiscuous", + desc: "promiscuous flag" + }, + { bits: "17", name: "phy_mdclk", + desc: "MDIO clock" + }, + { bits: "18", name: "phy_mdio_o", + desc: "MDIO output" + }, + { bits: "19", name: "phy_mdio_oe", + desc: "MDIO output enable" + } + ] + }, + { name: "CONFIG2", + desc: "The FCS TX status", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + { bits: "31:0", name: "tx_fcs_reg", + desc: "FCS TX status" + } + ] + }, + { name: "CONFIG3", + desc: "The FCS RX status", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + { bits: "31:0", name: "rx_fcs_reg", + desc: "FCS RX status" + } + ] + } + ] +} diff --git a/docs/um/ip/ethernet/doc/registers.md b/docs/um/ip/ethernet/doc/registers.md new file mode 100644 index 00000000..e47d8063 --- /dev/null +++ b/docs/um/ip/ethernet/doc/registers.md @@ -0,0 +1,78 @@ +## Summary + +| Name | Offset | Length | Description | +|:----------------------------------|:---------|---------:|:-------------------------------------------------------------------------------------------| +| eth_framing.[`CONFIG0`](#config0) | 0x0 | 4 | Configures the lower 4 bytes of the devices MAC address | +| eth_framing.[`CONFIG1`](#config1) | 0x4 | 4 | Configures the: upper 2 bytes of the devices MAC address, promiscuous flag, MDIO interface | +| eth_framing.[`CONFIG2`](#config2) | 0x8 | 4 | The FCS TX status | +| eth_framing.[`CONFIG3`](#config3) | 0xc | 4 | The FCS RX status | + +## CONFIG0 +Configures the lower 4 bytes of the devices MAC address +- Offset: `0x0` +- Reset default: `0x890702` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "lower_mac_address", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:--------:|:------------------|:----------------------------------------| +| 31:0 | rw | 0x890702 | lower_mac_address | Lower 32 bit of the devices MAC address | + +## CONFIG1 +Configures the: upper 2 bytes of the devices MAC address, promiscuous flag, MDIO interface +- Offset: `0x4` +- Reset default: `0x2301` +- Reset mask: `0xfffff` + +### Fields + +```wavejson +{"reg": [{"name": "upper_mac_address", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "promiscuous", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "phy_mdclk", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "phy_mdio_o", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "phy_mdio_oe", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 12}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:----------------------------------------| +| 31:20 | | | | Reserved | +| 19 | rw | 0x0 | phy_mdio_oe | MDIO output enable | +| 18 | rw | 0x0 | phy_mdio_o | MDIO output | +| 17 | rw | 0x0 | phy_mdclk | MDIO clock | +| 16 | rw | 0x0 | promiscuous | promiscuous flag | +| 15:0 | rw | 0x2301 | upper_mac_address | Upper 16 bit of the devices MAC address | + +## CONFIG2 +The FCS TX status +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "tx_fcs_reg", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:0 | ro | 0x0 | tx_fcs_reg | FCS TX status | + +## CONFIG3 +The FCS RX status +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "rx_fcs_reg", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:0 | ro | 0x0 | rx_fcs_reg | FCS RX status | + diff --git a/docs/um/ip/gpio/data/gpio.hjson b/docs/um/ip/gpio/data/gpio.hjson new file mode 100644 index 00000000..01eed81d --- /dev/null +++ b/docs/um/ip/gpio/data/gpio.hjson @@ -0,0 +1,290 @@ + +// Copyright lowRISC contributors. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 +{ + name: "gpio", + clock_primary: "clk_i", + bus_interfaces: [ + { protocol: "reg_iface", direction: "device" } + ], + available_inout_list: [ + { name: "gpio", + width: 32, + desc: "GPIO inout to/from PAD" + } + ], + interrupt_list: [ + { name: "gpio", + width: 32, + desc: "raised if any of GPIO pin detects configured interrupt mode" + } + ], + alert_list: [ + { name: "fatal_fault", + desc: ''' + This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected. + ''' + } + ], + param_list: [ + { name: "GpioAsyncOn", + type: "bit", + default: "1'b1", + desc: ''' + Instantiates 2-flop synchronizers on all GPIO inputs if set to 1. + ''' + local: "false", + expose: "true" + }, + ] + + regwidth: "32", + registers: [ + { name: "DATA_IN", + desc: "GPIO Input data read value", + swaccess: "ro", + hwaccess: "hwo", + tags: [// data_in is ro register, so exclude its readback check + "excl:CsrNonInitTests:CsrExclWriteCheck"], + fields: [ + { bits: "31:0", + resval: "x" + } + ], + }, + { name: "DIRECT_OUT", + desc: "GPIO direct output data write value", + swaccess: "rw", + hwaccess: "hrw", + hwext: "true", + hwqe: "true", + fields: [ + { bits: "31:0" } + ], + }, + { name: "MASKED_OUT_LOWER", + desc: '''GPIO write data lower with mask. + + Masked write for DATA_OUT[15:0]. + + Upper 16 bits of this register are used as mask. Writing + lower 16 bits of the register changes DATA_OUT[15:0] value + if mask bits are set. + + Read-back of this register returns upper 16 bits as zero + and lower 16 bits as DATA_OUT[15:0]. + ''' + swaccess: "rw", + hwaccess: "hrw", + hwext: "true", + hwqe: "true", + tags: [// read value of masked_* registers yield a different value than written + // avoid writing to masked_out* registers as they affect direct_out value + "excl:CsrNonInitTests:CsrExclAll"], + fields: [ + { bits: "15:0", + name: "data", + desc: '''Write data value[15:0]. + + Value to write into DATA_OUT[i], valid in the presence of mask[i]==1 + ''' + }, + { bits: "31:16", + name: "mask", + desc: '''Write data mask[15:0]. + + A value of 1 in mask[i] allows the updating of DATA_OUT[i], 0 <= i <= 15 + ''' + swaccess: "wo" + }, + ], + }, + { name: "MASKED_OUT_UPPER", + desc: '''GPIO write data upper with mask. + + Masked write for DATA_OUT[31:16]. + + Upper 16 bits of this register are used as mask. Writing + lower 16 bits of the register changes DATA_OUT[31:16] value + if mask bits are set. + + Read-back of this register returns upper 16 bits as zero + and lower 16 bits as DATA_OUT[31:16]. + ''' + swaccess: "rw", + hwaccess: "hrw", + hwext: "true", + hwqe: "true", + tags: [// read value of masked_* registers yield a different value than written + // avoid writing to masked_out* registers as they affect direct_out value + "excl:CsrNonInitTests:CsrExclAll"], + fields: [ + { bits: "15:0", + name: "data", + desc: '''Write data value[31:16]. + + Value to write into DATA_OUT[i], valid in the presence of mask[i]==1 + ''' + }, + { bits: "31:16", + name: "mask", + desc: '''Write data mask[31:16]. + + A value of 1 in mask[i] allows the updating of DATA_OUT[i], 16 <= i <= 31 + ''' + swaccess: "wo" + }, + ], + }, + { name: "DIRECT_OE", + desc: '''GPIO Output Enable. + + Setting direct_oe[i] to 1 enables output mode for GPIO[i] + ''', + swaccess: "rw", + hwaccess: "hrw", + hwext: "true", + hwqe: "true", + fields: [ + { bits: "31:0", + } + ], + }, + { name: "MASKED_OE_LOWER", + desc: '''GPIO write Output Enable lower with mask. + + Masked write for DATA_OE[15:0], the register that controls + output mode for GPIO pins [15:0]. + + Upper 16 bits of this register are used as mask. Writing + lower 16 bits of the register changes DATA_OE[15:0] value + if mask bits are set. + + Read-back of this register returns upper 16 bits as zero + and lower 16 bits as DATA_OE[15:0]. + ''', + swaccess: "rw", + hwaccess: "hrw", + hwext: "true", + hwqe: "true", + tags: [// read value of masked_* registers yield a different value than written + // avoid writing to masked_oe* registers as they affect direct_oe value + "excl:CsrNonInitTests:CsrExclAll"], + fields: [ + { bits: "15:0", + name: "data", + desc: '''Write OE value[15:0]. + + Value to write into DATA_OE[i], valid in the presence of mask[i]==1 + ''', + }, + { name: "mask", + desc: '''Write OE mask[15:0]. + + A value of 1 in mask[i] allows the updating of DATA_OE[i], 0 <= i <= 15 + ''', + bits: "31:16" + }, + ], + }, + { name: "MASKED_OE_UPPER", + desc: '''GPIO write Output Enable upper with mask. + + Masked write for DATA_OE[31:16], the register that controls + output mode for GPIO pins [31:16]. + + Upper 16 bits of this register are used as mask. Writing + lower 16 bits of the register changes DATA_OE[31:16] value + if mask bits are set. + + Read-back of this register returns upper 16 bits as zero + and lower 16 bits as DATA_OE[31:16]. + ''', + swaccess: "rw", + hwaccess: "hrw", + hwext: "true", + hwqe: "true", + tags: [// read value of masked_* registers yield a different value than written + // avoid writing to masked_oe* registers as they affect direct_oe value + "excl:CsrNonInitTests:CsrExclAll"], + fields: [ + { bits: "15:0", + name: "data", + desc: '''Write OE value[31:16]. + + Value to write into DATA_OE[i], valid in the presence of mask[i]==1 + ''', + }, + { name: "mask", + desc: '''Write OE mask[31:16]. + + A value of 1 in mask[i] allows the updating of DATA_OE[i], 16 <= i <= 31 + ''', + bits: "31:16" + }, + ], + }, + + { name: "INTR_CTRL_EN_RISING", + desc: '''GPIO interrupt enable for GPIO, rising edge. + + If !!INTR_ENABLE[i] is true, a value of 1 on !!INTR_CTRL_EN_RISING[i] + enables rising-edge interrupt detection on GPIO[i]. + ''', + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0" } + ], + }, + { name: "INTR_CTRL_EN_FALLING", + desc: '''GPIO interrupt enable for GPIO, falling edge. + + If !!INTR_ENABLE[i] is true, a value of 1 on !!INTR_CTRL_EN_FALLING[i] + enables falling-edge interrupt detection on GPIO[i]. + ''', + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0" } + ], + }, + { name: "INTR_CTRL_EN_LVLHIGH", + desc: '''GPIO interrupt enable for GPIO, level high. + + If !!INTR_ENABLE[i] is true, a value of 1 on !!INTR_CTRL_EN_LVLHIGH[i] + enables level high interrupt detection on GPIO[i]. + ''', + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0" } + ], + }, + { name: "INTR_CTRL_EN_LVLLOW", + desc: '''GPIO interrupt enable for GPIO, level low. + + If !!INTR_ENABLE[i] is true, a value of 1 on !!INTR_CTRL_EN_LVLLOW[i] + enables level low interrupt detection on GPIO[i]. + ''', + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0" } + ], + }, + { name: "CTRL_EN_INPUT_FILTER", + desc: '''filter enable for GPIO input bits. + + If !!CTRL_EN_INPUT_FILTER[i] is true, a value of input bit [i] + must be stable for 16 cycles before transitioning. + ''', + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0" } + ], + }, + ], +} diff --git a/docs/um/ip/gpio/data/gpio_doc.hjson b/docs/um/ip/gpio/data/gpio_doc.hjson new file mode 100644 index 00000000..623fbc23 --- /dev/null +++ b/docs/um/ip/gpio/data/gpio_doc.hjson @@ -0,0 +1,294 @@ + +// Copyright lowRISC contributors. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 +{ + name: "gpio", + cip_id: "36", + version: "0.0.0", // used in opentitan_peripheral repo from pulp platform + clocking: [ + {clock: "clk_i", reset: "rst_ni", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device" } + ], + available_inout_list: [ + { name: "gpio", + width: 32, + desc: "GPIO inout to/from PAD" + } + ], + interrupt_list: [ + { name: "gpio", + width: 32, + desc: "raised if any of GPIO pin detects configured interrupt mode" + } + ], + alert_list: [ + { name: "fatal_fault", + desc: ''' + This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected. + ''' + } + ], + param_list: [ + { name: "GpioAsyncOn", + type: "bit", + default: "1'b1", + desc: ''' + Instantiates 2-flop synchronizers on all GPIO inputs if set to 1. + ''' + local: "false", + expose: "true" + }, + ] + + regwidth: "32", + registers: [ + { name: "DATA_IN", + desc: "GPIO Input data read value", + swaccess: "ro", + hwaccess: "hwo", + tags: [// data_in is ro register, so exclude its readback check + "excl:CsrNonInitTests:CsrExclWriteCheck"], + fields: [ + { bits: "31:0", + resval: "x" + } + ], + }, + { name: "DIRECT_OUT", + desc: "GPIO direct output data write value", + swaccess: "rw", + hwaccess: "hrw", + hwext: "true", + hwqe: "true", + fields: [ + { bits: "31:0" } + ], + }, + { name: "MASKED_OUT_LOWER", + desc: '''GPIO write data lower with mask. + + Masked write for DATA_OUT[15:0]. + + Upper 16 bits of this register are used as mask. Writing + lower 16 bits of the register changes DATA_OUT[15:0] value + if mask bits are set. + + Read-back of this register returns upper 16 bits as zero + and lower 16 bits as DATA_OUT[15:0]. + ''' + swaccess: "rw", + hwaccess: "hrw", + hwext: "true", + hwqe: "true", + tags: [// read value of masked_* registers yield a different value than written + // avoid writing to masked_out* registers as they affect direct_out value + "excl:CsrNonInitTests:CsrExclAll"], + fields: [ + { bits: "15:0", + name: "data", + desc: '''Write data value[15:0]. + + Value to write into DATA_OUT[i], valid in the presence of mask[i]==1 + ''' + }, + { bits: "31:16", + name: "mask", + desc: '''Write data mask[15:0]. + + A value of 1 in mask[i] allows the updating of DATA_OUT[i], 0 <= i <= 15 + ''' + swaccess: "wo" + }, + ], + }, + { name: "MASKED_OUT_UPPER", + desc: '''GPIO write data upper with mask. + + Masked write for DATA_OUT[31:16]. + + Upper 16 bits of this register are used as mask. Writing + lower 16 bits of the register changes DATA_OUT[31:16] value + if mask bits are set. + + Read-back of this register returns upper 16 bits as zero + and lower 16 bits as DATA_OUT[31:16]. + ''' + swaccess: "rw", + hwaccess: "hrw", + hwext: "true", + hwqe: "true", + tags: [// read value of masked_* registers yield a different value than written + // avoid writing to masked_out* registers as they affect direct_out value + "excl:CsrNonInitTests:CsrExclAll"], + fields: [ + { bits: "15:0", + name: "data", + desc: '''Write data value[31:16]. + + Value to write into DATA_OUT[i], valid in the presence of mask[i]==1 + ''' + }, + { bits: "31:16", + name: "mask", + desc: '''Write data mask[31:16]. + + A value of 1 in mask[i] allows the updating of DATA_OUT[i], 16 <= i <= 31 + ''' + swaccess: "wo" + }, + ], + }, + { name: "DIRECT_OE", + desc: '''GPIO Output Enable. + + Setting direct_oe[i] to 1 enables output mode for GPIO[i] + ''', + swaccess: "rw", + hwaccess: "hrw", + hwext: "true", + hwqe: "true", + fields: [ + { bits: "31:0", + } + ], + }, + { name: "MASKED_OE_LOWER", + desc: '''GPIO write Output Enable lower with mask. + + Masked write for DATA_OE[15:0], the register that controls + output mode for GPIO pins [15:0]. + + Upper 16 bits of this register are used as mask. Writing + lower 16 bits of the register changes DATA_OE[15:0] value + if mask bits are set. + + Read-back of this register returns upper 16 bits as zero + and lower 16 bits as DATA_OE[15:0]. + ''', + swaccess: "rw", + hwaccess: "hrw", + hwext: "true", + hwqe: "true", + tags: [// read value of masked_* registers yield a different value than written + // avoid writing to masked_oe* registers as they affect direct_oe value + "excl:CsrNonInitTests:CsrExclAll"], + fields: [ + { bits: "15:0", + name: "data", + desc: '''Write OE value[15:0]. + + Value to write into DATA_OE[i], valid in the presence of mask[i]==1 + ''', + }, + { name: "mask", + desc: '''Write OE mask[15:0]. + + A value of 1 in mask[i] allows the updating of DATA_OE[i], 0 <= i <= 15 + ''', + bits: "31:16" + }, + ], + }, + { name: "MASKED_OE_UPPER", + desc: '''GPIO write Output Enable upper with mask. + + Masked write for DATA_OE[31:16], the register that controls + output mode for GPIO pins [31:16]. + + Upper 16 bits of this register are used as mask. Writing + lower 16 bits of the register changes DATA_OE[31:16] value + if mask bits are set. + + Read-back of this register returns upper 16 bits as zero + and lower 16 bits as DATA_OE[31:16]. + ''', + swaccess: "rw", + hwaccess: "hrw", + hwext: "true", + hwqe: "true", + tags: [// read value of masked_* registers yield a different value than written + // avoid writing to masked_oe* registers as they affect direct_oe value + "excl:CsrNonInitTests:CsrExclAll"], + fields: [ + { bits: "15:0", + name: "data", + desc: '''Write OE value[31:16]. + + Value to write into DATA_OE[i], valid in the presence of mask[i]==1 + ''', + }, + { name: "mask", + desc: '''Write OE mask[31:16]. + + A value of 1 in mask[i] allows the updating of DATA_OE[i], 16 <= i <= 31 + ''', + bits: "31:16" + }, + ], + }, + + { name: "INTR_CTRL_EN_RISING", + desc: '''GPIO interrupt enable for GPIO, rising edge. + + If !!INTR_ENABLE[i] is true, a value of 1 on !!INTR_CTRL_EN_RISING[i] + enables rising-edge interrupt detection on GPIO[i]. + ''', + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0" } + ], + }, + { name: "INTR_CTRL_EN_FALLING", + desc: '''GPIO interrupt enable for GPIO, falling edge. + + If !!INTR_ENABLE[i] is true, a value of 1 on !!INTR_CTRL_EN_FALLING[i] + enables falling-edge interrupt detection on GPIO[i]. + ''', + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0" } + ], + }, + { name: "INTR_CTRL_EN_LVLHIGH", + desc: '''GPIO interrupt enable for GPIO, level high. + + If !!INTR_ENABLE[i] is true, a value of 1 on !!INTR_CTRL_EN_LVLHIGH[i] + enables level high interrupt detection on GPIO[i]. + ''', + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0" } + ], + }, + { name: "INTR_CTRL_EN_LVLLOW", + desc: '''GPIO interrupt enable for GPIO, level low. + + If !!INTR_ENABLE[i] is true, a value of 1 on !!INTR_CTRL_EN_LVLLOW[i] + enables level low interrupt detection on GPIO[i]. + ''', + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0" } + ], + }, + { name: "CTRL_EN_INPUT_FILTER", + desc: '''filter enable for GPIO input bits. + + If !!CTRL_EN_INPUT_FILTER[i] is true, a value of input bit [i] + must be stable for 16 cycles before transitioning. + ''', + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0" } + ], + }, + ], +} diff --git a/docs/um/ip/gpio/doc/registers.md b/docs/um/ip/gpio/doc/registers.md new file mode 100644 index 00000000..3d590b06 --- /dev/null +++ b/docs/um/ip/gpio/doc/registers.md @@ -0,0 +1,337 @@ +## Summary + +| Name | Offset | Length | Description | +|:-----------------------------------------------------|:---------|---------:|:----------------------------------------------| +| gpio.[`INTR_STATE`](#intr_state) | 0x0 | 4 | Interrupt State Register | +| gpio.[`INTR_ENABLE`](#intr_enable) | 0x4 | 4 | Interrupt Enable Register | +| gpio.[`INTR_TEST`](#intr_test) | 0x8 | 4 | Interrupt Test Register | +| gpio.[`ALERT_TEST`](#alert_test) | 0xc | 4 | Alert Test Register | +| gpio.[`DATA_IN`](#data_in) | 0x10 | 4 | GPIO Input data read value | +| gpio.[`DIRECT_OUT`](#direct_out) | 0x14 | 4 | GPIO direct output data write value | +| gpio.[`MASKED_OUT_LOWER`](#masked_out_lower) | 0x18 | 4 | GPIO write data lower with mask. | +| gpio.[`MASKED_OUT_UPPER`](#masked_out_upper) | 0x1c | 4 | GPIO write data upper with mask. | +| gpio.[`DIRECT_OE`](#direct_oe) | 0x20 | 4 | GPIO Output Enable. | +| gpio.[`MASKED_OE_LOWER`](#masked_oe_lower) | 0x24 | 4 | GPIO write Output Enable lower with mask. | +| gpio.[`MASKED_OE_UPPER`](#masked_oe_upper) | 0x28 | 4 | GPIO write Output Enable upper with mask. | +| gpio.[`INTR_CTRL_EN_RISING`](#intr_ctrl_en_rising) | 0x2c | 4 | GPIO interrupt enable for GPIO, rising edge. | +| gpio.[`INTR_CTRL_EN_FALLING`](#intr_ctrl_en_falling) | 0x30 | 4 | GPIO interrupt enable for GPIO, falling edge. | +| gpio.[`INTR_CTRL_EN_LVLHIGH`](#intr_ctrl_en_lvlhigh) | 0x34 | 4 | GPIO interrupt enable for GPIO, level high. | +| gpio.[`INTR_CTRL_EN_LVLLOW`](#intr_ctrl_en_lvllow) | 0x38 | 4 | GPIO interrupt enable for GPIO, level low. | +| gpio.[`CTRL_EN_INPUT_FILTER`](#ctrl_en_input_filter) | 0x3c | 4 | filter enable for GPIO input bits. | + +## INTR_STATE +Interrupt State Register +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "gpio", "bits": 32, "attr": ["rw1c"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------| +| 31:0 | rw1c | 0x0 | gpio | raised if any of GPIO pin detects configured interrupt mode | + +## INTR_ENABLE +Interrupt Enable Register +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "gpio", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------| +| 31:0 | rw | 0x0 | gpio | Enable interrupt when corresponding bit in [`INTR_STATE.gpio`](#intr_state) is set. | + +## INTR_TEST +Interrupt Test Register +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "gpio", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------| +| 31:0 | wo | 0x0 | gpio | Write 1 to force corresponding bit in [`INTR_STATE.gpio`](#intr_state) to 1. | + +## ALERT_TEST +Alert Test Register +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "fatal_fault", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:-------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | fatal_fault | Write 1 to trigger one alert event of this kind. | + +## DATA_IN +GPIO Input data read value +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "DATA_IN", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------| +| 31:0 | ro | x | DATA_IN | | + +## DIRECT_OUT +GPIO direct output data write value +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "DIRECT_OUT", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:0 | rw | x | DIRECT_OUT | | + +## MASKED_OUT_LOWER +GPIO write data lower with mask. + +Masked write for DATA_OUT[15:0]. + +Upper 16 bits of this register are used as mask. Writing +lower 16 bits of the register changes DATA_OUT[15:0] value +if mask bits are set. + +Read-back of this register returns upper 16 bits as zero +and lower 16 bits as DATA_OUT[15:0]. +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "data", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "mask", "bits": 16, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------| +| 31:16 | wo | x | mask | Write data mask[15:0]. A value of 1 in mask[i] allows the updating of DATA_OUT[i], 0 <= i <= 15 | +| 15:0 | rw | x | data | Write data value[15:0]. Value to write into DATA_OUT[i], valid in the presence of mask[i]==1 | + +## MASKED_OUT_UPPER +GPIO write data upper with mask. + +Masked write for DATA_OUT[31:16]. + +Upper 16 bits of this register are used as mask. Writing +lower 16 bits of the register changes DATA_OUT[31:16] value +if mask bits are set. + +Read-back of this register returns upper 16 bits as zero +and lower 16 bits as DATA_OUT[31:16]. +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "data", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "mask", "bits": 16, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------------------| +| 31:16 | wo | x | mask | Write data mask[31:16]. A value of 1 in mask[i] allows the updating of DATA_OUT[i], 16 <= i <= 31 | +| 15:0 | rw | x | data | Write data value[31:16]. Value to write into DATA_OUT[i], valid in the presence of mask[i]==1 | + +## DIRECT_OE +GPIO Output Enable. + +Setting direct_oe[i] to 1 enables output mode for GPIO[i] +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "DIRECT_OE", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:--------------| +| 31:0 | rw | x | DIRECT_OE | | + +## MASKED_OE_LOWER +GPIO write Output Enable lower with mask. + +Masked write for DATA_OE[15:0], the register that controls +output mode for GPIO pins [15:0]. + +Upper 16 bits of this register are used as mask. Writing +lower 16 bits of the register changes DATA_OE[15:0] value +if mask bits are set. + +Read-back of this register returns upper 16 bits as zero +and lower 16 bits as DATA_OE[15:0]. +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "data", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "mask", "bits": 16, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------| +| 31:16 | rw | x | mask | Write OE mask[15:0]. A value of 1 in mask[i] allows the updating of DATA_OE[i], 0 <= i <= 15 | +| 15:0 | rw | x | data | Write OE value[15:0]. Value to write into DATA_OE[i], valid in the presence of mask[i]==1 | + +## MASKED_OE_UPPER +GPIO write Output Enable upper with mask. + +Masked write for DATA_OE[31:16], the register that controls +output mode for GPIO pins [31:16]. + +Upper 16 bits of this register are used as mask. Writing +lower 16 bits of the register changes DATA_OE[31:16] value +if mask bits are set. + +Read-back of this register returns upper 16 bits as zero +and lower 16 bits as DATA_OE[31:16]. +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "data", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "mask", "bits": 16, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------------------------| +| 31:16 | rw | x | mask | Write OE mask[31:16]. A value of 1 in mask[i] allows the updating of DATA_OE[i], 16 <= i <= 31 | +| 15:0 | rw | x | data | Write OE value[31:16]. Value to write into DATA_OE[i], valid in the presence of mask[i]==1 | + +## INTR_CTRL_EN_RISING +GPIO interrupt enable for GPIO, rising edge. + +If [`INTR_ENABLE`](#intr_enable)[i] is true, a value of 1 on [`INTR_CTRL_EN_RISING`](#intr_ctrl_en_rising)[i] +enables rising-edge interrupt detection on GPIO[i]. +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "INTR_CTRL_EN_RISING", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------|:--------------| +| 31:0 | rw | 0x0 | INTR_CTRL_EN_RISING | | + +## INTR_CTRL_EN_FALLING +GPIO interrupt enable for GPIO, falling edge. + +If [`INTR_ENABLE`](#intr_enable)[i] is true, a value of 1 on [`INTR_CTRL_EN_FALLING`](#intr_ctrl_en_falling)[i] +enables falling-edge interrupt detection on GPIO[i]. +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "INTR_CTRL_EN_FALLING", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:0 | rw | 0x0 | INTR_CTRL_EN_FALLING | | + +## INTR_CTRL_EN_LVLHIGH +GPIO interrupt enable for GPIO, level high. + +If [`INTR_ENABLE`](#intr_enable)[i] is true, a value of 1 on [`INTR_CTRL_EN_LVLHIGH`](#intr_ctrl_en_lvlhigh)[i] +enables level high interrupt detection on GPIO[i]. +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "INTR_CTRL_EN_LVLHIGH", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:0 | rw | 0x0 | INTR_CTRL_EN_LVLHIGH | | + +## INTR_CTRL_EN_LVLLOW +GPIO interrupt enable for GPIO, level low. + +If [`INTR_ENABLE`](#intr_enable)[i] is true, a value of 1 on [`INTR_CTRL_EN_LVLLOW`](#intr_ctrl_en_lvllow)[i] +enables level low interrupt detection on GPIO[i]. +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "INTR_CTRL_EN_LVLLOW", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------|:--------------| +| 31:0 | rw | 0x0 | INTR_CTRL_EN_LVLLOW | | + +## CTRL_EN_INPUT_FILTER +filter enable for GPIO input bits. + +If [`CTRL_EN_INPUT_FILTER`](#ctrl_en_input_filter)[i] is true, a value of input bit [i] +must be stable for 16 cycles before transitioning. +- Offset: `0x3c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CTRL_EN_INPUT_FILTER", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:0 | rw | 0x0 | CTRL_EN_INPUT_FILTER | | + diff --git a/docs/um/ip/hyperbus/data/hyperbus.hjson b/docs/um/ip/hyperbus/data/hyperbus.hjson new file mode 100644 index 00000000..40fe5e6b --- /dev/null +++ b/docs/um/ip/hyperbus/data/hyperbus.hjson @@ -0,0 +1,273 @@ +// Copyright 2020 ETH Zurich and University of Bologna. +// Licensed under the Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 + +// Part of the PULP platform project: https://pulp-platform.org +// This file defines the register map for the HyperBus memory interface. + +// Register layout of hyperbus + +{ + name: "hyperbus" + human_name: "HyperBus Controller" + one_line_desc: "HyperBus controller for interfacing with HyperRAM/Flash devices", + one_paragraph_desc: '''The HyperBus controller IP provides a flexible and programmable interface for communicating with external HyperRAM and HyperFlash memory devices. It supports AXI access, fine-grained + clock and delay configuration, and physical interface control to meet timing closure and integration requirements. + ''' + cip_id: "36", + version: "0.0.0", //null + + clocking: [ + { clock: "clk_i", reset: "rst_ni", primary: true }, + { clock: "clk_sys_i", reset: "rst_sys_ni" }, + { clock: "clk_phy_i", reset: "rst_phy_ni" } + ], + + bus_interfaces: [ + { protocol: "tlul", direction: "device" } + ], + + regwidth: "32", + registers: [ + { + name: "T_LATENCY_ACCESS" + desc: "Initial latency" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "3:0" + name: "T_LATENCY_ACCESS" + resval: 0x6 + desc: "Initial latency" + } + ] + }, + { + name: "EN_LATENCY_ADDITIONAL" + desc: "Force 2x Latency count" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "0:0" + name: "EN_LATENCY_ADDITIONAL" + resval: 0x0 + desc: "Force 2x Latency count" + } + ] + }, + { + name: "T_BURST_MAX" + desc: "Max burst Length between two memory refresh" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "T_BURST_MAX" + resval: 0x15E + desc: "Max burst Length between two memory refresh" + } + ] + }, + { + name: "T_READ_WRITE_RECOVERY" + desc: "Idle time between transactions" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "3:0" + name: "T_READ_WRITE_RECOVERY" + resval: 0x6 + desc: "Idle time between transactions" + } + ] + }, + { + name: "T_RX_CLOCK_DELAY" + desc: "RX Delay Line" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "3:0" + name: "T_RX_CLOCK_DELAY" + resval: 0x8 + desc: "RX Delay Line" + } + ] + }, + { + name: "T_TX_CLOCK_DELAY" + desc: "TX Delay Line" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "3:0" + name: "T_TX_CLOCK_DELAY" + resval: 0x8 + desc: "TX Delay Line" + } + ] + }, + { + name: "ADDRESS_MASK_MSB" + desc: "Address Mask MSB" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "18:0" + name: "ADDRESS_MASK_MSB" + resval: 0x19 + desc: "Address Mask MSB" + } + ] + }, + { + name: "ADDRESS_SPACE" + desc: "L2 sleep configuration register" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "0:0" + name: "ADDRESS_SPACE" + resval: 0x0 + desc: "L2 sleep configuration register" + } + ] + }, + { + name: "PHYS_IN_USE" + desc: "Number of PHYs on use" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "0:0" + name: "PHYS_IN_USE" + resval: 0x1 + desc: '''Number of PHYs on use: + - 1'b0: Uses 1 PHY + - 1'b1: Uses 2 PHYs + ''' + } + ] + }, + { + name: "WHICH_PHY" + desc: "PHY used in single PHY mode" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "0:0" + name: "WHICH_PHY" + resval: 0x1 + desc: '''PHY used in single PHY mode: + - 1'b0: PHY 0 is used + - 1'b1: PHY 1 is used + ''' + } + ] + }, + { + name: "CS0_BASE" + desc: "CS0 Base address range" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "31:0" + name: "CS0_BASE" + resval: 0x80000000 + desc: "CS0 Base address range" + } + ] + }, + { + name: "CS0_END" + desc: "CS0 End address range" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "31:0" + name: "CS0_END" + resval: 0x81000000 + desc: "CS0 End address range" + } + ] + }, + { + name: "CS1_BASE" + desc: "CS1 Base address range" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "31:0" + name: "CS1_BASE" + resval: 0x81000000 + desc: "CS1 Base address range" + } + ] + }, + { + name: "CS1_END" + desc: "CS1 End address range" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "31:0" + name: "CS1_END" + resval: 0x82000000 + desc: "CS1 End address range" + } + ] + }, + { + name: "CS2_BASE" + desc: "CS2 Base address range" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "31:0" + name: "CS2_BASE" + resval: 0x82000000 + desc: "CS2 Base address range" + } + ] + }, + { + name: "CS2_END" + desc: "CS2 End address range" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "31:0" + name: "CS2_END" + resval: 0x83000000 + desc: "CS2 End address range" + } + ] + }, + { + name: "CS3_BASE" + desc: "CS3 Base address range" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "31:0" + name: "CS3_BASE" + resval: 0x83000000 + desc: "CS3 Base address range" + } + ] + }, + { + name: "CS3_END" + desc: "CS3 End address range" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "31:0" + name: "CS3_END" + resval: 0x84000000 + desc: "CS3 End address range" + } + ] + } + ] +} diff --git a/docs/um/ip/hyperbus/data/hyperbus.hjson~ b/docs/um/ip/hyperbus/data/hyperbus.hjson~ new file mode 100644 index 00000000..4bf4982e --- /dev/null +++ b/docs/um/ip/hyperbus/data/hyperbus.hjson~ @@ -0,0 +1,273 @@ +// Copyright 2020 ETH Zurich and University of Bologna. +// Licensed under the Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 + +// Part of the PULP platform project: https://pulp-platform.org +// This file defines the register map for the HyperBus memory interface. + +// Register layout of hyperbus + +{ + name: "hyperbus" + human_name: "HyperBus Controller" + one_line_desc: "HyperBus controller for interfacing with HyperRAM/Flash devices", + one_paragraph_desc: '''The HyperBus controller IP provides a flexible and programmable interface for communicating with external HyperRAM and HyperFlash memory devices. It supports AXI access, fine-grained + clock and delay configuration, and physical interface control to meet timing closure and integration requirements. + ''' + cip_id: "36", + version: "0.0.0", //null + + clocking: [ + { clock: "clk_i", reset: "rst_ni", primary: true }, + { clock: "clk_sys_i", reset: "rst_sys_ni" }, + { clock: "clk_phy_i", reset: "rst_phy_ni" } + ], + + bus_interfaces: [ + { protocol: "tlul", direction: "device" } + ], + + regwidth: "32", + registers: [ + { + name: "T_LATENCY_ACCESS" + desc: "Initial latency" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "0:3" + name: "T_LATENCY_ACCESS" + resval: 0x6 + desc: "Initial latency" + } + ] + }, + { + name: "EN_LATENCY_ADDITIONAL" + desc: "Force 2x Latency count" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "0:0" + name: "EN_LATENCY_ADDITIONAL" + resval: 0x0 + desc: "Force 2x Latency count" + } + ] + }, + { + name: "T_BURST_MAX" + desc: "Max burst Length between two memory refresh" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "0:15" + name: "T_BURST_MAX" + resval: 0x15E + desc: "Max burst Length between two memory refresh" + } + ] + }, + { + name: "T_READ_WRITE_RECOVERY" + desc: "Idle time between transactions" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "0:3" + name: "T_READ_WRITE_RECOVERY" + resval: 0x6 + desc: "Idle time between transactions" + } + ] + }, + { + name: "T_RX_CLOCK_DELAY" + desc: "RX Delay Line" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "0:3" + name: "T_RX_CLOCK_DELAY" + resval: 0x8 + desc: "RX Delay Line" + } + ] + }, + { + name: "T_TX_CLOCK_DELAY" + desc: "TX Delay Line" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "0:3" + name: "T_TX_CLOCK_DELAY" + resval: 0x8 + desc: "TX Delay Line" + } + ] + }, + { + name: "ADDRESS_MASK_MSB" + desc: "Address Mask MSB" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "0:18" + name: "ADDRESS_MASK_MSB" + resval: 0x19 + desc: "Address Mask MSB" + } + ] + }, + { + name: "ADDRESS_SPACE" + desc: "L2 sleep configuration register" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "0:0" + name: "ADDRESS_SPACE" + resval: 0x0 + desc: "L2 sleep configuration register" + } + ] + }, + { + name: "PHYS_IN_USE" + desc: "Number of PHYs on use" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "0:0" + name: "PHYS_IN_USE" + resval: 0x1 + desc: '''Number of PHYs on use: + - 1'b0: Uses 1 PHY + - 1'b1: Uses 2 PHYs + ''' + } + ] + }, + { + name: "WHICH_PHY" + desc: "PHY used in single PHY mode" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "0:0" + name: "WHICH_PHY" + resval: 0x1 + desc: '''PHY used in single PHY mode: + - 1'b0: PHY 0 is used + - 1'b1: PHY 1 is used + ''' + } + ] + }, + { + name: "CS0_BASE" + desc: "CS0 Base address range" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "0:31" + name: "CS0_BASE" + resval: 0x80000000 + desc: "CS0 Base address range" + } + ] + }, + { + name: "CS0_END" + desc: "CS0 End address range" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "0:31" + name: "CS0_END" + resval: 0x81000000 + desc: "CS0 End address range" + } + ] + }, + { + name: "CS1_BASE" + desc: "CS1 Base address range" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "0:31" + name: "CS1_BASE" + resval: 0x81000000 + desc: "CS1 Base address range" + } + ] + }, + { + name: "CS1_END" + desc: "CS1 End address range" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "0:31" + name: "CS1_END" + resval: 0x82000000 + desc: "CS1 End address range" + } + ] + }, + { + name: "CS2_BASE" + desc: "CS2 Base address range" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "0:31" + name: "CS2_BASE" + resval: 0x82000000 + desc: "CS2 Base address range" + } + ] + }, + { + name: "CS2_END" + desc: "CS2 End address range" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "0:31" + name: "CS2_END" + resval: 0x83000000 + desc: "CS2 End address range" + } + ] + }, + { + name: "CS3_BASE" + desc: "CS3 Base address range" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "0:31" + name: "CS3_BASE" + resval: 0x83000000 + desc: "CS3 Base address range" + } + ] + }, + { + name: "CS3_END" + desc: "CS3 End address range" + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "0:31" + name: "CS3_END" + resval: 0x84000000 + desc: "CS3 End address range" + } + ] + } + ] +} diff --git a/docs/um/ip/hyperbus/doc/registers.md b/docs/um/ip/hyperbus/doc/registers.md new file mode 100644 index 00000000..56d265d0 --- /dev/null +++ b/docs/um/ip/hyperbus/doc/registers.md @@ -0,0 +1,321 @@ +## Summary + +| Name | Offset | Length | Description | +|:-----------------------------------------------------------|:---------|---------:|:--------------------------------------------| +| hyperbus.[`T_LATENCY_ACCESS`](#t_latency_access) | 0x0 | 4 | Initial latency | +| hyperbus.[`EN_LATENCY_ADDITIONAL`](#en_latency_additional) | 0x4 | 4 | Force 2x Latency count | +| hyperbus.[`T_BURST_MAX`](#t_burst_max) | 0x8 | 4 | Max burst Length between two memory refresh | +| hyperbus.[`T_READ_WRITE_RECOVERY`](#t_read_write_recovery) | 0xc | 4 | Idle time between transactions | +| hyperbus.[`T_RX_CLOCK_DELAY`](#t_rx_clock_delay) | 0x10 | 4 | RX Delay Line | +| hyperbus.[`T_TX_CLOCK_DELAY`](#t_tx_clock_delay) | 0x14 | 4 | TX Delay Line | +| hyperbus.[`ADDRESS_MASK_MSB`](#address_mask_msb) | 0x18 | 4 | Address Mask MSB | +| hyperbus.[`ADDRESS_SPACE`](#address_space) | 0x1c | 4 | L2 sleep configuration register | +| hyperbus.[`PHYS_IN_USE`](#phys_in_use) | 0x20 | 4 | Number of PHYs on use | +| hyperbus.[`WHICH_PHY`](#which_phy) | 0x24 | 4 | PHY used in single PHY mode | +| hyperbus.[`CS0_BASE`](#cs0_base) | 0x28 | 4 | CS0 Base address range | +| hyperbus.[`CS0_END`](#cs0_end) | 0x2c | 4 | CS0 End address range | +| hyperbus.[`CS1_BASE`](#cs1_base) | 0x30 | 4 | CS1 Base address range | +| hyperbus.[`CS1_END`](#cs1_end) | 0x34 | 4 | CS1 End address range | +| hyperbus.[`CS2_BASE`](#cs2_base) | 0x38 | 4 | CS2 Base address range | +| hyperbus.[`CS2_END`](#cs2_end) | 0x3c | 4 | CS2 End address range | +| hyperbus.[`CS3_BASE`](#cs3_base) | 0x40 | 4 | CS3 Base address range | +| hyperbus.[`CS3_END`](#cs3_end) | 0x44 | 4 | CS3 End address range | + +## T_LATENCY_ACCESS +Initial latency +- Offset: `0x0` +- Reset default: `0x6` +- Reset mask: `0xf` + +### Fields + +```wavejson +{"reg": [{"name": "T_LATENCY_ACCESS", "bits": 4, "attr": ["rw"], "rotate": -90}, {"bits": 28}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:----------------| +| 31:4 | | | | Reserved | +| 3:0 | rw | 0x6 | T_LATENCY_ACCESS | Initial latency | + +## EN_LATENCY_ADDITIONAL +Force 2x Latency count +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "EN_LATENCY_ADDITIONAL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:-----------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | EN_LATENCY_ADDITIONAL | Force 2x Latency count | + +## T_BURST_MAX +Max burst Length between two memory refresh +- Offset: `0x8` +- Reset default: `0x15e` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "T_BURST_MAX", "bits": 16, "attr": ["rw"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:--------------------------------------------| +| 31:16 | | | | Reserved | +| 15:0 | rw | 0x15e | T_BURST_MAX | Max burst Length between two memory refresh | + +## T_READ_WRITE_RECOVERY +Idle time between transactions +- Offset: `0xc` +- Reset default: `0x6` +- Reset mask: `0xf` + +### Fields + +```wavejson +{"reg": [{"name": "T_READ_WRITE_RECOVERY", "bits": 4, "attr": ["rw"], "rotate": -90}, {"bits": 28}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:-------------------------------| +| 31:4 | | | | Reserved | +| 3:0 | rw | 0x6 | T_READ_WRITE_RECOVERY | Idle time between transactions | + +## T_RX_CLOCK_DELAY +RX Delay Line +- Offset: `0x10` +- Reset default: `0x8` +- Reset mask: `0xf` + +### Fields + +```wavejson +{"reg": [{"name": "T_RX_CLOCK_DELAY", "bits": 4, "attr": ["rw"], "rotate": -90}, {"bits": 28}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:4 | | | | Reserved | +| 3:0 | rw | 0x8 | T_RX_CLOCK_DELAY | RX Delay Line | + +## T_TX_CLOCK_DELAY +TX Delay Line +- Offset: `0x14` +- Reset default: `0x8` +- Reset mask: `0xf` + +### Fields + +```wavejson +{"reg": [{"name": "T_TX_CLOCK_DELAY", "bits": 4, "attr": ["rw"], "rotate": -90}, {"bits": 28}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:4 | | | | Reserved | +| 3:0 | rw | 0x8 | T_TX_CLOCK_DELAY | TX Delay Line | + +## ADDRESS_MASK_MSB +Address Mask MSB +- Offset: `0x18` +- Reset default: `0x19` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "ADDRESS_MASK_MSB", "bits": 19, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:-----------------| +| 31:19 | | | | Reserved | +| 18:0 | rw | 0x19 | ADDRESS_MASK_MSB | Address Mask MSB | + +## ADDRESS_SPACE +L2 sleep configuration register +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "ADDRESS_SPACE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 150}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:--------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | ADDRESS_SPACE | L2 sleep configuration register | + +## PHYS_IN_USE +Number of PHYs on use +- Offset: `0x20` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PHYS_IN_USE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:--------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | PHYS_IN_USE | Number of PHYs on use: - 1'b0: Uses 1 PHY - 1'b1: Uses 2 PHYs | + +## WHICH_PHY +PHY used in single PHY mode +- Offset: `0x24` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "WHICH_PHY", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | WHICH_PHY | PHY used in single PHY mode: - 1'b0: PHY 0 is used - 1'b1: PHY 1 is used | + +## CS0_BASE +CS0 Base address range +- Offset: `0x28` +- Reset default: `0x80000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CS0_BASE", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:---------|:-----------------------| +| 31:0 | rw | 0x80000000 | CS0_BASE | CS0 Base address range | + +## CS0_END +CS0 End address range +- Offset: `0x2c` +- Reset default: `0x81000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CS0_END", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:--------|:----------------------| +| 31:0 | rw | 0x81000000 | CS0_END | CS0 End address range | + +## CS1_BASE +CS1 Base address range +- Offset: `0x30` +- Reset default: `0x81000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CS1_BASE", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:---------|:-----------------------| +| 31:0 | rw | 0x81000000 | CS1_BASE | CS1 Base address range | + +## CS1_END +CS1 End address range +- Offset: `0x34` +- Reset default: `0x82000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CS1_END", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:--------|:----------------------| +| 31:0 | rw | 0x82000000 | CS1_END | CS1 End address range | + +## CS2_BASE +CS2 Base address range +- Offset: `0x38` +- Reset default: `0x82000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CS2_BASE", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:---------|:-----------------------| +| 31:0 | rw | 0x82000000 | CS2_BASE | CS2 Base address range | + +## CS2_END +CS2 End address range +- Offset: `0x3c` +- Reset default: `0x83000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CS2_END", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:--------|:----------------------| +| 31:0 | rw | 0x83000000 | CS2_END | CS2 End address range | + +## CS3_BASE +CS3 Base address range +- Offset: `0x40` +- Reset default: `0x83000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CS3_BASE", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:---------|:-----------------------| +| 31:0 | rw | 0x83000000 | CS3_BASE | CS3 Base address range | + +## CS3_END +CS3 End address range +- Offset: `0x44` +- Reset default: `0x84000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CS3_END", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:--------|:----------------------| +| 31:0 | rw | 0x84000000 | CS3_END | CS3 End address range | + diff --git a/docs/um/ip/i2c/data/i2c_ot.hjson b/docs/um/ip/i2c/data/i2c_ot.hjson new file mode 100644 index 00000000..a7c2f542 --- /dev/null +++ b/docs/um/ip/i2c/data/i2c_ot.hjson @@ -0,0 +1,1138 @@ +// Copyright lowRISC contributors (OpenTitan project). +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 + +{ + name: "i2c", + human_name: "I2C Interface", + one_line_desc: "I2C interface for host and device mode, supporting up to 1 Mbaud data rates", + one_paragraph_desc: ''' + I2C Interface implements the I2C serial communication protocol. + It can be configured in host (master) or device (slave) mode and supports standard data rate (100 kbaud), fast data rate (400 kbaud), and fast plus data rate (1 Mbaud). + In addition to supporting all mandatory I2C features, this block supports clock stretching in host mode and automatic clock stretching in device mode. + I2C Interface uses a 7-bit address space and is compatible with any device covered by I2C specification operating at speeds up to 1 Mbaud. + ''' + // Unique comportable IP identifier defined under KNOWN_CIP_IDS in the regtool. + cip_id: "11", + design_spec: "../doc", + dv_doc: "../doc/dv", + hw_checklist: "../doc/checklist", + sw_checklist: "/sw/device/lib/dif/dif_i2c", + revisions: [ + { + version: "2.1.0", + life_stage: "L1", + design_stage: "D2S", + verification_stage: "V2S", + dif_stage: "S2", + notes: "Verification Stage is V2S qualified by the given exceptions in PR#22108. This broadly excludes verif. of multi-controller features." + } + ] + clocking: [{clock: "clk_i", reset: "rst_ni"}], + bus_interfaces: [ + { protocol: "tlul", direction: "device", racl_support: true } + ], + // INPUT pins + available_inout_list: [ + { name: "sda", desc: "Serial input data bit" } + { name: "scl", desc: "Serial input clock bit" } + ] + // INTERRUPT pins + interrupt_list: [ + { name: "fmt_threshold" + desc: "host mode interrupt: asserted whilst the FMT FIFO level is below the low threshold. This is a level status interrupt." + type: "status" + } + { name: "rx_threshold" + desc: "host mode interrupt: asserted whilst the RX FIFO level is above the high threshold. This is a level status interrupt." + type: "status" + } + { name: "acq_threshold" + desc: "target mode interrupt: asserted whilst the ACQ FIFO level is above the high threshold. This is a level status interrupt." + type: "status" + } + { name: "rx_overflow" + desc: "host mode interrupt: raised if the RX FIFO has overflowed." + } + { name: "controller_halt" + desc: ''' + host mode interrupt: raised if the controller FSM is halted, such as on an unexpected NACK or lost arbitration. + Check !!CONTROLLER_EVENTS for the reason. + The interrupt will be released when the bits in !!CONTROLLER_EVENTS are cleared. + ''' + type: "status" + } + { name: "scl_interference" + desc: "host mode interrupt: raised if the SCL line drops early (not supported without clock synchronization)." + } + { name: "sda_interference" + desc: "host mode interrupt: raised if the SDA line goes low when host is trying to assert high" + } + { name: "stretch_timeout" + desc: "host mode interrupt: raised if target stretches the clock beyond the allowed timeout period" + } + { name: "sda_unstable" + desc: "host mode interrupt: raised if the target does not assert a constant value of SDA during transmission." + } + { name: "cmd_complete" + desc: ''' + host and target mode interrupt. + In host mode, raised if the host issues a repeated START or terminates the transaction by issuing STOP. + In target mode, raised if the external host issues a STOP or repeated START. + ''' + } + { name: "tx_stretch" + desc: "target mode interrupt: raised if the target is stretching clocks for a read command. This is a level status interrupt." + type: "status" + } + { name: "tx_threshold" + desc: "target mode interrupt: asserted whilst the TX FIFO level is below the low threshold. This is a level status interrupt." + type: "status" + } + { name: "acq_stretch" + desc: "target mode interrupt: raised if the target is stretching clocks due to full ACQ FIFO or zero count in !!TARGET_ACK_CTRL.NBYTES (if enabled). This is a level status interrupt." + type: "status" + } + { name: "unexp_stop" + desc: "target mode interrupt: raised if STOP is received without a preceding NACK during an external host read." + } + { name: "host_timeout" + desc: "target mode interrupt: raised if the host stops sending the clock during an ongoing transaction." + } + ], + alert_list: [ + { name: "fatal_fault", + desc: ''' + This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected. + ''' + } + ], + inter_signal_list: [ + // RAM configuration + { struct: "ram_1p_cfg" + package: "prim_ram_1p_pkg" + type: "uni" + name: "ram_cfg" + act: "rcv" + } + { struct: "ram_1p_cfg_rsp" + package: "prim_ram_1p_pkg" + type: "uni" + name: "ram_cfg_rsp" + act: "req" + } + { struct: "logic" + type: "uni" + name: "lsio_trigger" + desc: ''' + Self-clearing status trigger for the DMA. + Set when RX TX FIFO is past their configured watermark matching watermark interrupt behaviour. + ''' + act: "req" + } + { struct: "racl_policy_vec", + type: "uni", + name: "racl_policies", + act: "rcv", + package: "top_racl_pkg", + desc: ''' + Incoming RACL policy vector from a racl_ctrl instance. + The policy selection vector (parameter) selects the policy for each register. + ''' + } + { struct: "racl_error_log", + type: "uni", + name: "racl_error", + act: "req", + width: "1" + package: "top_racl_pkg", + desc: ''' + RACL error log information of this module. + ''' + } + ] + param_list: [ + { name: "FifoDepth", + desc: ''' + Depth of FMT, RX, and TX FIFOs. + The maximum supported value is 2^12-1, although much lower values are recommended to keep area requirements reasonable. + ''', + type: "int", + default: "64", + } + { name: "AcqFifoDepth", + desc: ''' + Depth of ACQ FIFO. + The maximum supported value is 2^12-1, although much lower values are recommended to keep area requirements reasonable. + ''', + type: int + default: "268", + } + { name: "InputDelayCycles", + type: "int", + default: "0", + desc: ''' + Maximum number of cycles of propagation delay between a change on the cio_scl_en_o or cio_sda_en_o pins and sensing the new values on the corresponding input pins, not including the rise/fall times. + For the purposes of this calculation, an input delay of 0 cycles means an output pin changing at the beginning of clock edge N will be sampled and observed on the input pins at clock edge N+1. + ''' + local: "false", + expose: "true" + } + ], + features: [ + { name: "I2C.MODE.HOST", + desc: ''' + The I2C block can be configued in host mode. + ''' + }, + { name: "I2C.MODE.TARGET", + desc: ''' + The I2C block can be configured in target mode. + ''' + }, + { name: "I2C.MODE.ACKCONTROL", + desc: ''' + The I2C Target module can be configured to support N-byte ACK Control Mode. + With ACK Control Mode off, software provides no protocol-level control of deciding whether to ACK or NACK bytes. + With ACK Control Mode on, software may choose whether to ACK Write data bytes. + Software may program the Target module to ACK up to N bytes without software intervention. + The configuration resets to 0 for the next transfer. + ''' + }, + { name: "I2C.SPEED.STANDARD", + desc: ''' + Standard-mode of 100 kbaud is supported. + ''' + }, + { name: "I2C.SPEED.FAST", + desc: ''' + Fast-mode of 400 kbaud is supported. + ''' + }, + { name: "I2C.SPEED.FASTPLUS", + desc: ''' + Fast-mode Plus of 1 Mbaud is supported. + ''' + }, + { name: "I2C.OVERRIDE", + desc: ''' + Software can override the values of SCL and SDA. + ''' + }, + { name: "I2C.OPERATION.READ", + desc: ''' + Hosts can read from targets. + ''' + }, + { name: "I2C.OPERATION.WRITE", + desc: ''' + Hosts can write to targets. + ''' + }, + { name: "I2C.PROTOCOL.CLOCKSTRETCHING", + desc: ''' + Clock stretching is a way for a target to buy time. + There are three scenarios when clock stretching occurs: + - After an address read. + - During a write. + - During a read. + ''' + }, + { name: "I2C.PROTOCOL.NACK", + desc: ''' + Whenever a byte is sent, it must be accompanied by an acknowledgement (ack), unless NAKOK is high. + When no ack is received, this is a nack. + ''' + }, + { name: "I2C.PROTOCOL.REPEATEDSTART", + desc: ''' + Instead of doing a stop and then a start to start the next transaction, a host can choose to perform a repeated start to begin a new transaction without stopping the previous one. + ''' + }, + ], + countermeasures: [ + { name: "BUS.INTEGRITY", + desc: "End-to-end bus integrity scheme." + } + ] + + // REGISTER definition + regwidth: "32" + registers: [ + // CTRL register + { name: "CTRL" + desc: "I2C Control Register" + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "0" + resval: "0" + name: "ENABLEHOST" + desc: ''' + Enable Host I2C functionality + ''' + } + { bits: "1" + resval: "0" + name: "ENABLETARGET" + desc: ''' + Enable Target I2C functionality + ''' + } + { bits: "2" + resval: "0" + name: "LLPBK" + desc: ''' + Enable I2C line loopback test + If line loopback is enabled, the internal design sees ACQ and RX data as "1" + ''' + tags: [// Exclude from write-checks: writing 1'b1 to this bit causes interrupts unexpectedly asserted + "excl:CsrAllTests:CsrExclWrite"] + } + { bits: "3" + resval: "0" + name: "NACK_ADDR_AFTER_TIMEOUT" + desc: ''' + Enable NACKing the address on a stretch timeout. + + This is a Target mode feature. + If enabled (1), a stretch timeout will cause the device to NACK the address byte. + If disabled (0), a stretch timeout will cause the device to ACK the address byte. + SMBus requires that devices always ACK their address, even for read commands. + However, non-SMBus protocols may have a different approach and can choose to NACK instead. + + Note that both cases handle data bytes the same way. + For writes, the Target module will NACK all subsequent data bytes until it receives a Stop. + For reads, the Target module will release SDA, causing 0xff to be returned for all data bytes until it receives a Stop. + ''' + } + { bits: "4" + resval: "0" + name: "ACK_CTRL_EN" + desc: ''' + Enable I2C Target ACK Control Mode. + + ACK Control Mode works together with !!TARGET_ACK_CTRL.NBYTES to allow software to control upper-layer protocol (N)ACKing (e.g. as in SMBus). + This bit enables the mode when 1, and !!TARGET_ACK_CTRL.NBYTES limits how many bytes may be automatically ACK'd while the ACQ FIFO has space. + If it is 0, the decision to ACK or NACK is made only from stretching timeouts and !!CTRL.NACK_ADDR_AFTER_TIMEOUT. + ''' + } + { bits: "5" + resval: "0" + name: "MULTI_CONTROLLER_MONITOR_EN" + desc: ''' + Enable the bus monitor in multi-controller mode. + + If a 0->1 transition happens while !!CTRL.ENABLEHOST and !!CTRL.ENABLETARGET are both 0, the bus monitor will enable and begin in the "bus busy" state. + To transition to a bus free state, !!HOST_TIMEOUT_CTRL must be nonzero, so the bus monitor may count out idle cycles to confirm the freedom to transmit. + In addition, the bus monitor will track whether the bus is free based on the enabled timeouts and detected Stop symbols. + For multi-controller mode, ensure !!CTRL.MULTI_CONTROLLER_MONITOR_EN becomes 1 no later than !!CTRL.ENABLEHOST or !!CTRL.ENABLETARGET. + This bit can be set at the same time as either or both of the other two, though. + + Note that if !!CTRL.MULTI_CONTROLLER_MONITOR_EN is set after !!CTRL.ENABLEHOST or !!CTRL.ENABLETARGET, the bus monitor will begin in the "bus free" state instead. + This would violate the proper protocol for a controller to join a multi-controller environment. + However, if this controller is known to be the first to join, this ordering will enable skipping the idle wait. + + When 0, the bus monitor will report that the bus is always free, so the controller FSM is never blocked from transmitting. + ''' + } + { bits: "6" + resval: "0" + name: "TX_STRETCH_CTRL_EN" + desc: ''' + If set to 1, this bit causes a read transfer addressed to this target to set the corresponding bit in !!TARGET_EVENTS. + + While !!TARGET_EVENTS.TX_PENDING is 1, subsequent read transactions will stretch the clock, even if there is data in the TX FIFO. + + If enabled, this function allows software to confirm the data in the TX FIFO should be released for the current read. + This may be useful for cases where the TX FIFO has data that does not apply to the current transfer. + For example, the transaction could've targeted an alternate function via another address. + ''' + } + ] + } + { name: "STATUS" + desc: "I2C Live Status Register for Host and Target modes" + swaccess: "ro" + hwaccess: "hwo" + hwext: "true" + fields: [ + { bits: "0" + name: "FMTFULL" + desc: "Host mode FMT FIFO is full" + } + { bits: "1" + name: "RXFULL" + desc: "Host mode RX FIFO is full" + } + { bits: "2" + name: "FMTEMPTY" + desc: "Host mode FMT FIFO is empty" + resval: "1" + } + { bits: "5" + name: "RXEMPTY" + desc: "Host mode RX FIFO is empty" + resval: "1" + } + { bits: "3" + name: "HOSTIDLE" + desc: "Host functionality is idle. No Host transaction is in progress" + resval: "1" + } + { bits: "4" + name: "TARGETIDLE" + desc: "Target functionality is idle. No Target transaction is in progress" + resval: "1" + } + { bits: "6" + name: "TXFULL" + desc: "Target mode TX FIFO is full" + } + { bits: "7" + name: "ACQFULL" + desc: "Target mode receive FIFO is full" + } + { bits: "8" + name: "TXEMPTY" + desc: "Target mode TX FIFO is empty" + resval: "1" + } + { bits: "9" + name: "ACQEMPTY" + desc: "Target mode receive FIFO is empty" + resval: "1" + } + { bits: "10" + name: "ACK_CTRL_STRETCH" + desc: "Target mode stretching at (N)ACK phase due to zero count in !!TARGET_ACK_CTRL.NBYTES" + } + ] + tags: [// Updated by the hw. Exclude from write-checks. + "excl:CsrNonInitTests:CsrExclWriteCheck"] + } + { name: "RDATA" + desc: "I2C Read Data" + swaccess: "ro" + hwaccess: "hrw" + hwext: "true" + hwre: "true" + fields: [ + {bits: "7:0"} + ] + tags: [// Updated by the hw. Exclude from init and write-checks. + "excl:CsrAllTests:CsrExclCheck"] + } + { name: "FDATA" + desc: '''I2C Host Format Data + + Writes to this register are used to define and drive Controller-Mode transactions. + ''' + swaccess: "wo" + hwaccess: "hro" + hwqe: "true" + fields: [ + { bits: "7:0" + name: "FBYTE" + desc: '''Format Byte. + + If no flags are set, hardware will transmit this byte directly. + + If READB is set, this field becomes the number of bytes hardware will automatically + read from the bus. + ''' + } + { bits: "8" + name: "START" + desc: "Issue a START condition before transmitting FBYTE." + } + { bits: "9" + name: "STOP" + desc: "Issue a STOP condition after transmitting FBYTE." + } + { bits: "10" + name: "READB" + desc: '''Transfer Direction Indicator. + + If unset, this write to FDATA defines a controller-transmitter operation (WRITE). + A single byte of data (FBYTE) is written to the bus. + + If set, this write to FDATA defines a controller-receiver operation (READ). + The value of FBYTE defines the number of bytes read from the bus. (256 if FBYTE==0)" + After this number of bytes are read, the final byte will be NACKed to end the transfer + unless RCONT is also set. + ''' + } + { bits: "11" + name: "RCONT" + desc: "Do not NACK the last byte read, let the read operation continue." + } + { bits: "12" + name: "NAKOK" + desc: ''' + For the currrent controller-transmitter byte (WRITE), do not halt via CONTROLLER_EVENTS + or assert the 'controller_halt' interrupt if the current byte is not ACK'd. + ''' + } + ] + tags: [// FIFO can fill up due to write check accesses, and then fail an assertion upon timeout on full. + "excl:CsrNonInitTests:CsrExclWriteCheck"] + } + { name: "FIFO_CTRL" + desc: "I2C FIFO control register" + swaccess: "rw" + hwaccess: "hro" + hwqe: "true" + fields: [ + { bits: "0" + swaccess: "wo" + name: "RXRST" + desc: "RX fifo reset. Write 1 to the register resets RX_FIFO. Read returns 0" + } + { bits: "1" + swaccess: "wo" + name: "FMTRST" + desc: "FMT fifo reset. Write 1 to the register resets FMT_FIFO. Read returns 0" + } + { bits: "7" + swaccess: "wo" + name: "ACQRST" + desc: "ACQ FIFO reset. Write 1 to the register resets it. Read returns 0" + } + { bits: "8" + swaccess: "wo" + name: "TXRST" + desc: "TX FIFO reset. Write 1 to the register resets it. Read returns 0" + } + ] + } + { + name: "HOST_FIFO_CONFIG" + desc: "Host mode FIFO configuration" + swaccess: "rw" + hwaccess: "hro" + hwqe: "true" + fields: [ + { bits: "11:0" + name: "RX_THRESH" + desc: '''Threshold level for RX interrupts. Whilst the level of data in the RX FIFO + is above this setting, the rx_threshold interrupt will be asserted. + ''' + resval: "0" + } + { bits: "27:16" + name: "FMT_THRESH" + desc: '''Threshold level for FMT interrupts. Whilst the number of used entries in the + FMT FIFO is below this setting, the fmt_threshold interrupt will be asserted. + ''' + resval: "0" + } + ] + } + { + name: "TARGET_FIFO_CONFIG" + desc: "Target mode FIFO configuration" + swaccess: "rw" + hwaccess: "hro" + hwqe: "true" + fields: [ + { bits: "11:0" + name: "TX_THRESH" + desc: '''Threshold level for TX interrupts. Whilst the number of used entries in the + TX FIFO is below this setting, the tx_threshold interrupt will be asserted. + ''' + resval: "0" + } + { bits: "27:16" + name: "ACQ_THRESH" + desc: '''Threshold level for ACQ interrupts. Whilst the level of data in the ACQ FIFO + is above this setting, the acq_threshold interrupt will be asserted. + ''' + resval: "0" + } + ] + } + { name: "HOST_FIFO_STATUS" + desc: "Host mode FIFO status register" + swaccess: "ro" + hwaccess: "hwo" + hwext: "true" + fields: [ + { bits: "11:0" + name: "FMTLVL" + desc: "Current fill level of FMT fifo" + } + { bits: "27:16" + name: "RXLVL" + desc: "Current fill level of RX fifo" + } + ] + tags: [// Updated by the hw. Exclude from write-checks. + "excl:CsrNonInitTests:CsrExclWriteCheck"] + } + { name: "TARGET_FIFO_STATUS" + desc: "Target mode FIFO status register" + swaccess: "ro" + hwaccess: "hwo" + hwext: "true" + fields: [ + { bits: "11:0" + name: "TXLVL" + desc: "Current fill level of TX fifo" + } + { bits: "27:16" + name: "ACQLVL" + desc: "Current fill level of ACQ fifo" + } + ] + tags: [// Updated by the hw. Exclude from write-checks. + "excl:CsrNonInitTests:CsrExclWriteCheck"] + } + { name: "OVRD" + desc: "I2C Override Control Register" + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "0", + name: "TXOVRDEN", + desc: "Override the SDA and SCL TX signals." + } + { bits: "1", + name: "SCLVAL", + desc: "Value for SCL Override. Set to 0 to drive TX Low, and set to 1 for high-Z" + } + { bits: "2", + name: "SDAVAL", + desc: "Value for SDA Override. Set to 0 to drive TX Low, and set to 1 for high-Z" + } + ] + tags: [// Overriding can cause sda/scl_interference interrupts to trigger continously. + // These then become unclearable interrupts at the end of csr_tests (clear_all_interrupts() fails). + "excl:CsrRwTest:CsrExclWriteCheck"] + } + { name: "VAL" + desc: "Oversampled RX values" + swaccess: "ro" + hwaccess: "hwo" + hwext: "true" + fields: [ + { bits: "15:0" + name: "SCL_RX" + desc: ''' + Last 16 oversampled values of SCL. Most recent bit is bit 0, oldest 15. + ''' + } + { bits: "31:16" + name: "SDA_RX" + desc: ''' + Last 16 oversampled values of SDA. Most recent bit is bit 16, oldest 31. + ''' + } + ] + tags: [// Affected by IO pins - exclude from init and write checks. + "excl:CsrAllTests:CsrExclCheck"] + } + + { name: "TIMING0" + desc: ''' + Detailed I2C Timings (directly corresponding to table 10 in the I2C Specification). + All values are expressed in units of the input clock period. + These must be greater than 2 in order for the change in SCL to propagate to the input of the FSM so that acknowledgements are detected correctly. + ''' + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "12:0" + name: "THIGH" + desc: ''' + The actual time to hold SCL high in a given pulse. + This field is sized to have a range of at least Standard Mode's 4.0 us max with a core clock at 1 GHz. + ''' + } + { bits: "28:16" + name: "TLOW" + desc: ''' + The actual time to hold SCL low between any two SCL pulses. + This field is sized to have a range of at least Standard Mode's 4.7 us max with a core clock at 1 GHz. + ''' + } + ] + } + { name: "TIMING1", + desc: ''' + Detailed I2C Timings (directly corresponding to table 10 in the I2C Specification). + All values are expressed in units of the input clock period. + ''' + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "9:0" + name: "T_R" + desc: ''' + The nominal rise time to anticipate for the bus (depends on capacitance). + This field is sized to have a range of at least Standard Mode's 1000 ns max with a core clock at 1 GHz. + ''' + } + { bits: "24:16" + name: "T_F" + desc: ''' + The nominal fall time to anticipate for the bus (influences SDA hold times). + This field is sized to have a range of at least Standard Mode's 300 ns max with a core clock at 1 GHz. + ''' + } + ] + } + { name: "TIMING2" + desc: ''' + Detailed I2C Timings (directly corresponding to table 10 in the I2C Specification). + All values are expressed in units of the input clock period. + ''' + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "12:0" + name: "TSU_STA" + desc: ''' + Actual setup time for repeated start signals. + This field is sized to have a range of at least Standard Mode's 4.7 us max with a core clock at 1 GHz. + ''' + } + { bits: "28:16" + name: "THD_STA" + desc: ''' + Actual hold time for start signals. + This field is sized to have a range of at least Standard Mode's 4.0 us max with a core clock at 1 GHz. + ''' + } + ] + } + { name: "TIMING3" + desc: ''' + Detailed I2C Timings (directly corresponding to table 10, in the I2C Specification). + All values are expressed in units of the input clock period. + ''' + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "8:0" + name: "TSU_DAT" + desc: ''' + Actual setup time for data (or ack) bits. + This field is sized to have a range of at least Standard Mode's 250 ns max with a core clock at 1 GHz. + ''' + } + { bits: "28:16" + name: "THD_DAT" + desc: ''' + Actual hold time for data (or ack) bits. + (Note, where required, the parameters TVD_DAT is taken to be THD_DAT+T_F) + This field is sized to have a range that accommodates Standard Mode's 3.45 us max for TVD_DAT with a core clock at 1 GHz. + However, this field is generally expected to represent a time substantially shorter than that. + It should be long enough to cover the maximum round-trip latency from output pins, through pads and voltage transitions on the board, and back to the input pins, but it should not be substantially greater. + ''' + } + ] + } + { name: "TIMING4" + desc: ''' + Detailed I2C Timings (directly corresponding to table 10, in the I2C Specification). + All values are expressed in units of the input clock period. + ''' + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "12:0" + name: "TSU_STO" + desc: ''' + Actual setup time for stop signals. + This field is sized to have a range of at least Standard Mode's 4.0 us max with a core clock at 1 GHz. + ''' + } + { bits: "28:16" + name: "T_BUF" + desc: ''' + Actual time between each STOP signal and the following START signal. + This field is sized to have a range of at least Standard Mode's 4.7 us max with a core clock at 1 GHz. + ''' + } + ] + } + { name: "TIMEOUT_CTRL" + desc: ''' + I2C clock stretching and bus timeout control. + + This timeout must be enabled by setting !!TIMEOUT_CTRL.EN to 1, and the behavior of this feature depends on the value of !!TIMEOUT_CTRL.MODE. + + If the mode is "STRETCH_TIMEOUT", this is used in I2C controller mode to detect whether a connected target is stretching a single low time beyond the timeout value. + Configured as such, this timeout is more informative and doesn't do more than assert the "stretch_timeout" interrupt. + + If the mode is "BUS_TIMEOUT", it is used to detect whether the clock has been held low for too long instead, inclusive of the controller's clock low time. + This is useful for an SMBus context, where the VAL programmed should be tTIMEOUT:MIN. + ''' + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "29:0" + name: "VAL" + desc: "Clock stretching timeout value (in units of input clock frequency)" + } + { bits: "30" + name: "MODE" + desc: ''' + Selects the timeout mode, between a stretch timeout and a bus timeout. + + Between the two modes, the primary difference is how much of the clock low period is counted. + For a stretch timeout, only the time that another device holds the clock low will be counted. + For a bus timeout, the entire clock low time is counted, consistent with the SMBus tTIMEOUT type. + + !!TIMEOUT_CTRL.EN must be 1 for either of these features to be enabled. + ''' + enum: [ + { value: "0", + name: "STRETCH_TIMEOUT", + desc: ''' + The timeout is a target stretch timeout. + The counter will track how long the clock has been stretched by another device while the controller is active. + ''' + }, + { value: "1", + name: "BUS_TIMEOUT", + desc: ''' + The timeout is a clock low timeout. + The counter will track how long the clock low period is, inclusive of the controller's ordinary low count. + A timeout will set !!CONTROLLER_EVENTS.BUS_TIMEOUT and cause a "controller_halt" interrupt. + ''' + }, + ], + } + { bits: "31" + name: "EN" + desc: "Enable stretch timeout or bus timeout feature" + } + ] + } + { name: "TARGET_ID" + desc: "I2C target address and mask pairs" + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "6:0" + name: "ADDRESS0" + desc: "I2C target address number 0" + } + { bits: "13:7" + name: "MASK0" + desc: ''' + I2C target mask number 0. + At least one bit in MASK0 must be set to 1 for ADDRESS0 to be used. + ''' + } + { bits: "20:14" + name: "ADDRESS1" + desc: "I2C target address number 1" + } + { bits: "27:21" + name: "MASK1" + desc: ''' + I2C target mask number 1. + At least one bit in MASK1 must be set to 1 for ADDRESS1 to be used. + ''' + } + ] + } + { name: "ACQDATA" + desc: "I2C target acquired data" + swaccess: "ro" + hwaccess: "hrw" + hwext: "true" + hwre: "true" + fields: [ + { bits: "7:0" + name: "ABYTE" + desc: "Address for accepted transaction or acquired byte" + } + { bits: "10:8" + name: "SIGNAL" + desc: ''' + Indicates any control symbols associated with the ABYTE. + + For the STOP symbol, a stretch timeout or other unexpected events will cause a NACK_STOP to appear in the ACQ FIFO. + If the ACQ FIFO doesn't have enough space to record a START and a STOP, the transaction will be dropped entirely on a stretch timeout. + In that case, the START byte will not appear (neither as START nor NACK_START), but a standalone NACK_STOP may, if there was space. + Software can discard any standalone NACK_STOP that appears. + + See the associated values for more information about the contents. + ''' + enum: [ + { value: "0", + name: "NONE", + desc: "ABYTE contains an ordinary data byte that was received and ACK'd." + }, + { value: "1", + name: "START", + desc: ''' + A START condition preceded the ABYTE to start a new transaction. + ABYTE contains the 7-bit I2C address plus R/W command bit in the order received on the bus, MSB first. + ''' + }, + { value: "2", + name: "STOP", + desc: ''' + A STOP condition was received for a transaction including a transfer that addressed this Target. + No transfers addressing this Target in that transaction were NACK'd. + ABYTE contains no data. + ''' + }, + { value: "3", + name: "RESTART", + desc: ''' + A repeated START condition preceded the ABYTE, extending the current transaction with a new transfer. + ABYTE contains the 7-bit I2C address plus R/W command bit in the order received on the bus, MSB first. + ''' + }, + { value: "4", + name: "NACK", + desc: '''ABYTE contains an ordinary data byte that was received and NACK'd.''' + }, + { value: "5", + name: "NACK_START", + desc: ''' + A START condition preceded the ABYTE (including repeated START) that was part of a NACK'd transfer. + The ABYTE contains the matching I2C address and command bit. + The ABYTE was ACK'd, but the rest of the transaction was NACK'ed. + ''' + }, + { value: "6", + name: "NACK_STOP", + desc: ''' + A transaction including a transfer that addressed this Target was ended, but the transaction ended abnormally and/or the transfer was NACK'd. + The end can be due to a STOP condition or unexpected events, such as a bus timeout (if enabled). + ABYTE contains no data. + + NACKing can occur for multiple reasons, including a stretch timeout, a SW-directed NACK, or lost arbitration. + This signal is a bucket for all these error-type terminations. + ''' + }, + ] + } + ] + tags: [// Updated by the hw. Exclude from init and write-checks. + // Without actual I2C traffic, read from this FIFO returns Xs. + "excl:CsrAllTests:CsrExclCheck"] + } + { name: "TXDATA" + desc: "I2C target transmit data" + swaccess: "wo" + hwaccess: "hro" + hwqe: "true" + fields: [ + { bits: "7:0" } + ] + tags: [// FIFO can fill up due to write check accesses, and then fail an assertion upon timeout on full. + "excl:CsrNonInitTests:CsrExclWriteCheck"] + } + { name: "HOST_TIMEOUT_CTRL" + desc: ''' + I2C host clock generation timeout value (in units of input clock frequency). + + In an active transaction in Target-Mode, if the Controller ceases to send SCL pulses + for this number of cycles then the "host_timeout" interrupt will be asserted. + + In multi-controller monitoring mode, !!HOST_TIMEOUT_CTRL is required to be nonzero to transition out of the initial busy state. + Set this CSR to 0 to disable this behaviour. + ''' + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "19:0" } + ] + } + { name: "TARGET_TIMEOUT_CTRL" + desc: ''' + I2C target internal stretching timeout control. + When the target has stretched beyond this time it will send a NACK for incoming data bytes or release SDA for outgoing data bytes. + The behavior for the address byte is configurable via !!CTRL.ACK_ADDR_AFTER_TIMEOUT. + Note that the count accumulates stretching time over the course of a transaction. + In other words, this is equivalent to the SMBus cumulative target clock extension time. + ''' + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "30:0" + name: "VAL" + desc: "Clock stretching timeout value (in units of input clock frequency)" + } + { bits: "31" + name: "EN" + desc: "Enable timeout feature and send NACK once the timeout has been reached" + } + ] + } + { name: "TARGET_NACK_COUNT" + desc: ''' + Number of times the I2C target has NACK'ed a new transaction since the last read of this register. + Reading this register clears it. + This is useful because when the ACQ FIFO is full the software know that a NACK has occurred, but without this register would not know how many transactions it missed. + When it reaches its maximum value it will stay at that value. + ''' + swaccess: "rc" + hwaccess: "hrw" + fields: [ + { bits: "7:0" } + ] + } + { name: "TARGET_ACK_CTRL" + desc: "Controls for mid-transfer (N)ACK phase handling" + swaccess: "rw" + hwaccess: "hrw" + hwqe: true + hwext: true + fields: [ + { bits: "8:0" + name: "NBYTES" + desc: ''' + Remaining number of bytes the Target module may ACK automatically. + + If !!CTRL.ACK_CTRL_EN is set to 1, the Target module will stretch the clock at the (N)ACK phase of a byte if this CSR is 0, awaiting software's instructions. + + At the beginning of each Write transfer, this byte count is reset to 0. + Writes to this CSR also are only accepted while the Target module is stretching the clock. + The Target module will always ACK its address if the ACQ FIFO has space. + For data bytes afterwards, it will stop at the (N)ACK phase and stretch the clock when this CSR is 0. + For each data byte that is ACK'd in a transaction, the byte count will decrease by 1. + + Note that a full ACQ FIFO can still cause the Target module to halt at the beginning of a new byte. + The ACK Control Mode provides an additional synchronization point, during the (N)ACK phase instead of after. + For both cases, !!TARGET_TIMEOUT_CTRL applies, and stretching past the timeout will produce an automatic NACK. + + This mode can be used to implement the mid-transfer (N)ACK responses required by various SMBus protocols. + ''' + tags: [// Writes only succeed in a specific stretching state. Exclude from write-checks. + "excl:CsrNonInitTests:CsrExclWriteCheck"] + } + { bits: "31" + name: "NACK" + swaccess: "wo" + hwaccess: "hro" + desc: ''' + When the Target module stretches on the (N)ACK phase of a Write due to !!TARGET_ACK_CTRL.NBYTES being 0, writing a 1 here will cause it to send a NACK. + + If software chooses to NACK, note that the NACKing behavior is the same as if a stretch timeout occurred. + The rest of the transaction will be NACK'd, including subsequent transfers. + For the address byte, the (N)ACK phase of subsequent transfers will follow the behavior specified by !!CTRL.NACK_ADDR_AFTER_TIMEOUT. + + Automatically clears to 0. + ''' + } + ] + } + { name: "ACQ_FIFO_NEXT_DATA" + desc: ''' + The data byte pending to be written to the ACQ FIFO. + + This CSR is only valid while the Target module is stretching in the (N)ACK phase, indicated by !!STATUS.ACK_CTRL_STRETCH . + It is intended to be used with ACK Control Mode, so software may check the current byte. + ''' + swaccess: "ro" + hwaccess: "hwo" + hwext: true + fields: [ + { bits: "7:0" } + ] + tags: [// Updated by the hw. Exclude from init and write-checks. + // Without actual I2C traffic, read from this CSR returns Xs. + "excl:CsrAllTests:CsrExclCheck"] + } + { name: "HOST_NACK_HANDLER_TIMEOUT" + desc: ''' + Timeout in Host-Mode for an unhandled NACK before hardware automatically ends the transaction. + (in units of input clock frequency) + + If an active Controller-Transmitter transfer receives a NACK from the Target, the !!CONTROLLER_EVENTS.NACK bit is set. + In turn, this causes the Controller FSM to halt awaiting software intervention, and the 'controller_halt' interrupt may assert. + Software must clear the !!CONTROLLER_EVENTS.NACK bit to allow the state machine to continue, typically after clearing out the FMTFIFO to start a new transfer. + While halted, the active transaction is not ended (no STOP (P) condition is created), and the block asserts SCL and leaves SDA released. + + This timeout can be used to automatically produce a STOP condition, whether as a backstop for slow software responses (longer timeout) or as a convenience (short timeout). + If the timeout expires, the Controller FSM will issue a STOP (P) condition on the bus to end the active transaction. + Additionally, the !!CONTROLLER_EVENTS.UNHANDLED_NACK_TIMEOUT bit is set to alert software, and the FSM will return to the idle state and halt until the bit is cleared. + + The enable bit must be set for this feature to operate. + ''' + swaccess: "rw" + hwaccess: "hro" + fields: [ + { bits: "30:0" + name: "VAL" + desc: "Unhandled NAK timeout value (in units of input clock frequency)" + } + { bits: "31" + name: "EN" + desc: "Timeout enable" + } + ] + } + { name: "CONTROLLER_EVENTS" + desc: ''' + Latched events that explain why the controller halted. + + Any bits that are set must be written (with a 1) to clear the CONTROLLER_HALT interrupt. + ''' + swaccess: "rw1c" + hwaccess: "hrw" + fields: [ + { bits: "0" + name: "NACK" + desc: "Received an unexpected NACK" + } + { bits: "1" + name: "UNHANDLED_NACK_TIMEOUT" + desc: "A Host-Mode active transaction has been ended by the !!HOST_NACK_HANDLER_TIMEOUT mechanism." + } + { bits: "2" + name: "BUS_TIMEOUT" + desc: "A Host-Mode active transaction has terminated due to a bus timeout activated by !!TIMEOUT_CTRL." + } + { bits: "3" + name: "ARBITRATION_LOST" + desc: "A Host-Mode active transaction has terminated due to lost arbitration." + } + ] + tags: ["excl:CsrAllTests:CsrExclCheck"] + } + { name: "TARGET_EVENTS" + desc: ''' + Latched events that can cause the target module to stretch the clock at the beginning of a read transfer. + + These events cause TX FIFO-related stretching even when the TX FIFO has data available. + Any bits that are set must be written (with a 1) to clear the tx_stretch interrupt. + + This CSR serves as a gate to prevent the Target module from responding to a read command with unrelated, leftover data. + ''' + swaccess: "rw1c" + hwaccess: "hrw" + fields: [ + { bits: "0" + name: "TX_PENDING" + desc: ''' + A new Target-Mode read transfer has arrived that addressed this target. + + This bit is used by software to confirm the release of the contents in the TX FIFO. + If the contents do not apply, software should first reset the TX FIFO, then load it with the correct data, then clear this bit. + + Optionally enabled by !!CTRL.TX_STRETCH_CTRL_EN. + ''' + } + { bits: "1" + name: "BUS_TIMEOUT" + desc: "A Target-Mode read transfer has terminated due to a bus timeout activated by !!TIMEOUT_CTRL." + } + { bits: "2" + name: "ARBITRATION_LOST" + desc: "A Target-Mode read transfer has terminated due to lost arbitration." + } + ] + tags: ["excl:CsrAllTests:CsrExclCheck"] + } + ] +} \ No newline at end of file diff --git a/docs/um/ip/i2c/doc/registers.md b/docs/um/ip/i2c/doc/registers.md new file mode 100644 index 00000000..84ca1915 --- /dev/null +++ b/docs/um/ip/i2c/doc/registers.md @@ -0,0 +1,913 @@ +## Summary + +| Name | Offset | Length | Description | +|:--------------------------------------------------------------|:---------|---------:|:----------------------------------------------------------------------------------------------------------| +| i2c.[`INTR_STATE`](#intr_state) | 0x0 | 4 | Interrupt State Register | +| i2c.[`INTR_ENABLE`](#intr_enable) | 0x4 | 4 | Interrupt Enable Register | +| i2c.[`INTR_TEST`](#intr_test) | 0x8 | 4 | Interrupt Test Register | +| i2c.[`ALERT_TEST`](#alert_test) | 0xc | 4 | Alert Test Register | +| i2c.[`CTRL`](#ctrl) | 0x10 | 4 | I2C Control Register | +| i2c.[`STATUS`](#status) | 0x14 | 4 | I2C Live Status Register for Host and Target modes | +| i2c.[`RDATA`](#rdata) | 0x18 | 4 | I2C Read Data | +| i2c.[`FDATA`](#fdata) | 0x1c | 4 | I2C Host Format Data | +| i2c.[`FIFO_CTRL`](#fifo_ctrl) | 0x20 | 4 | I2C FIFO control register | +| i2c.[`HOST_FIFO_CONFIG`](#host_fifo_config) | 0x24 | 4 | Host mode FIFO configuration | +| i2c.[`TARGET_FIFO_CONFIG`](#target_fifo_config) | 0x28 | 4 | Target mode FIFO configuration | +| i2c.[`HOST_FIFO_STATUS`](#host_fifo_status) | 0x2c | 4 | Host mode FIFO status register | +| i2c.[`TARGET_FIFO_STATUS`](#target_fifo_status) | 0x30 | 4 | Target mode FIFO status register | +| i2c.[`OVRD`](#ovrd) | 0x34 | 4 | I2C Override Control Register | +| i2c.[`VAL`](#val) | 0x38 | 4 | Oversampled RX values | +| i2c.[`TIMING0`](#timing0) | 0x3c | 4 | Detailed I2C Timings (directly corresponding to table 10 in the I2C Specification). | +| i2c.[`TIMING1`](#timing1) | 0x40 | 4 | Detailed I2C Timings (directly corresponding to table 10 in the I2C Specification). | +| i2c.[`TIMING2`](#timing2) | 0x44 | 4 | Detailed I2C Timings (directly corresponding to table 10 in the I2C Specification). | +| i2c.[`TIMING3`](#timing3) | 0x48 | 4 | Detailed I2C Timings (directly corresponding to table 10, in the I2C Specification). | +| i2c.[`TIMING4`](#timing4) | 0x4c | 4 | Detailed I2C Timings (directly corresponding to table 10, in the I2C Specification). | +| i2c.[`TIMEOUT_CTRL`](#timeout_ctrl) | 0x50 | 4 | I2C clock stretching and bus timeout control. | +| i2c.[`TARGET_ID`](#target_id) | 0x54 | 4 | I2C target address and mask pairs | +| i2c.[`ACQDATA`](#acqdata) | 0x58 | 4 | I2C target acquired data | +| i2c.[`TXDATA`](#txdata) | 0x5c | 4 | I2C target transmit data | +| i2c.[`HOST_TIMEOUT_CTRL`](#host_timeout_ctrl) | 0x60 | 4 | I2C host clock generation timeout value (in units of input clock frequency). | +| i2c.[`TARGET_TIMEOUT_CTRL`](#target_timeout_ctrl) | 0x64 | 4 | I2C target internal stretching timeout control. | +| i2c.[`TARGET_NACK_COUNT`](#target_nack_count) | 0x68 | 4 | Number of times the I2C target has NACK'ed a new transaction since the last read of this register. | +| i2c.[`TARGET_ACK_CTRL`](#target_ack_ctrl) | 0x6c | 4 | Controls for mid-transfer (N)ACK phase handling | +| i2c.[`ACQ_FIFO_NEXT_DATA`](#acq_fifo_next_data) | 0x70 | 4 | The data byte pending to be written to the ACQ FIFO. | +| i2c.[`HOST_NACK_HANDLER_TIMEOUT`](#host_nack_handler_timeout) | 0x74 | 4 | Timeout in Host-Mode for an unhandled NACK before hardware automatically ends the transaction. | +| i2c.[`CONTROLLER_EVENTS`](#controller_events) | 0x78 | 4 | Latched events that explain why the controller halted. | +| i2c.[`TARGET_EVENTS`](#target_events) | 0x7c | 4 | Latched events that can cause the target module to stretch the clock at the beginning of a read transfer. | + +## INTR_STATE +Interrupt State Register +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0x7fff` + +### Fields + +```wavejson +{"reg": [{"name": "fmt_threshold", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "rx_threshold", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "acq_threshold", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "rx_overflow", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "controller_halt", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "scl_interference", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "sda_interference", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "stretch_timeout", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "sda_unstable", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "cmd_complete", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "tx_stretch", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "tx_threshold", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "acq_stretch", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "unexp_stop", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "host_timeout", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"bits": 17}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:15 | | | | Reserved | +| 14 | rw1c | 0x0 | host_timeout | target mode interrupt: raised if the host stops sending the clock during an ongoing transaction. | +| 13 | rw1c | 0x0 | unexp_stop | target mode interrupt: raised if STOP is received without a preceding NACK during an external host read. | +| 12 | ro | 0x0 | acq_stretch | target mode interrupt: raised if the target is stretching clocks due to full ACQ FIFO or zero count in [`TARGET_ACK_CTRL.NBYTES`](#target_ack_ctrl) (if enabled). This is a level status interrupt. | +| 11 | ro | 0x0 | tx_threshold | target mode interrupt: asserted whilst the TX FIFO level is below the low threshold. This is a level status interrupt. | +| 10 | ro | 0x0 | tx_stretch | target mode interrupt: raised if the target is stretching clocks for a read command. This is a level status interrupt. | +| 9 | rw1c | 0x0 | cmd_complete | host and target mode interrupt. In host mode, raised if the host issues a repeated START or terminates the transaction by issuing STOP. In target mode, raised if the external host issues a STOP or repeated START. | +| 8 | rw1c | 0x0 | sda_unstable | host mode interrupt: raised if the target does not assert a constant value of SDA during transmission. | +| 7 | rw1c | 0x0 | stretch_timeout | host mode interrupt: raised if target stretches the clock beyond the allowed timeout period | +| 6 | rw1c | 0x0 | sda_interference | host mode interrupt: raised if the SDA line goes low when host is trying to assert high | +| 5 | rw1c | 0x0 | scl_interference | host mode interrupt: raised if the SCL line drops early (not supported without clock synchronization). | +| 4 | ro | 0x0 | controller_halt | host mode interrupt: raised if the controller FSM is halted, such as on an unexpected NACK or lost arbitration. Check [`CONTROLLER_EVENTS`](#controller_events) for the reason. The interrupt will be released when the bits in [`CONTROLLER_EVENTS`](#controller_events) are cleared. | +| 3 | rw1c | 0x0 | rx_overflow | host mode interrupt: raised if the RX FIFO has overflowed. | +| 2 | ro | 0x0 | acq_threshold | target mode interrupt: asserted whilst the ACQ FIFO level is above the high threshold. This is a level status interrupt. | +| 1 | ro | 0x0 | rx_threshold | host mode interrupt: asserted whilst the RX FIFO level is above the high threshold. This is a level status interrupt. | +| 0 | ro | 0x0 | fmt_threshold | host mode interrupt: asserted whilst the FMT FIFO level is below the low threshold. This is a level status interrupt. | + +## INTR_ENABLE +Interrupt Enable Register +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0x7fff` + +### Fields + +```wavejson +{"reg": [{"name": "fmt_threshold", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "rx_threshold", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "acq_threshold", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "rx_overflow", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "controller_halt", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "scl_interference", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "sda_interference", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "stretch_timeout", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "sda_unstable", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "cmd_complete", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "tx_stretch", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "tx_threshold", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "acq_stretch", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "unexp_stop", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "host_timeout", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 17}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:---------------------------------------------------------------------------| +| 31:15 | | | | Reserved | +| 14 | rw | 0x0 | host_timeout | Enable interrupt when [`INTR_STATE.host_timeout`](#intr_state) is set. | +| 13 | rw | 0x0 | unexp_stop | Enable interrupt when [`INTR_STATE.unexp_stop`](#intr_state) is set. | +| 12 | rw | 0x0 | acq_stretch | Enable interrupt when [`INTR_STATE.acq_stretch`](#intr_state) is set. | +| 11 | rw | 0x0 | tx_threshold | Enable interrupt when [`INTR_STATE.tx_threshold`](#intr_state) is set. | +| 10 | rw | 0x0 | tx_stretch | Enable interrupt when [`INTR_STATE.tx_stretch`](#intr_state) is set. | +| 9 | rw | 0x0 | cmd_complete | Enable interrupt when [`INTR_STATE.cmd_complete`](#intr_state) is set. | +| 8 | rw | 0x0 | sda_unstable | Enable interrupt when [`INTR_STATE.sda_unstable`](#intr_state) is set. | +| 7 | rw | 0x0 | stretch_timeout | Enable interrupt when [`INTR_STATE.stretch_timeout`](#intr_state) is set. | +| 6 | rw | 0x0 | sda_interference | Enable interrupt when [`INTR_STATE.sda_interference`](#intr_state) is set. | +| 5 | rw | 0x0 | scl_interference | Enable interrupt when [`INTR_STATE.scl_interference`](#intr_state) is set. | +| 4 | rw | 0x0 | controller_halt | Enable interrupt when [`INTR_STATE.controller_halt`](#intr_state) is set. | +| 3 | rw | 0x0 | rx_overflow | Enable interrupt when [`INTR_STATE.rx_overflow`](#intr_state) is set. | +| 2 | rw | 0x0 | acq_threshold | Enable interrupt when [`INTR_STATE.acq_threshold`](#intr_state) is set. | +| 1 | rw | 0x0 | rx_threshold | Enable interrupt when [`INTR_STATE.rx_threshold`](#intr_state) is set. | +| 0 | rw | 0x0 | fmt_threshold | Enable interrupt when [`INTR_STATE.fmt_threshold`](#intr_state) is set. | + +## INTR_TEST +Interrupt Test Register +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0x7fff` + +### Fields + +```wavejson +{"reg": [{"name": "fmt_threshold", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "rx_threshold", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "acq_threshold", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "rx_overflow", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "controller_halt", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "scl_interference", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "sda_interference", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "stretch_timeout", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "sda_unstable", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "cmd_complete", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "tx_stretch", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "tx_threshold", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "acq_stretch", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "unexp_stop", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "host_timeout", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 17}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------------------------------------------------------------| +| 31:15 | | | | Reserved | +| 14 | wo | 0x0 | host_timeout | Write 1 to force [`INTR_STATE.host_timeout`](#intr_state) to 1. | +| 13 | wo | 0x0 | unexp_stop | Write 1 to force [`INTR_STATE.unexp_stop`](#intr_state) to 1. | +| 12 | wo | 0x0 | acq_stretch | Write 1 to force [`INTR_STATE.acq_stretch`](#intr_state) to 1. | +| 11 | wo | 0x0 | tx_threshold | Write 1 to force [`INTR_STATE.tx_threshold`](#intr_state) to 1. | +| 10 | wo | 0x0 | tx_stretch | Write 1 to force [`INTR_STATE.tx_stretch`](#intr_state) to 1. | +| 9 | wo | 0x0 | cmd_complete | Write 1 to force [`INTR_STATE.cmd_complete`](#intr_state) to 1. | +| 8 | wo | 0x0 | sda_unstable | Write 1 to force [`INTR_STATE.sda_unstable`](#intr_state) to 1. | +| 7 | wo | 0x0 | stretch_timeout | Write 1 to force [`INTR_STATE.stretch_timeout`](#intr_state) to 1. | +| 6 | wo | 0x0 | sda_interference | Write 1 to force [`INTR_STATE.sda_interference`](#intr_state) to 1. | +| 5 | wo | 0x0 | scl_interference | Write 1 to force [`INTR_STATE.scl_interference`](#intr_state) to 1. | +| 4 | wo | 0x0 | controller_halt | Write 1 to force [`INTR_STATE.controller_halt`](#intr_state) to 1. | +| 3 | wo | 0x0 | rx_overflow | Write 1 to force [`INTR_STATE.rx_overflow`](#intr_state) to 1. | +| 2 | wo | 0x0 | acq_threshold | Write 1 to force [`INTR_STATE.acq_threshold`](#intr_state) to 1. | +| 1 | wo | 0x0 | rx_threshold | Write 1 to force [`INTR_STATE.rx_threshold`](#intr_state) to 1. | +| 0 | wo | 0x0 | fmt_threshold | Write 1 to force [`INTR_STATE.fmt_threshold`](#intr_state) to 1. | + +## ALERT_TEST +Alert Test Register +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "fatal_fault", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:-------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | fatal_fault | Write 1 to trigger one alert event of this kind. | + +## CTRL +I2C Control Register +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0x7f` + +### Fields + +```wavejson +{"reg": [{"name": "ENABLEHOST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ENABLETARGET", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "LLPBK", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "NACK_ADDR_AFTER_TIMEOUT", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ACK_CTRL_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "MULTI_CONTROLLER_MONITOR_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "TX_STRETCH_CTRL_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 25}], "config": {"lanes": 1, "fontsize": 10, "vspace": 290}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------------------------------------------| +| 31:7 | | | Reserved | +| 6 | rw | 0x0 | [TX_STRETCH_CTRL_EN](#ctrl--tx_stretch_ctrl_en) | +| 5 | rw | 0x0 | [MULTI_CONTROLLER_MONITOR_EN](#ctrl--multi_controller_monitor_en) | +| 4 | rw | 0x0 | [ACK_CTRL_EN](#ctrl--ack_ctrl_en) | +| 3 | rw | 0x0 | [NACK_ADDR_AFTER_TIMEOUT](#ctrl--nack_addr_after_timeout) | +| 2 | rw | 0x0 | [LLPBK](#ctrl--llpbk) | +| 1 | rw | 0x0 | [ENABLETARGET](#ctrl--enabletarget) | +| 0 | rw | 0x0 | [ENABLEHOST](#ctrl--enablehost) | + +### CTRL . TX_STRETCH_CTRL_EN +If set to 1, this bit causes a read transfer addressed to this target to set the corresponding bit in [`TARGET_EVENTS.`](#target_events) + +While [`TARGET_EVENTS.TX_PENDING`](#target_events) is 1, subsequent read transactions will stretch the clock, even if there is data in the TX FIFO. + +If enabled, this function allows software to confirm the data in the TX FIFO should be released for the current read. +This may be useful for cases where the TX FIFO has data that does not apply to the current transfer. +For example, the transaction could've targeted an alternate function via another address. + +### CTRL . MULTI_CONTROLLER_MONITOR_EN +Enable the bus monitor in multi-controller mode. + +If a 0->1 transition happens while [`CTRL.ENABLEHOST`](#ctrl) and [`CTRL.ENABLETARGET`](#ctrl) are both 0, the bus monitor will enable and begin in the "bus busy" state. +To transition to a bus free state, [`HOST_TIMEOUT_CTRL`](#host_timeout_ctrl) must be nonzero, so the bus monitor may count out idle cycles to confirm the freedom to transmit. +In addition, the bus monitor will track whether the bus is free based on the enabled timeouts and detected Stop symbols. +For multi-controller mode, ensure [`CTRL.MULTI_CONTROLLER_MONITOR_EN`](#ctrl) becomes 1 no later than [`CTRL.ENABLEHOST`](#ctrl) or [`CTRL.ENABLETARGET.`](#ctrl) +This bit can be set at the same time as either or both of the other two, though. + +Note that if [`CTRL.MULTI_CONTROLLER_MONITOR_EN`](#ctrl) is set after [`CTRL.ENABLEHOST`](#ctrl) or [`CTRL.ENABLETARGET`](#ctrl), the bus monitor will begin in the "bus free" state instead. +This would violate the proper protocol for a controller to join a multi-controller environment. +However, if this controller is known to be the first to join, this ordering will enable skipping the idle wait. + +When 0, the bus monitor will report that the bus is always free, so the controller FSM is never blocked from transmitting. + +### CTRL . ACK_CTRL_EN +Enable I2C Target ACK Control Mode. + +ACK Control Mode works together with [`TARGET_ACK_CTRL.NBYTES`](#target_ack_ctrl) to allow software to control upper-layer protocol (N)ACKing (e.g. as in SMBus). +This bit enables the mode when 1, and [`TARGET_ACK_CTRL.NBYTES`](#target_ack_ctrl) limits how many bytes may be automatically ACK'd while the ACQ FIFO has space. +If it is 0, the decision to ACK or NACK is made only from stretching timeouts and [`CTRL.NACK_ADDR_AFTER_TIMEOUT.`](#ctrl) + +### CTRL . NACK_ADDR_AFTER_TIMEOUT +Enable NACKing the address on a stretch timeout. + +This is a Target mode feature. +If enabled (1), a stretch timeout will cause the device to NACK the address byte. +If disabled (0), a stretch timeout will cause the device to ACK the address byte. +SMBus requires that devices always ACK their address, even for read commands. +However, non-SMBus protocols may have a different approach and can choose to NACK instead. + +Note that both cases handle data bytes the same way. +For writes, the Target module will NACK all subsequent data bytes until it receives a Stop. +For reads, the Target module will release SDA, causing 0xff to be returned for all data bytes until it receives a Stop. + +### CTRL . LLPBK +Enable I2C line loopback test +If line loopback is enabled, the internal design sees ACQ and RX data as "1" + +### CTRL . ENABLETARGET +Enable Target I2C functionality + +### CTRL . ENABLEHOST +Enable Host I2C functionality + +## STATUS +I2C Live Status Register for Host and Target modes +- Offset: `0x14` +- Reset default: `0x33c` +- Reset mask: `0x7ff` + +### Fields + +```wavejson +{"reg": [{"name": "FMTFULL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RXFULL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "FMTEMPTY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "HOSTIDLE", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "TARGETIDLE", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RXEMPTY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "TXFULL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "ACQFULL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "TXEMPTY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "ACQEMPTY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "ACK_CTRL_STRETCH", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 21}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:---------------------------------------------------------------------------------------------------------| +| 31:11 | | | | Reserved | +| 10 | ro | x | ACK_CTRL_STRETCH | Target mode stretching at (N)ACK phase due to zero count in [`TARGET_ACK_CTRL.NBYTES`](#target_ack_ctrl) | +| 9 | ro | 0x1 | ACQEMPTY | Target mode receive FIFO is empty | +| 8 | ro | 0x1 | TXEMPTY | Target mode TX FIFO is empty | +| 7 | ro | x | ACQFULL | Target mode receive FIFO is full | +| 6 | ro | x | TXFULL | Target mode TX FIFO is full | +| 5 | ro | 0x1 | RXEMPTY | Host mode RX FIFO is empty | +| 4 | ro | 0x1 | TARGETIDLE | Target functionality is idle. No Target transaction is in progress | +| 3 | ro | 0x1 | HOSTIDLE | Host functionality is idle. No Host transaction is in progress | +| 2 | ro | 0x1 | FMTEMPTY | Host mode FMT FIFO is empty | +| 1 | ro | x | RXFULL | Host mode RX FIFO is full | +| 0 | ro | x | FMTFULL | Host mode FMT FIFO is full | + +## RDATA +I2C Read Data +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "RDATA", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | x | RDATA | | + +## FDATA +I2C Host Format Data + +Writes to this register are used to define and drive Controller-Mode transactions. +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0x1fff` + +### Fields + +```wavejson +{"reg": [{"name": "FBYTE", "bits": 8, "attr": ["wo"], "rotate": 0}, {"name": "START", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "STOP", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "READB", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RCONT", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "NAKOK", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 19}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------| +| 31:13 | | | Reserved | +| 12 | wo | 0x0 | [NAKOK](#fdata--nakok) | +| 11 | wo | 0x0 | [RCONT](#fdata--rcont) | +| 10 | wo | 0x0 | [READB](#fdata--readb) | +| 9 | wo | 0x0 | [STOP](#fdata--stop) | +| 8 | wo | 0x0 | [START](#fdata--start) | +| 7:0 | wo | 0x0 | [FBYTE](#fdata--fbyte) | + +### FDATA . NAKOK +For the currrent controller-transmitter byte (WRITE), do not halt via CONTROLLER_EVENTS +or assert the 'controller_halt' interrupt if the current byte is not ACK'd. + +### FDATA . RCONT +Do not NACK the last byte read, let the read operation continue. + +### FDATA . READB +Transfer Direction Indicator. + +If unset, this write to FDATA defines a controller-transmitter operation (WRITE). +A single byte of data (FBYTE) is written to the bus. + +If set, this write to FDATA defines a controller-receiver operation (READ). +The value of FBYTE defines the number of bytes read from the bus. (256 if FBYTE==0)" +After this number of bytes are read, the final byte will be NACKed to end the transfer +unless RCONT is also set. + +### FDATA . STOP +Issue a STOP condition after transmitting FBYTE. + +### FDATA . START +Issue a START condition before transmitting FBYTE. + +### FDATA . FBYTE +Format Byte. + +If no flags are set, hardware will transmit this byte directly. + +If READB is set, this field becomes the number of bytes hardware will automatically +read from the bus. + +## FIFO_CTRL +I2C FIFO control register +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0x183` + +### Fields + +```wavejson +{"reg": [{"name": "RXRST", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "FMTRST", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 5}, {"name": "ACQRST", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "TXRST", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 23}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------| +| 31:9 | | | | Reserved | +| 8 | wo | 0x0 | TXRST | TX FIFO reset. Write 1 to the register resets it. Read returns 0 | +| 7 | wo | 0x0 | ACQRST | ACQ FIFO reset. Write 1 to the register resets it. Read returns 0 | +| 6:2 | | | | Reserved | +| 1 | wo | 0x0 | FMTRST | FMT fifo reset. Write 1 to the register resets FMT_FIFO. Read returns 0 | +| 0 | wo | 0x0 | RXRST | RX fifo reset. Write 1 to the register resets RX_FIFO. Read returns 0 | + +## HOST_FIFO_CONFIG +Host mode FIFO configuration +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0xfff0fff` + +### Fields + +```wavejson +{"reg": [{"name": "RX_THRESH", "bits": 12, "attr": ["rw"], "rotate": 0}, {"bits": 4}, {"name": "FMT_THRESH", "bits": 12, "attr": ["rw"], "rotate": 0}, {"bits": 4}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:-----------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:28 | | | | Reserved | +| 27:16 | rw | 0x0 | FMT_THRESH | Threshold level for FMT interrupts. Whilst the number of used entries in the FMT FIFO is below this setting, the fmt_threshold interrupt will be asserted. | +| 15:12 | | | | Reserved | +| 11:0 | rw | 0x0 | RX_THRESH | Threshold level for RX interrupts. Whilst the level of data in the RX FIFO is above this setting, the rx_threshold interrupt will be asserted. | + +## TARGET_FIFO_CONFIG +Target mode FIFO configuration +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0xfff0fff` + +### Fields + +```wavejson +{"reg": [{"name": "TX_THRESH", "bits": 12, "attr": ["rw"], "rotate": 0}, {"bits": 4}, {"name": "ACQ_THRESH", "bits": 12, "attr": ["rw"], "rotate": 0}, {"bits": 4}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:28 | | | | Reserved | +| 27:16 | rw | 0x0 | ACQ_THRESH | Threshold level for ACQ interrupts. Whilst the level of data in the ACQ FIFO is above this setting, the acq_threshold interrupt will be asserted. | +| 15:12 | | | | Reserved | +| 11:0 | rw | 0x0 | TX_THRESH | Threshold level for TX interrupts. Whilst the number of used entries in the TX FIFO is below this setting, the tx_threshold interrupt will be asserted. | + +## HOST_FIFO_STATUS +Host mode FIFO status register +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0xfff0fff` + +### Fields + +```wavejson +{"reg": [{"name": "FMTLVL", "bits": 12, "attr": ["ro"], "rotate": 0}, {"bits": 4}, {"name": "RXLVL", "bits": 12, "attr": ["ro"], "rotate": 0}, {"bits": 4}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------| +| 31:28 | | | | Reserved | +| 27:16 | ro | x | RXLVL | Current fill level of RX fifo | +| 15:12 | | | | Reserved | +| 11:0 | ro | x | FMTLVL | Current fill level of FMT fifo | + +## TARGET_FIFO_STATUS +Target mode FIFO status register +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0xfff0fff` + +### Fields + +```wavejson +{"reg": [{"name": "TXLVL", "bits": 12, "attr": ["ro"], "rotate": 0}, {"bits": 4}, {"name": "ACQLVL", "bits": 12, "attr": ["ro"], "rotate": 0}, {"bits": 4}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------| +| 31:28 | | | | Reserved | +| 27:16 | ro | x | ACQLVL | Current fill level of ACQ fifo | +| 15:12 | | | | Reserved | +| 11:0 | ro | x | TXLVL | Current fill level of TX fifo | + +## OVRD +I2C Override Control Register +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "TXOVRDEN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "SCLVAL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "SDAVAL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 100}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------------------------------------------------------------------| +| 31:3 | | | | Reserved | +| 2 | rw | 0x0 | SDAVAL | Value for SDA Override. Set to 0 to drive TX Low, and set to 1 for high-Z | +| 1 | rw | 0x0 | SCLVAL | Value for SCL Override. Set to 0 to drive TX Low, and set to 1 for high-Z | +| 0 | rw | 0x0 | TXOVRDEN | Override the SDA and SCL TX signals. | + +## VAL +Oversampled RX values +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SCL_RX", "bits": 16, "attr": ["ro"], "rotate": 0}, {"name": "SDA_RX", "bits": 16, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------| +| 31:16 | ro | x | SDA_RX | Last 16 oversampled values of SDA. Most recent bit is bit 16, oldest 31. | +| 15:0 | ro | x | SCL_RX | Last 16 oversampled values of SCL. Most recent bit is bit 0, oldest 15. | + +## TIMING0 +Detailed I2C Timings (directly corresponding to table 10 in the I2C Specification). +All values are expressed in units of the input clock period. +These must be greater than 2 in order for the change in SCL to propagate to the input of the FSM so that acknowledgements are detected correctly. +- Offset: `0x3c` +- Reset default: `0x0` +- Reset mask: `0x1fff1fff` + +### Fields + +```wavejson +{"reg": [{"name": "THIGH", "bits": 13, "attr": ["rw"], "rotate": 0}, {"bits": 3}, {"name": "TLOW", "bits": 13, "attr": ["rw"], "rotate": 0}, {"bits": 3}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:29 | | | | Reserved | +| 28:16 | rw | 0x0 | TLOW | The actual time to hold SCL low between any two SCL pulses. This field is sized to have a range of at least Standard Mode's 4.7 us max with a core clock at 1 GHz. | +| 15:13 | | | | Reserved | +| 12:0 | rw | 0x0 | THIGH | The actual time to hold SCL high in a given pulse. This field is sized to have a range of at least Standard Mode's 4.0 us max with a core clock at 1 GHz. | + +## TIMING1 +Detailed I2C Timings (directly corresponding to table 10 in the I2C Specification). +All values are expressed in units of the input clock period. +- Offset: `0x40` +- Reset default: `0x0` +- Reset mask: `0x1ff03ff` + +### Fields + +```wavejson +{"reg": [{"name": "T_R", "bits": 10, "attr": ["rw"], "rotate": 0}, {"bits": 6}, {"name": "T_F", "bits": 9, "attr": ["rw"], "rotate": 0}, {"bits": 7}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:25 | | | | Reserved | +| 24:16 | rw | 0x0 | T_F | The nominal fall time to anticipate for the bus (influences SDA hold times). This field is sized to have a range of at least Standard Mode's 300 ns max with a core clock at 1 GHz. | +| 15:10 | | | | Reserved | +| 9:0 | rw | 0x0 | T_R | The nominal rise time to anticipate for the bus (depends on capacitance). This field is sized to have a range of at least Standard Mode's 1000 ns max with a core clock at 1 GHz. | + +## TIMING2 +Detailed I2C Timings (directly corresponding to table 10 in the I2C Specification). +All values are expressed in units of the input clock period. +- Offset: `0x44` +- Reset default: `0x0` +- Reset mask: `0x1fff1fff` + +### Fields + +```wavejson +{"reg": [{"name": "TSU_STA", "bits": 13, "attr": ["rw"], "rotate": 0}, {"bits": 3}, {"name": "THD_STA", "bits": 13, "attr": ["rw"], "rotate": 0}, {"bits": 3}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:-----------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:29 | | | | Reserved | +| 28:16 | rw | 0x0 | THD_STA | Actual hold time for start signals. This field is sized to have a range of at least Standard Mode's 4.0 us max with a core clock at 1 GHz. | +| 15:13 | | | | Reserved | +| 12:0 | rw | 0x0 | TSU_STA | Actual setup time for repeated start signals. This field is sized to have a range of at least Standard Mode's 4.7 us max with a core clock at 1 GHz. | + +## TIMING3 +Detailed I2C Timings (directly corresponding to table 10, in the I2C Specification). +All values are expressed in units of the input clock period. +- Offset: `0x48` +- Reset default: `0x0` +- Reset mask: `0x1fff01ff` + +### Fields + +```wavejson +{"reg": [{"name": "TSU_DAT", "bits": 9, "attr": ["rw"], "rotate": 0}, {"bits": 7}, {"name": "THD_DAT", "bits": 13, "attr": ["rw"], "rotate": 0}, {"bits": 3}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------| +| 31:29 | | | Reserved | +| 28:16 | rw | 0x0 | [THD_DAT](#timing3--thd_dat) | +| 15:9 | | | Reserved | +| 8:0 | rw | 0x0 | [TSU_DAT](#timing3--tsu_dat) | + +### TIMING3 . THD_DAT +Actual hold time for data (or ack) bits. +(Note, where required, the parameters TVD_DAT is taken to be THD_DAT+T_F) +This field is sized to have a range that accommodates Standard Mode's 3.45 us max for TVD_DAT with a core clock at 1 GHz. +However, this field is generally expected to represent a time substantially shorter than that. +It should be long enough to cover the maximum round-trip latency from output pins, through pads and voltage transitions on the board, and back to the input pins, but it should not be substantially greater. + +### TIMING3 . TSU_DAT +Actual setup time for data (or ack) bits. +This field is sized to have a range of at least Standard Mode's 250 ns max with a core clock at 1 GHz. + +## TIMING4 +Detailed I2C Timings (directly corresponding to table 10, in the I2C Specification). +All values are expressed in units of the input clock period. +- Offset: `0x4c` +- Reset default: `0x0` +- Reset mask: `0x1fff1fff` + +### Fields + +```wavejson +{"reg": [{"name": "TSU_STO", "bits": 13, "attr": ["rw"], "rotate": 0}, {"bits": 3}, {"name": "T_BUF", "bits": 13, "attr": ["rw"], "rotate": 0}, {"bits": 3}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:29 | | | | Reserved | +| 28:16 | rw | 0x0 | T_BUF | Actual time between each STOP signal and the following START signal. This field is sized to have a range of at least Standard Mode's 4.7 us max with a core clock at 1 GHz. | +| 15:13 | | | | Reserved | +| 12:0 | rw | 0x0 | TSU_STO | Actual setup time for stop signals. This field is sized to have a range of at least Standard Mode's 4.0 us max with a core clock at 1 GHz. | + +## TIMEOUT_CTRL +I2C clock stretching and bus timeout control. + +This timeout must be enabled by setting [`TIMEOUT_CTRL.EN`](#timeout_ctrl) to 1, and the behavior of this feature depends on the value of [`TIMEOUT_CTRL.MODE.`](#timeout_ctrl) + +If the mode is "STRETCH_TIMEOUT", this is used in I2C controller mode to detect whether a connected target is stretching a single low time beyond the timeout value. +Configured as such, this timeout is more informative and doesn't do more than assert the "stretch_timeout" interrupt. + +If the mode is "BUS_TIMEOUT", it is used to detect whether the clock has been held low for too long instead, inclusive of the controller's clock low time. +This is useful for an SMBus context, where the VAL programmed should be tTIMEOUT:MIN. +- Offset: `0x50` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VAL", "bits": 30, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "EN", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:----------------------------| +| 31 | rw | 0x0 | [EN](#timeout_ctrl--en) | +| 30 | rw | 0x0 | [MODE](#timeout_ctrl--mode) | +| 29:0 | rw | 0x0 | [VAL](#timeout_ctrl--val) | + +### TIMEOUT_CTRL . EN +Enable stretch timeout or bus timeout feature + +### TIMEOUT_CTRL . MODE +Selects the timeout mode, between a stretch timeout and a bus timeout. + +Between the two modes, the primary difference is how much of the clock low period is counted. +For a stretch timeout, only the time that another device holds the clock low will be counted. +For a bus timeout, the entire clock low time is counted, consistent with the SMBus tTIMEOUT type. + +[`TIMEOUT_CTRL.EN`](#timeout_ctrl) must be 1 for either of these features to be enabled. + +| Value | Name | Description | +|:--------|:----------------|:-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 0x0 | STRETCH_TIMEOUT | The timeout is a target stretch timeout. The counter will track how long the clock has been stretched by another device while the controller is active. | +| 0x1 | BUS_TIMEOUT | The timeout is a clock low timeout. The counter will track how long the clock low period is, inclusive of the controller's ordinary low count. A timeout will set !!CONTROLLER_EVENTS.BUS_TIMEOUT and cause a "controller_halt" interrupt. | + + +### TIMEOUT_CTRL . VAL +Clock stretching timeout value (in units of input clock frequency) + +## TARGET_ID +I2C target address and mask pairs +- Offset: `0x54` +- Reset default: `0x0` +- Reset mask: `0xfffffff` + +### Fields + +```wavejson +{"reg": [{"name": "ADDRESS0", "bits": 7, "attr": ["rw"], "rotate": 0}, {"name": "MASK0", "bits": 7, "attr": ["rw"], "rotate": 0}, {"name": "ADDRESS1", "bits": 7, "attr": ["rw"], "rotate": 0}, {"name": "MASK1", "bits": 7, "attr": ["rw"], "rotate": 0}, {"bits": 4}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:----------------------------------------------------------------------------------------------| +| 31:28 | | | | Reserved | +| 27:21 | rw | 0x0 | MASK1 | I2C target mask number 1. At least one bit in MASK1 must be set to 1 for ADDRESS1 to be used. | +| 20:14 | rw | 0x0 | ADDRESS1 | I2C target address number 1 | +| 13:7 | rw | 0x0 | MASK0 | I2C target mask number 0. At least one bit in MASK0 must be set to 1 for ADDRESS0 to be used. | +| 6:0 | rw | 0x0 | ADDRESS0 | I2C target address number 0 | + +## ACQDATA +I2C target acquired data +- Offset: `0x58` +- Reset default: `0x0` +- Reset mask: `0x7ff` + +### Fields + +```wavejson +{"reg": [{"name": "ABYTE", "bits": 8, "attr": ["ro"], "rotate": 0}, {"name": "SIGNAL", "bits": 3, "attr": ["ro"], "rotate": -90}, {"bits": 21}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:---------------------------| +| 31:11 | | | Reserved | +| 10:8 | ro | x | [SIGNAL](#acqdata--signal) | +| 7:0 | ro | x | [ABYTE](#acqdata--abyte) | + +### ACQDATA . SIGNAL +Indicates any control symbols associated with the ABYTE. + +For the STOP symbol, a stretch timeout or other unexpected events will cause a NACK_STOP to appear in the ACQ FIFO. +If the ACQ FIFO doesn't have enough space to record a START and a STOP, the transaction will be dropped entirely on a stretch timeout. +In that case, the START byte will not appear (neither as START nor NACK_START), but a standalone NACK_STOP may, if there was space. +Software can discard any standalone NACK_STOP that appears. + +See the associated values for more information about the contents. + +| Value | Name | Description | +|:--------|:-----------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 0x0 | NONE | ABYTE contains an ordinary data byte that was received and ACK'd. | +| 0x1 | START | A START condition preceded the ABYTE to start a new transaction. ABYTE contains the 7-bit I2C address plus R/W command bit in the order received on the bus, MSB first. | +| 0x2 | STOP | A STOP condition was received for a transaction including a transfer that addressed this Target. No transfers addressing this Target in that transaction were NACK'd. ABYTE contains no data. | +| 0x3 | RESTART | A repeated START condition preceded the ABYTE, extending the current transaction with a new transfer. ABYTE contains the 7-bit I2C address plus R/W command bit in the order received on the bus, MSB first. | +| 0x4 | NACK | ABYTE contains an ordinary data byte that was received and NACK'd. | +| 0x5 | NACK_START | A START condition preceded the ABYTE (including repeated START) that was part of a NACK'd transfer. The ABYTE contains the matching I2C address and command bit. The ABYTE was ACK'd, but the rest of the transaction was NACK'ed. | +| 0x6 | NACK_STOP | A transaction including a transfer that addressed this Target was ended, but the transaction ended abnormally and/or the transfer was NACK'd. The end can be due to a STOP condition or unexpected events, such as a bus timeout (if enabled). ABYTE contains no data. NACKing can occur for multiple reasons, including a stretch timeout, a SW-directed NACK, or lost arbitration. This signal is a bucket for all these error-type terminations. | + +Other values are reserved. + +### ACQDATA . ABYTE +Address for accepted transaction or acquired byte + +## TXDATA +I2C target transmit data +- Offset: `0x5c` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "TXDATA", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | TXDATA | | + +## HOST_TIMEOUT_CTRL +I2C host clock generation timeout value (in units of input clock frequency). + +In an active transaction in Target-Mode, if the Controller ceases to send SCL pulses +for this number of cycles then the "host_timeout" interrupt will be asserted. + +In multi-controller monitoring mode, [`HOST_TIMEOUT_CTRL`](#host_timeout_ctrl) is required to be nonzero to transition out of the initial busy state. +Set this CSR to 0 to disable this behaviour. +- Offset: `0x60` +- Reset default: `0x0` +- Reset mask: `0xfffff` + +### Fields + +```wavejson +{"reg": [{"name": "HOST_TIMEOUT_CTRL", "bits": 20, "attr": ["rw"], "rotate": 0}, {"bits": 12}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:20 | | | | Reserved | +| 19:0 | rw | 0x0 | HOST_TIMEOUT_CTRL | | + +## TARGET_TIMEOUT_CTRL +I2C target internal stretching timeout control. +When the target has stretched beyond this time it will send a NACK for incoming data bytes or release SDA for outgoing data bytes. +The behavior for the address byte is configurable via [`CTRL.ACK_ADDR_AFTER_TIMEOUT.`](#ctrl) +Note that the count accumulates stretching time over the course of a transaction. +In other words, this is equivalent to the SMBus cumulative target clock extension time. +- Offset: `0x64` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VAL", "bits": 31, "attr": ["rw"], "rotate": 0}, {"name": "EN", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------| +| 31 | rw | 0x0 | EN | Enable timeout feature and send NACK once the timeout has been reached | +| 30:0 | rw | 0x0 | VAL | Clock stretching timeout value (in units of input clock frequency) | + +## TARGET_NACK_COUNT +Number of times the I2C target has NACK'ed a new transaction since the last read of this register. +Reading this register clears it. +This is useful because when the ACQ FIFO is full the software know that a NACK has occurred, but without this register would not know how many transactions it missed. +When it reaches its maximum value it will stay at that value. +- Offset: `0x68` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "TARGET_NACK_COUNT", "bits": 8, "attr": ["rc"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:8 | | | | Reserved | +| 7:0 | rc | 0x0 | TARGET_NACK_COUNT | | + +## TARGET_ACK_CTRL +Controls for mid-transfer (N)ACK phase handling +- Offset: `0x6c` +- Reset default: `0x0` +- Reset mask: `0x800001ff` + +### Fields + +```wavejson +{"reg": [{"name": "NBYTES", "bits": 9, "attr": ["rw"], "rotate": 0}, {"bits": 22}, {"name": "NACK", "bits": 1, "attr": ["wo"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------------| +| 31 | wo | x | [NACK](#target_ack_ctrl--nack) | +| 30:9 | | | Reserved | +| 8:0 | rw | x | [NBYTES](#target_ack_ctrl--nbytes) | + +### TARGET_ACK_CTRL . NACK +When the Target module stretches on the (N)ACK phase of a Write due to [`TARGET_ACK_CTRL.NBYTES`](#target_ack_ctrl) being 0, writing a 1 here will cause it to send a NACK. + +If software chooses to NACK, note that the NACKing behavior is the same as if a stretch timeout occurred. +The rest of the transaction will be NACK'd, including subsequent transfers. +For the address byte, the (N)ACK phase of subsequent transfers will follow the behavior specified by [`CTRL.NACK_ADDR_AFTER_TIMEOUT.`](#ctrl) + +Automatically clears to 0. + +### TARGET_ACK_CTRL . NBYTES +Remaining number of bytes the Target module may ACK automatically. + +If [`CTRL.ACK_CTRL_EN`](#ctrl) is set to 1, the Target module will stretch the clock at the (N)ACK phase of a byte if this CSR is 0, awaiting software's instructions. + +At the beginning of each Write transfer, this byte count is reset to 0. +Writes to this CSR also are only accepted while the Target module is stretching the clock. +The Target module will always ACK its address if the ACQ FIFO has space. +For data bytes afterwards, it will stop at the (N)ACK phase and stretch the clock when this CSR is 0. +For each data byte that is ACK'd in a transaction, the byte count will decrease by 1. + +Note that a full ACQ FIFO can still cause the Target module to halt at the beginning of a new byte. +The ACK Control Mode provides an additional synchronization point, during the (N)ACK phase instead of after. +For both cases, [`TARGET_TIMEOUT_CTRL`](#target_timeout_ctrl) applies, and stretching past the timeout will produce an automatic NACK. + +This mode can be used to implement the mid-transfer (N)ACK responses required by various SMBus protocols. + +## ACQ_FIFO_NEXT_DATA +The data byte pending to be written to the ACQ FIFO. + +This CSR is only valid while the Target module is stretching in the (N)ACK phase, indicated by [`STATUS.ACK_CTRL_STRETCH`](#status) . +It is intended to be used with ACK Control Mode, so software may check the current byte. +- Offset: `0x70` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "ACQ_FIFO_NEXT_DATA", "bits": 8, "attr": ["ro"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 200}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------|:--------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | x | ACQ_FIFO_NEXT_DATA | | + +## HOST_NACK_HANDLER_TIMEOUT +Timeout in Host-Mode for an unhandled NACK before hardware automatically ends the transaction. +(in units of input clock frequency) + +If an active Controller-Transmitter transfer receives a NACK from the Target, the [`CONTROLLER_EVENTS.NACK`](#controller_events) bit is set. +In turn, this causes the Controller FSM to halt awaiting software intervention, and the 'controller_halt' interrupt may assert. +Software must clear the [`CONTROLLER_EVENTS.NACK`](#controller_events) bit to allow the state machine to continue, typically after clearing out the FMTFIFO to start a new transfer. +While halted, the active transaction is not ended (no STOP (P) condition is created), and the block asserts SCL and leaves SDA released. + +This timeout can be used to automatically produce a STOP condition, whether as a backstop for slow software responses (longer timeout) or as a convenience (short timeout). +If the timeout expires, the Controller FSM will issue a STOP (P) condition on the bus to end the active transaction. +Additionally, the [`CONTROLLER_EVENTS.UNHANDLED_NACK_TIMEOUT`](#controller_events) bit is set to alert software, and the FSM will return to the idle state and halt until the bit is cleared. + +The enable bit must be set for this feature to operate. +- Offset: `0x74` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VAL", "bits": 31, "attr": ["rw"], "rotate": 0}, {"name": "EN", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------| +| 31 | rw | 0x0 | EN | Timeout enable | +| 30:0 | rw | 0x0 | VAL | Unhandled NAK timeout value (in units of input clock frequency) | + +## CONTROLLER_EVENTS +Latched events that explain why the controller halted. + +Any bits that are set must be written (with a 1) to clear the CONTROLLER_HALT interrupt. +- Offset: `0x78` +- Reset default: `0x0` +- Reset mask: `0xf` + +### Fields + +```wavejson +{"reg": [{"name": "NACK", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "UNHANDLED_NACK_TIMEOUT", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "BUS_TIMEOUT", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "ARBITRATION_LOST", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"bits": 28}], "config": {"lanes": 1, "fontsize": 10, "vspace": 240}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------|:--------------------------------------------------------------------------------------------------------------------------| +| 31:4 | | | | Reserved | +| 3 | rw1c | 0x0 | ARBITRATION_LOST | A Host-Mode active transaction has terminated due to lost arbitration. | +| 2 | rw1c | 0x0 | BUS_TIMEOUT | A Host-Mode active transaction has terminated due to a bus timeout activated by [`TIMEOUT_CTRL.`](#timeout_ctrl) | +| 1 | rw1c | 0x0 | UNHANDLED_NACK_TIMEOUT | A Host-Mode active transaction has been ended by the [`HOST_NACK_HANDLER_TIMEOUT`](#host_nack_handler_timeout) mechanism. | +| 0 | rw1c | 0x0 | NACK | Received an unexpected NACK | + +## TARGET_EVENTS +Latched events that can cause the target module to stretch the clock at the beginning of a read transfer. + +These events cause TX FIFO-related stretching even when the TX FIFO has data available. +Any bits that are set must be written (with a 1) to clear the tx_stretch interrupt. + +This CSR serves as a gate to prevent the Target module from responding to a read command with unrelated, leftover data. +- Offset: `0x7c` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "TX_PENDING", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "BUS_TIMEOUT", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "ARBITRATION_LOST", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------------------------------| +| 31:3 | | | Reserved | +| 2 | rw1c | 0x0 | [ARBITRATION_LOST](#target_events--arbitration_lost) | +| 1 | rw1c | 0x0 | [BUS_TIMEOUT](#target_events--bus_timeout) | +| 0 | rw1c | 0x0 | [TX_PENDING](#target_events--tx_pending) | + +### TARGET_EVENTS . ARBITRATION_LOST +A Target-Mode read transfer has terminated due to lost arbitration. + +### TARGET_EVENTS . BUS_TIMEOUT +A Target-Mode read transfer has terminated due to a bus timeout activated by [`TIMEOUT_CTRL.`](#timeout_ctrl) + +### TARGET_EVENTS . TX_PENDING +A new Target-Mode read transfer has arrived that addressed this target. + +This bit is used by software to confirm the release of the contents in the TX FIFO. +If the contents do not apply, software should first reset the TX FIFO, then load it with the correct data, then clear this bit. + +Optionally enabled by [`CTRL.TX_STRETCH_CTRL_EN.`](#ctrl) + diff --git a/docs/um/ip/irq_router/data/irq_router_regs.hjson b/docs/um/ip/irq_router/data/irq_router_regs.hjson new file mode 100644 index 00000000..941261c7 --- /dev/null +++ b/docs/um/ip/irq_router/data/irq_router_regs.hjson @@ -0,0 +1,32 @@ +// Copyright lowRISC contributors. +// Copyright 2023 ETH Zurich and University of Bologna. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 + +// Alessandro Ottaviano + +// Register layout for one interrupt line + +{ + name: "irq_router", + clock_primary: "clk_i", + bus_interfaces: [ + { protocol: "reg_iface", direction: "device"} + ], + + regwidth: "32", + registers: [ + { name: "IRQ_TARGET_MASK", + desc: "Target selection bitmask control register", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { bits: "31:0", + resval: 1, + name: "mask", + desc: "Target selection bitmask control register for single interrupt line. Reflects interrupt line logic level." + } + ], + } + ], +} \ No newline at end of file diff --git a/docs/um/ip/irq_router/data/irq_router_regs_doc.hjson b/docs/um/ip/irq_router/data/irq_router_regs_doc.hjson new file mode 100644 index 00000000..c0698f23 --- /dev/null +++ b/docs/um/ip/irq_router/data/irq_router_regs_doc.hjson @@ -0,0 +1,36 @@ +// Copyright lowRISC contributors. +// Copyright 2023 ETH Zurich and University of Bologna. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 + +// Alessandro Ottaviano + +// Register layout for one interrupt line + +{ + name: "irq_router", + cip_id: "36", + version: "0.0.1-beta.1", + clocking: [ + {clock: "clk_i", reset: "rst_ni", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device"} + ], + + regwidth: "32", + registers: [ + { name: "IRQ_TARGET_MASK", + desc: "Target selection bitmask control register", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { bits: "31:0", + resval: 1, + name: "mask", + desc: "Target selection bitmask control register for single interrupt line. Reflects interrupt line logic level." + } + ], + } + ], +} \ No newline at end of file diff --git a/docs/um/ip/irq_router/doc/registers.md b/docs/um/ip/irq_router/doc/registers.md new file mode 100644 index 00000000..fe02b1f6 --- /dev/null +++ b/docs/um/ip/irq_router/doc/registers.md @@ -0,0 +1,22 @@ +## Summary + +| Name | Offset | Length | Description | +|:-------------------------------------------------|:---------|---------:|:------------------------------------------| +| irq_router.[`IRQ_TARGET_MASK`](#irq_target_mask) | 0x0 | 4 | Target selection bitmask control register | + +## IRQ_TARGET_MASK +Target selection bitmask control register +- Offset: `0x0` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "mask", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------| +| 31:0 | rw | 0x1 | mask | Target selection bitmask control register for single interrupt line. Reflects interrupt line logic level. | + diff --git a/docs/um/ip/mailbox/data/mailbox.hjson b/docs/um/ip/mailbox/data/mailbox.hjson new file mode 100644 index 00000000..34c9db63 --- /dev/null +++ b/docs/um/ip/mailbox/data/mailbox.hjson @@ -0,0 +1,146 @@ +// Copyright lowRISC contributors. +// Copyright 2023 ETH Zurich and University of Bologna. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 + +// Maicol Ciani +// Robert Balas + +// Register layout of one mailbox + +{ + name: "mailbox", + clock_primary: "clk_i", + bus_interfaces: [ + { protocol: "reg_iface", direction: "device"} + ], + + regwidth: "32", + registers: [ + { name: "IRQ_SND_STAT", + desc: "Sender interrupt status register", + swaccess: "ro", + hwaccess: "hrw", + hwext: "true", + fields: [ + { bits: "31:1", name: "reserved", desc: "reserved", swaccess: "ro", hwaccess: "none"}, + { bits: "0", + name: "stat", + desc: "Sender side interrupt status. Receiver confirms letter. Reflects interrupt line logic level." + } + ], + }, + { name: "IRQ_SND_SET", + desc: "Sender interrupt set register", + swaccess: "wo", // w1s + hwaccess: "hro", + hwext: "true", + hwqe: "true", + fields: [ + { bits: "31:1", name: "reserved", desc: "reserved", swaccess: "ro", hwaccess: "none"}, + { bits: "0", + name: "set", + desc: "Sender side interrupt set. Receiver confirms letter." + } + ], + }, + { name: "IRQ_SND_CLR", + desc: "Sender interrupt clear register", + swaccess: "wo", // w1c + hwaccess: "hro", + hwext: "true", + hwqe: "true", + fields: [ + { bits: "31:1", name: "reserved", desc: "reserved", swaccess: "ro", hwaccess: "none"}, + { bits: "0", + name: "clr", + desc: "Sender side interrupt clear. Receiver confirms letter." + } + ], + }, + { name: "IRQ_SND_EN", + desc: "Sender interrupt enable register", + swaccess: "rw", // rw + hwaccess: "hro", + fields: [ + { bits: "31:1", name: "reserved", desc: "reserved", swaccess: "ro", hwaccess: "none"}, + { bits: "0", + name: "en", + desc: "Sender side interrupt enable. Receiver confirms letter." + } + ], + }, + { reserved: "12" }, + { name: "IRQ_RCV_STAT", + desc: "Receiver interrupt status register", + swaccess: "ro", + hwaccess: "hrw", + hwext: "true", + fields: [ + { bits: "31:1", name: "reserved", desc: "reserved", swaccess: "ro", hwaccess: "none"}, + { bits: "0", + name: "stat", + desc: "Receiver side interrupt status. Sender notifies receiver of a new letter arriving. Reflects interrupt line logic level." + } + ], + }, + { name: "IRQ_RCV_SET", + desc: "Receiver interrupt set register", + swaccess: "wo", // w1s + hwaccess: "hro", + hwext: "true", + hwqe: "true", + fields: [ + { bits: "31:1", name: "reserved", desc: "reserved", swaccess: "ro", hwaccess: "none"}, + { bits: "0", + name: "set", + desc: "Receiver side interrupt set. Sender notifies receiver of a new letter arriving." + } + ], + }, + + { name: "IRQ_RCV_CLR", + desc: "Receiver interrupt clear register", + swaccess: "wo", // w1c + hwaccess: "hro", + hwext: "true", + hwqe: "true", + fields: [ + { bits: "31:1", name: "reserved", desc: "reserved", swaccess: "ro", hwaccess: "none"}, + { bits: "0", + name: "clr", + desc: "Receiver side interrupt clear. Sender notifies receiver of a new letter arriving." + } + ], + }, + { name: "IRQ_RCV_EN", + desc: "Receiver interrupt enable register", + swaccess: "rw", // rw + hwaccess: "hro", + fields: [ + { bits: "31:1", name: "reserved", desc: "reserved", swaccess: "ro", hwaccess: "none"}, + { bits: "0", + name: "en", + desc: "Receiver side interrupt enable. Sender notifies receiver of a new letter arriving." + } + ], + }, + { reserved: "12" }, + { name: "LETTER0", + desc: "Memory region 0 to put a message or pointer", + swaccess: "rw", + hwaccess: "none", + fields: [ + { bits: "31:0" } + ], + }, + { name: "LETTER1", + desc: "Memory region 1 to put a message or pointer", + swaccess: "rw", + hwaccess: "none", + fields: [ + { bits: "31:0" } + ], + }, + ], +} \ No newline at end of file diff --git a/docs/um/ip/mailbox/data/mailbox_doc.hjson b/docs/um/ip/mailbox/data/mailbox_doc.hjson new file mode 100644 index 00000000..0e62d20e --- /dev/null +++ b/docs/um/ip/mailbox/data/mailbox_doc.hjson @@ -0,0 +1,150 @@ +// Copyright lowRISC contributors. +// Copyright 2023 ETH Zurich and University of Bologna. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 + +// Maicol Ciani +// Robert Balas + +// Register layout of one mailbox + +{ + name: "mailbox", + cip_id: "36", + version: "1.1.0", + clocking: [ + {clock: "clk_i", reset: "rst_ni", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device"} + ], + + regwidth: "32", + registers: [ + { name: "IRQ_SND_STAT", + desc: "Sender interrupt status register", + swaccess: "ro", + hwaccess: "hrw", + hwext: "true", + fields: [ + { bits: "31:1", name: "reserved", desc: "reserved", swaccess: "ro", hwaccess: "none"}, + { bits: "0", + name: "stat", + desc: "Sender side interrupt status. Receiver confirms letter. Reflects interrupt line logic level." + } + ], + }, + { name: "IRQ_SND_SET", + desc: "Sender interrupt set register", + swaccess: "wo", // w1s + hwaccess: "hro", + hwext: "true", + hwqe: "true", + fields: [ + { bits: "31:1", name: "reserved", desc: "reserved", swaccess: "ro", hwaccess: "none"}, + { bits: "0", + name: "set", + desc: "Sender side interrupt set. Receiver confirms letter." + } + ], + }, + { name: "IRQ_SND_CLR", + desc: "Sender interrupt clear register", + swaccess: "wo", // w1c + hwaccess: "hro", + hwext: "true", + hwqe: "true", + fields: [ + { bits: "31:1", name: "reserved", desc: "reserved", swaccess: "ro", hwaccess: "none"}, + { bits: "0", + name: "clr", + desc: "Sender side interrupt clear. Receiver confirms letter." + } + ], + }, + { name: "IRQ_SND_EN", + desc: "Sender interrupt enable register", + swaccess: "rw", // rw + hwaccess: "hro", + fields: [ + { bits: "31:1", name: "reserved", desc: "reserved", swaccess: "ro", hwaccess: "none"}, + { bits: "0", + name: "en", + desc: "Sender side interrupt enable. Receiver confirms letter." + } + ], + }, + { reserved: "12" }, + { name: "IRQ_RCV_STAT", + desc: "Receiver interrupt status register", + swaccess: "ro", + hwaccess: "hrw", + hwext: "true", + fields: [ + { bits: "31:1", name: "reserved", desc: "reserved", swaccess: "ro", hwaccess: "none"}, + { bits: "0", + name: "stat", + desc: "Receiver side interrupt status. Sender notifies receiver of a new letter arriving. Reflects interrupt line logic level." + } + ], + }, + { name: "IRQ_RCV_SET", + desc: "Receiver interrupt set register", + swaccess: "wo", // w1s + hwaccess: "hro", + hwext: "true", + hwqe: "true", + fields: [ + { bits: "31:1", name: "reserved", desc: "reserved", swaccess: "ro", hwaccess: "none"}, + { bits: "0", + name: "set", + desc: "Receiver side interrupt set. Sender notifies receiver of a new letter arriving." + } + ], + }, + + { name: "IRQ_RCV_CLR", + desc: "Receiver interrupt clear register", + swaccess: "wo", // w1c + hwaccess: "hro", + hwext: "true", + hwqe: "true", + fields: [ + { bits: "31:1", name: "reserved", desc: "reserved", swaccess: "ro", hwaccess: "none"}, + { bits: "0", + name: "clr", + desc: "Receiver side interrupt clear. Sender notifies receiver of a new letter arriving." + } + ], + }, + { name: "IRQ_RCV_EN", + desc: "Receiver interrupt enable register", + swaccess: "rw", // rw + hwaccess: "hro", + fields: [ + { bits: "31:1", name: "reserved", desc: "reserved", swaccess: "ro", hwaccess: "none"}, + { bits: "0", + name: "en", + desc: "Receiver side interrupt enable. Sender notifies receiver of a new letter arriving." + } + ], + }, + { reserved: "12" }, + { name: "LETTER0", + desc: "Memory region 0 to put a message or pointer", + swaccess: "rw", + hwaccess: "none", + fields: [ + { bits: "31:0" } + ], + }, + { name: "LETTER1", + desc: "Memory region 1 to put a message or pointer", + swaccess: "rw", + hwaccess: "none", + fields: [ + { bits: "31:0" } + ], + }, + ], +} \ No newline at end of file diff --git a/docs/um/ip/mailbox/doc/registers.md b/docs/um/ip/mailbox/doc/registers.md new file mode 100644 index 00000000..b253eb73 --- /dev/null +++ b/docs/um/ip/mailbox/doc/registers.md @@ -0,0 +1,183 @@ +## Summary + +| Name | Offset | Length | Description | +|:----------------------------------------|:---------|---------:|:--------------------------------------------| +| mailbox.[`IRQ_SND_STAT`](#irq_snd_stat) | 0x0 | 4 | Sender interrupt status register | +| mailbox.[`IRQ_SND_SET`](#irq_snd_set) | 0x4 | 4 | Sender interrupt set register | +| mailbox.[`IRQ_SND_CLR`](#irq_snd_clr) | 0x8 | 4 | Sender interrupt clear register | +| mailbox.[`IRQ_SND_EN`](#irq_snd_en) | 0xc | 4 | Sender interrupt enable register | +| mailbox.[`IRQ_RCV_STAT`](#irq_rcv_stat) | 0x40 | 4 | Receiver interrupt status register | +| mailbox.[`IRQ_RCV_SET`](#irq_rcv_set) | 0x44 | 4 | Receiver interrupt set register | +| mailbox.[`IRQ_RCV_CLR`](#irq_rcv_clr) | 0x48 | 4 | Receiver interrupt clear register | +| mailbox.[`IRQ_RCV_EN`](#irq_rcv_en) | 0x4c | 4 | Receiver interrupt enable register | +| mailbox.[`LETTER0`](#letter0) | 0x80 | 4 | Memory region 0 to put a message or pointer | +| mailbox.[`LETTER1`](#letter1) | 0x84 | 4 | Memory region 1 to put a message or pointer | + +## IRQ_SND_STAT +Sender interrupt status register +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "stat", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "reserved", "bits": 31, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:---------------------------------------------------------------------------------------------| +| 31:1 | ro | x | reserved | reserved | +| 0 | ro | x | stat | Sender side interrupt status. Receiver confirms letter. Reflects interrupt line logic level. | + +## IRQ_SND_SET +Sender interrupt set register +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "set", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "reserved", "bits": 31, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:-----------------------------------------------------| +| 31:1 | ro | x | reserved | reserved | +| 0 | wo | x | set | Sender side interrupt set. Receiver confirms letter. | + +## IRQ_SND_CLR +Sender interrupt clear register +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "clr", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "reserved", "bits": 31, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:-------------------------------------------------------| +| 31:1 | ro | x | reserved | reserved | +| 0 | wo | x | clr | Sender side interrupt clear. Receiver confirms letter. | + +## IRQ_SND_EN +Sender interrupt enable register +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "en", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "reserved", "bits": 31, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------------------------------------------------| +| 31:1 | ro | 0x0 | reserved | reserved | +| 0 | rw | 0x0 | en | Sender side interrupt enable. Receiver confirms letter. | + +## IRQ_RCV_STAT +Receiver interrupt status register +- Offset: `0x40` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "stat", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "reserved", "bits": 31, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:------------------------------------------------------------------------------------------------------------------------| +| 31:1 | ro | x | reserved | reserved | +| 0 | ro | x | stat | Receiver side interrupt status. Sender notifies receiver of a new letter arriving. Reflects interrupt line logic level. | + +## IRQ_RCV_SET +Receiver interrupt set register +- Offset: `0x44` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "set", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "reserved", "bits": 31, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------------------------------------------------------------------------| +| 31:1 | ro | x | reserved | reserved | +| 0 | wo | x | set | Receiver side interrupt set. Sender notifies receiver of a new letter arriving. | + +## IRQ_RCV_CLR +Receiver interrupt clear register +- Offset: `0x48` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "clr", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "reserved", "bits": 31, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:----------------------------------------------------------------------------------| +| 31:1 | ro | x | reserved | reserved | +| 0 | wo | x | clr | Receiver side interrupt clear. Sender notifies receiver of a new letter arriving. | + +## IRQ_RCV_EN +Receiver interrupt enable register +- Offset: `0x4c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "en", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "reserved", "bits": 31, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:-----------------------------------------------------------------------------------| +| 31:1 | ro | 0x0 | reserved | reserved | +| 0 | rw | 0x0 | en | Receiver side interrupt enable. Sender notifies receiver of a new letter arriving. | + +## LETTER0 +Memory region 0 to put a message or pointer +- Offset: `0x80` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "LETTER0", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------| +| 31:0 | rw | 0x0 | LETTER0 | | + +## LETTER1 +Memory region 1 to put a message or pointer +- Offset: `0x84` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "LETTER1", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------| +| 31:0 | rw | 0x0 | LETTER1 | | + diff --git a/docs/um/ip/plic/data/plic.hjson b/docs/um/ip/plic/data/plic.hjson new file mode 100644 index 00000000..a9576646 --- /dev/null +++ b/docs/um/ip/plic/data/plic.hjson @@ -0,0 +1,412 @@ +// Copyright lowRISC contributors. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 +// +# RV_PLIC register template +# +# Parameter (given by Python tool) +# - src: Number of Interrupt Sources +# - target: Number of Targets that handle interrupt requests +# - prio: Max value of interrupt priorities +# - module_instance_name: Module instance name. +{ + name: "rv_plic", + clock_primary: "clk_i", + bus_interfaces: [ + { protocol: "reg_iface", direction: "device" } + ], + + param_list: [ + { name: "NumSrc", + desc: "Number of interrupt sources", + type: "int", + default: "32", + local: "true" + }, + { name: "NumTarget", + desc: "Number of Targets (Harts)", + type: "int", + default: "1", + local: "true", + }, + { name: "PrioWidth", + desc: "Width of priority signals", + type: "int", + default: "3", + local: "true", + }, + ], + + // In order to not disturb the PLIC address map, we place the alert test + // register manually at a safe offset after the main CSRs. + no_auto_alert_regs: "True", + alert_list: [ + { name: "fatal_fault", + desc: ''' + This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected. + ''' + } + ], + + inter_signal_list: [ + { struct: "logic", + type: "uni", + name: "irq", + act: "req", + package: "", + width: "1" + }, + + { struct: "logic", + type: "uni", + name: "irq_id", + act: "req", + package: "", + }, + + { struct: "logic", + type: "uni", + name: "msip", + act: "req", + package: "", + width: "1" + }, + ] + + regwidth: "32", + registers: [ + { name: "PRIO0", + desc: "Interrupt Source 0 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO1", + desc: "Interrupt Source 1 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO2", + desc: "Interrupt Source 2 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO3", + desc: "Interrupt Source 3 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO4", + desc: "Interrupt Source 4 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO5", + desc: "Interrupt Source 5 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO6", + desc: "Interrupt Source 6 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO7", + desc: "Interrupt Source 7 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO8", + desc: "Interrupt Source 8 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO9", + desc: "Interrupt Source 9 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO10", + desc: "Interrupt Source 10 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO11", + desc: "Interrupt Source 11 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO12", + desc: "Interrupt Source 12 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO13", + desc: "Interrupt Source 13 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO14", + desc: "Interrupt Source 14 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO15", + desc: "Interrupt Source 15 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO16", + desc: "Interrupt Source 16 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO17", + desc: "Interrupt Source 17 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO18", + desc: "Interrupt Source 18 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO19", + desc: "Interrupt Source 19 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO20", + desc: "Interrupt Source 20 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO21", + desc: "Interrupt Source 21 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO22", + desc: "Interrupt Source 22 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO23", + desc: "Interrupt Source 23 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO24", + desc: "Interrupt Source 24 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO25", + desc: "Interrupt Source 25 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO26", + desc: "Interrupt Source 26 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO27", + desc: "Interrupt Source 27 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO28", + desc: "Interrupt Source 28 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO29", + desc: "Interrupt Source 29 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO30", + desc: "Interrupt Source 30 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO31", + desc: "Interrupt Source 31 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { skipto: "0x00001000" } + { multireg: { + name: "IP", + desc: "Interrupt Pending", + count: "NumSrc", + cname: "RV_PLIC", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + { bits: "0", name: "P", desc: "Interrupt Pending of Source" } + ], + tags: [// IP is driven by intr_src, cannot auto-predict + "excl:CsrNonInitTests:CsrExclCheck"], + } + }, + { skipto: "0x2000" } + { multireg: { + name: "IE0", + desc: "Interrupt Enable for Target 0", + count: "NumSrc", + cname: "RV_PLIC", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "0", name: "E", desc: "Interrupt Enable of Source" } + ], + } + } + { skipto: "0x200000" } + { name: "THRESHOLD0", + desc: "Threshold of priority for Target 0", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "CC0", + desc: '''Claim interrupt by read, complete interrupt by write for Target 0. + Value read/written is interrupt ID. Reading a value of 0 means no pending interrupts.''', + swaccess: "rw", + hwaccess: "hrw", + hwext: "true", + hwqe: "true", + hwre: "true", + fields: [ + { bits: "4:0" } + ], + tags: [// CC register value is related to IP + "excl:CsrNonInitTests:CsrExclCheck"], + } + { skipto: "0x4000000" } + { name: "MSIP0", + desc: '''msip for Hart 0. + Write 1 to here asserts software interrupt for Hart msip_o[0], write 0 to clear.''', + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "0", + desc: "Software Interrupt Pending register", + } + ], + } + { skipto: "0x4004000" } + { name: "ALERT_TEST", + desc: '''Alert Test Register.''', + swaccess: "wo", + hwaccess: "hro", + hwqe: "True", + hwext: "True", + fields: [ + { bits: "0", + name: "fatal_fault", + desc: "'Write 1 to trigger one alert event of this kind.'", + } + ], + } + ], +} \ No newline at end of file diff --git a/docs/um/ip/plic/data/plic_doc.hjson b/docs/um/ip/plic/data/plic_doc.hjson new file mode 100644 index 00000000..e8a632e0 --- /dev/null +++ b/docs/um/ip/plic/data/plic_doc.hjson @@ -0,0 +1,416 @@ +// Copyright lowRISC contributors. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 +// +# RV_PLIC register template +# +# Parameter (given by Python tool) +# - src: Number of Interrupt Sources +# - target: Number of Targets that handle interrupt requests +# - prio: Max value of interrupt priorities +# - module_instance_name: Module instance name. +{ + name: "rv_plic", + cip_id: "36", + version: "0.0.0", //used in opentitan_peripherals from pulp platform + clocking: [ + {clock: "clk_i", reset: "rst_ni", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device" } + ], + + param_list: [ + { name: "NumSrc", + desc: "Number of interrupt sources", + type: "int", + default: "32", + local: "true" + }, + { name: "NumTarget", + desc: "Number of Targets (Harts)", + type: "int", + default: "1", + local: "true", + }, + { name: "PrioWidth", + desc: "Width of priority signals", + type: "int", + default: "3", + local: "true", + }, + ], + + // In order to not disturb the PLIC address map, we place the alert test + // register manually at a safe offset after the main CSRs. + no_auto_alert_regs: "True", + alert_list: [ + { name: "fatal_fault", + desc: ''' + This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected. + ''' + } + ], + + inter_signal_list: [ + { struct: "logic", + type: "uni", + name: "irq", + act: "req", + package: "", + width: "1" + }, + + { struct: "logic", + type: "uni", + name: "irq_id", + act: "req", + package: "", + }, + + { struct: "logic", + type: "uni", + name: "msip", + act: "req", + package: "", + width: "1" + }, + ] + + regwidth: "32", + registers: [ + { name: "PRIO0", + desc: "Interrupt Source 0 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO1", + desc: "Interrupt Source 1 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO2", + desc: "Interrupt Source 2 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO3", + desc: "Interrupt Source 3 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO4", + desc: "Interrupt Source 4 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO5", + desc: "Interrupt Source 5 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO6", + desc: "Interrupt Source 6 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO7", + desc: "Interrupt Source 7 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO8", + desc: "Interrupt Source 8 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO9", + desc: "Interrupt Source 9 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO10", + desc: "Interrupt Source 10 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO11", + desc: "Interrupt Source 11 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO12", + desc: "Interrupt Source 12 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO13", + desc: "Interrupt Source 13 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO14", + desc: "Interrupt Source 14 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO15", + desc: "Interrupt Source 15 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO16", + desc: "Interrupt Source 16 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO17", + desc: "Interrupt Source 17 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO18", + desc: "Interrupt Source 18 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO19", + desc: "Interrupt Source 19 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO20", + desc: "Interrupt Source 20 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO21", + desc: "Interrupt Source 21 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO22", + desc: "Interrupt Source 22 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO23", + desc: "Interrupt Source 23 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO24", + desc: "Interrupt Source 24 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO25", + desc: "Interrupt Source 25 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO26", + desc: "Interrupt Source 26 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO27", + desc: "Interrupt Source 27 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO28", + desc: "Interrupt Source 28 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO29", + desc: "Interrupt Source 29 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO30", + desc: "Interrupt Source 30 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "PRIO31", + desc: "Interrupt Source 31 Priority", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { skipto: "0x00001000" } + { multireg: { + name: "IP", + desc: "Interrupt Pending", + count: "NumSrc", + cname: "RV_PLIC", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + { bits: "0", name: "P", desc: "Interrupt Pending of Source" } + ], + tags: [// IP is driven by intr_src, cannot auto-predict + "excl:CsrNonInitTests:CsrExclCheck"], + } + }, + { skipto: "0x2000" } + { multireg: { + name: "IE0", + desc: "Interrupt Enable for Target 0", + count: "NumSrc", + cname: "RV_PLIC", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "0", name: "E", desc: "Interrupt Enable of Source" } + ], + } + } + { skipto: "0x200000" } + { name: "THRESHOLD0", + desc: "Threshold of priority for Target 0", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "2:0" } + ], + } + { name: "CC0", + desc: '''Claim interrupt by read, complete interrupt by write for Target 0. + Value read/written is interrupt ID. Reading a value of 0 means no pending interrupts.''', + swaccess: "rw", + hwaccess: "hrw", + hwext: "true", + hwqe: "true", + hwre: "true", + fields: [ + { bits: "4:0" } + ], + tags: [// CC register value is related to IP + "excl:CsrNonInitTests:CsrExclCheck"], + } + { skipto: "0x4000000" } + { name: "MSIP0", + desc: '''msip for Hart 0. + Write 1 to here asserts software interrupt for Hart msip_o[0], write 0 to clear.''', + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "0", + desc: "Software Interrupt Pending register", + } + ], + } + { skipto: "0x4004000" } + { name: "ALERT_TEST", + desc: '''Alert Test Register.''', + swaccess: "wo", + hwaccess: "hro", + hwqe: "True", + hwext: "True", + fields: [ + { bits: "0", + name: "fatal_fault", + desc: "'Write 1 to trigger one alert event of this kind.'", + } + ], + } + ], +} \ No newline at end of file diff --git a/docs/um/ip/plic/doc/registers.md b/docs/um/ip/plic/doc/registers.md new file mode 100644 index 00000000..3717573a --- /dev/null +++ b/docs/um/ip/plic/doc/registers.md @@ -0,0 +1,751 @@ +## Summary + +| Name | Offset | Length | Description | +|:------------------------------------|:----------|---------:|:-------------------------------------------------------------------| +| rv_plic.[`PRIO0`](#prio0) | 0x0 | 4 | Interrupt Source 0 Priority | +| rv_plic.[`PRIO1`](#prio1) | 0x4 | 4 | Interrupt Source 1 Priority | +| rv_plic.[`PRIO2`](#prio2) | 0x8 | 4 | Interrupt Source 2 Priority | +| rv_plic.[`PRIO3`](#prio3) | 0xc | 4 | Interrupt Source 3 Priority | +| rv_plic.[`PRIO4`](#prio4) | 0x10 | 4 | Interrupt Source 4 Priority | +| rv_plic.[`PRIO5`](#prio5) | 0x14 | 4 | Interrupt Source 5 Priority | +| rv_plic.[`PRIO6`](#prio6) | 0x18 | 4 | Interrupt Source 6 Priority | +| rv_plic.[`PRIO7`](#prio7) | 0x1c | 4 | Interrupt Source 7 Priority | +| rv_plic.[`PRIO8`](#prio8) | 0x20 | 4 | Interrupt Source 8 Priority | +| rv_plic.[`PRIO9`](#prio9) | 0x24 | 4 | Interrupt Source 9 Priority | +| rv_plic.[`PRIO10`](#prio10) | 0x28 | 4 | Interrupt Source 10 Priority | +| rv_plic.[`PRIO11`](#prio11) | 0x2c | 4 | Interrupt Source 11 Priority | +| rv_plic.[`PRIO12`](#prio12) | 0x30 | 4 | Interrupt Source 12 Priority | +| rv_plic.[`PRIO13`](#prio13) | 0x34 | 4 | Interrupt Source 13 Priority | +| rv_plic.[`PRIO14`](#prio14) | 0x38 | 4 | Interrupt Source 14 Priority | +| rv_plic.[`PRIO15`](#prio15) | 0x3c | 4 | Interrupt Source 15 Priority | +| rv_plic.[`PRIO16`](#prio16) | 0x40 | 4 | Interrupt Source 16 Priority | +| rv_plic.[`PRIO17`](#prio17) | 0x44 | 4 | Interrupt Source 17 Priority | +| rv_plic.[`PRIO18`](#prio18) | 0x48 | 4 | Interrupt Source 18 Priority | +| rv_plic.[`PRIO19`](#prio19) | 0x4c | 4 | Interrupt Source 19 Priority | +| rv_plic.[`PRIO20`](#prio20) | 0x50 | 4 | Interrupt Source 20 Priority | +| rv_plic.[`PRIO21`](#prio21) | 0x54 | 4 | Interrupt Source 21 Priority | +| rv_plic.[`PRIO22`](#prio22) | 0x58 | 4 | Interrupt Source 22 Priority | +| rv_plic.[`PRIO23`](#prio23) | 0x5c | 4 | Interrupt Source 23 Priority | +| rv_plic.[`PRIO24`](#prio24) | 0x60 | 4 | Interrupt Source 24 Priority | +| rv_plic.[`PRIO25`](#prio25) | 0x64 | 4 | Interrupt Source 25 Priority | +| rv_plic.[`PRIO26`](#prio26) | 0x68 | 4 | Interrupt Source 26 Priority | +| rv_plic.[`PRIO27`](#prio27) | 0x6c | 4 | Interrupt Source 27 Priority | +| rv_plic.[`PRIO28`](#prio28) | 0x70 | 4 | Interrupt Source 28 Priority | +| rv_plic.[`PRIO29`](#prio29) | 0x74 | 4 | Interrupt Source 29 Priority | +| rv_plic.[`PRIO30`](#prio30) | 0x78 | 4 | Interrupt Source 30 Priority | +| rv_plic.[`PRIO31`](#prio31) | 0x7c | 4 | Interrupt Source 31 Priority | +| rv_plic.[`IP`](#IP) | 0x1000 | 4 | Interrupt Pending | +| rv_plic.[`IE0`](#IE0) | 0x2000 | 4 | Interrupt Enable for Target 0 | +| rv_plic.[`THRESHOLD0`](#threshold0) | 0x200000 | 4 | Threshold of priority for Target 0 | +| rv_plic.[`CC0`](#cc0) | 0x200004 | 4 | Claim interrupt by read, complete interrupt by write for Target 0. | +| rv_plic.[`MSIP0`](#msip0) | 0x4000000 | 4 | msip for Hart 0. | +| rv_plic.[`ALERT_TEST`](#alert_test) | 0x4004000 | 4 | Alert Test Register. | + +## PRIO0 +Interrupt Source 0 Priority +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO0", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO0 | | + +## PRIO1 +Interrupt Source 1 Priority +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO1", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO1 | | + +## PRIO2 +Interrupt Source 2 Priority +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO2", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO2 | | + +## PRIO3 +Interrupt Source 3 Priority +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO3", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO3 | | + +## PRIO4 +Interrupt Source 4 Priority +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO4", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO4 | | + +## PRIO5 +Interrupt Source 5 Priority +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO5", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO5 | | + +## PRIO6 +Interrupt Source 6 Priority +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO6", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO6 | | + +## PRIO7 +Interrupt Source 7 Priority +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO7", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO7 | | + +## PRIO8 +Interrupt Source 8 Priority +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO8", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO8 | | + +## PRIO9 +Interrupt Source 9 Priority +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO9", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO9 | | + +## PRIO10 +Interrupt Source 10 Priority +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO10", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO10 | | + +## PRIO11 +Interrupt Source 11 Priority +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO11", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO11 | | + +## PRIO12 +Interrupt Source 12 Priority +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO12", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO12 | | + +## PRIO13 +Interrupt Source 13 Priority +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO13", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO13 | | + +## PRIO14 +Interrupt Source 14 Priority +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO14", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO14 | | + +## PRIO15 +Interrupt Source 15 Priority +- Offset: `0x3c` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO15", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO15 | | + +## PRIO16 +Interrupt Source 16 Priority +- Offset: `0x40` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO16", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO16 | | + +## PRIO17 +Interrupt Source 17 Priority +- Offset: `0x44` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO17", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO17 | | + +## PRIO18 +Interrupt Source 18 Priority +- Offset: `0x48` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO18", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO18 | | + +## PRIO19 +Interrupt Source 19 Priority +- Offset: `0x4c` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO19", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO19 | | + +## PRIO20 +Interrupt Source 20 Priority +- Offset: `0x50` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO20", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO20 | | + +## PRIO21 +Interrupt Source 21 Priority +- Offset: `0x54` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO21", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO21 | | + +## PRIO22 +Interrupt Source 22 Priority +- Offset: `0x58` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO22", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO22 | | + +## PRIO23 +Interrupt Source 23 Priority +- Offset: `0x5c` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO23", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO23 | | + +## PRIO24 +Interrupt Source 24 Priority +- Offset: `0x60` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO24", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO24 | | + +## PRIO25 +Interrupt Source 25 Priority +- Offset: `0x64` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO25", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO25 | | + +## PRIO26 +Interrupt Source 26 Priority +- Offset: `0x68` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO26", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO26 | | + +## PRIO27 +Interrupt Source 27 Priority +- Offset: `0x6c` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO27", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO27 | | + +## PRIO28 +Interrupt Source 28 Priority +- Offset: `0x70` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO28", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO28 | | + +## PRIO29 +Interrupt Source 29 Priority +- Offset: `0x74` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO29", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO29 | | + +## PRIO30 +Interrupt Source 30 Priority +- Offset: `0x78` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO30", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO30 | | + +## PRIO31 +Interrupt Source 31 Priority +- Offset: `0x7c` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO31", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO31 | | + +## IP +Interrupt Pending +- Offset: `0x1000` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "P_0", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_1", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_2", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_3", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_4", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_5", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_6", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_7", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_8", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_9", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_10", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_11", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_12", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_13", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_14", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_15", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_16", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_17", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_18", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_19", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_20", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_21", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_22", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_23", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_24", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_25", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_26", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_27", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_28", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_29", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_30", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_31", "bits": 1, "attr": ["ro"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------| +| 31 | ro | 0x0 | P_31 | Interrupt Pending of Source | +| 30 | ro | 0x0 | P_30 | Interrupt Pending of Source | +| 29 | ro | 0x0 | P_29 | Interrupt Pending of Source | +| 28 | ro | 0x0 | P_28 | Interrupt Pending of Source | +| 27 | ro | 0x0 | P_27 | Interrupt Pending of Source | +| 26 | ro | 0x0 | P_26 | Interrupt Pending of Source | +| 25 | ro | 0x0 | P_25 | Interrupt Pending of Source | +| 24 | ro | 0x0 | P_24 | Interrupt Pending of Source | +| 23 | ro | 0x0 | P_23 | Interrupt Pending of Source | +| 22 | ro | 0x0 | P_22 | Interrupt Pending of Source | +| 21 | ro | 0x0 | P_21 | Interrupt Pending of Source | +| 20 | ro | 0x0 | P_20 | Interrupt Pending of Source | +| 19 | ro | 0x0 | P_19 | Interrupt Pending of Source | +| 18 | ro | 0x0 | P_18 | Interrupt Pending of Source | +| 17 | ro | 0x0 | P_17 | Interrupt Pending of Source | +| 16 | ro | 0x0 | P_16 | Interrupt Pending of Source | +| 15 | ro | 0x0 | P_15 | Interrupt Pending of Source | +| 14 | ro | 0x0 | P_14 | Interrupt Pending of Source | +| 13 | ro | 0x0 | P_13 | Interrupt Pending of Source | +| 12 | ro | 0x0 | P_12 | Interrupt Pending of Source | +| 11 | ro | 0x0 | P_11 | Interrupt Pending of Source | +| 10 | ro | 0x0 | P_10 | Interrupt Pending of Source | +| 9 | ro | 0x0 | P_9 | Interrupt Pending of Source | +| 8 | ro | 0x0 | P_8 | Interrupt Pending of Source | +| 7 | ro | 0x0 | P_7 | Interrupt Pending of Source | +| 6 | ro | 0x0 | P_6 | Interrupt Pending of Source | +| 5 | ro | 0x0 | P_5 | Interrupt Pending of Source | +| 4 | ro | 0x0 | P_4 | Interrupt Pending of Source | +| 3 | ro | 0x0 | P_3 | Interrupt Pending of Source | +| 2 | ro | 0x0 | P_2 | Interrupt Pending of Source | +| 1 | ro | 0x0 | P_1 | Interrupt Pending of Source | +| 0 | ro | 0x0 | P_0 | Interrupt Pending of Source | + +## IE0 +Interrupt Enable for Target 0 +- Offset: `0x2000` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "E_0", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_1", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_2", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_3", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_4", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_5", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_6", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_7", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_8", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_9", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_10", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_11", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_12", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_13", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_14", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_15", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_16", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_17", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_18", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_19", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_20", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_21", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_22", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_23", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_24", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_25", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_26", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_27", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_28", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_29", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_30", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_31", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------| +| 31 | rw | 0x0 | E_31 | Interrupt Enable of Source | +| 30 | rw | 0x0 | E_30 | Interrupt Enable of Source | +| 29 | rw | 0x0 | E_29 | Interrupt Enable of Source | +| 28 | rw | 0x0 | E_28 | Interrupt Enable of Source | +| 27 | rw | 0x0 | E_27 | Interrupt Enable of Source | +| 26 | rw | 0x0 | E_26 | Interrupt Enable of Source | +| 25 | rw | 0x0 | E_25 | Interrupt Enable of Source | +| 24 | rw | 0x0 | E_24 | Interrupt Enable of Source | +| 23 | rw | 0x0 | E_23 | Interrupt Enable of Source | +| 22 | rw | 0x0 | E_22 | Interrupt Enable of Source | +| 21 | rw | 0x0 | E_21 | Interrupt Enable of Source | +| 20 | rw | 0x0 | E_20 | Interrupt Enable of Source | +| 19 | rw | 0x0 | E_19 | Interrupt Enable of Source | +| 18 | rw | 0x0 | E_18 | Interrupt Enable of Source | +| 17 | rw | 0x0 | E_17 | Interrupt Enable of Source | +| 16 | rw | 0x0 | E_16 | Interrupt Enable of Source | +| 15 | rw | 0x0 | E_15 | Interrupt Enable of Source | +| 14 | rw | 0x0 | E_14 | Interrupt Enable of Source | +| 13 | rw | 0x0 | E_13 | Interrupt Enable of Source | +| 12 | rw | 0x0 | E_12 | Interrupt Enable of Source | +| 11 | rw | 0x0 | E_11 | Interrupt Enable of Source | +| 10 | rw | 0x0 | E_10 | Interrupt Enable of Source | +| 9 | rw | 0x0 | E_9 | Interrupt Enable of Source | +| 8 | rw | 0x0 | E_8 | Interrupt Enable of Source | +| 7 | rw | 0x0 | E_7 | Interrupt Enable of Source | +| 6 | rw | 0x0 | E_6 | Interrupt Enable of Source | +| 5 | rw | 0x0 | E_5 | Interrupt Enable of Source | +| 4 | rw | 0x0 | E_4 | Interrupt Enable of Source | +| 3 | rw | 0x0 | E_3 | Interrupt Enable of Source | +| 2 | rw | 0x0 | E_2 | Interrupt Enable of Source | +| 1 | rw | 0x0 | E_1 | Interrupt Enable of Source | +| 0 | rw | 0x0 | E_0 | Interrupt Enable of Source | + +## THRESHOLD0 +Threshold of priority for Target 0 +- Offset: `0x200000` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "THRESHOLD0", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | THRESHOLD0 | | + +## CC0 +Claim interrupt by read, complete interrupt by write for Target 0. +Value read/written is interrupt ID. Reading a value of 0 means no pending interrupts. +- Offset: `0x200004` +- Reset default: `0x0` +- Reset mask: `0x1f` + +### Fields + +```wavejson +{"reg": [{"name": "CC0", "bits": 5, "attr": ["rw"], "rotate": 0}, {"bits": 27}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:5 | | | | Reserved | +| 4:0 | rw | x | CC0 | | + +## MSIP0 +msip for Hart 0. +Write 1 to here asserts software interrupt for Hart msip_o[0], write 0 to clear. +- Offset: `0x4000000` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "MSIP0", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | MSIP0 | Software Interrupt Pending register | + +## ALERT_TEST +Alert Test Register. +- Offset: `0x4004000` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "fatal_fault", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:---------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | x | fatal_fault | 'Write 1 to trigger one alert event of this kind.' | + diff --git a/docs/um/ip/safety_island/data/safety_soc_ctrl_regs.hjson b/docs/um/ip/safety_island/data/safety_soc_ctrl_regs.hjson new file mode 100644 index 00000000..b99f65cb --- /dev/null +++ b/docs/um/ip/safety_island/data/safety_soc_ctrl_regs.hjson @@ -0,0 +1,68 @@ +# Copyright 2023 ETH Zurich and University of Bologna +# Solderpad Hardware License, Version 0.51, see LICENSE for details. +# SPDX-License-Identifier: SHL-0.51 + +{ + name: "safety_soc_ctrl", + clock_primary: "clk_i", + reset_primary: "rst_ni", + bus_interfaces: [ + { protocol: "reg_iface", + direction: "device" + } + ], + + regwidth: "32", + registers: [ + { name: "bootaddr", + desc: "Core Boot Address", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0", + name: "bootaddr", + desc: "Boot Address", + resval: 0x1A00_0000 + } + ] + + }, + { name: "fetchen", + desc: "Core Fetch Enable", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { bits: "0", + name: "fetchen", + desc: "Fetch Enable", + resval: 0 + } + ] + }, + { name: "corestatus", + desc: "Core Return Status (return value, EOC)", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0", + name: "core_status", + desc: "Core Return Status (EOC(bit[31]) and status(bit[30:0]))", + resval: 0 + } + ] + } + { name: "bootmode", + desc: "Core Boot Mode", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { bits: "1:0", + name: "bootmode", + desc: "Boot Mode", + resval: 0x0 + } + ] + + }, + ], +} \ No newline at end of file diff --git a/docs/um/ip/safety_island/data/safety_soc_ctrl_regs_doc.hjson b/docs/um/ip/safety_island/data/safety_soc_ctrl_regs_doc.hjson new file mode 100644 index 00000000..b54b483d --- /dev/null +++ b/docs/um/ip/safety_island/data/safety_soc_ctrl_regs_doc.hjson @@ -0,0 +1,71 @@ +# Copyright 2023 ETH Zurich and University of Bologna +# Solderpad Hardware License, Version 0.51, see LICENSE for details. +# SPDX-License-Identifier: SHL-0.51 +# Licensed under Solderpad Hardware License, Version 0.51, see LICENSE for details. + +{ + name: "safety_soc_ctrl", + cip_id: "36", + version: "0.0.0", //null, commit aaef55c + clocking: [ + {clock: "clk_i", reset: "rst_ni", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", + direction: "device" + } + ], + regwidth: "32", + registers: [ + { name: "bootaddr", + desc: "Core Boot Address", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0", + name: "bootaddr", + desc: "Boot Address", + resval: 0x1A00_0000 + } + ] + + }, + { name: "fetchen", + desc: "Core Fetch Enable", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { bits: "0", + name: "fetchen", + desc: "Fetch Enable", + resval: 0 + } + ] + }, + { name: "corestatus", + desc: "Core Return Status (return value, EOC)", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0", + name: "core_status", + desc: "Core Return Status (EOC(bit[31]) and status(bit[30:0]))", + resval: 0 + } + ] + } + { name: "bootmode", + desc: "Core Boot Mode", + swaccess: "rw", + hwaccess: "hrw", + fields: [ + { bits: "1:0", + name: "bootmode", + desc: "Boot Mode", + resval: 0x0 + } + ] + + }, + ], +} diff --git a/docs/um/ip/safety_island/doc/registers.md b/docs/um/ip/safety_island/doc/registers.md new file mode 100644 index 00000000..e95798e2 --- /dev/null +++ b/docs/um/ip/safety_island/doc/registers.md @@ -0,0 +1,75 @@ +## Summary + +| Name | Offset | Length | Description | +|:--------------------------------------------|:---------|---------:|:---------------------------------------| +| safety_soc_ctrl.[`bootaddr`](#bootaddr) | 0x0 | 4 | Core Boot Address | +| safety_soc_ctrl.[`fetchen`](#fetchen) | 0x4 | 4 | Core Fetch Enable | +| safety_soc_ctrl.[`corestatus`](#corestatus) | 0x8 | 4 | Core Return Status (return value, EOC) | +| safety_soc_ctrl.[`bootmode`](#bootmode) | 0xc | 4 | Core Boot Mode | + +## bootaddr +Core Boot Address +- Offset: `0x0` +- Reset default: `0x1a000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "bootaddr", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:---------|:--------------| +| 31:0 | rw | 0x1a000000 | bootaddr | Boot Address | + +## fetchen +Core Fetch Enable +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "fetchen", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | fetchen | Fetch Enable | + +## corestatus +Core Return Status (return value, EOC) +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "core_status", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:--------------------------------------------------------| +| 31:0 | rw | 0x0 | core_status | Core Return Status (EOC(bit[31]) and status(bit[30:0])) | + +## bootmode +Core Boot Mode +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "bootmode", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 100}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x0 | bootmode | Boot Mode | + diff --git a/docs/um/ip/serial_link/data/serial_link_regs.hjson b/docs/um/ip/serial_link/data/serial_link_regs.hjson new file mode 100644 index 00000000..4c1592fb --- /dev/null +++ b/docs/um/ip/serial_link/data/serial_link_regs.hjson @@ -0,0 +1,421 @@ +// Copyright 2022 ETH Zurich and University of Bologna. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 +// +// Author: Tim Fischer + +{ + name: "serial_link", + clock_primary: "clk_i" + reset_primary: "rst_ni" + bus_interfaces: [ + { protocol: "reg_iface", direction: "device"} + ] + regwidth: "32", + param_list: [ + { name: "NumChannels", + desc: "Number of channels", + type: "int", + default: "38", + local: "true" + }, + { name: "Log2NumChannels", + desc: "Number of channels", + type: "int", + default: "6", + local: "true" + }, + { name: "NumBits", + desc: "Number of bits transfered in one clock cycle (2 * NumLanes)", + type: "int", + default: "16", + local: "true" + }, + { name: "Log2MaxClkDiv", + desc: "Number of bits for clock divider counter", + type: "int", + default: "10", + local: "true" + }, + { name: "FlushCounterWidth", + desc: "The number of bits used for the auto-flush counters in the channel allocator" + type: "int", + default: "8", + local: "true" + }, + { name: "Log2RawModeTXFifoDepth", + desc: "The depth of the TX FIFO for raw mode operation." + type: "int", + default: "3", + local: "true" + } + ], + + registers: [ + { + name: "CTRL", + desc: "Global clock, isolation and reset control configuration" + swaccess: "rw", + hwaccess: "hro", + // Clock disabled (i.e. gated) by default + fields: [ + { + bits: "0", + name: "clk_ena", + desc: "Clock gate enable for network, link, physical layer. (active-high)", + resval: 0, + }, + { + bits: "1", + name: "reset_n", + resval: 1, + // *Not* held in reset (i.e. signal high) by default. + // Since clock is gated on reset, inner serial link state should *not* change until ungate. + desc: "SW controlled synchronous reset. (active-low)" + }, + // All channels isolated by default + { + bits: "8", + name: "axi_in_isolate", + resval: 1, + desc: "Isolate AXI slave in port. (active-high)" + }, + { + bits: "9", + name: "axi_out_isolate", + resval: 1, + desc: "Isolate AXI master out port. (active-high)" + } + ] + }, + { + name: "ISOLATED", + desc: "Isolation status of AXI ports", + swaccess: "ro", + hwaccess: "hwo", + hwqe: "true", + hwext: "true", + // All channels isolated by default + fields: [ + {bits: "0:0", name: "axi_in", resval: 1, desc: "slave in isolation status"}, + {bits: "1:1", name: "axi_out", resval: 1, desc: "master out isolation status"}, + ] + }, + { multireg: + { + name: "TX_PHY_CLK_DIV", + desc: "Holds clock divider factor for forwarded clock of the TX Phys", + count: "NumChannels", + cname: "TX_PHY_CLK_DIV", + swaccess: "rw", + hwaccess: "hro", + compact: false, + fields: [ + { bits: "Log2MaxClkDiv:0", + desc: "Clock division factor of TX clock", + name: "clk_divs", + resval: 8 + } + ] + } + }, + { multireg: + { + name: "TX_PHY_CLK_START", + desc: "Controls duty cycle and phase of rising edge in TX Phys", + count: "NumChannels", + cname: "TX_PHY_CLK_START", + compact: false, + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "Log2MaxClkDiv:0", + name: "clk_shift_start", + desc: "Positive Edge of divided, shifted clock", + resval: 2 + } + ] + } + }, + { multireg: + { + name: "TX_PHY_CLK_END", + desc: "Controls duty cycle and phase of falling edge in TX Phys", + count: "NumChannels", + cname: "TX_PHY_CLK_END", + compact: false, + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "Log2MaxClkDiv:0", + name: "clk_shift_end", + desc: "Negative Edge of divided, shifted clock", + resval: 6 + } + ] + } + }, + { + name: "RAW_MODE_EN", + desc: "Enables Raw mode", + swaccess: "wo", + hwaccess: "hro", + fields: [ + {bits: "0", resval: 0} + ] + }, + { + name: "RAW_MODE_IN_CH_SEL", + desc: "Receive channel select in RAW mode", + swaccess: "wo", + hwaccess: "hro", + fields: [ + { bits: "Log2NumChannels-1:0", + resval: 0 + } + ] + }, + {multireg: + { + name: "RAW_MODE_IN_DATA_VALID" + cname: "RAW_MODE_IN_DATA_VALID" + count: "NumChannels", + compact: "true", + desc: "Mask for valid data in RX FIFOs during RAW mode." + swaccess: "ro", + hwaccess: "hwo", + hwext: "true", + fields: [ + { + bits: "0" + }, + ] + } + }, + { + name: "RAW_MODE_IN_DATA", + desc: "Data received by the selected channel in RAW mode", + swaccess: "ro", + hwaccess: "hrw", + hwext: "true", + hwre: "true", + fields: [ + { bits: "NumBits-1:0", + } + ] + }, + {multireg: + { + name: "RAW_MODE_OUT_CH_MASK" + cname: "RAW_MODE_OUT_CH_MASK" + count: "NumChannels", + compact: "true", + desc: "Selects channels to send out data in RAW mode, '1 corresponds to broadcasting" + swaccess: "wo", + hwaccess: "hro", + fields: [ + { + bits: "0", + resval: 0 + }, + ] + } + }, + { + name: "RAW_MODE_OUT_DATA_FIFO", + desc: "Data that will be pushed to the RAW mode output FIFO", + swaccess: "wo", + hwaccess: "hro", + hwqe: "true", + fields: [ + { bits: "NumBits-1:0", + resval: 0 + } + ] + }, + { + name: "RAW_MODE_OUT_DATA_FIFO_CTRL", + desc: "Status and control register for the RAW mode data out FIFO", + swaccess: "rw", + hwaccess: "hrw", + hwext: "true", + hwqe: "true", + fields: [ + { + bits: "0", + name: "clear", + swaccess: "wo", + hwaccess: "hro", + desc: "Clears the raw mode TX FIFO.", + }, + { + bits: "8+Log2RawModeTXFifoDepth-1:8", + name: "fill_state", + swaccess: "ro", + hwaccess: "hwo", + desc: "The number of elements currently stored in the RAW mode TX FIFO that are ready to be sent.", + resval: 0 + }, + { + bits: "31", + name: "is_full", + swaccess: "ro", + hwaccess: "hwo", + desc: "If '1' the FIFO is full and does not accept any more items. Any additional write to the data fill register will be ignored until there is sufficient space again.", + resval: 0 + } + ] + }, + { + name: "RAW_MODE_OUT_EN", + desc: "Enable transmission of data currently hold in the output FIFO", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "0", + resval: 0 + } + ] + }, + { + name: "FLOW_CONTROL_FIFO_CLEAR", + desc: "Clears the flow control Fifo", + swaccess: "wo", + hwaccess: "hro", + hwext: "true", + hwqe: "true", + fields: [ + { bits: "0", + resval: 0 + } + ] + }, + { + name: "CHANNEL_ALLOC_TX_CFG" + desc: "Configuration settings for the TX side in the channel allocator" + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "0", + name: "bypass_en", + desc: "Enable bypassing the TX channel allocator" + resval: 1 + }, + { + bits: "1", + name: "auto_flush_en", + desc: "Enable the auto-flush feature of the TX side in the channel allocator" + resval: 1 + }, + { + bits: "15:8", + name: "auto_flush_count", + desc: "The number of cycles to wait before auto flushing (sending) packets in the channel allocator", + resval: 2 + } + ] + }, + {multireg: + { + name: "CHANNEL_ALLOC_TX_CH_EN" + cname: "CHANNEL_ALLOC_TX_CH_EN" + count: "NumChannels", + compact: "true", + desc: "Channel enable mask for the TX side." + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "0", + resval: 1 + }, + ] + } + }, + { + name: "CHANNEL_ALLOC_TX_CTRL", + desc: "Soft clear or force flush the TX side of the channel allocator", + swaccess: "wo", + hwaccess: "hro", + hwext: "true", + hwqe: "true", + fields: [ + { + bits: "0", + name: "clear", + desc: "Software clear the TX side of the channel allocator", + }, + { + bits: "1", + name: "flush", + desc: "Flush (transmit remaining data) in the TX side of the channel allocator.", + } + ] + }, + { + name: "CHANNEL_ALLOC_RX_CFG" + desc: "Configuration settings for the RX side in the channel allocator" + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "0", + name: "bypass_en", + desc: "Enable bypassing the RX channel allocator" + resval: 1 + }, + { + bits: "1", + name: "auto_flush_en", + desc: "Enable the auto-flush feature of the RX side in the channel allocator" + resval: 1 + }, + { + bits: "15:8", + name: "auto_flush_count", + desc: "The number of cycles to wait before synchronizing on partial packets on the RX side", + resval: 2 + }, + { + bits: "16", + name: "sync_en", + desc: "Enable (1) or disable (0) the synchronization barrier between the channels (needs to be disabled in raw mode).", + resval: 1 + } + ] + }, + { + name: "CHANNEL_ALLOC_RX_CTRL", + desc: "Soft clear the RX side of the channel allocator", + swaccess: "wo", + hwaccess: "hro", + hwext: "true", + hwqe: "true", + fields: [ + { + bits: "0", + name: "clear", + desc: "Software clear the TX side of the channel allocator", + } + ] + }, + {multireg: + { + name: "CHANNEL_ALLOC_RX_CH_EN" + cname: "CHANNEL_ALLOC_RX_CH_EN" + count: "NumChannels", + compact: "true", + desc: "Channel enable mask for the RX side." + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "0", + resval: 1 + }, + ] + } + }, + ] +} \ No newline at end of file diff --git a/docs/um/ip/serial_link/data/serial_link_regs_doc.hjson b/docs/um/ip/serial_link/data/serial_link_regs_doc.hjson new file mode 100644 index 00000000..d009fdb1 --- /dev/null +++ b/docs/um/ip/serial_link/data/serial_link_regs_doc.hjson @@ -0,0 +1,424 @@ +// Copyright 2022 ETH Zurich and University of Bologna. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 +// +// Author: Tim Fischer + +{ + name: "serial_link", + cip_id: "36", + version: "1.1.0", + clocking: [ + {clock: "clk_i", reset: "rst_ni", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device"} + ] + regwidth: "32", + param_list: [ + { name: "NumChannels", + desc: "Number of channels", + type: "int", + default: "38", + local: "true" + }, + { name: "Log2NumChannels", + desc: "Number of channels", + type: "int", + default: "6", + local: "true" + }, + { name: "NumBits", + desc: "Number of bits transfered in one clock cycle (2 * NumLanes)", + type: "int", + default: "16", + local: "true" + }, + { name: "Log2MaxClkDiv", + desc: "Number of bits for clock divider counter", + type: "int", + default: "10", + local: "true" + }, + { name: "FlushCounterWidth", + desc: "The number of bits used for the auto-flush counters in the channel allocator" + type: "int", + default: "8", + local: "true" + }, + { name: "Log2RawModeTXFifoDepth", + desc: "The depth of the TX FIFO for raw mode operation." + type: "int", + default: "3", + local: "true" + } + ], + + registers: [ + { + name: "CTRL", + desc: "Global clock, isolation and reset control configuration" + swaccess: "rw", + hwaccess: "hro", + // Clock disabled (i.e. gated) by default + fields: [ + { + bits: "0", + name: "clk_ena", + desc: "Clock gate enable for network, link, physical layer. (active-high)", + resval: 0, + }, + { + bits: "1", + name: "reset_n", + resval: 1, + // *Not* held in reset (i.e. signal high) by default. + // Since clock is gated on reset, inner serial link state should *not* change until ungate. + desc: "SW controlled synchronous reset. (active-low)" + }, + // All channels isolated by default + { + bits: "8", + name: "axi_in_isolate", + resval: 1, + desc: "Isolate AXI slave in port. (active-high)" + }, + { + bits: "9", + name: "axi_out_isolate", + resval: 1, + desc: "Isolate AXI master out port. (active-high)" + } + ] + }, + { + name: "ISOLATED", + desc: "Isolation status of AXI ports", + swaccess: "ro", + hwaccess: "hwo", + hwqe: "true", + hwext: "true", + // All channels isolated by default + fields: [ + {bits: "0:0", name: "axi_in", resval: 1, desc: "slave in isolation status"}, + {bits: "1:1", name: "axi_out", resval: 1, desc: "master out isolation status"}, + ] + }, + { multireg: + { + name: "TX_PHY_CLK_DIV", + desc: "Holds clock divider factor for forwarded clock of the TX Phys", + count: "NumChannels", + cname: "TX_PHY_CLK_DIV", + swaccess: "rw", + hwaccess: "hro", + compact: false, + fields: [ + { bits: "Log2MaxClkDiv:0", + desc: "Clock division factor of TX clock", + name: "clk_divs", + resval: 8 + } + ] + } + }, + { multireg: + { + name: "TX_PHY_CLK_START", + desc: "Controls duty cycle and phase of rising edge in TX Phys", + count: "NumChannels", + cname: "TX_PHY_CLK_START", + compact: false, + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "Log2MaxClkDiv:0", + name: "clk_shift_start", + desc: "Positive Edge of divided, shifted clock", + resval: 2 + } + ] + } + }, + { multireg: + { + name: "TX_PHY_CLK_END", + desc: "Controls duty cycle and phase of falling edge in TX Phys", + count: "NumChannels", + cname: "TX_PHY_CLK_END", + compact: false, + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "Log2MaxClkDiv:0", + name: "clk_shift_end", + desc: "Negative Edge of divided, shifted clock", + resval: 6 + } + ] + } + }, + { + name: "RAW_MODE_EN", + desc: "Enables Raw mode", + swaccess: "wo", + hwaccess: "hro", + fields: [ + {bits: "0", resval: 0} + ] + }, + { + name: "RAW_MODE_IN_CH_SEL", + desc: "Receive channel select in RAW mode", + swaccess: "wo", + hwaccess: "hro", + fields: [ + { bits: "Log2NumChannels-1:0", + resval: 0 + } + ] + }, + {multireg: + { + name: "RAW_MODE_IN_DATA_VALID" + cname: "RAW_MODE_IN_DATA_VALID" + count: "NumChannels", + compact: "true", + desc: "Mask for valid data in RX FIFOs during RAW mode." + swaccess: "ro", + hwaccess: "hwo", + hwext: "true", + fields: [ + { + bits: "0" + }, + ] + } + }, + { + name: "RAW_MODE_IN_DATA", + desc: "Data received by the selected channel in RAW mode", + swaccess: "ro", + hwaccess: "hrw", + hwext: "true", + hwre: "true", + fields: [ + { bits: "NumBits-1:0", + } + ] + }, + {multireg: + { + name: "RAW_MODE_OUT_CH_MASK" + cname: "RAW_MODE_OUT_CH_MASK" + count: "NumChannels", + compact: "true", + desc: "Selects channels to send out data in RAW mode, '1 corresponds to broadcasting" + swaccess: "wo", + hwaccess: "hro", + fields: [ + { + bits: "0", + resval: 0 + }, + ] + } + }, + { + name: "RAW_MODE_OUT_DATA_FIFO", + desc: "Data that will be pushed to the RAW mode output FIFO", + swaccess: "wo", + hwaccess: "hro", + hwqe: "true", + fields: [ + { bits: "NumBits-1:0", + resval: 0 + } + ] + }, + { + name: "RAW_MODE_OUT_DATA_FIFO_CTRL", + desc: "Status and control register for the RAW mode data out FIFO", + swaccess: "rw", + hwaccess: "hrw", + hwext: "true", + hwqe: "true", + fields: [ + { + bits: "0", + name: "clear", + swaccess: "wo", + hwaccess: "hro", + desc: "Clears the raw mode TX FIFO.", + }, + { + bits: "8+Log2RawModeTXFifoDepth-1:8", + name: "fill_state", + swaccess: "ro", + hwaccess: "hwo", + desc: "The number of elements currently stored in the RAW mode TX FIFO that are ready to be sent.", + resval: 0 + }, + { + bits: "31", + name: "is_full", + swaccess: "ro", + hwaccess: "hwo", + desc: "If '1' the FIFO is full and does not accept any more items. Any additional write to the data fill register will be ignored until there is sufficient space again.", + resval: 0 + } + ] + }, + { + name: "RAW_MODE_OUT_EN", + desc: "Enable transmission of data currently hold in the output FIFO", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "0", + resval: 0 + } + ] + }, + { + name: "FLOW_CONTROL_FIFO_CLEAR", + desc: "Clears the flow control Fifo", + swaccess: "wo", + hwaccess: "hro", + hwext: "true", + hwqe: "true", + fields: [ + { bits: "0", + resval: 0 + } + ] + }, + { + name: "CHANNEL_ALLOC_TX_CFG" + desc: "Configuration settings for the TX side in the channel allocator" + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "0", + name: "bypass_en", + desc: "Enable bypassing the TX channel allocator" + resval: 1 + }, + { + bits: "1", + name: "auto_flush_en", + desc: "Enable the auto-flush feature of the TX side in the channel allocator" + resval: 1 + }, + { + bits: "15:8", + name: "auto_flush_count", + desc: "The number of cycles to wait before auto flushing (sending) packets in the channel allocator", + resval: 2 + } + ] + }, + {multireg: + { + name: "CHANNEL_ALLOC_TX_CH_EN" + cname: "CHANNEL_ALLOC_TX_CH_EN" + count: "NumChannels", + compact: "true", + desc: "Channel enable mask for the TX side." + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "0", + resval: 1 + }, + ] + } + }, + { + name: "CHANNEL_ALLOC_TX_CTRL", + desc: "Soft clear or force flush the TX side of the channel allocator", + swaccess: "wo", + hwaccess: "hro", + hwext: "true", + hwqe: "true", + fields: [ + { + bits: "0", + name: "clear", + desc: "Software clear the TX side of the channel allocator", + }, + { + bits: "1", + name: "flush", + desc: "Flush (transmit remaining data) in the TX side of the channel allocator.", + } + ] + }, + { + name: "CHANNEL_ALLOC_RX_CFG" + desc: "Configuration settings for the RX side in the channel allocator" + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "0", + name: "bypass_en", + desc: "Enable bypassing the RX channel allocator" + resval: 1 + }, + { + bits: "1", + name: "auto_flush_en", + desc: "Enable the auto-flush feature of the RX side in the channel allocator" + resval: 1 + }, + { + bits: "15:8", + name: "auto_flush_count", + desc: "The number of cycles to wait before synchronizing on partial packets on the RX side", + resval: 2 + }, + { + bits: "16", + name: "sync_en", + desc: "Enable (1) or disable (0) the synchronization barrier between the channels (needs to be disabled in raw mode).", + resval: 1 + } + ] + }, + { + name: "CHANNEL_ALLOC_RX_CTRL", + desc: "Soft clear the RX side of the channel allocator", + swaccess: "wo", + hwaccess: "hro", + hwext: "true", + hwqe: "true", + fields: [ + { + bits: "0", + name: "clear", + desc: "Software clear the TX side of the channel allocator", + } + ] + }, + {multireg: + { + name: "CHANNEL_ALLOC_RX_CH_EN" + cname: "CHANNEL_ALLOC_RX_CH_EN" + count: "NumChannels", + compact: "true", + desc: "Channel enable mask for the RX side." + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "0", + resval: 1 + }, + ] + } + }, + ] +} \ No newline at end of file diff --git a/docs/um/ip/serial_link/doc/registers.md b/docs/um/ip/serial_link/doc/registers.md new file mode 100644 index 00000000..24eac5c9 --- /dev/null +++ b/docs/um/ip/serial_link/doc/registers.md @@ -0,0 +1,833 @@ +## Summary + +| Name | Offset | Length | Description | +|:--------------------------------------------------------------------------|:---------|---------:|:------------------------------------------------------------------------------| +| serial_link.[`CTRL`](#ctrl) | 0x0 | 4 | Global clock, isolation and reset control configuration | +| serial_link.[`ISOLATED`](#isolated) | 0x4 | 4 | Isolation status of AXI ports | +| serial_link.[`TX_PHY_CLK_DIV_0`](#tx_phy_clk_div) | 0x8 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_1`](#tx_phy_clk_div) | 0xc | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_2`](#tx_phy_clk_div) | 0x10 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_3`](#tx_phy_clk_div) | 0x14 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_4`](#tx_phy_clk_div) | 0x18 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_5`](#tx_phy_clk_div) | 0x1c | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_6`](#tx_phy_clk_div) | 0x20 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_7`](#tx_phy_clk_div) | 0x24 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_8`](#tx_phy_clk_div) | 0x28 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_9`](#tx_phy_clk_div) | 0x2c | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_10`](#tx_phy_clk_div) | 0x30 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_11`](#tx_phy_clk_div) | 0x34 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_12`](#tx_phy_clk_div) | 0x38 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_13`](#tx_phy_clk_div) | 0x3c | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_14`](#tx_phy_clk_div) | 0x40 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_15`](#tx_phy_clk_div) | 0x44 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_16`](#tx_phy_clk_div) | 0x48 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_17`](#tx_phy_clk_div) | 0x4c | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_18`](#tx_phy_clk_div) | 0x50 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_19`](#tx_phy_clk_div) | 0x54 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_20`](#tx_phy_clk_div) | 0x58 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_21`](#tx_phy_clk_div) | 0x5c | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_22`](#tx_phy_clk_div) | 0x60 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_23`](#tx_phy_clk_div) | 0x64 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_24`](#tx_phy_clk_div) | 0x68 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_25`](#tx_phy_clk_div) | 0x6c | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_26`](#tx_phy_clk_div) | 0x70 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_27`](#tx_phy_clk_div) | 0x74 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_28`](#tx_phy_clk_div) | 0x78 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_29`](#tx_phy_clk_div) | 0x7c | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_30`](#tx_phy_clk_div) | 0x80 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_31`](#tx_phy_clk_div) | 0x84 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_32`](#tx_phy_clk_div) | 0x88 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_33`](#tx_phy_clk_div) | 0x8c | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_34`](#tx_phy_clk_div) | 0x90 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_35`](#tx_phy_clk_div) | 0x94 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_36`](#tx_phy_clk_div) | 0x98 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_37`](#tx_phy_clk_div) | 0x9c | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_START_0`](#tx_phy_clk_start) | 0xa0 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_1`](#tx_phy_clk_start) | 0xa4 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_2`](#tx_phy_clk_start) | 0xa8 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_3`](#tx_phy_clk_start) | 0xac | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_4`](#tx_phy_clk_start) | 0xb0 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_5`](#tx_phy_clk_start) | 0xb4 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_6`](#tx_phy_clk_start) | 0xb8 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_7`](#tx_phy_clk_start) | 0xbc | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_8`](#tx_phy_clk_start) | 0xc0 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_9`](#tx_phy_clk_start) | 0xc4 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_10`](#tx_phy_clk_start) | 0xc8 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_11`](#tx_phy_clk_start) | 0xcc | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_12`](#tx_phy_clk_start) | 0xd0 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_13`](#tx_phy_clk_start) | 0xd4 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_14`](#tx_phy_clk_start) | 0xd8 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_15`](#tx_phy_clk_start) | 0xdc | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_16`](#tx_phy_clk_start) | 0xe0 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_17`](#tx_phy_clk_start) | 0xe4 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_18`](#tx_phy_clk_start) | 0xe8 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_19`](#tx_phy_clk_start) | 0xec | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_20`](#tx_phy_clk_start) | 0xf0 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_21`](#tx_phy_clk_start) | 0xf4 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_22`](#tx_phy_clk_start) | 0xf8 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_23`](#tx_phy_clk_start) | 0xfc | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_24`](#tx_phy_clk_start) | 0x100 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_25`](#tx_phy_clk_start) | 0x104 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_26`](#tx_phy_clk_start) | 0x108 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_27`](#tx_phy_clk_start) | 0x10c | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_28`](#tx_phy_clk_start) | 0x110 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_29`](#tx_phy_clk_start) | 0x114 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_30`](#tx_phy_clk_start) | 0x118 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_31`](#tx_phy_clk_start) | 0x11c | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_32`](#tx_phy_clk_start) | 0x120 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_33`](#tx_phy_clk_start) | 0x124 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_34`](#tx_phy_clk_start) | 0x128 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_35`](#tx_phy_clk_start) | 0x12c | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_36`](#tx_phy_clk_start) | 0x130 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_37`](#tx_phy_clk_start) | 0x134 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_0`](#tx_phy_clk_end) | 0x138 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_1`](#tx_phy_clk_end) | 0x13c | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_2`](#tx_phy_clk_end) | 0x140 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_3`](#tx_phy_clk_end) | 0x144 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_4`](#tx_phy_clk_end) | 0x148 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_5`](#tx_phy_clk_end) | 0x14c | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_6`](#tx_phy_clk_end) | 0x150 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_7`](#tx_phy_clk_end) | 0x154 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_8`](#tx_phy_clk_end) | 0x158 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_9`](#tx_phy_clk_end) | 0x15c | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_10`](#tx_phy_clk_end) | 0x160 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_11`](#tx_phy_clk_end) | 0x164 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_12`](#tx_phy_clk_end) | 0x168 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_13`](#tx_phy_clk_end) | 0x16c | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_14`](#tx_phy_clk_end) | 0x170 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_15`](#tx_phy_clk_end) | 0x174 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_16`](#tx_phy_clk_end) | 0x178 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_17`](#tx_phy_clk_end) | 0x17c | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_18`](#tx_phy_clk_end) | 0x180 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_19`](#tx_phy_clk_end) | 0x184 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_20`](#tx_phy_clk_end) | 0x188 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_21`](#tx_phy_clk_end) | 0x18c | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_22`](#tx_phy_clk_end) | 0x190 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_23`](#tx_phy_clk_end) | 0x194 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_24`](#tx_phy_clk_end) | 0x198 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_25`](#tx_phy_clk_end) | 0x19c | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_26`](#tx_phy_clk_end) | 0x1a0 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_27`](#tx_phy_clk_end) | 0x1a4 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_28`](#tx_phy_clk_end) | 0x1a8 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_29`](#tx_phy_clk_end) | 0x1ac | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_30`](#tx_phy_clk_end) | 0x1b0 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_31`](#tx_phy_clk_end) | 0x1b4 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_32`](#tx_phy_clk_end) | 0x1b8 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_33`](#tx_phy_clk_end) | 0x1bc | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_34`](#tx_phy_clk_end) | 0x1c0 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_35`](#tx_phy_clk_end) | 0x1c4 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_36`](#tx_phy_clk_end) | 0x1c8 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_37`](#tx_phy_clk_end) | 0x1cc | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`RAW_MODE_EN`](#raw_mode_en) | 0x1d0 | 4 | Enables Raw mode | +| serial_link.[`RAW_MODE_IN_CH_SEL`](#raw_mode_in_ch_sel) | 0x1d4 | 4 | Receive channel select in RAW mode | +| serial_link.[`RAW_MODE_IN_DATA_VALID_0`](#RAW_MODE_IN_DATA_VALID_0) | 0x1d8 | 4 | Mask for valid data in RX FIFOs during RAW mode. | +| serial_link.[`RAW_MODE_IN_DATA_VALID_1`](#RAW_MODE_IN_DATA_VALID_1) | 0x1dc | 4 | Mask for valid data in RX FIFOs during RAW mode. | +| serial_link.[`RAW_MODE_IN_DATA`](#raw_mode_in_data) | 0x1e0 | 4 | Data received by the selected channel in RAW mode | +| serial_link.[`RAW_MODE_OUT_CH_MASK_0`](#RAW_MODE_OUT_CH_MASK_0) | 0x1e4 | 4 | Selects channels to send out data in RAW mode, '1 corresponds to broadcasting | +| serial_link.[`RAW_MODE_OUT_CH_MASK_1`](#RAW_MODE_OUT_CH_MASK_1) | 0x1e8 | 4 | Selects channels to send out data in RAW mode, '1 corresponds to broadcasting | +| serial_link.[`RAW_MODE_OUT_DATA_FIFO`](#raw_mode_out_data_fifo) | 0x1ec | 4 | Data that will be pushed to the RAW mode output FIFO | +| serial_link.[`RAW_MODE_OUT_DATA_FIFO_CTRL`](#raw_mode_out_data_fifo_ctrl) | 0x1f0 | 4 | Status and control register for the RAW mode data out FIFO | +| serial_link.[`RAW_MODE_OUT_EN`](#raw_mode_out_en) | 0x1f4 | 4 | Enable transmission of data currently hold in the output FIFO | +| serial_link.[`FLOW_CONTROL_FIFO_CLEAR`](#flow_control_fifo_clear) | 0x1f8 | 4 | Clears the flow control Fifo | +| serial_link.[`CHANNEL_ALLOC_TX_CFG`](#channel_alloc_tx_cfg) | 0x1fc | 4 | Configuration settings for the TX side in the channel allocator | +| serial_link.[`CHANNEL_ALLOC_TX_CH_EN_0`](#CHANNEL_ALLOC_TX_CH_EN_0) | 0x200 | 4 | Channel enable mask for the TX side. | +| serial_link.[`CHANNEL_ALLOC_TX_CH_EN_1`](#CHANNEL_ALLOC_TX_CH_EN_1) | 0x204 | 4 | Channel enable mask for the TX side. | +| serial_link.[`CHANNEL_ALLOC_TX_CTRL`](#channel_alloc_tx_ctrl) | 0x208 | 4 | Soft clear or force flush the TX side of the channel allocator | +| serial_link.[`CHANNEL_ALLOC_RX_CFG`](#channel_alloc_rx_cfg) | 0x20c | 4 | Configuration settings for the RX side in the channel allocator | +| serial_link.[`CHANNEL_ALLOC_RX_CTRL`](#channel_alloc_rx_ctrl) | 0x210 | 4 | Soft clear the RX side of the channel allocator | +| serial_link.[`CHANNEL_ALLOC_RX_CH_EN_0`](#CHANNEL_ALLOC_RX_CH_EN_0) | 0x214 | 4 | Channel enable mask for the RX side. | +| serial_link.[`CHANNEL_ALLOC_RX_CH_EN_1`](#CHANNEL_ALLOC_RX_CH_EN_1) | 0x218 | 4 | Channel enable mask for the RX side. | + +## CTRL +Global clock, isolation and reset control configuration +- Offset: `0x0` +- Reset default: `0x302` +- Reset mask: `0x303` + +### Fields + +```wavejson +{"reg": [{"name": "clk_ena", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "reset_n", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 6}, {"name": "axi_in_isolate", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "axi_out_isolate", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 22}], "config": {"lanes": 1, "fontsize": 10, "vspace": 170}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------|:-------------------------------------------------------------------| +| 31:10 | | | | Reserved | +| 9 | rw | 0x1 | axi_out_isolate | Isolate AXI master out port. (active-high) | +| 8 | rw | 0x1 | axi_in_isolate | Isolate AXI slave in port. (active-high) | +| 7:2 | | | | Reserved | +| 1 | rw | 0x1 | reset_n | SW controlled synchronous reset. (active-low) | +| 0 | rw | 0x0 | clk_ena | Clock gate enable for network, link, physical layer. (active-high) | + +## ISOLATED +Isolation status of AXI ports +- Offset: `0x4` +- Reset default: `0x3` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "axi_in", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "axi_out", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:----------------------------| +| 31:2 | | | | Reserved | +| 1 | ro | 0x1 | axi_out | master out isolation status | +| 0 | ro | 0x1 | axi_in | slave in isolation status | + +## TX_PHY_CLK_DIV +Holds clock divider factor for forwarded clock of the TX Phys +- Reset default: `0x8` +- Reset mask: `0x7ff` + +### Instances + +| Name | Offset | +|:------------------|:---------| +| TX_PHY_CLK_DIV_0 | 0x8 | +| TX_PHY_CLK_DIV_1 | 0xc | +| TX_PHY_CLK_DIV_2 | 0x10 | +| TX_PHY_CLK_DIV_3 | 0x14 | +| TX_PHY_CLK_DIV_4 | 0x18 | +| TX_PHY_CLK_DIV_5 | 0x1c | +| TX_PHY_CLK_DIV_6 | 0x20 | +| TX_PHY_CLK_DIV_7 | 0x24 | +| TX_PHY_CLK_DIV_8 | 0x28 | +| TX_PHY_CLK_DIV_9 | 0x2c | +| TX_PHY_CLK_DIV_10 | 0x30 | +| TX_PHY_CLK_DIV_11 | 0x34 | +| TX_PHY_CLK_DIV_12 | 0x38 | +| TX_PHY_CLK_DIV_13 | 0x3c | +| TX_PHY_CLK_DIV_14 | 0x40 | +| TX_PHY_CLK_DIV_15 | 0x44 | +| TX_PHY_CLK_DIV_16 | 0x48 | +| TX_PHY_CLK_DIV_17 | 0x4c | +| TX_PHY_CLK_DIV_18 | 0x50 | +| TX_PHY_CLK_DIV_19 | 0x54 | +| TX_PHY_CLK_DIV_20 | 0x58 | +| TX_PHY_CLK_DIV_21 | 0x5c | +| TX_PHY_CLK_DIV_22 | 0x60 | +| TX_PHY_CLK_DIV_23 | 0x64 | +| TX_PHY_CLK_DIV_24 | 0x68 | +| TX_PHY_CLK_DIV_25 | 0x6c | +| TX_PHY_CLK_DIV_26 | 0x70 | +| TX_PHY_CLK_DIV_27 | 0x74 | +| TX_PHY_CLK_DIV_28 | 0x78 | +| TX_PHY_CLK_DIV_29 | 0x7c | +| TX_PHY_CLK_DIV_30 | 0x80 | +| TX_PHY_CLK_DIV_31 | 0x84 | +| TX_PHY_CLK_DIV_32 | 0x88 | +| TX_PHY_CLK_DIV_33 | 0x8c | +| TX_PHY_CLK_DIV_34 | 0x90 | +| TX_PHY_CLK_DIV_35 | 0x94 | +| TX_PHY_CLK_DIV_36 | 0x98 | +| TX_PHY_CLK_DIV_37 | 0x9c | + + +### Fields + +```wavejson +{"reg": [{"name": "clk_divs", "bits": 11, "attr": ["rw"], "rotate": 0}, {"bits": 21}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:----------------------------------| +| 31:11 | | | | Reserved | +| 10:0 | rw | 0x8 | clk_divs | Clock division factor of TX clock | + +## TX_PHY_CLK_START +Controls duty cycle and phase of rising edge in TX Phys +- Reset default: `0x2` +- Reset mask: `0x7ff` + +### Instances + +| Name | Offset | +|:--------------------|:---------| +| TX_PHY_CLK_START_0 | 0xa0 | +| TX_PHY_CLK_START_1 | 0xa4 | +| TX_PHY_CLK_START_2 | 0xa8 | +| TX_PHY_CLK_START_3 | 0xac | +| TX_PHY_CLK_START_4 | 0xb0 | +| TX_PHY_CLK_START_5 | 0xb4 | +| TX_PHY_CLK_START_6 | 0xb8 | +| TX_PHY_CLK_START_7 | 0xbc | +| TX_PHY_CLK_START_8 | 0xc0 | +| TX_PHY_CLK_START_9 | 0xc4 | +| TX_PHY_CLK_START_10 | 0xc8 | +| TX_PHY_CLK_START_11 | 0xcc | +| TX_PHY_CLK_START_12 | 0xd0 | +| TX_PHY_CLK_START_13 | 0xd4 | +| TX_PHY_CLK_START_14 | 0xd8 | +| TX_PHY_CLK_START_15 | 0xdc | +| TX_PHY_CLK_START_16 | 0xe0 | +| TX_PHY_CLK_START_17 | 0xe4 | +| TX_PHY_CLK_START_18 | 0xe8 | +| TX_PHY_CLK_START_19 | 0xec | +| TX_PHY_CLK_START_20 | 0xf0 | +| TX_PHY_CLK_START_21 | 0xf4 | +| TX_PHY_CLK_START_22 | 0xf8 | +| TX_PHY_CLK_START_23 | 0xfc | +| TX_PHY_CLK_START_24 | 0x100 | +| TX_PHY_CLK_START_25 | 0x104 | +| TX_PHY_CLK_START_26 | 0x108 | +| TX_PHY_CLK_START_27 | 0x10c | +| TX_PHY_CLK_START_28 | 0x110 | +| TX_PHY_CLK_START_29 | 0x114 | +| TX_PHY_CLK_START_30 | 0x118 | +| TX_PHY_CLK_START_31 | 0x11c | +| TX_PHY_CLK_START_32 | 0x120 | +| TX_PHY_CLK_START_33 | 0x124 | +| TX_PHY_CLK_START_34 | 0x128 | +| TX_PHY_CLK_START_35 | 0x12c | +| TX_PHY_CLK_START_36 | 0x130 | +| TX_PHY_CLK_START_37 | 0x134 | + + +### Fields + +```wavejson +{"reg": [{"name": "clk_shift_start", "bits": 11, "attr": ["rw"], "rotate": 0}, {"bits": 21}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------|:----------------------------------------| +| 31:11 | | | | Reserved | +| 10:0 | rw | 0x2 | clk_shift_start | Positive Edge of divided, shifted clock | + +## TX_PHY_CLK_END +Controls duty cycle and phase of falling edge in TX Phys +- Reset default: `0x6` +- Reset mask: `0x7ff` + +### Instances + +| Name | Offset | +|:------------------|:---------| +| TX_PHY_CLK_END_0 | 0x138 | +| TX_PHY_CLK_END_1 | 0x13c | +| TX_PHY_CLK_END_2 | 0x140 | +| TX_PHY_CLK_END_3 | 0x144 | +| TX_PHY_CLK_END_4 | 0x148 | +| TX_PHY_CLK_END_5 | 0x14c | +| TX_PHY_CLK_END_6 | 0x150 | +| TX_PHY_CLK_END_7 | 0x154 | +| TX_PHY_CLK_END_8 | 0x158 | +| TX_PHY_CLK_END_9 | 0x15c | +| TX_PHY_CLK_END_10 | 0x160 | +| TX_PHY_CLK_END_11 | 0x164 | +| TX_PHY_CLK_END_12 | 0x168 | +| TX_PHY_CLK_END_13 | 0x16c | +| TX_PHY_CLK_END_14 | 0x170 | +| TX_PHY_CLK_END_15 | 0x174 | +| TX_PHY_CLK_END_16 | 0x178 | +| TX_PHY_CLK_END_17 | 0x17c | +| TX_PHY_CLK_END_18 | 0x180 | +| TX_PHY_CLK_END_19 | 0x184 | +| TX_PHY_CLK_END_20 | 0x188 | +| TX_PHY_CLK_END_21 | 0x18c | +| TX_PHY_CLK_END_22 | 0x190 | +| TX_PHY_CLK_END_23 | 0x194 | +| TX_PHY_CLK_END_24 | 0x198 | +| TX_PHY_CLK_END_25 | 0x19c | +| TX_PHY_CLK_END_26 | 0x1a0 | +| TX_PHY_CLK_END_27 | 0x1a4 | +| TX_PHY_CLK_END_28 | 0x1a8 | +| TX_PHY_CLK_END_29 | 0x1ac | +| TX_PHY_CLK_END_30 | 0x1b0 | +| TX_PHY_CLK_END_31 | 0x1b4 | +| TX_PHY_CLK_END_32 | 0x1b8 | +| TX_PHY_CLK_END_33 | 0x1bc | +| TX_PHY_CLK_END_34 | 0x1c0 | +| TX_PHY_CLK_END_35 | 0x1c4 | +| TX_PHY_CLK_END_36 | 0x1c8 | +| TX_PHY_CLK_END_37 | 0x1cc | + + +### Fields + +```wavejson +{"reg": [{"name": "clk_shift_end", "bits": 11, "attr": ["rw"], "rotate": 0}, {"bits": 21}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:----------------------------------------| +| 31:11 | | | | Reserved | +| 10:0 | rw | 0x6 | clk_shift_end | Negative Edge of divided, shifted clock | + +## RAW_MODE_EN +Enables Raw mode +- Offset: `0x1d0` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "RAW_MODE_EN", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | RAW_MODE_EN | | + +## RAW_MODE_IN_CH_SEL +Receive channel select in RAW mode +- Offset: `0x1d4` +- Reset default: `0x0` +- Reset mask: `0x3f` + +### Fields + +```wavejson +{"reg": [{"name": "RAW_MODE_IN_CH_SEL", "bits": 6, "attr": ["wo"], "rotate": -90}, {"bits": 26}], "config": {"lanes": 1, "fontsize": 10, "vspace": 200}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------|:--------------| +| 31:6 | | | | Reserved | +| 5:0 | wo | 0x0 | RAW_MODE_IN_CH_SEL | | + +## RAW_MODE_IN_DATA_VALID_0 +Mask for valid data in RX FIFOs during RAW mode. +- Offset: `0x1d8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "RAW_MODE_IN_DATA_VALID_0", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_1", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_2", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_3", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_4", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_5", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_6", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_7", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_8", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_9", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_10", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_11", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_12", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_13", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_14", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_15", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_16", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_17", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_18", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_19", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_20", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_21", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_22", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_23", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_24", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_25", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_26", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_27", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_28", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_29", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_30", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_31", "bits": 1, "attr": ["ro"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 270}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------------|:--------------| +| 31 | ro | x | RAW_MODE_IN_DATA_VALID_31 | | +| 30 | ro | x | RAW_MODE_IN_DATA_VALID_30 | | +| 29 | ro | x | RAW_MODE_IN_DATA_VALID_29 | | +| 28 | ro | x | RAW_MODE_IN_DATA_VALID_28 | | +| 27 | ro | x | RAW_MODE_IN_DATA_VALID_27 | | +| 26 | ro | x | RAW_MODE_IN_DATA_VALID_26 | | +| 25 | ro | x | RAW_MODE_IN_DATA_VALID_25 | | +| 24 | ro | x | RAW_MODE_IN_DATA_VALID_24 | | +| 23 | ro | x | RAW_MODE_IN_DATA_VALID_23 | | +| 22 | ro | x | RAW_MODE_IN_DATA_VALID_22 | | +| 21 | ro | x | RAW_MODE_IN_DATA_VALID_21 | | +| 20 | ro | x | RAW_MODE_IN_DATA_VALID_20 | | +| 19 | ro | x | RAW_MODE_IN_DATA_VALID_19 | | +| 18 | ro | x | RAW_MODE_IN_DATA_VALID_18 | | +| 17 | ro | x | RAW_MODE_IN_DATA_VALID_17 | | +| 16 | ro | x | RAW_MODE_IN_DATA_VALID_16 | | +| 15 | ro | x | RAW_MODE_IN_DATA_VALID_15 | | +| 14 | ro | x | RAW_MODE_IN_DATA_VALID_14 | | +| 13 | ro | x | RAW_MODE_IN_DATA_VALID_13 | | +| 12 | ro | x | RAW_MODE_IN_DATA_VALID_12 | | +| 11 | ro | x | RAW_MODE_IN_DATA_VALID_11 | | +| 10 | ro | x | RAW_MODE_IN_DATA_VALID_10 | | +| 9 | ro | x | RAW_MODE_IN_DATA_VALID_9 | | +| 8 | ro | x | RAW_MODE_IN_DATA_VALID_8 | | +| 7 | ro | x | RAW_MODE_IN_DATA_VALID_7 | | +| 6 | ro | x | RAW_MODE_IN_DATA_VALID_6 | | +| 5 | ro | x | RAW_MODE_IN_DATA_VALID_5 | | +| 4 | ro | x | RAW_MODE_IN_DATA_VALID_4 | | +| 3 | ro | x | RAW_MODE_IN_DATA_VALID_3 | | +| 2 | ro | x | RAW_MODE_IN_DATA_VALID_2 | | +| 1 | ro | x | RAW_MODE_IN_DATA_VALID_1 | | +| 0 | ro | x | RAW_MODE_IN_DATA_VALID_0 | | + +## RAW_MODE_IN_DATA_VALID_1 +Mask for valid data in RX FIFOs during RAW mode. +- Offset: `0x1dc` +- Reset default: `0x0` +- Reset mask: `0x3f` + +### Fields + +```wavejson +{"reg": [{"name": "RAW_MODE_IN_DATA_VALID_32", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_33", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_34", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_35", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_36", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_37", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 26}], "config": {"lanes": 1, "fontsize": 10, "vspace": 270}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------------|:----------------------------| +| 31:6 | | | | Reserved | +| 5 | ro | x | RAW_MODE_IN_DATA_VALID_37 | For RAW_MODE_IN_DATA_VALID1 | +| 4 | ro | x | RAW_MODE_IN_DATA_VALID_36 | For RAW_MODE_IN_DATA_VALID1 | +| 3 | ro | x | RAW_MODE_IN_DATA_VALID_35 | For RAW_MODE_IN_DATA_VALID1 | +| 2 | ro | x | RAW_MODE_IN_DATA_VALID_34 | For RAW_MODE_IN_DATA_VALID1 | +| 1 | ro | x | RAW_MODE_IN_DATA_VALID_33 | For RAW_MODE_IN_DATA_VALID1 | +| 0 | ro | x | RAW_MODE_IN_DATA_VALID_32 | For RAW_MODE_IN_DATA_VALID1 | + +## RAW_MODE_IN_DATA +Data received by the selected channel in RAW mode +- Offset: `0x1e0` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "RAW_MODE_IN_DATA", "bits": 16, "attr": ["ro"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:16 | | | | Reserved | +| 15:0 | ro | x | RAW_MODE_IN_DATA | | + +## RAW_MODE_OUT_CH_MASK_0 +Selects channels to send out data in RAW mode, '1 corresponds to broadcasting +- Offset: `0x1e4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "RAW_MODE_OUT_CH_MASK_0", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_1", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_2", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_3", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_4", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_5", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_6", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_7", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_8", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_9", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_10", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_11", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_12", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_13", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_14", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_15", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_16", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_17", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_18", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_19", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_20", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_21", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_22", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_23", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_24", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_25", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_26", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_27", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_28", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_29", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_30", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_31", "bits": 1, "attr": ["wo"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 250}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------|:--------------| +| 31 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_31 | | +| 30 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_30 | | +| 29 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_29 | | +| 28 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_28 | | +| 27 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_27 | | +| 26 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_26 | | +| 25 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_25 | | +| 24 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_24 | | +| 23 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_23 | | +| 22 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_22 | | +| 21 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_21 | | +| 20 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_20 | | +| 19 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_19 | | +| 18 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_18 | | +| 17 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_17 | | +| 16 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_16 | | +| 15 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_15 | | +| 14 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_14 | | +| 13 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_13 | | +| 12 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_12 | | +| 11 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_11 | | +| 10 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_10 | | +| 9 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_9 | | +| 8 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_8 | | +| 7 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_7 | | +| 6 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_6 | | +| 5 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_5 | | +| 4 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_4 | | +| 3 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_3 | | +| 2 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_2 | | +| 1 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_1 | | +| 0 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_0 | | + +## RAW_MODE_OUT_CH_MASK_1 +Selects channels to send out data in RAW mode, '1 corresponds to broadcasting +- Offset: `0x1e8` +- Reset default: `0x0` +- Reset mask: `0x3f` + +### Fields + +```wavejson +{"reg": [{"name": "RAW_MODE_OUT_CH_MASK_32", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_33", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_34", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_35", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_36", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_37", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 26}], "config": {"lanes": 1, "fontsize": 10, "vspace": 250}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------|:--------------------------| +| 31:6 | | | | Reserved | +| 5 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_37 | For RAW_MODE_OUT_CH_MASK1 | +| 4 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_36 | For RAW_MODE_OUT_CH_MASK1 | +| 3 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_35 | For RAW_MODE_OUT_CH_MASK1 | +| 2 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_34 | For RAW_MODE_OUT_CH_MASK1 | +| 1 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_33 | For RAW_MODE_OUT_CH_MASK1 | +| 0 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_32 | For RAW_MODE_OUT_CH_MASK1 | + +## RAW_MODE_OUT_DATA_FIFO +Data that will be pushed to the RAW mode output FIFO +- Offset: `0x1ec` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "RAW_MODE_OUT_DATA_FIFO", "bits": 16, "attr": ["wo"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------|:--------------| +| 31:16 | | | | Reserved | +| 15:0 | wo | 0x0 | RAW_MODE_OUT_DATA_FIFO | | + +## RAW_MODE_OUT_DATA_FIFO_CTRL +Status and control register for the RAW mode data out FIFO +- Offset: `0x1f0` +- Reset default: `0x0` +- Reset mask: `0x80000701` + +### Fields + +```wavejson +{"reg": [{"name": "clear", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 7}, {"name": "fill_state", "bits": 3, "attr": ["ro"], "rotate": -90}, {"bits": 20}, {"name": "is_full", "bits": 1, "attr": ["ro"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31 | ro | 0x0 | is_full | If '1' the FIFO is full and does not accept any more items. Any additional write to the data fill register will be ignored until there is sufficient space again. | +| 30:11 | | | | Reserved | +| 10:8 | ro | 0x0 | fill_state | The number of elements currently stored in the RAW mode TX FIFO that are ready to be sent. | +| 7:1 | | | | Reserved | +| 0 | wo | x | clear | Clears the raw mode TX FIFO. | + +## RAW_MODE_OUT_EN +Enable transmission of data currently hold in the output FIFO +- Offset: `0x1f4` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "RAW_MODE_OUT_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 170}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | RAW_MODE_OUT_EN | | + +## FLOW_CONTROL_FIFO_CLEAR +Clears the flow control Fifo +- Offset: `0x1f8` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "FLOW_CONTROL_FIFO_CLEAR", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 250}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | FLOW_CONTROL_FIFO_CLEAR | | + +## CHANNEL_ALLOC_TX_CFG +Configuration settings for the TX side in the channel allocator +- Offset: `0x1fc` +- Reset default: `0x203` +- Reset mask: `0xff03` + +### Fields + +```wavejson +{"reg": [{"name": "bypass_en", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "auto_flush_en", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 6}, {"name": "auto_flush_count", "bits": 8, "attr": ["rw"], "rotate": -90}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:---------------------------------------------------------------------------------------------| +| 31:16 | | | | Reserved | +| 15:8 | rw | 0x2 | auto_flush_count | The number of cycles to wait before auto flushing (sending) packets in the channel allocator | +| 7:2 | | | | Reserved | +| 1 | rw | 0x1 | auto_flush_en | Enable the auto-flush feature of the TX side in the channel allocator | +| 0 | rw | 0x1 | bypass_en | Enable bypassing the TX channel allocator | + +## CHANNEL_ALLOC_TX_CH_EN_0 +Channel enable mask for the TX side. +- Offset: `0x200` +- Reset default: `0xffffffff` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CHANNEL_ALLOC_TX_CH_EN_0", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_1", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_2", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_3", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_4", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_5", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_6", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_7", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_8", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_9", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_10", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_11", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_12", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_13", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_14", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_15", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_16", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_17", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_18", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_19", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_20", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_21", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_22", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_23", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_24", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_25", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_26", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_27", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_28", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_29", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_30", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_31", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 270}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------------|:--------------| +| 31 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_31 | | +| 30 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_30 | | +| 29 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_29 | | +| 28 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_28 | | +| 27 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_27 | | +| 26 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_26 | | +| 25 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_25 | | +| 24 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_24 | | +| 23 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_23 | | +| 22 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_22 | | +| 21 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_21 | | +| 20 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_20 | | +| 19 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_19 | | +| 18 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_18 | | +| 17 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_17 | | +| 16 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_16 | | +| 15 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_15 | | +| 14 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_14 | | +| 13 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_13 | | +| 12 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_12 | | +| 11 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_11 | | +| 10 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_10 | | +| 9 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_9 | | +| 8 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_8 | | +| 7 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_7 | | +| 6 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_6 | | +| 5 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_5 | | +| 4 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_4 | | +| 3 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_3 | | +| 2 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_2 | | +| 1 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_1 | | +| 0 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_0 | | + +## CHANNEL_ALLOC_TX_CH_EN_1 +Channel enable mask for the TX side. +- Offset: `0x204` +- Reset default: `0x3f` +- Reset mask: `0x3f` + +### Fields + +```wavejson +{"reg": [{"name": "CHANNEL_ALLOC_TX_CH_EN_32", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_33", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_34", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_35", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_36", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_37", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 26}], "config": {"lanes": 1, "fontsize": 10, "vspace": 270}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------------|:----------------------------| +| 31:6 | | | | Reserved | +| 5 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_37 | For CHANNEL_ALLOC_TX_CH_EN1 | +| 4 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_36 | For CHANNEL_ALLOC_TX_CH_EN1 | +| 3 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_35 | For CHANNEL_ALLOC_TX_CH_EN1 | +| 2 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_34 | For CHANNEL_ALLOC_TX_CH_EN1 | +| 1 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_33 | For CHANNEL_ALLOC_TX_CH_EN1 | +| 0 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_32 | For CHANNEL_ALLOC_TX_CH_EN1 | + +## CHANNEL_ALLOC_TX_CTRL +Soft clear or force flush the TX side of the channel allocator +- Offset: `0x208` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "clear", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "flush", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------| +| 31:2 | | | | Reserved | +| 1 | wo | x | flush | Flush (transmit remaining data) in the TX side of the channel allocator. | +| 0 | wo | x | clear | Software clear the TX side of the channel allocator | + +## CHANNEL_ALLOC_RX_CFG +Configuration settings for the RX side in the channel allocator +- Offset: `0x20c` +- Reset default: `0x10203` +- Reset mask: `0x1ff03` + +### Fields + +```wavejson +{"reg": [{"name": "bypass_en", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "auto_flush_en", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 6}, {"name": "auto_flush_count", "bits": 8, "attr": ["rw"], "rotate": -90}, {"name": "sync_en", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 15}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:---------------------------------------------------------------------------------------------------------------| +| 31:17 | | | | Reserved | +| 16 | rw | 0x1 | sync_en | Enable (1) or disable (0) the synchronization barrier between the channels (needs to be disabled in raw mode). | +| 15:8 | rw | 0x2 | auto_flush_count | The number of cycles to wait before synchronizing on partial packets on the RX side | +| 7:2 | | | | Reserved | +| 1 | rw | 0x1 | auto_flush_en | Enable the auto-flush feature of the RX side in the channel allocator | +| 0 | rw | 0x1 | bypass_en | Enable bypassing the RX channel allocator | + +## CHANNEL_ALLOC_RX_CTRL +Soft clear the RX side of the channel allocator +- Offset: `0x210` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "clear", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | x | clear | Software clear the TX side of the channel allocator | + +## CHANNEL_ALLOC_RX_CH_EN_0 +Channel enable mask for the RX side. +- Offset: `0x214` +- Reset default: `0xffffffff` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CHANNEL_ALLOC_RX_CH_EN_0", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_1", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_2", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_3", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_4", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_5", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_6", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_7", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_8", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_9", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_10", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_11", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_12", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_13", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_14", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_15", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_16", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_17", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_18", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_19", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_20", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_21", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_22", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_23", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_24", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_25", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_26", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_27", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_28", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_29", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_30", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_31", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 270}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------------|:--------------| +| 31 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_31 | | +| 30 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_30 | | +| 29 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_29 | | +| 28 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_28 | | +| 27 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_27 | | +| 26 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_26 | | +| 25 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_25 | | +| 24 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_24 | | +| 23 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_23 | | +| 22 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_22 | | +| 21 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_21 | | +| 20 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_20 | | +| 19 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_19 | | +| 18 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_18 | | +| 17 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_17 | | +| 16 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_16 | | +| 15 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_15 | | +| 14 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_14 | | +| 13 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_13 | | +| 12 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_12 | | +| 11 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_11 | | +| 10 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_10 | | +| 9 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_9 | | +| 8 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_8 | | +| 7 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_7 | | +| 6 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_6 | | +| 5 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_5 | | +| 4 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_4 | | +| 3 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_3 | | +| 2 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_2 | | +| 1 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_1 | | +| 0 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_0 | | + +## CHANNEL_ALLOC_RX_CH_EN_1 +Channel enable mask for the RX side. +- Offset: `0x218` +- Reset default: `0x3f` +- Reset mask: `0x3f` + +### Fields + +```wavejson +{"reg": [{"name": "CHANNEL_ALLOC_RX_CH_EN_32", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_33", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_34", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_35", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_36", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_37", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 26}], "config": {"lanes": 1, "fontsize": 10, "vspace": 270}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------------|:----------------------------| +| 31:6 | | | | Reserved | +| 5 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_37 | For CHANNEL_ALLOC_RX_CH_EN1 | +| 4 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_36 | For CHANNEL_ALLOC_RX_CH_EN1 | +| 3 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_35 | For CHANNEL_ALLOC_RX_CH_EN1 | +| 2 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_34 | For CHANNEL_ALLOC_RX_CH_EN1 | +| 1 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_33 | For CHANNEL_ALLOC_RX_CH_EN1 | +| 0 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_32 | For CHANNEL_ALLOC_RX_CH_EN1 | + diff --git a/docs/um/ip/spim/data/spi_host_ot.hjson b/docs/um/ip/spim/data/spi_host_ot.hjson new file mode 100644 index 00000000..08b9823f --- /dev/null +++ b/docs/um/ip/spim/data/spi_host_ot.hjson @@ -0,0 +1,673 @@ +// Copyright lowRISC contributors (OpenTitan project). +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 +{ + name: "spi_host", + human_name: "SPI Host", + one_line_desc: "Serial peripheral interface for host mode, suitable for interfacing external serial NOR flash devices", + one_paragraph_desc: ''' + SPI Host bridges communications from the TileLink Uncached Light (TL-UL) bus and off-chip devices by acting as a SPI interface bus master, primarily intended for communication with serial NOR flash devices and other low-speed devices. + While SPI is not a formal standard, this implementation aims to be general enough to support a variety of devices by providing a plethora of run-time configurable options. + Communication with each device on the bus uses an independent chip select (CS), and each transaction may be individually configured regarding endianness, polarity and phase (CPOL/ CPHA), and full-duplex/half-duplex commands in standard mode. + 32-bit TL-UL registers interface with receive and transmit data FIFOs as well as a command FIFO for encoding multiple sequential 'segments' making up a larger SPI transaction. + This allows each segment to have an arbitrary byte-count, Std/Dual/Quad width, and direction, and it allows the CS to be managed automatically across multiple sequential segments. + ''' + // Unique comportable IP identifier defined under KNOWN_CIP_IDS in the regtool. + cip_id: "27", + design_spec: "../doc", + dv_doc: "../doc/dv", + hw_checklist: "../doc/checklist", + sw_checklist: "/sw/device/lib/dif/dif_spi_host", + revisions: [ + { + version: "3.0.0", + life_stage: "L1", + design_stage: "D0", + verification_stage: "V0", + dif_stage: "S1", + } + ] + clocking: [ + {clock: "clk_i", reset: "rst_ni", primary: true}, + ] + bus_interfaces: [ + { protocol: "tlul", direction: "device", racl_support: true } + ], + inter_signal_list: [ + { struct: "passthrough", + package: "spi_device_pkg", + type: "req_rsp", + name: "passthrough", + act: "rsp", + width: "1" + } + { struct: "logic", + type: "uni", + name: "lsio_trigger", + desc: ''' + Self-clearing status trigger for the DMA. + Set when RX or TX FIFOs are past their configured watermarks matching watermark interrupt behaviour. + ''' + act: "req", + } + { struct: "racl_policy_vec", + type: "uni", + name: "racl_policies", + act: "rcv", + package: "top_racl_pkg", + desc: ''' + Incoming RACL policy vector from a racl_ctrl instance. + The policy selection vector (parameter) selects the policy for each register. + ''' + } + { struct: "racl_error_log", + type: "uni", + name: "racl_error", + act: "req", + width: "1" + package: "top_racl_pkg", + desc: ''' + RACL error log information of this module. + ''' + } + ] + regwidth: "32", + param_list: [ + { name: "ByteOrder", + desc: '''Byte order to use when transmitting or receiving data. If ByteOrder = 0, + the IP uses a Big-Endian ordering for the bytes in DATA. + The most significant byte (MSB) of DATA is transmitted first, and + received data is placed in the MSB location of DATA. If ByteOrder = 1, + a Little-Endian ordering is used for these registers, and the LSB of each + gets priority for receiving and transmitting data.''' + type: "logic", + default: "1" + }, + { name: "NumCS", + desc: "The number of active-low chip select (cs_n) lines to create.", + type: "int", + default: "1" + local: "true", + expose: "true", + }, + { name: "TxDepth", + desc: "The size of the Tx FIFO (in words)", + type: "int", + default: "72" + }, + { name: "RxDepth", + desc: "The size of the Rx FIFO (in words)", + type: "int", + default: "64" + }, + { name: "CmdDepth", + desc: "The size of the Cmd FIFO (one segment descriptor per entry)", + type: "int", + default: "4" + } + ], + available_output_list: [ + { name: "sck" + desc: "SPI Clock" + }, + { name: "csb" + desc: '''Chip Select# (One hot, active low). The size of this port should match NumCS.''' + width: "1" + } + ], + available_inout_list: [ + { name: "sd", + desc: "SPI data bus", + width: "4" + }, + ], + interrupt_list: [ + { name: "error", + desc: '''Error-related interrupts, see !!ERROR_ENABLE register for more + information.''' + }, + { name: "spi_event", + type: "status", + desc: '''Event-related interrupts, see !!EVENT_ENABLE register for more + information.''' + } + ], + alert_list: [ + { name: "fatal_fault", + desc: ''' + This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected. + ''' + } + ], + features: [ + { name: "SPIHOST.USECASE.SERIALNORFLASH", + desc: ''' + The SPI host block can talk to serial NOR flash devices. + ''' + }, + { name: "SPIHOST.USECASE.PASSTHROUGH", + desc: ''' + The SPI host block can work together with a device to create a pass through. + ''' + }, + { name: "SPIHOST.RATE.STANDARD", + desc: ''' + Host can operate in standard SPI data rate. + ''' + }, + { name: "SPIHOST.RATE.DUAL", + desc: ''' + Host can operate in dual SPI data rate. + ''' + }, + { name: "SPIHOST.RATE.QUAD", + desc: ''' + Host can operate in quad SPI data rate. + ''' + }, + { name: "SPIHOST.CONFIG.CPOL", + desc: ''' + The polarity of the SPI can be configured. + ''' + }, + { name: "SPIHOST.CONFIG.CLOCKDIV", + desc: ''' + The clock divider in the SPI host can be configured. + ''' + }, + { name: "SPIHOST.EVENT.WATERMARK", + desc: ''' + The block can be configured to raise an event on watermarks for transmit and receive queues. + ''' + }, + { name: "SPIHOST.EVENT.FULL", + desc: ''' + The block can be configured to raise an event when the receive queue is full. + ''' + }, + { name: "SPIHOST.EVENT.EMPTY", + desc: ''' + The block can be configured to raise an event when the transmit queue is empty. + ''' + } + ], + countermeasures: [ + { name: "BUS.INTEGRITY", + desc: "End-to-end bus integrity scheme." + } + ] + registers: [ + { name: "CONTROL", + desc: "Control register", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31", + name: "SPIEN", + desc: '''Enables the SPI host. On reset, this field is 0, meaning + that no transactions can proceed.''' + resval: "0x0" + }, + { bits: "30", + name: "SW_RST", + desc: '''Clears the internal state (not registers) to the reset state when set to 1, + including the FIFOs, the CDC's, the core state machine and the shift register. + In the current implementation, the CDC FIFOs are drained not reset. + Therefore software must confirm that both FIFO's empty before releasing + the IP from reset.''', + resval: "0x0" + }, + { bits: "29", + name: "OUTPUT_EN", + desc: '''Enable the SPI host output buffers for the sck, csb, and sd lines. This allows + the SPI_HOST IP to connect to the same bus as other SPI controllers without + interference.''', + resval: "0x0" + }, + { bits: "15:8", + name: "TX_WATERMARK" + desc: '''If !!EVENT_ENABLE.TXWM is set, the IP will send + an interrupt when the depth of the TX FIFO drops below + TX_WATERMARK words (32b each).''' + resval: "0" + }, + { bits: "7:0", + name: "RX_WATERMARK" + desc: '''If !!EVENT_ENABLE.RXWM is set, the IP will send + an interrupt when the depth of the RX FIFO reaches + RX_WATERMARK words (32b each).''' + resval: "127" + }, + ] + }, + { name: "STATUS", + desc: "Status register", + swaccess: "ro", + hwaccess: "hwo", + fields: [ + { bits: "31", + name: "READY", + desc: '''When high, indicates the SPI host is ready to receive + commands. Writing to COMMAND when READY is low is + an error, and will trigger an interrupt.''', + resval: "0x0" + }, + { bits: "30", + name: "ACTIVE", + desc: '''When high, indicates the SPI host is processing a previously + issued command.''' + resval: "0x0" + }, + { bits: "29", + name: "TXFULL", + desc: '''When high, indicates that the transmit data fifo is full. + Any further writes to !!TXDATA will create an error interrupt. + ''' + resval: "0x0" + }, + { bits: "28", + name: "TXEMPTY", + desc: '''When high, indicates that the transmit data fifo is empty. + ''' + resval: "0x0" + }, + { bits: "27" + name: "TXSTALL", + desc: '''If high, signifies that an ongoing transaction has stalled + due to lack of data in the TX FIFO''', + resval: "0x0" + }, + { bits: "26", + name: "TXWM", + desc: '''If high, the amount of data in the TX FIFO has fallen below the + level of !!CONTROL.TX_WATERMARK words (32b each).''' + resval: "0x0" + }, + { bits: "25", + name: "RXFULL", + desc: '''When high, indicates that the receive fifo is full. Any + ongoing transactions will stall until firmware reads some + data from !!RXDATA.''' + resval: "0x0" + }, + { bits: "24", + name: "RXEMPTY", + desc: '''When high, indicates that the receive fifo is empty. + Any reads from RX FIFO will cause an error interrupt.''' + resval: "0x0" + }, + { bits: "23", + name: "RXSTALL", + desc: '''If high, signifies that an ongoing transaction has stalled + due to lack of available space in the RX FIFO''', + resval: "0x0" + }, + { bits: "22", + name: "BYTEORDER", + desc: '''The value of the ByteOrder parameter, provided so that firmware + can confirm proper IP configuration.''' + } + { bits: "20", + name: "RXWM", + desc: '''If high, the number of 32-bits in the RX FIFO now exceeds the + !!CONTROL.RX_WATERMARK entries (32b each).''' + resval: "0x0" + }, + { bits: "19:16", + name: "CMDQD", + desc: '''Command queue depth. Indicates how many unread 32-bit words are + currently in the command segment queue.''', + resval: "0x0" + }, + { bits: "15:8", + name: "RXQD", + desc: '''Receive queue depth. Indicates how many unread 32-bit words are + currently in the RX FIFO. When active, this result may an + underestimate due to synchronization delays.''', + resval: "0x0" + }, + { bits: "7:0", + name: "TXQD", + desc: '''Transmit queue depth. + Indicates how many unsent 32-bit words are currently in the TX FIFO. + When active, this result may be an overestimate due to synchronization delays. + ''', + resval: "0x0" + } + ] + tags: [// Updated by the hw. Exclude from init and write-checks. + "excl:CsrAllTests:CsrExclCheck"] + + }, + { name: "CONFIGOPTS", + desc: '''Configuration options register. + + Contains options for controlling the current peripheral. + Firmware needs to configure the options before the transfer. + ''' + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31", + name: "CPOL", + desc: '''The polarity of the sck clock signal. When CPOL is 0, + sck is low when idle, and emits high pulses. When CPOL + is 1, sck is high when idle, and emits a series of low + pulses.''' + resval: "0x0" + }, + { bits: "30", + name: "CPHA", + desc: '''The phase of the sck clock signal relative to the data. When + CPHA = 0, the data changes on the trailing edge of sck + and is typically sampled on the leading edge. Conversely + if CPHA = 1 high, data lines change on the leading edge of + sck and are typically sampled on the trailing edge. + CPHA should be chosen to match the phase of the selected + device. The sampling behavior is modified by the + !!CONFIGOPTS.FULLCYC bit.''', + resval: "0x0" + }, + { bits: "29", + name: "FULLCYC", + desc: '''Full cycle. Modifies the CPHA sampling behaviour to allow + for longer device logic setup times. Rather than sampling the SD + bus a half cycle after shifting out data, the data is sampled + a full cycle after shifting data out. This means that if + CPHA = 0, data is shifted out on the trailing edge, and + sampled a full cycle later. If CPHA = 1, data is shifted and + sampled with the trailing edge, also separated by a + full cycle.''', + resval: 0 + }, + { bits: "27:24", + name: "CSNLEAD", + desc: '''CS_N Leading Time. Indicates the number of half sck cycles, + CSNLEAD+1, to leave between the falling edge of cs_n and + the first edge of sck. Setting this register to zero + corresponds to the minimum delay of one-half sck cycle''' + resval: 0 + }, + { bits: "23:20", + name: "CSNTRAIL" + desc: '''CS_N Trailing Time. Indicates the number of half sck cycles, + CSNTRAIL+1, to leave between last edge of sck and the rising + edge of cs_n. Setting this register to zero corresponds + to the minimum delay of one-half sck cycle.''' + resval: 0 + }, + { bits: "19:16", + name: "CSNIDLE" + desc: '''Minimum idle time between commands. Indicates the minimum + number of sck half-cycles to hold cs_n high between commands. + Setting this register to zero creates a minimally-wide CS_N-high + pulse of one-half sck cycle.''' + resval: 0 + }, + { bits: "15:0", + name: "CLKDIV", + desc: '''Core clock divider. Slows down subsequent SPI transactions by a + factor of (CLKDIV+1) relative to the core clock frequency. The + period of sck, T(sck) then becomes `2*(CLK_DIV+1)*T(core)`''' + resval: 0 + }, + ] + }, + { name: "CSID", + desc: '''Chip-Select ID + + Controls which device to target with the next command. This register + is passed to the core whenever !!COMMAND is written. The core then + asserts cio_csb_o[!!CSID] during the execution of the command.''', + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0", + name: "CSID", + desc: "Chip Select ID", + resval: "0x0" + } + ] + }, + { name: "COMMAND", + desc: '''Command Register + + Parameters specific to each command segment. Unlike the !!CONFIGOPTS multi-register, + there is only one command register for controlling all attached SPI devices''', + swaccess: "wo", + hwaccess: "hro", + hwext: "true", + hwqe: "true", + fields: [ + { bits: "24:5", + name: "LEN", + desc: '''Segment Length. + + For read or write segments, this field controls the + number of 1-byte bursts to transmit and or receive in + this command segment. The number of cyles required + to send or received a byte will depend on !!COMMAND.SPEED. + For dummy segments, (!!COMMAND.DIRECTION == 0), this register + controls the number of dummy cycles to issue. + The number of bytes (or dummy cycles) in the segment will be + equal to !!COMMAND.LEN + 1.''', + resval: "0x0" + }, + { bits: "4:3", + name: "DIRECTION", + desc: '''The direction for the following command: "0" = Dummy cycles + (no TX/RX). "1" = Rx only, "2" = Tx only, "3" = Bidirectional + Tx/Rx (Standard SPI mode only).''' + resval: "0x0" + } + { bits: "2:1", + name: "SPEED", + desc: '''The speed for this command segment: "0" = Standard SPI. "1" = Dual SPI. + "2"=Quad SPI, "3": RESERVED.''', + resval: "0x0" + }, + { bits: "0", + name: "CSAAT", + desc: '''**C**hip **S**elect **A**ctive **A**fter **T**ransaction. + If !!COMMAND.CSAAT = 0, the chip select line is raised immediately + at the end of the command segment. + If !!COMMAND.CSAAT = 1, the chip select line is left low at the + end of the current transaction segment. + This allows the creation of longer, more complete SPI transactions, + consisting of several separate segments for issuing instructions, + pausing for dummy cycles, and transmitting or receiving data from + the device.''', + resval: "0x0" + }, + ], + tags: [// Triggers exceptions if registers are improperly configured + // Exclude from RW tests + "excl:CsrAllTests:CsrExclWrite"] + }, + { window: { + name: "RXDATA", + items: "1", + validbits: "32", + desc: '''SPI Receive Data. + + Reads from this window pull data from the RXFIFO. + + The serial order of bit transmission + is chosen to match SPI flash devices. Individual bytes + are always transmitted with the most significant bit first. + Only four-byte reads are supported. If ByteOrder = 0, + the first byte received is packed in the MSB of !!RXDATA. + For some processor architectures, this could lead to shuffling + of flash data as compared to how it is written in memory. + In which case, choosing ByteOrder = 1 can reverse the + byte-order of each data read, causing the first byte + received to be packed into the LSB of !!RXDATA. (Though within + each byte the most significant bit is always pulled + from the bus first.)''' + swaccess: "ro", + } + }, + { window: { + name: "TXDATA", + items: "1", + validbits: "32", + byte-write: "true", + desc: '''SPI Transmit Data. + + Data written to this window is placed into the TXFIFO. + Byte-enables are supported for writes. + + The serial order of bit transmission + is chosen to match SPI flash devices. Individual bytes + are always transmitted with the most significant bit first. + Multi-byte writes are also supported, and if ByteOrder = 0, + the bits of !!TXDATA are transmitted strictly in order of + decreasing signficance (i.e. most signicant bit first). + For some processor architectures, this could lead to shuffling + of flash data as compared to how it is written in memory. + In which case, choosing ByteOrder = 1 can reverse the + byte-order of multi-byte data writes. (Though within + each byte the most significant bit is always sent first.)''' + swaccess: "wo", + unusual: "false" + } + }, + { name: "ERROR_ENABLE", + desc: "Controls which classes of errors raise an interrupt." + swaccess: "rw", + hwaccess: "hro", + fields: [ + # Bit 5 (Access Invalid) always triggers an error, so bit 5 is reserved. + { bits: "4", + name: "CSIDINVAL", + desc: '''Invalid CSID: If this bit is set, the block sends an error interrupt whenever + a command is submitted, but CSID exceeds NumCS.''', + resval: "0x1" + } + { bits: "3", + name: "CMDINVAL", + desc: '''Invalid Command Errors: If this bit is set, the block sends an + error interrupt whenever a command is sent with invalid values for + !!COMMAND.SPEED or !!COMMAND.DIRECTION.''', + resval: "0x1" + }, + { bits: "2", + name: "UNDERFLOW", + desc: '''Underflow Errors: If this bit is set, the block sends an + error interrupt whenever there is a read from !!RXDATA + but the RX FIFO is empty.''' + resval: "0x1" + }, + { bits: "1", + name: "OVERFLOW", + desc: '''Overflow Errors: If this bit is set, the block sends an + error interrupt whenever the TX FIFO overflows.''' + resval: "0x1" + }, + { bits: "0", + name: "CMDBUSY", + desc: '''Command Error: If this bit is set, the block sends an error + interrupt whenever a command is issued while busy (i.e. a 1 is + when !!STATUS.READY is not asserted.)''', + resval: "0x1" + }, + ] + }, + { name: "ERROR_STATUS", + desc: '''Indicates that any errors that have occurred. + When an error + occurs, the corresponding bit must be cleared here before + issuing any further commands.''' + swaccess: "rw1c", + hwaccess: "hrw", + fields: [ + { bits: "5", + name: "ACCESSINVAL", + desc: '''Indicates that TLUL attempted to write to TXDATA with no bytes enabled. Such + 'zero byte' writes are not supported.''', + resval: "0x0" + tags: [// Updated by the hw. Exclude from init and write-checks. + "excl:CsrAllTests:CsrExclCheck"] + }, + { bits: "4", + name: "CSIDINVAL", + desc: '''Indicates a command was attempted with an invalid value for !!CSID.''', + resval: "0x0" + }, + { bits: "3", + name: "CMDINVAL", + desc: '''Indicates an invalid command segment, meaning either an invalid value of + !!COMMAND.SPEED or a request for bidirectional data transfer at dual or quad + speed''', + resval: "0x0" + }, + { bits: "2", + name: "UNDERFLOW", + desc: '''Indicates that firmware has attempted to read from + !!RXDATA when the RX FIFO is empty.''', + resval: "0x0" + }, + { bits: "1", + name: "OVERFLOW", + desc: '''Indicates that firmware has overflowed the TX FIFO''' + resval: "0x0" + tags: [// Updated by the hw. Exclude from init and write-checks. + "excl:CsrAllTests:CsrExclCheck"] + }, + { bits: "0", + name: "CMDBUSY", + desc: '''Indicates a write to !!COMMAND when !!STATUS.READY = 0. + ''' + resval: "0x0" + }, + ] + }, + { name: "EVENT_ENABLE", + desc: "Controls which classes of SPI events raise an interrupt.", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "5", + name: "IDLE", + desc: '''Assert to send a spi_event interrupt whenever !!STATUS.ACTIVE + goes low''', + resval: "0x0" + } + { bits: "4", + name: "READY", + desc: '''Assert to send a spi_event interrupt whenever !!STATUS.READY + goes high''', + resval: "0x0" + }, + { bits: "3", + name: "TXWM", + desc: '''Assert to send a spi_event interrupt whenever the number of 32-bit words in + the TX FIFO is less than !!CONTROL.TX_WATERMARK. To prevent the + reassertion of this interrupt add more data to the TX FIFO, or + reduce !!CONTROL.TX_WATERMARK.''', + resval: "0x0" + }, + { bits: "2", + name: "RXWM", + desc: '''Assert to send a spi_event interrupt whenever the number of 32-bit words in + the RX FIFO is greater than !!CONTROL.RX_WATERMARK. To prevent the + reassertion of this interrupt, read more data from the RX FIFO, or + increase !!CONTROL.RX_WATERMARK.''', + resval: "0x0" + }, + { bits: "1", + name: "TXEMPTY", + desc: '''Assert to send a spi_event interrupt whenever !!STATUS.TXEMPTY + goes high''', + resval: "0x0" + }, + { bits: "0", + name: "RXFULL", + desc: '''Assert to send a spi_event interrupt whenever !!STATUS.RXFULL + goes high''', + resval: "0x0" + }, + ] + } + ] +} \ No newline at end of file diff --git a/docs/um/ip/spim/doc/registers.md b/docs/um/ip/spim/doc/registers.md new file mode 100644 index 00000000..867a0e15 --- /dev/null +++ b/docs/um/ip/spim/doc/registers.md @@ -0,0 +1,459 @@ +## Summary + +| Name | Offset | Length | Description | +|:-----------------------------------------|:---------|---------:|:---------------------------------------------------------| +| spi_host.[`INTR_STATE`](#intr_state) | 0x0 | 4 | Interrupt State Register | +| spi_host.[`INTR_ENABLE`](#intr_enable) | 0x4 | 4 | Interrupt Enable Register | +| spi_host.[`INTR_TEST`](#intr_test) | 0x8 | 4 | Interrupt Test Register | +| spi_host.[`ALERT_TEST`](#alert_test) | 0xc | 4 | Alert Test Register | +| spi_host.[`CONTROL`](#control) | 0x10 | 4 | Control register | +| spi_host.[`STATUS`](#status) | 0x14 | 4 | Status register | +| spi_host.[`CONFIGOPTS`](#configopts) | 0x18 | 4 | Configuration options register. | +| spi_host.[`CSID`](#csid) | 0x1c | 4 | Chip-Select ID | +| spi_host.[`COMMAND`](#command) | 0x20 | 4 | Command Register | +| spi_host.[`RXDATA`](#rxdata) | 0x24 | 4 | SPI Receive Data. | +| spi_host.[`TXDATA`](#txdata) | 0x28 | 4 | SPI Transmit Data. | +| spi_host.[`ERROR_ENABLE`](#error_enable) | 0x2c | 4 | Controls which classes of errors raise an interrupt. | +| spi_host.[`ERROR_STATUS`](#error_status) | 0x30 | 4 | Indicates that any errors that have occurred. | +| spi_host.[`EVENT_ENABLE`](#event_enable) | 0x34 | 4 | Controls which classes of SPI events raise an interrupt. | + +## INTR_STATE +Interrupt State Register +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "error", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "spi_event", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:---------------------------------------------------------------------------------------------| +| 31:2 | | | | Reserved | +| 1 | ro | 0x0 | spi_event | Event-related interrupts, see [`EVENT_ENABLE`](#event_enable) register for more information. | +| 0 | rw1c | 0x0 | error | Error-related interrupts, see [`ERROR_ENABLE`](#error_enable) register for more information. | + +## INTR_ENABLE +Interrupt Enable Register +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "error", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "spi_event", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:--------------------------------------------------------------------| +| 31:2 | | | | Reserved | +| 1 | rw | 0x0 | spi_event | Enable interrupt when [`INTR_STATE.spi_event`](#intr_state) is set. | +| 0 | rw | 0x0 | error | Enable interrupt when [`INTR_STATE.error`](#intr_state) is set. | + +## INTR_TEST +Interrupt Test Register +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "error", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "spi_event", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-------------------------------------------------------------| +| 31:2 | | | | Reserved | +| 1 | wo | 0x0 | spi_event | Write 1 to force [`INTR_STATE.spi_event`](#intr_state) to 1. | +| 0 | wo | 0x0 | error | Write 1 to force [`INTR_STATE.error`](#intr_state) to 1. | + +## ALERT_TEST +Alert Test Register +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "fatal_fault", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:-------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | fatal_fault | Write 1 to trigger one alert event of this kind. | + +## CONTROL +Control register +- Offset: `0x10` +- Reset default: `0x7f` +- Reset mask: `0xe000ffff` + +### Fields + +```wavejson +{"reg": [{"name": "RX_WATERMARK", "bits": 8, "attr": ["rw"], "rotate": 0}, {"name": "TX_WATERMARK", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 13}, {"name": "OUTPUT_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "SW_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "SPIEN", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:---------------------------------------| +| 31 | rw | 0x0 | [SPIEN](#control--spien) | +| 30 | rw | 0x0 | [SW_RST](#control--sw_rst) | +| 29 | rw | 0x0 | [OUTPUT_EN](#control--output_en) | +| 28:16 | | | Reserved | +| 15:8 | rw | 0x0 | [TX_WATERMARK](#control--tx_watermark) | +| 7:0 | rw | 0x7f | [RX_WATERMARK](#control--rx_watermark) | + +### CONTROL . SPIEN +Enables the SPI host. On reset, this field is 0, meaning + that no transactions can proceed. + +### CONTROL . SW_RST +Clears the internal state (not registers) to the reset state when set to 1, + including the FIFOs, the CDC's, the core state machine and the shift register. + In the current implementation, the CDC FIFOs are drained not reset. + Therefore software must confirm that both FIFO's empty before releasing + the IP from reset. + +### CONTROL . OUTPUT_EN +Enable the SPI host output buffers for the sck, csb, and sd lines. This allows + the SPI_HOST IP to connect to the same bus as other SPI controllers without + interference. + +### CONTROL . TX_WATERMARK +If [`EVENT_ENABLE.TXWM`](#event_enable) is set, the IP will send + an interrupt when the depth of the TX FIFO drops below + TX_WATERMARK words (32b each). + +### CONTROL . RX_WATERMARK +If [`EVENT_ENABLE.RXWM`](#event_enable) is set, the IP will send + an interrupt when the depth of the RX FIFO reaches + RX_WATERMARK words (32b each). + +## STATUS +Status register +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0xffdfffff` + +### Fields + +```wavejson +{"reg": [{"name": "TXQD", "bits": 8, "attr": ["ro"], "rotate": 0}, {"name": "RXQD", "bits": 8, "attr": ["ro"], "rotate": 0}, {"name": "CMDQD", "bits": 4, "attr": ["ro"], "rotate": 0}, {"name": "RXWM", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 1}, {"name": "BYTEORDER", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RXSTALL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RXEMPTY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RXFULL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "TXWM", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "TXSTALL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "TXEMPTY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "TXFULL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "ACTIVE", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "READY", "bits": 1, "attr": ["ro"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:--------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31 | ro | 0x0 | READY | When high, indicates the SPI host is ready to receive commands. Writing to COMMAND when READY is low is an error, and will trigger an interrupt. | +| 30 | ro | 0x0 | ACTIVE | When high, indicates the SPI host is processing a previously issued command. | +| 29 | ro | 0x0 | TXFULL | When high, indicates that the transmit data fifo is full. Any further writes to [`TXDATA`](#txdata) will create an error interrupt. | +| 28 | ro | 0x0 | TXEMPTY | When high, indicates that the transmit data fifo is empty. | +| 27 | ro | 0x0 | TXSTALL | If high, signifies that an ongoing transaction has stalled due to lack of data in the TX FIFO | +| 26 | ro | 0x0 | TXWM | If high, the amount of data in the TX FIFO has fallen below the level of [`CONTROL.TX_WATERMARK`](#control) words (32b each). | +| 25 | ro | 0x0 | RXFULL | When high, indicates that the receive fifo is full. Any ongoing transactions will stall until firmware reads some data from [`RXDATA.`](#rxdata) | +| 24 | ro | 0x0 | RXEMPTY | When high, indicates that the receive fifo is empty. Any reads from RX FIFO will cause an error interrupt. | +| 23 | ro | 0x0 | RXSTALL | If high, signifies that an ongoing transaction has stalled due to lack of available space in the RX FIFO | +| 22 | ro | 0x0 | BYTEORDER | The value of the ByteOrder parameter, provided so that firmware can confirm proper IP configuration. | +| 21 | | | | Reserved | +| 20 | ro | 0x0 | RXWM | If high, the number of 32-bits in the RX FIFO now exceeds the [`CONTROL.RX_WATERMARK`](#control) entries (32b each). | +| 19:16 | ro | 0x0 | CMDQD | Command queue depth. Indicates how many unread 32-bit words are currently in the command segment queue. | +| 15:8 | ro | 0x0 | RXQD | Receive queue depth. Indicates how many unread 32-bit words are currently in the RX FIFO. When active, this result may an underestimate due to synchronization delays. | +| 7:0 | ro | 0x0 | TXQD | Transmit queue depth. Indicates how many unsent 32-bit words are currently in the TX FIFO. When active, this result may be an overestimate due to synchronization delays. | + +## CONFIGOPTS +Configuration options register. + + Contains options for controlling the current peripheral. + Firmware needs to configure the options before the transfer. +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xefffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CLKDIV", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "CSNIDLE", "bits": 4, "attr": ["rw"], "rotate": -90}, {"name": "CSNTRAIL", "bits": 4, "attr": ["rw"], "rotate": -90}, {"name": "CSNLEAD", "bits": 4, "attr": ["rw"], "rotate": -90}, {"bits": 1}, {"name": "FULLCYC", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CPHA", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CPOL", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 100}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:----------------------------------| +| 31 | rw | 0x0 | [CPOL](#configopts--cpol) | +| 30 | rw | 0x0 | [CPHA](#configopts--cpha) | +| 29 | rw | 0x0 | [FULLCYC](#configopts--fullcyc) | +| 28 | | | Reserved | +| 27:24 | rw | 0x0 | [CSNLEAD](#configopts--csnlead) | +| 23:20 | rw | 0x0 | [CSNTRAIL](#configopts--csntrail) | +| 19:16 | rw | 0x0 | [CSNIDLE](#configopts--csnidle) | +| 15:0 | rw | 0x0 | [CLKDIV](#configopts--clkdiv) | + +### CONFIGOPTS . CPOL +The polarity of the sck clock signal. When CPOL is 0, + sck is low when idle, and emits high pulses. When CPOL + is 1, sck is high when idle, and emits a series of low + pulses. + +### CONFIGOPTS . CPHA +The phase of the sck clock signal relative to the data. When + CPHA = 0, the data changes on the trailing edge of sck + and is typically sampled on the leading edge. Conversely + if CPHA = 1 high, data lines change on the leading edge of + sck and are typically sampled on the trailing edge. + CPHA should be chosen to match the phase of the selected + device. The sampling behavior is modified by the + [`CONFIGOPTS.FULLCYC`](#configopts) bit. + +### CONFIGOPTS . FULLCYC +Full cycle. Modifies the CPHA sampling behaviour to allow + for longer device logic setup times. Rather than sampling the SD + bus a half cycle after shifting out data, the data is sampled + a full cycle after shifting data out. This means that if + CPHA = 0, data is shifted out on the trailing edge, and + sampled a full cycle later. If CPHA = 1, data is shifted and + sampled with the trailing edge, also separated by a + full cycle. + +### CONFIGOPTS . CSNLEAD +CS_N Leading Time. Indicates the number of half sck cycles, + CSNLEAD+1, to leave between the falling edge of cs_n and + the first edge of sck. Setting this register to zero + corresponds to the minimum delay of one-half sck cycle + +### CONFIGOPTS . CSNTRAIL +CS_N Trailing Time. Indicates the number of half sck cycles, + CSNTRAIL+1, to leave between last edge of sck and the rising + edge of cs_n. Setting this register to zero corresponds + to the minimum delay of one-half sck cycle. + +### CONFIGOPTS . CSNIDLE +Minimum idle time between commands. Indicates the minimum + number of sck half-cycles to hold cs_n high between commands. + Setting this register to zero creates a minimally-wide CS_N-high + pulse of one-half sck cycle. + +### CONFIGOPTS . CLKDIV +Core clock divider. Slows down subsequent SPI transactions by a + factor of (CLKDIV+1) relative to the core clock frequency. The + period of sck, T(sck) then becomes `2*(CLK_DIV+1)*T(core)` + +## CSID +Chip-Select ID + + Controls which device to target with the next command. This register + is passed to the core whenever [`COMMAND`](#command) is written. The core then + asserts cio_csb_o[[`CSID`](#csid)] during the execution of the command. +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CSID", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------| +| 31:0 | rw | 0x0 | CSID | Chip Select ID | + +## COMMAND +Command Register + + Parameters specific to each command segment. Unlike the [`CONFIGOPTS`](#configopts) multi-register, + there is only one command register for controlling all attached SPI devices +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0x1ffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CSAAT", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "SPEED", "bits": 2, "attr": ["wo"], "rotate": -90}, {"name": "DIRECTION", "bits": 2, "attr": ["wo"], "rotate": -90}, {"name": "LEN", "bits": 20, "attr": ["wo"], "rotate": 0}, {"bits": 7}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:---------------------------------| +| 31:25 | | | Reserved | +| 24:5 | wo | 0x0 | [LEN](#command--len) | +| 4:3 | wo | 0x0 | [DIRECTION](#command--direction) | +| 2:1 | wo | 0x0 | [SPEED](#command--speed) | +| 0 | wo | 0x0 | [CSAAT](#command--csaat) | + +### COMMAND . LEN +Segment Length. + + For read or write segments, this field controls the + number of 1-byte bursts to transmit and or receive in + this command segment. The number of cyles required + to send or received a byte will depend on [`COMMAND.SPEED.`](#command) + For dummy segments, ([`COMMAND.DIRECTION`](#command) == 0), this register + controls the number of dummy cycles to issue. + The number of bytes (or dummy cycles) in the segment will be + equal to [`COMMAND.LEN`](#command) + 1. + +### COMMAND . DIRECTION +The direction for the following command: "0" = Dummy cycles + (no TX/RX). "1" = Rx only, "2" = Tx only, "3" = Bidirectional + Tx/Rx (Standard SPI mode only). + +### COMMAND . SPEED +The speed for this command segment: "0" = Standard SPI. "1" = Dual SPI. + "2"=Quad SPI, "3": RESERVED. + +### COMMAND . CSAAT +**C**hip **S**elect **A**ctive **A**fter **T**ransaction. + If [`COMMAND.CSAAT`](#command) = 0, the chip select line is raised immediately + at the end of the command segment. + If [`COMMAND.CSAAT`](#command) = 1, the chip select line is left low at the + end of the current transaction segment. + This allows the creation of longer, more complete SPI transactions, + consisting of several separate segments for issuing instructions, + pausing for dummy cycles, and transmitting or receiving data from + the device. + +## RXDATA +SPI Receive Data. + + Reads from this window pull data from the RXFIFO. + + The serial order of bit transmission + is chosen to match SPI flash devices. Individual bytes + are always transmitted with the most significant bit first. + Only four-byte reads are supported. If ByteOrder = 0, + the first byte received is packed in the MSB of !!RXDATA. + For some processor architectures, this could lead to shuffling + of flash data as compared to how it is written in memory. + In which case, choosing ByteOrder = 1 can reverse the + byte-order of each data read, causing the first byte + received to be packed into the LSB of !!RXDATA. (Though within + each byte the most significant bit is always pulled + from the bus first.) + +- Word Aligned Offset Range: `0x24`to`0x24` +- Size (words): `1` +- Access: `ro` +- Byte writes are *not* supported. + +## TXDATA +SPI Transmit Data. + + Data written to this window is placed into the TXFIFO. + Byte-enables are supported for writes. + + The serial order of bit transmission + is chosen to match SPI flash devices. Individual bytes + are always transmitted with the most significant bit first. + Multi-byte writes are also supported, and if ByteOrder = 0, + the bits of !!TXDATA are transmitted strictly in order of + decreasing signficance (i.e. most signicant bit first). + For some processor architectures, this could lead to shuffling + of flash data as compared to how it is written in memory. + In which case, choosing ByteOrder = 1 can reverse the + byte-order of multi-byte data writes. (Though within + each byte the most significant bit is always sent first.) + +- Word Aligned Offset Range: `0x28`to`0x28` +- Size (words): `1` +- Access: `wo` +- Byte writes are supported. + +## ERROR_ENABLE +Controls which classes of errors raise an interrupt. +- Offset: `0x2c` +- Reset default: `0x1f` +- Reset mask: `0x1f` + +### Fields + +```wavejson +{"reg": [{"name": "CMDBUSY", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "OVERFLOW", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "UNDERFLOW", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CMDINVAL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CSIDINVAL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 27}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:5 | | | | Reserved | +| 4 | rw | 0x1 | CSIDINVAL | Invalid CSID: If this bit is set, the block sends an error interrupt whenever a command is submitted, but CSID exceeds NumCS. | +| 3 | rw | 0x1 | CMDINVAL | Invalid Command Errors: If this bit is set, the block sends an error interrupt whenever a command is sent with invalid values for [`COMMAND.SPEED`](#command) or [`COMMAND.DIRECTION.`](#command) | +| 2 | rw | 0x1 | UNDERFLOW | Underflow Errors: If this bit is set, the block sends an error interrupt whenever there is a read from [`RXDATA`](#rxdata) but the RX FIFO is empty. | +| 1 | rw | 0x1 | OVERFLOW | Overflow Errors: If this bit is set, the block sends an error interrupt whenever the TX FIFO overflows. | +| 0 | rw | 0x1 | CMDBUSY | Command Error: If this bit is set, the block sends an error interrupt whenever a command is issued while busy (i.e. a 1 is when [`STATUS.READY`](#status) is not asserted.) | + +## ERROR_STATUS +Indicates that any errors that have occurred. + When an error + occurs, the corresponding bit must be cleared here before + issuing any further commands. +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0x3f` + +### Fields + +```wavejson +{"reg": [{"name": "CMDBUSY", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "OVERFLOW", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "UNDERFLOW", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "CMDINVAL", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "CSIDINVAL", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "ACCESSINVAL", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"bits": 26}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:6 | | | | Reserved | +| 5 | rw1c | 0x0 | ACCESSINVAL | Indicates that TLUL attempted to write to TXDATA with no bytes enabled. Such 'zero byte' writes are not supported. | +| 4 | rw1c | 0x0 | CSIDINVAL | Indicates a command was attempted with an invalid value for [`CSID.`](#csid) | +| 3 | rw1c | 0x0 | CMDINVAL | Indicates an invalid command segment, meaning either an invalid value of [`COMMAND.SPEED`](#command) or a request for bidirectional data transfer at dual or quad speed | +| 2 | rw1c | 0x0 | UNDERFLOW | Indicates that firmware has attempted to read from [`RXDATA`](#rxdata) when the RX FIFO is empty. | +| 1 | rw1c | 0x0 | OVERFLOW | Indicates that firmware has overflowed the TX FIFO | +| 0 | rw1c | 0x0 | CMDBUSY | Indicates a write to [`COMMAND`](#command) when [`STATUS.READY`](#status) = 0. | + +## EVENT_ENABLE +Controls which classes of SPI events raise an interrupt. +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0x3f` + +### Fields + +```wavejson +{"reg": [{"name": "RXFULL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "TXEMPTY", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RXWM", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "TXWM", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "READY", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "IDLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 26}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:----------------------------------| +| 31:6 | | | Reserved | +| 5 | rw | 0x0 | [IDLE](#event_enable--idle) | +| 4 | rw | 0x0 | [READY](#event_enable--ready) | +| 3 | rw | 0x0 | [TXWM](#event_enable--txwm) | +| 2 | rw | 0x0 | [RXWM](#event_enable--rxwm) | +| 1 | rw | 0x0 | [TXEMPTY](#event_enable--txempty) | +| 0 | rw | 0x0 | [RXFULL](#event_enable--rxfull) | + +### EVENT_ENABLE . IDLE +Assert to send a spi_event interrupt whenever [`STATUS.ACTIVE`](#status) + goes low + +### EVENT_ENABLE . READY +Assert to send a spi_event interrupt whenever [`STATUS.READY`](#status) + goes high + +### EVENT_ENABLE . TXWM +Assert to send a spi_event interrupt whenever the number of 32-bit words in + the TX FIFO is less than [`CONTROL.TX_WATERMARK.`](#control) To prevent the + reassertion of this interrupt add more data to the TX FIFO, or + reduce [`CONTROL.TX_WATERMARK.`](#control) + +### EVENT_ENABLE . RXWM +Assert to send a spi_event interrupt whenever the number of 32-bit words in + the RX FIFO is greater than [`CONTROL.RX_WATERMARK.`](#control) To prevent the + reassertion of this interrupt, read more data from the RX FIFO, or + increase [`CONTROL.RX_WATERMARK.`](#control) + +### EVENT_ENABLE . TXEMPTY +Assert to send a spi_event interrupt whenever [`STATUS.TXEMPTY`](#status) + goes high + +### EVENT_ENABLE . RXFULL +Assert to send a spi_event interrupt whenever [`STATUS.RXFULL`](#status) + goes high + diff --git a/docs/um/ip/tagger/data/tagger_regs.hjson b/docs/um/ip/tagger/data/tagger_regs.hjson new file mode 100644 index 00000000..4a86051e --- /dev/null +++ b/docs/um/ip/tagger/data/tagger_regs.hjson @@ -0,0 +1,80 @@ +// Copyright 2018-2021 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// +// Authors: +// Diyou Shen + + + +{ + name: "tagger_reg", + clock_primary: "clk_i", + reset_primary: "rst_ni", + bus_interfaces: [{ + protocol: "reg_iface", + direction: "device" + }], + regwidth: "32", + registers: [{ + multireg: { + name: "PAT_COMMIT", + desc: "Partition configuration commit register", + count: "1", + cname: "TAGGER", + swaccess: "rw", + hwaccess: "hrw", + fields: [{ + bits: "0", + name: "commit", + desc: "commit changes of partition configuration", + resval: "0" + }] + }}, + + { + multireg: { + name: "PAT_ADDR", + desc: "Partition address", + count: "16", + cname: "TAGGER", + swaccess: "rw", + hwaccess: "hrw", + fields: [{ + bits: "31:0", + name: "PAT_ADDR", + desc: "Single partition configurations: address", + resval: "0" + }] + }}, + { + multireg: { + name: "PATID", + desc: "Partition ID", + count: "3", + cname: "TAGGER", + swaccess: "rw", + hwaccess: "hrw", + fields: [{ + bits: "31:0", + name: "PATID", + desc: "Partition ID (PatID) for each partition, length determined by params", + resval: "0" + }] + }}, + { + multireg: { + name: "ADDR_CONF", + desc: "Address encoding mode switch register", + count: "1", + cname: "TAGGER", + swaccess: "rw", + hwaccess: "hrw", + fields: [{ + bits: "31:0", + name: "addr_conf", + desc: "2 bits configuration for each partition. 2'b00: OFF, 2'b01: TOR, 2'b10: NA4", + resval: "0" + }] + }} ] +} \ No newline at end of file diff --git a/docs/um/ip/tagger/data/tagger_regs_doc.hjson b/docs/um/ip/tagger/data/tagger_regs_doc.hjson new file mode 100644 index 00000000..2ca3b2a5 --- /dev/null +++ b/docs/um/ip/tagger/data/tagger_regs_doc.hjson @@ -0,0 +1,83 @@ +// Copyright 2018-2021 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51, see LICENSE for details. +// +// Authors: +// Diyou Shen + + + +{ + name: "tagger_reg", + cip_id: "36", + version: "0.0.0", //null, commit b288376 + clocking: [ + {clock: "clk_i", reset: "rst_ni", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device" } + ], + regwidth: "32", + registers: [{ + multireg: { + name: "PAT_COMMIT", + desc: "Partition configuration commit register", + count: "1", + cname: "TAGGER", + swaccess: "rw", + hwaccess: "hrw", + fields: [{ + bits: "0", + name: "commit", + desc: "commit changes of partition configuration", + resval: "0" + }] + }}, + + { + multireg: { + name: "PAT_ADDR", + desc: "Partition address", + count: "16", + cname: "TAGGER", + swaccess: "rw", + hwaccess: "hrw", + fields: [{ + bits: "31:0", + name: "PAT_ADDR", + desc: "Single partition configurations: address", + resval: "0" + }] + }}, + { + multireg: { + name: "PATID", + desc: "Partition ID", + count: "3", + cname: "TAGGER", + swaccess: "rw", + hwaccess: "hrw", + fields: [{ + bits: "31:0", + name: "PATID", + desc: "Partition ID (PatID) for each partition, length determined by params", + resval: "0" + }] + }}, + { + multireg: { + name: "ADDR_CONF", + desc: "Address encoding mode switch register", + count: "1", + cname: "TAGGER", + swaccess: "rw", + hwaccess: "hrw", + fields: [{ + bits: "31:0", + name: "addr_conf", + desc: "2 bits configuration for each partition. 2'b00: OFF, 2'b01: TOR, 2'b10: NA4", + resval: "0" + }] + }} ] +} \ No newline at end of file diff --git a/docs/um/ip/tagger/data/tagger_regs_doc.hjson~ b/docs/um/ip/tagger/data/tagger_regs_doc.hjson~ new file mode 100644 index 00000000..c2356966 --- /dev/null +++ b/docs/um/ip/tagger/data/tagger_regs_doc.hjson~ @@ -0,0 +1,83 @@ +// Copyright 2018-2021 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51, see LICENSE for details. +// +// Authors: +// Diyou Shen + + + +{ + name: "tagger_reg", + cip_id: "36", + version: "0.0.0", // Carfiled_chip-V4.1 2023-11-16 + clocking: [ + {clock: "clk_i", reset: "rst_ni", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device" } + ], + regwidth: "32", + registers: [{ + multireg: { + name: "PAT_COMMIT", + desc: "Partition configuration commit register", + count: "1", + cname: "TAGGER", + swaccess: "rw", + hwaccess: "hrw", + fields: [{ + bits: "0", + name: "commit", + desc: "commit changes of partition configuration", + resval: "0" + }] + }}, + + { + multireg: { + name: "PAT_ADDR", + desc: "Partition address", + count: "16", + cname: "TAGGER", + swaccess: "rw", + hwaccess: "hrw", + fields: [{ + bits: "31:0", + name: "PAT_ADDR", + desc: "Single partition configurations: address", + resval: "0" + }] + }}, + { + multireg: { + name: "PATID", + desc: "Partition ID", + count: "3", + cname: "TAGGER", + swaccess: "rw", + hwaccess: "hrw", + fields: [{ + bits: "31:0", + name: "PATID", + desc: "Partition ID (PatID) for each partition, length determined by params", + resval: "0" + }] + }}, + { + multireg: { + name: "ADDR_CONF", + desc: "Address encoding mode switch register", + count: "1", + cname: "TAGGER", + swaccess: "rw", + hwaccess: "hrw", + fields: [{ + bits: "31:0", + name: "addr_conf", + desc: "2 bits configuration for each partition. 2'b00: OFF, 2'b01: TOR, 2'b10: NA4", + resval: "0" + }] + }} ] +} \ No newline at end of file diff --git a/docs/um/ip/tagger/doc/registers.md b/docs/um/ip/tagger/doc/registers.md new file mode 100644 index 00000000..9277edab --- /dev/null +++ b/docs/um/ip/tagger/doc/registers.md @@ -0,0 +1,126 @@ +## Summary + +| Name | Offset | Length | Description | +|:---------------------------------------|:---------|---------:|:----------------------------------------| +| tagger_reg.[`PAT_COMMIT`](#PAT_COMMIT) | 0x0 | 4 | Partition configuration commit register | +| tagger_reg.[`PAT_ADDR_0`](#pat_addr) | 0x4 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_1`](#pat_addr) | 0x8 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_2`](#pat_addr) | 0xc | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_3`](#pat_addr) | 0x10 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_4`](#pat_addr) | 0x14 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_5`](#pat_addr) | 0x18 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_6`](#pat_addr) | 0x1c | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_7`](#pat_addr) | 0x20 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_8`](#pat_addr) | 0x24 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_9`](#pat_addr) | 0x28 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_10`](#pat_addr) | 0x2c | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_11`](#pat_addr) | 0x30 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_12`](#pat_addr) | 0x34 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_13`](#pat_addr) | 0x38 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_14`](#pat_addr) | 0x3c | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_15`](#pat_addr) | 0x40 | 4 | Partition address | +| tagger_reg.[`PATID_0`](#patid) | 0x44 | 4 | Partition ID | +| tagger_reg.[`PATID_1`](#patid) | 0x48 | 4 | Partition ID | +| tagger_reg.[`PATID_2`](#patid) | 0x4c | 4 | Partition ID | +| tagger_reg.[`ADDR_CONF`](#addr_conf) | 0x50 | 4 | Address encoding mode switch register | + +## PAT_COMMIT +Partition configuration commit register +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "commit_0", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 100}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | commit_0 | commit changes of partition configuration | + +## PAT_ADDR +Partition address +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:------------|:---------| +| PAT_ADDR_0 | 0x4 | +| PAT_ADDR_1 | 0x8 | +| PAT_ADDR_2 | 0xc | +| PAT_ADDR_3 | 0x10 | +| PAT_ADDR_4 | 0x14 | +| PAT_ADDR_5 | 0x18 | +| PAT_ADDR_6 | 0x1c | +| PAT_ADDR_7 | 0x20 | +| PAT_ADDR_8 | 0x24 | +| PAT_ADDR_9 | 0x28 | +| PAT_ADDR_10 | 0x2c | +| PAT_ADDR_11 | 0x30 | +| PAT_ADDR_12 | 0x34 | +| PAT_ADDR_13 | 0x38 | +| PAT_ADDR_14 | 0x3c | +| PAT_ADDR_15 | 0x40 | + + +### Fields + +```wavejson +{"reg": [{"name": "PAT_ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:-----------------------------------------| +| 31:0 | rw | 0x0 | PAT_ADDR | Single partition configurations: address | + +## PATID +Partition ID +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:--------|:---------| +| PATID_0 | 0x44 | +| PATID_1 | 0x48 | +| PATID_2 | 0x4c | + + +### Fields + +```wavejson +{"reg": [{"name": "PATID", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------| +| 31:0 | rw | 0x0 | PATID | Partition ID (PatID) for each partition, length determined by params | + +## ADDR_CONF +Address encoding mode switch register +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:----------|:---------| +| ADDR_CONF | 0x50 | + + +### Fields + +```wavejson +{"reg": [{"name": "addr_conf", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:----------------------------------------------------------------------------| +| 31:0 | rw | 0x0 | addr_conf | 2 bits configuration for each partition. 2'b00: OFF, 2'b01: TOR, 2'b10: NA4 | + diff --git a/docs/um/ip/uart/data/uart_ot.hjson b/docs/um/ip/uart/data/uart_ot.hjson new file mode 100644 index 00000000..3b88b5a9 --- /dev/null +++ b/docs/um/ip/uart/data/uart_ot.hjson @@ -0,0 +1,476 @@ +// Copyright lowRISC contributors (OpenTitan project). +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 +{ + name: "uart", + human_name: "UART", + one_line_desc: "Full duplex serial communication interface, supports bit rates of up to 1 Mbit/s", + one_paragraph_desc: ''' + Universal Asynchronous Receiver/Transmitter (UART) provides industry standard serial communication with external devices via two wires at a programmable baud rate. + Its full duplex design supports simultaneous transmission and reception, and flow control may be achieved using software handshaking if required. + To reduce software load, UART includes hardware FIFOs and supports interrupt generation when the FIFO level reaches software-programmable thresholds. + For compatibility with a variety of different targets and applications, the baud rate is software programmable and bit rates of up to 1 Mbit/s are supported. + The data format is restricted to 8 bits, reducing the complexity and cost, with optional parity for robustness against transmission errors. + ''' + // Unique comportable IP identifier defined under KNOWN_CIP_IDS in the regtool. + cip_id: "30", + design_spec: "../doc", + dv_doc: "../doc/dv", + hw_checklist: "../doc/checklist", + sw_checklist: "/sw/device/lib/dif/dif_uart", + revisions: [ + { + version: "1.0.0", + life_stage: "L2", + design_stage: "D3", + verification_stage: "V3", + commit_id: "4166794b902cc72b4cfdfacca0869ffc56e6b42a", + notes: "" + } + { + version: "1.1.0", + life_stage: "L1", + design_stage: "D3", + verification_stage: "V2S", + commit_id: "486ba480c12f8e71cfb0d41cdf8df1e51a1f26ab" + dif_stage: "S2", + notes: "" + } + { + version: "2.1.0", + life_stage: "L1", + design_stage: "D2S", + verification_stage: "V2S", + commit_id: "ffab8da7381c66b3d2e2b78a382a9f6937e5482e", + dif_stage: "S2", + notes: "" + } + ] + clocking: [{clock: "clk_i", reset: "rst_ni"}], + bus_interfaces: [ + { protocol: "tlul", direction: "device", racl_support: true } + ], + available_input_list: [ + { name: "rx", desc: "Serial receive bit" } + ], + available_output_list: [ + { name: "tx", desc: "Serial transmit bit" } + ], + interrupt_list: [ + { name: "tx_watermark", + type: "status", + default: "1", + desc: "raised if the transmit FIFO is past the high-water mark."} + { name: "rx_watermark", + type: "status", + desc: "raised if the receive FIFO is past the high-water mark."} + { name: "tx_done", + desc: "raised if the transmit FIFO has emptied and no transmit is ongoing."} + { name: "rx_overflow", + desc: "raised if the receive FIFO has overflowed."} + { name: "rx_frame_err", + desc: "raised if a framing error has been detected on receive."} + { name: "rx_break_err", + desc: "raised if break condition has been detected on receive."} + { name: "rx_timeout" + desc: ''' + raised if RX FIFO has characters remaining in the FIFO without being + retrieved for the programmed time period. + ''' + } + { name: "rx_parity_err" + desc: "raised if the receiver has detected a parity error."} + { name: "tx_empty", + type: "status", + default: "1", + desc: "raised if the transmit FIFO is empty."} + ], + alert_list: [ + { name: "fatal_fault", + desc: ''' + This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected. + ''' + } + ], + features: [ + { name: "UART.PARITY", + desc: ''' + The UART can be configured to so that it sends (or expects) a parity bit after each 8 data bits. + In receive mode, the UART sends the rx_parity_err interrupt if it receives a parity bit of the wrong polarity. + The parity mode is configurable (ensuring words are even or odd). + ''' + }, + { name: "UART.LINE_LOOPBACK", + desc: ''' + The UART can be configured so that incoming bits are sent on the TX side. + ''' + }, + { name: "UART.SYSTEM_LOOPBACK", + desc: ''' + The UART can be configured so that outgoing bits are registered as having been received on the RX side. + ''' + }, + { name: "UART.BAUD_RATE_CONTROL", + desc: ''' + The UART baud rate can be configured. + ''' + }, + { name: "UART.LINE_BREAK", + desc: ''' + The UART can detect line breaks (defined as the RX pin being continuously low for several bit-times). + The threshold for number of low bits to signal a line break is configurable. + ''' + }, + { name: "UART.FIFO_INTERRUPTS", + desc: ''' + The UART can be configured to send an "watermark" interrupt when RX or TX FIFO is nearly full/empty, respectively. + It sends an rx_overflow interrupt if it sees an extra character when the RX FIFO is full. + ''' + }, + ] + inter_signal_list: [ + { struct: "logic" + type: "uni" + name: "lsio_trigger" + desc: ''' + Self-clearing status trigger for the DMA. + Set when RX or TX FIFOs are past their configured watermarks matching watermark interrupt behaviour. + ''' + act: "req" + } + { struct: "racl_policy_vec", + type: "uni", + name: "racl_policies", + act: "rcv", + package: "top_racl_pkg", + desc: ''' + Incoming RACL policy vector from a racl_ctrl instance. + The policy selection vector (parameter) selects the policy for each register. + ''' + } + { struct: "racl_error_log", + type: "uni", + name: "racl_error", + act: "req", + width: "1" + package: "top_racl_pkg", + desc: ''' + RACL error log information of this module. + ''' + } + ] + countermeasures: [ + { name: "BUS.INTEGRITY", + desc: "End-to-end bus integrity scheme." + } + ] + param_list: [ + // Note that the watermark CSRs further below need to be adjusted when + // making changes to these FIFO depths. The RTL and DV are written in + // a parametric way and will adjust automatically. + { name: "RxFifoDepth", + desc: "Number of bytes in the RX FIFO.", + type: "int", + default: "64", + local: "true", + } + { name: "TxFifoDepth", + desc: "Number of bytes in the TX FIFO.", + type: "int", + default: "32", + local: "true", + } + ] + regwidth: "32", + registers: [ + { name: "CTRL", + desc: "UART control register", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "0", + name: "TX", + desc: "TX enable" + } + { bits: "1", + name: "RX", + desc: "RX enable" + tags: [// enable RX in other tests only. In top-level, RX pin is driven by 0 when it's + // not selected at pinmux, which causes RX related status updated to non-default + // value + "excl:CsrAllTests:CsrExclWrite"] + } + { bits: "2", + name: "NF", + desc: '''RX noise filter enable. + If the noise filter is enabled, RX line goes through the 3-tap + repetition code. It ignores single IP clock period noise. + ''' + } + { bits: "4", + name: "SLPBK", + desc: '''System loopback enable. + + If this bit is turned on, any outgoing bits to TX are received through RX. + See Block Diagram. Note that the TX line goes 1 if System loopback is enabled. + ''' + } + { bits: "5", + name: "LLPBK", + desc: '''Line loopback enable. + + If this bit is turned on, incoming bits are forwarded to TX for testing purpose. + See Block Diagram. Note that the internal design sees RX value as 1 always if line + loopback is enabled. + ''' + } + { bits: "6", + name: "PARITY_EN", + desc: "If true, parity is enabled in both RX and TX directions." + } + { bits: "7", + name: "PARITY_ODD", + desc: "If PARITY_EN is true, this determines the type, 1 for odd parity, 0 for even." + } + { bits: "9:8", + name: "RXBLVL", + desc: ''' + Trigger level for RX break detection. Sets the number of character + times the line must be low to detect a break. + ''', + enum: [ + { value: "0", + name: "break2", + desc: "2 characters" + }, + { value: "1", + name: "break4", + desc: "4 characters" + }, + { value: "2", + name: "break8", + desc: "8 characters" + }, + { value: "3", + name: "break16", + desc: "16 characters" + } + ] + } + { bits: "31:16", + name: "NCO", + desc: "BAUD clock rate control." + } + ] + }, + { name: "STATUS" + desc: "UART live status register" + swaccess: "ro" + hwaccess: "hrw" + hwext: "true" + hwre: "true" + fields: [ + { bits: "0" + name: "TXFULL" + desc: "TX buffer is full" + } + { bits: "1" + name: "RXFULL" + desc: "RX buffer is full" + } + { bits: "2" + name: "TXEMPTY" + desc: "TX FIFO is empty" + resval: "1" + } + { bits: "3" + name: "TXIDLE" + desc: "TX FIFO is empty and all bits have been transmitted" + resval: "1" + } + { bits: "4" + name: "RXIDLE" + desc: "RX is idle" + resval: "1", + } + { bits: "5" + name: "RXEMPTY" + desc: "RX FIFO is empty" + resval: "1" + } + ] + } + { name: "RDATA", + desc: "UART read data", + swaccess: "ro", + hwaccess: "hrw", + hwext: "true", + hwre: "true", + fields: [ + { bits: "7:0" } + ] + tags: [// read wdata when fifo is empty, dut may return unknown data + "excl:CsrAllTests:CsrExclCheck"] + } + { name: "WDATA", + desc: "UART write data", + swaccess: "wo", + hwaccess: "hro", + hwqe: "true", + fields: [ + { bits: "7:0" } + ] + tags: [// don't write to wdata - it affects several other csrs + "excl:CsrNonInitTests:CsrExclWrite"] + } + { name: "FIFO_CTRL", + desc: "UART FIFO control register", + swaccess: "rw", + hwaccess: "hrw", + hwqe: "true", + fields: [ + { bits: "0", + swaccess: "wo", + hwaccess: "hro", + name: "RXRST", + desc: "RX fifo reset. Write 1 to the register resets RX_FIFO. Read returns 0" + } + { bits: "1", + swaccess: "wo", + hwaccess: "hro", + name: "TXRST", + desc: "TX fifo reset. Write 1 to the register resets TX_FIFO. Read returns 0" + } + { bits: "4:2", + name: "RXILVL", + desc: '''Trigger level for RX interrupts. If the FIFO depth is greater than or equal to + the setting, it raises rx_watermark interrupt. + ''', + enum: [ + { value: "0", + name: "rxlvl1", + desc: "1 character" + }, + { value: "1", + name: "rxlvl2", + desc: "2 characters" + }, + { value: "2", + name: "rxlvl4", + desc: "4 characters" + }, + { value: "3", + name: "rxlvl8", + desc: "8 characters" + }, + { value: "4", + name: "rxlvl16", + desc: "16 characters" + }, + { value: "5", + name: "rxlvl32", + desc: "32 characters" + }, + { value: "6", + name: "rxlvl62", + desc: "62 characters" + }, + ] + } + { bits: "7:5", + name: "TXILVL", + desc: '''Trigger level for TX interrupts. If the FIFO depth is less than the setting, it + raises tx_watermark interrupt. + ''', + enum: [ + { value: "0", + name: "txlvl1", + desc: "1 character" + }, + { value: "1", + name: "txlvl2", + desc: "2 characters" + }, + { value: "2", + name: "txlvl4", + desc: "4 characters" + }, + { value: "3", + name: "txlvl8", + desc: "8 characters" + }, + { value: "4", + name: "txlvl16", + desc: "16 characters" + }, + ] + } + ] + } + { name: "FIFO_STATUS", + desc: "UART FIFO status register", + swaccess: "ro", + hwaccess: "hwo", + hwext: "true", + fields: [ + { bits: "7:0", + name: "TXLVL", + desc: "Current fill level of TX fifo" + } + { bits: "23:16", + name: "RXLVL", + desc: "Current fill level of RX fifo" + } + ] + } + { name: "OVRD", + desc: "TX pin override control. Gives direct SW control over TX pin state", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "0", + name: "TXEN", + desc: "Enable TX pin override control", + tags: [// writes to ovrd.txen causes tx output to be forced to ovrd.txval + // causing protocol violation + "excl:CsrAllTests:CsrExclWrite"] + } + { bits: "1", + name: "TXVAL", + desc: "Write to set the value of the TX pin" + } + ] + } + { name: "VAL", + desc: "UART oversampled values", + swaccess: "ro", + hwaccess: "hwo", + hwext: "true", + fields: [ + { bits: "15:0", + name: "RX", + desc: ''' + Last 16 oversampled values of RX. Most recent bit is bit 0, oldest 15. + ''' + tags: [// UART oversampled values are updated by design according to setting and pin RX + "excl:CsrNonInitTests:CsrExclCheck"] + } + ] + } + { name: "TIMEOUT_CTRL", + desc: "UART RX timeout control", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "23:0", + name: "VAL", + desc: "RX timeout value in UART bit times" + } + { bits: "31", + name: "EN", + desc: "Enable RX timeout feature" + } + ] + } + ] +} \ No newline at end of file diff --git a/docs/um/ip/uart/doc/registers.md b/docs/um/ip/uart/doc/registers.md new file mode 100644 index 00000000..2c3d8307 --- /dev/null +++ b/docs/um/ip/uart/doc/registers.md @@ -0,0 +1,365 @@ +## Summary + +| Name | Offset | Length | Description | +|:-------------------------------------|:---------|---------:|:-------------------------------------------------------------------| +| uart.[`INTR_STATE`](#intr_state) | 0x0 | 4 | Interrupt State Register | +| uart.[`INTR_ENABLE`](#intr_enable) | 0x4 | 4 | Interrupt Enable Register | +| uart.[`INTR_TEST`](#intr_test) | 0x8 | 4 | Interrupt Test Register | +| uart.[`ALERT_TEST`](#alert_test) | 0xc | 4 | Alert Test Register | +| uart.[`CTRL`](#ctrl) | 0x10 | 4 | UART control register | +| uart.[`STATUS`](#status) | 0x14 | 4 | UART live status register | +| uart.[`RDATA`](#rdata) | 0x18 | 4 | UART read data | +| uart.[`WDATA`](#wdata) | 0x1c | 4 | UART write data | +| uart.[`FIFO_CTRL`](#fifo_ctrl) | 0x20 | 4 | UART FIFO control register | +| uart.[`FIFO_STATUS`](#fifo_status) | 0x24 | 4 | UART FIFO status register | +| uart.[`OVRD`](#ovrd) | 0x28 | 4 | TX pin override control. Gives direct SW control over TX pin state | +| uart.[`VAL`](#val) | 0x2c | 4 | UART oversampled values | +| uart.[`TIMEOUT_CTRL`](#timeout_ctrl) | 0x30 | 4 | UART RX timeout control | + +## INTR_STATE +Interrupt State Register +- Offset: `0x0` +- Reset default: `0x101` +- Reset mask: `0x1ff` + +### Fields + +```wavejson +{"reg": [{"name": "tx_watermark", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "rx_watermark", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "tx_done", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "rx_overflow", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "rx_frame_err", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "rx_break_err", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "rx_timeout", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "rx_parity_err", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "tx_empty", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 23}], "config": {"lanes": 1, "fontsize": 10, "vspace": 150}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:---------------------------------------------------------------------------------------------------------------| +| 31:9 | | | | Reserved | +| 8 | ro | 0x1 | tx_empty | raised if the transmit FIFO is empty. | +| 7 | rw1c | 0x0 | rx_parity_err | raised if the receiver has detected a parity error. | +| 6 | rw1c | 0x0 | rx_timeout | raised if RX FIFO has characters remaining in the FIFO without being retrieved for the programmed time period. | +| 5 | rw1c | 0x0 | rx_break_err | raised if break condition has been detected on receive. | +| 4 | rw1c | 0x0 | rx_frame_err | raised if a framing error has been detected on receive. | +| 3 | rw1c | 0x0 | rx_overflow | raised if the receive FIFO has overflowed. | +| 2 | rw1c | 0x0 | tx_done | raised if the transmit FIFO has emptied and no transmit is ongoing. | +| 1 | ro | 0x0 | rx_watermark | raised if the receive FIFO is past the high-water mark. | +| 0 | ro | 0x1 | tx_watermark | raised if the transmit FIFO is past the high-water mark. | + +## INTR_ENABLE +Interrupt Enable Register +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0x1ff` + +### Fields + +```wavejson +{"reg": [{"name": "tx_watermark", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "rx_watermark", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "tx_done", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "rx_overflow", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "rx_frame_err", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "rx_break_err", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "rx_timeout", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "rx_parity_err", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "tx_empty", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 23}], "config": {"lanes": 1, "fontsize": 10, "vspace": 150}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:------------------------------------------------------------------------| +| 31:9 | | | | Reserved | +| 8 | rw | 0x0 | tx_empty | Enable interrupt when [`INTR_STATE.tx_empty`](#intr_state) is set. | +| 7 | rw | 0x0 | rx_parity_err | Enable interrupt when [`INTR_STATE.rx_parity_err`](#intr_state) is set. | +| 6 | rw | 0x0 | rx_timeout | Enable interrupt when [`INTR_STATE.rx_timeout`](#intr_state) is set. | +| 5 | rw | 0x0 | rx_break_err | Enable interrupt when [`INTR_STATE.rx_break_err`](#intr_state) is set. | +| 4 | rw | 0x0 | rx_frame_err | Enable interrupt when [`INTR_STATE.rx_frame_err`](#intr_state) is set. | +| 3 | rw | 0x0 | rx_overflow | Enable interrupt when [`INTR_STATE.rx_overflow`](#intr_state) is set. | +| 2 | rw | 0x0 | tx_done | Enable interrupt when [`INTR_STATE.tx_done`](#intr_state) is set. | +| 1 | rw | 0x0 | rx_watermark | Enable interrupt when [`INTR_STATE.rx_watermark`](#intr_state) is set. | +| 0 | rw | 0x0 | tx_watermark | Enable interrupt when [`INTR_STATE.tx_watermark`](#intr_state) is set. | + +## INTR_TEST +Interrupt Test Register +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0x1ff` + +### Fields + +```wavejson +{"reg": [{"name": "tx_watermark", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "rx_watermark", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "tx_done", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "rx_overflow", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "rx_frame_err", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "rx_break_err", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "rx_timeout", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "rx_parity_err", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "tx_empty", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 23}], "config": {"lanes": 1, "fontsize": 10, "vspace": 150}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:-----------------------------------------------------------------| +| 31:9 | | | | Reserved | +| 8 | wo | 0x0 | tx_empty | Write 1 to force [`INTR_STATE.tx_empty`](#intr_state) to 1. | +| 7 | wo | 0x0 | rx_parity_err | Write 1 to force [`INTR_STATE.rx_parity_err`](#intr_state) to 1. | +| 6 | wo | 0x0 | rx_timeout | Write 1 to force [`INTR_STATE.rx_timeout`](#intr_state) to 1. | +| 5 | wo | 0x0 | rx_break_err | Write 1 to force [`INTR_STATE.rx_break_err`](#intr_state) to 1. | +| 4 | wo | 0x0 | rx_frame_err | Write 1 to force [`INTR_STATE.rx_frame_err`](#intr_state) to 1. | +| 3 | wo | 0x0 | rx_overflow | Write 1 to force [`INTR_STATE.rx_overflow`](#intr_state) to 1. | +| 2 | wo | 0x0 | tx_done | Write 1 to force [`INTR_STATE.tx_done`](#intr_state) to 1. | +| 1 | wo | 0x0 | rx_watermark | Write 1 to force [`INTR_STATE.rx_watermark`](#intr_state) to 1. | +| 0 | wo | 0x0 | tx_watermark | Write 1 to force [`INTR_STATE.tx_watermark`](#intr_state) to 1. | + +## ALERT_TEST +Alert Test Register +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "fatal_fault", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:-------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | fatal_fault | Write 1 to trigger one alert event of this kind. | + +## CTRL +UART control register +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffff03f7` + +### Fields + +```wavejson +{"reg": [{"name": "TX", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RX", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "NF", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 1}, {"name": "SLPBK", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "LLPBK", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "PARITY_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "PARITY_ODD", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RXBLVL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 6}, {"name": "NCO", "bits": 16, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:--------------------------------| +| 31:16 | rw | 0x0 | [NCO](#ctrl--nco) | +| 15:10 | | | Reserved | +| 9:8 | rw | 0x0 | [RXBLVL](#ctrl--rxblvl) | +| 7 | rw | 0x0 | [PARITY_ODD](#ctrl--parity_odd) | +| 6 | rw | 0x0 | [PARITY_EN](#ctrl--parity_en) | +| 5 | rw | 0x0 | [LLPBK](#ctrl--llpbk) | +| 4 | rw | 0x0 | [SLPBK](#ctrl--slpbk) | +| 3 | | | Reserved | +| 2 | rw | 0x0 | [NF](#ctrl--nf) | +| 1 | rw | 0x0 | [RX](#ctrl--rx) | +| 0 | rw | 0x0 | [TX](#ctrl--tx) | + +### CTRL . NCO +BAUD clock rate control. + +### CTRL . RXBLVL +Trigger level for RX break detection. Sets the number of character +times the line must be low to detect a break. + +| Value | Name | Description | +|:--------|:--------|:--------------| +| 0x0 | break2 | 2 characters | +| 0x1 | break4 | 4 characters | +| 0x2 | break8 | 8 characters | +| 0x3 | break16 | 16 characters | + + +### CTRL . PARITY_ODD +If PARITY_EN is true, this determines the type, 1 for odd parity, 0 for even. + +### CTRL . PARITY_EN +If true, parity is enabled in both RX and TX directions. + +### CTRL . LLPBK +Line loopback enable. + +If this bit is turned on, incoming bits are forwarded to TX for testing purpose. +See Block Diagram. Note that the internal design sees RX value as 1 always if line +loopback is enabled. + +### CTRL . SLPBK +System loopback enable. + +If this bit is turned on, any outgoing bits to TX are received through RX. +See Block Diagram. Note that the TX line goes 1 if System loopback is enabled. + +### CTRL . NF +RX noise filter enable. +If the noise filter is enabled, RX line goes through the 3-tap +repetition code. It ignores single IP clock period noise. + +### CTRL . RX +RX enable + +### CTRL . TX +TX enable + +## STATUS +UART live status register +- Offset: `0x14` +- Reset default: `0x3c` +- Reset mask: `0x3f` + +### Fields + +```wavejson +{"reg": [{"name": "TXFULL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RXFULL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "TXEMPTY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "TXIDLE", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RXIDLE", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RXEMPTY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 26}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:----------------------------------------------------| +| 31:6 | | | | Reserved | +| 5 | ro | 0x1 | RXEMPTY | RX FIFO is empty | +| 4 | ro | 0x1 | RXIDLE | RX is idle | +| 3 | ro | 0x1 | TXIDLE | TX FIFO is empty and all bits have been transmitted | +| 2 | ro | 0x1 | TXEMPTY | TX FIFO is empty | +| 1 | ro | x | RXFULL | RX buffer is full | +| 0 | ro | x | TXFULL | TX buffer is full | + +## RDATA +UART read data +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "RDATA", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | x | RDATA | | + +## WDATA +UART write data +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "WDATA", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | WDATA | | + +## FIFO_CTRL +UART FIFO control register +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "RXRST", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "TXRST", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RXILVL", "bits": 3, "attr": ["rw"], "rotate": -90}, {"name": "TXILVL", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------| +| 31:8 | | | Reserved | +| 7:5 | rw | 0x0 | [TXILVL](#fifo_ctrl--txilvl) | +| 4:2 | rw | 0x0 | [RXILVL](#fifo_ctrl--rxilvl) | +| 1 | wo | 0x0 | [TXRST](#fifo_ctrl--txrst) | +| 0 | wo | 0x0 | [RXRST](#fifo_ctrl--rxrst) | + +### FIFO_CTRL . TXILVL +Trigger level for TX interrupts. If the FIFO depth is less than the setting, it +raises tx_watermark interrupt. + +| Value | Name | Description | +|:--------|:--------|:--------------| +| 0x0 | txlvl1 | 1 character | +| 0x1 | txlvl2 | 2 characters | +| 0x2 | txlvl4 | 4 characters | +| 0x3 | txlvl8 | 8 characters | +| 0x4 | txlvl16 | 16 characters | + +Other values are reserved. + +### FIFO_CTRL . RXILVL +Trigger level for RX interrupts. If the FIFO depth is greater than or equal to +the setting, it raises rx_watermark interrupt. + +| Value | Name | Description | +|:--------|:--------|:--------------| +| 0x0 | rxlvl1 | 1 character | +| 0x1 | rxlvl2 | 2 characters | +| 0x2 | rxlvl4 | 4 characters | +| 0x3 | rxlvl8 | 8 characters | +| 0x4 | rxlvl16 | 16 characters | +| 0x5 | rxlvl32 | 32 characters | +| 0x6 | rxlvl62 | 62 characters | + +Other values are reserved. + +### FIFO_CTRL . TXRST +TX fifo reset. Write 1 to the register resets TX_FIFO. Read returns 0 + +### FIFO_CTRL . RXRST +RX fifo reset. Write 1 to the register resets RX_FIFO. Read returns 0 + +## FIFO_STATUS +UART FIFO status register +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0xff00ff` + +### Fields + +```wavejson +{"reg": [{"name": "TXLVL", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 8}, {"name": "RXLVL", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------| +| 31:24 | | | | Reserved | +| 23:16 | ro | x | RXLVL | Current fill level of RX fifo | +| 15:8 | | | | Reserved | +| 7:0 | ro | x | TXLVL | Current fill level of TX fifo | + +## OVRD +TX pin override control. Gives direct SW control over TX pin state +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "TXEN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "TXVAL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------| +| 31:2 | | | | Reserved | +| 1 | rw | 0x0 | TXVAL | Write to set the value of the TX pin | +| 0 | rw | 0x0 | TXEN | Enable TX pin override control | + +## VAL +UART oversampled values +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "RX", "bits": 16, "attr": ["ro"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------| +| 31:16 | | | | Reserved | +| 15:0 | ro | x | RX | Last 16 oversampled values of RX. Most recent bit is bit 0, oldest 15. | + +## TIMEOUT_CTRL +UART RX timeout control +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0x80ffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VAL", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 7}, {"name": "EN", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------| +| 31 | rw | 0x0 | EN | Enable RX timeout feature | +| 30:24 | | | | Reserved | +| 23:0 | rw | 0x0 | VAL | RX timeout value in UART bit times | + diff --git a/docs/um/ip/unbent/data/err_unit_regs.hjson b/docs/um/ip/unbent/data/err_unit_regs.hjson new file mode 100644 index 00000000..22c7ec86 --- /dev/null +++ b/docs/um/ip/unbent/data/err_unit_regs.hjson @@ -0,0 +1,70 @@ +// Copyright 2023 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 + +// Author: Michael Rogenmoser + +{ + name: "bus_err_unit", + clock_primary: "clk_i", + reset_primary: "rst_ni", + bus_interfaces: [ + { protocol: "reg_iface", + direction: "device" + } + ], + + regwidth: "32", + + registers: [ + { name: "err_addr", + desc: "Address of the bus error", + swaccess: "ro", + hwaccess: "hwo", + hwext: "true", + fields: [ + { bits: "31:0", + name: "err_addr", + desc: "Address of the bus error" + } + ] + }, + { name: "err_addr_top", + desc: "Top of the address of the bus error", + swaccess: "ro", + hwaccess: "hwo", + hwext: "true", + fields: [ + { bits: "31:0", + name: "err_addr", + desc: "Address of the bus error" + } + ] + }, + { name: "err_code", + desc: "Error code of the bus error", + swaccess: "ro", + hwaccess: "hrw", + hwext: "true", + hwre: "true", + fields: [ + { bits: "31:0", + name: "err_code", + desc: "Error code of the bus error" + } + ] + }, + { name: "meta", + desc: "Meta information of the bus error", + swaccess: "ro", + hwaccess: "hwo", + hwext: "true", + fields: [ + { bits: "31:0", + name: "meta", + desc: "Meta information of the bus error" + } + ] + } + ] +} \ No newline at end of file diff --git a/docs/um/ip/unbent/data/err_unit_regs_doc.hjson b/docs/um/ip/unbent/data/err_unit_regs_doc.hjson new file mode 100644 index 00000000..2997e602 --- /dev/null +++ b/docs/um/ip/unbent/data/err_unit_regs_doc.hjson @@ -0,0 +1,70 @@ +// Copyright 2023 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51, see LICENSE for details. +// +// Author: Michael Rogenmoser + +{ + name: "bus_err_unit", + cip_id: "36", + version: "0.1.6", + clocking: [ + {clock: "clk_i", reset: "rst_ni", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device" } + ], + regwidth: "32", + registers: [ + { name: "err_addr", + desc: "Address of the bus error", + swaccess: "ro", + hwaccess: "hwo", + hwext: "true", + fields: [ + { bits: "31:0", + name: "err_addr", + desc: "Address of the bus error" + } + ] + }, + { name: "err_addr_top", + desc: "Top of the address of the bus error", + swaccess: "ro", + hwaccess: "hwo", + hwext: "true", + fields: [ + { bits: "31:0", + name: "err_addr", + desc: "Address of the bus error" + } + ] + }, + { name: "err_code", + desc: "Error code of the bus error", + swaccess: "ro", + hwaccess: "hrw", + hwext: "true", + hwre: "true", + fields: [ + { bits: "31:0", + name: "err_code", + desc: "Error code of the bus error" + } + ] + }, + { name: "meta", + desc: "Meta information of the bus error", + swaccess: "ro", + hwaccess: "hwo", + hwext: "true", + fields: [ + { bits: "31:0", + name: "meta", + desc: "Meta information of the bus error" + } + ] + } + ] +} \ No newline at end of file diff --git a/docs/um/ip/unbent/doc/registers.md b/docs/um/ip/unbent/doc/registers.md new file mode 100644 index 00000000..46160c72 --- /dev/null +++ b/docs/um/ip/unbent/doc/registers.md @@ -0,0 +1,73 @@ +## Summary + +| Name | Offset | Length | Description | +|:---------------------------------------------|:---------|---------:|:------------------------------------| +| bus_err_unit.[`err_addr`](#err_addr) | 0x0 | 4 | Address of the bus error | +| bus_err_unit.[`err_addr_top`](#err_addr_top) | 0x4 | 4 | Top of the address of the bus error | +| bus_err_unit.[`err_code`](#err_code) | 0x8 | 4 | Error code of the bus error | +| bus_err_unit.[`meta`](#meta) | 0xc | 4 | Meta information of the bus error | + +## err_addr +Address of the bus error +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "err_addr", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:-------------------------| +| 31:0 | ro | x | err_addr | Address of the bus error | + +## err_addr_top +Top of the address of the bus error +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "err_addr", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:-------------------------| +| 31:0 | ro | x | err_addr | Address of the bus error | + +## err_code +Error code of the bus error +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "err_code", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:----------------------------| +| 31:0 | ro | x | err_code | Error code of the bus error | + +## meta +Meta information of the bus error +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "meta", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------| +| 31:0 | ro | x | meta | Meta information of the bus error | + diff --git a/docs/um/ip/vga/data/axi_vga_regs.hjson b/docs/um/ip/vga/data/axi_vga_regs.hjson new file mode 100644 index 00000000..6c9debd0 --- /dev/null +++ b/docs/um/ip/vga/data/axi_vga_regs.hjson @@ -0,0 +1,246 @@ +// Copyright 2022 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// +// Nicole Narr +// Christopher Reinwardt +{ + name: "axi_vga" + clock_primary: "clk_i" + bus_interfaces: [ + { protocol: "reg_iface", direction: "device" } + ], + regwidth: 32 + registers: [ + { name: "CONTROL", + desc: "Control register", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "0" + resval: "0" + name: "enable" + desc: ''' + Enables FSM. + ''' + } + { + bits: "1" + resval: "1" + name: "hsync_pol" + desc: ''' + Sets polarity for HSYNC + 0 - Active Low + 1 - Active High + ''' + } + { + bits: "2" + resval: "1" + name: "vsync_pol" + desc: ''' + Sets polarity for VSYNC + 0 - Active Low + 1 - Active High + ''' + } + ] + } + { name: "CLK_DIV" + desc: "Clock divider" + swaccess: "rw" + hwaccess: "hro" + fields: [ + { + bits: "7:0" + resval: "1" + name: "clk_div" + desc: ''' + Clock divider. + ''' + } + ] + } + { name: "HORI_VISIBLE_SIZE", + desc: "Size of horizontal visible area", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "31:0" + resval: "1" + name: "hori_visible_size" + desc: ''' + Size of horizontal visible area. + ''' + } + ] + } + { name: "HORI_FRONT_PORCH_SIZE", + desc: "Size of horizontal front porch", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "31:0" + resval: "1" + name: "hori_front_porch_size" + desc: ''' + Size of horizontal front porch. + ''' + } + ] + } + { name: "HORI_SYNC_SIZE", + desc: "Size of horizontal sync area", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "31:0" + resval: "1" + name: "hori_sync_size" + desc: ''' + Size of horizontal sync area. + ''' + } + ] + } + { name: "HORI_BACK_PORCH_SIZE", + desc: "Size of horizontal back porch", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "31:0" + resval: "1" + name: "hori_back_porch_size" + desc: ''' + Size of horizontal back porch. + ''' + } + ] + } + { name: "VERT_VISIBLE_SIZE", + desc: "Size of vertical visible area", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "31:0" + resval: "1" + name: "vert_visible_size" + desc: ''' + Size of vertical visible area. + ''' + } + ] + } + { name: "VERT_FRONT_PORCH_SIZE", + desc: "Size of vertical front porch", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "31:0" + resval: "1" + name: "vert_front_porch_size" + desc: ''' + Size of vertical front porch. + ''' + } + ] + } + { name: "VERT_SYNC_SIZE", + desc: "Size of vertical sync area", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "31:0" + resval: "1" + name: "vert_sync_size" + desc: ''' + Size of vertical sync area. + ''' + } + ] + } + { name: "VERT_BACK_PORCH_SIZE", + desc: "Size of vertical back porch", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "31:0" + resval: "1" + name: "vert_back_porch_size" + desc: ''' + Size of vertical back porch. + ''' + } + ] + } + { name: "START_ADDR_LOW", + desc: "Low end of start address of frame buffer", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "31:0" + resval: "0x00000000" + name: "start_addr_low" + desc: ''' + Low end of start address of frame buffer. + ''' + } + ] + } + { name: "START_ADDR_HIGH", + desc: "High end of start address of frame buffer", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "31:0" + resval: "0" + name: "start_addr_high" + desc: ''' + High end of start address of frame buffer. + ''' + } + ] + } + { name: "FRAME_SIZE", + desc: "Size of whole frame", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "31:0" + resval: "0" + name: "frame_size" + desc: ''' + Size of whole frame. + ''' + } + ] + } + { name: "BURST_LEN", + desc: "Number of beats in a burst", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "7:0" + resval: "0" + name: "burst_len" + desc: ''' + Number of beats in a burst. + ''' + } + ] + } + ] +} \ No newline at end of file diff --git a/docs/um/ip/vga/data/axi_vga_regs_doc.hjson b/docs/um/ip/vga/data/axi_vga_regs_doc.hjson new file mode 100644 index 00000000..2b2428ec --- /dev/null +++ b/docs/um/ip/vga/data/axi_vga_regs_doc.hjson @@ -0,0 +1,251 @@ +// Copyright 2022 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51, see LICENSE for details. +// +// Nicole Narr +// Christopher Reinwardt +{ + name: "axi_vga" + cip_id: "36", + version: "0.1.1", + clocking: [ + {clock: "clk_i", reset: "rst_ni", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device" } + ], + regwidth: 32 + registers: [ + { name: "CONTROL", + desc: "Control register", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "0" + resval: "0" + name: "enable" + desc: ''' + Enables FSM. + ''' + } + { + bits: "1" + resval: "1" + name: "hsync_pol" + desc: ''' + Sets polarity for HSYNC + 0 - Active Low + 1 - Active High + ''' + } + { + bits: "2" + resval: "1" + name: "vsync_pol" + desc: ''' + Sets polarity for VSYNC + 0 - Active Low + 1 - Active High + ''' + } + ] + } + { name: "CLK_DIV" + desc: "Clock divider" + swaccess: "rw" + hwaccess: "hro" + fields: [ + { + bits: "7:0" + resval: "1" + name: "clk_div" + desc: ''' + Clock divider. + ''' + } + ] + } + { name: "HORI_VISIBLE_SIZE", + desc: "Size of horizontal visible area", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "31:0" + resval: "1" + name: "hori_visible_size" + desc: ''' + Size of horizontal visible area. + ''' + } + ] + } + { name: "HORI_FRONT_PORCH_SIZE", + desc: "Size of horizontal front porch", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "31:0" + resval: "1" + name: "hori_front_porch_size" + desc: ''' + Size of horizontal front porch. + ''' + } + ] + } + { name: "HORI_SYNC_SIZE", + desc: "Size of horizontal sync area", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "31:0" + resval: "1" + name: "hori_sync_size" + desc: ''' + Size of horizontal sync area. + ''' + } + ] + } + { name: "HORI_BACK_PORCH_SIZE", + desc: "Size of horizontal back porch", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "31:0" + resval: "1" + name: "hori_back_porch_size" + desc: ''' + Size of horizontal back porch. + ''' + } + ] + } + { name: "VERT_VISIBLE_SIZE", + desc: "Size of vertical visible area", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "31:0" + resval: "1" + name: "vert_visible_size" + desc: ''' + Size of vertical visible area. + ''' + } + ] + } + { name: "VERT_FRONT_PORCH_SIZE", + desc: "Size of vertical front porch", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "31:0" + resval: "1" + name: "vert_front_porch_size" + desc: ''' + Size of vertical front porch. + ''' + } + ] + } + { name: "VERT_SYNC_SIZE", + desc: "Size of vertical sync area", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "31:0" + resval: "1" + name: "vert_sync_size" + desc: ''' + Size of vertical sync area. + ''' + } + ] + } + { name: "VERT_BACK_PORCH_SIZE", + desc: "Size of vertical back porch", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "31:0" + resval: "1" + name: "vert_back_porch_size" + desc: ''' + Size of vertical back porch. + ''' + } + ] + } + { name: "START_ADDR_LOW", + desc: "Low end of start address of frame buffer", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "31:0" + resval: "0x00000000" + name: "start_addr_low" + desc: ''' + Low end of start address of frame buffer. + ''' + } + ] + } + { name: "START_ADDR_HIGH", + desc: "High end of start address of frame buffer", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "31:0" + resval: "0" + name: "start_addr_high" + desc: ''' + High end of start address of frame buffer. + ''' + } + ] + } + { name: "FRAME_SIZE", + desc: "Size of whole frame", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "31:0" + resval: "0" + name: "frame_size" + desc: ''' + Size of whole frame. + ''' + } + ] + } + { name: "BURST_LEN", + desc: "Number of beats in a burst", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { + bits: "7:0" + resval: "0" + name: "burst_len" + desc: ''' + Number of beats in a burst. + ''' + } + ] + } + ] +} \ No newline at end of file diff --git a/docs/um/ip/vga/doc/registers.md b/docs/um/ip/vga/doc/registers.md new file mode 100644 index 00000000..5e67279c --- /dev/null +++ b/docs/um/ip/vga/doc/registers.md @@ -0,0 +1,248 @@ +## Summary + +| Name | Offset | Length | Description | +|:----------------------------------------------------------|:---------|---------:|:------------------------------------------| +| axi_vga.[`CONTROL`](#control) | 0x0 | 4 | Control register | +| axi_vga.[`CLK_DIV`](#clk_div) | 0x4 | 4 | Clock divider | +| axi_vga.[`HORI_VISIBLE_SIZE`](#hori_visible_size) | 0x8 | 4 | Size of horizontal visible area | +| axi_vga.[`HORI_FRONT_PORCH_SIZE`](#hori_front_porch_size) | 0xc | 4 | Size of horizontal front porch | +| axi_vga.[`HORI_SYNC_SIZE`](#hori_sync_size) | 0x10 | 4 | Size of horizontal sync area | +| axi_vga.[`HORI_BACK_PORCH_SIZE`](#hori_back_porch_size) | 0x14 | 4 | Size of horizontal back porch | +| axi_vga.[`VERT_VISIBLE_SIZE`](#vert_visible_size) | 0x18 | 4 | Size of vertical visible area | +| axi_vga.[`VERT_FRONT_PORCH_SIZE`](#vert_front_porch_size) | 0x1c | 4 | Size of vertical front porch | +| axi_vga.[`VERT_SYNC_SIZE`](#vert_sync_size) | 0x20 | 4 | Size of vertical sync area | +| axi_vga.[`VERT_BACK_PORCH_SIZE`](#vert_back_porch_size) | 0x24 | 4 | Size of vertical back porch | +| axi_vga.[`START_ADDR_LOW`](#start_addr_low) | 0x28 | 4 | Low end of start address of frame buffer | +| axi_vga.[`START_ADDR_HIGH`](#start_addr_high) | 0x2c | 4 | High end of start address of frame buffer | +| axi_vga.[`FRAME_SIZE`](#frame_size) | 0x30 | 4 | Size of whole frame | +| axi_vga.[`BURST_LEN`](#burst_len) | 0x34 | 4 | Number of beats in a burst | + +## CONTROL +Control register +- Offset: `0x0` +- Reset default: `0x6` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "enable", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "hsync_pol", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "vsync_pol", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-------------------------------------------------------| +| 31:3 | | | | Reserved | +| 2 | rw | 0x1 | vsync_pol | Sets polarity for VSYNC 0 - Active Low 1 - Active High | +| 1 | rw | 0x1 | hsync_pol | Sets polarity for HSYNC 0 - Active Low 1 - Active High | +| 0 | rw | 0x0 | enable | Enables FSM. | + +## CLK_DIV +Clock divider +- Offset: `0x4` +- Reset default: `0x1` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "clk_div", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:---------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x1 | clk_div | Clock divider. | + +## HORI_VISIBLE_SIZE +Size of horizontal visible area +- Offset: `0x8` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "hori_visible_size", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:---------------------------------| +| 31:0 | rw | 0x1 | hori_visible_size | Size of horizontal visible area. | + +## HORI_FRONT_PORCH_SIZE +Size of horizontal front porch +- Offset: `0xc` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "hori_front_porch_size", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:--------------------------------| +| 31:0 | rw | 0x1 | hori_front_porch_size | Size of horizontal front porch. | + +## HORI_SYNC_SIZE +Size of horizontal sync area +- Offset: `0x10` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "hori_sync_size", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:------------------------------| +| 31:0 | rw | 0x1 | hori_sync_size | Size of horizontal sync area. | + +## HORI_BACK_PORCH_SIZE +Size of horizontal back porch +- Offset: `0x14` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "hori_back_porch_size", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:-------------------------------| +| 31:0 | rw | 0x1 | hori_back_porch_size | Size of horizontal back porch. | + +## VERT_VISIBLE_SIZE +Size of vertical visible area +- Offset: `0x18` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "vert_visible_size", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:-------------------------------| +| 31:0 | rw | 0x1 | vert_visible_size | Size of vertical visible area. | + +## VERT_FRONT_PORCH_SIZE +Size of vertical front porch +- Offset: `0x1c` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "vert_front_porch_size", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:------------------------------| +| 31:0 | rw | 0x1 | vert_front_porch_size | Size of vertical front porch. | + +## VERT_SYNC_SIZE +Size of vertical sync area +- Offset: `0x20` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "vert_sync_size", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:----------------------------| +| 31:0 | rw | 0x1 | vert_sync_size | Size of vertical sync area. | + +## VERT_BACK_PORCH_SIZE +Size of vertical back porch +- Offset: `0x24` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "vert_back_porch_size", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:-----------------------------| +| 31:0 | rw | 0x1 | vert_back_porch_size | Size of vertical back porch. | + +## START_ADDR_LOW +Low end of start address of frame buffer +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "start_addr_low", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:------------------------------------------| +| 31:0 | rw | 0x0 | start_addr_low | Low end of start address of frame buffer. | + +## START_ADDR_HIGH +High end of start address of frame buffer +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "start_addr_high", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------|:-------------------------------------------| +| 31:0 | rw | 0x0 | start_addr_high | High end of start address of frame buffer. | + +## FRAME_SIZE +Size of whole frame +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "frame_size", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:---------------------| +| 31:0 | rw | 0x0 | frame_size | Size of whole frame. | + +## BURST_LEN +Number of beats in a burst +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "burst_len", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:----------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | burst_len | Number of beats in a burst. | + diff --git a/docs/um/ip/watchdog_timer/data/aon_timer.hjson b/docs/um/ip/watchdog_timer/data/aon_timer.hjson new file mode 100644 index 00000000..b0660b09 --- /dev/null +++ b/docs/um/ip/watchdog_timer/data/aon_timer.hjson @@ -0,0 +1,265 @@ + +// Copyright lowRISC contributors. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 +// +{ + name: "aon_timer", + human_name: "Always-On Timer", + one_line_desc: "Wakeup and watchdog timers running on a low-power, always-on clock", + one_paragraph_desc: ''' + Always-On (AON) Timer is the main timer hardware block of OpenTitan. + It includes two 32-bit up-counting timers, one of which functions as a wakeup timer and the other as a watchdog timer. + The watchdog timer has two thresholds: a 'bark' threshold that generates an interrupt and a 'bite' threshold that resets the system. + The wakeup timer has a 12-bit pre-scaler to enable very long timeouts and also generates an interrupt to the core. + The timers run on a ~200 kHz AON clock and have a maximum timeout window of roughly ~6 hours for the watchdog timer and ~1000 days with the use of the pre-scaler for the wakeup timer. + ''' + design_spec: "../doc", + dv_doc: "../doc/dv", + hw_checklist: "../doc/checklist", + sw_checklist: "/sw/device/lib/dif/dif_aon_timer", + version: "1.0", + life_stage: "L1", + design_stage: "D3", + verification_stage: "V2", + dif_stage: "S2", + clocking: [ + {clock: "clk_i", reset: "rst_ni", primary: true}, + {clock: "clk_aon_i", reset: "rst_aon_ni"} + ] + bus_interfaces: [ + { protocol: "tlul", direction: "device"} + ], + interrupt_list: [ + { name: "wkup_timer_expired", + desc: "Raised if the wakeup timer has hit the specified threshold" + }, + { name: "wdog_timer_bark", + desc: "Raised if the watchdog timer has hit the bark threshold" + }, + ], + alert_list: [ + { name: "fatal_fault", + desc: ''' + This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected. + ''' + } + ], + wakeup_list: [ + { name: "wkup_req", + desc: "Raised if the wakeup or watchdog timer has hit the specified threshold" + }, + ], + reset_request_list: [ + { name: "aon_timer_rst_req", + desc: "watchdog reset requestt" + }, + ], + inter_signal_list: [ + // wakeup and reset request signals + { struct: "logic", + type: "uni", + name: "nmi_wdog_timer_bark", + act: "req", + package: "", + default: "1'b0" + }, + { struct: "logic", + type: "uni", + name: "wkup_req", + act: "req", + package: "", + default: "1'b0" + }, + { struct: "logic", + type: "uni", + name: "aon_timer_rst_req", + act: "req", + package: "", + default: "1'b0" + }, + // Broadcast from LC + { struct: "lc_tx" + type: "uni" + name: "lc_escalate_en" + act: "rcv" + default: "lc_ctrl_pkg::Off" + package: "lc_ctrl_pkg" + }, + { name: "sleep_mode", + type: "uni", + act: "rcv", + package: "", + struct: "logic", + width: "1" + } + ], + countermeasures: [ + { name: "BUS.INTEGRITY", + desc: "End-to-end bus integrity scheme." + } + ] + no_auto_intr_regs: "true", + regwidth: "32", + registers: [ + { name: "WKUP_CTRL", + desc: "Wakeup Timer Control register", + swaccess: "rw", + hwaccess: "hro", + async: "clk_aon_i", + fields: [ + { bits: "0", + name: "enable", + desc: "When set to 1, the wakeup timer will count", + } + { bits: "12:1", + name: "prescaler", + desc: "Pre-scaler value for wakeup timer count", + } + ], + }, + { name: "WKUP_THOLD", + desc: "Wakeup Timer Threshold Register", + swaccess: "rw", + hwaccess: "hro", + async: "clk_aon_i", + fields: [ + { bits: "31:0", + name: "threshold", + desc: "The count at which a wakeup interrupt should be generated", + } + ], + }, + { name: "WKUP_COUNT", + desc: "Wakeup Timer Count Register", + swaccess: "rw", + hwaccess: "hrw", + async: "clk_aon_i", + fields: [ + { bits: "31:0", + name: "count", + desc: "The current wakeup counter value", + } + ], + tags: [// this could be updated by HW + "excl:CsrNonInitTests:CsrExclWriteCheck"], + }, + { name: "WDOG_REGWEN", + desc: "Watchdog Timer Write Enable Register", + swaccess: "rw0c", + hwaccess: "none", + fields: [ + { bits: "0", + name: "regwen", + desc: "Once cleared, the watchdog configuration will be locked until the next reset", + resval: 1 + } + ] + }, + { name: "WDOG_CTRL", + desc: "Watchdog Timer Control register", + swaccess: "rw", + hwaccess: "hro", + async: "clk_aon_i", + regwen: "WDOG_REGWEN", + fields: [ + { bits: "0", + name: "enable", + desc: "When set to 1, the watchdog timer will count", + }, + { bits: "1", + name: "pause_in_sleep", + desc: "When set to 1, the watchdog timer will not count during sleep", + } + ], + }, + { name: "WDOG_BARK_THOLD", + desc: "Watchdog Timer Bark Threshold Register", + swaccess: "rw", + hwaccess: "hro", + async: "clk_aon_i", + regwen: "WDOG_REGWEN", + fields: [ + { bits: "31:0", + name: "threshold", + desc: "The count at which a watchdog bark interrupt should be generated", + } + ], + }, + { name: "WDOG_BITE_THOLD", + desc: "Watchdog Timer Bite Threshold Register", + swaccess: "rw", + hwaccess: "hro", + async: "clk_aon_i", + regwen: "WDOG_REGWEN", + fields: [ + { bits: "31:0", + name: "threshold", + desc: "The count at which a watchdog bite reset should be generated", + } + ], + }, + { name: "WDOG_COUNT", + desc: "Watchdog Timer Count Register", + swaccess: "rw", + hwaccess: "hrw", + async: "clk_aon_i", + fields: [ + { bits: "31:0", + name: "count", + desc: "The current watchdog counter value", + } + ], + tags: [// this could be updated by HW + "excl:CsrNonInitTests:CsrExclWriteCheck"], + }, + { name: "INTR_STATE", + desc: "Interrupt State Register", + swaccess: "rw1c", + hwaccess: "hrw", + fields: [ + { bits: "0", + name: "wkup_timer_expired", + desc: "Raised if the wakeup timer has hit the specified threshold", + } + { bits: "1", + name: "wdog_timer_bark", + desc: "Raised if the watchdog timer has hit the bark threshold", + } + ] + tags: [// interrupt could be updated by HW + "excl:CsrNonInitTests:CsrExclWriteCheck"], + }, + { name: "INTR_TEST", + desc: "Interrupt Test Register", + swaccess: "wo", + hwaccess: "hro", + hwext: "true", + hwqe: "true", + fields: [ + { bits: "0", + name: "wkup_timer_expired", + desc: "Write 1 to force wkup_timer_expired interrupt", + } + { bits: "1", + name: "wdog_timer_bark", + desc: "Write 1 to force wdog_timer_bark interrupt", + } + ] + }, + { name: "WKUP_CAUSE", + desc: "Wakeup request status", + swaccess: "rw0c", + hwaccess: "hrw", + async: "clk_aon_i", + fields: [ + { bits: "0", + name: "cause", + desc: "AON timer requested wakeup, write 0 to clear", + } + ] + tags: [// this could be updated by HW + "excl:CsrNonInitTests:CsrExclWriteCheck"], + }, + ], +} diff --git a/docs/um/ip/watchdog_timer/data/aon_timer.hjson~ b/docs/um/ip/watchdog_timer/data/aon_timer.hjson~ new file mode 100644 index 00000000..e69de29b diff --git a/docs/um/ip/watchdog_timer/data/aon_timer_doc.hjson b/docs/um/ip/watchdog_timer/data/aon_timer_doc.hjson new file mode 100644 index 00000000..bb551070 --- /dev/null +++ b/docs/um/ip/watchdog_timer/data/aon_timer_doc.hjson @@ -0,0 +1,266 @@ + +// Copyright lowRISC contributors. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 +// +{ + name: "aon_timer", + human_name: "Always-On Timer", + one_line_desc: "Wakeup and watchdog timers running on a low-power, always-on clock", + one_paragraph_desc: ''' + Always-On (AON) Timer is the main timer hardware block of OpenTitan. + It includes two 32-bit up-counting timers, one of which functions as a wakeup timer and the other as a watchdog timer. + The watchdog timer has two thresholds: a 'bark' threshold that generates an interrupt and a 'bite' threshold that resets the system. + The wakeup timer has a 12-bit pre-scaler to enable very long timeouts and also generates an interrupt to the core. + The timers run on a ~200 kHz AON clock and have a maximum timeout window of roughly ~6 hours for the watchdog timer and ~1000 days with the use of the pre-scaler for the wakeup timer. + ''' + design_spec: "../doc", + dv_doc: "../doc/dv", + hw_checklist: "../doc/checklist", + sw_checklist: "/sw/device/lib/dif/dif_aon_timer", + version: "1.0.0", + life_stage: "L1", + design_stage: "D3", + verification_stage: "V2", + dif_stage:"S2", + cip_id: "3", + clocking: [ + {clock: "clk_i", reset: "rst_ni", primary: true}, + {clock: "clk_aon_i", reset: "rst_aon_ni"} + ] + bus_interfaces: [ + { protocol: "tlul", direction: "device"} + ], + interrupt_list: [ + { name: "wkup_timer_expired", + desc: "Raised if the wakeup timer has hit the specified threshold" + }, + { name: "wdog_timer_bark", + desc: "Raised if the watchdog timer has hit the bark threshold" + }, + ], + alert_list: [ + { name: "fatal_fault", + desc: ''' + This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected. + ''' + } + ], + wakeup_list: [ + { name: "wkup_req", + desc: "Raised if the wakeup or watchdog timer has hit the specified threshold" + }, + ], + reset_request_list: [ + { name: "aon_timer_rst_req", + desc: "watchdog reset requestt" + }, + ], + inter_signal_list: [ + // wakeup and reset request signals + { struct: "logic", + type: "uni", + name: "nmi_wdog_timer_bark", + act: "req", + package: "", + default: "1'b0" + }, + { struct: "logic", + type: "uni", + name: "wkup_req", + act: "req", + package: "", + default: "1'b0" + }, + { struct: "logic", + type: "uni", + name: "aon_timer_rst_req", + act: "req", + package: "", + default: "1'b0" + }, + // Broadcast from LC + { struct: "lc_tx" + type: "uni" + name: "lc_escalate_en" + act: "rcv" + default: "lc_ctrl_pkg::Off" + package: "lc_ctrl_pkg" + }, + { name: "sleep_mode", + type: "uni", + act: "rcv", + package: "", + struct: "logic", + width: "1" + } + ], + countermeasures: [ + { name: "BUS.INTEGRITY", + desc: "End-to-end bus integrity scheme." + } + ] + no_auto_intr_regs: "true", + regwidth: "32", + registers: [ + { name: "WKUP_CTRL", + desc: "Wakeup Timer Control register", + swaccess: "rw", + hwaccess: "hro", + async: "clk_aon_i", + fields: [ + { bits: "0", + name: "enable", + desc: "When set to 1, the wakeup timer will count", + } + { bits: "12:1", + name: "prescaler", + desc: "Pre-scaler value for wakeup timer count", + } + ], + }, + { name: "WKUP_THOLD", + desc: "Wakeup Timer Threshold Register", + swaccess: "rw", + hwaccess: "hro", + async: "clk_aon_i", + fields: [ + { bits: "31:0", + name: "threshold", + desc: "The count at which a wakeup interrupt should be generated", + } + ], + }, + { name: "WKUP_COUNT", + desc: "Wakeup Timer Count Register", + swaccess: "rw", + hwaccess: "hrw", + async: "clk_aon_i", + fields: [ + { bits: "31:0", + name: "count", + desc: "The current wakeup counter value", + } + ], + tags: [// this could be updated by HW + "excl:CsrNonInitTests:CsrExclWriteCheck"], + }, + { name: "WDOG_REGWEN", + desc: "Watchdog Timer Write Enable Register", + swaccess: "rw0c", + hwaccess: "none", + fields: [ + { bits: "0", + name: "regwen", + desc: "Once cleared, the watchdog configuration will be locked until the next reset", + resval: 1 + } + ] + }, + { name: "WDOG_CTRL", + desc: "Watchdog Timer Control register", + swaccess: "rw", + hwaccess: "hro", + async: "clk_aon_i", + regwen: "WDOG_REGWEN", + fields: [ + { bits: "0", + name: "enable", + desc: "When set to 1, the watchdog timer will count", + }, + { bits: "1", + name: "pause_in_sleep", + desc: "When set to 1, the watchdog timer will not count during sleep", + } + ], + }, + { name: "WDOG_BARK_THOLD", + desc: "Watchdog Timer Bark Threshold Register", + swaccess: "rw", + hwaccess: "hro", + async: "clk_aon_i", + regwen: "WDOG_REGWEN", + fields: [ + { bits: "31:0", + name: "threshold", + desc: "The count at which a watchdog bark interrupt should be generated", + } + ], + }, + { name: "WDOG_BITE_THOLD", + desc: "Watchdog Timer Bite Threshold Register", + swaccess: "rw", + hwaccess: "hro", + async: "clk_aon_i", + regwen: "WDOG_REGWEN", + fields: [ + { bits: "31:0", + name: "threshold", + desc: "The count at which a watchdog bite reset should be generated", + } + ], + }, + { name: "WDOG_COUNT", + desc: "Watchdog Timer Count Register", + swaccess: "rw", + hwaccess: "hrw", + async: "clk_aon_i", + fields: [ + { bits: "31:0", + name: "count", + desc: "The current watchdog counter value", + } + ], + tags: [// this could be updated by HW + "excl:CsrNonInitTests:CsrExclWriteCheck"], + }, + { name: "INTR_STATE", + desc: "Interrupt State Register", + swaccess: "rw1c", + hwaccess: "hrw", + fields: [ + { bits: "0", + name: "wkup_timer_expired", + desc: "Raised if the wakeup timer has hit the specified threshold", + } + { bits: "1", + name: "wdog_timer_bark", + desc: "Raised if the watchdog timer has hit the bark threshold", + } + ] + tags: [// interrupt could be updated by HW + "excl:CsrNonInitTests:CsrExclWriteCheck"], + }, + { name: "INTR_TEST", + desc: "Interrupt Test Register", + swaccess: "wo", + hwaccess: "hro", + hwext: "true", + hwqe: "true", + fields: [ + { bits: "0", + name: "wkup_timer_expired", + desc: "Write 1 to force wkup_timer_expired interrupt", + } + { bits: "1", + name: "wdog_timer_bark", + desc: "Write 1 to force wdog_timer_bark interrupt", + } + ] + }, + { name: "WKUP_CAUSE", + desc: "Wakeup request status", + swaccess: "rw0c", + hwaccess: "hrw", + async: "clk_aon_i", + fields: [ + { bits: "0", + name: "cause", + desc: "AON timer requested wakeup, write 0 to clear", + } + ] + tags: [// this could be updated by HW + "excl:CsrNonInitTests:CsrExclWriteCheck"], + }, + ], +} diff --git a/docs/um/ip/watchdog_timer/data/aon_timer_doc.hjson~ b/docs/um/ip/watchdog_timer/data/aon_timer_doc.hjson~ new file mode 100644 index 00000000..c8b49daf --- /dev/null +++ b/docs/um/ip/watchdog_timer/data/aon_timer_doc.hjson~ @@ -0,0 +1,266 @@ + +// Copyright lowRISC contributors. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 +// +{ + name: "aon_timer", + human_name: "Always-On Timer", + one_line_desc: "Wakeup and watchdog timers running on a low-power, always-on clock", + one_paragraph_desc: ''' + Always-On (AON) Timer is the main timer hardware block of OpenTitan. + It includes two 32-bit up-counting timers, one of which functions as a wakeup timer and the other as a watchdog timer. + The watchdog timer has two thresholds: a 'bark' threshold that generates an interrupt and a 'bite' threshold that resets the system. + The wakeup timer has a 12-bit pre-scaler to enable very long timeouts and also generates an interrupt to the core. + The timers run on a ~200 kHz AON clock and have a maximum timeout window of roughly ~6 hours for the watchdog timer and ~1000 days with the use of the pre-scaler for the wakeup timer. + ''' + design_spec: "../doc", + dv_doc: "../doc/dv", + hw_checklist: "../doc/checklist", + sw_checklist: "/sw/device/lib/dif/dif_aon_timer", + version: "1.0", + life_stage: "L1", + design_stage: "D3", + verification_stage: "V2", + dif_stage:"S2", + cip_id: "3", + clocking: [ + {clock: "clk_i", reset: "rst_ni", primary: true}, + {clock: "clk_aon_i", reset: "rst_aon_ni"} + ] + bus_interfaces: [ + { protocol: "tlul", direction: "device"} + ], + interrupt_list: [ + { name: "wkup_timer_expired", + desc: "Raised if the wakeup timer has hit the specified threshold" + }, + { name: "wdog_timer_bark", + desc: "Raised if the watchdog timer has hit the bark threshold" + }, + ], + alert_list: [ + { name: "fatal_fault", + desc: ''' + This fatal alert is triggered when a fatal TL-UL bus integrity fault is detected. + ''' + } + ], + wakeup_list: [ + { name: "wkup_req", + desc: "Raised if the wakeup or watchdog timer has hit the specified threshold" + }, + ], + reset_request_list: [ + { name: "aon_timer_rst_req", + desc: "watchdog reset requestt" + }, + ], + inter_signal_list: [ + // wakeup and reset request signals + { struct: "logic", + type: "uni", + name: "nmi_wdog_timer_bark", + act: "req", + package: "", + default: "1'b0" + }, + { struct: "logic", + type: "uni", + name: "wkup_req", + act: "req", + package: "", + default: "1'b0" + }, + { struct: "logic", + type: "uni", + name: "aon_timer_rst_req", + act: "req", + package: "", + default: "1'b0" + }, + // Broadcast from LC + { struct: "lc_tx" + type: "uni" + name: "lc_escalate_en" + act: "rcv" + default: "lc_ctrl_pkg::Off" + package: "lc_ctrl_pkg" + }, + { name: "sleep_mode", + type: "uni", + act: "rcv", + package: "", + struct: "logic", + width: "1" + } + ], + countermeasures: [ + { name: "BUS.INTEGRITY", + desc: "End-to-end bus integrity scheme." + } + ] + no_auto_intr_regs: "true", + regwidth: "32", + registers: [ + { name: "WKUP_CTRL", + desc: "Wakeup Timer Control register", + swaccess: "rw", + hwaccess: "hro", + async: "clk_aon_i", + fields: [ + { bits: "0", + name: "enable", + desc: "When set to 1, the wakeup timer will count", + } + { bits: "12:1", + name: "prescaler", + desc: "Pre-scaler value for wakeup timer count", + } + ], + }, + { name: "WKUP_THOLD", + desc: "Wakeup Timer Threshold Register", + swaccess: "rw", + hwaccess: "hro", + async: "clk_aon_i", + fields: [ + { bits: "31:0", + name: "threshold", + desc: "The count at which a wakeup interrupt should be generated", + } + ], + }, + { name: "WKUP_COUNT", + desc: "Wakeup Timer Count Register", + swaccess: "rw", + hwaccess: "hrw", + async: "clk_aon_i", + fields: [ + { bits: "31:0", + name: "count", + desc: "The current wakeup counter value", + } + ], + tags: [// this could be updated by HW + "excl:CsrNonInitTests:CsrExclWriteCheck"], + }, + { name: "WDOG_REGWEN", + desc: "Watchdog Timer Write Enable Register", + swaccess: "rw0c", + hwaccess: "none", + fields: [ + { bits: "0", + name: "regwen", + desc: "Once cleared, the watchdog configuration will be locked until the next reset", + resval: 1 + } + ] + }, + { name: "WDOG_CTRL", + desc: "Watchdog Timer Control register", + swaccess: "rw", + hwaccess: "hro", + async: "clk_aon_i", + regwen: "WDOG_REGWEN", + fields: [ + { bits: "0", + name: "enable", + desc: "When set to 1, the watchdog timer will count", + }, + { bits: "1", + name: "pause_in_sleep", + desc: "When set to 1, the watchdog timer will not count during sleep", + } + ], + }, + { name: "WDOG_BARK_THOLD", + desc: "Watchdog Timer Bark Threshold Register", + swaccess: "rw", + hwaccess: "hro", + async: "clk_aon_i", + regwen: "WDOG_REGWEN", + fields: [ + { bits: "31:0", + name: "threshold", + desc: "The count at which a watchdog bark interrupt should be generated", + } + ], + }, + { name: "WDOG_BITE_THOLD", + desc: "Watchdog Timer Bite Threshold Register", + swaccess: "rw", + hwaccess: "hro", + async: "clk_aon_i", + regwen: "WDOG_REGWEN", + fields: [ + { bits: "31:0", + name: "threshold", + desc: "The count at which a watchdog bite reset should be generated", + } + ], + }, + { name: "WDOG_COUNT", + desc: "Watchdog Timer Count Register", + swaccess: "rw", + hwaccess: "hrw", + async: "clk_aon_i", + fields: [ + { bits: "31:0", + name: "count", + desc: "The current watchdog counter value", + } + ], + tags: [// this could be updated by HW + "excl:CsrNonInitTests:CsrExclWriteCheck"], + }, + { name: "INTR_STATE", + desc: "Interrupt State Register", + swaccess: "rw1c", + hwaccess: "hrw", + fields: [ + { bits: "0", + name: "wkup_timer_expired", + desc: "Raised if the wakeup timer has hit the specified threshold", + } + { bits: "1", + name: "wdog_timer_bark", + desc: "Raised if the watchdog timer has hit the bark threshold", + } + ] + tags: [// interrupt could be updated by HW + "excl:CsrNonInitTests:CsrExclWriteCheck"], + }, + { name: "INTR_TEST", + desc: "Interrupt Test Register", + swaccess: "wo", + hwaccess: "hro", + hwext: "true", + hwqe: "true", + fields: [ + { bits: "0", + name: "wkup_timer_expired", + desc: "Write 1 to force wkup_timer_expired interrupt", + } + { bits: "1", + name: "wdog_timer_bark", + desc: "Write 1 to force wdog_timer_bark interrupt", + } + ] + }, + { name: "WKUP_CAUSE", + desc: "Wakeup request status", + swaccess: "rw0c", + hwaccess: "hrw", + async: "clk_aon_i", + fields: [ + { bits: "0", + name: "cause", + desc: "AON timer requested wakeup, write 0 to clear", + } + ] + tags: [// this could be updated by HW + "excl:CsrNonInitTests:CsrExclWriteCheck"], + }, + ], +} diff --git a/docs/um/ip/watchdog_timer/doc/registers.md b/docs/um/ip/watchdog_timer/doc/registers.md new file mode 100644 index 00000000..05eedaab --- /dev/null +++ b/docs/um/ip/watchdog_timer/doc/registers.md @@ -0,0 +1,223 @@ +## Summary + +| Name | Offset | Length | Description | +|:------------------------------------------------|:---------|---------:|:---------------------------------------| +| aon_timer.[`ALERT_TEST`](#alert_test) | 0x0 | 4 | Alert Test Register | +| aon_timer.[`WKUP_CTRL`](#wkup_ctrl) | 0x4 | 4 | Wakeup Timer Control register | +| aon_timer.[`WKUP_THOLD`](#wkup_thold) | 0x8 | 4 | Wakeup Timer Threshold Register | +| aon_timer.[`WKUP_COUNT`](#wkup_count) | 0xc | 4 | Wakeup Timer Count Register | +| aon_timer.[`WDOG_REGWEN`](#wdog_regwen) | 0x10 | 4 | Watchdog Timer Write Enable Register | +| aon_timer.[`WDOG_CTRL`](#wdog_ctrl) | 0x14 | 4 | Watchdog Timer Control register | +| aon_timer.[`WDOG_BARK_THOLD`](#wdog_bark_thold) | 0x18 | 4 | Watchdog Timer Bark Threshold Register | +| aon_timer.[`WDOG_BITE_THOLD`](#wdog_bite_thold) | 0x1c | 4 | Watchdog Timer Bite Threshold Register | +| aon_timer.[`WDOG_COUNT`](#wdog_count) | 0x20 | 4 | Watchdog Timer Count Register | +| aon_timer.[`INTR_STATE`](#intr_state) | 0x24 | 4 | Interrupt State Register | +| aon_timer.[`INTR_TEST`](#intr_test) | 0x28 | 4 | Interrupt Test Register | +| aon_timer.[`WKUP_CAUSE`](#wkup_cause) | 0x2c | 4 | Wakeup request status | + +## ALERT_TEST +Alert Test Register +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "fatal_fault", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:-------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | fatal_fault | Write 1 to trigger one alert event of this kind. | + +## WKUP_CTRL +Wakeup Timer Control register +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0x1fff` + +### Fields + +```wavejson +{"reg": [{"name": "enable", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "prescaler", "bits": 12, "attr": ["rw"], "rotate": 0}, {"bits": 19}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-------------------------------------------| +| 31:13 | | | | Reserved | +| 12:1 | rw | 0x0 | prescaler | Pre-scaler value for wakeup timer count | +| 0 | rw | 0x0 | enable | When set to 1, the wakeup timer will count | + +## WKUP_THOLD +Wakeup Timer Threshold Register +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "threshold", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:----------------------------------------------------------| +| 31:0 | rw | 0x0 | threshold | The count at which a wakeup interrupt should be generated | + +## WKUP_COUNT +Wakeup Timer Count Register +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "count", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------| +| 31:0 | rw | 0x0 | count | The current wakeup counter value | + +## WDOG_REGWEN +Watchdog Timer Write Enable Register +- Offset: `0x10` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "regwen", "bits": 1, "attr": ["rw0c"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw0c | 0x1 | regwen | Once cleared, the watchdog configuration will be locked until the next reset | + +## WDOG_CTRL +Watchdog Timer Control register +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0x3` +- Register enable: [`WDOG_REGWEN`](#wdog_regwen) + +### Fields + +```wavejson +{"reg": [{"name": "enable", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "pause_in_sleep", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 160}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:--------------------------------------------------------------| +| 31:2 | | | | Reserved | +| 1 | rw | 0x0 | pause_in_sleep | When set to 1, the watchdog timer will not count during sleep | +| 0 | rw | 0x0 | enable | When set to 1, the watchdog timer will count | + +## WDOG_BARK_THOLD +Watchdog Timer Bark Threshold Register +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` +- Register enable: [`WDOG_REGWEN`](#wdog_regwen) + +### Fields + +```wavejson +{"reg": [{"name": "threshold", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-----------------------------------------------------------------| +| 31:0 | rw | 0x0 | threshold | The count at which a watchdog bark interrupt should be generated | + +## WDOG_BITE_THOLD +Watchdog Timer Bite Threshold Register +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` +- Register enable: [`WDOG_REGWEN`](#wdog_regwen) + +### Fields + +```wavejson +{"reg": [{"name": "threshold", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-------------------------------------------------------------| +| 31:0 | rw | 0x0 | threshold | The count at which a watchdog bite reset should be generated | + +## WDOG_COUNT +Watchdog Timer Count Register +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "count", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------| +| 31:0 | rw | 0x0 | count | The current watchdog counter value | + +## INTR_STATE +Interrupt State Register +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "wkup_timer_expired", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "wdog_timer_bark", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 200}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------|:-----------------------------------------------------------| +| 31:2 | | | | Reserved | +| 1 | rw1c | 0x0 | wdog_timer_bark | Raised if the watchdog timer has hit the bark threshold | +| 0 | rw1c | 0x0 | wkup_timer_expired | Raised if the wakeup timer has hit the specified threshold | + +## INTR_TEST +Interrupt Test Register +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "wkup_timer_expired", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "wdog_timer_bark", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 200}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------|:----------------------------------------------| +| 31:2 | | | | Reserved | +| 1 | wo | x | wdog_timer_bark | Write 1 to force wdog_timer_bark interrupt | +| 0 | wo | x | wkup_timer_expired | Write 1 to force wkup_timer_expired interrupt | + +## WKUP_CAUSE +Wakeup request status +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "cause", "bits": 1, "attr": ["rw0c"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw0c | 0x0 | cause | AON timer requested wakeup, write 0 to clear | + From 28e0ea23e5ea04f220a6c57324129a79a2c1ab6c Mon Sep 17 00:00:00 2001 From: Arya Saraei Date: Wed, 28 May 2025 20:06:10 +0200 Subject: [PATCH 4/5] Add updated Carfield IP documentation and PDF generation script --- docs/integrated_ips_md_files.pdf | Bin 0 -> 922033 bytes docs/merged_md_files.md | 25684 ++++++++++++++++ docs/um/arch.md | 18 +- .../data/carfield_regs_Doc.hjson | 713 + docs/um/ip/carfield_regs/doc/carfield_regs.md | 1126 + .../data/spatz_cluster_peripheral_reg.hjson | 431 + .../spatz_cluster_peripheral_reg_doc.hjson | 435 + docs/um/ip/fp_cluster/doc/registers.md | 386 + .../data/timer_unit.hjson | 282 + .../gp_timer1_system_timer/doc/registers.md | 197 + .../data/apb_adv_timer.hjson | 1020 + .../gp_timer2_advanced_timer/doc/registers.md | 1088 + .../l2_ecc_config/data/ecc_sram_wrapper.hjson | 86 + .../data/ecc_sram_wrapper_doc.hjson | 94 + docs/um/ip/l2_ecc_config/doc/registers.md | 108 + 15 files changed, 31659 insertions(+), 9 deletions(-) create mode 100644 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b/docs/integrated_ips_md_files.pdf new file mode 100644 index 0000000000000000000000000000000000000000..279bad3215b634a50dc2d225552b72bb34a6d495 GIT binary patch literal 922033 zcma&NQqCI{5k3*{$}F|h&>abB9Re+!>0u!*YEoH&E4GwRom zbot7vL`FZ!HgRb}Fpy=RS}eoYwS; zFjv{&Q5T*N?Zn&Ni0H{}s^eugWGtxzOUfaZKK2I-3fC8xuO?6KMNt!xSU^KIBfH!U ztK&Q90Q<>f{S@le*VAJT!5V6xiqSct*Ep6{kh>jyo`3%laXdpgH_*0Nk4TilFXNvm z^w^Y7Wt>>>pqI3QPUhk$o03;mDSKCGbgWU##3VdmhJY$KHs%mm4^%W@p*MCq##uS^ zQAL(=2I|QiijVQCbf2{uIfUQ1Bxo?bCs2*I!k<7=1)vG&)gZf$B<`F>vBxjLOMoKb zes&_6fMHXLYn(%xN-ygkDmM)LBYqtDQ(%`;Iymw2l*1BPSsSu zFMfs+gV%gSP|!Z3v^2F;DlgHvnqukQZuLc?0sm-k5y;4k%=@57?UJ%t=?#IJAHb@< z*m?KlhSRa-%ozeCXhcC;c22A>DmIx2*ng;(2V}yVMNXUq3C=)$ti;T1j}7hv)z#|A z*i6WB`x@)o$ND`hp(l^;d||h4KtvkE*$MQ+yUjqDOF3?i+e>VPw++52%51s|8hm`B z3~%ctwMIyiYBByg(}1-~$sQPUnHpIlXhJAT5+8B!BSs2iDtrN;ntOC0D}V<#%Yrus zcxIbUW!^ZfC_c6O{H++4r!Nuag=#4o`{)@)jd%`m3ps*YHfX@;Pe z9&Zkia$amYCH>`I8B@;y*^sGj2fr#S#`cS`F{c?uY2catclNCD@8=kb5pNEhJRtnv zQHWF^dNJ%>2t0BVL3+|=Md3@JdS^_U(yp9y)mKzMxcP&>gct*$_?(xpQ&e1Qso?3R z!sr2zE8)7Prmg*!u{1ayETj9JS`E%#e&ZlK*va<7^jW$&vVNUsLlk0vHGWZpX18J@^8*9Jrg_q|9x9M)+)90oxNe=WiY{rrRRKEBdYREAbud3It<^zvyIpMx_pD-PKa${e+vlLc_2?oA= z!yoe_*+$H67GSBF&5)8Mos&H&EN^sxp=n&6JDeMo&pL%t9F&mpCxW<EW&F`3FH(=C`y31@W)51ZHs`uy`P$YJFvp6v$o0n8Ht& zB>Zu7S%+RNwdFq<`)?Y*P%7``Q`GSxnDWI8d*p)#ksLITuP=kD9GkbzwH~$D7|1}n zwT*;?B_&8m>sCQliBCrOJ8>Z%^4>B&f|IAH_gv5d=D%8Q*RzZRK0F&IJ%)eIqj$fAvF$g$C@WLq& z8ZY7*H1zRyyDUPIMKxx7v~gUOsahyhTh#Bjaqe?cU&e&@1bjk~dn_Oi8GsluFK&LA zrwTGS+jS!WuEM84rsrJYqgY-~ewH>e91(OkHZmRiCU-nPOT~fo&lEX(%3- zt4gHnzwrQwXu^g~f?^p$?bu#upF;xuRF3G++K-l~MJ(GNi71IhN}8I_7U7Ba5c~*0 z-DNWY)F>^@A;piKQ46Z+B}`F(w@220($i{t(D<_#%fP|gR@Jo%6 ziW5slu4_p|TDvCpz)v=^Fh{JzH$oKRDxF%|(u#AfzxU#OwVc2>*K zP?xjYrn+%eK9*56M&kL^GtRsEjNF+UP?I11yT%^g6pq<*mznEm~jD+Q2MT#cjV{zv|qS zu}CdR3ZZx!2Ee%$ra2CPt^g_rI;wd^pffhX(f`L744j|LoE6L93B~TD6 zd5pp4PwpP7sls{LV|5cc&GSM7vpa>=<3baPMeWJJJlIUt`}mNG_;iWpRT;D3uUaT! zDi$yjX`7VheEw9aP4zU<`bqy2nD=EF;ESqQNr??HeoTvM6SZFoT{vd0+cw>nF6sVV z3$C2N1*cvG$2aV*AzTXsY*T{w{~oJb{hZphk^ND1v+|0R_6cv!*Hd}8GFD2cl|*52s#+Y z==BQ{6)*wd3}%f+tX`*j;V`1|{)KUXmAKm2w&fPEFB@NT#NGR03TiB~TiPPwQB)e{ zv^GnpXTDbV>|y2jZQuJHtKgYyF=i4noAu!1<|3qEliK5uM zFg6L{jC-E*Lm=1D$5+PkjkCRJnk+$Erc5jqT3m+K8k;woW6B;d?$<#g{hzFFuW#%3 zH+J?4l42n`5D!^zI0)tE#RTFGqP=r!_gyRbM{5L{KWDjQH&aZM#K07s-q}q|0-9E} z-#I?H-9!r}!SYGJi8~j7i&l(crU--_A);^l;O5Q4^<~j0#n4vmGO8V@E-@(JNx2-s$?lp?$y@dpIBvyKc>RQz3U<|LA?j*{rY^ zW}*6b*L3O&sZkn5Ucy^Os2t^0!%72_rg0WBh+eZz&5)H*t3xrni;XE5(KJpPl^|av z-J`>w=`Owf&RRGYoyd_MOiKpc<7Zq-n~e>qj#t7ePAPB^%isyP%B#|g6kUDRqTM`3 zBfueC;f;D3uuJc#av91jeyUkTj{i_u$TDn;c+0CZhyhJ=ypTv?OmNFMNHtSI$z#`Y zIzpw6uyoP#Qu5%W&I%H^ahyXdPr z$$t-t6zv&I2zvN3RO?^zhyEwaOaLJKpLw^oM9#pgs}t0Z`Yyqz!@%er;lAZv{2~;veNuhO5&Bw?#;=-xBx6LEgS`5zz=43jiY7-( zdL++_5!x--x#xYkLhf;e;-%;@2eTNA*{SL~Yw?%D!3ks~qu8yV_`pto+mJ#AXqKoG zutr}u)l0!rJLc3mKMq#uSG1(MV{1K(Ka=1W%Ek&3-mBJ*Rb7i-;UZ+XXmnZe3d%34 z(WqvS%;8m*^v#&GO;L-uEYxa4jg4a8sMpZUCk;9+!UCKo_noZjby~27f7izpvn2y4lXe ziw3`K%`FtAB3>!y3*8!;2#p?%TXpryYcc9aNnDlK{(=&2bj1%-@(@Wq z;9B48!UIfr4&j_e%1P2>z~gU>nhNk$Bx>|`TRYmQXaJRRwYW$&VJEOjQS$)jQAxE9 z-#Vp=woEElWOLF0jg^$DF@v(iF1~tF^u|Oqh1|^fbkmu-wVk6JeOuOrNL4xQTNhxL z9qvw?)2E!iDS%zu;0G-iYjL_T*Hj;*QD{B0i6Ard^GF8~J&Io3mJ77gTd#Dbp)MqQ zP$o=Ht#nnNCFOQ;nOb|kf+@@lX@0m-HfX&#t?@LsLVLljwa{GEfQ0k_V`+DX|VMQ1GD;BF^P+ua}$}w{Yiz<+&no;=R~(oQ2vuQ56-G28GZ)+pwj3 zDb-N68);kQ@E$0Vto*Z5YTGKyF=dF|V(o3)G;6j35i*xBbp^N1@enV6(hPP!ERXsn z@A~GrP*xb=JP6sdp6xR~%BTX_8;a?^qW<+W`jI2Defv`!FESZC%HFJ`^0Pas73?=1Is0@HLk3m*F&rV zM=I4(hrK(1Q?(F54ud35sA+c|oN=I~7a5;-RBxqZmzf1h9|xGjeZ{3-v;dk%F3Y^m zgz$;}oQwS<*3mDo&xbwMhlfCoN%lQG2d5MO(Zr2W=0ssyf8>D5zCHP6d8l9X6z6F3 zr4XbP8cstt{77x$zg0SJivwt-xK%NotD-u_KIf)wP;)C^$EShd!$GnrRvwH7pxEl_ zH-C_*38Rgg;{BoE%rm=0jS0aZ`3C`xLNC0)U=%j@v|6R41vwC!wp1sX2-OiTCjr+K z4tdrTbIa0&5-*ezDuyh0hrWpf5^JF=$21qoO{upEM&?eOP%$h1th(583-PPUKTQ#> z(*ridrIN0-W9iu4fxHU4bf62@TUTpj*Z4)~jm?21vaJG3nFoj07|d5wvMp})14H>& z&HOnc*6C;mLJ2LfZ@HGGA6Ih)gjgCu&OuNZFaec%!9GtHQ=D>l@#R=Dtv}qIs}#y8 z_7Gd5YD~FAkSx{dP+Q=L)u3QL8F=c<;OaN8UJ&fivVnDOrF=$z@Q5h@b&lcLS*F>d zkMexaP_Wb}{}}#&a(PxTyy@IGFo9d4JgxE$o{p(OSh$AK6YNM6EGe_JpUCa#5M@%s za7ECI`$Qh{rdyTjF5)xg9^i7S#|x`48URvA*cZT6{=M`&&TZ~~v+%|nxL&b0;e(xu z%uH~FjI3f?^ZC2WSbi5-N974<2Sde?tuoG== zUJolx37Yv+rC4e9_O9nX5i6FQ_t8efk4UUn1@>m^PHDw;k#D}La6?uRwmu)`VWajs zJjvJ-9jvy+qR>*}V+BSRp?RB^lQhhoJOHk&5y zaY8q}d|)4T>9hjRhU6INvLk~9F|QP4*-`OC*VZG1XR>uwbWP~+9~@}Cg3Wz^T+f}^ zgBDLmGjAEo8>BQ%X8b)T*n&)TH6iYEaV@`%0%Rs=Q&r;Ag-7N_kc&H*y3~o%h{L&$ zXQ6A5Qpp`yo7R=JtOsp`4sZuvX`>c?j6Qmu_1WrLl-Mzom@Rj^XZGPWiZ3om>j&45 z=coE856RYAis)zHRZSC%lpQ;l6QXlKmM+JsMou?iDuwQgs>|=2D9@SeYff3OuQlw> zyUUs%(teT+0`M)OHoCY*e~;cKC{8n*fjGik^F!anAI#XdS__WzrGS85YAn5_RO z$44L);sg&sR2?L-Uq+~l9R-oA-K?1=@yb5DML3KYGXn>aku89~Jn3-6lST&!bK;j+ zjg$9cl>uKZ7mp};y>~ArF26^_zrJyl=f?t7OHq%iVR$M6LAyDf+rOWTpgau0UZ+uo z4R?poU`Kjnao0GUmPN4rm_VvRdPAS;5Ny`qHMSsQa5PASMXLLqUm3yV6jTWtd#g?2 z8K9bvKDxUq>?FaEm)(p9tRQu9s7(+F)pk=54KM}OpW!~0zALF+aBPQ{3*vy3;maH1 zKC<&V)Z&Y~a0$T80yA;o+ykZf5CV2Z?H+kzw4cs1GKuPCuME>aTx84?*5}QpQH+M+ zzPXBYMCK|4fdjxf7tsOcu~-AhNv#27)oz2;Iu6qYaD~Em{?;U$hz|@;_Vzyqi#;>H z5y7;(Yiao8xaQ|ag15Z!YKZ(N7LQ|m+lSw_l;lp$goY1&K6+~Dr$z!Mesrdx9R!`dz z`oRD&x>L#+XX;YvJ;0UakB&C-gxP^96TxfhaE zEXCV)t&kBoIP6GHjyD)Ln_fw1*-vO04^a%AF4A<>|4GUTJz{2y4oTtGydS?EeXP^$ zFiLUk#f&?|=2X12K1u;-iaz^s*_>R|*d%*7eU%LGl>oKEVfNY0xk@o8o-9*r{i(meormBIW2e2KxXZ_m^j8_D@PiDVX8WTVbCs{3Vzu|q{ zB8CzvcR!<6IjlIeGX|eJ%jS?yFON)B#6r4F#Cr`6JaYMRjx_5OQRcCnhr3MHQpquj zPUN!QM*1ab3%~H{YD(Xg4Bc}`15GfC(zDx}vn{>ic|L4LCtO+zr_swL_#q(yK6iiN zur92UBBT~cm4_{(%XB3v+4&sS>b>#iHe#LF^W=8DjPY&8#bf?tJ&0-wC;FM~(-PB` zn)mA&NI{@4?7x79?O%b0p6Ndn>6Kbr45sKmA?pih;kx1+5f2Tl4w?;dP|B{3NSIh5 zPps#rg2$xf1YspbACtuebb#laM<@O~@|W=|tP-lrKYR~P1{gaQQJny#@#o6Ip z<%FR7Y@aBz+hMC>>c>YS{b6+dsI89`6A13G8`qD^TXOk8)Os0UbqQZGT>9+RTLbx^ z6SZY$HfX4f&EQ$e5va{)cgn`sR42hP@#ia(5=AGiZCC|QvL+;s!+r`A0ppIW@IrIQ z6bR@O6SaGj;@;eAwKbRk>T%Q5GwBnIX2YF^QRENVqFgoiRwq_v>W%P#wRzX?y>%ic zXkm%4%=mr_^N~PxB=wfjkts67sZJz^h%YC3-GBH}3qfXM)u=tDb*Ao^b2YTO zW5jN}>KDLm5F1)Og@VoGHpZH&Y#`M$Viv}*IGL-EA$nx z(A(jsT2eAb|Gtm9Q(Arqh9XMR8}D`1)C#3Nda(;&56La=E13`M9v_uD?1 zU?D@Nhi`Kr3`O(q!m_DVc*kaOkQm@8m}0_nzbs5+(b@LD#RXQ7w=7N zi`(R8$uFA_Hm6woS+Tm~FvFrRVlweTNq4laT(m@4M!XwGYjw+00+0?7L6${6Z+F!FP=kwJ=phtL@5`TmrWfQDRf{Em;K+}VrqnLV2guV7a^DQt{*h^LZUHXU9Y+8w z8cvikjIt4?l}ZXS>y_l(_=sb%5cxbATLn%A`R%lMv^Dc}+Wf>I70CHQ6A^l-h%h+i zEmnP@H;}yK$;2a_s>x{Nwk4S^@hrbe0J_dv`5ujQ*u!vQp_=v)S^fhg7N{>IB3Svj z@c@7*&O)OvhskLj3p7jQg7dYSfK{R=tJ4R|E+Z!k8}#h~8A z2G=uBS+Hf{DfJ)OOt^Q3S6_-(RaxNa-`2BJnT8wdfTMa%qPv!G&5@qG5PEDm5VMNw znGgyA(d7W>>OBieyMK6IA#F{aw$@qKfpLPd=6xsk)TKtGv1EHa$=%1Dh&b_fPB z!zVFRS6RoXW(|3;qE^-B3V%HVdMG)0b9-ExL<3(xVHdSj@AqD>%-2vN*5!&r=di_^ zJr-FuU>t4W`hZe^7d8KHbg|L@D|9ik{zol)^|#$2Wd5h!d53MPul!6BVaEeRXhn7u z#3EThq`B0W{q(N*ba5rkMn_3Xo|Rd|9(j5{H@|r_R!A)JwQ%6`b@2F-+VLrw!OcAR zKlRNXl2Dyq>B)pqvfZ+5Bd|xtnfu$7xCFF9e{hZ|`BG)lb2N{FM3Hk5v*juJ{X6^B zk*kw=uDno3mK;1SCPKE(I*$*AbH)J(9>_4Mz8(A5_vggpfun+wv_!Zb)MLgw9#TbB zIkC8l_@J`peD7NS=>(CM-GXlXcBZ+C1cZ{yJD0h6P|Iq{ca~2!5AobzgIDxF29GFa zh(O5xe+*uvzO;@Q;r}Q+ssCT$h5w`QUj8aPYJ*&~Y?tAeAp1rIP}r{Y-5?O&wDi=N zNg-OU^;*oo3eTYLwQs9NQG}iLS65AwzEGN_&=IxyU{-+=yWNGfVjp-+c6>UabJnpb z(P9cw$T^pg18De!yoo~*^4Z}(4o}sY2k@imY_8K(QEzfQ@HUTqku47wSd);PU4lmV zI*!fz_lCcEUy593v^DMpam!jr*a+GM?(m1cL3(ACi*RP~QjHpN{DsOvmUUbBTW_77 z4c_o0)baor%SsgygP<7iP%4=$O3<2&(-Ee1gr|#BrsR-k-5(bXHgMvanP9`FbGQZn zKO;&0n+6cH(Or~BT&NKj{8lv3Fk8Vtr(hsNC^_x@X9cT|62t}h^rtgpRsH;0{p(9;wM^G0$rE* zTt~V)vQ6y;_;&(VO^af62ObrgFSArtx7Zktapj-z2hC>|>oZAPfw19aFgusGKofE~ z)|IfWRk?`^dzY9&=3bo|W72=DT3_={r4~%Bf`X)*{NawBQhWFyxT^G}+^WeL{cB(z&gX^p)s~}!P}y>E33vQ^si*X+ma5-NK<7g4 z!GwZq%uW|MKVIe67wHK+=UB5w-oSN*G3^B4?yH3}>PUiNk+qq+O2n4-ylxs50U*%d^fbbc{RZO4RRN2sjAGA9z$r-6NYs;Kd z4oGY125022McVVTHf|{utn-VFe5Ze4FioQY#hlh6Wb4$j=8DBX5>p_ixuK_Ouci$;je*>4U?AT z{s5fGY01{fn4)0_byBMs6P&GGW@(HFg}3tG6sXu|!xSu(l}GjiuNJO_A37%)fhKgk zwAjwv*rQ&>H$97+ww}p-oX2z*kJ#08SNl3~+t;?i86P}W6Fk?e{9U?~Xd1F8t%$SB z>9I`$wZd|4x|C7xWv*wAs+2`R&Pb>}%Yu;7XJm&O#cee^eq1|#vZA0#vZaj{hyviBwp+s7^?&< z?zfohs1tugdiEAm+kVC8SDeRc1NF=S%G!Q__JCn}5|08Auf}<0!}x9P-zj#dES2{2 zky6*!`dT;nZ$9%)YA*9%?7N#%dlJqkw3f;e`Bv$voH;K|e7{32O_0IqAl~+m3<+JEl{{I_YkHXR_i`h zV8U~wh3uNf=&g0z@2o3qaQn7?^Wpw>f0zF9LWm?6K9zzIDGc5|m{42H#f}#gI-#sY(MGB@tw`L=PR3_nu(6L+XH= z?MdF9LwaH2H;p;*70ZvPcN4`i&py!5Bs1;rHqeO56{)_9Tk;lYpSSzG(qL?Wu?ug# z<=q#>m{1%T%>iHzwMgP=j;Ney2a&yB1Yl6V8q1$k1}0s^dU&16kJ%*C~k(Q`k zRVL7Lh35P?cnVR`k`8kpVl(AeMlG|?bbuw~KBTpySH?*xGJ=^_U@E2$WDW)DZW+F)#kBGu5!~0bZ2p!@%P6pQ z31K}vg{408j~4hl+lk^wJr-Z5tSdf8593&EM=p7;B-5I}_Im)QH&@Sg5>^JWZ332= zp*r3o8Bhj;vCYM*5k89T-XDV+w^e!j>7jv?~2g$*foRt zG_QMN88d;hOg-u#VHfi?X+|q@(1*HH+0eCJCL;9lU@W?u$+`OpgV`}-lS;91)?%al zGRB0rRNKrRDh*9H3j9gIdSvbi^%l6!)1V4xa>gD$M9k$@Vzk4F zCo6EgW;_?0$@7j)u;1D+ zUIdI4&yHuGnQk_eB^btzfV*!v-FMi6?O)oV713vIyWi?S{w1ol&QekwXceVIac=p8 z$klF~8hap@An~zIKj}OW6Z-*la%sc<;rlR@M3~&y;Dq%EvJ)+P{St=$&t>Jt@2@nsn>i~V;ZvrTzecwj# z)oaFr8N=(3IkQPL==M&Y2TjcwjK>=a?Uk8_Vjci>sv!;D-WtA{Z^`%hRYf$y8i2~iyHnHk#37gp7WCs(5gYWTvo?hG)N zAuAd9H|)u$=Y=))h-vpjR$d;?(AsI?&QGr||KbIq^>joJ$#5k&b-GQrM$7)k&EZ!E zc3`Lm!q^Tj-rN40lNQhJ#+a~~gaGOV7}^z74kwcTdEPRXKJY7x=xz#0Q$6U0$42WOp)3V%;QU zu2`L*k5ZCY3xh4rE}?h|wvINw{-B!|gr_P-7C)Sq}J!AsjP#qe`0Ay7mO^FJo zRY4|}>rTZU3r<|qjmg3b-*>`}8QgJ8+n>Ke)^gC|%%Dn{PBHniF99|?lcIFRY**ee zP`#y^Q@}2`;SvwJjA7M&$4y+^oF9ZQbsJ@+N3WUWnwVTH`maeVUBb#w;V_&F? zmO#-u6tK}$A>jbu7v{##&Wp(Q%aYz#ts{PHiC@J}9ked}ao2o<=o!=ewgp6C~a=mMK5dRg` zZzYI=$;C8LMByYtNpJBpVCsCm>$VntQZM+_UX3qqsCJ%CoHb&jN!-NC9PVR@!CX=L zICqB~I9dJD!Ed7g$l++oydc8d;|ZI*dh$^A=Z_zdMl@7hba0kx?DtxB<}kGY)*E+Xh@okyA+?$2~F` zAUJhd+nHzPO|yx({TreVX?2k-5*T_rm50uF@$G-7<}TVvN`ViMh2X)pWHh}e!^HRDP5!o5xdS-fM`QiJdB{%puXsqu z^#AZsGIoOnuKPvx7B-Feqz|<27N1WuuQjh5ncHZkqm3vu>-~juAXG>_VMQjO2rxjK zA7u=E+UvodXYDxgZg?!075;E1y)^dzF;weD^@Wx6;o`=uVG1ySy(?|k8fpyd*J$?C z+2>23BU%<=T!&UtRv_xhFRUN-FY;ykI+tSrBYFeI-}Hx#R4z+sxEG9E*sxGll=Gbt zhxf7$zEzc}l##gT&~5JveoS!M=s6o%QGz=MTpGVrA`QCkvDH2gB{8Fmt86)I2yfbk zuI-NsSKrPHKQvEJmS}9&Qmwp(Kny7dFot6EEWmOwX)KZU96+DeT~AL>Y3Qw005zH* zarXAdYvt;@|?`%;K_U;g0iRk7*xT8d5;F z%gGC=fSTgU8)1htaE+JaQ8=;jDNZ3Uuwjn?FFF^3bWCo?xn&g}nHZXkcG=ZN`afGv z9;~X!oJuGdFht+9W^wLIv-AJ~h%(7&0L%nc0m@1Y0I)Qe#xHJVEb~SsG3d=2k{c4( z|17SemREzN;o5MUA=31*rsSS5mW2@*WNLGEDEJy=veVAn3JSh&gOM^YMp;jgisLHE z{z#xShbEsd^9--NugWdy2xD*z$}I_wy7Qi}NY?loP!Dy)TOAEnX;z}J07?m62rslC zw>tQlCFZTItWYn&^jOki<646gH!mx=1WHhO7AZ?@-1$LIx(*eNR1N0ag=V82ev0IG zu8`z={TU?n8Cw!>uT10{Ls&S0Aod2$&r1JMB=eQZf3)fg-{g-;$pa$}bRK+|&5m zeg`Iw=^@QS4@Ly%8OeiNZ{$|vOtrs*ku;w#wI4Ua@SXp3m%J>hZH7a+20&VH<}w0= zjI>z#c<_vbgDmb{5Na$JrvqETp1<}sML{KY)JfhSrdd!rVx8}9JrJF!XnMW8JBot6 zRn|Ank$MwxA_6U=mwx+URu|XnQSh^ox+KstRrr9x?|Xg^TRwq^i>PrnJnuJFUz~Q5 zk1ZWBU67RlWZa-nau`e@DCQ=e?2mX=-f-DeJr3YtaIhkO1mhPsC*V$-4siPSJ;$-S zr98vii6%I6rhp7P0$H9{F(O$-xK~1tle@|tRq-{Gnl_$l$-~5MZxLwxfuq(6Q}Jw9 zY@S3+sPWq3TmMgsf2AFXYF-RT4!+5`4RYe{WydMjop?#tquj zZVlwTzY{+(CYTIA6Pdd-^3_{LRmYRvAIyl7FQkr1W&EUv`~6&;oiYBrC-eGN=ltEm zjxX^gu|)z-gMmRdWAx6cavAqvjs4{Q;_=S#Y0vff9Fmq7hV^OZow?{#KHPWmeLs+~ z{3vSPi}hZ_*n2(svQ4DdF`w`}MwhXahSl(lL;s8#5#&p1P7=Kg&yBqg$vrs$#J<&Z zqj`7(x=%S$`@XiyN$H}ot>`xQJa1vusSGpO)V)Ma2M;`{3LK4(T?wq(MiMOg zMP-G*99+e|Gmg!`hr8pKFwvakbyC!%mdoj=cWL+iejkb z^o<#SF7I9eLF9}N=>eS)SO-B08v#;^#nvK3 zg*R}Rd06nHoFy8LYzE3{pemuT-OV>zJD=LrS_2k2CH90WE8)oU_$kJQsX#MX|EWey zB57mDQFTqn{ev+<9n10-F_a2J{%;wd5$3))}v(CFPcHIgbX zQg_y>gOGX!i)jpL8+#$q;aHY7VF_@d-@KqcG?wYoM*GF7#_n zrLR$ivlo--X?H8ir<}}s10s(ZT_x>cE9BQ?Ihr~JT+T^AKVv?hyd!C{L?%f8aReM^(=)_B-ty<^VCu@!o--HH^v+$e5fnIhMB zJVN3C5VzA-pO*X!(P5oOOnE3acsQ)2lp~k*0%CGlg>sV!QdaF73o~o%#Cg^Zvz-bk z5Tcy9?MF)+jI(!Rdc#8=%XH2cI94obe}jpDn^WD#E&R4qtDC zJ!e_rXnYQZ2YAy~>h)t|y0S9+oDFMNn{y@E6IMC*_;wHY8nVMc2efVJT=qR8_fKMM zrV*}cC$Xo4rCj_WJ9`94K;ci~xnH?C+L-Nj_Hii^odk9j78UxST?>j=t@~HAFqq-A4`)WlA=Oe>8u8cN zM*!P%n6#1^Yi4buuqr3HHWnKa*x z9pTowjLMh{fltP#C};Stj6wE4&;!o%o@2)Tq#c1^4^;XApVqwa>v^wB?WYGJ*Z|`g zXkn#Rt?<)1o0eg5@i8DT@cQ#3onpD#LZfFAmp8^Q@5x~Cv2+w}4|8C59*aM+VLPPw z7>5UtBU(ho(iPD$;QXO1PT?3v#&NvlX2%2R7~Q{c6JBhO1`L`RRnYym&pDi?EY!hc zKAay^csl!tZamsLkwL5yehmV~F*rpMWVceBxpQE^uab&N4|i)D5xov{N< zb|@Hs0i94_`_n(Ccyh*O%se=|+J^@ooy+omLLSO1GyFF?GybdS$MF9cK6OdkzlQH` z^m~PkqKIFFM4Qb2C;ACHQhJOIj_I_AazEXqCJAZ!7$;E0(Xfbt#4r~PzPzlVcf;7! zeIA5>eOiWw(t5pc`tsP;^lU=&{)7m!u=Al^=Y;G^L7B4w?^fbo5BE$j8`P!v)qdt1 zQFEzd?%uy_;Z|XDT61OrNCzw;`6GXg_P0EE@ERhsg8}G~Mc4hUbj%s#&(JR_Q6Y{c*m`%tMbIRhnRN zK9J`uH4#WM;mXP1tw#Ca%z=Vct*3Q=ZUL*yVQNA3aW>V|zR$kHFWJR1lxKP!0kj;z zq8?swe1~{j`!^Y>T9BV6n4?-y9yK>=KtY62!ct4}ILu1|a5(ozU$*yhf$>V;u!?Vd zhEU%AnOb0zRWoGKL;IH6(9vdq;!q_;q~+fnHvtYmv*aG-LFzetl`}HLj|KZ(7%QcD zPH>>sXEZ}RH^qoLH+ae<8#!$eIC%rrPzCYQD1c>&8M3^;zOL;cizc8dMIc>GMZ!x= zk}p)oyw^!!EaX+taXzjU^Ppbj;+G@30HfpJ)w6hDvMFOlW;3tUrvW{G5ylx0$iVY1 z-i?C}!%^B+s2@hHX03sZf!z1IhdvzA$uedF#9TjSG%If67vq>*oPycTb%q*+d_`v( zi9Ix^$y=}IP_(vxlL71;(kfPl++ByiqI6VCAd!d&^3%Z&vRpfG+Do8(g8av-|KuOQ z(bN&3lk4T2FSGhIk0O4xcp1*e-O%tc>kPHapS|*oQ<-;Ar|1y`Vi6-TGX`RQBLhEZ z8y${)imLPYGYq4dQS9x=nmefHYfbWu_UL8w3&)!l8twxZWoJFIBJ2p1Ys%6hE3Z++ zNh_@+le*M!tv|B+w2iVYoEUETE=%G&q{DNd5~GBjTZ%QA&=r~9e;1Fk zPMy{llFuX@<#eOK25f9ejIDgS-72hSAg*v&m9IYekuX>SPf9Lp$Z{10)tXjM0q-&s?%$`_nbFwtoH#k3`^YBk#XIFY5p#y+6>^p z4LcC#@YmEGOhI!$5^n7I@GCtc8p};y`&I&Jsnih{Y)W3_7dPKSSuK6@#`t?14_juv zAs;Zlr06pJ%N?f)u}WiUR`I|JzNyvr==zP3BwJo|t7t_~Q5)T|XR$+JgM)|o=4{h` zNGU-*>oNR;H*sIr0~x3;b3K#1cP_FrRtiwUWao44TJv+q3|?D|1diAHHx3k_sfaEP zzsh>9&pWI(QhVipVJH2+V<#g6(|;!0u^3ENxULh*_rJGLls6&JPWAA><1*p50j{C*y9-@|Ww_AX|IPC^H6 z4`$fn2w;8Kv_Nc?ZtYjycV$_zwtal(FuImeUK43Cn?oX(ah`p#e2%vA*Q!IY)q(*h zM0TUEql2Bdqe{JCYd^C8(f0`rUg@geT*hZQ4HBb?dg`Qi&eI{`{NnG`$sm)miH8EY zu2qr8o`;`AvTNtX%}cnZ;|swt?@CTe-jconmynhpdr2>(wu1gX;abAfD2os*lCs#7 zvT)T;K@l-o2>TTGa#dGObrD`EQzru!i*T5-f)eSuFasz2zz_qe^jlGTw5Or6flD%L zd<*ls1GWPrS!FfSN|jK)8|Zw%Mwb2jnD<}PYL5sPe?sxnAWd9)Bw5L3`poZ681z$l z$hi^7Kh{ZzX)z^Eb4#)J+XgpLm=13rx$!q&t;hu~n1qn6PqSzwH)JeT`fSXBr%_9Z z6Tjr;P^;EB3y1ErLcB16!fy6k^A8tH(CfiY_n(OBckm0UGA{oR38<5gok-gElLJK) z<`IyOtOQh)XXL>MOSE!WHi~gdupeP76G)*DQ-d4y4GKtL3D>mLT#Tq39E#Vh&V`X6 zjzeIY={S5JCL>*}ga6)oWq2bT{oNB=usw7&=*k~ouMLw_OaeL?mmSa|jQPvh%&IxH z#C&o4vgXl*O9n@y$9evCMt5Jf zmeW$51}vtKC?!PBA-!;@n(5cY-s9W4BHNB|8Xv{rPrw z4fBI*Mp2iWS%B1Uu8v}I;)SBCH|R#cB-f@oO69%e4d|U?16NLb@bB zjUhiwmVD9>h31*2+Usa}{FJaELw^9k%>$YF{`{@c2(9Zu2pan_{77$D4WPktQu7?! zsjNA#ekl?Q;ZUttHG;6updV$HXn+a12dqnR3(ev!PP7fI#^p$-rf@|yHcF*3%+~&W zc;n{MWU3p=yGLXD8J{hW4#6oMni(M-dYu)GojcZ)FK)`Pb`&nnBK#?7QwFnm`_Q1H zH$@bjr_g0yV2FH_n|dsntWjj7b21>cgahwsN>N%QWIRIcvp0`SU(Wsn_I9>X0SPb3 zKeEbFFlWCH_6Sspq~@Y7Rtaa+p|E^i*BD>+DA8DaQ%|vZLoW~jV`a>r8Z4^9b}>Sh z&!P-8%t=)cD3IDeF(OO$^e4_Y;TWnZ6xGQeXgfwHwjZpOL)7mJ>RhJ1if{fNEYr}< zA3m_I7(?H09@ifB?-08#s`c5P#P)rj@i-ZnQJ*KE`lgb+cZ*6(lTLPCGH zCc1aTVZGgGy`n-xe@q9?_Y;W2uY>*9t|4xW)KJJ`&f?(`sU=av!rX}HHf_3N-KDl) z_ZZCn@d9x&$u#-^^prUPE~0oG)y#0|t2>De4td@X6pG38rAxa+%>&GS&J`}+QH{#~qyRQ9p%UTEf5<66d-dF^Q0thn4^ zepq|mdTsc!*Zgs3x&n;M^?LopQ2n4154m;m_JUe{C2l#8%54!%_kH(nX*x?GN}!gp z-?Z#ByB;XD=ZWSC1ZTutjPH5;A+K}y#qewtzSCdY=|>yaDm8lF*l2Fz#nQlW|8=J9 z)Z}lRl}uDU%U5lL(^h!c>pBV%=3|7&JHxPsuT7AM32`G9L7~uB0T+^j6xKl1kZLJ* zILPzO^n+3;l$jplL|qL2_b-~l5=>OWJMO4;5y0Swh=4|2`xHrs2|C)oXMYKQq>4mI zR2k8{un|Tz(@P0FUe+-w_U70SBTIl*`%7U3voPRch*&G*U=l1a4CV~S{8SvnKI32z zo$(hzZfuh$orXJ8diw{D8~QU6emge(XVUR5f6h(evO}5uz{%j0@}DuTa6Z!!oH9V@ zAK_U%GSf(LVaX~0#*wPFvE3`E#uN`Av~9r2jHGR^76GZ06MBsrB6{@5a#@6}Vi4s2 zkFj@*lBCbf~!lZ%A<`aufFC!zID~?(~#=f&Be(O#c2b<{R&A*Nv4i$!_!TAH=_nyG3 z68*rdgbg`V@=hOO%6v**V1o~_9x@bqtS_MBi?vb_aXMw30oP&eEVd}#1cD434)~-8 zGm=}_r&wS!?LxsVWvClUcfwd|3SqpVM4i{`e-3q;Dgnp+GnUUzh?h$`43y0@L_2(- zM-tX#VYh8;xZ`ArFlH{gwYoV;c=9emzSQ)kr^7Gn367l%_wsGB%ed>83h^g=>e&tI z=4OIjkY_vgboIfMx1emfMs_1|SFsB1*!RHYV_c2qwH*RG3UmuboAQ-Ldm=|SWg8@C z(uh7;wyxrPrA8B{;7a@766xDwZ`;6eG3e83ENrfE^rGX?q+<2= zE-+BcIhOGs9uI`>Sx~YoY*jgwkSaK3@u%4!+mreHIk2J4fEhb&3Or@@(DS;Q#w)IS(srB>?HnifCyfrveVbRI=L**mYgsi4E8Y-! z?zbdj6!i&Cmoq)8{;fRO%gaJs6|NS|`44c)ECVaFZG>F->T;1$iakzj(J=(WR0Eq3~{+53f>G@YF&yy@-Abx!VOR z`!$jENHf6P)7;K>-1lam&5mG?Am48~f3`mH`nT}Co;l4V%LpajX>}6)8D^%j9CnR5 zbfN7d0BLUJBRj&$NuLv=PQ7b_T}-uqD)~`jFd#Xl%}@PC}KI zXfh)ww2Ua;FP=aYFuzjm*_$>3;XSfHty}KrwXK{5FLRE8ne7wcFi(_a1bYbO=|>bb zb?1e%ioFgP{qn7lJ8?L#rrK~O?2Iotsse9Y8ck32Qe1vET|KExr11WVrK&hfpu)8M zIPRsB&5$xNYNAPSjLk8-p-2dJ+R;1t!X}NtX=SC1Y|Xn8w;_Xqh2S-J6Vkec~FEBi7q{Il$`nV=k0zgU9KKl!~tYL4^~a&9I;_*0ie zt_aj1C0tXtyA@IYkW1&{G*^^QT|N!Z4W>eSdX+6Qw~no|hcvX<%Tg8}PF3GH;4J8F zG7XQ?E`e)BH&p^e=O$n69gdf)Q+j{JLipazOju^Qr~DeeDnke-zEp{f|7M2WSXu5E z{~)0zYQm;F&1lG?7c0bu_kC({_t^cuM9m!ITw1l~d&1vtQW|EoWUMiz+|+Nc1%=B@SF79knW-D310Yt@P)r+xDL~S?xrn=_ znv(qk0o$hLIPs)tR69F)cKb;PwS7;iszXGUC~+{oErEu)(u7BqgjB8DR$<#NI9&Pu zp-j4HTap1ROE{O%RvJXfp5%-Z6yqe$TrhGA`J+(SB5cId^`Hfow4%Ozn~ZU6wX@cG z;A)=QZ8ubZ%cbT!nKfb#nx2t)hF8iNyVx-MGtAo5FC@XHi>>*d z;n@fzfEeOHwQ(}fa3-N=M|gInpAunOc>B*24>~um4-~c~c!0Ok_K0R-fYB7Y&zJ5@ zsB`-C2xqy3u_e6XHb-P*+wOb;QxYjtOf9jR|5VK^&fA-|$v{{67UmiWMuTSs|Ut3fUtU2SH>!<($mrt8q~&AaR67+cWQE z4020)DEOKACA^)c_fI}N!w-lw_L`B>^t_t*vuBAwY4k1bdN3DYbBYi}dw+fbD8s*j zs)_#{YW!y@^}oBbb{rE$2$1eepQ-2Oke7rDc+AxD;EmaxX6O%JD08nG;2+)Wg zpG6$krIVT+sB(rG3hze?NL;nnrfco42|HKuugr8Ba#+VR#c%|oK~ zKy+W>n?1X5;D`^x&x+$X6UL}?7u{gH%k;*3S0VbP#Ji2mnA1`>&%3N@q_xd!Az|)3 zj^avNc`fH!A4znYDN0cQG4x$0v9r?x7ml4OhIYgo# zMQOh97eC5qWkCFs6~(b`T|y|H%N2_b6!hw2xkVqmV)Qyr9K&aqmeCyHs6x}Kei*Gz z7ofrGcJriR$SWwzF$BX-kVP`D$-2P1F_M}SIt25YEongS_858`T* zG&7?#4H!4>_1Fc>6g(%SL*Mzd*N`BJKZSM9BxI5mS=Fw7V64{|ittQN5$IV#I#4g@ zWmXCH%GMy*KCwhOBFh?G%Km^}k~?SC$aCC~B8}5TPZL#S?q8MJOXEV@LPXVis2K_6 zrfro;$D-O!S#=}_m+>ns@VM=e7A{}h(^eWnTr9Y$wCYGj(y`fNu$KsYmpL5ebXCqP z1yh*xm_W{5_X=XHd26+1BdEVT|-%-?|xi!Bth)o9*KOfp$opl~5wBGCWWarfB;w??rm$rO{o!~Vy_!AC~M7f-EG#2r~J@m>3`Z-Q=8egbxRLt>91?#)BKoQRf?Vp+qCVy?#6Ci4*{c)u!U*F&q z%KKwJc#{a3s!JatF?(6v7R&gH>*Mv`85UC3Qu zRgv8%yi+>BQ#R0?FQ|lakEJBMJZ{7OJm>}Quy<-6V7cp*AA0unHtC;D zbwlZmA}4dhgDB;eytFay)bS9eHc*nNi(exdz)6>_NV$8sn8MvTlT|j(Q#98(OY58J z3gx}b`MgN}O+&nyfZ8^=DumQf3h_9k)Sz% zJpF-qtZp%u#&INc-&4ZbrSmOKVLWKiN4%*^YJ;-tYbCN>4gc3~_C&U=tAB@G|Cw4D z1M@#}(<=>bdu&FSop*pJO|=xsBQOj+*aq-+kQX)Au-sM&CKI5MvV0(S!oBI32?ri@ z=s+Hk{Brv!syH`EHN>w5wx?h8B+v6UIajy-zNF^+5d`4k4OCqTdR7I;SsexL%Gu)k zRmTY0!vOWY7FfXGMBmoGc6^R*6fCh>ffX|vsDi4wz|+`7GF?w%JY}W)Ed(YL`CaDj zb`kNWOe4`;RWlaU@I6!ojL75-cN_cq&&^$Hh|f;lRcLUw)vnW@9Iv=^i)*LwZumLB z2cP~R^<6{t9f&LF^tz_xe$qn*@LnGGAE zAas)umP?q^eynzp5d2g`OA`Cm(wK@2+vBAKAxQ3Uux$URyPY!aqHAZWimw5uAY7Pg zH2>Xqs4A3X!x2QVn@+E2h6=vE8e7l>qX)pk(F1ZDs5XV_sYLz4^yRM{Y zPNZbVAU~TW4D>8im(@(ak_iVl=fgkyz8w=~yPJHQr{ogTS7?ilmkYNXki9H2_$1Je zfyc=yJ~E6E3|1yLykg+=h!Qn79G z!Lp=L#D1;n;WxtBZHA`M8W!@-eUSfZGDqtA8{n({# z?&=hZ$@aK#C3hdxGN)6d^c0gaBveJBkyxp#O2>@40xChuFAEl`-(W7@ath08U7a}-Qwrz z#O|!)!e%kb4yaL1qxi`QZe3TfR&`TVSD-P@zQtam5$qMx-PI3eIwGapm=i9`XvS3K2M+g4_Yoqg6-3=>eYgaDlO{Ona2C|kiHl1 z3g*8OLN@_5Jm>_%EmD`U)vqMZ(S8nE-iI)4Ir>H$&IK3Hk{G zmw3N>F9r8^@)IJPKWm?}8qR&25rh$X zT1#O)=h83?vJ~jO4-!Xc6-8PdB3K5Nf^Ju6UM|B@lT{0$$5%G+J3_Vz8(}Llgm4nd zv`PAI$60?Tl(#*me~y^2?Kn3WvgpGKHSoP#p3&b=_$;5p2>V7&(u~|Q`DCzwcA4a8@eF%>>KgOpmnIs5 zV>izHR~iMoRw*?r6b{>};yiONxIZIztfJ>d$)xkpv7%E*hA3$;y(xjBD1;mrSv*SB z$5L+BB{=L1NTVti>`2msXbYy}TT6f{*s~vyfTK_1=Au!Yg{jWM6X6^Kodp&N^;Q)- zXXP&jY!wB_cHzn$4gv~y5ExqM$m`Uk+$FUf>lOn}fS2-te%9VDdfuUk zp0+&4P#IPUIKd)E^KQ%j$j6wR^EE_BONPTx5oJSXITs`N;4}X6~#9>ir!AIfWNV0Z_eQd?@N^=Qj&GPb=Q43D*&94 z;`01`?xDDIzE{NMvDc+Mmd2kK{WpTyeJ!+r(TTog_;mfqX%Q~7T?Udc?yrQXKGpMR zq@47ix^c*bgUg-{pP~V%55D?QHH~F>g3r1AOrICie^cx?DwQ|dY3cPpzHq4_em{Dx z(CBCdgfQ>N3obok*eR?VUeJ&|3)&Ur+ObUOGe->CM+8-D|)N^8^To4ki~pEH=rfQ@_G~{1kLHEE%aZ;KX;yx zSv^uydkj1QvXWRdf|Nhp{rSOd2wLT}7Uw%5ddQ`?itjYM5e{{yRSwD?Xt_ZQCH;%1G3UZ^?W!IMVa zykC23kC!F;IjMq;nA)9g&HVLLnKd?2QKj&a}`de+7j4q z>%}pW!Mdc*ZI@KUO260fC>GY5M~d7mukZ&N{adisOSJRLCl;RXXg>*hN2UhF?mh-O zZW5h~*o3m|&m%tyxHN!|+~`bpmyj-<_q7Upd=h zakAHPq=AlVh!uus=swLpJK^*MI%IWNw3KlW)D(J$MCB$3SxAs7wTj4ut8yqokTCC9 z6YoNT>D04Jw3z@=0eVp035K3TIMKbyru8~ZCb}b2x76eCU;hJP) zcfPQtg3`um(?oF7SOVsH2#4(8G5exOJ6O7SuODLQ~Wf(Ol1TE^X<&p1CDwlV9MXUSA z=DH7mB#U2B1QVCTu^Xza#9a^vXMQ{K;I)ptWS-JA;Myf4A4Mm{iQ&`NN4&_FT`K|v zBLZ(qAV2U)CPx)7+SxB`$)(<)L)@YVM)ytRne!RX`wm+#iqP3lj(64|J8D8*j+E^ovouv!&jszSAe>g7aKGw`jI)WY05u7aQIgZw@Elo3!5< zF1D8?-a334%Jd^8m~^(F#wWV$Kj8Ivc*$eAm&w2}420tcUVz*zJ3+YNS*3zp!Pu%e zukIsW$%upFE)%W9hs+=;1NvpwsK5anLib zAM@l||I;^@0%anC#4bV)TdZ>?;aX|knZn{>!LT1dRUD>IsjjwG9@Bj4z1DJucgcc6 zv4qi;L@g~de_EnOD`H3BWTUo}2>B~B6qkicQZMfyMtdLD(M);JH``x)_1LWLIZ;%u zE1sCqS%dYkGNV`2vbS4%(fKifli5y4ngKUmx28bw3>L`D5}OLlT(S4eCdVTWy1Vf*OYThLy%IDLmWsoJW}E$F}^DA{Db zMxL0al<-=n-KjICB>X8=eF{9Or2{2?B=tz<8g!+k$Y^`uKdxd zsUfg6egkNKwp^un)K$CoSHkDj!`Cykf22R9Q;76Ikz#5=4ru!*L(X_(pc8SvD8x5b zRi1)9XuA!U5U`H`EhX}Ye>wh8+v`R8d?IYF;6~{oyWcBjOG(p`D=zH*fVnd|4nsvd zzD>!%FF_E@9~RVbq@o;&cu@#%Y#N9mABvGG=_Ie6C8;w+9v8l(FQo|)bEA@h(Ym6(CpQ2RzZ zFU4uvfhWh!T&OUW32;H&d_P+JmtSuS3XF%RGJ6i3 zHq*RSt`G0Ky}-s*m`MKyOWFUUvJ)rUKZnpVd+atD5CWe0!1ViRJU>toJSgVTPSKXN z7Y1Ul=w{+8>UOy!lRe##mues}TH+xRDek`b?&OS!^g_^}{F@;H`lNVx54O#D{Iaw4 zLtumv`a)KjM99%*B^0!HpsTW*cVuY!N7QdA_^OBB<>g?Ue(wQfCu8o_z}drBo;HJ( zo+K$_!nP?)4PJd8MJ-N_5GLvyqLih6v?$?~LjzR6gskl?T`;mP(dMwdLQX!Nei82} zuN?t-eB%`rM61ie^)9uRElS#nqrO{!L!=@PP81WqGO^=4Fd1ex`99ufAnxnOz9IOg zOXHQ4t`LDKAcot4fek;Kh|x)&fYM3gg|Ugt(9q(VUj(z`++m0@bK48#i z8>{Vz63GKC+9~Oq7G(m8sS=$p$hij1aN6mr`QzPP1dBYBy;ERPAaMhxQh=EBa0=p% zhlH+U6g0~@{UJ{!wH_CYuT29>_yXqrt&GZOW3qf7mAEw6WuXtT!H8`pMbSaHIei(4 zwy)rVdBN#jxRAjnsDU!2dIIyfg@8+YrjPR1=@!KMlBVAG2T6=)7ui)5;#oqUmJ1aR=Y>Nn>J3fYAF5jF%Yy88BbUhoMFjiw+jz);53Bs z6dG#rr5<(Szbpq1g_0`RPH3L3$|F+`3{oPVy%O)#_f8wUD&_-?rCWY&V2V47(&%ac{=yKG~IUjD2$6kagah|BoE`V0ZUiL4rEQ{9y z{L~+Bu`Uq%HW`3!6|#G-<{93E-|iI?=8yQ|(jeso)@Brm}8a%|k= zbUY0%z__d7*VW@Gw!jp8AIrwvJsxjf#W{KNAQV3-i351)0#=dZ*uC<0YM*SZvgp1J zX0f?Y@d)s_0o+~7v}7qqpw;G#0fa2ku{It(DTIR7g=oF8VhE;Oa>pj7dtu88SHjqf zb~4o$*AB>-(_dU~l*t3K6@4nT2iHz;#;GwUy=OXxm!waBp~_EBsVNf@2t1=@F4cbGTT!3`tnp^w4cv2wsKYt_rD?m z6T^QLRdFzJ{3CzSB0xM-;dJXHC)aWjuoQ{ z4+XPq;=t#q?5)ynIV{-g&qPIW()T*JvW{GGTpgvbcYAK*(^-tE?~kJdmwouX6c^oc zjNEFG9L6&3tfRtogO(faKfNYfggZo@v!7nk%F29Ch=1#H#G<|g_@u!ip5Ue=3hx|m z1YeH{+Yy&Qs1gS+SQOYDdK~=_6O%Kv5wO$GFFc7GiL1WZFXm2%OvwP{+Mt;6pjc__ zm=Ix0oBO2_`|Hh-W-13*WA;|%(3$+`L*ZC$e6{8qw(D=b^DvdnUz8_doph%VhGai7 zV5&^ajS-DXafz;Hbuq@%&uZra-uD?|;-_+CAcl14X57LW28F?b_iyu)?)@*zb+Fw| zbXj9!eWF>o1nihQ7E0f}LsP|L#k-J1W$2ZY@s@FJkvKb{k02zuwPK8I_9%D|a2yZT zrW1xxI$AiqR{Iq_6r4l+vedIUL-QBv&~PgPi+&sIhkF#<-U{W3>oHkr*rqVgM$b9@ zy;s}I3smf0bBwiPu`!7FufVH*+_N7B9iO>2=90xA zwG)k|apGQzP2HIuXXplJMNiFCQ=z_iXCuQ-7OCmR+_9Bz-fVdX6PWDSnR=-G6*7= zI%zhjm5gSh#!#116^wl=w~fs1w537X$=Xw&LN%}bs;l6+jbIgG?v_;pMQ=!2sDf+g zqK;&omQhn|8Sx-7$#h6sutLlEoj(}Iee^-S?_Msjn=r8Q-lBQzb<9t{Zmw*D{l*VO zdvfO6zj*_h{-gh54#t1hQ2zM_CR0FCIAPSouGMJR4Z+E7UN+)+ZCu1fUoFc(X;`54 zOT_$)?;GZ?$RnAwnrXTny^RCZYF9Jf$$Q^s$MTx)*4I=LU(LrilZ(!Xv>bMLGWH5# zL&muMXXKr&du?V;>=#h9A;xW<$GiaS(GeSbzikfm>zsR^kQ`@-tldrgQSnC7DC1A+ z1F7>rLKx3QrAgz>>1Z?Nw zD!RZV9W*0b6n=>yjGI}|jLr~3U|+gmwP21&exDz7m=m|GhQB z{TYhBK$21e5KoBU>~6wniT-P^u%T~lb<}poSan{F^u8fo5M)E2{izb>uq;~qwuKGs zjBvC+2l_$qJU#Vtpxl7*0zT2)qrr-K4 zHKrppr4-Y#Qq9=XxF1U0rfK&h=e`E;nI7P_iG8LYl3K(GoPtFvY|wc-%-MT z)DF+S!vLC9&)SyhTB4Tg)b;iu2HURKijwJErJ-zPIwE`27Tc7sKelCk`9jjWzs!9y zsWBi&DZft3G)5b(ZEyn2dV+S`VR@9G-Dms>bf**i$^>f8sCe;;M7>6Nr0jOlrUS+e zh2~`K#_C_PG--bM^QObojZ<5{{MFrK8!u9g|H%E3vu>aplUL(r5$t8UuPC4T9tR#)%!6P z!}vwM?O7CXshxiYkwc2(I=q`!!0@y8^8tSrrE%?F-?;zQ98vLfFr}9_vQl=jrI#aM zVqgGl_2%U4Lcqwu%=-V>^^KY3|LC0PXwTua!TR3RrH{43Ybl~jfdYec^xFpTfkx~` z^E6i|f{K2kRzNrZ={-5cp0T5`4P+~_)xoImX~V=zC>$52TXnt90{s{e-V#cbT|{HG zOKekdMc!WCBr~N(wEtOi+!$f2W_rN8e~;#%4B-kLkL|wdkZlC0T*+h>3X67pFQNaDM#sc$EkK!RG$5xHl9=M zE&X)$0+rw90+>FE5CHlR1}!k6>?7hp7wW+jTPg%xC7r*DvZHn>lw{e`DbzK31d4&$ z=6`C4P-a2#(IDW$Ja3jplztZpbxJ|Nsz=R2qd_8D%ybEsV8s|9m>fz6M+ElN@PdpN zS48}S!Nx3%*IH^ZtcOKlD1WP=OzRWG4LgNaCs4xv(x?iQ?@>*>pVCilHTZJ?tR87C zo~#<`2ow&Cu^ppV1-6%XP51tRxSJuO8{>uW-iU@^5Y$Cbx*NLIh{`9ZC2gD>G3o~? z7@g@T>S9^9hZo(>Q(#@g<32IW_BS7?2g{fIxrE#aR%+kGoA)46$wD(!D#=0~8pOF| zD&BVn*L~|rPy`2L*Kh}|iHEOg)4^c{giv%FaF&oWQssB4&vqNe%bMSZ{l5r-q7gF9gfyOo}R%5-mVf4?rS!I%wwV%e%D}Ufb#y~+7VSReB>(YeU6>=l#G@2 zM2oA?r;x5^@jaA)4C_>8qT+0NHKLU=8OALqZ9*SE6%E#2}Z@f z(n-6F!F=03czL%M3LX>=vO{135;T=P{>IZ0-wNM-_fq>4^E8B7(K;)M5Gjd@7=N5-4jrs z9h*h&Y3dX?k5s^W!D^jToE@V(SdWEdGh0weG?qlV^`kqvsOgAaV{E^altt83_}0II zYZZ6j;9AK3#F=#X77bmGBI3fUe}yzk6NH3Jn7tCusm9F++W!7(Ma&JiM&Y7cRc-Bt z$|{R;BQ<+syz1B`Z2B{LE+S+Ft8nvmqA4^Xm&q3eyah_c>An)e?!;P`Jdm{9p67>7 zMWbg}u-cW+DG{+tP-o4Wh)&4>D@T;>Rhqp0?yX=e=!Cw$-l%L|UcKv(dHnMVy!@{3 z{qgq2l)8R*cemGloO>GmpSySdp4X4pUri@r^m9Lt$uNmY)XEDf7>XYm6;(-}ZYrg} z9+nlv4HSIXKn3J+q}5@=)5vbt>$NZMkZ?$O_`P>)|1eumvVs<*e|JY5G(LG9;l#>%+C7k&aewbtD`F zO^5OB9h2|vi8OR6c{c8rm?_=JN>mESxcUPNjPmK>5=s0-ia;iVwr{&inTi1Atf$?h zIGGqDHsOvxCdzo4H$*@9#vju;%vGNh&ViqN9p8CmOy^daXf2n@>zj5m)%mu{!og~x z3S*Q$uhY{@3z?JLq7yK;{qE?^8KWT>Y3X;8IgKN?!*V#hJ|eXge^BL!HsC&S`A&YvVOyHTfm_0tepH6Y20{Xc54J&G5ahYC`p!=R}ihK z0NQfurumVN33kG*Mzw56J6qMDLU9?fI%dLv1~s{fz&25tZ)4Cv?$?M3 zF0TxS;le0M9`Vr@|vq-`&Zs9tufmFcF15)myYqtpqd@6}giceu$xVywDh9^@O5NU0rI0T@R-hW#TyN3r8Q7F1QQ0o8bgS z&GqSM3`CPg+qspDazDhC-+o`z#?pP6RLEP=TG4?jg4RFz=5{K|o6FGod*Lu)a7J(C zFoC1uCfgheRsy5rLz6Id81TJtK1g3odmy-L^%vuOc=U(t3J`5%{UgGu zion_-R1OV?c09h>Jm*k9`@F})5#xMds0%0&rPY9<0={ZmKCRoki zj~?OzM~&gsPy2UmXe2V3ErxAUuq~dhE{yXLo2F1PT`+hF0=a8A01~tva*FH0FN69aexaWLsk^- zu&zR(#mWAkWZ@_e#5f-!G`pPVKHh2%%=*I&yIgp zOV;d=w{#&*NnG`vEmL{#bjB{9`vShbdV*GuxRv{!X|dW(;zn$D`0}}~(qJoJyEMGzKZRFv;?hxHDAqFNz`nUw{Sl&{lmKt zQbX+TW&fA+SM&V-|Mk$?;l|z8koRJ?LB*xcymXoTxZ7a39*YkH@aVorF~tMCLudi-iRA8L#R5XW&xeI!Xhx ze&6w8VtOp53<3SJhF5*v64jO^n2xx%%kipFZL|3?f)}`+a+@r{=ZQ?f^BT>-x2Z<~ z7Ncyz=Ym{-rJVfeedL_)yt7gxNATIR5Mau+0QOy;!1Yqh;R(JjlHq=+R4m1GpKm_8F1@Yvk( zSroNL5wiKQHLWl`mR7dl>#KC!w^H1D`oom$z<*8gnAra_P5=|bKdLI*S+e#d0H(OyIpIci|t#Y?PZa2WEydMW4#~Ej+TqGTWfH z*z{wV+5T`KGyKuIzm?{DticT$03S?|3F~roX2tuXp@T@y1u%smyG+BqJ0~_j9HicVx9AW6@?kFZOED zC4pjf-bbdc$tF-(npZ#8`pg!7UKE0;#ZAH)T}qcT^`N2`9)U4iEOK)EkovB6Sd$^{ zEHE5z*4`8gvnzG-e#@c5Q4idcj*?j9my0e}3-^c=94Zvq7zhcydA<~_4~KY*nCL4_ zk%PeGr)gjF(fio!Q8=O#wcrO@fHHY1cv*s$n5$4za$4h$yAeetDy!_%tAmG6Y_1ri zbn(N@ao;v$?b=wv4G-a3x`4RFffZwrRV`8H5}*zv;5pt~sxk1|mdO3cF`$mdDfyIK zkCYRDVKVjNp02Ogzm{{`U>CV=dA|_{j=NFo1{u z8&<~}b;MP|KZer$5OCA2{uZ@$hZ2_3zT*lUgVTuBBW<6ADkVi7@oD{qBTJ^IVd_2> zhZ^=C`1k@6A z{0isy*2@D)7}9gQes@`iN|pOThX=4^5YF$s*m&-&LS>T2j4nY-Y+>io&b?^;iYAAB z;z@)U?D}jnjA>Du=du37b2z>7`ND`rJFZsBABtj(nJ99DYCeV{3iFn%KodZz3jM_=P|K12zcJ0J@?Pv(rx?ZY;D7zvg z?AHtjM|i_jG&Y)9$|TzTZSBkp8l)&mxVpYqmjxU*jFs)!n_iy7(|5IJ5Y}aEDW-s}cZE zujrO7z?>`jgKc*v=Czp(zYjEtkhxLQ9{zDn7-qft#$QMC;-=d5?iSk`vd+J@4-*~3 zi3)df7pc1C_NUgUQxwkq<0R)(iQ5+Xt2d|JBq^s|oqD!H?Y^+OAfHC9l(61x@a}F0 zw|mKx-1B|s+NtwkV8Q}0Cl1znN;U)21R^&`r0>GbLTp_+vU6(Z(T;>GCL`i2x z_#D|K%vC1!@%)|^BV^k)>nr!Ml-ZiL3nWp~;>7!PC>*w(+oNzu$n72~m0mpeVX|^T z@BMCMc;wW_Bh*sLwYqxv<`-Y&`*q`$v>po*e6`vs4+*tNb})_y*Dsm=1acxc4=hJo z7L#t?ms46MxFt+(Pq*|fk@0R$SWQaG$!42LIw1+=Fs5BLh1wJrQ!N(LX@rmE1{qk! zzo+dvsOALMxicclVojxBldVgDOb18COeNQRPQ^7UG)Sa_zem;~*iBGdfyq8s-@c4@ z|H)A0NVQoQO)$}3jL`ZOPSYdV=p4O{5r`q4Xgf(r1t$Ac?fBenqMVvCv&OiY%&r23 zy6$nT;jPx#NC6&gJZ2+Zt3Ykh*sRkS`_1t(-F5=r>IZRSR7_JikPa5ExiHAOlwgu? zk)vDa);G$aB9_!@djf6B2NTbw9C~)F7Z|psH46b)6KXJ7w*kjgTn&D=>9;WO#*{(C z^`p^s2?D1gbtv15dM(iZl?jY=oEhdUhrG<`J~$S zO`a@`+(rcgwp`r={m$swbPH;c^J=r^wI^_r+Bbc3obzgF4UpN)g5fk^*c|H6Hwfp; zx*Frptv-VP$@ThsR%`HtzpW4R1msW!&!%@o+xo!U8YETwFg=fb7L2avU~3rvsGU0P z(8FUVB*Y2zc?|Auz)2O{i1V3emoukp(R=XIQ`_b++riMJSpY6g3{Tq*BjYe!9Do=J z0NQF^UeVsW%V17uM3f3ibEX z@ezUx;cxN2?PAcm>)QkoxR-G~AAeSdCuATF)f7lC?WzjrQ|KN%bU%h%24Hg47mj>` z=~z2|{s8|eItcvE>cTnubkVtdDuuoUdpTwV3S}*VE(HrPKb$%Hn3YC-z7Bex}<`G+8Y}A6r5kF9b{T zp7==9sTNrs_xakiXT8n`dPeS1Jeu?pYF8>!AHO2*{2_GCWnPoP&9I*cvr?J)An?zF%KQiX!zXMj)FueUN&MK;KkF6iG3b@>qx)Ng?^a8qRh6-|$;=lLC zA+^ihlV@Acy21OVWIOpc$+#E~isx7VB}1zkmvk+=>w<@$L9|0Nv}4{S7Loy01~s6t zigi{o3+h{dA%11g?7E!K$@##7J+^?k5dOoqRW_n?bU{R|Y+gKG2+ z7Ay)wqYRwd4i+0S3ldV(ipF5+ZrSTp$DrMWhSIbaJRnuxA>_dBQunqUX%kZSipF5( zVOk5I{{I*|r|?YHu3IM^+qP}nwr$&1$F^!jYR-a39} z%^G9Qai7j9`cpj=j-SJ(4uj@t*Nzw+XIzLaRHw)7i8Q zznW8wqIAp~js8KvDQf!bb{ysP4&(>+{Rm|)`23Pu(8}s!nL;xx-Rh+6?B1g-?aKv$ zu8)R$^i~w+qacvy6lRz~=~suh1%AquA!8;#>W}P)^qu#W?wyYtIPOJawSTBi?Efwg zf`Q?0b81H!6Sluu;rX9GAU}UXn=nO@c6*>`ofLyMc%^=SGQj9nG(0kHb#rW3N~Cz zLrf+2wIAv|k-ZK3uGQ!IElfJu{i@q?s4+usU2ojls|6!iOoV5|wxk2@f4bhnleQe_ zE(|FaYl83Rg*5ny3t`r~C2oPd)KV^v)9)eI+W*qFg$}ky%Poh}59rJWuDGXJ`C#0Y zqRe&v;UdOLd7Vc;4;h0fNmQBuCE8&hG6v8vQ&BX-UFsU=d)cr}K8$L}ZBM2{6H*b+ zK@1xsft-#ggG}ah$8$8#(!H-whAB=<90vzywuM^;w)iglbSU?u-u0#U>I$(j4zXJekq5$1% zmPXm>I|2oYn@w(t8~VUOB|~oeW}Wjm(UmpLKw}pk*Ix_hN0mLzd4IuzCNHP-rH+FE ziHghz)z{SlVU(Tx^(RPR^AV60M@GC85R8-E9cQSd(}aNwN8bxQUQ-~4`RT5_1uX|M zvDyG&(4qb}x@X3_eROseGePZ7W)i*>@Y47Xc4i?qib^3k`PKuMT2%T3oloEltJWE0G`Fgm{y@GE~dO zsVdqt+W}KAywi+l-x|4pM zl|rCO+9uh759KIg zx{?b?%gHM%YUS^~CJ5u9#i}DVBg7!z#v)LE8zQdA1mg$w#aRMeD*Qvm~ z-!zJb4amc9lR^nN{RqP;7VoDf?yIM^@zDWRk*enBc`^?E%`Zb@N54-{Ylf*TTT=G25I!MoIYxr?aGlDw zowR%KKFHf;e!w05GAJuW(RbU_&IbXI#cfzx=>ELR9(|+Y2f(6QDr z8|2U4eSU=%ccb%tK|b4aI*_1T;hy34>1ek21#^U{woFBWZoFe|+-eQ|bx0j#&e)C{ zEe|j=p=b*Od0U@HTq_-))@XC@#{=KAE!95|o0-`E73+$F;4r`x(g9h!Xj_i|n+KQAZd(ADLzjAAiS$2QKY(!7frL>Ci&I~2+ z9m}OHdCttkH>aELV)1)WRs@H~y_t)`js>ig6_?qo)OEy8ZFn`1L3$V-{lM;!;ZE2{ zd)0TxM*+`G1kTNq@Kk?58tzg|M*H=DlIPdvk6ANuvng3Xw?=zaZv-q0dr3!99PbRm!er$%(%H; zRjd{F619IRk%*P4Ic9vmiP+9YYroA!dNO++TjK*4kt$pO_FOgIA%hz>LGQe>gLYR_ zg<7x@oG!g-x7m#wLUy;#f*&OJqFH#zG!kNtAwiMLB04WlJJVF&5EzlJ&QecC|-+#n3Hu6G*q6=$1CsehVRMjd4VxR;z%5Zk; zTGFIGJC#_N(yU_mvju8c?5qA%aSWEtZA88-jI#xvs(Ht8=eeesx@>w&)K~E(3dJ^x zCQmRXzzXf<(XC0_lIkPsKVr*dTcU`$5RHnuQIo_YY^T->H#x-B!yQz(YHzG%);Nz` z>E|Zz@D!&uVSCa1Y(5)q@U$dzVeQSm9(xIUWROy5Vo%)S#ya6#x1OJS$R0^&1n+9X zdoog{h;5287h;N%sasluR!Gwl*UStKk!|QVU?7t3&OY7E2wYY$V8{&9DeBr(Q)0-6 zJq+nt5APUW$75q%*R&YjHSV?mfu1$f_Dq|(I1oD1%)%!^NJS;Z)4pnw5?dUWR&hSH zVtIpGK1JWRU)(d@%;pzAD}|JHG+yqM`hyJQeCwrf_D=jssTsRdmuy1)&Q#}Gah7#C zFk758x4p1yT|UJvBnw3Cx&ebfFj0oT1;x0_@4*tgXMcI8)Xux`T57I!bF%qA&=WB9qujzH}x8&8UkEY_h+wsxv zBz^W=1k74GC@@x?L*f@<% zYaF-T6L$(FHJMo5hJtm9-zD4b9AcNr9OvFnT-~EDBp&r`n!!D7#xdq1Ovub~AekHm z_U!?anrdaIqm;bVp1=_;i5%Xy0*@%vo=Elei>30f9y>n2lVW?`$bt#P@)_PmS9~tT zwM1$xUOV5q-x3a1SP@Q}8Hexa`9b0>u?2tM>cGJYXydr#2S_K=AD%jvMsbsljOst!k*Jq)bFBD!r~Y_{t(+T95yK)gPb~qpS#SUrwaVY3 zmCD=U+qlSDsRV+byXAf!*&T+gNHyn^lIeI%Ba>S+PECvFHQy_-(q z1Ss?OWwTc@)oBGp$5g>)TOz)4%3NIIA$qF$C}K(iK5ZjjCvP;&g2PC_g3Uf4-Gehx zMsJifD^YnridM1x77ke(Kq&Plkb2O&6D(0&RjL7|^lrgwj2FLC5{XH{*21u0SSIzes#e1SuW#J9Pa4|IxkUOYZhFvN%*@bR*{oxL zhw1*NEZw8a%oG=ID%~Zs*{(_P-|)yuTRFKkk~V;bHagn(7d%f_P`SLz+^cglJF z&raoynbb5DFyQS-g@(?-1)u<_XtCADg=F-g?9*ANEf z!>ZlVe@RZYtV^+pS%|_u@+^I#te-QYJi>_*h>@u}o<?50dYRJGaSn!`>IB9 zPi;xRmpwho>(_rUMQw{-A`R!|OJx7q69@lews=dF`nmsm;NnxlLb8aL z$|^bpesNbJu>QPI5YIW{N&7zcRjgaZ?`jFpu1k^=1l;l~jjQ0uw9n#B;!^G!Hwut` z_!b3GuMUeEePoH?>gONXKJ;r>AzFP8yFYV$k_sJ*UYxy-Vn)<@wv#-cTVK`I{5D98 zahzvwQg*wh+!Cz)ordDRE#7=bSGCVSc8bAyd=c4a4{BK|{{+H@S%#@H?F=R0uXdq0 z8wRy%N3lXUdKf9-0(vn*cFg*NkrH*$1!`m#MK%V@3VV~M-PFUYTfQIA3ht#_9ZJx5 zDq(OtDSF^HRvtRl8XXUi=ZKQwVS@LPfPXdNdxQ8p2*ES1%J3J_2o!Dn1P`T2UDy-F zAEptAY6aXg`0E*sEZMrF+$_>%IHDsd!b-x@auM%gQw8m@x{5bAqVtcD4EQC0VXLTm z#eKtc=_mwc#p&T_9eP^xp|s!Z!|wqL;x*YE`TNWu7%?u9Q4;W!+J6eh2%#m;vZpkQk-B`i$#3KdbaOf9dI96h3lnw((r>ACt*%@8l%aD-|H7L zJ$L31B(v^w2E}NenoS#{;MX?Bs%Ta-l7|VTk@FXkgBUO?VwR#@Z;t?2SK7_$clcJ< zbShMxsY7v$X{I=$7f`n%V!%=-SDd-==Q3hqaZfmX>%woyn%^*(9i#TG%fNIhm-)eP zx*r}?Go4X;LeCG3H~<^o3-C=5k$1CfBQU~C9V{qR;Q%0TQ(RR-to;}VDAUa*>Xsds znxQMZsxeY_!}5q4owHF7vm#TRYOe+b7p1NXUOxLA( znUJ60outGv>ZHK)e^wH6)&gEU$DQtR#D`_5EGQRu3hGa#2NRNdGW}@O^u`6I9fCcH za-Dk~F|T}0!F4(O)8|u)`*>3z)>|!hD-!$Z$#af#NJr0CCUzVCK)zj%JLEo+F}cIw z`dlF9hsLx1+0Bil4WIxv!pM|22k2AUX32l%+3WKN62VoZ`VT!B$G`ObIsX1drYRG< z$qN0gXP^FsCLtsNjQmeihU#o50>_kYO*chQ`uUOYdNZ<`vt`;HNr+(_T~DIm>0Lm5 zJ9HfRjiuwWBOJ|T!sDA*sCE2k{_|mIJvsMo#Ld}0am;Vt=W)M=-vC1ZL*kdYGX-|P zQ226-#<*q*${H(Y7={`@=^q%KG<9$k3w8pK1?A|F0u=*>M=s7#N+kReeSsZ(kk6gB zETz?6Oy;AU_>>u1aWlt3r^XJ4stfkYtoc(}V#Gur(&fhS`sms5{r;Bi{=TpS+cBVg zW=`XQ{;@sT`gIdJv9;g9C0&j&p#VOv3LnKQsOU=2C9|vTBE4C>ZYZyJK0@f0UPY~6 zgcH7%9eSDw4~bh@ZWRYEtj;iR=Db#Mag2=Im&@s9+jJlHNgI$#9c1c3v#tqGJr3dy zhMwgYB%%^X6uHsSpGSR$ZW?urW&jm%0G9m|{(~Rn$1Hgse0eMnwW^(98k-byLcM4* zhC7+(xaK#FgWOhJ5h;fy9ok?#1%fn@JzlfF&gMZbenREFWF&wG>oXYshX2Sg@X5qC z!~)Gd-^fb=Zss_%5~Yp4U|wwV6}t-vD?OtUJ*fbUSP+5T#|r?c{Q2sf%;Kwi%fAbB zod01wn%t^c?XMbG&skAbUYMCz(0Xd`FCl0iK4SKJlLfaeTx_6ZcUI#720ALGK~G;E zkN!!X${|qc8(6nHM|%1O>X&@^1`6BMdYx+C*%6sw;_zossYyFCK{TeO3 zxvJD9eU({No$vbDWa;p`3HJfdNYc}~*eSS6Qktq6Tt;alZ&4(ts=1SAj|mq&N@{sH z85G7*+lYQ5DXFqjrD|PrLL`P^lBz;Xcv6cqxINcz`2FEZm$1Gga#$4tL;DVtE&I+4 z(=q7fB5;Wm7k)W?oanV*{X#O4oAn6!V7G=P{m~{k`m}iDX6g%qM{Q=* zBW&SEOVLP7>c{k3BA#zx*)W(n|Wd>G>%$}P+Fa`8z~GF6YFO2d2jJh zxlNS1Op21@E!nukTa{OJ)$pJbzUTp1K4;W7#bXX92pQ+07j2PdAcv8ULI8W%DX;lC zPpXfc29%;Xzg=8LS-NX}e9gQPtn<^Qz)?)@CIJD0nlXf0d3?Gg5K62nylYA@7&qj6 z*+m%YZ6Ex2@m(6Eq3sbPafpn(RuI|z#=M;rIQc(64~>d+I5AWqd|&Jx)S!D6hU|yu z6=@cU^bMWz;H$(wtSQ(V{6Ey2^0OQgw3>+IvF&5Q@1Y0^f?4xbD?(-*5UhQ^UXAYf~? zs96ODx4l{f+M~V?q`Ad#>|dbZC%s|YnWR5vMlMl15ncNVq-d;9HBA2QS?m-}ybkiL zaU{C7PTcNY(3&g?iZ@9=1uATeV$K}5`VIFDdy)n!miniP`tR1$nEyxWMz`&M0t%5m z0V@$D!V&fV&#L$y_J&Rdfzo%hYSCN$brftgoO!fx88i$$J`)Ui8uAaccOsV}vQvY{32TP#jcB0Uj~ml-j*9@5R)cT%U0!k#HklX4;|3 z1EB`&+C}V6%QPUn7^7hdU?)tR6Jd-67`0r?Gzen7to#Z=epg7NtV%J@z3o9FkVb*o zNf$IHG-eThsREF(1S{DTLit;xIf05ELHp5hpUod6Oy>kqZ~qe_03Tezus4TRtZZ3EsBH z5b`zK#ZGCaD^VinRWc|`(M@ocifS02_sxr20no5+pf(5DSjb~6(?R-V>$0IFX##4w zuvm|NSYtMjrnfKGYICiegvI2EMBQ7$w*y+{N7PWws>Wf>)^isBy4hskgCK)%kh$xK z+jjcVw{|fSCAvwvy5eU8AYkE&)%^{#UJ=<;^wRf+0pEuNG9eVAT=w#p3mRtnsbwXI+Fit z#)pI9e~@>_Y&Yq@dz^2cg(`_675sncYk7as*Q~q$a_rwonxjml7MMl$mEzHHrHcND z^YYN`OPJ@M%0aPfR5If%$0~T|B~cyaC`jH)L*XSPgB|Y+prCc6V?iEIO)PDX4_1@UPH(9z%%-= z^d8ftn^$bc*Y^-E^kRlZP;Y%stx=URNis*0=GC&F^GB^F(c-y1GG55m&j8nYP?~t7 zbZoqkY+-B0$8b@+=Y0uryzW0P#d*sQK-uodq8b*>IibE0wfnq@D=mjGiVGJ-fF#07 z65uuyZb$&0S1zl7xjZYAv-EoSGgc@Zxf9x*lcifl-KxwcF*FKFKRAUg;#m2^J#wJw(=WTvh1$unThd?GBtw@(blZsJmgJs zE8S2O82D;4M78MW_%jX^B<~~79kdZMe`JRzDR5$my3?P_YGWRf@{QT)m7NMD_|8g4;VBGgf@L`&*L5XM3E~4 z>y~p8#%ghj zz0(nE^2lG0Y^M)S+v3-eyBBZ*qCIE86OL&R(wtWOoY;n z+ula}@E?`7Lxg=X8DhPDErO)Fesk*uv`#RT{{K%lGyT5|)MNfz97Fea#uYXj^nXw_ z)#Ah?lKe)nfC&KY7-w2>0}oAP-*_-3U%sLgO%+ybHxQ;^%j#HfIYWi-sBbpe&n|;F zKeKIKi8D2i&-HFTtcmm~K2pyKhIA=@sOe0(5be4o^NN>^cU#`HT-)Ojy@0>S2**#h zgd5WHR0&6MQ>r#R@~wkE>(?0PYBR~aMFVD1mN(Th^`k+FWLaE;s1U5jCS+{^fU^Q!l_xgv2> zrduLH|f1PV$z046)rJ z$Zx}WP-#4;lS^uor(`^jQxfW0Nt}@TaP`%+Ry5!0niaDu*(lV+mHK*c*;%`mQ(Bfr zQCF~=B}N|acTW+pel;axR>itr37#R%3&uSfPOcG_7UNc%=7+L@Q1BxZ!90Yqg4&)& zh(ryCDYUWq2mj_#2X14=`Gc3C3(c=lW$tp3k=;7;_Jz2#fyb%n7 zyfrr&_r_%Docr_$)}QXV;3QVmc3){v8|Ei^ubnCNY zg(k@|(8XA;=&?jMflBJ}>rIyFr&)9e|2kTjQ&}vpvcC`SLUh%L#^{4xxIdO( z07B6##H*ntLhElC`0m@$6QLcjgp2V7cDTZD_rhs}OPGtD2j#dqK7sE|90f9_X0bOh|q1@I%;h8j}K#kGTe8s}#W06aG|pQaMNB z+SB5EYj(&wbnFqdQ_Pm*KFV-Xc>gx+D0p zz*%>KzT8m|9zsjMSxyy_^LC4_^P>i8NkUHHr`CgY@L;9z+hTry_VmOTrTzh{%}meo zZ@{e_Z2zOWNZEZ?m;c0dMoGpaQUDI){vZbQgz9K50J~nlD&{y$>cu;6zE_vQF3jo2 zy@(RNJ+NZNGwH!F+Q?R z{qzLD2fmR5`19k}48WD<^#s!*gDS=}qjIjqNmtAq$xiMk?^nKjA8{r+2a$jJtQMjr zKK5_I{sm-t+!o3T3}_El(-*OBS`>OIhjXUB@~X|lc||+z_64yPSd=2yVD}7cWClMV zIJ!po>RE>ZVLff~)EYJZrrX9kC~xl1=jKRAcd&I6AFsORK4;C6-!aL&aXRD85Xp32E2E z4C-VOEHB1H^)Hs-gXec1r+W9LFN!wm!&bT#%kpzQTdzAQR)GnN*vT{o}BaQ0#f8*(7e~0Uh+*Q`9VP$+^iZ6bDcmgwu)~noM(R zlE-9y6%%Z{s%_Iwk$RCVF19HdA*ID3>3(cIUHxtK4@(*S;!2(RhXSoMPA`m^Eu7<= zY>lI~ADU`wqQ*_UOw+Tg=AU(c9GJa`4<=Q(7Pf_vTER7}#7^hN$Pq)=PBXV9L-_~p zs<%Vai8b9R-HtM?hsKeS9I~@<{o$^i7C05j1WJUtT@Cb+TeSN;!P=5d`E1Si z`C;amJQnJyQz-FRnQ3l>%s zf{QL>3{L6_p(-}3rBStP4)4!>gQx&B@=qXgXY_(!20Te0jN`nC?Wm9?1dughh$G}w z!$WWiHT!q**hH;i0Tx?ryYMDMZEY(I-x<= z>~a}5oEA_}G*-bF4ub+lUcCM}5cswC0GyY-RZ%TF4}adh!j_Q6&af|2Sv68@gw}dm zyIiF5sc1AJ=(lw0rh(%RC(CEU!(xqs?^=#<(_0XU;bWn8`?au7q=8|~>DVi!a4b}l zE1-SGoKiFzqnkAA91(MEuiBLb{0bp`v!c_vf`g--62`8mTay}5>U$72+CLX53A*ma zvQiy!U6@xX@;eXHu2=8+n9iuRumdt-$JWMTM$d};k%HFAxb6j58G1Awp))g~@`TLu zU8|4#l(V-SDs-CXbXZq^7f0VIAp3v7Z=EdO@Nu#Ttf#Zw$ne-fWI z!0H@!XD7sabhoJTrL2Vh(m?t7747MJ)EWE!($n$z-=sIJ09p8@;e1e|rOJRb=6=FI z`8{Pb=Ub}XAG^x)V}WWL0}3;Vu(aiupT7ec9;~B|;4Y&C+}~S1iV7CCi9uWC8F8+T!h^W72|3UU z=clT0*9hEpQb2CQA6di%u#Ht?|6~?vH_)bsRTvaLwR)|ZS`Evvs;WFAJ&VBXEO^qM z$U*7jjGk7Fjn^qz7bI7$l^XDPBXB}~o9nqY zJE8L8@)Oco-hN(hNWiS8deeP9ywVnnyL(lhUD=K#4r9^EEpfuqm_fyw+V=EAR0Aja zi<+_rCImB-F*a;iMSVquW<|P(El|Z8G#rx`#2y8#Y$s=37akzO!aG2oGOg=|xtwmr zUwE4(%6$fJj7i`p1uQmajT=r`dI1`+z|aC6#CxnQtS=sbgGT^P zbGX#Eh6__t^QfS8kWvptCuWl`fcTS=WglFi(2G6>4b;5`aUKFl#W~!+DuZ84)AUXW z=EW(S5U{`+2NGoZ?y34&$7-ySJKfJx6-q!i;aL7ucrdhG&|^JeCX-adA5!mDu%W07 zryZ%HqO5SdVm>6_&N)mPMZQ?_ybYvM#lp5Pi_jdeB2Q#Nl>pn4${9^_FC#h2%|V|T zYV9;BH$OAD5GMYRjmAnWUAs^*H|%3G#qu6LQoHW=m2KdXxP!z!t7%vF3Le z0IY^FwzaF ztL2JTporo0N>^ZzVp}I5Z6}({{h7S~NCqP$%`JTIZkziTx3u3#8!i)D7Q?ZQVSAU7 z9DTh^-c#d>Wfg$%CB)Kj;T*1x8~>3Y`@-k@F`LXO1>QfEf`2!=%KUeyRDJ9(VgJ7> zBJsD1_(wjEVpdCjCj!@y>#t9N#T~kG6VWGehjrPXsN{%7hOlE|JhTafIl-tAzD+m$ zy^`2DryF9g-dfzb!4Gqhc!FMZbK%h<5R#E(fCS_4{lqV{ypdkFzGSvnRbh;r_J(d5 z7g_P!qV-(9?JDEgN%Id3Ud8Y&dTzPG_VZX$X&M8R#qWWNuH4C4#K3M=7M*U z1tF|OgzbomvkBm%?l}zL3&d3cFX9eqm!R)92*@Cn66oUKr3FI@!h%hjP69ck7lTK&^X=!L>~nmrLkdr(+C*tdt`QiUngYlu7@*yw@j^84fM zUG4YL95h(aFC&KF#^$jeCe~4J?>Mj<(I69;2Fr{iEy}bkFB@sYQlL(8V*~Y%0PI?w zARz~gn|kZ^(h_{8K}V35)=`<;!%}!-vSxToJC4y=8aF&%t7cxu;64%~2~*?778#W&%DYPlp(Qyh_R0LGC5}F* zF`K#416qpE1kTMZF$6Oo7R5puaazisySS_d%V#buOlzS_UMrZEnj#USa)vRvr8n|T@nKe zF&maKrwF7(yfHWa>}X6PE-F6cu+U3Ow7P2qXK-p{2(j9h_Ut~Nw#(}>*!g~!hxc16 zq0x=>xC&5aQTCSS9nHHWNe)Rov)tMz7PGfSZ{dT6&WoxK{<1>%vmAnc7Eo3-%$jC& z;qK=iopQi+GLhrn3A5F*lig4F*Dy1o}jSQ(kJHb5^V~ zb3mC}YNHnCTe-<&sll_m<37i=q0hl7y}&clKsPdYK7D#qx8)n`U?=^2>DUy)n~<|< z!$ln?SU!J|9N7j$t(nTlF|5v|Yy7nzX!gogqa7-|2yXT0oj$^VTC+W2;>wR^_n5_y z6HJ>E%y!D;nqexA2e$)!Z4lM^Sz{YSW!S z`Duf8#vA@cH}~~Q((y@W=U@&5K97Nn73v+>GSyu7;9}(Sbw#F%u4eR4NB-YUtkTo} z%{f?7@B5C>|KHBRHz`rSJ`}*le>-5h`qaSGj4buydpg2bVyuCurAy+c!@A*09gUP{ zY-~|T!i(Ym0VN*EZ2KnuUO4_7TK#L+&s{7FvNh4>X9h})CdgcPoFV%jj38=fp8%N&1QVN|Ji{p1B;rCl^&qEH@8$A@#>y_=rn&~s;uQvkr$rcNAMv4<8lqXTl>E5h0`9nw6oZ}c!{PH~< zQAh7*?LP9(Nb5mmsYd9Hicdn|U6=t+P`)Hz4W~=}Jh@KXL>S$jwkU5>ty)%(?|JjP zOvMv(%F6Vm9>F$IGOK8&+A<2(P>t+ zI?u!C!>Iue76E6{~H_lo3(emE=DSPFLvRfDyDd#v~J77gkY?%Byv9 zxA?3DZZVBQn6cC)6fhS8jRk8t__cyS!fcCEMMY{HF)cr=1vBqdtMDHa7jvsDTOfK|I zYi`1GS!@LFr|-5H-}ZHy+Z^2VZ9q=PDK=@Z+XNDY4fUOl$9x8=3V*FI;g5;@Wbx4@ z=;9J&tE27mm1P!&)0_*=)DO$r9;tdZVDNRKsqUupjL19}IUlc}5|icMj;c63cGN3v z9Z{*d7o7~n&fhaQo~kUJ%^7rh_nt9N%_`Yb1#j((d+=Td&4MsSj}^-bdV3|d8CDw> za1OQfRS4_0MT;YaoDqmhD?;=Q-I+oqW$MhfZynnr+Ul5W1Uy3~PpU?jQ*ls=xNq$i zr8P&^CY9D9yR)ytTxJmb$lF{}0DG-&DRJX9txA1?a;&7DqZ)!p_@gZZhT4#`8QTZ| z1o$J(3G`_~{w4f&0w<~u^y$T^$8k!2y+x=S zOeqb_2ZRjV1u0^@ipVs#)J^garNLmYYWp|B)wK`rnq7R?gIhci-+jY}KbR?a|3OX>Zb_HV=uDBbRyQ-FvwY=!grGscBtVsE(qkyYTiv-bWN&@q4<*vT z8RoG_aMpCKdv!R}>bM9c3fiKg+kf2>a&K1tiSQI%k$I`!H48fcPaEi49 zt2{8w3GYzkgyRHWqU{n8tC&1ccOS6Gm?ExwlOYH}k?2KQ zn+W(WBNaZ8d;On;=NoooSAFC}h2=XC*o$LZN>B6(o|mFFPWH#RM1aFF8Qy;effjEE zC~UceaS-2#In4SI92T?+pLA;zidl@aD-wcTC!J11(0v9a%=WYPDKiwRL}c&iXVOB_ zBH$?%=wI4wFOw!I8szOF@<9D*`^R^ZT{vde(e5r1dXW3`0h5C4ed*$50vXe-Icu3? zY;2PE7w>~o8g$2Gx(JT~kNgF>q+e&Df00l%og`&EZE7Ji9wEz&O}Ql5H;wHpg0U8S zEu#O%tyi^pW&Ikx^iN!#yDI6XPG&etavNMGKliO%DK9Hlx|s(Nj0-!?Mgu=MR}Pg& zU{I?H(^Z)Sel^&x%hZLu`wj=Fd(6IjeByMbMNfeJlk0q{&34$>@iNyG0DCzBcIsEO zts6S60xX?dg}jf37I0q&0`4p-U%VH$k3G`BF+Fk5`L?&92SR9V^H0U#U(Hu?urvL? z=_1|gQg+|zB0bmNLouUN=pdu#c>Br!k_yEh zJ!-FTv;G2sS^DLmdd~NeH1mD5v4!MB)xYN#GJtpHzS)gulp%y0L`ETy(x`sR|AGS00sUo3bCl;yO!->?w>^**0gWo)Cj}z)OH6j)R2RQPv~hRhOQ%JeVW->U-YosF6>RsBT$4_2Vt|E@rBxUgZ_ov2S2qO z@=kccHp2n~u^;;SDPyNB1>M=zPaJd?gTLf)KUa_HHEfJ=LwRFqegi3`j+8vcXPzd2 z^{eBVkZQwF((9J)9y8^Kn+gG%3H9Am-^4G`Timp82KU^caObC;rNp~D!<$ZUVDe)E zEd~FA+A3$y`ru5la$kpm%`zX9h?Kn#cdw>U`#9AFYr$Kveq?T?Y%J4wfYSCWljv0^ z;%@Y%ER(9u*y$(Pky&9~*QuYop!rA%5>nTqvyohu+8pH4jJ1!nt(xOmQl}w;{*OS| zbP6sRR*4ZX{$GJm`Nn{yGmJ@YprB}^BT4~?P>mU*G`l&m%xUsgVgo-o7jeT91%_UZ z<65vF>vvlqKEt!iNJy8_3)nr9-?Y-jxxaNCgWX>80rqN{P*#l74R>`4dDN0*uz005 zCrzve4Zx@^(Hu8`j584cy!w0!>$I|O?QoyKU`gW;d0OR8?* zi6GgET(=6p2k2#>Ib}YYU=Jq(0a``zTY^-@C{)h^Oi9mpv08$=uEz$oVyk4aet+G@ zyENfq%~K8vFnt=} z@Hyj!Y@^{Rq4_1gyKSc#zsuZRcl_Bn^gALM%m3Ua{#+f}A^x(W6T{@SmH+BSBT611 zWtsJ&a6~^_Dxcq;rzHj9U(At*!F`!S!;+C+yIDFPk@ExOXKVcj>?rfUOR{HRVEX%> zhvt+m(O>@Jw~w&=4KoHq=S4n6J+)Ez))crMHvhX2SKf;;Wj-vS-1{-^=jSqGC)lw&$S0^p2Pl34Eh(?*jRGH_JT7N`gw$`{)UQ5~hce%GWiNM5`tK>?)@ zluHo);TV-i?ryHYL82fOSrOG0G;TFUeTY##&LpC5zjr+o6#&b1^Y+6ZBrI1nwU1JS z7b-83JN_#etq~S6ZEky`sx}DG`%++v@c2^ z&i*rL6Y6b^|G-8lYty+rlGf^A%28ZH&QMhRuuABxX%~WKP}=VC=-0y<%lRa5oUoV( zg8Ez*nW+8f&fZxalYT)^Zqex`>9S%&Gn1LC#5rs3*nWF6cv>^!##UDHVY_S=&sZq8 z)wRM9W_?ksfkk0YG;2lo_DS37?(&1d=xcoADNc2xR{CS`n$uo|8CnXHaHUJgxNO$Y z%hHm6fU9Ys%wc<3)!O+uA!|+tZI+dE0HMXGBQsK}R^cXdlLCcJ9IA$-R{0Wo;%p5& zS)Kq|>N*}iZ#K=?xnjc|m?VWIEs{%d(RI_arH>E*PLZp@Cj73)d<=0^pCpDjj5g;p z*3c=RxkYsDi(W{}2itZXdV#Vl^+K~JPxMk?fb-N-av)PL0WHZvq^7rebo9CXfZ>Ss zc>_GR^VlZQ{-=qPime5G>@s^xMT~P?AxAHc+v$r?+O2K~=63U_7eJEiyLTw;Fdqgg!Q3GRH`ES?^& z-SOiXXxb&rRMhhLHO~>oIkRywHQ!$(k5&yH< zflO{;R`uY#=s?y|EJ7w|YFbCjrP)dC?7;HGw)&dOO_k+Ibc>UMEMEJ!Gfv08vo&pa zC$QOa$D`v(d3L-vcCKw^D(vu;Bn~88dAbyhXcyX{sfmMz#2E>w#gCe80CWh;jxqaq zgUX9fmN7g#n&=#t+Etg@Ke-)h?k>*}jaMjWTUO3fg%4*fjU4+~bS4|d}Z3tsw6n~V#W_I#|N&x6M@h6}&8R*e_% zQe}8Ym;7)~Wz7Jjne$gQl;`)Al}C1MntIOf#XL}0esIKodM_+X zXvmvooBicBM8G%O&0+3eke$3EcaOLe(e3m zy5}ogx`jjVe=+vXQIc%mws6_DZJS-TZC7=fUAAr8wr$(CZC4lj)j9Wl-?-=A-y7rn zlOr-BGa`1zm^=4cYpyw2W^Bpoje!~>C|<0xV|sWv!FO@SQ5&>tcl=^x!;RK~C$b70 z0u?La1uk@66Sf}}IvPE;Z#*L<%5Rsx(;|49@WrLTUfCYL%3*s<3SaEik_E z>$vVEu;mv?-&{69=uO#lrl3?G+0mRw1|^$sio73(OwB-Grl|fjn;q6kK@!Zvo(!f8 zkepDh(<9-kxMvc$@#BJj04xux9Sc}j@vp0WC%b(6G$=6ex_kedZ{!fF^REoj>HAnPncqM=TrOSq)` zVPUmQuJGlvYN9%C(GL^oa8DXPb`WEm#T}@BL|1Ir8=K$BsxP4yKK+R1A&j(qOtV&R zzDb@qTJF4VT})BTNMUoYTF2nwX$oo&W$*D5!+tpm+6_oy)!p9hsc+)KGTBR9k7qlA|vB6{chuz<^n4q5I+*441x?Nb{Y&;*;Xy$Grx+=R< z7ORvavH^)Npdx+ZDx){6aDO_XCAMEsSeP_69L?NNZ&B2Z25P6kqy2d+N29x9yhky# zBgi|(kzW51qxUT`$dO#%;xy0q$OCX929&0IlNv=24`y{ww-+u3G;&wA7Xr^x<};d zy$~WIZZW13l>Pj!d>^(_&V0;}G7Y11oAgXW7GKMxq{t|mZyIz=*O#(IX@YBiDWqk$ z!MJy7K#QZY7I;lGM;1;hql5ZP%jxuaK+9ICxB}jmv;pgrQbUQ~RA~6iWQ`pu?xP36mrxtU2P@$6Nr_s0rq1Wx zFgv1|w}%W{IPtr41+ay;2WTWBM~}yvim!TOJp6uQ+da2~q6d=C1X07&zX#R&AVhec zh6~$4d(O*vW*T(&mWK^oN<8AG?()x??4FVpwzB$0E>yq*SX0x~4zE=op@k}$L0z|Q zi?OvRp_Dvg_M{+ndBf}*gi?4({t357du(U3eUp@@*@dq!aj#W-Lw4sBKx&3Y zQA5eX(GoEp?tP8F$>t#6`JdmyE;(m!zwTZQ=(m051uZeNfa~}mYe?S+xZoep2D|?_ zmn8C1ftGl>iL4YTqG)JPG?ylFUVU@U?Sa)3kIQiI%{lvuH=H`wu6k$LC zd5=>vrRaZ!!fC3OpW9Pmn7jr`v?6DePih)J18CqjlU6$G?K350%>T`54<9B!9ZGJH zln{+&&hUw%H{@kvyr@Pv zz)lEH%fA@NQF*?c;Sv8w^mZiBO%Ls;9nqPGU`N@`FaRw8V$r=b5If z`>p)*I|q&u8^Y=VVe*=W7(luM3E{!70RF(h!*~qLg>VJlZ<)^VWY~0!s7CFFM+O~o zIjKe9TSd84H5%CKhJIOCahA{|kdnH!g%efd7PX`;xkOz0MBJ4UfrbGzV|ee_)moXg zsKMIGOA~>$u6}0Y5fS4NH7XA~@2+|+&xv^(g3+IEErnjV8h@nTGm@PHC~!5>ft%B- z#XBG$jm;|AsjnPG3tK|bd=1-)u2ka?%sZ1}Kyp5_DOhj84$R?7G%$Ji_93$#VEuy z^o~z`V11;pcwZG9<|jXJ%%e_!@D*gN!;-P&Q#AmKwN&m&Bl?&>xGhj5HI9g)LyMFxbJ~o!a z4s(AqIU;BO)PUpD&EdnA%$(5!>ox&7Ntq9NGDVK8-RO5}@jCHgv7LdRJ^8{Xl3-0n z@bGB0s&SLRsZfj4;HK&Aaf0LPAOJUR-}?#@NMIsqs?W*Hi5`&p1myH1KjGVfoPMb& z>*4i~IUgn{X4;LjzsT(;na*iU2KZ>Kv^H9F9-XeY2Pgf>PL4MtAFp{op;UfLBq{JC zgUKe%LnLkiC+S^CGJ{vF6AKt*oP!26mlO)fp>xQB_!~s4Bd&o6Q5{g>p1&`DJlcRA zZP{*vFQVssTlS2EExj*En=Ti{oz4`xMh!~d`TEFNFVPd7i2TV)t8H&fNA6JqnDPpX zq!sWkghc~PuKPjP6r+EBc{It7djh^q)D>g>fQ;cvg-Z6ZG-QwnoHt?SQ8Q4?J2a;J zZ&#c@0kc^^i99Y|Nfgds4D))BOYsMUoH-J91=s=g^`-Ul@U52wKx4&zP6PGaayl{~ z>k#%*X6Cz7Km}Hmw-K%D$aT>ph~U!hZM;;j z0mlzAwY;LX^=Ogj;>i~xG{fe(um#i493k$iWe>DVkPB0|s`lP#q~MZHELl4W@yFUN zGZY_ei@5;+u&b=tez#eLkcgk~tR*7?=uWVy^>I+ZZ>zYHYX%lcoPWREU^bO%L`xZp z#%XV(Ox7Sg`+J6~LevX(r{PI(ziCT)Q*TbR#g>JR7aiyQq#jljPDz(H>$$TRJGt|l zHrhwrNNiq3ix>pyL{{Bim2;`#XG zOP#?Z9+3v90UA=s0jsb}2ZGm^1?9HQuS}1vM z6cdotUjAw#pL#5%4AmWXyuNu~A2lP=jAda|8Lpc<+h2rqc-i`6Ah&xT+VG;48F7S4 z$T~By0~p)Rrq(k+3+O7fEvE&vnV|269$fnc=j*+^wBp;{Ng6xit$r})0wDX5OB(ve zFFDtT$xA^Gps?30h}66V!lTj{e17@;)8!9gyz9DivTcqePU=cA1ktcwxE^CTjl(T-_& z;JW7Xh6b0*ynxM@OR(}=d+9m|JcB4Q9w9fawa=snw#oVc+;C4AOJHdQkXWwb=m5u1mcVD8C`G~1KCJ*BO6L5)~75+P>C zSpR6TgxmGZG~!J15B|d8nmzp04AWGm1y&I*d+MTuodt(bj@!9x);vU5CxA1iVPCFg z=~TVLTEcPGtm|TYfx2k`>H@U0C(F6+u_**%sY-W?=y&G55SAl z%D37dVgenTDQnU!)l#fb_s9j7ER5{R+ydO(Yt^e`3>|kFO3RTWYUOtkl2=j>+E^Nu zHCMFk2nuj$7{;&t^=lBVQ>!+Jg2hq*P1;lTNjz*@1}|G*ln_}u-@eI*D2*S;IzOvQ z(YjrPjDaJHWv%ae{i?9hRUW$`qb5j9Ld-kIb)G9ooSg!M>~c=dCd}JrYzkBq-U@%TQOK9?}yPYv_?Mhfe=#IOmpo08)k63?Wlo8 zmhv3Sf0p(L};SD0UA0+Aa1s56Xbn8yK^g)sCI?;p>UliD8ZT zN<(2xMdw;R{oNY`O&o^b`a3FgneZ#&OFGJX23Koky&kn5czmN${vQllv72@g*c>xC znc13Fi%JRFeq5inCLk?vs0`_Nhh`}RC&}#T1B$m`c)NyHplzdDGr<0E3>^HS0qxKq zr^hS=(Z7A3z5uZRJ`FZuvG~t`Ykk*l;Fy09TF7-4Fl8M?oqS9L1cqoy`h1;nm#iDr z{fF6%4fRmGd7=3&2~@b;!IEeU)8g7N44$q-2$v1 zw;N^O+?xQ#(qUSkZod`g6x!1v&sZ@ZWQ7fF9y{_#xI#T(LrujX-I|tou#Ekn_ zqvFF96yd$kIZ6Nr&y27iuo3FmNUBjiN~mpx?r{%oAl(8sSSqxXTAQ|}{VWg|#&M~AMInU}q zc7SsW>VjYZKj`~leA^#^00a{d+|n^SMvywCkfrqJcc(ftU_Ci_Or2MMdS)5?=CHl!9yAcIpg!(7myUS_XW#=eo-%Ahf?HEQiR zmSP3w_d;x^Ss!R|b-B<%U#H()-9WNnxzzJ~c8J$-7^nF>7jowhV7*$zkJ7 zNkjhG1=Y5chghD_Qh(CHnPc9XR^B*!mo|_2Bv|65-8PFQVZ#cuLCDPh<(I&>{;((n zvI%1~waUK`Ykg2)Ot-1k*W8!*(4i0t6eVPxoMpH%R^SklRG{L=zj(}=)u7*ipczY> zZIws;L@I9b2ZsIaS5Pg5_7f72DmldMY`)Sb#VCG2jl}#>|)UE z#rK^YbTfc0IUC2$#apP?G~HBr?;VnZ`>h(#6vWiWGm8*1&S!&(^)CC`F+PaN25N=Va+=V-%D-FU441M4n#lGPz_Vk2aBN`_--%hkJ8NReJ01&90D zm;2YMH0@>CThPmiYK8s6gF$ED%r4~i+?XhlltW<;C`ZLYxI1V_@U z3QtNxZHS;`haMYqXNo0APt=nIUkB7HkmwRlNov2a3TfZo5OqifH;cESgWd1sHW8Q5 zJ1lXW*rdBA7HY*5S3{1?uh9Q1b_ha_(vp}u=tU_xd|@Ro#7Se0nN!>5uL{O0> zkL7}>;V#C`Dl5b_R9nNfz?C(@mQ#>0JAJ6cLAkTx;U;siz&;RI77>20b?`L2tO~Uq}N~)3LeGG0lw5NQAA1n_C}l(@agGSlwvD4 zl_NegYq~!xJ3~SToUKP)bF^2dSx7;u(Tg?`-4sGizcT1~zw(3nRLIX=@66CnT%u7x zM8n_JY+TG!^V%T3?76o3)eg*Y(dMlWV;wRqDk%5mWs;3;WhTnTFsAtvAULopaGi^5 zl9*DOO@HR(yZtx7d6iJ3i8dxI_MzsUJ$D26uxJm^e#9m5_`Nf>pR=<<=?94{(i|r% zZz&(PJ4UEaZ~PVRt7CW1MZY zQKA3jX6Auw)>buGxsaqxZ11=NUA6i-}b-DLZb^tV>ey*IH6L@SE#fki-81B&G@H z{||G*zmx9g;P?k?@LRb*I)ecv_{9sV2cY_9SaC34QLC&&p`oIkBB3y2+ECT&Gy4E~ z^$=)G7^FB|0DyakxS|eX`rkrQ(057 zkHd{H+`PQJbKlUoGV}`<_iFjix2G;02jS()x0y821we3^1 zHEGd6J1@v2a!oH1(~nmFCVd>Mb14|v0{k6~zV~aEpT$n$(#UcZL^n_u1;-K<>&+;d z{jW(uA;-RH6hu>$6uqt2)kIhy)&sF%q^^q>VxC`Gu-_Yff8Gge!^OCvn&ZIk$Ejp+ zEu-hoQeMjGOddR&71fKePkWRET3u_O=@uH{(RtwF;v%pc+FPT3nIlD0S?e4JE7EbO z(2CvYhUlsc%2oauO{CSq&)rkAc=3kN1ZOiU$|17BXm@#Ni+g9V3jmH|@u5B%YeVri z<(Vn-wAr>zVPbU{>QK`;8ed|^ZVL|n_W2JuyWfs!WF&7!8uf1O(-g$xeX%j1#C7hPW(9W| zObFQE>a;jb0U@bbkkJwv1)-(BLUcry(m@6I`c-xid6YFXDmdTL*GWI;cAIlztEbHH z4}239j(lkfk5dWmpT)+Ts%Lx+~%qV8!uHwvj&>u)6Z7}>j~8Mqd;GY8Zr#Sv%MN}sM~^q7G{0gUt9&Aes~0h z!tpevQ(cM51^4Rc&sT;^(3U1T2!{C;KbLp$KqkkXkc>OUx~_-*AwpbcJ-WW!kTz>PlRAh!ifM+S5*w;hdF2!9k`P%fCnBF?6ALS=<+7Hwz2%YLsoKewuzAH zsHgezbk)%Ph$0?7+RiG|R$4PIDjeN2npTk+14ZBJ1B7MA`5Dn)w*jPQPf`~7b8)o# zwtwA zyBXBuJkMpBPtO7Rs-JO#l&=*?Tom$*=fms7Z^Bh%WSCQ849Pd3_fPSj?)j&aQcpu1 zo_e22sA!7SehNB)TCw6jyQo&%*NN^1@MrTWUT?;4!;K>2i>>aQC7dYJi>Vk=-!E8# z(|KIq_==nhTj|_=-d#yK41iue0M%gf(#HzW^;uM?CN<;Aa2wKJX<>J6`n$d?q99@7Yq&)59ZQ0gZPJXV{X=9**{7rm z{-)3Zfmj)YQT%|Ms(nagW{CFaxPs0mx~w*7e#}Ou5GaB`f^pz#(3EvIS4@47ew!TJ z^@l(+fX)ETJ~1sz%yy@G@AHfB;G7eAn4v1 z*RcMU@+mZ0`P31*l+i}V;IoxApGKTM zvMrLw9f=Yd7Vjs_+wC2~4z9GIZscn2Tg@Yp+r!aA*NEss+ZtZ9L5rtWoSG>K8pz5z zzINNbrvYlzMwKEKq+6lk#ASBlkQbH; z7vfYz7Wv_6)rBnmzT3voLCwd=?FBPX(1*Y*Vf4cX--x!R-%Yy?N=n)6M0x`tv|gvx zuhnV}YR8G;eHhN+g}^3gC5zXzv%u0yqK;#F8B6n@P-F@z1pOw8{kbN82#ZE)GF={a+`xDZQ zI6k-ME+@@Dsvc(=Pk#7~OazZkM^1RdFwmWla0JN^q8 zxa(58q&8~H?`Q)85Y)vK9(so;kf|gPb@I#Cng7jvZqZQw1vP+&IM~#`D~up?>b@t; zNVVudmAbhWs#WEEY;{PjVrz$b!75#fJBmzD9~t;PT8=e3k3Wt+)>Fmm&W@&(lT z{F{-W>RG<5YEf&kONA%U>h!OIPR-68v=tj92?;cX#+onwpR`x=T3C;t@sMu`Fn(X4 z9Ui$AH;?ZQ3cO6wu;18~jHb{qMgb>W177I2i(1`zo$#*5em)xH^l2#t*p(wJ{?{z$iSxgQMAU#Vq@G$W2h@ZDs*LRY={xj zngfX(ah@_crEkCot;s8jm&XJv3N$C&1lN~cUyj@^wDD~^>ZEQrJrp@eb(UNh(40b1 zwyEU8v^i`2!D_?6f50O94=$v8Gc2=rlqpre$4C_eU5mnHfO z)y}LPSp8xHozf-uBg0aau#c}B<9U!Nf?Oozn3TAk*W{}W4M@l29dW*G%7c^-ge;(^ z2Ed7Fh5@6D%UGxDCERiVgqV)@GSXM%UXVSIFUR!dP?h)4!bOFkR*2J%KG9gdPJ&?4 zz;**AIwlEKl#vs@I2ZP1bv{C21P{h732D!3L8kKq1Y>{ua`Ft@9zi#SicSR-$|DOA zsDc){f2NMyqC@})o^T(#?^_z6I%CrM&1jgL?S3q@RdiSEN4bR7TPpK2rjA*W4U?Ow z2VUWD6w$~^^ry&nGbnPE%@{YdzI%C82+jCQL?aDxNiS!E;chV@mGUvd>l4Iy(+aT& zjO_`BK0s-vtIJwxU1OCJG$7VYpQ`!BauOfQWUPTHT{k36( zac%HIHFc8@*@kembozA(KBuq4l)#gZOY_dTbdw^4!6J580E$%5=P3Y=b zZw_+iR*FOt2G7)%y1s1lQ{4wpO}MuK*U{x_(Z*#27!j?JMnxYMc?+trKdCw4Vw}BK5kyguU<-h_OKimgKH+9D@2FbFe6&;$OTclUL`M zWgShm^czUALtRP_X4zyBG-z_aM8_d0#is}(_7(iqhYG-|fMd|CcAGQ>r#yRti#>aS zbg}R}FtS!+Vjac>H2nz}VF(l`%OyrdHKqjVP?jx5o9?U7>@PekLVhsq^d}UOLIfSp zGy2Y6^h|3>#cuw>7x|5O0DI3IB>2lbWL7qG+n;RP?na2OOm`W6&NcD>!yxH9!6zRS%_k2rV<6M5^$ey3uMyxsON;B%yVUO4R8p|wSl+xm6_RE?|D^W>N+>keC*X3w_P}s>N1%$U z8*~*_V=SH~wQnq<=7=Yit~GG7{8ZimFhlI@5P=4(V^9GF&3u&V2*?W*EDAC(vk=pl zd(BE3q?dlMiWmlFvx1ZXgx#V&h9&{#GX65b8cQV8Z%pU{WAEZ#{9m9v@DE^|^4ulD zthTLj?P%S-;$pU|<*} zyMxt(Y$=SS)8{Sy{1|*uT&;r>1fdRK=|~>UBS9X@V0em16YIba00R2JQGNX?m;!+c znB8lF2ep6VX3_|21nb@DXd9$G4_KKXyC&?vSv|^$1pZ|H-9kvfU^v)|+kiTlYam&N z!{1Gst1<8?h$4!cTq_+3h>cAH^I(7mGw+a>h3J9-`N-;ONcSioaByVUYC3Syh9WMa zZm5hIbW0S8uws%ppBvEURSVY#5A&5^i8M@aM=j6be@HbBaZ$^0fSrEU?)y9k1XFMe8dd6eqx(AJS^uBIy@AvMfZ2vsHjkxgf zbiR5COMhOkHB7j;enH`3?O{lV)j{0kidlqgL|Px>XY;&AaXZGTr>>Ga(jrRzp`1-N zoO01bkLuz!+iIDeH==dX)QT25r<`pYb_PyHj02Mcltrua-^yjid!XbZb|r2JL*`sc zod&#y-1c0+gf<#X-a|QECr%j)+ax`9@RbUp-#Ob<6vpBJU8jk5&oEO4R=7m@slw5) z6iQKbD=y>-rK*lNGX17emNMDlo-Vv;wBJfFCHlu@tc%pPpjwnR zKFExGTnko((DoKE9p^gh4c)A37iXbAj~VXm2{zNS`xTCnQ~>+VS!9*2+{tOC6p1NI zT;0OO2>|)`c-t`8+`Te^qFAYy-Pz|>&tbVi+h92!WXzR4e?2?vEH?+)lqRAnk|g}RT4jFphGKE< z`kA428oszS?Kixf0FFxCNEEQ_48`*7bJ(MH8Y!$Q>xX7FAg(TJb|y~l4EIRVP1cBf z*96Y9Rswl7$a^Iqhh!$m9mmf-OO4*Z@9~S#V>SUPZB{mM6z`FQtX71f3?BhGhlsnj zU~n9cM$)wo*kiUqIA>Ot^bPJ&lU&ZMgv$;7txjFXcPm_lyAp%EUTJ6*ZlZbqpmeCp z%5ubbL-?6$WBu0}TVB?9v$J+H?Wm2h7B}4nS)xM49}CUuq=yy&X_5S1Fn{EB{G@^bPOPD&l***53ms|9fz> zCW72eLzezG_q^gru3JsXV7e zv?fIFjYF4!H8`{WmxF*;0yE92kXH+6N>8a?n$CT?f1SSJ`^-M~){NYem4hq!f#`od zg$+ZpMkTFDyvM`M@8@#T4BYj7L9@Rucq;KCV@BR?3-A8DhiJ5n)&%}7&OEbMR{8+% z_W!@-ghS6wD~`BKkKXUI6a9VP^dINK&wFYwzT`bzaaq5Ya8Hx;vSxWd&hhRK)yP2) z2WytyCu{PB8!y;dJby2($4JOp{j@}7k8db4icdgXUWz)jvX_1_HlyAbeQAnml%$!} z&D5$G8C+pn(H&H~7`a?nTo3a)$ItT>j;&pa0y?*!9GIk6;J9PhipGSTe0`Eqm5mgx z8CiNoTG3r{`!nhyhIaZAaVS^ki>Vb-HDs7SK&PY@hwJFHYD7vm6UT`Mj&(kxU^%W! z*MsgApvCW9eHoSOk*MdolT&dyv$S0?$Ybis_uNzut(t*Y*z13NgF87xPN!=i&3}YP)~Q#}TZ63J;Fvx04@% z5%}ENKpnwJ#r3B{xzJ(L9GpVNYh1npBS7;|wW&}?bhO7kkjZP_V_8BUBIXvqg zm`mOUSuOMynfXCm!hL!xU1G{%lx&hjUqLHF}O*L^`RDcYSa2~bK&S=OVgf)&;D!O5czV ze+WNOG|^+Z8ava9rFj8ylR8_!hv`Tpg=y)oSbOWpHjvfM7@*akD){TbTqWvRXXvGT z-GQ!@d1+f^=%(;m(9-JqluVSwX#Vv!ct7lNQJ$t*re*?gU{jF;mqC23c%^74v4r~S zjXQ#lwpg+G)ydp7bJ^L#HL+f4jV{YaoJBEM?Ib5LYy7zm(gvu5rBC3#x!UUzT&o%7 zrX|2DJgpiJt!_c5Q&ES9#?aKx{ixkteo$7s=BL_*L45_%D{!>#T6Oe*Rm)_(QoH3V z!`82roN}#h%MIZUPd8JM=hyq_Mtk+eUsESFZCt2MRk&zQ>JK5WDo)l1`VT+dj=4(` zjL%*vE>2JDR*sXM+VPgun6F$>)w^&|)%{5md$Qlg)YQ9h<4Yo-blpl~gzg=QxR0{p z;71ogSEz4bc*eP@>y@_G@SH2%ObwPZ@28(Dji$JvFZPpMnoV&nvx->n)mpR8X|}S( zDxH=E&t4NX+IgbYCo0o!J;!Ob@Wd*Omj%h*l)v}JsB@Qnx3MJLIC>D(u_@B_T`r0j zZ7_$eiLvr*l*LH4gdk0zdmmHXZ=-u>Q*3?0Z(o|G{qG=!mHA&ui?MV3LtEr8uioz} zpvd1|y=!|8!vEK+H+LIVM_D3MreU?z$ISK7T_v4fC&BuFhrOmY`J!AKs~3yfJVo;Oba8N9WvfHx!$I`t+U%L10El@a9@eCqEXL(&X@h$< z_Zx9sHjBB?$VlOYlkqhN3S6*aZs`xKagsHfoDeED#nby+?O~jll7Yt|=S(cHtCzFP z_CW_5)6?{cCmL=^xTM8AOY6+Xtx>jlZLr0xXOgj_3jxqh%#wZxT?K0^3Q zx<&nEA7ClU#Oep=+@tr0x$-5rJ*J8NBiUXj1`j1Wh0sbRwLoe* z^roSn)fS5;RPExitc%r4nZ6~^H{!^ZzzFmlwz7D`_*hbqVc%a8~>C<;aB;#<=`l``A`I`9g;MJN}7}cq^lqXsfEyb`cP$_@p z>|SNvE$JcDI+OJl|dT@py5&({x{z@X`o4dEFM_Zf0?vQY$&qf_q{JD3aVllrA1a@z%FH(nu1aZ&HcqO*rwj zN1pL5Q{)aVo2xvB4_51D<}4}#vI4618?){XtdLzK=`5Jt=j>awhdq}#nEgNCisfGs z9XZ(l2d@4W=N!55fa>CB346;01>uBQ1^cg_`*xYXd+wjaB<&5ytPcv!uL{jz+m^xq zkoYK=b?hsAH(`iDgS@HiU;BN%$&Ta*yi<^Xq5KJ4K~jhaVn#|tgYTyzr`^9E*Sk~N z45hccd(A)=0E5@9Z0T_O3s{vmKD0^oE|TV4RuzeUOE*vOd2^$^?eh>NiTzqdKW-r` z1}yxtOAOofZ_2FO0@km>7v;&V?#;M-xy@0fPNs|f?zA5c%^oh&KO6G=vI9yB=Vo0P z^f-6*g=l|1S#iIK5%HJ<30-;3AEi$_YeRWRnHQaPYW@wZl=DsTyorgHFn4FKfcO8(IuaO+)EiVX~4$z$lxSr60gMxja^kb>fD@&|-+nH4}{8mv4yhtFO|LIZ`+9ny=s**IW>5izLV*4f*?Loblpk^a+kwp6MM4totTmaqBspA|fVA5rnApBd_y;tpuXiH9 zOb-EG&gnI?4xiloclS>2Z`#iIP|3>7IIKihB(%)N(9Z z$E(hyQ~%Y=?kd1bV&D7;8^B1L9@}n+AW^X4Bnu9JUVH#u2Utm=4#622MxI)3$rf$? zvpiB3<CF)wM~xb*Ixr4R%VaB1pX|N@Q}yk=n!m)=aJbX(H{_n z$<|0!x-ra7let}IhieWSK+~~lY_e~~ z`N1T_iaF8m4xT&JC=!w)!3|s{OU+BI)1yLYxbvf_M{i*L$5DK)xQru8Drj*Z09ho$2YLo7C>cm(1W?H0@&5DM$ut}$yr2?r~ zV{{o0aQK`o9W&kinPbr8E=w|J7E3MQSI#gZs~b-$M914a-#sHS`-+o@rr(BWKpB;tWQtimOgcoj z!HN%$-ZR)&9Y82hO>LU^l{NO}ro(%2Ju*m1+Q0sTIZTNx+>Rdk6+3P8FIvzxXvT{etNf=mSMU4#w2LI15oPrROs%Wj#a353G%8v@NV7rTmoIv?ibkMHX+wY(mE2slp|qG=qhXU5Iw^nnOWA_)_Obi>mMRjxTkTy8^!st<{jNvpWfGHaKnpq z<-uTd){zcqQKej5ehVkiNapR@!xS)ogs$pY;$|M^1f zyL^EFPMFITlF}4!TvrifprdWs8*kYnDsSB!zT!o@#;y(2vUxzfQN2vssoEDxm2;?p>Uvd96;m zg}-nwvL;{(W1cs7Y)|!~&i0nYzbb<;uoV%)%at7Bvx49URxF`^LOzRj=zQ-O#%X$D z|7(Qe6|daSf=;=gaL(>4jjhD@#>amS8b`&jqE@zo_P9FiDm)=Fv*_)Rw?gO>_h#eS z*ks{aQ?3T8GI$`aA_+53csvA0VqnN#?kkhPtDK!*Tw9|yPf)j#se2*Xu~3ED zi|xm;ZGSszLYs21ioMlaK{C_(V}v2CjX{4Ne%;N^+4xindY2rl1&5JiC$BGDCi z9-Qje01X4cgwy~EwJ@f?O8U%{FZ~Qm<0##OPts{ePci7dk_mqN@m!NjA|jU8^-hh0v`fvS|_+J+Cv_?^BY82H>|I09+fm zj!?&abjX{sLH6nTFJK)PS~sDn)~T+ukWKLh3@WVzuHpLqzPaNQ*aPOgK0JPSMe0l7 zNmg_KHpih$o{i|=qY`4gdBqn>_Y-X2!Q%K!@pmZc=}kq)oXK&-*0-K==ZH_|@gtCU z7>4@W5=~y~EFF+U&gjRK5oaTJx2+mfWFFa+NO^Jox#r^q4BMf;5Ydn+(kk>b0<_1k zVdo;&YGknIxHjWSL=PxTNLYV$N~n0JwW<|DaxvN7>EK2=+PNV*EZ-k(Sr{H0v4o;+ z5#p}psQEn%8^Q_{M@80~mI+RfVH17PP92Uj)k(a?5>9hoqlH%RKRH@yBGwb~7#_WX z>SCUqcE?h?WpRYSw#86Dw$z`J^C8s2^Y0JEQQXni_9btnkVTMB{f=xAMP>+gGOB;D zFL=2DRE!|@mv&-80dp$`gj=MlG-KfV28997NiOZe?xzZRTUW_>7k-yOmZxZ_X;QV< zBfq7n50mX-4%vce$u4mMFfP^k{4dAfVy(RN>ZJl_fTyQ%`1N`;I%5F*3tA|=0suJB zKE!_vnu6RVEfMcO(Wt&c!oL%IYDO1Ku=?U0j%iZGT|*~`hgrTX#EuG$|JQe z2cWa={vw;-X55$3;KCeqIes2{*=jnAW+M6w`F)>js(H!`N3j$^6pHq7i|)^YCMLUoDAU0YkNg_cGgY}E6X2d4zaH!4K2)9(89vjQiol_&k4uYo|W2{0BHQ{;L@Ff5KVwzrlHI4-SME#SHopZSlLwn4;Ok z9FFtpg?m5*$(TLf3Oz3lV*T5<-4<_*5czqW1o<~{8t@0|xpnK-I(zT+TVMio7Jhl2>~4^Fup9;`%IK~Qdh0jq{!Ce2eKqKKkB20_ zYd}Il+yn^3U!5OgrOG_=Ta^H+6bE@>jeHCbK*Dpw-FF$pJA!HauAW=R=-C|^u7f2H zpe|8boSIlU`2D8h_@e1)-o7$GsEQzEYZ4Pgdfo)koktiR|8v|ElVmh=VBf94ps5c) zQr4D8O--gZoqmP_7KBkifI^p5GwyuCBJa^Ur>0UpOeKhI_YM{&GKQzPTw;CFj7tq) zB4j8)mN_7^YTL_i5!;$jr zM#-eTg-HdQTUYEjx0p-8QY+6~3uK60enNYdRHc#Xmy40NJu=fjTlC`NS|NQ&g=Xfs zmXw%gx>V3y$tVjICZqTGp3wU&tcn$ejP&|K`>=SUH%3DE3iVqHKi|8s_cGWyf4_Nt zPE|x31gd9pFJa0RDwAS-LDQ-v@ETpXoa8$o^X6-g1Mw3tYAD3?eP*i32HhlXSv#)U z&XgQGYfbRjvkJs79rlzP1Mn?xnXW~=x3#J=;j>j}<SfrW)Dps`j%~p1*h*`38pE++I?^8f>G08SI+?Q*W zy0A8&tiQULK}9>E=+WLS1H(R2J-kXgYFyrVX!Sz|0`}sswMeWKxoKnP_A~>WP>|x~ z{i1*E3Hhu=#Or56v3Tqc9yweb3l+i|HN4JJfy+xWIuo*nD)E5VSX4vm-g z?58h>vklGdF!BQ8rD=H!8WWM(nvrRkt~zCTOA-gJ;FW|o)^$F%xV;U#5h|BOB%-lw zIt87Ow*&g|oo&^-8UH3RIoF3JZA|y~_+ri_7urMEoV4=$kit4xV1ZcqD;r(EF)GIV z;Ui^k>z59o`^2j$AHv8wxfd@Wa7!JN7Y&-DwdPccSNLtE#es^gW{4~}7L%lg@bpph z_#(<2E4sOYsvqpKeLcTxOLL|Z$_s&%g%VV;v#0IuiHEt`5Wc~!P$U=DTd#A~js>?T z>hR(qwfRNl-Xf(kdswGf?pepqE&2t$9XUk3c!vp{jxr%lq=EK6bHap>u4DH6YzQD) z*|`e|Ffd7gmOs$Tq7(-cGVFo^fgr?S#@)Gct$k|cnLQVjf-EBol*@dFKBOKlJ>K~8 zF#hJ?tAd2K1sB}YZHwd*GfiY*+G`k-+}=G5Lp&K_Uim!>SkcP?18H2BR0p`T87NT1{62Y*o3wxuleWe}MTX{R7D>ay!>Y3cJKyJ9x@P%g&0 z?G%V8FBihto_sV+C*QcJva!Q@mFgeF-fT_J%+R1|v(SK28c)o@M(X4@_e%xyA`fnr zv5?6^CB#yCvdaEgE3zbpG|7^jlmv1&L>OD0Bky6Rh3&1IM&tRq6d!T~T0 zRv*jy4=`l^TUt*pj=y+D{}qP9hEG_eV%+}&!+X2`g<;RsSV7j++F~_0#6&0OZBH<1 zZU{!yN26fAKlv5m=_k=dd6=AlrSOKKCnHMFF(s*>#RpRfAeze307O$OD&fOFi6(;1 z6+-!GPuf}VI{&9;)v+zwlGFMwB?!0eNBt0SQqX;A(rhIdf2zYk2?cC7+`BibQixYU z(`kGa0{4(Gp4|kAdGHOX28{~dEQq1@qwu21c<&=~5lC<$l{pJ4=%Y03ApF#X*@nxJ zctNi|u&}Z4ka5@GOD=Q_Wy_N90<5ZeR7_2h_X%Z9uKsw0bFCiRC4S55M=}%!fZ0j} z%pBf`vvYYwSb?BLrhQf=Qf2!#upR4Y0=-#?#k6EPG@Rl-5xzUFu|XD>g9le>48Ie= zP!RZ?Xruye%3R|cwK>u^OLGy3=&b{|R7!XCmyOxtk$Yp49%UOK2fH*5WQ*82*KS3K zllk|4# zMh{z^|< zl`zUVrf6_-Sc`<=?g<>zpjAg50r0y8KIWri&5;MNjow?6TaM-#Nc^VZ4h%IMH%J1_*` zg1K`-xpets^18hrAw>&Hu>J!^Iseu{mXquMVDx{zkw)Lfhoc1ZMFN`v@#(&_Ugbs| z|BO!`54TaYqnVFigFy*wB)gh|8>XE@VHAem`9co$OgJ#l>i;q^JRSTXCi$Dp54Maf z5hZpJMJUqTut!>?k@r@{2R(kTU%K;;N$9t&0@TV&yKL5^ADET*Es#LBVEIo>`~gE( zuV>K;#U+TXbNCoQCy)XC4v;O~)+3<>DRSxTExxTim(9j(KFFNUb^=T~2UKCNOU1ax z`k}qd$HS^S=04G+L10R>c&HQRW>C!=M&g7{5`J)V%oGb7)u;^X2yMnxIH5}UtzS?p zReTHivYT-ebsnH$Q#1ZsCJor4V#;Fi(H{F*l>U#=MsJ9Vsaq#*rHVH?UVR%iv~+NE1uC6ph>N_E6eUaX6|sr!XF!TNI8-a zWpj#07T1as3N)anxNtM#hGx4mUm3v1sA5uKn|BlmvbctKSMkPGVB62& zR~xFNi}$tK@$M%DHagJ*(Sd<<`$RMb+ z=s7LG)*hS%cJ`REGuR?=Re7aYzy#aeo`J?_3f~8CD)M*k>t=Nqa#vJH1e#eP_-Z@1 zqE6Obob_6GdS6U4jkqAXPpuV+IvXJQep@UO4)~+WzY#jIt92UFR>*BtArWb271#Qp zFpK=C!hZy=;dIYrV6xc!K;ga_(Rky%g9+Sx zQ6~1DSpU&-=AMYVK8~`bggaHnxl*s}Tac;=J*6Z2l(rReGMddyK zOmai*E{x0OG!52!1=T+f`^y^FC5M!zMIlH1IT!1#@Agw_)F(G20Udt_ezTw9=UaMy ztock*9Iy9=At&`KRYQ{=ImH75;s@Inp|)RS4Pf)R67`t(SzP2|DlHW5UtI?gDf0+hVx|WI@B;{n)mFeYv><>WXzE0#yHN#T<`ln{f8RK6wJGmT zrru^Q5mfZ;Szr(`uz;p%!FM7IOP4M!Xv|0$Id8uZk6)9<^xE~V-_Kx43xB5gjV|6$ ztqN38u?g|s4ip`_f|AM@;+%p9u2!Ov-fspVhFJ0GpwCC1oI0u1q-i3IN+OWXY0&$b zMr-ws^H*JAEWg1CGn+~Lwi?Y3zX%{PL!}k{Vq%&(BkgG!oJG9M$dNaGpb!US zJF%JTG{tH<+?%4sWbJo+Oo`?VOY;Lc8j@~OQN}i)l2wc1aO!R?Y3uJ~(Cw}&xOo8| z^oiHjQ8ne>IhAy>4dD*ipI6Z`{rs9Sj{M>pAcNaQEQwzBbp}HIHK|cQ@M6J0=I+oR zrW$HnbPm&x;r!lqCp_6mjdZIpap7^OxcqVQV?gQ!KP)-_-X{&r%T3AwM4QtBerNZ) zpISp;(?ZyX+HO|z1XLZay>Fd)eVRV-le`2wv-%%?0du5a7xC!S`Nq}7VdauTU4=iV z;qLxG=Jp-*{|-`4roVMY;Xb>HZJ0*vX z1aSk-F%t|Umq+O+~8bKAt5vLmkILR@MC}qcclBU z3|^c-3?#_OF1s!Q;!_%nQK@J+6&dGER}E?KWXVH|Un0N1K=q2iDzqS{$=)lpQ^^_n zL^)=$eWP8#A_XyRy`)G;I1;rV8h#=|Cb1N-QtE~&pm_x-6#`vHSEQ7`l6g$>lZ;$= z*1J`PD%Hlkc=P3I*O>PZ$co2N;E{gcz|P`7g}U3}WnGct{uTAN4jh_i1RPLi#yw43ENaK&T_AIi3iNI{CL^Uhw>X?+hmaruB9Z)^`}?UiE}xau z?vWS4{3}CfAH%~u`x^$%#FHxgtvA}8;nr~UDo0Z~a$Ehkp+_4N+x-rSD#KbSrB_!< zDzRtHK2jtcVW!{5-4XpzR{s6Y5ePACXH{qm9yGK>|cS4lDUO~q)*p9kD7+(Vx#aCMKVIf5PX zFUzL_^|+h%>I|n!FDdKdPH)%&+t&T=m0~ez!D+{Id%?Z5akI~TUc3XZl7gY6Xqjm4 zT%|d0dhh}?94tNFVvo3D;G}^vj#Iu<-B)4B3LIX3HIYyy2j5BAl8$J5w=~(9aN2m! zzqR}5r`k95e>4+5w0R1x__CEd1PDiGfHo#x=|c+O0aNa5v%w^&-cD~gp9>FHso5B! zUluHG#g7&?=f(Lw-4O;&t;7EZEVKO0gXUixM*oUsqkmxe*#xLEBAL`V0;{wD->7m#y2|KKvy4FwSP>F+j)E)+V72Lad~jl*KG4Z>$q zzbM`tQ+fe^XTUI~H~JnhjM0u{h`8UcNmY6fqL$6tq%zHa?fM{Q!@+K?b_rFM-tAH% zc!IGKSOKN&Vwc(X8wx@R1OeyF z6VM5XDIlBgp*sA>aZlxv^6Y^H56p{)Ye~FeeR@Y4Yh+Mx^um+7^kfm;3i-dA zW%uFDs`CY=ZhjEPRZ3qJf$taFLpmhxktk0DamTH)Yw@OyC)j27DX9Z;MN}zBOo&-v zCO{k?lvKZCxak_h{Xp@JNp>|CAYqJ@V<~_Msvq0&DX>GK|Gt8{P@X+@sKOjGmd>G5 zgI$ng4bA=Nj!X_|2jqa{U6|1*eya5cf_IfKxOJMQTYkk@4b| z_J?ZE_jIt#?0{KlRD6Y#?${UG{9)8MmF*)5^FQ4Y8Si~=*%%Y{ynVo`51^3gs}qkR zGrAbBRM*)S&=5clN-ft25Z4c#z-JdCpc5wK*J_|h*W}m%Y55@^V-VLm9}(t)IbHTZ z#%A{egw_FYK2i`+xm!6CE8sl_U$DF5-~R{)?lUpgZDyH=P*+5Sm8OsP8So&(YEdGI z-4)_g+a!@l7x3FLU7^=kpY)L3YVhg=MrfxG=#P?hr*5r5Q!roNbx7zA&R{t|w>w}z zfp0SZsCRm^KBRT|+9stUc2{N4(x9oU6X7fL2yUIqcEWfk{H&*4+PCs;oabD@hgJSY zK0tS_Q-ZPgj5bR53zGztzN!OJr)JDG=nib=ja=};*@AhAaBV}E{AowF$+~ymS*kud ztD&ocItSY@WDNq1vyOPrAq97}wD8o}#=+Gt-I&AgdKtX+SJ-yRq_x6vNG0sor z5oKpugqBTqVt%6sx*E47vOK;2p!^M4_r>6`y&M=epGTd&-2Ok5M}+>isr8HiUiLzW z8nk2kl~A}SG0?Gu7eEN*rT*@5{|6z&ho&6NujILdK$C@EP#{-+yXgY#K1Y{!HdTsi ztb4ly5DMl#uPO+|19(}sI{+aB3r0&rTx7nUNEmn*0u7fs95Sw21t5eTNZOhX_5%9urSgkW2u=Bk$@LAXgSMEbh`= zs9U7ia+{vXC^4hS8wYe|Rc-;agzVI0bAJ`Ch_Ce#%BW4Rh(%w-gxP(>oq zWpR^>U|yWASzb{h(4-ilA;Q)eVz&vF)Ptuz0~@JL08N~4Vv$24YQjw% z3p_~)%M*XdCivkT@)tg8P|c$zN2M%7I6&0 zsYFD-z7$?}($*SnWD);H8R!QXGul$P5tAXZc@iv{dMB%f>EVxt)74l*BQ;Gd{Ll?L z=l5;8z|M1{mQRVGG_d^f^@G@TNDt;xcw#&?u!V-k0VLUS=gO>1?XuP-lWFTO8`&4z6V|BgX+=6@;K{QsDB+5UfKT_)zgo?UfhA&)wkM=e2_OG#Fc zQGpTgrfH&}=B|68ELlU#Be&%6ajKuY(Nsq5D=W5(k(W*B$TzTvc#~=zxrl!dRlT7* z7M;6h`X-vzrJ%^fH<48C$~TcI&G1oMBD@GopIZ3A)IOxwb)-Tjg7Kk?22zry@}tn} zP$jbfV@Sd4F`S$kSzL+TQRr5Qo;iB?EV5E&Sa9V}1X|2mKE&?8lA?^&o}7gQ+2X`U zbgA?cg+(ETNbsD};nn4xif(Wrx9a_r@ycT7tycbUnAQh*2Ze6OL4}HXjk{h}fx>-VG_sNMUM3<8YgUs0)%DL2H$BdJb zvnhx4nr_CE5%xUQNr_^Z$wUV_XO!9KN>yQ#$s%uDb^0HDFF7-TY`M`)#IkQDo2k&3 zEf?>h1h~&SJpwqWCa$to^~)^ji5^vHnH)8X%GR~;lPOw^0$h#rH~y3Cu0e)Ito;m}|5V~4rVFJ_Z|VDI_ebh#b5r*(q>QeN zhC_gm2a#Zc4YJ6F7LZHi(molBc-RRk=Kia?^5_qw=y)hSk(t_-ptRKmZO3W5$@6w= z^NDB}6O}$FbY=M_l@_j%9y;?D{uHZ6l(kB`SC~g34GTTc%f+;=u$JWlRMmKN>?#_a zh!CHx9g&l|Y24CmgXtL@tsvHyPU;uBEf6?7a_9aq4rq!qb|Mky8=Qo|Q*rplNGXR{ z<2x|dLWo8wEHe~sv){B8~gdzVEUl0!-b%U~2 zbX7DEgYGhP&Xd{0ldAyNJEj9(}4- z!@1Mw2~9eow>$>Lgeb)WKKw^i8&f#VL&Wbv%$Alv@5lX@Vj*G~^O51-!M>;2(8g6%(k!JvPx z7Ax1?pFR*CnuU;rdm)A)YG;S!W3)5JpuvdY+$?Udc2) zE5mhqwjq`UbnObH?CK`f865K9nf73lt4z7|S^nraT{e0W@eXC5FP%RJQQlUNVC^;3 zS3bbo`E(zQcGkwN^6;G}Omq@!WixuRFb*)qBqEM#oZ0F;yNvQ-WA%F?ljo7s+Agj= zCsBeLb1{;>;3q}fIGo&)%VUHoL^Ho=@!Kyl7vIBkIRgG)UqDS3Bg$}k^!3u(b6^N1 zEUkmSKB&=X6Sf2XQT>sD{nLYq=+yPSiG-Ujs`XWm)#>qPsbF=v$r>(;9ga zyE$_(zXa1cx5Fd*cn`_9HtBg`u2hyB-1Cm8T9vi?HU$od8t1zOJA!(2^G5DrC3uU- z*VF|Ze40Xv-lT`QGjJjhgKkp1_*IftPWD4yH z_)JT#+RVJnqKPlR>#85gmo7!1Ksqulq1|FRy`(Ec19T@@C;Dj5=jD2QCkkr`lWxhU znWA@Sryoebk5Gx+x0YE&fh)qRtr@lL?|nvDXIN|}-L>8FL$^5RZpr5-INF8xZiUfu z)}`%_WpW?y*^FZjGYoglcP^ik%zw~FyllpuOvl`(0={zR1ySP7i`p8c+8!SNMV;dTFm}3Re%|JFOrc|!kNUQ$4Co3C zir0G2JX4e(wP)ktojhe+5IeENqQG0(dsqSPk_aH3+=Gth?jm+bU6sy3#xoteBtmc1 zQ_yk2+rXCZ9%67mE1ms}uRH37(M7M%vbV9oY7Ath4fuuNYNnoJgLgN%ZIOB_owfFe zJUVu;{M3(s4AdpJ8OtF7?o->_aet+Qyy@UMCWrXROE!G{&);a_I_Xgce^vZQbbCCa zDo&jyv^0%v?D$=nptdC0A@PT*I7b=JsJ;#_5~8<4LndGc+X@?LJueX>+6Xp*mvwC- zE3Y3fQK6Q??%fA50~PPdl68A`uAV&@lY&Ae&YkQoOe8oV)l|iuci9{>|UcA zc3Bg98UFJak({-RTnD2~A(gGR(wgrrSHxU1`wT)WEXZ0j*c!jlPmgR{>+DTkRv7bj z)0pNOtjnu(#h7OOA&b|{S%myp!$#jpi^o9~w4zIEalmI{(i)W!=WUfkDoO1uZUonV zFa3&CmfCsL*kK9j2)HK4JHr5wOz0_V_1NA=BQvL{S%fx-*uhPWWoPCi=*{GToByD^ z_i3x=L2HDp`IbwC-VS3LS}m+ey`298t@}tLAthQ+ZA^82NNI_v1CblX#1p=rR2B!U zzH^InYkE~Ikgi6^t;ZW_X$T~mG4P>-=TB|XvEUo@eoIu11QINr;ovaa~Xbd#SQA9?O6VVxwdf~zL8AncIjyV+*)^x3hvR| zx$i+H9Sk&$0l2pr73?2>P#7obu?D=0aau4?&5alCefK>IxQBDtzN9+BDD$aw1}iH2 z`qKIza%osYQ&)kV_dakqk+%YKwQ*SvyJOI;?2K#J{*R!f#I&O|p^j-pQfIp$=Lc=3 zVK;76dm6wC7YJw+o_S zgQ_%ngUijnpjx%@%q0XTY!Sc}%gdfMEUijYS!>9Zp&2dHmx)Km)EY0>_<9`|7AZAyCgQ6Yn}^KXxE zqs#{8jdEI7%Zx#Q$7@dG203Iw&ZwA_47)aA=w^*RSZ@x!{ zdc)Wr41Q|FB>c&RY?Q8Azz$y@ib91yweeg|HKDGC0@P&}PiD%*QqP>^TiEYs?Tw zNaMik1|3d8^$OCX-SN5aNf7ZH0&IQE`%VQJycvCQ)KzRbKkcF{nL z3+|MwXqA4N@jc!@;~=1?Fwg?d>oY~6Y@EM4(XhD6Zg6EaP7({AEF{ZbYC$(J`oOE` zEo#AnW|?U%012dt%Is3X5X^$isTFQvztRDzxngCpHjVu{)C)EE41GXkG32Pc} z>oDhT5Erm2};?5-b1XZ=E`ro!2 zORZFc2id=Fo(_mCF!@gTRrcGz198+d*JTfP*p+RLakf1F;y`NFrEG*P*o#OdBlslR z%+b(&2wB? zg{W7sL@O`aLZ$>|8sRl_;@2gq9I{DPT@(7hwrk@+42!80okdgq@oS98gDg!L8g5#U znktNeV#QqW9QFyKs#xtPbf_JnDHpk703ovH_&KcajqX8i^bcJ}TaUX5@!hAO8CI#~ zPU1gcm-Fvg{5b!@h;L^8n<-b|-%Yt^q;=Vij<_w3u}cZIqkDM=(=3;2d@ukBB!FuB zDZRlzGwZ(gf!7o-Y$SLi{|R0V?oaR%eS-ID`VIZdVC+*pa^6pFWRvTiL9-S>o)&-< zpM0-rQhJaBkm8pqEHfWlZ%8gIiwl`Lsm+1F|LLAzSmS#q9cS*MJ?q`f)3AwxIb%7La#rozAP>oj980JK_QD?VoENXF zm;3n$vlL5Ksl-VJ%R@2#jM(N@0!3#!X$8XXe$z$G@|twu8Aapj8|5=ROz7?lk_?$X zm=Cs7Y`0ZdYy=Dyz8+7z)>>?>L zVUo4R#fW!ARd-lt)4v1NO4B6aFj-UT<;mn_jVoqCJ+6LzXJ^Au{9_}Oytd@02|Yie zxPr=eY$dkj7i#XT*eiUyTj$G>Q=5aLU|~JU0VZauL+A1IX^^HMn7H-T6tS|M6K+pi ztT$1nCvh)p%CO!ePot4{C?Xnk5h63CnQRcFofBa-sLCImZbY~X=<1`Y(spi$^Dt zOUrWP`;NrtM9-4|7WzYfEPhA8cXL;A5ld92IhQ~z}3G8>Rq{s+i%|2?Z8>t8HIpK8ghPfO8fsO{Q*e6P|#0U(mPMb){| zYsDr>uRWaq{+Ig@2UxPLaOQ=uLJ-`L#}@7vL}OAtfLhW|i)cnavdp~wMS8fV=(m_8 z9MuO@4S69(>Zgl-`qM>kq<*XIgNe8|ujTW$2Z*N##yt0Z%x*!^MLNHX2TZY~sAa=H zr&!Nz9~6Ko78W3$B1P$`JO$ED$kc-7Q!EM7QR39kS-!yuNVV-_XekAKqPRCY-B?{< z%C+|6T6^m>^W#{UA^itngW8VZdNZX*PFCFx{<+#7a_l;}TJySvc2zgdx%joymiD5N zkheFx7Jjvp^84=G;e)?9Bdh>dz_e`+G9;ysSWdJmQg15EV=%9x#Y+GqVq7>1mUAWx z+B!zYDx8IE;3lALPB9aQQ?$;R%3Ld5y}P^1Y+9Y@?1T>e6Di8oYzP7Caad}ZoYN9|w71D#SGrR0~ zSB4by8jj=z_KgIr&^D)A4a&h{{e>=Qwd~_bkM29d?hL~`4}A*At^$>rR)GuhJ_#h5 z13#rnkvn54&&)WSJrRW+W>?+#Wy`aG%dflnLh1y($e{_+_H4@b1S-&-;_BVl!mrYI z2+2RPU5*Ep3UQ-M8MsIPB6P$5%T|N5PYL!1sGtIxDGN$HL);YJMtovY??Gz3jw zu{1e)Z~QwIWmEyrc~m_vf+KFZ6|^39R3-wPzNkNT5E-%`k0KrMcuCKxpB<25XrUu*-z+=>T_=8H#_&v-k+i1>{S6s|dhEvPb>wvyLnmJB$G<84Ru+lZsyH z`ZV|P-dNHK_&FA)H9;~q4_D^_kVxPBN{Cx>(WR8h(4jmg2&jvYwP33^)A{~6Pi8FP zbAY8eFBP8FW$vo=rg7I1I;&Z9s;rssF+a z?<3*Dp~Hf)<x+B4jF=Q%W3#ZX-g1=UC}&evL!4PCsi zhk+Xn#>o)&`}@Li%gkP*rL;hu2Jaapb2ufieh}D>gjeGi13UO~u6ziOO#=L7^7r*W zq#H>MGqPaDWueAbOM_}Xkx51P;mIV3Cihgu`83P61x;;>d5DHp5IblWl=HDF!s!yG zZyJ8yH?r-T#65K6xe3cwl1~vqWnn&OZ2MW9!8oEtyzJFN`sqz9IF3=>y}jQ}y0gUV@<&|ww~&{$ITA{r<(JG|dDv1x7PN^V zR{RjK!s83+ID5ckInDQ8dECRD32W`wb-f)-0_ke!Pn9rv$W60>e(57zz{ZzrIFe}H z=%k9j;XKGqQv|%CAi^$t^=r1$3 zWDM&o()#{)JqHvYwDtFzSfwjX>e%pgYE#)q?^h9vS{9V*w=i|-Uc!=~0?yhPUC_V^ z;qKiBjjI#jv|)tV9TDf9mK&x!ByC5JD_uY49P5hgm$!CuKZa&AL8O$%H8|+sIkaHf zbnr!G-Kbx{u#uAMG_F_~w$r+mm6h*n&1~Z}!WDx}wcw2y8_CFW4)vri*}HsOBJ#yGd#SXL$T9bQ$zROV+D6a~ zkKC$IRJ&T6Wp9^ytxc$tCNql)$XR2@f+=y-n`T>3=upBOWA~5wx?Ar^!)Cm{Vj8Rb z_9n18^*V{Y+hmf%u}1~NDx1V}NS9j*A(4h(k*~uk6?!y5_CQ=eE?Q4JN;2f}eZ6g- zV7TE6Pub)6E!%|igDh~SK@!gF3Yn#y@!gzrR;I&M_TI9c09kiZjFH1pY}X{d8ych; z6BzpQyy8)uS&$)(XsTfxpSj``eYUC{QD@o&3Md2pCH@iRvTK$>63pZZnVV)Z+%YBU zNc8{_6>|0NzE1E=SHd~Ao|uxS7SKST^rdUjLitpT5g}=o4%wuE)t(IEmtDD1=qk9W z$())CPce^?U%6`Gd~B(kKlJvYhrTDo#wH)p^R$`Hddi4pKSop3>Pw9|j*YI$9FavH z?%=)j9PD;%LteD-e&LV>w>ZgIxG}bANeN*|yp=|Yb(Ypj@6i7y@b2wdBFx4S?F-ki zA?QKR4IadHrT6LpD1J>jULXj8hWMV4jeWq}tj>UXnChY-gK@JaS+x^aX*ySF<5HI7 zZz|nG@gvPz)Hs>0v+MVk)iVs>?2r6QaA@_*7X-|NhFB%yiWm?+PUcyDK@LxoqWr!? z&Ufb$czUcK7D1{kE2!l0Rro_qd4PavUmDP`{{U^aza{YEW@G->F3rtbe7sDpgWsvP3j)R$jfNBo7Q}pm*xs#1Em3FSDEGJbrOg)50%9 z(c690r(GzxmE=Jv@_hlRL$Ai8j5n$qk%-nexIQ=({EoK zhHS>kfpja}!u_&F&59}FFPxFEpjrD+_z{*2TV`=upb5hxjmNV|AIY$>;c@B|$&y^L zm*6rN>b59mba08A>O@9zRvVh+=%TkcOx_U_q20TL?ohk(EMZDI8+&!FqV<5{1QB#` z86FuPXG@(JoVjej;p~nuy;OuzE2d)*0egvs@SXVEQzQ*(xE5r1Cl=~wyoAD>9~mEkYlzIvIOrfzX{R{M&RA=kOlD9B3-Klk+OAc^gA`qIIHY2W?NOpDwZ^|9bu}|@2oE_3@fc&Q z2&}i@6bdu34M;CBP(p1*zKoG|;@_LWQ`hrdSq>?e%Ef$Bj{3;T-pvu6 zm&ZA!6{ghbMAQv<&V{71jkAv<;0@egj$~q>eRQTs#nIe`tJa;Q*@x>p#wPV2m$IQC zt?RF?D!P$p2~nj&e*&LORyo}g&^5}(*_;vd;)mb~zRUdDr~pwvG+z2bm$k`q2c4!J3jOQmydw+PD3e6g$N=$%lO>UjO4Bc&0sI!I`5QtfI-?H~RXp;)z z(EFW>V59?qoJGX8MZ|gsqDO-veWm=T`M z!yq`(j~u3~@GadxmV2iAr;kGBSCfWD3P3D|BCcuKxvlq1-W}zAV@ST`Ur#c2(i6F8 z#`~GEfd;T9@s>;!DPEFUm2z^Kk^NG(T!1)}&_#}y4&qLAZg&oD_oMb%nFSdIYsjolAT_G-pqLb(!TDe1ZjdD< z(t*C~nCoyfei|uQOHxa3b(OK55CTP{?-OL5b3~4G(owv|pbwf=2=DgWsgabeye@qJ zv3?H}%d2`c<6H=X-y9)cPB%so@>3b$=Jt&V;_*cKnHey(v`aA~&1ET0RXAm?-N_y6 zM0FLs=1ob7?b^!?8+3^JbmKM~+cYtyonE9GX<&ZS6uE*g-J!YkKv+`6%|1q0C5fnJ zuOjQk;#@jWx6`lw-sqMZHCl!R`T}wd25%iPhr@4-UglgnnQD!yq9dVt`V@HnW1nox z`ecQmYJZk2L77jp|B8a`qDz!BJi~+QyjfoGolB@e6-{Jv&xf6tWBLJvFwZ*L%ih-u zT(**dWewX{Qenp?HvC2FXS^+fOxZ&{DSmdSi#P~wUZ2<8%C{fyZ*8nM;d)kZl-K5K z9VBu)b-y_dZpOxIzIj}Ldu))N-XG+i9~F1OwQ&V*G+wTz+&xEB=jED%tNxC=PI#p zZv3f@#ZkPaix7`9ivK2U^*f$gZW!Lw0sJUzuWrJy^JX|Q0Kl;}Va|F^6iDr|tPgHL zwg|U63zuMPlcVXIjg{8i87zV7lC=0Cnq7umBqyX4m#oaU>Y}DZlAzyaRQPI2Y4Sy+ zbUkHf{1xx?m4>jPdvy(SjRLkzch+<6>Ub(=enG)+4{Wd#BXiOSRHiJb>1+5Hb4-MQ zE5+JTRb%@K^B|p6MM37Mtm!{lK3UzUoK#=}Xpzc_r|GC+YwW)6l7(wf$=8m6he2O{ zvmhdxcoCrqQ`yEZBl81HZ|y9?Y^JsE_#<`{fsd6`7zn8@t&2?BLAxif0J8<-X563u z0A|j=IZFBqm=81llD&FO4ibj>iDvNo>XX8#eY;FCwfFa_gcS0*8|7+xN=dLYv8k?p zV=I&Bf6dFm_bs`6RC^^UM$~&l|MWzq|F0*?e(DYRAEP8R!k-$*CJrY9PF<&;o~Ve! zvthg*J`k$4udw-!H_p$pR5hjsx~B-RKp&U^BHh7jwdtP2y1qPyY75Oifou0c3o~Lq zWA5`|K8fPYjrOwb%vZEmc*cHu^t!){5e^|ms1+LZ;hW?{>fTlaN*Zq*wu+4jnmZ`N0zcB{dyPf02Q@-t3P=~!+Dq#X zM54-Y&*U45?u|;RQeC9xH>hGdDgcr2=IF$fxJfX1lm*J+mkPT^rR-D5n7I_W+H(3| zjis>zA%qlEuz!r#Pc_Q*ve7<%mq=M1B1!-S5DUL_>uF`UZ!VnhbFP_KMfKy^5I)!N zSYBY*WYD3Mc1Nm|S!=9XQ>-5y$Z)!0GX2y~eo)t2L`3UD6@hf~2M4D9JdC~mLoVrTX&E8t0v*2hh>498>3pk}$5|WMT1?bw)8?`z&dPuU0iDYBRnmyWj_93d*zo zA%v~~Z|7_N5|%HlE1S?wFZ2Kw^gy<|1ufjD#O@&$#HG4ArRODWs(p9Tq3Q2NwsSRF zpp{{A*vr$eNUKJOIprrXJjiP=66L1*B`Qf+OmUqs{8Dyq;GTUFnhQ_vK38(N zpOniBd;xUQvAy8W*8%ez8c3*M?^=I7_r+h5_`hVK?(9 ztNf^|mh8Cdz+p;azqSnFm>fI}q*d9OP`?{aG5N_DY=j0l#<~o}01d&7Wv1Kx?D~E8 z%nOnxJc~g$Po?=)mmP2S4W5n>B4(p=QV$J-3o%VtVR9^_J9u>x=4)IkY!%&5z`|B+ zpy?v_&x`$X6^`N|zRga*RR!nV=a$+L56amXO;bJZf=(>H&~}_$Xn(?6KP#L{1)6Kp z=$$L|hTyh!L3gZNrBw_*FP6}2?4#|TG2_^8hPSU0dYAiy8kmNBWm=*I0K= zME=Wr3BVlbqSP^sE^ZbljXv@v`9-V%?S`gN;jRoEi=J?wAz2O((88H)1PCc%iDOs7zw~if3r#dl#x9A8x+KE_|qqw!P>-MCY3@WVxxUe*K_c&v}t$KeBwi#!nR5qL!gd`<~-QC?iydr(>Io!k%QlP>D);rV7 z$Kpu^BMssxeVDj*J#=98X~()0nBH81c2JTCboe;z!0BZ?+~4ZZlCv}YdW$fR;#9c$U=$1s1KMkk zoo}sV5V7;pLo#d@B@Z8^sVaKU=>y)d>?ygod@+`f?wMY*^ZF)f!M+2&L9us~>ymEJ zS0H90g!0)L?;TN|0vs6Kz1?kEiIzpmOVym7_xwmui2?(>`jn8EhP2R;gvejR%vY*{Bg`aZhugQRrF3<5TNPTtR`9l31 zm^I!RqQN)(=5*Ez~B#WQHhFrtW z@bD4D)!LxQyx-yocf1fI#{v0~)*X1^>Z4hJrr+TJ zv>#hz(oB%?CokHmYJkJv>Z@kM*my*C5sHM*)+@789jGa6wj&pjWhfP7=iILp1HOir zMO*Xg)yO+dqU>Xc`uK{oMWP7VG$GBx{o?`!9jU1P*BnmP^Ac&lItj5@;&!T%ycu9Y z<3578&(*2{!wVew>er+z6zw4r}Q5?^RG9viC~#fprf5v*@Lh5H|431L49!wghZ+L zfJluy%=yt{eJ)7{?z20;1_mnXmbHLkf5y9#po7+C)QkkmlbZx5b#%%SQsb}($I`u- zqxpR5a*;#RwJ`#P34`W=dDF(Y5Y1RMi4z1oDWSX_uVWIlKFt_M4Z(QOs~TuD-Qz&Nk+qPJ`A9n6_%s6x_`ol z2T8#!aQA#;r&;F#NmG~v!uFy;ryG|~k3{}kz$Pu7J1l)V~ zF}R;)mNU~|OQRNY9)6poMt+;5klsyF9IC%UGPmU2)xM9frOr|pP-i-ud!S!LN0wZr`or1>a@qHuv?%@ zl~UL@QfET)^^NsAZOWSM4z7=VZxd0aUj$2Bp^6T!XX*Y@K2PVWtn`kUzz)M zQ&yZzU_uK3t6&WdLq_)ASxXc{fAUsZvV`hIl!1nVGyBJHZRi$iXy3A73Y8%G#Mf`~ zi0XqZC=3UHGslfnmbT;`5xcU__Pi0q9a3EtnLwllH+HI+2h?^B=B|^OE)dK0q|@{x zSQfC#Nj8*dic}Z5Gw}pyBe7WrKc6wL9100jvu%kvhYx%3Q`DEm9TCxJLb9!l!U4JQ zr9*vxKX%8xp?G>WuOH{ioim1y_qPXTknXaX<^%fBCg4zCkcfyS%cjraN4Ub>6HR>^T%hBn^hS0mb4AQEov; zCi!)i#octK4YXa(AYDiNwBX~LO$`RX7mEWMfpt_Q9DlaGavACN;dzV0kmUC|<7*OwRw=A*Fc4roVHz_YdI1t%OX$|ZFl3_F?h=DA+<&d?^&Feri(&X@7 z6p|G^nVzM{-Y1;fN;J9h3xLgzqE9ej0vN@{!4ByVrHLR$-x z&6g3%7RYgtlMc%?CRl%PJLm$XfI`RfmditoxMf_%o@=Xhps?;bWcj~%_71MokAodIr4azBqnQ%0vZNDG#EEU##X)b2wRt2j zEpK`z4V=C#XKK!yYMqoLu~;88k6I)MTQ>VAmLr#XWh)O9~)^aL9ropQEku zJ0`|$dvXEet3-6DoARDW$frXVybhVM-vX>ZsV9F6u=rOW>3)x|Xx6;!e!G%SHxIe2 z$yx{-o~@lE76|}UgcBJm(AW1IkasGA0s^3n1*s5L{Km4^v-UqRtyZ~lpEvo81!c_0 zk-UujI0UlFlc&|>N#*V{A4TZr60mCK$KmFres7&4U`L$jQ5Pn$Y5=^Exj(Q7`v5FL zi!FdRg8u<9z&f_0^eYZCZk>v9&m6ASyaQ4Y$Xwox@)Y})El_``=}G>KWl3X*uL=h! zWo0rFz90*h^0duM>5fSQw#1L-g+y9Mnh4H`qfjnPN(z2=E{+wBO5K(=2Y`K&W=Z7n zM!m6HE`vCYPmynynxT!SM(_~CifoNHIoqdD#ND$k18UhF`m$*OiZD!4`8~waZ6Xe! zFX2x@Q2>iFcL#(7`E9UPmtmYlKATjPeo~q?G&u)G!Ib};?t2w8_z&*=;BmDhlj0nk z&Tnt-c>`50qVv|P?UFu`84Tk!ZGxv(@^}#~f*S-$2`GiVAr6H-Q(^>34(QLnR`ph< zEbnAK_GSB4$gMB5&4cD0+v10&lai7pkx#)`AD=yzG{G%}dSQCUrjwGC{r(Zc4U1UF z>);hHZs_M}ld{DK_6>>@PMPG~S(CCeMx8^kLS`g;s&-`9Muz3`r?AWBm}hJhv4%R3 zrP^cHmfl|*@G=yPYzf(cjY-*MHCMe}TuHrCJy6O}DD}+{8(RWL zx`zC5X$BCL5`N$j)(;C;|^ys#)lG)nVPYzeIutOiU2 z1CN&-Tr#Ra4?kjmdl-#owsN0ur|-{yfvA2p(f*tAV*h9RAf~^Dclgn* zxWxehj}U)cOLOf0ZTZKo_?I*p4IoXP9O(1ISnj@f7fX>ew7yF;Vii)_8vqiG=RYJG zx|&Qu0EtGf0zM~XzVz2@KyhgSAO<|`f&hpCn*++7ht(6vdY%F;9uE#np#CUA5VwFe z7yt4MBg}ho^#R|hl7o~{1!(cj<8A$MFLl89*33PN7t$p!uWrgc7Rrp-&AEgYx^s*h zQSOF7xOe^PvFz4!uQl315Wha$>!8(dyb&di{|Nygox<28iI244s?T9^UsFl3*tdCj zKPlCJN?S`!bA*Kq0fN}`;97Fc6yBv8m^8=w@L$|!aO;rcN|2OFEz)FXz$Kp~+`igy z%*V_zc?Qt^h?@CKQdcSeumdO4CeU3E*j7s5H zDjuIc+6E480(aP3a;yoJO<+6S)0>$O;Uy0Q2jb;uYuiAhGsSm2U7$8( zyvbe2839s`^qnk7FH4)IymYdoe48$9$Qe?b(7Z;IeB&Y)G(kaSG2ch=HnA8~N1H~x z{Hatmy6U31CerGk;aJvS>Agsr-t|*Xfi$Njk3=(Ah=xObh}A6t;{o(wKdv$cr~v>T zgZ=tIDs=6_$S=1~dqG7&=}mQ3C=J%Y=VUmJ*TZso03GyT7HRhiAUt8iA#h7=n~ z%6`HSW$v9;0JHH^AI`{O+A36~qu483;_!Ts-5thJIuq>BY@!XF0lLE{dwQZd#V=t2 zp-0v4;>IHuZ43SJCz-W^896Uf0tlddVx>IHjb4taChT{ zPld35~7nLXW@$qr_8SFy~p?@BxMv6j$33mAb7ZSh`4$_R|!Bi7N@BKPo zs^FC9AQG|@9a44{uPF0FB1gf-vUn!MTz2K9q}Z%`R$;ga=8P_chU~T>&H(S#AH`6g zl^TLr5R`=3iB&y^I#5iO^eCNHe%yprC>OLKUc?Nu!DojOv1hHI*~$Ww zO@-wjas~-leDwy#%y?AF<9opkfc5KMXnsHd}~UWd#J*_ zoU!+0N%aBP&=#5yes>T1=Y8C&1X_lm+N_%nFC3*)Bq1>d@NqDNr@R!x-TbQd28mMj z%8`svcpGG!Kero#PE^P}5Ja*o!Z%~P+m_+DEmuDj%SfC*IVT>SN&gjBaby?ciOqyGZUCV5| z>am4lfQ=z*={owkG8%~lLnN=KnZAmuv-jw+$?qGH9YcF5u2dnjRZ zB{PS*+5EK+Mlrc8xAn#}cp7kTbdfgl#zZ~5GM&WOI0J3kzBPw)y7;uJ<; z#bBF9wbn(r?&bV&c-tCjZN2Vwe|5LF>czjN^}0Ro<#vDS`e^i{ja%E7U%z!#!*`(~ zc60$A2bnT5cL9FCQnq##KOFERMn?6j4{o>PkAb+;Cc1X2u0)<pAYzEHAHX%{MnpO7*Z;x6ts2t=I20bj7Z#};)CFNAEn9YE@Jk_J3; z`x!^nsa*EZ3KU+i)yTeKc`RPgV*XIlxOEKhmgtbV3l+mJ&W&d;fCu-3-6NI=xV?_6 z1^un3(RzrBRHK7dBoCN1iWwPa>>HFdip@v51$U3#Bd3E}h>PLD!P^dv(-yxU`JFhX ze9&uUV!9k~JdXWA*nq==BHQDrueTMPVHlAd9Dc&?lgTrGn6%;S9@osj1GB}Ahk^?^ ze~KWl-z3uy)*lP_b2DPiE59Yv|I+vSA6B>;jav}%=@EnB6s}Rl`i|RKEvI29-45L3 zWD)v!ow;lw2M#0RyctJx?z(W}he6kwsLk3Z@C;-lzvh~AsO{EKXu5_QJsik z=(D_(>SGQ?lDc6=&2mhDpoZ$RXb^Y#G;;jZ(3WAPyamNIa{TPioB^4KoUrsEK+9BF z<9z1;couCt-xl!e!BkBY!uYY{b``< zf-H(u?RjYs!a~PK=o`)jJzw(>h^O?mEwDq^8ly^=AQl-sI#=LIvvZ7Ir<;F|^mFa` zHiAJ{LIeo=iN1_4HTyxk?s@|oY1PeBSh32pGKFNiir-m&ojiqPYXP>>X^EL!y$jnx z3oJbM7xm1J=PI&OU-$%eI*8Q_0|-1?x@opZIl5~$YyK|@=J?s_8R))e#;r-h`Mae@ zAH(;)Wu*=<1xe(pVI2fMuZ+iuO;bG7kBux3C0#+>I#)>*QEjCC zFjxV2C)H6=Ce8g&GyO8zkdMty6dQ~s$J4|Upj_XNp4y-sK1F16r>g?qUS6Ycn)&_d z69+AbBek-Xu7NX@b9I~U%K~0v)vtMJ=Og;uTLTNwkLJ+wSUfn>NT2$wgyDx47Ae;1 zzpyxd&HgOcH`eFS6I~q};b9&Q_(D?D0*j-Y)?Ksl$;e4gB0lB53)2BSp0KlbhLYbI zg0&y!_*;~ngv&EQagQ8+)-&7NCdf`Hj1bjy8?nRNTN36R=*^4v@Lf(g<`UqM^|0eX zk}!UjfFfFpU_b6P5Z~K=jb*vtm`jwI7Dh{~_J|mmN#Ovm~qO(%IPky^~hdO-;N@oW7mwYx4-lp6{xkXJA__kz+& zhZp>MhA@4<6NcIt5(yQocht%V0JTDL=Ju=V{KUs&sU}hz&fHnQv&OO`)0pkkbk*ru zzZldjrGK8VlMtnemsJN-a0tg(1!ET!(M2L6`U;d;YJ<>mf!@Icj~S1X-%>l7`2jg^ z@1%owtGEJdIu0Jhll>vNTY6^Wn84}`qYWasDsmuvUj_>N+>B7&+Tq===;#Cs5Ybcm z1;eAf<9AGaa-W%Y0M|q3>zq^o?WI z=jKpYKIGUc;xIAQR8!QHxUCC9KQ67rI{CecQ)XOzh+$YT`di9#5-3{>1jkm_T6Y|j zfW8#DP~a&LbJWvW+(mo9G>~srC~I~K6O1uwC0;Wb(HQoR+cp=iwoQ-h%$CYg>e1oeL&M+bVqUgCxe+_v2P06UFBXk4W810n{pDj(v%ol_qqwHl&Y6H}`=E;T*iYzUg@}z5l_CxuooZ z=`OlK){Sks{o9YZxcS(?`tFZ&(}C^D(1H30W2l67G!ld}9zIDi9bKDlg1W}OU2`jD zd?={>cMGvu17() zvD7p^B;y8!3S7~ZwVTj23Gv{3LRlDKh2Oj=*6M?Jw&oC*3hxX&LfLN#2~<+XY%J z0l-M{749MSZz`1QPYGfFceoiR=U*%IPikvGCVV0k827(%NYwwrA+<^>)Zp8aQkaqA zR0~Sv4J0pK#whi~%7Gln0uro&FE2i;Y9BrW{7=w_ei&W>ic@Z6Fz-9#$lq$~yD@@G z&6QADp3BQnG(m_UnUjc9`?1f~eha5wE5JzrP`0)rs7aaUSv&M@JzN;gZ57al7cl1z zzEWVxMFhd^Vc?>onmuTIf5?O!3BH~66EVjWW#G|VUPN`p!zSncKHfD;b`QMZJKPL; z#EBd#K}k<+-2Rg%*c1}^jM5nj{a1GT{%m(+O7M`Q*KDc1p$iwvgfOZNrVpk=QjZtz z+JT+Z*oo(-ie3a{hk}PSLYDb7kag|@Z+K-9U`-pV7o0wuh z=}Z7RX_YjiHt~_aS?5RE+6ounT#_uU1>VCpCm5wR zdIkdHgicpDF^K8Z0XYhJZizVL-(CoP}fwvr@I%|$Oi0K`&H`&;yuOqPb3*9nyXY;X>1RagyswSw{jemFO^nK;G z`ZnA&OC1OEB6f9Pj=N;c=x`v`5Dyz_ryttPrUlWlL(|c4I$=6osnjaC>lwWk=AlPm zIB!z1HX?J$yak=6^>`sw!tr)QP#T#J2(<1pUCKYcyBAqX?!GvDMtB2~pn3-W@2X{D zWct(i?Eg`=9Dg+s|H-##1n@12{=E3NZ}H22e2X>Wi^T?CtiXtnD3dFb7nz#%h_wO$ z24VniMVl-``{0m9vx9y}^*vpa_3ZR+06H$cFidX$RhdKPjB+FDq%3qu`=BP1MeGf;jA zQUO>vt@5N|_qmOxZ>ME8j*JIF!1w|%+;YexnQ({}@3zJLKft~^MJp5<6^DBf!n%Oi zo|LoW>==<^g99mO5A1~V=7?`q$&NFi3YzZxsNaHeWb%y@0<)i10+(~R1M>aUm>~d> zxUO;0d!h-+41H3-)BaBB)U@agHmtuW%2IXT;CIxGft4NV$+UH&I6%i&o>A4rohi&4L(P4J=8r6I)EHUY@yuZ9ix#8CIY{m5jguqoKD2gkkHi>=S{mk7!fv zK3RsKTmrfA2M|}1EXpV*EWMwSsqcNPR;G>Er#_>#41MPD%vhChNVjPW_y(aq#SQ`3 z6ywL^En;FOcxgZ=oduv_S-dEVpV;eI>5dS z2;Pf+)4!vS7N}y-aWmlUG&)cuDeF~P^!8t5XpAcb^i)t_5)rG~K zj`w4;$beB>=VckJ5{uFN(qI@LADe;jaT#wsLmxFWmFBD7WYBTz2g39Z2+t)TUb>|& zI~vA(S3UQp%!%RFIc&oK#g>dqmdg_y{k^w1uPV`5>RI}9`LvjGCY0pYZGc}L`sFILTYY=eA)G@e>KhOlnP6spjiL{>(T{=+kyt$P^fVXrVTviyIw!fJyN%ZzXUis%if3Yl5)3_IW^*!=V@y`0e;B2f4g0!HEP(7$S%lv@TIt z*4#YW5+m9)s7F=JtigvL{`&aR82*W*qKfMWtc-VtNx0uU*C5@OcrbxPI^+F` ze!lFWc}J)Z%t5Xq5n!1PlFQBD$7uG|x8zddevc7S=s=Cvh+EQe_4a2E{_uK1{~&0* zFi8-#*89v0|Lv&Jj&VGEkL{2v4Q4u!QV`2(6^i_cHj#eUH?1XR3M>Wnl1!ZUo1r4; zSq-Q=IiY#KlvEWXCtM0Xu$m$jc&oo~BPYUQ{a`q%dl$>p(2wfHGO85=pb+epGw}tr z=q^^Clm!uRVptBEOI?k-*Wzm@aBmVi42Y<>f$&^ zzBCERAYeo3CIn!#+yiW2HiK=ri#(|xg;~V&CM3&Xbg=~LEWR7ey>~v-tIs|ZHJKZ6 zn?~ym&6;cDP#Il0wiiXm5VAPa3_xiFgoDf9X7?-A=*Q(gS$UXcG2k z{AgM-u*>bjl2`n~9*kWd9CwW@_i|f70{PSCaEY&vbKbFQl@MGj>61kG_V3Zryh z=I&H$VP?xz@nfNwT*d6lAaaa#9TC=_;;UssZDMUu`Zfwt~pJ;o-Z>#bTIvv$$hwbepid%9AC)jWwwp^AlPX$S$ zsiRRo7fr)R>CY>*jQIsNfwNL-UWZ%PR%ORP+&aNY>v zYSfRiCpycYF#q*X1%zOw{W+CmDnvNHLBU%7 zUgcJG6eSmyOPy?T^BkR28$C4e$iDlFOMdXEW?@P8O)naKB%H|xero)LW%?}sYg z`=P4zCx%(_e>2SXe>2Pk+yN@A^Z2Q{MHMR0(filmDvqWp7=Vg{K*D7MjWrOE1yHD$ zQU!_qmH*>5APc|&5&z0;$r~XCP4aoHAi!4pdT?^TpReCo_`?q%dGXwA0-cOzL>*}o zgPRkczCU6)wuu0-9Q!;eT^WE7tkc8-Vh80wH0gO488VE$Brz>N{^khO30!$c?jR~} zec)_@5114ld{B_V+y=OHYImZ86C&I6=Rzy9mY_|;K7mpWVi8=x{3Jf~_R!LXa3{!) zef=(mFVOZq62t(Mpeg_*Se1d$Y+LqSaA7gJ6O2sAA{R71ycMghmD_gsBXc1d5IpS< zIXFOMPJJd7WNPFm&#p&qJu^HF8Lz`{q(JtHzz!o?P%&XCTNu2X%ipA`qJrs>75nG{N89M35bcG zmvn@Zgf0|eM;(KB3gn>2HB%WpUJ02ltz*CLG3U~Av_ja=OS2LWf}@v0l=d+rP5E|% zohUxwEhfS$cP?XKAX|K6w$qp~ebu)tjhH)oReB;3MIn!VwjG+G4!Fi;G2k zZo9BX`qrSq(=in{@RXwqTU{wXx7IYJAu9sn3cC3a0I=X6mV1zGjuf+#)nwa@SO#os zQ>N7{S)5W0QPUU;F!j6hPG5~uQG*QA|ZmPLggDk?E^^TIAJj5ZNcbnIrNx?fiAW zgA%(+vCowIbF>lZUA=7YD#QF*iL<)sbp8v7M!k0M@9K~J9~uz;Qh&RDR(kvvFeCm) zz+6W9F99>0s9Mg^l9rv}d2Q1I_ewq-fkq4ryz zxA+uW?rb=WjniE2>xGl}fh}R<;*7XCVwSmttNlphdDM^gVawjV^(Y*ke{EI-5XzW! znlu9?rn2keh2~ud!eo%_dG-yL=i#?^7k~o%t8wbIf?V~2IMIXQ=X<*vis7(#=yCF) ze@aiYf96;;83`U68vGCH)g;f> z@z5_>X)L~-3Ek!4Z+i07)IS#n*r$QU(xJonkMjrnBu$erM}07UGLF0MAFU@_m&|a< zyd5KUKiaI}CSyiIA}Ug*AnT7yN?{_gB)Mz%%tSL-J5cLg@qTY|80<^b^psF$F+1s< zNyZaP)OJ{dVEe9>iXAB>ZE|19lAlAxbePafDmA8Q3=w-?GDf&gSv#(XRBN10r5s)? z4hKcu7X(|x!V{)tnI7yz0DD?ptVSSb3?r(jcj6LEbu{v%IfvEIi?DO4)N`U{{QIqT zXOeH1OIS8P&-klD?vpRYo~1ozM8xF0;f}bh^1$Dl=>#EDAQ?BqLok1W#f7$=c&{r=BhA=P0)c@C1lZwvCBgo zw(ohx{qwDt$uSRR57$I;(?7~mJGk#^DTyBC6h8|sq%d!BnAB1ixuPLQe&S$+W;#LO z?u5Klj)P>l9jm5h)4W`5EsOnQVIHNIfK;ZHN!-kfX(1qPF3&2yq|hOshw*rG>Oei? zyLq|hT69D$LRo)aMW!f5;PUD(ET~ghC>qo|f3?)*%d&IkOp-F#m0;(-hbt%eLc$Qm z^*6U}cNn>hin0=4a6Ai!PYMKc)4A3HFW`lAtag7_#hm}hhQP)8S2^ULucm*E=8(6z z{Z}*xLUNqmSJP7wBy1mK(P)<1*x3*&H@z6>7YZ!O7o?L-q)Gr_+kA?j2_AoeV2>0s z%0iz_RjB5Zk^e4)&cQoho98!QyL!a_JWjvW(|HUFey(=)SHB9>HKBh`w}X($?5`CM zePq^qf0~FYA*d#dE-GxFa%+x_1NrZGMv<1EII2#+iuiHN5{35(PfDltZZxym>To9B z*nGLZj(EUYFY+aXs>r8?F35ld!?92nk~N3)gqk8E&#zwnq|q>F9#ou_Bmon=f2#!C z^1Uh;q@L9yYclWf`j$Upa69PP<3#wd>)V_xzmlAUip1Bm6ePNz&A^u?c;jpkqFda{ z4kca1C+gtKBAi5hL0u&}5m4fU@g$#tkC(&e%y0~Ie(eaO`6{vzQ_Hv+_pMI`s@+J ziLaqS@!FDcD-~|Fh5cGkQC+B^h!mkiY|09vNq9ZG1P#utvNj}_un z?&gwGf)z$r$X%264OUV~K92azk8#jW@!Qr03QV{(=as45IZv(8_T?!oN1YM$_X<;5 zDvTMPp6ceJ&-nv}JSs(!JnGDe+6EBrGT-I=_!zp>W3v?!hW8R~6D5TLo2OqdN>@ZS zHX^p|I>yLO;qGVQ`p&+Z%sOhtZ9hNwGMbP0z;rO#)Z=h7t2m+_Vx5&tNUhY59MLP; zjymczFYWB&d5Rr>ZKrRYq6f1GG^AG2AEvG24i%wU25T^{hY#rkenBf&45ak)tpgW+ z?cPrad1Z~58@-cI8donB(^Mb+7Ft}Ffsun}_EL;#c`+y-wTZ);`y~NvdIRf{ePZ zzq7wm1$W${`jK>V8~HMyQXGb);pZkAt32ru+)16MAN0falx<#@VxW@U&u4q6%?##P zza!-mzid)DqD5P2kS+E?-99cpL=w32B_b7r#}qgTP5T02AZI<#KkH z!QA_~^cVDV%!cm$#HXm;J&%mUr|lIM+%MUgoEIK52Kj_8C>`h|&-z64JyAPv4$L3I za~K##*=1nQZmJqfh2g|x*F7F!G4?~|{;uk|{+X5Ge0-)y2#2n$0i$L?zzS&fTKxU{!}ipd2)`J2PMS1-#}oBiF|Ol+}HgI|b6`hCE8EEMqWd&Hfs^EwDXVNNakL^JaidS>=;hA=EYQSY<%&TS0 zMZVVxPUP>&u$5IT`Oeaa@BfFKrP7@@R_kQU9}sS*%BlKYya$y{846*BHM6Xk@W;%L z!FP>xzWv3@*vG~E$?^b8t4vp4Ef&nu(;>B4aW2=*xQDxkpG4iz&-N`i;w-R^T5hSe zl%N^cBRA#Nzs&sOmrh3aG;5u&KUtl>S#M9g{*;yZ4PF{0e0(@y%>d|=2t*jwWB#TR znV9~O9f6bmFJ1I%%KtJIL1F%Br4!+13eR=>ZYo0FWlhlUj}G{fMM{4?e!;>P_iq$; zB;XqBa2p@74*3U)8|@v%t@591>@&~*F2%*u=ik@Z#a~}&-mkF^3jj01>Ay;`MFI9- zrHHN+=opaEs@J01sN@KUw5uRvQ-VflX2bg#&l-|%Z>-quT+wV__vq67YjNV|&vz6z zCU?>~u5DE|a*b=l|JZo#QXQHL79xZ?L+U{zjHaE zd2~x|ka$dLNG4U=2haWXVn&oY0D}IBu$c_0J06;r!S3eOcFHV3cT!9nI88a*O1BY9S-8V`40iG!_n?df2cw`7x*K#+0pCZ zj~&jvWp3PSaa_UhodniFyLAT?V23mJdx!H&ZV0q7i`n7BA3L1fntd4Rd%WUoiKg-Y zwZq9Bjr@8y9*7PB4>&WsCpupSQQ#Yt{uJA+bQVKDkG^b6i3y@nkgg@dH4N9~|1JKhG77AoKGib%t4lwhALm>}4x!q|_Ez4VIyFx~$y)KW(QoJ@RQ zid9MrH_@LX~$A8SlE`8ZYJ9 z+Hp4xXq3Bu#*6d~OR2dNn`u^+b0Q}!C5zfJN^fWK;eED9eUAIJxI2uha@3ESvaE2R zExwtYRhH1hK7k#nN@&|w^kN>p=}7B2}LyuM2biQGLhNH zDbCVAuDhN)937a{=j^j9)GsLy0|rzc+lboJaE_qc)_UAaJstqKt@0Li;9aOoIY7vZ z(dalD=kq?S0%+1})Ce1;7fnET<4c(MjEHVD9O?{mZ;c3UkjvVMxfm92XG&xSm_kYS z=}zK}hd2PFLzv38?c(*`^kL!tSnS4q?r8z(FQ=VJRX4_6-)Cc>QqkkK;X{ru+F^#0 zT9Hz)78>Kb0hl$T*XtY33;dyLuo`MM;TmF!Vdqqb&Q8M}S{U2MpvY-C&`gUkllSEg z=#W%6-hI2KQ%igOYyX+@btb_E& z*@dsK(NCXgTOZ9pHXm>#F=1$GTJeB&+ zim1@>nlY;IQ5v^7iUcJH9JRJ6X3iaLV^pfILO_}Q5D0^niM5_}ebzS(Yvt&>+GXz} zEc2}Bppq>5+8OWatPl6fOzwTNQKLymIUpzT!D@I{4Bw_%n+e+!s&yrmAu7nC*LJma zhH0)GF2deZ3szvBeS+w-SZ)A)=Zc+=PB)ps4YSiuKOv|-$c|mA&11m`p0s>_99zOM zp!;1VT@VtKU?MPOU370=FW}Gja>3WsyQ-ID&*dx1a!>C+L2R0eF(!W#6~SNizs#9k#5`~hf+ct9vPY&zrD`s&KGMv{_pyCW3SlDtPu zHL2|j?0DtR&(wb5pNG48#E+AAj7uvDb|Y!Siz=eF@t@BkD=lc9Of|ruId&>x4D)GY z+@cka$;Y%4gDF1pUAfdOQo;T-Uk+n_(TcqnW`^U|G`w&u>#OXJ7nRz<23JsJvPPTATroyTA!JMTASI9l;h?*_bdoY zT?L}hH3G8P*yq)+S}sH;F_eXss&V4GN-8+X6M!@ z=8^S(gBoXxt;MY_->HQJX*2j^l{SW>t6={gUm=$?9BGRZ6`Hy_3ORav(Wv z=&ue6kbq8T779j7tw82$OP*aAfImFG3^VAaB|YvmJ>$tYkmj-(*CrjPtBf-p&0;VfRn5LYv$C>aCaUUzl5#y61YKKKzYpYHohP1;R@=Ay62Ck_Wu7@&l z_$iFukLkO1&wV)FV zFDsrXL*{C=ny2siR_H&8&ab~Eba^MYwlJ-tCvz_)i zS3K+$U0)}>vV8j);fJ56vha;@G>j9|q{o2oI0B$)jIa=r-fpiS4lLsdxxxd8gwqpq zat9PD zFjk$xOy19AisvY3Ep4C=5%bs$-BP^;hsn!Gp10(+;AyiIBaNF!nK67k@&~$g(WIX` z6Z*_UeY~+RhCSu%#Z1qijI7}(ghfYpx?POnzu#1APL(tREuQwa`6~7Ek?44YQ!_sw zwB;r>i-xP!xrJV-RnD#0!CAVcsx4#cSG>yIV2d5-1F4$uCsoDTgItVaXVDVp^$Xz@ zz%Z7U9;#JSWt)BVuzrT|gCK5V|}K*pH5)+B^8FAf#s zGEGabrAYJXoH_ywq_kwTIU&ED=fY!$Dwx+39&IIl2#V8QAN>VeMB8?xSiDXij{cs=~>t%>G>3zHolakLVnUAm0UWunPYVV`mu^SGsL&G`PD% zpm2A02ojv&65O3Ykiy+v0|a+>*FbQ05AN>vRr;KJZuh!SsE{&^sT@=1s-tAdK$f%B4RH z9dO&6w}VP3^(~)sJkuuEv!NaA9P-MJLcxm3#-7S}To~RGu3<2lZhp~$cwBzqR_`{e z!}G3IgAQ*p1Sh}R_(-a|36Ga1sQ(aSibr6d$AD~^2?)c<(`=H7GpS8OG=*SQFyF#9 znSMcA&0=|W=pIys6x!jwZ(#@6%v<&~61Ll5o~e%$oEf{kpikN+hc>#Et>Ht@*w62` z?;o{v##Vm&cF?>1Ne_9j*DZ!iWWRi6-{AfpKV3WdUUd_8?t%Ji+A(2k(*F# zlT3F=lbf~BI&Ofr=9VHfo{keZzP_yf$wf>Dn;nV1%(_SZiIf!yKDj`e%2bj+(!)Zs zD`~dJ`;3oTJ2nz&siT>;^j|G(TGgF7FA*(Hd8H6!TG$-1uR>R$J3TJbdo;)A$xOHv zhT>Kb`!Le%Ohnk0q_>XYM0!^``5BK7C!A)S*O3aq)I9`5ZHWn*EPB}J1#W^TTcfbX zG-5&?mG?OYHHk3>Zg%%>jg26}62r*C*cM0S;KZN5bHR&ln)CqgWU%{C^K9jTdkmH6 zx3;w`c9q$$uZoPLC!B%=oC@}>4=m4q zzFrM}yB&c``QH`I!}TY{)c?;S%*xEo{C|WOv+{8N}3vJ-c6Q0CZEc)n& zopPPB9%e`%napj&5O@!~LpCPfZb0yk_f4z)CDtR4!{tZI3JAH~rJaiP5L@G=0Y9qWAj zJPW%@=*U3D9NdJo`VW|@MH-?0C0ca*Q3clJs0k@nmFj*;jFFZTS{`%^6s<^MgktYc z0q~)-+lGp9kx(+|agoq6_{yg*8<=sCFfu$81ZW8|Qk<03pAfZ<%j;rNPfh_r^n-O| zgf-ZuRQNSWh%z+WI%QZ9B8=s4^#Lm_?8Vs&B#M^ViZyf-vpqkw)Zis@SF;?cLr=64 z6>HKmKZ((_liX`rp26^H7}??V(A{_m|43{NVy^nscZ%7l&7nyrEh_ip5D*C7peF+! zR>vo0UioEpYffwAMQZ`>%W67{^n4Irg^P_buEODx@J>?rU{_3c*$HxuCgyU+t}Vn8 z-R)%Vn*33(p-}KxnJ5?138dm9w5};n=kkvqrv;RybI=V}c8mN)H!b_v4rl1k5mGIm zRah+==vo>9SDEIN;(=u>7}E7tBc4%OIM#Xt)pv8x$nvvvGoXtXJW(?CUHx2mzVJ1G z|5{13=;+PYuEB#+w_{OoIEW>5mG9CaQdE*1yAT7wSX4PAlwFtai;N2OxP`ZKEFdp0URhU2oy& zmj@aFAvNX?!8BveFtj@DMzTOEE#0s5iA$sXr^Wphs`vD>UR1`keq2j0X&CAUz*@Ir zOZ5^td=A%q+K&0DM9XQ4h`z(L#CgH-_|>vIzL`dh&L$evmw=))j7uFKv zY$=?SFwWT?l?0Kn(U++Uw>n2rKBut2uYyl9X5@wf4 z?C)-vuHGDosJUsvzvvrzr~bWY=|~i+aOEgR_ukaiwGLtZ7%R6kfbps{gk25>4Xm{(QdNyF0hu z=5}>X%l>~Rg4(Ih2k(LwYTpmc^Xo*`%Fb&7=e+*7KBz3Q5B@?t> z%P>OX;%2S(-~TbPk+BaDWFx8n)*fuc6QVbQIBaqq$H=xt0h1(yoP)#G8xXE%C`fZ7 z)vVwJW4f!r)WT>QbnskdQC%-)!&&C3i0{|w^?W`lXbtpp>GZhAM{sOF$A7rp8zAZQ ze!E!hZPW+8oZr553JQ8&H444%yd>`p;Oq@>A?s?4V9{Oo770DYZ1Ug}jnp&lrjf=) zM)pc?0$?~vL4Vxohv~t@up#<0B@T>Hd3ZG?b3#`kLM>)vKc8;Le6P^-BXQ3u)(tF|9hHP@#4eBiELYs0-9G{QPrYAfG)o zOj5`1_a_#;IactM=aH4C_n2@O!y4NaG0k-M2kE(8FDcqb3K!V(B|IpPRhFM4a}9@j zh&`P|{sHy~vq&Nf*h10Y7fqO;45(T^OlhOf<=Ds*i^l7CxRIEKy7)z0 z2_A7&r*cq*sm64Af#3bLcv@c12zTCMkDL7pbd&{j)QNDeMLh)d$jNY?O^1SUUglu?B|1|t_9Z$w{4NZywaIaDUfx};?l-<;(Tng(v(3%2 z#n6@1xVxEFSk|o;lz$RWuKsGDtG{H@GUANE^q3DU7+wInbu-yu=E26y+mF0C>vNaoO-`0 zA(ZW+GNbS{>zI{-uUg^0!E7Y3agZ^0T5lg?ZMWs)px*YD%Y1{vHqKi>^G_Rvl<;E} z-G2GLNKfTcw>AZ1&~>2H`fZgZp|!$|_T?>Lj^lj4f^*gx>-9;H;3`!c;#zAp=p!!7 zjN9kD&tGQMqsU+8^s-|1$2UrU67Nij-e(T3s791|Fn`9h&O=ABti<9-3#h$ z8~v&@(tGR2&GlTa6dORM@>2PtuI51$;J=^Pw&0idNRe9YcZu3Y430hWE>D5NXT9za zESrNeCu~tTD@q4ToYc{0f=$7t&vAiIxRR@k8T=I)Rm%!OYq8bAYgsF0^`~FkLQY` z<DkS-f6>c~-5$4sc2q@~C$G zNcTF`jGyv#x4IPPb*}4YU}rPSXb^hXYaSlgjlt|MRZ)Oy0}W4mJ1XUQ9;Qu z1B=qkrP~$B9-i-EmL7GWceP=Bb(Qu~%OX7fd$hgJmtuwdJFTrO(}wCzDvwGIWP9Rl z(J{9vEUw~81lgX3i{qSUfBqhAAH)-oDXa_Hr3>1;HLQL%O6wgRUy0&e7vo}@FFfB7 zJkfc!&W>4)1_LR!aRb1NjCyN;z4%8mRs%Hb39@pg`)YQUU7wKU)eLIk>oOpaDeD$@ zw@(j;a5YRizZ>|zC>Yp@e*9cQ{j(%u%uJK2MZSN87N!R2loC&A(Z_>D{|mIijnd^Nu49&sIv6+eo8%?P2j!QQ+D_TKN~p3xmw0!ug@DJC5tHsO=n4fK=k{j1 zRvIarW}BXWN5c7GLYDksUc@@i+<~>|IzyWinK(FQ?0xZE9x8 zBhO=pE|8*Xf44ARyzq(h3#n_v;5%p+bZ zJuY|PK;|o1B%2*+;nY`BsKy#Wt&{v4+p(LAfJ!@=Ss=vXOP#dp93xPGf2TD4uKHCI zW(rq;?aP4)rqiH4uUKQakSPa!JKmIeMR31^Fn%l()Q)=;ty#|;4WK?9V_EiFlWe8r zeVXRQ4aNoVuJFW(%vz~`_*DaFo;}!kMRL`_^eH*yGldwO6hkw@o9Ipt37OIDnN z9;uXFWKmnTlaIxYgCHT|2awPUCc-p0_wQ9# zzbWxDjz&Ck#|><8Gv<&F{^)NM-iiQ@LnS=uXCq9qH@_C(Mr-Bs18_o+RxWl%A1i{A z)pDm?lKD`C=X?oGK;R*_qm(4B1OWx?8iDk?hCKln9sE?{C8X=XiM*cuvaJSEXWx_IC`m#xf7q7QS&cyp z=M>Mwb6euQj&&6dsc*x(C-5XHa&XQSLnWpT6;FEBD$2T*H51*A1JA2pH47Z1 z-ZqVapcT}a{GcOj)Rr(Y1V9;2HfZ({$UU8|d!JY>&j?g>1 z>&mnE!zop(69K7f^zeB3YL5(O0j|m4gdH}b=d5abOo1il0BG{StLF$(y4~|1ckr?A zPS>R}S@M7wrp5}V(_be%f*u5clr?H}L{p~YvfApAq1}u@jAOA^rjji!L(S*!YG@N- zj2FXG1}=pc4?;f=Z=7Y7QC_Z_^O9>CG68>#ol+{Q(GV;5=bO|aX1cwmiQ=saLAPTr zp|*1(=^@&9kXZ2J7FI@mdv;;=u3-)#~A!boc%Mz%p3oUu(U*yNuh9o1{?#Bh7) z{d!Eqg>$B{;)w9Q+j5aFv96HwUY=EOS@IG=6HKg;xdAu1eZO0;4%LBq$eoo&J?3^h zNdzOePuCFeWSD>Bt^L@Luc)--zD5D!XW)VR;{;{3%X{hb5$p%p zsZAj1st>X{Sl#uY#LqLBrf)&5I7TEVP=_XjKc4OCK1|&}jI0lgoK#IBo9#a1wq`_+ zG2(c9Tb8*-)$t&snj80#I+|Qau6c6kwy8B6xMl77J zsZgsguE!^@TmDsQHFcb@*Q(emS?n7UzNx^D7o39^7f@f1uJUJYjd}af;4=$U z+@u`a9c!h22-s7l^TJy8AjKhVz1ZQgTk+AjD+Xl8hzcpA$em4guktwrA9tx*_a*YA z%Vi#v0oO6`YLkRX?DTI!mRMNX{-M3%FTra6b8zMK{`1%0AWiHU?MbqdEymH9;>vZt zurP_mD3b-51o%*4nY^#wSHLcI1rc|~^v+Y?KFw1#{UjR8=L!1ry*-l8kKYnalb?sw?)7Z^ zU=squ!l~UhI_j9)YL-k*42_Y9_O05roctjuZk#04{%v7f9j+&RGhB{NaSv|fx6K+x zSMSXPT`s!u^Gok0LY_&q-C4Z#C9ok~#@+CvRx*AW` z+_7QTy=519u1B?rVf zWpI323pB~gYn*Dnc&fm^Z*Hgj_3=0-QaXJ|OUIpqVF-+-e>^SP?|-qj|+V{(vt&ACE^V1BYZjEV;@p6 z(@#7ft}*X56I8~!%=|@(@9H1cjx7wYTUz=|Om=j>5fR_|N)Pyt5cuk4-=GRSHS8mG zH+7xoD+ce^7Z=h$1daXBWz0PS3dcKu$y7nQM+Pw?O#W9|Vq@D<0!mF5;x*P>#^R+hkHt1L{9t8v<=*Y2;ZEpo`%g^|c zx83`{sAcXNi`Mw2uh_A%5iPzc0Ty`3+A)dGeDb#??Gy>Vr^ZsVwp`shoVmT1l|>Gz zJB#~C4tgI^*HO;juJ;gECE34J&@-+;}?;Wc}1DP+QVQ+4d1Q7z?%0|*;Ynu&KgbA?EXW$Xn=rb-a{rEyN{REZ@CmVc40@ub!Uxo%K|_k+FssT&9N@p$5ZN@(uy>766$F6Gk+t8qx-p7}_SS-~3NMhHX5sDtuU-&h)6 zBwJ3_A-;VEDeC0z%7TwjNiSNsl$Ru52sCK}c9v2BZec7zBAjn^WJI9@w9w_qV;1sr zbB$$v!!?(<+4GS0Z1fZ>3D~8^2FF~XWR6nB;*=WOZO57(+y=B2B84Zj-#6zwW3{CUyW3AKquFV>1 z`am|OKNdgGSU+by_h~M3{`Gh;cp*sN{;^WGUuSL*== zTreJD8ND4|Q=FlrvmmV?q)*=Y;T5Uh)|fK_PW(e5F)?Q`BfR4P?D#ma{s+eHrezX~ z88?vb0Xgv(_N<@vFjk{bbSs8jKJwPM*9rljKQIx7;Ym&TtQ{?2+M0d7TM}l4UI+Z$ z{_vMze05-<%aZ9u^?9~ouJ$J)?m#lM9YlItfHbW^6RZ0m#etzW*dsHgyimu=RMih` zi4LydgnAeT26bh^F&KlDcncqHT?)MqIjUNY;??I*cuYnHmY)}@QE#5obc&;yhT~Qu z@?}p(12X7nNX@|F*5|%~ZSA_Ca)9B4+s2TfF*UF(*+d?A)I7k|-G0yC4=f$|HVuLn zmGh5r;3N0wr9?i^xQ@xRHnc4*&y^N4>K{ChR*l1-uDspXy-$9izEWrWK{)zUv4~h! zW``GY^ceHY1Pq?B4Y7yU6`zLw!N17jYu=V5*)ne44=Q4W!vWM_Q&3vs`b;JM(%*dz zaQ-8&1rIy-Ulb^R@>-aJycU?K_rDb=+KTI8#D^NE|MFVc$Ac156L>8bU?YVYw$De? z_b$wJZo5D%0R>j5M~vgs%nHHj3nx}V<|w3^^%0pU>cuf?WYHRrg1}Au>ej1pph@F# zuW$RCu|_WeLK4x~DsL%IS`d-^x^2LOtEd$3wGu4!(^)Xn$DCi016XFbWKgfDJ$_jt zMz!nNH?k~i6IA%oui%k;0@>NY69tRTKHgGlzrk8mK~4ua!2&|WZQd;o{{_}6;A2DP z#V5#V=Zq6^E)4$X1PeYgzCpzV3K`V@d*5KM5z2<4(3%GiC#N69{cxdiv zsxMsDf7*+k`I>2iSSjGiJwV>NakBGL&#;2a3Nd7VB$+_EC`ojp6;`4AltH0=Eu~}) z2vBibfn1}giEHG|mRKc6+;_YNR*gSpDBH(B2NWTVe}EOs`xZcpFWGw8zW{Z_OMA;_ zPqu=_;Si??)$fEEW#Ag?!m04Cq4rkQ8H0-rjnf&WT^rnS!2`x8_oOnR=r?6xHoQ(B z=N9cMhe3c~I7w8FEdmHwO#5Q|L@jI7Jy&Y+B%0Qca1LEjbWnJ0k*-Gt?o8n8(K;^I zl8+PURp03~TeobI#ltYhCW_#Y-ke;*fP91voBGmFSX(*&3us4oyhyphI%>l=&vaOK zZCIxADOg_L2X;xrhRnlHlrgbXBXPG$I57|h<5LM&w#@q+_fH+F6?yYAONOIo*CLCF zd;G-Xui7J98VTeG*G3#_%Hgj>;F{vg(lIjJr`EMKm`312(71wkG%(xzsJlCjA;#mC z>Imp22cwE4JZ>D9gjlp07BbPf2rep-!x(ovh&N&&~L<}5;^da`8pEw z%n?^1%cQ=@YApi}s}C)UZ!^!nW;92M#=fD0wUjX$c$p)dT8 zpj6mvrC%4R9l-ppyR`=iDMad5_)0(yHp1@>u*^R;z*aMaezkr@&6@kQg+t|sNZh7j z=epIFxbLSS^rAs)Lh{?&0YVg%W`Q!Ea$|iR@`>eX0y{z6AAx;BHH2$^%xR=2@x3I1 z{We`Re9Hj2Q#lxW@=?QsrNtQ*Ju6~D8!x@uKWDV@nSnCe5b*?-qh8UZ6jHh-9%wcl z<*JDad)8F7ELtiG4RLZh7x(s=jMqQ0s-z)*NMOq;j>yW zP|^gVxiEe-r@=NPO-LHEQv9ZDNOFrVI3t?~nMdqo_KD&-A~aTGw@W?qyQEOH^y*rs z*hg`;P!(tqH52<+()`7H?z>tM|6+isO)gntWK*@IRR~_DH-YBoD+Dk? z(kA5qkXC#&rq+wuIx|AOn!#q1^#O^;D{|X1Pi!*vDQt|0?7Z&hh{<~oT~$k^HF*v3 z=r1jMe!Y>C#g;J;_JD+BL6)}yEGg+>WFMvmf)^(}*m{kkmAa%m{MC&QHI2hW#I&6B`{l)&W|Scd`4{m z{bP<63M50aMVT@EQwwl!iR681rjt+D&Y1lAr;JAljDw{-*N_Vv8_*z%%Ff`rK5`Ne z+Pj#RW}N`PB@+h;)3#~nlXE~$j@xjv*)!6E)TD&-}%qDLl+%PETMuG26~ zzgyVHuj-n4w~n1{v`uJd;T$b8j5ajND>i%wl`2C@YP$vB!KN|-oTWrybw}+62I~j& zMOjtD;o`qOaG&0LCu`HQPxZ7S~@`=)8l?YU)NE^rZQY46KE(H*hLvqE2xB^#D zdw1R_Zc__Zzc)(K|5l@CygnRk1m*rl`qhC+`~J=PfQ|W|DdAZEB1fMEaZG-rhR)RY zQN-hmP_%?MdVOrVY=1ZsxTGwbCf`gubnw9o!N~2low@_3OD|qY(ce#*)*`0W}(r z%7lVm7a2TrZxGb)4>*`R2oCnDJOp|7-N~G5|3T>^*D+)UpY8Xn4gmWMY;-dh5ont{ zEZ@pZW#DW1!=^dNg8fpP?d$6gqJuFzGq3Y(eHJtOxxeUg9WCtM0~Pc;LftCtgc}n% zXi8@KivVV;PXlrPXF<~Xfd(M!pl$z^kz-=Z&5NpgM^}xa2%bAM=<6Y3r6;E9{N5U+ z#U*#}9S2@mbkNu0R&4upBIMNb2nZ)qTxr65@fgSkJ5US_=VV{@uY1-xDU+PYz5+ke zQdVyL1+U2)D2Pu8qqh{$i_{oHkv=VM(zaNd&R85?AeFB!^A*I z85e9j4)XAbw4)Jyg@N;?BS*@`u}DAA#m3<$$JV9j17C`JQiOjl1&BFo6q>=CEimn_ zRwxwi7w*L_J!%l{HvIZ(!8to-I(a{98c8|vK8VfV?n(>);b&%A&HHJAk$B%Tv;9H| z#cXbLUrq5K?lWfyc6(0~LlEwStClVz4z1O5JK}2spbF*Z_bxt~2>eM6-0Cqfq{a$1 zMk*h~G!D3cFfGGhVGum(-hHI0Udl@S0!(S}CII}An|DwiTh@+g2^RHI?+aH|EvVSo z=fSqwQ?iPRyQO9{1QdsJNY{qK zM1o+MXBrgyOK0rkr94wAQuYnGn}_L-Pmb&Lqa!Wb zM~crTc)g%doLihaOZ_hl2C7m)J@!>8j~fsJ>#C@I<`2)FBlPx2wtf8sfOejyuBwy! zgWn=_?1nn#zbkRpe>MsGtI6}vC9aWM#DoCrh+BoUP_ALyi#)1zRzvK*v`%6n9h%P` zNn}iMzoZTyt@Qpy$dk}wbSVqUk?;BuGXWSOi`Z3YY;b7=pdB3@~yGQh7CK?V2BOq07 zzyJBLdE>Jz1Ld`K>s_=kZ%;tlQgFy{!=g)P0ttP-@FcJqvvotRIpX%9hkMLu#dMzB zpgL>yhB*bnArdiip2a4h^bWc%JGrRb*=DBz1&v^<#yZ(AuPX(#pk{3O^u+Ke_ntHl zj6z%xI!K8HVgzjm%w<{9YDGMY+nLa=e^rIRg5p91HS+zhG6Kb0RxGrTV1|bDtAzUj zNFq3}_`X{A{a6Yq$rCyULvSZLO#~Abv9=fCLBD1w%ov_qrxR{ORzC>)K|P5l2LAKqSJSTQaMDZ3!F(&k zk&q1>YI(oTh%}>|X)6p-`|Edwb{$tn-XsBxdc6?qk%NfPHCluS#XPpc;<=wRVn2sa zx_?1tgO2C<**1bD8(M-o{9%D=)%QF#P>^T6Z2^cnu5hgL%O75l_nO=OR-ffZ{_p@{A+fApNg$1?=^g-#3WOcJ|4%aRa zMUic!u!ih!Ilv)$M}bO-El|K??We1ST1|o9X6(1Y@%g{2Q?`FLE#vx2tG@a#v&g_7 zW)XU~=XZ!mzq8Q&-065#t7r4^SZ{7To?`$qQ4)NP@3E?dWhkOuy&Qz{gR z2YTQa0yu_ZUp5D#SRQ`j4#;vwz!iC)cB0ureOaqq5M${dVd`hUC)Q|bVO>JuxbWrw zyme7JrM);vb@<4q4~eG?FzW$xWs z`yhN*L|F$q#2C^iHT_WEA@+R<jqt37I-20}MJ<#&`;}9vC@~B|v zPcuFrsvVgq9l{?olGC}nsAce83*=6uGzV7EJE82R%p$OqvY4>eQkv@8<)+Njhp|-t z^4|PX^6}DG*PJmy{vt$l^H8^5yT(@i#2(>-?_rD0{5Mb2=CT{pY0-zh#O z4xbG4i<`MvuLZ7w;UPo(8K{5;5!Gz`E7gNfDkgZdmBxqHfq>$v7x)nUmOV|p5g|$w zz+N`OrVW3-R7LTO<>t<~$^}0}GY%e7G+pRT}(Ls(_LgPbrWeDNF0ELLVZ4`Lu==w5E4<%um{EW+Xi4=+eY+A8Ce~e~y=;F6wlW5?2=Ik@NyaHRm)3I>I%| zUgUU}1*=lut;_&jT-VjxzTXp<`Ly-*x;NPS(w46C?~0b=AFZFcIsdYL-uW}Z=rnE~>1}xGbpma(6D^;5m4VOL zfwtKX!6|G(a9tJyfGe>&VK#WzD+KfYhlxcSwYmEbHr9%KymuY`V^2ug+45})xd+1Q z(n^@RR#-4WR+}WqPF`#7UPE6rQ0qYG#kkLw&B9f=Y?Rktr(My)_&ot}W33^wu5PEO zL)h6+uq_p0Zt!Y9m_;Ihd1N+um`h|+$nGoA9{pn1ms=fvDy(9~%?J3Fb3Ya`ZbwYTZgy2Cl2+F> zix&8?%Dta2#zAirgbK#gSTE{4HRtbhkY2{hvB?pfBo)=D;JX^ZR^kR5@eVGL^|?Ff zi0%TGC3Jj$A^eoAem?I9g2Idm3eC`L7pX1J7P*x@r)BDCRan{SA`fq& z^hEP-uxJ{XhPCiqf%pin7&*H+db*OaD|B0%%Fc`ONl*s;`cqhY*$PU|omiZsLsI<=@P!i98M&H? zpioj1e?TQm^THu$-y(OrFf2 z)$y)ctpx*jF1(qjh-Al?@gI#C452c(6%l$qb_2)F9O>liW7`N*b$-HEW*73FR+s~0 z^akxG1MQ#YBDBsr9NW3;T@jS98&2g_naq84d~`#+dk3tVjyKaj9T<4uPtAT=C8)8_ z9)6-HsVm^r35dMgk_kyuvNCvRpl{Px#S(EFe)F>bCd95|ZcIn+OW<}77DN+V5ov$7 zDJ1mF*8g{9%Jq+2*WBEH0iB%u+3=;|7(|D<|DSE}65c0%+$?=l^42k+%PnHZ0BT&1XOhfFr%)4 zn7WA^*`<+OGf7L7{NEeOY4F`)Q4VZ)N%<-0!p7>um|XT)oliZz)&iarT$!aO;G@tB z;0pMdDE5m2F@fi+J0C>w!{B0;Y$9Y^*Idnp1<(3a>Ui{JaC5j2vA0{GM<(l>?6=*|cQMDVqw zu@6)^ITl*;KEbCwI(IL!2T?*#Q3bK2z@x?KlqlFN2d@Ome1jjSmBzPn5?-xAXDQN& z)PliB2n*R3rNS{c8qsBx3&C(D3O5{ZsEenjifVFkxUM2HECV}^YE*wu*X>lk9hi-D zVwFA0HdtLwXP==aUKX<}dVWa0v8tXo=T2rn`pM6V;X`eMr3ZFQ?TBOyOi1r2SWO@u zShH%NtbM2Y4%`Y@nrtKWieO`Dw)HTDm$MV^gd3;C_lp`~lh|Cqa@3YE=p03|RrVu*8Sc>?7_7U;s@?K%c~ks+7!`Cz)~58wNJRf2-Sh7Zr%gDx_<>0m*`;;u;2!9J<@I4)vI~&_i zHp6DQQQDaA0RcNcaie$S&a^7QW8J8j+z3Fxd&SCFtCC|J)!j%2hJ-UkEG>L@a-@13 z`~Vz~I6xGw*$)fY;JvNVFZ}5o>%I|hzly0jsM|5gPky#RLBHT}5k2{_``YT+40h-} z9Y(;sic$Z_xVF_V`@V=mG3D>U+ox}Q#`-SIs*}E--a&IMeE3c#Q)w{Y^Ah}4q8ncS zceTs?57)(i33Xll(=FBz#IKj`n)naDUNv-8*6C+)=laetw#h=00i9{2_;-r<)>=Lz z$H9PhmO-c&sUYD_KY`AvY4sK_k~+JH+z+?OnuBP7qljOm6dop8xD{xwcE54hp+K$w z;IP|QBWu%gFRWiKjQ{~&*rHSUFl3n5Li6h>;y-|0iSEBASm-^X`y%CMe02uY1vrm^ zOJttHCk<5W*JRd?b}giypb6G0K?ZNX2j066Sy}UBf+s`~5WjiY4n7Z~sbEC)F_SRs zEP@aga2V8<`sj>XVQ1#>9}4nfob}Vg;1($N;Z<>*T#*klNE6=*hnb+S3=s2BoZ-1ux!SDSUZtux0thnK3O!`(1|g$di5G&qN|7 z&W5t&bSRs~g&x5VfZ$EHy_v$BHv2TPtlgSRudaN{U&CG$O~YzYvbB$l+x~e|kr8W| zo^0Q!I&TF5LP=;FU;MYz4ctx?&ezSt+W$Q+^aCuL z@3ipi{E(jCHb*5OH?RU9-6lL;U3l{c74-J)mCfB=(ZRa zXJ^(1{8%PF%GIJUW~~a$%}M%i;bWtAeZ$Lj6x?|m%a0Hkcq?0#dwSL$?Op_!`lLeJ zL~aN}mt1Imw*9o+h8}^cqgEK(s4Qv#Xq&DQa?YrgoGB_eG|wyIE{Vd374kDo*b)5& z5hm?jwz5}BcrZZUoH|rI5t(Qdd|MihhxZi4}pSrEpZ+#EpEe;Ee-F?*2HNsM=dN zD-w0@9rOn$CeEDZ7o#8Cj;;sCL@6hjX}Px{wo=i2u^Um_U5z||`+1UC!W%9m&&r&U zCvvGHpicHqR)u%y0v%bzsglG`oGT%IFR$5XeGIDk6}RV$YexgjKu?Aa9;`%tc^+P! zkuhTBm4vn0H@akeU!Gs)_^uDOkfuZuAI7WV?-u%uDaOf6(Av1@$Vd-eUisSPOHs^V zi691e{c@+|54PvL;#Aog=g7D#>Rqk&B5TYQ+euG{a>(U(s-utKyHu0(VPW=yXiIT= z#7_Dzs0B*EeKSDKI30M7DVU$39XM(N6P7m_shd!iPw&KdV-~k-!WyRiO6wM-X|%|( zDYOev>4E{(kk2zG6&f~`9f-L$6A&^F5FZ6>bMB&oNi+x2p`)K>E{q4=N)Dt9rW9{Y zm=3KdySs@-nOocP-~?=pNRj^PvcspQk5_WsEto!z;OVv9*IN`+qhxO4ojGwhU-;0+ ztA8kx2@{QU2L8Z(5Oh;bv?jnPruJ1&Y)h7@6Is z#^G1uq`vCu`vw~9p2=lC9k_v>E5Z+x94ZQs`VMBbvCjY57Ggkl->mQjD68oNq*|XKn&wLSXGQ4q2mg|cXlG~oa^acz zX%zP<`L4?In*Pef#O^}qD4gIoKFIK{JYi+)R??3ak@V$-`5uf6JuP0mtCztV8^;5_ zbcx@u`rsl++Y2zw1C%XTEi~{IP z9^f}Re)30Xg?&A?B&=^|Kou&z`E~m5(28XQ_YX!Gwi90$Q1M&fo{Z&4V7V-?ScXKaf*gce_SJ3v2a2h4t%(4>uk2F$T8hgYMEg zj96Q;WPw{%I$R?WZ?Hs?NJ zez%(sv0&cxtc{xrz$~$s8lK9w=JYudk5U+vE@B2Se2;)lXO!W#R+H&&iTq^7=n{IH zWQbmH9?|A#XI*e*{gWt!&4B6y{PH52AqG)MU6b364&H~Zo)@tQ{w6)}&pR)YlhUCp z+{*|6ApvmZXXBqwr~HCJ695`2mgPVeC#}jwl;u39X`N)v&^qk2G&S=As=8R;cybOM z^G4G>8*zylbMi9=TA`@rt|FHctwqW}Pfc^^M~v)ZH`TgWKdJL3SU zGAdw(!Ic>bm~~bt4jeO;GE&PCM2ky{j5(G1naG;x{FTR_0g}n&LXI}>x4wi8eI;h- zQ%(gmS8mX8R6t0{RGWG?PxndLq4q70u#3PkaFT|@jojspR(+x-#*7ftCW6$?q11XqWPe30r(Q z>BPP3dq6u_W1{U@e^a?EJbzkV|9{a5EX?fx2Rea`mGv*=!C4)-N}@)j)jM_bMVIVS zrZ{v|+@CO0`1|ieYT0VcRdQj&9fSnnzfE#iRkW}Ivv9oZGAk>nLHpB1Vsc|* zqVPP?XpY7A$;#B_2V!uE(j;2upM>NwL&62^H*86y_wON51R@M=&dHVfRpx9ZJcb^r zwm0C`Z2<=u#!4!_cycNA@ez#qR!n%_QPw9E3999*u;$syvdH-9!1kY9F~^?Pl}p(eVvB&Q-;>N^*MwjLvyWB(uL%yAVB}{RZ~Q35O;?H| z5Z^Z(54^Ce+?;RBx7dQOj5kSY*#U`OY#>5=Qln6mKX6g(5eOg`K z2?ca^&Pg8BW?s7#()%BRHX`n|3X|*17Clu=wXh$hxvpq%Z7T~1u=Ba5Tm%B;b)R~p z87a$?Ct9U@nIFxUWbF(ns$DQ8iI?>Em`e^O4f;mi`<+3+1pg9$o4JXvgjVd9xU1GS z-#b~Hp&-2rtosWZlATlkA7k$rUD?)k3&%;twr$&H#da#TQ$fYHZQH8Yw#|xdqrP3w zd7pdVbK7ZOJHPf^Gi&d(ws)IjjXuWcy(1LJhhSJ#EVMPL5`1H8DL=~)rK>)5F03Y3 zUmTiK$f)>2a8Q|}+M>^%FkEoFSKEBd^wZkr22`#HZsH~Nf~kU_yj?A;oA-Wvae`D8 zFW@A5bS)jUY<|g_ov*S=ju_3#iaobkS5{qdvs}|lee;xw7f)(Yb?~~;hD+3XQB#fNzJ4xY#6C5?U3-{F=}D2*z}WPavAHkUOtvE zs@y~IP3M3BQ*28HRZx1~pjs)|GRpPl z8#K$O)EG>~EvY{=C{z(I&EaP3C|F3cuBO<_u+2PvN~z8V%aq&N>!uc-6vOk@pFkW< z_E)x?lJ?Uz>9^S78`I}M@~-F<(rDmTlx^enJNG~PnXs2#@5V9OiU#D&~%x+kD%O!C2$IEp4`nb>gi=AB;zqgmmyT?hc@P`6;HEM%xmL%~8 zEKV5yE;xMtiO4Lg_`(OIus7Jdp}sP)e-l7*K_kp+Ah@=8rLK->cZ43jA(fh4c_yw_ z`5;utfFP8J^z}L4f@z7}(YOcHmxO)5M4B%8kkGx3sfR1kQ(!wv;_ELWk2M^!{3%lq+H<2t%fZJlSC&iA;q3c?^R` zWe*I8t>j+G@ti~=IefnQP7n@&_h+#iL_J3w63VOwxR&V`C0WOPj@sZYK1UP_IgjsF zzP*$G99rqiv0Y0fw)Yp1c8BrNsa1Ul5RiW0e{W*V&o=YuB`893Wf5DCBETW1W+Ze( z>`0})Mr6vk67n;s?v-Z`^&Ly$+;2n6gzo&l&Mq zJ2i9YpQhOR;65}oj=kHWdJNCnnsG3nQ?bVoJ~Rw~tpNZpU;8Ce9&nj+GrCiAG0HK? zq5T-pois~nZ&a**khQWI{R?qiO`N1Z#-u~wN)|UEWCzVXEN}14sgjoJ@Fp`sK&vbc z=C>)tVUQ0E+ih9upKFpA8bn$R!JqqfWa5ZcYr5%d(2EHlY~9B z?aV$O*Mf|dehf*b(nV4(l4P{_&_u3Td#QB}OMS`xYqR!TYdx0wocq_uyJ@aBbSE>~ z@BJHH!y87M8-zcv2%lgFY-8J%h!bo(7?;Cr3zLvrkHrrt!ZFq*X^3viEN#rmM9J4V zqt+vA3X?`st@m^+7@FhMiT4a~VoLYL*l)*-zSh^-OF*G>)W@ll8v#_1d@R$NF;+)t zQkX`EU|usv#PwPuBdmEd*CMR;J7`$5xCMSx$K7?!+;60N2oW6F#YpCtDAcm zRAbybY%QlvA*)jy@6}haWYzV4d26vg`&u(F4p^L@eT_+a^yjC4W1dIx>4>#6VIsek z?Qjj~N*Zj*wF`gr|Fbx?K2)s0xUb?JQZ;kJOvAa|Y~64m*55^bs4l>{uVNiCgY>e| zHu2bv!MJboN;)Cs>dd{GdWe=EV7<*c!=sqz?41s=*iV9OO$Bsz_Xhv7n_!U{mV+`s z;(F=&wb&v2yCJqa854c6!;%L#QFaop9$6=&KI&8CYX_RG{qG~j*t zovGqoPThOP*bK9BUrB02hm5i1cOHlUe}9OUV$BYzn$9*e-oi-3*KELf9__dMs>#k) ze0M)hbJgzDWOV3tbh$uxrQI4!bH(!%s^`9))sDwr&^XE~0Sb3Bot&b=@FF1O$^ z{(h-*nQE48W)Y`-xctOc3=q8d^F@d~W-Z?8SrcrxZZOH?AK|&yyjz`H>B?0JfWl(m zmukuDX(FB4kH6E*G8){Dtf{N*({iP$7R!-Q#6PM}%2T-bgJ^Qa(ZHmO#mH&KR%VXS zzO~qLb0&F>jD_i#5Zui*DX)h7wJpk%6b-Zb?sp(A{a#v;IUch#>w+ zeR8@1u4W8j^sVC14EuhAMxbzCVpd=2v|x^q>OR#{MpH9R(}pWTE)(#REJg#CWIU?c zW76RrHO;&y3?+aYq~a>p9ML_vRkfuz`!72Vj=fSO5|NhtFfEVrd&+66|{gU3^7@0#VmtR6TVm}ko372l5I2-n6uY|%`svRFWn+Pw1qCnz*R$pOn{k!Xq zw#fI6!F~SR6ec8hy{yi>=ihzTB&!ElvK#en4|ozhpV6e;yy)6rS^V}-Q4Z7Z1^CSy zm43ec1Mp#G{Z~CfF0Q|ETsO5^0WO<}7k6myz%2XMm`IE&V3Ht(+5@_=#AD(X^@D0J zAFvEEiA(jK(o9Ri^p1xBV$5!yNe!SQ=o3#gBT<{f;QWx*)h#isJ~T`8HeR_O8gKKT zuEMuJU42kUT z5ajmetNrzSDO=)a5EwVPkPXBnB#%3<5DEMm1HYi+<&e-Tn{4-@KK^M4cCa3Ndt;CTmYUH(x0+ z)A|ZN)|J}vz?lOLt<|P9NkMd=w~*KOIKnBbQ(}5XpPvuKncuFWQZ1tb#7NYb+H%h$ zjU)7J0BTf#z83jL!N5|}FY4Bdi^wAFXXwazlBg+-ZBtj!$Xu}j{fN6s76(OCHc=_a zrlf);9@<&QP73OD5_KYaIz~I>k)>IB`HHQ;nrhugW~)1JZK8bV7n)MWp!i+qlYG{g zz_rwi&`>gob{aI|DsXjkJIL-*HAn`#@C~Nc?2{ z)G?v&Z2gbwx-GJOO4FvVKbyWz7RE{kk`R?WoRgx0C1xDO1-3l7`-VblJYz*|pxKp8 zqbFbjS&-DsI4}3Au~jOufT;pLo!VA*)sjqG*(~1viHn;l`!}EQ1g{1?Ty2!9zjhKI zPUv}srTOm3raD_-MoQM8Q<@Eq0oR3KVmxeQ*#Q$hG zlbS?0o)0)$k5VBA#7o9)d%dUeQYp%hQSJ~FK)qlre30aL9ZX+!-bz`NOMR&JniChG z|6ixU$1wtc(_qO=pb$-#KcB!$Mwcy{Uh2T?pMZh|Y~c**URqy^VKsFlsu%h| zfj&T>DCt@%Gr+-HljgvG?mE(;=`_Pt>`Hr%RJ{Z!jdpVKKhm>B4vX7H8+q$Vc~)2d zSH$9wh5<~&AxyI~5^wJ>t3k&E=a+IEp6_Cv)v%cS^zF#2`$`;hMS-N7Twh%r@oSc; zSh-S~KicGi$Cm~?R+_?)*Ej4`rJGeoE+nFt&J^H;ODffAWBJ1m5UHW-4(C zP1wn3jxv7j$I&braf~yU*)-Imr%=I%Nnpl48)lAbK_FWW7M!kyWJlSVL+)RCU2ZA0 zu?^LsM}6PlaL11w2xAwg37|u?VBAXc#S&Rl-xUrGbKO*DZ639uDzwWVyo;kD!4x(t z37YB#+MLRzHMddO}_H+X;jQwoaU?|K~px)Uc*3FDW9yaAN`%b?y+|Vgb ziIVt2qWhG~Py106LkBQ3cO6|wkDq{G1mx`9mgPR>flCxP!G`5vq6soCyBR`Hd#2~U zpWc6>mO>8#1btVl#rNi49u%8xX}=i?uqpDnyn2H;6#XJ{U~=zMn6$^jNvWO=XucM2 z43dUCs*cOf5mw17Ck%HKH~GLN0Ez+ofM*whl+%A01aVm|-+Z*EmI*p0lK!rhI7BN4 z7L|f=Uvqshv`l^^sNJ?yvB;^LD1)0alM?=9(9jTcp>RpIY~eH$OS@CN%nFUY*&31V ziFCj#r?d`=;QA2Q?!9M)Z2?*1Tdu$vNL{QBU+m4{5)7D+6#EPD; zw2Pk4P5{HTvoS#g?QX&iJ6BaBz7e278ly z%4RwK+=#;-3oOw|r{DQ%IXKtQP-ft{q{H?2;?V!NI@32I_{Y!)Cso-L*7^iqlkW-d zf+Q}R)i3YOXzpNb&ea-PLe`?_q}4Xuq(FAkKEWE9!;I+Q=EqlrQC9Dx`exayOvq_2 zxH+dA{Yv>0sP#uKfn@chiMm09%=?Q0;|cCodI6kyHZ4sV&EO$9WsLjMH~4FM9uk^j zX+@;9HDbyF997pSCi@hfk?+?l4REuQqeWo((D}3bqDL?m4Ynix@a@E|wv3|@^=~U> zV|Z=gdk2!F^%#aBb*m6S6m$%M(g0G+15DkmLP^?rjRs`%F`51piAqJfFc@E40SVW# zuQ}%Yd}OiQgmy^KhCx;rB5lWc%BUMEX;L~9X>J>+yWEyZ|xDoKK=Ae?wTdsc8X zG=2RoZU>6glG#&2E(Wk)p){?tL#+kVBF$rf%9QxQ0qRE+!oy#0(h*Zzbr_s`=cndr z1FJDRHH0RbXpb5kt2ZglF@5Ej4o273s*|%%R@z<_mr*8B<2r_Sngh)7~2kcE| zp0md7I~T5a?VE0?>}kR(rhqr_k91&oeaNppX*!!^1S)=;TKW5>nVFgA8D4D16#H6{wzI%ST`Ect1%f;icy5|&xtn2czh zhER>Qmt($&9t=mDpf?1XGnGF>^`i2Q8nQec z_|(HPWVCqRyKBVeED%Ez=&V~oA%~dM>t=*j(>(g+_6M+}g2q3w+gZ8(9kqq)Z_~Gn zn*Y~H@DIEFe^Xpf*Zz-_pe8Ze@NK-PuwiWch~^eAK;{0wMuMM7&mWTNe^lHT_`ie! z4+`uyi7pr({5kCfe@?qw$DO(-2Eu>*6@H1v_6A_AKXOiMhtY>#d=6_-y=ha)3bZSa z^#J6x|7g4!wEtfx!G+*SXg>Kt=l;vG%^Oh5bvR8Cgxy$)d4y*osk#MMcDP8d$%KNb z=|8qe5dXDB@;r(RfNP4aGTWRLV4h0=h`eo5wCl{DMCaQR0z}+Dlu$FG*dr_wG`cX> zMQXye=S`mw7CTUkkl#1Z$>BOd_X_Q(pBTqYf51LbacXI{AIhA@OP-!?LfB{FAz-;B zu^PfdL6$bqipPU4+o}!qaQ6-p?QyasBF%vj#L0oz&4H!fO$)g=b7493T~v-3Fq5UH z_9$q!v~$822`|s^CRLBJpm&1wNWVq}&SDo?W%mTrKa7mUE_5-+ZWwGt+UD992F?MqKbOq3pd8u8aO4Xf*ip@0PVA^C9-Nwme3`~DWI zPh3JXwlLKU_zG&U*Wx&7SW_W!C_+dbJQ~G=6q+=A3k}hP^L3oIh>T6sRKurZ=X|a~ z`ns`!#g$kLDN+VXQGL%6`MqB&@7yjFeBXc7saZ^h;+o={ z9Q5qE1@k+y!x+y-Er?I$#A?^ z)zU&Svt1na5^OaTDkmO3zd-GlYIgW@n8EW_Xahe@WUyX&nWUq@naO3{MM-sY~;f4OO@}9SF zj8!NE{~3RMy(?g|(h~I#k8C!^|J8u}|50k>`aADMOEzYm5V7+~{TlM?w`XRheUYMO zCA*44wTBt&c)hj|zK1JU2zzV$OwKabWjz~O>z@7$4hF_plj*O_em?PBJuwC`^3V5Z zHQNEVX$}Cc7yyY+NvUBC3Q0Z=G&1V&xR$^4cQrshT8#61Gfg$%hkU)60Wf+i0`%o>p3 zD%o}TV$X&T{U|URwr4mwU_3mcdnxgPsgwm9D*@NW$Lf|~pm zI=*nR(wlge7BBqE%QoDg9jx0Ko`xuhqYHglSC;56 z+lRpPxUb%WO(jMIn92&2cI3+v{?+{_t z0O@@DEig!0v{&5BG8)z;wQqhr|C6aNEBK6g3@KR{q)=rnH~S}Id@CVoK?d~cq;6!T ztk_5x`z=0Nm~C~58RTXMZUM6p(dw~R5T)4kc&cSJPkO%Az-uOMGRpJX-szDkREO+7 zWM52Obtl4fzIMk2s-p3Tv|{N`v>+^`!6?#71xBFYagXNvqMewYlQ!)dBWgEYTCQ?G z4fM>)uOtRh!o3q%x~(FVWRO4iD_=^B5YgkUb?oh<{2tMNem{*Cgk;D=@gdZJyQ3>d zNGp@;=%oT$29L`-gApb`PtX<}mZ+bE*_y6MW+tu4$KQwHSn-B`ytH0WZ7201|%pm(9|0GzQJ1B{^xCJ#l3$Fwc9@ z)n0W%8MCn1dP4|iTh0wj*C}`RlTgCc5d<4I= zMpAGC_v>Dy8P`Hz!FZF-Xcn7Kq1`X+g`(8ERL{)cF*zWap|X7UWdY7|3^CbKiAHfA z9AZmJjAc?*93-W$vo?H+z`-@Qq?Ag6TOmO!B%Pe`2L6z|0PpGPgPTi8^`dMUmqstT zQDsqBskB0Xh|Xb9WNrO70_Ge-vJ7Zty|jIWoVPHnAAce`J|OqD`HETpPY0R#Ulr7t znA!eTQ9IC_jNW61?Ro-ePAQU|5oI^Mg~$Fh^=o>vl-AmDv)ebBfu)1cH( zb`zC$<%@U~5NPMWVerDi74_-W@&e9sKQQ1dcPwl@1F`+0Mc>Y%!@FxQ?scD(mx!M( zhKlkPk}AkUt6kbaWHkJO##fbfAQFqu}x3k zDpOgMv>MF^d7ae8##VHRBc)dve+om>mC319Ucj0(+>jK3nPEtH(qXX+2sYhdC>_K$ zEAgPZ7q{SwJdDYYQsNOxb2PA(9^>iVS{8^$u?S-+W&sP%2%W}o9Tll_*3(({;&{Gu zU%?JVw3fD2jG}p3tS73P^3(9k;K|UL($Wz3Q^+kQ_S5sA{?S%M7vA+N%3d54{C@c#6WnxzFA>!vQDVeg6@l znp!_BWx*uZ^{L zHGoM_^z#u9i^VGfz4n~ceL_v#rIbe;ZaTiDHGv*qrX}9!+^LjY>sL*cIrznIv`?l2K^ib5TiFbyM748)aa(pf zK=@77PC(js==JbRtz;Vbvl&fGYJFw7lA8OibOs-vY5l!A2vf4XO95^%*Y*p)ophofZ{bu zpYFwHE^e7m$2BH`vf6WRuV;SQ%AmG_6AIi(`oUqwB zb3u^EJ7WP%X0pysl1y*53fR(sLTQayW! z^b*+Q-kzmjSzPViKEhU1we}yVqp$tIa`<5pRIOSARdtNc7=rgmZ|K;3(~3(DwAgGG ze|S)k!u{IR5{9khoSZfM@k^D`b}kInm^{BOk1Ep)$*7&dX~ys=AI{2A)D|vq`1 zc;`?vY|1f=k{ZUw=BH7f)a#B{3^E`w2*Zf^Xc5kIBZruIyne08iFiWzar2pgt~Gv) z8~UN>MmGyN>z?aM@!01~-YFdc{IKfjFbO^kD(3_xwp5H`u@zfm7$JkEx1{@xo&>9Ft zv`m#Wmst>#1(Ccux2#}cDCS247yEhi;DmWKH;75lV?DsFA;lo;*wF%278gBa!lG`s zvVE?+_8Og|Lv?a%zluqFs~Bw^LjXX?-3{QF6Vo6LKGKt#9`>?@owua%%8QC;I))Bq zcnOAu>OcNAn5MPUj0?tn9IT^MoJb|0OqvBcg%)VBtkL7O<<*vuqp*lPy^7@ucR^1- zt99$0H|#|8c*pYPh_h*9ZX6p@Ey|&~fF1s<^flSRJ{V|uszhxL3vwz!SE4c>4H~^) zMSx|%z}Bxx4F(Ob+5a1w1LYR{9WJT%cWlz}h9TCt=!ZvQQgPJo5^fP{e6xWD0GPx% zCw(RB3Ln_Ih)*Set*N+osCsIA^2@lI zK_`izdm`nPrI>rB-CIm@$l|96%t*C?oq@npq_&gyr_W~*qA5I75?Z@?-I12#;x9}S znH6e7QHmqK>y^QKU-KmnRB0n#m|8>3eoSCG4`huFfgZVay!$>M#OgAk!wKm`9> zp9sM%nKv+`B9o3Hd7o%Y6yLsMvcGBH?{MmtniXfi_YBJ&Dr29>Iu;V|B8zuoG{BEA z;aCp;a(@?YG$1e7mDEDq6-}2Afn4D&hVD&24ibgV!OsoZ840kbHrp}hMuA|p-@7f2 zPm39Lyk@O3OZIA@8=Lq-a|~*fV#t+DRsM;l%lL|`JCbY1vrKv#h>zJ4gkPvU3HNO2 zv7-=-<^lAv6vXppLxi=}WpBmSoerch?tV)-1vOwojQAUacqdd6bnBhQzZJ!g2T6kn zghJq~c{8r7<>uoOaQ+vf4H0gws&{WT2@DzMMgH;d|0~yZCPrrV|1HY*=k$|sz;+(d z+=CV=6pBju?uz)53fcxdqwh0bS{}u7O;B|cC`DMgv~Q*f%?K8>E2u6A^V@pR-z{>2 z-X47weSy5Y7u)hqI;)xdsHkI-xQqE_Mnb^?Ru47h$%OC!Fse`Hld(NXaW_Bu{w%|| zYAViN60vJ;B*;>m@`JtPCI%FU*f%AjLB|buhAA|49;sl11Qd+H(2EE!UY_@nOc`98!_ZXln#&LwQ{$VCWsFW)W!uQq%KvoEjrYrUJb zLc{neZn+`ekW-Ls3WWUrN*3g>AAlrE%OVCx_z-$O%enO8Vw0j&$s^Z(oVl`5=GNxz zwalbh@tl9?=QhZd0qXj*k(aQ^@O;KJPvcN;D%mhyB45fh&c4_@HgR5|F(`VZ-n>Rj z6-GC@kgBBRrBxFt<6wHx$wOTVd32I$(hu(Mch6O+yLUU${oYww?zY5tp8$eVtktk zrP!APJqKG^=T(sXpfFL5uZdcG);tJ8I_f%lXUT_>Et%L176<^!c2cLN$WM({_&s<;v)}8h_psNJj_&f9sQddde z!~ise4hiHPE)6|zwv&7w(w^}$iUxkpo}YU_{6A=r^uY?kE**S*M@O@ zp}-^R?*l9~A)yW$r`vG}JHtQ=&-^m+_kavoZulW{ac~LS(I6!`xCA|TAbXxKxdeZ= zwOjCn&IyhkX@QI{AeApa{JQf9kr#M}Q8Abf`o~D}uhc!67#aW0Yu4nk!(oEmdZW3A ztW+w@_TBwMjnr1K6AM|1Zf6xK{``pd*mp)4c1VY%irlw%MWyO`IYEBNjRg5*q9*+9 zzqWn1uHNN6d70A;u!~lbqKMJ6i5bJe^HiaU@pQHP@mvQ%h+q(R<+%#wD*+VqM@OF) zkK00lh7^xUO~_ct)xeapuaV}eWxEoWdp8s`onl>9^9e8-#1`DK9m_no${~wHpiifb(y*?v z3zVP6{O8%%{O+~A)H#X-b@g+FAVVfh{iBn$^1kKVPC`dPj=F3Z#HPwj&?X!N8ROj+ z@W9uNKQ(G%U6C-Xdg(_BHkwb#pkCKLO8Ny6E@%l^ zcKFmV3ycf5Ruf5aS+BC#YM>b#{sYxwK`ptTz7OSmCR*0ViYgiHw?AsYz~J#de!suS z8E!B-*pGZZ5moWqMiD*Vjl3KT+2mY!{Z8mFIMr1@FIoUGX z(gt+`s~~ooYPjcUWj(P7MFxrc9mUt1Lft-1=Ygbob*q4co*11s)RUr-oazxDvCkty z0rC=*$RS&jEFo|Ip83@diG2zY?1|%+c}cU_9Jgl8LYmud;@bo2=N&a^JyA}e(yU1qwb_r$PVuZ{kq?>b=$YD2_ol^b|hK7-Wed%M^8{6@CrY$vs|%H zVDEX1*eY6tf71welXznu5Ti`>cHO-Po!C@#d;i*Saj;-L$*@GYfWTi*Qp(1}1Bo%V ztC&EX{rO=8Oz!b(q-XfnNMF^@ z0gfMXlY!qE5NEo>b_Pq}Jd5Uo-FGdF?rVZ)O`Hhx0Oq$5 z>AFb&6f{`=6;+Fi^Y7V*CIEW~!2+7K@gTL4S+hs*vNmmFyjYnN{!@lQ8#k{i z_0YII9vSumd}P`=xwCtJdZ&fNjpADt{_O1 zp6e$X+$yhtSzvprP527rB%ko8ynl5*jF5-{TRpe1l}y=w=3amS-E5whxmfzo7`=?+ zR=Nm3Qqq<33C;+pX1QCo3u<_dG*X~h4RgBLdliw&1j2scbvPuKi@|m0sFkf?BLT7W z#-xLm@MAEZW~24)Ce(FlPoZ!jdnWEyV02t!yn0oEo2BLRor2lK~mO_MJVqM zIxBq*zFP`?ceS_LRBh@IO4yFDf$CP^v&Ch2g$&>;gUnUNAIK7qsA~xc;_m0|0`j$s zMm9>{s$vSK!qjFYD&pp5T)&r|HTfxTH5!oKd%7(k`7D(gumV>-JkAj$u=Z>abR5S_ zbe@M4Zsy$dCVU^I^^C=w(yv09c0|~JERd`rBRG-czue#B+6PUT|3aS79abHS;NJro z_(CuWi8W_H9$E2c=U16&9N@0t{Qz3aP}BG*>NatHN>16O5Ac`NjvtkQh1qFbcqI;Q z=&<6yW_N4lc<10kA;o?C+zen5YM>1X@#eh_3qg%KfKMp(#=^9-vt_xVUgWPE&2v0G zDw(=u*;1GGvOGFMJv1!%d)}V#T~BZ1%R&yiaq$cVo-&T1A8M(tZ>|NH5g<$XWRKNQ zbid(GX-sNwqz%KRg^+ls?i0gQ*TEmrl?-pCx=2=DEQ~&uc=+yxzHn-O-YnxC)7Qhh zM!R${hPKW5yR>A~!gJKZyP_=JxE;E6H$)#bM2`ySlIvp-A<$x7X8Rs}6HyG#)JZ&~ z@$|lfR0m2u{Ko+C?-<;Fw+^__l=-6x+Vz(vsO0JYcI_dz_>XJPRm=iOvJr*FlCz*+ zE|c|qp{Td#vrKt*l4|hpO6VSff@XQor=%GDgu9Za*Jp6mxzPaiGl_#Lc>eMrNPeEC ztq%?CfGtcA{yU*rOgGk{{?nsZ96*RzD+SMuMyw#J&0DXlry6RZdaBi>!{wX}4M4y7 z_S16<^`fqL16&ypBCfcrbZfvh{)7l#o#E}fIhrnh-ZXJ^K)p~Jl zJ8TKWc1AOV3_}J^gVI=eBrEg5aIwK}*ku9zc*cv(A|evszc`>flx|(ZJHTXLLK^J)oIu&WM_Du;6t9@a#f)(y^X|}uVWO1elaNs=@lkU$y62-VV_>c z+NC#@MtaR{m0)~PoKbZqHb>EblaiQUQ=;ZNa--3ZaTXj`D|CN5Zi>oYug8=W22nK` z(iAm4Al2Wi{$-ya3xWs_$Sa~^*ao=2Fyopw2@X_ux@A-&tv5R3xnTgNU4+OGxwT`NOliNgawA&{GEQ&D_j4c8si= zA_bR8W{`KHQeuoR#P!j1jZrsl4@&iJKj~&t%-%l)CO2|0or0SRjIEP zWZtN9R&aIdFH~`YQP>$_2{-x%6c_VU?+dzzpb{PBS^DYMUW~LI0Us! zIUj%w+kKvGJEyDxvZafBt{EWS3>}Qp=m^vhbmUH(Rk6!w832*p*|pmysS}J?TS3aO z{Ilc73cM9Mh!zHpY>sk4iKFTqtzlq~J=*E70fq0bBa&5~;Od-YBZnB_3}*=J7Ot`1 z*VeOY$wY*%`D$qxr#?DBtgkCbn+XwqHvn=J7DVPlg1$_GPFgj%arqeW=l_${5q?e` z0lk)OiJFCi7xnc2=DUS96a0Z2S4Pg=PlM~T_lwT9<5ze`ACZ2fV;uMqXVBhi4(|t~ zoT8CeKLL$nd5jZuJK(FdWI8~7q|WTSPG{NQh_Hx`T_rA82DFxSuW1M*C+vD08pjqdICrTYZL*(06^Mo z1^w7Y5nvr)_+wt?skY?vgY4njoY#oQBEBD8oH>;#Byl7L!OLNSV-I#Dh6U*WW8$X5 z^HsLG8{6j9M0>lprw(-&QTeou0 z0M0bP7^T=W)bLn7A9gVn{(%MG6(>fIZLV<8v9(|WLG?#5>Gk*ceR z8o=J}i@YNqy^Zr?eoh4-SNMTjSCh)HO!>XKdUjcR2x*bNdUY>vjRqbSXJ2N3TdVBb zti6W#>5U_#ZqwDw?5wV#mKbiv&ysQ6#Lkw>n2J?mY~rXQ75QDE-3T_ z4t=yIaYqJb%F&^_+pb{8L1w5yQ#OE5V}BW>%0lQ5DsPq z`zcnwvAMnwk%MvS$xb%@uXhmZ+*w+%80W{oYbCthf=QgBToKJ)f@KS>Qg3 zi?2?}l^FLkT{X`q!kJp&v&W66cgJCR#Ks+-N&(KGpFgzVFS9EzxEhL6Kc^p3KPFqY zFCAPfuIXm-+RRh)G2hgShhP9vpNp*)X(bB2$jG##G5__purHF*g)W(MsxsF{+m)h< z`I@jC?1tUm@wNQmMvSsVPp=W?V2)X)hhx$}&&RX+SJREs_I)g>FNh4zvAS-=6!MG~ z1;eJ}D#+JwDn8f60_lC(`0(nUP{v;0W!!#MRXlB~7W>UvCmwezMZM=@Bb47Dm;0@* z!!~eji@BCU2qo_Ie1xh5;A+~lcrX6hA<`E2P>6CZ#2zpwYSm;RN;(v1jpEcJhnPo4&a0kDs$kx=;oudiA0fuUbYp^Z zyLeE>TP_pMp(kkX2hce_ukb3Xf&Z8xu>PyLD=v<|nQQ(nLnx5s^CJuaUiaM$KVUzf zA)TZ@%PaZ#i1Q$IJm+m|28G6~GRPnweU_t_P3CvsVUEN*hd|W6*7wbHr0Uigw8J(5~HDAoT z_r1yfIFJOtm6oC5;H=mlf$M-u@W6no`>f?VABGasG6mC}Gl9>vl@m2dyXmJ&C7$-` zJCx0^bDKmmi%CrL_DT$)<2Px14l%u7f_cH7xOM1N8b*qHjE@VuWe}@P7Ur`^bVPFE zxD`$9^SH*k&Bw!|)<`bd!8+7A%coL*5QGyY3#guv^Qqz=1o4CPLv4Fe_rD0D;r}3r zCc!@lLLHOz5SeA%*qzWF;brL}rfz(>Q48~mq`Q8-3p2=C3Y8C+Y`|%>wQ3ge;DukJ z|8P45xT{ZD>S&|J@ZNzB`ezg~A@ zM>kmiOFz~ywgoe5gNWA6I;&qY>_}!NuQ?lHwX~2PM;r}r1wjfW3m#Jo?$PKdFG99J z>P{tNfPELMqn)7Pcyxt1+L_bd~J#P?}&ejh-HB*i;^(@L6TniBl|MwxEFbsYi_5_eT+Z>v? z5bquB94wt4l2$CB009dqKrH8i1IF;%ID*j^mo3cW^gy))JHY4&>Fn4OVX%sG#kTea zXNa$qrrh1=8wDNrM3}R=D#5j`p|Ek6G+#&?b2&vK*7Jgr4nZ=zwI*hM$>s$ebid&m z3M}KCKsN&5!n04zNFT7JJSgX)q08!-+T<8K)-H*2j z@!`wl!oz=aeou)(hdgKem?h5nH9rJzRpQk$@)jkaldAq=56mElF(jW4!yQ6D@uiKD zx?~1iqytMgGe4rYTO6WJ4F4n^ zf2s>IG3(-gvW5wQYvbVk4&NXI;5Cp=@SCb*qWaEO(vZyCCy^-;Y^h{|!D2yZBlTEb zVy^w+Vb3$w?L^gJ9{_yl7RT$pEfIKm?P%*3D0TJ81ymTWPp`{676BE8yB^mP_>yk@ zNFh5|;O&=ubJz~-y>Gv#cNv!8vziro1o4Q}#0XPIF zFm3d@U)I3TMdoJziVytIOUQULGBk4?fcPK|h!3cwM1JLrd$cm9SETxP|AQao{@{n2 z|G^L4BLBq?>-MK5lG-*VT$)H}g35p4hwA_02b^zyWiCT;$UkLf{K#V(tQU&tanzFd zatY$ux$y`avCoI6TKkKu0O28LfFo|yL^;IBw$e#1EQFuzh-u4RmA0e`@4xtgp3yb6 z;u|QpcSid`eZ$==*V7|uoelNe%sDS~VuXnRRfnN=Wh~Z5y#Mb7SBGrTv%N1$`?DYw z-hx;@ZouDyIR+Iw&X3z$duj3;MS$S&=~0QN#sH7amVK1`sTXuL8Muz`OXN0R z(|<(NG982qFmKcoAV+Lp_ZEB~trmh=u3oau00ZS@jeNGl68B(^r08!6`Su4#th(9B za9~0pVDN*V*NiaE9Z zEh4_9hW1c8%@3g!$8GsqAO_KV4WQgYGf&WAj{NaZ1KMPaJ6N7sdT?SpQl?%Gi$5jF{~3o!byRgv5a%KU zM&=N;4efVk{;MWgzV>}>b2V5oSS*}b%~gH*m(~Y4lRzX3A%Pk37(wcVtGfro*;((y zR=(% z#12EpZAn&KfHd5;zR3((Ku7<0W8NIfEx)HhZO3sK@~4yQq;CrEKe#{X+P_0bkuAAB zL2*}yT6zV;x^}F%qSF{whKBt}rC&1xKBH5@CLYx~6d6>BP4pEj5}Svw+*$BF2a|b)X^lFljh5k-W}T&wF5_cC2)S(j8^_hU7H3)FDAT3O=zhV z1JgX4;SU_wzxo&n=m%lEO#oLnEotM$?$W_r2M6{yFAaOktPe@45}BET1HlGs6{Qq7 zvv4>-y-#LKJhBSnt!{n{?9}7faMAPsW9+Mgvd-SONfGHrxl5UXh z5NYWy>FyMyrKG#x&jar6clWpN%>Ktbqx0a5=RVhc)%kLdK0-4BjSrsx6Za}`Rhy<& zH(%D!%aFM-%U*0&CPl|tVOe==#XfO^?uX`3bfFAfu8cB4y6Kuio5!mOX*k!4uF?G_ z_HhpZ{BBsM)7g~wI=hubI8=mv&niUwZ(7zp771}BHe~F?gqaBF&z^JE7i`gjd(g+tPDwM4@s%~jIwwS*7@e=`ZHNA^wh7n2iqt& zv02gd-e|+}h*1wHDb9kp#?N|jwjtP$B1#hLKE%@KqRH8^40K7<`AfO$NFqImYLFDb z&E`cMA-S7;Lmys7{k*vxV}NixIE|XXJJfx!8k7AVX~WhDL&LWNA%PbuVbF6nNfgN- zcl#0vikV4$(gA*FH83wAvdk0QvHkPEJxa>P_TL<$j4XdkQv!=a+g@+;8sIUqUahx8QL3Buz!3Rxq&a+G3_%7qC0za9_Oh z?$XHU9IVHC_*k}}%+rDr15ipPpOpb%)7VRF1m4@d*Z zF-q>UE~)|l>@9Ew)mDs(cwrPgKH$LX<6Vn7V%lBj8cTrVi z+hAE!Is%SrNr|q__T{Gh@4P}bKN$)K1eRYhdvGv|c&?>=TB%C@sW?v{m2i1tjGWXM z^Hmsfmw2X5P(+|P~ef;C`?3wV%ZQsK^ zBHuovGu5NKETOXye7RmA<}F8cB1q*2H7~*g{KMycnXyyFY#&JDP`q%O-+eB&dBJB- zoy){OLoDqI=I;|_DTp29_%Jany%U|>Vq7YiaC3S~WlybO5J)eF&|t0`$Mt1f=*15N zg+m0v7xyqx5J(Wz=VL@4b7fw7@r|gb6K&85y#UgEh?z^o^W)DXve2DLT_Ul&04zY+ zR!nE1gKi{Q8A2)MLL_F>ixjJ|{*lgomDk4A7&^n>5_sw`iQy!eKXZ=5Yscw}ItSa< z;dBo4ot{W@wx|+AXZC~aW0!LK-`(p+_ zg6yS#+cwz#lZ}#zk)7plPAUL6;Bvt?k0@`!6lY142<9L{l7auk472j%>U4CX?<3B? zx{FdXFDPuXpZ9pKlN(;B8;yEZw>2j(5GUXE5cZ&CY`5+$nd5Vty~PEYAcXaWopcPSx~phL>N40t za%OD&M&#UygL0L)jLVap$z3A+mz>#pXv9(bq*c&AX%)$3(Rf0wQ7EWD9RlYg!*^<=2J)@6U4)B z6U5Rd=zNPR$}x_!$ZL(?1EtrLV$1juJ!G&O^8y3KAGB=HhHm(*^R262*nXqeo~UB_ zA?|5#;lUI#8)JUzUJ=zxzFCt^oU(ZnW{p)TgK`6i6;xNmTdx|BS)r8vA|v2{Wn(`7 zNvsHd5-WU5`ok)NbZleF%8NJ`^kcw8@?V<;e@?&wOb{;-6WK*3tFf#e!2`$yF|HJ! z|6YW0_V=>!Tdc^5<@x5DKg|W0AX*+x5WQj;4s(o!zy2^mfCfssRPoF4Nyb;U1z&gx zI^_gVc&if&@ukz_si`NXH4|$Ll?xYV_J<{XQ`+=rJ6yIdEi8k_j^?HP)`rU_6;#z@ z7ASHTgIO1!Cx;sBNUUIJS8|N*r=s5`w1l3JsS(Iw>k$x~cpfT&sS072bn8c4FUAkF z6HntZ=lbN2t3;PbLHWY#V67MCptF9guF-5Tj(H}*f_1b-;&eR0x%9>_yqeQcRS-OAR*QgJ?DKGI_RZ424jZIGR>x0 z@O7S5%?17tX)RGGPWH9!+5{OBL;;U z{hAr!;cjKxhj(l(X5&n~*e(v0PU0HiuAFg?7%wOYl+=(8k8-;GoSSHlzTQ@k5}zvq zLM$>;3IriyE9rr?_xyxlP4d=@1MBW%WeWGh2%cj^ad#Gw>S=@6Qz_tbgP5Arl`dsk zqf`@W(fmq^obtGIeXH5)L9n4y^36>vUr^0>YUMhK7sqgn@<<@dd1{`*3zdTE(02iH z9%ierVzXGJpKUwPu1pn^W6OA3>Co9zP9GNuB)~tAvSbGG9q+{L<(5&+q^H;c#)fT^JN9s1;xy_dhfyR*-Re> zYJznz`3jq-C8LkGt^St~81Y83o zOA1L?<1zfrP`?ja1gABMw&Tc!<_dvbzarx&zr5S5HSSXl?=H=Z&Y=Q=hqf8ZSEOnz zUax)(gC@;qCK(5PE_HiWj}uPc-j9mMUulkGVBpy{PQt3qyOKkb16^_vKVyoRRgPAW zD!t}S0#s3g&uqOlUuFYir(XX8Ce8aFR#S4INi$PERD6V!tvC`AHi2$JboW+!a&tVh z)C#1E8iG{OY2(oZ_ezM}@JVhnBr9**l%@Q(1n~8Y2L$@uDF{>-jvCA&Ax}kCPo{`yo|I&YkICHf|2st#UTY zX(1G%1V1I6(2`Z!D3l$&v#IN&kVHldpMDW8$JW^ZYs)=o_%UeFxje}d`TKY4ty+Ng ztih{#E|>WMFXfJ1ftKb7+T>YZ=u{v61VqOcp7I+FOCgwK-iShZNlmumSL~VEPqYTX zubJVs(RXu^$vl>DgW;+!IL%$;skdHoTHL4kOq(TUHQ<5&x=^^f}ya;hgCq5!f zj~7ZgK8h(H_K|L^1}6#K#|S0uXn3xm2?03slV1XUKsjYibRB}X3H!(@OR7OQfycfc zs^L*8tsj#x%7ja9>k0J;AB6_sjJR`2^spe-dWo2~)0VC1mM;j-6pE3j`O!bZ8I*?g z_V0J#=8`ksbbT#Q>ZrvJT;7ES&s3Su45P?Q-A?5TIpw@U#hr-2Z5l9I3w_VM3?|n3FgtQC(*U(B^0af^|v$ba#=kd zMHqb(+B`D@=3N%p*pwq%J1Jz`Fn)t1hBjT)XA57g7iUUad7YGjtbz^r zu30_MRo3DRSeXf9tzlwwkXr7x63(nm%Icr=ReyGWmtg}86S()*&AIszdMsbDP zoLZ=GAbIq7i(ATCzdCFchpT}BlK}?;w}Fl(MK?^?C1A*Or7c(tuR4gKapmT1Retg@ zy7ZI|P3vA&O*5vB%?zc@i8a30$c(iyX_4XGyQVa^xz*pW;%q33f z@2PfG;LgqT+#49gDI?}S`vSBaMT?EeoxNZD^atUY{0HG#1pP>OLO&9oUB}+XKh`5H zIdl^aOsc;E7(_Is1zS{_3YRYo6SaOl^%YKq%Y7=!zV2uAETm*NsMriBO;ICXcAu#z zd)5-VycoL(4&Q1Km@4x}OV#(^ma4b!4O2z+m3~{Q=E%TSK$fbyBI0Sus1?Q{XcEUi zEL9eNS*mcpm+vj9g;?quOWotvy+)3M*hvg~!G6A^ky? zDi`d~S2yzIYZYx8iSP6K)HP6xys*~em$g@tZ3M#0 z2SrwR$jZd!6Vd#e52>ZBtlKQ$3{2_Z3th}pxnHHs6@06f7A1ujje@;RBPP|=V_^Om z1@vTncHA+PLbF5uXF#TIBR-Z_$8_WVY zwaISTOEomjO!{8Ma4@UMjgU!b*s5Shkg-ZclaVug{a$iMVJW{L&5tFHLepk;-D;Hr(RM*pB94xRms~32 zR0)^Mv0eiDbc<7=n6o>6;2%DZ(Xscv;-^0o%W0u5f`3rK@b(Jl_Slf~IyyU8y4MQ%aai57exN{VZ#&~`bGGcjAqJRdBRNN0zPbE2|~nP#U!$N`nHBJ6r*~lpasb+5g(5aCLmj9Ri|J%MvmnWe6ze zzGQ>s4z~Z5J8o3oxe#LT(8CRWRCP#h0&oGldN#9p$PWSwqZyo|F=4+=A63(VMG(6s{exKA2-Psi)qP(B+wl9~ap`K+zWIl#cSQw|$ zzTO`}Ge1*Fd8e{Vs*Yn7%pdhkT6k&f?Ti^@ev?TWS=4$*PQ+zV3IGGztAA+i_fS|2 zx(is_2|yVC2=v}7`vsCZ=+B9mG+NatwKfRa_5xA7;@oqwuAHMI#d~4M@?(>v?+jwbLt-+xwo?B%8-SKw(*U zQ+b_b*!!H5*ha=aaD-DTIl=iTiSqbm;4Nbx@Ltgx^DtU|Ap0`2!W&aLiuB8(&v`PR@K$r7irPBq{gjO7rd!LZZygq)6R15JFcOGo69<+<2X3(wl5YKs zeF+Y+<48MlR;YRO;req6f0dsc9@Rd8=U3DR{_EKIPZmp{b^mWs`90Nv(g{KM#S@GZ zNPOON-n>FMGC|$IEyVIn2KEJL8c#wuf*~@Kc`bV(qW8$;X|sAamrQ|~o>V#B57-z{ zKyX9gsO-YsBV}>Pd}`MzH%6AAc|JXkgZuJ}62aB}q-p&en`u*VAgAX@!~8D z8cYn(CXtV+KVz7c1#A+4K&oVg1Q;mPYi4^we{&W;ET1@w&H6!j=kT!tN`rP2+`X@- znjQ*-Qa%kWf_{jIs)JDYbk(mr_%~88aFAkl>)MGD;SA#wHemYPdL#E)bpX6j$^4tM z=&vAWvd3d3vjq$k#z9B7AiMwsH$Va@Ij~6p0x1qe=wHDNXtQ9%y#@>ucEV=%F*|ik zXi15$?-Om}$!9tHX6k-(7Q$K8A`=AxDwIM2knA)hJM*DKj}~lU0nvF=nt=~k(Xfuj zJ%)e6fD=) z-O~suNvSr-8o6mTvwVQ|qk*+6mlh4q!=#Wl9Z#qEF6rdCCoW5na#9%=bNM*{q_`!T&fG0~_{y ze(Bi`BR8MN#g5u>JVnt)vMFTg7INB{OUWlO;&-|r?8?ZMrenWam4}-fNOah)e=j~R z9Kf20GGQjgA%S$HUnzk!e&U-O2y$h|g*VuTp1!qCE^d77dR)mWb4H%g)#Iyl=Ei8%G94wBxrIgOmoI4JiydVcg^_MQ*tt zJCeTlL*Wq)cdfe%20894cT_oRxQtLB15}LBVW5Gm;^m+~7jdyY%JN!ApP%rpJmQC| zjC90u!exu?XMunNBlUrh+8=T8UR9c}MWGv;Ph^iw>pYE%&lK6;)VVOW_=AyVqaPx5I zgdUl(l8CsE2JKz8eh|wfkt0f)PWOhUkF`O~=W%yGgFB8$h56UP@*ho`e=E}g zIkOfx0q=I%DB;(5k^(HoL}4FCpJoi6+U!7Qia9B}tpcysT-xxx^37;--|Sf--Pw4_ z=-bOftR8ocVeeZ`Gy4?ZwRoQ z)Qx2*Z#gjVT5Tt`p1rhsd>nF>5;{X~l=lMCo7m|((#KP#-f(o%_ zPRj{TFbWn~k+$cMkTS z#-4ZsgF;^un_Sr8f7q_tY^PlHxD&jXlzWs@JD=oKS;dyUM>&;FtV@GQPjwo1eDf{+ z-9(Tk*QUkhYl-8aiwWIH0}8fNPE+IcWV=%1FGseT$myMfTq~@`+bI3O^NpGSAu57G zS_7-5Zc3hjcYt9Qj_5KGQkD3mrouqWNUXo2<=jOzZ~kfa<2|aSqbhiIIY>=?94#Z|1$)7B&;0dv-) znmU;$$)5VseA!;2Vcnv0*3_EYkpM=ZznWd%zt z?ids^rjzXZDU@sseQ2e~eJX)O|1+Vid3-KO{}W1#*@o92sJ!vTGL`W2jHyejx5q^j z=mgX2CH%WYx95j!(}CU`~uX5O?RbTmx%fxL}Ymh9}ccw`# zd?ROcOZmXw`+XdPUI^LXN8?ho)D{>72kBdj?H36|`U4V9^hW_2zSwkR90OvS4c+8a zu2R3W+sV-bnLn4yPV`(wO}Z^m%`;7y>?choMC95M~Ga z*Dw$-O%aIF-f?653M@Xdm|wdcIsR=#aQr9pCKDseKd{H&=?d?*Kj{i&hV4AQ)5#@< zg037@bIJg_=Q?D5Nh?u+WHLA)a`#^8<$d`pum_y#n+_-Kt4lT>ulX;L+D}BLi_&i* zvr;kTE)wREt}x;U=!%hUXO)KqcfH+FRorR_K!at2Vz+lwV(-GP-5_w>{RBygV>3#^ z|0`nTdp6&6T%%6mGxaNv{OW^hu+T>S;FJl6TQtJ&1>wcXXNpIT`v#$;RTvZY;pRpI zI2O$=ctXFv#qgPjHZObs9e#ZNi>@G9ecQY!_Z07-{WIPn@AV1rXL?`K!W&gXch0PHJ!|J+xqW8K65*jLa236_5b8IWMD z6VF}%66~r)gP6HoM@t5Y3?RX(h}uIS?9HA7_RShpz`lvBQ7pUv91gz34v+fC9+rD_ z-6k&l6-a`egS;j-$(aCuUDWRR3onH5N-g>GH3|Qf+Up^XFW5$SNY!yWZR@9T)Vssd zs*QB-_sx_y*AuaP>U^Q{iP!S!UNYFn(|w_+k`bP-anO1Z6>88gk%d9nl^jvTLw%Uv zVs^5g)EYrVu}3|)BcN=nCa9!C&b^aBXXElV=^#uK5}oE}x5xg|-xd0DI~(z%^Q zqd@6*h!HsNQK;=QK?A1}_x><{x) z2L72+Yzoay4P#S1=e_V5u{iOY#jP*CmM3j@n&B1IcjiTrPK5!zdSojnKE{%Y)f~x zuH!vLK82bc*OeXPz=Y7P4+NbV=V69o2Il1xj5xh5@dzZqUnKuL6{J^r?wsydfi-hy z!=^6cmtP*&U&eFNH=CGq<^GBVrd{{=XU>Picr>|Ouc3^e!gOy1FpaCma=z9ZqbV}5 z;wiQ)X2NCG%c_Ur*oD7@Q`MH3$>P19p?2Izuf@fB9Yf9^*7Zf7VsXnL=IsdE=0bK> zO2Q`UO1sf8tayH&I8|WMM7VvINzgYjbF|Z%$v5;|{KmyoJnQ*?r9@tUQX+=Il`%TI zY=GSp)v0m-hbZ|)31zZYN~i^DoOPR{u!yi*AGb!R8v0B zWwW1E+e}jLxtn9~W1lujAAPy6hW%A0ty5cukF3^{(Ak~>(bOK6&_P{vYtJE`%ueUe zFM1{7VW#6zI3WpFHD8w3IeO-75w=M2)bpHo=e@ zRr8l8GJs#pD&bWiB+^E{EZ*OLPU}1Sa{K{B*>e%-74(Hs6i!nc{f)u9S;l zn5jAN4}>Vnj|Q*L+}qDe51FwILSahlNJ|gNkSaCMztKsr7@Tjm9kikMD_@sk;cG;> z@e4Gxp2%VSx@9w8d3V5py~Ik(7y!5A%T)M&G@}JV?>U7?Z3L4szMfz%O!uW}7}HH{ zA8j_(nxwc3QPj3m2>vwecm<>J<>3U@JVQ|Gzs`mK=IP}6M@FO`D7ir%x&xlq80#ur zg@#AR{))h;Oc}K zTq#<(qwh)Rx=Kj9y5eA-`{~{O>xZ;8dw@PW_{OiH{mU6RFlaC_u7P$~uq7}E%ZDF# z#Pc?z&nkr~U=0t%&XTq6Vbx^t9+?c;U17KDaxUh#dJYBy6T%v6nBJz z1lvLs+hBd#p=!jPhIk3)l}3)H*xUt5V;66&{HaFu*dE;l%6o>=?X{Mjzh}qxC)XDI z)bJd_vOX*siLuQz_SGKma$x4D`x} zkyNyZ6i{}IBE?clnH@pCGswdCN4#1ec@IpNnp5EIcxYAK(;iaf3%EMbFjF01YXDd0 z-mAICJ;W~SOk_g+`%`$#5)>Y@VPVzv!iii%-!5vV9Z>@Ikb3+^AUu{`bOVfqkkHDx z44rnn-BhtR4H~`#bTG;KIdq`0aNTC}w1=2k$i|Gu`co9!ElOmAg#z2|K0Q>BnagHyClzbUaQmSP8F4y?yNIMs}<$zDySG zFJ?2MAI@X9VjJtwOc97-xUW!|uKQg~_x%K@KupOM}XupX4y8w&U<= zi?h(tXhA>vHlRwp!Rf-Kyh#I@tpK;JEbF4=vLr)9r51v;f;3*v@DM4yoWliWh6T>= zmFsL9gtUQ7t9`<|%Gq`^j)2(C)t~x+LhTPz^pR`!lmO}? z6Xll?Yc^-A7^#A^98P)4{eT|CtA40)6ChF6mgd>r&Q7MaiOGL=O4!lrrT%Zzg7ZH) zL;tUY8iB?KSS!#yeI6a)*?3W4!MG%~+7BOMkm;?LJ9iZ~$oGbsVX5F>hZw4*IX2dm zVS2?fErqiX2@H$GX)}JeIzH7ZWuUy^Fgv-%f5Z^eZfL3D#7Uxp^=_3v?rNbj!P=;t z>N&xe35b?=9?oE*Bm7tsp<`qclZiqym--C9e5)!Lsnew6bzO}9tVx^jz28I8X~bzq z(Z5DG_nYNxHLlZB(lqkSpR%64hqdjK&Qu_2I_qn?hsg~hEh>ZbP8^+5{d7Z%Ja|*+vWY>Y#oqjH(&G2D zFa%ADiE-tVKKEkiogRpAcGoxy`uWaDIE0?KGR!Rq~6Xq$3T6}JcYe2^mleXfCek%Bt4Mp~? z@7!%nex&UkXG5!cQZ3;VT{)k$Y!2T?3(>!rGIc%x34#gr16{CSPGH~(+R7OsJc#o; zm=f$COhc$bJZZkY{bZt>q@U5Pd?M{laD99b2RF^ zKTl_GKlw(Q5~b(o-Z>*o7pC%!Gqbvga4xVt+PW{hRTpZITclzf@Om?!I&mO}czLrv0z5!Iao$NwZQYGs#YvH;jW5fcdBy>L& zztTgS3>0R<1~2$S8)^FH&A1OWzWFvpPb0{Rp(e+=rxs*^iq5H1Pn4b2+&MTJbZ4;; zp_p3+EDw(INxh0ZjyJ&apuF}QB^-QcFK{>~B~N1zij0RG0`AEGb52EzWll29V|LwN zY@88k2Z~&$HlNL)J5)S&M|QLsG8o|pjy-3NVb4@I&>u!m^9G+MTL{(5>U(`4X>`~N z8l@1FB;$oUgcjvTDr=&f*ly_P^0celD~LMX?%Tc7;&?WhzmssSxF%0iEQ(c))pUJl zk^0OaJB|0JA;!#2A*bytxL!=^gPW)e2TxP5DURk!`w`p3s%W5<1_*RuvOYF?GYaML_(K85|0Qtzb%57} z!XA%*8*u!YACJGRn5Bf+pT}QcM3x1hEThBXX6q2MT1iN+p6QDm)(eVZuXa@8rAMRC zzju}po7ZBH7AwTy3*OED9);2n8;u)_GVKV}Oy$1jG-yq7G@&#K1qgHjDe|G(ouZtVm4$MI*SgF>bS8 zoxSn|zKB_;!9X{3KIMz88~h$%O-LW_ahOuZqhjxkMA@qgC@jYsl8 zD(q=Z0K#8c?x&5gjkY5LAK{4mXnp|X!GN^s)`#)YUVuCpeY>_{C*&NIWcQ8fw_2g@ zN@g5H^4G;r1-ke(8OC+_p?4LcYKmVZNA=36fG&R5e_Z^fPZxju|6KfgPZz%l)~7!% ze)~T!egfd)2dq=$SO4FO-zBj>E0RT%2D^Jl-An1g^~(Q)O8iA*yxf-&(NZ=YuQEsI z74Gmm(uvs;GY!+)R%yK967abB%w#Q*F(zgt9Lj zid?jrgUE&S+LHIG`=DO&bnwH(`Qz}?nq3vs^N6X^B!WHT1J`kp>W`xG4C55t1usp(h2|daQ`=FB-=mw zDgP1d{0-|lI)9`3gGW@)of(F#z&f$BUty+w`?=?q^$#J^+^hGyTYXE~!cy_ju9JSn z5V)V}feeTMzy#meA9B5LffWSzmfyFvfoS6sY@13rgIS4yFfT$^mf8ZERh?Jn4b3)2-D9i(lip5OAYogzsM+JZfH^z$Ug3}yR9p@eIy3+ zQFh1P&|%Uc=BK;zPG>4K1`yy+p-#*J#2^UNXNMMffsp0p93L)*Q?VjF^}oDei|oc|Pty1s zc)jY9)*_E)_iu~eX3UDyhZ1b`=e`l;Gz4?Ia!`NOD&MmdV+?H|0P7kNw5dHeA$5r5GnNGAj60O4KCONIInw&B`y=x@AC9~Y2 zMD*FJbFMM9b1v^9bmU~#RU7F=7ilp*?Byl>aT_T^h`7pq1#rQC0Dgf(&}r{}crFe) z?HxL4_K*?IJxcF*mwWM7f+$@QH?ol}g-{4p#ycLsLZr2^(!quIk0qg2UcuW82rw&g z4tt_f+iDT`)%PA z@z2Zz*MBlda&i7sZ2Zd~X&7CMfW4(d1iPH_VKEGkwy&R@|8ji^Nj22<6RVzaDmJDe z&SDouD9^4;<(dU|4_L}~5&p4DU zz0(kLqPwkEYpklc0pPt$i+Hr1LuAX+c;pvb8ySL&_gZU$W-~`J)K}ZfUaKLji1ri4w>7T@bP>?u)loS39{W1B*c;qK6YR}3TM z-$*ln3aQ6%w{+^`5O@rC*XAkN_8kf7mHZ$UIQw%5yaEk@MDpP`z9ln&Ir7cI5WShV zF;!K%F*h65cQUFK@4bK^F<=OYfj0X!=MZ~fv;TkvguAQsWH|5SIqNtT?(jQ&PJ%x=q$1Nsgh2qm3bjMUV%My?EI|$%Vc__F@)*`ZQ&-vDbYez3 zsl`&eNTAA+LDJ6%+R2Y!6EUx8YPC*RW9_Z-&AatG)%{_g7v2XfPcXcKhBK&Axsd=;#-b`Ng7#`!of?xnp?;u!CG{Lq%a5c@ZppwtRznaqlMq}oWFJDZUonvE^_b4LHx`eIPzXY5T)_^5rsL2@H|BQVGi<`3n-UR2dbDXrM~Ev~=7o-9sN~ zWxM?wI^grz|+bnT!V=^v*Q|0yn1)6Rtg(`NwA-{k6D{ zS#V5W9r{ERh5=Adj6g#VN~62n_i!K!PBVW2%7W`|eV7DAH{XpRuU*-R)rBT0`12d@ zqey$A+G}#7Rl(8*Ku^r9 z^i0s61?Q<^ZVAvc=>+t|=<%@Ml;o)>ufi$7`+@>h9{}TY1SxqsJt$BmTOpqS>X|eb z6d<#(=N2?(n~h8hEXSMYjI9p)K-E%hbX4{!@*rU2>cZi=fn{O_G4I-A?>v?Dgw~ql z`8{jgt=s3FnUHOQ2=)T?|kyxA}~HC_Ofy?x2xZ4ycy<$g8+ep_$v0 zo6A(<-BR#o0w-6GyevHN`14tWe^O*9_oQ3{R##z#2)e~CedIYZ24F(8D+UHaZ>kPmmWx|(zbADaun~*)(>}}L^@nY zmkJ8F(+4V^`pp~+b8G&hPb<9{Hj$h=!0@KuD;|y3RRp$y%{lwd!B-aT;@0GFQLG=a z(r&CqgjWX%n^2K_%ubMFWLd3m=GVG~f5ZhMKdfwlT?=Q@X)Y7TL1bV&kRsSTtLlNh zFqOhG4yw$Z>kJRjhz{Uff6RkRp?A8ho{kC#3N0LVFL^t+Ribw``})>Nvm1Z%9aUF| zYI4gW+D}G@3c!VS!GKP>g*1d9I6RG!JQzE)Hg7X(foSP?2-+{l_O znSm=g2^(_c@A`{3)F|R=Rc`^Dz=BjTX@7`IgIIZ`1A?j*fw+ESoj%fc(-BS`^QaLN zv?_&;>=nky$qsuMt@n<|_Ra~3m?(ii_dJvRDiVrrI&^E08zuCpKSko6sc$FdfcoXk zd;`{}LT$Uv5*CQA^I8hZss%l?Gv&pRat(825%WNK3Rh@$>|qBrVg13EEaJMJf}U3W z;t#w!z~0bYK}_bl;po9sF-vT9%Bo_$o@zHUx;!+n=?g@<2Vk!=3&a@%e{j-t? zX|iJTF+lC4bB~Ih{W3wW#K1YVaSBAW0o$^_$V?op5oS{LCdi=lZHS#kkP|(b3@1bV zkrNzr{Rjjq#@IDU`@h#6Ro@ za^b3%+#RZ7W-bg75+!Yg)R-jga#n95$ zNU@v6HXk7QNw(Jpz89j&9mTpsd-`I_9-?)gzVKv*g;GH9R|Pjosh%R-`Mat1YZ|5p}?d7KEx)5IQCcL_vWVcS;OU4&mb}Z_eyx)Z~$5#SP*XBd}g{1918jjjzCSY z1&%NzC?xNVoquDnDE4UuFY4<9{+QasDy5Z*o`ieuu9Df< z_QUtgVocbavbicS{rn&yPK;ov!!ha!G?+(F#Sju+Ge5RPJxPUu2giF>^)2-KUi*WD zUeS*m#f7eKB@bVh*2QekOv+L9%ztDunACxKzstA41rc!7^}z=Jal!9 zy{86yU_OlSoOFOziidaq(-%b`x-{7OvmEnxUsOEESwO@3>o30%h%zLZW&oT8?xzf- zf2xe1G6|v#c{8)RAIAgBroYGNIB8r5*_Mz!v2jpE*er#yMZqTxTlcrc zY~1UCO1WL`FQ)T|EL1UAiK7F%d@Dmhexr%f80*S`7s%lNY>;6P4(cGIdh{DZzT7>L-?yCnf7I14n84L7~9ROp&e4FQQgELT1 zJ)*}|W%IdWdNnJok?s@85JJa}+gO*4PT_rWY055thINwCi2JKXkG&8^X`dKrXN)ae zM{5FImmLDF4fpC+d(T;IxNI54AGID!V29%o=SGE!(r_+SeWSmeEi&^xU&Zy+xGu=N zDmzPH&pQX-SFZ2@sD)~>gqR+d$}jA~X3U~_sWcs@0=vq9UN}APxg9ZpNi=ku6?#wg zqYJ5vKlKRk9=*ikH-_IVo6a>dfqi47kX?HmiS=w% z*(Lblt=6hs6WKyY!dre}sQspO{3icu7Vv`uDd1;e7uW&qRDyB=bfB4mVFhpF*CoD5 zFvu~W0esmg>Z5;|uAZ3gh>Q?$4EUPGJxYaTr-ivnJ3TG*#9qPiQC>)NFCn5dr@u&k z@NM1?UQNj({AL$ zPXa(|R3#IEqxSh@U`osa%)uYP6c~%aA7$jbh3f;?EZ5qCMeuTi1kQVBgrf?G zoNP*)t^{|oQhZDwSGRb(S`*}a4cSnSc$vkiM!cvH1nQR;EW;K0jy4t zrRB$?&M1N^C3B2{N=Y20Pb`^MPu&Z6zrGLG6634!#IhYt&al;ErBMjDDKVGXt2$*3 z%nSF~Y8P?C^ejNF2B4M*cgroFQ;@2T&j{AgO9W~?aJAK`G=!0xbXJ?!E68X(g;$e0&@NHA)=_fDWq?|b&bbN&l zj}x7%$`!(NWNE9q_}cfd6g~$P5Xs_p`G180uyP8ooF+ zE}jcYyt!ITYqCIs;!tzvXQFNB(brF-)3aGZ0o|^DN6(o+s6q{{TMM)hAU$h&HaYWDYgWn$2Z%M;QZi74m+c|;0|t}TOW6=Sq{o$ zJ!c`Lie+^Wf7)R6RNuI@&~n}JyT#ROA-1cU>J$`&S?8oGg#o`#o4sOsY7!IQ$kQW8OvOigVr=~2JCO@3ibfl_8-EQSl z+VARoCB%F3L*a}?P6B_A>SpCTf|=59V-6foH;=S1J{x;JO2ZniDgqe+mK?lX z?s&rl@?E05arB}%2v*r2jE&U>xz_q~L)x@ELOd4%d{bwd(xg}ds*nQ^A zoRo&NNgQT}@0dGJAFH2A!~~`}%v&YVm%C;8eJ>YAp&3Is^0^W38(lq!YM1a(^tFza z-?KddrNXwO%D{=6uFV~s(sMt;)K*0jUVT5a8^JMsra8W5^gex;T3mXjMuQ_yEx{-B za~9@@CGqUr*vy+%YxI@J2}SfgU`1(I&C!H&Gg#qglKh z%-H*-5TTTfuCHq=bZd@ULC5AMb1kO1=kUiwQB_A|k(tW+N=cpjfea=1_q?VAzSxNjVrEw5kE>D+P- zuk~=$%OqV93=;alF)L@{vmitUKU3JW(v1@{Ei;onB~b7V&X}^}Qv|BEK7OrJn+(5t zBfPoZKXFnPLF36t zoKAhU_5@Q8c^f3g0P~5=@Qr)?i@1+EZI{Z4^n^gLs+EN`o^w-$!QN!V@GzQ5)c8Urc&I3cEH9C7^XWtHO~r|6ZdBB` z_BY!Mkm%Z-_DdA|JYzI3P(o$I+ATl3g8RY^lbv~JGvSa|tF<}P$^GtNPPVx_Xv!(m zqHKdT<*Z7gm*!EU`BMB-b-kM5C4*96+SlC;RQMJYr~@N?hPMis?jGs0YrKh1Cr@wf za@m!GRQN6r*v%?@7W-Aj8%_K;&`#6bRTCb(Diag|Np44&`9;i2aBdcEknpV?5joV9 zvzb?s=*o52Q`rI34+KcyU7`TJOMH;Udz>PH&GHA>V9rCP>qB6=UgsFPPE&1FhB|IF zg75*_U>efBk9*>Z4NUln+A^>PzLbRmhO3yt!gg%445CK1n7M{3pn;F(%Jl^?Gtb82 zWrI~9pJPXT^F0DDYw1S58%lbWe_>B#*JKb8KfsY>6z(?gZWngE6#lRBP*{?ja ziw%iiC^vDgGog z`vV78YBr|MD6A}pv*2-wNswOrDtg@MJwnCur>bCn4COwyQl-0Q6`}vlqm8xK|49XR zqYL*n5T#P*IN-GPeUgY=f%bhpMtjaWP|$2Iu7FOoDtj_YH% zCiD}Htmgd}PMuW=&s=40NpSGImn;Z56!3I_>p_{gGG~v*r$le#T~glvqDB1W z308?zzOwz;)(#vV^2lM97DDmfVbTr87oi{9-6>A5Kc?hrJtsdUqZ5YDr3}P7Jy2Le z+9Z98nz(-Yd=d3D5!=!KfMnPgM5&l)RSC=L1>>kY?&|!UefzVXT!_IS1Zj;Gt;xfg zMuAk1q#o)#t_RmuB69FIM1VsgUO*NhkF8_{@Ngxb~=bK!Cu)8_V9{Neutb#|Jz0LIK>t zdw-lE{|S8rQOy6DA-{dN#GSWvK@+g&S7A#LH+ttctL98FA8tG3!>!aAiWP;Uq?bzm zaXRy?(e)lcBwhgc(UZqLq*!PksPfOha#f#+!04w_f0+83CULBCIN@ygDx|(H*NTJN zKqQ-5n>^L6BSx}-o+2#wB(NnsFbzJn+kRSi9DC01oF;{Z(>5PyBlKvQC#_1{7`qNf z9)7?i^?v3LpU*~2^WH%=#E}4z=w2{g9cf*Y{E4}(EHV8;MIx$rkMgc=#kU~e)?Dkv z@As<$)q){4J?jrZ`0Gx+b92uP6huCNsPkiCq7tos;!_Z*xh$)QTOAof*nDqU`HDu5(zZ_ zS42W4mm5W?`FBV{GN8!Ww_;UXqd#3w`$lhMga{U9DTWLPN!b5GeeImQlvWD3XJn+G zoMIe>QJ?S$@;w65t^IZebRxsB(;)l_x{f;j{W@w2T}Ov5!`g*upkW7GM^UAtDgti1 zpeUmxETbhXSE>d_`W}6@kMI$A6tgVjmfks3klGdc;iagvYgwjMc}Zq>@yOjEDl10VEG^7aykSYMZGRaCQ_{*dnArkp1^CqSB!E7 zYCW*g2;%g6>^eY#VxKPxPnJov1*K*X)YeHXRDk4JGN5c5>GJ0u}-7MXYADlaUy zy$Ny&-5|F8#7c;AkxY_p)<`Ogc^rlsMAm1Bm_7XQfSW-@CF>YJ|)uX{m_>sC$4ZKQk`;{y)oE%)s@7E-x_RY za2SZ!F`AMlqAaFvbSfF0cU`B4F%`;gOV>Vc1ZID7tn+j5#sTM4h@iTu?06{m9$x4w zolnBqc$dZg;TyPR2akiE1-#)(d-o6-({*;Wl8xR{@sQmO@E>i?Ue|?EL^TQr9E0w( z)7YB(i3_C-;|B(N9yILTK5Q|z?~vX;PkiySUxHCv>%qZBn}gxhn=gNyCjX73{5NcM z@ny5{tFVi~^?En%BI74ZaWs4vuBf?S*n(Ddepb~d?U2Mxaw78@# z;J=*HSbDTVFOm}W>eGvPGXA%DLVV_Q^>>cqrf|(_b$K<6rslk)sn5tDnmQ9y0$cDq zM@W6aZkyk;Nyyw$R-UBbK<>HWE3(Y;;37t$uv}f~M^5X!{3EiD9ehO#KgW7|{aMPw%4e-FqJyayHf`UESB8AHO=#Xcjh9&E_=zh+e2r zo*CJT^s2omGE+UR?s#7;vE@k2h9IL;uZk=DOF=O55!Fv0j{@4ljM9~)yj=FvZoW91 z%t@JCVe!=!20r+Mk93S?K|wgK7KQ!HmCvxfZDb4e-Fqq_hI(bDNE1XTT*I@^rn1gx zD;m&Vb82lsfy`{z?%N=cxxiF#D_kN)%rXuCP=uX?V^-4mnvo?tgOMwUG_YS!CPG|O zO~nUsD^07cD%;ma=mmzUNF61V9Z=kg5n$vwJ+Qcyrm;kQ*l7O488;o&_7s6=8HGv0 zYYR&fRq*3AHiFv8glc_mns5fMySf8Sj~|aHJztU5TpjnfpV~J?#>hN$Jtv2+HjoseXa+hhntxLQ8{_2>)%^((FUz02dAY;a3RsdZC^mO#g+L`(ATQUVK+W=q~$Gn{>9bM~jLe}Lpd z7OehViJ`_!UoIV2(CvV9Y$Txcj}zcO;g&!v^{?|t3kY38Ho6`7G)1bSD?VsfLg7kL zW;BCEN7p{c{9s8xahGDu>Cm(kzQ$5^Q>B4|Zp}HH^RE<@ujSTWxt6Z#zOMa`g~?0x z3oE34!H2RGHcGx_scD8P2LKh*b%Ov*7uOxO+I!P4$r@^ZGL4i3Jz~x>^ zyNJ5~%8?_drWlq2xQysJ{3wT-G}bdNU}{SkOdWd0>Jh_SBz#&3_4U2J?Cay0AH4$W z>oe$&HfvXFKDvKI+?wKn{{&o4`9PS$b*8@Xc0_yXO@ScHWe}#&-B;SkdY?iXj6`-PNaaG7}PBc6%+B~5)5(9{9yGoPux!)WSn<39_oy=jE~ z|NjGIE~$y~h~F6Z>J+r6VjK@S#$6znrb-{0pYZMNy2!l!{2RHvaWgRc1;O8t%b2J2 z@5`>qUsP#SUd!-N7((mXouHR$6LouB{-AzMk|f|+J{PA)!UFtuDq3T2pMy|OQhr8# zqMV_JA?!rb{ZUw&W(;TN%8M$Z8PA&Mf(;oTOO4GQM(#g&&4nstw z=oiR2>=BVZId|k@eQs#xeikA7l}C?dH0-ja2YjlKoN2-T{!~Fgx7r@sbLa`Ae9l4- zeX59Ki+iB!gR^T^SIOjO=xN~vdsyueSw$MpG%`c#-Df;-`pcCW^q0(R%)ioEEF5SPDdC zC}?hXKv&m&t&6LxD%8?L5(#EYbQhQ{C9p2g_KPl1ZXm6L1+{Ab9@O$6fPz};rBG1o zwB)wkdubG6B$SIT(0e+9c;1pwPzzPV+1n->VLZ|T;qQ5Fmj;a#QJwui1hoQSAm>F; z3mXKr;xB_*Unr85z|~cWa<6!kpZoh$|R$Rx~t(&OX zFG%Q?oMAL~XuwyFR#-&y_h_k0->bJ?b{V?|QpvHtY+IauV!^Yo#33FWjtUH7vwIdtW5al%GA%HS?kL%@-T- zNiI_ZUCgsg%weWZt|9H%)#iAstb&nW)n8Sa0&;8a1+^{#jOIlA1fx0aAeu9(%xNhS ze4iv3W(hg=k;dCLprLSSK{wZ7M)17I(XHIiDL@JLNf8U`4LJEoXj!(2Q3f@GhN(|R zt#x1EoES?moRbKApCl1_o8vFZaea{Dfjh;rRctABg*v)yO5@jjX&lN# zM7OYvuls0nh?TjW=FQ5v$SW)_(=SN}NGr^luGH@!7)5X`+_8Oo9Z;R;SZIy{%+l;0 zi_#Sc2^}(Od{`T&_nKp)D#D}kPRN%4)p=jHtX>AhH~HMfG@$q2h(CJ%1B=Fz#QCUn|8$_f}Wvr(>UvGN$`IYC7Dz)SC)vR68H3(3C=3 zgp6sXl4RNAPdtTv43TuMq`UrjnL;dhzC&DkHHr6+)8Id%oBy&q{7ricVcqDqEWrrP z9eEZasDo@(-;okdj%m!4EPIV5f?wW72UvFp#Rb-_|JO8#Dz2VCDl73Ai$S}DFpe)E zj2i&L`0DF11cwcGd!7mJ4xHm`Sl$3ap}Aso>-mw|1e>+Fy8M+O|mEFY6p+N65= z&)c|^uHW4ce+WJ_P(yC`VhriGzkbw#qTUg=j#brM6x+6#^IAyNEb6hnkijHt*FKQG zto7_`LZw|F!kV-rhQOBwxvs=#N%|tSLT(0uUGAa8^2^P|7ie<<*v((r4j9*+pm_md zI9*C#$}hNXOK?MZbhAI`uhK5?rSY&zJqeP&5dK5@5(RPHT=bCiWg^I5sYNz(kz4B1 z0tjsPD9+E9iaE{!2;&J%`tr6fV8^cy{dK^1nnf6dQ8A>J<qM)O^9>kJk?r7jde!#7FF%DwDI2dretpE#m{7mK#@r8vu{_)ZP z@lOuW_)?Ek7@FE6{7*@RWO|ZMTx6aLlc* zr|k>s8_tYV`mm8z({yi6{0Fb5<=(0(rMBruspw1&y#JblE0<7GvC>Z%rs$SHU7OCk zS~!Iyg#UnB|FNA;`C6M}c(`>5KPB?>KVeV@ zMLmRWwAUPWo#RGr*HBMhDbX_tl&KLfb94JLUEm-Hue|&r2!U?kjzCCO4%cibPa-}% zR&g~P0(SH_hv}D1v!OdoaXa=}ul5_MKgS~X7Kn35?)E&(yCU-AoJ0* zeq9FIPt+R3+agB7G9UT?t9=VHA9Km*IU<;_%m<~^j04(P|xsW}ahmx{tIPj!V4Q=Z}-& zKhc}uF7mHHXG`ELCp!2BIe<6vQ)xgkK0qf!4ju&^Up((d?U~-!$88;F%or#YRHRPx z$m-eN3~e6as(Kuo3%oB-n;&!ZKJ(UImX?S1n8(O_QV;U5=cu>a*Pi~xXZZ?E{N}S9 zuU;=XeX$>F)#Q1>X9Zxq?jiNQeV2W8g|Etzi=hGNH&T86z4@z|3F9W6F39y}}1*r4;df;}k(`GD9W$cSNSH3d`Q(u zn@wmk$N$E@P@&k@?}tJpcqo8x5HK0YmqLp%p5%&TPCq=I<}Maki#=`1=n%zs(!BdR z#)SyU-I$eIzAEZ;Rybz9>`9$lDKgAZ72I_P^H zS)DG&yWzAY7P3=f7ADzMxr&TWgRS!m*B=hq=ZIV+xaOoP6yS_Os(S8da@` zYL7YopCQzvE3b>WYrf-9Db3wF+)T18`cV$#a!o)kchl%xZtX01c5?WzIQwwd0cMdh z4}!_%vR>Nk8Mz#|pgdXJ%nrVp*p8Ck1hfQjn5b+x+F zPG(4_24u5!QY}i40XAEcH!9q>G<=nA!dOqIQuzalrnO!PRmP)IXQ0XkdI-Nmn*f7_ zWdb+gs#IE?2^Cn&teg?f7Xhm5ln4S`6rjo`VRq_eHrvg2z-HUg3O1S;V59kn zHOyjX*E}i2tg|!;$mLdEZJnZI92a@mi&BGFFuEgR%!(1JAkJuAu&(v^BY zey(OU9M5^|WUQ?n3U7JUx?w`wSN6lq5&5&&*EEGPPD5#yh|TG|hK1dkL8cwuxfQqv zQTb+Vkfri^K|uJkUELT7&SYv^Wb754eQxg9jCojALkL!Xk8IGgx#vr1mB19S33|Rj~@G z{kk!R@xBKL(i*v&$YYG#$X3j}n=J9sCzDThaFuAlTQYIdW6?YQ=+i(;6us-&JW|Ag z>+3(xg8zho^6>oYRLU0w_77kd>>zzsq}siD3lFR|mr$+oQn^QqhvxjUK(F}nbdMwd zSBHE}EePE5!KK@p6`geMaG1T-9K?<>kJr8#TXD)XG}Le!Rr%W}r~At&x7KmCGlctF zG|3Ei#ld6!9DSAB_(C*EmrQ#U#sFLqzDI#gr`)A024;y0TO{31 zhkbM)5KYd1J3~{@$l{D&zeLG><7F36y zWpIiXuNCD91&wRabZ*_Qd&kMpHc|W`VoUd`|1g^@Z+%YoH}PZ*3h|o;ZtAui^t%%T ze$qTBBkel78h%WC6@#B;EVaMFIju2Hw~A$*S+(77aZvlceHhH0(8zjvm73$h&STDy z1oN2|8WMf1=*kWj!g+05UpaKK_Xlf|PqCm!gwiLbvU-~9V5u17|`&>#vnjvv};$+QU(P=^S&u+)NSK|JuI_4(CU!Q>;&lh`{2l1*n4)?>8hpZ;Xw z7^$5m4EOxO@{+~W*5RHy6=@XEPU`-polGBdi=1tmIRS^nqcGT-vixFANs|~? zIZS-+d}GN{}~)>7;(GDTVBRM8QrVr57iV1lS3L;q*z>``rIsQ;wp* z)|3qwYf5L)Bcj$cA(ZbCFD9U`50XuNEtpSA=dU$o&ds`%XplEYf}|6&z$c~p51*75 zjKpBSD$<%9x2>a{g^#EWQvwuE)zP%#KMI=#%sG3u9L&7U2eWqXlx*3 zl@M65ems6NTETAFcv?kQB{oUdiSb~4mWe6M_|TaGiBqcT$LW+N`|R1()@bTsufS-P z_b9AVOglVx#l&n26#5Ekm3 zGTTfWzt)O-tTTpydm5(2AFP%46>n-g3jE2Asy4M-<6Xci=b~FC!o)4tWLk{I_8ac6Q}x@7U{w zD{5FsY8d9q-RuuM-#5(ZQev4a`GlfwkbP$Cejkw$#4D@|0;i{|Laln<>VKLV9RC&N z{MR<~Z*L1JDskzWI`NlO!eydkh;*GRFJiQ;RW2RY2l?gl)}GdUw}X7JTY}Ks_TF1I z65ctlcuVHdS>Ya$t~-BZW_@n*46vMXU*CIntQmhFZEi8YJx9{Mw$bGOqPY{JS)1uW zXKfFU&uT*XBt%Yhn!`PR)sHQLT`%ITtMZO zFW0wflJxf&2vFOk;NvvAwaZ@z25P)D!Lc@;AnAOeXs%R*mNk5zh$0~Ek^2Pr`!o`D z2&J=a2QsGWRT0?KDkqyPS#Fnuw*|*L@V2-`W*|5s_WdSGW4I;P)UZiTA8s-*P=){l z<+6*apwBGywpeXszvCpH3mGVr2#(lHAOof8F9W44Pc3AiH2Q!z9+`u%n*4@*c<$nK zS`ED|x@8~{RsQbVG)72Qs|@LCTb_Ge)Mo6dU#ZIg9~zq%9~#qN3B`zh87RSr24tXw zL{uCX2Fgnjm1Ar@GH$fS0taNEyruWn`eJJlYYN{;4jS_?403Bv`-4vmO&0`DT1WEd zo8;IK_x9QuMNhQ@s^vzk4115O#fEO#yByR;!_kjP*ribvtODaJ_B-&RHUF^?~NK7`-?H6}eK3gxQQ z`ccH)Z|bZ2I!Y|9o83MK;>BqSfG0V zJ~yhIbG4u1ktONZ?f3ehq~a+!TccIJBr>=EG7Pw;?whtsfpF&ny*GD^;}fhQSFH|N zFm=tHN=LFv;j287C&0eBgj-p2n?d>DdSy-H^$`~W3AkeAELN?g+lN=M;oVB^vvzN{ z`Nl;N&)n!RKCTKe>aT1?*4SD9h)>I7yTsP<@|3qjSbwL!R$Cg8haAWDu}c)%Hdok9 z8v3xsb15dN(YD&{VlYw;6j~5lz}AyReh>T_T8e>ev{jN87({A~_^^>8zVY;Oq#%UD zM3tHq6wN=oWJ#xR95#Ik3#au)GtJS;UL?Ucj;E5`sHCo1Lgb>#Sg`+_>%zw?2pT<$NZZ{3e@* z?JaiR_gZ%>(gZ&~^sYxua6iBs^K^3j<1qP;Oy~auOf12N%0)yq4RGPNFSu|B!!iT; z^-C@sU|4qoxsY)ouZ0nJvKYXy{0*uIo(a3hy``{WG+lKrhZ{6zDnvMO0h#KDGYBI*CI*DltUywVou~xO&1n8k2pY1 zd<9pcFpyC#>+VZU`e4=$))xLz;7er+tSwUdlwlwSjdQKZ8#a(pT{O&iuVvu+2y)^- zSLiK(WmFA8MwKjNRIgTDJa3yI*GUCBk08GJD7NDHap8x-3IZbP_vdenX_?iHXuqA^ z`_RbLno@A-@J%OWRIH>g@DH$u>`;9(T1Z+Yee5rANl9i%?f|7xUH>+4&3om^?jIuaqQtuUNIH zj!bZr=n25^g2QSYDZXxXKixHy|kY%qM64UcOM!fCg`;4Pl)(CmG|`1ebWL zYOuJ|yS2~k4CUsSnU&gN_2?0 zR?}mtYxtDVsRb`{N2f}$$X4~Ug2M)4u-=hfm9T0zRi4SGxB9~>Ra54{<_Ddw`mcLk zJ#uO^7+(gl`y#0xDCX2`sm4kY5!&I6Pu+-1+1Vxyx$78Q{l>U4sBH0?3JkVLys<8Y z1Hl%!;#U4N2Q`=^XNj}dMBa@Bm&`v&Se)&muyI^splIUjqWDHA+r~zOdbc&)-^-7p z@;EWsIAXPkzcR)#7~WqsGYt!kU+WHud|7v1ma22Do{2S4epTP396!}@szT*q>db0; zy&L6r^l9G{`yH>|!opglTF!2Kz9JK3?`rqv* zIHathJBavwsdSOcDY@$*G{^rr#Bg}!r;hc@d|ax4W^%Co?9$op;D+B?kQF<8$>SbT zJ~@9-zZ;^E+9CgE%ZhKGM40(dwMz{A&1Nt20@U`e$L<^mIZ%-DX~ zhvDH7QeoI_(}6aEkCsX=KW5~;`c1;`XRi5tw$NF_5^S?B>Hi0FQ8fm}NSWlMCH|ks z2%B$IQBvW4e#W!X72n3v4gY8E7o42(DT3Y!>bW9rn3qUTU$iS$`Sy z90*|sJzphO)poVWU7sDEaG7&nebr8qz04?>jE&aKeA=JD4Bx z?N6thotAyuQl?zr+|5^=+X~d99kb~pwIQuMYh1MR)i_Eja&Ea@fjo?YSRI(ck22~@ zQ9Af)L2ATayRyV-F>9Y}H=~o1v1Pf$ly!$bH+#eB=Q>+TBr}tZo|}%n-`A)z8sabB zL|?*{c~{=3M+~ET?Xc-SnlDm%XjZu&JVKWnz&Qq6gi2_yET;uQ1LX*O&VWUzF!Lew zIWskn3$pGjlIyi9gPy&P;fv?JfhVcN3L~4iBM^7-$qOve}eJz)h2E^?e1A(eR9K)l-O## zq_o&@Rt25^S*$byO(>`OJbGarxohg-ajAxO=bKh0qLH|z4TmV+Y@ES;j%l8}_jy?n>sr zL4^k?v|Vo1wW&4}9T4BT--FCj8D4#CiAgkrGFU@yIXU+ zA)$U%o6{drP>%nIg0lWgtKF6ZdU?iSrQ}qhnA9~J$-)|B?Q01Y9mg&WB$V1crTa6 zxsCO`96~A57a_L^Uf&*`tEFw?Ej*5POm%Cyr$`|`LJHXlg=5L?iJ;e7VH&Bv-c)D6^-^U#TBYNVcT+s4UJIN~PD)M7`wK>E z-5U6HQ<@LUBy=rJkg|w!Tk4Zq=~0_ewx}<~+6;^+ER!Ott9-V$ws`VcZ$$g{IQGHi zWce&_nekgln%4dK(+OAhNcLEdF8v?cg~6{5O`8#A-d^h!`Vn@h2G8*hKAaH=owJJ* zV^7#Czs-Sg0~8ncp{jw|A=P{YzgtNkG;LP{l=>F4Ph_|J0%!Feu_amT7zQi04J`C` zU$Ed$+2;|Sq)lAd*VjOD<24sO+o;;$*N+ci2 zK`oB}sO4FGf&zxeC{br#O)&35Xeg7f9-IuuoeAUA5Uz?0mzol(BWwov{oDMvknyW; zEsgmn^d7y)H^hF>Kk+a(bNYb__@EfbH?+3)DZg2WV(5TR;j~ihKsU@iU|qS~Ba&f- zgibziH`()%U2jqIZhGRC6SmG)W%bBa2~e-vDDG;e{K?cxO$4jbj$`hd@u(rI;u4DA zf>+lU+Le&p<8Xt?2V3HXA&grZcbQanhIymz+@+{f7jNlYEi@WPP4aQsRH;am5F=z` z*imF>(iL!G3cN{%?}dE6QW2c6UH3w#MkV8u%!24zP*okf;h`vRxk6Wte{O=d4V(^tjtle~-0 zbPq_@&c!o1W(t;1PZOGrcKjU&9Pf6Sb>PIi>d20I40|vZ#|i{}b#D2rS9`3UC@`_T z`AWxfVqKbYqITPLYIxnlwEE6r-3_=|gHdU&BLTz6m=pT1$5S;DaqZmkwkhLC3R}5N8N(g#XlSXA7{}KdfGj4=fnZkIG@}#rasX-A6DiR1Sy0ARVA*>6}m~OhfGB% zCFN`{eo{<(@PZ*r(CQIfB&#+Nj#c&@FMj8ky{A92BoRZ?cWt*;gKjLd)@lZzhMnt2 zzr3Mrhn+$jruGe0ndgg=qRtO`*OOH~UQR8#KfOHe{U_8DygdG8;F1X%m4H5B+DW^^ zMQwEc6iW-<&LfHZsr}?3*~@$oOKZl5ZY`!As=se7Oa5c0bWICc+m=Y%E2J=aFHc1@ zq~*T_wf9V)bfNxk5e2uF{d1Bt%oXnZYwS>|7k={Xqc60g_dY(UZ0d90SX7}50C!iu zmP56ogx3Xb z@Uf{H2T=~?Zpql?^oWXn3~BkD-v2K33WIRZNwgnX&>nSF`EMUEB;x1qt2=x(65TZ* ziX-`w;)vNgeF;$s<5EbQu>U*Ty z(1ivYcR5df(=JLNvy$GPEhavOCuU_!ZKnqV@`iRF&c(lKd2q4^C;dOGSCIGcPpU&~sq1qm!{tW-Myz8(-3+`qh1GvY+4lTF6 zp==2fKEjiRK$*$Y#auL3e@3#|wT~~7Ma*<>A7B`D+j~_lue|p}qBpF3fU+E?ab7ni z8ttJ!g<{$b?@W&p{8gs6+(hZMJEbi|2GKms5?mueF3x~${{$@4lwBy zG}Y^Y6x!ztKbN0)gFYa|4{t0NWp{V?s2G&J;T|0S@PmieY%@<#ryW-b4@#lwgAbLz zpJ@#s?{^9~)A}BAV_yoo`Y#%Y_vj}7bfz7B^VgYn4?5FoFK!#d&a}y}<%bpC-vnKE z%P=pPjf)0iQW&!_>Q~5c!EB&j11S_0@bbX;S@FYcGT3NTs_WYJtDj(hqsRW9&Yy7stnTPLIE`WPbZ3emE5n(Uydub zudrCqmag_)#jsSonJA|qSa{Fk%5on|Kp|OMl|QqO(RvYv;O@9KP5;(+3Z%$N&7HS{ z`JA`sZ@x+4Z#^;LEcm=^4%m(N&+a*ybl-}Y;FTh$of_z=DjTkOOw*tCL1(Q8sDFx%( z?8&1|NdPzM%c(2C&@2u(3ay&=TH)#CEr>=1^4DwcmL|5%)%EO5HO7@sTYn^^eMZys z+SE1Js98OZ_>9!#npw(~s;W`Po_FWrMtLW8ix|iFlVV)P*A{3cYlE8EAUZVZv7D`! zA%MLi9rNGaDY&Ju#nK{a%C#nAJ-7h|7OQPQ~%-8jByAE$qYCXYawOF69 zef~M7ZpNXO*00)u-7k7XU;XF$Gi>DNb9t?_8+luHuVYDitPSOFeXElmJz}A+ap=45 z7dcbUa6iWWm^-Xy{V8UcN2Dx^IR1U!Jb2IclI zGqeASg5>rr^Tm6_9rhmid9`&QcJ?qx02Xa)1tp`Ta97YgNIbAsxC^d*5e3mUb}`nS zXG%V%vgt?fEPdl8bAc1oKz&UvCp}YOpg;Y(oapB|r&K!&x|yf?Kx)d!D@mqFW)1PAl|8>%&*^e-g(HwcFMHxNt_lnLzgT!3J{#25i1GJ*K_3_J+C zW?}4yulA!mTit=DClksBzjqG2et% zpZi%|?{Gw!P`=Y-Rp;IKhFX zB*aIjJ(ahQ;)m)^`FBNVTDP8D^D3U`NzN%+vz2yZ4iPI2I5T({lomm*NW472SXMTP z`UO`iW+3*JQllGT>xzYBTX2ruY_Db%<2&2KUVPO`M$3{~T}-0KuGgQsHNHk8s6Se+ z{L+f6NFY&jQfy0Jy;$eZG$x8yc!gco$PN!o_p2sVQ&o~>!q72Sayc2LOc*qT=-5ub zwe^G=LRuuSp7$U^%MYZ*tHr&@mG2U>_f6iV(M=2IO(tR-;&WW>Wh9vHe~Uz1%|Rei zCBf{sqwlOF;OXulR4HXnUasOSLcepBPF^U_e^k{+f*fn4-unex58s@HvPe&0;P?-0 zr$)NG5?bPlbJ8tXDBcZaa|Y*}E?4hRw39N>*BS5m1}qi7FGUZ{m1$+|LJ|6ku*2qq zWE_Q5kcu}7^{4orj4ha#>YE@&=gf>qv^ytIIDa>_@3J)e^v@p&jTA-K669nXIcT>?B_agLLlorUG=#YiwV|B_~4xBgRMV z^=zUYQBm-+z3AZc54l($=0*}m7c<3$hQ^s3hG*ZnHMmwuy}ZV9|jG4H&9O3Cq;<;L`!p^sS}hGk`L*=yZprBsL$2opXm*`m~z_YS$tzp5Kk9AnS9 zMd`pdrt_*4=9wxPud~^@pmhvo$h4)ZySuZ5>>x8OYp>+LJ2^#s#H#tR#mK6h2-UQb zT=Fr&=I3SSJG2Of2gMkbW$NJH&9p%+3+NrPph?A`87}Xp)|odV25vFxsPv;?gy`J= zsQ+2F^8Mo__y@(s*HPop_z9*2=`+&RGEY05+QHYZ3plwOU{+xII0!|R zZ2Rf9(5vxIPzH)t`sZBCiuH?GF{`X?`}(otd##xnd3wR%$Bv<-psu*~-h*j)8Rvs* z50oCHMzom}h%$Ea%pVL$VqVeZ3%wrml8|$h0ap@J+<7}hEPtjilZ#loSxP$%HJq7L z+L-Ox;$wSI+eq4^~AgC(PsWMd+*)@i#yQ6dL2Y$CKi`sJ(hHg~lt|S7)^Cim#Ux z*EdayHy0x)<+K=lT|&2$pgMD=f7O}4fDz~VbSYW5XIj|;#ZY63pHry>XeLcrWq)!1`cjahC$JsJNs^Q-`c_C_Z9Yf>DATf%<)#6143rPx zrIE1rBlhnh`in-gkY7PpSbnAMcYXyr-Ga>r3oO6#w36Hnb-uS+HlKc>VzdN3lz%2Y z9}3a?eYk`CtF}n%54A;qYb*(C)Tk7l_^Y<)uf~#iSR>&@W6536SmJDQkzXnQonKLy zwT`2R2l*8ZaVH9e)$hCek(lbc%%-fyP|y|oa#sB6A`SRwex+B0<7Ak1(9+ zMEE{Lcu3|wmm4(BZ|O;r)ABH!DHF{;=;p1Ux}k&9jlx$&BZj>qZYG8g@l+S(SGiAo~0)DnGVOjCb;5v!`9JLR(dL*}xIC##;{0cWKfR{dc>3 zZl}I*Qt~qMN_%X-ej7z(m}-Q!+Spu=9?K-#x9hp>@YT5#q%MNgqb+vF9tNEe%+ghtWlgQgFigPeBvZ&@wyIL%Y_jpOvLJt%srkx}PRcXQb5 zOZ_=zh2C?PnkKGyNEHVP(}-=Fpzr*d%boF;cyTG_SA;0aHbA4vEoIPXVml2rnq0=` z8!qDWj!s4Gp6kN6vos|>91^553inUrtZ}qmzop+~h;T#JCfnYVYgFiHG`pUnye@vb z`Sgo;goi*~aK?RnRg7!%H(fYsRu&Q%%SN_ql|p-gv73o2!mYhOg&C25XsQ=LUQ@d5o%Q7 zg36hXJ=FPZM-n-ucnv=LHT$hK*C~dZ&~`a~e@?_3@+KvGULVz!*l*{N@`tOBkO#M# zTeAZp2MN`nweSC7?5u;jPT#Lj zhY}(s-Jzt2bV`GiG}0wq(j7`lij)$PDgvT(BLdPL(ka~~{oL;l>h9Ow=QlgEe>gi1 z!i-*@`#RS-uOrG%*ukvWj@at?wQR%r3#)#=t#NhKX&d>mNt}h8(UR!^gbggsplaUr zmMq`>mJ?C~_@i;BUzYit8!XV6CDo0&m5@)^pxmF73ptPQ4U<(>Ep%z1g9AusDUJKA=3mks#y z=}D$}vD`}9Ey17tKqF(+aH6`@_~pVP{*|l#ow&8blF`RK)AG}{U%xps9_5csuHC;` zYx?M&pv;pYiS?c}9mJugz85CzALGrn%v}|(%vKccjKBTfLg=9Aug}YYop`T00IX zh2BT0d*)dqR!lSYc`i$O^hBUexLuv7pLYt7DYR43SV9q zyqCw)7ic>kV;e1j*?S-S>;=7;R}`K*bN66QIqqpH)+a02q-k!`SBo(82`)Wpk#qXY z{c*dwQ$2!6cWaNlGJ3d;!KBvnj&8l?JM$N8JqYg-ozQGO*iY~?C`WbjPH(1m#cr5w zh={8EV0WIrH{tV2Xu4)O@C5>b*J;VDD22~W?+>Rni`PyjC&0IZ`Vyh+$5f0UkI1^k zy`<3r{DbLdgVwVRpjU=S)Tm>(s(6hY@3S6a_ zs%R%`#d`Syf7+Dr8+a#aQ{cU>YY16LRWtFvAK&^A>kHL+qmSil!h1Ns+#*HEZ+!Dq zHG$+K>#oxNqEAVgT^{OYS`b7yMp^} zLV=N^kCv8}m~ZQfla5(pFWzQ+?2tmiCK+zN#Tl=9^x~f!Rix{qc z2Z4S-UwX#ANPkhq2p^DGxtOSl+vIYHt`rGJ1Q&%nStzz!;DLSSg>hP4LfptZU*+d8 zi4~Wb=SA1s?5x$BOTCWiTAaz|AwhSXu}EKL$xTW=6GU}Y5e*uC`^s}yCF!`(M~&hg z^IrAfBewj!V-nrLbxZYN^(ML-Tl78Z_ua^--A4nR9>vJ3AP!fNZ&vP+UlST+%?MQ; z&QixXYqLVAd#0wv*X~%=FmFw%Ghgblc?4{VHn|%Npun0!N|tkEusj zL@f^T>GXA(CFHgr++59C)A-h-NMJ0Un`8iwlQ#Q!p{$2~5LTW{>Wp7MGeI@)FgUn4M1JW^UP@tAU-%YAk zgn3NV@sl}cuVAeR)P4Y`kLE4qnZh+zwD4AEJzRGzXTP#!tzCe+4lyeImF+ef|Cw<%tqQ@Cq5dmWl} zHm>)bh954DGm|fMKEwkvyz!UkI$n?&o^KJSrE5~c^(*osBT0SKR~CWv>U*7NY9K;K z03viZQ^#k?DxNY_0FE)*#`YDq8evqQCmJ1ki(~5JD+L4ghnqiA>ZFv)n`jv4_r=0( z2o|ef%Tj#D#5w-1xkmAW)qh8Jws04v((jhp%dee>^L*B98?{rO@U`f2n$@_eMf&DX(SK&0xod0#{;r>sSRbI}2oO^*)S&) zHa5W=tAxO@O4@ZH0RNlr14>mcHfPvij#aW>j@58>Ra3s9M*{1vN9tNCvA?dQn`7PIZUR98>PpqQ;0sA{#FbAJVc`&0wC zPwLqJ!hL)KkQaxNBxNggp-L5PlS~#&Sfz@?Wu=PM77w?HTk2Q^cHKvpx92a)Qx_9y zclhMbuJ#X*S=|jDs-Z*QQZrb;vBkx?qkeS}c~Lxr;hiF{kb;LR!r@y5OqN$G;g;LQ zdBXwT!Y+nMw5xN-h+}Jg?@~)9rI}XB{i*$(W9U;F)+BekMdEJdYkf03Aoy7I?hbP1 zvm>r&c2#67VxudcOUhUu-Y{`r31P8YC9&N~m=7Wm0u_yOZKx452ZNs9>E%Q$@MQP$ zIjMxrKL^r#VaoTQbbLtc1<`zY%INP`H(2_RfVGUJTp3u)aA7W0dM~MDk!J+455bQ- zk%^91Lw8X48hsDwP8ZC{B6f-NNWOE^-aSt!q;NG!khivNz}G!hO0M5IOawcM6ZCa> zq=**mV(1{mmuSRsA6fh~=vLo0K%WBtFBUr-<_&9D4aNU~k73B?*S)T^mW?Dl(~dNI ziXcact>{XIceAVk@7;z~(!If1i(w7+rv^1uGI-{zOHJ0l4lPj;V*9BNBfGB z`Rw#d)dD?qYJG4FJ1bU!yk=DRrkxYisIoKh_H28Vz)!$WqITDm22KdxZQOgz*J!y% zCUBH;Ii%w6J7PFFuLb4|%N&-T&_wFQvpt?ZQ7X@UwS$-L_#sZ%MW-e8>f7?w z=jFV^b9K9SJ50r`zAHA3Whbyi_HgD@L^3}Li_8JO(rXp=3giG=?w+osQrn@~uKvE_ zjk~7gioLC9G1pZVej~aspNLvk)*bW$t=kDs+)A~@b+f3-+D>YYvz??x&xA^n;0tf_ z?W<_nk4o~#o@?k2EcT@r*!83bikaOJm6FTv{lEt7>CJ%yd>ic2U38D)TX#fu$aka; zIlr?`{oX*#@IKPr-ZPGi{+j*0)J*KzVmEK2ZU>jdTHtr0*Ygab8huaGsn|)h$X-We zJ2@6?i#oFOzMd$h@BE%QOz%P7PECo7Udr(}^(hiR!+x>?e(=ltu}Hlm=J`E)s$%b7 zQs%;Lw9Vn2PJttnLB@3w#3dyQZzS9T$XbfN+0it8ysjT@7F~TKW&9=!Ph^)x_LqGE zr#JbzGIwvi%?na)LOGD@6VF8q8VYRWi9T=P>9RSxn=G*CX_Nh(W=Kb6?ES`Pv%6x; z*7^**gh;lsb-WM1fe~J_}-*v*UhcQWpWaAwXRUtPz8?i+*vK=fRy78H%Sn(B-Xa-QmNywdrYU?%~ z^w1uWJ{R|XybFzP116HcYt<2<10qqM0lmT7n1X2(X!$_ouBNu73@6S=Qq7Dlm_dP- z54L(t(`cR*mn#A!N?Cv^)un@ghgG(UgLmr3O&Rgt%%4-CZSx*+%RcQ7H{_^^|Ixk+hmfxWSstK$QQxnEQv13CL# z;b)9?-)Y`2J}umR_=$!p)0xxy;zU?Vp2;G4l9d4*uZoi81(ceZGBBi04IhNxFAriT z-8`RPzk01%hTcVLcYZ5>v3#Kae8G-+WDD6(bcVFP{Epu{(?~YSiNon|>KE9(_7t`3 z=@Z1Yn*3F_mw(g~cGnX=zX-U`5mudS65-ik>(oX@5Vsgy5!7vW4ws1LkNmIm;y?LG zdAR@Zb;#M_iel74C=QdYk<3Hw z8%MRIQ5+>Fqy9F8ZRkx3weK4{Tzt5_DSX+w_V^Ku>H`74xK8XeejiY(5z)%eYmcah z96q3Yy7%+`>IvOn$BrYb_S-TwA~-FIbZi+8Z3a`VK%ymwO5IS{d|iqq%VRuxKQZ{^ z2}wn1Fju8jZ})z2y9(@qK(V2`21?gp_&;3%v#2pk7+U!6_&+i1N~^=3US+o1WD=xf z7Kg#SjJ4&*Etx;9=t8y~fsiV?T6CGK^@LG<#DzOG9_s?$7c6>j$vXOF;3{TIT%pDi zf_XtdaVChz6@~0SbpmA3x|b0BPY;}5nYV2(?FdQ0lKCh^CfhIaC;S6b_ zXFwBu7y&dcPvb z^H7)Cx(QUfnjw>5DEwA8)j>{;a%6@p@KCkghFW~2=@00T$*{QVJpTx>T5sH zsiQBbaL`WGL*R5n>h-A+-si))9Z62#Lpr~OV{r7cjV4m19Qq<%%0c@N=iwpPPD~mr zUn63*F%v7Rz%;(Q9}KpG*5v>P(Ye^B;lg5DF1FhJTt1XFz}tJyz_HE2ee%WXP!cDi z;Il;Zzn@EP_&P+7|I9vk)wK>jzfE53-~Q3^{3jzPFYh1!Xj>!4q#+#e3aXA_ObG%e z1wseXSC$YvQLLDW6uIN*{?qg55=}ZQhw)`Nbc14KE!84vAyyCdJc>5PY2i$S9n^vC zq(b0`wQ=!rRkFLFd*QURG&m#Uo(US37h}2=$Q05j;JzYi&flTnLYT(&YdK43L>c4ObfR}bQ`qK2lDy$^P7a3Tvk-N$At2@hAM^m9*Be`C6VsoO7WQRA99yfG+)MS<35IbKvr&jqa7&h++Dwg#hpY8*Q;sH(hGggKc{Sj z2M>Ga^(M1QNo&`}w`tV!qiv4k5<^J*rN*D8w8Na~YAKs2%faV75drDLMS%yi9_V}n zL;aUttT#r8CsY<0{qSOW4Tjdz7d)kpNqnfSBKoHmAH3FiZ$V1Miyw7eD&?cCaa;0h z)rvyh6mGvXgqRtw)##EqR(@S;R{qXpONVpHdiOk# z$At2Ia2CB18{@%8_nFGSg?VN_+(cR_#TBYk64%Bnz(&wpGQZ#mnGdgACyisC6o z8l*I~vfE`ac?D3~Pra;*QJjZ2p{IQZdJ@s0&-xU_YU(uDXT3>gSiv?r^jQynQ@LTF zV%9MD%lOa>LGLrecn{|z@QW`DAJu&<18O1^H6!TX@1SeX;L?{bH}dg+XkuWTNl~=k zLT4gFcJmc>Sj4S+p{RNO6sU-Xlj0gbp2+(@I-ineAf>#pOtybRUwMxK`Yaz`{=(FU zE_G@e8_rxVN%yMk6}czPi|BjBCH)t#H1Nu0Zptd#@YkKaLm<>woAk2VHirte={fgYT|#)aT%=jiKRltC)66);jWRo-C>(o2dw zyOVm5BF4Zp`=M>eRKZL5Ag_gK;iiZd7#HL3`O5O5JzTx7bLXD?V5p6RdKL>6Yrwd$ zB7MD)nB!?8*uSZK_-kAg4TH-B9=J@X6&p2VOoQs>nSp>cZ5CChFR~%wA;#MW0-a!7 zc%DGCE&9G_xrL~};{s?eD38A!7a6c|AwD%gxL?7hG)!RL(?G=r?FA)0ALNf}|7To~ zOV(&w0-muDxY}jf?I;*tkFj<3jk+lb6uAK!L_ZQ~+xR2%Jrunm9ih zjepR}+rrSGogr40_j_E_1klosd`xs8z*$R~w;ER?wdIh3%Xr;mnX&xf9y4rQM1~|E z7~PSl8M14vNTF8KZg(7k#znDliT=aCjSGANQtd^)U*m$2L}I|C@y#SksTgc6&<<>Q zO?9^0)8+glv}3ME;D{&(d8FMYrC_7k>26DHrT6mpS9ostZe&fxSZY$}F0Q-}IcZ~@ zuZ$YMu!Wy95?0Il@X@YS8u8ws>w_Le<0=7*?=9GpT@Nunc_etm`9EnvRz>Gjs$AhT zTWl09=I3}rwi=mN;1VDb9qdcgo7eTA2QOax@kWLWvB500p-T+EGk2PyH}1Cp&#sSu zn-m&0Icmp#C#%pniNqm8{GaW*#oAWS{)LDp;6vTW44o<$i~SqS6&EicaKR4-9L^@ICTz z>hg!<)brkDh!rlA5h7vvM4Ml^HolW-F{KqWOf~X{_=fY;N%ODmwk1vCXFIHavqENz zh(CW>l_bfY>_%Dp!m>KWEb%ahNSzpSYdd*X^v=0Pvf)v1s+jd7FMOLGjF$)$$aOUB z_I{)NA===ZY`1T=e+&odcCa$*M}u%f9y?yag9wbknZuEKyCRHX{hgeE&n#S` z7G*1YZ_MZwKAGtlVY$~;C5a8KV7I$Xkz5rbjL^!)Dt3}Io^8dYf8Bn2#?fJ_~5`mT~r`E@*C8pQqwZ$v)H>D z##v~@JFeWNqFbZ$))i;;O7E3i!$Aw3r>YZ}S`*dd3|{fZl_0m;eymfY>j}B7TD&Tx zdLKJS)lTt6zVUF7`?nqvxvP~{Wnfugx@`lo!utUNl%?Rn;m$*Gv8t`jUz?Z+N ziJ=fGJpQ*=Gb*e^GWfJFyf{&@p%O0(#?o+n2toS}^ma?uZe2qAbRe(h(4T6e;+)0h zwlFC%{0}t|pu)TUMgWbubX%4D<+kDkYGMjd6NO*wuU>Dr@)w?l6E=QXQ0Os152$^H zpnXK3IFdEg-xa<*^ZxKmZ0@;f|BOV94$t_(z>@=uuPRfk*~_VvrBUJwy?&-b z9+M_8+e$OpNCVXw-Tnf|SW%QA9IF#$UunRRqKr}z94Vw=M~bK)BIKgab`TuG!3H5n zE($wRL@9~y)!K&z(Up~Tk&f}ZiJzm9H@JmMeIV!$#Ny7!k9y-N*hcfCgGP2!u%71Y z$HqJXgj`IM+Yc$`cIb3FC#P|E7cNkv-jL2Z#-A+;1e837ORJL-aQ{-*Mx$BV>;APZ4T@jj!*?` z)c&_I!u#Jmn>>FwzAqzaiy(rw^)rIz_p2FgZ9*qjOaVMb77b-ei%VU(;Sp|-h;m6_ zK}epLcYn2+_!?kM&5xxydRG9(_{*tt%70KaqAslem!h$G&Q=tOYjs(UCWa^Gi)Z?# znR5X2w1RT9LFr6__600QigyP(Ds>X(AV(63n?I*|^=%Nz#~^nf2=`}io0&^+rjuFo z?BgQNN$An(Gr;~NI;(CM02wqoPtr^Fr_V1WPePK1z+rl>3pN?q{`G$9*^vyv)Zz3W zvnv#Yc@mthobl>M-am1FDWe^t9}=sNV7R}`rM#mtuXmU$xtI{{52iVgVCK@nawOWh zzi@wqeT(2Iv4~UU*j*I?%b?wV2{LFaOBTgF9VOq#dz2OzK$}r4$dUACnMwlFW}p1t zy}rvMr}5hq9ZSfx2_PDFKShV4_bA#wMTfQOAuA!ZSX&n@_>7`nkJrl;*&|$+Ig;dO z3FS!`M!v*R{VV|Y$I_w#EZ;nl6TTFH{dtNH_e2?+p!a~Y%TPh7jcAsQ=FOZY&&l=6V&Cs`yNR@XZ=vJP)n=_dQ9STjyaeC z0aR#t$Zf01tvp-n3Wd56@NK#f-ZsZt)kuSq?;IfcUQ$dWY~B*+GJcOA8X={-RZCaa zDMNNF?dz!5qn*v6qnA2yppWcJ=_15yC3O(7k%2WI|2)(tU>GU+EblIJT*dUFN2%dQ({EZ5ph&!NNv-l+^ENm zjDb}zIgsjPiR?8qF*a=5u93$X3SWq|a2kn!3+ninxGZELyl;%SH5 zgMXb5|Iw(){ztyO({_v&-;<8v!q&4!g_?^ex0c04EDzJau81hx zp#9hw-1u?Ub%WNJbSs68Fv1_z7_C&;MPC!RsD78ipT!Wq%y@RPLxu%fq}ZTsW!n_n zYbs%I?!^vEVr4+d(nvnvK^|OqRos`($NYQG3jwlAvvXBt+hxTxoQ5-ed0cYnQQ1}!S+|2# zVkz)Dd4qUndfw8#9{Mc~C%)t%*tUWSwiQIz;V@1+3YjtKOL0R75;wkD*IaHZA7$V^ zzwXh_*nSNK&4L=OxkE-u2<`gs8hH{&UIxtq@wITrdm?Qvh910U+D5*K($KUrulS+9 z2f%@^C&={#x;)9WR#i^G%xfd>!ImMZ!Mdi6xe*+cb@Do8YzsF@z>4E7v*m)xinH*S zR`WRYRkr(@Rc!bQC7F+nI-bMLdu+GcZ>tnl_07DaL$~SgS%0}lEFu)YOpUC5+D`uJ zy~oY9H1D$Sp?AD7MV5@-Wl|;jFEuj zzAkyHPaI>*IV(w%dXI+EJ*C4uh`Se`*q?suO_^Pc__1z&A;5~ zLvu=(F9tt)?_Fa51}i5Y<`eF8bgAmMp#@54b}8RkZ1HA^Za$GZXK#}r(8M8XK8Zw5qCYO8Mkt^~1-D*S{^TJPx&HO1p-aJM>B} z>q+|)gvD;Udl++pp&!?g@8Qg@>lksLv$de9OgqqKzU1cv=gq)g9g+`)V=rf%<#9aPnJ#%q6&2>{~Z4z})&V zBdd#m(SSC9HtZD@Xl#~%#Xy9+#N+hYTkISUMI+h5clA+s7d>INDbiFJLD&VBYTw&L zgi>U@?G5N~X>bS|!er+JP^$fRii`oeVu)QXCV7&?C7M{Sal1-?rP}3-6@I1K7x-pA zkv3*W6lm}Lg8bp{E)ath+1+E0b|}?ub-<$vOSS(E@+YXbk)C%z#>ZDFcbOtv=0G)N zD>#`0-fnq_@;6D=;c9Fg`MvJ(Wr}PH14@zMdEdQAjQUlOCh@x8cFU|Uf?VqAWr@*5H2~@`KqW?)uo5HW3Gr^QnGF2Zw+fXQ`7B9j zm;T&L{OM^ORR~_GA$h{O37)*vRrfPzhP>UDRHZUX(|%`>A@l$zexDflrgE3@mizSL z=We~jb+`TlC;mv&-Wuv#U8RFPDY%l&V_^hgvY$9{(&iwHC}W7I!@+XTQCYM%UXWHBY53ut~Zpt_(qQXWA}1+2 zPnx%?NezZ|=XvbU>=ygBV`$eVI;HElh`OUk+j=1D-RGj`8@pes6Nyn0|NcQy;;_*s zHfCM*_0efP=eUe)w|v6{*kaNlLCwr6dm+Tk@X&_EHZj2|7@r$KE6rghIH<^HkKiF4 zKBKops877wJbzyKr?7+%uwZ+{9_y$9K9Vwh-3gi2Q!GmRJGTZUNZtnkWA}ts6UoOb zm&R`S;-*`$G>8$tyB9Z8qPK0_uJK!%K3R3fZkl1?JC1gSgwKwMTpF6T>8eH|(|HD{ zqfMu;w7=;a{`hPqwpQ`wV>VMFB**m$=bYQ`tDDi8cb{3P3N=vr;%rIa>yfaOljQY<3lMs5cI`#!1bAV!E&h)f07BmRMvc(s z1B@>08owRH+;|y!e~8i8zSiwOwNlk2k3n;W5Cs2lip@u`(eL4nAbryt#m(%DQ$)>q zM9ph;w4Vya7#n3!-LF|ArWC1M&?cO^ReWv{_JOMk3VHo6^MafGKiMpK@BV?`0viaB zL!s1Ih-}Qj)f@94L|pwRQ9AQS#CBIMr$v@Ylj9og9h=H<_y8g?E*9DOmf+g$#LeHK z(+O_(ldU!jnPRH0f!GRzT}q_jN97cDGx*rHBBzdLG!(a!gmP|HzNM&b8N_X6~l z6Ub#5X8~P3uVbD>!>*q1e_uWQ_XOh}`jQqg8S53oQey>*kjqjsSQ%8AB<}hJ0czOQ z&nckF7s|uBLIvWD$Le0h zE&bhQ84uYk+hI0K8BP>sLTFr!aKko`hgh~P0T{tWuO9ANad@-Ny`CM`mLS63ul?ck zrc+W`!1^`(+>eCmCiDg2djFBUAd#qoZIj6 z-!=7YRMVd>)`rP3BvUBP*K?d`3C7Kde0oWsBw4ZG)fZ#q+!b~s%jk&tFrHYpb4mT? z6;XIA^BKYjOyE*v83gv(1eW?QlHc$PM;j5B=;mi)F~I@?3xR0l6^8?oa5ZCZcWn46 zB_X!s_H{>CZFcbp$+Cp&rp3rR;R z3-RQy+~}Y~wZXt%0}TaH@GK6oDOHl=hP}Uu>avxLWQnw5pU2^?SSmHAP~&MAcyk0M zmg$Du8!fjr^Dwry;pZA|`!KZ_9O3rR9AMUl+S+4uDR=poN#BOWO4UGI-3Y80rEW^k z_#a>>I^GEdarF#BJrCdbJBwX=2GnN^OF;;^`>zAwzu6+W|CAu?NO&&?zz1jm zpm{NVsH&d~J1!j&vtg(y4o*Ejl!GbztQ`UUdD(qCA% zs}N!vI^^HoV1vCE)-K-*T=1s*X0E4)@Q{%C-q8V}p25#=?84^{z&8t{YX1iw=2D2u^|6=qOh2l@`Nchw)1xQ$QG?EUbJBGIQh4 zel`xkB!~={1Yt_5yg!>Pw2@Z})sOs7Y?Ni`?ZiDPsr)a+P~$+r&{)7Vaygd6A8~qgpgV`PcO#Ek+5d;OE zak#WSq_rPwZm(u$ypLk>)!EE`CVf>aM&L3G=KV7amWsR-)Sw%rDAW|Jfvj|D0bi^F z%Yyj`oDhR7*m5Sa=9wA`N=<*pw&h{}NT(?^i@wTyJ@s}5Tbq?A6JH^vyurkPtdUw7 zz*!I{bj#Y?6byXcz|2I$s~)ATTe31>LbS+#diiiz%G7KE-2;u)CW1OUK+3e832e4M zTETRUF-mtLqVr&B`RW?!uy~_;<_4^LU<<5-#@EE%vCF4ojH79;+Dg6$2+bBslXhv> z$n7A~Kq!OWE{QuadjoPw3OC&L@S2!nT`e>xQ~SD!>~6 zd5hoiD)a_`T-4LRMU9W^YP%gY{`vVh1imSAgEb6X+|%2>@NsSMig;-6=B5U>yUFVI zLjP5l4^ExI)R9E5uTY(z_4CtZ$58!gpA`LPn5s;WNxV zFDh7M@cJ=_+KwLb?q8?Ee>G12!&E^cb$Q=VHT-+^p(Ln2toQ;|A5wwp!<85_eyI6y zP#!;gey-1s^Ly~GN}}&SbW_h`SErheE$n!XEzMWIS~`23&DLo-c;rC@87&PMx{N&IqFQjc}eB$>PDZM=j(9Z z8~7-!VV3}TrG;;IcQbkvr1p0IA2lT70jZ-bPEG?qQ4|)bfkxqZ-qp!08OqRggTnJ? z_2JFSN5N(FA*duG+^qm!X+rbj-ppS^K>^10g#x0NXeIV-i zlqG+?oBp$fq`BQ&)C~{Fl5?;uxeUmX-|x9*O7a_x^#(#?je#sVjO}X!*uGRTV`eb6 zFI0UfQx36xgP@Y-+@EMH!1f&gRL+5rvwk;X#TeFgQ{Gn@p48auBkRBnrTfbaH;ODCIThDyTB(%Zk#Scc|b?a4=hS(>$f@ndT6kIFg;6qbX>WL#mhrlZG? za`O2H{wf%FR*se8)i%b>JEhPget5GL^+g|9{gG;JB!S+(TDQ@XtDcPyiK|1Bc>6Fe z?*~8IUhLOurF%`+O%dc`Sow_953NHaQr*=(hf!qnmnOlBz@4`kr*;M8LZ2^bZ?bwr zxzM60BmA`eV3H-e1;b9%k3wwQeK$Z2$**n!E6^|X;UoV0c z*oz<^V;;4_P0CReIHq5MpW8O(D#W9}rX_qJnf27`xxxG)<&BPR9E^i8XuwrOW7NuW zus*5_F|l8w&0LyN|`xAGAT)M8hiw)jlYjJetwyPJ9KjpJYXG%9Jh40&Y zq2t#6qCyG%so2dYoJ{3}{U{)e|57WEbNOJs175$Cl>P!C2^=(>oJ3F!P5oKl%bhWy zC#7v2m0iG(<@kR4*SYbZ43xaQf2a@HvIW|wy zqRm9MLohd>&eWgvMXy(wu<%Ic<-YJ~zcuW&2d3-ozJQIt&y8)4%W9Il55-|fy|lwi zq~77rY7#bBH3{o4gpCCZVUu`?u(4?SgXSBsClptB&S~_M=3CJeYym0;o)deJ-MvKE z47eTXT}y?|qMR^<4S~}`sLSlHkOc({VKer>uL-DP0Nv$puL(`?nsE9lK1>8b;)5A| z#K>mzoKx7|AP^r|Z$aXNZCzR1(*K8x1u**-Kzw+I`3mduo`H!4xLCtQDJNS@R;p)A z4mIkh$8Q)HhjUbji{&+ajXzhuR(CTe)4dMb%#>E>-Z#>@I!~dJ5#$eCAI+u0UaZ-G zn^#F;)ixNc>kH}GuOT>SFMinmMN24%y(mIFyb?PVnf~R(2ovt7cB3j{y~ z%KBR&c@%ftOC?^HB3BI9Hpd-c@6BoHoblPdLe=H(7*yuKs317Gz?AK7_5ID`HmUk-#w zdavGs9%pRmL7{lO<-gbP+$(7zgLym?3xd^9yvEY-Y3R2=I4kp6uWy*jz@V~)u)R7; zPq$JvFxBz|J~ajw5{o#-YP?0rS9*%XnR|t5JnKrb?WwQQ)1joXi=bN_=Z|lD`UY~C zI#Hwgb1R|BFsSrAsn*%pS`PMw>uRxo@^6FU_J1;M-ezb2BaT%83>4Qo&+yL>Ej2XM z^y@_$5K7@6g{zg?v&Tv*R5wVToD{5xS%<}O8h0aIMZ1I4YBs#TGL2|jOY%tM9HP}g zm(LAs-gCWIfL2pj_q>%06~oMx<0nDy6L;0zFawOB7axcVmkNhqdog-;v(F(K<&!8d zTjPr3>`8sYP)j`6C&wO(kSgTwD-MSy#pde9kphT!x`e3mU{yuVv0l2ZlwjAk?6G0N9)Ff3Y`(8v|5UUrEVU zUOq5P|4d`q3*R+yOM)I4A0@B9_FSPUW=YL)SMFlF>!&WZ`=Fe($W~uYpg5j2$zOx2 z{59XT;qBO5ZOWC~Im4dJMn&1h-C~nzFDCp!`=NgEmv@2h!e6(0vaBx_>9==i)rPRg zs7h+9)~e@JN){uqn6=kGN@`ehy#J=yB=-GPH)Y=%h5-fmT+CJA#{vM(WT)i}P_^Ez zOAB<$ZXr;IV8dWro}e1cWD8}pK1U%84`!APs!{v*$;BmRzi&?_ zY_OvTF!oQLJ-dGo^;$WRH^6HrB0)7q?4hnE*P#MLEw0f%L3)^h0_T1P8hJNczB3oN ze9EWil2{|iIaDXhW9Wr57P5!sY(+fFSm`@7d*O?ixiz$q_XOe4>IwC?=)N@@-SsJI zyqh_wuggUlH6LEt+P0V#WfY22`oLK&MVjjlqFjt1%5^MElLp}?o{8^g^Lu^fFEyHN zV3>?i1f51&pwmc@6~?Q%a113ka7{dTBqIDHPrR+HR@THdLTY@gJd~wYR@Kz*?3Qv? zTOLQ_7!Q(mq>l`B>e&7$NwNrWd-qh&;F{WX{~=)^S!tRVtsVio)o-K3{r@paJb;W6!IN2Zu#Lo63$yrF8r&1Kp1q^JOoM0c z-|JVAE3$!l5naVOpCvpYLIHHEMF)@uw`*?=UlC7jE^67Np({<+A23sbh&2dT6*3=d z-L$Ae7SzV#%#*~$9JJ4Au6K~BoVWQh;cRN>cP@F2a(>kd;{;X?QJ7ZM7Xq-gC3N3wQcF5hbym}lXHr! z<5mlaFdAgPCD`QW=XS?w_oiwbjFsU5%j$v`hh zR*7M?P<}fBif%1N^NK|~iS1ItaZtn^Xg~}SaR#sFMRn0@i6jxq?%932SNrKH|3f$Q zhcHCVyNwLsb`S|-D?j{70L8#FrGZev0y(U}ZxSno!kaJEz$#J%L*r?Dc-m7pLZ0h| zAkcVyhvWm&-WGKE}lP!kXWwXp=H|Z1V_mS`rl5+fQ_f zj^mX)ca0DzX%d)EikIrg#3}0tsq6W!_#IwwmE-zfyg>VKI=k?+6Z>I#xGj|Mh~M}8 zo$#n^fD#^58v@gqu!P582AVCD@Mvo+oPpbt#ftVJK=ot6nx2eCEWfCSFTDvzUd9M_ zfpO*9j|mmOZxq+e7&EM~CyM<=;#InpxD}K(EtY3?*)HI2XsZVQ>m>M(-pjjxjDps` z>JR_WCgM5U=!AaEPho3?d-U_gW1~Dtl2rWEI@{%;`!~7r0LYbW73aF+!q%OezOk@( zgC{5SZqS0pz*ytrT^J;@y$KyI3J#w8!uo<>nJ4x#qy@bjPz{4_-LE=+cG3w#T9KUg zAf&~1sJoErxT5l;nd-p|`z+tHipzV&uJdQY3YW)3x+PnSmg{{G6@uye5wQg9yeTJ~ z(bn{Mr#x?m7&VM#zCC2$Jewe#AUHdheDOEB%86@sdLx zS|UK+ol^YyaJUQ20splioRgT=Vd_gbhx z?GQH;FkWg@QxImxCaLz0QG(i`t_lgU7YTK8Po#vvebWVY-{hH)29S3~>)$Vj8i-w` zcSy~$^0${mB3+kkK*X?@e3k4ayNVHdIdBnzm&1%-XIO~jI-R9t#K=^0qg$90XfZRy zUkDW_HXa6orO9C3o2GOKy{n>WZ=TXGEdv}8nF}I-lGz6+nW|(w9gg zDlx9!H4puF-YO8W6kBE%H1#ahfX-xx;rP~1}kqo!&iRSk)$Rhs%tqd`DM z_K!x*dwi~Eb8ZM}5e%CASGJsawm;(v<12pfnsooN%?|ilZlGQ{>4NDqI#jRB4!&1E zT(E@Tv+-<;^UN$5b1FD0qm`vUNw8}r{Q=K-+f6I)*4~4F*`sbj0Ory#2=sC*v?FHJ zS){!8!W)lzprlPwbAB@zjcNobp_?S6OZ17g;I7j}zGb&}yGHQnOCK(OUd^3P52{F* z(!EaVX;85(PzaV}P_Z|WuRQlPyMHg7!`O)&I5Q1%#YjpN`)3!Sb^zbBv1N_mJ*cu6svR&_* zdyw1x(71<0tlqVjkr+|2*=@x8o3Fuoj|E8y`~Z%T8j`vb0|6Jf#VzoYx{{zO(9SYS zczvUp!j|y3b#p4fc|MR%nUMRa+jI1?;s@d@WA|p zWezQaaAdk z&O$ zzzdu*vi82Jt6|2d*jsabejbL;<47YYxUYhP)B0TO*~c^;qO-L>j}~W&_1B>I zg`0Xv!{hskhX?7V;B5@olI)6Wk>8n4L9rrq7UcY5h%CdIyjY*!pQKBKa5w$-6`&h{$7}fgO=no#}p|bTO!6lPcH?5a^FBD-mM_7&{XEyA*E`9u^elGiSAl<22 zyvXUJB*Y~tpiF(f&WM~ke?cQ-k5b%%e#cTyLptD7*0(Q#wAGX{_FpOJE52SGMhloj zWOA>?i+(6=s-YL&+xL#dK>{HaegKv?aO7*D-OuIcpCBDgFb!PbT z7lmY{G=BPmFx+Js{mJ9_{58)94t9=+Yq6W-ucV4M%99igdTwl_<61~EP*#1Ns5*0v zGuqhFHK+eX!3iJKP_&D+&%N!#ug18|Ixg8`yWJJn0ZrU2^+|Q z5Wxy#1Z7Q~xy&$_-oix-TX20dYJetwz1$**GcEXWk~~5-yw4(J}S{}kywRlosAH}=ClGxVp;Jn9y%!9Sws6f%^ zyAy?P_pt3Pnkut%)%Ph6zn!Alv~W()w14|3H3k9jApV4lgx;**>mV=kB7%HPW92zO zz-v$qTpQ&qUJ8l7)-6f;t|Zt3>m%!};~DGHYy660tS`DB?q@+cGu{_TclE@aR+M8L zlBqGXfCr|M33=rh0h5o%fQ!V5*7_-mcN;g;he_bvL<#t!V^Gj);qttZ36tkYXuTxsG!_E-jM#k71k|b7qu?86B%GdEnfJbK$y!hP>-gch`jHpq%#BWr#%=-CB1T%>CsD@vLXM>#@vAIvTuAjoSE}KX;R>iPR zqjLH`sy?IGM${f?jucU$(XGcu%R=7@qL{oUOzF?n8~IULCSeN^B{yc=YP-?l2CmBm zhMu&YA0hkGM_ULv#XdvjZMU0HpL(zey&0wbc2n;uc6EP8NeH%qD>;Rx{alotvS-dw zo|yAf_d7<>F(z}xU3$;({1{$@YKT1L@xM}TvR)U2P8(q~?b2Z%h`xCRH{?R;G2GcR z+pMeX{tu>=&xJFP9*KC8ie^ey`dxoT*Llm9aRyU4K+NaH0yQox71Cm8zgVF-TJ7M< zYadF_BoNcz>dM88&htPQgzG)FY+Su5KIR$5>^II7EdfZexl9V=H(KfVqL?=bYX`5D ztRCm6RJrZ=@imP#G`gH#ge%|o501gG?Jn;$1~f!=#a!HU+u$l}U-&Bxj_m(BKmL=I zlb81o?{~ZHLn)}+>^mywLi8&_N^_iamLA<}>jA9Ptt&ZNCNHMgc(JF-OscSY-~zlI zHWx60=V!!PJ|3C9f^?gw$Jb&!zaAD6`cdh^{Mw}b`3s=RKcK8>K0s%?j z)cI7Ucutz61FMz(zC3Vd>6_dExT--{0SXuLnhohj*7)|61)q1&4VDFVgXI`?Ci?3J zt3S`z`G4GC3zp~J{^OS7U@NNlcZD=*F@0p#l0pM4I$_YFvu=L5=%lq@MnfziUR5Bd z7-{u-4-`@uj$#a|7$GE%RPh;keKoy80rgo}g;6v05MiG)W7IjHfyTzshsRX3TC=<5 zH`F?^f>Kd1FMXVM^-}+6d53bUe^W?5K`rl_o-qWwH#HLiicQseo`~DNM1F+d&|p=Y zqf0kqmVi%5d?lYDx!|%G(S8J{_f5^0jyE_bmetQL+ldr_LK=LjkQV$>NPUCA3D%t) zC>}ps-f<%U&l@Dnei<|Rd!lD7%zw5M9ak32yp@08YaCmtl0V|5Fp4|Z;i1K5M3HcU3IUb_L7I#~yX+G& z&+ruYgAOOcxc&z|WFLCHy}~KyT`AF?xCK&P>pLF=DKcIMV9>lC{2hKTHvu;|>)JM# zL;Bs>Xch_XGr#5tZ1X`@!PSpxYEyZwND@U=Lm6!I*EDtFA}21e-I1&q;Du_H+_pj} zK%nfLb~j{>3J~txkQNy~oj=OLfp8Y~pyXAI28bQ>AWY=i;|0p}_pe)xeUP}qm7$99rw{#;dB_bgW z0s_*~9nu}rNQ+7-AzdORT_P=A(jm>cpBHqy{hV|5`S%(3_>Qw@&AQk6t?TMl&&HmT zyPn~E>10Xy`rRuBxV~y9dlEEaA?}95XYF>KB(0W&*7*RIJb`h{aI3zHS+`(z=| zw=NyC3r)>1pTXn1o0R^oOx*cT3C{mDsLF(2V}+nKTgU`gN1ddVv7|gdVe}GC3y(75 zaa&EVKVEnr?Nq9zR&w{Pz2u$FukTL|A}ym`oW-6|@W$u|$WPJjgIcPY&IDcT{v%Ka$?hX^QZg^3z+CyhV8ivmiE- z&ri75I5Cr@K8XbF7fIHV2JNUl5JXbCt=68(`$mZwNo{ObdMtTurf$nFez~>ak>Cx> z1?>;qcSl*}0R7^_KlF>n^hGqxn{>0!J`t$D*H^TTmt590{f&N+?(C8{Pd1vNPl|hS zAW}V^n+hF>6t=JxH$M%KKe=y^{7R~^&tX^Ejp1jT!TPh!a3F-W8JN(42o7^Qa?B4Z zp~`Jf&}NJ`JCh#VAU@KMF}%yV!(#mFrIL)ZrVrW-ELfX?q!q`6XbvCztIZ%qdK!pn zJQ~EF6s|qGSiu+!uG#P3FiJLT`=0#AeTXIuexYYiDE55>K(0aokrL~lO`e7)-@P31o|0lPw!jJ%u@BL4 z;d*x~ZG>==vE=Y;nIUc@sM{d5LCwp4(6Y&9Db-z1NcIhB;!=aTD)CHNNj*kTmr{ku zu#9|NhE90{W3}gg$U0^ZEpxrNHnv@ep6wzoa%^Jl<(-F^_0A&Hry9DNUJBF*^saMr zftRG|Zq#cVbz=pf$<-dE@ijWMqYAxnI(szU88-od_^#WXX zD+1A0BMqL@6ali;OKyQ3JR;$VxfMNb zn)M3a-=eN1CHxViG!eBz#BigVvS2$N?Og(4a6FF=wfocxcU+`0y@$ycru>IOQ3Y!A zPapD3e(Bkbb-xuU^K{F~Z0jnrtN<9Nnv~dti-$M%^0YkaW93SVD!-LP(()#y|#$NK!4f(3h~ID==3 zTLBKqf$Z(ZuO@3a4A#@O)Z)6%<+Ib-9b;yy@q9pc4J+_hVW3;icwNB>oth3fZSiXb z{ZV1}YVhhKMt36N&GuA+lLe7zkC|sI3a*({$Za}Kab}3?NUdg|5UWyP4D0WyCcMHO z@(++&@44on6R(_OAM!lS;;LJWB|&hTzWURt?7&*Jh0mYF#9mX`ND47N(R#|cY+YCp zL}(;dl3xE2)B5pI->cE*`1L7%_>)0*J|jHgw`!KLx*Ve$oP_Rld%OXE@#;F#slzAy z#a><^IMsWVK6kKNuYN;#Qcc+<48P)tfd3>jdTk0_wt>QzYdXYP2q7dnd-&A`2s) zj`}O}U;4xcAK-ZmEM~XI5U|Lv=J-#bka$}nUne@Hw|Jc$lcc%(Bg3Zd&@*F3Fz{<5;ENawcS`nwYDa6N?SV=wbLwn}m-1y|u#qa16s*~X< zItd3i?s$+#r@<@SPWToXsUe0DCCfI<4&R}=f83&=b?o8w*DmBg21fs!m&%0q3!kI& zY&X7c$EXOv=B1Va2qtBk-|7SF!Ue*OqS)Qi#NpqJghp}i?XMo#tDHRiN!ncX*cf%G ztz}%Zv|rxkdmv36uDu%ellAXl>ac%|C`?jMF?mpg19mbbWjgkx(5T~__3z#4y;k3G z|G5dxdikUU5${w0W!zl*_XEM}YqUAlNUw<)=CFu|(iiU1%^%(}>KX#WQi6H5B2z%x z9Lavs84e)Q+Z;v7v`OkiV4aG7t5m z>F(wMHza_xnKDlTNSpGieMmXyq|MUohc;cC+WL$W>29XtiGvpeE@436GMwi|yYc}> z;IanfS_$L;|`8kY`Se!o2jU}$>H+-6N#;4LZoq5e zSIYICjR~)>S}im!HERwqficaq!XjM0!pbTUL?k&dotX$AW=U#IIo!dTMy4l5+~<~Z z{N`U5M9OeRJCA)d1-5P*J^;*he1<|wl(xs-ARB6nB*^`kBiFIsAMZI<*uGvAU~FC{ zhH<&N@$WK}d~dhrSH(_HS`}P~!5+AIJ@ssl2O&Xb0o^IHvT=XJfO=*HHMlrHw&sW- z!z`p{cHI*OBg%}or;MYfc1SQ`t%Wc9j+V^`X%X$a#zcBE2k+68F z9$^sG_G-%i0F_kdMqSl(m9_khlv#ODIOn#765g$iFRdv%}b}Kh1_Ple+=)A%h#NE(k;z4 z!Mb4<;=fupP7OGI9~23NiOE&Ob;TVF^ps+(bzV-r z8|Sv7z(J;+4j0(4)5&Uy+PW_LLYL9wdsbM@bzSQrYU^i};U2Ty?r*`s^x$E2ip%iy z`M`7qHZUcD8AGs+GMKq_U&9X3njobr$s3q={$4wHO=!8 z5WV?#R*bdnaDAHJ4MaV|Gw*B8iVO~j(3-_`i|;Pz<9}$~jSsU-gauO=5y|pK>?NapNE4n^8)ju^l$OH5BVTbInabcfBEXx#S8w~_ z&0)v7w80ZiG zMubpW*W~^h0;!JCLS5K$_YWBUo3|DQ`dj7S8h$e~Hz{z*=~A%ke51rASGWzwecR)t ze9teq<&L8JLoIgm> z{JIEv@0|0e;*$e7e|E+ToX28DPnTLtuir`#{L1-YJSEapK0C|Jd@A{hBg%W?>~~>U zLY;O(o7gj7MO9=t49zEomF`S<*Eg{VWjzlPb&@g8<)t0(b`zRUVDsorb0F|eQnoLs zeK7Tm=1PgkvtruO<`=B@5#B1OseT#Nvl+2U4WpN@Z$+pJo3ktP`G6gFXuXy%O~9+= zvJxt8xqVGz3Mwgr5dXUaIZ*G!c)a*CUWA4p#R-F+l)}f2Tj=4~mrd#sGfl?D2%md- zCUqxGMzTbZV;FskN;LLi!B#hqeEEC|;|ju~0qjm1Lgf5^VU&hJNr(FbfRtBDr z2oGJgi`BYw7f~yHp0HAqtWN_wAm9gzSk}p_q4rf}*(X^U435aJ@Y4f6)X*2N&OE2c z*pr?6f`Y_YlcC7ezkh>RRl7GqFha!rKz>PdCD7jlYF2JA=);JGF7{_a23J*_uWTIj zH%3bzKcLb(XipOT-r@*OFs>xQD;!NmN^yUqm89Go5F-@(h@a~eOdaVcN--6{EK$+w z&3JXHdT!?{vh?$P%5Dn|=guD0T9!|-b?d?Fo2q9hIDJ}}dV9I@LsaUviHv%YcjHx+ zP@cKOC8;U}c&=RcR-t*0aSauY@cPH3oh}29y$cU3IISg&q;G+?fX_lsm(R|2&*@vXuH; zUL6j8?R5O?_K0-`hLJGHt1F2q?oi|Sy_NNM4sRL%)|)FvkPX9Xq~Ghl4U~z|*!fn8 zQYo($RAC`KUj=D3zC6^fsB$DPYn1qmRz zYB`9VjaKI(E$6_tG5Y6u^&Hws3|Q<8^Iv&&e(11;3ua85DYlixQ|>A|9UPv9Wbuc4p8O3r*F;Bw5eWvSZw7c^?FZOKCis`b?pQWfxFX{62+P& z$V;RiT%ZLV#Z?49ZxUbnnzPH0+xZD&J8J3O6r?30V8eKPv?y094I}=!(TBHUk!*g$ zVV=T)oykrEnaDZuuNy}EqAknVQm+GR4z&Gsw<6E7jc(ieTD1C(r8&*N=ut!7vACK7a=*a@r>(s8`XjV zANqszV?LhH1u5>)GWYSuYu{s)vZ2jLy6(eCb2%Ho>9v@5!-IM86D>lz(zkVq`ck27 z?9Lo5jskU7lda4~XM6GFL2QY(A;|Cvu6W9vD6UL@)Gt>C=Fqm(Jp42FYV7p?2GA(~!Sn-Zpy zoiN`>HX+ZA$jgr3aF+#p06vWjmAsnrhMh>8-F8jLgLf zM$LKoTc5Y_1%O=nQ~KJTBmVizB@|bG!KC%gR=f6jr$Nx)K~PA}yDJAJJ>-;h1}&GL zN#7r$21H>v=3)`akFmx*{;p+kE1{ow!GLVu8-KF|Xs5UizNAop--@> ze08O%$0Q0;9sYc|9DuOcI{Od^i#@B92P0HOZNIEclYdl)Y34E)FP9<)_^T1ZcC0fD zN=86+xDBZe<>0a9f$A`HVOf6_dbx~}>8t)*bttcHAeZ)rDCtDy0R#Ohk~9p_C84HE zm-0UQ6A+bw70e^{<%f76>4CAB1WS4_BKyA~J2ANz&R@VUv&jF#MT9{pl`1s}i#z0I zT-b_*ttMYg$dA&G&(bxR%t~y_vh3A_SoyE=%Im^?oJ8FVL)PZ76Miz*eOkQl5$x zIP$sB;!E^=ScytwyTC|RsPqZRFx}V~mU8{GuP3DfY4-GvfmlO@D%Pqzm#q@?K9xm< z>`>q{M{T0CdCuCh6=P1mT8ltu_riidqKrZ>c^#U{7_5j_fX$P*5J_ww`svb&m?|Oj2Fsf!by5 zI<0Esrn-Cd0d=QD!jt`@1H|egv{ox;IFEeqqzQDrewb9*NC!e5RN8sdfqCHl(xD$o zy~c{#k{Z+2f9+rjYPhxyUYSmWx`SgVunT{oDJq5c+XtG_2iap%4l zU!<*hxF6y8J{nex&&Mhmj8u<9!pr);&;C|SIR0bo^v`unMHrcT=FXSJ~jKDw+<+k-5Q?SU=X9v!LkN{sh~7$K}M&IOG_?!a9bqH*lO zXdH%*bim>L)*>?{NVos+fzdb;aWk0!j)ytZPojVaoVi#)sgLM*9_r-Fi~@IgI=n4p zxV-&n^naz>qhYBJ=g4y$j|sr>TnQX|j`T#!y9Q=v{@BSxFU*dsuE4IP9$4>l))uG! zcMeA)LbmFVImI>lbtHd5XKhnD+R``6ma@tYdCJ7NT3H+lShf5vjIQ(s(54Xi#sFGzdBgEkG0Q8xNO)DGz6)U|&FQ zp-{OIX6tp1;Lxa)#Dl0^laWk_1>HeuErbK)bqIFC_FS(K*w$*>mtIw5;bhiGnurbd z^cM-%cu7c6&{}SzsEgo6@9K3?j(kW09fw*Ab$EFLr5c|!i?jRc#w-qL8zrP}m-lzn zscfX=mQ2_cq6meZ!tsGqIQEY#v-+-m0S;L>FK6{)gNv-f@9x(}kxZmvpNRcfeLmQ| zSOmKA{#nG%P`K*6VUNE7xem#K(k9#WUwS8_+)oYz_yYp*&=7GEHIlv|MD9u4FnY($j&;#e3r$0C;5fKcI|h>{#No zYcdHa3i(R4crH&>g5;@jFS87fuII^!d@e#Y7N#g`@-CKd7}>jS1(oQXHcsz-?V`^60Vn2T;aXYUdnL&wi;1mDJbNcD(t&x0cpUiG@tzb5ee_mZ zBGR~5nG6GXh-b=S^jf`I^LiX@+cp~Te&L%vUF(LrxpLt>)9Nn{wrbH-uP8E~jpw{e zeJM#CWNCTZ(A8Y(1-u3ESDmGL3k`a*@6aKv=e8Fkff;hdcd8`lokaE(^u@)!w@vc?XJpP8*Gb^Jq@s4 zTcO9ZgbKCRSd-A<+@s=kC9eI;A~AOw+{9{OZuhoj=nHgNyA|p%O9;EHWgi(}tc4xQ z2-hke3(8`!f9r8NdC_%*`%>g~Kl3KK_5NHAhGk#Qv3}nHuDeLbi2>u`+C1K^Nv-1| zS>BqoXA1{!uXH|JfBE=ilb!O6dE}W;r`5XL9W^wJjf3LmXe0g@qj#>XI{}Zw!4ERN zyg(z_AZdUP<;WCs1?_wcVVtj`5C;SNm$OE=!EDySdi(WPN!-aAxnJEB+#f<~cJ)=Z z;y84FEdDV??`rhRGM2!%;#l3z4nonFDt@>o-0Q)Q0pLMLgO#gOEV{JY(jzsL`4IzA zR6AZKP2W?gic{V1^G4aPll5HY)%V}6Hx{|c?s_6zs5K}U?weneMAic{}x5KYi2S#UZ{f5F&{d-2wyoj8H&dm;ypVrj2txtVofnNJ zsQHlWRoL!yWkgy&f==sV451kZY>)f%wC-Gh=C{Lx9(T&E&y~DwG)ZHW zGY)zJQ`d45>^1%Q4PZ!h8V|B%IX9%@LWa~zHDEw9 ztDb*4a$!I_U*m!-nXV^fTwWfL=>Tiom(5^}n^*$YxWNU1{4kNyzffR6q{RN9&*qAA z36XJBDBUthoWA!uIfwoXezP!Z-OzL$eC^lg$ke@9PR=MRE@8;{%IfAiwTo_GT{B;P z(6-5nefCJB9(&gY6^rWkX*Sy}_Iyj552nT-Nj9rh*G=e2ps$$bN~a`=W;vFWuI0qI zpHmy`FU{^D5Q%`++kGhV^n<4j96>6*9Oo(RS8%Gja$9E=8+m{C3v?F3uh^WTAO?{ zt9>;g?Xp1;!2F)Ge*`Hi$Ru&co-1-dUs_`$NoJ?RX1$>vq)p<679}2p0b7@4(r<7` z(46IqK>NJJVFUNBwr%(=D0OXSrE;w^}Kt2wd&4yG%p}05e2dp=-`u z-x3FqLynL~xhz%kJGIL-Epoi%%<4;m6lGA?@%%pcdo89Qm+CiMhgsa0v-(lNB37ZQ zjtM6`8+_ZSw?q){_1133p*f~#&hCy1G(Q{-88`HcT;Du^Z|=t9x`VznFYYIThAzr| z;-foukA>=te5pn}W;p8^KS~LJ0_r*0ZEPQ4>YVLkjNS}l_**UD{7<1$o*AIV8!N*i_ ztzUQvrowDUATPl>?ASgh@QcaY3%iLHwQJ<#^3q=AVE2Lvrkd~8pKA4MwKBg}R7&Uo zd+Niga-(q3Qa}aeY>oTrN)8#AS;ee0olMWntU8ARDwO^44zXpKgvOm7g}-0fD#G0B z0MBtg?!0gzf^p~XvSgeKJO>*z?yLjhbEi)&CQvEh;tj_=A9q$dRWPA|%bR2?0!Wq& zQ318D5M;dmMFsq&H!-`AB_n`R@ajTu!m)m#H-T|{O#c5M!m3cB-z1}D9)Q;k^J4e5*R?s;6Tw*7hzh|Kqg=h)?tR<{0Jv!%fj{HfI zFVzPHagxfNP~jJ9*J)Ch2YNpex*0C6fKtHR&%_jMeBexhtn%5t7fZdk5~mmSGa_49 z-=M??rq=a#+0u8!}Tguy+1i%Z^Db{YnQRgZpFm-Gm^F* ze#aFwMjw@2FOjqG>eB{v4uA%|g{NS%i3>x67PrCV<|06RaD>x_1PKyD-UhElpg}O7 zTX^eIOg{yQ0ygKzwiP`q8v5z(%QgDLEfPGbPl@tlz66T9W9ch0mIWZait|r4$3@du z%nJ7`A-iGddzbF>;HWfGtDS687QDaRg9avk>87Jd)Gr_4UESY1Mg?KrzQN$J?eu9$ zY(0Z73tZARoKf1KLVUo0hrqIa9az>GUnWlz^FWsMImohpg}GP=`BYet)g5{NTlkIH zZTe(yQ)+>EtK!PJ8_I_sj^bMB)%@*)qNMcR3wGM9X4S>4qpb?+n=JY9Cqf37X+Def zEfGI2LaNlyd6`^@Bd@Z5-0y&M@43%k>%)JFjs6ek3(P#Z(Z{=07m@Ss-P(osWSXr0_oyL{Sy$k@^ENQJjnF$=oo;mFMXNyvs4_pGV zb2=1;#V-Eg>w5gLF5Iig$nr*?tZ_H>6kG*k0XNtNPc{Xdw~cl3{wTf_Tp<{kP`0v< zzN^7HUJyBF_6Wue21Cy%|HqLqGr_`7GXXen%fI}n)WjG%Z^Og! zH(fp8y!;67#>u;zjGwytBb4U4eGW6gd7E3!tMl`=Vu~4daRPtAH$RrOehxhqehoc^ zJa;AZiGN@N>tcwbn#KK>Nv=ywl=cV7dp;npLCL$@M$`B_W6?0?V(2+{z)Lyy&(PDl z5_8;o1o7oRL(i*uO?+uuGJSclxW>iMlWm4U)M)*dcK^lDGYlGf#$60ONwMG4GpqF9 z0A7MFH$0O}M#dIp1NpS~L`kQ=4?PRs)vNIi#ax6ElY z4S7qq=gIoO`B_(UQr^=SWLC5DIvP7~-``~S%kE1~G9DI-rlO*_%Na>;$F;7P9q_uD zOmes|erh-Y@ebdo(A~@%{d8`Z3dlnCJq|>jxBRI+_DN2m`!=f1Dh%@taNp)qeL{TT z!%p^?I_nMe1<@kHQ{i+&_|y||M2s&`f_P*a3mSZ4O=Ed}cXJ{fBga~Tn}xeJL5>wa zW--hgQ0mIk3;&G9Tj(RvXVim}c#djso{b~AY`b|+w1|u;n*NH<@HR>ID1cM`3ElJ*zCo0epY)X*!tZUWBDxq4q z;AX4Ge=QXMF&FwL=L=K{iSsKqe&~u#*HIC=V!OW{#H4>TVU{Saa&i*2T}~h!>t?ya z1b;J-ERe!KxzS&NYCZ{|M8ogk%rVDrt2!Mi7cl1@DM)V5FdGzg!ujyj!d?~M;XjWj z&CG=h`~r69z`>K8@}E+{tjeMnR%JZMN04(Ew$RvhVO3sZ_@VU6syxMJtR=yiMPSiN zFmIEx@u;A`PePUPutK6LtZ1Eb@5Z)GC@>rmxYg_m!h8gdZ_l|s1n)qwOWftrJj`%Z2tZ$7O&GGbwtHRgaLyZ_y3_wYiO8tyScgqCaUqoG>k8v* zO3ds;|9i%^exKxI<+)Y``2D^Sv)58v^dGWD^ExLm*e)bKvoLvr0&2tw!U2^Wq)G3shIKc>e(Ica+;;z3eXBAd9|jYSpfI;&jsRL(T}-gu#6 zlR>eJCFkI3v(^0-VxA(eIOQQektv$Sy3oZ=U0U^^A@yg(Fvi#2TOY4x*e(O;zUejV zc9AxluPBreyZEZsi<}<{CuEa$;Ie&adh6z}4%$coj8EVg4nhJpRt2wZAbZo?nQ#j~ z7J(RFCd(Oo$6gR%{Gbux0O5RPN>$lH3L9&-k(P5L2+O}qwd%1n%((lsAg-B}sWE1k z>(zIUX&ijZ&47-hqy~=A8~&|3titM#RfdBUVg^5Bxoqx{3pQ9p%l9brlGhDdi%x!k49>0fs<&A3SWg^V z)4Y*TOjwc=D+}E-Ivjo(*jIp!K&zlI_=wqMd)pFLEQafnpb>-_R4h(53mJbEi%BSD zF>yxzZz>=}_whdrDXaoiKq8ZAu>Qy$!+PP;1z_X^{!+d(^>##n?o&mco3!BkF<8_8 z8UCR9{)N26KJ-9SGV+S z@Bu2|V94X`Jx6UAcUUtYw-?)lA%AOS!j%gu76PT`>yJ)o0zus;G_SCo&H0*?kbPuP z@hf!m%0&?Nj}EP~Vm`zdz{uCrU3b=%);Fs#9Z^qiH*`I% znOB02UO7bAIn>-XyPP`V~|v&)8V^UV83Jf>WV?wwzNbCUANy&1Dk_9uGxv($8Y<<@Z_^}NxoM>4Z zWH2Y%HDL)IB`oRe|e2hB?{(%!dEL{5r(0zY>vzGww~qU_u4rS4!^Z@vF|STMeEp{l*+g zc@(5^&WWr#A$Q2mtwuTBTRZ-mXMp}k{1X>CzhUZK%zCRBjmE(ebD{2^Yj{^A6z=0^ z`$~B;p9o;r@SWIAJ*ndOZ&`^~?!5F%kt`%I893jIz7-f6$U%`4&HLz-VfWIMT-iZX zg)465xq=OG9A~9zZ};G6X`DdVSJjSoj-Zs>r#rh}tO5OR==-MH>J8)|jIE#azdXv_ z@-Y$BRX$r=+qn1wNVmHEht)`sr~~gYuo|7ooLh}jF<@4slP9Naq))vL&%wel{NLS1 zlh6Jzs}Z~I!;TwwaNk4wjIG|fu&*y%NbF&Sft?YiDPhj^{kazv{L^X#?L|%h*o(US z+KZY(d(jx^8vYxH&UQhRRdG8icBt={YjTC>*YGT$i|7OUj4Yg^QOB3^Fd%tB25)4G z{r4jPB-i*2NZtYil54^C8HSmGQ~*f6=GFi68h++$#8md-Tg4ZBj&E4w%5}-UhI3!n zBHC?cWr-M7kcg`K#9A0OH(=MIzB|Rw+ps}(-yyk=^Z6F%I#)`*OIM0HZsND#ov+#J zm-09)UH~|G1n%_W9hprl72O)n`WzG0xV93(0+ga`Y}J!=4o$k0f;73V&l}}mTR*%l zro6nQt35DX3a3P0?GScX2{V|pk1GW*z}U1_=1RjM2H38meN)n@m5hY6+gF&YU=C!; z-FCZ1X9;LlB?4<-n9WiTJ4S_;MPNYXLGBP7pmT!qfU@@F79ms~So2_CKzWEZf!x#1E0C7bjf6S*stK0Ct-5)&0X+7FL#`IuiUuFGq#Uebox4u7VQw@|xVg2?wf*jEzuF5O2s%7|0z#ZU=g?s}g* zT{&TImyhHFVYs$xmdOoBw>mjAxc%ag5v)bkr?~TY!@yb;)?XX}+tDhp9Ss!;s#-F` z=9-TMCo>l-DkUe^*&u7PH0cjzoo(Uw*~e^;1vK8wWz0>nJqTaGwH>lZe*)P~;z5p+ zr2FZ8Gwagu;6VxkicloFy7db?+O-ZM#Nf6hOBkR$ur?9wMN#hy!9xv3Ec6;dh8hfu z9;6=i97YMK!4S{WkxCUkSk!qn_QGYt0%k|kL(B|H80gu~0%C*C3PaJ*xbEAHq8-WC z!bD`k?_(CHB`w|qVgr1b*dP-4R(mvo*g%2!AF%q&F6$k0Alxm;XkwmgY&o5|l z%upS<$E#aKo{;?J8%|^*9zlWkhC!eJ(xE7uV7!E~DVC zsZ7D8aybnT!;wliaTjj+W_;}z9id}GO4JJD{mRrDal39MX>J5twJUYxBKeBB9XY&q z*Bu8{$3xRSww8w$-Uqkes^ovk@|bqaNr=X1(C{Sd&l7f+i!qKU6d5Bk?8+}m zB$f(W;&Z6U2XeNn*5I-j`OC<;F6BW4;*{H(3AUiiP^K-#q89|jjVd(KdwnW}6E?ZG z5N@;I+sS006jE#UF|778gmxWfpMd8e7I+SBS*=GJ!jvcZKzY&*DNnFsttDe&ngbYH z6dlqWxDRDosJr~UBr|Ue6$tGh~D(oNojxZ~!i(gj_HtvLWz?*5`#x2)zA8klzxmH~} zs{1bH0NoetUA;@*Z5Yj;ybBrjcxZ$#j(?xG1Hr4KPHAo68q!1F$*F$-GdOdX(6GPO zlK+_cWZ@DNM15v!W2k42>Nv9c=%1h#U9r>`BotHt_ey5W>#%wkC6VOl6MB3^wQ^sl z(rEk|16c>Vx|SSnTTAAIaR=A0hsq|%S1^Hm#YtSv!2#EKCFzFg-;+FTei(TiK1CCT z^Hf}etVwr->&GXLgv9v5ezPV?KToIYPZylAF56sGroear2~tk(XXiv6UQd?}P~i^E zl7CElPA_*&1yhYiO-TpFt)J4QFsIrJ`#V%eHWLL&-u{m?>AZ|&W~%5{LeeCKZKCTM znyZjxF%*(4x{rgnNHbAq-9;R{78VD82lgZVu5W+Bc`oAMEwnIiv*v}j`4NmlDtHL6 z8x;%V&0wl=gS4gTb-S$TqIu6RYZCA_|1L-|Uy|>^7Kic`=5JnT+PFT<eLC&=5LLCFM<~ng{B%6zF(=%z0Cxraq;*Z`W}P|GqioG zF5p`2wd`#AuR6kbxe3$}=6BzEc;h0YEMQX&s$pZ9OfzmJ^KXt)Fdp&K4Hou`hYI`8 zhYB)L5JQRMq@Ug+Kw{=#oXB|S+44YVt^$FgXVCilddOpk*Q?m_J`U&#>5PQFqhCLd zmb)>b%J$Q|6&1bS84)X%n&Y~7c>>P*>2Bq`Qi_Ipr6>!!n@(Yv2T8XVTYD@rQQN>~ zyI;nb-~#=luk6_-FSfG36k?X|q+_S92OSzr)^rY6d-4HE;xoD8IdIgJX zU*^VhLRc-iEw(u^ShY<>DqQ$@tvZyp;0S(EDahh%L$H&L{QNoD=kzIevAcJ} z7|O4pt;k@ZT!GRSI8isQT!CgBQK27p0wSPTc%iHm1*V}L&zmzY+BW)#sEB<`+AD3A zso}HatZ$m{FcNqdr*D@mF$D>U z_NY)oBq;Q*$miM>MQmrqi1iGzXpb+l^`Z&dyh{jP=q;Gl^88;=H@1ldPj*OOG^PI4 zw#NM*^PPA8XhGV#z&Nz_2kkr(G!DgJai!_OU1WT1DUMZFrkyA%?{*SZtQI`SXpIRM za_r3jxmlSGv*MXSD$4`7S%p}Rx@~r=h|V;VJ%$rgJt$$i_dNsHD+ZP3iRB0Xx-T%M z7Xvc&C4M->vE!N((Y%>ff(}%W?u1@3q+;L|v%1W&#zhY?%+s1|%4?DxlwICJdK5o3 z-$tnwmM<4trJ*aNHs9wjUNJI|9;GmT;VEF44=t`}HRB92F%8cYjKHJ^Ki8^O_-|Sc z{#mOAfU<$LO%zj8z7`%lOhF(HU6E9B=s;`Lv!B)jP6%EsvQzkb*|=D%g0hhZ+7Hbf z42dR9*2g$2NK0-sLMJBm1?LG1o8TWa&@j}(mWbh8k7B#MRYk@hl<@4Mbx$9NW!+k& zg7heglpn4*Yna}S`=1OH!C=DJ!cp90(LP-ck*APJIe_P*oblq3BWM)acIRSBtq|9Ptjgq+;!`lvA5@y zUeHD*ChqsXDyU<%8!rHhc650be#GSbuB`O~h;a(_rKh19hJu5% zS-#x+9X-H|G1*d{+ip$ADzDsE4+na}nU!eJFVgQpRg^N$#rFyhsx zYMxzB+j)F!#XtIMm3-F@5C^rWAy-TAnO_DNB@K0B5p~MaehI5llYyCVw5hH-wjw=q} zJ;M$Z2t`dv64enBj!~qLcS!(sYL1u<*&WHZRWxtT?o2JXltx930K0`#CG5t&p#In? zpGWIPq{RjXY5T*Pt4Oa}GL2 z_C#8{iiDcNWFD(#@p1D|R79Ic8dOzucvld-LRz-{$#%u)JpruvaLME3M^O3Sni1~* zl=kG|`2#fik97$qYct-*Cc6?bN>+=+6H=zh=Fc5IE2n5V5q>=HW(@p1q??(S(*4JG!E1V2QEkd4vmwF zfzbHs@|`uVU!igBwJIny4u&HjG_FTs7k?2NXZ~>|b#6p!d9gqoylM*1Up2L37q1%L z^H+_7vW|7ySF$>Zyv!E_xETK6I89rW?oUa1!Ux3U6tBhc712dB!WJE;M5BlHsr!HRL=1UU4cO%uRP&ZQcZ(Uo`yKi|i?=}+)oi223&5*853GKZckRzB~ zrbsM_i%$SM7EY2^N?C<_MMMsY39XO$?2l@)#Z+g4)zO23i-%M78s6J=fmhAX9g9pf ztQ)bt=tiu#I1RW}bU5BVAZQ_Y7Kp})Xi15w^`RyA^-?0P8BSggJ4=}PhmtC)w2;R) zSGM>QPeOaY+m~{D)Z2-fBA-RxG9g~@GF{0Rd%om`Q)*uN@GyBUr824xUGPqj6cwrvGt@XH)GI!)g>5X_Bah@sIonDM+!Dpmt;mwTm*&Q-LiNX7P; zd51SZGm;HwwHgLqHd_0lTqje0F0{VyrbWqC?r0yRvF7R2XsKR7y%+u<;|E*Ju|5s6 z-xi8!14w=jZ}tGE%5`s=oPZ-7d{ij4QIf|zu15or1e@-^Y`yW8hmE zIiphRC3^ZXIK5v^wo4@bDDu_OC9#`%!WvHS{AI=9NMnc3>^hmpxNwT&Hw(CvblT3` ztw@BknJZGKRCjl{;jFu<$nqFb_MOGID9A|f39Fs9?gaENO~$QZV}oI8AZerrG)$GK zJOpAUSgdOrIBrQ_&NedO8BUS>*zme7a6Dd)9O#)lc>KOl^d0UX0o)tPT`k1tiNYpQ zng--{-vokvW28{g8lJqzX54L>Ic>U2@`SwjY^Y;`JRO~dc+X3C{;{N@KM85~dI}XE zR4QJ%rw;tJRQ#uqCxC4H(STHh5lW+X{-9q*et3Rh!thP2K0(j0`SKUmq&x)4Bk0{i zYASulo{xphks#lwxOI9)QQ@2_x*#idfbi^?PQjyncYW}ryXL3wd5`(`hf6gQ6byH$ z0KqOa@Nf}2!YbkoQ}G!l8-D(VQS8y8LI%1WEAjFj5(h8>fwdqNnc!Xtv>*zg1<6Cr ziTq-c=ligXu*l+>1xR+Su;^r}fMi!y%>+1PwGVc($jrOAFd4A3HW46Mc7_gFkALoC z3n+KFf265Yfn>NdtX5P3wE2Bk>)l^1NcH6T%jN7}FBh`IZdceK)f#4KyBMTe|J%^^ z=@9a$NS?6)tf*5NBwlK2v4)ae#3}wa&XZls)vin^;ZU-R2$t-+QW>}gLY{x<;V1Se z7}w7A36;X&kd+p#i_SX*rcXFOFu4v6OlnFl4p~LTGWV`>WlDUvoH5}SuPlk1(-pUa z%#J5NVxvk4bO!VNUTi;<4p5%Qfz1lu2Ftk6Q&?01$)O^~-Ztp*WF~x2cHl?g2*gM)Hx!P{?qx|jAF!+f%&0P>tXn;VfV!~_wp(2B2tU*}m(vkJKm>DRT6{ON3J}K_Wlvhkm@28Xw*UCz5p+5gaIZl47R^^+5 zgpWzUtAyk`(R5nD2?J?6vfzJ04x_sYMnz0_^j78S7npA;7;VWUTxoZZ4d)ibtz3k= zGetDFvrilt2$rx^W_iIR*wO(S}CUxIU(+)Mr2Fr@Y`!w}rR3`4a3@57L&|Hm){de!_K zhBRFaLr#a2bf95~$HMt-yf!+tn^8M7sg3V06+S5!&I~0H?+{OlcTS(;o~y#Byp*_7 z()c=_-iV?7@a`coP&1K0YNkOcA#)-j-p5)jSw3}T_P(ia5Sm}HH=?Y0NiGRanz4X zonQdoBiWP0(ejf}x86O>NlEKLgecScr-BUVU(F`>RbJ~m@Nm3x6$!~Zv``GL7s2{$ zLt8djzsVrx+B6!-RAUBxFe28xm}0l*!1K+-*1B7w(@EJHq&;H7+Dw%!OB7VShE$@~ zWu3)5_5u(J&xkZ3ZSu*pF&2A>-n6B2*THpQq1(Mro6=lPcfdu+UI5<#qHbB(G$n!g z22NqpI%BaXg(fS}52Y%x2G~lW0Hvxs@|p`c>@?p5Y(3dKF64Qt%HuuU4fE zv58r`vO$y&C%AOJjr47MYo!8ppLO9HWmt{g>As1TyYCsO`xc=s%s2MRPao!Cm)(#Q z@m>A1_;05J49n*ziF4PerZjJN{_V?y=RYB%K;z>-zC3zEmN>!H#}SMoRRjhVX-Be< zT2iH$ExpSGC40Rcs_Q0@FOfBCmtia2;$cARc@SbOk0p4s9vgISQfGazgzR(0YkNU1 z+t_{Fzj)K#bah4W+06E>5lSJoOE>E$GVf_0p12=VJbr^bFxA~+ojgwVOwBjDEhM_V zn5M7cgeLMpQ0 zGMrgG=G`wOZUIp$i_b z=ga`<)_N;dF~TW}{&61KhO7&}Q8O|b@)h}qK>3`K9#84{uDs!_7!ut_W?%K9C?l+E z(;JRN6E9z5uaXt0l+{V019T@dK2A0 zOgEHX&(N;$%Fo#B76mhL%WF%ja*A!agY!UbjZJ>&)-}pN@SLO5munQ^nO~Z06Ps0G z6L7=bPltSZ?91yhSyw-0u|J(IU)d_eRq3fVCuPjKvE=-MD%HJ2AR>G?OH zylG-)Mtyhy?qov(cY_bgI9SDiY?Lnb9q0FObuBIljC|Rch4asxq1a{Z*6R7 z+0@ICA-M=5OEZcTWV~qq{rcR~vFDu7LoYt=scndQ485m`cS4GPLulqusxm8vx(>%1 z9lq-+$}0ySmS~;D3S5`cp7sCQrG!`)d4{fMS? z{$4XT^T$BYs>0J4RV{)i$Gx>Y_gn+ncq>V%<|HJq#@@ayqaxyOoO8m6K&7Ij^dy6S zvtc|S1}tw4qD7V@mMNONg1ISlfN!HvI9Ww?{__rBH_9Y85H}~b4o8z35+V5_b|J?f z|90-HNX6L=Ecf&R*%#~6g1Z)F6o-fi*@2dA!X~6H+lrQI)@W`vVY^GDrJm(I4Ms3{ zTD+SSyq`j1ZUhujp$nAGj)s5WmPP!l$BXB`5~Tl#vPxV2ON|OASfj#Y?5KjucUz;P z$7fu5#6oI>%*RF-0rWn8&e7_6*dnNSXI?86MfPfgLQBx_)Y0|$1U4rv5~1)Uv`dZ1 z?G*v4o1=**u#kkWXN7ZH3k1A?MnQfvmDm5~1*A<}DEbC^0VU`byNS;Pur{*O+z>OK z7DWp>$hT`E7FBIURyj9>{^%RGD)^fh(5^vZtkfX1VvawA)I~>%#P@%_fVM~_rlkV| z==5Yv;sRUDjWugFPw&KYLW9K)Xh;wBRW2aWz)f781w$ z{F^qjf$$=1{3GDf^2LRsI)v}8ceS>79RtaW+1RUfAew*hc!zWBvZHW)05_EZGa%Vd zPJ}!r?xmPW(Arv%6)t=FUH5@$ijP;6>os;{MwrU?r6h)@0;YMavghcRD8-t)8@I2ct>pr}-!bPz6yh#`M&M+(k5QFs|xIKcEbFjhzU+?W20PVs2ol+72D!xBy?XE3!@O@^LXg4cHOzw-g5|M zD9fd$t7vKG;4+aSOO?(`Wqxe4@PE!^Nq8%x2m6*A;x)s;d^1icGoWZA zQe`f>U;vrJD-`Zha0nR`ZCK?2RZSM4XoGL2ifjfV+R#sB(nuu$dGkUcF1TtpmzFyL z;TA%yXd5tXLPy^M`-b=p6yAyU6HCS& zs$CO1(`E7!);oLsuqhbmKH`P0%)q2XHkiNJX^WSsdl*l8bJ-7lR9eTVk&GDy6MFR{ z{5d!5)Y980<>~Zh%_>7?i+$7<9n^r{oD$TVM?&=Gh|f|!;5N~Fs(3M}>tZljF!L%= z89pN~oDGs%o;mRPl&INC$&knLzRE_1J@PKgFcF(_@`Bz=I|cNI0=%p>Ywzcv07MEbv^$M21(I#?0;M-Tm!G#Gz>=^?1kIHv1t zTIF?L+YTv$wnW)Y{Rmiy0_D;kK)H0I_6blf?a0%R5dY_$Wd^bk#eUH@YliBX4-Hy0 zR8VA~&QQ>-4o^=|i$f?(S?DQaSssaCiFl$JWPL5mJ*}F{1LJExINb{;HnR#l*%`B9 zM!<Ppa4GE%k$m;TJETl^k%yM;w+F3z>OqiX}G(EwW_+aN8GYalKreNvTs3!U@) zEQ^hk*tGr*;9|tQyqi=RK$3Omgr#42zim{I34qSAK?cS1;SY`!VGzQR;$)HF z{t2CDx|KcwH5!}{jfPkrS6Y9v`o$@9txaDn7=Ndj4GolQd$zgGt!%V>3!U3&pb@tL z&^b4xh91KXQ{!*(wbOudalg9nVye@(wyx2?mK?Vok$)^Xe!fTy#eOY0WS4YqmmEa_ zo1(;1#h1H`R26?MIpC0hB?ms;#;+vnKbIV}z>=f*cFBUyauNGP<^K=x);1SwfoZuYpG z1gheZ6Nrs{z}cSn5iacF7#4RXaP<779avZ{_3l`J{Ek%o+PnMO6@;?+?dfIv%{|#- zbFor#w94glp4M7`2SU|k_i(4m40^~+(9T|P+KTxTD((rGf`9Eg@PLV=9*=nlH3}t7 zlw^hEyiHK^YKiy;@*G*16XQBV5RP(udkHAGfL$ncT5h1l9x9k%gX|x{6ucDhwSn^k z@*KhV@nYrxMu0Q+=7O%x`JLV}jn#eqs%F-(nTvwwoV`4uSwpY){cAoq2yczf@ISf9 zD`v2ViE)Bs-1pbN?l4?FadXNlKVp++?hiQ7u@D}VcYC9{ES5tNTz5kZ>*hY| zG#DtGj>~|&i{4&ZA80Xv)F-D2El6GqNxjP34EGY zGf0(f5_q0Lf+%nv2oJ5LL-5LE&4<8p%obigyXw*^|PBoHXUo)mZu1=q+u#fo2wefXtS&IZs!|i}a(x@netW0x3*2DGeHS%AqhZ2~J zuk`HPKWo-yAYcB5}G`PHg5BfM<(G-~fld0{4AYKRKlA8iJA< zXA>H?Xj8`;@qA#K)IUBgX-BVZb2It5G9{LPtW3ZET$vL7jIi_pRCQDF-2fclD zXMqF3fVtpuNw>n^S5lAe!(8QRY%#0E;kB|Mig(*`uTslABTa%RM5dvdBNz1Om*9o0PrbLRu90Z zf9y=}BFW_268;(|(ZSUCKrns=w*41;Iy3Tj_*A4Q0UReAKgS71r6uOL)~6~9C3*ou zYM=X#&^3!6nOiC`l*S$Trpg`_yFWZAkoJVh8Y@x&$PNM3H<69^X9~uffABllev({k z#}cmCK2*^P^InqnjH7t2&3?Xw51ecjTS?=)X&zN^D4Q6ZhR7KqYMV!C*>M(qcwaWs zvL*m7IM!3Q1AuINbWp^J6(k#PTen!A>o_eI;x%L#wf-X_=!z0gHo_XU6H-O}b~lB9 z5-4RAo);kR1f%gmD!?ym1Q?A^pj`5z^tsjZV9t=^fzkL-Qap2^=m%N>GD&2N{B3p5 z*bZPN;ce=ku!SAE3=XPX?+q%dlH!eiO_dZsR+1euIkku&>t~7nqD6^UX7@&~q?xb% zu=Z;ei^#*vuxLd^Hs-#>)dv9o$@TKS@%r&MV|anjhDDtC^M@LMW}}Y2SKHVrl)LYY zsYaL`;6D%r$h-I6uoW4OG z_Xke1ns{%o`gU16G+aZ4*T-TWw{e`7WhdGMJ#@!vM{^c@8aQ*wBQ8#`gbi?sgcL}L z{5(y8uqqjPFCQ*tzlvn<-% zh#{$4d;jWR$IE|&QvcZ!`G1cW3*+TqwASn}yI6xe5-JE@O-UIiMzbpKkOxKm88oSg6&?Qj@phY2l*5>L(r^e+_3+Ew7QHFS#RJD%K-DAtKL1zI zn_!E#-d3E%Q&nc+&}i7+l0i}MczgO~<5s&dKF`AWPn1l8Fn}rK!d)3BHW}BjWu7A> z+GgA)$QYQLpq`BmY303Zn@s1F#2fD~d;`JPga@d0yIA)WB z_h}SGAMPDPZFHc9CtXVUxpHo3oAZ4ck0E9r+SiZ*NYr3rYu^3Zb@+{W!WHc^bRIu2 zA}0!bJz1fE!-TnSU$pPnFgf#$nM{Ng^sy|PR9eT2No~9n3haZOC)KZ_0QSR0F}Cn8(bpxe^TqRmM%+`alhrk?PKdPU&)ds> z|L?>cczf~O@r;?Y<{;>S2aqyz@-9(NES;>#jTedg?thV}t}&O%Pi3h9(^q7e$^v%; zZ%F#B>FdzGIab~8oKT~@W6fk|sO$UfQ^z0yOvXfeh{ofNuP!C`{aw{@G_s`bQ!w?& z&hC};vs{0@(i84b;lVZq!2qh(`;>;q%V27Cfrjvtysw>6Qv;P_}65L`t)tftN) zp#h&d{vgpV%Rva(M}={P^x_?Eje*J}l5-;GoBgnWG0>3!_eq4(m4J*mk)ga;rjD;m z0V`k(e8@b9)J&1cLqo{N_~;4Gvp5S8uDDxcAhUGuGRBf)n`*tt>*f`P zg_wzX0W8GnXo^p}G*4CVtNDSOjed+0GfPQq)CP|88YJe8M?-dcZMFf*G0qY4N|NT37 zGNX#eIcZDsC zLf}&}d!gMj7#=UNnrGyvuC9x!|7_pw|11wf&86VKKAjDXbhte z@i$u4{fx)cx^m4V1(QN!uPfiu&(^ry)1)GzwU>B*L%-F*Jhrb(M503kN(7D1-PcjJ zNc~ILt4PA_L8$#n`NaUy82FWfM*?C{*oRr==-d5q~s-+mW8}>^m`SU?{bYkzj|zIAwTYk!nf_u=jt@3qr@*lw4I zvWK8c>pt~>-}gNL4><`S3HJr@kmh>eAB(?8q$anYLMEF=mayDSiDNKNd}sfFfTO#A z<%g_rRr<@x^z7odCwZo=mAmd^;aB;kA!*JB&=j%Di%zLQ0y|Er6RIIxT{R?vvrx&f zxqbxYFY`$(mU{|^gZ)(6mbK_HpZX4kl{tg6C0!R)L1ga`Tj0kLvg%ft@4w9!*8fPW zKKh3e3|OOZq5&2`KyBQSvk3oy7fuppnbY4=7=@zNmFZJU+`(n`qOM$EWoxiDl%8tX ztDJX0t~<4XF8BVA(uYt#@a(U;EE^Aw4eWnxBzaujfpkmyIj-cR2;{^gH1OGTUl()z zUcFib`7QLfSTYdt8mBtE;eC?l{l)uxYfr}ACFR)#?rlQu1%FK3eS=Up5~S0(m$Tm4 zK(Ui7(RlV63`6&^RCM*olHlPZCIeB^Rat}bEd@@&C&M43c}wCLc|SLllL#+2NAm~$ ztgt5fSz%ptGSUPQ8>`y2KJ|}9_p6y2WNx}#SJ%&CZZ}SI|WY3FWw}O{>QP3z?G1zrW>XO{J&Ijvd zi@Q%bw)0NI1qX|n#mRuxE0D(J2Uf4az7KADoubH(WNbsV57;y5Hv)#KSqLIRGH!dF zK_a zHE!C&Dm2BlZ0~oJd7Bb5-i24w5AaFu+bEysVs+g?czS9be7=S9ic$WqdBD&_7Ajl? zr&DsZa>fTNvwe}WaAR2+{1w}|YiIBL%16u7KGL}Y&9C5zGJ@|54dKkF`1T_9qjXwj z4yPDa!pm*E9n-=1T$epE=xJS?z#&_dpP*GZNNxUXbG$=wVbdjxnj*%hu?&8MY0|!~ zxjff?UF;dmbo7J$Iq!%g7%Ju$HmI~-pz@d~Io#q628S0H%H?Bk3~&=mRxDlv{S-|S za~>&*A3X|ew(bL(tt*A@fnAdbUKn%}J<3mB`s{PE`U}gEy80B_t87^iB&X4kVg-$( zAzBV!cFzjAO~>Zg+*4u^z%0Nrcb4rN`|e9`DCbIF<^9d-U9*VfypBFbo_Ip?DMe(J zGOED6PhU#I?@3wWI}ydyg?0LoV=j`!p(M@W;BUaQC1W|Ao)LS!2eroo$`mtD)L?B3 zv-W|g_F@=`VRZ+v25#Li99rIxN=iGQSf(oA5nqx>eEZgFhmx}Oy7!J^!Kjo(hQLl5 zMIn2loqoNe2!eka>_i|9Q7pP|7UsNJVS(W|Y-*g>9x9S-H+z`hJ{(XPE=Xc$b^85> zpd{;M=tq?oUYX&~EJA(#W~w#Xb(@CeTfoRaKhmdvA2a_6Uj??cEPv0^{NC0=HY|T^ zYri_2f&gppE~-i(mCC^o@~I9?s#=&>c-!KVeE$r@5z_w2{{U%qPa)wZYO8zk=3C#d z4U5C=hDAiE+O?GLrW9fugFtEYLSJ?oYa3g6W%8Qt|FVtIg0?ZO#Qh?opSCeDmZt>X zg(2(O5X}6gS3lRa=e!H0>X){E+=T%yzJHw7p`c)JTn*&n3nrHuZr?!Ct-Pw)I)hfq z;+y-^z&FfeJG&9cH_W%4eSU;CT%{jXpBYo6(u$+HcKLqVN`Hz6A-2-clpj5Fzpcl= z7A()t9U#`@il6J++t`00Xg#h3t;h5N&u-VX20x!bFVT^3Pqdy%Xv}5>0 z2N}4=*8jAPRRCE0pSH21sV8QUNnfD9dHGZCP+3q1Pt1K?vJ0>?X70Ae9tFjNr-1a> z>`_A&a2V!}y}pNYD;`|II5OfHxIGNBk0QwY0!U8vM0{gvl!9}jzDk2wyqb5fzsUHG zwS%jLf#R&lxbaJ1y;5VLl`BBl{+wm{&gPdWCJ|c8a@yIVNyB82h(Fc1fd8Vpr1(kJ z9?_U=?D3X~+rer%w18}F&9jUZYq2nM#O@nX^W~T!8tJlodAM1%$m2oxTSBw(T96|F^yEq==ARWG6D-a1Hu>;wRdZ5EqV4$yCh3~g^|klxQtgD zsYXwcCHog^zF%{QHEf=BGrSvn@C7&wk9K8#_9SI}-xm=y@Pmw1#~gsvw1g8{mqp&+ z>pqnX<$jC}!~$6XNNw*7&l!Z&4E6JXB{BvCQe$=|W!|R*CJL>$T3l;)%n;$354V(H zNapaKyW29lC*D0etp$pdYG+%lEpxmQwFUCgrqn7)Wbx3s%^eFSnAi3dq!eWl@IBE> zu_)J}G-MlQf=8qn-n*0l+1kx4N%@*&}whkgaK~|d3A0pBG&n-#wfzt{9afaG7hN&g2;)TMq!8tpQ*=# zUl$*gxfK9GYlxrmoco0883CzhIfeKE*x{mTxoVfR2%r$5f^1>}F`*h@;HGctFDZwt z$#3gfFh$XiBqr}Ge1s%>0R*0Js0y-0+1>hnE_02Oyn~i)6}QbRk$;L@yAeIgB* zLr&H)kSFWgvrQ5F5zJdJOsjDq$fE zTH8+s?cEViROpR;Yr*uPgB2(&^fPANWQ)Xi!K1oO){Hm-E82us;Nrspx%lANsnuX` zh)#-|VIEbCJZ0h$_%%XUe~u7nKv-Cz0tWJ2ezGM%AP;0qhHu#t1T%zR2)rkLD8QBg zfxHk^JK5!8NFa|K2=?9v@??wVCwMc%Bbfd#1YQu>qGW^S5Draog+cTjc|d zGPRY@k`DFmMV18<`gRMDnkysgH+r*Be*%7AUiLO$47}LzBAi@5NWpjYqvcq6VU&8A zQVQ%h%cCDVf{B{fOc*-Wa=cEq0>1#Xs(G-X1yLUuBC*@#`9d2EPmeqS0PP@vrm)IS z2@>kfI!!02^Cs=ucH9kDT8Dz+qIe0=Uxi?(S5|XhND~t3HArQgS;Pjnw3e;(4sSp=8l-pB}Xr51?0`6URJKx$A*So?JTxD zB(nBHdVM|ccJ)zbW|t-b&vBSB%h5~nEaUI)RHq|Yj-h3BzD=H1GrXGN@;6#Za)}t@{WuS zyn`jZ2HMS9HpH{`tT$Ikn|r~H*Dd4YftQJ{$L({F4!NnsC@$W!EC=HA?;|&7=l9<5 zzY%LVG@yV=fZ|8dI{8szzn&+&6K2<{j2w@cBTH_FDwKcORWfE3%l5oW>dVF+A7>a^`3nK5o= znj0=+pOx^?M|Ecnn20bt;#HAcj<8i54C_4v*^|=e=$A>=613+k0}4k#u0}aHFJ$01 zdt#KR8os)dI!^6k(XC5*?_R}2_C9j&+Xv7BbtD|=XT*G}&oZ~{31A(`GG(3xJ1IH9 zPRg`=hD-%fnu% zMvu5)E5<$$Zkq#G(c2s@f5LnS^SCid>!fGZVAdS9@I z=KbaMyK^GvyLdy|hReC&PoCs54*B>^hx>(zArJNd|NC*LyLU1>YxwrV0JN2wjS!*B z?;zXs$QtJd@2;fdJdvp7e#qxd`%LM`d_Il-d8&TeA=mw&5>?0MhM3o3(D5wl#2MLM zWlii?K}P;4<7j(YI1X~Lj+7*`CJC>&!b0sZ@mvJYSx%`*6sJ)4_A!=)1q7nplyBIF z$W9^~-xq|T#=?-GHBy{fy_p&gvI6YM-xq>L>)L!=r^8*j7Xg=|FyvnS7F^#@g zA@o;$dfjug#-?Y{LGko!^=q@o@vcs0nf*5J)?@{tFCIs`{OkPqkHqUgJFx*r02k;o zyMi8UdzkQMz{{%~`ZW?gJE560yG&h^_|0|xVzMDg4bEq6Xq}9~O_P!kC4@Pn5iSF) zy-+#mbKH@Adco_a@y6UsON8UC-P;DrI(kdHJvpF(awfZFWB0a!a;+O^phVaMokfw3 zeimF=L=hnmw#1i%zqbY^n`IR9FIfZQql8>0mqBZ_XZIk}Vl*2Rsvk>D zt8eaWo#Ds0ikfNy^TU)`jWF5xnKY4eA|0?lu_qKhd6$399ewQ$`wsCOAMmN?0Y3Gy za9(v)wEW&DA`*FTtKI|SL$;exU#()Iz1IxgKHOLRVIs=4he0T0d^~W8b+{cLK&7p%cvawJ zhChg|MO`thKLox>;55Y*C5+7JKE&C&VdYWrmR;VWYoY+U#wq#4J3kQbHG0!LB_J&V z&^0L-wC4c2_I&rx@xeL#NY|A><{Ha*NHIDRM+I|xB&65Flx~)O{|+5c47I-82dWR( z!ZDctHa<9uNFu0tiC6%1Ez|eN@)liF1JJcQuuUG#O_dSeF7@_R6;9*D{q*`g&b`VH z=Mt$U7^d%Rhom&#r)Uhm^dqvUZRVibnMgy0QX;78P-hsHL@b#ItHk-NNfW%6zWbd& zd8{1=ZvbmCN0#;jeny!Ww--G7F;47rD^pj%GEs#IUZy0LLLkBQ-SVPpwP>=~n?T#^XMqc|I4ya|%L9Vxy>hLc$-YH2>+!}>Gq zk`h__I*(i0y?Pq7-7OCGQHH`3gn081sjv8~0z4y@0;;{IcpdZ)=b&j%f7DNB9 zBji8Aum7_e0d$C9j|&jjgMe&ycUiz_FHk!f#K0HRqa$;EO=c>m#2mqo*W2W!%{7%n zt+Ko%FKd3-#tnP01myMZ9A2piTvLzFQn1}>r-1c`fqzDe?4q|*q>>X zEhQlv`srh4Wca77%aQ}iqL5>Dfn7)9`lo490V_8B05iW)o#qiRKq*Qe2cJDmduw7> zpSqX0%*$jyViNvKe8#w%9-Ok46Kr7#DTGS@RR~pxzGal|E7qbzl-<69Vp6_4FgU28 zJ0%LdYcdT`x-`{K!5M-a{#E`V3Ce09yGSylWV*^=?=|?^*Gm*_w|B*C-lL zz4lXjp!Y1=;9BT{uq*M#z8QGec&ve)41hj$!~nPs8w~w*9iF?hKxWu?ul=uRFCZ-X zEgHGX1Fyrf^^)BubjmT_Wd;fZZ$&Mdy-S&zW=(+|ENDaoid+!$X+CSJ-4;SMQUJmt z{n%vm%V8({Oi8UB10EG1+WYeMI$ZF_b@(NC9j;OTDL!LFhKSFWeqD#HO*;1E-AA*Y z8rO|{lvXdIar$gE@Y+EAi>_T0hj>QGXEW^9hc)&Xm-LYnL_lI=c=;Q*iHZ^u)#iC@1nW16|=h4W4X#|OJy26G$ie2gJoE-b-(Y{<-h5^*aj4AZ)J znueYzZV1uIw8lYVg$vy~SgNg;6j~+&qcQlZ%9eIzQiWQYXSEG=Nr&A?H#iPt0RRBA zid*Kz(KQ)whp@?YR3;Zb*U7OQ>*;V7^6Bfg76ZGPoNpA$kq{~SUeIJQ zN~M*$>e<<_QZ#Yc`oGSQ{|Ljf{v&uJ9SS-}K<(Kcs6G4g#1G2cYu5Wh@u;X|yqeN4 z?&4IsuO)(^F@oFgPEa{$V7Ba|$%iz`f%w{&?S`(IL>o8FctML^%b&%yt}I}2?Ic`O zDc84aLFV7i5hysqo0%J`A!}-6Lmyy(Q2UdwpEd)Vk*_YHwK_|K^b((|lu;@p50$H9 z;#_c(t^Hq3^jDqOGNqYVbeODe@GdBX?7ss1%U9K^wG}0o=$8TKcERKj|8hBr+{z-4 zGhuGsS1(fxS_%AgjsTAsyxE-mO~5%) zxoNu(JYr(#P*zmv>FQ4`NR?i`?0eMkL1~=6n7eFatMHi?*VrcNW#;KtkKuevgc=3~c^II>#p^^(59F~T>)jM%(YivwWUr0feS$2mck zZCZRVKxqeH+2mmsB9Qgn9k!g>OeJ<(11Dh9uW1KEy+g0yNM!e{QO`i!q-}XOjbI+Y zP2d-1Db7Ha4aVAj2zd{}vdu4f&4X9s$_{ag85k09OM(hTLiL)z^SDHw#3=6MU}@x7 zDdW4WSBTKKkOVi*g!@;{_t+D(BYs}Ny0*{+1~a=b1WhZ4+DleC6u3p`sh-}!?Ow=Z z4zO+>8&2NAT8Ny=v)GRp-G&^8kc$8Vv+o{pu`jS!#evF=w9rNd_NoCiV@{-Fdz83= z>R8Q;aSH|~YhOaY;GHMrU*dXBggw(}dH}al+V1Yl`TeDvTy|(PuKgnclUf2TZEAW( z4|J`8>Ux4w`-Es$M}=>jKm560%nshE&!az}3HPnLeC@aUz?k8tyu_ceD{RP%_$U&c zNRM-D0Y_67h~O-Et}cZ9n|+m={XZhG|C}JdWoNgol)Nn31XdMAY%NWj4`^n!DSk9` z@{aha4g~@JdNf1)nO^EZuC3?6=O%vWL=S7%6&GPx5=2mlK?&j?-@ z!~W$AAQ1Yp-+ygMPV{<68y+Oogt3G@F$}Ys?Xq^A2oXXxd4^isY(Qne2iMMQONf+t zIB1Jw?Mcq6Z=PYnIG`8d%`>nYZBEQBA6Ik`)YW1w9H+GbuQRnL6gleC5ulZs`-K@< zV~BF7qDirlb=Aqpk}8Op9Ia75$pMG(VPx~}@fnDQwTIM4LE9*%-#a%=Lp z{3|Ymf0gu%o$Jj6_*c!OLGjS$)s*MY>IbY64y+;P8Sx-|+h9B-pp>#v#QDhbC6L<- z1wz^$6wSd%h=!*nUAV#zK;ixsl%0WV5GD$$877cWV=NhzECmQP`+2v&WM_}`xs}vL zbLH{ZzzHJmJ%i=f99S+{9SoiRd`X+KGB%jnasRan)z$`(^1Wy=X7gRpXdOm>4PhdiQYHZnl?W z*H5Yyc+EwLRt9SWgR+3v`-8MpXN6cb*i1#YT}tHVll)WujmBo$^pPgHm4)VzD(v7C z?A@srM!a;mW<~;_7p7nddsm|#(^3~T>LgY42e#WX?wONU=;<3&Kpmj`>_)}~O5kpa z8QOPOI1<3WszzD>`3c}(MRMaucLUV{;4GDxhxk|T&5Ia3h3hMSfh0nvt#&`7CYJMx z?=Gbvtk+1;>=V+occm4C!K{v=e*8H**3xgWnNC1qIO~)bFd0>>R?mb>a0SaOmzbMi?{z5cc zjE&7ay)QbwAVrK*P5V~jV@o$lJkQ=s7Kz6r14h`M{gH*x8OU`VaSg{h5?@_kP#jwD z4mf2tk&CI_O?{E*%W`l>2a7<^Za}!|JxjoBetz5+#Nn;Dr4}o_{l@6FPV}y{p=@Hx z3NNO7w=B$%1DAKQf>%gm)scb!_6@@RA1T*=mSjtZ5^#a5)OFOLr{OLzUkMS*?zkXr zstt;KJy{(hwCS2d&GuU}cO?Lt#|rYzJlDSYJTDoW9tYd6JQF2`-hZqD z*n}wFv&OW}8%u~`?J%7z5wHLtwMDQZ`%=zbjyEl-L36n0&G>`(i#!Hy^Hd_go0p!s zs8qr;9Kt>*D9)en@v54<_Z<#9CBjF=*qYEo>$$_;-E#2cfaoCAl>i_~MjXFhb|h{a ze-2_ZlftP9!dR?somS+~-@l4OPdGDs*_u794y;0YHhAq?jPLS;o766OHlFq~O65RD zBUDDI!-GLn%*QbRO7aFyjfTCC4X!@YsW&%Z<~j8}Ar5L)B#wFoTvM73E1@~`!L&N3 zPf}z6O2WTGZeEtYk|nkZ#}}=q*7yOdJHS&oLfDFxw;JfRjqWQ?Z@tE{%gWCLO0owi z@x?zpvYNVGrSfnG-P!or7n6P#ckP`p&$3852PYv+f9ZSRK@6UQr!)sO=go^Lp;#f<(|GEZ?yk5HhOMU#;el$%831QX=tXUbQ=Yzyzm>n* zSEkTyO7MIL%GiXWFo0{P_|XHNBaeRgAtv*AYzvM21BYsOn`*hVAJUvdfo63bUn%rq zBZu!9#y22?;xjKUxI^{`WVW=Xo(GBqpw2nJLXx>;U$jIR=aDFTpg2*D1Sc)`^RdTX zW*maH)*9mKNGFd!#kF$zi@U%K3UP4x!|S5#nv0m0Khltnkh9|t)Q@_kPs8X!LXCG- z`E1p&mePka>}ytMKbKW&JaXLts$RKN_qH2XXHpWK8&~^$fPkA||CiT?_vt^tpYe`3 z?FW%`u`?*uiNtZ9bK3d6p1^WqKEpHig&j#SoX$a>NyZD|!)4x2!IMqH3pvxl3FNm5 z)#bh+V0XT}9{@c%USnF>7rq-aWO;xNbF+RJ6t_^jhIjH=JrqxkN^uR(`N((;PepC^ z#o=&mAA3r&Mvhkt&Zy*+*dcGf6IcJoYg7YYTARQKhwt~QU^PvhX!C;?zM&MlOX*30_wo!r9s)p5L%=kphcho zg^`kH_x|qU)!J;`Wgw)R?otWTZTnn^$F)?@eHH@Dml6WNJT~e4_rz<2!4L}bTVP%c zOUx5PC#%aYYusttoZsbxqz_g%&`l@s3J3&iiWy;~V9QWs4=W==;y65WfWc^q1*oYE zboXsQpli;Vsqcm=xYroF#UF#@p2QxJGPJmKgUE^ZqYDEO7_ z^RT>q&m{i&o@p8KT#YDRnj0Z5P?4RT z93w13F&<|t0w|n!?<~lH3TK~a;$%W<;mUM+VG%4=-PokcbVZxaeYxVX^{~o%$-r~4 z+IFhsA;`c{vjBy27W(Ck6TWPC1CYj<5HkP`MmvBC zUgIwnyzd=9kV>X45_2TA`U2*#}5yT{CRLyN-$+Ra8~75&}o=vrx*W)1YhhiK@R( zKj>OT-ZPjUHDF^TQCb$7qGP`Bv9VXV(0|WqxMjd^PsEzbri-8EW?LhkRt$fqOV zvO7uYe;{PlNHGa1tJDFGsrn!^|G4ujY$yCr>#AL#*^48^1j|rT0&Wh4YF{xOO=`Sz zXi8YT!m#@cQ41(EvCDDl+B@+G;Yj?EfhIc^He`)D3?fyMOhzBnDamjn*Br_l+4vrA zg(>z8*$t<-u~#M;(cN&Ahl$VL@YjEl7=~o~8oHf^0=1qpE91{nguHeIF1^g$63%c} zA=}NcQ$m6;Ck__;p z-AlQ9QOY8Mosm4dv{7`p{(&M`oxzW<(>ZI}R;E61fLruo9F6)K9j^Q%F8xQg)iP(a z?L|?83P_#>z=z7V2T**eSs=Hpu8~?;`SY!l++|8gTM<@BF_!v4l|hwoEWt(HWI&jhHCHvsEe2=vt+xj;W)>)`&Mjl-`ax#G|)6b_N_p1_9Gz<95Cz0h5LIb0 zwZv@BswOuz*1;l}6PYBaPurN0Bu#ss0zx!A#xj#sVAE@^iFCD8X4<{1Vkz;lgM2^d zhE6HcdcvQ{kf3>jU4hX873srlxJWGSqlwEW1XETN6H=bdiN8Vo84??Y`TQc*704>D?equqw;=0> zC%$2rI7HTON|zz#cvaN`-<4&`k7V%5)t)PVidY;EPUXUQ1~+Qzc#K*`Tjc5R^E%yo z@Xo07V#pTA(W;X`>k14~jg%HLM+32b)oY*oW1PT2r^LxC$P$rFS@VK_(XQEXh$swr z?}+a`*1ZoFV!lzJnQ3|edG7@6iv}%7F#$;0Ti3JZ?(KfB#G~?*sJ;O=H-fd5#htTn z?$uR(%*{7CA_Ni2OM!bonsDu~wFVx!u} zL#6AZdqESt;A`?Ol8-G)=O?l1o?6qMld*}OR1l~0O)tbXfcfJ4>~^T91;jO=!6XB9 z1`p)-#%~<|Ex)(xGy!~$fKnr{Q-TDn%5D4;UIo*^)#||Kh^g|_dXAXjuSyAUVr+vG z!x5~?b?PPdGbseNBVk(PV}nnT1ASWz(uiaD)^pqeq2hOpVW8m7*;RctX}itdv+ftX znpuBt2x-k``lH}3G{v)rWYw1Og&^af>EP$*7CuaG0ILzp!_@%1K;_0T0WcjL45ow4 zZ!0BKA?aY5|4%iIb%(V0!dyNwNEd0Nr}!iDA%2b7RIQF^2`y=F7}tics*!0 zw4L1n6YKjqF;q!}HClugiDg3YWP_g1_b5tJ&P?L|5lCcA>zHEF8dEkBRr1r zN(>>}HJ*tCuT#8^v9C+ee$X_9DgD^qgT(~uB}#gd#6CUeZ3m3b4eW*@&m}JLj7yr= z5*uJuA|lxSb*lVFo|WSt(VN?b-BbD_*g;81!!EoL!bc6(No&1TZ=bqn%Dc#knGJRE+l&s3}kQ01wE$l zeP$oPG#rWzK5%0F+VcJI#xfcuzD$llh=@#4SX8Kkky|RuFx5)Q>@9b|K8EXm`GUp!w>=FL3b5HUlz` z!tCy-W4Z|9W;;)B-adZH%Q-B(Ou8Y-3#IE+foM2;cW-ziLY7!$UW^J+AA#jsWMxar zF>3^2HzolJ>TcAiQ)snw84w@cu1rW9aJJr504tLdFnx2oGRf)L2GTe2kxtKZ1A3ox zzW1?uR)%BbmQ6h-6E>scKp?u^6>&mu%$oaaq2c_5HsO6I*ZGT%sieLrP zR)L)gUlhY>yY)*pM;>b*9wbHeua@ap1++>$lyCAc2M4kWtt1(Hp4b-K;YpRHq}EXl zkJ(4eYhC2@#=qtXA&sag>hTOpw_?%QW1>X1!lA1zI6_39O6>UaM-JpK@>ByV?H- zwoDpLoKy3A*LgU~%*ani2SBujrs`|;%D2k9G-=Ryd`&Nc?O7<`LulT+qQ&hoddjvL?wgxZoNI0*7tqZ1E+8tAO1MBR@1Ye6p`aRHHX>)`_UK3@ z3m`^g@#$Yg+wb~P8Aj_MDSOB0+Ti0=)T8_u_K{eZIXs44g2O8iP#-U~jV z9Z&XZUwR*5A0c_E(68W}YY6#Dm~Jn~DR8d^EZzN>8*cFh^|jO?j_ldK(Ah#533V|L zwi#$~Ufg?u@VJ$FW9U59^P|HXe)Bbc7MWLESDP;b`7ab@8N({Lu=CUdBLllj*bx|H zXiHw(yLy-Inmt2yEqAFoc^ zTg$&Z7QZN#Xkpw|e=BkiAs$egxSeA5hr0*;+i-dGU%}RYT!d>w2>3u>>xGvbWrPc~ zZy?kuyd-X`Mi_a8<1nRI&gEsyNK2~ogeG&H7>u4H3o$ZXgdb}Ban9Utr&{9~=v2cw zMddrb(Rw9CgQ~fc@SzgmTH!&bn&VXs>+fKnS&-jO<;<;94K^tREtk9~g|DQDuB(c< z-)aH{B~G$cF5s*Lp z{o_8{Fmt(L)ZED@+vLdAuWlx@=brjujd*6Vm3}q#m${bLkIRr;8j?L0`wL9dW+kwr zGr)lfFm|k^V@ngW1u%B z5 z$aOwB;~x>qhW3{C%08dhqHAIb@kZVseYF}YIAGcpD^S(TG_PJIY>A7367o5eDN z{?d3<+6ayR(lB;^9q)m^j_e6 z8Tm^n#*gu6AXH0VwA>%=riSdsyocyzZ4c69tnVt%yU1+3SYaOM+~^^1hnA0$$+J{p z;>PQZJSZEi_hQ~@%`F12y7~n-6-f(9LeehKCoIq)Hh*Sxko#I3uXg_I_?c(QCt-eP zgpSB6<6fOjZn1&3;2+UKP1U>B{1)TLJv;7$D`44M&z--BJj|>k;BLMl5?)Jw`mYt_ zKS^8JS^fbX`0Jdbm?`oOQX3UE0;&=ASK*eXNwJjyD*O7O@0hmGX-T6*Ibb}pg^OSI zOS?QyHPav0|5Mw#jlpv_FxfqRIm>r{AE=ROJ7Ye7Zq+W+X^m<>SJy-PfY1|3s z_kqu}ZU=fvH%cP9_1wKIF}s(PO(Eh0O3Z^&y4AaCfHfE_jduh|<5g~+3D6sFua<6s zrSV1`xXPtkG8T$XJLU#_@+Mfg99k3|5*?)n=M6!8Rl0#Lb3s@#o1lZv!FO(If{)S~ zT}*G6n1!;re=Fm8cBFo#lIQGV093}X?6~jgnbBXSe4VFKkBLh|pr5p=GL+Lq!$n+# zna%6A(S;gJ;T)1Rmt}L~2pWqbzmvj!yytY-Hx0tuanE9w+Ql1rN2IW;2?Ef8meHOa z_(B?rNUII?0VbuJyy zn=HF)3Ja(?l*Sc3ot-s5s27Q>sz{U%XK$5UpW3UA&{8|57h!~_6QX2o^OW5VqNPxm z;`5zxj2BD~sQdCl&iM1s$`eG?+Y=@ivEV z>0(GDODmJO^cn#fs5kQ`wNjN)t7P521Cx+UN9TR4>1Xyb=C*ztj;}6h4<5c@ta4*X ze&USaB^&Fma>Wiydk}-PD76-(3W|>{=@I4BtBTxl-cgY>P1r4uia39wP$^zYsL>q^ zueH)3kuIrklRo^7wa^o`4cY#ka?t_x3khD8ce;&4kxVU?JoZ*RC{u|X_df`^3}Sxb zCYbLU5-h#mRr%yns%3RtwxnXpas4_j4vPdkJgbT{dmz1bg$O zL*TLFei|$#^UzH;Gj^`?;G@JsG z`gu0o4b`#zeOJgkm~C?0{Ak>#!OnW;q4_wDJ%!RCC{is+wtLUJE!kCzj+SGJebyGb z|FsnSCy6RM`#7MO&m*R`mv0Nh&&8nt2kOXY7Law<^Ofg4`A_MuApA(pto_-Ka5_~`5T1R`oUEiv0C->e zq-eC~>!)!PrSS%JO6RCub6SA3c&}QSWHi0+=hEriC=_mG6Wp{g2lCyC5~9he-|?2# zIvt^NYzi=2e*{0)Xzrz+m5b%WO*szF%8pF#YQ*+1|_qmK(yFun+T zWO2jGK?7qf6am-d>=jsEhJn%@b_kM}6^x>$U#q%wy$7;q99~u5udmcIZh(^TbOJ)P z83B12>$P>bbRYA^TtjL?%+1PjD_JQsVcV6*0kc1~S zQs#mhZGcLh8kl!(#?Q*cbe9oD#=P*^bh_Bu7RJ=TN^a|1aPG0 zJ2(}NsAE}zdKKZBo>jEMz-v6UF#WQoKFeEEoVhtUw2;K zMo`Y`YP;kmy^qY?Nlip{(JdCewkT*AdAA{qXjwtBse~$7WnWJyaWL~V5 zm9hedxt8g0LQCO!q-7wM-Zbmjlqx;Qp}Qk@;v!Sb*xp}C;jJkc1K>pxZ(ad-5y1j2 zh$zPI0*gpcCm1kXd@W?e5arc4F9~WQ58NRhNT{9-Hv({NsbSM@|l0iW2B`{q}ti0$#%>9nAKQ0p`3C7fX5!Dp#( zdgb$(2-({-p46eo7F!-@uDPFJK^x?fDm>-C4khvFZN_-nBxt}g6AO)Cm~O>Pcx}_z zb^}~)=h>C9{Dwvy}lg8{aeG+9;wBvYb(o#vX3dvsbU-sM~0OO z3p-2c%Jxh3vibYPoZ3Tp{4I7(uW+HAw7F>9id{==w<>~_A$H(PUqeyX(IO?J1?`?7 zC#<)5VEEfdkv8r59PX07i;BwroCjlcWkOlGp9#@t;S!-8a&e62T-eP~W)v;8UXh&* zh(M~eaSy|P8BeG0+wBNHZDhzq+kGTCr;ttz1w0Q7XwS_??ZVQT)C25v^6wJ`@OKQV zS6}F;eA;W*sd&mM#V`4-nEF=+2q(gs0XQ%Ct#@QVBxiz{`@EE$rr$loBgvTp_l!h? z4j?&~hKT=EHtt~3k{D^ zo9&>{mnAO%oXEFK9m|kop%Sb^_XFjKN1RBEt_+|7$!iNLr-{pqv_}DHKv)oX?LiBT zIR&r=Bz7I@S^Wus6CtUp)||BqubLS-sR`@>0O-KjAr@fM*-YFE9y=hh01ZfLX2%sK zXzU=ywaE!=P%if z5uXw6yHZ0aJ(J=d{!&^fzqS$II!8duL#IZ|Aj(M=B~!;bAJc;v&3C3vA8l9EiZVWL ze)KJ9opFaV{W|d-np~Jw&)pmjFltC0BW@PS8o%*3i#cO=kT=tF=|_lIbyM1T-Qcu{j#XHEujCx3VcTxG3!&nX@+F}LyXe6xAgEL8JpV1v2AIp_UJ3|FJ>dCX78MIsd9wzw;_ z@B=+G`Na_SmWBa#ROt$xt#4BFOAs=`i4S}b6SDZkJ4_i6Pd9~3er?KO5-VRGVSYY( zK!$$mQSWQ59O{!Wn%Xe&%kjmb`NK9(pMl2WzZD9W|D-r&XZpv2qBjI^-hyo}s_mpo zctb}dyn61nu&cAgzEh@yx|Tgu%|vBb`8p2UFb6PvL8g2k{b?dX1J(2U_5aM*J&2sU zqv&=EJe>``T9pFl>l&l}!CXDpD}T5^07c3qt}ns3!@0Zfq9rs7a-zD#2g8K@juRI59jy$*j#72UqS)=)TNB?_Ej0oThOT<+a(*9+G?&{k+W<)znSU8y#z zIZm(oxpX_%{XJhdk=r!?f92~+(QXyZzZV8#x~;K*L_3gZ9Td|I60HjWL75G+v4fyU znHcRjc6h8v))a80jPmv3t@gqs)GuvtN>%Kmo&U}H?sKr6zw6P?@5m3>UNU(;OntLb zF9zRKOlgGF^gi+rM*0X9u>(*uT>8oX)AiCI3ktN${MPO0tEpk zAkYp6tXa1RI2#8v>vXR{nsrk^v%Y2M3~1ItM_4i%w#osEjEp`C5YtSFWo9JoZ!z6K zqKxcp%&FBy<@HB%M?!|((u$hbP;yyoVU$;+F5p(Y9ly38rhaS5XqAR*vFSApCZFRrw_VfY%VvXo*iO6n)sDJ?e@)Gpti+}Ja z-g^Sxl_O9*3~&fJ^wS7;1u@6EYOhC7uECLX--+xpfJi#6=)f}bK*!6L2*P`W6mBMN z+ApRUtG;fid~W+z@YgZUs1AHjO|oSJJnxx#!apTAS1eE=Do8JXC{)v>JDJdri8kAm zRNaEIK)6bXZ9D8%)q7}(OZ8f$kSWk3G=k>|iijEa7GJ2}W|gP27WDlj+4ruZw1mOk+WHnyFbwFLdQ2Gt0M9Tk zM_BjUGEqL%QL#({oa^<#>fqY7ZYH-I|2ONCrE$aThVfS6%A*#AZ24IY)~@fYKJLX_ zK$F1v|J@|8i9AEAU*4?~38h%4ihbRx>^duI;zZQ~7K$!&+=p~uOAE{QpX4fXR+e2o zn+e!94=&K}!!>ElCE`14d*h;r?a~U#|J6A_k)K+g<~6FU6aoGL=ZQ6}yu{LI%7 zK({|}pnrYSKKzBmHrXffwT8lu%yyXPb+yzZbIgl$l}Qjc3)Cc3{ohRj7cHnsXtJq? ztap~^1JL9r)H7$juSS8Z$K7|5WbvQ5X~5OvCdhmfhhVXD@B!2$1pjUl*vJ8)=s{j!C58^$PfHI!HHTxCKbi!V*%3=cK^-WR z^{I0+iq5(fjWC_3ss)mO)&V)Q+>FYC8y3VI3lK`$Nz;^@hQ5AjkUk3ezOQv&`uxgq z(U`VMC-H#uXFUCQu_teM@0*M(<{TRhyR@4bn_kyu0v6&^a&z{WJ+7z-16C=(qK(fO~F!j7WA~@M0U41cY;CHgav+XC!V_hL^@(CRLtRSA)H&fLxQxH!qBuyrJ zU>F5ilB~A+JKpwlYqCb@`JPls`fR*QNo#0&0oH~D_Q_)FRVZt(j3s2%W>eMeu7nYk zm1Z;o-o@S7F`PQ!Oc8$cY}yB4f`z;SUZI^Ok)mHkb-D|7+K0ahr;}7FQ5$yv!`D}m z0fk$Bc&xpN;75~D+CDMC*}|n4Y?98?Puz-$EG1$DWpMF#ihN0pT8kvWAA9?K)5UKo zq#(Ur$xx4~N%o)u<5h%m)g#IcLMrw|moEkX~I!hVdY+D`sxcnN=3i%}9v~G9Jof&zB>YFgC-Xn@<^IMY43JZW5~F<%A9S9Acc+91ZRe@yQR1*3`OYH3p;h47<9W~%nF>GJ zGzV}v*sK}JLdt1~Hd;1a;@%}u*+K3gN1t??PL!s6{q*yf=+DIB)#jtp6yO*Nl8@7Y z%R23t;UBa>PUw!KN1H@5sHnyzlRWQTEWGx`>2S`3EL5$N0 z-9T5>;NROugX|_MVB7eR@>@Qh_osY3caVZlEd>A(`f~Nd5YSc%v~#buKM98Ox4~zC z-|&oE*Q_ORK)o7C652aqN5NZlSra}VqD)6tK^HVj_qL~dQ~ex8Cb{@+Thbtl;9k-O zZt5DP$3uj*Yi`bVM(E7hJ1y1HhCOjUN{-mN-+57UYFOH%|J=*7p>&ZY=!0 zZj1%38}ojz8~H)&#&}@eIBLFEFM?-cz+OaZsuyMB9_EVSrp6NFl2GHQ>ZWcJRPRk;*;SWcqWxY z^0pC28rQD}lD^cwdq%$BUPdT_z9>4X%ooQChcU=lAirVU1Eo-qw7#IsPlYr8TJUpE z$OM+_u%a2WU0UUg+RT@TCnAl(1<#9T$XsY=Nk}eYjEVOnlvbV>5fqNlSt6~Sq=|$^ z1fG#%(_31g)wZlzdy49t@w4{8@-3mX+yf- zU(;|TM9D~-LvrlVD(C>)%xIzy%OQx<%} zT-w#{43xT+=GLrTA<$ad{P1=J0WRmA1luRPIzGz8(s;RsEx;-1P1Y3K zL5en)h90s=5m`OI5$-Y*%1NV{|K@|k!bW8*<800 z(L;4mbCL1RxK4RUFqE`$c2yRW1X%cNC3;8c>g3ZJ9=s%B=*vbxsI6$%9${(N)o!i7 z5@LwIWZrdcd!~Or6v?g5CC2jdfjG|HcP=|4+X>3lYxDiWWP88D%37PyOA<3OFwhGbSXx;VGrnP927WZQ*0rP;GS;-#70}f-)6u2> zplhmc{RMd9KZ3TEB|-_RpEYbM9KE<<2-WD9;{qRHbjOncj23u9-gQva2HRMY%}~Qr9+K zy^9*TQsqCBW4nodA1;Z>^>M7R5?#!$4)-W%v{2%GaB$CMPA?9$+xJ0Q$DHxiFIYFA*lSBN&qQtk6i>? znV9Cy`mG}hE$(rhcl6u4b1da!8@NyTO-GHsFT1WtVzc~TUCwY|Q(&~{xoWb#R_ajWV`1D??Glf4(_jr^1EbU&E z{~Qv645iWH9gLnDj&BC0qf`>vQk)Y%Jk~s3L?3!vH+-%NDL}K?_)0A5lw4pN#D_MdzMOc!gqYRa-%zsU4*d!>5 z$>(DnQ}1ZDV~NB?UG}v4rKG*Y6Zli z`W3vRwvrJt1TgvpMExh<;NtdA!DmLIH_{RIPdzR9z@$yt<~bDf6>`U*>QsUS6A=Pc z)E`SfFzQP%xmQ$v^pCPncPF|} z+xKJA4)mq%&!OEh$}_gPlzdygFDaVMY9*$4_l|>N%Q}}b+Z*|FNX2)qUwcvC{WA}K z3{9JJI5GO%(j|%t(~HexWRzQx1meRjI8wqUxf1i;>d2Ofh;b+*c!xw;pQHC>WSlk+ zMSkg0*ZK^EQb>U2Uou;FDKRZ9)(_pcV}WNQ~!{-<=Mo{u(;*V zjEwY{?=>!Y?!BcE5eqr3d($u8o68_kIiF9j_w%?l)jPYoJsjCP-0dzBUhUKK%stp& ztt`(k9xgNnPbqYm(YrM@)Hz?V>}zoQPVe@m5H4`3HeIjM+bzDkKLS=LLO-}2j#o}l zT#vDK>r<16pI0MyZ=K=&dX5*0LVGrgO@Du+sg`YRIsfB{+@M9iKgSHq5NE3eJNrPu zi}l7`+-gEyPot~CT|)yS#W_*~+0!JrFDXk(Qpti(*PNP4d1i=RFjP}43tr9^nD@aY z*B-yt?HlH9*meFFQ-4xS_r@X8~|Vxh0h_`G6i2@3bt+waKS%-fOX%;@MXB!A#TuI<{PEjBheIXhil z=f}jb+CA7eG+b{NFD|;&K3r-&92>re&$jM-qL(f}C>S8S?lZapGszLvoRyF=sn@Gf z>T#<^AQjmh?{i`&5od6s&?kLQipiIitMRS$dLNcU;w}$${4jogbgX!$JU1mH^?INB zoy2Vha_3lbT8Q_SeY++d?QM$YyeCd+Mzg;i% zPU3pZXQX;_ifMb-;FZgyE1Sf%BaYbOf_N5{M$B=knc4TzsN!AetC02sn)O|lk4^cT zp&C~-DBliW^OSoJ{!qMZz?Q<`j`TSCOE*p?#$Ysl&aKnV#+Qle@e@uAMko!=x~vwHBqOl$UCcnH^jd6K- zu4=|r82m7{?zqY#em!$ZuNHz={V>#Ip;Fh-F|+4|KI1l;gSv+|aL9f|RJzE&(BRCl zmw(kvmOMwh_qDME`@Btk3du>6{{P1>Jb35L5TE??NdKiNVPpM|mXx>uxSIg$P$3Y9 z{Tgm6w`k}2i>=SZ2w@4D^FjC@45GjpF)4ZK9WMpN0)$Z++?Pm1s`88+D$gPdnyAv< zA8?+BJ@67Voy-zB-?>;klqfXcOTOM-8_vHIbx8LLH9YFE%RcWOq=#68q&Z0f$t_@( zEC7wU)B-`>{P!p11aBsSd+_GNzk*0&4Xc{0Y}TaDD5)Mngupt~0ZE#|KISn4^ASWi z2FyRqbQgXTAiWkCLd(04C>thao^;)O#cQdg$D zt9+IOb}wM8T7RCDHH0~%UJWO`1Z7}80p_33y;OQ3r7ChC^=tz4+BLvF+hOlI0B`pO zkXrzPEkJGos}=(!Y^ggr4I~p^0K7p}tT?Nj6kn+1&M(Ffa=F*>L7A z@!mv!?Z!wZf{#N!&SJ;f;bI&jyEN#toi0p5X@z?+ZOU6XI})zT*s5cEXG6$F68Aj8 z*WZJsIM3@qt+z)`pf0zl{{}=EF4BIlsFCyb&AY*ZaW7+e*+MH3Wq|{uA)paYOz7Xx z>I$Zk{n2nmx2%7(qq=wo(p4CtxNL`r;t~TeED%L3C(*Kb*^6=?UHy{yjj=}I9SZ`S z<)BOkkuLsrFI#fZDq)ug2tsJF7;Vac>e-U*=@1&^1q?rLJJ~;pc&M^=Zv(h+Si{ckU)nuc?i_27K?(I5e1P;<_>}BtCdqPF)4{m)X5VSvh=j zP^LK`;3Y3jw3FrVe8H;a!MQE`9s{y2#XMFR1C^QWEA#W2bFXcO%` zF+K|{H|7G_A{aKPQ<;h9+>Vn!-4SWV6=ue^;;Te=(nedf+^~K&#X`J`kRTYUP@ zh~|k{9u<@)$L6&H= zG2DQhHqzS4`2(zFsJV|F&dh`GPau2vJyAH3vqjrDCaoRq<$ z!|IKBjYruAcLGSZQ2_O0JYj!%kr@IOLa6o!a9;spV^|+d9-i&9eeqHP+1#koUR`^^ z^UGzaxpdv>tqBGg;nXoJ8G#6m}sTe0TXQmy4pNQwV|5We-A|3Wm*{nk#>lV75HDU zf?1daz$V(4+Y!~zv=1W`U1(PgUT;b(&-#eH-{3>dSN$S`Ak}ANjePy~*T8PEwR&}a z9FcNnjC*UKyPC{djAm4|#of#7gsdm^c47+z`o&(p7LZ&ihO8sriMM)NMvk=JQrb2# zs5Y*~;m`=q9Qhbxjp4M!A(lw8CjLs_l%9EgVoX_E`NVTq~a7ilOG8u%2?&&P=C+C;6ydA)O{!m za0vOLyjt%_m!l9&wJPkPNa1v<$L> z#kDiRk!J@&9Btv&-U^W+LD-^jYUBi$!~_>)1O>X3VcbpDTq51Ye~d&6m`0_2ysAO9FR$jXuy{D1RD-TFpUP@Ur;Sef4EqE(n_Z2pb2EmRGWkX3opJ zA>RDweLG{i`Kv~;8^@<#pa}vU6oir5O4@vRTp`vv!VLel82qR8Dm&Xhj;((MY%4~J z?7(8OBTqfq0|#us{9C~GK3ClYr!l;8`x^L|yVvU{gmN=N?{$9;0~{G5<{ z|8=f?{aINjaB(qc5~?cK4X#>X3?a5%j(WEj(75CdusH;NvpIA#P&YVx@=SbvLiW&C zL_1O)onkkM4+VAI*npH5x{)yP^*i~yPe60w3h=>ji%B?sW%RH~gbNL${ap;s{D&Bv z^-&BC4HkoUp17YZ0F+XT4ghkjR{}te1#g;O2!42l_bvzv=q(aosMnOD8A=G<{l0i&tu^>40*b_!ZL=`x9lsEBST-Sc{pP(o+2bn-a?-|t2m{sg?pFC zKIv=7R0wonCjr)EidpQJK%{qs&s+1G=v5)s``7ct_ngB(xONlp;wWMsq26xcCg5;w zEdXm=wM=8Mu+qgMuY-qr1%zuWnFkxN-OIjpaHJT0dOMTRbHO~-g}Z1)tbUyg{bsK5 z$5maMr^S-8h8^ZZ9|@kk4!*rMez7)wq+9XX0@P7SMC-xu5e=8^Y0*HW?-gRo;_VY* zw6Ms3D-mq}X#!zq`-dA%+zf*cx#^U815M{>>NF}1KMcYjkCe3|H9?xre5qrxJ6YKF zJUpZDBS}V%nu+ZM;cN=gDYIPjw?F7Tz8be@;l)IOH}#EJ!4mNw?(AlsL(AI~R1;&6`WOCZF1nz4&$6W7}=rK(Y#gQRmPC{U3xT&ARx&Nj9Dv zRZzqHyEF-4aD9|*F@E&5LMk&V9~yc_O;SV}GCsS?1vec{3yxM$%OHvQanpER2$F5F ze~W`Ge#7xgT*-V!h?DN_lg8NQzYHHGtH1U z)#54=zh&JrltqrEar(=}SU*L0HpG%IOA<9u6)$Ap!6e0pKQi}NDqn}&rC&O4anf{9 z)Qi%i&!A*8b* zoFRlS!}J|b3SdO2bF^3PSttous2TCfS_n+^D{EQI#X74c(G^dYWrS~)^c%;yawi;} zw$p+6;}>@saF+=E*|_H$<<7GSZ7|vC+D5Hfr%ai=PS~?A9Ih_LJ(A=+*V`@I1NSm! zwlU!ru!UR!BxBy#hj3?*w!5unX5{$^-sl6X;;oe|~}K9IJXC=88N zm6&MzsC-YR{p$YSk;e);u*Bj)p(c>&xE|89Ez|M!gSb|FE$t z$*ukkz?#p>C|5teXbII3`Qp%at>S}gnq?4jx3ABZ|fY1yh8YySGY;JVZN~! zLoeJ`9&)cQ8~&N8&{^LqIiMqs$C~W5Cw&HKB+ma|>%)IE!887&hxjXnGE;=S64D0^GU73XvOQ`(NqmDL`_@&2mTp|{f(7y= zLl)9{L@jstm{ss~UIF9nU>?M+{@4`~&)ttnjrGPDNehfEMDu zHu_Q783+<>#7E!D|1Btv=66us;>jw+1m5(ny*F_zl3qt2&_jR?W!`|HY!zfEd!BTo z6{Y*$;*7~aWTR~J)9}+x5b3-x?xQ!i!NIc+uF=+Nb>S5VG(H*W1|ZV;#U+iRxGk?Q zP$FE;W`qFJIi?OjlpLr;{2cCe?XM3Q1xY)Bq`28H&P7xcqG8Jn-H@Q9I94Dj&a6E% zh18_-+qw>*+K||vx~-1ZQtPD`c>_-;PiglRNQ$csiK@}?L}hYF+!s>Yv2D*=fxadI zt2PoMq_z4dWql~wwrxv3TR{-YoJ263Zg*0j|KM9K~DO=jStn#w#QqxuVOBA~m% zgM~bqQ&y@}B^)OV*^YtM(88!C3eijyk^HJ8hs=dlQ7WEtRGz+AyFwH%^7_Rz^<0oJ z3w<|<%Hf3;?|y{ZDhTOy3Lw4A>oq&7BZAL}@zBbS(aRuvw{`R)frS7G9$+GaKX)R> z1DVLQ6-~BLr+Gmpva(|j9cY9Kf7>cNn{C4BmL;Z$8{V>3k<@KO79O3{Y@?Cc4`ePd zqpzSXLk-+{jD;G;wI=acU&q`oWFv!PA=> zO)0EEs`A7I)9s!ld3#B%>nuNru!$%Sw5;xTd6_%Qw(;HG3_+fO_7x=fQBXvPi@?6Z z$CqG0L|&z?ofQy&&=ESXLSOmt-!setD$h_Ow)@gJt~&+Q_Ta_K!Y2?5OSsaG*UYM3 zWO~dqOSrRL>V3=sChS6ijWJdz4iwKXGz?m>#-3hXT-=_~K^g~zwXxU8nJ7+dejJl4)7u8-Mp3$Uwi*@;~|wxKo0TzfxB|nGK!- zsVg~qf4Wl_2*(vb#`g!KIHgr)f$XMNjFPe$7TY|(_!{Yd$0q#cPDSG^Sr92&h4lPP z7yFF95Bi5wBu`x*$er3g;7D}!Jn0%#Os2O^b4bF)2fz|AKqpQI7~ijf)D?y+(IJ~{ zp`k~e_+#v(Xi4;z`+1?rqw&2O(1`=FlVF{=S0n)I3up%y6D%NhQr*zc1|5)qY5Mx9 zIRO$dva0IkIVnIV{=>3@l+mNh*7ycgO#J^UCSBlSq6RJ|;C`bdZx8Y=tYUZ@B2_~4 zRnx|b_Fk9-_>P5 zjY(!XW*FedtqPj+>gi-O%UBCY*ZLad{Ns)~^FH@*k;^L@4ntr?Of*okMKLdmQw!mZ zKoYXL&5tTq7h^vbebmYehWu`<4Bm*)uN)1mNuA%{6fp0P2m+2&gB4Oz9qd})i@t67 z8F3$FTfvV9taC>>YMvB2%M;@>#*vB;7g$2KGJ4_3KUaEb)Z1u?Yv&s070tx$VqxQ3 zMi=ixe!hPaR*Jzf9(}-o1WY2AI#|U$G$6G&<#dktMJ!k?PWF>DXz-(fk+Ij(lTwjl zJ{pF3QY@VddfTYXe%xZ>8{7uc*#S7`stbY!PmJAa2Uyc1MB!2XdbW~&YCk8odqZ^( zJgfZ}E5wK*#-rP+m0l{>*V)7ews1peXI0j|veJlL7jD90U~?)V@J^%=DP;qfM5)xn zKeDZ%MXIiSb+T@ASUDSlwodzoHimJ{v7c$=1HDmxHKOBoa`Aj^4@H?z@*bjT)!d+H zc-hcOl0KkNcpH|z!1qh(g_fho%k2_NJ&kSHBH~~nC+zF;`Y?D#T#Wu5vm34lQ^!{3 zuF~pxQ&b1U$jJ79S@j5|Htysm4oD~R+)kpWCW>{%%UH?`~0FoaAv6+@3 zA{W>Hq1a$&`G+~}uT(f=1qC^c79bUF+Wl=SkP64ymx)0wy|$FP=WEF<50l#wU6TVCi@Kb*pXWaM+}D_|M< zY_n~1pe=qyt8tid+Zd({=AF8C>g&-@i>tG?tDrS!rXt`t%LAyu;iB|ChYr&>DKoDei)OaYCmaOE12@ks@~#7*JD&gn zEFtoSicI(uagJQSzRTAGXdXxZZJL#-wE2{Y@0Tk(M1%5yUwW9L<*!QKrUVDG$Ge4^ zY!EAcSa4=UUa(xb+9Epjy;8&*3q=8W)3iY7b3Byp2s2i|n^riAm9AA3TZ+GnH!_&o zaOR6sZ#g&{41kM;Z&_H<3E$?XUnudvos0)ifk`nS8M!_Xo{*snY&iu-_P4}F9>Wu~ zbCXmJZ?hDQYi6XZy~SH(tp}!qZrTwkCzS#DPcKinLgw9wsD{UH(^$M#0Q9-AqB&vGs+eeu%24_` zZ=hjCdMXf&O~ghg8q*N`;wHKS*Qj;@&e-uM?R~sKqyg=xgTu<%>zx(@@tKYQyUIzH zqUJJ-`A?kOd;0pw8n9bFRBAqE?FFrK@HMDY_$5<63tL<`PXGfNQmmBCP0rmk3xD-y z<*`P$0Ue&fT`WL4hpmoB606jw2xlIFnZO{h=_veR?8o;qM#}MMPAfNQKJt?YqPfX8 z4P=0H9&ByuGx-KYI)9OF-P2leM+DuH<48pu zGm}FDhBYj_CZc&_92glwm;+&Q91yFRA>Y;7OXn#lRI=9|Fy8=F9@@O&5YuqvfCcoM z2Y;Q*ZN%Q5P-2|Dq6p-=NS({~lt)0Qn{Zf=RwnR3g3gdb$Qw0#SL$x~+qD;=t1k*< zpIqLOuJ*oZqVE2DB|AhGf&{$i(u>4&E;v_#fMrON@36%?!mO`+?2J1*Bel4~wCp3W z1C^t^RLwQ6+R`617m9I2&bx+d7t05Vbgn-@r)-Uc~ ztHFPAt-oP-`@eLgAX~|x!WddkR)CI)`!c^fdCQ#Vu?d6kRGF11k>!s=-vYrv3i@~F z_)stAJ;?)T4hkm6cYOccbhhI)yKL;vuH0*8-`{!zSJc-0c~Q`&GY`~P*xvEr{nb}c zYI7Ms%-?m6Xp)+Ig3BT6cnwdp<*3IZ_~K%n0Cg7VD?->Tfxe>U!eu$x>W2!$H?K@* zp5>ivRrgNSl#ZXLHn$2*=bMaWh8t3yGnwD|LxCfEkM!Ra}Z7(I`wV!3T?A7=6XCBUO1eWs`U}EsaRN{43ir)7rI&lx|i1w^QbfM_!Ft~-U|qcB>2s}(4u<-Aa#&_*hK<)Zb3k2VWJO= zDgLOVT9}NfuQ);g3h`Q^A(McE>i|F@{y^0>1|Cy3tSQtiW?=OAM}{k^qQnN+xkU;( zIloI#j}&k_nxt=5(LhCn@qUY2r6Di30i97x>w8}!JPiRh8Nt~*T1hbM_D;bT7 z{Ta_@Cx@i6MbfLv@D+eSYhaUcSD2~zXP`A+8y2bi2 z&^n78Q{~hqu_J3*b)P;tgsW+M-@-UgULK#Fsn&hB!bTyha6ZQH;x5PUr&{aUjDHOO zFOc9Cf~j7`tiqr5j-BeVc$97+5|EMdk?(6OpFwvi z&)1;q`f+ID>y*vxb^SPcx{XR}h_)#=ofs9i_I>;rAR4WdM`=evxIXx zlqXtb_UcsV%98Kid*TpQikBcO)!0_*)x*=fb0U-7D>#R%U#@(mKWN1cOO(`OnZw(D z(!`5lk55+V03p0olH*SHqZO!@Yy;go65d~X^0 z1Ygd*Cmq1Z_9bNB&RLHERfkO4G0Avu%kOiI(*!&`5YiBzqv}-wA~6E-(s}WGN*V#&--yJR0Fk(&7|5@lw|{i2^%1N! z6$9IkyT@xP>c{RsuBlB@m!y;Ts={`(C$)~i38nklO~{pVXxioup$o7fmHD+2&wcQ} z-D-n>y45NI*jUU$H`!lR)y#B{{|;$t-v7y}tsSy)^E-UD_>Yh#?zqrO-aAE5J_70Q ze1s2IwqOFF$r}&>u&>OO*adBUm`4Ic05k>MYU;U_n5{FPVQjJfyCr_od^Wg|Hi(Ju6wC z^I>Yayp1l|MI0myqceD*ewr(6~kLa~0 zqkGG_LKsT>y#uea)oUGK)jqJ)+K=G;r1Sl1Xx0-RoH&?Q0+$;W)&4zrFK_^0g-$Bl zY^Q-(p{nF8;2n79Iqome2Q)*8A zRW8A_P#*`4x;9Gqw4crwgje3E#O80&$770)K(tWnO$@Uh%0CjCjGR3|2~8+h-lPg4 zyDFCg_bHbh0g;DMQbS2nxA@$xGcxWMhm;4-D?IBMG;Yfd9Tu?{nbgjnR#9;egxlVr z=xO{sdbLyxfb)rA$8qdq-4@C9(^3YjNCtsuEeG)y@%1yuM#9Ci{Z`v0LKJSSx&=84q(ka9ji`j@>+uV2Nq_L68h5saw=h~AWYU!dfw`lTn7VS}F!3Abx03wU|g#Pm%WjM(EOU^rsL|&8U z%f2w}3@EkmTp#L5} zqJi<_{Cl=78UevC^ik1{Qo(wjBEI9!ah~J?tl=;Nn!*!TZC6}?CESeqIDXtRfW{Be zvw3Hh>Po)5DNtER1DAzibDAs1uXOGc9EISr5U8jT)&wdGfQi)!Y+_wlnV$l{pdW=V zBERYtF#{%64th{o_;dPD8j&~?0j7`Osh3;e=>ue9QfXrOkL3t61A33(=!gc^D43-3QH~ zQB#JlG6`T4D>MyT@PKA!#wjh>#L681CC3LywGR;=p)e!sYN9CZQZBlIOdzxhY}Qk@ z5i6|OuC{%Baigp(X3}>pTvaeTK?fu)LAFQoMkV)dlBo19)H{3(laNK4t|m4^8{vWJ z%C6I`7#0g!$9&>qITM9DIL}t8drHFt6b6(x^w%jfb&>3fX@R|Z8(tDNNZB!8m5Y1A zQAC8*rhu{IhcBPXw7ys77pi33aa})`NHFsH8)6vXmiM7*nCNx-F;_ zP#iVzq#$QcAZUp-UkF2O1p^ecMBhUR#nVQ4;?_n9)%=m04|q=KCCsh>qxr#yJ0=QKZ5n4_RdazTm0Opk$~buAx1_;Uy|eKn%1**>}U7S zT2on~;kN=K8jSxVaR3YjU%CBT0FwUS5(n-|VL<^%`s{3wOE^H{01$wrMF3~?m^i?X z$?t})o6}{Ta{*2q7#E4edQ2SHugzKjBYq{lCJe^j=PmmbXsQ=uaQ9i%R1M1ox)u%7 zfz}93T21QdQ?+$M8fI|-;8EBL3(`*Ff>APP9kAGjU~2G5jNhv0pGD)-iRtX1yMz4x(<- zz*pvt!cWDH-)?j%z>WT!@M}RM^c+|t(1Sk6P6H??HtI!4ZTtg3;((}ls5EMMM#7fl z?+>y`?l;x*%N)=eVHR+sgFnb7N+{O+q^!EFN`fV)b)fHe@EQU5erJszpzQ>IzXOQ_ zL+UG_?{}u;E~=4CQ2x;;Q2x<8kbhJPtP!xlYXoeN`Vv5bSBrzz2<7u%(ll8UbGiTg ze#cRnt=^z1b&IRE;gUd^?M{qB{HC>ky;a#PGl?-tVA$z9vE2El0bvMb z@NS_GRh&rQBqn|tW^;M!_BOk&fXhC;F{8|Vr;z4$#4ZZB~trnSH+ZLd*Ts ze^My**Yq9C6uA0n264w~1iRYV{RIddK(TNAp=nK=$*4GhtJv-vx`DkHn~uA2k#9a= zqt(^cP{aNyFeb?Hubh;e92|ekt5*Za^UaN2JQpuzMlc)**pTV2^pMZ6$yt|ln%Fd` zIiH2owxk^uy4N@b-v}B1-fkrqczR!D(zJu{PgTWsQPtU9#O>2{cb5I~TR!QL6`$X8 zKS*QrJf6k;qcOfhG+@;R+OOq)zX_@;a{L(m&gohohb%vy*e)Z5`oF<&n1|VjV5_hT0fU&&Xa`LT7RJAR}an#=7DAJ>|PdN zotLM7@X_aV-W}#}Y71oOo?LL;1yy*Pw|PdEl>4-c1GDK#_7!SKyHLB}ioyshCCva~ z&nAc1@$TDkr_RdnzTtDXDNmk1;fzw;Gx^%pY~N9yni3V(N&7kqPssQ34!dy=@4i9zwj)zj z|Bmstp6p9wCEc^rA@!4?!humDdCTq9uPIMX=|+$|vSfC(=M-ct;U9NC^>-0mjoXlZ zg<Oythd%sg%Eq$dcoS9){-6)5)DQGwX=3WWAZPTI4Xku++IwUW4JWUJQ=*EKNMaK+sY1yV4 zN$#E7#%PsJJ}(PKQ;8F7)r{ns?<^OYNN=k<_HZ?!6eH)p>*dw-^2bcZ$bF($>-ia$ z9@NauuCf(K2B@rld!BPdxoQAgG~#3(;y6#l;z{OGU-O;6n;Zs~0y4|oLvMhg&W!t)m{VZ7R>-?wN2bXE~W}2g*^u+Q1Y!gK%cO7e6whtPPVnY8q zO1y^scel+hVqhS;ZDc{WO)Xz-@IO2YCT1A8E4qkG42#!52RQBCAP&+7Pzp ziSmtXKhm#$&NYgMG)? zzg*cK12{!d05DQ`7#v^}?BH30-ax2+QC6mPUn&FO6f;AA0|V~<7cfBS4={iL@?K|^ z8{bxC=OHU~tG-7laq#C|aETac0^aMNtM9>8f_5UbAlxdjSdcl z%|g7@Lrs^rHnH^M_xU6J7)|T>BrO&4=Ds!wH)s|~d8|rnjzROHC%RvPpUy@VnippI zC%l_?1NW@D(^h%9;X&8GkR8~$LYmD zpW)`C;&&&8+TG8PHBDFBth7szmRTq&h{FsuXC7484xv1HH z8XBDc%76(>5r4a6{#WB}ik$qrH@?`QXR{o2J8y})#1X38{j~{ob`y)2!oAQq9MESY zz#HVStF&mrAApIPh-HpYi%!^-DCdtI>@Mt$#7-fNk@I6mT;NZehcEG!H@?5#_pCyC ze07V_vD^*$8~>YtRdN2L`*A>HWQHKD(s&I8gpkIV*IA~OkBs(SF6v!O+xlD$)QIJ7 z2vN@teEK}z-OJf%1Z&1Ypx*olo4ws2P15JmCf$93vd!2SS3FVmgQXMlrtdjTnS0h+ zAh0omcEtI6XpqU0fWlqJbpjzFQ(s6+aIVx_NFLhh7fWm>=*D4+Q8_X<@*rya&;hWG zwm7UA`Zc83-;d`qKh?Gq?v@i66Ww^nijK$G#OJ)?>u1zD$ZUtpGiVZ;8_WDsH~N>? zo+~3|-RN7L^2J}R4Y6~~wWPtyF{0TigYppd>;!7WN&;_?b}912&iXWwR<$I3#!Fz(k5*=$ruKcZ&6?Ac-wcmbyPn1fe38iLtG*_4&V}5eRGk% zFXbBe0dU|;t0*ry@aw5uYncvf`>qOsUmBYmQ1;GTc)+>_n`9DEJSM4r?`4R#CR=Z^j zg9y)*_rw)hQr4ruu1BUKJ$+~3-aoD@os6-CIs9Tm0;F4n!b^}_8We)sh}=^ zcBM^l%0mW*7#oEv&`(lIxs;N~W?^JLB4BPrhnCod8sVTTh>5&0dPjE8JrQf|SlhmD z02P1yu^t=@VF(kAO(MRQNTN+-S2CG*ib zx5m!b;_6~vtW!^@a8Ibjjseu96>56*NQ+z6^Hq-WPs4b{)gkN(U573J8V);WdBtCD zoqvbj_hLw$+AbpcvEa%iakJMw7G#r>=y$${y7`Zy2(sX*zKaP@r z<<%7A{o8}(Z(i;k$jhxIZ4n?9Rjj>~!f-COFY>i$_>t_<&2PTewWt6+; zod=n#zW2!2H0m@=--)_PMRGll{v*Yuxk|sBD)meC(8Iw1bN<(tW^SxZVCI(ko0)rE z|9gtP11&uT8)W7tdGU8M_wy`sy*Ta@4{?jt0&>fSTu5KPeDlQB_{mBW;rLgTlL=!2Zy^>ZUVxGGYRvpe!5 zcO(hq>{bTOZcY_MYj;ojodg+E&uep=nc)_a@#i|qD zCwI{v8Ni$^=-a1ZV)kv7pI2SQR$0a9$Wq6Ds8$*J4MwU{gq>P*JXnuiNpQVMxBVXjUx+4~4ex@LX60^u{H_x3v z$DQUW5!xk1;kz@kbydW~v4|#()yVGR?Wkkz6;H38e~Nwza{eoOrJ%sy7YR$CS0G5t zpt^qr^{N=2@r}KbEK6x@Vqr+k>^(oD=Z%!zEl99PKxPVgj(~qqQXbF5vNsZkQvzTa zd+h8h=VP@mwNDR{uojy1nxDs^pxHX{ejg@^97cUt$?xAwsf2`wL^RJv$bjUAdadkY zcPq}gNs+W2tL4r^HC*ZLr29lNFGw0+iEKDhR6j_U51O};EyqsV(^g5Md4kb>JyUU| zPk}lVAy^z>blPAlkdMQg7rRH{F|4p5hxRtnphVIG={BG@EY?pTVEqFD-V z7w?rGjk}TD=sQ6DV~Vv!6h(z^6Ph?0a#C zcaO`&cDujaABBNbp_L2w!W)4rhM zSf%e3c+7-Y#6+9CKyqv|F6 z!-VjCpa>j-e>|`Qazz6|t{^6e*Mx9o^S^Or5d4EX4Rg&O(bsMMpmAg$E*QMYzFPvz z%r+Rk+$7X=4={dJi}`ljuAYwYuN)Fr3dZr*}l}!+-@*C4JxW<9I)Q zdL!9*cBxw0N#s*>fWgWIADZi61O(Z^x7i~(iUt|JXIihAOe+;~;mH{&yX#hNmQyml zVENMd;9i`O_OF*)yc#3TL@%@3+ySxLl z!Ial6%BG~KR*STbk~y_&H2wAFco@we1=hs$&7o&Ihkq;$CjmhB*aSxNWwdPSfS#!h z+DH~lne+kT%rE-`Mx=c9gESE=H|90!{b>^d%HvVqvBut)CJR_ z`=hs%bGI0n+kR`}=f{rR{X*wIZ>bkHl*9r4HZ9X+^Hj$HWKGa86>Q3AH%jnczVY?kF|?0U=7t)F@m9A(U>epfczE$Na?ZCfmfmOSe$6WO-{(QBPi zYCoL$nEFw)8uuB|;WW>Qc4Dz!d2~`RHrDt_^{VQ;W9GF&ZJPdCeUIRPQZ%OP6RVip%Fh{iVHb1{mV8v z>=}_+JAZ8FaAEuE{P2>nT$%P?eui^bWa!@ESPt$TxWLaayFpn9OW=*gjC>TELmiYN z9>5jS$P?08Hfiyfq`7ZHDFY-;F@&Uv1->^1?~#mSJ{#BmayxOJB$}_nw7WB{bPUO?F8bXm!fHb@djR+Ro$NMwZo|kag(5N$2JBl}e+bKeDHNB4V<;z=3PoIGVTrr>&zY09s=QeP(;>cv z^e0((X8nWq_uMBFtu;Ic(LT4f>NW|zKYO3O=2yskF9Eqh&g8586K zCt4MDd}2hLTFjgeE z#%R-vrzjN1`?!S04nFB?hvX)Kkh?)UH_)Q%*5*(v0k)=%tmcfo7;raSEoBUZKIy`$ zw?g50-ANN6Y39P~N~$w^=jfh~eyA^Bi< z)K)T$Whzb4#Z>z@sSk!i+bCW)L72;IpLezs5KXI2&^R)3p8we8>K4g%s;@Mu*VdbBVn-`9tXTll?bb)8WLxXD-L0_(#2gIcG{&q@E+!(k;UKaB--T8#5IMfUA zOlak6kC}SX^H^RnfAt$1 zgPC6psN^zlM?i%$_B#w3`W6Yja)B`lT|N$1{9iv&jzO>ovE@mt?U2#>X2dPjSyz6AokbvV^tKf=yKrGj{AAuYFAR(L!P4OvzA_d;}k=x z;^wdV$5mr?Wox3s+VHE5eDdR8Vrp>543c=Q+*wo~U3Z0b$a6-%S^1Pwv!_aev>BXww>R#G@oo;=pFV$K7?Tw;r9$B*r-iJ@mXg+sOjSy*67)9~jNjw6}0d8&) zrMDxP1`_MHS=_>j*!1#D*n9A%6dM98=b4sUR1-z!DH4%eR-gMxr3PAT;qlbJ3OvJg zz7E=XvF5;sbPMllCizrUrbu{ZGKzUBImm>UI$e((Tykqt{g`k5wxwHcoKvOXW4UZ% zdIn$rCwTrnrWI>3G7R-HITs{C4BunzDH`gejLn9#1Bn5bDqp zS#CsG_LKD>vWY+~&GN&B_0FEl=5)_=(i4gwc2Z2`D`RdQ?rb2<39n!8XDpdifTCQ_ zgR3jE(KLHJhPfCryqLc!shQ-~xhfupy&_u{=S)5!_IIb9B|4|(?&6&?p!X3?o_^-E zvM?^OEp#Kv^BAjJKJFi7O0Iuth5R3F0YtYh9~TM{F34WkH`dq+O7-2DU6zI(v5!hA zo}JMD+LGgTSi7U>g)GArOB|GbI1m%)@>J%^1rdI@r{sF=_NcgfgBRshW-0R9wfRq(p+SV8VKQ$Wyo9G_7Zj*RqfcnOr8tC7(+=>c3?C!Smj6%#t4~ z!K(g4+s=!9x1{R_%}kb8?xHIkNj2Fom4^qFiv@mA5IyJC>s65{etG^RS4V63^x7jM z&6Q@Gj3wja0gtN@H!|m}@9x|}zs@_i8UQzLAPFY%hi78N2nP(5NCiVx5-m_qZ$Z1{ zL|gRP_VbbeAtfoc_q7fy&!F;d4;F3|T_d{{U^glbb+~huf36z#NkT^t>gjEN=?#n4 zOfg8>SqDA6E%sxE;js$sEK&2m&&hYvTt6BCb)k}TLRR-H7#qH?<@t`e6ap3_ZMD)M zW+@p!e8kc0E82!V-tp;uzvtbH6C0Wf>l#tHE4b*yUP!RnC00z+F$xv+j)9`yTen`n zSP-~@QKGoR>wsSw_b?KvTickmd+&)(ZWNV2N(m`cR0WkucXs)!Acfx4l zIv@+a0EmwUDr-)maw82Zi-cLZz(s|wl#)ch*H2VpFwSn}c?_j6pDe52mxXP!xjHD+l#(?$ZItTOD#k!Wy&Lq_xUOAt9 z*|hjsvj@@o8VvpMj0^ROHH?)M*G|VAT@y7{jY6DC%Irs-o=VVgCtN$txE=~O4#Rgh z?R)orKx)Q9j8Eu5@gpJ75L9)l`P%3(!(mko6mH!V81^Mnw>CS6rsON1KjjO+Ud$ix zd8LeQGpn3F_ycC=PwqHmjkyN(^BOGh_n;0*;v5=t)Y7g|Ns+X_fs-sFuTcT^*SJ9w zrUCl1KAetl;HkbU%qZ|^p!$kKK!Wz&cfq_mjyATfBKAy0wjzpB;dUt3ZrQ-&eWBxs1YYbVL6|-qMIKdp#`Asq}=}(wWbcuq8oF=3mD`TFXWVZ65W-`U2;H&qx9*72;@S*aX1;-z z8J8DTVW+JdP^eSkYj<5T6zVjWmg4I~ggU`wkc1{fTJma7U@~<9(KGUt%TT8x2z7Q% z!2dHDB*A2Wn4=g2U@~mn#X=ARA48KtLkdiWI_TJLAoTo^N&`kG59G- zb)14XP}4Asvp+9dd`Q32BUy6j!*GV1RYV!-FD-q^2A z^WO!;u`@K|xgxe#6h6rPBA9Ct^$+}(-s*CfW^m?1nEdEgF73rSlUzJ_Y^72i-n-6q zT-$a{WNw*0YU1{ml}K^vbDg{Gk67K@4+xj0qy8zFCCL5n43@lqPkdX9NmpuG~^xhzJScywF6(8|5#9dL z9-lW?YVfjFZ$Ko`hKF6&AfoPQ$!6wr0 znyFH*m;F;vwV=aESFrBdMcd%qz1r%GRxfj`}rt{PUx31@PFO^B6221sx^d?9yT^~En)qN-dsYf5kzC>7d? zNBRoxinSIYRtC;z5w47{3gcvh>z7uqIxyTRcou`T1)sH@nWA|^m^fxFaFjjd{sO80 zfe)K&X|&n}vV;zcha4agHsy$gH-E5UyM%sxj#yojiRQ_(e zIfO}i;-l60{c_@kRoS_a+4BG4!NC`XcA4Zczr`VQc7|6gc@G;)y~KaKG4UGv;>#6AB#u@c zHbtaEWE`tqlatalSe*sJ;Q$Y1Bt4USn_`ina~5*a(VC_n$Rl5=n%chl!Q-o;C{EHIm(I*w;=qa-B&oSk}o*`B~ZL z6GSKFU%n_7+Fwqll5mF`1j z>c|vQ9eaBScf*b}ZuEuy=P+>tv+14XQ^a8c?e}21(@0|<;mH36!WKnL_Yl ztIr!Vta}Xkn7cfRUR*6dDJ+W~te)ZBm&$U7w<81HamZWy0U3LHqULFJHqTER*iGw% zU(7-Z5{n~l%P>tVN2whje-Wo7eWvj2OJ*bGt^LELj1c_E1mDa z6Lr{n+Jw|-XZUJ` zeSzI4_2Rl_=c9dfPt+frIw_Q7yT@O?HzU2_#!DYLdUjm}zBH|sHx}mI<>Ory=-qx! z%Z-Bl!eu!f`zjY%*m~ZxPT6nhn3NZXSW!N4-2XTY{;f;$Z&!#G3tE1t^ZF3QFi5Qd zlf&*>_|;}}oN;e5naKB-jZ!&fS;Kk#C2m9#1*GGT@ImGE)-%4zP;M&mpZDMCaa3CF z>{n`E#E*Fn$0m8wBBsHDzIPEPUD0($M@znwT3w{SrhyaEwX$>9UH|_-4M25+MTWV1 z6CykXHPj-)Qx7`nf3e<+3fK8v-LPWOyt1I8ba;2rpNDH;!N2S z{MVUs6%Cvz??7kD-2Zo`bV*(Ax|{}=E=gz_BsHE1NFSTBx5)>$-cKAU9NlE4cl~pw z#D&h30{=NvnwvC(^b{IQ3Xz@?qo18KqcoU?H)xSxlWJkA$q&C4HI3%>xQL^6<7h|llM&AdtwINg zpYWq>VGy1w-tzx)oJK?_&U13f0Cbx1X|y_8dE^}7muyEv@4}AVqC~MXM}4q`1KlIZ zkr5yH0Gp>}lo9^nv^OkdY5=2;;$CxfM54%?m&jWvHPt4gRnZ{D=%TPD{!OY+i3$I1 z!^cSnH-!~s%Lv$6;+2LQl8AyC=r`&oAa@gN~_#>Nmjd>pu z?BR%)KsoFSk7nl~T7{C?JXNYUh0JoPeo{NLQXq-J|0jvD@pRTONbg;+jMDds3C!@ z4f1vVLOHFdOzfM1d zd(DR1wTuQ7Dz!L48-!IBC!w)zQ_gW#=kHI{=ZBo@vuW|zsFF5P)P$%jv_pEt-z~JX zsEVW6Klo7IbCULApJh^lTWMbHZ~S$QgB4EW%kf5iY;?b4)3+~ED5?0q8Bztm)MTfb znH%v*b$jkna0uBDlEr}F_rY$NVkFU*OsqmH0nc=bXwa6;#Xk3Z>Q*(YJ$Q$v*G1~B zV+XolKEV6tZ7Fq1kev6Fb7#~%@eXJFUkYjOc;$B5R`K|?$!@j;vt0dz%hau9BInT) z&VYG@OX3aEmr;%qgyYH7SCw_~H`LRqp-ZM!K3j#P6l83O@)HU7gD#nOhK*CTco3IN z&tz)ReHDx4>nF|F`jl%^*H82pH}olA!T8s0dpO_MytgZ;+kcsNGA=Dd)+^oPHHun~ z!Qyg2M;-=xugyVG{{A){xj6V!r@ugeD{xX8RBSIYvis>p*g~Yyd&Lz?Xp4wt!Ul$J zgQaA{*&>Y#)m}pZF3Q8knIfMaUl%q3-iyNd=|#`=H)d`=->R#Iw=+afny(xNgps}2 z+)?orKJqJSZle@Dw3^m|4GUeIHd~8N#-6sl@Mdhy>M5jn+lDH%|26uakPPrZZkKL~ z$-S5P$4T+;ERg*Fvs>Jj#HrrJKSQyo_?*MvvU3F^yo}mSip)@W8j59$sZ~3<5R3*| zzYWiQ&NKUQq}0Q@kNpo|^d#wYnO1M|)q$hduYHu9^eFWF5~Wrxa>Vx&ZEd?>Mbpnc74qFuDg0! zQ~VB7Z0mQG^Db+07q-iGxhG+sQ)c|{aq~Wi<6A=JhI_rS8A4yslv9tR2nr}&Nhy?RE((=dliX@5tvC%GG<4}?hO<%eB& zI7k77JoJ;D&6jOm8`kbCd0J7I6!NeaxZ&PcbK2uyQGW=HatY0Z+U4ZEt&EGG8oT9C z4?GI*HQ-~uzt$MsVdpb6;U`rKP89I@WN9a4%-Nx}(g?$6pk0nzPB&L^BbIsU*co5Vr9}`muNf6L77!v`~rc z^(OH5oetgm!a8Wf$B@Vyel?1K3rpTdUY3}TS%jIcF6v=aqP8Z_r{2-4@>@q;OJF7p zL@i*#d3tRr&3j(1(Q5e?oy*M>QL0FIwxaj34S&GCRk!^4(Ug4q6%hxbZOyKTjpSJ@ zp+poRD#3(y<5_U1==$#Ji;Z?7?u}KP6-rK>CsTnW1kpyx?Z$BI5VX-8W%(G1%Z}?e zFn?xA*$RxMi>)K>qL7vN9KoiK^-8`dPXV92r3C}SPl5OlW+m`F5@wfOe`)U@Kd-)3! zh1WP2Maouc+Id44tw!h#j%A*`fZLv1GF>QN-cqDpz(XR@tKiS;TzRVS!i-qeVvL9~ zNI-=xO0j$7Kgth0|IQaF__ynXf+a|0U2YFhiwm?p0Prxuue>FL7Yx;Q*sd#+?1I>4 z&!1V3Jy%})A$L`tHd4yNZ7JBWhUhOO1}tfQLtXG(Gr?0RmeP|N@#2^sM(7WOkAF^( zDSEmg{YiOqOME*^@}Im9F~=Q#Gsn;AAm(@uNO^CHxV)Du!h=%Yi8*^JDw{MskS|hl zh35ganxoWHe)jdZN;VH;giI0g!w9rI5bS;mOP* zCeLnaBkwbvOi4?tthd7l$niur$n;bpuKSn#u>0MOlW)QJTrlRpa-55wYCAR;j94Fw zBVt(rzhhadHIo2|QLgBU$Z>wnKbE-ogP$45O|d+IMv{OC@{vK#ns6)HOgUZyUEK5OW-~xU}s*|Gw+CxEKua96STPoRptt&!3RcWYTjy-t2B z6L`)%+KgSYtxuY7Knjwa1w_BVwm%BE<1$v0G@}rA+}jXv$6rIyEYYDx;jfrb%$tVP ze3@Vrig|mYjOxd8zKcvzDK20BF4h(Pk?nJ*=IP)ESr6=mh#iG?+Rtf(KL@K{F1imn z)C}tth8rGqu%x@7pRM$>yd~3!6dFmTwp(vd)Sv%;Xqcbw)9`d5cx23Dc=C}Lvet(u zle9c%v03tR zK+@2dOJy0GAxEqf;#*ka?(6In#Cmh&duS8WnHHWM!V~kWvJ2ds$(7FN7M|x+BU9wt zlENDq!*w=%w1d562CK?#-r=nT>gUd2U0orV*rx)Hh=hcqH*7x$ooNV+ItlvZk#`nE(D^& zJ-?HQ?T+TVox#g4in+zl?_~_#;`}(?a{rZT`^(!Ao8Q-9mw7BuitmQ@?Y2bydQ#=2 zhLC-aKA#+)kp*B9Pd5h};A8-8$AA5femK6f_WY3zdd;SPfA9O9=;S>8Y^SxSe|G3+`R(8Gyi?;i1!&nRwat z_1(iSoMP7oX2_2TAN5qY!v^M?UkF~4lZdnoCVoZiZ65CQ2$0HIzg&~xx$_b2qhd$H z0LERY^+{P>x9X94fKVLFov>T^QJZpbuDl0}?6{r+WOblxp(+#5`aw)Urm#4svNMl& z)7U*-o@eASA?7PT(E`gzHuN|SlbDBTc_Tk&MyG6jOBkQ}gmS41GZm+(BeCk(Iqw+7_h?tAk?=bI&CdK=g*=zgLL4ivAxhP#MUR`VlKWADq~ z!}bUyz&^&SKOYpLdGq5zqVlTX*kN>L3iCi^RaOlV-oSeS>b82D=rV_}$A=}Xa(UT1raL&>J6Sx5NnhRw7}M*b(( zd3mkG;(3Y@Z~7tRC~hf#i!K81den^?>5+RN%!#4in?hRb+oct@m(Gfv&N|n9&mqdV zI7O@2SEXRC4#l|blt;aGP-%;~I9hv`P{cDKCDMz3*d07L;y*)CD{Bg3ToPHGbqD+c+ z0xQ3y3X$f!_)bOG?tI0W@ z+S8uXTtMTxwyrP0Yp-`Em(31tpPn+PbK;LPJ5Tq7^^%?*=)qPNC*|l9L|p8v5OFMW zD2_FIluw8_e*TOJMRK~bC2;C~>hnp80dwU|I&I_K0G6en?Kh=k8+Sr7r>D9wWaGw+0Nf1F)YNyB1lB$wLM5XFu`C zA599usB8=rD4J;4os%D{*8J3HdzxFG<*XsQ0#cpDd^cEy4e9GULIBvWDi;Cv8_Pw2 z{qlBJmEDygu%GVeCD<<)I({a|U1W*(`}ZV&v4p^WFA-qB?gI8BD**O0B}cy*Y1{JQ z#aEH=D*w}Noec08A;D@qY0h8E29FV~TT=N^Z|}45mhzGsig^Ac-Y_g-GNk0`yhbm6 zqaxA*fc=I6*w38hQ~nYviWf~*p*&&<8}OpZe!8+1fL$4|O| z3>h=u33gY6eu!t*gSJAdDds^n$*Is)NcIxFXCn ztw<799|WGTBEWv8PgK+~(}FP9V$uT@(Qo#D8G4e|K$!AV*>VA|%gdg2*&n=DE za5V3cLe?P~ktY)s4&$M4v&NqN8kqAJf-0uZ=rBWZ|I?@O`V9F-aI0HJ2?aks*eVaE zl9T>&sG+cRTsM~87#oF(i&sBX!dpOI&vTZy2YhrPzPJf>~w^pLYYO~g*u z;bNww^E>+-I>9z1k;oskS8Yry+TD2Dyb9G^-$v;B>wf+o@?v14y3Zj_GXmMDZW{7J zKLKGZm()=7R7@z0^^EuKGQ~*p6wfn$DNqir;JUxcmpKx!*t+rG z6_Y(5E{wiuffT-ngyhXRhD1fw+h#%4uz=T$&%Jh4#hg|0L1E#i-KX9$vFS@CU3+IY z9^NY6tqi}~6pBoi(^bX44zHuUCgt5-e`DA4npEyhnyFpcFov7X>O_V|W@%Duoo{3+ zP^4a8cYAUgz*v99REc}3U(WGy0C#k4>hx`25gcEE8Bj#^{D zx0V4?uNkzPsTn)~C{#o=cwK_*FXlACFD||0FE%Du7pq@%ukK^{iu;H^hnd*!C z2ux^)&yEZ_Wq&K}WWvZ=?KsjOP!Bp%*y?5+JHmd+41s!p{jzki8wgA&D36hAgG_t)rRByY(ciXNQ5!=XDHx>cK`6ND|IRBY$Guu>?kz6Vwc z=E_ybN)ecH0!bV3qd`F0Na6-fGzP;83>+mpRivDAzK!>ap zb$_=~@cs5!J*hN|>QyY?s^2_O5zUjIR~+?IcTQqp>dUC0w2M`gZTuXXb>c0hh~I~? zrub05h?RWGtZA|SdlAyYlW)LJktg6x_r`G74XNJ`Pa-bSVbqR&SqL>NxB;7~>$~TT zM@hhMb^PCct4-6}>8MlcYR1~Z`;WU7(lV+{MCquW2dr3$ujq1od=p*avJnkT73BK_ zo?GeSm^1PJY_>XMU6)fIvHnEf2^wkQ6*)d00jtwG0QK<1mV!o_a5U~2$o#Yp88LNC znovy;ModNk;~-myCdff+v60KoW=-{irfk^?q+eStNy!vq4X;$fxFriR3M9mX&SQGQ zQneJvQa6Y9Q0~0vouw>(BX-BUjxu34zf*Xop0WaG^P9ph7IOl+(^7w=EZ5c-fp5Sqghw zGcd|>OryR_yJ(~(s+ACIT~T0??MLpI3|7V((`9PXQ-*bmYsvuECG!VhtMH#rNuaN^ z5oyTwg94ux?$HhZI1&Dp?UIv&^Y6+=ST6?-fOnmun>KQLJorojM#5;&1P=PhSM8|+ z5cuZy;8E=1seCNKtX8RfYZRnw79uRGSCsz>eA^#>x7<8B=Bun7&K}%EY#4CY$B?~h z#A&WlwQ@G|(q08^7>7tx)+f#fUeJbN>hpWUfK?F%ajdrqQf_SIQ{Z4#Cp6tZ0 z{$j*0h9Y0@*@xqF(l3;xLZ0jptHq*6xUQMyGK@zNz4lAMlkG$doR{xEJ-2~vOBMi6 z_5_^n(vz(XJlV*%UhA|AwBfu?s5jGATeIMjM@psc)=XYbsn8IX^h0>ETY)G0dSQp3 z(WLZIO1DuzZ2$Qj(+F~n3o8MENTU`T~>*tX$1*CF~icq>S{Y>ACPWe>N<maodkH^=RUYNhTATV6!PV|o8 z;9%>+I$_yS_SmW6h_~FN^}h3;@rP(WNqo5*v{xBVGcM2&sw(2E3T+ixDWxg+ijp`s zNlsqz_da6B;zpQCF~@s{$Ir;ENu=m4PA(N1e zwE%^WXx7>1^Uq2abqi+T?qc*W;ng*~R}GQd_DnLw zbNSxyc5tD{C38VX>=iVYkRIiVY~hi)^FHeaqeag2c|UunS%Bt0jS#+n<VoyoTg2 zX_QTGuD8?Xtg!6Difi)XKBC~dHx3a9rA{6jj{j0y4GOORl+V0rnpCOI>KRg*qj- z=RZSv&~C;ajR*5hQAeh)+q+NgnW4ri!`%ia{naSS=yRUhk4kU}XKm1AD}!s>eMhOf z%PM|n_KFTthrN*DlXiS=_O@dv5Gw0ITEKkZCQ^nIS+x^m&AIZG!G2H37|M)Kc0FE% ztXVn=dy|k zHC$U>He6eY;B;qI*LP&$o{Tz?D@D|R&Z>e`u5Rqh&Z<9`)tc|#QmbP!kTxo_it-3( zqcX!*8OPtY!|eirHhP+)Brp8_N3VPBz{>KY97iF?s*#h7*+wCac?EeL|6iPFpG;C# zl#}YKxC6(_9q#dK+`6`jd@K<#TF|OR;+-!hMsY1;Ah!P_!TqF+^Qu)NbbUp8O_T2f z0zvpoO1Yss&SPgUyjjC|BcIi^@m<#@Me1b65a9V_Vt%aUn;)8ZoN@5Z`!OtnZ;ii{ zFo8Z9&ZcM4_TomkI=uz>nd)!TET_&41Pt*fvn~mL=_*;khk*Zte)M)7UXs~vXZ~zJocQ(b#}r4C+HybD*WnalRO)80R^5e4vg{{n?0me=**h|`aK6Il=OS?O#>EQ&BG#T74 zmt`nETDpcZE!dslS7X?ae2MBxyRrJ9HB8J1uWwZJ2TP-9K}kE6ua-(*lMs*xf(J_Y z_BkQt>T~ncnk=D-|b*|)FKm_n-q{jvB8|r^@vDvX;xz<`5FCC zqN}k~)ELwm;|UWHM7?3k3k1Z-cGAlaWA97DnjwQmIo-Cv9Vit%n zZR)!PXq%gHs)ew84V(e)zz~=_kOi4R^sc=pVpC69_6LV5M3NUP#_|F8mos&qZhD@E zvi2-_Bp%_$YuL30+_kC+TeEsoa6?Bc`lU6CQQpeqTM5PQw<615jD5>|=+nDg9cY(} zHTrs1fK9W>j2ubNuCZxXV8uAYNZn`evq3V&hu1dV8g$2^Y79ur?;<=6yCt&RmloL9 z6Xx)7M5j~p2@uv_NcN%DMX+|Ah@@?oj}j*F1`Eap8?FwD3X``8^q=H@dn~A+5r9ATUI?e}_Zl=}B}DEL<5gadhO2Fi|zTSjsz=a1=n->dNW zHS#uG1*z~m>Q#Q`SZH3gZ4)PN8@#R?GvToH3$yzoCidekNzjps(={i(F}l;Ao}}L3 z<<+M@mh9K)vi@9^4$FYNlSr6~*UKn{KIv;K(d{YG$^N|<2h)+tXosgP-CAQ(Jk1`W z__+@-d9nqh6Qso82F<4M@eYCzxK~<>6cwCKJKF2jJGhs9GMa+=Ft&|`bqqGH#CNg8 z70#qVwGwPlD_H>L(_tNj$vlwfc*!BKYW%1O^w*(UiQT3?38p?t;6Y;wo~ot47038# z%gFg_s~9H%x4qpwpr|^7g#$p1_wmz`jq2@ ziR&Hvw980O4MVcgux`>#YSu>T7<{`H##+$AWm#Bbk<VNJ3?D72YeY=LMUp2p{Qb zxtSZd+MaRZ$eq>xtZD0?us-4DJ}-Mnc1C%T8t=bMjdz07xb^^yWyPtt!XeM`<7UL$-tW5)#T82)K zWrWzWRXKoZ+Al6HGBDFq26l|pvmzNV<{r=J7W-Zc0c>uvl6jvm%wpT;U)qTg{9B^e zA@_#Mjnn7V5naH&@mU}_fK=p?&CN6yjaz;tYNhaNIsoI*=~j_fVa}ypWWEYO=Bupn zScf??LW13iQx$rem>Vt5&)Ew)Kxf-}*waL=TMF2TeUn5@adwKoKW5+@r~N@lvQ>_6 zJj92%A|G6weJv`uSxVJX3EQ-C-emL=XQPm~E8J&-_C*R%_Dz+9S&bNn3_4?P|K2E2epbT~e5@{)Oib%l){#5>VBw? zA^Pb+$1I$}oa*xyc>095k2vaPzrK4;+Wt{VJg=N5r=0yg(%Z0UMjNE1@4I>1NG`1I z&sNE67sUMTx;rSJ)o!URVEfcp_~&jQb;=o@tc#ODN%H9@nzpa`0KL1|q1Okg7m1NE z-s*!tWvM7hWhM7~?fN5<<*Gozb(VnCnXzg2n)RD}no0P4W1@`as3|#YspN`IjEKfR zy4}Z~2tJdSQb6^pFhH%_l#0JL-p-a(aGO!Fq%VMV(}#2?V_GYd`N$#|+kr;m@m(kK zUtW0*4)G?Qgqq;w-Lhr-*TgW$NQIo_8HddHtsR}aC_%Z6oUH@!TXjR ze#+a zzgU<)=L2SQXkj`LP4?G?>2uImFQngxl~SjCslw;#e;!oQk19x)p~-Tpw61gKx^`Xc zOL@M}tRD=LUY=iUF3vALAPaWyR~C%faTL$71^#u^mg6_IV%-jrj(Q$>A0Iqnpf=B^ zQhLM#2#4cqm?ptyL%L)^;OzlucuI%maxfZRP2$CFL=4tS6+g;y%N+UV`Niq=w^!e} za+$?Dsh@|nSPN|tZ>2gD*o1c(S3MXPbJMqXWkCgM^Kvrk+twLnIYU@8hg{D~{f9pJ zx_0wWeK@(j_?Qca6~T}yi>mO;2kFj-;}W?r8lJ=j4X-I5SzOR72MU9I9hRv2qyW+I zZVR%qsnN3Xe#ct5)4b%d`_{L7Qy|B~H+pK|Lq zqv&1s6!7-ArSzC*%nPGvmo-C_`ei>%Z7u<+&1F}MiwsKWqk0|A+{&+*nZ@Jz=fQtG zv@GXKAzmH&Oj>LbIxm_@G#EPsdZ~A62mHEFCsk4A-5#X%wa6^Z4`Dnf8`N3qQQIh{ zKQ!*&{ee)fQv9CPXp`RrG|+@6H2GH@^*Xfm8Y&t)n!b%V#RlGXQ+)lY%E%{>ulPml zdp4oa4>8}$M`g;P+PaojQ>O{njt9vO+KlKgT-Mh6pYc(`YU>Cl51}GE1iz~bM7*f2rx1R$MS)dQ)v@d* z?TDApI>u&+%m%C1+V@;>W_>L&tc4wIs%nSsGruB=Eaw=dQA^aMM`T|_WgkZ|SGmPe zyP_OOJL;fZs&lw5>@&E21OjL5rl=>64}6X4!Px}I7ZlRF->@hZ_|XolV3~1D`%BP2 zn7Yvm`l*f}EtOm>edfz-niRDXzRcw>j(3PG|6}Q%u-BR4ji+C>_YyM4ZdteN;fXPb zWRZvGGspRBOeWAi@17gHd;iJs8+<|UeIL5bS~4}{{7G7hw%K!*_p=lh+>R^`SG7LX za|P#G33$?$U@~^Yuza>TgJ{wxhi9p$Vf%XV#Fe5i}{EDZ~6$y{gcN=)K z&qBi(H^1IJug-Fs+G)28xpDvVl}Ch6WTfadP51-am48Rdr~G+N83qf&DMhbU@U;TLd=v#7VeB0-oj3QN93Q>&S^bu*9LQ?* zMPrS8-*qm|W?8}e8-@H7hb4&^LrVEr@XKgP-l=4bS-Fa0(q!RsQq4+@2~FNuPX zhp-M+F^ZG=3+ixUGS(lu&u5uiGqeS6TUW1upt0XTfF`F?t|;`eD` zUN;(n`X6eqj4Haj^sP9KFPhA2NqgtD&oO`>&Mu zlO<@5yS=^9oRPsJBa1g3Gdyp66Q3F5akN5`JDT+t{49?^r=$P|R7#VMkS>R_MowZa zbq*r;Ay&0y(I1dt7r=lFARaN?Uc^u|jE*S47Ht-yc28i>#u!zFX}gYV!!aL{lHVyc zA-^-(rx{}ur9_@8yN)5BskE4dKNCuwaLZGIBo5z0!UY$@!C50z>-BrBK*^2qQtu)b zI5IMA($ZNeE0nhQJW?y3n_NrR7$8=bL(u02h>Az|LxTO8A5i`@z=w@uhdG2c(&4|h zL<>Er4JAEGByTxCiG5A3=}9v?xg-_yA}T!iHF*u3enxStj;0bxzQ#eXHBJjM>a*}p zH=Q1(PbXT{pHGa$4fiHeRCi?GB#;t#3K;&pr=X^xm0bOOV=8T3KCNo>UuVPrUt+Y( zoJtI<;}oRGVRB)Q+FB2@+Mzli7nYQ_oD5a}&FK;7&brQ-SH z0n`m?IN{S51Kr8VYP!SkIM__`+K6vzYV6J!7W>|bgOot=?e=;=`4^vf@!4SkQ~ohP z=`U@d1Tyv%CE`Vm^k-w zO!ea_)*F~mf9%j-12CFaR&2)}ml#bm<52YHnHVvblVO~%_+S*83~>wa z!Rm*$+K)_VQi;TBLmtB|SY?0MsT2z1GjThju?}bZa!QLc5^K`r%|`K7*FoVCMzw8o zz($*Sq*n4P#ja|Mw|M4=55;-y$IjUW`TCdA&}C2QAa!n%!<;8 zAthd_1H)$yCGd?_JEcuDu+gkaf#_&y3#R4v6?O|ac1Qxkt$Nf;Vkv}``gQC%0z1?) zp(wAmMH+=1!$_q=*rOM`JR`~dS{ObvaMDm^rRYTN*`4((hNVxt>6z+-KP~?x&z@{E_w%?($vYI?S`5UJ=@Y_f_6Gq)qAJ;0;L%_v){`6OVejC}VN%HJ!Ap zgX3frX+gT{^NlsHt;y#DJ;Hu}bwIJ3m|e9mt0o=$bDMSS zk8b;(J9I#~G=!3nPadszkkyeOU3A+Yiry5h!PiZ1FU(m79~wMPsp3fY!(jCO?>3KJ z{kv(rX@4SRo{GPI+JUaxq0x$xXKfbFbHAv2;l=8gk7GfD)bpwD>J~EJF{}>;rMqn2 z%xBmo7KGAEG4W2}phFHWslCYo;k& z7{n&71B2MXXV6URbICwlZn_%4=5+I)&9qpbqCdvPqAXNyAJ+ioc5nC} zw3LKkTwD(rtoc=EeFesai&0Z9ct~vgen=>&Y;<$=iAw-57UU2!Elh!iMFAz~~D(P~S! zxr`oUP{21SA-lfavI{-thhI^MRZ}bN52wThtyagpnVU54f6nf)WfhLgc$#!5@P$C7 z*6&cWz3Z~sPDpKNHXL6BHQUpMPX>u0s^*{&{%TL@KA>snfg!;{3Wh{Xjgvy$Ygne(gpiYd;;xA`z^Z7TdDXUvJ}?nEMi~_b1!M{W$D`aS zEND}KG=&wQ<#~No)8N|xngi7YoP{`rRxQ!&!Q34xqPZK&tY_RasMgi%=^|$xrCztw zI!P?zaB>s+O0VJs5|#CecX*sofAv?Zq#8svHF)59#dH?aGk)ajn+o>9XJ+iR3yDoQ zraU)IKc5VNrkcb=c&-O}ryQF%8MX=3RJ->1s24YTibP#*vw_gQfiP|sM)F60?htv( zx$(;K+ah~OPE3hVfXqn{-wN_tuc}x=xC{})sKas$RX0^9=i6NCPPy5M)fo7aE}K9Z z!JwfUO~bE3k!oC10KnOpkyG@b3L_%bo00z%NjyA6;a^9^e~g6w{oLA?OUQ{e)}?%a zWZ9}X7w)Yh9CgdsPHr&35SyGmT0cb5jbG8tBl?qPbg+mhO-X-11!=AVCYdjczq{~6 z_z=F}oHG6_Y^Cq#nVre_i3sf6y6O)*x88?*!lY-K@V}=8BKhQe%_=|4Cw%Gp5OK$X zTpwBSRyC@Qz$Yv%PZvJY=BoV1xs@OVBl)KMn0a$~hYk1CD~*a@=T?`CbE^%JNS7kf z*f>vMy3=MT-&$t%w7?fZKC$fNkA!&WK7ha5#hc#02C67py5+tc#bczMHnJ{OyFtHt ztS4m;wW032#jhSK0n}qPUMg_381KLAvA&JCcw8|5b*FiGZaue#y6=Wi_xr8iEuBac-2Mpmmlb5CQ(K-35Pl@t-6N$Po0KgwgW0 zRhX|xZy&rZ{y=nNg(CJTmUIHh4Fg9%yT1y>n1R&i&2Y`$g2$1oh z(xt84lT7@9Xqk1`O1ssOl;(=Lvisbm;dk~_?1(cHU-gM+cQ6mB5$Ycr%C9mAduNC~ z^QnYQvrI7Q;y*#?JR+YDN@w(xs1+`4FmWrTZ3&n zP7edI_ph+6V+!h??JX0WbqbF!+!41h?p0@46wPN@T{~!s^gcnG-*`Q7Hn}plsQGPq<_zt60!grzSzz9*=eU%-KY+m%z@8nsT z*8&2KBo1{OzNkBE%qJ{wN%3m|k5EJ3Q^~pdPM3#JZG|7S+@RV@BdoR(ddA`&8I&VX zUnuZi3NEsPI-1uwaf)@W{+cF2%S%!wiFRtkxR$L)TO`YR908!V^1xK%T_pcueIdc? zpAt7+NkMI;rEI+iYi_qp)M2`S@m3my==5Vr<6e5x7aS2#*^yv&@1ur|OR$Q+{bGq) ziXyDGVm5?uo1(?uFt8x_8FFZzqw<%EMqCuEfY+b=J}KCLk?|tLAYc<_HD**|F%~|J z3hcX=^pw8M3U^Av%~Y&EkG?T~T02xX7^pC1*W#Ww~0DgNjOMg zwH0tTFFw(#GJcKE--VR0K9^kGFfJ>}=NQg`*d%8q?|kf;l3B$t9Qo;M#@KbCxw|Ai zQ{Q~;j(<>o3G$9ob)bPKs&n8SKY3`D=j>hP_%xDqBYjKKfGt)20hh(8*2hyL)JNvq zQjaS+Rg@83QS-;smMYU()~7`|vLse37u9_}&#ZiZ_JuDty66RU<%3kUXrp5Z*5$yy z{nuG`)Xz~Cdj(XYXWk+R5x9@B6&D?1>(FUl;a_fmgFG<6r#T+pwim7p zOQgDqH|Y*Ho;38frI|MyFl6xv?w`$|3&_V^5!b!Peg#Fn)V1KN<_kY|!rdW<xlS0*eh*`Cs({@U$c+nS~#2$v5-sqRE4fhqHEt+N8zU$MfPCpy{>m} z31bwwQ(bA(i%7K#?3zYe_CY@v*Mpc^qp`YXkn3IV)UANlyD>i7;BhN6t#CB41&VHDX!NvCvt+f3#=5s}qog(8Yn#r6=(I2Z0PM7y- zH3qJ#niK2o6*VwlNP#mO%ol?2A&b3Yrsl#Ia^D~43LiYe=vm3JSjr4Jy5TE*oKJUr zDHnt4t}90D?cTy12@uO8HlEg1T_Yd(pDWP!*{AZNMR;c#_7&p>`&4!Tjv2|#5Qs

IgnQ{yva6A?uihL}fC{3Yzn}|{Lu1Mc_6t! zKXrs96|jrhqIAy&COL(_vU!@w3tuf-bPww;7EGPTM+brGvYw9J?c<;D=8 zg#5;fGmVNVwraVOTbwe!Tbc7sVrLgKCSC2=3dC6x%_o1pE9Zt8KLyJoH82Le0`*l( zkA*Lu38*d6R%k0ov=Eh<8f&XosP^n<8$(psgz5tv21xy4hj(V~E9RTutqgCj6Ib%m z&{R8;)`F_`*XmX-B6Uf<BhUYq4xYw!zI;qCPM?(HI40)iV+r@?5`o}^%r&`HkK@&0b3URsoS?WIulU^h(OcT0Wx#dGT@xlCH};qj zjJrl4_Yw(IkV>9_3SzE44hVYYH;fs4b_@k_^m_M&Mu(`|6s~uB_nA^>3zg=&uKU)) zE=ZT6@90aQYKMuCGGSCn3`;Bh+xTUZoP4I26vR;XOazPCvUqX)T@HckT=Z;Nl{#?M zK?~YM{c4K6@FQlc+HWI_7Qbq0ynSX1vQ|6oudaZ~jfNkv;=KWL3enQCHGvaru>sd~ zD*>g2d0N^rh&$D`5JAw#%oW!68mHZ%wiw6AgmXI4wM>jOl0_u8_MM6)65>gDwzQr0 zzrmq*Mr3QmHrhcCM((E`lL6Ev4zPyGaF+~{%HXomz*wUU9&e2q{Ce~mb4efxjRjPV zFs(z(r1S^bo@O^uh)#Gaivop+LPdjTa*ZvTsfnv}Y(8zbR5h}qD$-vV&hX{~cD4HH z#-z-EkqgdH1nF`NmLHwjwbL&;o(_4(kqV@X_)69S^M&K+v+A$P!}|#lT?o_^0i3Ff)Y3IitEExl2os$^U8HpKbi^mY zwn-PEv6`uM;)(ibGBa6va2dwl(DZEB4{DY?u3Q0R$;@*I#n-A9_5gn1>Dzb0+r{rbNxZKfhFDITiK%V$(F$ z%b!Y>awPg}-Y1m`lYxOO-9-6L8m(bB5Zb~zapQTbQ}tkHr-O>Q4K>m1RGRXx48}@Y zXhF}`{!00?ms6`W^on>bNCY*{zd0F`c%=#3A12FqL>YA^UcY^@3dUTCM?^9F9sTvz zVd6JJW6Sd@g$LbCB!)Y`=2 zB$%Rxv<-NGhU!N;1SoKM!LD9X%)>S-_ZV>}SGa@C`uk-1%#}$t`54`sDI;0$5S_Ld zk|5?p*=mu{^f|rQ;gIJ9sZHXc`g2#*g^YP(WAFN($D!p459zXjiPcKW$EtmkXOrZX zQ3sc;mL9`XA5>-)0@l_np@U)7h0E(;vE%E2KEDO@dD2e!Pg>+MgNEgAcb7D22v@@jJ=M=Fxn)e^ z)R(PKQXX3X5`xy=q<`{!LD^C!1AX(b7vruV>bC^wz_h`R+SCi#2?t83 z*;_0y+mi?|9xOzI5zOqdqQ)>}%b!3}`iOPW_XNA7y&~{(R7TCc_PSW9<{F?uO&J}x z@>QxXx?mWycgI17n7zs9A<^F3cuMkg!OS3GNmRJpbWIjiM=M5kP)QO+P57?A<|iSx zsiklWp{tPTi42*1;WZm!r<^pKL0obVQ!ZkepC>KmmOvXi_ds&Okf@_^x$p`%R9})<|(GOUAjK(ajUaY4k1$QI#iZy<%55eXL-w#@RJD4`E4-z^j>}m+L8%cvtk0rYnT=NYyhZ;wi2)ujigWrLleNBY_C=V>g0t;bhdf(E6>-knh%8_j~bg-2L)PJW4m=ib`S+F zcq~P1v|qU|wbG_vjgk1K8e@K+wsFD}LEyVan#ST_PY^- ziFd+LFSNo@M=u1R&&*XU))N@^x6KZ{4Y8FJUgUtR*&VyPz`u0%p(wN$H9K!XD1q>( zvlHEow;;PJnNH3K%b#2=7mmxuvz1CByCR-O&~mpn*_-8n%qqJlDW%4-P?F2i5D5uH zlSUs8z>-ClX5$qRK1&1MA_ZdEh*A|hSKWzsC3h-SBjjY?bsXSfSl>ZsayTjjH=abm zjpwIva7)LFl1Z`yne2TIESYnb(4d~8-&cp=&HdB;)(O7hV5m2F&q*=wj|tK>bJvh% z(8mL@!eNS_(7G*!Q#zHHdMesI*xIxGG;iUBZBMDQ|nC9&mc=fTQMG16c?&h3qpX>OxGSKp1X0U`*=!aR? zEKyV2w9?O%NmY10ZHBwG(z8{uC=cF;HwpQv*79vZDW;!c%0^4C0flO`^sae3)Kc_Q zrNJ&i+VV7umHDxKIE(}qFs#1)yp)~($GhQfxW-bDulr@n+qM(AwvN|uaXjT{ZV$Rn z6)@!nv8x{M3mX`G)ci^bK2UF$JufVUyxm=x=w$kih zy=tYgeEd?EHbYfaRn{8q+IkRB{^d}kX>>_+G_Gw{mgPd!YS-p^qG_?|`0Hf-S5+!G zuXGIkg7qY!+nvrd#FtK@trzDST}&uv=P$63lc}?Tk&~1CzX|8>{o;SpI&1(@>Zu`!n4ge4 zcGiFO(E3Lle*??@3zlAg095Qx=2^d5d&{6Yx~*N5Ai;w>!QI!wgS%^R z_uvp*f(8#3ENF0dcL?rIa0wRN-NNnUW#4b_{eHFYtvX-TsdIi%^qSps%rSd)kM8-b z@r1g(q)^72>bI zbQbI?13t0Ny!Hbqfo%lewukI|eD3y%nVzzUf(J@rBU<%JKezeC=x|BDXA5o}A4~UX zsnPeo-`ZUye%$)<#H(}-Y43+xCBxP=rU0w6;B)iq*7Fd(a0rcgg<40q`|ByXWqG>_ z7cSg8`-)v8c|~aJJ#YJ!t0Ap?PMoSw%@22*gGz^q1P)yGIGw`pGo2W;NEm|Sj1Dw9 zuOCHQ-$Lw(6bOV5T*$L<1TKNLc?~;WzO(5&5!*i`6g+zk^LCqK<_5eH+NH14yPFj} zUP)+q{6X|xOK{|R%x>DNtZJM1o$Do^j{1D^%+FP?<#yrVOKY7KaMc^q!PJA(7?ClE zN1@E{k#Q~cfy}QX6O9MGS1AbFOmN6JVF{V;*tQGJK6Z&)W4;XP5{>oWE(@V%`go*t zP{ppjbZJW5v)((E%Iu8vMK#|Tk+tF2exB1Ha^}n7^bbVyv?MvC%cg@mRxS@zHI85# zwUq}$`;M!s`(Y&4^{B0HuRFxrnt(r1MzS+in&(zCP16i zFiZxPEJA&yRJ#^YI!fNXothGe7FucZxx3PB&~SBsVs%j167YmSlsi59jp>D-jwUMp za&vzgqt0qFx2Y11JbrSyjnoPc_4Rr8z=LPp&N-Lcb{~9g1G&G2M7zPY($pYl!uRSF z`{@-IVL0ht%!}4aRs^yzCAipd;Y2gciVWO9mI0ao3vp654gq-|j0FEhpk;(606W~B z=p7dQcqghgdI>m1lVZ$JW4Ib#(`7ifk|9~!;I@}z2;DI`kn)6$*cjW)ycd3o^0eD| zoUfS`agHP@kYs=%fY$8AK2|kq0z|hOUz@$Z7ThInWbD9+{5=aDhr-;f`#&(U}}JuoU*AYk=C4Se;a*(Bu}TZ09UQT_?Wj=cnDch#T;1 z9N*sB9K~&KvcQim8@`dJ8|qJe6~wb1x|rdq8Xcw(rt)DjXMGAtqaM%k2lQf4-sP+d z#fHI((ZQufhr!Cxd2>yFq=;YWmNa$R&Z(kW=tROS3=gz3M0^L3WhyBl&6Sg8mL2FV zlr2`0@jOygSUUM->EJlQqz}P381O{b)&U-hnvO_Jh0xBIPd3(U(4P<5&dgD!6oeFe zf0Pl|cKTu93*x6plx{Deqa0@qB(ZPK1X@aOj87GBE!Q&bYJGvL4;SwE{9$)L!d$k> z_8mTjvkW{;nzHA(cb;o^x3X zTlcY-fpxt$`j6v8UMZa4q}uDP>hkh7oIpp%bX&mX} zd?{$@z>)6-y=ugR!HP46PQ!oAxQ&96Qt3nxIuN8fe72@!O=&UXgZPWU3*$gs%G!2k zV8-?B$1`{60E5@20J3CFohB3&b9{Tc^TAgV%laCS2iO`2_B4B_q1BTwl{ei^OJP)R zPouHDD6KR3G_q{lw#bG6d75h8J-4DRq{z}3b%ZM}729uoxWDALZ4?Zff)-SE%GFc$ zzTKo;#;)~T6O3JPz)$t&c148*S@B&9*vZm&?z@CpL%cW9TIJ@dWE zA8Q;#`f98=7-kL%k*wG=t7$-7P6_sWq#oL);MK%#zWVE1Z=@em!~0=_;db{{_{SqM z{!sb?c3aSCsn-sWXuRniYVxSq%PwqWA(4un>`IVdS4$R);5$=g7AwP97~i7OnId%N z$O>u9l56q_6_ilZaqNYn=g5Lm=HXplb&WRJ2x}?=_iNYr5+sjV^+*-eEgK?FgZepq zQWl<;8fF*yY4`i_$0i(1N}728jPVLhMO5*j1^O`b8d;%4R6+Pj7?{ke43c3f^7KN? zfI)xA$~C1z<(fQI#o?op3yRoEHJ+|XP6?GnT^6`n1=0g?RaCAKuYJ4 zNLC^kQI|k!<&(%(A*2pq2GFU!pnQw!)JX>%?V&Z#i=domE*GvUID~1P#W)@(3&LrG zIZBcRSy!6+tI-y{$13(!qiw1-3tKUZcaq6<%eZKyY9{l-t|>6U@<^r745Z^3pu1p^ zs+NAAthz&*1yBIlipMb|fyNT$s^5eA7Z?Fiq!^P~^B++}ALDEoS7rkbP&st8If@6O z2m%mAct`1mhEq|3MAkz$GVWC?5cuRUOZ=mauslo(HDM4rdwwtS0d53PpQr>-QN#+6 z*9eprAE0Y=idtv(SGB}2j-N=Y9!w5_)zU|c>Z`OTYOwmm+uh9QMuik>!)+|Dk?SE; zA?-LLJF!^e54tX_9b@m?s2ww4A!{c&WKAsm&aZNB62Gm!d@eJ==lJbpkc>gE%#*Bs zZg%&pb%4a)*AH`16MXJZp3Vxkal!jvJN$jpjt0aV6s|Ylu4a2yd4HnN%W(gC<(c{u z@1zaeCEDSO6p6N#f(P{=T9aUI(*Z^6!e^!4%A`S5ISY1VN8W(w={bd`CXGCT4Y^Dox zb!5ABo3pGQqITbIt)KIW8ILaPg=vg)w0@p8px>pH*MP+At5b6shBNfS|@`A(` zeLsUZEb*T1$FQ(Mbf8E{cR^w-M`TlXK>-a2j^I^M1nm|oV%3iG- z>^h|{xI?(wWTKkJEc>>NFjc*{zk_peFI?hgx)_QnhK+~$f+Wl=i6jh~7+rvrGO28A zn5){#%hJRKWG&ETVs6&Dw>vQCSs3kZ7Qi#5<1p{xp*A<=s22R%RT2FTqiPALAjZvB z|E&rTzueklLmXPQ;1_2Y9uG&)lUWbl&+v4i#?~P@{9ugTDZCOAnBk3)T#h90Z9mPT z4XWGaFiUtZ%Uz7J5|t_>kVK9lK-x&CqwLc*LkQC2bib|tE-^Sm+pg-N z2l?Eut8XvMDj;|-YYj?4TQBQV)i2lmtYMm{S+QO63+JXC{55&qI61E`Oig#oUc_aOI+{IM$gej^<72S1mhN9$cnm2WG!(5EDj;FW|-h& zDPI}_Es6=a0R!kCSr~Ou>8!%TBJiQI;+V`>d8S7V=T5)K^^XoXS{(55)qj&;u_`|Z z;g9HyJezVW={GPl``+Os$@`wrsr^XoWdIqal7DyUr?5h8oDefr6I7}=M1Q9U;2{Bm z!(e|YohXTEF^k_E)1ZVIp`-2pw2d_tMw7X| z4%`Dh=V67wXVsdRL?(8HUDF(S!cFht*IK`OGl8{iEMhjAzSw z8PKlL_-mlXWYHK>!(xjLqyX>2>QHd3!Ljcc1L(|l^(Rz((1w*$aI1ltXaX}SxTLfp zo&VAXW5>l)h2&_xJ6=+^HNtkBV7QDXc5C%>*T#}|_K9&nTV;a1k6KY|>R}eFA4Hd& z7j}P{w{xtEX38n1uCbIE^7FP~%@}Kfy;B5h;=%77BeRmI=2J74l383IeHPvs{qJ3A zVKgasOkz%#&Bu8=n(eSfnODAMlj~>4qDWp_VoD{JdLNW9&nCL^ehmH+P??<7CCK$G z@|+h6Vc?;o8jK7ptb$TvW;Rlh)gdTNRFR^mDT)jWEy^}JBNK-ao0zE3bBad3$}(mz zXFb9e3{CFhsF$&@Njq{mOPzm4U&v8>3$6dQZ(^Jh+gC zn~p*{GE9o`qraqd4i*NbM32gVl2WFr%CHnc`iD>EVq!f)bM^%{*b^&k^pW4aR0%(1 zF%E~1gJ(MHE7+TUX!OpZcSwGY({vqTq(_WgD^1F*M|gENe9u5en-cOV=l)BGI4>8# z=-rbMrKhrWRh3;n62@dJ6MNS=$*~IsOg2`zx34f6O6v z79g?g8B6?~*2T`k{cpJ0pPKJ~`SS0`*`M^n|2bDce`tokal}6vX6!)D+rL)h|F3W9 zZy9EwfBu^O6Ntyk&HnEc!+&I$CBB2g|E~Mp*U&ddl5dgf2TC*}-b<5jXHQV0C9HJS z!PVqPlT-|^f7o73$4khXIaQaB5?`i&%JgY(>@268+c%8L*6{`s!t@nJ?~Av6m=5#Z zexrE0P(DipcTUo6I^MU7Q~KVnx71M$$&=zIOZ)ZgQ=Ic#appQd*bf4q9;dFqTy-%E z@Oj<0wm)1PQxkdT{Hg8b9!Q*CwmbPNdu%LyKe}I}>~uZbIrJB=a!bIQy)oohjj0_y zix^z<>oC@P?&ix^T?_e~Y!RVHXXmjzW#1!nN!7nB1y+3x_I>Ipzw-s$XMtU1CyrMK8EN$q(=g}ko>fIXL$~-~O`8;|w;v`NBO47~rHWE|DbjLee_)|umAnm+!eAhB-pdNBWkAO7?Cj8K7L77d3%eixb$Ny*9KDM#*iJR)AMg5zd7K zPU{s8T=ejzXsa+9*Ad>wwcTS;N;?65uX|FR5}_pj8tiJxe*<9KWF&EjeiKBbkeygjL z^mZmX@dz(4yGwlanqVN&dU+0+c%^1F#c#L$`ULMc5cKZU@xjp`yUoh+WbE=I@edE{ z+4;f)NkY3_S9$^ByLXO@=}WV7oTjq(E%SX*R=nQBl-DC2-?Tp)i|iTOpoF+CaC9-P ziKMTV{aBuXGdeOJ;j>mcJX;?4CA_%dQkESN+Ez+1InYqQZ#}RS8tO3adIqtp}c)D$*Z*XKl*QlkWg zF(Z1Jt{cXix9F))D4%c2G+WH2b(&l=3Cn-8n|xqiIB!Zil18AEREN<9?^#T zR6`GRmZSE5d*R)+BOxOCwz}r-y{o&VbJjSzoEr-cxt3i4q0K0qCs(Q+yM{o`rBZt< zg|g!TU5xLfEb$7QOuS9htNdf8m{<}QrTok-pI5b0}XQC`>GZijxbR)0gH zAFKy$kDzv)a%5yLkdJas_jG`Mvc7o5jV~>+Z|KK6l6qJ7-c7E9a}1vT?s1vRnbEO8 z0pk#kwCJ^=Y#n*{mWC+LIz~K`i5J5(uA@r4kyM{XMHYc!#Z`nN891S^q}w*2a)nTk zvvUXSU?xJv+KGI+B-GYKFKFFW9?BHV0C#z@gg?D}4yTw|UM);35CKW~#74wMZeX@U zmiHT|P`=(@30H*mv?+xeR^D0iwi3tPpt7(N|3HyPYY2Q8au=W#s^psZ#4ui!S#vYMuu1WsPO_+?P0Y`3Q4NvZ1{aVEJHTuUEZ74@WT$`cf ztd!3`gIn=-kCLT4>TynM%$^|at5FOdDYddLj8C^KU1`VmB*8ZJm|9kux9rI$#WgmK zl1U#?N9e_d2*cA(q)(I8;oi0=Kfsq)h?Bbqvh>jRq@Vt7MJOO_lZ-dk>*XSvGU)!o z8gFci>}XE-qT1#wR<#2zOtmX6io0nN9$u#TXX7_a&g}?#v}&i)m4H2-wfN4*J9&C& zQ|YP4oS)(9VG}K#Vl|ubMx$=I=AS=StSQqv)X03J7yCq5F^+8^em*#Nhus7m7{py? zVy?DWWtI%!*GC~Dw*Y?aWkh=|8p*PkmOU$wJ4-p1i(^z^#auIZh~H|DdDB#84(HhGq&!;OQX2)p35%6F7Yc1r8F*B1;? zDK2-l=J}M0Zdhp8DCYU^R}yb(7j~1^#A>H*LYu*36Y_=+T?@3hTU)hLiRbSu^R0ql zYu{?zksdllXj7aLE?-zLA@1d^y=fzg8GG7p+FjI^Sz3tm{1|3A=uos6X33S8mE1q_ zloGaQEZnNB!WysR`B6B;QW5u)ZE-d3y1d=7LY1@1P(!JJp)CJuN8*tJZv2=l3sw5D zfh;|7_+(`LFN#IIzB3e0J7s1eJlb-eF2_I@ob##l#qlzarue_@%a;a^JRj*A&gR8+>B)P>J(n>U${WWnjOHSKiL z?kupDf!jY~3pSTo$o-x$yf&WjO&HhESOz!LcptZVKN@#=89x!a%Urt&w=_qdlW;+o zmFKvQaz2QeJhv>6gO>d`K-d!}KzLO@Oc4(Ffx-ALwDKU^!zdh7=*E(lqw*3f6EzPm zumVGvR0V+ui@;yvN-AcsA>5BQuOnI?(a0gZ)DS&_+@NWs+DPkFw!z)24bpN3R&sKr z;BJh*+#_`%h83CCkEA{H0Tz0v^5+PKG3s!W(sbF%hX%kZt2s8m2UoRbec8Sswnmxx zMQQk&B)wH8<7lc1&(Gfa250IwdlfwiaPrlIHHQh>dezeB--pNVbE*(VX1^%S8gZIT z6IN4TwLMZw1==}FDX$UeN{ds94itnB+_Q#TD3dC#qz_#Fn)UVxs>DzxRRPj-<|yJ_ zm@&H?b$VHVoAz5d42ZRNhUH@~8q4fYO%Qdk5{ql_X|zg0(&txypj74SVv_ho%tF*0 z$v_r4I*=s*%f%oFQRfI3wD5H$0)KN-mBIx^@wmYf*(UKG@EWE_5^9==Hh$RO50e@% z867t8N}a5%3sKoiW%q68;OmseHbJC z!;Hu$u77?}R9@rP--+)Y;tNieMJIzLS6QJvkf5t8&cjm1hs~7UC`cUVqRUg63Pbpu zZ6v%|khmv7M<*H?bm<-7jYihj)PnGXeS|LleTS+_d1>jo=WE0GUAH;aG3M%$CZ8lb zb_(;I@6xhSe=dpHQeslkFhVT!u}`Y9e9Ynn%G`8yoD^8f$Wmf~gGwOkhyy19Wu=KI z77kuIl}K-kD{`xwJqi0v#_^oNN{%+MqtHQ+O=YgXGWU3cwu}31&D_b%@Py|hoEMD` z+94+PLd{e?PiY*3MJ`Pe;O)SO?J=_Q+6fG-IrH zXga`rjOt+Mu#!>_fY++gQqxI@VHL-55#m!8$2C+-E78F+)%0kplz=(fdJaST0kohcn_xMl_ zF8Ij((8GvqEU(cN2ostFT)~we5FMy7f+&($^7^}zv-$%-LR3f=U_+G{cw>KA+)0zp z0t$>FRh?ad1CvQ6MsQM>pR56CczGK+Qdi~s@L6Zk@B>>!Szkl2Y`lf`aN$~j$gQQ> zPhD{3)s=p!7ikaXjGKE8+x#t#eH%g#TVvtLudDIhr)I4tqBnsRZf#o90fzhvjDdK1 z%8Wf0J`q}B8^o$I6Ew_a2~_G!+l9F-UB;HQOphU22pdEmI~Pt%h;+G`IEnlXt4@<+ zZrJQG)uZWRf$hsa*P7Fq`Tl!_DtE{91?ksIv{(>QPLu%!WdW7uuJG|7MrTE*!m5jy>H@H(k^iV2OZThEK%13)_u$TW^?tY;vXU5Wjt}=rQr^Ote(!w=3c^l&zsg+Pw-;n*Yl3 zGw1V1Z~2m}Dn3K*CQr7Is~lae!vVrqhwuzFFj~=v14}p94Qn}kcy)7N(t<0Kc^8?o zf`!<%lB8_c`&ff0=Io5JKt&;Bi+n5}Nv+f1CQw&m1E?!{=1qv;_XxaR%wlLq2jd_m zS{D|oo>#r{=9IW{^c@hT(DW9R1vmjE7A)&s1Bk*iGc18X9Gjmp1knd;vUmpHMyn@e zenxGQ`17V!oPnj!R(g|V(enjE>vRu>6f3r7z1q8^H46aUflY-K6lEnbdVbfaI|hrM z?KHI(4*@u)0KXa6fKx7x$j{A@A)uqJeW8Sbx}1q}SWS7ZnrgGimHc>B=eD+>ChX?S z%osF^Qi@CO=rAed_{vyI%EIf9Dzc~2lgF@y8AWO_9s-iUZAV#HpTS{0DUA^GyQLqv z@A%VNh)rye-_iibf71lf0zue478pDk@0J8;V)*kQp_ghS&JjNIW;VX_w)^n~B&D@B z%LK0_MGY7)$cm>}_0!74(30A_Bnd~3`mJwxP!lt~FZ4TZZ1O11_SS#nbLZ)==}CYW zpOSt9Y&vvhwy-;1@R#PO`@qnZoF*pUN!(ovl!o6<|2JsYpORVs3MBmBfp-1jTmDns zu74*{{>8-n*O~t>pj~X7f7pwEQnCKu>Q!u9od1TSxR^RPTG-kC9qalZO~_(n2NJUW zg5Lg%O3B9YCok)tu&zIOS$|j51GD_*rvA^J84k|hI2SAUPm&rNC&#~`T>m&Fe+QQS zIalsK0!y4=u7A%CD}?umY%yE4DxZEBGEq zIBk2Tq!9Xto0{O#Uw-?2`(*1%Cf6y*D=;?#u_)XNg6DqSMpt&2HPq`CY-kD_xgQaqI~M^$O2a0tyZ(W zMZ~kk`-gJPdZlMxNL%+hI(EoDN?1($!m&Mk+l|b0i-+ra3lB}B%vV3>mfS~|ZIlkq zmi@fT_8Jc80eaznQ$caG=T}d}Ju)igAcoycUSW}WF$TLg49YGFnt^1PvN+&RQOs2R z&8%;FoL_1i^BnTuT1!FR*4qs2URuO1$SKHzOVdYbpZaFsO?=b;^nm_=Qw1s!4>dU) zk10LOgWg&sLLF+6*ZQz9*WPm?!xnd!>qvltjT1snQlcRLHsej{EJN; zp#!~=PQRMAyy@HO6dR7qa6tx2d=Ac~oRg!z#HG6$Sp8CTRsDW7Do!&L{L~F`!el3~ zf!AyMW|<7RWT-XkA`gXcyo$YeJd{N|vU4^y8Q%%VsjV95GN-eU1Fdei?=4wXPtZpr5t@s09pc zTP9B6f$~WO0CH(rXKw(i4HO^Ei^NHT7;i(T40-?WEy!ht1DP!LBrHkD$ivalzIZH| zSFeXMTvfA6aIVc?w^4PycSW;IGfjq5B|V^H-iIl854H}c!@hz$&178`6ts;TVB!fB z930?MkVALb$b=i3b}|emWJ$o|KKNELp}F_U=LbNaL?9btnH#g+XMnGJ-RDth7;R$O zSf~+RahNr?1Yv*{Hf5UcdpjMM#_?j>tevqAYM6xpDu+}jEI5x7BG7&nyF7EWu$2bH z@~9hRDN8}O;!jU8by0Ca5}@=^rQl>K(NH z6mBDZkSIU+awvb$++O-rOCpUr#l*wsxMy7K^drL6`a32zTbs`-D`A6Dc;a-vaLPjA zu|NfEm6$3XFn2AtQEzt-Pe=z!xGL&ai9hZ;tZrpwBw_jx|3So3is8v=y^=WPAV~<6 z_vm{jq%jyGlrcOa&M~GYu@uC?+>$G=s?mf=Us9>C=&YgWU?)qc3rk6Fl+`=qGvdO4 zI%rV6{FP9Pt4xXo^J!Uxg{IZAQ8!+sd-M&LC?faLggA)5D7k+N5-${qRSM!V#H<=e zHTGK79H1R_Z2bVTeBw&XF49m0g80E>5^X`s}c&t)$=6nHl#4+W_ zC259la-OA$+eTGJWpq&YEYg1Fm~oJavu5mQ1{2isw7B&p@~ByV1znoaI;dC zAY>wO=t9nfa}8P*J8V&m_qE%&X{=%@W1YE#u43X$;VJHOaVe572+tCYLC;fI&KY zQyTZn&+4W*r4ZUpvz~lUC%alIvtX+Ifa}_WnziRb)fvpXIghhr5@WngtUFwu`zeXA zZU0;6dL)xszgwR4rb9jj&W zEGrb*!>}UDOb|_?xd?=%8$p)AORGjrcdYPqJcRyHBpBm&LH?nvB0`!tkQG|G2{=RU znXg9Hox;Yz2~2E=D}|E`;rV;j0aTu;xmRqx3JhSa>yrnil4VZy0B4!uLAtt=KA+vy~X-G-m!?yT(lX~}MKiUN_5Z=@k6 z)HPN1M*>+tG>Z_G@9SvzaZ)Qm%y4!R1gZgOL7)j9{35(vNm+2lr$A$0;2VnHxfF4p z(o%lrDgR8i`vg|@?G&dVtIa{2nF%NS$dWCf;5F4Bht$OL;I}AzPM3{o2a^l2NykA8 z!y-ky0!Ww#0oE#@JKzR>pw70EP; zCw$a;86@|o*HQ>{k}#_w>p75fLV=J#0$caX;^}J&iw{?Z_cD!^ zLLj$VYU}vWS~;7yr5ewWCw+FFf^}(jK1XJCYM#QuRUlm|{t>zDP0e#&Gp@G!$4v07R zq84sm(FxPPtL^q#Q87~Cqy9=zI4?~%N7Tc9u%KZd%83nu_70-k&G-dqUc-LilL&;- z1FCPLIRl9X|GKa=Yd2Y(;|0>6hW;oBn0*O|FK)($NU_O|vLZ!OjYNe;!A3a?uL($; zPnT$EGlHcgGx=mCUO{yC=eQ6boxs{6juh|1f1?~CPNc)NQzN5_gkTyNg*1AA^G)Q1 zBpHl?2*I;8AqV!-2tY#2@D1`HI-3){2;$;~j1ElT!bl6uyg{#*NDDL!r^GOMXQ<^W z#YDdlzpP6x!8``R)U%qW&yAyX7e9trDi{I+^xei0j1K$?{X=2%Amp<2Lvi!5x}i%+ z`T-`PJblQ(3}jZSI>L;55B-W3ZWl##9~;HyfIkIikR?TMFScaeNNY?Dp*ZO-Pq;)# zU}6$WC-B_2*D?3j4eco=2?1;XR6?Uu=__nh<70mk3U?T#QF>qko7sO1L+lf6l?J|H zb2kma&?5yd8Y(SBkyA?hC@n;Q`b*V6+F5fLqa!pf?K;yxA)|GAS5$lQEpkieAjcS9 zj6NUh15^R{c!}Gf#5gpXLCtqkw9-G(0PCAcAG*>?rD(V-0~${TmLNr#B55m&VDj0pn!(&9G&i&SB+$ z=Bbx7ZkhMb6XwK|OE%O_)>($vd}Fn_!(KXfKIX+=WXwH_YrTH7Cw*tqUQ}jMaVO(M zNxr+8%hMdw;&`p?M6o9D=;CtR^svLB=d84RT$%0eNDroXOe*c??h?`dY_gzWDTaRA zto^y0Cdy7s+%!t-b87J`tdy!w8b$``yK{b`^r6F*z`Tg0^uWeeyf?W=)f@16K_`$1pFQhPnH~-lFnG-Md$?oCVmk%;#nV9y?$HgGN!^`3vT?A`Ulr*n z>fwI9jS!J+!l{uG>-QEON1@KO$_7Us=|(WkmYq>0%J|2~JjA6{WOe?=7{_E{Ws&JR z@~8BD&!&(W6Exzk+A%v>Sen`^d6`hQK?RTdUx3){cdprEhKzgEduM<;^M20 zP@N*PWQ%tXR>a3fk#K=l)f z8w&23Lg?y!fdCY z^zw_Yq+mjA07(zacA0G5ZkwkSMI9A zQhLW85|jmJ?GSie#y8sA!oA^fzlI%1lZXzSf@)mKoK|bcFBtp5g(;nfncC-$qdr!6 z#?CA3Dnb_VZ3WYokfZyH!34gZvDq*#^J_BnYLk~d0oU4rc^mXnd@Eh;@|Nq2v8Ix` z_iiPsF6VWx^NF^NPa8*N?39QVb{9YJrl-2)L>*TRM(}?fqkQl|ukVpJ47Y#puA_ss z(mO^1ZOSGjz+kQjgIo2mO?xR=c6CSpWAC;kjMC=oc-HOtxdy+F<0;ZeOyAqPI$ok# z0fwmKI)t%rPcO0uW>x(?&phgS7b+GxAKyNcaJ>U&$UdI>z#aI%!(M^wLo zLf2pak{{uoEZ8}=Z3iVq>wrW6%0q^4cb+4^ME4#H;q=0O8;PWTNc2^)9mbiTZEUDM zUPFuH4KxJWRP&HutP029!p7^nyL6&npeP_I-jv1zm3M zlSG+_4pFC=W|+Nw3bh}G*SRpFW_Yj6>P-0r=r7*#`80i96(2k2k+lmW)Hs^5 z&%D?&leA4HYh1*=P*>&m{0l7O?@~gt&0SGDy`8FKx0;Al38jKjKO%Yp z+HdI}563|7wQYAXlLeCG<Rp*TTB#w`zO*Rha|}D>%U$SKjjTqP zso&5bBXEIfc2}?`L}52u_a%hUE>#H8bXyOX?GZV>3$pI+AY>bZq#m z<3^|`QavcWZWyqN57HU?`L+uGoK`dbHo!zK^!kZ8nh zT-D$QVZb3bQZy0k;e5t(V5d0JMD=Z4Q||}q*TearOyNLG02xFNHId zM6Rs`a!V`ICyNj)=kA^O3zrr8(+k!HKm6X=b!9D>TMo*YOhK@`X`WLMJM6S z-}OaP5jYX-nB|ojVa*Pff<-^4Nt^{qeZ(Um%l%L#r+rU#l|^O}$64z9@z0pB<4!Q& z<^(OxDXRZuM}>^QuX;yNBpZROn%5a5{HLoBsZUlA^Ep1?GV)Y4vTCHQNPC||O~jAv zt4W18Y=?`}Q`4?3^ACwvTn`Ds%jO%|gLwTyxPl9Ooh3_GmOre=SfDyqDBFe*# zSh=GGFajWhLs8BBf4pMmFS}mP$;!ZcgxvJRf!UDQk8o7aitcQrfwn%x#zk^K6(>0q z6{JQc@rE!2Bw2Na2i7|2Nj`mt+W6 zj_p?wRApu^n2STOaPP7*ZrR>*%)(0;LQg7U9@Oo-zEP@>OAhzU65JCI`6Y{q;DG?= zM}=@zF);Uu=0+m>eOiN7PI0fCYaCO{A! z26wfTrvG=JG3h^jm=FxT50=chkcxShyb|*+cg2KON+%>ejv>#emE4&2X-S}yY5G?P zBE$voBlf#5t=mNGbK$MnzCf4fry%{Z+#?pn5EkKM***qA)+g`3*mWl8Pu~?1;(0+j zej#|hV$60lVH|!wBh9)>*ndeP#>!V=Se<{5csnc*0ts}q-?n4^t0N=*pN`bOJAS)d z(W^O_(9_v2#hCK)v*OdpZY1L3S=DMtzJ;9#7?($3K-{WXn@dxF<*Ri_td_;!1Gnf) znVA#iiz*odvC$k4eQM6sTeu&Pa*VJU6P=Yr!9|-#fT$k(M1lZ^OevH&CF9?)dj4tp z9j+lk3`I+vGa4$S9J=UnsaP>lX^->X!d658y%aDk#oShIQ1O5ds@(5>jX=L9?YEyF zI2f%(sNi8DpaTSBp}%_?Pb5nigXDF`wy)93C`iRvrB008b4k-5V3h>TY2Xvm^w5Ww z@4`0g3k(UsQZzf1z-gsOT=D!gBjE9Af12H6TTdkHXN;b#6E)D}Jnmx*!sw=YaV^wrQpBkJmg#;X7c6OYC7mQKKhY^8YGn;H8NiXT30dgW{~hoG-M; zEixL838Nkh+|&rSXjZIiVv*r9>AE9BEHEjtow zV5Mf@5UGmxBBquEvalVR8-ymEN)GJr@a}GsDGmLhIpQJnH58vL!-O$JaF0%KR1{kG zCk`rPC>%>0Jy}Sy7=Npxs;KYpy-f)Lsd#7zyui(bCPawe$BH5JJyEQ@XqZfT#vd++ z9`l$kdR;{W46Nyfjc(K;G`oNIJ#*t3OhWTJLSumpgfsu3E*gzx z2KrFk%dr02DfcqGt>F;CYdBoM@_eS|#hMJe=yy3x_(*%XnY*&;DiZQeM3C2IbVFHo4m-+cW?xQ zDep788E(jCLwc{fVVEp+$Z@j#5oy%vnG~DCY3zCfA=`n=SqBKv?}fhON|dP}A{;R4_iWeAyj~uMw;QjO%G7i+F7TCBx?$9RpXCU|Jc(o6u-ignt;x}- zVQ%u5hK3{1hd2GLn_PDZ5>tC{c%9xgkIC@fTGKYH1PWJk=v3+>o2#BWp-yXX?$rbO z2B>I|HfPOI9(|d$5O7zGt2Tld-#f_Q&5L+6)*&PexuJoVuGTIxc)gP}nYwCt2r_m0 z7bMPzBz9B~FzPUHeiRTaZ9Ffc)9>Y8@+ujsLi2t%l>5k#JR{H#ywM%1i@`ZBHp&a6 zLG-)U!dyZ7PLuh!Xh29a!Jt9PL2OF2wvX#TTx@&Wy^vEuu_DPRJTioVA`JZgilx*0 z;*}LiK+_@HJ9%n|JKfd{z855yFr;?qzEwUOXyoJ2g2Y$;qf8K2j?Di4)O00ozWHxT z)T70w7GD0DbQo-=Ezj%5DR^HmbtroU2+0wH{uFpYAruJGap-T})05OAFy91{eTPKj zk!Co33tvstGa%6883a7;yq@8NbKcK@59$9d4I$|Y@q4nAd=UCG&;h5d@Pc#u!4Tb{ z2*r3m3SU{F{h%q)_C>qOcGVam(XnBF26vq(-Y1q(MS~;L{J=vf( zOt55ak6-={9t$?BPb_qctH{x1AI+Y-s6zkgg7UkIeJckvmM0tZ>_E}dRV0L{Bigvb z;=Mo^q%aSf;xMvK3J7(lr8vpZh24`b&SB?14nbOjFnef)nddjA|k z0tWvsW}*!If3Elpey;coey;coeqJ1dpBKl^YG>fT%mV%Xsvr#pN~rv?^DJHlW_`8? z{DA&f`?EdPXM3#A_E`U9IFNu@|F{YKf40Z^Y>(~PKelIk&!T8xwr6{6&-U1!?Xf-E zV|%v8_H2*s*&h3|J@#jN?9cwOKihj2TLZH{+j|yW1G7Kddlp{K-Gw;$u*j9X1WqxrW#Zq(O5wMpgTe}8f%AWF)xtHP?9c(niS zl3l9$>*~IJ<=3zLMV~u7x&2@~FYCJyGOz7Glt

a#GvJ_V!070-}dsLyOk}g^SEj zp8NT*R(5Ju%)0HJV<@GEuqY@^z$VMctj*W=+~aGh$F zO|7l=l*{pBx}E;hm`qMSu+L~c(HxXdZ@kU z91HBrwqVjY?+;|c(kRRp!)L0s_`v^AZxqc_P~=l8l3wN-qNoPyEVt_oX5wr;)H5{1 zrS@2d2(jNMT4>-n3C8lOSG};oXf*P5kiuTD<8Q^ z?ae=zq{*~heo9n2VW2JVwRRQJyL7*DJ23h=NE$20Dc=`$nHZeDz9GM_w{&zE#rno5 zWd_@_f0s+aMX*lDS+cIa{Hf&;^<$AM3tA@HGFy7E%keONhTKN{Cw=K_)4HM)%Dc6# z9Rcd5FCvLI4j=GX4xBMuGhLuxZ*&Yj+_>F=`;fDJFj6BrK3N&#lGJ7GW_XssE($7F zk8~_h9pSLGl1wZibG~FAs{kqL*))Q1XL_S&e%c@%lSUFi1p*ru5Az%^r;4nM-3&^! zXC;Z7j&B=4(P0E1vH66lY;kCXH3Q)mZBX*QQ_m5RG}kQ=F}(B4sC8fLdiU!JB2#k_ zDnelSYFxM1%G1rjT7{enHcV-#?&U^P_0`2rMNZ^7=MruXUstc7d+k>5$*YL>#*$Xm z94{Y7ZDVbaFq7*+Ij8xHxHZijK`+*Sq_FTPMu(+{Tt{TQzunCwS^Mq!;Xhn=`|WyO zgds_3uZk~C3m*wEGLeD)qRq6f2LUyYN5o9Tr+2W2s>W%t1uLxVY*b&-S%fun;RueP z%UYf17y8vgsaN2YU6K@jgh|vt2sMXZH1~%@rGGibAPB8@v;(2*uVD*f5}mqCi0j;h z5v3!ZUPHWxrD>(JcIdKN^b^!D-#CW%9WOAQei`dc?pr-%*?fBpFB|>NfMe@Botb7k zN(Q^x@C@OaNLrV~MwHP^*sRN52y?M@)k&zL^5?}Pcoc6wS!PKVS01y{acYBvGfS*$ zhT^X?iC}HVrXU&yGm8hq;iB2PF<%zu*ydMGRP4qx&70ZA0abLa_Os28Kae)_4z$FW zhQ#vO!45XdNw`@j{i>hZ=IY62Tk6`y0=RdxPvrt4@s;=EWU)DinTjob1r6i-yfk~O z2atnI?Wgcr&FJN8Q3Lx*G%qUKu&R&FvdQ%2DHZVHtOJ$s;br>u%Yl$+eu^$pjE~R9g z_Wil+d7Cq-Hlzrjbnty}8_$423}=RUHsMHJXRf9!{-5-^Rcv~+v&>ZTph#-_K7 zqHCbyD3`3%*3<&Y#P={LNz>t)^oX{n{+3q-<1SZ7-k7GdbPnwm{k38OgWuBtm!fn$ zYly$6H8D952ZSEgrY7}EwQOh6z$sA4I6Q#$b_jQR#oh&KAQcR(b? ze1-}YNA|f+#?Ms<+)0tp^qi`dHinIqM1~rX`A*}bT}Qj+c~2^vJyI*#FHnw?(5{sB z-6PCWahowIbpktlX9y0|++5t0$qZW+i&5-RZ4;&_;#u3o+ACe|QH~qY)Rgyc{LE6R zn_2&UoX|?+%63-yC8$6`X^>>up+PaDneIrgVPT^k7af(DtxQ!(saocXZ9dP#7p~Lb z9%6sn2u5pd&WZfPE611y#THAgteo1YE_aHL`HHz$MpITgZ3Kooa^y+YC0lUuuPmDN zcov0Q`(HG?_JX(UHp9*=_s;oE4C8zfT&_38Xst|M9OGAM^d|b3J43kA0QxtQ1G##F zYCh;<>WV@=qlQ7Cnnm{xR_3wpRI;jqgVb5*rN=I&A5J4Kg|{!~1wcNFlGG^$PQ2O-I_ewg4wQI?E(M~ZN`e!xI0 zovejC!<+qbeSM|Q0oxGfdlco1e%6o#%Ny4%bFFRbEpz+uoQ2?NDhOEyGFG4&3+Ay2E>#Y9hAE`V%nfnt zX7q1yD_OT@J{YjA{vnINTw_UoqdEzX+n3GPN5y9zBr;;8w$RvI-=u#6tBjGO#9A17 zV+J&5D%gQmSP$4xfhM4&qdegq8`2W&pd6jlzAIm3kfa@9diW)KcgqId-%Ls8O?#19 z2WxKqbc!Z$hpTvG55L_v0*Tarf$!G$*~{Oo@4@QjOf_O2UPf2DxxLF^s!=8#%(v`d zWif1OPRoL({6=RCQ)Y4HSkOv<3y6$NGo@*ZlVp$O9bPTmV_;& zB1<^C1YZ+Xp1dCwPa1Rxwv`Jo(2Z6n@a1p>jd=Z`4@q|6I4t{#D@8d_q|{t#o^1N! zml8;-C{#tkglqhdkgF4;HCMsmjegP4x_FS`E6EvHlO|%%_bpqys+6Ipl1V?8C=OeT zLFmaW7CW9!S^6^J>CwXAQHoqv<1XbCJ-~&j*8Sq7_Yj$1Dq7<8Jzi_YKxYHL!NM>X zW6fi$Wl3XFSElax^6LwzUN%OnsL!aOySgWIA!*$*-yz-fR_+(g?={rdFDdfdm`Q1X zBAB6}lcTNJT1Tq53s;j$qD1LurIdlXL9o?uBvxj5dCupf=o zlWC^Kx456EpG-?JR5$oy_2eqb&&6)!8(TgVykxRLwzijduvMtjPtf^siz?E4w^%LvQYBN{mFBsosVG`1E(88lbdJDxi|xX} zbUf0k9K4O}&Eq*YUVF9q4AI&At%oYt1ht}mqgd&2uE)#K_;@+E=F(X zk%fd(zvS*k%|Oo}=-VFuFNF%5_8h0&?dcR}U~Fr7RjU}y4;JB(BIkVE$TmK1bkyyPQ>iaCABMK>Y!+JKOP z;hPDd_@IDb2;5^ArXiM#h_R0~y9(I{j+a2ZQ zz%J22L@MX!3E_UF7j%0g>cRYQwVTICa<1Q#$Wke`81l?uL)1y1B~Bs%Hhp}uX*eR4 z|MQe^qLMW2p0#>#x+!btdQvp4@ap*P*XpEC?rPGJw9pt6d#V?{~W~NkdD!u z`d(?Bp7RH!`{dmbig|vRom|@|y-|&7B*I7pimdHT)Z@%X5Auo`6H^qC0wtZd?erFz zths&D1W%KQNA~hBU_J=573ekij=@Fbo79L8_^(>AUIUxaG4x;-3(Sh*9~A0jWVI)< zSHKFO!r7~{pe^YEffsuP^S^;wPnqHWv84YSY54!YQ0s5bF#v8r;0h#N8Ve*{8Ve*{ z8Ve*{8Ve*{8Ve*{8Ve*{8Ve*{8Ve*{8Ve*{8Ve*{8Vl!NxB`NtO9MgDrGX&n(m;@O zX`rVqDe@$szv*TEIG#m@d+tQ*X`o7 zhf7YSDz5%sE(ve*++GRS4q*sHzdblwUb?@dh~1q$Ubea&g7t`QiAW`iE8;7yRlb@( zdT_m&C$@gTb9QVYc0sAwk$t^`P}X^jaMed@-C5Rl{|TS}>Tafv*h{%i=i!vi5^Z{^ zcv`!Ww3897gcvJ4y{j95T6cdGo}iXw=(#J;TCR2DW&2{Qr~8e;GVS=K`en<`y4XYB z{ES!Y-PK-?3^lg9(E>)#au4dwy4a-*N*?!KYClYWdhT#1`>EOUSNxv$o+LSjM4i&i zUu@pqv;BU#!}vQZY3)V&AgLIZN_<+HYh+%2c;4n|y~ZH(F1mC!l~+*Pbj|S}OEu(a z9&^$-m?FpO_k%fXsiW~;wD1kSgQuKg!NUej4D&f0l1|DYYQ*lW&KR?ur=wR5TGA)-ayp$avom6e=kh)pqj%5_YPVf99 zWhl2af4&kiU4+oIPPQ|3k%iZK@u!_x?p(FWRT(}GE?_2bpnK1kp0@GN#8D*Lwv>5K zam}J1vlZj}>N?Ug^|a43iYl_d&DEN7323$XRgNX(T$^*xi93pvu*=XI9gnzhEpPE( zxshYKP3h-bg5*-(#3%)hMW`2zzOyPU&CB-)NDrEeF%U2D47d(e5AMifD|tXSZ)wOU z++iui2vO;-ihF6HiLG4bRX6G8C8XWL`>d>>G;M9F%2k?^MLS@*&_^Y>W1Y3+0ZMya zZLWo_Ou(_Hzun?_EAnZPei_$ZitssV;f~T45l-F#9O5P0I;%Fb7Y5h8FuJdhy_9A~ z@en1|O1~%WfF#<+2Bj4LaO>DvP5-Xj>#NY;+|T*YzckbOT_I?Mb_n21GrnB<7!zJb zPh|9RucNA0RHL8^yi>!)l&WLh)d#fWEUL+p0O1 zN==F5WF14rYm7_k?K2d4SRim|GrPf5E2yywB^yWx zEs@V*_8NtD2+dn2Y7z(6y4#)7>Y2upS8;uoqFEzsTkTKG1sZk1COp4`@hx?r5OiNyz{C3uxeb$7Fte67+o#Ts^(IdFkQ83prQs zc`|kL4xP9;*i2U1x=+(A^;$Z|-RzUqZKQMeuyJ^?N}%dxH#OdjgOIqSB5pgO*FN915JWWYh5qoR81$Yg)-;? zt6;|KeKcguztqM)+QiE3__=p)6ClY9aizSLD%6T9O$=DpMR*(9^4bo6faVNry!2o# zVAQe7mh0NG-$13NwK(5 zKFqW$U&h(Txote9u04H5bhr7VAN1}piQ96asetqn=_ELd1Nbt0_;tIo-?qUL^fhDB z3Dq9ejmjy(X3*U+Z7^XIHa}qVEB>XZWnYV6%cd#Ot|q&>*W1b1dd)h-Ue$NBV!T0@ znsnz$HiHN5V@l02y#Xn~Mby8FjoAiT{F*lnQRP%4fQAc{GCWv)8IR{07Z?#hE9yC| z+`QZtRoO+kz{gZk=u@+@isAOCDT&>>=;Z3QSxpwlo_$Z8EE@KAR2X?H_?{7Bqa;^wm zVY@5_zKd@hht`Xq8y7embCbClEVNh-FKy;|Hg)grJ9^P@muz2}U&`SHT-7O0_M!vv zLZ^o{HjOn|aZ_PRKk?SBlLZ%4Ac;6p$#&xm<+mi7BE%`WXQ}oK1*M#}La(u=s_&T; z2eDly1K%O@ZhM#cQ#eKto+T@UR+?XK3(ovV`)qa9LTY}qa4pRVs^yfXTvR)^C~ z4JM=VR*YMgYiI$%&pJ4i2sRqV31D7l^L`v%Kj(cmRa;=vbJ9h<6}%ff!798eXBEDg zxMS;PO!gUGEF7a1-Xz>N)S!nN=t6@(uFdu)wj)5`#PZ?BnPhv0*-|cp0IsdjX<~mX zGKMY7HxckL&pN;v1R^T7t#y+Z9-E>m?VMQy=7Owy@HPX9a(4}fj=-(0IC0(ip#-R~ zhSr+^7}c9%n4BAz_sFJL`WEs*uEtLdS)7;VR8dq(DFvEu?gSpCyMN&z$150wF$Aqc zp!e0Diep)0mnijD&*Mq1%{$okHmwI5^qbZ~fgx&{oW*I(fizP0L+~_3Y|_*V&Y*#&uEtGQppI%&mYPXzTXEG(0roK5(FPfF_*zMY z0W)`j%$9@v+B?L}JUJ!StfVPxQ8!Rw+azHb0IAK@y>JRQjFO~LzE*X|D~_7WoP$$& z0_y2YXb0Sdc(VHSic7bMBh z;a*TuMgfJ`I5{`LW&G3y{rX7icUj=}6J;MH&uhkA%sre0uCikjJ^z8w4l3he0d&B` z?J?X^RnlqdW_ag)lxWj@J0ar{;tJ|f%fUO=1-hz~lhTz^PS*e~$*^f+L~BMy4J&xN z6r5H+cV&nAyo`0^7UIFWAkGU8ZahKtKpgG&qV%5{lEyXp7LN>^)Zt@PT6A5-d zABoi6ucfr_%2^%e@a%ieRs+fHR(q&Rfak8`%`DlxGb)lMp&@^)an!JjgnAX%D5TMF zNohO%IB|_MIwYTzLX~lR0{qp=ec*`tHlv9Ze57djvwrYL0su&%UVUlo-2P1>qgx_p z#F~}tbi}ryHLhiM0<@tKXv4O0d<~mjeh$r_P4SkkLLIkXMpgk7r{6}7mD3c}4wBUC zwJc)X#a)MYfHpi=5j&gqX=tuV6vao{1lrJ%%JB0Se&J%qDi6wCX>Z;_wT;$#ZJFF* zsJ)5{N&qll4Zq~AU112f${ZilweOe(3Us54-cOQ?dQ5J&Y$M+F7KfD;M@P8}v|Y5Q zYrtrz=gyqK>e#3rW}1_~0Z!3(&^Xmxd@$z8$CHVHPLwonxv$YeeHnb5)ajaEHD`MF z`FS|@L**O=o|Vq7fULP_J!X#e>5CehWnTvOS>km2{LgM@>Jmj2Ooi)m#{#XT3pPGUS}g?lApK7;qx%>W@pJaZ_lvlv#IxZ@BL8xTT(fiz}#smLjvo)n_08D-qP^tpWr#S(Nv2^W&EBt80PXP7$Ci zu1Ui3NB`T99B@H5wb^|KB0&dE)W+09ptMW>WL>Y@qjd_hkJeQ!*bOwiXlkhAs2^$s-vLz#C zQv>IbW=43q8QXbZIp-OC#k9JCqFR*Oio0cO-Ph33xCTsGuBt^@SH?fITW4XvdH>$< zD+h}Fxt!CMjG80j@R@y-G+ZTRj6zO!JE0NGDa-(iz>cgrqG3?<{mGCqjGi^;F|xy; zfIs5KBc5WaH%5EN_Y3a(kalBI_Dp2^Z%dIDG)?r z1pGVyFSUS3j6e{H5eOnN0zo83Ac({W1d$klAQB@GL}CPjNQ^)bi4h1QF#!Y!r2|1I9SB0{KoCj?f>1gjFz?@f zgityVgwlZ^lnw-;bYKXj14Aes7((g55K0GzP&zP#(t#nA4h*4mULg~N| zN(Y8eIxvLNfgzL*454&j2&DtEfj!#$uXO4!d-_jwisk7b|2_i#Z^!##=L7;Zvjf4A znK>UXGLUtRffM)vuE$gO9}adl7QiZDBL_zkDl0Q<8+#o{bQ|hN++}2K_;~)m+v5H= zEMa|&82xzCf3@T>+|FZ8IM6>WvDI@lF#Yc>c^p9h8jkpbT)ITk; z(lh_>`vm+1IR9bEe`1GV;OhT7I|O$95df*+mLF5WS)Y1B`#`DppE$gNzJj8xeOdgh z>&lBn$udf*dC2+FvaGz)(5wZNmn>4rkf$axVyeWI`+x=Q)v7T&uloznC{*uir!L@u zkE%o^?16rs7JoR?PqC|Z> zxAS}5*v)DKTDZx zE%shsWgN`&;=euK5tYnotVNpZI_TxHL~FbIit-^Fd5O(uvUdRo;S|;X`%&)}oLPxF zF5lqy&)>uSaT70(HB8+8sOu4jX@Zo(!_~~?hu5d)@}+4cqLl`8R!6s;ca)BtbwQ5Y z$Bks#yGF%zv<5R{OZW4NeHcPD5;DkQFqtDv!q ze&MrI44R_C6%;J;;~aQ<`_bmDF+00;jSP7>l71xob;P!wJ#u@)=h7`WB1d_~Nlo& zk!vpMR?zB4Gt~KYxX(S@b6rc)%{uf^b(7~^<~qN}BlyfezoM_NBXP8cE0nscU@A4m zSQrtYO&3Z7Y>%?lvc=C>^0bY1(85~a)~khMKc7danmWCCjT|DbgArQ zTcqD70e51^Fj1OKa>&?jXkk_p%Y=w(kmewG=Qpo8b$_iEzrqV^t5`1GkHBu57UYm; zndpBm%6AHiOb|T#Zk48W?=dW_DK-+W_U=>?9$uaLm+@p=IQt8$!n{nJiqES&rNxtE zJ}VGdHy=EWhm{gA_gV#U29xh%Vx3&S;EygcA=g1|h{`#!i4Kw2o;d0oJ;(@6G`t*l zH<+GNpI9OS}kK5fm0*9g8Ds_ zFOvLBJE2>Ih8qtYrGiEQ7BT9n>%6#n&=n8y{A-INd(zj_}?j%+v`_&pc1w`p3hvr_pgk!e<6Nsq;T27a+Vrkmd(G^*+dKg z+s|QmldhUM4q)u_hPYcSUSSgL(TtwJdFtjNe{!+*@69GS_5Ju@H9v8NKU&*v$``nPWkmCSIFaVr&twS zW73t`UZ*c3?yI||+^DuxWIMGlEKjY#K#(k+oOwq~`NM=_1IHtwXpo9=VzR+WG;lkU zQnD0hP6woCdZ64#a{G#$@Z%5l6${q{^y|rQj?F=c2|i_ZzYx!EE?ji`s?xZj?R2dC z4KL4Zb89=Y39=AeoSY6)j7P?yRR!0vhB&#N_ZC@sz2^!%PN_@45|-S`cJz+*iB8Ir zC2(?l6D*#Pb-_9!PTp^m_Oh>GzHt-r!#2ys<2TZ&`Y-7B@k%@yO1=|%CU)c}HX&f-vEZ0~ zj|_9DtfVo>j+cVdm?bNQ7S(6Y*)>F3&M#OT zG<~_B6W5dYqHx&^m1O7x6Z55p5~M#cEomf^qEU~?{``p_AdT)%{#xoa6T)W`!5*ec zXwVNTY7o3l?KBeBfwswH&!qbM4+;$v_}kp?T$H(^ng6s;L-&xAL=RGh;v6ZC&@_bo z=(xFsvA!&tfuCsm)L+&kW|F*Fem23B{?pm7LEn$_H)+F^`-|+(fWz{y2fo&nh=aE{ zE34g8pA+*hYSOdWREyQ?e^UQ!uT*r+N+jR!(q)*(PzT3jN_{l*|4wGuDeuB(fTYRi z)C*5BW2J0)`>H3WF)>$SZ#rQ|xYV>u*#$kk$4Nb|2&`9yRu$m)ay>w%Vc3v4Z=raU zE-aqS=6SQ*1^$flq^l~C{CbevcG&2&INMU{)VOeaZViQI;m73qfiHo+E#{8*u##cv zHopg*qb>L*k}Z~tD&*IaLT6fcqFcYi5=V&O!E}AIIghY6I^}Wu=U4{ zwj46HqU;lIY+iQqwp{cIWuk-z$Rt9cRdOj1g^7^!n95nDh`(=0fepsp@6u$@sLFa} zf25hmdWZ#2g@l>~Qg*J!HJRPsaE!ZZme!hG2B&k|74{=13P-r8X{1+WAp z8WU%VQ4Gv9)We*yAH>4K6C))C#_;n>qAeG=i?R?u7uQm#274yw|LpV=CT8im5G(Sc(Z#r+Ex%!Wr*M1)$73WdN$ve22Il8` zYN*`XkYs!&G=?7^Bwkn5AbzuR7mQ3MRpulgNK+UvI_wicadF#?KoG;lL(61=BeHfX zXj2lb?-X4y+wbVS zUvxdb3bS1Dpa4BJ-`9 zv;n^)cd~b|J#DExG}cXt`puTYuW1{Lh|8jXtwfF|gC3la(iTjG->>estDl>LRMU{l~Z5r4o z9`Z~1vYxbUn6Bu1+0?SNPgsTAXfeO-L2kHemI%U;oZpBEv_2B z_O@8o?$u8v=~vT_4;AUh-`VI)IF5Vja8b2#FO&K-rn95Q5?9a# zem|be6Owai_QxbeaPD_mGHBF@+d?sG`9yy!wT~)qwTJn3NK1)0KUW#F%iJcO|7Eqh zaDt>op@L{4+0S|Bg?@KhqqNOQPSVl`2MHTjv9Ne6GV>H>wC3OHyvFQG*wQ%Lt>zt$ z^TKgEMHJo2tbCVI`1RDE;$Z0Z^7$M*gec1ywzq{>T^<}AeN>y0qrd5~BaHn#+I(9) zKP>*UJUMzSO$L2$2eu+ZKWfaHU5u8TZMhShK0aG=$jQQC^H(t$)(fZibmqHbYM&~^ zE8i9G>OyNw^(6RFC)mBK@Jq!RGIFmK&dfdvg3TzEk1GHC{xzRH_Zxv?vR8hVwuF%+ zh3v6RQyGpE)U(nFu;XdsF+;NOpT=4Gor4mx*-WH5xXcOY&hiP01o2m02STOP^>WsZtAe}s;6Vq^SnZe%D+S+6oZfp{3=tb+0JAT86CN?sk2XC|n#n(T?Z7xg{kP%@Rz2|Wr7;}pmf9uA9 z<#b$5Z@%s*h_opcL9a&%?=YK2n2N(ZhWPHT5w;>yhQxt*8@4=6#xZ3a@!PXhD7G;~ z$e{_VSe^EF-fHPP$|pH+WqhsojU}}cqZ8U3xt+(XQjuwEc4g6YjnpT%*>l6ptCIcejaaS3n-r?1-Nqw3o7vd6n(EF| zqn6hM)J>Had4r`=)HCr~zZ>o7RvlmawC?7*qCeyxKulvG7fX8|lU8y&VrOEvJ%1rl&pM5Sg)mGiP$>!LyEK zwqq!*LtbHA97QsnN-O@;wp4h1hU-E^rR%yGz9M5gsTHG=S0$?aP*c3)OD3(4$2hBA z&NkBAHcRryMEblUoZ92u`=3ZHsG%jl_F#V|r5g{}`xd^66H=V2SolJnm_t5A;H=LU zUouC*KAr8xSc1cE$R7A&HjLGv0=D8%RlK98k~Y(07L$33b~dbc>eU>fiV&T~ejLtC>D7n-8(*1{dK;t=LQ9^6`$pAixquLb!Y^N8DmM<;v~=s-@{c%(6lnf zPYy1Ggy0+=c`CCM2(3f^>WxB7rbCn9kCQ6A<|v8C z!iJ3bsbmtm!PPOiYqyu>;=94I^8vrn|437TNXYBJ?~TL#{c>fM$>yhWrd#)vUD;qpc5{oj}rkRH-BPdls1Dtc)~eyzgTEl*tbA=s(MOD;zh`@kYb|L8q`TdaQDcX_&o(IENa zJg=sW5qUcC`s&w%T}w*AMhCL7`btGHdy*At_inM=k`-@P4XLNYANYncfLWTZcRWdS)v64LL{T{i`|9GP=kkIUja)Kcm zJ}^YX2Zm_)zz_`|7^2|=Lo|F~h=vag(eQyG8a^;Y!v}_F_`nbi9~h$H14A@?;J+Ha zf1{Ou<$V7sI{A~a|KMSNdHw&8RjH+v5)l2|x@V!66gpKf#>6qmI6t zt)7E}k>S6g%BQ~iUoivxm<z*g;Pq^`B+{-C<;{r*CQWuSS5MM3?{QjQ_+afqw}6JENS^ z1Q;a{kbJo;0brCfcQCNf*)f4*Yf6{( zy6HUN7tvQJ5Ra+d!LK>fnwCI_aL7UPp!Iqt77gQh;7#P=5}v_IQHaTwr=#n^T$UJlL_{~V)}y}t%`n2 z6uU``UC$bvNz(hdsPKW8X%}{7M+--XEBC1P1#90>Eab;8fBX(l@4c-_q%7^o6-;(L z^H`&Zjf|CxA(Gt7AW=yUD z1cb}pO&D*`mEq2E>P@kJ3YU#wfwCcO2B*V~C4fd@#q5f#H(vfrGZMazb-+iK6)cqO zowyQq@oW&f{JQ&fCY-oHj z`{0@K*_6;zO=>;RlIVUe4Ws28z5zC?FRdG9>IVF8?k~uTr6e7Uv`o=0(j`#8@RV;t z2tg~WHT-yq5==+)U}z<}SDT42o6%++*%bc=C+lWqN^h`~Gs* zmw8^$y~|mNAEOUo4Ww6tM2(J_PJoEnK~?q!egp8|k*)(eurR^}Bqh<91-Mf?3dpqH zZ<2vAjpaXY{S>4*)*I>!-d2g5VZFQHaC66QJ=%l!vwqP=vzFmS=j4 z8Ti9rvB&7JD+~AVaFP@)lo?F)&H#yL(zcX`B0%1C8+F4@9#|-H;Xrx=xj>cdJsb&e zn1hJmDIZ0sS3s;@)B-3VZZFf*i%8#m6pM){rf3T$B|{aza8P3Inx25^#f?xr?6q3N zXoLtAm`nv|vX`h^fl$H5jG;da(oF=iO?)Bw#q%_@0scpb{1#myjs>Wqg zU+9lJQ(!SI3DWVs*N2uuN7m);TFZKi^&PeXiXsST6CIy~KF}srC?F&_(_5@`WqsWE z2C{JD`ay*N9*&+dSM)IIW82P#lX?P))m848-XQIEFm8wsX1%pfPtx6oIX!Y+Fdhil%i-wk4;;&@yqix>xFL><7*-I*W zyQ5LEObDamQQ_iiy&`OentKhvSWrW1Hans zJGRkEipo}@@N&N7!n>`=K(z^>q8@P__y!sSSx($7|B&RZgg3Z!!atxl~LVl^mAnZ17U#n^1hJfF0O#Y?9mV3gU41Y>W zzO-q7JoJlvQ`$KrHb+L5F{wn>?KJE4<2}{o*n0$pZPAX}rLf48_c!K|w4SWb>>(JN7;+`a|xYW(Z-JhLYhTpGFhIEd1oi0o_G0S&Q zHZD_|?&2aOC?#yWo}3$ovv^qwG80 z7i>lJ9GDU#-SCswwASYJRk-bSM$M=iX_zYqHH)YooNW_hEy$M_YJE8yQNOFKax_Bs z-<9HDHBf7ZDV>Vx8RoHDN&iq*ze;rLD+l(2JHKf3>=$pWjMXnBcx_lhplDe@phyP~ zQbC3CACn7GL8UPc-PoB4ZjWzp{4o9vg^^H^F3yi37L|rV0s(V)#jK*eCuM7`b0ydSd3Uz5XY!jN~k#5v1_8NZRRmj;}ku| z6pwmMPDdEQ5sT_77M)k~QW|v@fvabvy=|;{yMxrt*!8OV$tS?Jh|#qdllKSH1CJ8&ek2CS@8klsP)O?3I6oxH zX-h%}7sA9q3#%3UL^uYzJl;L9uKBA{ZtqcJkH-iL*RusBHXWIUR$Yd$8kMl+5hWsk zh~kP+Am@$OXr&PgL)6~%aQ(qSK87N21yHq7!K3ckfWyE{ZxUGT6r?$SMHWjsBJR(% zW<4#|)nbQ|(nK#E$^GX8JeprdHMQXv=e(ctQHn`5OoHL!+O9&;NbFBT#fyruo?y2a(iMWc{(f%eRk0`aCF8-VnV`>6rj znfQ~%*?^yu2mG8O;OB-zNn)9g`>lqF3Q&xsKI^_M_y!nX`A_2)8I@aq5Ft$WV(;5Q zrGHd$C-~mb)o-{iL zMJnv(-N+U^=pIYoO>QR3wY6ss3CMZL^Gl?v@CT(R@Gp5u+#&cL?e?-Qhh7uLX`oVB z$hV!wPszU7nhd{8mw$LXMa3|C*8Mx#Oypg$g412fNQd3tzX#R2`w1M>t3&KaK*Ukr z3kZU31k_7s;QfdOzdV(`G?&G0_UVl1^=QMj_-^%eVjuPS#NF03iOHm_RV(hf#vGcR zz}>}3Ry<%zTg%xtFU}{GwmU7N7MBsy4~=ovlBlFcDf{hZH>1R~wq;RXb-r8N*v*C5 z5?CdcAEzkamRd7LY$jvS*S-}}(1d>5y-ae=z!7jmZp{s)fPSu1mhGq`GqbI$g-8aNL}yKmxAV? z7fO^n;-I*k+b2sXEppE>A)!oLVrVBJ(H*BCPebA9f|Acco}=%hT**V8;{!ZB{uQNM z8CM;}niXrQtlqyC@!I^0JI_Tg8CeKO-V}ysx{`;?U$MiN9r&|8ij&yTP82B-Xa+-d zRAqK-40#C@g&8@yIITEAlzauDy14icBwgB)Y+^*p3i)Y7rN5LW{9A%19mJ-F=f^;wTx?ptT zeC4-U+*nwJ_(r+2SH5M)p^v|&TKHo~%_L6$`g=BCCRVBG8Z1lDGPBlpTxx!Iyus?G zyqAC6vllcJs9-2ZUg{h{<^-d{cg4)ZL-OMr?|g&l5%3hHnky6?-3+LImhafhOSJh- z3a$y$H)r)vb%|4h&-&f$qN0;soTOIE(_%WNxJ42;sEvLiub%~~ujFP$%eU759KB8m zxx2jAnuT3adS2h>j*twsB4WFr`Eg1bD&17zCe!Dk7yET%+ga}&BmG&KLyP*PSCs=V zRjq;Yi}wUxVYYf0-jb@5#`K@AD7-_Hpsq3TR$@b}e z!tmyoLqz_=O*uV~xXif$_T1`f;=kd}%ax76kaIXw7y)12I4hV2)Pjzk!MkjWp8P=M zq^aY?gZ$W#T7yNMO2U4`dBQsq#^JkG_W5plv@{kh48m^horTThe(RqdN=<5!2An4B zG10Px3eG}Tm&SGW+V%>m#EC9<85;Zf#$EJZeyGrkE^1fd4D?^-D`1`4w2d8`{JHV^ z)u8D0-*BF%&4mA0&;EZv6Zrp(^9TU}+>ERp9Z3GJ)BmFu>Jm{~bG>FDX(*gO6!OJI3|PX8+wurNLG9kzc1D}XTV-vQ5)8UK}O zuslJq{}nqx0ABhFR{jMvfgiPU9RD5PVgA?d06*$5c`RoGIa1=9x~c$D5s zCbKc$H5~l8Ob)xlE1t^?W?u08bG5@SJC`s#macLCE3;)sYiIb!%<$J`c&62hLH@M+ zi-7sIg6`UY1)uA~w)3>sAZHgn5LZ}+_1Puk^72W5j_1eg3wMW`oi^D?9+-vibKiKw zj@KvP>u%B7mih81z9v~78mESF--mjqD-^XEa~!Th!CN$YUxMujNW8W&KHi_59f-Mi zI-v{njpY&BT?7d@RdJtehO%(Pe6_tfJDniDT=cx1IGAWlvwf~fU!vdUaeWiU;O8jd zPtVad|ApHrRKvq39rgJBm(TnJ93h)k$;s|#EIzHkat&bJo6de;36LT=DO zxZ=8#npwK!+jgJK{VK35S6JGy50-0N_VoN=Czn4Qr^t4{oo;0qzu) zoxA1&EB{4?c_;KvayhMyP ztm2&M`kQlWl-FQ&vE|8?YJ1F1kD^l^FzfH1>E{B!2R*BZT8y@Pvbp@PXh}FqWuwvP_-odLU-gJr3$}vm~`&zuI$CrbWk4@DGV>Ua$vpGZDOQ(#P<` z9h2H*JM)PcR>d2|mdZ-b{(U_}veIbN3FA!%vo7({L13#V6+^f`;hD?3G$gXYKx+KT zutr|=ZbA?IefW%o*MduMi)%abOPHV88E+7JKL3#^Qdr}zlu5N&Y<=I_PfNIfi)682 z!PTQ(3Ig zXFHqb*LKDy^g=*%pj0s2P#?FSDG6OBW@MYCw_RUv?6I4V`6!vGz)71@R zLQ@Y!;-i+y6ij%H*+C&k`XLxePhRnPvatU1N|Z8n8*QP6}MQXmWy9DcX_P|Ot^tRxeRB=B?$xG=V$zlRg?|3FRS zXVzcAi;gLnlTV`j!rVXqm!y`Wx&sA`>SC&PKjLn0sNMNG}fKbgk3nJZH)B+L`KV1F=uga#hQ7 zs1jeb=Gj2PbDl-x>Ukksg$Su2Um%W_(NFiWu5?yATM;BH)VxoLWkM`LS}H=FE?1XQ zO!qh6TeE^+O7so1iKUBgSWtxsfDg+;kBDboG!exu0tc=?jIK4YN}aoT+H0H19NC+u zw6=vGC~y>usM2prCqt_?VVALfqPHNtkZsO*I5`kn9ZlmM5LgucsJeZJN(Yas4#$6? zd-5gs-GE4EbB|oz=4ZEzGbJ0tMHzehHtbkyvf?`!5Y2OW9(?@Z0APm`B2l6!-VJN= z3pReVhA}XTM1+5?lA*p=8-`fjOr~E;d~?QOT__Giui2j+yZw5*)vB80=FLTs8>X+x zQ6`P9fr&SgZEcJfH2C&16R9W2uJLrpj{fUMNTVm7wgJmagKyd_|B!pSHw7(+n3({( z>POod`686P5GG#1u}K=QUAldqpYEioGaiuR>9Mk4r@a?isJ%${)yR>|hAjo+do^|J zcAvm2YwRg0-;`Sv*E*kqI)#e4E|ZFhX1I<;1JLZa$DT#2Sal3y226DLa2I?{Q5H}x zqP~E2DN>3vD+&p4rTMtwUglD(o~zy-N10)c%fX<(eR-wVLt@>bm~c!Q_<=Z*dXiG= z%eCKdMr$wS7Y{U{d|4cF1GgbzRm3S(N0I!{bHwNhKD~DMm-`qrzIT38y34&tf2T;w_Dv39I}IeNZ7-YjGZ3Dd#61n3{q#GUG+LT zNa&y&@ciK-#Z{k2cL@H}On6@ZDpBaI)FwJ&vV9=zKrp3V<(l|U&EIdq>a5!m9fhT^ zMt=VXcV8VB<+gsWNFyPobW2KiN=So*bV+w9T?QZ_AR-~sjS|uwf`q7qbf-vzq%^;G zhI3^U<>hnQYq?K4w0WbBT76Pxoo z!qu3<*VUHdNegmHG?ED0aoi0l!0cu;_9czJL1~ri@<;&qmBOr#CHrG7pWE7V8sFTX!25YjcZBvU>`B^H2?&dO2sTCSr5!W@*f|ZV|DI*9eLf z05#TSayRta8jSpJBCrci#TZX1pBL-ViZ$df(c_XM>-9@@(dqh^Nq$Zb$S=X7E#fd3 zc%|lgy-G@prtnh^qrKwIyc#M2jVy_<`0(X-Qa1&MQ>1PZJ#unBSbs%{*<7Q`)Vg)< zQ*L9|WnbS1W~EB#6JnLqZjx6kiYsL{RIDjOJUtbY_Xr{`t2}yOR;xrfA=b`hCn)Y< z=^QniB_c(*x0@{1too)5Blf{;nG(~4So5@-)bXbyOq%jvGf5RG9fYiMf2!^w|72B0 zmF!+wDW=CjhBX5EWQ>#Z9Tc&c%cB@3A%{A?awmZ1@g8Jjf8OdN@0d{uPe)7SbK zG6I`mGnZKt7ZtM*Lp{Cl*^U)?6fr;GQ#*DtVt&A<)I1yWU#n5?E@~%?N^`>vmiX>J zDqe0JEasbQj#$Z(lklBrXYW~`au>9Tev-ICd2f)1kGM~egn+vF2?I>Znp&&ukb&8~ z;ga}O8N5Yj&;5K^GqSe#UG zSae}+c=S@HiP*ED4$D#QVTI0JT}j4oSZ0Pzd)Ko(;RLWgL=GyK#6622SQ_4pWiu@| zeOxIp{9q*Ux#K$?3K;U4Skk9=<@>|$igyRZ-hC+6#-p#?#*+lR&wTv8eC9hIEY)lC zO|f^&yYIABySDSJKX?@U#i*_Pre}Y-O&gChFT9=|`OL>TqG1%^-N7uLIh8iNpwU{% zh*;Ea8y9)p!Z-ao^MP?~aMV_vIPP|gS3b>Y+tpvy$zLxYhn24|$hcdF^o-gXlSa3u zMg190R$6xV2M>}yo9z(WDf_;>u9xFA=a#LU1aXFGC)zAClu@&inPJ=<%W8nr?>%^ z&Q^znW%>}yiIk2M7H;-yR^CMeCxn+Yw@q&dTPa~bM~9`hQ^L-ZReU3LP zPQaVr0_;~_qKtd>M!gp(2&)&k>=XN@&V1Yk(fKwr%@+0@m^F60hv^yE4QTO7*X3@~ zCU(+4nqpOy^$fiO(`7#HBgJ!`H+3O3mNYP)`8`smg&fs1Y&Q)xa~wS51v&7i6Snir zhcNw?blzRjzAo2J6E|F!mEQHHN3)gd^)zg*{Dq_W3T}d_X-E4+Lx0;$Mzrm3ce@*} zJyzBUU^&vWm^8J#$F}*kVoPFSa(s}$f+_oPA+c^DV_T)Clum4^9&h4|gpzJ8V~FNa zScOacbDo~g%e{?6qjh}?lhr*2li{eP;oM70@}3)O&l5>@cRXk2h?%v`F71fKRhMdV zXg|k1_XIDun2%$4dPh`fW4#v@!CemLb@!5c){VFM6OkADhT`y-*X&YAc3syWbuAe$ z`+hs;mZkD`Zr!JSv z@2#S|ukj+b#TMKy18=2loh{0;oUscg#w}gBAN0rL;*Pq{=BT1x*4wh{9Ey|hLdRqD zx`s}zyP4tJjM}Gl4L=0E)Szs1nO|qsf5J_u*7ofI-q9gCIvxDeUu8f3Pu+4k$$lJL zL7jEC1Z)!ZpTqY5a<_zo6?~}!xJ$taBq4zR075tpAP?|k>H+9558S8FH!`}Tch}KC z?^K_6uvZmS;IM#F5Zr)@5E2iNANesO^RIY79$Zkt!wgEzfbW_>j1Q180;NPwL~;L$ z2U;RMcCa81_-e@UVdnv5tbjrLp0WB@JRr3wG{%ShSTy+~U+mmmf6Eu>ZWvVX97`ub zcY{v&V&~%gTfRW*RH)$L-~^}ke&maj<8S!_dAmUc4?D-{`NhrwT%!U#r~b|t2Ptsx z@h^$`g=fHjNfh(<+%O=m2V~!WIitXOe`qiSDB{1*C=OCU*Z!AN32Zn36(E3;{69+- z0EGMJs=>d-V6fu>RDf`Df1g7D5H3*g{hP%JY`FjxARHjw`tjlf0O15j-M^SM;9I-U z0Ky3@i2tnG03?vy|9DJ(7vHRGogqsZtl(?IPyqt0grE^2WdY;hpF#qy6^Ij9{2;mEh8xm+OJ)FR*2gwa5 zc+vTDZoqfPq4JOb%iRy$aDbMZzu*RZdmSoBfQ9Y{ZrH&Gf#2>6ett;6*XN-E1XO>7 zm^WoKAf!6+?6Ikee;D!aX-uw+W(AxQP04v=O+%SVT{eR94w6^>lz)E+_&B+d% zg9jX7|AHWBZTLBWfYdJW;yZs*y zLmYs50*JSNK^3$DE(bd};DXj5h_L~*Eq_JT57!L-m#sAi8z}4o56KU30FBFEtVZlV zBtFi%^uWr_!TQ6chb66n5F)_y27Kuuy&Rj16p@)NazEDSzQ=v6A?Cz$_J<^rIDO;; zYI1m88W`pd9N*$?3IdA>IkR$ofJ+ZNl!qP^{mtj3#c&L{y|ylPgTe0#H zl}Ur^SQ4KcX^Xbo-!09k-Cy433&vpme2LxpsM~b+svBO4zv8otjveg@H9~7KdiTIL z9`-ldsqu;9_z16e#8d8XQw~2pnmkzY#5XYa&qHvTqC5-<8STmxqUNT_p;o_&YM;KJ zF5~6uzPm+1n8~aGBe%Lm@hVz24Wn4(A4ihPs)M!ESpQxc>($ZH zT4IN~3>3xtk@!XCm(Q*FlRn(U+&vd#PvvlnM$%d~tv$ny5@tVY;)#kILOOV+ZA+lJ*=5rj^h1AOb%tW}x?I6dJ>gfJO$ zvyvc<82jn3#^yxZZd7{4vCF>dqc`trs4>4=?`GM+^YFS9|G8{m3Ap(nd5e9#HX)v! zN*TG^2XSdb_=*^6{%ut%hWp=oaX)H(yo0|~_vwlV&d7A?TBxaL0=>)?nht54i>V(d zik;eG9$vlUFG6Q-P~AnrGfP@k*d$yB(=krk!QE5_BcA7w;uHys%fQ>vi6AG+FOMKd z<28Wt^?A=*_E{-!nLuy;phgUPV{I1dDlYLGHRq@q9?3ILDaA3fnB@)A$eUSu;D{zf z^bE>=aTL*lx|*>viy&vnFVE#($G)(AMLS(|H64xTTt#758X-m!TIs7BA(juN z8@8^{<^le=3;DrHUFs0C2RT%`c0v!Tt|8CP+QgrbM^F$ zu?SR;Ls^Ef=j7P9BHEr3-!4|Ae`JuLWeO_wX1=kpE>bJOn{SeiWvR+5Y?Xx7AV1si z@Vd2xw6Lt(D}}BJ z3%Ko&p{YgN-eQ3nU(w?bd#mCp578~>eyq~+$)12)+3Ai?vL9Y?yK98gP!uiINd5u- ziUu6Z6AfNQ93+m}XcY_{b+~-sFJ65dvCFDb?24nZ*Dgq!wUTLDE4J9QCL}cl1R5Djq$veb z$(eqy=T>D1SOhdKEWPifDR2sRymRmZo_E5kyDnd%WuGQ>R-LSPMorsO_r^1R$=xge(3izzpvoQi;{O1p?thI6;NOm!>L z%44K+ka1x4+oYziR>39CZxUA%ENifaG)K#XCf5^h&?c5-fG zyw~ADG0!m^mX%lO?zH3mh2ZJyk!w51m3(GV?Hpr)`z~5-HcQDmUS0h04LdFR{%x;b zI-t2Yglsa0a|y%MKL`sU;bq;?&@YN0TZ|Q#Mm;d{ALD-$8;j90dv)8wfnTF@CoM96 zg6CdahTQ(%gAq1D=cc{R%^B94w68OE9GsNyM7FP&Dl^J$5^xMq!-f54HGH{ z$p@w@u?|QVxU;heX|1hQ%AVOXd0NZsHpu$WD1;J-n$n49n;KtAmW@DslCkoF#QO=; z)kN_Z$X>B^pZn2oH3y0=jTbZQOi~i3c5v7a6v^OyndHAobxrUP#o~OCD606XY>A=N zEqA5Y9Hflf;R7F3#igS!46LgSak;!|#Yrf}yMyNGW#lh%)%Id?6#3SLt8FEOa5h*i zGc$}OHg}J{ZJ`K_b@!6-L|rsi8C$I7EI!JSTZ%&1rnhvGAldVsL1?v6C!YUe!sQ=! zvv*e_f3K4(KJdtNZ)9|G)yqub5-V3Grb)z93 zasq#FZ_g`GIm{~q$`3J32lmJ{O#5 zQ#G1AX|i0Mwv6FE$*s1}Ta<~Rs656e4E)iT86!~SDb2);9MZB%yR!uT#Zbm_K=+37S4V^ZGY)%o2};t4R)3c)@-}$TqBn zJY={crUt^cXvy-R_3XPm)WTK zy&0U@G)m%c$RCJD(rzf56X~HXz~n zEx$C%!>YdPNb@?HvO|LS=H2batv!IehWyi(&?6)k>C zo2ZMPqmS3eZ9jBm^}6&9GvQSzuF1S;9%9{iB@oZ?MCMV=Vxwy}=%*j^n~zSTzp!m^ z^%-Jy$dHRK_M?)~+cFTSi20@n^hT9W<6Us7Y zECuhOJ1!a4@`G$d@Jp`?$;S1kYCw9+s1c~KBNEGqr7))w-?!3-gXjd8?X~BcYWCuOQDFQd7w`X=zs>Q5U~Si=i>?^8*niBan}zRYo62>f6gm_O<WMqJrUVlXs zv{F*6oZnMY5MY3c@ZZn`t+W&?$8lQfhuOpml!O0uh3mGw9!1<(Wm2B-o9G_i2};nap!1ZD;NLqKa2#}8nD z67XNp1U3+dN}OT-o{xeU8KD0A7qbcMVh#;3EIh~8f_|h4r~&^4O<*f^sDJ^isZY_w z0@Q*3h9+o5U>3kT{6Bg4@3V;os0E)v)2aJXU{`sl3=QBP4&Flm+pCkOh6ShypFz}V zIM52hEbQPQ%mQ3HfP@2-9KlqbT$oH(_e9c;jzK%l}85Mg*g zU;NLA0AmAsQh2z3y~{ckg~6>zpaKMJ90z>ye}J6wjQf`nfmV3oIuSS@Qv=dA{{=PR zW-L${5s=~=k{Yns`;Vz%2loR050JCVj@&#yl^u_@)+?_wXU;`BCea`v!h8&JK3D|R z9S!*q^UhE13*AddK-VN)i!V&_znKa!m;xq8Qer%)sYZ?dgDblBTVD7jboC{)n=YyYM)(HsF)T43NC z@$M#}dk0=Jwq6I*TT9+)+po>U=vjQE=io^} zsFR4&wLnx`TX^qtC!dyyf8gOD+Ppg2a)|cW)3*f8YyeiOrn8RY`16zfCA9IK~r z!wz@e76hhDym9Rjbb=wgW;ep@bN`VEcAx;O$l$Gqf*l_<+ZDJ?gOHalhN@A`$Z@G) zUv)t(2}VM;4yHHRE-cWDA*-M<6R^KM$lvenp)XJU(%}h*YsF?tM?6JKvOtvai$I}4 z%c^7|*;wPLs$`>aW|i*Rs zmc4v(kF0nZ1b0!Lr^Zng1|M^sRVr^5WUUZ}pEnJ+;UZx3{R3!*f*7P8vWkr8gX`mD4NkuhB3`k>=ciROitt%V*V9- z_$4}n{`z+>KI(WbuTN;zVQhDRiKCc^I+zmY)a>yheO+x2_JbgY%WPZJa+|ubp9gcV z4!vEw^g!E~t~;gKyiL>j5>fR4W)DMEt;(Ww-6gH! zZCZ6%-qd?yzn3Hk4wEUh2`^S0Btj0|S9fB} z;!-Ju)DE_EW3h%q^p@KyS40nO7=u2oj8MnbGPxf}j+tr95puOZe*91e&ygZHlSjDD!Y0C!r*%be%SgyXJA8cvhgVJc<8h^f}>B zvPBuwG7OgnbU#n!Rb8*L5Ib6-;fs5WUS*%|u?Y>sPP=(=cL#ss+nM04C)k-_UTW#x zo~Rp7+qWay`zFyFXIC#y6UYEZBboVl_lRfW+nxG$=g&;2YC*ZKU%Tnl2_@X#;G{?* z-gvpbc5h=3X@xq-JK4}t;%lA}rAzWhIxD8E6f1HU$v}!aEMt$Hk>O_&c%HLJ@iaGH zYCWQUPdHYk2K>c;5&LF18uraF<3K;bviQlDPv|og{9Z1Ka`r3p53r3W@jJptY@5w! z(uUzjyie_(RSC%mzH4l1A-*X5g_*i!%0&|9LNnHl@b<{5fPw~Lhmcj>D+X=(hrh0tYv(534XdrpFMq*n6GWukEUdVJV8r4jjvFTT&VXCRO$>JsU;dp) z!2{lqg4I67WV>z0a2f(HBC7Y|^W4Z6B0SWL8HVhA>xIUpU59(^@zQg)M|6kq8}mzi z-@^`?44Do(86!yzRZ}@!%kCyEy|2)zkKXx+C+kA?6|TBKd$#N=&gbaiP1VT;VCmtX z+-}T!v83Pl^{Z&mDx%88woC(QkuF zj4!LT%hyoFzrQzYUpyr85ytV-_K~sn;_5)L+giVDRJVRk$WEyt)7JK)rhuzeMjMKy zqt)J>nHHR1aukjI5U3Q|H=7|xr4EufuoVB@sAEr;AV`_00JRcfB*tg zE&Omg`8|-+&%%Ev^Wg*u7LE@lCqRy63y`Oi-vfbGZRuFB@Dnwhr&J5S2Li2>CWKxA zVnjfqg+HVQT6qPqUf~oqVAaB(Q3I_cCMQ_0@G~{1L<_&C23pxm&J(!;1T`Sd!XHut zt-Jy!NUm^-8n9^LPpDx7H)VxN90AJ}ex~M>X5n|#uz|b6LIVhdS^==!=LBgL{)iJc za6ek8AOOh}{^5k1^jM(qXJkMtmL5wJj>!NJoYExxo&{(HQ3y2xzyb$IhQP|qc~WKl zJpyP&Pp|?3^qr(EAOv9T!Jn}Jt+08lI{3~4sOs{AGUWGT0IhflAv8E?Hp~GM8vH=U z9b@m4N*xP|ZEwg&uo4{0T4Mj@!@}k7F-~pLjX# z%1Ry+l|J^hE5lWiZ+y6LCl)^EoHTHDWKZw4?g5I9a*H2f9^wBjlI zi8TWR4v<5`AMpaUHdSC}hU58ig5%hr;ZNoZ)cRDhfsGk{;^nkI!|!;3nw>J+i7x}h zc!2B~{)88HcF1{qc8%{RKjkIOp^z^ns5M6k^?h*3>X?o&f#=wsjc8{OC8CG2)52KY zPhCL|=Y0{rnBNqy4cpqb&&O#Tmf#Y`a40etdU%cg(1Yq-4g&4Ni*-yw9V`FMcm&m(_J;UEY|Zn`ZlF^Ps=Nq&|ou~;{E6{r<7icip&#dI@+f)`#a6f zGBw)=GtGTtbJH_Ng5>w|obu1M9btSYqMfOq{Llub;dYlBt#~t~&HN_bdVQ68QQTA zwyUq3#%_Mb3z!OJ>?+(SXFt64xoTWb?KACuL%z#W!M@~^DXET`U=qaF`PwxN?gK*T z(;88mTV(`SRpRw{?tKn0M54EP9<94CMkBz~Ur%6-$+|r1)MN9t{9Tms^1*Q8Ga}A` z9^4kjvE^~^pr@_$M#L$FqyCQL?xSB!`fMZn^oSF5pBP-dj*zpGGwH`f9*^((6(yWw1+_QJ0%y67B7Dbnj^!(A0+0?v*y~s?f-eqCMw~xqIh+ z&9xf_lWbm*gtqH+aKkhqvn7-P4oL5#@G)c=gK) zgI3)-=dJ#X>-oI@(T=utK9w4`j^t>hj@5|K!n-|fOp&OCu&RjoKqOk;BIdLPRUWCn zc@nzzC^4q?bXbQSL&>1VCyNIGA7r#k?IsLtHpO8btXP%$gTkNVAbzF!VC#Cj^M1Gp zT)-;j5Mov8CF+ZeTJ}5^33Ts9b6FQFAV9d5`9i_5Ns;~kEa_c*> z_3>C1-!B)J8Ocj85V(@#h&ga}F47Tgizv^^r9NmtCPhKDWi3@wFLq3N5n84;{KjWD z^+NZOZ=tvr4Lf=O!2*M-j5P|!{eYVW5el8RH1i(6zbO&wvc*k}kac)%zb>9Q&ZaB;F>#Ylc; zMJXlva?jQ%;6qtEBl&WuzZ&DPb%EQhFQlYsPegfW_>Gw+49m%J&G0TgZib1yVG~3C zc-0Ce61mZc!TgoAh7%68Po3H|iF+>l2+m&+8YzT~(4CRfM7ksB!sG6@Yt?ecm+DXt zG0?`nlbKDo(iUMe`uH+88llXC_ZGM>s(U<&vc*K77*my} z($n`imbjGA)7M=zhLaN25FS)lh3VB?an%rh@d2jgmj3HpQpZes$%O^vFbr`$wNT#f zi0v;+A8x3rbz;1vkBIAykh}Dl{mQ&FT${+{t$Aqg3cX3V+?`6_p835A(UYJ0$dWmBv_-8P zkEL52eK@{!*P~0TlXIhUPl=fC9(AFtgqA;PEmjMj&lL|YjC$<)bi?c0{0}gOiF{0u z^}9Y%!16ul&~>M0M7+t4?c?NP=(o1zj!A{2AL@(|-=HYm?{E>3dQ#!NR`jGPh7B*g z50*X6W{&I}%9fx=bquW&BU)N{1no^_#8#X1vU2Y5W!3apmzSgtmC=)5CKYl@S*MNR zCxGwdzT{UHRi%<|+7}^r^U0m7xKn~#TNUJLBwRsFHW@m1>D$ud^uOIze6^Uv|8PLX zw2Lhc$QU`=-;7tQI@yp`8pwwevb zE~kC?aIp8*wC|0Fd8BGGTy5o7@RA}lsuKnj-_B6ra+M>EEt%l6E2H$*Rz%-(WSgms zW_L)hjDFY6dA_eA`c^%H6I*mY%7|>!QJc+Gw)YawY^e2SaN9~;&!k<{xSqZAlHj_l zu>D{}mTvFK((O10syI7Ag!p{xg67ud6kI?i&9R+fDS-df5W{-!l1-MSmN^5uoWw03 zTel*6Tw7HXbvD6Dni=?l&W9x(Y>7M0N!Rf^ec zp)Ws03_EGkoH z8E^`E)Z5tC3l`}@5WQh@w7FC!8Vg@YVdHBZeHI%Uh9<{r&9V!cAy3UJZCQ;571V=9 z=oy-vfH#$^pDyX@usCJYr@M9c*W{*>DXG!%<X52kW|4JmN);3GL2F z--d$Ud`6d0XPd363|!tAzx;gv{78d-n%-L#hYW<8H=n=FnxN5EN2+~_Bi?{{*4`n| zO7y}#<#jTjz&PC1d)K)xIj;syl2>$j>)c*LaA32)%xKzZu6618KJkd`Fq|t7y}VZ7 zo6l?xSk2r>MA~hET~6f8I~OVf%22lMsK%CHK4>B7kZaKS8dYfUDi~2#;)xykmfb;B zx$e6jWXUnQgcVX4<&U>(W#Q7ad#1yq=ZRsuSV;NNW%0N^abdJE(1ELc?j{uExSirb8Llq7)01)c^iAg_YM(ut(>p?szi7C2>5@aLih_gIaGC zHsGS(KZkILO*GhA4DwKMoW-*~{+cJXIwPH7i^4+L5n z0ib$ue0?3rc7LxYvw?JrzbJnE>S2XeN&u``JVgyyv-n4|25R1B$9lz|s5z}y{4F(5 zvo?d!DxOfo3eqb688uL|HUsMvf2QVGr}$^oKr799tWi9shMSc2lsNJCoIoq2LI@Lq z;t*Jo_=jXbE0%)Qi2slQAOOn{|BMA_1<_*(;&&EKX%BzT0<@wh>xu3V!~#fg_=hY& zD{O+rh9@k5Rfd1Y0<_{KpaBI1ZjeIZB(;57VF*qc{vvKe&65m5TnK>!Brg1clHcNh zR!NElBr61cC7|tr00Nd3LNfDPAkY%u9}5bBulx}RuqpgW^YmLJ&PHpcPfYV!@xeIV~3aEj7@Jtq?N7lbshxCirK>K+W16 zBoO?Em=hdemEa%o0yP732z}rQ4zNfNkT3r0a|$*4axRcM5co#OqsnQ8;P0LesF{~@ zooE9gM&pz~@V7Xi6+j@Qfe<);?tS_j80_qjllIJ79UJFQdOXb$8-`NUnz4-M3owe5 z^CUFLgnZ5AHkLrCjuQzc7DjH2gof6fQu@WnrvZD$&fcxT%GgUg0YVAv$#ApJYd8bO z#t^qyu22E3PpyPJ$`2OcHBsdBw7g7H2Cma#JhJJ-Tyc{3Tk5+v3^YDnN?;dx7b+3D zy!Fz2S6m9=wph@0@ow?4dplkq06pFupvQCDn;YZ8Cy5)1WjW6uy}f#MIP%`t!(Bnt ze0H(^R=R11!(bre8@y|YEAiD^{i=T^ZLN8v-l*+Z&4gI-b)l*we~f1d-6q+XO7xN@ zK?9?;!-q6f4MNr{wZq|;+Qx^g8e_(eY9?^jU*xJM)xF2)_YL(6y-DfPoLe9ns)Yf3hZifC7bS^#w62zJ}j(W!kXzO(P7W_dh|%j*9s}yuIl|7c|S6r zZ5WTI{Ne2hYmN)+2WvUOX?q_nYfN-rYfYGPjM~1h791jCq2@Ph7b(})SDiDJ`S|LQw#XBSM>Iw)7$z^i*2czMtFeNQ;`y9EIyv)7t*bvu z31#;@lewyQN%z|Q0E4t9m+>%h%jrDHS(?UW71Y)&bLL$4tBJWCYyBp=YB0(59tu9kw}U&Yf8cJJ zL?AZ{+DD|7V%4WN-&}gImslCi`(UL`eHoMbjfGwgWgkxx!+qk|McB^QTrd3I68p49 zWKM=I7o@n_R^$7vZ}lWHu`=WvJs}g7BSSS|%e#WXC5!Vd`TUyM7wqBD8JNBoHuVeL#jNFFaKDD1qosu*(Jg4+d{n{z!N0#j`AXF6?aOO z&ty@qiPMTxqe?x-j9m}@!NeAuAjU8mdIeJS-m-z-mE^qZgB{TY+*Q*Hu2T*r`Kr2~ zRr2s+)aqdIUb-dXgv%C*6g*Xx1Y8Q;?j_@d>GwKKkPV2@Qxcl{8d2ngS|#IPh7^Sv z@#S2(|3G!#II>v<^~1Kw6BTi|Cb~@d`#qX5wDj-iF;%O29D`J!Kf@#Gw(IxKE641K zR}HEsoeNQsG%Cn0KyEp=f1Msas^to=D%q!Zbd)g~zNr*hp;otXFk7=lI-ja2sKUIe ze?zyUWEjC4n~%)a(3MR(IZ$?C#(XIK9hQePJd@8Pn=VUhc~!|4a|5kru}HfV+y>Ii zRB9OI&k0chV#$x+r{@p!ms4Kq9_h<_%FA8Sp)S1rE-ZG*c{;Szs;sr(5{%GI1!`*4 zvLjLA72>9SBAuq;9>>1Ga?|OYg#e|`7QYN)lJXXE{WJdeh%v!P6C%XCo-dW^F-1JpX`Qa2KmD9bN{F;~B}pI~ zyE4*`QTtW+O&P?u`e|jw{0*D4z~^X;eOjA*?8wjsfPdFVqhflzC|wIpR!rB6lx3(7YAa6>% zXywMCjoVYj%uWQemxZH2sV;h!;;g7713{lH63oTdR`q&Ru<@q4i@N?10BSY1^EJ@KBDfVEswUY zhrzLJAcQ&0q8n+O;yHd{`P(!!eeYJM9In-NfvOVGd>(lz12A zOB`%ScHxD?Cdu<0^$U~4y3tS{-g(K1IQSL#ZI4`%2l9nG?yol#BcMK|cRD>z-Julrc^upmHH z0ho%&)SAM;B&6X3Ca63xL8a;ILW&CXzPMIpP2i1PT9^c4lD=oHR77WpU&qbIwa$S2Nyj|zMv^Q zCq^&4bV-FGCsig$b!#G4^+ginr*1KNzORh-J(qH@^&BD+O*GBhmR_NlXtsQM#o;DT z@7TT-vq=;k{A7jCV7JFG@F=H-B3;Yn)e6mCe)}fT`Q+@F1Fy?&)iX4F2VFe9FuXbA z8V(s5wFO;5Nqj>2usI|LkLQbZQx-R#%;L(^*&o=o19iBih`2*E9c^Bo=ANtkkC!*X z)tq*z9Z+2R4s{l?KE=f^zn4Gqu_0TTCCQ8za~{+Rk2}0HB0Y+??w}I8g=3sin_Rea z0KEPNdW~(IaZjW)%z0w&755VLKcCEYtDuW?3n(aLA=hpZ$YRR9EDf_? z+?hYIuj4p%bsoGMK9kCSeR5Kzv#LH~vFwly?5Et(uz?^E0c=l|9Rs@FVi+BR&%-i?B7#V0qV2CUD5MWNV zNIY|7pyoi%1v1+L9^fCmOu2w6!LRPA{BAly&4L`lbKqoX&h{KQO%&ki2A!QAgz*3b znxESx9v7j1H#AW5AP1Wd07OB0b)M}#aC&5*=0Of&KyWfLXB!aw0u8k4pb#zu5NLjG zo%k<2L2G$}=$!a{b>ckJh~O6^1Fhu=!i@l8WX^OW_yrnhtxph^1Q2L`Zlm}wJV9%H z0^1V&JfF^VCHTe2Kx=(E?xYBm+WzCud8RADFMvR6ZGx~S0GmL9%?W@}`o69D7j~c( zdQbW&f?=HPP;h!YpyoRcVN-AnT2UjTvDc>uz#;26lyZ4=KX25NTWCtVYdVVr4N zaB4i*e<)a=Sqo(6{JA9{gl=zAlH3vIAxvRRoOUUo+sm_7!tMtb17CXIXxUO{TR>G{ z=fm4SQn1osYsG!u#qyxQs)6*ZO5Yn#G`(}o#Y~UT1Rqd~@&Q1F$6ZEX(PX_Gt@qWp; zIo9%qVrj$d>22#T2C%bpQIwiAVJ?dlo-a7l=XjQM`$82tiC%mjK;JM&Ir2mDY4Sj= zMGe<&3EKnxTaZ))hd>2B_S zd~5ho&p7z*Wa4ca3Z{zsEE(7BvQn*LJi*I575)0L1ZV|@&vdMxF0M_T7yNjo(ltUU zVlf17A!J1~CPw-4DyD1FdE3fN#jkE;z8qrHN*3Gd(Xum>DCg~OqlxKkJxqkUV0M4Isp zy(5ws+Thya{Q%E2iF+L-0pASYlAn)MB8zF_in*%lO%ET2t%*IP-Lq+toNm@JH8`P$ za`o#~OT!kEaVtf5)J5EgJa}XZD~G!xrOgiRSDO<$669y8@3c|d!Efv|U}vy}P~&g$ zmDj8#m3&6L%pID{N&TP!B?^^FJ;CBUtzkQrU2E*IeaqW@|pgK%k@Stez_@2Pp_%kWu|l(2*= zsBy6T*ao~h3cZ$a`GT`^4*K=d?w9P;&B)Bt?#SJ^tWDPWupV70pJh;0)8TOoGfZI~ z_lEEX{rX9Ygd09r>MydV^v~TbQhve%>J*%dRSD``n1^2r|o+qE1R9QxvZ* z5kZ3&B~91a?A{F*A-cfMA-j*Ws_{!RjO0-j$uKqM&Q7McU&i-r-GycSOk^Q+p7LIq ze!9af@>MpJnDO_yi`ITw!dzGI)O2(xhadQGmy4F6W=Y6kAo{H(H_CF{ssFMWtzm@A^Dqv}`EYP;eSM0=VMBoS>Q0hN z#WYP%U1{Lc5^OTHOT_I%rCCeWTb8~qCxjyl~sL95-HlCY{5iv958{J0*Q%!6c*ykzma*?$= zhCCV@CrmaTStng1CRO&G1zL1zk5xf3`-Kmh3jF%$gkJ)M{2or$=O$tV?Dt>BPF`9F zNWmw_W15~~M*C{K(F1ny#YLraWjg`DSAF$pS)AnSO5;ee0X~0;( zJkaRAiXbr@^eV-6#(d-zYc8>?wst!OEH6k`*ftvF5SAiaCP(x;65fgM zM>xKMYcGl&8`O@scKw1oc2}rnj?8t;SqSMppKA?)Q-a55-l3lKe0{Z;<>A~ASG=8c zXXi0a?-vwvy4~EqZe5k4o}OLE9$hYM7JS|nb3}?ahihO|YAO}=Ml4LbU0h5Tb14{- zoLso(vtpKm28l)~D$C1yC$_ArDh}E*-|BN#l$UYNZ&?vuej?f}x8m=1H5YX_KKQ0` z<^(grfwne*yE~_@OIc!x-@xq5B2d}_ZjN}`tp`ToH>f==VfN&x7uGt%LI%~ z2OIHRxn+l#FYjm8NDazgOOU8__^LC%O+qT9w4z>!L$^Fzri8@`1 zeRr_b8Pn11GWB2wqkNH$JGG+U7Ft&zUr)yX+A$z(IL%UqJISAb`@1bBwu zWbqhbVrMxHU~Vl-%{pxJTrx;nEYrD2{83%u%_0i&Cnq>xGXyxe zL?)V|aa7wx%E4`TX>zojNihP=#sJQm2VwqC$FIZqz*rU>7}iaO%54>-1H(>?@uMR~|Nb7L`<5@YWVMqrVn z+9psAE-yV3^EKPMBf`!$s79m$%*j_sa8~x|_*qi;m_0rN%@$$UORuDayKfkrAN9>1 ztaa}U`b2dfKc;b@f*JQ2&_;H>H!`}f(P)UttI#CBV-@v9qo7q3#gS?2Wa8MSP+_Wf z(72~*A@_A`)9Tfc;XQ)J{<-0i%vMsTUHOJ6=Mmr)S$vr@>O}FkgcVy1!;HIP{CCIj zBdW1hr$;!Qc=;M`-aYU!+mG{SS}Dr!Di`Iy)VzdRqlKY2Y7G3ap9^`&PGbeZB|T1` z{4O5y_`oR_%P%^d-uYbv!0)|C(IAOF7O-7#DJZUuX!2Ufk(kgC+^}ke=dTKlr%wX^ zCkl<=4eVKkMs{Xs9hV{644q`%Sx*T7zWCqItKp9lPq6z}dS#p4149)53^54}OAvFOIXn@1o?==CZ;Xuts z3{n^X0q1m&p)(P&3wVA{o|xm5=5HPupri|>G9TDQ0rbU? zL&J8ai^A!#ftu|)gp~rs*qmvl@C!81TA?8P6d=%?>IwZXOhIdbf@lg2fd-JI{Hj>} z+vf&a>l1{t0tA{fofUq;6tvbS2zvzxG^g4^{|i&lTA(2MLPMZA(_`TmV*{-f3c_gN z1kKq-3%@`Etpfvu+X4idQ=Oszg(+yoVu;qz;EK-KZVRV|g&k`4>=2d<$3V_BUHAnM zXdMzDoEMIPoazRBCN=C(b7_Zc2My}lc(w(@FGd7faTmge;dn&ObYl1g5NL&52s?&j zAg4M&pG^(W9Q5RB(AnijX0D%F0}j|wabS4X>V0aLyi&QiMoyMW`SI&TvB?Yf&y%5I zem%mRPP2|0iCfm@C56RGj=AMr9%9L(ONZD&cA!P+=}A|iSFK2%iLt+S&^%9w1UfiPw+yLGQ*!${gEgSE!x~ zGhm6~(;js&2nmh}x|84P-D24Vde+W$S37GNpv?6r>J&n2l8s%8br=8O0*z*a+v3#n?U$6 zElK~bEAQ5g7byK%6!$X})GD#&v7&Q>YVkLPhf(G&oJBmzhaxJA1Y7f8BU_Yeq}-$~ z6wua9ImDjNQ%Nz&Y7$1#e7Z|^kxrQKV!+p6x(mYZ(oB5P3i8n`Uq;J1NoJu*uT&z` z+@j8r$BbQyuNqUfcc*(dlCzO~zn!0#&_kW*P(B?emG_YBD7Pl{=AA&VzUsHQgonfg zQ*GmE55`JYlXG3)w@;Gy3@LLWJg&BVU&&~QHCM7rj zhFXO0ruo+Nd^5YP^5`bPUADLVNx{{-MVDt;W^*mRz8n|qA9ta>ozrBaZbdxWKlyQpau9>{ zK+P)u9EWq@g4K``kufK2VSH~UF^16$Q)Q>D^u1?qor~a8uq&FfLqeY&7|W6P$bPz= zuJ($55Z+ji)%#oF+YcpyD_Pfwnq3$)a=$I5no^+5BSE| z;!IY9caxH?=eD^>zIPyHj&HIcVEw2?kOm7o=%m4sOCnE7q%~=u`pRggp&}Uze%4%n zwZ5xC_SxGK!p*ilzNukv$L5WS#5i9~)uw?r%du}mo_*<_Tu4(?g^gKg?|$~~`R(ZB z3Ua?#nhdPPq^>3Z6sqXROXrBZghomI9n`lp$Y;yS#iEgJi##P$L2RkAN6UXl*lEvY z!DpBvAD&EVxGE>ZCouK+;w^vH!JvmqH^jAKQ!n1m>ALY;eyRaedOojamZq-`WiZ0b zGVmh-R&l^sKw9y&&g+I@7a1PbtKcHKH0h@VrmP07zq+^RWA6}T@|OGji*%ekmwNDN@)%yEJ{h;5l>o+AKL$WQykMZm(d``&(!ihk2O#ikuU089>(Li2dZrZ%1KM z;uCSJ-%!r%vLJE}tVZNwIr)Y6heoeO;q43GQ=h}e;QNRTd+9?#Ru zD<)RDRai#1Y{r3-V-=<`#cQ#FkMxrJd~4F-!N6;**J2az=oQ708eOQ~?@Q7va(7CH zaF>s!0ev9t z9b0lxNrbhZ5Y{Rca+k43l2@x7%aVDipD{Uuf&i&a2{r>oab}6fYc5sRS=t=d79!g& z7S>@cZU|1!GKiyR4iHX|byX@ke62`OM!-pED|SxZi}k1n&Q=#Vof*@aT1NllVp3MW z{TNiihS^LI=2qv4Y~k0P?k2FL>Sv;j)paW$-M*SP&3h@CtJxK3uBnScP>-!F0wawG=qy*g3ZA-*5c%bbaUcRqB?6j&OpC_0wzfIYhr@z$5$o?*QM<_ zb(5Z2a$)0&@6Ca+Oe`DNdxG^d^@$G(?MPjffjny7QwkXY0UCwzAmXL59n zH95E;U7R`mbhvORk^Q^d10N?>Amb9)`um59eA07;K5!1t1tVtsxGHpXO?5rKxd~ML zA(Qa~GK0)2gH-CWXj-AI-z>j5NojuOP;DE?h%B7;n|Q<69m5^Ws5*sY@=YQs>$RK~ zrzTA^2{6E|-I|rACJnP>#=wuAq$jC}W~moeZI##qw7O}3TD(c3l)!)SrhF5z}S}(x2JE2 za(10z94TI7mSXW|V3P9pPghmm@i?mIypzyQpPcVLs%bY%b$WhM-$u%}nWf?-Pi*#c zufec0-hRSh>VNM!{<0{TU)tNEJ{WtvHZLf8s^tWN_dav~bXR4-R$yL_8XN(yLd@3+ zk~F&K|M0+sLHVmf*xmV(Hf0R?GDJ$1rSNxklQu;rkR#oUsn>HWA^0PGGg%Gir}8JA z>G@1R(9Gn&IY(su`>y_f$2sEfo#=l&NBpm;g#JangMkg`MzH^@aEGbAwS}I8A?5E4 zFEH8o?{q0F|21jQzYq+5lRtiEaA6|)lVI>y6!af9{F6Q@%RlM4{KxG&C&xcW3+`(E znaMlzcP4MTV@U~b?Mcc17yT#;GnB8t=76NCA%AA0Cyp+P)- zD6?x3G6R`1o9pL}cjgYRU%B!cUte}N*FW|ztxjdqzVE~>hff(fIkYG_vwKG@S9p0n z923@i#q^g0=6+T^TYKc5*WS(L@sbI}9YnmnJr>ZuUmVkaTz@xc(0RM&e}d8du%8XX z(zhRkU;je5w(iNN$WwIUdCg}QkO}j$hgjBu2bjG$>jAUhc3r;bt&vJZdD}VzM{oM5O z89nSdJ+2SV7XGe0WxqUzR(YB7Idqn~3jVEpaX%8fjTu6Z@d~nX3cGsf!nwp!OnhwOR~(kS(~ln)q!8;C5I537*O>a zgy+|Sk9IV6fZv8@gK}8$xEZQ0y*xLE=lx=#*iy7O720zclO9&+t8OxCG_kVwYoc zWO4Jcsrvj`GqK-UC3}UB_oG&t>R@&FwTRAwY_eGhZae2Rb(6cas#v}NYZ(t@_gPuU zO*c)lM$eBI428U__E4)t^Uv{S+;N>3c7N;lAQYe!Ai9Aa3TA9()E~8m~#iQkru+uH%r^DW~Anj8-5c^YMccfckPhVb*1@C)pIpz zz>JvS-P44`+JWbYiSnSAT!|Z2BH81P70S5T-KbX?q+2HI4$5DPpN+2!JIFQ3@kWNBMu(_kUS!LJ4n(F+V0P4SyyW9j6QC7#H3wPhMTT1r3I})7UMew@ z4#!VaV~>9-?APf9m1A&YLf8d!$d;2X2v5TaVue6R*$B{VAX5VWGt|C-4F$s*qV|p{ z*&3w&oaPK+_z*^l5&sk}Du!nW>cNc!H=Lc843URg6J5#(2R=k|%M`WC1t0aq_vvet z8P3<7X7C?29#uT7B^u6Ok5= zVXXwzpaFT}rO2dpK-mV2cnLFs7{_n&aFUlHJo0c0p@j)EcA9`0`B~1on~*^M8q_+) zo}fWXDLeqrGe8`|E(KLWXgpz5kjP*crZh2Ueg^Dv$SFwPZssaGo>^@1>JZXbAaY5H z7GkoTGe|@E|8sDG0fGh>dcUaIz^`H&E!U9RM{a+DgvkGJN<-7 zZ5cUC-X!HRB1>*k(2SG#g*b&unSRo=?vGY)q`XsWr#K=sl37}Qza zv+j2a)Nq;iWm$6EP2gwU7m`j4>|Qkxd2$)JcF(v|#Jis?D6Wg$G7$VInrbZ^_g6E+ zs#ebM(abL{RZE)=9%|YY^XsaUTzS}&hiB!-oZk)EwDFY&%gwhvG}4^rk<@3`X6PeR zY@l1_nEa&;VY)rv$^2FJ^%0?;ovjfC6*MSRR+mA$^Xm}xRMh+`SG{01m6kb$7W&=n zk(%eont!f?3OY$CPzfz4%@H}6qIZ|i?=G)~)N6T1=`QhO z!|rBVOY>u>v)kMHIRm2C+?1|IWsa1;YqxjguM)`6Hfz^^s64KjKCzADSY`;FGK}K? z`gVNZgZ_s(-H!c7fgfBxo_5s0EQ)$CM_3*-kX4p>)vL~tm{{qx`S0<~ z?dnDvy@o)BeDOhqt=3Qa(4%YiBUYN_s{{-CSKizr7fGhcU82bq9G0_6iOpwLczF4d z#-?GFN2W&Tf~+adyteJJ-(E~Q_BDbRPj*O~NZI4yhIf4EV)E;HqQ|nTOAwjnY47Q225o|_?`?;CL)eB<#OzckD~m5M z_zv?`E1q(aYYZ{5Y#K7)iw`_(wy$DrLYV>zr#MMbt~<0$v?SA2C1%Ku9)0XsnL;c| ze9n2a0zNcF8nd#%VK3E?qHu&k!ZwONx;$n<+m-NDtqQYg@BrWmsc|pYWod;m*C%G6 zt=i4-`UXUhpB8~=}6A;|+#zVek9C#4K9V9xWti~WE8jaK|e&-rMvl9B>yA~SH3LrGkD zct^hSSHiLKsS-jwPa*OP#6d{+sCkMN2#;VC@pd4eKId)BUR}q^|MZ}LYT%9nop!3w zu_5>%h`+PU5!Kc1{ZKcqKU4Ag+L1Y=tK;RK;i<|Og}emJu=Hc#fMn&CN7Q-G;b7PW zKHqDEeI(vy`1O~*|4idi;5AlXw4v#7?RrOi2xhet6GsH?B zMuC3?UZD&B#c;!@gAbq2n{CaZKT$WQ$I!r={roD$poyiU%h2(QUJ>T+hJ3?%x=|`d0(~lg|qbfZ_P(BPz|sa@+xA;1N~VJ_x~mJBR>?RP{@` zFh5^s2tK%tH^=+O+~Rrlz@%JZN(^0zUb3%Wt?Td{Gg3-=9+%!U;a^_&hzO-B#p>!3 zN1{4fU-tW4fZ4U|56=Mzn8u~tVA^L0ni;Y5NjmSBR}Eh@-y(Ps6a1puOPD>~eDW2J8x&X?=s990!(FSu8*8|DU;jc^7@a{C@?S&~Pq!n?Ju zk!o8%bp;N9c#m#h_@t$Cn+i*iPNaI94Z>vGS`Eh9?pVYwr>DoV@{tDIdC+4ZCD@xo z1Lha$rhW%~X=a)G{HUPJWp~G4lcSo?t)D`UwbhbZ^f0y{TV0#G)=wd)jV;$uI9)6vP5bEX&&i|n7twOGE|M`P`JuwE2 zd)A^4#4pw^Jv2@ zI{m)HE>PknhaR_u$ZX80YzHil_gr-Mzg1>Ad_=Z(R;_Hasdzk;Ti5q~z)f?NMqBa# z|GI@*#c)gwnB>41?{>6|fp}nml=25kZ!%3c(=-I)7GKQ`PY~+7!BDK*+rhqOGpQ9J z%NTQU;+S;jnsgtLdMti>kS67)WmBc;qFIZ$)CKXD+LDmd$d|o(rVk2olB1#W#Al24lAxna zG@N8x`J8zm@yiYlX&0X`B`6t9B|{{>!Sb^SOHg`uUxp}1rmuxd$V-|N$NR35<<*9u z<%OeH$w{Zm-(jdZf7Gu;J7CjqstzBiHfzkHvMyU`m7yHcE`uLbr! zWC^^;2sKs2I1%=nEEe||rruxmCxnwl^(pmb$0?@~lw8aW4=m+Mqs^M)Js9$UcVZ~tQNV9ta8p_BB)r%upeRsTh?Y764r z>Ah1}j_-}*I$?MOM&oDG3l3IF|?Ougu zY=s<7=d|=ciXi$Hf#cA3kO|P` zpz|*40u%9k+$C{UxyWA~Yr1wwWv1gG&M6*5DYk$J^H*eO7rgnUY`A>e)RC&dh}4ez zl6imokz;+&**`kun?DY2D4Gn&Hzhp()Sx-ajL3d z^i1IpKNEz+1P+8WGQ#uUas5h=2VuF$aTd<|q6mS0NVHi@w^DUuA*>#P^ zR+8Al_JOk;;y*ufbxo&ZSGKA>xWp1*fCTT$?=afhrI7TMDfZa&vt$LQ$ z;U0@M*&goJGJ}vALLhh-4`C#fYHc|~0JBhm?#d!6xH{=b%Zc=;W>QjoJ z=z&Fk3{OxN<2reKFO!OBoXMGY{_+yl*oY}=YWuWfylQ;{C7HBWFKS2Lrm_HyvzG!A z9Dk_l1wk=6#yMIQ2&sr#Z|&!>LSl?gV9imG#+wS@qwelJBLOg#@mDo+lB971rVEut z9ns_p({v&pp|h{lw7Js$$Ve|mU*VGXY)*D)seL)03Fe+i)3W~nUu{A2SQ2Z9N_uc@ zxY!~!x4yejAslH5KfbjKO3Rk;5TbrUuvw%|gMF7%t2*_LOk4krfpPe{Zo%S;!mP^8 zzokxfYL|}IQOAo=XJtY+P3b=Q*OcxTzn8!cFF7q45Yh~#VPxYOOH$I)fUmoM+dhfdWgUZ^ zfetQF&~uxDJOoW#G(ayUGM;g4a43W+zr`J;o4T zusU2oI*BoO*jNe)^;aTMZV8sKA-aOP68G8#RX+PERsMI(Df3Km$qIWB7M%TV(}gqI zDUi(mpCJ<#{h73;a|v66c0x*P>e#L|!9M3{^dzlkA@LWfoK+xFumA~dR5;yGRS@n^ ziKOCW5HeKWrt+Y2z&Scp5o9_S>?bjLFGf-BXNmtf`;$T&;wH&=ISBFCs^F}l`NyUc zqj{rc0pEttLsWvG;>fVN6#ig^Ga^WF&Cq}+BgE`0BShWlG-W2>Y8KAaq9D46T7^|3 ziK!-KEMWfYvtg=Vp7(6L@10US6aKe^4rQyg{P_6x^tEQ-d)|;3OPaAU#w0=EtS>zU zvxYJ4AYaW_5RR)q%I&N%3OPjSO(olvW*DmgGVM#99jb_=kt-icny@HM;({oo@A*}{ zMxQRiXmSN?tf5UUHD#KH#V73%wjj~={hOSWeF#U1^nBi?ngA^sl^Lk`H#prR&INg2 zS451eH+b4bN*gnYSTztOG4#%zZxBD@a$tWR75Y+BZbuL$&Itz_Iu`U+QviH0X1*EH zrHh;`0kh*;0kh)@Ob=Jnj+7Ug<~^J39$2bV-qwtixkdgWYEahcplYh4b9pGTJ8r8x zI=4GkA#XTyZql)$?f2SxzvLHn&R>xXdc|r=xbqUXVqN+CHAw?bxU*oW%)sAmS9xid zpeaG~_q!gefq;8$YIl77ojqRT`8p+PxNIEHCc6`gJFITRHA*tQ!xWkID{|ci{WhqqOgI|6vMX!7HK6iZ%8#@sYr$pCn)xzPk{&l^{Wqy zG&&gqx`@Pp=r=Gz|Ea39drIezHNQq2x;-k_q?VyB+5$WjDcn}Yo-E@%Zr1ykSz%bO z%gO77wnDb2E~rZ+Kw|8~{Dftu7|5JJsCFYEVVZLEB+pC=KTG25<;IlJN#an2qV(pA z1uQY9Du1hPInVZ&?FAbP%{HJg$IYc2!c_B7FyCwKw2ISkgAT9Ff&ytL2Hwb zJX4)2K~te8J`)Ec;aZv(!=kQ11k-RY$z+cmKzhMMkc9y-5`-Q3blGcb`jDUihb1fz zCm5@a^tPpZ2)dz)XCUV!RFvr2z z)8$5LAx6OSoaDBvPvm_EZsvw3(`L3#XuGyuxTsQ2G{tDgRV1jL6(pyCV^7&VW`_y{pNeRI#bbWsQZ~To15+#G ze?o-*Ye^3O)I$3MminJ0CTxG#Lel|!H!?D`(=jl#`4@2Nzn13kFG6U))z5%WgaZgs z{i_h#?HKPw!pGE)n5{sb@b9F)&JV1$Zf_ zt!+6IY>SN?_3a;PC?B4CWZPwA&(-$R>*;ke->wZxS83lCk0>%%jpEr_dPd58ON1&- zpHB(DdOi2tS)WvuD7tMdT(@veeOxjLT2EmLS-Uvb@mxC!TKDvLx-@QieOjkD$rM`f zwI32r-%2XrwYVkJ{KA(+N6-R{%%C)Yd*9z+S8;u<>r`v90bfp!+&EzMQ(8nC)%Y^{ z-P76S>C%49VL{u|XB92(XzYx#MAt?@cHngPc$zSQNt^Qi8ztc;^^2+79wbFEOGUAcJbIC`0unvF3gj_tZa|JX5c|LL@1jK!>EPOVXP zWcRGOmugv2QFL21cKpM&L(A{|xf(^=wV+FzKHXQb^sas= z`J@pM=*%R4V#PGfp>GVeY29OzC2Cp~GFCFbUCv6wzs%mUs(^CgWZMyG6*bA_wBcD| zgF9)ZlPSG6BJ)|vfW6BixXD7(DtR74ica(#7o%;tUHAL|>`q{2Q%Rs}^gBxfZU(YF z4u>H7=;6|2GE%nX&mahpe3pe;9V~q5v^%U;gmS&2QCJ>$3p1e)HP_BrFl#33Rd{R) zNt;ztD_t0jrb~EEn48))@Ti;h@Z7^A?nuj&J^csWVCwTn((FhVZ%A=kjyOa%v9>=_ zNl*HhIgCIDKIOMDI^uB5u5D}_(0mX0Vxwk45I`qYTNQ*$o#UUy&u4jI5&Yk>pgn|cix<%5xKrqJOho}J|PljMOR}7`@mZVxW z%yNm3k-YO&1OXE(&jnLOcsA54-y5g~ZB?ks0L#hmr3ELLR!adtM%{a@s0Kha9&TfGG&G@t7b7g6!{$MS<2!ngyPN!Q^w^ zM+w1bD=83d4+BUCxtZz17c3Fafw{moFuPo zll^xr8F4?M0yG6b^dP)-YGt|Dlf{7;JBX4)U!uYSuKZDmA{SsFK6wfXNdJ&S5@Dxv z{4m;BiGx+?X!o-mq&A(gaKyo4Z6>Bl!ZOu@sTq~+6Y3<^u~c@|LXxbXqg8C66FZcQ z4}f(bmP~>RJ94mFhlHJeN`hezEF&JQpY>&W7A;#c#_WYj%s56+ra-53j@faatTG7I zfcx2h0gC<9d-ram7PfY@BA{@+?2?L14Lk?70KU<+-kt9lS)BNaVcoz5^Ge~B-1KKQ5m{bx$HaEXDf+hJSVH>&IZxI05?E;lE ztve?vBZq9Xf7YYt*&&W^W!N<7u*Y`fcmqEToO2R#7DNTaT)!-Ua6bOZh(*y$_E$vd zameleBuYLzWE1qoM#Dr~%RJq}U)L9@!WJox6;T)zSZ=Wbp|E~|_>#(CY%6^yxh01AkZK@O12bB7=pWWE~swi1Y7DLH;D`X9=g*K@TqJi3_ zHq}Gxq5&DGv{V*o*)YSA;i~CqGDy@@gsiB#GNie8{`$f(s70%w+f+0F`2dl4YKman zU2w*tZeps!KGZ`}H@b{)Bb-rfNeTnOR6=bt3Vk@1?L8w?E617%w6ndO9VP@B)2xC*$xR)`UE>8c>8y}rNdcS6Y2T>xETslbLf3JiCG;jc6gJMo!7Bw_=d zAEJVY&6$jAoVqQg-weD?|bt&ez^ zsXEwY8$B|PMxf&9Y8RlzJT<~(Kdy-SO(A~zF-s}NDrckAf=z&yfl!%13}5Yi>od(` zK~_Ipr7Rl_N#s}XRetJD>QoXlPBaQ5Lj?vRnXZtv)bi9QT1ViuNmECkM=2Zb$tD7eL?ftB0Pob)$)3MgsF7_G{;S2 z%W>N;)^bg^@T-R7e540?i4=Zo#Ly+RCD1#D9|1_etQLD~=Tw3(o{Du# z+o_U~tU$(E+o`Y={NehKOTeoCY{pXYhZ`I&39Y-LO3R(QGGqI7{eoxo<7LRbMlcyJ zEunX%vy^jC*4UCshRHnHv{_B-8_BO`lja`6Mp~8%x>kDvAwbw_3>d1b>jFg=XB$*A;9WA~(LPEaI;!n4l_Y_8n046$p#m7)jE2U`f*03l7tG zn8vFuA%3nJEt3Zvie~jrMTmtMrl!aXIt72R(KPWi>;;?<$Y`cOFkoH{)8tFeQrD<{ zaL|ZiH-HnBg98Aej@=nwtOAT)(mJByB8bW}#h$`EHW@SQRhYWykVI8xU-kZ}qzzW6 z8K%*yTp{M=SdP13jb`dO|FfFLr9F)n`wUP`=LuPTM}8yS z^;;LDd)0r%u`Y_M>B{}-_};v$;^)sxNp#GN&!tL-2}(z}p01c7?~2x8`s7=bmP zg^bF@;;Tt37+xY09CGgtJ6zK2ds|Eg{B(qoyimBFc-=P&1Cdo#Y)YMeMDZ-<21%-H zJydy4gyop*NYxZY{T{-%PV20u@3cq0=w`@*z^6`l8hG^f!83p4hMWJo`pc%7- zNj?J?l`d%ggl}Ozql7`Us0ef?>@r^ywyR_XSQVSKLagC%}QL$kRM4m31R+i zIK7WsE(U@6i8`R@p)9ldG&Fv2YL;XW7OzuPn7UjC$9A zTdcD83V7Luf|e|`xbN1WZmouwYP*isN4iBz)u;lS38wvig&MP(i`!1Fe{lQy!ro_Fy6f%3_Wmow!?me&Qir{YZk z?x}cFZaPH1(t*nWUw>ZCN2j-XEvD{SSEfU|gdfu7UYLZM6VWAg1Da8;$d56xn!Xy& z(m@r0Z`f~d9|h?Q=KmdP_V+NJ{~f5=?-;57LCskHNHrn}X|L$r0 zk6Qn41OAZd|0{U-53QHK8^Hco`q+O&sTkS+h48Pn7`fX28>QN?2bpf8=SSiv(eRWd zCL)aPW%G^k`7@fT*vd{k@~kZepn>AB9}NsmZa$7~)=r2#>=5a!uvWg(XRwQ4>aTox zou2NQ~Fhe7qQNRUnYoK73_K|&Mov(l#BdyfYR!|t! zOUxKEPW_d&r@xSPL5#bTcnlA6knqX>#}_`2=PsH`q*|opgY77WX9K~egN?b3Q-D5D zFZ$u|FiKGMwP1I<ow`O){S(&QK*`XNWfb99-onVHyuB&iCxYmC{$7xBiw?5Kt3%1pR=Co*3@(R%+HC=qj1vwY&GMpTl3hhXaw_y*+Cc6A?&b zg1nm)#kgPtZ45+H`XE_~1yPd0N(|5~Y`WYjP0SnE znTm{9!Z;#A^W8^Q7{?cThKY zS4D9_mY4Wa0qa}hMy}uELgx3<8q4UZJ*2u3AKPU@nicPBDA`2_mV;*36u@wp55bLJ zK?aecDn(H3ooM8cM~fdKp}u4ko~c~y^Jp5-*lpD~iXJ5|DA0Q~EgAS=N~XVU3h|9O zU74vLnoMZhlq}~!(u#XSVH=VpE#w>1FgBUqY)&AfWSb&(9!n6Qf>{!OkV*8D0^m|L ze;jOHdOyJmArZppCz_FVqM9Q|1&deR3(rrqR!RanNh(w6u8uD8Pyiy!=xcU z9N*ztfBFJaF{f;j)kV0V1oq1v%ZK$wO2@@Fy?X<}(9OgQMW7vvtG_uR!D_BnxG$J* z-KVNL8KA)<5-q4d`7us5*JG`%2EfJ3?JYx0bcBK`~-nO`>Kc1J;IfAhV9d+?Hoe$t2F)_uz=f{cop($}iiyL%WW2lB$FIxys-SM7w`#|q_J@vXQ7_}j;{xkV z+kh08Bj>hr!0MdS7L*s++rFHbijVZt>((~R2$#<$FawT3HzQ@qlU75AX^B>jD$ab3A(C^ zP0(V-9(mU9M_N@CpP)r?6cXMsNpJrXbX5_bV6+q+M9FQ8vQc5wlA#@u^=fpE8(~!X z<#Mk$?F0sYabUZ=ycSDbG*xa&)@vb&(Jn@dW*iuF*g`f(@h2Om7XTsa;PSbv6s|IqE7;o1ktlmxuU66$7fK z%_mf2J!-b%93%KdXyDhIzpGgd3D}yhnPI!C;&*MnBb(9T2NyNzp=hxrI}>5(8v{Ts zfZ;i8!4UNwA*vv0!4Q=xsvzmW;&&|sqBBGl$-EcvA`T>&A?z+8AUv@V$V756rV4)t zWm#R4G}Ts)n|LY9&jI?6(v(@vJywll=oN^)fKg!@kce(LK+Q$A3{}b_*o`!ewQ+_QPyG%*LYxVoO z;*YBaA&1LZlsjM(7zYbn*kY74(|1<(?$m-Mr+%bCoXhyiW&lCQ+q`8S zK>q^jG^q-WIsb8 zM%)qH4iVae&=~dV0rejQ3Smi3Dh|(BPI3-iojM8G=BZ#FQX=|7xeAc^xJmmE;gn@^&6wkW zO!b|mYGkcoc^+x5!E9a_>?rQm&mRorU6HoWPYo@UUDGoY2zo{HpsFMe1#A>uk#K?4 z{`os5E(}AM5|NbaoSA95IGmr~g^B}sHss>!Qev)h%DmC2Jc@F&P1!yre67JR8VXL3 zV4Z!@V}IET)o_v7dm+6gVv*zx9+UsrXdLf~gp)_mYg7a^Sw$*jK{JGuwq7OR;64DE zljrO(;|d%nvA}UcO7fwKe_BCeE`OZZN$SLOPq&F7gtxbqrp>6T;Gu-qLD)-8A(#t zt9EX>I#Fo7J$Vycvoejrk6K<9Z)C&@BeP+~B}uzF7>`!WeG<5=d3nT7Ya8o^lv+sk zL~9mem7RECWEP@f_Awh3*vYAYg|ZtG{w%>fTNp<%?;}bUh6SIz6pl%DB1Z|Y6L`=Xi(tYyXgKXKPQ)wMK?A`vLCQAVwal{CyafRnz%_SgV zD;@|QbN4+MqzI01_gxsJ2#$33<+gUDaNlr`rT@++F$Tpq^dZ81DqmQ?N;X5(Qin9+ z+zc`G!>k33MlWO*i%Rd1J}q|?j7UmL$$&>Vcj3TVT7@JpVsxpKGvR|h+~WG|4n4mN zA1w@21)l=S8SjcB3i)cg1Pb|Sg?P6q$tTgKHd4IoM`?-1dmB*{#L6LIUPNB}9&Oa% zA@9sSL?~a|dJo)VqY98OvZ>SEOz?w)Zf#Tjrdz{o+2HI1GRdpE;Q#wTqVW4V^ux;06;IZ*@khSn0)9qf1L3GM{B zy`}`cu2b`8LLgpL)tev?#v{TWDDMIWLzXJJC$qq5*q%UJ(@VU{I{hB1g@CT>h~0u( zRBTQ8R^e#T65&j%1Ybk!NXV3i+1ipPIgP7Ym2ra4s%}89VvX&LxU^W<%_1nrLEgc0 z%nh~H0nQ@uduIG2wae0@N==qY4ckx3TI&(-^RNi5$H%5+F8nn`KE>Hn(l6}p9wB{E zp02xhCiioW36*eAYfrkhTZN7tRK(I;SzRZFtNuTpZJP)Xj{6PFPIsSd>n$C2on6M6 zcGtus7qWFLRJDhv=C7;1D}ac+&w+q#`Bb~MVSVvv^?T?t9!X4(iK|2744>!V#uTz# z!4MLgg zEf3fF(D6ELL_rTeOXZP)Eqo7msE3=!`|`5m8;CFT^Uj3##F4JsX8c*{2#Z)i2kYp< zZPr524Ju97`u#esBdg5)RqdB}QE&Rd@>x?4X8)wMzFP#lxch1_dnsoRuE$CZ8Qw0! z)DxQZ&GY+wtKOKOb4~}`?eZ=H2Q&9gUv~Bcbs|hBE(32-_7%SSCeaQgU$*<^X~X1F z7p+TA;Z1K*aGws1?F|UGt**@d!^^;ul(1etX4%IZOi{G9Th45g`}OPSX3GdDWWVVS z)DNSit{H2M-uPTxF|uf2nMZv@Fi+ibVb)?#a?m+VM^%$R1XQ$0<|F!yr;Mp8WFZ1IixE-zoKXxSRkRk_-1b$gGdQl_7v zGsES8H~3Se4T&9Y&J(u`f5k@U8}VqLJhi|wOF`IhbkMhh=1lB|JAzVy=kk&NK)9ZaWf>j7qUtn9l3=+M@ zZQ??uv6PYqA?~A8m0m%E;Ax#b#o?x=#e!Q>Q4JXZ8m_?W-Y+CXVogc?)ojDj_a1l- zq28N5Szm8@H2=qnapQpEhILUls0JP(@W$oN6!O=RHTpaF$?dS>y4&R&N%y?bqKfb& z%!8wxL&tNsNdnde6|ODJDv|AO zOeywZ>9VvO!%~~kPY$;-ENp}*#LKxsO&2=rCu5HP1|<78sX_mL43hnU>(~=%u>6r^ zRGtW!zwI|x1}uMLK)=gBIFP{dH$wKi{zn8Fu>6e`{;vOltpUs5kxjt*A36Nwfk>B- zwUvXRm4iL7={K75pWruE#=ioO{}J!uWcwHPoR(J9PP45?CQ#rJRQme)0|VF!_VW{G z7uX}Hgayd~F46cqlwdL0rDE99r`Z{C)Z??&)y3(fX(fv*G&P!U(!~rfPTQCB=U6Y( z=3TzfUF&bJ4Gr%uagvM)Z!Nr@Oakkqn6ZZrORPBX3EGuFBqy;@0Z z_q`1B*I^FBD@SqC_=H!cD!g8=PcM7c-=FTDzmzQNyx-HdeNlC*QFl9>5_>W1bZ&mQ z6l#3{Dn_1rA+YONe|bY`f(+`FSuK?tUiEyryMr1}*w8c|M~L!z_G*89sA%}|s_Igp z?9;B&fA2qFtv~&|y?%xo*_m=Xjzs);{IF**N*_Y{_WEW|oWr|oLn6jR`o=a%@{0Vf zOrrComj8>WwfX;0_m)w01>Kfta19#V-JOF&aCdhL?(P!YA-KD{26qkaPH+hB8tk1U zeBHN4_q*f$d!v6a>eN2P+*PaU)UG|pTx%`yEW}iVnVV%9X*jUgrCloZkKHg_F4hUb zf97?CwhTrDQn58Y?^Mnd!4u|*ktk-5Fayki>G%squ zA@<3F370_T$aD3FB+s}A!@?RdGkIA366y6lUOiy6TX)PD}5aq6?y!OPzXzh zqeTFE(7+ZC?ug07s#(G^52#~d+Rpv3XVV-&AGHq;CSIcTOdy7&$r+Px&f02^+hZo9 zj;$1*0KXU|nX|WJN@4&nyVxF6-8OVwxEOr-#CQ4PwHtHAwn{q}ASS#z@HDw$nPA`# zwMP~3w5x;ok;Pz!k+*F0Aa?T$O-D?Mdr2(57F|b@W?Z?#J)h_cu87VXSLZ?{1c6t; zW_oPA+T($?k{l+7wZ7MZ#Pi+GXB%JjJA~M0Sj49r3hPWKoolJZ`d5psl!#1KRGmr6 zqt>K2tTRX~uwZ6bcsw$>Yf5)6#_|@G;zXVU!)kHeL+nS)DWQ-z=k|$6;+$)K?@+<0 zIb$t_qlU_4F8z}D)|$3CI%8qCiQV{6*6(|&(-B}>@Oi}y)1%u)+j6x;+q54=81h~H zMVT`@Be)GH^HXz+4-P3k25YyjWy{??Mx1^B{>$W)rFe=DgZ^|B8x12;m6u_cMY3VizG&|{&Km+EH~{^Mp1!li zu@{LVGyGZ!uY!~u6!z=`aK^ZnMK-;?2$E?Fp=Ei>$9E1Og0hvoJaz>j6x|_B1QWw2 z*^trRq+=8YScEde+d5R*JA))!c?@qo%B4@-rhiPy*zK?$psZA!%nkLt9xIPoIi|%f$F)8O_TTi+8Pua%fD%;G$n(5)W0iUpJbZIPIrE zFmtP2otQ9__IknQ*vNGiCO^4u7)44ME?Q$j0$7oyp=4u3e?sss1Ecalg4c@;Q(6Nm%V~wc048)nf<_sy@Cj_I2J_k&JHXG=MWO3-C#GGn=5d{ zOCk=1d|kWy$TuQ!TFHSEF1fpnq`7{%vJStFCkb2jZmzIM7Z0QyOwFAX8M`R`e;j1y zuxY#`kZB092+4^slj~Muscny?CA2L?gzaeeCbS*&v$yjV5)2~0P^y*96fX~IWNT~H zVPYQLNTf4}quW~6RvzkqS zYqv(|Hd<)dSAXtqdC_E9muYL;E&(pg!D$-D;cT6V`l8mtCo9zH!(b;y#<|0W4Xt9| zyeQ%a`>xbb67xoSR4D_FofzgmU1qD6HY2wrscItwrtE2M0Ud+o&fpQ=h1R4e+Z_3+ zflmJ1Bh}Vr@;v#E!y@`6iX~nzRA^k1acVz5P=;Mg(;h)GOMV)WLPtjfrJ-cR z!*xK2Ql0spiH0-P+Tx(N94b9wd;J7zH!OZM(up=!6nOsj#+YjJkq!CY8Lze-;< z8#M?%Hu8k4sF%FZU|Urw`d1_hP@|(q+(xd$9HnZ}jxJ7(O(|tXJ|kQic~}W8jwtQX zPSZB#cx!bcV;=1epL9TU=wx}wAiI8}a6J_dh+OJkGek~TAeM_=qD?CQ(=Aq!h8f0z z4w!xkn!Gd*ZvDJ^c(AvCy<$hh{M33BOGw-tJV|cpgJL z;Y|6%gRH(rD~$mfWL%#R>?Nxhq9JMT0m`?EZYjAoahsYA0SBQN-ZE^3(u~EBf!74v zvDe_nmr}2n*tpg5&eFDBuIWa&#I_{VAi8gI+yz=)IL$Q&)A*gR>0PalX>yzvT*i$s z+{RM$@R(&>#+^P*bYbBOm1o~%HpcSv2iFOm+{NimXzNet7rFdp{ZsIR%QS*K_BL(b+Ml|j=s zFB89AN@Hem$q(4X$`?HC&3O-MS%Zf!BUzDd;ZZA-lVT#2iH|H9zu{Kj_RrED^(%dy zCL`4Fi@9et8^}nYat_K82%zgtXG2HR))LsjNMT%C;UjU3Vpi%U5)ZT<7P$glq3*ofCSF`cH~)+hNYn!) z6u!`BZhjDnqnCUa*=%dkTgzb(Frm!fhxMf!b$e_y*_^3YK~j(WnGLl2Hvj&}%~iK_ zn6deU_u%f<#J&o$bDJHpXWO1_b|g-EVFoeM23{mLuCXxA!Q_5UNAg*ZOAlhokirbG zKpk9L44|eRT|btKBSnn zCGL|v%7Q*s&sS`4adFju1F_OR)kqdC;VzEMslrRHt z=QEg$2oh>39+^XLGL{(PZw6?F_;gNRa zSIebci)~o8=&}S~Q0pNoQE_L&nl8MD#>#^0d~MMlICL(IOkq7onIF7r-yCh;~j(os% z2{r!bv0S+S^B6#7M{Y?uG1rvnnKWV8*n325H7mucLN2y#vABKRL8~u?$KWNr{YXt5 ziFzKxBq6v~k!*_^Xjj+(`O;1#8B(*{I6E}n6$yC3WeIroWnusQ8zSa}>HN%3+SDdH zaC4(uv^u{si)|F$?m~fEl&2B8v6V1c@9<)_Llbe5TJOZ2pi&F1&7;{WRzlPO-PLHg z*6*f+{SUsqc^K|!9r}bxg`o3)tUAJ5l^bG8>PQGlL6iWTr12K9ze^d$4>KcB9)TQ% zRn44O2%|g`Al6BGX#1L=FMf`Cy1`##DZsS;EzqB4fmiQR~z z@b;ObFp93%8;ZFf~SDPD+mA^u^Fa8g5WaS+fcQwSO?ezd)and|Yc7 zqgx;;&Be?tJrOJXQ)8PA#Yp<2s(Q_S|4a`rHG1SjvP3FEb46tVS zu|-5@0Q9MYpKxY(w#(zS7lA>n9_#1NLs3D49wzSMu64^LC$&T~zX^YjXUOY*@F*@Z zo`Kik1scROIBWax^f4xTkY4rRuJ7V1X6xqJ=rI?EE9?Aw+F4!Zl{ZPuYY9r*a8pUo#CQO50K zhDtw|j>4v4MN_ZWU!qhh3gB}bMw)WD@X1LFv$h2Qf2vzXhz5XZcw{wZ1vR-0cR%|% z3H4&H9m_KAU~2pEMc=~aB&`F0pGt;^c$g0;O&?heVW7P^!(0uu zC{?CBbqzTJ166N)LRAj%z<;Xn%xxBqxfMYieFUu)}ad) zaDPhODj}}V*>;VS6%eB6U>_T(9zppZ?835;ex-C%JcNm}N5!-T1p44Kq+cch<>x5g zjB1$y-n!?sEZ8u}PHd2gMidYmabYl_#1C4v_vGqb=xds6#wt3Yc+HXGt3Bp}Q!+nJ z$#ymD(A0cd1Bj(uM9;zJEn3w;|4iyyPLaErGgl%dG>{tgPxbc(R{phE}HR2 zJj?{t@`cuo1=e(j3i>6pZ1ru8bhlqP@Gm5I(pDVmM_Pnb=;?paCyrW>7No!)3QU>+ zPd?o9qo~2m)X|+3hMlAMnPc~d`C;JSM`x?mrcEh4#anP>KZlOZWIxD)V2a@sdSQCb z_Cb>FG0j#kl3$OzdZf8u$@c%0f3JikHAPS@$33+&cA6N|}o@JK5jKPWE@Qll`6SH}{ zefm-Klcz~N=W~uV%BOWunYYjKib(@33kSN2G^xyGR!xh1YPgeAyPOMSDXS7_!Ef~5 z&(}IoavkV8NJI~#8(p0*zhtQAOK&#z?tXxK$98+|ie(bJyuu1@c_`qt;)8%?Zy>YlZKh+wH_W_|D0 zhdV;u=fly}`|LiErO{-)yh-$DQon&xdbrk5@n<*jEFy zR3+z&F)pf&Z7-)wbQzYOh;-5`%G(%5|HXm5fI16pXfuBJLJa!s zo?`mM>}Xe=Xw_HhLnn-xv<`m=d=a>=4yi{r9p_gmyKc9w~8^Vqd(co4~BrdeM*b97_VrWPjdV5JO|0=C~)Swv{$buoyUrg zuabw{hY1VQqYQ7&&)qV6W*m`&yHSErCqJ8<-9U(TM&f%0bp&)l)~#aKWR@-2pxgRkmy%iGs6#=8TMY50P6G z|K_XHuMn^ILt#bLPPtKjP{Cg1d`zL-BqBdI&rLcN_G4q@0gA=|SuK{9yM5h!KcnXH z#N(7!uPRmt3ais#dTd`E1pYXBqY*s=LvPUKm!AeLGz_&ro6AGX$v=}r6)ylj2Db^B2k4hd~fHk;wRJ+YyePpFf*wWHSPzG{g?$oymh42c7EF z>~Vc+o^^$vB0|D^dho(uB8SZ#6B#5sE0p`>tsL}2_~M7q{mspfMAT#m`A}~6 zk}(ai>30x4uH)XF|1v5w?(u=hnA2L7|i0D+?&@IJQY9;8I8eVDxI_$tCX& z^BOpW%7capgj19mWDQ0@w~d}_j?B*XqIF758qPiC)f(2FR3Fs1j$a^G0 zGWSnTNn$B>@I=C=Dh1aWJ!DA@8hEztD;U_Uthy!N`xOmrgJ>236XXb z95N{gQU}}#8hntCFB_^c>>wo>32#=|X^eWBsp23Z*>OrR_29rHk0m{KKJN=63D?#q zJS5mjvOQ)=VG6s$CWtw9V3>R}H+rg&cZ*mP7$wBYa_6(c%-l0qR&$`}fPd-*f#cyq zbU-zLWgwE?D(y|EdQ*CS+@Usrtzb-43kTkV@v#_gb{oDDjl6b^>dMFf#nciMTHNls zU=6PgB~q%3E;mGCWbdNx#^@etX9l=1cP<<(1rQjTNPrhc{Wi_;e-cqq=;msGlx_`= z!wTiA)q;n)*9+EZ=wb-MiJ*|CvC-@>6AP=WreS*;lYMdk^G`qp$I`P&Hj zp}mZP_}ncy<#ao{0T>>aw5>mnC#pO<_$mO3ahj;drVs(y6o%yw3rs}Z9b#H+R+ILco5Ah*KIQBJ6Cg@no3TEU3%O#zq!k)*S-V*W&s=$m~`a{`fsLUD(sBt1xAa2E(z zJdY@N2zBNmLWRuZT)5=MWt8N@BlJ+q?V|=@#$3|L0X%KE@&cb$wV)UkC~l`@hCZCG zPVsYpTGa>k^dYw}8e~N*`3X_nsU^q{XoCZZCs44HS#t`#yj&2sTmd1WLWFT_>@zN9 zB?V9#W3IXO(ydizalE2ZflQf?!t6^f++Rx(YAc;1?4E2`=a3qI0WHb6s@DYF6f@T{ z^_Wvp9Lq(qEzW@JjA8%{6Ghwo#JWLs3#(b^a_WIua~YbpMT)f#_a~t2G&SJZ3#lm| zwNUm+smH*Z9hnA$QDqq=*TpuBGP`vi)Fq`6+PP6A=Z9Gloh@kfCnHDqhzol~ue8H) zFesQG`&Z~&3sjx7w49<-MJI$HM9CpQi{UAH9g$&^%~eIANM%H@!=X70uu8U5sG*@z zsVwv6x}0bI!FF&?IfLTF zDPH$G7|KPY9L&5998;eMIo{O5(ost=cQOX^^YH-dVb89rx-r0pyjf=a>NG+CL-D|} z1@8O2O1##&2Un8#8AJ90st@KBzFDN%yWp@qf1zj)7p3&R$kE%F9_`<%d2>Pa@ogOQq&B?+8{u6qQx zH|P34sR)94kR2@TvF0p;#+blqDXLPF(fqva8zu@VtT3L80P{t;-_@)0uBHC?V++?@?2rMNDrbr?j--;IlwXV%iKWb+;%5v~)z)Zu0l0 zg4Kj|pOe2?>j*BWqQjk@4fOtA)|Ano7wMCMIidYTycaoiHPyBoi2~Y|eIg`b38Lb; zMz)$zzf(v-BV?L2NS74B%72~!F! zJ2$ND^fU}?j)lV;#1AxN?M4>$auTl6a*3sXDmp*llc z=7UnHU-45dDM8k(pOt&3qZvk)TE~jYX-ArWd0AioT-F%xn;%G(aetuw(axF6eV!P4 zQkLVewo3123X!AczYaUV=mvSB$mzmx8O7J+jRn~m%oh2x0(a-ZLE57u+$g)8cBuJf zl&Rdr3J?pR8-1v!6)K@nONy;?(7~M677_(MI?8E3cRjJ{8Y&IpLZ(u$Yg(9xMTG9# zO@YRoDe~Pj*u&RsbaK@D2aSZYW--h(xAGKM)6P7+M6d!u>1>~h2C#k6Ex+k)S%pbY z*)@XuKL%qCT^}Gc4fD-gMIJkOc&Kx&b{f_13#r&24qg}Hs3q^*Bo^Xy`5v0wR#X;! zFCxSJY#cRe_EEJ$ZX*df#rwBg;x9FtFux!KZ};1!0fz;yRE}2dCq|fOP)^U#=hEWen_)T>=bSrm_#RP# z1Jy8dnvL%g_7~V^$j*rX&+H{ace`QwLB~fL=;YE-t3&X1-hJq_Bwk}r-m=(q%8Bdo z>b};SH;H#e(ow;kL)vvmV!vRN-7Sf1zkeKKj}G(Adf-G2)g+@lo{_?^ekIx!r#sU1 z+f*T7+eh!uQf8jYqH_%7k60D}cclHZ=*7&0HmHybx}hu8GU137IXFV~qalFC`VyEP zDzMv@kD=;E#3t{*6_ANnoy=Z^)2W4aMW?Xrcec!shtf&E2%$QnEEo(4)jDZ<;_@06 zml<(9uY2|@d&*qfvl#P6^RhaLz;y%>I!NiIV+B@`C08vRyNnrriv1OqnG!q@5*v&j zWlrAR;Oj!JA1l8ZA^j$?z{hzsNHaW5CjdP&7AVX(FhkxQ;yJcJNFXgj7D!C4HE|w2 z?&nij;iiD_qqa^jeCrqR#`ESbONH3hRuSh)@izZNX6Nsf^WSaA)!-_8_lWq*ZXv<(tZ<1J8@Ko0B!M3$L>@#k-|@jOT2D-KA8VOL@KBJ7Ms)llSh#I(elhkf$XW1*t1&d*6i zp$f0QfTt?Uu1$=~_k3g>W-8vzVFf2Ibb|`p49t?kzcOR9`_Pd}ENqa93yx&ycgeHD z*GtH~QS8eILvqs?Kj9`pJVrPeH*{@w4V@X;DPBn@dLRr>&f#S1Pl$jynqPmwHa)#% z23VBXit(%ufo~R+2>DVtR>HJn9lkx7=tT6DA?8R!L0X8$_^9+=b@EC>voht*JRD1Q zKzQI<8{J8;)Z}+a0R>pYL~-t%J3SmMJ<1Ky;qZq_p$NDl7FF@zRm(qcUrq^DKrvvr zNO|oq;FpM0FxfQ|V)UcEagky#k1=`<>j34gR#=r?jtLJl)pl(x<6zHNbuOh%}7XiHTg-Xil!&*h5=5Z%!e<&Vp&De#{osLhBpp&pnFxFSEL-yMkAZIs1F?|g@x zk+uGJ@(jTAhgbOz#qobRc?S5$uMq;6|B+z;=67<4`JEj4n-LF48vV^p_osX(hk!1j ze@UZ%oE-4_JK4niPB#6GWCv{jHgJ%Swz*#0tY|5+*jtuhk83HV>*wdt%z?*hrN?COJGACla=K8SwJ z6j+#qLH_~OUmK;53lv6z5zQwY$>+67lxm@5tlzqsOoWqV9Vz0~iA!XD>wI%G*gAK` zdp`Pf&U3%6^Ln|u>boA8kQwPqe}TG_r*vsI+&evp>HYYUZR`6sySGs*GPHKvY?khm zf45;z_3_Ik_%q7e>*>(wZODeN`_rqK`{Q1hZEYp{zF~qxujuvXd&~$ZJzr?3E?>{5 z*YYkq$HzOzn)&!G3@l9;YlaOU&nG{oVJxL^rtx0a`(L9?z8x=ntAbKw-s`G?Y_Goy zWvmD~SGn1Ejw9>2SV%jI25VXL@?tMuUK)uiwQc&yacW7nq@YBPNW7AVb)Pl*9gSR6 zrg;}A%BL02vzF?`+12L{X}ub57B8CUFa>F)5ip`B5u4UxLf{IyleOL|-6rJt3v0@* znRGw*2x0;0uTH9J?k%f}y4_Y5!H{~YUtHxKizIhpDf*d)Fog@oPF8Qnw zdu(YQX4s|PgZ#ZLdk82xO(=*uZErW>8lqpjTBqzXIlfD%?IiKegCnqiKxDzYiMhht zZAv+BAaV~)RrZ!iWi>w9N_mwk!cAqi_qDQmvgh6**T8z}{xax;xFMwVO7`m0){)e@ zGbWX+RqLu*`s|jA;^;XKGZB~7P9d$ge6zyL2)~gkt@~SiB@rA@NAP;u=vp;&OI#K& zS{n%P!RGN=RQR^B<9>FWVf0++SRfJXDk(+pSco$%eH?jM6sPK6a(c-Hb;CcO6A?;I zztsK#Pj>QQDiukHFWZZ>{i7#te| z|In;s`_4LL`YhbXsD*{yn-6%+{MVqY`AsT=WT+VU^k$7-g;ia=OL(;31>$8rj@X}AMyJoZLs-am@AdcP~-j*R8JtANj?Iq%jLl11goyE z9f2RaHl)-g3{T?vDQ5|p8Wjx3X30$Af2m4Etx8#Z@|F1b!yhBlcovj3H+8LF!JeKP zB2W{bft4S@2%BoWhdS?7uMGY6O`AsUCDnW6L{+F>{m9laSl_mr4PZe{eRa|XH6CEv@VdFNEC%aN% zVgn7~<7^)hmrR2Xd+#>M5`cqdoF=I(JR>TCTMbB_3OJmG)XNjY2`u#t{nvumMXl0d zi>sj%F2LGVQ6ewlBGmgk0!pQA%^d`jVJ=)l0*L z#&4o&dK@P!@LJ7kQ+Vs->YEC!i>rHj={I~@pQm1t*`bgnJ`_BB6@x_Mr_4!)Za?Fs6yM)^E}j|n)A|XcjCDc-@t87!n4tW zPI*D{_d&@-MbeVyD#=6<7Rkn494!o&Y}5xXGA4r3sK78xq)#SaEL6u}IiCfZ>cJqQ zd`hmGHBSX)#_7@M-LcS*H*O)rjO3wyTy}$VGbHo8@SbQPd8~BQ=g{0?BRsHA2vF&o9 z9|0t*>ZDDR3~`^wA}r$zxLvo_qKw<#Hb_e&53IyJ?|KuHbXL+Ucdk7W6u^D<^~J&a zUKvW`hNtZobA*3^&D~=OPjl@}Z4O2JgbYqU z)fp)ZZ8Oh7F;+^@>PEuZpFMk5K$INyIX&o$(TMZi??UG&W(9(xkvYY7FdCJS-K?%O zh0{Wu^gim(i6#nD`(&^Q?SLkySsJPjJ*kXlM6D8c3<6URZW8>#-`;BDp((h`az12! z-AZX?@lSYR@&ABmRq}$HI=e~>#nn8%EPL^AbEyQ|>tLu(16}S4ucXIpFl8-bS))h+ zKY~vMKi?Ko-khT9Zi|j$swW64u@Uyo(BvA<-;oHW^y{)yHU*II8vX$T4v~`Qz)!)F zLTN0DzPXbc2T!OVk3<^I$Owu96ym0BA)!~Xa&BRP3yd;;PP-7s#LSI_a2s^0PZ&(w zN;Op-4YM!&W&v~9Wig-pn-O&?SOf{!gPb#QknxU&x3Q7>MN2LIhDf_>ht&@zhGqqn z^YclY)BTr<;~W&SU}4YOxPz-=ZI@UeF71tp92~e#s&>ya(VcCuss%kVZ>jy zkTh{cxiUuSv&qa<4KBE9S%F{lXJKrUEG~Zh-D7Ktl)=iA_AIn@=n1mkLGC*WLHYiY zN0?m@jy#~JFAK-zFl|E34yPiqSa=SEIP#Vs0wyJY2x=<`y zPnfJpZs0hFO%gxV1ijxVm0bil7h6@?T*pboZ>GfVBxefX==`n@&mqjO=0H$N^d?I{ zYQw9cPH4zeL8Hyczp9qVLUAOwK_t-PR{QazG$6EwQcerN0Zkc~uTLa~!o3SkSwjRS zVmD}4FL>ZXzS2^E#@QK5xBwd{VSa9z$apXlZ(*pXxscf{naOy-o2BfyAp`~O?|mxY z*Kd7uF~|Jl8D?y+`_48xvjUYaC*KdXq~{0H?CX*McoF|V! z+&rWezf<%3;QVU6VQ{nvsuB5-8a}k9AnQ z{4{aC_@%4Y6^qJd)|Vo2%-VyoxG1wj9B!+nSG*H51AaAgrkR7~TUq^O9f68}tW1m~ z%~HT@(8M_pXsZl<#86TbpCjTtVJNzU=^Y70NT}#hm@vs*#rX-`dx-UaY`o@%?C<8s{YK6$}EA0AqJ^+8%zH(~?b`62} z-ZX@T_J+`0{CH#Cu~G}2k@(|wW83`Sgg-zNi!0~2BYT}xMsL+|KlWZ%_SXnt{$~Bn zR4_$tAU_afy4ukBRrM%P0I&6e=XwsLSAPXPi^xHGiw^OA$NJH$kN36Dp#qI(6=8F{v%V|z=ZGhHaI=|cbN)#E~c zx(=Rgl{$5kj4^V9B8IJ;@7xcrm{SbfjHaJ+GO>N`Tb*-lmo7VAfJ;bk#bFxn^qxUC z3L}{@1-&AsMdoGTuFf>HTrXvR+|hWIr7)gM085>&GZpb8Cnok0O4~&Z{6$IJeq4%#~EI~(ge@f6- zz*6dEShY6xV5*nGQNG;_@9UhOV2Jy7xv*;C(?k8ji?N-@PHv)$&uk=m0tGHGb2@HI zz20cu&L%-8SxRFEe|x(1)eL+CFk~yOUi@|s0%B%W?pt>PTCd}@Wx_hHpR6?MwiK^dm)f@VWu|Y~O~C@fl=hc(EER7Z zT+vCBYMTDyx^4IF#crwR#M6t}T96ub_84Jazv)q~dZX>9n^|^aI38IAUE?@U83c=m z;`%?Dt_`eCeo+&0-Q7Mez8n^Lbu(g~_*K{g6cM^rpqWQ&D@%>jTe5^4r)vOc zUs;eEqurPl$`Gj@uM1fg45ygthNsd}5(}LozXlJ_0_U3}6`t5YIMmQZ%dFesRgZeb zc|3i-pCsb-iB@N-QPI)+*H=+t(Pdj3r~=k1xb{zovR4CPYAyjUd|n9iEN(}Ow7uA( z+Q7-}y}@UxJH=mP!aiN`ejO=8d(yYfs8*(vq~g5v)XV;2!?*ck?*1y|o71yRu1j2P>b@n^OInCP*Qd() zQ5=d2=$boZ>`VqY%Aah4z%u}d$j~{OyjavsgEn_FVtwvmpZ=NH{ta??{2-wfO-KsCI)V8OX#{14s9WcKTeUQ$G+gWz%vy9e+KUE_LerB1w zmK84~hD9Ht)NqsM-d zx^$p2bIH7T1!{?1)|Fu`hr8pte_p_%IjXEIi~m=4u*T>IoQk=iRL|eA6FPFYFP{Vp zl1XYto3iOY=RDm-aP}?89>HtXH#qKi73QRezcHTT@kI}dDG_+h#n3)Tuj=Ch=aB&K z?PRZyE#?%{cKfzMiO$Njqb8R|J5md|0eXipKL`Z41a(ZS!3xI&u`+GMmVCQ{&bNQ^ z6O)(=&cJnroEc)UI2FWeQ0B+1I~oX^KVB#Y^y6U2ms&8L$Uimf&Ina%A-2s9Isx;Y zh}8NUtn8-)O=ccmtj1W@(eNctxf;rEg|XdE7aOC>nWfXaUlSjj%Le3SOrE>b44f`O z;d=8v#w;Ir$|!C@)`WwL+<{O@;|#OZk0C+u?Wp!{RIw?_;lIi)fvpme_l#t0C%-^i&_@WtySUJ&j*m^2O4{Axpx%-D4T> z?y(Gb_gDtJdn^OqJ(dCgJeCOo|J;;;23Ix210s-%$ zK)|~w5b!Pv1iXs^0q>$fz`H0A@Gc4jaJ=)3@1j7!yC@LwE(!#^ivj`fqCmjAC=l>2 z3Ix210)hPBKR)$c6bN`11p?khfxyUwf4^sY7X`Ativro+MS*PZqCmEHQ6Ss9D3I-4 z6v*~23S@g11+u-10)bHm|KR>tk>5Yo^1tOZ{~GiE6R*k0!SesYYfd?S7;V@4D)Kco zcySU2@-MHM!_J@a$Kji*mQ>-0I=cT5Z&G)P7ht47i-)J0D5=a)K=A5B`}~p%^_gqH zbF#zr=jSfomwO5E<jn<{*&|o)Ilur#DQLo^H0!^AWdA z>!Myjm4RS;eCBl0>e=n;EXE+IsWjCfD_r(j_0Qw3Y#)!G2c-qs_h`8>T`!B|cZk_{ z(Fl_sI~7?}D0)i2+!!YnBp$q$)d~{Rk832vc)nfegZOeA|Jt))KujF~*3Ltn&aR2HMd$#Bx}2YweWyAQ-Zl8MW;dh!H8L7FYY3qzp~SRBbLtPnER_%aea5($%Mu>&!Jn`P)K*W zF=_h?-SYtQHzp6lobJyN`@NT-dRUwQ49R<&suwN$F`93Z1}f*7iV9rjlv26D8`)OP z78%Kd&NH>T;D+Hl8aNz_ZFY&KhtA}9pP<%sOtD91Dz@$|WM$#u>2*iBd%((Jcy%ux zuCE6ni1Eg}{g)xt{q$9nLxz(#?5M)PC9`fiK4ebr7>5yO95$;4I>vAjZW+;W^fEmg z^>PmSlYt73PZ}npQY&x{(qM=V3CmM@4qY2NU^H^~Syw~^#Ok<6k#odQh;PWE*zk_+ zRBt}|hfqxU`NFZ|u z!*n%|dvA%fduN;Mf=YD5{5p! z3!x#WJ8?DpusXSN28peX4e~}&rQ5`_8O7=*U7sYvAgh>jl^+g)?dpcnc9#01LB3@^ zTeZ+!(b6|ALXH`3FvWTm?2m*xkqbQI29TO|A7)I&Ec@XTZQ$v&aPr)71X=e&iB=}u z$Rx4PeX#X&%V?GHU4!WTN5LC5r;H~NhV0NSLMh&`Jh1kk^!aVMi>(=g$+!b`rEfI* zvot({6j6y2J{cQBh!7q4Y9FAG-?DVR~MA1Jd?}B`N58d<%Bo>*}4QG zfOo2M*s57H%r2YW6mEeiHr9ejb;In zzO*qChDRE8w-sV2#25=KV-aREZ@ji;2?P|T<8SN6JP~ZrL6u;W+~RW3vAeIB-Tm=Z z@?Y%-)M?S-wtkZTX|~9P-lkE2r|)n4dQ+RMT822Q(!Mj6%D4VI8qC7nbKJU}zV3kw z)pH%rou(mBlC7VA*pEn^V+Yaq-V)J7YgnM=fp-!k4gY+K$qxrFWhumdn$XYv{rl3*7{^qr-NE27 zH)jS^wd zBa)}kB8=C?6ra9WTcOa4ZfRE=x5nBA1Q@37%6nyoc~3D*QlNptyQmBGJp86Z zYy#i8DvaLr)CVq%W8EmUCg7BC&~Q$9Bkmu&K~vy!BGv@dp_D(6LY3B6W*T0M#l?Uy zOU+5xFZiK)#ZRksevC=QR0u8Trtj%`0PNP~z zI!1MQgf*3S^>2gf%B>BkN9p=1Rvdi$zaH*dY7~o zTP;gBDxzM#&$*_RORY5=isF87RU82~u-LHn>=Yj5LYQ_Tu^8icn|2OCE?m7mJvJ9s zB;R$bfkhiemS>ce8&tJSy&tPs(*7q}ZKzVFUcW@0vXC2c1P6#Btg-X`mI$>Y&NgNu zd?kXPTJ4ziSBxGZrG931XOC2zam9~Yw;KC*1wp5k7;M5e(ZkThXytO?=RwoG9}b=A zzt^T&Q%d*&AAu5m+-T6hK6Y=C7UT7AA`5P@rfR&^-TW+0A+h5az#Zu06g1C5n3GSU zr*Ie6ufEwS{^%N-x9b|I{2e-$99D*vlf3_1gix)hy*e&5Q5^9CW!bgmr{M*QW`3^) ziiuF3e&5<)yITIpnMY7$IJ82=h{7D&acq2jzaR17mI8c&gk$l3FQYT}*~Eknj3PCk zzH)+6r65enCsmQV{{Tgnk|yx>%b8CW9GS%&5u!sH;F>i^Mirb8LOzzBe{?P~vIJ-o z^3Y}9O=Cb;dmP)`9_v$K7G6X2KIs+@8RP`lInCGsvk>0n@sQMmG5Mcs!1h4#A{V(H z5KTug6e)jXy5BRWQgQZ)GEW>>QHb2nej@omePKbVt3gUd4zv{BkskVCDBWSf7JoPl z#VdDC3SKC3dvcSKG+#8@0Mb=9a04@Rcv`?8>ywWxlc~2PJFsnE!l_O$Wj{2n{{l$i za3eR6MRPn0PErNYv`bMMcP$Xosw6s-KDBXLDZyT|j&TJ)Gt)K=KWyhfC(;Ddv}+><<0Vapyz#aWe8N7rt5C{A%?4 ziUPj)r4jbq2x+E56q41Ll)y)0^98&Ahr7FsilbToMva8v?hxGFXK)A>+#Lc0clY2f z2@u@f-5r7x+}#2McXv3mpUgh%FYnst^LsvJ%~~@(bahpA&o9?qMLD-G!ujT|T8CUi zQ5>>6w{Hk4Pniv(MKSMI`fi&c&;>f9xy6Y?0ZI4})U+q&V$=BXl7ZxAp=#}z;gEk_ zrnyBCsJ)9~Q$oWARTZML17Q9?Q%? zwqX~SyF^(u7G@e3G|f*0YG{GH)fs{d0c*8(Co;0ID;ugm9>@3=(|VyO4ZkI4IG3)G zObSAR4lE<}%T=(eK5Y059ma9?vIW;jqAa;`c|>hAYyj zU~J_K%EGJ*IV55?wGrm4N?#1DTcqG1TkB z$fAD+;ZPYuXxmR>Fa;>J7ZCKwc&iscOsvBJ1sbx90;PB(@xEcrTs;VjYNc|u`}RT5 zq!>YSOOe9NK!PTYIm+lTymaQ1uorvu-tpid((xv7B#+~8&ao4|e-4{pqMfg0uWl)s z+<43OT^NQ7^fo^obWz^0Ze8YzOdn1@1VvZufG9t5F(gojR%{$1mSi|W8XV|23KZPy zLGJ)P2>Vl8g)!?BMz?mgVY8gB<5&AtF6E`v(MtdNZNX-4yJ2i673b0b z^=-pPe3+=~KDz>nl@B@*BF_pkZcqy<1OpD#5?z08pRYhZqP*H7wu z)!k`Q7xT9CZ_!d#==)%r6`QaBpy_-bX!3YK9@0iulJJ5Y|AfSFb<`3(qf#O7)9se1 zXQoUs&vL&Wd&ptw(yp~(>C^0P1^b1niMudxFpT^&3&m?u#ZVlIZtif^h9_q&Lbv#B zUlZ}e%!a2}ovNrriOUXSJCV?gIpxerFAsT!Zrr>A;LXX4G zcrW*U9+@w&k3nEX)w9<}IGr>r=8HY9+f&_B_LgSRXG0HYi-i7W5M{#K_q#3nX!frM zUJ82X^2r(1zt6--X+n3>f!}FEG*kcJi8667roS=A%9U{jeJ@3-6Pf4I9$&r}49OBBqa;@rkHBom-*f6rdjwnmG{)fZRg+$5@?RC8>D>V_&`Hwud&(z$Pr ziufK<1hnyB;H?~K{V&*t0OY*}dB9$&;nE8J8H#NL@RxxQP|pufc4s^J%kZQw9cUIS zS?z==L;#Kj)Hn57y*C4nMVMN{iD(_wI%zp67~2Vt8ipBU2C-{7FCve%Kxy04#uf1$ zi${JyPEPK57SbgIdi?KP3-C|f;lI;^|I2eN0JwM(!1gz10)UGr0e_1pLHjoR^=E*8 z(4g|a_Hp=|%X}b0PO7mU~dNidpiKw+X2Ad4gmIc0I;_MZO`!cIACuF z+U*ql`mbjLfV~|6?Ck(xZwCN-I{?_*0l?l40QPpE4O0Ie2kh-Y8@hsDgU=W2?EqkJ z2LO9J0NC3Bz}^l3_I3cUw*&0~`}a6tZwK117X12e4hHz^?MMNCksavYzkUw@&Jh9N z91#G{5dq*F5wyqc-{XLDM9@yF;Mae1IsiCF1b}ly060ekfOA9uI7bA4b3_0*M+E%M z5&v6G_BT>Q098&qf|g1o{ofmt0RP)o9RDBw?|&A<>ew+hA^Y4_E$%_3?E63lKs6HX zwe&+iLN8N)tbw1reuGZfC0F8@W-Q1USzdFBite}$!{C{v`H`C+<*@SBf_8V;hT_E; z;F_py#r$@EvLnRu?JDX?2=^Q_ryTRuL4I{cn$F{4Tc71${Lf84m%`M2{3(kbVP64wtTyK5V)?TK>b8j!|>1LB1%ZBeF zqFR!j5T9O$@O2N1v`WRl0N{f^nmjyu0GiaQ+tt4S;Lqp#3Pol6v_zB2Z$zE>mpf~2 z-hrW18SL8B-xdco7lFHT91a^B^Y~IgibWx%S0L)(;vV&{wP`=zMiOe{Ci#qM^)7pE%>1Uo%H#Nqa>tI*^HIXNP8y@00F zBsAn*waUu*_S8v+`K;um+bo7r2FLCc4fj{9D_+cw)%3!t_SJ8}%4_KKYTx}67}`w? zOz%6YX+;rk7?BPVrG!NzbnQd1GKKnL0whp4@$z(#2a*x73yo$c@TP8+D^ZPD9G?ZC zm%AaAiru~lVb9QZ!I%kcKJ*^bl;vz6hsVt?wK%ylkH^!WSQK>X++GXv^I3eIp1mH; zcloBzzNl$EvN~Y7s|@)*G2cF~uKp?|Y-8a4hF<99l;XoFh4i{@Jli zNZb$E=M))rwIL|)P?rwl9S-m;m*-?tG%VXpyxu^%O+v>tH& z4ya@F$kz{vzo(^{+pIM2C0&AGj*ST!v7RB{VSdTs7D{@rBCJzjL_i~05{ij}Da=$lZ+PJPyPmq(ZAB-Ev<%~h->V&`B8JM+(q z)%LE7X8X0LEcPhz&jc)|(FZ=)k>8{$+R!xM?xfoPQlSV%7LXj84QBt5@5!J3)@=Bt zDOW}%dEw4zHVp4bI%dDYmKn7=!-_~{&YNd0IMJXRs zRYsug6M3(K;M z_l+MD7}5!`$S=1oRPXQUhl^DKwzt}Q-cZckdCH;2HQ8J)F<+MEHB;)#hpLCM*Nrr* zXnSjy{FWF>9BDvp{AEeB7Jo98cc2=}204|EUK`1(phvwoR?h^lH^PM`9;X|JU1BXV$Z1zrPi%2O`STF%(W(9T7L z88n`)yxbJ7ZBH5ox@J9jRm(EesaL$jtJIyAm6#h;&}dqXj38t=)_FJ#Kg3qSFNF&a z7~mQ!lR{I|JTz+WM-lek$ST{emDzV5%PI?pkV8_#Tq;j9rR(m@wC(=7x0gSajI`Qp;fD{F#wqLbXLRosKam?!e)1p>{lG-AjYH9N%JBz-@@uoh z*8*5I(mijZhVi|vjs=hXR(4#4v#iL4{F=a+Iv!MoI}i8#iKlYOKAn>DkepxvA*fPx z6U_(8_B&oTT@C8ZgSEJGdjj5HF{zm6^_JYVh6SxS9MY!av~j~`8yyP|*sbhO@@HAz z8Wk0Rqh;(@rwrrgL5<^2Zg2X<@wG;Q7`*Y+BJU5GBXv z>v)2^KpwxT5Cj!AT_hY%)`O5u8;cpFY#2-JUx0znx`bANbZ2fdogs@Fs$s&n0$t_l zBYD&j`h1FB25O{+_){xk)jN18Kf`(z-9mTk8K@$9C@4Qfl%iW9no237 zv3ujFE*hCkt7|l=Z-+sDoZl;Aa*5N*@KKvd#^?1<6ZXX29GqQ!-$aE~Fu7{Q&Fo>D zr7X!`gRmMsgd!5Q7eJ zE-s|d03&IDe^%$N><2$rQhEjc0^ z88l7cdQ0NKO3To6M^=m+-yfdmmJ5v;?UKP*BCtf&fkrKi<)3P*KFte!(n52?Cers3 z>`xOaJk^iv<)nF}1G}}JkMb&*K{YN~0v8W!3RZ0;1uCQiXpi46Bxvow$8Jv%qRT*C zq@v+pgj(l!Duxr_rN{qdN;&o7CjFtvzRb2W!48ES)JKcRm{pX?l#|=K-GL4XkL_?? zR)SOQAA@J&zjHO)5=8h7z4FdGK==hg;!ljEJWaDdo5(khNVgpmf7j8$un1a$KLPj@ zT~}YD(VH5aH}KdxQV!VygrING#;`wELQ8 zAY5{uZI~37Bg*~EB{ITW(r=+mCw9@d@YF7$v~elO9Vbr3N62a+1ULsl0J>rzYqnRE zYo{Mtex4uNt`R0A7aa8Pp1BNUldzApBTc{Hhsz}NT%3m@*_q8h??&O!jxwVmxEK)p z5G~(@O^|Rw<)`vkP`aP?#an%KL6a$88iO|oJwj_*Wrj^jI>nd~&;vKIQ$2a43VXk!5^>^3(n?YBji8qpR z5W$iCx7YmN&#Fz<6kpD18Y=N{ab*9@jui$!c?u7$zs^ESi;u?6uf4v@+_15&Elr90 zSa69`T!lhUU8f|VtfI)4!gL^h=#}@lxuD8AXVLvmA;?+#4)%pLg_AAky#oe{$017F zMMiL~LJYO~=_m7N#*@PHeYUlMpx&ut6Ep8`<;iZS$NZAj}_QyitVvYCh zMfaq%hsY1$zv?>pg=KTJT~Tm}6Lc(w>t~--^KEo+-{2b*n(K|tq|{*E5J_lsBTa;q z%Y9A%A;Wg5 zHZS%i$qtVp==c9{IU5|4_PgX6sV!{yrI@}QAiyCfX)cyc%p<7iPG9HnRRz}+TG!s4 z-fcrXXnJzUy)=u>E9@)16J@uU?3C&r3JI+ubRd(%K+NDzT9^J#%UzpJ8j&0zZOj`tJFXKs4?Aw}#qHo+cp6)-o|?pb`bj@k_p z@Odw?)S5au5cRST%@-GbL$hyq1f}SQi0~Qodm&pUHz95+NFZ>fdT(Tvcwbm6wr$17+2#T9y&oo zCn`QOY4AS#%H;7f+38N05T{pE{5P6?H!|vR*iCq?sXQ_HpR08mh@FNoG>ILX zC6a5e>oj+}g53fx47YRqJ0HI0eE4dHAxKa+=rDNI*T{5UNM8NE`S-cRhZ;qts+xhP zEF_lo?sh~y0XvA0UxvTzjqDIK{ZmO3a}Hd7;)^ggQ7LLYz>_+mwCou? zT#083SR32%MSFp~1u~2*T=TsXTs1OEZY4G7q1JuYGuj-2+bo>xP+3{HgrXlBc(;Gc z_gP7gw$xG`j&=)tNH1`=zRRXI z&IEY=gidcI$w<=RQP|f-=f!f-;32GeQX9XssKn2?(BQT6n~W7i=QX5rJF^7sl5ohC zQ#u0!`FOYW_zm1kPB23TTC?KO}r_%lc*88leKN{PfP)a@GuX+(Q9% zw9Oci-b56-b7GXB--5bCt-7_9C7m7LR>o2Nh8r$dgjj@-==q(HHA?piQNsvRD0hTq zr)ZO+baPLCh%FNSRo+*X4ZOgUQicfojvX>+h!hX;7yBI+`k@=R{=RVufVqVD*QPMY zXnQaIF&N_NQpTty9B3XLD>HABbChY%k~op7gUu&zU(xRNLQ&ee{)s+`ecxVhvw#C0 zgD<|Qf1^)F`PDgTx`+F1Q04Q}%=X4>R8;aNuN_~9%-x$X%#7?KYBuWIUe!u#-)?&AeE3?Sj7k;sWjXDwVIl0N`+fK4=be?6X#JDG(!nPEj0!=H>u!=^+Dej* z&Yv%0a796IAHyh5=bj%fPW0`Bd>K~hn)~nA-J*$JrFYKUsva>36P<_6!;xyLHchjV z-R$~0d^~I<5dv-Y4SH$%UJ{r;ZS{6s8ce*6KAVxYk?Zgezbji;*5?;A5o{YTMamM% zEBM(gWRuW67d*5xI{C1Zy6nz_S?(4%ft^FLqC}+_0TcHkCN)+MMHzg5 zx4k*3TLMBK^Id7TL{yu8DnF?;__st9Umt1x1wWBzGiHzN#h?2%NBa$T+380F*=a=tc4VHg zuPT&Y7T-jq3R}3p^%osDsaiSa@qSTLT(ejxa(Z`^FQSXMJ8kz42sa9Yt;tQa$QlPf z!5S_MvjmBAdB`6J+QTEf7r>Qa|CTJ{*tY89y6wu9r?Oo54JT_A6(3aC!nUjzHC5(b zevreD1B}K5Qstb|44?nzDN)GhHS$)^{3W6%ha#PaOSX^`hPg{gVl&LqOFo!Bp@i^L%E~QGIzLU|b$DgTPD5AAqHAX5z(S31Ldj%7 zl^0IyAhCR-o*Zxr)uk%r3%Md;52g|PzuPpBiKbZ<)aE~rS2J4vqJ9?PB_*O z8%RJ$C%9OcZQgEp;o`!RvB>yR-mL*&uKHzkQk1Q+`CU@(=((s8j=)dg@Nq9$sZ&YX zXk^@@Sm|k4=D44XWo@lg@Hw4G|tJm=m}@JWmSh9N{$E_sQ90?RfKA>>0Dzv+i%|_H3ixaqUMxT%;PY zj%Jk``?yh+`s3~&!e~mzcHWiGUQp`!Vksz>q>rG<+>ga9t|M<}B+TGzC}&A>W$ezh zs7cA;0La6sPM>Bge={S*I`(VxOOka*HQhNO%PJF?vRc@~LNchaN-dB8xIa=ku`B9w zwfJKYcGhNOj(v@d@Y_NfSwbqxhCo`~Hy7`MUf&?AYJKsC7v`1QY z5Qzc#6yKl#h2i3HZIvS{aeT-eoeFmRjY69-!Fvz2o81zPA@PU&s3`!3YyBs-s_tCJ zwO5gD5e|oV=!RM_f5AjnZGOKmRQYTT=#21W3`^2S(Y&iz{cmk02Td7drNlq5jh|aH zmE=<+(gZVD$nY_x^ry@+w}d<$2>!c&d3sVKql1csRnn!(_%tF*x>Md+4x`k^Xqctw zuF>q54H_qq)vO6)E+VES9vapvFDr)Ttb8!;lKvc;exlaIm~d%VIg7I#sKB;3k?@NgnqrByXR3 zfw5ls6Sc#@zPp}CQL8%Rlp8k!rT=&Z6*Rtz#NPb(k<0m`q0^N%SL5Nx!v;JKcFuSL z1*ZFFI&A{}hDm86?d$a)bUVsC_%ydsvXF9_Q>)VKG3fH?-J_)rN`*RA)NOVOx*urz zL7$~DwKiAdu31{dn)x#rsD5Z~co!u{mo(hMog=%-4JjvB$HpFkN3|puW8$$g_GA7k zkZrEU2g_MJHr`5|ON#pAPF_~dop0piYmc7s&m9&$4a`cYX&{AMVAFfe5_04MP|+O*-P`M^$Vrb00$w4~* zEyp3XMQ%p+(#-;;P)+)0bEe_6syU@RmQHnzN`0$Oe%qxgA4alk8B8CD}=S!!Dh((efu_4Hab2|Yp8DG=76*F-Oa7_Y)sdyqEff6F{5lg zhOPkS$55k3mtO)sd%@8}W>O{(x#4rvdkD&yCGRX@A48rtT8((1ewh>3-4;is}X z1}n#t3}3X{J!vHQjV!~8OSU41-@_~dqEV`q2XS586+!!^%kM^-0QE7TRd>Ugl)Mbt z+N?p}tT$#fuTR&*HjzXrQ)7B^Gy)H>8i##nk*-|SUj$t~t2B5_%vW9dC-KphTWcn% zJ~pzBuN)p@0Od#t)A>8SVG{LAY+~29;j*qCiTy3vW_IHRfr1C|xn&Bp927M=IXJa5 z8+l@b0tB^#$GQxD6HX$a=GGPprC%3X?op8v9FJ1}FZ9MNC%G6E#k}B(7>e0IZI8_< zOdQ1x=KzVR_NJbV<`g#Y%U>*kS>`_Xo2_91(b&l__^-MMn8p zsrq2}46c6v@Y^RX>)+jz1`qhM@vxaax+H=(X01jUk(=igCf;W2o-u+<{!Mge>v!;w;41x|JGb15yE$djt1)#jNo7$EqJ`3vJ%#ya$5n z$6?7@o@$?SF?9F^m91J6)a6_9*U}@zzEJY#qx#c>Zp$dq54~|sv8jyducQ{qL)X8| zlf{Y)kA)FEToQ*G_!EQlo*+Y6mL~{^%}65oV?PCd^+h@Bkkjtni=W5OB3v~CH9^)1 zzLzaacR_pNA4R<@zCKL*1QZ4GzN@8t!5Uuv5wy6Ldo3<}*uMj3C`Sms;KC5^OCeT$vic6hAi8zvQQ((?59rwdWOtS2$4St;Y( zy1cNqOx+KzN^9J_IyZX^dJFnGm1(Xkg`AyH%h-Nv~1C^~+M| zMBhw7?RaYTH{R^`BKpG@1-0jT=W!xr3x_kwK)7E)TA$DZsc;oPs{&E#<~t@%hWF4D zj^>yh})wSFU&Er&=T zl4i+vji5=SeN8^j)dKO5zUY}vw_hADp+rU9mswsy*3ZgKD0zTyy8P!gx((`i7E_hc z@x(z?OS@d44q6>wDfB@`jgK!XEtkOIY|&5h7mVhSu3y7=h%)YM1$6m$16&fQgd??^ z3+V1p#=&`x$FxE9Fl}ROD=}N>PZO!{fq0gFzivx=(=lZz6FB`r-%ea#h4HFi!ZS+y&ephOz7^oD@2)t=Mvq-ise( zvK2Hah!{*f9^alTXo{bCJ&%FrVX~8_$!ra1sH57Z75pLD@8!^(F9EG{A#)kYf}eDx z#`ROg>PYL-U*`(%ZEhuJNd8Svtxm>tsbJa5A2fHg^_?DTt2sutG#omZkFB!beMF97 zO`Rb55~nK5Y_p46Mpx>!{b^B?g4rk5qQ$ZzB3B1%E_Rw-R5cJ0U9&`V_Ell2ls<>! zbLeaDS%x$O3@2`JnraYUD&i1R2_fv^Ba8fJ0=BAB^_zXTaXATnrLZtNtpY!b6tcqQ zypVEL()W5lS7?h%gXATU+U}r)v1oZ#knqKk@Z@$^h-EA}tFiSL8%WfyO7+yPV2D%u zrq7;muy+x?t;&p$Mr`5EZ_7Hwen}Ga#+=j2TYE=Djb6gW2l_=MAP|@C8ZX0SPmO=3%V+k%?7vPz zWK~3^cL*4BS9(08*kk_Cyn`^K%P-fg0>v|vOs71?1(h>sZJ~#1Nz>>VAyoly(Ae@1 zB>y`a1O5Zr{v9yj<6tnz?hl?Mc`f(Hbv zJRn%*0l_K{2v&JOu*w61RUQzm@_=BK2L!7;AXw!A!K>f_!72|3R(U|M$^(K`9uTbZ zfMAse1gktCSmgo1Dh~)&c|dS=FA%KqfMAse1gktCSmgo1Dh~)&c|fqr1A?o2f#B+1 zAh^002#y+o;HVJ@jv9gBs1f)#YW#1J*5B0eKWIMge{!&Y_qhKUX>oD=k4WqPUCj?v z^*Yn84?)p2-gD~&O0*!Qj!Dg7!>-x&W#bI)eo9*6gVQ*Q@5{-_hMg`Pc~2Ik*C%`$c23;crum4P&AXpJUv^M?fA(Mp zEq`qz<$D1w_Z}r>Qct~nZjT8F`sw@X(d>KmRAsmE#u%dic7;>vrj4pCJtEiK&q5&~ zy8Q&~ym)GAI`egep6PAUZ!cFO1B7)e9*&-$G&PaXVt-Snqf?vpZSeij3EC)m&@Pyv z!2VwQw94VmS330QMdM01Bu`8yFNXAW#@S(iG>Np&*ZWN~CKhLeHSXIa`kR8s_dgnM zYO}DAE(VTC+o5+lS&KQs%Z}tUhOhO%_}5A&tI#}$3e>yN8{A+ zBt>X4zBC3pM)j-Dw0&+d`iE>_n4>i1 zobGq?_?S=rLB6Y5KROaPWihN^wk4%R8-7ljhqS^eW~0Q!d{W5HHwc0^p;V7W?4jC$ zVn|UemXD43v>@$Tz1C;5j7B37V33Y7O3L%sL97?HQc~U(ey-Hgs(yhjR#HKoJ z!Eflpx4}*2qk!5$L%K6af$DC&C!A<)x86(JE2{K?vwCFVfLEYl?&_R{EsVfK^}_Oa zCPHI_(49-FWP5JWheOY%cDDQZaBY8UAqAFd;gxR})-XmN6X8J(L7GwLTjv#N^DC{Z z+Q6NR0kXgynr(w`gaImKYP{6KUiJ13hr~m4zZ(>tc|FyzWeD~=bLIDNzXGhV^)dLq z*^ND~W@Ncj>KTU}{_3W#Oj|CcOZ_HP7H=S#u7xdN_%m^8d+LVPlakJ5s&{5~U@C7( zy9G|UAky1Zc9Ot?8(Sk^ijBiC(9V6Yt4>*Msb9O; z()kl~h|QI~4e{`Io;iXD>6edKCcP6kSTOmjN~)GWsl?~B4i>wa?m9h{#$}PE_hm0h zb7CCh&u)0-6ovhRG?Y;mviuz*nAK%?w!?N@;xV7L?4;vykXQPy%9#mYax;N;NG_HKP!z_|ExE^# zzfoYga*a>d`l=_-Bq%CpC1lxS7M0;k^2fVkYkDynI|=ZI#y_5y`TGg*^WDQFFRW8> z4Q{AJ1G1fwzzM=7oDm8QaXvLW_MmeVMkB6o$Du- zxHfgFI%VHP)tT5)DCNUq3A@fdU7Lb+N}Q&NcaiFr7}up=q_GS&ZFzWefI+)BnKJv- z3=IKO3c_+GxJM;k9+|1izGz%6jg&Ys%Hnb*FT`^!C$se%=8|D$Q12B3*;DXMK<8}U znaRKV(f&n=p?w!NKr z3S9!5AF&b_lM)uQ;$hS-*+KlR%9m99heUx_9;{y4#7u&pDpGi^kxVZY91X+Jlje-n zGAiI5Z1DL=3!?Prb`dMr)Q>XM5$nus!t6C{;C?Hm=@iS+ZkZ+N#4=^O#szC{_L$M1 ziaQmVROW`NRn3g+Z0utHvTzeyBaU@`qvB|wy!VUeHFebCP+6iMjJl_6lNOqeI}@`d z0)Sf3G*K7v_vTS`&3k;yWcuVUsAL2Qkf8A(hx4VtZQ;tUi$O@3NoCgq^Lo+M64zIw zrqzLFVm3)K^Y+zS1_48|gnVMwXT;*l2$4uOe~aE6GT!X?k3yIvMMT)F?`Z5tIovafEuz`!us=-l37k*iG;ojNjOIGLVA$6 z3_tR_bL8F-$+q;%giXpn30`??T^%qJ9k`9hW*uB@Bk7T~2L};luvY|mrMu)E^av>} z#bjwP`Lhl`mOXcFJdSQm8}gUxG{vSOCm{B!k9V~pCa*jnzPmw>x+4dl{KGqgCkf)jGI=V z@CGxF=a<>rmmR;ZZt_UZILo6PQU=6HOG-it>drXx6HIevREO|}8zk@;RUp~be%F?I zgfA@^UcH#r`iM!ff!{>G8>Y5n5yn%?bb^?#+Mhn_vvB1f;}SL2OY5zc4&}4Ac z7nCC{ED5=8D%6gEet&F&V{&Ltj~2H^CR&AHy%#eT(+R75C=#;X-qmQH5GWelhF}Gm zfjI0)SNU#(wVZvZ9Ag+D72Z6lo#`c`x-^oi2_wIUJ!bdl|AbA0nphd(v08fVY?>Kj zED)nS$nTmoJ!3m^LoLI(R`;xWRrah(FIApDfO;IHPNzlA<)G|kF5WPpTc3o2Cj=0ZF%1!z5OZFcob+L=~4ejFHvpXU%h^>u@VxoM=^dN#A@rAtp%p z3t7ULA8NHBJ~JzDHLXWS?fa+t1|`cX0QpeqFR>mP&AT$rgWpY3D0C6bF|4ENfnk zA$+G?x>ftu)_Y*jTp zg#T1qi+N=-ym_}Et%kXTzPLnL(Q2p}iq7Su&C|?}tXf^S-!nxhUZ)6Nq}(Y_uR-Fg zk+cY3sZZ?vFfPqw?Y%~!r2`hE0wU z-a9(-3_hp)G&j8QGQ)%)<0cdtwmLVE%7^3`0xJ1BI+eg_Ezey^vwrLYVX<20QFf^h z2jmgt874-V(!Z0{h2w&@DTov?`Zy=SGrnhgEF1MlA{E&{UMMW{xOc|g2_aQs&g#kj zeBP%YD5)dzpw=ug*pot4vBxNh)cq^Ibf8I=AXq1opf3(59-YfqZ(u8qlw7B?jL&74&au`wcCx7DM zq+ryieKEdB8zX}rh2nS>MTkGsJp{xD+zlw$b24~Eu_G#t#G!5lB*0kbV784uK~1jz zS%t#=gzPf}K`I0ipltI%LY-5(e~CztoLQ>SyC0>sR#=7oA}4BgW;v@=#KB^D`DBGw_SU zl_O4)I8Ieoq$nL1?oI3Xns;yXe$|Ua6H1v5ekn&E_>{_L?2vdTxS}6~te!=O*d2hh(t{bE+X3ne(Yu z*OM-nHeV`Jh7w!R)!B0h?^8MEGC7rKcZL(ddJN`skhwCf^shVyD*f);Z*5m3>yTM_ z6^nv2+g8YFMV(Ab?POf21*$bXMs2ko^Sm9_V|`LfkDk%^#%khD7WrZ8tf?}136ps< zl74ES21)`oQ0a6b8E8b?{*W+yRH<%Q=l?!CG5_FJ*U|_BF@I|d7y$SJSB#FF>l%3I zblS!ZC3n+|qqe+`=MO?!hQ@N`i84!SGSSppN=FjKS{oT@VwCqvSE|&!%~Me4Ur97O z=KQ(O7$dJWE?e>sP$V+H6H)Q#Cqg=@s-uefJR|(2BTb2l!MNxb z`n3r~-QVvi1V6wRw+BmD3&Qyva-_XDJpPd=C*POz!F>vOK9yOyN0BVK;_L8G+fhk8 zB6@OQNEJFzs+o2z;=s4V_Qq)hGbe+Q6&w$w?Q;+eaq)Jcmf=qKN-c#wokOc1|kbL@p0gyhgYJ7hli zt)J;1BI=u}Jqmu zY>l@%vEs6uvh7F(?*>~U6llhKZb@QJ404@}cX6+AM;ih3<7v&lEkH zMXQ{syb^f7SIT6St?&zfW5sk!SUQ1Y_yl#rws9Vs#^%00^(E%6@`vQdug|P&RfDK% zWhQ0MF=k0h>nqd~pespo*>S`ne-c{iRw7O>SglCBQtL~&4tgVr;^YOiLsWo#eSd%Hk)fGeT8 zK}*?=f~YGY@vm1t5siBR8b(X$=; zYLhJWhTBi5@AZF(BL9JE{|<)!Z;v9u+71ZTc0jPU1A?_35UlNhU~LBkYdauV+X2Da z4hYtEK(Mw0g0&qGtnGkcZ3hHvJ0Muwaf7uTH(1+ogS8zuSle-fwH-HD+i`=n9XD9p zaf7uTH(1+ogS8zuSle-fwH-HD+i`=n9XD9paf7uTH(1+ogS8zuSle-fwH-HD+i`=n z9XD9paf7uTH(1+ogS8zuSle-fwH-HD+i`=n9rs^t_g^E)zk%a_Qg+<`(*0xemuvs4}z9rlmC5lauoIL zwg5HBt1qHU2%2e{WK)gG_reW-g!cK+(!E_lFRzG>zs9tt<@a2^a^K+)FV5^LHOaWL zd*P-KNgLzssA`O&*?pu;Ps{w}v+h;NEqjAlA-lNcQ0zbW2Fci?3~($|(y@qk+tJ4+S&j1IJraAXbFY*9mVx1 z*YXzLK5q?zzryT3+Ey;SZ?QZ1C9anmW7WU@>m*W>#j?Vaz>*2M!8ed(nG>n*T+Q*I zAJ7uWtQ#w1lg!fLTaxJUQJpHol&lhq`IqQggut_Bz#%KF5 zqHzb7x;=nvN7=ntr!G{#O@rEkC_u8yHY{*mC|Ye-P-)2wGhs?j%)|~oq48aAtynJm zCrbLfw(wzr$l?#aH1uM$dUf2L2&vMI0r_4AJz_qz`}-j-LqajRA7CS<{k6s_cp0V0 z>;=B(PnY%k*^*W2YRKxc{Zu^Z3vRDR*Wjjiu*qALF+IOxWLMc#P%s@A!Kg5puxK#r zrbQoddVhN{=}oM~vS{g7N&YG47#nk#FLspk&o(>LIf{%azU~66o4_B{4VbV z`?q`SC8m|TXu14`c?(hPcORiWEXXU;eSjYWKU5I#texM?t*0(mr5pWTktn#n`Z+G- z%=!b{*ONLxoDoqktqwW0h1KpYTjU#G<-1xv1S^AqF+zbq*_NXZnD_!6!Tuan0azxO z0%&G_B^}n}wYl@8s4ho^KSc2shU@He;$5Q$n?2Bw4OS1XD03A&Qu~{9qmf52`hb55 zzMCvuPZ%zF1`V*6IgEA@OWkmkX`GF=+LM;2Qzsx?9U8V_0iY2(`ddva36fS>_Ecw^ z6Zn+2V~`u5cPe%CSNUOO%n9E?@Bt?*hJrT5uWOiq@AfKns#1Z*wdaq~tXjr;ix#!! zn8Hp1l{APE5E1S5ayV9x8uB>1Y(R`250CCV%25gXs% z+vJXO-OUF$c1Flyi)ne}MGo-5hl_r|XpZ>R$_ZmqmE1T+*j<>ZW1!-&A1PzL`0clH zf*{Rj$zc~-_u0v7%|8XRl>DBbve9RtV;CU%~FuT6} z{pA&Y>$9PQG;7YcKnRB~IBFX7@6CVE6S4#=U6%hQhXsz7MQTVfjk98&)zB@Q3vjF> z=+~p;I~c_T67C)WqOunulCis4X*atf5DCNuu#R?>00k|)Gh7{ST~|NC3&-p#Cqhi& z)AT{jYwGkUa29V7J*!z7Ow||kU|XohNw%wFysYMhvlxJ zxkW6><+MbVrJGF+ok(DV__*qCR9#A>zOM~v>094Lq?4>7pGe!ikL01@lFkP_nShKN z{4z`+-SRLa1c0pfB%FxPBE5RIWyAmFZN)ueU(O{UgpHG7W_#%?v*2py(4OFN#}`XM zmNn$3NxBkI1RrnsE5ZF<$&a7+-%0WmS-o>9MmUHnBm!Nm?DZF%=%*?C(dJZ-ibojd zA(J9M6do#U&*pli$tU3;;?myto+nRq#|1E+v@a?-8e)6qlQWzxAG#&2c(1P|cT|&k zy2SPmO8+0~&MGRdrEAv_NC-}Fx8UyGI0^3V65QS0-QC^Y-QC?ixCVkdoc{Liea>&= z8|U^Pqc7^Bdr7TYRbBIa<~wzcg-s<+^Wj_`mqU(N*@b*FX4|KH--4xTy7IZS<3+r7 zR4YvZUlkLU#ISLGZ;Z_BP>rr;nVV=IJS;Mlitv*CX5{@;vV<4Z3S)6G^}e2hi(S1+ zgQNbP${a$G^Nh(?SK|*gOD|q4FNd)E3f*~f^vw=GD(}3ocCYOYx$HQ9TUhZh^Hq8< zkIyQ``ZzGd<$GdYbK}6dv=7eY(eH9G)0#717u3rkUmpifbDFbI7zIvCKPK|hl~YGT zwr~6}ijuRa4BGgtMN5}=`Ha)Ct(qc!17%xOxXC3IsYkuY!ET?ZvLJAA)#Ug*2hsP) zS4Xi1K`;ZKlYQMPdN^O?2I=+D#V@S$&K6Y355l6&?;gYMt+AGro2!e%tRrsUt&;6l zrt!@BGr%sB`?VShwuVcDtfRBmKq^m;#~m%m)MMp{Dekp6k4a!pIq&1gYTKDuFB=M) zSkcmbR~aj3*RAv8cOhTIChLANEL!>s^$5OmHtxxFn_x&UAio(Q;g$I4nh>VD8m_zQ zulr<&vpTnG4rpMr7GF{TJ!Swa-QWdQz6DNe;x^#A#Dh^jLVsh>n$~jirfV)#q6tm` zj{cFz>^taHUkfPQSvX)8Qbiy)=D7Gg>iRg1tG+?-EYW^FFsgvw@fx_4bJU?AKZqKu z{hD4Q2wE%Yi~G*D2`FUS-Ad+!0|}y%%jNcNR$O}zFV%Qnua{Xs7 ze@-<+4yIg<1tB-9xq0`(Rq?4a$!MI$SM9>-7Y%(idRow&je9MYUeeCTi*QWcvx2qo zF3m&Yyg}uc14YXt*&-i_^n68JSu{m=uF0=dLiis}7A_C~ff*dnj`Tn6e)qA?I*IE_ zOX)WF+h5;~>U=$sb|6W))n|}Bf7NHW%bn#AGhwmWAgGNyY7c=u;xG`A-{{h~w#kp> z7TbSBahk8gg}IywSX{ScZNiQB9gp$8+olVGXZaf67#rf7E2?B~^TO)%?Gym&EzU4t+a?kY? zTv+wrm?S!fqIkeH7lbWS6ia{1*iooFBXx$!<3Kx9jz-;HOFs>Y%b7k)gS%82yhu&D zb4(UD0sknzeZIR1-=x89hUa^)Xdfsg(_z02_2^#T(=^=nClLY~Z37wGq?8rcBQ5JD}|JOtEeciOn`u zJx{^-rW#tNu8_jB(2CzR(QEAV;J9=c;iK>GHxWR67!q4;nhMOI!^1}3AsG@H5NLd7 z@MEzFgU$;sg^pC*b;AiJuN+1{pdq@BKYQ$qHjWFg{mhy{p4Zh*y~&a9H;U8G_YGpV z)alY@kBY)e!Zu5a!CA01nxZFlttkzOOF!0ITrisQ?PTOYxs7$diqu3KTMHbxyb6QG z$WnPf89Z#}0*tH^Ie0nbH zKlOP(sQzGeu~Q&Cs8n0OsShx0lg_CKn|#~Eg_FxfitjCCw>AIBxf=3auY2L+Mg#NvF=T)3&Q^NyP$XI^lgJ1gBoW6b-U?WE_yOs02lmcNGtMm_WN3w9xIZ@ z_$iY+?>c0)BC3Xn27Ltne%8~(G9u zGb*o$OKZ?R@8<1ek95J*e~%CV{*w{Z|MCa{0Bj`&07FXvFth{!LrVZKv;+V{O8_vm z1OP)z05G%!07FXvFth{!LrVZKv;+V{O8_vm1OP)z05G%!07FXvFth{!LrVZKv;+V{ zO8_vm1OP)z05G%!07FXvFth{!LrVZKv;+V{O8_vm1OP)z05G%!07FXvFth{!LrVZK zv;+V{O8_vm1OP)z05G%!07FXvFth{!LrZ|ap{4&63HX~|`ZsVA@UJk$|5qe{p7Fn1 z^6#*Ibw971y858))cLOa!+Q7;=Xs9zi`Tk@k3Si2%-iRLIK3M3Y1YsfWBqMR@wE!l zP`!)8B6tBxKNz-G%%Zm^-1l1LdVLHBr+>~X={no32!o(JKm9@0PaBd}m)24>Ef3gy zd%CRbgzF5z@>?lZ|C8R4|G3G}UzU^o9z-U+JzFPv+`k-ve8y0ECq3KzS|m^S#EhH2 zoOxoIGoxg9{PEx9*6Mh(0)a^fQX7i^3=o(EH8S?+;b!l%C}gg@s3_`9=Iwd!!JB4> zn`RM(|LBR0)}X{&9Q@5oVe?k6OisB>GVv>e5`4NdoaFPts=bit%35HuyI;h;=SZY* z$CDJp6AaJQl;FM+TJMg#l%{VX1826OcGE^_ikkLxENfq|vG@$!+GNXKLNL9)w!uI^ zk5Y6!glYfn+S(O>#J1G}%lkP=NVm{t$Ef#w{CQo24&P&NPhC)|6Z<#*VlJbU`zaZW zjQdq)2kyRmRpZGGhy{`%Gdt^FD`FY1wsg(V1qyA7+YawT`DgS+4>8v;xV*-O0ArBi>%#xf3_PIO#8RUPhu}?1l7s)73XDic@Xr4lhCCO zf7u}O@V*9i6if8n#W2%ZCa|ZLCbgLXQfo@S$4oM0WL7;%%2q&eYn9 zCX0p0HW8l7jz^jN>R*>;nhTNHkwKiP#5cq|2_Dpfm6(efH^i0;k!uaR%Wkb6eR{zM z9L91P1JtUIlx5h&yAvVYJv&{plg1vu}s-*c+PvE=pcEq^E` z?0;d|-9N0~R<)at%u(S9A$=i#JRY>gwacIxd7K6v$$KtxTlujX1Jpr|^N}?wJR_j5 zJRJ+A5BQAM>Z|YsG$1-R@E;3VQ@<#OX;M|_E4`4X-sHy7I5(_S;4`RfKS-{`8IINj zxb^QXe=R251D%i-$!x$;36~<(J`a{%7L%xV(ZtEo9TxK?Gtf^`Oix9$V|&ItI4#{^ z$q$jy)o8Q+)?-R0h1xOsmM`ZT`uipc8~ZhYwnUNxDuMicXbRwb_P2xI!mK;(rO$KY zmvXacZ707kk)!o!4U1_s7WF9}1H=|tWJ5}x#HKZfmqQ%a6%vjOR7!lQ_pn0mEFxKS zon14ID9sY{53y;b7KJHF5Uv2Wxb+4&j`5l7lu(q#XAIRizX zqzguFeM#CR?^vw@Cd73ilW;aF6LjMGFesBa%`lXttthWpnEe~!=t8djT3oNUvdUia zY0e7!U)f6=(W}pC6}jz~NK8*jJd>E&DF`;yl11vQ-C0uaWBBg>p3WYyfY5(2U&OMrblX?0Uk<>_N5LA*YIptBl;v*?kbF_w!icW_ zK&Jp`xXuQ2VAU()sBNGQLI>_x+Ol*bo%9F-c+7-)AP-O*v^z5NNin68qeXh+@D$jJ zv>F6Ia~PYJ_L&fOXZNvq&EpOIfa<3kVY2?s_jlI`AJ{04Q>9CS9D_~lWpC~hG zr%?+=`<+$qn(cOGefS_>06kuRM(*W zMI__*PwTwvAxl-}Vm{sDMd)y-;E!$c*$nZW2VcL^sv-yyvw1$qPdWx-L=t4iF_aIC zo}7f{2hfj`iw(#bFvo>)#7L>U)UdEGQOw(};XN`y^D2-n$S6cM%5^H1`6A|ZiQ%5~ zT?%RAD!7%cN86)VtoAn!u?N`dG{?PWOhA%wa;o1##~Oc?3?g0qveKqRrC-&(qHkK( ziGD=RW+fKPRn`SjwPNZR{vJIj%UM>$uyy!_Znd1_SKMPq9>`V_Li4yt#9`C9R*YZG zzi^hzaS!6ded%nPV!%DE^D!bfVTxmkQ9o4U$`4i*spk2JADHFCeA5^w=l!4e7K35yhD%*c|F-8?eZ$DgB9i}n5d8%tggITEqF7RjYs)Y*v+5=Wb{ zr#kOZ|HQ-(J6SnkaknBP1TQ#vE1u~bHwJ!}`M{Lb%@dN9Z^xox2sgA{=pfB#H*4D? z51RGUi(0ky3nTWmZ0|tK<;K$|OQF)_;QVFIUR{nbU=J(|IutJV8`JYt*X(2SDE4KU z0e^`M>kmn8HQRy(;_x9zIjt%|gvde@fH3dq�-CfR9{p<&k)Kw_Nnxg>1_N^)cMF zZ0z`Y2I0NKoN?u&d=?!fnC$dB5mfL5B4+I*kh0E`drdCoC?B%$OVy-aRH?3I9Z#km zJ8#s(M&eoK%^Tsj=ty}OH#`ph^k+K4dwy&P@!x~oixp+35g;E3lB28=sLNn1&D!CJ z7c{+;ZXiYAxEQ}KJL(EWLR1~i3;R$cf^`?m@1a5qM|;xx06ja*+H*&&iOB{azcC-? z3ldN`%#ZM0TSuTY3sEI zOl&_7t9Yq}QHb;zjRQuPVldi%vbc)zPejrpy|24X2s(ItU!$d3Q$E*-YD<_<44Q`a zw@;_X?73{pPx~K0fo`5*^WM51yyLj6dTA7i0okJVwS~$igsSy!+Q7#8`6gZ)1T=}zI;!oYC7mjzULpS*1 z2CcKqH&4Wime6K#ly*nyW0QXe;XjI98w1%khcx$+xM?YPaGTpDYJ)WMm8-%HuhT4Dv#;KTCWq#+UhwH9tVoi@5j~<0s)4?kLyLd*5 zMOCJMO%&w{djh3vYNn5b4Bf#6XIX(ygbl2-N~k2w+pXWJEiRy)igUl+L5Z$V4eI(x zldug54_lF?edTmZp4T~*5cl4PCRR8o1SAaHt^aOyi(b*vhOKsc-zKjuzVYUX>KM2e zI%Af#MS`uhd2V{?O(D?+A=Ksp$J+G%r+Mjl@o&^7#2!?q;*W{XwdEa)AF0+5-Vmy8 zSz-T&z2{#!5C7~8{=6S1tJVOpY7GFZ)&Q_-4FIdw0I+He0ISvj zuxbqetJVOpY7GFZ)&Q_-4FIdw0I+He0ISvjuxbqitJXlUY7GRd)<=GZ8Y*Ylp9%yZJ~TsgPP zHCM-nCrha}=dZGojIWM-n+&w1s0fMFIOfa;iJNZ^*Nr^tueg&*Nv*i(=Dku@ua4?e z2fe|HeW8EEp05@&X&Ws)-u8|nd4@;n-rPeDTy<#$Dag#)`X-qMw!0fGd%Ed1GhXj= zJFRRVZf&brKKIdG>crRFUjA+@JjaYpW5~ytrFOITY;k*9oJH7FoRFV6I0&(d=zN(c z&A{(iaWr#c#Wb`x5Poh-!%26J5bRk@Y=rao9x-3)7qt8KJWoh;gViz8ulcOmXR7Cb z3gp~^Y*PtO*xw4y=(qA!Xjk_q6C04!oM7>Q^1iA^Pw(C_|?Vi263Vl1jZo<&Ixm}Vvk*CJ~6l3)cRNrQO*1htA>=0ex!)4~`P2>jWb5+zb;An6Y`d$)S5zte?_2g2l&C91uJx9y{5%PO-t z7s~U;LSpr!dAQ3Ch_gyIgz9W@+o&H}apk}0rQc#@D}{Y}OK$f5=>;+U(7BNT#m&J_ zBhe%ykCugI@pWwP;yqM!UhEemH=}@yVB35NytG7bBrYarJFoB5L+`#M5L!58sAX&* zz7Nc5g6l*Nt~)s|N8nbcooJ)`8jN$D{uO;C`RK?#o2XrS`)Xto&&axf(vhb^6ekA3 zAJ8UrrHs=hnhwa@x%(RUD5Hw*zoL|{g7U#WGbid$ZB!pmKPPHR9L285S@gX!Uw4m@ z3NNA02ZA?5sO+v~6h(+df0o{nL{p~fKavOEUj@5Y;!9*!E4CY>B1Az^ZtG5n$WLZ5#S_N$X~&^w323F&yL-Q@xxTc>+2(eyfa|*~9Q)SL%XvFeWbp zzM5G6Peo}aPDg7)DIA>~%~O1@2JxP#rTbs%e}ME=TPjYHRl~=yZA6IvJ`;u0jD2`9 zy3SEJ=(IV?NiRb2I9WlOF}aBz5gZgJ`ISY>lJV5uZ~oLQyARRvlqxl+OnSwe!WQwg zQ~@H1-1#uy28=1oKOVCD2!@@2c1o&)ho?72xkd06fDiNw2>kTH*H;YMpNs!z2t=l& zPw&TF@kavU{jEJ1t0}U6JML~q0A$>9*0jc@t>S9vt_L*2$J-`IJA&?=;Hw>=f=>Bj zUrYXgPuW~>{iBJ_i_?VQg@tA3A<2f}k9RRDbj6$mS&Ojwj2@Tn`*}) zN~y?PUlHBLwTY11Lg1wsN&WZaceM5i1w;M*K(lgk4;>mH6@*#s6AK2X{h@3TgPvbb z`W_C{u>F;Qwb-6tAe3Xt4bSqPQX${i4piu<)V^f^4d;%62JjSiY+#PPP_r|ckS^{$ zgeMAdup)RXR?*ul7na2@Ppl6*$Ee*A7J&16olPG@&K{Wqqi=E85qp~$>AYt!9^Phs z-~lmJn0d?o5nhIh$g%x6+wGtGbyugyh+RdRt6mqU=jC4C8^NfTLa2#4@u>EK(m(gC z<9X~pCf~<7`N^kkT0Wf3<{#PrbSh4OoYBVYup}O$dVGE5XnziKKC^G$)IbfL9mj1c zXWhq6<#>J_#~shDPc9B*F}ttT{#aZ5ZIuQI)G?Hf4FT|z020A?`N_X7`V=!9E|RW- zunrmFy=pEQngvtpQ&Kktj+qaHqe#)iQUj932ewVj!1$aBb8O3K)0N;~nhi#=#4QRx z8d1I6bV~y^+ZA+IgUsXdoK7)BW=_o}yLz&RNWVj9*(QxSmG|_{@{91I%!?#B2gwi} z)PFdO#)GzH?kG*db-oj|!?!;$wZorag-`=2-@goZmAWTy`eDuT12S1w+j-w!p~gL+ z2}vt=Y!Wm&UUn{D%nw;(u8Tz53=B!|kSW@4unX@zcCJ}1LA}*c%3rwqYMHk7E<&!g zz1*v{PTe2)2#HrZoj#XZz>qwSs#vSOWB;JR-Wk$xgk@K!m03Edcx>eQhIL(lv^utw zdpxSmni&?Z9KS&qK8syoZDU)fVCO{oje)A!7>mqNVy6$!m}&`6B#NG=vrCZc5L8BX z;m&sK5|w7_1S4g3UVb(%a8R)XBjvo4`1=jHxxPMkiEN2;iB4J>PV?;HFpBFqF~CrN zlvLrAsuP-+xYrr8KNthUIY=4>9)qBpv4?gH=PY^~IU!`3xBFSkpxubKsXUWg0;`nhc30fhHJB0ga@L z{1Di!hng;-o$JfAAwfDuoat}Knd;N2sYh#IRFkHXH9bhs8svX7=n2D46igc)d*77r zu0dys)#N#~zBYFs&5FHiOGpXlY^#?qDL=M>FZFOSz52X#?!pBsfF$n}$1VWf_sxm* zh{!bqbnX@rG?7FWW)%z?S#tg<;$8eta^#0*(Ac;*Uy)JpVu*Kj0t$XI!Z1H#=pjUZ zeWnURiRvp1o)dEAi=K=mnwKTvRV?8bt@;r(hu5C18l+8>FBRRRvptUTO_(ca4tJb? zq_+RJI4B;cf%{(K zJ!?EJwp3F;5>2F@ACkK}ki|G&)Hj9m)JfPp6fCePd4@#O*P7b*3M~8@M#A)R^#n)c z40z!onD~j{K|T1DqEW%luHu*$8Z<$ZFY&;li8P{`*;!Q`Aj8v{WBGIS{e&jr$P~O2 z?j7b$CK6uCzS|Z;nHDffIJixriTne+I``zYQK)}>zX=00DZ(VAQn2~fe`Yghj>0CU z*ys>zFwBmPQ&ndrkhk}4{9C9g(fh`LlIi5qZ}jB+(qy~%AMB%ja;vwxyU`>8oJ*ge zTZ3evKB;9*6AjVkpkm|Haa{{`1QECB?VT;X+`ZU`oS6qLnvi1;4{UsD_O$E`6tt*i zg*!2oHq`pKfXK(P`QBw*hKQ#zBtp`RganEI3ilSlS0KOw5*t^2Dw2N7hgijF;%GR) z*@zLHiCJZWdg>4_nWMkci?z7I91hZ!wH(%@PGp(}uA%7XiRrZG>nlm;+rCB_ z#8P{FL#b0T?Q?5`Xs8MGbLl$F+f8m=eB@2lb|-h}8)m93mx0&5o49>!c}^}edsh*E zBqpeH^bJA=ZiRP^9#HR<9m~UX3q%|e8YT0dAza@kIxeaUs5Yk+e+clgDR$hP#h*XQ ztc(rzQm#IhndxrK=`kgcrdBgAJJbh6Na}pMos(xuC`hSho^}!d^@Z=NI?hIWCpt$^ z6^gI}Yj_0wlnR>)t={V+kct$KXoO5T;Css#(6i>Mk!DXgL+B*TJ5z1#JQ;O+o@r8R zlj@^xI7@y_L9qPpVE}!ydQ8+(ZBXf0xonADJ#NBLrf4bafApqgp5GW-4+@Qbkwqre z7oQ)pn*CIx51+jV8?SR|COP&Kh8Y@-T{d~^w5Ofh={s&gQb(s@S9f^w20qQyoNFOe z@!3+0PZQgSy!!^uWnorXz%H;xRzStzP4?`#sI8h#DNrdd*#?D!;qQ~LF#-Js|T+k^QJMbKZS?(b5!&;W$VENhshk9Tj~ zI8=&?pDfy$Pk3IZ5-aY6#c7g%>g7iyou2j8?PZ^@BW3EQa`@^bd_z)Yigt4T`ep4; z#Bf~`#E9@Ai;%ghpbiW(B|chW=4;;IeP8noDU7Tu5RyyJISMnSXBhOh=tgNQ%?w6< zw*9<0k9C%-T9ZbxmyyxpnezBzO}OEzu*cM7A(%30KFkF=EA#AyYX{-M@977C^T-oN zN@Gmn-s3kZew!`Y@XVxJ-V8@(GAWuJ*4SfjQezZq94}5nVe!~spnronpj!(iaE&U2 ztG&J7{c<;La5)!wE&U_IYTbtudnRm16xF%sB2zG<{}9KUbMGOTGHJIh#jM&-!bmb> zL#jo&tRj23r-<}}X#st1*su?*t(DIA0k$4O&|B{x`}aB&WwS;7`Tx6$QSel=#&7^i*3l*k3PK9PU8ffqGy%JcmBSg?SpB{9pf@m|idBK?`Icm|5WgBatSVNf z)3B(FL^NR4q=0;G)Q%^Y78CH|xy>+FNmyg^IZBC>=F*bot7)Z-BonG*G|IY^q^syX zG$MTXsjPPYZ|}55BC8bdh&MWt9KK8gyIR(& zYl$Gfk*PT4QHYLuY1+;u2<$4zbH*hMMw7vRHTv3`lueNa8q3_DmVG&KpP*3*n^i z%EILP_WdF%s=d-89Ce<+U1IpJGl@(6uo7E(XhzozL$qea9sFOQEb_`l#swSX^}djA z-2Qc05j67~B%p&~X3p8|m%Y=LW$GwP{FoA}f8S6PR+;@%8%3psUJe!k!2>XK|MM_h zhS3%&7ZJXJH&-A^V`!#^-g?hG1wVmuyx?)N=1~0nMPs8k`o?xqrjYQ2uhP8vU)Rfi zx5?M;62~o>zar@}F=x3i>xmYGc<`lS)Py|?GZDIbq~!q%8coo;m@O8SlUqE8p!b9a zXwW>S-be1|OEYDJq=!x$j^AbRkiEGD*CucFm*{?|0Ha^CKESa#Y} zw_&z1KIGT^`oeDs;(2e`JsS5n*4zP#dmb+3we}fX zA$S<*|BCJYGo=1)n3aWr`9FtQ|Epy-FJc$dpGWrYcg|kl8j!|51zo-J3bP2j#uZ`8 zmdkyt**QJ!)L{t~^B_?aIsI3;KwILoO?>wIa-_Q2IaS-I!Mnt_4*Cg>v$y7MDZd)Y z`%$2^5>@{0??}(~=NGBQw|g{PhP#ut-`A~kub(OFZ#s2f0;f{n?kqdk&Ul_LR!1W{ z|EyZRxnBG(mu35xYqn=!WxL>W{~i8Xf8{wHk4G(AiN$#*yIT8?>j6tu)e6h=O|4h) ze_XSbt`b+DI<-7JGL0#k##b2^2R7bfM;aYFkLk>mXDD*@4T9WZ!rcu$E(O;rD>JcU zdUjdus z*d35McWRnNWwQkOLT zIXLZ*|D522B7N~-11BDmDe_|2(W2$9W|-LFv7z~wRrYZCA)RXQvkU15v};_(I0ytS zUsB%#%B~^T0}m2Trzf;7p;@R0o+mfG9+q2+&Oq!hterRy8$3MD#n;I3Ya4IQR}ro7 z!jacXo88c|ST50wG7{60!jjGtBSi*v@+H_ms=wto490$4`$+p8T?Ve>=amn$wI!-7 z)-6h2Sg0YY>xK3yGLlSW`PO5^EB5HEP?Sv{(MFChBq>eV_x5AQ)8s8|3!5=s zxV)gxy!>m}?QQ(0ekEkLro_CSJ?B}!mzKds|AX~_HucpAfH)Uh^_C221?RBQ@ktq< zBTEZ|qYZbYRQI!LaWL)#Oo#QUliRiEMg9nzqUYzSRXGd&4NDWWK|<&LY!te0)#+Mx z82+E&bffZ!`aHu}nM}+)oghTd@`YntK4Sqsl#d=ypXFmjuZb~`+9NPqL8vCqSG$(- z<32#h2sH?%;{naCiiiz!CzLKe=0=!>vFn@^UELqjM6jE@73o$MeMIW1k&Ly@ATL(g zt!}~YPxOgV#Y43XI}FQF)SD0~XD^LY6I&9HKd<>db z3Q;Lo6`Y1yNfI|=Oz3z5PGBa!D!EBG9O)*5k@w50Z3oY#VDBvlJh+Djse(mvhb6WdG}ru z`B1(Z{5NON4H=Yy9Emv}*%P;69FXQ)sg_(y%wpVhq@?`~#z7=NpV{hGl?|$D!~92O zUDOnFO@9x!>x2R922a$K{>u?m%cb$J>&_ed6h(PDZPgWT{E@K|Oq9w1O2~Y(19l>?>Gd?r;}sh&(a-`H4HT%P}knW=-VIfQd$e&&ku9_n8XPpqAHm+ z!}_C4na^r&HFF^KLGnjC$XXaOZ5(FmCinV&r?$r-MlC1dGc4O;g%?scZFA?-M6bY9 z%}>I0%9J)YmO}X7kqD^MTu@)CU5iMBsz61-mbko}?GSwUPVr2Jk<2s{h0e;q;>Ef6 z{6QS9Qgkv}i|m`k4-8BQfl)4oLAZF#?dd&uifHfkomO%ZCT}dLjlG+S2_fu(Lq4~| zgBHbV;C_~1wxe&i4bTubu_3LeGbXc=mYbI$rWwbX>vIqlrmUeQWdX*nB-Z)(mO^}K zqyTzG1-ThH=YNNfG=j%~D;k@nSKuS^@Id<}uNDomWCu|RFA0^BbKx^Pd_E@;oG9M_ z%@OvzLom}vA`4%3ImPcWxQ6M+M~8>DrirdlK7O=gjExmbj>dejl0tg=MIi`vs7Fec z$Vkj|**D9w{kd@W`GPn**EqIX^;tNRCm0`20HI12m1pKA)q?Rh1pl~OsR`H#-^x3n z#t1|w4{<)NsDHH7x4k8=FVPc3nAMLFbjxE|ATb%e19ipS(5joi;U7JdtaMFnS{elqawDcnNN z$gpM2Uit7&kc(;z4wg}yOu0#P2;V7{92IA(h+LIECZnp;LMLe7zgWGv8!PY$qK*2y z<6{vJua5X1J&tEc8DkZr+VpHsud=wu!y>_)z3M(jeHj9ph0$_KGt$-OW_DZctTQx9 zAvPEGJZ4g0JEsf}=Z_7AabDP=Hkm9UJJt%{7dv*l$eLhFD&TtDN;?r3^Xdt^Nf_R{ z`wcX55GCTnMLou5D>mvYbc^De+$`ibP6`!#C=Y#AJX=y|oAr@t#c92z?0=7i$rLNZ zl9NQ3Xszf(t*aP88u8iU5~(SLJ%|Y4`^jLpI;T>GK2BgBL5B@BTdT{<-^4*#l$ zCc4r$$Rd4Wu#Ma{kf}I*T=YUwSE#LD(EkQ$A(u(oWIiPC6HmETaN^i)Zf(~fP~qTt zavY7WSnda*x2C=^T#rxl9HZwaZ43Gk?3z74i%ZZgTDBQAw$lpOO4*cr#*99re#-ru)_fo?!{ z!_HY2r3ct4a-*YGciz{byYUZRgqgbgC z%Wg^FnT15Pp25mx6X>cM4H9FPPlwW;&lF=y^#Y{h@^|QYCuB-Rg|x;-F8|CDA%_2= zh(To!W^D2kGyoOAGX1Ia^$NnV#aN&`V!hw7rC192nswK%TNKr0_NF!K4)feDAA1R= z6Dc}odLnE>J$ze;wnS25LMc7*GqUOS5Dm@#z}YS!gvl)FPfWf)2H7oJOs1*$Y|q%M z+mu-gcWON=b<7{Ad-rZdLdsj)u%d)DGLZQ!%4*wbol##xMj>fG;GX(r)q*s+L-iy&qh=+bUC5pXT_4D0#?s2&(+atqOAS!#HnpVpCD#h zsy1=@BGpgX5_01<(ptJLAL@4KWv@AU;yr!y+60 zTyl>?yAs76pmM!{9@5!$M^E}lRf1U^hGkAz_}!$Dv}i4fVUOCjTMCx4m7+*qxnuKe zl!msOUi%`>FCdkk<8xI43Z`=L$E0Q4pX0fWC}u9QrOPm8kD|}SA!~EgW(>J0-s2%N z1~!6wYGw@elg~`{Hho9tOmEuRp_w9Mx`T|W3No@%Os|!9nQDysEet!Aca!&??6RTL z_R0lXr6=>9ei-|at+<`~xc#7;i6j)*^Vex7e{Dgj(mY`YhwrLU;}d^3kvNWPO`eD}MG4ZU^kN*jaxH`lT3zcm5KS5-V6cefJJ6f9|$uN0;Vz zou0=a)S2-c?&eyPEAW)4q#NB#GYZ~u5^<{v#G|j*w%9TyrmS&E`_e775lF155%Xhw z&mN zLpDEB0*zGmc8-&f+{L^3xAq-|&a00t7|#3TyDAQZ2*3J_DO|tK!@8tN$dZr*Jj4C)ZRcoGmt|A;kVXUjW(&8qWGMcTCs-X$#2K{QHB+y1*l@ANi2X>=5A>&Y z#EW2K&AYmR zlV2G!@YySwd=Omx7iS_1O$4}SY01pq3f`5R0AGvqQ;bQe%bEo&3A(daxlkHexnCOWlwQf&u6Yy2rkL z1#;Tm2Yebog}M=QPkx$#)4tyUcmUrOe4>yk!d zEf3biNA`0Vr{qL9+^_WznMkQfpb?VCil)0#+88gN4RyPpRex7p#p@yX-%u$O0#_%u zvUmH0U%pIDEq>`dM(!~Jc~Yi=Qpql5)W(=xK_#wRoj&bO=fu4R9Sc=R+TaQphtkwZ zZD+hz$tJ0{cEKiiU=PXi3=)_Q_2$G=M#;DUhC+xNP;}z(KQY+z!A9vS8<*nD!|J@2 z2OSkS3F@nz5*ND!xa+0pv}TD1nwpLXPc_17mC&4gRy_Vgf-tCrlixq2T28(cLhTTr zj!2V$avSZN^nUckQ+p7Q8v}P6eM(V+ZuWBAuS6x|HxH*Zl6rZ?f}^{4>~As}Slw{! zpZZq#YpF1|G0yU|>KL-M1RXOtMBiSGx^&eTuASVxx>Aq3_&gNKklO;2bP>-Ad!pzn z7HxAj#9{nrE40mCUZ;szO7%b<&noB9CTqyuT|ES*`}*?p6fNm5?f4H43ea9kX>rGm zA}>R8viS~@>v>JXV@zhE%N_k6P!FZ+DfIWYy&hZK2bu@A-*I#R5QU5xYT&6p{VB!p zGRpSfHb7zeIW3E6E4iN2H0;jx>r^PI=UFvX=_SM+u5=+LZrTD!2l1H5Al67SU8v7^M^S?cQ2+n*1f-~QM z;LJB5IP(n%&U^!cGv9#V%r_u7^9=~jd;@~*x`AN3ZXnpM8wjR8fne$r2&O)PVCoYH zrapmS>Jtd2K7nBB69}e0fne$r2&O)PVCoYHrapmS>Jtd2K7nBB69}e0fne$r2&O(6 z=)u@0sKG!$PasPGYB2uOVEU)Q{7-}Bp9bqc4Yq$8fPWf5a03j0f}(=|9Qkhq^gjj_ z!6Czc$8Ivv{}to>XQ2JNs3H>!Bip}^D*mew-}Zkk#Ag;vE!vMM+neA-Sn25ch+mwd z7n|AFNp7sO7Vu`#_wu0q!7@B6Hh&>ym8YZg`Oe>(+xl%2?wOxF)o(Kmxv^eWbmR4Y zadh*|?kRFpmuSB_Ju-bG|HU&aM49I0GbpHd)u?3=`L9xZd!SN$zZ>7$@7=*c#lSZf zqdv>$`)+ekDZWuqDZcQM)kZCiGHFbg9k%l3`9{l4Ee|3;x$k}i{9o@(UfrH<&l58{ zQEyS!_MaFVBi*0lN6ybRZ$2|nC&yXO`+6@eIvZ*wDdGRC79UR(3Tb5a0Y(SGS*0Dz zSIe{b$&2U7F;77>rJv)(Md`VZ!r9Jl!*2E(@<31M@aWg$*E;)8i|C4}Og|b^O_ieb zZAo|aE)O@SC)+;8GtrQqJe}b3cPU_O-Jx3?ek-m%9Vkvii9MTjS_+3ot>>7-NQOwB zuVbqic=6n1VcfUQy4G_(6h9knmZ2hB%+^qT#Q6GqbM!UGZ)3OP`yJ1zWR_pGoIfqa z!C4W0W%lUfVx_H+oS0*JWAwv$?-QM|8UsT1l*-$H&@dAZ05#yBvkyUl@)_U5%awA+eVxlp1yTKs7%8YV0eCbo| zc+Yr#H*D$eGCn)ydHdNMiGX+*G8qEm2kHJNx=9A)d06Iw7d;3zpe(dW$P^4q%tq2& z>>ta(ZxW{}?IOeqA;<%TB3!K3KOyTHBL}<1bCfq&g8fVgWI|+xi1-k`$+(Vc=arNs zp4z7wlcux>B@7XxWa&;X*?~pr|;m>&Ij6OnSlP4XUS^Fc32CFYAuAik7 zDZK@(%}A5yTnlt;2Vz#-Nhxmr49y4;Q<)*(mVZy6B`WRi`yg{1l`qJvXi~gBG-F68 zHVvclg(gKuu0L;s2{jcZVeU*$KtM=H@mN(z61BIvcM(f3|FS%Ke%ryDTwzF74?-_L zVI`D$o+flAtZcM0(5QNqVk?JF9n(kR)r#f!CXAwulQOR5{ABMr@zPjTPr38zzJ9Tw zsb;wL_+Y{cT|m z*rw!K(hA|%_-Cv9{d-N&?`I{6g|zBSGEB~Lb1!IawwiL7vi44*}01Q~QOg=V8kl5ZsCQnt7}XVq3DB)w zd73j#iRT_z!e2a}sF|=;OI|&j*AdX^IR7GNcTW7tVk>SVNmEZiT&O4_$;WOz%D9ge zBSFf16tpJ#aze580R{r^+*CP!q|QJgl;u;7eDw&P&TZ!=`;NM+Ib>&3>=HpxhWf<< zQ|C9sHKYn?e#-(U5=@BXW?MUn`uSMIgp#&`m6&1nv8A>s=}!tie9)H-1(~E}h`GqD z5qZQ=RHe^N@&#d4S}V^0#QcaV>!(^MDj9^cZ#^c~NNCd1v%l5tkZfB_{3X~!8OIND zgchfvwnw%DV9Rn>En*a#Y2QI71s5}_c=@ZZE=?pqwwkf^zspZ za)H*we*MQLSembKY!LU1lefaH4m!bx7K?HBxyuY;rugvc4!Tp*bWj zsW9S$vMV9M^TldW3b#vx2lI9gKP(RqLaPaN$=BG-U~PJoQb z&~Mo19#0pt_M%7fY~sCkfMAH&c_`gd7;E z6sOhpLC;!fhJJP28+G2bBH&By(6YR&uAk&k&KhB8sJGOx>>~SV+$r7FPuQo0pH%VI zzU3|_$b!W^32y@vgNhrft<&=~Vk==4R0xTL1AfMvBfrB;B50qAMxkY!Qi!gOu?Gb_#KIt1f<7? zLzXxLCx?OB%I;O&@MTN~O^1S(o7 zobt;U`ayp87jA1lu1JGYAQ_PA=A%qsl)OF4d2`Sbyughf(|2SR5s7dw7CWxNbgB?5 z$5G`j@i6=0+rjw>0|`=F&*yAr~@Mds;QQ4qW$n>8V_-U(&BoD*oV3? zv`$8~sB9du5we?%(xh@}*-2LHy6xDnaYJP>sv{yWn_sk%m{=6aLcL1c$3MNDPdOHT z*eN`LRJQy-+`VN~T_yjq`V(f0G*UP(6G0?0HvRcReH-VC`4~IbWWXxp(1X9Y+taViMW@T;AJ#(qXAz zvewRspF>wsr{AKgLnAC?FRx^QCUvYv+mzDImk?mgClX*$f)?qR1s10u@K;e$wPM^y zw?CSM=wEy&Lh}Ioe*W;8R;0pI>O44~{Qj|KLpvgLI@;r}#3lclzO$3=LK=Qz2bMm@ zY&Cuq#Im9w-;rX6l++sZ3W17@&MzWzx^7{_jWVPqsXqGiUyvh06*CaWzl+nj2{!2& zm<$^zDAUs`j^{&~e=FsaQuM}U`iWu& z(}_jx`(OmqaZ?tyo}lZAwm*6ACueFxExJ|x{{Gsnd#%+t#DVG}AYZ4pk_{jPE)lsh zukVgZCL_r=MEwy~E@y%T3r@=*Yho4yvi1oFeo(aim!Q+=gc9Pw4%lrG6JxN+o<|AP zyb7!F-u860y%lXOu3Em)?si;~uW2XUnaRS=3qosTdx2BBmIQYbI8{b;<&engyz7|Y zu1cCsbJ#5dT9HXS+PHQhE3_i3arw61V)1zGhILz7JdhI6XuIDPH&k?~>VUHiO-3J+ z_Y$Z{=Ea)9$U^^%aY1b}mdxAZIR@k~x0IG;Orj35mT#MO73STV8TF*&F6VCJM9Ci@fu3G@U#d_VB+rEXFIp>$nLb692LiO){<=IOSQi`XGqZRyZ zT^$5m?0VmX7o)5#?skc9DE0bWBIn@de8>-D{@#rf_n(KiJ@Nu0S*k)x0dhq%4j|CX zKkwGJC|AMJ!$r~E$cLCMpTrtu&fv`#OC^+d@|%Nmsc!6>iDW6iDw3t7E{53c$pCiByOl+Ze&RG7bSgVVv%s@Gl8WI@S8(z!MD5I_GJ zs~{>^UJLgDGRz7+P;TTy_qS*wnnKICZ(Prea=ZDpV9L8sp?}QvmAn6vQqF>(h87UR$$Fana*?=DDS1SG59eUJc#_wl{J1CU^UAK(j& zfCT$H4h4*W1p7M>1&n|M`#TZ^V0dSufCnJK{!T>!BcM{iI~N6vfO38(qks`m&hKm# zFapZ?osI%9yyH>815nQIfD|wS%K06U0!BbNze7^M2q@=wObS>VV0f=Kyn|A}2x#SZ zR0OaCv|0=0~uCf1Ec3@&)`R`>1>!SwDfU_%%HaZ5JbmWdqJ~U?g zRU$ru%#)GKbGnJ7JLrH|N;^626*8kK;}0j`sn1dI!XeKzWf_KKeJ9U*LM!V8Wap)* z4pl&y>2bb3;jNuvjQsR1wL`_PO8mZ?-AyWOKL723iAx+2s{k z5msO}m-)&@K<4#~_a~25+x^RY0)f|VzRsJ=#hyl5TRUReSIK;EWo8d$4DuW}1DzxqetrX!kT8!&v#V$LJi<`kXM70W3U( ze~yBN+JkRba*IK!Rj#l^Xftd48l_6ip>_)<7!g zka%=2Xa5wNWpy}wwDR-iNYvEP z+^l)?bK}E$GlHma~4ZgVr zn#ycVPcs%@I$y0<3KV2mhmop;!C;HXPk6vw1?ma}s$h4^)`Q^B^dU4MQE{S28AVxD zT#d^n@vKM_u9 zJ{T8B;*iCPB8E-Fvs)p?5>itf4?gsn9GzAb3EQiONc!>BUdAh7qT5HR7Gkla)!%@{ zr3htnkC}O8$1Hchkw)793~Q2;mzw(rnrx9l@u(9DrXtu5 z<|K&42y!N>pa~?sQ`Q*tStqoxCjQY17!6>ye&Q392^hoSCV9UKZ#c>r9O1vAC;%j| z|5!RpWwH2VQQ*C)_Nd;aL+dMJP)L(Gv8;q1vdistq`>*+=1Z}xUw76I5Pp9kDewCw$4y?8bnn!VfV%ZSd+_Jr-hgkSBblW7IFDesexbcx zvMCzywV{u8kqS+XK>~YG(WWYHcFzAt*mvayWw-B*t>A(xgyY%CoUfVc+rO1!8mkC$ z;0lcgJZ5oyHmSlUA}waTgUxup&FiCEbk(Zw9TR)BqhuvIUNou9wd%B$4LEmF2$$sK zavmkmY-rEOJu=S>f;)atgu=}fVc}2f49I4$9sUp}5y05&v^)De^JG#%L`Zcqh$mWxF;}C4KP`6!+_^8O3zs2 znDI7u&U-lAF;IHV7itbdGZYI-gn=bZ8lJ)@epH~CC3ogrvCM*@eqVQkIZM_WI>$oI&zG&-q?IqGX|jefSwK9mO?J zl3mXX&c$0Y1#2ac#=0ASB|DndBYgZWH1&LA5vIYsg{XOkwZsxEpls${@ros;^!)^q z&0_b5<(U)90P;L|SA2FIUF3LSSa{^skAx_u=~L;ZCI>d#4QSc9m1nVgk?!&C?t@tj z`b4mtjTKVvI-2_^;p1jjajqvJt-p~<$s{Gs;!|Z<&i0i_GC$})J#41%IRR#npf1_t zqAr}3PZ(+T);IvhKST@d$Xm|q=EP|+6HJoNX_)Q|Gz0}AG$^v^)(5C*G1gWE8q0TY zr+%|lOP~H(*UKXb6Rq}^Xq{^kl zZ-3`I)k6ylw!P#B8fW{{b1gKXtaL!6!dTX;t#%vE3lC4Y8M*!{@>DcVFWG#Blv}uL zIHZJt;Wk~4hjn|;m8C|CS@)H{sl2s54Nh~*8Do|anaXVJ*9Z+crtj1X+GfHRugWu8 zEcGc@-&GJ+yIt)Tlp=eU_B(iO@@u4Hn#XiT=*TSN-VcEpJ`4yPr>wL;Sh z0B-i2g$7+cG$zcgBZ@lkaRGw^T4>BZ&1IDL%;!DIle00+frG;wDURBT8?QT8ncFea z8?R|4!+N0-Z_*BTXOFXoYcl+Ruz7N%a^#=N;vQ20J>*tm9!?_Cr%ZAD`{fm33Jy1q z8%z7O^K`DNSf7=dFQhhj(o2T5LnR1gu62$T6$P7JS;Iuhk$)pGLhD3JU$7it==@Ai zXf|ZwitO7>@s@(#b3Lst4g}?1t4UGOdHZ+0LkPkFp9FtpFd!hOD;f6 z-NMsAM!tM!7Q=UFf2Pvj`jb>7NjfAkEydHvOkGyEdiYoY`u3v0)0MfL(Y>>hI!ZqPk!8e|7ZW{0^HVEtnvAIn|DC zZTJT#G&lPqizGveBn-rEbQT;{Mo;pZar&O+0w2IB@tnXHNIogwq!y{-5awIQz$52# zDxfPZvGA&jNsjg~*K#!W2x*1J2zAVU!N%AbrM(-}3;4;Q;`ynn(;xC=F#=b+h>pL6 z3Xy)+Yjf#TeR=doPl~}aQTJCn%`su5v1YcLv|{kK@{b~5Erj&)6BZ*Ho;H!9ft@ad zW-FB;e3^yKr5cOVl<=KaurqWf-IYs+PMupgiyb>ShyB z0FU0CGB;6Y*1m|yEV1PAcw1@(85)c6v=E#gAU8iC4xxDxl|HGX-8yjX$tMeqKB-2uj^?V#D@)bT;KwHj{JTNn{S>#2SYAdVLSG>=CmMnpb$>%sJ z6zH?t_P-1i^ckt#UxlzcEEp7^PzXk1gQ+Nxf_@dx`&(YH>pp{V6G3^Uvw6<%&+=qR zpg9X_RACAqvo)LmSHAi)<;3zbzr|A6+1kR^y->bep@Xh&5Mz;@eEB6sBu2?SmvyA& zcns-P%<_@0*&P~x$|n$jyU9SHQR7+BnI`6mn*e)Cl_oarb)W^j>xwKfjOB2riUxi0 z9;FCAWLK)p6_!2$4Aoy#e;vKmat(ACa@6a)T={E&aZ;dbcQ-m?WM-B3Wc*a#MqQTI zDpuXyV0ml1_|=VsBS|1ThLVKCiYSN2ixH9yU2mu$H!{8%z+xmpo&cl7U?^O4&cx0g4-9FhTgw-*k zoZAJkuJx9S3@SZzT&z4uaC6lNh`2g3%48u*K_jn>d~w86k)K5sfx2t@7N^2yVM5=v z|26&h1@16DOlSc=n~3gy9}L1O7-8}4=g$i4ujvdG!8gx4YiMK_*lICPM>Cw3RNB~U zwi-Qi+fXqSMlMG-p({%E&68|F-1^V>Tod&~Avx~QLcr(O#L6@U&TpNsyNK-xgqC{0 zN!IamyR}f(^Qq+BYla~0`kkHm56#Wl76a@!7dD;vz_NyS*qb!dbKtkC&41fbZf%W! z_xpZ~${8?VbY1(bolP37=*JSkiB;}s_D%Ufwc<795p#Y@JGW9#6WXZ(359!q$S$G` zZ*L#xqGZV+b*QZa4h?t$s$ipGzOy|`%@HCxV`(4BTbE3!>Hc0HrqhsYj=I&o>tMU$ z{pe;<^yz;R=Ku1cfJD>(dSU+VrU6Pwknnu>(*PLW4K=_6kXU}V)BqzOvHWhT0Y*S# z`F-#%Fai?G@1u8t5s+AZM-TuE?+gO)03>PODFk2yB$nSf1YiUtmfuMPU<8!&JBt8d zc!v>y2cVqaaRgull=C}~0E~cgen%335m3(WPy#Rl%K05j05H6B3BZGY<@{eo_rD>9 z|0KEr|EfWNuAl!Xx&dteZ9AZ}<&a}mtbns4N)K)n(LHd#j#Dzuc_!u&aFQ55Sx$ze zyTB;Ts#-2Z4>~yegv?Z-oG+mAH?p&|i86-KiVswkUe0qC5 z+B?17JzJ*-?oi&m{^lHf&txfBv?k2v01mKUFizBa-jhFUMHx04ET>9yd$iDSg3-swgm8Y-B<8E6ebc|>^ z3V&4-=>ak4kC#71)EgO*Q!axbVc#4JqTCS68FxOdhq^=%>G-qC3_QhKjF_3Gt5&J5 zMixt(Y$`~v&!roZ>j#B7CnO zM6a)U8H`kTF{jEn_Bzv9F2t<8$aNO^H(8FaJLVlV4Q?uph=!7QOm%mcP~bb9dJY?< z(R5XGMB!`YJj$uwFj=?(UMR2?vBaODO7{IQ+}-gj&~@6$R1;Cz4?cU|J@t%ww-RN^ ztgOknhB!$1NOPU}Nj&ikp_S(|Ua9UToa4w2bT{4)KONN0aGPj1F(yEpeAh+Vlh#!( zyeQdB z>yVYh~;l#=XBC@xXviN*ASLmyj9lQWWiDz6?n}&?lf<0UW=Rydv#lC zxNiJbOpIi7{|{=`Um~z;!F-Y6TWAU~1FnbgHYOQ#G@1b@k^01MBSddsq7W{}Q6BPB zHrAU<>ytd|FmKJAs_5;9K3n!=C=Ku$ob}%Y=@%h{u)uFuS0S^9I!z|fm#$8*In5pH zu`~?tq;E!`Oh7c2bf?*XIagyXhkP4N;a@qZ`$(b|9_~=>MyqHk)tsx0ePHegGoy54 zHRrIhnTU#XBp2w;cA@E)nL*~p*3{%&UE0f*shEzQK~#t(d#1>z@iF-zk# zW)IzOC5KG|{MF*W=j3tkrHxhe4>0bFM_W1mS*no!He)>~pAHm0qMbEv~+>Pk0;AVCvF zRQdX;W{b%eGwv|4Oxgbryr;xLqGNUH@_Mi;H*Hc6|4d=fOCVZLwNQRn-KOGKg}Ar_ z&la?17W+6}m~rD{ME50J6bG={AOB?R@Z3zHf{nGj@8E~kl2)k}#4~#ExooS3!?ht@ z{I*m$E&OAMUquEf2kvd*SlX0&gaJHD!f*Y`KK34ycU78t3r9U4jR~5Y zeg;6UUR!V|S90;PI==lbZL=+?2k=Fp9N7!mbkE+g@~pUNeB4jIU|%_~=ab!pk6>^6 zn>haIbB;Vd@4T>AcjFp`@sekxz2i%`DEECgH9g*;{feoeF2UrU?Tu#ya_x%oDa)4g z{q)(dur8JLA07|1{VGdz!%9$9>G*oQ*gEq!E;FHQqed46Tc}Tvq*Hsr5rM^LE|D4* z)O#LG)`7gM5kA6+<)NjeJNJxBMvYw`=0)3yYyKjpkD`^8tylgTFY5UiH=gXR7{f9Gx3UXMO9wMtMc5$Cw7eOZ{`C=Dm+bM0vx`6=Yq3V*lICSpO0W50D)z z4Ta`zjJP|pOA(wV`ju{KfB(n|UC0u1HtbdmaVK-`=}FB4YmzSm_Aw!T=`lJf#*KD% zxu8L4JDOwX+;s&3xUZ?m&<5J_4*L{Ih^)v^=E$8Ui4e3NokhdI;_KKzNi8c;M744% z%9u1cL^g~@({N>NGZ*c2Yv?0wVFs@>QpU>1U0&a#V%GJ5^p|M2dT3;#EuO)Uo^LB3 z0lB7MM~v{d(hq-?*i??DTJ%1^1ZJdy3*o3N$7iO@_&8kEHWkE9|0LS}#@W%rZEL5r z7`RwXNy1`A_ac>44?V>0yY$FM09<3HNCWRk-ITh=g}M%EFTeC-B=Hp5(hsiWS&Kp< z;&I{HK9|^j{Jbt--Q{tMmZEZill9GXAVa_tW&lQlZ(~W<=km8v0%Q#nrY`jh!f(8u zL0~LFOw<*a^+dF#an1$mvd*u`WaAzLAtwkWSti~JE0T!tszC}`A=eG+dP1XHM5tCN z>FS6a6Li0BDXq9phpAMz$RxO+2~`Ko$Ru10m+|L>C9R;GnY4qxwW0(q*j3typNi8? zaO+TqN$mdo&`Mm(fAb-WA2loa5G;mxs>ChB+maB80UtOu?#4Mv(00?+ zIJsz1Ps>|c31j{dlUP2@<$>!zx zOyrikI{qlzO*tT&%4Ud2!10l4I~6agXyNh_#y$F?Y2BQ+CE;iassHE4YaEj`7^iwT zBg}QXH;aLU4(IGQ(xdYE!l~?(vyY=L#+TP4Un^P6pDbo>=LM{2?ZV~nTP>D2VjSlwJkeSMn2C0t;3yjp*M2QqMPL=h2{nJ8)2UW$ zb!1y7Pp;gbF`LBX>fcq?Enf2%F_EJwbRRE;k-3(})zbw&P+U}3z+qLOT+zTKeo>(o za-ShoHYjW=u3X!ia*4QT@OHKcDz~*Co6MdMF&!&>EUx_LbZiu13reR2;2D4%LURo=a8H z87cik-!2ZA*d7?xU&RC>?y}P_U;egk%we!xOZmf7pXS5BsRn&TftcDd_dkzR7F`$- zs5hX9VXdBM&^tE!^NS3puZgz%zB@&2-xxv96Q}FE%*Wc8aAK6E$72spamhBg$;Rz^M=oaofMKqegaEt&H5% zOtg_DH$Ji(pB5=EjT{grr@B$w}GK%E=vN6X>Bt zSmsC{I`M34MN|iZh`HQT9_Nm~;rEn;yOroQbe^cmz+d2Ib6cbvj7Mu&QjdRU!YXB_ zUGixjAi)i`(j}TKmB5;9-4goHMAsk8SgRF*{t+PRr|YJ<$|;>|Xybn_j0kSwe)_k| zLbgL-1eNfgYoaH3gpie+<)+k>$n~bk9}=oQhZrALJAiO$a+lqSxv`gZy*Rlt_ry%R zyBV&@Bvk0mGU^IZUDoUk_@?@K`%qD#ohq(e6Crr(eXM33!vzyZHM=WnwADcEYpgOK z3)VjTwgZWUT2x5Kz)qx;L}`Rv`Dbyic7ZfSc{dxkx@`sAb+mMF%<^_KC6RQrt3oJc zb*6rCu(bB3&M?EWwtx8b4d&OK*Z(AU|AkwFUI(V00vZ%~Ul}M*L6P^Bf&b$@0s_YYAaES;K06o~0ImE! zJs21Ptqkg&136J z9&v}p*TE-nQZos>rS57X(xsLOcJ>Q5nz87b`O$t(9cjMS9}T!TTrnHO=z%fsT;&!f zC(dU67>vgGDEW7eoNZLeK!56mfO#}LHW;2?Z(LBr9EK)b!zNi}uttm_k9-&$3Zc^E zPi{`hMxVl1cgatoS`|{;4n&?i0*H?#o51}v(Xsin%gaBqzTR*X35;e2_Yb6u6Vrm* zsa;}!5GJzrNUC>f2|hFOc)RudrA3)`DAoElU##=SG`mj!4#R7=Q91TjKB*H$2tybh zlS=4IYAclA|>qAod=!QyHEzrldrpPRv)f4#lyGqc-b3%*U+@!@I0C!*eXwX z)p*F(>E02;OUQ9JKta-2TCG1n_K7Vyk0!y3^S{va{*>W^>9PQC)s;1xC=Q!_pJ3jHR~ukpga~VYGYbUMDG6l?;I@+_whvC7ol@M& zuw9)nfNsXG$eDvH(D=q00i3@6pCsne^2_4c7t~l_-<*Wz^6U>$OMG*9?-PG}hGvWs zHWejVnhW+dceLEJfNLvXj7^DNm9^ceC+$f`$R*|@?UM3P`j1-1VE&LXvqaLUC|WhC zQ)a(3`*QXrP$mdY+aq@fsQ+4t%k~bVQVYhm|^bY2CMU1ANHC~ILyAF*lzT=4RGC_aE$bF7N(T@xUGG(@(e<9 zQ-iK~mFOw@Vh)kWnGx`DA&ck3%x574wxG|}vWv}ztIpboZB>hG*+9Hpcux^INP z);vtJ>|Tz2mLomUaI&1^R&$_cWm1ufqKdXIe$#pbG$U&Af zsH;A2lSxVX7N*^e)CyG2bhCN%Xg?3U5h zn7suSn(Dwn;&E}ASQQOB-65C_D$1g&w!e_3lAL3uuySEh#cPp-eK|{v^=B4;0&_SL zwDb(A3kai-J)%#ePoaaUji*=6DVs&yL}xB4+(yF#FK+l(IAlLGZR8vQBHD%Z=cjIx z>*-cIWCS9fn}LsDivi^93S7fU5{fo-YG-7?dG6K&rY7+{+b1(+(W$1c(_qOwx@mocRbo-$M-={uK@vBtW>s1UA*dQ4yq z)Sxfvx&qBpdY{mfNAqyD<6cq&9*?m2ZQP8pTws(DJ2HlEyw;fU#~|-3H_UYsx+GUG zOm9Us%A~>9=*2(j7CUKpB4{yzBv6CQdl7pb8YS2l`nQb(i^>&bz!I(qBx;1A`gBRu z(&3Svm35=RmE6X5eastV+unJDi4-Vr&QyPru{683ZG2l z;&76V%c88#T8&$fbJ7Y0Il(_012}myGRcof>xmRDvK`N0n}~AOCyUyarre)3BQ1Yo zOY2nhm@UR=k}h)`Q)=okI#!A)719sBK28C16;8(yF^~`Ji_L;nqwA=^aL2MgctBi& znm~U)%h48mp79o!LK|n z{`NqsTWLK1tHFlvODl!i?Ao*^%VSPhN8zlnOM)2#-S98#1W3vs35{xY)1kwPo2(T+ zL2-<6hi?=)-?`_*TJ#L5JqMIgz9XRjjk$@|sKoXhY`Wvpsh*t2IcQ5cD#dQNlBzTR zS#H-mH0RIan5UojWK%RhV^A72-A$qNC|mS3q~iK#K;9iwgxR_9(HOdRsfZ47`IE%A ztAX@h7<68y!G5j79k;&CsqoTJy+eruk-G%zWcSh}`))DT-AK!?Q4oIy$Sp)Tyv@!? zk52V#v44_tP2YVKp=BeJvrqGCzpsOGhf1)v)Y2SRlwfOm1CMYz=v0PC)+52Q7yE{y zgr-zVTBM%ya4&qcR;{+RgUHt7x9!W*J$gNwx@h*H+jh2z_B#Td<2}C$>H<@oeBeQb z+H{_13MzY8pB_>;u^{%J9|qzVQrT`!gH2bK3t_K#gwtO6oQApqRj3$5NapP2BgO5U zJuDFkO&uA9Gv7uGoLZJ=+(&_T!@Y{Yv5z0~WX)8vrpg3_S9~0u&E~5*2Th)a@a)3q zGK8T<_-O%8`Xr@F5&hcTK^6lhc7t1aba6psvB zx0Nk#HLBLef-~-ZNi7UqQ%I@yjsP#4t6v&->G#W%=#G}_-;Y?q%vXPigcfttJL<`3 z6y7eprYu^W0n7>AM4K@6NuoS zn^^b;AFmO?DfB$#Pr;LFqtU3yt!hx!NSW--<#uy**W3vMIJu!@s=#~;KFyeKeJU4M9+9Gvs;*?FZm~!yhsY6&OvOVZ z`N}GKhb1;AX)UZTBYad%EWhNveAZN0C1PGg_9jN6%C9T=Tk;q1fplz=!r3?iKO9Uj zUy?b59BeFCJ>XC4)Y%gp@zINKmH{goraR$xs(~TBiM@aVj)Sv2$3wphhA)&%XByVLW%w@ZWg?443EweO_ z5i_p`7lm;a`hyXlK>(^Z!AA1O7!S|G%QY0U+EO0K%;SAlw=N!mR-y+!_GF ztpOn18UVtr0U+EO0K%;SAlw=N!mR-y+!_GFtpOn18UVtr0U+EO0K%;SAlw=N!mR-y z+!_GFtpV?&DS^ryB+cK4QvxF((GTjU13>+B0H~i10QJ)Wpnf_4)K3S1`sn~rKOOLY zj;RFvTU`G~{muBV$^huH`A=PDW<~~v|B7~Nt(L9Sp|-8(PdIurJimSP0lO`XIl_W^ z{9qN6srt$E@s%$yRtQODsT%L}$8XDwZ?}s~)QE$Vz>Q@#BlYF|uh)Av$B_|U4r_J! z{WkKwJlJ3ENaFOVUfHr_G{ydG?SypC&cOg)F3P9Z-*E${1k}R z_Vuy#L%d#ZhncVw-+4Lzoq>>>0BB#KgkOveNHyy(&qB|6$&K3U+(P_{nB{e z;F{#!dveLjbAL?l(dTD;Q}MAcWoN_t`N%7i@#gt>{VSe}2%YcmjgM8?P`Q=-QPUMjW#V6399HO0Zvla~v?Efx~65ZlMKwim-4kP5%=#-$O{k$K0r{`BaHFuw3a$D#JycK-U4TPRXR#H}JPTL%;6 zqovpQ=6#&+{Zhhy3(?YH@%e?81ZA`7P;A~y{pTIb)c2T6`8~u{Pm+nWKa=?P*5jF+ z(X~wnqj&*p&z!ACTNM|9q1bE7UG*+TUnv8>b<;PG0k9r=HI*JJu*@nZZ|Z&9)ba#WOR@ z{y`g{;F{3ucA&Y(GSpA}HI5!ZrUv#WT?Wsa{bQl;elT@9%(@*roSVN)ORGcIa%-3N zZOCwV%K0ua*Z^TF5mj@ic4jyY>u*{`qUTsc~5SYb`@ zC+uAh_%aqH{)E`N+^%|wJJst@0|sL$x{=pmc^jRD4DP04|GGR@GLex@;ixEi&NDMU z#&d+zZb)Z*dYnH3E8Ud*@*SPjXcbq2NN6xJo>c;;okF(?(r zyzp8#cOMTSJT}Jm7nWIaV3)kQd4GRXE=xNcvYp$_B^bT-o3!IwR=b0QAFoM56@G8Ka z!32%$+z>I!INUsIoyJ)gdbQM7xsVILvJ zAMP}mS}cqr*OM~r%*F=mAx$vnMT^KQ=TKp5Z^nf7kEET{eCkVlN#$NRTH3Yp1StM8 zOwKGQL2I6OOz!XrwgqL$0;-6wI~antWYSYn*I~K3WWA}$;LgImn1H#9j>guz7>0Pe zd(kgWKXe$J#?KQU4-OBCb~hOkTJ^qkZ4;Q88Kir>Fa>s(`U5Km)gMl?zw~otzN9(k z>V>$Y|6;6x3LP8d!um$Q)Bmd2v!{-ydU(30-rrVJ;DUFe+DYG9mt!Z*uS&glEKM=H zVnMexZdIKQ+-&zW>szpxB>G+KQD8X~vs%$_U&CK*C3=bY{rt)8_Og0#zci#p_ze|$ zFri_y?Ek_l{}2v~<%;yLN$ij@!Fgr36p-Lw{QTuFd;2G7F=2(j;)NQ$GVxecz_W2L z9*(5X-RIMK^i8>)=aK}Ufd>9l3BhOmiU_RO7qSOL;N)1bOz8dA-dgbcA93-5A@`c0 zo_2pLqN(*+IvT6#`ue&%A4cVTFO0RCz4%)nUmN3>5eGEX{b0?^wiww`hX>{k5r#q` zO}6eSCVVc}zY&O|hK#EOdnQkW)MT?jsTcsC(TPd8uU(GuMY zqO@|0C!g%OSLtxv!%U5?a`DbDL$&I~ws*k2Z% zNw;H8*0!qhGzZh77ENaxoROB8F7FJ)%77CV1O3du-nRB4Z& z$~J$Eu69)<*G(1b%s-9oL928m_|PF(wrd2-!c4Hht@?PCY}k>p!05xhx7|m?WH(fc zzfDXs5&BPGf5WxlR+Wk;7mOf?GkK9osZ_?ZiY2p2P94j1#qw8Yil(#XH6A&jg>0@o!ikkpk=s&&AjoHb?>?8$$O_Zk_{M4TM_v6Eu zVwXK>4NV%7Q`y;if-xjA36Tks*DZ$6C&w4q_K#_?=mgDX!x3PL^@!}KKCr-VJa$B0 z)O!Hdv8LJVUy<~c7-jXWi8YFnToaS5sbuJtG|O-ro%!Ymj@+6JHS6kXWiE69wCMOW z|1tvBg=m^t;QsB>(x_qPWS-ps7fh%jJ^`UB`=}x-80!)~pXcmkv}@3z z<6ukd0Q}TcUrRR=@>#w184cLu9Kaa$G_4l3**s4BsKjD!4ES!P=^$ubU9kZF+igiW zPVhapQf2h+t|HEDUP8DBgav2)_aJUOo94YM*2lK+?p3-#T=fDt;8%(56N{}&r6F6! zlfil8-_~HXkUJ8I*h}>&0-gBJm6?&E3go#pnT@f{{7i&(-Zjiwjhei0qxGfJ?HVIJ z^M4}*(~rN$%9>vlg)TS5%rFN_4r{NTWTcy;L+x0H_+|AH10Q)1h9)V|m?a(ih-sL7 zFHFtO()kub2(6Yr!W7i>Uwox^7s4C2As#Z&R1i=roF^5bOvjy?3Xo%R8+``e@*=K> zzWiMUuhdJspVM^M4o|pjLTwwXJLidRp3pi}%vzq>tpUD|P2JOz->Wp~t8T*Y*troG zi<|?I5F)O*4GXx2aMn&86OMobH(Sl5 zqwYUrssTqjjSS-BN`BgK6xid;zuOF>(k%)NChz4!SpNAi^h3thOlm}YQ|BxEU`axn z6yL2Zr^Om8WNZJ=(;Z_sn~9^^aYgL*`c*1}BcG1M(JBjR=~Qww9<%OT7;uHq0BHGW zHU+7Y=!04n(L9p%n1h+=&dc~Pgl)3q%jQLCab)j5T(ryL%_fGN+_*rq49?b+m|Liumx9itoqK%+sx9&j0Ag2Y@7QpEa8cL z&tJ5V$&c8lMI_lNJFn;f@NI$NZG5Qdm9pEby7#Z1lmr!`BbTEgCzC6fg6pE~(>7Ck zEE}(%BD4+WdRU*__j7oBB=v*b_ebx!uglf{T#-Qcwk&#WZofzwU|N+PYZ&5yGpU-E zL522|HCuu)4FQN#@5F!~GS_aEJfI3|L_9t~{d&e{*-(yi(4rf{`QcNUKI!OaA@KeM zee75*A>@b038v^KS1np%u0OD+f!($$?beTLZ5Gop6%i88J?bl>o@}}p!7I9v6@Ps5 zr?kl)vk{TwNs#ZD@eR5^el+!eDs}z8G;R@CqyfPmAh!b$=YPjPKyC*B$n5|Cxg7u? zw*vs=b^w6f4giqb0RVD406=aB0LbkC0J$9iAh!bmY8XLK4I>DuVFW=nj3B6n5d_sR zf}k44e?v9@1$6m$741J4+WuA5`@br*u`qu7Z-utyh?NFZ&y4c@y${7ZFJLraE@3Vi z=${9mNfxyrPChI?^PN~mL69LXpfO0W| zz^AF5TY0@b*;%I#yYhbGW%~zof$?G|KQ+&bZFzb9ozVWec}u^p|JAr@Y&fD^|B0YL zdFEc_m3x2m?PYkp{vdGO%ku$9x;)+R(zi7#9scoSka}{yH|hy$cX{m8dVajw>8HOH znLRn8m!304ZnZNBta`k?Sss@0vy})!@e}*omcqN%_IkA=qXSP1S#PGXyR>j1NwvP_ zIWJ?V%1Du8L=@zigzIj^<4Sn?baV$Pt|yP}7QcyUr!%ES!qa@_5x?hU{K}2iNHou# zoTOHi!0hyUekA26cj!UOH1gWyuHK5PVY8wk6}zcTQvsLGL;#5_?v?f_-I))Fx>Woe zSmPJ?A`IK!Dn(YcbIxS{Fpei$j#@?jA>xsQr`hf&;{O@UDCU*m6#IE+-=~Np67aMuwRDgA2 zlh-#R+5Y~Xi)op*KQX(Vm|M(o(`S7LgS!XfdxactKU0TZlVupv_SShVIA66zvA2X+ z*E1f`+l6r{GOTPb3t}X1?v^F#pe1P73S&)5MToALJjoaV3SsFbIfiwIj(yug;>3g8 zZrz^b9(A`@QrS$^q4Za0PDj1sYXgrz$du%bi09Yw@pBMFQ57|I?)_HUUSDn%o+7ip zTv=)l5~4S9jVgjc09ovLch0{o~@WG*JKdM(Ax znrZsLGZ86(pSl?PN2R(Ufp~$2>tmaUa_Bxce_F+4tUD3mZxPt1%4EWb*#d08r}5Od zS>V`TpIM3GI1bj(CfY@*0ykE0N=Hj$_bRo<{<^BftQR#YO&TamgD)CNy3|(-=0sR* zc?%rBPurDP{(_eb{hi=2RQj`L!J?a?cRzQLIB=PGQ;zE*RdbQJsik5h<8IBAG5G3X zOve+tlA~x{jxD#%oM+!W1XdKWV1aXmsyd3-WsbJHpK_Nh*N<7uBDBCKfnR(;SE9UX zpQ1MEWWwUUBl*j-X5@s0*iB|)rL4;DOXYkGPwB>^wOe~kRkGDMbxno3aW6pIVq=NQ zxcXtm+bT4Bv2Vqjo5%TlcWrsd+9^M^Q)7V^g7RnqF`$%4`YQnf&FA#rH|I_%{g0`Y zu&r-mrJ+RtyfrWO01bWeuX)x81O%{jw-VNtV^%{35o)a8;1q8Y0Vex%0F#Aq^ZpT9 zLAsV@Ye71-Q$@t)OhLwDo?0tMeu>oz`1$tbivN$hw~UJ8Y1e*n2=4CgGK0IjyF+ky z*93P9?oO}(f#6OO+}+(1-1W@=dG_q{?!ETf>wJ9=Yr)L)%uwA`_g&pp{kyI*V20sA z5fY;Bf#5egYNLI558|LpBUtMnRiaS1>HX7`>F$M=?Y4N1(M5G~L+7X8{5ebz5!1_H z>`^6yV)k{6EPRSeMOz#-B~Z&?`8; zR;EpadP0GV(zoF2@o|GRV0iBM5ipiR^`O4s@If>Z$7I3TUQM3FB;wTnvaDu}khniX z-6(*dH6D{*A@&C0Lg;f53`#immZz=0$cZ9zykZu8G<#;4IN}9{l#kQb6QYv6Ic7qu zSq^5ztA2-CvxUON6g{F47W%RTy>Ma3#&7-(=1HoUKjvk)8^2HEF+sZ%rZ1B~=YIb_ zot5W8U^Pl|)zSF9Il;OOP+7K8i*F=Rr9p$mo1Kcl(7Vp!$RLm?)=Z&;NA>A%Uea8()x(-QQAYnV)<7l`O0gN1ECic|HNB^za9CV zFYP5}TN9t8YXv>^(BtY#9;|bV_8x5teCSRZck&_- zm}M(>@_YhSHll^*lbvDO9^icXz8iW_^fMgl<{?pGfAs3j&q4Gvk3c^7*#bR4FA(Qh z$o}98^SL0li2awMyZnT^fA*jjGLDA{ho;0BR_PoEwum5Epl+ShdY4ASJP%i6zEgG8 z1DUlDt$Ul}C#(f?#*9JM{;Q}L?)g8^H9tJQWtVd;&=<1vN={Rcy{;5XPFW9Iuy9Bx zsSjE_31!xFS3K4J!2gJMDrvP9hbql>=Y@8WA7ZEK_9L399}Q!@INa?*iWJ*%PFc*B zIJPk41Ae?54EELrcLbHw)NdDQ)Ric5{7@*wi~ipvFK|?6X7^rk&-;&ZuhM(bAP6UZ zjM4fxN?P`Ho30X%R%lQ(+2a~66AXiA(9dq2`MKu&)%Fuhk5k5?<@bx~LJb!HyG%!Z zd>mm|?%h+!r5Ms_1W)fhOtXhoygy|rL}-#SGRZlfJac>tF^xPWGHp>3RA;jXTK<7C z#(~jO^Z=o&xEzkHS!p<%C|;|WRhfNtREG7amPiY%f|xwcvr&gl!qob-M38ntx0 zJmTxgf&Y>G<0;OXfn+QYv zN8s1K!0Yr#?lWlxq7xQ|CbDo?$<|%Mr@lP$rA~-~E$z&qcpEBoX2xjtjcX`zM3-O% z6!-iIhMxMlMFpafIOQ}+d_{2z*oUN?pw^_8#)1gAT#ON2;binVw8+862Yo?fkr6{u zhiXazx(a4|Oed=k@H5x&IXaJ|$=5>poBA`1=N^CWgj;aIxX3yn>zQA%TcmI>%=l*!pFo z7LP~3-QUTYb!mTW`Zj{L` z4ixRHrW8-7g{Dw&1}S%-oeZB|m4@!qlYz#FD;K?HURoABISQ_qeoXS=Ou~E*!{;I8 ztI90y%hr^H+z>%$S%TNCkc<$y<}YJSB5~BK)gVmiB`>qfqdbz)t8hSbK?=I^9MSq2 zc8UlTfr7$igp6Ur0SXC=m)fU55$4>RRDJTTXNJVVh(9O{6I@xB)z$fwTo3rq4Vy#t zt)fJ`J1~wg*fr6hN*MuFO54@MTK;pod694kur7#@W2w>Oh$YK*T6dl%q3&em2OW=q zXP{FBYn>m5N1ygLzz4{7=+sey)Txb2YnN_Q(pG0x4l#GWP|TH8Sv}CD-DSknSnoWf zG_L!*SG#B2>`lBf+Cb}!A(&X;Lb<_Hf03Xst{7(ib^8fxf88+mH|!&ysk2XV9Tu1tB8zn#}*T5|IDS&Lbhcscr{q}N2nv}S$ zp$b>|z<%4p0Cd%`&_C=x*Dv(9Z~Ra26+f@%d>@5Qqn4U~*cpUn$b?jrHw2b$_I}KY z+Ao-Kn7r5{NDjqdmA}W!CZ2Tw!k(V2SFP^;p1)!pk++zF+}FC3 z;;`xrttm*zv&ne@yy@$ojC$pWgxHF`hMM2Q&d8vzBnCaV0#MiWe0ze$M$E?BzmN^# zm49u1NwZ^CR6C?sv^|?158B>?Wqe{(6(c>Yu9`)Vn(TGIEu(4juQdx$CCSDk^NM7o zM7%8{r%3eTnE?p35)7zQu~3CtYL`n>BL2z%Z6{UxQaKFY+9ytC&|Rd_rnzUy0{yVM zmOqi<__Y~3%87YZbuh#6&qAz$QJ%1GTSWH=*Az#z7K;_A3iic~KxIKNw^OsD)V6Z>su9nd#37+K6fYW9=GeEzSCXl<)>D)bRpfQsJn#ahsJ_DTz;-ebRku# z4@#PfQ>MzGD|J%zMvfDz`lkkhC(B=76EMQV?u92CyH9ixzD#zXHgksAj&qGbUN_u61~B_$ntTu{?*1Kv zhVIcENlWrYd~gsX2q4Knr-rCQR9XrMneNe%m|Eth#s9ng;kTnubJl}$zG4%_(EGbW zz)XQAc_mTZm>V~{z}Y5ES!kLQ9n_JK)UD`EtA+}w4<|2LgrQOyxcSw=zUZExCMa!*$`Dr@?)P!`8r;5V3+S&l+H*}>Sx4Z!HMxavUy|T?p zlT?zJJc&}zxyhT+Y#CyYgyXpniup(%{$Xi znJn^^yK2>&R94Riq-(7&T4BvTzpaE1o_5T)G^7SQSg^zsY(|FUA9;&(+1(&fFx!P1 zjF87rKK+!egjW_^rJfVKa!$bp+>urmQ zt)}2d zWc#J;sEenGQDXj*JFm};p|mvX3bw^ocWsvwJM{yY%P3k@;>v%=e;q_~v@Y zR!FU5C0gWMVbYgPP%RG#sW18vmJRwdiy*xrMNl3k{|^(EfPbm3z;i$Uw`=17VCfhD zEFA-YrDFiFbPNENjsd{ZF#uRP1^`RP0AT4D0BpMo0Nbttz_zOZFb4<#bASLa2M7Rj zfB-ND2mo_{05As#0CRu|Mz<)aW@$@#+_o==GlwR@M_Y;0Rjie%JNui#0WXu0+~vRl5xfVZ zIuGl}0i}Y(JCLMCR*b0F$lV#_Yv>J1&?J3LOxg3|+pCjrQL)P%KV^JUkW zEchk1?d5N)>F))5h2CmgaM#g5cl5-2v})i6X%!1hz^$=ANWqoZk6F;wD7~*c?i`uQ_8|+k|_49{fSAag;`>U5qXI|#LQ8($812jiQJGznEP&_-e zc!}jr{>E>Ep!UANqm;IF8jj7A^6S?JYtN3w7894m4!{O&mfjoQIo3t}8q03i{jC=o zn)m31^}T1i|4UdKpUumQaBhfFLv6(K!?hPY>aNzqqmQ*=#Z{@4)4om#vxxEPaS&R| zQPC5_NPu!?$FE3^9Yu_xgMzN@#_e);`yQp>!x3b9=f?h}kF3w5_wTJQ$G@FSnWc)1S931@)L3E8W2S~GAdoiv6SoP63s(5?!hB6+XcqMsa^l-Oy` zBJ(B8;m@dJ*4Q~aSjsy83-p>$b3%w;?l2JNij;$*@LKs3s6w#EX$bSt=Xz)uAsv4h z9~04G=o3P7#gWFy<=9%DM8T}`m!{b094 zgf*MwC>CYPgd>;dsc_bb^e78?Gol~Yvd)b0X%Q^@_Wi9HAeoK?JG+?C`4HcKqOy}i zfm$?SWA<|9DHgFxz@eV`e)OAfQ&)J}NI?68YDjs{t8o^J*cZ@xyyI>!2G_>`;4}PW zfcCh{r7*ETAg?){R6BNuM-R0a`A?O_99CvrG7D^!ro=+o2Sn#_ zg)~qH&+}OwFJDCC3WdFZa060F5j=?napY3+76|kWkkFJ%xn{_ZKW~Qlq&c3pkH_xP z+oEhfhQdj@h+W!#9$M_4;Hej~YfCU2_%@2Ekx7ymsa}xtC!YHdFt6EOH8v94gCw^6 zeMCw71cs)&9j0}YSsqGrVEQJp0Cq#hF6$qQnW6S<;T;Pr20GH@!RJ4`6$l_}G;Qmqdt&cK$|4yPn!E0v8b^~; z0rW-Jk-bbI>WPzteuWcc(hWx}y9i(Bb{iwO>5i{G_d3lyf&w0h!~B3@#vT}I#i6(s z9`|>&SWhL3^$gO2jJghM<#)7C4z$8v27GWebJ2;xzULLZRBT^AMzZSG&g?=ZPb{b+ z>?_+iQ=-H6BjqUqj@4KJTol$KloR?3x@L7LAn!>_%7e#Qvn}uo9YdWGdSAjX_(qw*MNj z>A7WDdrQKLp6qah8K!RK7tHIc7LRIc+hDz6Z(UTQ$)OklqVE(BOtvB%qH5ZyO}YGAA8}jMG0{1?wd{(AZjGKyxBmHEpnJ2#yA&~ED(OrG60@vS* z;4pOb*70@U$IWBgW0JdYQC{50fb`LwE!O~1$+S$FcYSm-sw%&X3ej4SXkKkAy`vT< zF1oz6afLr1Gf2n+VTJxr+wbAR&o~e4O8&hV+Q&m;aPlO6rxz1>{;XDg33@r2f=Bi( z*koSkx|stuuU~YqpW9!X{V;SZv67aG>-_m7o?~T*zaeG(8Q9r=Zk!|<=xkaiE~F>d zU(jqnt^lopmU@D-b!nMc z_be9%pW$;dj;`rbjmy&psUa@|cegt4X@2KWM!1X9*Pzd7jN7HV28f4D`R)05%I?j7 zicaJ@kfBDxG*;AIa2&f)$Qbim=gBLg>+9>b7*}%XPDm~!Jz?kw4DmUL04urH_55Tz zPaW3;ag*PZp=rER`ob|9DN6qOMhKp|K9nO!&mLZ>Y+4M) z_4!}#9Aq|~Yjzh>xhXPw@tYVzl1QT8tAbWvzS!_*dU^>a8B4ZgVAtzECwUF~#N)hs z$e=py4Sj#}ba{x)8M*mR5VFc_uJ%Bz^!W}Kzq*vMMs7Ymg%T8pjPGuhpm>P1WXR4a zxXcNFT|5??O%!2<_Z-0+isK5bsK{^?t48Q{<6X@+DUzmQVkfX=GaJIjM#{5bS2L5= z-a1eeb4y}4!sQ<}E&dr-(~DF-iMTQ);Nc)vl6h$-M)a<{7*yC@ zpK#4h@O+$WFyDrPBUi6p;a>ONJycZ2f8RVG^q19Al4{ouUVO<8k{?CY_V0cMDM4k_ z$ZhcL8y+G$n@K|Ij_Zkn(oj&PdSg?S6%nHqDDB2~3>d9M^73Tn8Si@H^?x<$L`Exh zve3D9+HZ{#j6wJrkGuli{{EBK_>_5w>38T!K!+DZ5V&i=t; zEHS&!`eKZ`*AFNuCAgZES!Em~7MztfW*p3;-X8*l52UxjNajvY`QT>??n876;8 zNj>Es?M1B5N1g;Q|8+pv(BFhZ;x(2wxPRII!qMqfO9{AP_0p#!1I2bUQbNY`0y1c& zcT?W;Dzq~UNkNyIIBx5VD@6lm-j14(mD|rorU+1Y_-rNq-VU^$H+UcDuf{3+n@O`2 zluhVmGj_`z<#7j<*nY>W&DFfT-h8#_nU{4<$h^SD~ zNUgm3()Y%fiV`yN&J{|cXbhrfwNRWriCjG`Tq3Tzgoou*!lXdqADYprYtfi3^Jg=^ zl~Zr7lv59_Kz>HokyzgwmtkP&1hmpeWWOVHxivAzaDa;N6H0=CmrJoIibXEt83$E; zGp$^4D7E#pI6P#@tpPDhi9ef9xrYyhf(+JojGT;7j~_|HO7y!kt8f&nOJOO-n_*XT zV?y*6%V&LI%!7LxL#i$_Znce{6n|^7)!2P23_J}I*UV`$JcWUWgkfbjmd*i6w#nVw z=WQ8({sbSFHVxZBcgtiV4j(*^veVyjYkzsf?rf#j$UyKge#7XY3{6n)@(q8C{U)gFnu1&=rP@SZQY(l0 zOKd$-m?LGnl%gJg+|a_NXn=Xh#yy3?OKd;VK^btQye}9Ni4uWH0{XZBo168op*F3A zrO4NAuc@XK48gIL`vpX8bJD@V&VzN1YvFZ=Np z#8|Ze1MQt=9{as^J#S3CHB_y=v8;r%+XX4SXXZ+VRZqsG{%IsFJOCNBTpL!3q~;Q` z7mlM6CV-6mLmO7>kSZfjA?S+g|JblZjsx0T`;??d2)UuW-v7*EIRSbKxs~t_Mi%rA zQ;?v`)k8Z4?YPh$df4n{18JP*eS{q*QLftkt!K*7DrX!~CM~^mzd(^yR^WrpLD>x? zu&(hL1xUSOi=)oGLW?7IGWqKgu+q*(FhgZ3`-sC1gWlTfL*O`$?nY&XFpR?&McxSu zv1{4HB_SIZMPZ@6M;Ea#pO^{=R`m7C%D zL?!ox>*|qQ6pq?RUUE-eprq7vH~41eig4G1S@`_zx*+E8b*YLoG(fMEfaqzWS6(Yy zY>-C|hzq>^!iK-;62TqYef@qewaKu!tjHzO#FxSEUhRCV*KmD%jL->SA4KEQ`EJu0 zhYMZX6G?zDv&a$}jDU%Q&l*yDER_d4%21bNGN*S*Y^L+?VTFH?%4q25b&mB@eH~Cj zH#2k+U-KZtib@DA?OY%~#LCxKn{6;=5FgRU96hg~OOQlkQCC8k&B8*$90hcdfI+lD zLDey~GoVuaCakyQ$K{Y-<}rea5Y^)6gQn+d#CVieLLoA)h_quWCLJ4oFakp?7Tzln zfy-?p3S$6-p@57jmE58T2}dGgE2(9m&3i?Bt(S$s*0B2G;r7A|Xqx(nYjKmmH%pm| z%GQ4@OKJGXoUtJ3qo4u>x~$xO=!m-5Rrp;V+=4*l9>X4GsT>-CLX3>J9Rk3Zu&$21 z&Y`golO7g#$AC*9Z`qR7VshUS5)UUe{C5BBwkM5I_j79|oI_z-8 z?zJjv!*OrzpF0{9$oXWe4cH&7%A@fRyOSuce&$r40{y9a@0R^}jeEKvd-G8s&~=p9 zZpv^jMno&29Z?+DTcyNs@YOZp;4yCctHwc@O;OtpA)((43Eq(V(Id}QDCLpk?13P1 zgx?&2+~xBnpxyg9kA(3(GRSqTyY#BZa^3P9R-xCLN0t2Neb!HPt5r;1=6ImO@p^@U zPhS~3TD)Oe8>t{}HRK$9!;JYDYpiRF2le*FQ^@cf=MiGAOvPW@LPFV>}rsl#giT!t0ceHr6x%ed888G%B)p?e=(`8KbI5Ca4 z#+SK!ugyG~;gaE2;-$?*D!jczuxSzf4-3?TeB1s(iovtP|JUDv0PEoaU_CqltcM4H z_3!|&zdQi!FAo6w%LBl~HAvI>AB-`WxCVfUYXF$I27rlc0GPN2fQf4Wn79UjiE99u zxCVfUYXF$I27rlc0GPN2fQf4Wn79UjiE99uxCVfUYXF$I27rlc0GPN2fQf4Wn79Uj ziE99uxCVfUYXF$I27rlc0GPN2f{AM&n79UliEH4$iR=GzPvYM<9R6448ThXoDd4F4 z-|k5OL8kxz{hox=9yey-dEL}Cl$wt<1_CZV5zu#|S5%mMnOfHeSN7_?HwBX>T|YIa zCjDo=RN`(^2Q$v_&NhW_jNQF>`?ks8%c8fCA5zSHf&lzFn+aR6aad{>@;m+SjIAeu~GZG0IE3tED_PjmeIr0@u1VocHKV?_VgeJ z`|hySJdlGuVi*d|3-^+4tItcH$;*}3<6G=$>+wd=b$7(wg|e3^O3V7{;wW02+(f2& zob7?hcES2;Fl)gk_nGDl%Q?;)DNm3+*4cgCT?E>oAG9_baWvcIfohgYUo?oVUP{)k zzxh~_sEYAk8yGuR9h^38@}L(6zzx#k7TmZ$;_@Nv$FjrCKJ7ZuMJy0{9Su&~?!y<_ z>KoWTaf1|uCZjqW4WAKW?g}1He@v(WS=bAxGU{5R`7+&I3`)7LGi_?F%2oPR=E0cc zTTR&~LdVyfBUPWanbAJ)KH9S!OQc{Tl^a5m!lp8tpP2f?ZU-&H7K#Aj>MeWB~*{gKF(z&Rp& zpi3B8=9`EjW@`$T7EH>A(h{T67+Kj9h0>(OX<>k4Qr z*q=+RBlOJ<i zlOj7k*M~@SiI;fl{bfsz;^uz#s=4H7NH;5cc37Qedq7{Q|6Vv#n?YgF*VKj!;%Cya z`h|g+M#ifC%Q1kMwdJxyv9{~ycg;U}3_Xc{_9x?f(dMeu5Vy2djc!AAv0Vg|cV!5J z%T0P0MkO8MmMh2!Dmm*oe1P%{+lDGqvX^HX|4b;s0NwjL`+I1}y-C4k*tpZI>z*SB z5_||MKQbrL-`)<2{`3LC8-7105XDi4&s8JOg69|r&dND+;9A5UEF zG2e~Z8rGOtaoD$++_UF~rUki{=VC0qbaPgOG2JD%kS0fZilN~hG~Bva-;sYekZ@_8 zDBBi9zAU!P9<|>r`h&>zOUrKa%;#?oF&Cg{c_Hi|=aHJzWkyE_L4=k-{v7gXV`5urlKP@sSmmGAoXP_|8<;#Xj;;|KD^pDCGcc#11&lv_ zOITBNE;4l1%oL(cDsxFm-Zb=r(`FE$LYA`Zb~wqNdzbn; ziIiAw=bzA(TJ%P|os7)|Xw5;27Xwm-nayj|MdwG5)*n9!T;^xcJFKtd zEy`i{swC6jMN<+y|D{2?Ol4*bYM74nib>c#G$nue)4G}O@ zVt7eguyfSD)PF&_#;EF4-GqAFWRpFx8KEFjNcDhtJp3hZK(`tt-=Lm*#{hViNmG3L z%cUT;zznNuLDGOZaUo7vW34&|RmS;!-K0^l9Xn$MMT9a*`qlltwEBTf{X#(mgyi#W_WrDX5P>QYW%t%5z zl;G-?L@C)Ukx^^$JB4E`q`k)pjE3n-s17`(@A!pXQd|9-yV+`|Mz#2DM*011CXZT^ zK`ZA`HE?mk`wtn^5w$^=Fg-rR<-@4~qw8a)H3I7hx}-70jAQVPqG{ulV<^+6(;Oy` zBCvQ0M}S&g{3#;>nou>+4~7-6y+(QbA)Tp^Yn+e|R;8$_G68i=DwiHE{9>>bUryD~+=@we~^_Xs9=(+Jdgs9SQTWRrSWEdKB&r$%jV@?)@@#(YygL@!r<#AfXfc^J@LV)G z0_ac;e?a&MIt-B9C^GHxztkW81!Ze+WM@6z)o_kB7I$ro4kP2inUa0;d$T%`$4wni z71k3I?n${@i5=?Z*9|fu#wEw+@yfh=u^*-_;uw1apuWM|?wf<|w$$i&Lx=pQyb}+U zKiN`zSL!eh{x7IajOx#$k-yg&$n?u9w=~OlP5t|d#QEj+|Dr0Vx0a!&x*OpZYI?@n zg6cK(`nDp}4WkIU_o&a5=4mR%j-5~ew&b(2%R)}fz6+zHGrg0Fqf~wF>5mZ0Uzqs5 z459l0ugmo>HWc;#?Z0ldKb#$*!=A|5p6U+feOqfRyBcCz)UDf(yh`H3(yl0_bJ4C* z1=Xud|8zxZ9qFg7g`bm+X)vG>_4LpV8pDtTuV^=%?`2_+D2$VX6&)?ieISw50o8f z>FNI;jd6isB`XlDWCenitU$1m6*Ox4_xKeER(6P$qEE3S%F|BD-f(?1%mD2 zfna-hAlM!r2xk0%V8#y!X8eF)#t#T){6NO+|FIij#t#T){D5G_4+v)bfMCWC2xk01 z#_s>|bui-x1T%g>FyjXVGk!oY;|ByYen2qe2Lv;IKrrJ61T%g>FyjaOH{tadHrfBPAkH{uX&WXq- z?(Ak^=|*nwPwTLQ%2Ky9_aHX_4ctLuZB{;zFq(%P< zNlSMRa{7-pW+t{)<|a1omJTLfA02Eh82*o)0l6Ih;~n__WmwJ0$@kwq^9|~Dn=w9Z zPS#zxe`fDA`Bd1OKTACc^2|q*&4CGT5uJTU^Ps;3U{`W6C^V<==RmKTyULqAuQzrUXWKliys$wry*Fw7=X_r8#qx=2pkvM+)f zB0D%gYb2g268|urAHZSdbprwCtKMzay~#R0yt$v*^N#Zte~AV%vd=Zp7IDf{NOZ4^ zV)+ql``cGay)T}6g6b)Tv#CsXpw2mg2x@=uuM|K6`P1~^AummWfMwE6Od0WvbD&X= z8Hyvr%*E*fEd?h;6v=n7+)Jo-CaxApx=9#bnhprMMF_fEh^;;RtxR6vR_You@2zI< z@;FL+_=yx>16Ex-k;m$dw}Tpi1%Jj)YL1O9vD4qIBMcsS@`pypr^a_I=r;%W*Ja|r zlji9we|o+h_vF#=pVZ~Hy+6b0*(z{)8X949IujcAe2T*y2(y&)`UQ}PE>+7GZz*F4 zu!$kd6QUyiJdHH43=F}d$vdF;m5l&|fZiPa^LJ`?E7v$v1E!t5@Uc`V-q77eNUMQ0 zD6E}ql@AC1va&NJ!B!Hwoz*Dn=Gqtde2_QyvV)%)f${W-_eHZA!9 z>a;&nGm=8%_{nypD;7>x$3K!z*uS>o60U$O8D+L)QKcB8gn-T|!GDKyhIJhAOw?a+ zOyJ5tCZ!8^mmZRh;}IMX6#T|wF%}%YH74lKi{KFJ`$Em)Q(Uw_Kt%rq)C{r%U!JU2 z)F|Q-5mgh51>pGRtoITNfwCwM2MUcz5)l z+;kc-nFC)?Q6c4rWE&FIH8+yk{Ex-9#rfND5Av~kgqDlq<o!|144q!83pqPBjw{puC#q9_s_P7{C zOcfb=BeOov#`No5QW~7P=Ujv^?vm@P6EZd-kNu)x3AB-$6oFw;Iu*oVditRrQ`OTD z#-c4>QX?9(|5MApm}v$(NTv|q@8e9qe+pyA!n$m9XgCp;JS0_nn}v;YBpZA2U^?>k zb>hlb4uieuBbU0eKErVmyq{VU`OICo>I#Znt$JUqP*hg!`Vg>2hA6+lZG=|4t5IVp zxO>${G~YaCamLX16!eTyr-pvdUIu)Tjrkr5YCR}^kJo=785e<*mKIHW+7v=xEzd< zDN!c%yHq1|d+3M`)tIDP=T#$J5RxGMwtt6- zKoe2Q@U@DcmGYlyC&g1_*TH}_md$zNJrB*lzj{mQW@bRo56R|@n^#`o73#LX16GuojrINk z{i8vA*N1-jk7W!>W9m?6(rg9qu8(K-UjCH6O&dNta(3?9Tm9yA`ECIm)|F^=xTIF@ z!QDRGBRdpMH-`KwSo?%&S=peQ$vqCrhcgN?w2PqdWz$N`F4-JRF}P=vZQN7)3;TuC zHY&^CNs1;LlV69!rLKN>>HvVp*+Wpu#+( zd^F9-z3q5*i5g;N=5XZ9M#sruk6T{HFkV2S=^TgT(9Z6n)%cEJe^N8PBfCnO&vRPa z*^_Ht_}7iC!%HEY3PMhIb1d8A>#4}R&}Go>uX>g_T_33ZJD9rvJ*@>nC-D-GVW`|e>9tcipf$L@y3v5UhV zD5LIc;Q~F0@s>&HtlkroWCs&GwT*3!44LHFkJ3lHc$xv#NQ|QFB^E>P>JHwICb^sv z@EkM#UwR7YgxdpvWz|>XpZm~2^_O#X0UhG4=fq_8qgyE}l42o&WtYn2hugppRle>H z0i4+HIWy-KXFKesgp?k>Esm@x-H9lKZPUL^%clz;H^6pfJ{VikAx2DJ(DQ5W| zc^;4UxXDi=XxCx%>Gd$K_fd+_CM(rVgRI9WD`qei_)Mt3qn9v$ zq+!}&tPmJu#{W1G>?W{SK~csPrj1p>c>`TbZ z&ACgxatXKH%2?h+q_B<9WbOea3*jI_{Ni-hwtZT0<|ax?K&)XTexfN1~3fdfuf z5-*F3_$Cj&8cQ@i-4%-;wMJs2-nxn_eZ#l*U2836Q|0vVMg}7Yy8Vwyp)rA-E0NUYp_!9$3C*#0 z^!glXWWy7CMV|=jDLH*shr-b`8`}0*VrBcVw?)r^X@pn^eq;~Hl7K(=gcW z;wN;z+DUggDzIGsk;FiGC?rqspdjtt-8YJtDf~SCJzOU|Mss~^V3A3qL54i8T0J}l z=MU9`@8BI;Za$6MlT1Z;y6|4>z@+h7(*(a)bH-R44Ro1f)655jlB17*ZdVyT;HZ!F z6lvDeec%Wv%?%2bGn?YHAC_~dXSmf*=2*o_&KKX_K8qO2lDCdBO{so#F| zr9kB7rBA2Uoj8!$$S{~ok&JyNR`@dxqchoPp_=bG9&Y)gFLpc4YT)mUj4XlYvzY#d zgwn}_ZdGLysglo^BB1c2a(&qN`_bMpuifnA?aos8_XteGOvkuY%rf3Dfcp$L$It4f zVWiO+K|#dT6c(!kvOJ&+iL2@?=R{6PFXMq^a+`Rjn|heD!o7*VDK2>}a`Ms1;4H_A zaN;!Qe6Wkk~r$7*i!a@j36a4j!lJ2#O-u!G~!>7hHFvfBV@se%61 zVdbICC5Si(qdYi}rNZ`jiwcWVRv{zwdZ5niZ{w6U-9i7FQA#70yYkoz5nWD~uJfH4 zK8;K5i1Di<+XC9HSyN^h8@39M{H<@BlV2M_4uYuuQ>S5G|ERORi#rRuN)_zX2Umxa zew;Kh#NzUA>DP;2%1g)9bj|v{AF-C*XOF0Es+y2sUV8@Vat_c~wd-1&nO+>(>&7{#<4eFHVi4+<+v4t|9uN zt-r+lIbl!!UFAOCk451O8RL-ww9AH)ZM>q0r2Y&s@$IU`bK}ZMNC8iFUWl=w@b}Y} zl1tNODfJS+OU)O@vwkX*j(=tn=QL2WO!*u;f)mp}FO`0Bq{43a?hC8w79x%JF%_G769v^nn2V%2!c*&<0i+0O~8;n+!9vXFYv3?Yl4hj8rRcf)w> zB*ceqPLjIhe+m`Vr;sYe+*c@7G@&T{xrNWbSKL4C6Q7!S)9>kv#4t@PCAGz+{vC9n zGoy?3olrn{%7`mMLC ztC?RvPnEoNNbCj2*-9>gyT?1MiHHPttsnzjTdTgr&QsPT_=yE%G$gvImITBy8l{XL zN19=Hm6+l(7*?JEJkmm+a0lREFv==%YCz>cA2>>vnVhr?;Eg~kFUMPe92WYV2Ru@i zECec72vm;lu5wBdv3HeIMy0!}9Fj3zz7(sie65gtO2cj=>SrYd`>g<<1L>e zu^umuxArtUYe?1D9fk0{=S|mZaktRJD$jKO9mBjgnm(YN|F7$G*dE-nY!7Z(wgk!>53^>lJgxDTbLTnEzA+`sV5Zi-Fi0wfo#P*;PVtY^tvHeyF{gq+<77YD&hIxls|Jtw{{>>Y*qb>*boC7lb^k&!+3!!m-w+NP>%R+! zo#l5pZ2uCEsjfXl-^fkZUf<=e+k7@-^j>b_b*`pu=#G-%!fGstA>k< zl?9#zRKm%{YbAFvYnHt_M ze8%S6n>x#h3$=pc0JsVy}u;S+vkV6YLO+4zor*cW)V2Y1BnO~=36^^%f8i# zsmZvP#ob=~TDo@W(hhHIxCJ?@51{cm)(HQ&`PJS|@{O(G`4ZCw>I7ZN+x(M+=gWZp4m_N5r)XdPDQFH&X z9oVOSJ8i6a%Mzzm?@OW;y0dM#A9l@XHTPYhowH_xx5;d!pwW%RS=|s*Q>p%Eje44m zh0!&*NY-|4-EL&xZkHj|yRPAOqkZOlVwpVNgJMJ5c*%};yhuyRsBt#3?}-)qH7l?B z`U(MTOuJ?@4oPd)G^zq=(DJ9lhKAcUzon~e8y;_uNe|*PM^XCzfVGq>o2v_&F5~$$ z%9e;GTKfzNR+k;*2^Yn;M*~PmoW&EkX=kC?C#@Fi7wc{-0s=lvV&{`v3#>m@ZdgwW zn)Gm1wn%Jbr|HG1l$7i;ysOr?_Gcw(v9ErWsh2LdPx~r{@$kUw&q(byTwyf4$$T&0 z?XIQ7zD^v&dKIB0nvWl|xe#*G`Vq;-&i1|GVAbWpT$kC-*!A?p>a%twuXR7~2EQP> znnu6oJXc;AsrN2*Q*!38#y`v&oeI(^t3t$(IeM+7hYkC#+D%GjbkIGE)=N8EYSz#4 z-+Z@LiQS()=cw12BeGytr9!gfpm;Kt;_xvjJ*hsr_brWwWXMzF>Y$xyp^`5*FJGIS zR8RyMc+0kX&p!Y5?lR7pBfv7Ppt7m!q|z&sz=hhHv8FEwQS;rKwmx(o%O1QAkFq95 z`V>%~Ko%Bn++tl?nak0zsHXgT)y@%$1<~Um_#mkDh;CK%V-w5gMG-8u?*bLv-|A~W zQEmIU4^ta&U_0zWKf}v3>%XY7Y#@d@O9oxRqK1Q@veQ`|0Jjrm+YkdNg@a^mtqt2L zxKG<1s$1q8cv#}F-8@@w^uBbvt{RXdyYzulKE9Y==khW(k+ zkWq|85Z}2c|D!EwHv|zW16>NnPZKCrT||Z%lX!Rxextv>$c6RXBdl_<1Fc=CZm zCX-9%licCO&^Jqq&u(p4F))ZQg0!^e63|leD0&1E;vtF>5=jbBGjb@OLKPIg$G}Vm zDnKd6_)TWU;3Bbeim^p3v7kkqagYs!m9ZziFhpe^88mj+TZ%9)j~oY!MGR1p5+)nK-efvdz?~GP~r6hKPXm*&EHGr z*2n~-#w+qvsn_;~j1j9tvoO7!mjW`=+qsX!@K0y$EFQm#}`$cc@jC>o^_qRZgRisiu0iY=p% zpflWzQ5mPAEkbjU(|BTRNE_`^$*Lt^*=PK2J~P&1nxIlagmB^TOPUlVwHht^jnM$h zWTwLC7>PWZhD-3#!is!(nvXsH+ZnI^Be9e9aAEXq4twsD0Ky)@*ftuMG~AR%jd|_u zsA4DVNAn=@C(ajO+GdHb6BKJ8VwcxnDN|%)VkVHjfoY@lUq~uY-R#H3gvh7rDlqm6 zh%4ya?8n6PcDRUtHER176{C78YGgFi1YYZB@zK|jftE( zI%IuwIdTMh*WzEAhM6a0o++%#c`=%t1spj%&sbxS%*kKZ_wpzk*mt1s9GV zaL#l;jMztzh}(zMbaB3C;!9@qvQ@tvv9yY#T4hF+*3#tuD0QtsjQ9?swX&GDJ>K%;H%9UG);4v$%!rSWR5niFhngyB=4#) ztD+}@Pw2_Io*NcNIz4Q~s6>)nU7vB_JXMTao2MH~qEt0rbOf?!6p9xNjX3;^-RMle zv{PCIO?eNg%%~+K;220ut>aFgABg32r$(_x4o-`Eh@ zVed7h=Cf)109vCoxV5=5Mrz&Fi*{;q#9LZ{m43QOqPIlh2t=Fc-<>1b%N*&M6eA_- zDnpxyam}N^y6asMBNcJ9qfl-){z60oXxY(Gn;qw`dmY=pMMjC=+9*q490t$TPI>bw z9F1k^%xKhM-UgF z!*SR@mp%y#r;SlaV^TzET*}8O2!XbvGFzE#U@y~{9H)#sOkwgPs)=v?h<-MU+EY`a zz=Zg$xN-f!cAyo|Cw^FI3NEduN^(+M^^eLzfDNVsI^J}nif1wXBKWQ)$dvoS_`;xc zsBEM^mW;^TF6c!PrlekRTVMxDy{<5zk1&=UCr6v2AL!A?O{z@{WA12)K@OyA>w=WI zD`82DgV78^<&I-FH81ydKbN@bM!Pnj`~V2kis8vn2o>ixo=VDi{`!bsJB4oZwe1`Pdz5+~Cy zfdbUQp6AcTtblycn@f7PLJAg#XAuVnn<)q?MM-ob|$CsH}mKV(FQ-6DS7n)G^56B zwCL;1nZcwuQRYBql_-G*?M0SM89N9x=wN%gS>tq3G%0Z5LyHd35C{X0Vnqi$HP~u) zfJstL4@|h&PXV=qWAV&`zY3wV$mfz}qH+jB(&G-V#cG=u12il&0;YFlP&inDj-iSC z={v(EcH0S{onRUcvEz$oAXoHDDq3)VHVp!L2K8LXN>g}B162|=TFGeIP6`F6rU$QjIGD)1jNGG80+i zMA>?PorVU!7ZMt$Pi^y4gTA;W4cLoJ*3dh@N4ftRsC|a%8OVfdOV+uiBEqZZXj>KI zQs9t>DM|s#aaYKI`)xIdYM#F@`*Wyb%9CI0QHm)`Da)f3mOq5)`>&$ZxX-dGS^()O z_Pk|l)TiX|tgt!L7bEB*^%m4~7#mQq4BbUIv!@31 z<2pO@Rulh_5s8EP5ed2Xm4cQRqmstRsce$KN;*!N-0@Z=EAF7d#J&uj;PYYQClOf# z>mi(dch~RwrjLzr@Vo<3Ddy7+@D_7zq2%lyKIHp8{aw54-z=wBtK zwEvF9-FvSde);~tfWGL1>p#@dk-cf{aeA?pCx9$>;6B%A{OR<&nt3Q*F|2-$%-2WyJ9EX zy_j5K&e9GtELl*wEwQX>66y|jm_+?`IfEI0w)91pxan7`uGi%PtaAyiwgOToBxPwM z=$ZDkZjF~$HY0XD;i1CEKH^*H!$-Lj3j`@z{BJE7shR0VkS2$`^ybg>i;fRh+9yc1 zIF@&YhUc{EQL<{ul-j!6_`<~m9hK@FY-Nu4#K~=-bO$0~+nkR&) zvX-b-H!_ANO|aDOPgqPFx{1f_28gb;GDzI;yRQ)%dCq9h5ZQf)q2Vfdxayx_?yr|k zVdYjZi22sGNd+Fb!oOFwb%DQ)JMa+RM~ND;%pLWiHP^EB;;1aF-pq|G-x+^=XdYx? z!Qiq-)(2%@4~gb8z|^(qd;N8&?Y-948`p-f1BFG=(zfK82AFgsWkW*o#V(%x)9aPh zIbWYGq;u7T{9tMpsChHQP{h7!Tc(ADIu%w;CzA2xA9>yZn#y0NGBnD zARQeagBjPL72)S-sh-02u9n1<3;Vc_svr7N@kH4UG@Y2taL!QKavqm0A9JNFQBl)k zEThPUlU_|~HI{~T*P(q`0}lyV`;7$#4!OZ#d(&0|Gu#e(x+-|bik{)+zT@gnW040c zvJG$Tg=fX)K~)V_t@@(`0@iB#&NpWO7HRdZVEhj%S$Gn()!&Wfa{_5KLxqHo`|HobZS7tf}#AS#b zyO8q~BAF@%jD&Axd7UClbMA0io}U@UucE3Gb|e=*yI9+Y9b3O+AgP#IW$dYihxfz|BQS5u=fwDri zp!mq*34b4>6vrM~De{kvcrQVQ1lq!FaWJuD2Qe1_ZM6Mkz{C$XzA5cF5 z)%(2>D!(UdU54>M@B=Cbi~W;1p4!3??%HrlJNqY+8>{7o(e5)9oTl_0nW2kk>gQ*ghnBh94r<0{- zySvynQ%~BUPLU~cWr=9@Wk|k^$k;b-+cWb^+ak%PagksMwP@=B6e=1BK0IVRB4hMt z_RTyRns>9wgyr;@7f}_RNcPftdmWW!+q^)RoLcqvtLEzX@Ag)PyJaPO35~b(vBys( zi-}-i;>oWSdiSoHg4&+#uvxOjP}EhY>@WnEZ9jFN^xHX_>%9`vT&XVc3VxsQQeyM_t@k2~uGQvhXC0@8Tkp#HXo#j9IIMT_c&} zT5>R{hI#?*y1MtCk21VvNugJQioR1kYQ-&$v3xa}=7SPhj96@cs!7 z>Pjz%U6rB9sOU&L9O32DjE82hLc=gUKcrrLoMpS3673bvN$x5S@y znpe--)hI{V<=rXttC#T;)HYOZ1&>OXqM$QbrVOgVtJ15(b50R%MHzw24GLN798}bC ztn9{BDgz9^XO>sj1h{f_#Uad@YPPMiDLi?XJFU<5$|m|N|4T1~UT0}%k@ARP358Z_ z>!Sug*@;!RfYc&!nbshSqXr?&34iy4;Us|)sQf{?ix%lrRVcnC(91D5__AKQU1<9E zL&N>g+|b$$iK&&McD0_$elCMgwYI3>X9-ewg~2?wvrcqgPhlo}Buf}yrwd;toRJ4y z-V8n;KN%;R zP^%?MwU_LI^pZDlBI8l2E&RDamd7~n-=;pBEdS+#THQ}$!!&7(r$aee{L2NU+H$!b zPLp#f3~pxZ)`f1e&5Ft*t+dGhIQt4a{KRSeyS@?To8XMJJO}lojgE z+K6Pet8A!Lpr>JPwQybm)Lm=OEcQznSN1Xga)s!nT8Cm#_e)S|{6%o&V9ypw$BC*6 zR_rOJe#S4~7Oc~6md4$?oc+#>IhQdye5zd-R}P4U6ngHE&h|jHce%`eMlcye~M1hEuc~$VHO+idTj7nI-s5$nC2E*s_6G162O?Vc9!dy?R*eXoD zxitB&;3BgzfeO9?Pg8Qr@j*(frCcXabuU9l^dpO$scQdT>IId=;@oKn&@6CYP)>b& zHeMW3qek#u1}w4#_AynU)le0b+5{s>Xv15xxN^_T!6uZ59HD&rQ8}>GX{G~RxWTg# zyBv(=ngXIKh#`l>PW3;lec$%VOS(HcgIk);5SD*#T*b`*BjW&$QA1f>Wj#f%GM{xW zu1*!css&kHUUE1e#Xv)u*3C=AW*3Ti@}gAH3_+2 zNe&j9R(tfmrx2)!IPqFLAwNOjRCOhAKYb*%4Q_|9$=WDN)@Btnq#M;!)ss)Da2M>3 zDjYsZ_=MZB>ITo^sgp-#-Jl??v;pckaUd05b0F^rhg3Rq)Gd{>6T#=P=&Gt_mteDrzUh(u>jnji42fEu^s zWMs`eg}029N|ru&69@ILj}X|NZ^0E+W{c2O@MVCKUVl_ukE-@@3{{z=`avS@W0Xx|?!Ec$h$w89Wv<1H4}rs?b%P~UI#RS`?w z@Ycpf9K_i(kepH4GwgepX!S)Lt=kuI@idDTLjb&KaoKU+Q{~YX-&0k1yRTdv@VRKA zwBdB~J?VswD&#oK`Osg3pk8C!>RsBaqKM}hFG4i7KXSOAz6~z)Lc$rt)X%?yemuw~ z?e`?;RolT(_q#~{Jd|L$!#8kk!tlZgS6wLS%gMIr+aRo;%V#L293{_O+RspOrD^Cs zRaf2+&;ih%c`;d=vIBtj9C4Q_pbqrLukmY9uFG|!&+C;1=M%vNq;1T)Y9L|!H)aKX zPz>cLR)Pq>N=SSCGAprTaFZ(o|p#6sUljX5KRV17`27QGu zlyX0+ee&WOYg%_-Zf?IvI{$PVcXYNr6;D2h|5}k%N>gnbFP^R{x02^P6D%1M#vMj$?-N2Rg zxpK)y7YMH<)uxqBB4V#B({y?7por$aK~%$|F?UrY#fC?xz?;(VHNK_T-1&N;gymS* zqj``JsHCIcl@hm?P97)&z1>hCwZR3#5J4@kw6DFCycPo7cyPGaKdN3GOSS_0I6~YQ zoN`cfLbkH#{PS=m!%e8;a&_u{7xx_`)aj0mq(~iyKPW>F>2*||H7P8V%Yz8wCH|Zp1*PmIeild3X?R%$V^|z#`U)!kb?)% zhj8!!Rye6O9k zvq$m(`kgyiM9Rf-r<~#D`ac|DVCJZ61lS~`mF`UaK|U0ZvI^Isszy=d!i z2jIvW9Io!Ir|-% zrL*OoJj>7&@>leBue19ba>n@w?jr@JEP2Qo=Y3@VF=f^^*1E=KuDXsk_iu)#)+T?> z834iV<~e?d?Y}`Vc4oGJf?(QH?})n5fr))l>ww8df+yMjvHhQu*>cb!)mNg*IxgsQpr+*&4yi+o`mKax!CDqi;7TjpWzOV#5pm zUv*{wU|?CU*K7Nj-Zyi*x&Q-PYryDET`&e17`kuM65&~3^X<=@-Jb`2vY5Kw`!+9b zHlXV#VytQXmstl7R@x)2H%Mx{JboiE70<5-w*eyXTc>z_Z|$rRuL)gjoz+_c&tQ*J zN!EEu7G8MVFwW||qT#}ty(ZCDq)>BrNGHxpTGiJl%bB@OBk{743ihsPyxn-qAQmzO zS95Z+U>)rJid$+|yH)x;Fd;9Uxb+EMO4{?;&exYPOz!;III?09^L4J?>#i&cx&E-0 z_N7@pfdj;hE>=w07c20;l=QV^JSZbj(1;&%h0 zCgsB7JWAae4$~P`tDdsiEG`$-eqHkdWVr8~!bV&*F=us7hr8BU85gZfnSMHTslDw& zOCuq`l}FA^Kjy23znE~1Az(zt7)wQHkcE@Jdj@loCulXwf|MSfNvdnz76ZxHis24iIU2NP zR(x@wg)9uI!RjFAA6MxnKG$38p}l(iR7IXDgj{=wR2or8k2C+&fWr z4O;XzgJL}`D}BsQyp~&=%+rQO>|2W@0vZpqvYwe>p7nhB@D3?X=V#rN2DLzYe{k`^dP}-hve|hnjj{%*&6X9cK8oxKPc+ZqaXO=^yA?=FZ zt`~?YHfJ9AgJB*SLi<#&S_J7elC8Ay{dx)`vu<$ROvtph*U)NPxSQ<-MvTr`gDIhg$kgyoU4G00XwFR$Vd0&W$e?2o|;Ki<|m@1TgGjAs%;N(nIcTM$t! zOv$*{>%(Co-{M?UwU3nJP@Yjeyj#w;tWuy8|)3s;FU2ChG&L+o+`lr3&CfwdpPP{|#m5lVH zRa~5I+V00XXwv4aF?qTm1FN%+WU#~Ay;n|J>rt<+%RN!EQ$Vzwk*1D5wr{t`kjUpO zZ!VZhzL&U8=219rse!{1Q%^zClkQ?4_HG}|$Bjbsh}Z8M!zCP=_H&2N7t%BKmj|Wr zZA*J8mTH}hB*dMMR4aak!Om_bkANS?b&|Dj2^|g4G;bo1De5XLE9#iZX_%`VF}wip zBKp*nTUegFc>bgP2IZtcN2YMlyb z@$BkiPgUOzpS^?iyTfv$&yx!xEG^zmXY|L0bglFcoIDrr5-zslVKRv03T9l=fdF?QoF?0iO+8? zDAhe1+!YmnkZsAdr9J0L(VLXYLnVE5;UfFsL6V_hH>Z#DCThLSIA3 zr>9RdLx-vsq@<=N8D+S1Myrc$9ZfD=^ZapKlE8#*{nLUrs}7?YpfE$G0#@*>s8rxg z@TM(+{OBr}Cjk~^Wl{ecS+>1fY`@#U znligWh4HH`v&<;f9x3>ePmvNj&{7*mSRz7;&g+jdVinV8h1}V`ta74oUGfmQylZ0K z6ZV9iom&T-vCiqXhKIOre+CJ*a#BI@AiPD&*(JLi# zovoSN7BBGAfKncXN%)N0!Z`|)`x$qmUZyb<*W6(Ad%c5sA`U~`I!Dz>7E?7JXRVqW zPWLi;hGo~RF_NoYX?AG7GUv||fvTFL%dc<_BVO+`=DUk5R@QPTeR+ zV^uY3J%*(}0l*Q)*@3P^F95G{#E84soL*eW3g3VEses&CDK1GAzR17O44&D^0NT>Q09iauP3Su{5I=R? z2X;UgX$ojCi=gsNDKoQ&KTs6O;bg?le;h%P$&{t{6b}=mlBRQr4vVDrG}tuI)S}v# zq1Of}7g%2W@YD!7i^fA*CoIt=Z5f>{$$N>_Ph;8uLYhZ`D}UM2zp{b~*BXv8%Z3VP z=|4e_b)cW7NV<5Fra`(Wh%hL@qnw-+(Zh!#U1BH>zPSp$%jHQYrNvGqxN~ z_FfI_V=wEEs^vtkPk>bzb0LwJ(g|Tg{W=S_V!6RN*xS4yv$}Ei<;^M2t`U#Vouh*w z2Hd=IM~|?uSobF~vgr&0I43vGirC6@mfV|-w!ELtUWh^aNOzz@krg#Wg{{UGmOJ{> z>hvbl6Mb@8yI;$rCrV$I(P@#D4HywOHBcg@6loxS+oBFeI;a-NyO2XU1tp0!}XeuV)p=X|cO$H@BGOH^V_+EN?Zd zZ>^~Wbc~moMsDKWPWz^qBvIlq;rMGU?bNwzJW2(lyPTdtrMcZM(86LZIM>mlZ--pU z=>M!d%94ccHNrN5{k&}1VU!Y)@UCLS&164VXt5p)Pnx}ADGUKNhF4&Z*l~Vl9i%Gk zp6XS?HhFK1I~}2~hSfu5G`y_#Gz{F0tM;>(vyXg?3>SAe>W5m&09-%$YIt=+&D#|GaA_=m_wTs8j=6Ff)!eG%xe5o`JjTP+#)!|44C9jT1YWX45B}%E` z4c=6UxWZwwOXNq%=*;D@`ko8pT2<#V+x=5#%2-;xK?H4(T}JsRI~Y)l;YDIoRk-wy zNuM$DoRYJ)8QEd8Xln^88Si67gP=PcMWEz6!Nu$mXJUfcZQAPUci%V+sYwTRF0Xa8 zuCqQSFQ>)WL(;aKh0Lyt7%4vVl!w2L$KckD@Hn79RAIjP_xHbhdUwUBsE?<(j zjE40f%@C?WDRfkUc4dQcwx5+^5&u?&^ z7-$!$luK69)eE0eu>x1A<(9OO!)DkeuqS6{8Mi;M3*N!9A+Yroq+NNxLbBnUsytp5 zah)*j6YmG+#WyJY>*nD2*ffeL2U)HZS--q?+DVeNLE2HVtsOK4lQS#VhL zi@;|)eznM2f%`dp-ThxeRkk-Eif&c2W`~L|DyaOHoT{d>_b$nnU|GPAa zljqK~1^^@$9$;*=-yD$n-nRCi0TRGyAV&8b@Sg-^_a@7~AtsLB*zZqllJg!X{THb9 z2d4z$`irTK{oV=sH-yA}?|lRi;6L)jc}Gs~6m9L z7cd}deYqEzZ9rM;?osH$9rQ${MI-ef_LRMa!ob?N^;H6WF#wflJWq;@56^6MOmnXt zvrlre4pZGmxv3>QI4_`cPj0NmRg`G*xVT(;fjM4V0L*E7w#9t5b?EHUGRM+od$~q} z>3uu0wlKN;X7vrp+4F^gGu^}}4-{^n+Qo%tFYi1iuglG)?ftp6oLd3CnMW&>Z_=#V z_Pjl6x+HH9&)-jsQs_ln)Wq0k!g{xd^H*JI1~gXjac7nKW|WDyATl6y6)~;z-xIb$ z-8=Uow#ut@c07|l4r4Wg!%qJ`fUY(1U~IpCW^^HbVEDeBuzTt7#;_fxA;{gMaQ`qV zXd&qBxz8on!7)Pv=WdhB>C@BUGC4bQR71Flt4?=``er4x4X9=?uK6u{anXuGGACZj z7bfqfhTDm^5x<^d;?dKe-eAVtm&Jr3`(j zwKiR-Hkded710>40wH2W#~`WoMJJK4KG&Rx)})~_1LzDc++>O!CP+I|PJt|zrX&}# z0@gTigI%dwg|S#s44a5aVGCd)Yb*Isu8BubQf#yh%Owe?SwGs{dQPRb?eDt+f_diF zt&Ppe7&eeG%hkP&>OyUF714lNVj9$=XONF-RjBMnB4+)#5E2f z{2lcyu1_5^4*e6?*Yd`Q_~f2#+m_tVa$Q_SIQ^(!LKRR z0a-e&0sz9my`~BP;ki?$1L`Xjy(lH9=?{Q;Oety;gCk1m$D?Pl^C{6^2~9)TGG1rN zdLV06Jd3psr$i5@iZz?3tSY36T`!GH{~}J=DFfEu6X10kV$9kPm6+QdDqfu<8im<$ zbON5pArN#dt0>UQM@fVvDM2azu1A*CnhFz^K#=AQYyzG7Bh*hnsydf^(?OiSRde ztFh{J3kD7adU21~E1EP&2}x!tx6=E7jiIGjQC|`mLo2aJ z9?oUyu%c=k^nXuwFiwPJ@LdO0oP;n%^2OD3xUzLcp$?czj-wqjUV_*w*n=Y28wcp+ z^1V{jOEJhr1%K{RSM)-QqLl3^b>V-M3(k`9j%#Xtj6q*MNO-m*HirOT(~K8sRRYhE zz$NAnhwom*R*oNRX3E%9duFN$A;g$c8nn$!ETDxhQn?bSV`66&Ww7&bk z>V_tBWJhukkZI+R&nTqZ%+&SKAGpm}6M(lo>$z;k*F_c}XLDA9&X?9~FLXC*3JZ2; z~DU~J%Rh4z%Ei!G)ZVne~HY#P;0Tm5nG|SmM})I^C!{r>8Cu? z(@kn5;F%4&9Tg0w7xH>5>z1M*XCv_l3#p>^H`~Uj?%x%8TaSrt)UC(|#sg=b1x2S$ zBQmsmqn3?aWFs9#3qAf))^-fl4Okcyf zNEth_3aszDUyCe0UmOcgw{n?xIrQOC&wG>&Ru&3?6HWNgf~5EeKV1l>K#fj$DMD9r z%*`!Mv?5tu_z>EpiX(@!puE;!z4@?nP{Jk&qT)Z|QK7OHn5t~-@_Mp{fwP1$3rxB~ z2DRPMQisE&jQrNABnymCLa&UBlLgk#SE5vk$@eeH0t^0L40ehqw#b`ij8JgmOv?h3 zn1)ooiph6ami$3nr}VK)Eo$jQmN^IT^_*v+&XYagHM798kDG$a2N5)4PP=2(7F7i4 zvEEltn-&u?llft13p2l5k)Xp*%Pwq!Mw@@F(Tc?2l?4iywNcf8rgvvDgU?X;9vTs@ zlF#SndIk)^>dwW#X!lZ@j+;ZA?$13|m0ecMUwW+0H+kOJR3}VrF~8t*qrdX%3#n5} z(QfazP3>|KB2Kd__W}!=%{+h=m6SM*y7YJP!>>FhiMyNQPb{O=Y*uYc1XKOVvjch992dljf@df-${dGjz0V)TW@Ia|zg2 zQWko_UG0pqU;_nUMKwS8t3+(6PF@!&N2y&RNHl{$MW_r~y@(^b%e=e{PNlJ|vz*r^ zAz3~|nqsiy_kWqn{J2)Gn zDq%z?7h~x`KrO^rohkzP-%&SfYnW7f)jJmZm}pKT>$QXVy`ynkvJ-hIDHwdvn>*K4 zTIp%cjKwveUP+zzKzh|2^q za}GT+m(SZa+>$)lqbSvXM@iJ>QlvhQ2Fvs$o3eDTJTmu7E#*Q~ORBtf+S`x0+sK5C z_L6OgaekUu(FA}@ERd3jt}L@XA05@;O}k(2Y-#2hO$rXGL6RC)Y=@85(y#<=go;FDrBFP6(aCy>iY;lQ;ilqp<@cOHGYDhU zhy)j6PONn`CFEU1xxk&@Tomw|g9_nHVa1sX-F83Cx01q*)fbZLX}kMM<5MjzwA+>~)U?|bHzdmH z=TMrD6Hq%EfkM2|Avcb8^J(n4v!V4o`{)xHvH_=x@O&xSiv^5%I}Fy*m;R6x3@^^P z_rd33;)T;eDFT+<6F<^_wM!FND;{_&HW!M@PE5uHo;a0>kkNl*xytEw_;LEAiWE;p zd2i(8%@2kmz_eZdlTs?C*+1_HZ^+|$KGH-1Y@6-Gw=JYLC1k1Gi+QlVkmfU~*cSiL zM>PgTaDiM92H%Y}b%z0KW2Y{}6sOsg>B95%N5+sIJU)vavp97Nnd1T01cEo?B_ovj zD|M6n^)anJ!gnqe!%h8j%hGoXn%NQ+PWz z^wm2Fo%we~_8V{osbS|Q1XRoWsawvogem8!k&W|Dzt!WNU5^EJ?+nH4fGv^@K{QI^ z#ni6n=`v4xOZ`^4Ta5#j&Umw!W*YKL+J-I6L09Sv(33k|BXN`%#eI5LMlQvI`dl}* z|51u@+$WiGa?5slpL|bAIcjz6YW=${`ICBaSQHg-PElh!fry@yDMlPQT_d?nzSLTG z%L8qS+!wLxZR->Tn-Qgl8kRDk{zs$YD*m*_$jQ-#P|83-*$I@EK+#GpsHx~QiIfRM zKxr``gSiY*R!L^M`xO#XWcG~2ELl(FxdC;R5kg5;{L8Ehb3NKQF4dS=bw5b|BkME> zs7%U3e={}W@aK0=cCnw&#m|Ss#n4N>-xN49Wx3-Lr!mfn@ufyQm#;H<&Y$D>t===# z@!QM--JC-Pf4w7#@9qn+I+NY~=)KF9^VjDdEjh2x3xNxv?wc1y`oN)b-K}!d<6H7B zB-&K`w_zKzPY075Ici?srs&o;JLRKop`ChL3jeejW%}89?$A23cw6YC@Ag{3_}e$v z!Elzdr&4X&$DY$yx{Ld_Q0_C&;r=ZK`&TW||4%U3ANo2ueS5%93D_zBb-IB2!Mpwj zz5@um{=i@layU-bJG$~;kkfA+6~x~DpUjK*!-)M2Au)6P)^P#T766g_raLU0{~bBq ziSzE}G59A6c0cIZ-w+a@HoKRW{h7?M-#JYG3kCZJnfogQyB~k;Z-|NY&Rhu`|Iab8 z-B~ODvy$;2XYMbs5CC9*_Tv6G0LISB@hK6&{b2YyGiSUm7kqOwZ%_B?Nu<-@=Gh7p z=B*d=I5DpGT#u|oa{JPnO6ypwh3EC@oxrU9PGBaNrxRrOO}64zRg|`*9h-bG-R9!@ z+l$#P%;sM|4^A=9&W^o_OWiS+a8o3ymeF23CtOmwZ8=@p_}*z4-~I|SUixxkL2L6g z9))^?({_|+Pj8>~t@0FRzovJ>c4dte!N6`jV)T21Zl%cf3&&SzajW+24PZ5UmNyHf zKWttYZ2a&;&i27&LXi+tMXU%Ke!`OT5&Eqvn!spkmp_yzc&nnFE>?x}oGt^No`}Vj zK&w3peUgu8o(A=WD*KGTYSLoF8BrfX=~22AzFk8CyVbj(FuhVp0#Z7>``2y%r5@V$ z`5)igursQ7M;QFusY#->xd68s=6EXZ<~4*4D#%_$bPGAq zII1U|Vv}J_=$|b45#w|PE`9#$Z=}A}Q+7htr@Hu|g)<-HqU?-{N6Q3e6Mq@|SEs%K$!A6$_d)QKqzbfDDZq@B%S-YkB2vj-x6+2WLpgwL0kFc1s^_N; zB}rv>zijYU-F_7yEM_$4`ldrG{!!{z-%X#MG7R}ACuikN4G1aLB)>23D`kTO>|r(A zX_-gm9_EIEdP&=~1sxfc;qcUt0$2uY-JF;<$hFAhm94h}~nPTB#IG=CE&Mhrhd2>rw-{E~G%+{tJC`|$vq`HW~h$UFmUycW6~Yy5mc~u6f6^ABgX0`Yvkf8b#fG>OM=k86A-rVrR zrhM5>G&lfRwWWfO-T1Rmk|B?m7>i{L)k-jCNaGH*#ZVYH+UD#I#fKI!%b4Zr=StA2EuGY9wu`5P?z z7~I+c2N61UUxiyi58>2XM6&UicUWc2iJ<1+ldjEm*EF#RDS36=|S_lBk;N{54 z(fnN_4)&9$e8t!ZOsSr9CGBD4E!=*QN922fN{5?kT^Bl@_^6!K+O6p(SDP}c4Xb^t zYnw&;+wr!#)Va3kp6Mu1U+GmZT?;Q4xG=YI{zag^9ZPE#X!G#u%#26WqKzWpA2jo- zsBoB7=k5M5Z%x4QNU*)+_bntm0qsm>HS0A2UEdjkM%b0#H?GfV2K*OtW~Zk;Aa51K ziW;H}tUM`AcB~~)Z{2K$cGtTosJ7la#u-93d3vJjHl$tXqpsxI!GBgHN#(5zuxg?f zysdzOFeWfOwXEc$qOYU6jUq_A0_VEfvmn5Iw0h;$tnc@6_AIpL)_S>7(@~D9cr6zw zX18N^DAP!AcT}xawX!((u>iAN4VDIKI&04I>d^gE0yi(>nyaMv`yzG0^?pf&${2Mm z^X)?R7tvCaWonAX*npToo7z$JukuhC>Iv)1RHr9XWItbvC;e>b{i$TnQdJww{hB&! z#WK3Stk+lw1Cqh~ijwpTqn6LAeUb7SLi(GGBdu&108l-Z_MRYjd@#PLstpo`Vw%t5SHRfbpIDk?Tnu9RqmdPztq z4Lc6CuP7-n@is}sk#0dtqQPL+DQiX%;W zIWq%Rve0iP8Ob>;^iHrn3HHleO89;k?#J~nKQg{06^}_g!ZBBP69QZ_ocY3tiB+3cDtKq>WhO{ zODLXfZx+F?=pP3r1dKpSk zFRMbp+yK}Di95X3_{5%ONyS^@9SdXmo~y(=5;##g@jhCm1Qu2e(bl5l!U6yAfTIUD zQWBw=f!>CUHoUeL_17iWHLP5n2O$}z@cB^v5Lhz@*@sR-?Aiv^2b@Lf+J?*<_M|$9 zeDt<{iew_BxR?Jb^@Xf;RyWzLi7lKSUaRb`G*_A0HlZARA5cqfjM;2DkP6AvLFeA3 z#02N#r+K2sZVt$%hW*^Wao4WAaX?cCcs9*GuqQ#_N_}01=6hCzO@4TU_ZbQ-a14>G z(#v474UL*Ol8*mrigi1GiLq>D=4WSYOW7Clw7QNipQLAQUOUiMAGm z2B7BvD+k6$p@XjYZP69DaniU*N`YI^Fbid_?^Ln~cnxD_(9r@J!kH~%8vLTQ^i(na z-wy+IF??vxDGDoQ5)F^5jZE`RyZC+}?DRvM9Uuuj=uLjP*r)tPJE0bC>+F(tI zt6V|uN)=L8J?bTcW|n5mH09To8+0DPdxVzz*c}q~n@(j$b6oreP-v|gtav3c1ELb7 z4si2AR&M-sC#M{xEeJi4I+pV=l@swOC=WT4(&yStY!n@&UBpgM|29TdDRZu*w;RXHwHrNWh+9`MPrDQDKzU{W$&{cIh^u*=S*q_ONxklh%DY{u!ys zuSR?l4pVVEzZp!!G3p%l)9h`cy3D=a#APejW&+O7c=`8kgOpArgOpy93G#R2)Y-$b zO8mQ9pFDwv$S0~2WWK>Y^s44~IFh5;L=d5Mr^M(n5$A)KLZ%W0QTmx?w->}J!uVxK zAse&2?+A#{Qy3-panXO*Oa8^uabQQTAwZ@sAbE@BPUjA_$}3vhL|vP%qY^R^d7S~q zv>}9lf&J_(O{)ErkuEo$J4;_Ay7<&nkmNmEZ%gQo9m!p2h+OCTgs5}B`?UuN&+Aog zQD>e5WfAAOXFZfmoXuHL=bQI%*`&GgPuHP4&TAh;oOxD(KaW2@zZI$HZ~oQB=dhjW z=puO({AcO&=ZcUg9i$@fq>v*ztR@f?QEH3w=7C1${WRl)X zhVJ~OK&t5`*r`hf^Ts9iG)YMnCbjG&7*Q{+q~5)WYDlH}*pWCe0L-HMb$RBCWx7&) z*|ZN?24*#F738I?O2#8C|FT6X5|_-%>*?PY|D|xWme>l@arU4l5AR9d*zaF!9B*M zPoCr6F`1#$tkR5(wy|~?q|=XjVNIZ*{h@rv*zlVn!ulRqIVL0Ah$QU) zQBGnak1?_kkSYEBo@&K~PxAuu z_L%TwSZpI)$5SOx@G{;+T7xg4zc!^>gtC|TL>4fPeRkUzAF1B(PugHXXwFZG-B=5K zrS|5%D8rK!_y;j=FF99|BHrS9?8X&(DLDoo7{?CW1V0_4m<>O-LJTJ)0}e_#26z1? zegP(Y0#a|07K1gEOTVdP*by#aX#E4_=~%A%3p1Pn8+4pAC!RDshX?PtR6s1u28e|% zja>77K!~jusA@B+xdu5&Uk5MW(6iOE*mm&#%+LlwTkxyzklk27)z!zD^;<_O!Gdp0 zbb$M$qbn|BFYU~03#wu-jVI@lp)G~BnzWSZIFw-l!%o>)z~}|DR6RgGjPEVsm1Z-5 z%cxJst{Yo0B$lh^B+ci|+vT*o51i0{Oh4Wreb5hTJ?eY(;q-cx)yKNKgOBFDxMZ?5 zc%!PH4b+uuCE$0wK2pAL8Gp9*%EaEhy}Vo*H{ac_ea^h&Nxfn4%9Obw^YXfSUfkP% zhs|AjQCRs*arf;_$M?%UR@O~4)=UBNk8@p_l55AI+>XQ9Onsa2JN9KKjh<-j)w>0v z&b&y3t)ZI<_*ti+PV1+d#(ZD`g0#`0EyVb-R{;xLh@>0I#;hde$RtqKBJ-dh@VawQ zQ7$QrYL-M2!Zkxq-=i^W+K~+Ijexn((^6c8UChdqrt`y6`}aHN8{oi^22Rd^Ps5*KNv{G$N{=fU|K0*CtEv%w;2Lh*9Jz$Qps-a*lu^)dY8z zZeYj|Gp?=2IY2qY7lsgC{U&lq=zIs*NocY#Mue3{h$I3n^{HdApMw`3b4fJmpd}=8 zmyIyOq1a0|e-nlM%Pu)N+3On{+5^7dKRYkkev3i<@5P4fKy<-B@)3vUH2i;f3Az6k6#I9~%JfH0>~CHAlN0)Hl=Zh!0`TFVb$$O9A2R)O0e@SdNSo)j z`fx4im;ED}cBW6dmY3EaK)rpe2bhS!lb#9f%`!clYq@peYD|va^`sV8&_<^W?ikvQ zCf{wFtsJZ4dZha=hS8HRw?6N#E+dWJkF00odYG2YgXtY1=wvE|)n`9HolGw;J_Wwv zh@W@ix_V!K=e-#b&D_PC(Y17PoZZ&+1xw)h=H&kP;jr(S&)_<4oIWsSF^cu!q^dys z9;qU`(keMb_p3YY2WA-W&Rn5GfFGJeu@bZo%#k*bF&ZdegP(uJvdSb#YBWE#6?oH7 zqsqG#WX-gVP_3Xtg&)pAoYd9YH&cyYaZm8!n7DC+X79ArZoj(D@bTe$)ifQ`_7hwa`27uC(K=(l49L@ij1uyo-Y1xVle) zTAts@zzUL04>d!|`bI?1K;t4Wgf(Sdk53YVWLzIJm|=g6%}^>Qk!1RHyn<|q)5X#= z&&)r$oRc|p_DAr7^Q#~%4vut$Mvq|kF6&oo$sdN{&C|9%teIQCtB$d}CSVVh?_T>{ z9ujD%&jmNrD2h3^h)ws6zJZGA3;vGO_Ka>jwaEVrQm0(< zeMzW^YKi~(;sgqO*hHqkxBI8}(W|#NFakn5H}$t&a;qU-hDF=rw-y zZjhvRt+^8#WSq?iaBz@8ny78jM!T{ueeF2MUicElVNI7F;P)Tobcd7@<2g(}g+7u#8v6SjS%Dl{iItXM67a1 zn+5BaEUNTpZKv>tMkA=(gx<+47~u^&loUZG-uW*8HM*4|G#F;q>F{J5~LvP~K!cSuJ`=N+3>QjIdnt?n9fBZNSHyA9Nb0hKKzn zJvefLGaSmim95~F1iQvRPx}y_1yizX3oz|+=rRxWTUv8; z_g;DUPlUmop_u|z<6a}}vPx^|7{3FY*!pi41|;rbvZ7D3CNZN#tIcLNhfhuNp9JBU z@D8mN{7Qti|I5IH5Hv1OZahu_ATM6o5yuV zKDTOil}UxjHAoeHsZ-S|r!OOkuyswe8lwALroE+&L0NrXik>XI=DV(RO-suKI#9Dx zmO{lvyS2ijW)JqQtG6ri5Tptpmg}o}I}^HQho+*Uz1lEj-ywWTDHkmbja>IP<;PLl z(Iqz8(Md1W3}+G?D`QDEioS8niwfCsF2XH?TOc3-)f^|KKqHBK+j(~Q=jS*yzro17 zfOH7oPOUoE`aos~da-O3_oJ##v1R9654Ayew(X5Lz}u96@i~mzQS!(~CvLktF2Pfk znOt90rC%Kb?M$@?SXCs}XSYU`hKS0;3r>PHBF&OS=ikH_h*no4RZV)4Gh(? zxZ#uH*s?fy^Td2-I-sIGTb`yVU1s2sZ_F1U86hV<(sUSD{FNjSrdKQV4Yj8Clnbq z+$;;=D1TD8Pka4-GbTyR(q^wm*Z|_rwlf{T_NEuOitqyGw1KM#0C86ahl zW87C7em>IllSBPsWAJewzyKa&Wt@3LhkmS7 z)}qSgvg(;zqE6`s8DCaKoVkFV@Ec`vO48NZggOR11T zNmRA$5mUtp!&2R~reIgV4Z@Ii;ZGJ-)KaH#zGwtjDvoW5i?h`VO!zqQKA%e0jAC-* zLY(hJd(U=Llp125DrbP{)m2MvE;{qJKa~`?XWSsLsF^@g7_KB@su-3+Cxw#k#+xL3 zqO5~n;Nz0LMG`hXRTnlsn~7cklxTkkd{W4OPs$1KNns+~`n1b5+NI3ck;4~EET~VZ5;m=aBbnC-8D|f0F7_f#30V1a6h}>0iZUjARHT=> za@>s~#d`&7fhhohmP?`w!(hTw-cSndG5oy^-;`)AN_o=XQK<=k= z2>t-QI~LH&(rLni-!(5r{R)CSu&GNK*mU%BVXbxxGn>60#I>E?hsIXW+EKcRT29!R zZ9)M^dic}_!(JazFh+-?{pt2Ahcv5GN}w4~r*bpN(p>7LPGvh#dQ{auTs}=3M0o*h z2DJXBxUolkgx&|=9uP5Vd#Wse{Q#{8DQ)QKTb-b4EZ{(~1yUaBe}h~Ir?r>H`doC{e%fA(c>;jb62%x+};k!-j`ecQbPi|qmCTmUI&Md37-4~Mp z){qTsR3S{UuVGc`qTCzaY+7Xh$1e!MjnvWo% zP<8IE3yUf)6LU&=N{~{w(wf{kkSiVIiM`In$&@x)Ely;pk;Gin+D!v;B-W8yIeBzn zGF5`~)bf}H=8JcLbejkosog-%rUczd zgk}V3Xszd+66k@C%8A-nGK}VJ`Z}j>L|&DyGxjXqe_;_mB)cD~Xftt2Eqv7{*%or^cDQpfxlU_nsM_v36~FWD&j!~TH( z%aQQQHUL@zQYt~dee^wp{I3}v7#R}rgBqv^ebvr54Oa1N-ND=zIPkS&0h+H0OW1#X z3kB)LOL2RrbV~1T0q@iwBSR0swY^|ly~5GwiuAVqEh$d@)l=ui<`fU(z0_~quUE-k zoOlkLoSgs!yO@Eq+2i8G_K>`@mH+JZjXU#(U@=4P25&Lr;<m)RBr5zGax6JAI z+ijEW)77`zlGpOM53_#qZjKy3chM~6w%vnXSGJnkeY&xQx9l)zJMr=r;osJ!Y??A?IRUv;Fl*>~nTOVxJG)ODMNYxeZJEmW6m z=m_|#n^BOOlfEfyY9dM`n0oZY7)ogBG3%hy4uK-n&{d|~;C$>+(FFF9q%M;H?86k; zhi25wiN%Vk2Ou@S-D@3m1itL+h=$I-IAeYjOx_&AqkHW~H`L_YgAlO!A|jl)D5dK= zA4p$#ON3U93!R~9pPZoyqB!iAVuIO?UQ0xk+QWTWRu*PyCaA&!XB4N2JTdH7YyzB@ z%^c+TXsy`e6|%ZwK2f5@U8G2pTC&x@MUApf%HLvxlQe9{u4TiOHcMR!fzp#+EXmOP z)bN*v*=o6(Xw3uxONUXKCUW8*dt<95qDh4WE*H`gBuu7b)(#&9X!eV+{pgLec&l~! ziSC;u&W73>Dy!5;Q(1n4q+c4yiHkVRg)$qxX9lp;gBu1RL2Xzwm_0#F4CP_e3;!CL z;*^4=ZHyxrJ%PZ=+%;-X3^X@N+NnUV!52#jOcs+gbeyK&dyOfapjU6?ic?L!;tdMM zW&r;D1-SUu1zda!zNKoC0r)dEVklIU^kSu-j^BGdwVv+9fUuG#7$2P5d4CM$4b+II z!;UZ-N0>biO$=V5DV*^&T6KO``5?DIQ>+p0Jo8&+z^wcl&41^M8c9{UsdX-^lg2|Jkwo z-*7iJ&Oc%efaHb0K`sDNy}%{r-)qJFOUh+y=V^ z;J@!1z$*VrE?I#t{Xs7O5JCPa%=2&X^dD*JFLY^VYhvkaX=nRqddbYj^dE;Oa5Mjd ztna06+%I42OWiojBQj)&DwEmok`No<88d<)P$B2fZ%Z4dI;S$nB1|-~rNI|J%;>!1 z9WlDBdkNM&cJ0izLp)>u;Dip?S|4wQy1WU?oPxWaZ8s(?4^~ed-8v_kv7PQOvjJOc z*C7y|z~$70*rx}CC)gdlUiVmo*b4G~y6Y|BMphE7>UtlA5vj3>2W;H>pXRt0uT0uQGj zkk;@&)m{tuN~jiXZTWK>cxorR1kK;;6FfO*eSNsSdRj*6B^*m zMKte9Wwq=thub@@qmD~DuKbq&nSppJ$?bT)GqUORP!a-k8D~T5(g|W6`ifn9VEgy_ z!=_urFHqjgu~u)LmZqaGwchL6FqSWRBV_~OoDUy$*H5?UJ!Kly_=9|p#q^Hvzm$|K zR@juixp3*)Ec3RhEq}(Au2^hGVi3K$tiBd)l-92Q`TYmNpiUpBjVF0JmT@xs)eq6h zA-D9)+pl62>Xu%9`#jOJLuvvZ%K=$s#W2H=H}3ZgH$#-0ZUk8B%?+s7GpvB*7gdby(;vmSp3TajBvZ&X4} z<-PLRA6F^z+t)7@~#c};nk zrh`UP+Az^(>2&308@OQa^;~FKwI)38s|>ey;0L~o)DgpQP{R>YErx9g`HXv|kZ{CS#mJX@&WqzHbcUomja4BXgw;}CoRa(+ z{Y2U5R8oC5zGWHbDrt5-j)u>W`cjVU3D@eMzoo73zJu3uL})|nG&_QhB=*1bZ}lQA z#d-LOHc$(l6Aw#FYKLVxd1~F(7k%G+XtF(E173L=P}Tc!+jHS2o~kcxJ+7KJ+Ubg^ zqLBd=ZT0}GU20iLhik_oGwfB?_= z4kbE0Z25Rke5TG3d`Hyw=F^)J!}j#@`Y+5B(_;#JdN8k?Om$%HGtvVOTXdOjDo{OQm?u6EhYE+rdtzO%18iMnj5m#L2cuj^IpN=cJcFVd;w^!yd~Oxy?GeXnT9}~d z4_Cc(SW2AlBu0>uMy!<2!}-4X4p_?hAp3k`%C| z0td5N!r#dt{XGDqP_VPtzIr|}UYf53sO<-+L<+`o{#EO3POVSDZ6snNNJNg``7`63+k8dd5bXndO5T$RTw^jLpn)dNfnC8nX z&{etDcy+$IMd|SaYlM(*kya&>Z$W{hsDTHo{C)6xX7{0B6_T;2l9q>QBD z45{@2W|JmleS53A0}!sF4Ki;ZUYn+!F$rLxAZ-xU1+bJg%(6@?Ko#N;p3dWv_?-Qr+OdYx}y8YR-gJ;n-N(?hQ@3M_2u4A5%~PcER=Y$e42pZl+?FRoT1j>ZDjhm!Cpv%NtV z?4xt8?5(8BhW4;rV$jHXa@xq@91NTe;SUMgg=y5(@E-yq7mYYSuOuP=apI^#s1Nwm zNDcwOE1L#jVCa3QZGnM#p<*TSv=>Nz+H?N!;o4$ugY;anTS?VqTXBL;L#T0$9zPaX ze)g_W95tAxyu1K!TfWnuK5P{DvG)OTAErFE?c-uKAGoZZ$Z4YvtLnGta4Ft=-?R*v zV9#m?A+1BO%CJrx1ab}9q1=snd}y}{q+b=L-MnT8=V*@)d*!)Dse*8mK&Z%J0Pb1f z01L=@e|m?VWAvBet;-`+4;l=w!9Q#T85C@%n5zqa75$A{! zZ6}2T@VCUl5i(r2prUIXG7x_dZ=HfXYawmrTTU1=?sCoFmAUgu1H*6+CIA@nYz zhIt)!hj$y|vh;!*7SFn{vGP$ZLugHvn;K{E46nvNEy!_hTw&BN$Z_e1!W3mJ{uEon zrltv$8}MMc0fL3FnQK8c1TM*g9v;F@50_Off@!9iCFR(md4ot^{r0=&4+XWNxGtWs zAje#`g!tSXI(Z7-VoRz%dW6lY9AJ%-w;?Zw?mH!Ku?1ByJ%Xu+&}_Tq_9qJ}C_!P( zETyyE2HaP&z>>0~g9l!Jyi}o3LPbdCwbz63h~#O>OK(%f5!)!`=cF4 zb4>O)M4G>~9y2Y;Lj^~Uug15bfac+e%J&lo25E$t3Tbjzq%nXY(>x&*K_3MYK}^ zF+4d(3{zWrlMXT1W3V@dHvbqcmUY@r#Ur&7CVfL$MNY@Lt#U9FYT3O!qghR^f`)QP zAWMn6qpQJOO>PRAQJb51{iDui0DODyiee&KZi>7D_v!4LO2?X4?(a4OWFG4VVN%c5 zX(+9HD(f7LRteUc(){Zy1LLPV2euhAbP}m5hM=Y=>T!{6eOoxA-+viTK54?fncw%P z6y|7iY3ZUPD80^JUUOqd$ih5l5c0G zL)Iv|O6mYbCG?G7dN+Y#;*7dI#nqTe>dbdIi#e{~TxyEcq{2L>P&S9m&L3pS&~j*N zC1hzl@-E{Wt(N>l2OqVl4-Q@jcZj+Y%Kn&r<44mZuD}nXX;@kN0YcR^dWE7%T*LGl zy7YjcL)JCAYVZg&W9o{f$u5$tDO>o*L6%Hk=GgwhN7xSCh2xt05+$%$v09`@Os~}-3T_n4ohmetr!lTINR4a<2XSk}$q-19#MnsXyD7L)1<^ zv{{55Lae@bcs)_<^QzUPVxKjr2J64ODA;@et}}Ys0kbAO9i)o^kkY@T05IM>f0DPSpj9zEN$&weossIt@_vhqC)_@c`;wI z{;5`3^Pkxb8}~nZoBtao$Hx9rzwMVx z^zWm@@lwAH=;&|Y>-SLtK%C2OMbg-SIFWx;P5xIMV*WKsz{~b0g30nSO8@w>{XR;j z?)Jb)nd@7d+L}9C=o|mmIe>Ki=Lrc+%)eJ~)18mP0}>LJD^q|9Zf=WBK14ohNq=*& zD!e#Y1IldGPL;}2XT!l@_9wM!i}uB8+`maw422_od34fT-470YY!IziQQvpH-8}E| zCh&xoZue$5nAm$jt@hB!aT(>-{rKG1wftm%%Xy_SWn&j?9GxxpO!%PXv>)Qs0Qd26 zb9?A%^?I4$;{&(O$NOU-C-etJU&E~*>%(2u#?TYg-1YZzX<%~pt-*!fArJ{e4MV%W z?WjT9DrJqikXmn#qpL;w{lk|5SgSb!_}2siZys*O0>jUf<=gy1e*&H{4!f~`FsCpIVA2>3mD=CN_D8&QpB zHl8&6chngf!fg#__tL!PAJg;n^fYbMn2ATfo2vu+l6siOusW-Gm3f6J=#Cf!qy0DPh2muOz_~f01fEsVL;^@_hT5i z%K11n&EmK^<}XXO+8il#u9YFjxOz$G4?&FOM-2B*VwBom7ls!nl%$ijh~~<8sEe%E z9NE11gld}=ksgE&Veo=l=!YZjvgf?)xyUos|OteM#igL$3#CcZnokW=*o~_TmuOk0?%XBB| z?ViQkZx^pOvpm1=%Peo>HJ~gIb&1#1XWrHh`VMz~q|x7;plR~0fT0Zy)#}-8$8-U{ za6Pz|=Ntoc@18L^6DSsFLywXYN!8mSeS05NR+*MAlzCIG{vPA*26uIo2*i|m6zu6{ zw=4c_RA@Qvbm%hVcXn`g+i(ZxamxL%?euk^E9@|gO))THUAgib5azvzYTl=P?@_O4 zxXflVEEJM7RsyJlY3voCPD|4;JxxCo6>1piNx^ie63g^nyU+Te@-gPv@>AsG!_OfV z$OrjIFF_TawJ;t;p$gZJ!otb2@|v-*UBn?66oKfMdl1qKxgH6_R$1ai^=EA#64)zx6=b&tNuN!p! zc=DJT++pf?f?0B4(;pq?{I%5)(A`G}i+^WU79efus%^~8Nkc%GbKng+YpNF#cFGXM?CJAclZKm>l_m%#PfY5rj&>T!=9$ERAj})(M@A=LdI9 zP7WhpDLVE;p^*rQMLz8{OMC%4(j?m|F~}(dnFsXSy7a9a97;ZjPn*Ob%FJvK7Cx_} z;@kVitjfiSUYWZ?8w?2-pGNXq61+p=Mgry+!S>&f;gMFyg;YdDg!&g{&!ogd&`{KeO(CEpwGswIXymtf#LU&P!yaFjI3whgK03Y;4!JD>R=c!%^?iSY*(``^&+>`NF| zNrrsHDari!Sz;plkt2JUa{wHvD_zD4Bj_Aw)`ZZ)Vi-e~BV zb5iIIYGNgx@eOqHLM=Tc1$qy4W}B?eJ~fcSA=%wurfRx#bcdU*-Zsb&cAkSCjdnWq zG<#w$HST362AYE}qy}y)FDC+b{M2yYU)|W&o>Vugty^U;Xk$LjfA1`M&mqdUORPeB zc4e;VzAr!nNBFe>%#Drn!sSuGY_(`RFuA|eH~_ESu!PZM6+ffgc?Kp1ffvO(7C``) zv;j)+0UKY-e%*BAHIsqEo_*8`*%>^&iDE3J9}oCcyW~b_RVW|s4C(hO!d;Jsaom&k zLZlvlA`W__lsi-pi^;%MLu|B+U~64TzJ~q1jn(Z6k4#8hH7V8)W-JY10{+n)Pa;3M zv!UhIzWaa*QDc$IfJndY=%RZ9a`N;Nc>G6uIe~W!u63t8NK>^xqQG@9-NS+K$w|B{ z<+ag|*&AZNg%v|gFV{(ldhP_OH*}-9-)%E^nAhzO_QxoH>`f2!)~331@SBN>e4GL)P~Up=ZA z0v47$l(6syV-e#iWzdK68Mua(DTDC%y};2fS)bJV`)X%L&rU%RC(=T-P}EpaFm*;c ziW9XFPz+lp@glTZRJGwgm&f~~v|kwnh-x@7f!VtMpPhR&uGmjaut5nZ}q26aV(H}Zn+oYpwWj-7)r5tQO?nDS5 zZ|}UOfCFVh6`@LRD?yA2muv=wFceH$W$>do1>RAoN#Rn>pay7m&~m7D(COW{f7u*V z73zXJW4zd$+O2KZ?qAH0j?^$$$1!Ci{j=H@D=64g#-4z{mHhN=O-Wo|qs%5B*Ws2V ztFT#3U6_+oD%lb;8zcw>C8Uo|4Lt~v#hMNTr2|9f-L(PkUzaIHA!F!tW!7xG`_~ru zA)=jTogGPmKIlR>wiJcdSK#e3#dqT>H#&D4NrRa5uTD&_FElq+s(@j$UMkO$ovNwD zyMy;r06Plhgs@pdP>gr?um2?5Ow1+OOl%DtOB!%2KntBg5jZmg#bp$yQ@AIYOTlY; z9fg|&Ka=~t%Hg^m<6uU;8fZg5d{C#P%+K+VBUzNNG#iz#vp%zh-t!|fiuWVyOp2l@SUia@%qtzY^@0`@H|7x(?;C`` zos^u445gh3Q6ZfPNua{F&a77Cl*>$UxVd!UpxOUYHZPq7+G}lY>a&(-NLn_4!vXfA z21U(;9`}~ZkTjdZ8e%0PvTD$72HKmny$Z#Ll|#sm)mo&@+`fzwmm~L;U!(<9hnTTe zhgh9RhZtFeK^}2~0jW|Pa04d%6&`}bCi!fv<`f^SI6B|8@Z%F($caPC$%*%T_`oCd zBO?kq1GsS%kwT2@LU#=8LK_N;gSZ-hkQKid78Cb^mJ_$;X~b%IgYQDTfp}dzp{O2p zfomr(F0(m~@BaormN?jaxn2C};VBI3GgySAULLH1)a}<&5Zto+a@Z3!NG@ROqk}vK zNPN=wGO!3@y|1wCyS7(Ucn7^NWE^xuIefgY8ERh1ln2CJgZR)fR__bgHc zspsbVbck6>-8Ko@ddbsn+56^Amc_$GSjIU|`%uCC_sTo&a=8pxcUPz%yBkH95jXDF zj+Mn5by=(P-h|#U*5$j2`>(wss?yR#$QXF{P|Lk%Ju2Sh)j!it^TydF4&V;rpX}+X zYDCAt?Bf=9-MvbyYR%y(>r-zA)-8bb{V;KG7melibpbDPLoa_9jW&PusV;fFz{@;P zIP5+Jx`u@!cEd*v5;)CZCc5TLzgh(VJ3)>JXVR6Kr!d#PgrF9HJD3`1fEvedapq2`Zk>2L&xBEQePWASb4g3jyR5|Fe zK&bOnF~iDZpE*;c&WH|c#kOHX=Ed(wNl;&@W5(g{Bp0i^DV_-*Ygp+F2EOFxB{Th^ zzimN=#>9>fXQUpK-xkj_jp10_7UxqFuHq*JMTfQEmiw~u(_A^$z0%^RaZn1hsoKm# zZK}T9wCEEa74OlD>Me@@z$^zeJ2ckNK8|~EXdxUq-ZP#M-OuM@)W15*d7{|p$~$*H zL|`4KPW8ckd!JMF>ZGFiu?=)-kf6vE>8n6c_T%f;Cn$A~QP_V;&;D6V^?yQ0_6NoI zAL!Yit#QJTF4P}={O#njY6-|3y(??mm-HO~GQBgg&Hw-=)J_r9?KzR4G# z>F-4CcYyWxzS%hcW8c{S1rPqO#_bn^{G)Gw^}w?Jfgt~F-%Q+N+eWzL4< z!B|=5%ubAuX!h`Qt)*JpO(otfn+6LASZ_=pjHt;_-=1wwH$5+CZgT`b>-K+MoEcd^ zv<+@Dj#xdL7dU#l3La{!?)kdC&R_S&JN?kRs<$_y&5&@*&->|YV$=O}p3zO9dtmq*d}wq33F*Y^ad58VQ~ z{LlMG>)Whwrsq=|WHJpZ=^a&0REQNv$=|)(+5>%D@n^mx&5zuh8Ll~6AOb8S$JK#vJYDv;|JBrtH>Zr zfX_njgp8m)@Ga=vnRpdP$}X{7Y>F%0Tw};<+jEd6Mp$zvac*H(1-aA)>T18+eYd72 zG?Fz&l< zvujTWegcj5rV+)|A6!?GkMuvF;TW|V=AyuZWjb%(5Xs>F~fe)4Y9!;M^1UD zhYoZIM3z1ZO0f6YtcRO#dNpk!ek?sE&a6DxD1J9haLhPaVFLt3lpyoNM#f(Sp)lau zIN}NuHW5$ra@PL!@rdHqY|L&79iqke`ptyk&7p<0O$1ZitG>mx z7G!4i-j)IIlzMdk@K*m>Q8tit_!*jpnN_fGkm+~uQvsluZ1xYBRjPAw=hV2a!gHQ} zhv=M%_FkgeBK1`PPQI2k#J%+7Q1|Q{sUc0D5;9ZV7l`Dhptka%m)tC!gM464K2qxv zaB6@J@M30F!I~Vz2B|%~Y9e>9L@6{_htK%YB#YnOF=@MdVnCWz3d)0`985)F^ED>w z>ZgF2lfC~58FGC6_`VtI5}sim3JY%8Zg@z+YhRAOvrn|3j0F4StY|hi2u;0>#t!2y z7WOh&)kgDVH+x6to1s5+x+V&^V~eKjx#YVrGispMhj$p=o&$tTMv__=G48M6NqreQb>)XUB|%YhSVv zE{=Yk4XUSaG|ah)#ptT##6mwSypC;rZXQ8a4Kxq}O1oo$F7d6|t|_lo*lN?v0%K`1 zAENo|7f0)>!p}>_KMB+VK9Tyc;r~DG-ZHL^CENc7f@~zf4i=n^yE_DTcbDMq9yGYS zBzTZOa0@QMAy{y?V8Pu3c{<6=opa{Qo%?*|e_!1fdv|xyRIS}o)%~sCS_@KKFAid? z7q7C|(1Q(F!G<)>VMEG*vJyLR;Jo*sI0$C|vHm+PcOxj2q{(tgDD9S6Ts6>DcG3bR zfpXyuio6V~Q~IZFY4+(-IvOxIP4({iI%26%ACXn37*QnlM+T8E{atTCovGNio>fy* z^&nxO2;D%IQbdad9H{Y%ka?q)oHQ5<3_bV6E|ENMgA|fy6!=W}P{AQ;Z-5*e!&5c= zVrPi;-F@hm>^13Fc`IoiIIAXnLvFV}VnFvE1fH%bP4gqJq|71wjA)=OY?xWpC@l=uha=jfPCS>IxA+xi7<9!tm^6`{5vC!J!wLRqQ{Buz)jVAih5;c#7rpQ4b$9>CHCa;_;l|nho|_w^*V=uNSDZ!v(vpOrx#{)2 zy91vKx~>-!RShN#Dsh)%`Xv7A_{+G^>{T zyt}P#W1q+8WEq;J&-TVaJbh+|M>|Vj9|yVyD9Bt0)!1jl25J#{QQq{s^hR5KHS0w& zzP2)kXK`$KBTN9O1SP1iyo~$U9ZTN`H@C|VljsY`55IwLw_wSaq=r9#Z{GR=ceNtj zX=P|0)1QfhEcM}s*hq25{ey=xTOfqUUur}O9ZI?WNx_gitonTHTAr<<7CaGEZ0$>7 z^dWSOC6Y$!WiV>*`2?Y`TXgu^*XLj(w`i?S<>sP%^1Q8;#@E=P-Ixrd(hYSh1fm5g zyKhj+jR$+IdigTNY&O;vblNdyC)2%yY06;mynDoNv&&|;_yT37h0sl?K3@mJrP8m0 z)es^;jGsM%Q_5cF@=A$0I>m=qm8?P&jJwzP2{I<$`M$}$5U|0uD5~F z)}G|JAB9Hi+5@8{-d%90#mq0hElJ3|i8l?7tS2SIti-}qKh#M8N6tn@mv}M^f(rM6 z7J;U)?8N`x7D$1WSK#i`j6=uk@(cS&GdTAal6(QNR2yGbdZwKoZB!4cYTM%@(_nV~ zF{uIsnzAlj?^X)pLf=kFC~Ehw7})zHY~zDd`K6ng-k9?zkN0eGlesk; zuXqhIDwJ^SH8te8ZJbJ8W};qSMB&ZCMP4P?AAZ+^@Ve#YkbtX(-`5V5R1iRpip&(G^o9APwaKLBYq5ujmy?cAgewX1t|hE}si~w1w5Ki@_+mjiTckd!b}xrgYFe>nBT6|(WK{ZuqMbJ+6SyHT zrX}$*hPE_cn0tOEjc5BvTz&@u56>ouNhzAd-5F$wbiD_fCM`fj6c(2PS&N9MfuGsx zb3h=CB;>(Z5J)iyu@epgDFb~742oZ?BrkA!qQBdXIf697Fp|q6mTqIh%FYDb+o)(% z>{1;MVK2H=Ts6|G*js{mw?z-u~rDG;rQh@-evAwB3rG8`mjn#DAP1A^s?qTPx0 za}n{9s(>^OvM4SiB~C0larFFWArDn2=tEg7q{!ttBqa}V*RhGT0Q_s{I_yUrJcuI{ zZO^3_dBv9?9?;fGN}l`y3j$q?h$wC?FEzsiLKJMu1tEUIf~-ptV?ySuNXVfygM)A1 zgFaBMlaS+MK`!y1L)=uO7kg@^LC$JUW;I~Gp z0n0bJree(-$m7ZmyU5%^k30(4PHN{r4-tt}^?P}_eX1Q&z zp06nO-|w0$lk>m#EjZ1h+mX3>(St^#q}8sz@8;zziWFRCus=kywnA8%VH1po_9MK8 zh(v#ejJg9wMfkxCJ>Y5OF7y|U7lBdfL`Le9WX0C6U~xEJbd|iXTr1vftF3uY%=IPE z=}lfQ#cnEgo=JF}DPhvPErz$;3?X4jmg9Q*(l)QYI_reTodm0sn8ei;@4g6?pSb{i zw%}G%@*f4SmD#+4orWg+)qvZl@LbPO(cTL-0@^Z}S5V%$_f$rMGQ~L3(t>hd60=?V zXN>T1b*p@lY@Nn-Ys9`)80}7E4XD`gW)>QuDQE{fnO|&RwRs%T?Gn~fz4wqJLOKI` zgBU!izeygbJNAlpA`>C`b&5h&cv9cMp+OgWQI`=_YZ{G+cB=l`^&GzbbC6#T(P1iu zA~C6KtpILnqRUr$-#WlLiOrB zhL?MJb`4jMDz;Ikv@aZ1OxLarHDPT7TVXfVZSsp?Y_;I@`n256Z%~TBS&P{W|Je0y9WymWJul0tUy80~#J&ovcRg{fY0)+zQasEk4_Gc3T4rd4;uUBTy4u8Z-9Dkxp{|{#U zmff*%kg)!j_ay5t=JoFdW&hxDKMgeYGIX&2lctP=`LC4uKVfpLzjz^V7XNr=fAPY9 zZ{NQ@v#ftUgnzy9{v#8A!{A>RACQ6e*Tu*B3kLuDi_Z;!t;R+!RwlpM;csc)9}NW1 z;UA&vzmE*Z#{E}x_y=8HX#j~(!N-5r-%?Iq*Q^_ZYRERb5_?BpTt=xoTJ$k8_9^jX^&=ewI6;(AY>$Ijag z7s6+b1K5n_9!&=)?|K|h-R2BYmvkM}`IB?M_7=gd?gt88pBjx`cJG883*I7^p*=-N zz5mWeU#5eNy>(V!WNVwHPk(xLJJfybq4Yg$XvbgRP3u;?I~o-bv<&Vv4hvyx)LieC zAiBy6B~Awqt>_H0GDe!7Cvm!nsF!ijw_=yXim-=R4PLb?8KxCTNZYU--iRJH0@I)1 z(M^K45o+gQ?BljgRf?{Voj%_=nmg@HB}NJuW{f7Q5;l0HM6cNw<|&kW*Pl^EyP2=L z92T8FxEj+RkBL=V;nMC;MO%dW3*V=kvkQlZ z=W3>HbnL&Fi?)+|i@GcfGOGL=i<_k+$nmKgcdx^YD(YJ%Ukw)dbcibK&>Aw&@nwA) z15OLy#F-HF!yZgnGwZ0l&}sZ@8h9LEgxYeLGx&N}M)yW;{^>p_oG-7}%NAVeQDtXq@1*V?%W! z4K+if@DRa-$3RI?x!6dU>a=JP32lt5^L!-_fK)LpWwCe|_G6QfKi}&lGiJpY&!c19 z(;~n6Q2pjG>gDMRoMGp8_+e)9Tx7CUR?ex>%P+*8Hi!3fh#sLm0(o=p+*57D_UIEQ zghw5_ks3Y>#+ORJbq#hkAxfxuZi3%XB89uz=+4H)f$O1E3SGiRjLjLSr#oNF9TEeD zLdn<%!yH2Yt@tJ+GIF(yCaM%Fcoh~4n!uw)2^@gB~Y-v(u#w<3U!f#^eXdvvQUoUVb6$VtSBm@U~bhBmyc~ z4wgj0-YgHsG;5+u4C;Lqt0Rx4msy@MCMAp#D>wiT1DgIVh+_NE$}I0yJgYKJ=Nr&8 z57nDu#h9=%pOJwVHZ}Nl7yTnEk*oqup=2g$T9HvH|$+x}OYj7xB zHvYI+o^cDJwsWCzv)#-wP z5_VGk`4riOW{<){ojjXw+T(IRaLA2LRy7q-$7bUC zW`(hOu2~V4EHbX15ZiBO`*x4iKh={i%8{`y5*(VDYqq1w?0i_Lzt$}$XmMS%|F%|h zJVKO2T@yT_Efr7iairzH#Ng@2z(FlKF(0o%?Ab-np@L+3&aw`5CH7>}j^oj9?)l?` z(5RK}Rr}NTJJTCx_PhHZ^RjCF(|5iwaNQ++WQTp% ztK7_KWaXr0cq}bu0D0g{v$0K3VW?oVu=Q{=zZ$<0tLsm7w-e@I7rd&{igGEPj~F>y ztDg(pN?0-2ea5e+(7YNNK$etE^v39=lgP)$(n(1V7lo8S_6m?CB_T{^#{6t8)V{rC zUu2vyp~YLBMslZxs9=tva{|7|F!#?l&4D{LpYVCvh|Et`-g+Gmw|bag{RkVCYiwiN zSnoS2cQ=QD%>H;i8qGDshy@B3gUbuFv3MVt$EG^|k?l$DqN9hzwG~#fcsNoe@aby9 zqZ3h6!iLbcVna}?a3E`39hi`9MAJAv@q`Cvb=j*?mq^pJ7dWEso387o*8(wOSGSXy z1<%ImJ5t4p(gL@~<_Je+!BDu$k;Np5*bL%o=u`v1_OUL{=OR~@7U~EMrBpGx)>Km3 zM&Ls&3&t{#1%pr>j%8``2r~=AX#$f;i+PEnTd2i{#ZS;zQxd-RvHgh zP>xqNL>U@ta!l=BmZD#jo=w%#PgK5E`r?DzQme@tDGecmqQLDfNK}qS!iA;=aAnNT znqhOv$)Gq`VYCv#)?*KoG7^_06#0yS3FB)0PgrP8r*JyE`ASTuV!D$kX-zScWF&rd z?sEJ110eV2%H;xxjKMqUjdBi$66uY@Z?tV(Rx26odD5a^H)1JcJn}K_mMEWsPxIvQ zXs@+_ueBq}ryRpWTvn~;+okF3VxO|)@k;J0D4(j|mH|7S;M+~CsfyP3=#6Z7oUi12 z?Y~HO=@!WTXpB0fGk3Msn8Wxz^$}6mNUEWZjOh4~H*=AEu4oYz)!s~m3M>3d)1Gh2 zB(7gxl<73i`Nu{9^3?5u9c<9`bt7MMVa!@m@d7kC*Jn^<3~Qisesu91^?iZbA-Wpp zXHXPSlxH25tMXA)%Ql&goAdLHU6olrzd~+H6(sU#E?lR%1z)w`{!{hyW(#uUqWd8u z@@5Re?ShOgE3f8GLItFBK9lR~8qF(dnk7i1Uv+cf85k`frHe2yFDf9nMpHuTAO(!+ zZ3dgt#@c0Ed60xZiXGCjK{8K=26nBKn>y7}L-H^I^LI^mEiH>E`&FN5UY^DwI`)GcECmLzUs#oC-bAVU4KNPYs2zra`ozS`7h*n~#>dp; zNMjGHLTKfHe9MF^Jc>O9%*yZ7Te>G_-%uaSmbf#`i@aGF)d8*Lq(s2fyJ}L3C@tYa zsE?!3u{@Tr+D-UbYaAZVw29fqQ0(rrofOJJ!aW3dxBK% z;STONAjueZfGE=asNbyCEKP~LyE z3#R#Mwg?hCI$r>ZeR{BiHGZRMN!IhVqaubGZfQ}1q~zF!3_WGchD;8+W1JJl4@{3L zTC}!$4{~UabJX$g_`&nK_NyQo+N-sT*I}w#7HH`=li=0w!WjPDs*F2h0hxE*OD{?% zEgbq<)D^N92dena%XPz@#5M6V0gy)EBU)ZVdKj0OAEVL96TD7AmZ+{XkegYPQ$`(;oCx?)}#mI7E_WGt6`vH$6&*Xb3hA!Pd`+V z7t&J0fFc-0wc%LjmMTFMg)OH{*IZSc>R7@F$AW1u4rxg7BW(fD9)W<1aqpD4#WTs`?h?E{FM6)IF5 zAR%#8`HVNkSCeqW6h$Xs&Z+BZ-9b7Byz-N~_v1*BRGjE)*>ggkUX$Nmo2`AHKcSq+bR+7>?d{uX$S1W+J&5yN z*^M7_3;A)I)H5Is?%b65>}`yZM7EKJO+Cu5A5-m+o9}uE=g;)T_APLW%&XY?=#Hea zHj5sQq+Xjx+13x=H0IAgyBZ(&v9ApY_Z&AzPPs2LN5*pWs13o}-pXKrhV@mi4FNUQ z&Wot8PTRht&6&1^!1$Gpq^{Nb-3Gop{?VV*uxjIELGc}pX_lm^gYP_=irHT8ULM1* zX-8e*UT%G3dF0*XlOnq}!n*!}9Y5e);Tb#rB`o}_AL0KISol9?U*KT=>u>*$c+D?Z z_>08-BsT!B`6)*GEkXOYB+k;o+11ScHzG7NGXLp)`qT6DpPm@B={G zA5HrAppBLN&!A0jF?Ol%ZyLS#^Vjwypxn}&B+vi?cXbdH68g@M*J>R1D%0vqZ|A2! zrvjWUoyYd7kTI-mQqTS$n2p1`77K{=_WkB|T@Y=iX=FVI`L+(f#mn}{-ICA*CC%{h z^rS&h?=i;0)>~k~X!U%N{|BFqb0k=yhh-S<$KzJm(CKrzJ50w?YbSukZ#35;+A9cRgbvURZjX( z9+n#$r-X4{H~tus{Z>9%OfLA^_OJDKyr^109jh%r{&M&6aL)VYhdf_w|H?;` z`pb+s0bi>f(snL-0+(W!TGKKv$qe3XNIzfdo!+DC?L{R*+Cgg4;*;n5ldDWGp9fK; z)Q79#``%ovU0Ju+843sjI7?{c=>k10D6n12koUP9T&*HaFzS0KNDLu4v0WX4ZI%9# z{8_o=6I43TtBrCN!eEE~L2P)ritcxww#Y=TW_9u_fjfT_md&D`!H522S&h+lcE4n0 z2WvOxr)6~%;k~w6K>*9D9&C|`|6J9|8XEF0H>fd1@8w&QNYrh@hU84P5C%$nNLcc6 z%}HZZVmaEdlv6EqrdBA;hI!yedk(K964*qK;osmUv{ow!Wd8(pO&|K332yg$R2@t0 zFp9}2FS-xzLf9}Q3JFYjLN`9HLMX6RLD);lP&y7cwNETtdA>{N!7{^MhVZd%AML)0 zyCHd}ghm9Nq>aPS_?49axkrElyT%tx-?|g1P3yW*6})S1I>;eE`mDO;C-2~S*yt8~ zJ?r*(QJ!Mcvm0L~vjx`*1NTH(6W&{`Br?f**t?)~l++D&V+NuU>X%vlI?i-SxL>Mp z`>;!_7m<<{HIRWx4)*2TxiLM|`m3sE;9QOmZxJF_zeq0WLfySUVuj(}Yy=c09Fw@X z&~sX^6TqJmqtP=>)dETKR|3Re9Y>n=5~P|b<&X}2Y=54b=CV#7){>xA@8QBKf|qJR zK9PmV?$LL2oDvtQeghI31VkP_YSCSiP%?jiVu7Z<1>XJQpi+I*h8^p{K5A$x0(<(* z0_okSTI@)~m%#HD7cH^d#z`v+60v;JxoaH~F~`qWkk@fC2R@j1i|8{SxTGH5m)B)f z`z#eK56cMIX4o{unAD9*_c;mFIP&PXKZPZ7&1vfB#}2SFf4s*sgs>J z;HdIt3Ad#KM*!wt3aIv1b=n&g#1Lwr%8)p8Y@guVH8NN%0f1(K1G?w^w(>Vf*7L{V zw#Zls;>4M50fr^nID2CWJVwT(`G^6pRxDBid$E~seY4_D48A)Fl)z~*Aqg%G3-is< ziQ(UnY|Iq%Uv={$2zJ8poHrpfdS2i&;d>v~FR$D(yrS-$q(^;dc|~qJDiUbwOhR0g z+ghc2@}2+e^dQ;QT_${XScRwV-JG|u+#&$6urDst z#}^KWE%0@G@&&Dk;oCDlwmH~kR8@_ZkG-h#y3fiHjQqiVud@>id9A8FRt_V9gZUYg z@mmv+LUwzh<1Nc@--+z1*%gpN_VCQ$ZI0mfz|3?>2yHrhwRq;Wdj-RhCJb3x^st-K zcyt`a7|A6W--un)0mGo)fra+=7TpUd-KQy5?f}Ia8(8j55EJ=ORKY8_;t-nWV@kcN z89%(S{3hs=Gy*+xMdmMzB@xGPxDaS<*}iX7%^c6nSFKI7gsofETGXKZ3XO=7YS|$_ zh%AXnkfl4KH{xCIa+aSv*A9V7d|wJ`y0j$1=*Ypob^sDVdi7V)`VD$jGudZF`iy1T z**i_55_Pq4JA+w6Fj=LMm(H(Q>Q@XqRoaeaFT>6(&)~1wS_~^095Z%oC91tPKZBRv z81XGJHhP6lds`1ia`}Xn0V!B}zBnlG^4`E7d$vlt9qLFje5LTaes)B3>k8`*!y=&? z@N_D;H(+CAu%N7wnJ&~s0TOU`B{(3YOBmq~1|+moQBV}&N=)c# zQ^>)+GpKe8t-ub*mwADrZJ?RTyw=B@wI|Gv9;-B^Y zarM*sfv-AKY>-&nbA6@DK$LzHr?kCZE!emdeN`p^_O2YLw2@Hm?9MHzV*cy^Dhy!p z+b51j2_lY;ZW>R(Vq>2r1%AF_ZIVG@37iS9lM(;dd(l67nN6}SvK(0AOL+PTZ%ukS zN3D>!J5240%igNiOk@k5rI?6u0O zY1Y;ro5KhAHv>DBjV)}Fe2dG7EXV>~ZGZx=}8Ei32jC}~Lk_Q2a2u6VFoD^vSNHUzJT z@+`}dhL0aH`VFS`XGZsDVwV=)o;r=qDB#@}DXuKM)%Te%&$<|RJeAkwD+s!8a1S>! zcxglBb>3Q@HQ(8$%V+xSzTSNxUU6~ZE#Y^C26qzY2G~xGTi)YsAYm2HAx)+o;O^Rm zd$cPz+PpHl?b;lf6q8e%Rao15NmumgA%aDr+{3x6>9hZKAjHK zv{50dMp5J5OB0qlSTf|Itp(<13N`emr*t^oe?z%Hs{^A5Lq3y*C+Ys)=)~;J zQwO6MDSMDo?^nLDcphosPqIh;Uu(sr z&$|+T6&EKcD~mBh@!?`Y0to>GjU^6C_AjlL{X2m+q{^=`#OQ1pu@#l zBG(@T2@6YrWLQPi;*~pn&r_n&)doODKoJtFh!TV>7!Eh3{d{$MLxUCXsbxW2g{8)n z5e4ovO@%2tw&-~xedhKF^Rp3mC>~rw4IEQ;{@=ETL?az#RRUa(1Q?@P10&t(!d@u? zPie65hP9m|5h;=ASZcw!xumdIv?5wc%AKpl>I-R@@-b_b>8-Wx_xmmOP*NX!TLlg_{jir=wmKg*ov|Pc4HJYUMn0yAMj$WCU^^C-gsr z^qvUNjg@F+v%)MgvNJ?H{#IQM<%K|L{7+v*%7Cjv>zNq8RsiDWX>)9m(YKChlH3AJUT24&J=k{to?do6e6Sr$+Z`lf zBAJx5*l3`bY^kn1p`Gmbe4+9_=hP`q?zrDzF3Id}zBesp_kqm&HP_$;Fb0^tGJb;- zzuOi!mb7buaQ*oL7y?XRv2IS9-pzOZ2$Cbdy7^U!qJO$Tx%6eYTwI6e!(#ld_MPvG zw~u2d*Z!*WeU1MTt^JkU{2xJUKjFr|^^4_T`D;YI{{*eEaB}~h5&Z+n{Psru?--G} zl_wBZ4se|OCu#+RIQw6LMC^ad(+R|t`-e#!zY}$G{yFJ`%il4PnZ1#*t(oD^e4T#+ zS1f-FllGsJG#0ks5#%_5C~ho3YSZ6v4@j}_GY(~=thQMX_RXpM zwgZ*g%ZKuA&5>$hl#+Iql~?&;dwBWn+{dY_qlywQtiGgrMa_5Co7 zZ?*nt_?1Y8;$`SdTY-9L$~16Ub#gMiR_<1uWp2+wt>9X~;n|T4KSSt9OXy42aXzk3 zjXN9W$1aRUpFUj0x;KPzE@C?tSLzPZY;u3XYku8K(ShLU+r^+}yYF(wD3AVrZ|qd8 zwbYiPM}^Qvsb1@oe-Eayz^8+SgXwFYo$_h;T2r!NT^dMZ-*)19rJ6PR`KYetbbpUe za_8;4;ZbzQ!FwTozoix`Ed(QYi!d50x@fN++@r5gm!7k7Y}LP6KKO`&oLrMcppW2r zs>P7}~7c>U+0C$ZG0b!M!=9=-=WS zqfru<_@useN zB?kqFZW-Pp6mtRF2QSEMUugZF?%=EL;T^6RlA$hR264z7hlBdFK(N=jMI6 z$OZ{}78O&kWf>?b3*8$4Vzs_(kkLn~y|u4-jdYB7Pv=;P-)qT~*=yfLLu$nElZ>RB zC`X@paz_-tvJ4DQ9RgyYoRHJSdx`0=DpSK_Ko`FS2@zzP=0P!1i!*}*tTls4CTdLc z;-3N%H8yYnHU@OrTTqva#H%v2X3UzGfDa`L*uAJh+{Myo&^#z&CfJMCw2djX!81WapPg#pO-VB1XtktS1Mtk3t_#@@^SrO}kePcfIyzUWUemwAJ*(aIIu zpbVjh7xoqcJ(RAOW)w3xmct;SMVBNZSs=5vBBw#uV@Z{dhh3gEhid~+bHQt2^E zcCmz9WRKPHQB9?7hgH+VKA~w~%2DTPV#tZw;%n}#VGz6F=Gmx6A$WUni%+*S7r3W$ zxPQBG|PurwwXK>FZ5aLRq?(->_&^qQ7&wwMJB{8!@*v%eDEmn>ftb?d|x3?j!xl66@vaf?(@F2(%O@Ka%z9N8fsyk^+w` zHqGT1@>B+(COBvUWgwzTbf)3iA0HQ@8Z4bQZpFy)K^_88RXJdtyp;e)*mRR)&H!mq#083&(VDU&=I^W+B52m&(4TqFQ;JwxhDf-E$#$95Yd3(Jx>6N6FB? zKH7dW0RjKr<@vsUBj>3vN+(`EXu})#xBq3 zv1&g=$?sIbj)~xqRhSnfJk_^_XO08OJ`RR5h5{}*wtL157QQ;+B+LbGTsTpY!P5sx zPt{R`MX^M+CKZWFp0_7nB!$p&$}`_-FQ0B%6a$s|C|hh)IeLatNzYh>^epq=qR89A zI&Gbj%@y$%M6?y~cD!m)*}=b2tU)76qrHMwszoD8#XBHFL&7J@=EJ3iigBPPDQm9| zc-dKN+$R8qx5wWllXbkdfbcQ*xh4C{D4#dRh}F$zgKVJ#6Si`pW}E5UvMcN4soQHt zZfc&5`e49A$}U)f{v1?KPRcK?DF&NMNy=Y2D;cr|?W-34a?p7N3QsZwWJ3$1WETuo z%PB&wOHEl~*VD||EA~KY_Or_x--~7FbuqOaiKVH!Yliwh$)?)hKs@ttI!8HZI^$_M=1Z;vy+%DuVVU0Y8kMKxD`Sn|Ee&>n1|X-A(V!Cn!6GZn>5wU3c*Z& zL0CV{U2CQgfqPHIb5=~h881H3;w|YG_%KyX#U{L9TPF!}iJQg!VJkIBYPw-bdQau6 zmx^2k2?brIS5L-lA=DO&tu<{B4pONsU-&B7jvLK)!4J)KK{bqrxfQZ}^!pR2kwUkGF-5HwT~$KBRaaq}(gf$u}Ya!m|yoGX7O)Sq1Kj zjN#>;r}ku;x8%%4_D#=|7H%%QWebyHvr`B)r+CXfvbIZ}zCW3j9Fw|36Egh!m*`f3 zQPe(|5+>7XBYc#BcU12WAxs87Q@|&+<7hV*^MJ1y?jDtn7se5GQC(WHUtC0T61I?R zf>1Zg#L{*;R=NtSopQLwh&ya+#F0$4ddoRAmW+P{wE6i!@?^XWdPS&)s!d<&su+t} zV6Uh)G46z1<5XENOx*`Fs8jNRMB@xh)Q#r@TeVHbpQR2^>Rw4G8vzl=({ZQhv6*Ab zPa1d3y*0*eL#&o430puQgP|b~r_}ClY5K)5K3rn?F}7#8!ZI4%=iv>T`QM%b(`VN5=lN-`yKU~ied&OqIbl}S;+r9(k zyMo(&g;fkx%6G=aj&NIlmMPi$Q=d^ z%sOf;4G}p7`1Wbq!#?5&Ti-kz7g$dVsXFtDwaiIM9E6%MqX|6AFeRK?C4Vw^n$Es~ z-g~XZSKQIRV06oOjQaVw+WkwhG+2Yf3c*4isj5uc;)%|ooN68Llr=$XjhZl{>%v;c zNrqA6w&eP({HB@C>V=G+Lg@f*wkaHIoK#dGyQC zK!QY5K~OKgOKnxE%J2nCrva<7G7PQ|JOYg^8jbZr^Wq+hp{gg;RL5TvTs)_Cb2T^qaGv zgBl9*je#M+nwR#yKx)*xI7sns@f%<~NRN#KHY~@LSuR+hEXq;@-1Q1v)lhuPJS@Hd zWz{^0?Vsd*0mF-8-o=5_&TZK*s)6Uuxwzc?vv`54#8(e{hccC840OC*WNPBTOfIkW zd|rO)Q{FB%H(*o8H8|`nGFFG>8%QWB_5>L!GPbV)X7m);H6L1ccR5)K>0mlHUju~~ z4=}xHdql0yqfQ(aQEbDRzqu3tZXdn0dR7fLcX2qB!wf>nMklAb76qKmZc@x3276 zlhHyIJ$|r+ANLW|THok(@OnLMY9A(MeU#X|V;#d;*}C&+G8nqF@#Pn$S;N{S#WA%#uZtpos z*LM5%_Wetyce94`(u%e}iYreyXrg#(HB!I1Ja9b9LUQ^#aXeTeBzT+dL5ED=8r&Xcu z_V3yq6i{qu3Ex2<_F95!?v8Rx+WBZp9iW1MWpU{->JU(TrYuM}6?eB=Ro0H?sJ8k| zK-sqvzMx9?y%gBfwN!yJ782<&R6ZEbnyiqSTs9v%_U!eQyt~nHA8e)DXgX4vyww zn_T=thI>EG*9z-n4#f6WkNhix(RJzC(uI51CZB~qBt?pI|WK9#RJo? z2Js1LV}zmuBxIF2d^5nyQL7)TV8A>H859F+7Y9Aj^`tNjockA2GQGLTXrK3{n_EHs z8c*sc!e~;l=E{X71n^DSDZ9^{T^ttFzTV z@xK2Z=T#P#Un~;9jwGzi04n{>B7s!2zYgMm!~1?8DqDA3fZH0GSepHb`f;%Q@5nT{ z{-($TGL-y0dcO?gX8$cW{Qq;v{&*T$*#CrX|1F6GRF;1xk$=i?G5Y`m3*Fj$!xItU z6Yz`=lndqbNDR`}tkG&?tDT@ttxAO($vy)7YWY>eY*SE8TyBr^)@IQVZdrJIO|x8@ zeZF6uKWw;o^=y!Zby%jw1%>`S|xuar9CUg;y`T2};%H;?K6vb~`uowOBd6F$?IUyUsT*3CE$M(7alG z_icEKOn^wAxzm-KD(o7*FyF>*p*x@x+I3;Q2%ZRP;9tn>n=gH@}8B5E0%(vY@x~od3VDBObbY9*>s=d*dpePx8lIAYxJ6hJ zX7tSQ5^i(HI*nhD0BPAwA&qZiu4F@X5cj7E2EsgE=YcdcR;19zQC&iTnf?zEQ%3vc zQ*V$M+VKns7k2k}_Q>6+wT`3srcXYW&;>KXw`!%y8OzsgVWl43sMrEe1oc2Cej;E< zggnj4Z<&th74WXf#Wy?D*hPMY+ezZGKg=KIp5M>&=JW+@RFlsQoM$O|QG26%T8Gcg z#ffBLndWDTLLWRbKkDPp;@N)iWzP1lYz(a zx=Z?X@%1@TSjVc`YM!7KKAzvq{zJtw{{HjX>dWeTPW#5J7lsvY?|d9=2>BQh2|nMI zAs=clr}pAo<=EqAx>y;GaSY!%$}W1<1A?uCGj}!t&HjPylzp}p&Wx}TmpB)DVSVlA zG*p}AGGZ>i^iJ^ai04dB2$R*3S=XwG;D?7ab)YI(d3y^Hb!RkUw z*mriONnbBo=1NRVqEUKQaR+-WTVCokEN9lr3gcjZ!A`CP3wvjPXu0?@TObu!(TaT(=9cY-=p!+ zdrYMAvE_O5dy{7AhuhShJ5bmxjT=J=xIc4Cp_RFKi#?cwm2j@(CGeEVdOxnKcCy8C zQ$n+;Iv8?aG%6C;y4pqJ%an&FF;`Sqy}R1EqM!fv7PL|~-c4U;Pv%vyUB>4K%+Z%Z zCpP1ClFonYBNl#hOIikIkcp2(#81YY0oez0bctw@Q3rDb;v2{ zL7BuC^$+}J9D#j3>KeMlaRg*()1bZyhAggt6ECb8P<~ny2Q;j+9zEKcgcccnFh{`h ztomY2uM*=kqZjG9UCpi*hqPt=U*_@-lU^eGD7=9ah01||=gB=h zugol~uYPG0C6e!?5m(Z)lZElR-2-{+NnY!s?=q55oyHrs!E-9ELYAtoLRy%FBv;Jf zPT!E+5i5$H>K2HWacCkqFb10%7ZQyklJ@^`_m^>Tbm`VOjD`*bLgNGip@HD;9$bQZ za3{D0cZbF;xDz0_Bsjr>TX1)G0>SNHp1cdxr$hJd7_TArCLGUQLIGP&o?A}x;z&pnzNU#5h{OqlfRH#EH&6<)W z4G2o@{pf>sBq8W7ICYD3aPpdz7(oo|i9%(W6`a?@clM;$m&5itEzqjt5(~LFr`Noc z*pLLEWaVtZQz`x>Tmxrza)WJA?TgjGM?x7i9ggL&*lmiqqMsa=bD?)My%}ulzI0^^ zo@s4nLmEBv1ZEqj=4jQvM_)IWt(N$Z2y|)C7&PpbcN|aN7|YDpauuw-%egNxorOOo z9BdeqtoDOvt0VEu9A3Tm>##aJXPW=fyW=w4|MJ5j334~T0u*NOz~Qb6nXw^}LF`9_ z92GY$L9&j^b|Ac|M5gE3@$IUA8&(X<+nnRcSz!daio(5+d-XU^5Y&j+k9j7zP~u$F z%BbpjTf{dpyuhbpY#;;n_#F!bj_VgID!RCq+k1rvMdjV7%1vh<3x`P46=gV|NKC9H zA*-Yq%_=9LVJh5lhfAKFec?&y>=5e(ube+EIlcz*b~jE5XV&3k2{=}+7~vosFCw4J>t^GL0RCW zHUAOLMk5L@eSqcUIGj__NNTF3t2V9BSg!1r#D|*v(zxt-^%V`lyIOr9+m-;fPM>rS z_jT2`CaPXO;17)~38a^~00;~~tKj`otKi#n_T^h8MbD^eoNiDp6E5=AMFy|;mg8<0=giwL>dGcR?6OoW9!F+A*22a7uwn0eL1 zJ-#L-rFLf}l;b#44B3A34G0RkdVv@`Gxx5I#IIBpquspv6$vdZ3I?^Yv7nH;8jdEU zgeHs*teRkahp8_q!fzDgQKvT~HXzI)WO&wu0eck!+*}@VH?p4JK1V(fQwoPURR#liG>_`3OU_R(gNoxt9 zd`js9p_~Cuh5(j!283hgT!U+=Os~kkE5pc6y+Gb3_APOJJLjzGUUIYFzs=@cWD%Ig zR(W4^n8=Oaaz5S-kastVfAL| z#RGkX`?0TZKlYUg63sJLmB+rK^4M2^*~V$n@4m7d-7a0S2?(g6l{*GMh%c=0o<_~q z|Fj5-7(QY=ec*cM_1s-=8f9#v#Cq_ggJU&CO;|!=7S8SEbWo!YUB58<7R>4Q7jQzu zIP$wQaOLGcux%%*5#vL@!j-$#_-PNf%UKv$Exw5#wS*Q@&(bOAIfRH55B8#Ki&Mz5 zF0*1NgiXYY^ee_;B62URIY&NQ7}FYnBg3>n)B>h>e6M-Am-UNpDIgdYh?t>Y{mOuf z%M@#T6#H;o5~@IG0_CA!o$RD$W)NbkzVLi|W^7<3>&I{?V_>Bog!Gn$l`Zh6WQWsdYr!Cf3<73*ibeDSFu-;uP5_) zgfA}oM1eKrI$)y2w19C}u%cZ~QK!k0F2Qz@DZ!SnQkW&5M5djgyjt03tDFSdffRG) zWP>KAh2wiKl3d^*AHMP885vk<#E4JRSF$(9ad@Tqdcwa%9XZB6xy`GM)6jqQ_%*!ns{iR?%EQ_?8sFi@N~4IN~j{-HXQ@yq)A{Ld|rfziiSOW zwnGw%Gv*hyJTs+k^*Us3uB?J*%sY|g0u&f7hR7ZYjpTF8UTuk)v6iEVg>yMZG9|b`C!)%pXjjPxth${u07i&D16@&Tdwdn zsX2WDqxFR!)Q^{?)F&3|H>0Rffr5?bs;2?#tcqpd9D|9a$j6okL=ZKp zkx!OHDYNo&DtMTHdj#~DwLbysH>;=+jg(Kq>CsG-1axcQL#?c{FLj|(!1k?ABRePR zz(R)fWPA3mA2i10y4Hn1&LOYha^;Qh`@vopyfS>e=S>vjMer}tz`ru!{*R!6k2Jdf z84YCq&oJ#c82@m>_y^RDgXyy`355hGwjkeEcxV*3}3Xz4Bu!) z1&FB1l8(ufnvslybE?uj7b)I`$rTT)hlOXi*PD6*AN8WlE$C{Ay}T}u{7>(XFP9=b znI~VuhPlIkQj+?4-Y-CWe;+&txNhi6F$7x;XPVsEr1gI?5Z&)sJf6~RX*qk|0zik| zM|TGW4}5xO$i|AGPUHQR?qJe|Ya2=d{#t5qG2u@WnFx}$VB}on(%B{1rtyZhQo9lB zpGNI|sq7TnjowLyo)|zy&ay8y@H1X+jSWBdX6~90SmM9C zX$vAn+@=(#yxSq>aKTutrTBSFpQ1SJKU$oH9nl}kcjcl&uB#IIneXcObJYBGs-wYt zNUKk^01}}9-X)5cIN{UVtC|PP7JqNP+xyl&br+)9Zq<*87Q+_aMEvbr%>7A#V_d7i z(TZVLTOT{^t>x6o3T^5QfJu!^uW?yZ((l%qmQ5AZOjc@M`U}6?3;HnG={m)KIKgiO zU{V%K=jRji?W0cVR&jJG+TZ5F8GbQAT_^hml@o`EK-zn;^w1B>lQyA*;IL zo6ZS18{?a*c-^nF2tgAqTdzsmn~y^-Uv~;C1BVwr8r0({@d?)@5n591`41-1o9Z(( zT%NnY>MW-ZufiSlfT@MQrbM+h!cmKXjlHQPEZ45#=(q z$`br09@kB;R^85YzM0x<2yfly!}kUJTvOdkhb-^@5`ooZrze}=@o>M?4E*Efk2o1Oigo=CkcA_FG~k&km-{f z0khbpnVPj%qzCqo>P%OOlW^&25nCwgQji&w4yyV^>oZIEM(C zwu?0-0)75B2?vI-jGczyEI2$u3^Of4!#O2l_J>CuoyB=tfYuVLEMZ+v zpUzH2n2lvD>=h{n{cMO0R}LtiWsnY-Hi9H#V=BN_ z_6>g&c{3m@di(=MG-(7d=p8Z(+a|{h<)kn~ew`A8dkZA=aAZiY?<53kO&_ECWZO96 zJ%p*1axtzPG2;lMwF&9D~*_SO7 zF0U0e#ISdadfG3+89{2;r8IDS2^ZH`k_1|)whrrwVad;I717J?PA;UfT=_1*o9yW` zX~p}gbf$M2JkfnmTYvC!p=JGKZuE{OU^VsdA^%2q=ib4SSNx)!t6B9TQ^rGQA@l1E z^Fk)uvByFt{wB)yy$q9A#GwFzOWEOYgI5MH^GF7Ym+8Cri$-p3tWcM+yQL2g6ub9R zDZI9&QIt{3DMdSKIRhqGP1#wWEuV;yA5#0@qey22yMi2Es8s?PWxQ1W zY#N+6UhV&OcSbP5&B;ZQk3eF`NhLqymu+4~Noca0qO)jz#@3Hj8G4NrfAwXDZxFm5 zc8FyUl({{8h&S1Jw=0UJ;>b8do!SFiFyn%Cbhye~PoDaTs5q15HmG$&ufl&<4}HZY zNmhFR5hh3fQzJ}3CKfR)p@sS-s5P9saG4Y)0kWh&C=Qb4hf4kgW24igr(h^BHDUw2 zX{<`IIItZT1-(I1I9X2m02Pq3t5X50r#d7|=~<&85p5wMgTa;g<}Vc|K3ysv@Nzr= zE1e&*e+=n!mIur{c!c28F%{DmouJXP!m<+M0k86A(zU{^C)%gU)-jx~L!$A;pG0a# zfqK_fm@w)KtO>acZ=Qy;o?q$eBy2SwsJK$XK2gVi`rHVcbY-S^_SM%oHBkwdUq$Q^ z2iuOG-me17fP?CMxI)`S#qeoF#b`~5Mo$YEk2>tU{sd?6Nl6JpT``ABvQb4smJ%M) z&t(VhFd_pVxRU3dHo23Np2*K%F~-;kF zGTkdp;SPbGdh_kxNmJZ#dB5gb(-qy$3FER|^l^TF%g#wL{qR)xn4@b}K44oaq@BU> zlgrU{|nR9-IVBl_eAtd$oz(&7Z1qa*V1{OribS_Qrq+_Mc6JMRfr zQz9dKj|akK(oF3-BzTuB^4E8^zi`Tt1Usw_MTFiq8RceM<}o28um&xQy+G+K)m1yt zi`La)m9q)l;^WY5=w z@miGvW22I~v;HC@Yw|GEsqqL*Q`RLpQQ=-)$-+#&r`cXBuhczgkYMw;K!TluAagV! z zEmwKHf@56ro;%pn?|xJpojz8azha5$z-5M-kVcRc0_Vaps?Msg_X|XA_N*;}HHa}I zmwt2qI_}GDbWvU+dmkR4WFdvW_Z*)f;x#8h<>9)&xd+A!8O=`pO0bw~Z@|aa; z1WYvlNWByncR4BF4*7;=8`(|8odai(4K!&=lUj(^`w+ zj!&c~f1HFGx6lO@w~$<^J1GK(doCzQ6jk_+y&3?N1{)9tRuUo z%Gyuczkkj}tbpkkW#VkWH2ULv)hEdia()WhcHeMPIHbWs(C1{WgQy_)UEtN!m&`X3 z_t&an!>=cXWxoX|6Nf!mNuKr2aeTg)DQbz|-MV&(RL+EYmMRORUN$N6SzH(cv*jyA zK9&L8=-r>x!D^Cc)xKL&XC-@El4m9TiI2slV&x-!miV_@duj7iW4jDAT23SNpR6SP zHgZl9LcBla>6#BFuHHL*z3wL}`|kFjMSiE@E})I1xo?hon11fGn(KB>&NY?(-HpxB zdF18{t7D>q{y7=F&1z`W+{Lv^Tg^jqO-nhnQg_9LWRz%YUQUGDq#|9CGi;tu<5iVF zH%BCe`H}Z6;buR{$9lQys5E9hle)Zdn4S0+f(eSGg-YfkDpJ}WlT>VesqruLA2%tQ zBXCf$wNrnxUY7VA#$X}E2Xq=M*3MJzNxEU!Zgkfg&et6*Z`tiK0?|l+dN?M<6^xIa z@S+mQLV28DpIpQ$;1WBEMPy-IqANR}y(0Y58l2Tv2%a|@2Ng4{LJFCI`jLs-sR7RX z*B=Gsxrfi+iSeZ@@q#AZ||VbCF+W?!~7sNC{5qNWF8tt$VGbNC8q6h zCq;o)O<}isY`v1J4$xv9P1TXuh&vnBa@9FJ;s=7FMmJ|G&@3LgvkJ3X1e3tuK(8&o z6u{F}oC>PU7f~Lt7DX6A7cC)ov`I>;3(;qe4RK;FSk5gxLNol^8T5%OEWDf)92B>6 zaK>xjJ*+@8=ZB^?c5s(mQ5FGl4P! zygCO{2q0vkJiej-avbo%{TOvzB;F}5s!cT6_L3Oe(f#pCVOMYD=2$k9P_(tRAsh`Z!DhaXRdtLcRC@LB`kV4 z)1G|5y*%@t(0TtaQ*xR9N^<%?0)aik5&sVe>>suN|M#d4JM(YDRRGob?_5)M761cd zW@7%cO4`4~z#iQl{sMyiBbM_2M`Y|kWRFq&V`P70ef)zGwPtV1I2c{~O$i zo%3H@GOmC7lG)lj{57)w3@47A_3wD*f8`Cc1G&t~tU;r`hADh|#2#j%Z z{FN9-1^{EfQ*`MQ4>8aYj`urF0;j3k76S zWSvSm>Pm|xG-sLpXx`uErvJ;G_Nsru`|#0W!kd17%zA&bvVJbxF`P-u>#BQU>E8B= z<9zyjel~mmr`4~Ap@!yh8_uBm<;<2_7c*k7tEulHBP}}Br2@Sv zTh_}+1tzK=uZ+vuQNRe!WhO`(%(OH!td1D0FDBt>1vrrpSq z*EY@t;Ea2>ci2%-9T@X=G4_>Dl>7#KjYpCsK zCx6bKY|gp{UH-c}KbrG}Y)3D3>qU-69u~R5z?H0Pz&01p@RaP0NE>OoQrfe)>FuAO zM&axR)}@gubiZbHp6Yj$!M|R-`9=q`M)YyHfAVe;@r#68oncVq1d087<>mXI`n_p} z5~44nK%COEh@2cbQ8}$k94xA7(nMtaN!nFlojrvNaozS}O*DL!#XCLn7pc>M*9yv{ z7U=HRQE`5@0_}4|^A~j)lU;PLdUU}#l!*Vu9N5;NbKL;V0%STo5 z8NC}^bupZtDa?g4?o;{-M?qw0Tgs0%1BUY?xmKO0#`%^akBWt<=2X;z)^OAx&D7Or z@N2H@p>}V3xs(E!!L{^MjgmiqYZbOjfcKAL4}!|aps7zM8}!|56|iCUAg)vCUpg#1 z`qE==QJan68_8cCOJe1zR{qk*^li1aQs)>e; z+FDO5*8rt|Nvc-R+Db;1?Rv=mFyMr1FLvv7lQNflVpI;A3f-)KHwtw zX!j>50iqEq(xV`oZW#_3Cpb=66#ZGK*Kq>cRa&o{Ojxn&#oA&5#JzF>aW728>Ly6u z;irldQ?g*W0E8!_0RgWL=@3XrLNL=ny)X0*#B{Xq%b)(uiSV~m;U9;Bak9Bdj-C}2 zlh8(>AY)I{3fI9@R1>1NYk}lh6XJ6MB^KA@r=J@OXbHK5ZtR4r`07XMuci%Db~)`k zZSzd!^2zmT4kX@nzvnjQGdX}l$kcEEFM!totPrr?=NEnZ?YDIxLItpejRdw1LgoW_ zBXWX5ao99l#^02Dz#z{tct!&W$)_}khzGC=ELe2n2y7V&%I*-se!`w^G13 z2n%QBO;?O>98Q3;Oxe@Wc_o}k!t6T)AviXo*Lf+4SMU$VMi{egIx7;=-LE_yl!>mB z?RCPa64Ts$4rr~KElGCHr9ZIrlOoJhPIHf|C=*oUe!P8^Zp1O?SrCieJ|I#Z-QF{D+*!!`cHHp)?W zq(9@``R`GfX!xP7zs*zOY}>?rfWe3{P$~m7JqiR7y z)#2gE9RbWuqp@KI5CD>hUlEtjb}GYNFCm=O!U734>zu@SSskQO!8l?TFy!f5dpf$g)Y zn2lki?edrBU0h$2`lyh=2|n89)`+?A=k`$I+B?xh!*@kxfisH+&Wu(xB}M&9UV!?t zus--1fa|jZxW4|)u0q7&E9dmg#KBZZYE@ytdSW=DuA9o z`$`bHRke`DyFdh_(Aqoy(I5&ec@jI@i2Zgee^;vqqaE@_9vgzLg#|%Z754@eSrW8$ zjsRo#xhKcA>|QBV2Tn1@bJ_^QH8ZyMbo7z;4H));-6|wG1mayXZHZ3V|E*?o3 zbLUc{?Q|*@7{U}wDI)EmT*7?|FL4U?gGQl`dju4&<{IDzdxPlF9?(^RWl;wZfJeZw z$E8}Opt$PG`?Dt=*>PkevcwL#&duBh@1v&_@!D(qWMHYAMDg7L{u$Z*bM3u+TeNuv8v_{ZdQ-W@ft5sN)8SGy`z%bs4#aPrOk%L!w{ay@ux)=$|6?*%+(deJ<#%0_PC@|;1*e< zpF^y+V7if-i)!k^M^7!ncjxGBRr~B|4oV*v@;7fq%hVNxN)F4)K?uwdAYA4gP^rExIA}es z%62VeTYSv&{l;ScajO_cVDL?7@aSz2X8;awd>Z#&aTYLbYq`M4w?NAL8qhUXt~g#% zbK(+F*X88o>4K+P1x3xgMCaeX!g0f9>qLkwqJC}|1R0gU1;?A61p(Av@UCPFNhH1w zqr@mf2*G0b`eAZ-te2n`q9+XnBQqR&uI=kwqxV5txc;h1XY64GkuG1Uq{1#2C>p9*!+IpU*H=4msy0mMyzY|oLmy`k5bmFSQPMLe?A z3-0Av_$I2gI70SnWm>v_6)#kDeH4A~0HJQ_#0V z9eCJGw3JnCf{QCQb7DDh6Rr+ybA8n}MO$7*KBs99&ZmR}o@)ew=Neexxh7j@R7Ax1 z%%pB5qr%>ZOm0|O`B&-+HRlu&b)okItX?@Z3wwMnr^<~*E07Hn`_7~exh$!0o1=qd znvbsq|FEtn`LXnM1?MIwXXzPmGX3sAZTf`xjMsy<^Xts${zU>G#3Pfu;4l-q7oT0+ zUc(ctWA8q%;Ow(0zF+P;@J6*O7D$^S?z+aaJ2$;N75IV2tM@O7U4I1w{*Rzq|8EZm z=KoBZC);m`h7&Mu_`84_+ap5rNMHIlfDizoG5RNF7t4Q!M8)=q(EJmq#r7Mb;pF%? z0(;N=m%y0+Dogmk0<|8gaDNNzzcNtSe{mdNtEPHr-);F&NhMwcS|FNEbYP;LEs*%~-mA8xs)ZoW3xR!i ziDS%%4_CM4sZp83wDE(Qabrg9YC=oXFSddM!LAU(Njz#j8oq`#!ShbU!irgTImLL=rpEZ(Z-uE_=v)5vk0_D zHO~1lXhvyr_$)jnKJ;Sj@W(=*VMSX$zc)$c5s%xjEqFjEueSfpF0Va{%IVB2EoLr% zcd#PXp4!i(SH}HRhaj9dwZLUCagA@LaF{)1fJvBdM%q>AMPJ7B$49z+yef0n&tu=imm`v( zdT@!r`vB&#Nm_5kn#u6;VGQjV^M2y;P<=lmaKjW)CPn~LzS;2D&8$EbCJnr&-qGEq zEhwS$*vrsd*SgW6O~snR2Fv-%-mqV+I9)4y&@T@CSLgL;YXxSKrxXb*x*FZ3$H|D; z+z&rd2vp=*98ei!tt7cpq2 zar+jr74X0iefD~Fm&}+0mDjq==rROD7K#p&=w=8?(knI88Sd_2q>6Qh28S^`B;J&>iwW!Pi=1gLM^ z13^y)ZAN%`U;Q;d9J(82Fsix)Gy-PA5+Tck6h;k5lQJPq)F{+ev=qVRB4ESxix6`# zcwJK#$~E_dWYd|rTq1B6Kbd7Bkh%FJHcaDvA0&jdn7CDxF{H6Rq>oAWXVmk}%$H5r zyVkSsMQFohz4Mu;gtEz<{q#0!&LRfXQyeuDoxJ?V7fI(xN(tEX9dKevk-iT5XpT1q z)FeExOGD{=TDRsdDgVaZNPPi@oGjHi9lu2!a}S74CC zsygm)Fs$;b*9pHSm7#}0fc|A?3@yF!Q?D<V6RHrkR!ZpIv#iOi}iqj!tp#x7d zt>8tYOSy$5f=WchvcYhT~ZCMzETgX``E!sTF6 zpiK)M1;zpkukzi#l2sY7QZpAi%CBn>KqdN_EMwXRMIlqEEQkb-EhxxlB*?{jT{s8H z5e6C+V4r(Eye=`A_7`s}6+{>=Ln9!r`a~Ck{Vc?y9;4ELaMvc#%6}_t&94q0Obm#B zh&feYA-R0dN?~d+?(XG@Ztryg+pkqP6!T7LffBQ%QR}rKs@yvS`}H$;yw7T^<=Jn- zCx@^?;E2*@Kxd|%Vw7yfDq!TnFqN2`9BP(+`RpDK2^B~Q49yj+Ai2P+It^^t5;ai} z8a?;7{8z7S8U>|KO{DU^zgNwZ+sl#o!j2acZ@3KcO^p*NqJg}i$Ne?Zj;ZP!PB+Se znc&$b0%QJ~`bNs#XT^dJs}0NK$&m43~5xRk2bFgT5NUkR84!w2IkW;$+eexzc5xp9Fp#$BVuamlf~{)zkS_chC63751)8 z@aP-WUE6^+qw5s$;u+E>fr=};!24xs+$*AD0Y=Q>A_3dRs8QlN-{Lc*!=$Y#;1Uo`cA)nzy_J- z-XQP#mp5A5$a~sWbY<>Z1}LY?EH~|mXU(3GexUyfJKpGpu&XWLx1}ur_c)!E5x0$% zE%|O-Yb)P|Cs7~R!PBfYkgNXuDfZ5hle=fPhY3s7;Y7ds`a@laN>wmR^{r?~$5BO4 zbmw`9g1RV6jcvaH!K>y2@ntPb%)&4$pIqvir)gnUaE_HS$F#!eoVarcFER@ZQkUze z#VVc<==K^k>JWCGGqypk7Sqz8ZgV!zgk+EFC~JZpjAlhtEFBX2Eyw4)_@YTGkLYSh zo)7GSz$N75BGU2e`%P!T(fMQuTctqYlfi2Z-ilBGC%_yj2PVoPQmSz z&qArTODv3xwyav#AepNR2y#f1gmUSNY#BzL=)5E|KCUNDTgR*vxb`>(Wt-z89T=*x z;dJeoC~d#SXalkgNDy#o5jvC=DShLxq>^HVo~Co$f|LmZvKEg?)$Pz=`Mxj&t!fxgoy<8Yx6_+j~A*xUa}k6~JxaK>ERlPE{CW@%n^xQk7}sCs$X}W7}p; ziBtNyot#$f1l*VFm~l(4=}J~alC`a~eIu9SMe)QH1$>~lS639npLi?8bc9@O$vrju z{DW^@)QA=nf>}272cj(Ek#yUY5`y(tT@#Q@F6{b%hTMG8N_Yy_C(O8G*4M#kTYA!( z@=exNPljLC6%UYdj1P`pZ9F+H<8AWXSdpf`)aVmtU9q5guJ0Y!C;aS2>pgrPiWNe_ ziBFa)5xPpBaKKq*(O0n6_$;Vc19*>ML0VV%6|DLdxLr>^aVh(HgW43nm+#Wsow6~Z ze*`Hfz0q?S?0qt{H+D#-)9d7XqT%k6f!o6;p^rT@y~;N+3+BJJs77F{H|QWhv`s*DmZY& zq!oiQ$Of@U!4&n&?rkR@;!|CblahOq&BLOJNu9>nu03IziQ~tJj*>fO4B95l>-IsBwv&EZWkvY=Hs+#M8_bTtwkU9LYR9C|3 z7FqtQ2H?r;u?8?e=PHp6Bvn8CU8-AsJf<+9|MEL@59R+UbUYjnWw@=}6Cb6O<+2;u zK=&tn2COF-ZXzcebEBk+xbllh3C>1pnnN@{T0OcKLU9@LJj{j zk&ER&lgkMBc>WbAc?59&-$2QuOX+X6l)`SME-A}CDz}pq{qa;|Auf_A2BZ= zvOg<`{Yxenkk0t%|L~^_LYDsw#fFH$@ShVcS^hJ5 zjcmUud4C2k9~pW79(ei4$onV6i;d+!LwsX>L{%Suw14~|f5WQ4CH$Y!%RibJ5Z9lZ z7!y$4znyr=@=wmHkHTxUe{)u~<~Sll2Yjgdhb0l#;rFKnVUR*jAKnx}YpHR>s~bnH z$xLaV@;Ic>#yWB>bnbq7zK4A0%(XJifpnA7%mt+)*Y&zRTUi3ERXbL^anE;H&yT0) z(|>Sx;nBC;-L2So*WIGH6PlJC$e-V`-*_8pbISxo{*7Q}`I3n1;%vK{UD>wH83GZ{vw zJI1Z+&5n-RqdUZpAr0^wo|pJIVts7579BBZ&iDZh06^DK{@j~aju`MhJsw7iiy|D| z$vz0qqz`E!C+u=!U+cRGjNTUFYT^UvPv;fxl2bfdFIV$W*oi0I;|BI)%B9cye(b4;A%0R>RU5r|Mk||?x@lEHn)P}OIZ}R+QQI1#l9=~$( z__r?rh0jvG@Wf1O&g)z0lo?UY5X#N<(X_KxoW<#|73wi&UCGeapgdz?e|lbwy^fb> z#m1|{AyjV59$W;^%5NVS(-2HD6+thhS58RJoW5X%$*h^h+6c8F{=u4hu|2Gg zs7_#L{}PSMK(hj+LL12!hT#nj)e~G#q-s*wD;R9<%lTzEQy|&Qf;bux5-t zgd=p+(G^U_8mxrnCrEE;`vKR7`c~#nthJa}hy0LEkxSUf?T>-o9SN46=u%KUm_$qP zZg}w1N$&hBEkqwfvZH{6_MwbQ0z$XYC-?(M2=t<`As!>aGB3YB9j&m0auJh%4AXk% z6B@LEf`rbm1}iNIlbimDn`KdOKgSJbz4IFT5%Mkb5_`dSrz&S zAuWB!Q`3DVOzSyZ5-ksU^#EbDND!g2q14;(n7+5zt*e!(1(wgagl_n5L417XQTp@Dp%K+t@dSoG zFCZF14yUFFk&nU1rlEq}#-;)nN`@{c#DlaXL*K|qA(ZDSx5-K!)6wR!5-{3i=BOJT z>%YSqq^fdB4b!je#T{C8p$-+jRi+^Qlz){FpZ~`N(Ta`jzSSfDqv|+}RmkwMIKB{-LNHf^xR8@01b-bAk~&x=`$XjzgF!6IovVsoY-?-NoI z^wyxKZ)7B3fQ7t_1ickdQmX>^QX?UwNH8Lk9|IowB4CWxH@%~<;8c(Gs@2@ZH=J&9 zWCjLk)T;$@@**0#(2%}*OK_XEC}gsc8Sy1*GYay~Yh)h7F6)DY2(4)V3;=j8^OZ5D zY~kw~KB;R`9WaN}0J8@0&tr$P?G}TvV9!Zad-zhN&|J;Lz6(Jh7+lGtxJD&76P0*4 z*JR)Ai&0qPuoR)5vK${&Vh>8Qy92S?Z#*GTFxe!yzstqnM(_-L?@yQ)hpsR;;r({f zV#SNrIeZ!RkaMm&QNSV5dJZ!~Acw$aLww z96dl`t**H!wd%i}sz0j_X1DR~yC=PoQ<~&<{_r%dZ#L11!cx;Yxe=quW(u_|c|CQf z!{Av<551Dp6ynatf{E9GpiW6K`LjCG5obl^77hoipG_-x_3M?0eYb|8ETB6|4xdP^ zAsnOE7dooyS3wB#6aHmkAT>{3QfJ(5II1SA;vwS1R1yYaaNjz0>{T6}($lo3=nA&E z4$v?I32$Vqh8aue>1|yy<-Rn2V`-wuoNF$o6@uqNUur13AKhLYChu7d zv7h!v5Yz_&6cCBj5U zHZB_SKB*(Lbw>%4WD=L8-43|jSp&DblLoUcy!S;K=;9o2r|}t`P|69h?t=Vblv6!H z*6cT09|+K(%8442;U7xyC>v1WVGC;j-89QHk`gM)27SW<$`E>cWT4+60{!lWt9gP0 zha|nBTBK#Rft$x;LYkUtKn_rHkL!4d+@SV3%<6y4YuT}p2?<$|GW?qrhnQM+F-8yE0Ce6ek?*JO{&=}N5b}=9HMZNoy z0#9%PDDhD(KV)yBm)1`a9dNl7 zd&ZA&w&xjAG<9PT$~_@w8)r^h!hVge{F&V^H3z<(dg8Th-fU&z;I|PUQ#*t*0x#B* z#p7HmV8xJ$cf$x}YiCCuL(T{`-ppyDVfL5+2bo8+%X*)DIMTR!1xO652G3)?G?=lx zB&oB$B+2IhVBe#2lK1Jl35RHF^C>0(Lvvq!zM^{exES|c3ZKX^Ybq+mLWPVBcgfh% z`QTX}=MMre;Xvk^+p={=X(e{CG!jpq{z&o`#a{i$JSj93eDYlOyFa}I0!!Fd6&JHnV2Gi=DB&2JrVgpb1}-lmJWRGb99# zMlTQzw^aVo|Hs{1M#ZtMTf=D5K#;~YxDyEO?gR<$?(XgcZ`^`IfM7vGa1Rh5cp$h2 zcX#`W?0xRt``k0m`;PmaU+)++RlR!ks;8<}uT?c`K6Boz6otg>h)YO{!WEHoWV&=0 z@1h!mf3()m`H6C~Sa8hw$*!|tbI$oK#IcsyV<>&Due%p8hc}9GD~E}1Q8WoQH4q18 zCYG;cRaE5d=<)SUcM;2lcM(-ybTa$ru+m~scHeVApH8R)S4%*mcBXlYLLQztlw?LI z^m#=Jirt#}QQ?4VB)DByn(W8Dl20+dx`Mb#R_zO(J>2FG>SSLzVKKqb#Sx$-;ZX(g zeyn?5R8XlpGoWJ_8Cd1TDDoBq9KcHkaE#;W7k*UGkmW%#!<#_DV$NJE;l5U1O>fD9 zy+`07Z@0dKp~rvH81K&W;~}3WMU$FK2?m9Cgz2|DyaxP(Z$#-Hc1s0K9J0LcSM>ZF z)cjK)j+1Ug884J~QI)#^c=UDS2mmWXD^v=;?r9Oa|A6~wc@A{llJn;rXX87lHhr5v zi3C*B);-)+vht%je(nXjit0psSuhW^Q?XW3KcO1PwZm0PGX-`1FqHP1>q$G42QzG!ca<1* zWTv~!%)>ab`%{LqXc*xdWmLzC+t%bI9yM+k$MT zX|`c!K`Ois!4>OJQ0LILa67XUox9c@a22)EFz&%gXVA7-nZZeuu(M{cEBh2y2rmd# z?%m&Vyhc0_uQ8U&o139=Tv6zy^VFHa1yX_NiJ;52i-9Vj`7y<@=YR*QP3z0SNk%7Ng9ddx z^S`UvGK%nA9T?P=5aMy%7;scL;YGWNO7;MCV!2Y0wHA0%_s0idY~pZeklv;6P4{>-!dzl`gj z@XWvFGXC%5Vtc~p{(!*%1+qV!2iSfCbpJ;f>`6B6Pdrnf<*(-w0K)zX1OIzc8XMQ& zNohKNBc<6T!Qn!?P3Z|zYmyKf^rFDn1aLi~2CHm~M3!zJ%%nvy)il4`7x+jfuEh5$ zlD}5-{Xot@jDP#=^xWD|irnz_N!MoBBcH}5ha`|``4h;rv}~AjWP=JGV0!epy3JvH zEaa`@Ct8)d@Zbc@P;Y!u5tianoIkYt-#<9DT&-`0Rkpjo&w0ERsy7cn^2o8FKo;b; zao~Pfxq4`tN8d_$r4xnFxpzgjTISQZZ;z#5pw6X%k>U}+wc=fk;7ZK&O=rp9>*^-I z9oPH%3`0w$#cGt_a)5U_Zz06t`s{io!&h*yHz!=sZE2|OFnh7RQlsON>s!}xc7^Ai zzx&lo=0|A%#T9GiUSGb7YcKo0t68-)+o*DQzXREuZInBlxuw^iZqQNp0Cq4TUA`m(gsB|-N@7zM`&$RLQh2{yXxE0*X8{m3^s^4}j1XQ!)=n)>&zBrJIAgrv zf+|GnFCMG9MnYe=44vL6g1lbqTHEA`*FYK1BTYZps4Xmnt%lML>3IXiu+F2l9*3H3QZI%Hx@^$wX zr&AdT&$ML3+-9GDrBoe4#T3N#`6evPpG>n-dTdIu;`0acXZ;~~TgH^Q7|6b8zBk7w za_cn3I-&DMZIszod`fJ%oS(uG*142D>#bQ1mNiymiBS_``DD_sK%_&GaC8D>fHB#J z$k^9X1QPn+AVTlQ2PNTF(NlcH4EphhCE*ya!VS&>G=kuFUDo7Mw~JAi-?U2q((Ft+ zd9j1B);KA*V%a~qfj6()?cB=6>e(;RbGSI{qGCkRU)+nXRYlEm((r(Z2i`&r!ZQ)e zt#za#x0lTz;e=1aOY~wPNaOC5m4s7{qBh5u1GcplZXhn1ZNXowjzL6(gGb~F&Wu5E zwJgkMsdY$Gv#AxXIIyc64BjCC_(%|z)}~%ly2-6IaY9Ko{Y`TF++)RsMu$nu=1-qt zzq{5a#$-(ml?8X#HR2Z34NKeoA{$&xgAg(_fP{hT8O8?CRK-~vBxKdJ0Il0SG7L@a zmJH@+TX;v4Fqkj6Y8D5}0WJPbWcVypbzcTeJep{^R5l0joO=j2KB3DYzHLaFY)m&( zqu7Iw7TanJ;S-k#(%GOWBZCJ>xR#d8p_=w&cvlV_cv=|#x|Nnp#WoT&!4SM08G<&+ zpn@&q&0aHF9f^y?4h{+l|D`LaUJBIIywW5Bm0XsCkblBE@ifBp*yAO4 z8`)Q%v^58N_siibKYCv078_s08oywwrOnm}?YuO5dAK{RwK3vs?TqTW==c8eQb`a+ z^K{-)dQ@e@dq6R`+-=hluJh2gjWh$|!#Y_txpfU zmujc&vWsK7k|8Py6p~u1C7;)a9-XN zsTI*$9)3p7{V!=8rxR@be2m`+&xYW_85*3NgZr7|EyL2?h`-S)dFrP0bPIjo?=r7) zw|m#5(YEgWsTMAln2Oy_v?E?Rb}8KTFgr`Byv}8}`4exNj5xkJ93dkSOeVq1)aL+{ z#lC2Gdq&g*)9=s}+C}>gRVJSJmlvX*1lZD zg0>AgGxvALLE3!g7+HjuF5Huxlru56@SF!vIntb&rCbdm7aWTj788;g>3b17UL1xF zNN$-XQLynf+^yb>$Pe8FF{=&Z+D-i|`Jz0{`JpJEdTrchdCTv+%}o_dYKc0CWJCm5 z7qTq{Yr8Y$26A+{Sl4LfJ>4tOG0f!Cw6RkzE_==OyML@tjepL)qP z0{*ei9oQMbKn^PFA!Fh$9>s7)fN2t-c2La0DBE#{QT3Hy&J&>4__+zcckX%SS21!6 zrT5^f*rH-$<*7MS)Q2=`_o7lYZKb7bU;Y=ogCk|-NZNp>;zAd|S_;PAE)j@b+`7pW zQq93=C?3gQswZ4EWieq=&Wu_dNZVHVfKfJ#fS`iK69_@fGEn_MK26>_f_38bexs-OqZu+Gl$`EQP7q9Gro*%*Ta z7z#eSn~{T%I7HqOVWStLA|a?oLqNF%C2)-RC2->rl{(KsrQhHK=|x0<^x437aU^si zRC3lLlGIh&YH#1C#}rDdT-i%4A4pLOMuTS~N>1 z(oR@<2-MiIQ0hLGMLu45dFv7C3Q&m3R{9}AG2Lx}2_&sXhej5>ySm*;m_&+8T4Uha zVk{yeqMfvuV#)HY;NJtHGQ{#t~?$RGuynB5x&I zHBCyXu@{G?vmb}fumx!5NrEc2K!$RXYv&VsLoO=7jgu7_98r8z4@!v~py{SDI`&$F z3YNi5YABke>sM*=Y*!*qAYlZcioO!1-vVJyY7xUB_dK23F)CPe^V~IRabN6eY;!6nPChr|8fu$lUfg8gDWbof)jA^_z5$`W){ob6-JuXQTcC zDJ9!OZ`KJxyJ|xjqM0&5m+rmFW%Nekd*2G5IR^tjVQL?^`S}t`dj@j2q1?b6psFH@ z`KhfzORXfD_H()&Zr6^W9oHwUutW`2O+LP<)}Q;z3*KTDrQVVZAK! zw>Fs2P%+kS^oYJ9PxVDP?jUu~udraWmU?*u#3lW5FGm%xtTw3ef*TkNB0N^&Zg9bN zxRChMMA%1&+z*Cbjbd?Ak8<^-xV2yQa|FN0-ynkv6Np76kNoL>LO!6DlTHVb}D2qb|BsG znXxN~#lWi!XgMtgq&*7mjEsp2#I|OA+KZ?dAdgZ~7UEE} zpo-#ft;fj7Eo+#_NHiTq@YnQ6;NjU?R$d;5P}vEUj7j%f`h+4m#R5%MiGsD)ItBL5 z2~sZh*eWXXz*or%ii>-I%L$8R;46aJX@R85SaywF8POiBO%3LZkP=W%vvbB-a3fv}WFlY$PC6_s~!seB#Ro-JlS;Hx5dS zVmTwNN$u@ovHlpKcf|;$`YGojsHl`lJS8z2l<=#92H^u1CGZ4+cBiNo3mACE7-;^n zswh~#5A~d~=i1WNI6z|$cpLo*OB(Zhd^VJsjD2;-(iUK(t>pV@&8>LJNdq6-iam{r zGBEdF>R_y7f?5hFq>yBSzT{F!y#Weaei!~cokc98MNmTG7#y+wgu_i4=%+`ZPCZGs zwONZy-i=873}Rz34E7wKr*X1r&@nMadYYyvE|8Nj7wFwEL+ff{f<{iqXF*z{if)lH zpS6FCZ4uN!y}*= zwvU*dijRs;MLHt?@1Md9=aFLDMR%RK1>FlurZE-JOFwP7kkMumd%2MM!XP`kD8Twe z8QN>}pkFS8^p|G_;*r$mNns%jhJ(LyAom7*I^xylKsusmN2?rs;Z0j1jPmuD!mnsY zk`{DgNWUBTdRS5NR<6CgMCdkCUqLzWTdSY)3e(l4|9!=({=bC9{wL|@{}EX1|187L z_MhPuvHY2>`B$YcmVcA3`40dJpsm^d7XS6t_tVm`co<7Vm$0@|Ff(7Z%{U?L@3H-r zhxPyCfc>dJ_E#fQ)_)^G_Ll?p4=nMYrTJO@%Jutqz!-qb{gX7mu5Bz~J@SKJyOAJH zpUW8!IvQr5?k^uZ>s&z+TO~}Xz`{pjni4Rj(wdjO?b1gM#+a2>bG8Dp$dSmk#k~zt z+eclutJ9%xehg!_KYwa53f|uU?wrJ5v5(r3ylZ*e#R*@!;btW|zyB|HPInt`?%of3 z*W)dZ1jO&=+*OttuQr(k^@efU?@x|;iMs%bn80!?`{tXN>MPiu$GfWafos7i;>x*K z2=+5SdKz`!h2gLly|JmkKkr7>&x_b}NcDK-+Id+=GV0rw>Ws`w$2hF-=X>O8ox(sg z>qCbFXMA3bo_g^t#e`^eF;PD8q8Oa{i;zt>3<~72>=Rn1N{<Em=3901oG6iTEE-drjifxOB+MHNnC~ffFPB}ztZBF=H`jFWN#s9`Q2)|>{+%xp z12*Q>O9K(woq+vkZ^|HmNlL$Ano*=DZw#6a7Nq}3fk#FIJG=fZBvu-i_8sikl~1qD z7j;eqUJtxi?#R9%f41_`+0C;7 z2u~y4?ZjH$J|s@the0D$lr!c9;pt`RFB72O1O1S|G1X=!U`XCBNgYA|FL`UcfwZOt`;$Z79xZw8yuOYNwifpz&Gbk>7 zot-rPeZu;PEQ&q?EzvVl=wbu}AxNAO#~&Olt>AwsR#^aytMs^KtxLD>fC#p@ycC59 z+7A_KPGb&0!-}-tg99NViX4`jAb3Ldx2_bjghNzwvX3fNqCYyoBRbH6s;^QaE<~&*P~z+bH%NpVDE|JzL$TO zg*~=u%*@gdGx$*;t4-YB36C+yT#Z@aqPmy6*VT^ga$*y?tLJ_{UGR`vb9dhH&9cg* zxADPcQ`@WTFTQ;o4I5NTL;MUb-QsRppZl?g7?%i6A)ACfORCf>UALj%WrCcTOsGQ7AT_x@u>@)PG-sN9A zN!QA3ULa3xc!>+gX7f(E$-U*QpYw6$ed(UUIV+&v*)fxNdE-4k+XBXNU!QoV^+}QoWeI5Px?CzqYO6ws*L{Qt^eg2h+pe%!k}T zPWwEZrp3kZ2#zhN&+bu*@&)hu$N5wiegvMnRGe=R_%^g)U!f^oyTDHQGzHS- z*lndNz!oFestp(#ymtT`~ zAVA^UqH$!s@$F|7+b*!KJPXV0SrQIh-sOkq5Z0`0G7X-gpZ%@HyWY-Vr!ejFR!c%W z&Zf3rImWK)<|6!<%y?hctWd>u*K`!wL<=4h)m2^{O=}+zUZ#pmbYzW9)6utmNs`qANSo6J^#jRi^Nl2ua+$$Jhlb)Wj5lj~j8p89k-Pa^w-=OikZ< z8JNNgw$PVc%&Ghc)Ob^j3U-wL!LqQZM5(&c$K}ls#$x89FF&b5SRoCtZ=C*d<>H7>@*6Hve$u z8nr_r_T;Ot@Ci0ZC=}TW_xng5Y#osh!{^6i@R1x2nMVY;!wCZ5DmDOA0)Tvh<ARBs~$bz1fqm#Y;ho zsvm#0(|4#k{+A{}bUY%Xx#YosFuBz5;;xM3=AZPNLis&F>}$IA3#htlGf12*&QWYW z4$m}dADamIQl$&9tF<4GcR%joMUm}Cav?-PEm~kIS#<~=BlFzlYH=l0=?&bE_2xk_ z{BkbPwE9}yXE8?fN=W-ulju3s@mcy0xD&yW)z|RzbB+e3hr3*_lZmGsQ(@XB zV_>rjmI=qMc)lG?I(b-g`}n>J`}D@Y_d<(*XCGrf!UDuke^p`$ zmAhS;n!M3?=m+!!;<=*a(C{l9sVyWn2~vr>u=Yd+>Yip*;X*uTlhB9$ikc(P9F!vYk+nl?X6ZQ{0`mCCBBh2D^mT zOn+q)vbkWC?(R{cGos;n7iU3B#@y>X5>w#6RcsV(+qUK<}o-INU1;52*h%GJ{pqyTUoE%O14r>falHks934s z<@^%)JyD>yR0F-Gxz|ga#AP5noD?H+Ieh~=P^zLN6vJFr@LjY7#~D6yRLQ;;EctqF zDoA@eGNMYmJhk||6bobB;5C@z)6X%G(5?ksl>ols^SPfP5l{?zU~ulw+mHyfZdQpL zc_mq3rse=_%&T9FYN$XWeIx@Y!L^NM;5@2wKDc$^iy&qFlmcZh`b#G zCha`d7>O^S#@1edZsfAsmy2gB_)>q-O8>?0UqD%ou*7Q!j=jDta97{f$LO!Q56N8B zzWr71>saf{eA&yt4>3Li2{!pM1Kt0k=Q!}?cFin~Y{&gRl36N_g+3vvzt*i0Vne-e zr^?b)n*p6*g)cL_Px(I5orcYaeeKgf+Nyac^c>cArMX#LSM|XqpJ;j2=J_(yak~+3 z?$WzeiT;P}OZw~gqN>vXDe+YhU8VTj&D!wNmO4U-5M<%}uc1|?RiwpqHXwW~j^Llv zr}$hlHtTOG>zD(ml!I+CHq~fsQK(ujgB}4hlScQxcISq6S$3HrT)Y7o!09dbNUXZ=S>2Xy= zLKSNUilwg@Uz`IDnWa=BzI?(WPLUmA1NuZp5LDV1nhS9JD%T%EQ)?aioxa{hTgdXGjL#HIWsT>^cY%=@ajFGNZDuv{8wsBM3^5F6Epl=2-|3 zd#gHw#)cmUvKAz0IV21UhwpyNFhOm157!z3&nrI^bbSjiPIqN#4$| zWGhI46n8|D$ElJm(<(_eIQJ$59xhs6Lr8-NLgy=#KT=et!uIS)S3vAI+`!87EQbrH>W&*B>BUO9`Clr)0v1E*4zm_n6x+?B>XPC6mp{xyzIpw zB1;TGQ)L5ukVxT>@qwuWEud?}@#BY6viuLELE~u3)b)lFY;4%1obGHf;wE@_42r~% z)JD@6RB|F~-FUUbSG^?X(_OKWAjVN` z%FQv}Qe!i2#=ZT=2d0(@|5afj_leC)g1dtvG+)Q|IR}QZe7{4IRmFQB0@zTWZ3$TL zu=_po3U|AIhxEE@25Qgk`7J)05}q4u;s6&fo83LZvW(NkDQhj{HYMu@^99?ZqDgcbN#--cH@%xA^5%1X?Em*F`3r9&(?- zgxPw)$NHJl7nq$1d&*fi4u_fP^Pg`Z_)i4IEhei}v!qT_U&SsL1$Myd=Ef`?IbUxZ zf}dJgdt2qBC^{!hPau9zSpUq5BeLHlKNW`~a>gLvg1@`G)0+58;L{5msDM_Fk!gcD z71l5WZS;v#@r_EZ+E4FPR?KSbbJqE*Ch-@E(PCeETjCVivX|U=%xN#>IL%H@zl$ph zwwDL)7I_m`I4Vvojf@HniH~{tX}@E~5x>8yd#0s>d44*FM(C%Pvoy)%#29&VZCk|i z4wC2RH>VRkKRrWVuSl`P7c8D6UaXOogB-; z_WF+`s=96%~D%acXw-#jW@o%Nj!Z5?bZ z?aY7sv;I?hEsLM>oPeF*X%ubcwv-0(**-x&YEcJBc*mIm1pWLQgW{$5HDWE=j zRXypxHODEK)o1i>3=8ez8aLeC)Q7d-9h@k%7_*ktb+v6OoIcnC&#W84z0*urn+k$@ zJ7N0%o>v!=?$_%}s2<*-9Amd8s86}3uk>~vNBw*l>)~2Vk>2|%3`<_c8LG9-Uu=f< zX0q{RRDEjTwCj}9#E8-r9Bkxy2Rq%RC%`}5f@NIz?1|SF1n}B;ab=+s1!K^7Jc6Ha z#FhN$x_oYJ8~h=^tI3kNy*BbK_t+f#Ex9rx4T9Ab9zvz=Ix|kj*t)P&oQyj1rv%DG zdZK`=GRLFF&KXJ@YvU?!TmVNL>Rr`+e&Jb=#m>dyAAsPg{#=ZZftji6+pD4%118E* zbB5gbm9oyW2GMEXVr!goK&%s8My{Oj-S>^`W|3 z6Yw0>oD4}6E`Ocq59q% z7ivZSs`obZ(O~d_|CfJ*&s}d9DzWuavo`ONd)3CvJY=6ZB3_^1m=kAz&CNK4xS)s; zqOFmJ){6t1!-Yv+_jd923{ZahKySO=a-=_<`qyXCax!ZorS&9Z1W4IA>H?VyPMHhn zzu0S%q#V&+yMBe}-y2Yhit<4zHKxNIt^Xi4>`YMlvi|x8j z_V*8$cwIIx+Rw7gmlm*l7?2jbZR_Ro^UD1hKvElRrd3ZQWdsU<9=4D z`#!sOl^<-h5vv zhL7ipH{O|L6TJs}KMr>_qszu-YN~H^NNkQ3c^ULyV^1&iZu~O1vGOgR$l;j&f!pra zN~rC?u`=vm@Fv<`mc^JEt(QpcaQiNFoRqG9`QY2_{dA9dM(SSwXq!?GN=DUN7WXIz zj;Tawt(*C3;F)WBqajj~d+L&owt@44!sN3I(feogoKU||9v3v#i=LUk8)vqwVIW$y zQJb$jgJG}WM~3z4Epb)ALBEqhy|W%n3(q*eVaIMcY}uu6P71DlbuCCA(O+9@QkfiTpUcG ztJo+R`tgT@YOB8fbfy3~ZoJ*(p{rF$z`x!25Yl1y|2W)!L%L8%_H zrsUy%+A3~bC?%i4e7}@*h2AR8fRK`-bKlN@4*c|0IlhXRKF?Iz$-z$6WkOHpZ_1_1 zc+m?}tq>hzqYsC4*l3V~xWL6=*o5b4M=58DdTG)V&-$_Q(_Wm-64MN+Lp2$m+Z9ZI zqDPJ4%`H`Vbm9x&PyCYj-Xik}FJ0_4%wI+q-$7IKgM@`8Kr$>MDk=|oigf-Ux@5s% z@paVB1n#6bG+B=F;NU8f0vHsLNC}k(30VC7eEM`eQw?b;(@1*K=$_Ge3Zx=Wz9=zP zztqHpA7A(=6IKdx8(H1_nKI#O-e(5qE>pl^$p^hn{>Q3_h68#Kpt-2Rg<#kz4TWM3 z`L5q8#bxOt%pLKf*I2RSE?WEuq)zYO#l>fz^j)95ak*e6yNt`p?7~$(azksq(wcKg z%*di?&&&+QX)awYD_^>N)(jc0?gT9MX^k9;k{G)9NHO9fIreoBJg|NY{&v(PEb`VS z4sGHJ1gm`n4oZyOBfTo-G>BhpHqs32qVt&mvWd!>Lf6-IxCU12C{p$pGNWQc*YP4; zsNsjQs&Bp5$#<~;JF^pTz;|h}Zl!9#-m*s;E(o6(n&BEG)DJiS07_+RShr{8FO*yM)C$LM_~2)S8rp9#Pqwcbc~6Rxq# zlaWpDed3AW`Zm^oE8Tr79n2Szdh9qN-OU_xtLKBx+?1mJ2ZOW7O(q{ziSZ++U#Q+8Rb+e0iGJTEnX3O-_>yBldP|5s$o}j&iq3)5;zWYd`w6SE@F8m*LMv5Zx?+ z;fGe}J-<57pNr>YV~hDnrL6-F>{1%I7bVpJ`w)Xpew;z{4+LQ!-*A#Eyvnyc{G(@_ zx$b9W`RAWTa3^r(Xf)Dzbc%P<>%ir%kwLLD27Q``C#3=2eG`Xz!wB=%2^@fr1I^G# z1NU8=6p?WUS)=%UMM_zRA{OHgt4ZVJ)YlWIii~xKdhmeT7mC$9BganhEy7Omh3M*A z&-J`zOh!ccmAqvYMnttqXmHZMXjoQIyHk9fY&~xgewB<6s4T$#vPx|wuhAeI1T5?% zvbE&b^A3J@>N8{=wxnV0%r}E$!^4!LQ1qxP{a=xl zN2BqWFLz>bUIXfUtE2&xsH9w;#R452LG_#lhI&m}EHIL)9u@*n!Y5^wA?s^8oC8aC zxF>`|O@<_edErEbIdFx9-As6NJPQfi2=XL@3kd^89V_wVuqN-%zxvX~IFH`4 zRQkVUe(o7^8vY{ju5_6EGxv{M&u-vv#uF|gmUo!^L;&Sp&+Dad(^cLk_{$PbmgFeP zfk13-==I4a7*A=VW|&;+xqG(c=!Zj|*j&-JExsU^BW?cJK0HpO>Z96)p~s#QF#)`r zFM0mPzS%DvjoJx@#716hnOK4!oT+cct&SMKnlY(!^b*bOPA)UYdX=|KRam@wsIlHJ z7%|`3nJKJI35gqxgV)KirO)-KE6?4nv4wheY@-eRF^b`cjvT2$U`|blmK>?&dmo}3 z9)e)`df7}sancNyBAbgwp5F#$gnT-LG(D0rbF0#lB5$IQJ0hhl<%Su(DcR_xl@9$G4M z95LA+D;}@E=S}Lsp*ofqvqyJfNMhF(_j?KeWe#hy`=5-^wTSGM4XDW@U~b8&Da|Lp zVv8gsp`lC=p285(Uw@d=moSn1*AW0W-)^{)7)L6*I zZ_H`D7?S(!klx!R#kLy8O-qY4@J0z=4>4WP*!@aG<_gLCcOxo(wF(IdtiqW$Sa0Ld zgAi#+Thtm5K`Sj90v4IURm&7mVKq}Q>dpT>a90mUJufe_A6q{$i90X16w5Z$^0nrn zrnk$C@Xbn?pKfj!&dQ2%Q!*dPeGf;pQe6bl^`>~dp-r=hmVH;q>YskE-^4v)0Dgb$ zJUk9`F?;+Rw|r~&_x4-3&tO?NVg`+k`(T5x8UkoG^13aqYXi!>7#X)-Z>8DVU* z`LH19obImtAo89MXSDB-K~5$RWCuK-w4I6t2Q* z3$3iC54jkBzM}A^*4*`CoZzk>*?fI9@aSRV0WGx;vD==%Efm=p6PR{P~iFHC1c zf;|gydHd4+bW8h%8j(TYC@TtQVWke6{bfq`m-3OxjYcEStuJPC?a}0-BO^tVBkm(O z1LRWa;vg7`5R#xg#*o~yH>7ksN@GMyNMywp!oeZfVs9;k;jmtXSB(b26KcI~`eM~N z7O)dFhV_%eM59#y8)nH5JjjQU~ zak!t3tWh9&y;#9h`c+~qTvBLLOG9hewdTbEhf(8VdH=M9R<@(mx#Fk~UNhk7jCeAn z3y;a}1Xs=vhX;SXQ2`T)&mANaO=#%o5SB|LM_N3l7-xSVQgzEyW`AIXLrVlyV&ox& zbPKR!*9f;YLKsumML1DL@PT40r)-F{T7NUSxz>`9l=134w(1G@tY$J_;qTosNm|ox zMl808DOCZ7nyKT#~2X(nN~)^ zF7ik<(n%SvcplR*S=34S>Tk*ieH&q5MYmDbCGV;vu zvgsveFe&%tbjR5>9e)jO5OC47KJec3lU!o;J%aonV7IEdto|i<_dl_i|3|>PCoJXP zgLmxz8A=&52f)00!hN2yX8%FLW9DT2XJxy;!9RvBfM}eDzO$#DvFYELf$aa8q*-RJ zr>LILF&5^3K#I)VKu~{IY5QAHK=P-vvxB~gsg0qhzO$)~sjvWC}$01fQAyEhe`AOfE0W>px@q%Q<9W{xhV1 z9nn*+?9<`0H#2iK{o8?JW@G*9N&I(69xFG;KXU>X>?rGz+b)$ecVW_^9w>8Z(0H30 z?V5#%4aN&-s^HVx1m7y*%M=tJbJtDTaXN6!5&E;{i7DO1NW~OoxPE+ao>>`jC%9$y zuEA24Y4dq-x;*6Fo!>ahLAw1y(Cpc=u;}8$l@fy#4 z^=a_Aak}jFtzTDoukhHy>IYfeV}@_I9UsAI_(i;vT*XarkvS7GADX-1mO<8ha%>~T zLx677da|Od-RPKGsliEBwfrjvJ`9!j4)u<}f%51w?4srx3^el6FaOI&fsWo_NHWWdJDZK$dq;aK>&z($Yt-JR6*uNKy&7A-{`4uk zWhO?`m%FRX*yoJ43pD`wsn|K$KHcYIMvlpQ(hM8L{gYKA-?nnaE!El7Wt5EGo`%~G z+Vhn*Q936nneLhgu?rE7>qdFF8+AGt(_cxv@l8YCS4z=j)Ke8n2U~md*^`F-(jW;5 z6WzUQm~XMKlcY%`2z|HXKfY=dHIxVihF5=9#DzyyJ+lgS3lnj*78tGj)5?_Mq6B(v z?%C@DM}#(;1$$i~NI~y&Gh7WKvLXrigGz-r8-&UL{fTV(wI$B-e7Ha)jQ`T0h9iq- z9D^}HfAT1o^n7WIP-(|)qT+e^F4@8kpkPWWMwbcic~;%LMQam0hIrltRYULDh?M#0 zGFa}4=0CKUrVhpy_fdO51TgB+tzMrUqTNnFKbQy^WB*|_q2sU%9R~daJ9EebCbf<1 zJcJzoO98R`5yrxnw{nRC?oYtC^hg^|{kz--(s9%MFjE7D;-+(^?$J8QPz&{8OBxf& z&x1)P>Z~T-9J%ZbsAPSL;n^W*(?L-SJ+L1WVm>)$Y<05a-tk8%{iuuF zz%B^Fu( zXR|1A{0aq}Og9|?C(|3i$yA{H({5;1I#Th>`>kc4m-SD+6EqmddvTvLFk>_5<6z(n z3qU9i{n&=X4QYV!L<(R`3Yc}g@t`fc!|PvpEwdPxVfnGR<=W!rON5Y)K~@SAvn^!` zl5$~SiToUvJ&BJUOrI38o5OQfbJ+6w`7>m;ha;lKlFq7nroj(bEz`0&J1;-%3*pQa z_KS2^cm85qn2xfsG@fIj{DzH#80%mFcwxet$y&xRvw2#=c<}vUfHnHybBWq#J~gp* zS+~hRq>IZbyg~HB$2UdU$*T8;zV`|aVk5?Aw$sbXM`Y$F>uf7GDWg<6Dl3DWDOD24 zO3SX2h;H&DJqb!D9w1HrW}q%dCcU;*F9-&1l6J9Z$B=`Pq>@M|Gu?z`8pOn93Zh6p zerO<}Wcd+(h3F(g_DLbQn-5d1Eo#jM@IOsUi^JyvE5TxslD5=KB}78;OMX17Kq%?N zAZ2$TD|iNEEgp$UVeMrvQj(7K$VYIxbc@sPyU~T8!Oo<0jXGa_0@l+G7S;+peGZIy~z5T`5i+6$k z4QT-vTJqc|629oaa=+UY`4>f9j=4ceFGtNLqT z7Fwr!%H}z!am4aD2wK7RIjGC$+$|sk*1%7i7Z6R*;uVs;PjU-LJ>lMmVqCtQMVVd+ z7BdSyT)VXE@a8lqdEV}z_7#VNsU*`QdH49}C!7DbQhCWt{9~zFKqKD{99 zOkX?!{*z;E;BkGWgRL|e>Ckm>ezs`8yseAVqb$tvN`c@O-7{z=d8MC5Ig`3#L5ixfsSRHjp+T*u3qBIv_lnZ)HuDxwod@#9(Nw86fLqVz*CUPe5(xF%ZVh@%$#!-KRz*P}xt@K`{oEc$6J=5Sh%i%*y6#ssOSQQ)e06(R6B%|N8<|mG zI7`!oD&k_6GPWI|urEKnduO}iJEOq@d`wm%%E~R8Yj`5VSoJaB4D-ks=H+8zy8s<0 z25Qm;?n$9X-6iR3P>j;DOHy7Qd6V$oZx>uydYJGO8WF%P&Jb{mBLx`PohaCoE-FJn z1}cBSR=5vd{|wN0J#atI4lD}tO>kV2_JU#nQ$(Qa#3cN5ft&uliKNiV^1OVn_;GLq znhRTDqV|{-4;j|lL){x5vhlv~Y9t=~XYb>;uw7gl9O2H9T_(n}>MazaW`<`mDk#Lo zr?b>lf}^(@`B$t6w3xvcA8K-@LARr~D(&K<$z_0Aq)XmB%vn;P0XY=TK0+`gqYqRq zEV0l0tlE3~S@j62G#SOW0y3{}#%K(~Qdof5qb*?eNCw_Ekp-~5gCLgqSLqa&Qw{B>Z81blZOtT=5oNZxuXV z%o)9ps20rrkppT)xY~Q@Mmu)B#aM}_+LF6RpjzI(M=(oO-%{vkcz;eE8c=jWJw2hY zt58LoGnIo2<5zi)Q0BL0d@E7k&Pk(JDePFPWrTVihN?%phr*0vKBQ|=$U;m=y~_lA>7%atG~*2mt%MSFqG<6e$wqMmjAqrvK~_0 zur*i(V0!UXimULuJ%1Qe<$%Lcq7I6tZ*KFxt952i7wW3c+#vIr@8o&- z^%Sl*YUq=V%r>#`bs0yV+Ef81r_q4PX$?`z=C;K@Oil+m_8|aGimpc7A$~?=d6)VS zO(pGB5M&VB@O+Kvce$dOsD^1Bl$-e{7VYLfmN~{C^Ew-zMx63tn`U&UFs5Cb1%Ucm z=64d425?{Vh9v-pQ(yiXId8B0&yT6n$@hoU@}Em5Q}*&ELvuGMnoDa*OS$_u;HjY- zeo@RbL?+tkIiTNt`9+a|lWF2vjof7kRHCVKRU~8i_Ju6cB7$rY7&kM3akCc~H;+x^ zJEh%JZFl7n>D?txE(fLE6m3P{0$!MEbLf%EnI>XmKeS211Dqyo<~8h(-Q9nuSYm4wFp{l+In=orjz;84~}Cy+<*M|uGe zeh?7;kxN4$T6BpA6iZ*b? zX5=|IHgL;%7qNiLP)`3(0eX&7z-1^N)G1-iQ;lJ1X*806ZshOoD^5e00%jJa!dzh= zd?gaEql_(2sOSre6LRVv?o<2yF?Efd?$OhINo`&5`KjKuf8||{+C%Syhs=8W-p0q| zN77%rY7c4io2n0K0Y&N$X@+_qPV~#XHP`(?9#-o)a`#`p3uc^n0u`4pwXS0g%)L_Z zhglDkAK$A#jHtOhd_vf)-1R&;WN0wcu&xK0&y2UhR!%LMX?~J_Q8aQRc;ZIN1%b^s za7bTBSFe~-Zz3lX$X;~+gzxQ_h~FwK*nfvXn(VLUFf2%4d@>R_d`%r7y`FBam9U4NR>2( zg}rU=Jah&*UWgzst}M)PQ1{F@;mfdO9J%EhQ>2TGLBGd`s}cT+b0%X=$yTgt0(W#r zQZ_S(;CX@_a3eg8XwCBdM$Qat0`;q!hZkC%;XBC59a)XzyXmbk3NVJT5?Ihv-$8Nm zka^V#az%*|Aw_MB$cP_`^WujNCU$nz+ICum(jm12cU7WRbrv%?0QVg$#>aUCZJ>Ie zlpM12Ng%%t4Wpq_0qjAgV>#s_4UC1G zTn1kZv^1H6ZY|b@26heONCX&8bI z&7&C|uO)^iOaIG8JyTj)47|+X#>)zVS|AF`N?p+=8(c(;09lec8R?>Ro132r{w8opjitnDU zqYp|@evs+Ng|!~AJLlQr`W&%EG~bfb_)RBkE>CbEb=!Iswut58tm;gxb%^pnT}%Lf8aUki??Fs}=d`i6&{lgo-`lqeGfvZNM@ZLP#T1D9N##$>9d zMj(xKzA4ozTljqghD^Ii@ZqTkjj0 z2$UYO1Q>zX)khEX0*BBzy`LWF7VuLAS3*NCz~}SdhmGH}?XdgYR)NBATA*}39@I0e z2Iqfv8U9kmBZ?dWzo797UbUR7x;?m2raplSaaNZi6#L!tt}L za1xUtSiy{g_r*nSX&0`^d9T~B($6#`uV&dB;zN3G(Mp}}7O-D3hQghf+F4{b^tL&p zI!D;K_kXLBvbk#2%Nb#;ZmU@g;t&|_P8Juv;F4ttS&+9t8T4+dG5U};xtKi?=ppUWM*Cb%4+_xy{eBf>)+_6hG4>tbsI%I~ZO`s5LS#^X!#%l8$-YI5Mt{V5`pa z@*f|MVA?y(Uo$s+gBvb~_fes4LDeE}=x8QVaYn2Z-hY%s7LD@eyi$e86`uF-)hfnJ z(0z_VlW3-@8s6xWsvm0ia)4XWp9O8@jJjFsxS=t&45dpFjbJsFzAN31wX)GAZgU;R zOLiIVc|Za$*%kiV0T}0(LXvS*{UZ81d6ba!#mYgOto|)qrbAB5T-{PuPmY}(x3O8$ z{9xkfkt$;|_N_TC*KG+dV&-)9bSQ0756m6tP}{JN)~fV@Fo`!R>49;yRj*%{&lUP> zuH;uB26VHq7^lJ+xjH!v$yt_DBRr2RzP~!iik>YC`CR`d#u=}lYg1Pq6N&f?*Bj?Fo(#^2BLK z6ey5_?-w8RG%N!-psH9H%_2V(Je2b> zSeGRx*on>f90NaRiG~My3~0+ZzFq3$MBlR<}~3 zLE?_mf_Ko{?GE6(=|iAgeCL+HCMIt@DNA1SS$fK zn7>opkSQX9w0R`KyE`c9-A12L!-cIN4o&(Rc={AK7G{WgEBa3Syd9{D5gtr2i5$Sg zO6WDPo!_Y9p$U6h6hdP?=MHhu#pOtv$$%G*a3S7t6 zr0QH52JLB=Ry6HpO;BWpu8U0Ii?*>*IEe}Kxvh)*K#DG7eK!=1cM&L%eBLWJZ$8Od z?U|@WzC7HArM@XcfwrCCFlq(ul;QxXr;D*MJ-?k1#N%j!LV!| zG$C6%QlCm5v|?RZH^o;DgA4dahP$W~r@-rVhR!p*6U*|wE>^)p&d=!05v~GrgQ{c; zM%dfj<`*)mSIn__MUI?e6%$%e%1vRbxwnbA6FUsPG)n*_I3O(@*McfLt(jXgPEVWA z@>gy`&~>Rzn^;;WdFj#&&OE4I+u*TOjH8|2aZIA7BkSC8tWT5gP1H$P`K5)OUs2Rd zy~XHA$|SDv9Fi4pv$UUT8yXLySlSl6i%yVR0+pnDSS&+@rkO5BS_<@)oBDjVykr`u%lma2RuOFiC25Fo%Me=$4#@D07PBCtf^7IfeS>Y&3g$Rc_YU zdK2+Mvrb8nxj3Y4k0dt(E_EL?8AO9Vxeq%TL@^#*2NoGbDIQ!|=FY^hiHtI&J_n?2Pk`9ej{QE@QCEO;#?f@XS-3ZJt^-lhYG zN9rqcC(Pz?T;B|`c)pXes}f6{8CV;2DY6u(Pg(?MC)fUtR zph+%L^Zsy_j&m%0r=N&eQ^zC^QR4@vATq9BOOKsUx`XGjxY-|a9bg10M>^e|w_v}FU*B{qG92=*R zPXc{x&bXfOEM_aCsC~QiA~=HYgLp2^!%vBNlBI+x$d7F5<(Fa0%F$I_WuVQ0locXKO_^DN>Hd}cALQ~jD82P{m=0{YBl z7Bo#!`*YZ7Tz&0|w+<`4z59*u9mNCuXDM3W4HMR+FZ10owa936X8eJQQhUj%nw9dN zMTxX@PlS`c1mYQ)7WBBx2L1$0xfPUUsE}Jjm}hg6CB@!?b}?B)reOMp{yi3TXl1;z zTn9WPAuaI_01$3r$WxY^c%;N9&cYJQ_BI^I4n*4{{N9MdH{Gl-K8(_~>bO>-}fI1Vc(DH=p2}^(gLahr} zB_i{L%8#M3qtdp9rusrkXnjE&k@J7LL)vBkjs8WlCAn`#Dd4_{uWbvyqAG2{8(0FC zjn|S(Hf)iX@(mnygX4&~5Af{CKd^GB%ECM@4=XIfsi5>oN&jpz0&8IjHugqSVCKLs z7F>XV11EjgVr*nTztLJh+N^ALo~xI4uSLSy+%p@wY1reP4>Wt-v2ce*cNf+7YHC?! zQTT(`({L^$lym(tDhA@&@XxevGE{WE%dwW$HQac3CTgY)BJTrofcm)INV7W)b5a zijga1ALjOeHYd6)LNmA9*SD%(_g(i#3aVGEvE4<(Q+>ItDp1N>q1pUxW0ZxsHBD_r zzBCTN^}CUj&zq#|AH$_ADxiS{=Fcg6$I(XRT2P-g=WO+vfg5i%aN|V>ZoIb7)`L5Q zSw~a$^z0KFoqt|7Om#kMdfMw0e-so?wYU+G$yeHK6~R1%uCqKAo>0qZBHNzDaX*Rbd?@}cY(R4 z0aKax-*|fh1Uz8}O!@Z~NUXP_7HE6&Ok>K@-4S&JQpVeRNPF4E&P6h)HI?o2!0#e{| zZHRe<-k(RW^64`U!JAiFwyN@gvm*`73tM3^Ff9#a<&9gLY$?B?(xjLzjehrlQSl)L zzI1=j{uy-85(|qi@OWzpJl=94rUv(ikmXlk$TQ7YW4H%2-Q#Z1?_QH6R(vQY9=X}P zIdr-^ZMs(_CL6s+Y`=#s&8bTIE3C!(XYJGf2-bR}3;!N#ar{=C^WRrSay}}SSXcl7 z(!U52z)1dBfB0K~1OO37dovRgBl|xj5^((aaQrs_iIWwOdOcE^->8^4**N~4674su z1c;e_C#?c_57V>9GFLu6c*g&a{q(3mdjwcOd;`m`b()+kk1GZ2yT7JK4yIMys zp>^!d{uFz40RC^bK81%U@srre`lSZ!{`H*vWsc8e}`iQjVA^D*j*fl*`_ibPg zERku5wB8&moI|hdrDq?mcN6UGFO5WH4fT8)TB=~m+f{b3(_nC~b&_MwA6lA86Fh82 zx;YR$aF;y7@NQbXyV;spN(rcTv#?ix)u3eKr?)Lfpt;28^3c!`;Nwg<`}tyF(RZT_P|VJR24cM(2#U7k31^x9K!#kl2!t zpNtZ6s*uqa-=EtW^fV7K>y~rF3E+nls};G9B(1MZi8t4;v(t@;*SRcAyCi!CO{=t5 z1mf*`c0`|tFktvAiE}{m(^hHQp@TO{P`af*gmDvKY9bAp5v%9NWKJwQx@CKUhhUoKE*M73vhHM$5FIr<#_tsoLud70de-*gx-cKT9qH^?@j2xx|QAQD$J%>@{`1rNtzNUv7g@@)0g;pO5pTamVB-@?uc{2*|l zJH9Kz=lH>?dkH@okig%EaJR&9iSwudN3tiUrg0JpvVS=|ZoqS;rkq)ewvbr0R1sf* zqQ$SK=vmD@)ODT$0aouSiD85c3u|0r^RcJY_|wm<1UhGUm;;iX zn3`GM);Wz*PN?YX-x4EHKl;z*KRTM!QS6>tHHC0>>qoUf|Ph>1XqMt#nA_!69&OZ^pcVl!^*9vfVT~E;mc*N zRop6q$E)P$A`Zy1DO=*1+TELcSQ@UO==~{EI@b5lY5EyE9u`h(UGXFJj7^JXqXy-0aDc- z?EoI?A0-{>#CGStVY_03VoOl#q~AxmJHi0Lfs_!iY;!)K=r1SwZMq0LpAw@2(Jmz}ik=HR z%2`eo^uqH_?2B}!m;MI?i402-e09}>BK&+}a2vzlB#uyjcnYE@Uk!5JPUJP3zZ$y;B=}gCGVm!>8N#5ow@2*?Q?Cea1>Ir#rd2?gV1j79F`Ha_*uyzjHn6 zRo(I%Ybld@I{3n`iA@T+0WPoiCbS6&QV*-%_IMKu1U?AHaJ-V)*xz-^i6Xqbcl&t! z%6gNdX|ZSiX8NP@{od^LtO$Pn%GF(7tn9=zkFzE^SNz#>3DYdcAwxa={Z1Pmjcz>(PgKHoCz%-;OL&VZvM5S0o~VTG*6w`}b(-Id6Lr#Gb;p{**bsAJ z^?2X@VfVAjRFslL+nnC%##X?BMXM;i8qW?kaZP6-DA9k+1ZQH7u6WVw?b@sC_97P! zw71r)#B$&Cym8((iNv;ll+2nx7)IwUv$``2(X6=PMEjoc?hcFb6&iYg8T69{UKOfN zj*O%NEbIC8*_bD|0fsulYN>Br>0i?(Bik9o7h=U1m<7y?{{Xq0!9Pg9G~>aK9yCcM zRYu=WR8n#X&Oc9$BXN3~!S#NpFi!H!rNLqBJIYK@3uduIbRwivAnUp7DJ0f2M)*m1 z{m3!MI^T2Djw{p*DmmH)>|(5VX!C#>V4}r4bz!w^;8*3)2*#XWzME$lg>*`N22Hac z$teCDev%um?Nf$Aw#@d?CkW2MTFMj^_({CXTqvLb)(@JdcF=}wJ}%SWwB24|)Hlxl z4HsNT(_%_Dh%X<1OGC&4yNasAS~eEl=P5M=ofMpq6yS!L4@7@cKs~2U(27>D>3HML z*~4PsJXBqb60@n1g*Y_AZI{@$Bt^I0%!@~@{Q0HAt~|Utp8*PBtjSHC50y<`kglXK zC{I#AfTaK_NA^qapTDq_c~g`Szbhs!y#z&8Fh{5p4$LV4Y(pL}g`3YV_k}d~`~1mn z#dx97NiQhsh}c!6N%!%Ekhh0lY!FD)7K6(D{j;BuLs5{B(0~WN!tF~-f@vPBj>(~* zNl1!OfwHz}8ZPhv(eqo!yGR(v0u)6yTFH7gzg|?c@`!;iE#w$Q+FOyAU4B9&s?!%AUJM~1Wr4=g zzYPby#^`BZaq-}p?7$}Cd zD?IBqG>q_eg3EF|fk$tv8S_>|7btbRVOVQ_d1-SyCzl4N);Y{P5gbl48t{ z;IJ<2&a;79_>U%^O!dNS?OMvqW{WLy_SI)1VQLL`6HT4OcnT6`ai5jV^(vXVNff@O z?OY>OXGJy{uXeu9NX#V@6-F@rKBiqVuZx+2)Oog63qJ^Z4q<(bniWP`LsHyt2@Y$* z77inYxbXNc8+QDRnnlAikmW-5rIx!Uxzj$A@SgfOp-zaEsmF-8+Dt6msivIa$2IXx zT`4zR@4zCecj<0-wnhl|u4Mb(=j62y3jr}L(eoe$+yPnzd|!AnH!*Vr?U;Gg$zLYC zFc*;n#;_GMpr2E?k<>-NSk}3VnUgJ5)18D)a!_{LPkc~Vutgtot&p^uI1QI<$*qmB z?Ik))hy#X5sJP*TBI2?QE~7kc4yUNQzCZz%OO&wJf@2X`eTWS>RLR zKIc}pz!x$2FiowFpTaa02wcE9feUz#b3)wPpSR(;s8#ZZ==t;5@rUpGudY#|XK9Ih zuH7>{?tSQ^B%bB-5xuK)(8w4-1?aDa=k>m386>n z+H%0%I`k+86cCy%ou~wroevZ_(?F^!JWd8p7K3%A#Owm+;b}^6sIi1SHWYwPC8X`gvY8A8qN2D!s6PTN z_Mmksh;hGt-5`D`OUb8l`FIvzK6lQdyv2AjgYfW)x#HRF^Q6q@x3W)W;2-k$_WZra zHz)ib%z$h9ee1$o4{492JDuYIuKV*>x$+@_a5(M%|i@nO!C$J{K?}Kpp(L;9(Y>mpvfM@?GGrY&-q;7vKt4{pg9d>28pe zC$ezPXA-J2ZqWdNq_`L?W?yNs@XF#~G|XQHkJQmrER{ZS&()C)0+v=~FjUS+JCgCCPbC6$NnT2W)JZUIqXs4%<=$ zU3=k>8pHV!CPg%B8F6{AgT0NTE|a@D3ZjQ5_z?f`FQla6pTT+9IXFgA=mz56QOo z52-ZF*B39Iafz%8i;oHQ*v8$DtPmxOV(KHmyyh6pYg}UGGYNNXhH>JQ75i``UlkuU zNVd!cQ}z{~2zz*W6d55@ZG|H+dIJcD#=*kCVtAosE8pq2=H%d?UCsSM)iN?PhLPYy zc9$5qA}ucziH645b7j_2D9No}l-1W!x~2&Cs;!C}D>c?|p3OZd%rsNQq&zKe*QJrW zg!!u|n?9adg7FgKG0l19k z>feITt_Q1}W8{F#_for1w26L&8GOUt+L7tBL+cFxVrL z_zxKD&!wOL4M*Ylm)rk8@eaqYZvVgWE(0)_qrIN7v6;a?5)lBljyU84Y&9vmhJ+*Kv09(=tF1V_jAN7TO@~0 zLGP<8``e=%8yCU*?+opC7sy3PxQt^rmKfzndrR1ieGg1tx0*#z>D2*YRm+WpUR0H| zIz@MNYs?x*D9s2o2lnbmt(kDs0$$1Pt=CGZTCwFptkKb z)I;OfY;qIUR8!4MTYHjZ3@O2kRnDyaOc}8Jih`7pHr3gSxt67}f+CscIG2U}PjgZx zEk7nNNw5UqB^+E7v8v6a+!%cjG>GYT5#V=>;!JF85>az^Imb+`(TIwS;0b64GF2m+ zeX|bnvA@u-+3*Rhv!gs5AajOHizw$j)Y@eY)ZI9@);4||7_yStn7#atg6E{obq@VN zplW)vZ?Im)pp9~%N<33~^Nt3@M>K_MC-ml11j*G0{NY1qPiFbq%*SopIXP=k$_v(o(}5|7$+D|~60DGX`0 z^R1AdCZ>--VwL&svx5qTm(F09A^UI&69}d$qn$%i;nEo zsA)7NYqKMYm?ES7_nQY`qIK{a8%aUcc;#&rMH4RRc)=VuVZ3(Zv6cn)gVVxD1i%h!6UmZN?(TnEzn zXe(0#TyX4%WzPz%3$o`}o&75EH%ebfgQOpu%M>Pa_;u0-6G<8Wi`Ff-8z1r`opaMcc@j$af9I#mWUF*X)6g2U(_0fr<;Vvw8Mp^)f z;^oIQBb#%RlqRD(?iM~MO)7Vj_0lS_VU3b8Qz=ajbNOAv)4*@S(R8JMP(b~fRbH4y zIEkfB%7e3msN}Z)<1ltzy#ebq6q&Et%H8|By?c`NLibM`_DYXl(0@b?97P~%9a&ek zh}t#pLpP>CDdGrIj2-NGn8lx(A=E%5zRHKm&;k8m06Q+Eq$)(xr6KLry#Q< ze8qNW5W)(+>mTCRAetg-zfen5yMlvL)nVnPCtX}y$4hDELI*-pd7Zp8tpnpdM5$tE zCAaLDw^nUPeZ)F3;uJM8l8_Ew^+K0$FBr}H$=ES&C^ z6lOK~ey$CCDPs7S<#c#iBqHC}C&V)hsX3<AoM9PAo#%JZdmA-yq>o8toqI=WE5c7eAkHdmFqK z(S++jG1jBX4Hx@0A8O_L7z6aCWLAP2F_090EcGCs~8J$(|E z$>uOu)o|EI4fBk?+I25TuZkOG^lJlch?s}U^Y#23H*xZ%UpIuC+C3l+6#sK!bJXea z8C_B!bD(MrSSH1D!1M^cBQ{P>|3I)T9RSKQyQH|!M>ZQ6c>?0DNg9H96XKfeT^G3m z;tB`dxZVcDrIMH!>U2tRx9i~>lsixN2Cudu5Q}{`r~r~4R!d$KJDnG+qcO}m@PyXs zwSGbKg(oC=j1T<>^U8wY1v>`c0q`N#}NI zPc@FqE4OCnndc=$2C^G)0#Ofkvayk> zMCEu$hwOC1V3o7B2(qTh+8YgPJIK# z1g98A%|%RfRH53XPSu$YVxy&9c))8h$1-lN?+353R~m~4bM6Lo^ebjGObSLQqX7hY z`4bv(YB!SNjbv~b0Y+yk+!z6dFh!rJ>P9ja0k<(QJ3Gvm@0+MS7#U3^BNn0D&XN;F zcG#)rF%A>8mfwOYZAH@9deTFS+}0}Pzm(!NHzr}$;1+xh$d+VAQ&Je#j}OK1CG8QF zlVV20UP%y<%TET=P*Zl1_CVRr0-^7bVdOmoq^6;2NxW^}hPCA1yGDrE!m7|}i*WN< z0^gPAjuJ2UI)%jjR* zIRs((^A~b?X1)Vl&J==0%Fq@&Pcb7^}ffK%zU8)=2LDB zjPNxcnH_0Wh*d1n21`rZn@@ebux4sTTxniBP zfV@blb=MyLaUwf%C!uE9TcpjSO8FA)$I~I9M1^w$@jETmfS~f(b*k89c2jF5oy$;@?{d%6yS0?%)Gf z-WO6u`5TpbK;*TWs_Lji4e9}pe&=%Cz&BGWz}2b#mz}S|(^YtN%$un+8R=3V5Lqc` z6P}$Xw_$_v49vUH2SZ0LEbbGE&gUBol-lqDMMR&Ws!?U^|A>QpbYUjxgPKrJUYqsWLvOl6bWcc#&l^?Gb&#?DQor5FBAFbG1)YFtt~St zU|VQQ#hT%#mBI}Nu;SHNI)s6~X7xsB2wh{YMWSXW`^)m|;aJ)h;{h--ZxF>xYaEkA zKCx)J6o$Sfrr_8mJ}8%iXEhr+ctlLVSCy9dkn{RugV0PQ1yd+sU2Q$mh#=L>_DL=q zqUF_AVgjRIh>Nw6mHEQsVO>SCfg)arL$9pGLgOW@(=#k0fJ*Bq#Kl48hJZF70S8N@ zvADECGVMw72TmzEnyp+q-)k7P(zCqE%Je>Cv_<7l`mOz(`Dm@I@YE+rW)sO(8tz7U zbSu#St`l!8wv4YaB~fDPN${;X53GfMDKH4kgf)3dHN=@uGHaDF!lPceI^a2ME34H6sCem)S^&NLHiy z`bMP7FGs>qJ)jFhezl6ginp;SJ-Ytb3tztP2S0c&9MEGR4-JdOUDJkVg`BM|AUYQO zY-s!&o<_bM2eODkEJ1qjp&WX|j}qxYk@C829MY%LaH)g_oIq-X?P07a@J@#m3X9ZU zybY_&ch3M#|D*~mFDwFvfBHf$hr}NmiQ6DBVUZ8yV|(S|5mOgqobC-J&471qmRz#N)Jn<^*D8W7pX|STq6<_#{xZ6tIfEb{8zGp92rh$$? z1u*JSKjH_vh+Y>Hh2ZUOlu2cGF~DtEUX`QWKtVKL2XRar`~{HulG|)?eV+ zzgF(gp|$^c_x%<)0toH5=iI+XXl#FUHd}}!05S?zDw4NB)~8+&;h-4HEA9{<4<8I( z@G8jeo>&rVj{Jiv`*O-u`PU&y>{^FZE%H74RAqK^;?bG&J^j@S9M~&WU;dJ^I?cA5 z;~hcS(VOn|3WTcxRTn6N1Eg>n>YgFl2iNNbVupuaUS!2fooG+NcYYa z@2m51@5`N_BF6T!B;xxU|BLB(25SGWETIqgJCaHF#NknBAWUDyb@% z*5B2w4`3F3?Uca!OkvYthVR>WgJMy3C?Mc@Mbhy)DQcxVGF5uNr`gtUy{u2Uhk%jT z+v9o=7biRf`rhzzJ-n(n*(YlyL)HH?6J`EAUIp~!g6k!ssw;~3J(S>r!(z~>`gayz zjSCL7@)bXW7yNw?Fy2mdnR`;6bQ&Ue>znKCndu*bYRa?SJ#KF{KQI*2lgGd5q&v1l=j8Rs1BJgGBYkC^IrscmJWB z5b^-Uj9%D!Y!!DpI=y8MDXyih?G==t)SdCR!k|}2Rc%NIPupk}9>G`wS zLfpC!L|y`Gy9kj^)I9jlRSA9W;<}qpVm$kMsv)kxc(;+kFNWP_wK8g&K5jcsD(EFy z2JH0Dxoga6qu*jV951v@tXbHRunIe7Wr4c5-zxvKf49;wVssy)4}(dp~2fd*#7dVQ414i!i>Lb!u^ zYb=xfFD%}t2dpv4DkCGasO=P^rs}WPt6H3>?rH~2aZpgF*Ip3A4))~}2 zx1D&tv7dk)Xef|Qm3pFSD{ZpL!O3y4 zU!}PGUFXfr()-N?N!H%M%Ib1rVAw9KIc(ItR-fMiBQ{OQzk(-(pxOZo1w?`p95HKN zJU;IKX^SRh9f!U9KwCSnC$TZPKD>}H2%wwn)mBw4_pCuB0v`4SYJrD+noPU?O8Lps zl)y$8pd2KJ3?x#G|F~b|5r6%Wh)7T((1rl^7dsE6>bN}O#I*1i`DV!-(_mdk{|RbG zw#42H4l2i5j$uC%Do3`-elofeN48-_ERph#ws(NPY+xi)hy|PfB`2q1G=yi5BT?iQ zxnIE3dab)|f4_`XH_gj=GCtnkG1@eer3}~>+kD;EzMvG?mWzF9z7{_a^~Q^xdflZC zuFBh{leKyJt9g26{-VS!YVIwEPP88(@R3Ca%saiGwfc@$I1PtW!uwcLiq_}Pnqtq+ z`?>m(Q7jNCza}fzL-E<+VLN>D^x*2tgu7|`Sat4N&Wr2yKnJx!VWGp@1jS&~?y_~0 zI0?ydhq$zwndZ^#kvxLNG3PWu)MWbhN?lFon}y*G&uPFn6%w(<3+sLQ6cd8HN#EhA z_oi2U*e0mgAv4~Q3L|)iJ>ks+H7Bg-K4t0jZWwFLQ8*h1yHd}3F1E{uJ`d4HCw>M~ z*h3H8w%{(nrGs_lkA_FMt$+xsbH~7?#+qH5K8;8(7WO-GQP}vDa<8?>_emXOuJPo`++590_aACp zGe4v|JpvnOIe)lzWV6|J9qn~-vu+4aJ@xn@D=&=WBp?nE$eIz5VTrRruq}c<`e7NX zH25>Zh4uO_((!y-1@)KZ>>{vCqu}QoB<7{;4*UpF7hw~Zl;F26aa7f%d#O!4eNM6s zP0KeIURs?q&RwsuY#PXHPm-39p1_Hf-sPyiYg%q-jv1Lc=rv_wb6c1D$`Sfjc!o@v z)c76dO8%ZaNyV&!yN{uHRJPpRT+eq#uM@C08J^@-CxWe zWwrL>T-=RU4Ecp3)a!!*$3;Bg!)?ljFns#PtiiQ+28Q-4$_%kLW|<|p_5tUo1N_d3 zg0eRTBjoeMywt*!t#Jw=@YE1gfIKZAURp`=J^8Q@M_9sEk8eCkT*O`wgqrXP_$(qG z)Jsa@&=pJdJb{kO3{iK~OIqKqiqeRg4ZAzppI*bZ||69ZTGtCMo=vKk$aOcQMje;Y(5M3ke6X!&)31FC;7F zpSWSX%`jc(Y|u@(kZRwq|d>4#Yl z+IvPjUedCW=!Sg!=gckfqPc{^y<$bv7wcoya+8)RfmPgi5b@A>?6%MIV5C_fah1OG zjYrfT41Y8s---x*+N22lE{%D1elE$H^)V!xa{0IxPwK5 zc0S}LW7m#!nvE*_l(*Iy@EdH*T396=Z~#-4?!bInIyw?n|~*VZ2fr$ zt(@X0ecA6KI2|~hizHMxetQI58AMC0Aon$+^xWu?2xjl*D=K=Ub4`?7TZQQ z8|UE^In}7PONE!E7|U;b@9=@ydFqh8*E)~CENl8z_o9aSVOc3NhwVe4)020`=e5fk zjBVqy9j(2yLTUzR@iC~$wQh{r>VkKgzpEu~G(%3&+7fNIps?Ze%yG8k^Cjx7pI9383r^20pEjwS@U zg%O_ODpx*Mg(hMm)hyY)h`d7SDH>*iI8=f(nWS1PnU~AJK@*8$8+g#IARtE%SKp#at2Y5e(wZ@4teE%IJcdmoqa-oAy#X|(9 zAw==7zqjba#-LzKHbvCcUMAmv_fM;necn%sRMMbs)5lXe5<#!Q00P%O5J(e$KTxe-V)hN zoHlGnekg2uyEab{`}OL{oU%j5X#)m*Tkl%ZoUNI6mTZk3=sKSARSzfrtf<+i7Ih35 zmV(w{P&6IuGpaVVknCGyirlYh32^-ylX$2~yNKX0o+rLH7cKazi`vFQwLE=$h)8tX zA7EA$m-Y}HKqGoZRH=vMYG%fKIFb(E8nIGs;;beXJxYR&k6)*_r{wHtCE}$nM0|yORv9ERX z3u7!#H>U6&q9M;gu>42eEy@OWiLx(D3Eh6i9~sO%D9WH&M;@PTD!tmiL|0$EqEBX@ zSoVc8Bg=1Ue}YO95M3eAB_*0~C(9AbDPhzc9aLLFP!AcStZ*H~4vJfa4-{Dja)D`LuW1*Sgmn<|!s!iV+A@~>- zSZGctd>nbUg2mdPY^{77UBU32>Y%;|k0;NRxlts5?*o^hxzDHaA3wK39APyvS;W?V>sqBgRhbH)uCe;@t&6XT zsT!f?c0H5fRZ7_?j*A{}*6(-4XPKQXPX>@c9vpU|_OuA&6vqEB(@LgTU1mT`xo!hG zCq|E>obv&8M^yCd8i(xp68KwVfsOCW>@EJjid1 zEH?(|;5e~OYZvSvn_S)rjuQkC{v{>*v)1c>gp&Pdn}5!~N591eSYJH~$^e)Df5uI+ zGXZgvzk@x1Kubr@R$s?aU&rC+fUTaPq5W?W3V^Ww7J(ZZC&21{@|}N~=(BMFHI2U$ zNBwzy{zBo#`S%ohvOg*T|45u3m4LrnBmKW3PQSxpzY}e-bN)SAGWJKv`Li^Z<&h)) z#G8Li=lm1i{QYYENq)!7#`ast`R`~L8!J2a?@K?m02&4e%CaiHZG$voq-P+pA@mR5 zX2s$5!&+A3L(PKbZUs>lD5UfIPaGGBo@<9QCZ{N(QykluNS-^|xO2^CrTMk5Sbpz& zdgpw(UR+P??RI@JLDYqP^tsFvM?|WA>B=*Vi;oL8L$U4d`l6`){@|Q3y|VGGjL_I= z5%sq;{yy7|mhhLC`1g0GDD|glI^JH_cPMM;r{0;i*ANEw;ZBSVU9z$oZ5a=`x0h|N zrMQe@+FF~4s)$W>-)LUQb2hJ=WWox8!%Um%s5Wtr_9MkoJTPd^k+GR zVW{(y1xCQrsY z%u}hU^s0>G{$Y_hO~fBIOh?&Z%eRXTzZ=W*Y%(TH6Gx-WbY)8>(g;YOG5GE(vu_~O8a|M zk3OhNHZ&R}BcTa~6GD6;B?+3w#Ug?55Hgiy6h*C{x=_R<8w0KFlS_;CYQ7Ogvy%UW zPbmIri?1QrKp{5RRiP*wkX8tj8|E9Pu*S8j$ViU?xm4`WA%br-xTzs5vJ9@&e6l8_ zdv-Rq6XHO~>~w(YVv8I^4`??W6yUpOh3yoY`?*6z!7`~sQaXq*&&NpegQA`cnSL9L zv74Bp60t1S3^ZWldjF^pAxwvA{+1rkv(B^ykqVWOE=Wd8;zxdazw~4nYUAS?S&pjJ z(fFW5c4eTi3% z$Dg33dnjdmC42geFGCcFm>&uS=hBC&=5+@*q{HGczmi5Dli9`e@K5C=is_dgs5YVW ztMFF}6$ZS80Glq-{8*$Hka8I4KG^?Vprnnbv zaVt*I;!cs`R;;)dcPLigL+^X$>CFASGi%M7PtS)W`y^S(-X}Xpe&_mM7ddnpJp407 zStz|AP$f-%{FixZMsZtQe)6|qF4pth{TS$L%gc)5$Nf9%hods)=xaH>jwuhp&R{wP!;PhcWg=m}>t_>JKcjH# ziCPCc6xZ>O9Gc_nDkTCnJaRJC*)Tl>b%2mLPwo!}igMTdpSYAyHop@pWh-kq?>5B- z2nC3|M0#kmGWV^2BiMK9a`39%v^GsD!+fEcpJwf$zR+Pj(;y@?>s~R9?T_wn=7jH-68L)G-s zLL_?k3@h`cH1E3oOqZxv8WtZDA_@YST;OuDdbni2qRzarU$&WMDZ7gTnUpThREL2J zW3@L9DJ!4JJKYxVg>Gtv&b1lW7szdOo88H+Cd;_t7r1j54U7y@~(rReI8Ky+w;|MY#I_V=5msw{ki;+#(ausE0B8<3N-o9 z_dL2VCnav4bd5}^K`+|5BHS-FLEfaq@JQoSay!kXms&vI)|7CX}L6$@~X=SFLFCx>!pigbt>d^dpX@o3j zANur7MjydjlNW?@&19mel7y#iH9yi$ECi}=RWv`LlVvPY7FGLzUV4y@eD*Eifch>^ z36cJQZmMY`sbYBvCU`I0#Zcq4(!VdEnbgZ3SQsUNrOY~4Erd<1zah8BhotO0*Xhk6 zl=yja%Q+eLg;s!V%SYY&N~P-kcVEVyYmt_yzK}%AGq$(@6X*(WR11{KpnZ!z9nx{v zcY7tNsT8|HvQ~0ld5t!mPGXug$s3;3rtf-lMlrY(3eKFY*~}-rESC%Aj)*#I;XqLu z?l)nVk5X9VfNQov=?>#e&l>$MQEpsxz^<+45E~qpt8OVB$c0W`6b2Sklng83Fn5=J zk1m!s6jsT=Nl|oD2`2E<37QeH?}o#bswjyvhw^+G|2YrBJV0q}AJ;d}hk*Lr!=9v5 zLP}^ll!KpGvDFO$pGH2Jom1DxH1B&90VSlQH!OQREI8r2G!vu*JrZb3>2RB&Yj8`0 z{LUFk$;*C#u@@W;G@?&h`hQr5t@wUUPRO*L!s{c?53njl7fhtgquG;YQg1|(&g+#8 zNq4yyqLg|7B8lC2gtu(96=U&Q%qaJz7v@{dM;E$uk{cV)CN7$FCbx#UkuX zblkgFv7cgbb~Zvh&2@YqJ1} zLdQBWYQa0)?_L(TBIWDsutM`ECeKBufjfVLK68X0(H=s+EQE8kp)>w{cJ1q*mQTd* zV`N?!%)m>OP;3n6=-* zffvuhjl?|w9@Hu}{k2k`++M3mgdZY)GTV|b!9IJDlfREeZD|D{F~I7Jiw<5zQErYf z5tJ<@2W2Neu#^q#e&u0w)YUH2<4-@*g~NfJoN|*pIy8}gy(ka~9`<%b@6D$~Kh9Sa zlan}s$n;BpseVD@R*{&9@+KZi;kfEvQ^j;wW-}l+vlHmjy1U`P1~CKIh$ev~ z;g}I^d+@^t=&s4MB5FEk%{MVyj3PQkidF-hwfA>m9r`)k&W-5kRcW_Y89FlFx3S)2C=Kith3wja<1wBBZ7pDOBZ z-u-;?@^UxkQ&Di-00rSYU!2hfG=lrZY4M^m&E3`o&w8IBW#q^sWBBf#f%rO;Q`Bu!KJ z48_N`7?^cS`foqwb3b*~ z7M1!^WL;`2LLj(N#WT{i9-ooccRYq3>!DG(mZ!eQNXq@B+?PuM7zZM$cg1r(WDVb- z>`s{_AK+sdM8wBd03SwD@*;pLy@^HB^4(}9tuuPAcTcgNM-Dkt)mJ(j2mZx+h7)T~ zlRLAY0|Ve_@raBK`QuC=Yn$>Yi_ylf7eP?}Ah*j%7<4=!HG8FD030yq#woHOSgz)( zOgX*g8C#>U&u3&o=vkqFVrJ)Mf4j1?XC;)$e zAJoL*vZ$7;IR!2~64pdL5*ED*9!B0^!PN-Bp+hK0(eq8HIF}dTdMg2?2e@f$kwbB# zLR+7pb)<%h6M4i$gpSZ4uajetdx29py~65fhuO!o-doGt`R9@_@{d+29J;NV(u165ONtG2045!*LOnnjO&O< z*Kdju!8?hVV%Nop$P-yjV=EWxxKKzA7ry;cF~bhFtk}phb6DDLi@)ssmxbqB z_<289g5f^0`Z%rlYb9);WQ+)*YrLn0NNJj zT$g?>b>E42hBncik>riC+27!@D`jZ7$#6!r#g8O0(%~<17IlK?cMPL1r?HXn5z^Dr zhD{(2M-APehVcxCdecHhZDjY22|B$aw+g3Porp(HX9-S7_KSQX1?hns;&C*hI-_Oua^nr)J%YI>oB52pv4-zL<4_#^ z_PaDs9j~)6e$No zXB=rwy-d}Ijlt1&;k&EOjBS^-fRvjrS@Z_!Rfos3cU)rvAzs(_S*QUI-J7Cb-KMV1 z(25mV$vH;`3M2v5v%#$^S?xdFZAkqeE>>@|Mg}V$d^)~8k4pLO=K=5YV{2`2QHp#$5Wwne)RKcLA$43Ws7j5p*Te;D}%LXEM>oD4P&9A75 z3K40nT*>S8DTT*O#ouAfT62vnR8eDVX6n5gOKKI_})aNqGmY<~2C z3tKs}gLXxV$6|ZvsP`xKBW=RifaOoKWN*70gwe`vULoBf+G^v_HC__o z=%(y!(xayHh`kwAF@9+Bg*~OSS)gTSbej4CQG)DIRiR;)iec(eZ}lvmY(vHmCMCy6 zzpA^y*8%g8(24}~dYf#^iOD}L3m0uJwCcMvN}r1n@FKaVC_UM3tah?^9boTR_QTnG zg~=S*in4{LMySH)sZsZYgN9FRWRmpq8^c~d%F?&oa6TSd#+X3|LO96ZaHG0et##~^ zDiR25E|}Ap_SMA=7tRDb>k+R5TVqZb4a;JDJYm~kY`08^ELgQ~6VkN0EM>6rx_`wa z<>s^viw0kMze3%B;k_tBY(AO4{(`{Tx^q7vTefL`o(^Ab(p>D3!vA8^NyTiimjS)P-1W6 zyy3%5D&IP}qJKU(){=xEdO^c?ye71(>yaKyYru^IN5Wu;sXn84H~P4M`$PPNr39=M z?E4(GIfnkZz+~ECtO^U;ifTwYW&Xu@I%4^U{uY}>Za+yzE_Y{Q>~gZSnJbuTxPA*G z@e!3?^u6*Bg@%ARJ6Vtva(H%)Wd*sqoQ#dbi~$-JHx)!4Ih;-Uy*H* zIlQun9D2X1S6Lrt;y`IS&du6=d_-;xR*6O-!Bil$V91?PxnjpPGeUPd zjxvt1)M+MeuAz$1xyDx_hgm1hUiY)1*URfNd5%u9?pfK7nOiY^o{sZB=mc}Dp{cIH zolOhH-DvjjJHPkSr)qgb6a;7I+K@-R-bmcQQbZJ!niTh%sb#3c`vR|M$72$;kzXJs zU>OCxW~UU)9^E($wA9DZ>Xd;Sr0tR1Ei5YLBg0fAh zK-kjaI&6ST*IP6VJa|*UF@Hn{QM1&LDvC={MY?2BPC8X$-ELY|ngVmHF}p}_GFqs! ztXG!v(MoS%&x$R+`GakA)8{J~y7Scaxfalr$GL$01yWAmMd(C3>KlXHa&X z;HgU<1!<|ecM;T-hl~hAGa!t`hAuh)WS`A|MKbO+Rf9DbV8)a>&jI73*kF? zaqtVbQ*wK^4AZ3Ff|s>7;Hnd*G`5B(lkG`yYD7)}Rkg4p2_g$|prr_402(CLC;XK3 zhy*YiVS8YC0zfJYSPvp!yMgjcb2)}Z9mbfEB___6shu*dOS zRn@jB`0ClT3c2`SG1+9`H5lvB#$2CIyn>d0pnF_a*DEw!rY@gkF{UcVe6n0po5}2m zy{2oGHj!5QQ}g+rHum|6A&bw|jJ+yqlf{)_=GemC8D7#_WKYYDYpT!paQ?RV`_kRR z9=K-BWN`REHN?kKS4>wIW?#oLJg|s~5iIJEWEm`RQdV7N(j_ch%*05?IEZkRWcftK z5?(Yz-?EV)Zou+Ag(eE%p(kkBkI#^v>XF<`n|G~0H(nfc@hMPJD+Y`S+gG;O4o0#5JJ6`$~U;WN|k)joe>pRvQ14MO$W=I=>qbl z&39)A0#%r-jvAbxuR;gojG=DehG(0HDmX?EhE-%kGucV^ZDobzk z&LmNzc@Ppm;Wd={QID3(Q@}VAd68GhDcvhR@l|@^Iz87FeqYku=t_QL(gRYe;LbtB z7D|!~hHsG7M@a0km*%mmumQGjP+=(~c6Vo&gjq;m^GA_IaBS}!|2hCye_4J)B4g)w zg!J3;p!L6ZV?9UM*ILah$g%h3qUoM+RZRbI?2PgJa#g8U=3d8VI}iOsb`NJv;E}IJ zZkG(y0J2*6E?hAvr&Zfo6jYWi1S&iJ*ru%l7>N>)LNi?#1>ql%{Q#;X0bs!`{P`_=}NHU{86e);^0 z_x?Whr_yvE@r@7vHu=o+3s1APgx#a5!^m?_+ZD(A41q1|^DEBxv6IUwuYE2&CocSM z1b0p?Z*Dn`%Xg3HKP_Wi6nalCwW}ToFPFBueaiGWJq)=-X&#W9(vkHyJrKUSEJnYv zvpwnr_aJ89*B3DM2G});p8|~*QBwpHH05_%Dk7$OtM~Ae2)T6qyU#&2-v*yc)<0Ds z4_DeGF^3!oZ20R35C@c2xjOD?A(kFH%R`Y4URN_24cVG!|YU^11uYq zRGSzY8v5Zs09$m%MS6Md11$!_mtoBl+_e8QCp=PkDO^hixVtfHf${8QM5gDulGAB; zg0Q~|H;`$1f`SKtU4<(-lLpJ*n_v2a@ojQkfr`Z_;N5Qze~4>n0Pe}~ zxvuCbXOdBB9;A;4fk-^5%|AxTn=6(+06RlP~Q$R18Zb9^y$}$5?D}15! z&#uCF^iA3`N9|smzfASecQYc6gA4!-Bw(t?WRydZh0Oq?0+{I$U_&z%gP+MsLD^~m zH3t+~GWmWu8o)N30oaCPmmkiG6G@mq_fUW^A90%|BXsjK*@O`4LYPx(G>CppYc)%oY* zr5cc@*@}N>2HzGo=xSr35B_klqZJ~!b0gB3;eHK#82%3}SWn+e(+%^1Lq+$85~-`w zH^VbGvnk4FEYIHC3}KZIo$VWDdmix7ssu1)&~5u%0$KA`1#v44NE3b6v{zMI zS~mSeP}!5&BUol#$P`-b8~QaBVQ{FdwcEBaZ1dKc#ymg2rQ0@`&bl*-a$b;<`WmGa zL0(#ZUa$;G3E_`L+b9s=jYqX?swo!zHr_WB8$vm46A-G|E{jk9#Zzbea8@3e0(QU@ zC_l;vKA1n$N>L4u-sY%M@7Dw{5`FV_tL@IM|9fe@9mgy7+uKsKcpyK=gc3weNX{@@ zv|_pgg!3=}SvtT|u!Q7AmFQi9gqrr%s*ms0deSr&N}Yqip zXdshXBkFzC(z5YaRt%n08ahJYe<+`LRH2u!vZwD8@YNM%l;B#+W7jn^N~?Mt3>;j2 zv)35fYfs8>cg>3biTmR$Adh$O_pRXV; z_CMU}00kr;uv-3rRF65T|3(4nX76F?`i~k&zWj}z#}-!z$j<9M9>Km^CX>5-?a zjl1RVs|WyRzpF(56*%MMmx9AEIeXpBzV#r?Az?Gp16B< z&9Q$TJbGxj{Z-qF7{ghQICg$B!*QOWSg8Dy4nC9(_wGI=i{+sEsC~)rA))#1W?8VM z<+E4#l2w{>knv%Rm(4@x^_g2M)e5yt10JG!>~YR#=aY--cCCes5p3+(9_t4F*5%`x z8<07G&OTm|9<@EJboM=2yF9^lF6sSh;LFyx6Xk&UM4dFC`F7oV{E`y!?YYdYQ&?5;_NRzIwd1SVAb#%Ro_9y@oL|4hPdSU*`f~4P-TiKE&JdbKU?VQI;be0SqN+2&^N9z zhMiSJP6Hjxu2AWxhfb)1U5z1F`7YhhP1rq1X>Zt>pYNo00;4tq+I;(UwY*2N0Xgqkjrm)^K`yP>kEh^UOO_99Sg_!@x!u5Ky&(A6 zBJDPc7~d(Zm~k2FlORJp$Xp>-7gUaTK<{2cEYJMwWV4eguhfk+Rm3YwbF}l`^+J>z zPM#;zz3&zRC1Si-J})MDvn*t@;v7x_iKb8A8FE8;$~P=G@~yzsyFxws?!m9s-uNOJ zC5^op2+4RPvxh&6i$TMn2Aw)nQ@<@3$7=ds%E$1D5y_UM!hN2;^;P*gkxDWt*}&&@ zmCn80AiKqgmil2Rrmzj-LA9|{e3`CQ27j2(SbA@Vu`nv%cNajff%YohBX;Pj3>rA0 z%+!1C0DE%}et7h36s46;5E|GOQ7EwYYUnK$G!o-&*QCuv|0g+z;J6+Y)H>>f_u*|V zYdl2y5$3k`<0!PVFj+sV^}fGdm70|3-?Ixzn=w;XRE=*KxY=$F0IHVNGo7q-1wGJZ zNi$q?o}%QSy`?9~m<$YTDVC zxbFQ4>^H-eNS~%b#GKHOl%e9vaRffr&zb4D`7U42DQB$@Pc0MXd43Fh4xUA>k*{OJ!Km`TBlfdv{wV$8`x*CJB z>sVoQ4kOVFB(W06a$R8bH@mS)!?>9kGufrIUUcJY#Sgk@wNc8JjhQd#SO=%S?UPj= z1Ck&MJV_#qR>`3@Gr`Xsl(8~^REh{;RrmQ!uu3B>jLKm+)YK(VKSdDXxHSh)01ONn z7+8oi-!=$&bt-+?%bKqfw|??cQkbJfC%sFYaiIm=T1~qvXK--`#)-IwL)6?H^t`*z zd;gSfF^Gk~Tnz47L%#XOYR{N-YMuBlqn$;VBxO2{2tyaoee~)N7bSmC!$d-2KW;sPf+@HK;MBIah)W3{{`f`XaMqWlq7km-Nqe=`l zCqz-i6$_5sLKnkw)Hw??aeRg4K!T1lYz}L6h8O=Wt@>m*NN+!?!-kDieg;-K^74%0q@OAIH z@{h=Sfx@u`L)-$|v?W+~z;0CEtt~iX+>hKf(t#p*c>#bs=9ysw53;*phIoN4@gZ@Q zFkP@MpbMs=innJ37n9@%0c=KGulwYa_2!ed9gy*=7UowgXRpO)cov&n4@gfJs%)|G<-xV<|^eNGx95eCP$y&eC@} z@fq^Jxzu4P#sMyK*??w7KwJl~mV?BgX?zDihC7Z}gl5Fdi;2rjf<91k5E(~`O^mxk zDvqXc(YA z^P#D2x=(%Tf{WDDuezxXn9)s{Bwj&RbT2dTyqcPnV9pSBUomW-O76z>Y)-`D_m zr<0G1`kFJC3liBVb`7q4%TpH>dWKF?miMb}Ld7#X^LRf~i|tI&{c4u2 z?6XH=$Il48_Fx^xa&q4-Iu*=+8FK3>TgY1bmBN3r&b~K{$C)#=w#VRgq2KC|>R2_t zOjA8hjgHib_*mg*eFc!}t0lc5v+a6=Vpg0}s=GRFJpIV<${!f?kX*oJ&IWLqW2On@ zoDn~%%;!xjVX!44TAle zdzg6qXwdzmxp*bb^)YzmPsJ}_WOJypu;fqW@_s!;><0sk)97t08c-6eIfrN}Czm;3 zwDLZis-oX$cuEV8uS8ra}ByL>R(GOZ)m88iSM`3R)MLlyjP=Cm`&-+#Q;Q8%gOvO z(U?#bz!vDD-F!^`{0=7lgeV{{{WA_3GJrZq*76Xi*n>kz%{U9}rf`7Wlr6BE+NH%0 zjt*fgV@UZ{29XKVDUUVb;7N6{!s1ZFs?yHq!!>vtIzm zFnfSAJU$CuR0X(nM4OQ`#^_e63d_z}zcaC~4KZhQQHU;|TLtMa51MKrQu3AAO5^Fi zE|04*Bif;tr_eSOg+xzWq=>b=gKLMwr#goav~(8S*iEbq!7{a~QVpD?SaCx_8)1%j+s)iLf@2x?*!?T3*^M z1YwiAXJ7PV8&(Ha}Q@l}hnNQ@+P^oJ0RjNeqOESYJk*dAjq z0sjW8lKW}1%QvMxz(s>dxzKgS@kksu{?3_tZM`9ULL)9CU(`&v^cgcW;w^=BhP^am znsiN(Sdg-`8HO)LDsEeW2AUc@0y#7td@&tsQ%MmS)w>WX;8K>jxYxt`bc90;U)asj z4GkSMHCS5mMz?_RuL7@GE^Q)k;P8`i#?vX7>vxct71#L6*YK&djwsWk;$CdvM@Lb? zGH1AK0PY3x*wPHTrup%j(hPD!IAtq8bt(Z9#iV={H8})o>;pw@?Bqm^iR}F9_MH;a z{6vk7w2$ANqvCs~@Tie#@u-qP}S^LVI)s#0%_P?cXY{mTKv_7_| zWh7{E@dy~j7LSib14>J>Hz=((BR@hV0)xr!m4SLL(q&Z%9F755VJ`(cWi*G&M#He%`R{+A5(zo``V7RIkjq4lXCf` z)RU1&)wVs`0++8Bl(YRyuV%iUaeHy}+gTsuojvd({~SHO4an(%Py1iV)L&2a|BsNV ze;={H_utWTaRL#ZzbMpi;DwX>F~0Km1kFeNl)00urLl#phw)>TrGt~BF;MOKJLdpQ z!Tu`>GfqxGVfL%klbsvDEsrROn~akaU@(7?bp5?cf9cBa#N|JyQk=YxK@X210sj;9 zz{v*$J^cTBVs7vHXZFNDuABc(VJ;^Rpx}D^^4~ke`&cOa&m8gZtLCvoe^}}L-XQ== z{XT#GHI!oG`zI(h7qi%a?srttFbXYAc}Rr@lJ(j5R+<3RTnX>V0-so%K0GU-W6>;& zcUoS8Ar$tAbt09Ms!pbyR;}j&pwv-ycNQtnsl(+9#z!c1w|OY)Io&wC`Y7gV#$xdR zG7G$#zOC-#t!-WfEZpCtrUb0Re#?vnpwyis!A&O(uEK)ZXYwJ~hr5gI!IRai+d@ga)2CO2$veA3rkbe6hd&#RR@YG;-n1WY za{At1|5&;MJqY}`eVcB+(ojLV*LdFYs)eZUp7uxjHves*cT8Ue>M?t#_684o5A+-JSldsx%}lJT$?k)-Y1bdJD0`HcUQYvhlB=hpPW!`%^duz3=0kp zBX?7>60fh#W9$t#8)zD~&Wa2?MQ3oXL=8!PzPvhFWny>zq7R`M6cY95`^bokIcMoO zXc>Fi|8uIMnrT3rDREdoVbZMY!z=tLF%;P60qsI}uANc$V_F&Qj=V={iy69wTU|&h z_q=|KQB~gT9VIIRJ@hOwau(;a10R`-3bsNsAMuhSt;iD|p|Tm6QyCb%tCxsv_LPp@ z9jbE1?QGq_++@Di1|9borpVh_vvR5O+#ps zN;s)$#lTM;dGwJC91Dtl*T;6I(Z%`Cddo}gROR#o zo0*o*FFF^ElzIa*`YE@39*V9fo)oU~r3Y^`>Zc6}2+)%$osWDN?&>Xe1i`#m>{R$! z)Sfy~m(*7?(UK(JTsPh5Kz&m@XGa}uer~=ly*&7Fx#KEC$~Es`X14J)dqMO|Q49ow zRSyG)Am)`6LH)X>^&#Z>j?%DeGrt|3U=B1-Ffq))Z4@posY5L>^W1u|3-1@+ND?O@ z@T-Qm1e0Rzecged*dJp~IWiGZJT24H6dH9J$on31PT>wgPn@5FZdp7UI)n+Ig%xv~ z2J)5jWCTF;a;OkbIgdbX^i-F zbwhIKEl2UpLmBArM)m5wL>%KlUj%_hrX%= zg+?&lV+vJ(2TK@S%cd&(wMs}2%2ok5yv|iocQB=Zs=0!MLnSK&tytv7!D3!u>g0N= zm(e-v1cy6EK*Dd#bTmhTYhVtQ%s#|?v|tKiNnx7G!>r}&CHbBdCeGI~pcp(%x*;A0 z?$E;b^>~#3z@o!eU;qd0VNh6-pm)*$fuTU)95O-!j^4wI(o7_|Lf3V_Q=?x{A5UE} zpmUEN>zyE=D|((0*yqs8qgnBbLc)4kjCgX~YBYGY%IOixQN6i{q4ONddDHT~ER_ul zV2g8q|Bj{0C{4D`g<#DVv!?;D3;lq%Z;m=H5+9MJ;D%{cg$*CrOZ`$G8 z&^7a`8kt;-8`KNg*>q%|k&S1V)W>f-9LWz$LD>fJBP_bL!<>!6V$|(}2S={A?-xYQ z)^Qqzo9`Q4Z@EsYT?MOdxf%hblc6JRj5lnf@Y7qNMn8fEO-EXZWt#c~@+_KqJ@o)eXT@7#$7)jw7yOLd|~VJnt5u%2!`t0bC8rz zcsAAoIyS`Tiz>n)V1h)`mE*N!Nq@)Gd=xt@+swk6BaIWR9;%Dz<9EJgpWZQVnF$RpNLpf;`-~M z>ir@%;2WfYy@f1xVwA>e(p$9sDiNXK1ac1PR2nelI4~0FPFXi}q0YQ6*-8Eudoxx- zJyW@y{9i$*IG3985Dqq{!uEu5rE^dF6jMI588(SRX7#e^Z9j`1lODD7YhJo_vdZ*B!p-?|ZOPa}7wovn=$--XSGFHgfbpy82 z#X};k%@G!?prsg96_r?pF*7`$IBg8qW^r*SdEh}_{2j^Q$07)DGb4Bk&BPBrd*+N5 zNbuD36&R)Z!_zsOPO%HJ&1^@A%NSA2rg0X*;8Ytp`Kw!J8BD5^PO&@fY011M!fq$M zJf0Q1C0)ug{&gG?VIqele}O33n3OS?d9dKo;hs^cMW2XPprKvxlvMRDY{WQ z5RvmMgmctdE;ctZ@~ii_8dX~ke@*z+Q{Y^2SCIHrZdZ`~IHTl<2c}uVMzgJMyuI{@ zHMcD^fn2G8KxxtMa&l*tOmAVw+o_1j{}pT`TGEm-_qDI<%0gm$?w56x!n4MSsiGf?J0L^M?GNq23w4V7k%f?P^V%8C1nCr-i?Cp zl@bUW9?6vawWhPI$p|96efl%OG}8zVF$Y+?S{dOPSKgg8~;%%u`2p7icWY4nb;L2qgX7#-A&vYoxf!m}+0E^m&B zk}tOnm8w`2c+b>85-MRPK$tA(;TSB*=nwY^LVzzN1tp;p59oXFp_#sbJLRNR!%Wse z$vcZ!r4js0rP)PbQ*-t*mOO?aWZEj**hn-U;Sn$ugTO4pDlDM{QZKc-oW9GD@D0x%FCtI^25`U3 z+MY#+K_yEj9)#6mOKPC1Q2@Et=)Gw%#W0qQaQ{^f3)9|gR`i7PNLT>+4+|1H`WlYx6e#~ZN z^^Ne?->|*c-f63BNXU+=Zxp`P$M)tpcZd+eKedUt<2ue@I34NsYlfvu{lU`T9!3^G z(~{-AlNyKI90(Jv<0cStJS`4fEcjZrZ>J6yXFY(XpUM$rp&n9XJz&OOO)sHhGk}Jp zh!4sATT>TSMja>8Fs<4JX7L17y;cxl(n@9uZ!d|=*=t3~5er*~oG}hwg$UZH^9U=a z72`ZsLtM(TD(VhN@mPW*3XsI4h$8q0fyePg@**xva7BBLLFXoKB4fe11voMjse|Nu z`b_3NpX{q@Q^=)-1z&O~Kky!*l#X~GmK1DpPh`gT>6Xu>iAHuSpFaNn*nX|lkv*+% z6@+EXI9?{hsB-L;=AmI21kD18nR36&bL1WF*{ zMbav(xfUCxc?=B*U&H7%fZ$9DkT!$3LJsiJ*wB1yEx_A|sWiA0R2V3_Pq?ruVp4&_ zw(?d1Tdxq@DBqV@FL^7(uXl^kKkJUpyr+xKIMVN*a;xQhFVJ}LNfj)I)AjUiWTC;7 zjnZ zh-Utz5g~WR=K)_4LRzMcL~WUiKj*F`IW86sj7oLf@PLYH4n4V`1s&{!iJR zeE*$lI8L_5dO_fu$=JDp9{ov|*#C4F`-l3xUkK%~I~Mjpmwu-w-2DF?6&42{0J#2G zDUXi&zf?~g{EztS|GR2lxSBdx8oPTtTmEyG{yRb}4t}6o@DJqm_bzb)xtRYSFs9$<&c9|%TFUYsB_UDvq)jK5Xt}!_ZEk;9Jtb{f;d5(-Qmj}`&T+DjAm8Z5C+addJ~9qy zsYPwScfIN(UEEB0SX|wt?tOkP@-2w+&e!wv^V_G}qoWt`fhk0*X6c-rouL@rJu`zp zr%#;Wut(W&VXvms3H_(JJ7*8NQ}^z-n??N@a4}i40z$Ag3sWNnUHS8*%y|mkukZF2 zvqmOE&d!%JtYnWd9{?R;_h!;<3$SfU=N#V>jqY&OY25Ih@=5Ssr#J+}=$fcwW`}l6%Pd zNFQlO=X>2VGGr=B6G|LYpXmwLhIx!$Tfb5o%vcOt*VyXgHsXGn5Zxb|EYf|gtq@~E zGJ{64ppdj~oF^%1mJG{0=bTK27rmdp`e~oIgMd8k1#dFL#=vNW#m+l~`cUs|U2!eJ za>cEI^nPqVHL6W!W!NKBM9=JGgm<*j&wWeZr3Tf}o=0NTknSPrMt-?GlSY5q&@9|f&aLd>%A(mDp+gf-44kVO&lW5OdbXZ8Ua$a# zohE#2P`oUaM{9wRgMhkdJe5r>T`NmD!&4ysjGoX#T)>y1;Ym&bhP|~(xFsPD139h^ zO`4gI8bnya6aYI`igON#v7wA}Hy!C%owqD=T?_cAm}M{1w%4KM;#w%l5#*`X!?+B( zV)flSEo+|mROxKR*#xdYcxW;*@h9^T+0i~Uu+D2JYdo0}+v>n``pETieqnEmZK<|$ z9Q^)?>rHjf#L%;}WD+jSW0S#@A%*jWh;Pn9sEVw}sg-{4LXF$5-sJ8x$MNiW7S=Bn zL(c^EA5Vd_r5@a`SZ5b@LEE>wE(;TH+2zfjvynt~a%H;fem^Wf@K9 z`G`qgkWuHFLeR$vVytpfB)O71)W4NVP6>D0eQ1tL`RdNg+DVd{3v$ss!}PLtth20` z_2f0@{pyo4_AQvU1|4mFT#t?;)jsE@OdXvlF=7D~y6z|xN(~H1c}Q&!PI2e~)B~Uw zw7~cvK-D7w^&CUo`K<~MBnTMR7hqUucEFJmFsuP!SW>{S)`$VVBeL)%3^>-SlKFM4 zCzJ1q10hUVKwVu_*aw_8E+y#cZvpj?KLCtE)CM&V2Q=m>jnh+Ab?kY(lb#r<_oX!a!=66Y5&M2&@`TJqXz}eOdOPQ%BjkY)N3W*1l3K~*$ z%O|9nLn5?47(ch+r@ldgDXI0iu-emP_IToZ2<=f}UJ6URXRUo3GD13@#)%z?WdY7UP-QR zcbvYQpBrB}YE5tPezTk-X)E%-HhQ1sk0 zIsqS90?+9T*2LcMaP6et;zcXD^{I~G3BH#@d(YROp-u7m5fPt!W#_3+li&Zb8i_bmlO zv#qz$J~uiXqz@|9xq%}*P{clDNaz&FgAYqE%;b4PE5C0+rMr0e@XnybJ36LjFB0L$ z6y{)-Oc=n7IuvrdO>(#BrQ2_Xb$g?~nj4B{`}oSg<-Hq!dqPXAG{)(ruoXqXRz^5f zyaG_yKmnr0ysmMkfqBLOL``CnGbI9}s}9QUk_02tKs;)!X#MAPfLR7_q?jEe8<~T$ zeLwQd&9=5{i^7^a9(HmdVdDu`3oC>@kB)WebVY<4mxRI+SZEI`t<(Ch&fmGEzk$vSA(_;oi>o?>VBJm12}8yl z6P;Dsb-%>}+=>Zs>&Kc(uK`@$=W+ct(FUm2{es!x$>os@y(IUe@wuWf28N_q>M23g zmdB=)Ftn&Z<$*;PWkRV>gL<#D7OOis%pr*dK4U;UgElzKfzY*4sz&vZtS-=gumJ6c ztxb$YK`ngRqJ2vxMys_>4;sPIf`BGI(H%e5ek2kUwtCH%-Y`qyOlfI>1%PSnyz{Ig~-Z46v#HKXvhf?9wkGkO<4X^3Kfg5I*d$W zj_SaI*i;J8>e18o9$v>B#b^QGSfOd_a2}o>O%(@?I7ZPZu7wV0zDwXM8P0l={AE_Q zjeCDXT0(8e9EOn_)PgA}XS9fvCyI_156=gS)rPQeQ3!*B#&G7_hQ*5#*ajLAzSn4G~N+~I72~})$4W2q& z+&DBb;57X(goRH;7~Ccuo-rUJHaP@Cl7t~nZI8rAjvz%%4KBrK>eN{ZCiA2kaSq<$ z&lOdBh${Rpz3Gx&G=Ky^C7s?Ru#8 z^mlLu7tC6xcd~Sl#RY7iko(^7bOde=vib(Nu9f)Sa2~e$KB~PE>c|DCzZ#%^xQ@=y zADkV5gw2}O0QHy70@PnN%MNE;WrP`5>Ku4l76sa<*ggr9-B@WYiw$^R8>i+fv(+It zOLv9){`v{qTv=};3)))8hs!#LIKx4~ij!NGt&dq$4Nqe#&93z=@Z>k1u4K3EpzP-` zK9lw+#Y@ex4Lcia2==qq6Ptgb<-M;+%rEfx{Jm4oSAigpN29o36Sr%MU+6uiah%md zvz^?2E63NAEqU3wsXX<9cXmJLYowa0IH63rkN&rD14(_oo(|Tkd$fTPSuRZZhqH+9o>CnpoO%| zRcR8As_V-7q@I)H*CjzrWFhUX?p^?{A1C(XotVVoc8)8*3M_1m&^c)-$RDW3{BukN zQ@JYiZE!Ret_CRLD+NJidbL_iWqwMaU4>&)s`9vjX{e^*8Mw{7eBVD&M}t}h5=SNN z16otm)jT`$3(1P|LpkGBoi!|C@v389uHLq0pp4A+!#L33Q8qt@nxWuPvXn!5a-y*w z1E31JW@G&O`&B^ag9mgz(L*jm=>2{bAF;ii?DwlObJq~eY49|kC@^LI-UVeTtG(M# zVpa4-hHBqCT(6kH4%h`CJbBX@EMA4g?MU^|2Vm8%>vT!0KQR#)o%zDBuV-1q`?K=bCua{6oXqT9o{~?Ok<1YejOm=4}@t)PB$`wzr*q zbtTyTH&kF{%kLE)4DC)p)?a<0cS-cyd9KN>{dJhaIe*G8Wt5;~%1@A-*}wb;Ia7z~ zSGm9?usF;362sGMT~pK7?o5~I5syo~yb9^@B~!hu%zlw5QwQ^ZW>9|>zx`XA@n1zH{|v-9 zdH>D|_zxgv=H~vd$K*fbljP+6!v+YB$v?8HIDtX&uco_yY>TbCv73k6zi!T-#ZCXd z{)?0IANnrYY~{&xb#@vj7IKAvO{>JLg68*fBDhoeylzefld*fXw*??Xl5Z4!HI6t+Ik>L)+wYWhe%k;c6GCgIq{ zhID)TZ6uIo(y*f9jX@yDx9Y+a4zV4dsz!E`T3 zcoN|c40I}k$#DydL4~e%WAgOSHcsEJ9QvMi4C*(49{Ot8KW=E=?YRMYga_iK}S~j$}jTLLz=KfF)JVg$>C zy!e!%9A)gBX`Qj6d9K(mCNOd@)I+0k_2rc4k6c)kEOzEXhxXo>sv-A2EHnxymU3iG zj}ahQdzmHrI{9{O&DgtSCBrH*tX$FJF-m{=Gz!nk`>A0iml@a^@~#Lc4$=LW1KO<%{wP?0HPZwfClLTr7F zYK91@<|H}eWbJujMZ7~6dtwzeYoWn?shM#w^Oq!}eCx02dk!AuRaOo|Oi^l&itQ`X zl%MFciO;z~n+dJ0o6AW*8*nQ^*z~4{xji~Ky*p1?hn8{|pL@FaO5-a&DX6Ua>ZBX? zh}#pVPjg(wq|k?t>=GSyE6Xc{%juO}*CgYX(oD()gmHJl`TIwQ6cC?Xkd21A+0a5O zKCyyL*-TlOjfcG1-a;+zA|npb#~$%n1ylwbx*Gv%6+A0@P)nRtFuX%P0GVf%3pVX(l1SMBGjafBfwpz zkO=9oJCEh5kZCBi9aTD*v*Z(2LBE*l&aZfyGO z>uA0^F-wZ+bL%jFTvsxy%qXTXxi#jsa?;@Ke8c50;g_o}I={opwCD-Ql1<=+SAD1V zYqgz~64aWcO$ z+bAo)5o?MD6Svf^^=?w=mPSRfs6-6SzG|;@FFW5#k7LK7{DA1Z{pDWumCU2>9ONfT zd{6P0N%pjQ`f;0zo!XK7TW1VQXO#HNt64k~?5R>Zjm1~S`o9}tP%e%_ZG0cXI_FXA78WqSj* z%$_~)z^*?1s;n$KdYmn3m1sgR#=Ty3UQRN31PuyLfGi!TJuE#PJHxK5kz5T=gz$z+ z=F`!<1#dN!#p3ZS8!1%9#}w4Xw!t{qS<0nm4??+{D2@epAhxa2T1quXQnjUcC-u4c_4347P|X%zHYRU=xtU9sGLxdO zK4O&AvNfpIM28<8J|Bn24WWj|`LEPLeZ)SILd*B#A&W_Bf@&#hS>jiZ9ET&doQ5E0 zixRsjlto^NDU%NeMWB1llmN%+K&iZAb|Ued{G^$D|E@3k90$#6&1(m0jdrw248JH*Cx zWt@SCam4$5GB+mj?Ttf*bLZ(eE%$zw$H!CLycrH3u2$k5YH&yYuuBrGWnh=@xJ6XC z*n;@Y>vd3Lj(v^Oma&!h9i z9ezyK-u5NA!SWJkPwPYB9K}A9&b|&_%4xqcR@SYd!rBGwCoPqd6|C;pd%xs6YQpj<%(PrRZABHUGYWq+wRZzz@%IBYMaA12U>YzKRw4qgXGomFd zJPtC_5PeSZiDc+baS5V6XD~M`x}M%Qq=&#(9UN;y&stS79IHgk8JyF|9YC!xV5hLO zR)W4g_aIoT^y;?Ae~eF=R@Rn3){snB{dJQ{0B z4f^OEFQ4>})y1Xzl+A4%h3w?_nTS5gZhuD(j~;+Y+U`wdh~}wc$gh=Dvoq%^WSJe1 zLcpYt(j(u))tDi_v|}q|U}PhjRHRcTZ*0-f@l9k=yGlr>&!%knsOYfDgDnA2Vc z0ahzqA3IJfNH7a?;ynov=gT@e4&Ad{J!A6NaGY!RU;A*4N#XHnLHsNuz*A09Ks&WO z+r;0MX!~hyM`fvy@U#zm0qJ0}XL@L&nmy#P9lBVf6xB?FY%T606|~tl3Bt>Y9aJhs z-?y-R;2!YxW+61Xu4pULA7WUvrZj=8 zS9|SO%3vj$>Bt7VL^HWBU2VLoKcCDZIuRA?bo0u>e?yF_Q3{c)xg}GD`*8M*sPSt8 zg!cv-%r%yORdh`8J)snNh5XG|q3zr9D#bGycTCO}(^+!#*`erri{u!S0JZ&3e zcpV(rE+S6kL%Zhvp1b;sOW?;~^r`exs!%jMXlZ#Qg@RNl5ff}{u?-WIi-Z(BF%#8< zDl`bZ&8e!v(c=Y8S5xW1c>`+I&NSE1{_G33&&&7k59%z4w*a;3yQ5Z*Cy#{663PDf zAu=-s_jbmV2ZcvNmQ(dxcp`DmWD_m_c5oM{>x6I!L>>Kr4Ie4|g z!?&XfKE@$)w{ip#)1hRBiE~%~v{{W0!{SY-HW50(W5M;>r?9KBEWmn*ig1Hb$RkSQ zQ?pO8J{`TFi&+Xr6y8ThqqRN3Vx^Db#LNtO`{hQ0nZE|roXGVf4ekzeB#{lgIqVY} z-0Xlf<$Rws4AV1=LPULhlrN-`=!>Iuv_j;0 zpd}^$6+?ipn%2iXR!L?7Pn)%caZg9mz3lw5#w`I^zI{EQ{vIx)kouP`dDm zKIA;`(~LbN;;c(&n|TV;bN+EQ&3WAAjISu~i}0zEHKYk+$zRZ`#dE+s_igGq^X;w3 z75>Q5-wLh%D)RZi!MJ{Lfd4&e>fvAa{omm^9Q=3r|81Y+cnI`Xe{Wg?{KVG6 z;h(St5Ac`$C$i!>K?%#>TB|#J^58Bd{%>7{cMQkU+|m|gIsF-N@jm!7J^A-B4hJ95 zeElJ_dI(t3FPRm`ox17oWmcwcX11VQqlYc|Mt|3Rlc8)<$D>DrT-^fo1d3-bv1yam84op-NXKSRx6D@e`H(L3f*-xA z0*vYMWK9Hf?5cMoPvHvJKc2w4QV=$G4?R1_to8adA)@PM?a0}|CBuzZbo%=u=Z`pM zHq*9H!#UL3o6&^y<6h@3A^)qQuIr;uNDfA8*|_4agns82YqIIb_xT$}D~BJb^Q9WBca8avaM%2`lLKtTyWY;$_Yx-9{JS}B4v)SXV~Y6u z9w1ultOE1jYcfa1=NP0I_-G~tt*S^L^ReCHT}5kN2fiJ6NRz%KYLDz~$H^PvG)Xq* z4IhF&wr~$IMHz0aB=zQ*Ih!{d|NN|vQ{&0{NYdjUjA%8@!H6UGj!%Tqn=ga6T5)sY zaQaM74*4CPC+tYDrR5|hBr;ne@jR!TH;MNA&MTIJGHoHDC^NRQI6{{aud^ERi7pqz zI0iN8A!E>4fYd2BExz$GID9dT+)xIlBt`0}iBQtPi3_WoxgLfRfwp&W@C4Zb z$!kF=R|i9qdZ|;qwy|n^M${Ov&9yl0wBchB?{{GqOvam&u%`ZT?Wf{0aZ< z10&mydjBonglsip_EjD#y%^Ma1L2#SBSY)#nHMPchXWHTxpaz8Om0@B*h~iX34ByO z=Ed4>T+Ht|;C7f4ZBu&N7E!|#DP{G-Xh0bEEO2|*9F_|a@};F=28nn%VQVbWsX;C- zClK9$+?7}}Tnmu9!VGd(bZc8J3Aw|E+#D6dH#h$)FrF!9u z3O|qVZlKmgHi+kkHziC|2FR_LcaGLK{#AF$9-ejQc+1L%mNfR3mf=!gyn2@A{bxYoW< zY7qzz-6$Zz1#bsfCPbL`SbRWug#?TpDBAP6pdFSJ9`j8|Y6KYbm8cNx#0YsS zVUF$ZiS#_8)!BOlJ}e@w*N03xEW-D`wzNo4gj+|CgpMoEt=M%0y?esFC;c;g67?x! zB5^aXZ>f72_&gGJWrf;fN^#xtvz2PT@L|Aq z#rwB^q%pR~o@Q-o2vc|8gNt8P@i-{gtJNFWFZ(4R$~KZ3GzyzOUN~%hwc}N_y_J#h zJsWHMRlDYV)MCxorJ}lH36Uo4tE;(zIdk$S587`k7mn-RB#@@VV^}&1GW#y3_ZR&b zKR_Szd38_fh5nqwtfk+1;l-w(rT-cUb(VHDrfThdlt`O1)Ay_|h*67Xg8MuVvn`R7WO5B-v-Bq+vW)Pt!00~IKeBq8XWvfYsjY&|D154$KEB9`$ZqCEo=Nj! zJgYXY>*c*P1U{mzhKF=1E00y$25E)fj63Q&pwTQT`{UC!m2~QKmMt*P`<78N)&I@gMf<>>w2v9xOvtr7 z=2h4iEra>or4yg1(70Dm5W;qLUzI9eE@X@qOIvZU@&8Qi5gvY8Gu!sC+*_S>??k+2 z{@by_#fS^3t?LQQ6IN2qrD#eq)*xycR4=59eS(k^ z@&3^e{9GhxP#>&M*M#@JM7z&XyJmNeQ|e`1k6%F4YHa=dx6weC59y=uFWGIM_!Gu2 zs(EyrG9J8fOg(b*4X2NVZqj=4jf*pnj1u-eALkoY;AifPTUGYO4!%MflN{>=a(ww3fXr?L*Vpn^xhp)7v@jnxLN3gS?fJ^%y! zQCLeaARJ*)Son%F**XJdaZzI-p;4vCBa+2}ooF2(H>$EkeI+%4m7;fcaxgoQ)Y+Zn3~iRR>~7p)*7~EY9|lWrk>v<#VzHB}v>{aelWR z@duyCtkdC9!PO=VTy4bXa$>-mEwWZRzjPBkQMWB`3%6EOx3Rg%Dl^rxDVK4j{efdM zw5UD1C`VtN-$bvyqg~QOFXD{V{(X1fw{2o^7=$o8pB;&`uQTuS7mB3 zD(LFO3z(B87DH-{OPko?&c5vyf4}uzFx;W$|(VB_`W(bLGO19F|wi2dMwkBQ!Nx}^1kD3^rbu*=X`Y(>1v2NWUqw6Or9~a zh5-S(q#)Lps*Yuf^Nk&t$$}OfKHbrV2rJk7icy&}CuQ=S=yOSXp*OhO) zmm*gxPt1TZpba~=vptC$go~FPCh~Gdi>JcMQi9|n!v4Z!wMt^(txFYGr7kLuRENlO zM!#YRtDz~9m11;xO>wtu8do8@JX+m7l4ZJ(N>y1SC@2GTNNjOj^_h(46vqjyTbMnoz!KgkQF7P0X-RH%(cHsF--mD;kixMhOEx zC`|%#zfd<)(=p9NRY6%fpz)(=Xf>~>Nr+{gH%7bnHHi}#j{0ZLTjvg5$9*b@Gk(MU zI=irE&>p?dZOOx)qvcW4k0!zaixa=e#d({fI zCdj5+l%WWiJT6D7Z?4+1J|cVMs66JT*K10SSipKhmYGr@Cr77z{6rwi%GaHCvtZLz zo{Z~vpU}HJlgS5M)FmKHLK;dv0dQNC@NG+yU(hJ_nt7?jy`QRx!JVDqa;qkVgDW%q zDx_iFczFgBn+}Lqagz4t1h|hrDA{8>cvd6VE8ZV7z2ICLQnzo(E?I-9Xu`H|Uh)!X ze*dIeVANswxV++%@nUGAcOY@??#1r6=TCTfG=#bg56M0UR-lQ+Mf$5o4k5KrimT3J zQL;o0A<0VyK6RcJ2x4_-|FkICX8Cm^Qft}|&8V4qMa>(- z;y{9zVX{h~?gN!4@3HcPyOf>Tx|Eb15J^$-@VGR|Dv=%^QF$WfUQi`vf*L2qrJ%-% z`ZQY}tvU`|*W;uG%b}RHFR8cW+~4dUH?K&vYwrg35WFnJ_b1vw%VpsojXyFayf9+a+oXTiJ|(~L==f>L zb1TyO>E}H@^h=n(qfboy_F4+k%x zGIxCDp9={7lK8k=di)P;=szQW0`%k$HUyH#!M6R5o8kZoSik5H&tFAhcU$zY#EkdB ze@39j!F89s1KGD01JWqb7NC;4*<{pnVtRhWc_zA6$kH~ zAMlr7@*lzM9DLwF{XNOMJ2?L{r~30j`rkMeX#8KrP>W7L3>C1Yz2gp(aCOJ2k{m7` zMm_U?h9d}Bg>k(lm(^4;e${H%Vh~M35s`+#I{r@M$?T@$?2Anjz^Ojn;X>J}dpp1RGW5X1d36VOdb8=N(Dm-G$f*d%Ed(3in+CLi z4S7X`z&ifWy8?pO-Va5tPe*&3L@r0!e+G1q+RLZkkt&%#NEMJ(1v;fmwttQ!_+CGb zAv}Z2USN1S8*fd(-JX%HDb(D$R$7HTAS_bZ;u`|jyv^1n+^zXOy+k4cF5w>jD^yPt zbSBEJ`$(w)&DWvYTZsm4aIa}sTZZRITIHVdZ$Qy_`R$SJD+-|Vr>mdB#kZ`s3=kP_ zwakBvVU|&zEPK$sjzYvB1Ap~rT4Z~2(coikAo?2?eYt~0%O+8t7{r-D@aY;lU$Uvr z;kvUsnx3=Lk=Ax2b+HPOcH$FIxvRsT^(OoVM(N)-d^)1&kW|cYpR1Na?V3Z$o67WC zNc}>$w-SAx@weRh%pTg=A#RJKDLd=e+s50>KK_{j2cER18g$*uvU(Byq~j2WND$Qn zP)lC8@>>525VCH?wJI#rTDS`k^0l4t-@OYEN(TW#KR|%cp16_0^m03zpUo@mKFtY{ zN7p!!TfJKm&LUz3&7)g+L3Kp-3kuuT{i9pPnWQmkTZ)`>lgn!-~ zk&IhO;m>2OEmZ=FOry|HM_Do8!cr+)R>mmuCI zq(Fg~;NE@51rkIPWw{zPWnvslS!4Ysn|tLPfbvAaI9QHlK)RKYWB0Q@3>z%Nn){35S_UjzY^rI9B!90m_PY`Qj*^meX_)Dwcx&HP{eRG67a2Drz0 zTT`Bj@}>5O^2$aJpxw6?tl#7k_EtLfG(rA_I@Dqc(mC3~|-I&$+ zM+EPf3j`x(6`oL6SLG*9{^~x+Um{z;+s+R&c)g-bHGjq{F8owl07aA(D)O{7B>CBg zO!GOLl*DUk$(q!hNV_CIs_xTAP*IRI4RF#c&3T;v+R0QuDwsEq?)DceTM>Q?OA&OI zeS{TjGrLXk=-x7-&=JL$YPR5y0U<%uhf5cFb83$ciy|&*HDpVof|Zx$UpTDokPKY* z+#z^(&b!BIN_SBdwe+v#mT^85??l-pgH>}=!RlbEDTPGZVM~HNqypu4pjB($M073m zMBq%wnRx_!1?(B%>!5%d;pv11ZDd8h^K>GTiiolVOx}->b4-;|vN>ZwCw3=@ENWCX z8Y-T?aFvyJP(NQXJ+mIL8XW|XiPex_y@oC*WGijYTo4-*Q*c~;D9Fty_)&FG+oOj^ zUl(XE7HBz^-4qmXx7V&hsqYFxw(a-k-N}l2e~Ki!J0yfW952~=vvI>a=>)aRF&D0K zhrPY=9>Cv_bDZ~lE0&Sh7?pwdg1}GwDj|4i(-smk(um2)V zuUqDum?P%zo7Nkq@2z zzcc=}8-L(?Md8oCJa@2mG^9H~GzQYV1%b549%<$6lq0tvIX-h-EmB+TcWDslhIYDB z*@?d$@K~*hIJSa;{RftW{wHnXF}phCD+I+o9~H<}kXyI(V5laW)?i56o!{4}g<=2) zl-(j^Yg!*WohjJ(@Wzm1#-0GVuX*))7y8=pV2CQi_@zjOxhbZ%JK^DHlO?!t6E4Dy zCF0N2zS`=YoW?S*n|+_PMUOGnv>TR#QL8JiRHYu-keGO! zo{kMk#jpHOd{S%9z;GQ|<1Mi%S73A601-Jm$Auf&3agB}Z{pp(!)GJYN$Fkrsvk+6 z6NwpE`nPQ;mbNFMbV*|~T}Q+{%f{+TPFW`~%Q_EBqza^D>8t*Xdx$C)7nBX=7zl?n zpWjXKxI`NdqaNDlc5^N>t`iWZ;Uzxqt8Tfkm8Oi>RhptxB`9@m_d4C-bLcsb_zUUs zCrob9V7sxpurz)*2r7%=btQv8`doY-mLV;r4DEs;arF|v7Qj@$`?3_cvNQBox4`Ev zzB=a->P3}?c142UGSm7jWSwc7UNxzUHn5`@u}iwGw5QAl0ey{2trio6-iI7SmDgcL zJDF4Z3$dMw!Pv2cs>~vwp6rXdfRGTdG@1QW%yosPhycyQ$w$@=n4z&gx>Q;X%;sI$=O)q(RhE|cZCT^r6 zy^Iw1>#`J^Co0U*-g(rC=!3rbD8#RmY4g#z48s1%RofBU^RwsVXAJw6!YjUwM|UCQ zM@D2m?PoNbAl%H@=PulAvxEPq<;WGMOZAa*c&CaFy@arek1=9k*+^T{DWqi9oblGs z=PB~$&25XYqq5|>6{qieg`ubuqsM$7j!a7RjB@2vte7KHA@rm={s7|j~+^@UIgO56)&_~O)a;p^b6rv$yXWz zMpS%GmR(2S5F+3vkPxH;MpOe}MCEm8P2r6mJ#J{r5{uU3pN>5H$nY`4q9`)o2Gj)8 zctup?fD2tBmg-BDhMFE)s=@cCOF=aRK&`Mc$ZD+Tl3@Qa#aG-i^*3L|$no=?Cf@;+!%LDes`_ z+YnVbnSLe@_AV{3vS2J0nI6slRtzu61gPRqAZA#z#xzI%M5A;TzB{!%;1L{5~;z2GP!h8N{MR|Dlicdz6q zqIRxHWDGiSYiGpFDS79L95bDWaEkW;X6Yi?{Ly0W7eyRd>+aggLYXX(G z!#L%cQ6=&|>}A`tKqXOnpniI0wBs*-VsI}f!&~iM&O$)iGiCH8*8InV?d{KuToT!# z6H!5e2p$4I3}FRGk91)LI1c>qCg2W)Q?)kix2D^k-NM2O;4~ew(qEBk8XSCGK%i3M zb0qHCo2r0+nsV;=X4lJT@1cQ_)F@kbh+h|C;`S`o;w4Y0MOS$F_Ur*i^7iaPJ?(ro zWjnJB`qJ|vM5Y^}w}r;`t2?t4tY?9axuR`Bw!j_@V$3YxF-`?qu!Wzpff%#*FO&<> zCq3wQXVbQ9^FB!6K9?3u=pA7A-M8mS+0hCOYxkLQ@G{gd<{ z9W@83p!^BM*yBw-bV=uo-X5UbN*+~8nrevb3NtKrFcIZF7Ubc(sU!Pz^t8~=FQ0wx zz)Jjr%(B=)Me)WIPy9%XvbgrXR+bT7BDhHR`$>uFEo6^iVhFWFQ%!slZ7bAA9)Sv*~o5*$;%l{CIZhM9v-?aTQGg| zD@ycF2d~t)Y1UngVwFvc$p$oMRZM7}DoFT>v1Y}3DUF_DjpxLfCHql#pLVDz65;h1 zt3rkC@HN1%QR=+XceW0i3Z@(R-fpdfu!i0v;XJBxkfdJ+Kr0?7b@2hGex`2AOh*ZX z8ytZ_$*{i;N`{VSAz8cJp-Ovo)zYBR_-E0yJ$q+1!llJ(R9H1!iTmTpiKAxLi6O zRFJh_?xk)8KD|y#e>FoL&!n_EGW%glAHC#t#F?Ibc>azVeq2Y*sgHT@v%({tSA{id&1vMPKxuoG$u0c?(-VcPau{AjU8H*qTAoB zh>tN&;oGu>H$DcZ_c0hhc%qwqHXuHT4g7fA2Hg0)DD^h% z-g?SrAHXSc4#usMWRuu^^wt!CUzz-Q{sAEUcPaMeL+L_1st0P5Mn^Ly!!lCspI@31 zk>gz?)5BYrpQQ_(grp`!`w!!g##yYeor$~0HI)n|p=@-`nv#IOWkENxAZ zpo9_P&gJY_I>8!|-n^gpYRW_O{}u%Pl|B6*0fBdf=Klc#|1;XKUny6Aa6q69d-yxu z{cixEi<_;ZshiIo=K5#8^`DVpaXbJrtp6fz|5fLYgX2zz_4mZ>4!2oYdRUr!SX%tE z>yY=sf5sRJqTK(Rk^WUD*~;plj}gGFf8L`16#_os;r-W4us@5{USngy55;!`D%XMB`6yC&muLJx zF+*pb?iJ6Mm0>R^|t1U6#Stb$h(F|FroUiJ0Vz13IXM*a#Tl7+0H1YV0qy+IP(K z)3w<=^3IzcA(Yam~Oqte(r!KeG23e90ZhbK)*1|ac42(wNj;BrG z1pLM81v+>lA)j0xZ@~wEN{E#!Gx1ez*GH=(Y5_i8+b$1~;U!!P&>m2EglC(RsGhDJ zQS**dwtPlJ+vs*rseR~?b?Y)fec!?5BgTV_88rTF&Z~Qa>gf0FyOH4f#+H0O;|8F> z2`xti`|j@$g12NU9Y>ZxrOoG>5UjMSHM#*rM`iH)|6_og9^Nkw9u z5kV)NVbkw)vKqy=&ALMzhqHlN%m}E(*!zXKJ8iCLKtUp$FT)c#z0(7+4F!z6hGQwU z5oHWP20k|%ypHdgcwE15mXH+DYb%X|LwfkRgt|bhd+bHtKMZNs_4pH9{YNJxThhX=`aP1|=r zPS@<|DGe^i#?mE3*AvVlpD(;KJaSBG_AMWnN z8^Vnor*nhoW%Z{g8TPvoRRKHAG%gH&i;2Ga{}3g$EHv4p*9*V3YGYaKCHTPpiE#tf zG1kGT3=6H=kd@o0FATkj$MCNciAs_aL{ zR&Sel0;!%5{2@xpQ(1h3ZZxzb%q_>M0z^sOQU5GT5-w=vCLgSuyD!_EbH0*0Vxt51wr#J$w__Z7f95G_6LfO52?bA3G2ze$kv#~yc}T*077^{mpxGJ^;twkk{qjZoJ#0nGLv|K%J-Im_X5mdk62f}Df?R1yTv(AS(xG0ZdU+V(hzq)q)y#63mc)EGTz$PdD-fwo)HmlcM~jR4zN)$IQQLQ~sCN&X z89ej7=3m>56j$rEP92}r3UkERAD`kz80M29yRClXem$PxTl~3BFV&t^^3o;qj0{CK zKRz?8dG>oduHNYfgk4`Z|BqDrQAcwLZO=nLr0J)>_9Y}v@0wyar~W#yxd<@PXeD*} z_Smnu_|n>C)0)K*aERUcHMxWU3dh8>u`nvc%trE$3ursCb96v6Ahy z%ba0a-Y`;`U&+aAu$rud8iN?mgwr`+HDW-Y2y69%s$cm#Z)nwsgT&IScRMJcMcKV$q1YJ!`6CrP0YM2%GkAdcc=4d$4Yp0Q*#<4iav=k4 zbcDw>t*2LxWi~>PkbrfT3&U0{TApP(@?=bkk--2y|1%X#$u&j|!I2*VEdgz{8(`@% zFsa~!0gz_LCLb8SfXem?iID&lbBxh?;!o=v7BfI|etF77fDU%#P&}}VZL8%zF59;t z1Kk@mHu2hBWWo4NP5*E1U83*~^!M#OeZCf!#7E$?=wh#PVNj&nCNM zsO)Ly*cP9?L4N+mu3~T&`tgysJ2Uw`>`iJj{fkJ|c)t^fB|dU3#(HVhmn2Yp zCj4OWe(_(E&q001&F%V6%%Hwwl{~0T-;?NM`v$1uz88Yp^b(*py|2AMl$O9R4g+d@K1P1IZ7-f zby8!=kUZj5^oQp#l9OFC^J%HS#hozk{GX!Ze27Frl(otp{ThxU`YX z3C;wu!V!Gf)7mO+8DvufqO=f1CNWN|mB*jj5fa~uK0~<~NoP1=hUW+sM7_tN3*@rm zfKY;B6b0CfsLyG1?n=iA1TP*JRq206K#ilUQzT9?)or00!v@18C3nLmg>yrI9V`2a`)_U170697R`zl=TE3#T(PpFTNvq zl5VeZVn5AE5qD=;mtnPIDu5lt;}D4Jly5^&@JPkN!m#jxhp1UP9N(bT;k#ICa~X0b zq*ySM%iV^%?F)?!T{7}?F-UX!YG^3?BBD7{eE>~i1{VBB_)d{|;t=WL|HH$o|!1r(HK$v)F-xij>8+%WIDpf&B!?VdP zW-kwp=Tl|jcpmy5?Ke!e0OfG2(Xg(&Q(q&HYI{0t6t_}8lZ4CQrz2!9k;9nyo?k>KL$GDlF_ua)J5yrr{O!eJo}X0m@@ zP)mXuT`5KPPW=gg1g+1U1?#$y39yYpd}Y96AquA-%H^s z*uLe21Q*)h;}2o+sPam5Q&sg~z1wiLwfuaDzQtQ1xZ)a~oT10^c#T#r(bxmehsRg* zTWp`A>IR&6DQS(*LvDNgvV)((q+X}Qjfl)UU8hvN6@jt44tX-#PsX5ci3xs3A}|WK zVlFF7qw~lZMD#V9fCtCwEZ6M}Yt5s^4cBBF;8=eJVSd<;h<)6vTMd_%vVIFJm8D)X z0Dx6Y)js%IRZU=X<0~Y3a2on6tdkAaC4CM$-3W3!ndG-3Jp~Z(K7^!3ha*c%RR}iX zUJcDb`>OJv;Y_$LnQn^@(f3fYFz@N&@?x(Z2K#bE7zXN4X`nce=lwJKbMx`l_&s z`JL`>?oRi&Q#_h(yEEGDtYLn3j(XM7*$4Ns_XdO8>$dT^^@+=g>#6jU=1(X+>W{86 zvtEBcPne;cwG#8(vroQw?}wlw6dsRBXg;C7D1Rb~EB&5l#CP<%SPE-wz*P9tpa4tsd+Uv+H zF}vm)nwi}Pn#x7Z&P2-B;t`5gcv24Q70;-Y^-Azvx0n!LZfPU%{Xtx9wUDWB&*VWv zw4fnmDiSZXS3w4;b{P!t#O-*&=%2$(dh@$i!@%0aYk>VUh#+`ll?6U3N)vLrcPj1@ z7h64BLlErHDunr#P7X?Nv=ptLO!X^mO!(6)xWmdLx;p+{xuJDIoaa;-<*9~gcB^y> zJfKj-0U13N%xT2`$K6?m#gVOR8xo|k;O=h0-6cSRySux)yIZi}5+Fc=LkR9paCdi? z;F7P%%-Lu5o;mwm*Z$_$`O)cWs#E>0RjXE2-SxiD!-rdhgxrx%v)m?)ZmZ|(3QkTE z1c|I{hZ4u;LYeFSLVITdZ3t$ZPCA=QB+bl`nU%V~%lt`(a!jfmFx~<5X8QoWSqptB zKyMZi{fy=_lnsNFS&o}KT*tby0sqo7%bD+zQzgV{~YQTY?fKG-A?gx1!D8 zKAp&{eXME~kC5^|lapU2tKsc*D+GRGUX zv)Lg!xJrJb074Mzb z(G?ID)%&=&5EKwFUI(oX3x`p^2C~_S!AvuThJ}xa^go&hRLLF5RE=U`>z0dEA*Irf zyd+gKYk0r&;k?HQw-nCulWvl!kqH@^SZBp>rZI?`ij!OQ$>+jW;L`?svdE{Vw&gEj^VEQw!d8S&1PJpbJvyGvdzKyA|(Lcd9 zroX2Ull^z?{pakq{{mYaze(@^RdU;JsLjgUTGvY7>7TRPnEp&)|C8)C4nXJZ_w2Sm z1oT_F9oL_G={dXYIjFx%xBGjlcY!GWi?jVhexLJquY|uy{{sT~6_BlqgRY5{zUd!# z8i3mVh-&{GYGdK#V*V3q!>j+jE>u&qK~fN@ZKLLzE8O49kE2lt47zXoxiD0oL^P>! zAq%^NfgrYUM=3o1-C3gB7p-*XPfzuSr z3|tL4VhbDbhhvC!e17h93OqU8BC^k3d9ea&M78?6(3(;a_L0bqjF=C13nR%JohPk) z4>#3~4_B=~W$14fkDfP|`oAn5R|IA#z|*bP3?6K*L4*?Un7ZkY&1=Mo2^f0qe`4_O*bhIsWNe(> zvw2Bzs+o7TotW^i)H+Tu^|)KHUXAu36h;C}h;Kfj)cp{u#h%JhlTcGL!^Kk z(6Q`lNMCnoNcP+J3h8IvYjY-k-zfRPVm#{rOa9nMmsmp^`_?K(z#Z}hPM?GKq0Cpn z9a5B~cB`tF6v3)MMMdN`BDl)k(jiT%&M@>kAHLxD<#Q+A}Zfh(~ z=DiIB7SEn`Z(`I$fq+q!|whqp{l4kz$v>jYs>vB z`ERa}1kkkdD_!)HF;zI~fwR?>cPT_#0%r}p+Im*(ZTGjUmYC+>p86k2=BWk>y);?J?64`OQ z={po5EQ|@@QxcFH-nRFpY^nIX(4~R*oz@y$MOJ*PtIQe-$Hyv)QV+?!g;GfzeMt5vwoa*7G2}l+G2mE=x~DjW7vna zD{f0wdO`xLxqTUK4v=<03d1yJ2Th{41ThkX$SncxvoB=O2f#j{E`1X*vPGv1=?7HZ z64LIq8&(B-&nD;<^+x@wo9bPCKiX#|yv}7t0Thde${=^@XYjm^J)#(5v-| zc{liP5_OdC=E6|Nw-wvh{n91mEZfk&PtuiKYU!mJgxO2>b18Nik?8Cxx=eI!Y)gFO z2T_Wiwn%;hx%Lb}ST1ee*0qzoTdqV379}GU#YyYiNbMOs+8lzOX_SIkU$w~gax?QmGHn}0uHm~tY&+&mb{|)EmDPbBm77%y0t;dDj;jn}suk=kY~Y=hD1wf? zj1La~_HBJKQ!SL0wbH;G#lSfhCQ{0*C60O`gQ^-1%6ecdYeyeWMm@;h=*NAiuh3Gx z39oO)7M(Sd6{Xhe_km1imU2uh(&Jb611>yMLf@A5c0b$Z2`?1!%4k76rPNbt42k*; zX+ewzM1oCep)CP#TK33oX~1JeEr`{KNU&+Gpw(3pMn*^EOd=KTR1|fl26SwZH)!=@ z3CQkT6!Z!y8D#O9i_~>Ro;r4Y$hj3^M)~hXw9tltE&aBM^_Eo-;Jr+`+G{J3Immot#R`*x>T7Uq=oIjB-#g5}^!Bk|_{T(W`}H?jWXN z&g~Ct!b8R6l9EB0lQ~8Ml$aRa1qGm~tVN-nq{de10#8iSV!^b|15O z7Db+Jg*@Cw-vRC{)efzd(iYRoDF+7&l3gQ=bTUpR5{$A1&tulWEN!m0-R*ajqc<@t zqW34ckDtv1rhEBvy`9b+Mep_3%|$&;t|vr1O;&xzvbeUfMeecAcfzka+nRIv4(|BJ zvYcfkWU2dwE^!&#!k*Q$-H1D$IBzX{aP{om+ZR{eF&$k-waO@@K_${QCMo(N1>u|& zUi5`ov9e)6#7^Fr1TP|4nIhl|@PXK!xa7;AQqg{!tYWY_;(5oXG>{AiS50GH(H5jU zAr3?49hqBdH^m@r)iIt zkyr#;XG-Sbt6CZ)-+;fUd?F9{@)h`54U!TGNigcZ`oT|I_V1HEEI}~Psk<6Hj*WIn zd=d{+=A(GcoO3Id56dNQGS!08;9)mF5=EL?p8VnS4QBk(TiNQvNfGh}|6nxgu+Ek4D6|>kr1t)3c@uouly@J=!H|oAi zYt?a2*XTi<;!m#IcBxS^EGWVDo0raF1Ky-RQO56gkEA?CDuzwiI~vO(qEDfU4e~aw z_6Nn>0+lP}8}sP$f@@VVtspAq(TI!KML}h=AiW{6n6l*CIyQz6^aN;dc+!LEx$~LJ zXqO+u;q%19tng4VQYD9xxnyk6UQhDT7X=2Os^~|d?W6{4X;mQkr3Hg&RU%EISm*|= zHZcfWi3)>R0v@b!NP4t@Pe%e0XG8}c8q8E+Mo=H1bvTx(=D2Wio9uJv_$^A8?~70Bz8fJThPUZ5J)j^VLv zniB4~vugtOc#G8a(gtNQ)&CySbvvaHa}hxcm0!}%6zUjl(S61h=D6v*?DOh!6}wPx zN2+5x)%jNNcD{_^BdPG8Z}`c5pE&QNW$)o0AC#s9JXfDEx|_kACykA-&IcoSRt8G5 zJTTdHIoRC@x|gs7B(*_9vMDN3{Q4Tii_-(+RUOuii`P?N9WH#PmC)rmv?erkw7hWI z=o!Ifu=~JjgwznU9fd) zGAafRGu0jM1JE!kqtGnX^=L3Wiv`ch@;W8*~iF6t?gWl1`ndQD!O#c zYb8IJ$9WFK-<^nuYxi`i9}2$<2LgtnE+8isEp-MjswsoDC@t=&o>p#GKlqa4Gx!x) zcJ>Q=zh2@B2xk~jDv~g*OI+Z*LEFQq+3u#KALq0fvaC}?QqVHfc^gGBWGTX;P-iL; zp#eP2D9EoHZvvZ6Q-!1)DmI`Md!fdH;+Gb;F7e|_g-Je^M~UfJG5%&0TFq{EV}c~p zYpiezV$2(f%l(!(^*m*UW4qKyjmv#~Jag}t#FzMwa8xHHwWwQ5DOI%09Sa{LqQElx ziN2UR#`&9Ne?IO>Y&NpLVv*d})V%AhbI}l5DP7@q_wF zg4n$BIE_0Ox{!+GgA+O7I<;B-a(lDQ9Vk85$l#~;o$oEKereiyX)ZG^zE^v+#SUe7 z-hnvXt6%=Dx>R@KW-U(pvu?jnmd4dJ`EU}Qpv2W%D;g_g1;j+~G$Uy^!KI8yI)Q-5 zGz|SuH>5>qz7UvfbR80U#d_uD-u;f!3$m+Q3LM>%w9|A9op(s??bDQCdgV!fL3T}2{9+FWf)zAdeBZ`KTT1D zIz*gOfdPiT^57kFz~PR;6=z?>oJ{~`bqP;BR5QKFJ=x~KRk6VbFH*&BOXFxRt!>@W zn%BYhM(39r)5+(;3O{$n#UD|jAz50@;D}4hh&csjG}^CLWa}J>hvP#7me>%9>sE<_ z&=HA?+(7M+h{PpsAfInr;n@_gzCho?o=~{4R~)--|M+-@caX4p+ea~|Sj!Vi>F!Lt zlf7@zEx<>kkKXzYJd27drGy$JBq{`=r=r4o^eKfMMhlt^2tZOn3(CnQg1|%zs>me* zqwX>BX;tCrqbf>YMeAxn{T>@afk7iJ{Mw@0qgCZPx(_99rMw%TzM8=jHkUC*q(w&P zV=^oQ@p0_(aM$DNj;kec{x`ueX-%S_9~e|_9P+Y_-n4m}swY!lDhdc1xEP9{+q(J0 zg4izIu5{>btbNL-IfY8>%2$fJ8_`o)vIzCKwl6(_`A2j=K0zejlSBT!Zj)l9Fe(Oe z6xv#Hi4EdIk&s3$+y5g#^Q@BfTxv+f1f+>^{L;tzOMqo! z?gr#zIXXF;nEVlfurvKJ-RS=Vr~Oib|5XP0-=OGO5B{&qAdQTFMWSnLqi^uf+G^}f ze}pps9|8T+Rs*_%i0L17nH;|q)_@@YOs<^VbboV>w6WE7wEdSZ`ZI0)k9O5BKZ9Qp z{X@H-tdBnh#fRibL}LV8tnj8n(f zDJHucLEG8B4fmZbg|R#jFMZc=wW@ms@C6!e*M5Te3RHRGX~jMowg1lPg186FP_%wF>FraFpBZ6M=I1}-b1$I6zpForr*7P1~I?{I6*Nd{uo%rt+LedrdUYR29al15PU zZS{V-M^HTsb)3G`Z**RHAXw!7`rgFv?&p?1%kWIMUthpmoa83Xf{NvfRF|EgyYUCX z@4{Fy^G6e=-8B;)vN>+A!7vHFAuWj6r$fa^dDQ6#hwu?qS!T37ZY*UT8)?&wyLAB& z%A6=D6@XA@Pj-gA{afNyQ40Wss)^fj{zl#uy7hJJXh~Kjw$|eeXt2`td)bi{CMkh0do&`q;DK10l?IKOMTmP{m{PPPWPxV&yv@vyVmXkm4nOte4Yn17tO?ldKt0=r zq>S~irqzI_)*Uyky;tNW*?b>M#hTbo%DN`Zx?Is9NDs#{NEwfB8CO4!pnzmPtv9d! z9PMfD(`+#?3B`jc5sc6STL#=m`ye>nSfECCHnnkxULD}c61uk69w}tjeYC1%UBq`( zgk)b}?EdBix2J+Dr3lYt`zdHOEk&w_V?&`65P1$(@s{ckcfX)UTM6R1*p9!}_u%j9 z1bZEX(it|6aMdlw$`Xt_--qkPQG*pAL0mg#PCVLK;!)`37X#H-7yzF!W8QciY2(+} zXWh&nH|(@~Hg#qb_%o*Oj7W&Sv&<5v5Vz8$7j`WYoPj{H02X!Ud_WRl8Ch=`Ctq+^=iEXHvHdf`A0L+lKHgN_GGw_L&%@k^OX=~}w@9u| zvT}HTmGm)Eg?Cny3N&~tYgik25BlodDu-gFpdvvtmqP}|MhC+* zO3<)O%gZaY_ECpRfh5wF`afYINaTw5K@vzyaC?(hZ#(5mRjdJb+x>d^EKw}w*=_F( zYs(^s92?&(lvUq|n>L>r>AbL57{;->DzL0@oGhhgw;0j`RP%7b%_@*{BBJ$})1r}B zXF>YiVjvoJ;ZZ%(Aaq=3y9)V*r2(-GsFu-C>MXPp%`8E~Fy5&iBR7qz@C$grNueIV zP*$wG3{*h@i6wR>5!VA^p$*j)z#T|5*w@)2^uTB^C9BDZez8(4;H_N@Oar*LH_1~8 zi(Z`?5PKvs1?bwWnG5A?SO~>z7zMB_qgFAthnvdQ4G5P5Et=BHdu|b-Y2LT{x3fjG z>StX7{HgvfcBCNlk4-yEqKV>8lp{xDjePj~Zm zCQS)4b_C1?(O(zNHc!0XqADyE^N#!Q&9$rdqqc7A_{`j$TS&|C$CL8OnbdI1shRpE zhVhwtf7645MJ9&w^84nS^6{Bef7AVgrUTQxgQoAm>QsN-&n?I4D`F<~t3EI9xSLD) z)Hj}5$2OXMcvP7i;2~yaR^;Lk<;n_N-Z#cl@^vrm5;FlkVyBZ!ZQk3`RgtR?e-01jt>ON%Qm(aidWEz@&o%@4VkcMxquqrX@ z0!n2{O0nd{`cjpJ`K!1oWk==`s0~!pt$8OD+QR}K^}T-Hk^OG$e4}6%#U|rDm{GU< zHfd2b713Xteu1a7H`o5@$6*RRA5WCLP6l>PN*p1z0nAD-xhvUhohU=wv=2jrE9HJHw)_!Xnk=1Eu3s!aZ5Dgh=)e-Z3-rT zKuW3CI~Y5!j2({R*e~n7z~F;;!#kBTT!~g^5bM-k_ih*sBp4$dv1~H!t)C=PysJ2 zuOJ;cug&Uh(rjt|j*v*S>2_t<10wpfr1y5a5%2XnOiR2~f+iUpgaOj|-UOH(Ovrt|#iviG#ENnXvERN##WJ_LSP@JyZPo@|EK?TFf(Qp`*gH%s07?Z@ zVv@IsNx_}%_FZtTQ#CLgOoonLN(6BR5*1v{P)Q2nlxBc%)hKu4tXZwWDNt?GNP?{E zP=##7>uF>>ih@+ZK}O4nflGXot3jb+^t3ML6|78EM+)^YE!-zqv}>o-c+Y7C+hF?A$h7IyJgHGZjwAdiEsL_ zxpU_hLq^!^SkCZavoJh4X>;S{$YT~+Kg-LJ>mtT+P0$W(SgPNRVu{x150;Ko7L`K#%?%t;11rR2g&`G zg`!iE9Jqs5L7+T)VO5uq95!*$REGQez@bJ~WDcT%NRkWAktZp5-g22Rx`9}5SOv;3 zvR1HT7yKHYzB18^cOPXW3c2a4Uf8FsLXsTFly#K^T`)n`H%X^P@RB0 zUP`WkKpB*ml5{^!lF6yOd0K45XEoxITaaM)TR(L#CHQt&L0D(`fGPX93wb68+UZQS z@SVP{_)pYfTiR01K-dl;T2vF?6N|;n(vZ7Sr({?2?ozZa@UZWABu z%<9BUqG#5*9P6Zda=IO1HwF)S=crC*-f}gixbgG2Bb@OTo_|Lf`B>tMIkM7yA$jIi z7P}L+^A1awI!hLnfi{b!QI{eM8045E&x4$o;geUU8$SZCDzB-wfGqHjPb%>7L899+ zwiOxQ@#y#q@lU9(i-XvYx)z%wNo#~yhe8|-) zC@LO#J%hvNBQw(I*qroZfX3U_(|3Q@dj4axX#TZWtL)`+YZgCZv3{u#ICt%=<4mMl z{JmiiY-T9a^*AUy>2cASL(Og1pz_Vz(IP=)6${|f2;q&~Pci4vsnA+(PMXo}2Mzxi zTsM0bsWag)=kJyUOd>kk(fy|qQPLTz)}7)_Ex5;<=v0n;<+vk6) zQ_|^ZWY9j2*0r8BfgTPx8X3XY%Nfl$)%LxCm1YUxWVt)rudY88n}0YIH@~38488=e z?^rQ|bLyzD3U$F7K>A?2BkxJf!p=dKI4|V9L(qgaSn`2o*tiKfHQAOljxbSzAN{IL znsGd=B5}q-*a8S=gW0fN z&MNCm$b-J(SC&vOye?_ODF@I zq||mE&CSV|ZP?FQh9N)5FMdT!*AkczFzzuv)g)Bn09@&js8ebW5l65}-sRKs+s8F; zlEv+8$_TxgxC{`8`F$^(%Z=}7Im?{{#XAq9x5?9GY(_E_f z(;|r``7@4XKm)?!`FDT@U>Zz{01YT!;NG@q08YM>61>hW(Y-S!`K!AV! zwz)(0;v8J&kjU>v*R3y+k+XImiK(k8gRoKmxiCv%V?RxmTY;O2a_B|Pqbt+tPGevb zT|2?lv<5vO^>jay`CQz%@~Ih?zc-R)8Xw&D8tPbvN!#ZhAXiUzw;cR{52jlW1S4HZyPdxc0OJ>dy=h_ zzHORa^}agIEpUT5s%&-PZ7f=A-^^WaPeKY{GR^hayB9dDc|R{CwRlow|z|dEzmGJnuCPug>H0{7v9xl+4ydf zlC@)pOV^k9$tSbk(K{MxW6L~Jdnvo@LPQ8;qeFE6>NzLjF4$N_%;5&jD&}lnSs@(?# z&CIg$ADE@H&ZT_1CPbyNZ#O=o>qQxtXN_Ao9rzrJvvupp7Z`r7{&F-@sBCZ6J1>KN z%{h&XVLLyV*Xq^acxtYxiJdtL&L#9(33I;`uOIwsDGVKV zF<$y)5n;W4UyiTGxW~GxB{7G{xgBsVeCnNfZK6k~8k3PLtM3O%g$&tA3ric#-nLEdZ@-EtQA#1e)!=rxT2^5X4Nk|NclNj0&1d z%wYtSjocmNQh{ypg28TsOBoXQkzZ^wUf@Dpe2q+W2gJ5{zvJtA2r-YOywDvHGR`8v z)*%wo&qBA+ahBK5%IZ>XmDS6thf9_=TIr5jQnIx$I3dj%6cE&Zds6y=V@~r@euhS^ zP^F*S@2KSEdn0_iPIYLoer^y=NnnK@J_O_eQBlRKjsRyIwVr_=J;#GAwmEQKX}R5k zi{lNcZ}QREDc=;wNo8Oh!=uohVMz4wv#dw44Nr=Y2bvqXnPzLCU4hF1J%V#TSyBNs z#@j+=?zv;YV6TA25c-kdPx8(}lUGN3&x;Q5cS0CuZ^cx~5@H)>GeP$7TQ)>_dl+He zM zsj%ze-~^9US6^?QqL?0jW-WH23H#_a(vy{=au81Q`BN7y_Q+MtK7L$TxWD(dGCZt| z<-vM-IPCq0HG!|o)&2)6Gfgiss}O~mW4eJwpaz(JffR#|UVvr;ZU<|w$pdo~%`g|K zYUg-nG2Y!sKe5_LmPF&gu(%r9*`e=9()rwY-Pzf};M$#=i^;B0M&`u@6t{cdu`%~8 zvt6-_jMhp)0&4QeM1QjXO0f)qc0wesZs&@wzYIVBv`$&}3V(gEgqN4dml$Mr<;#5O z)5{(O=RV1@EC&Y)xQit6U8D8o2yikDrmk-)@WgWw#582PM)8R`$V&4}L83e%IcB{` zzb#I;&Bc%>T)S8;3%Wi`pdGym)0}??2%Ud0lnMDp2?(7hqzdKojlfe{_p5B0(@rU( zB}o;;?Uj;Cnhfkr$_P@&)f$1;SHFFDjU5~8GDop4DjAY89#4EY;%QFC7vdS)Fyp}- zBr5xXF~YcM-lOV*WUs#fW46cV4fZWmP0Ix$w~Pj{ssf!^crJpw2XO5HdNvKOzEI} zh01Ae6Ce;O)!d|=@LBO|K@C?qW-Cm+Khj1!!*W@Ph>i%k^{jfJ^36Hqi8^pmL##7~MKO?X`9ejFOEV^b$)n5@bOI zGGVze5zs(ONzZ^MGuUQ1kWcZ$2n6R35+X(-E&_>wBC|^Tt0@DQel8~r;qJ!xrsXby z+e`9@k%sy!#$SICW)1Ax zZ>EABi{QIL;{fejAPWxA>;lLV2I8;g<) z%gKi$eMn3Ul?W<#kr+sqV3lT+82BQ=8rq{`t)fK2tgnJV%2{F~hUFgqnR!e~RvD$9 z<{lWkhij0&m3K!bCFO_e#i2 zj;DxaaUp_lb`JwGYrrc$6wJlIbh6Fbbdpj04Z^ZHAe@H4CO0k@=!zq3w>@XgI>|tf zqd@^ekO%BQxP{(WqIlW!1c#Vdxz%u1vgCsAi0*a|n-$nkUF5xnaMczdTCM4_Sl>kG z+6NJ&T21=p#hrn31y}34 z5(+3AwBpYP>0K84=fK)$iL~Og{Cs*9=$#2wB9))IS;7w8otNqY^tNyA`7LI)ZhFqI zq~C`AV0I_n;{kI%Mj#NpKOtp{`pK^lXym$6y0w(q>vgz8n)EqX?7tWya0-(8NcJcHQjpk>cj-M09YA0{i-d_Nbzd=xaplnqj|tL zmo9wGKyM?f${6a3;O2tw5qd!(NfFe-db!}HmmKlWhq{DMQ%$FA`3Q*zs;uyjWv;%H zw;04^zuwqDaJH1h3?r{!$YrTd3Py*4eGq}jAtNczRG(bkUlbDo(UY9t*8>CL+hi!U z3Wg3(qZvZn6fk8KOO|J9e+}sRvh=+=(rgzy^5*e0H}yNKLvwXpawsMnBT}}zpUqAF zMl~!hIMrOAWg#Y;T2&k-@FrzQ${@=iY-i#j&|IXOZ?(C#Cpw9*8@B!;(qRwwa@~PNdMb^u-VsTRkjuzA;1y>67rv$uP=K%CJ~ej5Z;orEvt{po_X^ z09Kt-_x8Y3v`@KIu`IdAHxlp)7g-6b2bw%1W{{z((sFfF7SK4QKa|MhetGnsRlbbY z5&EGcvn>4MRe_Isu4@X-Bgfc%`YxU5Ne#aZa&w;h-q=D{*FnVcnZNCH7MTa?%i73g zGDce>kGI!Vd9~sGnxeMrckE;7bzWJ!&G26Jx!2iiBR|0=`H<)TiZHSNnI`-nAxzIK z;C~@Ze@_(~`?H4qZ%~IFkdAs5jb|fb|0QAnmr%#h!SJs#lbHXWJRtU8@>RcJ%0Eij z*q_y_{u-t{2VRce5GyA=&^N!7tNzEnVPgB| zApV|IHuhgiW50OUZ$bPL8T(7r_1q^+9RD1|-%}RK{>xzCR}lY58)N_FFYrGG;%I05 zSHlH>U4IPe-@+~qu7AzbTCgFjMfRRi9drb%O;28j1if&x{bwbw{D>v8Vl_4%oYMTR z7?nn~J=Vr|(_8QdgGC&K7Wa;GX9wxgk7~IKUy1?WNkDpE7m+`RZWQpHqz{3|Y~^Vc z#UXIP%OukFxn1bg^>MwWT&g(Qs`Hl`$u9V4+tHF7aZR4qp}l(`yP_Lo>vOxews6w9 zRp=`)dW7Daj}+8K+e*?{M3|8Uc?^up;o6egzOFprNSs+K|H(FpXbVNcXpY$-fb z?bGHXm>vF>R7>yc+qDJRvj9!9nU5#@Kf`b>Tbz?uuS+NSAT{tdoo*j4I!~_o3IqUE z`i=HarNVXucBeb7I=jNW^ogZ{%NuR&Kn4+D#D?0IgbVg+(Yl4ZX-QgftG=LxzgyW= zD}7@iEkB)+!@Bhx&hDtA&;@*g=tjX&d*|t<{_V0m_Bj?utn-*~7G4JNHFC1*scr$$ zVdFwSn$OSUE#^jJU;ui5l=Qfh1rvcv0*p!KyPtEzilIt%L&UOzjAk7u2(H> zFqw`LMD0>>BMdbV!t;vQxz0n@kSSuh9Sjbe)92htl_I^KlZnWdN!38qhK96%9piwR zuE6tiopfc_*Dbt&VgnZQmr^4rAEFECCf7+pl%Iy)^tHgc77Y1c>pOeTGa@>`zka6& z$#QA7!Dk>?;ypEp6c8t!#<%YnAkE>O)S%AgGe9XkJjUuMN>E@Xz3=xl@29Q#TPh;QM_!_(B8Pl zP^BM>$pf4-7t7P_3v!?O3{dcjuj^zT5xG-j=b%ZnTm&7rz6X}^JqFo?5Btza;Mzas z?fW9Q1GM^_%qtBd6NfcDsnEmC(K63kMig!*<9s}LF=0DnvY^*u!fGrEF;Jw$W=tp@ zX>mxCQ9(J~??9GfBzDXw6e9!gy#3x?*+`)EWT>FY>*i9`wqVPrId0@eH71C(ySl=P zrIlfdI6%OZ=oJtgCB;>7V8I9ty#r}PC1$q216ha(j{+4t)B}+$ahdv;jVv%Q`qJ;_ zqUCr*-yM-q=GzD(jc3T1tXDFpR_$OIdGI8}Hdq>saR$Z~bQ)881jY_C4uA21AdKE{ z<{Y8VaGqB$%r4${-=^-p-5o0l>Y5JI7-Z+9eyydHu%4R+PcMw5rI8W5DnHp#&gR@& z1)8*aj~svjJlE|nG6{@A`q~Ft!x<13gOFkVA{r-8NQBayjv~rbh<-VdOhr>_E2gxy zSXZ=qOeTM@lo=2evI80XgUBC!cygn;N&;90G zp12sul37?T4%y(h-x`*CD=G%GFV9B!{TR?bgGr;wTA~S_G$SVuv1zG8hSjE~w#{6E zGz$oOl}pmPqG?<$kw?`Hq7DK6G+&n=82J}!tQ31_lVL~ut)FZ!ZzNt%!SdEydkQ#h z&6eI@m|@nUEy*e4^_a^~Q$cHy9#%j73(?^pi&$GKig^UhBjUuk-J9S`TO z%PkKqLmijwldoe5_+>Q@=Bdfes1KU+T3t;wnr5E%TFmE#W}qS}YwKpqCS0yXFTO(? zdY`G~&CbkG3#Mp;Bo1M)miEVL!69gCo?S2@ia%&JDaB&wOIAw{}_S~qp7oZl!-KCPH+A$zZ0Ti z(Q;y5Nn={PkUBEH`pt>rJG4(%6`dX?&pJCiUeb>(T)1Vmz%-4_!^6f#o}I)9z-NF{ zn;SlevAA3noZ4=)C&V>5&?vQlri%CIi*E5b^9jC1PBwdsOtcoe+4nX6m(9j@B1Lz1 z6rlo&YW2J;^~r9G1hzG)aQQUuJgv6O5Tf)x;GKL zT@Dc^FA@53Ey5bslHlhOvJHI!wck?R?xeF*_y|?zZTeC&N^)gxwdRDkZP_(m@RB>G7z+IhC}v3s@p9)=h{B4S*6%;;x@5oK*V63NOrpGWFYLYw&Td~ zXG*nuTXO=3na+t=Cl@a%oH3B^;aXe5U)WWS+@;>jfh)5fJ%hY4Csm9^IME^K);S=U zQX1jUO9ds|r$;1lDf%ePNPSuCkJgbCOcjU@C;y}n42vNwSFDRL{dyDClsFq5?h>42 ztdUwC%~3;Mz&kv5{LVx~c{n=q#jy;^r{yK;6f-v+#y(^cMv_#Id{v6`F+CCpHdJ8p zi9>_}3@B6jpcBH8rlo>%3`n|OQvh>Q93ttk5R-gkUusc0;1N=oV2;I#dP&!}_=*BG zGb;`f6`msP_=7SQ0tI&<=fN$q)aLht{!^=Ow9LG#N)f>ZW3NSQYw5FcYc<&5x*Hfr zZ~2R(P@2D6WCS8j!%wb=V#1>pyT1~y6IR0l^&D)R5j4M3Z=gbHOh*!BEJVFzURgCw zn&Ke-Vh7B`R=`Yrq=q?-orPg#9|RHA_laOG$=QHi4O(c38>CT!n$XV8WIi3BvVdSE1?}K#WQKDCOgpzDcdCbYwaiMu;Eqw%@E*20QNLd1o{hTm zoL(kNShWvfJNK%NmYr!rliz9#U)H@c%<*au4}@*Nefnw{gzE=FR}k=rMh#i?#nf<9 z^u_umN|@utwxs|b*TD<8P^HPE_fmYhl)TpB?1z1J-g@AQ z?!DoexenoMZe4FRyZLdl+~!LvK6v6w{|cxwLXahq_pr^L*h{jxXp)>p`4`bPiF#Af zC`CUQUm);B>3s@iv)k1NPb6T6I_)t{S(iph|8T8n7~XV&lfI^nv%qP)8r792tUkSAR^u^IItDrl%vClAB z;_b;-3XH1pE+l5aNOef0K1C`KQyU&UFudw>BytHLz&IoV(g4g=O>)PbneJ?iKUVD; zbOup{aAg*yx3J3V&y9A^hKR12yuq}jM}ue8rZdY6g)9LpAXrQCulg8`T!c+UNcce; zn+kUx%Rj;&DUW4mKyYrf2c+ezTIfFG9{0}$K--EeuHN?(f=U1@9Mlw zVWbj^@Evw^f7UMd_2)G^b)OLK=}u1CTVy;Xo6m+LpZiDV%FNG^4O>rT7c<8WADuN!kQ#+jU3)g64^MlpB1?;uJ9;!qz$;$#ygj@V>)JnH>}2T|-QB!Z_Yup+;P)1_AkBHY0H;RLqB|m! z<;W)@3V*Thq7@ePASF7?-xqN>HOiW1YPN7*-hB2+S;q%U|G)tUjM`GH^ffxr0_TYe zFlu#K7W)^<_S~20Gl^f2#(#e6VcvM2HF-kB!ARd4xG0!+G;n{DLA3%Zq9kD*-E9Qv zWRHyte!538W7UBu?tue@G}Um+H%Kg-LSUBND))>?0;autD2zM;r`!>C`f{0iz<)CE4u!3OZrQfw<2cebpim|Do zq6DP954fByg0d8bjX_mVBgAEc4zoHb5HW^0sFZgM&s_#)Xlp27c|tsQy^#l!7-0mC zWKZY?ZN}$b&n+@t1eshxYMER{b87Cq>?AaiRT@ZS6Z!a=*l3HK0y0}Z_Al*e@m_nC z$Jib5?a9IMO+Hp=*)sXLz!%cekzkHXd&Lk|!oKXuph2?Z(??W77vkt=I6s2KVAs$; z?Q$)!QFC|Rbx{TUm;+5ii?Q|Pkbt1j{e5(lUeeJ7n8_hGpA{8>N_Irq)D)3LWJD|Y z87y8QsV_?dQU(X^&kYy`8Xz5T*;KSgCcg_@wnYG!ZN6=Hbw$Yi!0d63%^n7ktB8y9^M+0?r|4LyM>}>dqxD@fuVO4 zMlPDMkvJ`J230(()PaNmiNG^Q%y8cT%nYx zrp~62kbU_RG1rOC7V)*OzPyLgBjMSBKqe!&{$FyfKeL_xBV6l$*NA8Sd(v{)p4E_k z!#4j&%VGPahV+-{#?emK(ALJu!Pe@ZHOJXm{)`y^lPn>&U-DVMWeNS4dKEA+|4(4c z(cK0hTYnwU-;>P6_DfIe7tHzZ{`sY+^_MW`5B+2R&ur=MDM@7erRo2xe|`Zjwr5rU z{~7u*GyO3L04M#C_5FLC#PKJb^oQIjS8X-SHb5@*Lv{kF51O+w5bPDw4xm;w-{#r90gU7KUeX9F=>iV8MKL6y^j?4N=`KzmMBCblRmi3P}-#dK?y+Chs1ZuBn zLf|=kxqU^r`7+#G0-WwIvk`rNP8`xbPR3pUzK*-0$47 zAgPiuJt$M?gB55EH`@)SXq9$U%RhGT(he7zqtAySpHTref(pm zVG}57s+U{P4&gPEsUNrj&f~k8XVmkulzja2ZV6tayz31M5|;LlVFbpkJ?2&WK|Cn< z`qBE`2|2)-aw?tStqhU^o}RrweB#SOJYgKW%dFwc6uMUw?`o$`dMA```-r#KyI^j^ z>J^ym6tOMg3e{@$QFRpT)7CL2;v7L`5&iiuVOu~8T@%O_XUIVb<7>o5y1_gXYm672 z+qX`u2Y7)X6t!nx5Vs^w;%WPZL9_tm4m>u*(T!AVHJ8vzJT|tMR`ej0?l5ywu@ii>g|LgU z%B-#ZS?4{$Md@tw=E-3N`2?Q8oK%m=>dmGw#~yEAoL1e-lhJq7{j6@2-;Q+u1i}eNxL?lB*BvOIwt5jbIdisWAb)yqbq0L)H zati|l+5ywWT&k~3*z$>%>$yIm2_m0%GD8b`A>E@^{m^?@*PAZnuAmT&Z2?nk3`FD2 z{R1t2L=L?6ov8eb01}d*PEn1;gqX!<&!yB~SJQ_kIhh8zF7H{!7>QHN5GXGyR?-G% z`C(Fll9DQv21lc2Cys&fa|+DpQzg>(#ktvSqFe~{`^6Z;oYqM!DsnaDE(0|N9?Yb~ zpV@lD#wZAbqeCqec$E^`-+(ND)B5Viv?yo!p`HfNa~r1*NFXkOMN93V3LQ-3y1F8a z?*GT#TZYxKty$Z+6WoKlySoN=hXi+b5AG1$HF$9Mpus|LcZcBalCQ`<)@SeT_qzH! zzxq$stXizOW>u}K)V%8%V~B4-#O?PcmPD|Zm*hG`=FRpSi@mQ5kHiIpWk4hhH4q8& zA$IU@N1m5Z4f{v8TsKNp!<#Kq2zr51hh^d%cvL4m^&hz>NQ2n% zXD|*+ewN^GJG05c@M!lAsYZDk03w1*;4kwxaJASSR1q1Om=??-fSVy*muCo$p5(g~ zYq75yM#MdxzAWHbKN%!_l-Qtg$fiqMT@6=Qp|W(|@q~g|IfBSWBQZ6}#M(r_iq&y!zM&36XW%`_jRzO%pkV#dfqIH2}H>>dSvP<=J2JqS``_)n=e?WIG7 zuH$uMLGJie(3Q@k&EH@3xNc`&;9XhpAPjGp@(<1&iv<=0ynjB5F1rk5F~42z-pY18 zjV%xIU@BezAPI>0?%+}`x!a-+;wM&1|ZzvzaNo>8@ZjdIwSux^F zY1ff@=rKGU2qE!m5I^hLH?=<-DKz7WVqX6t)m1y5!ak({mX!zivOV$jRSy(XXJFnj z3g3!${UYO$6!sSCRYptO?y%ek4FpqQVIS>Mg@$9~Z zp>QV_e}!w2Qed>$48u6z0#m2v5C`2S4r75&^-w>7TzFFX4$XW5*`z9u`1^ZtQ5bDD zG3pBQK}va10a{#K$}lp*A~E4|1M%Z19dtDg3Q`(JIbHNq`*(}K#4%4r zMyL--pvGnckER}Me?tN8GBzjz3k6Q^Hhd7N9Y!Fm>+%Evb+Lm6H(^!pCE_gh>*$D; zP^k8Ps;+-Tr6!e@*mJr>UF51nsUqm7aK5lGj1?R%QXC{Cu{j?qspil)qAt2Ke-UO2 zuROArfNXe#W^cr%)>w;HTJ%s@ye=Bn3~wgcfp@dY__*WO^%z=7{ckMMnx}l|bv39W zid8|#_39$b7AWaL(Fg}L% zc_H?c5?JiiKuO;Qi8|k@+K23JpcshQvT8Loycg z3yU=g2AFmM$@ouXSap07e`%nJ`~}8VPk75lIAqxi%Co^G^q9zww+MDMuX@9slhrQz zmfs1r{hcA&?(?+so747mcn^(czLAU;0#qiF6ba*|A|}ykIb#1(YO-;2I9BXUbpJLk z@ze=4)N)S|u-oidrhG~=&FdhXo~SC+V&Jz*QRBv3D!i4}LsA!vfwE{(|*QH)_!A!z++%tUiZ#`AKl zfhEg_p_u~0pd^XaE^5V{Jcv?{fWa#RY1KYlb@cIOaV5(ILiYs3&-^tp| zV+0rAGV2U^=sX59i^GuE;H+KFDykCwy7x0(;5a@rGDK7fe-J@uL>6RJYB$93Md|Ad z+q@M!Pa+&c>7%_v!sts0kD-lVZ9Aomcoo(40irq~^eXO;sZ<>Zd>ZIxqJj#*KOH&1 z;?oE5^EwyEH*&#u;wZm*sW;E&HTpz#ekpz2KEsRe-7x78%w9=rGL0p=UUS21{&l+o zRr;~|a~oZ-zEZ6!xQhayMxgbFI^j0}zrHQPZ68*~;xeZ8)@bUm&+1x?F^OoP@z$K3 zDc3Q69!p0!OaiRSbQ&_h;a2a+&l0kX)pgiH!j=Q+iFOMlB#Ek#^Ic!Xt#fTrP@rZ= zIP9%Z@QQT4L7le2ve~c6<@&e2vp!oTMddO=)QOo#sw8ko)8{84lrJJFS%H`(GY$xx zAd_DkECrn*a||6elr5FYe7%b>Pe_f!5r~!@l~886AC)v%GY`*wpKXb4y$aXQAcHvL zjD7{Y)c>UV`92x9**Ch*9}}Ore4mO-{++>^iA5F>i%%-5T1^NB#_JzivE(rXHVjWX z##7zox@j3^W4(0@hKYJju*{0|W^WG5D`+0n(V-(QZ_>2P-6XNIshQRv5l83l6JK34 z`qG^q>5b!m^GG1`OteQ*b*s7A8_xH(iGsydR>Ziei9;*B1BHC+nnGrIBk#>S`%;vC zwF!mwJY?W0#i&FZX@VK_Ba{pT4lU_89v%DmZzv?p27n;BWZd#EFnPk_`Zl%G`f}pP z+!);*Lz6thWIR9RlJBbX{D^Q>*(gZAqXK`LoFG<##s=f z7jXfN3+~|DGGIhUVv z$a5}Mv5UVA&ov6a*9@VX9Owz;pqOKYM?Or4?G`<;Zo zU>naa15;BFcQL zEzSCa839gKuccW;>?~~m9T#zSG_cikHL$k$_h>=ZKmR2DR|t#g)$jc8c3SMruTJNG zxmz58nxDTM$DgU@|7sk+t+RfUD{jC<>yO>S`bzu$l3e}XEygC+1|E7gCI(Lb^-uxi z=wET;|3r@1n7RHfQtb*7zm5V@+HHXWFP#PBNfenMeRgOH zp;djsg8_+euzXyTf>~dMTesuIyW;wOX1|y-b&)q2YX%y^rOiIizPocc1S<}erhx5~v)3Y#U=I%Afmr)>J z5K(t>^krjfzx!cDoI!s;2djnhu)Cl134a6W<(cc~DsGMn`-?bEKzhENTpe` zB&ww{Hmne^kQ@b(YfJ_bNgDvXF=`VPv~Eb&-e4UC#Ft0`At4iI`t0z$8d4+aIyupM1rze|#GwOhCMNYZY%V+Zy~^2e1` zp6Zh|*Rv`gd5gLafVhDuHRi-6h=9Bm^mT_~1Z`;OVzNs};xo%PA0Cwek>U`sHzEx} z=Md4XR;pL4MG1hzBc_{&5$*S zCQ=mgGVV~}n2!jQCZwpI(j@#+N;0On3#;=~i*yTr>jT{;-a05(pA-V)^*c}k0-}*s z0V5*7E9jH%QhnWoM{M;3oA5$d^Og*=6i0f(Iy|3+HCtfsFohHc32>-W$?>9rL)|eV zfgFQp4RJOk686iU6TI7Ys^8f*IypgDBzm#(#h{;ib<*WeS+#l|A}{USN@3Y?4%HSC4Q8!iz(=B}Cnfv5ea zdqDE_;-6{cMexIefxim>)GgArnCkHDr9l?j+1ON?&JW54gQ*rHlfBT7wgLmqF*Z^B zHx9k~M-Q$)vgVL<9_JmT))jB8L=WZ`JLs~F0STD>=t#$VtJHg#jN?}87|r@-@2V)q zOe5pVgB6i0{#~h-6NeG{G(7nHX^A~bjEd`;8JxtAhAF}+ALJNo6Z_RZncRm!>eHIZ ztjgXwMPqHB97qxO6$2EkXN`p`TiJbfnWFSVH*i^l+s@3H?ZM z4IKv*ssSZ)S;CUC9^KlMT(T{3*Rk=o4K5e${uCBwbG7G&_R;ZG**mTj8DU&bgsWJ2 z@YSjVJT+v3F(wZ0AU?RNT^K65<-{*p#;@|N~!-}a&7W8V;!q*Z^5byZY^?!+yW@raY{O}8+# zz6@=a?g&xBYFdNZ&xeSY@}!neBVLg@Uf`{aqHn8mW|&Xvij2aSk?>nmTynbR#I;KffHrXP36H-Ol zx`NSUwd08??n6bY)Kf!m@4oSzG{EUnSe9pHq4)fmOd$=2v4Txxm9#k;W9U!cV^No=(sA;mM( z6AWB%R2_f~Ppoq@r3x_amJVHdg^s=idoW6am5}R16zS`G6`rwT$%c4Yho86|(Ji%(|X;z-6fP zbUoi)Cc{&%(A%S}C=qL3?nE~zhS7}y%z7{HW!rI&#E%?n{%rQv zk%F40MV54q7i&ZG_&w!2#h=?Smb!_hJ>nqJfQj<&a7a+978s%ENRVXRpkBtUsZsG` zqMba00EY?30rgF6T%9^2RBN9q*g9?OZUZ&eoh{uDu z+c#NW9)VAVvbZv*FhM1SadIf!f9;F>iSpx%-qs=5?ej0_tW3Bc-S=L)?X%^V7*C7n zqhz~)Qe63s29(&$WwBLwTT%8vLaoCTcEHHorl$)a+_~x0Y;_w?KmhX}+0~J`-Cm^r z8gn>Mal8L*;KtY%XH9;Rkz=m{U{iLwc>Q>DP&>`n6@HkrbtL1iYt9O5LJM^qT-i{j z#p7K?m$BIm{UqXm9yxpH!Q&U9yB8KAS{b$xqYo*UchJy=$ZpZRO-~nB1=* zipxGjAm7)J`X-gZt&En0P!wmdS_zgY*0$L7^}S85wFYSRT0mh!*uaAS3MCA94iYP6^Wl5)a(Pm1SfPDIJkm=MC%;4~9pcJeGGbtP-SynaDn52vCceW#a zV7MiU?DQLD3S0_oGE5C$M4JYGi@07<54jmXPq*d-c5VE!8!OzS6^5FgX)6bgyBQ=MdR7$bPu5 z5tW0{UIn~4r>sysb9@Fl1_3o=jsx>%KHPrQW2t~#n%$sZfRroBM|XbSEI7SpOj2eV zHB};n^TuKHZ<&tGVI07M^o_8+8R0j>3*J9+9p5+D<>FK4e$8%(NrP*k^82XUEeh^*6r-Sb8?2-M70u)~zfxh}m?G5G%neG1Odb;v@ ziROCk@Ot8pRe8_s6WQf}Gt8O=LHFrG0m$G zn21$m;Xj(yuAWPNIgP8;_yt)5Y{G5mo1a|SoXqQQ(-LxhP}7)fzL?sZU$XZ~KK26Y zxv9Ua=ME9`RT6>Axm{Rpo~(E=l?u$sS7O5mmf-52h$zcR)ZfrefD1b=7?T8bXolA zdak=nmZzM{>t+4ZJ9A&xm+p5-k8fbAeV~IBsCV8_?L~VzCV%G&z`b1ux9jHTrdfGG4Z`mk%4;+B|;}hWi*b#wzD;LM1AJ5D( zFTR_NrTtRj6WlKls(a|17+PK;Z?l4RLJ-Jb+qoxxAjwbQx$~f)MaMw%Dna8@U~Z0U z>?B~Z@YAeiONMC>e;hDFm=j(By&gOhfrWc4x4%4ygnPUqtK{hj^trfpV`)$4=*Vmj z=E&adBzY34KWFQEs#?6$u+g>Lvhv}3hc|W!Ivv??4hZoZ&Y!}e?cFT4zI9zTIH0C- zj`zon3(DZ>L1mXkqs@&?^@js7j$6ZBr)qcu13%cazMC=c{1V3Z?I?WgD0$u~TQ~T! zUd`%dh2eb!`Owt8rUS}o;;Y0XlJ`s0`tTQW{4-&m2q>d?2gO%^X{4~~pP(q{{JAb;mYt^l4GY`V{-*D3i+jC9I{385&KC2d-3cWJAQGc zA!FRM)rT(Sa`y=l@LMc;HpP8#e>xMwu=Q1FlAyZcRhVk)C485Ez)zN z#Fozssn+5;D7vwlZzxJ}@IJ5u4gy^PMNwnF4FoFfSe4mN?;@Nxs4LI%)$z!8UkbaV^ptL>#u8{OpToM{+6-$UqKcJ z>%Ue&{qNZ)8#f>VecdC#c>cj0nO+5$z!?9$mkb^CoXjmuodNs&e?y@Eiq-yq42S*I z!vFVh{;5s{Oy2*y@c>r!uLthmT*sK%0IU0dlHvc6@-cDz$y@86azi(FJ5(63a^tF; z1iDxxdqZf@w?w1Az`txZM5xu}Pe_AVSIzZH7cYp{G8DJTH$B>SO#3oGy?8st>N!=v zt0~+b26!A0X6WJT{17n;e>(T_z2Emma`*ISrVcui&)gUYC4Ilx$@K9>S0UW}I|?HQ zx)JJ=qH=qX=i(aAiIMvGls06He!pGw7q5VpB_ykgRlm==?QKs_>)(}p(s-S@<^jsr ztO$i|1L?#yh7AqV@eDd92$(dnPj6KlAK|nL`*P_Z{|)k4Qu3yrUV(oiU)MB>W^_8* z2mLXS_G;0zV8R9>;Mo7jw!X>w$%UE+k1};a=#d_XdRgSFGXWnZ&4jEAOy?n9(DyRQ z;OM4?Y#d5X{d9S?irI(*WBbYMW~qN_L&lYug|e_$+;?;cxq5=T(}NG6BAwM8GqWU^ zIhw0i%iE8Cl!KJrBnEk|d=JFI#zni8$0<=2aoh)6ccan7scY=m`+&enKZx@kZmQvJ z3%7MOy*Zn}E>rBD4%rAooyCywB?wZZ_0SKovGRJkfx7C7sA8)%Foolm_aC4}SliWG z;XSnE+%8d%erEu)|2jKk)Xy4FK=OTpaoJ?Z`3TWbng~$7n1~bw;9w46BSoRqGBaOy zDu5F`A^HZ7pP%~OcZffYr6~ORcz2>wXY*{ktbJA(JtQs=E*==8U*dftX!=$f>M*W~ zf3eqnsbbGyrGeFkOSziDKX7DcN|3>xjBkeY{EQ(zbI5;LUf7ZI&1T0Z?{?Sk9>@c0in{i@SoNdob8V~kO&t~M+VML-HfA-9hhwB@HJvmT=~3%axQU=1S*+9e|cHf z^tmhJVSa3Syc-|LwuydR>|Zp}<3upqn=`7+60|3GlmV;4Y1wbn>_s-50t<&5?0wLVF%@>eT+QrxEw#{e=42bGFyR|^l@1`2-^AHuVs zQgRHn<1m_)a7?=LynDf7lj`o5W$%)=aKhW%l_k%=obvdt+CqJNiy?gs7k}T5b9iC; z%8U}m>bZBx>WV+O`iQc#=STpRKV-`t-likljnfG`ItWjD^bpOdSIzX`74ZVTh9PKH zLU+?y>UMHVD^f-11rEJJPC(`0b7_YXGAQ20}yH_J$*tROwJlJWtI+*;wm zA!Gfac|f4ip4a{Dxfa(Jsx?pYVBuuku(g?~6)!EHe6c_L0lkSohnE#H3M!%@c9nxwwW^=BT>#U_?Du^KVK?n?P!*)60`tTt4Oj} zq?r8ch&IW7z^tj{fEcHIdf5)yWC*=myhNOPwzC_pq!PRt?)h#siI4|fM*8=6<|Av? z=(JRL;(lW_BDGi`V?6XLoPM<`h_1|v=qF3aHm-$0i?5MXs77Fq?#I-RI3zB z)urH2_6B=dmM^pt`#KOVE9uhFT7 z!;U0phAA88ap7ZUvuQezJT`pB#uytJH_4zyT)?CpAFl?9AtC+ID4&eH49?OzvA|dj z;7w8qN`yoKNHeFbE<_Up7x{0i8!Z~Pl<=d(vUq-aw_$LRmluAx5 zpBZkrH{X>uh(O4pK}+nBb1y2XD0eCW8WalBk9~mvQmu}#MGV5~uD?g@7wLotBr&;D zdLRCE1W&u=JeqzO-qb=mmGV2mNCEnn+ad9ikKmoY%8 zP9p$*MdkI{yN3ouu7m`L3=ldQi=vN<14=gpQ}njxCLroSSX!bNf;68UUqPI4$lTh0 zuSsLbyg5W8TH_=lxz~dkYNxU!)M4hD6$oeK#2OzWvm?sILi%!FhC2SN`qT;cQxDRa zI=AYn`JE8bCG|`sVcjV#96i`PHMCtu8M zLvECfx9U&R<@4|tohgrr!w)U?<^s`^Uh8-&0)y&fEinT`MnsS`np|R07_5P&y+$3f z3a(_3IC%K_st`#LTP#c@6lxdBPu&}+T6{9ZZ8l*%Nf!L!-VT=JY9n~MmN{1~V&}2y z2pop(8TOTt!*NM=tJk`o;};aj*;}QVIayUTBw-rup^&Ud5LDfu`F?R2YTcmf^*rPJ zZ4w9!1`$nr-~k5UqumTVz!1mC)J?QrY%zb6n+7}?DJ7bk1WT7GDCFQ29geroR6lb@ zt+?Ko|1SRRI#JX!HV<`}&G4&(QoyM0-#eiaet}~UvEL*4hW^YNpw3 z&2x`92b};+@gi1%2I;=!EH)-S)LYf#wLcIz0x;RF*KhI9kjTwn|LhriG0xQOZZ0=) z$s|pHtFu0YuSRf?y@7#-L7;uI>ynC2aPV6Dh(Hj~xvHz8m(U(ulpS&JVsTJBrpJC= zmHwb6=d&}wpZ>s2sQXn@MUUcxhKiuz<@$+MIuEmbXOaBdOQ>|u#@%7IYm@a4a#^xI zIYshC-f2ZZRgyaUwQ-EY_4nd?{=ox{e!ZLx$f~lYZPyJL9K!^=$J2-HA9eD&`%8Ey zJ9HYO?#ZaWY8t=XO+FnaG{J+c`i1E4>s(z$ImcJ%`JBG=Sqd({>pr$Cy(Q{PY*K&p zni=EV7j)hwxMfi={qhn>pUqR}rtUsm3_=dGgGe-SPSWVo4l{%`Bpuei04db*BO-V5 zh=eZvJ%o5&iik}Kjvr-0G`3UW?WOHEH}eScNtHaQMrL5h#Z>yO9OF{xebgAoU}u~rn${AQDJU@xef614^Xzs&{_AW zu(auAZC6CEh;9a~JC(6ZpdDt;0n={|)YH%RRe)CW#U71nz8HH*!0-4-C8}S5p6J_U zAI%ZKp9JoR^r{tne~v9c3q|{!Re*L2Y^eow5KzvWA?U*j$krHYPSv*J$QWY)V$D(q zn@kKqtVw&Wo*m>W_VBd|>|NQr zz2#G(1G7mMpFjbD)yKRiUOu+w6RK9ko1t`fQ5Yl-mjh zN=#-X6Ez0|n4~?5As!YnSqqF(w|MpYA#oU**9$!f1SA%5$?r=r4Ohz`Z=2J^TOn4T z^gK1;qCyO|6iF)^+mKoE1upuHeKPH%sjS4v3U$5`Up+**TMgtU@t~xtb>cgDv#_~hr z-!|Ic)NSXzR_-;m431?SG^Kpqw{AT`Bn?30L(kkM_Rencpy9eN^$H|MfviGSGGAMn z52tbu4hzr-qoT^GwX7z~Tc<_|CJLhpQ_w;I?8yQysA+5ed@mzbuRDfa07*?#BTG8V ziw1elTn1$e<_^A+nov1*L>Ozaegm2YWvL2LT|n~GpPQSP>pfc99Ul>p_L(CfB4D9} zDr`)vX5XCxH#nl7!u=!dS{=#ghMLih!XQ)1rFMNAOb1v?=>v`~`sx$jk#qc`*jZ;+ z&M$B+!6B!=f^D3CR@nXDfNj4i$o~x6*!~ri{QuxKEPqyCva!CJqW>jqv$b=y`73b4 z!S?4v@xNk!Y)pTrZ2y9h*#29Iq2pg-Bo4O!Ono6xN%nWB^$*6z#_~!h|B|s88#o*M z_0IXv)YGvsasGYh{1ZVk|F_aqdm}x7vN=0in3Z%Bcvl-pmn+NXAQh>cc<_DhNJi0aZ0G2Z&-@n%cbAQ ztuh07Atueu*=4Uf!+>D3ulI=@3&+AmpIM5CKa$r_%5=u_^*5^(`sK%;a(oT->y=}$ z4*~)|Y6Lob?{3})aNDjo-3s;=wCX*Rn{>AP>}6(3VLSy&#PXdCeogH>3le%SN?%m^ zDXi=~D_}LpuU^r5L=v~n&Ih})2{X1T!na+VXeW49NHIKrU%DL_^l85%>W_v&;2Lo1 zx~~ZQ)zukA>YsD^Y3=#;>=(?h)mkq;U4>_(-|>y71J_q?1e!czyf{y#?k=GO)ZdoZ zZ)~`AuI7w-9WwX3ShL-Df5NlHI(}@hucy>GoHv-^dHa2lBdLyl)Jw4c>qDq_pwr3C zvw_|SJ$>V?MTYmp^Tk)@4(BMPA69~k+wKqT*vABW%MoogOpB|HaBSn-5B5s+ON1;>5mrT zM0gnLE4ryBWwGqGsCB!mTw<%(2JgEZnhDaqu8qAc=jP~l2CV8jI3j7^`{qU-P9ghr zW&dm}dm}Gw=tQhK1FN$fA7oUDx1$alE=h|2WkN%TOXGyHqU%yyz`B5mwO|QuYF6`{ z*DJXdjrJ(*olVcOjJt2q?bdv4*N^}n{uI=vzL_x}yWL$G0w*jGB0w)z8J0aY; zlHbaZRD;I&gSzwiKWoCQZrsD_Q*qxJ)mO)g~ZjJnsP698_ zVW>&fKQ8v+v@L4bu-N9yQT~{;{@LRMB_W~lpaWwDte<8_m=t(O_Rr(AK#=}_R?u&+zg+yNYUVviij|;Gb<(i zrdU~2r?0ue&@1EIb`C}vLDJSPDiV|(l@eOeU44X`G-m7CpPc-PV= zKHT)LHuMm&+FY9|7%8yaIc(%&qC+=;e5Qqm1x@wQdJCmbFFv6d2@ly|u88c12??5c zTMsn&O&}ma&6SY5(gT>X@O-qXVHhJIJ{j*p9lOpu9jjKW5KBi{={w{!TM zvu`Pkhn{Q=S*;kP0cE+WPXxja4rX<|auMF$0@$*Sl? z+Aq(n*g1$3CJO@vgfi~zv4KyZZ>PIbfCI)zQkw`+fHBh09wHQAjC6Sii@-U`8Y z%UbWoBNOkf4yv$AoLd|1YIp2u;v9wB7*G2MQs62SM$bzWl$#Rlfvkp?dk|qt2!VJb ztZCzitcpkUyIG^)a%KHZ0siqS(%S(EjSofBjnAxq+}#zh4VN`W+m+(Y?49yzj$<9a z;xdb7Wm^c-{|v);1l|w^^o8+AWL~Y{qEv?zK>J8!T8-2b;e)KZ0L>iegRFj}G7%mv zK!4<pBvz(aU0%IQ9A)_ zWz=jiSBR#>{+97>vm_w?+g z*iwaX{gQpz?b^H~Jv3((alKa+0q)WBvGywT;lr@Z@aD%N;o{D@lmUKS-3Za3M7Ei3 zwe*ABQY7Bi*-(PcvzpmZ{ON0h(7A`|Kr5el;rE2D?iEN#vFJ2+^bG8q?fyx`Q|Po> z?oH)DYJsuKcqT$w8XzU|V9)vnSFW5i4@cFf>ADwB_l1SFLJ}T1!@ro5(a@E>#Zj{L+ zh;nq=K#t!!kmH9VzZOlbWz2$P~0SO?cBwrfZP@MoF=8K%H*dqEoA6y&Ey|Ec+y@UT ztU!QU@j(D)Gu(K5iFLc5Gvx@tG%u0;(nCS&0iHD?S}jC9u5}Kaw;sTGO8{(yODZA( zun{v^as)swqzVNdACL=qS&hvHQBzD3F`?OR*UBZkaTTNomRZv=D59%a&qQxj%PvVxiRUv*N&7arAdG-1|3(x6A zzOl3Ex=hl9(px`l!jr|7Qz41sf%Kj#x#+Sn>Tel{9c(E4_r!URFl|#Q7!zo|K@_)w zC=)g7+7V)Y^~S-u@#Vm_JL zO7Szz{u;!+=vA7UP3^5XqT4RxsR&hR^WQu?*fYPu*KEjtpp+lGe6WT1{bN2YRQ=tf zY9UF0#24&HVlCq4`Cy`w(B*c$v2v|zjgAJ|&!Lx+y zGEE|?mrAV8w1Af1GQ>7Gcb61|UH~{&N?WaJ*3wP5{}KzzF4}~ffD*nSyJE>DW$eZ3 zT(<8aO!D`iF7R<@;N$tG(i$~5lNbRJG3nIriOUOUA(EVfe+Po56Tb)LGOQ>l+X6f< zO(iwTd0WsC_bp{b80=MAN!A9-nG0xlfwb8WXK~=9dxns}UAmZy9XGR^BfHuL5^!PH ztSW&bbwg4Jc0A(Jd8&;LHxp6_M4({31|=Zk@5#C0A7*m4U}^E9@$N(ji`?zIi_dVo^NhKHH%s#s_S|^?b1F5-xr0(W#r<;;OXmE)9 z_#MDYTmlr@2Sy{STSE}_EjA=Ye~OHX4uKt&DCey~w=g%Hm?ZlKmV<^lWd9&xjL5A- zHt*alDFHWX8w3QJ+Hgp}Jov+mQ51~He-M#WApiJ5gvXk{6K-EG_^M3gL6`6rX20c5 z0b}yjA!#ygB?fIW&Hpjj`Bk4h=@gkmQJ?^R3%6f>_!#6oyE6d0Kh>2&Q_%JjToG6$ z1J?;o%s;>z>O3>f9{hYVr4v-BJFH^r!}s$uMa<`- zQ;&33f6JC45G1U3P8_cGXgn08!^qJwt?I&%A%=~8V8ApScB?_2eAnWvnG}a%siP)A zVxAZWQ^tZS{Mz)!fj3Z-aJ5g2n`vr@ddqnRXOg-(gK(IvAz&2NE`gh{agCnA#rPGl z1B>HW9vYV1_5ARZCH!524!+Nmnxt&3HB3wqBMt@%YmTJ0r{g`)oc+)ip+#91A*N|@ z1XGF2YZ%i1shWla^lhBH6^e(hvG_JqcckQOmTs7o#gP%5qYGtO$lJ;|?gVF)p|=dI z%!efLJzP!?t|;NRou38;yp%~Ew|XQT_%-2(M_yk_MYX3&nbh`QoW1Y$LTI$iq+K-8 zQ2Y-48St&CsY#?CWWRuCiY3lE749M$CQ{VAcN%c0 zxCB_sD04=I5)km>?mM~j2yY@r)^q1&-$XoUetAQk7j*$^9?i&~3Z&qa0M zRES(aG;po^<&tDCw`447b0wTzQWUK$iGo=DCbN1lpyW+*x_qM6jO?4d^&<&vGYUcf zz8&PgKn=Imc15xb`U7Kzy6(lyO0c~F;-5<8vo>lg3f z)7aTgTF*ce zCIF;xGj#edx=gnJj1ZEQ>u*(KK#kPjy}VetUv-&($#4DuCcnpI`|kt#&lGI|JK`S% z=N|)l-C2KKL z&zeW3%txB7Wp(+vQLhRAqi<7OW?fsDA#)PO>s`XVVrX^KgmzmAg{HuqcBg~{k0elW zbIYNDJ#}v|x^e#8OSslz@APu>VwP%o$sx;H@38CW_3N-V=Z635$_C>dxZb&6)#=#j z3euUKpP=0W|C`Ezo0^s3Q@|M7gTEtiY@prDm-96I?ixw}^X~g3)HhSN!{?ecol)jW zqx_m;0o&&H^>%Yl3)$8cMs8=pqFPJ+%S)T>hukMKg4=kRPIag9kCwI$HSddUE&z9E zr2e~2ZVBcp&qk@wk9>HqKhjy=soyd)&U(6_jgpm7Z%oUkRaB~M_^x0ioiG0)@*EFkZJWF$48$n4qg~FlD7vJ zE}7pDP|_-`ePfvZREw(>IM3RlLjj{e>3z^`q#))VL*Ia_w*`KhX~S1Hv{O;k*i21t z$jA702{b>9^?hdaJ70f2mskee0_RQJ%Nb!OPC5Krm#m&F(N;ER?t-g3I+f}QYm%mnw566&-1!0h)9R+QWc$bK?%p?5 zjZr+GM|w@)bZh#QLr~0hktWBZ`a_;P!6GK6`rJ^yJ@065Lv8D8?oNKw{nIZL-{0Xh zn%`LytozGbcSbJWX$L!D@Uy`Y>TSt&&?6WqB4^~fSlCKrK@gviEMwet(B6YBsrl0N z%eJ@j%ZiPfG`0yXU%=XIQ$M_K4KCoKkySxpwkr%;FHM#0FLvbaVL5LP_Pk3CO1Rin zp~`24SWiGI8@`01&HYBylTa>X8o^c{&*|>mZNm%+DO#DoBtrD2(q%Xl8gkHsF(+)P z`XbiJbp)k?|2Afc>02bFKk?*&b5qOD(UNnJ7R2N$8`wfT2iLuWb$C$5?BN|`iigSX zGH#AI*`x`F4GO}Q$IS23po`6nYn`#ae*=(_)cmVA$*4D=>D5#8U0}m{e4oYvK8SU_ zEz6Xh*(=UBUw`34Xp@*TkDUU3bmc>KXkqPMQZfXOHdCGoxX%Mp9a&&rD5lu-9cJ1P z5bt23fdclzLL*`z+OiOUy|Cx_L3ya*XHPl=vHyk>y~BcoO0UGM7dDVm2VoU=H_1&$ zfC8rC$bRcueM0QG2oQiNQkU|Z2!D__dta9mP*%Qr^4m6-XuyGKswm>e;NI0ME4B?% z0~1d;VB&c_7fPXFnG>WtW7NX}p0`Wnm?sOk45xh@TF)iuPa7Ir&#e)k!!TW&8~<3U z!S@9VXUvp@s4m*o`MULt=iRZsFx?Zl;@%^-@3;6XbP@83<*g@%7HE(Wei+>4!0Jr` z2#i}Ib9;dCc;Rxn3XirW`Sv4v1HuYEJk2IPr+#FQPe69Kw=vq@7v9Wo3GFTMP5?97 zizY}n7GqKg!g_Hy8Gj1Q-6VvF#z$sg?h}Nmd!Hc8W7E4nLZGgt@{_^`qb3}0Tk@Bt>R=sA+E@yX3b-$g~c;%K}ciGX|%k)66s$wcc`_6$(jXHn2(+lRQ z{oQO_JQ<6n^)_~}ishj!>LYP}-L*q#)QQi6pb{`C2mHoIk3S|xjUq17=L2pZ zA8}S54+Nzo%%DyZCp_ldhJLmW$Gpzb?NlXh2ejO}bVVJjNFMM>c(6M1k!~%2mLK+< z%eV=?bMCZus90+&!`v?w|Da-)G@D@^LR)&Gr>w!Kq7n1N{r1tt&D7A#w8O8Fz+h5F z95%L;3Pp!TI>=c(+`Me`?jw&OH<(H5ycemtY7$IYDKM*1Bl)9Q>z`j5)lsenB$&+6 z15 z(#6LMcT$6NSG#HGL!FE#A*6A$^(IQ`-@S%hq)jQzB~K9QN$TbB!}{=B`OpR=sB=Vw z&d#BzKJWxU5rdY(!n(Sr$AZ+u!0O8Z^hpG4oCKgx#Kc^%)W;FAKcQ+ChY|;)7Agiw zaPtN^)1wAQxEPh`m}H zavc@WFR)e`Y&;L>m%LB5=989^GH?O`_(}Q|Kcyl{zv8ECIq8FrIIV<+#lE);2{qVJ z)4g1m4>(b5Hy3&$Hm~vS$0#=?z{I?%%=+by#N~YY9@V9g#5)?GO?vq>G(9OLP#BD_nNF<-^08XB<7>i1Q1_4c5wX4iAJ+@iQr`Jr zt*W>GA9rUN7RQ!vecXb(ySuvtcXxLuxCaUD5HvUh4<6iI0t9!0Yk=Tx;VqJLXU?57 zGxvG!JD=`{hF#rIy-Rvm*Ke=?TI>dBZKcOmrL7t(d-qL}ZsS|CbCPAp(|vpDD;LlP zM*^~Lz}c<2@?yv2HqPRgejtdjT-H)sd7`?a{eh^sMG<_h{D6=%l9{%Ji$JAKgi;l2T#HP|<|d zO@RCJmu781ejk09O6veZ+dG^h&(FOrJ0X+Uq)ZDaYt)H^>co5j@UOUA(hD zgp&O}=uGMsG@(l&xuvWq>@$@rxGu{n%~tiVSn`L(wA9mJN@>xAe>Xu?%A-_T$D+!I z@hLr%hguS4CzV6gv7_{ z(-?rz^uPKnekLL{jgl7`8@r;^hRpsQ##meuhL%@kB9|-}gMh&?7U^eW&M{N=fFzHaeZrM3Zb2rPBgGtxB}#?sJD z;FP_XP->%&X3Njn%`^3vIlIpse)w@D;}zDQ?+IfVR>=>sFf1yl!@r&1Eh>of3vS*z z>z^TaglYa-NVSO!`+np{q^Q9!#sx!2su~z((HIzJ6%IUD1H*RvAd%t|A&}zvAdvuX z@t@qHNzqakk(a}ww~=~hFJ$!eP1`CO!Rny^N+2B)iNz^$Ph=Rf8erKCSb5SBzKBt( z_+1Um_}S$g2~7ZC`kezQ1^}i<41@qXOFHvb>;txe8Ji#Y*sUVh*7p;TYYAU7yKn8(yU*FpXx3j)=nHRQVi=h~f~Q{@oRh z7J?eEUbbr7wrr5et{wRDP;J+wOB^kjSg9&YqpPUQ*aSiFC=V*EJYI0X(6ZA05Wai^ zCyn(Up8nWAEqv7|pRg}&dfX`g^ZYYd3;*Gf$Oj}X#|k;M%R5a3J%5vr0W#?h-)Tp| zwcu%K=TNi|=G4?8g~j`M!OFVJ*!=?&BZs}==h}qJFY@AgHdi7qKLW@pe<-|weok3y zTAFlv=(iJn0J<;k9Q?~QMo%r_#Y=z@Y+^GnPq7#9Ow03Q-WV1Kv1RNDg4JXM`wBdd z)GOi`>@5IaX1J}Vc4@5D#@CFRze}1PsJA+~otHP(lg^m5pDf3iH=#xr&Q_MwExz-q zwpvg>!!oPw9Vby+m0>a`k&lYw^wy#TQnwDO|b`3n&H&y-fOal8~U{;JaZdyhC@iWvVX5c@Nt`^SC6{-3EEWMhA+ z8wB3{&-;kurECy5l7B5@{9BKJqxKK`2v9ZsnPdKY1jWhx52_}>AqoaTD}xU(_-VBg#EKy)oYeoOG|eE)b77MC-wO`Xw5NoCwqc#jRw z*K4+M;CKHx0?P^P<$p2fmpbz*AsR5@O?m66r1?#K?&tL~g1 z+n21y-P?)^7fY@QzuhBFdsubcyKszJoq!kBDXPgKOMwr;EQF6uQ z(S58uGQe0R!a7eeM)uQ)(%xFl?jGlXu_T1q=o+<%3K$$^Pd?eXZ;Ptk;NBz4>ejw} z_ap3N3v|0=Wyy?Ds9WFAl$PIsDrVHVi0E)S`wgPp79f|ptW4qS}KEu0w+C!1X z3M+%UTU}7M*1IJ5x|$DqD-0`itoMVNo}z7jz(^jC zI-37R@l;IY?fY{lmN$YJ%lk@bu$&6a6{O4EI-`(9gQ1v>N$X+y#);v#X#D0>l=xhl zHCF+UR3d%)xMRr7-8xjH1YAsa^ql(POu^JB%ot9M+?j+M9F*)Dsu1HMe-xj zgCI^Q*v{L;(t`lLU~GQSgQ(sm1;M}qZP)~EE3uN(tg4zy3<~sScS%W1R&-HjuH2*_ey-jliZqOJt9qA(KaCQQ2C|<&CguEBt+kArB#}kY^A9Q+;p| z$Isw!)ph8H#MIi*pCN%rH6U?qh&P-;3);A!7v%b}hpL-*P`rn?7s8wXa5QP>WNnam zKwt3Ao;J7b6c5FaLL#XuY+C}2nMo2ywR|$LAoy|!Irph1#o>0aEX^X!Dx`=?o+`_Z zHYDqbfmijA^J7TYPdhvn1F4mkH+bBg;ttnR>>|&i?WmlVz1eKd6YQ`v)*i3Cax?|A z-jZj%6}y~?s-6i!{TQ7w2YJ>9aubWrXZrYnVtV^b)*Lnz{n+8Hzi$EE;h%ovN!ja+ zrw?U%(}>vSaqVp9`{QHGx0A=a$@pn|gJ^;e5QyS}d@XLGX51(_gc*!Cvu`g<>-5DV)8K0 z)R2=kkZi+;Fr-{C=O8$^((<b?H^UjFsgf?1kawh(DEP=hIfCkQ9 z^fy7_x=SoEBvY$4a-rA8fUkx*o^ami3JleefaSLJIClcN#(uQGTHX`HiO!{nQUtJC zv8rf+KszCnq$4VmsB1K1k7e1QedbNpQ~Oze((-#n5Xs7{A3||a1<&}DR?pIax5h%~ z0M?rf2*Y*z*>~3qr=?CUpcJ5c{om_<%uaJ3-aCUwM%}(4zuk|JK9!a=#4#bq8QOyc zv`09wUBItW9N30{^mq_GmINjpP|@mP&gho~)Gi<=H8UFBy-gZ!s-PIYrD4gzaA^WBL@X;okU!#}m za-K95ywD}k5*pYp3<}V4nxVmLJ0c8<*{Gz17FY@CX#&G2Ct+#8XEJ1vg5qlZv;`+j zv#w9#ix*E3BvrlG*liDsV0a?AO#+1`CPW4{E5EvJZM&7_mkxP}8T=v>%G&i1*E99U*wCdwQp z8mseAjnOtiN6g;y|D>{G7aix`mQvB$X1&&vWt4dUDgkHolCF1-sZ;uosWIF6BF&|N z8yZ?LB~_GnbhH3=Mv0}qQA~(D5SI~OfymF>k7ei+WN$EgAYVAoMzbiKFzK}^f{ve` z?^q_d+D;P3wUjsP78~m9;1|kj3*|>*xog?JV;w_V-MRDdG8nmV@m(e!fAGx=5YWt~ zqCBP@S8W|n*!vWavEzlC`Y>`qC~-mRm5tq`oLyY$0K70_Idsw2#YH#1x0O?ty3%QT zak9jZFjVG)_H!K!T=zsMmGim9FzAL-ngX6=(Mu!RBO617RZF}O9x6Abo3_Nf8g68u zHn8TbJlCF|jvj9u{6|bNm-evH1=Q56oN57hp1pJ`!Tr4j#?8E-boJ)t?Mj|BwtHN zw>53!MGw*iw5$S%ImWRLmvmxZD!0M;k11Wd(~L`F^o9kNpGT!0#|l2MQbzi-{&wS zS+~whLa+%rgl4o_9jb zKo%8k8e=lx6BMb@W7Xxwa-1ITjcciIXhGg;sM2#>GKA(}$?oM)p=lQ^S!iMzoVtKR zQkP5mnge5_yE%^(L{lx8>crVHIClw$q$!V-o3e4k6)o)n7c=ca5jKW=V|3&_ zG7iSo5HoE$nx)!IP+v(&SfcV|IR920nYeNM&;lES7mVUK1`;SW#vRh#z;FlFPD*R0;;di8q{uRWgY;MyL9T{`1@8*5_uv%Xvd& zH*HFZIh4m`Lujqz)7udN-#ENbQ#B{H^`)7nw~GUGIlMOSIpqPPv202q06L}n#F7aM z_IYUkWUS#=T@<)0y+ad>C0e$AHD>XcaMpCXk$yMnwR{H2aq~Rf#-__;YuJPL3aCJ6 zHEhq>b?anDVz^@brueQ7J2V%y7kP$&Ik5(tk@(d74RBS$d@)_9H$UnC9>UP z$)t^w#}+Oa(kI?6q8Yv_%e4_f(F-^3wpa-cO{bm=CT+43K}mVGY7N{ZdZTGK8AMv{ ztpxJ6vQm#)&{?bbQYyg$~;v z+k->%{l-dNY3Kr`68m>^_#(Ul=64fCMXO!1tOrO{#QBtRGHHWFLjw6k$Z!x_C3Zzv z!2{XRrg<`n8^6Jkzm_lFJ1VQ(DQQa%q&#EzuwOqokc=rh?DgHf-{z}B)^S83?4@Po zMKq?sDkS$TA?Q9AE1bovqb-kxMNu0JhGDGp3Qp!U>>d)8?hppHV9s;OVIt37d!PIX zs)7ecpW4xxHBa5 z{miEW-B&Pl)`Y?oqhw7c9}CuUL)NA0e1bGurL?K{xvZ2ud2Gd0rGi{~l8PGi>%}3DEz(B$4$+iS&CP0j~b6-2c)? z-^9iBw>Zk${=ccmIR1K`{;&27=ihAf|5p9S%Jth!pX;y3>TkVqaC80d-T8B|-T%jK z;d!b4`v<(F2PW;$ECe{8>TRv?{C|LJ%{3uw+kl@E4?#iT|?bUTJ za4+wBN`epi+ z@Lp`T8V`TlY&|$W05)5i6zl$o zdphb-4PWhZk;Tj&*W!HqVH^0l3dy$8VHI%eYV{1F$UE%vIPnV(aa(K2sJbdCRII4; zd3$rwn={6?3nV8#J#_En7q0sR>aIO)g<@^Gfo4nZM58H=4dizQt>F=`co7%A@(6Q4 zBm}hYPimrTM4Od-$D<9dZ3L4!g7>FMEUVXa$TJ`$0ZHjt9e%_2x4gIO9pxlb8B`45 za07^Rt;o~uRE(Ow53x04Uh(!MxB0>W>T*rEQ&QYS8aMu%9Al~ROA@O($I;=K}hJ<-BqLvoR^;&Ht_S^0*qW`5XX!1Na>T%`UQnW zj=;wXi8hX$%06Rs)*tXN5?Jjn5Cd$6Q2f!_fb>WWuv#TtYHMtQx^zs+6p4kh~@6-K_oS7s@g) zl@a~hWWqLc)eQVZAJvHx9aRK<;QF~X#(bK#eHZw1kiG<=2EnM*^rX?Oo+dSsa9#Gu zr-L!?a!N8lcx!18rHnFbrjzK(4!quZvjURG)&jaq_U^$!W zo&869pWyY){1kMeNd#aTE9qB0B5`_N35QN}$wZFVwA9y@0P%9^8@Qx18sH$E9toBn1zQmV$8i?E?QV@OD$d~raa&)b#+6pBB8eTK zNP_LRQozA(MsJFb3}SZdr5qwX%KP_Sh!x-+8X1eM<{F$UED1x$3+4#LckJq_Z|2G_ z@5pP?JERw#9=l6w7AhGPTjXN4BG%4k!uVk)^>Qp6teN(~NzlgV;mIfXNpp{+uhW+m zI%~Zu$u}Vg8NtoD^%1A^8hG5~ko;UZNmWpNiE_1^QQzPrn1Efc zPQRicPA}BJ8#FbpGRI@XS4ArO{zMImbU04yb^EZs3^^N0C4SYH6^3dN8Hd5r!-u0e zH2=hAUz>EZRfmDQ793>t(=WXg4zV?(Fbt^|-E!~`T35U)R)+`n= zNgsJXHpzo)QnWvJ!yz@~hHA9(Jy<*M;Q}?jWKf~9#R13~SIQWQhXLVMn3j3M_SrwhwkT;xXLA% z5wHsL;3yAj#hnvg33B(;++%w0t#nIcFYvu3z>RAJ{V@2py4+Sr)$D0j2mY}Cwnuxd zA+wLS4af`&0;cfCfGPZFEsMzdAFn~3OTmxUR|DK9rc-_ViVt4%HF*GUKwuSigIE{z z7J5l|CBWVDN5Mu!S3Ny~@2uUtN`jeR`&8X>ZBbY|74yOM$KuspN)eM<_2%+a z3BJQ`mmWy+DK*jg628ffA+NhDRr?%_Q+J^(mmX)L;)9+zBng645#LWNVl&^;PiKP2 z*DncjlCA~qAzvPZNd#JcM{O}C`QC@`WuTY`28t*kNRXji;aFkRLI)-bnjP&aCn7Fs$R9H>YXyyPz zH4{gacj-|ebxqWkSC!R4-&%WO3-Qr0K=D<+mB4iU98+r%$WVK!DlET}$#JJWz~aG( zhZPpLGbHll#PX0Tc~h?7-3+F(rT5`rZeRUPj03>`&AL zcB@@@8P<_p!ggA#%)mf8XTuoUXl%F9W}2a}*{<(Fal-du(5sbOBrzJsBJy<3y~sq$ z2&S|FP1r87v4Jf)_nQJlGDK)DNdQUo*~&8ZeO=+8JS4pFtUDNYP&s<_A*n52G3=^) z&4w9bs4^3;tQEoxDgB;N_kLXcvo{|csfa-ylNhOI!)jx zO{7kKe|U>s5e#P*d1*WFUoP!N@kL_Hk>*8OCw4QDe!}6o-oS$-urQ^bI4;*BKSiF? zX3;1=g#+)`d(|qFp}-3r+0AgG*rg-e&B&odTTrrb;@Q=u(9x0L*@-D6U71H3vHd>S zgNxKTaS=v2DzS$7D~VgR9(-u#KB6rwfd3EL&Y82TDQWO*S@(~2KaTL+GaF>%Bo=Wn z;*wP0N)&;tAqR*-o>LVU(yUgyrhU>kDY`>FYw(b5V0a$K*c47-i1%(gA2ZCG5-l-_ME@jH~%$H$Au58)iu*@yA0 zkzx>QJwcP_r+REB)nL`5XDq&9Vus=lX$}3$-AD1{(+zc3k1$Wb%;Q|7vos^4CM%THAs>h_C9)p|znI_nsA* zE5tN%xuCRRn7rD3Gwq7#P+f%Q1>VFz_RxUxTe{r%v+AxqnHnM)H6-_=7)OrlbJ+S% zH~PNlYb4{@pCnC<{^2-BL_MWXwzrOjinke{BBFV~esQ1|_cmW52uJiy@zG*nWrSUo)u5dA6jH7-T;}Qg?Z5Slf%xlK#bQDkv zvoF&$zFq_hS0Yo8C8UwIvnkI&>$oYgDchx>&YEzf!o2Pmdxv8PFRlf=vZw8)lw&z- zEHD09C3nj&d$#GzC+dTX@>@qzq=Ow{+-HE z87@Z|4LH}Q`*auMYDA{`PHLc%6Ut@O2ka5Aad)`XeZZ6ybBpTVP5+-7=$I0 zuXgu~nhTBCtPs~^{?6S!&~{kS&H@H$d0>z}2MQHMn7Y?Lnq*pv|DliE`?!e!SO8uC z*`&2#T0|DJ!u_KCykARu)59XC`SMJ%%z+IM?H}bnvDA)<$^>c)M=mE=%a7jNY-iF}j`lY}myY)9i{9KGUyJ8^YoqS+FC8t`)4aKf?zMp* z=fKNAMfPm(xNFyH-r>e#PG?l@N~e_o|4O^kiGJ$LCD!eQe~N|`-9JTRf7R#wA3az zfJ@fD0AeO)F25nvU$D=g8O#62ZUI6R|G+*ky9Mya`WL|GZyotZ8ur&y^M6Id*nj)q za}u*~0J63h|9cK%R>1ZBUnsSHRV`W>+x<5d#=_41XKCI4K%UtDL8G-;`J&P4G-MeE zUA8|aHv*Dx{vpM&bV1K1qgAQ}?uS%Od2?|FeNCiWs9Q^aZ`hpwio)&Ftgv7CB*AFC zhJz5G&^iH%1W|w@LI0N`L7^-mph!^RSCQb=36lR)?~&ocI``o$Nb9Q5QEUgCpche` z#zb)I#);6gW2@lf{YCG*Q1G|$XRoeZhCSWb&-a0te%{>YNB2m_hBN9%3_GK^_8d<9199AnTXbQrtX5|u z=X|9aZ#wyXT(SkTElW>}yNLX=kNL;Lg*tJx0&_O9Q>${$bb>p_L4?3D*LrdsHfr&1 z+FL98UG-1iJkCN@6`ygLSUD^mzgaS`+S=uzn9j-d z0MQ=`B0p-i85V#)1fJE}J;AD)afij&=`~o#A*Cs_!ESX26T^MY0`VVVqp? zczwVO@5S9ZTPVe+=u;tR{fPgWT@H0gJs>lPhSQi+G!bgrO!TWH4N21gWn!G#hA1-H zxTMwWU|(huQjW-3Ofwr1;uJH?_#XJ2a6|wkjrPV@w$+KqmG|H9IrrhZQhRE2D8si7 zErwv&3P#Shlp1Jv{Y*P<7BGcXec+}B}&mN&y-j>6Ze>di2zFsAD>GcN7k z^14D{jlRq`$uZ(~Y|yY}eyO$P$=v(M)npayWO>QfRI)Q99)v@^b?G~{tosZ87#u7{ zLln$C^^`LR!exem`NaQSg%r3TODdv;qWq48hE#-^ohkyx_*RGt@J2=766e?9(6kXi!k*RiSW%WhCe?qU(+F z))Op%b)b=0{fG>V^41K_H6!hVf5AzB{YC^bdn$}^zZgiRl;n`uym*gT*{fl(K77M) zWwyz52*cG$le~SrY&PYS$nah-O3G0&wrIZM91BwTt}VIXWKB!rzD|G6hs<@x-0Z#> zIk1B|_Zy@`{I=+|9-kku9UQyvblZ!qL>VnF^amc%Afu)6NrpGKO~{r4>tGh*@OfHv z{U+JtCOzq`yo%p2gYQQ%&4G7lw`c_XWt!!gXL}=qr)xLc*~-er%JI_=_g4*c$3Ne& z9P_Lly{(2DglpG4PrKPTuU9m`iG%ai_~~rt^20isFT3rjbk(|^X&_b>ER6J97$ouQRn-` z-ui~~2hEJ@^#KG(GNGSe*9&up${VESyb^O#ylKu;{J=hdT*aHuLZ9fQF()wBRHrmF{i|#%y&6Y3lDP}1R+f()>}zA@B-m2TS-0hk_9LdBeI&WG+>uZ^%>J?s-B*|WbJHMzPW_l$Lgrv^7>-8^H(uON zM8EOZEzO0pCZw&{zNV zdW;?$F+=nl!FCU`LP{I*uxZa5(__PxPjln+NmU&KPftkFC5j9QmM7*kFz+#kP|)j% zMI;!)PfMzAptwZ?H+rEPv?V4=AW<~(&;v^`fl50_6nkbS4G>qy*}z3f?N^m}Rv$mN zp8j-G>(>X4vCw3C3*pPUifbo?-pCPjQM;0R#idsK$ zU?_d^(S3RAqS5@)9GnrdL4-A!xb+l1FRc@QX9+P~5(AB&7sWe30n~6T`4o0@V?)~Q`8Rk6fVP9(A zD1@5tW^>DK?vtk+PiIBPH5}r^=n2bcFkeJBZ0BPm{1-Ip&+Vsy2xIzQCpy1RP69v} zv|tEgT(npuN)pg=SXc{IQv!67tEi;+7Ff~m8+ba<2Pbax2!J$KANf?OUPna5jNBcX zP3P?BNuvUkFIn^BMg>|z`AQuXD`>+mm60*0u%ArGe6VTtlFNo9Zt2xNE87no!@Rcj zfT&(27~NZrjsdA#fH5je@^Gx3yduwHSn~qc{a#C#g8q$OHus4-yI?63UUo#lDWzvx zntrjE4+rnfJR55BOOehl&YK~LW^6ma=?d^5;v8OFAOJ0Kmwcz)nxEOq7R>712AjsJ}pl2gaFh zvHtcBrH+`kP$h%5hc~c0<}?q6!RJgO&6vYC_nr|-2J_P;NSMPOSUDQhRdM_=Z&Q>M zcs-ky0NZjn5wDozt>E*OZrKoLlY4U!9+o>}k-Ovd8``8W&&=wm?>;LEH_yaLANX$D zKdsCTov=6A-j2G!tByVpD39w}J4?k`t#0p}LgD3V&b7sS=x*f{Ks!!0fN>DFmIe7V zpN)*xk1ry@5?1Yf^a(>$M`YrC3bMu&YM>0zq}~OZD$trN^N|TDa|m@RTKbcvfvJU% zUvNno)aT5sv_&Zu=yG?+b?6v8rc7d+vgeF|+P-k}?9Z6>dUQ^R>DOp+Qg$h@_tuHA z4(&uTmZ-#X+GD(0{rEjH2NFusD=@gT_&ufR;Eo|WG_v#JDx(#QRveOF&yun0X4)yc z=RK;2n|JWDISwn#(~U=V_^~8C(}9y?R&m~?VrIO+%|TY?FvVvksRhE{8t|6Vvl&JI zfUL2J>RQoH0fFEIYfQmNQqo5OI843xN|9}%I=61-TZGG&(WPJke>#V(-M}HLM~Y^t zy$tVU-JE!)%+_CsQef7{I<6%vXwwhO$&h{4rnIt>tuX%uN@wJNm5u@zYeAc$mSEsx z!#PXwNPbrW>t^lNeOr=tFolb2Si88MZ!s)8!ozP{(=9nV^FiZ}UZ10|j_j$nMAY-i zc<{8N=>@;v&Wm+oJa~U!O!LlLLKNm}F*=c9Rc)bD;UzyHYo*Tgrw3n0yqipT{p?S8WW|`4J*mf#rPFcO+zVhP`RkA?LXkNpn{q zNr-J?E4q2u8+7)_7lv2SEVP+@dR5GM<1J^cPsb4z*m|1S?rZuRL7I}T1UP^;?)_LZ)?-0kjfgRzK@D;#`S~nJ?GJS|2?N0a1-A6aVear z&><1gpu|CSnrW)>(-6{Bqcn7{Bn5m44Jq@a*>AdAP3%7`zK{-D^wAW<6FfI79V`-!bfZYV@4^ z6m(vmgqV_P4huuLM`6?z(?k!7!Y=bVxDa(#_>-8M5}h)E28GdSEo+xz-s2&bwbSR8 z+z=QR$*2?#cAeF7=?Rr^xl|4L5uUn^1IB_vA}5ZDMGdV4j4pmM`r*#?TE=H&wH>0s z`!!JTOxL@xT>58Zwqc>*oe_D0q>epI$wAZ9AGs4{bO=KvQ@bpoz!? zipWVR!C1r6l2hGM@dWuNxGAZIaXgdzDyc#<{FJ`WEqbMgswQ=wTjUF_yCY3BBQ{#| zU8ees+jF{-Z#?z~}z z9ua|F4P`jyU#rRK-g!xA)hM1pJ%E%f7He6uf|ie)9pswim}Cvj7>^19|1~3Q3#|sM z2&R&Fge`4ATt?_+Rii+P<+#}r5Mj8)n`nI(S{xym7{QxaoWpf%34HTCXS*%tccYx9 zLhfpepGWS>AMa!U>2w8Fo2=jk7U*Lm!@J^EtYgCW z=QAUlAMrK8wmSEp)qUn3OBnXM6M%KqzaT4spyw~0 z_%l`c|6onbF9nOgI`P7q0Qd8M(S;Y*^iL7oe?}$uEBEoY)ag&G32;CE7wF5(+{M++ z!ou9_&$=ssHU0Vg_;;)c@OkI{2iEj0mb@RuH>c{mr7XHvr_>kJ+G_r9217(3P$Q@* z(a(m?Vj2ddta-)79+naYT1NdpK9zs@+LSrQJ*ygaQUBz^a(bc(eP;`MUD7b;e0Me< z_RPV=RcsJ`ZH8IY5?RR>`38&;tIiEJ2h%vIKb@+?frp!DBgIvIMJK?5;sl$cn$K zVjDR@A|#RVZu#OmUO^7Fpl8LP(Oa!Q>UOoVE}8QjUA!B_{+j$SD1BbAPf((kUEE2OY1r+an%s;&9@UxL|*|WJs}q zTFTrPW&_-X?o?7EvURO9V)u*~jnF2pF(X zQr`LpJX@On@PM+n&hLD795Z?n6lZLbawX0f@~%FEd5$Yyc^{hPvV$X1=Y;Y)Aqp8C z@Qv6e71Pz9rZ#(}ZO0#n9SBE605iOcJ2=X@A=V$w8 zNf3O0KYwU8&}NRo>P1SXyO=m)Tt1?^yi*`2Jq|?e_RD-sluxoH;GxP0rj;3kj1Dwq zVE|5rX_*hj$OtFlIEmd=Jtq$bg?O9eM+Z|hDg58=C zy^x`cE}rQDSHj3S@*p4FLj9-S=%5erS$9kM0$;hEcX-QN{iVG)eh}!*dl5`c~5@ToBt{C3&z)y1{ zP}xr5LdGJ)Af-ozR`IxS052o-`CBeeRS}jp%@*U}AE}TO4wR2+Tacexy@6Cn{WUkQ zC3_an?1qOa@*(~=1KE%A@YS?UPA&==rmSfKS2c%tHlOb73;G9M_Z*E_&MMf;3TSua zhtaKwyi-ghY&2glFDQ1PcQm~+v2iMzJ~=)nSB0BuGG2H6TPoz4t7&i82$?00EjM2M z#c|1b%`t)JE7``$AO95#dGq&J$cYEaB6}icM@H)$!y_*Cl;N88;b(nE8>J!NDsIi*UeBDtWmkRmnZ=q<@x~SDVPWKc&J@Tb z`gRw-nw%b?bit4XKK8DWDTxm2{s;LE4+l6M(dQ3(0c`|&Q+PEg!Ie~(R1_A9$DXma zrud&{2OEV7a&?@duzgeYIEb@435BWEH3vmXzSISE{Kg1e9B*Ml zKLt!_SOuYvjMD)UFS=f8d>!HIK&?h~fJ%zZDWh!Gx)tOr!Y41fCaCucrfH=5uvsat z%(f8)^V%6Cz9=i))*n+6rE2S!rI&;^y{39Ah{YK)t@|<>gFvLUO9NWzXJ0QOg3+6Q zf;z5I12+fU4qXR#<&j)|#NNp8Ev&Z_h&c{;YZl)3&msaTkOT$OXKMVK11=2?K*k`Y z48#0sX?z~K8#j{#jm#)>WlP5*Vo%9ArwC7)HKD=O-36r_Mxwhh97#xg0(uc{3A0Km z9v%ga9ETE|D#B_A@TNU#;5(wNP$xYzu#B9;t<3dM)nbY&sd>{i_tGkw_jBpk>4c*okkRH6Tja11VdyR1ysr5B5k;w9vSO{--Nj#%qWP1 zjHsdnMunAP@v}o!^AiHmv znN{bnF`Q-T8)61V66X0RnWcdI5(s&O5hOO$C8tVk3zRaT-#*+UPr%|+e_|rN!;04n z-zEoSZ$klYM^us9eSJ}p+cU?K5!*9eE2KPbUq_<0`zfBKNqJZti=`BbJ7md=RsE8r z6yP5X#GQ%Odzabc+dTK4VMy;VSRT`}%1H0rSRR)mZK&|RYXmZwcM>z4aqyfiJ_c{< z&v$qCHXkNqIEZkMDrgU@f;eAIst|NKk1$pEKcwF%Am#eK*SD1IBNYlE4W=5Y7#G#L z^qK(qB8Vhh_^S;Q2{gqWM1ZFeGJUhF+)gfbL6$`1RO?oNWW+Hu#`tSy7q+@J61?K} zNmtaPydpm997#RJ)>^`Xl0McLEeHMVDrt8wm`Fxol_M7%GX1dK`c5Kp*5}BW@`QnJ z6T?!cwn^yI`9Ummw^p~au%r{YWO1 zowvR`Chh_Fp^dl<4^sORT&c%SfTPH zp;WR4L#k@82eAhMq=3Qo1J~$iWK6T*bp?rV8nfVPVloiPf;WqRJDt=QtMptmu_Dum z1Ezv>fg?10M19@_?lr3W zdD-)XX~tl5@=NNE*-p~v&Adnofh@48!?HEogn6Y-QTdz?_XMK1d4B%NomHi4bVA3< zom)PAmy-uKtYq0_4gOdbsf`ycPK9 zqtL>W)+8maI>@S@?ueTX$HQq7ka|SUg&jZmAgkWf2aD%~M9gjB1#i0;ko(TD3qR1a z63Dg_Q{*&5ri=?G`-EC*1we?OksMp7W1;t3LO9Ky95K>KK1L`3|LZ{LVAb$1VZ2OcBSjn{WiT?4iMJ}SfQ1g$dABL zLx+UceCd1@g?f>`*v+L zN}u}V_cb9T#SZa1iT7_O_BrAyjMUpFK?B!AT(K}<)ahS zA8~d_8*C;{z~>-4;?%m%nX*)Pg9HQ;X*Ty<2>}i$RP}^m27-W7_|-IXgVq7tzQ2c+ zO8pKiRr?)QivBCC6g!zs8ELchyXC1;`_I*PSgP4TT;oUn4|lfqIT7c2MQT6Ay?*BL z%kFpqiKW9XS#chMI$j2p1{z+Kiu|kIDd%$V%T@engKdH5da8HqJ6}Fktc~l%2$NtH4lOfi!E>nQFhSb#!rda@NlNUG2bx|w^`jkEs*n7nP;w5PyMc~9|@= z`1aZkgs(>NW@_eP;7-5;(%X!7tZ46iO^d`dcLDFW=I;G??wro&D`E)C{;xU%HjTAJ zDTsLP?DL>x#9O)(;xc{A-N88odzLYMwo!M;8ap$r5R8U^L*D}&dQx0jvmGFZ^f*$(7*p(5;ns_GEbC38l`jSZ1={>ymI@YK;K7h9d)|#)f6S6YqnPm2f_fSwu*3 z_-bEmM!siRe&c}#%=*M<`f#CS#TMuJm|ibIC^}a8pg7&X1T$j~Sp)0r{v?B~sV@{1 zzl_(xobi?N;X`Lv=QDVK8*A-9Wq5z3CjUnm-V1>F9~j<$re=_Z^QC5xl^xI|vHZ=* zoCR=O{};pv0C~RzN`Qxyq4l4s5hv$=M$N{;{-S0BP#Vx74uB{A)=RPcKknW#tZr>x z|At}{cW-ei?pE9>?(Rj3yK5=#(&7#+THIZVI}|DI?(V#yYn}Zr*?a%5YoGn;d>|y5 znaRi?BV_*O{oFU;zx9mNINAO#Ycu&hTJg`V`R|Cgm{^|0TfcSBa}$1V4dA`?+&}F9 zqIu)VtcNud_FAjw*tg%&y4{zf6s-L&;9lHp0Ttw)HAZNGP5?Y z{;Qhok5|vXC47u5EPo+x2)OiB3z(p9IPDErh_9zFIyYz;%F{;SN9$7`K2)(6O`{QMaSB2DYT9QZ{JuzWu-Y*w1~ZC*vy=eu60 zw#V6Z+0=1OL%yp8su&kDiSZW>wqVqvCKA2~2SG%EV->4x!!uQ?m;s&ybn($|kHZ3(pfo0Ck?*_-`ecW2S3<6{Q> z^qwf>C2wCvyV@xJ7p7@dW;R(Fm^Oqy-q$%ye0b=gOiUL(mEb6k0X{<8*B$`Y3x3+U zJXu0M;%A?mI_mxgWjdRvz5Y?1^%@kotK^epcg!45mcd>8!*#Bho29tX`3vGNBve-K zb>D*+>F=@?TSM?F~ zJ$yEtX*xax4hOde78%@MA!UtQ*>kJRivd( zwGO)1m78LThqi^(rmW#7&FDJ3e{i9JWh7-824NGKv2Q>jJi>-c|gA-!K* zNJ7gwBbh8IZ)m1_={s1FA2;?^6&FR^m=Z%{OC}53Qbg4ZjznGB^`OizEY#V?Z$;d; zVD#Mz@BQcV^8hG%9*B;h!zy>1nU!I-T%rhW=mx1g@FTU02x?H&Py{8PHUZawdgo7I zftq1&_Ctoj4!f*JRM_Y4nU6Z%PC11!Y|tLgs(SGL-*{^f<`BClgRiE$r(41&165_P zYN$@658dQI2LfFBMejPOv5VH)b(Ym2zK6jZT5|5A6$T7^tE=R7+13s1h3SUcn*PvJ zB&tV8qPMIj+kkho`+|@0La~SdJ5oLqmL#5}`Nd`U9NpdGYA>c2ji98zQvKD*`_Hem zalWH#x~1XnxnKIIVqLwfx5?8kt+IKH1ASr#qF2vB_eM| zh>CTv20MI-T4ZHGxCL9qmGt#Jsc_&InUPcytEf%G_cWqdvW+D`EPRHH%lKtXUHYXL zuY^K~F<$xNZ4XM=J|QZ`1F4_n6OLi`?HVxW@f3{1KCbl?T(sn1cv3&hLGgXG50t7ciy~?1FIZ<8|YzinLFbKLU8lRl-L^)PbdnzoF((&5p zk#f9XCDiq*C~1*yDk(`%cXhp@)k(u~tuFyoNYD-L{WoWh7skt98s6aE8UvHliRVR* z!Xk+BQhe#l8<)%?myvZ+ceUd=0SAzeouKCm7`FZ0#yFnYY6%@=N?-qCOwyD#Lz7JP zv8~M@Q##uyOVU?zDzTQ)LN8}Tt=ft5Ixoh{JdHy5VJ zNNU(ZKvXg$9S>n-7N*+8+?G_H*b$lIWF)lb)R3Za!OyeWX=^g8u)`Fn!cA-;XOOcW z0JNk<+&MmMA{%ol;J{R+M*^SsZPF3VsslhvaT3~cDUJWr>oSJrN}AcugQ&fUZob1) z&2MQo!A!QRuM5GI8$|p?6M{3h(NKSz1ucWB3p^5lu|W@v4IL8PNMm4Z3_OpG zC17k|1v;otCf@XhsLnWYm39%N7ed;rTs*Ls&m0G=pRvV8kGSypvF&@VXK7g@k;;PE zQj+wiT(NQ==wqQHd}=mYHe!`IU~ zB)}xaPGybBe93{2I>7pf7_j*8^@Z?i^l(Rl+;9L%ifMM9C_BQDMu;9mx=@oMZXH+H z!I9D>oEe_OkzNRtG&z0=}tWZBK%}s5~^WL>M2WIBmTfe zg^a~Vt^x@1`ozj#1H!r*-WTfDQ7GD$Khi5I&tFlNi2!6(q1ZqJJc6o15kJhpxE^a* z5=h9yytAczm$Tt6MnVUWRTI3i#h@U*3`}c3Tn$L?cp#cDoX$^?cU;Aej1z` z*tUqSjUFpvYo*6+?mkr!d!o+K>))o~PiM$kd%baHOiX6$HkrSu%x_=Wk6!(h?C zHmvXi7xNpoV`khm#0NBBazpjJsP%a)i(Vgpj8u8(NKmX)O;66}WE4<|OwM3Cco_z} zif?vjT*~9BitV zTt${u=JpI;lanRl{F@qRxQG1q6z?DHi{&d%><_`IWy#=%=4?ooGm}QqR3*;-v?kT` zmMcX=#Il-*3N9PFQ~5n=QEbBKpFv+y4W^2S*RL3O*lh1QlpwmW(@~u7kkL4zeO3w# zRvQx#7d5M)t-onPh!#yPe^cRZ$6c4<#Dg&{5|b`gjX>;ikOzqyq4HFw-5+k8A~Ims zJ`piFaF+77`mC4**r}X0%OZ~S>xuMzC50uwvs=rIg@XA^%aw1`E+`rkiPr@C69l)D z{{asbllT>zJeq<+ZVt4~xB?6|>SyZUe9%sCqM@+@#!j$w45k+9II0$B(F#c}>8h-l z81QzJ=xnqBR>S5>1=M~82#$^X57yytw+Ds5*(aY_7u22|v)uVdqnSfVSZZFpVD50a5iZ)e%mGx!~@ zibhM&cWv~l_ey6k0-R;e*2rh8GmwM%G#UZkq}F&T$3x^1?<|ARq}@mn=>~Byi+$xb zd%=9Hc#w?nzzj@o%$^suCQBgp-6dlS7PiMb;VF(m?Jk9 z&c0`9t2v4w-;G&6Y7OUkm33R=jF9Hd2^*fWEVtQ&HitLwn`e#@7-EUK%vP;+JrzO) zNrQ_bk7^CarWnX%OJkhv-sDDn@Wez|zjC2qvqbktiS?8B|6+dxlT!vz(>pNQpOnGV zFgQ6BeBJ){d?IFPp_0 zV{_iw`+1E&M&cjSc8V zbG63*95DV^W3wuxtEFn3g_>Ll(Caf6_1Dceb1geW3~{+nFIu0FNfRtD{wYTLyAtdF z2u6FR9RD7par|8d_@5N{F)=;YKK@3n{*jo-1lZXBD`;irpl4ujXy#~d;Am#^XBRH^ z|4#iQ6Z3QZ<8QR+59kUo`~O$C=-K(|ujq>7?}+t3=^xH#_qM;b1@PtiS4{!B=NU8p ziK21*ceHw3&r-eLh~9JV=I=xgu$TK+L=R}oI~!|9dmGC?HV072{SkQnJBG%>$;A8@ zhNflnsutCIx|DMSs$%8g1qKv#&#;3Q!~?i>T($rl>%)_PY28cvz)sQ~iTKgF(1Yu1 zE&JYjuYn}q+0L8U$3`5$G{5~(!;iP{TeWt}z5Ue@_twM8NvqTyhG!(UX)*T;q$_B# zyhQre$A`nx*2a5y%9meL(dEzYr!mgcV3@K9*w)Z4{aPRI*Ea5t_eNZnp0*kIpSF*YEgKwuzFI2Oyq712ac_y+g8+wyDl?xQPD|GyEy4q=5enKmvp4Ot zTS4{Hcfd}3;4;_1o$v0^Ur+9vGk_c6+bq;GUGJSSxU_O~Px5Q?J)I2)l0sRa&HMo7 z4_>Hs1UZuvEQ%_@HOdcDy%$}xH&g?%Kw?W}LJD+lu5ae+FR=H%x1fGNG+p9&$&YtU zcpq7Zetp(+wsZ+|J=b{@Wf>l@m*r*o?xxPUIeog5@>+Wn=gce;_IeA#bFfZ>3WD8a z{|(=H`OW-V1IMh#{$1dTp?Blv@C}*8LSq1b-Df9j2`~Cxoe{6nOX9iAVVM@*4Vr}x zl1AB|MqwrigzR_lTLb~R7pdr8wQjS6jTsH(XA=6KG$Rpiw2VA)7&cYvsK4Ii{J?r* zq~T89@J}F&k&jxo>I zIK@^K4n^gpl3ZhnJp2$c29}WRsEH{%{C7UO4;{E*Q~b2xuI|@XAWoK@l@KTj_MqM` z3Loxz6388f$uZ4%NHS9#LC4-EgvNq({6jOg%x<4(-$fXaHnCSU4c7Z})H>qIEIt^K zYo^QuY$~XdTA%=!Cj+kI0sUxT01?_omm(pqG>q7)Gf9U16O8{YFkHvM<*c`-{N75g^Ukgc%&OT8Z^Qj&W4Jx5 zqy~jI3xYO6J)d5=1Miu)qCu+O_{BL$(ANiIee8@a=lX>7a#$7eBa~t#B=pvB-!OR- zp%dqn@4NQQmdJA3wFb^QpD)`=L?~(CFP4#BT!CkR0tMR3=|xRPBCtH{0{Gg)!%vAW zy1P96wNF?FMU6PMKWaK@Ad!?S%gb5Pz2fq)DUv5y`9_D``Z^U!FAQD*hw?+07eUxB zNoBd?o3S;8ud;K+X&>sDw-a|V{12vZ*5hB7{=6p=6p;cG$w`SC5y z8BsVA#-X@86S5!vreK|rf5@_hJ}mE>B3PQcaB!a9px5armKy2Y@4|Qn0-1S8lU8}$ zf?`~gIh5?7ld-l2$8^v+2&C6n0zMR$Cj*b$2>wLsF2+P4`5^&N34*`6w6`&l{{vUN z)>vkNT3E`fUpD$}D@K)yqi!(@qbTiE!E}`G%4}rBEYyU=F6GrtJ}A6o4S!u}j-$Pq zG5J!&IyLE@6K2w`dy-s}zh{)IAOWE~V?1L}M8HIxzhG$6abw&C(XQbX`Fr6iVVmkB zIH+0=7DW0`g~7rP?L-w;qDumM(>d)xOBnSlyuCA>>=CANgB0u1kh&TZgb_@)4 zlT0%AyS8dBvXufE9u;YE3fOa2(4sf8TQ3lQ1z+_hc@_%2#28N=c6_QZ*Cvn zTbR2k@F&C8l@ksnv=jgnPgP*?TJ>&>VuhH9t)+(PiT^xjM9YXT+XaeHg~6p7zhQVf z+|H}?1lB_`DddeCMBe~sg36P7ZQu+h#{rv$;YIQurfD0vqutfTA=l_Pd;^sUi`o(X z^SzR|O?OEB+Uq{A(s9k&;khquBJb%K@hRX3p$nkZgtgMTBPYQcRIATOT_K#}irOu_ zezsM&SZ0}iZMi2acV~0DM?qtS=9eEM*V?( zsBc%w#7z||Hf*&!E`*0}K*|^4AZdW9u*otrCpO*+`Q!RLff6Ldi+I*q5K+ctvqek>jYYA>utZy8m`OPDR!O4zBuLi! zQvIR>H=tso<5q{$LhhUG70>ZyUoeWa+A5x>#ACO~RyX0*RW;$&`juA{8(Aja@2&V-CCbW zx~|)6%1L*dOg?<@y0xsA96+SrDskJna2vG6vwIDS@1>_J5ibS@k3Sl`m!=yqPI!P5 zL4F=5-H6D*i8QQj5-*oUNGH{;WSQ9}1(`W8?^>tgK0p#sZ%(EhS;nZnZ_zp$vMIVb z?3wTbjGsKtbU2nwJ?Fq^A_9;L(VUHng+TBY;x!R7)U-+ zYWp_iQgdzvOxDky7i(udd#n|AR^T0$QjTg_muys5LqDgF874?^I&rryVk0NDs92M} ztXM3g8@6^NiyPl!n_Vu???xABIPuRk=ONB7;uTS;hN(r;IUuepxI|H%B=9So6}DA6 zATBO!hK@96z?yW$gK(u|5;wq^N2o zx6Z+o#D@V&k2a+n-LDWh!s8TW+u^-p%MVeGbd)*PbQD!6LchXgVcQ8;A$3eoFeJUA z?g_UTOiy7*hU*!7W(OP+fUZ}P0?fe_CVKZf{wv2Vxq zvE~6wQeu)~Y#CsRLzLg+H_?TXBT-ZwKMj7p@m~&%L{SB7AhSs!IUN1VvU8x3-aK#G z4Mwmdj4=XNLpuUQ>84u<Zr1WH<`h zPIyXE?7}#J3V|Q%ULYw_3`ET=WGgHNqG5hv>#FILF&q{i9te^Zv*f}JPC1;A7YcNl zj~Qc(luphk9At_ckd{u4=#62?BQ(unjhwO>gU%?@vG_=NZDCB}$zIQls!xONR(XTu z{*evStuc!P?80RfKO9j67yMdTTLIOVo4TWCH#Brx!(%B*Nm&F!BsK1J47!6x41bkq zj9G4YZ+}5uuRe2ZuM=}#X11AoJ8@pzYIj12XR|%(t*jkt!&^JlH*Yh-(9|{9I#9Jo zM1v204Ug?NqN2Z#l#=K?Dn9ksRbi>25bXL-5xuy~*}bJ^ zwlN{=sSS2(gMceuOzUHZU+EMmBdke`ln3)^&fMSBW(j}gDB`#%;ux2(mbD}1Tz3YP zLDFJPn%d{3OPUH>*Ni%ha0VA~YFpK`<~8b82r7n^C=` zNO_j74;&YdkcLaq2|UUBuN7U`F6kPl?<28v^WN!X#cC8X`#SdE2~L)a$=3#>s5s#s zhur>LhPK{i_E*sf)MwY7G6t<$1jIKWtn8*158!d`G8b3JH&`Mp2R#ypVuLI-bfv@T zPAlHM?v%p#%2{d>7~{IYGT66QVdkbQi%8j(#*KdCQ7~8-)xaz)uVMnSZV;J-(Mck% zQ#A>;qGs`*&OowWKAmVsoWn2y6?GKf?(CLfnQV!wCL*FXF}@q1YsrDlLL>ywzjy~vl$mRQD+nQZ=gsSHr54E$BE`V9fDK#=LcoS&@?vD0%G&FU zxNnU-it+hEQ>NKvem{wg9Cdb2jDf(Y)x#kfFw+M}#P&x~>8~z>jYrZX#hRj^LRC~h zZn4nY1sPCm<=XAxSML}W#UDr3s{PtXE_U|x?{kuOR6!t&m4*oBC<(J<) z&@F$EMR7d)%>xChe-}kP;~W5V85vueS^c>+{~gH~$Fm(9aO6KW=Gl{t2~cbO)7CsI z#!SqNE&p1C`9}=+@9`4rUyCqxp7D~`G$7G}s?hL`6Hv&s&*iCQ8zo$3rGl#yn0P{V z3>+Xf<E(NZ)JF2~eMTOjAsGvzY+S<2^G|`!nTRqT=bs#8%_eyv7!L z(38$C<&k3D%)-pj+KzQl<-6d7r6;?qD}L?A2y9CaKKiz-9+!8SgsD;`ZBD3pjM(>Q z(-{msK}$Z3cPFMUHwUdQu5KS3vafzpq^?Xi(&EeImt#azzS-o{1B$%F1KbuALTv6P#@UooFUf58-+9y0k zoYn5(=(+A^=a10oo>>puO~}C7JL|y<(AlV?sM|cNt2^|b!Mftt;d|UWTv^jFT#v1V z6pc6b-j~%@Th6Z=w5s19o3dn&EU6&rR}*{AjLb6wCF~l@!*F5HK0KVBB*2^O2bnl| zyU#b-IJ=nWCc~2oTr8cRGj?y9fhj<#(aYM|OB+`9s5%d2CMOfVru*Ke+n9Dk`-$D1 zj>w11*G?{Kd0=X73Wk$1n zuD%VyitwN0_$%eQ8*bWCu830jIgu{>>LHsH&RKi;fHEkU_hHS5Xg=+@1g4hPI*-m6 z{!`0TboFCC1$wRh%P$qjkDSr92t~&^+JkskmyrA^M5)>+9UoGLupkmrn3P-Wc9AjV z^lOJ)*AA3Y@w{rjDv?H-i}(NhR%`u|Q_I4P_0!e5%%=D-u@X6yjJo>_BFVJ zGttl_sm5Y`9eHM11AG}VI^9jqwK?CMD!$(5wQsU~Rckd1-xO(1JKf|1waRR#S04F> z53d$^4r7|pcG6ooXe&GzT5A-VnIcRM?IzcWYSjoaTy8u~2UIz-fT&0jnCGZSf0fsF zpM;1&@!mK7YLtXlRgekl$Mbb5>vPfGo$KJE`1;nuM3!Pv;KdP4Tz1DKrJq`@XNT7BM>6p#x8emam3%MIFP0k3o&jfFd?OEg zxub8G^ff?v7-|qh${#^$IEf@Y#FbF)r%a&ub@Vsnj<=}uN3nDrX?85_njDRM*3r;? z+*r9~!N$4jo#dx=UqsLBGJ8NJBS|1gY(j_A3tUaY+V291tCrP2m(Q5MuA&Qu6Ftp# zE56JPnKW^&b_*M^_wEj0NKcSjMcywL_`*c__ZbGqYuhEuQe>NTwX@VD5mh#((9mSn zi%o@RC9hmezM`iohsvYv;55ITSm4hx(~8TqF%_K^oN1TftYhNDGR-a5$X&Sjyx`bh zCjqDllWys$Y8WVg_O_dt8j|{A;1jc#qYA;Z3)QKzMSWl?a98~fFWB0X6oJys7)mA} zUykYryr^ET0L6{Z6=%x6OL?q(Bz#h#KXD4TE45xd6|v&fhp@#qpZ2||xiPL1)q&SE z=J!63vs{-RwFDgUNg=T<*TbhR{fQ(g$G1NwP%;b6yxOu?b3eb@cWyNV;^^_gXGjlB z+20^Bv+oMqvKvnHiC9X-QO$)%?<^q3f3dv=&Ue}p2wkUPde5HC7@6EMELL)K?DTQg znXBr^98u{#Z+|5h?0YKQI65J+zOzQIpGp^>aZZ_iLwqKH9p+$i6g>c4qDTV1)}PeqjqJ9p)VV%T4$~ zmR&&H=A&JRA3}!7V*w1;(%XD4C$5EpkH4QrN}v{02&-~PG9t}$KJ3q`UI&9hT%d}{9<=hz** z!xr~rLV{!rK`E66BT28`e`DvPno&p~6ek#=e`}f`9lMnThrH;iwz8yht%T{l-a|*t zGjm=|eUGzhtm4Xkm{4$R={u+5x|ygZzw)tMFRvpC+*)Pj=Z{+8g?Sy2?cLwM) zDp(_-ez#ix;UG$AJObs5<&C0!t_>IN%3!CU6gesb=_-6*tC*#L9%&Y2=7+fr9G6AOAucM2lT((gX($utuWuGB_5?F z^ba#2Szv|il@@5&9oaC<8Qx&hnwYazE0}JU&R?YwNhDraBinhw+exec!PTtJlKPgO|~OwEJ;#VNG*;FE)FY_||NM1){4M=e5a~Ya(_k zK9E@#8Mb`^q;D$8C--g zk}E)~`9OiX{7Gpkchp;5VHep&AFT$5U7?%C!}}6$iv>5}a&B-qM0ROWcOejNDn3lj zaIL$bT}VQ-Z9E(VEX5ieA|Ll0x0u?#HL#@IvM(gb+!!~U;VgShrn%H<5uSX|I&9p( zr>Hoq=9(GNnBY|>`1$34(Jtx=;Up;u`$h0ZUHcHA+ADnPpH(d#xh#|~qz(xA3Mo+A1LOnB&~;!B-c43eXH#o+l@%0amH<6NY3e7NKb8tAL8wQQM{{R`UvEc#taC z%aPmXMA*}$zXxbeMnvy4D;M>0RG46yV>;9o1M5T$Ub1;r%YEm*ntQ!zN%19d37*|= z(?YcvCHZH*VQd6-?$7*=v!h6`eDWeV^S;6k7JL<3lN>m6_QK;qF&NI7-r?9u&JRF* zcIaoQjQG!^>LfHZ1_(6L)_|A^kbE3;riDk;?cs*WM|Y6K#~9N61QC7H_-z+M{Rd(e zs+g%W`G%U6&%47+{h9BlS@k>%Qp_Eq)vW&bF`^qKJmT7s1l7!p#JCR>vuN@~(`hL< znMt#H6)E9!zDf~6x5C7TKBX37G8h4@)6DnUvs<(Tl-d(hwq3?j*g3X#h_+m z1+`~e_Hkvmc_sFm)@epV2ap%Pcpk4$uC>dAU~Esz4i44$FJ|bkVFbGPeRme*15AgS z{E~gZel%vmSv;Q9!2G2C!%d(0Y2VMM7nC&VT#mon5@T$Leb4feeqe;|IxoOZ88Bb! z$!Hy3{-W%_-ba(aY0a>cqBxZH;nr1cXi4P^eKK{U2Z%LiG`p6ZOhr7&F61J-3R8CA zYa1%$av2;b+8jAywL5GM z(lT8>k}B^jjzHjIkdtvBsGMBFyM-YfUS=e92Avn_<3H3+ou$IB(OVzR>W%`+V!F|eOtX$--IZSps z8>?G1H}oG7D~RYUsaL8CZ=2xv4%Z`Ak9lkk-J?6GQ)5L}H{@fY$T(_tLWA4q6dw5w%Zy=_qgcDZ(ODbvpCkMz2WDix>M}rZFm#LpNYw07xKOA!iN z?gS-$2~16JNYwaZ_zT?LgTmX?u>SkuFLr(s4tSEEL^PTm%xD!b@Nh{(?Q!ULf#(_O zw0Ww!{NlxWk>Bq!gCe4>4h4S6AwcA?!q|~^VWuIF=Pj*#&YeJ=pY*(?vcZsuv4}fx zMDE_C{B4)#=9BEY&?Ax>x!;kaV*-a>0rD9Po}-j1Kx_Fsri=>pm&0GM<;Qw}s?cl? zy%svmg@h}PsMezGE$Z9eC{~-&|++3@+ZW?`QK3!aXi~?J@XVIrhkM%a{Myg0^0RY8H<^_~khNulnbiLH&)0F|l&}QF8U~859@eUnEX*=45>UgHk)MG_asKO43It(iq~K z!@7nrX|_OkcYOQQj;i4n(iF)?? zU^?Y#Q5`@~dI`7vjTrRK9L{I14Rb5|II9~`K8yEjatT10;9PnX{OI|;72a+8&BB@u zbPzzG9_JVm*18B=m+r5_8t)%l@tc~y1BUXZDYpJg)-|qNkL@>WPR(S?{L|g$;p3pt&n7l5ItuN=1fUe{HBQWf{nH*45@gk0o45Cj z^&&?jcctvm$`5AQqK6Cu_IH-L2sm}4odI`i4vbXvk#CJ0uVEJy4sBJvtX6s$J9Qh< zu4zA+Ecl8-D6#N&MtRKmG0X+eG5Sux^7DEc1j1VgT#wfI&h-Qx9Ht7#ccwkEG!1ur z85eNaVO*ZKvtt|g+qFUFP;F{_39*?Rw_M$R9mCW0uH|K`8vem-@WUb4gk+Jj1+ni+SdCB~~g@KN{HGxIu!HyAo zrZjw(O*Yk;JmtUM4%=akmy58=d_{>|9+& zv1O1wDT-(cwg5*MxnO}AAP3^J}-{H~BBXN9$pVw8>nBUlopwsfA89|&S(ht5d^x9Dm zsF0)bMJ zv;$?)3-xWxKQY$gV;#Phb%}V+$^4{)k4mBWdE1tX(f&aHvtu5Y1HIU(Xm1VLEV_wQ z5KfZzT@>4MAt#@iIgGP;c{mf`MM_&3`F0D2yLC;w0j+W+K8j)1lDJ{beV3@RUcNN1 zgw?6I>%fF%@ugi3F*Cl=g)!_`+!%Io?@{HpkK!FhCfVd_+JS2!Ghe%vYUup(uGASB z0y;UGOp?*vyby!VBrV&iBymh-eCltoExnwQ&kl-bmX2ds`r9k?d2r$o3?_uGoO^WN zZ>6BEO%W?Xb9)TY6p$hm#plHp2vM^McB`NGkUStN@h`|XW ztF!<{^*|gshKRrZr8hZ=KYT9EKnolai6lj-2&-%+;4Co~O4K>Ni>s9D#EvCw5lfpI ze`JeBcfKnr3COxXacjQ!Lu;QQZL*bT7PJS1{U1>Pi5cz^S1kRDZ5&BA4aQNsei~Tf zeWZ?T>+|is$qijnVt+vF!lPyA5rthZ-ssVI9T8EtPdaz_^~hgS4}G>|yH6X^v8LMU>7`7Kn$=VZ2-+`j zmSC6!3C#8jk?$u&)DA=8Pxtg3A|Psf5`S{Q-@*+fU@YukHiM#Kdn!L-7TfXw8Na=N zK@-YFOOwebs%q}VR7|_op#kecS#EfAXr#@mGa|7LQXKWe^{7%~_ahMapF*5o@_JGs z+XYmhTrC&{i<<zxy?%a>GcS#gou%y>1Anas`#vxA`=a&T_CqfS=? z;duz|T>@BI>g*e=4tAOFTfo-;^|0dqJnWEyigWMK<->wDWp2bbL- zK4`0JCINP9qOH1v3-|WTN-Dw)&x$ABwQj%}SONci>R^zqcSNxl^XX5#@A!|@3PG%X zE5r_qO4-A7p9fMT#t6*y&6-irzNtZd46(FP7uTEGT^CaqipXcb=#FO5@utRxFy+R~&+>l9Hur6!66wKrZAdfTZNIk(%xS{6 zNu2??KeJ0Hc*hZ>Mql7~_`5YiMPnbRLQOjt`OP4nI>Ym063u>tqd!pXGHO&=QMoHv zE__f%kxH-C!qlCkgA|Wm7`LweSh3hXAIgFzlQTK``@|K*%xC`og^4 zx0lMuib%T@I50yiu1I15A8$!qO~gfg2wGOYpkX2C!icAJxQE3ZEHO!&C*s{?<{X-5s?v=C}%lNhdtR~pIsN;Tq zV>RG&_itU1R<=$E2KBU_eTv)`>jU=b9wM`weGV8<_#ZPb&1dfwPsmB*c5H&=504?dwj4t+@or_ix1*RwuKv6URcq)*YQ z{A8xYTyghxLiU%=^V4o6>(bIqh3nD>d{Xvbp-bXZ3*PDK*HcVcdpmu@ zm1@l$UmKdS2PNils3eEw_%uB-Q5G|CO};ef?Pu7r3sNz#jzuoh7DBO6%u2u+EDUf4 z8`~gGjL>T2@t=;ud9^H`+@@xc$03{9{GCzs4vCreK%pDMjDrPBn47S|c9sm0a?IJh zF3#C=;;c%_f*4Mc>|NCP_(6Skz6>bT8t@sLa}ZTXLD6pH1!{_r4aN?LgDW>>qx!eP zsA-dV!L(9OCdc<*!Mv^HkRCOO0*Z>te83Vni?Z2bHcsC}Yfjh_m(rZK)_%-aFcdN z?+~&%t=W^gHaEy}kEXb06b$=-AiifJ9icj-4*5;2LSM74ldI}`5j@o$iki|a&hOVm zhrqEjIWDjh0T49;Bwef#5u_TlkhB4jKNJLU9W#m{90V~?Oq4>;;YPatb&bd%)4-1z z1vm1GUJCAjQck{%Q9bQbgmOwCyqjQw`2Z%-Gp~W4yhU#p?0hJvGvWDb`ogD(5YvFAFGdzt6k1#I5U^?y}f^~|BZqnXJg$lafiVZ2Q0Ji(}n^}0oK)z$j!m2B#or5@n*wbAW@ zE5J(=#q<^b2e11ZQV3m{y>y@!dg?&xwx;S3Z1N<_$>;rospi#SlttB{e1}x^q1mca zwYA}uns#wTB@W; zyUKljnDE4Y8G6Szf_oHxuy9KE=?derdJR&-F*TU(6{S$cnuzl2BiNeoJ;Ezh`JFeY zSUQw`*?S_t&6+}qPbc~5G!EOnu(AxKnuUxpFl%M~D#2Y;jx!q&6EG2I#TioL+?iH& zmYSaT>K(j-JPEExZo)9jja{wp4EQKa54RlT=VA0!8sPWzFgnwhGZA&qsh5H$Tr`lM zr_c??+zqFy1@4+^(t8BQ-I36%F338|dG?jw;m%>VS9s7TstBDS(j*;kmnI&g)5~ykWUb{((0h^EWeE8zd(bZ347Nwi4WYjf<-3jMFpE_v^yf69C$mmm* zIKu@I6nT7kkGpY>5hlB&ssSn3=T^_Reap@U203H|&B{y>5n%DpRl_;CyzT`Zu@SMj zF}j4!KadpJB~Qns968g2#SC&{UltOPG}RaGhl0g7k~D2m2Lm;H!J(e#t`ui{nYG5|}x797<$hm~T_#yIsX7Z+v{>i)F^_h3J?z8TWyQ+e2D z%Q4`QEF$Qb*v&6!bK-bAyZMsR6(mJMeR?8=`6D>Lw}*k4lcbr?yWmx>i1PYc!Zu)K zu(6h~N#g46aUgdb=-@i$8W8ezz>OR_AVibMREGaUNdLPiJ$EP>Z=_SKWY5cux$*V0 zx{%|nKA-oeig6h?b`cbM_fi>{vOxJig&slO$rYJQI!>K#93@a0Dnr2i6Wi<*crr=m z0iH}`(t#%v8E?F6XSSQxj;kl|k|AM-e@3gg{$88*e}h*2!V3RhFva;_(kDGz)c+>N z0er50878qmyVU_kP3!*^R&;Q3ur;>+lU|CQ^Y7}y{{(Nc|MElotudTLfK2XRv;yc0 zJzFPB2jf3qC;&41W2gLkWXAC~WET0d9`V^be+x`Yt3gTtg@|D8F4f4_vyGxr5Dcbw z^XWr0wT?v0MtVBF{?YY|tJK15GDRM8g6e7wwcXMIq*ef#Mg5MGzZVqLNXUN&kASKJ)8cUr1+D63K|j216;)GHo#N_tZGY9{b#)?_5ahFzRQGuq zL3@D#`KfLh%166b3(4#X0$Hr5nYVoe4@8OVZ@X+#+10jYlHAY1?xkmEn^B4Tkt3P& z)wxE7ER5awmou38w|Ys$iTw?&eNY*@0dmN^``xFm9<|l)gGRHhc%5+{DbAl-QeJ5V zju7HuF&^Vot(i7$t}HFAM33eiUyaNZI4^Cj;jLaY@IHRCT5c`*$uSYhAkIC*ckiHo zQl@rP`ORzY7Geay4T5Kjf7GtAIkIFwfx)H5^79+}kL>VVVVMk52}saN?fXh_Ssw++ z`Pa_+giC%##_yj@0ivQ5g~XUf;Zb~>h@H%(HG?*xls+fUPv&5r`~5(H9N1aBq3xIp z<6JoODYURNy>ne%_?2dEETh1_>Rwb=-Y?pO56~t-q1>-%$217#v_l;jLr{Tz4LG%* zQdt5JDXhUa^_>UW);1+;_!ucg6FvSxo5Hr%pwEchdi*e|Y`Y0;T!9EkV)s!EYd8VI z`S)y2D0gZpI9MT(Rieg7r>r57}#B2@0o{&)#sS zY6}|delDjk6KX17zPX;3hq|*;f`3!#DVu^O{U!~$)5shX78?Sll?2NC!7JLdn=K?t zPo)e=1nv3-@EOJge_a4P+yKu?%Kpo_BneQM7x*(gz{hpjK@*L~bNUMDy^jVOTrk7T zb=)Bv?kl`*nwl*3-?M^!WiDIH)Qq(Wx z6#+MIOmNzQ-XRGOLD3$#6nO=X_WbwkJ(SsM`T59xayF%k3TKETxD3;x-&c6hKWbxN zFb=1BL!#H)2ZWSe79#jx=ZRO2ARWTVh$Tiiz9_76zICBer)vpvTY_j}zx5kfw_d0* zPFu?6@Q^m3JL%k{E#d!|pQmu}lMd2b_r~*5;*CeH%9);>RNCuADe)kPXWF!@8}vASMMXW9pp__YNK8XGc_`Llqt=;gqeoY5qGltNX#S zaM!d)7iVfqrB9vMFu{P9+m_ko1;d+*7YiCEho{Y&Idowr5Vwv}GY`nnOUhw6!Xag{ zFVK*XW!~n6f%2yC<=T*Cb9ZjA3sqD)>LGZ?M#kJ$8GAlmSHc`uPIf^beO%YhzhUW2 z8)>&@!&$mEd8}q3J=wtb7tdre_@@s3I&=WVHl%pW*u6>WO?zQ5Q4Ye z5kn1xVX6W|Sx7KmFp{D(O`c*@_mG}dbmOKY(b!M`YtzVkgsjKV)NL{x#6%45OtwL{x^B3|-uw zVQ}7hr|;p1H9JLXW)Q4HfTzB7_ZnF~X)vOeNbKgd%zR3-aIOvEv-HJAHDR}*yB2A^)XAZp%W*VV+CX9l?OK@a_lWpgY1FTUppL z9ZXU#kL_u9^UB(#=1mXI4ksgyzEShT`8ZL)JxBuX;S@mgOab?>mbn6G@bgOuA)D`? z=+)EY%B7F1#HM&7Sn0%nn_m}EusJ2oi&2b1!r!3j0ow5dM#mdRyGHp(?21W=FTj$2 z1KJU$7^?`hV@Z+n+aUpjUD56YJ^0K-#wols*m3iMd>X;?ez*13W}Q9YVtJsJvM9J5 z^O&jVC-R<>M*7(rjv;^4LLoKs-dKAd(%uPuS&Y3Y(tonxgWFx zT}RJtTX`%`En9Edj=v-AK~LJ0xs@DBO*YZ*F`r(XR_07`KGLZMv(<1b%`e@~EnO!1 zmy$~4lEJ?AGdT%dKK)D;5MRnh%3#H;LESftER=mItYPs60qF&TkQmIM0f> zYvxg)`%3nbTt;hzju8dm`r|UVgL7q_$>l++NCYdiQm@VR^qGGs_1IHL4kZLoJbVBv zaR|SBCc%o~FZ@zip;ssbNvc;o26#n6gJ?(!PfD{62qJMK0Eem$3Q9G?FM-y~0B>CS zUk{8j5a?#zaKMQ;$DyQdo;Y9(T(8JUNsgVxONf8+#~GYn`|hB`5k?g7_0!WE7g|Cw z;0E172y{+pt-!q;K7T}025urGIpe~OAjlXGv>~2NMnQ^f;3S`B<0}YO;HN6LMO~12 zBpLkE08m-~O5B+=HHA+*XYDjB9X3{34R+-DSgFp@>Lc7D4kg9Wsw>$$(Fj%o&% zJq|5}IVLp;XClC|RX#(5K4I)Z>U~z$T1ceYQVmrEyo#fRqSxsVuK-s1s<0QB%#Tsw zS$T<6641ga8*uO*&~!pnqZ?+_`ey<(yeBROHqANQ2-$Ecqs@1qy+%gno` zt5fsFj^9d$A`RQOf0&lYXYw6(ESMO2`g>2?g(BEvDcvc;pV93JqDY9ZQ<;_ z8(6)XBC>qOO@qC3j3WQ(HJ!k&9mG{p#hW|?{JvDp8-4MI{kPz_1U3Hou0W4bPhw2r zSdUSrMEKYBLh383?*VoBP8Fd@-&nYlMgy1Wtj*j&&ngQ@i8+zYlG515o4Nl2$? ziYa3Jx}}UW3j<@E8^M?hM&AX6ym4lUIgt}AElqg@|0F%Gm<0CWqB0`^rM|?17K&b47AHLry zgE!bz_8oa&SzcNvTbpwHo53PqSQ5%BH!Cj71JM`JIYrbUQi^(nD}G#g>}x9Zb`Gc;Q+-3I0pil{(JKHSta$DX83 zsF3q$&zE+Xs#g92DfNmI*Au#mn(VTdx(W*2UvfQqw{RzOMRm3Yx4_#_UVpB#kdo-G zxR5gI6MHE8V!p^r8Bp9mj64c8-&q_3B4ar%fymetwi~tuFW?QF>ygh==U(63Qb*{L zim91?kAT;*N&o%%r!8;XRPLd$+Iq4O>dcNg6S>)(w*i8OP&ftg=|L6_Gy2N_JSMn` z^x<#evA+fr{U3qHo*;z(0UrBnAltu%c07r#|Hgm*6MEtJLu>tSBZZtyU7VhBDE=Ar z;P@M$^53cr=r`u`nw15BrGBGhtN?8H_vjcPp7o?wrEh2kgm&rwo$UIbqL=<3Kr$9U zNb7ee{ilu=2O#+Mhj`WBB4rMy?#_P>eEZ)C?Be)Cj{XmH>OaK#IiAGm{}w4TF*SBF zwKcVK(RVWa6Y&y2ss0r|{BKbz0Ga!*fn9$_shY{&nAsdTW5C?_E$qWV6TMFP1utA6 z8j7WQxN}kkt#5;xa~B^L>&{K7WNJJ4`F5+KZHa{AlHIEkTUqMI{prfePt?i!ft7UW zhjm>f+(yDi51T_bi&r8|_a{Ta@9%d`Ntz7j&KzOFh?jx@ZeeswJEQo1tIqM!lJ5^9 zlE>?Zm9F%KjjLb$%LmVA|3InQ>`?)f>epAFUpn@P?tK8au+zfrTEVF9+H-D+P%l$= zr6;MZ-BGk9^poom-|x_vjs*GctBxj* zytGgqN6 zz&Bl?THE_#mVpb^;D?4jLZQMXZQvUPr^i#|#We4#5e%J*t{O+q9?lrE%HLQL>G07B zngOH62s)8cXU$hfb&22Ch`$04l;05B0yLx8>HZ{D#RJ&cKs|uUo@)5TVI?7>63h8t;(EPJ17Ch z6gnT2fh`nOI29Fx%4ExDfKrYKi)enAeW^RzM+S@AM;0J*f{9-50vqv~3`$)TV6lB*#CJEs_3Tcf_gw`Y!v3cU64ZfcxYShHeLT1RaV%u zTK`mjED{Ct=W=?61HP|ei{L;6d2D)%V2REONq-I9(d);{nbgXU4Z>AIZoe68ZxP@b z+uAt$%HiGBhFR%NV(sRP{)k@k_rEhb%-2KwgS4jG-Nl%AcZ7o?SklDXNSU^PvC3Yp z@-`Gry2}q{8xvawpWbZX`e7J!@6|V3Wy4ctlUiFi)z@9K2hOaXS&HNkh>#&X=rJ9y z-kD#ltzq0t?-DmgwVn6%F^V%s(B`r|)f>^4&ne2OSaBLh z<$<~>3a$gxPT`>+;%9>gM;GfEIm|uUzNlIw5<{p4>_nQ;B}smwV=R8>nyA(qC_b{= zHPHn~z+}q`J7~-EAp&8~ifSi#mKw`Fi}zbJawf5o(v>1h#XX3xE@#tUu?iI9aLW$Y zYso^0S*ls3tfJU7-^0dzuznl6M1uHO_lZ+uXWv&eTyt#^vTXh;AdXO&%RwSI?8987 zXBmI(-W+B1wAeF%=zGYWX$QH=y)>L4@VmKGc@g}TB4vwzsUA-*`ktxnCH}+Rm`~W! z%p7+Qj06Ce6i}eHU~LkiDylvXF7EK5wunK3%X-hyR6L0N!}(ARKX0j);igtxIhRZk z9@}JwuO`9oC79Ftgz%;B#I4k$rf|u}HN?6LPfYYU|H$xw%av;H+lCm$%Dwn#S{*oJu$*S1WBbKLJoDXg64LTFYE`Ioe8h^p zq!=R&7JwNN1Es@)@ijTd2-x}2i$Bx&+>EY5=>U7CIEfvB<>)mb7ZI>*kd=rqrR*8oYxk*+Tt2u?&Pz2V4e+<-k1nhEH zOlI3gTf0R07&yIF`=E#PH$Mc5sXzh2TFO7Fds3cVAs3?LI!Gff|3$j$Eqy*}_ zLjL*^B79ESNY?iI*tl*!Q^RibnW5#ZL_uSG?{habxFK$Of!0?F9dGMq@~^k2cT;Z= zIC-&2st4pO8RvI(j?tSv14RjE{G(Z4cF_y;nwAR-I~)jjhU?Upb!9hA6)+|cAcf6{M3XvQYlsM8>Y&Qp`% zW>S}cvgUcFFoy0&&+|-UOfkx2j|ltKM0jcxAh+{v1b7;CU&)gLT#oB>NZA*<^FqV1 zM-}Q&I;#x6nRTL10Yt9E;f3(kZ*g8&9pRk%YKl$gbdOh=*H@W!Okuz)rVJX$<&U%T z(M&GPlL9eErYkYv&+=v_mwNvmZpRq$05x_;k{@CCYSUgy*lJTB?$c>$6^)&Au|cy+ zB>U1E$yA6Xl3<)O&-k469z5sjYQL8TYwCP6lf?H^@C+jY5(M`^Q z^4GJ%So05y_Q}fHtCf5S2?*+A$?ldslYaFT8uPgS`3rLhVf&-w0OkNltu)r&&<7+;S68IgnKj*r7!ooU2~T` zzCE@oLoPv_b)a(I9*?%DAHQdjH4?VF@LeGt*H3L#p)~Pl`xXJ-OeH@a*$3trPrH%6 zB~jZFmu5+Ilon`VL&hXv8;iFJ)Ec=)yGi}CW14t(!p>L0S2G;Xcb4p8#9mHx=Q(1r z^EIo96&t2ju&jmb6sw%MjeeS2JAk=$ z5tv)aUko@C?1&@LJBwFbwM$HHx2iqg0yf+TlSn2TRR=m7RU07*grUGn4rRr0YStmX$S{pi+XnE<>oiD6izeS96kMSD({r?b z_v#R@%2?`L!y*K1cpI?c4#0-d02?L%Y%^Z2G}s^KW!Mmy;j2j+{-3_ z_ZXSONzC?6)nW0n@GG#Dpw7a&RSl2mI5_ zNW1A`40Kc9&&8Py4w+)C0@pLsSAn5xac7f^fUyW)@~cYt4$Z+jBhA%E8~Afm0h}IJ z zs+Z;Vw|wC?J$&KLIw^M29_iW_*CZecd3o7$JRT#Pnwta+A<~20by~18zr0IIOlxaG zj150!f6Lo67VnN6)5`=nB1_?)DXdb3*&}ziP7N=NMa$85q>H9RNRbT`Y;z+r&>YL-#Q z^9I?#$4~9~L=BaHxGrqK)Bdc6%7`8#>=ud#P)Gldw$`WSM+kIpiB=Hdq^^`KiE7Hu5~~%9wD@XhtC>Cv0ZZ{ z*!(0k{F;(7RDy(=g@uf+u&ol91`PWoY9Igsu&t6VPp|BaL-_}^un}gB*H0`#IiNf< zGQJ51vrM3r!q()_u$=@5>W~#KHzsgXoFh4&%n=z;d3de!#5*H^Z?XjTNsI@Z zy8W$AIEI{$0XAudlu?^j@>zStV`SBgXtSI(hIJCW*zA)_*zXdIvT{??3Vuc zh5h(QLfwm5|F^)_Ut^#Cj{sZ$vmQJ5UqQWp2TEe+{)Zm>zw+_e0qO6*A|+2+P)=_8 zW+wVB9uB5|LT$MJ`XK(T%5VSyPX9pJxL&gZB3^%k90Ap^{AZ|_K8W+r_4rq`=HCah z*xCOf9|m*^P!B-6>u-DGKdZqC`g1k@HMHsfp&Ecd{_h~Tr&<8Y@P8Bj_UGPU|JP~& z;MM@iq?G&oa3k~rP)T;(63UZQRN`k->6g*zB! zrmp2~>tS2!GObIo=M?0swcB>1^s654`fNhz$3P2lM?x&K;N$7>68w|yI)Gi#U4!*f z%MTIU>p2}Zqz*K!4ZUrzt|=wPXTe|y$8 zC3xL8^vkPxPFm^ z5HfSNkkj^MUzoy9a@pp6gYfq+FA3AmT8DO6Mp9ei{Mu#bM?>i6Tf1!a8QF~ux13v@ z4N8taGYy<)kG#U0uAeV#d6;UJ#iUQmDW*B$f@vzC_@MgP^WI`5C@lDOUWk|t3OUFUhgvGjnU z()3PHzJ{55EAg#?^s$GakdivqUM8;MH*@g8EVmGH}1T#eSp zwkY$KSmR(|p@PoV&ah+tdzZV}Z4$aDvc!BlV`QBaA|HrO#XV4b{ExP`d?j%|#; zl|IuWYD(@MsI(j>Jkz+w>H?nuM*4sOlQ$TR3DgX~VzWd(6adBL`*8TO1iFFe__)(7 zMTQ(7Zk_@kPR=IG5GoD@W_XhVCeJ8Q1FNmQg0}~%K#tXqHVE3LjiuZoNXUj&hBeIa zmP>luE;#!!H3nN!pO8N12fUh_b8XR^6m5-H?~Xu0Nxo*|!_P1{9i_=jVhvaG@!?oH zSp2wUK_JU8Xc4lfAd^q(%`U>H^bG5zt%SvwlGTnrO z6+mR}h+_}gHqu7_L5BoLH90$fRd<=tAKBhbNv^N@jO>PV7X>+e0gllbRNP&`zQ)v* z>D~71IKJ`*i^{w2B*H|Ok2dRi{9T%$4W~#nCw=_1D#e*0xMq}ty}4kybHE%Uio0h& z|BLRDg6u$U437VY__@%b`}LafxD8%UmsxFuV-V{q$BQbd+v7-lI|e=3VmX_;#$ev5 z_%Jp*yltj5xF-Dx&Vtu`9Gq(2b$m_<~c8Rt=SL>ybC3xjpaK5g@!%h9keZ?-4_Npr5+GRiyqUE&f458qlHXvEP zp4;nffiA!lKgzetsfSdj$NLo8hp&O>F8T%MrX~(eG?k#&D#w9@l0$rN5nj;uyUj(9 z?R*RGb2!D;B@zzi)x=dV-=3DNGAf8H%(Ga7iW620R3TJX9O+b*sdB_tw$%|6Bb+K* z>}=swqDfxMvP^UX;^xdKBD-}6Ej2cYC9Fls7(T_>IEgUK8*>)FWq z?zsHol~h0@U8*uQj!@4yJHw|xD237G#Ak+uag-QkMiwRlr*yMi?PeO;O5^bAgq)0@ zIHLMH&SYuDoGFM4#EIdKF)w+!nkI>n2ER=4X|@YEjkB2 zCa^QCPW`MUdf&fIDqU^S`Q(QZdZZW&5{;6Y6vLrZfwHj%)~miH6^&OokNj;sIFhT647?S}jO?6|7`>e&r-xY5D4QIdt>s7UC@z8RTlQg5JkXUlR zn^?>sF&`CI=Nh7#1B#KqF`Cj)6CE9Q=bDH zX`6Hu{uv?sc z^jKpwWvn$>MQZ$ZijLPgv~Y@&pb*J0AsJbLh^L!ejGdBHeJ@^PnPjX zCzj2*=i>Lozh2lK@trV6d3={GQ9IOn7DC*B_HI#ce}b@Nr$hbuX5pyYk0}zDT?Ebg zbe`bMny8ZVqD+z9VNA?3Sq*&cCSQUR)na2K zr6h%AYCJ-AI8YU5Hc6@G_}X1kg7a+7pi&$oD+a7TW(^SHSftc$t|H>9rf{kaDRbG) zHm#uRVJXr|_H{K4#_pbZj;noNJUoj9r%RUWfoVH#6zN^b$572R`V?Xl0Xckr~7%Q~S5_{I}`j3($9yBa5ElZutpi<9vg z?-mI_C18J=UcnDBAaeZX3RPg*CBttw+x`hdMS z&qzPAiKEuD;1yw#la9}O9?~wmJ{nSFlC;i4t-veyD4@~7!4MaeDpzZ;ar9Bu#yJ^! z9Jhrv-*SI`#I1|fk1pW@m3{jJT|)lHc+-aGovhAG5QnwU7qa~|o{(0zcgZ`%E9@ZR zwc%Yy-h`b$TBMiW!dmuIUA=e;5arQI=kU=ixJYVEv3khS(pN23_nrTywRK~${Y`bx z6c7m9yZ`Xkcu1)@^uwL1H4x#aP+TdWo})NWfyLK7H73h zDql(-%P4wcyh%2PisMthk1`Kam+z87+}*)5y4}IcRFW5#*_8~j4au?K&o=^-hmXc} za!K!HUSzS8(|-nbk-E zDyAl-x}a#Uf&}Dw^8_UV+jNj+*kl}FeyW~Igjqn6S4b6LeC88l<>kN==H&-!jvF`` zmk{ldX33xb)^=hKoR~8|8mFgJtyih5Sd2UzZGay@(WeqoDHDj*r=pT-2F2T9nIpW* zrmX0goS(=wpuzwz#EOkAXueP;$9gP_LjmrR6qo0vxax_>lG>b=U?1TB)Ii=yiOn-F zjO5`N?SOIuCJjdaR2QmE;J85qqYzJ|3~B*kD-*$3eER31vLbK=6FBPtVPg}0oJO%m zBN~Ip?UF$bFz(jjTk>B|toMYp2s!sZO^mO(gPwi>#1ny^)`C=B&8k!HX@6z2S+n-g zTTFKJ>xr=(3V+Z}s#>d!)$t zmyVa_K!ZE=l1k*K`@~Y4RyKe&vr%VUE;zX-d zdY0|VF7FmKCl*Ml8hP7Y-fgADXt{O-sOf?h7D(xQ$?}aV8bxHjPnBm@G{V>fsr<-j zK#e`L)A+iukQ`2(>?v}g!!N%uKvJ-O?XLu~ z|0Af||13|>{l62Q#Ln`Y-UtS?&;LocWC#5%zYzdbUD?D{TFmgeTBPX7w=aQq43 z`F}u~SpS3G2=G9E^DWuIe@k)vXMH&JSwVkarT?9XJ9ZGzF~7-<|Jg;Xf5$TXXN}nZ z$b<-hgMaR!zmC>_3z`I!!k$1tKuGOBI*9#A%Iq&<_5ZBSA070RoAJNY2!Q4ObrAjc zF=cF={}q;tA_8E!rP9PLD7!N`4m8+LlL_f@2)|)Dq(5Lec1;sqPd7L9MkSLXrs4e+ zmzbhHe8{e%J?UXrY52#bCENY3g!`I1ANw!qf(s8@Ozm}I_paP}*&1h*TqHFC_R%jF zb)D+(FQXfOKCGPDHyJn=>-*(Q$@dMv0|hr7&FMKJy>D51f3q{He}B2Ra3$E$SNiLF zTi=xu6J<6I-QaQGf*R8UYSa540!%&bJqgS|_Gz)*%fEO_cA36^<-Rb7sFybMh&9AS zH~-4Zzy2<~dUD&rU!!efOxG`MrIh0NM5!P8M8dS}7|GG$Y404;Z$S(f#jQ@a#AvM&Dp`^6_Ft3>@L~ zPs{^`mxZsmbdqNa+a5^NolCju4l|p!qAsKa8wa9kPC~de&cwt92g({CNPPQT)6U-< zk;%iuQl&Rj2xo@QDoXXtSPqnPJg-6+LJzq$`PPj!P5B8LBY`DR`q3j|(dpyb!WGF^ zyw;61=H|EXl(*6ZN4;O7(+?lFb@~UhH+7iSmUf{6-mj#`!##d;euQuT<#Kaf3h+wZ z<^-(P7C)l;Fp>62@)3BW23-a}BCRRtzFi2dhRLqqZoI(i_S{y#t@^yK`$2PIV{M6< zCH62nrm5qTuC>kA3+Ycyx_*A8F{o2a`BO|i8wuJ`SdwVpek`Lrio$QL+?|*Fn)g9@ z?`v{&LjJPk=a-*HcuRNgw@{^Xp3!$@i*d(CKGBSwadXGVl~YIZYu~F&6-y&0AzckC z2dlTn4Ci}233|LauuNk5DZO=*(N%S|kEBb>5Y#*0jj}{?+PS+5*&kf@r)@pAO8VcX zrxr_l9Iu;Fb*_95it7kNN0uuIuM04Tdr?)*HLh1#ufNVL&{Pm@7rg!h;ZZp*ro$}X zau=x(=zW)S{V?t7HEjoDmWmAo^T&EjM;uiRpoGxXIXW`-f<6!EiO)p7c$M!VZ<&GD zT?eELkhP;H*Ys^}7PKL4=|bqRCD{IaejNCMiSHR%E^(EowU*OX^600|7cgzvV{ak~ zZ}X5w?+!a*sK1!^ur5k+w3cgb*y>7OqbC@ym0kIkV+_dd3r{JkJ|&rasisdDV9eVK zeE|)Vs6bfLmMH>4H&eioMd3YrUcpLlW8UjLMR z>sbAMWr=@)M8KJ7&}|E|4B9djb=(?eO6G-@u$>F3%KN*py|}Bmw+l`vFW8dh(A2C> z$w`Ud?vf)blRcCEE)(64`YlYLkU(4v9e>rU^=tXNHP=JIwY_%1F2u&8OS9}z^B>wZ zTjtK6oIM0-wjUxeuD_-0BVSA9%lbvkipu261{BSTsuT|RlPI4SMSW6D3E9*wkZo5W zcdQOg1kS9gJq)rqq|dZ$N4cgrOo9u)vXf6qS8hM_WAu zpEOH>tYceJFZv@=HMEJS5Eq~CidMN5=3{qoOPQ0XbUbw98cCPRoyw$>rTo4C-dD!OUAFAnx z$4e4m(4bD7Sp0zQoejd!uGFODP5yDZfcwtWZGFLv19m_;#aC-e2+#7O>Q~7qPuf#rf8$KC?)C< zVnUKH&OQrStUQ@IO+~V)a0LTQq9J~>oCe%oTCyn=m;rOO#{*8Wjnxl70lFVzj>gXL z@e7A%w&o_@Is=#iAtA}RCm=k*v~$-KsVnXb#Y1#bw2A@j!?4GonXsd%eQ}GB0R6Mc z^U7QHlwjcu34YYRz-!U0@mI0e<0OCW!r5mM`5j2DNBHi{!Wr;uxpC{@gSJcbE(8oC ze*^({H3?re9bB9>Z1puOH*VSN=DH5e#1HL3m|=d-9eONmk69006bC*I)DD+&w3AG8 z*n5BJO}IOp-B*X7tv21z=0C4Fc*F5_;n3?w(DK_5cTn0IGyT~Y>u>7o-n4wE5{N@l zk}ESHMn3cxIZwX68Cv6Vq0fq+IC#6co8G*y5w9edE1+6O!R%J1{HN1E4L=_h{{k5 zs2O1LZ0uj9)>}fLw*$o@qMiqRY0L?7!P9u()SRJ1+ zLXD_>pK<79^CQUVX<>a~KrI84XGk#b`%OLBGD>KWt_u zvIwP0`i$l<$P_BDDpsh=D>KXliib35mZ9f0hh)wY6>btwrrM5fg3s3<7% zRY*mO7xwenG_qayYdMGh^NQsl^k{F4T4BctBIR)Y0Vp#$uwR;k%)lj^awY%3xOXSW zk01)V-vQ`BBAC1tywti8`T#amXA&34{=^X7EBCr}WCRe&+|8YoBh>bjWtgE6o zjDO%fuh_~5wu|j*meEC^r>}OHe)c{=YrAZDc2R5Fp7ETX(FH;hZJ(izyXjM4UNc-D z`o$&#xpBxc0~to%HUqg!<*JqOJZ$hW6^DoOxC*Bs@s^g+1+?L;wLRZ_R2}&80&iAA zzq`Jc_!jwMcngiXgp?`aEb%0JsbF{V*!A}HU%7Z65z0F ziy;1Gz=OXoLKGv8xiCmk=6DMW*IX$84+YNeT?jhW-O?*ljTN#HK)0fF!UM4v1>_*Klkv$!Ia zv2A8*C$Z?tz(N?tfgSp1z9wo7vs=xwwh#${P@Rl!tArK_%Y>FPiv(_eBMrEptC@qW zAv={QMwbj9^91@{=M1riq?Mt34Ki(wu(k*?1?-R&u)`$oFA{ZtM@a-cN+94-N&t_N zj0eG-06g`sji_<$Z%-XMMe_03sQ8e*$GWOv?B3pWNurQaY-MB z{iCctXc$jCLnoz2LkD&sMl|$FSsKymH+(D@80;L3XqKsk=oM|QeaSKOL|TOE!d37k zNt1T<4Fq;8WD!kW&sR^uxNhXHZz${nR}0P!BWJb&>kts_?-p@LiU|&}^ax4(92{Z= z>=J@QG(AG{5`vGd#Mv!9rs0$LfW-)LNxew}B{{0)1?z{gP(F(2?l1{)VmaJCfcO!;0{nS?c%V^2&$o$o9H9%9a>H`hoYh}Y9;{Fi+z6iGsJ4}{3jdU zkc>RCe|O_bQWF@`1MG^@TgO2U)pqSRBn4&B|#QWs-kfh%8A!HWGkHoqDD~@;aG#0v@(6<6*T9{iFMJYX*;9hhLW8{t0XmXPE zlWVu|n)|tPZsMGQ67+TxGrpLS&@L*9Fv|)mH5pT%kDh<~^3tYr9N*JYZbTaRFRRWy zCS%c9`h{P1tVw8p@R1b?33`UsYfOHr-AW{`RLzYx_;R@`kF^!YSKRkte*GY5#_RR^ zZ*i}`0vrEFaIYsk;=iR)a?{DZ0w6u$KQjdX zfuoq(83N$fzd|~kEdMID{_lfcY+Qi&`_p~@B>^EItKI3Hh--!=o<9MnS z7bnn3+yEZd9`&7|40?nbXU>*FpexYU+OlfVNo=RaEnSBVCvF87R)w*o`TE%D zlDToOc9Rb)_39 z50qSDWb#MUmM}B4_jTzLKUzc-zHjippZfR$9QN?bAY1(6 z^I{7fxvY)0YNi{lFNs=xchNo@lln!*d*ZM-Iu9BS-uBDP*O-o!#}~T47JX5Fd0wAE zbc{3jtD+CIJaw&0zw>+h4Vmg23+!7z^ZouY8Xvc>tL*su=c!;v+e7Pk>lEu~;{^xq zy`@>5Bf+j%>)PW$=@=go0w2ev>Qe1l^I5p7`OaD&@9Nsuoh4rTmf>b!j^rnCZwY38 zSRG+LlzH&%T-99x0XWSx)kOFfUyrX@AQy$WDH@#bCbblmvH_Qf!GXD8}84@dBEz9UR@ZEo7;{8Ls(P&3O8 zLGxXj4;Z=CnA5l|w};#u-I&j zc9`z2kHd+#d{6!%V?+lB!)l-7+@@kDul)H{19iZnLe#TD1YX^JZsPeToCb6W=T&F5 z!s^x7_sccPDVM)wIyxGaI&;RLtr`xyCDqa=b|urtf3nTVB5e=vT`;?azo> zciRb6ga<)#2-h2L_ftijdPtF!S4?}RiF%=4ZlNLLOb^R3OfOE<$5*6V6uDDsOiZ~_ zR`JyBWpB42!_Y%}wb{bk5evvx!8MI$Z`wC!8;zN90pat+TTTTD@(z3;ZciD&b@ zAv421RSzHXLUA`an}d{3l#v4t&KIZ2zYU{{qfiRqM%L8R5qx&OVDr5au*{MVA9hJh zSPKQ)_JfPOzFCzX$UK~^q$>oaVXCq42LQA{GUNzh_}vbR@|@WK&7Bo1h`4>K0GP>< zXtEnfrtv`s=HBdim&SDQGM*n+*J~;+I8uj?>v(S(6%hyCoKS1R0n0IHm2wn-`3ps_ zSB^57C|4#^$_w9D_f^BJ3Y>ty#*&~3W=+7iHf8`{Hfxw2B$Uf=B9kW>^7n%02IF4` ziL8b$jh+`S*-FiczvT+GjqPX{W*% zzA-|?p?-9lq5XRICj1UC5XF~ta!{T26dU9^Igvff71KX9 zMDuEut5`6_)~_r|ujSK>%X6^WixDzzI5~$fW2iVHm|?`Oa1v^>$ zMk9zDq*p_?M$dtu3AAxbIFLuOkW9Ln%`pG~DKo%KBlbZRXaM1gtbR|wEW%9v^?fhG zOtr{OlR(dmlh|=lxk@$7iU7)@pmCBRIs{9vvcCc}RQXj7+-A+I{}d~ckgJ)q!)v&F zls>@FJkF8h_(?NP#>q0?^+I|)Qoe9-a`IF)f6&2C(!SsN69?^^TTm$?+xmHM ziue$~na-v%dEURvUb$5`+2Jlho`xVyx8yAO`#mgN6LrZR1$NkQx%ZHv4H;D+h{|An zK(GW6D$=qAZf6Y#d@6xP|IGf{r~*#3NJA5bjLy0_Xn=r4l-as@Mh-cO`z537Wkgj- zlJ&Qa!Fd?Q@Jl;OX!d^Ly&_9~t!H+;W3#qg6p(91*`Hw;Xw#aAvLTWgh#=i(aCL1L zyYc(4*^1MSuvv7Uk?qnmL!&z@PUAnF&`G~(&e0b6Ole?GLAgu>#3Fk!;n*7r^pZMq zs|}I4AH)UTmLW)o8gfJUHnU(;7xQMVdA04o_>l&wV^m$qNDcd9@x^^yO(J3&TL0<} zjCaV68dbuOB0rmmOy5ihT>`WWF#NSFg;fODtf!6exfCT6@DCVry0{o_ry>~SJ7+Zn zBKgbuwHr;jdG=eKxZk#b`Z^msKh`s zPcf_oG9j9!G*2{m zs zWM8qOqKtJG7FgT>t8#Po1c$vNV&V)T$~-p_80i>_%1T^*&wvT}^pWx}ONg>eDg=gvZb` zZ@aXWuXRrm6%C4Te<^GD1V3N7thkZwyemDRyaTVT2ovt*a;45bC+c-4ZC`#iZs$Hl zX8xkj<-+5&XHm^3hk1haQim?Z;1}%Ds7R6%d4WM1c;wpoU>r;sq!%dTjA{_1m#K)! zPUZ!gF=NQ*zUH)?%9f*Es+r!W}rew=O$!z3~N^_}e+*JiN+4)D?!X#&%g3|!1zW9zbb zNk7Lhm?Js1+J6xBUZid(9_XaYGx-j2mFp2Ur{8l9-WFb!NeluKQK3ovE5t7=Oupgm z)E!H04pQviDaporBXt6OAzk~151z^Qo0{wkbm~Vo!Hjqzlb!ZvUtbx2nq}@Avc`|? zH02X#?Q0FW@6Y<{V7~8B#C&#(t%LRSNNYrfE>Qcx{{KjnOMHK7%8dZ1`%RqzZWTV-RP2vUTfM-|NgG7FF`n24d>#5x#8%*tM;56z@a83WQyl;K<2ex~1>HcDplO>q zZ}ndPvlTj~;;y4v4xJ%Cmo({VRv^T=GP>3*^f3bygfh2da#nKSy4Wdnz87r@kx<%JZ=4Ty$D)Pm@M;gD`cH9+*AI0#8W3h;8877|a z?N4m-JzTP=#+Z09Oa^_0B1&Z$cB*9-Hx+uKz{$WZ^`0UyncS(3(#Bt=A7So_rp=Rf zK1(-G+qP^_?`c&&cEWXo+*1argc=Fu>Ww^T;!n`4ZrXs-SkZvgkPX;!zYM4>bOxL5;UaDVq*f3B!^9@FOf7-7dy!9zS8lzcgQ9x_NFvr9n&&7wqdUz-o zNh)W}B!}!w_jU=*68kGh91~x>3#xLFQFM%d4LhhHrB1Li>Af>Xx!>+!=B`o_0#zvm zT4!TyMJo7Sq335N-*_s*_CIYp1PZHBZsaxRxEqx~`8;aIVc%8JCQKuL9mnHfEyozl z>f$NJu|aOJ>K*KDCSX2s2!U4VkQ|@o2_&qb=Nt@nEH1oh|AEo;<9486?ZV#>CeFX1 zEdM76(=T89|38H3pRo{fKmf1!1?pU*oL_haP%>Tn=>9uJ(KoU;cKAaW6*t>IV<+Tb zzs|+_$xwi!@7FegI*5O@^Zl8jI2it^LBBWj{m;o4ln21KU&+_M8UzK<=_ly<1BLrb zgIxZgKjUWmXVg_3Y`;pW0E+upgE&C#%D-a4zck4H59#)RF#Vp!{ddB|^*4cC{}xwq z+e}bl-`wks`l+s({+;PDj&xwqTs15ursCUIeV1!-)ntN*jnG>V*acrK=K5w4X3bdi z*5mAIJ-|!&6#L^NFP39v42jy)PiM@dtNLB}| zDfovp@g}xvf7#V-tgE=+^!;e>*k$=(%!~BPw;Q&v2+D;`{mICc2CnE)wa9O>GI#H_JP)~IQqjC4(acR%`I-}*gf6um~Df11r!Tc+uB_n>`Tm> zA9GnlhwJr)S;)Lzp28cmPx!BH|5%pmKRtYU@yYYe53JK&!Me_6*8$E#{)%bKrC7F+=wI|mfK+)Qto-Q%!~DM*gF3Vf5% zVy<4EowmJ(eA8ZZx~kA-5^K7h9fv=P_Wbh4z8Q4T#Q2d?OK1|-^Dy4&ufu&sHaS^q zb&>e3wiVVULj2NII_PvCZ`v-8;Tz1r=CfX@NToHh!$UbA+MCZd!?(?@&0GGznzuyN zuFYFQznHhAV(sdTD2bAkQ>Pk`iuE_R@*282qz!jkSm2HF6YWI4g7DjwA|5vHTm(Jl z;1@^qR=m!_U2M+8nw-4T(s@0Cy%e2X5mh1if%#hVyrh>gTbhE;<#&Y6OOT5`Vecd@ z&5FX|cmkiyek2AI?J_yYxMuRC`Cth!qkX+Y=ubOfH=ra?G%zB#%B4$EG*YP9ey2vR zh!5S7u(#^Xl3nb+Gfud`Df35$qSwnWB0W_~k9@YKRQ>lFhP&npcc<=Lr08yG?$IsS zVNAyfzWkwP<7r6vjg(k~XG(q3?ws_~UFTW1R_@U>GLM-}LM|86w#StErKf7hu>$(M zq!Q9dZJSrAJ3)6AWP3nUN98i}7fZo_sF!`OzEzDPTI&>c#X9G~vo zp?^f8cE^#svEg%)k@u@uNmX~rg%3f?_UC+?_E>zhBs2T_hHoU^kMWc{JooWtwHNQN z(6R-hypjj5Yfi6s5x<1~=oZ<*|M%u9bvxL12KWz;i@ z+mvOl;Up(>@+K?JC1g?#orZb~RfK1=CBP(mz+An9(5PPZo^tEcJhL^rlgYfNlJD$@ zwL|Iapn&$}L{&}TvttGqcmROPm%`av*?O76Rt&}0`b3mmM?%AtlLmJ6BB0!sO za;i27EVHH8S3fV?giF%+vn!{Iee9|qve1Q6_Eb0oFuqYi7nTU~Jqh*w7CAD=6IYb5 zhL{J99+UMI%S)i~HYRGv7<=g4%7Mr<=GVrCDM~BrYuX!ZhMjSME$gf1>~Dt6tiz6} zA8p2_&M|gm7diPUjLw@kgD$3#OJ2bfEBzE)=}X|M3N+tYxF-v}WFknHph|giN8E^W z%x~Q7)tpqdQwK+23ft2_Pb&{}$;yBQORC$ZSt1;`;Ni2(2M>ngfjozUe6U))jl(Gd z`n2j{JZzBqUQwYm4NS8^cDYn8VQYZ0jK-iCRY!0m#LS%|7zh!kXxRn?rsoz?+j9 z-Q5yc084ng?M7q#0&K(2_-@qhd$0@2+<`23i1D?)2ndkcfdC1Jjy4GFI#d&lHy@fL zSc{YZ2?mvxZj5AqqkCklLmI_YorKX-j-j5-9uuaq40%gnni6_tY`Y*=E{j)g(6uO> zpzeI6xXCb@XcQsyp&(y4uj%M`g=I2zubcOd^pd~RVz{B5?-ysiUOf+0iBWuyS%+s? zmmk6rox>4zDandH*=yB_Idx7^IeT9|HSmg_E|&hvD7+InjaB7U)ZPf3ZS8|!h2#uO zkayyy6AX1k41|4t2n2Z&R;wDAC@#{LmeZ%vmV%4lszHL$3TQPo=!@HnRNsEE23_Wz zdwTj-8SR(Y6n=J?_A-9zad+wda0`?)LTNGZxiEL}A(OszH)Z$7P(rzt&m^G;Dd8PK zNo;c*ck@2bw>pkVs)f~>Q7LhU;t@YJ^nc79YMAUo*LG*ucrv7Zi_il8X=EB{H)GP; z4TLkc@|SN4EI?Su4poY8Q>L_Ih|4N>#giw7MY4TjzY8Pk#Ax9N@!Rl^WSe8Vn@23( z>ewb3Z$*GQfk|lq%@W}bv5MdfX}e)VFr@{V@i8Ol+B81*kM_57eWLQ14HNEIT2O3y z-f?{iw(6n-;|zUc(Sjz!OPImGrOIr8jaSpZXNFBS%dkqH;7KK0%>L2`UYa;)n8-M= zC2CyJ^rI>InV;1eL>u;6^JIm;$=q>%ay~>T_Wr0c$Y=8f_6Kek#^8z?v2pv8RK0`^ z6A>)thZ|JZY@hSgX~@JcX=L*k{nWJ?OiDPSTSjI5p@}_uW;DJZKo2qne-bb#3kWd= z#zme%Kl!`^Du{mW5{@xdRw%)sY1WG;u{YHc6NF-woe7TXB!H~&o+~W1rpfQT0almw z^8Qi$=XlXH7(*DjtevbGnI^bV!RyG|_%NIgkD^s{gzB;B4JpV6ubTr>{%kT3Kl7;E z>4yoULQ8A8e4TF6So{KKQz7-Tz299uV#cPCSnDe_b<*2d>)!_a;OS$Mb8!DcE=3#Z zi=*BF>DXRldK@p*hYgd=`q~kJp`U1kQcm?ahla3~qX!!%<^TLC1lUY>#G+-1ji{hZ zwo&R1K^|NAcim=GSs|`FiYq{DobyvzQzzILqJ~Rcu3T8fo3)gsqkW+hUGM)*`{7kq z#cqjQ>DAMVmt&2g-v$ogceeSz9wKF}n=kgazcF8&-zl%Kv0k#?PU2r%t=uhHKUJUQ zhT3L-8^~^yxmZ&alDU8(zpR>dnJ$Sdo^`QhZ!}x9nLQb>i6pCaE;tpOnO#OaotkRO zx6&~#&hWZzBs0N#HDXn>udaNAefgv7YaDmH98uE}+kX8m( zm3IbNbs{^8LLy)Pfa--Lh>xC2ID%%jn?g(1Pf+N3%>yxDmQG{W>N zqtG+;h{x!Xd_lw^)#hREvEn$p9>RG1g<3z7AT8Kq82B4Dr`ch+_OS=jkJK569~A)| z-5#`H!B+Oc3dtBVN*K_KdK_vTrRK*GejVbu9)o^WBtV6f&!iS+b{$=DGwjvY5Wg$^ zMAFj(v^?&tf&Dp!2Bd|9Ecd3|g(;=o7_yU`g^>?K$_;Tramoz|pVo61`kOEFxE=Z# za~9Z1(z4yJt(6Owz*=d;wR)(uYrN!=@4l8>EYDna;@PpLi&^ zTG7cu>^DIt)5%f%{C}?GK!KPQ7Zj8p$r~mv9}=STm{yFG4wXtgh_dP zPc|sTB=}|LD9L?w?S5$NbV#~_bcMj!$wPCX3RN;28B$AJxF-NkQc%)wQKhtFifeHW z;T{Hl2+n0SR_RAm%H^Saj+1qZq4k+-R=fn0a{rzzuUor<80HWzcUvA=>G*Bl>(^6r zfoT~0Ta9}{%T9<%t%Q*j_(x{4J_cyG8qv=_keU#%%S!G8lt@8KOGoe+6bQ-V_|F8k zv~sF>Ico&A=Nr;^WhR88$LjuU1MGh4VdP2-eYpAiEsg6kWU2$c^zPouLlNs zS74Ao00#MGV36;+HpoWDlb%KTRtCq0t2@7hS<;G{}dHu|r+GEt;ti7lO#vOy> zo)7I+RB122(7hMpS+C~M@WbQeGTYhi?BMLan!HP1onPTc!519J){JpOO`k697CmQA zPW2ZRUoC#m?pyczs%Bvt=}p zv1J;*H-8n;D=FSA?vc`1!TiYlmX;N!VdZ`|O9qxLW8CfuVr zbKdhvpHpiK+nRW3_6htFpc~U`bW>blFVlRq{&>$nTkO?wguZJp!Nw-RMk0MQpH7s& zjb?gs@rOIo!4jX38@|%B>Qpq*OME#`9Z$7~jyk2D-z6L(k$G!!QAU0~Ov3-;1<~$R z37jMnwJ|M|)LF~QVfkS00aH^N0)q&##|j00Qn-~~52cDBJv}By_m0U|ZG&$!Sh!yi zVqH#Mso&UbrDP!4J0k_}eEI4*NR7d9Jh)`(%3X4!VN1mxjrUH$w}m}=lr&>4NVA@i4*bBkpz~3UDAhPV+wuy`m?GU!z zaGbMwl7UdxmX^_Dg9m)?PS&jLG`}>|T#!_&@y}Xy^&3l)^q-}RuEVsIe%^IJC+?+xto=6zk^vBx5G0(BtxKC(V{f$fQhC zb=3~}5sT?h+_j?50WBokpAPS92pmpimg*4LkPIV|R2bkO*UUof zXS?>M+zU=mcs~3ABI%v7hw(0#J{9!?ZNL&?vpJgplIfdZ6YL~`dwI)*=J%5lzXom# zOW+2HI^07Qv%t>fR%MKO`<)_+7qw|8h~Kv z`RgO_>k~X0P^Z~lW4cxZA(#(Byc5cS0LX+8Jd9l0!#+b8_TIVlLr>WBcZVmDG#uQK z&nl23T^%YZ#IULYWodqOfIY$i-$a2VJkeO8(uA2neG#`>AP!8W%cd#@hNE9Q@Kd*NU!;H|m_A+Je^lCEZaxH& z7*}ZoTt;s`Ks{^gY2;qG94z+1caGpj&hCeC&(u}DlzBHUa<%&fTkN9mNZGlx)n;d? z&D%S^fPL2fKCF4oWh|c7Iy=$5+abNts3D}irBLJ~9|aH66iu^T2tc_7oU614f|KQ^ zS9|Q=FT0Cy&eQ6Ps)$9lnos1m66ucQ%?!UNem<9+QV=X!=UPiOU9gM0G||?MWfpXq zzsrO7scLFJbyDz%eKl=4>3!R=#a7R3dfBJzD6*Y6GP$+;;k?04BR!2>iDDRw>*_2>un=$=s=U`8h<%2AL zL8?AwS+B`psIsI3WkD7YFeT^DQltp<|Q~YM&zFgmB|nF>UU!oI*>_3Twao&A5@~8A)-#%mftkmlHIY zhsMoavnHXbh!uDpP+J5CK3P1Q1mg5u*C|CDOg(>71b%X&N0=kyoq<`~{-!zFmKJ4{ zclE;P6ke~fEu?-wmybGkH`Z zbi3Y-9?364u4 z*YqbWHRXaas*;(+BfN39xRs1~fRDzLb*B2kyNiCNiE(Kcty;Nx>Z)1{G5nBgtQ>F8 z__Gt<-f6SdM_PK&)wj`j9QujrmP$M0=$HDM3(&IE3G5T3&DY~Kdaktv2O z*57%YvbX%v0Q|prSR9WOgBfRVFPT2J@KSnhA_J+rfSJbTS0ti;anMKYnQ7W;zc0 z@pgaMM9v%WClggrEKA(b8DeeoibEpf>E(%jqR1&hL+g4WB8#P%aSi6;8h>3^t5~e} z<}o24h-)%KFEcuR6-QAS0y7b#Z+GkojHf3oFHgrcs5JuqI)y-Uc{FxrX>yp1_!Fld zlttyUUNUZa zKZ#F6-#nD=E;aa5Ad;yga4)NynIbL&FDo|fmf#ag+0g1$9Mu7c9XIz3_89mn=bo`I z>BTkhhl%oMBn&eF^P?$EGQDCTQ6lQ&gx(f9MG4C61ihGC&@F60w_pX`;x_0Og`@=# zP666z6XBX3uJjRr*spu|XT#BPi{M3z3X9J!{sj{xzTAY@xb4wS8VLtq=5-_M z5^|VL33(p)fk}d~6xA}flxXy2lIJNEan$dZBwqEX_nd+4N%?s6(l2pxlQU{sJ_;~@ zSw@lK3(_KuoM7^;N;p-w6SWiuu2evaZ9Q(aBW$7-soD{lB09wJbM9p z_koMu>Q+=!X`2JF%dV+Rk@tbI-4Q%f$bd6(;MygwJQF;n zylT46*^^#+Zo*G+Z^NZ>*jqGXh*(S;bLTR{l62 z;`};(vIx6;R=IEDZA{=s8Q8iCMc$R6UDvo5(@s1yBhG{|wH{?r&1Ttwsgdz&NpoK> zIP|vQ(6fU>j}8v~0GJV^BJ=4P|gMItn_B3aHEUesXKTjkSNP+%}(|Kzdo3s$11wxv%nJr&ZUJtVUpgw z>5?%p(k_mvhf&2T0%2y=VnzVdk*z3Vd_iiYI5G1#o{!FtvUe~)fC6FZz~gwntnLqnYq(?bVk{37S4P<#z@{ng zx5H$QAIIm|MfO!RcfSs$c1d(Yxqbt6v{?Fyq>(*(q^<29OoxnS&V=${=Af%+Ezrko3R74lH+TAbLo*yNcbhk6RO75l`3&9X;LTAv;jtf+uom}n10_5d!s+M zb&?m@^DpfHWg`Crm;3ee&^I#rqk@Y4pHWaje#`Oa25PgPP!95Ij6c_3Bwd!q&c>EM z)BFvb{-7`e`l;Vb%>F9?%q_{fs%y4<0C>yXQBx1Dcx91(GDDNRJQYBxGYb;q8;i7WIPdOKpKj!IloS|SH6R~X3aXOvFPD?dezX>j6dS2SBKTq+L>pCNkIRAJt5f+XR@O& zV3F*~BUR{X^qm_o!{u-D+x4CQ$RtI**JiHdnPn%N^HJY=9;*2VT(;zna{l-YSC41rd=4y zUh~R7MAgSlJ3*D^OG-E{((}>gvbF_6d?!B1$uRtI)megq4Vm^LIG&@Vggt3JKk?YI zqKGvWC6%7WwA``-BGSr@x%B*CJ%n}H_xa&_x+o93P6)A7%Z^`ZP?2&~bF7Or-?T_6 zu@-3F>fzrEDA`vfx$+Y#xV-tJ8lCJmTiRNPncn0_!k*SakGJmBGYER8sBIt72rQev z(TF3C$DnhQ>OIPw@AoEL6nH{%R$>NWk0MXN~q63h%^wLcMyy|6Og7{dDDGc+k^cJ?x6%W^dWQQGhk&&`{L zQS@(!W!5tXP1YXRqh*L?3JZz#vOT-JX#^#l;u&u5loCHcC!wZlYQAk-&QXe>ClZhL zkS#a!{`##3p5l#LC72Bed0%d^iLrWHeYy2qj5Tn;)=`9A*2aYWQUGxSNbJ`OfCr(BH}x&e>py&uk9%$rr5Dp9g%CtHOghg!@Fn~gV7A0`>A z|5$d6N^-9kGpvOn#~%H&uuy{Pvl7L?OB5(A;kW|o)~2vLr-lm(BH}akF5WwmS0ov8 zFEI`!j@Ckg=um7dWO$M>O$J3K2IxAH@ktsr7Ie3wikwjQW7W+APb1EKkf!fp$}%c? zELviCc~MOrnR6YP$Lpxh_2oHltv_m7^Jpq+LBq?3YqW?9A*V8g)-Rk`NW5m6&YYdg%@Uh`|qK^SSuH%ix20>YO`NENc~^@jdo9l5y^K~{?|;vJsmO2Ru4K4m%} ztgCzrWqP!YKA^U*f6%O+W$sS(Ea00;xj=EFVs!bFj0-B}=azfHqE_3zT@iixqLsKNm?aw%im_&ek#EfmZ)#)}*0@%KvKl3ztOlZob#Dc*ci{}! z3%Jw`em3L~$4-1jW^VDc0Iv@yU z4TSQ!$mCgo31eOxCut;FA-wdl8{14d7d%Yg*F%`(&u7&{j|EG{lj@A6X8T+1Yc#`4 z`zxRs0c#N@`&mDCBf>{`;IV&g899qs$0^v@ z92hZ$fDx1TJ{C9dSr(_>-kYWkKZ1cb@T|O_jeUr{SUu~^a&_~b8qNCs@uVrssiQSV zSPz@o0Dng5l9*%F1#;mtvX-v7%2jIXX%hosemZum~kfej+F_pk+;`GY-T=(XjWyu}zJLTwAdp=$$1!D_J%Hp629Z}=Js zl&KX;!Qh`jv&I{X3w(lwS`7nisQ9N}%?}e-c*oap2c|x7t<#4$x3OVktDO+9njIT+o=`Ftacy6c@{z2g~lJ!ZPM`Ot&?Zt3h$PkNC+l-R5BudYX zVuSAy8syaE%1XGdd!o{kcnWtF#9sR;vCA(h%i_7>;oZ_{bAJ_pe)rabCGBxLNq`cm zk+?!ee`TZwZ0D7dpixz(5D|>rc)Ws?elIXZ%9xAfmp)wIj3g-~iFfao4v;SeBRCzP zi{ahF)9Fxpttv0StSqbKil>ODBPRAbVA?T%Ji;BGx3`9p*-CkBVj&vU5)9YNW~?^@ z9+qb>-v>^|n>W^RN-AZg{SZb!lX~1J82=mdY(FXpWgl*~UuMni*caew%<>W=XK6_a zXV}f<%m|K4`~Y3*As%Xw>AW8@CVJOfS~4#_ov;cgiXqRmlb$@+fH=`kT2j=~bwY|f zms{cb4u!+Mt)eJsGuBdQ1P5~~R1{UJuU(+)Z3KtMNBd(`Cb$i%RGNGqO}Tbt9vrnx zw1;iP)E`k66o2?61#;-wTv^q4P~HtlA@5T5MPn@3#bSV!Q-AMerBVD#th(YhdVetH z-hnZ91jd{c7;_LX<|@FLLj_~*pjtDW{d&y#|7*-)_@4Mu|6J{M`566C#h|iu2Qamc z@qv2FQhJJcc=llvg-jxiN*Q$Gw|N`mE>aVYz2Q-LJqU{hO54jwuG2NA zs=4PfQF)qJTUcpusnDbLo*=lj%!Hft1ddnQ@#_zpWcc6iDpbCa!goc;y@ADUCn+W= zBN^CxW2l1(UBJ)rRe&j7ee+``UY#ZKEOdb<9lMQOmbk7g`07icz^)o%XS!Mn%jE1; zBQ7)sr6wlIon^K%tnoF(F}Fr;*vurTz&`!D&Z7y?St`8>h-ccv9s@fRk(vmU!UV48 zW%A9>Vrs>pI8=$lw32IJFB(?K#^giB`bkNKdiEQIdy`rM3!+~5H$(eAx|6o(D=uRK zZ#;^0o(|WVI=*tyR0CM@oq<37OjO}GF-U4c3SFwG+vFyBrdw8WunEE}xSThT(|+1P zl7+&JS3Z)56C-`sKtW2>67V91bb5d6r;%7_iNM(j`T}C_n!1RC71M`ccNOdzW|=W? zCN}u#Wr$hU2SPE9IKR;K&wB+%i3O?nO6>cZ-|*(xo|5wM&D_wV4;ok-81rFZsHAGo zjP(PV@@4KC*amII>O#yp+zMGen`RfMKm0T076h10 z-7`#!3q3qx65I?~wZ)nIX$xoA6U% z*nK)t80iW{MbjwaHY?>mF#gal>~}&hIVlICO1ToB8e(zmPFkD!JC_eXA)U-1DgP?l z^PZo|@;exjx4K+2uHQ!wd!Sj^ekUMZvi2d|N!hoQm4H$Ylmr((x%MV&PAzPM#!5O0EA@Hi}u zMy(ie2d|)K`~*DF8-A}~3iN2blx676rgDV3*K+YT5+&9bauT*&@WW=Cjh^>fa|fJ= z=bIQ)v2Tm|`&ZUYQ_HgI$gXgTUT(PGUDsV+|AFRM?EJUn>aSnS|BsNXKgFDL{!~sW zTz{80wl=acFh}EN|7WC2kl*U){aYyn`L&wfe}WR%;w3{Hdt=={Vk5{uqZER0TnC;1 z#74ih2!t&CJv{malU%pR!3O5|rxvmQGkP<~Z#55pYti3UKD@?RzqQC(*TK!&@DD*$ z?7v4h|8v9#`L*mIKx_X_UWfc`^}*j-^y&BNxu_QkpeN5 z-pxRxz9FfbD@e)HA_%tw4}Uz$n-(i$A=w_3u6q>{!(_2m;+EfMHo2j!>uGv9wd%dN zs5LW1^r^CDa&t9Xm+b0r>2Wpkcc+as1GjBzkEQdo z8W*YQ)kKz}6{0(*!}hi93){uCI$Fn?0cX)WUk2V^XC?FU zf8dl+D}%Bv^G4`!E&@Aa({crrCjzP%B;|7vp5^ugXI z-t((F>)+w4@Fvoir>EF==8f&TR;O-bU3BWkyvq-GhseZ5HrLFjL^&;ti6VP+&zXh& z;;Y>FvhkTM^{DC2rl7%y7*?U5n2YlhD|{Vv|L~kn#~Wsl)Ju@XX9WK+W1_|b!z`sUOr zDdf9w4AF}9A!o&=;b-R_y{+eK0w~o$F~l{fit_3%l7sl{DHB$j=>3tG-qEdMcaR9E zdgDtl`Y#+rKe9+(O%@w%-Nwij`-;mp?YTQ(=`%jUGV1Jo_O1XU9z8oeUKl}eRP1~^ z{+Zw=Axi&7!+uCeuf#ioUV9cCs|p63m02Pdi>S`Ob@#xE4%LWCE$D@(dyO zlI84a?muI3JX_(&=0)BiPc&RwGvGl6Dr1BgJs#xYv7G)>a-9_CdwNTJPodsKiHQBf z7i*O%5oaNevtcH?`Rk_WCoXg+ z_={u9Lf4}Z*O|tKH;qy19*jkZ87YAO8|#D&)f*>{SupCRHFHE@w{rx!`tA4dEFM86 zGoa`x5~=;%kJMEKnu2F&=5BUCmc#}i^qL?MrX1rDajaC0Ng|zS$+q zk8aQNAd2f{Ut4jap+XseSjz;>OdXk~^x*0p$g5D4$w25+0aXqOgF*2$khdEwW#`UG z6b$4Q2BtSf0MR0}9#Oz3)Ir{x&JH;;rT1r|bqJ7Ua$r*T=l$hmI(n88!&h0}1i#(O z6_QV)m-Tjo0HB}t(T&YDGIkywTD|x;m9*8UA&(UVJHMoc8SE!!@Rw94OO&28P;2|j zNfZ{mPt`8DBP?+GqSB*!;=}xA)PW&v1LwxF9QrdoISyNjIm26T7UhWByo5_Ea>|}6 z5gu-Z$uBFc&h6fC9N5>__MKo=>1{|Ku*VQk=kxT;w8#yfv>>*StJrbvzA7(cv0!R& z#z55y-kD?cl)JFbZ(a8cuyPj@V)#}&qp4(A#rds7tg7!M>A1ro)IisSp9IM*Q=7F}IJh6JYw_+tX z1h;Eny3eCk9`rxwDk4vi!-7AXgdqhoxn?@_^s>DkNTuI4eJsea7+&%m!>E7Ia*eji z7%g`9ti?=N)UU34Z;oWCKU2=7V7T-aw34@Y`vsOm5k01v00bey@eX!tZ)4=GoL3*- zM`K3Q_CT~34ej_Us#8~;j#G$IbPYXHS#r1nof5aWpD!;X^*#ywKBndLl`C~-Wy#2X z^2=c=_K-hXLobeMZM7ijW$4xrkXH(L0D0y7CUC}jf5XZiTw;{&J{LEoF|GROkW89`FOrs+DlVCQm66Kuuo^V;LRm}iDq0{g(e7#yYUN`tj! z7p3mJ_LWT_iYv9RtvuLxULFHP9jha=_d#~Lfh%otnc#Y_SqmM? zrF0&xv#`_^ORuxML_4(MJ4qU}a-30exAhyQg5X9EhoV^_yt(ie+QcRhfDmrdfdF*IIae^K^PsLG}Z*xcXtF^3t z%-TS@b?(e4&IaoFiPiSyWubqPg8)ManG6Bev8$PWGIX!H!M!%6A$zx&E<(a2lhHfG z@pXJu5q8-q9#D;h3`(k^sBZvakT!W15RO1L|8C!T~Wua-fJk$cF^;8gA)%va&*K7pynZ zx%6Tf+Y9Vp=M>T7jB!#MsMLrmO}+JgT1>RMX=%i{O7Lpxtp%8_RceUx;}Gi=i~K?7 zPL7SPxmWl|$YZ2nNTo1S()RtEW{3kHs(^KS?DQ`qyW zZJW=i54UYZRP1Y#zMNpXR{%a2{eqIY%R<;-67qv#{NOZVd~4lzo4gkWcP|1GX)x9b=2YT z5oIWb(CcxK7WVP3kZ;9${8y&7rF*8U552k82|U~jhuBY(HKEsds3m(PQU6O1Zy_at z|9fYgVU92quvAKdrBV_sm6F#>)7)%Ptt+g=To937sjxzEtCcP#qs@O ztp`mTHI9l8ygrxh46g~3hx5DN_5Hzd>QuS!7WaS_yOyyrmP^Negp>NwnnV${A}6)z z$E+tx4fO~mdAd5o?3zjxd2giKgA3?!AiFGIa@<{7f8)s~Em?4ED>Z((nMN_0@AhDKu0(KSf=Thh_vtc)A29sqk+mwD0RGJWB3VR<%!H3Cy_D~g zA!}yvv3p3Huh&5LSSH^gLsrf0R9A~C0kIw?f#`r^U})xda3&y?A|6^@28QN|1XXq? z*)$XEawf$T=sKuO;+9oAkRQ+Y>m02fE22~`>tubd+!P!{MA#RC!_!w#W7N#s1~EK_ z_;D8-B;rT%F88~^X4KXa-0;TsuH|RyS+!j{9Y?o-daFmqbcJ)hSccL@aolUHdyxY~ zZC>|hN}EHG@p8@s&i1&8?m1f0c0nmh6Qud#NN8KVxA=njl|ZNmrfsqKU{<3XrHP`D z9HlPOcWX}jYQ`z32P4K+R+QH&!`XHkN>gq=_Zph+{DMUNGW5xT?T6?2te0!Hhe#`q zN!wE5HX3dqvVUmr!pl-`X8&)&(_i7s{|)f;69@cGGW9p$3G&Za)F3|-pMI)xeuF9; zz@m07qxuhO7zbOxova=0Z7lx)RUrS2UI_w1&j01&1NOOJ^f@3G>c6$f-c{Gw%GS~C zkL~$qbW0FWO7B-u*}n_gL7>+a2mu`X51$ZdkAV|R7euE0(dY;g)Y%?hb3*|EG}iwG zcLD_ve`RyONthtlGPl1IcKu4iTy6?40bs|A_t@b^=@G{1bMX33~t{pwfz~ zhY&s5JP|_>2zw43?joKc&^lu`BYyra9KqlmS@2<(X|x{!(pi>~(6&RN-dCd?!0m}y z8t%n%=gPyyxas3c@u!mo7U4_xlf^o0IOk{KxP8T7PFn`bOfMlLKnM@1H>!I3Qm)D~~gCQ^uPCY?}Pq?&4$+cVr zb-bK^0P5>K;|Q-yaVafkw5axTE~M^?qL~y}_*BGOP0;t`q8jp+#6yQbE%P;1eYTE; z>>e>$@stuj>{huVd6%A{_MqC*`JE)V1>=;4;Ze%&`{o~Ov+46zubMO^6D~e@*BN4_ zToh}0-XUj@i_7mT%IX%qE-D2xTE^$y(cijn+}Soc<>zETPIB+y18=`q<*fi2#U!UM z-gewBZyw*LJEd)uNhXSfDW)n(;IIR72eo{{QX(is%%QK;*5KimvR z^W*42S+MBKy+EemHit5gEKtMZ!N?ab^Ew@`+Kc;py_f5C!Y_TyQR0S#kti`0j^duE zuJ*0#?l!uxAg?R@7+XDT+KoUcKbfF3etFfk`hvuc<^E}1%i;v@kCB%D$K6>+Mb-7~ zpAZlwmF|$vVJIn4LSg{vlI~7v5C!Rw?vO^hyGvp~y1To(eh0mu=Xc*vy=%Se`Rn~- zfOA-DX74$B_MCm~>-)KwmbXX+NWm95**T~?!lb2%$ef!;{5Mi(Zb=TttHoAO_Lo{h ziV%1ev>s*8QPUhmIiXqsT>D&Kt~xpv@1OLway>yq0b04P5LZZnN|S z)!SYcPkfK=!yql&^1q!#c-O}Avhb^D8;jo8GRg{y0ocfFQKh3HBfl{UPBO ztrZ<=@PVqAj%AkWQgJWuIlT~p-|xw_2gsev4XcS1~__@;o@Ud^;>)t@t`zOV~ezCWAwDGF-sBma4lit@xsT3mns--m_csO%GmV2UuG)xvQ(&f!1fJE zGDT~`fKTA?xMhcb{ryyy7a!*tYQu=`W@a@0uo_B3&}(TH{ntNx<0Yx5OX%YwJBE6v zvLPqBn_u{7wte0+Zs(~vywt7SK0)4rLvxAMfDuqZI3!K(qdj=^IK|^+p_Do_&QpM$B(ui$5vW%c`+SDmdk_vM-6A#|T42hX$KoV!Q_qK~~A z=Bi%TncpYEv3p@qXEi;H+r~mFGZquV5#T;p<`%MYY->AzJEv|F`a*OYb#rSWC5iNV zf9gSCHR{#MUd|8QSVsiR)whf=QV8?k*)T(itbUC0m%iyCH6Gv9sYAW0Rs7Zm=s~{F z3$KbeSXqS7nfHOV5Q8#Ydfus@Vo-E26Bayv6*y(J!{ST$D&=}oCu(q3Q7|Vr?stB8R*2~S=y=D6N`!5KC*C&8f#ChIB zOq^2C&a9PEyq%0g+&T37194wGzmd!DDuR?W)h*>)oknQ)z-(4}JfE8=smA3MM664& zuC**!vhMvuEMo9>s7rI2J^7bvB+FTh6fW4^CQUmO)DQBvuZ^iU0Ci~DXBs>+)ykCJ z({Pykh03W|4W3JCwpIwy5B)&Qd+S_KVDDi3Cx73D735i8`lCGh?mJ8a$cUq8r2*Gw zfJ;r-`X|%1Jll_RUEO=vXw;16D|YyAJ(@^TmEOk1 z%jUtbnPTgz6};)IjPx_r;p1>ph>=-+Jel=Oc2gW=eDg1{dkmOm?o??d8j~3JX8?121A0gYZPc#UOtHLU4!Xsc!KD@Y+YU2{TG;JMmK&0;VsWCrPw?t!5+e>-9O`A zGQA)O|7H_5qz}X$#>++`7f3}u-vuyaQw6lLM}f2kM=9EIt0u3}---c=c0ED)hWLCR z#~2^-4*6Cq8K2i0;G;Ae#{C=ss$H4FDYFI^FnD$FA;?fRYxoWhdthPmwG2fSgRyMw z8S>k_Xa3@OxODYrbm2g`Yrtndn%=IY5)_g2>6~2`cevj6lPmhm=7_1}MX$sn;(#j$>^ZZ|*jUv%SjOS5(8m+`TFFn|1)bhcwaz35(FCfr;{twkBNgVT4BZdVxa z|GN7UbF@||P-4^}dHX*>L&}JsA5|KJ9G@9ZEe8Kg z4y%Hcv(KqQi4RE3_oE!mR|Eox0j1=f4_p_WRDC$Bh7kB=Y{*q z6PP~dy2%p$$eI=Is|12YWuJnWOvw!^?1VqmAx}Ip9ot<4{g{H9e5y(S#)|o*pPJn% zoBOeN-AjIo?Ztz{{6yV~WBfo%y-J4DL(4L%bJ3~GWO1|gT-p%2ert$Lv>wcGGX36) zADV0%sDm&B_J`@ZpQ$SFDrUc4kcPQFS!0yS&I}}|8{7^5Ouv~U#HlSpEMhhH3uiCYh9}j#F?*ZS#Uq~!5zd+`m zW0l=7R)6{x<7Ws=Qsvq&vk-bg6FLMTCIGQXdrds+vWx~_5VZ@&kQ*q}3xOT6h8!~h z$fiEL6(S*=M_s_WywSNAR1V;7?smj|_$VY>)kET#qZM%&yNE#356C8y)zc5h{M}|7 zYy8nxl3e>t4clw`wU<(}ZtGoO`{TW_#gUk;HGnd{*}i z$z4+=eh9Fd!YtwzfC_BJEE#$8K|0`49K(X(3LZ1`d^+7agWX~Kr`x5`=PK|(?K43Y zc9`3<8a7G>!sfljbW!&YrrKM1^6+4-BshBy$4CpyzKjpvW>{;GC{`{W(GUoF1rkh5l3({70SdYiYp9`0#gMR9kWm&w|HIsEDQcpY z7lZ7U#?A!f;2m5s#P6Lk>Hp$3$pxjM_RdZl7;AI_Bjtms!WcV<9w}DC$ zZ6J)%dI!xaUmlZP17AZPfVt@vl+57`n^R7KxDQ&b2{H65N^oE#a6bt^^U@%|{bV9A zjt_uw><^6NC}12j0^@k%@8h_4A-4qZ$fEQvOqLtO#g-@Yvwkq-WVJKo1W*MJ+a$kH z1h!_%pGzf^b0s(vK+ z7sl`IL+F z-n%cR66yPNTVk3eI%erEd0H*MFr>=YFOEe4O`*ycK4Di!`buNLEb*LT7;RteEU3OI z&TQHJ=M4OQ?3tyrm5Ajc)5Hmh6?#>Qv-(@uZWI=Mc6vC+n$6{c$(_(mI~#8h;8F4HO|$_pOT%pdED6OTN|^kO zaZHpx`dL5IOhS+lcy(n|0-l3i{z-aVnpQ!1r-%|TPv1YBHM2-d1IEM|FeajaH3mn- z{i6X!AQ_SSkCi6JK%~AiFxeY}- zu$692sR&m1SVG{dY`Mpg*YZoE&6qtboJom%Il01N+X& z_V4v9M_Utn11)PS6H9x8zt-ik{dejm0Xglr#s}o*{Vmn+AxZC-(Dm=zWoWBo0VK0o zeX#s%svp~b$KnP0Th<^Lc)tK)^7s4oN7x`I$G>lvt$~jIzka*^*)93MDW?Se5jV)m z2EfIDckXw?{%zji-$g(R0}CxfTZ6yol7JBSXYKYs3W2QPm;WFHPKV5NV!8vhjO#F2 zbqVeWpJC=IR@Yy^9l=WPka@zjUw$N0bT4>X11=k4rqE$}8qfbCuWs9R;sbXtbT{+P z5p=L#7km@jFdM)GR5Mpqp~`2jGm!-HQiFI;o# zs;56su1xT+EM;7otu@-ocM$GxR@Wu353a4y=kM#aJg)cQH8mF!H{2bN-(H;R1jd}b zN__QdToO*R^h=Rv~hyCF$6EM=yBaCFT^8 z_mkgQ?0h+qNZ|W$frNDWNOuWx6x!Vwt%IeN^gzp0s>Qg$iIut*_c8>KRYRGBwyTLU zFD|9Zmhlg#tP(?(7F<~bS(moXmr%UL8@Rx9yFhh`Ys;q^@Q>JiBOM#39^V_T!=Fk%a@_C6-fF6z zT$o|zBj$PzIpReY=k|L~6!t~(!e%;K5;_6(eW^_lYqmTX7bgI&g)7S>8#lGSJvH6J z_9DTU1AnNU889s4mtdzr%yPpF1B3IkGT~5pNz7})a=#>tgoSn-Lr+e!ohJn_KSi;#!SJ}b#Mf{IFU0@L&=zn{kVeuT^8^KiSkgCF@^=XQgAkt3JZaN(g;?FQiZ z-|C%d2O;4gm)s|ycpk9aEW3Aogp0n!Jba}gaJRjf9SW_S&9pIV`NAoTdqIYSD)9N+ z(TtWMQ9xcaae`}c!lXqR$!+o8RMeQ&p!)NcsH`srUwjg6~z0r97syrnjbn!mr$IHsDmU6pIXJE&_>lW!E zas1_48&B8rd^V1H5KV>7q7lQu`R&Ze8ZAIBBDtzxw0CglUz<8@i%#UtdL%8PxvkeU zc2@2*1mO8wIFzp)R#^$#o=zJ~k~HRcTpntBG(y7)^2*Ix=iEuq3tiuv1+Gcxu7rmb z65QwCV0=LQLON++okEv|i*IYs0*|xGfa95!2o;Z=P!BO$*(!~A^F+pd^wPNw-_J&g zwj@t%%^6%-!U<~rzR=S__oV9uo6C;DIIe>Hu}Q`kZL(E|r84dsrZfFZO!)hH1a!wR z%qo*q#i3(d!|Gy0Z}eG{)2ZUNBr`D)0%a8Y7-{(H#_v`NpFWyf=3iJlFEHw%8d36b z=J6GoA!)V^Stz)M21a#GcxiNgNdF$jf#~X>r1jL>g0~WW32}J=5p1P389aKWB!%NZ z{f+v(p60@V%&NEw%scK1L_Tf5AS~*^qV~J+Z{lWTIx| z{Jg*L@#T&uKkrxl%_DUb^Fpo($0{ZKYv3U zax(3~zE;-y2n3i~xH%-UwSpae%%~(r-O>mVh-0Z=k94JOdIVEvkF*0(w)=3g5N|#Q z#coIEjPU^Hm|$I9h1wJnTGLOD5}we?lHRWJ`<<4@NT5K5irA|BSePtn6>VE~HNw8qTrsSKZJl!Q zsuCSW)lA{g4_v_`W$%KaeuPhDVyQ7T@pEK2QVN=&8 z6Rvqc*1KZ)Y4wIEQ1NXFc3zr*tCE#nQa)SVTNQ-#X}mJXKAVKG&SRv(0Lu7q)%x*1 zxL94BX7-W`jpt9b15{v!uW^M}?+`#DjGn|8Pg4U_wC^ZW>nNgKzCM$zYW6b-=@>R2 zZyz!mc<%UWq6sDRfMa{uAS!MWu6x^i^{gC@mk$`b&{?ClWZYP%4x zR*4pP2rWM@8OXVpV{+eNniFR6RYdCLg+8%h9+WQAX&DT*Ytzr0e8+4=zE+($N;YZE z8OfD^x(qdJ(=VHRH)rmU->rJl)_)EC;072E`nP;G{PL{S?9^{Z)!Me&H%yfWIA=@M z>Q);@?d4t-S=xxaAQEN{`B7TeJS=*-&|a5qD;xF)R{Y6P&_@ic@{WRLiqhVO}H z41^?tJ?Y|McYdApn#hR5!iJtKGv?M2N8i~AE77`J=BHi}sBA(HyS*(gFV6?`wW&uTu(Pj5)h2crxR;6b6C1YC{;_RG?TCI+B5x z@&Z~OM9x0U#2O!`cj#spZ+NxijL4fA&k}kNj)xv@e7GaQp*2X$^FWSXh^w*t=subl z;*cNThEGKo((*PnT<^dp+xoe{_6&B{!mxBV=+uNJ6hrW+`@N757LgZ^_X=J!8aGgp z2lA5&F&SuA%{p6VOb2>$4fKQx=t(@#lUblAPk^3$0eZp>^d#)>Jt2}$Tl-bvo<*1S z=vxX`(DphiZ|dKJ7~vm+7*QWFnF*V5^}by=CGhK>9cGlfCA);Akl1;RUylGT zXmXt*>-xR0L5h0G;JRpfdAUturD7YJMe~?nxgw!mI@7EQyv5y^sY$}b?3=poMgFOE z=2ydr6-Y0L+L=PC0|dAT3Np#5uiv+qN8<#`2Q%xI4vIjyYW;ddfhXUf$RgAbHb{Ru zfs!{gH1&FD1MO+~paw8RhSjEG`3Dv#nJk>VW4z^q_l`hCYz3L8IR&N-bDN?Ob7Ey$ zlu&n7)0E6)oTQ;)3QbbPTrd7q7R&Zvl=auhEmHA zBf?IVj7pK^*GWug`tbZ}vO+ta#)(QJ#m@LTiUDf8V*Z^bA{N0N$5ITYdS`rIp;#4* zn3~UC^AjdAuPJ6>R{-f01zZPxJ2-Q1%CypxOwK@f9iWzt1{Ccf$rd762y49VK}q#v z3_&C;uYnP&jz@WPh{f;$Ek@_zx>v_H0_fSaS)@kDv%AG3DU_uY$V&1MEqI2y8a1U< zC{un&-8o(dIV*5WoOcWHx!QlQMPF$;20BT1cGUml~M)?G3{n|EnI zW&TzlmeC|C7v8uMr+_t(k>*Sd&?a+<4gofWk#60RjE(EIsE^e7J6Wm(JU5msE}&akpF`m*q>ZP0;ZEjjAD=Xv%M^KyjOYtR zwsq0(CWW6yh*g<#e=g$4{TO!j*7Hk2ei`(~b?67dbf0%~L98JiSX~RuS^`}8u@_0L z0lD*Z`5PoGt**Nq-ZKMNUye|*iM)WB#Ytq0yPDfjjf_aBbLo;(lR*5q6q;;QJlG`9 z&EG27`eWUvy{o=wg>cnqM5#h^6>mpFQ)7h2Yldd)9{=tJJq3I3(Z3Yi{@JVae?)A1 z&^rFJ*arTyFY15q)A|Ff4oEcrUu)xfux z;Qvl-Cy@8}yA6QU1{mvpOGiMk;4h2a|D|_i)wzuK0l-gvkGJ*#O6%zK*?)mX(8nt?h@u zROABc+MgxA|D>*gxjFs`m2XK@gXuo5+-K*xYcVHI_87x?*Ik-|jC28N3Ha-{<<}S3Z>3;FZYNvR&=7Zqy_AJ|pmt@HTua{8lgUN0n=4|PF ze$V4(QUlP|h#go!nh&TjqQ&t#rvHx$n{4gSFI#{72P&*!c`izb58KXLeYv6eyp|fT zt^ok$f2_VfjPT{KT&VKZ(vcl4T3hm(bTBecz>9Ucus!c`uUeG>#HCsMCJ}Vj3;QO% z8{1Df_uneLp_9ey5CYrn&zdt90U4{qsxkIsRP9qohu@$x)qy4EbAI}I3n`q72R6R< zE%Tn>Pbsge&ev!z##`n?R|w#D8yoY-hqg^!O?K~|*Y|J7-wxMyE)O6%#aWlm_lza6Gp10#aSsb&O+68}dT#;-_*FX;s2Gv>%1ap$&*-wcd-Zv1?1r@x0lZT&?LTm&of0qDXaTcKQnk>_xy*_B2W*Ig%+2_H^X=&` z)PDebA>IZ6`A<}zT>0N^Fyeht&ImVnj8NG^@qPCEw-ADBzig^w1{A}ea z8a+0$?sTlcrwnbc687q97$*_x1oM^j4=D(3oidS$oPEZ;63@CsmFe6_4=iu}E<6QV z+mgc08al0Cc+O4Cm&nNn^)2tJk?B{L4yNN-CKc!xES9tMeV%ZuEjiEqEh}!9?piT- zeELn8=j0k2Y-tIPsKp`?l!_5lv@#Cv=)aoC* z8wf@{tG!7~>ikXXXcol@n8zJgY{lA`y#kpSh=?~g_^vdh7Ul2=yq+DiFXkE5F1`x? zAiUrM!5?LPsO0QiK_oCWdiy#V4ia!P~@)m)L@*-vHTtC8?=sHeSBvEa6KKW7@g+Z4xA(t}S(T=U; zjJb6;&Q?QpoOZ!;j}XEguNC6p-}mTW1nT+EH|2Ppy*7g|hnw>)D2HmO#I~PmeSU2e z(4iaMF_ut`@J?A-bjIjsN9!N}Z)+8P1GhoK%x6y>T-};iiz_x`rZ-I#r?xRodsH&v zvt6c3ST>Msu~;Kr38ecuNwW_e0yzL{&SPn^_5eoSqw$(%q_hibeOghwhE)CQa~=kv zLE<3sEJiiv6K|f76XlQtbvr**DBhWud5lnSO&(1Mk0s8Nc}fYLF> z)a~O9Kv=*Y8;6g7-{%|EZ{`c`;;GaCK>}z_o%`;V_Q-?xL3RZyi_W(?m6C&%x zbhr@=5Ip~qqqUYH86d|P)gp9)?HC(p9iU+MGdK9q4@XIJe63*Jef-yUT||K7BswVj ztGF%>!K={m+Swp6#^o0KDsH9QT<@#1{6hLBTk!x7Vh0Fh{J>K~(MBSAo=z5vH<-jH z=t-Pt0D~&RilQBh7o-c*D=mwX+VM2twYeMw5}@nCJN|4 zE2K{uFYAeZ<1%SVAAR!>wY`BUDw|*C(CB7p4qMTWv$+*3$;$KM>^XyL$H_ZLrPlQ_ z&ZI!>MMdc?+hJ)bf5|o9WHMg0M&-k5eNv$M<^%8#>pXKApGK)l8X*ChN-e}j zgwi+CR9X1HpG>!ke$+LdNa^qH%-g|FO=+g!naZ=sL9hFUO;{`@2c)W*2A3+K&~EP! zgfvWJMo`h~PWC>-mQ_ttGLOvR4xp8N%Uj^*L#)PIfN2uNu_l^VQi7;fRWLgA#OmUU z(&rNFusmT6fvijebWv_URU!~Jwkf3U`#a1CYAuc0DY{RhGx?Lh>o}_} zc742XYnY@gDtml;IQE8+ZrAKZZuvDW9%89D8{{xvCqNkm{+(@r4ouV=SH{;*b{`Y} z;_<;mRGnZ9v*D%5nG{W|#6H9BI&r83)Tzqbbw7Y#HUsd>H~@ZG9>6b~0r+LE0Ke=6 zobHSBhXAXZ#r;d2qTBN{2vFoY!H57J!@who4Nq4N5m>zgTmOvml>D0F(I(TL#gM9I z6~mB@ssu&0iCF&m=CcK#xr4_8kMk@yq;QXk?BWdo;j$2LXRKk~GufYUOvUvlL&8xa z4hnMtCZTr>#*k60{-cHr2gk@SNFXSSpM(bh&(XmcHo_BLeIS@=$<+l)S8W<+PdiV1 zBm5XFCa>QYoHe8ZFI8Ki7N6Y4!XBJ=Ok2lDDzCQjhgAMq<5?tUxCTbV&gWR&82!&Y zZDiB~tbUtd0FMUn_W1y^*(8E&H?t=+7O|VTAgs8zSa8xHxPwdmolz{vwb8w;1>exg z+eipF+|*6hk}Z)8o$MLj-U;8iyCS$ISm9tli#)TE)EhX?YOd?ND=aY!cHa$EXFub! z(&ty#)1uZ?(i;e!`QaMgDUC8ySn{xX??i*W;0Xp2Miupd)q7S+1bIp}kT5!*+d0=r zT;0_(PPMa7am__h%9Yk}oOJHvHkfoB8ef}bxLmbLHf^@l?0mwsy3?>eI88TFy)FE~ z_iO$heP>?X6S~`+v^THdAX{&-Im;49IQopvfNNj=SIr_?*VH8k+& zG8%9!9;KQ)0r-y$l6*^g$p+FM@^-=igJ_fhy->m`T|Oc#R(dxoK>w2y)__wcg(BoA zNaiizySJmaX&guh(}9DyQ`V;i7`sKk`Op#hPD56NUEq1zp`2L!uDQA^)r&Ap)$bRK zU$$xxquuN(7^Uj8RCpZkL0NIhhFFW4(d@q$?M|6giV$OQ>|x>MsAvU1(z+9r{GLNW zP*k1~K#UQrtoBS7oG&N26&z_?KNS8$#jS~s$)rDde*vD!#Kn8vdni0Q&^a17*KTg` zD`GTaUNDzBJ&AVIL8fjAub!9|FiCZToWSqwAX5P9-U=ZQ2G-s>x@G!DxbA^ZSq7l5 z(jvaIVaeBt&<$6_8lIl?*>ji}1C*#2n|6BLBje3OmW9z&#&%D8m&><-;1vLC_P38B zKB5(pk;-nI_LE|&+n``1*?^Rcs4GIvz}tMa?Nf|9)i zxjZJN!F|)yIyLt+rHES_FExt-4y|0J=g(QbE6LXl$mQjJN*FcWij7guD>&WD8!^>g z5Uq$ubB|Dy@^y<=lR|OJHm&HGpYw()T@t9=X%u*fR9x9ZjdV{Qs3x09`x}Wpi^fLCa2y0sDV+Xo!3OsU+N0jt|fR2P26wCY>Gm1yOL$qc^ zE?VTkIGbaM)g0k$PAaJe z2Lypu+(kVLz{K(8_BB2qU#nd!!#9h|*mc!+0Un`1@#FS~V#(EDtXqz7xf7~ktV?z} z@5m{i*mo!xa`R6Ma$XSNDLq4d6K{-xjjo*&TW{wVOHCk5HK<^Y5j?-zmSM;{JKBae zdv7KjPp4S>X_JBqBB?E#woU(F^#G#Ym>H^u;J4ayQD;Nc}P3bDN6Mz|AwA9$N6{RQhqwXof5+Iz^*8+vxQu|3_Dj

43?(*<;DGv)i;E^=B}2+)*GkO1RF>(65<{V$l0v8 zH^<{CEV~{1P5d_(Wpy`a^GG|Iy7j{QWm4R2Md<4FZ zFQ#^_hzDAT7yI`XG0@3LmpXnNp4Td?$h(%D9bDWkb~$!x1U1y(V^^vbpibL=NGi@d zCndeB-e25ByZ353SO(wR)ZAKneEvv$<1RU;mpVHhbJ}p?UeQqQaF3?Bewutc>k`_P z!gavbBD120cQO0p{Q7QgWQ=zF7vXww_qXtbCs{b#jLs}_c3N`Y;T}_IX_BHtIAcdV zUw$|`SC3bhU*gO3UBiP%CB@22|C+u)#(H+`Fm--;N`2a83cMVX;rR#UI6u1;7x4M8xypBa+mv3$h!&nAWot#W+U5-@ShwTqzA=7{DKqD9Cn z>M(fco0x8sS@UZ!Oc4UJAfc`;3;{stJG?4yOEi-JOi73v)JgE%Ri#$?fGNo^|AO_w zl;qGaI>Grsy@oHc+|(O6B*A3}u0g5`@}SInFeP0%>Ute)dZ)M?l)ODR37)Tw(!+B- zWr~5!NaTFu4{yC5`&xx!cEF(82in{1zEGLY^<01L-YIef(G7itINMCtpXQPd@l-@MmVwqfBRVIgMCf+oDqr6y$ z#Xk5>YM18gK(>n?-U%3u&9#f-rS(LG@6{l84vVA5uDv1T{??`zfpN{DT;lWcVHc8m zr3=9T@l><^?^J;=r80Ehu&}c3&HdeP33ml`@S2w_!}sB@pcE^pZf@@d1+K+QRq6C!eiP#7;Mh>Wt7r2-#q0j22Q!ZsiC`%$C>`l_pAqd$;ooApxo zh7v@aMA>@}XEp&W^_ZJ%IY7DbaJryT$m}v-zph*2rXVLh8IUEKiq-GYoqi+JmhM(9 z$DDz(95j3yZ$bhu|H@zBNi?jycr-GGrZ})O*YZRj)h$Z5nNg!V7KXaL7 z|KKuPFFeEt;3Eq7V6}~eQn#>rn)rx|gCP=tDmBsaivdk%0=TO@bzl@xB8Cp=>%&px z3F+ESF!9>@YE-I$D2QSp3Idkzyqlsy-P=fb2n7u3vtu;#F%fu(+4Si?d(x%=>UX@^ zjZif}0tc5`OZ}lk(Q;ex7nfBaahruu$~oxSPowL41kUY*(I(tUSs*8r=?th!5<3N# zs2@~e@uJmclrg6%2-H#haBkAVoGE%NUG!MVZN^sQ-OOE$@*^|9m<9^6Wr6(wPZaBG zY*$gr&0%b5EQ+$O$#qD7S9hyU<{C`eDgiLfOcfA zygUaF2Pq@GAojaHgBoL=KH(UH>IId*ghORSt4WBE1S1SYM~0H?fn^#h|!Rd9;o{D;RrvhHYr38OTQMxMny5EN-LFOKaVo+P@qzmwGL-Z zZgcjIODfc7pr==D&r(jx(RW?`uD|{`Bb*8Ve4FJh=}amOz)x&SIH-9Wc}GMsmVji~ zSR^O+%A@j>8C0E=J&2`}`(AK3lfLYY<(G_x6)Qo}ZIyd$0svx4gC=_opPWC_EffQ) zR395+KmV-S!44&(HvuFaLr+U8XpjTJs2&l)y_qPms<8l8H6*~QW_E~?*x}nG-_BcS zL)CaTVMlT9gZD(q*nE0tFR;r3#M53wo(E6rX%Wo6iA;0rh@{n$C67~th#3Mad@o=j z)$F5nPV1k=@hlCW@?Dy$-Jxfo99u%(Iyq4V?JK6%2#T|e)XfMqKSQTqMCXQncEd6F zqST&r53Z%{_Yu)0$`0ImqOHU8tO zgzL=|0-`|&$P>`(I=#62$f(i5ewzUJ?1)wG`~H_CSl$J^pvT>ypWo_6aXLU1VYa~M z+y?lZcc^P&2lh6);I!DKFpkuTs7ToN9j+lhlW$Ub)AkYYRNFsSWgK(Zl(&x@+*&VY-7RX}?zNqm zG)Pd%O;tT3b$w#FLnt%MRE0Bj*OHX_Fopy0)5wo>aX`7T9*HnbLDJCWaUk&4K?wz-JlLjVgJ`OS7@BT-!%Q!nWw`XZ$odRw2j}L%&U399h*q7p_NOH>!ZiF|mM25FC@?I6x>b z*XC3jpu7-cCB#{L`3<4WL^s($jb&RvebS{N`gE>7oUO@Fx5w>gJidp3ShBz9F+?FA z|IJoHJ|4?w{j^ev2a(x(40r@p5Y$q3+A z2~xDvp%{qJK_{1}Ks(k%PZU*l)1d7kB8Ckz;)1UmptI!B%=*n3fYgg0`I*$9$kN4- zQ?IhMqv25-*Yx?4$1E~*v%daep!cYgby19&Fi-b2e);>#vu-$G8Z;29A{t1z_0&mI z>a876N*4H}v&2!cLxp|GF&#&-Pj2?2ZecWAAGaC!-HD!P1a~U{C7%)Fs(zIKnhZgi}xZPsE4HieE8?iz>ft7kz~BJ zr?f|)i~;$TahNLlBmJ#uEN8aWW2{S#=JW4ArrmjH2U;N!fK1a69MU>F@^R?L?v_vnFE@gTN;ET~HK)_2aS0CDZG;770X{$QvNKBos4h zK0pLwdgHfwgeObaq-Y-5m8+sk66&B96l`NWS!tMoFsDMu^r(x(xVzdxGO$+%SIt{# zd2q>TGFGW#7Jsq%VeDXa(cvl*QBnu$wV#ZS%JoZp6oPD7`E4%Y$tpY91jVAZ_IN%V zs1m_*CdQXBhNx50g>*eG=hn092@uyE!RHmb7H1x`1PDC?WLZG%YB$(V91{(+3>?xsBNlHeUCtEDi8&bt2|61> zJC>#R9nA`XNTHVtaX`4sGttAoQqTZfo>LYO3$^_rxx1{@3H94Yr~~zh(5Gx}#CxCWje000k%&qgKqyPQ;C9T7fqaBum^^b!% zRkZ(7srqN};s1zI^`H{`XQhh$zhhhCC z(IfD}X<~6R@d!Yc3EVs&%d~whiqhfZ1w43A+@G6HXw2DmlFtB@il<$@7Z0TTk2j$A z9+&g*4ps+{kdmvSPMeEo6lUUnlO{k?E|V51`e=h z3J)5JkUL38Luv#(JT8{ecbASBCKDcd6rMyz7b%5lzr zgDRu$XQ6JRj%dxZIi1a`v@ros;oFJ8H%H=7dyH3#>exxTV8_8+f%qe{SMYJV9oL)J z!J%!z#3{^Oo(Q(j+#K*;RmzkwRUX<^y>_RWYkR|4+wgX3eiM&(P^C-@9Xxf7BgBLI z9p`bzC;dm}?c5S?d}Xl!G>+hQIw>Few%BYzpK537D$h{4r&oAiOikM~!{zR><}!m9m) z1ECBr77B~g-x4K4Jlqc~wvoO`{6xGaD4B3Gf4==LI5UI&+cV}@I_uBM20YTV5sT~V zo^@-_@VyyqQI1S_XPjPk{xXJD_A!$-M(EG62n3h$f)y;=M3r5kHdUC$L7`;hz>AE5 z?z(c;STrc5P72&`NG8vmW~B;2@^(955_@OMnaaCBC%dyOtjKk@B3JD~~j=@a4%66{_{p&Ud_3g4&kGW z@HsjU01X(2)(4=txQz%0K{Np3H~8^cJB}lI#&WO}1*&PeP$OM4?E6+7xnX{`a4COEKeaFvY?*%j)7Fc^* z04l?ZvV}x12$Phk2g9-cz&ZwAm(`QN=e0Qq^1(+ZN5kB>l(O=UK=uVPRO-d^g4Y?d zY6W6|2|cW9g};Thci=ODsNj(J%u!IDA>PF^Hk9F}SRj?s5I+lM7pH^OGb$}wt!MHj z@FuZlssO5xw+;*kiWmI&C7>8tt)KuPo3{Ltc87FTe+%(4TtcS;`5pTszdpY=_$_uw zS!Q%Tp9jru5u=O3eBmCbZfK5klpg7wuA9dBL8mVd-7<`FRmSZS>}1&Yt9$SA zikW?x_#J1SabwR`1;Qnd@t?k4P1#Jy6*@E8?w(331>9W2xU($tDSa#Q-gb886i{fP!ttE>_LOB?!cv%b;?BXbJ}+{4+Pv#A$OOY>ea-~q*tb0o z*Z%b;&=NNG6R#EQ#ZSjsxC8R04IEGWi-tM4@)5Ix{&CF4j#rkjb2~VK#*6iB9P7w5 z{F133*C?u&+?j@yk(%g}v+afW&`k&xV2}?xdz@vsu7El@-@#T>$sFUDHHP) zM38^31?JOYN@|h>VwR-=AoGkMZ2D;G&=tSQ_-C>j@)Sz?;{NYG)Mf~mJFCh$m`6vJ z;AqJ8J7~5*cbcHlX_jzbLK@o`-SjcXBY6c1!$1jPp*q@gR3OiVFXayR#0fYTMU8p(ql9l(a}m$69nKEiK*MjnW-TN(cxnTIucv z=@2RD?vm~X`3>CroV)kk_w4(7&U5~{f2^2m=~`pXH5hY_cYMC@+c(ioOe7QhZ5=ZX zs~I~wAlxW9)D%isL9Szi7hN*yB;OexQO-?LW=N2|03CuegaI=&XrNlAfFeYCG6A;; zqZF7!=K#4W|4tWp{dY%bR#$)oW@f z3}LWMT{pl_T`!XthL|up+47UcgME0^YRBsG4SAqP7fM)8u4RKItxkP-it#mkpb&Yv zNz&hNuTTNx=vkOY;#bAT8}4ZnOpH)AjE9ouREzwj^iU5haoS$s=?*h6wUZ$~SE?FOi(yQQ`l1p?BQ-0sPrgfIr)= zdDR$0Q)PXf!L4?5?M-YAV7Mj^4A-Jeo|EH05G@nn89c_Pz*?M=T<&~gLl%)m(8w6X z%Orgx^z`P#*8*YBt#CJrgZiD%4XRI{OVt+&C#O^gxWx$fp-wYJKsxJvgu^Ch-cua3 zHhp=-MR>skf8OsGW zNM_Y0ci7kCP9w`Kn4e<3$owfJm86SV+W5pToAJh+nE*?$@=8e2LMqTK6uE@J;XELF z6voZo-AEAH0iALwVcFg*U49&a$82X^|2@uPo^qf>U7I&T!#R}gOJ{duYk$3Ens<6s z^$Na<()EZgB~_dKaR4mmr}@{+3n3{LufU0ohXWs&zPaGjJy}_W1R=|5U5_wRQeCCz zHV%BvZ8Y;y@$#Toxb9W!vf?sk;;`k<`I!mEazlk{2fTz08>F;}PsClWbr*R9U!r0> zLMY0&ER8bbLwoLg$iQzZ&x7OsjQ=9Qx-&5)^xM1d$h~mprXa`#;;lwQC|AJhU^yVg zPCI0YSI4apofB@Vn90QvAyI}nJOtq$`1Vg zRC%n#zyJJC+3ZXl&s2>ktao~znTu8Ozco2vh+b#Q*fJ=$kazTBG6m*SCb#BOy(~*D zuk1jug@HLM-eKUxdl%v3c3%AreG;-fLvnLYf9qN^k_lT7*+VSt*fy&}9!!s~fYl{T zhhbJVO8e+z{nJOF8*|=voUmuR=^Wzt2?TU@58))rEqB1Oo0Qps*h9Khc z6Qi`zoQwzUXSA|sf+9rnMY1W&K5A5+be=4+!iGX;$i*Gg zkqi*1Vg>?L2pko!0e*h_91q;dDG@wnUsBJbMa$WLh8BBQnV__!%^#e_L%~^G1DwSz z9S;IuJ~&8xnX+OKVS*iMoaVT^**l1l{9rfjO<6?9w*puP&-Ez9FDo?|5*e^k%k73X z9ce^y8!GOEncuDkpy`XQ>}1zU5spuP2&74k+jdux<#E3uB|nggvs=Pv8*8%LRb}W0 zHkh)j>wJBXfD|r)SHEA3EaLC>fX~Xr&JM$m_o-g*E)UBAw>WU4y_;(gZ;VlP>${0R zEe6TGC=eh1YHF-L548)StV(dP7>oxOl6~5lz)vlN*+!aMliseUp3SUd>+8rA{nFUN z1u@80nZya@IsY^Vd-uTz1|Eh#WBDU*JXz}OO-GgGbkUI)Lu;J3GI|BOO4uny zNy#!hWLI3hES8WXnMel=EF{8q?rMxNaYnOIPyL)N`d_i?T{7<-KbZ3Jd46-R;Evgo|548Rt3vR9L(cl8FZ?fZ)_;a>V&nWh zP4N#L5gXU<0?xkxuih9L0QaU_$18gm+dp|YaX|kwI2b!KXw`pXuGoM1&HroW>b6y8 zhDJb0`fIEHDtrDrkQy61*Kd3kFuMYR-!CPJjRW9nefdM6 z*Z~Fhdn~|zNo}m4YVm(*k)h?EqbQ+&EwlZ14iG!!_nJ-+MF|@5o7DCTpZnKP+CP7` zKWcwKVf&*t`u7SO zm-=@Oro48F-GcTXed%XkKy940+8_McbbPorNvRvlpecpUvb84^w6JJV)yU4fQ^(h) zbw9v)G71zcQp4)5i$^bZe(rS2{zT9a9`f1V@$w5*nu>qVU{qEILC0HbRy_r+tls7S zx&G#+p9ibzQDO-^V*`Mw&>Gm583M{LgYMadxVgRY$aS8mpDC!aW=nLit&*O9u0)i- zY$;0G>+jAgz%_Ls9&m`?SBXJj&8~q88&8yi*M^~Gc@~@S%|_h6+jra)eK=Q~oeP!HbbKmE^Yx=pqc-OC5iu|dJo4%IpT6JZR&S!atL z?|QSOf>4$kAOA^w%k6LVtOC3B8ILuO5W5{V>YG=aJrEg=B?#ZL>FG1;>jbp(Bgbqv zPnGjo@#8FOv&tY)1%T6(ffkdnBV#c~ZDn=Faw3iWLku|#zyCifNpJhdGpB{tPb!0n z%xFE6>||;L;}yenUFhHG1hxP@qhX_u^Fph}cJp(VZ!tu-gM$e(9IkeZE@*AbKChPn zJ8;Uv;C-l+*bh1Eb4~hL5Ie33V#n`;*zwOGc3d9Bj#KuRvvimKT9PY0KAd?z-+c-D z>fZRx0m<&`{cAS_8T@9L;r-T_K82*Eo_ouWMWbH^xd(sLOO)8Qq*@|iA|Sfg0o}dR ze<#bCinABuEuIYj!`lSTN|dtWp(kWe+S_N7VgT;J=XTtQrVI(0U)Ix=;{tGNN}%q#{=iJtan3lEpyN zjW_Wf;6;Qj#_5LrB9pvnk^$3mTQP^#bCfH`3y_|Efb{hD)Hqk;gMztZUhiJaetVD+ z&Kz&zALJ6rrh~m*7M=g_Q=H3%q`3Y`D=Mx2g z%8&n@Q=+>2o7|1f99-M<3D93yC=mF%C{8xtj!BCzyiW~(m0@YX583@*e6wes-_1k69I0$ynfO z>Fq781GwIv6ds^xm7tKD@ViXccOybFHdF>BA_S?YTQTyXZ;D{HE)r zN+?LX3Jvg`R3B<7xTb3 zX7Pp%{2^xf(nz{$wi$N8EzChZByN+(Xd~aJvU#SMR=2>#|Ro6wbxVM0A!yV;60Ytd}NZkLRc` zg3(AU=FuC3EQ4y|>2_D75xuqv&T@vOW4qh-pD74Dn{-}6HvQyxKkVOQN_+mHB z#Jr5!PxxWkrcKjeSpOC3d)3m?pF-tHj$=8TCRrQL+w89cvWH7CqaI=D*TM-a;(Fr{ z-qr2X#`R818YMI!Qjg2WH$#JridrO<+*8K^Y}19=xZkK+t7kcaW=v+r)ENZUPdFc3&hQHY-!X@(Ic^%jO(1}vKuN}8cYvXN$@ zJfRyPv;GET)_(+<^>QGy{uE@^gOTC8A<1Z(u)=nJI+d{BFq8-{z~FBG#~HdDWEL7W zvP{#=Eg5m?Kyk1Mk_se1p~xVrKA2ENLlMW1a-*O_1jxN1n9q8LYp{Dml=h45gN;Y| zUDA0d+0X!@xgT%r&lG$zAu+lMRXDlw)jx^fmg-@grxIuRQ9$u5lUoXwGxPQ%_FE@1 z%JxsK?*cZcMOgO4f%k;X5tZ!&;Z^mnC3Vt6>p1r z{cdOMkuRN`gkz2c?h(S}mQ01*fTUIW(V&>_5$oFGXI!=~M zv9IFC471#F3LA)L?Qv_drDGKRWJa-;+R-10PjkLBici?cS4NhKyH7tc>hzdpa?SrJ z?e8p4lMr_Kj3xoyw(O%c+ToGBBed?EiY5WoHtnNyR)hGrOa*?4Z&ZlxS@M-=W-Dny ztJ2>*x8+Z|`TAxOO`>WVa)(G3uDg(G8js)f1B3s{b1nF;BdPw>e9jLJX2oUB`Ka{L>;MPH$g*7+UxP)dLs{`-3EHNFTAO;PN@-b= zqKqApyg>xMI2-$zXl`ZAJ^8tanMes+m>+h?kZU@O(veE!hwV$wJq;qyl?wV75;S?R zSKnwe%_jnHGIAI~cbb~}R_72cst04cIt33Wy;liMu^T!!aYCS~QB@jFqr^L3o=bTvr*p^+AF3Yu8x_K+9R z*2*lO6O^{REqn)iX)~*-h<+I3C~0CX+FE|7RkKOg#QJD0y1Iy&WnWg~O453-cB1@# z|AUMKOu|DcN%>e(Z4LZOxWb?@`!ed`l`c!_TKDpKmM)0%sloy3?A1r!C~%H6OnV4* z-qonSZxbP@)sPx&JjviF1Mwy%GTlS^!u$ORyBQUa2;@tWA3(S6-Xun3h*tu4I1<&x z-kDNtD`OCLP|&HGIb#?@Kg9P4ofj{_gtB}7+NSH)cuoLEv`mT?#H@nMT3GG5id_3| zc62jWdD;5-*&Vey3Uc(|)ZGnE-QDw=@nBI=RTo^YV1Ub&5^%Zl23)R~^cPzHls3WM zE{`sJ_#|#CMJtgSU_G3qNry#}iB1y@L5DVrS2>)Gi%Yn#XL&9Q7Ow~v&Dvd9cb3`! zW4OJ@%hCf0Jmf#K!CC{Y>d{ zX3fjaHx}wEjTd>TQWp5_cYsg?fQY65MC|p~G-UhNAYz@GX**~BEr@8M?uQ=!4-nCx zNQvz|EZ-PYp`Ct9l)p=zWuL;L-Ja!rHoY-sR6D(XElflax6E6*3Q4V}QdGVt4AYdQ zZgp`VSCNGWkcgZ_*k!Fxc`1F}BP-%mmC9Q2MR=?-HjmA5Bd`6I&)K3P*X|Aolj}hI zK0GC8qZoLS8AL_Uszw!mal;FX!We?SHGP(7j3F5Ys_oRFLW;r0ID}BFQ1|X(%Pavc z76FKZs0aiwwVwe~y8+HS6o9Gi(hL<7H=ck+w(f~??x_=L<4|CoroKdC5oZmgi43Z9 z?Nn?}2lVFX3T8CLTNnj?8?@^QtvFKg!mw6@K`zImNPO~Fk!k=an<{%6SK^A>c-hR8 znJJ>my|qEC(AySl=>O}aGqOp673wCS<=N|)*)2vr$K>~c>T!J@Ei%$>j=67~lTy&i zeqpXH=B)e(Hexn!mvGiBlM;(Zq<~_wAuW5_K-Z~cuOsfD%om;Dp09(3v$fRg!>3J; z05YFp3PI^!cHv0*03dVnfSm~2`5I1MI`Iy*^I`Y)Hibi+p;~u)Q9d(onET+9+P551 zN{S^R5YW$gbn&xhnf=C(^4wb$ZPMwNh6yvjYVyv97{@iZlC<2jfyDzbRBt#6sk?)> zKi_rmlN*Q?MpW(4a%&&Px_@X9xrVW75LP4!lRcDaNnpOA>ao!CZ0}@fagTRuBw^?& zB1=|=$?DWxo<7k_MzyVDmPI{8ZE>GnszN@r@Ye8i0i1XXZ`{G_mMemJH=I>6(oPiJ z`OB4U${$7Au;*^({L{R{=dN+5dw1PaQG{nw7EZn3JJb{-{wIa(e+X#&KcbNR?`HL& zV(&kZbI1nF*MG4>K-2*8#&4<*8#~Zg{$A8DvNQXmq`|@VpP{ROkJCSCuYYJPY^=YF zc>hAMv$HYQv30Pt`?FTZ_MZXb*dVuP7dRGwaH?VhqR-!zZrTA9&geI24+UI;zt7dFdTH_R*T=-6Ct)-eGHm^)+c? zBY&0TQ|&ix2@Dg$h@|GhRo@veH=EwR&Tx>EFeQ45{;2B9qQ;d5y8Ei8#x^3OXe;Tl5& z44PWp&d$;Kr(Vwn4B&RwIEQVnweRCk8P7ReXCt<>!RE&Z_zi ziSRp%$D`vyY2QgiF$%P|@9RFYHc+Og@7z*@D{?4(MT)CO!$RK~X%Y{koY)f?;h*Zd z7;1g)W6)niA5wPpgeCmlD~*<=Sb=hOjjM~Zv(u@nx7vfBP(EQ^^2zt42e2c+#84wp zj+P4EyHjlPuubxM&LYPLX%9#p#T&y#K@o3PgmX=)kU-8`(sxkmWekcijo>!8ZX?v% zSpy54-vvp=;BV7si#?~m8oPCl8CK;F#VPL5urT7{&To0+q6(a2N`Z6C&IjkkD(E$> z8Wndh>wp>XH7=7X2WQ=Gxx$K)d_(*f9*@9vrh;*$3BZ>0<4j{!3iRVfU#b}&HK`(X z4$?!6fq>Ev1QbmmpjZO|MY*g8%F@r0rIvYVxwb*Bij>KwYHVrtEVjJh+cfS-i4p!( zgqR)L_YofrHTFq;0;b1Q)a}e%pq@;M74-!*YLtScn(-;B90k#xSH;1)aG^>VQXNf? zP!Y$w_`%LG2Qv6~iLmsTn!xj2=zR_+H}}T}Rvge#V8u}YtT;G;6^9;Q2Xl8{2tlpT zV$j^+QJx`;h=+7gdlA$3$>SzVP_pLZn5O%<>Ed8rz7_wM?8FQ>rX*%?Aobp;YNG|~ zsgoPQ1`rJ%6G=jPV4w=|6TWdll$dMP{r*5}u4JD5cY6Mi+=B_35ity@LZ|yk7OA52 zfj4`m@+`U;unu&9ExBZrjI2D|B#QaL@@-;zpH6oxy!3UM6NjVT!pr9PJL#2yhg)hcqfYb|#=jl5aypH6>s#CHyzb$7?0KD=ceo?j zM=XSp^|Z)}t&woEux>PKOlGRw)qQkx#n4LNNXuz%2)CE<7GpZ%Ds>2z_83C+=l@*j zRy7vWlhpLA;)w>^1=&8?0qOz&YqgbUBS#e7qrG`VhX+X{-Wf!i47GcF9VKVMBT>S^ zyPdh+S(gm2D2h-iuW2LC?KvtV*tflnnv>q!J@W4|Jc15d(`WmwUgG2W`h1)S>TOx9 zg!-?`WJWU zWuh(PdEdmCNstB&<+N4MGhI$*eCJ9X_lOaEhWo=~$hjRaq*H>#eY$6*N7L%ZgrT0n zVE5s15{9b~m#&3DiwvGy*gdD$p8fZvB$j*+>lQW;Zpz_1F7$@hwFFqyJTY_OH%20v z7^_JZ%#ll$UgasFP*vgyHT^VW)4XWb(!yjSC=|mR&SBfujm=CV-uj`fHk3S9v_4|L zwH1uDLMm8#W$}2fh5co;m$$3(B^mR{kj3sav(gnC6j%9*O)794O`%;!$U?VWr&DzQ z-aP?que_vTf;>|B=nt6U*QKkX8;KQ2@|Y1Lk&|W|v=#34MXo{E|ai z^+$+bC0^&~32K_duw&t%rAHR9XV(Oo5{>>Bu2`86`4($crp{`f5c+Ej4Su%NBf`+S zBMrU}gGJ#u!s}xuI5tn8U2eIY5old7yx+5AESm^b2+_kWpN?yi_r_lnaeC9a+~V!rlAt_UBBr<;WpZyOMll6&Csi$yzgnN^Vvr>mHu_nf1xe(xP=3MUX8q zoT^WCZ98{anp^I#&%Ae1dL?-nvnR_VKa3z2tlkl7Aj-grCe2{g;H!?2P=_~XBU#2t zyiK1B#?S*WhKh|!TSZD5pwVxRnyY!D*A??RDq)~9YHn-$Ll%Sj2aj@=@nYE;%Nov;k;c<3^rMdG!w{WORo=I6*C)4f1717*2c{ANlVP&xoq7mF|Se`mC$o(aL0eU zd1YN;F+MalT(Jq;N^rccuozR(YVR(bor^8ptp5TZaWXmRFtOGcW1m$2C(yCQGhaETfmRncm=K21c1_b29N@NC`AQ0wLAaHRp3FlGH3yBW-97Mq+|mV+0iu87`S~Y^LRT08k~yZa+U7E@&rGl!(tNh zc-6i@D%uh=ZboUasuHAbDJX?0&5M=L#2IgzikpBjbovb=S|3Y4*mN;&{9X3bc+U1r z?C9}fLYe_#2KI^)=s;WgPBduweHrT0Z=mTCrX@KOs{2yI>O;1ZeWPM~QnguZ9^wpc z;f@(b)V8qY$Ms6jcB06rcB25t6_v4gr+Hple}TkX=01`Qv!pML3>K;`^&LbYYAdMC zIknR{(rCZx{^8?yMev?d>~*|)$Cg@cfkSEA7Lwk%M&f+5k%s8~R+RlV4Kr7TN8PnX zGM6mzs;>&Zw?*br;WlBHEW1{|g;&Hx(PexO}mCd$5QZ5opC)3+Sxs)m__a7{I%+9+;UB&CJx#yry2Zl48RHyF+HXRYEEs>@}j zeq+wK3hfE#y4mCHb^S^uPIx-X?NrzNvh7sFyjty4{x0x1b!~etv?n|BIkfEf7iQq@ z;Mb;8u72J8o&&**(1;%-6AQxwg2_CD{k&%8R&ux|RR^(en0;K`}Yvs==dzB1?{aHh$5UDqt)>`_Gm9s^57Hmc7!@Ch5<@;SSy*=*sKcR@e z@P94I_HsZ<=x#5Z@!ekN?Nh(7QRdHSY*Oo{XgJWJ5&?+q6P@nzN%2=jo-fa$FvU~z zYa-sMTRh1TQ79B zHNY<0>Zxw-c4B2{%ve_uXVLx=m7^D|U++nc<*jUONRaugV+s=7>@+7H3@;@Y^4x`5 zK?tYaxvrjet_w;))9!pML&b{wkRy-AxF`8uF<;u_qS>x;`c6Bs#wfG%RP&T=O^-XR zXKuTO7w*l;s0RqX9xRj|O1>T?o9L|xx;Iqgbj_fY8|%)c{+L$D+Jlqy_e`|oL!K#= z<3s4l^y3Px?k>#@oKgIe#ni;Sa>ZFf&&9#rugxp%yO;5+g^wG?=aw&S0yO&>KM9S| z>0Qb9o~WS3a`S5;HSBNyRM?=kTb68Hf}fggKy12sbM>I5nvjdFZBvP`&n6EKujvNW z>*n6xlX3f}k9r?C&?2?4MK;^cLXy z8w0P~L*%GuY4&GnitUe3(!bvzHs;@pGyllkG5^Mv{j1;Xw?kxQWUqJY@czfc1Qe=2 zqJV#=Pyt8zzgT2hYj$FKtN~|txNtWeIPw?IG(3M9yMtoHXScH|uiLUNNePbv6?M*2*h06xWC&2x2f%@JzXoj^(GWgL*gsCXEu$t;O5Dg4<26Fp1B==TUs6hhm|a| z(~Vxy2w`HAnA7-0EMqxwL)4ladhY%M zqRN!@^=`-hs0e@5F>?p`Rp?Ta^U3Qlh%&lp1T-ow6TgX~7tS779O+N8PMHL%EKqp+ zD$z%==-%yy%TxtU-7)Zrzz62N(HmuY$fVk<@YkwmOCj+_9h0hpp?t-|8g;;VxcATc z(fn`v(Y@buvC5>7HbQ|K^)@=FfITJ}$VN@R{rP(Uq~FE10l?yE{T~ zYaxq1xAQy0*m$-&xXkgp%)N|kz>ipW165&Y06&w;!#_tnMGvf0#l}PHhM^M~RPDf+ zxU~DRPf2(D`+FL|CAq|vq+$IBDulkJjBFipE0GoDPh^1ITeosV)}56tLupD1rPdoY= zM^t3Z;4Q+z9~NS&^+P9dmCbxr``cl9>|z)OV|*v&B4ypD_cl>H0Bp1*OnP1H!u{j4 z`ZT5|wCUN)DSrE(6SpGLqvs{ouV_^uk@Wr(-7HLVkKw(B#v|J?8akZ?3Ja4dDbE zF}v%Z*PY+NHHu`;jl%H(lev-?of{*=8~KjYKzWb_8d3*bYq|y8FAeE__)G{|3RQTb zQT~GEa9;_eyL*Rce>H|hlyLWT*6-5G7lGY`R2t7_&a=CS4N{>+ zQ7Lt3d=y|9q&%QaCvqrHhw4=p;^I*rzq+I;1VFi}3x>SJPw&1>@wylNLb}8Z<&M)s#_L@j#}D1EU%ra%W#-y zMq$7Mvl_D7Sc}J)y}LuIu%xO9lXjd%2M_?5k>{U*syr zz_f!O)C{B|$fATaWojfv_PCN$f{ijh zyzr`Ykb~A`xf|748`G1y;(S8%(s<~0@G=3m(;ah>Jq_tk8clexmhH-e4faMA-k|D& zaKAnUP#(2G|CZyI$4{csUZtkIRHMooHXw^w#QtNS7oZP3$zl}K@9$U(JKHN7FIll->XrvB0 zF!a6@anXn2VXWjGrci&|h2Ozh=^8!-Z+u$|I&kxz%X_Btt)lv~-ss|-@c9jg+)uW< zb`L4rKD~XQ)*minRD?w2kX127jNU5BO}vs*WS9D( zjHZC#0$!ddkyC65pbh>uB4Z9?L(g&i8j{YaZb5!LG>Mo~{?%Gsn!Q(0qRNO*Uhxr6 zl({W81<4tMbmKwlqfZp?zxfBHmg-47xd)Y)0h9SEb674dA#E;rITyTKWuBc)i>YB9 znwm=#T9>Oy{vo%tpEB=T1uaReoN}~b3h!{*a6!z9^8p3J2c}=*M*&B-gf8Te8-Xh> z2zgm4NM!^&%{lY&Z+P#^AQd#=>YTrb@BNW~7We|ToBxBpRiIypTg2`Ual{1{Yq-E- zErtfXiSMRcQ{~uQ3Ir%hAV4j}8JUP;%#iIjfyubifmC6<37i6N)Fx*CG6+$_17AYC z2hO&)F9Hw1ez;s`DyFK{ROd`K`DA=@=H%uYXn%-ONi|WP31+>*0=X^nD>?%!B!LVR)UgQ?-5vL{Gw)qqa}ueGM?8i469QqulP3 zc>vcqcatxAf=_HD*7fDr}0SpF*^Ef-Sp ziZUHnCdZ?&IPzCv6JYcx3pQBYaJi%5aj%LVTwdjt^;80jp)5{gXDgFUtFRKPFV(^_ zR4(vA^(|1HXkqOnWSd9l3BsOK5m9H=LQjjVXN34vo>B|B%LOHdUD5|7qT5yp%b*>u zP#!$Ev#0im3x8fFC{e~ER#+y>Jw{jt=`2ZNnWP_XsL$EhJ?g8D%u_G_Vvmi0p`y*CdeA*j$)TcDYgAG2QC+o|EK2N13d?wT z1XSIkZT1s^+4O{%QAXtYwU)w)F`?elMFf=6$D;D=eVC>b)oVbbDTlJD^dmTLM~T!9 z3=WqQbtjqW#~6sxDYTmKsMx54Heaa7H=RmJz{k=rMRVW%&I~Pq)BSv3;ryh7N*prV zy&H&#yX@3P=-33@G=UW+N<92a50U!Mi*$>`8u07Uylhiyis0h%st8{#^C+X_9RZJS zPSwe`NPAU3%Cge~!o`_BfRTzV`m7Be zY7)}TXTkcwI_?JxI?6Thj*EmHiyLqGWXw!5NPf4*jp=N44bhKD!e_G&XhXc!nYx&r zhv@NvYap|8O2K0)q+VtgQ~#iaz+3yw+o8G%{qgO}CJTKLQaf`&1Z&S@9~RWU41DAK z-~glVsAVTzM245$@ z{iO1?fOqfg)uafG=Z92u!QHGOEsWx(pgp)z4)`6o23M)Ks&4CNT8Ogjhe4>;` z3Y<))dooA6&AURz!$HiFA7|%yELuEIX)QVv>+^{*2P?=^OC5!!M#BQl zTpq~L$g)|EhH-VB#uPcK=k~ldl`AtzU+LE*WQbZNF%_tAl9Vjc!&Uz*y*V)XdMXar zV~Bje$C1{xsiYl2EoL>7lmf>?<{1 zgvx1J9Zh}$@qJFQPwfT?k`2we1;L%bNiAI0?iKItH3oC8vnJK5TBf!pzei=+vEz1N zM*rs5c{eJ`x6dCW(;S3K-8cJX#vddG-1q6?;G&8Q&A)@8l(sP=2zC`irLUeQsA#T; zropSQOc$rj^L`_BR&&;5m=`kI!D_zcv!c!AOgRJvPO+)lUBX*EXL?|2>C7nIFOf{M zF|vZDz^ibS*A1@-J{DGQEhME=MMgXOagcfc&4NGio|IgXp`c}rQbVK}R37|?XekfI zUWmw-NV9@uvAt%xxEQczkgdY%fMtu+VXf9iZXf6gdm`=eg; z@5@+FV1j=OenI{aEC~f*-2V=K{X@q3@9p}}kYAup{{Z$l|9Pk&wF@MD2p8vHi8SJ>--)#8)do0$ ze-de7{~*$WEf{9vMIcLG@g-ZPxh!$JXh&=Ehqn0>i?$mRe4gtNFOU6>q_r|R-89(U zB58FMvdwGGb{)0k^DDDWBQ%*)MP7}UQ>4~6E$9I>Ul8MG8?A(N&Izo1=IGJ&Y|hr0 z=H@N}bi5iaFWkH?&!0Puf626$B*Tt<{VruE%zo2r;o`W)A!vLhkVC_q2AO{t+vc;w zrA2Gr>xRU|l1YVnBqrOT(K`mG58Vo9%Y6#!uHUR}47jTy*>mna*8N=jihA_Zqc>r% z1t;b_oBDncVHO>9Q6*fcZ+{m5N$`t7B0$kL%inj*KtZ(MVFIZSj7np?Vh6=Lc199D`s~cJte@qWXl$}-%vb}gA z+0%YFLUpF5892;@JiT3(H|(`uJix`on}mKV_r0S?7G~`IdMo#Z8z-ojh~2lS2Rv9n z8WzMr-yVLoX?jtTt@>&-fxDfkfy|Ew+5dz?sMf`k_8$)QHk%%@OX8z3C8$$(oB*ACuBxRcYeaB zAM7m6jFCRUnciNKeIXW#xy=xgx46B;Dp~~Ec5W+1`U)|T6pTjq36uFYE z3csnp+%c#^3&ZSSsQuot{FJmUwb@BG+jD~yf__-5li9kJR;5_?5z5TV=|RVrex!gox(Y%MYdu{^_~~}aa&;Z1 zX&^=<)fl5aHfdq=5SX-0jKLmW#(Uq)o{sDD=AfZ8YPfhj9$V!X?LMo#=qG3u;zF1m(zytS}C*`95+40&QXX61H~dcHChb?(P6R#`ZCDg4|$S?1!) zl!fGKawvS=R*EVuE5gx0z{;W_WlE6w!yBG`HMQxO z4&!rN#2Ygd_y!T<=@_46@su6aPX;LWNnO8hc(lqm?U3P^O&jP|+vD$fn#}e1?iJRR zEDWtgl!dS*h89~Hxl8~Px)xSTsM{_(U2h3>U5_UOq!LiMp)1d!yi?#&MqEV6B(}EY zwoCfF7U2gGx14hIAbdCb3Y~KVR*co2ywt3vIR}9s8mOMXvaa5kC*^2Tb>UBSx{HE- zj+2d)ts>d*!$UOEu~OSs|h zGFqL%(yYxik;w9Tn=p#FPdMztUvy#fa+33y2wU&;eLs$I`^y<%BdQ_;bNzPJ(q3HN z&oB(^_B%91Ry>xwMVM+aAvGnI59GDe@{I7guUc5SoCTPFEM?!P;uK+S#`Hy&!IUa~ zi=Go#xW?>{ETJj%D%gU!Ta8iiy#=w-9jx@~(Go0QWO+@C@!%Y}J6Iu4U{BgBSYlLe z->Nj}uPVYFs}yr)fB8DJ8nzZYJgVH|n9T33*W$4_Ngv*l-MYvb$O|(eSX%umHncJi za|jOBk{{kefEnU>%Z%TBOkYXGyD(D63G*n3*?y~r+c>*(O#7DA=F~*vdt?A6;AL5aV-++7o zE@_so@SFi0XYiN;axZ_+9{9B~Pj!x?T=Wd+4#D`ikK5-}!}Oi^3CDeEn7qqk1zTcIC#6!Wd`#)tzr;BTaxViEXfNFUb!ClXqJR+>8^VR)I4620t~{p_X5{2*%nvzK~BIlkB|Y9BznzJYJh#P&qG-T3B(T@MMVg$$uw(74&If-YZE@u}au&5~LI(G{U!RFX*-TU6rS9w8H(NlF`#Ddm zFUMOw$#On#E`~Dzml=puTqwkn3a?13gQg*@5cM>Eps(_{7)Yg|Kq~D4QmN{#RH_c7 zQYQMO0k252??drst}hqGmj^@g4dXX{1-xcnKr(Y=Akq%;X1P2D1TS!g6tm)xim`4} zU!~t4Us1$m+T3Y@wjvnBv*FI!%0PNS)?~|0h#AQGlIQG&c6ajj*Bi%^R3sHW)Qxv2 z^g?s-2zR6`5=)@$7OoekRYhWHW-XaR!vWUSyuEFX&p(O)#R()6ME({kmIbW+%`$u`pVNim!v|5nmV^}g z8a!3x`CVIDg_));K5nDve3D6u`9cv0Px9JgJ+45Dk_dyh^kb68KOgk4cFY&!{KAA`H~H8 z{EOG%?!av0f_=|TX$*yk9}tacE>UATue7~CPs!3sGsqj5}HjoZ}{BP+mSfK4W`I`THASub==)FQ72N!@RI zWYE>B+Aqdo$gO;F+A}j_G2|t0kY;=Y4yDO!^-)2on8d*K$TCg_3oQkU|l;^Xh zRvsSzjK^xk))sp)M@|E;#VY-35cfsvP#dCm7mq{WI=InhB1=pO{&;8RJ6egMAcfUe z&LEuOJzLxk6)@8%OS0P33!r?#IaIkitqQ0vtL>3eD4N7n{H%c#)eIAjh1ImL^El*hHzp1C(eT)Y zLM9Fwi285;k%eoRi7dB4{HKuu%-{R;8!t5Y+dlm%))KpWzCeQP6M3d8RRScYOLQiS zZX);6K5!k}Xye!WiEZQIrRK7P6bE{$TluLLL5a0vWmW)j@!7rC35>Ju;(;} zQ-Ve*YbwZrGH#k)RFn|oQB}*d!F5~{nJ$34-tyXe+8vixb3wqKrVZwoIZgUX{9g2G3&iZ>jX*V4jcPcLRk!!ZU5)SPmYX;ZPV`e{=Y z>SP}cg8vcR?fQ5OMkRq(Lb$K>rd4n+@jn3QNXaX{Jy9tO~a5#+vzFAW}pB5y()rq zl4YO} zHlclc4R6cgXSXmD8AVyE0#!xgvZS0-+(cU?58}H?A?eshPQC`Y?jG2J@&Y!n@0A3Z z!I`8@Pd|1r2CTq<(){L>n{LTM;-vcAl#$QFb>zc!>6thfh1dQYH(fz2y#94~N z^^FF3IAbjH#Y`8(k5kX!pb7^EXHN4k$F$7#L=pgu@TVp%OBsP zVa8d$n_H&WZ=ar2D`@24l_5OFD|d{TrbwS1JlQvP>Cm1hcS-ksU8fZBdWM^Np2Rzp zyMv6Xb|rB*1cp^UNt&uB zwibQ?UM4vgxLXGDIJk~jBla$XR7uEmeA*vVgj{-z2X8Fg9ZW7Wsci%nYr7L%x-|x!%9B zMfU$ri5v?^S@^{kAzVPm`Ex_DfU?HFV~amGl%_4P?AO#X`4_1xgpK8o`|od&87CLV zpHd|MiOkIMCGQDA^(q}$VL+clJ+?&?gkHK52&K(0E3{b;)@u)AQpx4<>7^}>9?sp| zn#=889oO}l2QiWzE4|T@eH#ZGhqJD`cQKOcF$Y~W6u)95-&eGZLR!1cZz};aW4vug zm`>WfkHzO2@8M#>rMy+)^!cGx)4c2Xxh#-zZq0@W)N~iz*0pSKwTmC|Pr|TWy{~8! zzlIqP>DLu&q*1MmHJKq*{G)LjY;#Xi($F0ljSFV%K%by#Wt9ACt*;a@Y zbxQ{vpI5&qFL=9tf82xw_i%Upr}vPo)HF0}sJ+v6aBnv*<|J#y*V>MFIL2e;Xoquu zuUcTw`AE2uVA&9nM&~644R7hYjHlg_mwGQhVpM5zXI?ovDI-xpN2x zY8g-yNK z@@DsM8I^Lx87X}p6!Iq(h9z?eEtwI**dnHm*~{*D9Hi%z1K;^k;s&q!mNn|iUw(k9 zV9h>?LK6#~j4n`*vNPR|Wfr@cZpYo5TA!%AHV_c#sX1EkaLJw^#Oa!y?_-O(lwbcc z(wT1=0NGi;T!do^n-0K!Tklj~;y~wfI`SF$$}_fqY&{tJ$@wz;m*KJSDzJ2*T4vF8w;jKfX2`5V{)cQtnQ_wEvM|_jH zs)@nvA3y!wG{}nbQVn=RcY<}kpB0@`Xk$NHA;O~@)XPUF=hvMee5X1S+`<*HK|)SK z9lUa8w)`WSfk1%O}sd_S&yChmaRupIi zsy{gHsz2hrA6u1>q{eCLx1)|e(p;>VxTZCvBKSGvhn5(YxW9|+p$8?$ig}8Cw;H&A zF4&S(Z5F#XQb>$N@?L7(mjIvXe8cp-qzC);DRIAl(|A9JVEkU@QGJ#-q)p7JuLo?* zc(RXDWpiqt@dWe68@uI~D}o@#>MP?MDIti&!+1@o2*rB_mZ9KEU&7yC6H0|hM|R`^ z2-0kUD*qX7PsWZ%MeMIR#fkWx3dEERbcUzp1wEFVh7qqRQjPvRN>3k>aE#Z2#KU5g ziGqOG(6$S1mvIv!jh>`%?^h)n@^8nMLxOrPL`2o?X4;HV}i5ZG z`PBE!%*QcXY6WX<;5W9Wj^!Hjc0QzBl-u&joR`{OW9`?KZ925V)J47`yu?#5B&VX2Y?c2SxA5@^c%lQ=3D#f}_9os}*-)?1 z`m0}NE-UnwnxwK~yiKTl{JVR3tO1PFbiMVoIMJrZ^llye%4r-x*<%1I7D}F~tj*#p z^O#a?9m}%l-ik3CX8D!%;3DTCsbRCigr?xPdaRZ|ldvoOJh4g%BWN{ajiEIMu6kH? z`j~x*gG-RKs*}Alb>cj1qTQ>X6-$t22+ghz>?ac#rW}&f>5Wk0_n?rm}*N ztb*7+F_c+C&Bd~bI@(uMgc-k^kazNfUnM`#nkNohgq z1{1iE-%ef@RN`y)UTHh^g-tL>mYp0qX*@97j@C6`Llj@p<7E}`c~-NwRetWf zi|li2St1$+Cj@z>l?0?HJ$5ZH_Y-@>F*+8^ZLNK`6Rm?^v_sz|$0)Opptw21VMX-0 za(5!gn`E%630aqwHjTqX@1J7Mc%MANoN>?0EKaV4*R`7n&*e5dnhV`RyE`$vK1)|h zfgk+2?^M8W2yb^X(u}*g0~U08fo$i>Y*D{gf}b(ZuaBb%laV5IYDp{hIRAUMYC}^| z4T<1(l55D*V#j68NO9{>8vG6;0%CvLuCiM9y_NE1^0Y?2nG)G@jp9gv$Gaa=RqMja%@%w3n<+O5 zSLAABM>1qS(M2azi<&KF=M0-afU`rf#Kcv0Tg)RB^Ex<)t2)nD5DUtS4*EBR-LjJlqTRh@!0!q;v z0$e5w;ich6pXN}FQDQ1IoF3L6R!y<-hbY z(nlm*Pd*LE1Gw~68x@& ztyXL+e&M(Voy)gRuT9xjAhvS^2jLsSV4<`N1_JMa4S(7S#;^sZm;yzAGW z&%HdgK|ZHh82iX8ixy!>dHNpc63?p^T3X36!tq#|WYkRYX4kraZR$@I* z7%pKiP}fWp;y_?=dFVL|&$~0y&~U7JadU)t>yNWKZTz|2AQva)ocP0ycPF8o*UeD; z4KEqHqQkt4l){=Z9}GO#w<&xw1s)2j;9K~ODSVk9rtFOh*l~lA5zu#Dl#c>`)n(01jf>TLLdIhl5&6!rFHjc?;66FQRenJaJ@K{ zPO;ASOtap_FxcR=`C)Omi7u$lhpN%=AkSJ$*AbPL-pbe?0{21=iUmggaFh}st$1b@D7)78xIu}3j@}V z2r|%Tc~*&k))cTAyuXo?;y3a}TFz`Yf=a&vUUEr`{ToADwZCdSVRN%;k)xc2IBQ+N zi#EYRqC{1+692a;GUi>hu}<~Au`cz#ncazR(IQqnVySS2A6G$*@foeC7Eh5qieYpQ z?;dGe>dCCo2^uZwWDBU!K@KPsX4+&>Zf)nS$mS?Mnd%wb+QxV}`GcVDHftyMl(f$2 zInJ|q9J=sK7 z7N+RN0JGVC>(Mh~%sUCjw278+%{w=L+Z|nyRqq@S)hTy(25DdAbG7HZ(ZM!pg1FHJ z|JcM7@__@4fcXzS0VQ2#g3)=#?d_hn%0|DBpE z7J!X@8RP#GAhFz)hW#Dddar5rSI+qC{~d`X3p0Q;cTE5)R3QKSg=<(q@zvjyTv^{W z>)(y&+5b#G{}T}^Gbh+gKil)q&BV<0n^*o{akjhm{6(w*`=1LK|C461K!BAT*d**g z8~b}@8VmECl^ioG*WWb@z_x!&5CBN)kEHGIkroT{zauR(;-9L|nRO@<>AhJ&G_thE z0@RN}QD194fW{*0yM@WxEQ`ihQe4qMHS|H z;frgaY9Oa~)k3nst&<_C%jNNINAm3I`0b45>Ai8`y%I@IP+6v0TiRf8ef75H{&ul< z01f*jF@Gc;W4-OAc*|_k%%fdX&Q`f^FDp5uf*Z!`n&YQ@%6u+6YDnh^?I0%yXNV?c zDum@5o7`V6mpf|a_Z;mjT5cDfUY#KcxSBNl!cp^K#z>`?7e#8~1vxuk%Pvp%xeAO= zPPYg`1W@-OP0}mccxSVnTh0yaWdKJ7mHE^I9Cch^T7FEb-BsqPUoKxoju~pVaRh6%~vM%JGAL~3(P)S~>?p+pYxGbxvyj?sv>#wm3(RU9M zpTnS3Ui(qRGgk0cLT7d+x|_r_;D-5^DRyM9YD5HH^Vccl12P|vtOj+GTiYgI=kGOr z(jf__y}Ny#U#kj<hn3~+~xvnNXH$bs`w32{R$x%I86qKs=Z)*GE|!C z$#0UiUPqKX&q))AhND$#)uR1-UJlb&`pDLVkE2G>bp0)8?F6%6zkktFfjC%%nByyY zj-A}Mmmxc4AF3#yOtRjaR$_5)fAeFmsPi(=M&UhaR|3!TBQMtUTNeT32YMEcvxXKi zA$B+?YDVmA@F=mktxiStNIm+k#nLoh?vEYM-RdGj*r(j@S;64gML3ZTnhWx|Ily3< zz^#dGnJ(JL%?LjK^nf1Z3Sg`i?JE#^2DoTUf||yBPjhZjpv^|oNj#Ai$_ zx^RpdD&sWrRHJvTo>NlpWlA@@?=9^!94+pY7sLd^j0(lFq`NCm>!lg9IGb9d>WK^O zj+tn5O(jgVndDD-PxX%+zZXyFtz4tt#Dp=fho6tzP#X4d=O!UkwbtQ&7Lv-9{e$75 zVQX9xG%NG;rUO!l^MQdm&Z4sB2gQLaXu^s<*1`B+uHdM4w{AdD7|lV z-JTOhAZfNeL$z7Pa#|fhw24Mt4z1LS&xjk58Vs7f;m zWxU2bP3=nw)W5Yd!Y~F;JPa`4V#xjxEFhU8s*Emat}is(p}8oauj4l~-j0#I=l*qW zhCzHt4=1{N_Cuh4`X_t=Rv#~zhPK5wqAWB=qeDRZ_jUkD;{j_#El?U`^`?oHhTq+8 z2KS)x8&x)~LhL13x}+;Uh_IA}4M~u?5B4MmbR>+k4!`NA0ONU|YVeey<6mOsk&@!{ zP2Q28z;ttB9fv!WGDH-`zf?x%q$Tza`csmBa?ND8 z!~I-a@x<8YvmPzFRgMFXKiQxUE%{9adCVqEU8mb7XU$Ubo4u|fKHK#+;=o@j$)2^I zk(RC5fa1uR9brmV-?62d#Lb%3aU&cx<35%&;`nqBF=EEtXqRm}t(7sglgnambb6X? zE0E|rwKy`W|NPU_m>nj{(N%=i8S|jWZq@Z4O>PD*kG2!m-NwTP+~0a+a-mO|XtC+H zdFW=W`O|3Tq!h1NJ4UimKdW97mLE&>?TW`NGSTVvGbpNE%bm#NnoZK_<(e|=#j3$Cc zuvf!AP>o5jsb0&?%;ch@GV1fEfv!tQSraz781;)U;mD7-3KleyV#Y<~q&DsYUf#`8 z|5#ssOz;i;8JE!2|_~D&%8!T&POt}Hl$m&(MYwY3A-5weQNAXNiz3;3w zU%<+vBXdjIBe=*_Y|=gqYr76^K}>40F-U5H6;CSi-bdP2I*|C|*%IA;khSNgJ2yku zJ*bBj{cYAZP%k|SpO4kf3#OoLQK5^u(vnUIj)UZW_d+{%*Ft>+89w3HLWLrj@FtgV z9SbK>=1Me4W}7Y#9gT$9EOy%Pte{Ap3-~~twYR(zDO7jH$Mrvab*e?|`Gsjr*f5R5 zH~OAT8PX{v3o#!K+&nzsirW$9w`0T;VX}WJkAXCIilt}7!3QXnskA85aXIxV+T76y zHNN1eX!?AE9xzvg{yl!9iRLbTBju8l{$xFnUVN?2CS1}Pm40u{O!*@_aM9TXE;=kb zJ(XX$D2dJ(P#VPi5o*%$8nN2EuHCeFy`H0CEsG1_hvi+QklxP(R7#z-4a!y!@Je4X4h5h4X0NVr5y&#+L(|&KpUdTd=f#(ntN& z$QcnO$WuD`1)HTW?KywIg}~I!SUJo!BD}YdxxeK~?Co+OeETBl+vQcg1790I+}Bj- zG%Ux~G_8=>d@J-Q8#5%aSI=LKSNZzCl%b;{5y^{n5krzWk5p=V@rf{1cIX8ULk=y~ z<_vdgwpGWJfhfm`U_e8estOgzV=#KJ6f#!T-B&6|OoH$rDWIh!Wgtk%*wDA@87@TO zyN6|D^vBqdA+%u?f|UHXUdL0ZB{O|80+fm}%HOr*?2KQls2Edv@8Y@RRNF8rd>>Qr zduEplbV6a#>_8Ct%-C?WHG6>g=P~lG0Jj)eGKuh-Za|uKvUooLPtq6l+j1eGu+scJ41DdxeFadDN>HO7e0H-Ds z%RZNH_rRz8-fyP3hrgO55SF-m%o7A=WvY7mc7X?Q^B)Qa%awgDA#McfwM3uGwt%3D z@X(QV_&~#P<;v7S z9nFcoAP#-R{@9((6lFJAx-y(h7c+u+pcU?;v^_*}TJWISMI=uXg_99w&YB-G)T z0ihT`xEBP3d%fZHtnm`s4_J4`)C@grQwMlS%2SC-awV!X&nSK#+Yf_9Yvg?JTURvU zAOJ;GY%+Pq^7fFW(|`p+d_{kEKZHt9D+||Bq4*LDx%V}e4L5{6=ZRi!Qbz&b=U7ej zBs4{0y=*`1Hl&}1`?=#ZR6FYhYG)?d*YPXjnI|-9=Hg}jXz$FkuM>=1)29l~Dn-ir zAJxj2sXup88%+wlG|cA1U$7lb!dpYkJmLBplXU`Y$rT)dEqOLy+`+K?C0pZZ_SEIT z+%as&5=YyOqr!G~9Q#dASC-Kn9*K1H9AS3PdIZTWVK`r<(M%#OjT3TLJz8%6A@*ZO z)C6oc#%BjzrT#xMjA_$Iobxj6C6P5=)TgIwWw(QL2TMAt$WniruKJXePE)0)?|(Q4 zq;!7TNlTAk4&BV@eG)KJ&aSx9#}L{a0wRNbhw0NI6W1sd7$K}#Qa&%6-Itdv=%2oS zWaLl(o{q|Y#=nakw~;cY<;{KT(8| z$Mm!{o06isL;!mb{X2V*XTToht8fL8c#@`8w9YK9$fe2Stx*Ep{PzVE6A^Kd8m>FLt^$Z3M@Uf z{bJiB;ryLYwie(%8?nv>vegU7;sTozwgMI=#+O(!bx)wC6$Wt_+rX+t%fi${^8!a{ zs<*fJ{*IoeAFug7rhnW=y&1F>W zIJUO?$2i~{`Xf9rZ_3V0iCxHev#MJ7f#PfI=Q$6NwWY=MIS(KWhM6Fhk*I)|2J|(F zchOC&n#KQM^4q9BlSJhSN^Xqtu}=8Y&!dhdG3H`9r&P6d0oRf_0;8LvPPx37m{;dd zrD@dN|0g2F^5^=Q|06`|4i5Y;MCy+!vj1EK$jpAH`1{E;{(*j&!L$FBY5befItRxe zOLYD}+QR|>)Nd&2cYl25p9NumZP))3Mg7T$p8e0b@;`w-%xpmC_tSpt4=jr9w}Pv` zg+6y-mWFzUy8jv-$?@l7_CIPCh>pC&b9c7=U=RL8cFcDe?|)-azYy7<%+Ual`XfvH zdmzQh^6x+@c(oked9Pr=3W{z?3Y1u#+B--w|IsKP$P#7k=H~+Oj{*tnouB-YB~k?0 z0w7gFynmYT=_xxn>@(|Mk)nce+tG?T z*)c2n1zP;G<$Bjn-Ub_NEu^RI92VHQa-$Fix43c#hb~axI9y)s)$9qVD?h2JprY2i zBR=V$o;UdtO|QF}44@6nc)ggZ^F3ZX|l3hwG9jovP7@b1A$#l#QJRtvu-FUYNtz!4kTh@ z!Lxx%x62Nnon6Z3(Q8t-Fiw5nzD@~RZ7?sq-Fh2z^!eg)t=%6rM!WH?9flJ-oe%aj)!Bx0@%(Ca z)A`G%Q!RBtM|q~@tMaR1uijH1U2$>aI3z;~zHL#MTT%NY1+*W{?^&9)JlM^oLpHlS z?u)K-X<0|vL393zfasNeA)v3N*Iqvn(8mw8^dwa0W_^2Q861s#dV+JMNn`D?fd919 zHFf9r&|x0+Ir=w=2o!D?ayYd$;YJ0(Fpw0KLX?K};XA^3`GtH+sn_M$OCUS^*t{ud zhzKaWg^A4_9<1MB6-D%6c_R{8y!-f<#?8J37qIN+>ukYTzVfPD8zO>(#>};8uCVl( zpx!gUY8EYB@}&a!2M4DPfyd&RxK%4Flkv2#wU)(P&YPig!j(5gvYt5wby?C#N7G(= zNK|qA#gjqi&?!HdnARol_xAY4m%|!V78ULINiZDEVxB8GC6_7xxSr7Kx7$^so?q&v z;6;sJw{J%xJ)AKbe8O!+_tLfc5;xJJ-=X_7XX#AsCCT?~)O1fsSENXyH_75u*!qG# z>hcPj1^kI75yJSZ!)*^+{@#MgHb#q;(Cu)oQ`R3)8vKar(9yYCFmei=^eS-5H79ab#PbS3?{PWhER<>ug5<^@2d@pclv`OwBYWXX-j) zsYZvxbqEAK$>K>WIq%W=QNc>Gy3wQnb%8A@vS$_5a~F0u_ukRGxk#v7=NC|2{k8?0riyz#mYWkz{c z_YC2h>_Dd)x_!#=OX-VYZ`ouU8h;(JK}r}UG_!k8xY{6Y>^_VgE#$To&%E%wBtwBG zxei(crKb`*m@-61NVLIqowd9Q$KSCQN9D0TEI>Dm53CxrCNTc&SD`2_XMN`VmH9%t z80mvbi3Fl3r{7zmuqb-DV!dDNr};PbBO&@T1>yIZckHL@AMA&LDLPIY61`CZ_>X?S zl3sp9k;Eyyw11ki-bL)X@)-Sa3b=r=jQ-){?4_F>xWaRD9TB$*CE%SupDP4cCI7AZ z3jH|Mre=VIH;J=@tIJ1o_GCDAK9%DoWqjhTylV5V3FrGU1@6rhA8)sA?&~!1>P>Rm zdCZCthI=H$Qy6E5-&YNE56q|cdOP;#Pge-2wtj3G)eL13xLg(H|ByIYVgI<@ntysd zrS_t`DyYhb-`sWorX*LY`*)$Ps<`v?IG@hb#pK0=M+KwChh0;(h3}$w76Ue8_N3O< zr->%3FBa>+K?{#*U+<1jE&b?h?_{%brubYYAe_Ya#LTlmo!0CrW&xcUW=%h4g`fL$ zo9R+42U^AR;-{DuG485urp!mCOLtbzODD|xQU25WHo??E(IJCzsLq$hqZI;SlhMLQ z3D%<&>a1^3`fv;)9GVwa*GOVY9)S{u3aL^bEDf|ea31C`II!Ka!l3B(bSPz#I-&L!H-w`3vwsz&X5 z{QKPCdVDP%rk7!gXk<49C~d;O?;(dow&I^cAJWp z@>`;?$70EZ;+geu(I2eJ=tUD$l^E^zAklFy;6mmehSU$F1AMT-ZaRK#1Kv^5Prw>^v~#9=lI%L=1P{3rU7(8>T60S701d&?Kfu9rj$MMTo{x{&Pj`Ge zdmb9+N%jk`G)4u8%Sm47&{tYoYnn#z^3hju1^Mr?*qGJwZ6n%h*w`TsY`HN((DmCQ zlbq9{am+iR9v=f=i6wJ!$ddQ6g=+cdMn}GDVMyann4|Ef_`yPR_Cl~(bY{tyu7D6) z7A!@0R_V@}3UBqf8aAelcANaHl8g+8qQpoLHj5PagKa~hMUgGEDO+bb8Z>+_ix5bj zYG~dW^(C1vWNx)@fGb=X{*}?U^oSk!fhnHl;m3o`=;c)oq~{5NX)ETUEXw|Jpd<(QR!dB5p&s9fg5tk0z0{Pfl= z^pdD7>4n&2x6rYM`J6s! zlNX@#$45t?4hx_t_RvO})5Za2XDfKESRJt~cP?l%8ac7mO^Px=j4BFVT7e%pZKwpz zvT$t`ip5w>_xC*nK=72q32e#DHFC@gC4nNf&|f<}z#$s^I`Zk!sgkbaS-owbTr9h9 z!Q4p*ztH4$B!aL|IN0n1b@Rwg9brMob%xCC0bw&DtcBK+0<4A6sq#HeHj5G{DdNM6 zd-jDib+4env5nQZF~EVaVBM*Yu+Z8#PV44a)1mX;2A2e10BgTM4!XgK{wm88GsLU? zz`pWmZs29lp-70a=FQO7jnSi#oo&d;OOlQToNdh`nhA>4E0mBTT#sYRY%*yBW8Tdh zH7))`dR=U!P}xZ|%yoOO(r+I#={@*Nc$Du`qz7mS>!Jt7KJh>w5@AXyhR>gP;!#&r z3{SFCxO^aVT)>lq3^-!bPnRNhAG9yyXi~Q;^z= zT!a}9EkB5);jcH-<(N;KZO|TvuW+7}Gxy4{J?r!>NT29EQvP9T$lBXubC72iIl|7{ z5z&z}Ac6Wq2BKPZaX&gvq17?-+_;pEZT`XeM>=pcdu8HLwX%Ff*o1xK)`k04;gvw7 zTc&+ErU0YI7%+Mq^NzrMi(FC2dN;qd zKajw~scAG&mB=#cKBfnM2UL0=WN`&7`GTLV`d-LwtWfSTc!?dQ#jhpX^K#ou)8j)E zwiZk70qmQ)FlLF@Pb-bI4L>5N`JHQnA!Ksxg3$-y@wP`J6tNCI$3h_T(o}Z~laq?~ z#3Sd;>%(y}^Dk>YsZPp9F0mD){3BPWZ0b4Z#;!9dYaPp9_Y|n9)ZX-lpw2Kmg~v-H z&E&6PcGSAZhp4}JDticqEu&6g*kZ&FhAl=n%=@d^=dSJzw-54_eF*8$P4^{=K@6uC=bV^}o02&&SAr!i*rCKu-CKt^K2Z3Bm=O z^zYjFx7+E@ib{_EPDvF6#5~?@5>B>1)Ko$4nB-kM|H|%5PuuE$-gp0o3oIx-(p7;wqyS0+B6#WHhK*G*-CRu7=tQ{Ll!tG?&ho#(tVmQFA<& z=U#%aTMm2G;qMuf*o&9S6)KJMME@m!oJD*_sZ37AD`(Kg(HA^W88UL+i-H@Thmu|Og^x<1OQ~DOO zYaR9TL#9po+867Nn>ZEY5kA)kt9|zvqEwoYr^x($&$XQKmAvnYm!Kcpod-tzDqd=V zzAIkhFklY|<(MO2Av2!>syPX>&tDdz7VO@vMKKv2Mr&CNqSB9lJ%sbIV?-%csvT zRalmHlE`rO27<&v-k$%e?mS=jf`e4_<}5`nB^Va{kRUCg-MWKUIVwQHN^FJ@EZTdT z^H!h5Cvd>^vawE_i7Kx6NwIa`rj!00MF-Q={afG1vT!_6Ym;K_Y%VN@`>6}~oSrLj zE9?pP`=O{D;6B47LCgP;I7px&mvE~}0f^}p1Brbj@C0{L8D+WqACeZ!qeVTL0|`=n zWiXDqN~S9oGgQ@v9hGhrGf#@bHavYux3q^QFX*++FwhA49XU>}|aJPWh}eZ7w&EFm1?OB;yUrEXrHm2K!C*#T`1NnzW0(~8b;2Kh7}6QRj=p5-Wv(EMTCyQXljbI2C8La zvn-nMFGkZJVa_m#iK_RC1lsxm&DwkLUUJXw`CiP1jZJN?OXUs0_wjAgakjFjF5`|< zou+tacPeG|>C5+36-B25r#p81t|w!Lli`jXk&StsRb{so*E71u*VeoHk~>{5`;$=n z*1UI$O;FY48)^k6lFc1;);CX&6)?Z6c!NyvKAclJzcBF^^+xwg51x~MVx{IHv7r9+Tc8SJXFmx0_BesP-d$@OzbvVAG_dQbI8>7Zwr{1icb&3j33Hxna zVv2T101MlXeY%X&Rxh7E$I)@2LE;x z&RO2m(dkfz3|cBm*d{{l7K25CHKcOq`wJ zRjL|>0^?e+Lw0Qsv-XmrW_YRT`gYM3TiG9)3GKnPF)$!4lBrk<%e@acj#q_}n*pE+ zXDdxZ4e}`VjRe9PwvC7dqK3aJSPPCIcE!R7uS@uh>;sw#z?oFnRCs$6*P`nklPaYU z*M=!-Q4+CwVgej=9eNoU^m3k&HZrg`B&kU$@(gyTLXW>vYw}4Bf3q)?v5&#OI#SD= zY=zOVY$b(G=G2)L2m88>{@R^Q8z+QNrpIGGC%ngFqSnzcq(wR9#4>td7DfEJikvR| zoaqymoB#}6jf0Bf=U#@~;PpeBW+u?(5&Yie>EI==q~7}by}ZRPk&+1viPv(947s7h z@lU}cWov^qkST-fngXlAd(wg)1`-cV@&9_vs4G3#uOw{L=o*F1=N=Z** z?;L_+3Pp8m8~tVMP_Z zV>kCd@1|MHptC!lHYsm3x3XeiO65{+*;Jq6=$vH5VvpNmkt$h6PtSM3C%!_ot6&po z+C((oNcCtL7<{RKO8DSJ?YZ=+5Y0QNtY9q2U>JECkF2on%gyJJ#5B(~c~Y>Wh-tKB zx1LEjd*-Ap5xzwxB+fz=+a*{oy~VdR$S74z;~SkI+^K8FH;5^h62Gk4#hE%m-Wv=q zy-+q(1B8L>jxboK@!OAvkyG)=wvNOMLXW24YRMiwlL$})(oihOWEgq+&$T|BK+3_W znA>M zbfBVHMI`HG5v5Uw2UgLv9y+oz{@hwBr_VrokA}Z4)UZEyitK6jgic(pbpfRBJ-6Yk zabD+U+FsD8+)(v6H$%?gF0NvC7JRS}sd2EV*f9YlfFeCyJ6y32O^zsH2)%g#|Rq!i8!glvL z1yVYHQI(@jAyw}SDF3c;;evInv2i2)<_~Tbh#wHndSnL>wLH|&hK@WkYl9HZYU3XO zKQ}_pOiJLs)8J)bWIR4q+7zN*lv}U3f8C^ z5TowN_-DB&VhzJ!pxkk7*tYvldJH79kElpzAEo1`V;z@4wXTfcL*w}=M*pcEhxvFX zR;TgQ6q7-cdqC3y&QZ-Zl|aple7u&US(cA+>pDooe9d_2j=|%7`S^ORcZ6Q0u8#@& zVgfg2be#O@qa2@w1_oum-4jVg*N9PR-Qy_Iiq6eOed(yt7{B$XQNP)auFclQonmgw z9>mT~$azNBW_M#=F}LysyYeUcb53Pv{4+CMn_5p}Xpd?qxl#4k3QzUtX$2IrCL1Te zG@_}da4^^-U!M_5wIXXB^%|8-P!RKKccC((mP|dM~oASyV9yjR%h5Bn)hz&lJy2*ilx18+x9>>>UT0Ac-ahl-!4Xkz2oIL$z$x1}GAL{lshK5}Ot$cOP3r(p*!mtwD&=p}osaMBx?Uy06$fL`WOU?!r46 zYz5wBq(yw{d2F^0WfeP~T&OkwT=~R7-r@d6|9;|HI-^Q&1*=n#hp_?jF!;z9$=+KE zD`EsO#2YZthZ`_G@i%BJ@Ha3S6V^UNA5=Qd&-ABBDLNONcqWe?^hvYq;GK+fC`ORN zp1+Z?VM@{FI~l7}de3z(I7`4&ejoLbX8?~|BKabDEzq{dtPn9_?tRMlA7%1?&_qvWMTkC*s!*}B; z6p)ku{MYt^;@$KSdn&Cu<|sIf?;poMDaMiJIF8S}`?Y*f;1>_}1B8TXaEi-bas=tc zppa@CI2{qj)i95drp{GX9+w^#cbJRwJeAu9C9w0QR(YQat}2CiUiS0L@K94FDez?2 zl79Up2g6~!4jkMHK4r|dQyZ?gHU>>`y}O{=Nn|{KvXh8+rdDQ^8GycUb@Kkm{2Fni zE_>hn;d-T<^Nl=(z&o!8quGu~*HbYszwcy7LrbYMSXJ9!j(S$q&JkYN*mJ{>e)OaF z!Z@e6I!B$0bbt3h0<}MriT@)&?T#S)eNh<4f2Sx6a_4UKJCy-^=obKi{APImS5)R_ z8P=Z)i#Ry`J9SuqqWxk*e+Z_8`~-ghUi}r5(R#0LWnifH?>vq3zf-Hm`I{o~kL-%` zm#07HU$qEG0nKf7-Q3@ z>T*1p@iJiE)%oHi!{YqdReGXs)u{`jsBZC5Jt_aZ_|~((f4ok-nQ`3OGViRoDIj|I z@rju$1+Qa6tEwnnEu1=5{V`wD%w>Rf-X1@%^CiDpVuRBetnEn9CSy}m z@1mu0|G74>s({>J~Bh1H1Y@r)93=Ypk zlOya5wF-$;d^-47Ri1fSEbOcjh_~F=TE=?ya^g({i{6=&XI;_PRb!e*mF;$+1zFE} zV5`QFZr_k%R*2PKVELQRd^mq-d@MA{rTz#-3~7eKaIuP)7tvYR@xJtV0MP>`rT*9= zq@F#@;;(HVOr1+i5Z$8E*b$Yo9nJM{1fS2-myl@i)9}EoE$u#DLl>;L5nZd|oF&*I zdDyd4XBiUo?d9hu@u~NykI-}$Kju8d#g8uifDZH_p~+|6Y??%179*H3oao?J?V6q=p|H({olg2Ede_vp!aly{l_22d@L(YCgcS3?wi z7?PI5d3|V-<}1R_Dd1D$th(&2q74j=nLRrAbu;&H!f1+ArKm#G(UG}Ql{1JpKEMn{ z^7>Mt2QhJPtVdaz8CjcsVd?6%h6%K3E6I;F4VQdPIb8fGE}EeWO79i;3SHZ^y*+ae zQ`<5OZ4tB3EmK`DBE!4p)K$MT#=i&aE!dtC!>(8}7j5E!jxU`ifmfJ(lz zW+vhh{!W;DuLJf4({Q^7UMHd9Vi|93HbVMiaV9r>59l5YiGUMIm{_i^(n{_wC?j~V zL7Chb;K2rEnjKt@qKf5vh}Sd#@1e2wmU$}WF`i0Y;5>L|sE7`?uw%FormDvyeb%i~ z3I%gAyi8L8DW*CDf3I76mMjyEjK~c%7Ldv`G`V^75(#B)V?Ir5$D(+?9UTGr*)bJy z>k`}Z)lW^8hh!%+szYpNrK8^nHs@f)PkKFDLZVOg-+fb#iBxA6M@2^^nZr$NOqzb8 zv!zzJbUE9;zxVP4pVk8td+^Gtu8vsb{Vm4lev`eB{v#_2?8fiX{2x6}rCj-k^s|)4 zjR}pVOLr@~Zb~W{JCr``;9*o^%~k~5OFEfFfw-L#mv4xiKbhLnGM5RO4KDIwsD9_7 zl>2no80#{{${82-RU^~&9I<2fG@`qVs!075!gpWPDE-hgs-iJ2-JPvS6cMZN%BW6W}-Ve&(R}gm65xr^CmR$Fu}m7^iliN=G-gS+76R zw)6{0d_M&}77Ts~OTucGX`ILE0~a%u5U9uNN7F{vUU58CTV|xBU|WDh*O1AV^4emm(ps0O@AY-5_0p0@B@~bazTB z-Q6uE-5vf1?!C{m_c>>u=kvdx^Xh)FSaa1}V@~EAYmRGNzw7%6CB_$^^is%s?5V@r zHo}%&VkXk}qBgFX+t>8mts>y%q5Kp$Sgfy!M+G;ww%9!@$dS~*v=LqiG3*KqxTK4v(4^zy~7?;|oopL!( zn*+b;RoA;caab}ibR2srKJi(~Q*di7X!XreI^gBtMnt=xpqHb0k3IO=HxeT@tQnQW*UzVYUN_XL zhiBBO3Nu8W-0OkxBD+iyMc{h$v=k>8xK+@>$LSD|;L-Wy`D1~`lYz#!iYb_x`#r?*ZK4~mH&oWUTmDSh zN}B)*m2D9;_^juT}?(R_|u*U?klE#b5?#?o7V*}aX1P}E2Y%k26JF749yy>RRh z=!~j9;lDs_d&)s=*z}r_EP7f*c!Z1W)J9a2xrU>SsRAL~!LFR_WfvV;__~3oDD%jm zH=#pl#)suY>w>H}t|IPz9qaV~U0u>(RR;Q*NJ#G~Irh;eId(aJSF5=Uix)i?rC|>< zGkSHqIad~^ZOCWLdmX*C`t<;b_Ia%5et&)>imLFMa1~X&iC(;69cRJ`kYqT+Ahw|s z2chD`pO^Lg-4uB|Qt*i9?XNkB7BT)r)r+!Os>i zv$pWP=wO_8PYLlvu`Ui7$ZC}7Fp~F301x-Y#tsf>E|~1zT1nh4M_nKBFXWV^#$VwY zT)Vj*nCGz4-zap3GK#N#j=jP#8M8tk@A)7gP+`#y+ps{p`JJ6$?BP>+d9o~1iTCDG zA9IunO5u=Su6Dcse7LKC&l-<(0|3lAOr{WSayQzr)W0n-#} z1H9?;=OsruAoFknWgsfqZ56F-m7p1y4?bs!pcy<9ZTlf-DV`;Y)-BUH>-nl_&{LoRSVvq4s)vdC;5Ey%Gh3*Q z(<}+=Aqs)nay-Dd+U-u#5A^HcrL@gCC24#K?nCgf6;(T@Lr=jttzWjtt9JSlosR215AU<24^Yibhv%yE~EtsvkAcC_XXYT2MIPRJ?}Z7#-O7 z(P-(sO3e)@CvD83>F>B9S4={;uBPb+2u#I;hYP`}nE~any9#X=qmH@X-MVGu+NNMU zRTTMl(QmCu8^yn)*VpnV_quu5UCnXYb~v8RqsdT(we9R@pH)qib8AJl9-QrI?l^yJ zI=Eh}>+I0+*+totIAP6QZ?T-4YGt+8N+kltcTrqD}s@_6wMFG1#2|4tk}%S1252k7Xr%C z^U{RPzp&>9L_7`+unlRZk>H38s?MP8u5}^!+BI*?PERIJwn11J7isIDh2e9C3wg5a z4?=#s()`Mt_TZ90zFhM?=(Mr4`=85Ea1{m)@cXYM*5R0ZNfgnyV;YD9Rrv-78{rlE z8pJ7MkmWwsEFQzS_G+9Fr=zgk5Q40OKtIUaQKsPH7?bPor1C`UkmYP>gGc8hcH69j zHBxzV22AUDK7G?7t@kBRaIYr3@}3htUY7&cd9CkNmhVJ}Tf;jOAt!#5q&^3-VCDN{ zEi6YYR5SeAz6Sf=Sq2348LE$ZGIAK3-u7yEY~_58*H2*@D@EvoF*T+X5oHw@)G@6J zjLWhSJ{}+tNg+RapIeI*?rc|0Cf3D37Te|FZFDNxkzmwGWwKPq=a%nG87~HT+q(}r zq)quMc5RX(-hT+OrA-lEBakOz<@1p_FXxNwWzE7!3>h1UOB3y9?c&o5=%aYn&!-1A zqP;}@0QA;|AHchC2jUXujmOQz+UJ{DH!_VN?v1beDV@DuYqi8QF@*C$6n{#Qdt!GL zzV>MC;3soVQce?4B^UHPFC%ll?u@QU6t?APz9Hjg?S&UU{BgAYais(1EMUca^9sDM zntk`sQz5+mlD0N`jWhcC9nHm&xSw6$RWJV80`jC(BA>;qtpvB34XVChqX^fNO&Y;E0$^17uiJh~h9#jvMGuc|1|0Q3Z>%U_f z;{>tke*{eZA-iz`BiVm4joCXv?QKnrjQ*+2kn7KOqyLA!bZ3RS+athQ2Z};}34xq{ zIHCS#FIieat*t=fmBHQa`s;4`@6NJ&B8nit`NjB8zq5hV8HxvtQ^S2@&y>*xN0Tf|H9_s;1b@3c z->7XstO`zJHITP%{3^#wmRobrXBg2NE&F1TUM|iO>Xu%rAmO67hNwtL!29HTw&qLr z3S7M#_ulKRqYbC??Ne+`3!JZg_hGvDRA3zo@!@A!b4S;lqh#&+q zJJr2YL!X`{EG@Kjv^GR=rV1TIyE0laIFm%B9#v&G076WJG+C^e{?cRa-AmhAg6cLd zDmwV|i}UW&!mPyUuV_W1u5&g&cT9Jq-I4ofXPtS4wd$M~o*;Zg()XiSP*^-A7;7+s z3*|vO9p$P)kVrEb`;hXEZ{{*jU+HwL=bGp$Dt?}yj5f_xdOV~>b$YD6`ziiTGLK=t zil^H-URd{XwqLQJ5cT;?cB)s%<7Z#gGaNH#vZ2I{Q)i23{NsWP0ykH%Q;gioPYzds zo2~I{xVsF&E&t*|+1_p)5rfIz?X7$&>}-10bEL@!{Z!nM$lA-8w+OtL7Hc|wN@!?< zZ1UI{u^50dz!zo^$ga$ zHZ6NL?AibP;fHa`hXJQgC9HOp9+@}><`^8NXoK0Wm+1UYH^?oWTNNWA!4+zjlvS;` zU~Fd)|Cp`^#!w~8mo)}<6!^q_4Pbb62wtG}j54J^M(L?|+0UZ?vIM2yK-E`?VuVE{ zCLZh`V!EENb^V>NK!acrNfv&?d?jczi#0_lgbYnbqYR#;br||=p!Gi2?ezg#5$u=g z{cTFaL-tW1XD4Vz2*32 zJ5vjsQ5;9CPFyKXe2n`E%R8W`WjTg+26P_B_n2iTCFzMW<)Kc~jIUEux}Kr5!OZ3& z9PB|MwAQ%x)Mu={3HnTu%lSP`-?%{T=+)Ell-a6KY&nLOFWGh~v$poGi0l1!lYSf# zRf{7YPs|s8#A;)IalL>3_`>O}c`*V!pB*j(w>Aw_-xtvNtMFwkTfUlQFOY0BWERU7TNLmQeOcQ1e#xt-~y)P_2OOIM;Ql3r(NIBifRG znz|mjMLaQocni^eg5%8V0H=2Gc@yQKU|`QDXb~@tYS%IiW7>5P!XouvNE+mQ$}&>K zThxNEVWjDkgNiwLo_f{Ky+x$)*?l$AGre9p-bM@zs@z#6Q>@WM7CD(~e&M(Q?}BFH z2R2u#AYF$; z>9%cYes1j?LAUJCCA!1Jn|G};fmZ+F1HfyB21d8f`e?SlP0zcFx5LUWM)e)kmpXx6 z4%KVvwc6zwo}{mwJtv(bJids>xPsAAJgw<&OI{v=);CSSZOaF4&lYA zZp7BRWmDA&_1-UwD@d>I6JH`b9t#&-X|rses6B9^$zD*vWsCXYwiZw1Vs#~%IV+$o zW)gyakzCR%5OkxacQuJ$VU2P2CYM*Nm}LFJ)FF9{P!suSx*2KK7wPxr6CZPSdGa~G z;0jf370hp{`I~^r@0qt`d3F81!A0dR>1M$;^D8L4^+cwu2}O1V!JH~!1djvG4=KXh z4`&W7uJv0Q9&0;fzn>s^McBIH{4AWoVM6s(LC2L3HDk>NBl9FU^#P`1w2*fCk zr^{O0IeZozlsxOhJsJ(ME}cs^m4Zd*;5rW>Y@4`3RA8t*KJYcDR?;u7LDDa$5!{m| zI8j=Wn)*|+IOkJ7vkJBeA0O&gw-A+N1F8;d1%j-rU3r>B7kyenm%F#|_xO4dOmV7r zJi;-8~PmRmQ9Ipgt!(y!!I#I(SgX5xaVK zSLzbqY;-uj?@#xD)=CPmhpc=Px6K@93)z^GKikq>9M-)LVAzzo!c7Cd)gV)rFs9EDt={CrEV-MzM!_l||L`|~B`U@C{aW_}^frkoBeAqt(d{BakwoE_T2mef$x20FKlaLqtXaiW?qhO_RbvI+tVyk&Myggv@7MKqN0xOjsQB z#0T3{4=?>iD`nNkF5yDn#T<;`9J6=PKL7C+Dds0X^^doy5kKp^Z;L(=A|$VN5IuBx zd&DuePV=L;6;E-nc5Xm!u=ZUYj{R;NWAP_tycR3D!T5K)IQ9Z3nh$wW56d6f8!m?C zeR{=z=`)Onb)osvQv~70c7PFkkdZF)5DVc7_2h_3!IqD&8WMP0NpV=#^qS1`nRC61 zahZY4$FN;$LQ2ojr%l#)j5Qq_ej@^bsgS_~?E7MPJ%^4zvc4=RrjVkvr#=nIT* z8BJ$XB`cZv7+YPv$&VeVxDjDmnEh2j*1jEzZh{_0`4gXH`vIxa#QkY}N2>UQ-=(KTAo_GOav@i~Ag_Ht-{p zI7X|4bmUkLJ>Q>`O+kdw$!+u)Zt_6`jOh;pcf-+^K}o`uVXKZ4w0gF!W)qT;*pwL#VGiyN*L1|gwpVU&kK9F+d|9U+MOX!72FMPS*~9{p0Yh>IWSn= zKX2u)#_L+@ZN9PPvg-vUex+**lzxoxXWdI+%)VmHvAW*1)YD9&h}MyfkHXEDdClP0 zl=j49b@X`2^o3J&@dk^4^1_RzdNNH9qd85~*`Edu+#fmpLd_6}`m3!2cGn+V@2n`} z4zV&frPG`p9yw1EEB;i{bwLx|fa|nR_si;>ZlA%8-(VJWgl0Us)G(Y7?x?6|QGfN=b=wMzJn=38w-6alh4+s};7ykGVXDNYME=8TDCNBoz%=C}nGiF!d z%=8Mbae3x)@^U;14Y{6L)9&N@Bc@HKNnW!ucxYI*VJ0Ffe6|uw|OY**Lh}kugWb4X-KC^bd2WC3UHt}?Qjfdke zqaziYFj&EyXM?j}j?&#?WdA6mFzOIFXN&1*u|VfXO4XD6K7)^x!No#H^%a{F)7g-> z`5vePUEdE**XHhvR=&LJ>r%uAK0={#8qjjhk6Q#^X#1F*_T=VjUO^UWUiHq`^oXPy z>{nGjM1Mhb4|s~$zeedk_?2ZbiUEn=mP2b{5Rpe##h?~k$7+)e$i!7^cwSvABO5nI zn&uHG&%hMx^m7rj!&Ng{m%WF9z~FUUjQn8U=1MN@htf-`_}eot75@kpS#uHcp-UtQIGwS&Lxl6gQoi;i89XGWQye{>d}qCMhK-;%@ZV)aY5)rg`^3b@Q z3XZv`guyfzWtIvZTzkR3MDrqr1kO$Dfe@5ANUr@$H1y-EOrsr8vlELGQ zlo07SZGvy)J#26IiISNP?CrlrO-h3h!f*F_FtSv9-+W~uN|cR84^Qy%F^K!n#iGj) zZ@Eb-XAVXkeIrBhV)`OE+39w8J&)zVhA^vFUV>4WW5d+QP@8$x$1CLP3qb_-1j>J_ z68@|6>VJny_)D|-zo>+FLgIfxB?P9o-&MkYluUB|ir)Hrl~7;T9;#<=YxmC(O71@^ zP5*OAj)Utioeg-p{!}r^0jfBEHS_P)FMS<*9jK%3U(_#7u75p3{wIZ{oWO_2{hLY% zP?W!`giLo%IMB?$X_CFI11NSi*Kz){9LLG^ufq2Ks6i}u2FAbcBTm-egWUe6L6-mi z-v$)IKUXRLM}?4yiT$4|Hv`B!a6m9xj**WXf$KedpD&q1tw^$@J=ax@xG*Y|D#Ap|M0Bo|WMw<(%rwnJYc$O?)?3U3Zn6Z*x=Y zC6{y^^*BK=8W9La)AG2v8d{{T7fi_OJKqdxa)a)wKc9L7g z5ZWU@YV}#EL-!Zes_*L$#^YdXhk4WqpP`J(TBB%dV}J_A4c*@=7@revqqLXq%RezL zb;=C>n!v=Y@(SwPA@D$HN1mgC-$DQ<=mCqg_kAA=909%eTgc|Ybo7?g+(r-QV4Ya~ zqKFpE-g}mxyu+vP&ebgYFwI~|sj~Gxdb!Gv-&t%H6RjTCPx&*l6{mV0_OMQ`Z~g{$ z*1IVV63wZ`XcyAC<`7zJ^*NiXN>29f#@a88rgcQyw1xFn?d&A7p4%lWf%`K8$zQ5p ze3I^H$0djl8Pt1zSnE_$sd(_oJb!(O_q1!dUiJO@tMVrUPnb$A8cYJ%f5o=u3G&^* zKVQ9A9+@DyZkz1sNc9S$AxQ|_Q~uD?0ZqB}C-D+IZ1kJ_DfO0n(c^r|@tSur#R~H$ zfOZO|HeOA(Blh@z4TdF5z_3`1#DB6+fJjq(W8m`&ZK6QW4BgPD?{w%0f37N}-D(J4 z1TJ(hHdIjSQ(Mz$ObIvPX_ELWOU~Lxaq=yA};DkjE`O_4A%1|x9^X$IgEI+ z_mRK8=-%!zbVvo&awTqo3~uiC(5u6DtJz=lWK8fH{!mFu_%gCtX;R1C6&1i%gfa;E zf@p1Nu+RzjbGBFIK9HNU1Hp}`(laxZ)9r#r z4*w2Ld8<$Mskq-KUaoN3wUw$blyx-^k&iB>oZVY^e2D0mIQQ>h31?Ej!xGY7&EFrp zw+eWkMEyowGvDHazoBxJbtOSykcy_P*Q!Q73#AfDYqh=b9JYN7XMQUGD%`*%VTlvL z&#&$!_8UJm+#`Brv-6o0iPUJUhQ5lZ0{87rs0pZj;dBA5g_q;Zq{yS>YG(--Y6MAd479Ml$rY>cTDj1&;oRS4;e+KG(`svIPdt1NNV zCQ!GA0_>*ZV*=(#mzu3?&J`7s-ni!mU^A=QkY&+GuVV$!yTN;9KCODF(pmOhcoav= zhRo212^0(W1Ypam+VE(Y5vK~bO+6NG;}-pdW0WkZnDkaL?faA8qI}6fl&_I6IL(sX z-q@i19*s;Zy}rZ6JE^+;c^WrJJd19ct{%4`cNbFAYO}4u+IJ+I-SSp?lQvXh9Paf9 ziuTus>ad6$(R|pIMXPDUl^8sW1PZHViv-OPID8<1hF%zFK$y&2$Eu4}7Fk{INes-v z>&eGvdemcQ%@J0+F_|U`-Qy*obi@Rdj?6toP+T7t9#L*v2G~%Lw_U-0m$xmcKGq5Z zteC1VBT8T9U$7k{RImqNFXVq3lp*IFL1h{r4=iO*WN5$4vwK4x=|c$;<+?yhI*S)g zL>I=lL&LD;cP=403Imwfo7_T3{+qo7iAgg4|?(i#4fLY-!CAK-{z$nwBa+?3`5aYDu+1S!6}-{#COMuh>Xfc z05M_I29){5z=EPN>DUgcE|$vhGJs_$Md{B3$zT+rtbiWqJvU^NrT%{X{TBDj@(vP^ zX(u|QrGDW8-?MV<1nVw!cprA|)$`k|d-j4jKOJFjG+#`>T?T}@-aBSWm2)riY6LUw za4t@()N@jBJOqm#u*vvquy8K-H;(Qdvo|-u@x)&Wz$SxecDT#Oi$7n!2&HU5{t=2j z*l}~L`NC7`MaS}v9>Q@#-cLO^m-jwZ&v{_wpp!z7(Y5qk*Sc&LG8{)&GG7GHIa&DUC^%u8(2F#|T4^ zTfPZ$%YTC0@+gp7{s!chpMc!*2(w8LLf>^SlNNbYCj+H?0>`j8I-GOm=fMNTl^Yt`* z0s-z4feua|1W?}WBn0*Z)N5Um4TkwDnm)KS8uCUCU<*g<$K3|S>=38AJ)~XIlj&nR zUzE>T&lON#L;IGUvWZCqxN@4C=p_Vz*^18Me@DJ#fk@in<}@TD*pv8u5a`b#Fci?B z>KZ+39=6<#p)h7e?pe0vZ)XCB@Z*G6-`*{J-_O^_$7BBmeP!xnV#uMg_wNF?4RGsb zOnpY#a)0nl~~(vH;vxq>ri3 zh!$8B@z2+nhA$FUFo&IKuB;?^1{j(o*Y}1ma_s?EfOvy%U|l|y4sZn;3+z*%&H|2+ z_R@$oP#!8@XD@rL-dpEk020vJNP@Vh+Dm6$vu(Jc?(;_Xe?H@|f>P{&^}si|dVE>8 zyGfwm#693kW>4CfHV3>MY-M?h>(v0P-F;UMO1+0dY%yY<(QY~Onfc@Cdo{|9_3?0M z{gK^|gvu-n@CC1wUXKNPAu6$v4K~qmqR-*TE9!}ejHxiovMWIpgK_9n6oc{O3u|&x zow_C;i#xN3J^g?Z9~i}FrUghcUYnujg=YSeuk~UfSAAE$ zh*uP`BC{;L5=1EwhK4^+S12?uZaAHW<~S$dqiLz`W)qFFfsZ0m(hy*1Mrz*^w>weaxSC$Q{994V`Li9^P(q|tkh#ys@9TG36F#l z)YC>YXzZKmWliL~#HI3tkhZa+DHWO97!F=U=H=+d*052ZzciIAPeynPj*Fj3Aiq!{ zVRRN=vcc(-IBI!`Mueejv%;#f-)P2Gf65+K@_0+PaMJZy|TxoYi7Oa;ecSM#lup-pr zLi2`qMr$9hQ0=W)W-2NBMv0m#IY~Aq()5^|k6TX>$y8(RDZYJrGG&7h{Is$PN((`xj+= zJs|Un<@}L)IHW&8A4Z-$@(8mFChs)>HnVsUg@Fn}{X=`R{s4W`XB6=QaL?ko@dEGq zmsrrhc!U0>0Q4_OKVtNzSRuV-1y^atsdrnU*L{JE*%);w1q@J!7QNR4Z<|n8XX2>G znrIjHx~t_H#ocB3E{O8;U?ZftsDWM;d3cVnRL!d|yk>T!=nlYs zs%S$-NhAH4;F^WB z!Z3qk1YENef@>B`aLv+F39ebjz%`2t=*@Be(VLGZ7Tr^{BBR^_K;wpu0Ob=<(K;^- z0aru;R%(in@kIYzaIY|)Smfg3hIL|SMt-t}|86|djDgrvYb;R@&~tBIHgMAcoOHg6 zT|(Tt%9|6zGmvz@b&^H98Vu+nk)!?YD|E}jZk56Db3~elWiga{Wo2oDa?q#nzH^-z$0L;A1Fn%d8&ArO@gs11+S=SSJ)veDVE6J5{ zVe@^MAwDBiN$WGb@4;rKv{zRwkKzw69T*(O(EK{8ZrL`JBxz^_xb#py&kJAm5vU~O?D=?nm4 z+?-P~@S8}U=wm28S{}RVrv3FJ5pZy2pYN6{ZR#V;zPE>j6c1P$ zSm2|c`*PVE!D$UuWhaOs2ce!&?)Vjf)$4)%t0syuhsJ-Wo3Z_?P3eD$ZuWo23UL4H zw*OBA7>?gPS|F0`AG#UGok#0Gxa)wE?ca)2+<(?z{vUKR5H<6ynRN&daI2@iz$Qor(vwFwpsnwg_~yKkughq?@sFar`q-;7@gtwxRsdPD7$7})Z$%KL5f}r_I$9A6*g!M+^rR9(g-kNvQ&+DU1 zKopqpBk^>Ih5kJ98j}o){o!8q!1a7pCouLDDJ3=4EZR%4il<8ZncH(_4Y$J6*pPLF z5Noq!?$%eQa0^>WpY~35f=>=wT0-~udu`zB+|Lmx6?aS-1mY|l+pFH~EFCV5wCtVD z#RzH$TpxWsr*|nAE7|b4*sn&8I?q4^r3H9%x~F3L2AH!lcQrS{3}7yAhAb+RIMyWgm!W)6%U4tL+Uo+nMP zUR|98bu`KBGcRd76W-}N&I_qh7D2Y=dfT5v35ktP%;GIh#MEuK5pTc0(bpt#)l70U zS&q3Ac(^A{rOcpxeSuXyrmmA|)2rD&2NxWo9L2+%_a-ce(Kq>vYTItQzjabrJurTH zbW+Nzbce{^FsG`}oDt&YF8UtB`n| z4tLINqQC+GB(OE7ElR9D`k;fg!GBt^g`FpPWI~5LUNT`w#Zm6#ZVGcz1rv1ThTLdA zVpaYQS3I>i?z65@}!@`bmMfI2SEJ5Fj zt$!gg2dbT#Kg||aTjC@sTA#fgT>pi{MD=pR%tPy*ijtv8IvR&GL|M>nw(*0M`9Dc_e{w6X$6+nmDX52dqh0N+qXI4EoyU zl^>JeVzP|vyfj`-l++n(W~G2iI0`gDN@NR5Fl z)o=V_mpOirO?NS!P3eK4xk53Xs?iS7H5mLx`YCf*c;wOPRtB#xrg*wdVVh3znXs&l z7az~>z3F^avnTX8T0Pv(k@TZGGS+6~2dx%fJf%H$M9FCS8mHg=yUvAmc9Z{XHv%wwyh6(YQ z!j7-GtTmp5L<>g-|Dvn`nTIWG?s*z41QS(T8&;gnize->n>ZG#b~^wlC}2v>XRAAk zuvLa(Nm;$aL_N*?m=zkp*rSQvmqZ2KtfNe@nEwP=_DWQ2ycP1bXR1Y-=x;E&F0bjX9A~S9JI#SjPHI zIem;5pRhi`^V37dJ_ictM}DP?E|&fo(0Ul)o$~6o>d|po2PeXf)Js9d!HLTnv6qab z9=YC)3FluP@|c`CgFlNN2tas3cyt_b7)$*l|D7w2{qTwVL!OO8=ZBZ3i>``;k~yke zhwKH*$6246K6!f>jvm2rY{;7=2aIX9`Dzs6Tc>l!x6?NqJyr`5RBqLrv26*EILKVx ze?9-kVTVZp?&6SzYx`aBYeLKj6TP6x2g6D5;+dW1;=}B{Lbl~5{1NO}ypi@+ zT)$~MhXq658=?BaIM}LsZTjQJeOmhCD$LH9Jl6SB?X zG7_+{Y|Hg&1W56ASZwerCEt|1i1xv_)F`awLm~{2T3_G{)O>OVXUkpgVi59sBMk+< zk)Elt-JKGcIR3IX8+v-AW9!Y{R{b#_OjwZv*MPXg3dEhK|IjBNPga9t{_aFbFiryH z@NsXNX|qD6Y4ZHRFqqAY2m|#~fN@f?Wo3Y|DJez5JlwN{DLkkZ@R^YCL%%AKR7wTz zhXJRc??>k-?mkwa?5J5S#@C*BARr_iJEVE}NJf0e=NpJpC*Z4lq-2T|8=<@ZLrxBb zSo0y$Qf+2dTo{0!nPh3>d;K=D@t5*7L7FvBKDDh%apg5%9UxW>s`y;`W|LL>CFgqg zw{n6HA~w}T&*DrBL{a*PmYU6MoD>fw{eQs+u)f1Ky?-h*NdroG-#_yJ`vgS70V;vm z1&-piwkQsu~nJC?qE}4q90^ntVtXjs`xW&M?mst7V2!F zr+kZ>`^^j-l3Vz#)Z-fYpIMp}Y^7rjW5_L#7v`K( znzRYW1cvq7Vn(Z4wuyq5hKEGC`|?D2*?y|=4?_ykgDLIx5ZO-D?J~u6IUn{>`0W_S z)D=KRMwUXY7pu9hX@)gODuaCEAafoZ-Wn37RQJapCuvXM~ZaTs;jn5Bl5@VSzxsQH7e|XkZH+t>YtOHKL#E1sT2<^s6 zK2_#~;KPJ22}$_7$%O#J!|*uYoV56YR<`#QVCm5aMx+bBE)rj4Wr9*^7prQnNqQ3f zR>4@s*fZp40S;U_)gBYGDmqAc#E9<+KHzC`TR8m=5>D$yMOX{1zu|6N%#^?LRIaq9Gyqw2<+Udk=5r ze`LRVxOs6hDH02y>B*mASHhM;pFjNMg!izpf_=pKuqqsH=B0H!4yXvdc)QA zH0B8vLF=gUIIS8VRs5jL(G?e%9gvldwQsxEHA;-r6;wK8{n+l)yJ|zpR~3mLL=Q`d zDdG)`B+y!ZpB4#&Oa_8U2=cC{S+6O#Rd)Gj|1aNYp94|9H{JTccnWHZa zCf$0#Li{CZmb{>_!KPmv+Ti{PyT)ApVX9 zGPNhCBlN>dul~z&uC83WD1;W`FF{bJ8>v@czibjyF0wO5BvUAs$rM~#>UFpoLdBwv zo6$!{7XuL4JvBbGDZYOQ^aR_?xJsY08N6;Cb%OS z43g*MBjuRgTtSs-2phh8RN2VZ$Mv>l-!-Nd_|S{1!n$rW#c$d zOsZEr-><*@WOYaSzDdYe?AJP!d>*4uSka$;TuT2ko2z^InpoDEJoQSPZ)`@m@PyhmKSV9hw$54 zuo2MaE6fgi@N4uYmKW&ZPgz}PN8G^ADPq9K2?oc@hh(RlD-^=py0<@f8Gd44-!g8- zcV7KlrRraY{{KsqsyprAKRdj*|2uV{9L#s&SidS9x&ElRFJ#p+HOft8De(sZix$0>IGUtzQ55|1qn#GZA9OP{9ZjV zw|?)6w{q?}M_Z8VuHx!+eZ0Rcw#?A3C2)hNUO4V+@#RZ@97C#r;I;EYiyzUgx8VLN zt6PKFLSpJ76vatWzvN(Syv+^o*pS#%XG<556D0FX0&%3y@gK57ZeB#Q( z!qhAZ#3P}*&slSCL1)aj1luFbIQKtDhP%6OyW1>e7OGDhO(LFYbZ}a@RdO=6Gnj4b z1e(UCqK&W5Jf3Ql*uvJRcINwWR&$Db)}#SSESFlc%bPnfY#&6>9i2}SZ7DNQmRVZ% z7=%`d?pTU4_SCx>yf1S$v&DKcq2R2wE0lDYp z$-?n5Q@bJaznYA$FmcVbi~FR_*Ca?9D8sB^wP#13otH^9^}(u9^3O59>i9l7TJx@B zYXr@%h#JR4gWyx5J=)@IcVjrhZE1Yz_m-7+Ja>P`}MR*mJR-Nx!O~wi2jzvv(z^JE2d6%u3{ZpSZQ?O}L=D8*gMOai~1GKA8t2qukTTrdhx$Yp>b4I4r24vPc$e>D1gd z!=qk~W8G^fa@(8yVdawA*vJ#3xvZ$W;cO21d5by0WxjO!WqE}mm82Qw1V4dSp$|5W zaXj{&;`6I0A$$ybP}539Vo`y5;-q?S_{^QHNi{Hzvw7N3d%mLRA6(AqUtCV#Iy)3= z?I$Wl*eyGljgB^-+Log^5X~;JmQwGqobNd=qWa7si82TSL;COUW!p~5EZM!RS%sTP z%MVbO=#LjtCOL>nE?d3|N~E2-d_j-(wVR>O8H4GoT6F=TnzFUWVMq<>6DL|UD)380*CewZEgDZHpu+9!AFPDN6hmfEnLz?@oTkI)dO4C zBg$H7y0KX7bug4u2%q2`sPQGdwI9BZ*vEQ-bPbmSaCMKGKtegA7mdeDx==4VRauCY zk?dTD&Vitje*Ex6J4@c)yVdzw`krA!+?d`umms68WP+D$e(&L%+Ln~NSSgHCU?B%6 z+DLrz^=rUbH1No?mDP*pk0;@CzQ=EF9*7@80^z^0y5DPOwPPT*(mH}b`9rnAJLkyw zDC*Zh2vUl{%Ol9qboV%+lVM8xTjr^O=gWMffr*0yq@3lb7~|t+1?-7MrPF!ztzL`x zUXMDSQgR`Z_A&c&_%O7n*I9|y+-J5%fPPU8= zF1GWDAU3J?X=9#X{=ruDx=d=GZ6SH*$=-3aT&S}s0X6~yk_Mhza6`6Mnd z^ZB}6Nab$G5dkbM`WVsVK5^v0($e*mMjWwZN$H&YHSn}V08dMVs$HqmR=%#yl=1+X z({5y&OZEMMj~TBG6XJ|ik3@z9)TdmM_2^0_MxMx@P%Rvwa~^f089vlJSB*q5&3*s& zk|N;s76++Xv$$DeLZXzO{YZ2@@z#Lqbeq!!fi&nAie3aTUQy?I<%*G&29)fd|s#`st>|wXfd%3D1^Qg2rEb^ z!}ef%P@-4zgey{{sfZ2A3+R^R2}2~6{UtW?bkp-tIJ)v|D@Gn02EEEpW`9-~2>vrS zY^N`13oF&tBHxw|4qK>%;zsxMS3KTEdw}E-*ixL9gEF39iN2d;2Z?TXlk91# zA?qO%BCGp%|D0Nvh8z@*rid4fhH`MV`UFg&`UI(UpFbk-383L+9aa{^u)*gj6vHKL zWw?BpgdKp%b3!a32OL3qEmE4c`~azh2X$!xi<$N%wB@^JeOeK3W>0<2_1t#VAp z91UGO7|is2N@nk~4}A|m(6*%7#VTNOcb){vAn`4yuMv>ctx0pLneDHC& z#TX!vdf7TZG{DI8*(z{mEE6P2f|Caay(h=na5vJ=rTo6kN3a+NjHV{93IwA4*)|ndVde`9VFuI>9bMT&E?p3W z)`QsslZTJU)W+mR!~`}-N0&e=ScDm3k%2NIrj6obXX3k&ud4&j6*zFNh=6mY=YB;} zck-pNupGqkZm{0v0^dgd^YHRKVTI!O!1$&*Gqi*HN7Kf#)n(0ihcYmRp$^KZR25rDlf~!|slCfYxs;>vuDbbWFf3kAva3yK5lACVJG zD|^vz^4j`b{849N_@hp}dumUMYn^IL9#|HnAnk|W;{*r2kfilUD_=*&y@@+lhKqYr zxidwsXJ1Cftyn*cfilaJ7k9pr7@^mKZ-jw^WGWiPFAVn*Gg?US&Jr?0=aZukI@K8J zx`?I!f3}i$IdXJ9ar&U|?0H1rLP}}C)p`ssB8>CvkwY_!NRPD_Sg(YyS#Xp=K+Mv( zM$p||`zAq8uRBW&wVE$s%yMlx$@TN=Ut&&|OR{0Nhm`MCg2c~+9ms~?4s}4O7Qd7* zL_mse$2o5We`{={749=bDkT{(yPiMSia-&lzTDnU@P{5(PL6GhckZur3rKFLRl9I09 zXK;6K_uhT(=li;U``5Ft*TR{jp81?}W=>q^y51Lz#?PiZG0X<0N&Ysr9t|{46a~Vo zRY*J3i;|gC1i6&L}wR@wO*7)O^j8JT(iC2|bdQnvNXY zD9QDVIGRpBBg{!@?VwU@m{xMm9F+4t$W;`k+7C$g06r>3VXp3xn4?qe&t>Tz9F0ke z!bwMWb5djv#T13fW`I0-%9ZuOX_q(cC(Bak}$O`8{?72i{CsQQ4UId z1nFK*r&sv>NL1@dgR0k{2O_jLBwq<=C?9F zQTh=n7>Fxc24#fhnt%5iv@$44|D2#oNBs32HM8pLB*`$o``2*=Z}=I5w12^!QuTt^ z+p4Tg0V*hE%B?I+h#^D{ygV)K=j=@I5&ARx(DRR>J?7w(VJh^jX7t)xUXT zi#1r_J*}lrl6r5CnX+mXspeTnxlw&h>SlPgzgt~YzfG%S^Qzw{f;JvZsL(Ois)6FC z&4pM*~S2>H?L92!xT5FF2U-TfCG{!Vl(Rv2>U~oZ{231s$I%WL%@WiNL!WD^2~iTV55fzJ6dOxyi*Lbj#9VFr&% zAYP^j$rUa&Vx?Pg_M7o}h};O6Vo_Bt=pSI%jb}w_R%V5+^ck_~+IB;WpNS#{%?cM+ zTu^9g7oR*r5_CP(ey|BgsiW%I& z=+|)p(dt)m?>~xG;4|`XqSaq)R{dk)7kK_J0MCEz0?)toB<6ckQXSd#;q8ZIel0gO z+W1@eDR+&ua?Z6J4|XQSJ$imNOA32d9d9H#SlS&-XVm}RELlIfzWE*atoA*pPUqxe z&UO8O&k8MGyW!5GX%~uz%$kzCFRNx!8cyv^?|GcBe?Lx{Sg1Uo)Z4#4$LN}3(M;e` zH$IzjinozcWESJ4#hsWC($*A!ES3bSmGc*O-d3$nKj&*Tjr-M1q&0Qwc6H~^_fNBI zAzRyrYU&COxmEA)#M~d_XSVvhuoF`wyitR5{N3|Qlh8>kP>s%yzt1f}u?%-WVYv^1SF9E`hg@(@W`t7|=ijSlM zFH_j3ueY!tS1slrjWvhp`PMlKY{juoR-*=>XBv6Dq}eaNqEkUuX^N6XC?q&>p%C@I z_c~r}!F4L6leWt`zg$#io5S6&#gD@~!mmbuKl`k{3J66Dr0gR}my2-PL)MhccQQ`3 zEq>Ia73nQ==hhw9H?)uo{3sD`AUArqkNSw8goWg4`U`{0=At8}b`w(8?L$M+B~L&s z?VWhdZ)#E5?`qMprjV}U_hHRS@?QS;hf^qA38*duAVR8di-uDU zJs68R?7dv~GeOEWlKK^jFVy*z(j;f&9Ymdw37zCv@Y0?ny9Fr0Tn8nXGm=KS=#W)i zEyG~{B)y%*OVV$Z0xoo-82qgkKEsY16g<2Z>NNgpHxI^uJ85Uu$h%zjJ)dPUR=5)b z^;cSRo0r7Zn~vkg(mjomce_ys8qFy}da;9F?FQMSq8l?sKjYqnugfICxz$F*l8hT0 zK6e>G>)ZU>TN)$p-Ly19A9@$`z$ZA!!r0(h>PG5^j@g=m9>m5+Znt{R4*o-NE9$S9 zp9DLUvT9Kj;tjY{N1 z5+H!={1VUwmW(c1ZjDTXHjcWa^=GXNT{Hd&L+fYW21nP_7kkP}Dc802swV0>)Qyhf zK0U(vS^E^lrsQn|E}%goK_l}(2wHuKc9eGHiKJ>N_M5`1(Wu?%%Z8qLbJ(%fk3XM2u~(}Y-8mH)?sNhLn0;5Lq27zKyt;AJ0crZ+c7}irDmPhe zvW5|5L%Sjd`{oz+*bb+EXxJ==E50yeET7&SwTT^t*;fR{j{OjTmZGo;*9%F}AwBH= zQobT=Hr^t)DI~$Pcg`2uSd$=z*iW)NKZ+k!o{@(!Nv4qZWRzTrcQ7m96!udyp$2te zz8W5xgZ;nPfwhS8PDq1g1L7P)@1{A6ORxwmSs#C3iBxof4;_Mh2?fus^-w4jUa5KO zJ)zf&)qBCwO&+jbA;en2db~Dzmb7XhQ0E2`M2btX%kX4<4G1g*>Ho(jEU0T{S25hC zIzKQ`9c_|H?Gi8x6=91il=T$FFbc)2X-63fCm*&D_B}+JKyQv7s*3ydj218D zvpPr0IALu?bDfC9*bj?c4Z^U@5nvc~myny0v$y_M-%(2BX(i-)E*!qkJ`~bWRKZG? z_w_hym%2|`!BRh4aqYCep)%&Ht)>3=)V}eJ+Hnxz89hG?On_1X2ltOGfCDejEhtKd` z_TKCzeLj1-?iS~)v7Ye7J$_FHRHD0sN_6kNB!qkNULE#Cu6snP)j)k`sN6t(%nK{! zV@J0!I7d}AE5=Ttdqdiud-Wn=mhGb~C09c_3fV#H>U^4S51NY#4E1#y&Qr-9QRM<= z@!oixX<;a}K3}}0-Wnb?M3c6jU(?%qB>+p|H0sIY4=Y83Qr>Ew{*vyP5Un#hmaYaw z(00)mhOUNBvUx#ze#4ArqE7&A?30vn{)=Hzv+{SY(r0`r#)0t-dG$-?@e)!>SMtWD`9QDs%HD>aK-Qp#Qh zVai@DmkLl;)pIXVmdy$b`TYmn^KU=5$o>>JT_qbbWm8U1TD6` z=ZwxS0~KOP#e^_((m6f=;%+=D>=RIYIp^MHlF>X?c30+90>LNHY-eQ6CIfX>eXc1k z1GP(fp7ofK6Q^%$LK1^>Kwm-mgKD9Wx8Wk$(VfUOuCcgqt#AcwpP2B6o#HTlOe-3n zo20d#k(ZS=Xk4Ce?kNEL4MO+mJ_kK%BQ7ZQ5M%e3@s^Y&0P^&4)wrGjSP5H$DVvC= zD`vVHJZfFrWmT^-Z1$z4+e}8r~X3(o!uey^}pNbhsFsl zY7D0#yC*Azy!FF9-S4>JY+rlg=yhp3?{g_#>RL_oX`x|?>8OF{#2Z5l=)J(?Tth;_ zd%1>6HFBRzLHT64`ATfeNU6`(nZ^@tP(B$g<5w@)mH9|WvWp45Ug6Govt+}0z;)8m z2I*1HmyzyAr{Bw{v!;h}Q@I*bD@kh?g%zsg9!Xhz`eeZ|;wGr~M_uPwytA$-UXCa^a8%+LPrN_fsBoicfL@Ru-gh-# zK=MWt6j|!WxH@!`w4%y|f-fa7eg4Ev7HSy-r+A1k!YAbP2|XG!5o7Fma0p_ibPiVP z3R?xA5RxE3G4Q1cmnq4MFggq;A;%wiPt0;d0t&T>B!7*^B z8<+Nun}g&n_*KE@CJtSAV3t6w$Eg%KT=BHq&RmUc0C{fW?|Oe4Ke*>@D@3*~+UvJd zrH1X}lqt)OtsQrb+j0G)vSQ$FJbbhLsXVrJKIn%?+h&*>YZJ@@pa0wFgi?yw@CdlM zGSR>|S)08;Abin35N_U2G%(V5+o&*F0cMBwHun2{amY7g8OZO>pjI@zTMlFdOWt z9_e74VHR)(vc-n4v=^s^>*GgI`ova4@_|6yXrx{+A3H3;Yoz{$QmI3c5^B`8pP@oo zHr!cRtwISE?1<=~vWA5qFDyont_GJZ$-$hN`BJdA$!+VUmsi7g?sp$+^?Jta^v$1? z3tNWmxL@mw+KG7`6SebtGOP0tv{Tv&*#LgpVSV~i=OJjP1Y6;V8!X|Flh2dvKz!l( z(iU3HmD?|!ReFVoiiL%wq8XnZ_z|A0HP0xI2}O+ep?mn0CuxyQxGsM!`qppFf4kze z#v5PC*^sK*@>p)&nzNo?s9fJu%sBH@XcMo~k8|Ow=W9jmH$6<+2s#orVVRqmVuqrI z%p^%+8Ke)Zi5@9O!~HuIu_3#6wh#!b*F5Ht@J|{Vh#*JTO&Uj&*Tv%LZLP5sclg`M zOngDbXWX4BY>tBHI|5YJws2FgSQ~v-K;Q2es`b^yCszlo<;+7e-j@ekX{&K5571 zlIyM!5Tr{)^)9M##H{4o1VzqAGlm?NQ7-tg|fy}12;ltA`96^b% zGhtH1IAZ;*;0?l)mL8m7_-PU z6dT}bhj#yf(ECvbS>u=Urm;veWj|(7frY{PLzFM|->$=e}}- zFJY8yH2qLn`)$(ekC4tKX1a7t^m}NGO*1NQm||VXBm{LfG+q2RndCu{-B8>#bKTqP0pV)~;Gwn3Tr7P(mba zVFC1|;RcGK)7Oh)52Bsh1}j@psl0i#ywz^ZL#PB5bJ7ro;UjFID6@-USAwzC=;;D| zlq}nigWj!Z8JE4(iyp#I3^44EHLH|eOEu`%5t3!(u zsU9gJ1qMS)10;Eim;JBO-hY!N&zC{~sHU7rEiUMgqM8z(DqMpYr|G4S(qu{cXejF(@nGyZhTw{qIgTzx$;9u{-tb%yj;=J0VGdHmNePXY_Nz}jW zWiAPIqX=e39goA4%@mB)iN(#4e+hNk-yPrc`#K+<(%^X>w=7IM1ACbxnrz)v!E29A z?#H!#saKKivctpA+9zk@7w$5vbN9ya-|~=*Cr7`z%SLviy(-P$SG#eK?9bMWl+@Y0}pTFO*l-*R`Ds`#Rw3;Npx{h8p z3V)DX#nSAV&$~808u%my&6sDR?)6C&_fj7d|KyKTw>PC09F-s5Tnp?>x$5WdLa+?G z8n>z}F*55X*YYaJuzuBi^r5K;p75i6t<_KA@5SH!s868E@*dd`AepIqT(y2b*yW%~ zz!@*r^JT+E|H^4~h=uu6osDyUitFm0Av;5>(k(VPoBBO^;}dg2&-)h3+)s@Pit>hx z8pznEKIb+CJP7p+NgzG4byJZXyO%=qKr%`QAk_NV;q~e|=&Gq}O4sxrV3Oin$qJ2` zU?2t}?|f%E6rxinr?aZ%GI~(>E}bIR}d=&1~O8K?%nT5w_5Ew}I!Ts-zGd)( zKy8c!V*~z2`>7ucA;!RIBMaOE6HebF4qZmB2KW{7k?=igV{5LygQyrq41zKYOh149 z%$-w~5$0Yxl}Paf>oLrB1|<@!Xjy}#%RO=uLV?mE_a9zPM0@^LhpF?ucp~~D2kJCd zFte-;%tq^zD4N$HoAMR)Qc#g_M=}(KI>y=z^P(ySH>QRt5o{oz*M*X+j$X1Hs%z27 z;hyN?km7fE9{J%WaDH3?&JQf${2)o!Vr7f1*#pjxWZ?V=c!}24rU#rKZJ%R@pq@?0`U%`Y7611LB61MsIuGa-J^}{#2S6h)f8C9dIz@+u z&t7);#GELqm?LOoO#{<{Djx2#G&QO$Tx-&;SAKm3n5H5=;<{e@gnrjxQ_3)JpyB4o zJ4?ch>%2x5Zo+hJ_k%|*g#D1}SBL2KNC*E#__<8V9ET*y5eq$r`Kam6@>(>0QBFqn zRd!1qYZUi1??)r|7po8ImjTU=cH{>o?+?m&ZMBZBk728R4;qZl-xqGBE(~%_2R+9n z94`si+Bh!1FC6{Td+M>Y-G5qkOK$k3U92j9iWB z8%q))Z)KX5C@M*#5u=4_4{z6?6z$f4LPnlK@JdL}F{t0qRC*)j5+E#czjM@#d zcu@29$Go=F@>wChPvWL8rEhDtwlY)EB~9OCkuve((|DK{D{D;26lWDMI-y_4T|wjf_o9nyKa3 zo$I*RH~jR(5CL1Eci|*uE`89at*|iW!ZLw_7O^#5HRii;{x-3}wg7o*%DBk*PcDXt zfNYozYJ%#dAz~a|5+PvphS@SILvf;n<$JWn?!=3IA0j7{mwuuHlz7x{rA!7$#YWBB zR(3DnD6JgH86=dSn^C}9+e`1xf)?0c$7y=rqd+>TvlD$ zVc2ilu)?>(LIdRx21mR*%R+cNXUt)30BsVGRgXaey3E+b6P~Ewc3Ovo$GIB)=*PZ} zyGG)t#n|awv|{4l$xjZ?4MxY*%Mz|eo%zC0xneI|oK_m_8=LQ7oS6*-VsokQ%MTDLjHo@D^)QIs)xI!icny zsHN4uksb2P_q75P7Wfz&EgO!U2~4TTnIiEY<^cPPUxF;NuaOkp5a}A5wIt(e>2|l3 z3yIgOUUXhdNAq2-xIJdXstQ0`AINoT&mCoUXCe60b~O+pU&wIGIa+ z=pH*+eCx)_2$4>uJWYK+PHm379Mk&-c{!q;ORtV*dUmeunt8in?TY?zf8}~}+w|2D zSJVEJY@SWJsk$3-w9^VnXISN5BlxR5oxFvU{c(AS^HbECg`>76+y|PEYsy~KjH6Da z3{JYF%rKGhSiW4DKMQ(lia`luq?g{q+Rxj7?lg5-XDT|1$@ zKF?-L72n$4@SU<_+YpqHyqlHi5(~rruP4aqk~HaA>{esbRtRV_-7fooq(+6$N?TuD zzSl$t<|Be8_?cAdDCRh$D0ceOtt8Wz^>oO4ZUXXLebt^6bRd;Dz6p2z6Oc~gnA#?3 zzcyOhd{LPnhAgj8!8t0$VGF~$v{9P$O!YlF5b#zjAH{C>4K3Jm(Wq?TM^!mE#0qM^ zo~XtNpK$GdV7JN`;Fhr3D^~{ygvT2SyOt&|AHOV|k|Ew99T=*yEF;bv0Ylwp-Mt#k zFhuWsPdzjH8uf#CLqzUOo2_!wBjvrTa0Oz)m-bii6h`SEz_@P`3=j(0Y63y^ZBR{s|D_L{aDR=`5x{dSIpZ0`}A-@Xf7kqi`JS3AWS;MD|V z(#k;+tp@bhA(Q^1%3z@p;3ckl=C^Cqx<1G^FBkd9A*QyO%cjyqf&2)m(A%y@xVb6^ zeMse_7Qi5`)eB5B2d5kU&h*nKs2gS#SEJvRk%*LvUxzhw=hKq5UT&gI$7JGKWlOrX z)_~;-#6_&MaBW4i9VnQtq$P;D^8q2_S|aJuy2Oq&_P?*DNQ z1zvjJE0*boC}Y)(pG~Ey{zIc3eu)o;-48l5J}S<0sJ11R7A040Ox&{jQAj|7qh%*( z=_qrzg+y!|1oLp#;HLnh8XX#Af|owuP_XyF_l>(5UTrx>?-*K_@OM+Zd4rU3YIUXO zlY1y}`=;xt98IU|sA;h`Oz`GsQ%0!O2`9#>Y11~$@bJUr%<%Ft>j(C{Y>alQgoAEJ z&rFkFw!-nYsur2)dztQ*kuq(=H1{I~l329DwA*ZMHq-s`>#2<8!&gd0nde@QJnwGG z*(A{3C!@hWz}wZy!JHN78#}X0e0L&5L6q8+HzHV3btXr_I8!O9Oo~5d4kz|STi3P!iRcYB+jH6 z!eK6jK?Z|%cnteYHH;cZ@>r6KS$h(3FTTYMVq}UnzgUVBEn{sMuT3Ww6M8PCGmW5MUnTVWa0k;NS!Q`7yUO&4r?JM+~0Rm4$ zU-?$Kes31JL7pk@47;phLd(BsGn}vRZb-FOyMU8HH+sZ08eg(hWA?3XJS|O;Z)m=u zDopSw8@}@CF|i7aaDHb9py~jV0X(aL;OJt&2nW%I$+_d0K49ec*eni<+}90~Fh~V9 z{D;7Xe`R{&4%Pr|N-=kNM=TSipk6_m2)>NEoO+&bl;~W*1@Ga&R+Ll7ENyFrz>HXc zmb{3%L=|$8Z4XilQGa9}JJj_!e^*3`Q~N$V=mY$0afp6+aU~Ap*ynM+Oi*#?rUqfp zAOx$-GAON}qInlR4fFdhIg{v^WDCQ(q>v5{oeYQMeVqb022!URLQ(2d%ZojleJn=Y z^<#sTJz5e2PdzUi9ygEK#c=3V&e!{#KL;b9;5D1ItrTC5eNC z!||D1Ju_-}mwW67+Vq}CLOY)!pDe*jA9MQ1RYr0~1ZKt=1e;{u|EQSV_hG|BdCkix z+_jk;K2W%gY33gK8Kx+wPG9=Ih3s%L1i2#?{f(-{o#jboph_Kr{rQ=3M&-oCJb=@? z=U=|$BlFVjt0cl9KDslT$4d;Oqsh;oExm+osR-P%pStBB z`|YxmlWaD;-eZYDgC+(1HNuHezSOjhl|=b4xs}9F%=(dD%w&n#gA?0hr`>6SS_fIM z#A&Ui`KJdt3D4hGW|RuuIKyr@$KW;B^87n#kL$1Qt^XU+-i1){zes!kj8zN@qK>~g z*Em6B4=Dq2(L(u<l* zhW%Gp*ndA5PWC^vS16#BAqPXt3DTAS@7gO+#E{yip{3rh;wDhTepNUBqZ-D``s)Ims4l{mtWXcTMm5?cP@GY3y9~8z=ik!cWKirah{Tk1(7L7aE+L-Cl29uj}JZ^-b9* z-1>axv%0k8D&44A$Xhwzg-RoZ4R9pKnjK}80)h$GE1WkaXC7-2ezT+*e!3w%?S9&+ z6Il2Bj7(KI=-FNF7rHcd;_JPyx|Vb{>iKY2L+A|-B4$GF+2`={v7JKHEtW$X)nsbGX|ZZHDt{ zg3f;w>q4kngu;KJ@WW6+}niBp_yQV(+qEyZJ7-ZBaqp z89o5}r)Aes!oGWiYUsnW#H!v^#oG_xlA`e8(u1?V77F2?w3q44GXLgWeWc7j>YsSo z$jgDa5YoJRWmr6uqzLn2KT)-}GY((++QAe0lO#ZqV%d6z)}1fE+LnhoTy1DP@*TZ_ zX(Rh_b30&ilYG~kD|yrLp0d$eNDEM;EUtA9!t0}5=`=3se&elBZv^Q?OE}2`t$OQK zRNnzZNA&K4MaEfz2O-v9lLH0{HgkM0*|<@emxSfKq!tTXg?}A3Zfh>>OTM!C^cL2x zCGt6+Et`w)YmI0J9isKJr~=`sQ^F6fa)^4J1%3*CgK$MCwWo?Vq;qBiz`*WK+Y2F* zq`j27ojyqV(Bz`er6VFmf}z~jGVNT!T(n)HCwHAQdE20ES{C>qGxUz=!Dh{EQ}q7u zD?LPb+zYaoK2WrAc=@uaqZb>13hn5mG_nT)H#mL11a@2}>iJcY%#P9@yA_^iy8vMuxA#4G}|ZO8LOO1tJ`8H9)wBqiszcKsq_R zm;n&91!>x9`u1Ti!XS=cLL*aJmksK$WetrtJX&)>NucTi#DYNfc*Dll%-iwH7e;)I zlm}2o-1y}LJSipzJ1Dn$hLyPO_!q%AbFZR83nkb)nOp**IhjZzwEiI`S&09YuJxC( zi=?8A9nP^~K*!?jpk)Ehs!oW%Ddq- z&B{5&YBWrk@KzOqH5@bN*#)n2CkM2Yc^lMXB7TxgZjx;#0qTfis96CetHi&tMiMM{ z!wtr0>Eh^Kgm-^#o9kf>Co5Yb5FGA&RHp&*9BK?uneH;S+ri7opkIQ%VC;!aaM+a* zLYD;;=qnR6HID3z>%+@5Oq7XAp3r6XgE~;ZaGd;f0Bf-y%hFYg z>R#TP!UnX{__=}Vc0cX;%tbktx0WmmyLAWDugVg~W8J>(>|r!`lFYpeycMdxpMy&+va z^0)i28EuI>1@E?V4l`X+Cz*K9C#DxG`mQ6{(Ora#lSW+qD!L+I@^wXw!||dwz73n+ zYicR_usKfD&#}Bk0i94!R4i~bKd$lPi;)r|=ecYjA&c5uutuTbWl=l|r!V0A$Wd+~ zF>C*B<5~2Q!-o0lDC3;rx_HThrDrYbCylY8MOBZje(0CfGZKEUdGboAthoa9Jtosv zp6}Q$g&#cq<6UUa# zCyjGyN;=|#V+tu8!;W7Kpt^D3lYg2!``i+p^lkG8?z8Lr=2UV|ua>_SRtndycqm6{ zYt&|a&LF3-kd@XwN~OIW&D;H<#htt~Gtp@tF?Zz3}qVSqup- zVgf=gtcL|zvUwDuhD|BDZuhQvytHo$F}Ynk^BDWFX;Vn--2;Ls;~P0DBo%!vUEZF7 z1KYMAQeT-2W%u4~pD-~M7=92iQ~u=1U8l1CTvw2zJOMdM`3+o53S@9sVdIvWa$QJl z{yu@yu1D#d@~gWu^1DLt>Z!-d!^i%et~3y>4SJSU_r^>$JdKS?5ycHW%y&~o)rtB0 z9r@1c)VWhStMg$V*{+`I!ArQY>cl54NJ1Rr>bke^=%%dk4e1E}nov%()o{)^pJ!}0 znM~2&;Pjxdgh=Qqf5Lu15x=FdOH2^qF4p>kfH@6e^qhfnE+Q>X2;?WbK=_!e6t--q zPc}5tXlqp%Z3uu~(g5fsjs$wq09t!HvLWJg;C>QO4k;e%4NkP!A;Gzhl51M1{pR6j z4gyF<7+@+Hql{lL#H>+Wo`(x6VKDdEV+I<_$1KJPu~Ns#?sPxBg|}-2IKOkeAxt6D zTR+IilD4WRGF%wrdAFDp7PwKzi!Hypl zqDRX_-SWVs1>yz#HRiT3H;xx#&uEMZCKrmoq>yVwzso5xSYg#QS{hj73M%zm2 zxmZ(Uaoip{y*VUjijRq@E(#T9VF({HH-ryr#*yx-GPP5+q2%7ah}&4)W)hcyd>{lX zK?GK!4XgxQJ|;63tVEQ85?G0lAK8^0lK{8;IT-$1H0YK*_TY$>hhs@(ZQH0=#p1q$ zW7v{jSI1~u$LK4e8uhKM#IgVmysHfdYw*|3lVt(hA5fPgdhhysEv0DTx70R`ift_# zg5B6?*LT-{WhqGuKT5~ZvE=fJNZ;Mf7wwit`IT15T8WhrDdTYAhNhGWYggy3XSq5y zE?>nXM#a!H(-mK{w^%h(@WkE13S`IGZ&5y7V}{@lc{vz$euFl3JjeEU{vg zl9<@S<=C}eWeEpk7MA!%VnUf2L=KZRm_1mm&DV5eG%0S*;H}U?=pFZg+pJl9Jc!4KQ%eL)Mr($a;rw7dn- zqbQIQ?u?XiGvZ}1KS2WMJ0sI2&}jjv-QvQUEe1>|nPX65;`KPh>pfT-H-nP08+wTd zhggO25iMg}+89(Oh6(x0ZcosQXFU#?8_T_~WRX7x?V%7UhB=IV92#fS57wNFQ!_^) zw77*cW1b&|t-tw3h8-L3t%v^^v}I4UlL{Iv;69YNa4f?FJ{p1s?5TEImP$w_4eq`R zZzsEcBKnWeM~@nwDUZiOc;aFDIGpRl&rH1mRa_8I#jycZyb4goFIM783#r=&bn7-z zwD<6pP-Y6Hc{-)GR`5S(8!ZbnIz$qj!4V?B0w>Z0Lfb?G=$LKTn33?@yJ8T1Rkpjw zYZ{k<4^w`FM34E?osNj5FY?`+$Yv1mT@5Zd>k()a?WC~xf_~X?8ba+QsXhFJdiD(^ z#okNux!_y0M2pgUYbb;SMPsO$whh^6uq%Q!XfT|eBdQtm08a&s*sIP)7_qq?s^G^- z8ZJA*=Hqn~zlu}gQmnJL=f}@Zr^~Vq`>3r+PTo+or%oz*s%@QPdMx>tXmCuY*{n6C zrp<1@#~>lT0S6NfXl$%^t;8O6%&DpmYWgp`VkvCN>$J5#awi_xB}prNt5l+3<)Ud& z$JM_4-Qz>5L*r)&R$mCu6OBNwesY6?XjRshyYF&y+TRYTmY1C9yz+xKw;S6WC@X7D zi62UUCDDT=4MkUq2w5pXM*BrzYMTDlwgeSexnmEzc{M7KcW?20kkoC@E| zPb}_e366Q^Rnz8Ng&RO+apBawZg{}o- zZtqF~{uQR*Y^?PfFS`6FPrIv3DeOz_Q>2H=`x6@>x0PCM_S%ZFc_}Q^N-chlE!W4j z=K7}(9E_wr9PT(E3%R%}1yY2_)O+7c{SN5w2RoPc8$D1j=HxBI4ycgXMgG0-;&>gX z1{V3n*SHoe2i{VkU9Xjcrx9s*uwda1{z8UV*H*G-e7{AB>`mZFTDQ zm>H{PN+YzXPJhYSRA80zm_euDW$0oo_@$hR(=lU{@{RJ?G5w>~x84tsuQO0rw z?*t1olZFh$iy47x{s_`(f@r$&MG_&IpvJ1A%pFXiMC4;tJ^(V0c~STY+EGQSD?X9% zaM$wdpW5Ea)IBlnP43uO9FjsFQ35k#4R%ovF2c-JN0)siE2r{*Tyvkxn7?z>-qb#= zHqF~DzW;do;H_2uaXYI}@&Hfpj`d=|al3Tu>R!+sy`PfY3I!o*-v$L?ORdN>@6kbN z{nqu(iF$~_X)XA1Xy`u2I1@6)(>|8ku*Z-^@9{2Jr@-O4Ys+b8dhb-h=Y7lswT=mM z?wTR<_H)0Tq=cRlp4T+4CJn9whxax&&QV^o7S8>xboJL@-Tx8k3aKjmXXy&^*LDA| z6eF%b={~)9p{HhG`LjD=oAoQZ86DVfDH3&q;3*`z5 z!k5Uw@%$m^U8E|Jxl_X`+Z)K|kGL{!}t!)h*e;pW*tbQHYf0C>?IXM4P1ZhbL ziXfNNy6sRZYxYA|YMDN_Kg9dJ39^!_-)ZX5 z;Pht`+d0+SUq$Qb$`xj)=GC4(ffbi>F4}fY{qSpuzS)&9bBc$CL-!i&UCv}E#d^;X^`Tu>*U`<%ah+@eg#C? zwR^wC_;8gf-Y3i-ds&uUb(t%GplxS5RB*S?qmw^dnp`XFzD4+>R};|$2;)!PmhOC+ z1lo{d%1;*){hovKT13U=-frKDtez}y5s`LDe0XtDvvJ_&^A~lW%G>TRF2PdW{5Q|( z3_F}Cc+^UFU&Jzcmw+P3C-*LjAd`L;K~i4FMP7;_iy+<0?MchNK0A5|JWM^0)hetq zgd}*1t-kTr54od3ho=T_A1|)dXKy*O7jy2^lZ_;bQkAxZ-)pux{;@K3^MxxFg{FxC z|3kdA4@ zFM?R;Knwq9CYUe%D2<*=bOP)_X8l&Cu2+q1UjmMmJ25_}j z255vU$r=UWh)6w3WAhm(8HT=Ka|(NOQ^_K)#RA#MO?7Z@b~{`Hr9`(X2Y-MQFtp>$ z)6&5OZ4WK^wJfsM;;7Hq@KF$kAo72CM$t*k!q~r|ZknK@&TSx0kt_n+f^o}kVZ+0X@dpHbvgZNh_4gJs zFPTdIPG~{cW;f}J?e6%1jszt^sA?bm7pl$f;;V9)S$Qh+$s+@MW#;qker+#GRovf8Xg(P>lL8D{1!Bf@8WUc9O03%KMfVks* z8ZQ8of|@02L;MKv2R{_h6F1jSU%O}D(X-=zfcH66^G5zd zC#*B=J1KwkcLs&dN&&-@TiT09m38MOr&H$G=f@Js$ofvVXd$)n<6935&uf!Mg$s-Y z&-POfNlqmJY_BG)@A%C857^!&?;o%|AR%RZs2AF+&-81N{;O>O1}FS5JPtCwo>Kmum1-j6)7jpWG}0Rh{JNa$*`g>}DBKM0&)< zDI8dgkDcBvWTEN^t-7?Q4=*sc}g3FxuL4hV+F0FAp*v4U8AWqlGUbPs8#-etT=}RM72-&Xo)w34SgW@ zxi64cgu}1qAhU(4k2UDh(rs!!TxrmpTdML6%KFfZ9pJL4p{p&k`2m#$bXL~nW2ZP& zCz5^@Z{J-phDxQ~6W+zLyqDAE^h^qTYX)h}~guZH?}w0IKt zoduyorXjS@0MARjH)c%KS8hFcF*oogUwdFkz4E?Q{p~Y1T%4m8V{^~F5@DSqbx;$# zcW8o3vb|hS6QXgxW;ff{Zr|*Z=$EaaK{A)|{8eaV5ew6N9wO&+XpI`b6h?Irt_0a(~AvGpfXni z=bs*T!NY6sP46o{0igJJYuBI5>Fu%Ww2V3`FtEgkaz-!Q4gXdW%DXb=6;szY$H1Fb z;VasyQ3<c|QR#vbPm>l| z{2Qqyn;{>;9RK=B^Cfvnbz;Kns%?=kRTRXa3g8v8>y3e})mQCpWHB=L1zvF62;pYb z>lxZPxF1@aDdsGG8#6CXeE_CRK5Tt~XkpSCDAtx|1dNvKd3jkWsl+rx7< zyfP*ySf%@okoPB!fqI!yWL);1Kbd@z;0^9va9W&~3T~q#TmZ0z8PU1m4@XfU0%_5U zJlU(ul8`FwqQ$h^|2i_2m;g_$0`Sz%0#EG~ye1+3RG610I)3C*X1A%o}`M%9%IwvQlPrQs;GqzP)r@7~U|r7mm$NNAkF=70yds zSEAni@cR`pU7c{YL=?p_Z20V^U+6HXl^hH7>%-6Kq0Pj)C2IKfW$b~6LffDdDJu(W z79!|lXUt93tWUCdEBchK=|#}ok2!@wYO?xR@8Z=HG8{VCu?pmT4^5WeVarG-e-E>s zdCyD9%5qDm+Cb*<>xBJU>xbP$8hnS>S8j+N;(F&M;txa-rj^=0gsIBvTRoUHY77i~Il4R$l5qY%}^`r#|-=;dc0T+?rB9Z6@6u1hBs zZ5v6a;J(eo*%>6hVvFTq!GT-XP8%r0do&66DB%D2AOUbfn5hMLtXr+%V=LVb2`IypU~6A zLM}1Jf?ClEQ2Q4NYX6>t+P^oT_Rk#D{<(nKzwNw>+CRa%7kZ0TJ9k>AxyIuTC}=-3 z)Xc~v8{DWZCsf`3?yps=G-j2(pEe=lte2?&TCOEq4lP%b+Y~Bv988dt_ zHm>nt-$wo0T;R%8!o@ar$%{HS;CU1QkDaK&V<%tm*l7?vcDlIgVr+39$9#c{Mq??- z4w_|^u+M^|Y(j!!YdgeY)B5zkiKO5g^9BKLeA7}Ot^g==M1V3!y(e^$oNDA z-S2!fneDcw$CoU)H{)&U{MO{6iBbRgbN53hnQiiItJ_#=$>4R3P0h#T4fTwsEL%K*jKW#7@)7fC=<+h;1vFpBlFK*if{LPt! zD9_Z70WEFJ^{Wj<4fly%ACls_V744M!KT$osfo_7&06D1RiH``tNOogzDB2|4)B3r zu^%%r4|3W2F4z!;ygUkE-X>Acu^Jt`Xz0DYnp@BD=Y!w3$)h zS%Su^ShhU;0i9eCuempA!j=&4)Z3%`(?YNS! zd0H%N-m8SeO1IB2>0HiV#@2g&?94vC)k@UKU?<8UX~yHv94`5I3?~g?5FRJ1GA3h| z&Jgj=v21bnQ)YQWi7R!(qQ3#Cw|GeEaQ>2em|-AEA+k?3bE*-t9B;c5zOo50aa8D@ ztR79{Je~KvBt4k7{B;H~GZ`HAUw%QYnMo=zh;gjx8ok2qzW*}2)-CsoK})ep{A;Xyw zo1W>FUh6ydz-(6UrzmA2qFrgF9U{nmkDH9OTTqk|szcR=#yZmg?jhjs_7HnY2S>!e`~pne~CH9ENet=atJ z(zj-NZ~(sHJJ5rE3-Pq)mFjA>H9vuX9E0W_HO7&*pHk31Or}T9qf2#8c#5xgV0yOB zC2=AM2!9`Zh|Rc&rb~t_<86Gbr5W^^EhYnZAA4 zeS7{0$ppVJT~gAueGK;wa_gz1omlz^uJ-aQ zOBv(!XnhE4V4sR-nU9@I(^EPHcAh}uZk%w>sEX95p^sp-f;A$g29~!y^DJ7NJ15wg zKX66HbW@ozLeFk$C)bUs1y!_b3{fW847rQ;%YpT+ijp(oi+6&aXrmJzG*) zm;DW7tIA2wpp!hwuFc5<^GLe(NlUp0XHLbg1$2+e-|gfIl(xl*P_cXDGV~N&yKL>P zed5hqzXWArRnM(q4QS7?%)s`Z{%OS1jjS4NC^BF*e@=01A1;QF_J95Hq> zzaAumFv)*@-cRnw*q9iWAqC1Wa{#67xoU%uTl_1-vZxK36-P&e$?r8c2IQ>M!h`H> zoWnGbps0Ja&tl=^c{&dU<=epfcxCHh!1Nce{8_k9SBM7GZ^gEMyn+9z%DJ)g27bZN z4*u{x+9xDm`RH^Wh+1^-!0NqBTrCz>abWt>-%m&FxwRC}uAH3;E zh%AUyZvGcp@SkzCad7@jR`UE3Y~%oP+@BfweB=p^(32mv+C|Ten&f zLn(bTUwjQ`81ruX!*5}mNvZQQJFU8{CBZM<_bft8i;^ohG{^9;uW|R{(xD&o&j((a z@@$+s82ebU0Xg#7Kt0je(SAE&F*>X8=wmnAl|ZU}YwOjho+bRWQoGToj&6up{=aEFX1r7F6SOe{r>Y`~FUayUiRQdog#} z`13W{SzMdq`2^d<1Z{`=*WZtnl=z7+&V zfP^63-93Z|1Jd2yAl=_a-*fK!o^$TK&vU->*L@yj_TCPAuUWI#T6_K0FBl(9vOya} zu5XZ-H$5zRv=9--zZ0A9`;6>9ICraZ_Zl^B*^2HJs;EQ>=8Je}0+5+_F{g9hUk=Q6 z9o#wX2zj2jot*tVt2+H!le540L1*7~zT}Mh`l|Vg;HIbh;GklBUtzh)P4BBNNs&3JLn>t>c8hPZE zDDG@;c-WD0v(nwn6*b{I(XnkQek$g_D?ESW;yB}uJ-cAIW<%8z{Z&`g`Jx{Hq}s-H z(6QaZ)K<2r$|b(5~gMo4|AfuoY|}8emH2R zy*HuSsUkt9(`*;5AyubkA4-jp|7C9UVtn zOn=(xed+y(qR3q~&QWGWkH^{1*35%C)85^WXAOc%-_h{&ZEfrJL(i%&?^F5uM;q0a z^}_6%fD9}F5f|sN-f$NAm*24*D@2*NDgtIm7W6maa`3&%8VaP_n_X9&p7g#}tB{d7 z3~;ELE9hZ$)0R(NKC*gSVwv%*W#lD3+kq6OBOi6f*vO;IRU^WS8)+B*snbJ1tCjFW zNn%U=tM%m@K0>`8F@Yo#(t4T*{nNU`q;W-Mg+l0tU2xxfcC8=QocT)6!+7D2PPz}0 zF_{zLr(W!bcDr=gMGf2pX~4pA$NJuh7A0brClM(EFT+VhWm{EXsbiG4Af7Nzdlp>_ z;86}Iylc_G8urcjSy6be_!PpEXp0(cJB$h&u9B1PsTc&eIqMw%oyDqI-ngC{Tx z7VP(iDwHhUTat(a9wBd@5qzRABN-HwW2z`59u&McUvD-=y8POm#&*J>idJ#fAVSbh z_Eug*nt#7m!qrX}1bf-Ye`}tam(7VBMGvFMW>y(^Z68FO1RMzb@d&1@l_cKxLsp0p zMv*ULkN%lcNzN={O7e}GR+1JdL?W-6^Q9YBo*M8sP$tTR0%jPq0IF+lHs?!E#uYUf z$7uW-7Klkn;kEq%Mbpy;1EN;6US+4Qza5_?>IE)e=F=VzYiT1BL)4n^6zJkOzvK|dJf9$86(<@Ypi zJ&0GsLx@Tz?7-_JuY4)T9%LRuUu+s8`kXAu0IM^1N%*C#5}HB00oEwqFk1#>$x)7d zq@OCOYY~7jRy4#cmM10L7F=o^dqEBme>x70NTt4V(0agPl>1VRn5PP!k~RmPFC?3= z1FaM93CtIOEDW$JfP_!r2tXSF(<3PY=(}7Az>RA9q=**YN)Lw7K$(d{(novYBIxkM z2|f{F!+iTV%lgWU2*Kx;t6Lrc^u^8YCth+taYpYRU}m%wY~2Y*GS21Sy&v_`y3qqz zQTGQXgzGO`0?r#p?`}R(b1dU2TXsbpbdpJIoAB#50TDY$0{5Wj;B_`edp zK!(oA_K^Z6` z15Xg!WCc*oH!ynW?pw1QTOFYf{5LFF7COY33K~csuO zAqpnTZKfd#cPl88;(TO)KVU)0bA%m{WC2wu0Ob)G7K8u(;#>qJ@U!<+Qd?!bWZ-#o zop~+k)=xF^x%n&D$0=cksiT+PIqPbL3u!9j^DXlJWGx;vjc2cd=K?b)q*-py#7bJ1>gT%c^|%9E1LQ;K#@l9nvto+3`v%~_PvTn6OhctDkdoAsq;xRryo=9h|w80oEFF5}eLBhp%5X=~2(tMt^O z)k_SV(u+4~Nn|5>RHV=iNS|1`E|&rgOEybGxD+n#>%8QRmOjS8&I~*%}qU|WbXIY2qgAK zV~D3XL%*#7NBe&GP~;b<%XQ=171AbY9w)evWH^hY`q*@i?+Sh~BPF}EkV>UCG!slPMHbv1({=HTR&geaIpKve3D}zx{&7=xvSBN<<3q`_ ziICW#Y=bILwxB##63)KZO_KcY$LOe2ecl=YqRJq&cPlD@>ik%$i;eSv34}XApHMR{ z=zEzfc8h%)d}!`(Q&Q0nuK9&PeW)XwO6X~-IeG|! zHSz=5p1LWiau>EAF1cEtXypV(YTMb$FBZw)8INs>EE|j7%^SOt^&iMyhwxlq#~WW( zj{4}?dAv?+h8v}~LX8@%4x+aTjT)^EGPlxtVQFC%3i-7i3K^qp4e8xvz(2o*0E84wSkxJS{`ytOtctUjC5bB7PD3vsy?^O zKMvYt5HhHKt>?}$MZjKUgrJgGNl`!|E3NhhPJX~0jKKk$|sDlYAVQ--h z9ZAq8acpNBoFN`#gR*(2u*q`P1W-r`hhL7B4t^t|P11r+Xj4vP)NxrB>-y~j!^|-- z%mA7q;%Zr@quv=}DPb)afIye{eSvH1$fCO7(w+XYi_PyC=7+AtgUf9>kKPoUyOEWa z|N1UA1{F$dzL5n1UL3_(JGBXsCayCXFRM%Eo>SIA3fh4y353)!09RVk;sahaC5&u> zL)5cBJfuPsS;6(f|Cs}hU)qJDzFS+&I?+>A0=LP%JF@#O3gA-~LSZ6I5Wzt%iS6538 zO=1K~IPOf&k3?`^Q!4*UnC+iolm8U&d$vXP|ohd1pvJ5uSB!^qF4dW zVE?il{}~}GfL8s+8UghvAl*PPf1!U*F7p>l- zj{gOpu>&4-|A0CIx?Uq=!}msj>)fwmSpt!vym}7r^|(3zTq*!Q`!huQKfz}pUY>uB z=cK8@_87m9=d^aRr^7-l?E-nqbG#64jd+S^cB(Y z-sAfG;3N>vV&=vBXI_4ipL8Qpzt7z)PIWAFcc(qOZQL)uUHy4DkNI-qE$=BJ|19e> zui6(f&M%p5k68AyN&|-KzYsVj;96YR6v;G?(a@T^+?Bzu4-%lkE(kuj{mlxz&GU<1 z2dqo73s;{{uMU}kFwlLWhBfcg7tb~|J)c&MkC6$tu9p{2iWFKr@NDsoB%)(9COx=H zFTuQ-npw+T=UyYbYFxA%OqQ$f=|2AQ~7wLShi)ry#Tim% z2^S7eOT|+xUWwmp*W%>i=Snt66tT!Y6F+*!5E*S8p;L}s4SUX7u;1Flq=VFRpXb^2 zE6+3cKF@Pf!-E-XFU?s`m4|SDxxQ`0qtNk<*W_a~f-z=_>Y){B|piPEb^*^Q!(uQr1&)t*jeQB;z zRO7Z+*OAqDru5=5tTsx#{kO!P5{lBSkS=>K-2N1D3}8-?vHrrf9A_4oqKk_{>Z#n( z4)5-S);B&jT^C#a%#_KQ=K1Kji!suqjh@V44qK_+yZ5zat-EbGA64sd!qy^q*`p@t z#5_3WDD3&1-R8uKYn8xu96JsA`YI79o;nOn5d+LtHU%dyS1n#S_x5)7j?$iMyp!oY ziGDFF-0=M*p_+<+JuZ6~DFD_6is``Z&C=J{pq!RTV|k*)oh<*14YRN6@Vw71jYtdr z9bbOc1ElSoIax+;S53xYT`6=%Aq2;BFbx>{#YcgxRXZ}UzrxDnzMYW?_pdgOW<#S% zWzMzI;tqO+-4@&IQ`*NHq>N-&$Z!Q+>qCrVxwMomD)5WuMXpgfitO7T@8&Oc$>D2c zu5(1;NKN37eHheRy~-(DY%FWbr0*x0A~mxneL*m@{^FUB$vZND9x0Y&f)XPr9<@j$ zW`PYn+9RjfQDNg@NP_$rk|+T4b^T7pB#KHTQ4snzr!T)6CullRNrA8LW-^HB&DxCm z3m8}F55oduQT~y30~hniGPGgP*FgO!XM-Bf9R>}g_d!X#{*2{l_vi5}EqxVhwP=F8_gg&hc?J zHW9X*J%=L(lw+7+bPBM;l8bK>>KfG!+XVv5BF=BrPOW_c6{%Om zbFs_;Ils4hz9{u|n%Jp2tdwDjETKvIHb8pPbAJ4-&sPg>C$;J}j)8ND^i zP~VwjibE!$Sox=HengJ&JAOKFTsuBGz2}*e{=|F@4v&0v*3^e48;ui$-8P%&_Vlx* zj5wW}0yP-o5Am5AI6oKhdLT7;Yo>yqFwFQxw0LoUg%f>NrXo8*?yDS>U+h_6dAMm; zK5c&?7Z@m?DrSCJ)9Z`tnCHEm-%lGyaQ`dW8>oq{`zOAmfjXQpLUA7p-Fp7W%-hwtE zlU%tYXIy|-~XLs26ZZtCBSwE9_9u*tkNvy7n|Ps*|!zBP{#UtA$I63|bK zt)xLE#{6~h%IIxYzKqMhgU(}$&ped*M^YUQb3qUo3HGQ9l|I$`jsyYaIo>Ik433q9 zSaA5am^5~tRO)c90|)b>csgAjWspZ7wA&|mFz35W#>`-aJchbf9cN{M}9M*y$ zJ)}(qwDuCRCJ{lC^>`WeEdG#wQtXOEstkVn{L9#5FDo$Y_gD$Ks4{~z!184lef$!RVAg><|^>vSh!K{;&Zss_xZ>WumKww!*rzGf~7;jRiY-J8M{^mXMv+1LN%Y*5F^R1i$-D#Phblo5REXPQwVfdHW( zZj}#0dLw>+5V&zn;kYDlXE_T%65`>>ruB%ToV@WgNy3bq3H>-Q?Hq>>Cc#KtIl)NE z?qZy?grme({@b7+@LtP&#)D?5237boK9cA}Owi;OJc!yil9{=u4>>{hsMUK*Us!)l zUpSqeK7Lc-%fntc$94{H;&@R&SmoBt>|Rxanzm=>cQ$}6ncSDN%#?abEU^L`4I$ih z#V!+kmIz7`mD5VvHFG?1>8u#HX3sGx$?Bf-cKO0(}4u3>ZsN z5vIbA9H3!nchSK>Bi~%IWv~Q6-O*%EmR z+Cau$H=5_fD_rJ_ZTl@nn$D2UE7qz5)+!qx0<|4eT*aRqFue_i!!ZERW{tm9>A}aoYD3K?|BR6#`d|1xUTWdi95Ke0}Co` zo$1k~iz}0+%-x-*Cu*9l0n9{x0+RARuyMvGrK679MWJJP5ObUtw1eWZbgn^@5}1l9 z8(BDV8G#VFW316&G6Rh@7nH<=>PIT9Ry>v~F2K8oOxO83qo5U$T$BS!mm|*nAk|jf zv?|q9O7x-wWpmTW9G6U!m^Jj!-(y7FT9!e9bkHUzCVR|k)>7YgY|!R7J$A(?wZw<` zKuG^jtlyi+6PyKkv{h2^tLTped%u>+#`Az_W`|T`#`v=e1djMueW*C;*rhNP$O5mPW&19}wz znKVPmwf&{<8oXdefZ;(;DF^n8(>B74%QixT07E!|MM8JiBED>q!M!7!07KUXn@yIN zymzFEe!(J4-N#%(t)C0 zJQ*c5-2mHo_I`|#+y?P>>D@8j45*gq`Zh{65qoU%sFbkWp1&=*eOuD3S)vQv&rS8Q z%ULH|G)qTg1&K2X1!^Gpv+;sN1Ko689jCi;*ApC@_f1LY9(us93p3!23ul@o7@x{* zmbQ~-id;`d4cUtcKI{vzE>C?V9Y+dEGxMgKtMv@05-EOilBUwN=GZFI+Hz6sgn1&+ zwNZjPH@Iw`C#b8_J=(Ti6;OzvrZP)02z7hN&l#}Ds5U#mu!c93rMEqW&QZ(7t?xkE z7XJD=P@e0nkKPzqe-J$nYH0hg+Q)ix(=~5yKZ^MKH38tLi9_qOftZLxoX*hnkg4D} zo;+p_hq&O?`$xUHnKgci$MJ7e^4_Zt_%0-53{6k=N9WN8X6aZ-=;Wo@8wSs4BgkA# zm}}Vaj&IEN3^b%Qs#$ z7yz$>dXkqUAo&^CU@{aOb5q*gFmSYRr&%>>iToNK9d|}htdYEJk_A>7j~Zh}Wu7FW zJ!c>3{H#;<8gAcD2Iw#)>rGr_O8a=nY*^UIG-kblBiS(yfbZ|~L)_nR~vv%$Bud*TH$tX%$uI;jUsc*zNjMKoQfxIVD z@*JI{OC4R&dteOPq>2QL#pD%%!AeeucRq@t;A@j+#TCVlk3oQ<` zZ{DkS$jKTeWU~SwH!OlON;Oic4>~RqYEqbP6~!ZWECSb;)>K}9q;%?edYljV{!Z!q zWp_3kJ}dY)^Z(sH%>O6!r|q}B#YJ~kiC8S7O?+dQ^!)APF691^}h?S-C+)b+9g z?*DrwEWq^zng#Dw$Rml0q0SuG9G&gWB_{-IAx6T~C+z0;p!RVlWS* zR?gjK84L3~)ZLt~uMckMmRY)Vh40X`ipB!0>g)THS<<{b0OS9_NP%liPiW-8!IAh? z!v*%O!@(6*UDu0-l4sjh$MsXXnhke|X-D0D=6&PeR(f@`#fzo`L$@! za(2TwF`*>v4R_cXb%0Htqp#q%^mkkP2?Jg&?>amI6iXrU^BHWf|65jFDXH?EEFgii zBtR%-svY`eqXdo=+Pw@gH}xdcZ$mnr+UWqN9}ikQxFCS*5)yh)x^N5-j*N$fpMo3; zF&34Uk;qCE1p4Z-l{0OPy{(7%yzLpUqzKNt!CfJkG06QK;B`wsD^TyzmcYSQys*^M zecQ4jh+Apz22VM$hGA*W9W^(K6J6tWn^olA@X~IP+eBiS#(W08H73#8PZ0g(7cxoh`-Xmf*SvZP#@r9ninY^S5d& zJARp#6)sW1-Ldc-A5=S z%@<1cEfWo+^?e>2{pCx?`-sgZnDOYfrN6xx;7j+>II?L`3cW__337=2I;`uR9E31z z;t5WvLObru@4v;z>#iK~J`C`VD(7KXcXh368&ga1Z?j~|1A|@$#Xg<4n$hkVLpD!9 zsdhB$_w~NFrCa_{FD6L69|UUuIIwg;@36S*DD#1vA1#(kUmk)4o_2T8Kq`1r=I+ag zOTtxqG4(mA!?HNZF9`!ODoynncD_crg@GW`j8c=hsWiOgeMw59_3mDIoX(fOStjFK zR1|`2tR;jwU#38|0izTo0VGRv4!B3x=FQKiOc)gaiYIPJyJ7y(O+K&u^H*qDhqM@0 zvK%Y@Z#MKDlIKd2$CLtWyA~Z`oC^AE@$j0QKKg>B*@#fMOdwFRjSa;tK(x|Go@4F> zwJjY*CLfX_;L@gV{U$<`NdVX)=mjDOd<`3Wq79`4(6`tz(C_%aej){w#JGTxI2%wB z%iSx9djTb}F`y(Ca`=O&-^MZL*B|5nffHB$|;km1JEi1>2K`Ppdhm( zQDuN#GF+rPBx^y<36lE4skHu<6QtU?Jj9r!akY}ZhYv#oB!)!XK$>5pV&%AMweC8R zNGO8NRJ6Fv-l&|2&8XeBYBhZOlxt@Vco<(#uZl6m@Jp8(DFS4L&>I8L4_m)6aBg`| zXx=C3-8K?!1lL(=Adf8j2}l_PW+i}$9Bogfgh@Iebb18{oeq}6l8kJud<-uM)aPKZ zawiaP4ZIAYjKDepgq2u0G>entZ zDMIcNp|%BC8g=)G)OU6d#4dK;gf$2t*op@PTi$?RE7vLXAof*~VL-4;wDE^nz>2QN z6`|AF&EFuOa82O$5Ue@bCj0fdb_^Og&;7$C)pxmV?({FMq86VYkVA}OlW(ZkYBpeG z!Q~qwBk`qtB&W%~40DI)?>Tf|{fWMuQz%;6LI=}h zb#G<(P{_bFR)l(axsRl>YUz)B2K5eyhoQN#Jy#`cyGV8sJ)C18A-73D3>kBbA z7*hr`nMsiQ1W)>JIqI3@kx>LI*ebFJfNrC;QZ*pgeM7CRhto_=c6eGt9k`hu^bu*~ zA6J#dZn?ed;c@C6s!a4Zwyzhye z7iBx4XK=z479Rz8N|caW&SY$$W&GOa*mvrrcchnpBlGN||8;UGO}D$0LUe9PYS#1& zolGAXE54=kv2J3uvEPp-ER06{KpvX1SRGu{cOmL<0_5@9oMmv?K{N?pfqc*{L+ z@xGzPYP(}3@W%-cdm>M{p9CE4r?+P`(DjR%1)Tt|gvBbfmZfDfqUJsmoq_npajX(X zXaZg8$t*QA27WJLF<5`@MF8tyi)?@%!VDucCT~Axu_tyQW^o*DJ|8Vj(J_Juw(2C{ z=$5bY+3;HV)2$8dbei<232ySM#YN?m_lL$pcz5qo-95lg&u-uH&F4>VR>{p!&K!-- z4cRcv=&7{NHn+jo%x&F}&63D0o^T(F(@FAty9gN(GWyx?qD(77QgSr_Zb(#L!1&<1 zvwKEa_1y0=(IwTGk+w27gq}G+LoD=xthplo+bjb~$vky-MFv&bxDb5&d?#ol3_9klX&0R5qy*GB-@M*b2C!#*c@= z(X;0pWPl4H`9$z42FjfhFm-knkgBq~eZjB8Z<`ny%%wW&^$u}Mh}@R*iPljv!PNGL z-l65-WS~uuet_{Zx7&*aD|U1V4#X03HCF#TF^8div~G^rk^@KQ*F+|pg~f&7iG`S9 z#mM?Xz{C=r2;8lO?yaiqC*DOF(dJk&%DxcSR#io5F8t5RhFNS}(`MR{wx&phL}tZd zRfEaIZeJ#WwteI<;lFlN`fN4H+^mxeO1IeRWP7e^6JGW@Eg!N%+`&0c`1Lq1M7mg1 z)*d}0+5#&^+ZVD%EI~6)s1#rrK9b`~wV1^IU^R*BNhmMy&N^2D=-P|4Bm#X6{a9g1 z%RZ3YrV`YG(eV8Ov720)tK{nEKF17qUs&T3(LUF}!jWVT=-gfLDC}%Y!tmgt+y>hd z^diL+ONDc|nYGmniOnNJ6tF=whylARa{}%9*B~)Kq>%))YX_iR2LtW;?R~ojyaEjq zPf69vWzSym9%z%M#xX6Y{EE+Bh_Qrm%$di-%a)Sj}*W zY8fDdWdhnXldrv5JP@1l(TuCN&*P_hO_Fi_s`DxDiL=!o`udMX*B75jb!8CgVj4f9 z?8!;DFk;UbiZzBV>{FfxqsT8UV_?rr``c~6}s2(sbw+VR*mAe7mtN)lOc0Wan0y(zLE zvPpEdd@5F7@~0Qmyc1I<$i^q}&%;zD$o`t5Dr!io$y!8YW;~i8g<4vMpqXFPG?Zbj z?oZ$ab**G8a#Z!-JosJl`2KlklD8zAA;Df$I_xS5u4xqA&N?CL1r9x6_~8%q8RaaJ zvSV36oAr2#8VRlXcxU?(Cdto=>asuuAmemK8HUXWu!T1Orzm}u+m4!)V?J@W2ixT zQ!mf9B41?#e|R5adiaw1{>)gPt>ai@x58tMLR{1F5&=^g*Ypu>p~!b$5*)LDPQQ^h zQQsidSkzwjXc8FOc(b+L(nc6jb}XW6uqJ$2TUb8|#h#s&wV>{-Ke!5sj5F~H(7QwM z6jl8CuW&E!eCdPMFX+#p$-iGFp5Mf0T8M25#B@4rLH z+p^FBzhbE~qWl<-!mO~b>@>b=Ii7f837GuP8wZN~$uaFHp}}ijW1TzjPG^g8|84EW z>;!CidKP0Ja7^>OyPBQ9wYhkrTe@4P(*Z24^)Dn-d^-7B%Cgt&F?ke z_2_tB4LsG=HE5LBuaM(~mN;oOR<<16UexR297Lm!f!*0Leq~B06R(;XlakgSAum~)$I(9NlGTLq_xc4*v?x`INj;bi~FPj zv6t&!a~{|3;B?Emq-4KG30uacJEV`Lj9T1pS05n2@A8+XJ*)l$SK`yw>@q&_8isngdI%dq{{yp6wPhdajD`>{RadBbSBs}ipZWmYO^KC zdKiv{?)u=spNORp{vKl5dzR){YcHpfBydCLoDwHf^>J^=thLV3mTSm&YyUF|qp)@a zy#1{7!PL9!SE)-7*4;DnuX+Lp#PQZ&ryBMzo{r6=4{#M1=u5eYynEFx)rs_xGb+qG zd_&mEXXM%D=e`LmC(Ky;fS&98kRLWcaOXSbwMSHQWYa&34CH2BYqfEHuoLCgisft5 zg6S{rk7?C_n?0ROEQF?K5VH5uj6yI}H6Dr3Cuc4`y%ErEBq>e9eE^oA@mr zUHHR-FUAq)il{?#oP812biuBq%5b+>#o})MmU%CW*0GcOK;goV0%tlErji?>4cW1j= z8lMWl+0K>K+J?GZ{+!P`>OqeHPLvH+4e!$9gag}#EPe_ugq%(`I$4B@YPnYl;QX9( z4745Xz0ub9yXIT?6?Lv$CuAdaF`nF?51C(cQX-AHV}AmH3bV5wpbKDB&wLvZ8^|yl zJx0vF0G#cP0B1WBz}ZgWWDQ#v2WH>s91!UeS7nO#v`VE&Wc~(0e!4qz?W$pk*N|Kw zwkyhXitt(@6;ETsw)|;}qbJ6LyCC|7<=K*fGrnQLmmisZ?;fZ2*pT7~B1A0#);R;@ znJxgR1e(l*;gQjHXn&IMHT{-siX{_|i*Ar)iWMiJR3^$fX(Y{Qn4Eo5DvtW4KQ{iEMrKG*FEf;`r{)vCm=GX z+O&eW2z^X6`&7$>fQiE=VB%l^ zOdO1XiNoW{I{#7IGcqd3rim0fGx;L9wQYwAPFQcqJGi&Nl$n+gxsU|0t#$;{&M3#* zKNkh*O&Ipk(|4+_M5PEm@XFX|#axkU(eJj%X&}}gvC;ao9%Yw=7#r&e_0HER#Ba<} zHIgT-J8!N~`Lw-z<&(#*m34{eb9jpFlcyQKf8I?8M08p|){)SRLDS8%1W=~>*W26_ z-mUZ&pD%S-p!K`mY%P-SPha_o-la$Q!6r-B3#T3MOq@^;b*a+&S)@%8Q235onYqLt z*EXYSFAR7%B-VYXI(Iu_zrJ}j2d$L6ZRRiTC=b|A8*>vJ)~yRq_b5BNx}BTj>#Yi} z3T(D+IodW+ONnQ$bCi9g9n$FNI1^y{zFh>$Bfea)4?}i4YIoGA4rI;O^AuE1dv9TM zwUu+3&xLFCNyn+>l;G?o4pl;!!|1umYG7^!GXCk?(*%Z{-VQ5#M}sq$#{%p&P3`ie z_HO<{J6+AM^y!d_l_xew)aZ8{zMIhRbhOswm#)`7i0x}=^`!dPbVyFt(#WG6Cp?-u zocMEAcyLjB)siKcfrak-SzeH5ah!EmSkN1=Y>y48mr|H*4tu?in%7hE1U%dmND%Yg0KjEh1ZX%rabZx`l9RWZ;S6@^sEN4@OmDaI`$ zQl+c!7p|@EH~Z+2V#JdAUjDnL{fVG&${v5tOJ`|bdJC>+q1pCGUpKxK8F*A~`#G)F zC=T?AYg9?_%CEG%@$*vEWb@YXRRF%@5>abxwTfc86_@2t z*(v;iW83)AS&ZI0KB|J)W^PqQ56r^THEWGH$Cgs_y<0;GkPwV8!=IW|f+gbH>x^LO zxtsz>t%4dm48;EWLxF+VZ2koN09?K^5Lp89etIAqmShse^wXKfB^%>y>LvlO zIU(~o`>TK+V+pP&oopYXIAm*D3BmoHLq#PaSwL%*SpZt=<}6hqW&OJI?hZ2Au%V(u zpK6itM}2Z9JuMMnvhU+b_67eg|M=)#&ca=BTFdtOYZ1B&TYpconMUao?VDssZJww6 zuCR;Q%2!JKO8N0YL%Dl=UEWM{3+ zG&&}$QYnq(Nz>A{ifq#abJu?@FP8pQ_*-ff3Pn_PZ36$(fH@m)(Ri;F*5%)*5?a;VP^ zv>HejX@gbG+sDL2m{QW7fa=MbV^B)7AbP>n{LD8#ZTn-xNug2h!SXKtvvZZ5xN{^Udw(L8^{j9VxGb!2zS=xM$Cs~jSB_0%j!O=kqA>aFW_c+(C1C|AJ)~w8BB55~4;*!M zjGazIH&PszlS##KvjZ(Cx3}jBq2jv+r4rnWRsK#D3h*~~JJ@UohgH3)_~fG%l(h1* zD4VJHiWi+FXgP|9oveNiy&<`HomerqE8k4Rrv$(`)(kes)H;WNTu_>W8M@x% zJ#1C%S^Gjq_ogFC%`xn-4BzUIlf!r}fNJ$T8V+BJlWuB}DoAPQa0SJCKwQEJ7Gz2GJ79arT&INUsH%M!SwE zcj66Z`U2Nc#+Ks%75-FI@`wW79hpRFf9S3hnUqwpPGlJol#Pl0wG$217Etsd$2YY{Em+t#csvd!X!z z=y$f+2Zj*7Cki|#Q2=C?+KP;sm_)XSzc`BCyk#H1-z?!HCz z_?!7QI=zHT-L+jGr;{5UkMXUm?~#lnXSG)e!r&C3E55w%iamg?Sam+n(7L3#Tc~-5 zeY>MIZc8BLlHnvp{(|Wwh49>U^h^YrcK6@`ndggtiBkQuWbOY5O7*|H_k;d3NC!7B zAd>_1X@6ouaq|HpId(uV_ZOJs@3!#w7zfzSO3%*NR`0JKU7-IAVT|YAu>St~f8s&$ z{4%WnvySjDAeEi5{ok+``+vyA1pQ}dP&~gJu>LCH9>{w zY`Ey{Kjwra%uYjHx8v8Y)SS4+dpomGXXe?)qn0|+DRfP<5iSfCF8aS}vNXL^GZ?;k zo%?|mHaB*D(~UjbRbC1#b>t}vdzWIQ2UeXBO7gx8D_>?q4)Gb^=O_5FkXzFPBy);j z22#M4%tPlz3_DJ?g)7+`k>&$$apUJ!0$7Gw5|4#+mG)V0G+P&6Li_h>JZ{0T5?usC zB=)G~dDsTRQSDdFFQn5YnAJORuj~UI`&?Vy%bL*&#qQ%by`!f+J3imDoIYj{E<`}7 z=O6kQV*k8P-&}d!FgZmi`sO7?6db};14oIhjnmwH{N~5ieE$7XoAsp^q1}vDXk!2r zMSUsAG#B%3O4wMudw5T&O#zXTu5BH)u)ro9%cib%YGY<8HQGM=2UmyCi*Mj=HIhY> zYGJGj3ASpPY9M}d7SST5)P9BnG1{qvVzC2A?!vd$U#>fz#9{Ydw5)IEWSc(zl(>qP zSbg{qF5X9-;T=UyL$D&;hYva(&ff4xb|3_>yFHFA%9ocDwaY(`&HI^gg2uPsp@z%S z9FvD=KS8Y#W(3$VrvN*KUn3K+GY$im-Rgj4H@n}%fbh&SUXX3v7xK!W^0i7z9UE=7AW`=j?k z&_$n|zj}EzU`@?w7@olC8^r@`qbCjnIS1fB0u@5Sy(MIS^bzJL3a$J&*CRH|4yzjs zBewWbSEDLZQTf@Q_NbH$@Le*I1VO15JAfs3)q^nqcQJy77I1d=xd~{z)~sf@jBFt$ zSO@}-Q$>}3{z_4>z+ER}4>2((Up;(%AWK3m2%>(InpclE5T{dUc)F6eGW)E(jM)9c^>u`; z;;s=Eu4UMp$07IW2FuYIgx>Pck>32W6bD36_m<+m6Pbhw_?ghJ|B5t&)_x%Z=HhJLW&yUkzvj5fB9lGj`Gmg?Zl<6CPgTij zx+fv}Tja(NmXGXxBb`u~MZo5LAe(|C2jH+x)d+?FD|d#Xp!=0Oz?&TDv@a5brYaE! zBq!X0Rry+FzgCpRq8a2le7I0kPN?>bF0VsAM7#~< z#cvvM+}H@ zbvcy#Dfl&;`iHte?k3W>_UdPRsBGYq^4@46OU2!vvpv`DpQ*Ie=Esq1_zAX}oh+;l zohbq8=qt5wFID#-K}Hf!v0=7qw7At*NUh`@x z&k{bT%cl~(USWuK(GD{!ltV0Ka$Z`)^Vi22By*cOc{uvRU8G&?v?g;h0d~#)D>5O% zI=P?5`5bT4Q|o~yt&k_xNPhQ5A@-;_0LD7;&?)A!|MFQe*hTlO|2A2NBXt~vhuUb`*IiD+<^WP-dLMo3{nbOa{WdL)vImvZ9gM0SKC9E#9S%Jq zxl9_qPUS|DuM!G_0@`I%J8WX(3xhVJ@f9`7RV`x++uSsODV8RMO5ab-d~?onqo?*? zM<>-0ik5*?y3TQ!7%Eg>NVA+pU|7@MnL62-1!Ev2iOcz`xoU?IECiCT;VYsHycTL; z4|6eQl!JlgeBkuOguo`c`WK*ijTBl%jTDMMDAGt^A$uQ~uhG5Zg7}P%Ya2)>2^JqM z9PP+AeflfcRws=`(-*U3#8WRx`RXQxoH!SOX0YQ+Fc9a+>79aw{w2iJKv@Fe$D_fH zTvx-Oo;gB;$>$mHmFl9L>^J~^g)R5YL?6hHM1&9nT(3HS>tz9Oz104T>y-rLM`F$X z(NEyW9VeN>DM{eoJQ|e9iMYVBkdPVQlAqcSV#o-V$3=ffCjqdqk~XrnQYe%7Uj+ln zyb?e%ud{uUDUi&I*bsAi^($W`;vzqoYtX?2Z?`h8msompTb0v!x_RL zjf5#r(^F}vB+cP$1MHd0D)~ji4bRiOQ1(oKE2I7`UQzx8@LG(f4*5|>h5N;TG|x65 z&6Cqi$#8N+t@WpMah$Pf&Ewt`Ak7o7?h5;V+K!wRGEm!5 zg%N~cc7PB}6EqjKjbao$MGSw|tt=6wsjw34*kH@&$e~4k1xGwJF<|1Jey0CGFZB{l z?Ln2+hJ7+wP3i26)<)GO!0<{Y_DWdNNtt|hE?mSF7jx)!RmM%msi?oCfVX{tbDyYZ zTWbRd7dhQh59^3U6%Q;p_nBtT-d;+{b+>A)FP*J_L+rItUOww6TGs%!@&}*wNjtY; zC`q#$rIyLw_dTKNFT1Nx;hv#nVvI*OMJlPn-*zJ^4ASD%gUra$WaqaW(NQtB4jsH| z@!@Uh(7^rdJP-x=It=zv*ak!adQEYZ@KBDtgMBN4=EABan}TOPZ)CG*I`(@*T1+~S z@oax=>f=GCNF;|^D39oMAxsZovZ!Ss>R*3H^IrDOGBPld;i>vpDRJl54~U2oF3{+J$A z{0{Y8muf+*)+$$~40)zsSX--A21aeup1f@m*?W&JPL6w~XRWW)D#w67-@f3JU+cQx zO?Lg!Y3}yvi2K==@VcvL)RI>FLPN~;p0LzaUxTjq;*`yd#|qQ>W;6At-)XRnmo}~< zFgp$zADBP?;!B%P%8kXA_Q3p(`$_1Xd^xidMTqJhbrqtIw+JsewW?t1Dk|O)$RYW7 zMZF34tI(sB(f~5GaadTYPqH$@`_DQTSlK#^9NsR$Q3#;TUNSXG)>9Vrf$`}oyqL(t_g)e1f2wuw2xCtW1ubf9YF_Ybc$cbB7 zg%`h(0r%xBRfq=7+6GuNZ$EkUzKCd5#xOJKx;xID?(Q+V4%sL2<*jpSa=i9VLqVhs zUN;#DAFk6BX0~$F(`Z9BPsWg$>+Nbow;Fl<#%a4L6+i|AvF>1WTz*2A z#)|#Y_5}(l@{UxrHik&K22I-V$2zT*UJ$z=hXuRA=wd680sy|2tb6Q<`*p8}oV<+y zOEogERJ#C{YPlSDt5r4VLHI^ESgL&i;Tyk}YVAZj@wv#%FnIsV@n^on#${}17VH$W z3|6#Q-(!tFb0q6xs1eemo7iYDdkdoN9iaqQd^t{EP`|=-`JC z?LiXhBVfdN4Np1QqkCjq0W&C)MDP*@cYFRfqJ|#hkaA_ea%Bwfs|BDqD`QB!oDe@C zG6>$UNyj*S^{y@P5oVCz5%?!Vy;-7$_Wc@VKc?AfWeiZA!Nb_ok9q3Nml47+g!B4Q z*`?GS?u{eghN?8de+r!a85H>+0nYw!e|x_F4wZ@@24sytA&$R_8u`yLqCY_#e+Qh| z+5RIw#rNMKQStMi+iv~Drv(1u1I8}^s7wC{1^r!foZRh9{}C_y@37za1%NNvFA(o< z?GZeupZz0<_vZ%v9sDE6_h*pzKcRH-14!ym4dOf3eE!P@nb`uE^BiaVJD3yTQNN>i z{}zuD5EA?scvSq~@TiWTcvRAFcoeQIw0dGns_B82=VC$i{gDOu=<>LD4*O2u!t?qW zDga0=vY?~A4wgp)eI+!Ot_S*Z?ZmjU>U_8OKDTM-+SCte>9Y0p-T$`Eb=E`}4lO7A z_`{^@Z$iEhEMh zowF(hU8#v{=IvDJo_D3|)A;x%kE9?zY(&krC#MVb4bC6AQsHh;hi?|1BSU8rR5h2o z>jP6Hnydz29*wnSg?;S1TwV8L58kfgm1l&RAnz;DBAk&nF zK&*$mTZGB4e^Qr*80IY^*NJ-!|A33+MF3nBMPZ(CTar%)CELWuPs55$a?()LT)d5` z?aFn%WQc)o0-!}tTkFEBCY>0Ul=+=Rsl;#P&>G!-N@1Y?qK|ZL|AOZ`s}R`-y{LP8 zH|FYp=5gYm=W$jrQS(=r;O^*&!V5+?CH6AuAd#+o^oE3$g7mmc1)Dk_Zqkde*mD6pJO@Eoj=E6YRcwR?JxC62dzgIp{`T+mqL3v~<-%7l`!9At zjgy!GeQD6Q=RU4!P8jhyeW@1Em(r#h zA`DafrH#86d%jEuQJX!qBM(w!TUZi;com&o^4g}rIbOvwmXO42u3%}=6Yxu@l^QbEEiC;muNA5$!FU-jM95d4G zre)>^xEBdDh%M4y?iJo0ibzcGwa@@*g7GN=@6DDG8hk_4QDYoz*L>hA!f~(^nga)6 zn?fLLvk8Q4GEGc2u~mA$e1&(YsoNbI^j!YS=b#)DG7`R@5{H6oU4r?V04d`2TMi+U z`a}2N4FM!6vL%F0tr1H2z9w4xueyie<)69-ojss?SaRFB=na8BQ*`>MRylo_H*b;_ zHKB13?pu+l@yJd&h<`&4yIiHM>aaOf(rzW4Rom0A@2PzZ(RP8&QE9wHssQ5ROs`ep zo--q5ZvYg*8}W&CtSp82bFGZHo(Pk!2vdu;O(t378>fk9So_;}*%qwZg@~5~RPdL+`oyy_{bAl)qD^p4} zpy#f}QkZ>zaoY@T{KUvlwJ|J8nJ8S&WOuA9&o%?Sc=U?++0*DxaeZ4t05mc=c&aC| z%6SeN*=u8KF?pX#nS=bmp`n$?C%!JOw^2&3+OA>syzlaJ%s!O4_2y=PP0qfZ`z(j@ z!kx%;$<%Ds4c)e0Yo){?QUByUCS_e) zU*_oAN~F(CRl#4WP~?-Qab5lRolh4^Uy~!hjM*QQZlOzCL0668dsn`+YL6>lNONLu zd2aI}VkGxQ45#Vlqq1n6<=C5w<4W|*+7DWaUU4#|7QN3IGiMFiD|$~kU*b#VVxC@X zmL}G(L9zN8NDJdiT^=44t`Sd^U0d&ubvQtkJrkofBm^8wHsQ|Cfe8vd@y(Z~73tCB zou3slCPKy<#`$B_w@*gcmY`Wyr#Bwu0e7-&J}!)xtQ=|arHOj>m4 z_x4h^&R@hXxOPtLz_!g?+I-*ur%Iz7i zMOb@DeC~rlx3kro;Eb}X~KXo*j}C5M#Xlb`q6 z-BOf!KxqlURDl4*$#CMeZEU7@lBrX9vx9H%hpaTtuv^MAnC#V+>S}L*XF$YKuG2lp zSA;x7?APqUF2sDh2V`T0cUUw-ge=1`;r8%w5s(WEo)U~PKG~f=IZzt*DBAya1WqA8 zkKjT()j2mMG6;xmL)>GSdLW!;*;?zfq+=gKaObTeNp7@lFZZZ3g)TX=9oRPQC-USy zw~wTGd84fu<(iVr7D`Ci#}=wwt#Gp~^QkQE{1Bv%I}}0KLvm%lrGepvz3|Sv=k~%2 zQP1s-W)n%;ic1&eNqq_1)(PAE>-9<2rHwpUqANw+eBDB*?UVJnpv|?o^=BQ@N zi&tu6XX9gUNVR5VM{9K=k+DTaHScpGELqvvv^oQJVsB30@3#z(!Zw?r%e{_z#V2iS zk>;8pLaR$W&c57^R=+>PUn{Hi;4@<2YVWV&%VEoksZ^xeD)mqkGOlzX!z3Gd#iGXO z0eOCgIV(Fe_>jz45c2w7$~r)`Q_b71G<6C1`B15D(y*Ov~{xuLf!s;GHenb_PdjDg=9@<#SC9;;G zIAM0SI-%);M(C`|`P69U+cpaQvaNNF(?dSN>wZV&k+HaI-yp8)cBz4oPRGXkOuG;B+I!6u2StN}nP>{&71ydT0~L23W(2cm@oA3RqKzR#IPLK$Dw=NTrZ>K^zKo+w)*OB zRqXA`Q~O4>=XcJtOHebs#DaQdiq^qJ^F<$h7ni5LjZMw{lCZtTPn0_JjMv?Z%q>Us z5!xpSJa{FDp7Q~>+ysky!ty1zY%d&)GDhe}RW}bq^D4jKI&C3Q|-cQ1y_Kp-|xRZsDg8vA`$y~QqQ`rseM~p-1(>!IQO#6c3zmpLR0&~G4 zM9$b(vUl7?2vCBhK?#O}7;>?B4T>i(K?!C6C0IKTlwcGn!O8XqD1OhslwgmxukVg^ z=aIoPu)O#~UE@3cmgEFc@(e~*7E&twVL=^e0?3Y(Ke7`I`Fs-)L=)Qh?Y8p)a*?A{Jl6nk@}kYJdF=Ht+1)}Mdik6T1#P=Dl8@4M-?7WLjk1>Za& z*|?Q(2P?sh0~tQfHX>rqT&W&iKWaVtWnJS-GwQ|wkurE^ zGh6YG1{^DX<-~_jxc)7Lt}?)bFpvxf)NU$u3Ec!zKO@V+-b z`Jf}8U@v*=uDB*RoFpEepna@%JQv!Hht@@HA!3>*dd$h{C%q|^tuAqg@_3?pC(PmQ zm^&0)-|FBedf3$2K2e!8={~@*0PVw#HIs7~rtZwF?s|)2W@sIuRNqxBPe7jj`F+yf zVxDY*&Qac8vE}-S(mb?E@JB@Lv(32Y`Wj@nOO=HNZHU$pJ_T-gfqNZjik1D8*>zt` z2CwPUe~K^tnF;hif-jwa_5b(sLB2m9`+tI0z<>nq4?yRysyKcgz^3_^fR2fy(@%RU zgoCO3-;sLwe&^5p=i)(rAYS|fK@kKDv7c-se#p5{?_VM)#tz27=iSNJ{2xFjzCYuS z|H(Px2a3F37~J0)#0wOb{~Ck)TZ8@qWcpp8_y2K$ zzh(er`W=V+cOVnkH{ZVpnG7y&bjGGc;e5C(Sm=*&{l?PSQx%w|iLM7rdylxN8hPS=D36=cmNJ%{S_-?$W+4_`G^{UE<7cna1bjVD1}D)56l3 z=Uro}^Ht;j2K_l6A)$PMD<**$>gHBX*^nZsB+Tm&JqLpM{DNGR*EDoDf!Ef3+0Zwec$H;JXXK ztB`}jvzj}scl=tjCNFAi1{h($h@ukS#t-!Z&X6R;j|_Rv8BzinZewZjH55p)c4--W z5&FHQpwtI#lTxrSSWp!(guOK}MSs=ZP2n-#p%5vOj6m-8t1coS3CPq4$LzMlGl(_5 znN!1Zz76k008^wn(gwVC;F}C#)edizj1jj87rO2cPDXsO9R$DCnRY>pcX|D{$=dN= zeu(^<9M!7)NYJb$bv!=T5`5zXXX^y^!q4$yiV;r))W5V|6m9RwO))bH8M?^ZJm_6_>Zwfo}N>>-oA$dAgBX zoaK~cpOq*GAI&N_*^$@1oY_sOemU2-_nlJUbHSeDfqVPrCY9ZWukOB!8RgA>$Q3NYeY`J_tF5Z$H)~v4J z;PMYALuSW4ompn%PW5WO@G;u8l!fr^lACm%&C^>-9s+8*5;o=cUJ9^BkHZ+Z?V)+a zK!u$(+t$j&-cH2tL2W8P?3A`B@&LE>PTMMouy)XlZip}ljv<_4=Fsn*OtbnlCWj026RTW0N+C*1T9cn! zzg{gS0;coJBDxjad!Z+8tSLn zln*iECftV)(u09fkTBv@n8TZG5q3TaM8$9`2-7@k<@wm%@&cj9FrwYe6ec?sv2U(G&qo@W%ZhOu(hC;h3BuaH6S0PiM*?#3~xysTdU%$&F!3AQ2{Q`Thu75dchz8hdCVG>r+RB(Y$7PN7s?m}YPd zWibgEaHv-Dc9V*3*+}9@o^rrz{Z*5CAUy4(>b;}1`EQeC$AWznJKYnM&JrC?(Mj41 zUJLEY(c65s3S!zq`pkN2LJBmMVy4CiTG@SBhq&x_1+UEEkSJ z=jAwo=uek^w4a`epqjo+#X!E0wAd!Xu7$PUIAZBu&Oh0dD7;0zE)bXEo+9|iWS=#~ z!IkJj2$`~>H=F4B9O?cT_viK}c`4^=0EP+>6t6O;R!wn`&OAs_sUF8Ka*5*DaM>nh z|LPJ2Is-2XkQbEAJa|``-5-ry-yivrNEB*zu5ogy*E~K&MQ_6*)p|#DyCIJ8320P> zb^<1R5I)%lCSPy=JSl`Zuv`WT)Gnzr~h?DNoYSLA$a;@w;)%M#~8tZge+0a z&DXEayYeo`4~TIo4>F>jCgg*jaO}Um%=o&6Q&|VrbEke#?iH$$I)f$Q%9A0#cr9AR zlw6Dgr6DazG4TEWTHkX^caZyc?!OO@H@r5y(QO~G-CaQIhTUEyN|?2Pf_T0HQ6lui zfwEF^7pqV$NW`Ir%6O1Wv7+{{$K}3mv7@Dry`$!%CEJny08zS@1>hxjHi5a5M_mxN zc4bF+_#z!f%XdkPpp`(38_M{Yv`$SBKl1Rq*38EB++4iQlq6(g--9Mo7?5ns%7m?a zYP6j;d8$NTH;^n}=ENF-;OQBq$DIMWN#0gfNBFJ_dsOXIr-^S-Oh>PcX;HB@>igf# zvjHJJxSqwE?><7_nu98Vc)3U{0B?y63O(h%iVof#s>~~H;V?`k3O7KR;M|d%`OiJ zId-$(U*i0t5Y-#^H2uMn_1AQ{CF>7Ma!XweXZ}vpT0T*|Gilr4&&oC0!h0X0>Is%b zThCBV*VS*mx1fsfATKdao%tTICLqEF%5gM$m@e1CS>?eJRn&lcdx_Ju;<)YgoV~<- z|ACT`&EaVdk!%8ThAbb)o+qVhR@btx%xCMaPB?X~ti)K&!;PSfpgAE$k?{vw4CJXZX>W41YKLt;Yt9w3 zEO{}$O+w^aHljF5V=Wqs;J5*%396;SY_=cih(U0w)6d)p%uPhMFSNHAI%u z?@;Fr_cxv3RQ$H!_Hcpo^v$QX6-=)=~{Vk&NCmU6TijR z2#i8<6J1rHp%i;V?V?#`q{6*~3Eww{K1C(Pk z&ac@7Fz(!Z4^wj(L8zp=JWsE*Bu|jVv%B3lLF$3Qjlqll@l2#rutp4ie{xvk5C2eu z4;OC78*@nV@Uf#}`fqe=rNe)i;{=G_et7$}wQ;yX#uNCPx95F^Df1G_(aD(!j)dHq3AojLiajr$re`fS zLAdi0{CBh@q+v_g$>@ZTw<)O!A#^G45*)GWwTEk{-#c$O2kn48(G4GWejbQg`r)K| zn!x9?&Q@W5x(a)8T$St5s^;PP@Dcuxnl#H&P>o zoiI7E$|o5zW!IhAuSQr%6DS{9Jhx^?W)N4?&N;CoBc4bT4Ck^KRo#;AM(PH2`ksjL zfD84q>el=DnjJck8aXY7Ef?fs+b1q9EZdKuT(b*IHi?LDQQJy`a!n}omvVjU(oA-{ zln65o;cC1OoTy({ta%u6fT!MW4Mk>n1!Nm!Oi3vf882)y&_DOjr_TfM9aeL(C6 zt!j%rK^QYY9y z!YvYlmqX1`eRPS84xJUL1{IJlpoR|R-&v23skt#6Ir>ySIk*+PvK|7u`l;+uT?R}* zQBkq}!s~oB6^kM6P_0u!;1R${O3y6G2Z5vpcifN%Z(fP_QY$fzMHm%`67C$O3ZqkQ zt(u!75ve}PKcg~cNLt%L`)5c>f3~07(p_pq3jAl!QL5U{ z<;RGK8?#TH>znO<>%`sL`zQK~Z*2$uDa`k04dVX@%y$mH{2wsi??cYFH=P;k0p@W6fKY)CHz83!pqy`iCi};e42LO;iK|YuOfZ6^v$mi(f zY-aY$C|}>$+|=0WcOXlU?{^&Q|KmKt{u<}_SH2yv)%rh>H3&@K_V1em`|r^0V0`EF zwsYC+-&z9$?6!Z8JVFHip*awk!0&9te+%>R@c*N>aXg$#$iX{5zoHMDIZy=UXZYs* zS~B9(g=0*yWC&gf=F2l0yNeyP#vR(_53&X-KE1!>>>NL7Boud>H%2xHapvr}afE;Q z2=VY#@Wj3B6L-D%$)0l1X3+k(5sCL2+nj?CR!^)uvtGj+<^jU z9Cs>RJH{6LN-xDJKgCCMln+&(d~5kMo@Yl>RNoR3a@EyafoE^OV3eHdQG{j1$stki zyH7>(UvYTI4VLki8987rT3Ike)0;i+v1;_q2edzO+)VB3&_YI{$H5v~tZoV#qO$8Z z9%R1yIJsm$-Rh`&W&63yP^7WkbJ)w;M)Ag04IHtfn73bMx0?)FDkGkIuP7R4^=$8Y zqSS6>V-*8ku-YiDYizlI^Q zJ3Yy^7Bs~+>2aMSXZ8Dan!vaUSxSxrwCGZ-_7u*gH5Y5j!v1|6C~_o2JdE_qCchff zJcy&0;aOE~J1hw54mK1*i4C^!_5^T0`d0ipuU_=z^2g3}ZUx_Cp((El?*rT$N=s6{ z54W?tj<&uHN(hq_J7x;SbscL``E3yTr15R0ByCI3pDL7dpB?-dj05?scdxC9#eZD7 zS(MZ=@0VimX1lW9$nO5{&n~%4K_b)_AIQv7#$Y~&jbT;? z&b23$tILS}$z9mmlDB+QeM+Ehe~K60{ymJBncoI$%EDnQrTr7zIs!UehkIo_hl3g( ztE4w8h^7Q$#z*@K_N`YXL0rM!=1I6AL{`Z-#nZY-y1eTp$+w5bVMh8(U!&$r+$+EC zS*+()Tz>jgfBKHPzpsl|hNy^bU69R&m}3>ngz0fUZOyU4#W$I=+NzQ*1oPJ_4?{U# zZ7o%P+dZzh7G!VALNOZAz1_UuIAM+P>Jq;2Xeyra_;*wE)Z}CQo<1UC=87kcMtix z$Lx9CV}bLn34^t^=Cq4`Q?>RYsdtS+VvMX26j%KXfD0{au83M zEc#I5@=$b8{J{Ns>V8ABb^+;w?&yQ5k)!7)-Z2LPEr?jtAKt4P=>7x70&6rZx^~e* zMzEcF2k*_p56sgF$p`yfq_8y0eV0xM3_vs@=a zzSwR`W@H{&^l6;s!Pfn{4IR2ZHaSfzXyi=@*cYyh@`zUYgsC=0j#;T@1NcA{@VO;u zscy>$Ql;pNp~qKKqS2ILaOD9U9p&B1P;{DVa6?iy30=)DtC6>s)S?tD;pUU?3Y=^m z6zMw?y`$}^MP+x|{R@6j5)T*c4W}gPE3gXaGjbl?TsEmhXvw~jdw3dUlCTKhxk}so z(d8F_lnp&4i)<=Rvi>QTPyeSTsLeYdnI z`dBBh`s!-6lhaK|lKV^~dSO!o0ahPwA2hkX@XD@03u)Kg1D4K4u~xJJc%!uFN^D4h z-)C|u*stvrzERq&O6-CK4dr_Buuv=Wi@h*UE;9QvAL;Bk2>d9ze+_RmV!`AzBFq#$ zeqrRtMDJL;&fw&`3&d1f14F{@ogpO9>k%UmrqSe{2YHp2w9Gxw8>m0R2QT#*=pb65 zq|FHkj}r3aZiMb7t0SjPw``JVgDK8X8=C7 zdiESyFc_6d;p_V$(+hRH*a&DVWcK}A-8!|Qb8fBBL3&>H)CH8OG0LK2t9t_+5XlDK z*uoU*nWSFSZ<~!VXvN9Z-LMg1fK;b)DB! zVL@Qk)IILS+rIu{YddE~jb#R_rtEPq+DG?olKg@5i!HH+^^(We17or3N`>`3N%!A9 zKIMP0HA>R5U8|cE^_DzIL6@UyPSN6Z+{bmU6+Qe)mg(7b*d%*yy^rehU@i5YnzL_4 z3iZ&AA%|#N7@uI5$mmWcdIn{lykI0QJiPT;D}Q`&^UZ3$eUqo04{`U#hr@t9Ot03! z`Q9?DP1F&_v~0c#^qv;X6`r{mPBuKLsQMavu= zJx0{C@iIed+Y)i%Nmz3lW#X$~aV_$}0ISPz>7rWR+RB_Jr{yB*!S3eXD*kfONN!Q} z55-DQtS=>IYw-i!RD+S@o_IJ1=9=x%CTsDpx~WtnD~%uUx^_=uf6a*O4tk~CoXNOt zJsIg9*1!l&eE3{ju+&5^n*Qq_vbJ!Ko3{oZ5AQxqU8W;ws&Cs)ypPm}Brm zt~+csc|K@EABvPhSrJ}=?a?aPuBtIE^Mrg@un@Zo?dp9-9U!^&V&>|BYB4+< zV6Gq_Fy0hJ$OCF9v3ZbrUf{R@_l_nLJ zz_uSn))3w7y{;nTl0wV}GTQL$8q#V3Zg4r^G}N9rr++aOFGqOPSoRvYN;^t2TyS?Mi;*k2<-B8GOF5@sv*z9%t*J*Ic^JtFtZ+;d69ywKetI)ghEy$nv>BT+ zj^=n!Mjo6F&8{3Y-U-rJd50m9VVS5-qEg3K_vY<{iVCZtyKpF|-WE58;aEl=CoLtrr!6H_W-KM) zQP+Q3T(LJn(iy@~iYt9r8Yw3CzCQTJ_}jCbyD%OvHNmKJ_Ni zePB3fa(p409nUPH{pKE=B;y8DDoS@mA>HMCyI9IUgBfH2^wXLJV=Kz@jV~;yDZc^J zg1Py{M|@yfuqnF(rUgtd)i?AZAEG}TE)N+RN%DOO9Ta|&{>?bGZxG~(05~ZeyV8j}`)G^y*C(j$i85!Id z(QQpaC)Q5TSZ_vTakEya_an8`=iDhI5tSJMN;LQOeY0`Rh~^)^CT`2fE9p#RP9e-> zP9W~GAUp3F1A4uL&J6s3XiPB>m05uMGdNJg=2}k#-1ZA2RQ3jA@#4)*es!kL4taV~ z8x!d`I~D}5ZVo!oyC3ccn4qDLzLmVr8x@op z#eENE3A$`-7^fO11wl~}fg*SsEFyp$Z4iMz?GpM!Iz+xp#&U`NMcbSMy3gE%AvX+{ z5v+BTz*@%%taYA%wN8=!CsbGMa)j4h`8^-itio1n6)-Sh^kyo?AsrbqEhUyx-B~hH zrIu3gY?+pB-=wt+wJ<-W?_9gH&YZuLN`~NgG-U zGwAQ%y_*cJTfhckaA4&Ecv%hOY1V%cp=f@}XH|^$Mt{LDT{%j}opEv3+=Sbl9a|GbF-!Iy~gWI5j&_9JwBAI{@|N1%H z7Q?m&=fU1Fm+33Je2f{%WK8N0vL|J~kUvzNsjKZ^*vlzbmyXp&?%a%qk z1N9_8^yFs$+I#Dty3P8tt>*XM`#W*fw!U^ix9J!-^)NK%u37;yU8Kl}Gb+pSFJ5?~|RoT;uRhai{oJ-3d8+tlhL|J?6-Ktx|z_jlSHe{^40#TjFwdMSN-J^~vC2czZp~tZ`H876k9u`pcg8nT@4Yv=xOFzW3CI z^GJQ!_=s;P)2PiXH<$G8PT^jwcU+l`MT#NCq$AZ#3Aoi+Lt33v7|5BWTPN|$3!5!h z!ES1C^Uci3g!W|qMHw#lhj*}0?d@wC^$w6%&W_q#o;el$EpOc(%_Hmo6v2`(Fp%UP@JbX6T+)SF-iot=K=k!RCl=;=Tu|jp-Tk-@N z8I6LcwfrK5nv~y_2|tu$@T|=dc#WfH7BM)ZsMq4(8av~pkPF!PdQTYk!rs$|v12(! z^g7KmD{gxsF>RCnx-#{zhCh(|i-~0C zUu)VS%sjCq@#{a$mAS;*7Uc-ay+PtlQz8kS@0wO#LS z-L&{Qw=V_DSg zq`uc!E0pe*sWcbAXeSJRC>6s^zSSeffQ_1SweI7Y5g&yg-{-Z^iE@pUpT{$jYYRV^ z*RtJ&h$bJMnNM9X7y+Nbw)22Wj@0~jyK-(YkRq^Ka-g!IqR=L1fIX%@2fdfEbitG1 zVTks*8rSv4=1Nl0yl2>kZ<+Yx?3NzvIP13~SR~kj;kY90*Df%)%ZlB+E=m%Jc#Ch_ z_oUJ(zQ$bwBnUvgE1fK^T=?8n=0_?VZbJ;=xwBf^{VXHfOmjrC`>F_onb-Ef7EY>X z1y3JYi86JHB@0J+c^feWD*WR+^YE)AugIUVPqt;5YlIIEV(1;Ey%pzZQcl$jzm3mP z?u^zPNm7jNQ!6@k+rwwM`ZBm@oip!y#VLdFk0RWx(R2T{ev`Mdwf6jV4#bZNns~y) ztziG_E>i$LKRPVyu8qYS{SL+Vede2N=ZhR6G?G zmwT2O7Hx2d6KY_`CC}rnD$4O`#U10N_tt$|;yJRpL#DXJa0%M@wa`?rGNm1Yi&*UL z@djC)UqDi2f7%72C->r9M;QIp*|cAu0^{!HiSkk=U)2eLw)N`WlRWPfiy207oBlf8 z;J)Fy(Hq>^-cj}`XzwUYo6)*pL%q94yUY>_M|xP3S>92Zwu5yY(F%igqZswdtDl&) z=gYTXI)O8#>v8>c&8vX7DlscA1ZmM;lXnFYSy zP9TO@naWcfS6JL}!HCbX01jrHsd*dVWz9i)vn23B4D3lmME87Dh6TtZvjCZ7Xpl*E ze_MLE1Z0xAfauT&V2)_A0e%O0mGub%$lZy~!EdTha8AQY4q#D3i{3*hP-Z(1&;c-Z;<*J%EuSRFzYe0_L*KVCA}a5o`5dIgWiG-9_ERy{h zc`DlRARP2JV+>VFWl1BiNXo&_FYMqnPwl&tLSz$%DF@a2=0~aR;pI3Am$QY;CgKtC zgOuR52=5L7B{ch4dBozVHDbWaZ|b2>qi0T}{)SH$k8(AN?ckDaI?~hk?Nres*9EwQ zp&tm`AQED1#X!?Q?x;*3X9Je9%joMDmbM7GsdnIFhA^=h7;PKKTz|?mJ<0j7--aZ% zbIK>w6#bq|j4$pvR$uF!W(P0RAEA7gIe=$0Sp!j5v|S6YAKR~_zRQ46V?ShjCfwBL_GPNkPiO^TR;C(FBLFq&WmQIUpoaxC`TbO`Ui>v->q~@qm+W z155KYZ#VM#>c4GkrRZesAOZXeLU;|(Se;X zWw%H2qK2L}1OAByjL+^csmeB?KSVt7Iv&nU-^<9luDs{0ekyZ8@m~B?kP~a+RHY*> z&xi?uds>MgYcD*gqlo~LD^JIU+l~xtBH(H-vZGurc|bP*(Zj6gK6^?bzZM-Z^VhOm zjaAbHW@myFBk!DzON+B82yQvgpU2|fayA|>6@C$)1K@z)HeZI(v!$%ugO7xP#61E< zO@RyiQ&~fqBllO@AQy5ezUkHbKMchRvmwxPx3Y8$DUR=lF*p7gKI zO=Mik_aZ)()RR&ER`z?=7NXWM28*kT(h#+W%0bJQWeHS?jGLXZBGFn5?@6=YXTnJE zVVv?|!`riBk>~(vH-2*q%W=@JW6>Z-7A^kFc(L$^^Wp{w+QZOm%G~&MC$W6_tb3X?!aeA_pnA5O$da{P=y&$SM za&s_OoIMiMeG^dkO%`=Hrh%b`4lvZf0friHr#YLHQnkZDY!2jM@mg4FZP~yM0V83r ze&UAF;aKHWVy%=4}PHiI}62!2WN!xrJP4L?c5+e|$apxToI53^<` ziR6n5JGNt~p0TI$*cFOrXyutS-$B-tG~X!9Q+)70Mc$+JGds4^Z?=A@oVko7%xImR zu9Xkg&+QXQPX$HfP_VbrBxOZJzGq|Wlxc`$pQ8S;)%=mrjodB%&jKj9;F(C1NH0vHdkH2= zii}Z6AK~Iuq{+r(_L^vXy)zZX&BJu$l_yz74-&I7KGsq2YchB3Nr05aVNjLNKviZ1 zRry_!2PV-tXV(C@?A_q9o1tHmN$~vFXJQX+0kFtk;uypRCR<(q8NIR9!SuG z@VjtIlN+6phAWA;uOZ@**8=RTz4ivJ(=o-`-oBN%ohCFuBBN}PlfpbT!7ATpNSM%O zqn__$sit-jdQ5Qr+;jF)bHx-(z+E^m(0?0F=1rfdKsMLXk(r76w_@=8<4s6g_?l_i z$gm5RRS(wEr|*-3-9Sv z#V7bn!T7f(ott9)7617IYTSYaCZv<65QQA1ZdnnSa1sv{1%zn=gjQcclQ15dp?~H2~?-ky;iNNT2=q`ywAh- zn`am+84EK2?ta@v?2kBzi}SzR^RIUi5Duy5YGD26X8q4p=d%57{SWM>|EkVq;{?X= zPXe%i-7FKgKQ#$}Qhyw}zlTzstbbqXi4K%{#{DYwoCQifpZzNJJkd-(%*<>>WKk_n zG(}4nuL^Ssaq+C<+>^O;np@jzj=W82oeQI-((}D{yjSF;I}e_pW+~y zoK0^~f*X{Zg-JKwFrQxzZtF2M7zzGR*?xB*LN~uez|D@Q>bLu_W5C*HYT#$mnFyhM z)=$aexo2hVo@kx!{t!q!K+&vG4EA~B7> zza#h_uFDIiZLf2IH2gSARREq-bz#ZqG|7Ouy^5S|(Yg*lCEPHfU)JiqlUU{ zSV(!G$Jkk@x|JPh9G5IDE&!2~j4$eDeaq&yq^Tn>H!_VUxB}JVDvfR%wia}(D45B# zvy*wj+i^FI{+;Z${hN~R%{Pu_ozL^PGy*xe=3i`upPT4If7n-gW*~%!8a~T?W&V-G zyfAa!Htq=i&J^Pm{_`C2m-Ol1{N28|Q*o^%dYA+(AL9}ShWqL_UW8l;z3?H-&^AL1=l~ z<{KL0O3`{49jZI2v_4;cGktRS`f$6UvrTF_)-NdV(a`LB*8(FUrfH6;I!uAT#sYkv z66=(bHypew(~PD4T`lK%*qrvk>(-}~t9jYOrrzP0k)i(FdSV+x$W|-Q*!E{C6i?qG+-CTh-7`P;*Q}6{&z|C}wZLsyJwT?Sdfl|raaIy_Cx*0XR(62? zQh1Lbr17qWntDE3*vL#vjt=p8>~&RU>-N#+aPK*`#EoB)}2ly{>JP^m`OQ#bK zK3dDV0oJmj&1ygj`4M0(>kC-RQedKz<4GD*4Fr`)Qyaf#@w13S>}U~=0ZZLEi{TQ{ z4afj1+2X=1ezbAGGm9~l3MJM!0)0yyr4kX~`;7!VRj6AxpKDaw01nC=$J#UtyGy?h zszNq$#hONyLsXzC&qoh3eQ1 z@mBeX-px8LB47GlBj!(_S_zY@@`epD1HVD%2@Oz#hsei!!-wci(4g{!Ms$VRKmJ8F zwf`%aw{H*^O<`KHiS*3e>yI$qx#QFC-fwtOi`H9oR69Q>m)4Ki&#zHV|1nt=fZFl(P;ngzV*20R{bH$O9b@<#3 zSgFK}(D$N%a%xIMSv7-7LdAi+fL>0_r1!l#L(7I3!(bRzr=feVMx}y7Qi^de_q>G< zkj5utjw&Tv0AkhDjKmoww=PXgvg)RVJN zs{@BAi@m)P0}wDb2vwv`jpq`NTDgxs3`G}Q8umJkwmCO-8RE(g*d*GEiL-LCcd`Iy z;2CfRMgeD_HgEBfM|(%Otuk&!L~OdKZ};@2@AKmL~$ zAxQ;b7iQu}EIh1G3AV{&01VHPQjJcQaM=fc%$?m4MXLh|W@ch%#3Px`9W4C#;=R`S zyA)EUq_Zm`K)q__%WYB!SAafx9IO&Zju{6CYW-}oA0UKBZstr^An@dk!U={Su#z^L zZ#akKT4;U}p+h)52j^=apkvBAH#~tlcWEpZ_rl4RGJcCt3KBaNx1ZtrLSr#Q@=N{| z7lI=}C&E)uI7LB*Hq`tkMuFis1SOD1kUzirMr32ydm<+sCC)9n-LJvTwsx3;PAvLi z+H`bZ;3_dDS`i#~BEz){;6#{=8S3UP90o(JzY2KO`E2vdNgROnX>aQ3u+Rjy1Q;J)es8B8SWGWGX_wtPiffD;8n|x|X1O$7PWCJ^mIJqZ zHU=`yq**?}+a?VG@sheMm((|A(px&+m0u z-X;%azevqS%f(c++Ok)--G)bcw^dG-{!SuBPnzQrA|;IULdA}pdiQmZbL;!h=rvGE z0jj+TIVuVoj^xy^fSt9xrHV3wCJGVNr)tH~w1b*Hz(b0?Mk3E;B88~5ypPbFs!mnb zs%{NWa{=XHtjNhDEh+pTp@zzt5K0vna_VBa9_6VWu(Aq`Vb!h}SS>U3YY`Ucg@p>( zN3l4!Y8TczXi7@Dm@}@(Nj*npn=t%{lgeUv?u>*Otq8J)k%a~56DNB42IGo&yoOZk zbjx`%+3hGY;$u_nb!*BtTgGdl#`)G0%YsLtM^^0&WV23G&w%_-V2(kD&?mtT15h7G zM@Tynn+uQ;9gCRxs@fYdd(V|?n99MLB*jc#RNuGLu(|hYcApH|ydqD51n};ig4| zXO?Dmw^GCc|F}~N4qZ9vt3f~)(&Uj;&NMO{-Nx@gMS!=^taT#>otJ&hzsurO&=p$&mfwhM9!_E zXrL}o9~-ASu`qfy+5Mg&2rvGz2>V5*D9*i&^fqZzi|qE%_*JTN+eJU)xCirE<8PI! z+`zSe=keOl^LXvwAznVsqRD&(Q!le^{Cy$MiDhFV4~R>RrptWSuz7Fc^jyX}8M2ap zwl{wDG0WI!pzHZf5259rv*x|^!HmGT?Qq=oM2|QrFZg`s+w|ABZxp_i#%^oTg)UiJcYptLn&LZ^z&_ydapz((Sox@Bip=%2K)Z# z6YEGR*;*h}VjKvS_-0p{l=L1jj!h$8{^(+RUR~rQDb^+YXs`Ox*@!_#S`QmST!mR#%l`wDuP#mF`Z)aVS!Nk124msvRjAzeXKxIz!@{L+h|(Fq#({8T{&>K*H-btxNJPus zjSMmZ%nCukgt^l4Ed}J&7KlbF#?IfRB*GtR*_dLM>WMl9Xh5g;hyy<*s^J|x9@6ul z)Y}-x1kx`*<+X=jZ0Fw1Kc^qLf2Q~Fl&w#|>R)23ze-a6mtd<$itzUmDvrO($NrNV zLAJ-rz~3ZP{|!GtfHm18H~KF*&i@5|*c$wq$NbNf2ePp|7T*C#=#Q9)^>@|KziHAV zCUP?Q6O-ZM_@5D*v2y<=EPHI$KdLEN0pZfWqgT%E|A@2vv-dm~$6ulAe=>rszb6Cy zsa=oc@894n0QLRK-30d7KY8MF{*j3O8;124VO7*--EYDwXohfJL|Ev>y8aPq_%BZ* zjGjUhlR+L}3UeDKMa~Zv(#HZX8bI~YdE^>{jU^P3900>Qs_M?R<2bdtFr|O=#6MkF zdV5sjl-~WobRPfciEq2Vbpkxf%>kbHM-MGG{n<Jcoda;J+$M7RE znX=zD-<-8AR2<#k_@E*Be$!*he( z6A63=9{~_wZ1U7WTOskCrob+e8IR+?nBAzmzE!O7ETD0Oh3*y+g*`t&3=fS zDlayW@LDmDx)JGp@*yEM!Y}eWk4>mn-5i&;je}2Z+hlR2sq0=Tk;$45zy2xwT-}WZ zlSgE|MIIwpdaQRJ+>SM@m*LJ!d#rj)%T^Rw8oZi~=@7Y@i@Q1P5r#|#o_(BpkLu-g z<1#&a7APl0zXWYw+8CIf4IzYn=;}Gcj#MYb4;frZXd-ACApww?xZvz)Umhtgq9ESb zGM$2!%8cQXIg#DQEJqsIw{JvBSr+InG!kcu>UFdV`yqS9{JiaieOLLJc4*Vj!DCx$ zh4dI&b&+$kdA^W4qV=C7Bb)`pYrc6;8@?R;3`P<2ygGm+l^$w1269kZcX&e!y8Mcw z6nPid?A;mu7)2SCn_AVoM7e@|JxsoV;+>v?3OzF!Zs3I;zxOf-i#gPvetpQH=j2a-j6$z1%h!YWwj)Q(kJw zx`F;zJPc0OfO$-RcoHBG_Ow3o18c!ZR;p%Qm7%bHM)*C6-pR$=>TKxdFCbc6ez6<;6};>DxLvm6sYJ? zVF;YnCrHK_tXXF$PA5rvFcMRx?VnT^uEnVsC$cgTpKs|3YxIa71FZKaz~NHrVoVob z00JcpJb8qfK~3t~Fxz`qCYn->Kmi4A%)reWqdV}x%?gRG@a$zhC)-Rl^*JTfkch10 z;QPZD^QH$YfIB&WUwS@=N%?^(MEer(G(Ir;R(1gb)LHnC>a1=+ot1;%fr||TC^mZF zd&NG!EFdvMT-vXgd`?kCZsBCqJ2?%cd6y*Nd|$&=?H~4vFbv5iU?+w~3~%TqRU2S_ zVHJX?!HTS(W*{<-j1^~^5~KPU)s+&%)(ussk1vGN9W?pzSvF<&B;Y-p2G_@I#E@ib zqsqXzu&?nX+NBC?2ZVXYvUU4~zgEDWc#IP;trQ3_)L(o@Tfo87wk9Z$rs{gE6l#OV z3coX?c(waOk}aj~aCUAH#+u`XbRflcsV*~RC708SlE(;(q-#r`gL{tyuXcG!q{Ae; zxq&iMhkSA@Sj#djrNONg`Sv|3>hR_4>bIkJ(Q6OS2e`pS8`}r1(5CYX{zutc+*#6% zixSD>vsZ1I3xt;3^#YfpTL*5wcjh${HB{SCwEjx5Gi7OZJK2ZnOaxI|+GWE?3nuf2 zZJ&Lw3_yZ!hhj^MZT5?uU+2lVF5PJZx=%_8CW5P7vYgcCxe!v!eSgS>*|UqDp73WE zlZWxJUY4t-omo6vn{YS!nLbJS^2m!XXD2?`Veaq5$Ybum_b*qe=x5@q_pCX#d3Z7V z7U4n-?uKNIq2H5 zv}m7R6j^9GzbXpL$xe;2Os}~}Y0c*CZHCSu0sezC)E-6BYtv^SG3&WKCg~mw@A8@# zF?2EBZMz@1Gg_QKJ~L_*%`CjeJ0qgqcA_lIxOpi>4MZk#Tg44%#DXF8ztS)E7bpid zs>lHf42TOe$WkM)fE9b$NNU-7ZG?dYomen0;J!ZxxbI5vxY1cH$2yf!|EJ^ zft6$5?nC;>7{u8L4HXM{-JzcraO~-1MzDCa=}9{~_oYEX7fCZfPefi{@Ui;J9J*tJ zoa;!WR0&~jldWP^xN%4uT|#|*$CEqX_tQb%2UkfChOxO(Q!{6nu_mhd@?|$zP|4E# z_j9q6d3is~06iX9gEz!)$LnPd&8JLiN{0Kj7!Mi%OniW^WkJ^GFY<~-b|R)ko?v_v zQfNf`7@=nYuzXDSl6Vu(Glb&MEpA=jX44eX-#Wt6-9fCU$B`Y_5@LP$@vUB!2R_fk zJL~%w=~i>zTm6i{_GLj9L%KZHEBf?zPY;LrWjJWyZIg%J8|eyjpv?)&b7aHYCJqmb z)(>nMfB7`9HPJCcm;O|5YW(ZW*bUm;tpf&tnavNnwm)FvxYG&C}s*IZd%)( z%o9Lr$4RTaf-lmRylRlLd-Q+*WkgKRp~v$O88#tF zOeTig>y}Jx+Uo9D1D}pxL8|i6xo(|oC!iT_9&V)4y{^;-m_*jtyV2}>l{eqR6N_3G8$2h8d0>8)wQsJvPe3Su@W`!WcfJ~9-NllGCq$! zu1S=uXeA1^v`tC8gV8q)ALOvN%y|_wdakM0jHW)>BT1EyNT1&t^MkK zd|@6N00N8Dane6_JZ2hyfi^c zUZpdvNgyGz#R!mnFz@7lS3|}M%)x6>VFJ7%;o4VyTnAqDlXyU0`Rz0Zhkk7iE?io- z!+Ia4H}8-H8Ag@81(DOoa&W53*r1er@3YkK;ApR4i4v|rx>o0hUJ1a!1%>k$#OWN{ zHX7q~U^lPwd-O7m?eZh*TcTkdSfT;b&Ew0!bb}{^)2v^#c`sch%P%#Tuc5ymU_?vR zJ`zTgKef*?J%F{e%MU&yE+?wjPyTh9?)|{n#~jh4J~5QJC*ELBxV0X?Q9NbUKK-!q z_T`nC%>7WbR>G}ems8@c#W#~gZ^KIq83B-ebDTW!*)tgd_iYcEdp7&xIQfva*8?=7 z0uxj8?YaAtVEpc%yZ~aol5WN!ffPRN@ z7Zlz+K?;gEIoqK~XKy2vJWk4DDjj1tBnysrmr_LFTk!P^>2HI-X=A@=G}9AG(BW-p zW8Yh{9|%2Mg;tjGJ&?ZOdNnLepusQ~*xU`Ir@Pkg@l-d$^|9yWx>+^w|Ium8kYoqU z)USY<8XlObmF-9ks4%Mc1K&q$0B)4nB()l)YD5NHgRPM%@)C-MZ5yfNdKtkn-i5Dw zdt`0s3Un=%6vWxY+qjEGkaD4wF;Miw%%QZzPM z{J0IHE1=yy(7;hT%J}@*FwIaxdvl?BUid4Ucq{)NzAWo&1-lW#>TO!C8SZ%xI`qv|R0ugbP z(5RJ_t0F8eCuj%B3bMeTKO3ipxg>!k9((YKcIjYrBb#EJ1+=dF!0@RJUen#FwnnU3 z&zv^>1gax1b=N|im7m%Gqj}bd-n=g*#~jeCvxZuvfqs4y5oQgQ2GUyX%z?o3z!V@^ z>PN_9Jgi@2$Jb=D+Q1;wCO8>ZCx$GC-AxVPe)rv-q38sES8*48TB^WSA};nw&FA5; zRtRgKwwKrRS)vci7y6esV?C#333ulGrJ-mh52ABwUj+uDi4uJDW47DEvr^m@OtR;F z;;Q6P7EAV(`deD6p4<2?H-CTcPn77x^W*hb0g_YcuL7WB-^9E2uIvYxA*6cMe@U|b zDrNa!Lb4uN!oML|f5Z*{c`+ah*Y5#l0R)=1CJ*5ps9jpMK6 z^FLxoK#=0Eum3}VAS>H%M*M$A{~nuUVqs?P{O3mf^&tL_8pR9@2oJ{G{W?D1Io%;_n+HOXE)i18(-*4$W!)qpL_TXDOuz##y zTo63`Rln%aQMYXbm6nxV@Zq^P%k*_AWk#3w@ra&p8*%&X#oki1VDn)4Lu>aMRiEq+ zfrTK}TgUp|!4o{l^Y)n+(C>iyMWVokwd6;on88~ccZh2+&0ZHK8aJYMxmQ4AwBDBH z(ep#!+wZR`#GOfg99aP2Fc4EiG9aHB@thq_0WI=4e1es2ZWn&v&8 zM;nEzA&*qPJGkbqU*D|IIq@-UD}8z}d1am69Q~@tRiJM=dy8vjRi1B~bY@QHo9kjN zCx8e^u0KqY^XH)GJV|*qog8%)p?*OdJX&e|D%;-qbWCDlOi{8QAW;ly!`MA7C(|iW zjgAo^(V)gC5h!Sw@@5tYxC3A731N7f=-ldRi$7kB5Mh`o*#n@0LPnN+{(RSQA}Ir? ztXsD@D3JrXr=j2}+oA?`tA_~>=GaibvWA7TV_Q{cZziJKC)itfr5vd*~Mc$}y60~4SX|>>Vj=cb*PaC@Q1fKNs z$Madp_<+yMK5M~sb6~MJwf#1ci#ZSP@1^n0(i3Zb#zHd zHs`=?vVcYraGM-w4rBoZ3JAc*(^)+#XsR^@m+r9I&S!$Q7BtF0snzRVPhZIg_}c}G zw8awYv6rzP#X8}e1WsU+n4h)z-*OV@)TK{@MRV>1A;tsLPjn@ zOPN%FX~qm2a2I3>g`zQvtpCO=!wgF67&)i+S(dOhC8cuNMyhLuiA#0&>D!?%bor%` zD#{Bm#jTZEs`S30w`=ZzbM~?hx@+FjOWce|dmXmlFP*YK z=rcF)$UxBnDdB-W#1&H}zu8f7AF*FHWJbtd@J;$@D?nAbEcKXUJQ3wvYR(pGMQ#xTR?lWmG;r zhzVNkCBM}2g1SFSmNYn;wrNH-D|DefQK58UGv;x&8V8aerJUa=EOQ){qV z9lL$wYP;9JIe$Gbs#U*o^>fVZlf~~bm;Gg)kBkZ^POe??a%$v!Wu0u%e3N^qN9Ojx&ae#KiRcK*_gdRd#ya40LC>Bu7$noHMXWzTimR8kFkd5+c8 zt*%++_1oZc(d`Vvup%?ay)G@An*P|#yPXimR)+rz{HIUN6hq-KI~(;j55kzG7G1>h zkMQ5b1rw3`5C!xjkUb-_h8zvt`$GHN|~e8h?`wkyy-@K9*Mfq&&Z_ zJdZVby+?Q8qRl(Aa@OQ))63s^Uh`cMdfxh*4xM4=>7Gqb6m^(xDh1ubBzC5?62`a< zU2fHDad2H>=ne;t!d!uBiCYn^=Um~%dJX%ot2q|CS>A!F9+A!9HK{oar<<%+>lW@j zhU?Losmpb$Ybub0h|xGpLEkim9jVxb9xsD$SfugVK@Ip>r6CUHEDn{SLI%y1kejwx zt70S$)9F)`G+V1i2j*!U;F?$SY=66|D>khy&oVo1GgobvbeGRZDqeo z75E~}1PYLRrI@DfCr|?9Aa!5$SFs&Xfd@Qf1Ke$J)w%J3TBCpzP-ihPClNTEI6I}8 z%`3oPzC zwkmuj4~l8~^zO5_GZaV~6lwt^3@Czod3rb2eR+l_eKSm*>qVX3LZpiG$|F^kR$xk- z8?`h)02nL=z+k-q2DAMK1``H($cGuC$72VkZ{@5hfZ2vN!`u7U;27 z<1?4s8vqo1mn&#{?M$O2@Y)#w1zKYyZK6>KpO(@&r|yWhpQLaf3jm(h|FDA)2*s2hk zf6am?&yjBq)YkoQxkelZ7ADYu|2oxM5bEm$3j{n5E4I$tb!l9=1Ua!_VL@6IYvUXM z&MLK>Q=HNutX2s($VFuZO>I*8jPaMwP;NjIM{5+Ab4;~gu&w8put!zb*t)7iM-XTf z0`H9E2jD=niOFtW342SwyXntV46%Q#tK>S!%oL@N6Mk}Ggi0(^0e!Gi0qzA{?8v?`T{dm zJ1|q}^=UKA%@?UF)=gFaAh|L2Smx{6{ooO$1}U=}j(iNG)F_H3!~Yzcj0+i{d_|T) zV|B|(l|d76o^F3noso^OO(|%L4vA;IpbvI3{H77?WO*sw#m#PCZ7)Z1cH716ZFNn`rhQ{bOL$F0w{XDR9~TPW3Tfhdhky6qRlPggA)@a?y>m0w23K??gv zY%)=~T?Xbtl?orUvoFEcIRAxdT#4U z-n@2?SbBJjr%*}mw^B4elQ}?>wV*8~x@N;2Ript7dOe)s$AZ_RyWRGh@NOG zTKGVso~dx&=wnm!Y0oQXX=Rb|04rU~oOiBOl4xniZ2m)?Uy%5sVRW&%vrk0Pm^hfD zDYQ^xray;Jr$;eP3ng3vPhsvmIW>_^&m@c?PGTgJK1Go*M^nG>_;**Nnz2%+LW%nF zuump$A`cg7Mt*by5I4Zm`5h3HC_c4amolu`y1e~luO&`j&`dF))i{-W#UMDwG_{I8 z2^wIyK&>+EE{-aW(#Qu@WxjWspbrHv@}}5;q-|_b^@1;I>XGXVg}~zBy^)0KOYydD z%Y8o;U5%D*OZQ*bWure|myxyWX&#LgUP-|-D`5|Alx%qRVbE^9#jU!j;+aEkTCQ4R7nPZ@6qh zEwmSQVXdnBX1@{2$(ti~ z&oW54vp1cOKJj{NP@4I|I?d2rX_n_nDLSKn%U&CKfTB#Tsr;8L?XT5p|4UffBQ*Fo zEbXs-|4$GM3&$gZd1M`bU}-=}+`rQlJ+ibv=!*UYOZykDXa7+HfpEs(oUQ)QK-T{^ z*!NEj{Bs2#*PpT)|8rWz!uDSf>%VE_V~Oaa9oOH`qJKdn|EYn0a+&}CXy7l(_D@6n zNZI}k&iZQuS=j$%UIt?4`lI0P@8K5bKkLU9qKNA;d{)X+0Jz0j{`!dolojI@_j^BY zAxvI`RVau1=TbNtlzZc)b2=6#0|ccryiT(^;?tYp>Y`8O0+Sa&>lRFUueVJH`l0v_IJKFC@IJ88>tUu zhWJfz^Xf?U+m;`A?f19G2hnS%XK$Y$|42Kd>Q}#wBJ}la*phufi^?uvphc8#>{`6l z?S_A4DVIDecO%=6bW8k=J5RJFNoP$<3+wygt7+|(mbX7IbXvIHdOTp2d?uLE@eY2! z-wT&9g&N}ZFxc(3u(e*7|D>Jw_S(j2p-$ZUA*2HKXe}k>#)~-o*bV8JwBjd1`%1T! zWItd~*g6=RwLulPnOt&0dha}UJ3G4BBXhLV;4hxWxtqRi$^#h#MgM5};k2OFA64#y z!nK9o?_>|TdH(9?;r#gGPIPuuv)3kBkJP)hu7Uwpho1|+LfxkX#_G*`{S~$x5^^N@ zWuuEZw373@KFm>lKUe1a)H*=%`&S)^N;i6&9f_b7BgnP-rav`wMb8mA73rn)YVlqnX>ltSvU~CIpc%Y zsnQmL{O~RZ*|C=39``v`y(~Onf~IEM?(H&glf#f%zB+3s7iGpQwUVc?f4&_Ws43$l54P9-N!`L&%h{ZDIj^)=kT9G%^kbr#d zGo#mdxHy(y-8LePa8@RJf*gsU*|q*u+R@hS=hzuQB#v;!#d4)CVH8Jm-W5Po(&BhQ zb9Y`*vNw*>j`@S1{@7f8ndTo&@tXCR+XSeGd(8?(G71h2GZKM)ON$1Lo4JM$m;plp z0c{nSKu}~@8+K>NEV9HGAX1Wzi9Bs1bT*q%JZW@MjAM*YYN0dMYs3{V7d9;8UX`2;Vcz0O~A6KY(I)eZq~4wRTjZB28c9qq+%?86tcIOaSyG zI@o^V69gShv;ixM3EK(QVVTXK!cS{OUa6EL_`XEWLPYHI{j}xeDXeJQ=V>!~`Roqn z7^EKN_df$qq?#iLl9iq&v&w%X$SJaFhTWQ{9)#^>S``~+qSbPR23I2qJ>8FUlvOvl zgjL8R23(%np)7yGF?YZ6Bhl`LvMe(|Prn@(6@jIT4EK{5Djb!J4AC{WBu_R+BnPS~ z#C=_hL)oa;5d%_9afe3lVo?{9-f6LS=854EYl8!V=>wpLv_hoE0L4X!fg+zFu;;p= zO!0w^g+K$YqhS-pW6VIukb#bM107q;HF@mVs(TMJ;PHzw#xhh>39dSfv}~=5J4eKh z-$e{mRHZt78lLV3Y*kXNQ}dXsCJ=M-aKW5jp9rBn{2b$(o6viG@-EuGj+yyojUb z$hG$Ref)WnXq}gWWsx(rUbfF+oQE!KNwBaE%r6h+nYuf@K1D}6GaS^MFZL~B4fEQb z-Zt(nCo}N7Ap^mh0+;4AWe2R*fmXJs{c<|xjC6A@1Eh84u2*aNzLg^iC06^_-9^?Z zXUiqEn+Fp531JJVvxw%s@4i-hI%s6zmgU>>4+!0G4I;f-iGkwV)R{{R9W`np)0pYN zq~#wk8hp2jJNqIUdD9VPz*{}Ss%982l%c`lG%L}-wSZq~ek?%KTp+6A4YKhN#CnUS z-sD-*^Ph>{|Is;MufSe8o(*M?N%P8@2*YlUVl3|!QGIvS9Z5ln*Y2#WKgsfSXB zC7(~5iR@=1Za%}~)Y9HjjB-eW*S?3-t03f)pB-WQi6zb7Nuteo?%A2(?Dzz(9>=+< zt{*5$l;+WJ-em|?(*rdvEeWiN`7)px$;R zv~Vjp(#dKDF>b)f$Voy<9h-jM4Qb0OJ6eAEZcERdeKb*0Wrq7P1j9!5qZzm3I{hW< z_=VSw8TQi~9F1o}p{}A%$>SC3J-!77&1$uNAw`-{`odFB2#qbFQB;8KLQSD=aB1a- zqUl*s5nM<5XG>_O3>*GW#C6gpgmbR0kVqS^ZNgdj)Y2rI{C66&QC^zSI516_E+BnR zN)mS_w2`ltP(pIaL_`H&BT*)Lp`bW(lEXDS3&NpMSbKr*^OfjU2IUwq6&VVNs(_#> zccx$Cz?j?Pz!bo$BI`F9x7ak{Gn>7laIfz5v%pBjTykXb$e`tv(^KB7PAuiLg0@$_ z=0ia#kmh7FRON#qvKwZl(#V1y0_=t!>$xm5o+P=f*BBHy%)dcqTyyV09)offV)G-+ zrA@_nJ%=(j+JImcM}ettiCrk-gheZEg+2hJxQ!?5laHtF)1(ySQ53w$&VyOmT+cEf$ti555pi?kw)L8*E6mGGGiVh6qU@#D3rL9yAU|iLZb}HA2HoV zZ!I=7zV#oV(x>)4bDuA*J%uGvU3<@0($8%=2V}V&OYt0QlV+(9uh%cx|DLS5UT+N~ zYXUAXsm-i}K<44EU#BHR+54e57Mo0lK|V1KLoprP1v@Ontfo}mEJRTndkG)1Q2N;h zsWSO^m!K&otT`z~<+OG@(~a#z%9rN#WpqE(DtNoX<^%40G^r^`oh71J{5`5C4sGv5v7?H0r3)=O z4`yU@O+)3G6eJ0-&;q^(OiR|uAH8jN_H6~h}dN#o5*~it;a<)NO6?(xI~f2;HH zLx|z=H1y^RKWljyg{29pJ2`Y|kRQn#W`a-fxdH1$<_|ctvkfcXrSJxU2QWZB6zql<5|&~pBg$tP%^@Vff+di; zG65_nk~+=2>1Le*Wffk7+?=$7T-c)|r^vq{D!41?GPK<#mELb8JnvXHWQ{vsAP>m>IWv9ogLi8$tRc)n&MCzBw32xa& zorRJ*y6?Y=`(iw@EC?+<$I^$2uNrgIBvN0sgwmecWt5u*##aWncYDzp_Ah zS=R@+#8UVrid|IdL4=#hCn(iwnx0o8NA+^ImnnAgA8k3AOBxfwXxTG*QD zSzFjxIO{q5Ng2iYKU3-ldX%{Rri}XUCO%5s{vV*yUz=$B=O+HosH8xTVD7PrKsn-L z9p`Vm@sZ3uwvqkckS|jsyX#Ug*6Z#5@#uZ%%`rEBwOwm>;6Mq_s zMZOe7CaKnI);QLMySpfj#OB3ee|dQK%8K>=LfUQJjZb-U_6q;)&5ND}@oN|EHkrx| zS$hHN_oUIN*&)cuEBE)uGlJUp;#eGN3$U7=KJ~cQ)QOlnOSv={_af~Nw-fn3Cky3h zEBDy1+V8jh3yz@hqzXesFnv8{SI6(Wx3_2d6TnIwi(0crs6TsAui~OC-tM?N?7&7t zHXXxg>gg9r%tYo6!fR)~O9_RpogTi}U-&RM|ABGUGBlq*&qu!yQ&jYs3n5UQWEHQRDG z;2Y%JoEZBNduQR7&2q+>%gxDv^F0N0>y%v`k?Q1xX}SXs6ve|PhR z?|9f&{K&_+y273}bpGV?k$M;8{AoH6`U(ieIxOjPRYH};F zu=8ZFLnOZ6ZL99iJtn(j3^J*)6ynKe>QvegSwdO6J$j)zVtZDp@m{NEE$P))N87Y1 zcC}U0Pn}ytiRGiM2zd-Ub~b9`uNDsTpGG^$=-Cm*g2vcrK7J}z57DUZwY911I^TZx zmaLSo&FAOE>!zRf9ydss2=9P(~vn8lZpPxS+>J^??JrxBXhlyeQd+} zJv>O1Ei@AyCD%(uEPl)&F%ey6`4|j8$QnwJC0ruW%^G?reS&NdZ{`T%o9GW#yL1V9 zkbh6Ec)ctpcFr0)oBjz$VSbW4pwUWx6nTf6C{0*-0?bK_+-;dQP+0v$k9utYXP69^ zVPs>LASRn^e0ox2onVBFu=pE6kI1BFlo?;(=e1PgPZ}TBQjKEHzRLkU!Or3W(C zCJU`UR^9tpbtqUU4c{JYcE-!O7Z4fMOK6Q-2Pi%)qAqE>bpK8w;mD!IBGp=j-E>StJJC*c;^BEhZ&buVmr<4JP1g@q3W_$y^JXm4=R%;b9Eq3BG2@vyf#Oro8HL zWM(LqF2I&$$ybjP-VZW<2K*R`0dq^K#)Ch20P1#D%D`E~0qhD&CH>i2zZXE?;(@-! z0DU7tWf=IeB#TG7od7{iGH%*3{)tR7$VH!Ik~XE-jo=IM{{K$xO)7m;zX25 zj$lWHck^Zxc4e<=X9|oP@{_v74d-q`Sa;*GGnx-4E)Q-BjBbx4FCvay?GH5W7eUK< za8YW0O<4|h)2#3B`PdiY_^${_=a&@uvahT24-}4U_W3V;*4GX1LAdj`l}XFIjj%T2 zBdbq~k;O-I+H~ue*_|*Xwr;#`@p90Fo88OnM)yVhwtAxJF-%Xz1 z?Wuy#OoOUiPzGAw60De~Gm_=5_H8_o0R>CHBXzwKdS@koQV-CmNr-b2O}(%iK%+Ky zyn};YQFPln`Qu6-Wve@UBaJk7GULtWpKKH(9B-%;Qrpoc>%;M(cs6dNwC<0VXg0vI zEX~1lSWWSDFOB!Oo53g2sI|XWM)X2I8DuBMUfHKV0@>a3Q;t0CNBYb~Lv4U+hc+yh zGIzOtF+=@~5D$=wiodAE3vOCF=*!1>bxwSA^HMA7gCe(++{+otAbR>*giCh^^Tfc$ z@kGR><^vJ6kqc*=@)^}8$M1{gF=cwRSKsX98_0!T(tecBqNnY?T6=<(SzdIsYZ@G( ze}pOF4zcO5Gq^Noeu#)IrrANpU>+!0Eo)jm>$$O#T%%qY^fiH3JHDKOFH74P#vzyq zc8bp-$p(GY2Hl+N45(2$*`Tu9rL@^^e>?r6GS7n5 zqV!$ni3oqZCIPBJlcsb^sVe5YOb31QR~#^{KeLt$8CxI&6}qZ1l|Px5G+9Eyal~nd z%m|kg`_$L}!`)d&#jzz?A40GM_r`+-X$bBTEWw@N4vo7*kO0BmC1`>MPw?O#G`PFF zyL<)r&b)i)&dm4Ly!Y2zi|(rGrmIhNopY+{SNrVE)IU5{h9YZ&8dMuO=-h$1W($?3 zUh?^f;ypE>1QvGv5nejd`y8s3^s>!{5$WqQ#F{BHO1;|1*NOBLD`sEg{5FN2=vAtV z=M}%h$a#+FH!1WavoEGP}&QrV``7%jf$!D%wxsSxRp6@YmRQv9X0mjh8B6wxkTQJq%&;{AkkrRjxMwI z+)X#eP@k0o=-%G~-TOY!y-NVyJ1fw=R|DNUI?%m80lIga-Vq?g&?@S^J{Mm6C?U&y zbo03F8aK?YB}%ek7x{>zKch$L3!pDVW1|r67=P^lA|*|tGZ7u%XN#}ltxycBpiu~y z1HGRXV&_gBE(7lX&HH+Dkv5U>Poc!lLd>&xb!=15#*HJTq|zJc%l+O5S0ZG*@=&&n zV!q}qv5Xq8473aZ-&g0-D?s)SeW%IHgAy!5V$V;s(?@aip3ltV=mlRswT#+Y>Z}kQ zdvabWnz(U2MJBZp@UVD~YZ>+Iu!8<*3dhwlWCPULS}7*u{9V*(rgi)mPWNVyX~@EM z0s{r9;WNbFYE|UxJO+xLvMr$}f|ZZ+Xpc3_j54!U9oYAgrB%T%2HtdX4ybo>^EPT> zxKi<+b+D}2!lh}H3?G4ie0`|F?mr?+PabM8*>6XUXNc}k6$>e(aOn_P9R2tpzt4Yj zd@AHf^np?9EotuM-Jd4^a}?emO%VuXloO= zOw44#kwGN=f=h`(#2!*JRXAP)5Q4waRrSGUL-@fRjeMKXby#d_Oay$28JL%1jD0v6OV(1oErZrOQm*R{34gE8 zhWBptsiH4sB0jiz#72m5bXrpCG+wtrfE-T*xtSD#09S_TBRGPFbgSH{lB^ppD8uLh zE6AuA@4#-2n6s~4TOvT7Sd0!rozvF$4>t0H?RnJ)p;Jh2eud5N!D5K$dI>>@TU|6a z^Iz~cceC{W!7g0PDqQWw+X%vte|J?4LC{&EOnIR{i)!j02)k$LkI??Zg@pp6+e3=Q z@0E=Xi%4KYE{IITQw&%<;IZ_7x?TlITUe|>Kbk_QnMA0eS}q8>%boU+#mv!8vAY+v zx~Yae>SEVv*zm>Vx7E?x$I9M1qbYo@O1!Mo8=;f|aZ(=UA&s-+kfK0A9-?s;Ugb$e zJl;y}M;_*K7B=diWsI`t5L=%?j^lFfRPUFb&&!&_*WsE|H#YLsT>43{KK9P7My3=) z-g7LjoS~?2#L3i}a#nMIP9qJj`=yhwo=TJhxss!Di5~N&RiZ>KVj(Rs-63R^az??Y zjoI_>{!*vMy=j#vRf}q&T2W9ihxbYRTwM=XNBlu$!B;o)^A@jlu8+CSVS#}g$(Us< zN?`rMt*p84lfk1J;v9U~0+Q?AlFX?v?aaU4_Aw*mqZqXs29)d7Iu6RIO_EC~pW%Pe zfJg4DGX%9r#Igz}dVaMRUe!qDVJBq1Dl~vr9%^%zB1Bw%!A&liKQWMztC9L|{<~I3gq)BYfi( z&Ra{`xMlqcSVq8s212np2f%7W^A5JwyV`E0^n3JSU6F(Bd^tettgYs-tjs!P9}w~S zT77QU2g9)Y!xb&!V1!T@S=}+_g_Jo>3#eVB6ic|z)rizjhT5O|T3KESyd{l>{EY)7 zbSh1C=8S#fp(M=Yp~>l>^S1gfmfD8`=aeeY5f0ty_&eF_6m=0o=Uv3$BsUzOX-CWM zz_k`9>*-elW7PHV+z7n&5)+lY%Juy9(0KHK>fK5T+#oH(^cMtfkV*{~bTjrcb%An9 zNbw*)qxa&$t-#qSyo@o@FdG>;S^k}&N?CT|V+)1dW}&9izQ0Jo-6FAhk)Gv+wvL+W zNqOtbNpOn;VVC5gd-jTi#O(QA!vo#(F3Fd3R+{ut0bQVb7SIK{=UbQ+|A=jp zLfE}s62@QWr>Kcts1J*t=eNE{rxjiYQvxo#B)~scpV}j4c|jGw7rga-wQh_m$3nAF zNbn-Y5i_UU%E#i~TQ1d6IGB5zstYpfw^f+JnCgfLdF~F(UN^lNL#Ej*bPqkIur6#J zZWhk!uI-$2@!{%kQvBtpp7!0T;$X(fB*J)Ba)4KB@Avu}=V&mM#ov;lcSMeapCi!X zEoVGr)#5NEohV(0IBLqF$GuC{`!dxDvtZat47jS>{9cD#{@uN>X?RaKUc9ce_=^sA zj8lodgo-oOE^%^9^Rn#Fo?h6jx~1s$?stNr^~(U-YKmb&7bRYp$pfSfue>avE|I1m zB4yReB4!9&7U@;Wis$VqVn71nb_A4u$qBPUg_>mGWkKJfDi=D6KtX*%NA|W-3MUVo zfVrNumZT?3uDg2rOG@;)zqdso95Xq7m%j;V(h;#>B?aG%@~lyjW*x{ck;3k zsLM!gENRfU-PZ8zMfk`AuYrPG#mv`&dsu*Px7^j{w&7iV_)sP5OW)4-N7LmGSED|s zAXb?4{rUWbAq)Pimp8XMLPq(?|CBWT6=nS&A&vk4sDM8iWBuo(@sZ;F4xxa6fJa33 zI8gNgoBbO?X6I-DfU&=iz5KIn*MpMle`Ay?(}OPTk=2nhGXYrvzX7~QVc0{F|69ca zMyviq;r=8E`_F$l4))*1s{)J`h}8s&1`MXh-pBc|eqq1y)@JjS=k@C1G|A0s!ad)@LGlpgM>)+7 zkf&#L4xpi%Yt*iKfgYf#XF0bLyC5okh%r^#=scsYfpQqR`$GE@ZnY^eMD#kO{++eW zlG5zzI6OR0tB%oY75Fiz=c6CF%i!W7?L#qt-W`#n^uMTCp?W6s1Pn@PW!xyKB*U?= z8I$Q9=bx&HEl;NwfnziXE7?xfE!DIS=KqL@9pc-})9;c_^{fuMH+#cE6Aw5SAzw&D z>OrYdb>q_!E_R`&f}qM~K93=qf z?HyW2?b@l0PqH`he)N5%Eoh#zXQK*qXZS72uVj0}M~C7-oXEIkFurt{ z?rhcf?8$EJnjSR>>!5>@lkyt%c>@u^s;dvM>iXtmb|si0*cozbh-IetDYI>TDWIq% znB-@Jo9Fv={!77q;zh(?e4UD&+FB%1iiPl>3levwZVwlAny4d4NE&X@7{;{t?~pV{ zHU_m@TvUF%zd2nT=(sRJDvb{^y-7v(KH#{)ZfTk)Flc;x^C}_Y-qYp2Y#Oc+VR_64 z-cpL;NF0p+{;BY3zCbT0gmH~f!~MI;vSn3T>-W7YF@j)&OYA5u^(F5)38Dx5+Z=l6cfD7(I(^6=hU5k8w>sah?-^X|^SMS4*)rbN zpLp!L?T)v?yJ(%c_Xgaid3(*BPU!RIBR?0=xV&SWOS#5hom!h(R^|AS8fHDNNg`m` zU9lY1l-*VKBCO1bFvNLEV3?zN9WuYi(z}Mx;xt>C`zl!n2oBZRFgLs|@Q^xbUEkE5 zS)S8i=0JIq4?9^fJit#vHn7!B#g4>pSO5}#*Fw0e8f&cz6>nE*sMm7Nq8(ZA^<@y& ze3({3?k>(kdt7E)F--OIm8&r=Efv-JAc(>sh>yVX29#Nn3u_^+b!h=I!$n+2= zc-~+ky%MU*pU$cWP)Oy%G|5h7;8kkc6= zJ{c7*TKJ8>i%;NlTA~NHzWH`ut!CQKH)#}}q83)jG-+RYHJ5QN{VWg_Z+$_rI`n;^ z)t=LPR=s{a+)wlAh?!ngv2-(2iKWBYgv$n?OZ<8|m+eNlm2aS#pzO2-oV_^xo+_hF z!zRv|slm;;xzwW5-l6Us17pD-=g*oU?(R+9PkY7D!&k~;mKx9u8lleRM|}o%#Qi>9 z-Rw^n*Q6E3%h=%r4;wL!4{=@eZwA(_2j=3+taDB;6nUUcEs$6@;f6@6()8j`c6kV)-jD+o?oZTiW@Go zbWSx_M{F}-XpUKrmyMA6vE3B;vFQt`l7IQgmQ}&17q$mWB=}L>*9W_{HnWUTYqoSJ zvD8ZSP)L;nixTOVDiJ{ozGtbBYRR@p7d?;2Q4}bMQ`4NB%x?EXmvp%XnN+Suo@eUZ z=bvuZNoGsvkuGRetjn~qj+PwmxOzEF{Wag;^m5S@nfD2wSeu67&0)%!hN*%T)XBH# z62=0>O~Vr7#{wlxwQQM;8Zd@xbts11)H8Hy>`#@{_dOI$`2dSsvIuod z>9kFQG$THI<+ql`+tRkk@I8Ig6jl7XWyN^(?{A`HW6ctGJmcH?OWQd2O1q`D-<6)F z6h-0Qi3kgEASqd6J_KefSZJt8#}wYLP(DWBKiGb(;zsxPc=?$I<|2yrMz;BOWrNiES)nG&G|f7+ zg$<>K8O2$l@Wok?F-3+MMOl%tfr%h1vZBbaoFHppQRz?ox$5d5h#IMg@Y>S4^ytCZ z)+Hi)vPt|~7a2Tp)@i^X+znh1KG{EJd=Ofv+?K+;v$4091k0y8M|f$W?i8-vn)ds6 zPi)_`GkO?-<2v9} zhl+~IPY7l7OnE%~3A^q~Sm8JnSU5UHSc-v}~#2T=*OD#c`E zW{D3niZXf=p#j6nbZu^p8ls;LGbs3gaPXQ7YcBMTlXW|`E)P#@#Y=fxFtgmlb7eS5 z6VXEo3@Q~*K~G^MU3VFvlUA^6pN_poc`vQ?#9T#Vxk&P0j8abPi5>sm28L>#y6vl7 z3^dI23dz^I4SABUk!NNpGr})#w4Q8R+`Ms5ZZE zY`yb2{UsrdGB`-7!AOepOa&*<=%pxEmO||HMl3auQeY>N4NL;<{JvAaRSG`xmzLlA zoRIZiJD1F6D$~w(KUcG`ePrXpZ{t2=2YTtlF+(6)OHRDCkBAi6G zUE3G%TdD4&vwGzhJ?JszgiQ23=yAY=rU!kvoKT*ohcB&{SqD*V?iGd_KfRpV+}bmR z_yOfI1Fm-iC(3{?FDhy~@aVM!8T{K)EUn$s=ABJGrHTF#@7{~CK3 zDkl+;Fy%liF-h}aAIBLcdm17PBRvl_wPEOEHBi3M0@oR=k>U`pkkM0 zEy>S;w|u$7k_X98dG$+w;#+D39xtJ(ILibh4n17kmlQW+)pDdW|Mqc8-ZOtuzfz{c z28IuLJNjfm7GWvOqq&}bh~bqA!h|@{_+${V)5N3>OF0;1ZZOGu)^udG8*gOd{9JNn zk*|ZPXCRco?e&u2%uwjpFNw*lK-ecWpcrRjGYig_SCk5S`{*gzgw+lRFo8J3;O6$& zO9=(3Ix!lEsxFqVy=gG$>ryAPS+Lsm%1b`8U{Km}O$>?^*9!;Ihs1=?w4evO2dDO@(~FozLHL>G%w92{WwM_!KYj!?in78&k=k zfwyh?n85_x-Y!#Q{{A*oB#q9);$0q}KUDe)KK||$4I=;JXJ@ASi*t6@rXh=a{Y}rO z2#o2yk6Uh!X%`I%F864*>J{Z=%R1Uji*5^hY_t^wECoKLqg85_qmD;}+mAnWp3Z&y z!6{A#Rhg5(7C-l#Lmesue-Wkjd_ke0WcCT30f81*3l>RbDrEYU?P>15M!FetuVbJ4 z*W9&g<)coPm#oaMCCJIC_KwkqbXtX#%nUg-6v)ZHJhuhx;R*GD*&H_JECq573$qmq zr59G(xzQF=nM;-fVn%bC1aZFhs7joBvkF06GeU72C&Z&&(*sH~;ofb&)!87G%&2d_ zj5yoAym=#KYA7a>9fcmFb0R9`^$S-%ADG7nF%bao0pHp5PDvS5tV4nCs-A)GI?x`G z!qD0`dJMCJ(y+n9*TN!{uoxfW8oo(86FAvFI*reja`W-oojaBCK>~PLiISnN@Y!8p zw~v5+?LtHz_`(>W1bjj6)WqV#Nindnh{g&du-QSDRbDnxD#{`gx3uQyR1iSqbT=Lf zR=gTg6$&FN9no+%66gNW5#>zs5fl8JDF{B*e)Cv)nIt=B>Yd6X@w+-x8 zC)BUS2>_yj9+o!M3A2KYH8u5=E2=%CjzWhks@W6P9^SG)y@4VbUCMduBC(-9W5+bW ztQA7QG(8F2omG=qmQ=bvw=f>PBMe)@+xhyF2h{W>A&aXvCg{z4x2~+#Qv@KB7if4= z_rXtdfnbF_!_vc7`-W&5SeU6Sx!+=uPVnEyV;#mLIKBOSABU z^%I?mfRx1c@Kselo+k73oiC^nrJ;Cf1~tAqDRRi|pwI%}%9v9S7Un=Y z;?d;KTleU3>hpxt2!_UJJ1@1{penn2jT)VV>vN!q%;>1d?zXSq0ZkG9q>zFzQbd+;OYuNiLpL-R#1A+T< zO5<%0eKlr9!*&v@9t<0F=4W^njjh4=pUB_nubfxC$-Q^;H)PeIO}Nw&U!{tB*}wqcD+sB zmaAkjC#VGCYt4~!CtV~V%z%D7>-p)({92wjtx9m|@CR}XGpLEw$gb5-$|^Cs8~JpT z>^<%Q6L(9GAnpwTts%2MU7ldqimh$WiqVIz75;>qfOB)@8@aR5<7I;HQrf^J2>KVP zIfgYFoYi61w_Q#-b6DL6#aBjKw}w>8`(9XtF{{2m(S{x;_zq1>YJ7RUNn|8SW2C2j z)BYW_)Hx@)v@GE?@Tj!rc}t1<2%T7$8Rd?tshfHMsh*$Y?WK|iny4;;E|a;0kT=hw z_G7l)J5*Y7PsmOru;zCUUFJ%nrXhW?UKY+cqcpP`Uv8mZ*4GKfQDuv~ymmIJktKYm z*AFivm4QaV>5A+O3enwLTt*%YkN<2@lt#4h{@_#jDta0^@bYYXve6sH0+cD4G2_AB zA&^eSj4XtQ=A6fTh2+et*rC z)0fQ&DGpATJZ%J#Ua!2ZclXO}+wuOjQU*`R@>$+-#Hn&_4bNQr-i!4$RZYp3wJ9_ zxsxkP#H(f)CEc`E%3j#}o6~hk_rq&zXMwvNhQ`}{l-vZoSHG?;FpCeiXK`NbzWU+S zP^|bwX7V+Mv2^%BR-4VCvTO~#^acXbBj)Y#%0B+bDQLFjLWu~0~yFGy~X^AK-tYHqDOeY}Wn zZpG#dbZ5pBP67Jl_~X0nJ)-vdY1-|uTSR9%>H%|Rxu*Yz`LOqm`}@+;Z}X=I`5fvO zcP%`LzFFQyQaW-R_!e~4@SoLG?+=~CpMffy`BW}*x>ekdg`CvN1LzC1Jh=x4IEW@2 zBvLRnt6X^#og2?^&gnipB#REdUOOz~VK32?G8~?X?;+N}pWuY3t*z2w{9Joc5rej< z9=cAyB1b6xpsQwMWEb4R7*t5?K6Q#bI(Wm_ z;)8fLwbKT1EtQofoqy6)-AQ>-F5M^%O&>#?o~Wnqh@gYdVdLd7sn=ieg)EHjNv(J; z)cU)#Fz~^7Unn*S73wFW-u_91PDuPZoAbgbz1EvJ=SEf2LcR&3UV;YzHSz7+)f6eO zz+nxTn34T8|2uLXfy%AvVOUH^)m&{HW+oq6FC+w7y4OwVf<3wl>E|We=fe+u1iZ-7 zWSB>XPpxGSSW>TGURgq?wOwT3MzHY>DjvQb36fc#-uq$zB#y3nf1MWNcqMP8<)cpf z8jnQ1;0plixtqX7vh}!2ie!HIl4p7v8>)4pFwI^#&m7hl4Nr%O(yT;y*?zp&god%e zLCHJiTrMZM*&+xTY5UIC-AJwG-f~_OR|I|$EGsD!XPJU>%6F8<5@<*$?iBv(^QeJ& z2H2pM;he>xS;^|Hxr-u0`o6{FR=0q&iLZ!oFYb0vlaDC)I#vh|FS7p?C(lC+DfLep zjTz}9>8y{PbV74YFBsr5oEnX?N-Hu$|#jUqq{b3-+d4zni$==olXYJr{W;EOG$bahud$`F$ zBeEdg`v=2&csNU%vuAh{W&Kp|phrf-(6>R~OG{aFZPE(0$%vsHP;vLTV*E80m62hW z&bTM^$rTa#g2{A3+BL?5+l|K4L=R?OK0mcWPs8Z5<8^(lH4PbNHGhnG*Yc{l#>Hyx zlvI z;Llems(XF)<>1|SdXqCnoq>=kz^~|BjPpQ~FfC4GIgARw2@CjwppN}y6DUOyAS><{ zR6!sdK(+uBgq#sy7|uP6gqaEfFjuRH^FLhW;1x;% zn*#zi#~;|7)`!jE>SNS$CvMsc)TF@f{-^<~$2mem8sR-Gt{KOJ?S~-4Lbe=v4XdOI}6W`~%SJ}Tz zH=T}=FYzeYQABFLI+>U3xxc|_OV4wxZM9FKh=Ak z6V#cCcIAG=%ir}0>`W|GRFo)B2E*Qk7@&SH)~w6MHsN?quM}`^&JWj?7hJS8Qsi+Y zXALv~J$H%064382sou~1@kDHZJ;2+dxo@@_~?}f{Vi}I(ZYwjijW)WFm#nRY-F}|-7`{2{(V|q#0%|`C%nAE1zv=HQ`e$R*8%tQ zcT}V^?=fxgmF_G$^3(aXO)m^i2MO-123F0l4!rJF(lqAtCQ%`=mYjZuVVX>y{UwnF zQFOFsh7NIsQFJ+GE5X6|HTpl^6#w?}ivKA-$TLc-noCBa+#mGrM+LTM5HBlv`@#$q z4MF!i@ef>KLeGAg@+y#Fvcya|U62!2)1y=!VSqC3F7;?(`{B}*yRcbAW4pZ71N}oL zKEzSlwJQYyM)-bT6HQuxG*HdrtSpf?7Tn70i&qP@QMpeQ$YLs7O7p2^M$!UGMk$ZJ zBgh6qfHcioM2=MX*nxLB+C`CzTAP;Yw}zCXTM2~AMkFXN`k1uO7HNU&dj97=hcz7R zfdNp8<3ZTiz(Z1o5lMHF&L0}fquZy?xP?*MX>pA+WP>4~{Z2E=NPIlZ2rwV)0n7*E zGiMpVF&;Qiec9vFJBj)c;Q2#ZbE9>CY&9!Ooh;B&x!XV$5Noz$HDCA=Yl>n6;2)tQ zfZXS>06t*iB!8#*R8WFZ`*fj8op-{ADzTUkb>5eF<~zaw+^DYx)!JpYn@#I)h8Evi zTznY>)ONr0pc>a{l|7%!mH^x<)M<9#?nFCX+QK&VQeDDkz<4(ExOBhj?s9JnCiGfizGEkOuk{NCWKv(m?xwG|ToY^7&46!#KOw_i1qBt<^li?S9yub;hs#fkMwaBmQ->ZYg<^U1ys_`rRnl7dO~WSDpAT z(73DzH_y>DvSi@$ILOD)iOa@xGy*)@qT@a?XO+wO)0E4-5ySlnP*@O?8Z~(izm0~x z8nuc=tdg8zw~%Y-aIHmGCiaYa)R>zvhdO3B-{6+*Zv0r%EciPi(b(rWyNYiGu>o&e zKCCYt6jH}|JS)HrNZe_Ekt1o8{)09SJtmu3zgFpu68kb*Odn^PLw;x;I1W0+^R!&a z%J+*BF@{P0kFh1_b!8SSlL6rglGvZEWV|ndPbP%9rooPeZEI^>y45SewbsiwdKG=S zx;+OX5pIN-{8<0%zJWIFljVF#(YBLpvaDz`v=}Ad#J%npwD~#uzGf{9jq(=Z!_~xg zCUAw=ro~9JCNg1sgF6~^*{<9>Ek`xe5w_AaZ#9QKFi_s(23S*$W1Yt7V=HPZ9-)uN zeyPc!=wqWKvXz#fr+LTJ&gM;I^Dyf_v5-vGs91=qP)xJM)83^XY94$gQPy3`d4n~^4-kd(v3e~VQu^R8Tmi`$?Qnq&MZtvoVfM8y^G(qa6j0{f7Rt|;}urQ zZ>N^&ubI!LaD(e#?|ac7;n&|sHZ+u+-#@>(6rgW#J^81s>aU8Y|0AsG{~wyb`M;!F zdSF%mNQ53()t_C!{uL22_$T1yk9gyMfU15^CU{VK{SBhAKY*8iqxAX%MAO&#ClKwg z)#X1yLhKJ3wBPaG-!y3Kj~cXpjrab5g!Fa(5eac}{xJ;TfAEt%K(v1>*ds*yZxzho zFLV#kp#8CA|DIKGu>M(t2CypPD)feN#hY>1aVxW(z|<_X?f;ohxn$9|}k{wXCu2;3pY z49fW)k_NB;kJeVxFE`(cvDZfU0k7Q4gM(Z5Wvh-k{u?C8qA7o)ca9>eqX9Z3cP?p* zvxxUiIu~c4hWi;$c7djQl)DDr7j03mA6S5L|TRcQx>zHB|2nt6DxW^-dS@#e&Xj7kj()h)Z)zoNeR(K)jx&Sti>3=i9 z{+YL=0j319$z1S*BP6b4!dL4}Bl>6;zAxXcd)e!1l0_|4D|d%f94lz)Zko{SD}_4! zrcYxURr+Kja0VzENWE>nIQtrs{LE7QCB$K<7W{?hR8c6d^Uc%GZ_H%wEG@;}+ORKM zI znTT6*B**kLaLpr3nl4K;KNRz7hI-bt^n47g^G~RvgC8z0z5P0!0g=K zn(K239TkHzqcPp`)(@&5HXaCIh=~2f^0An7Nru9xa~vO4rTp{*HKk91R{6&*24Xa! z(huwE;qZ98u5WwM+24h<77Tu@nkFBG&d2MDXdz@o?yWrB=p~&jkj#G0c$(IlU}ke! z!J!-Yk0Fud*`NH#r!!sG|Hh&Xw$Rd$E>h zGajAXHR&8-2QDVb%TX}2l|>xLWsuOUuu7rR+yE~@w;E%v`I2CR5`%Tir^gGr3;oho zxF4;|-xAvx&!;nYfu>j3hGqsnNcs9})u)9MkBudAs7iz8$+M@C;$f;LMc+fBpw1&WeUt2 z)&dm@MFN^`2gFdrHPxBPA5=;F?t2ZMZ<)2od5M$PTvi;gj}e|H8zlF=`@-*I0Ey1T zT&aL9(1=MZ{rIDjDncKh^y}yKFmu*ajx)7ZD)}Qx+GHK581*M6-+}-u>*w(ZejlKw zEP$AY6uhQr?58lQPQkiR^x9}h`Z2orqKt2McY8DI2-mLcMQ|uQtiXv^_^K0qqvcSR zW_q?W6`gpHtt5G27O{y5dXzc|{|_3G`iX8D7)XF?ePS$YD}_?Fs#(EPIuMYj%1C4C z4{g!gkpGXmOI7WJ8W%&7@OnEbOYk? z+mp4>FT9hAvo@SvF!m_4Y@Oc%hkfdek{dUpi)#ZLy^4-?#x4`Qcr*L= z^?C;ik1^48zW2+ndMc!*KXb85O{ZP!8NcLnxG3ZnKtE{X79hG3cl6|5c{zF+{Yj#`GK_h|Cvpg*r=rlsF*w)XM7P(#MZb$4jehEo z_i-g((VfDV%8e?2pYgXnbcBST;b|tAebMS3|5~LND@qV%>){)t1XZMr2C*Fvsbbel z@fb#S9N@I%qXfy>i?&4IW(ic__$VWhYQrc|pR5&D19{H&@J`&mX~1q;1U~Ipi1H+v z&E?r_Sf&1{6&$k4Y62HLDS4T_ch;7}YdN)Yq}RblXqd@DV&9OmqK$Uc2Cb9g&=ldJ zv9W>2GVmAz`#xm3A;*`k#e!L;@)c3JMsCLgS>>)qOnAev2fH-PvzfTR3mLeYM3naq zv8)DIMV6Ln5ISLl4F)LG02^!Oz;0$DZ}}+TYQhk0n8G)Y0@Oy)O`0PP#JDkgBY#el zkCrm0pkSepiw3ebqe0)6WI)*6g^qS_BZ3Y6*IYIzlyg!lsec;MDeT*arh>Yje}akp z#n2C}TV;vWxDZslg3DWvEz$B>qwm%6L400)T7>=eLU+*=5NP1cR7ujp;tAC42cLLB zi=z!G}<8_7r*E_A|7v!Z3b1IcXpkR$src*`?C2 zE4a>p!@SsG2oJ}N&m8F`Eb^<%_IRR3sDg`Zb!`(+DRN_mfS6}9itGF68wCQIMxaB` zu>tqJ0-6mS&}{Aj*~i;`d_Cx2Y@NdEGZy*EMdgg6EJ_+!~Q{G!VZ|XHrIP}e? zz&@TXqRSQ&6zIyd6UwklmIqGtNyDfC)P6W8nDBO+rfD1I{*@Qfpo7WnqCM}c0j>?w z1ew)W9o3b?bv&b#0VOw^9S^5L@dC+>{W=)28eW49c~o%Sr1f%5!;F z4A|_~1aDG+18Crh>DLofQ*!rBrV$!_2lQYDj9Z zqMAECCn>|+*5Iu7Lu)Y(2WyK^mN`)VnoM96ZI%TvS__>Ob3bmW!LZ0H%t?70b&@W) zd0D9@3R=pJDJ^>|3^)eq*$pDWO!(^^5Nb0^p}3L5OhCwe*Kecs(NeHtK4&G)^%K_i z=oLqh1NL$?h{2nZy7C;jJxkxder&f@A^Dt`Z_N2X^`&4~o``~$;4zV#P8xQHXR zR>QB4I;_b(yoUqAq}ksN2;ENVqqKiN9&pA(68Y)&;@`3KYQA)K{0ho>*n&Z(2boz61&XF*{cpaT-D4aSy}N#K|4evbvTfY% z-n{0Xj{5wXu1Ke`W8F=iSz%=O){1X7UHF0s=cW@6fLE{N4gyljdt;y#T$%ODu>ukq z+F#IOu4;x##G(%eF=rj+bG8{~g(en1z8oAT!i7tRx%x}yxco%`#Kv4Cc{{A;*C(68 z50D7+3f2Kax6DhEQIh-9iyYI-?L%zrq$5Tx!W`@*yMEC-xA*OBC7mi#e7Fhr?~DnH$4yw|%J8koo$HVfy$0EThGrXkEo@yB z4`-_KJZv?S?(E`gDp@rkqug(?7%tvw{r{F5cON zPX7=u%(A0XEbC^HX%M%lWQlOvlGZmA!J!0Ba*~0QoSB-wuWdQnsua$*OwqO}&OyjA zeqpOirG*qAT-I)=2c<4@H)n}>NB+Y$2sC&DRMzm5Tas!!JH_%yPa9f_Q`{@e?XcK~ z7x6$LJiuh)6QA>9Ur$@k8y7hjX=cSv-hLlQ5~KpVBtjSDyl<(mld;nX=Neuv;L@$4 ze1@9q?vZ?eLn>|{LgvTUzyJT5uWvr!3A6oc6AC5z`)4L@F7`~ zlk0y+ufz6$jech!e;d5W_K1!CTMWcb&+0D}gp=!!cJ}`{o?&|&yZD=w=x;=e?SUKp z8`Sm(qGj+;h!)o$ZO8rxC3}Q`zz_5XQ#7_m!P)S4@m$zXz-k9#?eKWdinB=I``OF~0=h0HWmvv;!%XZx4pKG1I6_4CA@Z4NN z$QvQnmHHCh3F!j!x99!bRa`gw3OcR{E$w?9R>bprPA<+s^yam|{^PjH10TzQ-6vS} zo*F(4hcy=~Rnc-EYZlTQZyiiudEW2tO{dSSR^87ouKpgqiSJoIy_9{6x}RRMO$q&K zQrC*1iNr--zxu*$a-Jvc%*L;iZ$)?}MQg!b3v@!{@t}lz~#=1yVax3d1nDn?ie|CYiSuFKgm<(L?;wjzH%M@ zTe}Y*yzPj(1|oX;t|89GD||`#PD!0W^7$^#LHes{q!;yInK)sghy9ivcEO>=IYK9Kv1JRb7$4W>{`-_( ze|9;m{S~}RYMgk5x783$Q;m}?_E759ehP?=Un(5Mepc*YD&t=4(^BHA-E-Q{Iy?tk z@eH4T*6kk>#qSL|hHV$5$j>=%43){1y(UGbAlD_Yl_404cRxvH#Mzdt$5VV1G+}3= z;C-9a*JXf&yUf2iiq~`V)GAY%S?hDN#;74B(OK9<^kjc|??EJ{VZ%<|*!LkI=0jR2 ze3s0bL&J^?50w?A5{`=a z?V9~eKF>}N21!3$|2vmjw8I)`5nV1=^$WCpUPDG#{N}4SC54i)7?*Q5@LKX?&s3vxAy$4UEpA~G zdb0k+{Ih+ChD3jo&^VecOLY12*RTWUN`AC&B8-)i4~nL~ry;{ePT>UA09GQzK)JyQ z&{@Rbx4O2-$D63}&j+XyyN3fLQt&j)0U9DH$S~Suy=!KM^{u9s!HicI_hp|2`*KQ5 zo-mTsB^jY{j*4{1(=A6ri_EBeKVp%n?WM&rNPBB}UmE;@DxeO40Qzn~&*WSimL_&5E}48_B^VF7rTH12%}!K?E%ZAZc8Fus__uLjUFsRDYYU&8i)o=JnyGY*XD0|68r zJy1DnR4#qY-kHl63Uu8P@z6?T0AVtMVv#8WPVbF;(zQ>6jkZXQk{CXeA#DwThmG4? zhs@)XwpXI&z%48-=J9}}i3^9d2aq&r*83Pik}^Y9DxMeA#b|&3_`~U?iY@Zs=-9c1 zWJ)p7b)jAgHHa$C%COw6={*kQ30O^($vd8cnrffGAKxBb7oG?7dQ=A3G{9)u2Kagd zv=qXau%$%)ej(s0qFI2goORRQU~>eB7O*ak&o-%gF1czY@P^sMv_5W=9}&JGq_ryA zXu(&kOzPGK<1r60mbK^07d1c=_ONAA5zXd!IDX5D;S-O)#XECD>_7VuH?uYWk%~4vt{MvVgWUJ^8uxaB-%>=exzn)saR?c{-ug-o zO;Tn_@H0vxqbHo(&cU6Dzyw&igPjh~AqE%sZ;yzbM!M&#BJ>keXW8C+sqV{*GDb0l zFHKx~cv-)yUIk(tgwuii(9>_#GLrG1c>JHrh-zz~!dmE@Q#X9{@VD%UGVrkGS53h! z?}_HKkl#IOZN7P*Law1QKQ;c@+HRz~xK77Bn!VLB1aH3$HeB_km z<(;+Xk{A1QTB!Q@reO&a7EkuQI?By}JL%m@@Gy4TG)2%;g;Xf&Aa5d#HNV>;4e0q2 z*+X*;=-87jcbb78wmeY$vPK}}K?vrn&*+#&P(rmt-g$*t!r=wMZ=_Uy1^%SPFKY`i z@hguKWzA|oBCFN^9EifzP39Il9BkQ@Sur~#_O*$hO&uJLJy>p66o-@1O8Z?7xVg`E zQqEH3Q77E;VSef0D|M#uSpguyiXRNj$KW>1l`v^DL<~!0$V7KMBnw?{Iv(oX%kX=n z6h8<(x_T%PJ7^ghJ1G2wJ~M%V*wXSHFYWY>>rJgMhMTINv7aL42`ke8Qwi7PK*@AJB!+3!8%8yv3L{-#p`QF@7R;IeD4BWyC6n9Vl}tuUX}{kb zZ)diR0H9e6*f$XZ5~2Lt9dqC&Ikbg~V??yk6sca)iw^({Yj35ejR$>OhbBZ-g#hIj zQ35MU7n(pgKbzzh8G0l`mcT-DpGiu;r=G%Ou>|XvR?yMFO;@)_O|*_;`D$s3GxZmQ zA?dr3`{vC6(kXUk1foY-B5Zp@P=e&&cf%LFD)V4yDS0H_Wc?iz#YpUo^>z>Bz|CuXw77b2RlZlfNPxIemsc#f z`8l9Mqybcj!GNT!T}lf)bycXUbT;|zB6Zs^YL32zxg{J9)R%f2sQ+6-9iyY}xUAZT z1yfr8dLB6GrB?6Fnu1GG?;WA-y$4%(QJsw&32EJ(toNo|a&(8@jPhSru7@I9IMap# z>iWr(qdlFm=c-Svc45&*t4^N;{#-wO67OA7feVGQH81Ql`sV)E^NZ^1``HxeaX9Sy zwoiEi_bp9HpZgneZTRVvG|Oe7w%}dkW^X?u1-fU7ocqNf~WAU{ z{OuY*=Uyy(2nZ+k2ve7ojRP_2E-fgxhq0Xw*HYbJC1bX*#gc=zNKr{oN1@xkWH0>^ zB+d#p%Hr=5-tm5%NR> za_cUZkn_R(R7n{FhaEd=7yXXqulI5E5P#8kDjJU?cLNGN%}VCeXW>DzsY~^c z&$^~O=2)>i*p0e8?~b194v9^Y97>*TeHDk*IBXGs+SI1V%0zH8MfU1{_5Zj#>$s@a zz3qb_p`>&-NC*twhyse#rn`pj&Y={fL+M75?(RF#$8?sFdZ+57DG{hasw z_53l+3YfWP*3Esdb*<}neZ4n}P|0)8AC`2p@ZLMJQUG)9MYi0LWGYc_Mk7LuqkRRF zaH5(jq4PG#Gv3LlZ|L{43mV|nwf7%C57H^#C_1MBWMFT4&+gLz9T=tS2XQNS&1mNj zf9qhGmdR4@U~&9#C>h&){?O6XbF*wk&XlvM&++hiRf10Kn#)%87iko}msa51LFHU+ z5!Q?A1CpW%TGclTpQJIIV;i%%MCL@MUL`Jlk+vD3B|orznMh8Er#(eWPN`iX{d`R* zPx|@8xjEWTey%rMA{-PA+0xJ9=cZ^s6vT=`rLH_Y%%zp>I|KfuPRil|EBH)@`v0W~q$Fz31^BlIhdEA%H*o zvItyyh``$0QwL5vER4&oXJps~wx3sec8rm@;owAbgWIxrgL~@G3wt1M$fLQ3JKjAr zzOcOEh2S>YCo>JziK%iq^p?~U&>CHg-}_Hfgw$Ny>gKM>(F175g{n7D;6#}S5Ng!e zP{6J7NTz-{?E~RwFp-1Yc^}pRFKQP#Ef7^WE|i_kvtT|I@XGkxQU5wHXa^CH-YR`b zj{|Wg$m%0=98G{t!<_Pl6iGY3P?z;dO@F@nY1Mla@pkHa(({hz$22m4s@1_ZfbU9X z)6wqHjH7S{t1=cHT%6+8sMf*JOU|IyNx>K8TR?fCWs4 z@@k$=UjYAjC*U9N@2hUR48m0Lci>=7a6XfJp~`gR^Z3j+&;8$E%%n2Q#A8 zWoz09hhG;zE5*`p$|2XiQjIJfWp%8qKY*Fk0@w$92=^PzHizJS-~9x=B+ts}W3gc& zjU2a!E!Du^oF1Y*kUPXBfsgHt9T(XzTRRvQIsZ=n9jz6x(()k*H67~^06o0QXNk;I zL3><;{DIXTIbfs}L8SP>a;1V0;H|-rBzj^=0-tv1O5#hi)Vo7|jdOcV=H^PR`Bx6F zzmQ)3cPL`_8pN+ygTGM3e$9XS&&3@MsDScQ5&LHzKgYd*0%H3mZ0rvXuU}**sJQcI zD;4j5r|ggOzU=Q_68mS{IH8WEzmdd#5qF?%Gco;>@burYd2#$6H3o1DSlNEB;^g>$ zjvBMqF|^YAqaOC(@x^g)0NUZbVGqR1`FlDW2PgZ_L;P$HCRc@Q;o9 zv*P@pSmHR?*?%50@?RRo0ni_Sir2sEWA}~v*GM)%p!>CV{jEU9!}~A%&_B==xc8_r z;P-oCQX`SRB2t(5z@TAl+`UyS2{zEGt>BMv!eq<~=KP5dMakotU2r$KnY8qW(iAL1 zt;`E6+^)6(e5mI>g$1nF{AC{go7#){i)Slqdj5I#Jykk)xBIb+^SAH0Eg*tc&xg0? zpBzhD2-VcDc{9wRdfjby%^s{wrUF4+pgGUmLAZqlyT&#AJeKU`EdOVVVZt^y?(^0X zF1-l$k89FNw9AvMN)}Hy;8?8AvRtG#v5O#b=L?hYwc&W?h2dnRjUHsy#iAS}Q@d@l z#l=<{h-oA1L3ucIvCXPvp04LNja{eyv;JN}<mvc&AQt|`mDm* zT|&kRGE2K0yB2J9xXGxp)w#!xh|-#xi`KChPheSJ@8isa5Epb%((P!rz%rA)G8g#W z8j>v+$H#0v^9(Z$4AmL(-5W7x8Oa(!=tzz+0ggX>unUhHvQN;)BJ=s1R zofFPP-}ph?zipcdANTBsNj%Ek_2JU&glp52^0!x*aDHKyx+J+JQBeqr-n9qoPs#>8 zKRwN~bakeQcpkvzn-;uK11sh{_rqg=28H7!v4!PxKjY&$t*QuxueQ1sd4)vybiM*Z z6Gg|ouCcTTPfSTk_vl%7RC8BX4TCe55vQ7o!9vZoGh+eVaG)^+$yJ434SI^|&e#vj zO*v!ac!^a*x#59oG(H6{4?>ApteIWUt3MbG5V_R1H(!60fzmCPaY138TaV)L9o{57 z>TSOM9Nv$TKXdus0``04rc<5vxFPPe_#N)(NnUfPF z`1NBU7g6!GCr|w{6<;m)riB{O0C(M3R-6kJ;Q7=eUV{$B%77{Sa?;vu-B#j?@U#RcZnYg?)!9d)ekS-+>0H z=QxT&1n{{~09q+Qrf8i%{qU|H4F5DhL_KAtnGpnD8AvVBi+hr#@!4DX{A4aJ`4$PLT8s^vS(8BBwCkrX)#=f4SpA|gU;6|6R zqF1R(zm8IK^No@>X+{1Kh#+GCVRAmW(bGRaf~)K7mXFe@3b%{v`F2bHeDVk2Tm_M2 zn6osMMJ*S*k59g;jd^1wSOq#0JqoL<_lg-a>>jc2`p}&79Rks49<6=VUGM`6FikP^ z6jaktECqNI7Q;J-H{I7OpjRc#Gs9WM>iFx8T@{t}!kG9Kdc0WZw`vEU5A%V%=;YXf z%H#+X{X**COV3_5jG92iva~ASVNfWa9D7t3rTwi{ zWsJhhPR?w^%K(z)rNhm$pCFUPQh6sB|+%CN&R>lTNQE=H$x zb&mdL`pnI2a6%aHr0N)C%9k6r-W*`MBrPY!4%Gh20=2(!;xP>NR!kY|gsO)nS{rZAM_?ag6s(_u`|Svg)ae8i@@lwplQ-KQk*N(AFThqMmG4IysTS zimMDBg`cWXZe#z>+z((PQ$)hmQsNPt`wsU9_EGBjmkC^AOIHY@icApbz@`XUKd}4B zmBl$ob+9l#zgeYB2N;r`Vk$Mo#2_>NA@7HmBY~@j zHu<#ijdo&e9&14cHfu2kHk%0sHaiIh`^gJ~4r3osdH~7-`|wqK7-2+<GN=%V^{1ZOs@5^{~0h^hG z;7pH2xs$ayI3no^3@HW6kfRy1uggkPBVV^GK-}7sp`81VYzkr~gW8zuGl@@EPpqoS zO>UP}arDm5!O>j1|Gv??T@aA)3 zim`P!{>a-d89np*AEN7CK45XKV^-J=Q|oRn7p$m|A^0KUfFKR_hp!3D z`21CvbXs?20avG(Vk9xkB})Yll}=5{)PmjfpEEJhKIi=4)p*dOyOmMRTbFr=f@3duAC z0yN{)3iAZripEv!Rs33v;Mp{0LJojFD<) zc_h{gQB>$60xRT2KsHcbQ1`VcgCJ(pC&}>jJKgvk$##G$+73`fMWIwtM}R7d3{XW= zZoc{2xO`D7DscBe=p8#hoWIKWMpJtRYF|`76H>mLXzVp8L|NYm;#a$0##7Gt?J zTv~Zyw%Yipy!F27gsvrG3agycs<1^16Y8$X-1)8BEqVYpmzn>FFp@Yz<~qh-M=2-4 zoGXI?sC5+UQ_QWQRmh>tWK?Rm$Oy_VRKy&OW&l@``2mZtiQ3Y&@`4Cz8GO|HZyW)_ zWsFn?pApL{cd}w`8zmc6M2=!zpmYXb(r`Y27!}gWS+8u8U-d9$3q5-!!QQcn=uTna z1`gOv!3S5;`DNba4Ir3-py2sXG(~ zgQpnd#*l!`GQoD4rvUmFM8Ot>e2J`MuL;l5jrm!aGl=?gO`yS}bz~ij3Q7_5vH$_v zZR8+iy1{coGzmH=>@`8}oolB`7fKuaRR{}AvSHj(p9&I2*(*o@p&#-(fes13UYu^q z!TYJ>T+dECRJ;3)Qn4u9z~|70Q$Ay+2u!{2IG^tc<(F7 zZXYYlkUip+m-e6sa&^_lfa2n$y)lDu!A2vzdx46`rq*svUC2kS^oqguyg%CH49KEjSc^z zX@JJ{t4jIz8W)KDUn(o7!+;bp_r;<(V>rTb514nbAF)p?61|0=mm1)IfbG3Q=P4Ty zFsnwaNq=4R8tj}_TPTpm_~jKe+W(Fj;nv-r<{#1ish)LLgUQfn|0c<+XXnH$1FFub zE;ZaXjzF~kmGJKEZB}nnN!xhT0<8Z+>gn@EUqXE*6>Hl^kQQODn}ZRri<`+hYp>&2 zojZvCy!o40>=(8K#^-Ch3CuSvnoXY8T9i&TtuyW=!_6$59g-&Vw_N)sbC@ikl>IF! z+@I0@ERcet1;B#FrI}w>fA!F5EX0guq0P5Kt#3npb#30-d68iC9jK(a3FR&cG=Yz` zf0XxD>>Op%cT8Ac!#lOJ&A7SM{QOMt+N#UZ8bY)ZP$5)!)^f_@$;I@M*QjYmcvXD~ zu}%H1q;aAt>|$}ZqN0(tu%o8r24~=Aqqoj${$_u7fT$c4;(D<&FmC?1jO|k%+$aog z?qf$VDg(s^K3&w!8r_eimv-IKn>nj&VSl3L!ciLew6AIAF5B-HE`Or#A_9#{{EbAI5m6Z!tK7)dfv zk2gku$8%3A!h+`uL+Xy^&E{_E^D1NY$Eys&=Y8DTCKq96?@cT#UFclTj@Ig0s7+ZP zvif=Wps-JW?uVJcRQUE_)n%J9wfk})0=KjLE1N{I)G=^JdJ^ye832(<+0YaVLc6##cG@+Lb51 z&p0e5rHVH+7Du0_I9RIUxM7f>)=B6$tCFMv<1=mFE+oQu%i zE<)k^W=6!2^urcUev}7~E5O3KboOMb0QWXDdr$OasJ2OL1>RXlH}M?3Z*gnrXKXxR;b0KwlM+8 zw-@+rOfT83zLN$bc4cg;cC+#V5x1|Q5x0Kb&+FuXR2ANy2CjF}fONzHgoxN{C-5fS zmtycT6(Mx6769S5_-{cd0~rKH`9c1MI)dm+HL|2zfN_eZ^)+&Wz(F%>8-db=#l{vK zKJ6p~KQmfbZ%J4nP6TWPV^@ z1-ia@tEunG`=-cz$1%2ThnckyWPQd-5yr;r>@@;niYY$4loJ|^P%E@76by4jY`ZEd zO^8_m@8CbF#-6T<-m>}uiJ5N|8s)0q;A)%)0jLM?kJ_%3N)snn`=6)>LjTL}Rf?Z4 z8)hJq>nY7oaULfOZ5ns^e=Tz>31noNl<$AdwqeB5RqsBC)GR*`!{oOw*!fuAQNczz zpoz4Od5^5>d1yUbR7l?I^_w<;^%oYQ>oLH3 zK#Ji$UUDF%XqGm(v_u_Z-@GAt>_8krn5>>WIna>Bdlm&$JQL`~IiN1x3^c|+eCqv~ zfJjD^t%pten97z9wo{7jXuLy`azi)tR?EvfOJFvEKfZCZTHESAg$&Yolqtx2o=5422%Od zy#0YUd+tJ)GJL(c;R2fe%jN;YqGdtpt_bFcYT^dl#*iW8mN{bH& zMj)V4#&n!iE+>bA7AVP)W)FCi0BhkoE}5_y>T9%)6lHX(DKJx?7GL8=+I0JAMmBgq zWIxC#A(W<9%2;uyJUQ>IOp0|4tLGF_sZr_y!!6+_Vhud}kr_`A3nKLPu>j zNu*9ql@xs&6r|>4G&e-@1l?0|v?v0sNt&0@);#d#6aHKc7=Nz%w;jyL!H1aqtSG0E zC_bx_el71!{7fZrQG8~Zj<~!3F%b171p8}1gSZFbc#`q&-EGjgGiB60K*`&Q6-t?_lZ__(8E0HK)eDpIWU|8|j7 zdUJkJV|eu=ItJlGt^+1kmZNWNjMU&sz(gzK{Ex_d2h5RZ=CslgF)8I*py&|DchBIo zP_CV3d}diW+6r`ENuc{agLYpzp!@bhyYEx9vLQD+^>F3d*@1FV60|_Xri@J$xy{zX zXyE?e>N0QS6L*;MyLgyjCqkH%(qhKeNmUOE z=1Vz909}>1B6EVNfTLnF(q&&Op)pz!t1L4ij&mHw=~F@+$2d%8Hf?6xs)#7gxM)Ex zMP}3E;Ow*n9;FK6=-de+dg#WT8kcrcCCkE;E*m}p(j?qvwT~R*OhiXgy$R;ElTMvN z-sU47r88aFyJr?vzL4X%Zv^fF4B_nOHj0N*C3GpU<=av1haILVz&y!*ZlEPVBq{|w zzCUL_hgp1-K%f(ZzYX+%VBXvW=1m|MyhO_Oa2g0h0}|tvVm`G!W%}rUfZxr;&TfYf z90KUPDZ$oZ0-gR*%s3JZ?8bqDe9CxDS!%d!%AaQ#JcH1}|Dd?#2~C{ta`888`tagx z=FGTO`btbpU0Z4}MINQUk>TpmgP6J^yOLfTxqLAz+Hn9*2cq_`XKqry@s?k$w8du3 z$F69XU*YZCW;!*ku7YMfPIg~bTnV;!jqi3>%Z~1L!-P-n2I{4V)D?l;bY6PmG3KGUw5sRJeHZ8U?-OHt40yLC5vQ~WZ#odwU=ZXbzLf0Q}XJ~ zukLu)t_*IG4m~(&g5B^a)b_YSde2bhbrj9BKkUIWzG$@mkn2RmkUQ^pU{)m}hFyn> z-C@<`mx(}@`_xH=pT1y%Cmm@PE5gi@IRx9${3iXHil65F3I}oyUF_QH0!a%gv$4$( zmwmMap|uR==MtV01$rxzW~hW)A|)lflZg6x;M z$oMF`yC8Oy;&20erX-p+a$2VMAKac#{npKjYi%|sfs}*ji;7e0(FWf}o_<{J_h`CN zKN6fDU9_ye!;!hc!*O{Q!Xeu^V#3!?GSof`$)M*8dBN^F6K2;}$wuS99OkmGo}i6G ztS_zfGd&%>+*`KBs?`&9mTQcl;Rrc>QCI>KK;X)9Hb+E8b4^yG?8e+bn8FqdJRD%ln~m!xonF z>TzWD6aNArzitwKb&bE8(19GkXrX1C^+2~+57F;ni$s$|qvboWN0~p^1lS{HWT3V( z&R;!2s=9E|#$TPOrb_vb;g?n533`g;Xjz1Q{V4Hj@;d$=8u4nuI==g`UKFIl-yQ`h zhJ;ZdUfl`QuXjVn1NRmj(rAA9XcwZwvP@}z;8K>L-?`-qKikG@r0$#LJ5IcMBKi9V zm_W1%Y1(_HNya=CDUl*lTvVCP@}{`RN>I-Q^M?*Rgk~!8+{IT{XWotBRIw!mUlBor7M3Y zz}*Jf8uOn z2TCLFbNhdBHnFoo37P+1k~00JQMSL@t$11gtf>A+jRLGy|LOr_=LG$f^#09p{9Pxr zGqiWKaQL-RfE4ws3GDBrC=NDGwm(Tx8u#^(OZG6M4J_W6JJ#tTk_rg}@cbfV4a>x<(goZ7#UcsuM;KKW*O3avdvW(@eM(5M&kOT_45nvE2CU zc)DF)LcA_En`C+FGaV!-uw!lg$WjY8NACP4i&AGl1iUOP=F-u3+JE_zGl^DTYvYZ$ zYA4hlnfHL(QkK>EPOoU3D2ZIu`QiduoKq(TR*OUxj;Z+# z?Rqg2hjRLYIYwx3@&jWgd`Toli>^xaVBFFP4%e&6m_lBNHRJrtcV1nZ0*jWlm+G1U zV=Tz-J4XqKutdp6vt1?VoWtLiBv@BO`bI+NQI-dHIIE_!2_PL6A;?GVnyKN;y}B#G zYebsyQ`s&3Rl{R62%TEK+fo|L&ZRXon3RNQaFUGy#ql@_qetGI#AK)KPsdtcLm89Z zM&c`@=|A!|Hu=xGu>h8c%F8q2qQqsewvHgKQkTW#Cc5k$ypZeJ!R9vlGI)M%HN06g z6lI4dM5Uv*D>bzd)XA^^;%0SiwJGJpd0NFZrIP3M)f$mISW0St@xfhx=ae-nifPg9 zu6}BZ8?P9%ZkGn$h17&ksPn!~vFV~uKgUi;w2uOH+qY~WXQG=GhJ+R6Qw35)_lF|N z*DxeDfXt!~(>9|^45xYk%zXtiHo*0azMV2LdrDclcwf+Q7XeO3NJfbpp@wdB6<4oW zIplrxp$#Attr>Nq36dU=TbTMOMM$CfVC2NZ5a9tQhNDc84fi#7243xK-j|fX-N}uN z#2d_Bm|WG&hP}R2>fU2+npU*#(1&YL^bRS!*hGR3|k7@SX*gNlx!&%iiZuy{}EduI1|5_ zx&y`mpn5s^Kj~`Q9PHtK(7elF4{!bbD0*JNeFR#v?EtOvN&;vc z8sPyGobII=_^yy=#kCrVhB$n4tqiW!;UD|#IQ0EVKe}L4bHFi5WEyz@=fKH;cZ*md zavew$?;3Mx2M}Umuu`^wpak6*mq6RqEE}Oe^Rfrj_Fxr1NzxvW!(@BYc>y^r%WZ_1 zU7#zNjx5RGo+idTF^i4W(lDri(wwZ0akp!w{8LHa<(H;?}jH$|4n4`Wijk~E0&LRWCMQR$|ykdc9Ojq zCN}@W2~EA+oA25`bN7&!qps z%-rPDNv=uKuG-}_3wOx+<+-V3A&J6+SjsLxj?S5nxO){|nbtOg{f+ayzhXiKf7gyS zF2DN^jTZK4}#iVXHl|kJ6WG)PptYnT~jmyl7uf zuA(CQh`y1mj(KqQ+0aVCBN`{1ZUO5~rwLjFRh&8eq(~bn+OjM;C;gYtI2Q-YF;LRy zWZYx$sxm$@EsjKvmb{1Aqhtp#p+)H%047wmAwivFD(sc4^DaG(=^QJoW-W?KQ=YZ5 zh|A>s)c)q-SG7*U0r4GH{=E7hC0N#a1Y8LX&WX|MbCFu>)oMUiUZfym-X5ykBDM4Z z!s=4;*h^E+#sSY=r+QAkekdr^5c3N1uA$aU59HLO;d`5|xjd%dN(v}RvQQ-nA!-%2 zC3(r%oN&(-N)UY-8RX1$qpP_3HYbuZ*&4DR_I^}qlFid&mOR*v)_wPYBC9Ovg1Qvb zCPZ)!+^=Nyag5$e_<(fa(1+HJEAmdRo&IiZ>ID#?-L!q${m z@NFQsG2~r$v~u$u-BRamhf22za1;~5hb=WsEJ4N>wZ>wKJ>ZU~YA6)Xf+-jbLG1>; zL8{i|roBPg7HULX8qnY7N*zVZ(R+bw&fXK|$Q;ULZ2!1CbT%;qb#edE&f}~jldjr% zDUE*2a2Je9jy49q3Gj=(qMT?O)VJLE0n-fp6W~in_{HXWmroieQzgM+IC9e^l(hWH z?QVG8tDluX&C0(;Gfa?0ggL5zBH2y}HcnLTSl@EJ9q>351>n060r;*Y-S;p@1Som; zO~ZUKu0rF7<3{7O5eSkx9;3`AxWiNn1=J1NeT~Oh_~@PK!4pigCVIb?V2N&4nP6~$ zsa$^f$s<2oQEW!-K=2W7FMvZ^1JoELK#j=*)EH%F^Q!z8{yM5Obqq)d+=a|%;y*|H z9BTY58c=&WwO?FBd(dbEK3M(<JxjFw5{_j}NgI!z_=tLX!mWg~QxKD1{(6lVqY zC+4k4#E-2lEYQh1JPVW_JgDXU&~5~!1Qw3+<99Abv}?;dE|w+d?9!-rFuPRIPd{Ys zW_BsdnSS`2jx-bgxK6u}QbRQVJ#D<59<7@GCb9e`v-sGJ0V#`z!>{q67#?!QNk_qser)sIVrr zkSi61MF5k{S^gxC+*na=Rokxq`n;J>XP^gZ20!j2L3?K={)IxPsH(gG9N_tNWgf}e zj#-yW-3*A{-!ZCJ4{m#h;a1+Yt~Pb=)MR!#6g%0rN)uvP$2kj`k|v(tu{w*R zYt@am@nWmTb$TTBf#G#~N(c2JX?ht~-*QObQ*sI586KqD7PRy-1%^33w2a*@2;*Er zUI`A^b)coGl}w`-$3#u>rh)Q4GUKR#Rd+%h5Tj7&4CumiEbLJBi<1-xRTohTxbKqy zMjpk^iZc>0b`|_l{799(RGnU#y?+WWudzZyIjfB&KP4EG>=jAMgyKIbpX1+hbAZrA zPH)rPZZQRE<^(f4xfKXt_X9*K1l9}Ju`q_*ZpOlzr@5x+^y2{K(`-VMX}L336&yBR zhOK>N&@Cj;8bpal(TIgt#z$0=&1Y1ny{DVtxa;L{kUZeT)QAWt@_}h}0%vPM@IKX= z$;V`4cgJP2C|xZ8V-y;4M=-h9K;KPHJ$@EucjBSTPN3DKm=({LIvSGVWU{+QU>aTR zO4AfnJ2jzcQ7cyYKfS(gGSve;OttWd~Sl^pi?}f_kVBAv6G` zy8$Ccz~(BDp`=etNPk4v0=l7Cjx&90CzU8^+oy>mE1Ab*v=^CGt3*5sJsQZq z<07+bZixm-5=GCNMBOjhyt{6Ua zx$AqjsP#Yqv|kM)OMLX`LH*$75&XI3k{oP`)J+_WZ00owtS8aA7sis0?EQ<}F=8(1 zyFB;qx~sXIq-pNjUxRm14gaAE`-BW{JC4VmidvX?LN2H2m6WIF+^g4Tc>z71IG~&$ zicBStXa>VX@pQ3xo?^*GQst{rG|TkUkn*(z^DhO{b8wa`r&gwQ+;cDLS~mq}imil4 z#qHs#N!y?GR|k1=5*7qf&|WFED>gmafE>7%gdGe9J4*fj^3z3>nO91phE0#ALUQF2 zRJ~qbj+?$c&9h`4FB(uPDd$kfn!PfJ2aY=f*d=T{EC=ys>;C)daI4b^o$#W#@EA=0 zcIN!fsQyVO%m|Q-?ht*pdNkFSvtXWZATo^d{4xPu&b8nFe?T26-@(I-S{6daYCy-m z2Dq+o0In+z=V`N<^-heEsqxu;&Qz({XD*corZTEi z-qR)UlEi^XY`Ly+PRJf!W zzy`vFwLo0DL914tOhE4=7*uLY%askfY6H$Hkaf=Rayifm_p)!1mw};pAG(*R>5+Pp~QsM7G(Y#(Yexk3F%nDACpDwmxJk7!rcwRM?Gv<^z>UR+2jCg#SY3Wr ze%sZ&7;u_0Vc3#*dYjo`z5@)_R5K85Jk8Yn25T&qyoL>9=JVZ=g}}F670xShDnkop zjHy`-)^Oowdj?xw<<4wtS*Cll&3lTFs-=wtqX0?Q(FGkXi15d$)c6%e!Y1>ex<&!o z6wk#FFIDzCU+Zk%-j7Fy!$`HG`L)|GPfyy%8frW%F9h(RQAmg_NHWOMZE_H3w^H zbf#@O3s9P8SAl~0Krf;qI=lVAu{-*}a_&r1V7BiZ0WTq1oO2hrt1!CeykI?eFjKNMo9ztc zTmonG$q)&hb;-R=sYBd%UYi~!mZj$P97L8U^Y{o2i)OW~E6@Up` zkkoKcF$QMBOG7c{^vm8RK`M_Zz=xy{KpyCCvt{3z1Wk%69OJn=0(UG981uD(pTM^3 zcPxB(vfM?1M)@gp#kcQ@b}+S{Xw&=lcO;nHV>+29`2#ZDYl<4O$~H4k2lqF;0@;_* z|58Exa|Pc25(N<|;QU_{#9uX@|6HSE)-x0}A3F47ZK!5}ACjyj>7y3Q@T?`#mWp%LoDY5?HYXbdu+=y)K9Di=r zy_WcEtDr~AQqM}y7&vlJ^%uJCWT@|;qi49qLNaBjk4`vZ9Ncs zxeZ=A<0iVWMR#JXjJi1-jrG41;MwC2Z(=@C*yq(wDzSR}4;S0EFzM~7Kh(u$bUFbm zU6dO0**dKR`O1~JReS$T$Fsg1z3KLFe<%F*u-A*M7?@EbUQB6qVtRT`jbz-s-QL)k zp#jIDuH#BgW4S-2*M6~cI_ameclJ^M2ja_*Ro^VFg%vU{lwaeffLOVExYiO~aA~(U zwBAgp`?>lz1m(|y--uVe*{b3AH$G_E!HKaON_MUfp4A(Oj#_1+6LY=CIpk z{GK6fGuXHDEy7RYsS+h?%mDT=+**Wy4br3C3$xMn-rX0}RuW4Vsal^GBojjiT$eY> z<4x@LsmTw>txVf-YWJP$)`E+{RT%3ouDZohe5A?o(~k&^AG2zN+2tU_>Od5-;`%2Y z~2-r!qQqThCUOg`OQa_;~dGa z$KEU6RuwGG$8~1Hy=qyN;^#Q&Hd73HkpN%F89V6J^jy*<_nGYxbAksQDrEazpCz#` zq{5wVJ7Tc5-J$TSo>oGB!onZSEy8_FCr7r;Af`LZSndmx zoa>{tv`dRwxEdjJ6?)6Yj78`-Gjr=tH@MbGuj-fWCYma1CcLI1?7N=5Rru)fa?8VV z5m$CbxQ)Ad-E6T?u&)!T)k&?=pCwnPQ8-S=9 zuK)o?yhK&*^BDR}8iF5Z!@VU>bxL5E)_$Y_y3^@-n4*?|MEd!dN`tVqGom&z!J8e1 z2-k%W$2!*L(xo>WNxu4Q1cE2!fS*O<$kgI-%k!R{cH^sWm1Eq!XZYtE&*0CW5ZERn zsM88A+WLoalDmJG$(!^e+0}f>Fj5WvROdjr?`gRB_1*r|oa({y@4C|zSDCwx2cmY{ zh@~PV{2z#hkN1cM{=A}xt??x0um=xUM;b$co2$69P4TRTC`l1F;NriUwI zQ&QSIZuqUvpQi*{utV10uWSWX|F`gVcS$^me!u=Bz#4GIQlNl%tRk~ll3J6Y;aIf=haq7gZwrA}O% z=@<~rn(o@}vf0QAQfVNbAg~x?Myy$MxbSLFC=Do=lPqjdEb9hw=JCz1y9;c^R>UX<24Fp;C3PCF0ZtzVj1JV@zM?=9n&A!O|jT=t0pV7n`v=)&oB%r9Qq{Z6MJSt6o|8CI7b9Lqn)zVx{8I4$d%ZAIr`yq z5|qAs8^I`XVATU5*Z`bROjv^5+pvXA&qOuE@SS`=Ay7K|dfcM2OqwLhOkCU`a3r(y zFsI1da6yx?cX$^krgt6^V%YlDjO)P@^pzNKO`2Z#y!*?C7Sdv=-*VMDSgqU(q77+! zVYVW537V7aj^3In%XP4|^ku&p&*zqpL4Lz&u5TIxMDNrABg)?5KSmUe!GpQs-02Xp zVUR|R8(goidFk|1_ZLOQD~(}v+;2>t*YO?>JA9rrPEG^IVRN>@&^Evi!M4HV;?vT6 z?p1lcd5D8k>)tU2Tn+iy17=V?j6{^kQZSH*&E-(lRw)#gO^`VlN~53yCs|jc9`mXH z8B=)O8Gf6TFuR!vY#^eoBvoOAo;*ga`+Hwz9Z*Iu+@o?L_%@hKeA){tKUhV;rwPD2 zfsB>sIBnFzU$$`C#>9JA=O5_f6HBs7rQ$5cXhRdR7dN%prOp5!lua|MAih|KMaC8? zeB>$jvND;EIdxyF*VQo_-k#N>rJ z0xXwai%G>a1#BJyw!&Lwi>Rg&rH|!7ggfOkgia<}mE!3*b8$ok$DM>G($&h6d0o4> z>IP_g!-rLuYSB#rL5I%p%%ROehj?5mPo^*;9}t1x=mzIJeTxcGyQR$R)e$wk2#y2Z zs!SVrlb%DoV$5+xgNs>0i3@(Fp+o1;j!KPGoY@$UQwsoOQJTCU*vgg$3EK!8UfTo!ZFm`D z`y%{>K!7sgaMYZ<-xKkj=Sm+RRz>A9OW4uN%mdeD3&3NMN>ma03_N~#Yr-gflW!95 zq?2IY;rII>S=Id2Fs$P&Uf~R>>&L}_BjOp7|0@?#9>;K-i?|KtVDVu&4PH06y1t%e z!EaZbGx6@J7BPJh`!e}F%>aIrHDD7Cz;D7tZfU9DQu=b#kTZ1CoYZYZX=03idzUTH ztY|^3D<7G$sZ6rtAc@ZJa8!h8nh;Vm>_BM#DX>aeQlY%=z0u)5sbTzp&lhf?nZeWWiX-Y z-Xtc*rhn>=*aa6s01R=MINeNSM;wwt25w`@wc2#?-}+`H&&@wneb`svYI=q&JbUx9 z_3p#IEX{R=@b1U`qk7p>FtS(tdF>NV&vl_?=_f)Un~!dwwdKu5m2lWq++mQ5B;78vtlwkeaCPb;)X-@5a$DU80# zBx+5W>D73=R#JBIee~guF`1TEGWo9eiF4d{`NkBi_GN0uZ3*wow{9d3l8)@cPpC4t zB}CVbbRYH*UbNGLF9Q`s*RZkz0_kKhM`V*IgS1TaMz{w<8;Z@X{ zK`KE(V&?;s_Z2a3%uANB)yq&fhV4pg)uJP*fKxgfQ+VaE$PQPU04mytw(SmrYDu^S z7?CH`;Mx>X#USN?Znr0(o9Fmxr727U{lyH!xttMhcB-FFz7Ymnb3aoLojyW!r&dP| z-;Wwf8$SfevKLVwkXA$&PHuOv9P&%7m{ZdP3O`CiepCJ6HJ0>HD-IY@6sz1u>D`k; zjFDEHH2LZmQjb&uOqUho@Z!E7-hp* z-xWtojI2UMc|dMwDyqyTJ=B8(malp7!`t+oav_F-6xK>h1Ggy7D13n?MP@W3u;k0L znj4ij@j9N?WGy!=1Nvmvmtwu_VzX!I;=AFiT$me_0QLWV+TOr z=F={fqxPvHea{yL1eOK<78aymI!x?Sl`Q7HZwuQGa_LpKlY#_z+e7b)`c!pxBv*}C z$DX}p*On$E^2XMmb@xa8)v>%@QrvlND^JB0rCt(YwFZ7x*u`aQHC&KaG^-5C9DT^> z=e;MLn;%%7bOyd%%wtXIbLaN=v5t#1l(2bO>lWAG zpkb;PEg=MukI$p!PERW7EJO-jPa>^Y>@{vB&T7`tqnx`6EjhWV z2QgxL8Wc1mDvANeIIEN%@1tJp$bC-c%#VG(-^RQ(GcB`~ZR)S6X&@?}7@G6(iB+LD zHpHMHorze6VtngdQEf;yNI;$p`obS{fj^N#LZa z0td&@vO^SDRhk6O+$sY4KOx9X0_Rkdz&TYRjs8JDu7MW6@nDtpkmJrV(x5;2_RJPo zLsXC7N6ujg2>mOtSk65ZdLl?5@#dHUIfDL>LfpVbT?xI?3(nkvYt&%85`4-iYh zkA3kjkD!7hjX@$a8&6XSsAL&tseZs}9zhS(Xmr1#Rv3F+$dLIu^BYwJ{nkU3094@Z zAF4EbjF6IJsixEi-EXx&1*lVe1l?1YXs=O~?+SbEU0O}kHa2BuOA%R-KdhLY6bV{nj8y+ToC zZd~=13g{$BM2rS_zl(>UewKhY0D1>Osc|Nk`-vw3?$f6Hl5-;k7T?sejoGuM_xqz% z0%T)(1u?;{e!y#m#uZ34yw#bTZNf}Ju}kH!}&Sz-h6KpXXclh`bQ`ahjNwd%iPtpsuY{#9`THpYMGksz+0 z-xUw%KP`iQCH>vE>(A2PuN~{}q(62Z(7!MgG-tzz0qGAYU)_MQx{qiZ>QNV_QzIuM z??QX<^m)=9qI`$BmYb8)DXxT?R{nIG-p71!vQe_tnUPjblMMg$tsa%|PliI)ppMn8 zhko)b@h#uD>_Uc3X=5^L*nfVTr<xh6t}AZ6gyx`O+T9= zCs>+Drc0eBKL2&CTKDj0Y4dFTiSu1GXf&t>oj$cm ztx){)onP-2Yc5tAXAZMRZr+%OETpqJKTO-rzS58!Tz)ei zSImKb`cZ`6Ol>f@P9m~=Hf1}i-}X^SrAw_j6WgvXZ8F=lA0hz?$rk73t?r9bO^Hnl zXgdZ+nAh8j0~CjZFguNI1q+!A`8$~vSDfb`C+tt_P6)%@-?Vi4M6aXa;;c$)$zbS%Ga7{w!TK?E%#df81&XEmzoA#=pVuSvq~_mbqLW@f#5;dCf2L=CjThptlLVPrDrlkZcAE0fRq`jKDQwIaT|VS8-?>O_%?X{!f01efmXM0YN|w#Kj7D`A;_ zR?Nf?v~W*mlSi22H&y%7otK7I)4|Y16YVB^)HZV;-NPb zPD5$;tNKE*iRsZk>V5B@LYUEy+ZeN7WTBlCs<5w9Gzxh=sdtR86j}h8EGxTIex~~7 zpq7@NfpwKG4571R(hXY#)Htk+S?deVFp!($kuN=&uVh=F411qvi&A3niaEX5v1~qB zR{`EVt2Hrlz;(f$-Ft)Sl)tr4KN$LDaMQkq#QfaVI zR+?j=y{BT-c51RaF?wlD?n;~K8a1^NQfx0inIpazn1bdlt(?~si~0D)#wMxGrH|Q$ z{zLbghT68+ktaXO#;hH82mQp66JCzTd&*N@#qi<2v&tTr*O(7;+*7@6za7?>r$GJ``l1M0H=!NMc~3&R`Y z>a>QpDmQme(xt-{gg1S$y^-wB>UI4h4o;HQN7XbF9r0Rj< z-5|pcq%V@pJTdwRg7>P_FeTDnFEs0=1Vv`k3`%HI_#xxEbZ@jeAl z+CI&r$X1v0Rqy0VGW95~RG%pvvM~jq%zHV3;8+@tVe^FtD#%3Pm6PJk9sZQLg2R^7!p zGF+e^V3;C=AXE25X+ghZ}GBJG?AG)muLEn{5H!r@Fxi&;%5j0 z0qY#8oQv8L5CF>VK0Z=PxV!{^Dt#RO0Cy+mLMXB1!ILbOF3q@}_Xf8?UPoTIX{x^} z+sTqxAJJPUMCVo{5g$&ShzYozMS62w3uuCKFz=W9yK4^m!J?q$rNTcX@2{RFN zp!;LH&4F=sr0ra9(HVQCq#qxHn!F+ZVDG~{h!dk2R7Y}PH(S=gQcvs$MGg8K^~U2pf-M77uF+_Y#cFxUK1l0mR7seLs0xl zaX`-loMMb|Rb6O6xS#>ydQcg*rVGuf-+l^8epb#J3FM6yD1BYl!+p5+RUi$>Wv`H~$SgCld< zfDfJY+0rvJ%eL4fWFE;aU2M!(O6_EQ>@JrwKYl;K>XVZj6mNgnCnr86E(qKAjP=V0 z*uLWqL8g%hpA%W*G7>px8fgkM@JhjyQ{iZL)`r6_y95){?_EVO$+JB z9=kR@!BHo+fQTW@H*Fs$54ghEq+fKFC+Bbp{n2Z(-;uY7>w(G+stq9l5@AL#rG?Wo zQ*pa?lj~`urOco{VG7hI9D@1;J;O7^-qqdL9gvZM5CSKG7T(q6fV*Znmb+%Tj&_(R zOWyh2`~-)upR~7Xyn<>e-@-BEUlSZ#!(z*mdCzyRM3W^>zZC)dJlWkoU)UF9-plIT z=;`hDRny5QTOgw9Dk+$y`&bi;usrr__%poojf!>$#x9zG1GAS`Y%e-Enf8e4gAew! z>mRRl|ElH-vDcqJaLU7#60gs}mD=GJ3CV{0inEfdqplueKmK#z@k*d4O}oRZV|i^Z z!b1^lApB|wIw1P`)zXK3XHWb3HU;;#>#d^g#T&(rY~jK^+q6V~`cR9-rsFpXn`@DW zu|!Gs&a;f_zC>R}IX7ax;38xO(J|p|e9FE2avX+{i=V|@B2r~Grt{?%CA`}LO`Xj7 zIR$1kta&OqpLK0Hr;X@Xeh%j4hvnqWK-iQ!Ls3ID1|&WYR@o?|Hp7TU1in^YemQEx01;ReNZ}_E>R^>7 zeYse#@uwn|U29+TV3Za!q}K-#5`+=r-;;FH!6ptPJ_Rnj=hB0!a){H0 z1}d*Uz?z134Upg-rf)bW%d@{(dB@=j09ZlcBl-HjS3SK zsQiXse9Iuf=muFjH;sh+gsBaclKjIBaxtDv`G`6}i@(a9gNr?Wkdq#-9m5x% zpzs4D77-{HH2{2mQZN7V;;tv59rPsZn7py)G}#!yPzo#0Es@)z(G+2u=ov0^_RX|B zBO*=MG!R0e`+YFVKSrK^^yDE-#B<#GM@5gw4I~&ma+$>Yg$;0d#(*iq7Q|V2+=pBk z$XP2q1m)JvHb^0w7PJx!t_mjaK?TSS=R~)i(-}f9!tqD0)u1Pjc;DUe|HEOQvaDtvq$*b~sXXbxU+ma!s9dP2!e9 zRxKL9?5y|VCQf%w<^G1Onm-WzxoBjgJ3?w?Bi?gQKFuHLdw@mxsamRg{KkSzs=KfM z50sCXbn|&_goJ(Xa|XY)lpUMF=SkWWz0Mfye5_}S6p?3!fjLIUS6eG6r%+WwCO`K) zD_=z*)5$L(<_Cxgq)RWYFPxbK5A4VTr>@42^baqoDXiRY0xP+-Ig`UCdGZ*t55v6pm^UyuY}=SX?= zI}nvAr<%sl%=*Z;--M!`H-vvQuuyGgf}%?072ikZOEN%@<%<6K)d3CyBHKig|F=C%T{bxyYlhC_R7iR@?P|ZyHE=ozK zq)&fzrfmJ^)F}(R`9KoU(xcDwsTHcVixcUh|DI8E5XSB3ePYmOSNWxmu<~pp zfL5&D$#Ps3ruS~L?(^JB;N%%2V0zux_1Twfvs{1|lCE7Db%KGl^0I+#8`kEMrOWuoajuK2dBQEz^{j>OUi^fi+_c{U!^)Dm!pK;Pcm;iYCW2D%C)AwGa2VrLWtw{TSkJKGO{L2af-Pxb1*uRHQ z%nbjcJDUOpp4hH?ML7oE!+6dQalLCV<~e`Nh&VwDFq0CHMHt?m8@bJ2tx`hnktC zE!^d`cz5pW8?^XaO@GsYLKsv~-wET2c^Xr&AlgFp9rpJ607i%~Gp6xaV_S+pgbOD_D9eLM!|m z&8k116q#0@5bJbT;GZ{Vb~SRJHdgNqkJIgdd~fHkE6J>l)5%YC;#p3M1uJ^(;kS=W zLrpX?Pab`p;UYSAR&@@(N_(mC>t=tmS4s1ZAc@2|y8H|~p?QL-#CF#>I+Ok_L_N;& zq6gugAo*G3+Ie$zeb(ICi+_1rt=YzXqP9^K4mi?oe^+KrF@fBzga$DHNpPA<7Ma#T zEewI*iJYfTP{sybo@zD2olgJk)#picJx=0jg!Qo0Aa0H~JqIaGjGNnpOg06mOR_6) zL`70FeIi+M8J2n;`ok<9)-+c_IOm=E9YJW(@coSX8zw%cOua{2cO9bKLWFykCBq5M z#l1h+N}np}6ldSkvLe`1)NePNhC5C|jU}VgXv8zyZKr+MD~B~;n*XS;Tpj>%>@7z8 zwvV%rpj&q`-Unwc^@=&G*fF1tzU`^M<%8zRq@ zP1zHn!zen(KcSo!EQ#npFfiFTD}+MQ40shyPGZnAyHcDq^4&8=83f1_)bgk4b` z{iywtks%GkyG{jBOS4L2hiD0Y4-1hYA+1mHR+GqgF00ir0NA>73MXm5-Pe>#;l4KX#K zoBh#us4Hrh4upv(llV%?vocowShd~(XY(RrW9Y0$`biKC z@nv_!cjj=0OpN7MJ;$-F-Ta5*K}iNsvRnXb3_vM+Ehfe=4?x*9-BBWF@k3-DcrF-2 zh?fDn80j-v1+I}9CAl+8#p{)jAbqG1!F}-sXt9Qx_i-6>)U=6pC%6ORoJ?*%h#tYG z2Dg?)8ORKB!6X3neF1sWD$AX_id;S`_6`R>)6#%P_f)?Rk96VVsP z%ZvJr&^^=2%>w!(u(BGqR6%;8Lm;USSUgY_;odnWd5*+@+C)%;^_0;7uPthg**hT% zPhib5OM8V~$BxuUzkCEl^$q^eU>fGaGyZbHe9FTFJSFQtijjIjA!rAap^YhN8@i8)~gV#h0?#Dc(IuD`@P=yl&2T7WRJ9~PM0=N zn^8v3C&d+6UD9(MQT>K&mnks0t&{L^l|QBH=QasH2l>F{uq)cYWK@f)HVKrY%g0q! z-HmUT$zf)xEJt$pqN+Dz2BNCFp}xrm&MXsFwUKMKl&tbE|6&oDWqTTkFrEU3GQJiY zs~;|9fHE-NNJwBI98_EWt?ZO8+_|kKL`V2xhj|w z3#M2@47=+!k2$f3uFFFszCOW-&BM~>i{*P89~{tQRigbx)#p+vF8E6d4uuYZaz_E4 zQS(T=&~|zWj52Rw!?1EbzHgjvt6jOGszR2$y1g*_zA}M2c18L^!*B+AbP|?!p5k$x zZ2NQVQbhsrC*VD`F(68`Abw3yK(7P=RER~lYa5fbFXMXR1RH}6F-h!T;P!Eu<1JyQ zZ8>Vr)y9x0c#*pllAcm2bK+F<3x*$pq@yC_(@VRwi6xYeZj30 zC@WE1W8~Ufm8W8vjWBUG)}Mcei3<8{gR>Z@^*H|TUwrdX zJ3`V7(tsMdUJiDu^aDMG8e!*mJ%x>iZs0y#zwU=~aCq?(mipWDTV$Xx#kHN6X zFOxJbw?OftYbiS@Uc6Wgb_&ptD0q~`dDkf_*Wjt?BYj<$^%IQfg&00@cUeT~3yEB;pvx>QZRHCg zIqHRgKrajuHHPQZNF70;UJ$_-BB6H5pF%7Rsmk;-1f?{d7KV198e&(Rif$KbVJpX@ zY!3xlP9?@Uwf?bB#Dq{8iXcLi7@uc}c3_p0`6i4uVvJ0)rPHhXoIH<{Xz3S@!b&gI z71w$zLq#b9?aiQ%)Pvs1?PB zP$k(9H%^F)Ub$fjfV?c&h~Y+z=xH`>N&`Iba-9mAB zlgAPYJ)?#OS}7Hb75cilQH8^eogkQPjnpVF8SK;J!=t6ZJ+=G$OOPgz+}IQmBFKEf zlPsERm@XoSDM2kP5M9m+wj&Fj^I1|x1yz%uO7w6R$TkH}a#@}PSAmBTC!A*MG}=+n zvnXoQd$2lHaSA5*$_ErG=bM-=l9*4Drq7ag#IO1-9$*thA3(k?0>ww?vn&oc>23%f zF@rT4Nd^bp&^z|d)l=MLOJwaSkuctJhki)S8{EC^fG8ay&d?u0kHT`9sKdZne+r!S zkIZ)B^bOgNBv!Rv_dt64WAOciTRbNx>h1@9nkDL!8~{0$@e5{%NVkR0&B zfs*!qtTFx9s{MJRJIc?JIrYt@Af9Owf+^w7^%k!sfzQTad2beFOBw zHd*x9Q59-^(ys<`N2DA4md&b6_a^~g(QdBzZ@EXlfnIhEvKSGc8a z!3ny^9kaFG^Ou^8Q{t}%xN7hR*@bNPXsWbq_abPw>`S)Bd9C_svY+&BKNh}`-z4{; zk0e5VoHfoV@pBtjYv8_db?v!X=A3)hsI;N5cB>le&yPh=CxP?>YhEcf?OPp-M*HTZ z)Ro+xhFIatclm8{W|whJ9<0)f&&kFvgDmkr@olMWc|28^eLmPepoA|cE?ji}r% zV5?H{Q_xmLT6&JP;C&Tn=N#KHp{N)o@Rw856_QEotB8DMw(BY9qFa^0`q7SrMVE;v z*EBg)&y@2c2C55=zm%g9(q|c6BOrE~RuGS?gwj_6k1>_lvYDoWf`2S-NXtx5FBdd9 zw;4z;-wDkxPa%yMuIzguHd8~56XSY9>$1VE^vOQB*krPd)-*m)$<6k@Ha+`2jY@S- zL%6t3uh2 zznxGNtH$vwD2=!!;@>Z2 z0fCSd1O$3sPSB(KQ=;Sel;o<;(4)PAPK@370mq9~hslpOy-|qwh;Pw1r39TG6VnXb z#j2s<2@qQSEtUH3x|jbWRO){Y`Dgsk*y@1f=U(1(2c`ZCY_Nky#(UWDS8a{CuC0mQ zy`%14R`VCG0f^CmBt;)s4}Zg_XAl;^d+s<3%d>j{7my(Rzsb*E*M;%Vh~Cc4j-_s|ie`%*woeEP0(xy1#nP~CCY9|d^0n*s?RT6nPEqGbfdi_!f| z+?+z@_%g&Zw*g#_blFPTDrXjrm2aNFyjdVvHF|WKQ#o#RaS&g3JIk?$7Vb{JBYkgr z+(kIIGG82{%IYn;t-hKeroZig_NUr_Vs1#K<6jUkwh|RSWcO`Y9MEv9{)pywbFn)^ ze7&}DJHND_H2lK%ooWZ3TP^4C+BH&9TKHXB8mgj70L0nhoou}i>(3&>BKqC^RjaAx zZhX(=N{WOlm*VlugWkESwC(n+-uN_4;lA9{1a(^MJKB)H zZAt-*Q+sv1mgMX7&_E1_+{LU_bLxdcNI;Ft#T6{QK>2pFTg`$Q#Gh%tC(}_?xmoYT z{pd!&fTqR6*Ap5p$$vuA`f*sduHAWPtMo4$1?QiO6O66Ab*>lRXQm5PiVd}lPMyzB z&QuUia4l8fEI1BYZ(xv+O`z{c4>vcLsXawvY3eR=+LEO-{TQ5NJUz^Ons;&}(dhnx zjZUk7FGRDE^AV9s2ywS;J}TC+sQjYw}P{{pat$*xG!&n?D?{f`wq%q%D#qZE*K%oJA+}xTlLCO*#O^xSxK#@4`qtf}o z^bi+odcy5Axx5zUjF&lu@wGQ=Y8q?of4`2DVJ|t9&G1RvlA(UCDcMg7rkwnf@tMKqc2bQ`(BQ^;%s2JRr;S8#25AvID|WdaX~mJUh7^^U{cxURXMXJwZD^ClJs7d6xj9GIqH#_hxCZ#-L)jNfKxDu498YVo|w^ z^R#d8EKSK!y}+dNslp=4GleKj7~!)f=v)6IrUv^ZxG#9h-YLK|f4Cp{EWs{v{jiv) z%&kvwTc;psd`R(iVReO+a`GHWflu86ZjCq^lfsXZfaHWs4B2k_iXXsku|)tgxlSNk z#tnQ@{g8^G{ER0&t{BHM)|~bbCukG?mmbtkN}aL}WSg048OOtP3{HvG5U0(2?c?G1 z13&b3qld)K5Q_W?1|TDy^({f%T_2@YVlNrK2^ebcZp2R^k^I^m`l#I`RT4~P9K}l$ zTJZH(5clu}KLYel4u|Ah2r6isYHf-1VhKdhZD0%aw;zgmEbkrqJkt_=-*)Y&g5+Wv zon+f|c39>i0f!IKKE*3`y9J%JzyT@Z)&;3m7IB@GBIAizL!0IGBPWzGI}5zgjzN#f zZGLytz1Fqqj%ghYdj^;5pJhj-FDAmMJjEh)RKD$9Hu}T8xMp%;D*t*qT{@+LUbziK zmqXWwH~Owis-!dT-;A^M#TuHJ%yw2(=@NlRI_fGK6`D5!DRcSE*@mh4%r8M43NvP% zlx$L<=S-|V2t#?7Bx^Syn-uS<606U6Vk*j%cxWVg#JKM)pM=sVJ5fedR`so6n4l>4 z>qXFKnjTAgkNFms+>0vA7~XJ7o<{V;&l*Tf{qWT;+@{FT29nO?CpB;Q9*volKX z(l%~n4z>3e2Wft^wNb&xOH{?BzJ}7ruTxs6Yp%i~zaKM_`ZEz&V&2&{I6CzDAk~)L z;HMozPZjwHT<7m3F5?nVaKP<|g@L&IFc6nd0OImjB3HqoVg6p_#F58t;}O&w`A&rratd_hAwx85y%dJHahQ513u8-21!oGKxaw zWfx%b>%eK~bGC{i2~Z^l0afCx1ss{#y>qu+;0qN{B|?TwDB-4UY(pN&%Zlf420_b7 z1G%F%R2i={vgpGoZHAY<4rEl|9E1hVK|zVuB{tjn+IKOTj~#ZS^?(*6KVX+bom1aB zWb-a{D_?=QnE_JY7y|CtQSj=L_HDZ-ZMSy!7*Fd$3iW=*60>zpGK4y3g-8H3Q-}mm zGj(LanZ=ddshK(?JA4hgC)=7r8Cg><$?=jUFUatcanBoiCi{sj1k7Dh#2I{Umlv_lsNvdK8L!>p4jUuPE<_9K(I6 zXha$B7_ZTHpP#XW(7Z*FL6qV5^|H}!_$JmQkp3-sLWC2t6Vc)Q{jG9L3G;CGcfyEN z|DUlo!mU&pfk};|JA?;}o4rEp%j6%71Y)b~p{QVUwbC1m6HNA?#7n{BIgW1YXw@@( z>ghVaz|*f<_y2Ye9iKN;hIi}9duKMfh|{p|?a>lcZ^3t$YxFOi)nkMrf3lgnb!`n#{WV9Hi4=T?vi=B^2u;=a3D={ET#cui-87nHyI6V8u*AV#2h;xWRRvI4faX_2I z>M#(rC8gVB_<_V8WnocP8bXk_DEuK|IPxj@(z$zvpWZDh%xB`mB1V|2kpaM0n83RB zMO#{N}F$c+v|H`!kD!y^G-0hWQm3&)!*fkm#InTMSELkEaLj7 z!3B9EYqy9Y7zOdl$%M2@c{zHZ4`X@fWZ<^7@xqbxF$9SES>9m&Yz!g8(^t*D;QBfE z9n3O3-4y$h$!y0HY_<~{XJC(5xV*$E%Fx>zgX{GB6Oi8zW>P;u0)i-X+3N?P0n1O? zR(atdt`WR)z>ox%j$C`?fFwixcPXp!N6(kywLA}dlY%LdWv>|(21X`KQ5joF>xn)t z$Ai;|mimEM_*CAg|3!P^_U*>6Oq&mk-84T&8H9i3*=((n)Xdv%*{56vNlF~9;G|4< zo~x!f0TEM55)d&-N+8dEmAw-&N$yy?rAjs+&*sTS=bDe?cE?DKk0VhBLuuTiW?#c8*!+T5-o zxQq;MoEt*ETm6blgt$cE!>V`f;EXJHfV-9wh8|@vXPi(yBHcQg681EYl01)-ki~@m zel}o$9k#WtFBB}sCD(6Zke>emR{s&RPr0W3FKV zX?Se^bu|7{REW~P=(@hjOP+@h-r71Ma7#!SMHU{fe&AzPLXMe@&m?kw{Sep$s=HT! zO$fSs#oe_q8`~=&$$Eit%uBw7PuQm^hg~LL5dJCQe9$#aod;JVy55fg#Q)X$95BaT z+iP8`;ZC%i_k^qX9GIj!cN%Li>-iqI3}l;!-?>L;d@aF+2YSZ=%AQioIip2BgJf2t z1TKXvw*;;RT%)?y^}zno8&!6wrN4zw|6N-0e*`}L&zb&={~1XX+g)n@eInOA&$!Ra z|8q3GDTwX2as=^P1|W_L_{&T{lG9&=P>lcmGx*;mUa_(KkplK-(gPf3%#2KIkbg^h z%=8@oWsUv}SpI*or~70p@ZbNWfMUB#$^VNL?@!}%H%6dJz*bM=FF98njQ<%f$I5Z1 zzPewZe|YfN82;d6{}`cvu8)zmjh>aYhP92BjjgqYj=8D!Uq841jDU>|Nb2rs+@Cr( z*%d&9sKiBG?dy$5ogN2rvuHIiT9S~>zdA86T$WbBi{WE42AH8WZ%;bp*w% z#A2_O1Ou1WjjO(~ad8+|If!fdZ;X(8rrClr0q2tO%k|dQiM<wb{iD{jfst=Fy*sVnh&53S+Xz#u(B8~`B1xFmJdEUjb<-l--n+D8 z)L>iIJQIv+&~D0Ia7LauW--*99qf77ezl-s(yU=yope4?=6hD|jgl{Hf^tCFj5oZv zpvF>MLqc;}_Y7rLvb-}nnB%fz!4(%`K#Rn>(ce1G+(mx;wv0$Ez;)u02 z4^vaxq+16ontK{*p~t-En}tQz%d7b+);5fMSK8_7iV5z$SNi9w6&gm?e)Ah2XiYk8 z7pE;H2|5>@KYep&YQ;8L>aSg~mqxMq{n7hxQ z`?L_X=N*i{H>nym6ox`-JiUaWVZ7@Y7aqZ^leRCW6Tf4f#qHkp< zp2{!0O4Leym0uE(D{lLwtU%LC&SUudgf1-a)7WV3G?tG=NkbjF^~b~M&)Dc{aq}z8 zox?%#SCte#fSW052$Y7h9iwcs^H4I(!L1K3xbot|(0mF;>+R#h+krhG=4TL%NMX zfd5m(Pbi&GL9GlU6z+;kq#pIsSTKf^UfNKt3LOv+z3kr}mOcxgveZ=&Z=_ut-kMHq zFiJ2o0iv4rJoV;h>3WCsaX{XHQ;1Gh3LYo(@8QT_P0$6QH5u%141JJpL-3z0#Thy8 z=JLS(o(|NE1<0?^iAt1Y3DWsMx|YEGyE6a?a>7NwaOm$w!`BWGjL>z;b}rKbg$Eul zPB*^R)F6_jWaR+y!iNu)0CV zwY$M-_FD!nj~WgZ3~r1}OTU}&-DMh;TkRN4P;O|9_9a4ywgtTe#8sY)eg>#Q!d(yF znStx=_E{;FLb4X2Z$n=c; z`ELMj(u|gtIJHiAlg?%!&Z}^+WWoB8173bT{eg|LMYS9{tJ<)9yn6f_?YO7UVTUW} z*y}m-J^8C%$CaL2mqD)2!s@f*t3Stg9lKUE6g;kWLp?tGxHsYK@?*{9!>GBV7CH$rzn~ z8cndt@gMCVAm!?clwl^fcbk^L_f{SMC?|$S?BA^7;OWiiLQ>XiV?Ml;TdT9(MSqG~AqFX?8D7~bE1%myw$1f)w@zdICByVix<+*;DR4!u zI;+QBL@fBx`=HazQP;vG|LhDiBt6e=mKpKyFAMBOR`}&}*o2{_Fb%(0h3mAxt1`Zt z88Z*L4d_YvX(Z?w5J8Jh(}C26nERk4ozL^Z_rM1we0e+tIh5!$2_;S;AOFP9`{3=AA2_N8c(r2bJ zcgid|QqW{+AjdqS08TIFAPH`kx_8J73nalggy?4_;=N&Z_X(X@w#d)G+vcPi)^ZtB z!0S^i@-c%-x$j<4tkMC#*i}q zEInFc?nTBt!a9=KAmRqWlE_gd7rl?>bSsfQb1E@}lHs~&Q$2!9lSHJc5RQ)0++WJz z>Kyftp5;9^lu6TplHb5}(WDxHc$gvp%PT{GgqM+2vC^kga83yj@oL5crPH5h6WDdZsgg8-<4JgB&ZDfN)K2qJso^X^2R?xdGSkF_Y{lV+ zBQ8KChxZWkdvN}&Zq$=^HPM`X=AvtU#k57#XZby@nO4z2nYCtjBt0ygKWiK?kZ)Bd zOqBUrZ0%0WVgh7>}OGuaJ^fF8?2q+QyCDv%&zseKs*l@V@HcwYDCK#GNG4sV_rdi_J?TYB&OF_&O@a z&u7q211k2p?ORcPKEu|RBF1k6s6Y-)>&sk2HxU7TuK{>L2w12?fb$D{$54s{ztusb zJsFl1*wWXk0pBo+x#I8`+WPpeiK6WDWX0zhot1vGj@KAJK|!X(^sf z_lz6ti@S*mU4DFZlC&e5E#!_A7I@C^4ip}F>1aDYrewd*yLz4VXA^hI%eQ!r}3qrF-CSfG%D^!xwTj`l&{ck9HX~krn ze$YR{A821vYG%YBh7T@7);^^5P9RT|VZL*+X2lS8-!)}22r_z@z6Hk$V zi;Nk2IA?xfJaLs_NjzN1*kSXj)GF^}tG!?T>Q{TI ze{rHlwK*?;k==HV*`J-O_C0!E1L^iso2#;~hTy{C$x(fbrba(mu$qTlNpJ$C9ma4w zeY#BXOM^JCr+l^Jf^u$~m=LAy=UK2U0-2u_N~E{r%DR;8%SU=Xgn$-f7SLi0W-;X1 zPC<)t1!yt0D;xB(QVfr)?d>lY+ChDUf2UrO-g+>UFY^SV1e%dW=d9pP3TfMPbAuD; zZ82gOdcf{n8<6Ynq6*rR*WOB(BV%8X3U4tPQwwCMq+XW_ z<6xgI$q}8~EsM>Uim%-lIri1PVu_B~amAutSrwE(u;s@@f?6+Qh|O;Y!GzgnA0CL$ zjmnjv46xhE%C@(~_hJl3Jx!O9$)C)?qcHyf1Wb7;wYh=cyBOQMlatm_6}M{oBqTNz#8q?sZ@1uollCdE=`P*e4=Y9-;KJ{FhTp%0v*?=NLUm9-h`+01Az{6tHaFf1jnVU}EzIr9RLUv} zg3lVdf2Bn5eg=4nJZ5sbA$iVBlHZ6z3%9p^i|ho8E8Lo!#NmUU*R(9ZvSO}W`h`)7 zdT#Qqiej7}6WddsO?~gwAN6tlWU=pksvN(XW3PI*+tM<9%dXmrkZl|G#3XJH)1$AjFU3x- z^E%fWXwP1rU3#{x!M$v?P(L_)e}3b>A|lZLx76*wlc)b9)a?#E{CguJ(|<@sbf>Jk z55&69RKM3XvEFN){+^or!E$uW&1|g9P3~yie=YfIl_t}FMv=zKcDH&!?)9g*Csy`5 zsPp$|@V{0@%M5TPD?JUJe_5+Phdur8fgJ0-{qPQe-RJfH9yI3v5rF;Opxuq&UuYQ9 zf0r@-Zzv|~Jq^1XI7W~p_FJ#UdQZdt?ZDaSS>H7r{QZXtVf{;d|G!0I>}>y{7*qQf zB-VuR><=V%my`bwBv!adWJD&0D*|IntZr8EQD43yr?pnbT}|@*W{!7W-#koPv^ze{ z-T8da+jiIDd|O7tF}|fewS$O=*q(xmkiY)=*MR>w5VB7E)8b=|ZPVw8I+j8E=C+@` z(vKyz=+Cc;-l$CnFSxs&|Dv$JIB`dtY-n=`oHt0e@Y5g)b1-sWytt^fdo;P`QE~Be z_|Z#Ij{U0xuyhk z$4QZ8pL=8d?OE&08QN~aV}y;hDtM%zPK_FV_#ZeB4W3mPBm})Q83Y*7-9sijN$zPw zc;ycp4oRz59_z&jjw^)_n8PgFdnepeMD9n2_Ilibg%@w{jBs(=qZd$~>>w_Qmiy7A zU>_5C2V&&~nDT_k#) z_V{S;OHVulV827Eb&+D#xx|adA8~ZTh(B`_#(K=^6wF^V=v(3Koc)Rfq%f#Tq%oj; zue|8$aoMFI#fPGWEs<~HGiwNZ2W5NF;tQV;s}1+PI*TkFooB#eDdHqh2LS1{Ed=A+uhsndG4U4Lky??UFfbpwz zrsJ48K7}D18I=(^hXj)cER8NKZkOC4@~0O_sUqqiI0-)$npwA*$>Rl$16=X?Nr(ZI zJeT)mc~_;X{?~?-L|bBi4lqYuBdURKo!bb%?qXf_T_RaAfz5ssL?>B+=p>fMtVzNA zWl@GvV*=3yATx=1i0qFLCDQ451N0;XfQt~xs(0{n4K zX3hG-%xcePUxbi9#VR3B`WliRTRD3Imo8$7F7d|q-K*T}L`xa!n};zo-9Pkep*vn} zZN~Mpb_+#`2L|aPPRBjNYjVM{dO)iLE|BwD#YOz7_=G)b(t%&DoF>b*De4)X2kU+9 zd>eUpOu^f%DyHb&6^4~GCPp?RF`fBQ`=)EN-B?G%c*LVs`qx5?vi%_hwL&dI)|Q3} zQR0u1bfIKHM=5#Y@_n#O*7+ZoD+%>t*5{znAvyLrcy0wf!3e#2-_;2B!PoqVPqlCM3F3gM5Qgl(ZxkV&KBb()h z*q->KpibweWtr?)RKDqibYDPfcl;sl0_Ob)Eh+vbY!xpEP*EK@qWxxTH9xsMfRBo^ zpQz0+R^xLKryUa@Fsuf^>UF+{Q9|Hea>&wv%Aq)#t8lewTKz~#A*qcpVM5?t{EonqOgv;%Z38VlnM5&_NVG$q>}W|#{EI0g z)RC9)t8B`L(Oo}F>eLqAvGlRE(msTtD#1*=gH`yw;m1D#tZM1c1+eNU1I_;XU|-KK~v3|Ybz21hM#r;yGWdL9E8H)OXSCVbwH{T%gc;I!o>)J zP+q;4{k9C#;e-Gs`dwbNS<;f_O~;Y<8Tw9sc%)0y()w|)+E-hIQ&ImxivaZ?Pqj#* z9n$YjB{_Ns>$CP~wx$)o#<1%pP_pF>n8>r*;ZxOR&y309N1V2ao{XNjY9xE_;Y+%g zEqy?9&lI*l?|WxIfbsRDTAq-&f}i({SaQHWA&uj;2A-A+{YcC;`yMi_TjH?`S0S)TGl6uds)nXOSuk=m`WTd`~9HIywsIiKx^j%?QnoC)qK~hL&qb zMyuEgVN5R+Tfx|wghn|WS2tp3&){qAAbI_Ch@NBQZ8;5@$uW+-Zbv=>ndg?ha0(B)%3QbITv{r6DK4p(;zObK|GSFof~27i#>&C!3<* ztp@3!)j-#bsN`O#0GInL{C(8F_*biXDxJ)}>7>mLCks>yGk04q9N@=o)>0~iEiu=` zOMavC!L84Zj)j<)IZCT|m>Lf*KaWpTQDzL8DL7AH7rl(y53mXb4{E>7F-swEm(&kA zXTcKzu~k7v754hM4Jk@C#Qsy<{W(-{6XcXx=AJckv$WQO^f>EXWl2($`iM!E{3CBC zDd|z$MS~6+B6x&7L!Fx$8sm`3+8rjVK}Ru2e}5o01YF1nDkG z>F$mJq(P*Hl9uie5Rew6MFi_Nz%4r=M$OwTg!#Dai4os*zWl1L;eN*RXdPna6F>xG!QCqH=;B8N7QaL3a;c-9!XRT`VUbdJ@*_ zaFU3`=MdI`7KbI!bjllazdEY%=Cr#U1fDCw8zCBt(og3YZ)wi4`7;$-bAkN{!G@(-?bI0d|?jro~uPchq#gx72HF zxkn*j*Vm$m*;M+RQ6N}hp+5F%BG4?Zmkc3WfxcjtN|Gc_LC_sF!-mN{EP0TOn#nmd z?A0dH?QB=w3I$HR9PkRbtUGCYzD0(E2a-l(vUe*r_Ag?iJFjMQg(~$&l7YGRYG9e# z3Y?5qpiufXL=h}iEkPV7p6+p{3mTr94$_TQL=PkDp-mTHu`;`NkU*P4%Nc5lB+F@) zBtTlUBs--&G{9%C_+E;7mMV+sg$j-{fl{hj>R@8gyg281#pq%li%RiSDISCIJsMPG zDg}1@Wh4zM8FqYp&yIrK}Kz-(SV}Rm7wsK5K6je*Y2dl?@CH3O-2;=#LNO9x!~y z&Zy>>==N2247~T;-7ye-ZG?aUJ@#Av!j4er*hYrm7 zEOs8Kzx7~LX~JXpB@cTg6tdLE=@MrnbPygQbBFc_wTV6b=tSV z{7SU29$N$`XBwPw?0IkaD<5;1CU0gIb=qT&*UI_Hz4V%zX7{nvtTCz6zL4nfnna6N zqS>)Mszh_vnq>*Jsy zrA|(E&TmH0kA)0lTX7lo}1b zy4OT0Mb$YRF~D2Z!gto&RIT*VvkJ`T5hyBN{USg4jP2flVpfHWPfmm667v|y{1qT` z_f?z2q^B#PBv}=ko3-JLSrutTGfahHT`DzCJYDr2vZYPO#_a6al(~Ji`dLaE8ltx2 zQ@|+N`4t#N3u|=s4>a(Gt4|+-%y`$wAss@hDg)-odP)a7DS3QZ?09wbG^H6Prj~j5 zHKGna-ow?_Jg5;P1Sa_TtVP_X#{*PF`#V@*M3A< zb2D+an!&z%wEUjUj>gGi_RAl;cbrLJLsbcM^WpvDbUV00p&6#!XwLR+Li+rhNkV$t zUE3nCdmHC!ucq5IzvhHIcCQ6#$&O<%Xw-DCeeLU{q~l)8)5Ew>ArykPIar%ny;{uo z7~-)#SgZP&NH1Pk&b%|@V5>0lhhDE|L1dGrtc$tXRJTaNYxcev)zZjfDp5OgTA%lq zUK-}X7|;F9gHhLrm}uI&Vu~V*;de_SV+;0*B4Zgdw2AZ(eLf`Mct5y2E}Iy96T7Tr zzQSA>DNL2)@9+9;rr1JQV!wK^r%pH>TgFve>WRZllfRW}{!xDX zPox^2TQv!+3NS7KD%kJUyH%6^tpsP~Y-H}_^v}p!T>l*-9M7%x_FLuRrR2F)-M~it z*9NbD)VKc0Hv8|yF?nt+Xt&#p3-G~iw;7;m{Y$ggAG+W_$XkCezX6Hs&l2IkleoCK z*t!1}$z||&Ja}WIFTII>=lVK$l4L&+dAcO8+jF@4*8V|H!&?)rlU>{KgrDn`9SaV; zhn(J3_!^2Wm&Y?5{^Z5ZX&quoKhxbApKjZ4uN}D6b( zJ!oO%c7@XTK?H4kM;&os| zCb(*IB1^9`b_X6PrRLutZu#x4eSZ4(O5ffPL)A3ZJL!R+6}~~s%RX5~KKH-Xl~{l4 zO8eJp3gNd=YuZziKjGgvc)S&a@w^4_sI@yv~;!kv@4+d4WoU0APQJLZf+ezEdyp8FF`mQ{3jbi3Z>Gh#F2s0SXO zo-u3td;MT|-n-l#>LB(bq9Q4#6^=wplAB;*4;@U4_|)wU?uz62xA{5u<5{ZjI!{10mbMfw{L?RN!?4OWb9{uq8yuple zM?R5Jq6))UT?3A+99Wmk6{TBOwVA$`0qhc{+7}FCg>ryqVgW-wqE7n0wokNu$6Ngc zjihVfobQ8&c2+F!K*(nWgnS5ho|sh3)^zJyY^EGYamn+S>yx@AuxKVY^KeCzdd z6yTe(J6VynOp~TTrB7i&Lw;YnQsdd_vt}*HqStd1mViIi#0W~ZAe5%-prj}KBSBFx zX`F24-ow5uc=DYp^yjbC*Rl#m#F)7ih{SF-W!&PS+RrGlcGN=jymDvRS#a;M5QLiF zfzj?`NN}JkgiAowAe?IHpsRkJu=5zuK|BG(;~hYD+~zdeLbR0M;Ek~1h7;jFgpGd0 zgGFjNmPKxoR-N{Uh!i^ae<6)YcM<0pBMgM54rrGf<|UgA;D^K4tKD4^n}skx$K$4| zr2))ccBR##5q}8(5B&l1$?2e}Q%7+{EBU%B!nL~Z1JNjXo*3RnWx)d`KNEXi&W0GH zH|Uq2H5@M5$_tX=7b)0D_1QGY170vkv%CRzS+U937gs|iprJguXN8Dor+_8 zi#O~K47V)5BcDB8OL((8+nNY;BoeAy(;@FnQ!H?+(BFGaZcq z&o8}SR7=HA0}8*h%O~~C2eEW>^l~yAy@ulka+GASjp)1AMG-VF@aE49)>ZokV!sWb z(mCPx_&kZUDpp1+e^}4SFO!)pZ4o1~{WGM{riH?uicr2F{d+OQK4MO^5&mc!^J8 zBtV&p0m{^z*H$U>rq6<<^S*D#!RB)(Z)-ZirCeWjwY>O+eAkB8?hKX5^GZyrdV3q= z8HFBRi!OR+GqJ49Fc)72Lp28fm>QU5u7y)hoBHWN?w66ZUiwSFPc@0- z%`0BXY`4A2ZZ+ZDaCoTtlf)t+)zzQ^EWd2Bx-g$PI)ZD%2v>V}VI5cD`U$?f5<{F{ zgX-?43hkAWv#>`{Nm{3m_zPDt;xEKYRx6 z3eGqlA?yZ>l+zO0Vk-s0LvS(NLV@|S5S3ofHyVEX8)=a0gU`+wqCu3X$dpr!&+@4W zJL%i2S2@LYCQ`)Q1^SP`S%2B-Vcmx(WaaPEyv-M6D z2@RP7yBq+xjwIMIL_^-A(m(i0Zl|jVEvv{seJ17UU2W1NGF^@s2(O6)Vd*HWco}sJW$RP^9a=Zy#;@0;J zg69J6w7j3c!{WiKKkr50(0q5Q@%=AH?>*{mH(pfMs>6ZiyG%<0-UN_R>J$<$0!UkP z^WEHJ%RPetm%Vqxjqee5w+zY)_BIU48O8G4CGPl?G)H`|O9^P4Yd&EEONM!(T~({w z@7e|VK%4UtuCN%=!^*0$BuVb6+8Giy#JkkW_`7rU8Ckin2v3uVBhI%xZww;$40)@N z?OrXq>3jTn^*XsWG-zA)&0RS4RfNtTRneI7LxQ~3B2zV$50fej2`F>7?u7M*(?Tn$ zUnR2`rK6opg486etFPhh z!`#Xzp~|0L>@1a+JS3{;Rt(cr32r`$gNJI5VSIc1!5TU2K(3G^*9I9tuyKCgEwl(o zcC54r$S)=umC`0(c$F&AC~u7{g-}9N{IS0KjusbT(Yh$mXg6{m5qOX&Lk7(Hq=Q@EE)Y2Xb- zgUF{BQ%mec*(vIp=C~YsDbkQCNKdLc`*|XZ#vxAMn_|6OvjNV4-@}UW8M&Tt^G%sv zP6Gtf6afO$lsFz>SL8}exiDiH;rXO{b6+V~q*()NcR@E!rZbbHOK7+fd)gty3*k!(iT$=yK-H0E+EEgGU+16m9&+Q%V!&W`R};U-<19}&}n z);7PO#-P&p*$3q(cPDFMjQsutz@vB^%y*}*(0Nga!X6c!;S~FC`8J)1s(4fMiS2Iq z22UARXUtsaQopM^!x8;z++1)bfi$~tK^gA(VqWgyfmL%1-M9I9l$4(>;NtMei$bYw zV*289tXbP)<{=L`%e)tbk;>lk&N}a}_Zc%kIME?c=D z#%ah%1@NYMsKn@&3v);mkG-@)4|>)kT%bDmIh&j+eUyeN-mBA0JtkRY6DL8z7Y0CD zZwrZ|x41(|ou1Wxw8-|{0Q?Uif}bKN6I)&?ueJP`IC(8>LRU|9d56)Poxl( zwl!1v?gfstev3_v2q0a;! zJGwX2)Q%-Pkd2~ru96+I(1*YJrere#D^%vwi`Av_VzX3Zo)Ng*WY9{Gizds3X&i19 zC;&};e>W_QF&9nlj`U64Cf80Ode{!N`ORz_w%z9q0sPuS29u;5$`hzDXdhB6Hj}$k z#vmibwMzgYiZ;O%HZ=7?w<`VQA#QeloOwA8ix*xPW1_-Am^oa6a`>CL%|Pnh#`j@N zsa7#0&r{(cbrLurYCoBs@&aHGn%MAXd`w|b z!}n@xK7LO=K+)>!)Fg6S%D}~ClPnB(KY^F2xI1sX@P)Cl-bv@ah4PV_nXk&hdr9C%yC4gsJB0D1I@ps zYgGWYpgFb%3*z`=;BEC_sfTV>d<$1hlz@OINHxb!0Eyu0!pi~sD{7Mzsuz|0sS!eH zmz`lXUb`(Qty6Z^!6?BREL>XsrVu~l&g!Y~u`L$U(}{~tRKc`CtZM}SYn185R{{S_ zi~J{jhyO>k$p0Pu&-ITw?0+Kmao-A89GqOh&<1G#zs0^=;p*RNkwEN&g6yP&g~i`0 zkbjOS{^x!+o?Elntu=TysE&V@MgOhp$j;6Gx2hvRv60=P*y@MiXBTf!Y)Z9%k7Bc7o#S$* z8z8Lhu4H$=_b9>)e~VkywFqn7=3>v{+mH^*c@2`croPQb-|LYMe~Pzfq21T^I~w}} z^KUBvi_O*H+YDpw%+R&Zj|&R>>-Kx0jLnFt^R0GLMl$P6zbqV4y*tGGuXe}9E-#lm zC|Zx|D6Y=}=4=$}@FX3Hii#E~juE zo1y3HaRl{NHh~ovp&~jCUt&*oPe+1^lE!M`E3#;FYoox z@u_iZ#F*LM>v%6lD%p-~xf2|?lWsE1c=4)hd`fqD>!(G?{OV`MpLq1zPaO86x#sg; zjh`wfWmP!>U7?@GIK#(`!l|NKgn~+E7Ozt!gcW(K(5Dk=p{$%&unw@knoC?Tv4?O0 zho@#^zos7hl|C;2jHOP&*{}&!qTvq#GWt|fVKjN+SNf@rFWH*rqNmikPTQs;;g33> zQp61Qlh*jYW@{rQ zSKDp<50CGf-lr3Nuwd`2?W2DRI?RP9dfWkUW(WXh-U)TUguA_13Zth6$8J)WZx46D z#uf`sbFGUJgCpUQtgd5k!FQklT4X$jDDnMp4vwgdDL7QIMLAT&>v6&h%q9O8-^;U( zI*LZS=aKC8to2{IR;VdDv)bK_^F>dSh(by2^}5%{cTAed#`~&wy;Mn}@ro5rhh4!mKkk!}hVFGtT%GNj z{z=nQ$Gg#xmkTAAeuN7HzR^zh&byBN zBrStK>v$(FRP~*9>*<~|RXWIjC?lI$YCau02DP43b>3K29D(HqbvqjoYe^0&YXm<@ zry8vH?qBVD3T~X)m$9ZW@X8k4*(f|3nx~*1+8m%C$7JIgi==fnKXqd1Rn>({b*eQp z`E({?7+X}t@Ct7sMk}d%=K*C`LS`rUIomxjIXK-3*B8hjxK2wN-}BundrtT9OzPfx zEjC8>Y>V&Oz)~$YZyz7wk8W0^`tZnlJ4BIq@;%-6rgu>(yuNH|blh`~qXOP3llP4- zB>R4r3;lunrHvJfBdf2gB6;3MmD`znPWdv-f8w;|_TJ-V9;jew?Dyj;dd)-ceNTJg zZs&5E9l_%U6%>MNr0CsU#XbX(n1dhKfdkqGvc2$@B=_AKp1OwZW=U=HKRqaVsr8!t z3fE#$6HgynQnAPD$}_Wna%VntQ0}<&y(SKUut?tP33;}zJL?&4qbChzUEj7smd7?+ zY)Ugs3!iceb1vA_8Aah`7A9-d9Skm0`17>K{3;1$n@fV-Mk41ZzXqu~(J?0T?mUBHk z<-)J0p**0qx9ZaRZpL55m>!u7o`Er))Q6mlh8d1Uu0p#F`dW}ktsoxf2JvE*9+^Md z1Hb-cjUhAMo91iJ2*Oy8H%skISMg*iX_e)LdrADx@gmMU98WW(f%L!+sF}hyxFWYo zQPww7&yPMYC(6Q@s8GMy@}-AZCkOi_J{{zTc|Mt^DKVX!SpGt5MPJ}VDqct$s{8Ph z4#+TjfF3@s9-DXY+rgIQZy$Ohv-faq6qASMFQrItI#LyQ&DvVd2yS@IlHc@e68Gg- zAS8O*l&~m;>ge)ffqqRr(67lsjjKwXWC8j$X$@kfAUMi`jGxR3uu1_P8GB+q?L(ITm$(8d^{2ut!8Q4U#nVo2! z2^nNaaBmcZ&yH%Egw^pM4_Dn_^pe+WT}r6BiRM_Xun8xsTECdcQ0w1E9YQT*v}j0P*ZqPqVp{8bLWH5w+c$A}M)^qXDAeF= ztMI(rHGZjN?OOY2g6FzfY`5S%&((A%-saa#XHv;|o}4|4XwjM~#;nm1L$v3MRR8ev zBkNx?ZOuIXoX5W4VkK|vvhKx#^#FzH&yInqwYs?Lz3LT;GV9%>GlX4o8pC^rC@2KN z{wT~Or4a|uji1b>wJ$M0SY9SHy(CxgWoe%xi^(@L9W%)4~5A)5Z@=AYs7{HnZl`)1|@$Z4CV$TMT!_! z-rjCgoZ*;mYH&jaB1#^SyavwObaUG}K`IoS`fc;P8%zRCrvYhwZS zm5`fcS^Z+%v?3mr7tywVE74M5_aFhKZF`y4fqL$0uNHjOLcw_5!w-$sHW6pQNde+ggM~3hznN&H#dNeSgybnX*H90W6^7>WdOrFq~ z6IN3aA$JdB1Xaaha9IqUIS6~+G-+B&YYyStQXJ84ea#oN7ShX*;MiY=MI3m?COzy* zvi388dH9qbl@MNQN47F`?Oi#la0fY0Xc|gDYf(kqKCq3#C zswei*=6FX~Uqz@I+EN5AF0*gSH1%1#Iuh_)d^UD_*Gh=5FN(XWT=|JxZPqJ8*9ug( z=Tt|G?D-l#z3Jdu^B&tD731(&IllRJ$pv#BaH-XE{XXa?+%*r-q$@Sa!ku6* zh=-Kt`$|ZG;!~-YDzdgRTG~sp%i}$L2w!_ZHQvnI;?uIJqbqOq zSNfpGHIvD428^;a>Fm2~*Ei!iiCPkj@@7?K<5qvgBK6VgMLF+;L@#9Nijr02>_DJN;d!uNs}>JYhw+2L*smYxQx*l@32p?N$+8!QPYsS*KJSks zDto-c@WDXyBE3ZR;O_k6giD0vl_cxIA9t2JeGGRVX2gAm%eANH)trUcCfBD-mY-Mi zm=HA0Q6M!^)=uUK!q`5f@2r`G?p*Lt_r+ST&UMxxCpz2Iun2`3={{J_BKr6~W;M;t zf_+J$e>k#$mY^wxO%*h3-p81))LBsv7j1u&)sypv%L!idHE8~L3MWKGAddg>4gQEa z-p6WLMK*qUnFYD7;}?KF<}@c!IK?F(5HNaP!Vv9!wGj(0~a%axk_(7KYC zj^iZ^-+$Sg{h9QtHCnROd26s!Kl8feOBwo=ng6WXca$gG8G7Ft=v$s;W=vmYON#M4 zchAfaT)TsQCHirQ`Pc#R?7`2TFK76m^C(06`vS6G(aT?i`eQW*uFrQ%zFZ5j9*d2H zj*hQV>d>92`k@UnXs)Nvjd?yDWY%6^C$g+W@+292r1ct$M}hTj>~Lk+D=q=a&4CI` z{Fp9;MA(N4%wg*XY6TWJ@z&soYk`wsU2CFo9{eObHGM}@R9Q&#*$z$tZJP6kVY|{7 z;Z4m?m{3CX^R3^`fADgvdh>2>Yeh)pp@@)3w=+X@ zAgyX;KGF{Aw90ti9lQLK1jR#dTJ1R12D1kxJ_ipZJ4R*@!(Q<%aYLGM@-pKrDd*!X zv4@30dj(M^?GR=VWtTqzF$e1QmH$smbz~oBd=jT7?nHv6j8aQ`AKSS2P=14 z-r2(;Zn2`Q%SiCE=xOR}eChioUMJcev|lMf%hPmm7&6B}m~F=>O(kZ6bWk!aap&(z zM1XipD4Qpa3VxP*N0A#0!xq3WtOX3igeKoLdD(b^4qhwjM~Png)7pX?Ljb)92UO!{^R7jIsMJV5xa7U~xDuU{U>^E;ETR z4fNR>x3&}#1b2IlqnC(uK3-CTkm$C!Qlj4nMkqmGDQ8t{pw6J7=60;rjdU_z62cgb z_OnDEj`*C=uLFd7ox4Dv0dlJeXw69oy?yEjQ0C&p68#SVe)`y9j@tBKC)Y5j)nbUR zTwpmF3?y-7MMGK*ZeD`R?MvX|r*FEn+3%q|!(Rug+b^vB1r(Qms=EDSBJlr+>h`}E z8*u;GjrE@kT-<;rcf*zgs@q@b{oLFFzmu>3R!6cjv;EszOYVPsH~u3X@QlY+=Juye#&NS+U{(M1YW;PSasHD{29&oydrbeG^2Wu_ z!T0ydn>|@Kj_^dCzndqE2w)h)5F$SDitjACkcs$C%Ys7-hnnWT4!|-gnmvIjb z-o2Z*78uczIa%{5Xk|n8yDoq2;9Ra>k+ag*t?GXL(Rtp1+~43cgX!FZeMg6H8*kK` zE>B|`Tdx)m9kwe{X5V#GOt=?aV||5H%Drtf+&?q&YpKR+z4AI+9{P2-<-b?%ps*1q z`PsgE(f{MjaL(0>_4V~>I%pEB;Zv6$x*v~?6*Ao}Y`Xglqo3=>h;(Y)L*R3jVt2nN zANRUm-0ePt=dFJ+Dtd{KR;XT+guP?Ys?Q;J-OyceA@W(5#T_PsP9Ewu-VP2i%Rj+~0SaYLF*~I*J+5<@F$ZlhHh16Xh%)hqh0cuv211NEJ@4@}r@my|$t!KM7r% zE?|nLyX|Zr7WS>pqT1i3k4+#iuD)_GKL~WBw5-0QFBOK3T~4kJyfk(%GNd8$+M#E0 z7udp{QwW`W-uMw}qLVG>{c@^0L6^*C(D&%EWf7)>%0BN&i_9M9JL1l}s$~TiJaG|@ z?dMy8f(vI;q&^EAWRD1<8HPAU`H{Yp?+tl9oLDM@<7c-MzbYWdsk|FhC3)0uykX8cVcypAh=i!?sI-fkl652^1`TP=cF- z$M8Z`&d$XHH-54zN4Ho++v0tq_DJU!17B-$>=qVR48D`&w!qG|&+YGD-nDp8@N^g% z<#-OCskM6Q`&*;9(-J=2c5>k{1>r9S#0@V+o5->~a5`34g9R2v*(cUMFweBVc;thE zW6pSrPWZXvlwKWvRHp!Y1J+!c*h9p=m6jML3-{6^2%L46D%mecMNsp$v#kZyopa%9 z`MlgDw5Q`bux-E+)&nfzsuMPx-TTT;v)&D1AJcdY@Nz0wODOh!p;at%q`W-E>z|H6 z`^+gK7=+FD#Df6Wn&nuUKl+PKbiYtBd-VOaR4ekA^T!<_D=FJ}LuPqETY_-~knP`w zlY81$B^BWA6g>kGVy*zjRCpF|aLtt3^X?1eUbuyq5Z9*YJ+5m38s|4HylanrvHDNe z>{H@-E7*;8hfP_6oW_CW0~d=sDa3-V&um8TMYO5O7NBN1r&>~mSz*Z6!3mSBS`6R} z!4-NScTo5Ie&TS;$`mi2a7%#I13j0^py%=kVDe z9IvE$wG@jo)l+f;-a>3J@`D50RKAq_S7mkCpr>JBn?85w&f6xMl*m5QU?g-->C@Z!t% zA(*cvyB9=~^#cm+w$U+-nRDEe{ECH{T-E!n{mNX4Q1#;4>bp~qSahnf!)snyT75@u~iZ_ zL4|3aWX?rkH)T-|p(Nk;Y(XzTZOS5aeC?4B6}sEToQ<#_9uC)JA_5oc(1hA%DTH>q z#!t&a%M}Ob#1hq+;*3H|P3KKlv4xF}=9srF|3f(&@@XwI+T(oM~e2sQ@8JT?p4jdmH$ejgz{B}O5R6%aow?@9wZ{E@3fexGm zT)Y})`yx6+{eV?DTtBEf=?LVFgID;LLCuQVO`TKCe{Oy}7c@{v#$CL3Lx#g~ zrZ`G92kF8x(ExLc<3of5B+eNHy7tC;=8*Qva$%S;nyx(BR;wBghIYUzW3G0<$H4Mm z%tZ3V!h4zk%SZAdHe1E%)jTT-C_@;P%Iu4i?av;A3_f3GWD6JJ&#KXTM0= z<75K&DbU)f4q7`$aj>crL$v8yJG0O4u)`h&SoytDJ5q{FHG&E+fnV{ho%!c?$`SqG zH4pBl8k1+xwvNj7KJrECdgRPzZwu~eB*M4g(fJ4f2`IAGl63FN#~J@l?vJ5hLpX;F zB`M>DrO@E}yL|NNki=}r%jkk9a0A(>ST5>wg0U^qcfZmF^K_0RVt=ySe1pYA6$@|w zhzh$MJci2S$Q=Byt%MEGy@?oi%{B+%TrablNCCtlT0_CKyOiW(iA(@>LLR zM$urGOk6cRsW5>eVgzVI2=E?KQPMm4ppunC#syl!l@oiIy7>S%)G~cpA7sF9Zn^!F z2zaI9A!c(k!4l6b5*pK_9O=TG?YIf|Vw1-NRk+y4j|rxeHg1Sppj(i+)h zv&6f`ISjx`lo`%}rS7ULNPRUH^(^e6ze@cp-4V#RLQ5&g+F`v!v~vILH7McvUC@S((QE?tYGUF1 zUX*H`3!s9cp4pMCDhdxcg+7&Eyza7`egk@|U6A2kT2V#PK?C~3iH zcdW+!oh8K?8tm5seEHtq>$*p6zSOgKo_sQP^MhpRWvff=TFZ-G%j9$oSi(AdQK|G)We>+;ZQwT*yVO`eyIOa$A(S zmh`;fx!*UlCs?4})Kq~%HNe^OF!5kD%)F_gyg$j<%oUr;fJ|Cb8wDqROrmpCMiO6( ztm%NKiJ%%c)u|#G*_gVr`Nh2atornnwzTS|HX-SX_%vMdvQf zu4|is6yGG;1?ToW5?+(cG_Ikr7>a@sKdNO8I&9)sw9Kp0iColm5^9KeI=)RKwI8#x zm!+kd|C)k*x~z|g;eZI%7ur6fC4b0<2~!MF(B{Ap4>ySuff6>+t8+p)Q%#23Wz6xl zFhJrv*({onz96C(JMBpVLBfe_FS~+)=J?t$2z$c@hM$Efpb#V|zj~g;o@x@;l5flO z;bA(fkuO|Fw$0fa5s5*-eZvsAfIISW6}S-V*t>>TLbE~mr;^k^3Jw29B&q+s?tuHx zg28{TW^nP|s2MlbrvEX5ae+d~|3v^YcegcqZesR#uzCUR|4tN@i~Fw<3m5wz?li93 zK7@ZOvHU6c3HbiDHb&-uCjk9-Y-(J$n%QlRmxKQ=Yj>-e{af$cUqYY%eAWItwmz;~ zZR)pC?XRnLt4(q7@%?LU>SkO0dE@YEHOiZfAeD-rM_p=eB=fRcz99#@U;q z*HEnF*TNlrxBGRv&oP|aTm3H%h7B)Iw>r+m8bFojZU2DMP5%JRlahqs%5L zz@YYdMf;v#C;?qaMA_W0c}JaDs&_v8pE?W=sdj_jwCWg`sO-Ro7Y{}{&M2Z93BAvc z@8&-lz_e}<97<-(5EZ-hT<8cT`-OP@t*tpbwnUmB`}iL*5XDH&{T4u2j&yalYgQ_QuPObc%&ztXgym*2eHJy% zj3~T~MjNX=l`b%5-VbWESRE$V8-8X}IxUx}>BB-fIm8L!)-|grVW`g^Ae08gpa{4+|93PU*4O^%)ZRbc~(<TY$Kvu%cq6D zPDw*pwYIJqX+qUhCkSg1C+5cZy`nkT$Vln_p9Xv6NOr`PK-23S?ZTa(19+WHFHnMr z2xHB5?Cc_YF!3%?2?-Yx&Q-8chpq{q9wYW53w0n8l7C>kSFP)l7uBB1&XFvgA=f5~ z=8nrqGX0J>!+5!2g|M?2vALHNM@Z_;DnjAw6xeO18C`moFnhbc5U0g*3z0_=Nx#wT zE|1~t4JwbT8&g~SF!~1#=?ybol3?Dx&g_vS1}%%py<|}9;NfDCI}~YcT#J`oitK0I zT%d*VM4S*Szh8klZJ>UQW)llhqXo4!Wn;7jJAb62q9hVRcg%x#uIp1#qjw-PWigbr z_a*+(u>}q}b}kAMX1YC;96CTCb7A{(Qx)qv&~`6*%*S7cR3B>=`bPHkL*i4<5O(*> z#{LS{)=ErOqLoO4En+MCvVdTW-Z)?lqE5jDNH=-~(3Bp>SRu<=<@+Lm_AOE@A81*? z)O(I$+=Ctmza3zvI7|x~4^rardyd^|^Kk&N(!gcnH>LfeNuaT zq-Eo}3^qx0;RNAzf=&qNj5xb`cOQ8Bjj>0Ng7RqzJ89b~bJ3916xahW^FA?yEY)l5 z{#bD|izwIw{S18lH@>H~=PDvol6!x7VK#w8gAaQxnbpgVBC1Z&TSwo1cE9Y17cfU* ze(6_UjZ9Rn-m`hEwDM-$Zs{>nt?rEQNDvR-aBmCBk^Zqo%u0EA21)S1RQWoorbR@; z3$jx^35z8ZgJC@a$4*bT&3jWTSEE;cn|@xKE#uv+dAsFUKgKoA=$1TH=U&a03Ar*L z*o(O`gm}KtaR0XKAmnO%WKn~bK9{YREqsf>a5P?yPsgu z2#t&LxcEu=sQ>zrd5~^RhCJWfZLzOGF0t;GmG6ck*Ta20T7HH>jej*2qtKVvm0d7W zRwR`&$2NbCDdi+cfMxxb0qY7r_8`m~t*!BQ$k>Fwr%s1Hm}@vt-Ut)Jx5Y z7k3s$6JJ_!-HlkY7m?+DW~t0QN3+=G?C7D58>O213{FFOc?ACJkNj6%a?0GIGN&c%`{b&?bLF&}q$gK3* zPbX;7TpI5u@+FJE4i;kL)Go!DS%{=O!%C(mDkimwOQ|u1o|~QcA(sbTVZ65%8xccl z18sPSiSPho4UIRC(_k5ynM&Ptn%vBwspLI#k$HQ*?*^9kzdXZ_*}#*-%i z?5)7RZ$R3Tz#Z=f$ecjohKxX1K(s2JB3~Th{~kf@x9(m1Qq&pkeYgdb$S+FfD`38J zkI=EFrkGaTnXrUCu*eY6|D>T>JJ~3s``D%LV1LS$5&9$RSw@M6FG3&f^bMh!q6e=n4ps~!>L;jOSfM2``qns}4=!689#lvRJFrswXMQ`+eu9Ma+?zEJVBf8A zrY;eFBs@#e@rXq)OHp)WGC+Ie$ggaNj&7as=%qCn}5)3BvUTu5zzk9UsL8{3Fe7F3>c1Q&YOVN%k zQT+-pkw&(uCiM#ADB6fSqMV8C%}K^Y!7F*Mn7dfDs7|bw!o#1y8*7iEGiCGVW(Aru z(W@LV<$^yZl>_2&J!HSwJddh$mQBV`7Jp7^v^N5LxQ{hZaJ{7UakD#EXcO~JPzSJu z?t2m5LqqY4=qP(@zE4D_mkUByOu2fw-?@Z4@%r94b#lsNEK<=A?PHJRAV{wgk&1+-(|tyoft!CVGMy zKlZDN;vIN5*Klb0HY;$hTG6w7Mwa0iw+V0eYI;w|GSlZ|CL<$I2?btOq4$Is4{w2n z6>4e_2TQz>RnRO;!x>&7p#hnAq1Hc|s0QJ>`ym;8E;&X9BS})FKD_{iPDR;-#XU;l z@DMc&?O%6baL?#qnvlm37#>Vh6I>yITWS!QJ3!lQw!Q;9?vmlqK*&tyP0UUfU~XY4 z$tKKVFxt>o@2@6}A`?0UDbc<|I5f%Eg-H)zJLxqMpmsQi20Dc=m~ z`5EuWo;XUSP$uKGR6xX~g>6y-danvO;qjk4rvwnMo%bQNzd2SmN1*=J#R*ULGZ$PO z7WE=Yw^7tU;D%xy)gG5q%`@L|$XDNI>Rvrth~O`=^~uzPOS^72tPLh$!_UWUi)!`Q z7kYz^uwT$$4zEtc3#C>Pm#0{wVq&@zK$K!alg(u-Z5|Sp++U8Pp@X2Q`4sI-`D+s) zOY;zsX)8&-l`o?XQS$Mf-~bH)2k7aK)j4R^e0K*-Lr4yxo$v)tbvm&e_vdO<(w z%Hm1a_7-110esJ1{r;Xcf&a?dEt%JwMC9fg^0_>1NITz9wfrDtR;K{(|8aMgVR3Zn z)`s8&5AIHIn#MIDIE}jmcXzi00t8JUc!1#U?hq^lcMAjw?(Xmv$vbmin>p7t-~2j1 znl8GV>Rr1wRlDw5>sjyKYh;se8wue3*tI~kh(=M&+;^syqvLHAoGA!UXVu z5n=Xg&RNa;HX08PLXjgdI?nN^9R1difQkxGCK0IK%TErtQ+xI2)!zY3O0YO1)L4m< zItJL_$`s~JmSE;PUdqQYT%5SFFJW-ql+|(5=NXuy8&C0jA^c$14N@e8)Ub}qXcHv` zZ36#sHQLSXvBk!CHx4z(jr8*_G#=Xg?J-s)8s~q<7RUY*YCRAd z&_9zQ*?&TRcNf62{)yUt-&-Iq_TM+`--0Y&@Si}I&Yx^M{6i&Kxn`^D-aqG{N1nd z`XMx6SJ-X(w}NVA!Fu}-1=TukkDY9=%6f5GxB^v(y`Qo%=q2A)FO6K-hg?Ua9}>I1 z+INu~26R^4p7)n~*Yc}|%d5wwY?)iCP7c~EUR5p%?OA>6tZsha+=$NR@5}Zn+U0M? zR*!}Eg?xo76}aqVR1=`^2QM#f`Ci`i!Lh(rZMXUQPTMYUH}X>jui2Xu1W(+{ zp(lg59>c&BdYab>3&F=^*h46rJLK^r9S1Z|E8mcHpm^=NE`!w@TwrifQ3h@hh4%~| zw^)O1$Dq*Yyxr>zf`T~7o2)*z-LA}|xs|ZUIOX2Mrd2xTa}B@bL*?HILD@jCbM37&A<@QHBc>^I+s337(0Krkd> zW)L?*2FDtjidVIB8qa2De=#JBk=qA`gzcN%rx~CxPxy-=RZ=qhnyW9XiIB|fT$?JJ zWuB7B9Zb5+`m2MLR(B{@TmT{@ceskw31 zzaTn-({ItxgI7!6QARd+Hhf`b{rk#zw!?Ng1-CV=XR6DQC8Y?5b}^*hJUUhhuj8fL7! ztI0?F@$rwuUHRP)E>j#h07yXm6Eh@pppHF(@^**H}nQHeT1D{DZvpjCbZb-85 zFRCfmW?Wx2AmThqTEz3mZY8I^fTI{-4TBmU- zDBn>8%NLT-*Vf+bR#>C!skGj>vk86g{<1bvd!jl;%SUVF*1Cp!E`ck~Lah&fi!r9W2f>V<>UBQ+7sTRr#6;Cn@1LwckBnK zg_lno)LK~Dn+h-W-Y4Dr7he}zk33!~iUCiw*y-6~u9s?4tJytwUT5&j<|4CSCz@+u zxn>MIjvd)c_K%z)6;GcPJO7GhB!6(0;VqhWWN$S zbZZ7V-?JtoBeggo&x|oH1^B_RH4}8|iR&wsk(x3kb<45)PCD#F(z1e=OQ~^y_Z>r2 zf82OL2XmJ7#|0`lo8w9*b2HJ;&wnh3FqN7^A5~-kYcgk~Wz>S|fq~(Jsm&%|-*Ohy zR!mP&g*-LIQO2KD97o3q_lio|2H!s$*=8V3GG!YPe}8Cp?IvCQRde@S=9FQ)NJ_ARhbU(D$oD zkdAS1K6`gXlN0)Xuvb$Q<7mOiKx(8+@=amhwhg9f+X39KM1cEM2qw~D52LDxHuoMC1^!D3^(Lr#IfN{8pdp}$QV3%raGU^AQgWb+OoY*; z#vv;!A%#()7C<2@j`>GMNi%qQc8XwGGC{p|qg3x=i2)8@fuf8Vuy_A4lSPh&qV}aH z+*tqTMbvSR(Yd#LWNy>^(s7AVn!P*F%1i<1Dx7`&5(S;dy_Wwt5Csfr!u3Hp18T9* zcof38ZcB(zD8d4xb%5OrkM3i@6YUGL*XQzzjjHH zablGfAT$F~+Yp$Zg#8Q;?R2b4dq7}-atw-p8cAu{H~BxMlQT<+(y2Uu5L!uOX|0&_!p)$p2{+ZU#D!(_pxs8^F{p{y-B}nlI3RH4ct2}dXvy5wkl-= z^T8r!jY4^UZ%P*xra2p(o3pjUOS}uhYL=1ag^`@73h7P41-%@jWQYaFS2+eHlvrTK zaxxn#WlBJ-PC{yG3Dg~w%PCUoi?S*mQq&YW(2A?oqN*5(j4~(Y5@3ptC#@~Scy2@( zdzOT?Ce-8^cda|Ai91;$r$Y-Sv#E8hir={xR~v3st3Au~1{Rj9D?>Lka1}MjDQUyB zI-M26@|Y}N5{?4NOky^TlA*H(uW+lYSyjg)6%XI!XIFB{w@hbx?^=6C=F0OuwUpop zMF#q_$4V=HfXL#ckS>4Z`b%Q>zO*2WBnZ_o+5%$?5|HPOzv0G622YsB*34R;j zugw;T6!OhNq)t&lG^zDUKemf;lm(O{JHetjL)grz6s~Pxu`n}#)Kq$D0V_QEhu0=r zI3AuNM!>1`63a6Oh%1R1U0~<(wM5MDjDVWaQ-_ShYop~E8R?V4TJYNi?NZ5ZPg(Yh zrz+79FKh-Wc!m0uL$17C6hlw`fV^*m7iXrx&A~R{+^Y;E*ZKv0M*z;qC)?pB4J6&{ zl@i_TKGxwTSH$>z{WI)wo4y7dW4Ar#-B(men;;~F@-V8JXw!pNby);$*aM43Zc^X{ zEirJ2R0JvLmKsA*3Rp~f4iQEYRT&NMQJ+7)pf(2zwQ+!%6p}Q34&lsj2Es>&1(b>3;)8WTU7b?MUgV zLzpO;l6#40E2ODNRDMTDHiHh{Hh$x+k?!*hbQ(eV3_W<;*bS+vTB(z)zFeu3zP4J1 zk(D6hKzwdoU@cQrBWa9tX1PNGiv`Lw3-dSrizjVKbOLX9Y#gqL7f%E}jS1ZtISSu_ zjbj+IJF#>%_sGtt&T3+~Zu!c$t+Fc+?)L7vNBv&6iWZ~1yXjfOiK%8cY)}(dnf%&I zpvp*)nG*jRQ$ zwJQQP<}VZsjH||G8a8pUj*XHGs|K&sz8139d;<<36~F=HF>nB3emH<&aTU6m7KW+j z3%piz9#(4*(q#yk`Yw5?CkR??HCJST^Wef0k^b~f@}ae)shNU3*XgS?!3v1Q3nL_)@fjWC5+EHk>?nfyU z_*kfyCGcc?Nhgc7`PV+Q;mTq%*xmz_2K>^t_6{Ez2=n7 zJNn*$dW=!8L~8W40tJ5gs7tWesWm8@I*pk!3wSU94_Z~fPPC`A`2qEWT=cZS=hs|n zJ~fimoR~#1NnK5Au%GglRV7!NAkBXJd{pNZrPzN0l;)(CUrTZbqbi9uP#XTJzrset zhaVFC0I0iqb#TU_a4}VXE%NIpWXY|GSc|Ks_D`@X1xalgvy9^D*=`w^@OrlRqsy%& z0q)}^&JJoH_Nj2O5s-GhCtOEXPvn{>^njns5n+;F&Fc2(&9S%SVaa8y)t%O{-u4Ra zKGc|V_>I7TA3>e!G2P4WIhQdkX*rjyFnXnH z_huKzdWS9FhyNCW{Z$Y1e*=R3WDx%g1pDv!)Y#d0e|pjY2*$(xn@oxQL9q0P%t||Z z6GsDQ3%iG)%3oQU#*VIlaO#f{1DwB?0R87;GZ0X&>LD_dhm#z{1!&A3%8orO{!)8! z{f|QFfp-}hSerQNIXjt{u>%(q&c8=Fyqte!r2mQg5yS-)?f(_)`Mc))quAF!^-_Oq z4d}0}`R_>aK->U)1B`{-2pp^1Ofn!nvsf0ac3M?J#}BvkxK7Rb)V z{;PfeY|38;kC~mGv)!NT!vW;&_n`9Mk~bcnzqlJCiKTFS_Dl23vU+=`si*^gxTL;{ zyYPQS5NJ#tbRS>GJ=tjNs#-k{pL|BCp7tetl_hsM71Cq+5->ON-`p8c37gv0{LJeV z7QESR=d0ztaiK_aHR6tnZzL&+1O@fk0YRR9`z-gJ{568L+hzNwV-5Ggi?3(gh}(1y z&eMDw9^8#r2P^V>N87Dr2Mbs$G@fZTpZEMcrk4SCc2WwP|ZdGDOM&^67!CEH7L9DTNh^L`ZT~t49&82NPIBda0 zqe}`j(D!@5ZO7^%89J>UZ`OQAb(CK-`Cg<$ntTa5YR~ijy-ZEFix_^TuD-QhK)SRY zzGw`(n)ImAD>W+}Jk>DU~F8l{aiIDN1KEf;TZ8&OGd(-R|hEcUMVN|Z>X$>hMX z;^6rC(G2-oR(j)g#|ol^ktQ);tzC`y&7KIl$aZ>1_?aloE^PGMyYgbuGto!CQUq z)JO9n#NC%-vr4N--?cbK;)yto@xL?Bd=rIOp7fY00>W%d&ufPK^7*$%u!gSQ#h7<+ z@Ti?nF(JFr%;T;O;C3y#B4TdD&>tiY5^HN0TCC!nRc{gbrW6YnA+s&g1Xx9i#IeR$L ziXqLfjMjYT-wcumN_DH{+J;GgulP}eQ=bU%Dz5lPWHv|PD>sIa4>ynAE#q|t#$t>n z17&<#7Xx8i$9W56Q8FB#09AkR0y$dA87{L81N6dsqxHo3Bi2XIBW^e;2i^;DCP^E? zacoX%S$Mi;4l|L~WZqO1LEfe}QW3i|qm?52f@q%ttn28pVW?jCVW=L4%yX9N(ZWSM z;A_ZfFX2D{A(Qrnw&t6V@wJEu)DuVlpf{-@Fx|8q5Aq^yF-j2_Ocrw&a_?dt>lEmC zy&Mlj$>&d9cKP?Ft>H06F_eeS8<^a@o$jxf6#`nwTvf!f9d7rZ3N7zfsepgzIO^ z6(mgdg|pckwOKT0YBzIym&X1UZDVSOY>HFp#F2~BZ&V27#`?!;Gc2h|$;Y__uZ`pG zt)vBEnH|xu79ckiq>rIZ@o_VpObZr(s&p~Q>fW@Aji@86CG6=^;|Gidvi_l3-U^pf z5}(+|4Fc(VUX7Eu=Zvr3Kb{1)91ew|zc*Wb#5+J8%N*ZKml(0a(%0mjjqsriBA4-a z3b5y?<4IuAHxW_xj@_C*eQy>N?TgbZFdqSAF!1SX+OMwtCL*oce!MIlrBabK^LF6q zN6mD=s^B~q$@$`vw(*6H>oEJ~CK33X#z#V}-O0#((lwnI45M|U&$%~u+UjF{s2(fa z5Wb$CPEk7}XHtG6gq8c^L!oBsRI_qXWnt9N6U44Z@*Ky;+<8ldrf43Tx}3*$FTs9J zv}SWL@P3nRlLlim)^=N4Cy}F<+$#%nL^Jj*6&)>j+`2BAOXR+K8fJcD%JU^H+h&v@ zVvTPwsI)u%XuG&UPTeF0?`3QF;+8z3Fdqe>hBQ(Ys4pTw)nGSy>?W2e-(Hoc<;UaVm*%l zqeVAh_Jsl@Q9J&o0`{eN954wVmNCba1Tt8Vlc4(<_#3Gns!XG>kVnZ!n_5z3CoaHb z5)jLbLDF#0`?$PF+xDJ?lHo4V1H#Fe9U+AyZWc=SCYG9OfG*oLzk2M=XQ+S=UNP2?qsc7`g+h03W`*mu;7VKMXJ-F4v!T zQ2IrFamDdk)(fB#;>M}oE?6H#xLqA?>FT}ks=(1w=?dlQK^8Se4lv>c`}UR zbIgm#(EHKkdqhxYo07rxVQ0fYXKCgmVy7DOWz=vrwadnId80O9s7-rE`;Q0seKr_!Vr$8)w4hH_D`28qkL_~q)w~?Ml zYF_Meq!6|BYO;)2KGpddc>X~tMYHXa)O*cIu^}TpU{wXq=hdd7r(HP~cn%6d3VklA z3^)r7E2={ce~S(33>*)C7ng(?i=qsS@=2*6f?bYJ62crOQz0BuSL5a^5jev|+E&?@ zyhS3%?ix|-{T1NspnoWp@PRe!w6lds0nr8^2$z@*U|J+1=sXdJSFC^k9AayXF@_S5 zXPgjDvVJJV2C)Ki4Lm=gDEBA<72>)wDuz(O5?1GEaNQh^C+h zqLuDoMDNq9L7H+kK&PpOVsqlIw(ih<6;*`^47&^r(v6{qqa`8*RfXo)rOQq+-^<2B zp)S%xMr~_iqz%trSVnSX zO;s@FO(!p|-*TrG_kV{H}hv@O3Bl_8I5t*F#<7u8UuyCcQA=Z^y z7W!7g0EeGEF>6p*#QIA0=VtU$|J)3Ok9_y$gQ>w~BT=7o#N6fZn-dec);vs4ZF4+q zR<}`^VoFH-PcEf734XwR*g~nf&-t)rom+KRpwh}PA)QZq=n$-wGVe`%qLZEEd?*%c zIlEu^!E&~JUYe7$KVH26>`memrzFc)r<|Yj;(NBr7)4sPN(@?yU-s<&p=!RbK{nq< zoqH_lQ?jLVKd8m7lfNZt?0=P1{U0G||9i1~uHOrO{y(r45ZCz=69G8pcVvbG{1cJz zaQ>5r{0}H{vUK|kCgS?*p7@W@4EwJVSbu_OV0NH2VD5hj(Lj2}e}-s(Wvu^EdjR#= z1GeJ&Be&vw07wA0`n%pSbhQ6#@BAJS{eSE$&@V{!(3;;dJ$BH)Zp|;m_@~|hnAPtw z?7wAJ+`Mdmv_0y~*b?{P02R4ToS>`hDRa-JHJO}OPH{Cn8GoTBh_qe`1p7+}?a%$`lCh~B>Z}e*V zMq=+G&@}IRzdkQ~S9Oc9KOOb0q@!i3(d8b!-6Vh;m$<|F;@nQyX18mtbM-1;yE+@2k0QG@-8tJ-*HEl3m?3sm&?(6D!mE)7R5jkjlVlQK4q_I2NP~GJ zJ65i1Ngf}NmK>Hh_i&-#lcFuatbK1EB67F6av}55-rB9NCfeya+ZM6v+4i^JI&I&2 z#>##bZ5MY3I)QaE{*@}C?t^X4^qRmYf*{|gqk8OuH=F&HI8+(muRC2)eh6%BoTA7wk<@Kg$V3yGW zRWFKd9u+=auq45iLpQuov_k~`K=K_GZw^lvsLLV}8lr_vjxX*Al)yF$RVRjd#|U`n zy4nnF5tuXqm6Ay=z>}8Ydday~%3;OWn^WLi_JiNt6ThbcrVKI}jslnp5 z4T?*2H9Z+7#*(|i4c4RS!!Fd!(Ewt;EaK?Jf!Z|mU$WJrfw&kTFSM;F#*|C&xc&uX z6>*OT+-!;62UK%mZ${{5cVZ&76|aP(38F8S%aLvlPzq3mn*=_G5!x}HLAG|$UN$Hfs?rInH8A%R!(Qpo z=T+2lAZXLTbn%ygzlubY)1HA4H+=xOM5bK+9MoEIVJkGVragr8a7w}OHKeU*bJ@*_6c?mIV~?ds0-BY-UXCaP62Lb(*b2n z0Tomax#`Cr52dJ~xaPNLdaA@fgEA4mf?SxoKt^f;OwG#))pDd;y1T|ftL{gz1E8Oi zXOnH0NF@EEYhL)rnO~Vh{M^|}iS=_ZY!(AhEb{|h4uf6L2J^|Xt@ogX;JR_?J4YIK zi9oFqc9DopT-=8HmNL^Rs1k!&6t&uA)WS>`Ue(@B&N2tQI<8;JrspgA{ z_J-x5`^gbYt>{0JbbkctQjcw0dTG9~yd~b4A_l0E#*N{K0J8CH@Y`Yq)2VA;8`kb$ zcI8^(i`&XNxk6UnUsS0U_cqghabD}_q8vR z6X&N-aZz50%%8g!Gn1-6qQYac^j=BB0i;l0;duv~V+G?g=?D&nBw^N883mzaHDh8n zK3C%peVI_LO{BOhDdqeA-7bjF!}RH<`uqOd`GoG-ESNYrbz3<_d|HQ>bSN)e2J%`; z41jRY#FS|!dD}2SjfJt|F%NW7A+ezErU=Y2d##|3h!>JnFA7QKF6TQwT1ko#s`G8o zrjYQ|R@fOsGw7RlhoZ+I46>_kQ91Das7qS)nCCa)YrMK(f2+VWTwib$ijF^RwDT@< zV6a!-iSs(CsRMWIfRQojsrjenr|@frLta~quT!!r2~L*^ zU+AS4HM5D5FNXR5`eM|^kA7@g~S_0SQ5y18Fh~pf}tPnb@ zRn>?bm4(ka>Rrm02;6+OzMVlz|#{5YD6WR!z3ZvT6%OF_SZ`*tl6Y!-Pmz(pr~_zWlQI z6M;rt76I9Z>F|Uq>}Oim;(+ML8=f()eaHkjMEq9&itZn2!WUT@IklCafXV#~O!Doe8a`bqSmTuiuIl5rD1 z)q{Nm>Q_1I2Y5Xw9Hky@Y)M4}U?(a7JH3_xt^QKJ%E?4^?{A;L@kT=Z9z}zY26v^D#Ix(CDT%K3m4gt};}bq7 z-lj{+ltgFy%t1(Si*aQFi-1a>R7vxLOCrQYQeGV%5!|JT6r~g}yC)qzZ{MhvL)BP-UX2SId>D3Jt|7 zHe4=zhNFxHe8JnG>63yF{+=rgBfwR+sFhJKmd#+OL^kk0ph*`6_|;P}<>JiyIt6-~ ziiUwJ))HOjk;Q@=c0MqH)KabV0w81}03ine2mgs)^ zmdrv`UNcaC_!OF$;hrN(ZPe2&Avl$eqA>8D^N&@43iH3pG@au)W(B{wz=Ty;6e z(1$#aoTv05MKQq*(XW$MsfRu|e+JJJh+Y1qOXWSBG#g0SrtGtD`SluB)Lk0hNpxK7 zA#Wp4L_Dbg+=Cy6?pW`Kp`_#_*0pb{3c*16=|qQBE|&rb(`$e*eFO;80YI3<0K!BI z5T=g+VVaqV5Q%Z0jy&qCV5bS%i?m;^=4oQs=vuD)CVS%e)blxHER0iZw# zOi^ekohHtM70$x*xyoo*SLCrf%|U8Czw`E9b(HythFWXwyx;|s(|)Tp~h9K4R1i~Gqf2k(hmHpe($ zrb?!@tbU2WB6k+m#IrAD{>s?MfZ(}?NY5jJ@`)&NT0~S7HK*ZpEJ#a5 z4W7)b!8R`yEM4~J~Tg0f`VHD26Up?MzwQhS;pa2$$Uoe;j= z9HU#t9F8*t6i;XQ2~{dQgFjXA3PjQ#gdk>ls)xZX244DMo)#*7nP(Vd`dVPttfn## zZOfdDowDzP5O5MOSY0|VIhw3oOBN?2uz-6hAt@Kr~|Y70~2uH zy|(+&r?xn;Bm@j^f>N~ed;nox5#+mfn+wbF*_!AYV;J8|?a@b9%9BE< zWgPEh8~UUGTh_Gxt^1Ut&yIqfwjdS&33>V{=6^#6Ntn8pcVVYaJWIg zwTI_HEA}r44xq}iF|l<9gkpbc&R>Vdf6^Qf8_g8uDBFg(_)^nX zj*^^gu@mhP&$EyB2ufnOy$vVkraxXn*U)HA?kv3%n_PuVZ7SLcjh}5-bnKUMovmQb ztGz7lSq)B0ySx7JV*1ftLz#Nxv36%|Fv&uSlU%&s-Q~%-@XNaZaLw(;en<6`yw#mL zJ)c{fJep12Aue2#G0#W#UynU=n7*rtDAFDy;vB8t+@`Xo`Ry2JXO2K)ApZn9smGQn4i@~RS*@b!1 zEpM~>3nNC}SKRQ4t@Pl@5#(qh~!49m!EsFpug#A5UOG?$B1>)YC1V}b6S_e(9!DH`N!iT!Qt0O9WB>@# z-7mkpJX-oLFX`J`zx<9x_-5q@HFC%6(ehh_o0tCn3%hLD&DV|S^N%hh5}zUzJ^3g< z8vVGe8+>!ieAC|Ar;)qgB%%-Kgp4KOL1OHPv7e;i6=m5cOk~*+-xL7L{Y<28o!GtP z#y?+2C8Ab-IYJHY_E3s)alc{>Yf><`YD(=!a$ha3JR+pYJy0TTS)s0M>YsV_`Mq35 z9B{+8R|O9hD1|Bo4|>5q0ezSg#`lbkIv|0DK$P>>%QEaCmeJ7G@SNt+n*rg*-N+w} zV!md=!ujS2YFak`a@CJ|y7^2QmKk>M?nD*Yc zchEV|6|*8zqq9E}KV87-?r#9TprWnWl085oPZSD0KZKRpVqjK4gc7v z38;Sw&)YGK{MsM~*goL1ySh31Jh_mQJxooE8TNkr@}hD>f}9@fi7gTo7`%QmGkkyk zO7gq;`JzYauUS@op)12t3@w~pPNOu4rRz@74EK9&uImIIEo4jxz6|VQme?5fpI8%{ zmLZbTKClo*g<74wt2%7MkY+La9`ZP7fPuCMj$n-`H9w_(q%Q}y1k!Y?hKNr0Ystvoe z=|8_TVs3VWAbkr>B?1q)e86R$6z<@5U#n@+=4G-Lt#*BBg|5fZ+QdJjx8sGqo?&%` z{bl{qc;T2&d%=#nTk(CZk&$2=S;62|mk9_pX|b&AOR{HwI zE1j1xj9Dilxk5rMd(gKes(Bhy@A`Y<9qtq!hcMKE>WxW zv?#(I)&mKd9jj6m;d3-Z)mAf#t365l2e`OenZ@T#8Wz)}JM3!_1>%$VJ5oh0X!s&A z91{pAI!4wCkw4bi=O=ErBT-ol&gu#%UB210@J)w-(^yT#OJ#QCywZf}bVx$h8AslJ zje9MufYNMnb!B>s^JH@*wuE=9;EiLHNnKzPe5jm?R3621d2ZycMjtk)YDs1nf$XJH zX*%iNLxbQ_!EB%Cd_iFpH!ap8^t*ORqXAv^-4N1JfhAZOMaM|wa}T~qJ`NsB6=a0~ zEDAsD8NMCA<9LfMY$%vczssTlyJJ>H3_?&vGa-l}K zEBP2)Ogjq<5_N_&;O)9d0B0JbF5pnpGT+O?PC`m%Qg-cN*W7+)Me_b`EaNHmZ1U5m zd;w3JJ+u_F=9x3%dc9to|Q)U9Hw4?KLB1k4l@ffo2_@)aMg%cn>SlDy0y zlM3KB*Ut}cqY^0smB=82p%1UsF(=w;A!s$mBU!tATE*1F)Iu<1iQ~+1`9x5uTIf~= zsn3RKP95zpPGKB4K(jA0#cxW^1&$57G)=K)rAAPkQ=kdP^m?OT4dz$F?tpUs%;sLJ z2}YTJmE!~3@z3K9b13De_LFK+It*3rA%?A(Cd#dZCOUl6D@}zL=#qRuMx4V0N`RXa zX9tuiKKwobQP8WPX*Lx7HNLexvnh~2VGwjb@GBikz(Ad8LS|$h=>!{u=m*LRM#P}R z8qu1O5>d6$J+Zq%r%(u8R7fcKQ19%FJbsX&qD{YA@j^SBJ@b9HG?@G7O4?}whI-vj z+5%0P@IHgXPcf-@wCQLCGn;pCjyJ7{qm)Kh-6E2#KE)+|v>(@9$HFwy116hy?O^-E zT6J5dG#GrFFxn6CO&V>&y%1y^$UpOh2;G#&u5Bm#xOH)5mq%#}9Ow=)N)7a%2r4-( zNWd;FZ`ow8ah;X;VYR#&|0d@cHU9Avl>#&2vmCJ(ke8;E#@ZaBE@5$tW74(eAv3tB zit`y1IjZEHMU&xqdn1Hgo>eM^dn4UEc1YcPO&;dBvQd*~v|d#XunV{8Hjl>I;bAYUpqJr>T zqJn_+W7P=uxMzD-34QUbDu1*;lEgfg8S%2W3X&tCz5XFT6%xfIKo>?gM{3jgFs2Qg z=QE+1y=jX*G)J|Z`lC%NzH<&h8Jh!VTQH(#(sPwD$l2g9iea27#sm=ip!6D}LK-6@ z$%K$ggZA96@YtASMIgV2PvACQO!sLOr>^`8Y}3)Crbh%?>46sM!U|L6P5ZpC>IhydG4t4^e`f9Aegvlh#N-b~(v*b4q|4n|a5Y4#fD!@$_s)D^?rZEJ9 zzHl6#J`U|5lkUF^iMO)^EV!KF<#}ADg=+iyi5{`nyj5!^yGfHDDaJTD7HwV(u(^jR zcp&YgYX!CQ2PPR9R-pih>*1stWP6Gn3f-^!h1~Kfe0gH{t$4*36+%1$+3k>T5@B(M z_I9C$8;BV@YX)MkqP0aSVyUiDFxB^gpmt$5>H_=klW7(Qv|>{@K~ z3lBBSsKkCUPtXNr`IMGV2IQZjfbuEGFe6#fCCG4=JQrW z_js`$Q@vK*xotVHO2u8ZH<~o_D9UP}A7uB5lZ@q_uh@h6AaAlCBAmksj!DbmEQRwe z)jHmj{N6DZcOzyc^nDEH$>AL1V;9oS!czRhzUB4D4pK8dH&z3ZdX49+vlP=P76Gg- z1L95DX2BILd=d9@r{Ikl=UBFqN8NN9W3`*>7sywx-D~r?*C)G4;RmqqEFNPj+fazq zFpH}A^_J7-w*CltcNzb`OF1s{M zxbN4E>7HAK*5}1=glyLwbnLEN_pN`9H&lWTNt@I_Rh9yFY(p-@Vjc;U$v!<20#x-MGMpTf^#Ht?)D0cQlEHRdj)Jk~tc?`M8CG z6sFa5qSa@C2}-q?d=!a>*||Xj-b~`2ge#Q!m}ArdxTw9@nF0|oA)gt|zK+?4K3z48 z&0RHZN9%ejPi5^9s2T$~j57|crB=Q{>cuv*O{d7QOQ$de9)txz?F5uwY&UWCE(Ur3 zflq|1`RI<(^lBbjHO3XZGVE1ei7k6SaAyxfm=J+Kl*Q}AI*v2;>{rWQc+S2WcXE=n zd{*Hq`>lkN=yf}PNRmF(7_9O!K|7QsVh*khn|}%h%7W)4ER04;r~wo|O8X*-Z7w1_ z07FmNU|+0IrdyD_zv}puhdG;=N5l6jufao2G3^JAV$To3cDAvh*My$GokM|BL_pEc z>7#qvEE^=^j2)iMi9mT}#suY))|@!RYAz&&4H)DGv%Q}>*=g>UEjz7U1X4X2T{(mTxU zDo5N?+WKMEM$`=)tw1}>)q5apDtFn`bQXrrdC$vZ)m}bA51ac2DrL3hkB`!$v8{w7 z#jdU24DPhCJ&NhHscG9+`zCh)4e>p@yD$oyJG?}`%fnCAEkUhg#O;)xVsc7vSXdP* z(RaF^`1~O`-U^1Bb3ZgbzTRj0T4&+Pfnw<8oGqCoD@Q7l(dqnJYtSC5dNC)N+vdVE z$d=RusuH@#PJ;Irqn?u&r2Mn2@7CXN=s&LwM+Gw*y-@9&X3Ll2{9>+zs>*ECBW=gB zh;Ul8#W~3Lp&o79q(N+golBuQ{1~<Ri)UbVm=$ILn}x`il5B|j)JwLHDROw>9^Rj}9-r6kp% zq|LM2ma!n!VNW_I+gFQII2Yn_TV;8qGupMX!EaX4e==5JHmp{^U`@F6GHu;r;#>4c z3+IUYZ4qT4(+HGlNOvwc;}AI7`J2daEC`i0WCodgbBV6(9vAQzbnZuzP*FAeYK#!$ zS?msUgeHh7GUy7HdZs)ZPpus))YZkD*a2Q{NUP@Jq>7fKjF&Lx1S(;+xX+NEcJ&1% zvg$svOjR3aqmkp>2{dm4COjP|BNs8bIGp1c5$NEeD+@7>FK@e(b8%d>z|HYs*Zh0$Az;va0FoxgW+s0_CAt4Q!aMGVB4j{c{Gori0HNDML;rOL zvH!7y{yV}l?w{6Kpfi5oLF_;W{r$fB4cPvD{{S%X_lDYk2Lr*pyr4gc%jRsUYcYMM z)cc*F+}!QBFks7!OVeVQ-l5wAagW45;~ptBjbD0Zy?3QCYCf9P*eq+5oLoiOKB=q4 zh&mhUYEQG{Iv2P0|A`QmRHYbX*L@5?3$N#rn`>TVqI zB8xpL&=7UJo->h9kOXFjYRF!vf(^XtZbIDl^V@a;Nq4_4-=qe0)xiZ~S&w_Yj^5`E zR`^PaG_Y&B{!(BqmQ6NqPS=s?Z5iRAt-ZWG2v;O3P(3I*VCV@oxu zd5EHObsbdQXDk0+f;vsKM8SB8ly|Skv7V&0di8|B?XyVQJJtakiN<&PZ8lz$UM_X_ zuH5ILbB1&H=c!hGvA(X!WQxm}4rM>WLO&)OxCr97Pdk*Yi?8B})z_c|e%p~?ygBX~9Yxy-@2IDTMRf+K8eDHD~Xt72g+q146RY5ehKU~q!yO+h*pU$-3 z)xY$2FMW?bWjj+kAKj;HYe5k0Nc?zkQQp~}v_<~=+4sh%rSJPQoW7myr&gCPHa8n9 zn=m&zQ=EGp4YW&s=z=x)^0plv`?`8*-PK-tnYu*9f>ACVtIKy>xL3EvGNmNSkK!}- zWlg?qOK1sb+`qH49~x-U<7HZt{CZYy9mATW*TS!OO!A}79cW-~IG_pl7;gsHyI*I$iavbN+{mXrTabVtUoL0Q0u8huzm~ zAran^7lm1sC#t(!$nt<0?(mReQdJ421$Em)S$aJvk2-l+j!4t1RWKW3>6=PFMDpBr zUX#vOQ&HYD)Sw>n{Lt*Q3L;v_lg#sX{X8@78XJXfqRlNVgAY3mS!PSh?F_4P!$f+k<%Bqes*>FQx&G^bP9)Wums$VpQwO_jxm( zS?|Uq@n=TQL>3mc+4h3-F;}OD#s?dhC^_A4sj2$-l+O2%66&C;8zZ<96dIUUt6#~~ zw+zJ_y>k>Lcpyc+t(0BzPG5or%E|cEKa}Qi@rwjaGnTLHtdokPA^h~?5BiUC92t~f z&wW>44eqawy56Q^Sw*2a#m4Qm=X=;W*~9?#k&5P=i|}RRKK?{Udmj}b3-NFYogg3> zv`C~gM`^CUIK#jJQ|T}I|RP5j+9`hEYF$dK@mraE&@mH z<-mGOD%^$0n}umrAlvNvW5%>?wlMF`)2d}Cx=CGPS84iYyVkxVs}8z}5p^ou2Kk}A z>u@66rayiJyMl?Ga{5`yBIS#!ac*i$cP(i%9P63;TZ7So?y9EK9l# zil1xLV!i?d`L;W{2^i*6=cAs}@EcT~xc<;Ko!n8Pg?$VBqLonaieO@5X1IN$T28F3 z5U~u$iDnHL}S5G+6}qs=Cx*((PAG@`=N`Jp3(DiPuHHJ1xfLkcH@&-dsZm$5}&Japm zy8I{o28fAA2md7)FHi{NJqTe$*vMxPS7_x4zk>KYWXZ7br9PLVe{htXi#2YODX7;l zJNjL#^{E;O-hG2{)|T4|0pCf?6U>N4@XG5lsIVA&`9f`gfFIn!P`z+zO$|tEsJVNU zZFu^V)FI0d_8-WYM4ZCNM3N0ZirGn?yMy!O#@&neKJxbtq|n}BI%aVWV#-&rM3FgcK=_a}7QfdkX-x)8cgr^qr8s_){;sR+2ykLwm9=89 z_FX}d)Ek4B+0GZda!t5{ z+M&kBJG6|oAG7b>CC^9<8{m=~dywir!y+e$IY5zt0F-t@i%u`#GT#NZ4H=Ot=Muo? zSb*^v)e&`|HIP|`=zQtM;4ziV_bbO|G&ctktVc9A2CragVTZg*2&HBlc#A)oX){Ni zM_qkD$2-xyU+lJuRg|9RXPX2Zg*7S-KN@LvvjaJ8D{JCU(^_qOsA#2*kj!+LTb|U- z7dUK2QolDCy?AAyn+R&?q!wAW8ue7a|EqN$IAY+>q!>Igc$nd1nSyY_ld52#J)12@$l+_9)0mTLdE{K!;}u=l>zke%q$wXdx@a-+bgs!?9q+GZEO7PmoT7(c5J0uzMOiIK?*@KeQxb;shF0{Y2fj8ykW zT6vqx7^z;U0s@0T^W6Zvdj*)(W$`=P`b5~sTlp;v-+eD(j(rYfa(H)FMH4;lms3}x zqn%^HYak>3ReJM^ci2tR%_`f*HO{S>cLy#Uoy8 zx>_@KAn{{*5+&?W03Zt9#R1bLA`NiS3#ZDDRhrPbix$?Ud-hCjRQA&?^}Q!0v;l)% z;THOzw6kWL`S*@au>?TL8{v3#%?0xm-fw|qj|}vjclX&tkS5y`>C1_R`>o%D5h1Ji zT7+mCAW_9z68|g1M1UTn=?MueCda~%1vrn#zhBEj{*H3U7R}M`|*7u$TyAY{D@C>u{uQQ zE$y2Tx6&Cm*6MDY^U9czr0e-g$OaOaNv=N4z0nWx)+RoXIhjATG?~Y7Xyd(&*2ng7aVJC!32RG`rV5O|SafbkocioYe}5C-zKr z1~6z6CE(W=pVP9efRgL`OzyNZQ1w(^t(#$Lw=l`6)qMe>h)7y9Cl>geWs|dMZqbd3 zkniiU3|*FWFAatB(DP4qFy%Fp&X(@%&%ZbaCUe`3N@fPC(8L zIGWHyB={L+lXKF;W-eHy!1*npAchsUKE}wUJFxsQRiQCz8=L*YLcw}LU<1^Z^+0%Dd>@e@1RzIf44Wj>GL;T9Vqf|rsMX&TDVhkW zwnL!wyX`hK*u36D1SKx(EbzO|j;6>7!ulZ2CRiP+hkXmw%i_J6s|&c43*7iga3Q<1 zfaquflxSpystwe88>WY)-Y{uFF=_3Y3I| z5|wku8G^Y3l3-MA+`YH+0EpZ#@Hbpcs-pw${Vv@hVCh%hhg4>n){R%}D}5I8!6l7p zBIJRbI^ICoZp#)QWkUMzYYsy!7B|Vvm2>Rb#*RH&MxQZ!Z6tz94m`lw>N%?uaEw2W zXBbdl-t#`&H;4Knj_P~7eHV8=tMo_+ZhJ#hMVHB59~-u2bL{mtyTm^g+TVNqRA{O9 z^)YnrFt2Z=HlBDs_QM!YU-l{25t#8uyyda2;AfVs=iof=@j1^KLh9>LO~q$R9umDl zpLOFyGM{qrPQUBfx^JBqalOm6G&Gl&oN+HBA$X0~J>G0Z|T3(QSK)oIlZhfJ?%MR8{?RFZl{yoRlQOT!!59sGrn4U%*7Wa16 z@6fh%vGa40YK$~(N+w^B@y|3d!A{5M#BKm@P^UU=c0a;%Hcg1p=UnFRpUZ0=76V+8 zZKml!dbBC_`fO8Cjb$Dyx@l+)x{Hdth?ijMWkg)K9qVfA3Y~uooy;4~KGhkX{;U8r zW2$?`E|6iz0GTdlz@S@v>F#|?Z6m^lNR$Tnk45ZLD$Q2BP7GMQfL!I{QNG7L2k%U< z!JYE@?0aH&gfj2MmkOyr?ye^a-_U*y7q}aUydZ%H-s8EG5%Ozl14hg3N#+Dop~CiG z!oN5m*fta3U%GMAscn*gg>KN!V$dUeFoeX)Fw>WDm~s&!$bAD9#txK|e=CftA2)qm zQof8Zx+`Ox2MuB970XY6n?oTaj-JeG9C0PO; z+`j3!sr~xvcEp{fd8rlwG}@m&+?RRyrD1xPO#;VqI+KY$l4_!7Cm`{Ns%#Cr{4>;mx^b)92U`fb6dtRsTl-+5fKNFZ|zeyb=Nw zvHk|7fB?RqUUEVr{~AhNdZht6W^N9yfO6QM9I!-%|LA}9pF4vI{RCx~OiC1xE&Ela zOHTGLkQCGt?g}XP1NCx-KKW~%{t8k56L&cw@NZYWKUPZUU$Uuxtka*h)r9{$E_^~j z=7md+2~_ECw@&y{$Nyhkr+>J0f2tA?$oWT}_-}EUu#o7VaG8N4-Om)1A_LdU^k$Xb z-Z2$*Po1LvN~nk=z5e*^>JMzO)^CQMEOg4w3knHPIv+!V?i%l2gwb9J5R92f(%2~4 zRXmZLne=#fDa2&+!pG{3IPFEvE4A#>kj~y29Gy<|RB!R~rqd|^mVKb_L`=Ee0btq5 za}w_|e)`fm%4L6(=f@XAl4mD-GgY7KdIx^gv~IF?{7yjW>d~friaRziP^sL^`=EN< zx;%P2z0GN-a>|5e(^Shq;#zro@9K5mQEP+r)wl_r0e!0WwC3Fw#8heUin$wZf2dQo0Imq0p(dmpgwiMmj`TZjPPn+L5 zpYb#ly-yt7l=`qzUnDA3WGms@6cUZY-V3EXn(6xH(699xs@E#g@5fL<5@*DXy;CPaQC`XWy==pK3NvCNb*j?#n(?`?6!_?*5et^ z>bU%=2`9aEw^V9{b~T2Hb)$)NWE)3Ki@=~;GHeosDq}AncuA-Sxi*d|9L~?fV{{h} z@vP3(Ij$W<`0}MVJ~5PSJ>c`wu735tQ95_nwi{opm}d2co0P+}U&!G!QHoKKL2_D4 zkHs`wz9?kpLC0ygW)%OM`puPKJkq6)c~P3YP509>Hyd3-@{0aJw(VdS(_K~aDjL6n zrCuPF?U;?o!Ra!=08tQCl5k;FP@$(Y=JoumSffr*W1NNiw9N;D@=_)1rNYy0W`#hm zO3(VC4pWsR%D!y1cTq`Br>_9vw$*K%g9(VLf5A0!?W0g4qnhR~U#Gvs#JZq9f#s$N z->o0nEX+TAFZrlJ?opNU`$y;Pt=DYdd~%g&rit}vV==R+5#h!)^7Pt7XPNKLpVRW; z_q`Un{YHOHgIO7)VAgci{0ipv;aNGJ7o$8hS`4P6H{~(0yc%uT%x~RS^O#2|ql>n4 zPp+1F+1q`L$qn38h>32eEgA?H1#+{w%-5(cuNyH-+<8oRlUh=?Q{p2M9R7YXe2ii9 z;!4=p)UV!koKvMM_jgxw>EHFWG{1SrEy?5RC3>(Bz25XBJl#>JThYa2zi2SFW(8uQ z3TTDjZU=?pprjQA@iSuK&B5Wngq$s@+gQ-IQ3x#cZV(v_J&v$gHz@N>?fxrSOw&k3 zS!iEm@USi>eq*IRHA?m_C?(|L4w_pnnO+NM83Ys+2LXoj)YT>&C~1fQ zzInPLN?H?m{jC;lN!^SxQtJj4#_;vOx{m-dI?`=wLIhz0MxF(6;-|SuFzcw0=n205 z5`{r+gPju*bW+Xdu~nPTJueG2)Y4=IbW{6;@9RD2{nBME7V)hdtN1lHW-2gC;p-N_ zu-C(5IP*B zltzP_-H1i*34{*I)fwyF@i+%Uhmk<&Fyxj{LPTp>EYwt|7%0A7;Dx^B6$5u`)DJ?Q_$RKs{x~N`vXB);MS$U5V;og zR>tL!a^S|Xm*9O}GE2w}OV~OJVHd>ZtHdd+mcyc2e9ZA}t*T3ep{QOwZdXU^smC0* zWBg%N&uL|k_)atp=N5s)4kF%z>5Dwqmgc6F)@<&JWZ)hDU6ZFC?-zmnuopC3TdrS| zIk#N92J-4jt~7=8)Zwlc?p|m=eQvzuvrcWCxx4xB3}1WJ_Un(koLlroBnZy?oEq{F z%e)(_kP-1-v?j($B0V{rYNVmFKav8bhL+d zWGcg1v&}LpJn5r4alB|=aRP-t7GxzS6!^#@L_#u*wh|mm>!$ctbd5UVDWKc3*CXk* z+~o464_&9AD>4rJ_i*V)^^l*PV7SvobL)&EuckQ0vVZ153x5k&6b>*`*$%hx|NI2+ zZ96U!XP!?z35SpG%{!|50VE(yU2cCEhO*uuaNl4uw?SyyfErszD~Fk-5{x9~vPY{f z7K|ff&Hj!>K)%Q^T-=o+sSc0^`Xv)m=|hL}6J2cq6(=MdLjyuG9R>FvfdIMZk)|FH zAe018!hQ21gVMB%n;>dw?krqf%au1Pw1Zp6)u4IN^W$Xsw&3pt~H67a3 zmejtItXRzyS%dy@3w#KktVD_z=$GP2%EogC3@8U7x6N{4h}S^&yYt*Pc#kt?0dYll zf%9D9Ov+{|u0edp8xvLzGG{FEuILCuc9)AKNIe{13Wr}9fCXDy<6!*!R=9&RX zv9rfC98EwzS(9bm=_&u^L`kpBCbQ1FfGwg0_DDU>h6>dyMzr5a`kCw=pNt%UyKFV5 z7%fg~^ES*R={@t`H)&0|Rr(xv@{AmaFu;A>D}BN|Cv3dD=VE5#@;2m}H%8nul5}$3 zcREQHPc~kg*0%?8rfLHlU*k$2oTKN3@3E^jqNj8OR<`OUeYJ+pD{C5?1lYC54@Mg_ z)6=wzKO4cT8-{;qmJjh>OjZ<0(s>3^%rPp_MTg(AqcEwuC1v^YQPEblW8PkQ-sV8! zb3*#ZFKB0WvqSQBIPxD--RBIEhb)%dSfwRbKc3a?k!}zUPExfX#t+Ia4ebVz^S|j} z;zW;!M}mZ)S{y(^NqcH%YyV1xce&$9G%6E-q?mJ+wlcaoodU^Aa6Sleha*vMXMQ~o zxCHc)B6}=};}G2DVsR>ZIz2?c-pXsj%0jy#K;hj?oPv6QJ=Dr70LMby72hJ(sR7eb z^g43Fg<@8#Cs@Jr(btC)L;TT#MjYQR&7mh-vh#@y_!xXEzZ=_#r#Cw<;mW%tEdCbI z4fv&{!ppIuF@!eqY+!#d z<*H+S9qTo?TQ;yuqvzU>=T=|~Yo(Squy6mi0Ex4b+-9}ewXLuPALB`}^v;pMx&>YU z=^dgaS$nHB?j84j%wc~Xx(fVpCcqu}of59twF-Q+{%N+$|G{jB2?B{AsCDQ1N6Lsc zo|&aj?|16LY>@$Uz|>@dQvX z5a=zPxxAxP1_+080|`+R5ElF)<$9NT4}W{+a^I<4);*d##YaMGe?4>AOJ3IbinK*& zEsxzUR!0m>_!z|>f9W%TUK9#EuM}uHTS(~f?q05mKW6;`<=T_mT+vz%docyP1B^5x zB)8h?a-W84@6t%`T^i{=z(@!5)MG0*Xf1!{+$+{ZJddPU)Pd3;NG}WPBc2Z)E;{D) zd0{Hu9T$}+iJ21%y| z1-*hHZx4LP`xFfK7sKssje01kGMy5nrQQxwe-ortijT&~OJYk6gl9u7cnw z93?@O@n7Xi|0?&I8#%doYY|X~5gHEk2l(TJRs`JpB1-sYS*>R!NotWme4X?{ii_buU<$0H-OU5+5I0pu7m_HeVQI$&f|gj!plHYQQ^Oy`+o#V z_<&HppHSlOQI0}@O#Z*}Cjv4Yx;n$HF44_DxD<)}5l8&zCpo_mPSFC+(?B{hhKbFiBDp1B^T z0ZAX{w?79NzUiQ+cl2PNrnA5Uf-avNR!JFNMBa-MtU7&ka01`|!4`;qbL@oG$wzT^ z)JvG?zSBG4@%dtoSL(+hL0ux{-N92klBjL;4DsC!lFhWS-{|P8y~KP*bAk89!C2IT zh4&)2#U(`Isyrc&FZ9N4y4XHJ+PJw~zOBrkUny&6GfNRuJf=h3q=1R4dQt zAD(aHm`Jvcd2Cqi-ShU?K2Dvscsn!J`|NH*@lWv6>}GtJ!Z3P|zG=1v>R;RifS-x3 zQ=cZ`{{cU5{s4aF|2OdS`JaFvDI>{?Z=2_xwox(4lCgWdE=!t&_aHm8Ipql59a|8(wbAk*(D| z^OyZH7!m&1V%c{{M8;0c+XQ@8Uc-I(z)5IfZ?`4ASZ&mJb-1kIIdF zwi}<_OO5sG9P&O%H3~KmkCgVacuAh=)-5#IdabF?4#FOO3g>(jA^xo=qRzXvd@1L& zYdRg18Jo|f;4WtVqXUj0zPFZlrOa0rnO};1irxO`iCnC^|NK7QRe<{xQ&CFr*gD!; zKpfth$~NEMDe4n9qs1lE9iIfik6nqd#QdD-(wFy(i)mV5v<=@qd$ka? z5+pHXWqKbv+i!8rkjwoMqtFy!%F}X&f|1A); zaOLBxdgkB5rmr8S?9+J3Fh%{+Fj0OjZEG)FZC;rTi?7~-Bq~zaKDtsVtOX1&HdIEi zSzuWi{bq)OB;YVnRS#m6Ai8LVB4;L_S#zaJQ^q5+tMd!N7_6PHyg#*WTbJGA07Xns zs^TKy%^mgF3oT+hdS?=Nk^`Q3?C&(a^e=S6$i2vG<7vD;V;|IV z1f-OL4VnAz^?5{g_uaEXVi*v&fG{qp3?IG>5>6BkA%Q#wSdB11X5xWY0RLRh8xSb- z0Jwj5EL=g{?HgkVRx@=>a8D8qer_oiwYP002ohp!Ekby%j?zP-NC#DZK@xwsKhEFK z57M+An1cMBB>m4U1Opf^#=`ZP&5(?K0{xd09i5-xXWS8hK7rUlI*Ja?jc~2III!>sXXAp9{!`zK|vH4`7!CFz(}1N6G$*m)y&e1@!H=Um<#td zkE#Pqh9;p!1xCz`Nm&#O>`ibbT&eJE5%87xE<+P_oGa{aQhROrz=fOqwvRUVtCMxT zu70<&xpitY>1lB15p*qySXNMBe4Lvg`JwLUo84Bf zxBRl~SSQEPYJ4Wbo9K2tArsrKbfD`9$7xrbG{ythi!w4NUcVIqOVoA0d;uUx zU0az&qAsZJoy!rEp^|%x!g9aS)xA?u@`zWGT;xhV2i(icVtTIbktKJcb0rMez=n}!K%>DtI;U|(2l)C@s7QmLLPV9 zIeb?)`m*Y1m(N_}$l3Pfg>n8D>e-X4_Zxb$QS=McSSNHtt3rV6j1XSrPw2UP8Vhx% za_^Tf{p0kxSNPI)WUd3oN1Tyx}zo!EC3 zV6zx^x$9Vow0}Y}hG$vumJh6_RP z#tVb)uX&lxRXRoRkVc;}In|~ygU9&?1I2J`Mcv0wHC4ounDSL`bWfLcPLV zq{V*CawONBlfNKG5s!=QR%>`}TS*2Jzn!ico_Y)uf64|6F2Y%{aR?S8Z>~G2&5fk` zWQf@v-({nu4F-fai%}A>WI}YklW4wQwq>_~=(d(uUQ*XhE>xM!eXWgLb0)5Wq@J5x zoMj)v!wO2wIk^gQx^5DGQ)uT(B|GSdCsV~?;bO6P;;2!XEedcrb*mr^fWv8S~6{ht*Gf&FTrTc_LCftIEgf`&SGUb$A1&Hv)7s@tJ=WR|v zE3%t^)FE7rj4a;%Wr{SPwsxvM^ZqiU-^n?3ghE#mS>!u@FKQRtHz2VP1#8kNEN=JQ zNv-vvej=gK@K&V1QGpgXJ6y?K8d4qs&Rf>x@8%7KyGv`9;hM)95uw-pb1W%rdrER* zz}d5k<50!7>t!A0zA(*x_{Y?zMH9m*Cx6 zeZamkKW<}keBae1%Y=iWM*)Q@L%Rypw%Kpa0}Y-%#JL6NuHTM*}6BCmg8i3q({Q z^)NL0zHCJ4VQBSzDTI+X3-tkgmE18~zR)~jQW24*Y}zN#`NbCoF8@B^GEgZFTLmnQ zDY$&j5fk{KpATjQh8FINlTwVkTK#Om6dNo)9^05_>_sT|A9!}hT#1?>&Ye~c(gU9sl z!muji%UBAA;OdjPdjAqxi( zCbjL`njw9j{=8sg>jUuj2PCaoaO9v{TwvtVmy!ZSynwr${Bn@9L5KEXhK;L8E%VSM z2p%yyj4?w1IL;Ovy4pshj-bT)UL;W@XFg7?WG=$;sm&?!FUwlL5F3Q9T;$uYu?>SN zo~)Be&f5ls$JgzP;NjJ>Vgst0Vt8;?%T}Yln6L_Nr~(U z#I6ooqm&c`RVHa&0i}145}m6iK%ZFLJ`tM(h~;hOtRezPkQnt7u}D9-L@dJCbSeO1 z;X}evQBPBV&wer@fA})NsWNHRnDtorRC)gIbVM$ONtPwVW|-jd~cOOms0PBODqowwPm1lfbd|in$GCw8Z$J zA?D||V@j)Ab7iBJ0Y>XcAc~}(m!1drLg@BHG(u?ce;Mf4Aq1k&{A3QP7r{4Y1`~_( zKhgD0F-|!KZGH>dTw>t*c!9_81Jm%+mfb(&MS_0~eEL7ai!NvM|DG3#{BhF%pEC$B zp!f8f(EL4zBKT*z!hej4gF8CIU7wm*LM6Kk4{rX4m}h^~El$tuN8{3|w(^k;0Ixl3-)J(n$R8O!J;zb#sKif;Xn8)7^z z4$Mt|%U9SqeZKPXGGF0}jO0d#1N~hOal@a;=*Mqlx7?a)p2U0l zAo5t{!~wt+s(MRkz3%z=;j20Ji`Cs@6AuQdG`%~?Rc!2LAF`g&aEph0F?DV7zBs*( zb#>CsR7%Q0cq@74O^mWjb;ZkGn;$CC$^1gNm{<Q$xZ(@Q3vgNTrMS(0$BH z<2j>*joVg{qy-HX(3Du4!k4j+ooKttaYTumf%B}E2UKv{?TDgBwAIpATVBMe ze8Sw62lf&avL+r?3wpwpp3q%A@7i3b{(e`UV4|>Uv%5WY zzz0aPtM2W^_|eZ*XnWr7KD1$JV$N^OYh>w__?x3lYa9B>1oYjWeo^h>!$^|t@;8SI z_l}+pD_HNBR-GCpCqFW(dOmDEQ-tr1DRV~4U26hTbI9XYTld^(*QXc~LwaJ$>1zTA5nU{ZjC8L(dwG`!EY_~JD_om#Tmc4YrL zi)Xc8B$*_$rZR7dXzlyzti==#S3=?@OAUALswXb21`IhSOx07Y201^z!2By!J;fYe z;dhJQiY*B>T#pGdII6bq&4SJO^+n@obefvE$<%^8>+^Mnc#>c-4x?`|*Jg%!VEOgE z)7XJ#S(*K?X<|0&Tjd*@Ofpsqh6cQ!s>kGVx?^&K5)@(v+DSHb$<+ER_9cQ&C7+ft z(9g?1@r+80Zr59zsrVRWO-fg(S1dJiPC^eKOIe=MDt#Wq-10i$c8eq5tkO1T*t+_ft>kr4c`BhBrshKsI zA~%VRNsamOPjm%Uq7??!llMdZKJd)3jgU&Pt|BII~dDX0x|1 zNSUP9osXO;yJZg~pqV}cmU=yrgRR8B?rJ>uLKzH5w%&{3u8CoyZ==j?fKh;=o+-!& zap`qvWh`xC;*Isv;{W=s1qH+TI7@_>q8>`mlv{Aw9A`|s{Z@HlYS#8RyYj&@aAvt= z*Ll+F%@O308JR-g_HQQa9N;A6eu!~A>dZ$#v894g<9$kEHJUwQ=fwS4LD(KeLe1z= zp|-NewQf`NooD0?6U^%KXR>rS$>nAPqB$r^=%*Q(<}64_HS3!hri#`e13vjL1VxU! zHvm1f>0~uK&7H&6&h4!S&iEv|M{aJ092(e-&yi!EY_85UM%LzIr|$N)AD1RiCS?t( zJ|CZF4yvLP48>8`c;#me9ZNb4G0U%pHx#dC~5N^83An5&Op$k#;5< ztBp77lX9gPD&%@ffSP73`E{5ckcP_41C!Pm63-RydISW;ua*HNYSL=NQ2DCn+ z;?x!jj*zr3jwV>9P~*u+Sg_w-vuodhK^rW#t^{Q{k}i8ta|s2+Lv)=Vw(X@8~a+wU@4#%9ASAGG8tkeEg-lK1l^&hFDzbw(ebiCb8=Ew zsq$XQ7n(XKbn@&&Pt9>OfB!ZpGnARdjJRf;8CcO~>j(ZH6$Wny@jqm&HQ5pE65FdNcV!iOyatlTt{;PuuhCdT+CxBTrzQ((L^k(H~D8 zm2Y^+);y>9@HxndCvf1bTK>l2f<3xCXdC{;Ey(Fd*VOy`KqvD#cg7TvW&A)VhV$OQ zZTOrvV+zD4nMf7ook}E$f2I)R6!Cmz2*e0Pg?lre&C8((te%IQP@z<{7DEJ;jvzUz z>_=fJUtYVWp=$#~8w0}*t>zC#HU;JHz0RLidZdy4__TH6e(ZI2Qn#_d&J*qB$ffUU z*l};YRm0Ma)ogbllFyUe#2TN|6L@9n*neJ&qac9alSWrymKw4ahGbm3`$Cf|Jjq&~ zc&PABMj08tJg#vlyaiXC!;_Ki`rWpQim05|qb&~#OMBd$WMxH$~-0TA61&8*0Q}U?AIce3dQL~^8%t|Jx02-Ghq_3KAXhRW<3Tk((|31CtGHkHz?#uxKs^c} ziCX;RPfX4qaS!Ehkuf4eVgC553#E zhhN38a5`OaUt262a*wCcyuzdaWh zHbV2YxPkuM3-o8`Wq&S!Auju~d%HkC(4T?5c?)AJ)$%@KV5p%}@={8wWo~5gyJ)vT z*J|lIM`cyDN5ossCv_>lY}uC`K~;^lUQ;!V%~(g3-93#xn*_6}ceRb*@piUVoH1Lr z8fI0`s^!|$qN~8t-r{%o+~Mu)71Ga3-yKajH!7*8R2W8aP@|x z0y(#~cR5jiE#1_8=|ZU@qw_XgzV7;D_{SRE50zS_ZFc!q91;iJu?#VMyL9@&+O;04>cwB11n9A^nMh2((JC z11Lyj*bg72wCj|^|8Ynxw>7;Bu-ma>v^ML0WS;?xhki#8LVaNYgjDw5Vd`#8SGYU{ zOC)eK4{#8*)Pcmkgi$w>qTjUxW&i#O13s09$<;KOP$esH?!0+~fW?Eq!Ea zct~q9-13ObKmtgIsEf)8NauWSipU@c2A(;W-vW2&J*05sBSpl-E2(44M&2v=z!edY z9&Dn^5iPtE2<`b|nnVA$VU@;ZNgCW59{`>-#vNd_t(3q4d>QaN`a{7oc5Pbpcq3RG zy`-1rMzE)dQQ8!wW^V%}&0h`^%OQHSc;H{x-MB?yDK{Y9SXw_VuHLVLz{l+v^=`i+ z+T+UB&`DiI(L1+T24Tf--A9S3_f;YFc@?S~lFItoSPluJxfaGI`f6;A>(`vk=M>;? zRDI$qRI|MkDpc{j>xNF!<_CUYs4AH&{ZlCQR|@if1WH{}gZ~9e{dXK=z?b6a0MZb= z4Qzggpn)%?(f5`Q9~zXyAPFViFbFE!#f@qjxxK>vh+ z{yW}G;Gc;Af9W;-EdULCnFjD5VbGs1lE6Q$(tpSM40I_Z|I6R&@0SUPApGfICHMz9 zt3TIC@SoP{zZ1>~zRV{1t4{yZn11Gx{P%=Y;IEAdAZLHPb^n%}35y8+DNJu73Q)E3 zPAmRug=s@k%z{ISRS~N_@Sb8DyDI??Q^552#}%tG&&8Hh3lG@a7?{U(H|z)<`oVbh z>&8Ag8v{$tO(sSYW4C51YxR2ph5M}wuNB#9tP>ZrG=i1l7+ykbWBdo-0cWeHhlhZ( zmF&Hu2cpH9rDIhiKk{GS)?C+x6L_RIJwLy2_B~nx+@X9Kc%{y_qH1+s;I`>{qo{oA z>pm=r8+;Kiysks$&6wQBdvP4xQ+P#Zoshvt7vG8ydo0{*2afM%v76*Lw}eF? z%vN1lm#yj)4R+|?j?v3q7Nap-q`Ngu83uk=Y!DDVraNcqPL?|7!s20@V}S3xP~Taz zwuVi*UCP)Xc%#-iYN{xI#R{4HR>_?`OvCF#kCU(=6%whw_eWaTv`zqcw~?8kql!Au6leFf9*^zdh%ed_@KXrW2;%R3mx9-ytyOfW!l+2=7%P%W-sPNLvDF%&gOn7Oq zN~_uWF!wG}Uhx#ZZUnu*-sb!`SsoAn(=);H+tk)%)83&^i}4~UFTz0#{E4@p1x9?Q z$#SMj(Lt$b>Vb)w_atu+;CkdNY&9VCq4Cbm@ufjW}W<8XxC4bR`K?x0n_c4Olt&nuD8@c#ymX|+4K%H6(h{Xi zE@5@ol;pr0;JV6M8Hi{KW z4Vc$!2T{@o!*8G=vPn?ni>kZGpYL_^fY%Y=7>xP@H<~C9!S;wHen*MFf1)c16^RiG zpEP`nKoxQtX_|_)f^5?S#^0DB%|sEBtsMdb^=8P;%J^bJL6xMc6Gk_BGw&e>r;f;n z_Z(k+g+(|-(f120>W#gMOR+CgdBh!nlc&e_0{T<>qQVUEmV<5a;#>1sz<97Z5tuX} zDV?%Sh%_K4o$>=)d!YFpR8@rM=0a#!nqWBXsx3*)@ZoL1oltwxsw$#u;q7sdo!#-0 ztHR_FUa%UtDbVuxI)CfkQ2QfRx!${>RK7S*T-arE<|*3nnr;ITIdb?-fg*3H@tZ0X zKHl}Y)^gW{m&$%{y8Gow?@?s3IKqq=K`^+BJ2^hvjpwNOtuj70dM@!1!yE-ClDe4a zVkT2`>ApDYwvwuVbymzs{}0Xd)twN{JVwv7Al|hq#q^hhK25|CI-#2{Qe6E~idwQW zUt9JV4aE~g6O6f?qLdp)SX*RaaK>Bw9<|;92P~M`4qlwDtEX@aK*qlgMbVr~@#(B~ z)L6%F+86T#+}Y`-vKYkM#ZT+&adI+Vyb)AuJf-Wk_AM%8T?%)rzGKKX`_r*&kyw$!;(}1B%O~SM9ED_M}yB~T9U*2bW!=;B${E_mm+$gw2j_K*UjoN7` zhn9yx(ncCUd+ofnI_~`h1`{s**A!_gw(<$TRmt>_fJ3nQN+7m$d|R8}*x13)?s0 z{av=Xr9#Fok@vRO>^2g{p0x7T&(a($WPL3I6*JZ;4|TZkN#s9Nua6hbx?{%Q^Y}HN zjvL3#9qR$=Me-;~rqAo89P&6Lz-P6jtbGX?foqRRbJjT*;yC386tu&mh&?%Kmt(JZ zBt3R5Fb>`Zz8oTN`8XvZZgoK@>+7~crLn>Bi4(_7{)X6`M%Ylsvuo`j-5EH_&k}(Z zYeua|Qxoy16@-xhClcRhpMN9=#D3_ar0rTkq0}fwI{|#lR#1acpc}&jmgW@ocMnaH z6>}T0W4v9em{jVFsAgZGDtW_rX&<>U0nJxn&8Jz`dU^)uE_8cn%D4Eb*G^!keDcNKQ?5;~Xy| z7tsB z?F&^eL>c#)$ZwO^FTiS$Al(NjkpOG?rh2FsP{dX7%XgPr>%U9B9&Cb3nE;PWfu7v> zsU$MjTm~^|z%v^!g;a$?ZkBNWJO_h>U+2IbApZ0T+(%{i*3h%4O?#zpPbG0Z6GuO1 zxp5U1A9;pX7%%VT4=1%%%n#eyh5yV+-pj0oQRgEye21mh@ERk4LD0mLw;`;K=D4Oe1)*t1p4l&b3xEXpUA($;@N!5zc_a9{F#(=$zrY|M;shy& zxQZu)eJq1~2XveS2?6a#UAAYvmyIcyzSS0x!&yF+@i#-v^2*dkGy4M)Wx(5ty4K4|rMvf!H}_ zh({qNvS4mBwP^2m;%mKqHFC|sXrvh!jW9|aa`-nG$g#**r9jdwIt6BaodUBiR;MR? z^^MBz)gdoY8*hyvua;`h#M#eThXzC95z*|5TkTpuf`-ItzUXCnNN!pwZF#?7SKgZD z8@Ss*vGs*QY0K^f`@=2oHFn^Wo`Kle35+JK)i(_z#@bRL z+I%GItM!W80A+}dqOF3la%ANW(stcX$I7;Hh6-(6ZO{ENfo z5Ae$42o8y5C@Fu#*BE-%YR3UIS9zeh-Z6Vm3N+UYzl28}>{{Wekp-l5%-fG$`&lu0 z5kF0<)8y-nRwe`^|y`bUeiM_q_(C(^Q13tQT=0S$9ZyExp{kHdIO1lQSVjJEG(R$ltv4l^(@y9k8`u#+|Q$@R|C5DVwa*mF=j}< z3Ao%QpvENE`;MSZ)$THd;mpkpU(iIKCIRp%@rn&l@@GkdE->TH%6*FhSnma8lp{&E zJ3YyPoopC~Lwt07clydLHr)|=IiV#M<+50;bVLfagsS`H-kni!ynJ?d0=_9L+mR~S`k$P{zVm?)V!J@S@qOTvcS~E_&_k;DmJ z762&MsSpe*dg=`RJ8WWYZ*6340sNn=>}|o?*w#_c$iPYuZVXZi4SuKih>87oh)+;K zP_Yy2L;zzBexgu=0@w@Vnf`AoW@`c{P!?vEf34bohXe%`!c+}|5eh&6G0rSIGMK2bx|SJp6*gy-Tw>*`!NoM7V+1kv_5oNbT-o=ile&*IB;{0jOj9FEnQ z$wOE0I}G@CwynqXh643GJ$Ck7opyIUiJVh<`N zjt=z;Z@2|8*Uw-Kr-EtY={Yt+ou5_xs8AwW&YHhE`#t)CD)CVZ!*!k~jDM1njiXxb z(plai(4|z0aEpc$nv-laX&K?nC|2|iQAf~S&7$S!f5p9V5Ak^h%W*oHNh8N;7Hexo zoBqj~b4qYsY_)WyL!}p8cUZjAV0+#946Zb87Uo;@^&Xd!xEa~01}JsZ#FcG3$jkSf zedv`P-ICU9Fzh5*mM4QLVnpXSG!~*9?^IA!vbx;;MMt;6qw7q`jr2bY;`U$&9JpoN zn=J0x4?Wy1duJ7HEt2Ow7#fkj^5VKSb}s`k5aPvxYYP(RUwD^VVe`R&cy=wL{0zj2 z!9p@D)kn0-^qx@uF5{Y@wwi;@WT^XQyWOm0OsG?E-pwDeM$Cc^?S`2rk__s@i3z>h z3RjPfL$3bUC}z&Lw6i<7Bth~>m~h%BvKuC691zxF&vCeW07J(x;O(stLE+VyAai@O zYP0orR@3P7;pZ#Pd>p`r)bU+3bChqgb3A)9AI~sWhd6T43t>$48Cr2UVEchnrpEj- z0`}&-U{kshkyy|E0$0H_wY1R$z2MeOR_mpxrXOGNg1={ow?fpK1B}XlIhEMJ&WS|O zdn2YXk_9#+^5)ANVmSH4?0?7?fED&FRa@9?k=CimafGm(C|vFxec{aHsIVk%x;kwm z#5`#j9XyG6FUBak#V=#qe&Q+=_B_srl;3m~@s-AhU*0{9hUiL)1o;FOr6jRLoY{*k z!sv5Jmg_-e2j{xL)UOQc+6#G)vrihXy%2sy+F0Rp={v`{b`u%M3!E!garp6#WFaq7 zvaaGhkb(Fs2ABy7s4q?ZQrgH;a=2Ua#P2Zzql%IL&8XtpEx>&^F%k;e0MZ&2o~eTn z3@d7?60n+tPgqg2sXA4LC!8e(z*(9FMhn0gwbzbn>qZpNAYeG$7@0r%#Ehj<(%VG4 ztWE&Ir{;L;pu$wJ4fpw_E*#00%hC5V)jbh5c_COzm)b4ZtEZT}wf7n_YExphEmUM6w zW1GsZki(#JE}CV9fzxTkNt6A|^Odgz%Vn)hW;MfcR0VC}67~-_*O%b#)!AW7nNs~m zxCU=|d)!0Kt=B3isLPC}Gi7hKNlC{?;(6RdKWz(Z8}#OxeFg-&)y!v|TVvyWF7~^L zvuaY^J%@|O>d?PyRz@T6o#wrC4oggGBSQ9@G|=VJiJa(i7sFKDw4G27aRt0yz8#A0 zXca5tbu`_Lk`!NJciy3%bJRNbm`%c+bvncJ+0&<+?Zq_}nGvvbxhdZl$Zq!9G75Lr zOL<#rfhJ65bwPzN-ZP|93^L`k-(5y-1Uf~LZ&at*TowMIoqZTUM7?lX{Y8<mK!Rpnu~KRt;kt7=$C zULVO^55FKC!?ZqlWPhP9Mz5lEY$e;mtITuMB^ zrKAL0N*=(a)I>N|<=HInfhm3=)Yase(*t2gOXtR%kh?4q9M@6ME;A(XmN{9$AO!k! zNFYs8v`6RMhbS_9gaMZsWDKakU98#Od>LK^uz&&@5@08V(U7>HpeT$>M;#PWqcfP) z?wGQu*AY+A){etBC?RbAD)w>eqk{IuUed-pk1{oIZWMvuLX8Jqu^jY=3mI`75Bm9D zyV}0!slQo#*sGQU*)u@ucL5ljm7E%!bz0*R|HZ<94mm{TFIl`a#*pmjQ!IE{lQm%hKeMu4_4>i30T2_^#i-J!66L*HHNRwHU z@buSVE0kPeZN6|UZ-~U#O53F<_&Z>Pr^2xJLH=hq6y;IzOPRygmGeWH!BF6}EbK~G zPU&78i5p&y!pFFg$a&&OQ1uNg_7kXFr15~eCR7;O%}a!M(G z|4aDom{M+VYM|ptx^&Ou1F|;uwGegyU%$(TR);_I+~tSquBVRFX0s)^xG{^AuI{;}>6$&~!%GF;mo1n8sSTQxG^l0U8v({+nU`w{Jy$AZi4}NN11t`HvCq{jBGc|A;b!b~@ zvSw2x!^w&Qe1S3PX%xu8uP9H}KoTlP0pT`)q!108YLMo|OjADb?Uwi|b02J(etM!L zI{-y6;22jvSJ78or&TD0cFiULU!}xn;{sZ_-!HFTLTE%H_;EfABEw+$t101>razC3m*I z^dML}vaxOPCuIitUhmNrW1S`W2ib3>Gww6x;A=1OYbQ-nczBMBkGIrFU`?zv)L7Q& ziyJA%c)yqYsT47Gv-9#Uo1MiA)sSGsmwb}$NO5VC5Q5`$dOApg5i6IS1u)$UMs(x@ z(>=#V*^mUcFtIJ_RNRp_cT{SGSQSZ|hn@(CZQVq76lul2Bdq!=?f4^fWx`DS|H&N)zA4dwQXSU*J8 z4D+dbpR|LlCQulX_0pL56I95$$Z9hE(RV}q7BUS(2Gu*YotGoTT>CHL1>}fPN&>%T*z62u@~ zr+^Ya@M1baZ3Hn$*S`mp42;b6;MTT=zk?%UVt*yu{U-uHL5$P+DVPK-qJH6A{Qpm2 zlAVbKT+iOb4(ROujKTdC82yjxhDlC50S6)AM4i@6Q25k({NKPyf2q;$?4|#l3nvIY z6=MQ=-ah~?L7`vPT7M640jSd6#pX|PMCk8`;NJmUP>9H%{j0u(&;vQ*SS|wiS8a^4 z>7QS14Nr==_~n9VzW13+#IwgQRo5Oez+Z!-=&Tyj|n08|QSF3A7WG1ETegcUQNibdJ0Q2_sIt&p*w0 zl11Q|N@H(%c^>UerMT~GM*CTNV%S&PFYFZVMU&rlyb^G{J0TanC8aGT)z3+iO20OF zf2z`(2s?^={!@*E_)K17pp;XoL)pdQ9)g$4TL#&^bmYd_6>iUMzNbaCGhC;a!{Q;Q zYOUpZ+u+h9`VOt*QQu-J$5-|;iYyn_l=vR+rys9BHeGxX7G5#RkuL>J1m&pg)|hIm zB>h?H7SFjyjuW-8=q7Disf5)iwrj(Ao$d2q-(%oUnlo?GLM+_`QTV!Gv4GPlZJL7c8biujh4^I$)vL3Z|_z}})z5o)^n znf=*R8B`okWv6thEya+>!ktU}!i=_xTr_;I`v)aHpQ1(IyR-8aPbuwo+(>2w)9z9a z(f5gnJd8#(ytALVE_nF#G0%gVDSf;U82eBDd)ib)rNvx~2+K`zpJqvyJdwcFkNgsx zPxdtIJrWc*vRpnq0dqHpa{xl(4rOAhJ|yN_-DpmF8OFsvr0_$%v8`E&XpCkm0rLJ} zcYSS)NY1ls2+d;PanStz20es>V@IT+CKa-E0ZV1RcSTB=K%eRTWc%f2Evhn(g?7 z7f@s}H2{vj=Ml7;89$5i-_E=0w}?2kb$|NyD#fmZ$q3A8$&#Q>&lh)0(}fdt4QAvv zY7TY-3EsYetjo1%!DwzUpT6Ki*3rEbmy|~WVTxJ#dEf|4MI@RV1BO6;d1Da8l8Z{0 zz&OwX!zc<)#;^r&VOZu%FtQt=#FCI&+zAUQ)+;_|L_LmdE&yE|!%>j-H)FbM8XWLO z0SK@og%#l6q>DPMI@0+$dBxOla0J8O{^h@dc~NPkhWz0d@f`g*@^r4xK?4#R6d zr>+hc>6kKY?2L7OCe zv|XYmEhQHd`6$`HmFJwgBxvF7nzOzXV1Q)3IB3$sSe)j#YfxDIweJfc7cGBS5mt(G z0q9c8@Wmi)fps<3cN9!4ovqkbLUYix_`o^&85H6>BHCK+OrouD(rq7WNMcx4;FZ_p zW1Bj&oo%QGb0~avTZ$Gp-5|?Pis$oqN+G+jdj2b2iO+{N33|V}iPYcbeUrM5P3y!h(sORX_%*=(KSELp((rjQ@~J~-ags!PnJQOzDf7EH`%9}HCSzZ`RtMTO z)(qCaXg1My$ZmQ#8oTJ)UCfNZcB%R~3w%E5&D=S$4!Y+YQO09I-n*(uc@k!c};@pL2O=~>Wca(W0 zU#PAHBd%7HJY{Fj79@^rbdr;&81tW-r0ddf2H)^hlb{<#k_&cn2CibZuZG;`u44A< z^HE^UW(4D!NHDHh=ql2BTt-;&^^(&-DCHRF3!X0j`mH>4^ZTgf=HD_&2hsWcB`a5; z^=D&HK3_FSWTS{aIya-SA4h&og6-?1>)hnoR4q54|MhX=tu`P@Brk6)v1s3bmF$#* z3HedJ>N~Bu_J}-aOM}mw^JwGV87w(L#YdKsK43!LA?}*-$jlwkvuKv=5(5_#Cre3b z3bb+e3>MZ^WJ@_pWIFHsmkQxA4LXJNtZ#r6$)i|kwL!2CLAF!~>p95}JM$5A-otF^ z2jnG{<{PiTR{osGmdK~3&LZ0^h#iui}?Ukb6|Aank_u0z{tU4*-uFJVw|n*vm>;_k!kk*Qh|zvU$GaQ zIMOtVBuzC@lLgtyLlOxk`=&x21SdvAz0*F%3?vEvz*`H4H;D$%G5g6Lcgt-UX9dro z2e43;U}X8Bfe#w(cX$=WqoCqJE%};mEM-EgPLL#Y8N2f`hYLsXh4be-rB%o=Z*U;) zcY$z><}+L8Wh6ibS_EGZG{>^IAPGnlX-Kbj^62nP?qz5gZ}k>ZC+-_}jq=tPBx{At zh7PW_ugZ4mYSFmHnI;qH9g7-p?$S2nl32-msyE}BC3;peTmk=nO!-hSZPQ=*=mOtf zobmyd&7ox7rX4&<_VG8*4|~Sn#NVI@AyeMcbBxbBKkOQRQ+3P)cMV&{+r7=nv4CP^dz1*AG0y2_7r*hI&Z$4m?ykb*@bqRxmx=qlD=b6w=7kv zY|8yOX4=)?2TM2KGiix)LFa|4Isv3h?T(yNFL9(!5x(SG9ih+mWr1ltP9zcE`3%d4 zWmKaoDCoXhSt)UMg_{MTyPtk}FEh|B*H)A-{J0N5Ip=JaqM`yC_&$B4-}>-#&T4ju2+W1tNL#(8k$`aw}EukcHWU-xl zb0r$-V%@iJc2Khow0CIT6U?nzk^cq~7kKLA0k?egp{w+Fd1k`^vonBrayTMb2lZD( z;sR9kxBK*Y;E})bl6`ELR{?EB71aTXiHU-fcWIM~Bq}r%hMT!{!MuflQK6nAY^o4W zn& z(=fthh(rRfSF+=Fd7D9B+6!GsU_lA}SoIME?4AoU48fAWv}a?3w% z!Sas^VFjSv(-4VpjPlRd1gs(!fBsVb0r!0qBp;&<*icV`$e_X~#tK{ofRqh5Hvp=X zj4NP!k!j#;ZTD7eE41|g7^RBy&>Ptguh-f>%69cEa;=%13R$ia+VEd28*v4}5f$62 z%Z26JsEe&iD00 zdp?x&lHY0bjp~o;AGdcu`CrDz)7F8AP~5Eqse<4&%qq>xrz;9lgoh}H%vuXCo6yp$@!9B zF-#{*tfRg>jgPYHi*iaDU*9m6LUqBMp<+dzJzqwk3=fzi_`=usQ=2w15~iX`l?mE@ zD>4u}ZQf7~W}nZ61O-xn(q8jD0#Fm!055+|eXwyJJYEKXyh|PNaaAhwoJ7A>WS|gl zeZ*~t{ET1`%y#C^m`jd84$m7_>F35jsp#e|A#CNS6X@Uo&xyEEx8w?e{?#O2f}-s* zvg3%G3$R671pLjSfHParg6W()vt~g%bt<#O^w)7cTC>=oqAq({*LSZ=92HdT2VNo9 z^O#IxOw8^Pjr@8#)@VXSJm=y7Zuzjnpu$`E_=e#o#Av|kGY0)K*oP+QmjzxZ*5I@V zSiZ??e{)k4j_EhZ+k$#GhzaSUXecM-Nyytuw|rje$4s0)9SgUKx*jG_UhCz)a&4rbdea)&)-mt4>Dc+zAn&l}y1kS5gnUP^>$YU&HmA*heQCpWx@4~74mNA1<_lG!KtvjxM7gF^ z=b zR38=kw>+i9?2IcDWJBnEH(%PnoDTOp{}{yw8by!!((Js;MQdGiDbOnF)1EpGB4%UM zdM&m=TmIH-VW0c+v1_ut!z`HiI=|b&4ZK6ZD)SPUol0}kJ&PQ5QG<*m+*RE|5l6TS zeg+_C&y8GK;TVoDPP(XPlzq3VHUgd)r;~zDF`U&`s2jOR9gXW3HaoZt!HDTr^~TfZ zCr=)@^9kzU7eQ7JLQwi)WR>vPJeOHD84!K4*^wD=x;tj!L#{EGUSLQ7KIBdgyb%9< zwpUw%XaZ9z7+yG|pavU{_vii?F_G!66>Uk!<@`K4=Xpf5@88S&uRuTOUnySyH$cA= z)aBoRe!nx1{(s;_`~WWk2$t|=fq$TDf*A24K-`4?9xuXBwXETA;7@O7V*k&`-(SJl z{|H?Zz+hQoVxpG?fWq?^x(3vN{||tqnU%esg|)SfAqJWJ6VwLb=l>nl`p?gu06_Zw zP%r+0{t1WxQ7q(I=jDafswJHB6r%XT;bIQP_`|Xqoi2Xmoe|B~@z(UT# zzy$)3U=h{0b?@H(jH(; zwmY%UH2i(`SVDiBev18h(&9_OgP(bg3Wva$Oe&i1Y=y;yVW`C3MX70OzH0k@tp)=X z?&0#hYikXnFXIZXAS#ad`{(iR6BD}bey^L!rWO=>QpiuMFR7JuSpR>B{cKrti<#VTNeO&*RA}8eCO% z!hNDtHv-(d;YN9`)B|TV4jYYIIMiel0i6z(`nf>Y6IM1kwt%$tfIw{Z0{ zmVWcZaN-btS~JIB}h=1xH_!~@>g7l`QmhI-H2Ip2*Zp_B|9N&Wh& zWTi304Z*M_!6AMfZkg~Vr;Yr^+9sWL>_B?mNc3nA2i$Is#lp08xhxV@Trtl&PgF=l zpRkLDCpJ#QW;MRy*1?Cg|<5JZu9uiO~0A;K`1La-$3Z|;^I4~)NQcw_K7m*Gcy zX;nx_L{FFHQrSN5-iS1!S6lLU>KyM;`X?XMpuRE-LAv9uNnuKQNiE3)2eFQFA7>N~ zyEMP@ycgC083BFl(qYoVN^cX!a|tzipg&*qv%EXeyyE!0RH{qxE;M&-XG~?2cP}C& zzhR}Ka$epLm5g%7OU~$1{p`s+uxqEA_xK1K^ZJVaS zg78{Xhuxx8pkXw|f~j1#I9GfBe7^-F)gj~TXmS}THLhgI%UrIrs2yULsB5mqBjet@ zaZ$#r%wy;mF1xK4YgHVT{HW`Dsg>mV2E(K;DOvW2^a2Wkybn^ZQp z+;d;<;H%Q>1UOSiVsP&)P6GGin{Kr)ocz4QY5Fo|M$kAV{7s!7FH-oqzOQUh-WoJi zdfrpoJS_;=Ohw+gF8JXre&LVQZ}bE+YS{?CFQq2XGxv>RcUoMs5*#VTEiDOW>d2Ug zY1wFL+GTq*qS#~doiz#J({bPO9K@kPRx$zgtZ%BaE&)Z-L3^Otp!sGeRD>psFtQ`c z75=%H>-PPFJ3TWRl048p-nSdoh$e0|((_kONmX#@Aj`l5gYjZdHxw9NufX}IqD@ODte8V4C zEc8v(hCjTM!rjaDrG%}F4?;n?icfI8}w|t2Cv%%E^on z&Uq4avLu5a>88K@!%zg}rvE*#BHsiCD4}WOn=c${>XmNy^vkl$?_X5y=`7Qz1x_cm z!0Ch;IGuP^Y5H7gd@n6Aq!GBc9Gq1pys=rH<`>%P;R^RlY{Ek2tu#wY-E$L$EswD+ zJ$wCrY_Kz?iT6o_grqI9MV5j79L8YoBuT7AmY)9HJ3>Md^aVfvR_{BXr|Xyv_r{4I z$_rvIOdx`}y zT?%QDWuj*R)JKOteo&kaQ*UycPUIPK-kZ21wfxTtbV zfT4uzT^69gnD=16!>$>)x`WNCwvMNd=TWB-dEgbswTqpHU88^SyzZLgn?MQjGL04< z%kz{Qz-o#CSWN{E&1+T%yBD-uP#Vx!e9))-lmm~N_sv^SXQDMx=l% z?% zxaP7WD=F-_0-x1+<-b1DQw@KIHLMf<&UbeYe7C+P1HP(FV8;bqDX{n+c#qWhh4m*k zg9$6q9YjFcmQ7_p+o(C|r-?-#srbagq{Q!IItEX+@4lEyC>t|rU~mYvi(B=2skSW| z7#wevU{_gA;xIE{XoQw%F5zSI5mw5oxnS$>^g@nHT&Z)lGGW{N-m4l*nX{?`eD+)Ly0_%l(nRMoHB_cn1IeDc zeIh$6+Qh6J)-EUgU4xD!$%sfA89qXK>&D`3pOrkOuIbO+(lDoJpI5Vn+dTc#XK2z} z@Ma{?)7Y8M!+23!h8G6CP?pjKnze5^uBCmQ#wLrc)V~)&rTWD7bGe=+Wo)I;eML#x z%dzq8jpuT*1F+#*5_l8&N|cKz79LKEYlU4uA&(=7tc{n7Vsh1m#I(PUA(L;y4Joj5 z?;m6l08+^+z^uT`(pTWY2xx&`fGkLPlJH0j1@lb$7;Cr7!U!Y|4qksB00Dvmk;v0m9l-1nviTmuB_Iml}` z^Eq|`OSt4yx5Z+8no==!9=r1>fx8;{m=M%eM?Da>iU+2#^6{IT=cRyOQ1Dxmp^GQp zRpVY5?<&T61K?f7BF+ik85kv+J}iW74z>5wX>i1-=R)4d>%MO~)7@}T{S<#$Zbis< zo3_C$*r2IdLI_9dlFPLmNIP@2RdAh@%9qOYrkgmWHBA7ay(EMqmwqi1(tdV18v@u> znUFV}dXJ0{SZ*JLd>IzS1@QK&`>99G@k{7GC5gm)Y>qDn$1~0(d8kbO)WV;bTW)P0 zVfWooOV|<>0`oAhP#0PrmnwODvy~}h{o#Zi1q>#f)}gs{&aoRulxhKQdIp(qD)z#P zULs~YB`IJ`j4WIx62sD0HA4}S;?k;&j4T{PL?q|}#)q5>czq`Ba`UTsB`O4i&F`Pu zb;voG>CyG(x)Z6+b&M!04lms<0@IO^o9J%UP^ToHS1X3w*Q@x@V^8v2?>qs3zRDQH0K)C%N1xEjdv|z2}{=YPIJCqW|&}}{P3=SRYH?P-TD5vG!*@Bi*R%1T;C0f zI4Nv^8ORxM9N)pTYAeae6@!V20e9|F4qA6#f5bEhmg$%N&`C@Zp$)oyT50zF%N%9k zULfRuF9&q{j}n+cw=V>`eId*N+KxLgF)cqhQCA#Ag*VK&K$?9ZDvbm`=oKlL#E!1a}6! zren6Q-qG?`6Gsne!dSt)f@zQVlp{*el89%c$x1UsxFS#6QFfy}4?5*H6Op&7vsfJ| zE|~cC^3*#$w$7eZBDT%}wi=>`{A=$1Uazv8n>bK{Ke)kc1g|rgofZ7i+v6E74t}$p z;5XYDRHpG6+?Kz9+cE^)mXpD4*+iz0zAeeXD9Q{)r|D`5UnCHp>KIF0?|n*P7v7(y z_IXXHYfL_SlDaW+`*EXd_U(QyxZAKwrl{<#)yAR#vCsY4YV@7t($*PjZ_X~~su4F- z-p*#B**5{-)m9Z<0u(E-_}&JJ10DY(gThyxZ}y6*;*#BS)hheBtTM#oJvhhLTBFZt zyGxTSznciz4(=R~zkf(M`<+HL=4;fM^we=;GNn4^k4av4RPQN_!`OLA(A}gDIeAGU zx=A6tyd;s`0u_8xw(j`BPb0eJuwhIu?BFw%VTSnT%@oXu~k*Q zPp1MI_%-^ttpcZdigSA=9`89TWSp-%r*NhQyZB=7GVCuG#iaKOnKqW!dKsNjqbCcVp{}K*$4Z+-JW-V=gy@9dQH`3u)EAm-`*wwe zZiy%B!*eP?woADOo!`m8Og#*MsRuZidO&#unbl9~7>}?UOq2~s0RPQ2r!WdIr>0RE zi2wCYLO3gjQVR(>b=v>>H4L&AMqyD0y;T*6pTFFHc}%7cbl>MU`3eF|8lmq!*}_jA z(da3`J^>c`EKOzI4D@~Tpm=jZJ!}2gXQoG#snd4Fg(|lGRE+}iReo9e;U?Xa62{oT z|4$))Sf+(HarUk%<&m9oE(r@goQyrnTV$d#nDX2t4x0!Rggu*a3bS)lh0e@>@a zN68b>^X&^UokyfKt2yYrF&{QU+t@y6BC`P&J!xs&06OoW)6N?db$S3XKlhI5umoD% zO{YCyN*!NdX0Sf@FOj>yY9RlQAa@v?aR0Yx(EQ zOK{HqI~+#=z-;^lcm6|}dZO$7d$<#1Us_lj80#4t*qP{={rQajwJrZg(47znGB`nE zA^-4a6A;EE8T?x$)(F6fcK>u4g`vNnufN0V1Vu&ugx6{R&f61N0WkvqinkZNoIqpd z#DJUG`&iHq#iALF)@c+L!3a|aCuS>x-B6!RNqIis>GXE6vfKGnion>>+UjZW zWU)la0tlWg-t(j~BxJVk7^j}`lJeZ0>y|v&T4>moDr?Ivnjb7dDfR&xd-}+zj+o*Q%ef7_j3YD08^Q zyDTizy*`npaD9Q)(9-2NA2nPWm~S!qV%#TifsAm)X@}^5K$L9f@V&c;RDBKMQT3I6 z>L=TqMpaR|>faR1x0%N6bo&>X`h*xg$LgAWBEAdYyNRqnAInv=46(H`T7KV2$7gzI z9%p&z$0O#1RU=9<*xx)#)vq&Dnd0GVWrI=!D$CxX$~QVui|+$7qM3+hX1~!7mfu?- z)9!Z>|FK=#N4d=nGAlTh0yv4{tWJu`3p?&T zS@NA`WD_uGy3ip2pSAF@6l~p?zp?r>itj_Kt9BN&iE&Y2FE~xMk9u)X)18-iImy|G zQiM9Lp0eUqcEZrpc_EiJ{wTd$B(zq-TKKTWEK1kz54#dLV^&oT>Nj>Mn>no5d-BSM z-t$5&>js0I_6AqAS$|$FGqQBboNJQtNwWfI((AgmmipbxpC(k*mMtFdT09OlO->Gy z_Gmuy$|Crt#ZT`sx4=nS>f#H7RM-kcrK2SUua*wYF3XapO-0o>m4!&*_;h&^pWl_V zZZ;^QLpQs}H(@7~R^`w$MoCEw6!bPP4!_T!taZz;#?QJvm`Yy%;&QoXQwNY0FWpqA z=bo|(&pl_b7su)Ef|X?rgvAS%mO(89&>rqvAfS?)?2B)OD?TB9Z@#u`!xDv6I3FST z{tGpuJPsKC4El=lKAYQpxxuenpLWj^^}z0X{lubtwBtVxFRPvWF+3SH9>{4=Kw^Es zd82x$v@ATENc9>?&r&$As^>Goy2n?b3?eoG(+m)K(L9hQ{fe(rVtY;*;O5ZC za(2GhT_kBa9dCMy*o18W&jhsYYaor zHX)F?FCi#xUZdC?D%y@ao^Q>fkeo915k6QL#YY{qgZ3X;2cp^kYe?k?JNlDsJ@n2w zlh^=GBu(LDNEtU$b78upnj1+24%3Jb0oOP=%Bq)UGZ9rC3jGmE?)TDOg(c%4X z34MeZ1toi%bM9$EA46V{6L614^GuD9V6=KCv{8l=lXjc4E^gsGDs-G}7#<0jv`3pZ zGN8?(V!+WXL)+|8YpZK_{}2w3)(Y@Pr)nZ83*DN>#@cymTRDDmb<-NZQAo)`>xF6S za^_cr*W{2^Y_Da1K6+#*#hZWaxHR?ivcf?(=|1UNCA%Zb_Qt(M>Dohf$7BT6)%*() zHCdm*{JfUol{;hVVBw+r+8uZ2k;3ABNa)4{c@V>8FxO!sAto$8K|~J%jMN!-|WEc9o+%11RA{@(-`C zRqEW_?-TyUsE1RhT3>Lub#$kuW64h8Wmq@2)s@fs#(M;B?$wZx&57J@Y5hs}FvjD~ z{g2(&pY8X8pV){W%JNVqdaxqV*3u?>I{9H9cRXV}LLFll2*jY=+N|9N&)S1$VvGo& ztU8$~WeZ>NP|y61p6pdY6*p$A!fo_1k@MXv)Q*uJtQ=_T&#x8;?rumQ*0Utd)tDh*?&h0tud2##G=q}gMRSf%&h zf(I`0S4F=_%UWmV$aM2J$$f(JfCtI%r10`9EFb{>{Kf`IphtlOdidV3hWMsX-j}#c z69|wO8J1!5P9V~aWC>B!6SeSX13*@98*6k%g+5}Kq?s*Kj6)LzdBI=go_CWy#WA$Fss$@TgPNe~&E2;@M3xuDfQ5h4^-%#1mMrXY8a{e;4#PyZA!y zjM{m4V-Pfa(sc2H za9{&6T<>1b!8ycaG->Eg%6Zf^_9q^k6aJXul)YxCY6*7$Tzicj_5r8yT2a`#LUiqp zNl0TA?-P%?!r3Fbkew7vc{Y;~)ESbqmYAl)Ec(pFht~4YOdFVDuF{BJvJtP^D zIFlp+)UCd^5)o8dY(kMWTUIrCT1MPbcRiM@woeFi7Ci}GT%&9lXoGQJ1&7#PFSI7auk_i0z&jWo3EFpW?{ig%{eWJx>S_r;%5iW^dNegn&_fP$Wg+B~0@(Tp`Ni**@YzZXI!Pf&U!f zf1g)k7rvVc)JX6>4R;{CFrmyLy5XFD$d}tGox!hE^|0`&%N|oAb$|@80;B*Ac$W|I zpWYfHVMb~rS%8{lb1&8`Dj>Y5@8!EZ5JoJ8oA z55`M4O@Ly6`uvibNapoN4uxi?B3&G0j949a&-a!mR~%f3mXR79i-6!4!Gji-WN$mq zdXG-ZdzI!mhg&m9hV30qc@->x_N{&CbLp&h9&)$ zV9B2m3~B4(```ojwb9QO%>vo4PL=GKS%{RSOa=IwCJ4g}&~%eDq`XN{xRVuwori^q z#>Bg>#+bxb2=ZomfOtDfjB-OT2@_%|*qN|kEIBGvf9}0`$SeHnu6Hphr>-DXFE#6T z!zeq|!mfB%-jo^j7OTz(s1zYCwx-xE2{@3KN!)2>pm4Ev+IU6b!ZNAJy{@`!sy3be zq5`~vbn1m|+gv$F4iE>VLYYKDcXhDX)dX9PYh{0#I=n$hX1f0|13a;^0te(%~J9oz?Mj`k0=A=AFj_g;Ru5j1vc}Wg9j)uhxUDIC6bzgf{ zP^f6aP}3>0ap>$z({5amH8zWKTe;cHVvUnFOS~}12)R~p=5x<6jow4eL_6m6b$Y|= zPO_>q9sVuDG>|I17im15Y8G#2wZ90sGcG}m=xm=@mB@b797oWhD4S`Y=$1WF5d8X{ zDmI<)u#4@vSuDJ!fn%c9@!7y5<1W7Qkut0tqvn8xm`m^=x8TWVV@jZVO(u!Fan`?u zhZd3`!^&0oq!wvV)t;=y+LD~<^QG{|^+#_t?Gw~WFLwTXdPP4w!nHzO^XFIk&?K8T zGDPO&mPHi#{e@4cTDh0bXNC3Lul+C%G6^U^<5%R0HSexVH>6P0jsP*V6gS2J<2$Ei zUNt{}!A9{>YJiZ1tzuLva2=fK*G%A&l{L-}2iw^Z@a(OFKLhgD#E9!^K~G|zNtb|j zuR~uPsU6XiZ%Cn{9kEW*&*qS&(fAock16+K2t_7hGS=QEOGAdD|D)LeTPOu+`Q{J2 zrfKOF>=f_CnulM16qFU=;;P&npom)AX}Nn+R>Mv9mE z6B>8Z$_3K^HP!W?vECR%3bZ(e(p{4&*vNIt>87At{^8_;9I!~0l$d_7qQ}}Tx>j*r z#UkgW?C4|O;I8*nv~3>hrU4|1fG{qMd!ab6q1emxAcqiC6>!6$ojV@gta=SOiDty7 zW&cJOS8Qm#)A*cqB8KbMDvUv44VDl&9s_Y*Zn)qV0P;K226_ci-H=eIL)t*zP{6=~ z_|&$!Uw}kIM=k9%yCaU<&hd?h$DOMiQd5@3V*e7;`YUqse+1LQU#jSA9yqWj z-8Ui%4Xq$c41xH5yLRlhv(IF8T*ufP^Udz6t9!|wCt3LG+1FSIx}&3o?UJpD=p@GK z!_g6sy)mpUUdU+j_8t=-E3u|*jToyxJT8?P~2*k=$DR=b(gWE z|G}pif5WHr{vAHGBD}F-8DgQ6vWc6sAa1oMkyF&Tp;WSc?BTqB)C#d}xobOWvdolf zbl8fL?n5z*M|3^9Mr81_puJT|?y4Wi@MNw}86udx>^J#tv$E>AnLuJoQP1HhPy3>b z>vh)DnR)Ib|H?Agz#wR!g)?zy>KtPdqhp#K0q}6b{a1L^%=F*lRdZvnvFj_&j=8LM ze^~f5%0NP{(@Qa;s*cWWx$9eZ5D@Uy#%{n+pATL%5XgvHgY4a3$aXF8wti_b`S5md z=9L?tB9W}3aceTy>2#m^FmgC$Em;Xk*pVnX_e~Bh zpUn46Y~AcB+wc8Gm1P?5l)`a#7Fs8Mc-I=Xdh59xh0!94FYI2yHn&z#^j-O=+|uY| zo9`C1cSv`O5j@m5x`bFOW>m__1-eO~7v%l+ri-ni1^yj(s9x4Vo8iiI9TbYNvB1i+SmSey&AlWQ#?xDbMfA zz0q>Mz@VALJJ3VFY|B?&va(c%{_0kXA8^Ryhai-aB zy<pY68J*n`dz4dxJROxHv$9zUY27=m!<(f zs21oM;4uy|`S?!#pk5@KLmIIDN2QeC0v+cGH+z1=Zh_AayOuue)ja_Cq*vomy4e-+ zz$$b#M4b*H$e36le}a(;M+G(%gqvx9g@N=u+FD^4@P?zE1+u48yOLk(r^{S1O}l35 zxd^1NG7?zYpxZ&(H!ziQ2ZwkVVpcBe`~VQ{Re({J7d#dY5QR?t*cgi++GQ(GnmW>F zt=^|9bk5Md%leS|#vGb(drPw+Q@sFo^NqG!mAGKs0R}GKEC9>8KJzR}s11sVFUM)CEoFkoJl5Y} z@Z7h6i``Osf5q4Q%`Lvj0=^pQ4l{$Pj!c2PZ`a`uA#uzjTT2M3WD!%g-qyr%--bb( z8G2R6;91gCZ11*@o@jO*2NI#a%mUAlS@Xf;qD4>5Exn^>N`p0s4VAVdh0kqKhp&f2 zx%bJ=Zbu)!Hk7r<^q3biXmi%b*lNieHgtwXQ=X}7`xNB3N6MUucVvBLHp?FO8g94TqY-jP_xE8@ zu>cVfkVa6DW`G$$N(7`v5b5rc?hZi#Ndf6nkZy)*eHaWS*jta(;Fv(~fj&mA#VqMpJ}?`I6g5sM+`h(xVK413xH;W7?tRkDP4aR;>uTfmuObgYn;m>-g;fe9Nx4>BXoB=@MBW*290O~Y%vu?5i2{+0rDWveWHqj3>5oez~QIGNhs7HD5 z??4(IJj(AWzw_C%SjM*-tL>lGSlXzKa60b0JHYSl&Xpzc0Cv0Zw60-NV(k-el#vYF z>fS)h<+MEJf(kaPcLc{bByTiJHgRCub9lMed<)*YYA$PwO%d)&MO|qA+GckpFnty6 zL#DIu!XjA`>kbN@b)rg@0r2c1fM=b&B6Jsdhl~<9X1)ek1d3X>KsaJ_f}mebY;q#z za)2XS?aou#y@(*A`jJ2!7zzlaT-$xBuy-rWkwZK6OVu#3+NdCWZq#?73P8d3RMcB$ zjW%O}=^d45#807_6$3bOA8}tpLmvseBbkZw!Jcis!DnAYx5w}X9=5f=hBOik1+ z4sv6}D;;T-By%U$LijZ5k$cTViZh*kg?Cq+v=^={lyHEP&P3V?(H}gx z@|hWe%DQY|b|_;$KxZlTK{G-4pvkUi-HJWFojeu!I|%mMe6w~&-YelzRYw2rTmt+S z$ThduE10Or;7(^yZt#9k|u1=?$3?pZxYUVC1iuf>DTO+cf4I&3C# zNc12@Li3olWok?xTDy(3J}c&S0}iK?noxl2Ze6pE(TM4j|HS8|F}1Tp#B67mf8~J0 z;Ogg3=P;L~U?jCiyu14TsBHhkO2FT-2Y$uA4R4K{t-;A9Xb+MjR5wZy5WB}@z1 zNwWjl4M=Vq+LbpaIsS;k>r`l2Hqx)`7qg!Dh!aDP-Pyxlv#59)d#n|ZU!X(+!!vU6 z6HeLiJ!tH8XtW_p)RqTpV+|C6gSGj&hiO2fn?ZrYK}e4XdywU22Wy~t;Qhe7+muq% zON!E|8@BSV(l&H-dGO+QV!KY|R@ zM|}@;98M4i9 zYo?$pg&@<7JLpnNA--*Qe^_hb9Jz7M>DM?Fdizbgcda2tocCGSN9sb&d!9%LWVuQ~hT+ zNY~ud$V}_cFc9STbfW*Avc>@eaR5I#PQT?na&Q3cBr7XB*Z=!ySvhFvnCNN!A*mCb z!+%D_i9)7+K^%Xxy*o#y{v+UMZD^$b7i&2nmHa)X_xHdQC(9p!Db?TQP}1R<-)6xy zly5<-pdX_ZK4|d3R6KRBi)J8m%ulVHXO$<)!C$;C|DcseJ4!ldD4TvKvHhld&Cr)% zBq+nZ*qm+AAUoaCj2|XBwZ4~Vr^68(SxK53R9Olv(|(~|*_$}?_)y3TP5=4fD#yYeA`is6}L{cDLGn4;ayrq4gz4vzOQFfSJ^)w#J1nT>H&a#Kal zSr`#U_MOHiz;sOTuV9Y+m~1{dB!c_ZL*91WbQiRL&mAYnud;6(rIj}-=@KE1Fsn;? zl@e_}nddy@$vo^k%;M30eVoTt$D7#r@&5O+S1n7ucJ^Jg?URycye?gBDMOE~7g#1n zEUls6JQvBaIpnJO-`}&B3Oj8*-V?#!o>x?_UzMKiF9$iT#=D?Y9vWoq3CzxiK8w!Sw zE*g0eW0T!iz9H)}GI|Z;9`%SQl}A`d?5Lpiw?Q*xR^R^!uFoshRZ*)+uK`*Pll|sP z;n*(Imn430gc4!rbnWRk;AH3IjSZB)IS$y`+u60$A^OZ4bl1aqB#4ZqSb&W`)*6Lj5|qnmM$2VzV^pwFP_Qj%4Q7_ByL4#>!zx>%Bx|bHxVKs-A!z(ig?`} zz}Ly=h|jTvoNQ9g(jjO-Y7dfEL`5VlVk*BJjD7Z+?J#D-rIKzp?0Vs2t{=DIS9L<8 z8PpH-NuC4?4tGgOu_Q)O>gD&|EY?l6Jappe;t2B_Zu=wX{-*K4E<_q%H6k(D`Sj!vSebWPePHi z@?-alNyV^n)=l9J01g>kkl_K!C4&ocJh=9qzX~EeXwQ`w9&`x;ChKr^KZ7C8_62<( zy|bv0J~0*IthAD=@{T&C*-v9N6d5_rAPIyC`o~|jZ{rvE^Ol4fJn84T6g7oXa^Qx} z0eqTo3=9a!TzPzTi2)3mbLzT1Q&>KybtfSYrUpB|8TwF8+~#7ZYs z6&?8Iq>j3g(pCpfu~GrYI%dZad$%mKgX6d|wp{Nj|C_-eHl0vO=I|oPGe5K5`h|Fj zhZa*q6&LU3EcBalhaLc4s0bzFp_J`?lP+&w16B*)7guISNdwT4pP0?W3`(yF*i1&m zP{LN#cG29Eyacy+?JD=TCUy4rxUH~cXbx;`Ra;H3*0}TMZNRH%VHHlzxqB-^{U>e3 zJHtgK9vHQ=})CVW_ohkmDT>ja-z^win`~MlSAJ z4$0ec7oo+neUs103oNm5#V$ICtxPf1-or4ZsXQ~x;^uv(@*V$Y7Cl~kZm_y-g>S1Q z0mN7@Z7EqMo=Ll~R~T+z;rqxPXO%kvW+76!;;>pLIQ8Lrh40sL90eNgQJr@-6{8nd zZ0O~6(^M3mGf_f<`?l`b`Ae2Mzb1Gi6Ti9*$z#iVG>TuWlsCYwM!vySLer|3D~ zq3i+TDE)1WwU49S$gU!13eHwmEuO&mN)dQI<`d-#5!pgGCs|eDt$V4!XuWL(sLecgr-&X@VRt&GPA=vCg^? zl_`|d$c(3rgwZCZjYwUpRho4hf3j!2c`8_bMoPDrHtxrN;_1riK-L{OMx5CoBSwCE zQNR4;<|}oJg(n|Mw~lrkF1oj@4R8#H7xRZ80w(*;5)NHp;?PT?I|$#mZus|dV(!r$ zAx(;2dPl7q;DnzrXn%QJlqk&LjO?aV=2i{B?_^rTs0d0&iM6;ahI@4K@Htd z;Z9%goY`tv$*WPSBDLj&aSMIxhiu#%^0=o98qdWRND>GL!eJAGGymk{r-AMl$BWJU5CxdfN^u3aa zyLnKy#!vd*QT-ja!ef-0D)b|&zjYjPN*L!s5nNRCc;KZ5^lG=1XxrL+t6gQbSkR{@ z!}a^A&ik|jXa!KF^4Jl}ha8rz_^N5jg-Qw;@~naMi^I9Vn$QxgS-Ocm*I0jFj5QE9 zMya$e3S7BwckQe>hcyDV94%1Gg;qPh#(T3gj+Qoy_}1aX?iY04yPGw7JJe;O6A|&W zTZC=$AinavEMd)aA)EoXT0itJiAAics4uD#ccrY9SmMl3lG|hXaL7fx&TgW zKs&meKSRz|$of_Q0Uy3ZUsa$YpVY~m{XX{WZabzFn-k}g+xQ{=yoI59&3hNq3DcD3 z_OE#8MjP%pQY*WH`ZKeAN+k0IYRQcq^Z10Pd$Z zhWi{-9l<50Zyt3EGLS@|Zb5k*`EVZh2TfVDTh^ha&*%KbG$L4onI9cIpW}ajz^3Om z*FxIn;yF?MJer1DT`oG!E-|G;=8`@A)^|u=UI&dupZ|MD?FmV}1WDIOR;e_X2v#Y~ zWBKp{?b5qWuf>m_&(+@5J9P;f{^a<`;xOe95jhp-HhH3Ih^??~b9~lt4{u}UT>yr8 zPMVMF;zB{6mRTIJC~r-ocLID!cpfB!^UybQci+h9LL?<^UGDhOh0xC2$~Lsf-pW>F zK>ce=+R9Gi0O7 zd`3Fn#Q3yz-@4$nahCR5q(lagUeJ1^(2E0pg^ ze`|${i@D!{%ghYt-}(lZiPMgmk_T{5d;SF(=7!9l0_*b<8vgm*nxlc|f^G@! z170Pnaj!S;v%b4!bo1MoMH$ViHxF68u$^lL865{AhzojkNY~+HDI40v=EgZz44&6RFNzy(# zWMgI5FZ$s@6Vc9Tmfv+Oz@*o>1-ucWWKDLK)h zk9RJ+O(^-E;SZ*o?a__K#-*1(R^MK=1)LRs35p>#y{q|07@)3QYJ9+$+|92F!xNxPF3J6eyJ(pb!D$ zEf}z~`VW#l0M1z3m|N*-=;@mLk=z9NJrMH0gGMk;uw5vC==a;j1-1(XX8kQ_^mDtc zZ2k-!{k60FFM>S|7Swi~Tc`bYyf`4JRFN%u)`N?(x4omH$qE34{I~2mD*Sje`sNC%o-1 zQpbGxpG2@h5K(aMOeS04n1P{!Kn#WJYTd^e<6UM7wFTZ}Wy7(yDW~Pj>w7@!7+a0> zqeW#Dtel5%c7hPjgO?mAYqH_V#k)FX$EV#s?#Bz8z1=el8ufXE-NCD#r1XSMtzr}@j=T-403JGA37;hR*F);!Fo z(=b1BZjdOUC+R1MaOe=5a300&aCLzU9L_Z~?5&-km-yCPns?nthsnnqGxZNKM)E#V zeQm$7Ia%t%zvgV=UhcBL=hdom(`e6P#V3*3*9Qek>F@P);5b`}WI7>7n98H(}XqMuAVsF@snVm&=!Rjl0`)J zr2MFM<>1b}k=&Q>aa6y|Q-g{H9Va!z7`SxiR;Oz+P;IU=nU98(IbeI#r_N_FZlb_V z>KwQ0YGk)wQ;oE}Yz$i(T85O;j8DfLk{y-_V1mKtcRe$aytnLeVp2}E zmEEQ;aFl?Q{osz^9gF7}OuCe5@=N|_iBMIsJ37ZFMlS5@kSo1&xX(Ed?6|4w9Fmm%ZRxW0dVI zl;{#5`SY`6iX|+}^6E6vn zd;y4uUh=~$U$rkcQNSKj>k30m<5Fx84WaHGU)nz91cuA}{o}=xuc){^)FTS8O(g^> zz{|DTsJOk$K+u5%nnyCERm=Vx(O9_7sc9K)`p1>cvQ< z?J!y6F@7~t=f;bE?@lEL#SZ0rIy5Gww=9sciX)+2X4f}jR9^ZuzH@50e*E?(S>}$< z^if00`Z%}MGnu-Nw1!SE(aD09NA4qLS5kQB-Ve&%-?C(z`(Uc=A@?~vR_0ESnC|XiTdrw(>YR=g268FX zjD`>4HLNWWQMx^8WQuag3m#^%kp0$T-eIBhGv>3VveH@-P(=M+&3)6VD_3%@zLCEN zJ=7bWeT9IpTngn`IVn?~bsXb9w6Po7FFO4=IMIssN@D90^{f>?MH%@m7v8Iv4b)D0 zNfUDS@Vd|@7L4OA=}yGvO^|qWY^8KxVC9*|z{7ejgR`{&lqxnCv}r{N1JmF4a8+~) z#lWfcLb?^!<7^LF#Qk_#~k!rGkBID{2jyA|XCyCW)(h*-6*wg{96b@S2l(({cu)f0 zT)4h+N=AC8Uv+M>HD=<1kY-n-b474 zm$g#BPeDoaH_18LUlR!MmUv`>tleX>T;t|!N(B+_U7|~$0uqU$b^u~V4-m6{fSBdX zvbu$8Zo;{`I?=ngqh1RyYX|2{L>JODvH6N62*9`C$mFTt#Txva34FT^#8U!KfkZ{; z-8#IO!XdRQ#UV9Ud>xp-cTbj0L<4jOPkN&R0GCCd98!hBj@Ty9=GQCm6Gw$rH6tIt zox`?;U8rH)L%cdd)*+D>T7!wZu59w%oJeqnJ%(5PKwc<5%0{5QoR~wPEk;H16Mu1r zCECCqV~#k$9;ekTn0QDYfX}rjRCtN6t&5HF)f8^bxxp;>iT9nluH*SKbr6)xJTB;)VR3c+M8P8JiRvvzB%#Zf7 ziu64P?Ck66`%hv0&73$24L3uybe~cVHV^sc6FXDfezzRq+cZf)N#}FsJMkca`iX7h z&+10`1iC1+pN`t?ZmzcY`o&DpFs^4Qcq=ap8t#)KpIaDPo`P@@0i9VjoL>qzvEx(BeyDMr zN$$N*<;@v$%1!vH)3VlB`IOk0^r<&7=`+i&uvls;LToh^rJJC+w{kZM%VEt*>fC** zRBVOH;C=?3m9-88w=*MfJ2Oa&F>dS)po)8$8;JTHwn8PL19Yin&5SX|9+{x^I|F6H z);URj#$X9KIQR@GynJ`+9wAkYz22i{l3E+(T4t92+;Y|PEeB14Ef1X|io7;ZM#DZp z@n|5%n0c^~1`*G`fq2s**~->qm_XQ)(kRuF?LbY`$=0)IK*S?I&<&tvfKBlO$l4+G zv!H7$+scPp#zxu%@Ec5vC5<=%zd;(XY|QVgG9t;2`VKK0g8pKPjZC|P;t6k2-dcCM zCtg+0ML%ap)ncgM<8{AIa-_cVTixg5cAa;U1Bld25WoOs9HkA+T=7l#zp66XbTRV| zC(HB+Mm-N7y+mjy*0DXO$s28?39EX7%g;T1rufX|YC#Rh#@e%E1odf0uu9DS*r1f@ zloT%Wa3hUf;y@$K6*KcG+!nC>IQN;+vty%)ermqx!xHds(-AePVmc+_kkHEO>R)@_ zPG0KUvk=B_wr@U}9f%T)o1=5)e7kgd@i202YQXr=x`p7!luy*BDRj}(C(cd#%tZ>K z80tbP6Ic-X&;C*PRleT!=*-$L)+tlbnUh|u%V%SZ-SWRvr}(QGBxIeK&ke7`~|1m>urK(fC|LtiJTCyKsUT zjA5H8>BSl)^$wG^@){-G4wEKTuD~KFUHlj|d$l;~hnHc0l?sP+I(-6yX244(urF-OjYc6-dK;^Ger^3k zK^qRuqG}f)XW)PbH_+*-B5Omdqq!(9qSop)u%R z(V_nv(AfEN|9^tU{wX@uZ@9&8P!9|Rsr;9?g`Tz1AE7bUf5rj~hJv6_+wgm6>>Psn zTL=2zAUkcVKiWpIu>KxP`QITZz=8S;GzL5OxBBm(vA^gfS^ui7{a^4W=sA>l4%z*d zC;&x4iT@>J_y3Yf!l1uDpMQ%%akBh5CKH*9ipi|ifOMmc%%Ng3^L5+1#V*fWS{@X* zaMgF~>~UsUe|=AfYK~p5?q_Q$djgaeQL=lb;o!xYD(3OYA_f1PX0WzIYb3e5>tT1; z*6BLRZHsUz$Ro}9l0n-0so7F@o|6-)NcU+xpVk$gqG~tg0e3tEms%s*GWyx+j*rCA z`Y^MU#@PgO?eX6AJVsiz7uS&ShNtssRBA)+7N^Im%x@i9ahO*bnu+(HYl?qV-z^O~ zS}xgNn7-28JR>ua%5<&SjJ#h}quTZG@L8Fnz2gyEc6!Bk^(rs4ZWFCpgD!)rs*{}s zVjWeMEB)qE*U#c0{daNK=M_l(*V*E5UmOtzqwn))w+q$P8}IKix|Ez$ahxccz&wrT zu>jy>wx18py`G}sGaqf%f}1^@Zf&_z@z|}ID}XC_8XuBRY{4|2$ZUSLvwbp5WBwJR zDW*M7DwhO`wDP$rir)Cd@+0tO;)*i}xb$drR-|elv-JVTSF5S$)RORcs<9g##`_7_E9bGjD>one+d|?BVJhx_=cP2~2 zes^UX71qh>kL3DzO-t)da8ytz218I6BkBA?HKPsIf-hlc=T={8L*(+4Pi|rpX6_YF zP9kp-$8Xj5E_i(6^rE@r#M;PQ$R+U{ z$0|V~V=4c=_oe)5;1M9~(J-3v;MzOOD}vu~>O${Mb!dW2&I8eYjuON^wi4s@)K|j+ zxX^enyL6oG}WDY+U$KoFG1|J0UH96!L8E8uN{;X#K;ef#_a%Z&JzP&dthoVp9|9xZT{e)ViJA-IINvH2!1=pgR19mi0xudpAcSZGLI}JuRYv-rRRa08QFjpB zl}5;0^se#Q%s1a`-RQf(`YBZr6>H!40j#3wJec#!c`zpsTcB*9-fA^NA4X(c1$Ips z0eW+aJd*(7;d4%?*8&;zpl%4J7C=22m?rxVWe#vFQb!OocvZj9BWSFxja9X$nYN<6EB6(SZOvyF^<#$%26jYws{E-9tSCw) z^3^zQUaSeKDz|HOTnUXbD{mUO-hz-mJad)mTHv)<=4I#2BV*1I z$+h=%3vxtsT`$=AUL5>v#QRNR4iEpfwevXrJZz5asLE?{pm)q^Fx0x`eO<;EW214k z-l^im}~4ZGS0AAbJI{M|OMe<-v({6ET*T}uD8VLZhvpjWd;DyQV721tM|iiyGLe9zK6|nS2zx-T(cl1 zw2Zx?{Gj@%9+Ln+&s*NP_EWvi_cztfV*kul8L;5$2srH0=vyKyjfnVEaUKR5$r*adZsl;

jN=3!iegr8icVp? zTdTAQF5&lb(XbHg8diI)Td4vWTa_0ruEfJzVbWADsl=06F%uRBvwK$M;pel>8k{OI z_%HXYc1?dOjj47I$xs~e!V-`VUKN#>aB5m0_$DKH7Gf9a5VM^@_49|?KCI@E zZDLPPJv8daMKd(&$>9%!R$R88P>W&i|6x~}lr)+XWoS>I3O@Iq`Tckh6jqHt6he7NQ>q2IEK|Y>D`D95&{}$j*?y% zPkktT4-ZS$k0AliA7wfy7j_hp>SypDH4V68fGf_|+n0N1#MsuwzQH3%dKvS-C+ZYX zE+Djx<~$Hy+IwKt495+X*FX&AdEag-Yytlw)y z1k*ycH5;FGeDlqiATXC~V)hk7HRI1Awt=A?s_{$fjrVIQQV)RMgxMqTL(Khy6w>?0 ztPIcHlyo*^CHyp+mmN1#v1&1c*R4eTG`_aPXgo#nZZf|QA5Up{ldBZcc)4J!74&m%}VKWwxH{^=$TIAK`K+7*++vaqVwLqf#|>BU~3CQ0!P z8!DTp2-DDuAkpY@mrxIXz1;g2LlcdGSNPr zqnB=JnfK`Aif4*5y`$v&ZUqWk1P){pX%qkC{Dv8O-tKP(l;6>tSr=-1`HeEO#K6$dCi}E6+0X3`SDh{{^NyM#s>K}$9hd?S_QuDOs)DkXfv5@M+zn+_ z2{&KkeKD&*f~leWy0YfA#$pJ4LbS4~%F+xnx2brNOP!zF(o_i5UHz)PjO!UKR|Ng` zjEjt?Ts=+GW(ZxbF*Z6kzII3)>IJzUtuJH5BzrM6iDN#CEIp}`TDixQMpy@9_X=Kr z(7D}m=t`;H^ZOfOXk2P^%@uhE>*8#oN)1I?`!h&Pbb|i&*C)3*LL{gF%PO>o;gaGt zPrdbxs^flMhcuK=Vga0i8+HA%y=|LOlfN zLv|8vnMh$cN2PC@J^=)|Oqm+1CZvZ@Dd<^_kkv(S2laNn9Q?>TNEBjctYcP`MQr@x zWL%kX<&KYrp$ONpNbKmW(NN0nFJlNpyN~?Roq+m!-sA+?0sR~vZmqUDWOSL5E>^8k z7vUdeW``5r$yCE_+z4&cFD1R-xtjktb`**)RhAwz3VLk4W$*G$aIN*-ROomc>=^%` zZ+SO8$EkXBIilBv^1v3t<-p6*wMgS;T z?|6aSb-;wRW{3dSVVb!6`tqRBCEeBp@b%Pr#eszz9>pbM`k_&sNEsb22|jxVbqw>ztqPZB4AE`_}Y2<#_Fv zJ%t(P81lXLJ&Qhpw$@fARZCAt13*3+e==5Q{b%@4P!u2PPdqK?IUnlp!6>j%M%EgDJ*M$z z@a~@>LqSm>*-!B9H=Y*sR}=WZ=e3=mL?bg)QsWY@I7cqw*-;J>+V=cyNKn?p7Vz)G_}%I=hf;43Te!50J)&%wIdS5Tf!0UE8!l zPQwj7r>Z2!Cogr(jkkv{cRGJ)1D{KtozOy#%UgL`V+Vg%xd|r*SIh>HDAUy6#5Gg&L^8n+@I?TRk2e}((mw4sM*2lL(%Q7Xm zwKEb*BN_26V)JD*!#>yF>?DoMQ|u4*m~BmB;$puYRxL|MXgYbAqVxRy$HG?1uVadfCtwSTg?K%@Do+3)oB zLZ;2ZcKawt*PGFDhvS3Ig>m~Y9<4`HA#D67)0cs0-g8Yo_#j!0CZ%M{+wv)2kq=0zyZk+pg}~bVn|jj&5uN>Xzb`s z?6fMWXxUB;sQChbhE3;fl&)rCTu60WGvMKiH*?f4{Q40B@R z;LG;&Xk|rH3xk#k&vi4jim7NFEYEJxr=opl!O{dH6crY%58g&!+ly)%+gqxl4i=Lx3f zUD#(<4@Q6yHL#-MwYu^#i~Sj&*)`6QQ~9xfEPrd01odqs&cdS=cf-kmpW-sG@i6|F z#1vB&V%q!iGJ>|L5KbGRcR?i|-U?pW&ZP$8C4erZg`x{xO4o`Gbyk&tF@U{l2Ybbe z+N(l6LeyS4HnF1i3R&2J+AD3PpL>;$>F`4<0&QOxU_|b$h&tYnQqg95%@pyfM0#o` z%mH2;9*$XY&YQO=E2RBCs*Eq#F_>{VMZQ8duMGP1hnD2iD9{_H8xXutHuLf5jtCy8 zcyFxs!mWeR)W1$Yhg5Z)uQ&zPpG$o}d|?)i7#>|~I~Or%$yL?H(d6k~~ICJy$Fp$yaUy2*C@!-%S` z8d7tud&He%C%P$ob_S7Sc?QtJrv_5mJLPrqAuq{4xWqf#sVus6xs@$#=j9QPG?Z~7 zDC5h4~Q7Tn2 zSgGZk;i}l8`V^K=!bMiWsV~aPhaM4WD^F7Dmz8_tNXv+D6Gzvt;Fs0M>$JM+FB!V-TFrwcN2yqGE{3~0v}G?E@)G$34t4aj zfW~$L>2|H}OBbB=_kZ(aD`xk=tfWXCM8DV0)I=Jpc7bKtGfIy@2nuGl@Ax9U1cYqw z zNE4EdNIOR77J@`Z6?Ptj*~rjBk;#S1#`IMR5|9N(R=nw5vOQf-n<1kY=cB;o+_c26 z-+*~JUP2$t(nFO=sOsg%!R{!Hw4eGEA6#AtL; zNdqS1qO$At%8WiLeW}YheKelFgnplU9V8$QW_h&UU7JRfpP&E#yF?L=-<0*T#ze(@`PtsmY0vG&{Vu2Kb)yA6eyo$4l&1(F5GRw_!` zFV?KCBYt`h&riVsO+MT=Pa`YQtLkYE8AmUHTvpz+#bmYonR-@f@nJc?Sw`Q0CB^Qt z@(KG!Ve#Q%-K&YPmpdJGE5%N8Q3~mO^ zQTgmCpE&27+RJ3s!kTxKPvi{L)Fz6zE`;${EMtcjZV=53pE{=>xPNdviFtHXYk5Mh zD=2+~=w8kTVro1auK-W8^cP<}yDKsadwR@6)TE^!r%2Pi<|68fgeMZViXWbM}a9=?m&AMY9v#c@+l>k>aRH8whd;dO&_`KPeqGa3lSU{l`m;b80c;Go0HR>VTS8eN7}?Gk zm+eVL79ti>0H70_(@ zGv3IcLE&N5dPH>{mX8JdEFU*~*V1XgN6m^^ChVOVWx*=;H+^O&bTI%&I8!$-n52bB zXfv?SkNrWduMPFtbs%NMzhmkBb1$I1pBlhT-P`C}fp&~6WACSz0FOmKe_;XlcE%`h zCuGmqElYhFl?t^=y@%mx)U2r8(39QR{0ZsL$kR^?<8~CfFPs@+Wf~@OF9}p)mVG<k^jqqHg)kw?Hs8QU-Dg9;6LyR12=&@{02<(=QkJqRO!K$o>oCBlgRkiL^OCj^11 zbc=zlIh43dCE_DE70U_?g5Xq4GPYxqxAP1$w#T7P#pQ^MgFdOtgA{odloPIBG`_#} z*n`$2UaLyHrpk?@c{J^fi&h(~Q#zk;jRlw4iL!2mZ%N35xa>g4gL`gP>aymW1BB$| zs8_^Nm-oMN#9v##muO2_hj}b5b(wX`di~%;Xri4T=bfCH`e}_aL2dOzcSOcjm-^AD zwy+3?6%#M&mT@Nc6J@tb7@~r=+Kge)RA$&*x)$3fBNI(`n@L-IjZ$|9 zT%y-JgIJshAX)Y}eR9yoqA}r)MKz(~F;m5X%1IWv;<2tKxzYx`L6Q)R5(H2U0G4oic!+8M@LJDs;;NqV3eVN+YNH}hFMmCx*2rh17zlIEZA_VPyY=PNJp)YjHj84^xH%j6N2Rl(}TiSpN!U1GJI6xW*2ap2c012t1%slaxXPmuoDQmwE zzwCo{%nwsNEJ!E2uTtvU^^bYc;3AEBFCfc?r5$5*3jy~^*N^#e;+vI`9Um9~@To3< zPnA!a=;d^)n@!5;xRT>d9{8EzG=b_jZohZ<35H?XB%NtJEeQO-CHM68Y$M=Z*v7 zo=UA0Hj3-y){Qx$UTXljPKT~`J6nr;y>&S|&aiD$@NedPlDyb07+YZ3tZS#*3D8mf*73sl67F3il=F*vk#Y?=M3AH$ z?s*EyyaUM+$LRwvIpR2o%sbLK;>7)OMyO?z<0U?r`S_=BQAWzSnyI?&KrKGP6xtuC z?O{Z^jk>FbOG;UDiQN#DTh<)%h4v?Q-6Qd z!L~|_daoQF@#CrL4%=!*NX9p_S6Sas&tG$ddpf&T7|aQl{5+Il_28=qgPGrc?ZKHv zjT}zRyu@M($Ue4J-W$A~>`0#AEUg%$%_&D!EO3491dXHo1$OonaEueL#u;76>S1{X z3!ZsY@R?nSKis&;-!vX9)Q!W~tGlI{TW}@B#c@M3cak8a3&}H`;HdmusK0xTD5RaY zFvh6R5vI_9**nvOD8B$j?UGhZl>_|oc3OW#*;v^AN~!#xwhrZihT0NfiqHA$)^VY>?mq&P`c_(|dKxy479fuD4@VBL z?0{g{T>Iq>9-bS_e~SRJu>2eMF%dl1wY+qL`!qNq1>)DHJO0CeZAZ{*dNzQl_QZPCzn?Nk*Scdq1#&qS>#rj<-ayWSqxR3cHlArEObZv2N z)M7a5WpneWgF*SD=DSR_$19V}wdKdS&Lq^OOBTyJW;k-iF-{M9_ab+v zfHA(?(TU^1!Z`L|b)&=EF@s18Z*uY=2cxrwoh{py+xhJ{OiaThfC>Y&kd-IplU>NF zCc#3LsxrVuTfIJK#@w$g<%OFz#l+8FW+kgLca!wy(@Px$^X+wX?_I_3VLmKx#~$Q5 z_>n|xDCVHY4m;qRa2)iEDjieeW-(VWpVx-ZKNhV1rf41Es8?SQe5Zl%q|RyuYtC|x zXZo>mVnfq}Nz~o!H0DN~M4L~&X(mR_k6bPy3M_A5CN#-jC!ChHdezxe+(ebKRrF>R zjU+~}jb_}GrzTZdKgCH~_eiqfJ2(kLa}T`Jv5cc(N+NlHr! z2wYkbF5TVI(nxoAhje|?-KKt9hKF_0f?##WMGk509Idfj~ipzOjZ@ct@ zx4cq}?a9sLx(k(@yeOJZ)mxouO)8^j35;l6he&Jvs6x%c<_$kF*NnR1{c>tERl974 zrw3gTS1|q9{rTeKGbFoodxESJW8K;4urp=~3-5?RNq;h`eT~NUVV#x2P{xD6LgU-` zoeMaEc2iBF7uHzJyAE=kznbLdx?axB?R=vNBPMn~Z_v)EcD=xSoLQ7od*ZHG;d*g8 z=h&Li@HjaHsqi`;)pM8OV!^Ggo~6}2=wye17`VtywXw51y+F038}0O4y_MWN?-|DU z>U2<>ol^xNg7%>FE((2-#m~*Q)x5)!tAOb^$SsY_y?h*#J=s!nf^-xLoR?Dhf{}Q{+Z$LM~Z66)(-J)()DenEHPW518vJKk^A!J#%k<)<%quGtv zF9sUI%*jNp?Bf&&1+*1ExP)~fLPlYHTW5Z6O!z|z?xUu5$(UnPmbVbm&ZH~|@Ok-% zh0m39J?~7tNz>%^k)1L<94=`}Fp~hxBg9pTM1+Kuj=JzWSB0^K^G%EIi-Xw`LJBO5 zoVDEUYEAXGWi0T~E8*E;IN)B2D3O|>9&P5-u{$LxVg_J5jv--)izQqfC{SWym^5vo z3*Muldf7B*SEZs7s7bdi5r%yXacy;WoZg&OCsMDVLT1agbTGk}7Uk3w`M?Ci3H*}C z9XGcuS@`T8T3gw>gzkyYRDHbEoH`j2Zzc4!{JcSz>DoZh&?&W;{Frj`)R+0?qh^_O z&Y1_5%YGZqN5ZH56Rm{ES_|*AJXChPDJ!}852bfp_IciSpoLrCb`}r_Z+cT+_Hbx{ zl@F3Oy~K_1GBI1uCzU$)v2q%gTvkcS%P4M$R#tx?m7?0~Pfvu%6r?hKt$cyq&r#JB zzKrT|c=~>sQ;0Sk_d`yc8R@>+_WOHmMe0x2pqc?cfgZ=Z`O*wY|LTFQF# znO4!X#fLfumz9@MPlqo9^DC&gLL{SlFaxN`?S6RT z19NjOC0RkItw_Z4f_t)oWQtUUOufalifg;$9V78skDhjhoTG5uc{04@RoebQjZPz< zUoxITMQ^nnY5;Y{V7p36FwKcPWbk=3KtcgQd;+Et)KHtOE5$;z0i9DB<`DVA{6ItC zHbq{FBeihx8J99hJ2%`01g+b2B?Q?7%SYu`zH4Q&ls}Eb{_=sBR+P(V3=$#eC^C9N zi=K=eS}3DfM@?}9Bn@YFD7TQckwCc+U$-*_h=;zAvIF8WeYkj;sHpsDF;1i4=UhhJ zErQ+8LUFTK8mcp0rGs|gzKUYd(@)aP+GndNV?M+sSg=&A^K;nKB=gOaOzLKRt|VG7 zs9tQEJFJZMPy!ZM5MF-y8`=TafPkb*Z=9tm# zHujMneKd)iB5gP@fa>UWD_Y#d))k+mYdbLiyQkaU*<78pK-17aZ(=L##)?NuNhC*2wvX! z;#%u#Pg6tr`?tlYtz6Jw4XZ3%wTE$EUkGiC@LxLi+?!2OqBg7Pj_SZ;`jUg$-+}i! zGsn$ZLX{L6#g-zcN=gyMrgs($_u5(HRpFC7H_o&QqAi845Sxrmbr!kzoWml%i=zlp z31;OA3Fy_YFnKmb4-bo2v06c#J#4(8`N`(`lgcdwGB^^DX_W^r8@zy0bm!adLZAgU zV{SfX)EORAW&Hjdrywrq_1^dz!~6 z&odcC%M#}JVQ$Zf0~rS%(K3=2;n}2}bvgoekPcu%-9)-JQ*@T(!xy~T+M-Q8=cGMZ z38s}k13sLGdPA4=gqTKV}{@( zpRL?6ix}Z#fO~OdpNQiVG1H4O-HVc!gp+epu~I|QBUstX&!8e$v+4ZeqWQ~WaSzIO zxZ`A;`%N{C&M%~vJ9|)u;f|AVK4$LlFp$W*Pdhi@&5pd&f+J@9ykf_u%-wzN+%RIR zW$lKe9JDrKcJcNIa)IC5L*Wdf{l+oi8;1_h%+SOiywA9ru>EG?TKz@*v$@tWoQ?)@ ztAFi7$Of?_G54X<3t}sklU|Xi1vt5vxJ*wzVM@F}HWV`CqQ}<^6_kouxF5B|*=)dt z&P4YKGwNlfp5Qa%uN^jD6SIn#(1)zdM6!Oij%Pe2aQQrLvlX4yrHhj#;(wX(N-G+Q zTwYCP&Wq!3?E9)`d9x}BUA|tv%ZFL-EXaOr)s{d{?inf6mpKJ2D14dq)Si)2`!eec zB24?XKx0&tS}3|{=iUvkZx2-D#I|lp*ur}JRI->v>h=%^>|vRh#o=ID zMU7#pf#YuxKsuaeT8<*QVkywdI?x~dG=aJut+!=PwVf4w@qQ#ZSMytOdLGRPK@d_o z5w&<9)bLgu9gH5Fnh~A!QuSF88fK}mZI<0F2;fgz*PZX}NZ2-kRt~m}K~`ev+wH;K zAFP#E?qU00vrUvXdZ3FGN<9{6CaF%oo6{__<*C>&#TaMgHN*-cG>mrNYEAc**tyC8 z=DP`E{T&ihs0YhuhGwd`wJlmGXyIp|h0B63gCD>Qe!!ARIZEe}rGN+v_yNRKvW=~d zHYZB^!3;M>p#$g#_3&fuB_w0 zwU<>}T-L5@f96YG)9`OUyIkm~EBGnv=k%jrfbh6j;`*&;wdD06BZKzYT|{ebg)>To zN!7D-`58s<;;yuojJj(^ce&6T?qYbrI#wHVH6wX_9hP>@<4%3QBPv%rS#UY!%;rT> z8wz8}B{82?h7+cK?UqdwQu+AHBvP^oHXuhDy%pe*&_AQ0Imbo6I7 z&U_6Ay$!!8$$Uar3qp^i4L|5BM$K&a=^7&&J7@Nk@o8-MYhRa)DAi3rTCrAij$c4z zj^wr6ea$ExAl>n0A#_kIU$xd?oF5<#-AQau_9zF|Hd#?%eEx&X4|ckF!NS|lGJI~*(qx!U6K z=}GWeN$->ZaBF%1Hc>;x*E5Z=CK#pVK>g+?Z0+euhaw%U;(Uj}T`jlhGt-m0hl=mZ zfWHIxDygr)-myI=Mo zim3e~5$XR3qV^wH__O>YocLdXFpPgi)EL?Sf~Yb5=ZM-nLtCrALtq$L{>Z`l?=_Sx zFm&h_cJ)`yDa#Ey^q*l@R+fLV7i0OOM)AMjFIMKiqE>(1FIJX+i(35^Q!}*G{nPRK z$5#B`oJf`%X!Hh6gE0$`@{)036+}uMI%;bSB_6& z2xJs==ucMi1+>QfXWX4nu0$PAmpm{y%WuH6_*WOb7@{>L_12dc8tJzaY<+^ddzSAJ zBh$8zn0jnDy)_Jq(Q~M9oJP6G!M`=N)ugtuaPGe|<2*VGujF#gVxFZoq~XfgwiaxG zg7A9B!|i0jd3-;;^V~z=v4@aV4-DtIBF1^VXSFWInSf^8V?a_)WzskR6%(1(jE~5Z zMk)-gahp-HoNQ4kvwW`8fPQ6)f^H>yLVSX6O}=}ua#Vc^e`UXWOjp_ZtsAwd_2FszjUe55JegF>W_K zaOHx|Ks}?yiIX6@diM8}L-3tyavdOcnF^^kg3meD9?eevJ@UiFg+DjiwO_N0UQ?CU znXylVLxVQut=U==KJ*>Wn~x_uAFZ+b;ZDaqqW)Kbs;JuJ);Gg!r{6z!A*-4=Q z+0i?iQPRsu*?Qyp`wTgWRE1~FDJ6FPeTL4lgBQySIRbb%r<->b&qVIAwVC&h$aYjG zRfl)A5tQF5)|5@=IPgdy>&a`{8xVeMoAXg}XJ0o2f1rKGhG_L0|F#g#ZF%~7{!!b( zuP)ntx?6Xcv~w5`yh&+w#?k@Z+>_nCajabwf9p9&8%Ux!rTCF_cNM-1zakz2GANC1 zGAQp@-9pr|Hq?rJbp*d6ivytAM6_~?iqk62KJFDyyCODSy@I5=kKB}Vr=*60Z4Wmw z(ATA8yy6hql`2F6PBe7v-dgO5A@wl(Za)|}# z>ucM*`xr`E%&KEeljr`FAO2@B&NdGVAxiQa#`|p}4cLUS600_kD(SIp03yPCzOIVe z>sDm4gFUAj{!Xdy0+)R`cDM$1d)9jObC=IWkhj7M&FJ zA*^%$nBi=oRMC5UcRI~9scUxyjql50luLF+tNM*m61cmDr2y>7*rDnCQX1(5n!!z2 zhd9QW-H(5Qr1eQ-piNc7k&6}qDiTfOWRbP-hE6;K*d8gjTh4@i)J5%Zo@@T&AS>9=oI5wPq5P%oH*^MZPD zn<;vmfj3fEF=X3T<)>^2tt^;;^MeU^7np!^feE;6RxwIT|<;Hq? zJX9ZcUq1ixeB|n~^y)G&%;oI3y;*i^h5@s8qMp)LAkRbg_T)@GrQa#)<@w@1um_3p zbU8m3I&`~qN!edGJC^)bK3ahrFkfV{wx8O*ymcG!! zsMC~R_+768Eke&p>~qU*Ke*u!71bbP1XspAaAoN10Icu_UE9FQB2SiCTK!qM?D$xhxQnz@Zl2jGwoVwKE&?7ij*n>yI<+aAmJX)t=R$R)v}C11p*rIoo~(sCr|P z(Jvk)ihs?8*bLC*MoBD`p!e$#Jun$%&}4nlnq~4dWN6@%`gv+Q7wyZ)imn|5T6a}; zXmej8COdynQ@WRS;D9#C`@}QakzCtc9Mqnz#aF&vwB)h z-a)VVn8J5NHM&g<07oDMYlZ+Je!VAoJl+BHp>mt2rxRzA?JFi5F>kN(#?P)2dY@=b zoaI}%4GqJ9RrQ(VgR!x;vcnGn#ugj$mBd5C>9@8mH{_dmJ-}y67pZ0ZAX-vAIjb%^ zS60zoK|T52iPFT`f!QgM()swHhsC-FpY)~Kc)kanHu+&x{*p^%=SW{UvE${1@VldF zwJ~u)vEd4=1vX1xg%I`EuNQ7XxlOU;*?_<~1PGkPvmxuLiVAQ0@rHR!cY`)lyKUr@ zq`6YzNb$ro*+)bqsw(fwU4&0XFx!m#eu^A$PwgjkZ@=MGoIpPU9i}C=s&?fFo{GI{+MU zB$k*0;3z9n1OP`;_Wgda33txhxvZbed@d>ChnvKA2AsyE!F)R;W~v0)0@9joiKmkl zuf%ltwjiYe36SLZ)}KfLECz-sd5;?4G2p+k`{#{UKL6dD0nm0Ypy}*?g-C1GGZg_| zH1l&1PLZz^OuYBvlhlN<2AqcEVHtYhYNXi2`gQJJl`O^lwUlSeWDlL z$_#)bqBzOMRy!LfrJ}BjRyfRuK}NAhk3b1safW)sfaT{0TRbcVnCT7b8Vm8))>onh zMxdP_+SL$Bk8KSG)jxL~{l?>vB~_p+1^sg!|9iv!Lq|Kc8J2~fW_S=M? zw(}FuM|v(xdtkjW_wjS~E2E zocma4sm*>n#?z|Q&Z^^wH%G!zsonK><#kEV<&fq1lvP`0Re1JHEAa{zpS3;lT--j# zaoq8;yf@22c-_>A7l-zG!~3l>)EMP9!TPO`rcN9u$bC;o;XSmE)ODB-TR2`;ouG>= zOvC+@Gm4@MSnI%ly|;B8*xrH9r0GmbO|ugi(t-a*P}MoiMr|35tAs=Y&vXqu1(572 zysH+RH`QNcKk6G@KIBxgsl^UGwEg|aD6ohp^>c@1bMrMuo!%MKOOS|uSF=85=O`0G zUyW&h_0)VtaV!M(KFW|oXCPB6ddlMCrzyc(bk#BRL>5|6Qve!uzl3fQVb85GCguKU zMv8B{*Mu+ZVqv(x1q$DP8HO26ar(GHw1G*uP89V?H&fcPP%6VFrULUGCb(z69!nKf z`$HB%a&8+5bzS&|`tvYZFP(LgkmV=uTQB>CSqyRljrvvix+_a%;}V;mvIb?3J+7A8 zU{*7+yoYbqGAG?mFI>x&qZg3Kz^uy$i>KRul=~1Xxpp?tU2; zI*rW^dwPd-p=VV~w~0%HM@yc(@CBZq;AET#@8ZtY1+mU8N49?oEd8S#@c#&~^dH#i zv;J?`JC-Q>>iMMc!NhU!|)pzrt_}|QKkTjFuq}H>6`z_xt`@8&&z)WmB1jJ zKhdICZXlfh3|g`1S4Ja%&I;+s6^7Y8gim-lSTn}%$TkM<`7cCPl) zJ3Xvh%hKNwb|eXOpU(K0%lm!69bv?|I4mcoKWwt9pL9F-uD;l>=SfJ?uMygbggp9t_65d_x!q zsK?1Wb(aQ{Eu)<)$#WUPQ`S<-M@Z>s7aLQ_$9%4nbK1N3S0}eU>aqpmcjm0_)(b?K zp$4Dt7ivi6(=1emp3ClXb($_dYqKX1d%gtV*=9yzaQ~2rZ`g z)Ua##R5N z)Hs{Wl8*aPgI;60CZlbQe{V^Y1XA)pW(|%Kao_OLIvQmtNk9`SsfSGGke5uS|J@_npF$>r+J)_m`xfqh7^GR;l{4X-X!#woPM}N&}=AnDeAE zFB}aq4gxd_hZg3Ni_gY_KlUJY0YBmw7qQPg63`NoNE7I;=9CVTcGlnSVF+!Vejib^ zb^j*6H7%L4z+n(Sr<&g;5FuFm{zM|u*V$aZ(75omeu>yJ>4ED0MdY%bM2vE)U^Twu zBs)8skNpmk_mOd7?N-~~O7Zhy1s6s;54TB(!+8bq*M1jt_N~H&(}AnBzt+ zyNgP@ykD{Zd~5>KJE%@Sv&-);v6HJ!;a9^RBmDvjRMevZcDW;$*@u(isDuKut{)j0 zx$dTFS{HOF`*=#=qKh75moHfN7`*cf2s041y(qD<<5DHg(3&^$<}rt!1z9T>4Sr0)>TvJJ6Ypi4p+(zFC8*!zH&Nd5Gx&VU7b)Y6gYl@vM7;9!u{9|B0k7JAbOGX zP_zAg=xy6~9gNC&y=BKyEGsOQ6I`njw$cG{W^nQvAQKCQ|2#wopwq8pOJLIdJK6Gu zxwW)dpxHR*!3KrD@Hdt47KsV`piBouY`29HTA6q)6<&@@raas@BZ43153tLErU01q zvhNp|gst(g=EhX~cKtlyiHyKOD}X>}1TL$B;zU;^zXFOXmuLFm@knrKMH|Syv^bvh zzYH{s6LC^->Shycx+O_rbT0~(!`E9(NBsRdn3Qudlg z)fOI+5P2_w>H(@wpfQ~KF6!q%mdRap!fD0*!1PPcIKXPc9e3GhxX7FQXicbJe!dOs09k6R-wo&=A&D3-((K@y9g z5ZnA39z``ARAc}rPX>;k0h}V49cp$Xr8u+U#|Wv&Z(>F{Et9!hft7|6e0H-oGRy1I zq`YJi!3lYqMEc?^Ql%roL!yjQMaqw%3b<}f0{n4`4zEB&`O4Eo6=coCD@@Z&-xUX~ zI4|SeTxBH$UjM_v629P@TuZqki?z3-31}`7FUZ?QlgH>()Uo-o=JcSygf^=`V|$7C2k|7@E)c>ej8<+j_amKs;^iRP|qEymN?*6F*N zXHf96FAiJ97(Xv?fp9#o@vT4RpLQYcU3cTvwJ*CDrMN?Ja&M!S%YudXP3st5z5kW> z#MJOp#!c<4^FAh? z-u99joz@Q}HJ_`i?+sMyDpU6FvvUsYKY5?JWI(rVEdyQBKc4hWl|bG{`W-9MBI_$w0zyRx0c=0n^hFY$gs&9eOHY+{B8D480N1fe;JC z!UpCZs%X=Nt~79^T!1TuVj<`rSpv9JX2GR$A6zP5c1AjRoABS{?dgLFKWp7h#^fiY%SeM*W-(Q$xDGALupYW`u~BT9%W~sFLf2Tl zh{`Kga4N=>X$Nv(eOnE`mtlg(p$vlRA{#dv{b_#oz^tg*V(q~0v}s?W-x_iGTf7UC z6~4*=M&TOs^ag>x9#@6*_xCDl2cADVKu+{4IA5{HgL;GJdtpshuU4&m zPy470UvD0p_FO&?zFbwvL?em1O-d1=+oaJo zQeK$dNt6wR26rwazk7C)beC4$j*IFpHMtsg6h5e_bBV+3vFo2KH1k=8Xxgz}CUQfa z%~(WKMrj@51AlUGYZ?f45%XROOQqNUSbK`E$9(e^mYuqueTka4su-U8`RQdy9?sZq zq?pGBiMU7g?YOI+(u(ZE?T7a5RW92#*-zC+?qS^3G>GS3#&jrQD5lQt7OPFVdYN=0 zvUE`yLA^4A68a&l5AowNBm>z3L`zbvzf=#d>hl}*(uY$d00=!S%mpCykkM*M;7ca; z)=NL`_VSrN9X6STGA(3$TXi(Vt_Uuqs(F~Ljnilq5-zAfUS?T5YC+9KvHk#GFHnCz zs~OvyzVHc@lOjjLJfH(?ENX^T;6-29(kE%ol<`2FFqPop+Yc6bEgE#I57cM)?4}E- z3++P+tnXDdv)gx(nvW1X6#tN`c1YdUY(`!dL%Y~J)PsDA`BHRWaz9QRF7hJcB2YVG zvb4z7i7L(VE`tIIrL)CSwVipCHHJ1a!6!&Q<}#Su_~VI>B((qzW=$K<}~zGG9RNqSDO_hO-_}2pG=t!*pWbUQtBi z&@A=}YkmFbQL(T=y+};5S^M!?>$?EWqU?1=+Q(!KC(9=uflgyD`NPjkUIL)iZ zNt}MF79+?~UHP;d{(RabZ?yM$afh>7oQFegA8+Ziu;pI)Hr73h)_W-NEtc}(0!?{} zSHX~rrv!TIX+)kBr*dIl?F>hx&;w%-mI}udD?kdZ9}UasN`~JMkrrR>wg0%-t9h$C zc}1;jVmuF`TsFmWO}Ju^G|k%B_=Nma4kJY$TelleRoy~l{qTaz_*f*-vod1y_Q`in zL{>6wCBKi05HFihs*m#!uRsYx*H=5#G?23nix=Mdtn!R6SnkNP%D;NSf@Q{vAn@HW zD#T`fSP&fvuIMRJR3XO$xdl|RlkcYD5cJxQ)k96+{p3`A~KTG6e(*OmC5?!NSWF847`Z1|tZ*LsUMsnRleA-|a?L*hnP8+&#+Y zIM|_(P^|Z z%g9M>&Dx$ts!;qwdq)-mn5k!yIlcv|&;25qtb zBf9f{1KPU55&n%GKI{L6GsO%;X#PY^V!lCW{J08p#AegaN8w4{FyI&t}PY_Qnja*O8{d}-M{w~?# zC0hNY#h&d2$_#Px#wSntGV4OFv)Ng}_ll?7Tlr|cE-G{FJ~hqWV|VIC_}*_XG-+&H zrdL}DLJAxeY5)7az@areor<=_PXYLZXnjD z$k|MXO2bFe9*>sCn_Ty8z3bWOEd=-_?vKgD(ecOK+dbdYxHQyS4NI?~{wfL&la(MG zJ*BIYlb+v)p(h$_ma|t?H95{sKu4MdJp2Z5K~vT zu=6#j9go`Gop1EsOyZwhfGW_EvJZcZzS+-%! zB`YY&GMWaQbXyJA4RMJO?J$0pP`Q=kVaK!_D*ajL5;y)f>#Tc2OXx6Hd`LqaBcqC} zx|pWbc*Fq}K6es(@~mHAySVi^57pWi0asO7McQHl)mseAo%eDMuH`m%R0SUik<^y1QyirPIt1Uev;`8IiqVddHV{Uye;m+^;~I_L+$&mrOzt& z34_J`UYUM59&F=V?Xf~^;D0IHL6Sc6RaSbzX#Z-q)LDK^3B4>r<6+7T-~(4S3j=(7 zfO+ySzz2|V{sJxqpyeT{+DPLY+e|GMpgzV^%_}J_OnBp>GsXd?^(AAzOLoP?3vs%p zt(e`vem_km#qHmOs0OwMGgxw*bcQ)iC7|}e^5lL)RY>lf!!&uBAcHIJb}O48P8erC zEJUu&dWJI00lWpAC0P}aCkII9@wn&r@^B49^ZF+=rRz!GDC(Q|j(^3yD`sZavM~q^ z8Yz2Iq4xxrtMc(^uNo)^QD}@ZOmS$r= z-6V1$7PRo8eeMAjz<5$%0eDh)p}w*a#vm6j7Tjxf^|d_B%MBDZQs)brE0o3F>VC>g z6R{kt3(lPCLDyVqEC9-4&GUDqEVfVmu6Io=#~Nh5L0??6}o;wK|rQ>qUgOmahGTfgpc!h&154a&`O{% zWiw@1eZ5TCtP!o@ow115tT(6Ot^1h{UB&(X%F3Up^a=l9Uf!{r!s?*i2;u&F)8Pcte)sN<>@O0>txxfE6tTlz6id zPl$XZRf6y`ayCx?qqTI*^GX;W4+rapUl@v#2jk;mVvWG~c#;4M9x-awT8U!~{9Mi% z1{v?^A&p=OG;T#=8RG+3Z)mYWJIexVtje^iy{tE+F8u|#W?bk!!S!>Ng!uaA+O(0` zlfpM<0$t52F`jBturan6e<>go;=>4qn~k>4ylu~&j8p*PdmyfILhmpmk!15LEw93@ zg@ujccJJq7^4`&+d0chYzrGDdYG<*3c}?aFi^~I3{$5l~+If)IYXI_k0Z9@_o@jyO z2}Y8vn~z=obsjKz7cMrEMWx8|ZHU5)u8Vp|_c@+i73H zlyB}#5?#ED&PQxd^y2oUJJAc&1LPGSPBZraP{=E0_%y zJd=D1b@V^#iN#!7?ml1`pYw>+_hBI)ai5s=n=vuzqn%@{dD z9UpUxC^=fiHQ5(GB8Qrgl}@YRXCk!`i5-eLNUj4VpIjLFdAM4vO59*Y)2~jv)6CFQ zK{ih><)%n@MZU^E)I>v(G?fi`=a8Q=KgQQwr4RO{v_X{y11VLBqROdR_;hnxg)eMQ zSk_X-$Jlqh9TPMUdA`bR(B~sfpirVS#<I+8S_e|-`w4}5>j{M^fyTCdyZ}ly-gSlp36Qw&%RXi}K|_immVhRU0cf(| zwVSgxI|Nes`9=;ZcY_}nzwXFiQ0zQS4GVkgxu?8OVhN`t(P<% zmI7*9GLi$-rIlo~yg1dy!i5{QuUqK#=3{nfph223#ncX%kzl=QR9FGKI-p$-he;Dy z`3Gq#GpJogK640rA-Cy(R5F@arSfelCvd9n9d@IBGVN%*u!s=b|dE-nz&J& z7K4MPjn&|{F+TyPf~#|S_A97Uk@2LMZwdDDvz*?&Fm)>=Wl*JdXR46 z9&jR^(PVEmRdM8Eg@=m7QM*~NrkxR)>~~M~vu-(jS)1GvjRhQVIUzf76(@R!US#N= zNNp7my}=$@EX)zT_`?GXFenU=Kx4t6z&Z_?Q$AfUVi$uzB|l362DqnuK0SW+%99!= z`!V34fczD5!-;)ouX+p&csHaLMB8_-C6OZf)i%@6)`!K{TY&at6@U zdfmd%gOT1b5(UC60kD-9ygL5{s-+AvS-nT{PtsI<(!ED6n9aLbq-yhWTr7;%Nl#id zT{Oo~O19D?MocEoHR^K8+#au>?pT~3m(^NM^qy3tSrG5rUH9G*YVIuCYCw~V=7YpL!mCIz508jOaBcVeJ3qbNVwK%7m?X;M<#=W}0nI?Ea^-s~Qe*{wg zkDy!sfw?{)=KRh2=)VU;m|)R>fab%=23+hpe>1n3Sby7F{R`VDJ=3?^hPD9Sveo;0 zVifEDhJVDw4p1W)O2hI8dwr&xD1d(n)9C7(-R#%jJ4G?F{%>@OOut>M*h!fG>aoT2 zpSV~7Akf^@0vt12LtTB7f56=SH>yA;4yIqkF>uJ(enWyxoB$mB*O;4;m951;J!bzK z0v;2v{)c&xvBR1e@JPEM2Qsk%6R?|h_y5ff)VI~w2FFU@?C%;F;J*B!<^OA-jpZLy zihr>Ek9T}<@0QBArU0cX39(Ka`Ym%$&TEX+z-~!R&N$p$GIf-#J8@i_^bz)41NQF* zbpyjN;5ZN$U?jE7U(a(oT39cnS z97@P|nE_N~)MpN$s*v*5w_WiI=4Sd*d0)Q}AvM?-62$f$A^NPR?5N}!ub?@sX>6MC z-K84+BT)5`=q;}WKNgv}-rbDJhF0Wc%zX}=Q36f%$=Ng(Ah5H9?`P+!o2aOa$i*0B zz?|HQpd0kCVQEmKe?g7oCAj84jJe$*(eP()PZa=#BgxBI3NomStxI?s+nA=|cJ6bqH2D`5?E zrH{6@P^4v=SXV_3b1O2iBGMK9!Q0khd;%F#4FX|1@rP#vQ}wfFCem(ogiClUT#KHz zyU#RQ?;s>UT5L*VH8R^Y0H}-% z@I0|^{A^~~2H=*9z>_zJVWq;ElM=+A_buW34CeEE)F*KW~=2la7MD{5#q_(5l9YdTDixz)fC>01I4h|y1;e&*K z0FsiCTt9FG@iKx_WJQ3afHVSDgp3s2X2kB)91}2$NU(HJISRv7O$0dHJAlJQ0UYj4 z$*J#2a-wEmr;?_oZSzNnl=uDEhQrKyZkdxl`9NQ#iCPrJGv}IQs-WBj2 zr8jCNO9X1W#7l;%S18088tD6nUq5S78&2d-IJ{UcU+pH6|5)n+qd@h%IBd+w+QPm? zALZRbwKhrhM9WrE8q->AB>!9T>gFl%_1%Q1ugo%JZR)MKY-h(l(X|dz;jcje-;Q?vs{&q0S1=3bVzQZCI8+Tj+Tz zHuy%$KMEB$I2!H9vjFjzg0d)?-s0sClTRBg3duX~zB?@`oBf??K)ts2kR?GSAx=%R zG`DwqJ3*ehze4A8<=e;BmP*?Bw+5U1{Dw7&I6DU1>_+^#FZ}USUC9sa}>FATGN3r2QHT5l01@K)+ z5(&oW)=vGj#jH3lM9-AwP5Z4vAwI&JdSP@s>hR1(R=JSl9PmPwVs+n0c)5zT!`t#wN8dI!<&2Ky4xS8Q6xNQ_XKT~4H>8;Q_$^{Y_f5)kE5UG|mn)W~z zG|R03SjU3pQfTG-wQ=Lwo&iN#GYW9h{Rlv_!SB?qQ76czS?{r<4^ZLgELlVXGV$H9 zu+CIkKz>+s(IPIOAu8k?1dl~7#`4S9RZV;u6EIG-?;jD_$lQ6a1Y%%vLB6b7=aBO! z185i(SBZ{~aFk4hj<;6_RFobyo|$uBFo012S7u|z3l0nK&H5ouWl^`LUZq?bAr%ZWr#At0JyLYncEUAo>|7M?fMi4Jxj(K4_$+NVVx$~(08&3*2-Z`c_ZGmFd zk7oRO+lo~`>l~qNK6v3p^W(zHEc!z3cuZT|9YFNjad%o7^y!lFGxLI3K-8Bq&aDc#Tl7yCu8_rYaH1f-#=YU$bm9ldhEERX}UuuVA%)T zP?3~X`|x3JR;_%sZ2xrT`}k7Fb;!!dbn!&DvguCqw~%q3#50PmM43~vt;EMCN~OoB ziB0!xSa-(H<9|$BU5B2v*&%pX`x4g6fGihDJh}5UtRt;C;$wkNRojVjHE?o-RC+0- z!eWl80f7v@@YqW+jnvS1IUz&&K!~{n=72O+N)c7Aij_pIe2Ox0y7a4Z!HG03Qj46k zaTA2$q7>mDLz4A|E6L5MN`^%MGo8 zwwj)r3mKKL@tl!PH!3aU`p`0dW4ZCOTAjGhB@CXd1Gm%Mo|FJv>Lm+a;=rm9e@I=3 ze?|>hej344XO!;SS8hQZ5F+Rm5!JuDdjO(FUQ& zc~pQMQ4pZ986G9|u;i8>MB&^00b~e<8a(i}l2)P80X|v(kGr!Di)!oJKcS!kA_^!B z0tO(>5JO`iC4)$VbO}RBcL>rAk`e~p-KCT?ICMAC-Su08=bY!n^PcCu&hPo_y)GDL z?-};2y=TqZvp?(p-uGp&VDyFkF};R><;6DaB-h&@0nkmp7Ff7V7Gm@%bjsK!xmtlF z!>%g>+t3`gEZ3sccKa$f#1z%VWp1Kf?qP0^QNjBAtva89mwz*B6C=Etb?}NW$v8jd z#+Rd!LoKWqR#1x(nt4KSUej7q4xG*cbTXJF#5UsHsR88|F4xztT;Vlq z!+Ed_-OrI3NO_}7WX-x`e1$i96LIB;eLahAdEdcJ#4&VZ?eOq@cYo*VROMGEdAo;4 z^|5-6@og6e&$^j&y`Ep#$3ZeP3Zjou84|5ts3s^4miU?IZ~0-hScX zoNDZ$Q~;DBvX4B9fz^5;eO!F^^)y>FkdTQr| za;tM3tL4RABV&e*! z&s67c1+#JyEA96(>2@IT3Ca-g_Lu`4lxk>I$;<=AnQ@d0% z+jIV$D=a&e>AsA%jcN08a_|j*Wxkwrz!d8|6jOU* z(8*oRm{#TQfVn1pRMC^2gzD0wE4m|{_W3;m5_~y5YUE`JHsL+baYvYnZZz@L^j!71 zR`bk&2Fv8#&_WNV*otKfjo32!>ikz zR}Bw>2Cnc|oLvD1^(BKXIsX=({Z$?He*~WWFAVBAey`Q}=kSaZRP6nNsJPgE0UKNZ zyqv?1zvmhj=GuRt8Y~?D9dQ#BsMY=oTcE%X{(k{mP(1HX+>GO|3c`O_pTBo+Yre0mM zeY57+a<6IaWH#k&Y;rs1JC(-^6=A%GW49N+pMBX`vU-2rtc8F%TlOYiWh$-OllQy* zZ`_AuDjRLx6s9GJOA!tjqbCh&ODFRc51p^vTw+Rad3&29W5~~D!Mk@pxuM7Q;CO4a zzp+#U&afUf*+ilp07V}k$7lHJP)eP6O5TKVjE}=gkh_ldaJ<%#H~Xlk>B+LTaUg_s zI(YuDXvK=GzaM&4`x3`NyoR=u@$KxT%QO6o2}^O)#L!^Ks#&{Bx#Ma7s7=CJ-A7)6+7ukJHy7(kWuJ6FpFgN*#pmMonh9M>ZDDjIbnEMKN_=LkM$a00&kWYtW>ymyLsVI6XoJc4e3FPCK zDe}Yz1%vsgSlr8(D$-T7dFUD$l$CkRcgN(*vAy%ITWmO%EUXumUQ1KGJ}@+&gpCe~ z+xptL;QIR8mm7NZHxiN-WTL({c8f_s2;2oOi)+S5L9R5H*QV>!6gzK=5%LNJB?`PB zxbR|p``YlwgxFkGjXoO+0v9xcV~?XOJIiW=H;-b+gza?*=``zKOqDAZ2FT^5l4a;^ zRO~k2by9qrRF_L89;>Szp;-r!b1>Fh#J4%S@RgsYm?eADy_@fqi}7F}1zz`%(MH|O z);O~|e!Q4_kSp_Y$v2KLNDNkP(2Ee9ZyS9=+0BO?VY}59pLX1|KPiyisG7S~d%p?o z0(CeUramVf)EO7s6Jl{gqxwM%x@vu&h8oqaxZ-mpH!WTd=W#Gx-oZvpT~FL{%Md5Oup|Jbw<5X1h$jC@B-jP(uPQ0 zP#XprRmpFx@REJpMJ^>2Iz-zg$Tm4WU)Z}RIS2WWsXdZrZ0u)zzjY>2k(#ER)m1D4 z{l{C~eDJpJ#Nlet*s!|N`J%(6z+FN>gKpImH_Uu`@XEiymfT!%hB<&iq;W`*DS$sW zQ@KL-fP4AtCYLxcDR_nQq>*%tNS36knE}^%EDg-AaqHq&LGgvmacCV$&CG{iSE5YB z%@v>H`KqJD;&*^p92g%k>N|t|*?@HH>ngrY5$rn72Xk-?2F_rAq7N@PH}7E8XgKxQ zUffuVZ==OpCPbF{C_SUjV$Ux>tb1EWKIvY#UQ`m~YUVdH@@};;K#@y2m->xaf53ns z#K+6)dKn?>i$lW9t^iE0wGhevu_wp7I!+&RLRJh%`n5YXcIkU6kE%*^ zKrlht#e?)4U4bB&U`OkQX#rVMOo+}{yHX&qr@Jsgt0zu;*D+|rO=on7i@u(sF}roz z97nc=UeE{R5(N1z=u#8a=1(-v#J<&J?T!~73cxGsa*Wcvb4xTjZh(QoMEss&byA7M z{B;aRe|QZeI)4~>f}+OMat1-~qREQmF8jQEn&`BrtLAsA+M_rpHk@3{;__F>nUDhb z(s2k^oN8IbtZt|3C{Ky5qf*lgqpqXAZ6XR56GvDiX(U7VqK32~R-3svh3YOk zty@V(VOyUqZTAYA<&$0%mHX`NV?cOkR6#^`xAMtG`n*RJlPE#>MOv+VN+I~oMDG^2 zLd^n7JgRSQmVrnN{g#ga)r$J1m%&~-w)1zf8m~nVTOyeX*Wd4c=2$3ZXQcKLpYoai zzMYvWCYYB_EySRs7Iqg4=LQGuTb}a}4_qJ1g1JO$A=$n}@8%dnsA||+^G;0`NPLMEAj(2my|MGa5$ODi$#@AjXM?qrEs z^`1iKiR-3OUu;c$0=qwAjq!`=1qViA;|g}J8aAF~+;V{N~CBf} zTlK$%3gk&OI#O{Z<6jSqzW$)e2slMmPDPagr>N7n+Q~w;JhlzcVc@~MaoV^7;O)F}g#27hBP+zp^p`mtL^~e{nqq_pSS_9~_%mORu-HmcD9cHBQ(H*NKLS zD!mfbU?{NMa1{sHg5W(!VT&Lko)imVZ)JdN@qta1_gkYpgDRblRuAPjiAQ%7mrXM& z;`_{MMQlz!S7cW#@e0HvRV9}$Ej5hpFiu%jEG>lGtE92&_i>%K>G#nb`%n=daFV}z zNW4C>$|H4B32qL~7adlzBds06!cO$FTnhW*s?}c%Q4CI6?I@INzW!XcdVB0kvNbO{ z!C6PU)z0jWmwHN>TBU&!3l(b2*f%(}ojV_??BS>t*Bt|Pu@&Gj1=50n%eGVWrK zhcU=xf(q69t=nt>C^dl4=H~_A1jyiyJrSyVD8;QuQfujVTMA55v>bNPt4YB(+|)fm z`i1yS@!%<03#aV(q>&*S@eWObi24SDKb;OU1)b;`^_{;=TeLHm88|n~ZHZ^=ox>y* zjvCOHQAr!kRy-UE4a~;Do2|jM`??ESA7SzhPs}spFRl&I;B0~IUad3dGixKM!8Mg# z0UtieiOB0?)n(P;l|mL(hwH-z*@Dj<+4~>HEGfK4_1iI(97SJ8C5t#;+x9u0u%pm9 zo*U~Ub3ANq8Jyso<=05|{xsKlj{fMydG`M3mh;7NgvF@5qyH0|;G)UTb*J5$DVPd+ zT|0en(#QSwo5xG5k_LTe4;@oZb?zzfOXn<<8e|&6F8h)lq@=n_N~JQcGvR!P9qtKO zh`N{fg5cP)O`$VuC#sQy_8c<-ba}ey{w=)gJC03?{Nr~HGJf2i-Qm*`>e;#-w&N(G zodh1RBA!g>_sc0-BmIKV%NrRzTgY+#sl9DbOi|;egW`PKp%?{0`-y~Cb@8Q##VQ{u4 zgrX!6V-*82mIV-FfzRsZ3J_z(0WlUIN{po(BVGSmjBi6FCY}gB?eFNV@N*lDBnQ`W z0zn}-gM2f)H&!bMtW;rUW7mLzRXz7R*j*)RV(vzRK^wTGKR_C(GEB7bCENqKHl0sE zuFb`Y5d4jy2<-*!ZNbW7&h*`(j{afLAeWM@%jqk}ju_eNYI**V`0I;NI?>L#3`&iy z*tU15DJFWM2Tp#0n`_FJ{t0f@%Wrin9bNltiCgzm6;V$y2E%rhvunQ^L>&04N7$-8 ztTi0=NXiFW`V{eMdjiO~)-Jc&=A1v-3ZCcRkH7vzR-iUR+gG>J*;PSg_QZc{6J6~# z5`<#59FfegY-Y$YOlN73FjGtjfsbz({`wFYbuuX?ih#ZS6My z9kd)~fus-5)Xv^vBt~v4^CYES)0>=rHwAuLXfFl?&BsdbTM_P0$@qe?Taxzpp2$Z@ zo+L_)c$a5DIE$4+_$85D1N*h~kCPn$ zAXYX`=>OcLUlnD*(dy5|bu51f`uqO@cBqztqxHKGLQWW}Wq(^UiLgM)+z^)LnwAJt zlfNLc|Be!mlNHrAaD*sXfAi+&WJR^@Z}o1Lw(2^XmYV7&S{8q57!3CNhW#Cb0*3^! z4S_2bmO!0me8o0)1(2+#%q187JcgYVKAK60~D%r+_^FqRgpM3OmPA# z68Sauep0AL0%tp}@3Y4@;}a5;BfV7vZOwWUmnQ^0lsx)Y)@V!uaFj>pD;o+jFgT4R zSauII+j}8oT*5X7E9mwdx)C59G3ho60o9%(psN4@Ne-Y85JbOyUxyXu#neSX+(7mP zOK+vtk=ubcQhFCNV1I$7Z=WXt-c>=yEtK%J*0*77*1N+t0n68^Wm4J__8fN(Npn3{ z@|*$<0Sffk82%iK#@$0sK#Rv9EtiX@#Byf2D$5dY!JBGs>c9XwX=rvwy6XOmlFn@D zlcYM~`N}R!o?1MM_4@l}+GXqvsCY!7$4~tEpG0BKy(tr*jEh;2`7F*N5@?<`hbB}! zCd)XtZcLUg;68mx=zZNG65exvj^*?&TrXL*eF3Lub-cLZ8sw>a-Fj+MUVahXYdk@vC>xi|r+-h)+;{x)=AwRyypH7}|WBd@o z{RxQ#LU$;q2~M5)W(R3gI>`#}MpKIbUL%%_u3yK_eL1E%Z8%`yQmzJ3JKE5(@5|dP z{&>RYi90WZ*t{iTnw7fYrg{RSvn*=~_wuXhgV*_Rx4EllGS;coj7F<~CMAQJuTNWR5*rkJG5+&*j zwHsR%yir)+7T38qyQw=xo!^9uI;RPN^tMoSw4rtJEH`z7-ec*dKy|bLxpf?kQo=@N zqLh#ONmGs&Ybas+7ke`IlSH_#@My4RPRK;+1%yyBH;+*mrFH(pYHG*!l5^bCf!ofZfFniuiWgT>L_4 z+;Akvw-4dM@(O3#Uo``2%RD-7!wg>;1xk~BR~>irxOWj}P)$WSH>K}7{@N#65B7Hj zILRLx-+WPMtuR#GEMkI=N{d^BT+noQ&gCW`^(Ajf;CS}>9eC|o{PW>Y{Asv250wube{{}S1e%*@ujX|^$n{Q?-}4^fE19qUxXwj1 z$eB3SZ(U;h{g9;m3kTH z9g%mDy*3l=464Fmd!>p9fBpg8ZHQDrCUl^n;PB;#y{vTFY7LbD5z*2521%>9!=hPN ze*eq#bW=XVm>E8I279Nnx4CXpeC{lrIBvf>iK~Nimb>abC zbu)oQqgly%Oc*eQO&nDYM~(FiMg@_{z(PGmd0c6%{7*kENt?f37bOWMKi+^<~a>jR{E^J+Qq(4jaK;TEH@X9 zmR5Nk8lrGFaqHRs%NaW=G`gIp@cD4>mU1Gke7?Y_Y~?$^kpmB6N0pn>MlZtKuI)({ zvyn-FFkzn)wn)vxiZRaW{a$JG!(+}=!j3&hg(vy4Ca3Vo00Z88-^zSa)siRhxp40< z&z`C&1%QoFZ#}EGRP#w~qbCTnqtfEZc`7>>-n);Gl`G+a00*r5U6tkm4OJ5TS&hqO zXRC|yg7^5yEJqC%qC`MjtTM7htKt+eyquDU_DRKh8>yPO{>Azvlf>pHl8Ce@^k!`K>gxfYs$8_Fd-*TGuym)lzt#;5 zOCG?d3J3U9HL{y1d|9OSfwU%RqGHSxa<8E@k)DXyYz=Uc-nc@i2$UXXKjCvfL#X+%jGs^mTE6v>3d0IW3BpyG-i4-%myT!UCdB6ZdhWAY8+43sM7Ip z46x36qV`#i!6N?2X74mfVh_>|ixz>^MS7wAsm;KBqYJ1gGc@Jz=lFfN3zz(zc+7&= zywhE^zaLn$L6DgY5(Jq^Of^~~2IMz!{P(>4ws|xJFQqv*GM&`x;dJro0e^pl|LI~WO+Mb zb=I#RhHr9wqnB;DbF!%}moyTiG~|-;u12m!E-7}u>2|oeH`kF*xcS{FA^KU_RS~(C zG}j7n56Y}gThezRnf~qux{Z9xLYIwP%R(@P94!sTX=?Z;+EJ0_(3NaNk+$yg$>yYtIpK)(mps!(%0HGi z&n)_}mY77fWI^c64eOJoK7Y${m~P2Rxe%%xmRFh~6s-)-_45HdCGn(_lh<@jBrL&6 zZHF!*f5^AzeOZxJvtv9GgEf?g(Uy=*#((P8NQQVII@}x%OF?win&{V zJ}390&dE_KHe_Mq38YF-m{jj788Pt&HVavRZmA6-Ie^Mm+jXl#s)-XX&(<)J3`xZj z7_ALeSSrwB8r18IwaE@Ev+KWv_fyJh%vLXZ8kBtFIhK54QNx7E`i9 zc(#HcjXDPiVb*slT#}~@7(@muFC~8AW`E*ts~-pqr=e7yCjO;)N~AENi zv!1=iR-34XlKR&zK8A1NXvL^s3qPKc5+zBvP!k*Q7SOL2W>S*-uhFKND|IR~;Upk<4&(U^~Lq`wt$mOs+UifS<*K+RY$`4(zXdZ;yU# zy`h@Y?Zp0yef3U)mB6D5BQ63ckG6TtJ1LU96p9$D{1lXe<2C}1JdaDkb0_c}1YDI1 zkdJb)ZFwp74LY!=iaaamx7GJ`PnJHbWR0rxc9mwovr%~W$?lQ-(eU%*ZXD;7;^<13R!`30}2=OMtt zidBnMNEn{-&D)oA;dy3_81}prNLmqtrCvA?c0qb`odg&k1U#sUdHHNt?Dwe z{1HUmB93IQyAAV!3@2$ShtSe|rZ@9$hLb?!XlZ0*izuKklE?fHZbYrjdJRe#;L0*hUVJ4 zBOW#!WuRja%CiNGgN>c{?S4I$fEu|lhvt|w(v_F(6j=|HsHx8#X;>#M6ZkO#*Fu>)P_u>)vw3^(cu z4PP)INq=Sy%qfmcy1j}Pa9I7S*~F@PkM99kO4BCSlPYLK6cOcgYDC+f*!$hgIL>*j z_IWd5o>|J7D*TKuh;EGT%rx9Z^+5g9OmeoSZMrBZ`NcrSVjkTqUd=zebY>Us!hTi+3}4Bo6x?-PVL>0ADG!9mT0pidcWJ zAhLktuEY%J)L%LK9?8^!PW=>gY8{IoL33X~r+%~Y%YhBS?oV8;GmYBEJMc`a&_U-| z#N(=;fxPx!;JYOijeU=LOQRkhZueSHh#YsIFryN`hBK58OuR$uE1E`4ObU+=a``^lBBvm03wC_=ONCr4m|EovL8sRD&lN zEqZuZ_{1PU?+_xis~9L$A&m%!%k->h;mN>dU?o$SiyTP8oakgDlbePhWcU;K1HQrd zmaF3CAr$N?6ipM)pRL2N`g+kij~jH4_rndzz?sdqon6<0{joK-`uEhGcf6E8|%A@{|@Ie%r`49GG|HixRpYTCW7U0K!j=Z3p+`mYiIH5qT z_V>uk+*Tcw-~AB}{=vNcpF=np7ihX!&4e-3b074k&FLJ;C8LPfR*n+Uf zpNH;`;yxH)jsL14{#!uE0%Q3jAXNDsAT+U^`h?sm@ltYhBjpN8dqqS&dLpI(78)`^H2NW4zz!sN=k$n5>_!<#Sd-&tkI5+nXP9$r^ z!Uv@Q&rNgZ8qGH^}QeO~4WmLs?NC9Q9e@ufD@}Y9s$l-;YE>L8d5InVXue93GV|Y&(@k9jP~3S zYe{PvD@jFOHtUCqYtXem2aHoEgK8m{?@)$gquC=t7gH0%cZLwdAg9rF>%N-evOX7o zs{X(`Z^T2K1Q(r*@%?Cw6EqD)|TAe3S}O@g>Kt2c+c;Squ&N*bGdCO zU`}g?`|G9HEYoc-ShMd&o^knf3WP{?En_oLQCd>g(G+E$km%8`p%2rusbcfRZ?c>?s*B3azY7~tQ_agIu6Q{j7DT)s<a!=KD0#PB^Y?dQ`;=Bn6U9%+<0AT-$)ijb2P2p?J46I`}}$+obvfL`K6m3@oD52 zMhLLjJR)2;5>+LGg05_h5g*yL5;Th6&uYXjTv*%lbkc9?HcezZuyeL;>@_i-f7fL9 z97CoMla_qVUdi%5N<<5PI6 z$kQap%z@ybF(q0G5#De*Z8AE8K7ZL$|01bq_T5Jpdxsdq)#{jJKgmr?t&|$UIn-^0 zNA?-;60R)#xD%9U`4s+4q&_z6d-w2&E~C;zjeVac>nl+af!>F;N%yp*dG01B-TNfX zg8_@ZlJnNmDBvkiAVI37ibbCOQihh)phD-A&1#sCeaR(pFB9%~t~#I&x=MAsqF+9F zEFzFxc-0GyQx4Kc`l)CzLdd6qMe2Y7JzCSpES91lzV!jgkr+;PLpJ&fWjoYWED&&W zD2H>}EWp$Nx@hOt%U@_h^K{k*O9X&+`+A@eo4k3K>iB{xy}LuJJgDxIOUJj(#GHUx znQ_e4N{~+ed6bDEvfI{QJ2`-an_aIyp!55B+Dz1kRvB;FK#*Am{h|**fEj!sJms1k zaFn*Yl84uHK{bB!3p^!#Qx;sFgLMY&4WA_#gnitL{O{p0XD&WA-@%qX5Z zv|{c$wDb-ZZwY5Hr44aYy^WD3&5(zBI@}WNk>W+>uwswNN!Y10w&e14QWh?=w zfOuU>sJe6)stoC7E$le7axQX)qvn3iG^z~ge$K(gT)Y~z^!P+vlw7Cbe(ptvN#-LTD$5o#Dg|ln>Z+MIK!fTq*_9AOg#wN#j6!sJfr)roZ%BR#a z;|k!WI`g;+Yd;{O<_`7-vPOi5~7&hi4zY!4GuLeS?;w^U^}Q=uq2f z$i-*K1*7xIC~olgcJIrh{=t3i-Yup`~rOx+> z_H5mHlRnRJ6Q{JAjyTF`hvDtKfKslFUvA=$i0K7wm^wLR?7@&By}D_}{JT26a&$$u zG>EIn7j_NwW_BulpaN!N5c5UY^WrQC zTorfaz9$}D4U3R=!e=;`Gf|4MuE@1q-PMM(F}6SWRCeElFVa&FLF2?&U2`QaUvWk0;3nl*1Suw4_IWJdzq zHNLGF#Cgn~J0cnDfNT%Vu(-g%)u=!x+Ml!BP50Uj2KV4s(R|FNk&|p>tl(Nbxf3Wm zw&1J%>+f{0Ar%6=TQY=oOl|xX+_Vht;mtuY@QyfcN(A%OkmX)SWX2~01(gI)P{q{S zIcsWcwB`diwd!BGp+qV`bR23d{VSZ(f&6B}N@`d#Ea9`KE( z?$$NaTgAHU5oTbL0sp6NNIEG7X@J=zJp)$Umk=yECu5l*P^ zcl+ujJe7OycWsB8QRFQ&4=PnyM`AWz!0y=M0ezIdE)TuqPoMl2`r)^`Wf=jXc+_q%@W$IrAPLtAq~uf`e24~Q@lbD)P)AjMH&IoUUK#|dOGk+ z4Ss*Q4~Yt2q~roA;r?%koI4qFsB+V5a&^t z2IwT<)5&V zcVU=&z(h{@;1D;Wc^?1czATk9Ycu`3eNeV67rtK=XLH?@>a^r~4c$iAe(C4>wb4ou z2ZT=o?uMB7vE|6k@cjieo5=k%O#vsL@rnt7^m<9G(t>))l=S`)rs6La0A^vDM73Ex5b*+Et)2pq% zk>f0`B#-F|1#hUms@x8rzis{TitRv<@0KniJ-tHw=OOpD*xy%}B7<%?>=VhF7#72*cslRa`b=Ha1i5%t@2{ZF*Dxl^?)~!W5yFc_Spidxq4Ek zN01p}RGZzYtcsp-Nf}j5vENTIrHYla1n)vGn^?Wb)@?^6gBNgoyeHcSiDkjZ2eL z=OgaGN|V3MN9+i+f)ay%Z+4T4Az(Ifb6R|s9BKl${-{wkjQCw!3OoW}i8631~){LVjm z;j{d~qU-;I6tetEy#D1)2ZR1c;-zD5t!{1#EX_eMJmb!mTH-K^ezMuUajAP^C{8PoKspA!549sJ2 zb618vlA<(U<}2aoq6mi3UMYQqJj1v2^olH7*SFDaPQz=KuROHnx<9|ks8^~5TY7d< zzPvtP5pWz;HRwxArS5#Xy`F%*G%~lo^yJ*ujKYSO@3xI8bIr;0h zlR%WQO=I8XeKIDBhy2H8zBZxzwb`5m%Ne$5Hy$t1L^eBeI3oC-ldt2j zALg*VmOnFs=Qu5^qfVi$u42PI$GC&EayQK0Y`>$P)s8c$+p=1oYJXq`edy8#v`S=7 zZiYNTe$GJ_#%48Bx5{Q1xz||tf=2V4XSMDw%@wQc+P;1KttwJizWVM*qibp0mkCza zH!3e)G8Ms~tu)N&kZf%~dL{DqdYL9^>goG2 zlFTn@noWWML~C^TvAS&?gO`Sd-^~w}O!qQK2#4=+DWwIC4kqm_0l8B5U_suY3T36s z6r{k`Jr8QyZl_Jw!c%Ct8KL>$q4r&}(m^9A%MCW=WwD^T73i+@QdYYa?IDfuS> z=^3{Jt&$nJ-fsjrvsd<9Via9f93C|&HzT;yf#uToNGM!3JLkyJ-$w7#ccma1DUTm5 z)E0HO4puKxlYBqU!Y<}i7Cjh<`LGL7ICLj42p%NPO(3#mv>jf0MqJDvIkc2=>4PcN zF3fX!*zXxv$Tj=}yUKR2K@+%kjY#_45(UOm^Mh@TR{4^(vd7A^?pga3&e?(<5+sk75F=kl$F~i*Q`CSa4tM*DDkRpJ;9> zlEo>HNSk*MmV0_beBa$xHy%-G?!!)xytHWDOq^a*8m*CaBPI~SCA1kB^)o8zBaUgO zak(tqGbspNrYVyjD^W(=*g)s9>m)C`GK0nk*P-{R7hjBQL3hxxre6zTVxhlme+tL= zvC1@JX)-{hCZ|qmofF_?p+onvOln3O>Sb7<6*%~+Q^htjjN1Wu3E#KJ&COG?9~x9p zM=GRj+_=<jeNflZ8a&PHu2?itSh@PBSNx+#J>R! zBrXVxVv9js&1ko+dV>&d`LH!w{CR;lIl{%Gc)Bdw)HT020;{9jl62rzoV!*u89S(} zd;75ahK3&=s5pLQ-UF=Rv;;9zhq};`VeGDq`dBF8Dqc*pSU21d2v=uV)+m5*6@e12 z_5tB)CJ?S7fp9e$=&J;QzA8rI>sRZ%VR_(M4fIqpKuG1LmyhHFdKq9e#}^j&`v`@J z*JU-Kd|-Dv!S3jR-I3Ui}F`K-}-}@~9=c8(%4cdsEy{UfmX=W25I(|ttL4{8$dAwxq`<-g*fa?C1Rw?2odun1FB0~6mnZB5{9X*V2dP>&@Qnv4z-J4Hhz=MuAWDbmkgankKA)WF+ zS1-RQawK+seK+Cu%6%JBbI}MP;rj;zQIO{0Mp98v5qWX*FCTA)vRyq1ag5N9nfX{p zt*KctVBET;D3)?YY)c!Lfs0r3XnxtT=4kpIAv zing%U`bC3nox(8ED$WUoP`$=zdZjAy7`;HG9PmST4A&piZD+GBPq#y*c&sGG{+hah ztL3g2Xkj~-krj7f8CF;6;{R<*Cw3~#*1%9Bgj2p%t8l@iVUuf+hL4RMWO@w#jQpkQ zEKNN(^{2Ww(Z~LoGC$3D} zWW-w$p)Ni)pmAd~i096P-P^^Af8(N7AuNey=K*#>_blCDdn{1UqlENCIY6!VhmXsM z)aN~GvbX#t!jexb^#kHtoa6)Iuats+A==vHu*bh~m`Tb{@LDe*{;HD#xH&*Au4ncA zz*{aY_duS?e?BuX*w&*^!cS?fsIYftqKm_IJ}f)iB2S@61cK%=>oNv=-1WNA8iLn{ zOP74P>JMtKE<8)&tBF()xO?fuE`Q;N$VI2mz2e6^0Y~A1mk)FBdJdK)DIm3x@VrU! zqyg_{LI^ZY>mHqq(b}C5A3pxaaHpZ-Ppl2X@Z_GP7rJ&>i86-Q$D(o`OaD$0*h?YZ+xZN+?|J_~G zOV#W6f?&ctpz4BY)a9nXvtbVZayfl@52D%aNJP+JA`7OuOC=4vIX z%f;a;H>|kvp$!~navfVzkz3b5w1C1a-&3OVS2Oy;0oI{GJmqF9KZlr0ptec8$EDh_ zR4^}4NjGm5u%6mATZ!uK<+1(eT_u~OtR<2Q7WFyqHl+4}uU-qtKgQRm>U`%^ltNoE zh9vwPh<6Rygyl^aPb&=UI&tE^1QCeFBPba4Z{+#vz2w~jftYq@w?Z1kpfP&jyfp*P zTjz<$D%MpgAl~`7>(_W^y+-Vt-ek3eof9G#*gI$3T?R?b`}o4PKu7`jQvk+$VwB5N zbZmvDh5YXZ`?l$!%qYELpmQT%(isDZjh{Xt0vkHJpnip~0zPG(cX--)g;$jWd0)t8 zI0Et9Y}EVn9;4yZ+=f)%hQ!{6z|TtO2hdbbErRfpy(9Tyl;#OGMkpPj5lTncgas|{ zXH99CB-5O%g(5IDYl&*ww3Fo4+DfPA%na&X~Tk1(H5z zrsCl@;JUF>Px7`#nWki6bo@1a_krV@fHQ)gkAFUQA3A>;82ia?#o{WG3kmC3uAp+! zkhOLyjuZ6Xv-?s|vqy4iMmt{(Ex2+hRqOa`$d!fs`=9bvf}csxV$@rfp-Cw*J%UHz zTtm)cJk>4xpj8DPikNj9doF`y@}kbOcp9_1Th?7zn)8Ob%c6+Ach&wQtzAC_<4w2( zlD#JS=a(j-BFgX&=@-454bZj9Uk3Xs$cfeK6rn*?86U~Y<6H~t1usX4LCskV5CRtWH3o(M4jKIq>jeQTc$!%+H(zTml{b}h&X~N z4Vbjo>h;v6&OH6#ZKZCF#ex(~&VDh>Lc_OM=KW-|QEA%GuD0LO)I)sW=aSJyW;k*zGx+;gzAB7G90URlYL^#sRxV{wta zwx<_Cq`dBD6Qe$aeeG7wegjwz=Z*HoGu_@?EbQ)38Oq2&e)DF4H+tO@mE-n7MlF>#f@PatR#|Qm~QvgJk}w>E$7M7!ihk= zV7;g6Y%d}!B;Q{_AteO72Wc5dpybD4&VCLdoqU{U7(v1_XO^7({5<9pvvuE4A*HIe ztO<1e4u124v!gSDV-OsGe?7E7_}}uZzsiOFkMJxML--Fo>)*h*~~cv`OP|u zM-&25F^$ww(U`A|Of_}>qL%u7)#CpLq&eqp=Uj^wxO|=SHjZ=N_8+;{uc+qV zK({|Arv7>3*w3LG8$dp+u%C|joRsY6&<)D^H<=44j`XL4XJw*kgwXqQo&fBx!pVR1 z9-r&s&P!7N^&X$=;r_NH_4l~TTvuBcVf`1@^?P>tA6OUnABAWChIL8*!n)XLuO$AC zbrlus&@{f3uRPia7VLOkJ=-SQ_DVI)g^AbEsUW0e@O@U4^d^v=QJfxW#0`_3mIW(R z`j8|-@VwG&^tlFViDV58jn@_;VRO=ZVC-pU6o^y(ESC$;VpCO#sN2wO2b50Uwq zeFs(gwgp>g|N8#qJE(QEwvDQ6m19j* z!o#_5eR6>UUpV5Lgld|~ic8OCHz&vO*92mX{Z%$2Vr`<=euu2A2O5hM7OEHuHp2;8 z=CYc_a3`f#u$+Sh&AQ6f1&%Gh+&=1&k4vE7Tzfwn7b0WvlUz|W4lrP8sJ%|I@O=XH z5e;fz8FE|fb6gyD!&@#I^6L0%@(fbN6Z{b7YStMv(b~5xjK#&ba1cnsBk%sYyVSL5 zNekafI>eVf8~26WGpyGp_Ud~WXSS(%Q>wFX3j7DTA)3SMn|w#sl`%;HQcVuAnLWBT z)(a=)3ik{xcemFXFeZ_gAMQ?A1ZA;#mAj~_8j~*aYy*1rI4VJn;OdA`@vSJoXvW>d zro4^rqhIJ%Ac|h?WB_^Pk?-VY~qcnjCl9`;})#v*V>0B;mi%)mr6P26DniQ$*Ww1rH zT>nsL(jQA?Xj+E-Rv7Qfk^2ap`amOpLj9ercJ}y!fceAAO%wxMy;f?D25-gpbIp|> zQmq)PG)X>}6TTn&Y%J&o{MyRNTMR)`KJ$CQjIT7jO*v$COmh51lrp1U8^9J134$6S*k#gn@Rcb^QtX7Z{Y45 zB5kiNS!Y9b^<{r6TwrhR&{l^>k%|$=v+f6ndYJ`1e`KD*pFRbz;ebv;MAea<#|5mGA#e!Ltsy=PoG1f}$Q{`;$B*ixk^IB0II6KH8pz5Lf+{p2@)qT${2XJQ_2uR- z-R-6PbOK!n8AwcSqgl4u$aXT)n7IID2AV#ai==Kjntq5*v|cHY{^~@JZz4?i>AT24+Y&xE^?i(f}9$@nRCdzBw^_Eh=N;cI@5b!jh*k&P9Ld=Oc$AW+l= zyI^tZ30`0p)0m)lNtSxiya}{ZP4{oyq2r^0Np#K$atZPcE$ba6@RDXYK~`vEI*_*T}r2ugxxJe01oc6yBtNpc`JJPSIC@ZR9fxMV;)}dczp{H(c+1qy8Qqyj1Zj3~=qdp1cE8d9K0VP(zAq)j8F-#O8E_D$mRp~d zqU<@cL@5su60!pIDV>C5g61-b!h`05I|qm%51v!d3h#s*KEZe@NBI2Mg=qcI-b{g$ zYG}8#KRhte3j<1?`u<&})2{Es+cSDo%mgczzptkydsR zv0=LZ*YVrOA;OL`-WQK9w#S}KSq#I9gTCI?e37%*9Ge|-E7H%hNiEuP zz$n@hPFdSuZCD%p!Xm6npm_sNIO@0}$Wmx^;8&NWJe17UDyg;N~ z_l<~{ZG56;k!bVr$9Az^HclMy&$N@Rrf)`1vIwyMET?XR3g{b_vR0DVJsN_RKwPF+ zjk-uLn{da>aP&%2EBF?AO>7ilrzG!Q(rgvR-t|-DW$kJcmz?7S^KM01Hzu#ZsQk6T+X?2YCsz<&Zi{P#|fWguL4CV=7 zu+#mMOvIMIz`zr1{ct&MAosWbB+I=Wzn8V4(Cz0Rv$Q>95UHs};fBItx?N1!51tTK z@Px1m<4xN)n5CJQn|c5Qf9og*dj(e(+>9gKeyHVr>&mrKCeW0x4cW{A^`epwx33~q zm4e@*I55%7NZ+Z=WHBvqAlv%dO++>cdZ0dEc8$s@_rhSE%1E3-(5 zH`bdF5|yL71^#Z4xc$W|jvjgU;e~RHAA9eDg4m zU;H4E7FRjCQ03%F4fT8UM}kR~Wqst20N_=~8f+&spdF)5C<0(Aqf{Xg08?q2-lb!| zIndD7^qhMGeKGcnC)EbJp&sHvLwy&y%O_^zY-i_e}8MHT%9IRgRaLA_6pZxwE|J31Aua6s%`#mGj z<)D8IJG{#6{Za$=DT{=kq5ZM5v}r&!3m7e?ci(`sf$E|Cse-Z5n_s(pK*GL*L6re(Ga27HFhe9t9Wvi%*}2HjmOp-NG7tx(2t>M=82PPDdM0R$Jt~wU&P1 z3pDT$um9k9T6D1()a!BG7HOt*@*rMq-Sdl^4$7O$fNsXYB%SOhccYJ4RKmV?D?D^& z5*8H=L|~?1&BRqE3<(KA7i|-vt}vvPEqnf zzzFi#{?d`6BBW2Af&DsG?kYe4~BybVX-Ij|18= z3yAChB_cIp>)@2;Z2vTW#qCD>qQMaDwTqIKFHUBC9p=McCZRbU^-Sc(mwBhld9jW- z0d0rQxT+WTM!+Af6eBp*$B9v2B&oj;Z;J6u4_T8`owhFCtAlW?$O-8fimP>NgMs{` z!!Q{vv81M>DET+Ek*XWXIZ~%hB>x?Nvru)*duk|R8C~onbwqK0+k;1sGs5Q*j8WI+ zvH6U`I5A_pl%nh;Q2BTweDZ*yzNW**>?KdYI6ZiwaVawk8~?z5d5BDpQ#1=ZUVDf4 z=o^Ljq2s zJIw2!0l)tQ4}t!~Lw;gjzZ;uDf8rqk%K0}6yc^gCWEna;8tXwg{!B^w6YJ;y0Z{sh zcKrmDem4(;{zSX}9#8@;18D?*h2c2W zWcE*O`|k)Up}*2ZZ`$?`pE~GIHrM~EZ8x`*1@foc$blz zDb53yYl97NLO$lU{gNnOZgH0S!(rZCz4nc&eO8lKTlYM)V{Oe`W^@pj=Jg`Y>w>`r zPit>Rlot)$U#5Q(HC}D+Gi}-@IPeFR zjn|D{zc(s(#KxUKySg|%?>=3OPv3rV{i*TdM>@}@mU3Z}I(?117oM}V zBAX7ML;V>iTSM;%-}x}DC&x>SUtQC09BOKdWHa?r@c7g){P5~vcBk<@e)5gyKOtMp zRH%RyTW6)vX%bVqcf+~AuOb0X13R_JiL7_M=hf)FQva3p8o;)w?cvsSvqPO$8T(BfvLPD%i1dw}|Mm-F3~B zja*h)+6wyD=8Y_w0^}5G9fW!T9*&2z`3qN2SZh${pg{vMs;<@#GR@oxy!F$D&hK8g z=4OVBq3*|CULEgvTy);*IkI-0zhr!XgNuXIE=Y^On04TU8Fyu;kT%BMYuT+RsIDP| zEk8qA^o$@xhhbYP(s35H3(UX0D}*_hCUV}kba)R5IJW8^d+&1{D0KgcuCW)UD$CFT!sDu<8f$3lM~1Vx?jjQe@lIdwP=IDXo))$=_y_*PT*P@U-Q{S zQjd@l2u>h{8E+kqykhyV)#DzyM3%Fkqe*er-S1jNYF)0(?F6OevdCi`@ny@q5yUFE z#FLdc-Uwn9PT&yf36q8K2{1zqBlH(yzF^W%lvg{}h!UEKbn!P4HuOCf!lFM($&xqF ze|Ly7=Z|HRj`9qVe@)4$D)QbH%@VHD7x5$bu@V(}U&@Mu!i;-k~V_Y{0~xmz_Xx8#4Rzy<=U>-e>4 zQK|~14M+*l3u&^2%X{fP?^H==$5fj6j3p#TtOaO2~T1L;z*_e(1sXe-o%EkUAGWV}x59@_{QUn6|IUf%hF_LQXV+dFfc)rRdE z5Kre~0IceUfGy590v~n~@M}0Bh3$8%y10UQf+hz=kfKoO2fN!16HW7)aM;?i(sbpb zhszNIMkH4B*=HmgySKPzMt^Fp;dLt9__7^$IAc+Jz{4FDqI_SYL zTtUJwjT7K(K)GZZQQDv%UbD!?Hzk;?FQPG;<*dD3mFC<`$kBRvOLRbn)w*Yi-Xe$V z6L6bAm0>+VPo+Bk)H}g?SjccBvexN|80-Awo4xsPCydPbLx{1(C_TsnCG=sZN6a%K zOvo@K{OtLf-rwv;it*hTdjA9y@N1$QYE^>HXw%H{HkEPhVG!fhyVrr81jHD*kXuA< zmQ_%ZARUb-uIG@rL|~6=SNlty)jg7>d87aEvDU~j0Ujtcary2YHe0qGb16pO(w>nvjhx7kQW-KnSR$8vI|~r@Jt;FuGzb19qUAknz@H?tT!v*E zJI?%F<-ne8dJjFyCRB=Ax|2L!OjF%kv}#R%sc!?4Y0Y&mhRVxzudm?&n)sbDN~K(M zz3MnOH+)$dZt3=?rS|i7npP7|o#VB^>+9|G)~|dF#F0@qU!g?I9wlroo)5S09&7ER z(>d?2KC3I3O|3b#;lt6ON$4hc2i_-q?>|Ddwhw8bx`>VzxFam z;g|Mp;csPs`)wkPA^9Wn!#bk0*<%ag3lr7`yNK7lmPXfU@!Xn?=WNwRq?!cC6yrfL zK4WKh?T_@E1;h`A{I2iq)gpTX4i{L=ANdJDdWi2|IJz*=oiM>y<6XR3pT2V?vV3so zO1kM?ai-_GmF#+tJT(#nd-WOv?P zgAytxQn#8mNX1|eo3muGfXz9b!E1g3plCB8kz3HoB1^gjeN60Nc2or&;9tkPpU)|9q=;#6SYi$TxiJ8VA-Af!xgR}=JToa=M>bDc-Yg- z7?_$Y;qPCX>-R+iJ)zc^4knsU{_6lKGGerR{#$sSj#czBbvhcHpvUHb9(&*ZA3b)s zrZ5pDmoc$@`N42a_Rk{9SMwZuNmh)mco~0+K^cEooQ(eg{n8twq%ja+D-9%t&U?u5 zKvFn(K$YSmGtAK9|HwQik$uHJj%_$a7kH*1!2H$-n&dbf6o?7-y-|4^K}yE$@$P`!tO#@4yYVZ@r90UpE{?Y)I$&lpUR|ykB_(qS@o3n}a{x@5or?aKNt;_f+ zc-SWbjZ3l~X`;lN5EfH*1LsK=9Ryfnekel?KW!EB`S;0tX$MB3pR`^gi{=5pp>X$< z)VVyM?9@$fVu93qO?uO~`tltXV^OS;;{^)+T@0(UuXPPfbFfA|A!~uUCv-NqJGE;Jc=2tb3ToI? zzP0$|hiJ8`w0+3TS{!3mw6{#?3IOJ63pg7e?OY_)W=wb_>vKq=v#`S{6O&;Sl3!C0 zC9yiKBp-2YJ-ydwE)b1|BOOEOQuEuW<<5wHQ>~233{eiPjSuxHZcX5;;wCnkG0F;NifPd?IGvV+Bp93M75>083qGa^u-;LQb;7L zsy*>dH!x#FN1JVsw@x>UuDpyw8osaTEDYiVUaMB4sAW@8nI)nw zu)&ySmQ_@(#z~e@HX60ADmT_q84Wix%2ZMrweIsp)|*tB%>jKFU)7lcbYVqs%yXbP zlFIQd1i>1>#EQ9YNG9gJNs>0(@Hg4f55PgF3{-B_3e{Ady-WO}w`_e3Fl>#$$7?72 zx(n9X#rxyz=0K&Q8VXL`d%F;zkNwAehc1^EOw)}Wy{e+CyxcVCX3%I)-XnWFwuy~a z&ppX3%Nm@9rxSNfP0DUh_AtjB=)YKlC6k0?hS9U4O*{oIb`T|_O~iO~hJ`V8E~P2L zV<7BA@?c=uAG0zK!>k+7AU%2uEvJ_~H8`QP@r)0&MecW7!tE!gc5hE#J@hlJxBnxw z1vUeEBx|r#8oU+vm}D9kF={_LYOHA-W5Z&~Vj|>uL*Q(nX`rZ^3TGQ@cRTM;{bJ%a zuoR0t2;&%MnsEED&ab$SH|j-p5U)CmMg2nMSfJos{r$P6*NoCE7Nnt~wo#T$e}*86jjL+eqmtbO;QMgnIb_^=JA$PNw3iSl4T8>N!_An}Y*8XQWh`XUrf?Nsq8&sE8F~8Kp z7}O)P+|C)`Y1Q!VHFYq|3i_JFF@t6`i9uE_NXP6R&!#xerm=Yv0oHGhBOfG6V)AL5 z#bl@f1rdoS@lhlHIP>1&$G|ltVns4Hzwm@#=VEC_vEm%NpQsOP51UEvnfZNkD#aZa zZ&NcN{_kErAf(jkk=C7q21cy_ zQunx9BUh@3N*W<$aS@Sa0zW9*hpVfHgPzFdLkr#+IE2SnhxfWv6#>6C_!o`~6C}i; zG{uZ06y?VD>!Sg%;TK_+IqwL?oqm0fZ$!m5B$f$_M2#Qq(G{GRG+K=ySfv=_Za2mI z<0rl0Fbq}gr7fqzdiz2SrJ}v{c1TueF{ks=1PPyBYcg>MNPAJqBkl+echBbPWt+n; z+LN!bM^BU5aWgBa(BXj!GD)Q+1~nNSfj0)gwT)F#hXW;{)~3*aI1L`E*39a5n*_NZ zPR(yIF=6>l;A3`o>aLA;6CSN$9ZaoDWs1-kes(;0FHHLV#g*Dpb9}sRP=OddV9lQY z*14(rMV!Baw)VqSO%8v~IEK1azMUEV-0KAz&Wke&{!H)6s2qnsWPd=nL%b0lYnoMS z8}@yXPHvV1Jf-8iD-EUQ*rd2ZJLX_?&KB)uh1^SfC0}EUp7wmRp;Vm{sv$MEI6$6! zX8eHYn|s%uz1gn4Sq2uy*jdf;Kt@8m?j;zYw=;#@=Z*FygHS}8wt`STGuzskDa>>i zT|Gvy;e(PF*z!QhY13WJN{~E12BCQSrC%f5Cw*}EFA=JLR%iVmL8xv(fxknj{yVHE z)}J`gPlW1s))VV5mEqqYR6kwhf8i~EG5-1!s_~zLRII=3wE*67)1;r2EY`ob*Set- z0UFV7^11(?2L6#x^#9Pn|8XY!o$ti@%bDzNuHKET?~g6~6D-8c@y}iRKLOKNe>s2w z+88Sc3;68<{&E2O8`{`kF5sV=$NA6t-v6k1zvP-6@w`yhNi z^(I%f(p_&E+bnd!k7JHT?}7)=SY;y?9xDtl$_3We3%7PrW-c*oo)?LM`3g!uEP^qPea?kZ6rIc`kZs14)b zV=r1gF|tekayPeo+S0!_`EV|Z)DwM*A~oE;R&b}^D6u>srHDC|?Ib2}_%!W^lPrZO zJDY`ge{wz-?c$(!*sBnOjQ?<+El!l-^EzIZD78e}OT3CP|1V*NgZ)Rdo19uF7ZW8u zA%fQeFWT9$ymv5DQTQ8MKQ2C$zfK0;9nF^q^9DSe;~pBs5uwE16@C=!Wq$hc`#x>3p9Ap1CBNZmAQg z>>$q2ZqSu}e9qn9mPDl(+t9ivx{e?y(5(tS)T5qiNAD}!ev`8l4a_E(@axVCy&K%^o#)h!r6Fsy+^m0 zcRGUeVa(;+j}nuE;tjo`3*k$IA89h^XZTJfe@9k`XVUieS@2BEf%iYQsl+Ko&8Vxh zo6huDzRKrDgm_x>)>9~>_C`J;13uizxCcG#9xJV|)Sl^NF%1=HZ|Mmkx5?|V8`_h} z=c|idrU{J?Tm#j)+Asmr4j$}kpXMgwh!U42)UPLl_2QU@^k`?;!rAB!>vXZFIW{PP?_U#$KeWUP?#qc9g5)TjoW^krrGsE z^j3<2I>I9l4Uetjbwz}ut~uCK}$GQ?U){53#<*aapOQ6XL+NI3%lWUY`2=UvE69n zz}k&APR+6RMjIzTpY)pa<3PeoW~tfbA3Cb$b#Fa4RnmGm1)n8L`$n>#w4lUgfgI#IZil+D?Nx0Wl+cz*bqz z|KKY+r@;_9m;)wmfURN**eU|QvsDuBLI1(?xL^EJ`P5eImgCmT3Z{zSD&8ocnmfN; zN$$&7XY&qIGN%#3>?03=wq)}o);S<{01eA-l4)Rsdp1x@1%dm=?`tacv4u5ZOXY>o zMQhAQ<6C^;753;uYwx1R*1R7*tlSk_ek@tCgn;uP`5pR$=SovmM!RyyCXwc(xBsD< zUd>>!;*FVRAkd~>4rN>`l;*)W^?RnB%KX`y=M2Fs%TIWi&!p_+AQN_S;LAJAvJ65Y z&$O+XSYwKI{Em9A?D>~kU%QWQvO5quyV9iFYP$9Z{-%{z&Msf}JS> zob{MOA#bYk;qZ{vxpSY~kNNVwG(bm7!MWFUmf_p$1Qnh^O_CYBD)>r3I3qj zKp%?eh8c)($KuF<#dy{B>?l`|O18bIpz_+?`I)c=Qe-!3_P*ZQE=1GB=eiOX73tHX zPx{MuIQz?$+s9K`Ly*&AY3KP!ga%c0#^OBk7j+A6%WK>cD0!?S_r{}Gg7@ts#pj}r zrW5q)9t|Fw*k9wl$0j_=d*mo?_I^G2RHO|-nwK`VP-2FT_MU4~ip&gM&b{N1kk6kC zAK4ctNZo8cMznmzb1^Tv$Uh|+&G{|LDLPEzUO$8*IwOKDN+qr^j`EW*6D1ev8O1A} zL8xR+-7l`d>J}VfVzoM;3RDAW<(AJji*0ejmub43{iBeOdT;`;+BFSCk1jxh;rhC| zx;?QP3zgFLG0Z+_+IWuNq+iEv-2Hq2$b@xPwnRF3`($_?D&Oc}*ldGxTc$@IeUT`@ z+k29L!Yz>lzoQ}p^EV_SR+I5BVn{@p)nEY+agI44`{P zLt#`MP}H8o4h?#VsX`6r%E|H);teDCDQFAANAn2#o&g9&Q0p%p3|ISe;D>i(Sl0}3 zOQPUv=kA4!ec%MhHe~D<`;s=I)P`V`CIYa%U`a^r5EyV`mvfX!22SkNiwQZviCxYS z)EUWK3^2*5u#v}hVZFBM{^V~{N65<%XC+=V7nFU&FC<4}d$0`aWYQ3fyKuN4_3>4S zXW?lZelOG3d$=$?PtCnhrX;-Js^33o1= zw<0nSnt^tl7=KT|ZZ-Hta=2KGS;0?-Hl9>0;*+s8p5&djb>QC6A=|`%r$h3)ygkc1 zdB?8w!u%dVW7v(ge=iddF}p8?=p~7{af2TUQ> zi!~G-F(c1B^8g|+HL&0>2CJUMl|e{5E0-sx_qdE4i}_|Ov5u!&r^iTb5*fX_847SQ zae|f(iMFnI7}bB2weDnEVf%B-AW2Z22fs2RdziXOK^x;GF|AS-nQ*4-DC)n|$#1ym z(Th85j3#0{nPqs%3qf&C11zo=lgk4#P7xB0WBeRR(}2ZA?^YDI(hXQ##el^{b3Fp> z9ZmkNC#z*&K)zFmem3fgOprSjI;UM0m&v&ZUW+ADOx&lSR(|o>sVg#1<`ibvTC^^) zXGTfm9WSVS#f9g}>6JZU3c9g#_5@pt|5Gv=IUoWb77yvQVAUx8)c_*blSlcjZ8je#80ZqI*IGqEMrZcuf}zZr z9pH39&7Et4fu(jf7CyEXv+Ph%DCDqJ^nx;x`c-Qiqc24E*#pKSP5X|KpisxunaRTi z!*LR)1@q_)+hA2-%U=fLH%IVpqV9DD$ZA@5xkW7 z@d8EhW4e&cw&~qrdjCA5#F2)v0qR8%>*=ySq=V^v#q|gy29W6F0EKjS#lk!oC`c8+ z)u(4=lU>XFrKdyg&fa^6N^25-?U@BQE;OR$GBioX>&F@QyWt8na_)n-Gz=Qx!mzw^ z0y|5=|6=suf3Y}17$nZT+>jo~b~Q{2V@hR)Z^IIExJdcW{fukbLaL_1#y9BwSCNZ# zTN3>1#ZW1budUxO@7wH9g?XSZRlI~;F2&sw!#uK-CQ$y|9mgCzv-*ZP*k@XrKm<~( z(DJ3zTL%?(r>63yP+-Fcu<+Cct0!{O1TH}w&gFLYSGvtL>dZe-=5@7C&KCWqFWGes z+{&9a@bDW34G}UVDZk#fe$!{FqyS0tRF|Ooii_LHp|45(6<4{_RaA6e2lCoeUFPTJ zW8cbe#4nyaIwjqr942;8zlhS#k|Qzg@idovyxZ^|BD(u+Jf= zk`E4W_1W8?Hsc_9MhIR+-Nyb{OB8pM)A?AdO@%EpEAw`N{rYxw2t!_be%)70D~0eF z*T!&{m2tV*OEEE{(#4TkTNu#c&MaLvQ~xGeGLRt(TT#3 zCf@-B_><6$eU4OQzrEFk3bf}APkpyy776LGq|=&}O1=S#)iKZsnnoxwS7YP(vGpT4 z?*L;w0DsK`29+02Ni(a^+&TMHqWmrA9b&@QZJj4A@UL>gE{gZYkf|RnhFp0bUxWWN z4+A^j|7Ny;6ShKFZ>+p8qcL+1z5%Py>^b-bH|HQWY%STJs~(eZrv{(@0w$LupKL*H zLlFLP0|uChG5{bZ%<_fq{{4{2B@R`ECnhR_+sFYPLPEIr zg8`*n;fagNR+^Rq`6Jzm48djo_Zfo7GujFnA?~MsPvKXt3;YnU?O;N_m|n_Yaassg zcT@51>xWG5&Us!7h|i$iIreKQzjG(oLID48+sZdLhc9(IQL2x@?Gy7p{>i1c$>X8A ze~GdEGtBgV17rJ%4*U(q#`#CP^Zy(rV)-A(EGXm`jK%W5bIkf9%mMNw9sh!HFmwLV z1M2^wg@4dKvj4(~enM{l-pBq1hyihuCJqMHH@02|M(%%siT*n*I)G08^sxsp5d>rt z{6w)>{&%Xv-@O%)&(uS%(}fnB(bA)_gxl#}9TcFQZh)+KZF!R&TPf%AmGu#$md5 zy$ice@8>t~`ZZph^#?UxukDl7FDm4x1zAVBE}hvT)T^zP5S2K^0Rhi* z|4$bejkoG~gX~cIsBlVy(n%xi@~>M@FP%SrUZM(WOi0mD*?rWSr~Pr$Hv2Iw+vd&C zpslm*V%B?>$KUH32w+|pC%ap>TnAV7_Z}xGmKHQ57)8damQ2)*UhVJ22kpeNU{1;H zau|{gG%9s1oQn_f)(1Ii=k4qf^hnZ>;FxWrUcJC7W=lQJByDxv{gmsSn%^NcomA8e zi#*gY-*`RMU0>{Ao#Ep604D$XN+CMbYpO z$5QCqZL{FOVV^JtnyWFM{C1sC$|)r{_LIlYiPy zV;6VTv<`{6I-I)y2rcNSeWGn>!3R0KPfmJ~gARYHtA%Q_rhDS9Eedq?c~Gf&Aa_dO z%Dv5Cv~&cs$~N<|4Bv;{qcNI-$T)Tfz9^S=!u~l9IyvT&3YGW`PBnE(9;!zz72C`D zvn1v=zEz6zUZoh~Zw-lK#QLl3(jQN68ey;8H{x31pKb5yH)AW)u3RV<;J-k#`_z&3 zww!)%01xkedIuI>vGd4@;*UMD_#G4~5^Uv0VFb3Pv7{9`b-}1prBiNmF;#EM&QS9s zz43>9sMLo<=p+%Rq==%j@U!7nqo}zhi3U>evf(SOKDaLkwZ4O8!&?gzDIl9GY-Hyz z8Bf27D7Ti~V!rjAk3~JR6cV4s#k{&vZfqmvVz4c91j}BFGYQW7bv=r*Ux`JdK!u0~ z*t1_f`)jEJ_vZ=M8;YJq<&dOE3NtVd{b)D|9FB%UpEm>?MnH|Qx9>lT&Y4a)Pkf!7 z|DOHg5M}7|fW*=(3LN>fRONy~dneaGR~n83lqly6fzml{>&>T$BuK^%QL*sW@6aWP zyL@P$#JtT$Hv^^hgQtW8NXCNG3MeW4)X_B3&mmn-(yY8ARC~#9(5#KsyNsA<5R)=)Dl>Xa6O)=PY1UHI49{ZEi|^KH^$k6%`b;TR@Z@rP^;)rRB7|wrRPDjIc^iq+17+I z*CLi>y_7k3)H)TxG94lse}pGz9c7x%Vk=vDEW=`x^@b1M1P;b#=Mlli;<*LvO4W+;G#;Ao%gM*d0ew}1 z$;-2z2NkyP2>lH)bu=+*~?0GO-s|-F>s2@FvmjD!J+@@^;^W`U#9oC)sQmw~%||5-Tm9kxVNLFZnijKCjhtnhhM)g}lEAK>SMZ-G)*2ojs`D8q?8^*Mui%u$R%XMkkCT7d|k2^&}Oq)pm@& zf=y=#PSN}|ilDVDVg~gvTuI{-VMwIj;O1&#fh-Z6>IP%zR;{#`}_+XLYSY?&myTVA*|&yK~1G5 zp>W4!T8_)a_6{G502r0L!Kl;^MkRhQDm7TOv?SQTP=aa+UX+_;epu@wSfYdp;)FqL zItXA?u&_5_@Ybya3dnyfZG~DO!@8OiAtMMdnVrxbb~-}gx2xyl+XTXR3)}isu-fpC zL0p{)wHB?)w)$a`dLP(0;NtJ=X-!S1V2RMg4K7k0%38 zOS{qZYQqT$)(ua3lLD%8==8K>J>g|{kt;Ctw4*%jh4ybsg1CPyWik|?`7tfe_uyOj z?!7y1bJdFS%p5$pBzEz92yVdbXr|frnbxdt(mIt3`5e1#8{IY-A%KUAv1ww%&?{f=`+0Q+_Oj&CZ(!#?nI<%ThL&uHHp} zF{9O$P}@)(3voU*e-}2`L{<@NFn{%s^Nib7?(9Rto?6dcSDa+ti_5j6@`W^fneFt` z{7HA3W$NVHg1cBOp`T*YRi3=ntz+NK7K;#gzXuECo!WGj*5kR>+a__dDU!M`G?2lSe0xWzvz#kIxV9CTZ4oGz=%5^iBm-RXL*TWK)TY z6NP3<4kxw^i0U{vWtS2pRZs;|ziAuzLs4}Dt=rM*Qa>~^7w`=F({qDsj0KvUb!VybtpISRwK$l2UfmCY^~1RHj*9hGk)}tNY-w;ta|(BCxkd}!2`m5yZv)hqk|05c^AZ-xcxIZA&$S1%zbxm zC1jYPStyaez6?4V%rGkK)gyV1@Q|G@aDZrsss~$djsrJvD5Nh4t;Ws)j z803!)LEERRFn#Pv3XfaxKUB=4S)l1TF;p;m4tCi!m>DDKDa3dRIWLD6wRyJVkHm3P zKTZ`%QLHw8ye7s2q z?5eEM;weVlWfaK7Y$7^&I|fhhS&Q<_&~jGm!TblzdE4(x%dFeUbNx9l_*?6|mG*k1 z+S+_Y9yTdFg!BG*-4);?+tSE)nD^De4Ktxw^R^vrQ8TN=BR4T?)HKEDX4V4B2Tl2( z)9(l-g{3R%ESZjsoe;7mrVBfVr>9!j$65CG5ejK=af(}f2;j;g_UawfBOWE8sv7Ly z`R?Bdj#VnC5b2UCLDjtr*9= z&Ur%BBVM?nv3Wu^Lf*HvDE%3SqKB5d+E{YUj+O?PY2tdG@7=L^s|OEyH#nLd%Wu2h zVv2Tb1tSQ;o2kzQ81kP;d4;1+1Ma}ReXIs2!6LL;crUC}ilv>lnSd@WTdY7oY&05@ zVNC$5G`cCN@k)lPG!s}(xm1WTw?&))@_{A*X{0PBXVtb`r!;!ou7FiSqp*)ROH!RR&>_(GcoNQ8r2D z_UwS0Z9f_&)L121ZjPl$%VgJl`OzO70w&O{zfGX?Ihfn0m^9!BKBeNq`AGUP%}F)5 z(Vh6QX?5b;Qt6dg)Op6kvz_Xos37YJYFUQmwNaidrhW_EA#?ZoVYP)UIubAfUG`LZmA|%bDnGrX*F`O<|ehbBy zm!nYKZL{peXG%*EE0_-*_fo6`OEkUuIM2PsPV?cslem#+CS6`GYw%RwVmKYL?&0f^ zXmDfQYt!>`c*eCc6*H`x0msbk9**FnzHqDxxBJO(PYuqE4(O z`p~^HWS?CS8JvUAG}3g5?9<6ytN;h+;H?Yx+1bMDuRojlz^4V5Pkn5=?`H@m%+|)p+{xV5=1&)q{ZA0*zk|b|EKrs|TYsfa z+Q2%n19uMZ*JJ9}9wRd&h?I4V1BoQ!FNx%(ugc-GZZ2WPIBHVia{Vuj?$7hr&)jN5 zgmqGjx5nF=c8ZI>nWG*(v;MHW-wKSa-Rct5`MoQ$k! zZRombV|>X)^0Rai_6khOc{iga_G#T_u}(GPOJTk-&%AMk0Gla4{mm=={!wBQPE*&@ z)8Zm=LCsZ(3J(9MKg-&)`;ht zI#0aPk#aby9>|<@{&cV1emP0`2aU`Jjrv;cx2$uy`7LZ2AMdAzOZ%UOy+W#|2APu| zHKx*vANo&f2oSmu&=>Aw4_C(B34QA*t?u^C`kkf3xP~EPS~0th*Nwm~9=yZ`0=q`1 z%0VtB`qU!oBobbGN#0%Uq_hBOx4H+z?`9_~Z(BC;vT*QyuYVTV-wcwg;BDYA5bo4+6dX-OjFXXGp=!GW$nY@8u5^2UPn=vyIP25Py#lw>lY>@{ zb~jU*JRl*x7)M-WdX~(9aIo~1>8pMy1k&7yeAU}NVT++Xq-r5enUvh&HJxx8^%DfG-g<%4At-e`-V6|NTu;&9oPIB1y%2N-`6JL zZ5%1%*@We*S`%ciO*CHK3K-AU1R@|jsCn(UOFh3o)NYwvmW1RXFJw0)>fF&t_IAe7 z5|-;O0HqGO_6PB-d2?k-MU_w}MF~fcj1`7rg;bStCJLVTC*`0QM6={cc4g$y_!oc} zGiu`y)@YXURGYO)tl0|>5h7|w8)(W3k=gv#=+NC%m&{DwEpeK12H8Dk?R!|f@j0f* z#&lf<#`ABT|-chY3>YOc#6hgykzUtUTJ-=I=lh1g%T zPG;UB&&DcV!YGyGgVw_TBuuYouoS5j83pg zd}oc#DHnp5&`6S`8u^!LiO5C9M z#*V$Rc?91YOL4Md_(;MJ5|yuLKN{X~v=O7bxlT^Dv<+*|HrO2?9WzsJ<^}6itE)5g zv~AA3JoZd|Mln?Htt+x)&ijQ*F#-dJj;U?-VOD&24t1Wr zrzoz8==Qbsn5OkK=*`h|Cj@e{vOhFOWy<(Zt<;ta7n~lL!cvNs>fhT9*=*QwYwDF6`J&1t+~KNygIOM`U?t0TkZMShOKdpPG+Nx!CpeD7RaNKP2qg^~ zWb!(v<}f&)eWhAF13-8L48zDpiQ{rGe(+HL+Ll&>2HfjqwgHvH5C z)i)>qC0riu)&%sXW~tlI(V$Rfz2aRvVY2K8bzL|Jc?^wR6-#C_sJ^3!lDDHuPXdz< zIcp*3o2PjE5vO--JUK-^LdRQj*{FQ+Sg5(+ z1|E480)uKmQielhM*a+JScRc7KPzqu8jxfcu=(oo9MnXqmJ#m|o4V zi?4{S)D#QdYST^;Ty` zPRKXdu*iO?`K>}!+SA}EC#$H=jzI}c9F_goVQsD{Qv5~0#>X?tQyXtVF*7<6WZ?~! znaF;5$+ke)DL%1Q9UWP$u?YBAv7C49LRd9q;!@yc=LYquG`|k|6fno6wxgTfa)q8i zkle+G1xlJAh*R(;yGxk&SeGd7!XD`wfT5WI49&^j;a^&edcp&SH4xG2E1%(IfoQPU zpi2UixOar4wbF~et3y8uvwO~bkhj{u+!G(hd=gWTBU6yXl258gtty+S!e*?*mvu8- z`phkiV;Za+k4ez5KG%=cgq31&n6$C4B=AkQSf*N)V}+Jv5X3Dlz#^Wo)+<*29HCjb z>fK-Yqwk|oVWN5Lh0@wWy3!=4;y0jO6)q18X?rHwY-)XOa3Ug{FREng+ zzfPKDgt=I6v1GnNPj!*}!Hni&hVWNauxQBpEW~~CDUNgZ%Al5$;97UljmbWW$LFg; zuMfsOITZKHq-MUhBrMlR`}Klh=M>DVdfCfDoMPJ)6c*eYz6CNx zS!0nUJR81Aea|y!%SmOEHL*BFy9+z4a>X|%vG~Gvu-8hx`oc+fR*B3W=@-Z4py%kA zS!5DM=I~a9n->{!Qjng|%ch6Kihq%O$Ey%SgEeCHh9)w~)azAW<7oV6sU@Kw-lBP*H^@lFOsP8ypUM_A;oo&}yg&2xPJ2 zRJvep*5d11vA3AFS#j-;B+7zu?wO)9OR%6&wh@dV!4!tVUbQ>4`(zOKCz*iz3d!s2 zp|zlrXwL{irLUb$Vkg82j|ofMa+2?V@qPO%#Smwr-3G!ZD^!t@pWA(c5E0fx6#DZ>h(~)urCfW00e1V%r{cm1VSzvAIwR9zuQtA%aD{MqRFp5uzEn>5 z7J87xr12czbIsYc6CWQ*@A+iv0dnYe5>o~(0Cjf^6o!wP^SV3|au^zZM4B=;gt@fG z4`MBK6TRLu?g`&BF7(|q{t&lkJQ1+hhTI%)3~P_y{?+~y1U}k^4C+(Aq!qLYjxkd63xn&gK2tGXfDeN$MLMJi@h`8xUAP>a;3tm{J4Y9IJv^&EfeGP zCZle()&IxcSBF)xEpF2xB`TeQpfsBX5l|5%1wjD;>F(|n0ck;MlMt)6qwJ?B36-tRu=uirn@duGk-wbsnM^G1}2B8BJkaesSjuW^6U6}(Qq9GI3$ z`8d^-dil+VvnpUvn{Qrr7gT%;=ESRQTRo7^Di$+&eA~|wI7&?S?b9cGZhHwZd^qJg zYYpT`o!I?0nQeHZh%1yfM;6JH?z(qmFIpE8%e>oYYx4H zye)CY;iRa!y0Sxpl0*2U*TJ$6%gWJq8=>zIn;xpVe_BgiOuRQ+cMynJkOlsA%4N!| zpOw~#lX0d~u+~scFWm7t{El^Yw0notJ~~fF>`R^)_l`Y2Mx!2*e*7a}8vY3PH5%DD z@GW7KN8y?KeT&`9>%N=tf!>4tF9DlpymY~D6QA|i7y3M!e!&*p2Og)})MlDkDY!Z9 zjhazYGS`$kNY1*wmvD@OIF4MQ18<21yRsP?)kc7*3KNzn^<>UnK8?Ec+~YS?`sNaw}F zq`Jt3Vyw;eLNTaL3c+CS5ij0g!}bRl@*!8({gHQv&{j9OMY5dlN6uWW=kR+435j0t zQMJvvvxM4GT*nL8lBSHkE|%X}>-dG^=3;N|r}C@@-)?+@jT z^u=w%)a~e3KYzrq<+_!}VAO6vVmqR7K;NdVYhvrEDe?xhRtEm*j1o8Ugo#}4`sy4k z$Br{wBKZ~AZG)T=m=EeZ;Kl3PoElu2s1t{tqRDHo(YYJN=q*1PAPqgGtZ}7X)#f6e zwJD2v9u`@CO;-q8Pz~Xjh7qAE0>UOBjK4cZJKrJdhn25JN&VpL2qd5 zkOpdK?dKQdS#Wlq25)9rB@*y5Gh3NeI za-|r&J><#^W{JC9C3`rV67)Jf8$P9m;O>&Bk{=Je9gpU4He-OW*SQ610Td%&SB+&6 zh3_FZ5?SmUpiN&>T1c5cyhO^Gs&M$17~@|lQvXLV#{VK&K=AJ&Vf_+0^8Jw?_Dkf* z$NTR=D1^#UN7u^MUh7X`nSy_h!V&Vz%?#vQazO-sG3y||?92rIL*eY~t!xc`Djok^ zy1$2*_)EQtz!iUIul-W5{wG)wap4?6l7Rl7FPy+%38VjuG!*j7pAPY-{w}SB{4%Kf zPyg!A3uj?quk(XH`Og=R@1LO0e+MXX3kvf6GoYyX2VE%j{tVEC7VCHQNue#FCXU@l z!VKKM6w7rkz)>$No0x8IG-cS>&?$TTyrlP=&gO^0-q@2>-MRGymSYH}8(aB1_v5wE zfJ9{K_!dPe&o8YaS!%`FeD%g~JkOWg zWZZTqIS6JizHro?9U@o9zGG+d+rX!sUkxy;`cP+m?ygx4eAhxb8CKjPA`vQsuT{#S3Xo(WebFBTB` zWPcBT+v2^Mci@V%exFK0VXZz1-FKO)sxJg8*_VUE5=Zx)g*4@OBzJfiZLU}I=;C-d zS3iFZ zM?;K}4?SY2;h`2z`lj!<)0^8C?)HAeO}$&zle|4&B40b1AnE)(E}4kO%Rk%&_R;tT z)yL=(kRN(IZh5*bz)I9F*daDt6!rGAmmgyLi-KaqfjD=7lqM8=JTC6!un7rkc3vHe z>av0K^xlG36~Gyr2xt;4c0xEU*^c^Km*{Ak(;A$#v)#YaaO0c#v39v{4Lk@m|CAiy zFzPyCE!P0G7q2)0m}LL8nb8>M@9a>(JhRk{s1JSRT@*uLq#0Jm4w<%M=)D!)I{-4S@dXt z=jOl)K&w`$Piy9FN9xKeN4&-&?Es5P>8;1ZuO1e&#M>Xe{H?5ehHEw5;z9}iHcQP3 zw3O@I>*BSH?ey1~3!Z$NUNwPlPrp#-;^&iKCp*q1?4O{a>+3|HK{w`i&SQezj_*s4 z)l;n1L3ZvOcgMP3ySW>puPH2*aa3C*5PO0wB@3pJ7lJ`oC@s$Y|)uI;ZtnuZ3b_$Me9ebrI zQTKMZo&43kyLmfv3yW^kd}x(wTrhCp%aEKr ziu2&~-sivT7t>C>6{Opfmq0ZkO;FKhPxh?U+_{j@6*^T?UOoM-{SokbN64R@B5umZ zj<%CoU3plXfl1Spb9fw@vuM6kww7G2KNX)n@Fdo=HiBCzYaegE`*WLGlUn%g5F2v! z3(NPGCYspU1QXT9eilO}qCB>F?(;&2?!*E4cG&%UmQ zw5wck>w#>St9WL{a^M`y%<<65JJT;nE(WRarl&}Ri6iO;3GD_{cLpw)HKpe!V zY0fQb&-a5aN8z0(%O=ciZjTojZB4|VXPJ31U1*CKaTIkr?wz=J;Z2}!na z37P`ex>8)RAFg$>@=yb$$zt482=*Vm>=15Ud+$|YpUT*#H;a2jCG}0fi45j|6PW=g zG5}7b6P$QikUmc#U!z?jC4QWt? z-pXaiT03837%$>h`}#c0pbGp=&OKaka3a2j@x&jai^8?z6SZokOE6sCFhBAwII7Nl znxXdGCGTm?Gba0J-OX^f+#7AI=pvQUC9=X+(F;f7Oy3lrUD2JpU`Ds;#!+Spb9R3j ztxHz%Ng9Z;ion4A1(-dO&b!e|yi2Kj5UgJeP9Sg*M9U4(cy0lPHgOR!(ohf$}zDKUeR74mB^5H(zNGNx%2jRIS z1;_5Weo$iL-%uF-B$07q-5vV1y#ymy090~5D$n=i&tq~L2jH2jD{x7%Eo3D z21*m;kemYWAXlI&GCO)-5?Gz#n^Z<>g;MQGg6NZ{HmlDM*|S-pgU-P?&O-fI^3 zSQRWjx9V0G^aX8pinx_~tqP6HZ&T~6MMxrtGKP&0U6J4k3Y+L0nw$`d-I4z2%Nv1D(plyK!Vu#&-Y=@h+ccW-5TYmQ{{F#)v!Lw@+V02{yy{|kd+k(+^BjHw0 zh+|bj02LI;OdQIrXUUVyC#@)D&HwmWKm5|8ona-o;jvrqDY@CfBy>qN4g^Yc*iv9 znys>`D5io&7A6b@m)lCNACnb<-CPi|vLdL!y6%cMfZd$u7GN2s(3eui*GY-lf*Ncv zt-;pS2WoKJCTG%4*Ea~gKXFLK8#QuB^baxYk8F_nUt(DFVmyQx7M-(&!`tFVHppBO z;m}Vp>>4p?T{i%vf}vU`8^;%+cRkmr=hv?C*2&WBsZHq)->ji!32{k=yTfc$a{x~0NCrK!IpS@#I(2u9>mW!~;d%U&` zRsqJG#mXRypQATm5-}UJSm`epCbj2mSzdN8X=s;{?CrAD(>6OhJl6fe6%h0JdfB$q zR}V3XMsKMbBO%MscFRFn1=0dx+WfgIrZA}luqWm)sjtq3x)g{JehHbfi|{A~6JlG* z)`e<0s=gi&@KY_AoB*msYS?OExQjnHKHe+4ACo>zXlzPA?R47 z2JW>D8lA)~tA$GpfR=fJ6~naJNA6NcheWo79)vX0*Qb0TAB5!joNXou$?6f3CYtK$ zVltgrTy*(u66BaSt86HKPn5}No}tlVY;mAmZL1L@M9Mzh4?^my|NIDv>zfA{EWr`8 zD(Yx~EHv|$s|8ngo?|&LKd3);@e*dCn!0pBBhGaemSL#x4o5q}didFrA+S3p?SgFl-Tf`oy~^8gt$yXrS~a% zZ=^-(iSY|l2;nD!F{$6Ub)SmT!@hH;EuEmH4l6uM+HVtJ%qWSPg^1(pWL$G4VWbbKt& zd5PsBAuLc?y#t=j5g`*_{P2Ep>g06FGI!aI_n1GcGJ4xBXSsih^rpU`dUi5;^eMpp;;-UFb>{5&P~bl>_kO>C2F~{X>iYe)djBs# z8$aLg<@?)-$HBxe1A$c_#?yytk=wGu~MTML~j#D z5Jc!~b7h4nGX!PtRDN>j;d_4sALm;5#- z3@9yHKFFn*s-dUn&wm!s{!A<-MJL2kgt9A%`O+1#Nyx^B(5vk$A~7j2jYAN1+_NR1Dd4P0VGR3^eF zwq~2wg;U07`;3GyYF@`;-|qT7?Q>YLv+{do0H2j};&%><@`G)?j!KH7hMe|Vk@DJ# zt@K{?uUYFDqZ+OJ4(=cMI9f$k#xzMDafq_5tgcgzSA|X7u7K@Vd~p&TB|c=Kpr>(> z>8e zm80_=GJaXq=sI{)6KO&VQa4Vay}aTbMnDv(1lCLAP^;5&ZB(}c$29KA@hpLeB8vKo z0Lh&;z70N%?Bs9OZMamy_bZGw>dzfYG?SDv=t5agd7{IR6BA}eKiAKy@DkVL30ucN z?i$gXQ@l(znhhf<`vB>5K8%X4+URBftaWIrAKIH7I=qT9fBm{>Tni@d<4JSek{#Yi zFC~@Xq7HQo9Z%Os*%jj(I@;`p;0I z*|B@%ELA6aOkJ1g9wg#n5?Wp-1ned0UOuZ4w}-CQWElZoc67pty{e{brZSrYK9XVQE0z+>rLz!+^{hTs}!1|&3mJ7;9-CC~M+uB^Lm<_xLrcoSk4 zfi4PD10^U1DNnJeq!0E8@7|`d_&{~^Q0dbU)r zxvywzlRAamrvK(|CyUE|5|%kgfq%`K(z+zQAM>0I!>qAhTf~A67!an=(u5D`Hm`3 zE6dSOG3BmQoPs1z(Yz4>kmOnCS#yfnJYqJo|D7pfGEC9Y-ByQ~mh^~HsNIPC9^~-q zqV(gp+ClGA>a#Lzl+pZotT<%}Wuppoq2|1Br02Y1_UNj@H-?dNvl;Ko@p`jmV<*y>n|Evw4TFHcqDg^nRDbam77NSntO@eC!_Z+aQ43d{i>YsI*@nhY z8}TwJ)iHL*N$J842|Hk^ZHA<7jpyg`yMNtYVI>BtWCu7#1+dKFb)oT}CK`Pw(a8(q z{dgaO@2b^5GYSuhMnRru(HQS2E|uLAZm3x<2yheeHIulSuD9dZy0)54eBGbe{~pxF z`$IV~6y$mGu$8s$qW96>a)D`|i7U}Mq%mculGUeW#QVC?8^cny1x&yBVndnY(&Bxu zKyy^n$(*Cm0QOLt*(RXBfBj9fT_XojXt;a{@5deBc^~jA&wZKo z6{d9u7y5NpB}77l(C?GzL|{n+7rGLwk^*oa!mAc);3}{w?I!gp#(fJ&u2HPqhJBxk z;jG*|jY*ACF*k))JXaXH?DOQjK6i5MDAzV}G1wp?JqNl`WG!CAJ@&J=WqRjuLXXlP z(1lIyyq&;&dv54u7k1IIUzsh+I1T^1>%z{H++EoEfqgIJQx`>Y62&kpDig(s_K&-; zXEM(6ZBfYPT5VB?Jd^}|g4~}9`rz&)#azct9<6?}o4@};-kI&Td)cy|5}8qp4@|s% zcW1lDVKaGh(WW}6aB(H_QN`2JV#)7|H!fp`gNE*uQ$3AhqL~T%;<(BXC`@oi>%LUe zT`WU!l=}B9!DvXjbjaQcSGbV9vt^O$@fER=n(a}L6yuS^aOs($NMfuMU{aY8>B`7; zq(aFU?x2lLo{5dc{tA2P3_|l1ictGga${Lx6`AzaLK1QVr}F`{dXQl_^_%1M|#U0C;|lQBic29y<;V?ceDfcjw>)Z zj_xF2?+6F>jzQUs*f?D+mTDb5y(TbZSxBfI3(V&8*n?PY8&lm9#}*!MX2fEIVH~nD zB($ul@Hs@z1n`z6KvshOE}juD`~x74o2$seK@CcaJVXs1&;21VfMRrnFBZmu&L=YkRwZ(#E)dn*1)_SJ(0jN* zR4+~dQ5R_1Sy)g55Y?OVsE2F#$4PM6cpdw;-q^c_j%RgXm6tj%iN5kNb@xSoKYD1T zs3nuJpCYfj?R`D`T^Ahkd7s?1^eg20-jg`w;t&pne(%~o7Gp$ir!mOwB;pBd&m!Vk zL7FwYPd^^%&E}3L?aF3cL(J2tH)7*Ox8$Bb*>yE5+8b`N>osC6#FpD?Ju+uikd=6m z5M(!R^=3F+ywr5<&BJ>N>ztEESS|Gn1}xOC7q*>VE*CE$8B?$wpgOh9@G)By)%l}H zhA?kpMMz`OGG0T$TC)2=!hk(W7^RCr{SNIEY|at!j=JjdJ)(SgfNG z?V1lhI+V)alLr-LZAdTW-fUyuklrYkQxN!35!l(!wkpZlgOyh+?xQDtm&N*4nM{n7 zsx&c3+|efU6rWA%Z4u0;A%80s_LipWQMLGiAF9Dv`#K1;z?_Z=jM9l<7I5ZBOQEha4fqZ7%&%k z*w)<#<;4dnwMC<9jPd)`Y9i`BdRJWDphyO7O)^{Sj}aB2hmE4Nsrl$_g{xno6ojr4 z3#?pC`BZQr!Bm~ z5s|Bd)QRee_5zJJEz>v0yDpV(jzjedD;RtpevNj9-ck{S=1F9RELzh+H%GI1tBP_l zLg3xwTZHRz6mQId6CAGWbD6Z|_axVzsVu)WPWck&w>JIL!Ll>m!`nCH0EaQ{+&9OV zMuDTQSCwsWSdTTa!)>!Z#F5l#pb-cDwXScQ?Rw8dh_Za<>Jz`Bl-(#T-Io_ znQf>Zcm@fXHCRj2rpr;~j81Ze+F<1n*Q36X*7X@J9AX_5xvoX@L$nZj&>)iilNH*)O~9*#FCjc%2>c~1Lcx%gC}Q&!g2UfQ$(=9m|OVZ(@%9fVU9f5!Y|FXM6~B>pz1>zk@US=6^}T6#RQAP{6?c7qaz_!U_EU z70v`9Q2i&^4Z`{NP{;TXu-i{q>mQ~2fxG?pu$I30Ukdm4uJL^qe)cJM^O_%ITaLbLAU7Jr$a7e5558~J*f;gr(8Gb_9 znLOKbG5d(b{YrMd#!jD>SIrPX-TB_mdHB{|mlsX3RoL#e&!XlJc11!cKI0=XcMW4!1+9N!?s7 zxn)0&k;B$H1@x+FF2B!*pHk0k?TGG>)Se-0c@@qk(9CIJdd)@};eI&XD-o7SVcD!K zKXuwUj_cdlUg4&$o2hR@(|X&*x%2sL-|2yQuHHMnbv*)$sU3lJtqJqZS%Z!eilfH& zKR_vgZH+dzO}ND?JN7-f=%SUC*BinHPU<(R&x%P?iuCmNJ3l_L?pd)J*tY3q+wuYh z8f}_9G{RZ*W{6F6!qlRv);r&85g+NXkeo?p%NvKzba8QLy^Y|v>Uryj6)Vjj_=;X1 zv*2|3{0WIhiPc1Yc-AuYsiBk6QolwVKJz6ktA*4J3z_u_0-_>iB-{k<;0X$9P^*(t zZQsv)cT3{Cer~sF!m>B#>DyK!M_iJpG<6G4f?&ZT1az zV;=Ub%g$i>{s*_2L2Dc8mD~f~Hb-wR(R4cHDRVvw(%^WugA7Scps%a`KBBofXGWV) zv8=H0)igi|{sG;H!2NBQ|L9X-> zZC$9feTMBdnZ5MrUH`;`=y?mb$}Fk7kNhn>u3vg8D9>(e$R$sXV`MAn-WqybOGELN zcH&e5Rh%4tbYkO-EW3K3o3zAUCo)zO{rPMl6;C!Gu5V;DjOfb_)9e2C`Wzrb^hf?e z;!a0J!cu}*U3^F!|IP(B)jsT?oUe6B=!z!>ZsOve^R;hc?=nd>zERy3KJX94FelO2 zFg`fS2;JGUO!w2FIlpfIxI$ApfGpHxAG>@-_JQvP2JBrWd*BE9rVn4T5m*%?d_Z#Q zETd`HrL||d=|qg}T0=kkxGWn9|Mh%_##S3t6~^sA?#4!=lG7ViJC2k7GA&{fd_=IY zhWelfLOe>{jak}IaUr!=7lVYTL1aFDrR;?G_?S7Qj}bFK9|6+YH2BA&lLuddL)gUtdnnQ5Oe z<9?X}-pMNmDqSWgzn#l>5j~XYOYY$pQ&X2w%i>Ea9Z__P%lXZ+8sjE-TLFgENq{lb zJatnIV_;68iq@Fri}1Vf29;uyc$7u^0aAo zo_E#fce-R{lw6J3v2prZw$vK9s3TE2xB{iXYf2gJEi+TmS8-E)w6H@E0QXOCE{81c z*I1P(u)FNB-xyoy3_E6XEt9krn&6r! z7Nj^>#9{{a_3f4o^Lu`J0}M$Hgho|H1{kWQhg?mcyRBas#;q^LaG`cDW*Yc2EjV=H zif^?=lL6Q3F5G6$l+^C4r57b1TTFTOxgjmHXkj<-Y%egtKy@RT-JpC`8B4Zh z;BS@Nz0-VSt>S@e%t={?76(s8L8*TCDT#u?oj!XiErsZtK5xY>@%s%4k`w3|ZSDN* zEyJ?Ad#*Ej((y~muC4@jPEkVQ6X;=fcH#z>FN>3#7!vd?XC_VP#+Liv*_dW@7|>A2 zJvgN_t`ahmxjt!00!4B<9hh=|0c9NSVbGbc9J|M2yRZMbvxhLMQc!oKb4pk(OCE_Z z>b7^_+7zYYDo3Nc{PN0=>G%XxzO%3TmM*8>-zU8;qgW8VR9Iwn%RybC*GJOSE%R^6D=S>ot5a4i>>=$LPR#g zGfc8Pi3&*9{7m$IP^2$WQe_zlPPia!E;AVrPN-6G0*s>?adb9i(c3$)S z0o;){%l@#DHoDo|mz{4VNdm zPqR`2YH$riojAP*NWl`$NqcZ*xIK+UuyJNvw$wYgO-6-LfB9dRtpLypVWtg0u)gMe z7XVs;98qUjjmOFD4({*6;?6KBZDDRiik}2X@uL7KetICqj~}G?1*+|L7em57Xzt5? zp9mQ<+L7H$sh!}Ab`LT|%`cu+`8ZFy{MPN`{7Z}eVgE`I%N)KX#lh1rrcF0?tA_p0 z#HIGthA}`)ttl#``*t>;{R|mtA<8BX=;}$(H>qZo6OwMhK&^l8U0SMs)V# zFqhiZmv;B!z)JUh{ky^7%|?wj^IeYY_Fk5e()|jWy{pzAqGYYxZwk^6JTC2m@I}53 z6O3?=?vBwfZ(_fNN_{{-E?C0Tky|a(*l1Vc7IS+QDd%CmuS;L#zHiPFrGf*ND(Blo z5?O{-bRy9!|CsI&)SWJpqDCoijZXw|8iKb$Wl#$6)&nV@9QeqH#MQwYGMOIn#QMEn z)jiDDCU;)E^OHV^15yk~i$M+ETOch4aBis(2J4tFVkDl=Ef>?~jmV3B-sUY%q6f_n zLvH&*248A{%oSt(n0*8K#LXa+pM4^Enbutl_ZC~!0mrA7fvv7BT&iOL7mCx5e=!`* zs`uHDi~>QA3WA~&J?im&lV;ceAgh}UYOr&G2NaK$S>Y38T|9yz2L2MQTo&db1{0K| zT_NLKF(!^Wh+oHp#z^p6V^jm_A6(vVbRRbGbdj3rA6+S+=RaKRB7=y)|oogZTdWB z{nVUxebHa{;RmLg;xRFhQd{EFd7iC{N@Q(U;zPdjJs59?U7CZL?e*@-VB)9P~ZO6DhLz=tRmjbhGfy<^?L-R*eba($*bcq$S z+s_FusNiER=bHR7PENhApZ8hK@6qdfOCM32TUiI8Kb~;L)+;NWwtn=@&&(n;t}i{a zz%nVsmba6$W+}w}TF6&Fq-lW;Z@~~J8bxzZQE&JLp-l@i^Suo=b+AZJDp+R>cvRot zuFH^3G1*F~`t5Z~s0EPpC%>vH2~`E(*YrkIO7=R-M;=!q)&zpM*P&<&&=&DH3e71H-UNl_^n5FC4S7e= zWGWbi7d!c!nLS%gn}!^pTkJ@^90iG_h^}%-sAMT#k%=+p$=BL)Up8mPoYRRbFlR=# zEi;zvh4^<^eYae+CXJ2EguseG3F6yQ)1!PV^>iFy0}4l-5@AmXpPlYvp2dKbsNx;X zjoN78sG-*u=t{y-#3bd&UwQjNsv&FU=Rro1RmBC`K}LfMjpe?~$x@yI&tHy#K!v_r z4muPAEh>ps#TFsSMLKm0@!;`<=;hDOIMsy_y^(v3jHDc3QS9b!uU(sz_n5xoHLT34 ze7>1+da2j+dB*ysRouE>>$uij-z5?<7AN7qM5g|VfBfG-rhWhb|2{JS!uj_&^7A6V zpFiO%yg$&N{~BM>wYB>bf&t!dLXn4RrpDtw1>c zs)PMs*i3u~w$-1J9|YU#zbe^JzM6rZ$zQJ9-@~=y{eep%;6`BH_R}nl_XpMLKXTQ6 zha3MuSNl^T`Tj{w`)}bXK?vtxb&YL!zw$1frt`dMy`RUNC5nrQh`pggQ}7nJB=E~; z;h2UdeZCV}6GK9sluVb`z7S6*s6La=@;#*s-^+8XU90S8-eubpr_0K+UJLxo$_N!i z-sPuisu?OLD~`JJ#VsqZiZcpHb2rQFhvVy3W@iKg%i0UXIA1wIY(Q)Z$7YLF-OTw> z8OXbwy-WEk?=pKn7O<`+>UJ)UtMIV}^l>;d z6=VPO%lyh2uZq)MkIFdb;~kv*>=(ltQ!!oC7D>uHYkTwXX_~`ne~&|}!+W=m-T;-} z(dcwFfzh?jm4XhbK-G#8#en8?dQ5hS%v%t17_&yOLORgU26`v zQbLlyU2}X^kBgf3u)-8USo+wMC}Uu<@@;$G;W^_lN|jU=((1$k-uFZsJwMbu#9o@(Jk9W;|wRb=L4TM@dztL-uA;W!fIJp!o1agnEa4 z5h@t}6enxB!VK5wsb#bxdv{Dk^nTv3tfgL~+g108#D~!EflumI)5FNM=v>7wuz3p$ z@r_yJ)UEmG>v}NzGT#Su;F(pA%Mxga2d>}0*=a$?EFb%66!QmtNy3`SzWG>a>&d&s zE}^97Lh9|~gMC@UO)r2BQBOq4mQU+4rXn|E4~fc(VO&+d%x#QZk}($Z^{Iq1?}5eY z+uOVMy@;W>R+FdxXZ@nZS5s)HtWIZVuX$cMKX;2=#Tqdf7Q}mb%d4$2q_S)^vkx8M zLmlL+0-`+AFAJikmf=Zk>i2Y)@!zjq-ETSJD!zi?GNB^4Oqd8R6W;fua)1t1^VF#Y z19Ygv2xCQ#!qftd1n-70E~#^C^s&6aoBQqvcnG!2frk<@mpZo~rh_Y?i#y`?CNp^R zI<^3#MaS_wJdb3)l(}0iOSc4^8gs9VV%_B@QKd{$pQ^vnd!x!fFd*d}m6pYnMu&BO zy5k#dvsf54nr!h1HbonrMtlu@FBYaqa8nkipXjGMj{|*P?LCddz+lO_vQ{Je@p?+# z_|pg$-ii|;=tQ%5;n(-&+z#KTIt{rCj{{Gd%&V)h>f+aiY6-L9>+IQgK`y5U!J|T8 z^$kB{o{k0-fXgu8sWQXb*z{g446_%!Ock$$rhP7_`@T3Wdb3Z!PgXQr<|zR=cXK0LrStR)hTx_LW7_*L8zS#v&k5|exSbDF1*me~a;s(?T%`M&ZVu69$&j`WVK z+hb?L$Em_)_9axKMlFtpDfcFu?2^nsIR)=zKMpdA0fFiUE!@*)EV@PevKSpHtMM=T z_NlxMwJpaRdQsaqN3>@=(uo_6#QVOBMqQSNIj6U_FsCc4Bd6&ZA z#SnYbwcQ#`47x)bFqk`F2QTnA_GHo}Pu96ukv}<-1%92Z!WCa$tiqM4Kb$ZayGbpR zuj!BWN~;>TNYj5-CHCf2zF(1Fr>lDc@}8YQQ#JW(gG+KDyhY{fhebK?2H4 z==r2YD9;~ft`ZTg32H0CR*96>Tpm3td#_7(uSm5M42)SWx>@mxlN*Osg!!!qq^=1t zMA*OmLic7lkw{8xbweswdPFL6!h|sLOup-FbK+Rst)V8e`FbOpqj#&zNG|cQh)~Q} z71`lSBnJ;ud+b7)j9>>Lj-oqpVsU*PH8r}-97WmfU4#kp4s;yb1S&5@7$RyCzbvTt zbkw*5f5Vqq`+LCO5Wg@06_2uL-3w0f$j#!>*WnuBd8y4{d-6cWag!ZIYuqtO+mJq} zp8Ipk#eG5qdW#|7ng&;Z4EN_}FOX{CXea6+DKXRojT83iSlEuVEv|?@MU{-Uy4P3T z`-4U;zBzr#uctL`AVC*b8gzQ=l;`7xj} zxL7d%7+s--SfY8Sqg4l<6r%2q}E{JF*@gfdiEG{U31zo191;W3FR(MYLJ#L5Nm;jKoppn zY|_Tk!LeB{bCfBgea7WbQa~KM5(|V=EUfD;e+63XrCb%(?Um)?aWTVz=`S zHx~#ju3}jCT5`}mfu1l&taL!p#Bv#Z;@x0Bt3NN>q96K0XEOGmsQ43?-@Rd+J?A6VMPvuex9m+j2BI|9~eu_ zWrMM&e^z|upcB*~>58ur?-2z^0pm?Cqds;Ml%biavyQq|B zpf>2RYKzSA*&*6v8(dvqy{m%`Ps9zTxi_AFwOS{iy_~?~Mce4NVi`#hpI)voyO}6iVZ5orH{jWOT0NGJY7XV!} zB#_D)BgY4eC~zl)IC3R@2%||bQ}Q^QWnpWm-{%{ky2t^*Xz@py+|JNMTVantPT9(fa1syo{?_r_4nj(XnfJi7%4alBPe{ zPt@;x;@6PRa@ZVY(r(nbs>nQ#b8v;Zr)FEvBlegm`k4DnGNT0TSHfH1E;4n zORZdd!PdhSplQq}v>|zY*}w!k?-=Wc+Sf9#_V$jEx^h}b+!=~)q5Ru7w&iLb$b^t% zbn#~Uw2*AscZ5-IxOCmXibs#qaL0D?dbkuV38d15Z}p42tm#q|_61pV|1P~G*14}! zc7n1{3JEUTLOhBse0NPtOgeqga*-)Tbjkonb77!-05$QgxmNf9^T(sl953AOmHIq$ zZXBa?56}GE^NJv57A*rc(Eb2u@pwG&SdSVT3ao)aTVnM&DO^^D zI|yq}w_>eQKp2F>hTx+UDb>C1iD#tLz{SiSki8ya2(`9`XgnfSZ*hG>p21D%P^LB96BrU?lHEgW_YLuY$QlKf5-F{c)#LYa zcbLUUeSKOH^g2xyrdh|-JxWeA)lXer5NUukovt0fl%=(tX?=dvAfDZ)q`8yvwF$h=K-@y441=TiB* z+-tAgJ+PW?Zj$ZnlI-G);I@pr#J>W<1pmsl`9A`L{pSDy2;{FP|GywQJiqjP+yFG; z{(&{|)AIax0zY7VZ*HZd|3``6pD+^$=O2Y?|GP|*_Xq4Gzz+)fyIB?Q50T%0M0S2F zpl_wLhJaqfeTsSNK8r;Ry*cc$txuMtE-nj$|Wv2IBrHpDl9Uc zM=0CWd}{idz4kvOl20#zMDmcI;+WU1j7Ukk_U!04GFct_Qr7fX&*GwGK$c#}{NAJ} z^~FU%SDj63`RbyehT8?-s@L_;*f*_uQ*rGY>Ml>3mXGE?X;IgnH)whuZ==d{KwhRD zjx)a7*>57|XcOHzJF1k&7BIjm&NT1B7rikST?D@v+4-`0je{Y7XTkm2(aS!x(r}uU zm$M$uM+cwl>IoH{QfmlAn;LR$=M{3y8_3jOZ!)|TIXl^D^B~xI5=(ID%IVT|bCWvx zdVpzagHjG)+_$!XX1LiwHD`o-sAp_)lMwF{{PM%*v-aNSw48>U># z6NbNaKlBs8yz)bi=UVd_f2>Ar8!x`Wpr33_wzc{?+3I8_CTmWjv0v|w5$c-xoPCaU zUWgLIiF?^jTU1ot9A(?nS+6hmEm(sM)rEI5oygM1EBe#MT?G^*?9!?Zr#GDOKj=20 zn4+LA9#ORkpE)^YW8J{HydYaly?0m}nyH7k6BaZ-;ULVLU!XqPj^}o3F}zKvmeQ^M zcqc{ALbAAgyQ+?{D{9t8>zvZOhO*Q~?p0s?_QkY|=L?0D(f+|eOPVIe8gcze+@(h3LKbECOtcO)*%r{Jr(nVxK6dc%B_ z_8pbhC_=+kwwAfHZB;&jyH?hwtGbdp_!uq#{qkw>oRIkH36GiMzC|H~K)>i;7ew{H zPh-=d^LxZ@El~BTB6BH`=^L&M&Rpa8F1)oT+T0`6^-Zc}toi$s-~{Xuq4#SQKKG-X zntvvk<0y?evsPTy!r8Yjzil#&9`%jy+Ptv}Xz+#;lCwv>k9gGW)Giicd|&i|cxSP^ zmlZTJG^MZJ~;@~ z3`t1?bp!!uxvuN~aXGfaWvf-c9V$V=O$$oNz-Lt6rcbM!ptyfF_7g|-K(sgGYq!qT zZMpP%oTa002dW*2L*uIVRmW$EI-NS+C7~uFiteImhZ$hOx!-3k5}D7*QA4Kw#3gTju0C814 zzVAc%hp+o866CIxqe*;6U%w5nBbfi-_+IC*Z)(*z|EOAbG55V^21xBdhwpF1*=JV0 z@%*dmMk#&iUIcE@Lj&sv;#IAk%wcv`l%Xv;Tz2lxQ)nFf{%=YO$YV02Aa~5dQ4}Al z#>A(*fsqgCpw`-dS&I#sdaf%6%Srf2k7@p)PpKibP--2Q+x4SuZ4gSZsI#-SZ$LZE z;99;JPi?MEplq6zo>#_D@gK}nO(9d+zM5_%gBWE9rTciUJ+ym2o-4=6zF@cJbt?O; z7(UWoQ8cVzZLeXn_R;Z+4u#Qnb`zfX#D#;!B$3jTUVR_G(aVH5T)~c&@hne4$&5pU z>@pHa%nynTxU-<1GU+Uedd8vuY8lBOmXmVGqYN>Yd=XgYp?`N-gEmh-=8vATh7kC} zlEPQveKemk(%mdr+%^rq1Z;6Xmk6j;H(Z-M6oH>*8^s1Y{2p_n>jHE+uKv;Vz;g}m zJW%#}9Xs5JN1HQW1$7nIkq003d=nl#S} z5M}L!-iPGS1xB+0DK5H@CAub=AGn{#=n8g4PJ^n6wcne}qJ^1^v+u80V0`d=@~Qpx z1ks0V``dVK3uW|@aq5cPKm}L;RDi^TrVsEcK1@}FnbeKk-2L15`GK=)6GS}kO$fha z+GQbjL8r4HkZb=T{{0eYQb*)#7ih9ZwiH`&Ya#Z@2bXxbD%`%`ttu(p^ z1d%ox%GsJcG`oomgh_l_x!SL}Oys7N zafm&NKzIF#D*rv}#Aq=$xpjL0dG5h^D)eIH~TL0n&|t`RSMmKt0&USOWx=9kefj z2A=e>S~{}aGIwbDL3r!G4sR*TG1uYE>QEBsGE>Rd9B$&9*naOH@r^)~ZKh5R;!`J- zORl`HS57#y&Be9a2|S zJ!>C&i(&P!{8=l}>h`3nXprOll@j#fPO32F3_>>Fsb};_IOg3|_gg7U$KS+8PO#vY z$bx!XLD9YS*zjsLP+OqbUvKjk+Q2KhU)O-qcQ;comg}f~khnC-OCQj-Su8f4lTXb? zNc-wDGmO4X!v0W%k{|kF0u3JpwTwlZZ2-elwfR@DNYHvVTS`d+P$+`d!AGXU+oq#( z5huX{Va~_6hHE@}R(^1*1~95y%s)9h1nqnoplZkl#H5H| zoOdtw1xQk&Gk!9WYM1mX$UKsOQsw^8dm&W*0$b&c#GoE;+r#0{axs|FLQtR2r~Ji% z#(^*P5A76@L1p1~P`m7)UW1b|UZw;CeWJL0eowYh2eweuY0dRiuo#=th~~bub60N1WCOJIV_7 zL0@%p581{PDwzpy*cH&6mov?Dnm&aY8EkrM2Q3nKekVfLo)5|(c2f~xUMlMU?o6Oj z6@4TCt9*bJ@m#!3x90(5s)T+s7v=jfEh~EmXBWgR{>(c}Saim%N8=n|Zqs&7}qLUo7~tz8nj8(&2PYX3@PL~E9c|<^rZhMatPZ)*V|J;S4WGO zXfsuuPu=xBKHe%BqBKUn+eIkQ?ilptWsdM0>A^z;`kn%jcG;LODJc(?Aku+((X>MH zvY+oEn5^nv28`SVgD^B0S9I;Q?k7rzjX=s)onuNf>J`d+M+0}o+WeM9gFJsmQy%{* zVKhNT5K^MZik8X~egip_d&U1g4_g-Y{Vr{WF)}VL^j%;8IJ;~RIGeEND5EhJ^c^r7 zM%F=jOF>prm5ZW8@u+s?8_(&h4HxAwCmynEmAGnrk#9CTz#JE8Upe3L`XQ0d2y>2Oh0jdDA z;{qsNM=sYAEnvGBZhd~0H!_@(B?DNuJc8#A^P|A#>p9FRgwiMfqG#h^x=3TU2?Lj`?8RB zrqQ7v05G$&zQd|W-L<~h!EUpfRuE3{Kq;EiE@6@#q_F{iXa3X2XYV8oSu5tck+?r> zHK=+h?c!A1Z`9^7Y3AX%z-F$jO5)}mH4+8dr~r9m4RU{g$_c@8&LUppS?6zFN}&lJkctSnA>iXwR+^3+dq`;r_)1&g{a|u%TzI& zZKp{WlA0CBYY|B0Rk`R5_?zro>H zew%>-oa-;bM3&!XVE?9L0PV6dG}5=#&@rw-EjR_e`wOj)`9D*f z>RVWw{SUtz>))BY{cDtqjs0JvT$;#V*XCC!Z|xyUZjgE2YCH8HldJoYuEJb8E=Q?F z^_<&gls?Rk11<-hxaOqw>-jbEnJ$_g>Cg--<~-{5@kf`+djiiMh2$I#m}} zA%2aQb9)x?#hcY?ekCKdP~ZdRHtC=W6qDN;?hR%5jlYg|7W%jLCOk+j%>#CCMd`=A zxhTX`sVnoiHrmfbjxRwOl?u@F!$+xDTrX>spWLXe^sAzq!;<2?=URB@UHQa^@{vwV zOumL=d>sZ-cOM+Nh}aK(*vB}kRjwx|JMadT#_cDqQtwD>w~I2T7S20^Q5-QxzL@Xu z1UsE58}%3S?*~Dn73?p3N9Kgrp)NC?6pDP4q3?;bt@}9Xi5T2c$%ba3RixaqIYjQq zbIqG_2}X^su0?veSFv1WN-hGu`0G7QP3E3A31 z#dbrjdMsthyCX^cRDi6t`Mw6koC=?vcuHmRt@XEu&c0PX#Bc2{%B*atR7kVb=k?!< zSG>7w??X087_gmeO6lS<4!6{-Wj95&0pQZJfF8u&LR@&$EQ_5`No90y!6*TOxIjD} z;{bnx#KEm+KRwqm8Hv0z5Sfd|0!EPsc+{&lwMl$~rU?A!);0HoVN|w!fv(S&t=trP zna{UkF#BzoEVc=?qz9p$^9F0tLduoGgYqia=RK`_UX3A6L&v$QnPLX`63v}3M(UUr z$DA;&r*HT1I1DWX)tcF>1-r>Q35ZT!cR=S^MDzH$m!&NwtO88};eX&f{Fz}U2xiJu z;|wI_-J8faPm^-0NRK-1ED$!8NMEBsgl*I#pTAUPgfKU5St}y<;wt4G)E7su8E6i& zN%hQ^t^2gwjF2wGUa!BWsOOsOtw!aoC5nGTN{Ay5Q>$+?wnN*At$yQ7GQHR%2su?5 zgf4Yqs&H;EONpqaD*b|Xo^OT)tF%lnGN`F|b7XT|Mik zmymIP#Cq>e#fR34cLpi<0u8Xjud%8aL)XTc6oW@FajA7o$LrJhizN!c_R&(p3=rac z55o+`$>w67c=7)(SxN*3+?BLU&}&cI zNOrZQZ$2g<^<=yWpWxuF*!qFrJwN7_r^d@Jm_Qb09;r<{WY$QvuX3Otf^~mCazo)z9G}*y;P`Vg9CH$hb$%Ufu_;NfEy{A5?-mk%;asQNMfuv+{ zdXUPJ&iX}PN3KfU;2A+pHbKqy$nyJArzf@ku*RqtEfeoAPb)<13#9K^<`SnY^Awb} zUk2(dhJ7j|M11}W%S!$Q7Th*=!g|alG@V^vNq>p%foEpkHN~~>PlPGXeeJ@in!tLQ zAXyL~Oi~{pK@|ZAcqj_gna>`Ee_bo~Q{#JM*T>d+osOX#Ct<0}teC4u#rfQpzPYvY zYth8R0rFKi4l|5i@_GK&c(4JcT>%xYkt+6p9488UWr~F$;*U1{DbpPijSfDnNxLRXmFdfwV4aiaz9RI< z$78RW$BgHj^%bAPlVyXKlZ`pPFTG?Xz?1*scb#-(f0RTnvNRhD@Vu`!`$A=T8mJG6 z02|@&p8iL_*3Ypp9g{4u^b=Vd3RlUeRWFPZ^+7rb3|VU=#rJWrK zbd9WpBKfdQWKtBkXQyb!t^jioCQu)8-sp2rvSMx*Ap!3!`BN+z7}6*r905Ghh_tZq z(qybI^yb$R<004x0jj43pn4JjswW&!J)Hs7^AJ!yjRDn@S&Y3%l{hj2wop&I_k{X` ztG`libO%=-%QW!o+VBL}5^Ny>kU%k_ujOdd61AM|EOvm25Y-e7BGF^u>IEXvi;duD z5Q*;iz+oT~0ktN%MkUz4CyMS^VHkxe<|aUKUiSv->AOV7lc+Smlo-7uKNIq-6bJTj zhO>E6&~tTLgp4p=lb~twm;#IIw?CIshMSIOwK1u|i>W2Xl_a_n##I-cx$pf=w=5DP zeGErXQI}31BeyWgz(112inVwx%@^hA#zbH1&43jbQe=R1DZsGww7Ipf{l40=l&&iU zWJ_QlTMHnxk=gG-iUeekA_4ppz>zaN4s(ueOllO|&rT2OTJMxE?NC}wD9@)nVJu5*$tY1 zdqDC5O4I#-?{!-AP>WD{1lG@)%l=)rG+T8Mi<0Yx2N*A$mtXf0Me<1X5h-&^^kJJg zIk~j&?eSJIHBo6T1={9E$Q7vNZ`f?QFJ&LZ)1|5rD#dIMO}_5V4pw003BtxO#q*O; zdK(-{e+m8gbO}9Nj3cGwV1zO8GaHP034KY-snzlAG-J$XhtE_?xN*X`>5UNf@I5Lm zswLa!TgD{^mG=D!3Q<>)!j9};he(GZA&g3Aaq=pkoS)Nl=I-GeF%3j0hCk`vBUM!b zzSrbE9_Zo3GJDva50$O}ruK`_z6s(Me1dv&g<7EE z#RXK>3iipT(H9WQz*`_XpjBJJ0^VI8J6K+o+to5N&f}o2cA`Q!H%Er*A=}B_qC01y z42Yk0!B*$xEi?P&_&<$1H&Lou2)h^%Xxs&0JE$*XHLyUwgFHFF^IFCiq-rGVh>J!K z-}Ld_J9^pKVfL|9QW{2@`GRNh&58!y5F>$0>Kw~Aek6;8NZ+3WsOU?{eBDgq@XsUw z!?+pTngnc(ll<))fqJUvEuNYL>`6d3PuWA3p#*Nt-;#Hj5K7ONS@V&jdL;d0PEkd` zUZyYop^Y)(&`w;somjoY{nX~D02}Y28VEE;NRfX`uId(=1nU|#_5Aow0Y~q|uO^Hc z9E+AsT;|H_Eq|yhURg=GG(SDB-t?iGcbY&I+=7pz3N~GCqNGIQ8#0{C^A*+?Ax}=I zlZnrafEV6;P;@QaM2Rw~uiUe{dsSY)Gp>G@EzfFPh@J1$EO$osoKIu%LIE>T^^y(I zB1Pvz=)8K>nH0wt>t9(%A+?!>S>vS5QbHNTW^ZGdw8>?JMcuJ62Yca*{?pn{!Cujl z;n+(vhh~p{;iIBALt8tD@gaix?tTvffS;0=; zLJ<@Wxqx1nNFh?`k!<`+SxoMns?%G|3N{M8c^kldWs;TG(XJ^A#ekgZ&G_yyoU_6P z0dtoHXR&pFlhue?QHWW97tO3o3z1PlH~9gm{Q<%^$|Yl2I>@|Wnn zR60PI5#6zFko<%;$>#@SJBvCWYJPH{k?W7YObaVo3Q4%|6Z+^3ap0~vqK&aqsvq0n zvfKg=H8TR}R#gAXR8Eko6f~9rrl091mS(r+*k8(gZ5LVI#I_MDW*D76Eric-CBsL#ye(Db;{UIJTG#`7#{*_##3UJ9I(&2$6*Ku zOGb;?7~4$_!~Qpi8XxKehxx`%%;YZNrZRQ%mm0ZOHEWF*3yC=%iTUME6)vOvSMtwR zq{{Fta?WrNj}PRl@Xr(XVYm+h-fh{)aIk(^&9 z!%35f@$T=h4iu25r_LvCYlxfinW0n_w0n81{t9Z={p4`2pgi)6`QnnaLbj>$e+0Mw z8AAC#0&e|#*Lw)$zr*-p`Wx{j)9<8>OuxmKtpA#nq-_Kc8h{^ZS!@3jO7q|0axwq* zEW0+8XZhVZ=KsvJ>`!n@-&D&$L&wzm@14OQ{~d8C^KWOcYZU3vjF-&6ox%PM#`U-T z`-i^$cX)ctf0c*+6&U=_@+8O%hdc#>~EGyx8B`_NckIV?exYI+DC` z2#@_Gcb{Xf?VZUe>ec1?an#X#RMJ+%)wG8D+00`}1{$@ucQbpcT0$H|YRZ1io}Jc6 z2Cy&r<6F#y0LdjtB?&lOyP++3d}h;g-!jN8W%`j#D)CJUr<;&v0&6c^SGuJmoa}#E z?!Hre_Tsab+)p%)PWCUv41BYT#9`tE$s`Qo9m@mhr>z`q@6f-Ed!bBZa7Mj7LJGQ9 z$nxWasj!#voZC8(*T*Zt?#M~dpiTgI6eY2MEH$ zn_FjPeF~$4t?{n$BTnn1X*_3N+cxH9_&z+NH45${dKkt(!rO0$RW!)KU>lEtBY~0l zh{D`7(pN(3K53;}q3lPVm(i%pUd>`_?`$=0yUvjxS=0zRzkQ!sSeh-_JJvp+pP$Np3?44xam9&h%Xg4X#D&Wdc$_$1P^dm&R$^9;gE5j`#-OP-O!z}}8 zXU4_lh8KNf-g$+`&DuVsT{PMIYtdBYLCq*We73bm0d8f6IH|T>bbN)u* zRmEzA6-%l}Z$edNAk9!*KwvUl&~U%aP@Mso3beFU8QSkmXfvuZQr?+h0Z`_h$=U3D zERB~Xx)K0oqEwk304QTp5CgaugDjm3PYnxV{(xkX7744?h*fd8!m)%QP4}NvCVet{ zi9iet>%4$DIYttNhS^>aJ~vWLIQN3oZ=OLbvnOrhuF(ER2ChWFG62g41B8himH}2A zH_pfT7~XHLH9cC>dpw{YUN*9eMsrUK9f3y{v*(<9b%xec^DF-ONg0MjUSU)vFjt`@}8G_f17DLJ^Uwbt-kI9j~fed^Q>F90@m zn#k;x(?EFABiG1(L^aIaJrhLfEI8jWJFi}Sbal>OP&|c^p(b9KyKw3DrQuHeI^n*R z8qUryKYf+5rx9AaTW{4#&&sPerMJvBc#hm!mrUIs+n8O2QXL1s@KX6?vuj@Yt$gY^ zNtwH^`A)A~gBow|kGn7Jl}h|xhu>QZNV95|TP;zW`Co5}8;I^EOuTi7-2S-Wk3O0*+L)Vx6+`RQaZXgIyRvow%QT$+o?><1RGg|ITveyW(#0?;N0q!S;fu z)yo)lvFSZodt3N)LFIR9KRQw5e1hI~v6t7lbI|aEt)1wj&DJx`g^U93;o$?5exxle zn4&Z`kvXQq?9_`f=zKx1VQ|QxfvV+I*S%yECjE+h*v_K2{ScZ1$yQt7DzRfeu5-jz>n>yidjxvwlQ2`uESNQG-USoyuiKW@>8pk&}q>yL3YhO3V zwF4QdxfeD9t4~zo*+RFP(4Fd0ZV{5kPs)rC_7>o@8lX5n4G<6|-8uQ-ox?rSrH?gI z>228Y{KKk=qdSpIz;o<(6ny;?0na)*H*fiuRg`XB)`iE5Rbb{s-wAzPf*mf#s?FIY zEK5BW%BR)kP4&#boH8^6SUgh_L14;;VL^(#dSO9Xuo61fFjLWf-7uaGqnB)p1K%z3 zMZ?>`;|~lx{*>7yL{evg$DdD+&r-#XhFBzm{Uqi)?2Sg{DaUw!YLjR)bqT|sj#*Yd zBf5hd-p<`-3&E6*(WRjN;N-umO_EX)eP@&P9LwN`uj z8meU=x+8ea0f7{%mVlX zVH4|39i$!VX;wwO`cA!_dPG-lfCz9i!(aT&|Bar%uK7|a`48Z^82*9p&FvqXhUyH+ zD`K_pNRYFZV?VQuq?IlFS!vV>^`tEjOa0xe{;bzu(9E~bxAKey0C?Uqf$8Au#Adww2EdA%fr$j%RA!@!c`em}YxGY`0tR?BcTjQy)>@(x&e(&UCn$p?xRG6O`trQNG}jr&k0&i#XNkHtB-_ZX3K|(AI9Rl0Eo%6Dv7-f(?qw z$eotyTZ;^&Z`fBrVQsLi+`DjA5N&WY#Y~#GqB}heZAnQn3GNIT+lBq!@jy#Nly}+h zXjWc)PIw1#a^GQ?{cb6IcbeVNg7{}g^InJw;TLj4p1ohOD zX19cw0m-nAWKhvjJ>(GwWJ!b~`P)#P(Z)YSM-WVs4Mq#uh^P_j}9n`b0Ym z43|0WrEDhcBxBJrg9h@P41@I##5-AVwmbZZ;?lKbJ`H4s$-WGUhW*60k)%GjH;th; zhXsilpvb@h#76Li>jNyvB_&zPo)~{qhIA_I=LDJ9Pe0_?fkJ@v2pv++j`BE6SAi-3 zQwhqkt8y-5N6NmO0mI{P)te-178OeK<8_|cC%aunE{ea)_8F#AQW~g(1t$h%-A8Sd zon#pt0GNRgxGfVGB6lt>FZU$-A+Md8JSU{oQDBMg*fJW;w;4isOqlG&%_72~zZxC( zicNTOlpa0qelX(kb&@*Jj_n}hgbdJBg4}d)DI$us=PQreOtAxR_de``;NlV^jWXu& zP<56Gv_M|nT8b{mvw?C=qXmeA;jxmi0<8O>EiKK7fjW`FO5S#VtZ4dYqhqk#0+!p9 zHExn6ib#bxf49vJWGu8j%Z6)9oUw1Bwd&5c*ycAa*c#u1*6rDw}liVBFWu zd&tWN&QLXVF1z%fqc^mm#z&wot=4sUHdAb|S(|TZ@=3xnM3tAewhGk~~EQ?nH z5Z;3X7>0Z)tO(@9g*!0$pOGn2E8e8By~ePbC2N)2nd|_8C8|mB23|IfyoQ%e*&LW& z0b~}qcU>d11#E~B0G{A|ulLgV{6`xY=E^vlXEO>W^JsJR(B0|Ss_|F=T8W#?$6q$$ zS5im%kC;ishaB)F4abt*GPjVpW*M5Kj2<}U2T;xa_<^i+Rsml2^sbATe)7aFaKJ<E&b5EFTBLm0 zp1t)6je;_KE->KfA#G&fS6@2X60IiL@_g;JfZ0Id{*vo&-qB@%_dwGsEgm9YQr%{= z;PCGz-A}{_l|H4}*jP|*#u<>^BjY zvg~fTn&jD^bCO)%6u_OzSXR97mKZcsPBqNU_jhA@?3)YHfoz0F$ZBa=OGNsxd9#e@ zDmmtc($>kzN=wN5R0d|Zs0g*cYR1L6`Rpzvq(xf9J_+f`Q6bXBn4)4FNir!W>&jVV zb?9$-Ve#5rhJrq{l(riCF|+m8l0{ZCuz;uP)RnUaDF&lA?1{tWy7ILHb@nnA<)zyp zV?e-e+6qyMn8b<`j-aaK73HAL4I@(eP#Zf;40q^HaFDT%13=rC*XCfpX_4(RQv?_+ zGdne(oV81P3$N1VYpt1>u!oJG(}1?Tiy_~J_B5TckAcd>9kk0ZYR~Xaqey@hr4gZG z4&QWJ+?{5BvmicD!!ne^CaP)Dy`cS8+IAqy+ZiBScLKt7H3}eHUk38t$3VFLJHT`? z>`ULGrS9&~YG=K8`))bv0ZZfOq6K_@+(v{9poqW8W}B|;R2OzJr0RLCh(FOQXjgk~ z=nh8mHzNCsA!tkM6GQhH5Loc^7A$YB;3Qr37xJeO+SPEO=`U&98yCa9Ga_O$V`J|f z8CDyk4&=m=PCC)4+*b5wHqxow$miw6&t$hgygrj{>Z5YYi5_8CMcPeDk{fz@%bb1{ zo^CEviUXTy59W#F6N!X{Og5C%lAqWGyuT5aUNnUqq?mlDv6b2 zZlQFtp9&ZOejy^v`r`+#U@I}p>ud&-%S4#8Abml$1$Wk{FWBe~Ed%*$t@d6GEwk?% zW%5!6<$axR1K&miBJ~REj3XleFvqBxAu^pGiDQ3Xg7rrk(olJj!q$8r(a2GJgf7JP zSHlR~su&xn1_S$>$<4q9+ZR^ugmUiu%A{$;a4N>&7!xat{aBr|t?FOqykus^-hQn= zGX|T+T=~b#uGtHp&d`FbG*h8pG;W=7^(rhgBJG5vQ4X-vO` zs{l;=3yqKIKNGJ0O-FU~{-JaK9gZQ>UsbDr?c8tG>c4?ufB$sX`8{nc|DkjL9my)w zZ!b6S%l*a7jp;_X`fnw_fAh=z?&r0H_3wJg#`w3r{Fk^Q@nl$OI~Ew<_OoT_=}v|S?!$11-Yq&&tP~E zAMWj2Nd0oU4>8B~P#abF=J$MVX|Q=X9Z>2nNu@l_L9PLI9h-6uKa;}k9~Ty{?bBNv zNc2vwQ)o&>UA1pF^17YN)B!WMr}6Het!Ze6i&DKc5-Y4%Jpi(37Z+yL9mz20M||Ja zs;S^@+|h{FNPXfQM9?G9U^KN&jSJ`NmPTH^u-~n>7*R8cEyYm1ABbkj>R93;qIa}7 z$mQV;E3nZ-2EK(2o`^RuMJDvxPkDlt=J9T6cV*77ENSvZfhe-o={a0mar%;UG( zW5Lc%b0^c?72A-r_eqGoO8e@m+-76*(sM2aQ6)aa$24~klV171?$omx+oZ8JS;Wc3 zEuroGwBT+US-3DaD>E6~B%bw`FNi~H`#Q}j z&9N%09i@G3;5h{@w<_@U(edYv(y2G}XeM_w?H)^9WU@M;srlI5u$tIG*7^{jM zij^H&`4!rSE14d*GPxVw&W<{5cjxww@HJCA{I9|~w@k?#8Iiq?`92^i@ z8h4~#BmHXT_{B31(j#1sz%eb($G;GiR~>(Ol_dW4t$!yCn%AfyrdZdaSp{jO|1U z&nY2E!|~Y}OTpAR$>Fr&w$ldD3;g{F#h?2|&+8p*?@b0K#&t)p`>E6wpFNqHjhQ%e zKP?LV^nJWjInH+QVDGZ)>g`M_`^ezRBD<}+$VT(k>$DSpv-2^t`|i5Pj%9T9bzkyEwL?pKb%^Z*X$rjHdTAYw5{IZFs_g4 z|Evn)#PAxz6|OEk8iWKLaeZZ;{OD^|!YVz?oUT==L8P_O#Rs_(yJSN3i^x#zQ~Bso zG;$$K<$9{f@702YLsi91Z&p>wI&j?{qO4Zu7SE;a(JOUubqTYxrq&fyd$W~(gpND+ ze~1ueEk^B21^FJxj)?ObFdpgj-2RT<@k*8cIA2Cht+By;2W?>}FmTeU(WkXl{etkG zg1&8M=TDm_K8`jo*St37vY%B3O~nsL)wGssWJPQAdWBGFd3PZhxF||EklZ3ESZ-?e z_Dcw;a;}s7cJd}V%z!!VqvqEBQ}K3_+M1fF^UvS(Mf3N)F2}pJWnCCC`P8;M-6wg! z+9lWuqZ)~qvoE7B#PoJoIfv$UzwXCecWYz~C6U{XZf2L6o@jM1o3M2`ns}8GC%yK0 zLXjR#_<~GdMQ0P^@gnoXe2y57k0y;O^plS+oO+k~O#>hh9(eT=hVGTR-o>zZm2=Sp zZWM86K6CMY`0Fp@iSUinfx|nV!Wb3S6m4PMDOjb4cLZG;%J)j@*?TJmZ~H|*7a+?K z$MRo&fUI4C?3MLGfaT+BESKFHWPt_lg>*Yd^E%2s`q-n6QZr7Z{+(2+sDK*Gm zkKP2!GHW(mmkPcPib)+svMbZ;3FxB-Xp8>Q*gsuFXy=}tLd2z)JKvKUsBC1 z*+%T4*ITpX@NZ-<3lniU#TdxL{H~CDzLzRL9ivPdEeJJ(f@9-vm65 zp37Vn*VM7a-U%g8IA`@ufVtd8#d{y&8QA!73l_&*!)T`3b;{>poZ?3>@q-nMFlMT^ ziZD{h_{SHXtRdl7az+&M=t2>1i1c3*q06NQ`DQ;bZiU?|PtGYDES4Vkv`C>f>$Qp$ z?zdBH>7y+9?z$C}zO#=;KW31rr{|T8FV7o&rjw4IVI&_$7QTqngIki9XDZkWlhaGp z$|)ISglBqXN*(xr;J&5lCSLTmvD%hT4*G4sB%>&a^VP+t$J;B``lN-Jf6xdc>B z_9Ouf-jhG72b&mW9N3N_Hdm8qRx(}q&GPO4h=z1oc$CHR|t!SGzS zlxE>t^ZRTpq=EV!om9wu2=*_TJqcq4Oow2+Xno)khIAg!UC5-|4L_B}z>@^mumi5a zA6&y5a1AWr8h$3nQ6?!Cgz7fJY&03jhm0m-m}KD<;fCca;h+MtJtLnRXY zJbGBe^hoZa_IsIey%_kwT~XsQIRqeJOt(J+6A5lOSv z?gE86 zWxMNzx`g)IM-c&W$3cblX?@C?Sw$Z;)N;(C~5M!xsVEZfW(q zEaBgpaE9!Z6KlfM9RtPB7RHW;Sft|o#P$M~?kmab&18=fl4`GQ;-Hs8dEfYSHDJU4 zXq+YE!&?oDEK#AP;S<7~5{sq`HHn}?%#w{b`Ps4KFsjGF;~JBY^R0ALaDXTU(=*c` z3$OxH`fia#mYeTbpWv2R;*sLs5~h2052WbG-bd7p$=J$B@>JwN8wNpJd>HQxs}yL3 z?f4KOub_u{1AbY_vEBFGvSVM82B9_Lb*8ABs? zI7VbuR#i&UI`w*>I>$qP;J7qw0^EwBN?Ur0e8qy*YmWb&kzV>`nFE~2GLuVWNAe-= z@OtJOZ-_SfezF{=+m7EsWR1KI*x~1QkdglktWK_rnx>S7iOE)5@G^|!E2>YO_cnt% zaT2^lra7O7NDrZg=navs#H1U2!_@tw>vG)TD^CeWIXzb!^tO^7yx|U4gZ}NAu3adU z5{<5DT3?F_j1yPie>5;e`Nk|Bxx=n-9kqRcFyp=jh$qq@o&aHnqTqPZbwD9MV(r)U zxYT1K%}*`zt`ih_(*KM0+{gA|x2ad1{X=!G`xU807Ym<)U&ff#9&bI%qvACeNv=yZ zb5aoT0>N9v3j}Y@`{}-z>(BB~NH(7_4u;r0jQ)CjU2OOfe2Z6XaMMI;t~_;TT-xz+ zhIHEwOPr=AJ+u7%6m$j8cm>(^rVnm)Ub`4*S_! zZKg*-h90;_-9A_{+vCW6t zfCe+eq)Az+MU*kYEv56ZSu@Ihq1gvdGMuCCg1Ag9XUse3@--%CsEcTwFelg5f0dS0 z8%mIfcmOPH!*saA4~W*6t9Dk4gLkfIq}#-pEb`(Eus%gePAjqU*+-Y3<53QR}m9yOtLf-w&9Bn%FKXGu2}nWI?; z6VTlajw$i33{tySNL-75#nn&4?Pe(G-8vAD7SB2Jyp^K2t~59gY_MPi$Bgx4{-mTg z8sWTG{_}YFiS8-NdDCl&`g?h&>4NPH?H6x?eG_)XA=^17(R27sk|!u{S{bOA+-c6# z>}*s|_7z1OuRcH1PK$OJ1_LvT?&)?;oHMqSYRY_6wvGVW)T7fjeIL`D)AZ=$@6g^I zRL!RsOw$i&kGDHyi21TxGuitXJPF-tmJO^~HoP?gPh*JvB~sUpzXu6?11E=JP>Vaq zfl8a>A&=GgA$YB@F1u}CSJSS+#oJz&wXeo>Z?|Wo_V)O~-`{h}d%t6Fa>*xod`R>^ zB6k1Gdiy_t*!=;5{F{6WO#cj5{%@3-kU#aTe=E&|{1&vbLjN`C&&J7I=P#(8?%x49 z5T^eQs}6F5D6+G$G67m0%Wn%e$e%uV|AtowFfa{kJsUmSf21Tb{WDqgfA!=2wr^vF z{*A5`as!5e9{-!)?yq>K)jxIbzoTn~{MEqiFN{RUZv(ggymx>9e`Wi-47C3Wpkrp^ z_(%UX6${l$Z1<7E(Un^q9ChLR(qG{uVfPt!y>AQMPt&^vT0$P7iuk{C@E&uCV%fNG=ZlO)k*0%Op&XU#+Wr zAQz~O3x-}{lKd}HZOg9P#7*%)+3LYt{-?6_VB!}^kww7n!}@;KTOZAE-diN`@?BWXn4Q8`;fE`QnmhYu|g2 zer3Kr?&hYHl-@slG&FuG;+QbPeBOEZv9s{0V~k~qs;^g4kn8lZflOR#{6w_N&wbxc zrC;OvD!-nHf17H;mlQfWEIw|xi(<9NPD&R89U@n(e(&Z9+`YfXwPPIlBDLE^HIJo(WP|A}2w+K%HpZ0Po?}gO@2V-) zH7m-nD(VY1_*RBx7i4IJSE9ZDoBR;Q#RkqS08pC9uiVnUGjnUKE#I3^0iUZZBI7xG z+-|-*Yu)f&9+4FK z{fsbLOn7`ASxm9oSS@j9C8O8ZxJ!mEQWX>|BbdRYNDf1#LcV7hAKz%nue);H4Nv6h4rckbdu-}$=fCIGrE~noKz?=BgehHXNrn* z6feIn-ujSg^FihHx0shBSXMaUB@4Mhadcy6{D%(&rb78~a~i8+H1ly{gNYuoIEla> zV9?|H=_R9D^n+{=T||N%j~LN=KeLi0D6h#-h$GOW6e~9Ie=28_M*UI{{ObFi=<=6? zp3TDLu>sM@15*iAt3zdUbvX_E8|p-HHoCOQwbF|^5Wn?OV25V_?C=VJ9p1=Y%)syO z-}&|rKtf9OubD{mhf#hW0!OaB4h=jJo1@RhPN%)a+!=QyUm2DU@a&3`zo0~CZ)ZFj zHA$-`AXdr#8gqO4F(n+~JG7p~GaA3>}Z`Vy0zb9pgMN;Th%ULGWaJ!v0qtpN%6kXhhKBypbl_ zwN#p+_P|05D_j-mdI@)w+oAqq1p+V|^pvnaD+Q@W5LnS`#S4sryiI(OyP+oZTUNF6 zv5;%?F2oVEpq;Ey+!1=<7{?rFQUh3)>dS;&@P`R{$2{LgUmfN#90;x(U!zgZd)315 zE`uZ}R`?>p4h)bvfkoAZr@=rWRsR=E@k9X&fJ9w^gbj?~tH(QNXMlp;M%_P}=9p2* zoU~;fecX?&6n{`%?6_tE+^-aX`xOvhTLbZR3=m&q{wcoR`*;XEu4K58q5}Y%D|7@H z?&XQ4<=TmG12y-x>;$B^xTdQXn-l(^Nz4xVYybp<%r@YnB==!SJjYrNZOlM0NUIuh zpOEj`1gUO0Mjrrd3Oi^&mz)x_{cIW*NDG$nW{q*q!1Jr_05HNU)gV80ZP1-H>z(Vu=&crUmLn|o4xlK#IbjhzOWq1*_IpoX$4a3T?CEb*?+4pivsLCaF|u?bbw0NG zgP!-v8Ktu~Z<*&lnn{@rif?GxJU%^vxO?+n(Hoo}zR*TZJH|JHLy#FJr3vZIX(yGD)WxAts5J%B|4Z|Na1?`)yQuR8932dR zobV|2x5#ZV>LK(GZVHmSn83Ey+X0v8hrvgTp0uC{?C$Se+{&8AM_b@l7jp-LTmuYp z1~ABt1@^_002j`(%nx`y&S4#p=mXn5#qSqG*N{NN;{EFCgThcp0WAc)45E<hIU=_f_6X z{XyV;EOU(lxtl^cE%K1MbC`mzMPX%uK`byMi!voZyYESaHXQ%EyZ3RLJ;W+y%oOg( z65eYDv{~&%rLM7)>=?y^5%$Z(Rox`Oi==44#p02zWNfG)4k#H47+^SRPORmf?|zJ6 z62>BfO*i5yOYI5AUK@RFgWA)E8h)0P`|Y(liEaid1ktAWsB0PHc#+pKJmRGg_BmfiK2{pG$kwPcnG%Tt#Y zw5m0|Z6&8cWP9Dta=1x+B)QoLF2sifNT}_My=_<#_)g7^;_Bp);fiv)^B&Z(;fheb zc^q^fu(=IhlM`2$2@mJaHkb!`5d33PTKws^53R-6DB9_l#vdK<4&C38D|iv{u6x&rzpZsJ5bBkVTN}XjdAaY4MxR)F~OU!8_o)mrMY1z!%C%zkmr0 z*(Tgw1(ofW5Ej4mj?;m=ZI7~Aw&-GL+6V_Qzd~=%qZ{M!X~w-Xe}>AHML0kYLZqys z4cu{Lp|>&2pMe~LxU$=6uXm7(M}W5*IH1j+QEoOTHZ9i^X-bs|wLioBS^S9(6cDND zC_t5ISE_$lb-)rWE-W;LhN_!`y#40GW;vhtDYHkp+OWS=Y*8ro0J^b1dL^=x_X~>; z(A%J-%eZJMGVzWJ%)@wy#@}&qHh5DQr2$@^Rhs!TLfCge>hIcHB&J8xEn>&<)hw(M zL5yxG^WIl6w-jjb|? zYDaOn`WOYUyQ-NVJ>N*t$pL%=#y8(4jC2_{ELS#)c!7;1I8qvTybW`90!LmRS%-9V z7`pAHxAU>GUtPn1%-hA2@1fgg2O8PdfCX-{cM*ndE!xLN;7rTRaDO8pn%2W%sFYJ%N%1^^EF1CL_R(_94S^Wu>`YUAkzW_f!4Z~od)UOP!Ukte{3B4zr$_gz7nFcaq#|5D9il|V)pl^4kq-})iX6R(=gSt)%!Cn#s2Tm+qi#0 z&3JocU>PtJP;5e?M zG&@NoB|v@8ou#57X~i$IaW_5PLYTk-a3@vJz8aKKhCS)#(_*Ri-MfbiI^|L7iY+$8hom#RklYdB9ut9!s=C%|!r`58&THc8 zn`6b98!{W8HwBBXM0EItc5czshvw5Lr4&mi!;2}C0`)t%sbMNxwg9x?2`&A znF7>mRMvWj1lg*s6K|^)I;nO!Csj0`KaGBR>2|WU%*YzzV%qNHuyr&{93Ra>Q($Dy zze8g7+IsVZv9roW?7?Iervx^IDt$j0Mo1WO&<1#4nPyWB$LG-APQiojjh?p8<*dYV z7f=vTx<-C2kFku6S4=BLR3VgUJ?;TDhsH}K)_V2$#9_vHnrf=BTzJj#CF-Lp^jdUy z&No8B+a9l*$z6=(rjJhwCK7BU#RwFyalE+&-_yOesyvxdW|Btx0Yt=&;SjfO{pse1L&<*4YHn@?P7F_XB)t1<{f|vuHoq+70F#Flz#;FhQpIpdxQ7k4(7lh1ecMIH*Dw~LPrP=Ji#lAy+Ttm_ zt!*v9Z+qT1nYXY=UBAwhl~~yv=LtQl6wND^(joq1_$X>}^M-6pLo3rwZ0&a>@u+Db zo-}$Q6)f2s%-Wa8QjqtVo@hCRnbKX09ee}!$U|5PTwAu!T}98~GhpGPGjg(so_xe8 zCb~p&4+7t}4b6U0aA-~~*hp%%7v~%h4-0}8DK_9Um2o?zjzOMMuuSDzi@5@z#fc|L|=$~xFm5vzglW&4b=|V)HpqjzQA+OV{Aye)K zN?Dl_>qxC+^t{NBfh3g?ix$Zc5jks+)tRYo4JD=mjQVGQQNL}tdianaQr)U+;7?!J zYc^)FI5u;LmnI}a9B+O-Gfh~q7y(ig2bAIP1*0z#`4s!@jK_*Q12j|z&k#U5n+NV0 zf??F1xkGysGG>G>;s9+p`8$X)DR=8|?;vKR+-*W`9^f!|KiZ=Fh?|%3s5O95dUR5W zkCRww7TruafU7c3&ip`!k)5&o`}+ziMghD^1M1GQhlN1)tOuu(2lNMeaI%bm7pMm( z&o~#Mk6(w&2;x=oxzBDUQ+2)->0pya(232*MdgX+=q#Ej#3XrHplN|SBN@)oiAK09 zz|YYsm)q@9?WtE)-N3eRr4cA($2=aV9>dHqbm3w5ZZfozk=hOz~@=Q3%vkA%fc zb}8%JT+-x&j??G^+%*5vbtcU6+*Kw__`^e7f33;)rIvS3^{RdDO;1iDD4*1T&5j+c z=rE?@@fb0Q8yiU_M`rupfD?Y_+!c!^mswC##hb9|G2=JhS<`W%S=lNB zK%#u()p5elk1V)AHa+^*eo}cW;-pgQ-Tt9!AWDMlzQdFthE{1tZKaswbGgp#z3sp! z4-Ul#)#Hy}R$ug796e5aRsNN(K}C=9>4~+#o&KhW?C6^63G!sPg(NT??O8LAU(tL5p?Pa$SLiVdqZKh|hveA!%xy7Ok6vQD;0_cjy`G!B!(L!6CMhK83 z<{{M*DercMgBMDs@dV7m&#dP+1}GWa?s>n}hy&P_4im1inIa?A*oN}fEkWfN?!Y`- z!>GB}g}Fx`ohVImyP?&d8k)rpo77!mlkcN3wH#_Q)gO#Y?9P3Wa@@m~WASWiC9ZyD zDBieHTz!pVR@(W7+{UMuH{|Ljs;?Qxlx|Xs-ag0M$M*N&cfMh}T>0{bZM!0@IAy|8 zUss4K>IR7}zPPH({5!Qvn%>rfJFnZP@+yQ?&c_1`md?`Ss#1=(@rj?h?pS}058Lt- zh)SnKb+2;g)_UgdUV*+psqo~GP$SaBw0c9aPuinEB59kP%4E}Pd$jU?)&XKPQh#`e2?J~H{;y4l};2eeBr?)J?#o)1P;I{95=xEiz&DikfLE;t`7?)&e zT_#M}HF6cEF~2Xa+TLz^oE1+N)1vIu;TNV&&~&Yz>_aTFj8z9p4BrAnj4{m}IgZ;m zX<|X94Tt~Zw0pyv1PmA_Ej;L}%ziX=s^MvmrwFApa}cF#GMS|N&GF)TCfwc{rG307 z#u5F>XG!}oTa(~Ae=~=_WSR(+9sPTH49E%P@Ha{mkz+&GjxfUPhk9q|65JU-GoDx0 zAf$qVJ4IToNxldBO18yXl24v;!ajOn-Urr|?9kzurIDPNG$*sgRdlFMZsLBm7K>-L z{Z}df9_MDZNs}miH5F~zI=SA0cLDk?eHIjQz+5UYh;r8-gVJ`YN&+ zrOX#7p#fxKKJPmzLxF&iv(E8=t!6BDksj~pS_3fnlxA=I8bliRw4uQv|5Rb8>xc_6 z64*~pA0l(~I(~9$QR!x%%yES6t|B_>udFldc?Ri|Kvy>aU7cNriNs1_7dj>ws#Q4~ ztB;k0qp;hR2kGTVcS?I{roVu%g4LEGvFe zw{N1X%T+zOZrI5i=Zct1EMzZv@g03O(oK%oQxmGSmsLZDxM(|W*w79dHt=)P%I&`I zJumC^6{CHybF^z>EZ3CR*+BA6VX(^@5u!XynbwPe6`6RmOv{vJC*?XsZJ3fC)wxMm zD>UZi=6w-8EsZ?&VMKb=Q=un;ZOndA@it;FVn9L%LdoiVsfkP`rhrN{!|m~P3Di>~ zqZeTg$*+7iwGThjt<4xc!a4AN&4P*xt#*X#dk6~c4J5y>pLq={(nnBpBL5=H$Ca4M z$2Iys>S;M{U|9(RZmiiMqpx2Q<7m8?lEM*qbAJnCf85pFX?WE~(C{eo1&$5%w=73o z)i?7dqnN!U@pEiPTgQIF9X&job9)BBzNS^bP}5F-ZZjl zX17^?Tn}E5>-W@~>Wf-1Dn#vEng><}&10j!Kl_HY^hz}jeY%T5oQ?F0svPuZspT~I zSM^=(e&lyZR_CDS&nO*NlyE&Nr^y^D4lj0W0!Nu03ix&hn8b-WD%|bnG}^8xnF-FW z=3+lU&cR3eI%KHO^{pok2hyonO#UGb$NzN{-2+auSP>h!>HwwFu5mG^?UE9&0PY94 z(6dHAFD65pPo>53rhU*T3lqXQ#t(%rRS1>CKT0ZqB41upXJBbD`j2@J2W;L$-icR& z-rKyP+|H(4o%dOD|F5F@+#YspBa+@`mTvKj&Rx)fCy#`}DnsXO5+BS#4O=iVxLw46#wpK5{dGb*IN8szP@WuZT;OoDL7hwN)7)5~k z^_Rd(?kl6Nf5b*$G$&hYEpr<)BU@X&zc~4`|2v!_?qB#~zXz9op^N=Jcmr$Tl|`J6 zt&#m-!KHtPFUECcVRr?7{hBnu^$Rrj&+W6;)6oNs`|H{Jci47ZFz5?%rH}nJX@Khr z`T~5pe{P+TuIZo88#n9k&)eVPUc8XMCJj)PqPr&NeqVxPj^4n=ytb8H?e?VLzEE8V z@ij{io=c2Z1Ch~L%NwyH^*NAAlCskbQOOUEFQ}Z0;_ZMF8_3g)53cH-G;Mwx!6JNq zur-CUI=;Bo>r*uvJRu;oVeiP-a+kUGa(9Ll=EUY~>TKQ%oY>6wFKK)u4y$;*bz*=O z+gK>DVms6ztvUaq=5{`XX#X=#lV~Q|k4b&hee29ct@7GhflnZN`&|^4n_V44=I)zi zp);7hG^8^lAJnFu)ouq(sArc8xxG9(&?%2`Jl;di&M^L_Iv&+Y!gMomMjJx4ys8!WzbMnG zRlvVSPSdaPBRwp-rcq*4dJiuBc8zm|j&H~}G8aSDy19KVKfa-`kD2}MuZEN}IXGE!#H>E{8bV%|IJj4G{B=?hzk0LolX686{bv5=W?suJ*X%F3 zarg_ael*0WIH=dY-seK#(_Uq?Le)8aaQaNKpQX&kxBhG=pwF^!L|cE0 z;rgJ8L$S9-i0Q1tXj6{8A%k?@t@!XM{YI1EzKQveVwjmY9@eZeovvkk8)kavn2C3H z{QhJZi3{5398}JMRFEMJ+nEnptu-^lhB~PvA#}Ev;7PGvMFd8Z9ChTk)bUTBcbDD5 z_H=n6n_Kz)E?n~>Cp9uEdZ=TuOJZmbMk`b;@H*w46xz=EGPw>*FkX#3Fet6=w7a%y zlVgpX8ga;zo{v1JK6>^n4dS{cp*qx;JoYIH80;N@{7(#n@`o7@nq2a0(6S$lq~B@q zn3nxcyN0$zLb!e(mj8LH^*wW+#r=04PKc!O`kIqPlY=cW(0qL!d6&DLs$CK4?Q5G!HFm0%K<>3T3Kmm>)+$xDjfOey|(de z{!-q|M7;!kZ{qK0{di>i+utRCUOAiNR&3dirAsx}iH!Ba_t#~cA%4xQ®jMl6W ztxziTq%g6_!YwR!!2;;LQ#)0EXP-;>-W;Sf?3vv;R&r@9 zR^ARC(eEwYQlgz&lcpTM7q?h;ibiZBd=;hCsp0)Fz&tW`qK+S&akfBL&e zjtuju5rub2R2|&BIG)@JXKRb4P38T{<4LhPV?v7GPsMX|BTeKHn{+czzZ{)%JqHdB z6j3PxDhpvHHi!%G+Rm6^posxCcSiK|F=<+fM$^)`Q1-F*k|b+?#4xPapSsGiqT@`+ zdL$I2#%))8%611xwFpv-9$+>8FnEt*N53xus=wAR2Zf-&Q~%|mv=|b2hE=-xPCv(6 zc68YCD66!EDwLfXGmTtl8-0noziVWdX^pcV8f=-q6=CEbQl5;|&e3SxsgcWuE+GE| z@zkvWpEirc(3fOvqKg~3)b^$e2l3{Ca%GBA3l6Zvk&J?WlxRSorPQ(sLy4AR0|IuT zKNko+=%YkT3!sGIX5S`3UVC&S*CkPSxnwe-O?nOTqN7c5msq8G41>ctBq}yef3NS? zMaHshWk6?P^B}&$o>adA>p^1LES44E#oRxx;w>9+~_VGW}svrC9F6mUy(lpV~rY&m@w<;VvOw82#?Ka@|Hpl z`c!$B3qqg7MUckTQr`tQ zofC)^wA5sXi(DI5PJQ=qN*-)rFJC*;GP&by_qk&z=Cy0COw|zGWRbYl=-lhauY}`s zc?sv;68j#DLTSYfb_LZ=%;aP4Smd8X&ieTD4vCj;!SA#*qtbsO;d!~O=_YzR;LPjh zT}z@HY||))g|R4S{z$D4ahq(LFv1Bj4&lFV_Xk8`_Rk2Vux0wkpdDg$s{5Y$jAni`Nx2<+Ss{`=pwDFc~|lYLCjM3H#Sm05~(2yBm>=1{8snfnL2%|VL59kG)@Oj z7U)x62k2FL1DP;O^Y@{Kz4qBeM+reG0u z_B?w!TETqrpkBLh5oQIn$8wAH7uJ^7@O<>_o!UM7lH^LFlHDc$E{Vlx0)Li$PS)J` zPkI+4`weGhO7(x@Y!v{{BIq`ZofRSVc`ol55m(F(Ie+?2EnL?6E6I1T>fN_a-6yJ#I}uLJh$eIYV$hEW~3R zBuh@!oTl0n?{+RO z@TNFsQ}aKOai0gvSiB_3MdbYW$M|xf_tL?ad zXBR&Ut@%T=Jbsji^CvXj@26R4x@}9aqOfr!d??iNWrmB|bC;`{CXZIq3K8mf+`f~L z_P(sTz>&mcQ#k0D?y_(d`|8(2PkP9*PX7T7!~gqT@>riwF>MX<&~q9QF|h_xR?6EK zII>vQVq&jUAz0*!&SsZ`F!83G!R=nT^ zwicjpJ+fU1z19vWTos8wvz7!N_vEqYz6CW=17g?=TsPa}oEZNIhP0IVfPhX!dS4mA zehy8V0J`!N=PJvw`hykUePz-1YAdmJS%lXS?MkMt$1>X#{Dr+q>oes~O2#V1V-#(> zA(wyzn>6?tgwRB_ss~5R+&kpLcV~;}I1;`IpsP_%;0p(rRz^cSUJ2Z-I3*`474i{t zB-L%CpC9G`rjkiSg~Mm9HzpBP4rV2Vu89NHCc2`F4B$Afp}Hy-@HQ?m=J94a5BaCz zOMqDND}s4Dr=(gHFwx=!WLxRyc)9Yh2KuY@iX`H z9LbegPBz>rtCiVeUgsLW;ET!4f$N7i?Y0TNKn^+Vwny`>dbPedp+(p>ZEB+K*{=Hh zN0aMDNnm7!ej0q76ubW-#Z_GpXHcF)xa(`S-~|nlEl0+ z$jL^r`vx2bC|pT^PVQ2ap)!$YAfUn?nAsVC8%(Sl9*u@~bYyb? zae~p$r?&>By4l6lDt%$?w+HP{y0GkSXA-(#HPD(r!~ofCj? zWpmUj4|ckQ@#oofFABF8K6RWKuuI`=#$FzF)pne{Ik%EnBy~Lacxi};wVf5~PJgHj zHq#qj!t!0K1{a0FETUx&MfV{S^}W zKZ1wBAcudDCvyDW$LW8MX5{+Kxc*nuf3E+|xZcLrPG29E8mSFH6M#MaiEH)m5Y@P@ zxK=Q+BO5#SPjw>KmEqYx;&u8));2!?u^)`9KkDot?Eel^jqA!w>}jaQr)bHO?!(+SMui zt%X-2&wq40)7AS!8~@x30kR9OBnxfhn*stiS^gHhvT#`aT5 z6@3%qTz%~1)@KdpJ^9nKzMLuA$K zEyb72yL9-Lq<7OgX63nI3wUU0`Gj7#N0vUz$Lq-Vg|msN4!0*Hm&-gycNMW% z>Y7cZE^4vHI5cnYhEyv$QCt-z^9@wk+EtlPapOY_zS#*lhmm@qdPcZ5${iHf4 zY|z?|Hg(I}bBT0jsRg?R^1;aut;rvEjnelK{z>LjHm(ROlur~=1j3VC$o-DrC0Wt$ z2N+@AhI)tT1I1szhs~XSvNW*f4wl7#ERv`2a7|c|TB zbfAeM0GcR{`;}sbWDcD&A+cO(^L+_exI%#w>0UYlrtIwye?Y#1+64LGMd}#a-bmYj zglB^LC+BMq^mKxDhy>+K%p~GM3@`4KvA7k`%}rJ5*Fz>K1c;!hCM4I<@fBvtY(WXs8bSO3nhprRctQ z<6<68slW=NnZ@J%*xg#VsNh-H&xo>%vR#RoLf3#`Q}$Al;Sy3Hmoh5U_8ia$YN>3X zmMR2lDSe=pf>BOx8NBl8)jrIe$HU{e`eDLq0%{;@YnJc9VL-BH3Q$cLnn#GCz^lWZ zN64VSTk?~rrT{;?+duBtwdn;lAI1*Nf7S1GFxQ}+n)4HLWXuR#9$d)B;V2}!h=aUD zDlD`1R5r$4AiTIR<{GJg1hPv}@L8A_GHWSLi?*&W;7~i3B3u>?Q6xKWmQ=gcKOB!2 zOe1?UcZHF8cNFHcma1%(K#TB7KiHJMa%^X`bHD#;5Bu)0%_hF7P=Uso%kbR`*QYr~ z%2tNToYgrc(XpJ02NpwXq>G$FMO{3^7av^j9+}SX*QkvZsPmQz9ri7*JGcpVXFF?H zZ6A<1I<(I+E4wsCh;4B{!ZqrhD$~U} zDLieFP@oyI;g(QBbq^AxH zuxqDqVzD`&eA3@Ji6Jezs@DQW;iH)+zFQ%ZHmvIym^kDb4~nhSnQ%E4z+D z#Ur*4Neo+rTW1M#r0i{VND7x!95r;$z-2^dPpu3k+~r}XU$#(>-+sxv{8Y$=yj?q_ zi7N1&R6vY`RN8A1c4;(_8Tx`1{at{O_5etP^D=^qq!w$s(+^j26(mZ=6+=VQ%<(zV zY;_O=)dNC-8p*|t``iqj@uD@pZ41P=-a(Cper`<`Z)r( z-dR2_i{V6(j8nuZCu#^#sfCX{2WbXpj3M^q!gH>Oc6bd;`xYqq}L# zZ?sG8S`4l@7W$JsG|lIC#Z2qjVp1OiL_Du+`}4IDc@_S#ub)Xvj$8d1p`+tUJjI-O zb%dYv$N}r-fs;$GXI@txN2*^Vwbo4eupomn4J|<1??r+3vhf;6wac`p`Wrdjk;&8~ zqrpLID)REokYj~gb?cVN2je7T|4U6q_Lf;fW_qO5-Xx2evM>q2^m``S&DPi=&;yY1 zMiX}RTupqX_D_L#ZNi2yAqCu1(f;9nE7o|B4GLde$l^trSQFjDdoCsZkV;2otW<&b zZ`G-_!)}@5LHxDUMVjcoxFq>Q_{-#*$R1A7Xory}(`t9!a+AYK9oAYZP_enH=Vgxu zCdu%$0qWUDEVGs&Qw!$YIeY?NUI#znAx!f@${yye>@~|C|D_?TZ3l)O+6lY}BsL*y zXHjO7eB-C~h)-}$g3VRiC?W;p2PKE;=|22(q~?Iva<$s@-%#Xm?l90iKM%;11FrSo za$_FtGnC+kuaMF`-Nzyfi9~81O z51C%thoeEmftf<8k+ng#BI3`#`b-n(=*nP`|6WEJ1n@4*epL|9@H@Z^XH``vJDWbl zz9QFIm;+(apF`nf+z`6Y+4nvE(?_e(^#^n1W1-gFMH~zM8*lQq)YfWnRK1awbZUx{ z2Sj~RX@Ygu~9|KjqH98Pgf@GzZm|rvwI#qSnJ{HWP2H*k3*{m1@2EozYMghbxBrTc& z|Bs?CWXRRw^glYvK&ZnNSuNVuHoAj zA4T~FL1Jz;NX#t+iMjg1;xN(~$*rHfIbHnPPuv7e^MvTyC&4XcDPSRpJX`@P`2hz9 z+o<`K=nDw7x}02o5W_@n4qX(uiuJ%%tk(h-g^FQ|Li%7)NC_+obyG0X#Vt4M6_Ic(1|t0&xMX}c&BsiG?x?!CkE2#D50JMGmVaoT*in z1>!kuYr9Ks&#u`!x7=MC{K7SU+uASQ8imAn%e9R-((u&assA=ZC&?tOG6meD$m^K5 zsS#e;Qhz<|T1A8_D(HdcVD|6Bi#97}Fwm?b`s=ZPO@J)^t?VI`DwYDFzA+=V(bM-v zt3=^6Wv=ENSQ{qq?(M2FN#_8T8Mb<`L?B{+3&$smp6geXeHo%Hp{!Xr?E)T;7-o@| zr1KWWa!_0p%>HJ0QN0`35M?h>C>{!CWHWr7udFxYEu!ELJbljZnmxg^$V?=X>=Z0K zpa;(0FTIZ8N9Hc;4SI!=T(jq5F@9!rAYvWA#-oiG%6sK=!P7BRq4^IV*+3&&hvg0H zA??>gB*kseG*Lq&SI{a0Br_2qYTlx9gJcX`JfQomiG!6B$wVy)ab2s30epKMbjBSp zpa+2gUFnIqCG-W6=1}5~iCu(F3SV6gNMo3th2y{f4c;C{mgqJf%CP)^Q$0k6SW__{ zsa4d@gIIeaQ-(xyh~VB;2|sYXB;!^dVWGh(H#6AdYRzDR_cpaKHpFoU9E=7HF!0cn zv(VXeed%c@s%dLn#r%5qe166b=f#$k)#JsjW`x@1$&jj>iaCArzK=nbbU0@goM}q5-E=WJNfTzLy zmz$AZ$4AOF_4|u4-c`O`ST1KZx*@E#v6Wp`(Y!@nki%9cHVL8^vxRygBh8&1MB6u* z_UU82Z7nOiM9_9`vPlGO@9Kt()PH6}!9U@O^+r1uh}E&*YV07oHN_F)2tByCY$@v` zQmBO=f5$QI6P|mjLhSA-e2F45IV<-cF}c6;c>a%Iaxf&}pD?+9hXTg=n>{@{pfmBp z=uDhf6tI6pY<@`z)itt#!E%3u6iag8-I&% z;NblQkGn!N|B<5hC$#IYh#WWM_o(pS;$6J#Y=0DKs*Z&afz;5c+?XXebM8$l&1?RH zQOR$vx1kK@d&AwtT)Om>+kO#k-rZyDpog!cyw#&s_-Jqes`xDq##OT!ndt>0&6w(u zfP2&+@$={xybJXT?>Z_Qn^`V%c0OKD#<)D{Ul8W`X&&~}k zp8cuT`u>EUpT*Q^V16`4ZQbiEh3;nDz*9+bRUsFbBlD@xQ-@(Q7GAaXQ{6S2B*L|; zN*=viL80sHAuudynqBh(>*4~*jqAMp(5&mw;9;_#$2^L}?foi!FN=tIz4mW^OB`bkbZN0`xiR9nT!|cxoLpaB z-FW-k#O2mZ{kpuLUagBup57<7IR2s$7m+T!)y_Jvhm5DMUT!Mgj83++-@&SS_ui1y zQvHn!o&lE$)^3Z64)UUOys=qOJNli08+Y&aMIP&VjW|g`%D$sSt(vlWP9z2*HW%;e z>*Ucu8Q}+oloH-t!Av0lX4;aVp%vL{$h@fmF{j3Z<(iH^x890PA~z@ZdrK^AHm=$} zh>{guHZuKH6$Soww%vnPD?}BV%?!>4&u_DN^j%tW<$K-OydF-%icm!F)B&9K7VDe< zZ4@}PgO<>ncZq6yXdc54e6#c4foq&&=S0+3WygkGe^*&)*|;E(eN$NeDVaj9cQ+?n zWM3lPPH{}-z8VC?4;b7M=xtX8>%Gknhlm0bGIeluCJ4k-%$ir8Vq79r2&IWlC0i%r zB&wMrX)xBu=-$*}=n!9Y)=jRzWrx%kszjj|HW!5MLOn+?L@|f2Th*pa<4sl12IuK+ z6(z!GDNp`3n<~~+fEFL_PCHqeB(jVo$fA!BfxZD`B3*i}M>O$dlKMfi$t2bphq*XL z2|?9g90?5Gg_k~&(t(+jSj&@8$9~j#d~4z-f5Q@r%>9PwD*O!kmgo&SW^S$jIYz)o zT27Qd15DDX0AMl;v+N4H&#V8rxw@M!1iy0W!sHf@zTqpshy6qt3Ga1Cw17EJ>1e>f zD$yGe>!p~y$*^JPZpTjgV4Ris{!_vj9c|si;_)&23TyJ0cC%96mLfH{7++xRO=c*#yX>r!KhRs3VxAP$ zY%qixs1tqdXLi(e6t2L=Gyq-o0qANLukO}SGiT4j>EZd_-UpJY94Z*AquJ@#4+2g_ z!oZ9N2%4_Uc$hZK)OV$(1P`aIo@^{jQwk8pEjmuWqI6sSVTqJn$C9HugV$w3pG$Vp z_=Z;xMbO6(QA4+;=IzsSy@r{fTLPY&g42rk-FZ8l9+gsRjRQ}=Yfs{HHAC&FOnZC< z4cNlQ?sTm=pdxEfZuX{qD7;6mE-Pghj*#EaMRXrTLG;;$#zNf8`F!2o$$Iw$xc7qM zg%n#mJ2F-s?z`)|*Cu81?&$RDP)2KMJE!XQo?e*tIxkGNOg@|{ojP`jQ^8QS-u#YT zhQk}ZIPr~%q!{Fs8Z&R479LNVs<$yyq;E#P-a4tPy@$H6SKlj#)ffWQr+M?73)U-nU)n1$Fj|$(dtQ$wn75Z;u)EhVITE(|vr?;A{ z1zGq^60&*cYV9+4s0$>cC9ov*lsMC5kz!i9upcg-wD;QCRjAo;H729KDug$#kLcKM z?k#mrYcj~TvJcrvc?B;fajiz$1G_7!wj$)w!qWE0ZK3m&M6AA#rB!Lq-X|#s2c>Hz zeRCkB;ip7r%FgkKX?)Du-bp~SdJ}!Y&c}DVLa$MGqTqd1PG7!)VjV`(5YFIHhfZ`t za) zN>&j#`k>L#?7db&N#C<*mIv;Y8B83|L0p0k6I7gd-w7u(EwrA|hKM|4R9hxsCzrvL zJz+ySDQ~7_^h%{FM$z9O!0xMhut1)q*kY1Yc>dyT5=3 zu*|l{_gl;KjpM9DO97Keji@A2^>#G~F}(vkz3Vu?ycUvdbWHxBRq*sH5cuTp+m)rM zr8WQD3U%fLlAkx99hA=Bmt7u$PoHwqMw ztK4qjY)719(;V`G&Gew#4cRV+Jt}%kw~7>AEcj$8E`;)A|3gxYdVZNm-eXACj#&`-zV5JjH|Odqji_n+BbUj z^_z+XMRSg2uIG1RuD_moNZ5cUPjKzg$2I@$7-bt?UF-bf4sT;l!*prYw_-GVo zjPaAu5?*kcBIW(F^3z#4LIg-`0cD!3y{KMCNDOoYtN$K<3Y#8^DS<*HGKe7^0bXGR zAl0sQ`71~v1%6v!r(x;3>7$rZ;LO?@<-yW*_uo!LpNX6K7e^RByqz{s=<>Z!g*Wdd{tk`8dc=yGI3J_jmy89ut7wBj0a!k0yV#d#wMyL#7SP9s5;p zL*>9nm^x9UsU%(DTO|Tm{Y+0q^*Y&OWJu6J8^*|H;>bO%yI%x4tI9F;!m@$4-!1TR zG^A3{=P2_nhNpFUPk^wFTpQ`Up$>1B5nrWGiN)jyjuxzByEBRGKriKeYOvBB(?Wk*JmM%P0F`9ge+~%$rDwYh0ei<; z{If{JZuXoEu4~#miO7)iC*ClF$9aB$dL<&u96tdms@V(y1}kI>vCN*^U8;djs#7?- zT{X^&jk^h5fEA@AXWPAfG!p8Vrt%{z6QS25NYUb9wwQVNF=xWrNnakb zhm4nHAJMS_&&Ro%u(u1$u2UR3fz9***EN|gh9dHa?c^a}VC87`5cF-6hp@g4iWl$9 zuFo~-+c-?UJ*&pIvJfAS$Fdj?Dw}ctJ}vPSA}BJrEb_!4VdcX({mRNEQN&h3oVc)K zZR2L?%q)|WE3pP#=y|*k=4G^b$9*Ac)Vpx6PiY8n9WQ*ssw`687r2GHD(s^+*`6bO zdFFVI08y^J4;^B`jNA_l2tE-z5F2D^;pvX_BZ`v;bF>S=1M%HGE9AH@x&2?q-M{+` zUiZB)Jl8gg8ziofZ19AcZqaGzlFA<=K$0E7#zgO!;`Chyo`3rel6HlQCta;widF_( z&Ud(6>jD=U85tTR(^1a09Wg?xg+Ox8D3-w&<1-H&6jx$I#`#2g+Y<#dcAEQ$Fp|M+ z%^)A|CM@1noke3luU1A%|MQ0zY@65mKd3>ZM>&7&LSulAlB3-)4IX;gz?D+)JOH?V zeX#g$0{p{tulG}ZilJ#IJc%O0g_E4>D?Mm=Ko5%Fjg(_R5VIu+V!rYZONpf-QewW< z3Dz;d8k6t6wATy%M%shW+lBgZ8Jkyi#c=k6;hjTf@{3}=)=&&ie-mR2O$YzU_ZM9= zup<|UUH1~YMnL~~X4{>=1z2-dSFAY@PU~qD;oRuk^-WPEDi9Xz80zErl0v2^0t9_&Q?dsv)jO@_Hva=^> z{X8cDTXSpfCvsVRl;z2=a&BGQhx*5@=;-)`y*W!ZglwWsfn2&7;|83%zzL6#O%B2` z6$T&oI{8}|IfA)qTi-_uUZ`c-?ZhK%t;!VmPXLx~(&!_9VUO(mvtx0Wu2 zPoLBMN0{ud;Fn!{q2E2Mp+e=@b86i)d@4W1?YW3$qBb)-(7M4E0xp^?!k( zIDVRh!Oq?d95wT;XFat)5U|B|N1nX z)dlJG%&$Ip-)s-py0p!@HV8I&vnZ&a3ou0pev97)TF$#ir`_UiUG?V8Q9#RiaRTtM zrSrvYpygy6G=pb3M9z6~uesCW(&eZ%nfbDwpX*KN>a&A0qsdF@$K}&caqWg-QcjHM zxn_%60hd$n+OwTnl&b0vwvyz!rK!Hjq$Rez7xnvdcGc9gOe$552GtH*DRtQos@FHs zpYmo~8l2TMxiTYg+eyDWb%ZRfpwoNQMr)9&j$}b>yt(jL{C#F0EGzj~4Ls{g&-`)1fn$&%n6oB`K_s+uEGgybd!6#h z#M0|6TbZer7@Evt26J_qLS_{3n;Xj6Lpc<+cM^wnGhiObAqj`)I6yf!2k>WtW0!W5 z6K=e8&{;b~HqTUaKe9E1JH3wMjLbV((Z;Ea!A2sY;4wtUZpUl3m={akf0Pl6%-YTY z$8_y(`MYkq{I3z-A7QA0Oz5+jbtQ8^`x37P#I(*=>O|kh8xCCJj`C z_A@qkH<+a1|Bn9PX{6a5Y@|Jh)j*5PL%!D9+s4_3j-}yVAiJ#gQ*CvKn1G#(lyNWrRB;^242qXNUW=Bo9VFq2NV}Bcz3U%5LrXd=<-W7j5o{EH5>>W|6R$3^)i)Z6fTWg`pL7|Fvg??0pm;ez|$PI}+S^^%fF~3?O zVNxz%kTJnoa$HX|^mTQ`(HSpe6V6FpN2tdH;o{Kt2=`o4Z@T?!$LhmMd*Ma8rNJeV zv8owsdv{`+)^oL=n!zgW5B9lcW3!TDzz1+hbz!XBFE)fsH~L=XSjy>NO(X8EFYj)k2ln-93im~+u=A)S1hG)E)GhRij6_aTAlxc0$Yh}=7W$XcK z7#n|nEa`aEsQz&hNzx!TLRGLWu>F&u5_H$`B@9%|`W9>E>cG7um-%Qez(fBldEF_# ztKiLsIjxoehc^;EY=f3uSxX}%3r>?`+bdBtAYdXPd%(`Ye)(`81WbHi8&Ps)#thvr zsqrkZ!$tKgTYSfs{r|Xo>$s@eMg1E@KtxKq1OZW+0fr7qK|w`2hi>VV6i|j15Ewu~ z5J_n%>6Y&9mhP_K4f;I$InO?yv-f-6{nz;erdQ0&TC?tJUDx+=KnyNmg|O4NeS)J~ z@~AM&Hgw=Q**4{EKn{a2J75)w^QS~1=#Sn^En_u_9k9HL&NJXg(|#fz7%nhyiT%^O z{vpd~{LKR=0ePG6{TKbBUWyYT zh##YPJuYC_Z51k`f{wSNwy*}5>fCXxe=+SMpvQ0ZNO56}aK*({HiLht$uxXuzRTX$ zEZN^Ufn4tS37H9_fXb7I2|ysCa60KOcUO<4A8Ws7GhNyz#I(JSuy??P#1zw}oZv#1 zmZ|kPtRBfOuEAT%DX;F`0ptD&?4ixf4D35TbXFU;O(ujLwy;t&ecXW^DksC|(#&P= zU_F9pipj?2zH~#y7dO4HdQPQhrsodVQn{h8Oep5X)oY-1SHdJTz%)M_xA7~JFR0(T zo0O098u1mErbs6i+(Sq%tDyKMH?-j8M~64oW(JAj4sUV+K^dm4bfZj5mDgD7?uRHN zf-t2wxvp0`v*zz&aD*ONHIZzD!y8;+<8lGBP=v@05Q^3Rx-WNq@GGNl6Sd*x^c9FF zt-p&68G|@?hS(5Gt&f<>jnrV54@)<7cSeE+$q^}^@KT4L(G%%8q(#QjCc;ZzPVDbJR<3M*3T0IqiI0Lln9jO5odQ8CHN6^8 zK{(*R6(*Yx$b^Qtk<2Kn2bm1vh9RQ099q{5W6}d(mT)r_K}J`HiSDcz#8s&IqDmG} z;7}F(6t}k`SSuvW8C0Vm-rRSGr_Zq*<6>YZS7i#<3zOa7aEBiV`>u<(o!LC2(xYmx zBtE#C0v}uxU+v@)uv!+sudNId`uz~s*4M;w`w#Z+!ds&E?xuK&m{464 znM63oWtQ4*ZUn;*r0TIE&m7xS?QuHZ`{97WkWg^h307*B*N#BP2-ac&|Ay%tJ`LeroVr~DQrmiP9M;D(ae+C#L=i{QxvAS9c)z-%2EWyFib0_C-HwO>Jp~eGuMr(> zc#$zK$QR9R6p)WGw2UHm;fOX6evIKu;^53t?QCleyV<>)9ooy4+nR_m+b6BiD$En> zy$|g&aLA5IDI90zI$PWS9CP%IOD?_a*-Wid`iXM#LIb@Ll7uV~5?*h*OJ3f{o1DAc z{`Q47VX?F~jTLpP(q7or+na@?$+jbthXiv#MbKo-Chm3hxh>BKux9j?cgAl_mq@n* z+@HYrX9IkHGkgGj z1dLC#vAlhvfso)pv!iRljlcjSJ|dC2M&_Phc9%;?UNSE%X_&q6Bb5B{ zc7UQBW;% zifoEf<0y(w{G^EPzqDkIA0bnn3+~S+dFiN|Cn%is(Ah{ec1wImM)Q!>Ve)aj%u_Jb z2VH&|Te8>AvAm7L`;B7_RE)v9)Jd1=f|lD5L$B7(*^J$!-oWYbZd*2@+S%ymj6esd z@GV$$9m?+D0<1qq?AEPA8>V>Ei3cO*oO)JMq^gr~#pEgBJSIH6`n?+&<5RLXH`d-B zIM%6^y}PvQex)_MAye>w(lxGag)IC-BH}*$9^6 zeBcO{L^W06xYvE}^-tjwWmp^IXtqf3gTb+90>r8A@TNsiCY|mcUajLZtv6?do+>r7 zkK#u*82jw!gFRIesWQ|@KSeDikVWG1!MZo@dl?%r;M_fOsSMca+)ho#~zl>w<$P=uo8kGnEd-O@dE5T0JK zh_6w}DRr!LZ-jy#*_!L=hvPdL*T3m}alr5_tL8_BuL>kgT}AfGfR|AWxJ(`(R7iJ_ zlr+=&eK#RtIuuxwkRL^*wpSlcziBf@UCWw!1~^5wZY z_D$B7%bI4qFdRXZh%h4-ycxofALRFrc~(jG{T5>pbxcx=vlr?xYub>vaR68s*)4E9 z7tfFpzMcVNHHn*Jy@H zMs6{tl%z0&395q$g6$~(0eEw4`lO?#@l9;R&5dDk+ z(NDxaq5jRri-W8wQW4?Yhw~B*mtE9b+z;YKWxw5HN*M_!j0AH4eLspC+YeDYk+>Tb(j3bO zs>dnW;zqI-u9W9&h1TW-YuB20smQu1v2S;Tt4*0sfb+PcsB_AF7lkq}5E0gTcxwl3 z&HLTXVj*UVm+L61#GX5t(6-^4H^Wru2rGNufE5$0>D}ZB>c-hMhuAK{lbxB1CHrTd zc2nhhxEt{UnDG$=Pv4JS#E~v`hVZ-R_XNh>ZtP5vXgks1xfefDVs7<#8!j30e5azp zO-U|bZZ4XSIysgA?oW>@wtV+7VWf+@?Q$yxW6I7e2}A8rMB55ptLVZWJgR!;*MFrXPIC_m2El$?Je-UqH#@l~APL1yPQc92*lKxcuR)T2*Dkd7jU=Qw7x zWNK;G_n_Fow|H1PV@~lF9KN9Med5+LmBIrPd--cHb~!yld>DxWM2lax#ykZ>n^R6z zFfA)7-yR&-#O69b*N`Oay)JUfNYyuh#?X5mOd%=Iigypp$F=eeF^(BI7`9A9dwm-Q zd2jvt@#kTeJM@OlKK!<1aFDZkaDhu^k^A4NjgWs%68;}i8~@grzyrDTXuY_UZVW9A zE^~hn2=qT=+v5BkLo@X>Mpdl6IvTSu6lgB{EY1Z98qWd1GV3H_@g^}m-IIsbt@ z`%?<#{Ea>P7iyV>l`hc9EKTiUj)waG)Z+>L&o~-6{}Phr`t4}s{P#k#wuV4wywn=6 z+-`qU^dQiG{$~Gg)JD#KK<)kv@pArqP&<8FeVCoKq5dC1Xw(0q*7899YHa);B}WL9 z`=2DoKMi?z3S6wHZ{RlnGUV|BLmu{(AumiapLJY-lPQauJTo$v(@%~_ExK3hE9vrb z-Nd;j#i^T}p_Tbq_DRvk-u5ipvkUj_yP7EHrMW7WJA?3Obaa))554n)p2BBmIMEk6 zp_!Ry{1mPg8fR6_hNDl!kVjEL1hwu<)#2V^s+H%B=!A;{U-yF#YuRjBG%(qz%=hAgKy zPD6fO@3$Tom*#ddiNbRR!xetm=oIdujXM*I-FdK!+_pGZ%$0Xd)e}GOS!opRlW}L) z(#C82__GAoY^wdN_ZC*Pom43jG%BNR*B0$Sy`bid&>#H^=0lmG{ww!`>acAHLG*f5c(eBqaARZ;qM z4Ek+C(fn&zaZX06*KQA3{r3F*7ND6y88qoeII{$nEnAyHO|j#nSfHkg#)d@^AdI7q?c_hNj0R)n?d_GEFCJ(h5(x|;Z!*1N)w=sr17 zIL2BnYSHhl(!Z46DB+jmeJw0s<8M!OF*fN$SvR>c3?(0~*)u#uAfp#UfSTA zc~y~0?x`WnY#;&MuWY>Y-Q?BLx{gO)r~Fs*4fhw+9~XT*HU>uW%ce;P*GH>WJ_4Ur z8t*7uHA*@8n33ZnQRTCr^KT-pf{+B~i`DyZ6HlBa^CwU+lXv5lwGya`uW@$VFq|a| zckw`E^>ULxl&A^rxX08$Krf^))a@N>UP)z{Nb)1?;}Y{z%hoyO$;9ads=Ku>4TfG~ zchN2#g%I*{`$%_7WER(BJFtem<+8l>kntmmZ*G#6gs9tK|IlXQHl3Q0U3hTrODPvE zcl3!iG5v2_6D-PP`RHXq9<&)@P&C)unK`I$yKW;p_`G)I8hb6%Sr)gvd_2BP7_Y0T zDIdmPsdZLaqgm8H^X!#9=ts2^KDI6pUwvI(qabf)<4_5?-uQC5|THR#vCLIgYJ&zoL;go_8stEdcXFM{6p{c|qwxd7kH!X#Syop@V zUUSQr3O}SDd?Y)6d}COXN?ta><@UEapKHnPG+JV9DJSq{dyr0Cr#0$zmvHz#nH#pg zQGxS}{E@&jwkBRdJgwUw@z-Imk)7txcpJFxoJ1$b?9a~H%y*{0T$}-{b+_8N6uV{X2->;Yx@5%(+wFtK@YJ-r+boQQg_?9HI_dIxW9;;|xCX0f zLbIY8e)a+DQ?_6uM7Al2;w_}-b^CU1`W%Vd=^#ZfD0l>Y_CD#w3y8N2A*P67C5yBX zB@4t1;w@>2Y1#})eTw{EHVu?DB!-qfL^nUVI7X|15A15t%K{W=IVe6Xkfi97>Kduo zsJ@h3mJ6vdsmjab-L93!FiHBbVF}75zVDv~$rQM-x098>*uiv8nI^6VDP#L;wx0v? z^0&TQE7OY^XT8kc*cY(gv ze}MX$RkpJ4gC$8{j-_Y0ZGGQ9`B{eB>y!#IXR0+mYUS`EjRK{ShHkmcCLth117c%Z=&FmZg<@SJ-^b zJM<)J1eI!PdIVLaZ81lyS}4=)#hN$Prp}sophucxjbtVGhjv&oz`9SlK9g*m(4w(6 zljW#;2WvIkmH%V^Qiq4jwD8&M&EEW4(@@)_OoeGvkxXwvO&%A`!>pT_udMsAIfXh>df8Dc$xr`?lcJ9DOXo zZmrCDhOI8lXCM8}ot3M&+IzQjBkXm`1T8XqUX^IXeY*qsH~_Y}<1RO`ls$NQC>?hj zxXidFS!YcyWgVX77 z)9QXOJdL`&`OpU4^eng0GOLJY-%*`P?34rbCVex(1AqlLDWR8ag?f=@gU{C-391

Y*#zBw<-Ho^Da8GP?&3_Rek8}PG4B_=ep;PO3z@cE+}v_?*aUT>-&^h?!_ zE<=EX-yCI(#3=}@o}KSIs%){Ew`FB6+kB^E!kK@y`I5!g1U#h7;pznIzzNnN2CRc- zzTo9LdFaw>2%r2gf6u6AU6u6$wPao+eI`rMMm(`Mp@5 zW@bIdEHe)@-*z=S4o34mCAJ-z-O704R=J71KA=Z+rx;c`2YHMo5J`HwnRK#8CoULa z{Y?O8(mcpRNOU{(;B8aRXZrBW;neFtR;j2{4sdV_PSD}YXFi&1!uRwXFOcLbJiQPT zA`jcvsi-p!aLBm#acrR{?>~QB%+RNZ?`QQFyr8t3b=g)$=}a3mb6FSKt+m@t6sh#g zc7GpCYaX*-B8pA{-{pR33U7f5#=GgO zvQi_^iP{crP*U)eY#V^#^#hk;b`_1$N)FsC+jM9ucBV~x-el23sBs!Emu_2?)NU36 z9jN|nl@-;r)P)(km?+W#ebW1Z_N`pc>$UCNteM!ERS?Ang{TFZD4o~eUYZ|$5c6ab z&@0p)q!kJ#jBG(Ru&T5#)dq` zCl+EkdUM(2@zr`d%xF+OOye;+wr?pXKs&F4_UIb5c#Jrg6wx-}UTQOEdW!{6fpG%5 zDyB(~$F9rOlgB4IPWN(!Y@Rd7*UJpGaki`az{^Y3@jfRLJgk>!Mohh(7rx?yVt)dYd$9^ zPJ1IhCf~QI`>XHY_CWrJG5kbfQUgO-mn%`jIen^#=v2m66Vv`o|6+kh(~}k&#vjOQ z1q~~Xg=hIQUpObzzc8NOYJi48>ld^9`;2eqIQ2^mA%zY~AoR2o>GK6HOu=K-pP_j4 z$9b_g@Q?Cie~?W%spBJ0R&uw#(^V>4%#iK1Kd1+#*y?{4WWtcXPp zt{)#-yPii5qbS=OO|nM}^Kh-v6j-TV%#F0Ik`Elrs2NQ@Z%a`1Mkg`!T#J-laiwjg zTD-yBYml${l;0Tih4Z;a&F4GhyE&Wr&bKSrF{c{y8#rUVHlxk8tr+y(}I*-Du60-{q!<+On(F}UZ z6cM`&jyKdoWR3~S&_EqEN9vH|k9_8)IUj{pGBaL!f!3>*YR4%3ZSFD13hnBv&(zo+Bj{b>FGYqDqlad&BFCFSxsXaQl+kzqrx%j( zNU zcO~$z@8AEV1ak6n{S8H@IUJ%1qPbT+5|x!>GN3;-?4HPdymvU#dg#a$)EyTn=`-rB z6}`O$55l|ESL5r9!oJRPWo9_=01}LRya73*BT&V}>g$_DF2Bk5@T=*jc_W7GBv)|A}1k_K;cP$O}^b6F!Xm_Su|0cs@9 zH&Ff&%}u?mk)U$EaMMb?{sGiT6in3LV0(Ov7?yhWWwz$MxZr&|Uv%?|>VsGGs$~_b zuI{I&n`ifNjK?0@BzSs@D>cMoGJjv|7%GBLu_k!B9G+EBwCbGR*DyBixl|llZEDb#bQj$!Kw3XBSp{X$y~BCI2O_ zJzU6Mes8<(S2|F|)XsZ_KNNlE&fxEOpoZ;);W|~B{!UAS1b6$(($%~-ulMw$43#Ts zez#)`x(Qm{^_!8VeuHz?cVt@XGPxS`oQ8)PrT-!|wSgq=4H6Nm3VrGWf`}i>d45_V z&mG!v>R1puIsH%ViO^5_kha^AgIv|U*+##O5_HilE%}quD}!|47C5+xrd-y1!q`(n z^C{E*rnRNyB>dX14vg(;wZ_#C!PXX1F4}hJ+U-4tiY}pnk&PohT8-s+{XfWjgak5k zP-++Nd$0%MkeF}cmwa>f#qmnaPJu-f-wHe;ButzJbiiuuHnP0?oUya|yKA4GIXQS+ zy}m`Yd9SbJJAdLwu9r2#K~#HoQ(4MCb${grIdSl2$R7L=7@V`%F{o@Cr4R zJpIYAWTCN`-w`Fk)2G2Y(@F5b@(yodKYBCwsY3UfE+#{`$oeEmfhz5nmp~1OQ@b_mGxzjq< zlmy=KoNj~03(kT&F)`#OtVx@g~vy z{+b3IjZ4i~gIwPh1yvjcZNSE`l5-fdo^&jxJC?E)&A3hph4mIFy;#tZ0JWbc@<-}v%7D}KE+B|u(dyJr6+VCHWJ{$3e3siWUec&S)h!0{L_QrNWE{i zF+0sTWL$wtdog)J7-XT6OhcMFyC9+8jDnLcNA^}Y7rwhEh||*v&DM~(sE<^Zst<0U z31{3q8u}c)9QH=Dng6y0BUN=`Sr>DPi&GKoZ%0i5eSlj6YrPfE=5IaES=umvbk7p=@KL9Pnrb-Gk1!a zvO)G*xSYzm9i-L*v~1dYAfa5JOHwXVYn&xU3w-=?8^s@N;+9SIf5waykfKYQuMDrK z%Nggm4^FX!8@oMsBCGd)j{h(>Aer=Ge`Mn$_bUM~z80hvKG}fjkyhfc6WWnstCMIgp@(eOcNg);Ditt5gZO{eXW1zSX z`O+7Q&OG}O7-wI+^K(c;YUc3rzUh0cInJiSWu2pNRlT~AqV-WPhF@AOLz7UoFJg zGO{EW3{wR6ROS*@_^~VJtTJbD-O8OP)+zmZL+Z9eHTba;>jxbvqCl4_FK#K@3NJ2l zu@ePcZz6FPSI$GLNf)D}aQ0zTWfu77rUq^v20K#R`stFv_rZ>V844jhKKJjAlBScFNE4!;E439)aHvIeCaEtyc&gstkD{vA{97FK=_h| zH5#M_;=Lo(PDoN2X5NWMG#Apy2{cWZyyEY8h(GM09=nZQ(bZSN7@D&Bq={>Az42G# zoyPE)t_p*I9*5zhHiDS^`yym?1{YqxXX{msf)~FwsTS?YOMphPe2yF&b_tYlOWLGJIC!nMhx+E(5(w z*F=}Y3!3&I%}gOO=WzYlDE|e8uB!nIQU)(tuIlwBq!cC}cuR{;1AS96sDJoNm~giu z&w1HcCyeJ=tKPSjHx0I!>a`FBpccnMYG1d{0JRt~#|2&wrh^h9qYRi!0s7%WCc@N= zaX4^>5Fp3tBPmfRh&VPfHAB`o{jFuAt9gyG0hPckWa*MhfD?-&4zl}S7XS+Xj_y-C z(4G>|XKdZp=29uKqnqV8;3jSTs+r9iQ}NV0OFuDXfCn^8s7QCaN#Dy{K+*f&6* zt~=8cZe8tu^HjxLR4uEU6(vW2x&Lw}QLua3O?d}U_bZM7bsxLkFMNLxN)_d$5r<>2 zG#ZOz&>VevbJA=F*_Qv1t353nDSv(3&-GyXypwX`G(q4p*uEd$;-4Ux*|4>xe!s5c zsnpP2$&;HGGLlt*b$~iiTjiaNCL2xo$aiiqo{7G4UlXEqJ1y;Sgi}Y1BX4$JB$bYmefng3DV;dn z>DgIWI8rxP^L(mY?d!FfT$UURq-4fWLVW1!fb>|TPZ`^)5PAGGLB{ov#^T2O?2Dic)}ShBqSLx!-*S8E4TCmg1JqPqQr-5ciJ zeR^#OxoV0S2T(6k)**+5sP3T{QahM>5ioD1)1Ian5huR3oy7oVspAP%<~`2bw768m zEzpuO!%OnFmK5UCeXlvD|D ztOL0{=(PuP6N4oO(2irWdJ)T?=GDq=OebU#^>O=9V1L|$f&}CVnIgn$a_~mSca=RT z+>88#%zi2En9RNzJPZng&0r|Pe(w9?-NO^)=6B!<}3AZsH=P8{O2)kMTylDiN1#IAB74vV9Us*eiKM z!VnJxdglOOjt?(V5*`ptUt9)d0vfj)8MvGn)Fz~f3UNtBRf7Li*1&VE zz?~L95^H~77;cer_@IQo*?9JDGAJoEp1rDzc*U*l<&)OPqW9e<@X~*4P=gQA+LQo3 z#R-f-gCmP_zK&D=Oyk)wLbb18H;rgn9(JDl#{9HQTUGG>o`ql%=)IN^BDWf0#U6bO zdLf3L2^BOWw($m&lS@Gu2f8!`?ok5gM*y(_92fyagDDv|ScbhnnG8E6@3{td$2qCu z7Y!yrYtCmHQ*bH+ zua*#Tj$W)W?r(P@S0^>2ONw3{WgU1fPgD9c9KODj!2qtOjT0tuKD({AK*H5tjLC($vQCh5 zsSMC;bZfqb!L;n=pKYFaZgemS{kNjlKPx8xM?|elt>9mXTHOB`>loyB4wM`EmmnzQ z-wcA<+giZvOpPsdEnp7Tf9qG^{?AymApfAv{b|jD{HD$Qi$+g-XPA+#?n^_Mr4{Uw zJok6+-G3&j%JCOk-yaPX9RDV*?@9=?cedAqIapp^|F3!$_kSiQ&G8Q?-ktkvJ!=+@w4vV>Jbmn~RdVAk4H7!7!TZs!k{ew1lcr-nUGf>(-oq&1tjl9gId~D6y zAqb-Badc7#^K?2Q-XGc@%N8GAN$tOgLu}vKUbq#a%L-g=8*FQJY$8IZ=dMmiOCmT! z74^>k6UK4YzEo62&ZeHz$48}(7(<4b#Kz)31l%65Gr`J$q=jl^?e!?G?(Q8e;rb_G z+Xvs35eg@{1Djwm4ibXONL-IjX_*T%$fK65g>9ZicZ!Id>Q4TWq^3uW56_FvEGm6G zDNoO&vmssUD^0IhE@9{c>moIa<=Mj`S>}Qso?f9Cm4H<>WlWoMa5mBhqJZ2BcaDLR zYM`oUcmOC;c08NG3SsW&0>+Fyq`4jS!71jXXDq=LC%n-Ifr zXJC#_qC~Mwl)~T!mB~0;!iA$~=vkM_$Al=%L=z|Dxjs!*w2X_CKLslOD}m}K5U5~( z6{w;fM{A?};6Z0!H^r#5=(SXM7?_+YVDwWJtJbd(RZyGCG0hI^Djb;I!%$sH=uUg{ zR9`{A!4L4ONDJ(^Yl}$dUG^xQp--aa=Y?36$@Fm?NzbGdY0Yo#?6+{=lt2XA+$^xxeP{($u~RpSMp z8r7N&H`B$|*J)V-1p$qt+2NMXS0C6m?Kj;9bSe?qH%zzUGFd$0ikshWmyjPexQWb`#oOr2KJ*@sHqO&+hyZQ}X{kAr# z6Cefts-x%dkRPhh zU;C?`6=iGUl|mt+9kezkq~Dwh;LbfVHAfNFNIe50QakOId+7ez^3 z%zAbo2*QZtiH^ck zC1#myA1&My%Va9sLT$WyJSeU28o+E?`DL_E*zU%QW-eAUKxpB>dWdTnZi=KNI~#69 zR$Yxs*UMYZfB}-za!m*@mj0E&jxZg8w`sWw*sZYop;l9by?LBKj+tJGM&xE!$SeyE z^msv=X$ojFCFuU6&9t|q%RejtBklme>h2qhJ z5h@5)Qn)Gm?#>}y4Cs4I0ez3XZD6en)ohw93V^UP@JrZ{1iZj20!{lBA8~~fVYDE} zzp^3lAun@T&E%*5WWf>I1M?NN5i+^^b?yU+527%>n8$!{SAuUmlE9~!=ijCL7iKGC z9#~u-LT*RO_?v2lADk33(cuPEs|k@u1|R~{I0GUuk{|*Tc&S>o{#LC-{wze}ylZ}0 zRd$Ks!Vg~nqxLHg%iTX=U4UdB!;XcSK-bwP)xrtjVljL~J0-$Q3o-8dZGMaVF~v^7 zn`zRq#wp-X+_0Uq9T1ojYB<@~dj%D6Fx{I(gyS?EyA*z!&XO5e8nq})($E&>IxOCo z&7B-sKsJSle_tc#0A~sIrJrh_`HkG>F7fD$;o2P|Z)Gk+^=YLzxhib!2<&`JGSzo* zyRpL8M!i<`+(sM&#o5r)5W@%V+@+9dt8lklvh7aSy+7l8yjvAFnb}%-2LIU94 zk4fx*5MSP$G{c~+!J?mU8MN^$JF9qWlcQUnq`v9B6u;bZQegU#l`dhImrdq_(wz>> zTd7I$i^`qd&80*~FXukNb=hswiU)5P9Cb(r$$v$l`s76}Z=Vgl8aj6&xchiR+<(JU zr5=v9UnIEnNSgkP5MRc#L9quWAGV7^WY`0PMDD66(*5;rp0A5h~ zLY{+0MtyNi+E!rjVUJF}dN}*Dig)#|mP6^zKpmf2!f*Xpa0&fKYjTwy%~B46Q6Gt) zk=Y)ru$D%7#U9K|zA+6Ueatj)lYNZ-Dg7B-u8u!!_nh(4}FnlV_LoA!?02^5A%%#d@H%K)b zn-0cLo)RsatVN1 z=3Ea28WCfXpbi}vKSgm3asextJKA8|+!7`M#}AYHZ-U@t_=5U25$&yC2xsSeZkopC zHQI(Ce;TzIZYtU?m?Du7pQi93nV@>mL>*NzM8M~%$h3z!pS|#c_!X~9-#dZ(8&KW-xazl$yZiVx z((`6vJ^tZGil;ZF8s=Wp=p8@AlXv-~nisZO_l0AaYK^Ou!q$ZByHqm93W8kDqKVAp zX1Vf{i1|d~SVh16n(IKW$6Tx`c7DRq>lKE6Y!m<*w^e6D8T1j?!Ft=s{Du_D* zo+kMFZUZX$m{oL6Yytn@6LEesuwC%TFnpilkb&o>DPo=OOC&+`sY~ zb!s|iNAQ(_7m3>my6w}ZfGOnxS}yoCXoLwUyS3&wkga{Sz@xUf*D8_I@);n{OiWPq zWH`G)r7~PJ@)4fECqU$AM@lgP8)0ls6A4{AHMc3flq6@x$0JbHUG5q3V zU<%BoQ$hgCobWGu{{vn?#OsVd$rYN3$-azl?zHuRvoNVHpu-rPg>j~juNt3kZy`2+ zcklov5#gaVkLk8IP~m372Kx}n7UeniqEec^yvQvNNVP}aKit)hyn#^bCJKbw`M|lJ zl@{VB)mihH9J?>Uzq!`Sn^xc4be&2j@4MCBP|=vVnv}1x$?~^s8||P^OhL^s*z}Uv zG5w>e$YxJh^GNS#>G++6RN`{2mXEDvF~p1=7w}%F zDd~k{z1s{pNx^T}3CX-4ix=^X>x$AikMH*vGGz5zdHpB`S93aslXnjl_Mt>}g$Sh< zVWZ9uPT3KqF5ujRAEF<>{YevZ?Tj;@fBq$Kn8EewIws-W0qOi3)1RjhG%y~&cMF#n zDv7`PsO3QeG$Px9CWAL6ZLnQQHUazcs_%4&WTkmFl*4cRHew~(hq%36El-DWS<=qn zBlE++SKVWM6tkCoy4aGHCYB>$JsyWJ{5m1gQWLm<1YK6eg}5-o5gr+&K)yXx^`0ZC z#s;$>ZokVN%n0KeBxh(M*h}K$Aaa6!<^x|CfgC>P3>Uym_K|P$zT9TPNeUz2LF=4C z#B96yZ`XnE{OR)`w`K}4utUW^^?tWNEOD=j;IlS|3Z$J4{@8=zj1&pzU|0LoCy-f3 zl_0k|P4naqLAvL~F#T>MhMi_#LTUYduDJnzQ)}$tF6uk6pHK7cW&IO>e-<}A7^Et+ zv-QGZxV@(@f?ic>nvqP>E_} z@i(L#_dn~X|C%uJc>|oZmhK_%G`~KOy_`g{` z$RA9(OXl65pYU&}9QVKX2^$&wQF;4c7LkYJuWIN2EQRs#{Y?t{FU1Qva@RzWa$X+s z`Fpu};r~XsZ>} z0gerq+>V#n7p3o>mF2}XHH~9GYa*$eKkyVhUBij?oDF*UY>)4~&;{3`Cw>IvB;;lr zs^{5!>XWn0696?kpJS~$KR{kwAYto1F~A|XXssh++k-iKxUni+dpca(FpNS_?RV?R zw&4hj{EmX^w5gM+e_1)E8yoqx@x40DmDwggE0MWC|LD-F>W~1L_J)@X8{I_nuDq;N zp00E=O>g%hm;o})R^N(B@!?5Bd(a9Qp{JNg-g}(=5WnVkE6o_%v;yruRQd4 zrEWRGQzk$gy=#V=f5<$j;g9Sx)qQ6qAcoG*#@eo(rWjmq*^($w?4^S9j`SG4(F zQE_YNo7x6eOpU`k($pxu*7ir0x{HgCYn!pf`GLJ+ASSPtkm*__)r5=Pc=;m#&_Jm3 z*i_i8_Pxbc{vEgqfw|iH=xWi>5T(nfv(?SWyO>KuQaWrjNm536d2AiUkp$uwq=w{S z143fHmIJFXbTXDWZ}<}*6k%OFC&Wg>3YI)5dhjT>C_VqMV{ERo`u3<#y9OU}3fjv7ZQPyV<1q*?26EJ?jc*rZv!RpsWb?8#RWm-Q zjL$9NC(oe`DuQQoXV|{&3;*Z{3C>{m^Z4sL-v#4?j;?81*H0yF49OeSiQWj|WOXE1 zpf<19ks~4bn#z*=^TVM5s8T8E;P<+A_AhM&rdCZk#>MMt zN5Uv3L7~Od0d%v=LJRD;^s^Zw@4~05{FYPlKRlLy^`yPwa~rcn58>pqjz18e?S>4= zbxRMT^^3ZMuh($-+ZUs;JU3D(Bl-3^mx}J`yC`mx$eH`g_$cTFftw#mL!eNSwAm+g z?|(`wiUofD;jjhI%$x~RQ|Z(%*@$@LT6m)~z>F_mWV}(ZH-jgCf23_Ff$AKCusfE{ z-Ia0QjyjP6m-5y-B_ly-=;nq z?3&j>Ziad(XWm{Z6So6wz^ehY4j5HyT+!lj$u$+A`OYtAnX}_4q5xy4HL{31O5r6A z^GTznT0AJ!asv&CnxG+(H|dCu*^Ri&>fT_paiUMwYzE`U4FkZt1uiXY4`=NG)g zbUBCMow_`28#&TsO~BI2CjIVQ51#mPPw?$ofO)K>v$8Yb7J*gtUWi>TjLGA%Zcl62 zy(cCxzpJmpWG0?TYh^@1ot4!;pb(dxHJTx=EQp`~ODQVi?M2Gy;IerXXiJ5>5Il1^ zTtIs3p)ZJ{%JC;{$b_Ktn+;K~9CqM&V%WTl26=005qgx1elhc-I4xCHo)btsX_V1v zm)mWk%E0mBaAUC^!AqWYHIX1bb~~pRLp(-PfN^c&)ktMpbqn~jjBBl#-NFSG&=@+o zFoKNVvJ%<6RAS~BT~@ml>Yi_6MKlc>O5*|aFeZwtQ!%GKsN%Kp!wsNFt>1C4^DK|i zaLiROiS|%v=IxkE^#}~;uU+~GQ?2ngCqKyQuwN>oZ2si2X%sp~Gw2DEs$H-cQlLRu z3rDutUyG($>@jm2i@bSaKe{V0 zyltVr3eEtyEJk{i<=+rt9#~u<8?HQ-^O|+4v6z@0(-_OSF4cl@lySQ&2q(<=nWF^t z3~U51hDN)XR%}iQt&3~nBp3D6j| zo~ifMJv%w5{NV~S=&&|!d8R=Wnlq3;rJUNbVMRva)XCd#^L?jx{!r{@^F<+1TAjJvRv@C?1mD>$xp-gi^r!P;W7!2sA#LZmHSSS3ImLlY2c{Z z`P9idM0k<+JmK<@AnqGZ)&0(;Ih4eji|GjOiFVW}+^F-(Ij*Z3JVBxYhGwcee6Q=a z{c=)+8H|v{>}1*WNZ>#QbKVk9{kch`uUqV5^BR{2!m;e zjEs%!W2O+WS>2+DC2UGApCNe&F23^7&;PpE5Tcllm?NPuKpv;d?V|dw8vacw&%i9x z*pz3#`Sv$8-+Q(NU}&WahF1N**MyIrGFBfc;=muy!b>mN4q-400ac+8FUAlVdEf!V z3=vhdl?@nAXJ8Cr@OiHfFkujJVw}P>zLczZbSq68*@7F-{L=W0h7iU>iR<`rVBsgK zA)l3x3ETtI*S=ce)#!P{W`0U^j?>Z~-W!N2n7SNU)sNU4v5Lv=U?zpb^iGbE=85a= zN3Y2b7d=oFX{(^_KoX{ z-$HoqrsirqAv1n^wkjIL1vK*%$c`200rNsDb&48jga&mzfRa}rD~j5RG;pSVpS>#j zPedN-SUh3tZhrypofCta3Fg}HB(;##&Ptt__291++&g>xtrD}7mFAGha>+p&sS85~ zmXK~EmksrDCl>oby~ZXXtw8;6XbIzm2(Sg1+X!}(RivAXf^DFX8f*jE4PmFP--#5e zE3`0^jw`cK<&Vm<8wfTF9a&~xKk{8jnmcnHovC=a)lkF|e^^GhWZ~y@(f+Qp%<8p@ z$mZw#4^_7nsV=H2B|nK=6WOVhhL7X5{KRH>*&(c(|K)5D0e++ThxS#$klxH-ncf&eX#y5nn)%+F0t z)xYxmuFFh2D(L13gg1jpY3&$)wj#odfQsmSUwEYGp@0WDHM+;c^|c;6DzCO<+-pTt zAkP!%@UHJv>sr=PD(fBVvyJOr)j`W~0d@(3LwoId#T3sH`rGvmqz1I(j$TzPbPl*B ztvB=~eSfx1d1`DEbWwc>+Zw*L$jzHQggCkb8f%AkI-m)&aUlH>* zfv(;8J})55CW_eS(V1rIHP7u;%#7WC@;qmQuxy^B>9D^-&rVA9kl8Weamd!OHqgc( z9u7H(kCiGCvNk~)<4iP+8-#cf2LbRU*9Py$AvR~)cp@?(HZ$6JPjo0|l@9{km6++k z(?6UT=&tWpTrT?uFwv`Jk9mdCbZCAMkTYC?80q*OINw4*U~)2RvZjuuXwm;jo!Q8{*G1(IluRsPfHh z-Poz>4Qz(*wx2{)9~%CgNi>31eFOWGLM9Kus9n;5R^1}sxn-9jFjCIVxrgTAznJsZ zrLeL=aU0D&@H*OA(lL>#AH#-w;6Y`B%%pdH6Qz5gfvmIcq&M8TzY;a_@HMtx{rAlb5kBz zc(mz!Jf_DvT=x2su6VoJ%79`unSOd{sYM}+mu&xt@II%MlSoD4V}+|S#(2fNPYNQL z@pI=BTJBd!4 zN6}A8o4+FQ^G%8|*oAV9W)euQ?hm0&OPj}7kqi?3wryrPu>JIE`n(?#t{FI(bYSj3 z4R$LKvB1?@`pVFXX)qM6r?>+j^)b%Hkv^$osY}A>5(Q*%jErHD7mkswVz=s+&fss+ z&|U+a+mfm1tceE-EWP^-(au10Fa`;ThmE$I+*K7e=sea~G)p#z}vRu0~0kMU>Uo$p5jNjClQn zW-dw%C})e2hyyprVX9Cpjhh+A`(skWnXd6Z>^1w3>0@icO8UyNeNSzEL~h@Tv=XW| z$ccqsZnPdtiGNum6*U4PYpR~+eyvu z{#3`>vr_{1vpe)yB?A8pSY!J;1?T?;uy%=8{5QZF=kJ)tzptm`yd+4mgRQZ#vHdjv z;{1iW{A*b4k{YFBY63ttjX!gbSULYQkQ($i=dWKe2+&J<8EEhyjkDG>GPl(;_!$?W zV_^s0Sp&51a_tXyvcF`la{g!7d7QsM$>00#Cnm}LNAoPLEo?1xEI=lMg}JRYc-6Nt z)A+sb{=$5N{?6O_UmVz9)WN%KENnlMOgaB&%t3&c+GyD5+5QPcW99t&+4k??e4PIX z-uMINz}br*sq-1N~z9wr*wIBAX%IP&@8M?LF(loNpIQJf}zIlw^gRDy*O9Iu z`NQeoG@SN7<5k~n!T`+Ida-$W_>1snWBnsub!08~hWfr~RGEX8UuyidnnB3R)mb0z zL5D=rnv3tuc>>=^Xg6R|d3hPCHu?M(OxRIY*7eODsi1{r8}(;P+e;dEXe_utjW-r1 zp1VKhB`zB_WvvX+FBu9aO`p-*u`ivd$Ru&)-7Jfk3Pc;^an0iTju`1VfRDyZO&;ws zXkQv@t}5VL_z`^?ih+^ZF>3O+;i ziXNhl`0>Y4ZwsvYhh+`B&G~G*hDg>5H}r)G$|Ak5AFlRV1osRrOizwaQ%x@lAD$pq zh`OxnnAqqNyLOj)(GMCrJ`L%9faM>Mg?C|F}HxtA!dpGaxK?886|n_}M_u5EO3 zz$qswM(=Vzny-({wl+2Ys=s!fRU?a;1TpCf!^yiR-xUj@dWLw843pOkw+?m3B(}{2 z3S)fnEi)l0I&}|O5u%22a z?feqQnKML)@LFUh^ExVr zk_%Qf!g2<2(!)B-8gZECW8W7%7;y*{l_;g-36)w03#d(-#ao-f;=+dR*yRihz;e2i zeRMVEPKX_wg$1FOG+<}V0Ctw3GMt?ihjDT=otQVR7#?pSRo-IW9lUXCjPN>Qr$$@p z%|)smQf}W~+CVCSPpGqU&-B9rdCG2cf90JqsE6d$hN&V}Vm8BZDR5N;DN7Aiovi{C zdE7r-uzy%>--VVTX)9Pum>9T^w`gIoP!%W|+32wL57Z@Dz^#X2zJmFsZcN=uBEBG3pzWpa!t0sK`^)=B{2 zul+HfE&zXlSixvq91iyiKwnbog8207H%-(*D9tQCvign9@2bgi4_$FkDU&UavGOc} zMqP~>I1<`I{VuvK{%8^t;9Tg&R}CMtlOqQsrw<1X-C(i6ZbcwWn!>O9svoF>(4lUH z`oU0i!Pplq7+J|m+yn%8RUxV5;L`@j>J+Nb%g=Dnfar2*4Ougmp3;E@~4=mEEx)?GDP=li!ktOQI*C< zs}`c5F6*^!@5f-(6CE5~TXo2p)#8_jG1M8cwyr8+0k6{<9^*Q#FFE{JioC?E6P>Mu zbw0h80#>vs@kQ!|X6khsn2fb#a{`C&!oG#*2*=|{kS~k#C?iE+Oo-}(Dq^MM+ z0H&oZv5t(y=OD-Rn$~FWtIHf$+mIM0cYa&c3y|YlgvwQf8q2RR+R^zIl;)=i>zHI?F|kD;ofIe9>8P@=2T z%>~Llu+TgtsC&5fiM&dqvxm$^cV+n=f_Z{^n)}AW$gdpN8&@PQ(5+rD<@IR#FabU+ zNIi<}lE4))Xb6mD>}7TN?d^E|{x zQ6(FXlPfu2i?DIxDfi$hzq4|kjUW|e_uQ1hrsVC3!XfHXs!7j1zHa(ksn48vWlzVi zzqNVK%dZxn*Q_&R=~|6@w_brs@@-9VHXho8fw@Cus$4mi#i9CZQ^iWi!l^8bLumtwj56A6t`fQ%WhmDd5-olV zFgThsPxYp&_Pj>DFb$A(>17(B_ zlo66&Wu!oSKUNO`NOPn4l^KT9lLedRdMUIkY+t5P#IADmB9z<(^`uvq6Lkf<_nXi& z4zp`Q98ZC|F4Zrk3(#Ox-Z52xD#B$~#AVk>*=3T$odu=bN6KkGqK{-sDGKkq-q!ZY z03E>9to7_Tvb?g=_3WNFN)*}AbfGWgHpQC-{ED^ZZCI|EkvM^3!~$ z3&Q?4P@(xm`x%X+g{LR+2TD$dPFTde;Y;~qT8-A8mkHnSEOo=dABUX`TE`rd<*4s3ceLO920PG#n^ zGg3AsErVnY+z^a%td6tpu(}QSr17rU;X_k}tnB;Gw8VY#>WS~z3aR#}p2NtUy ztgNhc=Dz1&iNjRNDx)yD1x(D3Ta1A4_B4%zOsRG48r*Y_1lmLxD+R)WtY$#%Q!tQA5E ztew(=geChTI<$O}*1$=M6uC7hd8D2f`{>hqc`RbnGwMcxWCEm>5*aDQ(tcE|ApK}V zNTa5n20M6cqm|T;ia7L2YqR=lJIk8dYbZu4eo8UBkNGUiAQ`68TY*f1l(%v(*Wjj zyH^24%yW)*uRb)FrU&eaADFc7Gb!cF?{#F!J7 zC0%qmq2v7X4nO#tlXgt>ad{elN|{s25lZ=*%h-cW3!? zV;>=v)y4vC@vVNZsnaNVtObOF7g)aEPco1N=5{iWZ9Ff0jGxe+XUA^7kZ{bT5ec7U z8=u-pqnV<=S%o6pC}|2Uns$%W10VNeqK6k>YqH%3=Ryre_{KJQ30{nwf?QR{ zjiEe~x5Ed$A_W`#SG#Ib8Gs(Ux?|9wM~#c2U<1(nu)!Y#ig&zVgd1ljJT}O!waDYM za>F|+6J-8dDfhPtIlVYw*mglG&Dzp(h-pc&+8q7wnjz*m5%<8D%eZ3t7$T@PYp?m* z*uSd9tcbmqX_=6dBDDD#YpgNI9@&im-+ju=kPvr{-;XN69!$GTSgKVyWJX_3lW8&r z5+-P(a0chH%4rO`AWl|6z-)g|7rr-K)$o3ZxvyQLzEhBj$*0SA0)V2Pm170cG5F*0 z2FuWb^3n`rb+*`TJ1H2!#wvbX^LjD;ek~RW<|1z>$A@{5;2Y9cguSnmrXu|aw>@F0Jd|B zHQVwn&LpERfM=<7`2!qj2<+adG{c3QPQNdbDCplhOQ#3F%?Vzh5s17a6v~Q)8ra?7 zF%w{dv3oNLn6A^H1whkJ_YKD!UZBCtxG}qS?v6OyV2-8BOaBJ!Z9<$k*s~UyNpFRb z=dzPFUr2w&d9y@zAcwt8JIYs?#Ny*P?El0)$<#?!@Fl9Hhu}-v1su9t+^x)+w4GPh zvuV+L59G0Z+ZN@q7Z7R({TpsqlIK~;D{R4@7zodtqDB(?Jxn0>n{*@gpqut_$s|5) zd9Nan$TZWf+}MG`F8Qwh`lRhA4`)aBoLbnk#-Mer{uY6#E0R6y8yd(5Z<#Zcc^B=| z+0EWZ2_Ye$5uBgi@rX6P_@{8)-%*$UBXAuYc=+$&y8jG|3(C$89L?A`xbL!ZLVlt; zP!0gx0nXHKh?pawlLH&bL?o%7`M0*|1kf=(M zoM2Y(j*VXtsidO`ml3JZ6AvsKHi8-g;zrfYjY;<^VlwxOz3EZ1@%h0EKFtHnS!(A* zvjz-zCt!4Wcw;c6r&z3xNu`Xdl&G}P=W5}0@#rMcZS6=$d#yJ_;o)@$6*TxKhb)W7 zK+icUb*{ZSzr&oDlp&9}Y^5@seBG$z9X7Bjb2;3pQK{V^ZOWRUAb-D`=uzYO1XcYS)@DfASLfb4iDYBJEmzi5 z-CgqZGH=Hc6}^k9~@$7iFQztY-W# zvDlE2pWsHy9V%MUm)8}1&zgzEJhc8;7^2cfuGcz9aH#||rh1hGlz_%emrB6kStR%H zD$16dC~?i^vfmp<4*F8Wnh+Mw@LB9oXvr6yyiAb}0QqnAv`(Q|p76IL@Fv zOE5jZgip^|O38+qT_R^o(;9VsCeYnAxe!AmMkCoh!SHoQ*NBe40^r!N2NvT=MUmHCpmA0#Ll-o`E9w*pwk z`VUw}C%&H;(39}%#N~)*0~hcOz*9Zkct8SqkN0E!kG%}>+a(h=vlfS1gD5mE{lI3m zF2i6Dg$8VB+sDViV(jco7`R{TG!BN}FYX})zkF^;3@c%IC%SB(YN7XRv}I0*$c`O` zpk&5$onLv8pqW`yu$`IQ*!_z5Hp(Lucc9V`69EsvRW?yR_-i1@o?caif>%bNO%&~P z7o9eLZDk&tB^n>@3;fVGqH#nhsU=9bjylB*0&(h!w47(Gkp!{&yOz;Z3=DXcdej|W zAC!<-60db2lnk|B%T=Or>|(3WwP*9pcn@5N^bl0?z!kjSD>C~%e?4PLy%?I8`JMOy zJn@4JF#R62A@EHJVB1rrAM+8|_V_^jOW-MuiZt)&8D9Iz>EShbl*K3kA)v1r7CRCF z&~T64!MZ)-Icl_EbH|a=P=%_{VX4Hd=@hqmn3835$d|7_GLM^RKVI}He}yJs=dc`_ z9@!31zqdo)idD`Ch<-cbh4>u{hd1ooM(~DDFp!VW#YWQlL>j_Yj9p^Xh5FphMIk|}iyEHJuBUwkP&bm)Rba_JsR62ivO~Kd3I7%J+j+ZLxAqq$O z$1FsRK!yEf9j?N5XMO0=2~^l?E3e}OZ})FlM9fb;*g0IOq8fSL*bacJFA99o08mFC?xrMk$;#wYU zSs%CH$7lhe5O^S~Bbo@yTbW-_ldBY`lnFAaIpw(d(>e^%9*54a`CO2qk-}^j2fJ=^ z05xHJm3wgQZso!E6=_c#7CD_};o-nSaYj7Mhimhdg!4}OBzk;2dQ~}{w79BLL{dz+7v8|9eI?0jh?EX1Z zYVubnrKDXvRF9md1AKuUPcCd0I~0-?cO>Ga_qVU>PG3;pxMEAXcTP4s{%MjG<_^13 zcbi+xk9*PajC}m*&YrJ`|NMS9wC!z-TM6T93k@^YXp6DsKCu-mM#?j^c>z;_JhlwzP zmy$-z)^}-cxY_;5N=Z+}X?nm11ky3Qh|txFj=3X4s&<>GN8yXy zxDI7%)I9*OdUF8w3Tb$ql<42P$r>qP zIywb}@pZ{%!2%x!AE)Q;+b_e^ZttCQQv`+ca}r9qp>b?47#jrwY(;T@cKW3#Fw}oX zR`Cq(!Il?JNk@(oK#LZml?JPq=<{nKl9ScJGEmZBK ztFNEmVuL)98*s*omL71%fEB9)p=vsYcELbEv}6!^M7ngdv+=vYjJjR>3bYOD@7`{~ zBBlFo<{a0*n|x?*P-T>$uTVEU?%flXO-?t8?E~(FZ|1d2v)TeN*O@v5ebc4<3p#JI zz9*ngrf2bOzg#4zW2bD=)%S|-4n&WL!2p`YjH@;rVV!AWA7XlmL5a_)16_@$F0To2 z&gb86!R3C1jd1;X%gSCSZOo};@dS5R#vXtHtTJvPz6An&Di{b2hY!B8q!^@9zgQ!L zh}36rg=8iLYLdSZ@%;v>Tz{78_vOVf!Dwy@6dVN(7>H7x0#T}3BfAX^0?@!2vN1SL&cl2fWXog4G9P@&E;P|mSYWqLGVF*UnZPS^%yZ6v0&kaZZ;%w|*R-&2+xx z!Ya5Rp^aT|JX{4C=y1(8ySjxY!Od{a+}-ZS6G?q>K^GNt)dZ$z(o1J)y9x5nsUBmp zON=cwC4D@CuEWomLr)5xF=JSIe2xNxoUXe0Xb^nI(}liT_xlN5wQgG!c#CjwBYSs1 zLuX@M<#bPGWA?qCJlVR-&12>Ky%E{3oH({U3$g1F*k7ub%RCBJ37m%1)v_aYSVive z-=|xSt?m&UBZWR9O+@iFV?0mU7>z7*TTz)E?tV)|R62HRXc~WI_|<_?{VY$9%yaoB`o;1_L;bCCne(-10OiDq~1l_ zm9T%1{x&>R_sy7aJw&j^5t+OTqBp22i)*2tk>)6g!IE4K9$gG#?=5`x|M6h7*)Zq6 zx1~fVvj!mmbm0lZIs&-#AecAB-}wSli7@~M5YZlhh?;zvITLIA2`vF^439-#+)6^d z$`kqd-qjSawe|q83fP*xVAjkSdSz1Jd<9E;JWr{{GaVw6)4qINTo*jhb zP;Zd?k@fmmd>bTd!yV5MJ-oH%#iErdr(>92Zg&y~xWqdn!vH*{RXBAi zL-tv4JRQ2;WBU_ScWQ|?Vb*eXi-lyFr6%K<eQ!`^5DOkH1PKHapqjf zCq^0@Y;LXAEoo|xS-PV$=0xu7u$|!vIn>${d8$R~W19#n0_CKf;5$|%FN12?PHN=$ z@~><$>Yh+epS6%UMo-A9-6=Eb+28Bmt8JLPKs2lQ7W+@}u)iZP|3~mJI7;!~;9*?< z8TuN86C_r`ft0(f+`u&J5?q0B!2y>)VLX3;E0@5Er3IWCW(|Thbu?K2g8BSs$X8In z4EqVwK>^ys!u>A+I%``S3(G$vJ-}EE^dUSWm6!Jx^S=*1LAbboflq(ng%HqF{}uT3 zd;k2UXa25Y{&(nKP*zsZpvwcs36_4KVZQ=M{{hPValqgJCR`$GVgKhq22Qr$(Yb#G zg#oya{jY4Ve?VbUu?|qpYi&8z?ve$M`0L8aJrSFZJnqWthGwA%_ZfZ`Ty0xBi~N!WZ|fUNtF)1Q6XRb?3r;6CT}Zqm_7jF&D$)&W*A6Hj*Ha z^LTS{QuX|elxoPx#?#T2)V)*ABi<@0F3-xT#E0jWOJwfnCynsz&f1H`D~WtIHFNlx z%!cO{cLrUTE*j2uY+R_ODFp#y;HzLdWujN0)a3{6$Y2^Ka+tZr9nap^zWu0t5 zwecll(-g2uJKP!JRYI<4cz_X*8nReND5rD(K3dvgN64Y2->|{MuZ2_Zk1VOf>MiZ= zY4-|ljMXKrNVz21AR|f;Z19d@bUWP(oLwoN!?q??G?N-M*%rR(^ueHs$4zpgmjMGm zaq6WtBYEWVLbG+ybz&L@>^4TlzWc3T1`8AN82B??8L!Va86@VWr^vikHK_3}JdQ3C zX5)H*?P1+BpD8wRV}90^uTNTAvtA@FdLBd8Q9#{+L(RNJO(z~P@@0L~h^MQuuuXt! z!(-ed?K`%QTw*Kd%euz*leRj96om}0=67q@Kgw8LT#n%`642whIJ0tr!PGo<*oq=!IXN37H=*hXDug5 zHbp8=PI}y~ZH5pg$>m|iOIcIl)wSHn!u&HVMI#hs7P2)d8YyHI5hrw?YTpvL3vHg|E8FwTtW^4p4O>8x7Wx1sEhdB)C zwmI&4R#@vRVrP~<8hxiGIU8|*uvvD1LUn*lojl_3S75s`EX0V0z5ogX>xX{qt^w7U zg&4+U9ZZh$N@oFd3;14awfIE7WXwXnHLBCkJ~8A@5e9w2&PCH-&+3Qo#oB(w6kY6s zKnY2Se0ovJfd%btKja;iFcGiL;b*x<=12108VIn{t6#wjYK^GZyC0dYwGo@{|$Oc-OwyQ|tffPbh5W_~0JzS;DhL(kgqvRQ<{wzHT-I2m8mT zCkE^&t4L~Jiu__;cS>{~4QXf*S6%5;nI8*(joyoky#Gvh945q|ZeuHqq#s9=AF}qW z0x2&wYh4k7BBbFo)7Z1rrO~RSCRTIz45Ox)EY)v1IejhR8;W!=g-$cQWVb z{4@__uHFZkt355^JrAA*gbX}vXzb$|7Lj+kycQ?u^^ibz3d*Tfof&z+&m%iIrxSpw1nSwDl`C942 z_6QWoKZg`8AD4~a;+x2Nu0Qy;b5>t9)lC19Ts_vEs4QaHq3ohR3R!Px43bsht$E9!$3M`XAtPUgf$ZL3Q!16SXZ}fa=x*PI|Jm?X{ByxG88#)0w)t2&O%rcabzd~(jp zBeE%8Mp10`3E_`shO#$w368~^ln=^0*sv3>*?V+H;U!I%0=CPB8j@+{0wpK&SS%A- zL&oC*dtaknDQc3}x@lM@!%O#JwX`}4rBN*hRjI}&0{gu3ZS5Izx|6jxhNX(mwyTeo z+YkC(4rw;?WM{cKpE;~MB)xXq4=asNUUH3AVjFFi2_nA!)(8({Wpt=`T96^JLPMa) zB4`k|;#(kE*^ntEZpJzuh9LJ#i%AUF8HILWZ+v+A%Kd6l; zft7OtKM1mkYn&a)snWb_H1UG!(vxRypP7-sp$nI@UybgE!J@s3Vk9W#Xuu` z3>X@vc8QjN9A}{Kk~aqHC<{dfkr1)@wShL7GYS)YpX(DWIr+LRN=n9^>I;@b9D$9L z1$0>q#jXtWjIrLKNhNgqOWyh4jw3#8K*B<6a0b6MipU}mfS?9Z*_%p6x1<>*`Wv6g z`ukd= z(9k7jXRr)b(rK3~O!^iL>ehQ&2rorPy}wLHYe9p5Xw7}&Oqs-m=;Z{=&+4+r>dE6_ zH71tc8m|gZuSPFKxtF9JU4P!lT(9B|>ISnTOZL%cGA*$mZxC{hr~`9(PCp${Uu$O8 zef;T+SPc7S*E4L)F7LMQcDJ2B$Gs3=>$^Se4cuTWl!U24BN^WeHc>kFx&${MZ7RMKIAKe8;7OS5XAivU zNkI#G=iJjW;a&d4_PzkY4ZRsV!Hu2J@L~hMiO#ySBu<;om4FFLheL|qID#_S-G!%< z)XqEP8dT2gh_x?ziAu#`J=|3t6BZ0E54AJK6g4V7zZ0{I)3{lxyO9J_&m4_VrrNlD z5z)W4A5-&5nc$ido5TH4+6t2SZMudMhp*S#^wG)3QK90{*JyO2kk@GPU3WF*IbWl( zcWFL_-H)yJPS?-VN+B>!>nr9Fs(_waX1H6b8=SQkH9o+BQmhy)j45ug57t#sl_(EL zNz~@mm>h=`dv(IHqKL>vp`SOs-_VbuM2Q!y?+ihv{+$w;Y^ zFj!!VQF6)hUVG%%M$(0qwh>b*N)wOg;^B81Igawg5u^19J)z==XV0 zxl24;l93-G?k9z|Gr=N}q3miLjhRTO-?ZjUXH}`?ZGgvMt7& z;buyVj-OYul3&xO;Q;J}73_9NQVhYz30U)B{#p)9vKmRtc6LL8bq4JzpqCCCayFTL zUwWlQz?<@o;k9ts7l|`onL^YA5#z|Edtqz>o-sDZ-WlLuI{0UHnbPYk0X`a}kYD=$ znuM$M23DZI3sDo-AyTJy9wqvr@cA zD-(IwuZ@@%dtYE}j6R#O*+EYq^G01yuNo^j=+ih3&fD@{R8sZ`h2EB0QOCRs6Qf9R z7WK-~ev`INJ!^zR-vnPAXu*K_<7k&efjSW1%H3 zB_C-*J-dHf$n@|HrztQah*C{hkhuGX%8VjPSXZ8zV8y7&s;LMX9NpidQw%m&5hc*M zALhHPj>$SMMxpN_DqzQqJmhNv@t3b{b8gpqc@Sp85Ng>^_d;i%;?0U=J|P$@(%IUe zlK(MODxv}n4xf!25{jD4vWlgMcBj2SAV_&E&WiRV(g?j@JUm`L8@&*Og6f0l9oSv{ z7!Y~Nfkp(@OJ}#(B@8s)X7+?oFh{U*s>|r0RUHl(JH_0t-Lxh>pA|3U?YjT!NfU@L7YCI*1ypjc!i;`U$+b$k z-w=_83Ql+4AKT8)Vz-F)P6DT@QHtpL{r+W0@fKu+(TtebT#-f>q)!_~UNLNBBUgz; zZZ1I8B#NxxF|oVq1CprgpbW1U=VJA~ug25Jpmlt;3+>Ytrn(@OekV#Bsb`3mw7Fm` z=oh9Ta6kOwT8Fq4iu3oM1*eORoWP8jH9IKPeI#3nMxZe9vG|4oNU|jm*mFl>y&UH7 zkn7n9*R^o{82ivdR3&r<_SP_DJjRZ%t9rLuyWI61!IdV*NzA;Cl0m!SEOxPcZjWY+ z<%!+3+?1f)#}iM8q;@WXPTm;KI{6=Mj2u=%&5O4p$PU1J(nr;bL>e^e3Pe32#C3dP zLEaxrPaQ}C3w=~`%u%OYREEYWY0=f zE1|t3XNl09+h{b=#zqUFv2;|OMtSj1_C&0L_GGT}@ z1K+XPXY=5+U`QklooBgS;y7I<(Zh3D1E0B7EM{-fSLeqEQE{9CseSAoeG)o_6#E_B z9se|MGZC6N1%WI2>KOejCz+|fgbD2n5%XxHo8r)1-{qmXm@EwpNNzw?_X3Wzsem;7 za8;RW&SN=^i7E=?W5I7W;9J@WxWu7d^hx@w+rHTgv8M1%HA1-8%V=(NK)4li+QAMW z-z+7-SB;0fO$wX@v9;Orj&Y=ILv7$IwRPG9*>ink3!}KJoCLq^`eylSmg^rYzKC_Q zIr1IJ7&5SwIQO?;GDsc{-n_H9Slh*@MfOjDz`t|D{*M5G|AV9iU`X~K0lL@#9quPF z4xnv6fIzs>*?&Qd1AHqpJu{#t)cdQBkd^E2xa_}!bV1;(v!Bo;V0-;&5eEdc=$}KA z4&d3Mp2jb1($?nB@Eh0f;>Q049>@W#)qarCxIt5XGztR!FY&-XH_BSe;V-TFJEimA z>M964rxkPyU^V`6@Sq^Y^}jfHe`?jATExlrJAnHyVL_I^2YH&Swqm#~!WnWJ2Q>(f z5oAkF;{^aJ=tpwR(v$1r&Zmq)<#kIg?E6Ev8BqumYO4FKQ&v>d?<|^}Y-mpnD%?2A zzvd#RVp4v(xzp%D8h_x^dciaop1*$cu#9ulmaSgR{iwBZ^4#)>bDv9msb_lVBz62E zQ?6QUNd#vx5ASp@YJ>Rkp2^8&mA(#q=`)4d^$EUC&s@)c zt_JRXpCfa(a(!H70>1RbVPfVtO#^E{k<&DVwY+V%Srw;AHj1auni1wm?Z z?rD)K1ji>yX=zhyTCjw$Ylip@cuG}ZzbDBQ&~$%w`>2h7PFq2T{|VCTd<-@(Jk#{; z@;+&?H)g%^pD7JCWj<%#P>75USUeH;$!&fk!WdTfmA~>CW7KV;_d5+OODw%}Q-16- zem#A=_id-w>=~kN>x7^WcsXh3xX!&7;}A_WbD zq>N>4`@JU7$(0i@Z_4W?GQpd>skIs(s9g;iw>Ft#WkjAXsl6==LiE{)3>mDLGf~s7 z(2K;SC_c`gy16fa*s681DREH_9H%aVd3Aiq#62SU2S-dS?vPE}4EIEboWyw6KD3=o zdbos->t3>b#FEhE7G!N^vu2e=L~3xR61Q@;sA#>0k6DI2%=xKzFgWk4fy#IT>nzXd!O}t5L1br89c}Sl4ZEu&TjbkW>ZaP` zQ*kM=3A&b&G1bI7+d&wfsqu_TsM9WicvLIPq7=<{bOz^_tWa2HJD)$e6x-zol`J7J zpqSfsi{jIS55q(%^FQLolIbhnM3T|J2Neq#?YkLi(YqxTf<9%Udu)dGm3?U``1%8= z&u03K?1@_1*ztt6cAuxZyObGgNmlO6J`*#!y8H8GZ-3ry<4Y@rPtHRRMk@5tvH<^$9!f)S@?N{rPoy` zV-G=w$Mgba!{EaKXr@?=O}PTz{C!CVQl%SQ4)1f)7b;wa==p}U)k+j_#askp9>stE zIQM`pFWTbe_5OCvl&?FvZ;FVPwv@E^M{39!I8Vy!9nGigOS7>v=Q>6M^Jlm!%M&Vs zn3sJ~4^u=ezf(wa-%$1WtU3L*Cdhp4Lt?Alr>mL8h4k20<>g{-w$l}ARedpio54mz zmmz+q68O|L%0&!6m)3)d%f+D4zX1Qe;V)YFuDA|CKGhWbSUw`ERoFsKjUE$E>}b4zQy{Y)y~{gHwkW0Gs(da$rfEmy27a-h-j0O;JrC<4{hHF zBLQ1!AhxN6x2J+LV}GQ3Fs_(JATll$sWc7IuEfx+B*N-O_LD?;D}6=n_#54PFgmUq zPRjKh-J*Ob~4x6uov1U&a(G znLg#UK%*9}K%;>`@H&DI3*=)-QL5AvpM956yeb@{uM#WMWGTwKr5c-nBR(51Q%pz` zgT&g!(S2V&Q!C5}9R_ZabP1cNV0Tl%O;S6DCu8k1c@qxIlo-nADZ@5fp0XJO%6xaG zvE)sZyzae`DfSI=N>FO%Xf)x`NUY~rkIaCqgt6TEz-1h4u!Ht|fOR>KFD|FCC4*d< zs>2H|XsmJ3zE>wB&jBPfF>g75Klu~5KRL1}3{~?Ud?i5>ZkJbbi z4PHH*jhTY{S_yaj-t5R%-x4?Z#LF(E$y>NEgRuzd3GCm&-#6f8XJ{yFFiB7XhI+Uh zJ+`@Pfo@1Wb;=XUeD}huUOKOne5$t)t=0qxt4=FVdJqKl_XzYW`-+cI~|w%+m)>6Al8LM7_tfm7Pz zro?GZLT%+5l*0J@GsN#PlK3L}ag%I!ZBNJ5ty`a%N zrP-G6dO4E^)L-MTtBiNu;50L5-0&jqSg{21Pu@!kjP-dL~12z)1}B4qUF#6 z0hT}X@e8qfItfPV=VsrQir?q=OvTF6yCRRf_t;C6hUB@lvmcVa_`dJ!SNb}?)-r3j*hQq-?28n?Hw=hYa zI}BR`=1TszEA!+?_jNc58M?lItfWeCWRmE47MU)3$+I$kpc6wFVH^@Iw}!D|AZ#89 zPA-;aHqZB$JZ586_aH#v0z78ct2!|dygOxSO8QyAy9itg?5D|{7;z`?F9qs(|0qYJ zAbxavKjSQ6j#2IeyURkXSgN=xbAKb_OupZ}wUsZ!O+B|oJ!@oxTwS5KN2-d@HPToL zsZ68zp0^WXKfl3_Q^pzTlzM-HxLcyJREleiaqW%6>WuyCl7tYu{u;-foRQkheT$S4 zjW_|z(t(BQ(GgeCy}^vGp2ijw+as?ES5Nl+mG9gAwArY49>|XcK#7)k}Yqy808mN(-dItMpq?rKdoZ=J0!wzHRd_ zM=r8m9t8o-2bF6bQzs6ezYIPHX}KwiDQAc;z__LR5iWi2GC|rmXL|5Cc1MxW7dCJr zvY9a9TI$F%u(U2K-OP0>&?EzncB~AoeFnqP^TV4${pzDf;BlwlAhVw%MBZI$8!3aA zq3bL~?nraM#LGecTrEN&gV!&FN6zV{<4#NlFTsqwywijA06C`zb>kVlkj|CN?fM4? zO5l?zN%;gxw)maL>GutnS2p|EpKU3edcvQcz|8!317T0_`;Nut zc5dE#K^tnM*xlsu(v_50@f}{=O;PDgtta1%qcfo3az>)AAPY*AlF{YuUuj54176dO z3qK}}tPZ6?5l4a);xgaAgPIV_Tni--EiW1n`jSz6L&h_7JWR%H_{}@p4);$ZRFO1# zGuvRQSBtHgpQm{w?XQf6mGq)ft{mCW(03IX*3-t5#1Mw zrbwOFw4B1TOq_!^KaEk@Z26)TjH$v0k!^W7m?x7|f)}N}%`a@jyPd$LaLg-pISS)z zySVtHo@Yb1m^w^y(fdHDorzWLDWl1B$$dq?Jdx@B-cmyPKpg_8eB9*+86W*k{K-{i z=c*Ml-#6QV4?@8SfNi(YKLTpFwe?1S0ZPYW)_OHXq&_jLE2fldR0?nc*0tM`Z^Ry) z3lGRe=mO3tV)Cm{gEKryq71O3fLucTjG5RhrkW?F51<_Zxk8ll@OKn8`Mw>?GnvKC zxQ!->3?n|k5LmYhax^!SIUkf!UBV7>NehG5G#)*=SEz>Z^)=^qAH5fL575fC97H9) zGN_U+RlkyAUTq8)%To6^CYxJX{8;2L^-kv89?0yM)Nu}en(WadveQIl7j-g%*i}`n z5}OQT;)tpSe~lp~>mL1c9)fRg5Ol*O?eE88f>9NB`F_SnKnsTlmh!_u>M2s*yrR=u zzabSbyYL6z!o?Yk)SPN%a1dOr*ZK=?_S~{t!^vmu;joK2*&XQ~8s(ks8r4{kq$!tr za>0IjOh(q+>ith)w!br&{*Sh<@*ngq zcy54&y`HtT9kA~DYqSB^?_kaUqESF^3Wtg~K%;(vS{$4|(6@g?8~j6I`Kvv^kWJUf z*2u#APY@C-*WcmTe+$$Cdf30V3c?Bpy8gND6Tp!c)=nBfuq}Ar!e3hT_tE?Bw2A|0 zP=7*gf2dJ8xPJ(UIsO^{?)L*|^rt3qvj5KE{8v~TJ2wmDFBH7r6GqM938QU+)DQ1r zyuD+oed7xD-R=v-^ciKbgR%0$n~}U>LKQYc3}NzFuq;^eL>B$tpq|gVy0o#MwZ-yiFVVr{qH+G=kj|)04>fAd=*;J{mn(~lBh;EvjH>ZFOu~oHHDA=& zpQyBk(+fKe1#mZ2A6%VWiPc=)*Xr6khm9YQ@nu;dwz?e?;L4MjF!4v5Ikc4cy-b%% z+yG{4C8xk_ZPKB|qBo8&1wp~%xb?d7=~FZ0xI!(Ei8nWJy}E1^TePFK5N^BVTRh*G z3bmPKYAJ9+yo$BIDHUgVnAfPWd2dR5YNcn*We4$eWvb_fbU7TPs)iY2q15wWeJDc|z$BJfZZ>ZwaNx28SS_bS+LFo=`ffH%wZS=6*D- z>HbGTX(C7{Jpc)%wFRu!?J5n#vnM(ZSsLZhZ58E=QG6vFn^wC83||x&-gT*jhqFwN zkoKswedG!gnf{pj;GsF^M%;UXXRF>gAC4`Y#{%<}@HLezKil{>u=)j(x{T~y@6SGB zDY?$RT0H94v#psJ`>4hYVV1OXsslO;MJp0_uF~-ihTL^ERINMP)AHdNeCyAVga4iB zJyN{NFlRyCBq!$!*D_wqNLC&LO4B%{1ck|$gL$?@{S#+Dh)2B^x{!hv&7N*RJhHrK zA}TDaA9~A)7@V_y%Uv){x)#{p0kFWyYEpUT#gp;<9dj*}rxR?QJBj0YO25`lh81Cxr=)a5)E9Y-g^09^`~>QxIU!H zQ5C_zeTzN5M{^@WaRH~rwxu$08iA~Wgak*T-1Yx)_my!`b$iqo)x8yD-NG_B_W+e!;g!zHh!gb0eXNZCKV^}Sb z84(bYvTAdK7%SiUIFsN09_d8>1+nP{cLLJ^6ud4O2VkHR7V4=cgVfxvB)&R-L&S<*^KId5+L|PS{3K4f3p6gJGa5h>AZL9y&+Wg;dd3r zzBUA9F&rvo^jQVgTboKUG&4w4ntZmx&tdi}BO7+isc2EX4rI8w{>J2nyxM%?AJOn| zH$1SjreDo-WFj0*pdDJ9xUpvbULT~AE`n6j4v@PFt& zdZ>dXWJ*5l2=pTiz*LXGGROkIbGX1HZ|4ks_*ngV*?#Wc1bsu5_qGQ2?IhrBfyK_` zt@$|iC(~BdOL06db?=Wz^HvCFm49%x?zQ4uiHH39gtzlzz2D{8oIQo%zjL0%bk5q- zYhi4wd%pd{_GB1F;5iqI{R>25z!uzn@R1xT$q$|TyYB56*6XMT1nia|5F_t&7?bEdH?kcms&JGt9D$!-(#jL;p3cJK zV4FDD>G}yF;o3rVt&8O!%WH&h}}AVPicc}S&F0{t>W1^ zFXpr^`r)%8|C!$IF!>nei0oF%MYW*^#aRA@Re)i#xNDYSy;x12q2xM`WC}$>B$FvX0m1kzG#PyH}a^Do10k`meRg! zU^%Pt~UsLK`HIM_SmP$YeFd=vjE?T4pS z$RpujsI<`g@6Z7Epj%HEl^aOXk(K!MZ>knbH$*My-Q*lIDr8>oEiw*zja%v6$4J(=3y2Np-ziVZ)I^Us zpw_8!2bfmAuXb%0K1z&Lk-LDcLybGFJP$!K|HT-t@C64=@2Oo-Gm9F&WLjIxdNE8D z?3es0H*$fN}uIEa$bR@WYFkbpB@M+C(!jV#vXWNdqHB6h30$Ilkgx#BhKS zlMY7A;~#vF9+F@Q>5=z8&WMF8WkFb@c;V^_k&aB5kQnu@F9&^0I&=17aG4bJS^7&k zChyZ*l+$$*^r=280aqXW8y(^LRA3Pgo>EaL0f#nyDk`OP?L_^V zcoHRpvItu4jnFPhK{6wzWx+n9ytib8%Cy2iR zI};`bjVvR80}%gsiirvKd}YFvrRkUIW&$)g#IH=XR)w7-CO8HpDyXdRiBYNh5?BVJ?zXEpH$_zYXHhy}0&fdX;BE1c zt;Hk_8SrP)Y)b{dGip$)o6yt^zFUd`1>ecj-I|sATmREGN(a#R#*)6l)H0?6Bz#EE zj^+zV%GAV_6}k<7&AvRqT5YG_C`?<3E-`Tz7TiPDx_kbvr-r<~Bx627^9Co|_nBfl zrw=PV<7fO|QevjM%WTUVS+2kk6lRLkKgCs=>l!S2yy32$HF43ZWZ)e4;}tTPuGR3v zB55!J3}Tg-J7#Qbx|kT(BE&jR$uRbQ2vZmU@5bj*U^>*lAy0#`=WEjW%V5GB7);;? zn8BxJMldx$0aJ54n3~B2j_^g3S9GIbg@#c^(yAw?x1)rYw*nlY+-@klPn{ads}UyHcnNuD)=iUX{cs%dN}dar>EZf4pgEqspEu)|}0)zH0?L z!y@KWe)%Wf0{2Uw*nUDqgM&6sqmN&ZH-bcNO7K}+D8!klaMgyPM(LZLapm&7^dmw^ zaL^RW33*|bQg`R|V7af~>654G(}+k368Q6EtZW>^LohhM(FieLUE}4X|L#Uma(3 zsq?;g>BhPbCDJ}Q9GleV z(4iL*;De;EY$J;4$SW?qGhDkP5WpHt^EfKFQ|jB&I@z zWbsnN9wWp&Swok9tV{3-n|j(AI*!wX=;lpe4s&*!`v0o@i0^999!qJ(}V!Pv7eNSz`mKj0}S5*ynMj{g>;^`n(L*k8ny3a z>Jgog(+JP^<7HQ`Zq;9*xpOya+Y6FE!THy_21bR|t7Px!Z z-?PX7%B62+Y3roUPbDgDJB`-dkUGxRt3_BU-ZviU{(bFi@fYitE8vczX!CK82=T} zGAF2n+pA41-{|k35GKBdX0+}kp+ii>5D`oK20?H4>P2?NP+x9NPV-ytBC@kp;I3xE z-bGdB0s;hhqY3Kj#@q5o<8xzVb{8{x9Ih&h;W43VZ5fjzUGt0P?{jnmXLrYWH!m;W zchncQmMz;8eAlSYy_{~AQ5&(kVe>Wr7n*f;aE)dSUrlLG|MFJj+o_*0+v%&DJw5py zAF#|fCg%&7eNM}fY10*LJw#MxK#w>I-pIR`3zE~{|v z)#BUYz)^NQ?eW0fn$w3hacLcyyPH_lL4|j#1Kmlp!=Q*Rry)9TEls|;5KipJc;_Y~ zQh_GfvltXNH-s8^H@lhmsUi)o33-<1KDEF}U&bN~-U*e=qvs~xOR8yCX3@gl8d5FC zl^{!`pEJ$NuUsz{hQ2FtDxQkx7qp}#c%)pGMnIUvoQ9^@=(+FI-PQe`HpntRxUa3L zJTyzguv)0T4dS9|$W*hjdnh2)R)^_99LBg=c=qzDx3P-d&+f&~uM~4+`d%>EhwJ?> zF36*tycrY8r55x|%I5`MLbuERlCvUPR>{p- z8m3C5E}FY;n}#aOP|QJ+7{3A!8en5B zRPn^ktj*HsM64$L#H;n07;46X5ucbT{-F0nV5D2D(H{2ECqGH5mQ)sL5{@#tsKsL* zbpmhxM%~1T@pyRh03k>o@BzsKP`GOaW+Ct71qM^LZrcD)r`VxCs44Ci!WI?)H z7SLE0Zo=0KzgLOd@UQ|H!ogDs*Y zxyL=9Q=GtB9rEVuDtQmtI;A6GpDx%U*aid z8&L*cyoJDvR||OYcIW^v-e&7zqWRb?qZZ)Bdwo6?b{|XxKkk{K71@2Db(bq5{5r?< zvuzXPxlz(hu^llHAuiw%7|V=;oJ`gOpfia2t@&7XU?6sS1Z1o%nj@uwVNge2-OzZgOM;QLJ3J6$!|sxN}2!@QgcYz23~KMo@aad4ul|qf*<^gAlzbWz~nI z@_qbEFSkKz%yxqHOnyG3P?2Zo5lG}Zg>7Dsq+_M3@a6gZVkDlSqXbia@NM^c#Hdat zBuDW96VK^=hcLy5)Iump#Ods)B!h_r|s;4;BRk&?6`$5%PjUR!Gfdghw+%XtuTA{3{Hq+dSfKeC3D z)^UQ2**^R_`?Y&dWy_YbHOdQr6SN35&loz5r&N_KjZrVHQFP)=&?3RE1)!E1CZ?)P z*YPwVK8RFg|p{w6K!m8h)< zc{tbJXTvnW`^*Gx2t}=vZxfV^w?{8crkR?E*yayds{} zC0bfz%$}rk90|z{wYl-;7%+n|)paA=5V24gvO$(mX>0+bn_OgA2EZ*t?D9{t1hBN9 z0ZV(d4QK67Ts=cbU7$)h8&V+MjS6Ti3fG^=vuE~gCqU707MeHvLF3tiMQ+{1Cru;U zMX!VyL@%=7i<6;*sLoduNZXiK_ADwZ=mQ9iYhkjXS+aCf=mhKgSmYi%CfF9P_DgMm z6J!Ao$?CBmwmG?uZnrwvt`5m}fdckJo7( zADukfsUqLqZeyQ_5Lw`F*dVt~iD7*f);d}Lg}?6hgbE4et7!%Bizgp!x~7s_e>|}B z^!stuExG`U+_pU2KVC_lgrO|UAKRAI^vfKJ2Jz!%T91-~sP28(9*27MeGX}h*4&>n z@wZj`S@X(6@GPcz1JMo?26{VibDe8-pwXt88cE~Ug$kH3VIF6Wn_&D1AS-0 zEH}!)=@mUQ9{y>n-)bLo7sGq;Z*Mo|3Ub@zB1EZV1;h-peOJVw?CPkm#D*Ht`VScR z6YK9?G-uz;TS;|R5)eqgKf>@u_Ml+sHPhhJw+7iJG@Dk1XVeGRvyjk1!6$S=%qqe% zxO-KWSgER+!1{q0=BBe|=3$*+c&P)?ond}?420K%Q|Pj4poJI}B}V^8 zCAJnHkY{XqJlvF;t#rSN3UIXIq=G9DrJA9i4D*l{eNEow`QK!DfF~#a1^8AWRZ*3- z=n!K0!|z}$HQFS0j#mpR$=z1RROMI-OV81nyspB~9ToX?sL7T|N%5G=cR*+5Twcg& zm6d4!$Mj*{`;X}ZSTkPlOllTQdTF{V7VHmm=G;8o5uOp{~!-^7p zKoGJq=^`+#+POBZ8sq|&bZ#SrJ7UB4Lhk1{8LWcxBMWo=)qcpyIXP0kf}5sijlcnS z^}e0_wDgF}!A0$vE8?N2DE6CpRtnnm(tF{${zt zG`K4vKiwYM1K*rBK9~%uwHgz5&9C(kC_U=W=<0|K+Eos*aY-&uxDTO3S+?-qfuYQr z2976}pbjUMuxf9XywE%LP`ET(&XJ(}q_~swV0<VjqH`gCy zKx>D2=mjYNv|4`lA_pyIbBQpCwtm2`V*K{DYpx(`23vQ4x{!*39g$H!5kao@QI5{s zDEO9Oy3|xj4f!z(*iFo>#8m8v1x9iwB44Invl+bph+o_?H)Zg+738&CK~G0Vvd{@1 zu0|?>Jb-WDU_OHipEZ`TAvPiOmiJ!>ar3`j z&55FekDId;wdKV&fwjUJHvb||x=w^$_k(?K%uY#Y4Nvp&hrzG|;JIx47FypqhhYT{K$xVTeydAC+ex$1^EGkx=aaVTT|&j>dm zzwa%9ug=`BR{e{Lloj&lbN1f@TnzsT zaE%A!gZzN${Fvn%fX)LLTfJi-B9kT*RqCINtx`H}PKZkYdH#Yo4E4Q05gn{bBE%UE zaAgo&x|fIjjt}TxrvC@PmC%+02e`&3A8rL#muF~RS%E<7gv%gE8F%^7r;UU0xGVKB z?Uyl1mMAvg>OD?Y1~kr3J0_2KEBooMY8zL`TV(fn#=WS|UCWzg&rqj$HHV+y%rKo@ zP`m&2Yrvz%_F*HB4ad<&^dz&k_m0ff4M)xtO4YSWF0~#NXP2_=CT~zu9X1d8ZX$oeD8*eJ=F6eG!Ll*A6U?ovJ| z^(Jb3;Id&q2Wjgwn0zCEpbFvr7UDATj($9FocYZ-5)ol?jJ6KSJxyFxOAn{f+3r$3 zqs{%~89N2KLBuN2jGN123&x-C4*p_2;Ug?nMa-0bJr3h)X4D+p8Wc?C+{TSEPaUh? zIw2Su`;-q|8e~YVMaAy3lCpY1jG{;SkT?!cc8~qwpi%DEI-IepF-5UpCILr2HJu@p0+`C12<+uRD zDG;B#T<@nB+HjyF1==v-JBiV?H}E*n&n5;5<54s0nbaLPcX+Gc7@0V6h_whR)kW%e z*^cKdDUVLKa-b+aSRU2z^Fh-kq#3tVNsG)f#UnbjlpK`!DcAR?Ur=#UNY+V;&*n)2 zevPV5>=r{hr2j$;XFFm12Rk9pbp6C=(cqfj#3vMA6nM@j0`fimm_7r!*MnmYlVcNLueAt$8L!e_w^Cv9+dKh1oxNEPEJW%3h*t zx=VW(>Q-t}BfiD+mS5AksgWL2+ozzf?#Fc}N<+rAae?NRtq* zrAgb60u3v1g3oGzxRDoYvJ?A)69Tp?n6F~+yWCs+QHNHakoHZO$ zFCM|vL=HBe?fWbkx7_R-bB-ue=oeR+wxjZg$*gElWZdl(<-KWdDGWd%9K$xuo*VWJ zK#m88is1MWd~Xv)PYFAX;u%}V3gB;Dsf7&+PvhlexFae!?Uj5H1Z)&qz(z>|Y?Slf zfAF_@8d{~RZ>QQbZ3gW<&`N)nBrFUb0l39EgYyEs30$d%0OwJO#l7`b42P`}FUFdK z1%z6FzS=ZqM`xW&RO4O(&3LttqdZv`q`$SM@7Ea|p?0JgN9K|pr=H#kQMBoJ=zd?F zTP2{gBX)Nr#PAiZT8+&jLS9AL^NE+^+#EmLg%LMASzXBdwYGjVE}4$lJj@mql(#QO z+lKD0Onk64_wQvyosf~e9ph{WosqQNHnrm|nT`*ctq)n?7L!}p%9$4-H#xpEs%?e* zh#bdG!E&kJ+S)LynHV2&`FVE8nar!YU1Hi^t1B|2urM(;H}1aqvm zgn#l#ceFg}Ho_8fG-nmVVtxHhr!F{DC+Nup>2OZ6(R;t6O2a}#)_!dCL=Hv!MMn<# zO=bwMH8pJXaaeUyzh2vB-{mrL!>N#0p%k5_$c-RRrpTp7n9eMDSX_Q1Su-*p!`1() zuJj=4!;l4!r{o?qz1x3orDcQXda4`#(E`_Hk%&Ihn+o(GBHHlYW)4em9cBYT#p zye~>4cTv4MTDYp$XW1@;iy|+MnZ0XRs==~>@4nMJWU3#Mw?3Z=H|g>E#SG=5MPBHA zmp+K_U2%UTeUG!cN=WSR*T$%%f@ulCbIMW4V5_m}2b?7x%G7=ChU-Cx;`0wm8dWmV zYDcz_H%5J~40$WL#LpVgBP`LX*>tE++dtIy<)ZB+9bF&jq3p%Co|!5EXBCHDNs`rF z;p3hxcVG=9NkVldtOoqu+TDv#!riTvK3*)S1i%txFBV3)d$hreABJpa8z#*k%%h&R zqX(s=0*5zi-dJmQ(jeE|&&<0n-B28!!rQ|)K34#zXQ;0cutKpGp9+}!4RZZyXEWlk zUa@E%&OCGedjgf4CITwdx)vqrEjWe;x&3_{1n!>>xXy(t4V>bvn|yzqd0V7$|-^3X{l9%GR@;j#aNHud3``e1)c$d1QwR6Mco|3cpaM%)o#GDfh z+B0(@4i@E9Nh?R$IR6;LVAUUJ;}1Li=g4iZ36WUMN`5Op#YLO*V-riEV{eLMHg*L7 z$lMgO#P(KA3cG>hQ1}3C*%0EAwc*CY{`8qzxsE`qB)MFw(a<;(DLDsht6eA^&LOBhWWwRYu|FIsx1?dR0z% z>PcV7?400OR#x=W&y^HZwO@2Z=yNiAJ8sB2D>r}8P>^nhO0Vc+f-R6L$S+z!AyR7^ zTwD_@LQe|jCqEJTc$n587V3V{3YJ0-cx4lqoKpHa46bRbahdx?z;@m5uCp@Br`PIr zI{qf#-d-Q`B{(MMOx(wPrY1ox&w-9p;zjsI(UXpfkNZWHpoq`DppXCE8J5A*AI~_9 zb9C}&;v9wPU0#BA+Y3hbP`EThMop5wa()DO66i7O(4K{lPKa9{Os;1L093)JjT%XM zr}XLSEj+)!^yq6G3rA_OtG@^r(6UMsYM1`nojcDBZj{b5_snoRc0ops!OS*sl@n8S zr6>*F6}~xnWsE$U2QtjO&N< zZK)3LC$%ppk8I0SaValg+MWbv9Ya@kN8c4Xs9&l_^QLx0oL9Vz?&s)T)}j&{OUgQ%w%am*tcl z$q+JZ$(+&SkeIj7HK9V(*{d{INXQK3&%r17b&WzT$SZ>ks)zPBz8-LGZJ^Cds$_*m z<)BCACejO*+WW2yJ(M0DdrG0o*;EvrOOVpMH}p`Vm;P!e^5@zru^F+?oiXDtrG~Oh z_5$(Ig)U=DUu^n(3?02#BpPi>vQ&A}yOdA`*?g7p88NvNdjt+_ecO{BGGgdUF54(@ zKy_p|`NWQFef>Q`)EGzmpQe|R^6N|99l2-RU6f(s`8fmciJ@fqkWN-q@#;#;rt)sL zO%XFF3yYz}eOb{V%H9Wtj|ocUv!Y!%G$-&@229dMN4yVJR)xN{Ww1Z}%!bJLmGK_% z$dt1dV^}qkzyv0lnE*H<10I@-r2J{Fa)nQc?vN%gF}E72pmLVn81gTXYnd_>4ubT~ zsb-|KF>_1Lh2WKgut1VmU&gY5qoNz)2xSAqzcn z6T2-p2zsub&@VkkD!?^cmX>;;|&NiQ2tvm>)-L5|0Q77|AY5G`+r9E2l*ZF2uM+X zxJE(#J>T)KT0|RtQ+-`qi@%!5Gco*UXj+hergQ$mj)MG7=lnZyoegM+zNW1W5dCRd z+Wu>s{vGf9pHRmj48O3nKPMzW0MG3jP5N8N&qn{Blr{rXZP>q{Z2uV@A_NL=!ZneM z1rY3h16nM<(j5MdNp}5R>47inFU?_M_|I_2AiqO8S^wOZeus4aU2EXc5r2Q)SRsE# z{Qi54jqzVqk^hFV73g*J2;W{nNEmr};E;^~RBdu>bTAKJwaC;Ep3#}31XIcw zuRZBKGNGp|N&UE1g-+b@^>t@dwr@wMM9w#!t zY9Sog2wCerJS{u*kUxC96W_=8x1`1FL@^1Pqz^4E!d~60|&A2XItOX zP6vCyiDVAKBl@D{XvU(Pu7(UbBh?oN4XPs-&y!?1zRuTe3Cy}^Vg$OmD%rU0UCypK zpanJwzgTa6@SBLO?@j(_H4ycGT`HmGJx~Q{m ztH0vBo?{n{d~ST3Crz$Mqsd`QXe2Ru$L9j;JNkCivl$*8{$8p)qv^?DNV6qI)C{K@ z#@-IWILUeKU3@g2dhe^cw>`mmF6CoBUFM#r0+NnAc>x=STf-XztOWD(rHll7sp2zk z<26|3X3W~wTniSqX^SlRmJFp{inX!bh(z851k$tl$wUo?%dsM8>34JrPeu?C+Yyz5 z(mpdYU@zWXSJyclMJ+j?-rE!*3oy4qDg2q@V6OFvu(r0R((7&d8$~{1zIerNY<1@3 z8KLtH*^N_n2tD4RckjF1*kgB!ra;{LiAc)70AU|ZOItkn9=i-4 zO>hsbMVi+PuI8($N2U|F3&wj-R1O%e>h-oAp4C}hEq0M_dG6XyX+?a%b`@K(rIvM%NbBd#S)+zS`zF8U z+dnKL3OzGrwA{E^5RhFhxa@@%pBNJ9vqz0sF;f>pj1F~Bd+hutfwi$Rur@vc*2YXh zDL+gH6k0B~wOPw}#&N%4kDV zIhX)XSeU5U4AgBSWgJOUQgpFzCB=Re{VNXb^nteyB3ip7MZ z^lv~YaT+9)()oe4E{IfE_X0nUQlvC8Y@RBbO32-WL!7bNJ~>?$gTb zvYat;;T2jhde({dWdBPVbM`83taOr^4O$~)o{bmw>865_21jVygS(sAqLr&DA`2Mh z`?P%`IL`NuF$lOsM=U_@XUOdI)(BMY7A4iE6T8~l+((sHk9whJ)pjUJ1cjfI$eD^~ zXR7;$g{q=N?6}JrkNEcl4}6c3(;Sq`_9v`FXXI?B>5v>%98_g)Y;n4Jnrt3Ujy388 zW}24kyBw#SEsjT=H0uWIsN3dAYPVyhPsf**)$kTE8t1er-o2T7@oD$Vq*_#5hr+l! znX+dtTi*-*6LjQf`xPo5{G?vfA{3dwC6{p)&B-GwQ~e}Ei1U2|H~gdkXV@qn4^4Ud z^>TQm?tMIN*|8t*PKR7M%ej*TS{UKFoxSFMzh0PYGz7Z$vWK>bAb`h|r6ryIthQ(NvYRXm^lElBCJPBk@8G zxdtu&s3hoKb*D%8bIUHwx*b9YJmpExEeYx;{ zzPnz^_fU_M{m0j*+jh|1HV<1;qj^$+=^xV~LLR{e!QO?95t{*qOI`B$t72ZZiKC3l zF#EQF*f)sMdL(a_jokURVxBW`-rre-T?Rj|t~QA$X86 zH4=ft)|KZf(Tl6Dk3iH^S=;_`u*!D_7tPxJ-MY$;RGq=u_c01_2Gr$a1}dmJjo!+~ zn9@{^+mGeADiRh)pE-Py-P~^k1F?mGEQzh#coBlzC1|FNDf z_XJ5dO!$+ibj`WafGzSau=-{uaGzb_I&X~yfSBxUZ?Z&wx{x-i^c@#wu(|?n*);uc zl2NV=p!k_=V(p{vi}srifYwI<2kzvqI(0zBwN)b#36e;lzUuL z%biq$+Z$d6Gx48rO45uFTT7TdZHAaVM?S~SyH||l4A32d%25p}$1bQGyP$Fa&91@% zs2mHsHI3bd2F@zm2+d@PO>`k6#z{NPyASfz_X6o*T=T_?IBL~PIOhgVh-XGgFVEs& zmK0Gi%kDUsR^nr&WR#wL!ET7&%k55l(aj1|Cm#d)BTJrnoL%2ee^Y=TC>f{}a@p{k z>8}%TVNB$hESZKX_IAeSZ?dMvmNN)k(#M@(bxjy9nR;*uKv4Hu28yA3a6D{p`z@Z0 zgV9oFLqF7JDF*z{{3eeCL=!P7JGS^!a(Zm>)8vd;;Fc}hHBs*7skGERoJs95lyZ`P z+Ihs?V;}H|-uqBA_pFT_)mycTlhrOGqeAH0AaV4g^HdSe52+0kRWnGk*W@zqizWKU`HXa}1BNDBaLA4-3GvsLyQ6u*S+HsjgEcvRJFquT7QNVxDh2%Q zX=ej2_qw5;-D*L@+5j|a!b$-ZuQ=M}SPT_dt1F}L7pr%+GWCBU6ojkV9TVgDF8IHn z;R;i4F;eFV3t}L&J=^kqzDV#1Bm1Tt_11G}Y7MD@#rD%|@ROcIvN3`*NJi~vXDTDk z5@x@6O zhWRUrD4@R*qt@{qb#e7w1wYq&u~U4E`lOm`UvcCAFoAT(` zM@UabNx&3z_E`C*XU5c;TUv4FF(ilKpz#|bPLgPhT}*?@z$2@;)5=q}Sj;X;Kf4^{ z1tE3JOj-ejVJrg5lq%~t&J-Vgw0Ig>Pi-7yEY-Mm-!5LE$3}cM7%TiHXnw4U)G{B= zNn~QrDS>!VrMD41-1bo=7fFsX;+C~Z)XmO<2UFVRG_rBmK?oo0?UQZ}B)~+9uixi` zfpU5Y`f%Ta4$#e+^j;Q#Zf?pJ7daBc>{95x%+YKB@;yEi_q6Yif+_R*N~dlLL?G1F zZPp<=p-ghWKOXO!v^mhUJ)*BVOWUkFY?ZY=dUW2py4lgxvAWs0xo7KOFtbv{Y12vl zbCbL|q<=E{ZN}=R>CcRnP1CmJmCcTZEjb6&;}?U+C)srFQ&pT7&V-V0=J9OPpF8}R z<=Hq}l(RKhxl-e|NS*t3rF#-dq~IYs6563D%<;YvJHg{*?}~^#aahIn6H;hcH+p{` zyAJt^2!^z}(U6LGnqN#VGx}g8g^o%OU+1c_@2W_#Zff6`(iIV#lD#5>k=Z-FxM9&E zpgVuYHJNE1R-vWu2i=*S^}Ln33v_3aKf1H=P@H&{Ukn`-y*P~mzca`-I3}ta{yasc zm#>p@V}(DwC{XyF=1#o7dfZ#_ssS!ss>BH$k_0wj%MZty44JLrLIzjcMrej;|Nh0c&B-*3woVfV}qg-Wr8-S)<454G@bsc zb1MCn9N4Ea$k&;z;%l6@GBOjlwBPaBfOC4d@nH`LJm>*|2T8KJC|qYC@F3}7{kAIz zJWvCH2kbgczv>@YC{#Pe%C!O-ut8<|#*)4a0kCw4Sp>Cvm^i%>k+A~`j(pSfw*4@D zM2a9VNxZcj2L)HaE>Ja4#t*mMcbT$Q(8DmnQ6BFVwlVt)7Q@FS+b}a0&nL$^!Rkjn zs=f5#d~JZQ?gQgvn~&9+BD)jg6d~8T4h%>eA-2e>+Yhu3fi3AQ{8r@c3#P2me-?1P zDGk^O=-IJY5>u4W3leMgm?L3ENo4nrzbi`@WRJJ5h8j=Ewr(h|AkQ*l5=C;rr(}}kfT!T^HlTu^;0NE`7M%=swLP)% zkUxnaVyWLFr#-46Tr!qWbgVYfqYKx(dr-Bw+Qqo*b1V8oK4Bcz&b-X|fr-gnWR@_Y zhY#-+f?AS7``;pN|IQBjUxK*7@rM6iAIZea!2jsQ;0W1SaNx#*+R4 zx&czzf7v3S+5BZl_7~8N74l~Q_rHg@{>^0n&k)z1`^~@`QKl#Ces5ggU~t}>xnXrl z^cpihy2{et-oEsme*Wj?ZhV%UHmV^bg~Gx2d!-kZ*vDssFYBVTLX1slqlrA6j<-Db zF1L@D`FL>Fg5N~DASh;hm|Gn7;5omLjK0zeY5cIq@u9XZ_fk_|mM=K7L1TMM)1x8* z*nXYNt`VItE?;qLO~>_-drPSa?(lNsuUKDt0^6@4a-C>W4Oa#p++!*2*PrZw?N_lC z=R_QKIom#3g%QTB$>sOZAqOI&x=S>=A$6Y1+Yn=lQmm~x?HW7r>fD{(o#^)#fmUB* zlx8R!Lm(}eDc{*9DA*=+uk-FH(>(fA-b_b%Fg-Gy$f2{L zw9cD$^uA0=5=VTfJcFib%x+|u=7gIo^Rl|Bzic$}g;lB_T(sV`=v8{?ez80A;@RbM0*-`g;wRb2c3Lxd4O-Ae?7LBu zi$d#(udLfqO3J7s3fXP_4ht|Dw@ZudwZ10RCW<~kd)s19&ekyuoS(FQB>-rVYi(J- zS*(#n$i10w`q67W*n}xbo|EAwiQ2%a|Ya33VyKD(&kDTjy}ma3JToT>idk76j-a=U^{`Mm&tbM_~^{Vg0 z8$so+(Y+UF7y$CT5FpP>2J$?1)h8K~bU>a5T${y!Yx7SYKfLL*S=Dyv52L)BVpb?x zczJ$hquxC??O%i|-{iEjsaEQO?&ztS8@a?}R{*1O=nsijm1bz}Z;{^W9JM*PulT(r z&SZ(}#F&@%Tk2d1eh5+deB377^poTeNew|^O|5toyA%lZ)CO(#`dOHXHns4Ha~qf2 zN>S=3vyEedW-+wEXt?I)#&B<0T*jQ86HY-iqcmV}rA zd5dup`}N1-idaKQ`g%Ki2YGIqH&*q*$n*5N#8{Cf`*fbeMz2Qv*@1|5*smJWP~@B3ymNuOr>*W;{aUO+H6^Ly0rGTi4bQ%biw=D& zOAFyyh3D)A>`_uQ4ZFSCBeut*<(Oz{$qwq?2xAT-29IxymFh#viS>rbT}Dzy7puFD zzp)Fl(zZ5h{Tm^xv!DlsexU1WhO+(|8v+bI5?mb7K6jl?&GSVKwf^;560 zK3Co-Z!Kbdd!1s2O4@_wU4luT4f5L+K@aN1Z^Fp9rwU)Ru0|S{nv5S2E~!yr8cm?} zigVm?l>BZnnWcpB3c}(V!(|<1r2nc<EHkz)9H+#@<7VLr=}>kK{c4y?G9Co|sUU zA#2Bux#Jb(!FZ!QGRKC0fCCKKRHd87eTsHsRO;c#VNAhxMXPS5wc7@|vKFs_Xc!81 zYs;PG!CY~p3J$*<-P-gybm>|D-3TPByHDPA9WEK3#AIr(e8dlXtc*J1FiE&^Agvym zHYX?7!)gN7V=NOODOBjPp^ zM?pWO1w0)uTRy)`8nxy*`Puu7iBcr@{n*E+NPWC-#7U7v1&BREk3`aM6y(F{VPX{* z5#$ut@WGE;q6q@BMqMCljDgDi)~lfdtk==~>TDNMDKK$xo(3`Zdmhaej zL0ODqs{{n17S}d58LMF`qp+q z+duRuk!p_R4Ypw%3-3Ot5(TRuz>*x_evo7-lEf~_Rv9ug?gN{NpTqe;?u2M(ob;9P zTFuqz^r(9Xh!{<(I<#{K7%W(DMKJT$b0tcY0 zn+sox<#Dd_=?{ig2{_8Z*_bU{eML*L{U+D4;Hf(IAlK(kLAXv-haK5r%gO^DIbrpK zZFYcl7vf^P;6%vJT`gG0?>dI-DGaqHnYqMeXY8aNXbUK$&k3Wyc{J4Kw|Zv0 zz`wX>ydc`JRVtV?A$__^+kROny1@OKm8!ei*vIS(_3^XgV(Qt%^pcCbwYu_qL>Hwx zXQdpD6)ey4;uX3tN)b6w6ng20oz)y7{H0GUU6kTU?5Z?AKfe~s{(yu#NnoSUyoFC??mB4^l+xoN*R-S<1J0WG5E z&C~Sco3G?}h99y9B_YgGhE0?S#tEPxF;A;h85*z%3P36to#WPWo%+65DtQ@%G+Hwk ztFxrz7&!<|9MhmA`!|(2tG{?9#&hl+BhFNqtAW*v7U4&$bNW=4f3Z>1x4r2JW8w%2 z6~_4Lg>5#~$HXAALV`zzI@Pv2Y3ay@y8Es>r(LhoK?DK5?M<`M7$GGoR1drS+}E{< zBMO>4vW4zO;mxO^w_Ew;`4L{*JkSc))fu%C8-SMJ+M%EnqO{(~W}{fe1yOW9KAB%W zK~4L_WS}KKx})sCOVYx;MZg2&-6yU#Wi(=`d7n_ufW2Il!DFkcUqhI@pI@Etl~`0S zT0c2BA`%K?GqaT<-zzz=M^+5Oft;Biv%g82FGo7Ew_ET#vvhQC6kXknEs|Ma68)?? zl9`g%U2nQiw0L`L-~gMYnE8@gake>LhtEY1M8`{I-0p-3N4@O|*THEZ>qvm5gzNi* zOzZ>$oCe!8LTP1S@l^PLu+=2$tEWpl(*;94Y7=!7m}`Z>T)PA2S}`!!vVpm_0nD{e z!CcD+=33wn$DI1UpWJG`l9`KI*?@=YMKg96ljE~|WyC9oOubk&Xvad8?)5`9h$TVk zxRI?yF+4l0hIwr}uMT1pvI1x;c&N%4&VG(QO4`#4s8#j4BT$ZyN>r>HtHa!pprN`0 z%(f7q)K@1(jAB1eB6yXpk@nK|-Wk>7lzzk&u*bP^2ZLrCTJ1knS3!yX(CM zyzlp}XYcRZ@BZsK4n3Gzz?y4j1#6wxd7eM^P<2s{p=XCGu;W{2JS&s#JszdP>qvE^ z9f8JO)OD!dg0o0SL_7h-#CK!4c>*&!F<(G!o`{ZMsDwgo8Wl#yo`-VtNTqgS%A+A+ z;zPIJ?G_W)D1>su?881u^HIlBkw{GNw2Eyt@}Y%Egbjx!*o=73rT4j0o6$zm9R(J;xHx#f z7d}zm3#Wgb+9^V)Z7G-DX|v;cLp+gNHelm}AG;YXH{2>}4pO%PPUi8@BD;RqBweJG zcXv=k6h9Oda79U>ymy@xX>2Mg#_Ut@%5##U*0qL@P#*_jQx)h`V8A50TPT-gntJG9sg0-Su zhaGet7p2S2v^YQyfK``*j!+@EvFLdhVl_+;Tj{SQHae=`P0StN3@p2-6!o%T`ynvf ze_VtU9~`+3TMCLWtaA1s=xJ6?07+eO*kHlaRxCS=zR!fJ9pd9uM+CW5bke>-w@Y83lq*WNl!?5%wAq?zd>zxGzVi!|95@8Q)k z54?vM+c(9Lds3tCTw_AsC%=Z%zklZ%P9*HXO_eL|8RE#R6^28CoHfDpr-dO`PKHrT zZ`~ZSU9>lp7^^Qu*?U{u+NXv01a)^6A3r28D(Ok8>-=29qK)6O_d3o(yAjjb}-G3 zEdFy%2LcN4FOq38jmodc0H{U3$| zJ|{%!y|#tjpL3?{Y=7Tt|0C@Za_KEY_~3qn1h8MYzWzDZ`MdO`{ZCtthx3oVvwtOl zak6v%HAy*aP6LvZ7gb?vmUN_SS44C}lEX1ByYI<E}s=jDmLm}={I6N+U~^i55s zNXF#I@+_y81=Zcd=Do$Uf>tQ3NW=YPetHtS>$q_?AN}yVio?|tK$=|CdsBIGwC`Jc zwzkDuHN%$XhP9wInY&!uHXs%sY@34VQa|Z&Hr-ouu)E+pc|OG|e7=CpDtw8WG@8!v zrP3UsI5;`^sK45(lQd=Cz0q&9CY>3cxSi&#uI-)|GJuHltuxm+1t4Jc8v=(hA< z+iFMAP)t&AFPkE%8l&kka;{c=CF>zx?|TUIOtvjxC#8!*HktfkvK8v~ zt+{v8^(}^w?zY}HwxRwu=JZ)6I@91h<~w{Y7P4P`ZJTb{Y`T^$ZWvnKeNjujQ3C73 zy28!B;2qNUDy6L+yo7W|uOGceL#vrKV`2;WT`4c8m)u-lwwkCnSMCj16p%E@bRw%~ zD$6IwG%7#%;Q;rPo7T69DQfm>L3!?hYsJBlnND*BlOLK>qid; zEuqt`jaXX;)4n&iOW;nkB((K-|Y5^ zu&{-cu~y3a3xF{48UGec~xDY zaX<&Z70JIxZ_#IHE+zrLb;l~I&y76lwC~>M@EUF>_xcf%?C0&?ySIR|$Et1*6wQl(HnS zGSpl5>L^dbbdbz^DR0@<;WZ`qCc^^(g= zZytws$>L-0NbCLI-Q`xdD>&~ls=_121?74Ys0*8eK*C`aAN4ibA^UkqXi035tbmDbB6*?`!S zw371dv?%tPj5~L_y`QQW{4U&ei8Y>V?|O&&!N~MCgBD!+R!HSCTA^j?OU&LC0YA4) zstZ!+w};T^m*~c1S6zc#tL!Ce>?NeiKx&WriPsnbS$*=)sUbItv!NObAs^w%aM%zz zTA$D}Vdd6i%?}gE-;V+h%Z0oQTQ@#76U<616l5hb4lg`8H#IkjFd;PwaU0*TvUj^< zvw8%H)_9P9l|@vG^hNE!Uh%<)Qw~=zm%Q!K$i@ya9Ghg5wdsJR=ymR8bh98+?Nbd3 zw|%D(js5aHKnrcU|8z`<^NQNx-KCYPhvH9Iy?hQitG`JSDf1D`lX4)*@~MA`X(%IO zeL9dq=Zz=4qZysCzznx6dfZm!ua}h6!aYKJyMUqG%1WjI600Ixy>jGZZ0t@1y-W18 zBJqGp*8G{EYRxC#j8hC`b1Euxn>R`lvf3(B4SkG#OC6=P&gC|-pm9(4%~~(t>;2D1 zV)$=c;Vu5y(c)d~1D4#`3&V2r`kIJHw2*k>x>aFsf#8t722VD?g%%hZ?v^}S|C~*4 z&bDTnrg(U?!}vJpXmwf!oqIJqpq2Yd+4?{wtkT;AW!_Ua`4mH1;?bimLe^=wROKZ6Uo@5Vr6)RDd!T}&(SWRG-; zT#xiU>dH3%P4h30v*WKud{(^vv?NvKo~$9ti$p_$?IAK4Yo zNwuUU#?Eh}yIz$B)-+Hiueo%VLu`4_A@Am>1u)GLIiWI4cC!(gCrt)h28iKINASF;1-u}@km{4XwcHDqd29f50O%ZuK z`|K<#nxImd;`e~pm)`xI66n|t(;lG`Z)5Gb;aNEp(xrsFN!(?;9D@=QjLr z@>RVG*G^GB>1|aN+ILcc%Le3#9gV0k?+O-V$5-m_4xctG@$%QR_O%8Qsj0E^tdvxcjLH4gq%bp&fW|Mo7Ti6%7A>BJ@;qC4OOPeu@6IT_X( zPivQKn5gl#g*+&>T!5owL>o`*`78G~ELO4hHY{FsFq!@V$_8Tpm3m zeZ99KtBnvkt@nmi5j_NXZKe^{?9tyase-=llrJq%IASjgvn;lz(Ptl2j6I1fbyK9R zWyx7^K}#CCt{x@7a3fLSO@9f&`nSVxjkvpRC5{4EA}_}5$OrS=RxPL<-Z)pfzZTNo z>M{4o{{%aZ(YHWgv^)*L$Vy z1hOTW&ZC9SNmW*Tqadbh?I-yFAO`TG6f8zTOn2AbVmaK2&dpsl?8x=$8(n`nGA~2@ zHpCxtdV^MoCqpp(ZY}Z#8*;jPN^uI>MMhNBEDKr3I zLK~kky~bI|-X=NcVWqgrT?ZH>I9AADuKNux59AqDdYJB37Pu66f30=SW*eh>A%%~Y zuoF^Yy5l5Le{IaolRg+Iq=*-N?YQ$Hn28cM-z!4*2qRE8ojJ_5buPTjKjrizk4CN#N@~o35M=|;~-UW16}8l0HY{VV%STZ$g8(E zva%^b2U0yH!wpo31e+i9%_D_dQf#yCgd?9E;xg^t8*InChM#^BWz@^@SL#&}%&jPq zRZ9dL#NT(}emxU~ya7>OCszPusI9}sUX0BRw zCtH1Lnexx*(6Z-00eh9%TPSWr@#A@Rx3=O>W%sd9-K~d2E6q1g<7Vvej}Dr2>kR34 z^xhofJI}=MJpZXHlbq3=e`8JY=exyYJZGIPeejc00g6B6J14&nwq@ksJXL4hF_mlc zVH`aW*gZkVn~`6*E3jHsge8o{{KUZn9g}?2TcbQ~&l*!mJuL+J2W(^6G$>|88`oqV z>%)SbNV7);Y6k-@IfS`^is4wfDfN0t48b&Rq_D11;U{ZRW? zx@N`dq%I%a#z&Y}k$km{GI&qKD~INxBW}SlP0}m9ez`w&ihB3~6f{6o%As)BC=mlP z+D7Vzi8+{IEcP7_D~I$0^b>mchgAgIUlsMW`G~71 z66J<7Qxr*ZsL?IUspGp;26PV8h7;5>L70W0xftw^tb+CdH(}sAPM?lI$_qxXmF|l< zQ^bqk15BuUMht=oI!dgP7E|)*JK|^C31Gb7 zcl$xEHGaXpk*bQJSf|vrgHf8%KoA6T0TJ{pN@p)F?&OQTbT|xPdpID_r234cFvAgf z*^4LdRH0jbP-$|Ip7oTFCWqv&Q6)Mzvz(+Oa*)d%zs%*5 zh5wezwYpu&sl(`GaK?$0NCze~7S`enb-D$>%yBG{yW&ougSq-hX>2e-%r3E9C^6?uGItf0^W9YpK-eh zV)3CPInOnTy_U9IIhHPcT^|0fEt-DY1f0HO(S)DKYR6Sd9-b?~&-X_sR@T-^v?34k z8DGAj9k5!W5Ou?6bqbw>)HBvC)*TAz? zvSO3KDQH99OO6|m8X9Lpg*iBe0`2@}E^(XZ^l@DEqHwR@E!l8X>$lYA_oBu0oG5O- zcjjLun`@a(^*2%`s&HVWUT(oriXYmyAMC^YAM3wJ6Mf>&rzFovm zDI`rd-*SAxPW-$;Z)!`yFW3;!@J%S<0Ff2tI7Vbe} z)L0AucARoEw}O1ik1C{RFSfIXe2h0BX{m836J1(`nEiOW_Ip0k+4Ng($~Fn}c5)Vm zbOfroh@};1N^al+MF#YU2u9!MVx0jMih{J4J4r=)rh}FuK!)CUkVmg&BfSY?PVhu! zd_@iU9}n^wN~gir9@?$T>)R7^{O~fr|_#7MSi`C1RR*h z7sRle>g~%6^1U2zt6M z^g%?z5w!PT*5`Boqf~g2RQ;vOS!vtozWOtmk{$9#&FMdv<{;dc1!q7B`@d@8g|qK} zP{RH+u0J`!*dhNNV<7}`N$ce1qJ$vae3x-h2s@(R4Dk{EgRrV=YN8D^y1xwPzhm5k za9jd0x<%gj|^CfO`2)qxnry1u7e{b!fOWe%TSL+N8W7$So50Y`U$J9L`ZSTZ#!6Xuy09cx{rbK3HPCWI;7-YM-F_Evjuu0h)H63U|sckPk@t+x#uA zDy@zu=Xvu4+Y-kG8x!AW-GsSI_`X*JRrm^7@FpZ`k7_*d*r8bnR=<*Q54KyFY;s)c zm@&%%dbaaUM@xK%iL`b!l_seOxL795;0vQ8sBlzWLf%p`6u@m%jrcK|P6@B04 zcbMX0t_~TQoW10aT1{jc>jl*(CH4Ur7eNwH<_T?)%#-IIn!a_qzJn`z2=KFg4V7^6CV?ygFCx8f|^JeHXe4UbcO z3nhnr4JUyqV>wsTNwuqjjatxhcb{nQW?>|mi1!am%o_EDiQ3D)=BSVFemP8Cog95! zi)E9GVX_*%C-gj+oTBcaFWj1pVg;UcwiNc-{SnDqsW%F!bRFpQ7SmU1I;e71f9&wG zmQh--ejR8mDR`cOL{H-%qmbf9Ll=2JrP+q&<}$D8obsmMBlowrL=_n1no@6xN-@fb zq}|FLdY-~ou8{I6F*~UTyIyb;U0&f(@N$vPgCbbc>U4!n>8J}hzEam<-4_Q~ROGEyRdAQ0{?7Sl zg|>XT1i6vsRrKU0??SZxOjz%y8|g$X^FK+T-+Q|ArO2-hI?g*Ir&hF>45Ale4kCe@ ziezB=9JLG@%p(MCKqp=Lo0c$8821{Zd5$Y%3DY;*bAEmtq8K`=E&}2(?%|>N-fXMCWgV! zTrUud)Bvk4Lo*+MyL>x?O`O5|A?oDfXsPNgUhXdfr98wMvlbOvPs$Eh-aj6sh8d6r zti)fTkX|kpS|-ASHGxW@-|j0G^NxukD}!U~2XQe)LAoS{r-j2)KOfw2ms|M|r7pSdm>I!gBbsl_NxZGMaFp>Pr)k7V| z8?V{TKK$xaUu;{l5NtS;<%G)GLjwaYPlRQ($%b}MK|r3A9=1b%$@Y8ziiU=_1zp!1 z)5YH^HxCQDK~E2YDupi3fk3&|ad&e7HPK%b&gS z`!&U{Eq<*ef97m6I61Zpo6eiGY3WzhG%M%!fpffCRi?-*lDrbMQwv=kOiujTnsNGU zs8y8IQ~-tR+e#=8L~RQ=kY(6WCFs3`OWsmiVL7|1HlsL}O@Q{7W=2>vD~U8N&cVk#>( zG{+R2a8n{7OfHNFl3Y$LCiQFvFCYvwtw{vNL^b(+XHB?EO9RnSyG6x7W7V*3H@_+Q zbY|cw_2$plk~3TcqsE2zB?Js$-0K>2qj14{Ib=F=VUEo)$}x-Z@b4qpKSslNY0kY( z&$z;h58d#{P;lRq$yb5N9qLxR+F3Al(u%~&@S6xk|LFHAq<6XxqB40=Nr!#b1PgM7 zTXjTx4V(S5U`dhV8gz`^X*W!0f6^@4FOm+^W}hg)KY0@~MfjGpcFxJd{+dvuch($X6K5?Y!{N2U zy~5&yYlRUs;Mw{;CDZcbVFC%rr$qC`9_;ZG6A?99UGw6E780ZB-2UEMcdS09B`lO( zA!yHeD)0Q0{ziO9bEs-PJ8`O)9&rI4a`#w?4QuSvjaTi^c$U61ZS@i{&}0~Ue$f@6kk`%P_9r4ypzFErtm~3HyaPI zYs1}T;AQ%2gz=Ldr#v?2*%h^Wt%7j(Sch&c)3tmSq5KN%q;jtVCYxki%i0RrE892W z?)31!j?@17YPb;bk&sO?#v!|nhuua=+%Ya5k|`NRv~TC0!J5Z4_?hB*Wg&+azOzLi z&`;a7Ek@Dv%4DOT-IM7)cCnz;s3o*&&vtOvB6A9F&o}GGF11g*D^$Gv?MNt|P<@Bk z1Djlb*|6|uwOy~!lc(QD{jHqT@6uQ>GSpC`tGw3^%Z)h-GZlRVd0rw1xoZLBY%@{s zDl?VnvJEkQqoPEktYK_9O+Aqm7<|kxINpTPKO`s0sF9d3<*wn0UlmO#?N{4WYEyPX zaf6DgYfod1@NbK`HAlQd&1COkpq(=V50&Izr6@{$8}+AmQkT1HfgA4>Nvmd|v1Pya zaE_T6&wKhlNHkub9*61(j-j+ zy$(&^?0x#V+XsrIC^Z`ysszzbRa78?UcR!Nw%n^9C`v8%JH4VNL8edk$%jC7MB%+n zRgztsy_}VkmdEk9ue`^oT6tS6n2JLK3))o4_#(+>BfXU%%@CnA-WEpmTrjQRI%E}y z9j9CMr5oI+6Xi2;HW|D~^By3jZ*|oF7+QFsBu_AsAUIj|suiN8YQ$k(WjPb9>&)%n z^=l_b)2_>;`=kk3nvQF|f63|u^9YI0+gLpr+$9jx3Z(A!qd&niOouL3PcS2DG5E|~ zVtY1EI%>6V?rQB0`A{hs`4#Z9&yochD=K7^62RHO&t;CNwu6X6$EfXkd_r@md>iZb zXXI4Uy0@a*g_yNXIfpa`ove`cgKN*5Ss^CwKn+H`;yWj5E`w&)lF+SZ>la<`W+edJ zNdv&0@Wf@k(JJw`kxxR%7!!zfm0k&wiW-8s9F7ATO^=PHg)cwbDDz+TxbS$WZkD|Q zU)SlYRCg>0s=+tT${SPm7pk!LUIZlBZmKdnkE{nUIgiwj69{5rvsMQi}PnizF+XOF)7nVaBgQ~-rY6o_4m(LMvjUw zej@dmTcnv)R#_^WyQ$dtiNX;KpY*KA0*f6V=~LoO?;h+(JQEQHA#nZjl-T5hwLxyw z&176chWFt5#a=x$J>_%8<<9JFzYQIlFOEMteUUzn(>KydmtRb(^P&X8tsL4e;IiW7N;^LwLPoIhsz4KX3- z3ohr;$7=;*scGzRv1i6PuL&mAn3?-<36;78-2^r@E5@}Rvr%pxc+5K)r z-7w$o&hlr7vRaZ`#_!wj!;J+0!@>X2fAr&NG(Rn)1+PlA;MvfDxbFz9R2jqMvAwuSMA zGKvaXFiKigR1hoolZ-+(g)0i#Wb@pLA{Kler3$dn8A*Ix0IR$KkCo>Dr|!V7NvhyY zq=ThjN|$ztnP#=lC6@KxA6NYpuAe-=LXlr`;~!mGb2#`8FybZWm&1_9;1d98uwk@ma|`(piN+r1A@abyS-JKI|J zSTC@USOkRt=HlCc*}2&3-nhGMvwEwroq$#7t==uy`)p~?D^E*iX`-kEoK3JdBi__W zYvKfs3*}TycziwH)b+e(K2;)HTbGipyhM}GmcvF=fVRfi*_Z|#d{mLLJM|5hvj)U4i@gX zj#+&f^YKo;$inS&i}QhwrlAGQ=%TZd&XTjnsDw&yVP5=U!drQ}&34h;7K_Q#q#8CQ z7V&N+rIe=8h?1tG`P2H7$CuR4lyxE53+iWBMHrxcn(fycCQ-B$0ov#7Wq6r}l(GK% zt)KHM5&0_j)h)T#8{S&*CGp(Pn~}KNjF5m{RSuh)E8Q<7RrXw(JZ?0|X>UOK{Dv`c zpPH;Fyhon3vgSiv+`5<=TjQfjw?k7NFE?Xk?sm5-ZMof4`K7$R{K~%aw*+`z@x33JljeCUMrEH_*3_SkNajF=*9r2t z=9n8#8X9IHyw%@l~vYkuk zk~AI5>3lRfbolXb;IN#JGW>Bu&5{O|ff-%g@!`hRv(5Ccb;Iis44|@WA-mCD|11h7`l%V zM4tZ^=YTz5YW~VFvdEM?kxJ!7hfIarR9UU&(|;nR9$Y@ zA}uX{_d7>wJY<(eL6tS)lA)&cB=MLo+~z3Q$f8BL;c8|&j9@K@zYA$*&x85v8zc+1 z192&8bsWqj15@KEFf~e=T$VfwPoCZ`4Qj<898s(fqPxliMR6$Wxl(UEp@Qu-yLkA$ zZwpI4aCX`{h%@QU`y8f`uY?*XHSaaT$>yS`Na|87@gGjTkl^y<&bYNe7a}wN>Pim2 z5c>TOh1au@F>VIQ12DQmcvU({lY!V{3keV^PO~d(ya||}l7RUc37DUZps7bG9ZZ@h zRGt&{OUZKh8{K_}7W$0pOBgh4wJ*(Jh2YIglDY(WsqjDpk~+LTB!U2)IE7)Qa+ncF zJ9{E-j>0WNfu-R2z$W#FaRd!E_DCD1>`bdgQ;o%_Sgr$Po9dorE zDP09X5u%V40H{4&e=AQVy$m=v?Nzn__cIo7Kdk}x(;Lv{{_5P^q_l>DUSKJ#OXubg za=RXgI056P=N$nMO-=$tQBdE5d=YOtCRWZ@N#_Q}O#-6!jzY%SNHxp>NUfRWFLU~Z?tD0{9`EjeTK%A;)mf6aSZW2AA?-9Odez|b`#Hxc6v&A`@ z44%XjX*%KlHee9>5H3F3$6;r!Gb3teZM-kR&&Oq1BqMWYdyC)ct(r@ej10zDW_aI6 zi{7@y_p-fh?_RGf(4p!08WM)T&$lu>PYOxHt8O- zb98%6Q=H?-?6@j+GtLVv-vwF9&r!mV>MvyEJ}1=pdNX6 zyw|4b-;CQzO^&=xVd>}Jxwe_I{ANG^Dh0o+2|A&sViLY}$>AiiMDq4mqD?rfo z56M%?qphJ_ou#2%kV3_|-D-|MS~N!@LNlmfY8g}{Vcltz;Uu`yeN%<1R}BE%xVQ!$ zeg*)yfyE8<+=Xf3?_BMD5maKAZzgw&#IX9ed~3_2FTdyoe?fwx77(k@Rity>$|EMY zKbTYK*uvM$rMoBKJB~bv0YD6v{wAO#JI$$?3t=n)(9ZafDeXrXbe|Iarg66=w>kvI zs6X$6GBsDuh}L6#{MKVnfSUcqz(oCU|lg#*M-Ithw4!KCc+;F3Q=7TVt?0D2;R z4AwDNB(DlkJ#0XPZ!3e>;x z5s>!->%^Klz%9L0SskeT0qzpxB%r+Uk%c&>yS!Bv{UN~N*1^aOO@bnv1J{#Y*J`O_ z(Ro$9AtTp>Oh%BApZ-{%oZH~x(`cKf7B&xUJQc8U{z6s*O0vn;D0ppLBFMnr&f<$G z$tJ@R*%sh)1qcr;!0Dv*4ZoXA>kAMbS!7tt)b10V=Vf4ZH{46Pv+vCc%iL!8!d+ZD zL{k3Pqm=ue)4sn=0WqxYdG7g`tgRbVSk?Da2GXJ4&NlS0$S1>iA1&QHX-(J0H_5Po zB}#^Oj3jJ3JUGKWXcAwWLSflUm2seZ1C%QF#*m>$1A>$eI;|5NjGj+;~kifgyMc7R{!)Pfl=pITXxlyLW zgm5DHA2s{P;CS^?i9Z+*$9iD9|5YsYcnrexm4e*l!-ItqwXdz@?jKz?r-id`Gs*Uy zp881$_-T?9;`2YkPzw=}TDt0&mEVcHG&cxmpsnFnhV0Id`Aa4uL9%XBrrTW+Ns~bW z){b5(b*i2lKG(8uBX%;Vpmj&mLP4K)S0cjN0e%&DXVaj9U&Mj^$1V|x{7p^oa4X5X zL^r)$iI!AO2~W;J>RgF?_H|s)L5=V)@VJPOa$2bLEyT3L9ZTunIK5`tLFzP#VEd>+ z36n4r5hX@9^PKds0qQ|x)kF{kaF(fr#{obFF8D5$J+w*58vGJ9nDyulr6mp@pvDac z&(y+26s#_mqiKW})80Ugn_8V}J}#B3jSJzqk_aB&CKKwV_5}b^(XB z&>IuD`?5)bTTV|`m(Y}|_@)#j&Tu0_bxR5Y033nvSe^c1G@YXr6olid?bl`i2!wsA zBasBeEQR&g(O1L5;(B(y3oT1o`GD=A@r&)zZ1fwI2U{mv%#;S!VWExlz>_|yex1)K zsZDiT3N#m53(dqPa3Kzs-;g|AR0VvDNq}H$`1M)~hYdJAxhXMm9IpVjhu!aNk0pfb zQ7uHQ=kmy)U$7{0EG!D)`Uc)g>QrrRQOMQdZTr1V`#mfBy~3^8sG<9kc;Wb6LVI(`4ts?dW6pbzd}_dVFb<20LiDFx1dr<$KFNg)SCkcn zT>fiaz!E&>C7s)u46SOpA+AM7#y32io#Qm8@J@>uRc6tsK(u+ck?Z} zBpOlC0zDa)t>-kZ7T%*pq;?RQ&`};!_@Pv-HHd6Yuf1rh83om-Rj zi(7MfFlxw~DuG6~3)C}SCF9=_&4B-mT7avC888uD=WC6fd*#9qxU`9A-}lc(EK;LGRt?kV(-swFYm zb{R_i7pW9P=6l3$EGZh}w?FE^_^>J__JuicRO`l;pmA;}jZIlyuX}LwP3p|(%+BGW zFmyClIe-%pCHwL0hhGRWAA8*9Chdp)6&vHOiB z8e;(RyoIHe0w^e~^&KC+M`!MeeP?}CEfN&iEH7OxV%C*Jm(Mp74g7>yV%zP&PssMU zixaSS(uCe8}s$Qv3Sr$Mr|2 z)_?A?s(oSc7_xip5&$y)K< z7L+?|kjg6e7$~pfv;lJG^>1iHgQh&A@T0( z0~0fc8SNP!g02U)%%J*9+LwwQ3-b`2be*-Cd3B zaY}6K`&eqQ_6!PEqQdp#yzSXp_;x`Chc%Ri39a9wZ?=&rz8Q%L-P~42j)*pNSXZ{P z<|9emy0}Wg>uT=fFR_rc5Utza%8=OBHgR3~d?p8wn8V4}V?OHIT~8+A*;v~v9#7Dd z6eZz7HKNr-;Vt`Oq4(NjutR0@)mEKqOF}|Wfti7mmK&PZcyDXwY_)n0C!BnR{U|6$ zY=CHGQP>}|Vf==Li{<2}<6@RO?}Nv?piY^4-0*_tx&(vy=E{LvA-9Z&LQpN#p9rz% zz*q%VHs9xKXgiC+Ih?|aOzQ-Ma?8xQG>8|EX!CM+L&?u1L&O}pDF$4^li0i~-xMuB zaczj>&*1cWiyyG=>I)B#k%gPZ;H>!30hHcVtjx)c+CC_ct z&?7NIE)+8uoKRoi!iKTWM0j+xwKnVYsx@iW>@YW6FJN=bYR~G4x_UK>ZMKP%Zn)s% z8}H`&beJp#wJe!*`Sok!v97gO6sggbx3glGlI_0Zcle1!M+pzu)qjcqT__C)HDU#z z8xp2Wicy%!^8+&^YOsG|ztpR%daeGRm`H%<$HYKO%-F+Mk33)7Xv8Wv6!B2&``3#K z7bv(iR+Fy{v0&jHy*xrdL{+{H)x7s~yCqbdYHH-d@A}42k6Y%ABuWjw5S0j&rGW2i zsblI~0=+FZZt~+7_O4}{mNe=VnVR=vMrqVDPiJ1eDUng(C!c!mm_o;LgA~?0t@^WJ zlo^ZK=k=12H1H+HXWi~ii#2Abxn`3}$zy`Wrnf5HsWUZUiwj3ND(LNov*lI1``Sd7 zQF(nZc2T)c=k-xF>SN4cDe<4L@D4QurbeG@0)|E72;`RmaXtRGy39LbCkPUICdW>F8tE&MN`x{MeR0GWN(e z6^ZNVuU+Ew;_xcd-d#i5?p5+MyFi7~L$i@h0la}B8(B&YblibPYS2~{ZmdQ@kYAnH zY)9d%UzZR%FR4x1o>hYu1$^>MvY-h>$l(~04eEKwdfaYt*90_{f#xZYCW)CrRPTjX zfd)RjL0~ufogaE(*`hsMRLL&~+E3mh72t>3Z2BSip-WB}$9D!nk6g}1oJo3+Q~I?| zu1*t1-Q+s1qONXzYmZW5*o$gY^y(MR?6XMFJJs2$MT<*?`CsvxIns z9l4HRE|J4eGU<`j7KTooAx@-#d|^Gu8fTcH*n^-&2v*P;7gc9?A$OdtE;i@(fH^c6 ztFl02Z4X$fn1Pk*nA+5p(ARfFB7drx~@j}4udsnk#dcOarl(yh(Y=vwK$M`(~#uu=gal(x)0)3#b3SJUf zSmxA{xQ7Z;u$Xi zL_+A($m(KD-=gUbzRa&Alg|N}~Av4}g5hkGb)Yj0YGz_DxG zvf#Boj+&jxfyV-!$rzTka9NCPVos0bm3Gc^uDa?t;n*Xg&Sa@Wfld$1jS}Ot9x|fC zevRi*wa_z*IN|u}w5(lU*e11@N0Y)T?$wfO@w!{byCb&J+aA52{nT#?2}o8D4=kQw z(zv?nU4M(T6vO&{?TP2}Pf3n>_7pHmMomwJw1Ai#Tim`#mXt5OL52#EEIMC%ML9*Z z7VptAYBt%X1!U&fGIHNcaimpU47OKO46-shEip)q98n?7{n~qsALN#fu z;~q%|)i|ZhM!HwCmAtNu4C9W@ikIstP9cz0UTxT)LcCs{E$%ha>&GQ!m}9+p%AR9% zSmgIu8XU~|2ihddxWXhI0v|Gta}kD=Z|?bv8K?_}yeiAG^%Zqg;%whM*(4P;bNpnK z589PA7h5I*(@HKOtGIt{SX z@uvK?(+v)#R-o>)RJ15*N>~R4Nmh$XW$*iWr zIXDlrxi-pfWv#!~pBQ6q2PJP&?c2G+)3H!M?;QWNZJcNmE^2>JhTyR+glQ90=}A!6 zVZlCdxcqWIrr)G`W9Uj8yeqm1JZGQ+2((Hr=->`2H{UDDPio#6qYKzG$Bn|Txxec^ z9Ah|=<&^GZroVFAk@f(VKanpXk81H* z|E`vDH7um+o@kc^YC1Q9!H~g+G3^8(C>Bix^C6O zy^xI^tTL@Q=t7a+`K<^%wD%05xZyPHI%<333g6FY@Mw;y()B$=^xp->M4aOGeGyLi zB9b?BKlCGeIL($(#{3YGFM+vTWD3RYqhSZD6q7o8L#lH`IEE8hJEhd{en#^73k?%$ znk}N&QQu5h$gSi~-;AmVhD?{!haz@%5yg9~q}x(`FEsW?z7LJkSigg#x1E{L(jF5s zw?^j7@dCw4kGb{k<@sChGr0N2yjTFjeV30EO|7MstjCNDtrAPf$_(@>dIwvq8BF-h zSEJ^kW$5h-=E5ypeZ7HHU!rDx)@MNVUtG>SZxi0&Tp}4-$n`jru&7y_QJ{TUlj*z& zej?Rwn49f}E#n!RlbgPM*|WNtTji4LfZ^a`=8` zyHu&?!9QQ5=fPe#$Z#C)Lg2}{E; zeD;T1ACmkxy_^|R-8{1pXR$eC}6>n}bFInL*-Go6hPz$V!q)0Yfb!!@@?;csoi?^SLaHbQ&eP4Il z6AZ}QK@~I5%bEe-Z6R0L0$EYcRr^z(EoN9Kq`$82+CVNJ6_^V-J)xLb-1ke) z{BPve>PRl;gLV03(q)3hmJcfO|c0@$60cd08G`)2SzOO^w zwqEkQSWb?bUDV|v8QT!+(E>P`tLd@3&4k@YZKi|8?u2uXUS5Yr)$^1zNWHSbQV|6` zfP^Juq8E>w4+X$ZhsRj@D)vJcvdNHMEF}y%ew8WJiytkp<6AFvrcE83TxG_)lka68 z3sdBiA57ry%g>J$)TRQ2zJ@gISM4xVn(^A-7U&WSyp#JPwGpS^04FK{Zm%0!MWCc6 z>c$cgTT{CBJmh6{=ohKyt)8J3j&)#q?$I3-vAs60ag(S;F!Y%7TZF6tCs$BF!Btaf)RFh#p4Vui}m~7KWbHfwc1=wjkJO_$%B9{cGtM&`H=REp&`; z3JBa}{m)ew?q5VukZk1n%?8DdAcFq0$q1pk*xJ~FwBD<~Xl8#DTmB!0gTR3zw7mao zUE@a3K>vkih8PZ_Z|pDQ`J>0_|6x1`57x!@Vuyen>V;OujqqUoJFQIT_iDDk$x?r8 z)%%yS6d%XmgN+&&?yH{*NHy>pq(?|WW|t&@I}fgZxFi9vMystQt|f_jz6}+y+)DS0Cgmglmv0WFBrUZZ{?eS@pzhctIeIvPbRneYF(sN45qZ&FhE5 zyl*6r>awle`s}M@bGWm7jpW|Q?#o&Mv$B{@VvG510j%7qf}`{8K7$;_22XD^6ak~W zka{>ZS-8ad#%SZr`8oF0PHfEDcahAAeN-?G^XM8g# zm^NObUtcGo+i~M)lJcP^N{45*h6vKq%M?I zJ#~ABdHj!i#U=5d366>xS;_aKiu;G6PK~acTijQFz3J`Usw)r`4jW7gZJzT)xs4fv zDEn4!e3!N@kr1@|j;^8YcKURlDa+M(i=Pe2Q!Cq$aklg>`pPFdGIVaY)ddJPqv*C& zpYW2h-id5CWT{Hqwn>htd?1`Sg&lUCEaTyUPtuJrQ(_EKdva*jqH|pBeNC5mZM^Oz zn?xavjF|4t0^QXjZ`VDv$25gy@#YWKW=Xk8vDYN#tw+LwIJ1^!ilzqMcE^+?KBri? zf_(1Or-64mzwPx|eH1kk%j_YZpZC(^J47qjki4Xy1Y5n#(sHlQuzAW-@p@pdP0ti- zTxZBL78#wO=Hp78>u|C?OWF$BO{yyxkLQ+8sCQ8K0$PCW$y~Nk38|*rjpV+7*KlG= zk(CZxlF)lU7_fWA>p)$64(o$`huaE--@a3vpn49?V&mg4Ev}zvAC+8qZy6pIuuvo& zpWlqIJ=IMLRZ5;lbNl6QH}pZh{NTU4o&*|4$D_tYhpakf)*;v(d*q8lF9ZG$cW)gQ zRoAEwgD3_dC5>RvAq>nAN=OLOAt@joLzgs<_p)Ln<-S-5mnb(%mK9UEczq^PcB< z-uF7^eCPN6b*{@{X7+5?tiAVIYu3Kk9pq1R?iQ;h7Zi~>2%+$e^(nS?KEOO zuwj)5$&1+{!hQA(&E%l*IohO>pxS-!*S}WiwyF>PMnxNy7cR}Pn?a_)ByW9z&H;H> z!nAHYJlinZ4@~C)_<93Y2SM{WPlMVCn)je9v2@oDzR|DDE0YCJruP?)fe*B z#jkQAt>C3%#IRdSnj$^y3{?*e1;EV}?+FF)o*2?wQ~}AU4nRZqd^*vviG4l+gsAcI zEn2G*`KFNOr)RHni~Isj1?(|Qm%6G|LU!fy^p=wh;hc*tc!kbh)Yb>&j}c3{B6op% zj{q?I18O94SThQt#}skxT`roNz$p)S-K@InTK@zwpEH*mFRkpj+rOYULO_rLAVqK) z>^DZf{z(puVu>ucW}?<{XV&awd# zHGjlOvCOGgQJ?Z{mY=3^KX7`QBXYkB6csHjtd@-|zHm1Ig>4L-5KWxkQ;*cSNYkdl z`_*`-J)}!I6okL>HC?-}lO!d6go?<#GVchbS=_uOF|*FybmjlFul3zCDg_tFHj0eg zP$jo8v^eP9(o}aOI)EM2=z&atCd!@w$PD$n#6xJ3ad8y^8jt zr-;$WHBr zb{fSWSfVxEc!)KJntv?x+wV$Y(Js?EuUmC6BN#D~v=)wY@qfOieAE@sgGSd~xr?cV za2RJt(K&E5MEPEO2L3=SEYW52org(k*(^6mP?nCX*-?7tcREob-dpTqqEL4tg8D}f z*xgI`(0ASa`Lzd-&nPuM`BHGPRl-c9Nvxb?F`beQd9sw)CqgtAYm zTREvr$8~bjEKD+F80~Xc8;k^x4Z1?K{shGGiR(pwTtAQD8 zv4k)6Umnk3bhfoxeu`(&&S7j=!i~RIvFLDoJ&UKqNa21_c#blo(4oQ++cL+JSo-M0 z+sOASV#vDB;E{S;S^Fmxpes@66ZA;<#=YL!XJ7eXk`Sy}$A#kT> zY6IhUCESM}ON8@rM990|Wjb0gRgDG&6WjH3T}gJ{4murdz>iTU4Gx!_&F}j{N&`*x z;rArTEf z{&j>W{dzW@Vp!%M6rDy!E+G&Ak1dXdH zQ`|AR%1p;_{=GFf?XS}-Zr5F3upjtJ>L6r;RKPI9 z_SN`mqpa{}Cj4bzlT<(b*N^oP=I`^`SO4z14#u(E)VaK0y zN7s}JE}}Qdw)klF4C93>6=CKh^95n%I#X(jl~x^e5SChlAJ*Ad6N2_-d$nXH;Rr7w`b;FV!r9Foc}9d zxYZpwde6r+jr8Abhka9-$jCTaMH0feU?cEAw$-1;27518;vpQbDFeBGiW_%C45&A- z6mpQAC+W{_L$eN?{-Bu9k-7HG+|$W76_$();=J6#fl@042@pdg1#Bs_e ziqCSV%oy3C$S%c)mx=?(wMEaphfsUB6VJyOeaJir($;GtYODuWfhV6GAP3()XK^!Hw7#Da#81sZ-iydy$M1vGp- z(C}Z(fQG;RA0*UNyn;0GJrT+D3Ew3KNK9h7@OQm%->7Un+;GK5I=@gC;I)$BiaJ6s z!fy@T%B0U1A0rbB=VJQFV71q%q)thohHwQY{audv{S&xo2g_n<6Coy*l_IwvcEH|fB=zN@W!Ggr$5Ed}JJ&U#pnYce`iXQH18*e6ZVGF;GNcl=d;7(qK-sK`652FmDd(~&}Pm{iDfQfIW?cR91(LahVR|Q(?*k?5k`u1prKGtxt>}s{<}EE%i{3+!PB!T zL~6FYpeef2o0LA_Y9RbJ9B;`#hwE*44>_-9!%by+si4hFS!H@$${op9%Jf(HnePo} ziZa692pqkMtMuO1kUT37+h9vMwx2)II2vd@0MP<;ll_&uS3Ex~;&@^+l&y<1jKb4c^@xKJS{u%H2KLU3B z4~+lW|2>Qz7!3HwUlFs|0g7^koxnK$z`y=X%=#17<)Hcd4Pf)w=$mTl>6^WE(Epp= zKKs9i1_k4|wA;Vr8-XhRNA*A|z~7Ote^EOimi#N)#QyJ5{K2?^k=GUa^$)*&4pyM% z{5$&frz&0L5x_P7mG>F@zlUB212ncjAj^N$3dZ$^dh)-yjFca{9^I7^Y;W#b`*WX!U+2jC@tI>o2F{JrA5JToN zwRDMHpF^7)5-jg|i&}d!TCSx9RrQJ8??fl`};pqeW(Ounr z14d++%Ml1AsKFj6>zK}I+coC2+c_*9on9i=Ej``u`ta^_X`6C2Z>@~)1Bg8kx!4E^ zY(bB$Ro^_AbSv*8syRE}Jd;`9Ub&#iwfMM&SJlNay;;L!x+Q;6yK}bJO|2EltRBlk zv$mO78*wE{RkM5 zp%!naN-R_4J(h%Oo>Rw3p~EX6E@0RcQW11``YnNFXgj<3dsd%YR^8~x=MwUsbo)=rS+V46I3IT>CDl}X<4tPwG!P2DCgSO?o2{MFx4Y$vA*keaOO5x7@(gxd| zS$iWCvZER(u_*b9SlNJ)*M~#;C->{hW1es6^4fO%A~`fU7+)>53ZSUJc8b|`sPe9f z1N&nAF4lXD7ooF+OJzZQghu2pP4X2fi(7`837$pdT{B~wG8_IolwH~v_I)`&Nmq#} z7dcq%=yuhO4J=RcdUG|ad4}@uSBBjl$*j7hFQsUIPPlSa!;;ts`aD`nvqCIpiiCg) zv3L<^%tv3x*(?Z_P1$}iN7EcB=_lH{p6p#(-Lj#|6k_#VED6z#%J=YCe=Ki4_hI79 z+xI=gdj&u3A(^=o@)4u>tJo^OfuZiX+PdCdx2)nYOwHe@jmcYghB;zeVc>WUZ;dx~ zgqylXt>JN!spsn#YmQ;crr}3?BCC|1=-|7JG1<7F_N!sUwJ!LO%l!zVYfQYl5M}i` zrt5>o5CuxcW9f<;m`s+t@vGP9hTKQ7S=Ctzpju6e{8D_Vw)RBp&u+0;XMWR)B7X-R z`1NDw);-bSuEs~7lo}s}Ds}0UZiK#grs}1CL-o_VObMh7x(!yn$Vg6(rZqSDs%Y3` zWVm%$4Nu7KQqX!pS|nXmeT95y+krcVNVpaytni~?I&($qe_Tp zi%HvHY5AF;pczM~qZx^TSUk}TYkt&)z?mz$kx#X*I+_Xx*g;XGSKKIO_A?3T{!MWrR0kOg(R$^&fiuxbRtu!0@2#W~{6%BC)rB$^A!GY3 zNmZ}GeCcau)Xq0RV2JKle^tf7wtpvk>6;m6g0ZjMr&p5CNWz`&)Z-Jxdu1Dd#Luj_ zj$_k6ivWC{SBWzSyg$?sH!ev=NDz4E&U~drx}08_*0H-Y#0zBZNVfPHrp7fw0~-=+ zx_)eX4K!_k+^=QJ*@&2@8}^=O8x8`oO3>Mx+hQt*PdFyUyIRQ=%MV_^AnDXmq`a-4(21zuCdeif_)}E@y5_t-nXw9O3NdN^T$}QvT6AwR{g5sFyv(8iYyF6LGJx2?#sOkS zqRXj9Zs%B|l8|Gfcan(jW+{{=do~eR)p!R-&kjUJiV4?-e=~9eI0xTuNfR5dXEe)K9OPFCeXu7ppdZD!7yW zPD3($|0P_M?5W^RGa;e;V2DA2DdDq{7k45KcDCTW*X|{ZTe!MMi)mgGMPKzH)B4lQ z#w!pul4&nzgHeAZyP_=!XTm%{9DnCh5&U(o*bNXlx&w(N1+&actEr_Y)k;+5z) zN|mao9dd{9cC?=uwrLzyGfra6pZIWh9$1Z7a(qD2KCDpVGOzDG;4&?ZdUrG5IkJD& zA;}Gcequu@A`3+zt-ej^`!)WzkCVe4g!TKE?Z2ffeYfrROU-+~tQ*Qi1K`HCz zK)O0YfjGzuRv_$$?xYuc+84m711 znLTcQu@VKA(X;&qik&FxPZEvH2&cvJG7{eoMJ*y8I=*x?n_HQEkuljoc6&>ghW`5r zT@?D$m&o_O6eM*$bx6sSBt5?}BhVXE*s#zukK3`kr>^&+(D3gFnbtvxn?m5Gu~F!s zC_~_>ao(`N2D~p_Kjgg!n&kcVYePU^N}(V2PGKJof=HD>lYEy$ayQjYMI;ezm_8`d^rnuzuCf}F zpT-f3gl}~rh`Qm!d0Cx?PfgqAYahxjD}PMNV?zy@i0Nh=7RH7TIW7bC;h6kbmKB)% zBnt$3hejPcdWVqOEVfhVo*DQv-+TGCgrR}<)bBbsT};KDixGxX6Ov7aJlEncQU+#q zWz*`WH9cNCPVczXHbQI8?urgxyZ(00DgT7*$7aco1&gCV2OdHHe1Zpx#gAydL%a&P zK&Rw#uw=~?3nOq2CWL}g-dqgzigw8YQl&eeCrCEG? zL{k&z7jle&e{T@&*7qh>oZYj z1w1UCx-^TU0MIgl(bvuB^ z5NHW66e7L67j<@k$5662P7$`G&4teN{ zcQd{6GeF2I{eFVBp%iO@cH9=$qk_EG$OgJ08|a1zJ|bO`*973ftBa_XX=2mE1rP3c zz7r4qXimTVkspK2sx(3`PL{V%qUK<82jr)e5^gLNRc#ygM`sFdmreQfjfZRYDW8vn z>X9qy0et%eTD!J=q8Fw7c~WA#D|E6MrKEMEx38pSqc=?E^6g~$Y5Z5O3<{6iu{A3j z_Gf1dXJ@<5*1lHXnCk9zX2%ZKYrPE_7YMY{;}O=eu0dlyBeo$rIx;48a<8I(<4E!O zkaCD%R`V=9iiwx8)goMg$zM&MfkvXsZ@Z^Jr*b#*YP*C?z46jV{(EnnKJCjb23U!_ zfOc^if6FVD(+%VeFgBf7OC9ym5OL*Pez@(5HgqA`LGVf(fDT}xz{K7fAy%+a&o z6ewaZH~*fssW^HnHkNi?mN1lAhJN;_tZA7nlK~iowt}bPDN;s@+^4wT3AK;jsowyJi)LbSPV1bhyV?5`$lR_h&oyN<<0(RXF8e{-PuF`B^u zfT&V}uIrA@1UlRM>3%KPYYe1*Q-}u^Iq5?lh8~qwez~3O59#7>gHIuM{m;Kx{(f5TnrE{@PA0F{X0rR3 zn%C^dV=Y({u=ci0J-@X{8DbgQ#JWAf>8#Fqw?5qKx@+%UQ@?S6<`xsn{IB3K*gpdv z|2N>VD>&f4(Jiw7d$>g~wm&?%{^WKK16;7b3*P<=Vd!ca01B4Armdr;{@;j2Z0!FY z*&+-?PX2-S{3k93{TIoYf2|kXM$_8X`k(6b?_sIISb+f+0LIw=>~#+V4)}j1hS_MF zS(@r=0?bhJ_shRPJ-|il-$I##a{oa{`%@SI42Tym;VAZh0Ahcti>0-`-5(YD8;g$< z_GhH^zeb<9x&Mwn{mF_8pif%YHv_2nX>osNV&1#T#MH4#^X9e5F+imXAauS$pVSAI zlq?3qk5}>=HYho^An=Zs4;PUD4W`-Ik)C^JDfeJpnPW)IeB6KVO%00@|SDzZNtMgbN|R$ zY;}IOY>jJn!}X2cyvg_7=pgDYYx^ZWL?+6mdGt(MMxnI_<+M>JhuYbD=R4y;38#%i zZHtpyqW$UU?PwTc!(6fBF_r)vTmR--;x;KXVHM|`dt$!tdT@ADt&Pgp0OO-b$m?jh zuqS3gS)iQS=-MoR54swgO%pea+Kszb6c<{pZk6q?49+FJGc&QNV{JZOKN@=*Yne%s zQ)bs$p5T%>Ts!u)aHS`KCE>#LU~4CCG{d{z?a11&O-UERX;d%`%=QN&KPl3kgbDtV zy%VXKXS3ZcGTI%o*;*PiH|lP{egk4r2}9~mkXK~|Ldrh*I8k%`2)EMDCyFV#=jmUq zTejaxrqWb4B=-v~DzGk^l~qMX&9{*cF3~CE`*XkW=(=2Uli25^+`M|j0JWAI9HN7S zC1J7b-s=y|9|}EqT0L4?7LtYC_XM|nErhwx&5FJ5H7(P9&RZUH_pQWK9G=*92@(yg zW8k4sHYKSwd8O&*=01I>8r{{;WQyVbqD-~c7Cr`s-5sV!2>t2NCqe8{uk;!&jv7Ss#KB@(oCBMdvp zUO1aAtmN2VTzmbdH^D-=tjYN&5&Jkr~0;w)kL~wzX^0W3+p*|A# zmyP%68@M`$Y7N=4^YB=M%9?9D;I$#ZS*iE887Cny@Ts4}bBG=Y@A8;a=I_PFBf1eL= zq*yU?UpIPD46<~huU}ui(VHw?WLtoa^#Fk``@>P2&vWONPz*uu0|o>QVp=&V z3W(j1@W-r35}PgeXG)D|J1V@`)73H*t6;7qPY&4By=Lt@tCw8xm?I}p+7JR6$3>UW zhcC%56+Sz6Z)9oFxEi%}ME#CSaVJO9?Ff3{T>KH(EQK#fA8aTZQ0R~R$N=#^U zI8^pewGMC80TZVimtITgd39{mj1h3a5g+AZI&2PL0&{AWr$xNE-^nWU=|@)U<;#Xa zN_{R!sc*QtL+52wMPC2SmN2bjYcz?Ve^Vg2#dzfir3JoCEf+H}MBfrpc0r|j>EQ$p zE#mUfcB1u1mK|@M5VS%4H z=kB%WD~w2TE~Gu8Z6bu}c%qGsg&%TlGwf1SJcc_<(o)V9@^bp?+Eac$a~~&1JvtKQ z;P%;uD9_>+pe2s~6`RN^`KX{d!p=+x2BmaTxrHuoK+ECpIjVyZfxWv~NP&8%Yq|td z8!Q%N-~Ka?3s&^BAj{d_rjwok&I5VQzC>JGhH&M@ki`;WSE`KRv5ZJ#c=)k5`$s=h zSHXtt@+$eP<8tEA7aPR~gqp18oTG=w^{=E3ehQq)s^3GiiAE5KN|{gnv{u-h9j&Lp za`e>gTA#OXOl&wS7dpAq@HnZ1?x9TDR}QU58v|;b-(J#UeKUDF{^lZD!T9y}j_u2j)S?X{`NjHwZ$LGjmtflBDE`%9(X{naHHrMgum34V}lA|V{JLC+4iRP-6 z-=yy9z&@dl(?k{%AF6yKtxn>h@Jpfu-_{xS4QYY|-=!IRIaQZOH2yN*ZMQzAGVw7E z_;*!0tGevly+gFu@(GW57kT+)VVy%Q9qOZK*+ffIP7Ln8eZg*nNh`TT)*xih-?l;%fK-zPzG4FR^RBS&D}~^1teelS`535gIppKPC=(Ax8DIZsLomuSWO~Y@LI**gKq0A#F!IHhgzSwE>@#q!Z>`Vexgx zFYiRnWMBVNe-~$U9N7YA=XnHaHAH~HyljKvQoJ5Ke zXGr?}J{p(kq>p5!rrKd=DpqU?q#Gy2DS&%ndCy=Hu_BHEk@WJsoAMXI<00Z!L*5Eu zAGThmNtjBC_W{w>rs^u+eE5^+;&K^LskV$r294)&F88W+X5K8l0# zdqDZNxMb4dey>ep!`F%5E0hDpnwhv9S;pel%5KtT!y}&iu`c)GhoTIluvI!mDr@@qhB`y zR4RD`{~BqEohIb#xUwYNm;i9L!jMXNH+rd3(jE?+MJFQ%Na-)%TuPPbr9k4}hfTp( zWT2Dcrr61t0Gz_`#F~W;j6R!9$8ygIOslIhan!*!5c(j0m(Sf^a z8u*G{@cU+f6AJZ=LISX=W5~|AhWWc#^wJs>dBO!fUJQWB9FG|B?eYF>kEuxE9$6E# zDH{#yX)lD%e^~$BI|+Dnx89UZfqa6l2gOqe`9JjHzn60E{bMO7#r9IOex-jE0s7Yk z9iCn#ARo_)-)bMCokbYnHnDeD^Ss-?(Pe9KZ>Xmqftc_9Tq z&_X-O9GpJ| z+$-iw1N+zhHru%axCZlyy#xx={>M> z+TWP{$)Mf&a^+(+$7}mt-k*2$*CPhl#-9`}EbS-l4HZJOlFF}O>=UIvUG1QB3ZZsd zPzG`(FZbpVlVaod0tJHJJ>tX}N?K*f0bSoECrmljAXE-=GCf{9Xoyp0(DRi%ZlD4G zvYZD7^#*OZptoQ+xwWmzpaW?1dHT`YBke=qRv=RmobpkNlH%GC0Ese*!|D0+=xPWZ zS&uLsAcut{#LJ7L=OL=3)}F=c~iPYGXgZtt?i7Ftz|tvkU+=s{sgO zqyIPrYpi2&@OWXw@5@};WY7WQFv%9kG0M(UwF&G12{&q%fr>14f|<_-T8W+&iL}C$ zs)jzcH$LhFyPEAW0nxW=At%tr=7Rk-Du>{g0`?BDC}$GuEEMS2X@`V-c%ZrL^?3mS zo)jK3LmsCa(WFK`Rg|1$1vnEcwm?;1n$Bw-kzI#2^pC}?)%zYUNxj`aJjw!V>-m`8 zEJBqU@#s?rxr1Hv=P;MwN;g;sX!!(Q8ecvAHeE2}dTD$$$gL@w10fCg;6afvm+s!VP-D3epm<7--PTJjuTh zs%-QP&GgMLHH~_JaAvEoYinT*RF_toaC6JIwtt0?uF^37-&L1T$bXzGHYmpfDBvw! zpj^g# z$efFw)x4M2 z3FKt;cGiuY_6kNTOkxgYT>mFdi?{r<5BB*M@oq_xzgz6ttK-~Iw&nU`z8526YS`dwf&^2{K}dUAsN!Tl-==QZt_hp5mog0DWesd3Dv^~Q}$C{{1X#rJGV(#xs}PS7bST=1E<%r!q{R@KdJ*0Xk?ld&SOd%a|i^gG7peM&}q4`99tg-ZO>UMElHAkm-!qS}MSO zc7+lw{Cvq|4x`G#9W8yJiYyl@zm(j9p(vKSS+=7_%DQ#O!#pKJ8M^K8K4S7~X8(&TB8!aWD`DrW>yDX%pkqB<{~@9-N;Q zl-*cI(P%w0Fd#v2vhTTGe5}(BtgZSG>uimaXqBOW5xCxrr8;J9>x^z5!>MNhG66hf zPONf$lI-g|Y!7fY`?nhuBdz#n6JTX?&C{O$=F(wRtHV)AB;C|ZXB$Va?a!) zm>j*$a&@^|*yXOPQE-u)UFZDcu(+9Uwx!u}b7E;_wzPPcd%3K8tT&2N{mF3&$K*+` ziqm>2wIxHjMSD^X+2~Bx9`+IX;8>Hr2{s0qT%g9_(47B5yWk;!V^5m;PJ6YuMq2d+6$o6#{GO2l0AtU43o-bdw~g4y`4|LYTP66#Snv zO|(9SO?*3({jegs~edH1#JGOwr8#*z$<^Bmq+`EvyR>@grgMcPm8M;sRa6iArctVFU z69Y8Op>3ghBqb6Y#`c9_^Ucc=4j663Nr49jd3eJ#c3<7X`hSpqkM{)OoI*yV-;Uk4 zhRx^~lFHgrma^le4j+y)?j0d;oE!4$Iyxwn%XhywlYJuAu*!HCYfrqxXleKhyYK1V z&G4lu$|4tttdmVqF(U?%#LKi<^PPSHt+7VZsE-N>`ef^0`$X5OUT#u!VR&=eqwo?I z_4&VLB^&Gwe40abakI2}$#!a4+7#wjUfgl^5)m|VoWz_-_9^1RO`YEeCMQmr#GDUJ z#@>w^E?X`MI(iH#(_ZPQe3#hM%|)oJoKiD6MphaPhb1CY@fViLl~I3KMqGTzMkomR-dnp%r!Og<(#knk^+ja&rizF z6*g^B#864HB8afLuB5`IX5DauIlODQjoIaqmQ>J>WY%khJ9+H|sVUY#Gdx(~O|Aac zg(59hwMX8u-4C8fn1^#UenmSZYQy?ivBpM7kRSH~;G2?i>{wbp@R^T3{jv?vJT|}& zX^39aQ4>wlhWI~HY#I|54}|&7#bgk`pPoMIaXge^mE!5nrTabFXCP<@+o0|wAl$$U zt~2n#8mrA9Z>BAc^nv=v2^lCJ1!HQ(=4FFY-UHdw= z3x@Pe?D?o5{dj;iU#iFw>Yz*UUVFDwtPR!#89vB37^)z-+SuITAmG4D9|gwrs#2e% zR$2u;sGtBy4G#xE62a}Zsk|}+gjEp z-~e*lcMHFKpa`+WE0YZFXL@DF9L6bmdmf8jkXtxyaYS- z3Zhno?wjXyK@gW%*=lqL1v*0{C4MWS1slJ05T!=>D>;A7*LxN&ar>6abTuJ)HLkKv z)ucwIV*Ur$>zO9BzkR6K-cLgR)w^DH?QDKe+3x7tX$oyAsVjk3+t;2HH`lBs|0iQV zZjz&^!w(|Mk4rW3@TvmvG{s7dORbX<-(-wG3*sC-drbf0qGy}emF@eJ0!|%E<yU zXX?SAQQC6e#GrkS0SC$@-e9~AmYltSLv&jeJ8kN|lfrWazwAI%wjzj5I)})QfhO4p zE%n6iTQ57)8E^``A&KRzB9gp<1G(0}>WSqvh&co9%qpZm2}p}m)`s5A8H{-GX1III z;l@josiK+J%sC7#ES1NmowJHt+YlB*QPv)@cD6!PHY1&vc^^j%IThU^`xG^qbn1YgG>ZFKlWIh|oWFp~j^>!4U^+AKEW(MqB`2zoB*u%Q(M{90bD6dkzLsr;CBio6)H3Gb z;%?JRlIOFM1w0+}I$po~KCHLT7=g~(04<7#NbxfDYI&z2kQ9bsl}kI?N#&|bp}-{3 z{7EHWVK+dtg4sKW1z0-@siTk-5%4CkRMr0W4w8fd7ku0X?QQmei$K!@LFYe_3^g>{ z;#N4Oef-U}q(nY#2gF#qHC-PaiSHtvAgf+0>n4;t{V@8#(wBkB5iE7mZAxokFe znk2evtYO{D@W*2|#@K1ZyeEp9&WrS&NoTwZ>*~ojsx@QRm77@1)R!;V$h(~EG!K*K zGHOD#DG%PwJ(%69>9TbEY*qIDN#G>+^d_}g*fFeX_sEAYiHkdu)$qaYAkHtFHpcu@ z%*6);;?Zb)GYN0+%6oRxp|X)u>xd@_|M0t6#Gg}UOpnseeM@Jb{JNa$U5_ZY=QxlP z_Xmluxs8bFZ^DS*hm1Iei_dO4*{RNjvvdS1|0qO%Bazd;ogQ;qpRq$48-@kKFUt5m zf~9pL=#k>E)QR*^UwA(XB(lg@_DnloKtz(?Ga$+pokT8+^Z`;4?R%!Nd#Vx^O41jn zBM)h!@8&y7ammB}XU_)d?T$BnUw)Y84(94@e$-H@NGp2T1(dOjZzU{| z>#4FWK8V&0k)uP+Cr67~h_a=T9Z2pILt$!8c4&gQlYSCYiW6=JwE(Xq<1$-PL;IfW z+vYFN<`ca;$8d=VrD z;VrmD;b~n{QMNLO(=gfxZ6p1+UwZc_??|*nXrlC<_FzZDYQjuARZZv@VhJG5C?2VN zC<5)Wn0&KZ^ysoe5ML?3CD-pt_t$hJf~>wTBoMxc4%4AG$P}QOP|teVJxvtc+VIXp zANlPD@9yX1&>#AKnFfdurZyA<74!t#T&7ov;KvBFEzF^b&7CxYz8f%nX_-I|M&KE$ zCut)FeyAD*JWw$h2_bv(I)Vh;$Z*BywQqtSJtI|vV=zC@XX;G??yn?Fud-`0W<%rN zF+FCnJjdNXA`+|#*a^z*LW>#P2^!qNwmGlcZ$?|B{ET(&0Gw4KMkJBzXt>+@;*sc)xGj}uYT`uZ5b|?Rr@BDAN{`lucyGVIZ9S4tl zcb&40$okysz$E7U!y;uJ(z`v zLx96iS!xPfQ{S7LA{Tu1riS6mLWdWHt3yZ4q9h)Z?eqK3_*3@>T`y zppxLHs_jTMnkT&P=l{$~8tKF;sG6H&Ok~*t?bhIC>i5=p zQeoI2G@umS4|s2a8ydhHXV+4lD-*Pt<$hr@HC&?9wi9+*zk@h!E(1{qHrE@e;=Vt5 zWlAvUHGV2A*Z>`TU{FT0D!>?y^-5g7fobqTdKo$-MS-K8E*wiyoLYxH_n2%!J_rf2K|pZvR}cde?fNthp^z^pkC;o8F2p(SNalt{ta3J_qxmT$oYW%5`F$FDer$) zM_tpuy2)|E{tS`-m*6EU$KOPvATg7?8P^4XmxgG@gRUq(sKI!9rZMjP&x`elKclu? zU~?68@;KQU(5=@eE8i>)i0({peO%6HJ;W26vzFlh{#_0C4-1K0(W0V=wxAlGvy&Fb zcMhkEf^KXB_fh%Rv0R>}++(RZKU>PFsW`>R;R5_%q0tljlVgkgAZpTB5Scm2e_^@A z526HmH{NYVCS2@z4Gx4oq4%0$i@sP|dKr06>Ed=a_T-~O3oZ-au@>H`thU%!js3{? ziz=O)T3Nh}Lfh9k&4gI(FSK*|$zp4r?T_YL`jZ^H7#v^@`PvmHiY+ zxiv!`B4M5go23oSs1Xe}pH^dScr>2Low%X=sw4_+jAhL5!C_DLLT>ekk3QeYn>2-g zwfki(l|7&RqY15X zvCpsmIrw8=@dVb5o$xJmWn!(0+U7AtocV`xoV%Ty@6!yTm?3@3Z)pbiROxmYniE|b z00*mp8Uw$2(Lo?TJN}-$3%{L4e2JPniLy6dg`ZwLr|vT|e6-9v=IXJbmXb6D-{kCc zg_vQJU4=N9$z#>7gdH=*(2)6On5R30*TzId#){v+5$n=anW`tm;oJMtuhx6lJ_L}k z##n!9lwWLPK(I1G*tZ7yy9P;DaZ6yYjPuUs{uov3Fsg*tC=Fm{yDR&itZ9YRheqT$(W^Q<`N&)_&znrXsi#}tRKwe>Yl!A@=XRZebMMa| zqJam?b$A?4xN5M<7#W=`JsdM$9l}lq`QDkmDMz*M$KTW|LC?N1ou2k9JIXH)d#FJX z!)Gmgjr*-wGoXU2HyF{jJqJWjUTE@o4F33Fi^QM^1)Tl$H8Opu8+9G0;6 z6bb5blr=9ZRzKAp-IjM4lM`I*5P4z#bHpN%mW_kr)@W8IR)w8x`Y3iFBw!0_9=K!9 zktb+m%l8?ZqICC|ya)MI^Ra_A6Mx0e&Vz8il}yp3<ys2<+Q z#ZN~qbPjjmKWd=CrLC1tMc-2f=6m$%Vusgf68((va9Ll;Ut1tIbc`!>FEi9DVjE~O zHeP+NI613#d5TOX*W}M61RdT$&%rJc=~XqizfPa!lph!gpJzTqeYC5MX%*h?y=Gq{APMUS5}GORrA- zGL)Hm(dmKrQGot{I?puNE6*vu{yab*9E}{<`7+qdV>vY7@-lhqi#s0iwZzX+A5)RY zZ}~5W&h-yDu7p4-4?j7+=es@D z?xvQYN9Ir{BZzd%1bOfQ+7Gea;>x&p=+}wTkjN@19q)z3!N``yj1~}jqKy?|ee|Q}j0>cf>r_tdMt3%z-ynge0@|1fNAvsRC zX1lQDox8qEEC!DlZrrRjkd+Ac5Tc~=XefMs;{z{ITQO+&;h^2W1MMD(9h7TL96#%Q z8A{nsr)nc?ro3!c_jO=XoH>ja-{h+>wHdmDDG|Bn=eZ~!t55LHGsMpy&k|p!YKBT$ zNebNnPnMDm_nM&!mXgir&9xRGQ&BK!Yp3Cd!!ia`Z}SI4mf>sf6)1+8)4J!0xwpZgaP5eGdieORqX1D2^=Ax-v`BZuyAFDv`_%6~ zW8C-t^&JCtoqg6`d+oJ9XRoyYO{d+Rq^Of5Bl@sCv*52J)%mL$) znJ;4;hYZDFaY(AcPv_g~*VajqlG<<0aAeqYl!mBPb!L)iY-D3BWbZ_iV?t$LXr*+? zTP0!LNvkvy-tc}p#y&bt6nhfyq^|DRxt0bD?;Guvs95pyzOdH6`ks-&4jL z(K_eW3CHs;trZ2nxySPyx(ePqb$UNSX3_CrpD5vD4Rzm4f2w9WriA|ufj;gfmz;bV z2=IF#z^{S;pPCK=yc-Dcsl6b;qj;Z21fzlgkCy-mdQd9OS|zOIi>#H!L_sr**jDl3 zo1fy3oBB_+1ZCc%21+^IfaEbzWDkR1kPmQUw+o&!pHV0fWFzJ?t=9s>*es^r;XM-P z2R~Z&Zx!Fp`TBALI0&jYkSI*zd1z?CkvGT%`1fXVQ%74wKYeuL>1`T);bzhA{^rq7 z9^H5X)<8g2qDu(u!T=FUrnBc}OKg3dFSkclVLhTDZIpT17>O!Yoy1I&USBi3qO7)>SIMatVfyAY~ZWWU17iILX>zXX^7s`r`D zo-}Pfd`QCjN6KuTl0Z6dTCqJ;-3RA4bLU?_1wlpOcRiS4Qfly=MR{P?Wh2Jubo&-P zz!a4^dpZhQ045ziQS_DPI7{1ywclhda$Qn8T?A(&?c;?oH?>}+;|w>o4Jpp_z44PB zi2&*%_QeM-5>-J1llOuKD)hE~L}I~5xJU#VXulP?NpdvFO+EQBgA|A5zyM5^a-1Zp zo)=e&;G9FwsJd#aFFQ4S7O%1d?1z=kElGn_$*m$ZFZRe5nl}x7XVo0bGsX> z-VW>WQ1w?KWGx%NE}NsT;IwbJ!u0W1iit&pd&-E>W*7nwDMY29(;&$+KKT;#%FGN- zffk*DChJCu zyM#|R;((QAhuYcflX53~p7?!C3Yw)GZ56zc=1+F1^q+c*%JjeoO1Z&7XfY|Wmu`q= z@kS7>#hBaGFKGJh-7dNzAsHEnf`W5TmMu^!ze}#6v{*0694k)AFCp`n%V)M;jCom% z&AP?{v@nNM9nM2sozB6kB6FF{bZ2Aw3rmXkyCvR>$9cvcNl)8uN%971CPm@N#1y(4 z=(Gwi%lIW&XB)qt85@1n1r1ykM^2x=U`LMun~i}>^bj2Tg835h*(VCUB(vu%eW@Y$ z-#i0{dT&B&DL*q-&D#phVgcm_{hWxDtF!vxUZxsN zXOmT?&;y1$UwcmB6q(m75-$6Z(sy}?1G}~?DdI!)2?guAWy=^{TUdk|3v9y5W66NK zc`>0{B1jrwIbf41mEk;@6o-4Z z^}_-PiQ4WKHNFD=2|u*F(0PC_!_08NSnzvKmD#(QpbmAXo#0^v%tn5=-A=22Z{y}q z@X}p{dHi6?W94N3i}UC2 zS+zy7H-X0j!%vTeJ3P0({q$HERUdO$F^}*3q8jbAQlds}!6mD#WmnGh`ihC?{M4FC zfX1fE(q8U$ns>w5K#G&K!}07(&xx>UUj9vB%(*$E?S0lUJ$q?;!T~Z3mC{7Uf%Mc> zU29hCJA+See_s+zB%!JYBa&I_6UN(D5gWvQQBtX)pxxx;)k0<10}iXst!BN zmUXOEa+a8{<(p}IVlhk&=jX6S4>hX?OX-iy^O0@Ix>>1!^ZROY>5rrh>vvZxAA z-ZlF-PAH`np2tci)>G}O>^6e7EzOlE0hm1JnBK^5P|n>{eAop(&SH4`Pz>BPJz6qw zi|1FFaIiWepL0kWSSMd$CA+E*h(MN$@3|I$Iy+ofSb4ZIvO+ddKW8`6R53o$)D!K% zv5lNVd3HK>I{(2TrTVMwdJbVBh^-lt%lb|%8iuwY-W-iZ($dmx=sk+9*+{d zy)~IX)M`J}IF9{J)H(r)&W9W`1j3GTgW-0OBY*mnULo-a#`TF8!4{2M*3AeWh0f`$ zljAuEk;NFgQ>{3jGq0v!`4UNDy2yMkz3Yz|hFa6aZ>h3E@-*rb-VNC-5nl(^Q+M3s zv;0plT;h=XS&UaK{jI3Fht?-|^y6tVI_uI3zIJS`e>pqI6(9M&KCbG;gf)|PtdGxp zcVQa8?&Z*DWptW5)g-|-J=GEuI5I8r=hH-(ahR491xL$|R1n!BzPg5yqs>pduVqts zuw)P;e`n@-nbsxXacQaf0nQ^o2+O235nE0S(SwrCe?pf%8T}UfgP!sqcs_lI-#uqj z!n}VVnE0iIHy1ue7U(DHceJ0OdV}t5-lEvB!g~L-yxC%mOv9FaiK-`TI{kT*TD|AO zgkcrYw;Pl>O%$G4%`FU7rC(#lUR6|HXt_Cz(~Lr2Rcvg1UR0Os6Js)JZ7iOUU(Bhk z<|3t!Vr#2i#>d5|K0vOw2@nr6i}{c<;pCy9*ZEp!%W|gs`2#jn_#sN9Ez~p~q&n}9 z(E{OE+^?L-+ksRJ!l(!Eg_*$KC*%f@BqiB)I zw{T)vml(MWx~xBJ(93~8!z18H8WdqC_G8o2eYD4p?dOFtRYuzN`4D~t*@T#8#W#k6 zfng83`9$$m`(SPR2Im{r#G-riWa|>)#q8Eh57yv^r4hX9T8;CYY7%t|?<9p2*L2O1 zR!XXlF*#2Plh0tNR}kELVC5a|>eyR>y*d@n&QXT+F<-Py{i9$^7RMm!+qdvV0v`+T zl915YC)(xOXnb3|BPW^AT3d4F(b~4NO5Go)<0O%b@#F8+u+uLmS{?QVbZ{qDbA)Z@ za;htRK3?Tsj#4g+svI_MyL3E~=e#IB863^govIoXnJ}%l;^6dcB@QXE%Jw+*zV*TW zJC|Qv*&ELizJopWXk|81rx>!{z7Fa4FGo+|iwRn12H*Dg;BW zZdeMjbpbngOIO3)U~_dIhc%i2#E*BQUP>hsqvlm1;d>fXGRP!rt8#K&K=KKbjByoY zaq#0qrpuzuzOfZ1AU!f<_yiNtqIssgEDeW*VPE>OQVk+I!8Y`*83=moqGsO!0!0%6 zS}yI-tSA=Qn2!m@q3xvBqcTIr16no3F+3i_w=jeAxybm9+o63#Y8qCb)~FJU-;_Cq zzqRr_HO{gM73QJgPqOhXV;`;ZTs{A;X<~Iqp@u{Obhc6Ag(S++(x1Ik+%b*_2IAes zM50Ttkgmmw;)RsTWSY5q5-uVch9>i*UAVrUtOP=3PNz&c57<6`On#qrZ{k2$q;@T$ ztoJK4E5JCqq(pN)9*+S&Kme323AB&O(Nsk@Ot50k2;26(k%0KoudRStEpspIQnEzG zike~Q{*(Ab1G@l+V58IZTGYCB?`#Wy6RB6*BjwjbQ87x5tbT)4tO32f>VBO$|=lTAbBaY{LWZJV$ikpoi_Q>^3>a|py zV?XMzi<%X$UC{ix7su0>7~QQf`@(2+CHxo>_gS~eQ>BxZU?$3oiqeW?Rl)9;q7%eE1O^qcj4kmH5K`#zs{kKe}-HJ9g z_RlAmKF92mM5X4PO?@A)D}J8(WyO5et#R#T>RH{Tsg%BX(lSnxWJ`;EsfKbU^*7O+ zr#QeO5mkSrJJx@;TnZde5hw8H0iP$xNK#~j)$UjX-RUBac-o)|iKjSPH)SPzOA}f_ z|LU+TH(}x(>3Y*(=8xE(`bs#kq7+**?qx++&KG3sb=sZ-zA&3IK?U z|8oY+M}d}+Al@h^51IwuXe?la$=+N@g5V!=9Ffk(qPtB7PcR+VgbJMg$km;-c@XlLPq_qY6$BJtUQ=+P*Dp{JM zBKXju#?_A?=L@k9E+6E139(l0e$uS0WPNRIpRgB!t(FjKqZeswZlU{}L%Bz|V)f-q z`yuj-#CK-mn8Vb1dbMMWV8kT)o0Pyk(|8miU^0jLbM{k8;BBzcN6b1cKmEin5^C9! zx(uwJ<}nDMJr&~)1Q~M_%3!K4OR75oCP@TL;rpZ#lQ-t24b>=CnFmHLuP#*{9ETqzyQv4>_69^)!ed{t?x?Z>l%IMIJW4&2!9BCppdZbx1WQ$Veyb#VZ4BS;Q(8PwO_Yb0R!~% zIFab_`#sbQe5f#62AO;(lV+Acsd&jx55c;M7Lf2)X)_$ggY;c*-9Wu#MX6jSW0S)) zz4T-yjq1yzRfmkZucLzSHbwETOh-}Cmx=_sSrmt2$^I2@N@R$1IwsrbQ$oShP{;VOE4sCgZ5C+sUekEkMc>z=Y{zjeL(1DabQ@swNmbdOs*%QMmVvU z*bwOn4MICwOui?ytCfq7C@1f@rx-i9qx&9LQck=`cHjzQ09I|93dX&g*31D|?e&6O)DMm->^pI7Ex7#Ayfnb%#BC{( z_M67TfY?c<+3tIwj8Xc4Hy4v3)%KkhuSMold%^Tczlt(O5Yh}aua|G+`G|9KTXhv` z_AW9a-t0tp!e^}638sW@a$F@tT2z{{SVYAWzZb#hLhb68aNZJ>K9454^qe~Hb*QsY za=}H^M)~ck!gD>18IEo}`i#nziFpxqeq#{Ib&Q$p|8hgWno*tt4%hJJJ6+1>PaZj$ zA->h7!MaU@a|=-s#s3Aj5BBLE3-};T@L{e51qD0Wn%K>EZ2br=k%Bn43>h}ttRlPunR*e=#Z zExMt!NJnLPU{qA5n@{=liGl~?7&gKvTzows^Oh56F1WO?X=@*IOeE@Xa53Ec6v&|L z+2kMGrlbKM(pajFpCil6keYmXcN9&QHQe?`OOsyRm=%5Pr##fF+u1dr7@5xDm9&mk zfPS#G-JFgPh|^AUI?W(>e|_l_=+w&XHm75edA(-Huxux%b?+P}FT4oQ6qB8>1Tyll2)rP-4ghGoU#K2YeOo zTX(@kf@!$>SO>9FgLbQ$2Kzlfbm`3qh#T5{S^hMiSNL2^TXX7=W4}eeb`?ki!^ z@T)?mtD=ER!)CEAaA}zTARy?{$7(mq>!l!@x2Z-wrqVfMdiUbglYkn$#L4YslPlp7S zYceRnZT=Ys`4?%`?2jDPztQIVuP_=|?%Yp|h6M<%U1z4TT<6aHBSvGY`!o14lDwqdzs>|0Wp?0)sApHQm3iE94gy z`X4F>L$vexPwm>8_NryEFik@wu+IyHHooFVcZ<`r`LXj#v2)bUW|EVn?PTyS`4g_f$_(p9j{ zatIcN1cj1mj8!5&8}SPRi9aQdY+Tq&bm=n`Fh9 zlfzsAN||M5evT!`yPiwz9cX4a>@S9geA?u1&ZY`P>X|v(HvhcwM8J?^ajSV5q+=EL1Qz4U& z)vImEvRuPd$JhdQ+v*NRWQ7h5#W^s(4WW3`T&qy5je`ob1vvluGam{+qu0apT*LBazn6B=3l+ zzG@<#i2gyWG0ixate;`y6R8yDG0D03O!M>cBKFF}%wU?jhvnUSof872oQ-5tUtPF( z2;XlkpIR4gLCt3m_acY6$_BXl+1Lr3$PQ9__n#O{ERqEv3Z_{X(@Agc_V_VsOi!&K zS?PMWd6qUh76^~$;0gysH=GBi!~~=SZkS2}d`fm#_U){U5J0Cmprr5?!!skF5;PzC zwLWOpFA9A?wf{;>9*yZV+{mv%Z}LVmG6BzRuShzB5*jqL#qMdXz0neq^;Be~Y8Fy_t zIT(D{nT7|*k3u5KTZzPAP)!8pl|QdbUqB-t-dQ%PWCnyM5Cf?S%Rd5jTIa}rQR-$i zOXup@0oT)6)zkRMlZOe}qV3T8=70nB8Ez0yw-i88N($)pq+kx9sQYI5H)Ish8=Fn9 zH|zVEODQW2{q6y8VoFt}lC9)B@p~h?iT##&@OY%q_ZjGI8OM~AXsuVpX)3<>nMPIh zEoq)@6z-?u3vO}kwNJ!P^1$*CG1#@Olp3PjSLFX)sv|Fg@}(nbY>>WE7COs>wRX8oHd=ZN=TG zT0*8gG6Iuthr93!y*#nx`lZG60x~zM8} z5gZgZo18A4*CIo0T$Hj8&!$Z0$43Pfzt*ZJ^@6LCS-loPv#2-(joM^KL7i;3)`*I1 z?X+rC3P-Nn_9p?QnoO>dJEB`l3l)tp;@FF(G~K%3ii@PmzGE+HB#bfks2~RAWKaTU zm+3jpA{fxy$=zS{I-Claro0D6^9qCXHc;<#usrf`!kksV_`#we9J!KV0#zxc$d>>g z!hNdRPbPf;t1a4b15PL1txaei`fkSo2^_#S1zo`wUDq|C6kFawH2z#+i|iUk5}ps*E9n*#!7K3#};rCaU@Ok7C{Mbx>)_p@L>j>Ju}Nx2-=6vM;8mPC`Be7 z-`~m-L!z9Q4M9`d3<*Y4`q(Fil%G(|%tD>e_dXa+^kbM968F9=m@I;iML%v;c0T#W z*U+XpY~<{7UDjy-x7K7lxPAir(`1yKmGc}v>yi0YX0A6^lrQz~To$c3p9}5?`5{Gz zx)ebY{OsLH-*)eISkP?c?dV^Q5&3mg_f`yGT}p-BOQasSz=}R`Z5QR&hQvjvC@n7d z;w46?$Sf`3;r(GV^2qLvVHxic@dot~vAsmRggEudVghj&PY032D=B4Z`|)=K(R&yd zQJ!y1lNJYCY4l(t=bk+~-{|wtI_+%%mvqL3ogFuxt$5?z0VON(Yb!*711&D#DW15B ziSdW4a#%*Mco*6&FNoai>gZCPTKHN!o4|K8*IqmO86cicn~xoPsTjL3FPz@@1vVr_ z_~j%=bi!=qPhNGubQVfWP5@CH{DfyPV_}o z>n=#3Gg5})3bA$sAaVA=RlOxdqm^V0L{BPJ7?iOvfetMKN-h;kQmIfpO9#>2zR+Qo zBr|tC=+J(Lsj(^W%GLY%mLiV9AZ22Zg2n}Ucs%8+OK4FDyc?){DDZ;~2}RqBAxgi& zTLz^To5ct{;Md_7sI_UUTq={s=Q7tQx48}$M@cZrtH%Z%EpP!8P&}YZ=;7VmrSa@; zC&ktiJqh-#S*4fvo`3XsIj611`Th|W2<|PuHjBjtk7TfIH1sI!b(HleZdw;V0)Upt z%jUTK54T$Zp!M=O0JOm5qztTXUp>*=zBfaUc67V75_4~s9<4a<(J{_UZOfCq??+Gd ze5)A}!{9UJF0f*9yaQJqNfZ*p{n(yygGk+hjhDtylpxcAJ+#W1&O%zOD&Nt(V8}f) zX|_4K^qIjfTwyrNN4LDY13Tt~Q=gmsvC{HFV3#L||91lwD?l3)HUV#0WvcLDN zA4omfR(-H{n2n8(2i84*B#5b(iw^?q$Aga?v)}8J=cf3yrZgBrb0sALp~PJi99# ztx|R`(~TyNejMBqi3;R2N%E4sGaU>v_Dnmjrkg9iOlXw(?vfn&a=0g zS!75>RmLg#L#nD23E$1k?*8Ow)R3i}E`%0V@TP=3`a`r8?47ApDr}cv+EmF9`f<2t zDrL`Pc4X8wyOb5$StYf)fKnvv2*moWCA(5pBNErO=!8X%I7{#V8bF{@h7R70K2a&d z1`jf*NhVJzcwncZf+;%L)sj#1lXo5&{o)9t&+3$U!v(; z!7rW*Kl(c$i~aWofIqRE|06&a3@`X6AnSjV&jWeH1{jL~7h<7+{ALmffxzrP0h0AQ z=`d3>V@IH^W}>6-=4kZG>l3zWX8k81=6{o>1z~~w1Y+1gy@0L3HHZaa0VKxj%KjT- z`>kHqMy`&(s~5;1`%}gKH|G)sBDDWWV`9IQ*fhIM{#RRR0mL;^JWWBVMKX zN5wbbtogb7r{bIQZ;Ef0+CN%m630W}x-87zjSo$Wl?6M!avEDU*2=rmaz5Vc6Zh_$ zv22fxW)`?O+@3{Vn_Av(LOrPffK~nUhOG+>u)11l6}WUf!Q?O9IH|$38kk+)o2A~8 zzCGq!`z@{M!j+5v{Bo_eTHr%Z@s-C%lV9EjeOJ3B?L9jLo8)P0R5!?B-Udp+ewc_K z7S{}X1h&^bRp(0=@w5+1P(6#`UsOe4mKR5)ku_et)0CV@_pMa0e)U_z%SHwkV|IOz%q zSaED6Pp3p_IgC|?PMcq4=k(o8et82P)7{m!X$Cna-ByOOuvPwhxP3tR4--^@SA>TX z8*L^<&^06mqVGv37~WGu_@3k9Q?G8U%N=j;`w@~A+?bPHfFmpBn4IQHW(eT9z})7d ze{Bxmm(}X)(9t?9ftv5bJEgj_X^)m*A@^bcY2ooQt@hs1al?e^fOGw;tnu7KvdMFd z@{P|EKL&;$Wi(*k{lfnQBB+a&N%@VEU9NL%bBX1R(_(ax28xsUQKqRjt6R@!WPu$_ z3*L3SYPa&4WWypN^E*!$9-r!Bz;w&e$79H*$9?4=94B6spAAf8!I$Ku-m=r?L~Y5- z)0LNbX{-4tnGp#sIc9E9B7jvR2cFB~f)L(K+($lVJqpzCx2gngq>MbqFO7*m==qV#pR2T+_93Mf$SXD_^bI@b zUde1QA61Np^301G=vPf^iLUqFvP?#UZadL@9goU;$sR#z6EeU##NylEn{nicab&kU z?(OPt(muzPDlpx_I}~n;OA54+1^CWU=_1*vPMuZO*O)TH>_5{dU?9a~`?sNL>61%; zNhwBe7Dx|@ZI;t18;C!hC@UKIax9go3A{FwUhGMO@vczK?YD@-BxLtfne*Di+HO6v z!5x4jO8-Xq@e#+}0l4@EF!qBy9(NS6+=lsXPB^jWB$KkAJq}@zSD#houY{EJ5@#53 zO`NybpGX)Av$S@El7#E}i}mV9gR+xt0?U{SA^3KS44W`6ug_6GlAveJ+9xk{-KqA0PHf-^n>kFj4(X z0+?6EKhQ~7e~@YwRNt4^$*!1(RJd;#XWuCMF+6N3J6iI%_#Jo5`OV0Af;NOEip-O& zv6MYjxL_Tuq4O8Hiv(?p+(?jya3Q541GlY?2{Y)HiLu6_U_Srr6Akn2*rK94P4xG<&3<6TalvyFgyQ%SV{k z9Q=3}H9cAf%kTYEkMD-quCy3p6Woa3?KFfY5(1PaN7PsyV-3ryO6^j$arc4ct-BAB zSNo_KNRw88vJzs`{`Doz8$HST_{Kd+$GmHi`0}FfO_`0V=fp>1!k*W=Un3qqW-J(~ zr9hxBu=<{O-)XIivH7j`wsC~$L#zAN*JzSDgK(C6HI}Vf3^SReNyIHTmpS}5lx_hP zRzcSuQE7!-DnT06FnJnS)t)K9z)KHy+tdS2MR`@Q>*4z~h&9s>Jzro@2Qkehn9y8M+pg&qKGZEt z))sQI-wcbtZOZyTaQx20AuOkHeEYGLd{brRIeORao_5uyI@$4A)ytw$vdIG$Bl8d9 zxwAI%UDGP5KEj3l_?oTsy#9tSRUq1P&m^9?;^FDD>6S9S>7cCD&+mMn`*4?zCb&L0 zivdi8F@_Gj+ufs(o2V5Q!`3o$?>bAI2&q%Q?EX$nYx?P~#Hxt6ba3Vz!BZLZt0?XW z*Cbq1K59Me+A*r0HD2HPf;~E#AN9d`+?Y=uIAsQ-kml*<_rK501)Ci+gK0_g($o7z zEZc^IxQn&kIL(v@{^0$BpJprfLjv6Uw|TTy&?B}pZJ$1-8GdpVbAZ+-er^?S|*6^@AC;YdzC{dMsg1&q_dq2WUTO; zW$)x|7D2LiB)5WZ5U~v%=O%u7T&Svot4T3M@XKokZ|Hbz;YWskk~_#+DF?ZU73~i+ zzsd}`59HW>4L;buB_EudXndToqGom}m?>V|IM zGU}RrVFCOc)Y%pvI75^mqdmKVvY*w#=?gk!Fne zj9_hl|0%O{t+R-^k4n*OoJFDLz=>Ui{YJ;(=kmBUvw5dDi>tQ7G1+c5h;5U-EXf{H zcjeKgQTGAVw%A@asZqX`MwVZ`HWjJy=@LW?-= zlUA1_HhRo6H*zpcY~IdZ#Ge(C6Yj?4~;caMJ_m{C(v)S%n0Iedk;1If{oz4~;! ze$F}H-PqbI0INe&?4cII^s;pHyoW(#5XM0&y8G^JZ62w3 zid%Zml$0y**6K1kgA*X;hTw#oQcy{^CPJ*^bLM7FFAXu95(G!k)D#8 z9cLOLsoKVLI2Ihto_V>9Td6oJWQ514{~;Y+lHMe+D;OW5HAqQEuij=T7Lrh8iXDf? zsLNL(No&#}_H@u06%=B%Lzoj+KI6e3pwg{&bZg*t;Tu`QRd9T98x9W>*ccE+Al(yZF0}cx#$>T(VLR)*Q86c%bmc zAy5_fSyQi{XxM|u$}B0AIMCU`@|;p z-eelqSK7UGBg6+4fZa%n#k{vHpNDLmca?MYm&Y(@t5^xNx3(@XyU6`M)nYTG><{U{ zaRlnevl?w2&gUWr(pyZC6s5kPfgW$E1bRGcl9@BWvhWG}#@?D`hdm$cy~~)9xJ)3< zI%1JT2x#QC{?rVV1Rj7!9_oUSOPB+7Z`%*1QGc&`oy)t5hn{XP_U}9`n)!@c9~=e; zO^|%c2$FBDc2G?4diH1bXe|lolQywaah1z^w;=3FAx z={_WjSvo`h^Oj54Oufba1EPyJ zZMHx3v4M!s?36z&6?(!O=1p{L&gR}3vb;<(Pp+Q6Vp0#dzOrN$>^Ob z)_5fQq~kFu@baRFh#(prufX_m{O}8@HIz`q5` z{+b-~e*`Fl0TurMl>GtB`0q2mIG`*)ag}RWg@f%EJoRr>#lcp`#K_vnUJqtMpzmm9 z@Mn>Kw!h}x{Wky)$D@A%V=Sy-@fsN8fEj)n8q2bC4P1zc93KStL48d^w)0mNBKGq_TK}n z{}G(yI7)SDQcPPvI_+m6*%g6q;&efi8^=lYM((+FD zc26rl^8vG_06%#(LcI|x0YNZ5k0)>*J-3_GAx^E=`ervPtvWyR;Q3ZZlJ5GcUjM<) zLhBLvIbwWZ75swNIU>IE-BC?ThDovw2(se*(t-`9&(smtmE+0r0CI^4O26Qm_sQ`d zBGI{lRi_4q+0h*zmv4_An6RoFLSr-DS3=F(O@snZdax^ zXY+u#Ei?OWz#Rwwn0E~V%|ndR6c`@{9qtursXSGy>!&GqCbjxjPH8Y@F2p@c-hY}; z?|D^8sj_V|3P#8=zbr}Q%1itKWh6eGyE zg{#?QsOU^^f=t81>}X;{$NH$vePfX9$MN=T-w}Be&kL_yFOogqHS}KE*b(_3%XVja z&ntAiJxYvtB%r|b^zf(Y>5Uk;crU4Yjtt{H59)bNU}U@&=gvLrYX-Lg?o_O?`6b{vVhtdpNOkH*)i=C{?r#|>Gjq*C>b5(I&FYl zCx%ZC${nXDSfX9NKG2)18}mXvDsld{$F1{4UbHC`8>Bn2bp#q(L#k_|*x=#|R2g-3 zyB4hV2?U#wro4UUJQK5Suoj&L9V2|6)~eak-wY3{MS{0GA5_ht8X{9C0aUyYK*hrc zR6O9;#QoE)$u!>Jgw?W_rO@r#uIXZb8*@yd0HweBy`}-X39`z<%!9izXhu7qAYo^{ z5uH4t!p;2pfwAw>7S{a23^kXeXWbs&E~1sQleNRr0mgr*ElO}%Z*!48Mn4fIpS= ziZP%f0e>pW{NJ3|O07Or5Z@AH2DCg2ydm5Sph4XZBj;s(i>>HNA$$~DM%X3;l zGCS|NU_$o6H5(7U-!$8-eC3{{vJ9{rjA=2=26lsP$_>Dn+_-V(BQ%4-mT`+VjpQt; zQHRb+9_N&7N%@!4X$5dPwTrjg4x>~3jgV(!3P=?Ty28=_=Hu1AgK_BqYYwBJJd{-p z#@@I$efF+d;Bltemlg4$yyE9HGn$ODgVqE|-P7K&M%h`ke9+haFIV)B3UmogUi^Hy zovrqXu=wYYzzjz3L(_*HgTXJ?knrOxod(0i2?^EgBSAIe@OJoq`uJ6FPU{3_-JE7 zIj^Vopf-TrrfKi&@oUos3cw;^SbU|cMtyWNubAZj ze2m=Rx4x$4>pu1_#w)?&s~_L39ujT};Bq=ds+PLaAktJ`9x*V4*?v=g|Ae$Lz`((7 zdr9`~)dZruLw4&*%&TqJ`8AX8+q37ZA5SQjELSfJ=o8=VzSVP4Mfh6W9l2*g4!t`w zVE52=ZBA&;>w+1Bk}?(}-4a=XRFr}SlM-vli6?!Rg0cl)i%gUvd(Bxii#squ2^kx< zz06vmM7#R&n$a{!BZwM1d$+Vm5`~}YWnCe-VevL=U6YZ~y-v&2ZffK4+M$`5x~)r^ z|I01?qr!(%8EpBsk7e*T16Tb5O+uFV8B#GkwPGqh$b#kD|Iv@p&iu1#;o= z1U^)!48?*(TX=r{>0_s_pb6YOud}m$G767@_rxzFyT>hTB}iRtg(>Y$YXL@py1N9Z zyFGxq8xKn)kWbc9<>xqq6cNT7lMH&|;5UX$S4Ugak6stNrJ}izvP`rE9d)h#vq4_n zoN7+ZvT3H~kh`uXVEbXOKu0Ua_wG8=7n$MDsm(!0(TMkC_L3~}M~y$td}QPIY0e1b zniy9Q4OQFeLI9-q zn(}Qow=jWBpXv<)4vZV%!0ZAJj1frr>KQbKp<>>lCaq4cRYlz`c3Fbp7rrIPtFBpDbe@j5_(D=8mvB{lfzO1l1=D`{^0!byxW z?@&D~&Vf^4eNxqUs@F!c$c8}`&89P|CrXs_z$O42{GC41|J1=3fbI6?nD6Y7zVl95 z0QO1Hoq=QwDhcExa&fHI`W8LW!{t2;Dr4j$GV#cFTRfo@BK%um-|a9m@fv-O(DPPJ zBMuczDmhHjO}xti@mpK{M7>?NavU12lro^~oh1ZqD}7?EwYH&?GpV$Q&LqVQB*>IK zf_e!zt>N+*_A;r@!zG$Z6;krbU8Ob|B_$uh<$bvYQ6svSElnkAWQL$~J0B`6^IANx z8*DyFz}No(6;_HDM;?*Rh>k@Vnp|bCKN8_scM$zhx#f^?Ur-005g(+Usts-k_e59= zs1wOb4@GC6Q8Rb~HzzSOrRaEFte7lp{Zp>O=u^LZNAwQAeEmvmRIzw)h?R=#&wd`l z7rlcHC7V6^OYV`NbOz|_oQ%!;ps#GMEe>jfzMd{XDZAIfoI3R5+Aq+c__g@`C1&cQ z{;1d~`r7P=gh-cw{91wL2U1w1l zx=%|p!IG(Y4_6Xjp{JIH@AX=yLHN!R2jw5XabsCw-!m)HGbYp8=p8hBo!B$v9b=N4 z^*})8XBTH&AoO=`X2o0JRfNzU&2QEO8e|3A)mH0Ao6vQ;W$V8&p`&rjPJd&9QNU9r z7teKRO2W(Pk-#g`p^rUk+)i2Em)Z{Ul|l}UVc;(?Cw0DmB=^&tlw&*epqTOKi;%YV z=F6FwtE5HkTX2Di9JNQXn_4{$P=4#z9#P8cD_sp0A+KXS)S3pOJk*enx*K{QF*6+r zZ?*e`Pf7FC$Zr~n%u*ed-Aki7`hwB;tkxyKX5HF^_?)fwsD5s-c7wI=K#7dsE$K{Y zov-dvbBNEa_iSJ9xO}BO?e4tg;M~kR`m}leeh(4yibmOmsvnc*nx%(4LH_gFYNemv zaBj|O@T)~3qo%lf-WktUG1--sXlmcE#jxbi6Ci$0SV!8AxKYECY`C*xOHbyyvl1T0 zIa^OjlSW(cke~v)NBDD50@Eed5~X5$O{Y?6tkF(DF2f~80fA3HzS{YLv%2ZNx2Yt{ z=opkm<;e1&9>G=WB+T!S#$0ktP88sO&;A9AHvc^uu z6Trm1Xno zDlZR~NvCc}D+x7g4dJn2kook7vju4vXS6{u_v#G8=axGnO{{OiSAP1HG{1QqBrncHK5 zu)<)Aps-?7SYhC6N~MV4z`@z@#ByxGI?>qY(Tns+-&J|Pg4y!A+x8DoV#u~*WU*;F z`!XSo&LFg&o%I08TXIx;aR27bLlE*2ENvD>@9Unut7$?Rv$R z!vh5To6fHDvFkK9k{xZEd}Y!0Zr^m?-q}M~A8&5B$xe96ed{!ii-oJ zc>N;{U(5Cp+h_Tqz0`2uzmwbgQTuC!{?J%|tQ*H4F64j4wxEyxDe)}Qu;&`vdIPX6L>RV}KgLkT#8=1qr3j6d z-t1jst8r98kC}35H3zx+6<|tkxe%YJXG|tp6l!~49&e{1!<Q1k*^e7o)`QMX#S!(S7T*Amp>9j4f9lzFWTSF57!Z{B?HIXBmvygFXVM;*lxyrWOI3B$$(u%2y~I zl@H4YTEnh7cuiAjFIIQwbTIkP`d(`CGVHd_GM7*wlj5LZ&CZLSi3xbS-ty3K9%m*e z_niFTH+;itMh7dTuS5K6+5F!COk&bN63U}a8Kcu9d?;y(Uw_h=1b+rr2@0K zXS8*_zDWzqJ@52;$;PEWqi$8g$zNR`hx5Y16WvXkEski>d=Fp!0Akm$*q8IfbK$fn zS$YOJYqkElN9^4ipklGXGLC;5csTXRGm+$@{u?U%7F}a6QTA%hI_)+hxE|R;{1V*o z85w5ZSNs@5o-uzC+^u@V0T5s}*e&ho~lP=lj0d@c2x@t|_%%^Nr@SyYS!!oiM zkwn~5^c9`PTHTOtEdXi&VOaFq{S%3#dj3t-*@G?>gW4z$emq+4)hGbKKuaWuc7KFy z8rSeWcte$`B#t&`TMYRU^Kkg6GzG%>nXL#H)%(VXteNfk-YU~ymtFh9Qj@Mg%3q4; z{m*qQ>)5f8k^v(vC(d~!bL%pNPgiqfM-d zlgo3tX*&QaNzK8SKAZHxh}gVitE*@%bR^Rq^?)U6S4KX6uEFG1IThWSJ#FC^O)SjjG48 zS?J6#{4wM7jpoNNWwq7-ydQY@DX%uz$yzppB4?+g)?m@ch-m)ZRS!?CZ2Nk`aLfIJ zRajk^7f;_fvkC9v#?QSsx1#Rq^hPYgTR*YyE}lV;b>f+YT%FKULN~^xk$v)N^6wyR zN`L$eaXos|x>_zqTf;J%5mt~u0obKce4)+|RdFH{jQ-7aO|7XkyYMl_ox#VCIz^OI z$}yVDvMQ{~*Qo*WR##X32pzpaX=*TCG@z-CDaN^QQHIc$M^%R+L5mU!$NjQE663BN zE?}07j-#+8x)c*g}ctO+oQw_<&;t8Cg= zM?~CQE-N--v|dY;A{EH#6K{AaM=D_2*BXhq4;IBL34zjgH16C_hA0mK;JDL33-I~OGZNX`5gguVirOPvp z``X8->TSr{Q!2f6oBr0woL{FNnNl8ed&^-hYDMCrW~J|G z`DZP{h!6(;v#_c5>VFJ8gue!!+fZ#zFz!&P7bNk=N4xw!>=>Roe6Zsli&Lx`cZ3M~ z2PI2wW0D&)LXeH+CirvYCXg(To$8Gio$B9bGr)-H`(BzN3A`hIgw=hY+kBCClc0cq zEKnMouMxP*QOPWt^I>Fy%WwmiAqpX2~GTD9Y?>uu_AhDL|T&1YFX#nA-_K7mjUR z)W_8r{rn$Fp*lCyV6n4GJuX~LB;A_UEvs0}C>jgWgpH%X#pR}JPfcMC&c;OEL_I;H z9>y#Jr{{D&@(Hi#?U zbNx9ABh&SE5 zz+b+;2hYpHb=Q3AIKPaY|APLRWx3!7s@koAu%B(EjUUY6Jy@|Bc%3FCd0%cl4WVNa zm4OBZkAjbDc|MUDhU1i$(~AyLPm?{pAt{zN2=MX z+W11o`9q>^6g1uV7@oP@D|x|=TOGezu3y98!5+q7^{^zOCqD_1bd2{1V8HvGZJHf8 zmHVxb8M(Clo^%aW;|_vdPN}5Dcsb@3NQ3O@Br_&YA>9OTB_o6VTvYwit3wh=EOEZ^ zs4>lzjb6LEEdRWFpll}CAlAvSMg~li{Z=<_u{S~1^RD5;@*h!}Rw2Isx=%W>u*;~iu& zKJV37(tWR!>*)W5t5t7E-s@pOt^y}I^Hg0s} znZu#bbjw%2k-dpUA^!k_lBo#d6bc1r=jY4)cFp4jcuv@J}H ztLL5C7f>&+qh|*s3$%=r#m$AeeOTXiHJ5$zo%HgZ*eony~D)LcDRwVWIl z8)OnH5T@}NL|>Ts)TW~H!ScPdzoW)5N$XVRqmo%mruA3kwgnJvt#+lT&nH86OTu&6 zfzz}4e*3bHYyw2I5p%u?+cu{ci)OwrBo?2BlTInwdK%XqruT2mg-O*&%fB!l^Gg(x zdZe5=c_T$Hb250ej8q}jg&NUs)7)jN=?eCfy)Pr}mxyyw5|H1Pye*G994u&^QN8^$ zW~c%0Te&8@Bu3ZGLi%{#{Gg9ZKB42cXOg~+xl*Yb+kMdqX>^Rj)1VC%Ee1mP69KAXPa@X!q3 ze%P|QxF)yx!PV1A|HhqtHm5g5;v5p_w)n#|X9&gs=3$y$L{4O?o$MIP@S{bWD!S@l z9n|4h2Q{8jcGi!zjPX$#v?BCL?MluW38qp7G-eqW#_zqWoby;Bz}g-`PN=d2jfvG zE)HlD110cz&NexwHjW30iz;Jwha4vH6GRh$^4cw!3~gs%ck5;p8cEj26s}dhm`%FV z6-{fnG8^oWa?KLP05iH(8{$8j*&ItxjWZ}Oe%}-X_j`u>Wz8nuA#S^S_9|zT^|U&X zN4XeREd1{7D?oR|bq0gCFc`e=5z0PPYI{j^+b9Ds*`y?UF~M+3Zjil+?fb&IvLCEc z$+>II?pLM*h{62bDn%y?j&`8Rb(>4=UnsDy9;k?To`0eapq-hbzRvyATjHiwyS%^? z^=s$YkvRGbryc=Yzkb@E%&kk@B=^-gUFCh^_JZ*1G}sS4JP|Q?AinfpDpY^}p8tPD zq52;<+4KC-ap`}rP;p;5XJB9L3B8Q`+ospi2o1M9X$)D8?4(|U< z02ntn$b$Smgoqo&e*HVa?5a9{sR+*>UDp3US_g6&b_SxCu40+Exq%=2zY%|~D)JYE zB+uV7c>g!z7&jNs@8Z}$ghXx#us*wNrGFvZT~+5VLL$$f8s^{WPh1cAIRBzQjfT>; z;d*ZtR`sIBIqE$k8hHPGbpHw#iOHdU?rSGnP;6|=DMSq*ZUG*0s^X@t4mK^>2Ih= zH4;lN9W~Pt`D%wy;lPkM?i%fH#GC!12DkND#h~+z`XWZu$V&@MC$Gak%oF#Z`53uy zWDwoU+rjTwkq&J7R{Mbox@r9ZDyhcIPS`7-%&HfL5q(Un!+N~NxTp8g%BcrKKC@Fa z)<2UyB$`;X`lH#;jHd9giIF&N=n< zJjS%S_jtc0CU#~d2d8ShfCv$r&Da+~CEgK;lhf7_^j6g|!IQiX1cR3N+$&t8wsHW4 zZts%Dm48K{3q9N3NNZp|*xWon^sdry^}N8dQ=}I2#F)=<^StPs9By@k%4GR|ti2c} zyQ5#mt(DPr;9Kt{@`2)VU z&BvAnDshNDLy#B>9?Ljj83G=1oVJm5V{i#CC2BF=uY3c=@7n(AtTC5|`inXsGtdr* zW6I)Q*;6L{LP<-LjfkNEL6rPDZ%xh2ezr1r=EZ|yD|w|zfOEQPug{Pn)D}pv6gY!p zM7gd#mLVwWuc-`v`3)W&5bxJ^-DQueO$%E%dzcE6YL@ucu(dgb8gm<&3Pyz&;|T5! z1Lj+(H_S4RCDw9I|4!or)TH|d_0;15NWAB#XBb3iq02jbJA-u7>TGVPUi9v*gxyzx z1k3^;pui>SPVdR3I)id)_X7Ua%jrkvb{T3A%mPOj-|iy%jq=1)!cXjJw8z!cz-XHq zKloz{BNy1&wQ_a>rvh=AIm%0x&rWzRNV8D_`8D9tv`-NH&x|-tP7v7S5T|kV9y(oF z%N%l{tj5kIaZ9?Js_P4u4$ToKaP@{y?%tE5hZ6&gPc&CAGsW(+P8if;`uRujXA?Lq5ToN>%Qs!^IP7Bh>O}2 zqVuyzZ6k?$GWGGg!>w&gk4`WjoRI9E)zQuPZhBa;!v|iq2*|j56AdrcNmN%>AMoyD zC6pdnckLbZ$4>|#uG@(9v#kK`XkwsXXZXX*4UDTcyu)fl#k#$Ju{L#pH|7kS26m}mg^`Cm9}Z_ zHB~GT#z*l}!l^9R4~dBF$5B0Kg@lV6npXz5g$ri<5Tyh_bcX|KDnG8nLKvN?ETmjcy8)T(->pe^7G@Btd?-I3U!UKuO9g;8Xc3AqHHOb^1h z8p3tc+wod&EFCnUNVpk?1etneXw6Ppuxx+Dtm96NHu>UcvHw}OR&f??c&Fn>r6%gf z=x&O*I8Q6@f*EHy<B?Sw8?yC;RagOh6;2J85tC*;PFZt6A}FaJd|YR7 z3HtR8p5e#6r=Y~(S)c06vq5}nay)FE&$7)ug$;}$+1N2dwwiDAr**@iDHQmRIF+Pj zPErKN%bU4`+E$ln*t@S#eZ}&XK9p~IX`q{Ni78}dUDwm9LoH+ClW>%@!QEwvq@o?0 zvj|g`2XM=-fW$eHhTE6#28voB8XYo@Dc_y@IQn&?2fvJv=4NM@AiOnIGn?4*;6WEe z!_4xWk&>FGuuH5QV7^_I87s%3Bq`-63wtRn#B$or1TdPWPcHGA2*xYRAQ%VUIZZVk zdXl-OzV@%1c9@2RbKP;rYV+!*9nOgD;(D*(e09%S?kI8eTYee!EDu^(L&{7LRLWl@ z_Og56j!JRQ;xgJu#`#%~xJ>70Fe4mU=F4cXIUgx7GntP*7ztJrK@i7CZZ zI^g;M-!OkR2*#f`rMUeL-06xvs8*;I$}ODMuXnnN8r)3tTR3diLQNJ&ggR%P<>J?y zsPhS+58pFloT zoPrr@i&w}5&6I#A2}$?Rq3W_i@!Gtu@d?mg*gNcVZz%#(fHMxTI5N20ytogAE=@12 zv8nb%&Q?3Pyz(sTWrMbDk#>#}k70g0M&`2dI>2HujGnHh%BXJ-$XYw)@H&?YL}#Bo zqP!&}P=hTY0|>z8f#?dOM-VF)pK8_7qi*{#6B&UriczM%9x(H`@a|%k5sqbk(CPn) zv0i|`hJojl50NY8NKEF3(WK^iSiZK}7PjEAMml{68FlSd;w2}kU&htF3qCy#(4&2? z)s+WaYK12ckp;Zy*gXp~nnBcT3vmY*5(DC~OsGuo2gYnv1u002h8QrS%6Y7;2qrxX zoPK5htPI#I*&GI;3NF1R-tJZNAk_xl=%FtYr1{zIsG8m(?3=NxuReQ!a zt)?)K2T7=_jHFkYo+PS_1&a>?BH{^VfdxS62$r^FDmS{rXCAitViXhsiqfLkxq9#z$SwJc8@ zkY8B<`4tYxucr?Uf7L$*`m!ICakms#U<>nHHFF_JAJU8DGIMFbc0KoMM!wJJPB((D z4*tJ_r3fb`AnMI4cWc$?<}?BiN9!TbOOCC2H|HhCHswyK#IO1C$?;Faecc76;L+DK z^=#}lueRt+>qADdLq`Qfbg4{-_nLqBx2##uIk&7Gx8s#ULq?k$I$Nyf5{C&(Ym1lP zH(MFb1R8Sd9E*X)j{oJRG=6D>?NZmWZ0ot9$yyLJixKCT``pxs>G7%9`1H)`*zWvd zIb`FfSH$>J{IEzI%28bIaLWlSMH1JiVoz@--hq=K>cmE$Z?7X>h1e=^%RmCK@UaZq z#Gl^ujc)8Gq3>=hc{+Btgv#7(Xi9RvwC9l~je};N3`_lMgym5bS3q-rMszY|NKpF+ zVvQ+m57IXq0}sDpb9d2w!@ic|l=&*er^sMM`VAKTnLZ$;J|IQZ6-_?>hE2siPm;00 zh3YC&#r)dmbzaLI*1JcvU&=k>8^K?H)W0t^eo6f(;H-sF5lT&>B4Ite8hdtM`@2X~ ztE{Rb$w93?jJcdXfU6&gE{X00uiuzf2pN%)`HEpV``r@{i^SJ(5*K|~UPfjl3!+2O zLvx-vzcdEk9-60I5(6J1R^R^a|Fi70@e3c*a)=vDK@?j`P?WX1{TZU;nY%^e^D0nJ zar7)j&^n296mK$LG5$KB2p46g@O~eB z4*{IOq}W>r;bR5E(1)@<&)hx40+aLh{Ti_tUf=B;$j~qqlBV&=kz$&_QsGi6MS!l# z<&T|C+l_<(%nOw685CP7&Uwni5lIEE|7OVj_Lm_SUaTYlB1e5~Slkh)-JB3JIPzM< zWl(DNMfp*D8dI5Q-y7k6ghTy zc!fE3N;MQ2c1kF0s#V!W!Y>-vm5z7=JxSfN8)f5tlEC8hA=o^8f^SnLRP`29+ELB! zyX?}rgY(8t!=q2W+jD2ED7LGBTrAv1Yvr7|!9lJ%N;bhDcN?AIg5b$X*{TGYgv}>bO1ZZx-+qiq>OGW6~GxG;itn8Vv)19+QK`XWiD?!{yg%5YT%F#8|&~U`)h44CgDbE>uuFo|xpGE>u??*9!FK`SPs!%)0cwFB zXFLET$+c&LAO?``-WieuV!aDl)&Bg6wAtPZq^(nNwf|Cl`@7Whe?xq`Qb_)r@Gzb~ z+DHBGijL_iRV9)yT|=II`W^EWZZv8NB&(6bTV@=aWu2F z`l}50p9!Ob@PLfVUosr;FC-)HeF*Pm!sWk?#4Cf%N^CvO)->Gt(eB6J{cpQ(^;k#7jczY$SyrwGxUjOLA?0rNd ztnc?&(*OEty=dHe$!dwbUW}9eE4a*?o}K-C*43&Z;cZ;Q)r-k{r^nwvpKHd7z-;rU z>Mpit)37O9spouo_G5QvB@f-4ww&x4CeHVOb^Y1gKK7b@6+gVG_+Z-QLJxlQbEJ6o z-ubKg^R1fk!&yBM!P6Dj?R}6lS>(y|T~#q>wwd_+*zV2vAq8AdY?!ImFv+lucSb*AyUgnULUBW}~T^G*18-CY0Cnuo{#q>3_LQ!?Tq z5pEHzhZEY^V|POCnTGCybJH3*cS4WuoSj@Q^O)*1J-1U(6 zwAmXVs%*cw+VBlU=+8v9wc?V+MLnF)YOgkKu1-Q0tH&$HuXayx$= zVS>Q2{%tSU$HZh|(P zQyLpLIH!6Bb6*r?$^7K!`1XN;(cy*Get4RX-Mq%Rwyo`ZA#XI1;j{1)8Wh zpY#+>P1ChL!rjo`V)0sTO;7mht2VKVDFSg{66r#+r`HnFPY@g@$HW8_dEV{ZRZGHk z)9lQPk``+fZFE{rHC~RzbzDOa_6Nn&?qzm&iq*H(R?flEuL6JWza^t!>>cYS{DviL z0ZW#0;a|ZINJt|_c4IvB$f2AI-VQaMq>|1!HQ4wlEM#-TRGauqD}-kE=R=>b+@z0; zKXaz`reivmjCRV@RKFvKQ9NM2i$Yw=nH<<+ZGzg#^W!j6LUN1!iH{aaxQxd~qrk{X zN{1Dx++JDf#R(-4_hag3-UoRUE^zVyqi_D9QCr7?MoGA9Ohl2jiTk8C`ld~i(a&vi z9;R;-&8!1aB_taDBaS73hBez?z zH}?$=5ID5moY^Budw0CEwA*lo3q#92nxvjwW>>uH-WYgy&Zep~kRDMrJkQyE3z`dQ zsU>%?8G5?LmSR;Nb>J~E{kG^>n%luQ#&b0l*NdF*)mRUrmzLS}I~4O?Vbq>Ea+?EH z3zuR&R4Fm(NQ1ayd}T&L&O%&cS7_tskfKOz@33#e^qso zyZRvZfV{f9^&PSBx>FLyYX(Q$eiK&1iY_tbgzEA~>w2-u6x|O;WZcGwe@W<2B!DsYU}6VvI#}7j2|> zciwpYy6(l%QsEG{3I9xKSQ?GCc#F(ig|r~}$4W&-%b%1qgmrnC@ItUtb^ z%O13#fmjgQ>*QxtK<`#7=4Xg|;*6>l(m+bW+Lz2lK0`YDUQ*}84Ya!kdI1QZrW6*4 z#n^kMnCom;G~pjNfKxLAv!I1EV-626Nnt58K?YgcNTjT}915~k6~`Srf=gpa@^xFc z;xfbuqBYo=>35f&DN_F$GT3Hd$0-@&VhXT9HTaF*Fk&>x)kLuwcsIcdqd}}5VUU@| zab?;6TP()yco0Bw8KSXx>F)nq{301O+Hiij)~?APWJ^dI3J+@8GFFAicoTAh^k!~Sua zq#<*EA4Ne<65`&kH&dYd+8lG~v&5RU;Ra)w;rj--N%-Hkx+;ph%8cDiJ*=T?yP!C4 z&t)I^9fCe@|EJ6HQXeI>>ZA`g`_6=x;Vo@U87B)vC<{8>2XS${&~JePWz?(cH?N zda-uDe>hp_*)7fRS9o8c+^onGp|$}cU~Y5JO%Vr6ucFdUTBtNJnFWD#qr zAL{_JlX#nVE)v_bE3vRJ`e1)owrtC;(Vi=l3{75g_6&)+Q#|0UGLDH+TM6%;OS^Ie znTiUv{$sTWGENmE2}e8?qc-Ki5q2eri?T`tO0o*|DQ!-UeR=6ElZYk@Vs7eOkD)Pj z=d%5Vl?N4Cs`e~3MPIB&qf{cg`tru86BaOf@ptl=Nsy^#;n?$b=AX>g5*bJ+uO$;S z3Lu)ZBZ=*E-akuONn|7uScEZ>pfQGtH@6qQ_uulgoe-NRd4V5c#focJu$*q6uN$y6 zmU(mE95?!IfjMQ$sQTjQmUyY|_|dV|x0~`G3aJB1lfrQdl2Ai!y15#fUYWm6j>|^+ zs1JhV`kSqiP>U|9smn@aoH8gQH~Nt*66s7^xr&JpN$XU3OT1LbL*Y~^i({hCx`l!l zv}*9p`PZrX+{fe}c9)dB4W5nhnyr2UAC$p+ZvrD?>2G#x;bJ#)&oL6~XVe#mubBM| zHJ^K{Y5v2mg)7(s5n^xzAwn!iq?j+>d}%(U%`x-CKN@XOy%uv;|9iFxZqnVyol0G; z9KGo#u-Wp|LN-qD&WZIN7bF@G}jUaAXj zwct9vnW={6R?|GRT@?3m+sb)wJdRWSO2xzU# zfF{iARD9f|aBv||a3N4|A#)`{-?|1niF(xNVdkK7kHXF3!32-b;vYNg(pu*S4fS*+ zPLbU~6C&_*rFjVTXWt*U>3nJZhs7+VFiJh@^CuYdrdAv zYIg;JLQk`Mx|Hk0?kr-K^AN)I7iv(?%1@EhHCrB0Yi*X_tj%?w%Kg^i8O0n!5O>97 z64HZ574JU7Q3|C(NGmj3F@$Cvi>tPkEd(aAhzaC8Q)r0Si&%h=XfQmZ-coexrA6s^ zrd#Gg+&G(lmo}_D<0j(nBzL?!fh+@mZN={1ks?>ZE>p;=CmnTx2qPj}eE(WI2bMm} ze8s(mYcNN*T5}Mi7P%O9KWHecF?*yB3t$6leL%TNDvvNQWKa5t%tKRr)+m;q4-Y{ z(7$u=Yr&8=Q(^+E2Gv$eC)5z73&gLjh%kZUQy0h=u6ubS_vfLU4dVV!Aw8KC%;5TmICJi(b#MGy7vvCimd`X&tJm(|VBL;8-Zr}Vr_%Ibm+ zOZtwFnonv7rBS|`9b=} z+hQ`lZ5Zs1-qI4zWMk|(Pm>Ej-u~dC`|~UBC&4k!ohP9~tr)ChC~V#PHtx6*F0(DV zJmhRoDkI$YcvGXTagfC@fU-?qnNa6| zKfH{0-OWJknL?VJ&7`s{c<5YWR$<7Kb_Yy-n9*Ddivro8gPL?tyH4!Pjcq~pvR9D@%aDT5+xE}6} z-20}o-Z52nhhO9DU~5%m9{O4TzY@m&i-@29Bf{AKz_Xv{Ka-~j0T%TC5LbZAa}|{a z;Rf+(|Het`D%{D$#^7&y&)? z&tGEK{%+b|Kr2Fz`x^VT5gPK{`#l#Z*@nA{g!?^_E^5Uobv3r){D?O|8I`%r)6!@cQ|HQhT^A%*> zaE0%x#}xunncc|39r@3BTV^h7TeTbLP81Z2nwuh1-WQ*n$ax-4w51s+4HhlVJ>K64 z7a~CQ^*;4FX!EZ8E}sx}@rlzXY-)}DM%D4WJR#9Gwlj@Y&nqD)$LlBtvzAGOq_}X3 ztQ1t~Ngnm42ssnah9R>S&;6>Ig|U}SCuHYn^(Y0`&p!$HaEmld-}b4eA0{F?*fXk) z*HvrlWZw{JSQ0E873s1RJa_ktLMQCJ!c?w$*Km_rzOh`j#I~Na<4e|STVn^9N=u$C zv;?Z9VzD(co<0*42YG>UF! zH9b+C-6y6JukKVE@MoQ;k`o$P5nNLz&`wH8e<(vWcIg}Rjs%7+#GI&K*ez$ZC~z`x zeMbU`=%DJlUd3!B@!w&KZuR{xY5Jvt=ns19MJ=h7+gY~JrChAwf8UXux?l@ z-YK69s*becuxEOQTB(2D(lCn~TZ!4ZyGv&%zvW8rraRA~oaW=rYgamY&2`Rf5!07r zUQ%HpWYS}Gv7v*2T*01uKFJizK8H8?vvWW3k+ENLe9smXC6hl!hDq+C2Vsp(^SUNE`gObP=z7!_8M&8@*IZPp#BUyI>pMDG+e>%wDg7X)n(9+>@v5|Uq}8Ix z(xDm|`|u7884x8KTkZX;B&Tqp0fD`S2MjW^^VRurp&g_&kJS?SO~1T*oyYXSg1*A1 zK@msb26NeHGo4=}HDM*0ewC-GNyAK1{&Daj%B9EJbe|ogSI&z^DY|G;?d{4>!rrwz z7n@n;8Y+yc_RhJk#fo{9-joh9<%9E1whA`gzH%tZPTM#~4qSjup4zKaoFySMypOYZ zzJqEM!w}1a;Vrn<+ph*svk!SEVk0MeR((^dK-itPhy8iIR3x&bJ*MGHBb>f_^Iww( zc90%Kg1AIrJ7$Cv7U+m+h^F^E^6}lpBD-95Y>7(G4tDR9R;Prg?|m&Y-1~;bce6KN zm`+WwbYHrVbq>0{F+xNz@NxZWgzOojO41hgV5zGjn_tfnHPf`+N39{e=YQ$^RHFmV z3^T%syN5Djx5CP|NJMk5pZ0lV(nq(l^-!bZ75CG9?;Xi${5Ge~?Phk2$mJ_19Hm0X za8mh|k6*2#IM3L#@rBs2|IrWTdTsWX$M;EVG002*c-dk=#qe zhXG-BxTuz@cl~EquD2i|9sn<>7X6#jp^vSehs%ZVi7eD=v9iD5g4gaD8S%pzCsC>FW+G2DhYVp*|ObPy$RUpr-mUUQtu^F)pF0 zvNr=PBHQ)1$67VCdH9%7UWvyuSz9w_j*+YHM@*IoTDuq=O{}$LnX1F=MR%pt4_RHN zpB13XIb!Jpprn?aY!S@zCCKK!q=|vmWlSEyrTZ96KgcM54#qE8jgSI{U{2e?r7+8} z6?e>W{9&%Jtvv9tR}tjAp#KuQQO4~@ zcADANh*Dpd{aS}kz^AO+%Q$gCPQ_&UoWL#L^($_i-t}PfiT%h@dxA{f_LtRC`UWCS z#n*}3R%oKfRy4juc$X|#5g15KFt^ z8{KSvz%J%;#oz<{#@PHAeLfR7Z=})G4?O96@)cU<1=S{EHHkR65!P{AN zRj!vEcT-Tr;n6|H)MeM*yz06j$hmhlRUWx=zb9m6++#`fd%|8%rr)&X=7eSy3XcF` zDJZBuZt5tm&};gufbF|$y*-!Invf4>VW+c0t!GEVawof)Csp45!*w_66Fhvgv01hj zjvxZZ@pmiE7SHWw<`K#55Vni;!{b20gf7hKHvTi(+;h@L`TU9U>%kr8q=p|KiYpVe z(xRylQ6n&nL`@9B6Pd$t`vck2cXCbeSI;VAR4($P`Ze=9->HlbNUqk@aciRO3w;f> z--sWIpJXjVUEhEIeY=b+-?B!&vC*~oM0KEzb`_LdA}lU5+*V|#LP1TpYSirH9iEjJ zg&VuaZun7HTzRMs_=4q}kF!gz%(K22YEvSN;+^ze&0S*uv{LU3y3E(JN^>K)x!hn| zw25m042(+LhEu(CY3=| zc{`l*3f_Q8-XRUbML~}74@>yx_r8GXiv_m_Dn2Q2z*{K#K|!JcFDozhvhdVT;&JJ8 zxO6siD5aQBGB9t&?*7e@%H7m!+^_v{JB0Hn0;SGXdocJ?7`$`h+WT*gA!Jb@MsIa z?nZgKOe^<_kU*zA&TWM*O5q|QQKTN{-;8&=;3Bx&=|aAY2VoxPfP5e2(pGD<( zplZvcPnls_JR;8J;MW)%8ai41meHlz7>dJgY0|Qhq6SV>^6La&Ldn=Qim8VLss`wF zRn~4_bhvM%iMIG)#)Q^Nzr{ZpXrb=O4XrJNw-xCruT6r!_bF#26O6Vu28pe70iyxb zsK6^#>1MhV{K?^iD!TTA7nC&h=-S2iWo~@k7LqYle$-OKl^#|jxRsa4zm;e9;H5>n z2d#R`mDwz;3NI&QCr;leCD1vx>5jgcarT`-rq8Y9>N_nhOrKxrsPh90$sAxIc^7v< z>+`EiQ&wZx*It>d#A6kc9xj7z)rXH_O<}J=gkgm~?CsPoRrV|2S-Pysmy|nCz4vysT|NZ&uzRp~smz+n;i{fFADYq2a4Q{!3Bo z@9{vIIj0M zZG?mO?|-2GjhMs*`K8=&{=xH#i~E17++5Yo)XD(*XTN*i|4a@f7vE*wE>l(iiKT>G z!9D+EFaIyw?_agterx;5RlDDz1zeZ<;GZSSe^I;NTTbt937dZmq5Jou7lixI zqL+?F)V)evpJ_ezUgQazDL|^+`Vx~Cd$S$e&JYdx9uU3I6k8S*&^)0~?4x#dP0OFf z8Z@hiuoja3OU(=Tg$=8b9{s}%|2#A3LQs8)JLp2YJ#%uTdw$*~DAOo>c4t?F{Cq#C zv%VOZ;m`BE5xU?$@r_F_<(@%Wd|7|KGx_~+Yc~p8&v%JctBbe(1%lL0G~( zkD!R~Fe`G6)$E+%Px~P38;AwV%6e`=(#poz5Q7l3*aSB@#dBT4TaNs~T@XPZpTpx= zdqN|&G+)0Dsya;^I;l{(gkHeyv!8BiBRjuQKidX9JX$=gIU+cB+B%_jZ+%o#NU>V_ zvwBQ7(&YkOcvXz$DIASg870zYU_JBc z)AQO|6TprCv@j?tt@j>v!YA4#oyGHFfuTZe8RN-`_)c=`y`32kw$3~+u_vRSAbjY! ztb;ZtVRnLc`%< zWiU*jth4*n6@zZXvK%ipurFg6X(tGU=%5TpSO!4C3eLzBF#Vy9)fm)zLr|BZBG>UY zNI(nqL-bKLR1lgI;;Y$slV*5jc;4T)4l)VnUXiqwz1ZCvX>=3 z^kZ#VB;-b8F8Z|lR-e&om%U{VY4`IXTxmKRTIFH*WBVaH-aDVHH z-m4n5V*fhXMc~;tZ}r2d0KhIyz3L-xXFBfCQ{O8NyI!JYJIVQ~%DI5P*KsciZ#|Hg zbVs9UIb8$}NeSWS!PRTcE?+KN8@*rX^cl)>X0_$Wf+&4u3nvhBdsUBZ9kMs5dLYfd zAUAXVHk;(AqPRVGz{{oKvN9!YQ8Qu(92P0$Ir5Mjm?KVOuM zj%G#%rHQyK=H)nSeYsiD^?>sdl=%=TtAAa^Xlp_qyTZ!ZGL5uM!}D<$;i`0-J`;xe zK11NwVq>;xqs@i)5f$%S=40)7I(R~S{D)EWry5SaI$?6NmseiuU*DdmT@S0~fCtz! zuX)a3kpThh^HkBc-@1PoS)j1rC{Z3dihojN$n~{YJG8ixckAdwXrwN5^pAT`FqphV zZ~ANN+dJ9(62M5PY(f-WyvlzGV7har2CD`bgA|`sUY5(5@!QOZbqH9*78U8NRRjuu znyffd0cBd)`y9H)buCGs?FBzTC}ju5m8#|gjjRW-xg3vPPBF< zG!Wp#98Y;cQs?nxFH(kPiZdSp@@4<*$d!{EL^aL}t0& z!Dr{QX|Gob(7#n?8cw@X8olw?dF=F%E{S8g{40w~uT;UpeFp!OI+HZ&y;@p_7%8VH z_pW<=W*xsL`xZ-H<-2i6ft1{<#9#kJKo{d0zRy^VFif?K>4>rP5ZGH~4H9p-7v1_S zjWi;=4wVFWFLBA$=$Z+-o+$wDCB(gN)^`Xh!X`nEQVjZUIZ6y5*KYeC`AQ_Bw8Qu5 zs)4NxB=}hYvK7&gbO9d;`mhuF8_Pw&?*23f69(vUpU)5-YC%S@m2E_B{@7l&bS!*i z^^!mLK6bwXV?`h@Ui4LbrBJdx=CRW)FRs+i3XPg{w^saaPPcSQchrZqnUBlBR~;XT z2nSN+#fYm6T;Tr=^r@?C-{Q}lZNXh?T7X7Q7vz3H6x||~Od6I6VCwF`16@2>SDl&X zj2%u4Gd=xk_3MgapxQ&fGN1BP1m_i#Ni|UPXRN%+{Q|*xRSLczqkwN{0J;aV{K83J z1tE#ZCOL~@IGalb%`z={0#=qa? z!5waB6TDRTdBdF!o6j?)-}^NZoQA~i9l%xYb7YlyQEQ8xI)d(gF`Ejp`P$M+n)}6|noP-bUdRz2K3?$p zeK|s$m*Fv~tjf$q3t3NA?B1o%*&!D_z$Row+$LmX1TQ-9x_qxGD4>m$NBedUPeg;4 zMCz6R&1>U?aIwBQcBUBNsL@!_b;fhYl3n0G9LoMGZ<-OjQqlA+M4tD=uBJK*$a6= zx;T5WS!9UGFWM_J!Dn{A4|!m>y`Q_jziD5A8KRuC(#Am@DI8ZLtE{^CwS}erXW%~G zShgG(=-5wT1bb&LjvFM^*yvEKrOF{I12Z@512J4L%?;l;$ApIPOSLGcW~7Ij8xCCU zMN*MLar(AK0{D|-l1V^UlL1Eiw*i~7Y}Ao3@}nFFSEE1G7k>0_>`|o|NsC2e;UGt< zyS=CGQEEWAiz2<0fSGCurfMB+r+%DP*75^;>G;o7mBz%(4$|?+GI2&sBq{orimpDp zb}6vLH^CugR!T8U8tT#h*kRBEto99n)qW$e+P?v;_A$O82noK(`i7glLJ$kxqeI8& zY_ZYk;4rz;hm%SQ)#(VkIjYU#J4`@i3i!e$Rtj#A_|J|s9URq8HH+!$2<~4Bad>fJ z)Aw`@L^r$|c#u2pBX9}s$~p>q?c;ZHS>ClSCob&OCnj32&80DZ?V1%sGk<2A^X%HV zsApl!L@o_f<<1-hkFrz@*@yN7RjJ@$p8S~S)oeL2&yji5q_PaB>Yl||{VdFh!9nIx zmHP3OM@8z#Yj79`xxSwfeGTilXGFvIs-#T?+9MN7jKIWRI*v*CW-r<}Jc+MjLH%Pd z$5-pl+-jLU3eS5GuG`sMTnzGjo zk|L`5YdY+yj?|2fHqFL85sCkgySI*uYTMt(X+>I4x&;;KAtVHp5&;ou>F(|ZNs$mx zV1|;A?rxB7kfA#S1nF*m3q0rEbI!frdq2O=>-_ckgPGZTX0N^2d#(3c`&rNXd3r1H zKJhrVxb$L?fOpGubd6|XxvxAl(j=#oMmA$3Lh$~|H?RVS+WzLUpJ9Nq4CheU;6lfk zXt7WYx2sMLJHW-)l+KBHS*89>+%>Qxm6R>sj+P-3ls*sw_Tqh#;MVFXIFh(GB~B|* zRgD6(>np5iTS=+CimBNtwRw0HcTS8fS7XHAL}*H{DaPWtK3O@aK7JDTuM_P>GxogXrf^%@P2Hg#{ zXXmyg(Vo)^Vvv7HzIzjX!?ni*@;dP=+rjwPY1Js4B_qQ{WSp9Z$1Sb^#Fg;i$tsD^ ztQk3*_W?lf-LtoJ9vv)R9l4k~E{}XNCOeM~_TO@aXFLGiG}^)@W;YB^B?fd;E6`27 zK{tJN)lG{IVSj1h)5cNTFN-lfq=kxu%T4b4#7uTjr8%+(GJrl*c-6!a}O$cRDLx3vCIbi20$BO-; z&%@c_9Yo@jGVrpaf3@lOMu3&4j}Y^$iV$}L)z=kq&IEDJ|5EL{Ta}WfS0f*5XuA~s z*{v6NDP~)e8c3hGBc9E9 ztTc(8s>*M@lf0Qfm)Zjv<;N$LpO!X z9eFYInG;J4Af1)TA{GEmuvG8{qIg7=Id-A8lJkU`X{uD@pt-Fc#ufp1$Ao(L+PNs3!qQ`7Fhu zIVf#=N3|bw{~oFq z{)m1A9_TBt5AcF|tRUgd?mlfy!uLgOV5J|LN2 z3ch-+q+#daSYt|y&UMgOoEZAx9YH-_2k~M--r%Lh{j=lsryf1iWGx>fECtW@fDHc6 z$+@k1QfGS-S0}g0_$@pB+S>C&;PH6gvpzGr@YvQBTR(qB@p2}O$UIn_@v(p9T%w?- zrzy+DX;{FF`=-U^(G0Q!3)^(^;TS#HTw4I`^th&zM_ryek^@g;Pm5WI4 zx*q3VSh~CkE>yY6+W$?sZTFZbhQLqfHZi$JkwCv)OgLCrX(WEfW69q_04UW-3;j2O+ zDl9$P&$MN|m})x3)<5dfp{pj-dh@c+rY5_X@<_%Nk&xP1p9ore(sc-K@cH&z*^cUb zu2x|>NNyYIH_uzSS@7&$-PoMX%L^UfrP}Az>HEXAT7j<1F5CP{iIx2tf!WlWoNCM` z3kpr2GEDKe_50ViJF)hY{YJAX{xI);A0i~`USU!}a%Mw5w{5a`R*O{8!Jb%3N47A< ziX4kIa2PVqpgP*ipRe;_NO1;B+E8GE*sNeKz+d~6$h1i1N3erNyUV@4nBIuO`rShA zECGv6x#iG&LG0mN2HUS>Uwtdc24i~9M~zp9;uY+{;+spsV#fWl$t2{xpct0nXm5oF zryrjYy(%iFEU?|NLMcXOLQf1%m#D+oyHUUZASTyL;u!ASa=!&t8)U3~iGsLCyAnig zOSCPs$&|`@wR8PQ;y8piZn+~Avnk`#qwTKXqmSMv?>PR5WiAsSW5uOwb30B?TiY+} zrYa|)GFiMT|7)9Gf-3*Ow#<*@n&$j!9m6-WqHnG`bllCVcZ$)<#fOF7SWEs+&L%Oc z%#7XjjBwgwJBG1YIc}VY6$_JI@kXkgPjOBCJGz)Wgev7xufqK_6Sjct+RPIv1q7uM zZ($h-J}3I;4SFfVH1$)B&kp&dNfrQN+A}9OR(5NG)~T)CL%F&Wy_npUh5?>Bq>j?W~#c*3V71QR# zI5C(b^viPzdia8IY^68+ix!C&0i23H1}%x;9-N8+il&$z1Lpc1fiHkS4m-e`jB!6n z$rXO(Xw~cBNQt-jNgcr3KoVZn8AECh6uwv8OiKr)12i)DaL#4ZRA6ZY-=uGIMZIq- zdTShv9%PIgDdiJmK%z^6xJ!4$9L{_H-HKNoGizOB-4yTe2x84 zIyp=k>*i{7U~H~+er>$R29_jqFTZiLP2D$(0p0>e*-W193C7)+(RL*>VL}TrLn(dz z$aRFfSQgWFQ6j(D;Z7Q^2k8(iadaWjtDt?xx@J5j!t@a)fFyT8ZpAl5IY#7Be|-c6 zMxRkVC>PB{R&Bib3Uh$@1rLpFqyYEQOLwg9?IjcFdxu(9rHvC^MhIumk0j_lGe*Jy zeY&oS$#lt~-sd-uD|Tyc$CZTwwcIq!l`_gUui9E3+K%!AsTYsq zunc>7F}!&;;cvg{@71kD~)44V_Um$m)7EsT+wW=gVv5I9)uxi_L_G;*>gUPJWTxRNb|HjhR*_63aqK(qtia7 zd?=lim=qh%n9;Y?GhXvSJ!&oKeOB})*Y2))sG0h?ou=H;J^ikeCwZkUyU>s;`$`j( zl7oP);`CdDV^O=G{4i+dr7;NQHwf=AXLwbEPi&T&745yFN_Ut8fmS)89ndN#v}R%fW+|vMV{n4s9C%t|orPE_|g8?^aEt zk=h?-q@CSJbaSCulzC8FSN5!zQbKh(375N1#b&@>#_-^Y2nWq=wCAFYf$yFZQOA!R z3hb~Fc~L0k5FxRVqtP-nX*ILDJ_WC@qqJF**)j7*Z$<-zACqF8V~NDZ$gWH*)f%{K zgdDb#80l3gO6s;J5t5iHE`B3&T8Tl+pCZ!MEq-jqprf@}8{~}_$;PTf-$^v;nyv#% z{P4&=mWW6e3Ky4ZZ3ra3ud5}ZkBK?Tkrl~iWqOZo>w}Q)Ea%-B^Or3Rx(9BTRnnOJ z9F0@j1XUReN78A)g#>gN8FvA+0|C#JxC;`A#XULzl0Bw3=wV}f6#CA&jm@jmEH+G3 ze*)K5*e<%skRS)4BbT!I+D97u~nD*)+_8Blt$9uBsR7=Xrcu$h3a-gISJ zi&*u;Aw-r<+B{VXPRE)C)!oJdI2kY*WFm8vf?xFukjiM>#xX@As%n1x6C=i;_4W)+ zdc9b6=Zb58jviE}Dym}@ard>1S4*;y!LaVTr9ui)zYv6pet?V_xah}&|9}*RDE|#p zC(3@`Fwn_06B1FVIDngBgh7>bW2=MpsN#+k z4^X|jdiKKV`=0C!pfZS;xzm*ZWhIamGHZgw9Dd-B>|!-z4!TB?nE{ea_I|xW;87Xm zbZv|x;iq18t*NiGC^O8kvvL7yan-%~4^a7$9ZptN&NfXxNza6SR(r7$ZW@Wg3WeZ2(nPDjL~*9FB?5BtrB>< zZF>@%NxWZ{ITb@OqAnJPfJXM0@V$PFkc#XbBL=ON82_!`+dVsC=8s@n9d>-Lm|hew z8+m#Jw&P=gW;=RNCc2Q60TM18iXfs-k5FJC??%Utm>aH# zV#ZLn?<*@TR#DOq=C#bFRIdL1jBYQ4-jbN;K39yiN;nNYh^_sw*Ur8IYysEjef?3 zT;2{UdQ+0Xl}OCwApM%5--peG^^$A_Mmf@lU3Tcf`b%JTqSC|ee&B{N(Ia7C+g53ko5G1>cEEpP|m7%l`w!0E|ITq!_qM21vg+Kmz zM{-K!VI3jo^m~#`(GYHC6Ez%<%UY#AwZ%OV*_7IM^Bp-v_#R>kST3s+(VXYOStO{> zU+baZMkLzi#2m%xw#dKuoIGzE>P39a(-xHZQAkvDxKM|N?iJgo+Zh?p(K&L`QDzAr zy+$gIZ%&lMekcDZO<;L+=_?CMj472Yy9(30^mL8qlT&+ba!Atfot?MFkp+e7WMzvy z-a2mKJl;X?;)GfT$sc-!hPgy?BGB6)-H`)(gC;N-{_!~uL8qxe;C-Bsr5ca-L+|e> zB=nXnF~vH3#eE6ubCoa4CaT3^l#Uo}kwn_M;Z>YLW#c=ehPFssA5Xc4u-GGVEUqYG z9j-ID16TZBSV`qkZZc5i1fIa7{@0S6HA^H7TxyYnEtXiZYLVYtEQ{mUf2J~fWP|S` zs*cR_yq!TX-@OXveH|Tr^7zt_&>vjrq!TULsvVpiCV7Zb*3#pXXJ{GUemleQ^%=m{ zbqU8nfV&B0Podw#j^rB}6I zNzQWzwFj8j!By>n*ZA%?Q2VZ3IXquOFct~g#rlS<&llu=hu*%n7EUwUa7P~O;uUXc zzR$%_HV2*m72flw20_uamVweuovt%3U`;T2!`(Dy2`ccY4pO@Wt$bNGQG3?hI!Jby z*i&l>zZ#C5*D##Y_#HPVe*PrW`;h-?Ipfwb-4IVuydU(Cx6L(Pc!;O{q9UbNHqLYX z^2OUgCphnoPp6{x*bK89yf+lOl`?D_W=4j1qP$!|0Y6Sx$@JP;vTYd=>nC~J5@-7^ z5u+zz^#2xp`&X3W{|Nf_KalU|`Fl7~>{r;W*JL1vwy zzJ#vD`Jbw?JjQyHUc1_v(2g1dE1rGihLHZw5?=K== zJbzE3BIG(z@w$F&tiMt6AXf<7f2p6%A1>ctYxeh$1=+8$H*gcF*#AK%WB*-p>>nwV z|AQO*m+C$Kd$M66*KD_IOqCtD5d3O)*V(XtOgjBf(4aX$1wjVtpMXp5KjokPCs+`| z1Nlpar}{+b_cA>9#QY!22vIG3=qQLa+=BO2s3;5Gk)v37J-)aSa^V8*`#`+niwGoo30X5V8okieg#eakw<#nkxDwDk{**wv7 z%W*jlzBuB^f3}Vj?YR)BpL;G)^29TCq5e^&Un%p~IkJtnmlum|l9zKMiIjDhY-+%x z02$koN7E*Fh%jz0J%CR0#MA2XVwdaQ+y^@KXBK0*Tf#mHE#{+|=$2!Yv-()fWDtuA*AU)-&y z7{7hKnj&uLesPM*++3w@WuKXuW8EgV;iU2AR&ToV++c)Y;YZ$$yEBs{#nrryXLBf? z^>ednvyaeL9^G{s3Zhuh2w13q2G2^Ctv%RijBV~P_ zMN5Zuhc6ummZ!}ndA{h;45!wK_JwZfY}JoC89SzLwS_Y{9oV5MmDBq(<<3TAq3?3T zB<(g00+yt7J^IWp`qtkd+obOs455GSys0zu$s9^Qwe?{ao28(nwZqr&U`CwkF|ByOr^=KdI z6nTfx;g*5yfpqUps5+@xXg(9m7vEWu8DWjv-_5aX%AL`3Phu)Gcjo0D)LCCHw$N?* z?AU2g715zlMB3q2^Xp*fHt&xc)plcR83h)kArJZ6>27dL z(|_Wc$DJ2FM67(?|L90uT9#pStX;kPJJL4!s4bRfv|40C#5{=?<_J|9AW?O32Abqa zFq7mx?Y6;62DB~Uq!6=6BEmUhHaZJK0aG>W_~reArbk-6?WX!UAtQsM$oX}Zsv1BO zy#{EaKOT{iu?;0+lekgXMOzkRdOJ0C>6-Ml1Y06$mwQ7x)1;+ZHxXifXM_sa99@yN zQ~*s3WPZ77#V^4;!mWD>8Y&H%U`wz<1}L=Gs%J92`(Oi4KS z1KyF;+8%Ucfv=ciV+jteaQT$9)lKX<*poFn_Q;y!Xgi$ylaxpSg*+2Q4 z*`Pt~bOU>mx;C_S`RUn0Pj}JV#McKBFN*}bOWH0n1O}UyGx@RJE;HT4d&2OAH^b+#BMUP);$N2|3rmyLx!+PU-{7R}%P~0?*?YL6ou#(^(#V3otJog_@Le2^Mxui91 zIKMg7wlyQ}fU{ru?!?q%#-X<7!uj;xXV+nw-GrEo8Kx%*lm1Q1lJ1_Vu9;yYrlh7a zB^G8)$49kxU8aCC7!M|SJV~ZrS*YUI&7Syj=xRTPe0;USgk*>n!lyHVqc3`J^f4_K1jT96WG zs@{Bj*Kb=xqf*{*>tSuW`bgWl;*XfaTlx-I9sCxp_TvU^?@PLgRXnMm*Jtg=;2(>rdUObBHXIU-7`kVdYJprE|@guo!`7p=qd@J@ao*opJdgEtH;I*KVK3Kp@l7?Q8uy9 zM^127&V|Fj7dM^5<+dSb8!6|-_-ECIR()m3PVDo8`P}bt$EIi);v}ic$#WA|SQ02_ zW}*|QBZ_gepXXpF!_*y>T8r#x(_y+;_;?$7d*$$vju+8oQ);^O zE24Tn|F+8eHUbR!ce;nBw8JtHIbEiBko9;Co8^~-UrAKiij`2h_8KH3X|EvjHk&O6 zXKcjb!Q&x12VU5+?n33-DYkiRtG&)@%jV+->h`^XW4+EfA?1O(I5p6?>P7SAEeuPU zfJ>+48s~AlUV`5mGOyv_h5d4{a&VEYShooxXI`4En3Uty!NjstJhW+ihRrVAkA#b0 zy~G7i^0GJLPDO`#a4>3Y6Kp$tRi&5t6gh1nhP{-r!8W5y9k?VD;h{%gi(~L6mnZh=jCUhc8~Rzc-`6uPj^G==OR8Y@@(Xy ztvP$vo-y0H5!&bnzG~%+piKt$oYWE;{Xn{#134p!xY+@=^0xlDLKX9C*jnKC8AAg7 zB2RU%Px$Lk38w2*Ws|=X%66VA-6ZN+OSrq&FC2kQ6D_XC*)>S5ZUsS&rdLU`pz$++ z!kD@S%|I$Na#ZG65vCSc2;kEKj)z@?{PS;sJLfu$A#o9vvO%IGy;>O%XNrCp7pCmb zPxGEeHR>rPDU+5+%2-B^ORcxQ)_s;d)NTolXBbA`+*RKQO|-n{W}218D0tJ*9X3&l zFxt#q@kAD5mOeoa1J@xj8TBUep$TFmTVEb(!{@a+F^pNX4LDNs;Gq$sPG`Ci;$(xR z0*3P3anfQ{Wta0|8k*awNy7^I#nepkC3zs?9zWWvwp0WY{yC-Jk9aWDxQWY|Un?gH< zn<@jwW_PA~6`fA>%evv7#j(o?3Fb$?1@1>x&c1t4?Y8gWZx2eHe9~Q@TNJw)v$4d- zP<40UWA}OHOMY6e9sohq>|4sIxjGa^` zK6&xgUKkds)WUfd)Ie?7xK`zAl}R5~$ffZbblIaN3uh>H{gw^I#e!6^^SEhR(uY)^ z_C-9E7LMsVO&o#7X-~V^LmW>g3v|K4*L87V%!N}KKn;ZNz@4JS)zpWj;4JKE#CIRV zyDRk?S8SUqU7(EzlU6Pwcl`vozk{x-hzWlM1|JPWlFj^hQh`L?uZDbz_h+$>Vul#; z<6l4JqgUt;HNI1l@)}jN`_Y{e-5VS}nl$|!$T3Mk58nu_KIgNse_ewR2D-n&kE(X# zl00Ly`aLaU|6%&ocL!7qmNU5-vODiH7Jq!a)%k?!$Xh1@TPGSw?)I(Cgv~lAc0tbh zZomwm74zf67D0(l^c-D~B$Wj8^*}>hFpiJkG&AxyEPEek*#34F>dqW)UBVC!EpZ8N zIu#Htixd}8_^_;Zo+HjL{LP5Vq!@TI5*KVYo}eUtKi)?#n4T|BmHEgia+xMmvx0yB z1f?&`b?;sO*~ltBym@yOzk36|hi)+I;r^Cq33U%$>o^~NKh4{9ADwI8{RAa;$M~d~ zW6QPwzRo+#ljc}~ZBR^fyEl8>o3ExT4zlB6mlJZB z3vPN-eDz}O))vMl6vSyz*!r@#)WFlVoxt4HWx4LOL~$ul^2#PD4eaVvZn3Z1K=DR_ zgp2ih;8c6nH+Zv7of{4s=%@M)-{&M!-gOcbT#g`)mJ$?HWU+lrzPH;1B3*<_?Cs-< z6%UW=2oY2}-G|Im6Y-4AaNw3`caUkPNkv+YSdx&`LxP)QDNXWm^HBDeG%CSC?xw2Z zrMN*ccc0;9f7_B;F|?qW3ex45tC@o)&y0%!EJ|l)oNI)BHSqYg0-Vnau+c0Ur@K$s+ejCwLti*i`BZ&6~tt z*@8XU^D#Lyqpi!g$D+WOORJ(68>a-&mlSx5LJ9bO#iz>hM50$w?nSM)?h7YTbDds? zH0jj4nDw8BbB82&JVK4X?MN0|n*7X|i%y#v949!^6w6T$r^{>xwuyxUY$!x}mpn52+5Jo>`Z!XjP&C8Uq8*u3WJN5e10 zXGNQG1}=wzi~$=wDvvJ$H6M`lh?y&{Vx0}-)qYtg=6J``A!&4*XUS4Bvb{QRCrzTp z__ktX%&~PCy{yCBW(Ta9W4i_>;w*AhBN3^EwlQ)qMpr{9@&S)$JUtuMWVS>><|h2! z=tmj&y)^Hc4Enjx6dhedn&8at_X9#r(ClC2J^79{U*l$2NdeRRPQes6wlw2amju~O1r*x z{}euB=L9I|pIiZchsdt*rr%J{D=74@Rr-4vebQPfEy8r^NT0;r_8X&xJ_w}03!g;~KZmIn z^g1~fq%>{Ns6^8$ei{@weKp~kj&-A>`Kby)0{o(nS z&YxW$HK6M-3Pc`hQuJDlU(WCE9y&-StM;xC6irO}*UPKDHY-0bT|hjePEhAp6IEF84T8T@4!M0y`mCr`-vFy{wmx))1*o50;nf%uMg|Hc` z%89!x`vIYJZXqKgqndE#X3ui3e7yIR+sk}sQ~N&!_6uve0uwq`Mz|RFo#!ujhtH?! zQ#6Hl`yY3tSXTuM2VUmzR7`GGbq{V*=94!qjGMmj4k7VgsVEly68bMhYRaSh5P=7i15y256o$P9x|1W1;d8|K2AibnF5+?uBus+Mr`^Ik z%+i=6aKeG%*gl?SH8RS+<(O~eesNM1Xmy>$b83<;J=>*Ud6se27G1q;86HMcIbtlo zdLQ=gC+e#yBK%K3aeA4ZgLN~FAE%UmCyJ36@LtqXzH5oM@FjxkAzC5uKycQ=K0qHE zcwuaUrz&KogfPLV^Ki`(Qc6WK&M)O2=$uaw5`$3ee&Z zJ;MwMe$x$~cwzIr!=7C@h5CoxTaNj<`wS$Q-wcG#GalMJ<@tJi&(J1G?p~+u%s0~x zjyrU~=?qMowS$ar7D)*kg+v%?F4nKS>bM!n+j=e{&jP0*~2QF{N1qv`u zqwZ#xw$Eb;u|!0Fywby!r645?rs$0va9jhZ|0}>Kldk6N;W(wz1p+LP9+)I=97GDD z$fEAFCdYf4heu41SAV{ev|lb!2S+skn$cLZuc=1r7XlG6LwV8}!5;pw*@ z26az6c?06UoB5byc4>K;M4|VWb~}VA54t?V%t|5_aojL~;fxIcjW7M8xY#6_kbqlJ`rMOYjzu zV@{YPpm*$G>HyVszF8>N>s(fvwgU~T#PsAvx*(~#U63h~p*QBDYgqjFt9KHTII^}e<^(6ZnMhY3ddt{E zILBm$o!^|R5O))1vRQvOed|OPy;e^z^IXW^a^;&gL)@_Unl7ot@+>~Z*{IN%WfG(3 zuF)3f&dLDO@c28vv_IZDE~m+@KX-Nk4O*s?%#T-l8AazhKWjzls+q@x38h(PD05ggObJd`mrn^4$C@S&wb!xA9)-%9Py^Ce z^OY?fm_-RAm}i+-Q-p9>}IKkvFo_b%8iP90GcD9g3;C>oa1v4h`Gk92B}g>8 zaM>DDS&iY^;*90!;N?3MLukTAe!BZ;3y;2dO}Udx*{^TBU@JcU(RAy5t=MyCar+9Q z^cm+L8Os=V{FWOmjFozwD8}dQYsePDq}Ev`3ybmM-|E;oPkmsP-qvp07AbqQxQa=* zzh@KCT=um^H)KSO#po`M-pGwkKX27fy$&(S*h~t}=_#6FX7!&g_2<;@v?t1`SqAvm zO^dHCVw-30NWQi67-RjU$<_U_kR+>9IS@4-eEuGdrGUEYpLtfKOXwq!eZ_!H5ld)b8X5c(m@~csIp53NS z-|f0C$#sKvq-+HgSuIjG(X$kdB})F_eEp6`=1T5z*#LdaScAlvMXdjnyvNuLB@Z6D zg0qMox+fNP!4-xZ+0gROQY~t> zSZQW3Qz`&YcUxhl(&jxKw8HXQBx%O3Km(=>2vMe>Z;>E$ar#Q&670(l|Ix6bZt~#vZ zAaV?DNo}eD)%u*r;Cqq;YO|g0X+pxf@isphN1n#hy=b#pmc3ONyWkdXOMT;O%^?`pHg39=NlzFJ-oaVI%MG^iNH?G`)Lrf1+@+h>H(lBeZ=ICpw56ZDfbqz6KN{@L z)Huk29RspiPn@*7CU`k60h?QVxllgdF?-I1r*kWGyYicix5FHxRVA0)g>P^kJ0;yZ z-<~eo|8o1Zg-#ttoFK<~SW|JS=Dz#pzNBRFC) z-=2TDF{AU5z_K@~ZfVyIzv+YfdxNi!nUC$`VB%^sGdL&TzI149zF8o7`jU_YT{je( z6{g$SwoplF%8+Vu%l#%4C5|=T3*P|W3fPjfD5(CR?Y?_*a|r#hc2&Q44AUN77XFrh z2nxS~+z-+P{xMP;r#H`Iq#Gu9<&gvq8sr8_RTFB!=ytDsMTTxx8cvT$$t7{4%tu@G zlUKS4hP&?yD1Sn}0TOG>fSVS3%XcgdDTx>HzSR9$-!YW9SMgr7Tv(>J+)t?_8v;-g zyz(nk+s2;FDA(@IS@p{kk%Y_QNy%xiD2u_E_UyBB18Wn!(%(#HWEL2(OZ(wOm^MIl zD4+S8-h`_OgC(M8oFiV@V5?Y7IAaM6pd+{jm0$qn#3EHgo+dbLeS8Q=*y0GE151i>V!H zsKd$+|E*u(f$oCdu;U`w()%$9Uk5;h#dSaWtH@R_qx_7DDq4hIl5RSAqfXp zIRRb4v$R0l-|*R!dFZR_ftY@fHUWKTM=GPKAc-Ww*eA}g3gs&#iDFwy^V3#$oy%O4 zZDJ$fPl?Fe^>iGKfo`IDHLnP)^)`Ifn$3M@_+I`uc`uUsytHSb7qyvN)AALg^2!(1 zGIG>Pmy>CYx3`O=QRxqj!OQGL8WQLh9Cw1=_n9&Z+!=++399{Te;FB%NF7x2=5lcDYFC6U)C*#d_jr2@Wdh zvQe(mb}!BNX0bGKOD)g%j^XU%W$kYIhn$ffrtEIA_1e}_2N?R9iX{k!mTvRgu6Y}# znwIlBlDo|DZ1hw1)ua1l?OHywzjz{bqp5`9G7nGcLOQ0m9=(`yHJc5}OR3F!N&ou^ zf;p%-A-!|lLLTNxSSsNigyUIi9pDy{3c~vq2=A;tOVm1Yo^MTX z`970~U=4i_k(C~n!Lz;7E!Rw9kb$;}HzZUjkKE$s5yN_Vto_VBGmLe=JH#JqXu&b~ z3hSe`a=#4TPoFrG27b}t9y)$(aNN?WA5Ne9Ez3<3JXyq+*FA%UH#t~k@JJO^5nYjo zzHj+6`EgEsiF%fMg06$20?Pz%SiGO1B#b?4=UT=zt7x(L4{>2x$LBp)JpRc|*&EV2-i>$3dc z&KTVIUYoQv{fZR}b&1lEgPy*izXASRH|{DD=ajL8ElL`QCd3LTBQq*?NYVv<`@ z4e?m00{iOVWij$+GZ6i|Ln6pz)UDC+w5^@ln9^Xa+f`8qYj&oK89~ zN4|N@O8b=?i<}W(o)JR)8%6#d>h*8Ltp1OnUjJR*AHw?g(5?Wj=@;sCB{K%lk!$)8 z+ci!CzT*5(z|t={eO)^n&42O0%E*Vg^P(gKf6^}ui z3a{X{(4FuCH#LvuX`WPCa^GPurL?KVe!7z$y5_eS0k*!!HU|QsAB*mDxYXD<@;!)S z?LU<*i%XXAE|@QH9Gfq6O}q&ts>mNwFk@pHOy9pOv%t|ZEH6R!MRuCgf&;r2`FVwQC_DAio}m@aVWnra>ZvaEfj(dw#Kr1!rchTJYe> zprD4p*-u1rdfsUAqNRX(&AP8q?qTQ`Ok0-Ij)&{m>f=K*?vKS0&NHZO5P4X`9*Eme z=<&a0{IE>1Z5RPJ#GcNnY!&a~^z!>`he~9VKTjeglgqw-st33Qs3QpAv5mEf(~GGB zaDF%gvGTm152(Q>{4`VSdam}S^+`9&Yx)G%6~4hs2aiz+vYxPOmFwTG80W|lASwJ- z!ba`#P+jY56dI)8nZUQ27>#&R8dY&jyYZ#K-^Sr`YR|W}TzXbDJiUp$PVs7q^Ym~R=5;9;Unc5mLyYYhb8^z3 z-?L1%KWVg4*hk7tc&<8OeQ;mJW#h-~$9JX(9cyy)e_Cwo?F(0Z<>WrLI4K~aeK2O< zNw3aP>sB43`FQ!k@Q~xtH^=yN;BQ)4Rx)E1{2F6tNJ0oMC?7Y3v4yaS_RxOH^+QX% z3wdKF_dNs|asWp)CJJbL$jLVJCP+NV>H=_7`+=A*JAk7Em|NpZdQbu%RD9#P|0Skd zOyFD9l}*{ z*^r#4Yhx^OYw1CH#LgXcRmDok&E)pvA#F(UTz zFtmH$y&zmrWhS6DF%hdkMwKOu+v?MZT0UdkzEfK7G0}+KK2p4zx(g=n3$|yvjk6<%j8^_qnid3u}oyRSi8CfR^MY=jPeg z_AP9E2**s<3$j3XigYhhyE%EXi}qtmuOHr%YzzqB^M~5@Pru^@qNdwwi|Br;WYvjL z-BKfBQ?(VAADJW(t7OGYvDG$Nb|&nYBOWIUU$)`kPT2iM;^gpHscZN707f6TgeN~? z0&I!Lj9WrYnK@ivfgvt}sggQPPP^F*eB@qqZ?UhSJm7^7E5kXnN`YY4M5fh?#gNWZ z+k0};BT{lwV^~yj4#HBDbTkHGxA8dTkz-#7bAHLoKnr^onM~4vIfPL58TddB5hyxH z4t<=;P(QLS)Gz1400+rOPZ?p+oPfR_2l~3x#tFW>oT5H=(XZgoIYOZ7Alz*wt@3H= zwM3NZiy}3-fgsZ$rfO;fz$ECj2qejSDDTh&VptGEbvVjbPJIQ36cvfS68-YZmn-WX zHqs*i)2f+=>2z64f#{z2m2+QlY~42MaM@_2^OTq)&53?N?DaMY+!C3|-w3 z&?&14%V6H5P3t-hRJrnElxhkzWIx{AQ!rT;m`Z&F9_n{6dqUdqbG^ku=1rLF07jVp z0Oc|?)3_H$FS4RQoo0d|p<@9Nnc0vVIHWE@Yn0@s#ib}|f#d9Hph?10sa@cdcf~|O zCL(sohZ**YwL%o0(h>VttoHT*@R}e0Drmx;QSv==y zH~n}BF?->uw0O?mOFP|ly1D4CI-Llf-JR=$Ati*-hv|WRs?#i#Ji=~@&WY$1^)-D2 zySEn4U!SFaI!yO+?K(C4aoTxm)*gMec^R97)3V8>Mc)?w8o#Xk8;!Ok@1g+Hl5g1u?R3xAoM z`%PQI3LRTUhVMo`G`%kIhn`&U;Hb<{nrf|3t1?O63(!z*bY7LYJM~if=gCFEuUoFq zj)@yDZpD-N1kx5U=O14cVf&t!*doSdI9HpV*y6ztp%s=@y^5>P;3RmY{viy+8zB&4 zirdQU-K`N6g!b(G1|ZIl>p2;Th=~sNRj~osM)ExKwJsRGxFfaOmk!E-h(@@S_ob{g zmXx%u^eEE^ft)O4!9&ms4^5ru_Q={M6b{ zz&Ou1B+e9IHk`VQbJleLk}W0_;2(ZiQ)?EVM`EQm}$?mC1?TxeKz4S5bm@CGrRWSwSO0exTH6h`%LBZ{vJ2XB#+tT_;VILWVtpH}68g}6nifa^+A3Fw0_36BDPn_`hi8NLKc zpzdgW4JR7a4Si_Nen|C>%;$Nx&ZfU?Y0P@EY-v8)f?QUlG;D@h2OSI`3F2?7V4SIK zyuWp()-Z+Ykr&gaIeQo&lPEuHh_u1DwVSlbu(eCAd9_(Lh*a-W>)xRHAg?U#5b4s@ z`%;o|OEY%UK7Nw-_Gp*G4#`EriRB(Y)t>3hky?YHTsCt1_x`{YG7`33zAY>ToCTz% zy`~B*2+jhR{BnO_W`H%R0Y!vqMsE_S7*9!GnxgnRza}jYe{n4B4%vsLR$I|G$bAgU zCe9ZUE_2QdD`DWEF*2ChZNf51J=IUbr+TLL*Tt)5?`Hl0rKM4{n#VX3l_#xISNbQR z`KBRGWP`%9Y>XP(3pxf@d&Q!JBT*8B`wD&A_EpgP*8bQM7*4d+(m+e-7+wWBT+P$H zNpqW|@fh9VdzC`ZgG{qBM-cTY)5cxMbujWW%QTj=b4RERe%gZ&3AO@az!qR%6}iOc zr)h|=6@l0(SQwXde!mnZ^prG~%4QM-ov;oMULL~l4 zF|s?2=q_fdZ6ZC-jWrl=}hRi4mb~GO^}+k z0d~;9oEnhVpZ_z;3lIwZGyIOSn)UPBaK~-#WU#6% z_J)HWp36mhz}1K1c>akraa~OddxvBhN&777`{s8ws!*TcLtF1dTSQl8*7Jn~Tkpr% zGa7EptfFqyw%$kKO>Ktp7_5kgi5RRcHI0=*jEit^S-f2PP)GX@<1q@TH655)QQeZ3 zk+8EB&cAw&zKFUm&YNXRjY{JQVFg$2kNkb76}+Y=F7?(AtV`T3QitSsEccX=W}XdR zeCZK3aGyEKprJf@bQ5>L@_|W=o3O0U8r&mrH8KeE)Y1L5cTCSJoTpl(}0Nn?u3&k21qzdROs^Rh}gCX5TO)QuIWAYN@C4L}FIOy{TIQ zwdaM)l10(U)zDnsu_|H9?lDP|egAq;D=05MajW^pjav}jEYT8~OSSY_)8GHY7Z`XO z{){?=vdhlV(B0KfQuZ09Rp<3t+u!8b8(C>q7Gb`^r<_mgG0jUb%CVR9jm$*w7{0n8 zepU9lSyym`^frkQulH*WX0A4{5*mCZ9T;r#)`OHp=<931>Na_%%hvjpuwQeqln zNnj8IQIj?QnJEaGZ=LUu=rm=WC>Yg-?_TZH)s=9BcXil(`crruW<^f_VHB z^g7XN|Mi~yZ;-4j5bzqa0%ilh zGr6uY!2dZwX#*th{t5*CJ+wS-uHRU0RM#B1YxtC#>*|{QDf{w2A(YpZ)3nvq{Tvkaio6ceBUwJQ#-8b|Kskg!=hUE z_D=|ifP{p!bjQ#opp?h}A}!tBEe#4tDo6_`D&5^3(#X&)Al=>k9&qn{_CEW(=e@4; zJAb{`1v9hOta;X2Gta8ey1)1R-kCJKwoc=szN7NidG8#_p`Z8FdGlA#jIrso7JN<&>y0<=_yYD=|wGJG5yh7JEm^WnS7#-~}fwrs5jgn|-2+T&6(@i1Lm$YaK z%~%PXt7`@+v7)wY6boja4}dx&?I!}Hv9UG+m zBEzYRO;CvBut3ji5kBg!2;5djrj@~K9d~pD-zMyog=tUTpDIn}Az@I9(p7Od zIWI>mc@;R0gSnN;@S5xWFw)8d-?L-$6USVcx?!5M^p@wcUwponAW6NYyTj)^7AR7- zl^FVC2Bbet9O#ah?pKX_l^t%Q3dcHyos{IE9$$T0!9S30FW9b)9trfavId!|#1;{r zAX9ZsXF_vLq%G1yDyre@w>pZ0y0XMp|CqkF7@L*hHnAAR{C@Y(Gz~D-l`1{T)pblQ z49^5KQkJW`VQDiL;~E_D_a%L+dAF6RJ{plX_4T6JvTQ6y*e7fnrW4naz;^FZ!O8P$ z6y0y)C1!gvoK6>xOMaTyH9wE9+qUw_P*Z{<0@HxlDhfW1KnOr2ia4mT{M5#2K$e*> zdNCIImliogeA@D_*32`X=E%tbL^52qy4x?bas!cGZ)XbT3UhB@EhRjE*LDxl@m()` zjm|W0&4Wo^h>Ay$kbO*HKrwciEE`+)RzvoS)B8>}XRS{SHXB(#&uoK8)yCwcp%LWT zd~Dx}Mm`5QZ*dFaIrGI}VFQr2RViV4bj!U0)}+5~zH&tEn($_be9@|JHvP(-Hk@LLb-|WEVpUvX_aBOiw|OSgV;!v)9oM>*ro+3>TX&sLy{3s~ z`K{_7j*CioE$(%;Nk^D;e(1H6RbhMEF_bGp*=8b3?(nirj;}o%MIop-;@)w|36T)Y zx#(_KWL9i-?|q$xliJ*)+`%P$u^yA4z;HSad6N{rMSH)bHiz&^tMDCW-sJq;4bRQY z(bYW);dkTfk_vEMz zZ@x$`2sz>KR>_E!3n8Fne7jwvPl=Ep7u*2f!vUUy8ko{3!AJiX&BRD)+Y+Gv<6cCA z`+RW2(rs!4ItNI|TDE@7m};M;>t>X?d+hC_U}maqS_48~d8-dEEV>L*LK_-OCS7Cf zIgeXO3`=bDX^vuG1*7Ncc6_Xm!**K^7<%(N2cM9fSt1L=JWPuCwe0(S2g*-=o-#6K zB0FYeAVXw9Y(v%~=yPD&XO0!Eq*$o;&UQXZiE}(tedIgR(4aDX)+43oJ)?+Db)_1s zX=1E{NrC6|L(I~O!OM(qh1Hth&6O;b{;ba-{&TgVY-^cwN?j)e=R zwg)BEaWW4wcRzkLm+6jSByR@& zEi}w8I*Jk$73v5l8T1}XxJnYfqwN@YuV;bD@-Iha|4O)RCQ6Ti8qJ?<`t#Fa2a=_(}-fr+e;(#OH z;2I~M@2{}!c|!HAkcY@D{9%8b<3@~Rz8EW4C+Y5Ic-QEXEPC{$maxr%{@kDje_loe zDX8RZP^l%a2J!f-pa$$HY(9Mf1gSv+GT*=~PYSaJ$6MhUp$+iF!A|L+4H{H$8rpAj zA?Wqz=h-pgEStF@=6Ngb zy3@QaUFRiTuTMBT^g=-iW$_{<|ag`wAp?NbiCEYhpjX z0}an|eiN6YMVV$18w3Dr?wuwYQunf?HEJ?i)a1rk?9O9qHxSy8yh6pE9PeNkLafYf z9uvuQ>FZR|H;a(x-t?+!-g^vWgKq?;}_GqoU8)miqb66w7OjI z;GqsC-6qau9KBVjj;hr^mJm_YB&Gi2bI!Je(d!=k{KE=!I#uGlJKA>q^?QC@Bzt5D zKgLeiGR+3_FI0Gvy{3zM--UEOMEGKl5Yz!ou>|ORGIAUiaFmk}AzDkKN{hF!qMYuw zI3^(~#NPu(bEpfc_7R_x+ENTih%)mC&7gwAk_Iz{C`2^*Qvh<_Mb)QgR? zl%TJ4iT$9JJ4iYYBArv~e@rX4QLpw#noy|uKNLJx3 zBv+XXtOnED$TE&{r=E+D+JCwfT9B$td-}qzr~g-XzLUowxkQc~1$-nH6ZBK(h*}JP z`*Q3t^dl{>h+n1(yaBPlVChf5(pMOVidGu;w6d@=<`IGpO~UIGPJz9Nr(o9;2|40Q z@?L+TL3YM9@}BTTtyGdhk8^IX!feO_p$%7`u7vt7G@D)~c}H?Dv^>FNy9W_CATlPK zZ3Wrh_#Ylm`!B>_vWn{jDGI?R;$@HQ;tu)<<5OI--O{#zBiAHwVx3fvwUN zY?aJ;`N8VOIuDC~RLUD~Xi;`ERV~C_K?ynK*M8fx_?w&`e15K-+gk|ww18B+i1BIk zAb+oV+)0Lm#~{CBlEGLzi&MA*{yiPdB{i`c>!f*)FL9?i0w{#DhXN?r-D@NKy0?yi zQ5Q!;nA2T>16lC!GX&Uk`OKImHM^nI=rHO?^$$wL&wDE_RwP)~kI(9`rF(f>Wn{aZ zSs+EZI_)lQ9!C|>5b8fGj}<9d3nqVFU`@Nj(_0OdXq) zt=KOS_>Uiv^;1$~B4*qdLI3!eF*!FQ$OOKNBRMxN*o293ZY=nXYnlG9(Zs{^>c?q8 zuFhpqqh{e^smvTyZ`v2fpG@)`iBbv`Y2cvARlbe0>x^hA79XI#OZwX(ovarD*N9I8 zg59eEB}IlaeVf0b4E?gql-4vB{L&qJ4ow+Ov;R?GF~-jy%=(J?k6snm+PyAzxP{Xj zSy|Ee+B$ELePXo|6@|1{4qP|f-YtDdX|QRc5Kt^;(WR4uZt^2*&-3}dA#Fk`=A*B@ zsbRYhxL*MSP}+FfWWlsIt0bkjBa{=&;1q3ct16KgYD0DcY+HFi-U7clMj|w7f#1A1 zDc*@ZkiX%>yUM4}moj=DvM+%hqICk8LeVSKO#gzPsDsNVxO+@Vizq8v>D~~(IUbt& zGg)Q<2jmO^sa*YF^SMQm(%@hRDaN!6aN;l|?i5a>FIK3K{CSv|;btg4L|wBx!8}z! zDs26?)32ONTI*hg#GBsJEbMP?th9ZX@FmAYG`eSrMDnMAw`uW|eb2J{1B`jN`6YvMaPhY@5|&l;QU(!8 z&ejc6knhdeik-l)i^c6TNMVkrD9_cpX_}THHprM}nr3-d;W{P4OP40LWb8XsAuxl2 z2agF;VJ+-En7MdZH#jJnCNQjGaTm#3Z>(aKGJu0>qD~xpshxQ)OQ0um&-?PL*Qkb( z6FB?ce)U&KnAAbv|0RF>d)40m5&m`!I{tkHDkuAYNAAYUam|tdYx^^Qk9G!sEozY(b5+~%pqhI9V z`#ZDb;rm~hgd_)n>qe60tDF> zMh1>L`cB3=dd_-ge=Q^C{Yys3zXNWZ{Otb})1awgLkhx2NAmglkc!l&r9aX?V{lHM zAX>(Jl7Ne(`Elh6MWA_2)7i<9S|$ubJ<@aEj-PsIm&K%Fx~J;-m8SFYsWnx-u}zu& z(~j5_;hBr2UV(D{a|enPX9M1d*lN$8okrngPBuVKvi77K(|VKTO2AFYg6(sb7s7Yg|#t^iDNk z%1Im^6dtuY#q!u>rhFpSbcnV|@F?YBGmNEiUrt^98R&mjn+2U!$R*-_a1lkHt4GMt1&%UNiPb+BWHB3FZ3V z)`vC9Qz=U{{6H`%J3;Y_Qx*nmnnBw*7wie5-59-T?I|tXWclr~k0nSZoYUV;{6#jg z$gDpom@XLY8Q1c5Xr>H|ecKs+*C+6SmyeO5C5pmSOu*us35L=~q~6q&pd|AyV_ zGY_mP$5xVa{CVi;oqiP~IP!~G@fpf`d- z++&B96vkE|>Ykf;VyTeYzKashjP?y>#DcC%50fsHqoqnQVtQPNP7WJl_A?Mg%Kp)i zO+;@AM3Fjwr1=pIqDWPJ*;9IOTWWj-1AgU1Jan>0MA}0{Mz%H5Mx7U(Y$SvEHVVX8 z*i>*gV+^3OGc29tY5EF90!D%fq!eT( zJ=X@dt!wfwSFbD&;-=51g}TDSPIO5#2z(T9PO+ zzv`m#B1M;Io3(=r4%8Au*)c$17ZwOR{dM1#d~@9IFH)LLEX!eQ!PtQc0a9 zxUa)kj}Ws6LH24PQ8NPN?^9sWAtez*!N|Bpl5)D~#SQK)enNy}tYgZdcdW^AC93 z+UQz2Ym-j6p2h+R2z=juWufb;h3-3E)h_*#wb!loBjocy2-Su;Mf;=S#z{W(2weXw z-c0P8e&ciO18N9A2AkBtZbm*}bZe_NQ%iTfxpc?5-`5RN0r`PE1+3E)cAsO|c7|<& zNg7Bab?f2mF=x_GY2aj!ZFfscd-(9@4ta7nOG6j!KII^h;ihq?fe7VL&GS!~G~QZx zr_1y1uP@ngItbRe z{ZXH6viqYbQdGfU-S<1S44KCB(fNu`w`fj}a4sfdmgSY51dtD8WpZ$Phj%_0_!K|t zjcz5>CMOxJvi{s;Ik)w5@1o z5sg8!*wHJzy3GZ3-}bAyBlq2(d|Wvq0@1H2Ao^7pM87(K=+|mVHKk*_Zpry{{Cg6o z53lp;R9dv<>m9aj98(Jt^bfwsE3ff zNCz8O2R0u@FR%^@pvTV@gB}lIjM(WKgir+-huZ31r&yeP6$cYBcrok*={%j+6uxTA zbNs4jQ7w@d_3`BEE$|-cHrmHvou_e<7{NLqhc_0aCv=g7xNG#E518~_xa35+zl7b! z3{2xE;{$EnSe^$DuAL)%**TTEZSi)5?=ijJRaH1vr_i3O$Yb!=FLk?1#G3DM(3w!W z`zAI5_KrjZR>q_WDFsLwC8v1S>TyE#sv`YDLh817LzvWU$K}LutmU_T0*@bnZccS; zZ3_QvgUQc%CIahHMCx|B(N65@#Om3Js(pa17iB@$XtexE`^kH6u7W*}pXL{eOe=*E z_4Q`T!sA*homi3amaVR|8WhnT2%Stux4%Kb1$$I(#y3MITE<;GMZA;X;HT=%FKN;0 zzdaqZq>G2W7qe&PpzLT{oP09OGa|YxSo9(iRj&4JXdy#{VUc({H4%j&d<~00j-gf7a~|+r z9({by!`;-}*lF$oE6iz=zYYt+%T(o5uVAc|1wzAY<3y%iTW>YqUP@ewD6Zm^jppFUBxxiOw1 z)BqDaDMJmKOR{s~4apxiuD0dVPXLjqxZqQ(YMf!ppiy9kA+MVd zk6H6bHW>uwMg=k(sWRVl?&0u}jxh^Njx_Sa#^p>=d2rYmWmg*oue4z}-XV~FzhN+5 zM*^?)0S^PMngj&wyd7ejg~&}lF{C}zX*9^p_m!B^WC`ipp@s{a*S%E_CFRsN{q6gY z)baR!ju1CTAY?OgK35E4N^$FtJzB1}fgSZdG+mT)gp4@?+gxj<6ukOD$xb#cg!x#0 z{5_r&?)v>P&a0#~!(G~z1~U*hdZ}6X zjx6x4(MzFmGXb83{uZmSCyF%?-h?~h-2Gqda%0kB#n`woNKZc#+7CItCEP8L<|_bc z3wR9nw;z4|7Sw@D2vIZ)Ch=2c;Lx8d91UKgf*D;?jd;$@?+QRrUVDHJ2fm^8oygCkW`CsiywqA1MFdd?3 z1)xdS@t{+HLK22NX_PID?2NgDoM~c}Lg0(JTC0brs2PO`1{GSl-RLx-wt|dXB70n3s!CXNwX!j(@;(27m zHx-b&AmD1JCV@8smj*PthWIAfss^dbZXypt75Ei-z{UB8;vuCGjgOMG# zNGMLz*W$G-2coQct`ThJsBL>iS9w5>^D0d2?!hHDWmps+`E9iwu3=Fso7|YTWsv3a z^OHy?XCdhuv}8gaRFtxi<}yDM-SJ=(tSBIAT#O%`x%xIz&?U9Qlt$K?pTT@aMf-d6 z;5<&Hjys1JCz%k3zE26d1O2cC`;weFO(Z$oQR^8SF(==%a|}Td;{5G6ycA!d<8CoZ zK!2A1Nc;0TX7$$@t+6Y%?E?|)5SNR83A_HTxB5QOHEo^#8Uo4*`8yo_PlRyXH>~Ss+5P}=+&8T2e_poVppu!jp^>YOfvKLg$=^WS zpNl&G^JrI|8%p?#cyatD9^|>9g#R<~`s1h6an`dm`zs*i{Y$RIzXx92kiS{2kpP9+ zOnw|tnDK5=W8K>Bj7*8T{SD>Y9}2TVw@fs56Uk~Ov8ER<+z)SxO#_raeBxbuda+d0 zoU+BUYjJ4Il=j}^WPhUBn>@!MvDuq-VaR%YamTK_8D@8MxO*l-ez}w0Z zrL`m*mxwjJd+`^|9&Ph|g0AtiboPYEUc9?*Gs&{;BtIulC&dzZg?dj%c-;55iWVj@ z&S#Yjb;vbzG+p=?Sq@-M{uX(=Jrp{*J!oS_otsq|FHh_sBHrEaaw}-rQa?oIPFBv*hT&`s<-o-;T+8bV=7OzmM zenhhHjHF~UHbO+F-(aRxc`5zpWBTza5SvPn=DX?*gXxF%JcbMLV@guQ4VE_CA8pEG z$*5Ya-uw+?$$XX0hhM-%Vc#@Et+Q;l7HhzkmUrpyFC=<}8HVOsBW$Ul_FmEih zS4YSm6aGgJtK`-OcqVzPKjk%RL5!W(aufA-)QD$$a$k+-^18ZnEwD82pSN5PVg6|7 zF%I!njvu4?@Z_cH&Na!Z)4QvX9`%rX-clt!RW9bJ1Zr6wyQIB@^SR&xYB6CXk3Wog%g-A&)!o~kap953p7UXc9^lu#4~Fs|dubdQjBa`?h|s zY{e+szsW-tOuWuRo&1%DS}`^o$)ebOA*VJ|8+}!Dxo_~qUY2;&hr~IR2YyiN)kZhFr3140 z@ha+&AYfbPfNfQ@$K%5faz>0fkZ-OnOnaHWl6q~X@Mu1LElz4&4+KnsLIqfJ{R0E7 z;*U1+t#zJ{SLso{`YnSn)P<=p{Ym!nEO}pW82mrfImJ^Qu;@>H`GE|z#}Ln4AR^%Y zb)E&vkh3a~%ap;5bPd}uncq|+e%Dc2pp+=VKzuPjH|d1?X)Mr^_*sAydMHStUnb5r zvK!xTnyXxi0Qc*;=7Wr*3JSE=%c3>s{XqT}?sXvv(Gr*ivfCRqP>`$uv?sivQN&oh z1Y~4qFf(P%`E&LhRZWnrHo}D(YS9MRRya606#{YY75P!_XE$f34n6&lh?0+$iv=Lh zofwovu?ZYmYb4eonOEwXYJ5o~M0sLi!LULioBqXW_#<5h=O-?fs3AoBR|#-WAAxvB z8q|b0XUKVNvbW-RL1qJn0x(#=PZVkl2SV#Xav~Nn*S)aR_~BknqOURujq0Y?8H!L1 zM6{a17x<~NY|QTyFYjOH)W76|;^4=GOcg~MJst*8sQQEr_{{erjR_kD!;uSG!)d8& zKf^;eOyM-vO|hbx?*(Z6h&BZG^VQR&b(uNa^zV)sw~`e1Bv)>$(K&!bTQXef;%=~N z#X0KNt2RQchTP_vU}WCd%X@wSq8t2^A9oQgJuu)@Og_a%&3s)en7`ZLWufFYU|r=n z!DIOLp=+_!^9##2j-wwi+%%Ey;E^^-yL~5nh0IhmS6xKVFStZ*7&yj|L z5DX}YXU9FYVOl+xSnloEFVoKoQc-v}P016wD*keU$mFFU_1pcJ(AL_Xj(z9u&(FvhQN4~BMZ4)-tgnna^Gwr9Im@l>)!;(0)iX*e3*VYs=r;1I zbTyT%yngKfBR5F+WG0CnDBaX#U#OwNAuD&SD1b)6g3as)p`iCAkf=ftGr$u!46aO< zNE8pYFuIZOSs&=S;z5sta<=I2w^@id(RV` zI?>8&u8=2xmy1@dEevtA@?}d)p>C`GJFfXQy|qE1w<$vSIdN&=QmN+wtr@`7;6f=O zQ!SlvsJCePVs#9nj)ICby_THsS#H^_bP-LOi^b z7ukQFEx|;pLTlOQchrr_j~AqENtrsSD|&;yd9HiC?O;k6DY&`tDa1;#U1;EW2$vD4 zs2z!#HSHl_Tz3+SPoipq?5O}-4dW;3J^SB?erzp+&J$t_SzQ2I5xaA{G z*JD;QWcJdp@Ro&NZvu7wjrEndVB_&Jy!_oK?Lo{?a17)F$G`?~45R?Zz{lVi_`SQI z>vLc;wVqz(C<~K1tpI>@3^9#}9?HWJ-?NH@^?@W8X5=Yuq)rY2DqNNu74G-D)h~Xj zaHAU3j6+*Vd$WqXQXabKRnxDzgl&H;NHBWVo?w)4oq>6MgrH5HDcR9Cx+w-fh?3S( zRVS~mi9VR=JT)=8SRp@pe^89t$Fe4m&89I-XD^bUBY$gBXP7S7?RAlt^NO3%1;gxg zkuc$D9eCK?>pWF#D1R{=c!VXwtTd;gcQu4|Rz8&}Hhl5JaEi_CYj2mZ9rmyd)1xM~ zW*xNN)Cxad^8npv3*PURu&8l zovR4;^kNaKyYVl|C{|C)DK@YM(uO#QC#W1&e%~+7_odBpDCPRP@$yrq%?Nov3N8DPe=F#DG4m(VWwwSX}7 zw4YK`(p}ZJ5@J-LUJt#xgWZf1AMX7qlv~`8rDA5(kI{*s6EJ=^e6za;w?(>S>~)qu z>V>!5B}!$5i=kvA5PRYvs}LKa3=CEzv{;ejsx)&z=VVy5F9cMJ!K;w84zOng*^g8C|Vd!~xN-wBnk%JJotakrKs?T(}%{b{~6@K>05AczL*MB z^H>q$)c;JuuHRNS%y^c-Eq~OMj`iUJ))F06Bs-x4)ek_$5F&D7UI8kG3aHp)PI1^P zvZ`OltC(VR(bX4)!Kg8r;5C9ON(uXGGy@m%-{P1jo|dy}I`qku)%<6Au(&DXbZ+t!q0eADx^m=4eVkvYCGk#H?M zjLBd9NI|@Jc!l9AXv+7{^uZ-$em#GC>1tH`eDh!OvA+wC{%`QH8z%9;h`}I#hlBqS z?70C^f8{CMHz4ZY@Dv9fOHhYtX6{%N0TCzU&lP+BIp^WNQ8rz3yMHK~xNnqA z|1-C{p*zHm?!|bDPwUS2*M4JTA_TkUyv}>a&gIS32BAN8 zCjc9}4D9mW4z}vs@Vu6TKU2v=7U}(@Da&^)-cCJjamgM!0=95A}Nv zcJ`Xdz3B<=v88wi;3;P(gaDn?=iE-&Cm@(p_}py9YSiV*Y(~s4<#?%U$y>zZ>IC|D ztcDxNNt(XCB!mhE&gnYVdtA07AtQ7;JrL1}O+4z^?ERL>|KUZO*}+x%+BJXj@kM*6 zSt0TeB`TF2N;&?64qdF$IOlY{DMHV$mPfEqol&a_{ta@Pah*T8i+7H|y+9B3AjW0V|xZ)r&O+fAjb(QdUJJ$uKvHA%k_ zIy0lnBw^j2F(FIyw{pL&cPjQnA_b;Xy0X!zEYkWrH)4)d5xQB{5GIX(jF{gcyPq~KC&Fl&JBZ9`ZjgLBc@k!%%HxsoPLhZdg}Z0CATH~tp8-I zZxgrA*zY2&TQ#&+9c~}x1(J0=3t)Qo{Z<79P232G3kV^f9YQpo_QpRR!LoBesNWrG z>xs7X{OJ595d)~NHg42cT?3!AFm~Y8B|LHNdJqKK{2&sxKJ&;V8SOsJgkYc>t8fog z#+wt=A;V|}hKNc;YZJy>Em?J5UHJI=mz0b_Exl5OAq6y*w`by4M#<0zceruP9Ss>j zwJR)Cxwe$5?|cJy6d^*x9iMB}Uztc0lk}zN86=za5KFjQ8Li7>UirP4jl1XRtx6*J zpgQQbIEq0eL+G1f<8rIJE_E`9o{uFuADCDs$EFo_?RlP=Q;&$oJk7IHxG8124&D>R z8>#pL9P<$K;IB)h06h9N@&QjJa;k*AEV+r@)XxI+I3o2tAW-@M1WIE-uCZG(@%pDj zIr%(MNy%cuW|Zx0HJ=B#xcndZ9cJ=K|~a6<@VW> zvklvW6>8hbl70boQS5o~U`^>`vjeXSjW@Qh!%OK^xX?^|g?S@K;2@S*Z8bpk~Yw zHuT$sn!w4Z?_A5Juo8vth0Vna_v%-5>3zop+N)V1>b`yMg6_m@BmVJ?CVRpSIyYpN zT(`6{YLa8tyE9LdQ9)hSFZEXZ+nXGC+Amc9B1@AM1QN&Pv?cnLr~Gtt)yH#BC(Y6WqPnYs>1Ok(Z$_c4r0!Q4 zuidSfmv|P*PHQfD^HUDW=~v^mj~g?;Sy)gt9y&#^ek$lI=vkH=K3eoIb)%?e9&5%Q zVx1xF?kndnaylUO+6azfrLW$!%VpV=za_~^c#?(PAB_3VM70k=mxb*ini{3{5wp)X z&uMiyY}+e!I7m0~2c%mjI?nh7wvo7lKi#~*bI$>P|4@&P3NHquQ z4Vl5N`DT50QRV0+?0ZjpmMZQIEn#?=??tMtrE|7F8oAgsccmXdl8CUqp!DFvW!crGnI|*m+}n|QeTx}<`drO$rl)yMhdXJv6p#=H&k`(b z!qsLIU0*q3hh|uowcb}Q#(-$uqPk;*#3YRsCBd#=H5QP;?8n4oPVi)+LqY?OxL9LV_y5dIILYf4D782Mb^QK`6{0IHM zc#T1XbRo0%lNkN5Z`!>rIT#;Okdlo*8{=F+@m9iCLIN9o)G;SY!j_m?V*9OV$n4h; zsSj&APpJUiY%dU`_Y0J8RpC>{UmDhzda-tr602fm?xBssd1=K<@c-K;Z>(^hr8vdj% zn2qNmYGYDq=L=h*2$Z}Uc(O;`(|i>zZ-BwIH*9Ve4t^R9DETz~xCN6z%3{3X`2_D_Y-G9VdirvGPMcRU9X5H` zMMPVj^?LqsMS5Y%(#lvd@tI7^8qeWgG^{z1=uEufBFs}ij@NX3XD{@o@Xpx9rA_}Hip7|v3cdEqN$k`& zNs`A!OFEG0z5KVUC#p*O=kQF|!%qHI5)z)85Cw8oW_R#V;;KR(JGGe`kd^OhH;F8b z$3ye>W!N%h^wbBuOt__W>D(v7(pjBm*v~!Xy54ohjm9aJG!y=4FtIy+PtXRJiLBWw zj+m!U8{BmN*^p0m9DOKLTEYb$Ue9Ilo2Cl=EOu*pwoq(hIqo9(5foKDA)2>Mam#a` z(uiyw4uxDlTOZ1YY&$-~;L|rq*2{wDttsO;=xDnCc)UiwIK?!w$BP`P-F560fCuQh zkp?yVbNA2dN*C_iaJR#O*h1}tS;jQJHuC*hM#h)67&26pwd;*NcKE~KjUdSwM)0&q zq_*2LRK&I6thX|`(H>{~B0)jiL7Hz{lO#DBI`7iM<-?G+bA}D8NR4mH#Mf-S8wX0h zx#UV`8J!!hpRkC%oQjY}P#9o*Lw;0MY7P8Deu>2<6hb2%ep8wFlO-hbDHlOzRlLE6 zLgjIPREmE7*TlWk@^9!EERj8L#U{&bYslr~w!Y`#?B zLcD|6@f59plwfFu4Vm?1dEeXdR9@hMT6lALpWsVztkdb6Ak~e1#mc_beMNW|m(xr= z?RuEbw*NLwk{9J{ubhaor)qjimWN7u%I)J9f}s9_n=1DB`{GsA#CiJB{LEBOz5T>P zExjk@noXr@weTlRz32tmvGx-P`~+SR2LAGA=c}SL6FbRA48c`r zpzK0LyK4Q)aVjjMqWLa6)mA}vTwXPHv=gs>(WWHS)2S}CXftm#qgpGGEqAJoFLx(^ z!{>vaYKXbwBj#p30_%@0CiFyJxUk89LWK?82=)7*UzT;xgMTX>&_juF#e{2mR{`0&FxCc6rq5( zHSy*8+T&S#o}4xk6RMD)gOCv=#dGW--2BWmSJ~^RW?2P!GKY63jt2IRxEA2y~N^(8DMt#YynFgN4GCo0GV-47vzqAQ&r@0#(JJI2cs*`hzjx zcmcWDyI+sNhD>?DDD>|w+YFr{qBb`E=jMQ3AFd)iGuzdn0Y zVc)WgEGS7zqIRW95eRrYNBEDuZCw%qCppER_q^z-ktU2hu5H98gN6KZ1~0#T`d-g9 zAVlc!`2@f*P9PauTrNQCF%sDlQ4^Y%6`GCz@!KgV_{_mzVeqvkjhx1nGn{{!s0PgI z@jH-u<4W|b^^aY=k8FEqdicSkCQfAp?u+I9LIxMXISBJoC!I(6e{>TrPph1e<+1YQMa#y`~aNw z&{Jsg=hv*z``)g&qW8VOh!KwS*lVmFT@;-6yuUv00T04k^m?er_7OOj2;NtiJ3iF) z|B9~h|Gh-*{|H^XW*YwsUE}!s%Ks-!hU+)mE|7ZghkZZS-)+18&SZ@3^{k9^9Nlb< z{w0^;y6Z z1qO1j{MY(YCf)}rhP&=n;@ivy-qE;YHLgRf9m--IB1K;A%Ah`*#&FBxh8BqJ_FG;EtqDdfL~FKf8WD*y!c)^1yZa~x`j_(?Q}xNK*dOc~KNU`2Tm&H6 zjQhw+g-utv-n|8~^Az-X^yc&;+DGlw>R#N7OyZn-{iPfOrM8yI^Z?u=GR_~V7$5qY zfp#!m+%gnOFqx~h6URENjiN$4thppwm!QCk%t~N#r^>_Vos@A)Il*`Q3x{%dt4Nui z`Jsj*RmmF7`KL-Xlh#&a2hl``u`tJDJ=nzc@eGx}o$uqiwaDB8aI4GvjL#<1wkSIAAca)F5gFz4E2N2Zforq6 z*SF!&Cl}Y;jIwxD!$Dw$o^Ivry1mad*^|U)afoq^^hD~F4{NeT;$58(G`mt61dTI~Jb$0CUN^mY zM^Vj%Spt)mu)cw92B_YATIvH<&O8c}qLTeOCM~u@hkN4#(zK?V2f6NwA_~b$tGIya{!ZYzYiwT?T z-Pa3z=|DTyCpa<-2=?P=SQ;HKDYFLO^ga#uO?=t`vE>CdR_q-RI4eG6o1aA=3Ca62 zCS`q2QcaQjmyvql(oBJkL=Rk+DRNJL_<}0~`K+%if%{2$`GU1vwPlJa-!pa5H;FZ7=P_0a`1F~jT z^YFqP4_49`ZT1AgAi;r!%vOaHVb-BL#~@pthW2k z)$m7@vm&Q;0pnE0doRR&_8B-MQemmOab4myq%NN%>aG@X73~rf<|l&iFa3U^H&@EVM#Q)S; zuM&D_z=b#(VEm2FZoZn!gUO9n5;(vx+!(Y#Oq1cEpe~a550*BueU0e!`ACUz`@l+> zJVBU`2Pu-?54c(c;cbv*0=V#WH0l|w;B#vHc5$6|YSZ^UYhMjn6 zH{Y3TF;a82`g!mfF3nF3T)ICTsPq4^*Ow|NuWr9}AEyG3znmMJWJSwlPd7=>5_ae6 zyAVC`l;2ye^mV-u<5(NsGc?Z#C|gy%jqGi6*9w3MFUns)_5x#v%hubna3}bGPyPr__qj}+7G1P*T)lOjCk)^BagL~Q5Xn+&hUu%gT^4zXQxZ@UKT%*)YhuQ%SxnmxGZdy4c;e8XQcB(UhRg8g`aE2rMg4R z>kW#=x9CNxm+$8v3esj@gzuWC6libEhcskg@C!3_F_;X0BxQY0P85Xaf38#=M_27nSd?5X2A|Bt(`4vT8r z-v>byB}I@%1VKUthE5d$kpZN;OS-#6kP@V%OF$Zi?rzCJ5r*!NF6sKM!E?_&_naHg zbAR`*@AL4?%-+nbwf5d?fA-9~-!Sii^ah$-{2c8Wb{!PdBoyjCYO49CMD?vJb&q)*_qh4|!sC>W$(y<${>C8VVF$#c!iUcp z-f<{)9Fh(Q_mQ62wsA}Hgk0z@va$_x${fF{L8X(BN>3%6)r%d2qZ z2%wDqCF~iZwSN1R6<~29j{zp<@$2hj-Hrhm7ngkkswH+RU%27rHabtZ4)~G0lGKIVw*I}6PF??+qXqGoF*|b)Q)-R ziOo83d76~3x~0<-KWg_TU-NbsXgaKxW_iT79Q~dke{#2Sz!6((DC~{n{+pUTkEtsc z9`9+qtf|6!j4V&c(8{E&aqZ8%6%x7M$iEAU$qU6FAY@A|eujf*UA!6+vvCZxZThYH z2rAZzJu!L3FW6*+HibC^T1lbPe$un;j>d49*D$B9iAki8maLu(Lv3464!=jIOT2`unTo@ zhcn?@>T?QQICpzFG#%&g#sEicqH;PH@RT_Le~k-=6-;XL%Jx+Y^%f}@W)2xwyNbH& zM6fWJl;HioILs$f<|;|y8p?uTZG4m=`HVf6#o;6Dsh6gtY_&sB$+SVv$dh-mw5wM` zz}=%(sU&gDZLHvu7&;#2V>qEo5^bilubpZt3%e00ZVOcPix*o8R3b)bqc%Cjgju(lNNMSM|j?FvOsvM96M`V7ETZNO#ff#?YnTvy5uNMbWy6t~+NIEHR~7g= zuU1_I8kOt6Y(prc0^>CMm|G=8r2Wvj{ZN$@o5vKNLrJ|mzo?>&nT$8@>iBnuhkL#n zL*Z7#mJgLO(-CYD>bJO(Bw9*RReKq-O$b?4^6xDsml=gVRX4sr(*dW}{Z;gQPM>VNbp!$esnBjI$bG5T>i$&y1dZR~?48QI6%`VEVmNNSd-&A5`QsEB67brcTjMwE+sF6+yYOR_;=-GN>4ogekcseVxR`KN*X)T*=k z)~LJZdj0CgNl?g=9az!2*EDg!Fl$h=xhEjzhHF1{2Nk|q|Je5ked0j%TZjEr=9?vl zsp#}%gu7PMY2n7n?X5D0DK(|kF%q@k>d`*%mx$UT^c!r%WT>pu=^>-BRuVee)@bDm< z$gy1_guk=OAY90?{Rf2b4+!R8$M(OW;z1xlI{RzC{Vr66fIQOwxZi$_?UF9|mxId1 z^T(O?A3!gje-wnOt5}j(Asx_wAarbuKOX%pN|@QY?Jd+J)X6mrRPwv=7r37Td(&{r z4Mn37fy_6Pj)rSj4&xLCH`=Pz&l406k94TDBDf?tc`^s03%D+-iuxYnTqJzS92{<& zTd;VSJGZjFT;Vx>dWM_nsTX1(d1BAKf5>@!QD|_dNUxoz2h;QXc)<8#Ypj4v=zLzP z;rsxjW{Ft(>xn*B!c27h{iOW{EB6caYV@^Yp9qQeYC^$zVySw&6SX$sVmbaAmX>_U z_(nuAeT?e`%aF^7)$UxK5Q(eH;Z+Cu&n8lR$Mx&QOl;;{0Zr6IInl_VXO0p3X2+nU6r6Xsf-#RwT&q&oe#M~xM zPSgvim8;InH8)MCUUj7J4%Yc>WdiA&g_*;9zjAaNr$b;*#aZ|Xg}{m2jOmWMN2N7W zAjYVaRtj9!j78yf(TqgF% z?d(12brof-7O<42naEEh(I=7G`J4~cu(WHiB`{nwua!# zM>Wo+3jNn7<%igL!NDb7md)*K$*hlf43H@Z>gByW5zCabw`7OI=W2rAcXu8?S-ACd z+@d75>+vHxZ02xxNlLU z#C;{^*c5$%g`@PUCz9AuLjW>UFKxJ{aIc3UXFle{jszlJ19UtdQaXecMs}u zP>;gOXpF=la6nxJ4ydXN&Er*FA)pynrVP~E8_fwXb5?Za@;{RraSWm?ay{jE6PuUS zP6F;6GUT8#KNsPE73PN~f0YM4nV=}h&q0;)WaQ;Y83w=O6A#|a$j*QTsx8(7A7k_6 z@zLOnI7VP2D%n2%)xlgpzig)P&MR!E=jm~;0(|gZ@{E<*%EOi-OOxXt(UDK*r6{MGWV3Y7lre(3Hiac3{`OmHP9PE6JMjm_d~bh3{m6& z1m$D+7Qv1dlSr!LCy)e%B(D)iD!LnBvXRFJItq0Dingh^C@`GfS zwAh^ByfRMm{VQ>pM_9eu!}33_Zo}`$b>FbLQABBYOnb%>L3LsPvMFYK;|@pBCNWoJ zI$`E^YPkAV5(kFCPt4DrI4G$$&oV!^3Sj?Sce8yv_v*WlsFSouV=~cr@PPCfe{3}k zD-`F{H^PwuzKw_O(X6LuP*`?~byf;T9jtT-pEp|VX`Nvm6{3)ZYljufjceza2m?{5 z49m|K_-=m^d9ays!1;S3g}_IyLFSE8w>UE^xPV9~o$Idd8h^V*@dKM9c9rBQ#Fu>q z_(4-}sqcy--#!rn;u~i3tbP>p^|0SoiQC&RzW4Q_J|b51EzIkf2XA#}hZN zb0&r6Nt9>CA8Jh4ySR;`($$HC(Lpt9iCfdMyk+={S_3cm+ve6oSPG^JQ?zztqtEWeiM9S z+j0_jM_Ul9O?iuMr%@$?_If~KxxU8s4*T&wZ4!kZ|Kp+uoc>?q7`R?lOPkJ2Cd3_O zJc3QAe>GBE%_p<4u9+g3?kV=$Iy2Nc@GWi3Hrhiwu&t#d!)|>%(g^GMfsZ3PYH98i zRf-wW<(}2jMhUkr&1p%&DL?pfTTDRHs?2xR3M&pSNtT7RD|(A(OeVyx--?@O?9;>t zS{v~YD@SefCXJeLy|C6a9-QcIOPgw&HvtM(IW`zOjnAht?D|QvCr{i3l7slhjz`nc zjn;K_)z?MR(XZp^&tt#B<`;ePCgx5Gnl5X1KbZ`cnla04T1zRzO*OoM6kuxhQxxhu z>2EF$9x_^mEn8iFtfxh%IGSeaXp;G1_~?m}@|Kr<#Vc9&!bsDrU^g?jNtrPZOI}Lh z(yfl_x4T7G{a&)--cJnQ+|~3s;{Kbsb@&5q=!L3;E;MwYIlCXhSC6L7P54Sy zd2x2%2-56ER&y@O+2i({99zUDD^{_1iXMr>#C6&^6zFwQYliKZs_2|A(JOI}@WtJ1 z1>PT&Z@j(7f!bM7JtE=dE;Z7|1`{c-rmKP}XI5sg%fg!QQ>WwRs~hCrn=Y`M#7dSJx^(S5v5^eL%toFjT{VhIvhGZ4)T(X9S_jqKB}b|HDWzCdEV9G zF*{+%s7PH`zCpBr-dYQI1F!uP{=h=JJLF8a7J~Ik&3yfP#u)ea{L4U>~E=>mQBU)yHR3c?U`dZOJ}FKqMnT&PSG0#uw#n=z!>u zDjB6~lF{^!o#O=`)=txp1kc!~lz6E3k2}P8X3`Qqbz`;&!WigVHA`G=cyzF~ix+$j zU-a&z+JI}z)T^IQNtVIqMiLr*;KT`WPiPl1^JUAk9vy^T`k z_~n52J_2~}9{}(D?`5o>Ij-7C2*+->(yn($Htcamsj=J8LGhR$k2oh@CI#d!k~H3i zPkW=~ypDaQC?WyyEtHJ+QT|=2_jQ5EW&Gt`oM#q+6PbE}kApuNS)t36GTUaS8mL4* zP%R&XkZqjk4{6?Su1$UU;RMb*_v{gRl+Vt*RaJ9#h}{&O^F>>tuQ8Cp2{p=%=^NN4i(cz6s^VJi(|ej(L(kk{ybeG4`FO#cb8T$DH{zCHG0??d%qv|VU>*#;$EKpg=3=h@RoE+7Z z$_qVD|B;3DQ@Zx!l`8CO6on1}Rt4ADwC{t65u$|wOG(ofJvc_*klE@O?Mx?>88cbI zrYDYB>p3v!L%K-JcgBCY!I)Hf6(e8QJ%~uHB*e>0H~}P+QCM7VVl&ezZGr#0e-n5YNw2KFPF*ThkIY? z?yPhVWgUdBhb!_A{B{+6`&$E-)mb@hQdp4%)NJFVBGEd(JnitywAHM6687{AbzrGase?ijN*1Uke#=UW-@2+3`gQ_xB+8_$ZBeEOBu{0^Xe@e?AJ5LzC z_277u5z|tmfYgn4MksuX5mS0?E{?W#H4;WoKhuHtINrxGME>~E%jO7Fm~=BiQ|+@` zlj(=Gw5P<=qo9f7YVfdQEPlw^=qlMvHtlYe-;9{-2%$Yak!rq>O8x;CQ(Oq)w2=<- zs$2eXtaP_-A?@>XAg5#liI;!!{Qn2s%gjm4eamu65GEY*rlBEl7VJyXl!8f7YGLe`QNbj*tmYjmwsoT zv4NaRB)-J;FUVAvJI&5k%l@D3GsypjwZ{fxQ<1DVU>^7TxFAR|>c0Uo|28hOe=;sE zo{Pu5ea*(_eYX)7J+S>}LfZb%^bt3-X}nP5kG*Flhd|e> zz%_;SO*b|rMkiDD*~l9#;!qe>-d*fo?rvoK=>C!#>p^1lW|8gAcF@ujiDss>qE1Jz zjl!#}mS@K6jp`QQhHv{k1}V9wah|n-CP|8;;HCU8eUy)ChP@AI!QS{PnG=e&I6yyJ zB+VPX%b+%zgo8_m1C_c$@BNNYP?!JZqe5=p3a8KW2@mbCx3BYjUOP0In|Ued{>dfa zlSOnN@LtCy>l?t7>}WxcsHLI9B<$P$($ag+O5J=xaxUFIY>8!;t>k%<9gI?r zC;S=9CP4s=s`HA>%&z~Foi8dg5%^T9oNw^*EKC09xM=`A{Yu$E z&&wceAQJ2o64TfDw$$DXEPk&} zsz1E>6_~4ZX?Oy&EAZ|~W!hf5fi@k0Ix!f>iHn2Qma<>d-EU&ewkc3%bYlwCll@K( zzU~t@a+0HE&BomJQ;?G<2ku-QfIhFcs60NAx)>wqy3weYI6fFJ>hyw^gh#lBzcrjL z#;|}ehYJrYYsvU6Y9;>7*{Mk=W8pyw^}cxzxxR&7m)u2+)hD&P6Fp0m%)^mJb9(oJkzIbLx){u-z5J%L3@30XInKI#G?Acv(t~opy|@wZvF2$K*kHd!k<6>e3j8vasUMRRAs8%w3a54B_ma_h}! zsrU%InYa)m{gv4lci-W<4;~p;krda0*b4waWws5sk30u%fkyurdV$;W5FL%7j3Dt{ zr+E=yH<#U1Y4r3ACEFV3)zTL()q1`k+Oksy9n7a(vuv@mU(Au9YNX4(v1K|I1!jR6 z?SZ(F*ZSCotT=PjM(`J$_b8k=B%);&1Rg1p>ft(&oQcZQm}2d(<<%1@=gRD1yhJ$j z4lCJn81a=2))ET0C!E_cF;b2_MBQh4=$L#ESi&)n=D^?nczkmkkJKWhL|OTxhCnl+ z_D*?R2YLe-IW6HYuF`9)h83`@ zQzSgxg6{h^bx#Pu`c_0;U%`Ww)Opnhbf>v^%4Y01$qO0GT|bfc++9d29eORu2RTi> zzG?p1(wy(4%sXuDo_iO68C-my%D3>{!Tp8j?PXku^sF-xgiTwymm3O_hI z#Yevh6HhL^_sH-J(MgHx-(BfJp9IXJ@S zO5aacUU4f!O844iTJV<@fj&#+m_W-730W09p!M>1`Wk`Gcu*pBE9*^-^sOvi&2w7R z#W|0!;#cskmc*}69K#~edFPE1Y4K3CR>YsZ;j(Fgcx3Wj#9%L)Sph-##c5Je#p)f9{14IWomolIDVO*y*W1-cAl}M@dnzK%uC$ z323m9d|apG!rduZIe=mDfWOYr?1^UiXU`}f4C`)6>5o4t7Ww(Fie?$1*cxfF!jmy_ zV!FJT7;UuujAHIxgZ)~V4h$f#)Ex;VuS~sn%|aROH6ww~vt>qqq!^K;VhBw5(BM^J z>XtAs{df9hw4Mnr)Xt0FsXDy^GQ>A{&2MocZLs;TVLa#pt)ymYvF?#me0sXrNJzkA z)h3UlE)#~P1f6drl;Z)~VVt00b~8L4D@%2rt&dM^wAqLbD(~7(^SExbJY8x;+Ihe2 z@d^OpA0jH>sT9@lPt0)E-u#%%$dVQf7jdV$ig=z@Nk`ht@%1$=K$XKalrc? zXl)mP*0#rQi8r>wF}N`6x{9sjgX&4nd|(u)*a{@WkZ31wV7ayaQiZBKTWTBXaG8)Y zfTMpO-b163dgMUcZH_+di;PVL*IyF;>PY*uz(s)Z7Pdjwe}!R}7r? z^nlY|<2~TC*9M&S-Y*=npv?T1z@np9!)*qb%gHX%XfdO}7;t1j9|@=3o;S%q-+L37 zBLKV;j8Mk5pyhE!#fiRUfkq&Xg5)FKRk%JM711Y3E}Zf#Bh|XhSYR~@toG8HO_E}H z7sDJ@1SCsvkca7I+s*kpX_Iptbx$F zr&$i$Oy=gV&4wX8$Ph>mvg&%=?dZY1=r^vb$NE1`R*v<*z;jn0qiUIHP;K%EPxk?(T8ZKyh59ok!sv6MqNwo}$Oik@Xu3r@3L!+0S$s>pi& zTJ4=|C<9CCEMg8^hh@%y2|lq*>=hb1Iqg=vY-|}7licAKUcxfzPz)EK-(&%&R{a9u8<=r z_u=p3_@Zk&6tbcuuQ-Y)e3eB6%`mX%4HF~Vbf{Q5wom|8B}X`x(~D0eTcq!KK-7wD zPac!GX=2X^NLqPi*ITsJS@UwN5IEAQZ6CW~V4aL{<*XEh8ImT98mXASS5z27ksai0 z)h`3uesf`Y#j(^uu*g1m7vx>DigWlIBh#!U+b{;7=jNEFB_7*HKDrFS*0W&GXeWLB zGk@?KH-$^eHvdntY(wKXo7O_{;o(O(V>e&{ib`X65uh=C6ND>V^C_peU@+kvMW^DL0LjwS+ z=-{RJu?71MivtfdcCZ8=esTt3No{gkXzy#QREg3w9y3R2eCLO7^d6>+(VAUm1;8sm z?X&xL3SjHHNE0L?_~&W?vdj7F35n_E9)pD7CP`7sWLh{lHGv{{E|!PrfV%)Rope$- z1p-;GhukP|#<0)ZXTNk56IsLNpMy1o&$ZyG7j6%<`IOHt?&=&1yy zRUh=+7mpw54ACAa+?lwj3!Co+UvJ_Oz_|B&&BfAM6|UvvnGgr48(Af9kaIwe5~9+jRIZz4j9fvkRf=9^T!o5$}1~ zsM^%)eWLb83JdrXBm!g6yJcsNkgX-eoueXjR|PfGsc+gr>EqTxFRX39?SV6b`=J=Wk!y3Bz2wzjr}?AT%}!olK!hF&za@#thAE)$aQe10Hx$~Cl77(_;b^CnusDE zEbsGT!Xj<&5(nM-pCySB3?~7iA!4MaZW>~A+%@VvBFW9Ifo&yC0)0-&bT^hz7G>=? zA7Kqah;D5qxEWB{6xs1>QG1WYBw~?Zkmb6y+YQR<*xH#dca6BJEmPk8bboR7$YNl@ z)S6nhf!3-54wJn|?-pIE-Lk8Ovhz6I3U~5Xj|+PzcUUPR+#K{SzW{T$Ra?jWSv5Nv zi8X;5OUu29ysE~qb+Z*B+am`~`($IB=?|RI*#b~@+Be7X*ArE&IRx&!9=9%}7fT@$ zCA}|rN17Y*Es_r8qDzBZ^rW>3n%W1|OHM~ns$JgIuUWh%HJYAIhkRRIH6gfDZr8b1 zEvPPT1bu(-b+Vb8aZ>R7aEnaOjh*hco-XNyA==&3n-@MTTbn^eQ}@ot#yULt-42Sz z$~8$Vh)xakY{H~NZp0mn^`cefRr}mS*nTCu zV==2s(rPyAF}EsjJ6pV%Q|J3OTelDYiM>%ZQo-jpLjH6ZHn#s$WVgG*Z|_~bXnDaX zJiz0SpQ6vT;vlMrAV9|CX}t;h^Bv*uDs>~RQr=9G9Ccsbm@le)5IMrU*(lc+#SA@6 zLW=cVWM6Eb4cj}9Td+o}5x!hw40j$6GB1_HE@X6?olo%5V~Z6CE+!*0$v*PPc&B}L z!C|(fwDMuF{t*${Mddq`=rEEBgHKA|=IDvIi>~@e3%uUTHqPWb_!!8Z#KNLpjpfvk zYpM9u2{AFewY>91rJb}-l)F5qcFmT4vYE|{-F1_bske&0rf1hsfyNZNPo7uL^~2rt zTI*E|QjE$gxI%mtt*g;$Pq|?z%mMJPR z=!>5QNKZ+5->Yl&p-u1gr%lT|6HjyQ#P zM)n7VE16dFHa@8+jKz=)QmE@}SYovT&4slKbH4x73F>KgZJ8hLv09 z2bTJo?tKoUJ)wQLv~%59GJ5F+0_p|@X(mBV{wi^-3mT9oA`ZRSH@)n8vE?)%pH#pC zfrf31JYxJ+rMv!ya1YPM>(=S>2*+M*LJf#6P1a$6W3Qf-V{iABDjI1W zBPGk4HhHAQB0CcPAZ9Y+^h&=MGHvo!ILOq)xlGXm(RwHuKQDZ5oHgj}242I=d0-e+ z@{!U(d8dFxB{rz6$cEHa`(1@Y_e;COcab|=RC=)s#-g|awA*-9>@>h*9GD{mk8!X= z*qThEFo6-%7CjPY1DsR?6uv?rP&Rn0WxW?@FnZS@R>!LdnC%<9MKFV1BsZL_Z0O{3 z=N*E%#I0wQ`E}H?%-G&BR+Lv+ZTY!0oip~?lrZ6G-p`9dO6A(+3(Mn%p$kWk+UFOz ztJGuks~2Of(SsK)G`J+m=@$fOj}aFEdYVr!LO4B>&Kt06JO6BD>GjkRNUzAr#R4H*F95XKk*=A zoq*kA98>r~EngEDW1)l}xz4CttRVue05UI!GMy3)$*ubo*He)xNW5{X_nR4?h0a4EL2+2$oJ zY>m=)@6X^X61LdZdi11dC0<^ybdxufycDKJ zALb6s+);$Lcm|n9Ws-;m#k2~qeGAH;k6Qz=d<6j6LPO|hma?|me5|qe%XIT+MCyLA zwXa8GHHx-D%tLp23LBk} zoAJmb3Aq{M()|FgkWZ|?eN1|qG|$0)NZt#V@P?Pw8gE&W zo@!uwEOkh*9~M*Exff$JNV=(D*Yodu+EgLsXWg>FPU2o9WIqh=T{7MpYn0${V%zIx zcVb(}L@qv7@a~ujVWM%*|WMfPPkXaH77yhi-U0Yp+f1OTN{7y|EW}sC0{v-h1 zUT+97t|js!MCnbD5$5viXY7gBI}6-7f;`uApYjAIm83iq>o6CmsMC2VX8AfVZ^2IE|v)CIE`6CPBBZ;CCgh3;Q;JJxgEt89QC=6weN;+3ht&wjBI@Qf&Wc%8w#j}TVCmap(q7h zS>4pH#YD2Xw0sPjd_|qc1^w~^n-9!x#b|yAWm(8O?#r3Xt{Tnn9kRp$2bJ6fRPsnr z$xT2dAGBeY6{SxyJY~`SRbax6hP>T$>E(MNhhNlpp%0FeFjzpVYgW?WE-aG22qrjC z9l(9q(8vO3V>w?q8!Bt_mn{C1%98Ser0zs{x5xjtlQJpbV2W)!UEhwalj+Nk{=3!5 zkwKK}-_EA=e{zv%bpD_f(!85C=O8F2N>5jx6(qIp5gsIkU8^jb`Qd1XjaMCW!l?5{ zYvWA=JKnwb`gXhv^vK1>3Zn2s)1Nd?+Ul}@TqH9dU;I?F*tod^tFuOvMev;vbZ&># z881pm?A}*z`&=qF&1yX9O(Q~cGt@*MKO&e}cjZJIJ2E&gM1`Z+e_51Bh9QQUj!dQX z`#}>aBiV>=ujo+6J+cuVsrU?Izj7siWApla;n%yixTR%dHR+PmKW~~7#b5Yn`^F3{ z8bN2N9gN!**^325kN8Hg2^u0MSoR!9o_Hhsn&sE64ik~D)yU8(4ikZL75jII5)~2- z-z6Ind_g*5?8RB^`Y6fzDMzvG9=~5pN?0Q0i~{~g?gsZBriWcqok_^jW=FHCclL7j zG)X*QH{7(?&71JqWkyy6Zb6|5$U_BAbKnTYrE2O7vVhEogi26&IQ$>N7A&}HF%8L%~5$Nv%2Z4k4?3pP~p5Jl2QF$hVP|t7M zFdeJ?eJqdkmp4Ka@g5!v@g8Tc?=M3H&?nviaJZW%X;jo+7|UzFI}>Z{wbPUI-Y7wa zAEE@eJ={tsgVFo_juJO_wj+#CRKalR{EU z&&)vQPXs{7Ut!VzYJ6PC@m(?#|2{l!9O1_e}q;49U=$eVgEBCH)cUufnSf1J4IYAR!I{7^Z<{?0X9bZ1MRb9 z;1!1cpJ!fuTin-RIOY1S+05PNd)7R(OIr{9N=93%WiQ614v!b_3K?2{(0$oiLFHL> z0#CF@asWjI6Wfs-KzelwX-mt7^SKR6&&o40S8^i@M9SLUz{-WBpn2f7|J4o_uG8ag z+=~4fMDk|+S<{5a`6h+KW7bJz(gXQSW)02cs8*$i2TbFN15b1B!nCaq?tR~Qkb*k8 zz1D>jk`eQevi8oQ%5NmV11iwSv`+A~2OD$Jg;_buw!2N_nUHcxtmp2h3mYLz#@)#P zhq5<1#joShyJ5B0(J=L?ts(c}j1^}BPlWGy^(P`3&(8}j3ek3h_ghDI&h_G}thw|? zYEiu~uN@Xha@PvYP#uz4(QTb+oQ$~PUho~BB&q9tnm~l?sk&&G120(5H*jYSTVST) zbn0=9ia;u=n`Nsc?5`XsvsEGe&MLCQcEEuW+^?_P_y#gmA$G_NRmq5gp~ZJ=#rn7! z@^x+vvB{RU`m2oj(pDNv)&rX!`45vqxJ4fwz38jyIh(V~)2fO^a-gCiy_X&rcQ_TG2CdQ zWpi26LEMqo*qyMtNjGc?Xiy7Hf*fz$Y*FSYqo%uA*DqO6m4F2`c-QTur2 zzmR$h@Z}ax;aL=6Q<+h zG2;>9*KcJztgEeHxOe?d_-Ot^il&jEik~3jsTiTB-n%0Ey={k*c=jdro$i}Qv&Y{^ z7?V5GQl5J!sN)=T{Ul8hjn}1eeZ6!_rs*< z<=4I&T@}TJ^~ZkNOxOOYJu~#2qv6@;m{eP~=lKVpwaTMp_wU~g{SXQ_qRDPm&lGku z3sPnmugAP$O|0C=tbgjd@%-w2Ig5tz5u5LcjvM_t>)5|?DAwt20WH-^`p`PW4N zsk2vxn?pyJC0Q_RlzwKC+CX@WAP<*w1S<9RBRY}dp?{-FRpacB@h1zNJaRus z?^$5TI=Gc>TisWq%F>+G@s=omb=KB`ZaVSJ?sZ+0K)B;~x=X6UO?M~Pjooyc9n=k8 zQ7D>e-O>21!`9#e)Iz$jJR+9|93~Z8U7<|MjU*yrdcc z&6Vcg8iv{dIo1F_!NdpT6B_Y2>AMW3lb1=TKZD*HrN;Z(U$RePA9-!}fbCI_M{;JJ ze{p8{e{p7=esN~~-LJq~Pp`wjfA4ZUJ&UNiS~=?DQCo@;I~KdsU-3eeipLdB=c!?| zN#eG$zIF!wR@U5)I&AwU-v=bS?$Mmn@#4{sIo{mL3QXk?emvd%{f3V_~JnF(Rij^UjzN1yOhBqsY zbMD&Eq~}p~QlCaLcckf)rEYkAX`;c2y17YnSXj2SXZs2Dy`*VWeq*t$OlC-Ama;aF z*gN??O_{I~G(&?vP1eW~CHeU^K&x_XE55_yD#8l6mrbTEP>`GK)I3QlZpeK{5+8(I&4q+dlzWK$`Kc`?M45x(ct zelKD#FhIXfmrn-Oymh2W z=sp@Tf+sk_BC4Db*Khj4cqq9urG_#u@0EWSi?FZk@{GNLP9jcp*X=er8fhrGT3h2MTH6bd0QY8+Qj_id?Se9xr;{#(Mw8hvi!_tMDS_(4Q(r z+AAeSI$Vg(E2XABS8WjFb1~U^qBy<8I(jACW{f-;+`X63uvrUho5=?TMO$bQ-v=Og zgcil=0YVrs>edTP6fFzX1Lsc+IDf!=tBD&V2WIh!hz;%xQy)L?L2`(F4^5Bp2V+IG zuw(QOv7LQ)9`J{LeRKmC|54QG+q3%(cj*q>O5=*A?>xWX5TnRpNcRl7dowj$3tDg? z=kXLeNWsXsf`h$kf9){kMIg!g_jEtWhrraUz688LP z5S76oU>D&Nyf9msr%j@lste4XYcb{q>qCL7(J#Vio4z)iySN(?|+`PyVzu6s&NelC>w#YhRCeb)9`KMkCx>D@If3 z>5itD*0l3b9PzsDWH{o5bCy?(MzIsoh4Z{|vwTf^I%!}IKVd(AZEGduR7)WH0<)yf zjWRjWQ)t=w)W!gjTijxwGP^>4aa?&`OlzewTB+WV{_>G$_KZo;>b)yVJLdSP4(H~$ z^ES@wQyLHEx9Yp|uA)72F0*`0+jG`FQV=n+FF}NRs^j)^^+2AIkzZjRo%GA*ALjLQl+uGJ`cC*1*&{`(WTb7oCBa^Q)RVG7)cbhow z^^$jtzxL%BdSd&vOf{|yr>=j^;YSGFq{INb-o|gd*f1xw-RxE})?}yI;26QlT}7%* zYB~bT)}PyysXI3eN6oQf#Asj&0AS5%l4N&h6nR9~}GR zvbwkWWiiX$qYF928@LZtyqHZVGGCje!wuc=$$_!}k*rsAcl+4NvM1?X;uOUOc5va7 zeXzJ36Xvbt=h_0!Yk8X>grBQF!-s9_4pvR74Qk-}iag13xZ77-1X?-C=k{hOwFk0R ztO__}KOox*ZqtyY+6W%8UBc$OT=DwDHK}oHC^9$o*NG6&9sPhh?dF6NG%>8-u0S~X18=SFYb|!AUyqcpQQqf z97SAoS0Y*9W>u9GQGx~yvwzJZaRZbBqWil2I$3<1j$G&C-IS~MFj!Rhx7MGcbUtP^ z^$1YemFVH~0GA?(9&i(7Yzuk1=~9XYt87b{e@3?K5esV3d+@eo0ozG%(O(2DlUFY) zPeUn6uCHER^ktJ9A1@y(P(D`VSN5(I-M*`QU{8p9g?7`j&AVc@Nnu+XTq**ueT{=Z zq+|xksr+|sgz}x9pz}94J-NMmqs{xr#1bKH)SD$D+%NrbCdyE1@b5zOQ_c6+jCe;2 z3>!@bjHd#xfz~bxW}6m>5jSg3gG0NgHm`?7lASVg(OP=UE%O#=+^v ziLI?$PAL|?Qcl##`-D+N3`)Ct9hjcU#O7swlrR1eBQ=B{*~zQR2L2OGffs4u7Z_YD zY_j(5;e2It>i+kuZlNAL*>AlWf4iQ*y#T{y#~xzP-+rnC$vp-<%YIfxv&A8Q%0 z8NoG%EoJwSb6PWfO#;Yz-o6~E8C0wlOe)TluYWb76a2XgC)_yDO_JE`8f6|iqt2fnL3K(6lnJ6WAM;k}Cl z*;n>7f5Try%t)x*cZpHPj2JMH2R@3<2N`#LQf+3xZ=S>~D$gn@^Vm3d*w;AFMVw66 z8;n9+&GPf*C%z~LA=i#22>d_pzB;UmZqXY-KqV9r5JW&yIyRdQrI8Y8>F(}EQ91;a z*p$*G-7VeS9RecV4d2@Mo^#*VbMCp{bME=;J`a1ttUa@4F>B45*}wUPE{N-DVFh=C zPr=>b@%P7r4-UdhwM%gFLLpKK{=HF8`M~H7xI5l~SNtSJ83j1eja$t0D#|vqeAVev zL0JRd-8nA&s?FbZANXY+6)CV9eq$NIiY(Z@Fe{2Lkc?_nHVA1`1{B7EAcZYMKun_> zJP;6c{t;T(HNcwc`!_->%M{-pL)*J@c1g{o_+ulHBOVtKV}~30 z!BI^BjQx$$2NEu>p~U|d7qc}7Afl$WjgF=P_)}N^FD>I>`ZNFWU!!6Wj^B7{AOZnM zV*yWX1;K)Si~QcrwvO<`h+A!_PYb*e?%Z3sdLs{1ahvh@8@cyyn;LJ74>ppjL_u-} z7iV&44-z{uJw3+S^2TGoM!(u!8eH-99q9pJYL&k zxN5+fOqe|DJ3KWHzIw9tWXstWWrYdvd~YR@aiiH1B$OT(Rh^$Eq7rK8R10ktNpUnX z-c<$S*zL=cO3d3FdT4l2y5o*cvRVqYm}e4=5g42ILR~qUB-%us97HB&*EF=HHkv0I z7h8Ra`5!tmAMWnpjhWc9n+*=zH{|kpcpP8U`W|tgqg^(H_HOUB9#);)zFeEza@{3D z8g+M9nU$DT%8PQC_8jZ)-s3&C6+Mv5_U$jD1F!Cq|>Ez?}L+4K#dw` zxjE`ibhm{!x2E~xZdB-%o72?}9kWfls?Cgk0&$h@Vn?$OTbFsodVlGFwG=I#wT?A4A><5#faDSG|%92_(V>TW>DeoN~u z_aH=E?{KU$*D@n*xhf2|D}U62iVum)Y{c}&NhCrGulctq^A>Xgqfh($_2@{Z&yI)6 z-?Xj`Vmjth;~1+k_o;JXaFk_P%D?e6v&cENa-O5pb?6asGFNog&_&f~959!64FyQo zl(%|Ix$HI4b%9#&{MfD`l=pZl`K*}Q{0s8aHxWK%uS<2>*GE*#vK9(7n5=2PP+pYJ znOA)%L(kqrJ8E^hg~1+6kHV%u;%B9^s@|+!(PMC49hWAJ=gQYQo+T|6Z?@%6-6K*R zZrbjp>h8)V>bKT_x^NKQ;V=5b%@$PjNgCX+nyqh~aSYH31c^hofj8}0UMNa^To z(a#J`iEf{=_^4LuY=7*{?x@y!~l7^+CKk3Sn zCC~|l`1!qje|}?kG%7lL8_hTp_2wJ(-TZaAJK9?98hrCVz9$Ded~ROkUbG0`!o5K0 zx*g5FEvt=!lDK7GT*6Gr-uH6$_7iLUT1aHzd$Q-~n1{m!@}iA~EN+FB94{XtMF)R_ zF)=GUYl_t~-@c1S{m6y)+vOZx=Q{b1TUxsMT1k%6@ z$kIF}k}MN*H0?vOXFUjfPJHVsrcz_mxCnoAK}c7pbXr|#y$e0ZxcwQDCgh8OXd12y z5q);5{*!KwL0T^Z16AJM`2v}Qjc&4P8rX`{1v>HG3)B9mTqfB%KnjmkS+85UccE@g zDE@)(#iBIR;~;SZtYXIfea?_IrH~bB?|2Uw1teG(FZ?y{5YL_58=B&|xBrr|`tDcC z>g{7^igG}s00~`I7@s-Oa&MSfOSJ`<)G+(}s&>BpHJ<5eN?5H+LcMMx&v2}$llV;)&c>?hmbV5mxOocM?D<{m z$aYkdci9%Vhq$x*Vq;<}P=1)0Vi3hhu{*gBTkU^Dj|eb$SpT3A6fjNt@ z5|Pwb%c3J?aCIa2D13W}l5Yl9$dZQmN%OhqDby;o)djaq&(g| zU5L2hp{+1=(fSaD_wj?q{Xe?4ooV}d%0m?XIC8KLE7+T~(gNafB(0yUaQy3(u=uSGN^0VCcGbE>HrgiAO;!OaP0D43#2OWG zynzdAK*&TETxB&$%Oi)(G`n-eZrh3JLD0|w(<9RBkmFBUE4H#&$+{g^Qu^eSV$H{X z@~&>*uv3v}5~afqsacN?ui^CB!dLHUfqMNFcP8?93@m~l{&b0EGqZXp>?)U%kyIzv zzI1o@EBNIisVFt%Bhww~#3IvCHY1lZbu~01Wf;Z`+jpDl;|qD>PZ?Aaq)&tk0mY@J zV^_O1LL^)CZsLMv<@r@SgD2O*kes31mio+e&Jkr;Ny6<#Gn3dJLb25Sv!zqW(v?~( zfBd2yalnsv^_Cqdz6TCwZ)`4J5O_WwEV;0r!WX^8Z+CfjgX6VlZ}$k=+J(hY?9TXX z+L0>0p9Z%z^O;%*}g0v z)i_D$S}}h1$ord0N?*u1gi>#^A3jrUDN&tJ!>sG0v^x%EYwH{=F4%Z-8#OGDtT2h+ zC+Fn_vrZwuh$O8QANMdZ8ReO7lbvT!#va~0pVH&{#~Uua9fAw;p6Fvi*%24kRbr=$ z+HVe9O&Joba?@$0x=LLV8a6-k6A{e|&&zvO0}fqR_GP)K`S9Ao<=D#kr=d$|g#4NN zcS)oT@J-0;!5|4`G|Cssd$Q@IG%=Lx!a#8QdRcz>HfajKqU^`xaEIQuVpc1v&xog#|;WKn#3kdSOjwXZ=p`B?h{pymxd8 z_@XuZju$u)NWKCan%w*Jw?cXOml#@P`K}-32N~{X;p09X&Z%%}5f+B(0=~oIjbZfA z?JU0llgLo#FBHO1UXyICJUOXo^On&M=c8tZ;rvVyN%+<7w8kiw!*|%{-9ZkcQ@Y}S zWR+Z};JYK^;WsG#FK>45yKVxD0T9XvtT9R0j9WN`As1W{s}{Z#S8-vV+RynAsMBjv z6`gF$a)hchm8l)Cm|-yq2K#*i_c2NFMD-{-%hij1u@<#rU|4VU&HCw(K#1g6(# zU0Qu*8wRoXVE^5aMUC^x!!s1ts3^~bSF=TOu!qlno*DbKZ>2xM4O~~m`ZVj+y**D| zcOx(wxB1?uq=!1pyB0Xi(_cwxs)hrCEugLx0l{m<(5#X7Pkq2DV8E!d9X@+h4#xgZ zjJm!^tK(3IY%un_37K!B76g)&CaHHz2kQ8>JAhhp4bp{~n_hjW3P#m@D=c4{eO-KU z!78L*b!Y5Wj$D#*mDt3v_M6gdFz~HqOR}#A&9^8mUodMK$(o%+E5UG^U4|5!H7u2i z*fqsHH6hFwye8Uoq7*?lQrxY8!GpmA+y5Jgb%8r|3a$`k^%_h|&rQZM-q>jM~xZtDWpUtBV73m`8F!&ho+#!_i#l||F_ zqfYY|ZFtBk2Qz+)+j4KP;bGD%4^hdEEk9%JoTPB$hI=hGFB?GHVH~n34fFlFaO#w${jHqAo=vE#)-SjjX z4+hliNu_rVQDE&Wp&3rh7w%HK1gG4^pJyX4HR{J=FE7*T5?8lq`8WG!ArH182aY-m z!Uv8fM}hl}CUX`S@m$MG2S?~giK%tiNRB_Z?0#15J8~`It!_2dA7#~Xb66kTdW1du z{YWWlwsZV}p{7`!EF%9nGWMWlU_xZe-KPC0w-ISh)h&p+02Tj5WgRKviGo|kqe+XG z`sbegSH7W>_{1%Xl=a6<9tDpOToR~?ugp3axb)xYrK>T|P%DYqci`Z}vuKGpbl}Lv z+kk{uHRgV5B}v}%q@*M{3+1hk^LVseOV06j`h%FOvu!~sgR!P$kLRb5Rv))ph(~c= z2vqj3@()mB%S2#0z9T0TVhCy572%9k(@O?5Jyq%w>VJv^(+3M*&XpvgU~j=T&F^+K znN!b|ye_Z0o1*i#A^vauU19H1zi#=?p5mV}_@=i0v??nQ>>*v%m2Z=yH5X7~$ zC!&a1((S+`BbX;Ku@+Lu4}$(Q*1(CN^Nu#a_ly1Ybl?|W^efl^JmJu13KfxG8mvAQ zZeVGILq~Wr><6rQ72rk+Rb~%HG=HG=pi`chHWL5(eo-;6C@8+BMd{^5yBSrMXQ?z_ zJK7U_5Rwq5e{aALze{e@K8p3*T+M4KCI;iTt4GuL-@yGElNZffYyW#e5i&clQ58N% zZo0kcZ*tW%S+~-*-Y85@(P#H=;wiRD$LU0d;xiX(z4MN4#sbK$H1D@;odC^z`jPXu zGO{1fSrVhf9Djx$BPT{bJ!#JLby8UO(u{NQ!_$Fe>^{-BAYH;sCt46*UKmd!T7W9` z?u`=fNF3c_L}gs^SkTqb{>iC9W|IBNat_aNgHxk7>a3kSkL1WOwv(OW$Z%zb$n}cy zD6!*$oL@2i;`Ze^Ug4{9j(-Y<{UeU>e*_GJ!w~-y81|o`7qP>$Etxq0hVpk)eRg=X zB{R@${x?V%95{i$9JP(@G;Qs)?esOR{{o{xp#K>%8#`Pw3UA1tP$za4IC%FPSxiqG z4u5Iu8i5d1r$7EM*Z(aH6#Ab*580XEnVX;iB;ct1!4YF;2FM*){PO{`H8M7^)3nhy zgg437M$^*X&dUC;BrFK)e}+`Y{zvXCaESY_PK4*q{?;UbdKm*ZJs`Bb?!Vvq@UNgI z2h*P^b^jU)gF=6U!p1EqKpNd#AO&*f?}>**Sfb*xB6F8I`ClGMuu!!1j=JBI~2X>h99o^w!a|kNXkv^O&3b zJ9ndi<-pnglBB?RHI(x<7Q?W`X9vvY=W8A(yQ65VH$SdD^8kdZ8TKk}G6ma=*CHho zSF760Ee22OpNZameAH^sM17}`oQ3QBoyAkfhuI#b+q%(OdEL@xC=&Z0ES@FZ81A~e zea)?6J7>H3nQOkW@iD|M2XkI<@#ZEmacQhArV6I*Y40{CZG_29I?lWpHn4H9 zZ?-(6L1akUD{ism<5;vRjI9QJ$`3Wg_08>Exj3-w`9kGn4PVC}wHfYl40hOpC!7Uw zQb*qnS8jY5+*Z7Udnx|u)}v`COSh$J&mgHt5!;%vazLZnqZkr zyya;>w{`R`SM0ERTBO3SinokFq$D|M);EU;5ToZj%(;z(|4(0pTW0Q| zR@8szBG5LlmVgtm2uUq$0RgMj+7?d0QeQBD6R^&jyKkDt=i5!yC%1F|jL6?sU$1@7 zS3S+o@3}csumTbu1x<7J#CFF@zW(;Hv^;D!>#$4tTo1g?qYtkIlh=F;B5WX|62L zLJbMn!atuNRNfCBFXS+H(B7F^Z!I@ahFJ^ki7Ov7IDqiBzadnrR#MwA)3>94s|#*= zU5|V14?pLtTeAQI_P=T3T56D%1==3dT;qv7=sJig1pi`#X)Zq7au_b_D4|9ymMijT zkfaFJg1Oy78s>4tKueiGtfoG zUOenYmw{4IX4F zNf7d0CLHbn6hjF(SPuigmZ#yU#z?uA`n2+ln^@w`%Z5!%N43bbR0VyHSq@IBVIw=d zlhA&Mm5@0eWqF*QU7?T4{a%qH);nlJ()ov|-WOblt?D00+_~mMbjfQ2=9A$!JY9=K zU!j|4x{k$RC|f9svnVDzqG2Y|C-zpR6fq>dt74K+CuQEMd4YT=gyd`B+VytlsIg^x z3%kN+SnkBWL>=eWUAHTqJZ%+=?<_7gq3W|mbCEa_)0LZFRyQ1HJoRQs1q~M)?q-pm zjhMVK-`hM8(N468)fmkgU2dML{-B<=ZV_k_MT~oTA}Gq1r*Ye=I-%oqy0@bFBJ4dd z^sD8%Wt4jt%kXXj4S5;=k-T<*)3_Wm>5*~z9ijS-^gB&Vc~)5;-n!3ZHaxIe%S6OK zEtNxN`93I(lje2hEB7AVapy?x{jVRYc$%A@jhTpix3}wDv+kXHZpq&$`%H?2DyBc@ z*N#re9RG%l24Xelmhs2mwC?cY0y5$>e2yd*q&#Jrp*bQl$o7nMQ4NFd@_Rphu#n}u zgzuDy)GfYZW_&oYAy71B!Y{j;9f`?;wDm`)hrL-@kFAx*>JL;ZBATGYia#Cb#U5FlOk<_PM?1* z-*>zdh+gfQY?RmS=gx!Vo5#+j5KY!DhfK^l`jJ;6_lB4?u#AJ}a{@UBtPl_AU5s;| z%iH{^Fu*?d&EtUYuo>x5`zS#&1m;2r-`%g!^3XTH; z157Iq-7s2_N9_W)GyDQf(}JB-D4L<&rVt(C6&MRkOc{qlbaH$=%>%;+y+O7*EUs`> zRq3^=iqNnDoPNK~w+*|*9dxbhlLH;t&Bw{{41!b7!e;Czs@XS4hVSY&E1rct_Gag=dhQDFI)%0LL(JIVO!)wNW?0tb{!8Av#>w!CmBGo-*0_|vVVc&4w4=g)LQ>=QjA?I`W1 zcXs-a+4@@@5SH;T-Of_5~%=IPujF&%$4^fKwpr7+Sny%JEaw#8=o!o)8@U zqNg4hmJc>c@C!mIQ%Sn3rM|=mHQm_|$EgQo90Xub56iftg#)e}^2ki}@;7pHvJe1g z1S*SDPm=~dP*B6BpNBm~(@Kv2y7u=q^O;d`-K}L29)ZhI&|$>&^(KkN3*&m~{!Z@Qh6%ewcX}sW`NKdB=p5xZP21MY`ceM2AN*CUO%{Rsg zi1zfdYgFC|3qLLFlQ!!jlftR595rat_y*l6KpaEEooF|rdVi=>q{I_Zvy9I(@R7%s z&=`<$!F2!=*wLw8M-}Moz?m9x*@KB1v|jpR5Gkr^L}inxXhel*!B~vlSS|2n z+IPQN;Ov2w>6dtPcUACqQVbTiRq2cI+EgxxXf;u>HLLqPPE!tyPfpjVFZNbuWK8$U z_-#EExv#cMp$D|rjpU@^#mMLLmtrX^~^}y#xeLB2-*t4*zKo{Jcd`EK?*okVMX>;eN(xU zq08}p&7^zMLi#h~>UdSA!ZY|bvd&aGd^^?H%<+ysaSEWuE^e$rXR0KYEg?y;I()w| zjwt7oms9-y)q6(d&W2IXzz#ECyNm{W?fUb?)26Z%KiERoXXE+Ydv^kTtaVR%Orchm z-aRD6Wc95{Qdr)!fS4?X&Rdgv1M=P(DKMiU)iRp2On_NJ{lww!#~4ZBCNv|NlmsUu zU;Cw_!0eBt6(S~>x+Wr+)%ylzHjW-+&;pO3XWHYV$-TkrIyNiE)M+y)39^Booyvj$ za8PCy0s9F5<8y*0a(J2-d>39AtsP|+B_aaAeK8eyl4h;G-uYzwV7SY9ci7^=uwCcQ zaRFM^>daG+BdmCUAUVQvNiNJTSR8BLZ^OD3L$g4uHj zgE8y|oyc>D#ZJT502-LJe_v1p;}pS$nK<_WD9OZ|N1s;aDB;Yne^jLZGxJE`m*HN@_4F|S?B*x*ph@7UO1pdKA+T{|s-9jT5A-{yI$HcwIM&9V8X} z>%#7X4fO z20+$7ngs8yU;V}kk6Qg#P11L=`+XpBF#Q?z{g=nQH9cg{+IRdKR z-qo|LHo!~&Fw?ewgbh)_3Spvf`-_pN&Durq(#UeWY1e z7YuN@llir+#*LLLzPbI#J^EH<_is2JE*!h&=Wo_Vd);3&P>WW+cSu-$NBmm4Y%KjE zc-!ezqB_OyJ+~w7`@{>${KI4It%L3=-@MtDM}%1Js6DPn*n~OUqtkC4MWyJ6R5QM& zxw#&7HWF(`EyIM14{q0X@0Ry(7= zXuBwRZDv3jpRL~cqSB)EF1HaG$ot2JZ!Sx3U#r4l93Fq>?}1K#fz=IUJWM#;ImW%oSq!fjN3Fkilhz z5_dX!!@Y+>@&V%QhaC7Fo;vv#Xm zeVxpZ&?qw8&-mKu2-J<=U}{)}S!^7Hv#NYAZhwP%__&d`brO6x-otu*z-(QoXXW^` z*7|Cxkz&hx*N%_m_6u}6@>NnBXA#^qKWlV_Sq6x=_BdLk|F@RYw`QhuW4M;Pw;tl= zVFo^L*JZOs`~0QXU=s=bF$p2Y*tkfvve-Qgc6_c|G|f1dt3Z-CgDPqxZ}Dc}X=jO0 zLw~N2&cLSdojltBJ*rT@B$8hLT@^lDdy#%4wqL$+RMmGi<&;yh5v`TB*B&EpJq)*P zh8}7Nq6@4q*9!Y!k*~hhNRrPVbXLguj#zMi;#-~NgTWN7XiDTxRxjhU8$aF}BS0l1 zlJp7c1)!2hPtC+oh?vTsgo7khJ>`_HAJde2{Wzm_nFE0PziisD?)&G6wN&2CW1QsIky&z970 zHstV)?~Tbwx7}w|OzEc=xCS%#ORUel%U(I5?dvt%=;8X2W|qgc+JY<$p?CzN9v?v0 z0?DM6fZc)7{ZYplB|q>H!Lx1*46S7!lzak=ZiIku55^Tosx&fvbgf>JLsae=*Nxmq z7O1-aUZ@I>qO6BHAcBW9Aex8jmcfbgy~bN2m3}G-%){re!k6&s(d!T#zA;j~_PEit zji!YMjIrjU?$civ`k8o8TO&gWJXXEqG~3?JMU_NKmKdG9cVLWQ*VsXG7K#)sJ}-2m zqoq^vz?Yr;bb8Z+dIQVjTWQALorPK67&+-}xehzLB3u8((Pp&b+$E#ren}drF;oLgv<@9WUs0`reRO__1X$6J4*ZLDwome5vnRMYeg+b zas$}+Idl8x`G(H-I<6C#SYns7o>%hCIGjz+BK?5vZPZex^>-ZNvP(R|)Zlh^PchBJ z7Nv?RVVI1Z;ZD10A>6yMQJZdCHod%8G05(;Y%#k*h-(Ts7v__Lc+-rt z8taT9yaBfT!R~idVN827>qSd@VNDrdNj0C`*g1b`KVrckA-t5a(UpuImsnKow@Zfm zQq891DYo`^C*i`)fbJJNmOq9LE*xl!JF*30)CF0#*caUtP=s)JSnwad313q6n6xv0(lFT;G|9q5vwDF|D@k}CraUqARlPT1b4r3> zz^MtL!VdqIw$f}4;)901;Kzv!GU57_ZLPa@0oFAgYYA0CTy^GdaU2<#PV`2u8KRoh z?ib@4$Qz8xebVy@0~e7egqAuZK~)n@)$A|rw5iQ`_8-}Fv6XY5U)@^tH>nu4kUu!m zA?1uKcNv#+5IgvYgw4C;WhcY=a$JrSS6+sbX<80b{_rDG1n*LPu^sd!wK^7C3auNK zzG_9QvX8gh3j-!yb6Y#`QiK8GJ`6Z@(z(mdm7xQJZc}}m!9bxju+sJ$~i>ZTG>ZV zHf++Jyk?ni$<@SvO6+mH=pJLrQm7Zie=&FjL|F+G?SZa1rKT>3$ABiiS! z1}2OonDH{c)6T}=E=#<}{1VSaYm9*_Oz!4;a&;kw-ZmOg6Dz36fS`$P@Ezn~+H*-0 zWuzhy-vCO0_{JaxMYfyu3wG8m zt?S4+;!4WrQ?ujLyEYzA(B5i}yk?m!T*8~E>6&$xj#+IaD+!{i^-+m> zrp#Q_oW^UimB8wEB1Bnd?#AD({ZI1s=CYVsX_#@6s%k?W^6O^RKaCt;fC zQ_~7nE8$h9KZZtFs%6L<1=Y`e^o~Q=Ij>UnPY8pQQSME5ZN-{3CEdrxDsrbw5_~wu ze$1&?ZH@O8LFbe<73q^E_2Xy@eXOFdbV(&0ins;C9m`rng`7RA>EPjsimUKUNO#Rn zsd>U1cBixAYMeNadHThD;w^)+bmvE0y5S5uQHEv;+_B!DI`0i`(CL)McYo{92ZSgh zX46T%36tPcC$|+UG&4B3{^@;Eh zUSTp{OE8Qr9K{@3TZLYW?mtdEbRAqS2J*Zkl znq6c>SWgSd3QRAxs3x+DgEqcOILMR|1_rjmfW&m<7eKpJJJ2kjgh zEJWAx(cdO>>SRe(iKOm!L+~3z?nE$APGjw4@lpr2j6V7=Vy)@B^CgMD(+T3j~GImOG7b2|$?Kz5dn>~((9*LyvX^JKJQ2sAZ5&w_#c?5_2t`|bVIQ>8bT z3ZLs}`?k)VLY`@QUn#%wh&?Vwcm3R`Hsy+2uRi|kUmzjxE6 z^t&&75s#+th;iXVY;0g2;)SK;=TQGenXtSq*Xo%V>nmyo9$d9@&-2)ypU7>_iMtYI zNJIC&y5VM|J14HH{``tN&4sA<-KwdWFeG~8G1hR6Zuangh~M}Omh3b)X_~8Oli8ME z#^z&gHdoOfukE%tTAhk8iS10&toqaYjlr_!!isc z2ZYymgT9&&sdlG13rVtv`mJ8w2sUDw-4uW?j4xyLzqIV|T%61u81#qH;78ot>SV{M zDn^X8+v7k{+2f$!UbfDofLM6A!VH(kYP#m_`gx>7+p@%#C)Fog3kM2~iKtDgbcij9 zRJr*h2y2yCY|6hApkgYjc>^>zggSQ>jJy!I4ZSo;U=bFB+0)lGTaL2@>>`Z$UMfdgM9O)?F>BR^x8)QWU|oskry^|2uy zRzo1j)UFFWuT-#=Y8_%1=QgMnp8#0#V>tnZ*8M@;Tb~4QbRhZZE>=T?Q))$YOu5>o z{z1v={#_~4frJ_>55}d5uoRvrU?12{po(r>4~l|N8w@oZzC^+v#VRsiZ&UC2n1dTs z-0rs`4d1$(3_TkbJ@*p6!18SE5Op5^h@{kAMXbaMC9eykOcMWE*K{bj0F2jnn%!ct_!k`0fs(MnQwILqg9PWM+35b( zntvRw{}#do*R)<^aDOMIvB4Fs|2i37s&8}sW= z`JiRaRF9Yto%H`%K4`Fk(*1m&YK@%bd=>I+<#d&FQFji{kt+t2OE=pOp%i0_#VaZd z{8xwDv#2W<^E-8DC+*6PH>;-}m2;&&V63~^o8R)RJV$jUOe+Q$(`oUkr<@tbPDC^F zI`Y-|LAu1*{E;Sc?M1t$$Hgp?1HW8l%DsS2jt0iNqLsy0^QR}a8}|!3u^2ClpAa0+ zzf*ZXv0?d`v1P-`PPC6&U8&J;o0RxZgqQEOF$lht8zKvq?$9^A#vjAY0hhV^qZBzG`&l zz4?4&d|lE$dfxBjk-UlexE~vGYFpb9&1KttN9Rwp!&vo$2L_l7&i5_|q@~=2D^y@gXzq6ElezBCk6GT@4T13yGeOV(50tgkG;~^j2hvu&XPbKGxi-z5b zvry~qebz-kqKI;Tb%KIVYS{7DS?IuN17-vr70RxloOlekf4)}enP2;j_5-;HHS1i#to|hf19KHX=|yYTfKL(D}Y?U5H_d=*_-aUdKh*|h9)FbmNo^1p z)Z=ic0UIabT|zgJ;(xPq0)FC#HX}Sp|CLh)0+`?qweUPA zJ~NQ#RGMD(xb*DCHM$de|!|1M&F5>>oRpiUn9ooPRtJ z?g6_9jyNIkGEP>bXWGbgqEyPoxkLj`q(L?CJx0I5_~jF2aqSbeRSr*!O4yn&kglBs z>Oe)--ko!NzU3HPXm4@G*C2P4-tT)Ty;|?(Pmp(r6T9hA&L7C}_jEm9wqADo$q2zT zeaCGwZ<|;4)r^g9Rtl38x;J2*`(vhkqVTZb^SSZ_-DbjmXcD8LG})^Fu%732EpBR~@5ZtwUT;uZ zG&UI0=H0!R(D>9@5nR#Ax25HDrJ}#0FVXY3?54Ev;n(51wKYDaVVN_`**RFYd(|P+ zBeGkQD}}snvKPCJ1|DC!!@g!GZYOKLc>nWA`zw9Sqesbc$R}A?eG|l_y*+4C$kFvS z9|!lz11bwLFE)rDDPVhe&x{cl7f zvvaMG6GpWE$V^w)d^rsZ)m6QP@(M_j(IO^a&C>DrEe_5IcultXO|tf}tgeP2b0uhC ze3dpon`w+U6%!_4N4JZTMw-c6f286Cdstbp(6|&%wWFj$tyO}uXqoUpj}w$ZYc4wsn2Y^>6|@gcbvb~ zx20vJx1al&sCvl9)V7jsJli$^!*^k|cuqEZGu-6Wtme18;BB2tw9)gUCerY!NrA5| zSp{|-FRVmd1xs8$$htgw&xJ#k&FM9Fvp1WwiIhKx^kY2T@;&p`5&LSXW?knl%m%+z z9ZcD$0ptAy%qm?^(gHb!^qG|kWV=%D>oJ2&(0QiyzWchtVu4}I?5~S~y~?h^*GOD} zM#f?-g3IJ)LY>NJL3vzTGCSjUiVtivl@+?4;Ic3--y3Wu{ESzC;4O_M0gZiuDXY>B z;z2o^>?nLQa=s(P%0dgnO@mXyAK@BNl(j5Oc4xe>=t{8ED$4xsBkJ@*Ifm0gt|gcw zj!T19!7|D^vxz-CZB*>rPO&q2F6-PS>n>b}Gowz~qATRHF-?XM^P`F;plo4Mrw69AwJCzgY2(f{V5Nrk0 zyZ4D4A`m5Fgxp@=tr7-2f%WbUl1Bt91z_pCVg}|`KviORFM`KAdKt*?dcVJTv`F<0 z@-=L`EB~1@$cJ-`Q{sUbfGK8nyK5UvF?kQj_6ro#L|LUDmwd`E%cP9m_379r*nqLb zKambMU{V7wod&6mFG(r*ZaGhl(|8rXKY1(j2=+!Mz@RUZqm!ic3w~T7N2k2mfTZhr zS1E`+RIQxUj`a*_8%XI5P6Y{Z67VS{2}~)Uz?9MrrW6;WC;qW*sX!XW!eAPiDS-!4 zLOm`&slV#2yB7gogW#n=w-|1KALkEVMSA#AB5LZd=s+B3C(s+~-{Z#VEKgAZQ;Ow$ zvGXOAry+tgb49bWm8Z852#!lW<@IXeTWV@XX?R!rFa$rp%(7c$dB5+deyScdQn^1t zeDq^LpYQy{Ox-2MNkzSqXJ>m&rIMA|s*XX5aPLm#zVUk0>Og0GO(iS-DW5tF{lvL) zpJf|$ICXk8gw;aRuyCt#Kk&!ElbO|E!`wHgTPkU4rM)VL!_UVm=Zzfm&{nI7EZdg& zx)>b=??)>|b}~~h{#aDJGU+|w^KK@d6%z4%eDXSM z1!nld#{?W~@R|Ioima>)TTWEM_H!DwqWB@sLCj3QHop`Hm@OG}L=7pkrOiZqn(ad1 zXVohID;GscYBe03JEQ381Yed)sGhx;&x+3ArA;%D*)PiBrKL3K4al4*N=iD+`BmH- z5HNvVfUlfsbVDvg$MXcnEryOML{ z7l(>xf%coPWymwIkV<^Ykk73^iF5-iO4a4tg$T=mFwm?UU>mx3CP^PF5MHq;H8+hi z(w2UKW$5Js!ifK)nCzqglcewpn(H!#CK0XVj}9xfmY+oM_9D0F+NR;=+E_A?RnNj-aTh4Ar8;!Hoi+w(fuIXIE_OJ z;$?1xQs+rxj6xhp^&E1XdJ_}{7&_pnvdUG%n~0Rqj;A(aa=)?rzktx#Xw0`7;-WM z;3}VM>0mF`m>Uf&Gx(zc5Sl}5|M^W1k0;2v4d|zWfsvix`#I*mhPo7$clBG?X3kyB zPq0lh>n)ShDwv0q6xG=xCiL;carZAUY02sg81ROVgh^veeNB^Vt*(Y`s-bJ9qyf!f z)~el)sv$d&a0`+Y>WSs0j+BQS*3Mge+ToNh zf#0fmd@X1(+sB}!HVF*0k!W_(8S+iR{5{m=}54C)qc|qg{=dz5E_nH_*$&m zD@T_?<=KczbKqEvEY1hhc(*c9g=d)Hjzj$PYzab;9x~A}Hi?|V-~C8@!IYfBA1(LI z0&w?y_99zA(n#SJ^uUJ;M|P)KratFF)bUGO{mmQq#*Pag^8T~NA(>KYvQAEb$F{~00=6gZ#%fv`aT zu(F4eKmpkD8^U6z`G*I)t)r%{j_qIZ6}JBj^9l+9Y#lhh@?Ta{P}V;nsXwXy{@#>p zS1x-Cb8TBw&1-d{jrMPHM7BSpEdM?X1?2$Drr#O{cd`Es`1!42w)!@j+Pb>>wzkGP zW`Fg-g0TH(SYc2$I4|v5y!ofzySD%TD`fZgrWyTX_i-@)c_{rWEQ*x{%J~}>H6HR9 z7;+`%mG|D5TCPP9K?tQg;q>=%^TOu7HHTn*Ni2p_miyjuGv@_ekjPsDINK@GR;8JU zsAu$WMQ3g;*85!fEpOJ>5;c$0gUwmTp0mcqM6{D007SV>J#ylTnPaHCxY*3|EI&sB zK-B)q%fpkw@vB%J+ion>e7y71z0j!3Zp*qU_p{`>^W8-5b=6-u)YHqADl+v`O(zfc z*-D{xo2J0LTs_p;p$Cj#?9U`xYizXxTjR={>=owH=x?=b&c@juprH2jt9#UVYe+@t zKl8Q4YZ9>kB8^Uts3_3GEKN5ISE>1a505p%IM!of^L^4!%=QG=%xXlsD{5x4;$vZ= z(f)BtLCfd?dC+1ddQEUBjcn#RHmq;B5Q4?J?1bk_uVk}w&sCD^fja! zW=?!HbX>&~ztxP?2H+1q5LR?lIsi=}i;NCj$(HiXYkn_w5RQrG?(pg7H4YS&Rc+J~?M9c))yd|h%)HL@(q3=9c<_S_ilFp`rM*1IS^UL#<}a5! zyC;c`VqX0dW??M+R~x&JOCMrmpKH!tnFU>Zdlq%L-`eYbvoG`^Dc*<0uYqplYtLJF z+XOgCMrUL=b(cTmv_m=nP_zBQiKPE2PP71v!x;^7SRNI`4D^DM27Y2@$CcB?pgSEg zQHjH>$#)_;)dl(iA5$Nxg%$_n36Nlqd7VoGFDnF6HsvTWr8URjjKuZo(AR)S4y4x$ zg7kVQJR-ZopbH+6ZQb1mBC`3D-nR4(F^3j^u1JF)5K${Bh6vLIt@{m6TO38|6T{2} z5D4q8_HVY_7~paXaVu_TA3;la^GPfrQ~1wFk;(91kRlt|zd=P_G&sHBzZw+8-17hc z5@fk$0azmo18d|!V2zC1Dd-sl$9}r<#izy?q$Xb^WUBnCcP+8Z%_1H^Md84!95;I* zW};m22cvNUu$+bK+A@uIC8YukfiNQG2|$VnfTQ>T{OhSZfc#ut2V7xaIEnb3%hK^j zGA2w6n`V|{5KrBs4G}ia-yXM$+M=zanM=BJ+hP`$LJq!oN^<02m6vT-G%j~{b-(hL zt9+zdXq5tRqNQB=ao>^qci~x|tRH8PA+Hwe=L|d3P1Scx7?`JDN!W%Vp4cQ>-E>cS zyV&P`TzfTTkM7AIZn&QBz1lml^7`zU&?xc7l3R-#SK{sCEx|JSiHMH;?V?Y;zB^`{ zwjXU{Z9{cuwmH^jC)Bq1_1i0wCFbPyWg!kJ@buO?AZl0l^Qc$m#_x0C+E#@AaEHaP7(bS(}Ol!(d?rhddlyp*I& zPRDZ4eclb_mn^%7o-!nD7l~JvIuF32jX@0ouh1~#GK$Zl1C5W->~a8D{rPhJl9|kEkB+Z;GFrl#h^=&me#avGI`?;qZei~6R9Po4hh?s&q97b5o_x%Wv>RlRe#B&CsoIf$%9F+ zhIOVDBAR=-ub7l`oi3&c3#qHO9pD`DO8cZB@(I|~B&l*u%Z$1_C72^tB6`(2bh|Is zjIt(#uDCh%5%Xn|@?-OpkNq5t!Pd*ZZS}aQQao4{woxx{rFTvHj|VNfB#H#^hR=E5 zblBmoPYu#ZmB-KZTMWs^k*1*%qSL}3!L7$)V_L5Zy3c7CQ z+o0Fq|9{+lby!r}!Z#&~h=71Js31tk3|%TEEz(lb!XPOff=WsVNT^h&o zimZ6Zdfz)s-NE7_{U8v>IFSo1#uI?W_#{{3yJT39PcPi6JV&u~sK>E3`e~EWLMO$o zk0JASA3b?%8pk|&m-d4L4na$`cjm0NsQC6xc9j~~h__iB<0O}?VqmsFmUWgRqEMVm z=k}(mz%DG^-@#DqHj_Nj<}jK1UZvc&#j;mRu@cz+RYq&(?DryYAqdx+Q{K)4fmp!K z9VbudS{||pcDpCvK-3o4kgRNm3>4!l*Tk<;Lmv1E2KIHC=sx>BM(F2EDlS$82z1Yw z)kYLDPqM(2UzGx7;1{lQ)$I);T&%Az)oxG-?Bjr^q& z_v{LG&*f`fvX6rAMrNab{Lzb@gT6To^vw#OZ{7iYa{%a@)j{7ZIDlJszxPILbKrV^ zN$xzU;HOAIperVIz58%iHUj|MO27Az1X+vVHc0T@K5;wbvwV|xmLr_&Spw-TlHQ!c zsJ1{2j$Vpl6XBZS_8PaBK;Q+oecBdd;?0#+HU`9L)6pc8ryo6T>|pv}6cF#$XN#hJ zG?~K1n#9G*qr8Q8;n;W=^)T6O<}ND!c9su@@<#DZtPBr&>RV4+YR>O^{_Ls$@zLX& zvn(9HWL%lyAnoS!Ia$fs1rCFlm)t1}v4Ix2GUH#6JvcqngpM|FM28(4TL zX0&lzU$K&0pWi`LdC|hReFBGL|E-$nm(J1KRE6QyUg!KbzhCs)$I#32K~s1oQ!Crz z$h#F6$zF2X=0z+DDX~FCVvbWl0ht{Wuf}LC%p>8i#6g+Qz^c2um!%OWDK1#}`VmW! z!)k3oV>w0C^Z!y8j%42T<80kC29t~r}NEpVxG zb<7QOI{9|(ga2o~+agJGIEWj6G<6v6>HU?yrI(16K71&fBi$@k3a_4|Y+M0Nswu#e zA^5liEm#8jU!-FmLFs@iVmk{E;Tq$GL*I>z^*6i!kkz&;Q;JNm$=FS#>1U6&O__lr z9-?n*fk1;y5NM$E=996!oRTvMogaB;nyJPY&OTlcS|9}sg*IO%7n(`Fi<;=W19t#U zcVJZ!GKv;29GJWnWrs5lkYjbqVtq0qgWE%GRVO%d^`mX$Cq{F}`eZ?zfi-zV^yP0+ zGie2~wGYi4^4vv%2i%bqm( zk}4^F9_eZ+e)^M1Wbro68eGSOTZ3i*iZva2$vMB9)tBy(Uq%)m^r^4{JG)!BRxKrQ z&;3v{JZ0z`u4)Rx8tpt{i@aVXUZ;|3{pOF*OfKDL!K|u7z9`SQ?ll_*UgL?BF*hNTDzZnzJxy&c?!^ zIg5hk+&-RZ8e=E-TUYUQ(!URsK3^^7yS$bgm0ZNrY%c8O-mcAWp zI0dHaDQ04|A%>PpXx)=!@S<`)rp0Ipgl~@>rzJI+o}!+A$D}-E@e}gj+w!FUzHSB; zQ1Y$xg~DpG2vC9BCouVRS9|anWM$%Bwy;2i*S%&!#G&@*Yk;AYK^3vIfw9j zVnhf>ZHC9@OC(H2rK+{i;l>0$~Y2YUlZ;Vz5jCsTQ(Qa21xXKjp z{fr@-QN$mtBwlfBf;9cQqmbN^t#PmalC6@8Y`6Ec5o}>+@{Ij<;oqj1`ZtM8wL^r@ z=CFuNqr{!{#AAFNhy0=8CprF5qOEym%($x0_tG(CwaX^i!V#wPm5oAvyq*P^g`qGF)%URDt;$mLL%r|z@ zSsPSCUv=7=c?=q@;t=rJH7U#EWK@~g>fKAXi0a5BCtDN$(OXj9UjgTd%;iy@AM|Bu z>gXJnoQqas!=g>6Gq4VZ%&|zWM7teK_yqQ3MuO`-iAFUI|6&N7RWnglfabth9!J6L zbLVjTla;t>9V@vI9`3uTmGF$tVRA6Bp3JIw75Qzzggl|0kx~;O0tLR}fJ4OgiF<86 z=3c(}bI_IhP~1j^fw79X_Grm)Lvp@(p80cRM-D12HV{DLUuEt#io9vbV_4~ddo$!Q z=(TZ)BM%X9()~40-vY~Hh!uz>1JuGpBXuW}ftRUTN`vuohM*nk*mi?#MWS`c zy8TPc5Lu^xX5?j%B0tx zk;hcb38!%$^w}*vv*p-Y0=VJx-*CgjqnUbKByK1|yc1Tqam}%k$I4EcLC5`QscGuM z>InCMS9TdOGjdY?{UUZYr*QcR)e=AscM+RxXFj^_&WCe9&vyncs0v)NqFyRq!|Rsl3UzU_rDG7mm3Q5$JzuWV6?= z+q_{wlhNEe}L=^G50O!oscGA;j}Ro5tGVi-o*nJx4QcrCbA`-pKZ-3QIp@J!7L{cB@g@Hdg}waaO1=M%8QZd z0?CY`Mg$d0>eryY0gCVY3EUJ6>R~qTvqjG4&{$?NOPiajUrOJ_NppCF#&h#lou;tP zYG}Tl-?FOu82(+l82RRu&y>Y zxrU1bXA6$R*Eg{1HJ#i@5Q}vZm1UI&yu&z=#pk)*`{%aImG*+SDhNk;Qu`1=2HUA~ z5QBFv7IWin-lG(c0k4NcM?)HnP?v^H~s(J>8|jI3$U7(nQ~r zcCIt<3}U(Ky7DNy93DS2p~Toa6H*v2x!!ozPSJ^c zO`1_aU#rVR4sC6Qa<_fhc>w=_NtP+i7LU8CIx}*$2(Ey9`@)(PS zorTU+6s>0~oiOoMC-k`5Ihf1g-#k2;;Lz4Eca;iu&AqE-`XbwAbaKPmZHHcC@U*F| z`kTe@u^yXVkw; z^;PX1twJmE_(%4e($N&97He;>JW@mu4d2Xi)yjPT^5A6c+Rw$ur0A)iIP{;9(!j$x zlDTY+Zk&kXG$>yIcY;O%8Op7`Qbqylh)iWt8pd$zCO9YNQ^vVbd6f|gpOsP}8Wnrn zSIVe8LQium9As1$02Xoi| zR8C;NZXlKho)`_9OE@Kz84VhY^=Ifm2e{BEw%TH31^m=nYYtQ?4C7Pn?b#Zm7g(pc zSHtK$?|9ZlvMbFbO&XlD?q8c5a5rq1s*PpmA=CZmv9FBQ9&zn{*t7P&-|FO2WAc25 zr0wW-rizu^Q&x(Hz~Rk)22bEJP!l7+60?9H4{OXzRMuK<%S4Ny1RGIcNBhoZ##lfA z@u=F$MM9Oy;8hMBY;yo24uUEQoT;{vh&vVnW4*B(*~7GRfzSCeaX$5TRDRbm{_vgfDj2%HM2ws!WctWcT3{t9H@= z=N=S+ndp!($Ixo1Et3=76@YeuyPUQ6CZPzyuo{3#$ve_Hbwk==mn-qY1;b9IbJPR} z$QXJ9@BuhgdFZzb?x@y8(|3=9E;(%p}l+Hw{b)5P2D-LxJa01nK;Mb zNvmfl7s+iS*tEE)9tTm%Zo(VZC%ew62WI7OaJP-VpPzQov=CRG8G4+2cfS?IV|7y8 zo49naiMnBT(mwbTywQQEJah4w${gR^9;ok{)7-5de`6ACmF7blv^w*+;OL6dp0kxz zvC^IRh5NQYdyj9FYvrZ7F3ey+z71s(+dHaDXL`JKG=R9eZ^T%r&Y8ey!~2CzbWC5n zRIFaTIjuUh8n}VRL70qp2M!Xno6lZQ_)2cl^vS^uYEJXDydj<4#0J0ysu}Pu76HT zt7l0YY8CYGzFyNOT5~46P^-KI%9&CH`w>Yob;W?M+dCZep;pEzD>>`VwJcaNH+9<= zCm|fMC(Z7Rc&P1Au9t9BSxz||6It{O{TMQ?0Tla25WE4;RD|HXphvDGYrZ`&m>LDz zivegaR|<>`(>RA)rOnnniKfO_mhG<6lGwFOI*210b*wgSA8b8A7h4st?^WD zpMHvqWymxuQy!47j{V4z@zC)_(lf#NbxFjsV=9zal!K)zLnK~+TmpE^${;~$rL(*D z_jZC(QhXgEd8KZD4gl=A>V%hS7qBJ8*qNMhX>ACNb46BG^vk?Q5l z`uF}@@z$Ty1m`48f7>uRQwCD{);LSf-xx0p3hEVYmXZvT*t+k)FA*_cDNyzR;6NIq zX!-?)8avZ`j^;y4i}q%SiO!y-hcL#Bp3J8UF~&rP%V-mL58Bsc`AR> zTI$&#%-xmf9H3=2u@jqgKe@tUT20w{(47mY&3hvR7m2kg(Y>;@_vxp z_8mU6^T)b!SEXp&pzl)~UXc)2;5z`83Kc2b!&VdXb=3-?>5piRdeR>q z;22sAwe1LJx%nXcRnvR5DfWdS^sE~t-dINC;3bc;<30{SN12}VD7W$h&1ThSX`b9< zwct+zKndT?gE7a;$dvWszbk6*N`L|J02+8jC-Tv%Ejqz}2rO`%}qgBU!L%M|_ znINowG0`WsvLET5zmw<1eA>eCDEcLiz-6K=hEXz?ELb9$gaBnd*BRdv#QxXBm>Fcv=B$wK6OL2$>)5q^+~EWszAvU_cv^zj_s zUnPb##`llW;2Ou%OzQiFWlXAW7}444bmZNf9#Rp@!64tlFhzq-^T=(_n<2aIb7Phz zAV;~9|-l_U^Pjj?<6s>j~N;@u58Dq5+Z(ZdG{$+?=gp3k^STb$Zq#QQYMZ zP4P(xbquY9LYOp+-IP3Tgk`;6A&18~Km1@EtqkoKm&+B?B+C3S$h#QR7_KI(0=p87X&8Y^Qj6mwdV9Z3zt9Z8p}fv7s%F~ z>-e%Q42DTfHe?37pVhn6FPe>Pk*&Y_%zIW*V%!{T*VtAK<}% zf{5F(_CEgk9YzQ5^??cH31dG{BZFR%;-RwG57^`(k(XnU<*lY$89*CuD*enqV=&(%w+1s)*M+7p9}IGIe`=jJTuIYi0xjky z{jr_Idt&jY$98Q|2n}V{(XZfGj~{a_9*3VE3We>=QC}HQKH_J5Kc7ubMyK=r8~dy9 zyNtP_hlm0i?f zpGqpJyw9H%jvND2!m|*HTwpxJVxpx~ycmHNtr8l$~a0|N(x{R%(tCDQacce zfq+7wQXAyo)lz}nDt8Eymr0+W@*ICgC4>u+1BPfy`6)4AIO7rv>%WDj+Y~ZYtZh3V z7M7p<_z8#>4>bw3r56l~bG|G1V#R9$txqXr1ZMtrDLSM z(?3E@;zZ_vdzyIZL4%|5dc<~s65D&-?G(Xc8o49AMcRaU*6xYx2~zU4{#kl}wLWlJ zvTKvgr|K*4T(BbiC)8Ie;n6QrJLu5E^OMN}-!hcTMB((TtjtaS z8bHePci8wpsulnTfBWJ72ZRH83zt>>XW$^RS|*mduPt?r^-RtGQY&7LKSP864upg7 z{>`gw)c<}PzS}0??qP=899?|DuWSt+THX74OX$PmL3;;F zge^oqe8sA6P?rb2zMlVUFyBbZ$g`bwpTx~`+oc*2!SkvRh1M#X>4nLLA%--^lLcyr zHz!T&QzLWimD)ZA`H89*`9;`ti%ptwO_RW95$Ml7^ITm5`2qToG?T7==~7#t8?qj+A0WKx2|91%4qI$Pt^f@weN?rZI;{2r z6ykt-;OH?Ue0D81%e%B3Z(Xm(&Q6b^Z9E-R?_~hfn<}?sL_E&bE{lHBnH7aM^^ar@ zpK8v|XhZqJyeF!Xhyn!&Opi9QI-Q2@!^d{El{72&c~(cNP#?*>EgyS3Cy9RHDT1$t z_NLxcWZZH_7x#^DD2%zp=eSTuCO>;Ut<-08+Exbd%dg1O7OwSq-tT*#Z;Z~fh znD;72=)kUNA?M92+uREhki*%itL48&{%rHZ3G1ux{lZP$6-)eeujaCAuW;CF7~pCu zSG!hg=)Qy*o-pPr?0sJ}9oTeVXNi_Xqlt8l6F%&kYjPaUpD@?|ej4&YiUp@f(3x*> zK~my@q!o9f{e{I}zFAY17OdD-t(yZ~q*~)V4$P4l zCRrQRaC?PUC$jxP!xf-YR3t~;TBb4CUQCMt)?bdoZ~t5uxJ!9|I3p29P3SF5h_lN! zreLe0&7iKLZcny*@dmfaXhHOme(H!xnGe(L8)nqHu&NQe@*O9!O-?F^aZ_716|s_F zL55Xd(^tGj<<%5{o{-ur{Pq^tSkTR$R#GM9UoWA`$-KHNIRUIK44g239>%Px$LIHc zaAQ|Av*(WFze=AmeVqeFs=*yh_a)(exRY0@(CFq8Dkk&19M@a6^2ALoz7vN30iL&|JnmANdafwD(aiXRGU8E5@^ zDYiQ5{FHbPOtuE;t>>ztuGnslE*q<9bB0@;aoZFmIXNJ6)Bd0|Lt#Dq<&GMV{FRFq6Y2V#(!1|1{R8|PSQ;|X(*s~Ib{S=Q;CUWAb53cb=> zE4*nqhjH@NZ~y)MR_g{$NMP8tXEX^OqJSe(_E9Sg%y2h6#w$Z(CIWMVx0xyc((?Np zp$9;ez+8DdEbo!IH|<`8*1))i*4&R!B>72Bm%KBx?rMaaZ8@_-wYIu&${8&JDGc5S ztJu~is|yDXI-q1QdkNMVLct^^@RP>*i&(f_wvFtUSeV+=x;yTJWL%#X$QCmgS*w79 zZ|T*i^^SX3YoJ!K1fkk0>W)rfRFOM={#tDW~f`*dN5B!4Ev30edCKs3@F_fh{qSfxZf4Mc(H_ zz_0z+-2cHqq0TQ)X~`FYkfm9CFq+&O+9f#O3!m$gr(M zc~pt6eDXcF3bU_jqVb$gUe7ik3w;_A_5HA%8-DyP{2-wU zHqrjN`zCu`VfVW+p-;C}2P?0&^Ox%<_vA)p*)lP%Xf?#;*fPOaCj9;Xyn4cWpP$%$ zE4e3rJry1^_i^Pz*OQf!O73U9-9jHbg4ZGjeFs=mBjOHd>@1336WVR;NlhHG;!N%E z6WzY(KC3QjaXwzRd%S7h{%przp1d& zm%p4RkKZBa;ffX~@rMd6!*~I;UVX=nFmadiYn}cUdAY=jMi3fc3v8!hcwrzjV3ADhK0?{tD$tT2 zKM>I;Kj$1E3VG4}#MUS$aB*-1y}PbdGbX)>6`JUC_5h(Q!<0uV>_6nRM2Oedmh}C_oBcZ!Fh{hAz~J`L+TzREUz=ePk5P+mjaj-j>pu6_k{|& zVylh##?~8cD#wGjWviQ5oZx?)F^8#_XN>T=W2@vJXAGc8Z!2E1WgaQ-+=w#a2#%n2wp1&Pf8kb&|rlL1jNXK`2Dm}^{1BNG1HVL4+K(8}zed!wt~lMO4y+MIwvGLq zq@&`n8t-3MkT#hSp@3eJ&FY!2M)-^!hjNi|{v zq^{KXweV+yT4BkHF@%@GfXnsVT45z?UY1NGK`KRRuvFwyDQM8?M)`%8je+Y|V~8mU ztNpFU^j6)1!*8&h+`8@W=cnrv_7bKzVOknWComYdL0VoWFsSaz77AQavRt5^mksXA z_e`?Omv&UKLh6h8%Bp@EPZ<3|4 zC|NUTp|^yivt$Eg*#H*|EJ3BbsiLjX`F*Z-&9AE@3H1z4XBfEkovWKW$Kf?~vvYhq z&NmNAcaF(scRN-MCnDQd4Lz1RSDV=_@8mDd>(b}vqb4xrhh-+x=Z7)q(t$r!mC`3*)2!ULYWOw-_Cjw7x{|2-;{hJLg$^4 zV<5w)Lir&o&j3H%j#?==G~cSsy2Y6a3K^eg z1`Z9xSgePszG=EwB25vILbO)IktQ~K#+QvD(i zaarO5-;Sjwys#_GKs+n1e7hjc*~#_R6>}Kvl{FI2+XX~Qy*_~|+aGVN92Jx*P%S

<^Pq6MX&2i08kMVOdZiNef7vJXH>q?IY{)DN7s{QMtOm$gA?dd!bO^) z@BvoZ`1G@D19&n7{v@n^L$QU7bWw2q6{$i0>zO(F zZ%rBDQSjuqrg-G;r90i~wbmTn6rSvIO|%0gM4!lUWwR#(#1Govf*~J$3q!Q`NYs)> zge;^6NK6&so?mTrg zwE%%@^t1yr!Jteb8FvcD*GT}qu%^8icRK--2o9GT{m>*|Kq`Mzz^Z{PV*g6t0F+f&ny zi>d0NiyQS9SARy{(*381*56rG|3?t5|3wf0&!2ff|GCH#!VUd}7yXGf1-Ybm0SxD# z0V7Cu(j{q1?-#*L_b;p|p1;G4{|R6N;RW^j#pdDwDAy%x3c?3?UH=N(`cu7r<4ygo zW`7o3{^v&w3Q{tEAzYm7fW>uLGbo_q{ab_!WK&w$ni^UBmMZ!Wlr9L*-`nwjbjW~x z_iq*ZpF_s=Zz}euLv|_THMRK5A>-xvGi>^AaV|c{Uz0M&gD8MTbt*q<35AMhlNJx- zYe#5e*tM@$9~8brxsJDV;iyO4HiZ89fYoxQkI7e9dI+9v8r1PNQ8O9ffW#hz7Q=&scN$m$+nE>r_JU!exyE@0(sv~@kA(LC>ZB)gt z@Z)@Yw~0EKrbcA?%@(n{t9PPE`R3x)L&TSySKmS$PK6TOj1kNc?*XdHb=xRBb?nWGw zR(;`8JA${X!FC_pYZUpgX6d+(boG|=71@OkUlmMV7PL4P$}4S|Q-}<{aCf}e?&7d% zN6goBPKexWI}ZQgmlIpPXd^aWQy-ucp>gE>-e!Mzo>r_vx%v^s{8Ne&DzI5aQd`|> zc8_jEY;d+vT!@mb9%;sTY#np!2s1{(gNi;r@y}6W62U@i$8WP>b>tRbFkEsE(jYMD zNFDUAJXhH_I&ZmF-mGRpWeKgD;1F#y!xM(GPH!I+XvZ5O?U^v3;jE}Vxj)Dir>SGf zn1q$7csrxs72}t6Kj_WgY{=HA3Siu{F6<|9Dd_yclT4;zP>_Cc=k~R7x|*dga>026 z-d3d?%^e7CIXflXEvXQTcKHWoQ!Wb$`s^(uwiIHEb1NTmlrr=9@&l(IeIeA}D|(P^Pr~E!(L{Es zOH%9Gw|Idp=eO0a?gb0ae-2cNs=?TNkM!M0qkj4tB|f``{$XJU%Y~l$RS7x^W`2N= zRGrM88c5}=@r?aQO0q^_hRo@-NMfgHXb{ZnV$w6gnTgc5>chRUL7&L};E`odiziz2 zi=@^UawH@ZGOrS!tcO{Rhk~TeD>+P8;Fc#j`I{$PZc!Kll4Rukv~uq-NUk6ngk^2y z{Iv(f&^@kvX7qTD!k&gU_DT9v;w{GTSS)r+!XXs0rB=R_r#Tn+0>~F`4>S_fQf0y0hNQ#C}_bv003w7({ABo%Lp?G+gQt z;H~(ZqQLOKrY{O$_uqHyhI)8qfNA+9kg@ znvUG_(}G5gd$k>N!UU=jvSBsGWP^pqF&2Tzxn;BaSh5fToOt@5I6Wh>`!y_k%FFGp z=%4J?m*>dj(u3WG(;h@Hh!@{@5o&}oRv^nTM3gzJhi@kOE^6}I9Y!87y$F;|#mFRf zyjbQrTpA7I5~WBgAehR>H;oFY?6V?+C3%*s%80)H;pJt6pf-rkG?l>Zrqwg34_vJDqeJbP0XYXb0z@ghoT|^MzUmtK%eo3Hz-UoD!00%Kq;qc+ z5)r*>$UFeVnfFX19#O&~mWLmVnK9{D76*u|;Y4J%a7}IhR4|S}-y?KZf#GnLb1uk; z+`}m?uw5b|rG7%U()7{d#QuiORm-3#dqUcqr`~Q$Tt&8J6E;qOXlmvT)&5kgq+lbir`zlX-|BxNF;rJcQi8mG}6OG z=G^ediS)VQ*CpiQ6s(>4#Yh^oE~uv_{B(0|M!|VPd&hzP(Dd`^Yxyq1yDedbemMiT zjv>yeF64DdTE-8v52(r61ce58wZB%Ao1j*ld1{I-ghd4*gt4tYpc$`EhP_cb!J0pR zwlGS!Te*aarEvZ%Nztxg*Tdit`-73IID)|6J%27g0$aGodR2gdNOxCI9xWGEW$)^fdtA*i1Fp=q1?G( zj$+A>YV%}I;y_4!pHl;wU&2+#d?q_A^ZS*Uasd7UsuJ$a3V@z+ZOK{VxB_LYtCH5c zB3i_BR1D0j2f$&mTIe5;@Nu-R10OS*)p`uf93Z`jhGfgUh!#@>_J^fBkyb7xAYG~Y z)y=5d;N)pv{s+nlZ*57_D5kK)j-8 zE0+jFP!)4ANM{8_+is+Z0Fc*cyb@m{s4!l#38;yEP!40Tw z7lGQ=9;j^-dhziROw$)bO@99xJF>jc-!Zhq)_QZCx|a#tMr{z}llX1`n?OS5!tF1R zx*JW$$&R3pNC16AZx>M89wj5~C69nb#4fOixJ{%DP4^IE;tkzH z!rkj8Xbo*_0tD)48$twkM5i3+9(ub@g3oTb2oYS1{=s)r4)Fwk>2X+lTczhKwt@)< zn%H}4IQslYIKJJ*CqF4vCbG6P1%4`#rk|~<99lEsU*k}YX3JUg!QcpT*(O#!fIK16 zV1LYsofq}>Efc(G+TY)d{6*H7Du>Fe>KmgaOZK+^Uz1~wI5||SAq?{hz-!X#B*bjkGJS)CR{;J&3Z*dpkdXL19q0A zD7>u8v2Cc;G8lGFL5h)?@pPvwYe9ngb;{ z6>_of1J`E@03epbXhEc;6~;rvGjc+tF`6HhQK2HMGQpTtK}Yn*L`>$5COQr4)jwMK zqP3f97bGmJA_OQb6|!czx!UGTl&oVfdt3d)2CgI3mUSl80}!$$u5unz9w}@N~c#D@SkC)#hKKTTcikU#EICz3TaQQjo98U@0iV+B0 zG01=`#wU{qID^QI-@d>!DI}34$tDg^eWATkO^kmk4us|+SKeWC!UPIYCMP)8EubZT z0JP*4Z5k~Q1E7yv_crkcM_#=JB7@Xg&PH2+wq5SjO0l##dH6isjq@v$@n*O#-AGCVS1xOSfvY*zh)BK|AFyDtRX(! zjek!YJj@p(7dK0bHg{aVD70$NX&PPR7F~RzO2^%wy4Z+6xhmp9*|)6eqq9};CgY^~ zHZ{Ykza(nH1`FmvUZ>-7)44kKI}i8m5EOGsqvIPNPgRcmw{^qwKlUWx6ZN*B8qeEW z6Ag?)l6S;VIHHAU;0YhHGrAI(xQk3IbGi~F1-b{lDPjh4@l6kS7A1hB$}$z1ydebiUAkhE=GO;n!8t`HKzADuh1^*^lP<>~ z%D|qd34+rlFXL+hD!I2%QCET{O?!e5MvPEC=sEU*P9Ind3kxFJYieQd#alvD4r*R^ zq2+3(yv)w^sErqLnXBvbYao+~zb1G+%X&x1;F@XHmnjp%EE@|+t_smm<+&O-S;HVr z1yQ&ce{(ZMe{C=Muk!VnO$66=+N9&r#NVi=P$~u{z z=LA>Vlh#){?A!tP+}t0U;GqU_&h_dogl!ewCoL#kF$Qsc6ku>+fTBV%7qCduz)dkX zc+!FwD-pg)44SwB=*T%hM{XuzE1M|fpi?{-1v>JZ61D;3HM-`{k>BBo8(Le}+MH$_ zMowRkJeupr&D)|+c4fd*_BU_cMGjU)*Qen1h_~)r=W?*;dN2nW`4L+G-l-aUr$s+E zgwHmzVZuGA1H?jagOM!A28UD5Q7m0W!#+W_6h#a#U+5)Wyg%WbJ)*{os{XE~73(2yhvh29o%iKxr}gnD zafv9*7wXmr#D}|YJ}|G~{ZlaP@6x{iBVZU3gZTgGD|!C@<^LlD1qtl{fQcJ;p#jR$ zFVN`{+TrEl{g;TG)|ts2P$y#0$LjKm;G12 zBCfZR_%;0ghIyqq9WZi^G8hkr9J&TbG+g`3l(=JfrKF0{j$BT3ee_ z?o}l`^&o3tU14Kq94WT++rCxX%RO_gUf6uQ|NP7DuG{*pg3jBldGm1;H4N-by47d3 zGc99QzCNFDw`c7=H|^xu?Olo&j}NzJ#&H+)XBX!33zD-`Y^^m}T}tepeNOFcQ^0*Q z=|Fz){Z0Mm-7ie%3p?9WxFYU?VNba&<>Vi~mnkKeC4YD|_hey?jrirY2MEv8(~^lA zOM3?i`RUaMDpXu=ehG!3R(Zh9DV^e^Vta(Vv1H=u-Td}k*4C8(vcPq zlRYz|sizkbBBndJ*UB)aUpG1^ICOn0Bzun=i0$a=K9VQTX=u8#M?LMP$~c4;BOQsd z^n8gim3&Bqn@iO-g92x z)6{3Fw#O}Kp3skh9zj3&Lu49Yf!Wz|O4_fglY7^OHOnVv3%R2z!k;>vne(pByjl$@ zzp;COjoaqIS>Z1=6rRA04sHKVPdwM6fnYCy~?wLF0VSJ{vulZaeV}~cayE@)=JDFdP z4PMmwoQddKbX>D#GN2TZ6LR56@O3uW9ZvvJKn8ard z&sry~Zh36l5?{UU_RY_rfKHZK+dT0}gRrSg54vCfLCF!uRVq6AFWY#xRS$g&)Bx_( zSJ}dHe@XT;%-2yuYIJ+36-W3vb%xHpjPd)L8RxUcZ%gH0@>{(4Hc!bR#ap075#hxO z-1qL>#SAKeH9*-9-{zwCXGRNiRbdR=?{A684eTD$=T>u3+DG+M&wN=-is%xP(=Yq3 z{eHQtB-_-*bF9|leH9;P__y-D(C1@xspLI->(V^NvB197Al|i@C(tUL{X0X($qh5U!EhcpeRc*E@_z8ztpOgmG8+nrNv@9kVm}Oqx~kp6b>g9hlagJ?`+Z2XoqfH zNs9uv+fWZmcDWr;uo6i0L`8y3zpVsVmT73B{l34c8I4g4t0xCA&oK=}$btlh@&XZk za7(;Fr~?7F#6OFZqQNck(JGNF!~l=-@z1$#Uitlxta}eu%<51(#+(f+B?dx_673lL zjimbk3S>y?aZ?@hX**{D3h>hb=#DZl&jAqA0Q0*H!)Sk;i1z9bX2{rb1eMK?MO~U_ zJfyZM8_?m0l)yZ=>c=;1+XZlk&*{;U3<^oa=zcxWqW4@1avv6h+69cMJ))Ce!fE9I zqYC7oi-|+hI9bvG-qej^{}6cU#c1eKZ^`$|zDk7-+-FCsp=1+@Qlf=jfW35lfN_;X zg&NpascoV!hReTf%w}ZCly38YG$zxJXKI@|A09yo@TOLPH}!HZWJdamvBXU{m9-)u zCL#f1`oDnyDoIGyu$13iY%@!Ss#`I6qBr7d{epS9~m729xIK)E-4V1uIA zMg9q0x`>VGDl=+%1p3!+<>BaGKmH6ykMPJZr9fG_`kG~a6)kq7mSRiiWAW{flq^(7yat>*PBHQ-uY*aR3#^?qNq0;UI~<8gzK;R`;S!V-z&>g=LQcMzPaSX zqU?ts#mt4qr6>@oCbzd$WLt)9Eoi;tV0ZfHG+6v((siDk^6yLP!;(#J5h%pIM@Qb? zQ)$vLwIfUNQsaP$o8x4J7236knQLP z@QT~yr8ijRbE)%*56Vpk&4ZUzlYr7zVVBd3C#OvCV045mp(8O}{h@?@%iE-W$14gR zp|Ed;p)m7dErVVBOO~QAL!PI?RW0;HLc~aNC8i1ZUt+Foz1_%F@Uoq&HhvxUiM0|_ zEwd6>Odl!hqVLvKK3`1NX6s6 zcd+vn#t7;qfW_VdQNI~pdAg8Ua@ z09LpKcU3`B;Qmy+GoNPIPO>vX=x)dn-7=uWr0x@Et~j|)bXZO z$kTRbgvpWakSCw`5O3X2=Ib=Vy9i8Gv0N2z%RvHfGkD_vHvh&5*q zV`ofMuUt`X=-x-mibCWQ6PlcTSh*tB5V()Vzb6MC=C$|H?oBi05?4?rSMbWlow?Lb z2WJt-nVs&X@03SgksnxITwc3y8lKo(b$wgxK9}QkaXmJAy(XcOhuq?BjmK3d)zt*^ z3S36fD<4lkYqT8Vb~Ao@dxHX>NCb+W^OZVAMfPftZ$|?@2PyA8IDxWn2Zl5rttSulm-HGz9Wsnhc`U1l^Wv&9dPZ`Ltc|j8HpS3OlN0_`3L^ch%3*dv zW;vcty22fbIJN9=diW(vq20XqRw;%Gv?+isB6$BgM>Hs6DdVB&n@~3n6&(3i+BRcecdG_x0F#e6w#*hh3lx2VhFa_h+%+zAt)T>qo2V&rzDTT|TWdYSH0B~6Ts z4vFUASpn9FgS*3KnZY+}pXyQ_1JxE3sJ2FEDMnatj$co}Dkf7{;BA3?R;jqs`~Lg? z4$L|XD)u*NT|1&GyDA8QHr6&WCTQ?4CM**6zRqR|c1tj6sIpAN)_qqa&MNqR&uF1> zj%w0&X0vi@KgQBwH_2Pyg-+Q6^ z$HcnqN=2ha%2*%$8S%pu@9P(S&A6pVs$x8n#F-@~D;e(VPj1Xemm=M~$CiT^u4vRE zp&T6;uDI|r9lz_Nr~zejQHY{Zyw8H-f;xI&@vxbx828>|n)1&gWGbw3123(9J97RR zoSWj};lAw|w>b9S7^26hDEmbPFyap=-cLsENFp23ax9J_ugBSfUp?wxHGiKknW-s*WxD7RCv|gF8V3!4DoZNU%U~cXtZ}m*DQM zL4yT%5AN>4Ew~1kSCHm*-`oBAH@@%Pf8NU&gk8JNS+#1*;?z8A&ZV~6(5v+lGjj>| zlU0(u(0VZks;b)Rnz=%G%H9s0pQFc{ngNr+zeMVkx`9BWL~FrnU>82F;?;3G1ptm+ z-Q|aQ{bmf__amb4Z6X@ut*NBogGJyB(zo*buPeBQIoj)X3XKsqA+l4-5v3QQphVLv zU=gswHgDkLE^BBzFVQr$y=+t{O#P4#N%eg5(>8`fA}vIoRJuMZtx z*O#xeJ=qYL4|;D@ZO;ItlpFS<${QwzKO2H_jGHhsbmsh8U)T-A>9?bXiA^vYj<%Kk z@4V{zOtyifTlShhliA{{(X}{X0hR{|3zU z2sQi)UHEoRzEws)45Y-2?^*jMH+hJS)eK$kF*rk=j8rQXBZ0*)UJ{sK|514?)Ql!p7S z_!~R(U-Qpq0`Yq=0G{Pn!?tm~T~sZEO!HK8_#1HDA#5)M!h7C}1*L-*6Y>*9vE(Bv zA0`6&mG*5o4+7+pi(dbl+VWWBP41c69jJ|$Io^r`vQ8XJ22%*`I3uL|N)5x}>LI^{ zGWw1k+&f&%5lP;6z8QRHF{Qn@Ggo&H%O~M$3Dd)p3{h7&y`M{@$s%yV)b7JxqG4U8_~I7Z=h~ zP`cH~rr#`icy2CQ)3gGN-Y_h5X=-av)NJU<0tnBx(!0Riur$Iu2mFQmtndY&st$G}CNm<1z;Pqdy1?TYLb%gb;7?D(2&^#GuJ-NK6RX##SCH6JD|1y zT99TTYOv=r8qr*;gh%Vmq}1m$#F7#wh8oCy-|0SROtww%s=&=?k12R{0WMe(@7)WN z)ftRK$#nYwLp-&zu~GIk2j3nQHd;gkl>=V}(FN%=?~sF)L)ss0v#whw2}wf})nPzZMZGld||&;9#JOX`+ObFW>Xtq6Y#>v9h{c2qyf zxEP<8kw<#}8?u+3*;+)5g1y61*_y18)*#IM1HTUoS3dsupm|FvG|@gEY;V6sm_ z(q7YRiLs?L8qRNmb{3HPzyPUfuaoeH9F8&|hhyCspiFE6dE+c&qd*Ra)c4L$))zn_ zh_ZitQu8&998rq`)TQ+7AAbFV7l_LTa7jP}rsz}SfQUmQ>_Y+vp|$Ws0!Ns3`D&sC zYAS}X?LYIU3XZnd6)K($=m8X}u&+V@!rsiQ2Wkj{PL!dT0vEt- zlsI=&Ivqk)PCczHbpdLjB>=V1Y%1n_)@`bZRsm)7A?A5X?bUjA7vRfms6WU|*+=x6 zUQ=AMH=%}sQ@_Qpe%B+Fn13RII3WYPCMB+wh7AC;B5ZT}&1*_rcewKgQaXN90oe{E zs1zMw#J~2^`!_cys3Mif`rld`ATbdc_UgI|%@{9JQe*Kg1;DF~6U7b_Hy-bX=^ZvK z51>XxVtk*Ov05w4Mv9I^f=7yb+qx0^aVr+3I3e5D->1PG4M|Ii*$O**PioJ(obkp{ z>f2Vf@y~VU#&1<|@^zDG(6@=JZFM<3{7rlM4r{LQN@-q~znV1X`s_KX8PA6|_mJK0 zY1+oNfr6m|5V<4=MeB{gN9qE>+;gP4ahv&b(-Q-8jZ<}n#Wu_dx&zje6Z23r^;GP7%vu^vqma*qC@4pKOc_%n z3WG=k&==0+H@mI}K7fW0$ZrARy#~B7qoj{5WlOySRL|SUn4ETvr?8k~$lkCBk+_JK zqa}6pn3ux#y}7!mH~dUeo=U-3CG z1}ZHLjXooPZ7MCOPm7C`Ya-qLkv8yaAwUqTe5Etfr-DAB;8_?+hM%d?DwTl(&}3F{ zxQAzrLWBywGQL(Z51AROGb@TxumWf@qj<5I@;?EZ3}HR!d#9l_K$H2h%#i;~NCNYV z{}u^4iEMzne-8;dqq;ZA_Kj%#!B?0iU*EU6-6Rzm8PA~2IDdr;8JUs^{ru^P`Nfom z(BvJm9B!of8J9!YdsI%E?_$ZjJGE|UvX<>_p0u*6J?6OE*1}*X~;EQ%_1l=A+dw=x{QJY{4v8kV) zK6m&*b|Hf0wvHAiRNmRv47kSP_q#mx{3AY>nG6Lqh49S=k8 zju}2B>K2aSgUtIu{idPD8mb9SkX_R^(9pkFX36=vJv}d=6Ku?hGebtIcseV-%5?B;Wp#P@{%y%p8fh7Gg7ZFE z3Xm1L0%V1v@7ZhT{n+bLGEhkz5wI1VcA!HV5{o?&1yVBsQKPw%;IKq}m+{9$N-&`G zXC}a*VSPZ$aftjhUF9CrCr=5n`}#{AT7(9eT+g_?S3~vdgdAi92bjh>xrQPQ5;lNZ zcx)vS4D|H5#rzs?CA&~AbJkATf88r`+{#N%*<1yNIRnS%g{d^T#dJKy$%I5R<@KVH zlmtKMbJ5xwJd#rj9aEE=IBOIoDFqfObE96SQREgQH7Rn;3uv=`$4Vp7fc~Y(e~a_^ zO7T{KOU_faV(9F`J@BleInG^tfnY1Ndd>C&1Rh^Ln6Lyopj!!nEv*c;nGVg`ei~HZ z|Mq?BHfsAC(AvUMM2&&A>JSD;u%?Dz8j&n08bL1VoAj^vjAxq}v!Dc71UF@3{EL0} zZ9%^_uL>Axj;5NBT+;_uH7q|^QtyX(QY}i+qF9?j6 z0RQXChe=Q$cv(`YJg2HD8OGsHPlXl?S&YMYj4+8@jaRBWYa`$6sm1e~dMHJS8I57bh1LJqZ(@lbBV(>dh(_RWTVGH93nirh=CtV=5qFV(xETgeaZ2 zzR6V;dlP|RvFV}(W^FdXdZUv1JA=>g(mIx9dl-Q} zf6*AkQp7H@qOzAc>=YdYU0Gi_D1-(WJmdCT?swPD^fP*5PL|vJ2eBdh? zFSh-Mv*t>nl#;X75~I|r=d-=zc4W6vd&wsezO0VC<%~#I>Tp~yQMlEn7PKLP|EJxl&aQ*t3 zKb0G>y&rZ4mHwePRiLH`>3ZA(b8~ct+zq31Cq3{LjAoq>cJs%+qjnBf>bpbX zk%yg^qWL_!lm6Sv!@BLDZ*`ZY=0OiUlkaesKcdgOAmiEpaD+(nGl80CYo$E@qGFLU z@1nx1Uf#tdeyDf_?_%qM1|#jGRc@e^Uz2!8t^ki{2PJ_^F?EyYyBux9)tiFA`}`I6 zRq8u}cSl?+$dgzEf=98_)a>aE*wKFX^fx^tO2)upA)6eZB-Fl2Q!ggTn|+pe0xU8ph^Qunf&OdAaq z;Hs3nUA+PWUA<~yWPBngBAx7Jea0)t+_KgvVks(*PerFM=#UnV6Yvi%sV3_6V4_UkyNY%}USw0B~4X86p+bT*-{J_9qVbd8aVh5WcyG*zVP?O zN`beu`|1{Pbr%3yq7O$*m_h6XNXLogfJVjCqeg|kP&IyEnz3%I@%(QBJ)+v`kGMHr z;!O2vUNDVFKZloDjuc-78mOz56Vj26AS4J@KbtC6J*=SaIBwq4MMcqp@UGL6H@1ypF4~mp+~Zj zE_L7bVthz~ z`ZM(Mzk@h{v?ri2rQTnm4wiq#U;Z1^!OXz&7hQMtxzL3g#HO^|Lp#r3+b&>%5DB7X zQ|6GT;8pXO&{cfZ2guRm${Dv|dP7+=I#CE4Y~~R!kkdp)Kr=q4%R`+@2cMj6x6l{4 z&lk*j?`}>HC||DA9Su#o=&0>JCyGNzWt9lni)-e-UH>%KY}G!f=7QunRls@ohB5>N z7y1zK{%*^U*6m{bKx*-xxVrg%6Ryiimo+mQ4RhxHv?7W2&TF%8lREWoFk-#q6Mth0|$ ztZ@?^y1GE<^|S0+Rgca^T+dE2ExIppz1)mCwAh?fVP1)AwkY|4gf>nr!oAwI{6$JL zl?;A+*z6jobGJ1>jb!hwnTV{$t2EB+vd68` zAZ`IJTeUG>-N@L-@|U6gH=l5?oB<>YoftFo3}iFIGIMQ-PnwQv<0s&W`7g|K0?0}e zl5C7E25>zvIamvzagCUQElwfihWU$m)0bV|yoU_AG|KIy5Q$N>d}CFtr?j2{V)jL5 z%luRmD{xFY*0;??H;{kQ&wM@T*T?zBQVMq~gT(k-P+G<+-Do5WSEWkGG*Q|ec)AmU zJvBEuTED3GGolQ_QcYWnTKZ`eux>IiaN=bmRBt9>C^)rHl0rzHNJ>81$eQ3K956V? zL~v8SDAGwK(NY*AC{qu64;DUhC0&dT+;jph#1C+jU?EzF!$>7CU!hFH6-qiyKC^7O zZBBK&wm-b!eWEIstTCecY0QMZb>iu0hwZ4QAB)f!fiPLpPsq6hvpH1LLXi{mOAq*C za8r*?#8%usswb13Hi0aBq)Lz#kcIr){w%RrZ8o1-mJNbf0t5gX3J2E7I`0!*587^? znMMjhW~%Ns&Az>5BHV z^&6ILT5v3%4LS%|12<*}+!%0WAXvx}!f+ueJEYtuOftAi2hPE> z!K~{PDN3G{bF2XM*4H@i^%vM#}l^zwTfPK=`$}8Cx_i^U*VlvZGpP_1Ya~%Z{s~Y=r8VDfUkv;gWmV zS>sl;=bH!-D|E{(tOh)Ji+O(Ze1NpnbTm|lYINa>PYbl&os3~}NeRR3Z>`y^V{Oy0 zM%V=Y+(V^r6A2_=BHDZIqZoWj%_c6V4ttRjqqz*mPF_Xn}p$ zCFj=!ac@=^xNa_kHc~S-gt}J_`Xwx0I%cHvSta7|&%a$p&g<|IXPgNe=4d5}4jz}j zPYdPXJ5t_Nz-||D;u>z{qYp5OtRx5<+%6=6GivxwoL9jRUM8#=3c-a2?`M=Y=T$+d z|GiafHTQCfPO!E>x6d>6E7v~3DVHg}2ABN?dVT7q|vPJ^&^HzI^MmwW; zAKSn{ROl!H*E}+ijW9$q7t+xGMcCEdqnQfq6G@5|eLXL~d5caYf5{6DI9V z8WGMp%`$Oc#J1}YVpH!Nu^DtihS5zugiBzIV3oX@%wY@pdC$C3JaX7uaZi;&KtOs1 z1QC0jaIq2?V`x)va;2#KPi`p}A5lM$*_TFcOm@hr2w=JDSE?sdG=4lvKAqAI8Gfe} zW%fHhzbixy)OoP+%x+l!@NMK6Z&rvpOx6e;q)aw$iLeL|mfp1BroSjeEyGrLQ3%JT zS}2OoSx8mp6c&YUI=bsj6bq~FTNuGZO~!Fsz`0NQUb-;gcTD>3+Ce7}V?U{Xn4W}c zD7ILm%su>U5Nr?3P%NxwgbRI+)it&9($)yDD7m)3;oAR=pu89}1yLA|+9c1Sq-R-AOyWa+bK zhS6WxGZ8v)^g|y_0!Kh#O$MiK#nCU*j(Pc~$Yc0wFl*+V$1K!}!Z<7Jxqx-f&zdl1 zacc^dBH>-AL8H4nbzkZ=f;t2xpS%1zgwHWm-InUUi**QDeZv=BZ{zq&MtkdL^^KGo zjN`tnJLmNcGb!yeRRlU-(|Ij@UfgD4M!>8`DEgUAC-C|hm{{#Y_gQ@ui77ozWLc~Y>JtD z!odEo7n;FdYTEcb!o8)8+hE!&p&AIs$q3;xwPj;G@AiD>34S{85ZUh}cjelU?O%X= z(XMiqy=x6>NG`rCk0&p;J4D|nLOZohEJyhkL`kW@F0DAjki1IsAgr9o-z+P=LMNK&iu@mrmZ&^zlt3r z%}nITjEt)se+}uJIk_Aqyr(e|NoSFG!GS$8ZX&@Z^q$Ubp({LfkvR)%3PBl)mwD~A zX}9lb7NJ7HwVpnsaetl12G=XW^)8bSN0o^A7Xw+aWjh0X^X+ZE&_N14E4mf03~ZO3 zou*)D@r)=`*cZ~utn?R@9rOjvmHL%0jy^N(KUXbM$BG%`QsVfqDz=OCVm@cOM{4!_ zCSS&pC6A+V$*gn#*kCX#Yo?}!2wV+*jatb?#IxU&4;GR9#BYf;;M)ffl`w_P>@G~? znw*LCYYQcbI?vtXe6^T00ds-gWHiXFB**a4{Y1~eB~_S2ai@ZkNj~v8lQx}EzS*V# z&)tD!7{b~L429OOMhOTn$NEAXRikZHwe=Mc(y^+)`*vi3*Fk%m_l>uyYwsvv=10ao zGu4LYGUh(MFZK2*}gL>t>?e`n)KYld@Q7R)QGB(Y%Efxfe6!{8`;y=q~frf{akV=rXJ( zq1YHaxb@Q%S`{@XSo3#Qr(?=~F%6SZ3Rwy~R_N5wExL<%V$o!cAB}jJQ9P5h$D?`O zY-_q&hHwzK8DV)zwO8mE0H&5NFs6P0k-@dXoc2A*o6-WHAWKF#lQZ_P%ZTPi@fk>4pW>gU{8gVIfR@*3B zc*isWmaPdnwCtP8`v!?fvW<1xm?N$4^okCq~zH=rw7s&D2g7cXplb z%U$D+MTg%XuM|7?>;}-puh2gb% zh^6I570i&cnajQX)>^Juld9zWF9`7$n)UJV%rq2@Elu*`H|CA4i~aAG2Vt-h%2tr> z3e&ivf)?z+kKwaE!_$!CxG}PEYaU8yT;&*4uNVXx`P5WE%C#y6g(vw|pRU{1$1^h1 zY#=PsUx`T{S9L0~MZGN;U-{yWF@p*7>3yEa@g^qQ2{6D^J#QBlxHb&z4F)QA3!gW| zmX?qDB2IC96TlzB84us>r`_*E3=;LS4{93iNMLhwwa&S1EyF$mg)UndSYWzWzWTJ2 zpc->?=6LN|Y)zJA8>H$8%(W?}PlKhT`X$gjQXJvLxU}x;{R4TRAxYAAmFH7OxeQD-%_*dSDXe{Xx$m-kg9xtr3D6JXoi4b$F8+F38s-#v4`hgXsa zll+hH&A%rA{a*~20d8@Jy~XcvdsKsnfb{w^OI%fC(F!F zmYJU{Ge22oezMH`WSQm3GRu=?mM6uUm;hZ}(6-&6>Rt&JQ-?CuC9 zMc>yK9Uh#+UxQRC$zo(0Tvq|;j>`S|81j_C zP;?%_VT8(iF0NQ=vGDZ;@G(cR`uo8}*Ib-Cm+RH>TUkW7m=G3bvAM95pI~l&Qz_U< zm_%Mtsi%e}A@i3W8cXM0Q`|EwA0;6;TEDe~dGXH}UYK{kbeqH$WUq3j`b_bOXZ$~MmM`_*0%w7ow}c38Zcs^72-?74)Mgk@GSHwlm)3oZK-=tC7Dk+>z6nn zzC$= zlVrI_2*bke=lKi7U_^)Xoeu$<(u^we`pg~t`J{&TXS?bWI$RTm0B>BJf;_?x^V=l~ zSnmB2c1b~A6Gez6b!VjF+CN5PUrRu?56!I`U8hjt@ziXde`QuHES8`3!_(WA$TR)P zwQS6^V|aDF>bAw0$vL)BdOSs(ar0^WRo|i-K20;WQbNUgZ?IMOI1M&wZ(=gkcZ0w6k6EBm8z4SOqx2!RwMO|yk96VRe!us2 zTwTrW)uv>g2j+$J&aiTLop$9h7nNc{kQXtA7f(6n?H&Y+ni_W=iiP(6v8F&%62ZQ|OG#WddT^$g-zibB-c<#D^XP6iR7&q082Txh_gTzm4>;H03Z zKJKL8Q2BGv`)>hj9z!$>ez%Eb7@FG?<%T-L-&F`_sztr>#WRjrwUbb8*%Yqwn*fH&%#o1xX}}#0WzJt)vB33a6+C7imo+=!^LlzzDR5BQ0b| z8L(hSUcRs~{&i#(ofU*Tnq?*1Lpv6hQPG{NfNSXy%>4Bo?`y)*EGHKZIKSxC%n_}L z2C*Bon{pH-;^f8?Z zI54gBCUVlV*Gl{d;8fHGx5`Rr>~Kk?9MddSXS^w{gvqHbn6|z7%sfjBn(5*MoJ{9< zgObI>Tb9YIj0 z#(EAVinK}p+#MctJ`O2Odu+UXpH6+vzk4mp0j#FNvSykyqEK%K>D{@XgFQ8vmu1uL zC?qSyhizHGx^ze+Bs>yJytp_Pjjs*~5Tv15>P3I7q(+{HwZ7f)Zu#E7o>I&1>k|j- z_H*>^@M*Y={JJ?ANSW;^?09#r^1+&z7E;3&=E1ySXwbvtSG4A4cj?oljsl5HdH3N zQUhST1j)3V#RUcUzqy%Vtu$th!^Tii-Q>6nBe?N6oVee=T{O~HRU_n&Zhm#&!29de zB=eG`+fnL56 zQJ=kP+5LgiT=gPbFAjNI*|i(LineVJnsHawgthdD+8d{!#3zif_IEJ$cY8Kd8tgL# zFkYG~UkD*Hs-e7ExJ0De3z&;mT}_dP<}L+5#pd~@yjmjUVM&x{8hBskN(m0>YiIS? z_f7d7D~)MSC%@BEV6O_iN!Rda)L^P83_T92-eK*nNt7WS+Lqu=((yuHM82jOX*v@ z5^%i=n+cfP8BQHVGqhMOGygy$y0?D4<7=;TIuQP zP(tu&Jt&0C35J6FJ|?B34W(&^l(Z8MXyun?O5E}Ad24* z{%Aq1h5Z~6S4y_T)fxk7yVK}xg_8?)9gE6ARn_0KC2K>oIinE5tWY#Cb&%#pja3&R zR#jd|Es-#l<~X>Ti7(l@&LpoBdC(8J(Ooa~x$sbiTEP36+p#(yYMvY3@J9s5g3qbi z4WED5BS5m^)!};%VALXb1!D%;;bHEl)57@yVV1hX0rUZZ z0Ly`b7vhp7Bc61ejWNy$L1%JeB=Azy5%nbgm=bu$8*~8{>o=7r*;U+K7j|pdC5ZTt zRRp2d0au-!V5}~qa>1BpgUI-hlb*V2y|)+%FiA|1UFpKR9G%%RN^vluJ+K^I;jpcY zEU|p}zr={6oah>MZ_g;;6GB;f0 zn&ZW(Ujj@wH7_n@Mq@W<1c?i6uN$O==K#3H1zgcE1JCiP*}{5=Fm3MuQwTYfUUV#R z3OO`v?P+{WI;=?===jzZ?IfU+*g%7zC_Xb9i!qMM{j*_9RU1eSty=btrperi1T*Q7 zhxrmt$=;#F_(Sug`(45Lqq%={BPhY9dUm)_6%sm75Up_u5JC-&E4{FGTEp3HY%f_@ z#p(4=#z-`PPUAI@>ifVls#M9Ui+m`7@W~;^#jkV3>6Ey-(Cl40^m5QqoO|7`WZ#Yg zwVKbP8Sk=NoSA+V;gWTDSQe^qTdBtA%-Nt(#M!@=$hFr}9i?{3!Hiu^CAhqii8_>t z+UM{{snGM!x~hr1uAn8{ac1H*bAMeYWz17*+ise??szd1O$jz{Z~Jxk^^&WT&}Ouv z{nBPtT*XA}wQOpWSl1B!`G>7#zos;O{2GeE&Ehgw4vPJrkE<eom%*XL61lzYjEu<~wf(q^tw?1|>4Z=7JsM2lO9foD6Vt&JZS zlY8Vjc1c#l-}VIqs27jIdu5@&`^+2?M%0`PY&}0e_6>hSj}i8(sAlwlkG;5FI^lb* zR{~bjW?mN>n$pMSRQD+Mp@f1@0^FYKbJx|(_|f(9-|D6}`gY!vs)a=2d`8B#XtonI zGQZ&Tk+7svnXov!>#aifqrA8_rSvCP%C^k(?mMmAjG(swsjye0Z5nNNI9A!MaLxI; zcAD+Ab4<(850;ywY|hLEoS5yjJ68Ej1C0=A{}Z#8u4J?E_DH0Rr)As6O|Mex%N%t3W2r-Ix|@MZX}aJfDzd|v`x(B zoAF2MwewA66F|!czx&3s2yJtQ6?g^U#H^UM?ru8=f!Ruflh%q$`7gYXN=1l-ac9qE zPDxMuUjKNEXbwhqlh6){Op~lq6Z6gmj7_Up$FvY(%sdS)&d^qPqb^1*Ty_|9?yhw6 zHSCHr{7nA3b9}F=2;JdXTZGw$xPP`wc*jwvY$Z4bkCJbd0&eg}e&Nerb#BVwK&IK5 zSGc&vHXJ&t9d~iSn3HxzC)T9QUdqgc>Q;>2!thni5Ch#R=lGD>nb$Nf2>FXf{j70L zq5P&pj7B?;??|uQ#P*h5>ae>`8 z_=yX$N~15`+|RIu6WHMSu_JS8SW4Ne5Myia(wl|RPrR=vHqb)&`x`h_7~fIR>(I&G z0UJ{S-Yxwfx07lZ{17D|fjvFW6duCgmtHi*WQ13VpaPr9XutNb;~%y*<1YxE-4@U# z@g~kOu>*{`S1eUyWOoJW(73f2knYeI-QRP$dgkDpAJLg#iR0{HDB*Mh+{GFqD{fKf zmSW|IQ3%{Yl1**`ed2)$?{{}#0MPhu{_{o`y+kKU)4Xj`oNQ{SP?WBb@lRU|0Zt_K2e~142~5KcGe=hzXzz{s~7j)VI*LG1k?z z)wR+7sB82WJna$V{9Als0(^LY&WITSwXnxzHNYDX0PulW{y@`A^dGr*dJkm0KO<_7 z=~9{`FpI8Rf+Qk`O z3PBQ47gASPxF0w$cc!fHbjori(O8Y0LD`-oI~N`B@ZMZdsc8j0kRdk#n(aW%*@`KT zT42xW%3F!Jp=REj8Enmao6DO6*v(MAOb|HT-Ax}fu3GKrlCI^mcdvTl%kV}kzbsVy zIzbuYE4iLqHNN9?IpbNM*DCJUzFs5Z9U4&Svd0PLR(qdap+3p}3C_zK;(p1{I}P;* z$^u@+w}8Vj2Q_k+&K;iCX0SBcoBqb4e$I|Yyp%A@b{2U@!-zHX2_9TN2tHz#+_TozK4zAl z03~k_UOX2PKf#NVE`Tyse5`!fr!uqPhYzxsMUUxsF2-qzq;MKUgt<83Dh~^5o${a2 zp>d53QBFm)l-sLJDb^&sgI047F}RXZBxyY)c;IL=pFV37Fd(D{ zYU}Xn+MI)77V2R0>ApaK#I6fwM9}J>_60}ZG>Cu+BG7)8M%JiB3ctn(0e{JYB_3Kz z9V@8&i)Mb3M_C6cs04~IR`*AlS-;4aH>9Z-H1E^IECM8L;k5!)!QL##8nILZg$toe z&@2KJo;or4FscRXlT9$HD};M#b)hT#8ly($R|V&95>a@$S9syG9wOJsVIPm?-}|#-&-1X2VikGJ5k`)+IDU4?S4Q zA$)qErp+XvEDF~QmVW`w&_VC;OH7kz3C)z;cqmfrwvu z=!E{zLC-;x3)4Yg6mi^#?Rf;Rlc?F5?;rv*KyRAH)$g?t2e4|`kAgLQ+49e32gmU) z$fqbTvQzZGx9~3XQ^D+_kG)czB#TnORaU>H9JEKW$htwno2Au47s5tz{m3R(Y?Y<; z9zs$zTankPv#s7p>?Pu@gQ+wU0}_6dDv$b3WU*bq7FBr#iYP}IbXVAI3AW!}o7C;O zh3>_5gqp4&kwkN>hF_X%N1M|*X{zlJe$cP4)whMSoNlvIuuf<1UAU5jiJV-qr#6~2 zY6okPxge`|5D$3gO78K+_aWOL<4CT*l~)qHJl2>qnGHyp>+4zgj9tH9noFCg&XZh7 zf67wk8j{a*#bYT#dAqRJNPZ$1E@y~D)Jfpj71&+ti6J|H`*iG7M@8^QrYCYxv|S#i~eajAbsK;5~Fn7%iM52g51ZFl>sb8MKJc zH_rynK{Q#TWCN0Bn3zM^s5C@IaCSUzp*~p-6}@z7;##O|ng8m)?0 z<3gHu{S?ZvaXNC!q46|*sAKvZ89ZvPBpWg?W*zR%OHAxm|jdq4EtH_ys23b3t*-Ok)5Hx>|Q*&2qr zWpFzp^xguq7#oJMhr!?2mtT%a!rYsY7tVJp#9MpgS+w?<8rM>TPW;17*rst!*8_Y# zfcbO^M~MJxl&+kzZ{itXn21(H$2>Qi^6q%<7D?l^5Bw0K8NBr~j&055i`2i8CEh2w zc+ZO~B*%j*1SB>H?Rx85^#E#msx)J1m}MUb_Gq%KKlU)yhz~I7n$x6o5-P0}&6lAQ z0E|Pf-7cjZUh^oLG4&TxTyZ&uL@1lZHOL5va>MJ_JB*@SGmmv*W24R`;~U=~^b0iA zvx}x@&-u|Z)WxA;lTNxdFuXHDrzp@eQo3(yqo&2pA-rUh<2r_=>7l1(m5|>+#E5Zh z6VzW|kWXNfliMJ`i*aoK9;LWZkP_|b`cWf+4S0>Ic@~tqGjRv?3@w#uoVv(m{q8$z zTODH=8Tzz#w8iW#RgFYQ^tGsa-vG*cL|e(|4b)~uTCz@GxPVe^F&(q74#$fO(ur(^ zydj%B(hy)eeWfyB*dg`Inxx^Q$^9Lql5k+AzqouGW3l6e926X=7+>I>NWdTW+@H=4 zPE(58*5o&Ywu>03REMTRdHl>k2SbU3;A_iZkmW)J!=;7-Yl#LMW*`T#%5ilY#fRhI z*}nxz!+{Z~GDl^BmCP!Ogjp*c7UL)^uftJdpN;l_ZK>~o7b`Z}YJCxGP;AO^-~cEutFuEi|#a6oK(sJ40F#GkEcj1v{lEzt z*<^skDyalR1TGd!B?%B+DQUdIaLN0EyTWu|YLxaH8NTH1)NXAy&@+}vHb^Lijdd`s zrV;W}SE5F~W{g#iH8>sq=dvC7Q2IcXJ!H%s{fN-2Akmy+f873!fLjZrn4(mD#useXoqx$XaX+ zrKdos3h9Sw_?|p+zXsPmkt#apy^lzxNSM8}B0Zx{&#?$t_zQN_Ckw3_oFhg2UIkdn>adL6kVw#MEvw4SAonnn z<3TLu_!wQqArJw9cUQD_GQyI{ixCs-&g ze(n+>3EmPQdIP_Y5O}^vS|%8O1xg@b4mn)n`cDk%I0d(5ET%QU=@f;mk4;1NHB_p` zW&#CK;~JgN1luGX3@*r0FX-McilrWH%cCI5azReR4LSUx_V?|1N9Df-{80bn%wo0~ zVA(QGcfEjEm~p(v^bbg9CS?!}rsN*_=ncf5euAD94+0nh?!>JeMRbBJ$F zfZ-uxn}-0tCPCgv8v&x1KjRP@EI+Zdy1pqGY$_&qx;s@rysyS;eU38p+G*omYS|AmK&4?HmHT@BGxi3w;E>L!qJQer{#G?N-%!>ZxfIhc*T~I% z2cj=OC_Hgrp~c#bCT``L;x12Es%TteuH7yUG<>sLC`i<}kKL5FKHbiEYw1yMG>{iw z?7lG*PU~ei1KNM!WwzP|`X3!Njcv`e zE%g3_I}Zr!-!dfZpx>YwApXxn%mkFb{4-u=1t5r4M*r>r$G zL)FGN%ZqHVj!BIifmGy+ZdZqgVX!+tmJgfp9PMzO9d2sgERP+Xo}KLg5B#S|bBm=N z)*ELWyUvZOd(AyOHC8KN8@~5!1EMC^P0P-O zg?oh8`4lW{M0=$8V`niefklqQ+uDpr27&I%Gkcbks5KQR$hR_mS;DAse^cu(FlGoQk6q2o;}Bw$pjk%_dGG zyXyO7gM+?Z23$Z5kImNr)feYWt6(9mT^gq|NXH1B@P&9VgKBtQV$%~_JHL6EFxeE3R z5wqs=gZ;aU``f5iR6D4WFl-Y2pItb37b2bfL_m(;MW;xrXK*+dTJi=U?>z*l72xm% zVR4}~0EfRtlb(7phKN}mVGQUTb2JSZ=dZO#c;D$c0t)HJdBvXk3u?4|BNhPff8H(l zLE%Z_{I~uBAbqLur1~WBzqotrxTv;0?jJ-j00AlK5|EA|l@JvW7(qHDB!>>^P60`g zMjT4IQyP?(7!{u1_OfsSMam$bp>3oskUiSDctEm<7bFT7NJG}zYAYJrf_}P=xY=9kGmj`j zLZ_TBp;Ht>XgkY7`1gZx`2@Z3+)OtjOqOM@>NL2bkD%yMu%n9%&yq4aF^IQ7m`nk- z6M&`2E=!I}g9ae!Qvf;Tn>8tfrgrlZJ_Sfx@vQ``Dkt_ty>(PXX9B77B#G~5Pv#^5RKwowA&k#VD@o&5DT;^Jrv=lRQgzsZWD0*p|LOF2eVzFKiTevpe&zupG{xx^sz7c8$vER=?8)7b(jwkXw4_*uq> z?)(9yny{K*s9{^GcA>}BBpYaZR?}9@NAz$GBk}P}8%0$jTXt$OT@dR|AEq!0hk9h> z;+OKco~J!65zRN`+~<#uJRp5-5IU)bASL)lt5QM+MNyV#eKDK(9fpYS0mi+=N=+*! zl`5QJ+z*Q5lQfBHni?`k(%o?=EyiUfGehSS$x;Mn%~7t+1a9`)xt zz`LC&(0ny9cROv;%<;?qOSNxsGrn@(b^OV7s$TLhd~z>bpA4EMdW4P%8J0WR12$&g|Uk8<+u?*oWD=FRd5>#hWf-2u6B#eI4 z;zujbmHt$T2d2WLWUh2`vo%;+SDUfs#}Lj?!#lhVS;wBx)xZVP_VM_(T~K%)1Pz6|Lbs90D~hli{Q9L znW>BNY5K#~X*@@1alIaR+h#V)YvjE}W*$LKsB${zuMVhQjj1v7ORT&|$5W-F-H4r# z2fni;UH}07>mC5qGy6Ob^|X-h|dXbu!w0=$xS^zTI_+CUP>$kCd#5{JKy^j-YCo zik}Kit*hYPH-y{3&R>0HBw2fO6mskIuCozbKjJ4^h7*QxhI2;JK3C@_Td{RIr_2Kg zxEc6d-|T_GRhK08i&r;1#1Q<`<3o$xMu50zf!0o!5DEQJ-#{ZblEnvVxOdJuYe+i* zFxA%MKe|RxL=lesLG~+rrto67fIu$<2=qewGuC;bL9k`;mJd(#JztaVHd}Sa1)ius^!Bj;$sFNNa*$ugAea%c#Sn~|oUb-lB z^RNJawcVh~cPn5YS2@~6kY|pjyS=-mUFdeZ$qi!;k~rTRh4}f|ELx6xcLhA!?2eYp zPSv`X)Iw?9Yqd)}o!C9|8f9_y^<5VxZf?VG^ABdfvTSXo)36ghCbn)sJD}49MNf!_ zd|3-znK6u7j_b-XKw)Hi8!Enq>2Q+TblV$7i!;;0Zo&e_yTT$b(k%OKz46TG!5*$= zmwG&?VH;zJX1iTNeV<+w<>S{Y%?9dTaqO75(S~An^3mvlOC>1s>O|BGomZOe)V;D; zF`4_fmk%vRDx3FrJ6%j^KH#eUbp@EG*YA9fE!-EQ;M z2RD66Wet?=#0l&uLE+LOdXhPJ?cc{i)hl6r2#rM#{0bVuPmwzt;1Cgoo_0-xNC_H^ zuCF4*U4B~B-;t)(iPQ8-$kPFQC6R0;l9N~JDDRg!?%Eba%s*o@KBB=uo`Exi@ewML zY{MqnoD2?w98ZO0#h_cz!490juQLST_Vfw8Xvhj{hN~#+@j@UgApWa~?C}GpRGe6>*h?@XJoUz>wn;L$#^k zX#RZraSfp87$50|0&%PpM<0wfGxGw5YJM56)FB9V z{Cm{2eGrQ;v8ge|<&y%Rv($HWv_8BmY7*I&MPulXT`aee>`~ z2BhLAI}2sLLWewVG3^wuJ&+H5Sf0X+uUqFCt;94}>uM-{a)X=xlv_@wfP5|U>e0Kh zGy=)8kXZ6SwB#9=(7s^5sE+Er;UStUN2vmp67>;{@jVO zI(WOVcSrT>YHXBZ_d7+IgmA4YLPI*#oY5n~jvQ1+1(5_6b;1N$`WnqN%U%vW<<_D?_8H2?^<+w)pkQb1C~MDMe9Zuh3tw>~JJvfwr7>s-NtBk*du4k2bb7XT>AH!B zjmlQ=h)|;T_Y5+;rnFl+e!-*jQ@cSodCT>J^iW2gLkC*b%LFCwwRQybF4zLSKLr`?u1#f;7;O&Hx?FcC%GH?p>-RgV|H4k6u zF@tdd`mBgiffc`R%DTlbPJ?UD;wb1Q7a^y;fMzjvcQO{c2}4%XRFH)+@|XX!gd5w| zPTDXoioPjMl88B}B(ly-A>#$w6uI3kp)NW z)_Q7Y?wr;Ig}2>SzO#sWrOw*kgsV}F=8@~+0f(LJDgQqTPyeZQ{68W*UAn?SSf@wx)D1B&!+YVd zs8BR{fRRWdy8)ao)-%v0iL3j)|5Tbi!alt&TUR^ z5zCW#oNi7&8(TNAY!I&8$?{gdfAxc9;A?z|J9pHGi*COPvw68xdlph>`;@)P8;&Xp ztUxK@|FQyIo0nNZT7htQTu$%i5qOZ?>6-Z(p}5P0m8Z6<6}A|1V3Pdp8fR>3sf}LI zc0F!@`*wtTd&`e~tP|fmdNT&?0)vAcFld{)>>#<;i~Fzk$KiH3OM&$B(?^zEeL+Yo z5C!}3s;p^)-QZ$kQcO?59^d!b$!xjlR!5UVqT{0dSJO}3$Q!>TaN%I7sKD-;v7{G< zuA&x^w^*VE*YOu)CfDyX?4w}~bh2W{?RCpFGkTGF&eXFQ3RFZ9VKr}+7mG`#(CrFH zyMdJ!cV$-YlVx=*gnNnc29d71cTD7wFW>snWA1#{nLgxPcBiSq%kaRQ=s5ETNi>Pl>2C{03*x?amxV=IUx7+;nGEJX+U|0MSK>cduO`kJ^TCNjDF(2(%{@7*3p?~igg^$9F9#ICC zmh{2Wk{LTCm}+#X0eX4ORJ<-2A1h$!-ATIoa1+@rC}6t|W;!!8wts-JQ@Va}QW88# zQ!ojC=2(i2+dpMHTl%bE%LhjNm>zNX(HYe9gZ!4OM9eO4*}Ry4X-idqK+A_iSXBUy zeM#h2um@1jdIx|wwgJSk(f<&~Mi1Gsk!wxAk?3X<YRri+x;)wN=rswzcuMSXEO}ai%i){4T ziCEFHcoX3GJ?asu^okF9rOjmD&uyol^g6%^l$}4o>7}`d8TJywGks5|7^`LCJ;l@n zRR_%cQ~A;y%Mtl`NO~!z@zq1jHA=VH;xhYuyMndwH3((vtE%#&abi)OYo40=0O3D6 z>IPjX6LaI+Ma)%DRfQKL1`h(qOfH7!UE(QJs=DX>E(RUhlx{DHn(uz!%cwB&n;TW8 zv>t0+cz4zKLhxEN)mI7!!GS@2E&I?7{*##$&+*Ng*c=8)!Dn)bY7zv36)TJqDC;&A z23&qtTv~6vdhSdnestWo6XwpKjq9q(n#{tqy;Vk5%pV@y7Rrg^q#KLQ z^&h7rPifpWwHI0Bo9$0jT?Jd_ zTB$fBZW2?}YK;UhRQbuqF4cF8x)pD7R($Fc&Q%^){lcweOs5VJTF2F`vLn6ccXK?s zk=#2&U%Hb);bqS^hMU}8N@D(TtnIjFhF9EopOgu^6i6yLZGM)N+vf~cD=MLW%mc5b zevB1-UE?iH#%ro4hGHtk@^9y&48-_`mzpl_1jO7hlhAk`QvUsm{;GG(J+n_`aU>2Y z;)o(Dw)U8G6B^#%7iuasn&le$U5d7uVKs0_B9B+EezLpa6ofx@Tq(Lsh)$BKa3}^P zG61G0EP3^}sC*PF24elBQeu1($>>7~!IFuJ=tJO&z5H%>gQZj?mH+UW7+qd$9wchB{^u1Z3xA;u#y!HNnAl?0mpw=7Kk@7X~h|1w3(^lK~@&H`$uH~ z`ajFbe-twaf+c^X3IieyU@^ywTmcF;ad>5xb4DS&&3g1w!4ArD#<0k9&iK{Cx?V#h z&ST!}GOJ+mu2QpqdF$*(#3LD?Wz3FqA`e%O$vEZwqsI&q1fu;f9j;{&&9-?~j7aa8 z8uKqA846h#?{Z@;?`=2<-E+9QZE+yvxX~>S-cmF~5r+eo92R5rkMtd`%{P%{?q7D8 z8EO~DS9TI+)34Y{om<@K$}BIW=OpfX{QTHhB-f>z>d_7vUcv@(EW$ukSyTJ5o3>4S z$O*SiJk}<;&5*iooGNZCVp@lm{UAMBhR+?$DYTN<*dt{T1hGSQ2)tOSHiV>t`?x^wGLNrkF( za_cTswfy1dmyJoegTvyJgSN(QkNd3N7e2#scw0DC>o#&nZ-<}-|51rkPTV~>bH;d2 zcGf-k&F9gq;E$lppqmjHda2+!mj{`tsZOS99PmkEmY~cbS<1czf!T<9J!ve>6K98_kP=eNeP~_TkxRtCVzvS*c)sU6`$V9YC?QA5yZgAkm1UH$ko+XJI z00ST$);is<1)O+~=U<$V*yX#0&KSicVQY8%TTHFM5>A`$cO0M?y&DkfJpel8`fr`m zQnVEUYKBl%|C)cO0CNafHbEL9z-uG)tXl{WcS~pD4R{cD)BZI;F~l#ar8$8b0PrO` zPI$cSRv;t+cD(G2^&V8y0N`d$1uO=>`FJB<1P>CN?F;KyTw4kLY*2y8RXKQ@5CQG@ zuu2IA*k_utLcZJ8v+)jopWUw_S5OEq4|usOHS&Svwxt&v+@y{3k74#)kghY*Iq>m+ zjVu;#@{5Q-dyRgdh*43@V0P zF4mASA$IZZAiAoYnw`5L?nqym$B2`LAMACk6&XI#Se5`w0BdjKpCPyng=`p+Qrh=0 zh!;BF-}Vh=S>kPeDbJ^>m2SqY?6~x(aD}vs>dNK-HOfx?Bh8aIYR%1)<=(5h+|4jT zzokl!+kQ(Z2wcB0=bKG#9%7Y;YTDG-!_!-2B;2#9v9izH#GLG13aFu(t})cL_dQ7E z#||>K)F)ZeSb}jyc(e}n?%VRso()-lw?1>(JPGzM)TXR3lp=`L+aQh(n88wW z@~3ON5&gDRwdaIC3jh;n3kGFg3*@*?U;nJgQ<#MteCo~F)7iQE9Z!CXi0Y+SeTypB z9+8fCy0vedQ*fc)@>)WW^c2H8v+2#?S_YAkr6$+Df#wlrB{9N1-mR)@8hUwSKlBU+ zUlXx4d6Xpw)tF5;(c8>a@d&XjXJ=WxQHAy^+BnLPKev~u)l>NNrsl;oAtA?r(yz_6 zsU`5BnHZ-tsXj&d(c4LM-&~m2E#DxNw;Gi`HFt~Wh0(1bLveiPX%SGzGlf$lbFCO9P|e-uxZZFnWNYmf2s~PF(S=;j?D|p z&eyM<KSc7ud{{}?G#=M(q-x_LcR;yv{PHDOF-*Ru+`9;OnbcoWe0yL8Kw-QkUWfW+Y@=sJS_TAL_rzQvcYZ zOQP8SqD7Zw8Gp41Sws){A2&5O1Vq;U)FgB6|5T$c31BPd{e-i`ER}Mzlu_VTzr2|uUS$6QEEYTbOD9(pdLjGMW*63@ySDx z#y1pKpL+>h;C##(&@gh63L;=_eut$Ej~_P`{Is$gg0ocZ99k#jC6k&NrHQFHZi2?6D`4$nBcf2v+X6eoR zA)RZKP=OZP0>(;SJ{Rxz6%2Q3JO^#v54NU8aHcSVAB}i#iJW6$nzfdHn(UI#YbuuB zTH4?0ZK4Xbp*puaIV`;PBJ6hQ4eOP*h6$8UTjV(F~oyF}Dd+pp92IG0}U!^~oX0%~R+MY`yX|6-}dOw*HjxY2F!SE#@nI1$#&fC+$05DTS_7o z#+VVeUU`|0lcc>1IzQ{a&)d3;8JOiHK>-Wv7&6$Ed44RSY0shvF)bm#NYd3_+&7^TKrVky8B_&gYLx6I{N@Sz2!phyYs*Y7?Ut&xJ zlq)XQwr$u@9R2X7#82&!8z;R@qTU;b8_Xd!r!N^cyeLdzXop5Y4>2k%r}GjsR}b20 zLawARay?=H7EblCPO_xky-}FxxOC%cccbe2k09LkoM)ykmBdTd7^C6Y-R{F=6O5vl zgxx5lxydAr-z-9mP#&a^JS6O4rPE9IB{5JP_uY5~4~ux^V0F8+0p*pqu1U#`1D>V1S^5aSSTR%z(05XmNU%i3Ir$ZZ6gaj27-STEqD7X!`NIL^zen>PB7g z0BZq#q!>paR*E%T$sF@5m8X-`$c^h2UJ50TR&Mfi;x4^Yq)47VN@)-wgBzXfTL_h} zmAHFSk9WoAy>Mmm*iA_vX+g2F!nOVr2YSkJ@q1JquYbHx#(GIEV6Ssz{qwF4@0+FZ zAMWq1yY#={nfps5Mzg3SAG&^`J3a9p)ep$;&eH5~KXg|4@_dlr^TNs7paY`TOVZZDrcP zInA_i&9Cl7Vx!hk=k8?!$s`%mgu| zA6R<01R+May*$3gOo>LP&wsQ%$@v)X{K4ODg>iGzicUfbVr$9sVV=}@dhO>Af)5TU z*+OfQCKz1LAc4{e@dYxyPhL4o+p9?Mo@`E#0^Ca`#i>F9U%1 z`y$;B&$i~GRJey<|IpBFN;huJ)t~W~N&xXABNSzxnV-crO;JCFzr|hccCt4gEy7RO zS{|&_x8d)~0sf%>6H?RFya>`LkXzMaLHPe@E(?kHeMt;b6w&IL` zM>m$93&b}|k0etzl+57^x9kT}I=-{z+3c-K`5%2@_wv~db>sM-You*)JlAOJ zbC^+8)JO|PsA@Q-EimWXRl=C^Yo>Mrb8Pcl7}b5Gp2T!9ZckQ;U`{k_{=C1detlCg zoJH4mIqLXP`h7#1VvI`J^h9!n!Htq z!G_wfpRYg|}pSJA085wmh?&x^DVK{-S@3^aAAt3gXDTm2RiT8C} zRtByDBA-V|=#zpXcTU11XfR)(^mhy{^=C90@E0aoc^Ra9x!F;9prX8ewY^o{PJlI8 zMsBtszXo3y@3$-Zg)uR-AfIFqzn}I~skAI7!(V3l&BBk}ysQibR^IfBDx;naesR1^c3OmE7oKSSj^BQ4F#I2KoU)=g>5Ti&LJ%5MZh=v^R$ zu5lSchZCqPD~^B>E$E$p0ElUh7iQcJIWhb=CH&(!tVg3%s)Z>={fdyf@Jlh{7uhmv z?~IHIIPn}4M!XMW;qEJ=uU4{`hWNa-AXVDV&v(?F;vS719mD&V5b@YcB=k} zTOFCjz;a;*Y`h@z1~gKx1dw?{YNVHuD|!S0s7VHtrxy4Ylq&%i^!+mUgIsfA!RUa1 zlsD2X9Hbt`8w48$o{KbK!2^XlZ6tQO;=rPkZ7T#s_EHMK}cQrubf-+)WN*i|nK@#Wy=0OKQ4myCU!~sFXe7uFpSDaqPt!77) zW0g%TCDLudQU5m!;G={$q4%)>iTLtxxX~bX1=h`Y5Y)`h4E)1!NmmiO!G16!oG92n zvI6dOJkmaL?gz_2CMR1U-L29T@XMUM{>Bc}|H@YP&ne+{nV(bSodfB&h$F`zQOMR& z+S>oA5UK&-(#dJEtHi7paa^)Iba}#S@Hm{z?;-tACT1I|gMn@V zTYSxzt!S*(A3ragk~OuQ&eIxoa{I{5#=@^$Ts-YALiJnDmh{Y5GG+G-U&QaSVitTM zA&>* zHTs&E%W-Z#*W`~R9NL_~OVrcsqXvvA9%EX|tnimy`)XR|&(;>iU$W4moVG^k5Gn!s zTYf5mvBIxBdm|8V*_JHHmQZ{udzclZAxn?*to~;ZiXOC46+@%ieZuvVP)V5 zy4yaoA&Zeb6O8biJl&JJ-XBRC4`l{rs%lA%8GUzimI;HzR`ScXkFz1hxZ!k;A);ZUTt@=0 zB#(T3C}tF%w|yk&lLs^1=+$$nA6TCBt_O|AMo2?p{ku9CLSG=OE#edS(p=pVc=c)P zMtAc)N&-#fO#Es>)rs`}id2tXnQaHjdb{#>Xw0=mib$Tw6_RcPXRljo5y(G-Y$cDt z8O#LPw#gc2w4?2Mvn4R8e20Q3Yk=X)3>dyvGy^{Ns-el$mTSbMic=?3+AbIpp#5Oq%J1V7_lz)#BD;}C#(wY7tzHc6@i8nBdYGwS z?A57mWrTdVV(=M0hk9H=E|>JGm0O)MnWJ#c&HYLz!9l+dgksjvr}VYMy4meS-7hV* z(UY3bj~_-it!9EdKzIY~)KRuiDR0kv1b(6kaUqjHsfP}&KDz6tdgQU1>MpGjQ8 z*Xez12||+?1TIL<&vDT7AHV)b73)8ZEB}wESeHbof2&vmfPw_5@PF|%T~gft7di583E!02yLC!zNPyefuB_P22HzjMtlKfK1TD3(9&*bh!7T+noA-L;qQYkJQ&(7r?dP+@GG*n=cBZmCEgzhp8R=We z*o{nurHy)=&P|Epi1@L6OCobEf6yR)>@>L5YZ89GzamO`z8^5sklj)dyDzwWnXqHR z)yE)h99!Jb@u(~(Za6>PT*H~#-|?i%T8sF>)}rQ?vF_7cPhAy~;RkM0G6c_IR%>RQT>$U#+d45IH;ZC-yqV z9`tmsohY&Lz>$?>`_^~!S?)zoxZ{kQJcWSyo#LtUUGgi&O$L1T&l@?Fj9YUGh0g`P z+whbIku~##_!kdWJ5FsGZ4G9W8qp=7xg9t)`C#V~_gN2aQ=Es%bybX5^I=umg&S=i zK8TtpxPT{yi5@;UK8K4O;Cbqmy7E%h5S>zHdX zloC9MJC}p58A79qYGS`vuboUjQHNM3DK*tP@>{>2;urjShs*zfOTyOSNY7hv5xvA~ zk6VsBY&@IpdGfBY@poxF$-;wgv;xzvi&EHhpHp-)+ua9fW5x%r%CU81YZ<=liod(c zW7=#Lq(gaH{L?DqM@shzneNu+)}1@t{Cf2Bql5lMcB392`vn=2P9KIJca+tTyN27? zUeo9$6Gnz2o@LrMFoLF-Wz8{>7RTX}u`Pe-3N&|njcP|xE#UBhoW z+I@pk-tpoV7jau5Oq0q(^o<9%hvCeZTY`GSVXr2q4*?sWD{%Dlz}rO@`dDh!;9H_W z;f-tW_;6@Wd`CDe?i7eXWoGV`^LkLt-l>$E1XIRCqLKEMdPMAjuQ|~|p!3UhW4i6C zDpTSr3`zN9l@-40`MjTkM;=iGj3AUTpUOOd7R@uRgQWbkqn>AN`!6TM3L~DUrEP+o zBE4Wth`_*1w4~Adx{#@2S(3GGT5e$4FgV8|>x7z(3*;eViiewWwTd;9QRmq_gMN1= zjidavd~Js)f}i7f1pDX|Qw54%HLFSvXh%OGsV$dC(CO_%JZOO|ig!cavLdLBfZGcn zF18yO1f#ZMXQHCd=P8orb}JtkZf6T{f%(I(zZXJl*@QN*>s24nrBZ=^k>YF& zUoyju=T~KURW>3%`|4BDBuTTZQ^v_vS>#GRF9JmkF4nb)rN=0QR*VQO)a7K;u`tx= zh6Iwr#X{y;*g{vyun^RyP8id6<~$&h@Cv>pd>tOI-w_xrjOJt@(Fw8rz&-q4+(4xn zPAKF#83L>3zqL{xU5uEFx5qKN3HM<9v7r=bvaI!V$&njjNOm{Rrma?@lwK^!UIYs< z+XN=*{xIAJQ}J$U@XrZ|%cfkO891!N7i2qVK+Zz{CSLAYb>Px?c%TPpzyEv+u$PD# zjBDn%gV<#Rh+X=?GSbn(igzR6Fl^?}lbkYh3q976155|7??g7lthqD80t7DB2aa%g zK$0ieh}k7Iw{+(W?OCB-S6m@T+iko77(Hz%Lc4iWGc$1C5-*-`XuGSdxT{R>SG)+~ zlyS)Dl(BrbcxFQM{R>c~>05aaZ+rUmb$I<~ZwlGdWF&QNPIij5Xm(&ua4 z>*ihegmR5}8O~pAycoRO?=iUY{V0PE=Ce1*g&kku=~@5DBVIp*c_RPRsgJ#F*|jUT zXRAqV0zZLH(LixfR5e0NtG0l)^VmI}w)1|aWCXSt$$T`yP@@G#WT6XgL}`+OR9oNV zJ9(z*@SZD2TRnac6JOQpP-};-69yhxJKku{om#C;U&4FpB-elBSQ_BqCzpB_! zf13jkuN*y71s=qy5A6Y@bl{>U9`~HUynn$Y(703WG(&r zmTn;bxU$D;NmBH5-ZQkl(~pZ^TQ-Du^NW6dOzgcT_S&fIeMLheU6mdZ5pRIrnR=mY z6fL}WwC!>@a?aQg0#)*hBh-I`gLYIqs4bMpT-U zM^2NRraLpN#sFvMt6REk$FIekEGsgzaOB7?t=qF2?ry zgDH}-yeSf$ki^G;<^ir^fADR;>`D4ILpYj>>+is`i3Jh60FB*M{G@qL{Z0F7DKV&* z&XijB;)#Lyr^I$pFFgX(OTRo7*e3M4&T~HPG_8(S^e#SuM|WO;V4l9*4=8SrF~%yp z6KV~n?BI=VuQ7CvmyVxrfLpVonn}XM1Y5Ge7OYOtC2+sw|BUzE zgZKU98ZC^Z==~)446J)fum+!Pmdlc?I^esh$!3I$>LZ^TGh@+7`po@yT$@MRw^oTq zWPf+$b|_Au6%A=-#%HW4ez!v{f%CN+Z3v=JlQINBs5)^WGwF_p&Rx=-TkCkCX^Q^N z?%xM>Me3gLtSj!sh8#co9_KK&P86!1_CQ>pYg9Ou%WN>v^t#hp@Ixk#J0DwwXii@} zGIM(-hnY@%vn!?9gFl3Y1heY4IYr`3Y!GLx0v*0i5>t8xeTeq6B@e9=DSF;%VVe8d z_Xk>zW=|zGE@0VdJ%oihH+;%WLF!dQsVfSfP(kCA!P1}xUwL~J<0yw{G`c6 z(Az4NnQ`9UVdMUZu49$?69-YDh1T`=3#5Y-d@tB)h(S>3V71pHFVQ##Ls=I3yMxSQ z#C=r_&x*@oWHzFFWK$rTNHd0CC3TII@@aa9i)NUK-fFUha)YlBx3%P(v;3y zi++!5-4GAcZ)SUbCUBar?T`&=;ZLNt~S!d&(eKE2$I6#BPI3>{QiijW)u$m0wF|t84Q{BGOF^BB>nD zn;^fAfJLg2n?|U(Y}^uZUqikd;uq0F%SPcM%;A1}vwtnajW|Q!cRt=BVykP>d#8(3 zMq>2anv(%W6T}RRX1*$tnPB*C#)p&q8ofn8>&H{vQSGBb`Kly#u#Tm6y84obmhm7$ zy?sXA5JfAa7%P|3UA%g5#ks+pTB%}S#?Vd(4-6dn8QkRLHZ2I(dKoXJERto(87NT<2C;Cq(20Tx``3=2jv!6FEnc)Z^63 z*a<23v{N6^eWf=ymiBUrx)N znt7u9ptD}2Wl`s_XjO=JLoXiZw&oe)+Q9_}+JMXa+?@^f>f>X2#gok?#S7=F2gCSs zoA>YECb;Rky>~9DcQn&vO|FgOk-h1Uwz8Batn|z=e>Hw1BEpw-x~AZ8UiQveeWteK zLC)v18Y3aA2la}WunmVKjCnO4v5b-{uB_F1^Mb=c%U^G<7B2=3eGPiPM{dz#XNV4K zOJ&JnVR_k>x)mxyBwV;t<5bj^IuuyTeaCi&uvrbQkau!bZMO`wP`i;bxF9Y+5B!27 z?e{sqc3WLS+a=`elO;%`#f99bxgq+#nq5no0@mfOqxJ5zrLM3jt9#!k5_X-8CQPIV zhL^sJFbNYcwf|}yek?d_Bp4~m*p{04YnCLZs!|jt-cYQ7wf~fdsYQJ&M3Cs&TaWsD zz2vT_aD3E&Fl^~uIs2reYg{#C==)FYT6Qf7bm>XMXu3t2!*nH)=W$!OFxaU=GIfNN zwXLh}PK*rL)r7S_O|-mNq|f?!%Pm9c7la(X>m1iR3&a*KFS{jb!QiY zNIi<%Qdk_maO?~4=r(1~3)nTZAGJ^h80o(;E^SL$SQS5oQv|??@RnYNKZcNXVnNzc z0tQqvM0|DNLbuKmZgLIUewU_^tr^;qXy25{xxh~5#21Uv`9XQN;iK>!4{*)P46j)_ zf**d}7#)RyW9KYob3eV|Zp(wpo|!7WAf07atOneiBf~sz*q81mw`o>}le}k}2XZJPo);N9c5Yt9JMqj@36xAB_2#deA_3Fu|^`|2*{>w96S< zvLq&H2%!{c$SXD|8~U&gM(76EgRv%BZi-degOcJd&YIpakpJB?@sN5@TgP3C;hfE# zh*E#w@DOo$;8})_I{Xh(l_2Mz3%vajDE^<2s(vX7f8svwCL-2nhgm5C6;7Auvv_0shk`D#-cgpzD8?xCHq)|0Zz_g#n4nZK5y^hGuF%rtGELD5Qd@xN(SP zAmfh;7>E~Mkd<#A|s5P;7IKH2lIBmyZ;*Cr2KUxj)*=!o{4E!iIqeV!n)zLvB$a=t@W*}tDeclsF- zzImzuTQSQ(TBB+tVtS5p1Pg$uV;a zIJ>Yr+S~{@pwd8z4t~SxF&fiJX%W24o!VZarA?AzKAw=+jLZJh(iu~b;9CC4T$3pK zofLtBn);GjD+fmj_U_kB_x3h+mvpH+no(Gn3s<}8b>p5Gg$s8d`gWFN-Hm;_%7wem!8JE#zldCIcHieI!GYti1Z>cs ze(|*ustDElWNxd!S%T;;8}GOL{_vi&;96=*nZLUX25^!2yZuPBdUjxKCFkNa(iOvh zXqs-@Kv7Xt^iU?xxjM8hGNPwqL4#f0S`FjV+co;(hx7Bn*fw<<@4NPXR`W%LzL)7S zbS%NXA3#+xCL_)8;f`?Cisk*Wwxd_Qi@HIb2HRw+b8pag-qIZ za5zqd`5v6d(YSQqCyt{(*8B4Z!k0st1Ya8Us!l`dBE$KHy<=SHt;M(9o3Cp>#0qRB zg>WY4504Dri6pz{M9f)vVQr`#|5DglhO2V%T8x?1p~h0&EOm{Nm` z7D&37gI>6n+6g6yf#9UG=+4CNzx8$od zz$~XKyJ|L8#?z(X+VshOJM8!_E0Uj)f@5{yUS~&s-CPs~MT4YwKOLCQ(K@6gm+&6U zAMr7(%hpQ1m%a1+q{JJRaZ0T`r|9B~?RX;U27jqqB=)MA0}BU%iVrSW)QGn7np9~^R^%2&>wN*ZCK1V=W`7-u>s3bNUHXhai)h+PMwUUzb$Gh2xmMqp@90*3ba?y(Z`H3!|Q(X}=ZTR}(ICHcMH zm_~*;-d%<`klUg_o(h@AWV^(NAyZlApMf0)&SbNR<@QcU@lOd3pdca>95X?%YOqxK zq#M!;*eCDiU96NuFp)H_&A}KBymiJvsKZ+Z@fWy!_^yt_+sD1O57; zlO%q35lYZaC`i62l{vLSoZ4#R+ufA7V$l&wN?`LhD?b=>Ovz+?&`r3>;4H}skP{qk z_u7)*J|k2V>h1sRY_#reKsm(L@!f>@U1zTcczK4C(eDpc5P?!A1J8~F|C|Y4T*KsU zVSr=A$u^Xq4efN!NcDj+`>zvk-DJ3VZ0}-_=4}P#7d` zr1M8&h?S)p1m;!~U>W>D`@<2%{F@YV|W4R`W#n(4HCpz>YWg5!?r79c{DO zy0V^CkseQ=aEAHmf6C45C~j)qY7fpz5BKZXyg+o1w$SIfX^VA&sU>>o zL8^o-dewU3JObLqv*RaTUJ*||PmRo%FSa&LDg=2wFy$gz227P^XcRijAe1mKFrAtY zGmc#iFB+XiujHjTlsGT&tIyA)CDkN@&%>lrpYMb0;|dosW@SAyQJni8tKWi%dXXbQ zkv!F6&sd5iMqfdKh8}G1xqM#sai>6qcRfLO0vVTn4s`}~`Vg9VaozAZqE=iB1-fD( z5rGIEUmRJU?lMWn(Ur5$H_}KNiFnYmQc2vJxts8ot)(D!fK){lAbyb;G1uYNCH~j= zl(DE3q@%z%{z znPPM3h8XL2L&kn}Eo4sfm2IBrsONEOP_KXy_7;dWW5&AC^3ik4jN2-X5b+O;D9{g# zS#d5ss`A+lbPVtvWvK8%ZdTs}3!h0w`_9$U53hN`*iA50Q%sCR=4h9c`kb$nyZ|17 z4~%iZe5**baKr!i=TQQcZ@a;abljqM5@f1la56Q}RlJN(4Z~N00^Bub4AZgzs$Os5 zwt$$`M^?o?n=9PJI0BjK8Cf$|4FFL7!@G%qIj3VRBoU_VhW|jATb;L|w1@N2S=?;) zcFn=j$h!&mHyrd0us-W*2Oe2pkJzaO8j^E|BjLlts_hf5=AEw_2BVoB8wOskvyO%U zX+80{ODe4=6Sjxvt8YGU$OwA2>aQR^CN88Twh3LxhnkUi znfNE=l8!5HzkTy#jAS*vZ`+_Qj{{ZVK9SzG7qMP-;}a#KxEnd->MvJiV>>a6VGVeg~3ylxhHQ$&m2g8Zt ze*O?6ifdxjy#!P-cNu)h;lzt1WY9bIQeD0_aY&gb^i+e({%u)m$(JWkmAJsAoA~nT zx(urcZH)4|6%q=%VR*)`)r;@3bX8yRcxzVxu#Z2lNo9i0TFv=w)L9`*e_`nV<)J{!LtS+uD|ULP$qlXi*4Jgl51 zq2fUtA`|)ONO)x{5cGbJK1F_0gUNqnA3-oT1m{=wF@W$g`*&{In2dbx@P+F43ODJ6P+!nr$ZC#1bo|?3N<6ClP1TBfn-nf7T1~PEqOrF z21443Ve#;YI`qIsZ5OR#GX5wrcvf)&$=d=jYb0;$1fRSW^4BxK557Eu=9207I9^0E zG9`U^2EYyeuQTAnX=}~<^BF+9kZ163M#OhE;Ito(Gt@Xhc0%0y7;taphDtpT=(bXe z(2D~Lrg_2m*ymm1_Agq}+3#c9y9Pe}nKYriUHF8aD&VKh>ImVEUiSj?d>bwzH!jj9 zDI+ctb^U(Px}UE0LoSYSVR5bvnVrm#W2F}I34Z%edLDMws$7}9W9e~J6iESD)vecc zRfTt247N3`&}pj&B0Q(;nZxeqc(1DzNdAA^on>4V-`@7I00jg@krI%Uj!mZu5`rLI z(y(bz=?3W*&`ob7rMsjX=}zhHPN`>Y{Gapu>pu7AbIy5nzfgvm*|XQ|8P=M8t?T!_ zIAi0PU2Xfe2hot#OD*&C98rHbTU@6(zq~GS!ApgB^BZxJWw!ba2WK{^hjKd-AJyF zn)|5g+aZ>b`i(ATz$|5g$Kkk8C zOA%5K;>{Yhd;HUNRUbTfVbCPptHPpSr6_+t&eytTbJYyJYUc^h5^C}?1*jej*o_=| z1F`_pLX2L4-rskZ*|0F5p6Bb;P@bz4AcbnR$3w;w<>$BTR~RT`q5D+KU+n?TtYXtZ z!k+(~cWBH99Nzv$(JUJ~D0}6-7P@JX_j>7Qjha7}veaVknxPj0Um+gw6|#_b;y_3g z9-XiqK80+J{Kni6sR>HZiG~Kc5H{?C`~Lx-?*0!v+FupqSKGo2IzWpbeEzi|)xLST zl!cUoD08y8hwyec-Z=*{>%#!9a}Mus4!8}Or7V)5fSmcoPM}IvkTwEI^$6ebM)wG-fX6$VwHq_vqxj4H)=UlN}`&5g8st(3q1 zpk;avi;1flrJhBD7&UT(9$v+R)dL+Mnj3U?`-TFu2D@vGc`f8)e$Yw{!e?PK@bv1Q z-An0xnzyyQ-REuG7b;vUEm(yUb92~hI6Mw@!v#00j7=^mi?ZA{h#PQz)kfJUl+pBb)~ETO!)tz`skXPXzH8)(aFUA zd)v@|(j;y~Ngikju$ujUOgRgnx&NtApfK=XsZZ>`*LePu_8^KSe-rJlyk`Jg{x9{q zzx{Cjdb9p}5+Z=f|3e9bfJMahVkbq&oL4RUr%d;o^XzY$!p;2qvfh8GeR2NP-W5z# zitP-vuO*~SwyjsBs9LRI@!_c7QMmFwknUnFUAoJMz9?XvsNl_1Z@OcucG#gEPCvB3 zmg&8}C}ie3VRL*M6XeXF_#-3ppzIvf7S@nBp{mu^n6LM5p5gB77<~0Q{`#?29QPd+C*t4-MSopjvV7sPtkcBA(dg(z)z>KOSW5SynILVQRkh zCLt+tTDz>>+p}B?%WH?3_ukrqIHi#)m`+?gx0{@x(U9P2&=sqwKPsV$tZ-E>s6O4_ zJ`KShDs!I|I7baI_O~vL94|pxs?c&Qcm8=YgL%5SMq&|vaWXv%OZs6czPUuNFqQU}OvZ%_iMH&8hOdm@&^VX8#@)Wu(tNC4X}Ej&!S&wD z>#o%sQxmq^Q%ILiTHRcRAsf1mFhQUAIxJq)B1b!_`^PuTdK+wO&qa@2dLTWEJC=!u zN1mq_0ii_oftC=$oZ9ijvYk%NZnhxQL%TC-FbAO zOP`JNdU*3GF-kmSO>qAtt@2xYU>=+o8cnz%bBZ@+ZW$ax5x=&}pB_O=ls5SW_X4LR zY4cl!^N7zw`}{C!ku5gtcP~rhZcQVWZm+iX{znbh+FBvEWwxh&}_A{gY9itSSW+;U`2`h zBm@)r45mZ8ixd#XH**_*mBZPx0UuH^;~$Jf{W&$?};rFkWJcx@7m0b9K1Ml0TLGu03=_cZrsNb>@7=_7R zxQ!mFwrxgHi3q*Z+SWbbVqC0NZ7R;ww|YAr*rblS(B}2pi^kK_U#mwxb2uEL3ESFQ z4(as3VGjvrkw!}_<_Rhtp0C*SI<9($Ud6h&rd649y*PhZnTN~IM}%xd1PuFZ3Wn~GJcS=d}Z2d+J1bYZ}!0mOo&mULglXDd>l=$NBqLZ}L@0`?7IwL{KOWD!KPMT`lbTHNbDyUWs}<0vtHt-3 z+qgA^!Yj%m*V6%zL+-UB%i?^#zmf$IW!2A2Yq&(tJYv)+jCV zEa+T}2^LzPYEJs3tPD6dtYtLTnuST3M);T|gqTi=YY22zH*p!z-|!eL!jCdd;rQXt zjx;2ymw5}Ft;YdUg>;AKzeo3q}*+Qjm5d+SF_t}aUG-1 zi>h={@&zZ~gNyf}k-*pPPf8JB%RGw?-+@@slV__Xsb*&Tp3lsXd{k4%y3PNfg}1l6 zlLYGC`fYY~wyn+fweIP$aE{DfJcIS`Ly~*N7`o-QVFvelvS;z#fTatRd9buYe2wAa zj;x?CV*y{7{dX&kMy8{Rz@&Ln+$nfUa}?Bp8AKCZP5jS;iGRFD4m0_D`z`iRqv*Yc zJaL|Ub>b3$m_O74Q9i)3rUDnQ;6#M%;5P!#T*g%f4_Nt3eh*!%KTl&%(n609A~MZa zxEMyfgwc(@l7e{(=J*LhWo9tC=^wR=p?Mp8H>T5xUyNcqism3mQopkyruv-ll<}r5 zT{o1FG%HBflRf4YwwSRddiR$>Ky!(q<4@>h=tcqtIa3oL*8!7WcMs47X7JCT_Q=)v zZ~zGo%=I=%Q$J=4BCjMt?7+>|-9sQe-#O@yM_J{oOm%)69uD0De4tyW@9oBmG#hV;=)cv}BtqDN?Ga z{low!>HC51o`2Z+uIfs6{c_B|)@1#$Qut0q_<{JaYmruL`_8vpbL@?4 zxPhZ(OmujK*EXNvon}1PL%yZEeE8u5i(d&(jcQ$4t;FKyhn-a`i@Hc@TctWXYp2+> zF|DQ>9$S@RXH5YWEQeG4?_!=(p*>9LXiqd0%VfUITFAPpZ+7%P*!H22IxJ*wa9pWr z8q*eLlN(`HFTTY%zKA*N-_ZRLmF~XCr)FDuZ-)EnMKgvQ!C`Td$!G4>t|sjTW^WS1 zxWt_L#Ha2*%1es+Ce^Yb-HHe!jH>@hj1#Q zsguYO5o^7XcpD@UUO8*ar_ zlVt-O z8Eoa0@P0koFG4rz=jf7KS?}5P20WK*l6w-|UB|ZqHlD93KOa7mUB$22Co3=F`rLD? z=95D+lf3f79Pg3&hu^=m)x56QHfUt4`EnnoiNt>P+yqMoI6`N`_sM3<F zv-J6O?&hU0M#$3FAVH5o!l(<)=qFLEwag_tFN-=50qU*!vgGV40@V08WnOzA45Ow< zq>G8|!*m39#D0nCiC1#O1@90If0c=_w-CodXo@brcGIpz>6rh3!FKx?zKc8SdUWTI zc=>=ery!luxDky@`i5KlYnlH zG0`dA26}}(&?{U-hqiqG7}V0Id?Td1Sd}0&aW|ymm{*k2)scte(%!0OD6VtSW zwfx0|XR2~%8Ev^=m@bhQ zhHVrhg0qV=kX>A<^m(EX-5&ytzVYqDA$@b*4b$Q_#ZED4rHMH=q;3J&D!aJ$e z)2D3p0s3&XYFho~OmBy+^!|3sjG6PQrj82f9|G2ChZ*z^vY`x>?wt%?w>seuZB;O7 z?r-f>t}+T%obT?M!xtu&SNX`|)6Z0gsi=C>Ri(cg-x>{}Sha4e(CSxD5k*~*qs5T> zDo+62P4do=qjlqUewm`Z`01rkK3@w*HijIHY=fl#!0WfR)oSJ=VxiLkN;G|@25P(9 zcYjnC;*WB;wl(*;e?x|GT7WHJDs?gNHx5uyqjhZ#qA$m zy$0M`?TgU{(3x1H>W5t^K_E{T|0zZ{5^z_e0ZS$lJE(n}jk>rIu&rSHP~g=Z>Q+3& zpX>3cFkkQQ`fIr0C^P&Ty;1{2FWgF}g3mP5p31%*;)V|g004uqLcZ|W1polBqvCFd zw5nXKRK?A;qxxo~Y+#ql{vMuyeG@pk?Gf84ssQb%8Ip{R|DbEPV<10}&B8ua&FsZG z#16V)I#oU14z1v_CUkD~Hh{{+WfLBpf?gCPF@Q68S;Qxocy$J;!tD@B)vJ}@vyq!+0}k+h0`Be}RNy%;yxJ>F z>rIumJjHS<>@A^q}Tzv}LDIy*W zX8O-9s3^MZX>yFa?jD*jPzGGi)m^I7jGEo&qfycj6Yy0#wx3~o^SW!%f&Dqvwe~{? z>xTD(xA78-zu%ZH?I?06+K7!~8aa+AKhy^HT^uNIN(u+D?k(Js!@QH@+E zWcQ}d_hy_R(_E#(!QFZNWiM)OAy=@g!Eol+SABjPyLs6!YYVD0CYaTipLN7mTpL)k z@@A7 zU))asvL_Bae>jscwd*b?xXSAXtHH0}EW?=w;8t<0itc zeQLYKb%%rB{%QyLbaRzBJGMJU4~(CJQ}<5abH;!yoe~%WTcUGyuJ)pnrYL)NAfoY$ z_|{bp!K8N3E=qpJl|5%Uhn0p__*M*f($daRf`BJ2$Z)35pkkwdhXK4&<2?G-g6Wn@ z_oVBGnoG0?vtzPZ1?TQlt zzG4A7#ovh&minfDQjz{!o*_;)MClt4v_QckD9l4BC9I^J2>3Xnf&Xj^5Rv{yB;jKJ zZ~3Y?*@0SwIQ!oU7dfxs@Sr*WY{4IWXn)(7|CaxZlLH7vzpl^!C)0BxQUU*XeSUAF z`kMxEGylFp|58F?XM_CNKIKo;ib&x5ZqP8_Snb9VsM^Q(0~ffby74^Fi7y3@Cr5S} zqgFE%OFwo5ipUT81#U1>&%xXJHl55a&5$q7^1?$XN2Cik3@`-7e)) zl*)0!GM=dElBtWG?NUM0%Vy#VnsXka(_>(sN}z}jth>GL?Rv4hH#Bv2xYiINcnaX_ z0$NkieX!?G80WTY_|}cqE*lQkoY(HZNp^Kp(wNlzAHep4QUYrAT3a!7e&c?2m4=#H7B=W&;p6fLb+Wm{oR_ujMIaVj-B zDlWrHSMS?Q?9P!rO_>l`IxAr7=yQlMe7`;Li)MiPbK8b@NTMZwI)Ysn9to!1i}Ak~ zyjri*y6-#jd?0l)W~}K8hUdAY8dGV}X!e#%q5w<9PRw>3z%=mVrOo9ds8QsBTs$J# z{CA8Rqe8E-0pz(oK%Vac!I%^Oyoizu*Q7V&8cE>x;BUwKL&aTG} zh+z-0=lK8dk;ZgoYZldg&O(*C6OG}veTV5W`dJ*yA;YZen84ZE%!H2shut%DbB2-j z=6SOC##uLuY4*Hpq`{9X?r4&jHrxFW{SFPDHeNGofPY}85iR@KFvV$jJ0zQObMl4U z9it~zXsktmw4JnYt`OlgNSXSzWU`)A2zqo&G!LJE{LdwG(c{ZU--57GeRv{dk+xbq6_3Nd5cGkImzT zM`JA?FH|fmN!AKQ;Z8%02Y8M-nb|uGXkW^&74{#ytG#3=f9D@1Ge2@S9`9ON%V<~= zR&|Tjv+Fr<3aQ3-=WXHb@6hrl+Qe9M$b!2ub$K6zUsE0s%r7M0${taPb2xOa z)^!hNc+zO)krN+jQ*LGL^eFLOfEzg{e4)v?VZn`abHK1Hx;U}=778^5S9N4w;?$9^ zr8ed*C_`r5L5v3jFOjmLPiE)`-mU4rD##m#)~}hb_TRpLo0vC^&idlpDmK&NbcLI4 z`w2&E%?R?w&L)+_H@k-S3P0QW(TPwUriVYmx*hkmDP|m#p@H zEbQAdD$I{d?xd<#(nmsh`D44^Ewfxih7unyjTve)A3c@u)h#U=i3G&$)*=#y$h#8# z&jD}vDzn)CLpn@lvgcg~@pYz1EK4Z>z#GozC_t%o3poJ^0Se&whxLIYn9O1*=0>$v zb)ISTkw`JYonS*%=zU4co2tx@0QZ?NQzw*Lv0KM(BmBi_9%{S4HaA=l;g%}r%s?24 zq#sHad$uy(#k7z6{-r*62&#tZpIP~-Jl(YIR&x|}mTsywAu?lu1ztDlDUf3fmF+jG zwL_!QpJ_=+K`^qTdeMnV@~)>a8Y}00fD#bkBt>~^8)HQqDNB<*hhQ|VMhL65Aa~aK zP#8js!#{2&Sw^p9eq`%^{S0D)NwEWH%l?cNALTU;$=QVHUoC5w|3W~#ht=JAT_D+T zvz-mNIf&~hz|Zfj7;*)YLSFR!%#YjIvLq zG#l=d*I&?4fGT~5TE%-Law#f;9#Um9zXq^rN(>Pj>2gtKSfIRyfFOJ@W4(1cJ5@t91jg6m91^FSZ3bFuz&r%w}>hdYt z%hFVun;@`j@>c=v2#g#c#!V}>J5j5ovdhBo$(dm)i237a{boR)ZGph>ac9J_+1u%X zYegbjzxJBXu`=`^N#b08q(QM4mj)w8h9%1JyHP9cu0a85xuyBSQjYWWd@QTmtpq z_ew9b%R9{!y#Ztz%Fg*LBdR5iyTI}_fa9Kj4B(7bqqF3B9odA z_nkUyC~u*V*NljWffoU`SRb25+NTd5?_S=yyEyN-;r%lDnPea0aDY12pC=Bf`@U7I z#EY@QeHY_GS0tLs(hQ)?hz(~SRiw~>{CGK#AODZtAqcY0tC!*R7Ul% zd1N9G6AV)oUqOnEqtmIUOgQCxC9}h!8D|=fY_iemtBxDNM$!10I&2WdZbRrscyC7@ zY7*k5fH>}#T0IQc;JtTf6z$%(a!@?28@6Oz_t<+&0xh_?s?VeLNp8{7;&xPdY0X;Q zWw*oIz)gvRXkTZe*5#+39!w|o zS2-}pZ8Gv7FOT>cw}qXHkP0iI_T4kYbKy>yNPcuGdsr>a#}Y_d-lJp2*Pae}tCnguvC^OUfy~f^$z}AH=FKGV$>z^hPUq|fcC=dG3nGze3!~}SMFz>9J zHdqC@r+s2AD1F)XRB{;4w~gQii;6C3stLMqQ(+;78oS7$)DT`_9Nb`uYk%IcL#+F| zrP)3`|It(Fi5Byf6Q?mR_}tfX!=QJ{(L>1pfJP1AjVhezHhBAy5ORQ{jy_P(C8dJL znMFF-lq3{1Kb0K9^IajhA)}%TQdQRcvsfI+(^1@; z8_4MC-pH^wYwN;{a@t4;rGVAr)GFwj;^j;K6_);T%Q!LoV{-mhh!BH81qz5jRQf{M z9Y}H;(w>COP=wyN-%#k==3}sT%;64c}iaWTONpVfU>}LYDpyzx8NSl0sw0W$3{A(N^VAI`@6ECnFw&~yg^+ItqDy{n|?cMR^~l~AiT7lGJeAZ(RGKn-Nt z*e~PO8s8B+MZYcwgK?n3QnDTNcK;Q0f8}1$d=%w#oc1JChHiiiiv`xmCGh8WB{=}! zvt*a20gqgs@}mvBP$5+8M`b9Z(s)D4LiO7O%DbDbRW=e z@T7~));$jl%MFAI2tzla9hIiQ&cXZW6_!>@_Ws$nqm(FEtj04)oWlAR&vI$1$8L2Q zCp1C^W1qUrd{{D5LNg4tLNmcLcisNZzC$o4=egqz zO}Xb)PQkDr9;i6Ft0rcH&9K`k_yXDe?t(gYsSk~_U#WGHH#LhV6#u9zbIIG#I|)To zhdiR;l_FT|)arT{@m3c-_G^%Ij{aOVbr!>^cM`3!ZGOTn-Z7?Cm(X>k&Lgf@#|FoH zf(o;}jDIVr{1vwIe?(A0eE0od+&LWoEh`KsLb~`(J@_YRh?5mmLm`xn|1Tl@pwU&{x7ZOnhm4a3R&TXGzT^!o?WoD%_D|AWT! z=d8WI|A79g0RDR-7zY=)Qh&Z?99Qi1KU}jvlpp?Glen3GuZ8_fnFXBhpJkTdN5H8Q z4|49VjYBOhYEiL**j%K@NJ*v}?_TG68heQ%`vSLBwVXY`;AVTM{xe%C&QevW!n=-} ziw(UO72L;roy{&;@1}y!xmGuP;IQTUx{w@Jxu|Z`r1#t;L?+U$nTfA)a$O^FIa%5KvDL8g^>R{sk9k=aL-pIRsoKObqzi@pbyjvYwp3-1)4(2<7X(7liv;x-PAq8G|8#c7Cqgx z5S%*EHEGVeX(lj%72p%nQcEDOOGAT^cKic#q^xnhkYpKqr)&N2UV1~`27Z2-XwB9Q zwBpi3fu(!M(bp$eY#s*N8wi+Jn^S)MI9L19M7?xg9o7Cz4>EIn_*8%69j$X8U$ZvF z=k(T~kOCJi^3}c^>31z{A0ieDQGTs=PUiM>l%D6)CP*!V^2Q%CJJq-{Li~PEdVCYw zK`GUoJe+rqykd1nyz$fiGOZUc^(Ml{Bq6A>I;mS;@Dz90S6_=a==;*5p}7-Au)}<& zHKB4r@uJN;!yEd7D3il5n;*pG@nzEEi}hC^pmJjL@f|xLw=D3#Cd$?bA@<^%{h6hw zcL<8`iPt^>qAXcqy^P}a89oQhZ>Z{>a&ETg`OIegQ~E7|N#|26i|xG@68A6yhWg6o z9Kc)Oo3QP=we^PY!Va+4dC?<_w)92&&W?|M*xEIH`!q9k=Ms16@aS%IQH7w>I=LIu z09ML#LG2^);3AaexkqOKuIfLU2uvXXd5r&yQp?VUQ;>pqh(vxZ1aW)zS}Yn& z^FWcZ6?)ONxJaVKSlEPyUx?`n%G?qRjzsV585iaO^IfyRpKzbD!dIT^^!Be8u(Ju} zv^Nw-L!TG1-M~8}H$-OM!szsrYJHD!Z6i?;P1q4H`gUC(n2!2I3diW2miiJb9St3O zAq5%m_!0#`No86_-cTl8yDT{o$5P)8e{=3A!JR;5&+mXgcZ|z`8LvcsW>U0cA zAShAuVJ}efbhL(Pmm+N5-q`T$`B;S_eVSeNtaF()Z+P5dqLdDp*uJTbdX2?s)vfSx zS*zQZ8O!EGC!dY`tFA-k*@Z$ww zeIFerF;#IWm;Bgrw9^ADp@s0h&dfMsUMPX%*RS(c#g{~L?u(_ld{}eBgGc#4iT8{x zodD{4WNG9_01}URp6mP$PKg88%h+j=`}W%Iq7F!#JB|z)0X@3qWYIw#X3tw|Fv`h%QDKWpD1w#eEXLnPsZW_}aJUO*3Ep*BB8y;h^KFAV+VPa&0efQRar|^J)9F znW52beZ3UqI`yMTxJCWIsKsq!rXb@v0nv58nR8@m!L8ZAwX2^7ckVHzX(`9Elf7g+nLclLXOO0enz4w9no%Aw!C6&pMX;3^C9_z*XZt@n%ZVq zxYw(8(@-YW@8Tdy2(E_}56|1Cvxu~l!JI>KsjoCozz>gi@584iHp%s%_k9zTFvbcK z#BA1hf+YZ#{xph_Dg4wb*HJW9x|_2`ZtyS|)o+6Cr?XZ!;RHv{om_s`8!6Zp5vCPg zoBL-&a}(`6Ohbuld~T9)K9L!FSgY63ruxXn(3Xl1f{LSgFj?rRA7?C3G+M>^C{I|& z`K0CS5pb+lDr2fI1+7)48CEH&xR65EDghv=2LO`#46T#6cso_pmT_Qad6L?+=y-t%LP#%wQ!HBi9PjBdD&lOS?}|hG?pkqml0uD;WnMur2-(7a zzQYa~d>7ZUzw9G=Nf5du9_{mrF8=qZ7{2uuBd7{+jBSha?5Go01IO67_CFkB?qlNs z2nHx&g@C69jAH;342)ZV7~_V~Ql4R-stGJ(4!|_3imR#nD=)w=M?$?h08aJi zSAaag&^^#wfx1Zm@G0dJDvV&MjNd_55r#Ga^MIMD)!Ix@g9C`q#IZwWo$a(inBvIP+xYEl!Xje*@{3C_@Yo^CE%kUh*eaF`rriqhEuTD8rjRe(8yV%cECmgJI z%FEf;j`YEQ)A;4qz7?z;gv&!sDG!&2*op^_6|B}~+uNkqQ`2yWEmzc(N*b>unT3m5>@YrN=nT5j*el=sPl4| z4g|BKsPhJ|RZ8KXZ~H@ozMI5@`=30BecRYL8#b&C?tcNo!?|K|ox{$T!qyvHhzA6P z4bVDeEE^*J?Xh=3lw{`Bi7jN|P$nI_964cL6=A(wDpHFfyy=g8u1GL>A;ZBBcIWpD zXG|z^yjrphQ$>Uz?5fe%B>N?U4A|t7Qt_`vQ$di#w=m4w1lYDuewzU;MVB}w~is=*6AYjGw#r6&J(nEcT^UJdT}zn zO$w4WOhw)^rnEPsT*m<-)Qq6V{c4eluzE~`yNB0U0f0Xd-;=(RG{b1|?IB3c&GaNW zM;GEc|AK=q1$>(z2cTcF0lAZ?i)cM$jW1bLknecdm+uv@*cJ5|Ww}#Nsxn9e!4D1u zzgQ?Ng`5AQM4#W%?sk?=RKuu;bK^cxHY%dHWBEr!B`u&>g)#WTfPTzU74@vc97>P@ zN*`C0Ec2$ASYi15Z(%BkehCVJK$(P&*R@=gg{i#wM>IKL_E5~jt8U34O4rtc$uswv z2Cb(Mk(11GyJz_GL7v-V#fi03L1(nSuFpOkhkI>b582nG@hoK2P(WQeuNFgHdc-G+ zD(%DCv4%F&q;Pcaacrt06aK-i=XRrUuK8G91cGv?OAP`Ns0J8Q!CCO*Fiul(+81l^ zrL6kT9gdV1nzx%H_|=UEmD+wTphozger|T8$m z7SGU~4JsXNogtxCJ>cXTKW4r2`bn!X=415@c1cA?4Awynp~2j>>x%oO*V#IJUt%aE z$~JtmnPA>qE5}fny3>;ochoQ(DX4tRB(m=l0Tle6VVtY|QqDNC z_Y*-z20sXfOUgK0p3OLfVrGr$g3mlaRW2Hg1w>}WoD5{)WX7-3e<&+C_Fuu}hD9^^ z%hrzh`q&ALHc2*5hPPXRWrPQ4bxR1yL|<&-tD)N}yavJ?)bX5$Q%EYT9 zEMdLA^%v;f*8Yanfcp0Yyp(?qf45m1Foh0p^A(o-u*g*}>}4!ko6WqSW%pb+PhHKG zHR)+JhZ2KBA2lGYkn!E=8M7Ap46aFvI%kLBFowdIbqkbD@m#@puN>8AUAj5O${>Wn3+u4Ho4(Iny6= zoM+UC2Qj{fr7y+|j3~2CcW|b6j<#b7fL9xVu^Ft54AO^3S;!J zk?j*~F!Hf$=r?%eFLB3;Gm5@7_RlAbrzGs~UTPk!PWfwWj6{U-saFKoU8-&%hJZ1| z5CHz0<{q84WzCxkjiC5U^+N6Vuj*g`kN^Wfrd)13 z;jO|c>GDqw4IdpQWc+n=DO&>2hAq@%VxPpxTK_vN$u%%~YqiLgUYW=5> zJdVH0jsK>4!vX5dekX5nAh6nhl(&9m^&u3S|EV#*udw=$J|xcHf&zbou5%z5=zoy5 zezPzASz+U5`Mm=9ucRY3W(en>r6cnK4~AD$|%VdNR(7=bED5`un_*-nmy*`zi)! ze?oITzxwp;(Ya8WvhB$>q$5pbP@^*2CtaXa=Ed>eO#cLC^Rb@fezPZ%E9C6L5Q(k% z8Zq&-v-{LQ`}OMJs>(t8<(duW)dh@(nxwn1DBEV`DNVKGIaAk1NFnB>xnqyae!P|C z4BQEFAZ|J9aaF2HTPr@y?VP&^iNL%pcf6eGA}o?ESlnId8cfP=Vg1tZ4NWJZ{53VQ z)HU?V2;ErajEE3rUZ44}7(Ijp%(#RHuNCO1_XZpKFr3B zQ`x=bMmrNK{8|Th6J!#AanP%Kn@rt}GH3Ch^2W=Ysu*gj5{wLA0eJ#T+w&E7B>9mu;wAk&gmy?ok$sm&<^)olhF)l z;L#TsG1mjR*4M~p5vX;+cglQZEn?s?J3b~0J0H2D4^exo+i+`YtSJgt`c)Of4Y9BmH}VnmAUq%EhWMY3yzlid z;Z6uo*M-VYZl|CVn|6g62=Uom0(}|WLU(hu{TThzH&&;YZ4;*##DX3R3{ye8OHISq zT(?98;*asN&el6l_rCizRW4S}MM6?%i(Kd|g-B4NRV>PBlszfOJjqnZ{wI-UQ=uK| zWwA371-;hAmIFy83@D~@lFHbfs<-xiH zjz)|PsUloqecYQPyP4rCubC)RdQ9D+&oJavUK6^1|FF1xau2>YA25+lZ>SpV(_O?8 z0?94-GE@90SK8oN@jO%V$|gKA^)xsiy$F7*os>c)RXbLnAXzyz;e$RBoot_3WSA8p zEyaZQZI}^Am-fB`GaAvux0Acop7p*US&3I~C!AP3GAlpyt*RxdyC_uRxz(tb=WYRs zHolJ0bIkr<36QWt^rs+Q@;A>Fqi`!L1`hCAHL+qm06*%0`-;B*bsaFU)QHrvCcQ1} zFm}(AY@ul1#|B?Mla?g7jA1IcGtaOo+p!4uxFo{#Q-^IT1zK5eQSB|@v z5P$v3UiyCG=hM*Z%bxm`JYSF{AH4?FeZ-$QUdG&KF(yJ>`}cY_IN?*_xx`mC~(@%KN2e-gNCbBi-HgfVg` z0~m5_b5dZpI~>!8LYg4l4$Ke4@_Z37$p=tZ4J#n2IlsMV&%Gq6}u*4 z)Zk=Oo+y%$JZw{O zURu!ooPO`=?&At?Kc97iR7*->{hXWF$?qu}t#ZKM%xA3dZ})UoS0cRqziRSuSW?Dk zb$o_$Pehasy~y#5?E1VoVkpJD^t8~2UoF}|vZBXHZ!Bc-<&QqLmM8%~>S~GpQZl98 z{IoZ>S!h~GQ;A)#v1Pt#4KWBGF+JTABvX1W|B}_W6>N>8drWIdS(~b>3;QO^MDeZ9 z)P3<~1yjjvbJ|E7QIdg)U1xaqp*A-01C@oBAakzIKTOYi*rrh+j?RAhC;(X2sAdQJ)vSy>_e!xeE$kK#a zZH?M6zGm}Co@VnjF7VSXvQ*oF*CTDbi_Nr8a@l~Pu8xmjoa#&2DR?yGe#$YZ3I(&ZMhdPn54ZWP|1DIZ52T>3bRH-u5otXFACvw>`m z?QJqz&%E+eQM*h{Tj`8%a#cR?QskN8z3CwmnwSYHIzp%Krt~wPhK_Rt=m>Kj(95u? zt=+-a$i35h@)E=K@=fni#(QULg5mu|lm5NK=$ww527R0)^u12sP&dtA`&r1>t?bPX zi!@0t6r4BfZ9pP+0qHz;cMvI7E;gtp%rEaEleWQ?$`^qcci@6OureKi)&b4b~-E3nL&MTY58Qf zm|B`bDq#EVYugULAbZbr-o<_sUQpPJw^yxu(Y$M`c+@WRUqu~G=V*RAG@NHw5rzdFEG;PI~|oCf^%X$G@a)}O)l4N}S?Q!JvU zCkm4+BwnBN_a9mIfqQf{_=EuQj2H-3?CEn83+!Ait$=}+Gp{4uwnJ0ytm|jNH>?^< zMV}KSBbd=;Bmt+K0B^e}aOlGI#9%ZA1}DC45RS%qd_op6eI9N9Nf6g{c>SRgqhdICDV>GwnQ;RiAoaB8)66_N$% z_ML4S>JWZu3;B(!_DjCAU~<`#(vUl2oOD*3wWV2PXxw6>i05gfs6=-W6izyoxnRCH zK;!*XH|4dHD~VU5ewH)olyh7aW2e3oQ*_F@6T`NRzQY?yfxd@4Ya6ubHG4#)QQ20+ zbic;rZalTi7BZa9B|HbQ z$N#2U{Z+F2H`O6F1p5alQ~)gwY)}aL4k-r$QuGH==I{JQ|ASP-`Pa+xZ?=pTQF`|$ zJ?)C={RchmFQ%japR?5<7Ni7NUVIWIj-P|S0R80N^rL6kID$L+%Sac3gX#T{4{3On2p4i-__!#$^ zsYml>w-3`whTfmfEcsmWacyCSxSG#@&fi3}`^Nd!nze4i<)o!y%Ek7S^N>r@Xn1C1 zZDRFOy_K=T7iWa<;=KK+^lGVn<n-Rys_H0F=HB9RSc0l zdIccYw=~zyBpkM1^b(V7v7&k&hiB@fz8}rO7+UILafoafh&7ue>|NyL_@3m?Sjz5n z#`a;72X~{E+$Zz)2b3Gt&G_4So7V-mdF!|EW)2*W<7QA?2t#0Q!*&zoXE*K4W^B#P zw5Lf&khEDw{+w0{UkrKV5TrA4=n%}=oI_Z(T&oAO{xNw^r;ldZVtEFqL)pNt) zYZB~EOw1aRS_-+rmRX9Un5d@~EqsgPQ8n&EvSJCIH~XUs#x+(?^LUx)z>#OFMmT!oXOrJVqLS>|tM%(oM%;d2Ixl#p zTq~?T@jJfxdd_0pc6xAAdDz39>%!EuS7sTNKX@oD{l#NH1YI`@&~?25UAM>p>>d6I=G((;Oqc<_78x#W=DhjU1Ml-zNwrC)+q4Z!21~l zeC-Tt_*cH|{8mWb`_|u6c*Qjd+rL($!0atc=|w9*Qnf7*_nt|J0(vg>yEzbvLuXIL z1HLWL0MvB@B!7o#%3}~X*noPL1WFBapx3h|)d(^JceJo#n2C@nCP<_;q%& zyq7hfqryAXqRLOPKgWAW%Q9Mf?va0)BIV{3u|DTOU&qf9w^ztYcu=#m%@{2!CX_i$ zPb>18ml|NN2PrkJ{Z?o!V-sfHZ=wY&>o;qpkXc-&S6P&JxstT9m;9J2LPQM^&}k~Y z)~n4ZKf$I`kC#!ZGp?>_StHI@6g9hX%VUybJLKGXb9nfW*j1OL61m0J8DsHX_TwI7 z-W_&Tr?{qr1kD)77Yv62rZ^Sq;1TZ9)H3@LPht#Nh#}Oa0UocuRxu>nWt(v)=Tzs( z^?CzKrwqnVokY(9gFb)Iy(Vw*x~lKk{a$)BTyiq#$$L}kc#_9Yjb=<+b$oNaKcHAx z6`%bAy~jVu&Zvky&It(%%=|vT*D!MU?m4oS%w^-`Cq!8$Hp};;*Y<+rG{sZ`%;WJ9 zJr7^#VP{LCzRFR&EKem$ zx^1(1@*UWV%eBXkh>78krr@RJ^{7Y3_zw5-!@{DJ4>WXasTg`$j=$YrI0(}#sPL1~4sIKQiGJ*UW3I%vf?b;n*dC6~iu`0lt2C-$ zYi0`$;h?T*8+GtXOc=GOJlUT#4W^z{KYo^kGro9t72>PhJ%1gOG%5Q z2uN*0N|0`(ySux=pri%qlI{lSE|J*C20>Co}|>fmrEX;qXAkeDbWlLQh~|92vZ}&MHh=`#ElV zo^KJa(M7x%>|41|Ik*pOpab8BIKUxNi^;X93dnnJS9@v$S%#BT4)LF?_5(JO?haD4 z7LW(QrIjEguSk4%TkS>XxQq;jADugjEg}u{!#E8zMS#%tH*mcJAN_VGygqjK5F9+H zzVYoOM4-QFfdM)UNwg_;GRIZr@3BS?%^=&ZTm^cIbcl&Pqr*xd0My#52_o`G^ReL_i@+N_ql3UD zF@Aqa_dT2A}`Js#I)TzD-oMNwqNO6m#<0YW9=FMPQ0SvYKGvPs5=do^V> zZxua0+7YwY%EZJcdO@IBm+w*_=WHocuqIu)Av<@tqZfKTQ`#!tm#gW{c`RMC3!K0# z=Z&Z1E#{41uA0yHpn*Ytg0xh>0)pB2Rp!Lw08Mwyz5eQ5NSjlQJ=@Vi_3qf7jeF5r z@JDh1&B6}?dOtsw&qXy9glgzDG~av8ANw5RY}>icyzbiaG$=GsubIuZ|K77Yw(Bk4 zMLj*D9Shy>0uHHysl@^Up@Nrw)qBxJ#kAnJPien9Wp~57_gGLkM+O0;D%p?(I%f;Y6%X_RkvfxKA z*%oNz6gOsUMLo83|CMSCU2cm8M78^2Rasj1?lfH}2op`i*YHvD{sx5iYl*o{fG4tM zS&4TNTfGOt9qW0%z^611Qw4DfxWS)5NaLqL|EOFbavdCXooLhcPq_Y#E^{9(rG|n; z5$FR$RfDCztapiVe08N4eeO~Xiy~hf{;tP9!clM_VU+`$K$2~$(MrnfWafwsx}qOs zlvV-^=eH!#oOz9QwlQ@$a5Z?Bb&w7FU5E*G4C9*wQ@Eh^0j&mb(qjvjibJ$MACri) z2=_PXx&7WmPNrf&9Un_3OC1OdQ5zK**%^Cby|w_df+6gXePue)=P*g?LU;3ps?Y{pkY68A0QDz-S%^8qYIN)c%(`v)V*@F-^H_x=v?Ij~4UF55(r~iJPol z643Z|?ssyzT-N4A%oT+_4@zl~Aa z4Xj0isQ0I2xA$8%IaK#FwxL|#2sSxh&RODnh8M-ycMZvo_4YTd_O-GOlCZ2=6hu$T zk<>g1CfGi@=SWZ0_3Fug+PZ_bq4zzVi?O1d_$qzT^KRH zIXw4}9b;j}=90PF1>RQa)szje>!P|Y@|kHXbNE`~+i5I2Hr{SoSQDgTIy_VQ+W4CZ zK6AfsQEq0OZujuM15I_n#CJ)8-@x?q?PnH04_+ zFcuPj4lTq@j=+yRjqK4-F2PY%6a^71bQF7fpj9Xa6Cl>3q}a>jTuG#**h`0}NGdA^ zsO6MB#D*oBn&7W7J=3f4?)vG^0nHb`BmvJ~-Xc2t=;TZiX%-zVOGNLFo4+T5C$kR| zWgaLLoljnyeWkiS&81IMj65v^Zt>tZl?GY`?{zQzL@u{}5QZGE>{v?y4_)lRTF3dh zeDj1U#=kHJ2BDM1FL5x0n=BF*5=mY8vdH)Bz}z6!H3m>if}<;=hVF`Aj^7S511-YB z>lLD-V8I!>$YZ!jk#bgnCu?PJ`#mG*IUwYQv{fx(@>%TdMFWEx&T>#Dk7D zEG9BwHIZ#g?S*ljw>4($`=YS+u?JfKv&va$%EWgfyW*w9FLFknVb8NDSbYQ+SA_;X z=T)F4d05qQh=ajzW;KuRGb{x-PkwKom*C}*gLp+Ew(@olaBvjIE-hRz2!Ke!l{Vra*U{cL`w^ zZ0{1#chTQXs8}R`O`f|x!F$`gzfS|R6)(ZE|3^@;|AuEc*S|~Q2I2aZyaq?X0E_De(}BQ^ssDnV{4)w>YT|5U4qU?x46Xl( zyv6nRZ{>dmf zu2cL=ZS4Pyef<};`ZL({zk$9W+;9Qs4N~|AA_uwgT>lGF_!s8ge_Aab)<2)D{|^Sn z`p+1cEom>l&#D?An$2E40Z{x-TJ5eUY+K{?( z;+@}7L-j~*<_UR3Gv|AHHZO?vwZ3ycoy5b1*vtL0j&~l$+GBsQOo8Qh(YZA@vB2$g zL3-RgTXL+ojQ1i;+?hMDetr&U6s?{BjpF>q&J55f3g{o)TV(P~x9Py~_2ynExq1VI zj@L-G(Tdl3c;zmA7k#C1Hn~}b!PS$;L|%-4shYgLG?V})x`n&9p8m?TZ-$W-I<_Ja&H0shx&xG0n#-Z0>YTx z?PCYW^E+I1*yVbtSF3p!gUjW4?2eY0d2tS!S3eJ(xq4{6ym}Q#PMijXwi8$+h=>KH zv!E|0RjgZ~2?n}sn)I&G!%W-X&o;iAML)D`37|M}#-gO?v@1eNkvm;k3q&SX4cg6c zK-~H6_tSa9c4%x^;G+kU`{cyz)XuqAc`$P5v*59l($S%CR@7S!ZXPHBMZDmU)Fjk=`J7htQy#1gjj4Lm zgWAYiSLf_&Y@awvUKz?qZH^z(p6%G2x{QmCKJhVzM#+^uoYiz2!R*YYR-I!3;!j|i*m4r zTW}zYnyvRaP**-kepi(3;+6ibfv4)~MCyeH;o^PB1mdd%tXZj#oH20fLEfAi+L_u- z-rVbYoyvg8C*-GFD{(nCRv3s;O;pTxNTA*G8s;5kQvy1Z7}NI>c=Un^x3Okou`iI(I^F zma&KHOco~Tf9oC3*AkJ7b^bH8G6%=tTeW-!(@Dkedfe#Q!X;muyijJ0dGN7VpQz3I zp6hSL$bwb$AG*GTwG}g-H-^2RI17 z5Js6tA!hn3A!gVx_&$lcsBcWf75munN%&&qs60%y^H_Df2;pYniL6{n@N!m7(`UCA#ioS^sf}?#RG|=KF*zPnQ zxw_eWFfV;R_Fh9im|3@bE;Ma#K$~tc5#GI%JV2jRpMyHv;ceB#RzMGAo^G-8v9D)_ z__=Y_rs(Gl2lzui<&f&nucVC6x6G;@CuiV^VKozQDv-Os8ECMrpB;ZZZ_k;+6N6U5 z#!mlHsGhJdwzr6Ot?+GB38!?K0Rjr?hdDOJJ3Sn(&?0VL#=7Y z8Atk(IS`LAXzGIDeba`!ZIW{AGhspn&-B&Bbr`#BM5IO2Y4J|Fv<<%_nNg~`{5Ukd z>8eh3V{JBGn=Wp4#Rn}`ViJplpJ#3YXhumJKU;pBs;d^rezI~u(#O|yxhux?QPB=- z+0$M-u8qZvvT7l>rGk_d`xapymjL>_qR>b+Ir+?#XkWd;6ix>2+_$2V&)M;tbP{ z^OZ(@fAWU#U`s9)LolsyTggh^?=YCrAk3$rN%wJ7x}1T_&J#`Ty9FhPv`jKlKXS(V z-J9ULOzr5LLc4}x%QNGGeJQ48=A-Y@(lnWLGE!+=i$H5+73-O== z3xS`&zj+9_gs-kV;H z$>=jDWUJKlSD{AqQ(U*IGiUohY#x$fS>X%I0;kbfdfvax6- z@kh|>z>p<$KS zVO~6Bp-v7h`U@75&e!1TPee{x-NWigOv&K>`wFrtj8{-VIJLE`Z04s%POl7NQ}s}A);hES0%<9ERc%=d6&MIY+JD)JcbO^LpsjvzOG zSJ$(E~>Wm>~ETtgeG|Zrn{eDT38H+B>&8QBQ`VHBQrIZd@ElW#KboDfJ zZ5Au^n&)AEi~v`hyblKB!HT6u1VE;=)23AY%_eEXZ&LI2Zc_7%npcQ6ehm}7C-A=? zpnlh}#+C})G=34^ZEgr|UuAorcC&+vAQ4;yi97_6+<6|LHR&y%l9=rTiIIWA(g(eE z)I0Mab_-yIm}wertLZ}fx>-7sv*gyGiL+&l8e8T0P26lx9vSpB-=jyI#*^yTuoqbReb}p~cV3+W01Bb+%{;LH9HP#*khzj5;6>i) z(0h}5nR%}{9%TQ~z_b4z8|{2g)SuNo)P2*WdWe~KRw=UcyP)V+6BqFBJ8~vhR3Xa%N$~8KB(>mKAIqXWI^54Rnwmzqdl>9Cffjq0Rerb_gT>t9J-NxXYnV03Z2 zU^M|77s{G5Q*agXc{Sl)nj9gNl`=QoNLX2**FV8qj%`bBOAXAw|5V`PP9?tu-Kh4x ze>E&+6fR*E&B~?O7zP<;03!RZ&pVl`ZHbSwAUcz&lN7%{Y$}e>_?WjE?(@)g9m1j| zDJIJj7}rL&hkZp&B;(KDXipC(Kfl1hr_mt}I^K8;)^;%WJANkJP|aH{Xx5DcD~e{` z!rYPvp?L~H$AD*+R`C3y6FgO>KUo`jTK%)deF=27yWXSBD9Wm~YVh{1p!mlo)8 zWp51lz?i0qtJyKg{_BB9zgC6`RO+z;5w>ZHVPf=B*@HrGGo5*N6~YkrNU~~R`;+f; zn*L%tEEnTey==y;$jz9F`~B~;HNfw_0(^R14QwdEXW!KCh)Ys@qkzj0`TCd4A~*e{ zUOnBYx_E6;sY0@i@F=eDNKJ~3oibYkMX{T$Zt8&s989iGMIK^P-KnMeXh5XgN!_nr zIfq%Fq29B8bv)TPoQDHDKTIGoN^C*tVRNbpGilHq_{yqn*cSi5_9cw+2pdJwxL=_T`BnVnt;{t$ju{4XJ}zoS6^ zM=d5R7Z0z_?b^3S7JRuwaApAv`gWJHvAuz}T2n6mp z{%05V8$|9utINNOiUwhWQ_*g|Gwwg&ICelq`>U6liIIz=g|i397PL07HP-vrwc=s@ z^BMZDa4!xP*1uVxM^M+|c&C^BFhgP>w7bWGZZ59LKc(A7@j#0W{nN|kpQtH)>{wr& zBTdCoKg^I7@TxblB`OZ&FOYtXJzsV0n0tb`5AkxsQ<7@&x#)!Xr58H|bqaFruW=mj zy4Um0uirPSyE=vDwf>wxrYLqusn-dzDYGlOCgfT6Ug;#-?3~`+(QB=*!4mZSdDv?= zy>;=E-{9zX+>5-$>nR-f+E`uHq|uM1nr?!0r|)L8<$ISL*9K~tbr3|>Z`voMz_G7e zKDAg@#S{YkS9@6wTt;^3EpHyFRCPFOlgZ1}$_w&ct?_k^(_Nxow?{&E4@@p>TVDU< zJw1Wc_dKgFqu8i9e0sUL>)E!|d;Cr7l=Q-_jm+EiPRruzaKH4=wDTH@rxEuL%`yZ@ zG)X?5c=&4jcwTx0Mk)x32+%He*R<%xPkJx&1(6BYBC6&cStZ&WiEE8uvMj;c+|j)w zvaieMLl?ts25$Ga_-y)QVM$p%Kes&ItB8bF@6FUmYuE%Gu1@9o3Hn?WFnw@je^)}` zwgfOcwKa<#hDvKyH%)rf;oFjy`C*sdQbojRnSTY zoAA}o)H}q_LO%ozOq znWe5l+U(V#qfrk>Q|&X3*VP+@0Oh~V^&Yn`*Iw_oNx zq}L=Ev+dsr#CnnW{7wZP8?AoVyj1rRL6Yu-KC`z;I=-cq?L4WWeZE9F6Y^0d{xRRPVlu`^6mMXi`reSJ`&T$t56LK6gMV_1{W1L zE511r5;y4_vp-N#vSE5-r{l;xago)K(z~3Wa@W;2{$%(q6YIDO79(rCYTk$g)h5?1 zZKyl!b}D91c*!jF-uX3|ovwlPz3E8~e;!h|ujJAo=FzxcvDUu+IjV?&VT-yRifYED z(p`gR*w}N1%S&0|t{-UTV{!7wPEZyN?i$V_a3#I+fLT7b?_NT=`xOO!d#H5aaZK|! z@9g{9he-W3oYVd<>2*lyM-c~l^koz7hvi{W8>Bi@uPSj?^N|U(o7#Ltx<(jynxLMT z^+}zi6pBpCHGG@>4V(J2++iM(CjQ*bQ)`2QSZkjTu5a~iw>2|) zi2vSOQwWH^5YV0s>&*zqgtfg)unKZEFHMS4z0oGqm3Ny~R_y;5g`k6#XG_*VJ|y{c|wg_r`` zJGoaujYSFs4(Q;Q%?VtgRVJc6T~k|bry}4A4l194dCE zQ1`nd9pi((vV4c!%bIQ|V~ArMA;%(9spd9S8z;w`yHVMo3o?lCF#{0g;Qll{yrS&Q zDJ2%xI=~=~Bx%jaXm512?V;UJT(@~GTIjN^pcp%BB#fd#zN5#@0g&Uu1UEovvlIC& z8qo4;cC(irR=ndu_^L@=h0G`dgu)DI4x$HPk9om}>3-Pb&Wcj{w1NQ84?znvGu5;1 zuFnK?xwI0XJ|$#|xxF%q6@pJ4vOgGl z*NsP{@e-2*bV%co^#xsIDEs5Syxt;Vo~ZS363dJ_Th+XWY1Wy@{>c0+ODK`VaZW-? zKvzXlO~t>|jgqO8p=O7YsW*4@!{^s`!!Fi^#&Z3{O>!9o^f*cTH(ah`qbr+^Yacvn z)YE*i&3brQR~=@#Op>!a*0mZNC)p?{t4WK|B&Hcx<%wlMl;B0j6vWH)>9gItI50@^ zn^v4a9BV}H^0LZV%|6@OvCIB`;lwA){KPHO2i2PD`JjVy>LIyBc}7&}UUzirx^qGk z=5jPIRbQh#5w?aAy`3}QUGP!&*hgb`z2z$QmiHrKJ$!C_7DLp9OV%IMbslei4kK|! zYnx3|Ft&R`U)@vGr!wjNh;_GohaeH{nG}VP%nz#DYhB2S1(9tD?*(2b$Z2E8zC|-+ za}X-d!QpTaQl@3bCwVI^Ax6ubm0}w$&g;zE?3qon!^+tpMB(&7>kOjRutwpU(bry1 zA*&siW6|;D_lNF>c6V5dnvhx3-Dh8`_s^USM}OABj`09_dUis1GHrvX_g6FqhF=oV z9RO+Q>~9mhRx)gM76H_DL`=g?Ife{&K$nPC6`95a|F$Q9YFmLiwiYPExchY|6?C=s zJO%CU^j*s^Y_7j8D5tmuE=iF}nTjNn5MWn79B2|U#>n37wD1rQ3hC!KOW|z}T@AZo zZN-m%vwUt{DrR3}oTxh#=WG|mbp4GAE#@r$jlWVlkgf1&5oChc`S*=ipcli?Apz{^ zKT~zOIMk_*$gn1vhJ4`wOfu8Y1s1s}Nu~%>!{{GgkPFFtrV6(3$j*#5{met=#gGJk zwWi=#Yig?J-JL2$PL#E3bvpe;ruKGZh!Sj|niY#9%Ocmq26+>SgZ<=hT3m*=)Ko~ zF^&#&Pxc{JaX|OvLDTJ8RwB_1g?w2$i8oZEbK+9cJ@-hJAu+nP>8tMRa*MKH4d}L6 zQ(!98#Cd9ZXQeUZT@qA}roBf`BJgVLQ@)vxgLHV=9P76x&wDJo=lc#yJDo{dd^?P3 z_jG&?*bgAohI^tGT-~Rt7H*I|R|~=kOEFfEw=!bei2n{nmvU=?o!mCTEy`7Ch}Yu8 zLDB`X8nO#h23I_jF2%$48s@Td&^VkwyZ~CO%$fgRiYQkVF*i5 z4#0sGvShLa{APWw(g!Jt%2voiP7+p;$x$#;_BKe9!q)|AYn^^brz4-YtK;A<98?C^ zQvd_!rA*=O`rE<|-O4bvdl=7>Oq!z2u_w#J#_!4QX=Vz^6m*P?WbUrpm}2UU3o7#% z&hQEW2F;Q3Qy}In4ehLne!bFZIVm@ShX;#zZ8(aDmzDeBz8ieTMA7P~@qnmx9cDJ~wj=7t)!ZuGUX@t+yY zj1wu%=3hk9&K6%J!Iz%rwYzNxm_(~#S-EC#p$o6Tq zM02A=anpi|%|!~6C`iB;wk;Y%C{h>cIr32Y2oyGD+&>>PUpZ z!o(e)7#c;hW0?7eLl<@*$%AlXwj%%_%jOxb8*_fpO&cgp;7-(Gbzy7FT!5s8yd8ID z$kl~e(91VtC(9i@JX#NUe3Zl#H5z)@t(F{Lwl?tP;ArEhZxbkTF~Qa#I{}Aa$?7RU z&|d81>e{QEd2pDHzy?~QU%00*?Rz5$?;E>zclB+CbZ6eq4P(#m-yd$}13RSIQ&yJX z!;c{aH^=)TG`-5!_F=rsh(Q{1%!rPpIr;W4b7#PUX%9Q$9bEy93@zdG~cA$vw* zCC_&jpL?7wp`EorBmHz<0eJPlv~kbP$Hl~#210~yDfapK3yGO>+{!YNeE2GSRkq}! zY4$(BLl0Q{*|{N~(&(Ka9?u?j6Q>RXO@DFG^$xo5^uaqpYj6bl;jsX;?%@38vYA?< zq@AFUiK`sHthj^&wqf)eY#6D3{=x%qYet?=wh@BL$_`P!DY_LHsB67z7|EpBVo_8YL0e_FqXAeIwEf4zT0Mg`=0tngprXMcx~{*T~i{|#e%?thp5 z4#EOAw*M!riUlse`wLd}7yRsBBQf0E|1M$_2Nxhl{lco?=-w}^iUZD(`U_U|*StPM z7blOuVrSg{E;btnH=NCOgI9r?-C$=AICub=?Js!MU+7~ur|4f%?7073I#UQM(3$=^ zNnBtKev%$QSm6nef5!9vUa7xfjNqFFc5`rACLiD3C;t_K#?H;j^Uut&2+~@7;BNn8 z6@i)1?cVL*CNwYM7G-U~qRjp!_fM=P-BLG$!9xl5kXsTjygV@*>!z3Sb`0YG!5ni# zJ^LL&ySkj}^dtWrLE8oh+NpzEN8aMv*4Bw1-zD7Kei6SnacZ@E=V+?ox-mr-lMYkg z_Vnb5;LK$5oS)C>HJ#hVQ7e|a&D%YKW+x!vl$T)={pZCw%y5x#ltk$;ZLRkZz(jipSpYydr zf@x;%ZXJH#DVn?k$Fa8D4hVdoo}NT__dIJXv)eFRTipfy2@Ay9U0Az3YJv}vAa2w5 zyxJ?b%V{rnAwA6V>VjGWijS=*D_XoQ<*iRoFCe+Sgoi{Q_(cThkXlL3Jmv(GCzF;n zgP4SCk-SrM^royEeGh4X-Z4Pw-T3)LnJ8}@r=7))fz{8J6FbeHmNvSFI;wM>1Y^v0 zTn7g>5!O06I=IunIBna{(cm~*cODg_UQyFM)i?Ng+CA%GkSHP+$qzjbvD|DT z@--s!vT-xycu@bej6g>cv71@ueGq6-Gv5q*}LHwL>j_SfNpK2;- z=-y()iygVrnR$lihmCUG53+qM%buOuIF#`^EZrtao+G#BSr=mfd^TmV-}!8>>V)qr zRMw{NE!;q6-HUXK7STIo=bd<6O^6X}NC&w(Ha1~QgE+`;2(C%6*t5RdYO7S;-!m!H zKf6PwF&OVNVB(ej!pzivE55q7o8(OWea_n4>#6r^9o!ANb`)F!)zjcT`uetoAJYr( z9vsSKSOvSMOMTlL6OM}e6I>RGdh5Y0lv-!L@8mIm(AnzzYqd5doRN|jI8bGf-n<<{ zTpN{1C)Rnr#y`?c%<-%_DXE*3dCva~om-E1lC%fHr5K;E=*%_$l>N$5^Us7f)v_F9 zN{l+r$K(k%$9(?1Pd&=Hz`!F5|0DBrbU=Ri2cgaPlu$5e z)g$h{GxAQY<8p025tspoROh+E@lxp8($ z2eOwk4bxH}dl_d0`cW9&raI7%{ywbt^`n}Kf)C+{8$(UpkqxSn8`}vSDVu-sJ&V7r z^v7cg~dUTAt0Wj`OWJ}pVzMoX%~5~w{0hR+T}7rDXpUFdmlwMi_DuDh(o&ps6nO_ zBxQSOdm(^fc{d-EO0n)TdGZ%FW?>#sD-=#_`9(r=R!=9olo_XCI+i14|BQH~oZh>L z83suyJm|_DpC~=^j(O9H$5R)Iv1b7SuRFh`rZZraG3%-m(~|k6aL7D$kKma85vRU_ zpFK~ynJ3v<^u|oO(|9vJCQvP}>^bF0U%P#$EB2I&81f}|*ZN~t7>30@Ff0<0KP1G6 zpDgn7`m)=N)=m3_<~3Tki1-yPUZ-w$p6(qw9%P~cEsuk(4e4%VPMl2t-|}}Jj1OT} ze5}&)de-HP5s+V;Ar(;=C@eFs0HVh3vT8i1j0-Q$z>b9|clW3^E>TQ)0%1%HFe$6vj(cg$CGc>6RGQ_Z|12v6+c(O2%xN4PklM^yp4r00T zEb~o_(kupVs8O3RP}mv!+iojrT7sXS+tWuvH@Eh(vyCf}lh?iitpjI*;>V>4WR7Pgg;xFO%LN;IA&=E0Nxs2z-N} zLh3)U^k5Ya^~jZAXTpmh@l{onS87N|^N==D|L1zmxK;qtK>7tRZ|y7e4f(O;@=@em+TiGoBS(2iPk{M}{Na{p;P;i;*Lt7O2pX(9rUM z{*7+(?h^Sgp^~W3vCy@NC%J?%awGxhYh_<*u}>d(SLPw^S1LQDf3(&&LNw6a@!%Z# z=66xJr*@^X*zc0?82RjlQ;R05TM+pr&fqtf!Ed}1BrUsYF$WEe7Y>9;xR#AP)5#&{ zXb;X@QbYF2Hk9d+HGC-<`k$;;-||n0PI}Ccy%KV#px&_IQdl`o51(W?{y^$C;w|SQ zJukv#Lhv@RQk7%>z za3B@pKj_N-%|Ai)C3fr>p`kf~?T?98p-!Dl{0E1gCq+tk6@Ywl{KqR*Ju60X`--5) z7&0XYB`*8=BvVXL;-tTeX@!pi}o=TDr9wTn-XQZeX9@sGqScaO* zLdq%Th^EVLRl7NXOL%6YIb^Ua_46ArC!tJE82gzWF1Ib&fABFQF<&LE0tL7Z)ckTC z5T}x_4$dJG6e-z9zxk1{?|}%qgatUQ3O8gWQ2}tGKF%k8P$BQa`^Ow%;O93x)X-ZQ z`(fnwp#v4_T>+UMwC1s9B{8C2wID|pYy>EQGQ1Ed$1hdbf)WE%nqknYS|jH+lKGfqQaMurmq#MR zXtEhX^{qoCI9O%58qr&rqpXE^^Oi%h9m9lONPb}+XS_!(B~4o z_3DmayGJ`{vW{VIKL571H}rDub)=Di1wX{K*0`CuLAtU>ryADT*ZjTPx=~uGKI)rp zT>iFF${t$SP_37z^TCF}T+864-zg`1B6G}}vb>9xI}U`cDf3fqV?NqHag*iGr1s2{ zpVx*fzs?YyM~Y(b#>Nf664ulcQYH}S<5oF+kb8tLlGE}!VN?xUNnS@4yp2y1AkU^t zAdr>1T`4Z;EZ8EJ&3nSi)zC>{^`WLslc|IlfUz#Do8o8`U873z__61o?R7{?@nf-! zgGSV_aX~3E{4RHX6fjV9885#{DD}pUjm0v2p(iA>@faVh1}8cedxKWM8?*xZ8lV;6 zjcs8wg&LhsD+|EsfpRKmV2DG6eZQc8z9zO@UQM9SADX>b`YtyjxuzvL#hVS0QkI>W zKFJ{&6_){c$$sAH616?h7Z$}IL?FoeKt$-qu{eo@%s8n{&9S)j=1x^=K(!JUZ8grD z%tXL(l#}C6c&6I_0w^VOfKn1T)pBwyj=s4AyBXdH18XYFdHz%yn zbo0+N@8LPKck9k>d!0a_j;+G6IPF~Q&62_OBFSOB{T3TwIUebEz?*;yIr6PRa2(pu zyGeq+;_Np}Uz$xajw;u*bfF%dESsF&LEhte7Gk0hg%x5V{Dl$sQ=)Uox{POaRWRncjA!_#%4}%3iIUcD(v9`1aUW(F z7~eG>-S0#ANSXK{UFv>BXlF&V@oRw?F`0KV5{=C=!)7Coez03~ae4vSd^V1fS7JGD zOldwfh(OL(QZO4Sc^3^|2YzP)#Sf$b%K{lsb^ld=ff!xR6^l5IzFUs8Gfn5zeO-BJ zQtpWOZW#L&47O>J?A|;K+v)Q=KM_{idKmsCV)b`|(f<*|>c3%F&;570+y6{k$iWGZ z^}9i={zF^H!39@6{u#3REAsJoaOlr+x&Mudj{^eN7T$nE|6yRo!3o5L|2aBjVrTSE zP}SeD%>UuZ;Q)Zy@2JopP!$C3od0K3$i&%P&(X}r!a~p9+(Yjl2Kpwp|5T|zGpqhr zr-&UMF>v#Z{Sh(1!2ze9{rL;~*OmHv!~hT5pRv#X60hQ6XZa_*Y6{?0I6iY_39AUU zTszd*x1yGG1nF?1u*!{45%C@j{X{BQs9{c-`8HN+NEyvBvS|>*_;s11XriRE;f0@$ z-09Vfkng}OY4`i+CxSi=7bmGM+xDj$!Y!#i=(Nd<(BtQ>eNSoywXXyCBiL&< z>^F~K!0&5Ffbho;drYVHIlr^Lk(SHjjhPd{hW@gj^_|-^J<^8)Q~vCij&5Dj7f9pK zof_#jX7M`r4JW>NX~Y8Wt>f`P)D6J+GW)hbLPQGuE6zg z(uI}*%XJL$a`BPr+t==C^Vj~Z-?6;C1EGz_RcDCTF1xE~+D0E{#>4>#hyH4BV&yu@$GHOvrjx)kt1d1K_eG#yRv6MSkAiCNc7cK=QlBFia zkO|+bzKclCO~IaMD`ZFt$`b1?fAsZp`N+>C$$;cl@3ZNYl_pK{e9~xWZ+MwqwuSEK z#n*}Fr3{N$jy`@3-j}O0SG_CGmJJ^s{9<}FH`L9G#+97D#rZs6(kF>N|6(gHG79Mf zBJ=g>0Wv>cuM7S1;^N8ykYT>yAdGvx-nzDD5H@ItuyQ0{JQzI0`R55lM!p5}abr*a?LLB>r zK*16w`!aa~yBf_R(!5RaGCH?D^9XfTXQ-*mFCT-Jf`~87xsEfs_5zbrz%9_~VZFNz zjzz))qH>(Xhk6@0r33A1I19uK(;wOuLYjrNEhHVBj)urnUv(rxEjm`v#`Ltaj1MWY zcZZSer%l(H`fId4StnOD;EHq7Y75MKa~#EZu|13kd$@vjdiJ}_lKxx2`~=ULc@~+u zq`L`_S^BiOC%jJJYU4B2{~ljcdn2>b2iZ>%5W2SfzEvXDkrS@)xxWMz~o9G zV-%C!{t=|Hb6u2TU&2;P4pz#oK6)y~XMT2-QhrF(#v(a)%)zO=sDgrB`1dW<(7;FpV|*y(?$ze0%`Tt0Cx%{ zWJK~3!VP$f;G_W_pY^$Io&NzzeMuOY!cM-~0ydQ>ed3UC08A$moWFrVZU`9UE;6B< zJn9gx--xUj80E+cGL0^;&?b!o!`#s~P!t^3B82qU<=;@*0Tcx?64+kasDr?7HvJ=8 zHA4LU(ceu>oS3)m6{}?8(;DrkD`dt2RV`n`bUmS0V}ub_42}{dPJ=``mhdQ5eD3Y& zthh(bT zK&$W1y(X#n@M6Srye>;bG)3TT7Geh6hX8^EcZI|K%wkO+VrB`9iUfWG8W_TZI%fQX z0cQRK(6L_G(xGBx5MI;rCKjZ#HKBnzTjAN%;8$?%qIdNz@+tK{YFRwta_Yb1NvyG- zWIPhe_*#9Udyj+USgDsD_f<*H?T>bKmpIKlRFW4y(yblyECv198OxD%gU)%#S*3A7 zRyrd!%$b(1Irb#OX?6;A_(bcqnOozk)heYw)#nM=UqKnCqbYT3?4^5s6zAhGcZ)l= z9^oCF2TXlW@l%{XUP{#~vL_*(=1bG7qnSz5s58M8$g`Jz>MNi!qa5Z!H_Pqa=;T$G z|#11@Qo@#{D0oNVoYdc}=T zawp=67%g{Js%`GZk4(+b1UdUaYiBCKug_{Pt!g-U?t5lPb`4X=+GAT4P|M0-$KDxY z(IL&nzY_t~py3YgyM@YXW%7E_>BSvPLmQDw%{J%PZ|Hx#+`wW<{Qkg|Ao07hGBx*0 zjLsEm+?1~p_flAYlePb_-Bsrs^HJ+R3{U zdAOwachF+3#$}4NFVbK#FDY*gB4nGRunMu?wgAa*BQkB1jUR}*4l}TU03}HXeNfB- zg;kb4V|=!tR>j)g=w-F+@PK(9Gk;IUP^)RS0h@8wJjd5(NOmQ0fj@@PFqSg}rP!rm z@5vh^J9-=))K$yTPXWsNI}38#{$Cgz;REX8MD@lajakrBxs~dXOeGG*X1Q6Je34}pTs$n`;;{!8&#P5eap?0WjPFwg zJav;y55JFoIVk^iL-3yS`eMKr(xcI{6_JKSs~T;R0=p@3_lry)n;Zo{T;KxVrxUDn z{YO3IMV!O=50AlaGVl==ID$s9e&_Jr5B5nW3cZEuyv2&uW2#NFZEVb~J{7LA`y+-n zpUyTIzKRk0J?WmDJ}%(&eLQ--gH}_xd1PL}xpG?HJqgUc2(0?*o;>~dBkla-bJc3yI#md*NH@>9io?)Hne+|ogEas1 zx>twcc%Jn>*oN#$5^SbdIBQjm+0fB4`+d4a^L zqjRCTe*z;hWiG6KI$d&MU+XAL&sLt|tuvwd7d)L?i;*jcDc`Zj61kmoVNEI_+e5qM7Ciok%D`#5db*fOe`g6 z1 zO{)1s*58&BA^)Of8Y=z_lkR04X@G=$oD7)&;?1_g*(SbbS`Q1429Xn$*u3`7D;S?) zHNG*LoS{c4Iz3tr(R(8eQO!God9Edovzd)s6wc0PetMmquk1VXWt|P|a}X`4^uwH| z31jot5TK9b#lM_^67~kRX_nWRHCsOCKVg&?cM2rwhmqUL&$y}P5x8&>=6!Qk`{8Lf z0_^qPu7l>^qUdh2@qta8UH1m~%Uik6zuTVoexOq6=bUtd)CdOJ5>|+kLlycXMO68{ zAMen!FL(=I2c_9Xm^Bj`jr*8Yug|#p8+SJvHZAB-9^F?G?KYBmiGOxqsarWyUGW{g zstk1qzS3JmQPIqa@-%v}qFI~tE$T-WSqEm7k8{)d(kkEio0q=ImNTxQ?o0Bd?3);+ zki<*QHOb_bxyKn7+F8jbe@miyN|*H=9YDbt@0h>$FzgmdQ)i8(Q&nDii;oKymD9kk z=pJ%z7S7u2gg=%~p^D;rHvn#N%~Jw7tIVV>Y1|MHUi6vo-H(LcM9*3ub(`*u7>|eC z4QFgFc5JX>FT$g8>K{TaQxQ?c;wmzuSq!51*d`|$1<-`dpTxbA%4TA%gEF9X{%#}@y%46^2I%77=B`?kAS zD>#mB_C~j<$Avcw6&TPTZc{iUfhs#6PsBd6pU=3m5gu?~fg;n+c0nNpI0X1QPJF&Y zWbhS(##G_S74j`p*CC+ZQv=Q+=X0K!gZt~t9t zLRa;e7Vz690<9{64a3Az5+iiajQ3!pcxbOLj8V10nlTsHc^obe@?4Lig|3zg_CP$G z-V55?O?Ex1E)3mRO41&81+!5uk)qVA9U{7{!FR)KY~sefKa)=uzZ*pA5`1_isx7um{|P*<@_sZ!p8Qm;N$-iVq$!V zZhQp1m;qkYZ|p1(5Z?GtfY$?@^G`ng1zutY{ke_)Ba8!L{EJ|fx@E%IG+iykj_ zkHJehD?Yhar{?~R8klRSR0?4TY~$;DANhkECcEsJrfDEP9^7(zUr`b>H}NO=jxepRj*> z%#PpbX7c)eIrVHM1x`Q6?DC{Gqjc-5Rg0GAPjOAJ+a+@Qi!Kdh?^u?w!+t}CsZ;EX zvJ8D}f_j>3gfS}pLqE|XV#gb|cy%U6LCg0eY3|`QYcIA0KW}Y~uXiiAexcdSlxfL4 z8ueL4P@^eAXT*7OeZAGcKD_hlR=YIg&I7Id#j~Oc+>E=^ljrKo>@}Oh;!PZ)xEkB& zjn!|>#QJx%up6d?Q>KrPsa5H|DT*1fzV&U>GW0v^54r!^!lB~JOEl(mgy!}7=Z!!* z+BC|MzI!|mHjhLcb!baQx#sEy@l90ny4`iK?T2)^s|KdalMvoFR}E6buQD>am(a&R zeYrMSXk`}WaJ zRXvYs;-8O%r-;O{J`@*?R3=zso+FRZR9~ZCXx=n}_+Hjterbc4r7J%T6-O0gE@EZ& zq}CgA$nljzh)Jz+eiJF8C~Q+*?H79uBM!JN3zukW)>RqOov+%elixFjWBn9~N0qMEH?ZIO-i)be#!Pn<*(xo35uST%x7DdbU+ z%qrW9sYD@aC}AUgtNBoCQMo)Z4;5d;cH;M?j8$BCSpq~2D$tYgvz9iVi5869Sa#N_ zi5q0Nk|1vBh*=}7P()#84peUO z4AIMCEeAoX?|z+|$}AZFOgAD@B^(gni56_p4xa15mkqc<%%JVF-bFhYZ%<44FCb zgAsWL)+2QaRnr6>nKx@vX?LT)<#4`QN;oRRH-_gaRxc$X7m2BlI@CvXna`y$u7s&F zG)95-1~wKsm9#m=cpg1Kp~cY@5*4Cba?`|NaHmkq_2jP7FB#DBhjF`Q}c2WF&jh2nfyzUKn- ztp`K}q@y&%jL^j^Z1B7q-@{8KVV4B959-;?~+)GGk$259~WNwg9x0rl%j&<|TjP(O>9 ziUf~h_2@P`Bu9FiLG=cXzGymw;~!OFu>9kcA4ddw11D|;(=DBUs};nror13eTdjE`97+AKZ4TOWy~X80$x3im%%Zv0o}5?qdrr}TMZxx1$#XZpa5 zxSm2KCDZWf6*~~a9b>2lSN%-2#hdx^dB%QWr;N%5HMY0SAp?_jWpW1l(qBNrNuLB$ zX-F@i$IImSwCou6;stC=kv$s(Y(KxAy{s5G*h4Q2aj3*RmafA?80d?Iw0mdc<>NvQ zZIpFk?!!JxFK3qI+>?V!mqgqSMRBiym;TQj6r>dwkk0`iRT-v zHU)cjXsn+P?7ew$jr+NKJnIdF!K9Uf;p7!Q_6Cg<^jfwKt@_D9H0h zp81)i{ze%w-VWDd(Z?YS1CKPyo-PiVsB?#O;+L^yJb9*s=a9aN)=c$Hb|aXFa7Y{aVeC!r99_NMH`2~cpBK?P`%c-# z=-Bx^8kJ2DzUE~(9re1Oml2wHWBk*bor zUr4o^QI4e?=`F_9F?C{bwDhDu2R2a5o(e@DM|^Olk6~7oeiHHPItqRE{eTL|2|ks8 zuuiCwm%2E{B7A+rQXany8xPnCT zf)5yMl|LH$nY1^ga*zA(_@tZYtod@iZSb{?bHG-Xt7&7R*NCE2HN@R~(__YoxRcog z#+|MsE~}{^hyDu9o23>m!0H-u^6mgnPOfE$M_359pDh6RC> zBytsP0t`4N(>kKaN*|MNUANA0D3aOkZHi|XYhR)n!*Tb!dsS$F9^ut00h4HK^!jqU z`O}8%0(D^7?|%I_nx^3MATAendJUc>_Z?=uJ2Px>y)51C$I@Tn-|6>iEdN=uGcf*! zVGTlXQC2_i4FksWgKKoqgxk2pfI?dm?q^lb?#6qG0VRa#LI#<}j?_UjgvBj#qt}Wq z4aYSJiNU_HZy3fu%CvMya`8=nhv7sN^e$o7;!4HlfW;A|twqfi=odM@2gP~gA#0SN^ zbdJHHPVdFgeQwTkWPbvwn?)C%X@ph$?LO|$p*n9D9pY(O(-yj4re_wuE}}@%=7}t5 z5407w$?OHTm}{kIKfQM)!YkuU58BQzeq|+}RS2>_fZz(Bc5R^<R?G$Ev! zNe}dy6)Ep-fttn1rI2DdR?;~wDK-J6VG_>fibH#thYzTZ6G;*xs=_*v?wp1{+F-Wp zssA`&Hxf-YS1&`lbNy~Ykfcc2j;PYLx|U>4gh%Ln^ILqB1;U)V2<3%ZmLAH&S)wa?nE(uWfWD+)OoAm5OMo;L9qPga@yuL9;krjn55og&>dEj+d$sh zc9{GX#pncTnv{tfm?d{Fd`1E9>e+%{hz9>u#DQ1(ywk(i_XNQTvr9>GCSLj?6F~77 zI#75G1J)V?+lbCIJjQci_9k};@IdbJ$}FiVIeQ-qnptZ`Kuoz76gPCnhszk zLrf#ZeavE0j>RBe1AK|wrok(X!FlKs%`Gd{{_ z1G3hP53~{ahm%KDp@)+PuEgV&$2h5nD-TQC$19IK6yOTz0epD40(#&IJf1u>)Z@wT zmO;N;2K{as^t)xy@0LN2mI28gK`TppLrZ(R2a}J5AiR;)wFRyaGq3?k=m66XM1w!% z%^%(WJ*4J;x&CLTCuRiw!RBBD2qh1HjKqvU>N|Eu;Pf9#Li)D4fTZ_7u{VA-+~42= zP%zU&X~YbFaskLC_s`@FyMOD#-@vhXXa$Bp0Ea)h0HoRbXTag#yYM#^0Fcu!JnT;{05bUhMMpeN3jgOLf`R!VIuRHVpg#`@20&u|aY%sv^RRrJkp2cI z0Iu0%SNyXRK)B>XU$Fg2W$fP#OwhkRHU58Nfe-fs2%x?_7WYpr0Vs_<_QwCz5`ROu z=z|lC4|C*i-2u!}fcDyd)enCI9r2-bh6idJFeD!O;bD#hCdU7!1OA?wk%9hK7E}P+ zeJmXa3H`5H{_mL-*&pV_e>6N0Nc>+l{NFPjvH`Q zLV_Qg;Xe<2ra!Y5|MwFhE5I!Mm*+7nD{$L^nE!C#G5XlT%HW^Vd$2S8x%&SZai?ef z3vp5vK-|$hGqgvCA?AO0JmL3VsGb}a$Lc|qCBXxh=R2Wcn6BIX(fL8jnCsLfcxMs5z|pVP48n<1_uF|t zuO*Nn;{46`Y2luWkGtmuM_$-jL5r(TY`A`ptE_~F7H%9{UFU;lA{WD)3R_esL_%0I4tS8#~7_NI`Ml8rxVt};V-Gp-jzEl;Yge8yMe7ejuAF;)}STZ}< zH_dH5Lxd{ozV}JZ<+CU<{MD>DTi!XkXS1sA`SO!|mOUoEiSCqO-KkgJZt1Pu3|mMa z0Hq8)Xq_3X(&5vWnb`hi@zr|*w(>Riqz zd0k}@aSi;&pB{obkTB~?2y;nGh&OqD^HSCvmLeU+^W7;TJa__t>%n8Y)E~6n&IR@K z?|q-6lmg+1%t_~Fv`5LB@kVV`geP3Fj-@*EdX-^>-?2BF zZgD2dGfS;iq}VRe^CZ}6*=-}Pea3C`_yI|GDTUBW8I&6|89jbYQnfk33{CqZh9b|W zp~*WNeS(9JNYSosAbVDbMx>f?bMX_pBBy8^j>Lt^tffxQIJXlAaRIvUWn+&(k|hM+ z{?L0DR=Ob>R0~q+6I60bUP{`o&+w&3NKSMkoM>i8=18-0XQRICQl*A5$ePtWOt9G9 zkqnX_?nXRNEaZ8d&=)|*%Nt@>$KOUs*5^;o_9;^ec z%-YjW5T(*NDDnaCb@?m5+YeP;P94f3r!IJtM?-OaVmlT0Uktl^LN%+J3`M#Lj44hL z&V?$o*V3r74YhT0aY`25FRSSo)C*p6k-JN)d|RWdhES%Y<=mtAnkLaN-9bvB2!kB( zDX_6aBh5b|tR$_Vk`E^wc1oX!9VRc*XCbF%ChQ3V?f&5WSlb;XgfJjF<=FOPp&+gy z1l=+=oZM>La2krr7+2I$ah}Ap{Nu!wej+tR2p$4*~z(;!c7_z@@R%Lm(`9f4|;15EVFvPJkcK00S`HRwGSl5HRX&BW|; zQzqwpTP5)^^f>r+0{Y7Zvo*hB>{}G;J(}2Mr`)!jo^D?=5?|FOrNgo*wJt5UOYBN& zW6S(GUE3!w_PJMEM`w$s-B3zZa!;4nm<*k>8+4}q62G9o(^;89E|?2tXkc*Q(>Bgj z!7W#oqO7&XU=rUApV;*7SZILuX12N5AMb^jA9clM=>CKXFMGz)AvKk`oeJ&Iaik|5 zIwFzz)YhFQ-831!TBf&{TV_#@Qs!hAO$%kluF*Oq(&hcSaR<9;iTu)6^XnB%onuX1 zzIaC?Au&0%v#MBZg0By(}dM^XVBZAV@S)hD(>8OJ{x#3&YPDTG5k@6RZP zCkJDq6iMZ$FfEL-Z->!GY$1{)L?8=eOkUa^P8Ivck?P&cQ>yW^`O%JZL<`}V!nssh8km8d_(`sQFqSM=@s zVC;yxsc}nTS7$F#f!unv=TQhCB2}oH@a@xaAue`9XR%0Bk*UV6hIlyr^8>O4+?di}ayaA17>+wNA0cpEKtcs1Bed#waP`$Q`OY2jv#34q)uXkDuv^KWEJ? zQXTwIms*J(AN|TkQq=_8uCr&os>!*BylCt@gQAjc=jM8q=BKCfqA~?$*e9LSoN|-z zHLt%>Qrpeq{;ctFB}hPrpR0DNGlvgI87PcUm!xf` zsneepp}>K*ZjU+lB-)~Gb9AkLLBc~Uu|KV*3|j`g5x_^eoG#knhl78To1VMx{=?8C zrbn*wr#1IcVqHQVGsKq|x+j<~veN^!=7XX+8%Si@)&yi7Eig{+Ih9>b#9pVNx+Tf@ zG?qnj&Bp3eIZ)o7PH%^iK=Hepk9+GSkj06Evt%%6VKJv|cc0@5XfArH50`9UsnNgd z#}jLiZ(I*&T5}mkF`Dh^4-8|*B|FjSs&6_X=uCCoxUuxs)VLC zKc5rXO{o#CZT_NezB$)AINPkN@pFtdKJ@+?_);T*+afu|Ik97DhoiBp;AvhSU<^2Z zWLN8G93$4Y>0%*G5;8YM7k*{A947bpk{_A87|g-cmY3($Jk8t`>fgMz(6x%Q z@d@&JU|{wHpU2b{JMyrwCw=W~4K-r&Ez>G~wNk~D)WHbK-uTNXAKATf_$S}ZBO6Zw zHuZMq1XpJ&c}&O%yb^+{VCo2My83az-YhFfBPiA|pRQhfJZV&R4r|qa%0xhs3bE}E z;`>_1kP4BEiZS%Wp&chjG4;r`9jAWCHu-z`F6=DCP$nVSP!w|Uabb0_Nbj5C_)#yi zp(lG!z*N80vjgXiQ7Xi&Kj`vsI1EH59cU(ohdLF-LbO5#*uw?`w!b~vPKv`?UkC!R zgE>-3;E}-FDl}_iuj7+)xcgU3Df=Cd;ffHB@ym#8{6U!EY@#KKyO2YdHfT4@k%x1} zV9`s6Vj>%gMakD&s#!j8O#Y)FWE4QYfTHTW71oRw@t zQHTT1;%HC$^s8cgoUJ&S(rg%t$i>Ol6q>s>0WaxOfsNs?cc7uDbFRP%w4o?bXT?uA z;KE3k+$|ii?Kibfx@F0mkgF-q4lBQ^$!!md2^G{LPcn;%7kkRaMOt1`w?pUK`87%t z;3_3(Lhou8gOxIi@gm1Vt7hhgd7kjBba8jnn<|VW;ko>#c^T7;bI75&d@Bd`Hi^4W z{Vq04$^lOKt)dY9v>$8VUo~x_Z_6#|)lMKJ5}0MacBA`PtE&IP*;K#k1va#Z*)_#P z0jTg(!#!CTPF?jx!y(CvP8sIr^gA}r^gA}r^gA}r^gA}r^gA}r z^oWfEOU*w);*Sf<|4fPdRmlH2@Wl!QGco~)J;MVD4)_C9>{(g<3I*HR>uVeRRo|ce zv37rh2SDWFZxAGafBo(Q^Ix%GYja(DBP&}AZCfjge@5mX+w^bn189NAmUsZ;e`^WG zzhbe*PC$N5U3&*xL%Y8?@%P|gtN`!tH#mX`aOXES9x@F4368LIu+TQKwAVJ)wYC3? z8_a(mTmK1?V4`PX`3ocg#Bz2c{}#(Rbqo0vqN?)y#!JX!2WwdFJgn|I|7w% z;7K)VhG*iTY3vJ~uNI}TXG(Zd%l3u`TbHaN_RQeVKh;dy-mGlodvUWLphkLG&QapG!oEsdhimp8^|{jX*>YYCt!(bLCJ5T6 zmb0_E5qG*JTUX=bwM09Ed2{(hy6c0k=Rf4?L$A)aHu9J7)^><2GwzNQA~g!d>Dt9J z?p*z#NLq(Q_4Ry~a??&%#@`RfzL%Zr7Pa##4i83k#DQ&Fe%i7^=^J-Q=;?OZdpgq= zY3Td)OV*bdmC&ylM;HBH#S++2@-6CLs-a73f6#h6G-8Hud@%b2@ecGw#bob|0T?>MQL@oiQ$L)daPFri+#1z7&p2JEjOwwx-)mTVqAAp}Xuz0Zv!T{` zX5vF*q9T@I$COg$`^#r#>0x(6<+Rf5^}SaMpm&$YChDT6(+}Mt?aYVZWjpP5I!r2e zoFD!20Z;?8Szn$;EIrTBsR^WIq2+cL$w$#_H0ggI`gK^Ql+Z%(9UKQAc87oicNm(P zEIfNRTjs7M@A5K!jD%$-^KueAB(1$qCw>hnmbvvL3e7an?3cJoA}W6tov!v~o%AFf zdv@Cp!fzxr*!Y?#vI{p%vM-<#B}Ql1Dv(s}$BYI<&ml^^ZjRhr``#JYGMbo`rw_oFdtZqFPrDh z9|?^d9&qxMa9k{Vzt9>Gy7?fF-^K`M63?$tDamwK9^3%Opbd!R<8p(44-*5#@{#dI zU#yIgs2Jfd3A*;o_<0T1<@c)0rArG2av#OlxP_oJ>=tnC)_xwSJe5ZM9^<_Fg$YpK zr@$@xLw!H=A8}`YsP7{IDVCn3crwQrUblrC2Kc8L;^wIs6^Fp)$V9LL>=Q5_8gXxxergXubFo#N(Nbm)YNE|Y0%qV#%D<( zhSu+14Lluz@7Gb0h;MrqPvh5Cs0#B{u@Xp=X-MzQ+^+*C5zlX48P*?SxXFfS67$v9 zYp7?;f3j;V*d9oOS8YiB)={@W@?4(=N~I7`gX#1Rqb!vG)QgQYMt;SBN*i~%NP)bm zlOcBfjZ&w6zxa?#bV#P#RT#9lEDd_;GYZ7z7#S;aF*fBT6;MVxmYD?5be~YBjv~2a zn*y?89^OW+bZ^Eb&5pxO@4kNh23dvlzADr`rj0KAGo6=^a1aYxu2t1C=`1-v(_of$ z)v|m!#d=AU$5KScS3w5tw+e>T=YHW(fn{VwWdYxdNU}KX^y0Bdmv`lgyyyp8KX1EF zwK(B@Z9$!5FW%}K)@L-e@_8ypQtLxBb)|c%X?L+lH!RN@lt#2UFF8@JvY`T{)W7Hc zwR_l7T&psN@C9KVCi{7z-cmOT=iq*<=Fz|pH~~k^%0Sv=&1OzjA_x0KEeEqTXjA@P zn_-DsgZ-!C4&`$2_PSaXq_)zmcc|NkYoAhU7AKC63E-!PE65Sin!DZjS4%x53dJ;U z+-jd>qC0`qS-*r>@6U^GVm8A&4_X9~!nDj-1T7dj9BX9hTjnj8WYgjntr1HXb=55nvQ}f8u-oV(vGxJ5)vNCK3W`UZ#^}P1>vlvG1DVP38 zONIB1&~OV@X5XZuSuO3Q5QgVxPK@50#$C|L94SpwJsHKautzp5g*RcCX6^kpN2Uu!04N=z%BT&*P>9DFv;`bp zube4r@(?$0TBRS8^aV+!Z^^akeTev+NWo5Xy%9zuV{Ac_AqE@o@=iTI+W^%^s%*l$=#w3cLI(uMjx)_Jvo$^Eqp1tnmJI=y!* z3~alhT`Kr8xS{59I%xI5;*&gQm~xDC2!$ggp(|^11+Hg~Aa|hr+l`G*_ zK^a0o8jb5w8Z8HuPGY6-kQ5j7P?ABrd8?k{3SDYyd(f(AOAVZGDV0*{R5(G;6WQHy zx8#2t&ZH}-d7Js1Gm=$z?z2b6l>dToqaj9o?=7>G3dQnsDV2>%`hgTyT|6gGEeuEO zBV!C8!$1yvKTKnY5TME=$@SjrYH_aLL$MJdR(0i?iKzyAud^snNPBK3M@tdNZ`ND45`U0gkS8ge}=6?9vhyQ5PTIM00<8Nfr&xKD<(bHRP#?UdY_+Mm~~a zY^qCPCV|PLY8;BK;+0v38EZ{5b-bh8ud|g0v!#Q#mHn?E<8PIG1mdxv`|QQJjx=!7 z4bR{Ov`*DIyKYJdVsDj%42g2|8&Ss?W?;9d%49eKV3q?MPcvbhf_MFx0O9^q{;oFF z3>x?%o|%nRhz%-@i`F=gC`}o{-AdF-n(p!LBF~-Uhr8&?wT!3j^Re<)?LKJlc9K}7 zD~U!GhIkZq>&1bez2rGRN8iB?u~LUeTEt^yHj-Y9(X(+TzfU7)bR|5%xOS@Cm0bkQ}<-`(1BY zDOJ1)tW!J*e3;=64Vq<*Q5wNNe$D8L^T+FN`LUFS81_6&O6xmNG;6mB`!)NqjUKhn zbFlB#w`*L3KsV&|C2od0Lxtn_PAXoU1WLiNf((2zSPq6|3uP6m4U5*f01}c@6V*1OH&qtR;T66CV&>PkxTo*?dLN zeIa!m_1P+aD(t4qt=M8I6P4h+3;yLVn2_ z(P!iDB~JOdD8?96>xlCZv4sp*d|!A;=I9?YL`U?slV{a2@&vc%63rtdkm$bAnAG4} z^>vmsC`s?OW~0^!0CL7YJxc7c1RfW1)uKHQX-cu_MyJZY1!#f>C&fnhqF)rPCaD0~ zT=SeMCV}UL!jWXm0cdL)e)#1TPizGBZzeRe)fX0?JUwN??c-yBN&^Lu8Z-qrVGubcZNK zUp236{7vL@4HbYLvy0s@*K;pVX% z{gB7UjB5twRGV>n8>^^EIq;j~EY{)qM z5L$=e&8ZT=;Z{gAWu|BSD(6#TUwV*Ij1EM_#2z*P@p< zL_y@juKyN^`&Sa#|HW+AKLKcuFv$M|p#43p9aj2(FzEgPp)vfGL1%8RuWe`I`d0?Y z-$UMEVgHRn_efh}r3YZNKfy(gU|nr%U0Yp?zhXsy6Kjp(7peAvz5^tWWB|fh|H9wV zH#gA-@Tz|X%$Wa7SNl&$6^M!XpYu#EXv|sus6%cZe)n?`#n97V6+Y8B%iaJB}Y-tPt9~=HI7uzGE4Nt(>1s z1>SQ}m9VDWE%bbdG6ikf&@P*7q&D4NM+UasuACoqR0PYWOH|%irQHWUYbw_rXRIc% z+S&nR^7}f=TDX2*#x~y`F9miGrZuqZ`yLm(e}kIR@WINtSrd$vqQc?^QgbF*CKV`? zG`cbSC{eOTw;;?uBD~L8B}eC)k*-DL=^hQh^LuBA_S{9N^(A%+%O zz*_6+C0G2?I^|`-$_>axq}?O-&B^D}FZLE=AOzm#o`I>XdF(eoRZqf(+36&bS5*Cm zKMquQRo@qs{A^tQSwhs@k9&hEh=G1hwla%$w_ee*-0g9oe>=W+rj44R9SYT%Vn5(T zjFn|w=v-E&l`{>u6tB~66o=&b?4ySfVhS>gY29nfGOreLR4H2r+)nY~)ja=r{V666 zM|tO{P0GSbHGf))z%Z5GGiEJ{j1*Dh zT3o4R(m|x8UMnpGEGcLGQ5LDi=X3UX!gEXk#qr-_sB27gloatN_rCe3&xms;u#LdT zS=WwoPKS4)4s5>kJbjMGJo%bsTQZcz6bZib_;4(0>M#$KF$?Kml%R*PzMpwg$DeOj zo2~-0=2(s4;9(a zip?yJX<^DKhXE1?H|U_ZR~ezVKkFBmNd>TiEKvFo4zUV1R_wg;XuZ^Qq%vm75`!v6 zp0KbJOeI~fJ`0=D1V2^T0B;$N0FcW_6d5d79&lhmHJ5kl+$nob0AkfuV^YwkC&cav zMbk|HgSF*TZbbd9-W|f@DOY)QpGqWRJzsc%zB^qQ7&}>5c?%>Jx^U1$FK~O!RkL+r zAhL!Kd64J{Kc3Z&Cy1M0)o+$IR9Cq#>3h&L6zz>qtF58Tq^qvXWT+<3WN5wc8Pv?X z!ZBY`>Jn5w9z5wFGmHQZUzj7#lWN9hG;DY5B>pk`T>=L(!p&t=JW;uFt?`fsH%J%c zlDcGCKs{a`zup%rVm(Ev)K_Kf-!-xmVg_T~kFkU3xsSs8QK}gGSgqYrcywj9<3VSLRKN1<3KpbrWe>gD2O7`HiFS>%3k zzG1g2f6A8(NxeUiLN{W*b z=R1>U9jyc`vhOEL<$Yj{`&7v-viXNA$QX|<2LT35&P5xnhkbnSQOX#7xrzyio!_3I ze_M5PC*DZol$rL zZxmYi1TLY9j}gP>)h%X~RkaV^{PA_84p82lcMgl;XCd)XYTV{eG zvPv(UO}#{PcNq2F{n8f5sz<%aD^2Ekg5t2Lnw?ttq$t=xP9# z3H9D=u4^U|lU=(O9`j0=9BAl?MLSOB-ZGMGC?KmAE{(g+0+}2Q?CVa{Lx8>G^^$;1 z?6==QsSK`NNkV4(a9H>@FbALv5%z%_^-vn=ax0p2Yb2WES!30(EG-q9?7J6$MOg3% zg=4p4>8xW14jHf+4Qy2NK|RH{>4NLvX14=*BJ&98DNXG=UPKjBO6lML2K{^Sv0X&f!7e8 zDigvehp@Z2eeq^tBq^(HtPWsyZN&jorrJ1m;bckyg%AL{?p5hFmRiG4EWq4Q-%Pmw zR4~OT?hqUA3eqB&C)_siq83XvRcA?sYvqN?_v+Eg7s7zRkjO2tT|bL5lqt0vv8PeJ z7X%s__``SUVc?WBIzs7S1xc3jS8eCo9(J$S>_Nrp))Y%QY<}o3hN^1nx`B=A@{9Sv zGs2-v5oZPCFa%s)#cr;#fiO^~DYqWBb=P~0RBB<*951adtX5MKhO6Ch1?S#Ohf5rJ z9%v36dG*(|uE(OLs=2Q_-0fy}9oH@wtI z*RZYk4R2k_!(c5WC&ohdo^0tIQ3?j7H2OQ~P|=p4G9(7pG$Frri`Th0s$WV|$Hyx& z#>q%MZ`ipqUVJXqfTw}7Vx5`x zQ1nT~NGZTGrSw#>8DUf_4}dBz1_I~Ul4`R>R21si3^6o;TjZ(8tU)zl#m0>P*$+HL zQ8$TVj%%i6q%hBpB;#L{iP7E1`!D$6rhgdFl&OC@g;48G+N4NryBWxrLpiydBn`#b z#S5jxhYD?EQNzmqgpJkzi8lbmXJ^xnQx&{WkycbgU_-I}i~8}+jSXWW3?w)BIFy1- zyMD1WP#)MTNuQE+C;UNI6rDJ6t=1HyMybI6adx>cbgKhFpU?=O1E0>*Co}=(4?Vzt zL^g~_?enY4ZDXswPaNAhL^fU3O{F~7LU=Y0-xdFc2G*FF(qnmB<$_Hi*RA;?kTVVw zjBZgHL9wkuFjy4=DxLmtZQ3N`QQ!A*aY;SLW_5PoBr=}^2G_--ibTx7ipr)g}rQ#ujU=@4y6bX9)F%8!(^~nW@D?GSbq`CJ^m*6GO4zdh&jXPBqyj;dMgckJoLJuBGl8 z^S(OCR=dhfOG$tLnwpDSh}O6>#;4#`)X~$s8sAD!#8+_>66Sak-TAqw!^%WyAv~Dx zL3*=g7=54anoAX6Sy9-x>n�*rvZ-Qg~d$yyD^sp+m)7jdXRZy0vRe!=MV>%l~#Y zgwe$BhUZb1Lr7Q+UQqP>c(is$$U;hP(&0+FW2|qQ+=jZS>5Wv-B!e#K*8Ry|r~p}> zU)X^F#oW4%-*LLFKgBNop4P`jouDhT^Ok31$T2Yg&uKCreIW=%fd3DF* zTnqgR?{|L}&k~D?pQSvMR~m!TYdV%eJzf!bo@Pp6nmFXs$T_gYEkv@iZ*JO3(^1Rs zRL0N(<6-eXBOVn7u^5>VCSgh49|YWj+;36wl}=ax9f-jEuYnl<7lR1@pz|<4vUvWP znDe-3{U2}z=D#Br30P7;a8MYDA9CeAE~kNoH4q*4+r@|V{-0L(zb&vG|FXjV8vqU< z7!lwG(f=X@J+AP9(_c<70O6Xy;+6i0lX0}Owl%T(ix+=}IR4{0AH>G=FN~Czwa6X^ zWuJg-csrgDVNXD71iX|u#6;y0O>mCL50sRgmv7?~CNw8NoJWw0i1o>eIaFE^3Z!7A zT>b0MaF;g=ea$drQ&jp${oQX8?ls~ji@JCb8_?xTV2Gw5(;eGCtzUR)-d!cEvwl|* z?imK6WJ-W2nfFlw%TH|ETDB!<#Vy%*^)s@^D4AwseKQ~59OeFm&=9jqNva&h0%#M8R~W%C=ss8g zZ5|!Dj+eBSRhnJ+oAIGIWe%%wmR7D{aS5t^AOSltR&wczIgHnRt0LLJ_cN z5M;`z`)c}OWEPG2sk=OTQ4Tro_B%|5o;BsNaMYNk3wqvi_1IYBw_iK-2u4Y3)%Anu z*-KN@n}8Jq4{YtMj>pKY`9h(-Y?p0AoucZV;`ejAqN=xBrY6{++VXb1K@UAv_l=&~ z*72o;&CmQ18d7+p7*YjXq*GGGqi??AKby% zSM7$gxs@31cK1{Ag>)zMUkn>Xo4Q;<(^L51Zz`r&_V*|BqY4<4`v-ezYTbG8^L<9o zA$i*Tv+<|5lYco150twrUojDMc}_lW<9D=Hp0Ce%fJN$uJ<*sayys}V!7ax4d;Scg zLoa~e*ZSTyJ`8+m^b{ObMh8ThIPAJevL$%*Fvd~3++9yBp!B^tbdg3z8idh!btS(n zb=pOb3wsh&^hal@CrB8gXiiSdI9{plj;-5NXa_P(j1jP4W=tb5u^;aRF^mqpfMQyM z4TDGy!{`#yv|qCu5hl$j5kU-lfdTw9V;%Rq2;fd0Il8`jI`%}R zWOmMzsU2tS*x|mVn~?l#5I0|PIjjlUIk80-VNS#}RK3&e#DuDsqwCk2hRH;wZyGETqE(W8oVw27SQ#DYV1tm59Sul|E%8f|@w$OmL`l#}vyFiEmw^&LAYysIh6_ZwG5ro^ZQ~>u&AAOlD zscAu=dRr8`CP4KTfOqjbC*4*$s4iqfT4p$Icy7xTc+*hd!`Q{{tzTH_L{gRXtEaGt zy-!uSBRl27>|r>afrmAFLKvv!^tw&ha4m;RT-nggNC}){?d{~?b{@Ast@!%2fDWsG zQCqFl$JUj-p%cQ;CH;#1cvblzomB99+Gz}A^U%FP!Mk(|q?}ZTV99%eAEF4R8EM zw95yc4?u2++h?`Vbp}*lmm>6{*`+Z+>Zb-~ETY$b>CO2d$9~G{&Z7-}X{Xd>KsQ4= zC9e=@G*+eVU@#d^d$|y2E_TpYXb{aqdQs`AR-8(24(AlSRB&o`c^4aIbrg=$3Np`a;Ah#IJ+&w=M^UT61l>ct7q zO=8ol@fC~C>T}KjmEq zv_5PZ^QjPG-m!S5q9ByKvvFf{mz6HTa*v77NG(*`2qz?5{+>K!9kr}nq}Y0VYE4yP zqc5Yt?gU}1{N&{A6rTLv{PcR}yRdSY@<5X}?xrbsbR127@S(9AZ5H!*?%kv;EwW-? z3aNDY*a==4qR?&oER|cj5suc@XK^#3azV}!riNFP9qbd!SMnEwE06i133G7Ct~R@E zd&DY~RP5x?*hmeI%CwolVX6a1xtQ&glq8`NI!;^FpWISe!MH2h0Grx!-!2L zS6wO;%CyymZULwFYLwK11~}+ONgWov&e&S-${{KGyYILQ+}v1e|j;z zXE5TRc47yiM5-SsOgV#ae&5h^qgY6h#*F;=w}a?|Mc^RHs&(+#lGy9{_E=m*E}aYH0_12*to9QhKd1|BSi^^JE5qVw zwyhyZAV6>e!Gmki!8Jfa7%V_=cPGK!-Q6{~JHa7X@Zj$5t^?s~k~im^_uTv3&+f1L zV;+j?>Q#HXr*`*VwQCj35@n1y@bR?NO{W{Bj1iJFh!Ki?8zWmhMZa4x6>?}#TC%B8 zmEARN>Nj376|(t*LL=2YKC6pSo%RL9mRgQsq5X|r;KFeV*>D&&j9iiod>(%m@(+-V zSUsM8OtLI|>maqa3t1mE$Cr@Ls?=XLKeA>-YEF!s#94lhk+m*T#xFwUYyg{^bZy%D(%;&}EBLq5H4!XFG@&l+RDR;19_o-MLa3Xn%`^l&#^T^YJb zV|?B1Fxg@D-I~ZEgytm7v4;761XJ30P#s-qmC(XLTUe@5bZH8@3pcN`afDukan!Ie zQ;LenlzdbPOpn<-vLJRlQ)gi?+NT)9^Sm&0r`qy9HDeZ6u8;6MPXHD<=%ovzEC*4AbM9}+9k{ASZV+Vf29K&Uco&p*_%>=(~QQ439*yIDzzxJqNlF~7A_#ueU^gOI1>8$H+8sZ78lH2iaWi$hsla} zc3-mwr5?62^!Qlll*jG`vl}WdsA=+t($Z)OO!ue^TPJRnKbvvjSzMszLQ2hj8xHht zvEqn+gccF{+p@)$)SatkcycO8Ajl8iAWl*S+=tMLAEI|DT5F|8a4`|BMj* z&uSX>U#n^UEmr@vu;#zkm16&o2@wC+!Y!PDfW%*6IVZ4^<@df^z?}GBVKUp}7G00Z z8vlrr%^$;cT?50v$H}07UAgi9sAusnrabOp|65w-?8-I|s+#=jSKXfR!ZmD8F~HS1p3TDZw6x@Ig{K1^Kl&8ik;q ze&2lXjA;0vH(@j3us=-%{K)e~WV0RKQ&c*$g5upd-~@pAdGpUs{oGqNkc}~57yFQ! zyE#W%j*e872t172GxbPdTw?(-EPLrc*!vlV`a4U13bz+HVcwJnV1eobQa((Wy;cT*ky z;iw<6OR^eVotPZy+@w%uL+VL4D?ioiYQeTe1&=_&d|e=L&Tn6UnFt4;mm$A@J4L=L z`Lr{|PHZo1M&218Q@EP&0;fz~WrnvD);_tqYuVh2FgVA4Rx1d~hK-_W6xOo(NC|#0 z`4v2*lR@Q0bnXHA=F?J*brA%p1SO5P$f{C!ly7a3R6{0r!CPpcbQiE)s`<2;RJWr^ zd^w)wm)>zV?XgANetJUChJsDpZRgQ7qs@|VdJdmQS$S$7^uQpxZjTLqu5KMum^(e0`U=tr(LaI&xCcABLP7I1~geFN3TVtyB2|Yiu@tV}6|; z$vxz&&$}^m#2jv4ip_4d_-(U~%2{8PEwvN0w|w!E-rj|631870CYX_TKvCiX7=FDf zEXZ04uTmMT%+Qcw@@+%3p}apD7&RBrXq5WdXc*>y|A1%Jh&FMa0X zY3NZ1!oTO9Mei5+8qE?1jW9Xc#}aTe0Y;bzg=VMD;wmM_6w2JK-FelyE(R~#5-Ai? zg{&iP9Vb-HSXw{(Y*LwWw^KQ{Zj3@bn-$ouy%IbX>L-^DgVMyM`Z8;Qku9e2o*Kvv zHHMd!VqLJ!Y>XQLk8Auu)=4oyWAz&Yk4yb7N3(fT=izm7J~qwG2r+=d53@}%Fd@rK zWb_;zATU+`B=rM4<)+?Y;cw6&I+<_fWsn;>C3xm#kThk`wwQ-EU)%&{y&jj_hC4yc zD-iWebzyQN)GH4zD%)5RWg0-W$TgmrTT{_L%G@D&~*A8GKpx z;T1}OUHel#{kEB^jhlQ4-rdy>zUY{ZNE@?f&gB#@r#KoL?JrzwUf(?kmW~WQE!2=G zqdVA-l;=?68#X0y1)~%pvpsw+F`eqVobEs0b%Nxw+U4C#Bp2K_(wB08#dq=wO-b${ zDVpO~3vTKCcAuA`QsdxaEYVtR?%U2}KQd%|*e?1`4@juCw_E#;(6FG_mhSj;rZ6B9 zJdC4?92&vjalDH9j_q?=iK}i&Bht1y$dii60Vexl5Qlws)IKxbu>q{rX!+Oc(h{1z;0+nBqqI7A*1*S!GRSO;#RIa z{(Xy&ms{iVnBX+ae=B0X<7di^pU29IL|!T6oAwsJ!|R@RgNaH0NAI?GyWV_mTveZb z)9~Y>*ISNgxY5q0VSkpsR)alxcWg!q`mGdG-uq+meE-#6?tm`E#9Z91BDDqaB~komM_O+_SK{7@WH|nZ zNx2WTragHk(MM`6tw3B~?`qQu0w!c%{yX*>~gd>{$oXRA}oAHp)+{18Rz28(RKI%IlnCa@k=ZQtPE>%SazOhVAA>#`M7h44y3*m@4bs(H#N=%*)k5QLy@*#^`(``!)nV+t=G7o>aJZaB7ZU>{K>7xj z1DnI1h_a!z8>&O|3c2;#)J|ZhtOJooLgznZ*z(-T)^{5xga^ayji=!lY}{uK`~NnMleSgl-R5bx1hkt6rldSVG~ zv;4ibd6$NPh;u_Tx^jT_g@T@E~6i=kCSP6k$*ut=1Fqrt+1ZNR$9xLnLp10!;7s zh?%JQ!E&VD6M0C9FB@F2-$uHh^j+AI@YO+*`)5#)aFSOA0A-_fLnSCmD%q|Cd_;a0 zJmNBad?&{w`%X?K&Rw{e2Xrc&G|71;{pLxpKx9Q6_6t$c!5?nQ9lB}#CgE8Txhg>N z$~;Xr-tWiF(PsK`VVV59H)7oHKEc492*31k2x`oLrP#C$@E3;k>%6k?5}6Q!DhLBR&6TYumsZXpx{)TF4QMbCRt zZ{f80$vGlQnv&0tQpi{&>XsBqB3bOrmhIW+`4}kap*)opeq+`omO!1kqmdlxl&(5I zZ|i!4@seehv=vuF*gInVMTdmZv+9o5lq_!T?437oia?bhTq{)f)$4%Xd!#HcO)&YL zj>G+ck>;dzbXBoSm7D;pjjB$;pmtyb^Be_#vU(gRDDtGg{6rXe;xF6Jg3)VO;V|!> zOh0eMo$7m9@H16?2TXXl$k~c3%Ol6s{<{0%y9-pxMrH%U(oa}o>Gx%mY+jNRhV zUMXC#%D4G?TMwWV`#C~x@wU#i?+2Ra?Q<7ZtCluhvc_9kAcKA`=3!s)ZzO$WJK(G2 zp_|G4_|(xweAEU7qF2fiW07a1ZQ)?jS!mF+lgp)y2aA0%R9W7w=RrKz&zfTC-}V{s z)5i3`OZnahDA(~1E}i{u*TxnD{j+0@@00@7 z2x-SwNiEH`s*<@Pf1{H&c2pq^SZ`lJa^aIbhoVz-VS(%p=7iQs>37GtS{VdNZ%0gL#0@UH9J9epy%ytTaKK@ z=5;Rib&Zc?PhFz0W}~Sr7UtK?=In3lLvpLC26qZDvH>JgseYs?<~10C(nC<@f@pSE}Y2f6(v6*r^~9n%Zmof8AQWp_qNGjKA6lWqA)G%oah@=DIO?2DsJDD@p};s;{~NTk-7y4IjdC^b2l`t z1vl$U?dVvj7e1TbeNEjryAq4jNJe*l@L}~mkFBh-CRf%SXM?ZYB#4e$$8Ce{fvW9b zrV$SlSN@Ew#X|r?T?Qotw)$O!qZ?^V z`hjaP&?nXa8R;8U6q_)x#HPv^Ba?ovMq^GhpeHA=(BnjFP?CLIi!- z>rfxV2G~BpPdF!*PE@iaU-rKwI#c`TT=g9Tdl0x4`GjdZfBD`s@Z{n1;U=M4yXP#e zJIg9!Ab&SCh^wAnb5i=QYe&fb#fQsay#AvDd{mWh$lCmuvgYgu0^JT4w>x++uV*Qw zXVlBG)*z`jHLp(+?vGrC3?=yTwiIx;#9y#ff`&ur(NAvhl-XG;9hm>mAWweDYy)y7znF&)eGB#(mntY*1uRI5TO3?i!}lScmY!BH-7_S`)jGmKd*+3vAMpk zxs|4wr9IQXU6%ij?2mui!}1q(^h>0eodm@C*NT(>Xo``sq0ztD!tsC1C4pF2{+0u> zpr&d`2neN4m2nQkRj%AW!Ga_2>a$jbxrdgD&JujacK;w~=rD&jbU34aGaYKG`eUSL z!-_NBvX^wDYg+B+Jl5U41*rgKUVO2&RGoAy|2?EvsZr_9nk+pA6x`8M;+6LX;pgSt zQu@zJ|GC!ko~#e9&-Kd$O72_xX}4hoj0xT>9Up1BHBF$l0@?ES;g^^F?rG)D&sT6# zBq&!A1OymXJ_30lYt}of75%H0Lr%D8{CYq7VlCWD9GGaOzS44g72j$TLN?aMt}JhI zI}X-{GqfwBT4pFbcXNStmrbsB7dzqa@ycSH75d&@KXY$zz1te|4|m2mT@8`?grTjw z6Ni)TQv0LOg4n%5$op+Q4)EUbIa(#8(&^)1mI>m7$cZrXGd7h}q4@v1V=7&phxOL7w#$p??6BMGCzl2l*qWyAD6!xu+LV-_cj zHm)g$x6_aXH4Ufz;?%yc!&f|%+e%(KFP}TL5TMSfHQ2E+>7T)CmR+!Zr?IGgjqCpy zcR0R;szgG3g6qX44xN(1@CEu!^@y4z0%6>~gv;f3JIfqsmeC}i8@`ts_AgZuwyVhl zi0W1+G!vA61$31>D6?t@BRaxi=Cvma#sV@_M|-$V%*q`BPK101Mi))qM@cT0FB?Hy zZ^nokXAhrevEz02lwZmKvXEVzd0)~NY_N)?iuCo$Jr%)ZzJ&qI5)lda^>KCME&3ENFu*&ZySy9??pzTu=j7|M zN8ztdocC7eJ zN2M1BbR`xHmGpt>@4C4i6hA8RJWwk(9!n{rVuRFO%hh&DiG=-%!d<%6nt^c6B=@{- zWfzTjV>iM=Wv2^!IjG40S=WR)oNv11E4t!MC;5uv;<+>N-QkDmyi-KjYA01J?lEP57b$Ah&f{Z~o8Atw3?JEZPr$CsWM^pMx~`jM zlI;op`M|i#w)mW`6U)I9!?;vNev_FUord;SI*qWa$z&GDup{@7>A)Ll%`e^#pH{>T zZmgs^q-cf*HfLyXxztTs^cfdRpHI`A?SG6K*ppfq2=WbD(T-nzl3PIPQB%IOCN@Yr z&e*p1a|(m49=B3Bn3ssigs_S3DcE17DP>mPT$3 zMW19`>)}ZuVX5;%&^!^Zf>`TEA4AD8a?T@1E9<=0;@y*^Yx;EadQ|BPnJgkh*c0Ml zQMIukQG>CxuHyu%;7bGaIBX*>j;(OvqxeO(u|kf@^Vy_|^t7KNnu1;~YR-KJM0B-X z^12bHPFAr(^Qz`Oy4+pj&oymaNJ`d5r5Ywj^ir#gQEHPNySaN=JrIHIg1rr)uz7Wx z*YVmwfN(_nugYQrzBN3-NMfb0(6y%_C|-stJi$AZ!0KAu$PMwa&<(j{K!1T5kdYW< zq>oR&#~ntNV0AO%Kf!N7TBu_kZY!#ZRBY)z`+L z1%aTDJ;Gq5w~?_g#h2EizaOM3+Z0FGorIJWe7cDeCFGvxTjZgBRh{Ww+(zI}w2#`e zk?y0d`KAoM1pbMg3S6xYAxZgX0cVezRYMunleGh=P&TK3ziF%H5Co&(KU@SJ?Tt#wzo zkL7Jm19!yFysd51gc-HrzSn~sF5M}Eh6DA3wugI83zBu6?h0p!%L{uB%2(7*SGG+G zow{Xf==Dd9VQ*p8>KD-0^b%fM5x$-q0x6cRIl>i{uhf%fbr0W{p0g0(-OcKMts#@n z^d1__C_a0`h;Gn&XnSZ+7LPC`rT7|sbft90+$LtD&|I~I&`r^|5W;~6?MLCN?AS3n zO^5?2EDBZ0f`5~P+10`)OL;JXqAG-5D|y@^zoR677J;>4S4y8$XFfl<^=S(hl3A|t z+{_>0E4wT_$NMkiu1fu#%%54yTOAJ9w1Z!I`$=|9@$fRv#b;1F`lDdFz`%r`#+N{!^lD3Nici}mK{|twvhyx2ej{l5%f}L)17v=a3aOg|w zzPUd^B@!iB)cxs?(EXwwg742$2IBT7{MEmwxlMirB3otpO=BBdTf}_#P!E>y%Ew} zx98u*8r&m`OvDgHtAOY`EXhBxC>`7!sHpiXXygGCmm| zb`Sk_mGg?}XzswTtn-y-*@J)Ki}}Knrt$1yzj4lR*M8SmW5zdKb9nsZaLV;$gQy{VYU$Ze_cBP!K5_*Q z${CpM+v0veR_nZ5&a3_L9nCj)nu(;F44;l@nPy(g@p-q}h|T_p=mxf!O9?M@lD^ zYQfqj_(!vN9l-)e2`Cqmx{2JnQuV`?+dMfXb^@<+a~E0X^W1uI@em2fG8rv;j#6aH z98>447LmE$T-at2w9@<0x)6IJarRxUr23Nu5H{E>x#1%{dGaN_Ll3WVf~s=rPMmHa ztJwg{K;JI-Y&NN&XO41fU$GFbjBMe-buiZzP2r^n`7o?(j*!u>2N|#>DSQPApmlK! zj!<~n3H&#*lWW>87TXOco3nF3U!6=42diE5e#}3xUfef8f_>iEODb>3Erc`xpr?+YS;!Z4G)QX`XF{ zsTY~66=m)PJcvs9P_>(7kq!YJIMQIYqEN>)yk3wemT{pX>I@|TwlR@1lE&M)BDjt$ z$#U?sM};-zT%yK7dYF8zM64~yIb8IgUi6PU6)Ta`P^4>?y-?!B#mm8_hNKJY<;%om zm2Ach6*eZ;fD)QP|A*=s-<;1?#JY*v#$u=w6mA{Xna*|wiJx9db~*I2^jcPcKLh<> z(nrtZ^h41qQF8rb6h`5@*?Q@}C(}=)^sE4wBmJmo`Z2(J?bj;hD*I6RM$-cq|7<`a zu0TWe>;kqwd*R{y@KcT!)lW#Ebfq6XiEAi#A@W@>KYV(Kc;rO+W+uy04U%~nRj_Uc>MI8VCR1foC zTfF>@++g`@2d4kXC;;RJ^WVvhU*F^JxA*^p^I_+F+~(;Q=kre$Tz0O%b|U(_J(`d7 z#@~(kb(#O$i~%tL(jk9k?tp;BHz4NUn?n5y1@?#Zc{JtUE)3|uBcbUZtPeXEpd3?M>_?y^*tUga0fCDmz{3RgAd&8)$5AEu1KZjv18JIP)t^oh}GtZw)W7hJkn_H>+6FaVN zU5&V(eNZXBq1Mc4a%-r~tn}hkb!qE(rrW+@vWJvU-d>-qTuBpw96ToYf5Ijgeq?_^ zJn)HIckY{3emI~UvchYAv$nA&KpY~F#bF4BF8z63hg5xiRYO5A1r*+n=!yohK(^i;L*q=?N0?9`!mQPy+B21C1 zA-5Gku0zN0b-aX@&(%Sduc_HS=iRXC^-V?1oc)0{;l6R`$_Z+0xzH4g@ZEBaqL zPiM_;Kn8DJRLSNPja|J=&sJ3wT6=2h92OB$FjiMc9G`@zk5#yB=)Bt73{xAL9wqM{ z>1TPpgqumQn3U3qR=Od`FZ{eKQUvJ;QhIi_ws}_0>fQTQn=AikY8r9(G(EhQ@~Mj< zzNlgH_x*}I{UsTc!7DQQ={Akz)M!PQXjeloT3kD!ZD$#2gV7FrI)+IfH6qYpRF z@usw@JZs*TC{@h$vQ)mi#aR+Lu0hf~U7RqdXsuOno^w$;l4P--aTU1aje<7an$eo$ zz{;I7ZdS){=8iF6F+V^@DPAn|iyNCH=IAqCj8=Q(ORG%h- zG9`;zcmj`;-yEn8<$Je$34=V*M^M}QF42q2hhI1LDSor#S+Dn71t2xJh=vPN1ew%_u=DeL)l zd&|_q!Gtt848Cv*!s}_l?`eXSKwgutHb~N3DsU}zCxTlNETO*XRvqN)`O9 zZ8?!TL(#%-0d&hyw1O<5=8i+{lPuAawGq=|T*l^<&8|Kv;SAs@x185hH0?TT;c?pc ze+ELH4It!M!>_L1Og@Y*KT#)WiFH{E-NbLhT7s%w!FM-lfu_f)SJhI>yM~wP`qkY& zeUK$utP4y%JApH8OF?Li`P$$GcaqCWzy8g z?iLTr$;1y6V)r(qMR6*yYrPb8URPbkx)Gjo%T+s3nPuGYU98MTj}m6cTKK>8*FusE zf$xEw0Z5O@@xn~|Jql}jPp>B?U=5$!;f%TdCBNnhD0SWvDQyleR1zH6Y1hvm^f$jw|{_*+s8iSbq1fZ*`scQMRhaZfW8eqB%dbERwkNfWZKv%u(p zIDE7GXv6K>7(Wi5Wu4P03fM2t9|SPG(r0fbnjw@=-1%OWzkUkF65XFCeUdlUDUIdX zi&jSaWbBiBGy?ePR|(iSKSx(|&QwPCCLc zU1J2ESkiioI99+=VFHE<0x(pxj&QWaM;Lm>o|+Mep0G8`Rs+(|i}Y#Bv=5FV+AL#I zSeLTpk|#mtK~rXOO*+Y|_GU2oI>{Jpb5NU=I{1R^p7S>zLRMC_z^w*((ALs;mP-Z( znLF_ynG>j20wbk%#}o)^u7IHC5D04OkR)~u8wd~ zLBgmB6r91Omqk$QRR(SDp^(D3qYy`zNdvUm8;*eY4K#M#le7)MSg-)bg2m%lD9%l8 z0n|}HE_o;YHRgMaOAMU87(I$4LoXD6*_<=|rdLasWK~Hio>XxrwKU78BaB(9L=Q|z zo8zd*)j24>{!C1o3rvXv%9`T9{Ph_iF>Oc-a_CNa9KY|34buJ;%Snj zX&oCN&}qbo3Xx4yj?2Aca=`$#1b5VV85Rcy8KOn=dM9k+F%_%=TG+!R|B4G1g&WQY z_Sf}Z2hv^~3_=7Q4F5HBkrQ~QcKO&PSAh=VJOF3XC`_ zWL^x7)0Zxp@V}6Hjy}}Qzf!T!1!t${a?uNsN)FVlVsq7qfi0>=^@zFjO!&c%Hahz> z>jMPgqbYHKaSpa@LG>%jG`Rw$%SuWiENQoMqnBp;TOaSppGD2SlWx(4brRFC9vM4V z!sfFLpBOv4nWf_EMGgLe`A|+!A{G~Fj6ITy4&o2)$jib-{1{9W(5nN>jH%E3WUvrd z2#iA(U>pkcQSpj07`@Ym`Gc%%2&`$ITog1-Q4uw z#)N{2`n!2Ms<%g)YgsPrm@&+5!7ulcj6afVE0C2|y@`Kx&8 zfHGz6FPY!#V#n^IYE+S&OWBG{SJ<-Z@R1?m#_*0PEkN?S%Wx3nib@Z?WuaVX*H|8N zc&Tf~$}nh@RZnil`@-LlV$OlVl_Yl>z8vMRQnx?h98}?Sx9JW{#jiRj(0yTc_~g48 zph|bJ3r0$USoeb0rz6a~DURQ7!{N4*@bOgOXW-%rJ?Eo3+GF~@*tFIZgD#{{i82+? zN{yzE9wO||ma77@0RN3Wqs#iBEec-b5HsswaTr#p1OxKjFLbc`0Vh5RIPp6`sF)IP z;;DcWUj>{v7U0AS04J`LyTBPk?_G!M`;A-eg}*7qU}u&wJd-G^!=C&Ycp%9@XOa!` zEX)8(feo`N7hta*6>RbH_ZoC{KeEZ;(+r-Y;|>l0y3t+5#<^v{oWMLVCtv~02`qf3 zch3z~&a$<{0U`j#0_iL-9ECtN`m;Blz6rBVP8Tpg`(`c*-;3pkK3;d)-ZEc$* zUvXfKTj+q6i>UK&cV^;gG7z5=SRvq6axTa_DTX?vi+Uc=Y$t)b*1>rGgMa@mQjor}3IcMvPw3I= zaS1gw$@F-1en2mkEczInD7;&Qbk-}%bP-YT3#@>?w;(jkhmbOz-3wT3phrN!R|5yD zBoYft7gj~47!ZJVycxdU+;v2TND47O3RxFX$;Jb-4saLbCRek4({pg5QX8xV*`~Rv z?`hLT21Q$*!;ubh=*K8@YUG#^p}(nCwsVBqRB!>@621t<5((uEJo6ynOiIZ0?OG+Zymb(rZNWXx>;Qbx>>Eox>+ZU({`MJcMJP|huk^e z&CiMUN-u`7OgVU2|KX>D6v~7OerqOUxe&%KC$ebrirPC{IQ;z?0F@jD*s%lTDs>~o z7(Oc9j+@Fn-idVlG(6yG^NBXo1`tzDazg1l25!WQR(h=f5rL#C36Jq^ZtL#1+X#y+a9^o8H%V&$eJLk}=3l1=YQaDo>GV|yA|s}>jvf<#Z{E2IJ!_*gCO zS_7xkk2Y6x;JNWlLehTTZ0xj3hnyugy33t}$bh^XQ!t%tVm^Rd?;$(H?n!R87_1{J z+<82$eWy!!eF-sD>!m2%_35qmoW4}8_jf?@hs*7ayR_8&J1%jk!5Gt(ygX&8l_`z% zG-vb`5d&uEDIYXQr&3W{@cly3D=A9eUh}3V0oMny8`v>j zE?Z{k_k>h!`Nm>bPD&h@Hnb3}*3eEj*V^xd2e?+mE1v!&KspUBwRO+Gx6Uor7ZOwE zz@eOOCaThJT4vbI6MD$CEFU$mJk+PZ`+8^9&W`~4c+VmvcKoBX%9iXZ3PRbdnS1rX z>*}-w6THGiCkx|u{Qf&w{v(Uaq~AN7?D1D!g*5y>v<$T5i(;RZHYKF_;`q%~={Y@2 zt&`lnY%DI@o6s}x8LKf?Tc0@z-)(r=cm7^z182(DJYNYVgjOYf1Xb6cmr?TtSUyOb zXTK|9<{G=&`N)$A5~Dcgz?ff>ksi@tJmnd`W)Qyu_A-}UZy422pv&o{ z&{!=Ot2@^w12=dj&RUT9G|FobDbcKIBIDG^w|tn*74eR_M4?C<6Eab z5%Eu_sH5>`_TI7Y<|x~)iQ+>p4?)5^Lq>t+yv%&8P%5<=Z@2l}Vcr`=FjKO?OHd>D zF@YpZ$V_3BuJ)%n(CpX_!lej>YfZC`-UQ(#Q20w!Vi+*nG9LsJDJ74|P)hDIydOhD zzW2KLoFSeR8|7T$p;3}cQ|t!|7MYNU+M1}kp4WriJK~h(aj9k&DEGyt*0DWHk{peK zYc&{+=*VLWD*Jq>V#PdCVm9wHF~okL$YX_26Q2Iu3Ez;N##G%>=v`xXV)--dRnzp@ z#9A{KHKBX99j1>ynna4}SUuR&(r0-N2U08yagJW>uvw*E#n;vockp@D67_aFi`+wM zJ*f70$7pv}NEjW4cps>cJt{+|ps~g%5mvl_v?N&hk7-c0J|P$~z7F^qoGbRQG4a+c zrUr^$p;(n{YR<@o4ujTdO6fNz*v<@k@ph_IT6k!+4hbA_FY+6gQOq-NIs_T6v%89E zSSSsUR7nnSm>6f5=|NWf8PC~M;BbbHM^@%puKTsVL*6K#`3v2YT|QOBNpVxxJoIR7 znbmfwPx8D7Q@M!`mULqb`&^fBbAD-^xpF%4q2sl*aAD%yLovr}AkwC5#oJzb^Vy-` zFX?+PF0UC@(JT_4TqXjH-QKQv>cQ_aGD2d?g0 z4IO!JnWeBI`t!9INktItlW$zqO-FQkj-bG#61S31%0x2PIHI>%0g+Wz+0S2{Xkovh z4ir;7Sv?&oUTzVB&7aJ7=UT6~@oi zkIbpl^{rV9C?Q(l9a#uF*f?`v3q`eh@X?gD zg%ucL(Y|cgur;#$K_`P#Hx|F95!SVZ)b@g~-ylplH>ah45WJ8|uD1C);3e!UAsecI z%1{aB0fA99EbB%Z0;_~T_XaKLiNtc?9zI zgRJlQLQet{Wd&FDvNE>Hn_=Lx^~j#Ti;p+3FOB@P?uYpuHtG{#iBKHu5M1T`#%2Dv zZ66_6h{27Y)70@S4M0-OqBudyTp~4J_t)fdhSwybGV}7HE zD#xOoMPn?ug+e$glB-2Q(-dx7JDLz7yed?fwQ-7x7vIxIK2|NQ3~c82%OBh7rhWL9 zJqy@;9boy>*41PD%RL>*`eKW|SgcjfNc1RY8Oz%m)h*+pXx=gtwbX%J1G-3p44Dyx zuzB=-vF>g4{_RB?cf&Trf)J5OV{Af&JcW>R(N!Q-z~DQB3k%0b9mLrF7qqkG@;1jr zN-El0ktva7_Ma`5HR=-Dqtd$;60W8s2>*6U*9kSK@G(r^ZNv_6z4z9)IN zn75w)EIDfO36J!lYqgR*C0U~k9XOX!9loMx~6 zM?dSxPt}Rewk6c@&(n!8O0f4ze0|Cgx}o!McnK=ExbmXbd!JwKEVK*l$fi`0O;=N& z4ZVIs!6|O&x#SA0Zxb33xmw)+E*7_a<@v^t?JU5eFZk^FMgK)GRW&+c^Fqq%h^Jsp zw}n&zk5hn&@Q2l1Lkh-yHa~d*38Z9O3&!sTS7W!7eUx}DZ{d|YKc#B9kFO3`(t_ly-}1DiQpjgs2N&8KQ1Uc zy!*t+sdVlu62=BSqLYMY=9lY`%!U_%xeaq}0V3OCIu_KVBP4QN!lL*XRc&t~5%S)? zA{Ny`j<6u7BukECr~;jg?E@*@Ev zAfJkaF*0;`W*l9f$xsnN=D004@^5|>ylbbOA4JJ8v=MY2`S~y=NV;`YbyD$to{>TJ z0<*30Ek+yyrND_C^ZU5WtLIKo|;DMCe{G^bG>R8hXl&vkix8 z@dqi(@+3DSY*HK8RvgZRYqe;rewU_rt-$sw0aaVIq~?b;nNo<3o?TM|I=xKDzD{#B zal1~(XhgcaI$&8j?zd4D)BG*5y?rBwhL~sRVdNU00!VuV5>;Mr8Sez z7O)-Els$sdA>}i!^#nc8xH2N8^#tJ2xwGS=^4B4>o}urIYS=lzl;0^#Se@S56s+_{)4B7_8_X9vJlx=RO%)FV8-MJt@ z^V5F;TA_WxWqr{cl8A(*JE_YnRE$^UOve~R1w54agpjodZo_vFO|Wz~8{(M_@sCtn zS_d)5{g{!+rGdwalh?~{38?+IfI%K1Is<}Ec-FNiEp^Zqr#@!#8;H1RGWkYlK7h@Z zs4ie>EubT&ZOFIkZ(>J?=*>hkDcP3RC);*qnx)P`S0S~@+Vv|K2h@zfNg_NQl{&Rd zY8v2aQx|m?m-MGwbGEM$yfH5r%!SW`jNX!waIsct#|z-ixVI59 z@joJ4g5yta1jnD;2#!Cw5gdPVBRKx#MsWVhjR4XnIDf5uc`Q5z?vMEsoR2~5ufm_K z3qVcdubMx|oPUr3mCU~m{XypXgUs~@84&jT-G=KAGS?quu0P0Je~`KUAange1}5Ym zPiJ9b`i%?}ej@{g-^f7WH!@K8jSLiiBLjus$UxyYGEn%93>5w#Gyg$m{)5c?2buW~ zGV>o~=0C{He~^K6f!`J~|3PN{gUs>=ndJ{M%P-`A%}V);H~1&F095?y>@izF-$L&( z+k%DZ*LD4qc=2E58L)70{o7`@sS6f+APkSAGprUy8O1w74C-f`?Oe?k=vu^Db$M-1 z)H4>Yp2o#cSnHV{Bu28x#-y>m(~;=NJZDY~f0gjXw*J9>yRYZ!?YZvhW`g9<&hfB7 z+E16tAwuptAoQ}e_H%n8p=r*@Yj96>` za`u?lH@>7cxXA@82gj}!H&;hn+d2*_%@h&dl^NE3i>nXy-C+ zjpl;jkB$4W;{6CWhNGBsSm%96Hmu`dCQ+Jf#ZHzYk z+&d=Q+#{NtG|@IsMc$L}qc6U1P|}P_(7F#8Mx11TMc0`^L(uW%g##05%7%Nn&Bd1idHZjHW@?+oq3O{MAsKmpdA0m|- z!te%X(owy5A(Z7wRjn9lfD(^_{y^h5ZX+69WEOohyvlMSbPdEkt1lrnkd)b%z9c$? z^06n?bj3mvcw|`m=Q~D{uAXq9fb35x^!!F z42ycMVLWt`MXt^IdSarlz}J;=(_JY!$NG`8Hyg(r_^A@}4IHet&uu?iOWmk1!xZIc zYK5Y;#ChOd(k6V<~=s0u8WazF1)kQ-hs*Q)nMI&4M6PL?Ru~3XEKM~S^ zV@Cz{prdD+;~($>gq~?)^&->zzg|QD8%(-T!=kt3(=r{G9#b%^c#va<0nm%q&@MY- zoGewFZ-8?t6jt6HA!_bc`;ggwSTW)XGN9TxuJNNf{$#?B2Ouq5b9{?TWG8+mKEY$7$PQO^KWqRgtB1QP!^v;0p+{ACBGMZ5ia#{U!qWz`1aj%^p#63dV~r%F$&0#^4Eka&E?ts!{d0L!X)p6rh_q(J`7s z8tgHWg^$(?T{N6Z!ZIe}f-)%n7k6(RR#n%vi-QQLv`BYL$EMkUN(+KWmz3;HgLIb? zk^<5tA>G|l(y;072I+3jLgo3M=Y7BPUDr9+`^WkH{(wFATyu>%=G<$>xYro>)DgyS z;CpG0fgh3+5OAU28XH~Hj!y>)Ep1@1rqlH+R3FYzTAYx1wi+A|*akiA3r@v+; z!`S^wWmiT+g$VX*F^?bABG|QLv`3gbeChDm=Yhj(SIQN81m3kuZLoR#|!2~sK-l_+L9&L4S z=7EvV2@zg2Xao;vAt~Rlr2)Z%IZP~{_#p9C10|Zx;q2AJjN%nJfC5)YBlo9zUP9iD z%soZLvdmzJG2-!%VD8|QXNX~zSnowJxkn160sXrDfrDa1cP&vvc;vfS>WJ>hR2vL0 zE_k_;Ff~@v3?vC%KMy*k4)7MD<)o2R`qrb7-rx`c-j5a3Q5LDvDV1Ej$@tOU+>b<3 z@og0yi!b)CyYmV0jQ6mKt<9s(ztBcr5RenlCMb7d<{`2tD5v=u;>Jm5Bn&^(QSNw( z8Y-KU?df)4P%JVW~u$XeSMR_Ppvwog2NS4P$?2{UB zU6el|8wZQW!Bv9)LnKZWd3j3Y(!Q&Pk&TZUW467=tq4*657{^g+;Y%?V#+9LqJ~A( zZvq@cqd&DxN>JQl($!uqY;|%y6lvkgG9KWCCq$mwNUBu0M2yovn>Ki{M4{PfOY^bo z3X@`rOqZ z6%n0|$_w7!?8#4RD5-3sA5*id8+}E2P1fUK90?`_FDu+t5$3@;)^z5~@iF|q`~`g0 z7s;6D;?k>Lq3fDmud9(;9zCd_Hpg5UYI=%_raR==vpyZ-T{t*UHTRBxl;ex}{UW3$ zbLCZIs(5vLZwksyMceH|3M_PWempOkRdt^(yhikbgx=MW(J6#4;vbuHdj&xzx=(!k zEME`vZ8VLUfPKrw?<>DhKZLGyav?C+p^y*OM9%L=lvt(dD(@u5l(9b&5hYYS3a*Z| z8kENC6VH~ev-~gBp~>rDl_+Ymq0E9zpWZ*BfUUqq|6-D)c09DVRk@$$&6~N^bj*%KsEe+jcEn(ECk}@ zhv$pTW)vv>VY=s&ew}A71CcjH)3)M|z4<`fq*B}K2kfHuo`n}qzUPdc68D@31UDM? z`*pQQ?ds=)g1;KXVtU!w+z&MgqpOMv3T9jVdbKw9Wb-NNdz<@8$gaF+b+CST^?^rl z1O4!nW@!AW2rD+_WF+wuWZo3P=&y&zcljhFM)tMa)%f{~+dVoIcDlqR5|zm_){VyGM<+0M=nl+HB`Cz7jh$z)9t^q zwe({t3)KK ze*AZH57vJ`+6;C6hM1Z)nDUna$^0dQOX z?wkgoHFq}0?*f2T#BpbHaNOA(pgWrbbZ2vb?yMQmoizixvt~ed)(q%QGU(2l0o_Rk z-AU%WlgxQ1ne$FE=bdEEJIS1Pk~!}rbKXhjypzm%C;9gomOyiU9k6k0?fpKH;x=(7 znd?sSuR|w(mARA5btjqYPVz6Z%iA))2_J3~cRK$Hm-uz*PV%4l0-(&D&VS+yfSfzY zf8q;(oI9O=#}@#Se+L!ZChmIU_sinjoI9QWSm!{_oz8!(b0FtV=Rejt2iqU(97x>h z{Kq;6a_)5Iy_5XMItMP@N&aJ<137n+d4K8rPowjnf*XQOSVYi;r`&h@tq_>a`j#Ro8M{8#wQum2yZpPLQfkoZlP$_>PR{NcC&!X17o^>5vvZDI8U@wncyBP${I#fmHjT%Gs+dRzD+j~~n$B!k z#VQSh;)IPa?8oO>4o@`259zJcjJ3sMc{pAPuQNkJ5H4WRh+w9HMKl*7+ zHsf4scKRE4;J+if9RznxAk-HeZqSm>BO;Aatx?yen#>F4e$&D$#0Vs)Pu`={N|LM9 z9&PnsJ#{cMk+#wLDUl*W6zwhCDwOc^0&G_bkH5A*7+#=Z?e(G$=|YrAk<7S_Q1L}C zyWP`^u9Go7-=**!!yX5N2`zNaualZ$OqFv9KUFQE7CQ=^5)zFbaFg?{Bq~kduS@X@ zp)cBA{?y{e?0BCR{DO?r_eosMY0VW@<%)f~Zj4yPs-)9HG_xbW9#^zNuVE*CAHP-XX`<{kin3j{?p6 zU&8v;eBd{ULoINh9u5WTAoIr znCT9CSy^i+K&yrmY`#0Z3SpceDArQGwfrO5LR`V~!LQY=joQf^)b zaMHs-fHJ1LBq7D{w|wq_SfQwYNR4*hkEkPJ+Xez&T5<~gWp<|_e-{InFa zK>H^>Wo{{GRI8ebyHeWPyc+|;Lf`g%n-^B~A=~T3NLJob*smvfee2Aa-wU`*N$a9P zF}K*<3!Pt|nmW4YN!O3iq-*FI(Jok}BT59mP7UPT+fiuUy&eJQ^)Y}R4FF(;t)aX zs3Prtzc2|pdEsVdJ9W=%bm$XY}AtoVB{DycnrlU(Xp=b}LUp+-zQ>t2xost3OXjoIR&l+-xD7jn_{V zKgY*dWvH<}Y<7;}Yh|gR_+A?MYEpXJxl%5RUc1bnC=RWlR*h%<@O*`AcbdWF#0UHR zY#!NG&5^!qh4E||PtC=UR(9{V5aMH_lQj)y%XbXxTS+-L`Lamb(PU&b$BVu^R|Mw= zjlHb+g`w7B{EDs@pS5A|q(>&)NBVAp0-XpKt_(@Zy>&ueyKdRn@jG4G*{sNmUE2OP zZ|RMEQ9W(>5EdGuH$k~ZlRhTa+DQw6&s@e{!0YyEIf(djq|WX2drU3kht&_?+#5B& za!QOrE}7c09~pgB;$CkfJ9^07GOMcYmurzU>U)5`dI5HeN^bWuw-F=FACB4dn9qrd zF>QGfnZ?`kW;n}K6t=M_v+cdWW<)pO;Ww_xox&dx6fJ8&6&V2hQ}>rKpyGZro*W(K zVzFv8D1>cQ`X@DuO;okH5(Ck( zB%%;Ex(-FVBDY@th9Y-+;7IE+oNBOfg~yLgSG)U?ap=XeFwXk#(rc>EpZv={|i zMdL$DF!9LFZK_?x<9KOR;=Grtw0UpGcE>Ub?ZW(a{Y_2w6iLvb!!jan*yD$}oIX;?}p~`D92h`+sP(e)g{WfC3daAB-Pd-HFMN(wv z7@+-pa$9_7Ybt(n&0i0*aV#fYs{a4@?}6PNHI;jOKR0#`A}lQhB(}*34d! zviESfDTPZ66$VytIks#*N0N8_{9K0Y9j3-@&Y2Hd$o%&LSX84gA=>#(_W###s2FzF!sKaxMau z7AC7IgbNe#^*CsRCs|7clyIHZI~g_Wih-!H)^QpKx<41$lo}eX3{BXK2^hA1fAPvq zcAwsOpWPk8b+#mI^h)S;{H3JeTWxnav-3F6=GC_&hv^gb$dHpQ4kLovMD(Wtb?dRt z3HtVGoK-G0s@jDxdQtw~3eIP|qsHfTG0xH#Xdj-^bPo-cqAY8}MphKAf0Ui^wRDZF zj8~GW#6c0jujB0b=o@Qan>$f|&>bAkVs1mN ztE@17fd<*P`1V+v6|Md8vX+n{nvsN!9KW0bXWC>TU*qzvk^JfrOvlku*4FwTZ2PqGrZ_9{9c8qFGOSl2vR&R~}f zk3FtHLeaMh?WeB!Ctq}HX90|?b6)UiENGuCFHkP9+cJO06WPtW0xY^|HJ|)0iVVXV z7+Vf689t%(e9KqES&poXdy2HV1)^V?{dKJhQ9p$2ncQs_k}=*rxJy4bW$QkBkD;4B z#L^wpisd5=dBVaW#MJcf8-}y@4|~`=Hbm7`v^KJbpM+ybvwL{wK1E`SD_|Yh@b8#; zBXb-eN|?eQ>Jy!e-+=q%LuPvPaYyI1tU~u$k+e8Fr`OkL_NY=`3wj@AR^X)Z$3|L| z1B|ubqAB#(4Uvauf=1GT#g!e_Qq7uFkW`}8HHueg^a{kK0Wg9LqCP{3%^Dw&VUC0t ztM%V5-*6yKgy^18Dq};WqUWG8!q{Xx-2u*EwrloOOKkNxOS*{~uU$m4>+bim@177Y7y-eU#Cl(ZJOy6Pr_DkoAHT(C_AOoCo8j9m)3Fk^%1Xg zvynu?U#~CPHHVPbkyh z@-+yQ?v?(ufEY!eLn3`*E_nl?`-^A_AtgNBq7i6H@&?UAi<@X5;Jcz&grDsX{sgj& zRsyA9ELFvhmB+ZiP>2ME0yi)ea)F^xdyfWs39XP{?h`Llk0W&kWq-_hOE26DAxt)S zLyT?XMoiHKJg8saJ@L9~ml1*ORO!CK=(mzlrEVuO=B16k@7Rn>jF34WjY-gUKY^TV zt0~clSocgfl$^{2yZ(ucSNxXpDX?okeg7a*|Ap#%)b-y>C0Ecu3WqfLNQ4-;Y zc4Zg>p<%tBL+o@1IfDy<$9^~b9mkSBM$^FnrHIfHr3=Awh9m7V4(zk+!VCMXpUMX^ zFC(FFARunl3;JegmSdDHg2Dnwhjo1B>E4y`XH1l$6$u`Do!k3afoe4d5N66^^uB*z zhJ(PWT+V2VRz!%J?uu?){pL?!Bg2;Dk|?0zE?%frz9M55EF#y?(=)Qq&&|9=28Wt9K`Bmi}I^9v3AKSfXf3gY;KUHp%Z7Jocq{@M8dOU#Rl6CjuPjXC{= zv~Y3V9whsB0dCPUqm4Pzb9D-OoR4RDg&cGO=u*k7vrD-QMx2>s7!0s>fP|Fus*0O{;M`ozG_ zz}!Y#&lUnP_y-~fJWIC#?42h6BM!#P!SydV*tj`y8;@`~`av%q0xLr< zL#es@mc!ohgOkD}5io?#a`5=R^$zQZ`mCGN>2>N6-cOb!H!o(ck|sNFFOf{W%lYzr zNNWoQ()9=TU7SZQb>r^kJM%TZ?quy;xDz7IcDn; z>IEh*l30?ik9Ow=NuM3*VF!?Xk1!51=_gw7qinNtF!)%F2$jYaIi0GGV2)H3ERF5T z_^!?N;=N`_jf0D(Bs+5cXXyjM!v5VYXEzu8pZ@qBVoedfTo0SyaX4=njqnU<9^}__ z6?=Xl95YQ8Ta0f_~D{%PlLs0 zCKaT$^lsZzimmh)pmM{b>C%?8dFI9jXtIQzNd+U(Li?9u&Hh&6#>dCy^VQ?#PE20~ zgb#}bEh%dAFErazLUTXVRG(1sfi5CkdngV}BSxvPOMixX%0NSTF1Xf``$q)_>)+=a zwb_^klpljfT;i;Mwui^@;Jr1nw(DOzgIK`E*HnAoN|A<@nSgdmkckOsu>{)z+C*wk!0&L%SeV- z{#vKJnDAJ@G>SW^PR^10{wSg8_@i8&T=W_|&2h~Kg&)V~&Lz#IaqXm>(!!BW=F{d) zw-4wyJC5U1MDp<~Q7?8IckH^?Ln{tfUv9CBe->kUxeuDa)*`djQFT&rTRC ziF|`~%HC4Vesji?ubykWUw-X@VDRH4fZJ3XC!o9D3AfogiD{xnOjX&YYwwZ(2+A*a zPBjLC@~`&hlQ4u6KI^ZkcvHOj`b^&5*oQn2ckMgNK)%n~>qU}?{sLuFPd5?b>XBHZ znI}k2`eQ0v9~KD6IAL(<4oHOviSVUJjUXX&?uTUXNN(Z30?!-X-~jaaEC2_`FY*n7 zO4)rG3n=?^n{GeG7(8r_pBi>3SlAs`W574D)nrAmMd$d3e1r6q1#R|aq9+kKK)nHQ zZftr$YX^at_633lbbvhduT0Dc@Zz*ht^#yXJW>Iv2zw;W_tCiLz+{_fYvwKO5TR(#_#~tD5U^3 ziWNYO5@Tf4iZM;M*I;jSs=O~F15lFOa*@EpTE<4jPuQX(x69e{mSXUM@ciFh2#|@O z-e0gZRs5?tKxeW7P@~*(z+gEm_gzX!fCua3%YHYgLvx-$t!%oT8ENxL z4M#aG!Qp`9&qHa&EOdXjx4X^LBitBp0VJt4ZUVUFPjaP}-m!1Kfvap4Q+Q-F7IMZU zL<)zfP036Kt6nN$SpXkyO4hf~KdEmCby-{97i`4Z3&nT ze5_4=^yNcc2h~Y+D`~l*ouhkU{Z}#tzpMQEEO=e*oQ)H^E#??Tc=?werwkk{qHcmt zoZ3A@9!XA|-+dfrQXM(A2ZL8S;7*8pR;f`BWF!s_E5Dw<3^{8GYC|NLb@W+X!E|Ps zcGG!A`+cWD$5zwk{WpD{be@8*NcCU(++P{F2u6Hf+gKE;Crc@Hwjb4}V0JDoA7~>o zDNewyb9)kCe6cbi_1fON(hZdfiIgbV1?y)hhO4Wy){m5CG+!(ZMmco&uyG%Udm=Zo z=>oDybfeqqKGV_!U>r_I)#DO`gSPh5#al zcWw<|x@XyF4tNy5{6NFzaBl{_zLv+`QDqI7N2Wi3*}d`Vc`sQc4xu)f)+D08Ss|57 zmb8<8*=dCL#!2=fv^ZKd_De}K&0d4Gkwc`)4>;RG)NpuY6n~&8 zY-oto)ma|E`ylD~^dd9d1n+0#7tN0{DP7N0W-svF%kuBgWSTqAR@FHkF2TGlQ3^1I zngd*@&8=YAmrmi@^8F)YB~+EVuueIM9)tS|lYWrm8P*%7579aVA33|o8Pr;1GgXn; zY3jM25Vyq#M`O+srmF!_;~Z#2K-ni}Pyw`cc679BE~;1IKq$Q|5K6x{Vs7M*Uel*Y zdYsDiK{Y$f0260n(ngCgABPh`T#55TbQ(d+ms6xng}da)YciH5H`#tvy;uk#gCSDk zx+?wtiTDeU{{5FA6Bg36*P%<`}eI8(fVB?^M@%~Q6KR&ZJ-46_>yfKBcZ+!u7 zedjnZ+PV+mj|PbXm}ePUsw@ID``7@PvgOOAq$Oj|*0b5b7>L1FPgEVHCTbk-WW{)D7^Q7$>d+JSQ&X`*Ofc^O{n)h#mG@>A*Tq z=w(;H<-0IE%(FUX?a20>1ZSzx*%}MV8$9~`@XAV&r4ttS{B}7X2j$SD;0x-|By`J) zb~&_zOG@Fi>s9~DcYXq5Zv1Cjl)~$kYYVs}`223zXTmC^wQ_SAJI&U)P@I!_pPvC>|u3&G9yTYrHg zua=2E`fXlaK2wi|97U<+#R?#)`ZZ#(7R!-tiQ{B9TY=p-pC|Lz-cFfKZ&?))y7&02 zFJeEfZ(AVtG$cf)#SnA#z|k7fwo%1)$PdcM#zNo*Go1Z82L)S})=Bl$F+`pubfhrL z1$U^umx;U&Fg@uCuj)Mv3+Ept%7N1JoOFbhXndr3UqMV2ZKN-bS_4|}gbnOwEkzM? zeuty=W@|w|rE%_I9XD|U7BlVQ(aU?$3wRCar--kAu#U@RIQ?MF3*DC{^V~zxi`72Q zc93-HVYN;Ich{{%0i&6B-cP%lC;ND!bBO44IaK}V4Dp0(GG>lchb~OpxE~O<6r~<~ z`VF^-wanNp>&QRkPe~`xwT1wvO?wD?Ik>Ol9$jab+cw zSBk|47)7{BiJHdNMBJASlqXav^-L^T$kmwP7&Z}C?AY=;lni8R3@kZ7)*wG$${RY? zi$$5-22mNjXg{wHYRR5sOl$#+#SO$;rLhEyebvw&NyfAyZgr_3!M<3Ntw?2PGfSyI z(Qzu`N-<|1s;}IF=gz=xUM5?Y%cXxXwvzX!XzSvpkG3ZZQQOI`R^DUGwIRxCx|9sI zOfBz#i}`F=5jeB}XUlWtXlJS{wzdbQO`6twekd>72!Y8CeB6=hTJZqpzsJkflccMk zXe6%`J#E6MU!W5GV_0RNV^l_w4!3ATIUp0N@?@ZTa#w{A>##`FKL5T;*lS^u+F z)h|b_e>VRA5@F)x{o}Vo&d$RHcv*4s0j#C}08*^&wSPkx|L$D%%Y*Dcq6Qb>-1Hmh z;$Z)MKr}Bo7yBQ`=`T#@?@)^N9l&Go5APxXX}a~m`;REa$p>)D{>FCzc3Z&B3Gj2` zVgvYP|F`&#w!W!>?mtkTKhbdi5q-GWfm4NkBVT+#cm3Aq))(s^zt=xH>Gn7KX9oeW z)88Gz{zupeK<)k&b_&)6+^>=f)>h%_S9+z%ACL#p`~sc|_5T1*SqthY&eamJMS>no zC>uhxOkrj5T?|$$mi0q7EJ)Wb)}ITYg%U;I;-kpi98Y&X99-|7&U(9WjF7;SoggL3 z(*NixxN$jcOJcccB=zN+w0`RBs&Vz5p5^`};>Sb<=n7M z^G*8EybXZ_aK^M`)UhyFSa_5LtA=>*UYPXL-QoIW5V^=r8~S}tdHf(2}N?VmF>6n8Z|qtt=6^R;?@vpR!!Uj3|Tg}@A-B-6Um zM|0jx+v0`RJK=fO=OhsI<`^O9^lMRT)ERl^P=drSyWT}_^}w&!AqnY`E1dN&yB>Sz zAQNGQ>f*DU^dyK0W2klMoh65=3IYD1$ISXusApM!)i)~Wjv0ltqy$)BNKo5^--S=h zPmyumvLC9Fc|4$-YW;SNkAyas7+fYfrOJZV^@421JS1>SCRnhE5U}ha$`WbTAXjr6 zv~=mT94?8?x-50njc1v#p))J7xaM;Rt?^@Pe0QvL&|rT0*}XCWZthjytdHB`pF)0+ z^xE8HxQ#<#f)2Ui7fyo@LLLt4dx^vP*h5MnK`D9V3rD`b?(hY*H;21hZI(sb`|ET% zX`TLT1=otTxA+{a_0&*?H|SH=O&prXE?>n?a>FbfuiN$5#FqVOw>E&NUG2^*5FwXR zBNcO#2}uaWB6jQvUJE##s5O5GGq4(BLWtG_*wX;NAHA4(V0W-0_k+VjoYfGC4c~VV zRfl~JF-VN3+56M=*G0HQ3W?e}jFWRe6=biXgg zX@!(CbmfeMqr)Ka73DGW%YBfjMMPQF_U50fBu_yGwPu)mzS)p zkUhELqFMOcsn6T$azw#^wfq&%`s{EKQN2mu?31s3e>|NLuLj-}Eg>?JHZxg)ZO3SJ zi;Xn%u-Hpk*CwpPPmhANPUf{PW^7Pz+{s~M=E#GI-(d4lKYt8@$hdskWs&Ul=B;7!1HsRK(j0Q zQQGjRHRx@y+L_P&Ia(-;N%VAOl z!@o-XB)nrS%U50dwQWz^Jg%4Rmx)ikO-m(13CjZ21{2Z^Xlun&Px=>@*YoLWZT(d~ z!%vm<|xUvk#msorxf6^3dpo-vqIUX8^i znbf6QKOmtKO4epf7`#wt#VQbs($NRS55*d6PfR|4{78TY8=`Yz^=;lMgc}RlIRtye zD&Gfp2>lHm%5^#63u`lH(!#A&kroq?com;D3wyzqBcGfuKO5B5f^OVn(-H}N>nT1j z;}R|Xk0$zQCY@Kint3%$`Vrryz}@y70p4}jJJ>}wcnSs~P`Sstsc3sAj9#7ujlO+w zTi!qK8DmC>r5K2INHihEh)YbLAvt&YCCQ^3y21nQ#&D#+3-OQBQ|GbL0W zX>nQvZoD6s6IN8&mK8e|FL*Nl>XoVSM+xt&x2=oFHkzXO{CV=F!^$l)-AeOWYS`AG zS1k&jhMu8alzV!rxXvoAv2ve5+yy3SRc-#+v`C6HCVCI(0UFVLz^I4bB5{G)pOk)6 zjs9T_6{UeGn(hXIifOqgv*a-NhAu|^IAvR>48cKMeeD`K-`M#NU+6ooh5QoX^SfEf zyQsCHIKNKxWbXleHT(hc`vkO-6GqP9h{O&Mni?enKv^Kj?N_U)=3^*4_qz!Loa3`U z^^9AS%?!1qi#sT0#^U$0hj1!k6Dez8ImbcctCX;v8z%$^wq9-t@)m|K5pYHUM=?FQ zqsDCD`2pHBYX@gy&U8RpWpYF+>Hy6=O}v}CcvDsg;^UTL>XC3At;?9i zYu>6d*)v7vAMQzInqxXF@nTn%?&LV_7$jm1cH4&tgK~fWFpZ#@ zdZ(=f)cr?gCvaJlaoKgq!WbxTQ;&nSzmLq$zP!3Zozu=Z3|JkSy#kM&Z=PQ~-YY(` zziDZl(K@oHoI5+RPl;B^{EnYGYW!K6Co&J*l=V{uJF0@Xb3W3NYa zMM^EU3+IdKuv{Htntd|!XDQRd4l)a7m2bp1VMj^$eK z0aL&8d)t}_0kuHUEIiz<^Lyq$xWTEcbF#l55LcD6uhqR_PxN!<=2r4$Y)Xr zg8*Zx3$9!@CMARrQ-Mjr4!Fh;Nxzs0FDw;FzmTabsRKZcklV|xn^njeBwaQ^yU~)d z2A$iPx~i#$Ie89sJsg>{D#FI9A8K3WMf{J=NVwA8yj{$k-}@=wJSk+X>b4i3>Okid~tF>~)d8AgeJ7XLXWA%VOXCq-M1 zy#De&rPlhq(A%Hy%SPOfz|XI2KJ(sx@cA`HEI({^3;OX5#+tR`MS}@7L2*&pN6ADm z*pR<5rH9~>BRTgH?{!`K7x*_Z9C{oI;xf=qzj72wMrSzsXq-YYLXnO^dZ3{USVRpC_M>r5WODLv@@=gwEC}c2b(QjKZMvy?vNWqS zfUVP(W>qd3*mb${hVYZp^(;!_L#aI($zSg?um^&na1l6FkBhS}snQv5{BEhym9Mb| zBiu!SNu1k}Hr^lVByh0K;_E03kh4EjJCM-^21S)RZmJe5Q>4fM_*O*qpN8zq`2BfJ z;sbrr2gdeV0k)U7C~OQSupI=38nC2%WJ4qRYtkfW;e>qzc6h*~X*sqhGx{LJ|EnWp zBU(az2t1ez3}*C1M@lodGeGq%_2us#;?%G-VDkM#>5kI_8aGVrfVACy{GoL35I>ON z{s=8r0uN5c$l3FCU%&&yk~EkgLW3$Qmf zqVzFI4kQ)66YHx2qo&97aU#Ea+y*bfC*`*0sqRah>q|1@MoRYo77_b*;N$|m-KjsF;3A**O0>b>r*||Zta3SZv9{cng zezMm!viZ9!8h|?ey+{6M)QS6Fn2j~Z^KXOxzH76?;HQkXsWI<=&i{=%{pIeIMXA=K z?zG)K{c)_wtP$kflNUMIqmVc5VtAF*g?{5!QdGcIomVxov3!w4dVMt~GIsCUS~tmV zwZbpTmn6T}`7kQ!=6ZK@R_oeZu)Ho92>ClQJGx0fdo11ba0>C}>cBo~Z+?}G%xcE@-jd9MY0kZcE!sXmq$N%%U z_#n7bB3k#$vL?seF~JR(rESCD{-BUSE=E9m{1{Yrcawss3rsX)IAX#G1kRlz?{>Da z0*6Wwv+iDXVKhi4Jl54Z$hJA#A8aN&7EE&uv7J>&ykQma*sTiODQZl50Dw;5iRlW5 z9x_(#>$BbUu4v@kG+L{C(`0JCxDTO&5|_e9i8(%!BTU#~Ko}Zo7o1%ahX-Ng!|`HN zon%7b6k7u^kVhjp3<4*ROzQhFi!B@y47ZOk~hC=U1Lai0`Fl1ZV`C!y0ri zmb+$I`W}-xOHX*oIp^gj2eX_qRXSU48lSo3Nmq@~ENe{eBx8D-wR&NXp`pd32QB*U zxsE-)zG%sRKR9zy8L91?gm6mn%v~FKi1o5|g6i6l_*x`s?|M76n!ERBr)u0=>^#1n zqgJis9W%GXjH1KX{^gjXR9B%Y*-K4vVL@oOwJcBbTK~jB^x}bLltvNr$|vK^^44_Q zBQ7`R;sV}d+Rc9Pq$jPl>`8~%_M@cFw(f2AE+QwsofHbEQ}(B1WwO)1KS#D>EHCmA zYY<1O5;2l@{e6D5kf6CYT@Dr1c%=_Gk+c zZL22hqd?RT6depMn)7l}sdFw&kt+&@38qI%icxVl*g4E5lDvKv)4?W61XR9XKXOi6 zkNfb0bkw$vtg9|{)@32s+u+2!K!SE_R0JE9Pj$7q5{cQlaD?$Br(pPkjGd=|CS7{5 z#@7VA{UZd{7&5jMtpAhDxfT{08a8LH-(t_{qfwE4!XC`=NT{Rg`dzEpqRBY<0~1(y zt)X6D)rp3W?@vL}T4M2fr0|JdF zJ79ThpYY+yLM3(&rDoq%)t~yJ>}A8iUGJJRQ;4HsX=c9gvkeaFQ3*y zmVC|CiG#4;CpbgTjw^+x3b2tMu^SJ%-jmb1io^>1J zR;imkVb4<|hj5{Y&VSD7hL*{<)V;>>Qhepb)Q(n9Uz^O#*SWa^vdmulM} z?v9vXx;fJ_`N~PdNci?bR6TzK%wnbwnUI)b4WlRQj6syKUhjZidlxwbaFFTYAfbw+ zuL%{;O7P_jYX0Ef(?0ldq;>GqaRau+R%FK0aqkR{@sN`4V$KZT^)Q=-Dw#wjCWH_! z9|O!mz!o+Dq#8T{V$uB6BA+Xk03ezHX36i`e47iz2}pth4Gi!1a*%+SL~_DB2~fLo zT|0FuI-jb^ro&=5UjCkJElOmn+jUpTQn7ih}xVp&g3T4L7y1MPK2CRv(F53brU#(1t^7jb(wFuZT zzOk7QOWQ9^(jjOtO~#Yg@}L+su*yp(n5s#Sska9v+k`&UZLPsTSR}+nD3u_Ixo7S) z7Gg;g39;;nh3Eh$;RzANt_Q_KR)A1l%o0wJ3Jn!VBbM)&K2=a7HYPIsOrh5hIMqn) z*2Cum#LM~SUU%#g7h?3A6K!Sq^z(C^M{EFl)(K^|@B8+vyaxx$V$l~UY-K~ExH==4 z78)M9i}ks1%}5Ti@ac#K(e_UpJn*#Nco0ZyB+RD44dS}bXn4>&_{L$CR)>J=zuzB3 zeLt(_rAET6H4S}USx_%Kb~!;4t?^=I6q^D%D`BVTXPuC=YD;EEb$ML(Sxc(rifsp> z^HVkTpzzPhGn}^8E8}-l@`?QfF5kNQ=jII`KQ%w7;ApFf;%hQ&$k28Olgo+48ptz7 z0u#f+6lcWNk1L#7&nC2A&?s`c=rU6^)4xu*!5Xm8v6HFu9A`g3f=EQb!Kn`1d)6ky zo|>8+-Omnw%?|%nf6-Nv7S2ZTAsj;7Jvf(+mvFoj8Mw9RPy&pkH0)V}{k$h|aF5i194CYleQ`LrA^Vzk!BcwA-D#&U z&(h%f2;I$b&rw7@SXM)BMPCZ z9}lzP?t5*;zBvSN&evqLgJVRr%C?VqIGl>B6;BP9<`x+r5$0ZiPzYTXpg5eW64EO6 zYM-xyHf|QZS`U=kS8+h6b#F5(EY#ca(b49OMQhb45Sr|$tR6|AUt1`XLC_HSTRwM^ zxWhMvK#8dBD%+6-Plm&udwelJJ-{=J#Ls-QmQjL@XkHa61KOj+$XDq&802tc%!;tu zlrULmCkjF#zhcp9TdJ`k;n*3lRg_+5SE2ew1qn&?%eG(VPX|87Q|VI9*T&iTomx$) zS&UcPhzWhk{6+#V*F;SgC731ZAO`}LMpmY2J#Hp zqd=IaRCESFoN0HHz0%Dk+_)xP*-4lgf1au@b_hP6|CJ%^$6iALS zM$A{0nro7ag=9ajG`#;D)TT+fU|a@FwXAxTz)kP4LUD#4X?C?z_NVj29!Yp1Kpw7~4-fFUov(qYP=Xe#NWg*f8-eIB zMuY9<*O;ZSbOPg5idT!fb2}i~SD;evM1a;I(ZQqwEY`sSj_7cUzq{2+i*}SDR;rgM z_PNZ@H9xgjPl4p*7@Ny<;@Lc4hc3$1leWib*g3HM5yB6=Auen#k{#?ee8(w5Wf`kx z-Qj2L12H_}@R@$t^I7bjGOq}ztCgd_w!c3EaNwIsk6FsUsqBnfUo&}}m8yMl0Cp8z zKI|G8EkW7&T9C@*`I6DiH8MZZ7jl)NZR&(zb~Tz2T2QxqCH`#ak;_g_aKP2Iws|L? z@94&+iC@L=_;@Aj;P^Nktbbfu*~bw%L9oIhy=3pV4Xw#p~d3lhP%s@VhY`{gZ?1)}w`yWH)i?-va=*e|)rD5YIEMS+xv&16$dNIPzr^m07UDjjS>gjPw?p%vSaM1ZD3++rE8~e ztZij!rET{&i>otJ?Ee*l5rp?Qxgk3Qm~H*QnppoTH~dqL>}`#;?F@Czwe>A6j7-2J z0l3Zmbeskl+W(s94rf6%1+y4PWUvqYQsJ~Vnf~^c`!cf?I}byWByz6_dM{J z`kDNl{af<4e$eFRT8-e*zH+pu-p}OkD)nQ}yQ^5V6y1|#b1zO$_6{XoH`WpatmF?B!K1R>%lXzGuKy*8?ku5l>^o7PIqT8*WZe^i*7Z3Fq@yfSf~uKSyz zmrO&AUkC_j9L=&28e7duG;C9(bM7_FJ0YAoQ~RwbT8ZM6UzQfv%~1P25_QS>_!4`} z2Y+DXWGDq;D$HBy6PV+AIKrj%)#q4>f6!`}N?Cd7q50l-!;kGMtJ&W|oNh*UD}VKw z%$~=4c+-RI$Y4*LF6g3q-9XwY*HxU*=gxc1v;zkY!IW#dp(nOW>cjQ*x*c@YO_X18 z^0M724)+Q=WCyxRV46H`pA6w$F$I>6{qNJZHn(0fiFO>0B%_-J#<289dnw)(j`e0u zGGGzXo1b|b?2tq=8M(pHx_iDu_lh2{C~mK*>#vN!sQ1*u+!}OCCDQng z-d4B+M+>PM`lk|j?;8ub*xNDC7=j{gNQv8nL<4Gl7c z4|9${)H4Y#ES)hVW^b*O8D4l=6Be%Zr24s>U@@+%D&MMJsh+bh=4PYR>Axb3Zlqz0 zXN{SZQDHUE1U(|L4ZJwDJ2d!$x);}lNJNnE>c?t^n=$U&jNbEts`-wA`KjNc^cNuJ z?VCBSsBBs{AR=3{x;nBIwWeGqt%7~IvGnlrSk6nf);CSHY2ChS3Pv7&U+QCUm#NdA zS7hLH4%Wih#l&USNm~M67zThf<9M)$d4F%$uCnl4-rO&`unh{N+% z736>Vtq;=S>=@x9@H=dv?#m&D<=g>)i$B1xVkB5!escF=S*l?D_ZHk4_`zQI@Y~K& z4RkyE@0aE{hYd(tRMTsvL9J7P#-@(_vPsl~qV64bH?NEEPnzB_Z9qD6v4t&znpPDg zShD*|L_IM3AjPKoq1`y+mOyiIU5!zy348zJUXx`n+OZ*~C*8V)v7Z|}-WW!u(F@o` zdk4=?t>@^#^yh%r|{BV4;*@!FJ3Y#NG~vg-XBxY@^CGn|7g<^15jO?S}cgF(rCjOZVma;B!T!6?aBZT9(; zXXB+|bkO>`?Q8hG2l1inFs*7fGzM{6I<`m35$xf1)_1(>ZO83BoJX)=Gq2%x8Y0Xr zIQk5lz2{ZFkAI6#VU@aF*n+Td7v|(h6jc%XDiQ1cwLM<{d+hz{i_fiDLa$4Iq`^kM zzok}PIl|eHkio-Q=At&dyNaQST6q077!03vPia17MJ(|0VI34bDje2R^Ne*@+a>0b zUR`@TA;gXFh$AALw7Rr9*|O&H0Dmz_<4a_4l25JbN@?B5eOdc}Qrd=>VMxU17#NcKJ~t%T_RUE|T-)GCBH#P5`9lJZML~8c z5`P)47pCq48tWq(!rW|6T)FP?5jA+ET=m(7&2P1ogv8p68cR0^STW(bU3(?KKs#KV ztBKWHg*=oKvhJ?xSh7B{W^lFG4Jk(;JQ92(4-@4_U{-IHU^j0u-yV0iR30JAJrPXcVdd(4s3M$_6X|A_{~ zn|I9f%;0Mmn0agT^y|Vk*mv*aU-+P&!YNg8{fXXC=qH-So=5XBf|#V^O_S=m(dXWz zYRR!BM=P}BCr6(nF4mT_J)6v^hK#ZzerN`bhLc&_$0MOEJUx!RrghP z1I1MUO4Epr5ZH&;O_a4cj3)|G1fC38PPFQ(dbu$SY|08Chc*KC0qACjRi$>VRlXyM zRS^c+&gnoPH#Wl5)@?x;)i&x81Uo1BU_)wGd~lB$8|ZOcf9E(Tq%y0sH9<0$ooE4x zA``GD%o-ri84%)zJX{1#kmA>yz@BTPJ^o*4k9i$Y0#*>r-aJ+Z`Rb{$?bq&*b`U`Z zUBg72|3gad46##^+!^%=5I?AB0RgZB;xB>79GoC_eB26oo6!87$nWuK?CZJKf66jP zWt^}7sQnd$b%s1BX$D2R_}I$;fSE6z4C#wP1d%_scHVYQPk8|Y3Ax4LFg3s{WJ8;U za}tK~WIGw8%sj0$J%%+knJx+mdgr}A&AByJdLrBmsPTSS>jwuoZ0+3d zPWQ;hpPp`HGUzH{b=xeQ9N@r@?6(v9th<{uKR`x;#aeXRWg{}>h+i)=u#DX5%Utpk zJb@3~@b%7k_W0#JF{ci-?yfm;OtJo3kGn6XiR})~Zhgt-v1TY5qp57Tw9V@-ma=RT zn}lJhKfonx>G&kj5noc%baynSWc$H`^9_~Hc96lJvY9E>DODSjW{ApV)4kS$zDskj)5^T%$#zl+W3EM%c-HltE&vlfqQN6** zJ3qK{SoQrh%<|i*(_`HES>r%H7HV2#oBzU=P0sP2GjF;4!l}Q>F{SK=b!$M=C-BK{ zZ#uSY>>eYcMfnBdf~~*NTXcvaUG>esYw+ycmkBd1{hq_S{1BPi;PJh(lJN<$tl?*f zb7xz(k-gSqDMU1GFW8^FP+NpR66ec7CY|I@TkI*Dl|eC37V30+-bb^}#QBpdPBfiu z?_bA9w_FAV&FSF|C^y|M{5|O#L6Dg(#^Jd+R|&2B(M$zdL}5Z=r`iyfBm zzBOl|8Uk|GH9*cf6ffsQW#{{E-3;^b7M2cB&C4gYVSHDxf83aQ5*pKgic65#mWz_W z{~$zJNw**ZV9%&$!MzILjuM7`ln2x*fzV0Yx2HHjj>@B$V2z4$?uPcFKu^Gfn*4Tj za&Q{E5_=M=7dr#T2aGC|@cbH3wWGff(xeIe4`TMT12PWb`)l9(V^NgC>B^zXejL`JFI6Ovf#qnuc2@ zpVGzEupA4e?bRfmo^I|^uH~HOeRK*wNi;uFJNCS`QGFmpylV~~CbkcRK)>obwcT5+ zIaLv^+*uR)G?UkRs@$Tyc=~mofBV!mwT!;lF#P3r85XVn>B+g#8o@dD?|aSjD$u;K zG*2X(;9bv9t9RayZbLCz97BSFc(siwL*A~|BhcHG3w0rH3)iZ}ii4sq$ zxLZep*~a6a6YqT=UPcKHtL?GQA6qw;~Fqdg_nX725%*m_&9U@l^lwwy#yq{gS_ zeU!7KJ4UC!mB9=Ct-b>+k32*dWTNzlD==WgvhZEl0eEqR7rm5uHYk9e_if6<&UZ0) zkqT0+!~_Jh@PNpZ_m|cmN5PEvdHG7Mq5KA=#4p1jb3>mB+*iHG)>|!J;j^whq;X`u2R$!3TjIxfub5)F&buPfu{cbhl*kX+*OAI#HAa9xOA|HMVU;jXYvrIfkt<_ zj0f7Lib16qpBbYA56HaDnv}&O&vq+TN$OQP0Rf{txJM@dQxVxZcK;_epQofOH5ehH zRE)i>`^gJs3=}aL2E;&Ayqv`YVQT4ZF^+Xeq zel-t1HzADrtOb6QPGQ8rKw*@=G-dTZ^~diyrjJ96DziEiq`HH~zZfxO88>GSNi}hC zOe>mW6fCHy#w`TDL4AQksy9fv7+watRoqZJxOupu7;Fe@4fv)#u0gv9kZ` z`T3*J^1rJO=Wp`ZKU^#ucd7iQ@MqxVK&24@aPyP`c&s9 z+<07k;HemY^%iC4#2MUpu##4_x8Ua|&$%?`O9Ph zFZ;JPCn*VyFZ1NS+}PThp4-aLfY_K|M@Lz!9y_{t5a|~Z)!rAyAxB0J=*Z#wiW@lW zVKzL?CC;ucS=S$|)rw0PWPBr7?uC1evBM2rNCp|o8pXwbuc3B4xoAL8KuCqJS?x1# z|K{MpBw}r`jcpp{kZUU>IL;>ALPF%G#xc{|2G*83L%2F)T)U0FhDo0Yv=6S_?D;Ud zP#$RRXj?O9w^WWRO0eY6vaz^!SNLJjD{B?C3eRQJ%kJ%(Lg5jG<1sj_y?KSlu|qAp zJG<^VqScog=a$$?7fN^r-0U^h174ntm2lKLlaW+8Ut#8VN>SG)eNOQqXRijJ%xZRT$;F4bkRs%t5kFU(DhE_?457_yD$ z=x)B&)%LLG85Y~mAB!_k60YVFu?-NYqYLxQuG^v5@yA$xH0M;_V`VNYutIQh@TBn` zWY~y~6eqe?YUeZlt=#01;!#{-AGsV3e9Zf8U&qrLny+haGr3e9mcVq3iG#oLov!No z;i@*+d4H2{2wqw-D!{n$&@dQr%-Qa0th7VSJKZ0{ID+g%OCWHwq+F^yv1g28AHB8z zTrAYW*`c|T-+Gv0^@E37{_HzP`!eB6l@U}Jj?ikXoQGdC@avybF;zEowu+Lj+?TAs zH*FHWhJMh1-&pCjs}5ncRI@bIm$FEju&J$mmfL#8Arh0#_5SvSBj)8qAM6~rH7kAfX{y@eG9?sE|vK9&UzwykiC>^n)c|wJhy><3{vRc-OX` zgVl7{+s?$QMmsN6oz?wOx#~-dcU76H?US1#F~|vMeHVs>SZv%o$#eFElYEflA$_ld zDvXEMLZn2$>EiEeKqrQ>oODY1wyskg&eV+oR4_#~Bm#+Okg0fw=X_06`{PC$orIo9x;JR|y`ui=XUM!ZTR_=F=$k^EDU1SBJE z7le)%3EF_p?#!damYKpzs}RhUaCB?*;T8ba)hcW+0tcC-n(k~qyL64ww(1*sDeK$& z_l|ec2qm~}uXXix2ljHtF-sq2$;&cENR+aF70?mHhFKqtz`$kE3?3Nr49J5Jca<@ z70Pm%`esLKU=@Z{iA#^D= zo%N$gZr6She&jZ=D5GXEHQv$u#1KBfDjTismj{>fCalsnS5V2GB3e)IxNZ zg{p~b;pn5vH5oX`g2@5$5hhlrcEj8dO7IUB0b5yr}5%?<6(!d?bnsYF=HEBsV zN5h8lS2DMToLHPS2CpB}?FI{9l-Udyb2`E9nbgFg9m}gS$Du7Z836&Jk`IGOps>xqq(^I4Cs$2PHMj!O;HXww@vnvY()%tY7*vs>B>& zT!?Icaz3%5-)-8Zr;T>x0q?d5b%in(pEd@8{il4uZd&lwPskBgr_K}xW-r*9!0g2~ z3!5C6y)1Ltf6E6Ghm6H8L)3h{FB#?ZqMa)&- zBMaW1366j5&lw|sau6bcFbVdCHD7)M>j!{B$`rf+%zUgHAi#s@UhJ&XN$NEumL>j5 zaby7tP6H&MIv=w5-pXY=jBMfkipT2+QX8?x( z6NI(&#%~^mLa^Um#r_1E4wV(oz*i&kH#Etrfh=13tOHxmhrrCbq57A4!$;9>#!rE{ zD{`>8sJ-W#ds?awd|yQ=k-@*q@L4igotbDtT6VPa^>x*yMNR(Gl(9FVWUD#b`nc5kb8T6RQ8UT>dB3!%OJuxCY@ zfOcOWzo=PSg{zqNo0muK_M0*(fx9vY;laJ}R}8D3?pb@o9-Ec5OtS(C8;RC#Tas>@ zl|*!X_q+`hRoP?}m829S2?!W?bwsje2;>=@MSLW*er;AXY;aLjt-YC&6~B`D0zMt4 z=GQKkl~TqfC(t1f#uvC8rC`v@oN5!dL#=4oq@c*_euJwzu%Wav>w;LOG6CM%Moi;3 z49-p7E{bevT8at^kpy^)icN1^6lG-Ft9g_1R8-MBsKMiLp{-l(v7$B9;A`^v2jh%DF<&;WA8!cqWRZxAQ~ z6rp&LE{X-$kdM-|IL$Vt-YoV3t2y#W7ZD=^=NpkOoPQkPjX97~z-rE4qAC_u^Ke*- zTpmNZ6RpLUY`urwP`rRS_)`Zc9;h!s)KNqJ-R&y{lY>-!*}!TJya{M;y3LH=0eO(A zZ1B^+(>ui(_45VPzcTv{2I3VHO2oMcU{ewT8 z`VGbM0K+_|^u(A#D`8OikTZbNr11`N0vJth?)6`8MJ=Z~gXL6Fu$;;amQxWX8P(yi zU;j|;(6<@WJRJ}xl3Zt6bs(aAhG=zYLE-DipY-K_T-~ zxG+xS_r5Kn5`M%2FtXI;L`sovN!iB2Vt@Ep?jJx{R@1^G#K-Q_u*}pECxT|eh_yrd zw6(_V;Ha8`_f??syO}+#SJ8#gscYpPaOB7_;OPf1fSgz@pNo+V?qhEUZ zT;a!PDL?)q_uZF@i4euUWdDV;vH5J^EE@9xn;EzkpALrR2#fN+cW&k>;!}h4@IA{3 z?pN2xDPmWzNaGyIzxsaL_t==cobkz0%jAzyfWZD8a+>UUP{b0Qk}B8@{RixA-fTX6 zHdVjd=}S)^HI*ja`)zQ}5f<=J6bMyL!8Q+0#U`ij;w#eI>{YW>WMn^FRK-HNe=uIV zsjK?BFiSW(ST)`L=a4p#Y~{D{%5IwzueUFe2YG=yk<2G-3M>kr5nE+jA$9LWMgPg3 zL5g*=Tek3jSV&QgNXmrSPpkxIa;Cf}H)U%)xc0=)Uv~m<`z3 zvwoa{J4;A7-~hav&=CredGu;F!No}dDCnod=ZG^XC=}VY&C3Hy9NBJIFykVuHz&a{ zG!@C?gx-dHfLbq3%G&(e!UVxM z4LG}t3$mcI2g%EXJ~ZP~5){bdmOI;ctrrTR%oL;UHATP=XS#C{6r4;gTXf4{AqYi( zKsi2+NXmqkzs#+sb-t=8Fth2ruxL$j!L7giAX+AITonw*1)EDO>uaZTV`RJk0Fbc( zNawHaSN}%1K3p>yN`EWI-(9E1(U@cN_2{4WtGMBC2h zZ{)YXLzVw&W!O=oOO*Q<+wYZu0O94I(4SwGVf&}b{84@R-$7AlL62w9;qR5<_?M<} ztbeNvxJ>_Rv_J?ji~H%&_IqX60WI)PM7&>ThW+oAVPpLxX!!3acn}_L$X`IQVGD{< z-0A`Oqk)SbCild>Y_E>){ybG&w)SFdwNTeB-aGU8JuIqzgI0`J54Nqr+jS<` z$DxM(p;JvPH+RP{ZOMGm;^L?_nM8{d*Xc?jw?oHUi9zgo&EC7sjacIgEYYE-)%)ukf|%QvJEMRb)JR1n^$$P% zmPD4W>v0-5n{5p?fxPh>O41#rnUP#fM{vrU`kJ_CjCNRE-5QB6JH+qOMs!c|ON;C$ z=bU`4E3Hc5NZ&bfE1p-DbM?p_+OqwENX*zt>Z`VoG8b96c}FcK_V|4Dal?%i-lGpA zH@j)^M;kOH1*Et!DJz*KN4LFXlPjpdLnw?^E%NNhKF^S6uva|PU6^#xd0%j^Z&F5R zJ*?op<}UW3dL#Siz30C9!dj+F0~j1C%_m#Cyc9?N7iZrj2m5kI*b(3L4C!UNL7yCg zoU}mpO^uLg^&VDIF0CYH##a=K&8cLVULNGqq}(=2E39Km8FihQYjEp?zkO`!Uiwf= ziD={6Q37KSg;LUit_;pD1-fGbd7bWFG?SDBM-Oj{aWk=%Q#QrvGFW@Etrv&weZr`s{cMP$ABSHyZm?l5Fh4=l zx441$-DCxw-P&CRw1e&_H9tbRP}0IF1g{bB@5zmDJ?y$1dL>Zy!8B|!=F(99<36R~ z^M}11HB^2)bVbjV)0|Bg7&)E#ud(ObL#)y&J{Byoxow>BtzUA)F<3=V8?llC40dP<1jWO_vZTRNG-|l7NqC(qTX@}9NVw{f!JU^R zlWea!TN%l>Sns*8KypeNw)t8WrgOvEKZmfIc-|=>>XL6qW;slB{u^u*LC|1M=#aMMtyGQ~P>;Rt-?@ z59p+%U(066RkEPEWX2sFx@IclWDzSnwJ&Bdr|;{h5Kq?*-E@Nmq2G%F53{qDjgO7G zJu;#CBP;v@Uu_(23yY4>BN4;W!8;@lH$;>xdf&f~PKYu;UU_4!15r=N94irr7HGzn z7}D#%3>PE5)Vw5z9zm}!Or2h6cMTWk+_z`bY!Yi4EV8LV=+pGmwNkV6)G3UH%Y*D@ zGxXDD8uZgq`SOqXfOXnkxn=>^)dt&ykzqgJ0EgAFu_w-8IMV-a=o!CWURsb}40N9*1;B>tUI9xuX(uBx4Xff`djwZfeTaI z$sHue6H`R%CXeSZ^Aliagn9+4{6VnO@*T93l8D6%M=GlJ(r@M7*aHV*P=RF%9`B*{ zSLGE80(UWrO*b`^Q2H7XOsK~L znstMCDdO{T^!g13p9fhr(JbFd5l3t=7@EaM6O(?X>>!JgA|_3jl)n~9uis+yIYufB zG_8z<);Gd^B9v>}O@-3FEG zoz;LpqqG(9U$wf%xY_?qH7Esm7`{CrLNY#qc-)U`#2ZdC0Um}HCx%#&cxujwt)RG2 z-K{cbMKnuPSCRfjQ8nomi z-U=}e&U#-$y@Lxa+|9RqiZ=dsR2fYsiL@26l;o8o2+*x*u?L${{0d>vUTlIpNZ{{* znvI_i61pIW>OqQIQVlneK@D_s*@K;K<>D;$hr`yQve1{d`WxP+I-C6% zk*twP><0SK9mL>SOU6`P15~<0Q1czgt%c(=-?ASa(Hl51g0fK^F${D>xj%HoRcrAr zEMT=~#Wzj-1$c_3IvXtjPqF?(xNb3dLFfeBSi9yz^(AL%OepE0ePpfeyF692P|r8D zHK4ubZkN%lGff#vPCQzjkF0(5JR`dHm7Z4e1+DnwqZ@mxN4II#Zyec5OjI1oOHLR} zWJK0Fib^Yo_KvL{RlKQ%C9D@qPHb#TO!Vzprd~i)hum%&W$u-BmWdP+wrIQ#% zNDOrm7TQt1SPuje%Iw>znX-ED)yzegx8D@3mf}^~U{)@2<0+J1YEW$}#j_LJ!a8At z_V%_eVPY^irB^LVZA!HOKVXG*sg?^!JE;vR(ThkdEN2W4+%<4GjTzBoQ^y96ZqS)p z+(Gn{h|K_-R3gov192fo$KHdgB%L2)S*FOA6jLm0h!Sav$OQg#9kH-yg46IFx|49& zm#bGWKvP@1c#%8~O0E5r6^zC22=S@Xozp=G5RWSul@o$sPeF(LFb7Z5r!W!OYR?A) zaW)h^*M8;VMHUq_y0@e9Xr=jwc+g&|RtPzG0&o(!B6Rx8YmXKM%*wYZ7slAEzx1uN-fJU>pSMTbhAK-wiF~ zsDE28hPcHy_u7aCDV4qA?|uRK@o?PrNRGye{S!oDqJL(uDYEwTiuUOx9W$xDe?+JL zkDB)XKoR~eeG9-Ie?R#D5D;SL0Xoee#`M2n4|ZTy_Ag)$&cDMRtgL@Gi~CP2b7n^N zXLO343vkK)8J*((r^@^hgZZz}DRyo^-1-Y{#}3Tf{snHw^-q=gBTMSPs|+tn;QQw@ z17ZDX=k|-W^$VTi_6-@qkwDL ztuUOYzlB6*E*3}4(Qe8q-Fc1gmyuDb)@i4RTxlqmJJpolJ6NUiG_nlQlW2_&trT-1dvOnptql9Rt@I22VFYhVgW?)WUh zIx4|%HPw$)vV};JL!YtKoosb7OOTw)SNB1o%hs%4HX1#mkHe|uu7r7++BwaF!rK|y z8RC|T76hMl7Gm9=u4K5bK=a)4e8zH(rwUL+DfetXX?`c%?PIf^RD6EAp@nl_eDn4m#rqeaWyjeF5Gnw z>!UWB(b6kF-gQE(X?Vk*X$!W)X5Pv4(?>$T^28wvjS!yL|!6D;IYS1xa-IQu>A{;8*+RF2*Ty zfvwj#cq+FzbPBdQRhYRb=`je8YvtZw!x4A-QpWT29Xe507N@S>g5Kf%8~x&8U1J76Hff6FH8TL?yx|7;N%)I-KwbI;dz(Fbb~IbWmMkzrGn5V066~xQ?U} zht{`EOLR%yyTbudOX84c6M^U}jIa-XE4vozY-1W4VB|aV@f3^LR@8Lpu9|6^E@cLB z&CPsWpHef9MdvSAkSO-u=Ge{twnmz(7fTUpnI`K8epeCIAPPDpXS^P zFnV??4L*kU7KqR~zRR+;Ex(0vLFZd@swBOgMWV@e6KzEynxrD8=Df>z#u!6RF-AsC z-g}31@@<$lB>T~Qtvb=4RYkl*Zz|b9Q~kkx&bZD|* z*;BjKJN}4OS=Y(-#t)RNv;ecP0 z<(OP@PoighzfH`uLGL>gc;)!!MEZJwzdvqLwT{+R)kd|-%BV{Jg)m%MV)k^qtT5by zn>}4VyeYRf!*JO&Ui5+uW(J@9-(eBo<9gWqCJ2jIl=qsRe_!`SWvLViVXli2U9BMr6)H@{gX zrKwexvE8@MhR9=nQrna&_+?Wa&iFyMQLp(5xrG8Ww z4s+oxTo}VHJo!q!6;aml=qMBEU%fO#a}JklF92Tw1aEs&Xj7yG)u#M)b2sm5~Rdd5!)(pAsMSzDlE!`N37E~DJ4 zq%2$srIyOpG@hc~p*~^Ya-t zu*Vx%Rw@A!E5SQ>b*k$kn-75vHD3jU?M{5`}W^W6l{r0ezhdfdAM1w9>FcrbNy z9v>M54q(ju8_p}MJgWd$R8U#Q!nNaEQ2$WC+S)&$U+-&`l$+q4W4U)xORCc73e;25 z%kvt&)e&psRr!hRR|8MHA{>O6E=rR)d0dIVJa>hDJ$x%8qgHu#K+H?sX{wUyqI8xJ zs;#Vr&aOtf~J2!9AuWufTd#R(h z$y2c3zM~zRMdWFc^^id?=bb;%`K#=DIWaCKSt(O#nLx;RyE!1!zaZtdo|#H0(PZe| z+s&%dDG~iHM%GeIUnJ#i&F-+r+ETIM!UARA3JZHEiXv_c}MWx;bPQkT0%}CUv zp)V`QfhGE2jLAOoP;h9r-mR=Hbff(Z$FyH=M1Hp>S$QNB?`^x3qLe{8LprLN{|PXGxDB|ijhg4Q>4FzHWC`6?(K9LA-pUM`yYs@tEUA+JDF z5P`!<)YK^sFCbJU2bW;A;+DGxwM;qh@sX&*a0LeJMdTMj_(lemGdKzWBLRX3Kq~Ry zf?jkD^^{Ij4>4bR_4OGGj4SxPB%*E<8^i^hwI?2s#msknWv5)R(XAet1t5|HaCaXN zANWolzjlR4U5YLI6`Jj%pJG&UD4mp*JI8T>QNri6l-ceftV`NA#7k-{)oP9$3 z0S4J#XC*7TbgWY!7LWOE1p7ph7YtULsiP%?ZlP(H7=NBFQkw>S)y7F2!%flC0wdn; zs1j>0>(j!bNsoG@kR(QBr7T9J1`E2h;PAF5;(X09JNtxSMd_#K<0m2P6Au!kpNCx` z7CyZT)!g(Q-MByyc}u@GbTSa1M{f}{<^a$rX|-arVz7x{3L=tpsSU6eonEL)H$)_b z(oy~6u>3+0@mws{*X04F468k%pM}ULA}P6B)Ozd&SQXQl=YkmwunwGF1T2KHeVfMo zQMe0cWeWIs+UbQ0&BJD@5V{zqt}wP`@cecvDl>$RYHOxH7rYCfJ}Kly=sbIC{GKV) z9cqBJh0ejfH8*W@fUv7&X`; z+J`D0#VFggTA%WAXJ#e`rxce!cQBz_-}W!$!O?IQlhDAU?8-OvRA*Y34v2MWS}2G+ zD6@ZH2iWAWp}C6#d^%HPZvrxHpE3;HNNgOr{j~>2)_ft<#;8};av_fbo(S$xJi#3b z0^FgvaV#<&-vV?edB7-78S9}${W}82;aHC-fY9vt5wBb%DFHt9b2rAEs4fD3SNi>Y zT!5nb!TYdHsW0jW1ieta?WhwXfzrv*sFSeEyH~2xY7E*1o>(q8qRu}Wvhh%6)4dpf zZ_ywT?G)m6j1$7GUH6Zu(ciI(|0A5H|IyeUphka00RB5Tf&+-i&QPP@{l?fifr#v% z$ud8fJKBGDa%cTt;}Ws6qrxXq0LdR}1RUo71$6X-zVlBt`dHbDOR>s148X#e7>{a~W~y+&+*x@!LxN#fx7E0Q#7L4L+_ zieEze%6KZCbXTWMDR=nFH}pGC0??Sdz8`yahLPFu6pD(rgqyX=nu*N2X@ocI??>?$ zemBz0JWX)e+iGa8HnJ=MXi`R^(CE=_GhZq1(ORS6O0xw8izB}Vxjt6L_^I<&s8GVm zOMw!BQsBV9Z@zPy>_iH2gYfwAPA1kI+dTvR`zv!Ti6aZ8r=vQ%H>T-Pa1yac)z_)a zW1pp#d6d~0Q@mS#x9Hx}`wZF@$5oRSrE}MJU3nYjThYdsVs%z`bUz=QoXoZGkMJ5{cg9L?IDu8~fce(Ru+f1bVO$@?I%<~@_HE!Q${ zq3=j}(oM&>+oomw12hRsH}uT+oyPBQuNo}h=BB!9WurNh^pb z`^3XwfXH}vTfYkBsIKWv`OR{oCCzumv2b)6$>b(=_uJ5TCE>thWbU1j+j3%afa^zS zC^q94-}MGLhqKF7g1HL*&VdBPO@RQ-k>a<{m?SE(;80rRYafg@!hymU{d65 zDtPTRT-ch?s@^=BPY7x;#?5~_JeV~71%RN|S(}a6YNxgd`7%JD-{5kApDGCSYgK1o zV$UCV2IJdmZjDmvE{Enp5owf>QKi7}hGI7CPP-8pG zf+MQ|jgqSJW# z&S>qBzds^2E7h=1VJ_ZpDfp6W)65v7^e_tRqg?e}g{vC*_X5@43@Ha*H9dVP?#y-gi?gJ3>n_9CT& z%q!9XeU^k!&@?ksEt8^lsO1xryj2?2E6{)2LH^)S5Dy zRIR(2Tl4X}rV1SgIk(lt%VZW2Ryq}8B|d_thhwv|)5|*1Z2Gs`KXOgKVTzX9t{-@= z@?q&2F8Y)HF?kmM^70RvLXAoG-5h$ZCJwP&neX_SO3-siZwe{GVtg%wJNVftlMiJz z=BFq`<*bo+7RqptAXkbGa01@NZn1kf6nU(4P`_6Npvvt-U8=Qb7v_{R za|+m?c9-&roEJNz|!}5q>dEO9f9=0V4!X|tcUQpfMs))&jGMj}$Im-!8BGs4!AaM(ouu!>hGI`XC#$bU!|L(u1A8h_Z}Q~}fFv+%*6 zawOmq0l63*yAUw}@BifF`*;GV9Ml9l84$M?lqpLtL4`?F-_}1v5c6sMcC=vCt^G-f z%hAekOf^lW^Of-uP5Z-bm6G%ILkF}Lo#}~9Vo868 zD#qlI?b0qR@Wbhdbht&iSUNzf-lhX>_vK;Tya;VdR8;^Y`j&B}={hCe>q1fo~NchLS?W`hqGy08e`CS2l(=T6+ci}HA zO#=@v`hEKP($jE(@Nimw&w^$D6}=l*V`2LG{>Q|~`gwGX$okNSY{^%O{GxbI@ZLEGzFu?dW`3m!HO~)(1Ad zW3f9!rB5gjdb=eixL89TaZxs+WKG4@nx;Y&8MFfLg*vtekZS|@o|=-&hlk95p1ZuJ z9`R{@fkAcVrz37tYNkv*8lByBfJmpLba%tE20YK}tm}H7_kOQW_ZOJid(WOVd)BPI_p$!R?`XnV z@H1uDEwCRO5)7hWkcd+D2*e=|Sa}$nQy9dec`Uh}<1&>SK_DahQ#qkr?U8kP+5>HZ_{0Vh=(dm9WS1O7^NkhN@u9D)x9nFq6p>8jJ6y( zF)V-D!EHkNA{psU-vY!{e`$l;wGTp+@zz#p+yWaD4n_j$S(){8@!l6AM4D)2>nr;u z;YQXN9jjuNW1Dc%M`GZyBO#Us=#4!tx*-+mmF(}wFWoGL1;u_A)(Lj6rvUEj>9Db( z5&lWl0qNISCBPC|2%T?;w#|KL!~`cRo$jqjWo;V<;-NGZ?jq5;!%d}ynKku?CUO)| zW#cE2&f$ZN!?zJ&+WU_NmI7xvU^$tGN5K7y1P1?w zvubRkl-MMuTa_Pl<2l8BH04e(Lgn6`f9(_)s^Lhlc!qSTWQ|Y|4l{#+<0=m`{T>OjA3WF z%|n(-QXY6Tr$Lj(Jf7jVTC~GcFLL%VD1S(!c=gXqg9%*WxS3$}d?zpfXnIelE(^e@ zXa%tWSPd?!T#E&UmKo?o?V&A+;g(yR^bSe~l~a1YwqJGOC?&`jja0G+FGd#P?)!as ziW|DBT9Zq=(@nTbi=*i&AnH3X6JTo5#(_fE4kj)=?-+; z=uj8LGMyQ)cV#+OIu=2B8h$YYON>4|wHNvZw^^Xd&&6sy$D~4(uLq*UCU@o(zl>B) z!f-Uu{{}`xIXtycx4mh{k6$T2u^16d00>+A>VBIco%S{1J%vFXEh zzc%}~pPJ$OEaODd2o?qMmMazBjO;QlN2)j`vfJ!MzH$zs($z4JgaD+}8Ajji6Vfzq+2QTgcx=z@flrN!ZykFV{->`X&)ZS3~bLmofM z$$I%2Y}<%0sA|@-@=$4hrm)#C<36RG$`)7l3!1bcdCHF2Nk-@F`%AU%AeL>!D_}Y-7U$l3ms1ss3B_hx4K zua%Ts8o>Ud2Cx8X`@c~GuIgL&raHT)q}&MWl{^90-?gRpD=X3$+LrRPVSDN)+HbKu93O8R2A6lGJ=v z&$3{3Y-u1GoG8Tk+)P&Dn=cnS0i6vtp3vu%pEqI&jNZkk&2rb20gMb0ODn5$?U?Oh zsJgEl6H@=0q+-T-uXc)!hS3uuss<`<7U6LvMpRhCJ-2ZMd25#aJK7SCXq|gVOT8$L zO@gLhZT)PE5U{0$WJ{tOhkE2((`nz*jS{A_u}X(sTV`soH5eUW)BI%L>eA4(Nj`9|r)sce0e z%rQ_KtKgj&gX852^b?{kkbIr78Do$h2hXybL5&P(RrXtsqo{3zQ7XYUX*9$?xoI64efjHm1qGJ!wg?NrmU2Z-HL!L z9bg#S|1hBorfplEJajT3{LHJKh77;N?NlQ8@VO8X-^rwm?WK=~5k2~ubb@jWuy&i? z=O`6zEPZGAodX!guQ@cQE;B4`Q`6BAhT zvQwm+yv}5tsW%*b_izyto3LuVv24w?kLC2@)wjYQXzB5y-Hk(N%u2?ts*-P%T5p_B zaKt7PEh!;yDg8mLO#9r$0>AEGCzku9xILgnATX)U%Zv? zAYZFq3!A^gZ?F8thcQc|b}Waf7|s)qJzgBECNpbsRdN=c_ZRp{SYP*L7a2oy?gpWt z&sPCk7M^l7{1n2XZEU1^$#3(rzMEZTtf97B6mMr-C+*Iw$4${V9)`8a1CuyQY0qO& zpmfnO#fsD%r?=nVm}`+yIe%t}{FPf|P1JA#W$E!-ew%A6d`x5wMeD`m_j_jMb_7_} zoctBTvQJ9R7W2M8w(Mz+@KA>~TjP2>y<{bKT@eVF}Z z21iN7ZRInQA;C5@JVWYujJN1(WwnxL2<578K1xtBOZs{p&V1w=Vj1Ky&ui`42gi=` z*@J~G?xEs42xjgKw4bNja2bnjezcZMh{y@d4_{R5Yihca9+z)83!fp><)_@A>2h`p zO^XT;o6f6SC-7_H9GF7a^VGFLSNG6n$O$6qOz@(&iuxLU;Vau|XE%ppSkx%R58a_9 z@HMqAfp&!1U}?vl%yI8_Jjqu$6At8(BzMM>G&yk9Yz&zjU$9en@Y06bZzW!6P^mSV z>5Ric0i-R=c^A=aODAmBM&53U$NR|0eQtYx;FQx*1`Dwfdgp_PNo9O!v2uL_ExN_o zI%{s#n@6hHYE9;P{KhTfBLc z%`)SoO|FLO1yMGi)e&QEY$+ord`foKGj}}wNbA$?8SLeI_l5NS?hy6C=UoXm=h^8& zo}d66wU0i*8rlpOadfv)6NK_!J!L1h3Dh$9sdeXh56jO|SIFMDXy2C)S|Se$UGyjP ziWiDM=5*#vxNh|A|LHhS*fY^N4yuF=~Z-5q{WBdOEjR;+3AuQ7O=}-=`yU zf-2#)E(x4|6d*Ym3S?tp9(;*;M;D!Kpuk=iXu@aGK-{Aq8xtMjB#Mmj|4y6FRU9H^2pqOgws zt51Frk8yVZWNIEjraFBVc%fwu9||%SV`jHlZ98vvWi*MDjouwz@r$@-wf)2{`7vfL zrWb_~6`~+3SH>+y9f(Ijw8RuSEoQl8j|`Gp(-p;-@NxnYepmeSl_M2(GwT`WWmY`M zb!Y~;4gml}f&&MUfIDF&dWSQX1Za!_T&cSpu0jpJT;2*p)kG=5V*m(>2O;dXH*lq) z;Fy6z8G-~jDa*dE08o2)UOAx{;=6tln$_v%;OR>2z#eZiey}WNF^wP(@227VGB5ov;vqBIF0y%3K`%Mq67$y*K|7hJ1E=-)h)*-o1z%7Fe>Wuq+Z+_*LXzk@8rQR zO?$N_*NYr-WagFpc(a9H`U%WJ<&jRs&H;Z9GLC;_KsBy^rz#CrJo`Bsvf#q8)E-H- zRQM#apdzy1i1*MVEDS1FOs`~=ZX5EV8y`DB$6^JYPXr_Ri%fWmbOd>mtpIqObcba` z>iw^~cx(b_1YvGxPT=e=O|1wn$=BR$DUz>(as~=5#724AYmo+&-Wo>xI*Y*u3X$o? zFZG5g%uS=b%>)f7eL|3uts!|I^cC*)MUWS`4j_*Sa8|weqFQg8c1IfAx}yxi*ifVQ zAVu#oI&*$9qY_8}$q7-|0Q6<(WnX5t4rpRMS%#u_yFx5B@TaB0g~}|o1+C!aeWT#& zUZ)5Gqg%X4PmD1y>i7zZ`Jih6UezQhD@k`W7%PwF_z>XKR~}t<_0QRcbQU`DvJIG_ z2q6wB9|Dv)80W=jbtc#t=gqGE!Jo1JVc|@H@c1wzD)8HJ<<8@+Muc6`g(Om(<^gM{ zAVqSgGu;LQ%+?QcWH=f0RYV&u=nTdODBFWwEX>3NIL85N$C8@b$Hd`TweQtIqf$GoMXzRSzbu(zV6f5dtK@`#6_nlKpPUe4 z=Ps*lz{OBER=yL0>M>ilsR}LzDE#{18Dq$v8{kyRXz-&lT7N}nqL?wSqP*3qi#2wz zxkPe(4RF4P2!j&~W})Ul3@jxF~=>tU?e|y)QV{{D~TCmn6g50J4%?A+-q`@*N z8vk!FCX?r{3>0XofY2!mgiim?yIRXImEVO=zfO^6IfJxh@*Nah%?+BY2m8;g#Hr&iWnEHsl$E)tl3h=_A_(Qj&b!b6 zXSHQ z`(U%bU=o$7dZ537?FzY8mR+GvmXw^d^rNikN3Rscuv6)1@Ajg`vZbitE?izC_oC$S z_XV1($2n_xa5%vD<;oZ(fXy8Y%Ddmi?sG(nHhu}!w_VU_#)454>EivUP-58-J2h+Wr#>T~RW`6?90Zr%FBWFP>y-?KDmWFJ2?2n=Vso6@#{NeI=i}DK z)>WmK4vc8oxsI+kU^%L*QTdo5BgC1Qf}fw@V)XvTll1)H5UOw8PhVsLWV1?W&xZi) zv4TKzHPc}|yn%AgVAiOYOQHJLE|GEPe7$dNsUZ}L{HwlVtlt^vTW z`ABY(92{-dfiljV(wRLZdYcl9ts{AINISBeA9>5JYSw+h#75_c#TpTc>=#W;=9%|z zlO(88s*u;3M)e?F1@ zf=QWDg>hSh5@L}ia;wZMUxD%%`Sg^;nOx84AN8camoxnD(337zhyROji{-!OPGVt) zyOV%c!b%E(Gkq?xLM(vA{cpsQKa}A7J&h84CwI`0vj`7Ykru{~Mv}%ER?{ z5r>)OzgDco!U`u|vvF~N+Ms_ODu4;UY!d6=OL6{C9Q2RJ>hCpV|5L$>4Y1RJxW)OW zmH|LFT!Z8I&qYH2&@z@kiG%-1_+kTx_bz?#J%`lfAuc)-LrF&Z`L zR&jDJmze16?i|_EJXj_m0j7D?doO`sP6sU5XDQ0=!rLmI=6%5&+5HKOESK z!YnU{#1bhq!8|AdcC3U!sv`W+es*F;kF(Y0@hK!@>*(<+sWz#E2OSg#hd*6OEG9mD zVvZE_ELy+QoQ8u+xocFQWp=U8E#Qsr;uKJYNr?r1p z^ul=5$~RVV&2Y`9b+U0m{^BFovg7ye12lP3kpZgPpW2~YNG#zl+1AWexZ z7V0#k#8zN--JfpFcPJ%{aJBY9Ya?xPDf}HK9a?ktK0Yj%ebfUdSg56sViJ+fhsM`w zHkak*PWoOc`^!xSAu@$)Pf=6*x$n;x9=&2IUqp;Fv6w=2eu9hWZ?n+Yq9v|LX-_oy zN#IH7PCZ5u3lZ=2odS&en=Gc8n-w$C)*fa(^34yQPsQ>pk_2CSo=7xFo%*VM5b<@$ z9dG+~oYxhO*CdswO$pI`ueUvz2`t!BCgcT4fkg3gQKH_@eR6(F3iJ>j>utmNPNrar z^J7}YLI>xW`kHvBkHnXT?{D#jTwbW%SX?q6x0vc#mphbBdFxosURuy*`=0ojNq=uc z@O%8cPYAR~?X_=ks%;YKJF5hhp4h?)o1p9lc!QV0PwD5j2a=q(H%7i4q>OVe$=@}h zN5Mt@8m-qcv(S4dCG_@3@1yI&URyMW{9=G7J$t-l*QNI{P@_?jlx#<36M0y8ThuZ} z^IF*Hjql!?*W^#{SI^_tv!C9`n8B^r!8pAEYCSZsbt!KmYf*kMdLJR`zXXytPB`fg z7XscRDx*YfivJl4#z>KthXrkMmzy9lo`tS@y z;8TK8hW7EBh3mEDoNo3Csz8oi+WogTyrZG#J)u#SiHtQG{=&ty;}7ANAgKG@L=u3P-d2^4?AoG}`QLs+Xa zpmOJ zl*(!rg+_{W3-k9FG>O+^raM{R zvqLH>K~NwuLOcix$@%#Atc>zMLE>EVMSeR32`ZR7RK|Zk_-o(N|z6`=^e>OVC9Nc8z=Z4pvWb- zsKHVNjUwLxL)nJNrgj$;xm5cNcA#eBZHH1bW(iQo#kL^j9&Ub+^BLz*CwhHi8AU)H zHulQQyq(Y@|BYHjFhkVQV{VzEC)2f0KRoC<=X$NMUKk@k=Gxf`CG(lrXc<^2b)=Mh zB)yr(jpX7Og8XgIk+Q$Q@${4??_VK!_I>2=U4UAzn%bDlt6*Hp0V>jA-2=kz1dC8~^Zz z+M>*^7d+xXj=rBnNBd&YKk0gOlKMy?+zzUS=Vm8Z2q?ewfbvVvx}bA?!5=GWVOjYO z0M%*%P_1we2ufNQFBCg?*>g1vZk->AsOyym$S87?nNh-CfS}i_sTyE^fUp={4o+|V z-@O61VE<}A)yvEFvjrsxZqCx`Wo9QQ_XEiCeK1dx1}OTXfTG_50Tg}Wf5ifTd$V7$ z0Lj0nzk*l*sL|DN0S4C>PtRUs|0xzg;VKrO>M9mMp$KJEspwxV_Zxb>`d3vvYVQdGBy*L}lB(#NvLz*0WDCxI|Nx{d-b^v@=f2 zv$QgLz6Uw4dfEpB2ZqVwYzQ~yvyj=>qDfvp1w2;P*mA%3Af$XTWyw@`m&~T{OZ{Dapgu26Omg+ zPb{NiUbPwv2L&`$R`Z9y0MARK?8@mct$SGw16guE6n%g0B{X>8;i6&SJF0+4D|0REM$4kM6VXHY~>Ub-WW7vJB9vSN6Nnnm7j=vzzvG?{MH~!1;i^0|5wX#ED*&`GbOea+pOP|S{@jU6NM2mW8Lgsj*=cSvu*TQ#DGZM7iNboqV`hGAEt{gXQ5t|*0EZE zEN|&^mQfBu1?8uIqc$&pk*t&nik6FV9hL8x7O5Kb+90E~!(+*1d`LT>-=vpD$g)QY z-n9~C*wR!cVtepa{~XH=`KTelpSMkO0jZIe;~B8u`12HJq|LkV9|7J;dFASkjeN(D zn5@ozr8l;OJPqO>LocD0%Q9TQG435TvUQf7a{c`mN@&@gsN%BZct?%Jf~|~p^YM%m z0!w;a@SQ(F%j`vMY=^z(w+l$-p!&ug=)d#x5hTQcVjafq3EV^?J>0UkxrBgQj-^fq z3_);(oTgF%ZFmZr{CX}Igm(6nY(K`Gh1SxxunG=!4DsT@wo8z#qyTFFe#Hxb6i_hFc~yy<)zny+r80q!)E$WNs5_^^u?gU$b@#Zv9R{}HDRT-t z@MI4*b%qW2ale(|G&PbdslcEa<`VSU>6NBZ31RNG41;@SB<%H(f51Uzq;9mkUWp6p zmT~r+-Z*-8WY~4y0u^GIkRoj8-i9gzb(p3+OxJ1h^%4H=&Fnd0-n>0KMcA2W$!VI( zxp4NJvGKDy(ULg-1*U=RsMkje8IcQpHF7Y`thqYf5^kY`4|1?ZurYFOWKeM#4*^vslP~sy?CblV zj?$%P&-r$|=F<7%@AZqL-<72k@kq0e_YX<5;5ydDe_4D@4*=*>-pHO5lgxt4*cS93 zzrsG9s4^5w6oH@Z5f9?q5U5(}MWjOy!bhZBnS~ttzMaBQAB*P2`WdBtx0&M7iCl>vo3h5st z8D^Hhm(TrATLyvq$^NSN0faVO@#FjlvFH!}t$%FUf6aTx!UDW^f0MC*)b{UWtUpw@ z{X@%G{-l!rCmD;CgYED2TZ9!?^;>V(=FV>1x^6l$xSocz|(PtZmx*ZGyartN6&GnNc?AxWcs^nEoDo#(Qfspm>q^pb%ce_KW z%xk}#W7AfIM&p-|b>y&82!$k==x%K6pY!z_1<=HnnV~rwyI*Yg=~o}F4ONl2Z%1if zI1g10g)`E;pRtaej;dl%Z{c%vtAV4mzch>bj-=jVqE*5MC~b0Lb?zpUkn*L{M#9-< z^DvI@WCP2LB#5jFn8#7L4#*QOrh z%s{sB9qPAHzaz+-r%^Kdm>+6+jB~c^c%aM85e%OfWuukWYhXC>TfE}M;rprZ3a-Mt zktt+Jd+nxxGf<8TusV*RKPC3Wwk>qHrtCZSuD88H#H@~aI7I_YRBCx(m~d}psj z=rhI4eyrLw(a&VCQ^T>BxU_FA8QXP?L5+`Dgy)V?$VyjWV2Xf$ILK))l=N_lSHy*} zb{56p+7D>sn_8cRCr9Qa#2}`Fna=3^ZScyXIIG!+pycqh&d?=cRl z6T4quUphs!pO)R)KAc_;ZaFj(d(_hOezNHLz1qgId-vQe0$qnT`P7Lo><-SY0#Oq% zJXMi-i&-k#s0+>N%b2BHmjh7ICf;_^jqe+gy%GZEa$BXr z)xs~rFRi1vDDK_btlZOVkyP z9aAt$Z>uHK)(jY%);Q5Wrr@4Bw4bap4I*vHI~nf7{lT<>wu;>NvNZ3>@e96r)TK|8 zW3FcHY9sg3ZVhV+t|NzN?%g01t@>Ih+x05Xv~hJ#DLg;$+UZZzcAYzX`}W2Z>O8`q z9D}nNC4*JpVkjDfT47gk^8~KhiX&=OY2JIkji#)k(jUg0zMj!UqmWMGmU>Qb@|g3yYXXoB^HPfpr=n*g>Py!2j$a&?zZkmX z5HYZ6IXXul{u#$cC{+04@v%&Gp|fWRHR@-cZ@K=43hiR|ZPx@OKN)eVQypU6v#xr} zSQ&Wob)fF<7omomDCiY#q>n4zJa@ghjk)(T4}YxVesNQBUR~H6dFw+)tZ=6FZU}?R zfw-P!eeH~tqMEx^&0egk(4zk61VeWV@^RGOtjhR1M#21{d8`e>#5W1tmZJ4Da|^!W zg=m{ICrx+vv&h3);-S!%%5rMa1MZ9R5DXt-h)va3|!#rkg&+6X0)=oHRX!t)6 zRZE3RO6t_CHaza;(d)SgYD(Vl2-G~NTI(a;+1#C%&@OUHh(+Utu72*6Ryt|#llbJX zsZY4mRcr^T5jwzQlb#UxEQ-$mMUB8KyCH#{t=hUO$IZjy$6#3%+K^qTc;*@d>{xxf zOG%(ks1wWaTlG(gs?|vCJRPEgCZQ&a6$!QPl57l^BN85|!jxEK3sh{|y-FlUxvjhb zuB1)_CmL2^Wmq?H$D9cEC$>yPsy-+cu(f&iR-vYEX^^bx)2;0!abuvp%%VnJ;Aye? z*?@C5r@HOo&{rR4WW`eJfk&}HTSW_!)b*?-u~=iR?p8cTif*%0Zlp}qxl%XJgO2T) z=cy3KY`MgUU2>MqA%yxxb-Y}vK78t&P(ll;MH``cN6r;199{#)0F!F#+ssY@PV3T2 zXkUItG`6~TdPt%z%my?oxzfhcd=xn8x+9s(HIn+V5%ch^J)Rw&^}7(aV%tKA#ZFXM z%>#q|f+=;hxN#GCuINWuFx1e2xgft~>sC3tij?F^6s6a8Y%0)|2WkaQU;#@ZSff%B zBp3BmAt!^;0qgiX`D}ebC5pwD490wWnRd0=k1^EH5ILbJvsC}e!Dq|4dL^lls#AX2 za+rH+r5Lw(Rs$W?7OA~)OQd4d^}Amx$62J+*M~D)tjAmqkTpG{z}sgoTMM~X+_`X4 zR$q_KVswy`iy|n!u_9=PM{uybjqf2Bg{UBC=cL^1Fkg_cp`D)%gFWP?^ImW~zoo9O z(UbAywR4L`E@Pvte!_J82?9|$!wY0ZaT$dS?}7M4dEIZfTcBy_uIchR<_^VW?+i&L zLJd{QFDpvY1%U|(Sc0bFXQ1a2TPW4C+0M-){w}yso&y)k55gSpRk7*PIUx*!@b+BwZ4@n$<{NCr z2_6o*FDgg-ZMoZ7b2aaQ{YP>4(Sw9|(@5@{D^2y4U~53~{fhCRn@tRWe;3GqK!vlE z^x|F0(1R}n1tWtm0|g&~Ps!_PSY4B>D z&H9A7jAEJroSzTp@CZGVSU-)A`?+hB zBpF?DRBF+;WJ==1+|nb(5~isR9}ifoaD)AE zl$_dR%sI*5GJky}&TxVM+9_}UsWfZ{JbpQ_J<}B>1v5@RXB^nJ*Txypf6IPo+Volj zHK3YvkW^jGJcFJwDz$mr+ZZD|Nv7#_G(97S7;Y2+ZS!_e*NnBW2z}yO@kg%KB+72r zmnwwur9I@!YBw3m*0a;RMwW0@>f_H-n&*D>6+a3j^Fs^~W&M&|sy3C(5^nYc<)`gb z$(;AnsI{=hIh8_ds=@@bx~h3b4g-hSU?f4h2@Ex&M894^Ekc18U)ank=$Q$ONVa6o z+#`cQa^(nTAF*U^2_B_+PKC1tvNSQ^$8}+45A07S;gtqJAMD&j_a3|8&GSC z2oAYIu}qPM*U^y$__UNc-ZYUkLNZPQ*f1>eh^Va8?U8S#Y(b6e?p&cApUvpw0k3)s z@T&cjHI-;_86q|k40f6M@1v7P8R${M!gGL%*bJF_MZ*NDy=jDt#JFTS2(pyYjnb;M z5$R=%WzdELO{7JRj8frGCRn;4f^>6zZ)&}Q!?)q>zIufrTUO9$LVmXv^q4YY+qIN6 zty(25{AQ|By7oJL{8Z)iq)`2=0e+`OHW-`S7qLbP7@Js;m;fcr*7S>5iO8eGHCxec ztHt?A!&GC4S;`WChGSZ2GKlvq;l_0Ixr3mE$Sggmw@8wUH)GfLyD^!Ak7A6K2z+|Q z8h6pp~Ma#d*!*JZ#+B_+@PnJL4Z%5@HQH3WW&ovLmN|~GU9}R)s1WX1#o#QLCHsx#E(aVF;ck$3GOy1%qed!yr+)lerM6k$6 zuXzqFt;ruo1e3;!dP?gLyV*DcsTNKyuO1a9v-uz(lA!xiSxuuf1oZA3nWdp6p_QxK zcQYp$H$p}sTdbK#z#8k>mWHRSp^DH38?|nI|9*glQv3R{o>_&ia_%7L@>fgyer4DtPu?P@NKT*|5%gF8g4wq{OF?-!b+m>u^W)m5)X_*#uz zhDO;V*qu4Oba|~Hkp|j(tj!QIQKW2L>2ex925mcA&Tvj%tfN^@BH8;2mv2UUu+}X2{55l^FXmV^~*@ zI)ap4RJ#K09MRKHaA$*FHgGoFyhI*0;&cV-={sYOjU=>K4XL@)*O;AnLDHTmLPH(qf{<2yYvE!ee4DRv^5Qx% zCPM!|YBqnby7^zC*}&_Z{x7vqkiQF7|3hVj6WGT7Dn9^T^1o9b{!nuC59$Lm%;4tY+jf;f~)J9#_jsXt%UnMRJT}?}UYhz0z zO?`WPb6ZVgJsNn?kiNN|h0g1{5Fq>fAt3NS>NM<}oPRAh`U6q=p!VAHYcf=4aW9_n z)&~*Yl6uQ|fu5T6IZDOAR@gsuW>KYbe!Q>m$3RKkdghFgO>OA~Bf_~$Sx7$RaPFuI zZ0<92@oDS_OuE&8awGSnJwAuwvUFgy!-}#x)LbvM9l2-#Oldp6Vf}!pd!ly`7+=3* z${o{us_~kqAv?I$u~2X-o#D>>1XE-V`o>1B`NCJ?tF%wxKHrZ^4a*xG|a1qxM_2*C^E4Zn!C{r zPz+Ubj`qM<=rr+?%)gF=Hs9kdGoM}7HW#a_RsYjI ztGmmC75@iso%mJ=i|yNbUDh75@u646=Ug1#=`nSqaYQSu+H0+ftc0d>@p3&`yBY78 z!yFxeuG%54RaG>))t1sqXe(HKul)$MEoR>?$=o<2H9V>Rhp_4UF#vD0T2_h?Y;r0wGgJne%)U%g~gd#9mj50frWyZ?z@#?E(g5~ZTSt7N$sEmArK2-InGwZ>3x{0 zk`>1>KIkKP?n0(LE~E$DRg@n@#XhErNqr<+F=cQw4GDg@Rq5T5BWUR?zqv zxzZWQKseGNpJd9@(!I_X|7jyrJXMKqB;jE8I`Pp5&m9l$xbos7l;gh7p04I!3Q++< z>3Txgz=)n=c-Q&yPgA0E+iAURH^|Zx2fd)rMZ|{lx-*cf7CND8VP(-i!QPxo+a2?> zeEN;lot7>I!-|O=26vmjKf&8mHxXlh^wScN_mlcdb?;TJR1$IZPNF9^Um*`j9@#+C z66c<^Pq6Xe*c@3dEDy>^qzMpkyOZJ2a)T{n$}O{@(dU!eB&!d+Z4m9yz@2Am`E7>=C8u~|vl`{if$^vBh|E#R zMOHeblDMhuvD3CBpFBzz7=HRMw6VN--sz;I6fc9d8b7tDqHT54OMqSrFL_v@()+#S zc7d7T8<*sH;K5Y(luSi63y^ zC`0lys$kpuLV2w;_!SPa(yp^bGR`yC74d$=2efZ#@R?;DSTVv#mzlzU$-ssd?sNVKMhfnH@LmYav$4W`Xt%qtX0a{_;4I>-%}Rp6w;Jh%fLm@m9bChi78}=NX&q zpy#^|$N_6-o7QgYr(u%#1aWqp9XYP;5nG8eQB+16V+2-8Nf$z!@AY| z)?t{!^cDa{{g(Ak^c(GV)*pabzPaEF0orX1@Yjqeaqoe|uUL@yH437JDpmmOwjaQ5 z&BGkEs@P0{+EP2+{xKM{?B1>JYx5xD-7$JZKgHyZE0A2?E^xK8zC9*&Y`G1z3-A_z ztE?97jp}cx@^B7R+RZ|_a1Y8q0gD<4HOv8_hIt@3CrRk`hr}dcrLBU0LjPgI&A@C$ z$Cn0&3GECByI9VJ#^Ml3$ewOub_5BhsaX*zB4XNBwTh%D&B@N2aRB7O>b2Amc6zcB z+Fj{;{8Krzy3&>|Vp3!-ORn~GhB9qCrtfoP$Iv|sRaziw+AC6%GG*1 z8fOAkLxI+!PJK67226L`rETB6wa*aIv63t2Mi)^BHjRn6aZHh{=n@sE+I%dA%r%(2+TBzg6o- zIs1wv@+uV12T*nMXms+b@$YS+FjSEQ$|wT%juh64@$WK9))m?hD^N6ZUNLsthqlGd zehddnABE6oQwqN)kg7@}JuTtiE|YbpC==Tivu@}kzx=sHE<|3Zg_Mmmhp3uI z=aQG97)4fqw;cy>YYyHPtO$<+Kd}|T%V&YZ1$1g#!5=5=HQe%Fw4e z@bW8AK#9OC-}pM?@I#!pAHG5(nh}+ga^q;>QV`9fn5DJO&nKLnC)eo|dc?MQI$r&) zlc8uWb6BT~&v>l$7JytiJz$wkccdD5m>~ReM+|a_6@u#hnrgq~p@~8I3SMrBnfxBT zPHYIeFW|7nK1^5wHaBe$NKdr$swl?LK0DXf6`?za+N)cWj=CtmzayJYdP~gj7k~Wn zN0Cl()nkD)DFROwyZWURwzE>wCH&raAm)V&Y>R2$45+S9!AVgEp>kCqQ%nqGiY>DH zA;Qh&p@t&g;ou_Z{UFD5$1c`plLVS`UpS}eGK23*!E2UmeACPduS6m7*y@Y}7B^ta zOk3au9InBITxrF9U+PQHk#~mtM zri+s@xu@p}baewAlf??ejYHsd{YSY9ZrKs;K`KsSWhxb5|8Z<#;sopDq}YMD)XJS zo`_v>->y1=x}0w;Ru+F?hU1x0o(C1)&}-u-){9>03_j;ZB6h|x>HJl~Gahrj1vzaQ z=`nMvL8zD(Tz)@do6{A$6-2k(mD>{A3}br22};gzqC_Ic@4~5H3`yPpC*}P$uwAd?pnQy z)BjQg{8=*ep3z!(@2$h>Ju~#6t8qGbO}5hr(p#Y*vu_#!$aUZxWDG1_3zV=x`{iCU z+piE`<4C+OJ(l<;pFGMGLh z5`;~nIi|x}W-{|V1SixO0($arabRQ_H@15JcvhiulqY>DhU1F?zT%t9avl#@l)-ac zUyR#Cch0!LIsp5+2T1GVY&l@Y0H3CN7s&UW;A9Eb5%&U{Gve);Bycv7!1j#-USTJB z(scz@j1!auq=gH%%~)*TA&M}KH`wBC8nUF{9$(bnZPGtC(YH_`CGIX|qCw+xscG0e z72jwzY{NUaF)3YV^2Qh`|Lxod#pPExP`=n8@10Y;^HbbjjOXJ2D7pOIyz{?Aa`}G% zKtuj(WilMB@a!od9FRg-fVb;XLEvBoZYH?i@w=nS$U##_+uGV#-&*rmF^ZYCjme)x z1ZK#8tw4t3@h_axAKS$KE8gs%+Vl&#{10vVqp`&j_V_+wQxAUKl(=R{V-`d2&^2av)Cjp3!u3y*Qwj5Tg)rE099mQ!+u-SGIjwZEOYgV|uj z@uabj`=r^=?$s^@F`A>@Stf^znxb!JXctdI6srnjTg$45Cg2!o%?qc41HQOR3^d6` zW8s2k(S-wLs@kWNMy^hzi?cnSzO9*|#EtVq&!=anbx&6{bhrgKio`h^B^^|`i7q@3 zf`>{(>lsx!kIGeXrvyFZk4D!lP=ncXEsMs~r<~QFc3M?On^ay{AGEewL$-G3sFj>b z61XZDa32sI`^boKx*pA~OP-iF)}Hvdq9eJ@BuZ+YyB-|DDlj_cbK8Ycre)S5%RUNN zeXmTcJ)OOUdcD<-+06}HE?d|;ykzW}?u9UBpGiof>zd-+e6YBfH0$PsO6B*BJ!E8> z+E$>VQE9Kli^S%uQRnK?oPnf;-u|vk(dVdWo|?{84b*B2=aRcY>&J@-FWJtQ60|4B zcZV1Kk&*V7@+#=5o6{y|H;_fmy$OlbGl}ZYMr09Hne$xVCn6RPc|Gro@Jwz!oz>P# zd}Z6PL6qY6g8ux2#O9piT73@MdFdkC;o7yLqdSypdS@r+M%j+Wb*SD}jU;Fb1gx4c zC#%}Z+VMe^$&2FagyIQOMx^zN^UjAAb>H5n6m{G~`Oq6__m#wW#iTtwe@<4l)$4G| zgR63qFxqB@;HHgjHRa|@YLt)b#pX4{Vh^4r-IhXSsI|fpGG@{cA(PV3)Vc3gJR&&%4~|{qb6X zI9b9FgoQ*sQoZgjaYfNG?Jy{+PmkHS+Kt#TI;zQFVyB`Bf+zjT*{wEi$Mmc%*69%a zr+GggJa^i_zzSAEp)h+b!p+hM;}PHJ|Eyjb2yX z+HSMe;ruoVcixh{eW#I#st*H$iVKb(olV-Wug06ktw*;n+Ovgu?2Ixwl$!2+Bjqsi zEa30NT@h`i4R;kGvwbwu7d*^$WR$XIBz!3081F*BY@SX!kE$jr)=JuHVu6e-mY0%L zYr|m~La_1PiS(@u3gdCm+$e#Bg(ZSbVaj(z0R{w$aAkm-V>byRt}%K1*|THOIDX<>}Mqei!GK2We6T0s)b(^eRa2^?QTvb3A){?)`rE zp1veV$I1_ndmBl>f_arK)iD3~9+s&Vi5XZfqV`=|^mHw`D&l10NeB*VgR7;h)UEGcP*?&_EO_=BgzRfk9J-|gE_vKDdp(A|-E zOF4O^yzD|^kr4*TM|v@=?xt%M0Q%RB4I#d>_I z)y^$i9OBhanZ2k9KFVVc5HKq2T$S0IX*Zs~=uxDsp0)ZYrMEcHQxy~aRW!xHNw~gU zn$E;-c@V$X>t>%@*OF8Bb5Z=Ofw%)E%GvzJ0h`MDHx`UUxHDt-CxV!S%51v_t%E3+ z`_Hsg#&~SxN{Lr?d@KtZj?zivj+@C^c41Lnue!5Yd7tPtJ@-7(oh_qI{_}4OD#{G_ z*N+ydqg;;CnjJHmr^GE`8lU4uzud1j32XIE<7X?s6<0}k`{CU-C#pt|3BlMP3nRSl zi3%QEL1|ZlHe1V!J@tgC%JCAg^UxqVUVL&miIjx@ND6bnf&~G)a{T;v)ju*PUAZYf zQ~8p?_l7cYy0>q?4yn-LuylO?U^Q(x0({THC}W?6(}Uu@oj(uhR;C|SV>*xTz!mD1 zk~6GmMmB${#$q1d%=N2AwGaB+x#$wEHF{o(=D`JIn&~$l zdeymRc=HSww^&a@A3_{hbcYT$@1 zs0fpBex?{4VrFfoZ7b#oltSt*pFEXMd~aZ*&Z$Df-d=o>5^JcKkrUEnrUNoq!Trk% z9ZZ~86Q(t{2x*E$t$w7^JVUD4k%BfpgouXO`MTyvv!^|rq)G6f;~~d3!MWaK0UppN z;OmnYUDQc}=nloWv3u$efjVit@0$(dl;A^!m ztGUDNJSvBJLSqk(5<3bXs9S$9N8wAagRFESsc#5~6k4mW9N0M&K3u5p8VV#w1W1lp z@v9#7CgvV<6xIGzH_#p8YhOJmxQ?sO$ojXe~Rt;=>`4TckXas42}j7?nc zAl59ydh#A}9)@K1h(_jKgHG>i`EOr?`nMPFs>LD=#n{m}>0(FE;&*m#+|iDcQ1v<} zTa@-Zpnx2*;z~}(5t2k1nB9SSA5bXmu8xK{>18a+9ew|e<(#JF%@&?X^L&T6hqv*PK!EwvpXmP8%x& zc)XoAsEvu#c&(>4X#W1Oy6Q(>AO6~j>sQ)o!z5$pnICAuJEd@Q^Fr_dPlX8ZRHzrf zGV!rjPMhz+XnI5!e$0^@?Yw3#%c`ac&;q8OYD21bQwBaKOwi`s&jym@?R93bf>6Dz z+90`23P{!wQ>h^qiPTIzy8Q0*=t!q#v*jj5!I^f=oTIHO<7RvAJ!| z0;~dF@j6nU17>_K}xACO3x|N5ZO- z8j>VRjjhpG2{eRc^OC2i#^4v6!J_faR{`+&;|vZWLalVopFL?3Ts3NfjsTA~EZOa3W`}MAa8u_5 zfUjZ*-wZ)m0svkB0Pqls2%$W;j2u);zQHQ2=p5#Jo*R519--YO>fmYvUnCcu#EAVd zyZIL85E-Y6TgOne= zpn(j9Ob@EDecI)J3&T?$KY7{AL7Kdk!9hBo+4}9~euv$fcduH;?U8MLwTzmUyqq>k z?t6JUX1s9G%;gLYmHopuwTu-s2Pp(&r)_q=r^!y!jJGd3f};n?p>mMPtC!3B;UaS_ zB8FW*qa&}N&D6T!PP~N7c_=w)J*+7jM_1_z8fPXQM;D?7f17y?ss=j;C0AiM&dJ=_ zv1_X2!S!~%f(~_NIvx5bNcT3JrM_O1<|1P=eUPezv%F-O5e1VM;r>OV0L_GR9DrMh zJ;v?+R6d~xyedtNaY&Ag8uTA?-2TWAe4`BGZ|yL0adFnBKVOH<&4# zHe&6?dZ-HVjN}iRZqoJOG4EevA?xC*C#f>{c|XjJTWT z-6^x4o)S75+{FhLV_PUeKX1F%b-*X7Z&UMiQ2TebOzl!Ljdc+Lv zk5qUAbkIi3c2K{GJ5v+ne){F%ld$zD$2U^}ls zu3~^V&1Z>v1Z)Jvij~1aj+#zYARq@g86D8Q@uVQ9mbZZprP6KKH)k{4nx%G~G728k zHz-jgV1EM14roKOXip?3pHp5(X!TPBw^-8pv_BhfYh~94#m=_3)QiTI-=chf2bKPh zpnU%yqUF&4Sf7vp=nncDdd2h8Xzh1M(a#R1zad3D(7$)O{STYH1cZJHH~oV02?+l* zHv3&nKij>26VrdJ0ZowSr|#A-F$qEdUGLu^YClPXzlrHT)_f+&`%`o4*O+*J+V=hK zIQ=B${VgWQzcj@CS12EpkB|Q^ZC=B+SUO%xUi>W1@NiYsZIZgk98X0iMuvPEJCeFn zg}dI2YE^s-pVFwp_zTapM=kp2fEXmlxy?9dySR-uPE_jBqwZM@H0o2_I}5 zChO212}f$YD|pt@{`I^@3uVJYGXLhs}jE&UCrAMmu)JW6CdkARYt=PxOy^ z371lMA9(HTQn(x(dY?@KAfGe<`L2zx8wIy)5%t^UEkygM#6H~U-r=u*c3OM)=J#c~ z`>z+r`^bu(1umYc>AUr05$Gg7-ge#D{m?*9!SiJjF`&wyExczK+e@WG{!o~fp_cZj zDi@f&?d&Z3uF7w~!`SP3BWmf48b|wI^#vq?Mqd?WEWD@cL-{5El-Ox47smgJaSq&4AwO<{L&w{sr{I)rqpG{SM!f+ z{N?%wJb9}-4#YP|IokVqTqd+f^W+u8v--P49Fq^*X8R$-GZ7`}BY0j+NWrbWbkxqx z5;x_H2tBr;x5fPF3W8L`dN+DDl#{tNa2=n- zj}8mBe?wmvYSBMP5v?^l;zC7iYHNV#+C_zFuWT;hg^BT9%3SzT=D9f3;ed26W3ICK z%-`qLA(y#zx2LFk$*g+}7nH^X18kr7VvTl8BwlvhnzU9qckJ}&8B@?Z)|-i8!}TBc z=ncf&+X9`gS9C~k7uZPGNPR(lp?0d^yI(!>;z7sy1@Z~U(aWjxcvsxT&35@lHMYaw z!|BJbfBEChebK3qhJ;O9+1pc_i=_SYMK^~Z^FYph>}d=Op{2Fg5E_Z}jk6hPlMl$* zpMTe-e){UutMfkMkg(gN<*+ha+Q z3MH?H^IOqR;EpsDadk6Wr^mwzZS=FZ1Gt?&eOrxA5o`6BZGj_zu>BX$u@7dF4;D8* zFQ-lV?WU@tI(ueXb=re_%qbm36q~l!D=RO%QB&>;ZudpucCxfK&xa#JZFAsq(>v3K z?aB-i4uO}gB7$~}J*g-~15d>Qbdr!Wb}~;$IETfx(;js173&fBDdrczoh+SXnvC$FnMP^h~Ho6=#pK=fc2iE>my9 z*jK*v!G6=3r=vHG=F4xNV_nX?Umw0avBHHOpEQ)BMJ!A;-4C`fe5n;9<0P*qSa`N> zD8#hP$6qXQ;LHOJ1nK^%fIVJ$Ts)U2->y!O-qvuLs*z7L8CN61o7lNIkjmUc{+L#Z z`Wene+vQRD4*& z>VHa5z?!6mCJwb%(3Ec=xB6ani?e zyaB=@MxY%j{x9ZMr>q?oIovXcE}^KdKR_W1T^j+JGGI$Ipq~y!1tb`{Ia}6S7FW<% z1%^Z_cNF5&ys{Ki#Muf48xN7b&yxeMt#SQIHtv3n&X7N^XT`|c3MD}T=9LQQ;<$h@ z)CKm}l(C||-GCW2sRlS=B;-j5o~K|RLydsIhK;C6)C5wj)3`FPA(bJY4khsw2nd7Q z&|z%NH4JL5GEj4M0H5K?AHQkN6qT#9lBh2R8i~MxO09<4B%!y*x=4-7>Waa;9Np`S zKzSRdv;jERp$cprz~gF_v*2+xIVHv#?3-{0RL`Bh!6Zd=C=uL>Vqpa;P!7!SWB9Q5 zqCSW^?)&SZ9>tZyEamGD~Bx7EJK+lU7k& zwW3jQ2#&Mid*PI4#rNV2YSf%5ph6;zJax@=Cg zDhz;I9M}Tw%vea)>4#EMMj1xcJh*mA*U;9J>F2uCG1{67xDAwClA!$R3#kv)GkFn~5fTjQBh^#osi~mu zqnwTncMT%*M+U6b6B;)ZU~)GIUYM;GDscrlB%xDCKQe{{0d7XVJz*21&6@*gb3zqE)X0kFv&;d0=T;d zz}>^PS|QHw^HrC&O!$hleuz=6>e8ZOI8~%|Lb)d&@OSby%?pse1iDNodUYq_RyY}& zc=>d(5`d0XkZ6!&jJzoW^y+}7a8wg+r)BK?&^k$}J7*79eN??=tOQN_+VW2n|8(qN z_<#I&%OINr##>90o>Yh6QBtjU62RoWU z3iy%I)w>SX7oE@RhI7~zcTA;m9G^}HaBwS_cHh=($z%Mf7@Q6%AbRlR3xZ&APle&(HP z=$$#$M105~{0>+;rUSt0s56F*j;AP^Fj>`Vr?#>A9yYqE6&&lA;=ZkruW~)I( zYwNX%Af;}fufqy8WpkimH0v;jw;i9W1)y6VM$Ii7ayA+4!6nG0KQN|hICwJaus$%j zvn$)e>3mEjPAEvFKU+uL@^C@{rwMkxPVC+36-opo+3A$4oT=L#=ha+trh$!U7As%fS*J*_cg9afWXESmgXFr>uE~xc1k1-e+4269+4^jgwW-4D; zo!n=baT>b}ObsDD9Qq-Eom|Huezua`b!H5JY!*uEuyt^)BXFH@%$mRp%V7VmnudSj z9!SUka2jCb5EsCueJdv58-FxFn7U?i;uw?d8RWl)?MVfuF>I9A-Qb};@$?H_bN7I0 zOjp=U&%jUUqya!DfdD#T%y0wLiNzi63!~>z_*Nk4{}5;LTv!HWN54SA%%vN{=1dFv{pL&rqP5+Ugbu#aDqp;~M#;l6 zT=xXe>-U(;H5-hYCq$)y&l#umnE=a3f>91B#vrv_+Et4j#psRkE zhJW0$3%*-8lG?4BYt46Y-J?fZ1<73lt}8aRVYAiUEHnxXBQy%${&~l^3>5rgZ{@Pw*>@$Xzd6y{*yH&AOtvG|E|jCF>r7+ za&&U|*M=wP-#gI$r%;Fh*54l6g!M~6f#Xe+4-3@$meWS2i5Z4E)jqMer68FU3MYEDNUlG!emm?OTT%3tzpLJkHJf z94jvN&Kw9&d^hrazkc~}zRdf};dkOU-X;<2>f8Gdwkov`YpsNfBOl_p)Th)QxDFW{ zY_)&g77ysTaa`R{!!@fCUaeDL_tt=rby>%( z&9jK%SdN4G1=TTXgEuzAr>l%26gdDe03$WPN+OrXAw!>9M$mb@Ri_a44GMR_Nx>+))6RmG)1 zNf&3Tg1Jc07I&%cc!zpTxL4Kk`MZwU zuD21v3#=)g=bHp`YdxG>_h0fQW5({V;@L(y8oq}C8}Zazg3&C~IG6i_{CPAL7+!R6 zX&AnZ(#17=FIlQxcRQ+Du!rE~OWZ8+x`#D)dVDJKhl2JhO|8!k8eCm0$*moA{ zq6y?>LQJutTgI986K2NC0EBk&k3M%xS3Dk2tza1;0pOt#0LI6W-P|6JKVBRWzeo0n zcZO}kB3nXoL^mg>`xV8-_PgFs5g8e0#0eAAafi(cb3paNg~5TJcmP{;f(i?aA~J@Y z;rw&qsn08fiW#4-cR;IOtfQYZy5d3Fp(g5|pvlw73dQ;Foonc>q)-O$MrZ?dhqjH> zB9Ukh?<(4rcHH_CgIzPTtaownzKMc2?fV!TpZv~^2ZHyQb00~p!EnVjfPM1#Nwo?G z#&8`_B6vEeTHB#PmM3n<#<2*JULXoNg`5H0Y|B|O1^e>tyo+v0U0+;9yQy8La(dS& zS*uqx*$y9}Bsc{-pr${5T{Y1jUEY&gwUHCUM?r+W7x>$_xC4CFpGAuVc~MvJlMpxI zt^sh?TTp70)bb{tIS-`yCMr zD526e&*7xkgxj)TMM^&uH}$Qjy1jwSmbV^NcSLaU+GO=sbuS_}(@MOYP&<{2ha2&6 zrCU|Uw3Cm}?Oex~CnZ_ma}Dz4iM23X=p)}Q!S@WkdQ7(U$V6;zTUO|Sh(vZsXnRGe z4KWJmNWu0-v6Iy4l?a!TYZr~S=R;V&KyUWEW@rvw=$}>}IIALQUlAZ$!`6rFHGka89`ITjji@#f^Z!%ccd^IVvxoXs*GVVXU4A-OM()yY%es(#r-pJ@4@$yQH z$f8Qo6S6+L=gCui0`umg;c3=_yw8sKp{dLwgDtM6o(r3y^GhC+VyWFN$$wNP1$xp2 zK7MA8PAg;f7@p%TeS~Sw-1179ReWFO=4*#eK7D>=|E1W{#eiCRybUMGq|vK>-gi;@ ze_(QEX+4~bDqlo2)Eb8+5$`L18=>jA8jGC1^vLb8#g{2?1vskHEy;DsJX(@0mReFC zsWW5f(=5ndu+@LupFLI62D`FRAM#jp{md5kWb%hzv%-H67Lvd z^t=SsZ#768J!@BWU;64x^x=8c6@Bw_^PdLds1I-}e9so3c4a-kQO3nWgdE3?K2`R- zt2!Kb^+l^Ik{%X{V*q_@~K7*rsZisHmz z;M}aSl9X=BP+@?z@P0~C^nBi{-l(tOS*JJeDJN{5jy%p}YdVi%ZC!yW!~%%tCmBdN z+s7=~_7b`5g4r>WQJRRo4JP_Hoh-|3#4*NLiH`6=`?6;Zi za$;M6{dNnm-(ClXZnI|#e}v9~!q6E-n@sP--b6<|*GH+g$>wLF=!+|tA@1&wK%#?U*z2(r&z-L6o9gbS1ndcEj8L&arkvv`}Q;vc&w;*4o!2>rQkd zaLxNy9z833!^AL9@3v`l&4@#RB6F!FJ+Q|-E$D0_?^O4p+gERguh$m6-Ae+7vSN$F zY8d;y)ni`ebBJOx5Ltcywe8G!5~*sZCYGyFt$%zpr6lR0!fQka zN{PIM66VYDfj8Cxr<9V7Zo?3iBt=M=WG`4J03{Sg!q`gIzjC&Y?~m{^jb7>bvZI*L zSGWDes>H)Z@$vY3*G~)>9!5Bn@Xw1GRX~z88z}?~h4#=Sdyv>Fc`_sw-pP;|P{N== zLfq7w4bN5L1Nf2X>KA5|GN&;-j%ZU}3vikCJ<7kP^JZhqke4uBm`c3cOVd$1O$(6f zs!>KCvuaeDOv6|>*rZlr5G2fp6GH~Z2W*{?4$~Q9C^Cp{1y+EBH4>gkp!iUu*g2z+ z?^;cj->=MHx#xOJtJEk9)@%C)RoO?kvQ!6YatlNS1O6QthULfY#T|y!S^M+qVXP-Z zuj7)Sbgd;4P43{?V6#8qwF2*3lTPfMquZ%-HRga&D$uKc_`nxI;_ z(r}{Wj8=!)Tg4)@p)p#G)@GNL^dJ&w02*L5V#bkuL12Yw4~;PJn|+EPDFT>&7W&iT z84TL#Jc^3?q9~N_>LfxWGyXY$LJ2tG7esv%(SmvL*%JE75O#Ji9rCEk-H4FZdredR z>!NcodxfFSnfZI%(aq4xpc^7R+ zaNUPxEr{&03M824Zj8}w83g6c3|>MyXiDp1W*ZNVx>LX_6Sjsfr5K~R_%>5#v?=Ay zw_;HhCd^Uz6bfdPaFO8-MPcjFVaPfXEi70Xg|aeqw=LB!6-jw)^nNExJl4oC0gilP z@#C&6h6>N8FgM;2rUttS=Oy%EI|RRU77X43V=GGIXy}4qH`B`FsA@(@k{F=C(ZEBk z5nv=|NQEZ=@=rPxiOoMz9j1z4Ldfhvk=P3W81Li)(7_|gv%Ieg8<0sgUXxu76^*Iwevw!b?u`P!BE6lB=gd_M5gf&$ zCK0SjRwOT696857KMOK*=e*KWJa*QdbG-N@@fUzEqE}$H_e7)KO;fp_jEP6Q)r0-s zBAE39CioYb8xltWKi?dB)Y&4d(er)S(B(=C>e#bn%<0k0S{+o!KRNVh+KO4 zowX2rko3t(A0Uo0IM}*Nc9bBynekQG#+N)pZ)C^wT+GvkjN7NELB>y`bRpv*ZigYV zjYVTAIuN5|yLa&iR9;7C@kj5*{|=-2jT+GZ5sV58X8d;;)!*Bd{-=---w%1Ae}RPf zu^hO6!|j6p4uRo;{v9#=p9aMHQ&;F$NQn1`?b&Z3A^zV6#P=WTixI%`6;If2zkp^C zY+ua3IYI)z4G8)x_3eK}5fp%8>3DxZ@%Vna`~40y_t~>L$rp}6rV4m+8srN#+bs&e zT_B#d+Fv#v!w8<;E&0P;6|0%O(*D(ZIcYnv<(PXas$l8d&YzmuhqGVBj~sW2w}fEx znDK%AvaiR9355moGW4_g6bI{N%Qp@i^2A3y_p56UPN;Y)mFXlQ?N}<_y~>T_@!ib| zpvE*E6!-j2_GK~E=N!eh-VCl>M}!e#SDz%ZiJ-g1t&vN$Up)6K^sOsBcJW#4hKeY> zqb(z?qRJC)7yw_nA_zA%sTegW^dP-fx8`7fsV6Q_I`iJcQd5W@CPzouIJo!jy9$rp z)zd^5TQ+&T+&sP*UqDpFq`HyiywsdrKG@;uBZv6-ho8Ec@Ww1(7{AGsSLC2E>)L2c zub9YAf%O>U+0K>+@n=`}y0&l+JkE+At>$*qdLgY{?#ZUQS6O8RT9l5FrY&yYzc0#H zAyT=dKLyTGb@_@+qeOxts}p&n-<>d}(nVyXaw3t?pfUACEr4&@A(G0L4UXV=`R zFpXgfR{jvd(qS1C4R^#OX10D-thD5?qS}0Cmk;I3M$)c%u<|ORS8RVCeiu)^??v!| z$=5k0p;28sv~J(bBgO3Hw5~H$-Z|S1JM8c6KK9S8+-%sRqVK=v&c4R1wbR12qgt<= zKvItHTAM6QZN~0-tu#z9<^H}~#ANvh#$SlYOxoVdpyFa(kF-I_2dEe7U z?x-b)jin?5(l4l@dE(Y)tbF{6-*qRIcZIx!UBHn( zfBM?XC;1O4_GOl2E*}K(`JJWq@GxHrr2f*<=VNf5Cwu+*9}nl~w(-?fTN$y{)aXWWq;h5+t&1H^xX`eY}@7#-C{? z-EQJ2lD6Cs{)tQ8prFIh+Mtx9^u2peY|QuRI1!DAQkCntHg(&jHNHH% zp?Hsr{Bqe8j^1l#M8s&SDG~m*2GH#p`a{QW;!gTw*+Ad#sX(}A-sd4!xQFicOJP^b zC|Be6d^QB0uJ5VVK0QKT+yXl5`3VBdFSvTI&}iWrdP)`oR1-Hxup5hN=GLkvR>6Ak zx9@yaY-9`CBPi2zc($7*j0^GDM$XXrhw~hmMiD^kvD7t#tqGczyt_de z=q7G>Rn*sB21R9M_@Yd`-56*oGyyGzN#twLQs2O~+URUCq`n5*{HY6qkNMnL>p`Tr z4s$|?s$fmm$v^>855@M#a5em?Ll6pd2(S+dWtwjFSODm6YGjEILkL`|R}rGnY^9Q3 z=SKYx(1@g?7IlQR>`*J$1{Z8tOs`$wwq}bE)$-s*Yq>m~k@z*&e|2DIvXwh?0y=ij z3IC%xC$=7xBTdk5^;T$6^4*>6;!<9 z1%j`Z%J-B$MWp_8$BCaonx}!5oJzboOJ>X4fFB^H>vzP|$;?N0-!U5Ecmp zg~yS?r>Btt>?ox2Bg`VuS3rRs8{w}{W8y#!-kf<6ONJqQ_dUon0bw|Je+4ba$#^tx zY5PPaJ!~?x?5dUyvQpsw{`0wmD}}iEK_;w{5-;79X@_$krW-0SA^W-_CJawgD6pr$ zVo>9PmxSRqEX87oomz>VF7A#;O$%zsIGb@u*s-mpu^x>$4Hj80P{n3XW5yA&J0AkY zmIV^Jp9OE1Y)=fjZO~~!*)h=+MRwoa8ul>)k3(bEQY%R31^ah0lXir+z3e+BTE z*c~focB-JyuV0j&#W!B8Y(d%cQ`L%SY0O!f>`{sw#m*5k<6qtXdOulI$&isXB)Uyr zp3EJ93`)-dfhUy_5O`70p@_%#l-Ls-kJVNRmOL=m{%bjwN29?K;x7$Kwowr!Y zqrM*Yh2SH1N<&(gTuqu-n4^x4IM{+kxAh@zicKu;4mM3Jo}fN6MQK1}Z@i74YJx74 zlWIX)$&Q)TU?K19v>+7$wgzd&%8_xP*ij8Q1wk6!=2QcJic?;1A>XCH@>GzG5lT7ZGEm=$@i*39S$g=4_AXW(r7M> zrGe+(OR9id6x%}Yc#$etr7D&vVK6u91#V2PPAc*e_E4+o*xXy}p$drnM56}Vf`RrD zDDpK+6O`5B2TA4Xi7sj+|H%mj8l_H{D<=!78ZTp_Q(fW3&=mSfo@F4sDnwOS;7a|= zIm`R){u)dcoL<(K?pw!YV7=MF$q$%ttf*BO{y)xM(65m32jCDSpGaNFY5u801pzb| z{u3Q4xD3WqC}|blbuJ|CCuYGl$N zy;EtZoHI^~TbDmrN^JZ=E?h!Y-Rxp}xC5ba6ZVZgtbwgX)rz$R?febnK>KZ1;d~P$ zNG=>{^-`%!Lw?fXn}72o6?)eA91}Uh2Fle&xW$m_iafv6DuHpN0ZGq+vV!`-)A;O< zOc}dplv-~D$$Ck^)(KK04R8{r`L)*M?N|`!<8*1oreZYI?4{{G|RI=z{!*{gV2C02KY||T!}t%&R8PE^i(fLp+8Qf zgHM6wt(ID$7pn6$JJr@(iH)SguPs2gOocg0qU?oe)O}v$MM0eqgnjI?2hcoP z|N7uXt9ASY(j&6f8uZRo5hj|kIq)f?S~;Qy3*Nf2A$B{rBY~oiHc<4z3gT#iaa&Ef zv4TEy1sW^p2E1CaCOy zcJZL1=i~6Z)!rDHNz*pzNsHVk(j)p@Vcl62)a@$X(TLIvc5&FxJ@^0}(QGacGhtzAkAkqkJ+2w*Q5oRUNZ{5+~~O6AP83fM6G18j$PRS#}lS4W=MV1Mm=Rjs#4`Mn?b>BaLvZ zsRda6H9wc9bFg9a^L)B7FZSBq>cSfg#F5N)6=#Zv!Ux`f@rDH7#xEi@o2K+vLMu0k zuK)s7Uu{70N@&d{F^|)NL4%?zo*fz(>zStfff=)LS6T&Y@=Tr~KIeG9OWrL8Z!no| z@GmkS!9!vo@HCj?Ee~YTHgmj*zn%$ulFv+WW0q&;Wazq8kqfMDI z062`z{9ht_c%0-F@3CUgI>$p-TcHzuwfrYJdcFJ#`8xW_t#zRPKJy)eg0{H~4{Nzs-mP9P(SAI5-pMbdIUPNw?Q0UY9z99I_RR6!jIH!B6-g zf6US`X6Bv%-+1j!r^A=VeW>#t{d)7Yx2LoM^sc~VMNfRrr9N#fzi%SPv0IewoVTFP zT`osl?XN8W8+xy^7KrzM*q`HTSAF9G#lB5mgs=38{#XTGZzOvMalLO7IhJNNqw<_( zKt2;ms$92|#oXGN>a2Zzk)Bj>86F$%mXsxOoYCuCrT>BV{>bk3`OV1m+`Y-o$lCgp zV_e$RnEu})S%0TG{U1TH{y#*$`Tk>^Dt=)sr|K`T2+vOowBNxZg1>`Bc=&#WMgCVf z4Zi@k{Rd!{GzXb*1{k1pkzeKg5 zf`WhHo_)2|tstt|RzW*Gx%JLl?zU2$b7Zxx)l1^%0y<aw^Kd3l`^cnZ}Dbmf?giJ>#3CzgXy+%2{hRG`ev(Wmv88_=hsPj`xkuM zB`)nnuf)$PJ;P2^UaQ z$XeYGeNZ}P9bk5D)Z?Zdq-8>CtZ|>)&CBD9wLsaubV|Vsto_R?0G^vR^J!g3nIp7N z0?$fSh>L1oev93<9!+X3eR-q*WCPmF| z2^ClEL-*mbQa#Q95;K;&?wl=vm0ahPw!?2K6d*pNWjNZLcq*?V_u zoWmX3^UE%|%=Xds#4{x)(v$~siRnC`hJ1|2Nqx0lhnL^?K{EwoLRCOkrpTRYKBDya zcEQ_jQpM}n)|5D0iN3wB_OWd$jZJg>_(|RRRM_|R2Tc!M?7kHm3wu^SGJ98{y3{rE zB{=_q?zK>(J5Mw(;6QlsmNt-&@5*osOUu8!N@{!UE)4`pw2NP0xLQ5JJL9nMT~}_5 zDr{5MB<#k1R92Gi2oKE)I}cuopzYg-R#T*D17{&vQSFuoYurJv#qysJKhLqgCv_@A zp-0F^mW?}`C)R4&Z&&$4(|7xqxu5XHs=4fmf=k_>A65G&<)iGD1b_-xKn>e~$) z$_tDQKLM`T`-R29pL=Ia>`8>dvp7M*A1q1ppmAW7s0mi3ljB}oyaIC$K@|3YRuFK<4}?LLnxKPLC<)LH zKoaH!o~Z+-8E`@gnyCVfGrkD>2ckX0S5uZIVI#E|p(fcln~*m(0qkpAy^276nzzZm zf3y)O^Q^$iejI>Y(I}fZjc}80Zi16>2F+2eKpt2CJWUOop=x`n@ncJBqEQ{TnrW^X z0&=K%W|-(*fO~QGE+VDZ(KVfe!(lVX+zMf@#fun6D>9psiv<)b=-s45(x4jFtZb5@ z%Ne#Q+-5W^**Rv-#sbMyf>}Ai*D;Lgt^xTmh;u!ncjwxmeE`ewvp`*OoTjQ*M_mCW z&a3Mf65w6NpT9;}CZ96%D1AGE$}B10niu6t#JkpPX%5 zP)dN&B>n6aknbc8LZspgp7@v1)(DLf5a;yVn$?HKGzc)o(jTCrpb86#i9u+-9fVd- zAPd0WR8LU#eW4W}_dyI$OX=81E`n#tkX?@?#Fp=wdU1U;*T;5&Em}JmuZ>w-B#W3n zl(bip6_ z(b`VZu(|YxTi8>DJEX68{oFav(7^cna4)opfj{-wf67|KLg(~|h3+_h^YP{Jtdp2~ zTqiLA{>6)pF**Jfh z`Hzi0p`;Or-tw1O>yK#J~R{zeq>@?^bDQtcEf^6AS^w=WkjE#e8!wdOb!Vu(@(fDv9aIcD^A5Z% z5rR=RwKVbvl_-A)e>rlmSkF?+gjhY^pX&EaVm~c&zJs5Hzkh=t)?Jq89MY2;$Bue` z#FqQyVI%)nw$(c4V4L^$M6MnDLF~Dwyc_w)`1*ZR0<-++9ulR7Sk+nNf>YCqL`_%a z>r;aq-5w9=hYAcv6A7NVgOf=!3EYQ^4NE~*mC`erW6Bw!41KG#7WxhfMMFUY1m*D2 zFz<-ej`;7o-E1%K=ZUJ^UWc9Pz@Dyzz@S>L5A@xh0v$A<@2upF#G>JS-%K#Qol)$d zQOGXEqcQ^Ob}TkYc2%#G9koZD@o`u~q{+O$ovdBYn-oI^n%qtl=Nn7)+_2i*LF_2@ z`5=UxsuWFq0^XG6WS?_Hkv^#JKE*rtIWGD~53&JXQ1E-BvjD1|Kg*A znrpY9mZ-sgVR!eQkF?}UWZ(oq5W|vQ5?L z=Fmz5o#Kn61{%dwbco7In0wlKglhRJB7|4oNSdBmdiQ3>+VW-~W8d09!D~&7KDuH? zW+N2k-07Y=x1N-6T5?-oMMy>E+%ms^+-EYJvex5!{QjX?Ly_Kywu;z;#C-l^Hkh}0 zWLHVXbBL9;)p@`9gwwCA6rP-{m>u=YWk_JL#?%(ITODltgy93LXRi#Cdg1APw?`FZb2 zJ(%^l+v1QewK=|M3v%oI+0nt6WmOeQXjZ~$PF>Q^{zbGK{?K}|e!nyVgzy~r_l*GY zb3UflJd_?d)zA30oGk>bcuRozBDU+qfC%yNY-U%lv{r#_f{9KM!JSl~pW%98ub#?i z4|m8KYfS(qN(CDj%`XSx={HXdX=YcvZ6Gws z4|{PIyNw$vzkI8?RNi_x1_9PH!@gUbjGE?#hdn~z>UnaYFm)$!V|)gQ-f<_DNVh^? z-bhjdmmDxOCpbZWh7It?b=4^*%n!7U|9OTO{M}Or`%LNXGw% zRyN;%tS5&bitWky3vj>(dUF1qR`#DQFn=qDdH8-UhyQmqIv;=w{t6uMW2svI1~~Y$ z>*O~<{l{8i_<6CeZGQm{pjc(^f zs=oyV;r;bU{g-Hl;NK0?!f9JBdW`19BXBKyJ#n6%ioCRGo#-QeyVR8O`Kk6}Vxgi= z(Z|j%&T)U7AtHXr_I9C-xwJ5CFmS!(u#$4;utTCI)-b}-iYqR~%M)nStRJoHEZh;J zS_t=vbH~-VO8RBG%v@P6E}VMIf;7hQOD?f0Y6&x<(_p(oX2%e6B9=% zxCSYWW!RjXSz_4IuKs|Z

MXpnEHUwcY0e#f>1Wuf3+P+(+SNd^49_e39Aby7r_w zr}ALUGdy@3feJxqXp%}u*I#ctb3Zx5Mtw^k>uRrub+uGhm- zl4gg`=8aSPQ_TC%pS}LRdyWbXTclgS5fjkMP2@7Ir@YG_=<(Imu*wIA%UwD<2Q>AEFW_|s5LPm1`bJ-M#cAX zZk@BJ+f-YvTYNWrMRdE>w_3;Vsy~&iL=R#pepYK+x>tXAcdw_R)<R^P|Kv-rYmiFL=ZcC)emoDM?8WbjC)lLk~x8 z$2o5jr|c1q5kRE4dBV%M*O1wPkdcPkSKg(|vqC1*B`M!HdA zK~Q2r8l+RDL`pzd1Zfc|=?=ep(R1GOJm)>{cU|B2{PlWWyE`*G%-lQ9-0{1Ap)nVP zqI^R-jOBV8zOMd2jo?v)HJ0d0$~E{f7AhamKMJrl)Ce-peK=-*g@WHNpkU%HxTUP# zt4$WGT>8ptmB=UDZ$Zo1k>N5!!0Ol>OXSSrp)KP4JWs^F%D|Nud?0P<%0!3d`7&d& z-nOxC<^xG1s!gV(osXFCzwzPVAHlCH#g%g=$(!sz=0_xS90?=Km}!$t&b_wj341BZ zl(7#{$yD?W*V)2<#Bk9UTrET6!DF11+3Roa?z6D=-t^}<+lZxk9H_;!mH0JzME<}m z>dihLU++y5O)=)gZ^>1vwBHoAy343l)4e-xwo++&*;*_?_gOx(?c+`NafSU{x49dT zof&PFZal)As70xxDR6NGueNF(E{k7s!-Bznf!!{>_Fa4+{8BCAd96fclDqpELt~pq z+m7-=%mg=GsY@5SzHR%{t{(foc4r{dC;2Jz`Bq6t5~jnmzxT7jr#N5eGzA$=&bT+8J8>1%?c{_?NLf%)+5v?Fil z=fC(GaUJQd!2=g;`{A9PT`N{OpGWWEcM%O02Rc0c9Nv38TLeo#5ihO>yY^F_>Pkr>ESLjZSD)m_L%5k~s=Joe&gT5b?a^80aY-dY*%BLc z8sDBi*Gc;R;ev=mUsduT^wCLAv^aF$cPwK{(r-2Pvz5bSt?LF?Rqur_4UcJ)ZdcQY z=Mz1@5R#%mx=I){GJZ=<<56HmSZ51@V3Ou>{NC42`&e~7LZO?;-<-I|gt-JWib1jH zZ_OjqhkQ7~q#-W8f=~4pYO4v-*ngC)QpH3gBAji1hMx5`a*+;Cw9u?A%HBWofnhuC}u?o7JSn~f$M1?wRB zWisr;J1RaMcP13R{hgOYT&YisTI%~r+7t%}jI*Z20uI6s|;-{q#QK>i$Ie|5-i?@L)*0xPF zJ?m8VQ)pzFp~jA&as8>R#>kXEcc-k5-=6G!zy7P1Cr!ZX^}6PX_ygcj@&h=O)BuMP zJK+q;A>g`HFIccU);F5BY%hfG%fMmO&zu_^Cxm83Fr#x=#%%EES?gF`JY>O8I{|V3 zx@Afx@sNH{{#PU{N8kfI42-=s993Fb(K$R{2i%{p!b--!2O`EeNzwG2b>=?;%%>)~ zdxxy9Bm0MZpCYPrIpmZx+eoHz7xmu4yENM2VG1R;l$})gWgG~M6A-@+P1(kbrbpGC zSL=fNt8^k6>rjH%N>Z8bm3($852GqHju+MfZWODDGDl?>yCaN*lO(%4AVVR)e@7i_ z@z8$q$7{Pb=*r-)0AI=-jhnzlflw-7c9bL{4T)Wf`Utr?gk;IO|N4%ybyCa zK&V3j-7rbUhSpY84Pfs4;`04{;EvdT$Q zVT+qoYC67xHc3-(4;|lrSKXyv2TQeDi=6p6eJXC~0K54pqgXZ35TpaBX&16zC|V2ghP*y5YqrCm&$ z%pXID8fEgdaDDAcjwjt!R=$7nP|J|}mYT|?B`rGRP4IffS%R%Gxm3u0EnLqh?D=Dr z>%p}Pq10`)=jZ8r;r^T@w`?3#6e19^qLIsdgx&sdrtW7flkw@GLH`UI^i9y9&w~bi z4ryl9akZ6gqs`6gP|Hze1Bt*=*T)^bgeJ|aLkWQ+J%3E_A_5Ts_>5p9cn(mt^V)f} zpfN82jd_WV(?*yR649~baisxTf^i3%fuSM5%4Q3Rs7JeYNCY89jE#KH*f%OOJ|mw`O?Q8}Hs@ z7f5<=`7#K4BP0D@d-EFUcPv5t%b$4dZ?co>^+e*~4IXfxdomm4_2h+A{S-U<$8h^= zr1G8Pcz9z6h-;*q2KQ>!?ywOol`?2vb2dC1*ti|JL%!o|wdN$_8f56%HDT$*t$Ijw)!Y z+RS^o1NwUY^Af-TnFjUw*ISSd8SVi`3BW6;Mzflpo*eF2S&$pq>!^|Q?~&~_3e$0k8c;qxcXYW9zr zfx|z?5=Ni2JB4>=88Q49c&M#5j(9qN1i^b?y#%UZ%{4G>aGj z=^dB4u?n4>fi`W9Sq*4 zU1czJF#Bb`kYp}Q9SoN8(Cn8Rj*262QuhU9jNH5fvZO@(R3dKIab2$AynOVNb&?G4 z75k@#tjC&a`}oJFl6&)Z{{Jn|^mnY~e+kg^Z+6XmX9;ZgF+_zw+?jac|1oJ3oEIZ) z`UNxr1_oFF3>97=ZTcsm351OqIa-)G8~)AomlyUQQ-HzwFi~-!G=F7-@L?2Spn(4! zMdc47&)@J9Uig2ET?7*X?4sYG&L5WwCX8`x{s*K9WX1i%rQ(DBwN(ETssrPN{#|*c z-+9$%;X#iRmf>DA)-9}vq~r8Ee|0M=K!ocPuk z8iI~>1H}u9tMq*jcYYYU^&Pd&NnYRV(sn!N{e{Y1B$xDN%gO4Gn=K8;Bwp00?S;oH zC*wbU8uWG<%f&j4;-4N2#U`K5)ENF~{yAXid$332TFPN?|6;pY`piNDlfhxj`tjkH z`a3I*ZA$XF?znWEMHt=H4|f;V^jSW%dLwywS~XirgWo9PWc}dBk?M@`#Qau&S+=>R z*Tw*C$-BVEnjD?o3x;dH_EAb5!Kxi?IFjqa=KC~~awbus{dCi8+f%re?OwmMP4MG@ z*ny7rDV3i({StAzV(X3Q!LbgpndaDT^nPgfg5Q_7u3k!bDVsB;B@6i~jyWy#rN1!n0m@G-;k(}NmPTk8i61}45>V&k`fThbjey8P za;{O*2vrvI1xdAw?$=fIlTnD5Lv!NH81_O`LpWD+JW(nR&d4{CBQ)*jS}%zV!ehvLb*y_&BUZ{yP=djk%K`2Le22q@9fUOSLMR{+ZpYOB4ob( zSEB{t3YphFg;2e|L-nio2*S5T<5q-IpKLs(gM6dmy=|)yYj^=*NXuD4_eAYseON!r zBR4o`RfSxEA@kAo%-B{33puGkeqX1T_H7|;u|1^r*-CU)Y zl-J4w$qYTYfrcnSV{S-n{yD`0Iix?-R1MudUlI^? zLmxUR&z@ab^I}6Q&}L}T^n?5B`ezRQm4um0nYJ6z*TryM6U0aoeRHvun+LI+Hx+U7 zJ#)i#S_ZMmi?S%BOvqrkAOLLO$|E)yZhjWfKlHX`S(;bAj-v%pJwX2eqX1Dou-!M; z>{pX=zn9@F%^OL|Vun(*^-8nh3xnH5rl~hBa19zU@P|ST`6=5ffTKz-TIw(GqxvK4|AZgO3)L2_U%G`$FAC zhnF^D1)=yF@&c$0{@1LjUkBL>D{ehPuQ%!JQ!-sUb!Xu;kD2X=yzcFE0Z~?|fAb+x zF$?XajQV9O_9lF-nT`Mxx9&WI!DbZ?pLo>?`DNk-leZftH}6>4hPSxsy=$TCg1U~5 zM|mcTg=W&E5NTO^FG;SxRc#QD@~j=M3g4@tYkU3rv^U$89DziHeEr@}HR)G9psQO# zVUQu;Qr9ns4$pL2V_Udl)ng@hL)_AkUKiguJ7nW0;wB=FuTxu`qg)hsbt^+r&C$J%&D z%e@_|wY-oiuW-DmMzr5a?A>#yV5V57lX#}#vhskI*tg|OmJ3V|suu_(rK7f;W|uRU z+l1{!UNawAd7ZBJY<=W%)lC=dHyk?kiT)`SD-^m_)>E}Q9CY~6<55`r9Ws$(-tTOA zGZ*n#*(2SLeGvYK7il*$yiaz8s^5Niu(7R}W3Z}jYsIMWrT|yun+EOPR9F=4$GBn_kG1~frfBU# zFHgs2{fgM-?k17Y`0d9A_wwVIe#!;jhO>k%Q89RY03!|X()1P7NZ-UJpXV@a{lsA? z-3~t6z{~OKyqmO=(b-sopoLk@x779iaa}qu3SVRKyeZK7MQ3iaPqDkD@(w=>Cjj!%b}uK_$BhFVjz94i@?rY7zd@eA;xpvvQIC+yIhX38 z+Kjo6S4N?O`l*O)VfdcZYx}jNZ;O@qy$e>7XYf$!?}{rBQ3Qt8#3T{7TVZHz5;8Qv zl|WcDJWLS)K#l~)NCfdSFkW`Fd8$7|bqU>bl^qRJcIedyKOn!>d<}qB8v0OffO8U6U!xIlO)Tt%86}-05*5>Aer<%vmrf)hTgFt3x~$SYD3OC z4~KVZ&OL*2Lw1fhhKHK>U(7Yj-+zHCrg#5Eh=-5DOV2q&2nUchF>q)+LfwobmEW^a zyzD${p>R28Zi@wslUo$-*ZL)s+QpMX8oO_a)YwZI&Nk#cmbt&)pG2DP7#FEUIF;2oAx;=Q;C+{IF z?XfaUA5f3IWwQSW>2A~OF>Tlp*eT0wP|IAOW~RFRMIzzwPMGG%Ce|ycblcZd2IKk^ zISulyGHJ~oCRC)y9W%bz6fx)>WdkCc{94-4au4$x3D4S(ZStO&P#L6CFrxaeER0zW zi0nyqk2mS*UQ})P80aw;OTINeSa~t?_uZ70LR9|#D1d-u50?t{;{py+laFo$PoYAu zk^WVL$DQ_*HzDERYxO-`QO*bt43d=8?rqQ9eoP%ezIBEqiExGYlzWo5A~GRkp}@r4 zRI^7AV2i$<+13~ku0AC+bxJ;S6w2qrxa8D&FMSr7d+sVeXuMGfi3CK_l5|mQLF`$Z z4d#d7?TE8xI0CI7G&bcAOlNy4rz2XgG|;*rQAXv+Nf3qK%~hx@a5rC?(J~#akvj7lHG%qhs<(~ zww!(?IOR~XkW!a>AvG)_cKXbAkQ3Mf0vmaZoz^Ch{`I$&Tp82`SS|`+xfnwsC|Y*Q z3ShaD0LvW!SZ=q2Rdkw#@q>|b{ePml(1CM*D5aEP4>v&S*qIek{#S}NW{d_HBg{3< zjy_OWSGH#sgUY=SdksM81+xAg0EF%Wr4%;+LP0j2fR-4v>Fg%}Uei_U#ZsPoD+*2`oFCs3JQXozUTf*fXe)8OJ%#e3zkP2wreS*_YJL`gXng2)kxy$@-oX$lg zJTYnxl!|xs2$$kZN-C{bQaTr5(+$Ooz%o>4@^xLvXs_ueF&$gzB59aoE%bE_VN?Ff zTfK!=VZ{?XCCU`N&!~UWfiM2!7AMnOoFKE8P}pamUH_@ewySseZ@JW!fAPtDf4(B1 z;NMAoKX%3&ZWuU#pT&xWMYE~nn=sNATxU@ zwl#A%I{jyMTUPT&(|rY!lCEcr`MQ`6+SYolHiaopx3lAe%N zKk{?-8?fWIqVpMuE4II_Gh0nHpL`Wrp&9z3$lta;*l$0crShtmrpI;{!x*!!+J)ZxS`o-4`bZMpP z>~aNO9oz5Cg?`QXMI>e> zMARcAQW~*iQ<{;w30kj-6WJug78B|2%nxg{eFd-WVU0WUT||$DUMalNX^Kxj?z#HC zOSSb=SHC_PeiwKQ8yA&(k>oRrFNTY3O)`vRCj99hj;9`Ocd2&S=bEpkK1Dvm>(t0K z$IcN33AB7W%00I=9DvB(1azuXmf)Ql+~y1@`?uhCrczZiR&eqms$Z9ZuIIUY3*!-e zDy3KD7m~aYH4qhG>Mins+uT+O8u9)2{B?p=!7yf87wL&Idsa{dX(Ju_KcyY!QZRfh_b96xGoPXGw1D}uEjDa&3(#DJlnZ#@)NQ0;sCsde= z5-bW65}b-NsU+43An!U6!8Ug7tRn6haf@urr?SDlfPQ?f~~1f~c=jvFm8kgg4*mDp*XrUlA8P^{mK^Wx4w)1oq}Sr;c+NTBBmL z_NH3JC|18_MT*fwgRa24^X-b{tKMk|J97J5bb<#^jsFhFg8m)L`QHI#onah*aWVRD zfvo?S)CvX%QmcPQX9O@#+y8*hfb6P&KxcU2|1lyENVobE$odmAf@6q4{{Uoxl&^m* z)qhNE1rr2i`3OZDSg9%`CX`loE^!u|^fx#j$}m zgkP&(49vtqM&_N}o~O1RjGZ>z*x&1YdkT3=J3OMxBYC>Ho_S&6WM-oU-^;8>6sLKD z%H2(o$Q8!WY=`1>vuKDDxq3`J$ z?%m%Q+n1TVP=K-hTt7XiR|yxwcpIr)BzyQN*l)VB<=Vqp4m$$@Dm&zAnVes_jpy<4 z`f8qM`QqjQTUnz=|HEUo0)-M=W1nX4)A^a$j#^9Q{l1ix8MYI!hanN2q@mtR+P9w* zYFNDOhCW<<>q?aUZS!F5`i-#KlF*&*p=EL>p}AE%q}7^1+2W&4>Kw#48xcvKF20ImfIf2KAG<0kCSLxg zjr>v_x9;iwylp7m!kxX*tzewhUNv5ArXE85mEP+k%zGUoBX??iaf05rJJeDIJrUlL zFPE+{vGaZ8cimG}fAk`eVQa`~L$UZb-y2<_mn+ispwy^b8ZT@f1eu3#uzqGpfcXFPcTx=dB_V`%e$So%wq+k)qa_=!$x zqi8O84KB`2f9aYU@T7ZBF4mK`Afv}@3r$e0^LSOEVs~RTWMHh9A(dv@VTS1%t%D%r zpw$IG>Y}yF198jCbM~3$Ea%wq@SkaEb5~;1f4C+@Rvnfkq2uMG)UF)k>79{`Fm*Yc z9WoWT>%_M+rqBD%r>$|~N5|5!fIN!d4!laU~v(AC37R*`53NwxX{zU~^Esgr-$CrU9`K z6K>XjqfBaW{{V(Ek-abwiF*Y+iZIZ2DeEA;ZS#posWM0j4 z=B}XIqkO!X)Q0VbO7ZL)e%xQE)VMZm=E$xVDt7(ZwRN?N4(*oDN(8?%t}V?cUw9Df z%4Tp;g#OZ1{NX1eW#^y8IYr@q__4`!w~wLj>v>&hGZcFww3)ubSO%h9Tl6^qZ`?vO z`Tj2MlSb?w?YU)di@?ukQ0jTDF`L@1U_F`4^Ov1?d+$37+`Y2GAU&4uZA#}@?kz^g z(Au=EpGVr39vUqqNB6yeIsH?N8pHB)plBX!vlF zO!(ewK~Oahm!JJY|Ltq4jLEX5MiJCEO?eDaFRV;j#dsgBRx=243+_cQVU0X64aI{D z+I%CI@=5Fca^Z%Eln~`9e^qGslXGf*@h_dACF=$AIFVjdD_v^)m!HZi{9w5jQ*dQi~% zW#b(h>^+kgT(&BZ48Cyy!}2JzjepxFl+ibGcgu>=nX@vMYUoXsnFaDYYzV6wN+89i zjGJ$a{0<+&`W9(SDaGK%6v)fELrTEF*9ZT%Ky{hq0UGYUnyU5=uRkR4Xj z!voB_)V-a0ap^rlXVt+UwzpeKt@e!jS*WLrf{@n{f)kDOg)`Bjy8Oo-az~>1Z+Ok#1_*g{Pk<#Tg6V zscWtuQb;5{8_8C4`J~k@5oAICAoE-5$>*iiFF1`hOfH&e)}V)!R>P~QLvKHu72?_z z#e6O&v@4qZ-p57Fp`EDxlWn{Dwpe2%id5huT?6+A!VUnnzRyFbZ&q>W;r{%(&rNpw zZuZU4{v0(4z1gXW|xO`m;FmvA|y+PQB-o~Bvl5j zKjZ~Wj$-@mO=83|Eo=ot#LGSAid4tKOPw-n);v}}XY^-!dF!f-$4?n&mK7VI$68Cw z=l0kZE}z)EqjTPxB26vxEayLOc+Wp2gw)_rm%xhKL60E3_(+5xoO>PU7=^#dQYI`& z;3vMmhIi;iR*Ptwh3g2jmXvtBSG_5~Qmp-9nWY$hkefh0zH62+f^-*Ez@Ods`{L}K zTv=@ynd9T6fS{f&X68OT(MzmMP$-SB?68`YA5`RMQqq0ET)fR=)fAqCC;Me)*v!;Yftot-N(ZP~SIhwiZubGfcz!9~+ou%e;s8Sh27*D|iOtn+lQ)2(4~t8Vr6hAD`J8&H-{ zh)8|DK8$_a1{?+@D)kwmhF{)<8=Ue3i{Y|F+$rvrRkDm-i!3ea8babnOl1$lb$#Mo z{5vi;;(jWtbn_365PLYL=Ef z6`GmF8atIHmRXK6qEp8&1taBF7R1-C^CcM;L*5gy+)v#~b8KHE#@h zdYoLL>sEY?M0lRv;fO(T&El$YxF*;2Tu^)ul%*zqIY|bG?(hehLftcp*iy!sJ=60I z<$(e%fRd1&6@I8P=KX0x-w&&gF((-zee|5A>92HKZ)PP8_@#MHiqVkulNMV?kLF$- ze{K<>RYeSv^!hZog`)0*#XZPU&Yib3x;`pRHe1L zdbW|6Z{cE$g|`cJyE`ieD+^@Q^vI5`WN^6MtE#Y$ZI&J8Jat1^Kie#^ZYtC@EVS1A zIb1NJJ6l~quD9m`-lpdZ$entq@^#_9PYSA7r|t|}t4yN{bP=0Mn%vc^-5SO44c7uK zZa2-UA79+OA5>Laq8kcy7o#^0SYxjl?Slv<1%{PA=rJfy2s6($e&r>yt!!QpN2^T{$Q!2a~Hc;HJ}G4?0k zVJz$KBUno};QrG@HE{oLLI{B#7j3=3)%TP)h6F~wr&v7VzUrzwB9`iFq>{8KIf7-K za;WVjU33296$8qb&j{!d(i2ot1ml!a1nLCzQr(kS)}xr6tg+zEN7_!U)v<6vWw^fx zCzVuK^qY_hxWDCNaGuLW*loMlDCD%ldzhDH2>YEPY}jJM3h4X84^t(`pU4j6i&z&v zY8k}}bUQc-)3sq^ux1&ysdg70d&PRx^cfWX^B3M7vWO77Uh_BaCT;8hy$gfUm927- z0;d>CDM7VDqez5jx7Js#=*UKt%N@Mw7&Qli&#cxFee?zP8Cst>4rD%U9U}pNw`leD zDrutowFa1RgOiHupCmF8u-3uQA_XiL?(pG7f_fI3en+%n5_wLLpd>ss1>Enl6Ct)j>gEkAI9%PeS!Ll~R`;pOX=k0fJs8-#T*$&LaPTC7d}>!FfjrF}s?a^lviGxQai7Pk z%d-1dt-V>yTx{c;n4tCe0G*a59SWrv9juA5bRHDqv9sL@N$01r_1Kw5DlZR3*O`s!%j#)w$^? zlwqaY%9O>KHBy-rE0ZfzY^4UOJKs9o;4AKQDu~q_Sn&b#w#ELQB*<0yMITKpcpUge?XByQv5&SHUBZ;9Sn*Q-u)Xg0t3Rke?mqC{;^bi{}Ltl zKO!SSP}sjABRUAP&a1xY(%OD(y1izpi}IUMnTc1vUJxpmeiI<{lkWa7f_uT5O2Iu) zjP~2o^3brsxZ9CN72$8kXSWLn<-Z-Dx0ieU?Ec;Hng6YU?@?#(pQuRx%axO%jGqSF zeRW~@7~WC$FW!;eFW%7_L0|DN-Vy1~t=@Q^6F+xfA3Jr%yTY?9rfG^#h~P6sLaU`T zZm5j80i=4PNO&5GxM)IhrO7i0zjFz&e`-BpN=eu>FW8J<*56|rd2!7##^Ls71K)RD z!pzBE?jSnY63d0J1e}(Ul|Kr4?P}b-{kbpq>B*h!PPS-xa|s(s50Bj4fjr)FV+U8^ zEa+rj_&e%1`VoB{Pu}`=$l~;M$?Y;+SL)ol%AaD}#ev7SaI0LT{L5}yj4mg;++I>l zdQ;7_rMMVvpeIA55fV9&{;Qtsrcx`XZFM*+;Qlimoi{t*T`K4Y>yR_K&Buz`uou93xA4V}knHsQn~kjn2|K?x7QnT8vouZB z@K9u=`$T;&f5u*SdHyj0cO~l)u94)_Za4SpAC9;&I|&wt^fRd(0h>J!0U?NvLW=42 z8kjtkoJq9;lZOvCdcZ_LB}lP#x3yTA6HB!52)4lbaU8gx$L55;UJ>0T)BHXsSyuPi zC2Rw!y?1*zxNF}La#$%k_^?{00l}3}4{!}X!C{(dj&5shuvBEg%~gHd`odv)RDAPb z?5Ve{qH^r3soU7qVgl4}?JVC5*-+aZ^-mYqS+NV(K)2{b$ui;`f6jE?z+eq z+SA6&OZ$7xN5m(xW}~7THaGg`n(+#Jsjp;Cb?9eGnsxbPkCUVdy7)ZK1iC8^ z$KJROq-*eCQ}v?m+}3FF#76JPrQ5C(6${N{w0=SZT+S0I;?|iYK8Auhi5_kc|0O)8 zCv8O3hJ_Sei9=D0okcrg=cef_l*k#qV;2LN^~Dv^-6dW1X_NGNX0&9l)dAuRxrrzZ z2{vSjE>*vRSDCdiFWy}GC3(!=Q0_0y)d!%tqCN?7Oi$pg(JHA}3XAK&IWRIhxZ%ZN zw>s~-(kdwie}n!MmMLCmvC&F010T^SP14MJ$F<~E^CLX1XzY&tH0+z}Czn&t1cgYr zx;f>A38N7Oq3A~5;5AwHc3*kfSzXEG4dpMRQRJMhF$?6c+VAob`S1zUJqY6<{2WQY zw&#S9WU4|pI=qmhS#h@;8+u}188=OK&bXQ6JPY>cwDow z_{TJ+AI*C=Gv=1%%?-m$E!K1Lc=)MW@;sH;)2r9mp@Ojh4b)Q)Hl_{nq*QqpC!Zmq zm!{m&seh$O;JU!fdKo(f`bg^=$%0tuO_g<;k1;Ciy)~}G=AuH2uZWXqhB+YlJqAjl%Vs6n0>rq7qHx+w# z^ymQe0_3Ae?TLm%+Q~B&HF*8NMls>!aF$n~ua5%&1B;mu`crm4`QKcxB%a1PIVYKm z$T(qk^3NP-dc9Ac;@R_LKVyn#$EU^MJ3@}i#4}n0N8&Pr9o_1u)wRT`8#>qp?v$it z^lhei7x@gZZ<7}CZa=Rj_tNg4%DB39OUs`)x)CdwIQ^0i_Qi5)Gwh3MI$)Rr!5W@5 z#kPzYGH!h;-F?kgMiUF^mHi~im3Fmw!lPtYeLzQu33YbGaw13#>M!x9a2M7yZN%I2jXfJ)S(TaAKkO zVkfhS9KW`li#*w64-%N10T~IE(Z2g)-gNgxbYam?WqXa)s^_J#Xg^MO098O|(+$jEs(Cwv189g`yoW_b6iJpg0>VcvMX#Wsa^c0a>p3 zC(R@z6-u!eEPo3Lzwgv)?#zv{%7286AwbK(h1heMIq`V?Gjr`_S zTLmN#r8omoiUts+up9p&NfK5`Tg;%*pjyaKVeo3S9=5oP{3ZS0?YHfGSD0LNOLSrSkPz|#RF0h zBThafO&EDv#n_!#E|{b$eIdz1NiQiIur!m^nsX?gmRfQi|U$gBEV1X-kqo6=08ZK;jUkKEuw2WTL_Nfv^F;2xqzILlT&gZ zZ$ZcvHao}_BBxB`y6g6{Vn#lFvlY?p8wY2piWymzlUwE%(Oo}1E}@pS*LR| z)T7Iqca(3{tYdC>o_Ez+AHG*#CBq^S1oz&uWY`C=c~+2(5@iQ-)A;1)%`sFe<67B4 z|LUjmrOMOSXk%5mzCxT-71l?)@Si zz&}pHhOvTspCbv}mS&B1mT;T$s0Rea!hN?XbFW`LJ}r9rB;UqTg+_ap+g2xnu%S$Y zcGmA29#FOgn;h_j*xHEpFkM*%)s09!3o4TMew@?i@M=t|5&17ZsxPwJ|2HXm*f9xO(|ooIr$LH|J!+t2~-~lR6Qv zf>x&cSj+^@ofdZhvbUignYO%9lswPJ&bQ&>~9)~c=IV>gs{50@&oVc z?ZT^O6SGrKuC+P8G(G%P(L^X-3J$41h)ih&ujYd^gr=b1)kN?bdQNx8Y~jKmXHnDP zz_t-0mkd`_pkscPz!9LOxT_1B{Z?XW+BY$DW72cbGL!tJ&HyCY>@+1&vFkU%(mgi^ z%d1&+!J@QHL{bNB%3w;0o~A*lCCVs&GQBzo|6Ea`PExRlekD9y>wZ5`Mq|XZyY@zZ z{&`-5vlXi9e3W5>g$A^PV)%u#0=yPq15|%OmSe`z>E1?ap3KxcF@Do+>gV^HEysI=dFZD+9Ko~v*82xPyEOk&&@~__q!CXnL>_{{W$+1LX%dlPWZ!FNB0TXWCmiXkO&bxZC;` z?(u$TUWj)sXO z5Ini*wVUl5TqBAX1x@qQA<;27qL;_-fMKp&MOiPsZQcd%MiijDcu7u7{~G2#=&Z6G zm2z;io#KnX@tw0Lp8MPoe8RcPnTlszeEshEmN|(lr}D(9+!i)GL*XenbPU$#!`l?t z%jMJ}3wXm=V&&6Xk~cDH%N3+FIwA&@JEo%P3b+U=_=5Zz-~gv?_j5IINL`t8JnihfEdGnDJLf8!bk~|mgd>gpPxwyb-gY41wtA4 zsHG(Q@$l(nU5y`|2#mkAaNQ+|rk%pLQ#Fxn*E)VB^|=fLf&$)wZx`ZJNx1Q*E|IQa z?5VB`l3#PUd!{E80eZrjAY>Od=N|Bs6PUVp_C^#Sc(l;2<0+)z9g zL;n3Mo~Zl_Pc#8KLN;oh{#5QLx7>qQgrwK3E%b?LihHZ=cuKa5Mq-6RGGS7g_u}#2 zr&_cWTRqoU&n7i9dkc@tO+a`L{-N%}$O2VlG_72~sC`B+Pkc z5%nm|+Oz)kW12ZgQ7Cm1R=yhWhyqOKX1pXXL@7imR8w1kXqgYC<7$3|PwaR9WN1G> z74%PF{?B=%iGuJJX>lrEjB-D=y^kT=oOQcg-@*JjQMVk-niG^k7i9=^QLK`9XdmB# z0=<9iH2BHO6O3YP07BjMk1jMu&O{e9Rd4NFQht5+P5my_g;WRjTP0SZDg1;ws`FGY zicCJq=%tlJb`+RsLP!chKkEhif-6puUmt&DhX_Owk{Km2faU6#g{|@25=)&85P9x` z0wA$%hLkISE=MSGks(y(=ivKIQy`5T0@BDvAdNg5bOUK*KafWH{wa;LFdh&C(nt)= zh1DEnCjA<78;@W%rl$0}gDVPk5GH@9kYN?{)FR|u2UO{LWNkSo`ClwW){EXFEk1T2 zEq>d{u&rPD?vrAn6(77G%H|Y_E!rE>tHr;V8?Qyyo)ZKWS-bS6Zb^HU*FKL_knrI> zmUD<}i*CUW>pF0&?EwbbgjF*-1S6zwkdt_rmQbp4b>eN}YR$d%t{#cu(1*5zv)BCA zs#mz5?$C}D%&oPeM;)z#=mg2NmlOKS_hy@n8tq9xIMUb>tjTh*$LtcPPF;R17%^KG zX@Vm0y_PDtw>vFjB00qfaVg1~i23MIYFq2<%`D?1JU|k>Qg7DpQUyPKTv7UQuVaO; z@36Ru>QHyM@yIsOl=e~v^7yJW=abI3_jMQ2#^T6o1gdJnl5MR?>N3%vSaC9@KCy;) zyhK&!32a3!3|=H(v7M59WzxvT)f&Z)=-H4z^4J-bzEZP2y0^WsI~qQ_urs>X#OlbtA(0 zN5F`sS4|}{&Gn_`R3%-pd`+$ui|}t;Ttp`WF$)N=BI;EuHv|1PySyBKfOB zWE@!)f1X55Cmu(DMlYdA{)qmSeBL?Tcsm2J*@Oc51>nw-ml)x!3vihGWQ!PVTuh|r z147h0BA%UjCxxh#C_qEp8v7h5(dvY~{>Aa%KIl{RzN))`^zo{JsRFED0$}|> z8Ryo5`fW8djWmt^Q<^7{-bsR0aX}r(=zbX`{qj-5$b_)cV&IyNDs;^HP!?dBRIlBZ zT2O0VlF`0C#umA2bTx^r)ltl^=MwrC^j9A1q@rsvjs9L?Z;P&9xn#rUVJ_ZH-*7>B zBZ|mEY%b_q>gkujqkPG#xW5tAHkAFE+l^hKUZ>DHYH#0+hNuD^okX;FS&v?WnXt&p zJ4cVvSg?}>v&VlyV;c{*qV|5dB(1^v-Sd7B(4*D}fW>l$8)`l&WT_NT;50U)+`7x} zZYWdbh(VcoGj!_R+j{$DC{yol^^CE_x`IDa?%p^C>4bAl-%`O4uUvJS!taE2A=2e@ zO@dzi%B!5x!frzB{Sh<2<%+3KW>b9I={#OMGb21lGSJ80?B4$kea2KLda6b?DTva%ThV<26gtuwweI*kE^m)#bAihrPirm%;9KmGkGq z?$Xa@s)qNHo8E=%XyjnMiXi3lXdvY?h-c)qPoA|XU#Vb1HLR?v>wP)8t^Dw&jI!ZP z8I8%K+cugxa6Fy(J_p?s0D#@KrW|f6trl=tL;UrYHhi7=9sE7l;2)+loP)@s0{N?n zWE{qalMmWO9kaS)QdYbHo69il132~PgWJk(&BV{hI39JE%WCEL#A)QH`on5~I2FF9-aG@Bxp@;FaEg9a=d5%Vy8&()Dl>}7Wb5sdOA{0OA ztItxPpXS%0Bn4-DmsI7M(bLdtx8PVD1#d%H0g+NuBPjMh`S8=CeDf$Ew{g_Qc_FI; z2bMFrhveEnikm7RG+IWV#fmyp%s;2{wXMtlvTRXS4?G*IFXXy1cN;7y1ZO z)~B+>tlxW!5#NwV#_gb~$HNDcq7m>O~!Y<>u1VPt+yFbjJwj16N9j=U6w{UhLQzO@v&-m|$V!d# zsKOQT>{eQvB0<;D@UZKvW$JaA!$x^H852f%Asz>WUS;jRuA$GBeZvX8up*~E8nF#! zem2UB06VdfWR4i+k=U)4<=L0C(&}&8)9iB5>?&{EtZk*8ezb`M%USzBzZiv86BvVev| zuRBgVU=_NwRKAQrB(UfYW!jg!gHBZm=u}}V0SmAl=cup$;>my}fxd$S>jI`fUEq+~ z^EE;+W$#Go*1NT=_<^(!PmIkmF1%yY}Q^z-JNM>l4SME`*MY(*8F*Z;mgjul?Kb@M~p2$2|>0Q=+|(Z zMp<-h(V8FpAMU<7EQ+q-n@|u*1*A(#X?AH4L_%T#5u~I$rMp2o1*AifQ0eY2krafb zk(Ms$`p)Y8Jl~z~`(5w%{PlXd7c)DvXU@!?b7s$PesTHL@9ai~x@r1-(fwYR%l4l> zbjZpeLGqdC%rFCT%|(l1D#TT7@KR}Z#U7#8=rIhON2T=aB$&_4G4 z>BOK=gih>_P!E&~=*0dB>H)l?KVvH#JpVB%7L*%Ev3_2n-vMDfh={O%0K$N5?XT7O zD@OW1{l>TuF=~H8p12X(zJEZT0RQRF)!~Hx9+&&Ckte=CTP{71qNsZ1m7!ysj+!;x zC+I8T^NMxJ)%iN0KCNFvCf6;yq8ei=l^P9r41Gs}!6OvYY2V+qT)?JN_OZv4PiHb? z62tq-rMQS*^KpYYYgLAq>+$SQQP@C)rvSV2wfdu3)e6meA zUD~rMS0bZN&((3f=g8sMSC?>|7Z+_!SC>1vO~;e7SKG*S@VFNU{HcFuzwOnF3o1zEu?1EP?sLWg0$2OZV*!j11zCW6t@4g<8VWq&~d{sPpI=A1JA*^-jR5Q7f zp(iVsUraGOikf$I-qYrtYI5$<>iv!C{3VJ=)Wz8W?fK!(Hf`Oq-{GKerNxQk@%YN+ z*?Bp~l-n_~@T2Fj(t!g}Ewb;mQ}B22FQZ87VUdL*M&29#R%71b*>Kku1^tW8nZ|1Q z^Hg_{2PRTnjGuE3Im@wD$TLi}RCN-P7~hwyle*{U73_BPH9ne6iGIB4nYq0`uOZij zE6cEYzQ4IILM80gXd=XYLK~ST4%OnJNVP6vZTONVu_Qv)ez~Dym#LEv2>iHddYYvg1sBMKY=rM zUrepixC z6%~(4BbYRq4WJMnG-kWI#M0HWRlA*CK=7j0g*RxjhGTSJAh09{lC@In+p5J*pk}Ww z=x&Kk`C^%IsuLdXPfJ2^-H9MRSf8q!V%5(Ija6{++d@OlHg`2uASpT4`nmZ%_Oyi= zp2AjJXX{x`PO|SxsgE0*H@5rwRC}uC_9{pzD|UM({c$g)bd&l_N(F;%D>WTR+>Nw- z{-Vl7L4`1Q1)@H2to=Q?y0|6CBRr3TnQ}AgN81W%m4(2E-bve>%MIeME-Lv|m{|Rm zG%iiz^{}Z7t98y9FISrbQ^v7JgL6~ZB~RuYc#9FZnE_Sn(}s(e4X-3)$V?k{K3{u@ zXWH(7bb@q;?c0fkF7?GI!h?&-^oPrmYg%JJvmT{tWNM~@o^H)SAQ{ut9Z%AGQ#;70 zH=R_;)%tiJV|I@*QjG^`vdti1vtp*spRgH|$;)-wfWF-d(dUPkA3bm}tPg5jYMvi! z0SB%gdJ4AFjhrlthgeesC-+x3+^jhQ$c5n2Q{UOJryo&`Q<^q-klW;0^e3XDF9;JiIaNW`A;0seRwfyVD2kDahGcHg=S!jK%itSK43b886TcVV7+W3M}4f6tG5Jtj2a6ssMow@8fG{&GSec*^(jW$VqtzY+WBL9Y%HT{ zv>R8$=Kbx4Btaowgy^AG1|VX<8sKWVKC|8_8}=m1_kqTPk(+u2Ue}B z(Vl?g{CXF0IJ0{^jBUVe%N{#|y4tv(o|R3#@a>2!nY>^jO^8&H)FR=OcVKvSu2B!S zmPL<2Mho{omZiUG4`_wUg+j}~bj^h0F(Qz-%^=OyjUOjSy-)ME5N;lR{YFG*uF1dXE&;$x)- zP76|@5f4rl;zJt$!Lb-t5NM=9YeGUQTHKo|TZ~m8176z2y;Hg1vIc`!>W_4L`%IFF z_bL`WIvK`ED7)Vh)Q!=kgS|a?%2KIwUlpszV%eF+J$uHn`i+ax9>u0mz}TsuOfQYmCXTpAUdTr_TuRz)?B>t8FORJkF?Lb12csAYh2n|R z+@-WqBS2q6J21o&bmJvh5OflcdLtv`w%_K_)|%b=C9soj{!8E-az@8HZ03Z}$7G=` z|vnKL98K7a$skIUHA{&NOR00Qq4@S zwQ$+9nc3tTk!mz>&DnQx(cM}l0Bdn2Mx;Z(P5~NU5~^=EmNJrS_X~uBPEC^T7r{R>XEpq-OXoZ?1ZQ%VD&ob4UNZPae=m7 z&NC+u7K^8E5`oIAg38Bte_c4FU2=Dhp-&$@Yyb0PM3+AlOh$D1op@uru`e(ldQ>rs z9=!}vXpP7IHNlicLJX(kn!Oa6;>X|j({;TSiklc(`Ypd-$2k11?D{c>&#+*vDCD%jGdMI97D&O)2D|>pIw&>gn%qLBYba>pDIXT51y< zWUuaiqy^LM8B9*4_L(OXuXrrQvvy$ucPTc7PDvJa_{{n~(S9u9p>&OSutRLM8UNT` zj7@0GVlOrz8@tT4=xuEE7cJ7-XSd9R9(VIobyW>l$m2llbe1c3}TtM>Mt<_{%jnrX!9s7f!z%5PENz+ct_RCM z2Nr{jNGZ{}+4~)h#zXfHqY2>Emepw7MKw9ATHPN-DhD;8RGJ*CN9aUP6%b={ftWq^ z1Hapv{n&p}cnQZJ<;I4qg4HlP3n|Xjc@*FAb$Ln2bdpV0m zO)=UVg-PHB7Zz_}3Ql4n(n9L)5Ht9Y5hOl6o(1jzZf%}u@LuT7kyL5X_!j-RZw%Hz z`|uu?ZlKAj7-k=IzvOzXhqon-nMcdXOyTx-z5-rqiUgM{ErZ7Az+{VI4p+c47ER zG4N8~6^+9_2Mp^_AJTM;jy>2t!F1%WJFt6VC2xt-K@T(mJrHWorf2(BE&c5XCRzF! z!KnQ0TiUlm9}K?<-%JWDS1cHf?*cO5W|St^cuyecWN{a`ux9Q_pFc=9@*XH{V(LMR z&gzFA+C_b(MKm)!J^h^*wJd^U-xwcy<%D1adx@Y4@WMt)tz{D zdrCL*7NBJt`E3?u8&OSBEP{>XeUCp67GBkCJm@PN-ni^AJ9MyKIJ&bWJWUcR&&y+Q zmG^1apS71<~y_1Cwtt(PXw7XIXA!Ht?4o0qT!7M zn9{2%1qUXwI!kb=klY1v4C}Yb0!)L~@M?;Wq}%mp7&#|h`FJ|#d?%A%1-Tel2@#OH ze-mApV8vw*(sUsfSnLv8q&K6Sh>`hq3zhiP(I}s(SBq1yq0NZ=-Zf3U&4EH=^|cGr zBS~fWTf&d+v3~L?0_FNTjJ{)od9G>KxJz%;jKQUgYqDDCm4bLw*yZ@F)&>K`vy>9y z(hejkKeu8PuzGt6JYrjSygkdeuCtLx_oxVIaJ<@F`@V0q9w~4pqBcwdzX!MosTS_# zi1tF{Hlr+G&fgjaEJ7nvaqeN|Lm7{xr`hS%Y=>YpnsP$9;ce#PYX1 zDwg3fRT*lY#LoJsex&?}mExLf!(Yvl0#(=(jklCIu%*SpOTKns`SoojvJrEull5Vk zQiex%`}5`VJlCq1dL$-m#7Lzq!!!9T9oGf}jgYum{Bdo#daAWZP%{OVq7uEzgU14m zQdtd5#|%kKJ`+pU>5`CZm4#2f<_xdEh_|f_*V|Mn#_E;;FNI>n+tI&$8)f19@kXgt zEDKK0utxaXAi-wwqP?Y9nF0$@iN+-DEWpdY1m^f+ZA6*#hh!(j;95V#0^D%=i+j}? zxb&*@l4!sUr@u6O@);+Vm2zIi5)d7dI0GkO>-b%r*iYeC4H=xr-mSA&=x+n&G5;2_ z`m0dve+guTKokBu$m;iq!~Ylc2Eq@RK!1X)0QT|EcnruB`+LZW_diCKg76`n!x5ki zg!5l88iWr)mih-!2Bg9LeVusz+DQJVKoJK*O^ATe{%@V2pmzTVqe1?$PQT|V{eOLT zP)`qqwv!uK%s3f<1SzD>-<|hzqe`{xRrnxQ_V{30+B;)cjsK>jwOHam|Dzd?Q;-V>U-=krKg2V0>L9&lAx>ARluCWooUkkgp<3=B<$0cB@Qmb}v(rqpxvblStI5`T zoGz^@bXK3P^yGSrjN4@C%6+~ybFoTAWQwu@?7LehU(^Y?D=kwy&p*jz%zJ2Tl_pY36bH=?Ajy_T|#oaV=XZNIPJgo8N z1$2a+^#}F6)qFEutph5JBH>5NjSMyMHKX4<&#<>eCX27gWeZ1IiP$6#vCV#Tc#bx{ zFpDw^+p!I|K07wI77f=r8XLaT$2Oah&;EnE)N^Ep@l=?-@Y#X;jJxczBz2r})SCU` zoUYKi3Oi4U_T{}1I=K7m@g7dbS>m5AO&|g*$bnx!#7dnxb2dsYVIT^~v5X%L*)AL^ zoTZD1ggZ)LHTzvkt{^yINe?1e$jHoJop?!JC*w0MvrbWmcIPZ9e7~%^+@}?{KVGVN zAg+)w;LLi!0e$*uu{vO75+B!pD^hs&`(T8W01G^V%Rh;tcY}u8fBnnKBWG?eevXgK zZ3l%#1WgNk26lCaTy4Dpqew04C>^hcJyz2SHt`o;S{38^)AoJ~6ml_JzN+i@-sG-a z7#J{sRvNIP3>`E1`|q2EJvg6S|H{u8X_{O=$~T0+MY=28RS7Bm_B6r-$(G;#Eu{^~ z!L+KGR)6|)YocZr4$*OAS2(FqDl(SlMR#^LHY(Nic;ZS=0|0Mzw+i@k)xX%;otT1? zPMxiap|=S%k$rBk*PIN*CUAxyQVgfx)tWr6kf@1L4I~Z1G{NB;cNtnZT|AM&ZL~FK zG8aqOeBr`49IvAw)cy!U>t`cK>-VB#bN>x|Y@u;U3eT3Dmxm-SvSiN!Poj=TH72%f zpl;VOo_FDUY2hj@`f82o(%OU=uYMmoIl9%1Vrfi&iZPB3dsFjSq|xt&YSZ@q-_)kg35SHPyOtT7XMq-Z3ituSJ~aes5t#l5;Q{3&`>#AdbqqNbD+LaH8F$V6rAS9>kEr0a#)QkopW*1raH2@}JO zTex&FySchS2q6seFK491e>o$yxK8c*-2dr|6oc?Z3YGfKngp!ZfBIjlK}(f^{p@{U zKO2LvUI+HGvMYKbom{}2J`rs&`uYeKJbP6`n!DTlBQgwx5i%;rhUX+3a{bIF^kMoa zEeRNBjLQD+vyu(t4I(m=N2NX(hc~}B?(3lKH~k16$#Yuvzenhm0=_5%y^``Ty;5tV zkNIebCcJEc9NJGOS9RlE{ILuA9FhseyHAs4t9PyQYsDp?^nRY#`;hLG7US!FU`j_W zM{9x7zXeV9_Yqq9gab$*f4iguO3$25vdNOu#m90A5C40vNpC6FLeSiA&zfCxuGRAd z+rDwS;b($W_G}lnYhdMo>lH5LyuJ%#bVYkYb!~v4$Q2RYg)qL|?J3dzLrT}muavIz zv&Ann2zT13{5L1Svj6c_7Zt-$W$>P{W9RYGlPcCt_i4W?7C0vR~6O;Pd#k zo6gxCXEBr-=VD(kKWI-FneVP{k_%%*ohs_UZ}Yg$D%`%O!Rm!; zTXaW(p-CZZmO|%!M=Va!$b6evSd(m66pu*xF|&q;hv_c+;Jg9M`a?&TwPsk9jT%ul z^TUr05-h>*K>C}5M0ptU83$FKQZ_SUO*y_WxO<3@ll2wN&0I5;7V1hF)i<})Yx|uv z7(jfNXoX2uHXOuveOab7<*ag+?P&z+D@vZT5X5IX6@DX7D%Q5D%SjssONU@_rWmf0 z%02_7^M_8Ox7I z8epWp_0l2-xJC2P$66s0yFx7j5oXKF$>lgp)-+w)8wF{ix%O(1vrQ<-rN}J$SjY6ED$t$%l+`8P!o_jw#tbU=9Q|r-&<>-uxGa6 zYcw;#+Ve$^D89#3q#HPl@AU3~5euXNz7|@D1tLO%fn$eGsIYlDGAtd~lFyMmBpf(? z|Fby*1^`x~i2x51nBK>kblwOz83m^Rg62!WDeQ)u1cFl#cgz81%O=UI2m&Yc@VXG{ zY-25X6XOY~oyW)JBl@lt$E$BNT_TGvw{ea>?Yd6SpZ3|EQ_lB%-aUa<9c$Bd#UgJd zEQA1;WpbT-*8=jUpla1f#@JcLuI)(nxCQAT_~+eSnyy*;t^`X;yK_Q*;RlPyM4xs? zzE;I84D+&e!Qaq9e3Vy16VK%!?LVyZ?=pGE=A(gz`dgz)jQfN)e48Y*)Iq}Xbs_h? z5X;J8h*_i<=En!LtPRT(rXf5>55sDJN%)~$-Qb?hL{xksFbQ8w{g+9&LxHHQ;m_8u zRXaLpt+exi?|>{Xcy(6o-`zs1_AZmGYID57Yw=Ms=~aQpZ?f0Zfj&O|6M`{S7dxw# z1{e)rfbska>~6|0MuT-iA@?G0%)$}uX(X<+joecR$-`uenD}nIVF*d)Q-(b09z#UD z+z^CBKh)wWu;H-r>N#dPDvg0eIi#DJR?qEtrB*m7846mw$aGl;r%7GkXuxM}Aal_J`x z31l2W^J0zVCSy*r{LRoD8J;h8^8C}Td!>b)M}g!nj62z6r!#jk$!kGr53%xbLD-SaUEk{*L8GvI$00Fp84=E2PBajlPPI z(#K_z`h!B(9D;-U}QCz?sY0R0q7(XizrbM%@z`dw}TS#;Z5CKU&jv z#U>?^U&(hHk}N#5`O_fl^c$a)CYJlROa?-TdfOei3nNun#e|vWfUPOo28mf=Z^f6? zWcN4Y;C`|1FcGl4Urx1@Y-RTO*6?qsh&B;bza@Iw%iBd%xe7@IZ6I^dbn&vNbpJc@ zVU6ZC1tECg=8*q-po8?^V=c?PrHUq0_1_Vn1EDNSF8YXYIorM+5H2^Vxd4BAj=kst znIz<=^kB#c35Z@!`o=ZzGB!w`8*rbRl0JJ9$Ww-nJaNt06@5UEr^hIS|5dC+pt6dv)1Bd;@1DYjM``-GKrh^H?G`JE*HU9cKX{V=V)eZX!}}n8Rzyl^H?+k(9YY29 zFrLB|{9jdFkTMK#HH!E=*@JN;oA`YZ!bcoP5$wj&^*KmCLh>^dQMQ5fE@C?(<1r-` z3M7dGH)%xz#4LNEedg)FBAnz5B^{%RGW5WWKOMHmz38IT)PUY~b^Y>^%1Dvt-QPh> zTz^G0{&zr3Kd1Zu4aCIzdr08_3#NeZAkH2p7T; z`j5~Fgd0Ia`UmI)#K8SM#Kij_<03(z2rkl}t`isFBK^~K`ej(9Z zo27mWri-MwX5+(mg_{L}>5}K4KuOh_rNppZlN(0tUchM_ao1%o?D^-mozY#B8u&x+ z)9ZMhZq7B~j@GozWnj8Gk-EEh)CtZ_b9UOCTx8&09S<*w0D_dgJHVK<3od70&ujTc z;;e8Gou5@vv2S*7Hwk-Oy{kJvZ9?DB)~^@eE|cSHW5<15Uryz6<)K}7ZNu(mm_qj? zetKLmd-3F~V0z5t-1t~=$DB!+31gSYy0)I&X7@x}odWKxH`kW_#?ml*@re10v7Eg1 zms=TL?#KJCfw+w4s3JQ%B$QE`6(`7Eg2yKhXAIs)9R$RI*B?bL-DA5> ziIZzE{kcPYw1=W5^-HC;(T~#JZeGcIK~)TloG)c7$X}GdZv)R+sX9k?l=glX z?-kk6$*oq`>eU)$+3|k5kjg zo~~rSx{8XpTC=z8f^VN1!`jTRwO@Wp^H;LQWIbQsALC>EVM7x9k{w#H!WjhGQ#ttH|nnB6FjQS!{gBE%h-Z z+UpV{HkbLqap#8*@3E~Qd2@<6tWD{B!2vFZH$oYrZqyQ1Z3{F6-Z|oaTpzqpT-@@; z0c&`cm#jOH@Fy61JTj;$2`7$`+~~?{{8T9v|2>cly!WGkPXb)Z59 z1oT#29@5cm2g|m0+S|I^soimsdMQ9d(K$cV`O-|cvjSsv2*!;$>$i&bCWYJ7XCfuJ zgS=no6SjncBl_!L;&at1!xl)T!DzgDiOq*aCIv*xpi<= zyn@J40TD+kI9oVuSam?mWg`~dy$r-g8}p|N>veHWlS#N+Ev@4x8dH99p?&_$LC31(2v>01{P3L81!6(PRranxLw&fQ-Qd z=|PyY7J1=oE~U~OFth&2{fOb}i_7}O{rG5_LnnveexNBzL)Z6^2k82~O3FYzuStUE z=8{l)v*gu06E5gcw`tCE@WUIhvv@|ih8q;i;VP{&IVAT?tp|Jaqw%hG49)pl%)*UXPf?FxvCG?}xQ;GsNUY}1#J!(1eDb1y?be6GmMv@1v)>|z>SlX_aC zqO4qqy?!01UMkZrZ8J+Ic_G>@v{#C$sD|h1+r9_U8eq<&>^aPqC6IbZ`x?x7KJW$o z>Q3=Qg~ZHSyt!=;GhJ1xReHr0tLI-!-YF!+53uM^p3_i#+pgNHVP*;sGv2z*h^Y!R zHEH)W-4~cNS8in4(1R>zi@bT?)vVhJhu!|u-K~xqk-1Uufb}1eU$mc}xRu%Txiq*C z(x>-k#T`5QnKi4%m<<}KaA4~SV>}<9$|f^@_AupH$idv}Oj4JMx1=uF?>q0var5Qo zkZP7?kv_jM(wsv-@&nAXG1HcL?&R8T(t&oy^%o@Y3Y!?yHR>H$n_#qj_wrW2HNYvAN71pJN55W9A1*r5U zHe2m#ym9(may+$JU31RpEIo*Vtmy|{DuFpqs0q^KPB^=#l_9QAHnkIG;;ECU1VEWG z2S5++2RhyKT_e6xq7G=qt34Q%?{05un1rSdVHn69ywhe6lGW-Y)KrdlZxQxooGOMd zCT&GzHdI0mF@*5XRf!h5>2yTH2bO=##t~=qo&WeI7w(O}fSAB{nh1(~JAKNTj&SK1Xc~s=koNM2f$v!~Z^Z@xK-NY= z`A#7lmT&KM`sfPDr`3_SOy_D58K%$X1XRGl$QX@{h-E?q4zB=Zv<%RJ=ECruU7 zaZ?k$=`KBtXlK&#pXzXsgJlnLu0PiF#O*|09F>ujAJQ$J~FhVTDn-du}=}LimI#F8I5Txjhf$#dM zL(lFHerH&0h4^Sgb&GkX3bV=PTm> z6cAWsgfgFoJpL7Ch4-4pA5cKNCA%T-(gJ@F2ccahzsl)WBa_Q5K~HwEsNw?VJEp*V zM-iCsHqa+unb_go{q@Gn?<}d z>bwzW1W?g$`T7V{wAHB%0&?u{gEf$2Zz5j;JDT_mp9KC?>qjvzoHSl?d)zNwsD`TO z+k>F>7`xVw&ZAXT`KD;wgYeRs+ly$lRe~88ypr$~(5iKU83RvlKJt)St$B1#IS;LjJ`*xhsZiudAUj08-zG+3qqi&MS(ZVt1$cs4|*M6sK}z=&RO!fc$Y z^X>IJ`fGvQRut!f-1fNT)u447eJjRfB?7IRzK%ssc5p7Xcvp+Okucj*AnY7>h7kX% zrB1&#PR>Lnn?=7gP6C!t8vOa`9nO>KXYD_nRhgM&)SCkhfH;4AR7z%?6NS}?`HslF! zCB@*GvTejZ@JI(EsuFM4M??TJkLJSHz7kTNn$GSN0|c-tKTV#ePgZEVwycIgR+nF> zr#saZdw|=#=0a*?Qu`0-v12xzS(!p#+N8KXyx39_{hWJX_boL-d}mPRFHZ2gYcQUt_d7eG2HP;hre)Ua?b) z;C+iqi+PWmd;MxRe%Y;$O_Anhg2WB7)eHG1f-auv3Ka7Yj;^ z!4m*s;4c{MBm@;{WIQ4GT2S)og?c171x;`YLc_w%@k0N;$C&ulf+vk%lK?e!;F_a# ze(3#lvnrZ6A^iHEPX@jfV7wNJdOx4^E!SYFp~Q`LDe28t#0WwgW*FQ&=XuP>f(cf+Gs_SG9%U4?^+Y|mW2wtsYRZ0!Cq8wtzs zWwngAE!kTy+Bv$~eG=;aw`kR0C;k6R(5n9j+i>3h7^w!rfgsiV35DSVq?&(1VSafL z{T&MPAJY{=I1w)0e?qGu2wmYnpjE%zqyDZ=|1m-oCqE!W{TUhJK-jDQ12Xi>VC(Pd z^dHkYLLflv_~$x75t(@ZP^VwER)4J%C)e-m^k1S?{9Jz~L_Lqvtitx1)!`htZs+EZ z;FH;0Xs}XK;Cty)F0Dv?J^9l6O;%yO=>x&>zE-r(LtPUQ3TcA-UbL^os77C(uGqEC zZsY7(94_C>iSszwO$fRYR$IXd@@89{HrtrnwRLVCM!;1E8Mxk8ZNI@)K+o5NfU9DJ zE{$z)?0<2hW&kIujmp~w!HM#jmJLt%?pcXpa=bbhoN$Pnp0RC_;G-33v-@GJtU2ZO zE)n2FMFz!Gx^ydkGkHz1Y-$}3Q^=sYJpP~wtM|CXpevey5;-s0Nrqk6vw=*vgdmZ$ zT%u$%Z3Y$I&5a74u;F6!=rNs|iWA`s zTr1wuqkBEMhcHhkVuAca^RdQ@&as1B>-|1kD#7^CvV#l!?ViQc!7djMR98tIfVFKv z92&wS)}X%&jRjofE${sr{1rWOQRCBqj(2OEFSC$N2Jru&9)e2?s*ypax^Tm;&*wXHNKOAhcb?|#2vehqKP zYolwYK({#Y|o}@#Wa=5 z74ErHcKfIb@$$ZoXKQ09BTXK%64FFTnP2V;BK6GjN-ykkYy$Gj1!-BZc zu?WMzrlAPW#zypD8KOLCLMf1~5 z>=gmNv>LuA-%%4IT9P?9qw6vCixmW7P(MSzF?tjhm&za`sQ4XeC1@FWVI?+pY0Wiz;gO% zzGC@EeAngi4tw>d&GCV%+)#?3Nw-VWd@R*|T^Ph@*YPcHqSL&{Ny{W3zXZxHv8G$E zl9pR2tZ|N^wuPJ=;onGo2!59X@2kMm@t3gq=)`Ix<-!x(hcNrT=!ny= zYN!W|6&h=~V(ectf-djDS>%)=iFq){COh<=w{Uk7gOa2H&BGo$mAuZ<0o#P?RpFg6 z9uPLK48rE`vBSAIiUGOgJxK7*(NpLK@;#eAVqd$y1KnnT1rfK>UDp@EbGJQ}cnQJT7;Z1>YwH!T&8Y{$0H!9-q*XIa4$yLW%t zJSoblfkS8O)IbQz-FN(UlFrhSD9DO_fDiDMH~?|P%B7RvF-H{kbDH0Rm%sQkLGITf zbQ5`_oMTMP!H+&+l!YXIqFGz{eON;JwqDgjQsJ#FLisea_{f@E*FNwxvc~{CQ!id- z-|wwwIM5x&tjWGkZuu=1%k4wf!G^4+#9S-=Jc-S`faGy?qL5_Oh17D?_dXJ7&50^^ zYra%$n>|`=Rwo~-?X7ZM08p*guz~+~lN%Lfr|;fTdynoQQt5uL!D)V5u8Z}CK!)C1 zt4s1m9h$dZRTt$Grb79h^-{B>3Go9*NGsKLvPprxF0Ts*GU~5P^HfbpS+e(AF(qDk znr&EjZoSkFlsETyp*gp2Y^5Ep<)T@#W%jk_i0s58%6`c4AlCEy92ynxMf&K(ysMGe z;)b5LQ4RY`Z_oQBN|upDu#IS%8Lkqst_!&k3W4Un5Q>k9RSFvfCJW5?f`-9l_<|05 zDYpf)7OX+L$*mIvs|j*?_IoB?}Fn z1MTw1owo&T=wn6ke3bF7agtmU&Ce$L?ue^Ma?MxP0ynM*lTLr;6ZMTunmy_p`j8ub zi8y}LH+dPIh$Jo1M89QV`Gq^V%~384=A9(J(w+~p{81`0`mhbfqJqnZL)w{zPpIdIoiTmdt+C!VzzvwOn^9W(wHcW(FyOhC|oso`Yq(8`Iuv2{^A zYF}rWjr=5K{gn`V?48$(f9$0gxr+ZHW&K~il&Gbh9ACj=@)!A|1L7dJ=HyqWpZ~jF z+RdG9T6kZ=9wFAfuWm2b{d0N;UlpPQ>7V*fSyB zwoj9BA-V8YC%2Y;xJ6DR3Ebgdos$8~!QAPbMlA>EolsJB=?BzuU2`ZSuMMbGEs$Wr zWztKu>7DR~Lny?J^wBwgb|nPO#fLS$M06KsZ6Y+>r6&Y6F%%j$0+TK{;H4DC@511i zpzDZqLY0QYO={&@JDqIDRCZv+D*p<)M-_M`1c+%rCA&aFyH!p|me3mW=N;tPs%Hi_vol3Y!+ z_mj?#w&Nt7SGM=Bxftj(#vkAL)n1kKgVg@rnm0gemfl})K5CDIZM1{(uZN^<^tv-R z-LFFQZk{yicSL0>!rw;B0ZCT)k-+L@SY94=Teq)krB%424A9TJ| z-RGulXvZD@ZseWs8+d)x+zd(YdjJ|~;H4>^p;=#RX$uZ!Xh6ABU%isFHhx&h0tT=Moc652uPPhhC# zD{7n;$XaoC$&cMW%mE{toITK5gQ4yE!R9F9dcr}~;(xYgL;bGDE!?#N9M&IE_j3d| z29mjRM&ulIXOz*GtsJQ{AtkZABfhTBDH6e-Bo%aHt)EM-N)(AzBfigYn5%P&d|hWN ze-@B;8S{*|)3DP;07UB_vq-8Rr z_T)f{Etybn4GSspy!JIxB2lY+?F(XL?x%ciE-k=f0e>DbqlOj!Tq^y5#WMN1nJMU7 zQVH6ctI=~3wO=2q=8`*k3yQ%6pQ!y=ASf4)vk!_W5V6a1lHm7?N#OJ1z}{zE87*F& zM9slS_tmdMf>sQ6g3*HCMqlzImG+VADH6 z%;(a_Y8aiw^@Fy;5*VG{s5%tMZVb}QKuX#=FIYn;c$y1BC~^{c6*dgd@m#d@gK%u0 z>j%ks$?69=)!#2c9a!E0P1ywuz2F`7e>G)`KGlRVJF~!MW_hSuhjK%foq4eMN0lG7@-VYY ziREpc%CNRdFd9eWi$(|Tg2R9zSP=}=*b892n_5cjr0O|Y=M{4$V&$-;`FhZVNgv z#E+d&qZaOD<>TZ>FOxo_7%RqxzXwgPbQuAP#ezTi&0&5PJR`o?OVW#htc9;eeDl&a zEx?{8SfLiRmc6;Bq=`p;BM^~IH@(aJkEkDVNFKjmYc@jMTxu93`nc7i7;4a%;au>n zH#KM+>EbUEVRw1s&^5_AQ46tSXS1x|&nIhBjLk?F&W-q5fRWjrt#QHcMl~DazQPnz z&(+#+*R(JR{7SsT4d==O0$9L5Tx*_vP$FhB$>;=;zvtTd;d67KG{`^N$I2|=(KDM# zt3dM~zrndeKR`{&*GElfhE`HicBhZ;8Sz-LG*tc$TA@>Ib{Z2_7W64ENvWdqn(P~| zs!^E-4yFNadxMllN!cc!apXs?v-Nc7sdq!NP2*c+xVj-~WjX3-d6RTKarp{d^xN`W zAK8la*2JL}2gE(^Ynwx{<6k-YzI#;~{t+|Fo-8~&f2j72;M8?StNMwlPLw_g0 zs5!Y2lr69b{X5Rq?|5W729`#8c7I@#adQ10Tm3JwFz^NaMI5MEbITL1`orF*rp*)C z4=JWId4&#T4_RJF6bb#);*~GKk;a&L1uG`cP(10Ha6L;*MQYFUkso@Ng;(-7y}Sel zyB2@Ea_nFIvAaL*y%k;&#Cj$FJ#A>&X2~w^+uEB{{)@|~x~7Y{AKOC^s{jPL!(o>XsxO_Cb<#jod?sc}UwVEo%cYP%$MB*~Hjy83IT~lNh&erI_ zf8I@Rq~ycP-yAftSws=_W!t8}e|mm~EHJP3E^%Fhy1l1Mb*hzhNbUK#UWDrXw}D@42`HHG zQO#Wi;PmP1^I}#fJ5$Dmo6=+u>xa6nIG5!ZXSlkYxJ`|{*R+o|%Py~9Y8+qq6e6z+ zsLqaB>^d$rAY&P8h>V7%tE4a&J$51Mp)=FL&fspEIj}HDA2UDkhA1#D&s;K?almYi% zRm=^W8czOjGJ)R3am=iSKC`2zM@vaqnHz(mo@H)suNeS&3z=b<6m^hcYIQ-mvGeKX z?|0^hlNbi8jkoq7QC4rvy-eXHyN@HxMht3xcz%aCwtWHptiP zynvJbA=T(sg2NG6>1&C4&czvMA!+~a!?PII2TmkM)*KmM;6IM2PRWPn^FCJPs*+%- zpUR-l1&m^Zrwl7yt*ej|Ev>%b>WSk%tv71KbT>{SEb&d^V%+?(Ai(Z z?i9t|g83h;bPB_DCzkW4UOmh&$)nK{?5r{R{?gX|#k6of%>>2g_q68JB(U+0Vqk%Ouc0db z__6D3cttQa>hwv1fCI5TQ({l&l5a~Hwr+RJ@GB}cuH2|>XNQ(+(7}z*uaV!w9Yf}j zMv;5X#$J5)9slY^mZ(>bdQhqPfh&5j9LQ8F z&I@SbCs`@cZq=)gU@*844dd;E$OWNlBBR`xY`3-~3bcBQYvn9)I~LWpNirN2>M1V7 zJGl}F*R2z;*Km=?Dc~K&6w)4@QS(0ZQOPmGoNP5_w8Ve788Y54-!`#~HMWyo;`+Gt zb}iL)fjbA)Jj`oJR)=4Mx&%H{@kR{3FMhyebB;wZEM+nJX~>*eUu5QDe`}cJ(Ej2h z7f+Sr)fcsK@_q{nM{SR^UHo2`#k!qfBK%Jz3gQ-7HMZ;uI8jC`z$JA)$R0Zwg;N>T z$2Et^CzD7S)ig5PTz@M^%s6x@_D!oVP#B{?*42b|V8%APEMB`{dkjrx3q?+l*PHmEc?GwRCIkMC+Xjdi<5#8{QaU~)g z!JJjnx1zV`h6yN4TDYc3)ita-)|nHHUwko=%(6B-&1pYiB%IB7q20&(P`zuczwe7- z@|!*ZzXp;XBs#Sm-EgCubn4(3M!HR`U^T|*=4bUB-BhES3_ssRaLbr_)Q!sx5-9D8 z_ls`XCWhC{*^pW^`&Oxhi8*|~9<(<|Wt^042E(1E^D?O6VChjq6Ot;1wea;201u*? zSL}Ku%_zCb%@b(;#aM6rjO^lBV)r8v$6;7$f$(F-e~3sls=d|2Njm&?t}&r#x3 z8UCQwLz_t;C82&ZOYgyT6e=NE-(II5^$(WbFxqq7bqma}7aKUW$G*qxqY}1cUV3R$%xj>{P0~wpsxi0!zyHj}%yFHiJI( zbP-NI!G7as{wVJEU4Z6i7bpT<02y=vW*V7~s}|H>cvWTR%hvha)k7TzPExHAXQ1YWd|l*TUT*{nLxi=Vl?Y32~sKpM^Q?ax$B*O&@uf zTWYN4u!(}_*k(0oBa#8Jno15VH95~|W%CMxJ+H%iSx*HC90yHJLIp@E@vjeLu>c^s z1$uwmg~8~Oo3NlX2FSmF`w*c}>}vofBVg-qNq%za-5NVEYewPeCA{qn+8DlWnLU^e zYDoS6;qI%$;&|4qAp%LT;4TRSf(CbqpuqwJcX#*Tkl;>mx53>Vf(-63xC{Y;yW7`8 z?%vJ4_qV&xv%CL%n}^BNR8PNE-CbSXede6=)~R4*s=uL#X}Endl-0NrZ-LoTrjA#= z${Q64to;avcE@AA8iMNz1op^2Fv1PtF#p~FNLvnzSB{Wr$PTb6UQ_B=xh(WIJe|fQ zP1&MYSYUgf`SK9TG|CiGN#P7qHW%8ab)rliYHXHQMnpM8>E$LEzy1(y&&oTv(92y@ zj{0Vctfe-iFf&9>Q+e{;%Z189pH+7mWkjUf`a&Pq2xU|dOa#Rd!ePu*6cOZ&= zV{u_--^~UP>q24DIkgm`sIF6VS690gAoja=1QZ~=3$fP`?#*_BOlAwI|tT&3x zQ?i{V<&km7>!-{VOBCG%z-Yh_3ukiKZ2#z9V{h_RSZItWgtSS_8`)IPxC*;0Hj1pZ zZ13}wGWo%eP^4hfj=I(dK#mde`Cz-paT2vS-*Fw1cyX1=P$1p5Uf7swEYch3#T)Av z{(b4TUi)6DNJ%>#C98FBSziWVJ2O}ndkHS?sx6Hp1sFOrlmZl-4fX@V*>BpagKPjo zKutBm2?53f0c=@g>59Yp16mrual4Ie^>fNkSS^5&UaM(YcBqjLJm>6+nmnq;n)sIoR~^vJuFOOfRMJGW%U!` zdc4hf2tZvVObJjvl<1E%?A7M&VOd=wS;x0~{fWo=wN*7{>aLCd*$}!|QU{$gfa(b@ zsL=uT>k^?HoYR9)d5R!i8AP~R)W*K89@ zp#aod^8@wG_SD_ck5D!6bekk+O>2%V-)NmOI#t>Gfb~Af-eMcMq&xUu4c`;Dvu)(Y z-aCH`9;7o34S`ngc384|9ZJ-#{QL7W3(OK4_E7y-&(D9bZT{l&QqloA&VB0j^XEs_V&a|-#mOtD3fnr$z9{sRVu?>8wrHG2C_W0HNANk!i9<}(J1T}6^C?t zv4s|Ux&%qxYrX+QH@Az#r*D`vGR~$clb|^brj3;?`({jOX)Nl zZi<#m#Va~(!_Q@K(QGRbO(l0*pO%-!YVMlVDHN=tsu%r@8o~HdYdQz(M=K!P@o&19 z?cju!1pA3Khy5z1e7P1<(}mo>IypOo7e#24Tf*B9pGc%chnraPH)2F`NgK&vr`LPZ zRx{+uuRw;btM|O8VvwJ%y}s2{Q>0TNAyH&WTDtmL!wq!ej22RS!h2ts^v9v^+e<_^zt{aJsr)G!>!4V$o9mv zig=Yju%dDQ=U3%rB~^q45W|VO)YHnTF~u5Zo`vB;;}LjB!o>T zGqVwxa3^#!w@m0oNNuJeTu6U4KnK-L<()|cJQY}hq%`;dpK`JhCjIETbvk>a6@De{ zxX6Er#Cvy)X(j#Yt&*aLd@W$#w9B(ZENL)=M;=j+* zK4eF9+cOAktKA_;=1Qm@y@k z0CyyRPTJEs6R;`nWb;hl!-K$0GN)R@eph{-sP-_Pq7D%I)b6g7BFC|mt8JL-a!s7I zmRs(|tQyxK^{rb7bg_*Axh?9Ye{?xopDWme97We$aFRf}>R|VyoH=#(tlXV@a;_(J zF+4I<)dm)Pe`#nX;%CB)XdNi5^**@;jB1*^mH?xgO4&-*5Dk&GtR(!6?2E7V&~!%) zlRN6UFqbE`tI1G=c{u(9es@>+6*yyc^=GctJsgpS?-h74%kK%Te`8O4&2XmtPJGXv z_|1ZV{d5aBWCr*_;}-^X>ciSIJO;ZDvr0l%O6_=|rx@uT@2t4K2kRr7Yol61I@t9!$?YaD0oY(=ymEhS2nRl=}vZ zfT;T5%%Iu9N!%g0PnJp7Zni|PwR(XFz1Cc#hr~p@mYXm%N$i7#`u_a7cH45n>OrA6 z_Z9|J&LHoF?E4KQR4r*%t6$Y;q%%hby60CBja_yEL_1Z-_UBU%5NL~}w}MC%6Tu#6 z13AA$W+1J$BZw%a;iz0Rk7Poy&k1lIB99vFt!l)j+G(retrorv@ zm_b=!kIj6AyKMl-F#Du~;jZ;yggb~154jkw2*zvPWA*i+u*7Bcg>DJ%;+L^QXu34& zWAIAHNZy|&U#QwfebG7FI6HQzAbrt#HLAbFC5W^IXf3VYV&zaOLh{Q#Anv{MDv?z$ zHP$b@>8=20HN+oCV}Lpx$;K!z@W|&lXncZ}WO&u$eH-TeX0&$LR1*1|Elr2IhkPd= zK>Ufs)zk|GjIEZ*jfe&ZKAC}{)?){)nY{~8B>wYC5%B3spe~SGZW=)1seSbt$mQm8nH`2L}=nd%ja*u23GIurf4}&;_Pl zMC-YR+w+t&{jD#*bX}bQE3D>ff!iraI3z-I=k%PrVeABA4X)ZLyCZ`9v@jiW(-%Zy`1!+O8C zMT+gbZzE>8sk$vG1yOGN`hfjck08mh)VH@}>C|c6wQbDoQlP4`CZ+ z`Y#h4vHdGnhL2TOzYsFLI%@cOqL`{3Nry&dShD|e{n$F8WWVcVKho^rP+MzABL$^C zJryOfZiwLW!mmaPZ<5>jQKMF9g*m_&bgABZzB+A+R$BnSm^2`%C|;wz(Y9#$=wK6L zN-Y)o<#3lWZm!|eIB|w@N0y<4dwtkg&lQSJMH{$+X|BS$~$BF&TE@p|y;ZG@csUW6}wA7uAMr|iy zmnI9cs}X1iZ&Q?#61^jFAK%R`+a{Qe*XaiDg|a}glH8`jO@U6C|E0B%YPOleI9!D+ zW=Y&=2Q2|n0jZ*d5foc4!AZ#L)(F2$C(|8SIw_ZQ$U(LsX(c?LGCpElV0}h38OVG0 z`E!qj*pB_ow{fGy8>gFEoqTuRze&#;-I0f1Y=N;cPgVl+E}3fcj;kX0I$ql62T~{J zXJojmG06xN$K{hMejX1)Ck!?B>Lyy$F_;VklyvSAYdYu<#eb4$0On;Ls6}#;mRLK$ z+$KF4wk&_^#%j$RHQEuiL{RGaGXcs5fdkco&WRy#`L&=&K%OI*K|XNh0WJ+NKYkkE z%~~=b(DVyW&=x;xpC=cPQmL6eM$YXIiH7jiZ(w7dN_(Y&)0MUk#0dnVE~d5svvqzf z$_H$80ObelDib*IcWThKT_HdaBBX{KqvJvP>zq222iV+Bczt(5P3wVcu~MEqI$+Uc zn_!v%T#EU9Oh0}RkWA`#$Ouq11TYFutRXT=fT%OT0;zF4aiE2Vpc9N zId}mlHP~GQ{{V|s)CDwwGyW%%5%hTgSTQ?5)$&jhv&9%Hi%DgDfFU^tzE)*BVC$GQ zf$GgcjG=m-iYCydgT?#+K$w&t5Y;opYK=zK)5m(i_REy*V5wIU^DdZj*D~Q;64S#) zk~eD~C!rRSunv4el$={+J)mMcVBC7bA$fiN!3fHfl}PEH5#X0dc{^bOwd!ukp_H0B zILiy5%3-zk{CtDQq%0sT0SQBoKGChc&c9^Rsdo>~EhHtU+yeV=Try>py9ZAdk^woq)$ zRNzD@CZ#H1v+l@}`W82t_dNP!MX!o76sRSq*#g%V?kW`k%3je;us;31=h-P9PNNee8gb+FVPDm@D{^`7iNSA~6(e@0miI8qRNHpru*fH1z&Z6qE^ z*Qsx-w!;aW0Q&J1X!*Ag)Emer0h20?uXn(kH};=tjbQ53v{nmQOP0bmOHK{bA%Qak z2%Q`%4+z_`)O^SV0hDjhH3uEB;F-7SB_Ib4b2~J$gn3ZWfserEw|9xlzeSYzYM2Xh zn3@&I#!zZ%Nuo3h{c@L9Z$`O~m%31FY*I`_32~@D;8t%eM#N;FEyg28BqPKUAPRh0 z%(b#2TuKE)lck(hOa+6~MJpiIA@Uq>23*a0b)au7j5hE}d!>$(msT0zf-rkh$B6L= z5fPPGvQirX0y^7FF%@(Xi86^9YABG{UQGK^o*G&dQ7$nWc%A@AycIgYo6b-C=0gB2 zG?maWT@*A_zn&xT6wuQdmiAwFEa86cfKX_@M<3dymFuvrr-pI}snJ4d88kBdajz1w zVdIzvHjb%be@ia73DxyC`rN{wmagI^uxJIH$u7c*b( zN^l9D08=zyFCbpa=vx>|CP{0HVOea90vrY^fy_7+3T%^%% zjzBEJCiHD@ydHz>c~Zg4$D?&$WIw*Tq7Z@@qst~G$B^6W>gdYu6AwNiOzm8j)8KHR z#8u`fj>{!fl*p6wG=P;q{h$SHc41?0e(n^U2PSh1H5nNWVKYuPLm7_UkOB){5i(~3jhj=NFcoNJzl`z2*#NSXCB7rJB`l@v+1m0KW}*z9F~jf&60*d<@b zLn40~3NLDntmCa~cGdaFTlaZ1k#2}05irl;3BCf8QDOm?g>U&8@6+?AKIJBvr|x7f zbI%wng;^UtD8x6;53U;dPT-Q(Q{x~$W;gW>bW}>JpP+C25qRGp=iJ@$@Z+>9HX@Ee#M`44@~o02xV*86$l)L-YXS$T)-GxA7pIK;uHDLzm!n zV3ZKv#19w)o(IBA12DmBK^zF?1286`3yIxwb0&sO*FHQ*Pid69fPr}4fbcbbri3D# z&ZlMcZF#V`EFy6EY@?;I+YhAvowtMrcq@}gjQD0^Y4`%ry|xJ$>KQ{L4dR;-W1Ilp zs}P`jr2%xWG4U}5$HQvBg`<)BGkcED+aC=uGi)n$IS()on*LifYmExz+v*3vNk9|R zwtVOW{3^sQ8v{HFz-$JBj}r8OGxW(7aUUSq&e~7V2L#(Gj|Z3m!M0{<8}sfpQpn;* zM5?Gp3B)_3>kENf`T)*`Y>|-NjCW(0a9Fmj_+S^JVuy1_J4%q{lU)p%dY+FnE7w+HcptA_&-5q zTrla}e}t6%L9qIZo-wigNwfOTkTMoFR+fK6%G9PqiECiqO0`4qb8F3TUS9EKT|;6B z-H5NteBhX$uLBI7o|g?VyVDdXFRwn~?4Y|vX<64K-`d*xvmBE}Rm zFv}j$R0&vkZ!j~sU#+fPrCzVb-Yrz#vSo`uORt>+onIJ;#~z^VYC@XC&D5)%o-(G2 zS;@RB9B#NlIY@${lO#peZv1E`TG5H!*gaUg@`DSSe)}Ozz-M3G=M*DjKDee>`sc?+ zUibQo3Z~*)E9dL85ERvClUYQ|yI>Esv{!RyF}2RPlGIu0!3>h>U0(ezeeKGzu9L4o z3x~_rq82xu+>{(->8ej2hms;+Bi?pWK6SMKJ6@4rAMfuytV2Y`f8VlwHhMKv^$?k2 zNApS&%|+EH)upyyQgi|G!;y9m&B>CaTr3{cKeBw|dzNZm1ekaCnk|nBM!0?W(QMvi z-%WqQY>z==<;v5gXo{q>T_470KXP)o;^nH{-90HUlKKnWC<$0IS!k*<4{-`o!(SJO zwlJog6yPQ*akNC6j9PhU8oU7)UiUw-M;eTw^WAT+>BA8(OnLOF5iB2@1Ex2yrDg7^ zwdVMA7oSSfRsRw}Yhj2Ru_)QixJ|<5mph4Xa-qkUuSV=GSdC~*bC(;%*%lzvQ0axF z(@?2kT4YLf-hKJq2eWMrVDb`@pk0LyqzG1RZqk}YJB)UsWs6VB3ypa%zUfdD)+AGSg6NHM+Diy={nMG3+!WTUb2Y(`UNQsp&77qx!>`G&s>G zc^$$Oy8T9mn-|?+cbXB z>tRszHDg(BFKF$EwHt@o<_#vPcBYV>*M4JdFHR6M2zm^TS>8=}n&>O?wt*3^!fo#6 z$?;&C#jw(>_f@r#6_1(Qo|OboX)`*-H5RYNlIsrV@RKIZoU#yMz4bczGxNo$9Xx#3 zP;=htFYC26It^z|Zs05Cx?Stw**9cE+gtmW4|_kI(zk5wESrDHIXtsoFWZ6l@OASu z2OXv{W znqL?r*5Er_*Hv^(PN_G(sW3Sbb5t681QkBZd?Vkk=Fa19&*D|P`%u$_C-@X|aYxB! zaYtt7_SI2j)OzIXuJ+7)exUtx$21cSD#!+ja)UIfKsaOW>!J3xIeh6^OREs_CVR!6 zALbOXZ6EYpxUmhNA{iJ5QSC8bvzXxR9vKc&)=FU3o+Qbo4|`#)}PZDJn2#N81C^!7txg^5UYLvODA`kGd?a zN#>)f#!6CW!*`!(8_Wg2s_P;SvNrVP^39gvpS3&~+iS0oo{>QPDZ%a-#I=!?+CG2b zxs1P~z3}!lvnQa+#qb3lr3836n@ji)%fbm2 z-VZWKAxo)|s_qd*id$r`Rq|lwzFG2j_VJ^He6!Yi*Wrralq^nt6(GF0%ZgKLHy@wo zIK8BYwn!P{V(CQTi>R7P`Ro`mPJCpVv+P-9CRr2O@yQEZ@mZF_5>R(n58=77P4v){ zEm~|G5q)u0U#sfq;ulqZCu+Q!^pD)>83gljhaHcn!TPSAHaYG){TY z>R>#BbGh%}v|zSlM#PD{$FdeM&1#TU{ur=;(m{b2$tplm?O6EyM*GN(B)?^Nbu|Gs z@uXd9oU*jxBB)ed$rq&^KX+MmWk2-2$XkJrt_-`@@Z_Ff*1}V+_SLA)PSepzus_)H zx`RTUvrtSwn^*Axq@?ShEOJhDgvNqFzXW$~0=uQ^=S2fCKT&8TZ~M)rS*FX>w36Z_ zW(-w&zI(3ozNtlURkD%H2ZTc~#SlCsE58n5un7PQj@|))x6CJ$w>?Pt@Y|jyK&tYG zQ&McDdmr=L9M&c|QIR~^$dRzWhkP4XdJxo9rGS&2i;Xjo%h$y!J{0_7_~k*Xjj@UX zvm_1RZY2j8XTgtU1(!##!GQoG(nFZ*%Dw#+j~2mO?6E9;#o9=TF+%FGr6)%U-KO;RY|RF<)V{d;_G?~OLOTER0>Zh%&wd~mZ(T!wPVIdV|IG|^qdI$V0x?5 zRae#K>5zvhdvd){UV$8)T(SWGL-)Zsw8HK^^MLzMEkr7Uw-Z3NzBs=z-~+3i+agC? z1Djc$E=r(5Y4QbYXnP}RsSfr)ni*Y+6$;(qq=|BHhK3Sd<}Kb3974=@ULW=V#A@-e z>d1Su-#93KE2b*<#1YJ8pCreYrA#&)wH!t6yQOdiGI2UyxoTsoRP4NY8q4JSWffbcZC>C-+CmVqjznK!bdCO6inAD|WZ zuRm`t3Un&oRY7l2=#Uq3Jqv<-?hv<1RYhO)J1@t!X5NK8^m%e9bcjE@uXHkpJ@6@@ zTV@YKS=2x;aXI{DO9NF_>9&T~$H9Q=o;m=^dqDTbC=}GSEVIUQ-`}QD)TiE>=Q?Vs1Bw zMNJ|Fl|@VqHdY+=7tHkYYC<2=j)I9pqO-$zCP%F)+~&$6`d@9Vga#fTv@*IOYnF?W zmN-P_tF44*0SH}|K&%;sWc}n@jC{Q+ij(@|_p+7Z9u#g8tdgV6V-)v8D#kDj{#o1( zsQoJ?!2pS)nVx)|k;Y^@4`n%+SZ*4Kylo9mcun61><5M_ou)(znGnK?v!teAlsv=Q>%*y>Rit0}{-l^6@k z$02p6;wYZ0;U{Q;6dp$gzm!-|RDN&C1Ca6%{@y1vs*2?C_J>Ja*nNTp$_R`-%p)Xa z$Z3K48Dn%0<7oUGKYs^ypnF@1E+UW%P$%A(J|;k;47r*m)*@3p1~~ooKe6LT)gs_H znO4yW%DkcbF5?lb4=2~+FeW2|stFPwtBf?r7-4-Fml1CiYDD>2k|o_F0a(ufPM#Gr z9~A#7%m|boY4AST7e#(V!ZM51hnz7%*_J5`Nq!9ZJ1vd+>B;!MXFt&%sgsBh}$oay~qK5(gZd(iuB**HD9RYB$O$hC3Gh1i@cb2V!8EiamJ5vABK zR1irit)3~PhFKkAZ|Hjd-1~^rEH^Zi4rEv;)?woxdi!Ki@gj!pG}O;ZH*%hj7Z&#Tptu0C!8h! zZMJ#oK@=4Wiw_H>s(;H#nFE}5QI8LNH@uxb=)Y^!hT7+c=0WnfX^z02^zGd70wf_6 z9=sxH7b|YSRYR&-sw!)pe;f4~RF0gNCaITnk9#d*ZFTGO7%=njrwW8px5&M7O%=oL z*n0%|URVp#8(@27T1i`xKHy0ESm45+DI^PMd_b+7?f0&JO^!+~O5 z5@RvjfzlZgK<}Awb60wX`s%=~x+2o4T=)?AZJ;3mr87u7!H|H)nNqpH>34C66(!0r z!Phv&IG1XPibn084LU0-~%#PE-x0C<2DQ1-}ylLmb(8a>0$qqF7=-R23(x~Ea{mI zrKmvx0E1uaa12}SfTV|Ig;;<}nT)hFfcViAob@f~6KWZZSJCwaGZiRcyuIogKN=Y< zdpkj~>)=8!bVe0*mI`V6C4x`oYVG0QBgQ@_jO~>yBYNG2DdZycTD_5>r^+{Q^9; zcx!dRF*zmJJ(RwCDpzoqjP;WHMd@SbHUW=|gUFWa!=te?fz7_5JGURbBXvP6l&`}s zJ-*D$y}J9hzIFDwQzv>rLxNG`={W}Rb$I>_TVK(!we)T&Qj;1*UwX)O_Vn@L#l{s! z-WyqU{<}vYs&%hv?kc1S0S~v!%;%?3o_B4U=W%eU>(>?6@V68DXP7PsuG$ip2`Q^X z%Z`tk^^d|f(rXk9_K%)v^0}&MD*hO{l!l^GNtoe^TIN0J&awOx-o&`mjCJjdFJCgm#TvVclV5GH*eAD-qM9 z-t`tTmNP{A_Nx|q(GP#5^oB17FVz(#ErHB3%z?Uj+4VBb=`SpVdzKKfXL3xmE82un zvZ03;d$@v|v?ttZ5W)`7*O*M>nQHitcb8ixSAOVul)0p! za^CeM07L2{e>pI@gGSn*w#S3{= z7fdQX-ekkB9hlC2V9A?g4y1U)SA4a_&1y*zoE7n-EWlPovwTkl_r%`s~()O zo*{VGBwDlXWH5f~r$JhK^`U9$d4}K7R|QHIO80TolwSewurpZRv>7X7RTAmU(yXt9 zc{`$aACqDSq(VAKH$JfIsM^27+h_Xbp}$>=Ha{FT%Hcu0G}<1hsSuM(^p4k_Ww4#& zM>@MMUa*F(`mXP&8*;}eqgUOg+@d_Puw2JkQbUr0i%kRnC_@l$!F;*o*rNi@W1lv! zhC1Qm$0Y8)(xaABtp0jKvr@Au89O{_W$QJMumxHTelkz_EhAX^zoO_UTq+39Ku>Gu zkNITKUKIIc1)8PpL#1WP@g_$bX_${Ck{*E+S1yD!>bHvqrTo(cB&su27@ z)Qf%tXKD|S^p{W_(we81N)ieRL8C_Lsq+)ge#<;FnYKPvCWBsjS2bDp=DiF-NVR+a zT&pZ z8wD{{eJw8hjM7j)tGRPB=Q_VzAwwQM_lHT`*g?o9u5EdQAHELC^Ry~j95E*A|8%pe zRX%%n*7Pla)Q36ds?)sJq~zsU>a12w>uKp3>r(%NQC3pS1{R0nVEXZmUULeUc#`n= z$&5G5V)V?jW}@yJmvGEP$;CBf72FU5cX;aav@_D~;f295GEAm0OhU}>o8kfv?BBhr z9wD&r=P_oITcLa@Zk2w6nPpmNeOPr3s@_Z|sXJ~|} zcS;?C9wx-o%+K^Kw>663J50!u@j^cvS#s^4^}RHZM?BUj(T=s0eDla~)2NU%VsgkQ z()wvdm)QZiLvfDO9uH#3XK6>Gce*-`U4zkO#C4Rp@uqLttx>uiYAHp_L(bAm>G#Za zW`RbNem5$y831clGTdHkwSz4$+!n?7S1qV|f?R4)?Zf059>dM{NDANR&@-_L?;+AE zFdHj@HAxk_E}E6(ylFqU2dnp!l8zCTzVVrToHYf>8<|H+s)=Zp6%!cHWG}#p@)jt+<1x0}PGEXM&psSY$g0dF5)v?7E%8RUe)Atf{`56its6ROuTUpe6CI zt+qKb$SzXkwYF!`K0KYbP=TL*tnfSrm&~$&#$8^&)?aNd;Nj>TIQbm-bD|owvW7~{ z(QLV|CUeRi6gxuI_SAv@+T0wW3K#pddmZtCQI62YgU)15UW}pn0G4dWg#gu}YhdMQ zo`dx;o&(^|u?5rblWYr6cjUT$VNG@G2`pN;1(sY$&24H4>~?tUIYLVxIZlq2b(Q1xRhLwj zZJy^JWPkYiV+s;&sMs~y%YiFupM}tJ&M>>QQ9V=4&>Y*WUOl4Ri4?iJ%k(c|tMVcMV?!5FKZ z?IoWI8pgHl>#7ot)0#ZA=%ivZ()Ij{>tK1xg}uEKi`P$W3W^I8uyh@eoepVi)T2hM zKgq^Wiij&HJM@-+&I}-&{h2j+(Yv_S+L!BWPiM$$TqR52O+%~YLi?VeCi+QRz2~gl zjQY_H14-yF{>opQ&edC;=rX&)XGVCYoz7^@nj=e3IkuPEKe;{odJ4{C`7Q!Z_=XnP z;wSs^v%69k`TGHcETaDC_F~<=!q=E%)`cWuKM^?JyV7xH)N)qES4`y^Oy+_OadkaY zUuI%a6Ss@U9pYJ_xcbE^+>mJ`98fv(vjqo#i!@5oP;wG$1mqmXaUay(yG{DyimjXo zO;yN)#2e1s$FU2!s7V9ac!T$sAN3}9Jyo{+_RWSj`O~QcQ*{Z|)0*MQ?+TSoNpA@Y z+>y=Qs4UXWE#EZNfbV>byyF{|`y8m^`;2dtSdDElBq!dg4UR28Bo;KP?`umY*j*bP z+#yRiKA#D%D-%66GMPZj$g_uP?9#kpno_GtdT_8FDK#?e@Q7{F@&$sfR7TefI0Hcx zWAR5?;wa{?G6ydbwS#aU41s7COpzqPx$mFs>Askt9N>;f34N02eD`^}y@WhfP~O?C zu95PHBqACdi#E40F(|;k?I0@kJ_WTXA=%G!l9-wJVO;7DTU+LzIy9&c3hg)1;V?5? zJfNz6nyByH!Z>=@;qXZbH$SxXJgy*!3#Gw!>mA8?@%0NgN=w_P$8OfoP6wu+)1@Gv zD~s&bZi-q`e5WOPwW*4;GV#8~v)(d{drC{^L2u7vNC6n(MuQqoJ`E{oWy#cGGC6z5 zPO&vMquORtD$y;g%P!>W)*daNc*Cdf)8}HPB&A32aICaPB1`ep>M@Vbt^xLM< zw})5txConvUj}Otxx|MSQGa!P8(1dfq4KgIX&^md#N2!ErRr$j(;^gpUIHHt(Wnuz zo~zDH+3_?Het!F5Q)LipOuo7VRbulE%9#RHbcCsw!Q7p);0!E9a3&mLiwJ|5KbY7&1*Re z{^XlNzMX%1#&70pOl~0U`vW)(X1)iGlsBL<s7eV)k`VsE@ zwH#;%7Q4TSx*c6#cMZLF4QRw<4EQoK->|bvSF+hA1u=8jO9hnG*>LCYNXlz6Bdsi9 zDyqcL?tIjEJvYDQnIY7jpAi-c;p>+dYAN{+DA*At1c4((qxAxfC6K<>^;QRKVL5TkyNzz%R+}GUe#b7ls!p42gJt+pLVTYk$uo`w4W8%I5+fnz0`^W%f^1;%=PT#`L7WS?C zMxMR-q-_J#02R!?*){z9uze1bbp5UU|FOCYKyX-K3GQKDGE6|$dY1eAWB}0gcMM0@ z%u?4>(@@(^{~w{8`_2B}XrCG8r31A1yM0(LvOf?cJsm?$8+}`Q^M7vrPax^PjjRD% z&kBHOENnpAj0|jKEU>I&uzm6OtvArO(>2o6xA@0xXaAGP^q<05oXr26Q*0jKy`VHN z=5RtDGvnWgzm?J2ak8DCd`n7ZEQ@931=>UVKK@2%aJxTAou{h7ft~-#SX7MSBt%fm zaD;MIpa%Qay(U~UQ(jz_x^q@KmE`s&Ekqglwk|@tU^J)`Jn&4~Wp93`rbXa-2d%~< zy`#MAkZ6;n1?6H7>-GL?<5CR!_7(ufQsBQn-D*D*NSH0TbAEgA^JYMm(7u(%-C60n z=o)e8Y)H8yy&G!5{v{F1RdkpxvGZ1CzjV_clcR^(bs)r#yVq|7l3eu;~zZs#(4x;VFx7Y+7I%G z-PKsWQ+M^IvR&tjm0<&xB9n@l#>x3#^iyyvjEx5g-cKQ%oi}PdYTJISKrGtKQ(Qe` z^~3b3r)kWp*42~0TlyQGmN@w@; zD+E8XXYkPEj!bE{Ne;ms$N;M-}`~?h#SoPvmXhC_m*So3}Z+Y-~l` z`o?5UX=LX*RA}l5g_A*w!y2QlFmvZCg)(SF)@X6FLCZzCe zY-hObWHBX+y9PAj)P#cH9pP&?lFSZxO#Fh*@s_N|3b+BQ)XWC@5PTSD3ac_R zF)TwomWu!Np~i3Xl+kq8=2ML{8aMrgBr$EJk=uuUN^`mPC3*y<$`_mv##9S|bh}aw zm-%761F@ETtpeeux1|pZup7fZx0A_MR8B4+j(sxR7sHdKJfT{4D_X&5WLaRRqxtR| zi`N(!Z27ty4uN5!*B)6#gHY!aC0*Opb8LFFVF4#aN51DEPveKg;wTS85sX{1;?is@ z&E222;YAyf@-}OHV70Zp(UBdWlxa8@;yF*sy}5qiRftkisp(1S%{ESD(eBuMfupx} zh|R{tM|++P!6N`kX`x|kc?MMh3j?UuNyi^ z5tResNDV^r(;PpK)M;kQh?#A+n79`{ZWb6!40N(!wHI!J_w%S zx?f&pKBkoK7ALH}x5LU`pboND+u^X5s5$OHnfSd2Vr-H72_J#sC^-R|xJl~Hl7#edUGo*CZ|O_`ix&h8n@uaE$Yq{p*IawQo;J{A-` zOEQGR;Pt^<$M2vRB2%H`rnA)E&FkML?+9My^~p^%MtC8`;vfA^+89A53z5Lw-#(#? z#yY`xl{G7ogy1?;m|H?+_Lo(@dfJM`adhag0XBDJ;>qhiWF9#OBNA)El%s))VEw{F z`-OKW=bbb0`p@M8DuU&UnaOs1Fj??Beo7$7@JGE1u0Ym_)MxHhLMYu;1S^BEFk*}e zUiSspuX);f>#J<7KXD*ri8qLFmf&QH!e>tbE8icMt`H9K`fpVq+^wN#f6o$S?7&r%1)vF8M;UBrOh912%?+6CUWoUWEtch(Tw{n zi>;a3#lpHAg*zlDB9$?0sER>7{+QEL(X^((T-cgs5#zm_?6)dH$oQt4aRJq#3t7xZV^D?AYlF+1LoU1R)Ec1(F_^U!m@rJ^{ zh$siJj%K~>kaZ2pjs?paS=!l?3F}gKxab;xc4UgF zPxH^t-0eaEV*CJNaK@w+^Ly|Ri+}iKLKm@F+&TIjtIW=>gUsUf^RigXAtGXg{yOr`2FAM9?h0%dw z1KfJ!nQajcJHPA=VY8!v+5Ke8W_`kXrdMU@Ks&=i5~j`RgmPGf_5KGa>K#9Q88Tcy z;4(F*2gS_|54@foeq6|nBT$AiFDuG!mxxfG&a;_;4p9*zuc%7t+W$or0wg5lrb$@+ zb&k&tA}?|#7b^)tcWF#dOv}++GnxVBHN*v`&=Fy)VD{&V!Mbp^!8&j>ey=G5+lZm9 zuMsq8JN3Wn?8|39>V(_G$i!>)Ho$r~h0qB{^BSQ{ifQI)VBRWb=Vw05&SL_qz&!KB z*Pv7FjJSo_0G)hw%D}u+phERaMjRBQW|?b|w-1lfm>w1Mq6-c50>o<=mldsr*TLCN zMv0FgGsx&~?fXuGSwa}U9d7a_pR@h@`yY&w5B1|@AVgLl86`|_h<=#(XeS7*y-R=8 zu16R|PCh^=_QgCHf{8qqyUzQSqt2)f!N2I=T2SqkyU-A6N{&wr zq1ul0-JL9+>mp^pG&JQ7p2;3OJ~}9NP>$&9(Oa3&)thY7{7xb(Ug3PnI81?S6)5sQ=^wk{+mfnzQcEK zNB2}ea=JA9`e|z-@T*FdYdbq&UMj(fgSatPfZd`baGr3`y@YHxm)VrsGcT!%Cie(` z{fV3(vtXtAo39IN@*CBUZ0#>jIM+kf8&VcEeytz&KHFnA#vIVl;QG~CLjJNtQ5QcE zcs)xf>SFF4?ez?p^~c9FUJWjrr)ddhVrI43Mv$P=?DT=-3wYmzN| z6)(>;lvABU!ALJ=atL5IbBVZ=b@S5L4af{1=>D`Rbb*~>@GiAPJ~=;P#b~1vF7;mw zy{0@!^nW522p=pb@k|x#VQyL+1;a}N2{pm~TwUa-4xx_VfFOVTkQgS3dFI@mC0ulu z3#vQjB6ipg6L)N^5lV z+c!YqVEt$o%JN=(>_-pd$nY8;F+8ON;``gT90vJUg=0uy;G!dS9q~2E+p2Mk-N&lw z=B4Zq64Y67j&l}c?7{RFqhff8Fc!w-?p4T~XHHc>9x z4<3Crn1ynk$^Xz9S;x$USJ#Hb=XD5Am#v?eE|Ulg)CfE$EB@6tPVIm-@M z2Y=uHlu#)NCk~~^Q${x~)!VjO%3bC&_buI8uGZV$kksE5Yz?MX4Xv~EvFFAb#P|h5 z2Iw%G&h%pfy!#-@dD{FR45le7qLumW=i{HWs2EJ=IY1Bh>utMp6xlFo4_x_cBxo9A zR7t$g)SV2TIlSRrj2OOZvK<&Z``%nqzc|r&Ft!v?;k+*AmTczu3VI2VBhd&BN#VEY#`pJlbo}8Nk}sD02_0-9mTNCs_x- zILI`eVukunP52)je!i^pCj`3M0qd$xi_qMOKaWi-mUX@K&oBm4Y4n^ub*}JdZ-kQ; z)VY%Ci(#Q4_n{!f`-bONnz(H2)PDsJvHz>>%m2sl(4UCSJqYw)AU6LiY#=T&W-gd1 z(BBagSl+Nd5EC6sOFK<%Jv|%7f5a^AL8<=@yoM2$t^OV_f)S8_e*kK9pC=3`{v9`g z;WkFvW_Ft9+P0?u)RF%cr4<0(Fah4eFzAL8Fem!m4Okkke}HfP-VIwjZ99A0f9wbV zcm2CR(tnQPF#eNzNqsi-XEjW{1dx#woD9*QJm|M@xK7gZa`nXId9nl}BZ(g5)5MHN z&QuH*@-=Am_opjSY}rsm7|sNhnOl~v)-fBFm=5y+$=Xk z$DnC}twH>Lzb5te;J9XS{x;c#?%AgO^y%f;%pGA-C7P$eCa-_Ugf-++w^d{Id8T*sOy7TqUs!yw1{!iE7spsL6@u~LJOG1 zD&ys;W&n@9X($|vI*%(T+65OEmH5?+YwTCR4UQVcDz-B%fF-~49NNL7M-#!aAcxL zAh0^vP00`sy=xzz7G&nWJ(`!P<}Prx+)p*|O=jH2*?aG(A~DeDaMn;)8@J?AE6j11 zB+|5qJ(}^6=-ktJf%FjKbHV;5G!y~XQWC|_YbD-Mn)zX;9DPc!0r^RRsfNSU+7V=8RP^`AwL}~jK0`?-zAhS@<6S-wrX}FIP;-KZ*5g(cP;tDQth`+1I>nW z?f4vsaF%`-{6QQl4jzmqVt}=tzwoO03J#(XQP)k|`HWUfnzd*RJ1@kybjrxwKeKH@ zaJ&?*INt8Ol;i6xAv9a%#|yJVoF7KUH7si4<8cXAoV6%Cx~$?;?{w|oVpYg0vHw5r z-a0O-Zfye=DJcQTp(RCf7`hQ9q(o3ka$o@I?hvF?y0Hl94(S#c7!Vn{Te=&*jXvj` z=RD{9&inh`@BH(Efuk|_tFp3vIR{4FY@bsGb}<@hN!L{y z3Cah=!BJv#IZ~_3==2?m-IpziwJ1kQ%`ld)vL206r4S9+JQRi?^STO=d1X}VHWK2= z6>%#PW&=iW4k#xmQ8*Bx82lz|@H{fW@tpHGk~7IbIHf0EYHc;8!*{MXY3StOlgP5; zrj_EILFXSqo=l|gl@^{-bv64%k@D9>O07jiDW1$irDaR;jlQ+YoWGg#9Di)IMU-f! zi>5TeP=ud}n@o*c*Ac)ZPG2R}+A&xgz+@D^_IQL~uZ`-eT_da`rdd$s@*e4e6>rEH zzD_;Z*;P1YoHB%2SOGdOU_|C_S&DDtGWOjVldUy^5ZbkKS5@Y-LwN_6Ctj7CZxLx` zxz(o9rJu@$3Dr*t9noentI}+XG&4nl%4$|;XEY?z`28D11fPhnwwW98iKgg+Wv@m` zveS`h(7CW%l}6M~UT((1;gA=ctx$%cJGYSJd}>HySJy1H@Kqi58Bu+=K!4B2lkw%s zNa4b_X{)_bO$}i2AI>!Nx5wAGDA(l{3_AuVbW_ss$o0m$56ghigO$z$>#LTA)4PBq-gDxej#Z0zt&d^g#Lm z;U_RDq6VOu=*w8K9i2~JCe$O5+JoOjze(^q6BkB zF|aJmxn$PO_BwL=C>VgC4>Lf>1}j6#(%+Oo$$B2dJ@!ddCRmF=)c=7@q%1YK1rq!O zcmv?D;dmJ+Y=3u&0WiqQx*%hmLUSo%xQxQe+pu!-qU%?$n1gpIOL4@iAPCX%$6 zu#?WcK4D)bP|NFc>?6E}+PvvUO41Fzb+7ccBwxI0C>R;&OW)I0u#Af!bGPzAkK82j zNYTi2@m}H_VViEM9voS7n|2$L^(k<``+VJI;jDk2g0Bog?h`ZzT*LPXjOJe;q;sc& z`lWN<^se0h0WNl=G5UhIm@O#TdiE3Fw8}%?bS^1P=!;EA#tb_qiF77n|I%7-&dS9Y zvHH^C=l~`}z4IL=wDzFq$Y6QO1MWMzvpL~jTrs6#{e-JfrFvI8b-~Iyc?P@7%ThlR zVHId&^I5+;g_oajxo&f+05rvEs&uc8l%*WzNUY_+y`RAc_x+Y~kinNzE|c0wRy_9z zSuj-u!vpPTBMYdXAgSQ>CU^pLWf;@t%bv&@ZwVyklq)jaIz7kEFMVB*mq~ zc#MRL@NR24uvoO7r8zNK$W-@g5iKVUmTN(TLkonG+z=EnN#i~?TIki+a*WQlFHJFg zJF7$7AfS@wt)ZP3xCgR%D#!5p#*)t5U0e6}YDQY+&UGn##?2N$!BcUbA5`fvTWCLfcSTxdV5nPDjjbZ9Gezr$UYtP&VM<4d@9idR1?CT+QG*=+G2A}P za`e=@FdSy!5T=IHFE9I#`Go+7GH?Os4K;+3P6NjL95CkZ0b@Q381rT@*OWnNypWmTSF7*RwJn{t_As+fvl zbq7x$L;Zs^_k|m0ru!Qa;V^GdVpk5{VazCthT2h6}?6IZE zCOkJZ;Y7W3$c4OlI8Wuf62)psEf{qeQ(CB>$=QY$c9c_@u?@}K6GGE>T8E_u$w0o# zrz+$+xL2^Dm}tzq@GB<|gZ~BYJJ9>s#)t1fv%QPO^2W&Ji`09`UZs4QWXW^d-bLRm z`F6k3LyV5W??7N%U1J%lee}mL?+1@*36cxb^_7fCqt*ID;8fEewYLh=U-M_qtTMOh zPOR#Qh(7@1{M=IAV7OOa7}4^nZ=;IPEHhO}QvlO^W^cdCsV!zoOutG%px4O?S{i=* zXyeFvVtJ!mSTTKlDsUn59Ud};R*xLsk$DhnP076&g_PMA;%8XL!_k{K!KgfOI&Ov%*YvnO4*;=8=ww zE(b5qWF=4#&%F#^w*DaY@zRs4Lg0njmKB*cRk9DANLBzTEoa4v*@up)MOJCsOa1Y$;QD?LAJvrW?oNQZu_{1|DGX(XU{)ad(6!s1Q(Zad4X+|0Oi^a@Z)mKFNK z_o~}i<~mX=>EcF@Bz3s&Td}P&TCt5XzUN4at|D=asd`Z$|9&S(OHyP!B=Ys>{ZKX@ z`axJkEg{~BCaS8(yWxAfqdPc*QFzyc=9Ig2>i2UfE9 zN9%+&GRu1dzzk=G6S|c-xzbZiVk=w6oWF3N@b-9kL{0zgab(TYi9mFEtNc-RE6Vcu z5G_-Lnya*=h-horqdR6HQEus{TG=x<_xpzmykd&m<6LY*EDYe}tDq2*3-ZS=;fJY^Gzh1aocnqZ_bp{rh6V{r*&l^)&nO8&fQ_vHRpzJT{q~yJ^ z9tkTTyF(#&);4yi7RZ|Jr*F3GP=ay9vLQ`BRN~U%zKdk|d;1{5h#37&mfo0-GrToR zDV8_hEoe=P2-*0H`2a_Ls93IdLVuM^50{>tDI4=?2hQ3?l9+-XP#ZPP+!6s((+S?% zMzBnbst(&BTGLyGwGB4xgKjgC+n1l4?|7pyoHF@Ttt~Qh>s-W0JaSqlD~Zu3n3zqx zkf2F9Mc-f_;7U3nAN7M7iuLlhBXg3@*6G<_=!ht+!Gf5s$=}6ejcUD@KsICB6ePr( z?c=a5ElYIrv<-#Ryq3F=S$q_=0q1$o)Vrt>3rwcKw28u`1@kOo*DV+~0(P0b#)iNQ zcRHlX)JykJ6XQp4{ylaz3f5j;oba1z2_w!J*gR#lz78`oJ>(! zsi#tcd&0#zz~XQF=4!gh`T}us>{IjM+wFgg+5GG8_5UN7&95+>|BTuEir4uspe8&5 zH>&A3s0j}@Q2GT|@cdG7`ZH?c2sO6SH?%j>x3#e}hq~!Q&A@+wEdDi{?teiA0~jF) z@FN4*$)Ak5kyZaE?BrjK`3s`N|F5xL|2t#&Z^&_gegFcUfLNs8eRCrP_9s;9-xveL z1=;?kcm7LBZ9IHHQrk`M{KK3Z6|n!IcfkK@kieh6uK$QI3Gx0l-EGYJ6~H9Dq5*ff zr9U%mgDQ0^g!D4)t)zH!BsJPIU%_kq&v_%-?t&2FZcS{CL5hsVhGBba4Gk3=E4$J>X-fCjE~1bN~2d?E;^#aO*INVq1=VHkN_ zpfkT{f2}N@WaZL{eA6Nk1z1GPMX7`97O8Y>$TOtc#Z9!=MyXA>yZydIfN zm;Dwgs8VB7E}mh1JSrekA5%e@?bp+^wgw9qdyER-<5E{vy~F%&8tPEV|G_Bbc#2)K zO)o6{8{DOn_3mOm3i+`kj<}7q&8Ig%Ril;I~TmdZ{otmWs*)v!L~8w|NIiGT{4ucZeNi=JJVllYsI0VcnkB>^x)`i zZiZo88x>EEFtTt!k5h=|iK8|CToj@ivG+)KJ(4FcWp zk+8zzM5u_tJ?|>@7qCrIJh&@qjcw7kZFXlZXPU^!lR|@qudI8#Mb+Nx20(ZoxZ_L>r5#JJ4`01|I`Fyf664g_tCbUHY7`c9 z+}F6BQ+OWLuD^GXrRwd!?eztJa9EBN>P1Q@tm%8YxWGHHrfJPJuW)*B+P_@L?i+<+ zh0Gw>m*l90mfS_#*kKJAC^c4*Ftl22lbIOY*zK-KU9=|Ne(4X1o>Is|t4F^=p^ zdL`@M#sbjYie`kLqH*2{6D0HMdj17(Tgo-Hc2sr8*%3)zfJNQQy~j`B@AN$(O(p2V z64o+izAjSP@7pcr1h*){gjx`@Y!_)Y8jUGWx^%mMqcBw_#|cb4x+LV)Jj`E#U+uI5 z@1j@u{#s4TI-i@Y(>>C!VY=1Nf)Z)1>MPPw4|v=asr}!@)2xl&E7=J_pp=Z$CvzCk zy?LJc4gHx0OlA?2JTg(9g6vh%&yZELfvNPGt?$p+Js);T66<5i>L)`pKyBhOV5!N(PO5e1d}Vn;c3K9Zs}Fj@UfVauE+pUX+@ zq$VkF>pS*7Zz^hddWCoz%7;tidZ7z>P$;CAZ7ho}xUjil&;f+pf5>{qm|koFG^^Qe z7^(n_^!Jkll%flB9S>Zy6V+0;HlM9$ianQDgMPaDu_7sE)1Po=mWXq>#0g}t2X_Ga z9P5nij%0P#=!lc4_x+DWc6j#EObH-bd$^-f^Pu+EVUAVJ6{>r z@qp6IvkgwSY|?ufYaGuqSTz$whh#fA$|Ex-Y%^J^j~)V2!FBV=tbn}g3rZ~uEB6hP zj9rJp!uhVMdUJ)CvWi_NEwu#skup32B$CvlT!8vzr79{bATrXc{+lC(RMg*@!wthq za}QTLe;HJv(GBrs&5*)D{*rsISZ{&wvu2nt!LxNl;AgT?aFy}VB#BBPZUkkyiTL

#`Eog`iRlKW2W_RheKt z2KvA+CkeI=yD*NjBHXSEtz-0?S|W60^=n$hQeDUJtiNyV^Vi6uR@>MTwbZv_xP0q+ z?SKANX+cX1D_cv>@QvdKa1%Q1gzLvCOdq|5ZgIA$uieUZvH2}50%N8f^6DDh;p(27 zeVy04%kv$0?yVXAAH;vS=SJvFYg}d(atm-O=*v=S%%7}IhzebM;4SZ3GQq zz566b$9M@5Y6(U_KgE3hd zjW*eUPGO5^tmy!e*d7l$Q1XZQ)+qoQz^W+6ao}U#eEy@9oA2{(jaslxoMe(%gvqM` zN)IeO#u(G*KW^^GWMU1`*q<_>*bBJ}0&0}yhM9z$8MV|MoHU)4D&TQm~}8- z#upt2_)8t3@-^h$@~c6H{n&Te3|Bvvn?-Hl38!YUIQvV?fXun?+G7(yZETg(dFp9~ zycEEX|La~<+)FWy(Fl3k?)dSZY6s+tr8SoPdDU2_(>x!7QG$4#1QGYB2U3XM3Hiij zZKucd@O-rv@BGQfvKwDUL?Om-F%GkgFWRXz9_R=-`Vl1~0nBFQ-W}F_RKi>48Qo`+ zXht|0DC&FgH(yu)Y}q_R==IMabL!u6>O$JW!6`Z|!U(E5VS>TlFG|PGxrYdvFPR6W zsy;s*-e(AyDtJ}&2AtZ*(k>*|1E2Y0`iwE%`v9n2bwJ#l=;%$n=xzf7)- z25)_9{3|il9VJF=DyxU>5U=RloI2xOcFO9BjdQ+((k84W1?){9hnwOd8_0^_nse{h zSM!1bB_xU~k&`c_{i5m%U%l~4a4B2L=kd_bbUEG}(-g|`5t$ENd=yr@A6d|2v~@cq zsm@4rxhP4rLPIq}T9Q4C>QRUB-47o{gPwtD95fVZ#`7OYRA`ivrkKPLMAe#}hHt|} zAoo6t^(WayT6HEk+=XCgm8b9ijOz`z$hm;Qm6*h!OJ8D326Q*Rnt%l!$+u6EEP!1) zjNuVxme5ZQ!Sq1QAP0@OF5tY-+t6;RM^D_~x+O)Lly2}T99g)SP7>Iq?J;~xrrBsq z$lbb4wPR9^ev-{-AN!|-JW&2UYiA`bD8goNz5HYHb2;v10Xbiw#xi`6Ezd5Q>zHdw%`7wEs@5cIItSB1ul$Nyc&&esVa}RG@ zNC0=1}MsFr=w~Azcd$X$N3P z%Ru;!nanYsJ%K1WmFBwkDMQI0L8C-j^y{>7c2J?}!hV?9aY?OdN}M5-%x%?0lPZ)5FTHD3umSM`o5HWa&y zzt{6lOBvcYeK+DRVJyq(xFCB}8!)LGQ;=#zD%K8Y3goiM=6*K6p!yNdpypD#{<3{e zN>}JP7!(xL5zi33_3$qKO+#yfRI16p+guYA1^x${pSZ49P;`e)7KX!nH`B{5ELI~D z4ov7spxzMM;?WmWG&fCH85dTrl_oCia2Hd#EfqW(7>Pimh_6uX1*-V$CId88ijEki zQ^sW=?Fg9*?Ivm?c_BJfCKYaaE0!gYEzh-6rWJDIM8D%@p(4uqS^=ugfs z#xpn^Oa>kT9RUnL;GH@!3Dz$s=K&6A?7%zNWc7Fo2@a+h=nDzzg_%&ImqEoU@^n?R zz<5I#JbJnpj$q69f_1;>FyXGzuWbysJfmA@tlGVj?`on8hpZvfe_M&_|IJF|?ez5H zA6q~sgsa!no4H%O(6v*x4q2D86&B_8y+>EibWDTqiB}92%1rmpJnNW=%vN1 za&Twt=BwTFQlI1j8WK{m-ctiW-S5>{8w-temZ{c8-gN$ZW!PO0^pMyT!)X2AHY<8(Ifvo zRLI2I(8%&H>0JW<6(onBj!) z2G0j{2{SjrNu7aCWKsNgJg43U3H=PZKXe|2KO^C$3BOHob^^K6WIpi9le_n)0X8w+ zqV4I)>0H$M>)uRG+Urw;i+c@PQ0$$9u1wB>dD`lP54ICG1Jvjr^ zv9aTZ^VBtOW+Z2Dd3T$^Q}F@gwne=wa>(IJ57UzQ9!3mF9pbW@U+28K^mBbl+_0}G zhIrQ(AD#6VZqRs;p-^=cufWf|AK=f*=Ts_;nP2v%ekg#T0=4`gpHZ#MVhgA{Yo&^< zlV045Lk|R1?kh#(tAzyIEww4}<>e;{=IfnzOm>lrjDfbpIs3O;)F+7r=iV{)k975| z8+kldUI_d!xjEzLMGh?|_jS9B=x4?5_-uY8XDEX+KDk$#9EZ12IUdyieS9=qh@Jv* zvd$1~_Nn|iuG_cH+iRT$-dN)NZoUQbG%gLPTnhW?gI{F!4kJOr*2?#@{WG?0R1}!0 zsWDa4hsIX#FqfC6kodpOlEaPxGm}y>XRo>(o|9fiEs{p@z6{%W)>Q4rP60v>9RBLU zD4i{i8BVn4Bm{HwXi~Ii>W@p0m>%}dJw-Mi9`cfQPk{tuUxh4qSv#2AIyYXJE!W_>(5`Qprksua%M94bu<3XAnnnGrBnZRcSY(YR&7gyrBzkFuu9&^ zc-CbJXc#c&r*@W^A8;SNpDU4_a2$4eE6?sRU|Z8l7WXq$IY|tL+9(p^;+zrFlTOnY z7atYp^nfeXn4>MQld8~bio#N_po`x;PlxxG$U#<9hkZ%JVm=*`bMRJ+;+!jSb~)9u zTyyQ*gViFlmEF#w*E-Us?>&elin$~T)<6JLC>xWqZXScZc6 zK5e=s6SY@ zE|Gr3!womuzqk@xF==T?Pek_#ao*KQaS1ARA{;~v=-T$IoaxdQoKHnWPHxK_$9fCA zZCY~KbQ=9``LN$IAjM{cs{v0z-fny;eZQA@x}WQQgj|E9V-VCCM4dG`k+3WvXi8fm zloNFZ6>9`d}z?UJzi-U%1Fzsrg*hbe=HGKn8N*jjV9)0~%<1CiYeFgo& z;FFmW%MuqoNtXVOz(=$NhV2GQtK@RZewrJx34p#L%vzK-^5$nkQj*U?q!PMa z?BBmpJkhawya6O&R#X>$6jxCZdU-#e7kf9Bd(y{Y0iAFp&DR~DOU;Y~6c=yZTPe}hB|DrCst2p0mt z%)}f>GK^3(_MSUOHKBol0DwheNI`C~rl42`{r;)@K6yN-_F*L?G21R_{}`l|6m7|# z_Vb?R-kM*q1*I)-6Vh0>b02~SeBvAl|TD+r70Ed|CVaWj5sj1Yqao(^@ zeTG4@x^;sN?oKL%k*q^MXy&r!(yhPoZi}!v}uH4<}e>w_P5N z*c>Ql<-OCb)4;-V;=&Z$*IVLk51Y+(W2^tk!fZNKObbvyNl?>z0-aGA+Z6K?v^ z@O0t3poEx5vHefSm4>JM>618mbs9oW1&^JS_16mVE%ZOVIx%v2FfppyJCZjluq{VZ zu)SgOU{Xbj-IDomXw0XOzF48vuUFkgJeR)C^I5KV{mU!_&Eu)D;u4>{E=-JyUB0*s z{q3|KSow)RQNY&@9E)gHkfdgcsm_!3+cRqPaRu;i1o82iB{DBgr4%*1fii7-i8eUL zICw1%S5-@Qx+Eb+iiTdT3@N^SJt63j%?(R)2xXo~^Qhp1YxQVurXhG6;BG2IGikAS zN{CwGWX26mPX6A|IQ9a)EaTwrI9xE1$y3soInR08pGSu|iLin`@-Ru`s>v0Z$v$DR zzL)d7ti(ifGghwq^+H@sCE;?MCBPhA6fbVt<@k_^a(%I1kFV9g)k?Xut!w+Uao^3D zYG2=s!{vD=@Q^bq`JjP4hTM`7grUR~DjwYZ5#Q+Rs(&u~85;YrLg*VC5n|LC;*ME> z`Po)k3H+e^Gmy00@q>YSIp;_JMRKQM#*C>k_)%G@=10Dg-1U5uU3qsyyGi^IAgNE5 zKE~)9vtgHW>DWtq+#=oI2QV!CEfRkpGrU~}65U|_*O5~4yj}0%F;Gj(z)Dp+I8x97 zH={xLIPMXpVJt$x6X>2<9}oG1-|LVklH zAodX)zG3Z#&&dYpU1$pYsT*oIhcVDwc&b1$HaQuPyf_rJ82m6&s=z_fHWZqhehP_b z6Q#`>pc=w|oBdCIP!-T66+vZihsh1QV5MW~dkUI-O}Da7&`YSjcc1Ksape_+kKS#% zm3PuX*2m?$xq|~k#^`&R%N#!0?L`Xi<3u!{WFb20BR(7H$$y7jZ>}3>C{q~DNv15k zDc_>fPswDiva>8^n!o?OPpP}FGV@_Sf9eDAhI-u1QmOXd8_LX#zM zdv8K~j$Nk4%M6T~rUFscWs;tr?z5G|c-a*)Hnz6&xvR3hRYw~ww+!X2+r9nx|We?L4>^D~pfbQz(2Dzmy)+m#!UY#VB`EIm+?z zob%Z?wJ@N>NvZU{uq|iDTv0c^haUY9Nyi+<7rbVK_pyv7Z9gyckFutJ5<8MEn~3$X z34Ns@$Ge_NME!l6&HYXU6!(Lgy8VDU9gn1& z*r2b3wc9w4U%6YI5|Hui{Ffz!hD4r8O}b0;J5c90V1l(_Q4^XFcz6f6+wm1&hTv>O z0~z$61%U)IaPZnwK)DKvop6NSMVBoEJih`5%STEnI^f=%jX#$s;1bHNL|oNJZ~~w2 z0|UM!j8iPGl&_gYE@U?)Lj$u-t=}0+UAXx`o86dm8yAf~c#45EcmnRtO!EE?(e9FBYL1;%)t8^n$8< zO_StpDqm>Tc<|^1m0IMrjY07<0-ADalDAAyzzi{ zi1nNQDiy?f)D4M3)0c0S0`oK5)B=9`BQ(V5#aX}{xZ44zjcKX4i2K6yU z0WSi7RuuZp>+=6&;N>6uLBBAS8@iug$i}b2--v_+{zfDu@GFN5zyYj5(48|N?3$-n0J z{Vzg-08<12z~nb{bVD%x2XrC`q<7sAUjN+|2NTPGi=F%{diVd{3T_@c@J&qAO@nj* z0n^_AEFSI~#_K=#2-L|1vD|fhSrAmCdTmHCrIxg}Qq0~HM zQ#EJ7Z6C(dX?s4G7~~`Ipim(FYBEseQC{EYp-SKKbcds(^%>f$qo9eV=V3~3?e)G- zH60$!$bC>GFdX7>qPJPw)^BWz$8Wm2*x5WjJKFc5d49e+*#{zuQ_;ORD5=#s#ayXI z)P^W2@q0j2v6yD1(aIIAk2K=e%@XZxE*QziTvtDNuJVg{d7m6T`I)L-jgWY=Hs)hc z)qnYDAJHUwp?c?BzS(C7-`gO!RWxCHPvoRO%LYKQk~<$^cLs{6$6+#$S;BRYepb@nzn?;ZLx zpG^ixpMj2W)6Z|h@1iLuBz^1yX5F6Wt z`9ydskD69#>1UaF8qhqZvCXs zDp;KqcurtO@t|1a7FQdq_*&QV`;|wXtT}nSJ&xH#-zk5r@_*Bc24OvB%~uTiuFbkq zU-UeGDA{&wq%<81B0$2wUErME(`;{sr@>fLWTuhjD;~{i8ej1O!?SpRAaner&tk!! zD(bw?HK~$NjE1?KyJXZIe$;w;zjZdnY8QiNyJgId%3opRDJ?HG$3-Lop~%@UQsk7J zPx3r+x3W@m8Xgv+U{9}tnVktmG@v+Et9JfJk?wSOChLP5Ak731Dyt!(Do0%5G5&~` zHl#XH-f!eRXvS70(l@g*kd(HXkwfG}4Om{OMmahLPAF~UCypiW8Nw+DWFwEB5axhU zWsHFY{lIlW*6}b|vzKP@P_R#4lzDc%*<+f@j8X~F3sfYR1v9Vf%iM$FdmY3yfmsRh z-+M<{#UdSwg;|+i^=dp2_stMaTo)V0X|yBiYJLEV40+>#`;ENI*RlmnXF^2;4P}hL z|3(Lcbou^JCPt-~0n_O`!<7Sd_!g+*p7^Tb(y-Xdh@qW)kyQqpQOalWpv5>?6)=hn zvN47Ydb~AE$;5&fJl>$UFOqSFC9Mjz`G$jWzmeh+QJ2jK2Eq@A%%(yOC40y*jKd8j zs|?7ac>+U$J_GVX!c``9aUrPk0fxURVictvBqNJSo*?6Dr3IChuiTPQHjUUOE$Y z=av8Tf&G&qOc-Gt6Am1X8QqLpJrVC`P$#mJ83DK5AJkap}TZims`Eu{bUcpWQnLJ(_w zkb#lS*jO~y3+|dN!?2fo7!D+=^-%37>QFJA<_t~JH>;4YQ#Zu&hlCt^XLscKjZy1{ zwTW6-EOBn;JHKL8NJ4;EC!fhe5U0UY6=n2q=One*dewJHON_`P>o@pzJ(RM4&gkuq z-GWVjII(=%!Ew3zHBU^(Rk^a_^djnk`1*C${O-Wkm#DrF)MsxWRP)blk0#k~ScAu1 z53@Q}i{`Du2K}c;NIqerj{qg;^apaQk6I+35M+LJe)$2jAJ#1bW~Za?b$+4W894d$ z)JI=?86v251PpN{>xZbyicmZDh+3FOkf_CGUOHK55BIvgOpT{*2{&Z{-727Qv5Li_DX$qelZTjlN4XdSoCiI1%YIs;9u_XWsBKD$2q?&-B$3 zMy=?5caDhLO zD=YvN8>fv}C~H;eDU{Xjr5SrRBz&Ir@AgS39EnkEcWX$<8gl2*rM58Gtk+}13_8>v z<}Mm3gZHghz9xABE6p$(G*ih=R}5nyM22+%q`3voKpFEhmFxjdg_}wOPh8oA5R6(2pnP(~tev0v59tB? zGIWGyw;M*6Bu{Zf!s3IofJL6Os2#<9-Z{+h5Z(6vVIZ>T|v z#vyKscd~`18(10U4ues-635d=KM~zw5Jbg!aNBCbvZ&e?dB14v7N{R6fxeT!0iti{ zOho-%e6SF}1a(u6HI6XtDeyHQi6T<`MC0cj&Ed*C2HwYwd}FLf$OLX*2&iYHy>QPw?4Cg7C>AYq6la0VSqQh61Od!KFXfzB8qSkoDf6OgACVB?M~dt5)#1uCR-uG`KEz|mTi*#bgS}v* zZR%{Yl{_E+vh%rq0pB%-fRH{-`DsJcsi&1tMXEq?5r+$jjgHP;7i+!rJPv&9q8|xu zKTgD6_qNo$uu6VWg3M0Ved)C+vobp_^Vy&0@Y&2(L=mz&Xsc+r+Cw^_0&_}Zh7euI zvTEdf5n61sjVw_4aRN_InXeoEj0rOl~s6FxOC%1oO`mS!-5rf+4lYXv3}Mtx%zlzJ{FM9g{(ZoITn{iF3Tm?w|6LD8JSP)=uAi z!n&R6MKd>9qtVs^cg{rLq(6*d`M_eE8h=W+J&oTZNrb{$^MOIqzCQTaE~(th+l}T| z8;4t*Mn!zaNg^e6Mv=gEhhNv%@gYNuk?5IXcAz$HQ|gUBg{wM#ptnW?L4&>yW4N69H9ju*Z`E%oM7u z3lw}#K#EPie4qhuU|mLf+~#-QQwDJpR$cF9{juW`^BI4S44$Y@RLoUFUMx*o zg^v!rXrrenG3|sU&2qLsM2VoxtfRRwB`6orI>syQuF2$r?Kdu|mLrIDKIx30BGO^ykBbcrA^tDo+Xx8^(7>Im_@{3s^taHMzVEzF|GGUZ3Fq+*m@oC;=2 zT2fs7aKyXM{2k@?I+e1EBT0*c<1JQ*sjWsZzjKOu>$K(6I$Q5~-gu$9(pTm}%~R=l z5%u@dhpzKwTJyss=?w;K3j$bV7ui1o*d{)k zD>QtLbmxAgkbXG%I_#6x5H7t$&a=d|x`|W7t=y^RYx`TQ*A%x{U-l-UIP#9j0wpD( zN4HU)*?8ZR3>|*Pc{^9El7##G5RLv^=hnMbmu@>fZGFO_W!Jl1?;m?08Q0raRLZux zidc>}6@1m2*F9^*ypPr@voaChButb zb5~=y-+s<7j+cF#MGW+UwkH?g@JAu#9Q(TKF6@n;+c&n`!?>e(KUA4WP=|?kUEZZ( zsoQw-JS%K5e815lxe0$5V50&xFRYvBTnXtsHjiiZ88=<6biOpF;&9R4kXSmXFPD23 zCE~Ti+IGMlORDpQ-HhzohV$BO`vbqxG)LOwed{^))aj5|lZ|viE#U?tOk>Mx+l11o zR^Uw`eQ!2UAYH7`5md;TYJCz|7ckdbuTw)!>zqxxd0<7N)j9og(2~-*qY8|BZW=Ur zSHvn+Kaje%!^iP=EgZkMhzc$^{&Iab`QOUce*Y87^C}&|U$u8ScU2_t#5P6Wy~k^|TP9x;?5bF4#GqxZo={Ui@uC>P;_gx zUMBzBl0o%}eT6(490@ExQ1v-I;lQ4<1v5x*KNafpPB0zxS2Mt_2;5WAOwkEGo&5&R zePgS*9!B498!7dt?JY54@S>D0vgNlUEP^tdjf^LonVuBx>tVEmM^?SE7gj7=ZwL{S zQ2LdOBlgi*k!X$@%+KK-1xYifiNF`h21ZqMyN!a%7r zpIz4XPx0hH$K;4wOk zI63{&JHK#ho=Y0>?bFQyay)vOxHOCXG?>ei;`Qp{_(aVWuFo}&%C`>z{}$)^GxyB@ zC7kO9dbxqO1pmf(E%-OaYr$WP*Z&M}{X$9p2YBmO1^-`D@NUqYo0PKOv`PO!bHDLOCBsD zW()p2+)u?HW=yi~csSQj(?4>wVgx)U#B|f~6U!^Cd?kLlcTmi-ayhq)2&m^lQloGk zV-zVf*YpwhdYVjjR(y|$yjV}IY4WsQx zQ4&x2zSx`_FLTK-GwJC)?*Hf?<N~-2VaXumY_n?|60@ z-JM}*?dl|{r%qkg^|6@=-`;hL9qQ^G?M+??JePTe^xZO+lwr+KQ&G?z85)3(Hc+!J zc71-TQl4;Ru2Q6m@9DtpCNMqIKu}XTFQzl?r5H#VF7Nfiq%iN;dF~E+cznF{^kJam z$%a=?U5nlt*xI`tdk>Re)B@xA4~eyhm+B4}qqs-r4~a;I4%xl5F@%c*2%KRI3aam~?G zBebAC@8B-C^n%j9cR`|l#w#)HK1~cq$#FW;JRBz@yodK!GJ5ZrxSYOCcaY<(4MB!$ zFhd z5pDCU(EiSV7SGPd+L@llwDzSHVzl?Ay=pd^uQ1_mnwsh48zU+;6Bb`e1cj>|jlbQ} zS);f&Jz~G>SsBe%Swrwe|6UE{_xI1Qv)W`Z-FQmXJ#0p~g-${q@vYCxuYSknIGEc+ z=fDy{pD&Yv6ZwBFjgVVONc9<`xV28&{Te0glfW*{`^H1&D^y&uW>LJPFJj7!%)w_k zQM#|*1ZY@6qMNHb8%3}yxsO!mp{3LUuny zh`di#L`OqIGjmu!({!Ypusf+c6d9_o4sNNq4~|=|dl%(aD5t2qFNDyy5ibZx%iICh{EE>6?l6l)*?0>jh^JD6V*?Q(LlmrC zxH#cZq^4&Vs1FQ1^2A3t?M+RKwU)Pr7rZ}(c)=lsvY&qDZiYAbLtm2QW!AXv^5PJ% zzt*1f;TpQ7MZF+o90d?2MgE)`3N0^wpY%WoldeN3SiT>4WO?^vj6|hkOrApyRt^2-<&n=k61>&LhWm9&`v2H;^HmNxqh%>siIbt z1P);-Re)6aIfP>66-g-~fv3D*v&oBpQv9R3->oT2qp!rt+~1F%O`DbzG}V5eR^Bx) z($ChPT)yHlnrYjAa0h{1ESPhuIm`#4cp+3nx}u2kVQzbS88mA~8Khl? znXEo^C)_IpbCS~DE@WvUCM;iGUy@VYL-P8gJ@}!?VG|2kG3J%W<$f^t&U;!t1SSIK zLRA`q2?GN4U-19J7OKQx2Q`14J z`Yx9j{-s2JmksR6JXN^S&u~!@!n$6QYD|>QM6Je;(Vq5Yfit&(w(hUNXx8ZW1WB3H;@Dh zeBlcG~7V6o9DbdE22Ch&Sy3rPRgP}?bw z3M#Atxc=}nb34qSP8oiChNAjM1v|l)knj%Y$t04AWayD4ez8;8l(=YXS!=()Ns5F_ z?*!ZLTTJN-R+09TzC^J{3=EsJrG!+d=n0ES1VES;so#$39qoQ=Gl^(MJ$zM%|A)G_ z469?=+C@pQ;10pv-GdV#xVt+{2<{HSH4xk(cyM~%C zp$>n1$$IL<*cFF%GJjz0IDdS^c4{?Dk_V6xT_V&#lL_USHA^eY{DH+7UBNin+?o=c zpZ}XON1J&n8v!s-F@T!*0Gt^XIRA?WOce&e(gP0AS1Fy!TIKVzGq7Z7nVb^haDt;2 z&IJg-?&j`6pmz!V=Dq#=Q*qm=MD>}~ZYQ!_-0s_3{pO~h_WRAVeS)w*zq&7s9uH8E z33eYPujAL{6ANUC{+3okdf=C+pw^U39RFzNTasJJn2MiXaA$w9bpD-X`zgjW$Z&4r z4CG4@nBsnltHTdm}Nzw(7Yb=ZE)h`kp|@kuju{9k~nF$*^*7!Pe1qDb4|Tv6QZ=> zU?7S`h*)V~lN3TjiWL~5I?*R9SaUe?*uFzI%PYPJ6UvWtKP zd8_OjSviQu%F}G+oM}wU7oQ)&ZJUv??Rk2xnE9 zPN^Ayc<(-QzX8CH0`c(Xf1mA23SRbN_D{1Hlc+Odkrciu%#wlzP*la*bi%+42iy=s z$6rnPtzABWO1)|oFcZkjKsy2RTecMR6gfYA?)K}8>g|-0f&et&1!?4=O4U*RY9$@F zo0>hbS1W(A%XIymwF-R5z83kK%V4lsh0j{BSevhO|0|{?EMD|MEd)ttv>ESX2FaRptKk) z@Q8&f;qR9`s`cp}PhT!>InWzU3Z3v-PAYC;ftggQ?^!19IWKPWJ4=jY9M4j+blg(! zzI0sg(T-GHZqlCgytNdXHpQU&pIc%Ww@ZpdfEpK|*)pD2E8al0~&%rW0?moezEbf@5rs z>qotZZnmMjGk*VNb-qydk7tOfHtv6$6YR~u@@f7r#`OFJoCDCA{tZns}Ato#+ z3<%`d{}#w`XGU%f-LwcqLzP)v(c&uA`X@o^9}&V3&BdGCMB}j%vQ}bhfV_%>1MCRtr){2_Oy+|ed#Pokh@&c&qWJOlh0ySHka(+{?PS8XoF|c) zu3gBJw zpD=aJWaJijxMWhg70KB%EoKScR38WBbDi+Voh1a=*xz2ru0{;ZmvvSJ&-buP(X$6U zDWvi&(D%M{P}1d3Z1U%bK}~-BbksXT-%AOjx<2+=GEC-Ma+nO1FSYFl(GqG5ja(yL zmQkbl<{8IZR#uiOHWm)e0um&9KpDMe1+F;Xe@M0+N4+@WovZqbL|hfk;+&7(rm2Gr z>#0b@YzL{uYwXOT4m}y&aoxFWy1|({J%oHDA5Hr#UM(E&WFvDVbm~ndOr9>EASXKX zX7-|8uZFy6jwy`K!mTv!7VW)Rijc54H;oxT`7EJ2+$dnosy+w98#5m9= zfbqpEHWEG}rEjzR-QDp5-P*uniGm70ok>Z~kD^^Gljc474CBa=*n}!W3$*5B^|h3c zagPX}dH$q@##-$_v=TuTFVd%3#LD5Wri*yS@aCh|fOPhZk^8dW?_til~-(d|K`F8qbA=9^zjL9H|u; znD3#7;g`?lLsn%(A;-L4Hoa#sShAR4kQ)^qj5dMk_a7||{i5kiU}MKtBfZ1!%AcT> z!^$s2FPa`oJ@9e0KvotPX35?zAe1{T= zfd)$z58djMs7n_tDSc+%<%WjqGAH!~*j42Dgk#&SttzRtCR+Pk+;8ur&Q!{eOL34? z|K4KQfr7vieLV=d?Bqw1#vVo;(S`hAC){zu-r#rIM1iuU(;;)m`D#Vtnrqw|FC+9E zWvbfEU^&Z6kyajRbSx`tOx#cwFbg77ANET~e z0-rj?$d#2^?SOdTKPPK`<+{F3TbUpy**W`keSg+0qlqt8>0oK|sb*09c%okTwBo(k zjvk*Afl~EPJ>i`u^wHs435xIdq->P6JDk^aULQdFaf-*zObq_Gl3u3A4k>!lhM|R^ zT>|lzoh)zs{2`P5baM|)5~4mRbes|`{|BpXwN1g>H_HO z^g3guR99k*s{`X%dxP-VHJ4DSy05dNXUd{6wmo^5cQ2tWlY&0C)t+c_PMEo1J(2sE zcgaCIvb2W7v_X$fvMdo1>b)KPIsZ}=is~BA6mq&9f3l#!>Igikp4Vryp)dlcdD2NJ zT?=I?;aqC10@RDUE@9<(!2HS{~kTlj?y`TGH*v zoG&mKGC5!NeDXKbwg^`uOE$^~pHzOSsU|H~7CtP$WhHkK>P%WkH(oFzzFTGX@jHA0 zrdgG2Ky3FkTOB{XabT30y5&BUk8QOdktp|!Nvi5RtHF@sy3C2-F~4iYqQB;v+lAzs zCGiQL<79D1 zKp0k#U-rOWRdicv3O+nI!GX>T!pyv;W5<3M1ilKAJjQ}+{_Y3g*IraGakBA+Gv@K^ zEG8}p(O+&yyJE!DbY|huL#JkPoG~JJXFYTZ^09-Il!5-Vwt-83eMEg@=#*WXoI8J1s1OhN|!hr9_iqjrFi34Mbx^gg57JBR?z!%P*a{(AoH2{gg(wlnosV}uGCz3tKI*NUvBrBDrFLe=|bqM^6(mfWs zVi?=}qn&zT?2INIVeFh6g9`)3)@x?pW;m65hGF%8P`>W8WfKaoZdADAr1EQ^czpB8 z#f?tdxW%Z=S@`NwWtO75l~Gswj$&(1#1Mm5tmm#v|L5eL@|+p{T}fh_jl0eK3O8RA z>*efrUpgV%?Mt+*&IN~#7Vd`cv0jalFT8hQRCfajnPA2$akEC?CHJq|-3vQ*`EL-pHSvnb+fyXpG>tMs};R>!Bi?Y2K5B{8hPzue9!J_V{hHo0RVGMUo~d zTGR$pcQt=C$LKtJWL`@EZ`dX55nbiDUWHS5;P)uTL^bVCYshJ(l=aZZ4gvo$sbsNux;$ypBE_M z_SQ>;2R_D^!y=xFd2M3vB&~qK5$eMc|XXwfODUe^vUYEL^S(7z=j7ftwDZ7*c<;6(p4x zR?ayVN?`j@#hB2W;x%|&8q?uH4z%SEYi}Ln4-9R`q?|gz!v?|ow7Mv4a<3$ebjB*e zSDCEy2kGa7y6kOLkM`jm<#yFv^<1|i?cxZrttl?|>A5r^PV*$0KpSHA_)-E$4`vr^ z#S(P%Z_vV~>=pe7k?*Z0J$UqApWx44+q&&OsWsNpNe6s6jdEkY^FTHWJymjUqC5@TB6Da^ZQ^zmdl^sCQ?8({-;w~ zZ#|(XmbdkhP4p|t&Xd^IC36-k_}@u|yWTWMDPt_Y3+HePj)Q-`4X+z+#h2U45WIaa z?Tc@A74jY>p~T=R9O?V@WHm`-H}Xec!~lb5W=+P_5Th6@#bG?EB_aV1%9uhf2Run zz2g53f%vu7{$2PJ6v6W+D1zrtPz29!Py~RN;Q7TD`E@eSpS&QRKY2kszj;Bw4*ezr z{VM#f8CYijB^dF0DgB?J6l^SiWmo;D-FsFpu76r?XRJivb7S@&KVmxRg^}(4{0S*- zXj9W{%X;x*kxEgLboX8~rb9f=#sk!F#pY0Nj_Z~0L_sLkc^f0n6~Eg3qj&c*T8+3I zeFSdj;NpI6r7;uAaP_%xj}Rx0Hk z^npoCqBb!eRX)5eYMb5B!(e7~f}B2c9~Cd%P>a~_lj)(rtorsfO-~;&NqWZ_i{>#+ zSc`Mc+vBr&-i&`q#6I-UdQdOnmK^rG_gAAE-yCB+2BAQ_V}dTn1+M~BTsMI%nK+L9X^2dFD0d&(ta7W0jfq-r|CXh+5w zdST}#8+u-9|LCJ<+`ZeIkttd1rlX;q-%r?SahGWFsdgvg(`5fBk4L%#MJoN$-iTS7 z1MX~G#==u+K^|j2gaf-!dj4AX5^vsBiV$PGok@yZgsn8#S=^28fWTFxvQ)S*0Un_y z)nghpBo#q&M$&2CAotNsS)wIqpFu$a&CK7g5)tK%YV_D(3b(iX)e{~eMG$p@+>@+y zGONNshwG^dc zSpYLDCUfbYVDfuU;yv16#{Bj$fwiBieOZO9d{x|4*Yoo-H9wa%_?n`25i43Qo)^gt zy{2+VEgCP|$9qyQtiFmVf|R-~Rq-J!u8Ge)bY#ctvCyUj*2o|N%|o{F>f}~XKTuvn ztn*HPD&d9Thj>_pIEp@O@EQ$x`y<+h9%s6g(DkDfx9)wiMMQWZ3>URQPQvkU*sz*S z$2Ui8>l{nVy(Ehg0w-ln{Pz~28H5}@&S~HE2_~VK;|GRDcYCBEnL5#Sq7b6!N;xcL zHUlDbXAueC3|#))d`YBYu{!li#HX56PWFyI>G1q3f>l&W87prGPi!B8+cqd7a$hW$}J zIzo0y`kUD3TPkK&Iw8iSy_Znvl`q|pY2yNJN6{Ph%Arwn?UQJaX7@^4qTMFcT?;$c z-dmKu_)Lr-%??$I6MyxKg|OTrmyI& z#bH~QO@0k`TnzjAanPL^I@?jcpyi_aNib@*JpOJ-0Kvf`Rcn>XfB+`NxL#s53Pfq| z#z$M}Q1`ZacaF7T3HwQ)V&)Xb1xUW$4TzH-h#Q+ZqP!5Lb@idstSEz)lN7fpwb4cR zM$GN7{Tw{lIxe{K3Mn`0Q-Mv2MkRSN19IxeHo`bSTIkGFVT@ACW5QrD)Tu*ZhqnRg z>xV=K;NQ?Uec?-}w-=i!EHtglAb>$Xa5xx++EJAFGszx_}^8%fFXSly!EWxfuZ zqHIgF8+p+t-nF#zVz90%;Kh+^9hI#+028X2s5- zs41E5j~P{;P$Z2-yZixV{n+W21P;9wfvbw$k4yVTOv+L&Q^m?s?1=da&tv=#?M6S# zRRTQL+WDTJb}zti`KD}7e0dtW5GvKJn>meZ@MGD}{Et^Xx5tuSo6_&TRWG%QKa1O2 zw#_)eI7It(b_gjj3;OZ5`!Iuvp9S6-+l?&HY<2aW3gv^{5BS?(WfEt}+Yzh1PKOT3 z77SX86DB*MNyT0qs6CtI@$tQLzKeCD_2U(KbV296;QlV=pZ)YE6vkdGa9SnMEY8bJ zHSa_v&{!PKHsDRcyRXyeTU&;5Rxd;mso2920;NpEtn4v^KjSfcn|owqk`#%4cM1)! z@`h3;vM}l_tmwMCLIF$-iEmy9OaGbc)dU^|j%`w|6+|SZQu*7n;;*%R?CX$@1Vv0lO`@AIv?+_J@{`C2k)iE5KY*C=2Q6(&)8bes$bP z6c17rnk<)fHw7i(O1fPgt5uUCn*OgZEK)%iUoF0{dG=8f$I5^(Rc?LWht3uq1rxrX z>q%)L&0reebW9)IFiVsB66(Z6aU(u0?7UQ#@3<*TOJB*3*o3QcU-JXSYodtcXwlt9Q1dUY)f` zRkMc|kro;luNmK~*$oWqV=T^y)rHsc)gib}Iu7;M@tjpd9(I`2k%Mr04@x;ZbAM>vQE(p{vcb!Xc{mbo^FoX1gF{CifRP|Upp~e+ zm3J16dbj=lI*(4k>zrwI*1u+dikXDfqrBCi=w^VTG*0mK#80A+4$Pi`_RzAdFAGD5 zFJ7V55A>r6!V`XL6}nzYDAKlQL`c_mg;|6c=Ymxy^4RlVe8!pn{>nwC1L+((bgFJ` zhAkrv0)Og#9kVB;!-q*UWHY9K_rZo7=i`Lxe(X(h&-7#OzH<&WMiN-cTAWi64Uyit zbbq_h-kA%_cGu;^H%G-Tg1kWRG`O3O8r6E@crG~AyvQ^274EqzAtrn*?``11^&!~R-^{h1cuMLLsry?sy0rWATi0}(TxI2c+}yH!Q=AI1;nFjQY0NzE z?&3Un0YZ1{(===V`3RBGRbuc0b34cjTzs^$lv-b_!8pA{bFMz^_T^Z#(}7lr;Z!*{b%QX9@m(xC%8YinSP(lmUP}$bKOVg^e2-Ep)Z~0O=1@I(D%bA$`6+cz?%kPQ>}aMH*33~ zYkofU@yeyARlSkSQ?*j};&F)!_LZ4%2@IYqtD}6!9#{KzC7m97_%Ijxr-t<3 z##+1-4Wpi`HKM7fL}^j?m$^!9FPp}Ek2<}e=>4kW8y~SPq;7!$O?{;p`WnAV_en!k z%R|pq{LJ)?2x~{&-ZxEU_*+RH5vF~P8>p$FCjYV;-k~Tr)TX|KOHFKxnr|bPEcJJ- z91c_txNhi?5|qv2s&Svprkk19=sSq<=k{wi8JSkV=bB$$Z0X_)Pwd{GO9@Meh6rdE&MzxF3ELlH zHvh)^{hNoZXyj-Hc+hPB&inlxGW(x!JAt&}zgdxe#ao;nN?hjojvT$NSI|UZLNT1 z2MGr}vxuFeshJ~*&aXui3sAc<;MSAqumWy47a+CsTj2*-oB(j5-@gYJp#Sq5-Sc-l zOsow|tSxPStqA^kIq+9M{J*g(;Q}<0|M|H9QOJLKE`PVf#M;cr@gIH>HkQ8zl>gI; zfc?#XluZ7En^bn`g#O|dg3lGT>&5zm&?mYYNp&nQ4))0k>;7s6i!0}NhS@FW>*DV` z8I^~fk^Vvkga`fT2TC^OTW2c@3eUcd--(HyTdNfMTF6&-zjrOr7P#Nu9xM3W_iP!w zS!XH84t1)`p1r9ogX^1jrih80M*tFTH6}l;?GR^oJk1*TK7cWzD{1wVUwt#vT@U@m zPkOe0dRPt-BXI0Rc#UoH0R?LW-e%qaaC=_c$)6hLcFVC7&Hf}#lKZ~;@_XyBf!zGjbJ-44XePNjUf2bBrsW$R_93Iv8RxP>a5d9+bEu#TkwP z%@g0qjl`2?8k(q8q(p1eSw}A=MQ5}(CLWU#R`=?*E!*&VGct)CB|A6$tSw#k+pU`5 z5fVTut(%}qBjAtuh10~V4rV=TqV&4u$6jaC7=f&lLb*Di@rD`7nh{ zx=&d6Em@%6KB+DPC?zctHfjfM3eONQ9`|dz`#bj4M`vrWt6Ab73~@5Cn2CKo z@5ou8Cq-DPsP4GA?^sB$vqghDyNuCi&w9-+s^K?hM zM@|`^_{8I9sz9UctVe(VK9F4{^91oTKDalCD3SFg;zO|q%yuN7)Za zc5u_)o*){#Y~a>?rpqGTH$#r`8L~bmid9>4%SshYO2l@}+EvoQ@`45TItGGHYzs~i z)&Y_R_Np0ve57Nn6mxi3X+(IJUDY$$A=KGO-_rJqVV~@g9zI;7ZFS2_ZrSa#wR;4D zum-{^_ZX1wwuG|K%f>`XlJil>+aX<2-OT+xy0t~RoMjek_Z)qai+go3aX zp52+8hR{?b*Pe6!X*&3#ebJD(ebNt1hJAHL_83rFmTMta2mKobaI>c@oq@M2?2qZQ ztouS8+brG{yeiboM9WA_YwwVduW|V`uwXjdGj}Fl9?t8tq7lgtTy9-{z zhy5boIV$7^?^ubRWj1>#?~N{?r8M9Z_>;46lAlVsPx&3Sy?E{f?S#oD?X2x!H7&8e zkLRzfe(~I~&mR&#wsXXjKZfFLd(>c+-k(Kw2rG}XvBWypAJcr1W!T!+v2R7q<$JS{ z$JL|Db?xAJ_{qXX=G&v~^}X&!>OpPfalKvdvdgHz!Fw)Wr{HLe5B0Q_oIyGtC*BMOiJxb6k8*NWqZrDu~;0V)mTbv<$%w@a8c_@^V#(g)= z5!Tf5tS=)LqKsSLKiaQ+9w5IM#uy`lU7BC49DP0R73P}4O+BA6#r7d(wa=`t<&-~w zLjtB9U^To(A7+iWKt9^KJN3tcne|yXWc?X2h`Gdb!p_Wj?cr6iJvdxmh(OufWQU(2 ztn|v+mQS4f#bK>MtcWkX9W5VudSoX1ElG`+DE$tKw@qski+KH8OgrmVAFO8Fm&?p5 zYg?BT%Ykdlv8!;sLAxp%6$GDY-ZZH(8BRvL)Keqm-__aIbPw3a>2~Z=fj1!2OC7v^ zaZ?7Vz(QLIxwZJp>rlAEc)I+tI%uMCtziEXPv~wh4pKqzy{-Wv|Abs#SwUnWHUqlO z#|g2EgLTf=Ba_f0Zjsd@pR{!kXQoP^OTRetek;M-soMxLpOzmq2op1XdJ;-vuG2-tXEfw|C zWcU;!{r!bSyc_D&8M1Nldk;ejyA|0>FP6lvydWjbWYz?l#+ z@s?pV^RrrSu=UMD;_%PfHgm8&bWIkhH90)sPW6Rb4{#JIFFYNFP87RK6hH9|-%61|(#AgD-bX-<%+E*Ya zP6P~g^3-f+Ct+m~VrpOasj~+L$njia7E9)r&g84-j4sy6)g& zPH=*q(e%!L4N~rnfW|O2kku?HR>p2tGV81Q!WjGfo)Vj54;9$G^AwQ~hez%_>;Tp} z88~5K&@)#cY$&}Ii&NSctzPyCgFi50iHbbtH!%iHXOz9Rxp#+^4{SJWv6GsF0p#ns z0|uvG#1if-%L$Dvn1dh?3pEG0iTCCHUf-Vs)QGN(DS;LxTYMP~5C1i7O(s8CNdQ0f zet*U(;=8<~KgOqGu)q>P6w@&6!AVzXhuJPjVbZb=^vjyEt}3gz>A#aIe1FS_VE=o zc78~Cpe1wsiTA@!L99bgPesyJME!|@R7>_WK%^$)8Y9S*=PPiv?nHr!zP4oFf}Q|I z+&P?`9;==F36F@Q;2yk52AIO4FTH=$l=Z8CBio$@a!d6o+BDB9Ye@^Z)cA~B;@Wr~m= zLgYV$vb(2f-$#!aGuEv~oQtd%43sd&Ti3e^wveb8$}#VU8?g&@J~BqWb7|ZvYn`+v z#5v_2ZgAM>xt^LOxPQ$p4jw{r`8Xv~HP5ZLna)_|fEi|Lcrzm%)+NgvZd8MR%oIg}` zOED;f?|tCLqFdW7W~lz#+g72-DcSy0GR1u&mSsO!WJd8am)uAshfJ1M6{s|V#k)Y! z)3eQ+#w1tY`2b*gcuzPG5x`@m8_}s6Gp0K1y^}C+A2F)LqT5E(!qTTx?dey}F`oG1 zHLd>byW*Ect#(KV!pfICaGHS`BV=9hPyv2~IvcAudYYvXn=`jB`hC<{&H8>`QN}26!-Ls7qRX z>2*NSa>;tKQUzo0@Le;r4MX7k7@Pj}5--i zEt9_fuvyd+Z(Mq{q-oC82{ruFb*YPL_=_t(ACod3NQ0Z*m+M9>RgqpXA>I}Ud`6&C zc7`caJ;Nm}EZNXgoKiSiimBH|aq|ru`bpG|JU}xVrIqpxH?`D8m4X-oAL&NfDvlTe zzy8n?cl&L93t&A6cf|(7Dm=)^1%z9ppMSDkBoQnrq2!K^|X#S$~EOrfm-IpWD=d{ zxqI}SCh(z58LfT;^VjVa$*qbGsPxqwoaLF-xt}s(7-M(njJvk&j+t9f%rnVhwsnK) zxNBn_V%?D>lv8QB$p?Cwa9lq-#(MEiUTdxF%<&AoaI z#-qTUY+h88=-hsij8LP8hp>4>>vi^ns@78$R=t)`X43)6?Lq-xj$%j(@5#f8x!vKg zI%$PpFN%g}GSWtEJlxigVr<6S>af0-GMewp&g>_;QMp=V^dlnnT>~HX_~|MOTOY^# zL19GGDWJ{Q+{AAS3TEJh?#-A=6NyOOL~elXa#U@FW>7DuC86uE4`DflVK&-B(if>O zgqVM2{TzaVcH{cV65a%+g0`$)tS?rLjD65Ew#O-(Y-y0ZhK>!+rpFT$Ngdq^*48s%vqbB^fR0AyIJ zn?P)6Sr=#jKqe4ood@%J0gWpSaFPoEC;0(zlBrD7X^J|amE4>vb43Q}bK@e(T|QOI zE_BRByrakxWBNGoK8e;9lxpmjM7uPn%{e{r1A|1?%?NF&wJOY(L1ko&&Fo$qxN#D# zdEbmRgG!Wfs1~m9%-`4|nrJ74!S2hW?X`vh3PM z0dbB!qI$LJMh~j=xhJ3n16IzGXAhHQ1`45@;FF!s-7e_Ve;aT5tL(@B0r4hg2_Tmf z5Xw;gy^s3uwq5_e*UBvZA0tnH)WZB9BTs*gEBtpN9BhA64klq^2bfZSL|T4H(fq@P zr=^LJiG|tU^_BlEi|aT3>wh2y^F`DYAa?$&BsnoB?u~t+S(@ z^*=;jSbsy+{s-*gV*eEb`YpH&Xg&YU9*%#GiCMTA7#le{TAKZ1{O1pN-2a3X|CP7w zzanD)lD5pr-pJY0z{%Oj*~RG}ehoI3zjEyUQyhwegN^Ng6ep{+Vyetwe#UQB$6cOw;2!=knPW z_ThFk^HDpmm3vOR{qbyn>RI3x_2|WOYqdh?`E^)hDCE%?PtlUW)Bdi|^VU`8{JQV7 z1MyY6-_oJqM)d1w)#I;gBu62BPmkA)r)$i9zITVmJ%`}u=b%HKu|@)uOX$#>sVRXU zeFjZ_K1XusT+Kx~ywS=iH{*ud)!g?n{(Krkv{`X{-_pVGLU*}_2d75h%iECn!g{pie4Ndv3+v&XJj>o%;%Kq36f)k+|1fl9~@NwVq5&HxF>M@RMOyGXC-@*0S z{YfqOqT9j}CwINOj2FYd!4P zX}cp3$}Xdiu0OnbcD=t6QZVR1f_%@N9Q^nprjGpHc7{`q{!9d(`5JX!z*8e~k1XMP z*>@E=#;%!-tHT)XI>iI-)e(bKtyV7W>cd81o4>|;1#;&2h!Jl#G<9h`GCBzvV!=@7nN`%KMY9B}3c+WMY^x3spM zz_x%XPusREI^>p(fjf0%+_X0=x1yw)x1)gvHM8ntdilwFi)6)%enAmW9~(}A;(qXr z`wF4+=#-Dc!}lehMg8`R#4p5b#bX4%Rl;`XZT(qu8`Slv?wITB*hDqmdycJ*{4N=D zB_U-#P!tzD&*VHT9w49EA$EcY%RvkDJF(foA=xYNCPf^~y~RVd^y* z)EYLdX;snwvc+N1gjm|!LVW~*JE|T2BX`PuW2O7+<> z!r~&`hD%Ay?hxbcHjU{zv6|C&g}sTgNo8bCN$jbzxMFcKW{xR7emO38{*fJHca` zp&lgI=`l9ORZB2seagydnx~BhRW9KRAfbubH3?a1LHp4(BVdPAQh4v?E%F>=_1sEd}F^zjK_t zb8?X_Cpf{}qmbiwU9z|j^s|aoQ#CU$lLCOK1QIym{cpL8x2oreG(nhrs^pkIm>sin zh@ik_)j{79-+P3ZGh4ftt7!5`iMc~d$=`tEs!up3|7a-$_ybjiBVwINj-K-mwQtqz zN3Eq23ox(t1<5~hF0SK!V!T)&Nucd6D~mPU>moW0o>H{U-z5&^Gjz{AU-TpEq^}JG~jN2)#YIx zL&-RXo0VFd%yl5|ZZ0k68O+XKYsMfjil0SVZWH5^2{KGSg$G}JVL^Y|GP30nmQV0C z36%BR&3C!YBjZC!VsetGT5171mjxP`rv){btXiS25$C_M( z(pnTO!mms6Vk72<7KxFbw}pSu^?k)lxZ_nu=(w+?vMj^~Bo3=5$BduGFNP>LIx2ALW<89^ZN-+?(!s ziC!8dpE6m!x-HqWSL1lE>qD}QxkEwI^A@9<*DoSDmwH0GB>!CuT+GCQ#)ul z*a=tAK=;#rAY<=-B7S45bonjpw1bxa-QC%0vX;#&D^D$_6vg2(O!q_&12tIN6`SKz z^dNH0J6!_!7bVBHi;+u0MH$ERq?7!r!rM0vDL41=pIt zfPkRCkJ%uPjwbjvF8({a8N;KsMV?lV&(_UVH7i&Vl=lEcO83yeuK%I zKU+PL<54)xo|Us6%F@_9^laD=0*YXK2KxqG0u2BG4af!>a1Jye250~?&;T%l6oM~J z!-J5^@9{}k(!w2vrRUdRCo7fo>soSPALm=rGa5U;%Gl5|;S9gZq;eVUb4+B$ucOD+ z`QH}Ko-^9()@sk56T&VcOg+p8H9fT(_}S|k1g>6W75B#|Bp<(JXy;Et57j&-rl&-v z0%V!ivwx=8= z#W(dcVdmjpDz7u+0_nP?CS_sHEx%XPg!Xjh+jUVdN)kHgv4fLR@JouzNl1eGKq&f1 ze?f2K$fQFO`do$!YrXT}7dy#N$j*Y49q$N(hg-*5&8uW6&02{L3dJSCFQc$+BnJou z6(K?)B}7wQS-n3zUJ6jS@^%FA9Db@~YcMK|j8PvlVsF?EkYqVeaK7<&SYuQ0?=rL(-rX?M9V!#`F=p3{tkQ zPH-=#kpY~OKy_lZL#f1U4z@7Ww1{k|cGyA!axQOyN{q2GZ`cCHr?5TXvkQFwRwhi( zQ5PsduHSa)C_ip5RV)Q}XUK}EX3M5ot$yv-XGBpc)OCNuzSS>U&S*(QCik~t8SDKF zd1|~=*e>u{h?l}ra41$pU?qG{YA(ts=JF-@^_YetG+SX;EQ_;5c@6qjeGE z6P9zSN8zx>DdLdE`N%-8Rn}M6G>|xx{@yG0Q(#)<zK!hGy{H4cnl?$w*w?D(s{b?}T1f%MAZU=@za5 zBlyO%kG&)1FTW68*6Fu1#0TJ=JxO1~?Zn)VTm$;rIndYKfxgBthBM60;bjB}{dF%& zkxkM^@VsaSCYo~XEZkr20tEQLXH!9v@OYv^UVCm62~1(<@vAqGV^w;XQ*NYgvf@@M z_lGS^v*z-;M5V0Z$}Z|;y_h~hG)xDHPl(Uc>EUq6J-*sEAcq&qX@>L5{fjTqHY6Mc zO3H^8`XoOYesnfnzMZ&m6T;yh4z_`b1;(!L+7W8GgD zo$71*;a2d`1J+Io-_3X<;P$4j8rHIt+D2C8JlXngtgbq=^+zn1`RMl)E^NrX_Ei~6 zlUe)mX<3x${trXc4Ib`3MHro-V?u*w7=3O?hX%X~dM82;PJE31#8lFC-hb<)LO?cc+ z-VU08a7(N58`<(lFmBk2&70FGYT9}oUeLFq7FimC>YcX^6Kll8(S(mkuV$bcfV|Xi8>i;)~{;1!0JR(oVORmX(*pvb(F$mw4&tE z-6FattK2VZxS)ik>1qv=bQ0;S*3~i=kTQdU;5Hw|z@qJB@?u)|Wn|sFww7!|ez$QW zr2w`D8&9pfy(LAa1(U+)P}5}VW`+s{J9=YuYtl)VG7J|wRZ5DwK&*qv$WQk6lC536x3~?LCqUn%Ri=wxHXMy2$CRy5Zr^i zyF&;XB)B)hCAho0q>UdH`$>UaJYqx19yBbLZo9Z-dnoki#@;pu2V&I0z8}UcMcKgvT1W^RM7r_1y(B zb$%}s(p=?Vc|Da1cxGlb2+$wsI9=gf^ljYzBM%HAw_yKLxm${Q5Yp`Kbr6u%J4I&Y zM&3)h2-Sv_R?9s8FX79-i!l8!rkehlHu94Qiumu~OE%Eoi8BAkfnq$r&_RH$%6Sit z{Zi2e0gBQ0kRbrY-lJn+j(%>uiaq#^KATEaE_JjU-Pm}g%Q`H0N`8=6joe5G8g6XgPNH=7a3hL(#2kBAWV$y z(u?eyjHF^U&cfMb%cSMGg_23e({S1#^ECTcUY1CAx5A%D1zw@+KfXKLIv({(jUIo| zEyQ(X5+V8AU6bXas&ahR^Lk@c=+6FHmXRDMb>XAKd8+Fr>FNU|W+`*w`Q?S?Tl;=e z&+F5z?$ndri5~);ZLQNu@CSXJS6(g{XR$w)u6OO|b#>8oEDh!Q)NjyAWIqMp3iOwL z=_k{Ei&|QAlU99ubGX&5+(Lo`{K%n^Xj-P_aJVj+e=6S z4QEw1rL|h<&b^)HAQFO?7NgoggX+$V;ZR0v)EhNXNMZRUuym_8AiQ?t?LwyRt@sm1 zm6hsQonxKW9|x&H0W!fpW@jPXEdo37H4U*otv3H@~;yqu0LZqJ-qF!Aqx-PqFiMY2gCR! zRUiv#ZI(b2C;g1=>@@vf+6aypnfA@}qJ&(Cfii{5^Oc ztE{%q@R6=N8h%Th3B)5VR!mBtvS$q+_dEkjM&?;I#!O+H*_ZmnwLRW1Tg&E&x}7s- zkaFP~S6q}951OH_63X4Nw$ zi8!|lO1EFrs=d$Wtg%+Aw8u-T(_}Z9tC?rY5Qb8{N9{s^V;P2(d7ksQ&iZ~u(!S#n}e@BFp#?VA0lloXtcgC^Jr^( zVrd+s!00XD>!)=?hNI>)I{U_g6w>^FB%~!YIgaLVaaQDD@#YzS#W*HOY=fpyKZ+%9 zq<2&iT;4JnwVF@&L3?ClQw8VHiqa{b`SY3&p$BMj7;AAQ=xsQhGS*`88j{@GQXir$ z4OkAio1FFB@jO}w?Z1;-X3Kv!jPbVTbipHTw6Qp*Pyejpn|#jfYJmLAh#&cFCn)*= zw!#fPN+`!IMgyH2c9Qr@F$hW1#D8S~uICd8%0x~1z|tZ)Ne*1igV6B{YW6V9SH&SO zR-)U5^SK|RaC)-@bjiJ3eZb#FF&|5t7;Xy(iJKvRA|5&|Ao9roHUHT#0 zQS>(Ok-(?*E-4+uI?|1oZkw@dF!UN|N~w-q$zFjB-y51Ad;~7RDD%lbmH(~X$TpcG z(Fb_KmbmuizP+^`*K~NZ>qQRySH3dQClXvFS4C+T)erbN*VQYZv5GRaN#yaneA<5; zjXiB*aospEo)zt?83#pfr4+J<8Q%NUSUvl!Vl&*gd?!qIfpg)&SVD~fM`J^|R)fU` zO_-?~DoY=TRl54|)#qy*12pS6IRkEC+IDnaz5Ic^nH-gAA4Mfa6Yq;`v1pMz^w1V@ z{33J7K6;Taud-sw#<%D>wg$zRc`LXqYUo(rR8PN%sa2RpQb3e(jnPeT_SFfE%Ij@+1AvdL)zRW-$klmgts_@-nr)ULvG-@Ug{4N9A(N7?+TS6wLVFtVCCR-)Q+DnAr0NP~o$cx!(qeBbNH-3fk{tz=SFjQ4Kq@UuQz3VX zxGg~$pBu(z2knJoFJYA5P)68Z8_+d#d^vm_0>1&ny-^AwSQt`IWO0@ZM>nGE?pXX3 zq4$Q<2Dwj(8zBp`8)ksWw+uT>c&h_Mo5YP^z(C|X5~P=2V1qo}*#lbRX}8M@ASVT? zF|R?k()e)Yb)0I3sbVYxVIS}CfDGjRL3(}3@iDdK4wf&&U^(oN`>4Z&rx3fnlX(zU z2S8*K-1jekn8wVa1X3+xGSGxcpwe|m6X11=P7Q#vl!+2-*W)>5!W?<*q=$*BNh`ZR z2ApmDW^=lz*2t5@`&hw357zJ)h;UWzn_fbMQH_`JqhIp_V}Jl- z0FMv;ES7>e4Ho}VpLY%i{akPya*7F!-asDBBJsZ)rznpa;WCspKpr@nHckk|X=GJr zzS8^oVLCfqrS-4lwZtx6i6h!-sFojATfnsHOZZ4&s7ky`R~y0o3xWYA^s~92QM&yq z{zH)zm3U`rflPjR(|7!s24HBkmW_Vf0N5g#XqWZ)=a|a7z`w_I5Q4(TA9bekW|j1* zT|b4cw6cxfj(y%ivd}~^fqrzef9Ue<4nkv(U}=;59XOF^Go z02se3_qI5q(|cjH-;uL@zGfmUwP^vg5FSW5g+dUw&oW?1rpV7;?=#L9(I<28PEE-e z-l&W)Rt|(3j4S#A^bDdcHCHoG6}SsW_b_v@7wf_FY97{ux2$5Z!l1~;`gjB5({F{0 zC6qNOvDW1?C6kHjf+Z`;Ssgw~$}-yWXF)4n+Oh^S@0A3(j1n1L>4eh=SOf+IT;gBN zSgi$@KQ#+NovGzeQ0>|ji^5#K*djD1d6nLT}uzf7dc@H!z#0O)+!uBwxj6ob z@8}WU#AiDq;Kn$|+&vUl^&L~vDgSn$p<)H75sU^lm`;p}rAW@^30kfz}F#xKrdt)B9(Fd*L8 z3{}3!5uQlmds3$aBt^+gDPmz500nT8B=bLT$7biyV3k?4TR8T>T+H`xp~SCvLb0Qj zF5BNj-RIvrj}%Jp=~B3DSzxHR^8!mTdiHz1nYGY<3CUQnxMjFotos+Q;x9M3P|1J0^UIoGDZ}f(j;MnF8mwjz{<|kUSixp z3vW_lE`gOh6jhb~<2F;(Z4d%ZV zAE$jTS4M3$l z@Wyw2Z{007%iKJ@PxA)~hE?kRVZ&I5eKDBY{axH^nT26-`mjjfC#2fv=RvP<+go5b z?F1`?!(+N7#E0={67)rq^&_WPJ0z&L&}f3#gt{cCr?6-eGViNZ`6R%YC*kYOBwnVHGwtH;rRtA}v#+2w_3oCS&hwx7+>FJ*Z9F|-6RFy_ zLX}bQx&VKfs=u9tX3CVzCNh&LtY(%WY+%+cY>8JU?5qIY65B8&ii&qV*09@ohZlH+ zJFQT0M7B@#UXn2lHuvV8OoqA`$g$gnBpvldn)~U^Ml1W5(G@fHvP%>Bz6HNQ4lW>} z?JCTSdA21AlEDbJ(Nj}(`?{#{U8lv0i4Bv^LoYizpvAl>G)6TisjM&Y46mJC0BmS2 zucVs9qi*D=kH=>a^K7bvl~!E`Z(C}i2X7}@F;-um$}v&~Sudxcj4H}i_r8soYKk(S zVN6Uwv<}chd|KDL9I&x1AX1{)OK(P?!zst!U68XCKb4SD*7v=@!A+orbFuDu+L@tOZiEa>kl8vl#2pr1(2 zz3kX8ms`E)Bm~I;P@jL?$5v%2PeSW{A>O=U_SoVk^ca1^-uG`4S;{Y z#9RJ}z;WDDTL0P+U`GBG2xR+nNB$iG2j&Lz{7ZP;OxSD-*X`PdRO7|%L;$ImW1RMnYwumVkho2cGQy{ampValSA>xLi7bg0 zYN?tJV;0+pxIF$JSqAUaY^!on=hgCdz2>>a{{@1wC9Z4yS59md44Z>PU3v zmk=qh!=A&xp*iPe!9O-b1~YwAHIVRckWTk2tC?3n0~Onh>rwS zxw*FMl=R&=OzuuawSHpwMD9%Q=A^(1YT*!eJZrp{Hb|Ise6|KD+|4U?*<)QBYjH=` zcsYKzSw~zbP$g9Dq;jmMIdMC2lhdE$CE$Le07t7Wjdi#Z8$DrcreK97rc|&ej_Pta zo@w#D%_0lG!wC^T%C*t`>KdLB>)N5_ecbiyZC&!4^}Je~N#m2FjWa;8Bs&jo>6S3` zm=oVnFQYrw&_cMAi8S#`$mXP3IXDRxIyV2hpw(A~Lzd)3c^oR^fIGEL(2&Wz0Jly{fUSjI_|uWWg#km8wRNpJDT` z1kz+fJQJ?`n--kZqW0W)rMtZ4SH;entn4>-r(U&plW$q8;*EDb?9eLn4j)XooJ^&j z+G$ieG77uZD|DYHW%|iTgjW(LChXx#2~4E2Df5lf?zO5V6Bc6!dnIe*M@<bd?iZ1Ub4!k$>1Hron*YqpNi^=BKGaCqsps)C$Uu~Zf?h$Q-_;(Uj?bYt0K+IcX zC+ZJTHZUMcov_iiHr#dGChEi;5c(1J zqcOvHa2^PFI`&35+&N^QfSMTQZ%fVuj?lw{cauD&{P1u#UYr%n#)$X}u8Ub2vUp-r z5%O)%O#+9q&|>PT3$@5y6r0Pebd~VSXY+;Wn;(`FTTNtrClm-0eVkq%zdiWTxOA;X zADq0|Y1DSuvK=b(XdZ7*fAQ2G&pG!Yw^x29G4bp^idUqn>mpksgOJHC@8bE}3zfwe z@{vlR&FD2Vy4&-b>|fe0mxk8hAc&gdZ@fskG3pw8>;3jBx%Og|8y~wMT7fk@!3_h> z5spsf6OBFp1AtTUfQj{-cz0tyChr!J&xhvmB`ht zv6Gu3-192r!%1k2VhJDE&s1jG)wt|Ri9*J~#D&u;ZjzdFa;P@GUB;AVb||l|Uj79xgeYgQat59-eer+{%!j<*MC~Fdr1>>%x zSi@c;O^%DnPAaM8z=v#TP+?8OAh5hNd(r)F-GTyk#=L+1CKkE5x%GRAKw`R z{EC9moxo_ZsQKo$!{b42y>t_Jt~46~&dELK0|s%>`OvcQ34s~b5g-+=<)S}6)sL6$ z&}UqX6QL@{L~|Tq&Im4ar8FxJ4Y^%gN<~dAwvM)v6+5eJn~-&N{zQvcp1_Ys-+wET z<=FcEDtR#WbE+eOPw2OWaaqjn%v^42u|beGT^Ou+fF6t@Q4}ZeZr2+5Gmvah9!MSb zv>OJ<6(AJj{kAmI(uG4)AirBLQ}s8GH--E{n}S+zG-K>XIuj%&T%7t+!}mOAe9 zcE@mZ$L+0__d`eCdfGtR^NnTHrAGn2>@fqlnicm!%u0W^GNQB^FgU`Om!+4f zW!Mp<*K!B$uF2#ayUu*i%0cFNhuO4uC92iQwXaUFXQ%1?+TY z`bsQNVJrpjm#n~Fn;tENr%TMX;A5~}-|MfS!bhzj4@P_&IXmg3#*n3&jMzvqeI?N> zT`WSgFq8S7X){VaRBP#l%EkaSUh(?uSbt+IsAvWd_S6YJMVc4@-xA`M^Lwt?Muo%J zX&oYe)=9_r#u{AAVSNqurcZ=5ACkVsqJL32hf6+ph29E`!2}q?NFKBBs;2gro*_f* zh~C>7dc6coqt>T`lsesZ5&V4R(i$;J!IK3s6xo#{Xs@~r%pR-m>%+`U^}^&kvU$_R zK5+>*Kub}j);}`q2{r)6!3K^rFYrv^SC3Je zZs0sRh3Oalai+F~x5`v8VtiAb71PDM*OaF;9lW%!w#Ahj6Nbi<5o39q)bXWqWVq9# za%9)fiY=hx?Rcw8VKn|aO2u2}VfO?jUS94mF=c5`ldOy-K`WvW$(J-66(f9o_U9u~ zK7&kKS?Xt8rz432H4z6Sl6N*4i3@F(sE!iSxQ*AtZ~0M29cD56GUaHX~1 zo=e9O1bzitHGX@Q^p<^7aAD%DkozMIafN)k!O;CY6BPGz0j2))Eq&akRGRBUHDKqM zk?~Fttk%6MN-+(^s!aEpEHEa^#{N_B598y{r6&mB?;A-Bw|vPP&*f4r6c#v8(+hb< zDZ@a(?uOs)7JR?h{gl{)Lu1l~e=Zaqs|f-V@P1}uSj3gtu$dU8L6$L0CKgJEp%@&f z(3p&uA%{*qE19ASh##eg^s0?KHxDo>i)BY6&{g%sE`gX) z&@{&yJE71q^7CLLv?Lem2`hO_C>bw6Z3I+Hez_Bb(uAMX#?1k6paZ1$^tM$mX74yY z+tc|Z4jmghH0vxl{BK=LnT@HC?_@)&u=KtWTLaq0EwV1)uCiSah5^G#KU4p~1AeAt zPlfOJw^spoMWP!4#sObBLkuAYd`d~MQE=#(r+-64roAD?QBraL+%9{e!m;ng>IX-H@w?*PMkPK2O@PS1cH1P$w?>>iEEAQAZ0EI$ zHK}t=u^a7R{g!V{By~hawcTUBW>^Aj<~k;1e29}cH^=_1LZ7x3NtTdwK~AL6WBmkr zucd2_PIWW8!aH0YmD zt#u#4Vv&9Q0hgzX+goStXsG2MNH&l{l!0=FJ?%Ye{^kgDMPnQ*Dfupj#Hd? zE(oeWl_GhyHhWzj+5*ZiaRK{YA#vJw*WRb$Z<(KE5jgHFZv+%-eD$)vy_n6{FDP4+ za^w+zL>d;!lBamhu$1MGt)(#^=NzoHRP-A0N>FH^wCTsm!L451h4tkLcpw*lOq;@9 z1#=qN_55IEbR$5B7x!F9Q}A{>&Ac+ZarFVN7XYFljy&2Z^G(I}Tn^aOaQ0f>BEIqR z(#?DB!d*OgA&@droyr#@ck7<)?D_$EYF@u|c{4lR>DjM(zEh7fL~3d0c4~t>bggu7 zI4WY#owGQ%b}YhORpm@Cto|6cV+4IQ&$+(F>y3`F2&p*Z~N|xrEk5k^RC8V!6Gi1T1FVY1-o9Zr$(n z3tw__DkoWW62Z*)CNjNCFa_7c5X=n3-@^F5H8E+KwYdtqd^qeJ(PUT2H$JTUF3ier z<9lucyxL2#vu8>~p^^pC1dS@~dJx^pC^1omPivw#$b=tXQCbm=n}Kz`TrX(eY$cXq zXkzmz!^UK;WWv3>-MQThmr&`JAPQyo=D$IG#hgN^hB_4aUAK5h=7hW-!XJr&mi(yf zsD2s0#=;ola~-sV-{PI0l>)=3++0HYxx2`jn)-Z^`H4 zhog0sXXNTYfIgo!g{0Y*W|ukuq&37}q&1$v9>Q{LkfbAesq`5pkYyPlt+_|yHZjaq zCmQLN00H~Jg>d*WW$$9_Hl_QGX5s-2u+Koidi$ZI6x_8q;PD9{L7v>>gb)+IWTRa8 zR&WMO?J~a@jCR8O(Lj8T#%_+7zCv8KEK9g&GLkzmMHDZ@s^a&u;e5&iE3_17l3MMSl13 z7WuQG5FDUmrU7V()T)er3sbqxc!^HK&WSF|{s?p*0nJHp>J>MJoX8|$zvPW%B zS=UO((qI3e`Mo!?E#r@hTDu=5TrOZA846Ricpr?v%1)Go46S(a75we}V#08ohE4Ag za;R3(QpGZUSzyRL;bl@q93Z^dxmt+t5c5Zc6Y`Ia6p3DR*Vn>hP^BVS7>LuPXc3rb z-m(xpQg0)!>?<{Dz#bB(tDATIyo)!<;iBw4V|X_yd4wb4SXuVoRjCzg7T)@T(WODj zpjqizoVuZj6xDhPLb6bu;X8=!^7&}j!9HbuR}?8N%KF68M(ovD1y?d1D7zTNU4Ozr z((HURr-2xCp|Pnc=PO^?27ve3U(QO+T4$v$N0T5)sA7WYnhvfm38jZ28LXk zqlP!)hsd(AcDdwd6K3#BtAtE2ityS_V-HP0*q3!EW(7y6>|0m%_1JIM(K8D)+rhG2 zE3)f`D1pywMoN%YS^=1*`4QFbTsZ|kY$>2$Y7)InK^_TON}X5 z&+N6zIV6Hk1m7KZs3C@%@gwX$&uS*I>9_W>v>Pa)x+21t-Kc%^*`^bjP^qN%uELG9 zS93qwY@2FE35uDpkXK7R`8Jy17)!Nc6Y&})B@;$J605^L@_jtECi<8JBHkbsUEmZI zyj)5qS#~E{M*-gZTpSUC@u+BxNSU{;JPT;&ju+!DXFXg~9_H@g`Hhz9UAroG--X>a zOdm@jNG6$KRP&Fsmgmzwg{xXjP-BD+5s9vbP6gvVs}EG6zJBs^53l|j1wbXc z-*13n>PKdfykUUz0z6RE0mVXpBhw0idi&l84QR7sZO+a=ipT?fgY@1=T-&x&4B+s% z*7~mm8}$I)PhU&W(Ze_CJsQ}m#J|t{UT8&I_jSG~sHju%FN9aX)Yoo6(49;E0 zZ>iJM9Ok#fVS{WjSwrq`fby>!V6Dn8x`z`XCr3-~e6xcD+4|$DxSsHU^5%Q`_Kv=# z0feR?cDb2J$AMJxzzp$=0PgM+8%zn>ZjacSeE1%>4`WW{skl$R9JG7IQ|K29iH@r4 zT3>mg8}2L1ogY>#chY}1Uv^OZb{mw#;gpwK;IomN>n7)aiAYaB&xu2yzh1x~@dSHmsI&=B{*q7N}oRm{&sS*)r zr^p1Klrq{|B#8D3Hj{&9bLePr-(lJ&yQQctTdBzlj)lR{Df%URMQr8A9!j^JbY&-H zZphER`9|r>G8O~3r^dr&ririd`IyyPn#4c;Ydc!G3tl=es&A*x5o?DziGQwV0xl>e zfZXtyRn&oGyaW#P(>96NNiJcXs3Z{Ej;^P=*-6Ekak1ehhZSli}DmILf(pOSPG%#Xf_ z34rA!N^&4^#3|!1sBSqfnF8Fy)TV&Pi7m>87|A#jMFvF@f5Ft`X5SoP!0B|z~$~@}m8J#2qn}2iLWq^raZaZo>4Ys4AC?tL?20c{kP`WAr z0Zskj{sm?`Y;b+3MYYF;dPW4UoTYRb_|(u#mhpr59F<*tbad<~5&~n+D*k&DM?nAi zoDD56=ASD=8Z}2_!cCu|5RH)#JRdk1$Qw0-;7baWyIT}XOOlSA*=DZeKQ9NsBILo( zpHoo=zv-J~mx1A4au^}F)~bw*LGa@Rf?3l_gRFUT$d)Y!6h&!O#YB&sUv#J#PO6rO zRK7&0+mJjjFiao_$q$KFia{^WKay*di$Mq115Ua=!89D13?S^5!1pV->BE#PDck8U zGOjYp??(6lcfoqTOd2q;&cCL1?#Lw)8#RoHlW%+8rPIi{a{4qjuR095;e9?opG#W4 z#w@qlfkkd#r!d>Cc>a-;*3_-0;vJ5{+Opo&3&jME!~A?Ut8+2n&*D@*8`r@0mp=Hw z?aq9*FE?uWwuf#WKKTRr0`iJD#NX!@<@4G0kLVTWj5>#haGRgqyr%2lmjm5?@3Z9} z5pRB#_JMmryEc1i-0bR*gYL>TwAx*@w%cy9IF%Bu&bG}%O=7QW|5MF|rh((FfU7Ov z9x{rihit9rq*UJx5_yUjhxD2@3OIm{FyEe}<-MnDtnQ6n#5U-pDJs7G!U5B~>cTK;+=U>Yt;9bMxj=^+j!!PZhkTsa zO$iM+^@8CDnM#m%I)eLJx^g@EGKW8M@UPP;@u`Z6!mG-3g_rX}5AG+P^2`tcK{=~> zI7(G^r3e!GRi0u}=2%)f*61LP&=|twW#YSze`A0IoH)l_ZQDa2vv1nLpzRGM6tJtU z2nvALJ5%GdgB6&^*()iPgx(=R@MSGj_=o?+#o)){06>2)(n8E0Ab9{%g9P2X79>be z>(Kx(822ij&Y!2%)}OWaz5uzswDmxmVU=Hm>G99UIWoYN2DWejHuMv4YJJ!bZtr3n z0X)qpaB$yWOmH^CJPCGX+ujX^XdG1JuP2y8!np8`Xa99(40~;Eg1qF8~ba|3CR#3pfM+d*Y zjsU7!VhnvK^1;AFq$B6L2+p%+(Q*yY_MwC-9!h_`0&Y8S3E(q8KFseMD+<642HwyZ zx=iu$4UHSm8OI~_%!*vzbTJ-kBo9Kl6n`^$l zh4jP_gL8(y653`3ImqjVqV$1jkA(CA0_Udm0pw$BEQ8!@TQL_UPYyAjjROpzyy^uaKFt5{PF!pWzh0t}4W&VJdfAbHxh3_e{ z|0SIC_mG+YN8qIYUSA$astCkA{pWxb(7o0dz>XsW-9srLK;`RCP|hzf>2E;Fe?n&r z1i)DL|JZT zo<I$htU%6k21-xXTA3$3;H8q)A&aP?f2HY5MGzKnH)b9Zx^qwacmT`cQ$BQfuJ zyC9FZA6ko_m0Y3|tPSC`lk!@+yWxF0tkaWim585%-*6zlpg?q1og3^2+7e4xS?eDq z75YLri4%)#c6Wq?hvm^`6B|PveQOIuh;HS&h zW0xW7ZlH$i6EHa(u^a(Y+Cx%~Jz^sL{8TOuXQB?&MJq*ysXLf@qH+87*;*d=B$p{| zYZ`X$Zm>?%Q-(}tY5DP?tSF_4H`!q72Q#!@GQ(+i4Zpy<@Q5?T-_uX_>2^vuco8q3fSfrvGWQKq2Ese)iGjBk`_);Xj(XsrkYWJ1{()KZIy=b`K?o*`W(-6bs zukFjZ7KY_Yl6zYO1KF^yGUH!3(9mh3vpqpcLnDZ?w?>>Wb)Tk2S*3_jCQBtp;x~OK z69lSQv+GE7v5Vvd$eB5z#!mR%_(2wnQ~HFeB7q-`l?c;yM~s(oKfOma{o$t))HO=B z!qyqo@i0?*{`=&U>PJdsc&`>$IzK!GlmWwnl~UilLJLq*>=E5&K;CdrGJYAZQ2#(c zc{g=u#WY8U-JP_uOb^gD!?nHv$i$~urn?15Z2f{U zk*)wvAQDLv+5yJ^>t^$g+L93BLp*#G5-R}pE?B|;M0|k!iVrfJzwx^WtJ)1F<6Fcp zbcMjGF5#Cntl>9k=@6VMY(l|G*AFeeoM9HFO}n^Mj**BpE4bm`0y+&nPn{9;(ouDd z&L*q)GsK`^GWqo#Vuz_EZ zFHXJhLS0-g&bRM^AfUWYYSRJ6Ls@uPxHAb0A)lJJp~z&Vc_N*m&}Z~*<4F~4+cax6 zW4S?51PWAT^e_Zv($pD2zs?3T@ToCECh?%k%qY;YpG9xv=W_pi!#L^dUlV3{;0nL> z`6b69D)@Vt;ZT(+-x5K7Xq>XTh1`i$Wz4V__MrEUx8d{YVPyZWJ82dsUEd*w&&P+6 zduq0fyYhdQLqbJoMvz}+nHnSL6aQ`=!sMe!JlOFu+VG8t7+83GRJx>vi`{p80&jjo zHAC~1-52uZ9J;sSnz02jeEY4>pZGKW_WqDGV;)wY5Q;n!R*?qbfc_Cxf~JBzCZe-3 zXQh?C+kjv4B*)`{n#IyWXENruKROv)qh5eFdf)@Z2%~>UKY!C712q!anL@MJV-jd< zQT>QucA#oa!NkzM-y42#j#(R!QCu35b-v4M%R~QGf>81s_o7{`tO=v0MP2ImrTkju zB@Y~_#jYyueLMPumD>UmQVR^@DEcg04w{?AV!9jukcElc>_+M-qK@6!+USi7Jonw( zq>YP^v%~ktT(`>~_vVU>SHd4{%bQrlXqUhYu?>D15G;D|skwE&Xqr4pDh2*|1TJ5& z=vo>dfw$X3rz$z0P)yv%+-K2jncBmW=T%ydo>|XFh+4fQvihB$`9aZByQTcc8#C?E zD6&<=0xl}k%~q%mO%()NA1rvCby*N9rCnYr>X8gcqLsb*+I~EzsPSV`OFK?|e+AD4 z<|x{(dt0B+aJlt{Z?>HWgLXRI`i^`2SzOmO%5>GnQPrnF)+LiiKOj+$+OImyMuc8Tk!;=Nfcw8Z7 z-N^*mkz59x(zMR5%3Kq+WpsL9d?<3B(Sd?x4WigQZD`VF+7n_z43#j@psKEJ(NCMf z3naz-&vUWBL1D-rA8(1W&u2wbjI+XRL0i-_Uj&D$cCQKZ&p&vt7zYd6W@RSjMM@R)Wj2g|L zC(zJY(Muc3i*}OHAA1L+zx8ldNbDbR(pjaaAC$Wj43QM@mjpt8P1#Z?=@H~ilE{e8KUlkB$L!_C|e z64nFll~gzcKCgdd`Pf5@PHaKp?v+AFS~0Q;z0HIW0dviKO)9fNR!zakr?z5_mf%oy zqF`^m23VzNg;diNiJ8D)Vb;Jr-4`C))Oad3_;~EvX78~H`B)1$T7%nG!ui5sL}b^G z4O%c*=U-DwPxl{LnXIW%7EHc^J^n1NBB$kJMBPeGkI<@@GqUHTuv*B`p4rTp66?v4 z!Yodbwj(@P!uCXLM&rc_&FB`}yV(4uegF97xUA9O88HPM%D6W?<7f;~`U;7?1Hrj? zA_n*eZxos+i!?;D8W>ZQZBIjebyqRyyMvqAB>egkD#CK{M6)yo&ztxC@l@>b=?A|j zJ?iXvrVz%_(MN?%Z*(MQbUV8qKYiT-nnz=h>>Bb1wfJ8bm{jTVeqbFPwR3eK1M|z}emeNKnfYV(GH5O+=+_J!{35qYPtx z)nGhHNyz^x^$lGa>`Qz?wl4iUlTF95Mb8M@R4xB0u=aQ@{ubD8{ilqr;$(+;9vS zw&Is9d(hEi160$%7zx_xYzzY6W?Goir*Qgiodj3~wzl80DI|_Tm;W&+eFZ^TL#6vo zHmHy&5Zs5lfL4B2WeTP`TB{$nE&WUQbc-A z@n)BsAnzW9wE#D=q95sZalKf;LVf5Dp<`TqirjrvJvXxd=589RePI3F1ED9>ZmJQB zj95=xN6U93baguh$h6Gkj+&*Zm4T6H?MU~rJR;G<;yQHlDHck*scl7;Eh`S;fL{Xj z<#A0@8EM-*2{Eeucz3$$)&9zTGNrbQrrAh&(aFHksI<4dxM`=}c$eJ56m$M_=Vkvc z%iUXHk}#de+S;Cr2hQJp^xipnNK2qqc9V;#+7Z2t#$QO5$H*Gwc}5ns%kxZbJmuFr zxpATZEQ2|q=DUl7j6~#;&8vftreEoLCwdd`R8e^ZDEo-4fVWi<$J|E*J-x*Gm8&7) zJGizuug*w$ay~dGCbLBTam*awi1rSw-iQ`ewUd#EK0Hgt_*AwT=ZaDwkVDm1xAG~y zf(Ixh+DWDt@a0fRCfP~8XM7aPu@Sx4X)7Z!{`@N)x!qWx-mcB7sVjo^0->jLZkhAg zy>_Q}OSe4FcnF%p)uu|FpmaX5ai zv4Usf`j6r#4kL20pVd4_bbW~3El*8(5Q>$Z#RagBjzh*sglF;_KbYk@YHC?j3JtT2 z35x#!Vr&I8ZQ!~@Njtvolv?nJ=R@?KkK2SOydSj|OYOPEnUjq8DUSL2`yQ)72R3?Puz*#C9z2a3Z@z_$U3u|won4kAF_yRtOk zC_e;zO-O`QO~Y^JO>Eu9&XkjdzvI`de0_g#&U&VB&0JhLowgZcN@F%rE`4U#`4kV` z1C6KrWt9QGgiIG8fmv>fUs zsWsx%z1kDo3s=<)Kag%Ng&uBWN&S}?(f?CQ@c*RG0VvHcj@+*#g#aUt?KcsQ?I#fq zr~%)@BKOQX@O|9X&%$qt9r!oJ4*U~px^MHFVh8?h8T^}K2mWmt{M$17Z_DhzEwlf& z%>LUl`)|wazb&)>whW~4`_&)z-h9=7tsEL`BWYe*Nwo<8Sotk<`sh4o>$lX+FnkVxPo5EwF2Qx&;>)jg?O+&;R-sj zqYm@M26RDdIv~~4`SP}U@2K5NtHd+t5Tg;wse`-FOmsMM*LJ*OSBO#4ht9k-&?SEH zMz`idZI^`@wU+Th_0bcHO4RawE>dmJAFb`5Q9reJ@9TV0lv!W)<&iNm-`+%y3m0m- zS>m_2Tv=NY(hda4OCL6)w)sSc~L^T zTQ+*W3-KB~y5&Cq!Kz*A-Pb8v>Ny+Hk3UmZO;bq0VCa(JXX|WctCnbO@p^-D^$ig? z*?YH6hemm3a6>0RtjzJcO?+v>YcwYb#L0pZh;5x=8}#uV#yD=99d=fI{q(``WxJSTo?N}W>L>yihT=YI@k|I zk79i(=BAh2QrG%262sb!)Yw&&En~VpGJ#l-HbKq?ZNnv1UsO!P^l8U;3!|m#P&{+X z(B)jTTr-}EQw^_hk0*{t`D-=n@+?MGyHeL0PQj?V_;z|*l7$^?<9n29_+upFeLDxj zg(1NXjqBp4rwfGJK^0&EXHh=k;jxLKw;-yDgTPqv%799CKKD0L8R`8Na8+Zlc`=O{ zt;1SxpLx;jhQyM-)!s`QtAqD4!R8fF|8$6&Ypvv_;8)Pzt-#H|shzJ>wxN@`p6}%l zw{GZ*YQpSz-pPsL=@MF7TP~OmI^R+H%I7Yvmq9TaPZxkfN64ix{{M0J)=_bETjD5g z0Rq7tLXhB%G!DV7akoH2a7(bDfdmciF2PA~4-nh}G#=c7ySu+4-*@MC@10rmTkpO3 zYkIBfQ&s2GKKs4f$3C*z;%Sm( zlRgn7i87_E+!W^}vCbPClE|1}skKX+pc3f_N8hjm5F7klXQfQ5+ zqmJn3k4^Bp<|A&+3Bf8$*PDK6)iCI|(P?2r!s@42RyKmSf)jx5 zv-vCCj-y*Geodx$2@G zq}3i9;Lh)wVjPABx2b2X?y)Z{E=}OQR-8^i^ffK#GOxlZ@oTs1cmyWM=B%e z>)@evES5TWtC!5cFK}1#yl&6WvH+sFWq2vOPIbL zau6NKs;T;!A8tbLO%*aGlCBL`1sn!GO&2P0gfUCs!{eu)u2RNSmEt9Q<(^yQ-j~AU^;aqKTj^iC+Zx^V+dGW1m+_1I;Z=G??2yiT}v|I?t#k( zEI6=w;?x1FC%}?w_8$gS>Vp(Lzs>6%A^brm%3YwEC?|-6*jqr8-1NF|wNHqrC(ONX z{DXDGR!r=Hm_z1l zyuzm&#WrycX8&L)OxgS@laNJ0ReY+h<~ubm%$F#bPae0mq+ zgrm=o3L4-KE=}{B>f;Z#8WeM0OY>EN<|{whs21<$|AnxT7V>g1OSLzC3x5L!v}qrI zBWgAG?h;an9H>Pyu%N0{i>Xc<4Jn7g}+?&b+qbgkw-k0D$U}SXXr%Q zT0Ur$$>W9DHkZP~0KJH)nVwExT+NMTU$q@W@yDH)V}|BjH~ZtpbC$8wm~~EW z-2PtiII8dR$acfKFQa1kWteiG?ifrE}Mw{ofQoWnD?Mv%2_PCHpCJ)BtHp%{32yyc4aDv|!7_T_yU9algl?C<~vKBtL8K-G}FVoem8bBqIFRxH6*X~m%zd- zvEZjRk(PGnYa!*M!r*rUA*ZF^i9@SoOiyAm>$_Ha6S;&?XYDhwL$k&meom&+JTbV# zXSF^|+dlWnkq zRN@ciF8p-(+AOYD1nKbLEtrLrMUz32l7kHK^rmW(DOD=RtOzRfw`uJsj0OWFGv_OG z0kRlE?q4p?zzw0fv+;vo!_Mn|`CP4F=k>dki?35L7hjY5ZZtGTlFRBNrAC|8!+w39 z1oBjhwVkz|@TZ>W4{nG?@##OWcWKPHnU8YVcNg zT6Z@uOA6xR%)0Fry{zL>DqU}+!>ajvkjv%^TW2D-)5;lIde%6*@BC)J`mDw5SqAJy+Ff{V&a0>8#14ap z*7RZkyEq*Sym-`uz79{yn@37Y66OXB(Ax4e!F8 z9R0XnckSYifjlKAlbUvj9Iupulg`6&4d1tij3{l+xEKxQYYgfp&Me&ud9FhCyUmt* zFS${hd12GXhW@MV@5y-CaE8*~%BLI{=f;+g7`~Wi6U^e$y6O%tX$F~WJ92%I2H@+z z7w85 z+F-|RO(6CT&3j-ckJu!2M6Fc$z;80cF5`UGkE?&@*a@~>%{HecA|b0k(+pK*(`r^P z)6;-t{<5-d-%j%w|1_YbQwiMSzACX@ZI1|VP->TcAMM;&8GVuxo;GQVlyu&2=zbi7 zxK;#8RU<&JbC*pQS^?`Ch3)EbMELDctF%LErbMOwaPgT6RoNL{4BaYRV=^#;#+5XU4Hy9;gN~zV>px|jqk>O%=2&s;DcCLzH+uF@5+A2V=9nn~UNn;3EM*p!;g^O#bB6LnL!kdsSG9nSsy@FJzq6q?UfnWYn7dXddkyNu)vDJ9OPX;VhWRDBglNsJ^V4ddMohnq2)RR(C{qz!8rB$WS8~%)8 z>7%&{)yw#bXrn2{uPi99Qo>^fO{i<3Ik{EDY&$F{CS>3~fzXdrfDC~EKvUNO!~~vV zEMh^44~@@sAw&e7?U9-ST~Rq`0-MHA7!(K?V4XB zs-$;4Vm@OA0$xL$Ga+I{xWi+@p=PV58>aPhnsJMzdsm_OJ5W8hM@8TmTd3HxXsxU& zV)gFP(Mt22I1;iv&q`vpSqieQAq!euB9Bku-II3Rx-HG6attk!rqPf!<#R zza@R!+{G{a~n5)>^G=P$pr=Py|u{DZ6!-WLIsGmF8Cx!gI zS(r14F5KWi;+sX(-OmTn<|A5CONv8$5p$>ew$b=Z1P~%Nx3%4Oc=X|Gq0Fxc^mWUo zF%I6@)B^n-Z-)EUK@%yh4_W`r6-hsw68SOr+mKlKcv6XR5gSpPmX=IwK`wH?4h1~J zBbD6ucmr48R4Lf1_V~}KLkVp@a5Pi`FHD~%e;Q*Xz66deL=*Q=>*rL6-fvq?(3Br+{Pho3ThkJOtV^O5X?v?*^UGoJ6^?>zjZ!6U< zaPj(hA|ZS}?N+dz&cKdr!-YT$F!NYF%4oL;$cllY>3spn?i6w|wjI{5Wk#*A+XwI1 zVw4M7t|SWpxs*A zshYWixZH6HKDc^cVG$Zit4ghI5ZQ9-%1}hh*g92)eZ3im4DAhO8{qDBFZWpkess5N zRFR9iewfx2(jEitAk>u10NNo%5uGWFQ4}WdT-gc7Rm7Z`IICZZLnblPxW<*&+3c}! zZli32p)Tuou#n028A^1%O-Ep?{A4j9_F6@SBz-zBR}&WEWE$WKmT_qD}w*1sU_6j-prQcU-`O!IQ0L67y+K<{$?`&6GnW1 zjqJbZPdZ!v10B%6q62!(?36t- zVu^pE!dTIU|HK-|m6U(})iHj4&s9*i5o=QSTM6q?C0I)JX3pF4u4NY4=fnHO55*(% zsWv4G_qSuSJ}rNR0zFfvo4;MV6<$v4KwcaWnV1#5zdk>BaK2%`y}$dmax-;uZFP1c z_}+}D)Z+r(Vafh-!|1`8jOzaAqHgiw<=p+fsDqn#|5bu%ar1B1`*YW!x+769pAY+q zFMh0M*l$_0N?r~-HgtWMZgH72T(ZV!xu(u4JA%&N%=gqS`ULZCI8Z&H(C&&m)X$NC?}Sj^2MpZ{-+H#S5Zo(Ht{tLYlEDXM8K8?WSSpzP ze%WE9Ozb7vK2$NvGlw$S1-=dzwOtI)$z0&|E;C9*W1e++t9T3N1MlQ>yD{7I;B|Af zqW}FmY{ungYoN}PH$Z-P{)Wt?;%bT*5gtLy^yN!X!tCCV+hf?qAUCyF_`_M{+0)E~xZfJkf!YvcwI z^J8_c@T|QSXBpqyLtaNUe}4V)H!Vj6_+Y9h^`HctG)J!A2(KlNR=Vf(^Fl-YtJolT zQKCpB-;j-D?m7OV>(yGL!U8JYmRHNDrpc5`40c0*vHo}IYVBcy+Jied!byrJrW}QjwMs$Oeg_8pPL?d{Z|DJF{dsqDfDp>OycmiOy{HioTR+sOO&qSx)(8oywY^6 zC!GG3>n}_0IQ`pWV(&XR6C&0(N9?L=${}3Yz$BN2aS;Xvky*Vl+o3r9Y|kUt;5^C{b3By zp#qz1RrWk5NalS_nQ$JeFuZn}xZXDXb@TTj>__Mvc^zKZ9ySJEcYg>^ zVqjW_@3mT&n+Cvo;08?50H8aCzUr*Q@3sp0<`*ZSa&!p!QY4|OGzD)@y~)tPI#FpX zcifh_L^OUIU`|OMqz#jB!fEESVE&P?`us=gDnpWmydDS2)(Z;fMBTa+ceP5;KS0Zk zuw>(q8PpDepI=!2)dqT?BAgTIZ^;Z@U#BdS3V8Qn62fTfVk~6qS*mjVVF~W*LU}b$ zKg*T{o8#8JVG(9cmcqBPbKiXeizVe!o+eZanA*_iP*#H>-WMeoXf#eCK-g>Lg>j#L zDPdfG8IE876002X2+mrZveo$A8BRE%TN=crhI9LelG>)>v+~*(*7ep4zqmAODE!xVHiAZp)CUxDgUZn zWk3}^TNUa#m1(&1di3`Xch{rMJoFohVc4^1C1~P~LigygQbeb$9G3EJS1%6yixYk4=LEYrjMY=1;uV;PN#;o^ zN|?Z`O;QcMSi6M~YvuuHE0yIA?FVn1_L&B!t z$jCV9C$8#LPHIWzbF~+vv?+YqBw-$}*Gay76YMhDv5z(T)s2Yc7ie~Dri;QczTd z+|sni(yq7>g|GdqwmFNm#vqk+_`xJ8as|&qQoiLSzfoYs5gZ0AhRxx)xPjHrJccz3 zE{q@*g5G60XGK5#EX0K!`i`3kn#}D1?QqIypNVD7G6wb<0071W5IR>M`vzfP_0ZoO zj`H-=WhA?LKeD5IvPlv-exviC$E9`&nQ(FY8U}egiwdrk?7+K&jOB8-p%FupLc4D0 zf#(w;c&`TQdD3nKk|$UQ#eydj$4eu0Ya?_oMe!7PqZ9beqF!Y%{`SuLEb4TOsGzd` zo_uR58=+y(^Rk{jZZTY{>VX4c?0)U(j-clf`L@$RPT~OfnYSMCMN4l)cu$7qTvM@m zV{@Im9{0&}{csA!=MIzJBVLQ)FWN4+jlB0{)zE+_;fFW#AAI#@#?$+t`5y;f!;Z&< zC3W=OfH2{o)RYK%>o?xy%e7F^rLQtX%AkDZU*E8g!D)g?ER&g|@l4-sW9(%BNt@0ZJH@fT$aW}eWd5bieyBcYP-&an1 zQ^(&OdMC}nUWt;f41t4M$jfs#YRZ?Lh&awnlSdau^Y)GOo zwnl=mKp2YVHPl$(jzcB+191{W6cbWFg~HTNi7LH?dfV1}+F=cZdl(FyP$R+o&z zW9Uuy-KtZ>l!OP(bJcUf0dmO%@|CmX2yBu^--}_HGFYxw&%g0^r%F&DR*|m^WJP@J z70CIxrEY>aPQEgkg?&q79dWd-(z9(*=jFrqOUzXLPbu%(MjsESLci4lzV4wFE$u32FDE}p2HUplv(O;1q zAAaQIk&vdoEdU`ey>}{Ymyly>kCpTIWR{05T+0W^QBUy!MjGE9! zmmKm2hl>SRI?N8=G?)YK2>O4wq4ab5k|wmB?8l2*B>)6YKS1D^0R&DPaz7`xhgI8B zC+7>?Exa~KPQz~c80ce2z_l{=a!lA2vqSDKZ}RGK#~Bw``Ad&pOThr%V&0OfPR{YWjzhS_CcBOxBQGqERjU@9R#jcLa9Vbe~~LsCc5@!N^{f5)XIDQEWAl z?ry>FUSA&;A4lp@UP#k+mOog7X1VM3!bZo=V}iU@JxD|IZ0z05Bp9FAmAOs5sx@m| zKCPxWF#U)-B2J!>Qg%bPFV@k)-0oHu==Yo10?kRQ19H59mX)KA$aaITFsAO6qsUrW#-Q3tD%7XSt8|7tKleQO{FZ#`l>?&{1<2g)R>B0(GUK%`-ST)a3id5(V z5MzO(ig_t6RTrH$U%NecE2jNpA8_;n$5xEE__#cuOVw{>YdRs)x_FL@@-qKPV1BOU z%VSLb%ZH5ILp}Bt`0vfdi!M!mF1sfbL*Tk?S=4^DBiXBFEa<>_Glwx^U4d%Qbp$856n$|1DC=lpHuZj?GkbCk>L z)e)D?>xfStg`8*3zSmy< z;94L7X^{%(UZQI{B6kfks+#}$ajjAvt>2-bj&3VGL5E@MOCzj7^E9ESS8ZIGTkNUH zH7nDdU8Q;KyCy-0Ogla#;k!NekcI2UlavH!;EDn$YnT+mv-L3YeT3|yd`!QmGM|?+ zz8aExZ*&qjLHSEx<8ft58-4h@!Te2T+RCR1gJMG$l2#;j6Na})d0Qt16qRv=A$ip* z*f+_++jlVXZ_`7Puzic?-_E&kM{km^-rhTZ5isuGxqW#*jG2>sQcy&-WD#^yU}M|v z)PwIII#iFrN&OXVlzIzYJk^mCSRCwNA*PWjN|6*XdChzU z`7vSCSAaf{CQ32&aTs7YO_P!=frAuA&Zv1vjXMrf37A(8RMhWDoEgj)h2H-mw5 zc+)O=^+tZu_kpstu1@m`I)JY%9rMbXR2zUk`xBNK%N?LM3pD$20D9BZ$T)ac8B>)| zLI~~U;hmeQ%_dY79 z59h{-C0TccrcWtrxQ4xl1cEGW+qr-T0NH>;5ts{hj2EV=oD7x3GX2HMl~&aI7bGAg zQ~~U*k6=c`%a8%gF~I|F)8G2QU!1w)t2<#gdQ|^HXjpqP^fs3yrx3<*K~0>K#@Vrh z6_EOet&ym1o<#TjNA?u#Fs8zpJC%gKgf+kEPTB}KU7 zRAB}dM!5G8C<2$^?l|M1rzTwrD8Lk`a{MB&zC|ob+HY1lHP`H^aA3$9a?J=l29$Th zZd5Lt-d`AUoYwucR>w6Jb2=zg9P2!6Xg<$`!kjo@LYrST6|4)K?l?v}y`^6lgK-jP zr?laWVFo6daY*v`!Gj5GDyMSZnR4tyEy`Wkt=@q{2XYd@yV#iBKs0*L3x>NMD&nx3 zk>ZJj9ubRjM~bScJ$2B~Md$0t9lPhv1FpZYfGsS7PqPWz^ryD*}s8A_MXype8kGSa6VqNV01OW&u~vekK8lbGB|A*W7&u}hna+qA3}-~EKF*I@OD01WZzR@25&94ad0$d zNNJQ=;BpD!0dA)sZ~H4|$R#c%7y6)fY|H38{Kz@PBTYSI0Or;YU~c88K41sZiMDZ7 zP)=0+-I>-IpReC@U;-W{SQs)sPp=+6LfbnqCN5k`PGTME^jdy|Cefo)0V2!zta}9c z)#3+j0q8DUclzzcw(=o$y+)v71;d>&e^6Mr*Hc07dQuKu3(+_D z(S}m12t?!^ahoB>fd9Cn17uNh>vr8os?mL21#bbHXK7CdZ^5xjC^oe>wZ>GD5Ab#K z_e~(NoABq=$6Ig)D*5GKXZj~O0d`d?n|9sj?aaVqPQ~aBK`Do|lm2yy*6p*!=no+U zIg^SRnGyFymnSWokWIY*Qcm-~)v3fE=KlXh>7DDJ_00c2`Y8QpISt?v^gl~Tz#RXb zgoNu~MG}8Z7ycoV_#eRNG4>1~Ir=B@2ruZr5+MCULc;m4=zt#$4gP`7e=8y3`cL7Q zXCwZ@d8ifd!3!Lu@;A&wa!9L)X?$XEsItcouf9$F(4-jLx1=SBVO6jhpj0|hOC0Ok zHldn`zh2zS6>SktFskB}0p+dEJ{1+dyXh5p&v$>IC7SmZ&~FXeU~i0VCMy}Ld$`@( zVsELx3vKa9ySf&+5b{aAyPZfI5j2W02;$(qKPeEMD}DNKbu-56^R}+#;o@@{J7^*M zVw#?Exu<}3p|s`n?x_Ctv&$ITxlf>i$kVLOwNG1mS2B&POuQ%?Lm0JXr^*{J{J`6FeL~dHSzsNf|zc1spK60>8 z;7h}@7*vpGW`kCwfxGh7=9?5on-s*0Sr=Pc%6BL%x?_{tRC?gObwzspx!>h!S+uCyV!~vK=-ZN`6WxtFcML=(Uc7+2)sA?s z*X9nkb2-r4oqXcs%P$wuKM9be~Qe6Yplq1n4RQ6yjlzW5`7QA$Vt(CnH^PD@D8a75OB)BT87Zkfm!83qf;PUzFCLJ4?r2}oL$?LoK>cxU;c)I~rdFQZfLsz#>@vUL>;QQQ1Ylu-BqgJAYHowUaZN4IqlHq zM~oO|M|>Y-)vOQZ!ErtNUYt<=yR?X?9%uVju`iM%qb!OW+HL5e=PbUtWv}*rLxsir zTX#8QGx+sH^dw~pg%p26`FAig6o@X-9@rxgP{Rv|Aie`cSV6yz$4p-MC%sh4n~pKj zgvR<+9Ut$|5nPds#n&udEHe@}BqI^2-EWXBdR=o=1PlilJOg~PGgIAfm0U^(njH!>yCrfQ!`#vl7jtx#VaiTcuY5EwrhLR;H)VX4kR^r; z`pVv)1a*}VGe)075pKr>3)MSi4h`9n7V~HLSevXpk6iIj)}$T;^-akmJtS88YgdN>h`VQuHJix`)195K4we?-cG>XgEG~>ppdCymAP$v~nR*ed=1Z;D$k9C!$uSGc<~WRrrUp>&2gct9F#eRL zRvFN;b1B5){EL{iH`NqIapbDG`0vl>BFCMnI5l@|$rV(^3gU06H zhh9$|>J*fpKXw2*V@@A2V~$PEmx=rykyj+HsU(9&=GdF{Ea1Il-!>uh3X-wL=iMBe zPz_Y!1yjP*3M@a|Z<%%=6wLMay0+41rG+LP!@_SWJR1)aCL#}++c}2RH?od}ys_E~ z?$|=-*PiRNn-Y2gg4M_#7S~C`-G*_@b!9XU;=jNiVOLFs!TaIXLOH|@wJ_H)IFn}0 zDww~Kz|L5}KBJiH8ib9&hcRrga>`q)opW|K04vf3!^Ytm?&~FvP+>C`;XQvt)v=k= zDO6&ZL)Fw;{g({|ld>CRUW2_E`Cne|jCSmrVIHZ8FTCo!y7_%@o*E)+w*Mx9+-jI%+ewf&_i1^+u=WTBzG(K4_{o1LF~pGi=iJe7dh3RB)9tIS zJ>H%e!XV|V>)kx8Mnz4n#Nbm5)S8sXmI)oh@@lp!o*u$54VJ1^pE&5rs!5Rf1n`jG z3&FsFbuur1jvVg(SF{%q(Nn}7ZPB2XcGN70%B+@QI zv3lWWJh)EQ8C!criWeWWb~0&8Ka6hFUaK2*Y`Z(v6h*q$7dOwX)g8m)PWzr3GC*@0 zr(BBM=)*DgYci1@VM7FH4>3(s{sZ=ZoIwpMw2u{-MC3EJgo}l^fHo0*w0LY&57vxTNf@pIf>Y>-Gu}!s)P{Tx{fxd z+j;~j4VCILP(REASG_?Q=&u7?-qU|iyB`4_tDB^ZWLqgAEEA#>7Q8f8)tOTAV`L=1 zE(h|)Cdq-k>Yd3R9;$6^IH;I3zrn4L~&nrNp`C%-`f? zSz0V*^Uj%3zTSm=`}Ltq1M1!NrMx-Yn%SVDnIPZDxzDbeeYSLDs8UQ{+Mw3a)V@E# zp%^+%&Q@et8!f@s@9Ol^VH$%y=5=kk#9uF)xvm{a3;?5nF4twu3}M8d(1zFrFr(-% zg?uY{+odsY+x5kNReVh=sUk}!-O(o8iCM@)r?$OcXLLEOG?fCF9zW#jv49uu+kPzt zyl?;?8(`N8)rVeB)Rx~@tc)b=SG8i`hHNnt{>om?PioG7g#p^R)#;)Z)l!Y8DoX0> z(8fGIBv`8mucZ;y(31vMXZqIlp4=*1NK~^HcfAjPm%QRmtxE@dc!hz zsU|(O$>N%B4Gvb3G6EUMmVyt}}*I9VYX6ykV&(|sat zfG1($C6x^hwh@@%L4xg*IPj>pZHGMoDClw4=GS2oJP@e6KZMwQN>AgM>Qy;1s=#V8 zE4(ZNY=40FaZiBk(JxV%?Taz?H$CJgOlZvz_x*NnAJa{^B2_27pdg zB^3=B#U(QpFyS(HLTXLHi-6OBsHgDr%D^#w`*TieN?f6-p-Ku&&;k*JVNxRb9pU0Q zEf7!LuBDF=Y?KV z5`1oCkS;Lh(r-JCFs!cay0+@>cpCB_Smq=OdXEY0^-THn8@C4FCs-&8mlE$V3{F7Fj9Txpxxj&T#lD8VioBrx&RX7J~Rcj zDI{5p3s-0c{6ei`cyJu<7i_0uF+NowztO;79|eNJ6?l{T_a-*}*V9M@&_sN2n;7X& zB)3`lF0hzXYc7W=j)uP?g}Ky6&QD|^0lA0c-_@jBa}UV@lz%}ZrWME*e%P7GN_qtN zaSz8;oN_}jcuN!`y?r^`!7p$71xf4_KOup|qFT)%bmb&7yCKi$%N0M>wQ1N&7^5$s zsDq{m@&;y&nZDr(hbbZ`M0M=%wd+26d?%`W#z46+9<)TI)VemzdbAkXr0$Fu!p>Og z@Od7hMspq?I*2J3%B@RNkNk;tJ2%+0)yV&mZlzh3OX@ba#XEihF-^q}d`%PX%~N_C z&k-)%6N3_DwJYLj)ea^4lk0D_`_gpFBB|S6FZKQ!&S%Yz^hVo-ZAMSOnQ+D{IRH$x zX29+4aEXawA(H7dGNG&KaeiiSx-%rzlgLt$9$L%RpbQN>+5mM#zGItFYyFY~`9P4d zz`&J%(YqJm$pkBAKT?P0Gb6V{x;bEPG=h@Dwm4!zm;mu{vl?>75o-jvCWS3DcXKyo z@?0m=mcCQVoF!F0<0+1wG}t4}aj7q^Fi2b^HCK`YRAK)ZeYwtmfPH2 zOJJzIo!gCV1csVqFjoN}wV?~<`kU^!c8VMHnQTV-|z$T5Jax*cKDCgk6~Si#r6#$!6W4SCJEIeh|iNe9ly39uP~Y+j&JVyExM|* zDI9;QJXE+zF~JgAZ6qc7drN*sXmLnml-X1ct@8Xi2}o_)e@iq2ooRI$Rc7@#WrVm8 zCzXBJJV^Ei>n-~aD8__VgpV;33#~JbKJ;+;BMe>o3a!}ir>~QU`(=}q`cH66Oa+>M zkI)+nd-`PH5{-LoCP1$4ga6Se1@X`kc@z*-z}77WiP@E4LRY+b#ok{|5tasnI52< z(5*B2o23$n@KTeZ(9>68@-$n)8{QsuHZ|dM; z?`-DyugvK`E`0vMoc=U&|K{HRAD1=UoV@?ey$2bY{ueH5{x}x;A4KLc!WqE0 z|39vwxw-iMopBFf@}FEoKl%as2O9q!!=9TP{O{4*r%TD}qrF=IlLkb-bjZFh=#|3! zag`nX380uvhT`FSbSwHBjZ?O}y`fHiRwq!up`;)Vn+Mc;czB~DB zPSvnv?fj&S{o%&Z-N)_rU_xZgtx@Sc1w7R`gHURzioMUnNx#os&z{fW)e6go+mUb|C}IY*@{T)GuqY{+Sw_U4ASWg+ZDmxr1~Tm!qIQdAth zS(!E64`1bAV9+PmXR&1g0}IMyyzU!PwpxDmnFhXOH0mw!!Bo`tPD!UDW=WZJ17K|l zL>RJelu_v1FQ^IUHv;^d7(MxUUlwXnOYePrcC?zKw4#vZ_zwSBkdFa=)yD#&q~SOV-S@>b z0jQ*nqv=fVXB))XgE_7=)D2f0-&@bIQqNW@8dB|tPv&{jNmg&kR=f_-e)k?@f8x;M zAeRzHq&`UtzPG}6Qy9Ml-a@3y;0!+*tN(E6coHb!CCQ;sNk@n%2iGDh;= zvAM+;!Es73TSJE3V721uF5T9a*||M3ef0Lylc$+j$r*yv{gD|~cmDUD9gAb3qpB3= zS0zW)7EhXHZm;M1)EvnC@^SgXJW3q488ptxk1oioNXdLaLmp-W(|3H_t3&z75UH?HDCgVq5HtuP^Mm69dh&LRi?RqO4I6zHtb`5dGdu?nFJsTKKR}UjU~= z1eeNUJaRDuVe!45c#215%m_zg**Z8g-l_4autjb>@2mFZFWZk>O$4qhj6aY$b6(s$ zLy^gO7ATiPL@%`QGA#YY^Ym;5rG}xXiqopnaO;}d+p~?tmdf|_Z>EMbKW%6qy4?@+ zWAHm8oik^omxXnqb7&2qm)|$Db)owP6q_SY1>(b%h((Jxy}eh<_PsKZg;$BH`h{!! zMM4h4*ABRn!0=siv!q^#LWqCzq|^0NrRFY(RP9Rz`c45qnrLzr0i_hcwU;@@%k?FR zwwC?q{EW9jL82~&V4E7WphU~k3xLsqCsYa~fa59#90w4<@f7%cF z?wK*JrfE1Xx@xr_a}>$ASJ%&?y9}LGsTG^O&TbQq{tm-D0Sa7Yj}GL}f6)rtPAX{q zB-JAnJe`C(qC?k26Uc6@9W=D6?nt*k`#J9v7T$Q2 zg!ulFM_&m`f-Oxv@RqNMRnAF|RNyn&d|sBmltcMF&uL&%K5r*W69I2w;!s;O(xokh zw0Fn?&Nz^P?SWGzrYu3w1gOF6a5tTaOFQHsD>)PaYA}Ptv&2o+OCV*dJwrhEqgx^K zW+`>ZKf)@Ji&%Cv8ToG->se$b?Zit~eB(Z-Jw5~Le%AZWDkj6i`$a3}10lac>16r$wDSmH{`Srz6Ul56r zy$}_%QXl;kBFpeDr;*#a=;Z)vRfGhjYz1dlCFO$NL;|J)Sij15g!3y}Eu;oxfygRo ztQoQDZu%~BUzQL!%I6Rwc-@HUD|5A{)6Tx|`bI3`PFs6oLOx6eYOGUb( z9{T@q_m*LCG~L>05(ohTNeB>Ta0xD97&Jjb@L<8+-Q6w0WssnQ4Z#WSF2UVh6WlGh zpC-@q?EP*z`#aaQ&#&)C)73@Qs;=p(RaL82-FF*%w2ZkWs6+_dzTz)Z!#t>K*P17y z^Sgb`zmw1xyMG$piJ}IzO7Oy@r>k!6U`T9kg9&rqw5N-m3kFYx)r&uiOJX#5;Q!=v zoB6}pPr{YmI&Bi49!^o^04Xr0KAE$3FKTwtQp~O#Y>6wY53t|I*RRp$1A3u>T<-Mq zmGrdCeXfz2-&0R$(#@kIa*U-OQw8*l+ z7?57=KvNU}a~5SDNpiPnJ1g+6b(1QO?Q=rCWyIUHA0Dp#v2J$}PmO}e_y)8Cr@t9( zytcHD^S8wH89!nLoV^U0+t~S~D}v11B!-Zt{F@&<28*KP0c8N;TuFT-c2ItTpyQhr z3`Gm_Ivw_n@8c|>P)+8kq-<^G$UyC4Q|xKrgv+Q@t9C}kYKaw8nWrjf=Tdd(h^J)o z2AkudzJ$@3>G2(}^^pg0wTpO*)8L>p$+KUno=fO~Ybn1T^eer~Noz=51!xdagMPUL zjfLa57{9M=dpx$pyaXYB_|$7-I-$6u`*V>sva)G%9@$$$zoMtkXc_hBJq`GKn#~Q( zkq@;F@cpas2x7vEX3@F`&9@~Q#WGi<%cESJyOWRX5A`);f?}x(jN_N-(0wq22MyuplC!pD=}P0K$}9#C89rtBpyvVD?j3yD zMc!DPmt)OD2ObB@WoN>HH8fWP9>=|tSwCt)aym6t$Jt{Ivxh!G0|r$KZC%&oD5XxQ zJCr!;C?aoj2VE0HQq^`covAi3S$r7=k<0ieiZKTtm^xFv23RvKoKXN0CBTUu&7>3B zY#!lY{##;*K)+0VinX%Pg$f{Y05Y(zlX6=PD4x@F3!SsvTkfL)%e^*xSJvJLu>BGL zf??2C+l9)Uz3TxRfj*|3NCLiL7%SV@fdn(~IQ!=oDA~S+$wIfnjopU=-Ujvxr%4m< z{RnrzX3+wB5{5poZe>^1V(!uVvw#l~Dp)BsIRZ8q?XMX-FnAEnpd+11o9f~&nN!0e zjiDSl2zONQDwuoiyGs_y(b)Y%ygcJzM(y&STP{=z6AI4u&xOggz8YK^J-~>0nwaJ2 zdooDumy%)X;=lG^>+@vf@BWO4?@V!dH~kxfm=>Tli(HM5W*E#UU%sdMd|(LBa{u}5 zvUVH8q!WxTCm5E&ru+weJL0P9rQ8BQjglO>1pv>;uMC6t>Zmu?=r45yoo;A`La}|% zrJvh9ZS!TKLN_p^_5qrEe+tK_z_nsYQ{nK;nN8l5mWgJ-m3LKe(U{&RtxFAwlu6aI z#Cg`n##PKYHbq~Dl(XM#^|w3Atv%S7iIX>hmD{Fnu)NU2&i?vGtN7L2#%wQCP%0+f z&J}I+ItS|%`V!95s)AkWQtb2K9M*S=CEsC!q>rOi_JihNRIlY6p8v!=<>icx#G8!y zSxvz0kGIFNgFP8DeWQ-5d!0QuSTF}S#GY3mX-w^X$C0{ZR%NZye${sZf3GB<#j-1+ zWB)X@_xnIXLqaYl6Y)VX{Vow9)16^1yZd)}i>6<}ixQ~kkqT$Z``NQ*oP`O-ZJVyb z2>$LPeKK!70@3FgGIpO2UWS*?_on&hK0hPVS0oDDRCuE6IQ}JPW*w!EaL)`ry>6MK z=|GyLL=-r!@FeYR-EeWq7ODctUg9cu3(@X@G6-UKT@@~{U<|kWWpkdu7(NxC?yS$Z z(y2rwKH^@%{P!%!bR5f+CGT0=aV`?1ZVQzy0Vv0H{0m&efixG8{k_!#U{1Swo2y6! zczSNNddPPv5~V+G+%i@k$qR$fnZ&PIlO$%BpBgI?2>_mwBZlLUa+v~PuxV`AdSD44 zx{QsFx@!m}&Ocx?Mg&2X8VtkXYw=TMBf&;Xed2GrI}vfO-hSx&jghv+E!oOCNNVVU zB9lD-9_Vp9S9o)ZB3xCQ!_TU2$0^RDIGy-n`9is@2i3|}dEc(IcyJ96eQk#Z#vifD z{XJ|tQ`P1Uj+pv+&=Jy0{*_e3DVpFAl`@rV6Png1aO&Qw%4Y)WZ|(O zzyQId34Adg@-OGz!~pk6QQH=;ESO(*4ImJsfDtgN8Wmn?IUTQ-<>Xblsf>Y+F(vO+ zhn+x~4gsRMzI-hn5f}URk@+85-&7(LfOq$AMZ%0gyYydUz+;!(McoDvJow`4NcvKM z6A4GaiG=V-b>BBp*T{p%*G+5j+Lp#r_tUU`X!G2VIXukh1)wUf9(`#4^9=0xd6#ix zC#}X8*Q8F%0EvK)LXdFJV+JQkAo}w!Fg`E^>&NWB*B}GGC8p+vlK!4{{)&%i^nB&u zK+f))(ue3sXe`<>L0_cTm-a|owb*#uIyh)3nKA&sJ%|U7VmDFjLmSh-uFcuLxz*BX zELwkZBV*V?-(M8yOy#yk--{>&AO+oAOLu6^&Zc)vvh^l@U{A{_MZN5c>qSV#8`wB_ z7)t*h&0+sI)Rb&_HZ3SxVD_$K_Lmp zftQL+=5W!TIGIwU*X4D?*)i>;Qbo(&B~N;c%C1Sl>nL33PxNKv=tXFd;U=qiG7}^A z1DInPng88$#)54HtJhnZv4$1d73FW;WyQ;MXLS#badUWf!ys-Xb8oY*PtVeyoy16Y z$5inIluWI>sk16*Dcy_nrIxSG<;nXnv1mu9j_WqYQYo7>rXHeCJThl`K-)iDC^Q92kQU|VC#76E~QrnK&iIwTbQ4{onV943?sIyVAnhbnl=z*x=M^_j?=}WW_Le$d&NtMm_U?A3Xx^T+ z2UtJ9{#oGhcC?>l;3tI_7vV8r1gg1NZqmFx(z5hg-~Smt(lp4X#iwy{-AuHOwJDNP zjpnq>cXzw4c6Sio)Np+`xOiH1=eD?RHc&;VcSy}~I2q^GcyhOSwQcA2`jFzxUYv>e zhg^gj0+y2O@4W2XC=&+=iO`ZY4YU3phyEmPL<~S2mztDUEo1LxaZ+fK66bnKL+7>8c>yH`WQ@aN|hI?_TGYJ!9&Q%-r; zp%SbHw`+@{&fAG&VQM+^!pe4U>^-Y}6V3I32{w|4ZqZpX&fs5J^whSECmdEK)qqnCd^kZ~kFxBB(0XKe#m`B#LfIY+j(z49 z03Bce!yFlobC&Q5xP_ftfCh*#CkQq|efRVLBQ+C*Alq4rPxx#kT$3=GPRw?t6w)Il z{4<&-6hhOhmaf45b|uZ+rAzv-FS2|oAT_FdSOZa8!7T@D3hDfS`qp4@%Mk&=24OB$ z-I)h~KVP7~5h@ab3>Z#<%_7!p7CsfkCb7stUk?8vhF%xc;ZleT>b8GEh*%yg1Avj$ z`~(mxEEBP7UxCRbQ;3JRktu>3+Je-iAe%{ zIIUcH>V5kP;l;?qX~ps596D-d7%k}S#(oV&OB!VcL?R8C^QyBgLnw=esfzgtaT=2Clgu z<*CqiN7S1Rdr0j(o6BJvRJ}p%7DWsb#h+XF>8GfQ)jmlHlNIFO3_sX{E5@lrySp5B zU2J@f*1{G^#20K#Zw*@M@{Z}1x~=Jry}e^-T=u^XztyadYJ9c{?X^G+!cU>4kl2cKR-q_ozpW_h-+wGVkDOpvmLPKo(!nTT$nB;`yJ#* zk&yj3=mVadcq`;?g(HwMzk(?w4Yj0Rws)r^_m>)Ld!b7Z9p!Z9alPY&kJZG$_)2g~ zfg??EYQ(b3Nj{yxCY|ZD+(43Nap4l~^iUEgdU4P$D2qq%Fy-uP8jbixtB%RSGP}Jq}QKSlPy$Z`XiV7*Xr5lTz zI#MC=w5CV`#HSbsId6YU;{T#$^g}hVXC81a`?=ry?LfE-(c#WTS9Ye!nCK z#)fZSOC)|!cMPDt;&vxLex#eBYTK_g!j>U|L>rFidX7Hi7JoyFU@z}8Z{}v?TPWd+ zY15QDQmhH!N@|NoDsrW{{E0Om^4T&%N z*{{6+QRQGKWphMp%+_-#XhhJ5JxJD@RHg?m8O`D!Br9x@#%l9&;Pppvs~~MU`@hCV zm&DLW-j)ZAs4zv@mJ!D{)~QAZHBNKHzev)H_}*$(&eF}fN*?u9&XYx^N4bz)=B+~{ zdu^{=6_reayRRUv9v}@w^$~kCUo4u%5IYm5lNK$LNMit#i&P!adHtqB>e1_uXllWj z>@qV?h0^RNNU<|9%Mzh^O0I?|qS2awn&Nq%X8%!YR(kIB$82`G`+hu$of))ZD|Ff! zFn|GVu@a*&3=Ajem@b}5{~cS7j`Vcd&89eZ3fXkf;{^ko-s9npk1Udkd3bi2dyjZX zYytzGhYyrTr0{(iSnBR8^pj9#nISc9H7v18r@86Stx6z3QR~N)94}U3I29Fd{Us_c z(El|yjFCMAcgj4Pz88E#L!ib;X9jC0Hc`?0blM=C2iNWrf^74pO|-Bc3vB$`SIi!&-*rit1*Z(C65E(m3;Z zpEHX?w{)!y5FdG{za^`I$Yt~7UVmF(m=iGgL3p?GXiuLm_3^cHN7Q#r0ltBplVz9+ z-vH?H5JoKrP7L;o`kwyj{Qf~m&9r0nk*E8qX8+=R_ZTIX0j_{;kEbKGT-<%5V40e{ zaprBM4|%E8>ED4TfI5yuCjZ<7y~8|#{4B~M77KOvDGOOTKB;6g0Ag(VUO4CB2o6jq z!COWfx#JbZ7%GgpXMBg?B*&#zRUTT4A}ZGhp&?L7SD0X3Ny`sgHM&o&&G&cXj>XCq z5GKU{eUX;=pr5k+@J~735D7VEbl7_k^P?v1FR&ju2EMKg?ZiJ&3qG;50P)acrSU@>_XwbPk)Q}g>{mKY_Gb8CW!91ajx%~?$&7iktR zL`lM;#T9*3U87!0W3@4l4mevf(}Ts3hfEJd05!!v%}iO8XJ`Sreh@C8W>{t|Jobg9 zQtOXV?SRz~#rA7o&ENJ?ZV$M==F?*QNcCnr|@R!T4Hq@ zPJA0aIk%|z9Q$JW_}=WqAmSGqD=0g@8`T9&Ip25nskRO|0^IwbWE)YOKU%rFvff3| zJ$25eXqu88XCF5iMQk1C~&H>NU4rV4JoGF@LZm(b# zf88DuVENNK2wSKx6t@dMTquLDnyx)@AM`H4BzWvTs2j#VZ8X(j1X)dE;01EUW#EP& z1JPSRtyJ03(WV2LwbO?x$ruUzQ0W~yK8Jn)(0PBHF@VZ!xbz6v(a#Y=Xg0L37RomK zB10cF8rf828WA=cLEMVgt>;RHBLXXfQRz>_J7z{+mdZ@d7?emC%jCRc557ZYzZ_dm zx~Pfi&%e45ME^Y+V^d}25hMRORFkU5b#L%Z{?cKPPw60=szJ8^Q_qqdKl?|6C`$O>GwEL8 zO~HGyG|7n!{9<6e^k_2iA0R_C&|~(G;OYCqAg0rSS{sZU#x~L1Y z<2Ov&aaxrk%aPB}v2+OE*F{P{y|AKJH$^*r$I(36Q_ma+lK^+BjTDs~0)i%jFf3k~ zJ}#Uj?IQ!n%u}JHzZY)TF_xdROjWeTPS**6p_}XW*|HrzRWBk_mG6)zjFf4XgqfB1 zL)S&+Y0+1kt2(+B{#5EGaEZ4GmVU+c`mF zqSNUVx|ppIHSk+#7Aos^wAAMQxiFTr-Dr0zbR^HCZRJNAm;fr1!PWyPEobH@T#=_N z3^1NcLQMD8jp3AZ9T7R83NU5IE17YmQ$@p?@?e$l@{~Lw6O%Hl5%P6V#;#_1j3VzU z`LuSA^viKdlWt}?YLoOjZU-}XF7Y!dNr<7eB*b3^yMLAnj|XK=O$Q^LN|;d&VhH^R zTdeyHQ_Uhbr+sy*=$fjXtKy@do5#qr{H%+ne_@-eepW3WP$0vU*}FznRV)=UGG=k@ zjRW#0qVKZaHu1^zU%gjV-0UTo?h&|6B-N)6zp(0HH(!O^X>{wVGbfzx_9Yq6e~2QZ z=Pj^^b%t4V_2^wDmW1SUXEYhruwaC5?&k>^n5SFy&|JNUJ}E4rdq*NG{rOMbPCpKc_jzh9kJ%BG{gktvadn*D|Ni$^Df~UV<8-lWr{Koqp@;m6 zEJX8Sm8VQrzb_vLJo8Dl5A?Ym8;QAv{UIo&jXit9jIXSKi*YY<12z+*8%iFeN%49Z zsK7UwaF&YkG?pID(f2LRouKIWqG7rZAX}L>$V#>-;~o<|KAjjr|LS*@UK6Z+I$eyV zBDk=6TAjZWE(GOJX>MMj&Dh$1lzeRnJZr7mM(7%9vx#fF(eTL@c(@#oMOecHQW_@Z zoSl@0qXXH|>+^C>%MN2l$rlt@%N?h;v6Eg^aUEaYaP7JvT-}2kcIkebz3X)EuvYa~ zzjmm~ig4&q=hlOV6oKsycZnsVZgnw6wO}*HN_A?ZD5frPAx1clDi~}Jmm3ufz(ATZ zVgobagTw$I#1*=>1XM=2>#y8^wjwa-YnQ%XEBBfLNn!jMu}(GT2@t$Nkf5or1$hOm z#<_!3mcqO&w-3nUvbJ;)Wl&*mdsv3jZhGIOScLEMO>&-?4}!h}vb2B&p?}SJ>Ywgi zVV4+kcW|S!YmwJ;#yq<$=k0FT*uaZ;c6XHw-gjSKlUaWL_> z^v1~u732r$r5UhbaV)YFYWrCYXcO0s;(ph=Bq` zyI!Kl)p7LsUSRq#H>FaM%`#)JabUDu`>P6*nbS^a?(w2OPVd8ioz4nyp8`Eh!U(%m zH_5f~9l_e0Zj-A+c)jvWP7d%*wTy7qOHq$BUgncWmU%)oJOL^LG>Z!yK(1$fNYde`%_CD-iYve7z*3$ef;M70*g)ouU$S_K?FxgZ_!x-1l zPS?^D3JqO8Cx+lx>L4C);1xh<)YQ`z6bXPVlzi>n;v>P3M|0}s_iKB`BjoCu933i) z8D^M)`h6ZlJ#Ytetj<^m3v6219|AMLH;t$E%~W=?8>Wf=Q}l2w!p7Qec&h=?nwS_8 zD_E`oyo5$a7xzO;rUcbGhEudPG$9sg+`gmDcMxgTzNj5a0SvOEgGG^E?#;RUG|=NU zvB&Y$xO3i?#w=~E+3`MP#Jo-+WY1Gy{LUZ`q@EV{SFA}`NhdaV2J|ydpr8G?d=X6v zD857@S(!?njBID4Zk5CKA<@5vqy;fB1#t`Ml31d+|HgB5mNDi)=aIF@RR2f&8NOK3 zAL|0Cn<)igj14p5{=%s%$;fdSL6yh8;-JIV)%v0^xj~0&ePb~xHR*-?)T}?Nnn`MB z>LPJ}sgkg_CyR|*F;0<-$z_lBlg2HvIT!%GZ@aKq#{tu-AZ#Hg$HZ!#V#&Erc2Y$; zFAff{)K-#hN%x}#4y2w(j;#=_nns4ZMsrz*IErMRF%m3*^*&`)3+KTcyM(}J5h>&d zN)sW_KZ_KXbq3IW(&OdivR~|wRO*g*>p_PDE_+KvANtvCT1gjxv#tBgrY`I1t~}De zk`-xOjK;n>8&zad&AI5-LtTrq4)C)Rb_9ThiWJOgpmaI;pW$_ZR`d4&t@C=T(-M(e ziT%@uvoB6=Mk+MK7f|-nCufNf<`EOgnLi4jJVqbuMRg;7<)!>}|7`TgrSyY9J$lFL zj56~n(z(CR*4D#!sLBV`p$lr245e}IEe+a^AY#vSpLyGFXk+_6(v8(lno0*V?KVG4 zdk@;I5&;_Y?k9H}x&t_b`4ec~@OTIT6zV?^B0~Uu5|HQ6VO=qhqfr1gOvcmOs0URH zgp{n-d;5%EGQ>%6ZGTO2t)Q89I+ZLvCiGc3GAoa~$X3q?fd7sfps()dX%+u_0IyfF zu2wbbb1nL{L?sO(ESzYqMdc4;H%~JZwm>k$>a$|)rv&?9s{6R=%E5l)u5WM_%qB=1 zlv;nd`Nh!2L80#vzz>JmeVDdJ%Voh=H-0(xm*KJY4BfJD!fR2BonBS8$^0~ZF90S`LE z@GBSNfg30>81r-r=!$<{qBFwiQT?NO*P``;Y}iL!Q%cZxM9FL(wlT89!5$cnfX6FgY1(2Tp zN8A-=w*TtB{qM;1{~0L%U){L>_pa?wPWFFX+y5O22Fe9c3H(Rs{`)Ple~@7Q6IMRQ zze45wPn%+_Y+R84xGAQt5)L52c>V+^Ss%_>E&xa{Lp`c|)L0QDzvxkaJ+Qgui=aa| zSUVa{%I^3Xh%Lm2&vS2`*DB{PwARYr)g>LQ=lQtzFA%mzN51)abA6EVWP5J$ph^5D zx}_b_K}`I{ky;(Vfr-=dbUyD)VY=(s4u@84m#m*yoE*h)MICjM)I7UqWVO0yWYzL? zJ-<|Qy4Y-b?(Fp!BkSS|KHfi!tS3iy4V1qaMXHgp>q8F!6qv)4$|fi76vKedUy(ls z-@1U(J(TTSug?!oq5|3pNmIi4T2}I|``Z5?!LWaUs`K7nAFLmhufB;3zjI~24O~dV z%5c);_4NAk>aMZUw{_ZjO#`R1?vC$^zq9JTl+%r+g)rzv0jpeR>4zd-(J(K?vz5ZdXr zzo^&J{hJr#*dn-k;mk}fF+FJ(?zVB{-#dL%(O-EbqGh{>aw}x}GjHN4-|kgag{DhU zxbqw6H(SWpX=z?{ETm+r$fG5zI4vRpf)B5G#w%CL)_ zBQyQ|0NGk+yR`ytxa7_)T6eid04Ns;{DN=NO=A+EP#D`@`UG}o+D1fNfi!a~e~P&4 zFT_m}N;C~LQtLS!fhQ*+SNNuGd+;Q+&VVx|s^*huc0NMvqGoox*5eVG*t!;^vTfpi zMyJubR4-EiS{E;I9{{((yp0Z|{5F&ipJh*EJUjQyteW{-_TeOF#z8 zjLRsDf9Fu*`issW1z3-)lJGgkvYLH#I7ZX~y=kf2wW-Ky37a#ima<0UbX2I4W%W#y zgy~Z^4TeUhw{>+#Bh&rCyF%NgYr{|Wx$L0H2DDTRbBJgT@ z=;uFoR8}y`9+}G`<$lSgeenZlpj^^P5li3h0$liRtC7}eqxjSt{$?WX%R{XPu^u1E zFc_wLot&M14-3B=S~~m);<#8y_cI|~!$cM{)Ml!xD+qQQE5Cn=`1 z9)8X+UPo5yecsjnrG@A7G$_=Z|ZooeXJsBLyn%#3&8rvLgyX5 z8>HajgXrKv#UmiHXj`T5l6BT0hdXSXP1qCujunKNV zz?1p&zjl)a4V8*SM7!td_Cyf`0`t#9cK`x zV$)k5Y&7w$rg;hK^6ILjf}=z)Xg0n9?8my*bl+b3rQ?40(j9i<&w@%6XF{+Gl1 z`tLY1$@ZF;t+R7abQd&;`ML=WaYGIIcnVC?jRAkG1|OqeOY1IKR4g8yd~^Mb)Lpd4 ztONM^BfWJ}>PIP4Y73kn#4g;`L}&yj=An)cpnI~?fBI9DVq zrhOJ|$NzN;WA}&?G|UbSvf^zcbsBC?QPmNiB+h?W1KPN*B5%UJP&M9GI|?-U=%mwX6I zz=z-S%1!(OxCg!ANe6mhH}Z56Zk0r~icVpaS{;y!mTQksle#PGug?5VnQWbi-nj++d#C9B zWm7f+hZHiNQ=dCU^VQ|GO}`PWK^U_Y)^K^PDkha@B)ZDXjz^)lBxbc1ec|Pc(?CYG ziCLojx`Av4rv}Gz02cnr5I>OX%_ipXk7-P@VxbPpKods+`3~+tNk?e5#ND9dmRLH; zmYtd4RWv~6}f#d%bMq_RodmDnctJMD~5eF6jjB~T^3%Z>WHG!Ir|U&fW1zgPD8^~ zphd&P{f>sYFYY}wNBf+WKI<7PJ>4=}n|{4N{OwSF4s4Q+9o!FYH*QF-k=_sBnj!pJ zqn|=xH{Xb|wqjQSdseFs0+0|OAIl7|i!kqz1eS&hGRj>Zh+lOlj2z@Bw3~HM;TDkr z{HtyD_5L|&tUquvo2xK0$>?bNrP?dY)UwWJL}?4oe$ZHiwg2Z~XO2EHcrq4NlWibr zA_D5qWh(w{^NCXqmIBEXPrt;-A~BF>m7utMPF(pfHYDy%+wgU-etOpaOxcN zf$z1P^7LrrKq#2j`vCwV)wlug%mbb*P#=9VLgs&vh1z08$4Nkk))JSh{Dz*>je-)j zh>o*cxo_z*A8v3u4JANq>rd<{JYJ6`JWH_?dBLw>{S3h4ZSW!W{)r{1iflufh3ZL& zsS!#W*@JdtIa#yy66T{EaS4RP&XXf;qO_gIwKUL6%mk?|lcx zMr-l*hSdWf_9G()Fv8iGsT1-H_9j+a=1P0RWrSx8`~&{(LbAdm@j7k#&rkuZh1YVc zEtA^z5)Y^RS%7R5R6uE)eavaWERpfS3h|2*qO=s7eFyj~7d3}p zciwdF(E$Imo&<)&cQh0h(AEo!waN*}I&S3-=1jrwyBd@apz&ztSx+kwgS^xjiD_@cO1)DNq3 zS61hew^GQWs}nD_V=~0zeTj(72@! zVq-<=Q0cm+!*cox$f)eh0ymk<(#ZRe&FK`AsVjwF8io-Y!)pLVo;`@&xl@B_wLp~s ze8JQ~>^N9W`sPtvVZ~~3Rjb6W;=94wVf_r10itoW5G+oKVHh7<{{t$Mj+A!^59Nnp z90`UGW{2)?^}_(ciU0j=88a1Zh1(CP@DV_TUjq{uss-bOO*8E<4y9i8@?O6h+c=VR zu-Be3$|oVHhJ#Ix;s}gB!BG7jy*}%5k0Hml#suqfX%;w+qfSN8fcF_h2+Fi?j3Ofj zt#0UBj>?Fi5jDv=`(bPdXn_F(NvOwZpa1&X_zI^W=Aw;Ay<1@FLf9WVYM%*I!f6QB zbh|w>Abn%Y3f}GM9Uk5ewhmWlk2HJ`#ahOQdY0&I-9(FeHv8u$B7wlUwBWD)iQ`Mb zE{)#6gi5m8mr+7uBdaVTPwl5?*_X`zc+pes#U2N6lY0>c)EI~m_)`ao@&rTEhM;fp zD*1iuSx;NA6tCc{K z&{^+;)X=mFfClMVLj2>!l>K>QmM&^nj<+aKud9hfXAXRrUE|o<>iou=ec`6P`3+Ei zaoS`ffn@D@#=h{Vr`Cxj>+Uayec{fH4Xm}^pP^Jl?rBcxdKmGI7}vQ@>0;Dx+{xh2 zyjK0Rt25>^PU)i<@KjTtINHVw^!iNEq(M1l00=^7FHBc#<5~`nl61(mad$P!b!nb zfO+7#J$-#g+A9u2Ax67C#LR&zb;T(eFi)w?_3VbbB^2iF1E&k!+~|`AEfj8&_l1q} z=r$k90{jDlo)~1wBm(kZy(_ln`P+``d;)`=o?yu)Y43(%o6~?@GOT) z71u_1hIVl_Z+*CIL>5M~D}cSMmCu<~*bD-)j7~!YDJe19+f$YK(WbZFy0+=RB!(mt z^$Jf8Q&5%Z1#a$u(js5Jh>HFU&+-jM|JY?XHf)r>wV_6l>N|{->C5&C%9*|m04&8n zPVBe(fOx6Ht7A`e6A5uDlcQX$n~1Gj;74;*6S?bjfm{|Htb2XQ;Pd?N42vB9w^D)r zv5Ea342!J)>P-IsgC&oh^*#D6AKe5J3zRFV`13uc&4F4}FHE&YTAC=4Y}At@b$Qc@EldznMinT|J$=bG;b!s=0Zi<;BNTkgsWOboY`(gO9IDjr^x=c$KrE zlGNoVxq3gxSub^Gt^xCdbjf>|>HLx#evXWn^SkSKO8b)RnF3DhmN37q4@967QDro) zPR`;TOTNQ-uGevM@6CSEV@pyU6W`qA!~CGtM}*3pMRm#Iv{zp`+LVab7q{ypJ8V{^ zSWaj$^2_Ubd1_m)SU=SUFvq36TW&L6^C17S-+i_tz?5x1Sk4=nxJ4Z`Jk*j)44F6k zUe3u?Wj{E5Ro26n;l=>LD^g0_YkY;57A;;|w^5cS>$&MEyk7s+zLw;$t64m`EfhEg z$vB@r+nq2QSeg>G&Mw@C^lp?bEopXmC2i9Bn0VDR-0gUBUY4nIzA8rSg2}>noRHCfJ|Cu7bW-}k#73k_$s~SqrviY*G&O5_oz}1v znRJ>$rnd`#s?y!FJ4wH}lax5zYwg|t88EwPNpdSeIBL9C@8_vd?{R*ysujL0(P`uE zM7T)g5q5m`^Z;w3TqP2$y=yT)j7nV!+z?X#kglB&$x`QfJh&Hd`ITeMWIpG7)J zklTfW{i3T5=Uun06uJGPW6!0gdEV>i@i;0x-#<@YElP7}{+h=3yk@3heDbZFFk%E1 z=_7@?fQj#;%+;=*(Y5!W_=HT>58a~WU$8o;(r7}9F*C8yqdTTD%9B2ixYpT{>@|Qy zC>Zd*mGg3})_P#}bg!G@64}?#%xwIYi)N=R$jRCM>yR>Ira^dgERQU{4#CG>AInvI zb!vwi)y@n{+R#tmSX=sOn)2{Mrf(8ND;3Y3Ym}*cHGJ<6-yWMFjv%XDDZgve z7#jV%4%(NF|A&oWNnACk9}H&>ZYXt(+Fe0^=ktL zF>xi5ztIx}z%i%8u`Hmn=;kREMuRaZ|EFen<{z0A(ams7I#BDkv{Zi6EUzEP!}}sV2GPVtBC*@*n*~iiHr;Qrj4?E624!xRMDo_+KGTycfT!}%|W|) zh?qf)Q!L7y5zVMi6_FOFAj%*&)zndI^1pCpzcja?@juriK%u|^!OC2tn!S-wws(8f zT={y6)&hHwTG99im3@A1)~K%DXfOp+DtpE@qqbTM|9yI273ByQ3}e=2*5croK6wlT z2SRhlU*03uerb09@+|;@;RAv`rx2}%3DP+ zXf3_SE&Ga0qgs_y%!{)WHvMugJ+`x<#!2a^g-sZKVBW%BU*?l4?w#Hf+9(radXTQjheIYwJT-q04v6F{*dt)WF06wcm1*?+8b=UNe^7v(oL6VzKhFU}WnzTB4!1t;wMB$!=l!&$=H(mmX1pym{y{)|I>ysn zzSSPB&wQBCfh);8pToHqa52lb5w)V{-{p4+=2JJz7}c^d7C$si*&u%UN^-aLJ^^;7X1si8o(I@WR&}>s<$e!C-_5c>? zXuu*(2Uw(K0E=|CbC%#-ztmsDQNe2b%ZPst6}3|g;)HX{U56P3iy+7_oc)0_>@U!P z2>JXc2$RrABiHA_Mr+D5OWeODQW`3CnwI0408L5kV%VeXrurUHa}PCuhEUPT!>|=h z{;=^-?5TMR?wIw#5$kMHJy(xRID1Wp8Nw!@{|XAA-NIMF9T7&L3U0vd@rnb(#b2fu z3R3~VbpM1f3AmS~63= zCabI(nilek<6m7eFJ{i-PGlBdyL<7B*1O?_%L)p(z#q8XZNy%0#KIR|3PGQGVfcr> z7I>9Ar%#+l+T)QTD|8-!6!ZB z<~?FRclJ|#iQCU@1F0VXuvZ&*o_DTq^w7(Yl#%Eg9RvCYrD+K%NPcD=N=bCHAT}vu zuZAwSR!aLPt@7>l+846%4VeD%u$utLbFXQQ!SR5dCZ7C@9pGTvo5SL@YLwJp^pxoL zEP%(^?^BoQ1{_tGAWC&@0bCC2^B&dG+*?W!3U|?+iCbiY1V<*5rw^jN{L?Umqq>&P zQi5!L;<;@c`z)Y$YHx3Wy$hK2vOZ_%RO1?s;Y7SZaX7(jEnrS}r0;{z1K^`-I>Hu) zDJ3pn#|M4|@s?_M;G z-uVC!2mK?`8e>4QpS_O|*AxU?Ie=`#kH7FyD6R2KD_eXe+h=Mo7icP5(x24eY69)g zr}mNy804OXqe})E7g<-Do<^21lE&Y=^8qc;%1>`*HtMkRcK~QkFULkW{vv*Oos((x z7tw?0C-K24`TT;+{m{t!1R*8m?T_{SkSmULlV@g-?%&Gwe#QwD^G6LRiq5KD9&9tf zJnZ4jlUJJ`J)GgposTZOydxIS*Y3cxLu$>}UJUR%BXjIyoW47#;npnyFf~FSyWub& zR`a{QGgc~;|F(CBKRj_WSVPOf1i#bDQyBZie8;zvy-~39`%d65gafn90(}hEj~(9v zibs(ePS%TDF#)L1)>oIGe+Ds;Zru?_T3c$FV8=Jm()(oB`K30_Pf7>;FuL{124dx%a*O%>}?%QLV6t25tS~O8BOu z?=cgjvBjHJ27ICFN05qAfiv{}W zaFL$C0`g(m4)@L&b)8DjI40m$^pK(8X;9c zC$P4%(yV2nOlx?gSxc^;&(lv~pni{hg>2AfVSApk?`|&zemRXy=3^kC53QVjW#CMU zp>rS$_qPBsw2JHCqhQ2xyzw)kVOD+>v=dGCm1icVN*_q-AG8DESp5#xM5j>9tLFof zW?kd>tZI(bs-`40as0auG3P^`YDY4m`lx`(OkVd+@8&qI}u<353mF|*GNdajAkw&_k z-`w~;@Ao$&{8^nnfA7^@r+ z&!{it_OKc!dbhEJoBk$vM0?S$gCGSz2B2m~W&e~%5X>pIGrPSev7G#;;iHWbQC`p` zx(m~MVYeCeg8f12hpRoJUJ=GInY4mff4vpv;@9r|B<^4ufWY~NXEse-vg^wRw`IJI zf!XKbs6;EWQqwKlTPeEVcV!Hr4D*q5@p%fsgh6;03@GDCEUW><#8a^7q%=B1oBjnL z0nY|X=HihyxX34OAiwG0Avd*_HjluNaj@Z>qatBH(YDOE;iY*~ulID6-+>dRiKPf)40fenzduh97hLr%Us<3Dz1=fMNp?3|dMy%MwoY{ssZH8zCrot`QFr)D+z@{zxCzqk zKahL=kPGLFm%HZP3B_2Z_vC{i=BUfg)hi34?@b)vmBKVtXEBB!YN!fMwHN+g)7tVaQX5aU5$%(6 zDHLAEZZ~UZvFjFJ=gc{8lT&@JzOLgh^-IFu)I{0Z_iidV?Dk`9|64km$Ipw90-A6Z?-tlkdm5v8sQQy}XM~{Z7;}zPNaTXR#RI6S!2YSeYw}`K0 z*X_BRUFcV@4KZ0|4Gm0nMXX(@ zG>|%34q*Ps!@^umq)v{IwPRYx@G^6?buvRCLgFFucwy38O-CqJer?l7k8vM(-6;f5|Fg zZRK!%U4oqosfz{IC3vXV{;|sjqk&$(EkWT2IjB-YEJw=Y6%DIA116E{{@PMae`om|7ybeA6e1te>Y$Kzo3R^ z2az8C=)M0*Xoevh_BX%`_+S1N&&>7zH=ZIp7uSEsGf!)26p>YhdkHq`rQFPHT}l?h zZHg%1+bVo}e#1DD>g`R7!>gMb?JN-J>Q$x%zRM6Ja%zd>P~^mmdiB{~p1aMpwejktbLwC&)!XxInzD7H=;{o9RF!1S)3J8<-cD>4&1~V- z&(o8d*@*2Jn&}}m>3iEB7af8wDz9p{o#3_YW%iiPp1Y8a1KmDGZZfK*%fsPBYspwO z+Li4~xT=Lfx@=?%|* zS}b^|cvW2~!;kEL{pbiV)G=<5Sg^Ne=W0Ncy#F)r_EW5}X-$?* z^b0E%!LjA1v>PEXO}AgqZ2j+YW$^+VAQt_fft?*a&z@|(TQ@nFWO=$kxZL%o21t;x z!2XS~;35Kq@{xSgd|}*m9n{VUDc^KfHKO=<9G@T7$?u@e3SQl=&KaI{4RUy0>v_4l zanzsOgt5uH{Ois!+1#@GF-4N}Z7;r`vx5Wl$Di`Bi#oSfAFpR_Q5HIRX-R#LS*^>t z>~P$cM>z0n`EctU*UwWTRoxfv*#oY9MMsgBHfQI~kT9pD22RbhWx-jS5@YM*xxF;5 zm+{$ExXkq^gcWW#diuVRrfn$g6W)LFDgjML$0=dv#%-VQ4m6_L%rvehDUN+KlY+pR z8yfqBr60M>9u|sSpywpgU>;@GU~pw~p!=uh5quZ2!^3~SJG_quK4zX@d#O0&tzxJ2 z!e>N^uTQ?;s*N_^j+wb3JprnN&%Cd?K7E5@pAe{Txb{a$dFmB#-p?$7KsFsWQ#7)x z_BqEG3#K*PXuiIkoq(bW%@d39}4ca(ysoKC-|3kX;_d zoP}cah_i_^3N81;_^XmA(3+te9C)NUU^DfSBn{wXEncYuVr{NgHO>JI8FsO38+`8@ z9%+Fv_lagf+RccdH0%hVNoO<_7SH_ikc>pd-0zD$ihRa_DRpz*0zUMrJSrwViyc`D zLzmE3R&{VXFg;T)J*yl)M=#@J`AipMup4d^T$S@WVFF;gRcEk+hau2}(Xt!RA=7_0 zn}9`+2T?JTAw#?K0ez5L$MHr1ub4$|7!jcsV~gG}BSO_@?fXNIeXxH6?KBDtW!y;q zPOdI`8=a_hYS z-9j>oXnHYFTo5H?+LYlY(Ax)?fs=O#0I(HRL6(@DGzu?yEQ)Qi#x=yNnz{(D=4)t; z?HG~yPq}jCo@vW2zq-XR${Yl(>E@c~Uk?*w28T59TjFjL%PM)Z5rDgeLqV6KrNN=< z6~ec55M zWA>ercAc5WrIK|zkTprjIGF+@4kxDB1p9sSk{K8{nzybCuxQnpp)2*@-2GOd2MKHV zx=)o2h_`BJLEtPNGA_BS0nKMXyzSEgCqo3suro^1wSyxVC#)C#f`Zd~jMcX#Q8Xs#u!k~`wnkNn= zlaIZ7clFoE`-&IK%}^uh{Ui0wqa{I2=0)^E@t>bNlTSRBW9mFz6QJBqeauxHMSK0^ z&ZHjo!_ij`)(yrDW4}bKze>vWjajr9P1ziU_}_m+m)1*ZKiwp1?5ti)550jiy43t$ zL{#hNjqMA4E(k8_d14`SU>|{FP_bOY>xMxoBtsp6%x3Z^}&FFdbX0Y=YDm>+J zPsanxFVwzoKs2uKchYvu)3j-i2`eX=Ji{69QL=4A1+kT(I(ND3U!JfST);JCS9R- zOr(eSiXTO11~2V?%MTo|E05-GbMSzV6FYdsWE8YfI~{aA{LQsPoIdx3amO_>N~D)A z>)GdDu%_%cvb39K20Ifg?>ddmnM`eF+Klx<49yEV0a6e`Q}?N@RtMOfGyw#1ZOTq# zo)9U`rX2CQ@f)b84k?S81G)>IcqpENsR=%lP4~Xz#$n68d!NQJL|lk|FIAiEX$*?n zC{tvRA#oFX&qAqwye3o6f|(i`qz+q5$@(VVaE)~vC)3SbUE(&no&_USIEdb&zm;GJ zY-zFjWUC*5NpVKA0I*YnYz!k(b>cNSr-Z}~IBjxSa7N4$zD^8b>A;ajTQYJnMs}s_ zk;5TIH#pcMBeQ@pI=fG9HZeMxzh30W_?a$KxEn4zGA3LsQ{Oib6E26m4~e>dEDdAO zmxg5qgEu4DAx47Q90krRwReKAgobYRy4(gsLO_<2e)CD;PrG2wPjn0krgXaZ!d`Gu zXAjE;O!)GoKbww9l#QbSeu731mI8=VPyl(XkFJ-O(=|KZ_r&BOXE2D`XIkfb5|_B0 z1Cp3mv`B&sI42m_XTKrgAvn`!DWCdwWh`TiZvfZ8f*4~nfH?adVtj*xPcd&1X;`ml z*}^v#4(SA-+|N>Rp%k|UdP{uUM*x2pME`OrR8-}CA?9-Xh1{|HG;OaxXTk_r{-bxv z_PfIe8x{(<+Gelf4pZ#L|Jo~zR_`#BAc$iximUlfih<<`uJ=$%(X=#YTc`^4Ho8EK zx|(QxBFCx2R*cV#f8+j5qRm0B|UbQyp8EZ?sa&ADSXq) zN`7*CNTO1^&TFz7XQhPGD2XUdwiJvohx=qt#Pzk?$mm~Qn^rC(4z+s6BX|0|EFZ@REs2Xi;=ug*!i81; zZ?=|axXM?TeKV<25WnD*uYD%MQ2881nNt06hSBFA75Y*Z=R5B%#!@%T_QcJsH=+A8 zWx#}88)4&0OdO-(s8t=%UT7cea^_ z5#}!9DKEYbm*CDBjAYQ;<xt> zytAmgLF+l^s>EIaTAIjm^aL8<<1 zitY8nW*noPv(m;hT(BN=km&in+KIgEPUY`vNd51)vWS@YgStkGH+g;W(4)tS&dwedv}*2+h+gCGBgLliHKvWBv#9`R5DGK3LrOD4)+)>mHcOsfJl{ z#O!<3KFdbqn0(iCw*MkOZ;=ci)cI7p3+LsfbG+_=*1+HK!0D#{`;)Lj8nS}ac;OnEi z@fdH8;4#mtpjGFe$>4gGu6cZHAiZ>O(?Egxe3VufaC-r^n$Fs+g`9&ARyHdm>8ki( zGxsxwvrMwUR@~QgCnZA#R=^-0<(QlJXX_&(1$x-WsQ6exMn#sE*fO4!uaB9J-#H*b zVIX3JaVaCFvy7nvFPKCu0$a#oe34w8FkV0vPn?e@2NMFPxGtcXJ1WGH@C+Cz;x~Zh zy9u&^Bp~B|;Ys14eN^9q?-vhH=JDy8&N)wvO(k9n0uxn(Sus%1Y=@9XV<(2z=rB}tA^w6whC??UU2 zxzpX7Qp)1xdicFyopI}EWPMeHOrYXZ`^3@GWS-* z?aohS+_n}~G-pRJc~_1Cm6t48&9f5nnT8(N1|1l5lE^#6LRs+kLmwDIOOm&O$MN%O%NKXi44CM&&l(a60W{r{7ohV_dJdG4sdqFNGxI?y$bOqFM`? zX=)o)>g2V`? zlt&~N+Xh1<;W^1bG;lM^e@9&JJmLp5r->X`hIVv{O^_GBZ9wBU%tg7}uBw6Xk1*doeXtO2TQ;NjK- z3ouK0(GO}XTSO6a1eI%12=#))k;Qi**x*Xk9SL4Q?8d1A{%%LW-)$54yZr$EZZ*K) z%?9|p%>#e8KBT`JU}O4Q5ez&w2LHk;_!nY~BS4XDe-Xg@u08CKSnven8;OA&i|_Kn zcYwRwo=hju6RW-GDPMe7A!oW#$p-;}-i=i#h^_@2eabxbR;E5w(wTt=E#~jlji$SpkT-!pg_$QkO!rA%dR&(?xwAYHw_fQw@@z%lnw;W z12tTad2V{XXF`X!r6SC6J&Wg`$kwLXH)Ui&VdJwBAE0OPmM0N+_ymT24@T)8roLgC z@H{4_<$W^cxhhJIBOSRJ*vwy#c{%iK?`qjmz_Tf15xS?&8pUvef-~CwkpE}%nP-KV zE5DrTog?X}t>jjdnjP(jyiY%@+R|Ff=sImnfBxVhWmvC~@Z-F%Vt@?$#Q~AJcCset z$^Hv0fiGXb4<+2?Q{QnuZh5(U;H~SbB9cvMZP`DXv+E!Esbv3di=f@%f`jR1L5J}0{U<-@l^Op=ru(KGwmq$%;AWgQ1?IY#2g>a3CpH zcjy4()1XcF^V*w<2yBNuze0ihh5J1pe!l9h!?C7@STtFPQPVTwL_l z_CP;sy83Y_Pdk0Sbk4sU+bS{JConoSdwIUwIs4<%ztMYkZO60F^?WvWxymX}pu(xh z{lR93_vJiJ)qLyh<>_vnpzoCS)s|nXHP5UaV&tLKFILtg58lhHt<=;b$@_wK@>L5} z%3P=4>}uODO0It7O&-V3x0=kif?#)^R$Q^x+Lt2y6Ml162NaVr{I8eP85a*1!8Pkd z`6)s{D~%`nTvt;YJ>HETr*;aW`9~{S%-Ml24?EZRN4~4ZfGeq1N@3MALI-0-V;WP_ z*3A=zw>Q-ntq!hYid5!B*a*1YAVWT+`_wJ1J6;Yc=2TC)&209|rM11GBWH}Gd(C2& z*<(e5<15YLk&lb_-zCQ6oK-(Z<*M@I?fFU$w`YrD@h|HZ3Pt-o8X4k~(^%whfr>Gz z7=Lvx#JS3%UNn=OK0*29=oe?!!QhVnE=fiG>o2-$ZQj zaA+@&YO|6|w6s6y*TUBnzzadud;ChW#}Yp?@7?!2`d#sN1Eb%*DAOj&%JHm!mPsTM zU&oqK70;ivVwlo>Ox924pKc@8&hB63A@=#WMt`@Sb6Y7C+HrCg^}yl-jVA9S7Z3i1 zvN6)ofCkCK%leBN#>v!ykr^uAG#e_cK@R`C@@Y1$7b z!dPG*t8VB)8SRgV z4lJx~*E9<2t%r%wdCig}q*d4CW-S zSLbhBR3($mSDd08HM)Pf6-5~y&O9X*==_uqfa0#=u}QnBNK=zqP7*Uqm-PYGD-OeV z319WDMw2G2i|)Xl!v|!VEeHjfh>V-{R2GvStYayMYU*CSS!)QF-${iW6&j1@_Cm zcuKPN?8V(_!@+{AGP-@vmbpyg5GOJ+;tKp_K90Oth%GH zcS%&}3y2A!ej+qG2}`OY7H2)O$6Z8tF&GPo?EITN`bo=u?~+Q^EU1jX_e(p;pw>9I zquDX0`oO=#{9^}ykp*O0+c!n9^?tNOINf{yD3(Vx@O()~;4%LloxvCCD=a})vQ$Uw z=X7B(BTyPq7k^DU_TMTrM$o3wlDpZAJj1~4!r&z!wV)Ej%n@SY=zZtWS&F?d^wcsQ z1@(j|r}FT|JI%*A7xXNsH6|G!N8z0U_ZDVG?(E&4Jx%E_ZbdghiNO;QmO#Hv{0^e| zNe7>ZTIu-)aqIUKg~Umik)nGCAwq}&f~rqX z5b8L#@r~uhs4fbsv7J46l)Aga&#Rp^r8Z!F)VLQihND@QbCMkF%ePn-9>zwBLEQSh zD_5%w$5p%XB~y!P0Ox&Zf&-O7fQj^Nkq)WScVP;o=*}{zx?TNfB8;goRMz5GU9Is@ zKki%7oeTK#KoKSVY+{+vPLl8$vOE4s%g3}NFYfjk4(5OGp?_a2=zleG)*z0{$b(@HP>8OI*yD0=h|T4vsGe?JcRA@uwO+=tvra~+WDHH}5me2ARX$(Hi|p>^ zeEAQy%IBwS7Gk)?c>06AwnVMH0Sbx4?aVDCDEieBO}Sb$I=!WM`dtzTbxyr?gN$n0 z9*I{18V%oJXI&yA+PgkYzMu{>c-FGXX|04S+TB0aMFn-<|T31?v99ZtPJ zMcCTcY3>t|U0+8Q*IS4Oft%mrH3JY~#ghKgK?UxT@b8eaK@(|>q??=(Gv=gDcRB9^ zYf^4706SU7pI>*DK4qE0kKMrFAwgnN@m2|nLkPME=PnYl`#yO5G)R{w6hL=%t=e+? zf{Dt&?pz>khEsZ_K0T@HcxxEw5Q-y+1n3XGP2Db{DDTq|3V7F_-k@omY{gB^^xG_5 z87&PDg(&Lx_J1d`#~$yRr$EzpYL8$``oxB5v2b%i0$Bk=aX3zno-WQjL(&9D(E*yR z`8Gab|IL(*YVUV3;Ob$6qu&Kg%6;S2$B@(Oc-I&K>7uo9273`^y-#pv-^EWM@02M4 zV=wVjy|^bWGnm3%N_a=gL>iFSZS~Paw$^?n;xqVQ!&aBsHvaz8qs@Z#@vlmFhsv3n zuHtR=1RWvbOpB)V*4;ETn+1r$C#<2>RgZQRWe8Ne+$SRV_pdvc5GpWC$KW zLCFLigfaxkQo9m=nOPf3GAp(_JOK#bkd}C46^P36_PLora39-d*5XLhyCY>MVtr&o zvdqET@_~%w<(eql>ysTBf*fr`*Tiwo#FN%jF5xa^;;}|zjpElG2i9g}6M@CIHKMU6 z*0@QFCO%u_sZo4{^gJC#bzv&L!Lry5bK~#!?>0lxJk9=68Y+CU#iPEs3S3t3fXhlj z2&^Zj09yDq=(;OjcM#ZgP!)CO5p2iV-cDkxL+u}bkGu>+bAA1$;4KW(B3i!PNEJm8 z)3~y`8dYHO6=AIHZB4f#3+^K2CUIm>-1dlNTY62b(o~0>!kd*1Yf#@@olKZ{1A_0p zQ61W3DuW96Q!tXHo@IpjaD?VdjK3d2zpZRu9RVsEAt}s+ajF(HOVvg_#WAan5Kvco zGhsuk)sc1%Ue$WOEDzhsuvLcUZ5<{`)mx(-2EoIxew~?ULC3Npg5oJC0L@&*u_6MD zXZ7}IhYrGgWn0>0h=PS*^nQkoQAOa>RbDucD!8;-UpiN-{^H>WhN4_h6)@8TMgM8H znPpAHj2B-X|A5k%M{!?b#*Rx<>39JD

H_#Fp4l@+pBaEN8UGk7s$@yYXs(?1@B>{mbx%zGle|i2ozHaegn9gL2?HQ!6mjd~4A~<*jH%_cTn zG>z!s5>_{_*?YSs2DQaVjBd#}{HQEA4?`%pYjO1MAz%b=%Qk`wrmX!JzIyTzl?}zU+Y9Eg)1EA zW*SB*sURYrSU4&Qy)Cfnu*pkQs2fQRrKw3!IF2ptVz>}0f--f;Nqi-RNU^GnPW@JJ z@~X_`d&Kd4&k(D-vw!f3^}3zHo2kVdqDAf~Gvch@kC`1}#j9czj+^q;A`E+3zCz)q z0w3-W(;6D!w-6#ka%K03Zvs+pGXp|hLYGbD#DLfkh!$Buv{*!n77`MxNYO$CF$64# zAJJqa0kdaiofnnYvjQSwI%=toy`;OG>Gzqg-bul^YxAJ-p2qRX(T;28nca=$Pv_la zCp`o#kVgSqc0;?l7m}EfKi4W%wRP}c#Rnce1n(llCo|e@M7Z)=)7otenNY{tMh2DY z#^>G9;YV&!yx&JI#D};RbqKatNitr`Y3y7+3J0jz+JfusAJ$59NAJrwp9K-!{KX^p zQ~ejCi#MLWljl1&O;ANZj?&|lS1N6a+n0}8#7gwAB7X(dG(IpYX z++&M61i{I0dRS}WGJ>n$#fMN|VkCXT(MANt$%t_!;*HO-uo(%98c=3A=)HufC-F<3 za=OPMbPwCvCMV3rS<0NZc457(MA>}*cy0d4AD1k~24}>Xc#z45P+QW)iuYIO;X_PZ zkaXBI0xu&z-{e5QJa|aU2iHt^ysL!9*~(& z_l~Q(T*dwjrixzs6x5X87-4%5IFI}eMSQ2b0mYU|@BGoU9gSdUuPD(HAFo-wKV`x0 zSLnbSZkT+LFdL4(4Oig4l*ZB^7)xI5d|F@v=YtL~0=EnlyOhF;xe|FuC@X9)>VxYW zZ`{4{r`e+8+VZ+b{CZQY41#EH`tCmD3$L~Juzf#$oa+p2WNxYSZ)bhF+bMgnt`rUD z#ysViQvFtS>$p&NHwl{)ulQ$ea7NX-+5&4$(**$c&TLXO7v3cP<^}sQ`*~pNOU2K@ z+jg_1gJ9u(=b79+M9@KP(y@cwcC3m+1g_=&BlPr#`kZcTa93Ccr`reu=G3u$h$_*y zaT{wf&F7)Mi#tjNr=`(4)*FsiU#)KA^e8tYDRSoig{Pj0FKTggjrQ0^d$856_%W1_TQ**JB#6#%Cy@{ zBA8XPf7N8D@BF~ikE4N^880IynB_VM*%fzw42C4LE6)80j{(J$5Kum%bsTESGGl zH@-#FYc;Y1k_%)nBY4|V4M{ucW!wmzD&bqpJZ{sR+)~20+gSR*p-%MLXnks%;Wh|7 zhEPw@1q%~@_9oco;wzgKFd0)V)z{(+QrQ;b>#gC&23Tdw!Grw*Pwe77)fTw+dc*d6 zasDxEQ%p5b|51cxYX<(`%zn+F-9*dtn*OmbQ2<5^hD7+$=59XL%P&x5u`y+Wj>k?-><;yOIjt3a8DqpXg*!T@7TEFJg0ukLI)J9X1*(@{uXJBB66;5z{`{(U95F8>aczR`Z~)XR~w5RdeLKH?(y8Zq4Vf zoq4kNohu&Ny|$^DP3L-Xz8{2VlNQ9q@oea~`>fmU!sSHhjI^mo2FmU4?MB^=!>Lzy z%nvui{^K&qze9-sAF*8j{}KC>{oil?f3i9O@zVkPzm7TP^utz)9Hu zZmj)3U$}wtaDx_srIG)(UIGC@Ns-O`&+8@s0%7LvNcMAGgLE+sqX z$q-K4k@{2B1$$s;*V>&Qp9?ZjT(+TvG>mS)O%ln#}4UN%2l zcKX)nT^;maw3O@Rl51MZk4br+nIE>b?mvSrgvaO}c5hI6dtTF0Z~!eusxigA!K?1{ zq}4Sl?pSU>G>Pl-X!gqEx8V8w7OVGpS>wgU)tlqXgdt|Xmzqn|mxo}5=zt;oc**HWVWbC#M9qrEEG^S!zbD_h2fOi9hj%WW+aTTU!l>+~cKv|W?@ zi+)RybVj?&4dy^fhBmVok*E{}Br0WPtQwLq5cmA2`!4@kSP$dW9>2kTBr2uv|BOm` zWP7&$IZC@WHB-*|aq^}lpWU_yt!+jPJBM`Dic@J9XWIJG!lyozy*9boJ5h?f399?| zLk2T6*KI@Rtr%nGH>ajwc}PBZOSo?aWgz@pxNXeP0o?@CXbEc+*R5F|&3nt|T zeDXUXDyDIshm*d`&nilsKbYjKL=10=Lgg;3R*kig0jW-Y1AVqQ-_FuS59O>M;G}F_ zNni~>2b>h!*I(+d78m6^=ca9aPm8LKt}a@l2nS%PGVivo?9Lukkx9zzJAZ84vrQ7D zaFDJ$%{lVCReBR9#_~N>Q0qHQa>}WTsJEgZb)P^-zG+{Kp`KU_b#Ez_Fe%cRpN~0 ziP!9csC4ll-~*1f3+ju~gIlRfEb`7UT`~s54TU1qV?KDT zj@;}4$Pj48opva|Y}in!8TGzNES@dt4GVC>3}tGCO2iOfhZE5TW{IkFJ#Ed@@1^hk z@(DZJ>V;9`_6s(ip%+runxVv#Sh59kF^LxHtHHZ4Rp}n;5Wl~^5t%|z`3Wkxr$ql( z&vXs&6Oc{9`q%_TFvl?7Deg5=iG!ojcfn z#c_1$#ZsbK7YKfC6@6^(U|y6&Eu^=?DtDQ{kl0K(ipH8y!5$(qbQt7io1?|){j?bMKe`gqgb zEm#t#oV=*QV?lj*tgOFtPYF%Qdg1qw7iRbh8yRD@skq$1;T#3(P9v{0r`EC6updT^ z+Z=cJ*+Gvy#Q?&^+BI|KVZcJ`bkc>wqh~J(bpx7z$b9m~pb4Oc$FWDkldrfhz0T&| zEaCqWg&MSv%@v=}WQ*bWvC*bkNYrot@wVC`MFrocWpCL0Wd<5%xc1gxR1?1$p&f%499p;WyalS~ zbz6&>*SqW8*=IkF$o5dFW7g_9iqF^yn7Fw33!YNpdt`~}_K!dop4+;lecSm$m$Z1_ zzCs$GGr#o?3$NVKM=a|h@0I@L_{blS#;R$y6Y8($jve9jQ2%=3D7TP1n_UFUH}m*& z?HXC6Hr%3%-CJiv?kw_b;t4i#raEn)3!Sjx8$uG?X35z5nsjHz zIwP9jKOyXXlh-=5IicgRX{*}fE z9|tttr9xtAX0Bx*^_U6NV8YQ`N*Kf z-U>QTDjoJ|u0lCpOzu;cfxVPGT}y0|Au2D&eXay)#WFfPIr`BlqOuPVef}52_8Ig- z)$ts?V_if3Zv8uu{|DrXq(&rSHq_yQN=<`dnk zA(k_MFd1+(yH@;zU}W|5Hno=b=dOc!ogW;CaVLx43hl&6&WIy5)+sVO$(g%VirRxA zKtq50LyFDpwXd!#Vz9xBnqE7NuY-tij<`bHrDHu$pre?tBbPap!y^2Bkq~BvmfFu1 z$%!=*1+{~?#L`RP!A);o(VYR;j9SJ%VN_O)P@ds)xX)E9tymR9;6bt%eUaJ05(xGP z^Ogxe@^!>9hqA#J*(5Ao5x^QuAFD?nyCPo*d;kSEVHPNqwyX%3pz33&zB7)-dWx7Z zCk;v59ghMN0{UVJ(lL6-<@Eh13vjp~XerV6qf(^~MPK#bS)OLV2nhIG(t+@mC~qb1 z3N&lbSs3w>f3!=oXMVB2kRBbY^(iMffYmLCV1-#ZldI+J4EmHWU&*8TED-t&g56Sl zI*?m%2}5JU(d9=~*q2~vckwAEMchIRr-KoQ^$Q391lc=(KJ$IFY<>uDXpthh*=MXhZq z_dTSeV#o%shy{d94aj1Kx<5oo5WQ6AagLJ6_52tg*cuQFe0U@n#4LO#EFT~&8G>I1 zj0Zl5Qs#R(X`-?TJ5>m&lu%;fS<2RQ&KKr6Q7=gMp?)Y%D(V$Dggzx^@dwf1XwFzb zMpS}_hNr>fK7}O1OZ7s!SZG|nm&?@|`6-iQPO=6*>S8^jN!)hji-pY7< zlcwQanp4tc}f|>+PcpxddvR42oWR~I7*}x?|>E&t-5+ES_ z4OZ^ty8at0oKbNaBGy3kOZX*Ts|VLULvGhSsn%Q6hTKfpFu3sTj7s*T2{LBG;yG%= zYTu|i8&*1f(rz17Qls^BtUDER6NSCQx|YWz3h`fB>*MUPyFZMYMb}~1FjN_wsCC=a z)yFAbgEBxbwCdW%v87>EJ-uh_->%#77W$)*yEhjgxNd@UzaSYx#Qm)8BDU3BQlNaY zhK?aZ|Moc~ouuy9HW)IPO!v5mX+XQ~;S^{g*$35@w$&bqhG{qirS@+{IEA}(Q0`6u z_ydy;b>gK68VzvLL7qTCGPsK0`mMv6(eA$NN&(z0RKil?RuQK}e@24=0782MKxl#s z>8g)(sLvwG^-@6EPj&2$=EO{o4T{6UnnfnrRGUON^(%*3iIm-lDxxVmEVBIB^7q-l zLsbK$OI~(u21hi5LP^p5);XUlcBNcnCJf|(Hn~aUkQS&pFaUE4`Lqx*S>2sD5EUM% zYI_sv{NvUP%8WD4qI!dM^$91}k1up{{%6Kta-v|N#R=^C4&wcPo!uL*UumkDfk$w`(Tf`d}OG&yOu{6ZK%I z?Dq|yPF@O5EcvFwZ2J9)ZUe{{qYoQ57+=)8UD5VJ&N+=3xC-U8KAy5hQa|tOEyVum`}bH5V)d&SM~v1#X41+QIK!UA^}sQKHW z(*1$ta0#Rfz1e7~41bs*`puY6b+I1h7P*~lXiSPutS3abV;Bk4fOOb{@9|Y~{JZ(P zSdV&zQkmvhk1^HmpHkv6jK>jM>Oj5sp7kVqq5Oy}(e1}|bgs+OTRob(zpZUR>o=O` zOe9NUb&26jJ?ygXcf_Z?+QtA8TVoA|1mR5A*@u~@1m+>?5jSzPCb51$QNa}oj&slj%Z$a`4)0_;~ z;rSvya^~9O{G1HK##D!A>Q39p(;phw9LiUI!jePi(m(HVZ__7-5GH#pgzNB}`_MF( zugrfP9!#&2=OdR@Xk~2Q8O+HLzeCB4iSv~`prtO9mz??8h41iSe?e>EtoEo!LoCN! z>Y)R>n#L*S=e5SY;lU{LiT9+UVStCEsN0eDbM$3d(ag?6^}dEvcr*AVU_Zt#`vlRC z!-Sb}hB;Vdw+KuIPMO7;j;%}5nT!QMqZ92T8D}+pWbPG>bh87pLUtmEOio~gr8xHq z$xTeC<@f}tiI`TIg_IRF=*D60^|&gITgOcZ4ME0*hF&HjNlaGQJ`oy{vQGdZ-lCYc zYLMX-Qs(h1Dv4^p%}`SScpGm3Z$sd5`jsb%;UQiK<{kZ$}h2?v=kjya62Qr8bzsL@>mgr(}cmpa!+ z$SU3u?AG9$9}R^{e8nU_9CF4|duObpri&!L)aWBq#RBMKHThG6acRK{@P>JiA6DhQ z>TSH7kzC|7D=7Nh+83pMq>n3(6jNB<&l!0PaV3xB1crQr&0iQIU1#OQ4_Tn#d;A`jRAa}$&ao@AG@E$u0Izb-+c%EpN*6s?ld}kR|Ca2$PzWKGq($gk>9{95?zm2x9yi!qhiU1jG~t zX;Z)hB9wE-)v1s^iobX+sgHFJb>DTx=Y~1<&{rgdDGpGW*cRy-HzLY2)Bo|rfGo%9 zvaJ>rokU4qkMZxJviAa<({t00jiVg9L4f?EOELBm;7Xa>Cw*>Y01DH(@GJG!b>X)h zz|v_j#S0$^+I%+zrjjd*29vVu2&0`1a;D9eIH(@yz)9}Q1p}677cPYW<}h$Qb~$E1 z(DaMI(Gx>k*uO71ASRMRuGx`rbbp-y9YM^p$!HF=V+NU4$V$AuVhZlh42WJucO9w+ zzR_2CHs4vWUHv1FFpK6}JAC!Rgo<5}#2N-1@UxV_FZo&O)mu2RgmZzIQU>0VoLF;n z84!eQyW5#U+#mySORJ=An`-wjK2T2In~7~O69VG)1_7~MEm9Z;g^ht}L>?kG?uEYu zOA2+O7PgI}%0&1Aae*@`T!#y|2r~KrDibbdRCqCW?>JrVb5$~{@zVTT?MO)krfZ9o zL_Au4ZEO120VwDqfP!{2KUnX?k5Dd5Ddy&L1hN#f;bW$IFtn&}r}jDA5^l0bg#N^> zP+TB?;03h;DU(LeHm>;7I65$=U|<9X#{he!+4gHY2`uneKfNap7We~ze1cry4{8-P zkL?r?CN|X|yIkg_+z@$pEr{F(a))k~zXG}&CJ;3MC#e~T4^29TDuCY&PSg?Q3sJjQ zKDB1tRv=F4t)WWPjsK8 zE_%C&6N74(5t3Yn>?$heCv_s68BIEint^^IPS#Oa%Ee*R5QAc5p-4gGgrPSADLxs1 z=({OPVa>JI9~{lym0=fk&nRW#XBXbjw}Y)}PMDT6$R~PLiv5;;^H6R?a3y|gNDaN* z-y7Wdx;MCw^+~%0Yu;KP-ni?r-#FNKg_D=8r}-aMQIAg*l5^R43Tl_6-t0|TO1_1L!ZeYv{1|l?B}E#y2?cuMP4(JBIr4ST zSrT(_l&by&p+mnO7ptS1)@#|yErIgOfsHh8Z)a_gbM1)ZLEKrY2gAX`ijk%|Lb5dmF@H%sZ z_``bp_u|eovW<)PZ^>SCw~~LD-jz@EzyRY1SxE{iW3U;1GWOY zua7rhdT1=hZiRT=l^8nl%FJjh&V6jj9xGnv5M)KKv3av_nmZ){OZArh37Jjuct?pa{-aBs~KxRQ#NU@-uFVtl9e0iBG@^Hu3Uwug4o#{>$0%?itR` z()q@`c7X1)uQeKEDp^yV+HWpx$eJl7Ev`Jyj#F7>OuyFribEB=Ts^#F#S;>>x+Ucu zJ8y$jk2jv?gf64Aj8jWxdA;9z5xRhSuoH5b-JlsR(69FJRiG~M`?rQfFs4@AQml*^ z!@wS(HKy)?NEu~C^~V_kXsjVo1=BE_Zv3x6Lt;~H+1jHw6+1_2N5pPZqQ$+Q_Q<>_+J`71W7?;ywL;s)foh$p2LfkO)VvX+3$*b1T}Zw7Uwh;n zOrqmiV>)U}7MiLOZmMcVAz9cgH+s6(D=_@AdjiDD6>sUpv*_y(BdwEUy*(2R1M^y- zrZ!zIw0CxdnU;Zyob7(Up!e}Dpdw!bD)J4z1RYhlgN_=Vl0p2-cZPt$jZ}nxr0&5b zd;)eexeFXxR4oJlOGB>3^Z-XEey~s`!MzGJ25#8#BZ@begQ2tTZ)$(y7Q34<)KRF) zvNWQOYD(s&boiM-^KXO>fB{|4VbnlhUilGd{*6Q=5~u+l7@?j(U4hdM$6_BQRY@S` zXGo|4pZBrhMje1{xJ=%M1->OfJ|_K40GI=veedj6-%HA(VXS8QddTJQ@OP2sROu6h z{u0&0x^sxj@6(KDh^Wo*!vl{UI-Gf`OpuyeUg4@R3T@u_0 zF2UUi?(PyCZjqeReg6LM*Y~0O=|0r1s#UAjs;XT}YRoyukZ(fHEc>MtA`-bKQ5%Zp zI=yhfE3)o=V#cWDKUqMHVh02>a6^us+-obC}Ux_LRAn}AFTpu~k^OiF!! zRc;H;IIP7I8}u6^{|6&3d=PCWLq3v$Bu}{WU>waxvbJJN*o-knp=GO=el89U0-|1e z38%Nd{32~?h66Pk-)>%Svv>v-CqBk_WfbL`mvc#OBadmo~i zo+16PElhJ7n|`-r4CbEX)IBUblpi!o^<1=N3rqlTuL)=sgCCrX`S=^Q^mO<#;8Epf z7SCyd!LL^%g5bOADyW~=#ytpNEs$s-w7%XpF0bRW@HCU)?f?k+mbBi81*Tmd2an?J z?zaD6Xp~<8~6A% zEEo%pV5dXi4w}@L{BCu6&1%eCf7Ri!q`H%`6iJ1GAYOUJ7Dx#ppKR0nSvlLI*N*wC zjreHRvm^pk?i6tmOO8HKigH8l2g6Rh0d?Sqy5FD^Zwt=pLogS4GQ;EN154HW7)Px~ zn%ke8Im7aGeGNRNc*|cU3PoctAG4OKGmB?t937rQo=1N`AJ322LtF;ARlk5|rgBmg?L87q z-q^knOzG?QASXkgTmr-5+2Db1y^C>Ik*t*b-&Klv%m6R!Wxx;^AT=?N8YDX*_TnI< zo^5ClkPwXqSlxuA>Ud@tmGBQR<9fMZO2*z*f$8C>5TdGO=Sx*Wt7Ws7l`y!;m$a)v zs;pwMbiur^VWTAU(g7WUL>*7vizBv}3P&v)?=MT0EF`^N7+bvnCgMDTo=n7C(h3pf zbXL-L*y9MsgsRFHXe8xN?%KrVjBU%KSk(6u$0M`b79t+wsU)n}ZX{5<;fzw&Aich> zqI~upM3p=y_@1o06$Pcolcaq1o~UKa+RL6fQR@+IDeH;W#+b`$t|eSsN4eyM{hq48 z>9rj*RWqdTC8)&bpY|*z-SWxCUl>Nhtl(QXRehE*t1o*nCve(SsxEu}6n7`}UJEGt z>ytCww`U4705VrNyggTY-^xyRNzPkx$=0g~Xbsc<25@q=zK@-?Mp4fQqFBc*uLKap|(@P7*c{%io?pN|}foccTb8}Kom zSZ8F5Eq%o0B~Xq-kHpIl$LKMGf5@3loj#}5>f6AqMaI#8sf2`0%x6Lfr8^KZZU#qH z5{H*kvZ+TA9RqvQmdV|)YnCg%77_SN!i<@GvbP{+`#o3zMvjTkiwYWE+@IeB_Pxd= zehcVTd?B)%V-!J<-?8QVJSIFxzDtDan}Him1O@1~0b&yjPK+Y5?MQ%?W&^O&9I@t9 zodO2|d+n$ufZ4Kc<}@?BExMHcKs}285{C~&S{Vi(GVb={`{8$Lz6$I^z#``UTNOjZ z3G)&O;CRNYg^OOwS9=RLj-wig$x9j701QPt47*ssx6+{#93$Y))fuj=dqvQuAN+eT z0{#c#u{$<61#)2?C@RG`XJJIYP?&r@-zX-kgg~qXd9m(^iejwaAEr~FI0a@!v0?6k zA^;+{P!tQ8uc)EEC{e@7AfbvaufVv_06t6s3)2!{Vfs|{V3DEB?#@V`o)`Y&Gp{Jt zz0RO7faR!)>x2e;i~a=maDb9tbPVd50J^3^C2GQ+72m1z)0U+8vi)m~5x zRb2EJw0YeIaG3u9oGWZT2^d;HjkE}}*41#A8bk{O@_pn`m>@=+ONPJz3o*<5UIH{= z*MLEc){oH$>+dZm#w7l%DB7dqdI|nwond5E#JKOJ8C2$Ko^EAMS68LCX1X zFd$>`RUi*AQL7A9=9xwTo0u#PB+ARh3;l|#{8a;IIzBdkIaiN0)MQE2)PfFJi4Lz^ zdSy28R-fW*zOAq?dZgl5EytX8Ju(x?52*Jmfyl{o*_4c4c#!o9hKjBiVNR9|o z%8ealUzo6yIg0ad*gWJsCepi#24z@^Z%?pNda-3QR{ebw=qARxOzGzxV0H_c%fg>Eg!@_Y z63$o9#@E5bZ1H#(l$$t?j~hWAFRGjTF51wg_**=Ro*JwEl*;hu517MoHDN}QohI9h z?@CPr8A?(ZVOW$VgqX?R3hacki)1%&~+Jri*fM zelb@7+7tjTTCsBW;sOE#h+A|<04mTx?5f)#3Xjr&DnDKe+IorX!cz-X=;UczG8;$2(j*&I}&Bmdjtsg}K75d}e2^g}I3ceCnw1F{VhO7nx2# z=1Y57@x+6QgX=_Aonu3pr(Rw>Ey*V|o0zHpwE3;)_Wj;V*t`^(%eV#QO z^?S))L7%lu09Kc>+FuVf7DhD)D6bkv0<%lG0l%RG^;ZJ`w6$R0(})xtu7YvAN6z zaB}HCIQg67{7e8RN3)@C>65DznmfwJ_^Y3;dMOL^6AVkgA+Z&5QEK#$O2O^|4jeT& zunPe2V8{989a^CQEtkd{12C_zCtmvMHElPbP3qO_2fU!32HwVF zd?(l3*Yg>is0A7FGJ$PH_ZYy#p<6o^D`m!FS8;~$n1LiI!Jd>jO=TtlWRUU-U7oO7Y5RM0Uw(IdZwv>_Cw@K7`rkhRPZyAGc>5_EudK7c!84JQqYE6;m@SYz>)lI75#5*FN7UBAF5co(t`SlnE*pIm3!Mk5eUAJywF}Z0YM~r84k#P8vN)AfLV;dD*#O8O@G>kq zBMH2?XCs11zq}yy^KiefdSV|?C@@ZoEQ9BR5k_JX>5A-RsO#Uu_ChVdyHUXGi6R0f z2^~p>P(2L0dVs+m4<*p#tp}>uysG(O3r?Ue9G1{_ottlo-c|DV`ROJRx&c@mFH|ES z4A==MD)?n6XA&t^+cQO@<}I~`sD-ojj5OB^zHrw}0cJJ~;Mqu*EDw}$fDnSojY1OF z*R~FEy^)@HBH#jm4}Q#?HE}(IU!g>0j#Pn|fcu03!|sdGzVvhc&eZRbF$ZrUveP5v zVtiN_z{j)TdT0z80^>R;374{p7RYA_2^tp-2~%vWvcZZ9AKT<|vej=LP9r zuNab107SELK<2ffOo5sz^{BU{ag1awjg5c3D1l5Vy^l$tpIHF4{u@@n2)_+r?U)HZ zfWhN0@hmPg%3RL(2<&gW*Q#x^;r8_ML7WLy9DrFrxur@Eu<(b8#Hj+7`rpm+G3n1_ z1g?!1;rUHQq!lvEi&lXsFi!vs^T7d!=#^2!fZi`LfQ-L^4EqCS+rBrbhYGMTRb75} zmdju-vgL!!4?_ZA zrCk@-17;~f3c5fY7Jw}RsAegr2^BWru-ew}rQR3eH5!B8Z#N&z@6a29faDj9oM;#8 z_w?JZ+mh(M-jT1d_T*XE*V~)7aC~n+e27 z*2p7;hlZ>m0lMmJul>EP-k=HsJadFSNA3{KvS9IJr*)5eY3}cJ^xyS4Sv+{$D;m7b zO19K;9nn*6+Q!mqYb&h{0>i+-3>-;wy{QrQ|S^w!#{l5UIvjXy*f4t8B zlNX$c?M0#UU%bwl|D76~_22)7{}GhV^1_$?8{Gd-@^&Uxfa(5U!F}LLtgVbpjo-iE z;f7WQFSZpXzzFaUGs}O6q_Y6L`TvTfYc52P*28;dmKW{3qC4<U-s$y{I1Tp~P+IlGOrl&i3HM?+G#pGR-k`8q=Omdy-97 zg%O@?Y8Nt*5$O(X5HHkiK2jj+*C5)!D5iLvmLwZ2erT`pf7MZ5}IB*mLcS!1|m z$l1yy$rA^++!A;^2&q>_zU=ePB|~p1)+IAt#11}B)bMuR30OxbA7L84?it3N!d7?bQ~fnRVR@u z9u9t7+dF9|JmKT>yzju9$0hIvKmK}Ih!`YyyRk7U*QPpvov-=Sb#_J|7jW1-qkv)e za5KAcoiF;HVAa?+Q{nxiwqWAjr8B_-)O?xn4{*B@wv5O;+CG=J{DKLvT96~yb52{y zyJVxU$Xy@-*|t|HOP$P&sNr@vuZ?0?u>?Bo7WcnE|0Zz#0t2khr9r;N73sGu1A5E+ zVg|Op_WEc3=DN}BDubU&Y!Ob+Z@b=Dyz&3YZf;T2!RoYzrPe>d z%=sbXwe%^RE>6a4o zq8772EVdh#d61o?duC z{Ub_FnX2g<_rr~vpKvDMWo`-Af;6CC^-LvYD~wn0*$cH-)n`*2xX zWW7|mLZP0YG3{sc9D@$VM(wU7#37o3#N}b*N325N4CUS})r@Wm(xka>;g~h$9Xk@O zdID_GJAOIzug&!JbZET}zi;JUKTy28T$c$H9W9bZ(!oF<~(Na@%pj^ajmB`JTht;zL z6_0I$qg6llwRUe>uB6m;^y(<@5jyBud8NbV%MPQ_6jm+U*u1`UebV%ve|nVNg{c0o z2Gda-4mDD>Zd8Mh=3kCLe!R^Yy#DNG*D=G#ES#&LYFCj=z41cgPvA=tWFIp((Ns6+ zl-5nA>s6{o?L%W4X_9*N)j+}M2Oq5|xg2tL>pK8KUkuj#k8p&M(|cGcks(t^u@Eh>Yaa%JL}D^xUO^9JjIc0cH|a85P8&)#QYD zZC6P74rVg?7NEcT-Q&QiU}BEG0{ClpNk?A+)Yn&ft)WLlg$f84PmIK2u?mlb|F5o7 z>_56r7TEqDlC6V^R}ls|38W~sq{+S?VqPmp!KKkPeyjyl|0F&@k}DxL_#u(WA zTJ!;O%9HSr4qIe3(|H_bX*685O0c5;v`=w1-LAKKGOWNpUWpDK%-nZf>% z)LL?rFNNJwQyQEnik%jXzAR}pkv*Nu-Ybz^#@Q}_qjvmO$*!Q?dO3hE6Y1XL*ulQC zdA{))WHnr7 z(B50Z!acL@YZ=N`=Hyf-XGJ<@zO@zucy9&`C7#w+v>vuLLLZf2@qX?E%0-zEIuJ4G z9Irgma6=ZgADm7fVjcV$v@g13r&eBsUey-Z-FMATP&v2ztD<`oLzZ5{!i&O5L%J&j z0paWXNKPCM8DFkkoqMB1wtZH;nqBj5D{8=Tu^(G^wFP?dx2j(r6t`r>ex<@6h(yfw ztQoK`0TNldID4ieHML(qvfP9%?mP;|k~(Qvj86FS#~M7!yEd$B#`Xt2j?G>(72DmC zqHNJa^uf^|k?AE4suJ+X&7lollnDE1K!%Z1z%*_j*r^cfs4^s%Q}3pfQ_lg5+Jt#) zS&md|nJ$S=Vzu^#V@rBLP$O=N1Xa?|?A7=2DP^5EGM|U1Cmd8~VTVH;AICkkIt*G7 zWY*aeV3(?-8tDp2CmbO@O*%rv?lq>lna0r&iAGmaCk@S^ISkLCSpbW40IU96O1asO zgjaG>jb*Gc4tQY9s_f!=WeGWb(^sy{JAgx>RYc?J+SuS3i_HYN*6dMKev47wvfS*} znN|?JmP;B*Wv9Nu!+N}Sc?g=xR${2F*Vm}k#8A2iu%reu6~+#FG_9Nb&*RKqUz31j z6}sdyNX!_i#~=OqK->!cyWpQFE z04t>tnpYtQdT5`L@<02kzxqgBt!(l8_}AS|n!i$E+-SsXdIYAfU=?U-5xKZX7pol{IG~3m05Lc>=Q&Y^@k4{e-ZZW~%^TF+ z32xlo32i(IHfm)R1Rq`@U$^e0*3CvU30h-kgIy}19#pgCEcxtfSh7$Fs*N!$iKo#& ziuk?i-l_-%DCXt^3`_9PwX6g6NDQ&eF%qzHZ75J?JA0bHFU;c&X3@D2s`WDoH}TY^ z8DJei4bH*NcCLPPpY7ypS(JcOFE_8L%5@v84Ohf@kclT~scYH4Q!lq{UQGnxJqtb_ zwFvj?Ks(%oO}^`o;Z26()4zT~wyi#nadmlLaM9~5oN_tRyB*ZR6R%fmFJ##f(DK(| zKqK2UJ>1M6!7%h?VQY|GUKcxX1iW8Wq6)B(yuis#3TSj&>q@kqNfwp3=pVeM-aRFT zU6{4dqwz+k-v4Et(Oi~uYxt>2x%_x)F-hZrV{}4_;@E4eOimx_W-8@a{-c9~q_d>b z6j$y>*G#f-gy*#xp3A#B+}UAfk%^d(rPe&<<)Pe-uQLS(7+gK{i-r-|R5cg}8dTrr z++k1P&&;Ov%2V`6r}`Y(bc{HkFat#SVN*FM6x)u2K_P>o7@^M8*Df2gl0UiF7PhA#l422CriwL zjQv|U1EH#)*Huva>(}4W)EQNDsJ6ddQOkEsEw0sw4&GZXzt^@dpb5Rc2H(R7PrK$} z-B16dl=~`V%A_M<%EaeK04TKVtHMdML^!&1ff#Hfu+*WtP?Ia=qHRGehhBlvKfIec zG_fxH*+3VxeFQ@e)2wgBf-*NNU>|5-%hEJ=B~%@y<;^0<#VW&`YVxkFQgb&!>s{Wm zdNd*JTnZs=l5|ujw+N{OY#q4-EICRZgch)T0+v{4MS;j}Dc)|{m|UT>LK4L&X7{yPJp;70P>d*X1I|Rg(xl#6xXzp8 zm|uxR8XiDsLgSAItW0S{KIju2oBUo$V#6vdQx_LyRU$!$2auY;EvOG=;i79npg3mm zv7?taK%)QDuLZr4rw38XdxLrc3$UJ9VsFB?gz66^^*f}n-$;+C?aubzPNn5lu9AjB z)aU+QQJ9wK9t>B7(yb>(1C|{(*6R$N%Nh>KA?HPs|e=DM|z$ zZ-4&h*A=!8ssC3P>)(~{{y%}SUa*+|7mW4qH~&8ZkC*`2zkef7V0uyh`!6t-gUR3I z3IB!Knf0H(nEwmF8Z*;>c!qKkGO++kd;jVZ$_%hf+Zo!MSX&tU7bxqWEDrx2l*P)< z&hW2LmexYV3&->c0A)dFj%=p4cYe`Gc(C}??$us$)D5Pu+wzQ|YLd;=T{WUvxGeATu908!hm4@rxzqsAk9zb1h|{OivpEuZdARQN@`nR`u- zBU&vY&zE#H8y`35>7TC%>f0u-PsGhu3R8CEsxwy7#GM%Z-7BVkxaRVE-*uIG-t?|$ zd)>cvzh8K68@u52{{&!K5;6~0TliK-&*zV4-}%<}qMO=WQ8YOQgK!^)r+c3k&kX!J zBj@`SRqq)VydE#l7b43X?zA^g_sa8QKg#Y5-+4rG<|$KMcHAr!X6ig$a9BJn9Zf#B zrXAxiy8096Z~WS8v(DdyEA#R7)->=&iumu-^VFVri%QSSDI5vVY_@c+&p4X*GWl5+g92~Q zJx|=#Q%0w%syzzWB$tkt&X*=yBjI;WrguDg*UvT0j+%Va+jiFGb0a8&7DnmGSBm=! z5tc?hNQMkInDj@G6Es1~%qrlwD1dE}p@SjifW6CBY}OpqBIe9xp8-P4o+%86Ceje| z%(BKejy}3EGVRTCPX?OBU=>?ma5%6e-=-dHbqLrdR(GG>cCkRe&Z znygjDnYMcdcTA7lq+963E*qwI3nZ6*A4XB$#v7o%Pm6Xy;TRPvGgnT+6JHGF_{d>?(M zNHm;zP$f(&?j(h&9XMvJah%o~pFHdPtX*2dM!j26lBLh{)Z*(k2{Vsh8qTC832Vs2 zhnpRuN+KPZ*wtMp#2TbrvOSpC#iG-kDK&prKiZ<F%W~N$`6KXyz>IWVJ27rSIvuRU1NHB& zbq!S<*OrFv_+9%L+a{`rop$QH@PpP@zW&)5hg5%_l$~$Ck&UmvDTRcZy-1EZn-2=9 zG`C>q81%bu>4bXo&?<0ggxT}Z zNyJ}a4&19^0P}&+oFsRqpoQ<3-`Cx``;M{4)nZLl{`I`OWY0}b&*lARs`7?o0v&=I znf2=H>a>ibX8!L*5>oaG3>AbF()4}MT@akv0%9G+SZEf)Vh|8aRG3i;9c%{5@`Sm* zGE6WCeMO03$twrQY)l%cGgJ5EC1sI_17)l$wHZY;_Y5bY;H1MWr?0)mPPlM`D|6ryYORW>bd zjdcGHZi%}*S4s#`p%zFzoLpKx(H7OtdAE}Q^$1&-H^=Xg1DDAtBq+Zxg%-Wjf0Dk?_l6llkXM)CwPvu^ z7`0stR$k_^HK*mU744KE5q!t0hKYpge1hnc>0Juj9r$xz!v?`K>;?hFEd_y%v;yHO zK_}`nlD`y@5bN{i8@cyT!cRoX7l?Xp??o`rj8VHh-Ibxc?p5K@|;_H>B93Eu`YSE-ceJB{*X7#8whYo#GTPz!$9 zB!Wf$rv9>p=9iC@?e<=|B3qTC2xySVw(!&#!*!efUDYthEoq%rU7|F|rl<%FCIf2o zSokUqr84fGL!!5R+;lKHqoTx+mymSpYl}l_&$%Rm8f0w} zMokD^1p`i08u8TuQY&6=<07s@7`5|D;m|P>84eFnip#(uf&vso29ry$BID+JAUlM9 z3pR&{X#lkxmW-m2b8x3tOzb;Eg>AwukzQd`^i-DgB_f!=Iut?0UyISo4`-ww-^`c2 zjpFknQgDTGz<|O~#s^yhUki+oUwt3xW7WyVv&A?jgGo~aQ>QNP3g>{r7BV25l{y&k z(FM+76g?mxNV~xFKf2S(O5Gx!YuC?8t$v(#omLpTMj=qSHki9* zOk!pG^L<6NrsZ-r@hgyxlk}Oz`}R-N7&^#c+Yp`Isz1JP>ZQJ{Tq7_UC@h4{kl$?k zzy8{-)t)9#Sla+TWbgll6HtW=#bn5&g((JMGVCxyaYr_N;T#lY5dZPzHm*iDH~6*v zjF#?_nMxQ?23&%UEe6BrOF4T$;W#SP0Lkr-VAt-bX=1S|Q5BbwfBUg++#dToQo(P@zgQXh6 zwV(uMU;9!~4H}uC3Z0bNJz)FW*`SX{7>40u9~_)GleMeD zHm%b2y#Zw41!w>sC2z^5I}fJ}>5!J{+oDZJj8hld8+J_vthv%Cm_rq~W*gzHnViqf zwUqn@TfySDLJzqa-J;5Hb?CX)VUue_G|Q$~2kX6o%IMzgdG!tJq9b95h5%U}l| z8`r@gjzXymG;O=v(J-dWRW&Q2{H}IGslNd!anx2x%WBHXmNZZ}W>*6^*PVOeSeVO6 z#c|6n4j)E7l((EQNpOy~{OS?5n6LwL+sFyRt79gX&R!|BVmLNM8pt9|akX+1Gy+l*e z3k|hw_<`3)#%o&dya`UXxAl4Zm)j3qg7?#%*o)a+sQPf7tvx0IWKQ3q!j8^S446o1 z)v~_+ux7zft4@)&5Mru??l&M^87LFQ%P&d_RaBNPy!t4gfAtZr!JlC>#uqFxuGOh_ z9!gUYR+Vm#6^aYXGUV2XWa7g~OHv1qG~;v=Pu>R+yj(R>no=4fpz+I?d-?+00W-f? z(*v;#Lt0ZZur)ErjCE=*Ma89>gpIJuWs>ysW_fChszMzHCX}jWIUF5oKFeO%NZC)- zpvdN>M`txt(k9^@f&0}=P9%^WfxtfrazjAO@9lkWAwf4OObq+5e1N=Nk#|WKIC)PF zR}v|xwhoMv>atH-mQ90lVQ0ezMmV)7u}fYDc7fiPn;$|Yt2 zSw7yRLr%TKPL!1V2w2B$7C;|v@J*l(=suP;h2tJ zkcT!_8AVPhWW|K8!ie>R)UTOY(H&zsTUkT%BoD=vBE64$Z}Ci)E82M?q*)mATvpJ> zd4RuU7R99yy{viC9I2W4Wv~}n-g_DBft-oKETJf_h56Lx%UIBZSudU3sqDIm)^NZY zuW}r;$4b0&^Cq6X%P{x$X~jAtNwTfvNR5G*D38C{I-~fjbt1TsAbA;{f~_GKU|aQf zGB0esGpX77+PPzbJ#R6uGF))beVqnoq+V?|=lrypI$g12^@GZKa*Q^XpW`}vBW%eh zKs(Q-oyUIusu536(J+k0Ro1Y)r3P4SO)DdldvQ$-Ga491n+SgJ2zK|BmR=X^ zRU;&t(mBKjkjiln*+%Y|hT86TML5t;p4iw-WuFa(4w+L^uFDw)SGV7V`Fg?WhJK<< zuy5~pjjmZg?k1J+@sLcUVMPkDYgdVc!;}&w*ea7+u}0iu0}Y&oy~h#5vrM_=`puVe zPEE{Nv*y&>*L>&d+KEa(4av#OZ~L^zRoB@FHps(BS( zq{L{a%c}l)A>vP}5S$PEO;xiosk1u!{m>eO1hUCYnzt1vge)AKv!mZ z^~*3AE8VOmt>$%P{GlCw}iV&9V{TJRZf{Z=ZaPy3i&+kq0s zVNl?s^jS73)W|LDKx$-Ox!>DUrfE*#&cZsUdNwJY6=JKHbdf+!WSqQBeDsei}*wtz9W@Gs?kgK??++NI|tXp zN%#P*PEKZ!Tr-$aRAiJ~V<0yN{u4!$uE3%55E>xti+xumP2k7STqBjK`yEP2Hi?gs zjCPku@DAMkrO^(ON@o(nsgVcZy=+xLPf}RS=gZCc?*YZ%iF5MlDxrP09KmconvkBi#d;5;}PV;)8+;T0@PhyBdj#c1(){;1A7yG8E6Q&=-;Pc z^UiP0Mz&QFV1CfJoZ8e$GT55(;$D12L?8%{ibPQ94;^%)``#)~fVlVn>)|8#< zX5ExM^{La89be@6a_{f?Ubg+H zic`>CQA~-^Y$E^)Mbn#z7onU4ec7A1UsMZf+OWG_L1|hvJ#JsNdc% z@$KZ#-Vp{IyQ_8txz^t=qIRQrb${q)xMMi6&BUqlifo!|L=GH(E97|TQ@){-i|DU+ znVmy*hcxQysSpG?kPN%+6bF}e&25s5G&TTQ+Hd|_Mg;n2<$!sb2pyAT`s15-` zF5+XW2b!mD`c3#T*nvs_!8&w(&`0SYg7xpWXcQ0u3tdzNC}q%o{^nqgoveCXck+zE zd`RDN5g~BgrW1p%I?3+ZSxd%)ekP>Z*tpK^0v|CqVX}cdc{1%wdSU+g=^aaYCDo?o zk$#8{YUiE^ibhfgf}yaXhNt-v91+C{R}7@U?X`@yO8T*JILB;Au7aHP=%`?agM|&xT79t7nlMw9Q z1q#XvIYu#CEgu9gTmzN0L~sC`H`?M;Cyqac-SKSiwSkjnJ6bU8T|i1hzvz%n(U4t@ z`qVVATj!8xF}T;2=$(Fiw|GPle_vf&oEryK--+VS<5%CQ3J7AmP{jB z7WDE5T)-{E=rFD(FO{A`@J1PT`tYEzB`zwXxNPplm;aQ#269UL#b(2D=!oyz*}H~&Aeb^tD{ zf7=%RK^4vLB4qh5#LO=yhQF;HO#fv zPpBS&+BIbGt1d%Q>;2fBcfH@!!*SV@dTtZ@tVYY@<;CE0>kZPe&vVn&ie%$$*RA^| zVvrwSs%J^P_rvX0+tbl6{)gLph0#&_(F>jG%$4uC@orO1ay9*N$S>CnIg9?V8=KcU zqO(1B!q@!pv_bRxOSK&a+m(IXh^?ddz6Z$U5wr9)HLs0%Xs= zbx-{s4e!Jwtu8UOE=Qoz_it;iITHy@1|IsmqIoql^K3m@64Qhtd_VTe&2rQ7`+H=^ z^Y7W8(?R!KV4<8nNPka6l5%WpS=1*QWP3!lGuKe7CfRl`4o5HCNjS*|w?k|R^pInX z$38T>;H}x$pRnuS?9aX_06077TnXqt#MWOH_J5Xw)1WZT1%f2z$4v-Rf1_s{X;$kW4SqK%N#`H$D>1H+SB=!A|FL4(xbYO`y1u2 zqC!T>?(3dOu5ZVBa|(6(SYbHTObMJu))qG!g_Qu4(*~NbU5_^%7LFXw?*Q~l{+5UE z29ME7TMsHYr=y|UrGCYsh~u~2e173+pVWw4bRlxA?piDD$!KW9h<8~&R(lBfpzhwo zN%*vFM4>`KC=vpj74YvF8e_opVo`;_6)}%`UWxPfC_|(4DvR-M8-ct_IvV3YrrAK>02CE!GLevPRa2c$U4(vWcN!1UUoJB~Prpmg@g99lKd-48i@PjI7+dUPZeKY!}|qVLs`IrVc8V_iuH zr~I+Yd*!JjyB5`FMo~nA#3G;7m#q>ZTfqE1Q7Lj=Hmi`&4AdJ9l0#A~VRL`5Qe-w$ zTEnc`aVrm#Oa10>Mv!CABIr4S6;rNF#hgR0uiK_KDl@xQY9cUFHa;(WyUN5VzZNy> zPZ@Bp52tu0G|nZ={Vh$x<+E5jzsz8E$p^_pImWbI?)&_7%QdPS_amw|r!lv|@3$OU zPN`UlUWf{Igo)gA>Yuw)7qH{5WqZ7Wwv#dxw=yNz_mJ^V;O+12jzrSv7ce0s$wsbw zhb@RBM1l%cib~4T$>uLciG-~uVB&8H6)sQ6(n+2j597}^AASw;0%dBEU`OKGGiPwm z=z2V8lHS^BoX5Pc+hsK>lPE~VdDG_GpV(Gv&Klp%u>l(mQJ{>R^n_?! zs5f?m7QzVrV4O&ho9&n}Z?XjtXkj^P;5Nr_SUExXaQvG3>VAWLi2A=~{4XL10!2!c z3^s#QoE{inbY3QPbavj#oiCjVCqJALrexW0-t6}U~nXGh^GL@#( zKGCN9J~?Jc{UliQKcS3H*>EQe7(;W|atwiI{?19TMi#>m%n2$zx(pnHm>@u%j!_p* zOtptl`f{HT&4Z1qCkmfMf2b1F!6^+fco+^n$P`}6Jp>-M2)b_2B3E-5mp7i&0lqxj zhQVjcnXfM@OKKydYRRF%@Ou)z1ZBf}iVkVq2dkU+uw9}tnh#@o`(fUNHkGjErhlu! z>J4im&MR@xJ&U2_wAhlHRqMIvDFFqE4XKVgVi!gxm817#t%o*wT*-^g@6v?HsxF5n zl^emiP#>R9^L=hjsbrnfgA>LRo0Sh@BrIzfR7Gj5P~o8q7izt;m?}X_^ti(9#>Uz% zHe8;uaK1H*4sZk?QkC1&Sn2e*8k@Zwr{JKrx|lxF7aW=Wp{jqB!Bdm66(qs5jTs&w zK+GS2Be(I+1OFmcFYZiV4B;FWbKNlrt7|M~oVAA3$Zsr$5sns1OIWIBCY@2g zf!WAm35(h32&6A-?(qJID<#^?VUbyU3OQy-MqIH963>2kdVg1XGbfiLIun5bt1G?o zued@f{}07JP|Ux&Fmd#l0+Ee|5S)5IrQG^G44noJ;S5-xNQNRhW|GDo&86q^)#@RW zjdNj`^55bak5ra)a|SaT{+bC~A|F8wQ7gBpV9#Kx10wZCa9<+z+|sa2JvU$j_6pK9 zKWI_xgr=T>qeO&kdNs5@1_*rM8$`-i`f5J@@~d7+*SrEtR&&iLw*BM#ge z$2d0*>nP9}i~^kjz}3K;+)}%?l${~*!%b8q<7<;J@866W#^3zq1%o)hkrG8j0eUv@`F06HT|1G^X9}WCoS-#FlZLeq1cX%b&D5)6#0JADz*cn0Qc7oq# zT$P*?65fErdgD`T%5DzSftQ4h2=5?5HSa*$kCRcQA@@_#q;J^!U8r;S;*oLUk$Dd( zl#S{J6d}PPOa|HemfP8qqn(la%o`DMvx2pm8!PutcT2bTXI|@Eu@e`e``@*@77|7y zOKqN0ZTOg0ShfeaZ67_XFZ5Gs7WNGRt%H(`-#kv{_ShY>a+>B(S0xu`JmIfvQwMvz zsD5i5>`=EEyWP7WMkjR+k~RM9mN588zKI_9FFa1)ynH1103N3{N#(aa#4~xZo=J84 ztPzyts^ufE@>E)$AD%W^`cU^@v<~XmDzaYUk+2baqh4`Y?PfUe~I5t=@(=+q`5e^FS719$}9J(`vVEj-uKXzdsr+ z)T?*3vqVfoXiwpUstd5ciKImkT;Imm%F6hpg>C3yxdKG734 zQ7<tvRuM3qO6eP3Pk9{m|D?a)yd=fepiy7Efwd)MCcj=_i|lsBpZDv8N}7 z=0=_WQ-9MatME@AK?x|Vfo-hLDpxTdB&LL6<~kyOkl_XBHPNQlPo7)>DE0W^Sun$k z39Ax%{htrG<7y5)Rj%rOXVJ~nsTkie%LmoifS`UPrnup-m#G%n@3TvR67+t03)Nx|-fR8WzSgp! zdnZD|MQO(LE)(qe-BqtsTDg|>r(0w`@T0*7-HE7Z!B^zS&~~?I6YQsdJMN;p+ADp1 zfkS;sq>FnMVc(SwgwNf& zoYmm2&DFc^nXC1RpY4tMyMBPYNIH4R0j<3XT6om@I7ubz=arqB9k;)%xeK1Hjn+Bq zkGkIGk_!TDE%%O@D|-DMW36+MBQBw1kdVMZ_xy^8;JvQ@R4Y!Ai@D>;96?P`WXe+ky$P-28~_@kBa6BSOuVX(n}&Pe!%C z5(}w8pm1PPN_3F|V}l-ii_x5b$+uLk%ps}c+>wJwqyaSZ?MY{MKBEV3kI_D%yg<=C z=_38EH0?T0>+!_irQ_Q4>lK~qGt z5`1VsCL&N?C+fGQDpQn$%2AZB@jq$e(s(k*lnaw^A#a8&OFNC*bSxYdJ(9{Fg=!Ua zc)wz7_OAUqmW<)6cjcFg^ZsyY-nPWg-suo7M`zR~vZ=D7@`LTI*+qYvzK@esZS($@ zzez^6`bkD6)>sey)MI^#IK0D2MiM_chq4ptfN4HWR~<#L1^y2pPCpYk=JAy)Tl7&3 zeA|3z?q(OtE`a`SC5i=*s0T`aM{$vu8|*UVHl8VWMiVOs%TCRy@xCe(MKiFeWsqoI z%@%8v_hlGRi_=)nD*R(^a1WHOlm*H2I2jh2R!G8st29FfzI_30V`YEhH`L+n;V~$* zyd`94R;b)?=cg?$dv1YMR#(wL`y`2Z<*ldaZ zW$~Tnl*-etlbYfR>?I|_mk0x24XPBxaE}UBdyHciVSv90p)MViGM7;5jfo)X>MJ{O zHnMw%{OEWq-BEuCDiMbF58-at^v@wsBvIe?Dc%at?bk_qHRR#HIeQdjZ5;?1WJy3) z_-|rtKg>g$NO(V%tkj0w?fFDNwGHVIHRy{mA=IarGJsj3`Pk7xM-xqcDSBs59Wyy{ zGK3LzN3f%8x{Jxk1gnC zU&QtnTkK6zj+sc&Xy1sfzLu3_Hl7s)Q|#Vd_yqCo$Ifg~f~%Ii>v1)dZ?pa=NpNah zsyHm;XY7`PKjhfiDEjrv}uW67{jJt-@?O`Sp*W5$A_%M&icUNDf~EG){-nZ)X|rHy?km6TE9IJPqN za;q_}-?#bb_wLw_cDJoYs9WBV@Q<Iu+4eH|+)-Y111+mi$pWbA5;@h(AiNL0U5b~CH73E%{$B+4tf0*55zxU;eDW z@>$-nm8-`Sdztd~*A7Bx9)2}`va#_~W>tFc;E}#iK*4>k9$l;G3(GziIJ(FTby4|F zH}QFQLDHfxR{i+A@I|7!5_^WaQieaDNo3 z;l$eYAI*!4!WS!R=Py_AC9j*N1O;N z)_mvD58I1CT{%4p<@KdmtiIovRwcA3PJ__6FhfG`6IA(L%!!X^H(+~wUVa*lP}k_A zMvvAR*OS@?oIJg;dC5%u#6$TL4*rdT+yYB4)e) zt#m5H#G&Y@F_a6ZH!WX7o>2C^5c8@SUH>yg^wW&;I8M{cvG@^;Ea@ie`8;;KcLU~F zVh3dhRZ&m8Hr*1AKnjJk(ggFLAYVuZ$QQBz$!^J(e|`#1B^}nlBg1rb$Qk@ECD0OP_r)K|3?k&Z=j;`|W~GH=T;1WY0x)a&hYYZ!@^YYqg~C!xk2i z9!ymb{1|?tbM;Aj{p|`?n88h1|VIj+K-R5t^AxfyD0K zIJd}G$sYTRUwOCu5|vVoWR=1L2`+z$N^lxJ-L|=cDH~-P?$B~yI^$(#z|{=S3q%%u z-+q7%8HGktuv;kFMM#!ChQ>@0){Z{sr;-qepe$#zc^%1yu>I?*vfp+~0X8Moe3UgB zeN+b(t>IXwxd7S4JkNB>R)Z)B`X7t?#!bO;A>^+TKSZvNjg)59x_Z9n>b0xrCPWtq z<+g@R5?0rMSg^!7*H@EI@3;}xcHT2qEgxc^ouEs$KceWjkIcg!LTQYgw#9WLaVB{< z`h3}c4i-_H`TCAq(y{qDBO!O0vQC47q>>?=0oQaff;;67sYE8_hscIE?Ub3If?n9A;8n(MuD*aAGQ;3Q`*;%US9lF3 z>d5Uq`e&TGO5#j1*g@Jh6jtKcl@web!ahIy0wul^tVOF4@#@a(2mZ<@JRcYuC?9uV zx9V$~>`PC7BURRRFD2YL;-d3QDN)auSj!fC`iS~1z4h8ek{mJzlhtIL_$PqeqwwKC zb$R3N#i1HM`wPdv-Q`b8DDF&w_wh}hUN5cuy)xxE@qN*QZc=#?Ju%M5Eux8Ea> z?DQv;A|NiD2tebLz@Q6v-Up`|#SH-P4hxY8gr}KF+&2xq*=Q6%vD2MAcm|Bah=9f= zH6&gRWy1tOJZdkP)P!g*oe|8vbTN0yb_WFSt_OgalB?jOk2nE0QJ=*FWJ)#f1W+G;=Lb}F=^~Jxx^WM z*(5~7vf;P%s-P#a;R{-nD|j%ePJ1T3Jq(RVS%Mg^SrTz{>RTcJ=pIoucq^%#n%U58)U=4!ElZR}N5Oo6Yb_S;JHR++(YxHukevgIcMC zOCB)cT}wszk95jhFDMCQAAkwpM%e9NP(tm%nFO`K_F6-AnFOh0xJ(JZ#~k1AVzWRc z>wUTe0_6!tXrGy2xl9HvL@Y!VseRNoj0|YzuL!Y?%vQv9nKWIP@o?wcp}f0$FS*)b z3~im*v#_vyt;i8zfOUL3XF7#HxGFUao2kl~ZB8?61$b3VDL;$^FS&TdROc)Usyuq5 z*QC?%Y}Lt(s2b8B%^dCJLJo&{pGad%s5rW>j|EDT{aovsc*dfyqWEfX$NT$-ZgfpD z*EM0`)O{lITGF=KT!GysUh4Wzc5XrMuZkF~xKG#j`GiDQo%rm9d{JJp8UyA=PRr#lo*+P;l!K=G+gMs(m1Rzx5+i}fYdgdLzTmeauYjCI z$+HRmj-`Xpx7hQz6(!3UQ+AJ^_A$b~_y%il=lNoAD2PN8MfvJ_%!W4ll$Yvx<;i6F zqKtQ6ynMCLn{=!5GMTMe1Vq&Ai9NJR8({z;%i3WiHsL2zo2 z*eR6bEi!jttA@;3^z4TeageXLP7p+qt&YPuBFD>r=lK%y>M=-2%$Q-+r5row{$t7y zhpxX5OLX=E2Y9xLLm4Z19}0!W4BdxX-b~wi5Of_m^~>XJ5N8(myHa!|_Am~(Vn0;) zlD^IL`A`9;z>}+^Xu(R8`|)=*$H>Cp)Ml$GZRl&SjonLmRDLd=*|Zj+ z0p)1!#$J+)tW(_#S^U=)8o8K!`uIgKOBKnCl!;X_>C-O<3c@j#aAKE1jv#vvs4{}1 z71s1(^;X8#?m)hm$iUeKh&g*UmmqS?MK}DeL|vGlp*D}z{gggK_EjH;{&luQSKHS# z_^TkJf+c+062U=FHJlqE7=IXLsUnpjOZ1v%?J;t|;t!RWe5wS;i6O&BWO&25Eh{Mr zv6g2b@#ZkVx%RIUZ(8O@)E3~crpVhOOf#2KzAY@Jqzs$wYWEN=1mq}~g=B=d8a-MT-uv9i)-PLsEW-{VpiRiC7n zt#UZA4W8j>4|k03tDE_hq@MY~)mBitF30~15rnzrlX(VxhJbB<}xKw)mK~hFTaUY<*29@^AAK7`q?wKAcsZO z9O-&>r)PnQWTm`#7RhV=&YtR+SW zri(_m!g0Y;<8Pbiya>p;P13KYB`k1J&7@(&X9gFVzSvD?-T8BbRl3X2lrpDoBgQ$U zYJ3_j6_7fv%t`#!W1m2U$3ERgwBA{sv~v}excPoxB4+Ifn&H#YUoyF{*w0-YO!|0W z6m?LOG80_ByeHi6R6R|om{ys%D^#hFxy?CCc)D(hc9j`hP|ZF4at9YP_y`+OF{9X3 zmW8BLKWKZ}{J^1b`VI&8u??<6>r4Bf+fUs)bL3m^W~h!yVN7#Z%Ghrz$%ypi>s!X# zzbh^*tXeB|+zZ&!ofSLVaCoMPN$8J5iZ{%|lq%V%c;GGm=05VyuKV`AuniIm6;tfM zoHpo9$_9ozowHw0r{Sf;q6aO6%Gx!7Ur!s+*Qgv+1x41fTZRBNrsmMhGJK-|scAuO z-R}8;jVk8!?(1u@ERQzhXLmr!MI{O(od6oN^xh+*GD{N__sXG0(o8^paV0?!%W_2z z&?4CIZ-#9I11(GR;P=SP;S?=zr(^hrpLzXzM#;EmAS~$x3Hs>sIlMC-yf4gRS$^Hz z-yUU+v>SIgyj0y>R5Ggfz;p|*8}X}S)C^PFWR+6eBgz`_gNyQcgE}u7=`cf;HW#1D z{C<)CA#!hQ1f-?A5qyb_>UsB_n4cK3p=XZ9KgN=vH(SvPkJ_K+*563HjKJ#3b93#Lnxgu zJ|!t%Q{43ve>2Md`4Wt=6_L#q33>#Khqct2?y1htfYGY5i_F~tFYtBvgG6bI!i!80 zMm2+{_DYo{jO)4*Zn?Scxd<27+?lh?3ojg#i!L0$&=_1dPf^nX?&xrIpfguc(Or=o z=-?q+qK)m9SB_b=Hz5P!-OLpqxqY0{IjctDAgRq&!Ka!PJMclqux-_Pf!sDtUf(1VhenzZ>S!eWjOO7owKeCFjH6FxYh1Q4#%&5Y^!t)*|c<6q*Ou)mc^V;@8&xKEg04oYib?=|0{de*O^!_m)IwG9@N7hK{gS;=ywT z6b`6FXCVZ$mq{5U{56syp}&)Zv2iEuG~PILk`CMXh(ggl5)$eCNshlex%DWu_W72f z_>-~wZ&#@$nTX^U_Xa{p((|%Z#UCtx_{M4qd(zd2xP;(90oc2? zLEPmz3y`DAL1=1;QdJRW4E9!mOPplpFuCX+8OKC~y%oYVKb7r0v!Q#<8k_3imk380 zqYgdrRSx-@s&7&enTx8yHk)cINb<30n(z7XMQqZdd2#dK+ILc)0+;DC15og~Ih5C@ z`uPBXXN^wThEl$M{Yed%`)Hd|)rU*&5Oiq(ay)@`FS(U_SwG)XMnVA1qBsdiqH%tc zt^Mf^?r;3Mlx@R_dCP~}2m2isqI?%4yG*IWt1ttr2M1svxvB81xk(m)MhQRNL=e<`%lc7f!5t*l%`Tl5{qU9FE?n{HC9!EO#YcY4~+n3si|i zow}iwS(8?dUyh_6q`xu>wrG{dO^u|de;47@D#fHS{hHwI&$n1v(+?}$*cuEt)avw( zcSo4=w3RQ-%kPHAet!JU>`s2iD1oTVQ?#fy!WkTe&YW_!??Ai9?!>!)OB@GBVY=mb zTa39A@8w}4W}0`ToB0shi#Ebp9EHqx&Uv;N0~-T-OSUqSuU~csmP0Iiu+Z+cK^MkG zN+8Jrw+$muIul%^pQ7DwJKMQ6XyOhiH#_kJf7uW|RN#v-8ep5iv^3Prp-wg#YV%Bj z8DVDlL>AfZ%%}TczqIn}s4j;X?V8X&RCr)%m?XDIo&1p8pqX#sJfnhew^L|&V1JqY zR($l!rCNL_=NxhgK zJPU9I>E`6yAOx{~nkP|<4XXnAN#yL`EawDZ1om68na-nin5H`VdhoN~>bh*a5~1Y= z1^V}eE#L*W82CMhNe!dl>mKRdQx*N`X#jiTg-HX)q7G&>b-T}zdOSKyL@sZAY83BdR7!J7a7Z~|OI#{Y{GfbX9ne*Py|nTMN?<3Gd7 z>GM(4JkG)U8}w&09g{RyvK>z;thv1Gb^Xbo?dW&=V|iR$`V%Rj_lMvL=?irn5kjf4 zn>H#K;v+doE07-Piq#lzes=ceA!@g(eLyJ;sUXF z^>ZuQ?;fk)dFG3wOV|(jsLC_3f?qoY(!PyXJLQJ$(e>1x2&&dxr$*OfL!IZWFI#pE z`?6R(hc6JqebMdSXDb`OzWzqA`t1r4bvm(9ZoDlYI>|W|9y&TiIA&fRG2d&|Vuqmuiiwpk1N zKZQ3QYAL1|ygqiQKOXQUGbD!;#8BD#Y#+N%N#B>flcLV=?(-|H&G@p^Hn3lD-v~!8**!yT%mLKLM;OGf>Ws(==s|1o-`UYwEC|F9I zwa8`ta+6{a(K{3_B;4prgg@+#jWAnfa(RBPDEa(eB zpJB+_R3t=sx1ZmU*Yvt$_Nz$>1?LS7^Bf<)%Gd;B`^T2!h@spw&*1>7m7If&N5?q5 z-}vtHtuL?*TO@t(PSYpgaK~2pbU<`Z`7VcDwvC3rYq;QFd4uo98TPJN4*xK3y z7WVsCf#_zlj*dMXG9I!oNJ22?@Fueavq2RNYN?0{>hgCxYmJ>bEKOQ9y z@82IqWl|EZ=6{zfEJZMyV%-}&=_i9whSXMqvK8igN3~V9XO^U`j_X%{bEff#(64nfG zx+^_O&F`Sab?7f!M_;p(7zlP3R`=u&k)rtF@I|97V0}yqbe=y`u5v|=pNtc8c*G2FSOt-7io0k zucRgN;|$Y1x8pX_yjLU3m3)WG3lCx+4TXHBda`vIQX1GI@C4i89pw`r2>wit`_>j9 zValwrx|a|vH1VS+X{hx!pH=nfXERKBUmk2d-OXv^QIPgCxU0J9=x3PxQ&ci}L8keK zxAeoCxLp@dO%J5#Gb*(lechRUS{p`68nU%_s$mlmrdp3 zGdT2cJ8rzaPT}Y@F|f7G_t@P*ZMq>#v#+Ry8esXFe@{c<1w>Z3*zLfejE7k&J;%fNIO=Een{R=h*4Iq&(l z8w)$V2mHk2TvLUHo8*4Kj?_&rtuMi=JC_8#H6ku&V$6-wMJ{Yp`%nGK^U90zVirm8 zuTE-qzg+_BX-P)tF9`K>Y zn3qK*%L_v73 zkH9=PS+_M}cQgZ?tZ$9;jMul|b|aNf>RS#-|3|&`PYm~~%Hul&sTI9qaIjrWVFFRHSX<9CFqh5gjdtby6Uj_Pfbd-{vMEd=krl?Zm%F9#|<8a==5GS~LJ zcX&2u^qlR?^#=TNklt46x}4%8%_dB}BBI7Iu0Te8H2CKTJ&>QKSd_sjZ#|H)_J*cK zbMl8Dye3WM9ARC_KDcO{eH3!`ks5ew5#e+TL?WGu_|_;v0)L*%2L3q&RCmggS_vFi zLj?+dM8QowKynd5i!GQ@eTYj9EMz* z!kGLlF=7@CXz_conE<)AR48VBCP#9#%h0h;Z#6@Mqvi2;!Xf_I93jTI6=w~WzWpFf z>pO`lab{*LE*AJ|hlwZ*x$`}3*Nq$|f=;XpW1vcu>f*ti*oj#vYBCc_TQdW;V@i!A z_Y1#2cn<&O(vOkk&j_M51jl#cM};tj-O?jsLx($Y6JP%hdi{G<4RLJ`G~+rGGZY6C zz5L#h?$6A-Nvto-=XbI%6m*DrX>n;aS@;M4l(eas6QF}=H9<@8RZy5*UaWr$L9O`Y z#umQu@`E=mb|?Ee4TDvb=;s;Yvcdr(0_9c?--u-%g5+I}CshoXcKu)2V2K*WJ?zzWj6X4|ZaKz6{HUtT0-5?zwBx$*@7gD+zL6ce ziI`z_4?0_5ri~xtLS@oNt8gu&MuWkL7-8`3LH!G6!BdqR#kuce*rO?E&iIq)LZ=y( z`KwQ|KTh&W@(qQARO!!h+|Ml~yo)#2FC#U?zM+N-(U(bpqbQG=KY(!SmAGP0GU#)J zjHy$|*~#FI#n9=aWq;_Ejl>RNCw`IrA>RpXxGU7$ANs#FB{$l}m_!Xbh3JG}6EHA# zRJE{t=ufZG&wsH*EqRxAEuA;iaKBh-j`KNYQ*Eww8Xlqyg72gq)FVa|+!v7_WVdC{L&fUp4K>Pa81IXfwV9sBQ zx-y@yyzW}3(uEjQ(-K7Z30Y%UGyUx+3s4*4QirBM4IkkqQ3#N zwPz)A4U&5Xnq88sXwgwQHVNjuA&fZ9$KosAYy_*%K0|DIbRdi!iY7M{?^A$qT;jBxFIe=n}FpO?d_!NTsHHyLC48+Qjqa4%w;}oxQl^XpGhw zAsMzlT+dokZf!1@CZfnH`HzsjGuVBxc!w5RAciZtVrGAnzju~Pt56M5%8WlaqcU0w z8C;T;tgchz1ah|L$B}zC!dLr2=NPx9$h#4W2-5RXz&5kmuFA{nMm!Aji#KNle@@vXMCiTACc|q zkOk6lI!@P;5-2y>W=@OZgKH3$d6mV*flEX13`j;hjPuC0q;DRqY8oxI%`ml&FzIeL zs}THXsQs}u~EHFY@~zCYmCoam+$trij*u930uE&3*J1UZ64+?M|Pw9UlqyA8x6y zxxIJ7q>UAx_sGevIfzFLjZ`-ds{#+OD++o5o1J19V+|1<9UKo)@wj+h?%=j2rbpcz z%ldc0sN~%qT}Ie6kFv-KjzktdqIRt?WQ=)pW{>wSDV~!(pJU38;v$uiS_pQb3e!}b zg{!@6;IUktp03Ip1|t30EJ}6uraG=_TV0NZI`5-k~q+6?SXQG8?-Tpk*36o|}>)~8=fQ~}D2;*k6 z2;&{H?2}+iwAyXquiB!&7xu48DW+)anz-X~%Ol0(r+O(np+i~4wx&}{vTNdjwkt{# zwJ)u zyCY$XFYQT*^+@>sXsiRarb$b$*ThxPmq(UnzDyK?&Qzy*vpQ>E79tyeW#7W(V^3NP z_^3N9&eRqrIjMd5c)5WaBwxX0*|uHT1`qn6Jd*KA6C z$97n2POTN?Q3e(h%S5Sbw#5(wF?(+J@fmE?BhH*mG{!t#eyAbB41=h@ zs+Zo0#y1iby8|D+hH0rZ>8~u2q@KS>}E{4f=c=|z#oj3EG(iGmTA?@+#B3AuO4^u|pgC9ZyE$N0nxcCXnh~=o!u;NeO z*PIxA1DK|NIX5K!wa{ok^cFz2(ErP=0p3;Ljg38deVujl&o@i*8ZzoyvWeBHN1EM( zU~MmA$fsT@S=R9Tkf!i`!m000kKhaN$!L-79CrXd?_>X{wLQkjU;XYw{%94x{f2&G zMPKRIiNMv7dt9c7EVha}j7+vM^HD*pGsq51*6|?K+@!(=(3UM01ymi$&^x5=Hky$G9j4W_IbC z-6)l}gC&ZRBojQZuPCvn81#c{4ft7>4UdJ_Is z3{EN_H_Yz>uoT;71AwI{E}kfh!da6zHRte+%f3!Rs~;1&JMyX;QL5W_Z0n4XR6wCd zFI&7^3sR_$t=C7E;@@W3z#AInoqtl?>fSdrpiekgU+uq+GbA@_Dr6g% z<2=bCz5ih#>PJ87kPJI}5?^%~qfkDu%RpDHwaPDh^vN2;Qr9u9KO%Q0nQ=WLVy9rW z!9;jji|1fs^TE;p9=F;$CB9mNyt9g@{{UHT+9uiiF5~z-+=w2`f^6dfx5_qbeD}ot z^A3s)L9M!>9CP_pozj>f7;}+leCLTy z9ZR}9d@1Zu1OwRbr;+?9S=vV)>cAJeSvY!K$UHdFvY2T z#EgKgJSpbMHkT*Xsr!2?)drPwJDnjqu(EKg>9~CGv{+RVHDEQZl0Z~J@IOABuF6~F z)XuK5JG}!$uF9@a)7c{19PCY&0y=f1eA*%~bHub&a;<*lix@}>Y`0H{>*Mi{o7w}x zz|Pvjmv1b^mly4u#CNsRuO!vg9I1ST_E>i;;+mM)4em&F9SGtZ-ka`(t$lG`lt2L` zPpl-BAGzA`0TZ&v+0OE>xvbZ3^(78nuODW-!%hsi4uj}Ik)}ojl-b(qi<`PAq}mv$ zgoS42U!E^h$kk!#?nNiZ5n;~?iLniG5Z94%DDzIU+wmcVkntEJ8*jYgqJb8jZ>pnW z_u<35H^w`u=3nA4B|u|M7DRRMEaM$w;<`QGkTe=O@$Sjm?uu8~Sb*8_`YdAs&X(IY zR$qWZ7|VsI019E1z10_>5aMw@wc~S1;V20m8>s;L>ljmao#Cca-WZEsQO(^9ac+rY z(yA;JrPQ^lILy0=Ze=wAhF&}w3f7xbdoKN_P+#T~gP|o*uMfR*khXg8Yn{TO6Dk=w4=Y|=c`??igcpA(Ng}MVxvp7F2Q=s8_aST+A zQeB9-(6&Y9=e?GhQI8=5;V!;mS@DctwdHo2_f9UEDusrs3HhE_j-J&{+5Ir<`*o{R zL5kfO##azVyO5wFH&dh2s4;dFDs^4lP=f#Jr=e<*azgMG*mhZTS@M} zS1=woBU2d-YNpw{S$xM0@GP{6LAAVWE6} zldzV0+5Uc!f4sj`*?pMu4k~f2@Ox!>;)S2T{H2(!ZDYTp64oNO|7SVZ+yAp1q{uO8 zNnLOM&vGVjBMSdRh1aJ;CuOrdwe6CN9Dn_GaqKL}%Q(#N#31h75gaBAd!5Wl zOwKoofLkM3DZ@H1&8YA-8LOvFMY%q`oE&qqi>2mMh7H0W)YsYRq zd-5!dyQ~~=Xfs{YmaVw6(f#$7Rx#-D^bQ|e`?e0f=65UUoaDBN<=tT<@^P%xp5w|u zT;r9NP0C0Ns)#n5GASu_zF$i-A1b1e6AgrMQpiFToqbp;;Dt%dNLL0!27mbqC+GZy3qKPFfp@E7qi6<|mzTdLxe5 z-T1w>lE&d<<)7e`C5|xVEwPLKSt=cc(5?rS-K5XVQ2w%Zdq4q6`BV!`Ymbxhjr&i7 zIR^ni1GdrpnEVuWPOUsJm+AF&L(!svQdrR?&D&o!46!8jtU<;$Efcyn${GsX`m{8N zQ)@VEn@tvJ zuR}=%lWTI66%3lccx-m_`IFQdfG0^Hasi(75b!$6ZY?em&n*GE<3JK1_T{Qil53E% zCJ}!vYZCF-vZh0GEo;cKh}?h4TDB~ZHBc8u{{W=MLstr&bO6`^!vp=9EK0Q}O*NEz zEdlai?ka_Dj)A$0@syNAbTeKmJ=VVD@kUH;#C)&D(H%l{`{b)?7qfAOkw{WDD3|AUv=xVZkj%*IK< z#{Lw%(Z=!TH8w7NOjZeV7gq{8)Bo}|9p69S?fW0y`h48n|H-XCm<}>6H@}oz++f_E z_Lu7yz_^1xB$;D5d;9zCk8xP2eg11#w?7$y^fcc#w*cbvz0t^%yM(>}PA|i{h1=x# zTkgx(dKZg}g3;}hn;C<(8svVzj}cei2b6-S7e5F^5|6$o{TP;Ey{GAC|Fcr~@~nXM z>heYORsNJnxo3MuRLfOe^be8^_}rPHPqu2q?ThnrKaV+)-^Z+mzUObh|3X~(W}Vch zks|}OrGwa<8K*C=rVQJC$sA>mV3wY_OYx2uZ(-w9QS}$Iyq_ia8~wg){5nWtZNDHU z9}@9Bb=mK~1N918$}AeyQgvd>>tk*AJ)M7b`sIps3V-I6w9rfiu7Qk29Z0K2roZ^9f|hRpK`WhBb7_C#Oq(GeK@m4J~X~ z78iY{=u64WQYRlLik(A!9Oh`bdN>Z*4+NPA4YnBANdLg;HSLl$Q{2s7r1`cl|90e0 z@He|*W!c`k!}bM!d?Ui0+<438{u?aADY_d^MskA%q^0GWJlEcS(k)B-th2A}WaiDe zFrH1;l`OPD**7P!KK%`#fYm!D>u}L9KH+Xk8)K-V+8|~HU3tnMRiuygYP!fum1#&b zIFwboaH}B%xacwXL>4_f&}@%9rEpsP-uEivO_0!{njW>s^UAgwV$$lTzMNlyFc*J} zfeKRAYV^mi-c-bk1>PdsT$_xT{MTYS!x>*OicaRHtHWzLlh0X|se)&R=|A=H(Vh#h zXg>l*j<*MvWft(ZLHb|v$tSJ2tC&llefWE~3Qk-lH45g8#2?!mgZVVyV9d2Hje%-W zs+$5L@a<^GOlWP*$bHMJbmk$`TBb@fo8E}y*t=Qf1hNpcVO2Rvn5pYMgFP^%xNDhX zJn7cc_5!vVCkgwN{_!DpRnQ$Xj0gR|3IqoYs$A8})l_6EKvEeBdCfOW`lwZ|*qRLD z6J}d8H1fdw{-;%Mu_%Ey_?KDF2W$uT-WM@>whFa@|8nXC`I~JK17d^G76E#^=LX?# z!LNKejWRZH(+r4id;;i6o7>fuY_#14bfqm{#3*pAq}Lf<5@s zIJ20v_Y$b7kScm(+(Tzbp7#E2%_fUdEtL=W@?i}oTdAFi@SB<{5^&eufsRBxe6_LX zHn$4FX#<9OCme9v;CXF`M9Kv$o<~O_r7~s>=Ve)3oMb`@QnyJwyQ!>F9TL}$t6U|T zpz?+;?}>6#e&`s)v`B^FVIC*7+!R)}D}IOy@k8(c%1xLO^t%*tt^Rb?`U;D$N!dna zyYu9%WfK0j=q>dmreR?c+Od!58dT#VKA8`d(#X*R4^*dI9-eKU3j4!6v%lK}KQE?r zgUS{|shZq+3k*vMxX{#q3r%yfaWx3>F>xAr0jqlwiGVwnsIkg~X{U5aZf$4=K1I+l zMrG!d=N-d%;OMS-rpu|>bPFKBFN3L9F^f_eFKCypt?l>^n6i8_U{-2A6Ia)wv^Rzr z0>t*5?=3Lp?P!5d3(Rp}V91LBLtY*j@-Se?=K@1MG%zK`Y?ax?fJ+@1Q@JSWV60Vj zdUi534$cZ5>~X3!5vB#mkt~!3$(2m9=c!93^ja`qx#xB-6oUpu@mb!*71_E#ZVe(PMnZOt-e^QtK#?vT@8S&;*!VE zEL7RZP5}M#h#{C0l~%Z8^2N_^2$}cHDBZKK(+xt;0O0Wq=x}QbcjJKawH9(G?$bvM zh)*ykczD!+a=_2?NczYM_<77Fj;w&6XEJ+j6!>|L zr2u>4(f`1kqk*z6Un4j}I+_DfELWBZ z0;Y#}I1Ge3ujos}>=U27#a|=PRW&q{mCgqc!ke1eTO*g>(;G~F(enk0&q7w^ru-TC zboI817u5Iq-{_lpqe#3N+|NkKp+*B2&r#XtC~)z_6>cJVja5hFAT4?% z5m@wU->v>w^eSLDf$bCi3R~^Z6_Qs9Imu`@s|K~A%~7|=A3B{mU|b8;z|Vvn*XZkU z1;3JnneuySU{dX13C*O`>X)-R<)x4Thg2vdv_yr}qsDyxs=7};)u1E>YD9leapvnt zE(E(%tQgn;W59N3I1w)fpjS9!&l_1_1W~WAq>cMz9x!3;&1ye$xnr5PTbaStugqs# z&&z4;p7w&wN$MK@Q`e&>Xaed#JO;{`=)7zXye8mMk5b(Q*h64n(FD$(E#i&in+3oM zYG4n>PJAtch7TNR2?Pro&9~`k&VuVFoWDqH=}p@IvE_Ttgw?{TOLeYB-z^#hhZ&b9 z+|aO3GO8522GQyZV=xsktbp(DDdfGn?oA!woH8*lBxYD{D5<;UWZS6!Y02Mx0t|KW zoonzU9qk%C8Njys0y842`|Iq9P2nw0B%Xf@QNfIYtvhyup_AQC77a;#3su4ZSdaZ0 zKGMAtB=-#I-g*AVy@LthAf$~!Tu0UWG0`8o3w9H*ygg*OUjCCI( z!6OrhHq>4gbQ=UdV8-$c{*WwV`P51sK#QyEjO(aa1BV-MiR;b*ybWpyqAT0>1Mr9? z+Y=B$W#+#uO-0ZGv-LBW8ByJJ3*2_H93SJp=K~v#soxo}T}9pg@NN`vqQyb7Oq-Eb zCV$5Lkwng^#DpfDu2VDF1#LI7?bHTWv z(;2(=^Z-x|#%bE40=!c8fqDL>NH;KnE9krfkO2Ik!U!BmFCX;iB3S`&+Z)i`^{%G^ zfGNdAHSnw^^hiLB5oSUJTqK&9U|6z@XVuXXtKu=CfM2mZIxxDD&$)o}Y|;5p2g=+h z215m-+a!|^z%w!Ay({PQhOUR*?n2tp*DH|@c`o2DBu)1}khC}poV+Y!UF6zNB%cTc zLlsU3@}?t&4j^Xtu*=_oufX7%4PFnf9SL!r0Kl&S(01+F$>szzAuv&{8f%t}oEpGz zz!^t}4d#SD9jG81oG5474f7pSvL2{dqq+m<1k=f&KQt7&OIDEf&FYKus@bU)l=)gI zYHb@%^wfryU2WPsl{@!**C@W-T_+E)Wjsw8F}PZ^ul@1nR2)(|PHU-=-o+2#{0?KT zeW}NH5Sb#a+dIvrZl5FLRi}@@j^({&rW&EiYHB_P%Poy)-`#&~bolDU;>|ElMf|bv zX9fHJ&c9d937i)5E6p znaC7zHS) z@7P8Xa9TJYlRWier@!0Lcw+EgXrD3#Y_Re*`~igG6=3)d!E?hO@kUY!?YX=Yj)-PiTy^GQrU|&GDiqM z0D&w7AfI&u$p4qvjyY#{)+3C;p>7EI%%;x=@;R$sYlGPKG|(uz4}N@ofXhnvy*O)3 z=PB+2Yc+aQk?sk_nkCwr!iy^ z*^pjv?NTUC>eT3B3Q)1_^MROpmGO=!w~$>%L*S*lNFI%Hs?z`DwrPy-z{*hb;xP?lNN#8lLvO(u@%mE^1^PW6o5{7G)n~-q#1*7ALwXQH?>wd8uc4}R zOno@y#{OC;W8R)zg2KoYlkO!<7K-xIZ1b`WR`%!LUVndMWcs!kz~Bl|ltD(O{n%bS z%^PLY;RH=#_Wh?TA!5o!EhOJ7yKTmQfTlB_scMFO(>ml!w|jM!4xLL$kkFT`ju^w- zp4u^tt>lk@C#*GawfFIJej|l{j#rB1$L+}<{yFh><^TytS^8<{nCli(z>m6wiZC19 zHSV}%>$0^nR~8c+e;pGI2nFY~8AI%YQA~Rn?1qKvPNUM+*ld%?%`qwZcxDOEfunKH zUn&9zxC~Rb@3VQ?8Y??212ky^KYN=bE9t6jAt6IMi5jBokY07L1hMYW5_cwT2voSX zw!xDa+z^=n96b3(XigG;gt+Iw8$(N+ryTJKZMujW(X{-u0zT(=eH+#-XH%+HBOvsK zq`rhNyZ9D(>N=^%nW}rJEDuR5l+u6WI_1cXK$p`HpcR0_DbGJY<*4>RZz*BXrHUUq zzG%vYy<{-!iKWymqTHQALnNO045N(6UGoy07ui-$Lin1BAZ)kzZ9$gJYbvuIr|MvW z?i+~)UGJ@b3NEQ@*FOY!r z8lXVT6TYDGF_4=6R_J750&vKHY+K*~Y%AA-ShQ>`RDpSqw}D#^emx+-TG6hnhYv%q zgN4vOk8q0|%c3N7kCSPcCY`?lpAwW5oo7H)wqJtPqBHhN8P-^g+%b4i<^bqv6)6mY!}_>$C=VF>uHe)>XfR&0y~+-lhLNMneAtAl12#2kkF z>Ee`78u>R$+-5)>4S;#2uDXYOjrdWmlb?)A=+Z>VFXse2n^Ec7vtv@M@t1H`#TvDh zyN8iEc=TCM<;0c45x3urg(DIY9(_<6z}grtp#pTZtZhFeGxIYZbSI|TG(~`eDtiWS zP#Kef?^cfu?lkGHdL(gNr2~&Ajj~gg9I=gT?-0NQsf(pq=%pX z2BjdRnefqb`vXdWh6-U?baV?W0|W$m;3`Nj50|H?&){4OswZ=i%nZ4yMeHlVRJ;Oa zFA%e1xg!RN2Hr@y#2KXByZca6{6~4x6D+lK575x;CD~jv`3Gjxi z*5-qGh#ALXDV`NPOE&|i?DS0OW)D0e_=;C!Rkuw&@Gf!fRlAs)FrRXmeKc#NHR499 z90_Cq!)cizyQP-s7%(mCjU1^0re##V0K-}z(}dj;!p;M70j+Jk!e|=M+76A`Eddan zkwE&_M5hGEl^DxmGV2ba$~1%ML>f5{#!VpUz^x*SK5x~W3Wpdn>HWq;{7T*AlOpQw zn>}EMvubIEs@#@ zWeAt_BS2Vl!~y7}C>ct?`OK?)fCAYV-vY4HJ})U`XJ`O6V-XdAUbzAc-3*OJ3Z~aK zzrB5BqJxZ?%*qtkaR zIrs5v#`8+RtTI86SPhs}v~?CGInp){U51d3?qDh*(=jg}^&OVJA}VG3E*(>VUd&F+B%o++x0gT^O(5w((QJHB zG>s-76iuxMMRWHzMUyH%{N$oZ4F0l(5vGI^G97gSpawO}>1x5xT7WSVutNi8#z_cW z^Rt%JG=daNBQQBo8#8LcK9f@QNs6K4jv_O3j)yMon^#Q5_RG-A^2i3=T zw|}x^9PguobmbX14f_>3=R1SP8E%1A>xAgYM|uKOu7c4$Jtjp7o6y9VS-ops;2Grk}g~_ds=bK#A&{+S$H_F$d;D$l4snQGCJ#X>s30qrN zCL+KWwar zrOhC(jo=O@{4i=gjeWL-jXU&pC4O({0vu8hW&EGFelU1(wUmb-SoX|Zr*(0LLU2j!lEFZ=YtXc z$$+N|wO`B>R5Ab%n*ac@2>=j>Ab(8&0OA1Ot^@!e#)0Ok)MsR1dS$X^IJLy zrYFhV6XLX3DzYo54;|M95m$_ulUq*JW?C{_wVUuIub<{y3sQ030seCKO--bzr^Sz| zyGyN`vztz1qZf#-;t}#UuJ>#*q`p(KFqE#W2OV5P{N%16esW=+q;Z3LEls2>R}C|R zxn*H}>nqJ2zT7%|EFL}gh}RvrGL@wc4ac{c14DiKEg>qm*-9HL9{kSRkM2 z4x_C+e)C4-rPW}QPk8cf8;?^298|-3JKfdnsi4q%jAgdcjE8n=!!=5Cb#PpW@!Ae| zJL-tKdZ0Utyfy}?3frPre!9f|AdYZ&SM@2o!?UxWMSJZwU0Ain18y(TD=N=EXLd;B z?yUV=)OF#}!z zhuZI?6^GrsPc?1BO*DrlN60$n1jJ=tk(B1%>BKox?@1ZtmGX5vq@tg$)p^9H5ePo+ z#x5?UV)0siy8ezvr=svWcRw}SC`Lt7?!$g?ues1mL3oWcbKj$%V)@_WZV{|o^-63$ zW_gI;vAW(8p<1{2PGSyEa>B zjcVX2i0^}$yN8^2?smN{v3}AZ7x~S$=z1lN8Cu_=Ym2?P(d)&+S~5+t)QZQ-|B|H99n8Illd;;r4yo0Gv8KHaa+H@=Gr2JAD0tqgd+m&Z?A5d1oopZ0lH z>_`V4`<4~sVug>QK8W|L&|7s@v_`>1QLita*X6s4XRk5U>(S3IcG51kgPF13UrmIq zobE*J=kg)L4M0nJSx2FM?7rM^dzG4?{>bALc6Q7chS&UbWxf6YcYxugAUvGv639{rP2$j#sK9R7Kaw*QNH4i5_e+mmas zvGG85!&4v!A`e^VK_U-Z<^hz0m)2Gez#6{xkTeL-;Qv5|c(~45|1AW(W4v;|7)&X60e#f&8(NbN;q`F8Ciz2s0}OI~@mr6!GV+^d4IAp9{hH+p59< z5d#G56+9RB%70E7Ox*u=j% z5`cmE(C=L2Y(OtOEG};%Tf8y%wYR*_u)?#=}s`lGM)h4~e zWQ8f3h)s)Pj6k>1Cu%S8;l4-D636YO$2G}ubIP9bQDw+;Y*44%v1?GvG9IIj@rom9 zX_@|7I#R%tAHBR5ASZY4IofSOecu>exXA3P>RNfJSJ_diJ>z_NnkMIUKeiTkb5qlE z4u-{=@eN$>4o*&`8fd*P4=6&K zXyvp}#789j`T)Teem2TqTkWqK(KobWVT97GrP$o!Kfqx}2EZ(!Q5!9E$oaw?R}ZGJwmTI+Ys{QtBLycG z&d+`T;S@4IHBS4Q!(tax-{wUfFSyWYu8~`+w~8QYaU|||tInEMY8_suo`bCH@@+^R zwU+2b6e|C0|G@sqq|y+zUJ|O7^10PjTk%ZDz~SSe`<0^sRzZsSeE{b{T$vuJqP zOUi{Ohw+ptZAPII@vV1gs7xUthV>x%$T=<-Atjx6`@h!#e7ARlLOI==8P~Se* zu-5hCc=l^$m^y88Z}6fm>jxwv+RijK`Tce6*Xs*H0Y1K8lV|HES#WHJ9hOwq9hk_; zKwC3q4!lv0?JIkrxXn3Y$3QV2-oTLl6c4&wdjbNp16=0AZT^z+d}-9#r3{PNsvw$J zxvaPbrGi!@4mhi?HPY5+uRlS(SY;?b>p`mGjUa(UXvp{ZEwS(%V@6Uo!WcPJ~ru9TRIlI1d(MjbISK(UvB zMOWOE3~Z)@Ddfc_LjDY`A*4R$qB*-ytzwp8L8sI5Cf`ur|guC9C7rk?kz1>ifeff&`m@H%R1IF!_+qKGD->W6fQc42HL8A{0 z_==pc!a^250%086t8dIEL_JkHtHd_nRk@TXz%k~3y z_X^VZAUrdY{zhVFfFXA)beJ&D@CC}Pe+{q&hF{svwQpqhlYw!Vv3Z4K!%Ctr@5RL1 zs!$0VkEsSfhZ0xDY0K2PzsFzr=4AEiagJwiyv%ftzj{)+=}VguJwYwcuf@Kn(>wk- zM_G^JYG^?juL_G)3iO`9WLHnjKN@?zaU9hMqp~meLWtL@oey@<7e5d6O~*0e>?9ZV zIC}h0OKPj;|f%Vk;^5n7M{q^bpj(i7XvTu~V{VcT8S(+TNV-_sV_n5wrDtvouG+0GGbDw^X<~s#+g-gv_jf; z(w9@`=SJ+!>bXj<%_1oH*r6QmERCOtzPa4(YkZ8c8odqL$!~=j=wyu`970)n*URdS z=nrkt&gzZie<;a@qKoVgt;C9=`(6)9gB2wm2#8Q%4U!2E_QCH&dHN6C!Wm!LSTIK0 zpfRprS*SZ?Xscmo-r;vZ)#&0^1!_zUa?K2)tV9~(x4}K6;Zb$e(Gqmygr(4Rf>%WG{jGxCl=EkGyTHH)PKX+lX77H!Qdp=NpvBhir z$$vt8^eu%xx=o1nrDPu$ZPdwb88)J0oy>$$TLJtOUINDTiuEsW9}TKpS{uVTqu8&MrjbOvOSsP6b`9`1`8?XGfEDF|RukOym{M(J&chJp!7=OoL`O(JFspeyP^p=QgMO&X57QgyS z7tQlnYnq<#-6^%3+n+EjYVCQ}2%6QT#_o;@(zR-s9yPNMHscsllW^QdKMUzHSPlYyxgj?Rl0^LpD;L+v*8?@jiSdrSId;F5WUNp7;@SsdRd zZudL79&a)%%r8h(mR(IJH3vK zHW*tb;~e@lu{keg!QwoY235Q{I;S~QbXt8Fb8ns3s7~B8He^SfuBUyLXmj4Nl0U07dmF~>s>KM*dwMc)jQSH-5amD z;$0iWA=|wU9IJ#hna4oMW5QfrK!OpM&=rHi?A1cEP(|xV4%w*ZliZms>$dU}3e&)Y z)1%CkZT3M#B)U5KvjMIdkU9)JH~WA#HjBhq(RrCrl-$$?;2uM1J84mq zFht1-c{XYu>P#TTVm&@YB8+ac6GX7{P_*iLJS~ZM`!Z9Ekiyb}J$9PdbUgIO=!J#r zXWQ8mF&=7zNP|R~*)L8lKb)51(+x?eepQUpbPWHixs9YCQ#h--kg$2Ec=HgG@LXY< zdoSe%z%Y%ujGwso$K*Fp9SUl3A8^j1D4SL0k@pe&m zD3ZGDW7o^1CctV1oAu~3B4}gmUoyW)K0Nd5l)pdo)XknLP7X(ej?+)Z_6uc+WG;jX z$L{3QZbPmt`pti=_jhm&Vw)PEq-ms+JZrJ=iT&zP^jr!qnPnKWtLcRg=kC@g7^bEd z!&Wb!hi0u9sgIu4SNt@+c&_fm-g5cQS*$P3Ij@<-&B#dQOAymEFU5xuvHM1(<#PuV zil93fon>FE?e8b@T%@!DUgHC6ao1_VSlyWsn--r0ugpenDB45NoEY}^!m~~ZNp`*b z&ou^}-3966fdB?a0nYv*?Y*tU3nG3{unFNUZNIMLHQVKqq4Wy4s`UhENTwAxP0o>Z=L zhVQPbAJfmbzemXU5|PjGM&Ok0g^?cgQdX|QbAR2-9!Y3;dkZQ>a(P7BO(jIA{{9&6 z_kohng-ICTu)h+iJf@AOWmk#DgF%`=f<6dNL4v*&RCjRVF?4yuD*t%XfC71*6TX6t z+MddMvjnGNVsDzl5h}x^!qXbT7P;}#SXCRL%rD!SAYE4xI5JS6OlOQgE7Hy|jv2mF zM*wb#Ks%*`kT<3I5dW&iwIdh(c;7Q93d3{+PpED@5y-O#73ZI6V~c-3MJk?T)lJcGrZ^U_0BB4@MVzT zD?GU{vp3UMs!VXbv)tFNN5ag`Y4vR1^knyMgEWEfTF5rGS`#o#zP>6hdn~#OvfFYs zE_#i+jO%nfPy$@T&uP#l}tB)9#u{XPeSov`D9Gi#(~!+V#H>JrS~4Jnk+BZ9-NYd;CQHdcJnd-pgy zLHA09JwZU%X+m+%A(enyw3pR!CSeA6PCKA@!P4`AsRRf>+|a=|KK^mX_!wfp+@avH zNpuH48IZgm)M1p(qif@BCK(xNv^hb^bdZwV4tp)0BA`4p(kDPkRaW#0a=M&E z3%DKVAfJS$Gg5@DRh%={=L6gCssr?t7aT6<_Vt>GJZ{Sa4&l#OKUybGb(A$&V+u9| z2)}Y45kR3o{|x+FJRwC;?vGpOD4Q-6J7ay}dCK1Bh`|wywy!@tD7UL0;lJ??ByMoi zN#K{3HJ$Q-TX$ys^=_0f>}c0X0-)jc_Uh@Mm_K@{ZGXP-y55@|9z=!@d#`;Ux z{}9oF0DBzZUl1AqYOw(@ALuWelNstc=;@eQ{Rz_q110}sG!1fZ_TLb*U!WqeM;bQ- zV*Ce~XJ}?;WZX{l##Ze$3NLdU}T zosr$2y8`sbE#v+rlm`NF`~}KW4^HmE@krAd8G^1g*J*>JR6nxE6!!GS;)5gpczpl# ze8M$udyCX8i~Qr7ut09h^qyTyfns(Gug;7Y9;{bOW2BB$+2mVurnodOx2yB0?pIk_?=}#3CZn0@J}k329rlfJXkFbO++58TyehH_joW;Af*?4K&GK3K zy05Jek%qq^KHS+!b}>f=>1vPcOl`r_{p#*zo!Yz03*`Phg74Ze{q?bn$Y)_W*B3Km z=-qX?(ic!dUGex!G(-mcH);3Imls1cWF_6J`Xlej?wv06_~XC&mK!Xg0;_TwHMdWE zy$+X~*R5?&?6a0D(N6N}^DaTVd90SlJRZoA_aWIJ`ANv7Nm24kyIz?p1a~%qqz=esP7kgynV&Ew1+y05E--^(>%r-Wj4 z9ESLC7e$r+cvMEtG&C8}9#fQpVvCMd*wh0jSjfu5TjMbB!%bt0c$6bHK6s;2MpY*m z`O`F&PrZjz%ruLZrNbbL)JvA)nn3DDa+;XvsZwK=ul-_@c>RIpZczL=`TDVZFW!6$_ro3=@BTRme24UlzOKaRf4hljCsW%&6? z{_!vj?V+|>Ug%+21o4V-d!zB!FYZ(CvpdQNq=>7mcB>`)QH7LtOH=ZNgl=Kg_7IXn za&OWx_Q_Yw`8#JZR=li`m{ z1N?5bKT-AI6G>%&9>rRj*D!(twA5hGuR&JOKiin*s16tF*##KtyZ8o}yy+g&=HFUD zOWOw5(pVj;*az1pYC!SX1lPXTctU#|wHm7;UY`y7K|_Uwf4pct7Gy=*bk@n#fy+-) zw2oUP;grfK83dOQNo|aJTEX{dtAc*Ma_u35y~w=?Mh)?&mTJSZLs*n%qrdv ze5-c~Wou{FCD0}oD3S~K*Ig`S7m7D9Q$9L23A8|R7mGKLEZ@uGZRr^(a@a>}(#}7v zr-!bV#v~O1;*1qHKx15+uu!){Yb>KAJu`T?v_WdQ-QLVqY!K{_@&4^PG-vU~u4YX|ZeNG(EvPOgV{9hZXoY@?L z533St)-G{48Xc^6`8~X~^qV`Fq28$o-`sYD=(kCOLPh$v4L?chqI#FxDt7na`3!GV z&?NqNPZZ2hMp86@X*l&pv)P4E-U?nzHX8O&AmZNaJC@QS~+lQep~~)Grq^0 zVhSY`zxVEm*S^z-`-LczpJmlsL!%o9$NCqu_f|wI?~LyzzCKdm3iB}AYss>lAx|ao zs7lN0ndwG4_WrOnM5NtnnLbClG5e@eaEax*B;eJv(_E%h66l}f&|v}&n2%OTrp(4BL<&ZfPAQ$D@-b{93S(A}E?g21T$kY_zbwz=@>q$X0h zGALA;1WPRKv)RYfD6aBTS(LU!4u33cV~-Hl9=S*59)b3YjyykPn{ zFB6B@EpJT2X&+oFn*Lc4$7Bvav9ULg0)`NIb%O}jGx+Ji;j6}rFPuX`jAxBV#eQsWfx2(!s;cU#f`bx-E#tZhLG* z`7an{(t<2eLPRYMo*?^J8$790wlc7@m82Gy{zm!HECEiQE{dG`9E5soN9LO+fw#m} zo4mcMl7kmn+z)l8V$4og!)7nePnx12c}D3H!j~N_U3pk^_$b@3A>(b_E_-upoG|A# zFa6IwGi%c-1qIzt&j7_ng!v<)ov?Tmaz>=)H_V~hU`f0o`1)w(G;l5jb#JzVuvP?e zh5{YkOJg$F{74;Rp3sdSXrVWA6a$}lI1{Dp(b#v+EX+J*8;AK*&oZ$qnPlqq>L^M1 z<8n;kyRf6MyU3~O5I{1Zu2&+Uj}k$`(uybV}mqLI(D8YE8J_-#RtR-LF=TtGD8?Qg0if!=Dy0&v_`MWUN^F;k7 zUUAXQ=OAq|O1x6^$Y3FohY&*%d(6>M;vrcMEizd3QEz2(SLNiR-bS%l3ZU>1Pg&7% zuJ5WDUThC=YApq}I@l(6ab=bnk_@uFA}0WefJ#znySID|JF&a!#)R22g7lLG#jWCV z@KxEn>Re(&(kQ#QZDaYNUV!!-V)+9)Ge);6R|O<+w`9|(jJUJLg7j!U@a;Ow zGNI=O3c@~>15*{6*gaiwD>r&PT|U17LK$dB=Q z+4YT#m5P~Ny7-2OUgZuIi{ak?S8}VK{Th0!xUF7Hl+pUz07h|%aKo*JZqe8}b2LMc zw6Rp|Kp(TAOY=`LmAlSS!(KtHUmt(>HS`EfJVI)qGDQZj=P`A|tmQ}6@oz4%bVr>kG>=^y6@iwca9UU<@upk(E>-=QJ*g$SNvxkIj*zs((er zz%KnsivKH;H@*62y&%nHVHMN7XK{Ikeqm;Ifs!iEEqFO3)%CCy>;gq1Amz-(8A&rE zalTTjhlo)zFjkfq1wK;OtABX5J-jtX1=N>tVx&fAP}kU|pOxlQWc6l$HQz?%jgXR` z9EVn%94B%jkIN{@=aT+}tQ&9&NhPY8WD(I;)LCOp4Q|Mhbv5Ks80R?UcogfnW+UVA z!*9(NC={4Yz=iE1?fmK}j03ox__z8Sdby=#db*F}Rd-Whe5Td8YRYsw>)!>${LnJ!OhJ z^cq`(DxPn6jx49WzS#k`IZDK%2jk`#<&Ek-* zga%Mbs_Joo_cFV6CzG!;8xN?E+30<^AQ?rkc<&v`wcb6(-)m6 zdY`UWO8D+a+L63(T%aYcpSHsyBTRj#EJZ`s2{yiBW+kAZBJz$l^o@_OcrqG^nxRl3 z(aq3{0Al(w#&UJHS<#C@m7B* zik@WbnG!}qY^MG|4ML^E6HkeUC%3wsL5&y3Uay<=)~;PGW_3A|8m|rQA&4^} zZYcT+kE~7^j;q#R+M?!Em(^<&lDamNNYmG^hY{P({MJq#c<6^yFwh01#&RPyHHTN< z&yY(nGbexTa*<&kG`F+8d-V`#Mp)9`L`4Sy^TO%89m#4G%K?2c}g-0T>arJ&gBJw6D(#>9Z z`P*dt&W0yn-^*O%cVT8#K`VHrL?CF}J!%o} zXu5#fk~`RF#eU-!`!|>y7z9C?{*3bcUyQl^5#oA4&5&4L>)8RsLV#Du{VPFG5Yi2h z76UliKR5p0;jVG=Kv-fA+%+&5V2yFHa{ez6kI~;DJP**{pMQdXM+z=B*584)KcG!) z+<(E_{(v?)+SvRRZDRc+aqQou(?O6gfKK^9Rr@2ck_(_W{yqNo7fK=Mk2vtZg1o@o ze_3e?!d@e;|HWSO-d($efrF-;nckp;If9;d_JtxMPr84kKpFg#9@ov7G8Eg*z|G`4 zuLW*zL$a|dYBNF7PFmFaRw0Yk$<>os$HA?W%gIKs1p;#}jl1M+t6#kGA z<})4v{<+(WcsbtW)RwmX!lM&9OU^>wAl5Vset}!pbFu6Y)o&iJzlmLZ5K2kCb2;DI zdJfY+MUb*g`K5arH8#qfxj{8IH%)GMF<2A%Xw0Ra&RSGmKyDy5Kbwu|hF~aoWH<_W zcz8ru%+UpncOWRx(Ba~ugmxxcxfIo%9qXrYyOVvd`ndXQS`v3Dv-rfjk3z>Tbb=Pt z7go(ryBFdllJ^UglX(R+H+47AkWST<4!2%xu*;0hPohm*=BqhhARIPk7%SgUE^}X0 z>bhHa3x58BNnd*6>sDoTo;1%=>$!(fGA1YrO6c2tv(oHHdga_Ss%=$#p3zS~nGO$g z#&qmSZa{V7)xb>LH`jNG9S1HcKu%|R;z-i1rd|q5P~)ypZ<}~bQSyCR?qV*_V-7sw z;5OfF+sB7WIi{7UzV@Ck*Yfqqlh>MG7IZfH-EtXHTpSib(W#S=7;H^LQ_7ZEaNgQY8EX!+6YC2zzBW6rn1Z;~9kp1g{Dl=g$@ z=cgB8glLnNx5SzLLOPXm(rEcV=(p}JT3CGBhtLQ3h7daGl|D7j+-0Bcu!-IWRBxD- zQ^n^bfAPN|Am0mkXG>=^PD&F19=gCjVhd58We>p~uvjSLNlK}`(#P-9lHABSMjq#_ z9$;k5DcyUXre&dpIup$NtO?xtXfzCEY42T=d0x1D^>*%t-6G*$qRtFf{sk$;H)}eg zw22!bfyFJ+rSHgcLuw9ff>vpAxudtc-IGH1%YBzWc)yOEI67#rs7r&Tu}xGGND4a%=i}W?#_B+wDQ1V67i9CK zwk=AsMRqowQ=oWtl23z7N?L~;A2Q<1sy~~ipXInBiad(Cdy&F2>CjeQFQYrS#QuZX zp(AlP*@v)&opWDY3Fbba9wkBMXA7SrVp^24$YfWf|K_R1N z89p`i?!NBY?s;FyoYD2*fJ&;R8-68Esa|f%d9i7#_`QK1h3HLsn%T$4VH=?KSEBT# zZ|*)Hh9YAPIWswToA-jf5mN!$7T6mp^$@~&LQaKNI`{+i32MfrTcaI3HRw*b#=1{N zQNi6_U+(;cqwFhDp%Ey^Rj)kc%77otK5zkTxr|qXJXZrAat0_%tU#4pjLzLgy>Fx#cMsKg!#O==z5dfY=Q#{03gsZuPT_NO}TIK-LZRkYR1VB#0!OjT}R@_@i!K6Ei|TKp28iq(_Az*ZF;sbh0C>jD&fO~FqbvKp6R(980x zQQJ5-nBje@kAC>=a083fmqEQk*s4T8v({7s~5Wl@j#v8unaG)WzkZG)P2d$x`U@W25EB z?8J&mmGB8?iUt{}e@Pv$8w#Y6Y#wVb7^xSaKz$v|QO8=03zwrT8{tpaNT zH{E73H{BF)#7ieDIeZ(!wOBQ22HWpt)sDS8We#ZhzE3fFelN(CNV934PT=QJ&3-<7 z`obPt%ZuFuxL!~=>cVgBMeWaM!9&jA6Nz?<<*lgqy(fXS5?OLcoVjvH)MGU8DZr65 zMuUR|2zj$a%9WBp^!*(KxFr*2=5{ur2ZthRcXS^Khc{^!tv!j3`ftGo^_F{ zEDZ{&!renx9*^brntertX)(flb(XQpwHX+29~^@^LRo?l)SEJZ@M!ctiV+|@8bRSO zVkH|Av>D>$K@uq#v6^%VEKHa~?c$HaG1TK1XVtiu2-OxtzgIjFX)b#$dJBq0bn0Ro zp!C$MA7C>WXg^Df7| zYS-sucr5ps)RXUy$_r=LaS~(tmR6A|?|x|EDYKB_9osug2bLh8U$*4NcVsMdwA7?C zb4w!J9ic^WHMUCI(nvmalA_qa)NybgHCCVv;^ODe7ynG#a&usqd3cf05!GEM0jg!d z-sL@ZQKoH(kSblUWQ+1Px7!N6kVuotcK|!qNfS-3y@@GpQAK3lI(&WUku1VXyeuB+ z;=X5=Yiwf9xoL5`_KAg*8_D)%xa6JY(Rp6WL1flJJ(y5a`&2` zh=}o~kk{9dlWj2idg1mb&Oz|EIf~3wC%T0p?dJ0zh4x|Kl=}DO>u}0Gz|rOWzTm|& z-#45TOeOC?;QZD5f{fI)TzWVn%EYvS_`E8P=#5ypVzecu{yVNO)ic@vDIlQb#3WnHwrfBFtUwb*& zAGzs}zq93{X$|Oh9(GQ+AyxT0`o=9(T?s!jMu$HyEqdTi(QqZabwuJ6S$? zd_0V8a8|!!6}ONQu$?aA7Q)p+QPu(Mty*k{b=<> zn0)+Z)EJPZ$B~eAqo`_81i%WW2#3gxepZtS8q@j164H^gqk|uSdY6;0O4O3^%rm4t zR2?KeR4pVuxGZEJ;&??#I3>oOz?WKw@cBh{VDe>GC(ph>&S29!#>h*a0^gpO$;b1r z+W9*pDdUYR1e8k2@y+K;8$?C<@=8Re%n{!o-o_)U3+P%+DDri3gG0C?^_pT(fY*y& z6AlV&gf4y?E{fuCf?g99%1VkZzJs{a2Y$j<{i>i>ZJ{E=1j@8cYtfS=@pe;_&N z0r}yCcoITf^!`CH`Wn{s0|xzijsTC~zZd5BF8cdX z^Irf_A*1HEKH~X}K*<4&o?i~a+yJb~`nSHof7?m_1(X{YKEI8b|B(jF1_B25|0c=r zJ@mH^INKjzzyAv1We0=V|3Yfi2sW(6@Pv>WeUdjlDIY`cPe*M~B40uehI+$F+zDk# zPBv^hoEMp-a7^v!H3*U9XEnGpDd%t4w2a?dA>7?wkz3oBiIr!s&YTN1-CTFMcsbwf ztLUU0u7@~^wFNZ$m_#98o~5<6++3>GdMzCX^zOP4yEJR8+)TgGkfswWdG-_a{`T;^ z_H0?m%jBpRG4HVR`j@b=(H z!=UMMZg)&bM^jMq@mXh&(Cr!mDsvUWJ4&Jy#LD*EV1)BI<(DmQxiwyLzW^M1emv2% zEW7-Am{mcvhdDKU?I4J2%cIcpWLJQsH}?PI?ycjh=+?h~LO~jDq@@JOP3^r&2}L@k zyIZ-Rk8pXd2Q*P69w)?72Q*39sp z&vjiP{>Jee`W6@au(D8xSt`JL@<~RanBFe6&B6zki<`&z=EK6&2zZnrWEPbGl=`Jf zQoHt#+NI?KOJ-<8NEdA_rG?t=gSBKG*1HtOy%)o*u&%%ld53AN63FY$e>80!2DX!3i z<0^^4W(R)or{b!Ico_5OAzBy11U1reDsfC4PckbavTslnm2pLuhJswb9o95sImNlb zP@a?4*VUQ4uh*ZTl+MSzo<6-DcmcY``03XIy(t``S!Lrx!9vb($K-<_atg;xHQkCm znjYh8KB81jdvhKq981`U@;xa4x-w^zJIOaJ(A&-s@a*;R1E@VNNdv-XSAOQFLu1b! zQjunH`}l01tk*A;w2VYKO7Pr3NTPcw263L6SJ-}P%yzO*H+=H}yG#|jf7XuXrZP65 zxj($5gM+L>%M|OSNE>h*YV)#SwxxSe=Uu|=ONmyRm~!Jy#4AL;_U|}7Un+K67a_H0 zfczAO1*LZTL!&F5FTEaRHW z?>t{nUc6xcf?|UvL9d~N;PXTUFHMnKdh)@PfN@6nqaUfem)yFI3KeKkZ>hXK-fW?M z)8N)YTxlA%;U-V_IuBx9?lLl+e9~~}7=jq2yZbo4)lR1dEn6Pq{?;BPm*G9r_y>fy zR-f>E=&`pUitrjE>nsIRfyo`Sz9aor`KC-S2g1SzXu$BFcBq*AULj?b%L1ajo?k%L7T(Ts>3eN zD?g;XHF_ly*Y9mfpY*T{qw>SCxRDo*@%d}#=SdHVlZekBC$`I|f}mGLDvwU5Ds@tJ z40Na1zI>@Q3uo;cW6kn43au+wC1Q{3N66#o1UY|<=|`CKS52MhUv4tO+i?0-uvNm< z=;CcWtR#=@X6OM`M}Z{}A5}`y&Gs}I#q(M1*LZY;H1T<`fu#cAU|&HbDkp+RXc9Yn z+)36V8UnUlD~4-x93-x;kUZdnxvxwe#8P&bA6CA%q^k5SN&+;eAUKOeKywPpG%eg%Si&Kw9FQn_#P>T)`sIAzKeHBl#HbK0dXS%3?#j_N*!_Y3D^;sK< zT7i*qHQB2NwSqt1t1FBza`Aa-riT?+spLk!qKnH1Vt6ItU&e3P=*l=GmXio9Y>KtF zY$5n#j8i>oso%O%QD0utgmT6B$JbURUiq(RKVvLa)*LKkV&#>SIE{ROXO0u@j2UsA z8g`HpJ|kw!2dhl{Mw-MQP`YFMQl??);A)Y)5?0sx0Q1=s4Vc5Ng9Y zGn+irZz@-R7-RC~dr$SJvECt*;tFP|aMTHA4v;MNZO_Z>Tx3Q1_K>IQdpD2YA9%$c z(fM!IhlOTq@Svn#*ce!n_M_8U3#}3O-5>eSb-RlfSgvDs3(JkSZGvr zz|JK}&uW>?Dik_D6nuKEUYDVjb16=&)XO$)mc;hlOsS+)>Ah%)^*VtexM72lur!#8 zGYxBi1kV*Dq}esjWW{Ox<5Oh<9*gn#r|08Ut_uwtvPKsx9wm)n@t!%RpDrBfh)tbg z%6T+%&W?*@HbeE_cdzR$n`}CbHKxv+MSb@)nN)1ke*~oIXBbh}Fr#^8MGK|pbiQoD zecv^3u;OCBRJ}LbkrGO%hD8u-MSQuhccInP@H30&o%Xa7Vfd@GtV%**CyNDSR~zII zN2(;NQt^f6r&i%GHIX>N1(iIftvSKEiRM6wk%Vs-g@)Q%k9Fjqp&BGRtPXaZetR@c znZBhbr{J&m#Knmml!ENEu?-iNrYag7vTFQnZP39h0C(dtC#7S|&sKt*DcNc_6&vZF ziEe3?NtV2NCib;7uGoPdmS4>q6YU(RxR{?W&i7@w<8UN?VLxl-&2vplchvk4T4Kow zA=7eafqh)5Hi-Yrs>bW>mt3z{$~x zbO`o7rbx3DRLFfA@~soS!@l>itZM&D^hz%1MxaU`+-NH0NAO1AWIq>P;WlAbT5eqz zCzMc$RdJNSE^Dj094R?Ky)cKcF%v&|iufu^tUJdvnQ@moh`29DS2fBWq?7=~ju8{- zupcc~(Hwm#84tyVJ;x9<6hmZH9nDWnP!$mj6Xn6%$bSy|ODzoem0ViKz|Ad1!@EJY=TGmZcLsmyEG z->`|v{7ESqaiE0?(wk23d%F1VhTUK-Wp-?J5RQVOeibC)tf4}dbpY&c2}->JaPXz3 zss5&)U&TaDSdOVMmR20Q|JrC-kpW?;1aTm+dE=GJzx6tn^hH*^CE z5f?;lvH0&Fn^=W)KoCQl0EuM7D*&kGk@VSz9exl^HoPwBU@elZ`li&x*9Kma4O-#t z%afQ^ysV-sRH2?KF|4?PmgHdbK5xt-e2F_im1l}nhA{y5$%L9q3i95<1nG?sq~~$6 znAV7-l`-F3x9)sIVr~*22cC>O2Iy%0t!k)abD7Hil|B^0HgJ(SLuF~6;BWDKh$;*C zsMQJS*>$GI8-SFXqz4&x-xos1=z7V=3Kiv}p!_-Z!^ zYsdj?bwH#mJHpnz(!J}PtDa?2SRCl?ZA>oR;!Nj&a*2>LhQ6_$p-9J;vfA>J?(_!p z)Cwe(Tf=Jd>G3!Z z@%#BTD>k{`0To0FBD3RTlNnqx5y+{WF^@t2MHR;gv*_xhNY5{|ll#By|XKV57| zwRDdN_dJFLgw%JP2(}yMtRC->dUzOvUmSdn{vz@Lw|&Bi)A?n~nn{=;ysQo_ik+l)>u*N)*&j}&Fueaq|J6n^UP9=zR#M`;+XzL@q*XY%UE zvhq2gJAU>^jCeFjz&>I1+(5_SkU#!^V%~RbY1gjubtAl2_Q1KIbe|B$giV{H{tD@c?-KZ9MRd2fwF}|E^Stu0tFTuTUOZ z>ucB~4}#4kNu1jx9?JxQ0FNXPY@!vxswCdeWC9J%&H;sC~1h0u$hjWEOqX#o~S8-83Umpn-})EfrA z82KB*DS~i(jFJdWYQGZE17DOn!GQ2?Yp*}&2WS6fo**7It4aKpnT{8Sa-Trej-Q_` zuqoV3nIuGPR)qC~qS6fxG;m2l3XdqMf4_Rr*KyKmMlSd@A>ZpkjE5FmBzC*99AZ7+ z)U6!y<<<`Q&;2W*`Y$uNcefVTN5%vL00V#KObve*_=kOwW{xs z37*VslNGLPJQmz&fVTJxevUd~p>S3t^s?v_mGXw&$Pv5bO^YU=&oF7ftX@SU_WN3v z_c;+%?B(XXGa)*Ak!62csv%4h&>;UbN&7)>k6&pHJ9uq?dwx3{3+)MH{6MOiD_;Ieclw$ngDZPua& zB>pPa;RI5b7n3MMEPMGjA}JA{p2;+9OekQ83C)iSi_T{iCDw_kvN}XmeB6t$Dw0>E z&$;!BaQG=8nTL%XNB5w^02Q7!EniYdbE0HYk|I@DYa)H`q=~yLlV;|5RJvF9?53(q zkyrYsiMLyquA6@8uz;T?sJf=f={EsV%UzD9lS-@Dau4AlFwN|JL~4;1DmN)r1i z$aC!;1@=Bg&;tj&VU2tJQehn%ZpXh<`B}g)kr<|KD3Ibt0`HvDLECjO{m0>Y%h}kY z2vi5{l+8qun762S8Ht?>7H@$hLv=93JkCsJFz zP)S;my>)y>wzzN$x76+P_1{r@AXnqR63PFIsr^0ezKabBuq5EP?%b8{Vds72w`(-` zw`(-`w`(-`-ZdHkr+?9V-Xo>|!KL}$OZxv1=K|_Rb|~cE@OHL4&t?EN|DEUl1%m<3 zy?@8t_rBWy0dpXCUe5o(+|WBO=f8$5{B44%r8VGUY-DO~|F5b~@LvU&|C?V!SfRgy zC<4JN*}=g10R!|B0G0rOzh|rLKp4aOSet)8J^zkZLjLOz|Ns3}1kCn}lydyVn7c9d zzcAzXDFR^Sf4NGK|HL-{HXz97-FW~$1b~6ins=c+@BH}xJULJZ@U7;bF(!Xo^S{1e z(7z(x|BjzRxY+)cpQ>5`@f|%TN)tEWERXr#ledaD0$$_ryGuLS!}CTdHz{c=)s0jpeh>GHA)j)`%8Ly-J|Rz5 z@sxq30j0L)wmSREH8L#EAMI-k&bPU8&178XR%t^{YQ$MK*`0JJ4{v|21xVZ+_6=bz z-0Cp%-=4#FZ(uXE)f+sM{tj!$V>%_9UEoWgAPq48xoja$-5T)px-(AKv-rf^el`a= zj=F(9B!Fu>poO~7+Iw?gZO5laJxcZ2sL@OImv&Qi{Z#_uOu`3A51w5=Mi#-BWRV=e zJU|y05kcR}g^Z>;3Y+ClDTol`2vkX)!XGH8P0jA3vv6CmIuk#IMR$#qX=W8+ge4zJ z<1~$=o7R!41-7%^>j2kI>*^or5nl+FJ)cw|HAYvLCg0Gt&E-MTrpAyO=kg1&2VRG zB!A55VWfq6n^vMed?PGTPMa(eEQ1Rl>a7Gl&;O&kz&c4GFIh{m`eA`nlS&w+7^Z=+ zZmJoSQ)rzYqq4*Usyn}7va9$kOPx3NL*#4%@jtddiA>3SVU~G2gzsIFfVm zF`!;o^Fgo1>WYXlF}QdXdSrHsyiSf`-2^QmVgFQAG8?0}pBp}Ai6&hL_eC)w;j{K) zuq(atwNaQdT@YFU=BrdCq$l&GJY*O_BCp-*sN?mX^{A_rA-jBh&)YNa{%N5wbZG(K zCW4wb|6OSl7JmxO#iR2{(FW*Cw3|j3YPC=2aYHXF>wiKc;sP!e_!ENCUw8)GW_;58 z!1(o&&28fNCVW54!SlGqc_IA_y%uYwk4?TCQtGl`B3&2jQiKLoiV@>2t}v``FkUWg zyuq@o3v$|TQpFQu%5WOr*d_{aU*qnY;Vwnvv1Cbi8__Kz;Z&@67SJ2a_!V8P{tG-y zkI7+Ilwa{#Dt2NeuJlTVN!*r0i&PT2*6YYK7-tr6C$UR9=^ zxJ*$OiUnRdT2hj~zE|uILfmU^WMmPfonqGf_}i=22Z$j8T?HrtrBZ#%=7(Pc5mn0kW|2c)F)p%1%uvQlsz9dX0ATVwe3`fCk)5{EdM9 zL>l(QI3+Df0P)_#7M#@WsYpG?s-=bMw6q`_0?2k;EHG^z@YnzTyuXg^D0X; z7+sLQK8Y;p{ob0WS~G!hD!j3@b5fZa)n3oJqwDajK42f~`OR1Q?gEYX+4UN4O!VtN zL<*$$KJ?>`Lwg^;Zu=^eam`yG4QODGLqoNo!+-LY4&$Wiu}S@U>>5mkAs=5zX__&%>T&J2kXhATd4nmbXU~YOqH+8XDD1G>gV1-gFnWLtrjwyNOG8&kW?4{!1W;760?ZWL%ggfzby<_r|@N;HGA z@#CXTZ;Py)nq__vGq6Vn7C(h<2)u#`YgLc)p1#c_M|{9y3;2iWOO2V4IPl|Zl1ewU-yPu5G`A;~z_Y4XFS1K(mSl=-FF;X_lL7IM>0{OrMtk6~KCB0~$gLl=Jbz=e0! zrm@?rZG~_Ulu6_ZKIAnz5KDK!E&Ka9VNS~7boPtyq}eN{bK>}h^`go~mtwJ7(eZ~b z>A$~7Mk|^^F@*YRLwd!~sj$D>mg zv_*%<9mWQyOe|FGUc*+9tLRfaK)bRV41Sp++cm`-YvU+HxSXK$rMP;m|c=jkt(h1FfauQiJk^2@z-h0Y%HcyMYRQq*&?<;39(w= z#4S15>~4(X*SJMp)XS#4g{|&c|>rmcInlzUZJL8{YrQ9k8I# zhzQ;E2-^#fZ@Hb{zBnrm*Zlmhcr8lG(W!>#L5P!ui)f40TNhCzj%uD+s>E|E7lXof zO-8J?#jf~()T`Y10D_BGj1gJA3$l%rr`*M178bYoya6*Q>}MwX_QIrR)~*$xA_Nct?$-8O~qN&`v_3GU%=hfVIR++|cW%!iU2<@a^VIHrb zYP&xqo4er5qQsj6S$ve4D*LT3*^!dPayO7?Ks0nJAAva9#YCty~{FD}`o zeEDL`pVhG}qf5S6L65{seKj2l5mmQADu4_+Tih)MLqyYTfax(vZqW(M2~M9Xe@OaX z?F_wk0y{9@PVuMZ)>f*;JePSzhjtp{_<#dx=|76$ggs~c?&YxTWRI^>i!<12Q@Myf zYINV9*4jhkNcI)e) zDY8+Kx^CAMu2Io~58;k-BK$N0Wc;8F{SAI%xmIf^23r5{X0i^yD%hUrP$1G5!B{qZ~Upi+T=1ffv5eLUdnRLpce|Kij%1S`Y8^T)Y z<*db=x1|sCL^i5YdDAQ21(;Iszs@js_2+w9rGsg4U_#Q3W?y@SSU<};9nT9LYJQmC zmY&;|8{lCaff_?GY$(ev?ay$n5XH=L>ugA)B_lb%GfQhOZ@EZ4Bo71ufTC*_ny_+Z zA|i&n!P(Z{1_zQz1hm(&+r0k1akVYk{#J_S3y!AKsq1CL#Oum|cHRo683W@X>aSJo z1I%(kOO-Svw1pTfv!0Ke3HN2I@udZKRrWDL+z%L-&D=ANz=F5jlPPf%H0fm5^`BZr zZ!k;?Bhqx;;kwgv?#lXV<2T6wbZdF0)-`<%@&sqD~aP-bBKfe8E>WGTsGc&UJxA@rM zO(+kpn5%UV55Ik%8X@7mG;X%OfX)#=g0q#`-NQZ9M^y7%>Wo{_fqvk-&W3lnjCLxp z2x0Pk@lG)>4IEt`B13pS+jBl~rW8-GlGcR{O9?;bD~BTe$e)JkT=OVjUi)ntVDGJR z7F^V2C+~MrYL;;pT+{YN#z&>p^*XUHPSjpa12ggU9fI7Qa7v~^dzwA$lXQUOvJ{v;+4(D z(2iFpVdnrb$hyzE2TO0nM{bWN4+#!7XkJD?GKZ^9fv8h-vOYFn=~QZ3KH#Ppl8M)% zMr7Z~t!if(R52@sywA($lDF(RUukT2)jRtZhF< zHwcRZ8lTY^U|UAyuQdr}M6kWq#>Alcsd*jzJWH!UHduwupi z6d8}EdV+(Z3j8*6xx~%6#--A^PQm{R8gsA9_6j*o6)JIqOrct#1WRqZO~xel$wwy6 zEsKCnE~njoB)@rE6I8s7Ck>yy{+MEk4gToYXj|4hn@xKed$gPOII4!WrMTwGQdTR) zS(a2etK?A>u5p4%_kyz#Djp4PZR5p9&XSiM5emtlAqb=M%>yf430V1Nmr4=G5@k4+ zJa7*~VuEMpT5C`1oQ=t|^qo_>tAp^@<~D6?f;7H_8E5F&$k{Z8cxp%dfLz~@jTV5R z|CZtXSJ~(P8w~GvSi*aPbI0)R*~xw7cUVHmZ>k6RP4ytZsUGB>>fLR1@2P!P`5o{O z^1El~?|_GZmhu-bg#PXs`nzZ7@1CLeJ^vjO-jkF60TbR^^nb|ZxPI{`AfF8DT`re9 zO)yXcG@$o1?4FC=5wd^KFneuVLtO)HCtFi{L!hc}1DcwyuGJslBO{rLOtEnDrk}r~dP7f$tLW{5o5Jj2JjW zcgze7$T9DM;y>&HLM8q-OJCp6&hB4K`VYuL|7jBIT{4_|V#f;k6K4XlN3K6L*MBid z&%xHtUfV*~`R~@S{q+R>cd!l$21EWPc3jh#34aPCV_EnG>pbAS;l_J+?%mk|Soa>W z*K6O7D7kYt(_|st*uy?<~(k?VGBR4e{jru<|`bC^c>gHZ4eiSP4tj<>Em4a zd)^+k7kgZuZsb{cmepq5{_q{zz_z@jb?o0^u*a4Ft>bS=5aHpoy-0ED{eiA+d&r?o z`opXpVz29CRygWiIO<}O<&oqLs2#Uv65L=*XInIzF0$z@s#P3~7~TM^=_#j$qc zE)V%(8I~D8Pfu?0Vno6qeeFo3y{9XPsP8krhew)6M1I_e?w4={(l(HYdu5PmB^Weo z`F2o0Xha~x^06H{gt2>F%;``{mdzA?U8f#*e=m}p_>8pkOLuMV2{wM4j5k&;=3s$3 z+=l!`V+oV&H0%uN*2L$!exwY336HoHDRTkI!+Xp->Ew!_q1c}#O#FS6$&-tva0GL1 zXq}FlV8@FHHXn2359TBc9_RzfYTeD|^6DSLB#)_I(zOj_{PcLel5G1bkFt&U8^&x?>S76+ z9G9?RmmdsIEs@af0S5C9U9Zw-)_rRfB&qaAH2Ay6LHRJ*x)@{=96n>a(VB96|HoRN zUutx*$hY+$l{IklUhjDv&zk?_+2HI{)=FMzf_~n#qnuk89%^PQ3>I`Yy*)BGlFc12 zc*VIV)Ni<&|7}$HKS%!U`5Tpq9UH~3qBy>X^lxp}fxf3f(&-zP} zQXkPFql1p|+N0$C+eTXaD22@&a`hhtATvwEN3cI-r&;0oCIRO#V*>uB&DkmustF~* zOe_;I4idZWvdvV-BVC%1-(kXy!Q>zgC4m*cnyywE`{EC$5+{m;mRO2~Qw(Qv8fJ#Y z^1->pxOFk?O_3l7;bz(BHTkJkCsyD#D?~28dIn_p~KQB&(e%i)@WDmTRiKIs8=i0`;0x&0C@arEO&Oh7)$8~so zOSR_(eVMM>1haC!k5{2pzQmAe#o7j<+gYh!zXl z2cS&pN02G)A1#6KTiPaeQ&K18oQ8G2Ax1>2VO7J6mtqFFrTiqQM3;hy=Tmb_0-bQkfP(V3g z1cwVnO#DFD$__=$2MX$eY+93CO+cZu%5oqgIV!nB9FoV5gy*7P1rkmHl523>uqG2G z8(j~ZFLT_voihwk(fo2dw{WIb?Sb@&r;9mu-xo?p=z7uj**gXt+SS@1YtPn_sJ*`T zn}oQg#__=34Y^P5JLj7EiulFxK{4&Q(q4ceUn0PY1!HM_H+3h>$JXlFFGnEcVV{Tq7ySKEPZ5$5UYr!_UoX$+lDQq**gW!%s%U1yE4x6yO6SBHk|V*v4@82Z}yZ z#_rzHv(M3cwiv}$(ZqAziIo8SNS-=I2V(Uqm zKFZvjNW~aoGnSYRO2uGJs-$RGHxDf4BGv;NzXsygc-5*bHR zv(CfTsol|`AxT*|m(mkx10fARO$PlF`=^qB-DVucrlQ%O8NN1`n!+xWIW94cs-URJ zH4p5G1@?5`j7lxXE;td3QKqZhoNIpiOl+#*L2|`FOd2HXr|3A-LgU4lo0ak}P_fHP$;3;QlX7g7&PokkfLoe5vm zzwMzjwpzAjSiFnx2_0tRpcBtA_YW4368bUx0ahLF?99AOD zB3Um=m@B4(4w=65f^M$@j=}MTzbT-DS^_rt3~cheU7>Kmxw(}^KVWKtmXD@Bz*2SD z+fA`7G$CZ8C#2KP*IDLt=Doks>JDXCScckzbM8Y(2oLpJCFJC8lm>g^+e z;K@RG)WGlOtYxiejh)9O_;|fqOzARGkavfA-<#B#?E6YUD{ISKdVm-EOj&3|v>_Z0 zXk`Tu8ODNEvJ42xobHPS{Ne92y{mo#j3zeIi>C zy1@9+$;`mCny?gKg*x$^nRiGSslKjTd`LBAL3xYt={bq`P_w9A{q@tCjrzHBjg7)J zEoDObFDlFz5M_JvP>*7S}fNDL7n-6rK2KU)roPcN9|h)XYck1Rekz9qz}-Ex9{ zZRwb^5mzbQU?f9$>NN_9=hWD|`EGf*@vQ>lve{MvF|$lVYf*Bf#uEQXkMO~jC9M_x zhuqdBldC4=>+ZM4_#aveKB0DHB|60<5k1IfyJ*~_~i$1DZ(J)(Z`Z>dgZ`wtqzV9AZ!Dl>`QI$M&av648BBbA_JQb7` z)qPF#Eo0850TSx;PRYFeiszf+x*kyijq|?maDz>rPG47=chG9V2Z^HxDq1mlf7TVs zp1aT|il)=|0!^o@Vmn3gtEL(>kW-3){w=W(gERgs;R;_?q-dGQk?4LvGHO8k+LOwK zUWNH(M3M1ihm|>ggN4i4gEtzLdESgu@@*YmBrn?=PV02~##g+H)g#dA%z2q6qj_*8 z&3T1SY9<-&vvSJ}r1zHlQ@L42sYg+rs>^bvvKD4td?w%VK-;n?iqs>5EM0s%+03@b zlcU~om?2DTCMXODe)y|+4F<-;$paSX=8EPEW@q_(7iK}>m%9gAa zioUjJdU{?39~f%M+3Pw_LOricK1-9-_hmBit7o_Ab_EZhf8;|VvaqXyGBs+MTqlFtg95ZJem+-RU7V$ciEMH05hRCW~qv-*iQPV>nY6Ab%dvbKl40At7 z7$TKhs>CUK6yT$LwnvH8Gg9wgQNViwa~*PX4vlefg*^%h&b^C~(#|?}_XHN+bq{B? zi@x}Isy#Xl8fm2&2`xIE=WgT3nwGB8Nn0h}add;w?{pxHOSAwYLyq^TEv9Bvp;mA+ zhZrBct%_*e^nDgn9MdixW7>}#n7~j3PFGO3)jk@pl;kDXCJpQN!c#~KF-XyGmH;I+d z)s%79{dVAYDM}uCU@23d)Kuw6s(Lzf63tD2rBT^ijM5GVe8Z!F>pu(qS@P-2wAwAE z;!=4x*5|yppDPqgmz>oLo_IPpO{3M%PLy7> zO_%zKp{Sc6>Sq^xasA1fT2c4e`N$`0_b_bu2y@XhQ`!E6LR6ZGTv6#x3&o3{C9~tr zbc@IA&o^|1jk`X%rxa^WrR>6J|B!*l59xr7W$(cVSH!C8lHZ}$N$X6U@I1WT-}Wm# zaByTv=%M%~n|nR}?8sE?!am@rbFUr0Mt){npR-a9X(8bJg^&~0i`NsFCFWJ*bQ$)j z)OtUzoRU6KlC+tJPP>fF<)ks@=%Hqe$bw97 zf|bP4WsN zv}LW-XeWmDK>4FbVn6~p!^Am?OK(*FsDM?p8eIb5TN#i-t}Du+i{&WNt&O@p@b%FO zx1I4_JMrC0-2^Jbdzd{~&1Ed{0joi|glq~i7h!i%RC-yCLfzUPv{M03D;MFrZXAtQ z(dY?;)1yig4S*)na@~p3P`5@=LZFGp!X^O6cva+}9?fd-D;6L%$2MLK3U^5jf*j4g zg=jIe^v^+#v@4$SslT}V%t`+6iNqBgN<7Ni=L*BO0-_b@9~t@{JXb#PnJ(T$zAK{{ zt^&p4QN&9&DS=mClk$%XrSb{;w)w}D)T-39^&c0yUm{wC$NK{UUW~O8{$8*=ESB{5 z>w|96hgEMrJ%&DVVC8&r6{PYwL+luk&t@+;uoxuI(gqGJ0mS#(V_4##?THXy!v;Ws zSjo6=ZL9hDJiXC+vP^Q~5mqp{iqUprcap}Wl~T(0cNvD>;|JOgGQz&z2CWPoo_j`s zUoQSTatZyb-{$}IF$4aoK7{@TjewW*FRaM+8#J=rgGPYz{6%YcPjvn#i1=5D*8ira z?k^1LE-UpNtpn0C|C5W|1I0Ts^%n?b>#VJBZl!OgZD44w`>zD?KcMsbi%o#;@V8BO zipXEAjup!KXHxBd7zL0+TY%AN+ga=C|4XRHd&2vlW14^&_wexVXX#E0cz^Exi$!mB%=1Ol0nALclY z-;dkzWcG;nGbXCVTj|v~A6ku)E`98_sNQ-Jk|4|jZfKjiULK?Wtc5iyV61pSCAe&N7;Uhh$-{p8hHU; z1c9Gy+V~jp+VSv4aG&+f{*GaD!hFC46TIaThlV$nIHWHJr#CHQ>ogl|>m*mHOO8sPx7pN96kb(e{7{Wc!Ee!Geckz%ph^7+)kP#->BRn9P27d}qPH94i5R45 z<&rZF5fgNV;i#@B1&#LmmVCPg+KFVn5@9W$Ms4l3WNCbb&=h-GX2>gFtd;$IAY-pV z8%UErb3CdcJ!`So^4#ru<21Blk1(zlo#g6yG!w(;OLQMq+}Um=omvwelb?DL?CGXG zd>LB}YzCAdr__+G;P`Y)5_#?kIX>7QWJQ`y#y63>T5{km+^ppY=L4J5^6sl_X7)ck zoybyL(AAPWR%$+ zjR?OOUj9D#Xm!oi#}V?7)$09Wf2)RNb#WMLy_bKW(-+FgI2W1|{bMAFXZSa*6>Zap z23{LJAvgohd0}nIEG$oD$O7BBO(h2N%uQUT-Mp(Q&1l*LfGGV)NT5@cy`oiwm@NGe zb%Ys+-yp>@1S^BkyhbPIc{@>j?{n`u%?iI>W=own<0xX?7#Gi6L=^tOgyIJnWuh`K z{IE8K{8(2GFxBa*#_Smu*m_MV4~Oo9&aT?}60Vy4G1>=m1SY=LH*k`}fevhs;~u!R zrq*o>5Wd66nL-$GWi;=KGDVvUeRdE+s6mDc>F0ZA^u;c{f3i_9QQp4C=6uR{VQeUw zJ$QWjXhH_d(`RuTUFxLqdJ#ErE2S?ADn0yTJ0Jp`^*;U%b|rhl>o7cA7ISqH(mav*sCN4z(@_xZT1;^F{5bb>L~K=S2n;KR&E@kwhP*~TwAE*NrEjKag} zV5x{UJYeySP!|&_Id(;=%QrGsd2W)pT>kIf*(LLUO@~Q$oiuJsbR@KPF z;&MkQzMLfq4J7~CWZ`>WVbVhZ796!r32wsGWy9^IQ}gn2CMi9KVw&8&@fwhKeOnL8gikmX7b1qotD_5yE zMTY^4Zz3I-!1gP}GXeogq}PF4I*()t(J82XC_2t)eKM~qP?S?s)EvNny!E5{W4jgA zM~QiMJQdZatFHdE!H31U{$>)Rvr3V5a(DCosH>-meFIbAja^$^>DjgJN7Sp7-ll(!r)X_~Q6TncpSL#9 z3m*Q*^#p9T&%Vwb%oJ~dIHf=;TIB0L1aor`Tr|WyfC-}QEm~QmRaYQ1!0bLd>%8*# zv%RXdQ(&_8n}%fV2GZd1iK8)w3q!^~7Wk7S-n~fZcTlyIq|Cm2-WRroN^&TnL=1ah z5VjTktBNas9lbY#KwSv5FnaXZ>c5MJ=nuZtPd@qjlnQ9%LSDDM)X{&}>&ImSY>E3~ zF#*Jpn|C*@R}+fZa~X0ko|BnNzD}A>EJ<8WurFiPlxP~r=!>gRLWg_k)ynI`UxGR@xF6`r@y{q5Cx zXbHfx#8O{pdeqJ%0}ZK4FIwLB3AYFpE5B8~^1%0wJT zy;jj(7{{F%BHXt7YB<~kC1a;w@M*Z+V31Lpbc~@f z6{OQG>OR(aUFsUIE6YHoJ7VG`EL_NJWPR)o(o1wd>G$2>Nh)^=V#%AV3=WMCP0Dbv zcv1}9UK1#@3}%&kcT3V$jFb(u4hb?12%UN8;@dRpv19B+KoI#g!9zyHLB$8Z9uK)z zPAu{8yYCHCCqOGax=A%jUnHv&ATj%UEGrqjV2&hp){Zn_3akKA0DsR`w}hwG_)(vv z804MF?>S(Y`VEAbs7GiVq0&V-03I}nw^=8sLK(mH$C9)zw2#xZ1FT6bWCq+(aX~A~%KZl=^8_#+)LeK~v0M~c z2!_#sU%mj3UUCwY=8Kh>T}f^{I6)FIUoW}kds`y#e9C>L0G1N}Yhh5N0W=m_}S2A7>UC$1v=CfJ4CZl9J z{e5Gg9~kfqXGo-uJs&zLk*02Q+Z_m>V)h14fs9Q9jK zBx#TC7bh*8(NbW{9&M0@=3o0KE$se4D44X3y)+ETh7_MHO;v(i<y!GO-u?hLJdwkfxWll zSLfyu;Vlx4Gkq>g$E6SYcpBBpU#fpYB4OE!Jg}QtEvzCrzchaF$zKyIe(;UQCMG8t z@2ZUL*x6UghWIf4IoX}^!>@bWV^D#k=kviq3C;|;%UQv}3C{3ncMSy>`5&M0eM$_B zpwFH6D#!;)_GQWo@(8IR+X{k=y-33sTT!6HjY&~*mW`JJNMQ9pG$iXI$qjlVIz$9V zsmhYLQIH!#Uf1%xL=a6&DM@@3NuR5={7~U{9U(h77_LC?*~_y-2DV1iwhbF5SWPNki{`JEF0$WQWzOQz$ z%GBhlk&Rrjh%qT(1>TL9BtuWrQqpZROUzH|w}MTRS+{3T#x$NL8iJJf=yOL| z-hZ-#;l_aU!w0356)Hl39*A>Qx;E`#fl|%AcChBivb#1h;7#k7^y9moE6zzK-k_y3T)>t7Mly-4l94^nxrar@74 z2v(MVz!AU)5s)yk0x{kG&PAL|O!ZB)txf)g8{KQ{{$qx40Sd1_Q5N7R`lrN;l?9M^ z-BXf(KpK5J7HvIUyMG}@_cFi#m@Rh^|Ndk%fM+!qAb-2lp8b=_+}Qx6i}^brx)&k- z$4p=a!sz|B;V=5KJLk~9+X7q`J0MfCw!^=k61Kmh#{V7-aj^VNUX_I$}_0BERRhP|m*ag~u)Xf;z%HQS;2yZkU+D}VDxt#xq zcE+xUK10)VZrp?A813SXzjx6YuZ7io<`8<*&c9qur6|OOIhFLsGZ`-*o?{l!o;rrMyKhi#)|w8loHRgn})IJ z!g85D;ns{iJnc|Al6E8;i_M8Oc2BN@@{-93-#OFU>2yRQtZ zBk9(~Avg){?hxEvgS!WJ*WeBb1PSgzf* z;`(r?>zY|=-OoYIzho=F2X~2BI`6VK-Y4#Dvg-!3i>M@nd(m>R;}6l~5zT>e@I8ql z&v`9y%|z^ZV+cnYyCDwR3vjC${*^gn3f!3fZv}Z8y7EglawN+B_OS~IqfJSkQ|y>f zO7_zyld7g)F^AqYR|aPF{`dPBNX}e1PPdmLYn#=j3HP zi$6Yf!j@@)3kN+fPr-Y+VNkk&+amTBwX!_VdDmRK;moUZ)Qsp7L?+o?b4JA@u*FhK z(+NE*krE%xx|ybu4$9bXxQ0bHj&bi0NJM4lP){nmJD$bvK!*)eH3{(H+F6^B5Vjkh zF%Ia&z{}JS>Hw+bZl#@zDIcZ1abTOPH?J}h_xW|RST^(pBfEPBfn|pHL$#(RDSYb}1B2^`Y0klk zDuErM_s~&NBo&z>pltGQ5DkFQh7K!6p4qDbFNTRVthzL{VmV>l2M2MxR`2@maib=T zlfWrU?WyH^C=@oT#1uE2^w2mgQEMi?d(M8?KQr-gp^daYJ$x1qzhuZ`{m$0S8%t&7 z+^m?VS!V^}Rm2ER91gZyJpxd7Xx(dUeuO4HrSRkHwh<2G;;1cc=5cP*^f%8!v?agn zgC!ba_#(~%ntb$RfQH__uQrGZ&}jga&3o$frE{i|D3`J|^{8LaZ}k4qcbYXC{#8L2 zT&k{KGd_9gCGFeB2h2ukIc80>-~Y;J?U0$rArjUjW^*`(>AR`WAQ_7@38__3yRt(R z8FQYRZ6>c%4HD-8nhj{6ezHVALpRkkW9if*T^GVn@Gi$;cF6|00dCQ5GK_RaG#a)U ziEpC0qvVD7DW=a%%*2s+QkJDz+EldoKbDSF#gCgHXvrwT3oH#V%ZW*TVgThMSi(U znshQ>)-aO$I(=ddzJ*z!(+cukvT zs(7ZFylkOxB~OI4%^TG*O1i4FHl0(6Z<;HMwv@0tz8zB1&Tg^04C#VzC5Uyx0Gm%y zK{Ec`1#P3T&j)qMUCJp7WW!hyls%N`8KDX}5&0l#ms3(;eyl-=oFq_HI6)$Kfaw{d z202mgAgPFPQs69YOvq@3H1@&yE57|NogUqjaCC+?Rk)az8E-o^>F5~W>6%e7-H8L^ zh`p~FNI{8lMQ&s&5HFG|n?RT{fIuCs$;tZ4r70_MR@g!?T?UV0+k21uH_2AaM-S_d6Yx09y|H{0j3 zpfM~}lZ4#*&KGio{hq2t<5(IHL^BxU0Z&{{QvdLzoJKh*l_vN}=L}x*BHFY;anu!x z;eP$KDA}l!OsfnjRyT8V>cNgp(7_K*;=!03p0}Gyy5NINz{1G_7ES`Na7Mcvx|n&% zPY9jOyHro5hmuVVrg>hRp^SEAyOEO*Gc)3yNJ|5q<2(V0TYv=IXhzE5HK|)Jn_}7y zI_Bt5`Sk~>M_INTd|7dx3EqxMV)L{lzOAHq*3qi`;xIrMczWjm&uE2pK51Vo#N7rV zax2Mzbu=~$dM21Ujp}>*8!B<65~(qy5)>sK0OlS=yvB~I7kN_5~Qt6jvYR((3x)iRQIs_VCiyDY(4ZZ+pBPvphbk2bLhoXbSIxc5D9YgoK`D|+}d%@-|57YF_zwq`v@7e$E zf^LfHj8`1@NsWfMZlE=yLrTm5_9$x=?Fg+Dq@6}baQJmy!LzMswePmr%)RXWAH`wH zz;#aUr}UpYD33K~ptT{IL5>ldbq5tRLd>KUm1)l}%&8ta&*nl)H`}mp_lyHtuQ>~^ zX{3e@(c;^dJi@ec)3K6XoHK&9Z zEcdNd&MpE3bA-+j;X(8mc|Xsk;r?0#A;Iw{()2`@n~X^M*R#q_5`2v2r|&glko2H8 z!ShK8VyDS&K%52m7%fjht)k>S7CUO}Y)!SA7xX1SXF+ey>&sazrSxt%W(JsQJ>D9- zUg49Z@0j*r(-EE!+L(8#M9YOGdm2n`zSuyy>B{J*fRf?!#fy}K2RgrO1|*Ub2%z0` zp-pG><*_NAnu8Ffn-stipuGv(|x}}+kZ)fKYqRj^_{4AFMm94VSl)-N1pmm!- zi0UX0z}D^0_6LzZx|3(LR_KMK*n7Qv>twSdJD|Ha>s;pB*iZxtqR0wjkO@fpBwX(# zQIKCuS@{-}ntVmP25zg9Cmi!#C86*<`n)aqTJBt zypDTX0IA2a`W%M$PAFo&)29kHcxUzVoY<>%!OijDqI@s|McrXlMh!^9+^;gTiiNNO z(yE}rJJcWw8jxMtEy>0DK$o&AsPAyyK&i=Ics491x*1Vf&pM8*7wf`D-jxn$-C;J~ zju;^?R;{ygY6vkFXT0jT(iu3v#C7iekCvp=j_=$!ZfNdq_>Hmy>HjTM^slP>{|{$X z{uL^E%8UFDP|+`C_OP=)mdbc4XbYes>_7#Nf0XVrbY%KBsK{RlD*tQ36FZP|_XK|s zGX4n?aR51Y{|HzaIx_w{jObqzZ2!j!Vt?|S*x3LA&u=M-f11J$R1Cr|H2eDAeHndbOtyE$VU8U$c*t{9mD$9+4yhaAx;j)e}ad8GKYp7LF96;YzSfW z`s34MVEUjr$^$?Uk+%V{unSG8m@7qMbL28op{umCot(lw>8Yf(kJEAAx9e7q*ePz3 zn>jC!w=uT?N04Qr7sOAb5ygv)zhBGr7Himw;W zqk?`Sd~ER=%;lkWv>9-EcU9`Y#yJp>;$_kyzgf=O<8|LCW(0SvPqnrV>qlS_;W=eW zpgDVm*}KKuy_!j&&gSaO7ts9ik?xWGME3x&q2OM}@uZJ(b6+l>{6D2(Gp_DDH#Apw^S}M@%Yc$=Y_X$h8CIv0tD9!7B?%kNO z6K&jyRfoIfU_ptcbU3zkOJRI zPS2MsISUCoUSh@bs2&!;iwL)NF`5@%5s!-Kc3GUdqFG9^2JX`%-kdHi({^O7?jbEhWge z4?AGUe0i5k7}qDh8{2ZlOP)c!cQ@AnMs&nqYu_emKxn8)rpA`+m(~e=P2l5sTjC=& zYAuR_OU?m9*ew_=fhZ*Hh@2T6koi6&0C@s8Fn^Pe$Q-eZzi(eUZ6IzN%I=dwDC(>=fY;w9X!JePv~sy={eD1m~JC zz=1l7_j@N-5Nn4D|5-h>qt3|r^2Rry;OQ9b@@o{KRW81V4PW$!@|wVjIlHgY*bdx~ zmA!-htpEhpD=QI^`h1Jj_|DG_6(RWAd)`Zm1y*{bUYI6trk^7(LlOx0bm;`TWw zoAEvCDd=%hJV3TJSbOw#3!*lJrni=NkH}<3% z9lb5PcTTNa6{g9bB)L?r9JA8JO0vPx5#`dY0#M>5jLv5_N=x$(ha(JiVW<_IDZ~b2 zHVszjR>tnkR|0|t`|TF@Gv1C*P;Bi5j*s^#r6)`rG~(B!rSi$r$+@uXw;aG2f^!#^ zbDh3kaa^k6DDP3*x5t0w>GK))2x+^pj*uRs1SGWcM=?hK{*2Y`96EhA7F3_3W8*SN z9Bwv8LOMbZ`z}!3gC63_Ibz}XmH0IO`0=+ds`M&4BaBFa2nyN>j?w5>OY5Ef0R=4s zyL1zjsyoj?KKSU_40qT50RjIltHFjwW7NDj4MqB0qEuJU6OboTtSBAF&h0jwBO6@$9r2|}LA zdq$6zw=RWUWiUvv#geo*XB-oSB3FQp^g^6qxl&viGnKeG8)l5O#-f_*u$`J$BvZXR z098%VSbY8Dn!^K<{lv)frr;q2z5%yf11(1wbfx1V1is4a4Zqe<=x0iULF%Si)32(e zJE%S`6Eo6ZuRdm&ZUY-V3JlVJ%%_4w8hj*UNpKpbAS zGR%ehw?ndV(?WTe3vfvBR+$&J1eBRQ0A=Rhb(|4%Kva5LYxY1rR|`mHo1oor`QCXf zHm0L>;toA{t@XWA$|Bve>g5=p)KG|@!8ANXq7k7l8$3k5L54aDIB1PNp#T~Tf)nLp!N_+DFe0}0l%PU#OhVs+W<-&-LPJ)Lb!bJiLG%RC!O)c63W$ml z$ulazC`&&}Lo1eekc0uU4MxykELsoir%5lDPixBX565KbOQ09y+1Z zeREDlFl3yVMK2B#D^K(wIk#sZkuhWf-6GHA8CAeQER2Dp0+_ON90(fPQ}-7J4KQWp zSdd_uJWU0#^Bxs2c)hKMEUC1IQL2-BGvgm}=>1o9aW@YvI1$)+XAe6enc6iS=O#ap z#B*xLIQw5oZ%g~XmQ>tSj3&ouBdrIiBEk?rtB)<}2TGpQgB14V7|GE4T0b3f!o1W& zh!Yec>d*0K)6xygzkRDTP?$6wUAHcY5jClW30<|}6r-Q$2}4U}?&vYKzgCWxdY}9n zL}^oT{lja?FPn<~o)v`#r~QSnArzmf$q!lH{uj(VSlu9q0_Jt&?CD*D3E^nc+Gk<26XX`hky+UxIN&!ujb3hab zaYTOcabv!ix}DQzxkyvi{=fw74BsHx5gFm519Hd*B}9W{2V}GklkRtA&vc87QpaR# zZ@vXVbzw)n8%e}LC~twl4zVm|F$+>LvukvVaXJ~PU?vMYj4V6R!u3XL0)L_01f-_n zb+H_A#GoA!lE+|oIVlF@OIrXXB4oOipPC>zHmn*Ba+aiv6Mo&i%~I{WhLTotmj#te z+!+0rZtT#Z&@pH?wBVJ4AwvQ<>4O0@Kk#xqzuz# zWpo1taN^F!q{FCTYJ}4{4(~LUkex2Q(L0wDb<;LoiWlferI+dyufN72qZFePBfk&@ z7235A3K_^G)T9$3%nbz-$wBr@L?uR^Pyx+U3~n=;*gBDjg{Y1)NzZ~#&LhsncS@|x zOgc*B9gdpeGH2tZ6{J1h z4LmhHS*QcLG-9@D;A7ghr1m9IiCs5>3{vtA-~!1S{?Rzd^9)j79E9ODZ3G?*_fVTW z6JwT|-9ZQjTEZ5+a?u)PQPzM2)nf^vc;EowdU|l&1^ViNZ*9LQc2)p2h%&O@tyOY( zQYUp=7JxE#(|S{|ij?L+b)i;Xr%w9j8=ybFU>jPm)I;ZYg1RG3>V`}G1RkhyCu@p% zrk^rqnW|qLX>C{f=AAw>I+J%EGdw@)K`C063xiZ$4s%m>U%lAv^Qaeev>Ftg!(9DT z)8;O5qUk?yMhgtXpLMzYtXEMX_RjIu835B$ zH(B=p(*-{684)eebqH|-BLORp{^yFTkgZ65v$dq$!F4u5m7W~cTA{<}W(djn#t>5Q z@d*5sBkTy^(RiBV3WpP?&cBk#0}XWAqV$ZwdShrjlyan*Wm^O&oMu{UOq(gEoCmKbb?(CdUTq-fA(dbZHa7pZbBpe z?4rx17GIf0$+0un_8!n^@)@dodDmtlA)5OGq+pVOG3q->wvvyC@viP^j-pSO({4n* z^gT*U0l&d6do4A!(nGX(uKN5lmhhr*mN8u3FR@PHqA@d!G|8JE<|eFMi(|HiJBe9Z z@#C`!9x51z=Nf;HQrSPqjN`tOkSjfosjH|649IjLE}ioOW&rrq0(NC--g)1A&nnQe zwTW1x%N1;iOMdqZ$TsZIgDO6n8j{=nxn;aTqm-tF0BB)F$hHcGh|(fh-@{6@yjnPr z;}M+xBmiwO{oXeVSxWA&jU2tN$T&ierns-D&`#eM5v@&~JDZc~uT4!pn`0oUo}cgP zS!l3vLiM_ZFmX=S`FuZU-;0U(eKaTga~Vej()~UQ318X9NP)CV5?o28Q#WodhOof1;uXeZqb9OQumL@$f9gS04QFCp6!wXV+?4o2?~K1^?9 z`L(xFX=`HTHutq6F7rXV@Om^b>QL6us}ERwT4U}ph77f?-1;$LJki`RBsjrUi?>nR=Yzel{D z^74Ke35T8eQN903r0Ws!0yOmh8Qfw1H^9m-5UT$R%=B3C^AXPZE8@itR26ul0sRGL zV*WQU6WcE^h3&Vhtbk-06B|Ir`fWA#_4m$LwDU95^}wLR|mIk7D};iur#r zhV_w^^;F(~@wb|&PZs{|8nJADmEZcm#3lb?4Nxui_u|G3fH2u(Zr|fX{o$Uc;>J$K zj!yqHCI8A}{2#-Be=*{bC-yJ?c}jl#tAF&Zj2(ca!hbd97hsZqF^2K?`m}^VY1qdk z&`0+?a@zi3ULG%#H~%El#{O5(`o9GxSvmf>iUGh|t4HukFU{Wu(fWJ~2?OS8!h8F% zOMp+$R?rtAa`*w9h)gmwyKqNwGz@{HhIh|K^?kH!A4#;zvi44*w>6lzPiR3yyg+MkM&MWZOU`S11Q^Ru){Y4fd>(~_&-ka4uC2K^g=BJthKf>qb`aT zr80}c$wD^Qx3>H?H=P8nyq*tP%igy~;2$DJtVa?vcw|rZIuC2^pbtyaCy+yhof|ba zMC^`qQU^o0qU#08@ znz0L*=7TQO-D(ABq7e=shM^)BQPjxs+uC*W?~Hf?TE6CbG>R6h*V_o^qA{xOZK0bzArcy^n7z>)lP?VU*occEpa3H-Wb* zB40;@h&F6XCogsnWqN7owsUEFI>q%j`>|$v39g1)gr&VR&0f}cUUg0W#pQ6h8D)H3 zr*MzR;{YkFUa&Sd+C%=WHxbU%Y)qrsx+eD%%R?F5Y)jqf{q+2}MWdUn&bJ|MVN-58 zulHCE%MXU%;~+k7|Ex#Me*ON-QeB$dWKcya9HWt|dyWy9^;yU8F_? zHVbt5%lFQBI@2_7=e-bAa%b5B$5(#5!!Lz~)aGd7QP<#9@2Q-_>n1p$yxCGZ36(8R zIv5Eg;t`kE5S(SonW zqTPop zIzbxAzOtr~Y*iRDBrM4`z^C@hj`=^xEV86NNo@HD}lK4wBo9&is#w|6Bjd@}A_N2Scp_Cl6> z>+dhWi0Uj^V`Ld6(8u?CXo zJ^?9~S`J5~sfA%t6+}ZsSMR^yConPu4^cri0Xip` zyKz1wK$wErw?hKu;BEqp48M7f0`BKzK*#|CSK@Av;S|M;Z2k>1e`JdLV;WYl>Pll7 zp8;XTD*{yD^s18~fk3g33YI7Cetxg(+64-R<#%%<5;UOIUuzZ~Es(x-eV&^71O8$; zoIXElZEx2f`?$bm-=E7uC1c1a33i3+ldc>E>St|XQ|Gg|INAKT!|K#8x$EKFpQKN` zQsr~?a$f9q=_R>*3)IBZnR#Xn8_)g8>acb%kS*us#9+7$<=hYXxrM7Oo&8{Jedkx` zLR<{i=jo*+*dy5Kr$)Q={XA@Z!j_&LL>?xK?3S$CT^(+m=wO7&$taXKDJYaFzz-e` z==PNIvka>e2zf45FiIR6(Aclkfofon@5D|?f|z1a`#GfMrHUfS$;Vg~LJZ8i4rpDr z#cb4QrHNrQ9y>M8MgV6IHh!h@Z12L?+lH+Xrdn-Elmv|pABKq?9){VL6plY=7ai|& zhO4MY71&XS&48a-(7-lUqVgRtN44vx8_4^F+J~V*CC_rKm@z!%_L0WgXX`J^#Ytgp zAPWSae?0@0(yR-s8oj($3Uqte)WW?csUbIyz!l2VeKX1Iw@Z_ddlf5EmgmL65cBmH ztF52yG5n`1_I><`w9|{xFBc!;VIjk)J~T1d#` zmmu6~Wq5AnyGf=3Y$x!2h_2*?Nv4^}Zsdg|Y40tzlJZT`1m}jB2~&YLV2hGn$+b6m zgt58O3LG!+^Gwn{Oo9B+zc|l>MAA#*Q=063~c3 z8ea+18MnP(mpJ;obayqX!g7PZ`QBF5tvLrCF;Jt0-`Y*jGvehHJkQa$E&dK18twPh zZ5Nqfv;Oos6-fb2RWG1FS#1)=4&w%nM+L~UImk!LJT(PW{i;czzlMedgg}i5T9+(u z>~{$oUo;~vfFn|)?__nz;!avEiYKRV1j}2Zc%%e0JwIBxw2EmGUzqSXc~i|Rd@#{s zxp1~Hn69fo7}I(;cW0FI6>FFIU87c-OgBy~PbVCb27NV8l0Sg(CK)e(`uYr}spRV% zDs3&#+@e(dQYhVM?)gVe`sO>gqHm5ZckjC!Nj_%Mef}ieex&-@_hJ2$Gs}U5cnnu6 z{Tm#WP^b{OFrrUk<1#T^^>$pDAL%z1FSAp=b50xe<2$G+bc8u@@#U#_aYUsjEv8uq z1h2KpFHL%O?O4cBL`BOOG+UA|=^J*Kg`GPD?wG{joo1}N;olWT&S<<`N}D}%!rO*p zp-3JnK6Ba#e&vxrRw>dpfE1uIcvXTAIv|XoBCWw%V2Ujh8~N?_q(@c}t1qr;$}Muz zUFF$3okW+ZZavCa@{6i>DHmJdKbVVjC38P$_~AP*hg0rODTxVsaLK8dsNJQdy}E&u z%Z96Cl#fezujqz`>gwXiCpq~93kb7f!UUvc`o-Wf;Up6<3J7hP1lv#3s5MU3psZ|n*cSIt^rBj-`)F}<2Vbly zn-Tmk6t2-A-n=Fq%;kfeVHPxIwz}$IZ`RXWg!Qz(7QJqei3O1?yRgHOIvQ*ucr8oY z_LbqHg<^G=cA#2MX>{gGL4c)QQujt!L0z!C7DJL~9Bj~=my%Zytts2JLZq}tI85J$ z>(1wcbcM4=n8-1?CY>(Hne-)@hSvSMm0ydH=QA4toWLl&SHjWyQb;@Gips6=-ikN9 z;SuMl-Fn5kx3enC2k6{nv;lb{=feFFTEcAg@-mt)>z<)wB`k?NYXqI5zZO?YCyt}Y z*owAgflRe6!VQ(~W?eA@7hB0!Pk9%!-oG6#V;uAO?Iy%JNiJ;{ExxgI zw`dHF3;GA>Pnqf*Q@zM8o%-lZ2%dcoY9+HK68St|Tb1fRA99T(cZ5W1^Nb{hgi=<^ zgi#`-NCrA@1Xq^wuE*-W;)+d3Q8uX;v5d)}uuzqxSRH9oR&I#fV{fQ|RObIm>3l+J zL{0BMZ*2!(eIj2E#^!@9njySTZpQ0i}Hljs|iB@#bSR zexrL?cXxJ>Een6EhAcH7%@0j_QVPxaMzAIs2i7*-sNI@=j$J8J8YO##3-5p{s5&nq zNN?5{%jU@E<_Aac=WN3k8Ldzbyg5oXCmANx^g<(S-+TOiw0P@bI51jocv%OsNrhah zhs0Rg%~KsYgo?8$*`vsM#Jj9PNq*9FcYg2A8FI8_;j5=EK=;biUfi@D*5VDi2yN{_ z2@!g3_5fX46)=BYU_O~sM4KXBJn=fQ88zB;x8=|`uTDftU2@g9JB3tiyM)$_AU@2U zdEmnNR!KZ(=F1_QQRS%ErHdxRH$Kh`6;aH#VaNaZZpEZW~7kq6Gzkgktq9dK^ z>AqczYsPk8FPRx2W47Rvz?Vq0hwHH2+)<$_90Z;#sAGhwoXyKh|C*7BqKrg{Jt09G%^ll#f5On;*2rHSA zrk1i$tcKwWshQj)dfs;i6DG~aez<8(@#XiK?HkqGL^lRj1OzJHOnU1-CjJT{kY<{@sYc-C62vS8opO6-9}Qx{zMWxS@6tF%IC*zkk-xV zo^Cq8O=`KnNS7<{bUNG$dp3|q{^PW&Uh4+#s`jWpSVol1qmuj;)tZ#krHMoNL%+&< zn2aP?;Bc85-zu=7~drD;oT^7L2zk6CM}4C2*si4$c2vNv(=E((ysgCt_YVc z^OFxOwtq>y93~7TIMKbmt^!3daT5L|8JaXNpPPIRJ5?s4FdBvRdRr}+^{N-B5;mg} ztA#*(n&gy%a>?Cv4hmJ9YLm3D@B9zX&l{<0*OJHbQtuNK4O>hs;Yw=Y>E>q~bmI#g zkd_m6`{d=Tbw(GE(a3kWyhr5>Zzo7O)m`z8PgEBQ-&8TZykFiaup}s3amzNicbY=Q zQvS3^)4haZl-dBIp_iY}PC;*2Q{BOU1B>@fep4(iNOt87wr?#fZtVch2jTDDkiE?z zqPVqSSv3`6%OT{aS4W@YY1XkTJez+okx*MIJ9ED>tN29HV6HXUpxk^2O**)2ayYs` zP3>Rr8=_~cV+DIHt}QHTNtV^2T+FX#L`bajLZgW2lS*HtU9RH0K%H*l=bC;f&-x%W zHb%Ag^4EsQP*F-OT}1?@s|qGiiDCB&noLF$x!=q@bIG53@aK<-QEEZ3`2g-iT+g}s zmG)ZXUdMPJ{abVEe(Xb1U)8BeXg}y}QtWcVKgY2$$7Hf!m*wt5nl5VuPx(reG>SE2T_`RQ%}}(;*(JCK z$P}MsHi{IgD_i>XjcL0Vl!R;?4yM6PP15h>q1}!g`G*=AvL4r3Ec!vfO>*{LQpYC4 zsdlRG4r$Smvs+zp5+|L@*z(tISO`??wsHHk`?=t^nRVoDstBD}w5#00SAFlVkHFC8 zQtT$yyyxBiVb>sldi_C`hI^m{3N-z2)8o@j)W%!4$W?ddpf6ENmGUbu>Iegk;2uT^ zCvc1+>(})osnLmEXi<`UP8JykQ>F~dW-Le$+9$-ZgK1B|C)*rqXUJc7JJyjde(@~M zgyr2$m7B1K(H@Ma_R;M%EhmWq#~gdaK%^N(#Kd@;$NQRjY!9-4_i_9#ZndL}0+Cv; z>}gD*r=`VpgCm-uJfgee(GJ36GM7S>q276k_T(ccZAMrE@Xlp{1w6)+sd| zN+7#RA(@`NZHx?Gyc=IEv2+Maf`ppr^29dMg@Ef}4#ZI^73lr}2eruX)+P;lQAGsY z=4i@9BebVy zuq8qG=re&fMvd7d#1uEjEpa%G-n$p{MWKn>qG?|aE$9ks>>&%!p^c^~mj^SgoDtUx zEE)}$NYhAo(6c{-pF*xvwNI*pq3wMS2Yi|T`cQ_cOD^S(1597@fyI1IQQY747Vj0m zP>{+;xu%D%-ol=79HSlwvRopSA}lz!K6ZZucr|m}CF6Ff;DqWgV^$QS+4(br2LUUbgjzXlW+1t!JjJXmL87t@x!)gNTljT|NF) zX)WUqW8d0YZ8`6HtZ`j3M?2w}^bbFN@Ywj83~m?MRv$FEgi7d^RxpHFB{`-PIr&K= zB09jjDwya&XVwc-c&Zq~_gTw@0TZd6$AmW(463>u;TN0Wh*V9TJsx;uHL)GlV)`lS z$|R6`n0ul2^yeuFijWTN%T)TxJ07$CGHykx8JNEQSOOh-$>q-|3H41tD8OGTLu1dQ zk9m9=;m*mWQYhE=>s=;3v<|7cG4tpbS%l2sc4m={&0R_Py8RyMTQqw86s6KD%-W_6 zI%NgTU1_ElXo=o&#tN^N8$_c*YYCL}Z9h7|=8R=?<3+wLK%>SSBxQbXK>wbJFyXZ( zRf5BW3T!z@Ut5lU;xpqfA7E2lRJj9~Fj*<_*yME}-J?6c1xRy#&KA|!l{*NQH73lT zG=G;ha}TwWYJ71mV;&Q~CQq(pUfYelwq~}nxYaz(G;V5_0@(#QoIY*M1qG9_Q^$d6 zbD)yFvCSrsGv4{C5utAYM@HGeg=Jg5Qa(@@qq?yQ8z#^r0N+?K0ZL*X2#Aa>@fT!*8k9h^Ud42K@PeAW&2LBKMf!J&x` zs&1YJYG~dAYVGnP{Qet}M1{$yjV%(*g~^c+w)LWFn^Jzh`@oTIX{w8oc<%i(5lKV! zXAt<@oE2V)0^2KOQ2N<%ix|s+Nb+(Y1T>_E8^46<`$wASC6Z!ekq>fo8jW=^XmByW z_wDyFXs|I#$0NeW7=w2j%{_HX#}jq7A+a+^H_EOq?h>`VtccRrTnVPCHYF4jPm519 z#lbM>vA%=pjEo|m^rbH6PIk=K7-1kBCjmxidm8XnQjMQ}g_T|+Z3-s26!g3P3P1f2 zE2BhOJWTTbWSyxth6@AJL{)Ho%yD$+kJwm%Y`L)dF#LpAAkJHCtao9IwamOs@D{}j zdsLlm+SYRHbL~CTSq#e|OTxVzRsdvK@%}Qt);Yl#M2%$7jK31TPb?mE3~|uc$p8z_ zBp!6`w`QaaEqH~&S(tIOlMzACsEeK^iAW<4TlbfhG~_mrVrlu z8GpAA;-+Oj4A(Y7_k*h_LWw7Qe{CDQhAL9W(*Rjon7gTDU7o{NxB#j2IjW9I}UA&mZp1~t?o)4o+?XP_$QVE5ncFT0|XY|16J1VFxgvdyl zM&@pycHBAk_E)jGvnfMoch>8wxe9dci zu6@s=@u6U84^28C1{s-A%j0!Y7u|k=*pl;N(pg~n`#P}Bkgc9{DKyi9UCf$PY!mSl z*_qG}9_{u@7M0UW)$P@S(^l!@LfF_!ZjHCFLCS>5tR}XMUro)DoAGfLWH^uZJFE+A zR2J;DZDgnC5)@ZirldQnQ13XbxF_CCnf}&>(D=T7s>FO;$(_{*^jnCzS-W&6enM3g$Ft^dA3W^Mp1Utk zH<~-@>Ah4Q_h2q3YMb#?$Z}<~QuwWX z@3xCkk@AsTr6MPfu5QlD-EpeB6Jy)W{#_n)bgrh5g5#}}ZUzkK9sSN(dkqj@V;azs|8i`_zbzadMY&-a>ROx_5L=zre3f zE3@Q1N-3>=xbl<%si|a)a~m)+l}|CX6brFYz1LKI(V9Hfg@9i-B9d$RLg%H3@79tz z{Fxbc7RHd~3$%WVFT_(K_(f!NnC6F@ugpM%*<-!xlGc7$R_HphdofNwT=JbQdg&}` zd==sE+PfSsXl@TOieLC~h(9*}&A}#OpK#FI^qI@o9#6vX(d1!Q89yGRw*j;;E|G}K z+_A1?+y0f#3j%zI^O&qL$9#!0Z#kQK+kFK_qMDsOzSKdqUkPnG47Gq|u~yfBUpifP zsjAjpMw8H1HM~;`! zG5i3vs`swB(Zc@%nT63MbXqXNc1k_5`_KitRcFR447oXP&=c1-@#WU=8myp9t1k6Z(!g$S#n>-wdhp0Uva)&;=I`Dq>qk{|N4hiTAH{F7e zA-n?3DJ52IzT)#6*Ks^yBNl!N@)z@3Y^LueKblP^G(Y3|vOJdeDeYE|o-SSBuKF;v zdU#vGO7Lw(%(z6OceW>`gl^DTlK4RJcuLYfUBv!%bSmQrNrC>}mS3{YQn_mgibM=O zQl*+xq$t7sk3%6;dv>(RY34j(D#Tvf-_gmdUhh%YK( zmbM=!BiKA^>_f!!jqA#PBA4)dak*CHh{vnH|H$~gx3SX5IFpx*wPNf66BFF@H7`M> za%*l;P0Swq!ky4?-{*I`G>xy_%RiflU^khF3C9pL4t5WYI#u&~x(s50K9me?>7>t~ z_Ewnbj#|CK{~9t^7c{&z)+O`O^*(Yk8H$fp<7}-`mUfJ?#Pk8q7V+%Ig!J}^hug=M zU8;gFD}CQ_TH^9r7)`f}d9LPrYEPxfVw+vo4$2O0ZTF&Vlo$^^Q|;v{94?#E?d6!TdYKOyT4hWZfzQ|gJ_GBD z6mPVSV$QXPw?7bPw66EW*8?5mjt$rDB}PB!6-S!QQL$ZQ{f-m&WlHDt!AG0k^3`{% zxf2IoPW9F|^CQ`%Hd)(w3t3&m#OZhO_~VKXt@j8;nY~xOWMf0r?w&~M=m%vXY0KbH z6+66o8a18NnsFw0_CEh$HiwVG*(d=molfigHZLhGgAF_m?0FYuT5Lr zA4?FA(T3h&+Y2lIEr;djg>A5`^9NIq3zMDar0%-}$Es+E%COLkBo*X|x zPtKp9C+E+R0k+a_zYa+2|K9jHGUv~cIiE)UM~L$YzWh%R=f8r||6|q{6Oi-y$f{x| zWaIcScZ_0K*)!|jnA_m2d$eBO())F`Fh3TY zeI!i&?i-fh^MwENoIGCnzs?ROpk~Drq4h7G06_aBIXPlU;TcfCF?zF%hx-+mGtcWCpBY<$M%9{9DoNmqu1r_Q%Nj(<7|xKumqS zZvW$YVf>{rm6a8UslTt6$5_Vt$ijY{oBwRbFO8|JKt%uDC&0IltUu}3|JjOP8c|u9 zA0z6MPyX2LSON0&-}KBcji{_lKt%n`GmkU!$iDu2e)$#g^f4^}_{TxW%*^?u%E1Y= zfSB=gPw*Jw|K^PRig@~`ElhvxyG$&=wF=a12kiLIm&mUOq<Nj;g1dXPscF+-A$MAR|M2QY+>U3W7GZ3F${lq!)5#xA@xr?IR4mh|Cke| z#{_}D72bgyod5kM^QSFetEQljstSmj+ZOMj)U*rSvdA#WE&9qWf>Im0ucDnHc`qc7ewTAj66A?{2wFzci*Ya{jU9 z{<&rufSCICeDh0VDkBFFQ-AZ#)0{AJKE~9)bDPTa*O>a>a-3KhS^rUb3E(*4)}nZ= zlqPP2*u>E4_!0VMt9#256B4Y>qWi1(ay%eqyOt7rxHNdUi&+Xse@!hoG(Zat%9CIV zZKQ{Ncxauhb7fm|Je;0VYBB;R^L4pc>q?so8zQ6=!xcPeUb>o^q^Y^SCP*c~S-WOS@dX{qAuBBo;vEh&-G0tGHK8_Rh~Pbv zcERXHimNsI&pq2L6iWBkaed(@J*=>8KSJxsH3}R{;$WkM`a$J^g@4q}R)Bqnxgd(U z#uC}XKx1uUnUV?HN*~%-g<1d2=8FmzS3JDpjEH@>s-VcsyMYi)-)xyqVgs0W$L~== z@XcZcZAj)x4Nxwbs#46tshMESLVH88(9>X^yPHKl^FTGt%!plQY#fQwqUmQ$>ukUE zr}Xl>Ovct*Zgx-#tnYVczu(zm9`C%BlUwnb#3-Oo_ZBpeSR{YhuxL!5-okUQ0mC3< z_A;>iYu*dWuJmi+J>myJn41~OhrzECt?Ay^v4cJ2n6L@YH^{bYwd)89lcawpbgxiY2n=vD|OS5%w#ZmgCm7tHeqDy>$ z>6zC{?rOEW5`!fJ){3<2R|CNhd`3&I{MAGkcBS-J^;U-Gjnjj%T%vCZ(@RwNr8Eqi z%LatJ`xwead@QA-!>?NNTp2*#hE~Dzf^)gxq z$=*m*r?2uptuXC#D;AG-pm^@qjG2^1R0T5KQA$HY6V%3GuoR#B5>3+XTAq*+x(5sP zou~%_nMs3v!Z2ZQ_($*WGg1YII~Z7O#Du8icBL5aa1(H-Gcz+YOa98f*L}OEXZ6gy=|69@Rw;8u zRGv5)S(zEJ_dX{c3IvNOjdj~AG3D)g4UKFYw`|Q83ss-B%XzoU5!(2Rj+rgBVXde& zALZanP<&{>fO~yU0u9XfuW_+L4cCmwohZxrcfLYS%0GlT5;{@i2k-IEi(BsaY_vsD zv)S+)W(QDbcbEr^t|!p(Pr^`+!(pRWV|r47x)gyACJIC&`L<3eVbXbJH`XrOEuy+? ze@j~l9k%`^)V~jc{2b$3w4qH|yH$9dENFAr5M~y;Gh+RhQxs5|# zho|j+_{$q}jGw)`2g5MeWlpt{kxqVX&;_apNsZ8Wx1hbFO2Ftui!YIbQ> zuy79ubMo7FC^K6};T0|RD67c@XzwN#$S65k$QDq)YA%QfR@APd&b%&23a;j(aFabR zn--(JbwCAycv%Vwwys`F@Gx3h3QewZo=%#=da-DG$+>8<^{zIuOn=-J({zqw>0swW z*T{+L$*Z1rwMD^csS)3Fjb}Q1SJ7gJ0^99hNNv_!|8%Lx4Y4}ei>_}?4w0tsju_fH zfJL0vUPdErun|SlwLDktzPbL{G>zP!h(_DBh>q`|cb_m7or6p=qYOH$iGjo>tLdrq zYiSmbgab9Trj2d#9(+Yn#sc%h_ISp(%syB0+S!US*abIo94#5*J?ASqb~9R%a=vTCfo$!^AH2ewobgnh(u^ZpV6}nE__)eQ z_niIf(r}7(;n=yN$I%>|ne&_tqQERy%89_W9v8t>yi6lK07<~3y}SxrT<{F7()_e9 z1BK@BGA@uExCxhK6X#E%cwPLMJAg1*N;C#0J8L{4+!$K9Y-~52dzm zD{MEG5Ed#+Fv|MY_^Oa`PT6Qb6yCohEj?=108ek*fb{<)&Dj312qL?6j7P^yse7U% z2tcA;4F*;FIUjKbrXA>eowdB(NNd>TIEv^OU5a<{)26k8HK7Ew#t3p zNcM51KosuCAJ=?Pje7 zYckztVu!UF;r@5ixT$+v(?o@C@Q>n%Js*+GvsG9r`@O@JK3xjNyG#hsDIJP>u@$P6Uf7`Sm1GHN8PQ9`z3~iZdiNdJ>{mR{F|IV{`SpO~r)HCxjTRgP%2LNYd;T z@@~4Q309Ir08J4AnhO2dRIc$NpdeqE$UJ^lx%UGPQk~{WXmJHtY?zcKVCQaBq zY)3^V>=7wZtMo(l{sSjcU7c|9a@qZCS!nS)Dy8XsqUEF!Ih-HZlo_xYtX&-&8dD0m z&8A0jIU45UFZZA=9m$(`qRcJXmiic~l6D`aLbY_I0PG~1vma$I?;x48UjphqNd$EO ztO-z{mhOnX%{*4JG$-uc*VuzKPXk=2LJ^mb8gra_QjRv41}7lYp=TAcBT~zYOZCJp z9q|Cx6s4s@s*qbs^b1Ut@UDvba)Qh~Nya;fLYaG-G^n2&3JW-HcO)L)~*%vwtnjk%*Mo%%3)XH3gjc6V3!IWQXEWs{ zp&2>D-QG{+C_{chG2z*&ts%m1+s%~J-}u?tqO>sT1fGLgpA6ojb~H_?ncIK>Ip3M2 z-L2ogtLpTVo~~tSOXmT+H39+IaTzqdHLr9YhPw*lTZ}VUaq^&5dgo>pm=bdr+L)AW zVMJT8WENye8PrC3pi{|~+h)|tMK)o(nO&w5f=N~w0>`M{tihBrl5$tGVn)K9oY_!G zgIfp0^`*Re2h=Mrd1F{6#ep#doB-C%(j8S_wyYC-z~=xBoMu1>midkU_v!;>ba0#? z4H&!ghU-ugqOiVMW0KK{f^p3wLh0r^8ne`*Dd`EDD;c=Gtr#!rqKsm{Q=TWg5S=H+ z_kwqEP_a{f1}qf&H&=J|@Rx@8`-pMY<6u50=QmyWtU>P%2K*>RTy88fayknUS2Hy5 zeIFdg7qMW&0d8P!>Ka2ZN(y@{cUNINF(CS{yE{TmbH)1D4RvA}p3Js!fblkm(kIuK z+nu(;e&%*?#0|n+32iBK4Mt%GyeuJfH1=KXG~!q;Pm!W!Plf0=ygYrt3{|*e>S<3z zd}N*1>YbN-PKSk*+mG*wYI89Xvv-6sSStY{##foa2J*sD zf=2cZ4)19`al21+@aCGN%W|XpwK#JNEuW7yy5m6z7jv=k8bP=aDW+gFUfpbi7gq=8 zC|dDq_)_BXscpzzhLN8~w6DT{Ts4lFA7PF@GMH92wk4Nn8T82V6O7=6&0oR?D&b>E zYcqIxCvhw3ph+`SPq}~B2BK)iE^(T}NvG6$T!Jw((GB$8=fk|8NgFQ@MziqEL(N(y z3w>9vP+Fnox`4o}GcgNJDh6YmW7T4XxYmR}{^tP(T-$cwsLhG+gM8K5dE%LB~pIBXp3D7VLMUUTjHs(EZ=^srwX43-Ci zo@&iiAROQ1H zN6OQ;41>-Zh6`5p)wUhO+D~o3*Y`8FYaE^8k296{F~XGjmSV(qaWhV{dzhtA_!+Q+ zJ#@AhO8^Nr=2hWaq;5(e-+@3x}%clPcd^%ElwvsN22_ZE&PP>9T| zJdO;bq(4-jTpk~0u}tw=)ii{vnQ?0@Cl>gK#b8eH*U%Ih&HZ6r;i&rpX0|3g%OJ+c z;K?MhZ*+pjnt=4p{0Ex*8g0v_ELnLJ{t~p$bz2DChL>qM z4YSdktv&v?koce13+3{LpH*cIvz7p_FpJQv%Sv~yF)xJb?8GBb9gQ(MUzAusEqRt| z>G+5fWFzJlk;4HxJK^2|It8{G>G;T#*m?ulUlk;W9drtF3*h;Z~B0fuT@ZL>7Npgy}NZPoltH zBpot#4xNh8%C$61qDWf=FG$MSRJ2fH{U+Tmu~6`itHqHT#{%%xBX;pBb-kqbFl+cT zJ#@Uytx=slbOmkhI&EWg1UfSAGt!)ejz$WDpeB}N2Y{xB(c-a^KZ)o0~ z60oPn>UpW5I#YmEEYt)Z3e+~`nVG+%e&=)@eg8dP_2Nv|*xPJ!mv?0BB^EHGn1Oro z=Rfnb1ZM@L`Oqx)xGjdJA)G;88&g2D%entyNO1f1pUH3lB+Y+>t^ZHRa5#U$Sb&&8 z0O<95=TG?z3qWP?XVstb85V{=dz9! z-Ay;TTmFS8|0?-y znd!IXU$Ew{s$Z4?6xUyIj(}wJKhNV|Co20Do%z2c%>ORi5`fkDg*_4gKuG{R3jjws z02umT)SH2$z2!gTo?>DCH-PqxEbIi#0J`murkNN3!2KVbB*2|t>9GDr{rxBH|2yD% zK$59HTl~w5pZV|qU_t*oUi=$ia%KQw0qAo8{QE}=Fc!edi_HI|ocK?A;NJj^GybG0 ze)c)Q0RVUP2XDg2@w;1?IDV4D|HTjCpC3>EV>ue*p9$*#e9hmyVEQQ$_;n%vTVDLU zXa1M>1KHlluF!wS zgMS0B$ox}E1o&eIaCpBx07QZRz8e1>Fa8}j=g-W5zr0}lCE5V^1JLsTls$koW?6pH zzyPX*S@t@Z%qsj&)s6)j$dptJ>t4P-OG-2i zUhE_Dt9c=Xhsg#7lLnYX$e&&HkAL{_Fukj@`54i3{o zaeaEYm?@IwW>;CQ zaf^5;=zr~N>*A~(7_V{m#6)?r&ARk(!Q-IX{)!Ku1&0+?yRcd%=>b3bx-_&?=TBhj^*U*I`TPUDjim2OP@0(c&K?glkz|QD zB{CcJ3?U9nkPPsZPzl=8W0Ud=YIR2>0aE=3uUa=Rr`~FIFc@oaX>~ zx8qNNPDlogtb{bnJ}ekW^-@kv(^EB)z7RDLvrpk64zaXyM#YQ-Z|liHTv?EL-7bT7 zAL|2eA;5pWi+t8$Ti3O^#Gu?fD)qpR*v&xlSwfy*rVxi_1Df;Ow{BV!&Wq2E2fgnu zmzZhkfR%^j;jnER?N#vUi zrY?;uwZQYjX;(sSmSM7TYGtf!SU!(95E@2-NDD_wuE-RoN|_Uu+0_$;90Wl9Y}t-D zw1JGu`WBiHm2`*00Ro8G;jHTKgRH*VV8TkkxKhH^gJ5LC-F&i*u+rmp!)FVx_8XqF zTe4v{>LfDT1LjS#rPFanLVy|P#?KEpfpaz}*vZ7{45aShTFgXi_aKiiRAdyeGz%)4 z3BaQbJUOsr>#!*!(F@7E7$wlrlUT0m5?N)TvV_B^UFf^^ceG%#iNF(t;ByR4z@A`? zEL4nf!n&_oRUf%(U$^eI&DGI z;?bkt2}Q498YqWVw2E%7@GfZ`>!>O%%F6NvUG@OReWVOV#A9UYb^ubr z+bl5cOE_l%Gl2$9$FWXzAA#`iu2Ow4`j+cePNfR3v zpQ7lh<8r0V2@XCgn~{!&AH?3TeyL2!kuDT1gEbaO5?WRMeiA|#s-yHF3cxF*ncj$h z+fAqlPpR>QHUKKDw+)G%35HVM!T_P~WRBP2;(k7uSTu@PI7 z0@Qo6w08%x(4*cjdS%s=-ty1;<%{W*<{p}p^HMg&kXExvMD`6*44XO?hl6icv>OA;&`fEB zy$?<7No58h%-*36I3vr#@jUeN zWJ(6HoiAnBLwy{|7knFtMK{d{l=s;yIZ}ODp3Sh1{Bg5pxNi1QY-y(5Yg?_Fbypt6zfzo0W$86y z4VIMRpq8G2Ey;RM2o-x(Sh>VPDw|&TP*Vat#YE2+M(N}T2x2d1E4kHFKRzeQ#q+m#iOF+n=Ed!&}PT+;G7@ezoIc$1TcF;DHRN)Lbg#<&In zLI(7^fA!@T98ls_4#Ai3lyU8HCLIL^bt~hK8Vo(U9UpqI{g&1B6b>T_5Nq*~m5bxnza-Rwdq)#E&)UCFy``zjf_z#+u)g6s%vJDzhtMnv+2r#_EFsQ*;F_ z2DYQ`l*bm+gvhobBi&K!L99Y55v8HsyU`vnE)!nuC%G54CxVaj&r~-yYkwdX-BvAC z`C`XE(5lM3h0>inNFz5;L68`}Vd)?28ZV(N&X z>Y~nkKgNcayDO`!+la~l?~{h(t7$x7I8)%gy$fq>#SeXa~--0<%16ehh0~oCtslzaLGdmV7gkdZA zh$hTX+4}SubK_y7g>6n!Xmmh?;;Qg##Hb!#6;kUt4)*9t-TL-}@ep5Um;wCtJ*4#q z=C3$k!zzQH&vPi08&Ylg_N!BO59(qn%RW~22;WMU9?LcVN|= zAqsFKp!`y9lX(W<3!4?8DCTpG?B;Tdrnei1!7RoIi0``xrV<;D$i$^BY3(bH$`}|X zGLnv+bvrjIT@CrOy2&VO0}RX?E2K7xDy8kPKJap|w|)a!7Znb-2Em{Xd(-Yb$EDR5 zxTo(nMfM6C(&sK15DEkS(x>tG{zDTIqjD?Z(@UmnKl5G<#(p3bCF8fE(hENV;d>2# z&b9z9JJ>l7P6p{>sgBeG-8(-Np);b~I03;Z^wGpS5cb&UlwFh1kVyikfSSbUp6Vl$ z7`Fn#{3H=0TUz}q)0#UK{;oj%)m4AS0rz>r=h{n+>OxeQcAVwUhC3l{s~q(XN#aY5 z>GgHzN*SGU@%oN7o`LL$VkwqqO8J~a&=LE{3x=4V2$BY~nG_1YFcw?NU48BiYVLk- zDLxd%2HBbO&dIV;tI{;5aEchPfNLZU75es*!KE1_pM9Yc{KkNXyo{nnbSAwThepUz zOJ(MP<6Bt6R$%l*t77(m)qHS{EuPpC*8`P9a_QDC+u>xIyA{f`^V3lYu>l6VkXzjM zmTD;pnsut+Oicvd^FH9DYP$LO-p3s^28-a(bD&|8Y;h_N(|S!$ z;2Ly385YGtbkGH+-1lOc{l(Thc;M@xd8iDQ-VaE*imsn1zXzqmJ580ILjW8VZ&m8n z8c}k}f00MHX=@!?%U!;tI()f_IFqCjXKDljHh2YzyFbKQ=jfDPKis>={z@1SZE}u|53TSTqNWsAAy;=a7;@=OyT|Nx<@$w(Y5E$xRZCk2UcotcK#b`q)~p>lYlF; zE^_|pi7A-@luE@X>bYZ@JejIZ54N>ev7jv=9Stn{z?H!{)-e*huP#{CaYACi@?Z(i zS1}&M;t$3OkE3MvOeUQ3z$@nZ92Ul*%=6EC$!(S17ct<`<)e=G<^@k*kX071C;b{@ zABbqMXzFl}t$c;4?2}izPu?<#J;~negAe*ezDXAIV!msgmn3@Ay6lf`5??hDd2!Jv z>Wv*GawV$9{D$3I3B>rQjS?nAJH>r$-ka0{L;oF4$$8F)BN*)pH@O?SDjRSA>yr*q zfSqaMshWiG%qgAJo2i2Li<@}P76_L77p#5`b5hcx;#Q0|C4i~fr+W=>+oB^t4543t(06nRSgmVzEc zu=%zX$k@EO)5!H{9^$5JNh!Fa;>Tdt6;k1?B^tRB+5?M5Mv+#Nj93N?(?zkp0?d@(j{Y5Uy9oMwA7Mwlcg*{@^}*iQU+E^ zjxMb?w4)!lwWqmN_)Q)XwP&HZS=TF4T4=bQ+3wEmky_LZXRArJiObl(tLC|>m_DLU zwxADIsHn}gRvaD8J*&@ku_nZs7ndy$60`u)`Ak6h^ig8gx?-IZe9ktSE>(d}d$4RG zLr-=IbU=f8gZB9WqxC2Z`=6lwEX@BbQvbhz_Omem#>ts~Bk;cvG(1!9)PU2#EXn56G&qp`N4OKVa;CBwYMof|`H1!NdRvPWUA_{>zP@ z@a8Wh?QcMu{XeWjHjyTs>~C zBLKqHw|tVWD4)UY>-*`U-|^e0&~`@#%ha-LoegJ#$r7^f)3THc>%Z<8kt_@lV17j&C|tpSc|EH+bb9jIw7!&o&yE&xzo_w)zjl9d4Z+k z5O3$YNr9)l0AiNbtJyX_ebo=o3+qqn;t{#tugkkdPyY88*GO+<4>-p_1e7+u=+td8 ziO2g)5C?p9)fbm z8{`w>#ES#A3yJuWMI)i~^Xt%+YGki1e>^GBMdzYKi2vHfANL`LrXeF+R8qqmg z%dFVHf2z$)?U6VNG@SZ6E|D5R+TL6@>HSU#M7XjX9hKyU^jxf;OVMATlpA$}NW^Fo z>lzKscGXHIB#l*4<$Po(BjY})8uILc0u-f8Zgx^_xfM&Tf8X`&xhT?bsTnRYFxtVN z$!&{koUM-t^vlr@G)-6Zeo*bV^`zZ*yO=GV8TvvWcG-Z&kvTDwYY+Pasf6V-hv;B~ ztv=@iQ>H5eBUbZYLJE&aPeZQo3Y6%P%_EpVmW5yVG# zH^O21+-z*aS*Vx~Yo+=+$fiQF1AVcrs~S*peC(p(hEwOq8#F#l-nB#O<*_4o_ug)u zW<6Sx-2-xaN|AnXV}rcM+M7L?M8!j-vh^U(Z?InAM_{BW*UPGW$isFZoJv?u`hG|~ z7ew2o5TI(zvXc8hUgCt)ZJNaV^; zF@rWjU>H9vWQZ2EPpE9Wklh?9LuPjza?0LJXQIg-Uo_-+mV8#yLnkxkET8D$%Z3sK zkFxM()}*AkSdkC5{aKPChD99U&7jWE*HGYO9x-rmwHP`T&AaCPrzYzTKcT3IW)NYMHJ!I}^8qbk ze>*&Khja(J305$iBUZ-l(gn9VOuiB(Ge1Iv8s7(s>smD8$qt9%FX@cmmDV00Jkw%q zX1DK#P3cghKoGmGgVxnX+ADaedu*sQ1GhZq&1=9aojg@#i7&BIk%HVR7FRr(m8}yK zo)>-1vT90HLPy@@N!dN*4lEq-VMhDWE8uiqcQ^47vfvTIu9TGnTZ}bhNB3GOf(#S! zI(rs^y^&E=L8A0SlXWu_eT}In6L3H+aZLjKLWGE5qtOEeQ$;ZIE8cAjfX6NPeI1r$jJ3NC$NkVtqJP#ehrpHGVTInyDa(5>+>3au#)(PkyZ6k+AG&$=lfRmf(cJIY5yT9l=LbEB?z66}{8jus9 zqDBAKpM96GKaH(Bklm|daqH#_d&KkN=Ucorme3LH9F^8XrcB<^a@S9FY&>`Ht-w)@ zk?d`VOUS7%`mmbxbv8|z)e^xe{Sdm3&d#d=Tog3^Fchmq*9zLbvoNe+iG5}93jvPt zk)~+L8HAUnAqWj3@*|xZQo7GktO`eqw{;|P{I$pX;&*bxC^tgH9tivfSTOwh<8qJb zN38FEBnr}RYxSFl??R96P06)N&!5f#5j+yVNpC`~t6aNktDZv{bn@@z-#V}cb@Z*b zxJb$P{CLiUrOPgY{_5|ELjd3H$`~ zt=uhF^IPy|QoYrP66$e-IZ=IY!_Jl1w)m-Kp4~bBoK%C&Np1YYCZmX)+0QmKr90V0 z8k%2#TRS^al>NUbp^_q*nqO5-e-v(-aOh^=UB)1m=Fb>Bu7HQEu>NK_hOP9~3!WBh zc|Wm_dM&+6>b6Z-wZT7o@--`aBjZa6)Kaiod0OfEhzSoAv%|vuVwk1F@cQjn3dS)d&a%b+C%=R?0s!) zwSebFySh7Ht2Zv9g)_I{zprZrdxBBi(7BXsT2}m;<8gu3+rTI# zj!nYz8*L&k**)gbtF3e3bmY?4lJj#Jf%l&fn5<#b;ON>|OZ8wfSsM8e+vdJ$%xPGf zr&=DCJ&5hq!0>-(hmkCWRQkqwl^PVTXF?lD>pCXX*Fo9xP%rE+>%33ciQ#o00LXhS zvWhrXj&}W-;0s(ceaL&zyH6SSl-VDy=!$MMwhMN|9_+;~&fwIj*bd}6qvl?_U!J_W zTug-Xr{{cRfg#}nA%+i>GSwn0xpZzI(w$rhI17LuSx zXOj6;%9(LK=IX=c7wAW@s8x%pS8QG_;e0ge$f@UU(pALG@U+Eosjt3JU-nVg)Iw@^|mL!%W_ZD~Y zbEKx4<2?McjnuJk`WbQNt(UwMJF+Lrr+{|;XyaH&gKAD90nH-Ysh3Kvx)MRHw;4&S zsackCXtrm{GSQq;B}#UzP`j70CD5F%Gb0#`rzJ&uXjay!TgxV?%;D&VW+ylMMnpm( zL~9Y0;YBDA7KvmuB?~Z9P`$5A4s>*z6YmT+k|+cU z`Ar~J_w@?Ll?~;l+ziHM?mJc@PZK#!lVBWn==dR+WTs$on&n<1&p-~HA+UH{Nq?Jx z7-xWD3L;z5haQCqrxYop7xF~E6nVGAHlL-WPcLLsPdy9mYlZ;XftUjdt6{`eH#BY; zn{dA9x(s1L-S7>!P}=eiyJ1UuUP!x+mFJeMUA4e9@g!sUe8C*opu7WPBBlo;PT3Ri zsHP`7-3*hYZtt*x0erY0K)%yH=wE%IZ`}JrKakav^bLVYv<%(TY@FP{`dY?#T_qi- zX9rDZ36Cu5xFy50X3*$rlk7W`j?7YbQX$IsycU7xga`etFZ5)UfDK-I^4F~}D5em~ zTG9|oMWi0o)OY$+vJi|xRQ{OxG5WHq423*9m(e0wLgZC`}_le@Oj(!47c<-%LRwZ*H8+lZ_u8Xo`2 z$#9)d=9l5Tpy%C@BKq}VI|pRbQ;KEe-L&#ZUO$K2^|8H4oBqOwD{pSrr_+a4ljl<^ z^cpC+o8`luK;3rr@2k;Rt?lzRF4P_>YS;na^DF4Ad%_MA68ro5E5ZxjV@b2URDyXU z8(3Q{h5&U7C$)_0lscOJc#Ab*y+G{kx=Ba=4SRa%(auVY!6jr(o1`h(&E+d(cN*S&UG8M zI}3aFVXl40*EfLl2gBgh_;S3?GwjVgo-M7rPg!tTSF`!;rD0gd$K{p0eqFKjGzNfV zTs(?d*tC8~yW|LL-&*JQajDSp2E z7xnn{c6)mFUTQIkUz7jMZqj|4YWtJZ>%%5ALaWNq>IQR{iT`+Zw$tls+U06nz4Oh= z{N0(+1UG`tG6(xo0$+sBA;vC8<*iH8u~;wS~`EP=SEc}k<8iK>E4}+1#@$fTH^dBOHDF$LQ;&p zdl8Uc&!~(%7&6RU<6zo=sY%w)*?r+GMH!Q+rfjooeSwIy3SJ$FUv(dXOb>|6!aA2X zLK0c-wvA}2* z?o$%yrNB+-nzQJVq}DqLu+_yc%`71MDuZ{R!>}L<9FF#Y%y7Y@=um~Q!n`+iI*}w5 zP}<}wt2{_;N7K-Culg(>PHYE18s5b-XJ~7s9H&>m_ZeRyh);{hzJKW)P z^rhU4Sh@nv=k@K%rQ_6#$EhNLlt8p~08K_O>{4AkgFBVT9;u5^{eYjS6j3N1Nq}z{ zkr5cbEFw#MDn!h;xjB10oC&^>h60qtk4Zv99zqh?D7rZpmO?BWc8X+(z)2J-}FvB%UzoQf$_UXVS~vl^&|dVpZ^=$NSO%eR{JTlfJ2CvdE6 zr@A9F!y{n`rXIh55loAE_9c`it+~Z<^p!-;H1`C+n?}jH<~o^=<(`R{q43bs^_a7d z1NWW5OGxiKNfFN-bDki^(QXM)-MYF7+weKNJ~~X$vnKs;IAjA$L`=|p+;HI14oqy) zJ|HVd179iz2vZOP-}(SX2`xszG|J#8B(9)-KTedLFYfdniJacdA+5EfLeIXXeQ8iI zO_NOA`YH`@3^(Q{r7ag042c@*K2>_ak$)JO3zdK{vmgmz!5SoRiZG0>7h{rG2FA*U zj;n6ePx+j9YR5j zxuhb!BbcR2UZe(v#`~}q)!dUu$CnnLeRQw>glE8`^mm)%XY(~@L+GPrRKRxqt@frp>%C^=g8C9l`N*?ShSXy z*AE6=A9P>ww94SDA}W_Cy?x9p&Qw&XJr9-_Q^`SxR91pgUIjkJD>)El4SX4?oqEQ> zAwdxDU@0~AVWIeM&^toZ?iIW>pH9OUK?|9 z$hK+0+=eM!rW0>LD}CA+>TH0V>6-bG#hTm>u!agV--2`thZOljPExn{X=aSV{(WtD z>p)3Rcx(5h?GXZ0v4hBVC$l&zJoGT10mGz2K=t^$JQpu@OoItwJ&|xfw%6i1$4F7k z5;fSa`%nbaca@q19)p2UPj}%Y?hQqxj1WBWU_GQ`Q>F+|dCV0as(Pj~${A6x-&Kc0 z+sQXK2tTDAAER_(t!ARZV_!&cObUpU)Z^gYrgp{+LL{0I@K4mk6j?th*}A6zZO^p8 z?lw$1X?mJ@bThxPHuKYRxIhm~0uyZK+y$_)st#dZu*BCdTH~D*lfW{TP0KH_v6YDUG8GZIEqc} z-I{j7z?ale#uW4--x!kGx<g zsZV_Rph7>mxl-49=&tC~Y>Ejr)J%44D9<+n7v0Zda-X5?y6|N=aCkTZ1B3@+uxG+i z(8r&K&4?v9k0bkBUP^*D@~3&R-A(R%`mLWh11)T(*42ExA!;u$UI*@Ju2F`<7O}5* zUyk_V%-4f0Q7l8RzMPCl1+)__%ZPg{Z0$h=1`m#&*bqs_~9;~`r7Q<>4lNG;VN_DSH9aSvU|TputnCrX`8+P zJpjIj!MjejhFB+J1618zTS%&BYP{u*kC`TLm8D6d_N9ROf3_U)!nn!$_g~42ZR?@@^hw9`WY78i5}RMxIL;;C?sP{H1WJcO^UFuxl+sy z*i2+*72~R&s39N{w^H_0iMkSAlxHm%M*{uo<|ByVeN=~U^gKsKzs=X%J5Xd#=_j;4 zo6Q3e!f#OI+p6zulQlyEN=bt|lJZy;9Jt8p6Qa#I0JL}||FM&TwJWDhIrlqVWs%7g z3)UE3p*?DIg{!3SDSnkS#qmW1-ellwVWgvNo9~9oUn!=R?AxR|(w0CdSr)NY!$Eu| z$*OnSmt@z{f#I-Q{6kJAiHK;3!{dDv^%UE6_MID#u0v?T4|FKou(4?9(%5%z>u_1u+AA3Z3-g!Vh`g) zIRu_cF+|Iv5U)`z4XB`<4}+FP-Bmu)jMp$#jEDJNF52|USq60KsaipS9ix!RxO$LjIRc#*j)V}5A6->QuR94vNyvR*B_xJ8?^h-yBC>FJ~4RK&R9i&xK}?9vLEi@8NIPF0n&{Ulk^U_#mpS$wD) zf>Ei|OXMDinX@Ps1EL=jqhx%j8G@01JOxUgNDAh?JegQ16Qk76@fBd45FZ+I1HG;s zPl>=e!~%~pbW=?h5T=kTllE%Z<&_av%^o@;heSG*9ZovbL!wY9HWp!`1!{Pqn6v5}1kQdC@+h!SfZacY2#kMbVFQGpF|z-eBJOW9cvBk(N1Z>W@ix}RW+wlrjrg_D)cF%2ChW#OPnS^>2v3`n#S2Bmn;fasYh! zyRKsWGjrTuIeh=>tDi})ogDt5uUJ@r3S)lv)xQKiI2f7!gMec(QWKCcF6$@g(Z1IX zB*@J?#8(b z0#qwg6Z;pmmZ?Tu~M zv#9Q#Z=X1U?gsqF+it(K*Yz?z!uk(W`tL9Iz{~rHbe&CxM9!Dj-AHt|_$&NtNo06w zIBy`iPE!|T0QE+}q7F7*`TC}yQQbxg;NWms6dU@1+G{DuV%IizTXHRxl-+DL z3Q}~*!CJaoCK8MtP^#8>S4Vog!PZAvQy;}oZVwA7@ko*~Y@uX$k>P>BO;%CBzrIm>3?0dS>=er72YWwoPV!bg3%aWNr_j)Cd z4Pap_OY_CV z=C+?Hhm;h!aG}T;v6DRu{M>ZtHlT6%FeBPlw~kD!?r_giT~fU?WHmIg;|shd%#s0X zzE;;W@_a_4Xb|}t><2Gh$Lf0BvV~o$ANg=)y(>R=Q}{F*lHY&$!D#!d*1m?481Qkt z4!#WEP$CQK!Nj9KW?=a+t^<7aj{Z%%0iqYb-tmDyRAFAz3RZk%r6h}N?)2B&DcpcM z88a)HcazRDkgcE0jIJA*1&$qiHmq!M%e=b1;heSD99hg-Q9`Cn*BNm>V2AXwA*B$L z$yW7ui!LNGaSAk|lO?)EZ4OX&?;I?2A$1lx7CO9Zj0+#UTJ*o)HB2vZhYG%AOO?6B zfDaKgz>p0FA*l+m+EwT&1ln*#|=O*6Vt0~^_4 zn9Xso!ytBKHjPVFf~D?q;}CjJuTVW1DsI&F^>8x_fnR4g$vx>9zgB{(u%$4QFLbP=b}Xze zb}X=BG_0<_A<%L(Y&Kw%MiS>wkm8)d=@{3o>2ovSpC1tc{wWO?yjM6cY?dSC%C)2ySux)JNb2T&fJ+ZGw*%n&Oh(v zd0_AEs@`i=Rqx)_AJ+OV+KA*AoPGpJfVDC39BqAgG7{0zC-vFr?4Nr~uEFS`6&klmC9{J!Lg>Oo$05KaFph_G((@T1c{ z5nDK)l)}cTVZ-<(tPy_D^b*xrBj`ryq4=^g+OT#(^%}=2h3(Jg^Eq%#T^fb62tUjj z(_V9oz#c5Cq7ZOoImB;F$L}O&eVqRhh+@ll#CT7YwZNcOIvxhlJrA(`v#qg4yGKjzH1 z=|@dy)(ay$*qyMokI1A(>jzS3L%N=uX!Q}Q3%6y8xQsVV7w4+cj>Y}5Xp4DSb^hO$ zt;MO`WQ6KjSiM@6o;zBRw+Ix|H*VKmk_g&ulT8vyqQBn2crb+WjR3=@FY6>E_V=z| zYKG|;7$eu*V3&SeDjWB_ zd^hVg$1r(3n^36X`NH^Ju);ZJ%@QZv>@#~+tQa;G@B8J{oQP18AU}>!3AW>x6$yvx z3y`B0{z|rHhQ6$5&l6yfsurK9B;3Wlu1WgSHK9>YlcRrpb;y_WNp61)O%rFF8xFt$ z9pOt$@u&%b^>FMVxd>~;cMfa0Ud0vkTii>qoX_&+FBWZ)95%Mcb5i@D!U}1WW3H1OtFD`ne@Dg712*{U1vFWD{M;@%z}bbaM07dEb%? zrk*Xcbr3!hXZP>4)zPZ)vzZXx5U2UUh*dTiEmf;#waTuTX0xeKvg|v^&s^<@$FS1L zWb}VfI3yn~#@pFaw^{1NrAx0|fKA6U4MQP{B>4pDMDh7M_<84nm=3nXn@l{M_TGSRU*lcGI!}gY$hEgs00{_S+K!jLP=$6 zB;tj`j?Jm$SDbD+*1Jc6v0STkv~O)xReH$#nLUeX^(Mm%KvA@MmHN2J4u3RcgRg3I zaFfXf=OmP&KxGvYjU(y}{W>Fj&iXpKmHLT5Xe>v)8ro0En#z=H&rEUUCcVtlr0#n4 zV|0xbA)!$Quh41V&iNUDB53uz^>Oj+|7b`DiO5x;WZId5wv7u!$~o#;w3DQaaky?) z{_s%-3w!nO{_nvb@Mjq?Q3f)-Q3gq@6;%r%vs}tO`=iRIDa{&%4$e;2@I?L0{P1z} z1WOmm-fHePmV*|^=J&(xbXwsOR&n_vg^F?fwg$M)mV<-8Hx~~6;W%1|ej<3UR-U?T zHt5=?oi!|7ytsVwbG$)c^Z8f<;BE~HI<0qa5b5BZSPKZwQz1~l!ZAxU0wK+90=^#< zW_EvEPS?s&v)x-x#}ICIe?6xd-}c$?s{6^z#=0;(&B-#I+~zt584FF)g4=OwFG)Bt z3SSWHS|gJAePX3kqgO7rQH^Hd8gA8N4P4rXgj!0+o}bv<(%9Vna()4YQ|NdjPDU{a z4Lct<&UmjM&J-a>w<8BEieaoqNxo|defWXPe8W!lmfwK&^zI-SRl55t(kPuFuo~fY zslt%N<#>}4t)W!D(LHIZhkV&ZKgiLA&NjYeQsTVXo(bTdrn?i*$!>LM3a|M*_6d-1 z+^UE!8`4_m$WSi(!aN6F^wzL%H_zW_cu&83}=y^?iIdNaYJG`XEhR+ z)7M~NiJiF?sdSZ_WZ{|p^9DmaiNT+C!Zn~coRx@t(v^cWaz_v(dHI1n7&f4!8=`B5 zTdVz38uB>nD6}#g=(A~BsV1pY3;nm9dqb_EO#w8g7GCF_PQA3D#bjY+d6wbwJ6Naa zy~CNliLU@%3yOye?&IqovO!wptPekZe2pqFxuc7>5;bO>x4t2T9U*g(*7!rvNF6%gVzgJ9dA?^hsK!n{0tFW z%T@OjHE_xC`WZc8{rU}i8CAsn`c;`FX1M-nqI6KA5#Hu$ClvWBRBI<#M>0!9x8Z=_ zm&=mkekPf_NJS0^lPn#Z{NjGNoI6a0q@D7G!^+LxIwhx4s~PGXE{(D!5XU~gIw-2R zIoj}@7!r&K1<6bZEh^xLUOI3Mj1uiwepCsRii$A+iFVG;HU<-&1gli`s|Z2$R`4D@ zbDtSQIU>qPD#>1RUJ1OZrw(UC7-!P))A_^sZG^WGTK_e4hPgq47af8eV>=_H2F@>o z@*wat^a$Q_Wd&+DIT|Sl08$jc4{lZtHZ+|f<2KOtQ96FYj@)&zIssu$A@{L54bz52 zEBZKfG_6kMQMMNY-2)i{FF8T6{NW7OuEV-yZe=~M9v9U;+-n4q?}2bJ&+XqzCi%5wztCdB!c?*?AAycRnsVgaWu7hLwbDx%U4e&G@z%z_S5$f_O7XYxL z>`WhRI+yghTjR5^)q5DOs%%H-N;>wIW;$?U1)j?8#{_n>OI!D_tgi$^5gWOR=$t*= z;-@i2SC1CURhul#-Vw{o=6d~nE}YI!pmF+%pp+DPVoTQgs5-d=kW!!*AGOY-x(~%a z*k{l^_I?69Jrnl0O)UI7*2DU*U*i9lu%6!;GJg-#U}628Df8a22sXdCzafD<%NopGl8}y|w;d zFbaU}KcH&!4{QfqJnT=l0~WRUTUrqFFA=6+QaAraoa}Y}s=NhY`$u7$|M>+1i~an0 zfqoT7`1J$MPGb61$>T2qJGLffCgw(re>o#8tpDiBe+QOWz{mF&ur#ecAEy61nkEkn zmRc4lVPW3b)*3yf=!4PH`#;eVOnxkef`&rnd>W*Nn{BlfhtiKc&Z5EX(e19*Rs5sb zt>H+?k^PHK2I-$}6(jG%UepJ2ap-SYZqBaCxXx9|cs1OgcPIH?Z10hIJW}#`rRhdj z4Y^iv(9vWhMKluNpPv_R;~&;%)6-j?S2WyTR?(+NUtyo|&VSZ;y0UG{e(Bup-IXPi zi6v1N@U$d!9bYS;&#fwj*W&ou-7Tg{*74B zrhNWAilo?7B4GVuJwBH&JvZ2+-u3P_TGYRvJ|_U#Q^D(t<@>HJ`+jnR%k4&lh{A<~*56x#SZw8D@ zua7-PJGShwW`!IHjKapdXfDHSs^}%>{Zft>?i-Oc`g`Dx8;-&esIcU$+r^JNQd0Ov zQOGBi= zdxK24ngqy%`C7;7-b)&2eTKSFo)-PUAZW7Gr# zZT8#0#hEP=8?ldZ|8S7_pp(hA=iE(Q!A&5;xi!2tWaMA2$6hw^f$&|`_j9UOh-Qhj zFHqIMc(@1{tbKk|&lrGi$=5(rh+c$vA)B%3q>Q9DN?e$Vi=PoF$-9ziZ+b%!ld`Ro ziv;6m7AdHXn}P%%-m-YCrAnfp15Fa3aGI zkc)!Yv~p)x{!ZM%(vH%Ag1}GHj*n5(0y zrm{>=w%J~p&+cfh6AwopiUAn;6$uHc>+qfaq} z9HS7UPYHy#veIFqk{38ILi-&fYz}KZiUeU)SwGNLr&%wmVm>dhY8ROCMWV!5?Gz=5%_ed%ityq$ z7Gw;d_OjwfN6^IsH>d~#LE0#bCR)J)ThmAH#(;U{W|}H^P>aCBOSekAL!8<2>+(sc z25ygmhvpEAl-cs=gKyK|Z8k+#TDx%}v~em$drzkdQXQTb-JWIXJ`&DAe}R`HLk8hT zdw2pijF~FSe$WqJakO%4`ys10)rWrR>V&u#t7o5QN{C}>lbNpFI^LnYb8BQq(ngig zZx*zv1b){IDwRAk3}x!~i!_L~I3!_*4(A8>ofhyX#Mi2sbS5KGu18>Q^+23|`>-Bd zh8XB~zU22wP%YoqgiPO1rZVwsn1vFnkvjEqg1g*t5m9Qn{LR%$RexEXHi0i2B$t{W zR=VDl*c9W;VEsYbOkYdA&V5S48_w#v2iHLO3e;fx3o|EJU*Gab3No^sGRswYk+qZ09r4fH!&h!s2&Qx$&3pzgYO6rov3ROz{F+@D6R(9&0$%S~?G{ z*SXs1`C3F%qjnkxOQOrh-`g(JH%{4lEo7tBoXEmXg8NX_;$)!ZY_uGQd>>95l`W;( zec6fcW(3(%9R^?2aa0ixv8u5u=)S()!Lqv{HYB`CvavS$-qQ@gqi22P9#ydR&9ESoN9363lkPO6jq5_y6TuH_NGZ?5Z zLW}|3WhlR<7=Kj+EL$}ywJ57RaYziDFK#WCPkSTUoo0S^s92p0UbAHllk|F=ByopZ z@)krj0xrB*-T(|M0Bu%8tO^L(6<}EI)JqFAF)SAa1WR%m^2;;97aJ)W@`E~Q zfpkLx9}m(M4XJ!nRH)k$46cYnib6$j^zdpK7nuZg)+DhyP(c$z%vm(9gEy2d6SG(2 zTnPpx$t?o5Za4OH4QXC-Lue_6SY3*Su;#tA0n~=DngDoRykAzt&z$$Y=KNH=X2r3) zb|%Omgy@UaacoRQ5_oizv&Hd}Ewg~o>(+WT9URH(KIm-suC(*1mgGx)H>VCY#R3U9?ULiit>e$U~UpGHZh z55*zIO=3mAznQ=lLNzP+-Y4?5n-G)K{l!O{^M$c=*86~M7uk-2*K6}-^UYT4anmXi zdLzm88AkOLD!*;K5lSlS`9A-Z4b-?(V>r|}Jn|(J0qhU8N|>EX$no4E+9R($>S-H3 z7MIvBgfQ;Jt&qrW+;<&&s8_XxPGZdE;@MxD*}RICnYgA?RUtKT&E)p;l<`@^B-9oZ zztqJU-0!4et9On7SZ~8#8KYkv9gFGd%NtOo7!s92F(wys@lHH?ed`%=-eAQwZG0ZG z>~__!N!)dGjEK!E3Mr-@tp6B{kJU_$uwXp;(#(m|nqKE&g6>k1KG@Xa(nY;V zrFY?=vYmHTrXY-YUpGlD(tZDs_u4?6%gW{+AIS0eAfF5>tzS)*B>rNUX7KZ|q95cR zxnvQYInfF1Z*UnR7wN8zx4p$(1|5Y(hg`_I>I`VYSWag$3mf7K^-5~F9V><;YbGDA zm8PJrrx`RkT8UFF=W2|z)7kXUI_$ta*ZLOkw>|Q#>kH_<0;xM-zA6a{CA&6+pD#U zOq+RN{=~Ja^X9xrq-K*)PcQNt6Ev2fcBR3%-v?~0Sey&J*XZOXSo=7fuz1V-v&A6^ zL|d}~qU~{&XmEMzpvz;y=vx*W+H;m^h@c@nMC33jsG~3;{j&P~@9K4%}4T?K9TWzhMx(|g&ri$Tb z)iS|J(YZaO26Lsjz+A(`yb=pcP$zQ)>)^*3+PBGvYLFV{N*EI32q5qV`Ei7;5@qF5 zi)sNWKrtjgAd^AID#P3|bQ~VfZy2%U1L``ar1gXckgd)SSTVD3HOJ*hzS7Wsy>Ilf zD0&$Z{`u$k%kO(dKLt~fh1e=k`3~<<77JYl?F+*-iTVhggfAfJRhL+Iv0CpkM^t8- zAESh>X572(QCjuelkSS*X&oEG(~zfU;Y`=Qi({36C%INdz{=zD{g^k~J7vHvMf#I$qI00=z;>{tH}5PHH>Q4Ejoo9aCcrJNk;)*6T`Iepy?J}> zt7N;t;8wP+GOkf8*STQgRwSaK$E+h|xVOy2#r(L5%c`@-uxXfiEGuC~rQSri;`Z-f>$9_1U&IocCVKuJ|o!t*KE-z7$vc+1{H)UEAtg) z*Aab6l6y_n9=7pAR)@Jyu?|~@{0Qq0sh%Zm{JtSaNFB}{;k|b@-uA?udgea)K8Hc{ zOl%#(Lx@FMdgje3y$;S?+-RQ?!s^@Ed6LVsd7%k>lPb5*3+S;4W~nb)2eMTsR-IUwirTLa*Dq$A2H&CdQxd>|hk^@xpDAlHODGE}4$i0r!X`n80^3 z;GucGF?KVq9OLwG4Kr%)Qea2`LT2w_0}zV~o_tjMaC;7)eCFd>*izHSL>Lg~!22CS z_|kLibGY|1YEn?L{Bqk{$I$#piJjAj4b5*ckDrW^C<_Z`Ir zsaIq3u&+3|ejSPDh!ogq3Hf<&&R_`b>T zRcg{$HIzmnO{b@n-jnP7-BRu3CsSL`()ndh6L^KqAa zs3og@f60f}*`zJ`H1<7O9rh`>TQ(c4@(CFTRoi0O8b*Zl2azP{nH6v?zL07 z)bH)`({=0SCg(ciqn87By{`8!N?W;~_OatVVlKl0)tBOk->hqSxZO>kE^U|obf-K9v_UpW1LHopyRxrMysX`C+L)n#y{@37fV(HG%iw zV7JN6($UGCRdwFy=k~j|O&nHl9B*>@w9W!NN<=!=LF{t6(6XkoQ;rKTM}4=mNnNIr zZ>C6A-M#|YPIQYB*u(~WDl=jIPoyGq+}@#Hli*WoA;A0;^&g~Qsg-VViNvgQuZK=YvXBfC z$1Xuk35yW0r?nK=pABWN=dE;|LyaubvOfAT^l(Z8&q7cC9wxYDf<0M?DKZoZ!>}r& z;KE3@74`jNwVs3HQH(8ADzF>3KrW+QlIiJku=#2~6e-3!h)tiEze!IF_aSD0CCymO z;OqUirU0iOSEy7{XUh_!UT2X%gEL)cqY?|hA_1a-`btg@hKkv zAJN}cXc%lDnHpU+fyDW`TG}IYzJoNSzo^mFW36k2SetKcd&ZF$C_{Be?3HI4`qGyqqJP{!=aQJ7ekkO_#s|Ex|%FoA}j{%*C;u{=os~dvgG7 z$Xy*I$;n$ii1fFEo7)d5KH&naClefB#%%RQN#5zny{mPuS#H&D;^!`|HOIF!GL1w! zY!2M#q|X+M1}-|mN1LVH9sh~o)rNKg zsesk6J6leiVLtH8;vz;G%qx9+6vvz1$CZ`~>9VH;&udBpExf$;&`f^l-=o}VL`y!@ z9U_8~%Y=eOn-4j8=Qg4s$}^?oyx2t8V?X*HQ$dCPj^rL;=&q}wy^;GKdqVxr(&*$S z-&eviIO?OS6m3);dDffC^I%XN8 zJa=_+sw&`%vZKd-%q-Y!>pXgA@R7rmk45*0S&(F;K9yr~Y3E%~5$W^Y*I)!z88zu< zjC=t0_f}$n)YpbSDP#L2ApgD)P6?dsPkA04)#mr0lE{P%XOzA#b*0z$mgz^AJ1bmD zea}sYUcG{|i6JQ^8n}8C-3b-5A=88eFE?kKu{6QCm9DM4ifL6C={&BCj@^ToXp!@h zwny`6N)zr(I(*LytRnAj%Oh6@CyI)de9EtN>6OAO%JN`^@Y*uuUqhv;zlJjSqifI& zdc#P$_$mh?TI-c}yRdC}#-1z^T$K#+8#;rctTBN~G~@5{@Kqspa8(h)5UQVT-p~p5 zzJVRa(a{6!0X6z{Q_0~6EWbw4QcmhK%}`fh%!|blPwG=m#L^1YL}mA}sK_|0gc$k@ z9gD@;M@0HUMAO<}?CUE=W{;{h6fZ|)9|}NuP3z+>#FkGVMN~H%hOB&yJ49Z8HupKv z;aTPnrKnN6_X^-#kYmP^cpMTzumQq2VKe55? zS68TEr6B{f(r{O_CeZ5(kmKt({!&wK_q{&w;}6z=2)shfc2Q?keu)QkSKK5lZDVp+ zyg~ljqXBH>BnC=3SMU%Fyv8ke8TT8VVGNWCuKbA`@B={C_I0dAU!AFpJ6UAwmbqZjvIM-)eQ-!)Xaed8OH!>kkAv!+m6< z(~J0qDcv?8saWvg`0;}1r}Z^(eR+mWp;R0`w;>x z?tuKCX^qP{=$%v*KX=iSjWlJ`{d#nFXD_5c`IDw(8FoC?$9>)ISrx-(J$?iXr)sO; zZALDg=b`p`x|nt!j17|G>mrV-4^B;AC&eN0LM!y#h=^M}v?N*UG?$(XzFUQ-1RlA0 zCL!()PfG?}0l7z?bXp*^!J%ik9J0> z*99$RZWVs)m!@|+|L3Tb4(`|2z(pp!%7_K!`e@Zq^n>hQPXEC!ks7908|J8nJYeYv63u?UtVdQ z`cuH|25@K3?e@rpyCHImawrW>CTcKnALFV{CWfVQ?l?`EhnAJUvn`~*pF?RH=*5~> z6{Tn1oN)!glu!%NXDCJ7$u5%nquK8W(`#H0U3Jnrwf}|b&tve=QI8*6CzkW4tVX2Wp=aTK6?_odx zX)x_`moFm|RYzAAtXzX8Ec#>^BNKy9pb9#8Hg|Lt!Fn?bC4e69!;Q+xKw>2CtC6_CPEFhgC-=2gbVs zQHR*LS)7gk%Ct5~ENKthcOC!dxwEj5LkT0lyT^0Y8di2-z|s%ddSy?8KCy zC2=NFLQ?8T5L8G^e}(OQW4uIqqM3@_HJ&{f$hhrlHdMRm4tZcYLdqe2?Faru>j2$$*@eP%M1W6t3SLJW z*u66zE6d3=_5`Og1|=1!=J#O=ai(@EuC1jF2<;wf)7y><4DuTE$j2pDdiypEpO)0j z{4N*sfSpE7Bu}3bGmx_j7YhfO=0=O@N9k8;8-^a-)a(-NEJf_*WgR8EUB4YzhrFoT z-N!n3KVEGpY_ya&r1UJtSa`4{*jZbg`yqO0of`s|di9PW;P%J&jeg7(%m&;z6Ic)| zVy~<t0*RzqKoZ|U61~*lDH*&n5t)*)nf?fNG=-JY1lG2vE<=pB-K|b-hxY-BRT@F8Q z%o#x4u#XR)`!Yx1(bKRiNnN)ems*=^I6`2N)Bi3L`h)WSskD_ahSV^NfZnEJB~vAbWGP*x;s zMa@FUoDv|}G47FbS_K%DH^NJoVkKqO!!e8-Lp72C>P)mQEVJ%$0zWik_m=I(-DNeB zsaZ!5!!$}UO0nX%@(Y7c&vEy;#ZKG_xl96p=baOH-U)-}U7V|q{Wg{oQH~LJ%OdYZ_G*%wMQphn`1SGkE8d3KU_W1dZ4)0hj6u5a71klsNQR5lF zFd6{T4C5{|kg*W{*g+To{vJCZ2|&4M36&iL_`p2klf^FB>njajG9QB_Y{)+iG|}-dn2#e z6j)6g!=sKU;CT{2=iLm=$dq>qV9I+9Ve!11XTFxiOC;#|H z`R||*3p3!a!Dzo^s((p4rI&(((f*Wn+I-JPp+ZDh7Wf{*@^8{kKMEQenm4bZ0%yJV zb>c~b;z`6fmmACLpK7V@Zih!+B&1GNc2jDk`FNfW`;{Bjo-DvZL8~DXh7NaS3TGfj zdNaPC$NLPei!Xtrr_|HC<-6yzd%JkW-oZV``3T?Ho^EqbYacdt34g_-ne)9o!h+Kr zYu416QT^}MO_0@|3DZtX#nHnh?OUDF^=!|Gp;Wv6t{;r!Hx8_Ocd4e;Pwb2L zJbI7cF~0#r5!UUJ-V}uR*UW6$%7s*^qfoxyKu@54=awk0b$auvUGsTo30`Mf1HCWZ z0nZG6)1X7M+*K-M<6PAPQbs~&`v!-e!>a?Tt;_{3H047>pK)_!slv7gmg#sMWP^7g zMup_9_cF?lmLl*PYF*0(M_zbz1=V(5<8-z&t7Di9tR;wyRx|Mx6yC;e7dqChhxspi?I*ysdv_%iX#7X_}P^>w3ki8RLZxi)t%^PcNwtMOJ_gO*f{B3I_VrInQyDG?TBv1xguZBM}h89C{u5_9%9}aBySz=c_R1- zQ>Gq%=_B2J;@^Q z_{e3b#St2BI6Ab^!=zQu>2^EhimK8`xj|m#D0AE!P$w?_x;o2eH8UG?*-&r~%TF&z z_-Y|MQH7WI>mzs3ceSkp<=Hys=&qt{RS$;Vc^i^~5ZK1B;BYELP5=Hnr^b9`QcU!g zYEhYY3-ePA)oi1z2V>1KQGOHk^}$OAZVK}J)mb6$+p4z~y_tlqzHkfFuap%?_%Ml^xU4b4i`e>V$M}o*?`@yZ2&3#B;nFyA)}Nv%;ab4pG_ABJ3l!={p>=J5XAP zf#!$zOme8TfyB!HY?m@A4{J*^{&|$-Dd#8`WrzYmDqgWfL=(UCrBjUsYn%LCMuunXCcz! zEh&9gZ0QvgE%4LnRS$+C=4-kb^UIsY=_I9V`wUV&*5{vt$95+*h^OrVAN;vjK5Gfq z7b~o!<~B#OJ%l;Cq!d*Zm9;7iFJqloxg1_AsS_n}wiKxc5yZsn^zk)TT^`SMFynAi z9k!?ok-r&Vu->B1=+;4)RhDpu!phV(ne|hMMIio+5z=7s z5Qfv5#V|HABn#5>O|a6Bq5h_dD{zqLa}^WPtkP`7l^KLM2VW)Vy&I3#X}l=g`_HGk zlwuogGCtFo0aysQMbeE@Wi3n@`0&)2ED&apJ9AKZM)*R!H1iaKzVj}Vr1=?oV`Ql7 zD;rz1mwlg`%RqUI%p(P8-YaH&Jh;lHHlmHx3wA3qP|4QuqC5BlQNiObQSB4guxcWd zEM6Z>=%u0hpk|$~ibeYLGg-Z|}E?!MqXq&O*qMIav~fl{sn422$I-N3MC z0FnjTXhIT>xRqXoq=Z~9QImbk>|b&&Q@H6-*4Zr+)DrIsn1z84y1EAIIQd#oM23*x7?|kq&^Ch@ zh}6y?^`YJEdomEk-o5$pXIBHf^{tk!=2><#AEeEp5!@s1MhuZ;Emh38G#M-(cKIsys;o-wDjAaA7!_;c9+eLt< zX_5B`m1use6~);sYm{6+HNf1^=IHXufW_S4kfQ^~tl6?iRWKJ#>tod#`~Yc72B;f5 zM$9!(jNuMk#a&B=`V3MCO-rU`173`*C8KClTwZtszIoI;@nKzuPk0MfpyB+}SGhG@ zww(c+=%NmrgreSaFuZGt_~S|{ZitW2w0MHrfB7vgMbolXwE^FUbVinosb#Ht4#_a2 zPqi34Kf5BeF%9(CKDv`^tB@8gG;?qY-N6b~V-5Zv^dGLcsCr z3a?aF*CMOZhWFNfhBS>8)gb`dkm^H}{O-ltNu=5RV9iQ&==x9Oqr^Z|RzCkyvgFLB zuxfg`(3PIb3!?B_g)n$8#}>28{jdB7pKZ=0J-D4Wjvwv(>ughdeAC+&#+xh--i0kL z=@nXQ927PWnB6MrWWv|H-+WEJ8Xo9Dg=}ei-opKH=9FRcbp_Ihlc)Hm-_8(YWGKOu z?IByb>hkE0c)8xZH-w-pLkl!pXkiSdM!7pwyQS>~rFbY}D@G_=qH*SWQuu8m^P`Ko zSeW^zzN;^Gs&6Q!$9z3aZ-Z>H7Npztwt-=prk~U~_jA1`cE5c(*_yEBaL|u$d>%+O zhn{O^P=Y$R&BzJn@^7DBiTTvB$cZMjHn_U7w0&Mg7d%nAk(7H*&63);s(t!oILlqz z)@dI`wL9P7Zsf8bwbH)3hMW6Be4CcPMQFGbhD6X)!F1)VJcCCttJ77WumUO7&wM*y zm;U^$s?-sKCS?CjFU95V_j7l6lMPR^ zZWe|?HT*P11vmSKp(IVTC&Y+B@(+n{rhHlzrFf?}mD5lvc!fYWlmd~M@BC?Iikpr5b3>7Y9U1ed0|OPB zs>FL=8DA?oopkhl9uL5ck1}D0{Z4jxO2@O0;?+ri9ATWu-oP9`Hu~8-t)$BYVIk7$ zG?3;VVBUc$sXY@Yft8xO`F*F``mDyaX@9N9%>151lNSEXmx@Wdg`<|#cpbV@Twux< zj3)KCE;KbH&N^L59eFGzPuY~E1ROpTjw{wteZ`yiUl_v}PY|>ygI$K+57|(ovnTqW zn?8s=bgXzJK58l|6myzBg&?jBdhd>(esQ{lQIsY_jb#bx?5y?5C3_#*UB_-z?;h9$ zT|YCwIi%P;<&tL8-0R6j?ce1e`fA`+?pLSpkNclV!-a^9P<_ zhWVx{@@GzSwd171e@NkZqn1MK4ykksNi|sEte6tr3X4W%cgG}uXtW>%OQ~#cT@?)2 za6;k;(Olh~TaK4SUEXmKd~%2doS7SuikU}GB@6Rb zyuyO(ZH(A|^}VT6VWAa(U{exkNI|yf?w8B?USppu>^u0eQPw@fnf;SUSrD6d*EC=y zJF#pyKMSDOg4egGv8iWP=IbC!6icovA(&{_Ecdu%((hDj)2ChxD#dqim;)J9-miQ1_g&QxYlI3EO0}{9zrj`X=Ti zKaCvHk*INb1L!+hjSXaO?7m7gtte6!1@HhSWGvt1(UJ;4?eSIM#uoh9kIR6Nswf~A z3Fj&rn36Q%#Xtq?Dk{1rt_mwDm`+6+P0DhPE2Wc0`rTv>B$fhxl^@~70eE?KSQBp{ zW@#qWi3+!uNI=+rw18;wG;YU^fpz7N+!9wb5d*YnE5LS2&9`h*j%u^VyO52<;XCWtm_6viX6oz%dJDNc9wC1I z=~B!JU|5P&_k3(Wm7%w|PIplM`c-A!YkFh8p;wvfnNZq-X}E2LP3;E`qf;UlHa%L_ z?aq#ZOV-5uhi+Xo=0Pj%ojGNLhHgy0)7h4G>nqwgsWpP*5?!_TpRXPo6}@QaOiP(Y ziOzVnYNAG3eq>!Lb~zNJxI6UMtFpCBlX5SqWVYkGq7E$1Q=Z-#Fzntm)TLLn>yoLJ z;sE?JfRUnA81CvXq|PQ?6YIQUBr>@RRoN6+eCYNP?! z|D)-tY%G5()yBlgO2ozrF4FePt-r&;KUBy}{+gi50{jm+!3++;0-FMJNj64sj_hwj z$qdf(WMlf%rN292V)lPQD1rZYRsLHN$H>m|*YK>r7L0?pd+YUz2mO|pf++&|%#aPH z>~+Px2T>NOSd9Giv{|@=4pGhGWGD3(3&v}Q$nxXh*Y|tcyxchyLd*F*+aZOJEy>4J`~lWtwY4^4nT+%Q6%(my3dpa zKJ8zeYcae7BC9%0MK!oSoqH(_skL}z+Vy{0Wl&Z~%0h(BPd%m6tzRp%NOwJ;lc+~2 zM-Mi8@LeDVDUzLyG2jP5#$w|NB@%5hznB=#yk}vm&D4zHkqMrG#zs=Zr@oNUBLD0( z?nW`~ao2~GF|6$tjo=422YSw6QCrOvAaOUprg%Ad;hhfiFZh%m z&~Cu9Ab)Kv)l-`*(h&ZzJgF9UX+Jij_+0iRZM-?t!OmN4H-_(#wAz)6$>n|@BijPp-njRv--x0CY_*)qCLXW z@Qs#X>>938OP9oG*TI(%&!gMoN}#&l+r5df#mnX;sU*+d3O4!<)2GOD z!NkJKEPYQv^}&iNFBQ1CJN?h9s?*Bm*KS{tv~2XY~MQ*Gqw%1yK(c=hf-?S!laFICkq z<_u16J2%b8jMCMa5hLFGkW8IfUoa|UNbSaPHo^_hD1z)5IU3XVgcZ)k6!ccm=((7p z?FQr!dK)RLE{}_N>!m5K5C9CdDPE$eIBAX*D9ttDh6ZNch|IpWNqS9Nj7fCvyN6Uo_Iq@Ax>Cf5^V&oX|8pa7W#@zbct4M#|DJ)>w# zE?nAp;8P5~aL~(7+@e)J?^tE}OfM->{ercR(F!G-th{1Frmn>y>-#&eu1}8s&O_i? zNHWf7Hy&o`8eLkzIrTR9dLnERvS*)JTi3dZ!a>_1maU_#yIJ?$Y5Yn;D42NI(WpxA zU7*}H%oI7OT_8YJ6B*BEYq^a=CT$^^!j~q$cmwzd2nR^j4Ib`-5jwFaN&)NT*NrOG5&|t0TJzc*3 zJ1T)32FYwO+E5SK)Zt9RSP zl?8l>Nck4t5@KOc6fSB>X%p@~Ncf(!dGAvQSUjlTC7YmP#Ya`DX~K)iL2lN|npbb9 znp6iUbUk<&s=OvKcf0VnspCTLM$KjQN!6lE@dy@{ zjiD4#?M)%9Vf7&!MJb{dxSC=OE&@}EXAY^vOO8&kOi6yl^T6y4t?^#H-UdCn<&w!q zAjSkLjo{&(p?NePzoHwgj@l(Np6KN1EASpvB4;1tiJmGj zvVygJfu3;q_~8ac{)-k5xG{S=;sY2tf53w|M2xG<7g2mDY2%gVUr0co$t?9RjsPALOdP+;IJ5cV-XCjrZ!Pc%pj~l4t zFTj;%S8s@lQv9@&tg7{goL|->lc?wQ>032W???Mkiu|QLW@gZnf~=%ob{oekC)BDv zrZ5;psc@v%Q-;01(?PhX<+D%fCbap$_sxOkBEVN@BY)45?UW~lk(~|H@cTOgPkU~u98I0Rx8LVXyCbT+u!8oB9u;9et zK(Kz+;TiQtPAn?|j18?|;SNWT=zBA}1aUBL!@^8SC*h@b4mI z$U?KVr0Dk*nymtAC2Ja?lac!%A`uN+s?e42Cq!&kdrBJQbY+w8-Mf6=PA)up>pRuj znAUfns>oy(R?;~U$J8YyPBP&a$$L;%ppsXH3i#$z)!uf53>5v?mBm(4=64z(vVw@# zU(@JyfiI;*s&%w4YkrNYcmOQ{du2JldGI_r!XA z^!CK`JH8Ui&#F$)3~KEZ@#`ahdoYx_K7JC_*d1foRA#A@JCXBhzeDIXx+q2n zEfmfp%K)4!M_%~**1e3kB=}Zx-7ArWa;fM_Z2G1T)pA!BX?6oMr>(6xwqqklb)6w9 z<&UZaq@vAeADT2nI14dmUSFv)R9ne2zzQh{t|exO;;(U;l=|W-(8HU0f1JK&Lw=r* z;hCV>UF?qPIbMfpKr?zB!`av+FcdAoCp%1b(ZV&ZJpldATq3Ihx%WLLV(fd&@tOCS zGAX!GM*Qc-;+Y8M5}640)OQFaD39tvwm6|>gWYe>Bgs-%vcw@O%;=4~btCq3xKtAY zKDG4uC@7|iXWL^B!lJ8n9V-u4DddSKidpn$Bbb-oB1kNwt$oDF{a3)B`@Rdnr$Qa8yATy50EnOC;jj>qG)x> z5_IM11a7MR@XcpveP`Z_mRWKGoXc7PGwS15oSQIOaZf|8*}K;``XS|J^s!E`^n1W? zN2f|nJ#@ou5!ZdT*!uPvD|W?mv*|Zl&0#RVx3OWbeCliT(&X?IlKsdOk~u`YxY{ef ze1>+s(2~L~SlaE(SLi!BbSSRw3M=jXXAe`~wI_~SU+%m^1vf9~e;WLT55+QB~f(h>zhGdo%Y zde@!Y8p(#&Gon-oDytC!2kGMr4u_MGWJhopvE>*`=fm0ZC2sE*{@p@;vE z4fsa~4hySm3Jsnq5WY_|p9|sk1hC7iZqC@W-`RicxZY=58(OP}tCw??_DZ`7YwQT7 zoSkMwe62SxQPTxSB63cyw0rk~iGzmzv?8UfpWY^ND?58Ho6rum2V6=pb4Rd*28T$( zxgPN0&9>JGUk;<(+ky zaqFC`UCSJsy%Ddz%*tx(#0CWiM-o~V9O>`9wzmXlsAR3OUn9~%V~*Oea?TOSjd?#V zQ~DWQe^)z}3*-KrB+AIG&)yphkG{_pCp!fMwW`C_A{$$&*|xGY#cX3zbYr2t%;0{} zIJ2(e#6fV|%Tes8gm`4d*BfiMwpr|$Y~pqpr^&K{)P2XwrjyC`K;^-;aePIIhrRYr zvg|FU4=3PY8P2Vz(qVhE<`}A$@^v>C6XW^aIC58#BAk?&qAy+L%z+jc%0diOy+~(E zVb#58bPgNo7nb!5cq_nq?Jm}o4oU!JvJQ7ltLpr@1a>R*UI?TiLuF*cR{__uW$9zz zR~zCsayCrl>b~nO2Zj|}^R5|DwTQb;cAXKxLKF+<)6OZ3T+OCm5K!AyMWY-aWR9nD zcl&d@PM}cFgNya{vL&L%FZJvN>msVZ8mhsslJt0W-E1|r_6p^F2b7b7c(+$}%y#P0 z>1Lkiwi(0IJR+y7&+GERu{6#E%rv z^JBM63bsn}-5E~+*4dpW&LU+P_m}uSqV!YfGX4nETmf5ZLZ}_hl=FWY;PbY{D!ZSn z5D2N!ZJT7kAOX$XBC|l?7~)Z$&N88~M9C8~?xUo816fbDsut72r)&woxWG=~BoSdU zq~4SVdlLBy!SFq|raD%+^xMNYNBOKvi>&T}A7Hij->Xw-@iInGsT4Z|Ek!ElshauC z0|=?%PL`bvT54>+HkT~!Oh+P~OCCK%T#|e@AF1~4e}E{^*I@|PQMDa`i7styTU&hw z5%-3~|5vz+`LB^y|6ky)pM2(@Dc1`t`L8I~AIoh0FJr9!qwp9DJun6EC)WXnSp8Oa zj0G5h^-u9ZY_wq-N#{k4#KTQDa4lqU#xDTiRzyPFPKT{+BLB0NcpBMmt%uM`0KPqNcU|`%& zAW6r_2n2G#0&Rank-rtq`_E0p{5L!?x|fvE7jxjz19LWib^wq5g_Qob@3$=0|E7f) zng0e0(Y+*({``925dM|A3hdmk(F`0;F9`F+PXAFv@2^6T%zs4c|CUiQ)BRZp@>pFZ zoTx6+{X|P<6e4-Y?UkR`_nGRnV{B~?&*n;p_^@;#i|_^93EuHdGbB55VQf7oO}i8)t_cGZopCoi#q~p9HMn2QYzDQYgJdndsa^hT-F06XPCJh z2;;8xxwioAS8P+@5SrkGgzB!VN6*i@jMMFDns?j55D2sg-O0TKU9dzi!K!jH}6W|o) zJ;#`ezxQ}4o>>C@56!tR^;^_5WwU18BK7E3I!!r*C*23eJ{j6;BnFpl)q9T3Wg#sR zeseeMB+0xV-pt^tjMnlZMpL>1M$M;cU z0?`Dg-rYZOJdALk>0bEmc|G;JYkxyJi76^4=V?!F-n=B-2`t}+QCRv}od!;EW!qIt z>SwvQtX`5?uB1(!FYsuNvtv(>Z$Je=iCiWKvR)(GH2@d}g2f;iH_zXL>_?n1iP5dT zMnL6PaZI1Pvtp3%xoG%IQd*lUe+*dgRb!4>7{o~cBr(Yd!nbW3CsJq|rGv1xI~Oo+LE z8u4p<+WL&3V?1hY{0g=E+17ysxKC71C|YT8zDi-snPe*LO#j!2`D+PuYB10tP(vfX z#aYG_LXggZkb@}NB{RBcbTL}`+2PVeboz@Y+iZd>)atdM@`y$gZO%aDT=9u%6gvAl zp82_clHjZ+0tjw?YpG2wyws`f)o6E-3=8=;C*&7=B^IX(wwMQFfxY}e;_=-%VrHZo zw|rDMGT_?CYQ2!XU!`^115V4qQK15KxyqpI(1{f~1M}q9-8XJp2j>XrA(`Nq|OP`D69P#o=;U8?ro2bE~yi0INh z-2uI}dhy{oLK2+AZl|eg_XKrG!h9p<-Sx`|zEqb$2rV`oMSZlT?yVI9?2h?&2JZ9S zQK$ev_K+YpLpP-RkLF>>)%|po=CRHNsLZ~EH)gWw?EX=Zc~m3L*Cg;q_w(KXln{9e z>Gu;KaCQWBTi9HeU!!a*3w>#6S`0|>u#@iL%A>m#W|?b1ecabcF9-TjZAtt=d3(G;+dCFo)O zNe5Ej9rcVCNnBx2YY#0|AxICb?ALrBVMK*yU4|gLKYg@az$l3{kTW%3D>I6Orehy_ zWonLN`NcaPs5C;A&Xe~+Lp2Yy+Rz+*N`8g01M4^vVn%y`Ka<>i1EIv*9N7&A9?kZ& zIL!$iCPbg>)2q1Q_V+1jfKSzmh68*6*E2em5p#fN z%eDI*-So0T@T(nR23+-bnrpDaiW}ms&?#_3&)T(@ zRk?gbLr-RF;ze-7J6nUv7F>fzUH%;sH;bV(Hu#})h`J%6CiQq4$6LB&vag!fxrg1B zc4*Rdh=!Fw++YL)Y}}iHtPB8J4Q?pAvMxSAF_PW9AwIyK407;=fh_BjoTgPSS2keM zMH|4-`w4Z{u!pj0GxGu%Si?q6)Po_si@N0XLhaRnNrwFGZvk_*0ST0z)vur$Kt zt9dcV0Bry*u_2yO0zj%!vC17I0=5&x;7e}(hgAq8z6!w&aTj4L2$ysK!?z7oL)7Gs zd0Q-ItYn@*t1?=c5qS(6fcHXQ(M;|)uHFQIR7Tp`5UKO!`!NACuVr=itUd@Hr-Jkk zrT|kxu*^a}osY;}fb-PRtFuz`=Z?S-C9+6J^Ex#j104!c8`$rg#UdQ01c=|Tu8PRA z6AT}wO#F4ZpBA1hDt(^0BOT|=Up;Bws-JznD#3mz+unL=V!nw#sZiHhd)#CBVX@k? zQK~djGICh6jdgGzREOKZ(MX7DOH&A+jeX|gn7VCicDxl|ybxii8C8p`>pGP3AiObd zoxI0R5$lAzi`TYzx{YZmj>CC(&3Mwaz*%o^b8+~gC#bW2vXkgC9kLxa%O%&=VO);9 zz>~Ju-|q3*!w~} zvK|6mx~-dh7HPOf`}H0mX*9N6*nchX9uMlc?=AT`f9Iy2=VqG9JbskwELy51{;qKK z`8zzU65#=}sG!;U+{A|U9EHtGGr9Z4fB{wrQswk)g;s0Nci!r<+gZE#y$qi>7%o0h zLojLNDTHU1<$P|X7(1{)5)HM*+;lVH(>O6=uo=nv>TI)755d|Q_a4H^(0$GKabklK zr=Yys@D9U471_X0>XiSL2BrwlQ6#5YWv@!iQE$2$<&Ci_KV-v0xcTJaf zeW2pC`qv6lJrz3JI$q#O%)UYnr2&e=Ofub$-Ecz-7Qt-SVdydsE2-XFSK{}dAPIY| z@tGtOtHd%i<~P@Tmp)oPG#BDCG6{1X8t@KKj$EBFj?bf$?pj0BBC#s4)`eQy>3fU4 z_T6`4iqftbA-Gl&<~*mPM~vA~ImrCVi(1eoYAzBM30tv!pe#llRxOf41>AK>d9Eb# zj&*EED~AWKpTQ$WwaS$N1dMUHlJ62p>b}OGsEzS6UIHmSYQIXTO5_r%WGYbyR2-28 z^A^v937-Ygwh)oHtbIOo+qm+_(6bQSh_6F83WM<~lGOF3Kf|)WPvjwC7A@A{xlV3=*3cyaT!OQsiWN%$ z{j5;-ASXq?I_`n#=e;g<+_~smXOlR+Y-eqk0y5=@`7abB#r3Zl11Uz1ta=hql#(^9 zd*-oAUny)rN1&>MEI=rEHm(KP8u^V-)o&!X$E<)>UDKhShj3Bs@R*+sO+&;Dku`C| zpR-kM3`Ed^`sDt)7g2TV&pjyVz-unxl#*4gdkRpLJZn2p@)XsrO?puB9O_?d658eZ z@lJoCxWw;?5yY#f7hGq~{dqX11E0mRWejo)9}!z!lT<%o z9A_&U+n>Ueg0*cxj}ZYET`_A)>SU1WM5WbPl!!_LI;dV0A62b#QY<3tCr0aN#b9)u zVXQl1-hr21;Ka9tSHv4$sL;WiL>ZPc*Xv2nZ+9fu4Ti4&`5xX_{JaOmB{-!o8rC1? ze%?cjwvzfA2jBs7s~o6=!y!1|1#qRrjCbnzu}C+hOT9-y6dk4Y^nk4$b0zhC`c1e^ zhx&=j2qiZO_!dtJ{Ku^t5qhXHiHWqlgXo#Pi=sj~)$;JPbjjPx`M^}0M%Bp+Q|#}u z8dbB*9y5)(rst2_vrM@1pdef>DTw8Ct~@CdIV!e<8m?|B^rLJaj<4t0^ws!~Ha$$Ex3qlUFp0ErV zBUA2=DZ#{QbY-oxj25OwQ|iV~`f=5-r>!{8A-`7X4_zs8;w*TVI*aUa>pQ~V_{n#K zV!B_8Kf@Mvedz`<#n2+xY>;Mydi55(Ut)NJXa8KYL@&Ep%TV<3V$k;c4JiRWwT3NcN8j+5wO2mQ9mlNsP(+}l=szzp2}MA0O|KLEECY-&X2e7k|)tSl}X zpT!Zl+vV^u3d=whwsoDla&(#4XPLCND|^3zile{wIT$+rr>GM>B5w7$H@~ z%}&;dlM;J);6J-ks5Nu~b}@GpL*U;iZaT#fsw)ES=SHD zJDMHs95hgTZ%y1yutnZ%dTr$F(opxHee4yl+kL3Hp5VbTAE;H<(<-N3gB0E#o;B` z;K!sNkZ49GpJ02zOat6hvkhA@NU)_O0)DEu9r&}(77=3n>IjP+&uVv_B+u37;D-Z- z5sbgX?h4wPrGO`fBsEV|V~hIcUQ2&wJO^xx%lT>GyJyvTenv?ULf7x-Kuxse0Lplo z?jY#3>EXag7~sH|4|AXv4grr0aVRD>W62b3Sny|LsFpMz&f|XF(j^(%(mjzS!nGD% zB904A^%1ey9TXVFXa3Hb6r9S3;;b-lH~p<&=)^rYI8~2GkrEs0J9kIhGsvt+cJ#l* z)_>)Z|9@cX7lj5{S!R? zjg9K)n*KG1nt}C?5sLpyOiKp}dGgCXU=B6#C@bARpy^8AisxA%>LYmxAt#kO<=o<9{hF zh)2itTgo|5%a)1xw`z$0P5b-}$QX#x@fhiVB>N{$X99|^FafuLUXOnT)c>Vv7yy4n z#{bJf^M_#!_#LMIa(^(h0+ITkO91?OP8L6VV`*<;_osRUjDLp$GCkmztAhnd^ntc{ zc~W=`%rBYuKp~)C&*;DRh*#rJ+c#Hrb-2XY5=wCb^f3nSA zf&Sm2TLdf%K}Yw85&KIJ=S2yc{x2i;U-aOQQ|I5h6c}0mS!P+qQoru4`*m6UD7a0g z8%WUWT80tZMUXqt31R^+WTU%hFImJ7k(nbJ9I41;Y%oWIw)`UMTr$~q@Vd5-wlb&J zN#3sFlDNR~1Jv9P4;N)5y2m<$X=0C5KV_Cno6S&~u|mY+w4Sam;#M`DR93jkf@U|TGJk-WQZ-1@@8e4J27&uqPxU@8JuEHV2uW%_ezB`rH z4U@?f)i3(Elf11D(yBse;E5RJ%5XCu8 zSEQU@!+3=+p`fWfu^g1Y6c_Q}E+$-3ly$1;hxfgUM)Wb7fNGXrIM(aZ7$qRGLTDRT z-%IpmerTY^RJ++5fOH8-$+bO<43ki(IAtZ>5;jybD`(D?mGPgB6Zm{E<`7fGCU2yg zi768&U~aM}&%~b2MgyOuL&TeZh2%uDG_l}R&r@q{JK6Kb2Fvp6TI(25Z%giA?0uZz zGvY#``(4-MDhP`v7q{E}4)uaM*E3Xr9FLUN`_^rmG!OT?7TFn!?XR+2Yoqy|P;K9? z=Jjt*JT=`tOh+#rw^O)*=Wp&$?#{pm=V zU{1jGtyV+2x%CeeO;2d6^869F7F93WOMC(Jt@e*VdAzr!Wxi9?i+c^=*UmO-b%^@X zHcKu`aQf0%DkkQ4huEZ`RApJP5m=4LcX>^b;2%})wK-0*y~TWsC!a%DhY(^fyT5(E z%qX^4@;+RWFfHJLmMnTznogbe{Mn1-dkxnQexy#ewj3 z-LeuyTb`g-c%uZ`;gyb~$F@;)5BK~l)}It5g9a?Y8GLTt#)aLov@~5_tmQ z)g^wT3sfiUt}L|`CAtT?SAdm?Tmh3YDUA&H!TEW?t>D_kuol;e#Iptn=%rXzQ?R~`Un z)jAz)_DmVgV(nXW1{SFW%pB;okvEOzl6M3Nk#S9@S}H!zVyUvC;C?nnAq8GY3uq=W%uwK*Mlvv3#zubS?6hMbP#{BjEk*r4-Cc^Ala z96MO+w#>q`6S<;q=F-O`61LJlN^WII7#fsg)j{)$QSH|)8sfWpI62Gl-bs&+a#Xa1 znrIm+Y7DAkX1X84-=+9rk`t8ycn`rU(nHA*-KHRW--B$}Z1;j5E`kOiA;IDgqYg)i zI>GTc;uTL|6wNfq2u*2|M#V6=$-kSLgt#j{sTxnTn%S5Xfmvbco^?^|9g)Fcv$ovv zwwvKi<9r8bCv2&_|EMKS7S&U%8kLwX*A?D#=ab{lIhKH^d9$Oj*}x~}s`(WhX77!a z+xJ&2AdP2Jef~}vC-~8VYl0D5rsN=3O7=+AhZ`Hj1W@n7NNf&Puw$7=qgJ{YRyjIN z;X6bJCVLs-W~i|(@b@y{Sj|FE#-pYob@D?q66^xBCxR=9idx zGE+M$hs0-El#`L8Tn!zSbQzO2)AwVH?!sC;byfqidh<1P1_tw3{cFF1dlT=`?wO{y zZoEm1OPc=2G_@@-w2Isq!ng+S802vbg|)JW6tgVg=Gv5jQa7T$mb(f$i?^4~-)vPv ztnKDWH@=mH-(Q<_dK==p#M@v}*H$pkJQ1C$-eb}q+U`}#Bk7h2fEP@M)GVBZx{xSHRUNCj#b*m(WCK@1t`MIwpZKk1i7drL z;3)@*g2NUE(8V4|R3p_i4)m}9W`pQ{R`7!D|EFm~kJ)R=#0et{ggu%&({0G*sZ|OXWKJQmjP)0BMkBjNz z0f_p%(WFQla6cEB{6LaV3M%hKUyd)(;zueCbQF+!zegVkX^rpjC6$2?8WndMio#$Q z^_TN->o&v}Jt zciA~=snAS)Us+d|RL%r=Kb0I-vPMYyl>n=WG=`{=v-bX@$cFy>07S=5R@!faO-Ljf z)I%{<9M<$7hSxF*x-A*e8V!`9`_I}%GTs22htRM5btfvv(!>;j^eQ6J{U-ju7JCZs z*^J@I2Jj&L=(A`ntVAYwxYCHJDW_jg z`Es-%vu-3}+*1a2Orza(2X&F%5)6y4qGQ_o-V0?+i%UBD6$V{e)dfw7%lVi zD|x(ZUrN;TnDNg6-W{!lG4Wd>{qbHT)QI-%e1oup!&?C2G}BI%6rw5ysr}bpRu(nm4(g_CQFB8up*1MR&~GV1 z0V>9y;^YeksS74zHDq%FHDt5SfXhn_L|58DYGV!({M$9YFOCz0Z_dBX^*Lw{d6~WM zGwVmy?ejGg@O$W^E)e;={NZiNP3U*tS*lfHR`iWVi9*JtIp%_iZss@n#>>PC3zfh< z6%vJ0`bqM}`fA^ZN}`sC6%HyT$g4}0Q)0~#xsn&NJG{)Igtdk?tmKF2tuKcBzHubf zWbwxuA_1tX~>QmwXU(%s6xa7AgdK$|Qa|_%^G%G1A{8TYvUvkQ7S>No>c+a|8e< z9fKr%kBJupkm+JV~?!m*Xx@EGU%o*E!1>lM8Chrt?I&<5{y+%!f}BdQD+su zUl-AuSQMF87dO^svLnM-FD=k16d;u;JJrmwJ(*8Vyc*v*5 zlQWee3NF)A0{Fr}cl?<=o*te$nQlML)OyuqX=A^sY^iUb(J1-L0qFN+iMu5~;cD zMC{Z(^!_6YQqz;$bwKxeo6y#I>OH@c)d|<_QX1?Po4YZ+Q{~N^9_{*ls~)Y6RVr+& zg9aqCOv1LAmY3ZUAqR*Q#cf9U~U93C@@=^s}P$wc*kesg8};&_@#!j9Xj_@;Lso) zp5Jg_qZY@o?7iI2?un5caY_llQKz&tY|*}XT~Rqo90}=Uq{Ia<_d*k3ZdoNMjaRZx z*%|c4ut4b5Xj!f}xO~SwKpib_==0J3V0~*uSfgKjQ9JB>=W(XJCQ0pLB#0Gv%tiL( zC{~gCTlj}KsMEJ6kqW`Z0fdgLBz)AFQ})j32zaXqI@+~?=%^%VZ27Xq5!TBSHl(|v zZtiNcK{wyk*jYT#wu%*Bqvk15=*;rOHc{!@qti{D6EtlvQ#&0CbLus$H?YflIDq?N z_u}5+!N4`3e0Ff=3l^nD>$^zI7wo=Z3*9e;AvRi@&VP%c6`_mvLqCqHAs?Tb@0c1r zo0B^us&sY)5}sk~4!y~&awYM&QAV%zB9=08y8gWbIG7;rY^m8wy*l4_{@cWNZ>()e z3Z*>x$%?%%Ytii=*ex5AF&XK?jzif#^98JYIb`8?h#QhdzZ8^VDc_bPvyG(yA33{? z)s5!7qhyYrl2{e6-9%uyy8F;j-^V3B?*!etfiw55_%$w7nVd!z2b;OeAfOY@8%t6mt%UV(VQZlS)B6NYmG}^G z;&691cTM!fkZHp_*pBUe7mm=^?h9W~9tWcAG5@;_`in_RbBzX95s)T}@R>;S*Uk|& zK?Nm0M9N5npK$x0%OK94#IMR6$$GGC{c$Y$?TPOjP0f3EdsNu%0xPnM#RgN*#+3HB zf-&x3bpi4-TWb?8%*e|rUiTw^tfpQ34>Zd!cV(0f1f~S*MBzLMR z{Eyb7aQNm8mZ#S^%>Hio#gBI`ztGw`@=*7`-yhqIL03EBxuR4Szyn zE*3?P$?b(HoCDj*E^6GEt>gG};jGGM<5r2PXpg9C>QqTvw7DgH=f{Q5@y9dECjeq8 z@1oKOE+qDE^sR|&&Q~<8e4?KM$*xHxK&ENDqEMD3Z50f)eprLc?kU;pIXXf9SlO>d zHq;lxkH&?){}j>uJ=)kc)NgRp)Wk z76mgL!QjkEDCo9g93d8!aB7`$T?0lX`b5t|#?qLG(M8`z`7nze`dhi-PD(+GS2Won zzIWlL*W63VP;dVw*Z(WN{{MpO{{)CHT>mG$`?>N0qW=l-{}kT-F91J~^!|S6D(=+`e!kHfEZ}>@# z8GsS$zvw@CvyB>b?NU2#QulFfgT91e|3qT=~n7LxrLKL3+w8|hf+y*$9*g4h4)3H}XLW&hAOpugdlx#(W1 zc>w=j`Ub27{AYUs3wvl87#mn>S?D|2Y5gVrf${GUUZ?-vWd$tx`3^T&K#vG;`(?!Z59T)`@J{~E zZ$O|x*l+$0h8Ib!UydqZF3QV*WyE8o1-=FUCtU*kaSr`kcLXZ~?VqZ!Ouy7aZm@Pc zDa$tm75$M4`|;h_a^g(YF~|c5g_xfgiuUa@2qX=UU__+CG&_6M%m`dA8@+SzpiYE! zA^dK}lOw~;t|R0<9i)pVcwb$byZdb#+V11}phw-^eh7!PfHB<^VP1}{b@Kb!1HPJ>8kG8jqDgdM-3Xk zsS5VTY#ib8!t>43je1h|#8yCE{HJmV?vFur(n*glQ6#qb@FP?W#kJIWzVGpM z0<)BB7jSzRjxjuxFSc9B^!lebPcz{*W^& zpt;zP%TYRX*F5yY{t9I^kIqa%QEd+c9x%*0vmfUifv^cqURPE{F@1FX&oz;=nh8NG>JCdS*SDtO`Pi@A0T|#JUvKTu%o< zaQ5X!#7p=SOoV0Xeu1e*BAB_x2!YJ4_NvuT=`ug2Bu?S#$CY==`)m(+FB}B-qcyc|kM#xdevz}EFM(P-JNs^&+ArnC` z5Ll{(tBQZe=|`_RD_B_yW3FW_R5^FJ^iku0{SbjZ?CWmWq#Dssd9#!)1$3#7A{YHg z%q3Wf7ptVHMk;5+_1!D{k#&w_kEPBgsj%bY9&+_oGz*JV|d%g&CFwItsizR#<=iWr309XTy2(Hk_g(})nuSh+ zo9|?dz!OcSyhBBdK26PZSC)-a#QNJuj2#-B-XuWS;J1X#Zw%&f8C^Q2uwaH(Cxpfr z?6`0qhc!K@aP=Xf?bjHee)qN81HNXR6>RZg4!}%`J!p>o)pcq zzLV@Z3BU74W1h zKJ^OUR9mfF_xjmcm3C+vMiv|)w>KPXJF3n`UlpC8qOJgq;+(e1dk}#^%ZT&#JZN?y zZ#9C<1mXx5$9vS8GQ=WF_GIes0C^>fz9uInOOY9%x-3)WM>SI(P-DfAIBPW z!Pt}mGpyEFsxanjhwt5Cu}5D+u{mhIH*w6gc|q6c#7_NjF6WihjL?Rl|9xsXcPJf{ zoDg^A@Hj+g@!prnhRk3ocA$us02(qG@C)8*JTzp%3?SR_0Kb-WVGLX!x-s334=q~4 z&KMM$<#^PW=Gxt7HcsVeZ(^5tBcF-~Y)QEYYPb{yp;N=@)<|qINapgQ#=%J+1mIp)jYS1~l9sZQP4#}4FQ5Nq zTYT3lE85XFo@e;bKCK|mol42!KwEYh)dz@(om$A}$GqQY4f4>wduF}M0 zC5ca;s~--aJLEX=Vi}0oNoFV_g&Vt{+sYk3X9Sg|+`4Qtw51lJK@VQaw@8;i60C>D zFwKDr+}6RJ(%rv(Xr%17K3+Vth@UmNWOGr0DXG!KjlK>w8!h{KYafb^^jvW=tdD3a z^|_IK_3YN{c%}lh$q!0iUj2x!_lCAgFe=8nbAkokxhHank|^l%4dfTKdHY-Y-pG!N zwKoaPeSs+4dl~8mlgndAnOa~wuiGwT9qKP!+KdLT?}wchuo3$2mfJVoS!#9Y4nI0Q zde>Z@CI;y+t($1dBGY&&R2A0=7cJzCWMag}BxVG!A2|@_Nt!dSAj@&!?wuXE8)iZH zsbCCm*Nk?pT4KJnXx!qdat>~~msnKnT;Nc)Vc9l2HGeft%c8@!QX8H_P~q}jF|wYN z9fKRD2ccJQwX{%72?Zyu6q>o2x+_>9t?Z3kBkE48dUbuVuSUtejTzS>)LLpjwVV2M z7PYD7k53_k6EpgB;!_t(#)dGHs@kv7zv#o48h%j6A5pn=t*~hmxJtxDXS4b+Gy}#= z!XfIzP{FiPw052u90#7yzlk{vbEN zg2kYZdOa8{HmK7-# zVpB9$*=^m&O7bH}wpMXLD-`g0Sx)gso&~H<>=9TOz!o@o%|sGb?j$srVR)+3<$~jX=oXCtIeEz?PoW>P*0OgzpZeVhs{f z=u){eyXIQjaNK+YxmXb_i;_D5U*!-=i#0J!EHb(<>WEhV0int`y@>3qMGYmW9wW0M z>ef0|dSV%9p2Rze6>u(3-?{q*q1x|9-}Y3>(2@iqSCp9fJ?Q3jSp(K6jo5dA6GX}j zDol?;3^uVkv9;Uza(DMtx6>fBR!N&B{0Q&U{ub`=8hlL7{igPhBb~*stmwk5RzAQN zn(vC-B{qb33b9YJwz|_P4hw0krwJ|9_0f-?zt^|cxAowccp^qUq2Unb;B(VV9_Qg` z=L;xg;M#UY_Cjvp&&nE=VSAe<8~_{ACZ1j3Hu*kwQd5s4(hD$Z)+iX=vrH_)t-sz zatS@B5v;;snXN_)T6<8JcyffVnkxL9iD6I_euSM9Kyk6wJn0>rZ><5S!UJv;k9k)C zk3j!C!a>@UY$%rlGfIr4U;kK6=W~t+CZz~@*>#Jn^5Ko4FHtheS1U!4P8Iy08wy{o zRzx}zqI}LJ5l5g!02D;)1g1nE>6rfMM0I`l4+~p@2Qj%=9P7>JKIa2Sxj2AjgRl?p zB{QH6eaVv*3au3LJ5_)iG33c8g;qQA>kr5ZfM?o5tC@n%JbsM1g3felU!6Q?wDB-{ z;2KW`w6`b<^#qE3dW9YM0P;L=ua&Qtt*_25w09>8gf9h$(3TFb?dCea>6#ZLxe7XR zB`v9*j&y%#d6chLl&=m6j5jYTgfFGK9{Ygj&o$WJ&sry6l!m};aHLDYc38gYEI;!t zfDEIzrQEk-*GESlpv{lgktXd*m-geyf%WFafRM!S%OmYN%&>m?)1Fw+jlPtXfK;2Abq{u1 zw&i{G=Lb#f_NtGAK}&1W?020b##=OJYwxPc_n1X>l<@*ZD_ShqcUz3O(ZNjZH<0w_ zDS}3_cmrXcgqM>vG7;mmFo~x%X5a6c^q9_T_3xj|NaH;0hoYt`%K6 zk=#=PIpE5wenzMpV_t`&(75zje%_`|RezBsr^v41GM~QjQuu?zcF8xVk+8WeTnBVR z!b;uycr5mnaHjI$SGB4R`m`6FrKo;Sb0t8PoTgHA=D?t1#Cb(cm-N2USsaC0br<=0 zhhs0Q zCq8!S?(z0|12^Lx^h4$^JH3yXbT8L^AzM*A#DDmO5(TkX!gQ_;Qgqe>B`OD)eXM2p z(4#G&@m9$%e^yjfgdEwJfw!Vnnt&iZuxkaPA9z(|NkSO9>{&I0ZnNiYCXfzBichmXQ9;V7i~w5DNegR%%EE{5y~+ zQ+|y4s0ZeNckx>vw2FUDE`z~B0BmIgDi!ZVF^+1nC}(|4HfeXC41!}0XV0P@$0JTo9aUu}WPfK;{sC3}OQy!Z;gwif{tJu=3n0e)z1|(5eYf6mXMn*$ z$O>STSU3U9#NVLr|K!Mjfp2@KLI6NFBPSr*{@oR30PFT{a01dI*yuU`cU}2!R7GTF z0pwx)J~hWX)%Tl4V&;5z?{7lrf4?gKOF5|jh6MZjU3m8dK*%t^D?hzkYyh9$?-4+N z37~rPe&5*t=FR^eoyGd!kf{eG84z1T*_Tr$($sY1G5Dt^Y_q0^yo`Ly$vV z$Z)Y+o%={YXsL#3>sxS!5Fbk!ik#2IVot&~)wAXjv=@>mc8EeI?@oz#<&6RC-NrRA zud{<>7_oWT{Ugb{ow5`mi@t$ag;O6-DbFZiL zw1t_S3XCI-YiNEUV+L}LCl*!|Zms<{`==B!L-oB}XjS0QD*dUZ2Lf*S3V4hWiON zS8>rVbD|LgzbyVFe;n?YWoXCvq)IfR1bMXC|FU^`k;Op3f6Cd@O^Nl~^XX}Y7MFb? zIY&Z+|Mdn0!D6e#*SleyBjhs_o$;)L0v&1Xxwdy!SCnYyJ?0tQfc687;6Wr+5^ZqPx)?`Ky{smwZ$=vg8qS z@w#z+1TtjocqLmk@mZ}&Pevucg_d)`V66W7EOf26u{E2y7m>;Nyl8T+@B8daZT0*TZ4HzRP_mtp3 zo}{j8jn1Ol=+Hx-qDkFzGBo5@2%Dl4K9g~T91o8f=1z9C+%HvFI!wJG!PqDo=i0-u;+Hf|y zhI1!$Zg0DeV?;85oQdUYm_ikY6q}8TO*t*i6#sZG+y`kOs=bNH#EG$YUwXD-TpjTR z`N>)-+6?Hd2iOGCB!&mJAmo;^Xz~Rz6PsPKbrQcL-fI^BA~yFs9b&&M9I4XH{m_2eMI3d#K}PU8A|N&Ysk!g4!s;dNPgrti z)ZitpH3b2}zrJU|i;8b}hVw_jLlt4F(A_77>qZsKY?8v#Psi27LQ>i%166&tzEH#G zRH-vNfh?)eR|=r9b%9De`x#NJ2DV@C>hooVccDHe&B`KSiuQ6wM~m!}Dx&+eLJUp{ zoTg~p?(+mFF-cmM(OUf)fBRXVkLmiLgg*&}S2@=f&Cut}#P7Ca@K#5#*~AUCt)3^- z5=LG@jb^XUz8_lFYl=X3YmJ%V+zhh!oI;IpS(1vsW@0^Oq~tC&_f)do+N`;+K95vd zURNtal=*uil42F%Wk)saZDd^8P5Fr^Rrc&V~z7#pc9=6Y&y?Z}! zM7xn+3gZ~^K=^`tHE(sA?$FG91y?|}Oh89Ia?kbl#NEdVO2j;|XImTfCE(4b1Cayo zb=^M*ipx$^(KR|p<`$Ir%P@`cjM~q7<-&v??(yH^n5JFpfVq2>rSVSvx=YUp4b+ag z+4Prgd`_5hgyBI;=(DsGc`x~$J}O8sAddg5|MFs`Yqi^pWX#9+H`$A3w{mUf$l zI)G!IiAf+${U#!=YRVlyCjtE7NTQa$6$-LQ-<`!W%YQFpc1#hQmN1)5YF6T7;#46~ zYf-w=l(O0s1R7IOqyS-nN6dAjKt%KyyvK7ks{?Hm@+#8jfHC=1jW7v1k`sSP_Zt5F z%K8|^-tQ6lPPRH$CrWv@_KXS%Q=?P#iF1fzYbIOB&FATWnv3My_9*}{cmst}=<5XV z@J!m6VsbgQB`{y`?-^)=K#go{;UBqXJcy5Yu(6fDmNkSn32BhGhwduMgZOgu@zH)m zf+T{7!O4%vCTF}f6+>_B-zeq7?QU7n!-WS42F2rKZse;kAd$+!-7V)=@OF6+)l6b` z;J8mLt;n=5iS;h&R-tN*z~k8F)GipcWuh;h8gfS61U)YbhR{?{k0;}`M``mBHuAVg z+=iJj@&KL!(e@cS@8yYN_^7@CBZt)nL7O5>wSA}S+x*Ve zMtWrDAt)ep3YaB92L?f%Xb|ak$Im?a@XN;w`FP;(+&0@kB)4${3LRl#we>dckwLpL z2)csX*wC zF>l2Kr&uz?>@jKoW9omon;92mZh#A;|9dzgK&eC%SnVA3O-Tn_?VRmDIyp8ai31)@ z`;wkxwj_xVJxmq)^<<6K~R-v^g(6?=DaJ6F{0kb0j2$&EQ?cE~>@^&WG#dft8 zLNMhYFDA|8!yFV1*ElHqlx&yL7|4m1q=(euN$ZD!iJ9fuodEX7z#t~2rdrC z7gdQ;+L(FUEwf!TlYb!^%sJwMRaix`>hh)>mY2NUpSsf%y?^p;VNrC9ILjY*e4@-! zH{k`;g2w*(9PxZqtTeK>Y_*f-thC=;a5kng>{#k~00FZg6XCHGmQ@z=gFio#z?DvS zQ|w9fB0-f6N%!Q7AzZp zsc2EWl%Qgkjj7JfYrQ49C92@&S(;_z^QLa)|M+57B8st(YO!`YyZDoj?*T5Ojo)EO zHxi!5(^>5#_}U#&IG+3>WJB`^pYa?WFDMf;DD}w>AI&Z*a}xOb)*A?(*EedNrZbQ= z5CZ+RAHoennk-F?sdf(IGciUgSxRUv9n~goL4~DnaN})iyv-ypCqye@v4p{|yd@J3 z!)N#wNH)V}TKFRsXtR^InhxnlmFlhsM?m@_cn3Oj_it1YN-3ocX2l7sX!eGhCP?u| z&4fQs9Q|sQ1jeCrP#2e(Q_+BtkywA2-KZ#eY?#5{?5RM^96D%)Hql&{Ietc#_B>(f zs)~x3gPu)gQ4^LZru{mbp@d%QjRTEqi|$tEBd3=p^hEnmVZpp_(#8{8%WV|Sv%%X;t3-(f>hQy625EkT^VZEx1%7a_) z)9x2r5EQGd+{jWGT4h)_*_Z0nfl(D6x~k%`T1w-xrMl^;j5^CW1yf_;z;4!99 z=sE-&xSOo68sJ~8*gxXcxVh0|mh-p}Y%4~ki>dIfgpsj~Mi?ff>~1MWrx$(UtAgks zyBSF7JN(8n3;$~%W#?KhD%~_6H8q~Z_z-Z6X)P{R+dvU+BOgU=c_cznEE%#mpXGGq z%<3F{42b5`SB0VFpPwYW(r(1qm@8SRNUZQHVa6K|7b|hG#B}LJ$7+gjxuy-$hran9 z?%C}~r44;!iA?y**y7q|ChHQ}MUu!$5om*M}b4$oCOtCNE34Kqu*}sVMh+IE8jCMh=X`@J!2APMlZ>#0lYDg*u znTM^SjMjja0Xy~qgaI_ZxCNSrX##qp%+1=!mogC=3KrPpiETUBW-L2urvicJXSNbe zs-b(M%=p60SI1DJi$#yS?91Gox@x~KuuV#(+0spNmVxz_g&HkIn1}Y+(g8}dNY-G@ zGe>T!<%~6e*X+(e6j1V$HYjt+X&hDc`Jlkg7vJiCV4x3Y50B9I(?lm@$M45#rd4a5 z>puc*C|EL_q=@|z`GaB`Z3=~U`m}J_Tk}v~%t%KOb9AY$OXj%}fjA|FA&(qcl=(Xo zDT`B}LC~rg7tiZL3kfq)`YJ{v(8I9Jv8kr8!y{V~ zW(CZ&EUEgcIkxXj%H(L}RjHzfSS2hMtje50B+?JAL@Xz!glqc(F+h2BQqsA2Rk%xb98D_WbHsff;y(^Fd{Wg9p*uVGuhJybI=KYNdLo>+f+5v!H zz?<0KFwE7C?d&%3WP_CBSvFCZU)Eyi84;$UMC77W-S z`(O;N-ab->&eYE2n=N<3$7CGfag+!vkU9#lNQC7#53pOdesj5BCaBZy-gDla+5_FYEIWVjwWnxNY7Qs9 zM}K|(^@Hx^e3=13;FYvq`}GR3&t0EAHy(vOY&hx|qPjQ~7KNT-Y4GF^_kYJ+nL z;^F44d*4?@2LtI5dJH-&?AWISyv41q zaX2F10@gDkkvciY$6)%PgP`URg5X6;O{mj!hLUJ1oh`sBkSPvr^qq=YaTSpXr+y@{ z7ly%s2hXESIWi)&sN|GOlXxm`xNnVSS|1gW?qfYqjWOEP9H5ak^f0yLh>!+$w?}gk zi-#TN4-DYjKrA*JK*ZzGxg>DKOi_TIVkNwre= z+Be(=<@=60R0Pxf#4<6dyh#xD&HGFOBcE1*8--8l)JM41Z&h|*MWRd1UBT=cO_*W* zkH+Iy`A^Rq&`nJaBlJxX(Jkp@;%leh?s%F1$W$?itHoWI*{zOplDPh3J{+b2vD zruncNs0TDm9s%1@ZC8{jUPKgETNxTUmsQ_5+!Ke6;IZ; z9NN+y#rD#CDK#Fd)}Cuk2fOSSW=PZBr4DW1F|3XUR2*Bst#ZwhI`m8YdaHP9(fXsx z0U4X6kPX4e=-G7A-zqtwt*u|#&U(>k?4b@~^~pdOqo$>*A3Cv`IB8)H5{Hiy9n1)y zcI5sl6#@*$D8KwHD`ACYd8N`D;K|hn7+v{s7ID@Im}}%A*W7wfOY@HNzK*qa;A zFA=?ADH*2=958nrZuY9f2W_qzE@;Zi3Pah#qtN9}3cl$R){4T$`64VOs$=+4!}+oK zsttfxgA-R_CuNw-xsV^ihWuFPE>hM7-%F{!FrtXoBrGjSRg23K)XYs7b-F(0RZv~i z^RbvBi4_$l2hNVD)Or-e&4|+_rMR%^@MvwuquT~K#r#0wS38afD@~Ay-=zs)rtKIB zuc+@8>vPTxPJ#Ja;|b#qcUs+{?Nq&CBE{S%Zpi^R|B%^R5Wr+OPLVt+#dD8aUMog2 z1KVv7s9WWgVS^sDK8zI&k!3q=1{=dqKuq!><=H{2L0;kxy;Z(0a#MCtmeY#gxfd*W z9#%zeK=89|*qg{`(T9;C_MfuwOoLBznoWgV2-IN_Blj&s5#Mx2hfbYj4Mw<@$;Q6O z?uoDc#2PTa6NR~VIhNYEzz=n_)6wm_$pLM3PfOW@$K^~SA;~-zmQ}aYF=V2?nhex& zoGpM%t!5cAQ~c6j&M5_nEX(gLh!hP5d#WodGXgSJ@;Vr*Gmtj#bjNeybH%ok#myvJ zwFYF(1Cd-^wI>py^sDhumNu?t@my0~DlLJ8Zuen>H!hV8V#I2HFa5N6nqYeO2oHW5 zHa&dM{~+W*P>-3%@j! zRSqMLcw>Ce!U|oG)ub$_?_hzp;>CAHQ}ZkL)4}R2fhQm4YiW+S?kv9ki#pq5vRdEU zm7sVtj_FUJ=FYVn=nvqM-wv){)vwl$Z53H|L&%Ab+?Poz`Nj|JxYQ+T#s6;dSs)MC$K~yPbN(f6v8#KKlzPsWFI@Q3eqjs7; zgdUBus6xf5lMnz?r#?o+!#nR(S2}E3t2RKQlF6~whJyV2yiz4|&~@05mZ#D6 z6AsuKDPSSY>EPy9z;uPnnA{Tvm-4@mzk^KGdx2_B7M*{I@Eh8`(1nKiYTp6GT>6uI zMy`aMRQ`$F#WYnqK9_H4Hs*M)3@1r=o`&|JE1I8%=EitHr%h%;JYTkm-BIQ{R7!A= zVqlWJ;`;Ka0G?J|EwRN?EFw^Ko^7*eWF%%qZwQjQ54#S`1bhWpA!r>Ym)>7ZAj=N) z@2Y${FmnDBX=0#iJ!#h>aOZyGX*MGK(i_I1qsW4*srdo+CUY8@met&o^rO@wPi&BJ zbgP7*k3t0ZV=>n50Zbl3nBUZ{z+ z;2@Io|3m`kVug$|tOf2D2@pJ4Ml^ze^uINk|A2!;uHK+&>>-rAQ(dKnfk<9YH+U#g zHfFzHCa)`+QqXilJr?i91c;?`V_T)jyU;yRT7 zJcDTcmU4S0g!v;5;9v;K?VS*2nJCI_;;~!CZPKBl6AIB}s2U_AAMOs=5R(2OV56;W zY@?XZpe(A&IJR~HSTk*rx~axECw4tpH5$!cGe~3KIiB}xtMo8z`WjKv55`5p7rF}d zrXh)3vdy+HN_YsN7uK6UmF?zVZyB_`_6WiL1Zc#MN;`YxI8(6#o``+O*5rWnh&OcZ zA_x45oY;k;>(w(<^+GsB9l`O&Qk(cBgYE|V&hPARQVP13z3BPR#w&c!6*4*YG^e8w zBI8=#c-Mp`7whN4ujdNw_kj!h_b$y=DJKr_x`+y=qD#lum`F24mt!<9OR*R(mIvhU ztk*M+;Ff+(`+D8q#2RTOPxm+5HIQxki!E17G zB*9^}>Q2kuH_nft+UP7?y@HT1eV!C1x=*^H`4mC02gsa1jTfxp^iF5+3?=ox7{+M6 z;xC|x{7|J4?bbIqJFN}pgU2;|0#e=ld{F!F+&K$#Zz|CBlVfgN4a7(jO>(v7E!-&p z?Mb>B20Q-{;_XcIe#7g-c>43&6B6(EcU!}9aD8Y0vwhK+?5N-Z+Vs-{QJ&65Y*mn~;@+n^hI%uK}eZ zTt8ojW-~};(5{g`_Sk8oi)dpJo+aY!B)EgPuc64NOIoP zMqui#I{%oFxCH!!_BD<7UKio2?35|_asb~563oHuWit}yn&|wBwQ!lj9Yk9 zsl{oq>J%t$;eh?D1bAS30`s8uhC0#55vLK?AEon1+iee-Yi|Fy;LX1#H~-%O-uyKp z?>ENr4&HFRCkg*H-tns6#%~RX_g%k{ns?(j!1Ir|&TmNKKZoxDL{9(D!;bz8q`U(= z??4I*A@h6bKmecv5E}qsJAV{_`x}yCuW#q5r|oE^Z*6C1sPCYwXJPnnL6v_6=>9*8 zMEu!1cILlm8WaA#VBWj+kGi#gIA>()@^4-GFT^|k*(HD^!(YXh0U7=Pu$uKf*pHEs ziS2I}%h}GTgc{agj^`v7&ZPx)%TB(VxGX{|O5NM9BSf-M+;rJaHsIR(r#^*vw9w7^LYj);Nn! zC;}!s5ghXQ8!}RYI<2awHOHzE?1I(9?O?Hn9#?{Gu@&Cf{MGnq$GSHD&OGw5yk+UH z+ih7{Z*RLb0{pj?Fu+1P9K5fL`FPQM*76FVu=w#u7Fe!pIXRMrJf!c~g?HRkTUP-r=)+ZgTf>8e?XsZa~VY zu7W+XV@M-ZdCGypbeB&PE{?heDoFZf+&v}l#FB>#Z=LJazzNI_(Hd>%mu%GtiqQ(X z@v_~(;?~-#>;50@KxrQL&)1_rZ2Z>+-k@Ce^FF!5ycD`TJx@=UM_f!M%fU_vz6sy} zZQ5J42SW=0+dMxP)h?f%Cu^_szug=>ja%X-7hw)8c_35cjD8xw0DTo0JFN}^N?h5> z-9_&ptp}>vME{6Zf1lR~RsjcS8hR;4>3l33z~p-AeCVuvSH7)GEvr)Ad8tf{BdNMw zH&(KmN$MQ1&krG2s|S+V)Z=d_ni`8hkN$CSs2h7B0LN2V0gov6(yiSUO_HTY(4fPt zq@p%%7^=m>=!9tiEysl4`Dq|hZpV=(Rey_p-`J((ooXRZ;=`{SYNeN0!y*xDH{xZapn>bNy}ybNNMQsq&ih8Mi|KvC~+)x_#z3WG`@`44UH9 zO@JUx`$x1r4~2(Hr473m@pg}wmez?rKDt-^<^9^(1Io=~-{W>Y9q*?z6dC=O^!|q0 z%;Z|Ua}Qq4Odd;p_YlvSI(#R7OVr0o!|Fc5$Fh<$-MDFffWRZh67FJ?*&T2hUjU7f*Xpf!_bOkxQ|D2l*sO2Xa~-L4G_iFkXMV&+*N zdlWfdMPYk2dt87nGZx=X%{~lw_ujTmh7PXbtzoqRc~buA#MwT%>H24%$h;ygr_Sxy z2YP4?R|f>Qq&k6S9H)$Xeh1tBs8K<4U78qi?=Nws%woFqVtegP2E~DEOpgU#vM|=CX@tWs{8Y4)Y>F#(!DGx z!7oUrR5XQQG&FZC_c9SoHv2*M<93|N?yE*9>S@?$X-dyR&6^i~y@kYxdm+`AvM{GT zuJjY%OJGmqB|h2K+nyR+DFP;!jR6Hi$=qix(Ly3}eM!Dx-nOZvo0HCg~A! z43LYe;{K$lELwr`brwmliTe{Od#1&77^c;sscQh{ah$NLLrxCwCyPW;F3JPLn(5K| z{a~x*`49(xfn5<8-%4;b=AW}uTY3wD=tSLKHT-Ic1%cAe;wvunaN}W*ln|w@gyhtWYT8djc|B!AmgH<9qC6B0ib!m7ab$L2| zajc!MS6_i?By0JBs*R+=5X{F^^;iWh#3dWasUb-jHCI84ZaPW{Nh@F}TNoW2D{(b9 zK?_?+g{ff^W8d_e>nah0!O6Y8*urw(eDx($hHiRV-?%xg#C$9&()?D~@%&BIK{|1B zh7c+%ah?-03c&OV8puv+Foe+RNy{4nR#JMvtsRJ=N9;;$z-?^Ygw`A-?@Y^XBH&Bg z!gFG{;P=BHFrK4p5ZEYPs0qVpmUAQ7>a^CH!lGubCRH;QviPMWRjM{n+%w2TkT#Ig zGl*ft7DfmAvqG_=6H@FDy&jI6pyHHdQGiyl{54?Jp#`iuGk{gc3$W_&0#+R;j`<-4 zz^aoESatN10ILqnUss*Qe1lPXA1Wtci*9-{Qzt6%Rklx3fR`L}bBMSuMkQS1M_Y!L z#2`sYg&jL~1v^t9q9iV8gqpm7RVHivM)7qv?8J?t7}k2J<;&xtRQ1$)^9;o$Py<&84xdxt&tj0?!DrkaFfQo%58d(I4(dx89i<2&ogG-b&;A|V4 z!cofRoJ29(P>nrdMZd3cmLGGYqTu=@@Rzy~Sxu$S_+++yFkSPJgvVIjX7nK#&aDQW~S0eez z_EXQV%qanHn7)Kp^;SIrrS_WIwLo&K&)(D}QAq~URi2A2;;Rf?-1sulVb7Hl+;+m3 zZlPZ@AGHAe!_0VBEp}#wy1mn(()HY0ypesXyruZcFGBrW7rOzR)kfna3xkiQi~c_X zP-Iu-VXkPea=cRc)fe5$y}EKQF(y3^#I7V>eXn35C?CKa@dg<}pu7adu3&OvwP|e{ zcQATb+X<;3z?c9#Oue||I~hWxy(&vd3*@<%Oj)D7OjgQ~OoJjCC#A5>zf;vKOUBtR z1d?A=5d2CqG?jo|C9~abWaXu~?_J8f|H~ki?9her z2_HZguFc~=Ok+cJM&MI+{;YKAhp)Qit| z;w$&`aO)D8zK7Zuu+$*2#z4#G5e%uu9+SM=!%@GR@LeozCtlFPEv)0R2-#TUF_9sb zR){_pds=kcHj~VQYGWqe`N5o4^#H>_z>x)!ss)bLiYK)Rl?dms_qQ1dI@|-xG@TRf zH`;N?>DgZOXWu`(y+N(Nf%o3aD`DiAtZBLC7fUv~NGc`WJYg#(Ii62Zc% z9_J)+!Xc~G1td_uV~(?e7=I2HLoJRJM@FTm_V6iQ;9GzSk}N5kR8n5ZP%J8wYAkVq zq=L}+Wt<{8(TrBz28DcdW@ODd7T*N2X{2y?5fhD?L*(N0rA28Rx?MMM%?3_lZts2- z6CH6d$5x-Ysf!Y7E|JM34AZOdbkKnwYe1opV^3aTR5HB?QbI4Ko`RA9lTrjRb+~*- z!PkWSS!{78Zny8f``F?AYKp~=$$Zgk8T)LsT~|cZs-BCC|S4gr0tl8sOXFrUbu-|=g+J@GJs4a+TeqRS9&aqEu zGpo^C=0a#i0SEM9tIYk%*kC*Ey5z(eWtyIfzyb6IolTvW?j+}dG4$kZ1TF;WD@@|X zh3zIQUPtnL_!Y_1gW8*yu@+dElgxTe|4d3n4%KRY-9brya$UwmgP!bpOB>M7toqa0 zy&`?zNq;fU$!`8!c$Q!N;Ss2N$K7sTedy4o0!KZNz7n;~@3A8NMyVG9jMk%iA>EokjiABoQQnk$)QnhXrUrGy7 z%$!+43v;j_V>VSvOm;2uSOLXKS-+e_85Pg6ekolW9C5rfsZTX-`sMQ4fH&^&*N?kY z>uc0g+Tfvi%w5dv_H*CjSK^X>SAq>`f(kF;+GlT9&E;nSnsNd9k{_<+hqG0Whg+70 zH`gPrO~D3^Q=O6qju-*DYl6zMRIknNJ8P@BQ+kFC9GS11r+V?+okT|mJzgZ%ucEE% zEsdR~?@y3iF{0$YH(!RVcs$%+ORnqL7FE?-yKL-Ien=afz&NXDXj3|Wk<8j3!?>Rv zh!#IcA~BzQR7)GX*pEodF3@ohSG>MZPUxhr16w3~et7XUo4bP$0p?&=TSpGU#;6?y zKZc#Mtqje>#O)+dmOC2$w2Zr}X2=B*L%oL>_X}6=QnG5XL&KF0!l(Eb;&d%;PF3P( zsX4ol12y$C>N3cyC8kHu_33k)hXmLl1 z!ZaG{tNFlL_e9Q5oflK?*wGcoe3nAD3mLQ?AWl^x3QnfoL7WZ*jQ_ivq5zsp$dCv^ z<&N45IZ(r#G;n3#7v0XB7TZc+nU%Kx*c7PTaY~K=J^O)?wx8ukq4f~`@0(O|2h*sx zf)SfHFJ^y*RHLJq9tR5=qlei;+D%xei%FqP6p-u@DA&zSy1hdafL$QgcTms4q4+K0 zD!@QP?suoMK!icMm-|&J4ha_E{X$=d#rg)nLef3SXR0O^JTrPAbF@iz*ZUcV#hoFV zCGTMMu#Tfrtgo*y4zh%pW(q1^!s^8u%Sc_o<^Y!4v?#V%V>Ob^lu6KEDQxJ`oDbyL zZ0`8okJ6upiFs*u+|!F9T?+;|prp%7BRqYKSCZVLS@2FIlIe-4GgCM)2M>Y2@SV_HndBxd(MjHCO?@=in-Dtn`4sbo}H1 z_%-nN$e5@i*iJDu?L%0lu-$HE^`LPjAGm{Jle&WM`pNv3H|Rz^Fj3e=*=3YPuwBW-HP`G9 z&%2u2CsW`rnROpI&hND29o7;49SX_y=cKtmz?c6YqmX~f{RJddzQ=(5$DpwPN`{T-hBqvjO=JOtFZ`VG&q{0(~g6CP%$um3M_*nc53jPnn5Q~)^2`nP0Prg!Td z&wN*+1XPgwyZ+^Sq?)~zf%dxu=RW{pY>a=Fcl;khbAR&XJ>3-$H3zs%e|6+9$*%tx zHTT;W!+&<=&zI#tVsea3T>l)O7PZoc27a=__<~o z@4Dx~Wof7)r#P88kTJ)hfRj6Kf#)NJW$S}y%>X;ELst)+7Y_=-uKv#APZ++!KxC@?C$v3{MHDr=>hb<(`p;(+C+V*|JN()G%gcX3 z=}v5>91moy{pFWc9`qN8oWi1)M3loRnmCs+N-R5T`xY;$1HH`*=%+3~prQ|pA zIOqIB-DhzQzq@q(3IfJ93Y^HE25D%mm=jKS85k!I9R@{5`wpC@OVm|bHnGDHp2p50 zhbBoMH(qN}(AIRJhlZ7<{H@}&sm?1)IiXS?f*D6cd>YKH3B)wl2_lv1((!X!V=Z$t z6k}+mh54}X=TmA4MiDOU)Mu+&=!2={G}KA5V6-91(K1zC1V()po7%oo$~ZqhAEv3? z>`_5~V$g$IlWN&J@Uv)mTv$)e*={6wgczg=V5`{c)Dk`mh_EByjUv^iulkA5V@hSu zxM_Llu2|ewS@?=8SLDo!CP}uE$)Q6%LB5_K=n;2w>?6G=`erAQUu4)=QymIWrqZTz zk!nRrd|wQ@zxS`GQSG%@6-rY;Q#l+{a4!S~;nj&Qr33*-drCP$(#$Whu?9F4*eQ!I zSFmPqBcv?dubOZB_w>J5@g9?i3*fWQSCol~elUkdnhV<7bvmm}M561=AI?HZEt@^z z1~;Tl4D&y!xuw=SXw+28za}-V_kV4jR3UN7=9*`PvE09iaZ7!KYRux!u}=O;veo!N zi(UoZArWm->*GskZ%&H-ahOxg!zcd%S&%{sgN-Nwh~D|!#FqNcJ@$t zn_6UqQU#(+jeJp+g5i{k&$A(#CSz=)W3=0(##kMg!$5U9SQMPYKz%CU6=1`hovM9M zW6V(7zsIF$(gM>@@j$GWI`OTLA_&J$-=O_sEK8^IQ>6ef!GI0gX+x_)iPf+=5r%)6iyz=DfVueT z|I=JPjH?vjQ;=&u5%sN$l3FS3iL4aS`rd15(_BnYqiqc;xdj+Dr9<&3MlJ;IYD^!G zFn8J{0!LKB>cAvIrT+B{QWNQhe!H}BjAP6`fHOB8DX}CDLNE=_;6n~yR~B}fjxjsl z&iLJg85Ro_%9@NZYxd2I!y2dL)NYnjsDO(!k1*RyImD{^6y;k^Y7peb4X3r)VsCEz zI<8dY_E1{XFY2{9Y5vA%b>c2^KjksKcg|*zA!{6M*ks_T zb&Kg}JAce{dZ)UmztTy!sLuhj3s%*?6r^-}FM-@3J&IpdjF&>S&EO2KYndU5Xi0yu zOM7eLVUCUi=dKR;_n>OvC^P3-@inQFKZ&{}xm9`Xv~4kOvU2cdPUu4Sv`Om~9pYGU z=z-Gt<(7~@g9C<_hkmxxw;TN=*276AnCp;d?4aw#FE{=%&Hn?Jyuvj}oI~<1g)@G< z0QPbd$}}IYkOXVUO=0LF2~DGU$MiNK^(ZIoz$}+>_ylUeOv|Qznji^LFuZw zG#c-F4p1wfoP3>!Ao+qU)<}9`a@qSb?T_RX3|Ddi>XD-}Qtg>Dnxtd?dQ?roT^xPI zS^GIc%h?sN*HV7Zy>OzL76F%T*6uC%`}wvo)yP!O_X1P)Zi%FunzN}Jp-<8qoP1%G;7>Y#x3lOK871(mzWK0WNCw%~8kLpViuob{hJyp!meZ>e`)YMCEd zEDvAfNzJ-mTic*tTV6^_?Q|DX?HIq+L1}lbfaN#9$ivqVJnXE<&50WFSvwxfH1C~9 z1V`}KgSQwq{Mv6E+?jh->D|VJDx#V0u)FqsRnn9VYjJbyD*aLTv)*3&uLgFkglzZ> z9}4Jz#PhDv#P5ympWScJjtgIOmCZNDI0CwI^|yxV1G)>t#>`?HIgTb+!$pydo2_CK_T#Xq=XUaGKJKm7(B5z&dHSXgIq;g}SKe$y`jWI-U|E%=Capc7#(+l6iVM#1Ynr*t8G0M3Uoo7rrq^w~NF`1@Y2#mgAnQ3TP#GBbr@ zwhZq$qD6}lH_X!w;OcJC1nPq;qIdyLnk%VD>jwV>Y(()SS7t+ywday z6F&wKFo@v9x3{v3k((#d%~LbXVm>MU1gFyNo50QsxWLXsG|a%(@{{_KhE9X=m$BLB z2@NA=3CSGF1VMftDUGp-{UR(DG~?UA&SOGn;~X@LSvoF)8Wx6Ah=X*5R?Pruj#ir? zWU~}11FX>V<}n|;yyf_AFb@icn7Z=q^)P)fyGbqdl0Vo6iSLgv%DeS3LT$swO{C}| zv$IHbadwlkRzp?QP=03XzBbKC@<7C~I|5F7#)RP!O+$0aVRt{a($836N)xI8Hwfn zn-oSz=zbAyCC-8FCIaTb*4>alnu%QwAZY+ofaq>897uLcHe6AtW#_%&t{383=W`pR zK4e-VYCq@b0_u4X7VTpIqPsV|_>|n>LL{ZphDe?rp&haDT;)L`Wnt~zIcKzFNPjus zx#QoH{Pd(7v&gUxHf}rZ;wIQ(x!ZE6H#AZkicLLHWMAYEzA4 zqs>b67zvM;7K&)D)aGE{4U7GfKvLZ`0sL5^nb@L_ywDW;PVyveh8@y8D8S5Ll{HQZ zSAH9oW~tp~|9Tptj5H;fsotU~?Dk_!$9ol;EMcZV8^!9IrnQs*u}E566%HI^QD$5M zJB3};$tpBlyC}ZG-1BWwvrhP(*iL1@KG&#Ie@P|bkf9lax!@gTc?NiNF6cJm$(kL^ zscrgl;I#_*8gi*orUgr%sK@e--PY=2P4cVM1RAQ$QAUu>+jPg4<Gien4MYf?C6^UOO)l1!8C zb1{!Dpr#l}EmARq&5V6B?JF2y)u&}1-3N49gh|1$8@DlY8@3_Op_%{KsKLkWG(7|E z{b53DX6qCs`*d6cr;eZH6e?F%IpD4oya< z55NV7d17qt_g@M*aRZeVCve(2ZPsJouy;XqvQq?MbYf z6OdEJ+L#(pVDsnHJK*3wL&qSEbxFjw-TfTvP87~A@-`Dt3N3VsQuJDMgDA%-aV;(tUw@uPoW2OXcIuet5k_vJKRgf%@Y$Cs3`aK{X3*#f)_3-#3{SJaP{egwCFg_OYAF;6C z3i%(hu>OF0AW`NXp`Jf5Cm_e~@#y{qgFV1bHu?_#4tDx4kox}c1wsbdQd$kOLC3dCf41(RKYl5 zXH!+pd^$Ut6^yVY_k8R}p&50Gba^m95YpIHIRF3*Edh`exU#WMmPodoBXeD`aWohw z*-rC%I$!MjmN`_fnHH3!FMvjj9M|*;7N>PIrtdB$+xYIj-R5XC6^s=#L`-^$4 zXV}ck6TGuryS8jH+wCA~;<>p9p7Xd~c)ywQ9_(Y=(++4aL3RaCBWv(!PtrHqP2H|% zSW`C#oPjdzoXE@s_frCi~j5C?};4;vIVm6}?D4C9gNkEl6=&6knQ zu>8%_kj*FE8&yK-ZShDuy-j9>+HK_(8SD`A#oG($wA8uuD|6?zLh_`?H{}Eic$rxO zrxn4mn`7S!J~n#oYT+i>lF_Es%cknfewLrpEYq)=lE>QX%WRxKd8?nk86p&x{CXJ1-)AUZbhkQd*nvuJG%rSZ(H4GPb|Xt;+GV__548f!UF^)6?!*S%7wcKcxB^fT60bCcY2_uX#{ z)~Vk&`EQ+L$dnNpLN#ly%$-0R-J$^H~JB`muc5RBUc2+ zc;}Vr%!kfh`j*U*j~@;d&mv1D5v=Dx3D19iYfF}^9Zx$<_1~W;MINmlESvh=V-P>hx?o+w*U6!OB3iG=$EXvO(?WOw?bS}%>MX^ z5rwGMM}T$z$iy<(M8u-;l=}0Ps$nY`25Q5Jk$J$_hEjOI zjK)!Vv>1n9V1Ot+V0_mq`b$#jS_FEZf{Z;d(BrhbHKRQA&}9$mT^iuz?lDa<@m2bm3U{ zh7L0vkx-q_Y&t!xLYR;EZoSLIZG1E%B6ps|>R>e^fnj8{G+y?I`#|q_=|EvTdm8&1 zyBP@%R^~0E7oCsjTNDXP%DdS$l%W*T2<%N;(z3Bh{&b7t=yu~t_`sE7zE&prQ9ryo z$s6z8)>68SSOfAdC<=CpDbi3;AsY!mgnk6aa;yPa7a1u>woZgT6b61|KXV}}zC0dN zm)#3L{dJYG70_xduj^LZdVqeN&<6$V9wzxN=8?kHSffgeGD>!%y-WJ2n9k&E3o*@^ z`mYVWCfU&C`Rek3=~WzYXNvr8XV}**K$sP7dB}g&!mM$lE28~6lxG|S!bEb*%Rqh- zAQ#rTfzxHu$Q6Bt>ssc3#Br@n{@NS5e z*?m!tE?W@6rq?&FDQijvHPj_NUa_m@q?O~z${9b@GBi^S-yt8Z^R+23x(a2nAn0Qq z{`7rLZ7tL)CpjANY9`+%XZyWIp;22hjzeIrg-{>Q65aMxM$`6rd)Jyb+t@cc6(2)i znB^&*4i#1vrf@{1uZF%}Fv*BY5(d5)hQFOI%T#4m8IHd!%7iKf1N^UovVDqB*YM?^ z^h*6uc@q{_@$Pakk*62*gHslXg~i9FD39aoa}t7#8*{ZbA{9D>f)Q?%*ImcWL1mxg zs3{1Io{Sy2$aknTxiEj^OU9U zxS7Lst3heqTb`7ekhX-4m|zs!_QpC}w-TdZXx-aN(Iq9G71xBq*SjoO+DFqZ;&B3` zgn~OLd+3kxpG@T>y|;2Op+p^9zQy+`73cW;WoNm8A ze@ya9(EW^Tew|a)z#-%d++IBC4!~YQB~AUeir6?D%9g|H_-I0L>0l9&)nB}x>iA6R zaQL=77&$`oCB+nsObfl>fXVme9XULvddM`;giM1;AA=akG-y}~(1c6_?q@ypkZI7F zZV&^R1_hL0!@b@4wD=IAdYOSL>Ot)0v-XG{+PD#1d^%2jfAcd}N%!+W6ThoRqiR&>3>R;yZwE{O64LqjX ziNN#-Gd9Vh5WS;bVZ3J9)8xR1Lmy*3%rFDxFFX;NOmBgQi#mjcj`H zfy+9CA%ghyLB5w9uFI|ZaqW{C>@g`W8N(T&DindXm%0@g5VW15wtljF__brMp}P5; zvSMEqXPoO;xofh^Ij2L3p=XJHlRW|6{#Htnp}PJ6jp>v~d%{F{*(}z0d6`#&>68kS zrFI`Iz^bIskQCMU0Po7(+KZ7QdQEPMjz<-%)ktBJ5jdJtJIS*{{0bFkCFiZd$s9x~N(owFyxdTPo#P z$s^+@iK4}pCWpu5ktR=?U=Dl6zZwn`>1^=UnNXE6Sr}7dJsieRT2Rq!JzNSeSvb@o z@f!jMdxI+JvcQLaL`n&LMD_}`f({Pw5BS0H{39#0T02l=lP;pCP9du`?O$J`zn=S`c*!-z%Xp4aRUm%&*4bUWf(x?G@b<0p;Dq z(8l4Ww96L9sJyGu?q}`Z8=Qd!jv-&1e#VoA1MMaB3e`!)3yM_Sc|+``8|A6oLYOV* zWHAeR>$N!A`ky}k=3+|T*6%om9&&cRfa`D(nR7?f|{~+2Z$?t8*uA z5AfC&4sPh%5b+|ne&uT1W#BWX%Buk5^^I3Lw;dkn+Crv(-I(oQcoinc* zazErV?r{Ton!!0+)m(7rMRMGb@Io1FBjo#_I$LmJAJx%-?D!`5IPp}ocV&U-*kk4B z;^xJ9o=K07J+e_Ym~AB(ODuXhVFf6>X5!RI zlk1jh3!IkK29u^9jY<;Q?wwcJH;s2TY_C4ueqXKi0^dZx_Y-CoQd7|sFWD-8+8f-7 zM9R2MBFxA=f8b2tXl6RI2ON~S?nH*A=X-K5al4RrddS8KduNeeoqr$6bC4H*uf24A zzh=7&{5Oyd3)4TzBmWmeHh+Rs9yh-KnOelc_)lKd|FQD#kF7cok}CF*IrA_40tm_M z`xxH;AE?1UAdG(^Xa5sV9&*J#2G3_=`imYmA=HLcz(@1#d>op>2&->9c%kLg+wVGiOla}IxSQF77%5u7hcl@Or1>fCPLmx4cWt7YnMiC(D7Q+oT~g^j;U zqYpS`i4RY)m!d(LHa*+1-T90xT=nf1+y?zo-v*M7P(@{lG`nH-NpOa(__ei@CA{WS zZ2B%z*T(5@*Abcl3JfpCc9E5H??x;#Y_&dc?oz~)I_X6?>D4mR!fQI!?~Z2aJ;)55 z5D+Moo@dGf-9OsB$QI8GW??Lwj{DfLGjH+E)#$TQn(^r8bxfvu(S*{(I3tz;jNGZR zvP+?Cv^p$uUd;1qR+_yS^RrpsYd~!QoBP2RMjo;c2Vf57kaDBobn~k8)9W11Ck1X7 z7bk1t;KCW+J2*E5s$q*XZH($LK0bFtkYlIc(Z=pdQ}P$6jLOe~tv45KXBbu3=;$~7 z2gi(^9{Q=`4OcT^=Feg?u$Q}Ecd27ticI)|kPpz;@ZSq1*uy5kg+hy1Bk1|)qm1DD z=B~z?MJ{8vGk3kF=744DVG1w_&C6ZHZl~xna1{x~*&WOHjK6hlDu7F_Z^0bjiTeRu zG(G}F;F9LeeIm?ZWD+0oo=udyOanI>vUfC>!S{__eXwRQ^D~yAW#0*TBe;l+Mg(@4 z6-hCrVrhS=(6EyFp-Yls`GBvX-Udo5Iqb!2{9VV@I25R^AqGb)#2<=tjb+0WqfRY= zQi>h`uOl_(gRp}KI{JG$4nM}gMY;)WDSAA#!Z3nPkP#GD8jb+@z{R@{6xf2mhNMfo zm^R32qI)@WD5OJP`)Tm^S~biJO$OTN`aA3a2}z*GPu4)nD)F|e2;-YHXIRD#pjXlX zNIKpaN}hXV6ldrn)47v!0LYtkh>#j&?1t-qDtahko(WkGF($|9TZf6q8(;0zBIf{; zH*uF_!*X|4c^8+4Xr>ZHjlSAGYPdYtbVN7RpF|>2rhY<_J;{Co|{9R z8}Xiha0FI~)*@^cTXuSx`?9?F%EhKXR7t)!FBl0l=`Mm_Pw(_@QSR%@qVLM0XVR1x zw+~+yPqBLDp6;VR>3&gnJ8y?@-$XtMws<~ToHaS_@R9BNPs2)>8xIR}CxTs5-x}7F z?NC+*jucMJe)K2VnwCzUJHF;%&+drhPg&U4v$MqEcWfn!SJZl0+XwTfInrZq-7=7_ zrk%Cd`3)-qFOdy;I!;ob*x*|XDLD#0If$sZL?LlI-UO{`aKA_lu(<_A2HR9j&4ENn zl*43!*Iu@O|^h&!Z&hj&FV`8j;;EbY{w&VFFQW5-s{f>bB! zSTGb)r%o_i-OpGylKlz3Vp zzK-9ACgifmHoalk=Q2QN>riBwWU5lW&7$piV>mz; z3srSqPea9K8r_b-3hZn8FDF9NWVkewsrLJgLkmHBG@Zie{Lm@EEX#UpSTCVC9i<(a;1JH1!dwwX8jAci#K;$rB76eD%%-ni z7+Gq(SpUk8CINuF$cv5) zSE;=5U5wRx)%A+BU=1Vqoj4SMtSn>(=^b3Wm6PCd`|?V@Fg;d}r31?09g`Pz5VV=B z1XqS$==4n7dqP*Fp4+5RzLhQHAlC%tOs9cmm3 zEY-Gr6*wO~s0u+@iNSb1n~7IX!7n;i3#llKB_Z#-AZP_y36|3fGOFxL=(JdRZ`pqQ z;7fJLomV??PlxOQ%KNyw#KSCIKE_+If~wUIZ=+$Cr(LgVw>@-<5_BnVPqf3Uv4Tvj!qY^**hyUp0_XsybOISVuPR;ua6Ri?+aeVo*c~0%?Wkb z8h(#-ddor*62ZiVE9w4%d1pe+#0#nD2fxGd4^!*@5g_?zi{I|y{`*TBx}GZZ zt;D|!#;(Q&K~5;xAY2VI7DVAgWN}>xFTUzesLU=DF2^#t?lqtJ>H9;vL#2aByok;a)+X-)}N(UYL*nIR1pBWgS}>^?7bh z>c?=m=0g2g?`O|X9$oIL9`4c&+^{sq5?%_)fwA2{)R8qCfeuntFOEwQr4GB~z+5M? z0=?z%!k|3ia$IUO$#$c39N(D0^$$5F17F^wr?QYpMs?195M!C(k1VNFi_b=E_+e-9 zGt4Mne3V&mha!+NTD+~CWE9krD}l}wXF`&l-2JkQFRwG2F-4R#xWjnFAU!bEsqVX8 zjYqa|vqVH7MJjh+AwOY?K=c%@X!MkKlwPrHY|eo2^FZMyn)m_ON&pMDd=;^ zu(X~e%`5XFjGReeKOBHpI?F9YfM$*Og@duAlD=w;)7Nn^Y9?-LWHI7ejtM({}I=<(spKrYacn_B1s2PWrXNJtU0R#7+L_m&{ zFja!9Fo*R~RidjBRMkX?q8PG+*9ngqlDhq@r9x}$zSYD$a6!B+f3I85Yz7g|Kt8Qr zRLMP?Amei0Ghv8?hL`J1Sm97&qU#Q0lsodYj8A8@bPL?XBA48A1@;W-;E^J_4x6$i zg4{<0`QWC7-NuAEXOa&9A+GCLF2?B*YBOm2a;Ix0`&`o)JRj?Gt-3l;b1sRw zm!DZYNesF{6&GBPEp67;Ruc?gvMP$)zzCc3&&*p3Hd*< zsH26XYu`E=y~GZYmw$=!Ev{xi_b1y+6-l5dN-#p1&Z*Fgt-A9O?!?R zpsxwa=QA}Xr;k5fecP`0^*CpmGu_hccVtMPS}RRdC6wU-+Qm7mx~h4oXgkvkk;D51 zc9X;3c{g^G2NQUv)t+~tsHsR%$Z#dbE2&WTcze zJ3IW-_aHA9br}imRcF+Z`$$Yi+ zN5u=r`Uq{e;hW{)e8nh-*4LL=P4ZrOJlF#akaZb+YPpi)6%{HecC%eketLwC5An0n z!PMA{Gl%sbnn<>{93=1&&OU-Zc_rST<}~Qwe-vY3c4&HnbhEQ@fOZM(=rdWm>OG9S zrv8U3wHB?6yP7W}bZ^q6W_#TVo~Y94P?7-`D)~<~kR<`fb5Q*hUepoZJq~SG@53Q$ zJ~GIfFM@cV_%-2g*Ppe2-r$U@b__YlWgqLA8DR?hc9>XKJ{<(cgGkHVPe@IdO}~k= z97e3Fub_-@M<%Yv*&R*S1W_lq$iwykH&-jIF`}-qxt+dT$F2^YF^M*?6zc^WMYx&H zni!L42mlDA9G0VZ<n^o6-XtDXAKB?NI{?#>{dBs9!*#C( za%Y{8lLWRRsy64kb@n_STVd7mDQt9Hm^NQ2Nh7Q?zaTd*o`)jF;fDxUe!5nA6ipK#WVUX;_?afKM^3A3F74V|}wPH_^{S8~^%>04_Fk(Zx}#p{Y2 zyTTg$8L0&e7d}^385FaNw6Jx-MEa!!IJp+dA*lwq>SrYeI8BOiL|uzU*-$Trig8Hr zzgfSfSsT8xQle_AZ4`ettGbZ&enD}8oPZ&+Yi_OUgZM=gJ>Otka8vW-J(PFqIoH3% zvHr=I(fA;qKrfrv9E?vSz`Ao)3d(fyoFFxV+dKr-OWc&cMgpny}#Me!UX5 ze7Nm7KkEd407Zp3IoQr%`JB6z?>k@9`TMVUHo2ci#LCeZRAi7hKi`fQaL&aZWP_dV z&(69^j#@5OW*FGf_Yuxeyds~%w3@7l@ig9^o!vSI9dl=KNPoJg31x80;7z&naosQO zk-oUXFR8E!>2V4}vbmpckoZ!YVpvBx<#k|VQ!?7VJ!~=2lEH&%cUiV29cFp&c73!f zndkv?=5}+|xw}NnD!V$nZ!ltG64@UN8dJ+7dvblzgE)c4en3_^GWUXV6hLk8yh4g1 zZWTlx$EeG^0i{Nk$7WkD4|XHvOh|a|i}pGafejCd^*Oy9oQRzMY*GNSF?G+Z-7+&j=s3<#(fyH6{lK4x@W zDqJ%S)=$@(c#mU-CFi~)b}4)rzcWK!NAj{txIkc2+VY-10xvQG3My<;_66#B)p1!=DPxFho65kSjLowxP=NTm`1bZJ`TOFk14JdOpW$eml?AT zj%1l#7T~F7H|eAE>48LRFWkVSG_UChRI{)yPgYO-wuVXBH%k)xv6fsjN1bCcEum2* zb18gXsO=5Cx4*h74PyT)25xhY>sR%l6e=nK{xK*vks8)nAH0keOiI(*jvf~aR8R*b z)|6AHIcD(eOS)S2JjSq2S8okdzKRd^LVg^84`1|glqQbEYeX){O;TUUn~h)75%}4u z`%g{cu@_a$Z?%xxi7(IR2^R@$n}(typmpU&gowl!wM(>>f%;@LC`g;= z84)9*hRA75!Kp$5pL$^{* z2I|qM`NlY3?P-0>q5I&bDnMU&`cloB0q@ReNezYoQWF&jVqDRvFv?S9pe7MjijTP} z6f^m3i94zkgN^eoHtm36QhSN+WW(~XZFYH{zGq`%-=#`Hr3@;aeDFPQ?g0a|lvkqA z%9Y^)^vUJPjnr#3Lflf4JdU59zZDDj6P_Fd!h$}GTxRiK5Y`ht#x$)VM6JZ6+Dmbbbt#W(D50m}wCn7!Rt-X+C#DEyM6 z_Y)Gsy;jGD7TZtLTIKwU@A*%Q6|mY;R9%}u=UW%EGyP0OZ#yozBJI96b*@yD(GGP- zX}ZwQCWt48o^Oh*h{AEOlJLnETSZ`oN9ZD1g50<+1h5*d#)=*u8r1|9~fxF2fv%4#sg~)fLH=RSSDxW^eb6J&yXb(qEQ%8sMnt!_VBnQE zUS|(TSbH8X5W*tDEk$A>_%4O(jqIUX-2C1G?9 z+)4Ip1~LiXrBRML#j3HOsjy~Y$71z(LJhc?7+on8!jREV*fLHc&Bn$u}N9K`U6N9 zv--v|4dN@`G)#vVU(phGQUquezd&EQVD=ZKO}egN;YsK^e$i{V@8;1m;DM+^FGB=B z#AU$95I8}5Y2!gS6{Q-Pfxs94=@^W@aSbmy%`E1?RHkey-J5C=#homttv?Ut+?Pg8 zj`Sn2sip4ykK3)4jjw?E6;%bJc+{Rm6mPoAjm5>76Fk|TmqyNbDQZam-!0>p%q6(3 zT?w1(7ZlrLsEW^PHG3PDc{rK^FXNkpQNZlZCG|->{*v|hKdH@dQPq5lVz+fnk?Wbv z1mF7aM%`1H8C>9-88%~rSLwkAwU?Y`?}}QZ2kcApIKbsTa-!PaMF=T=bjaW*3DYnM zK6s^64KLMMCtF}`OY^E2sk9Lab!pltb^D%HHN)2HjIP6)O&32t-(aQhLr2p+Oo27T zmad0Z$E^cz=YnpRyU%I2t|2KNRExw3gwd3hd0TDMiHc$SBMMqQ6X;X(!Mza>B>MAW;-r1gM`~U~8l)j94KYxM6_xlbX=enz)@cG2Bl1U2 z5mj%F=8u+;R~^kCgXH?{e>A`)J|p->71TEoJ;(|1f)gB{{e9nOa8^Vfq$(-@Xrn^% zM;yJRY=Lo-s)T&67u^r{`DaOnY$LDw!0%hrib~MwUaJ(INw184`kJ2k&Uy_@O1&;a z`_zFa%918m#hTQ#?45>y9Ct~9#H3OXTF~kUm571_3Dwzz^73csB}RWdq5S)LY6hh_ z5%WShtV2adv7CO3oGTpgWTFO zdGuP(K44X0&HqiBNO5AaLdUBJgJxDTHbqM)?|Sdd@6pdu3*M9EK;ndmUJ{H>bBHQJ z9Co})9!xVUJFgIvZbV3S|`{;PrrePX0S2U$cZ&&rg-jQ6O`jFD2AM3=X9Jv4#2(2gB7VwQemRYP zr=amWtgDJBqI5D+6U-q|NdJhIv8>2mQ}gWs&Dp*vU;&eVtH#o;+OS$HtO+Y^*t=swu@4Xd_Dl?tZO@LWm>eSqRhpNNOFV zraM462w?x!Y+Ph32hx?L9lcKZLZtA-{6iFS9MO6why`1bXy}Z!a!1*xa<;G>hZka{YvST7`e4<&o7262QfOEP3|*sLW&awCNM?cxj-<07*`T(qG7 z&Ba<=Y1wz-8k~=H7&rqND~AXtLatl??%~7pWTclShY$nnUud6J5!V)Ul3s*>gb#vo zq#wGXxKkd|6~&2>0+6n7bM34s==9b4?wwf|d-$s0Hs?Oalv_~r(`qk=C}i~IRT*)Y zmUWVzKn(o+lK~mBnBS_rTB>yE1QT#Xo+%d~UIgJ$g}gfR zHr0k^O*l5km?w3N=Lg;y6V5P5-1zW$)BC5WVeXp3xRu3jkHJUoqoO^3-k#!oV&d0z zkDr1${(1KD(EmqTaC7l36dM}pIo+M&hcdv*?w!$_@i8r z@*CO#=hyrF%B2`t@4+X6;DBik@K(nfBSmRDjHo@FXoBRL((GoV07l*b+m9dToFMMZ zysvgnd?xs$7pT*U-XtmaNBY-QOe88RgSb+ytMJ_1P$vVn0zaWwT}VF?r=BcrCM}$7 zADi#KGiCIW-*L-Vbzwc-g@Lxh8r$Vh$~Aw!Whlud!?5jwlrg5%z@L=53$taY$sog^ zD8usf6foHm!3_Cni#JNu+QRdU&i>*RibOzqTVIF%p+>|-$_O!&i@Z$mN@ZO&+#|;M zEE7nfO1YU9$Mep`9JV@~BDK9f)7iN5EhJrnpYhzYSAuosPaq|tLrRSIN`E!Yx~?_x zjp@9+_(g6Et0aFzp~(|m19Qk_^LQ^#RUhUPuA+l8EOGQ7h2G529uCp$3vOv!O6m1v2KXb{oN?2{jtOhs@xPyHJ%JuE|42U*s%e6ue4I}*c~+%(7;;hl7|A$sexaoEA_!YY>& z5e(#ETl>{SQis3~V8TkY0`wiZkvD3@ucamM@Z!)-rExmDLv=wrIGtHv=-MEwP(~pZ z1bu}e#y5D3kX5MvTh*>V4t24g6125%kNbzZ<{F5y`DW&=-K1+Qx=8eCp5i-59&g)t||&ozedsLEmYJ(LW3uHjAKb zQQq=hlq13lgPeaLF7>Y)(2cb%b$In+e};1sLhhaFvIhkw>puBNu0)Bw?%UW}2DVLR zONd1$U5il`ZAm%Y_k@-~0V(}kQ074j^;bH{|HYupzw}@%k9f<2422tT^DoQHzbrHV zvdsL;GV?FXj}VdEUzKlZbg_-mKaWVgu zm-N`<|2;n-aoB$kgZ?K!9(iOCveLg;V-J4(jj8oG&i;FTJZSFz0r@?!$o>KO0sqz> z4_*D=^8@(1%;Apl2 zyRxA?3ovv|j>PVM&K~#T2|GWdRRMHpCM?iGvZhV8&P)nk6%E^1P;)Us{t=_t6R%1hfSZn_l zsKqKca&%{_IkHjbr=mXZ{(**Vk1@Ik4@JYu#=T`}4(7hau{o-FC}n10o$kir;5HOr zKXq<0>{P`C-^0O)`=;vrVCJ2ASIPM{b{O9eLNxm5Fx_^P=z*B3BQqhO|>bmBC&86g+dKY3z|I+t71&_v|9+ft3!hVF=HJ z;^c)x1>eFg|E`=`%Hs6*nu&=p7-s@;D^fhL zX$5-1WeamG?Rc%_;c*)&C~IJ_myw5>`f29p=i(bG;u89FJc}ULngWImP|8%T;XxY# z(5}$CB}edmqqE!e(!`W3dK5O)povrd*TnsuDg8n)i_)&?E)Js8=n&YRE@9E_Coq;{ z2zF-hS?tT0(}^O&s?z`~P6s3-H1C-71D(l=ySy zQ+)~|ggxs41E3e(B}mniFM5NXyXjrY%4iauaTH0fR1ctcZZfk1$udm%SMgq;;5D z{J!wA(j&i&@pc|h-O7OT9dbtZ1_?BqvfvZj;$%O@DasdTCa4jwMs2v=i#gZ^D%L~N z8>)^@SLT}d{XPA)u4FxAk_8b*$lho$J=2e%5>Lc*X(bR_MOBRlfJUVk4YGRWP+ zLAqWaFxsFfa9~pr+o1BXVOuqr5OnbTp%oxMLAp>gjF5Phx{MtZZQxw&>}sI@<_e>K z91!5YX{wJfdftp}v=_}JQ4OyjYr)sa2#FSp8!z74X>0AI1VGSmr}BrE_|1-adtWu< zn`jHnH%cfHFi9MKr?gU}J7(c<>@BZd;HsxK~IP{M+$b73-O6K)ejgFP`X~;ufz>sK&IFig;R2+@Ggn6@Nb`{>A zeX6frDIKKgHUg387+`s^?mWrW!%AVPhpN)W;>W0m$_7L77u3I|o`Naupl^KRu(?Yc zea%k0wE?2#yP8%ZJmo3%OQ<)@o7!!atC@kY6}~~(3hNQ2hZ^|FQ9H{SMp(_S9*q%Y zdgR6aV8D>S%1VFNq#*G##$WVSPBu*&CBXwRNcSVDVJz5!nD((e|nCgHI1r~XmGDG6p}{}Yki9r>2g=13rDiDr3=ShUo#EtnckkN6d1WA zhdkqQy`x65>84K?F6Amu7j8EuV6RWd#KC^pq({fZ-4G2|x9rlRrdQJt9T1A9hW|RN z0~K8jpSY+4)f|gWJh|r8HO3ekAi#t!Gtc48R=Lk+(yuR~KzE;!7A`lgdz zfutBGFBac4Bi(k#yLYrwo!a2DX6_=vS%#XMYJAYoz2BM+Lv5D4)R3PVEsGD;!^;6;bV%Tnf=IRRENFDRLaAzQ107EXPcL%3H@{+PU$3_8 zeZ?e-UfEn>Q*(35_)t>h=B^Q3|5ZCLy2dCT;a-RlVdot{q9hIpS{~sk*k2bV3Skt!!=BhGLK$InMwR{CT4iwvM>XiAvP@yiRY#P~ zv2Ube=2Mn+HIaU-iHQ*60J-i;Eju^F3fTao7i4IgwK0-^d>G*pfn5GnvOtNzcwMns zCI~-FR}3FPK3y+%S_CIMtQkAIouKVR@vs>bue;6*3H&|4I0u=wBcZx=Y(Zz!y^~!y zoeZ+4FIhTRW;Q+s=>U2FP*l-}N^|IfA{CJ7XLwWii~)-{TNPHe2N00etP0CC0GQu$ zO%I@pF561}`5}jxr!%dk$tcqVFd;N*vg1uLKTRh&tcw-j+vf4rFglBh$1cV%WMlcD zPzMKPCCCsZlGZoY2*+}aXE;bS`mMxcDZif-An$XM_ty^jPC1SDq7Q`nrmwJ8rTJ8` zteJT$`OOq1yhFxbpcEu<`P3Xb!Tg(tz~w2;fCu?+VxEWbCUEZ)%U z?~`U%vZu>IMpVfK>ZscH^moCetd;DE;#rtPy9yT}*0};2KshFk2_eA^@YARq(`too zqaBabM7SFFsW34Z6Dm@TyYe}{AExv!>T`?6 zJFlleW(L4Aw-&zHFcCn2xKLie!@k0h$lrec* z<{dWKA=`vm5=2)kC-W@wJ4Nj3iekY3<5bu20OF!X%%fR;EEFX!?Q72-(>h;`#cWjeJZ@j2QQXkQ%- z4A{&;hsK!of$+u1s>g(S=@4JH1B{ovjmAa;_2;;4LOeLFReW-MWTh$TA&C#lM_1CQCCwyyU|2H+3>Bc#PM|R1f`V(m3C8T4TZA>0n_!7`8cYr zXo;*ah;J)k!IYrv;v~zyou$2R0=1`RsDLyA+MjK6-jVS97y2-20|nh z8`A+l6J1{)ecg$Mn=-*7amu+3z@&_(AaVJ9%~6Z_T%_TX3X`>TlipS`Z>rMA!=M** zT1;6TG}PamI@%vfqSKO1>p)HLh_WO(>&)udfD;IgtaWNub(Z!lPX1gvuI8rZNBJpA zEfE~M5f^!W@_ACJkvG3%DffiaUH~v^;8aq4ULk8qN|LE6)DWVQhS+zJshW-PsW#Zb zl2i$je8vN>Ob;)581jc%8OR0Cx~k&Kge7SNj%xhRYSaxvmF3-ep+pDWyxH9@6{B<3 zWh+sz6Ft(9*yAG-8i&eeZGbED_8_Y0DTsa94gl|mUq>tE?N_4ZASXQQ(B{WyH87AR zPFYE&D3KjbS(m@zOQ#IX1dQSdx;}nc*N3Z7wM+9wj7HUt7!FQ7zc+v`{~eOU^8YHm z=5gQnzrh|JVVYli%m2Rtmj6X-VP=D5ulr4$^~au{ne8DI&tEpU?0?Q@7e-4BH0Sd#+{*WmT^6$@nKoSxD8x)4^Z+<-BQ~$NbfCLcw zXOFNjJ;cHOJL{-{(RCm>=)9Ojcru);=nkHL z;MPX~INjVY259K#X<0}Yy!9PJJ3s5`?e13@X=@&Gq`a(r=BlJ_%E9a2 zc)g!=e0OrO@nPSFJF#pJ!KsYR%G@Rmzv=dPkI0kr&UZ2;`(%6g=+1oRa*z{UL(KT7 z#*gPZXW)$y%x&}%%&L%Mls3yX`cWm0%(ulXXl#%3Lo zeGc6>wROiv=s_1ohgo7r#fe9$q&ou%)3C7$yoPETK6LX(kkWSm7+@#nA7PBDihpVw zZpZ=}@0({Cds$&#j319?k17Y)XL^X{1oM{Iqm&MFFt{a3p-Unq3z2FG&<*6a;`3T` z8RZeo?0_(i+jmsLE&3C)@Ry;CR5FD-+{`2Mr298_iQSB+9cp8sk9mZc3D=o7QLKS9 zx!IIY5IK>~`rnMTcBi#ZE>9T=6^|6|)NfpJh4!E~T>C1&KgTOc*woe1bx?>6nkpWX zcD#Qg4okhAFjS9 z{|!S|m*>LmMcE8&7u?E(54^bq{gEIot{Za6ek?Tm^H)ks*THAZ^A7NXlJLbxVNFY`AdP? znwB*08?I6B?nH{q+9tEL#Y@`G=g-+|U7hS1qq!`2cTAt$)$bp+#meHb2Aa0j(4XJ- zxDU8@l^NG04p{0J52aMCHZF;D&Y%CF1b8N24&Qe2V(Hd8i0GT2sP3|6T2A5;b>8g^ zT31P-RBc!BoR6Pfv~^s*JQWhsPcrM;XVJD z=fv0c1}s#YbU{m7EJj+xw|Lz}*I)GM`IMc3puX2lO_|$ZLnik*0B!K9D+l(%F8;ED z;{2tDo1S+d9n(d5WO0g$gTKAxm;gC~mx2%sJ;#FYo6Q+yimOh#~;(!Mqn>;RV6`^FSn`X3Qm5jQEeXe9Yti9bS};R2=<-UC_zawSL`s(ulIM>Oep z(|K5n9`<1y-vD+PJydA`9yqT0H-N$B3&W)7!@dLfm6#>IPKLfw5VniRvf%0nsBjf) zgQW>7`=a9#-osnBgCRiFf~B1C5Mb~Ugz8X z>}rUg2-BY=rtx^8di+?Ux<|kL(l7s68K|mDa)k~C{Y3KP(zX$gqVAUlJ0Tb&>`!TG z?bVbL+ZYN1KHp_g^L5rBedU*+&qbeq<5pgAQu>5ApYp_;xI`2-Po^_ zFwyAN!8EzDhvImdHzUxk45k>#A7zjGz--ds5LBXofK3oYLFntKi_pN?XtQ~b?sA6?K*p(UHf?t)l2YurZ=SfS@QD>y;Q%* z$L`Lw*0*X({G`LHbN$LMn~@zd~kZ{s$sPW0380uHShR#*Ey+qs~^CpNDuV)z~S z`zAocW`d3Zr%&R#oW+Cdsf1E;<`3Q%6H2K7AK`>N{Ia9~qQ3x$MgWMW01(|UBZME8 z3LyF|fat{GSSf<-O{i)ooNkrH-0X(xl?PYYQ{Pg&AOaBmmRRHq^U`$0#ua?wtXjn{ zsiN)7v9n=#R*`R_f-?ZhUnfSb#c{>SQ$ zYh^*s0R*Y_QoRnjBDwXl+*Z9(pE(OeCS2=yA5gaNmfSsZX_=u=L>xp=)aEmrTzM(Z~&IsXKjepo-5@13$^>>R1C@oB#sQwpp|k4!CvYH=p( z{7prs0s(ubv&`UXkZlO(wRg4O<-TjL?kJw!<0ww?V*mC?pN``7>7HkOA(aVznUx8) zu`_GM67Yxl(iTQb0iU{s@UOmczjG(9ho{&-X6;JtJtk${$dAuxm1N;rUV2$QTVg;j zhbwG55Ln}fL~`sN;)>si4MX+l(zXedT6p?8fu6G}6WoJW+KR=OUYi62n+IoEmMfV%*NiczTTAy5tgWZI`{YHmM+#zA#ybZLDCV` znL*NQ0ALG(G%OXY2BlP%oXdkWl+aa%OsgXu?(d2GnN|3%eZTKfzdf=~$WAe;xQbxW zSDRn)W@jAz&}`)NIMftYWzawb8CCj;tTj;fuIEu`UO_4tjTK6qV9^YbZYe>t@Xt~_ zLtHYw#Ny!m^x4R?Fw6Vr@y|WuaG%p!%fj=teK1#2$*dwjjFT!0FnnNHoL;u1$bkje5aLENYpxvRJ&8n~`~;P;DGIVqfX+zSdi!z5sKp^Q$v=0F>^= zG@=qvx&rQmmG>@eObb3UDmf|etgkO+AeF6yJNHuCNH2Y1sE(R!INy0Kpl~?yXlmde zH6Se%?ZWLMzypn{T(1%SAEdbPCn*A=bb#aE1u8!*-~qR4 z{mjSLi;;v4+?K(GvL{bf=BPTQ0hGF!F(LbU>Piy56~j}}I^mAa?!bvZVcklF_&V;5 zy33}zxeujjoDB|M?<&^h{Y=cCySnSMT(d!bknyAbO!x94(|xM^VNq5Gy-%X7g!h-3 zD4X0K{WOrCp8ioUyra776YR~i%(T=}wn^SnShhjFbzNTNu#ErR>Z7RJLx}_4@ZIPi z^;>1@V ziv*6y{3(6_`pX%aqri@T&2&Y;fdB%mGvPl2K^!Kc`GXw~{Uv_D5ka|K2EolRA~ zsh`4Ud6s=w;LGM9EibMG>yE&4X7YshWVi$qRiY_bU21Jns>x8w(0l9gdRv3$J83E- z$vrzRKLkkje~z>2h3j{jTU>2wx`jTdwjPZ?|B$gioq^mmM-YE>f%J2X_LZjPgQ}gq z_`riNKhoJ3Jz|~ROJ;WJ1YT6Lr~4h6@LPHh`G>=s=-)$ zqCW;8#S<-m=uzW+ox!H@;!Je%V{&A}MeX{Z4s!&huS#7I4%rb5Pw(eR)D11x4`rjv zAADchwws)H9xSvw-Szwqz#yNfbNi4%o|Sh|iXm14$n8=>SOtf~NW_1LFHJhi?a~o} z8mf3%$TVN#U(nd^jKR};2~Yp3eD03co7j(#FO(fS1V3_yz<=l+Crih0`6D2ubYRRXxtoBHLtcC z`Wj2?pm2Fx_~b1HO0H6|1hnK=9jK}{_Ym~&GuWB%$|@YKh%GEFIQ~Y2ACS zS&*t{n)rFvKwMPaXzt@yV|NDQqtsy`PTBVR)ZuSOT>ODI0wlkY$PZFJHX*+2do{sw zfYN=8PWYXqwzY=7#q9^rX?34&&}mn^5@suZLY#qvKh7^YGEc3S=l7DwozOe7f+nbJ zH6YmAcvzVHi?zb}`3@GLOK!JLM++G=MJ@$oRhJfSQ20ML=4Es6Ium*>LA-g^n^s3=(q&b zoq#o5XSLlS>wTdJZ_`W0 zHlJSN$}15TlN#G}zig3F{#^+v4^gBxwxRRrkWrd>BhB7ps{b;|V%1YN8s@$w@Wk-cyy{@7F(k z%;#;c*d&#D4WWZN?0Lrz_jd%Yj0xHVEtaAdbzPV|HfwfTMoL?IYRuj^*DjsjKCoP4 z+V$@=cu|gC-?JHx|J*;|xZvtNJh=TW+G4Uv+h*(mU`oV%qk@Qbx-ENP==}<{1ygED z7sqg|N-SsTmiK-x_#Qf2Z2OU01N|jUWie|{9Z)6_x?56XpGeL8F?Gu1F&YbR^?b7D zWRyQYV{YPFe@pU~(Nva3d7Gw-U|dUBCfaG(QFAH2EV8HL9_t#%-Or){mgm^0UO#)N z{~(zkD#wvjfC# zvU9F;xTZgTNZ`A<(yhWzmXXvv)PMA-FWXr4s#DWyrPiz%DF+l6;F{QQ_p=u{HI2SN{Z3S!4X-u}!6CR9n@TAxAtpf=RD6izgNrzi1&|(zACFZ>pVFbStW= z8H=2^6E@hZDNM{M3ZiL1U26GP~rk&LVrW8yec zC6)2sH$wF{O7izhU>k`XRr(?896zqVq5O8)q>gr5;(G)A$6NRAoHa3D)O=2>NUeM4 zad_paVp82IRj0bR-1o$H>8m`mR`7=2$$lFv;$7?q=-{0JI(TY;4!#v6;JbdK zgRgHZhSy)SmHxbam9+Nen*?Q69qm3lYkMhLb%c)gM?3NOyKg+RzT!nE0sX!yXZh-N z4HD0)1LzHId1kw)?AOxY_6%?bw>qvl#sw2Nml4Pk0vD#)YkJs=sx0P*r3WRnairEb zT@J}BU1rry4M~z+kLLc!`Np$2vF%<5WqsKvE=LNWYfp|juaP@4v>#A*xT+rsiX|gH z)tMR$WXph4SY*^KQ1iQq>M;*d`H^zgYi(5K_Wlv{rzxny-PYt zJ$AVAz{R9GNqu(D)p`y~VyZ`V^zzZ%E9(5?C_#5~>i>*?MY<@O+kH&PZZVL1ghmLG zlh#(u-NlnW*S%lzeVxMYk-Pgi8H>)8Gvj+awje#_lN2b19~O3JtZE(4)OL^=LUEG2 zzA<;R>lQw4o^e+=86v;ZOU43k_j5dB;6NKcES~aMFX8d2o~Qet$ygZoi^*8DHrW}k z3n)IGw`ROP+ereozR(-9A1(a;!!tdFD{{@0yI%{-?%q;Yt{}ltZIRuiIjI>pptpX; zKk3>@nGIT{7e6F>?Vbl_aeZ{R&blroAMrKAmy+?4W>RvRteuMS^S~kCo7KYWO#No! zd^3rulXpUBqA*s)=N6?BRKE#u=34ov-enZZk&<0EHoc=o4$x}NcCX}Qd~}Cq-H?+1 z^fjZz^vgY~ZK5aB$T#skg26qyJc7?C86|;VV3V~2ew&Pg=Oa&||E;9!RZ2Wlbxv*!FC`i_9Sf%APeXZ_cOa5Kk=Mj}>jjx>}|e&eng zw>ym^B~BZBR!8xLow$4tfvQY|r;dR*Z7)Jck=jmNru$N4c_MLED0gC6(4I(WN?W-C z#<^W0*&|na4YLq1qa=#gQD(0e9aYbPclliG(%=kmXLMW+y( zzrjD_Pqlmv9Z*X=f*8RS3#*msMf_w_>aTiFoV72XBpc&lAIiJPa-lu)(KVA?AiCx` z`uV3N=M$CkO!^v6W}i?kUstAI6I%0yjR4UdOlfi&4WBseApPc!_K?TQUDD#+FL66$ z1uI72w^gW(V?A#84tc{AgfB|UC^as|g(PKNnQVr4f9ZvHTfcf*+|wo95A1b7v!S53 z-#dW@WPpY5unU-P5a$(;EgEg2p%{TQ|0XA=y>Y3*9%%VXCqos^z&*KG=sTS*DTPAQ#jCh$RBJ2N zco(Rl`t(j#l|O*#)r?ly`4Y{>Sq&qIXkJgWb-P4%TM0|9MAPWqYJpBM&SCpIcksz8 zKiqL12>P_z)?NJbyvTF_|r6a(M7wS@w~RhNL^ zDtv&U9bdv$<`@Pw#qq&sd(L)5Y_5fb^6*>KOy%r^t_AWWaMXP1+LWpBEFG8a^y0bl za#iO0^c(4&?i24KDu{?nYM5w3-N(3`W>0HII%=)hHAnOG06U8BjOLbahP8I z2OsV1kv<=;MxdLNZLjDrvSyY#b+js%^n61OmVhKndWvCg?A4ODcD$lzfMv*&AzyQr zidC=Co~|8po^I1ZGMd>~L`35`qEk%y{;P1d+1JGK69%HK5yoaj-b6sZRRcI#G9Z1A z81`oBEKqKc(l2xRXZ6DEoxL?1B9`*QGRfCcBL&AkI9HHO-I=OjY^JR5?|YQfSgm#v z=C&;6kOYVQfZj zXEI6`F7yZlTO@e*A;qOltqGF9c77VI=aIPcJ?v!Ojey^BKxN}=Wp7Vef>PHCy(u|v#Y6h4ZfZMME}iHfm|6=l=Rh{A&Ri^>$4u-tC(J0iO}e!C$c~;& z9e0bJ9AaqZl;&NT+U^ zb{6MxrOY%gpd?vIZbgQ1xmrKT*i{uOw@75qG6Vt`~WY@^~vq8d1Bg>%%hlZ(7>G7SWYs{{d&>+ zdIrS2I0b}-kM?LF7~X3UIJPP*H=kPLz0PMDds1}k>ot>huafzUfgZ-Qu?%jG0 zPdYW3kA+0~^uWh!A~A1OoZ;6*3Eryuc~ei>A!>Cu#@{2n9&EA8o*?YFdEx`onc}W( z7z?Wm6N{aUm6vLoHvyw|nl!!Nw1H9wM~jvkZu@H@{XB@8Oki4L#D@yCt27!&`a3d# zQx6t(ia9nGuFR)MGIV>wVq#GC-kL5KO=;-FgWFzS61H^PvG%b$yYbn+Ng(xw9$iS? zmn-L-21pp&w!eq#aA)W8{W#(9$eE&&b%Lz%LZtQeR_$Ot!z$Rz?Vn_UxY6?!DZwbn zjUw3=Z=IWLSBv`aX-eX7hCdJ|ct#|usbUTUo4Wh6$xYNu`@*KcPf z(b9>R|9E)`?}^DJyt(MAXXO<)DPmH{De6zygu$IBRxpiEav9*-Dp-g$cC%s$LmM%^!5@9t)|<7A+o z^hFq5(sV>724c|iz0J6UIy3$)PpWV|&$fP#Gr{VzNR+a|2j$k6<#HEZsMXNmzx5q& zD{S4l&=J(zvhB7tsr~$AbXje zid0ARO6rFvR9_cT(px)w^z`C+gx?)34+sa^xp((mswB@}ougcQaw|8|vh(t-efQcW zzx_;jn>DZL*{vII^0jSyZRu@qA*{-E)|V~g;u0oZLTO;*L9UKbqD4P3Bey!yI_?yo z3MZX79M^wrbg(o6&gRVgZ^j(qx7H=GQ;;MEA;A69-=FE9%Fr3>hQZ zG(V{VhZKlnzxdEPCnlQSz*$<&qd{ITcYDKvTlN<3a&@xir}U=Wl@!5?p#c`pCg%)3 zOE%oY8Q*V$LqF zZTu_FqGzs=&A#i=x#%WIdJy$0|CGlY%+tWD=L*=U+>CaNJ`GymQZo-eqILQ;>%Epgn5)n;G;%Ogd95~t9&&c!YaD+*722%a2}Q?62O?Kk9dg6d zD#Pne26 zJJ-ow1atCRjZ(F>4CO{+k_KUoFS0G6581YDsL>b!EJQ<1!tD3a#;-o|dx4)Wf{ zfTDoViN9`td5Mu*GkmqBuw6UdZqrE98*#b*^0G#wX&Wq}Pp!%WukFbi>9;`HA&k9L zvn@#*Yo&U0=pd)$-FjHdQdpYN)=lN1#jvz&eXanqNCU`Q6xZVn69@-a&-HeXxx2L7 z@{^}#<0&O0KYYH<_mS@Um(-ECxetD)rj54bBGL$iS&K{sxFURvk!{y2O?{6$pjwP$ zH+1Pb3oSDBO&Ens$}LB+m~6@6s*+Gi@k8b>)|{ z_p$>w=?fKgF3|k{g_Bp9@a*WI`GB2jV?4K+U<2{>~tHxvhD#r+o z$-J1QdqzyUmf15>zL%np=Txu2sA{JA$+)GB8*yg>DV*lZjaFH0+kG!5Bb?)k^HjgD zJA8edUMFECB%wz)lZlLCvE&N(kyQ28l|@1X40nIvykF1?C^`Eg@nRZ$eMm1@5hCCv zAR#4Z`t{i$38P|EqGLiJXILTtRf)^`#$RRsv=c&3G#GuAEraD{IrDhtluWGckW{N3 z+)!=2B%=bU4aw$~UFYu3<_R^9E7Y=nUpZ$xX>eWk%XsOhR(#vLPftFG87A=43XkJw z4;Jrkyze}qYAq}HYMkahqKw%j{%0MNd;kSh2Xnps(>aR1DX&O2+V@-)I4;U2g6Z_1g zb9nY&4n2kU@V#4fAN@$&A%CK~K`n-#*^y z%5hqztF_zZleA1+wKyg~v>0hEj`=nLZ#|Ev<#xl#24KFeQ+HC)HXf_ut8Fh?bgpW6 zBs$BEkqUZT&}qJVDqJtk!T5<}8&5>FT8al=t>{0R6 zh9vi9-Y&~G0J@dm{Pe@t`W5wZTy}!`X{#L1}IUDVColvQQFnX z9O@_A86GS|w)6>d*lv(zYFA@sPTZDK%^NKU$*w=?-Uyryc>f@<{1rAxLM2T$_GzZ!m|K3wnyI}H7dFcvm}av9bkC@m{>`6J*}n1Ur{>+0 z12eY*xaDfCdX+Y6C=7e@c4IFh^X%LM-@+W&WCddRXZcKdgq>_Vt>aMSyQD1N9cCHRb+2;`uLa8W zcrh(FH>2-EDIYSNB#}9Rd^KwwLq%w((Ug=Q}b?C1fkEX^MSgh7ITvCwA(wPi=GNx zf9b?H%-aB(jK|Ru|3{n{M|mjzyA$ImWyT+c|6e#U;7Hy-J2Bu$zP}0;`6V*pD2d0v zHxSg}xs%_!58x>Nzj7b^a`5CRxyZja3O@K>+zx&qz3ZPNXMQ<+a+KWU-x~-T$S(V9 zf!XFEiH+U=0*K8ywEfQ0kM)I>!g z7O|WU((5m@6CC_pjF5F*ZCXYH$tJjK50(j+d7!#UTZ3#26J;?Mb%#XDJ!{2AH)nbT(DT4xciqp>a&P>Y_Mx~Ypk*S&dD=a)qTqv+ex@3kAqwnNfMdcG-_md!#) z_HWJ3!S_jih}JmBi;ky1HmeVfCR-FK{Z`Q7#89I*>#}EA>rv(H@oq6PN$?xjJLerY zOq&wge5u>OK*DRrZ^QVmYO6@<8Sk@g(^R9eZp9zTN}Q@-acn!IiTrZn9rRWKkm$C> z`xY3v`xzG|!qWK-;N+x@1v}Ev@~=MOq@%CMH7@X(WmC-dEo+s~d)%TCWto|@TV0IUF2vLHKc76a!Q#7=vQK&V?1US;_`$>w| zBvm_+>Phg4wKHRDkQD!|t5&N_c|g!g)=cBQ;uc6tBqcTGX0Jc4Jd7}f6eFhU&n^Q8 zLQ61WVg9%>(4&&7KdvP-&8Q)Aw9~A7#v3u4u0^%maUGD5fiNYIAg^$X64#!^!nmxPmC#gVbsY4aB6{BgJgPbicx7PW6}#f%p%`%8D{ z<2C&liS#z?#vR@u{~YVbE60*7b=!B&_?2c7w9tmNL*X9H<$OcOB|$g$hvXRZRfVKY z9VPbQrDc+CUlCfT>^a*x`p)t_tEc2ewg>GoS|`RHV!Y}7lRo2cS`N^zn8(FJv)i*ix^36NB^iJloT}F&# zMz{87b8rNyQiU~TWwv6Jo!{w}gbdd4D6uX8G(SE?Org@D6f&*+vo~({R1k)~5A6%J za~yh_($M3{Niw>R}*zVrT(MSo;HEFLV zi+)FPm%crL1KMNJ=FTE%kXBYCJhEp{`6p_w5pIB*>&H2hv{VSwn_KT19j&+3Y#OCH zARo?}iVZ(#Jb6@d8?gRQ30NDD$afF!DaK|7yo6VuY>eWk8M79*P3wwV9)CS4S9U7M zH-R5+*?#e=c_$)2_nG?%(|0>AeNwO?#y%-WwjBoQOJM&%Ur}nZGa@%*PG+jA#>&i# zoA;rPKWI!t-GT*%2jdjx#W^4$4KlaMZ_m@_?lq&OX&dqIhXZL`$VV<4Ojh!_ zaq?63z39z)PGr<4rxg2qUdFudtm(vzjJYbcshD!?^O(zrKk(d{57l}(vpU3vE$eco z5m)KtZq7ib|GW%`=H=lOJ&i}KIzko%p__XtM68Qn=80I5?Q81HuQrxisHJVzY*m;U ztCWN*@MP}S6ynMFRA&LD&-L^3L@D^FhoscaWkLC30_`I46?i+FyF@9Rk~0g;nX!z> zsG{UFTL+Z}bwY-Ac@N_Ra{*JSu!qJ8HzzppRh9K18Ci0JN-^w}q5*P)0K*8mlqe!Z z`(pP?+xCF8G=TodN5>*{aOpKshp*4Z-Nu>)Ir!pu$Wd+>YKWkJF3h3Vs4+0Qb3o_7 zfk5Z6#aN1dwxqo2LY}*&S5(&qkG!IUy1em1Myo$#@shgRCD`UCY1rmR{EmTs4ZHe^ z9fF7wo~DI4GTm<}uI?I7ny%l5>=iVmI6e-B*j18 zeze4;_q{FI7||O%m`AwXX`|OEoELhC-cZ6mu{Z07sb2$Bx{;V_a6zD0n(9x8k&EDC zxn&=5lfY)?p4mp`p76KK@cvfjp4@BrgI!XmiD7M>XURq`7)+M&?Q@*NPgD072et}i z$2lirHL$3138VPJKQr2pBr6n}AYT?23e64SHCY#f0AzW4iz@z*qFMUw&%7oYPki2I zo-4Z7p4@(=(JnvtuKNj$TI&W;UlVdjr%#H!QW9qJ$*E<&Ada)W*S8`RS`;fw5;U#d z5~OKw4TnoOE=_U+(sCJLJ zUsv_eWWJPN!xii>dm)>nmdi7GzYxcKw+&B*=~>Q@+`tQgGyKD5E|Kexq+u-b{7s+l znhOA&QUk?;6#R?VdVq+9=z{c-=gs5Tv^)^k?#nFMZ17E>!Ragk3Qc6x(f3&ZM3Fl> zkAP}TRiMh6rLcw);!1g$#grU@xm8IOVyotc$)XA|dgWG>O%(#uh}};ZEjC zm>coWbB5me3sCU`I_i@tOUpAZ1%Nz82w;$E9%l3fl13B&Nh5gSS39;pxKpBP{OZd> z;kznEfLd}$XAxITXUR_ED-xvERBecwKpxg*XYoleaNd&KywM7A=Lq$0aE$Gb{g}?u zBCvB`J)H&E7548bNGcrd3I#!5+8?L0#24*GuCGcfxwqdCmLia`CPcPCdJ(3IVX-Z_ z;q7iO7nk_W@7rT$?0Z>F6?SkoKGG{RVpcTLew6JrBx_S6eua@9xcJHK8H}^HHsWHpc-pUpWCCkefqpYtI zBPcw(w@x(mX2+Vkx%S=I0Y1e^b+Ny4oS^=knBf10-P2>Od85=n4 zFgGSYKl%?Y3pna8To$ljPPZK8I{o(s0zc%#IU*1K&jA-8i{!7K0@yDneU9?0{(GZ< z0%vRvvvL06cEAo(WB!^d6!yz8o1^@$|K31&4|9e7dOHA~Y5v2>`h)KT_DfU_>M(aK zIFSGDJAtD9=sVFG3}ghDl#d8`?xP(kPvL14PR+97PvI{Nh~p4ETRRZTD*yCObLlQ3 zn6&F|LXD4np+;LpU&9QLrBk$tpmr>F3bQ%GmG;tYe|v7J*6~wC&v=(o{%yVm^6-ANTH2DXgxIK!P^Om*V?NWZ!a|@?G03}zoAtqR zCHWS4fTDtxyn^AW2=g*Gua^Y&4;i;a89$tPpnY<3wyCM3-;BpJ{JE!s^1ey5S15ir+;Px z=T#J2w7kmug8uF^r&;5-GBd9zTxQ`7Uy_(KV(2q)@jf>^n)tj^4AtmKJyEb$?nO2y z*O`9L1S8;%w}iRKx_!;_619lBkSzCWE)L*bz_vHL%I-6}u)@i2CwMppcg2vD;vcyO zuOVq~t!RCF5;%EU`$g5o##8h$4F<|z-wj*RMv&p_VJzMuc+cc0NK3+X5N}RAPI}%z zry{l}-)E>uaLql9!;^CehaE|;^deFMpego?p26$=JTTzKLY44FVXElCW%!6>CLC2! zF&s#3bJFU~mq+?8%pZawL(>I)3yQ_nYW_c+ws^L8A9||o>R2l>zpvs6NYekRFBT4y zX{Ft*?yuqIR?vQ%Y3TdXAa+&wjY)J>Jo}D)rmRZ)?IaVLx2#1t#RfED)I~2-qJS4^ zML1cJz>!xjPs>OGMSaU9b5GS$Gp0h8h|$hiAOqQFAOjg*N?Rk|A?@C0fOfAFpxt{9 z(C+C0w0ls*izflo6R&foA}A4ui5CuE%$?2ONhR@0^&{|7UB^p+d+FlfU#4-{6m&6T zOES?yZTRXA^%EyX5T0>~Dtd6s;`@W3dp5RXi^Nk3qlmi4brud$Z>CqN5tYCzWCUU)R)k%}Ju)+)x(}-!VLa11<23UI?Mwz!N?+fu7IgbcG-?>WKkw{DT zPU7K9o$xgFt9DqS^l6=7Dhpmfvds60N{tt1E1B5_37`$!r+(`gXL{lGBcZ$#mBlyS zaWiTx6q*>seVR5nKR9htBS_O6TV>&OQsVYPpQr#sfWKu;F&`VqSci-JGL z2mNgxMPGaPLFa|s?GW-xn%fUnUqYC57@h~oV@?eBaO#^_a9NHYoUHm-}lu-?zu$nq_{#&mkqq;6HP_JUl-=P!opH(E#hO&kB^el?H5X|C?j&6`{l1T@-0h6CH6MBI%cX~mwzw{NIB5h zO8)NsiPnI>jHzon?crW^|L!YWw}tOf)3f)^^E7f>EL>0zTixr}bt}W~lkM8HC}@8X zE$)=WEOpa`TPI$tTT7zqzD$t+USa5Y$d}E~^GfZUVe1Tino(}lmDUA?wDDI8>_4_X z_8+QFDim{Zd#!2kgeN3I{Tz@jj?*8=7RTYAJsFpCKc9DZs@9t*xi<0LIkE5RdAz&B zoc?u}qcZV(slJ8DFwaPKK8ggQR>Cq}Ry0%RpUtT-Dn(^oWK*_(ZudFcajhmX(CyIC~|dD{hp7q1I+7)q%t zTvn8(=byD`GeTcwpJbZ9NTMg92t>cU>3)`xgJ5Cf44}4!X-b_9wJ@mUC8am28Ksk{ z0kU$k??wB$YAbFuUJ%|If1QaY1Lz~~Mo+F%q51cY*w88V>^jMy2RAkvkyP1ewmSHV zF_$x&&JiQ|i#*1z6xp@*94adM5`luLC^hyOwUYpCYBr;69FQADF8_+7c+N!BXs6qo zAb|M16CgfsYn%YqrR1pgRlkqGx@-g1rD=D`WYqm*LBfQn{AM6;&vxOIjz>izyWZzG zv&}FbeVBB>pP3zX+g|?~${7c^S4?+L`J2vYw@(^=66#4c6%p!hsj9YkA}QI=;1{2X zp)nhwlhgvEqa4+7M@} zjeQ5aO>x3fn?6{y>6|IC5EzQOwPhW-6*1CicEx29NSrLGJ7^h8R{dIo8~CqT^r}Re z%)kIQ+3-!EhuO2x2DovVEuHU2A!YxWsKQ}>N#H(w6if&BV-G6~(+v7%%q#%Lb}4-! z`0T{_^sQSy>z{ob_tGUU3UM4=BFgyb$`HUG8(#;%>L(iy*M z6vWkxNAA>y4hQf}EjP~B3kweN$+|Eds{mG=<+rVU{al~>xWlr^D=OA>W3=7Bdim6+ zj?!ujO;ebt2z&zlIU8`KiWNLmygr->@n6lrSA~%YEp>FRR=st zaHBsB-9b?r(z~oGd?3bi)|PPraH>lu_SLxaop48HS%~-N&yKG==*{kWoqXK00JCqK zY_o7MJ5;nJ4w`14=v5f{?~$uAT!^^6KndiB$QcLn$yQ+^B9WEFl-y-!^ywX*{|LKj zXp=K9AkOV+*-W4$!(DL3#w^TZCbjxig$EH)9%9l7JMPgc*@e@C3v84o_cSbT9`BX1~oG zB-H5;dal!2nn=ckwPogI0Bfo(DXZ(H>`Tr|y~Hg(=|82j6cF+@3uedaXc~w%oNvc8 zT+aho@3Zl=NE=49oALkZx6&nK(ad zTw;B*%YERR`DE{@AR_zCkgt(a(E@vXIY6vOODy9Ohn2D=EBvE*a!{;ktiay0;0efk z)~@oA@h0D!an`#lma*`k6 zGfrIYJHQ`*hM=q5K|5sleynGXx|eAzA1=RCf>6ek{ujKkE2;C@=Jwxdlkq zaohuxmmgaL#WKl2p;#?nUttk~H3L&CtuAdHY8jF2FVkRXhZAdHY$eJGL_bo8 z|44KYjmTsACuS%TtCE2NcK(o{G6MA+6p2-YKmj}1NEFx@g%{`C9?MIS-xABhg45qoj>%^(;%=rp~0OMeY~?C z)?kr=KH5!>+F&Oejm9Da4Z;Ww!Uzq*2o1sr4Z;X~5QL&Z7@8K{Gg!xprHJqpg?MQ zY-3PReo#<;P*8qQP<~KQeo#<;5a;|@+XTvwHBNv6c9Y}>H6TBz`1p_a#=jOF#`_oP z`2M?w=f`fbz@^6+hVf!=H&8fMd_dv1ua4IOP;(4#7+{GU-2Eo zL&mBn7+~69Yd~U6;E5ls0ULwtnZN@q_ABfz2Lm4Yur*j!0fS;y1yBHQ4^~ycfK`ue zjD4hm9oyS~^B@ZY<_>884*(BbaSUCcfSooNIBhV{G6yF4coZ;jCSc%9z(A~EElOq> z466!(0(SagpnNb;J{Tw;466!ZFsv#B3fQTDVO1dvhE;_?;b??^GwZM;wfK)j$7)od zW9(gqVT}wJ3~OWn1?-H%K%B#|3mOK;E@&7WyP$yrwja<6hQYDs8BoC93^;ZZ0cx-} z6*#7Fe0M=B7={2*hyY=PHT?cY^kXCNpNJ0Hk1zyQzW{~f-4`feg+O2x4Gc8%fC6^N zpiu`yfOCTYy*Z#U1_O;TfIJr~A3(x!EGQDI9ATj002Hvd88jS#8tgEzhQnWre(YQN zOUaMDIDkU|bUYpZIClL2Zl7aWu+EM{QxkkxL4aHLu~`Uwg#`6760|~(AE1G+P@si! z{BU)+;e#q04L-{qZ$kiC@Uc<`3dbr6C>$@?!@_Sj@E9_Hyov@k#)pn5tfBNfcN9?d z*Xx{!N8Z@T%;1`p6SLOgT}J|0M)(0k1jWpU_|K`F+s3w5_BI$}TV^34;Ad>CFv`Yu z%vwB(*KaWMs2DrhG4se+0#1)>*iQ-UrwlMCNhdogWjg~qlW*agB{ztf1LFH z#hES`{~>+wuc1l2Kt7m1(dEK^NeOeL_y4_tpnyY6zYYY31`aX(c_6=>V>&YW|Gj~r z5BY?C2?_$#@LvT5{c^19XiNO}2Eqp<$@w)*3ee4e6(;pdo}42a5FE&Vk4{4Vk_cFP z@ctzrI;mfM{V-3CE5#{1CzR-A2s6`{_hfi-o_qjdcEM8gbU-k3Oq?>6@i^vYu{Mnf+dJlJ2@6y)(wAuO*w6r~4>zMj5aP`^f zV|ioW_~lNgVymi$y8YaVcKr1e%-c@ml7ZtZCBu4xWZVlYck`omR%#U1 z>^N=xI5|m%2?`RO49!xr=Fe-zpW6n)rh@vZNAFEx#AUj11*pf-fDs1(WBbK9wNz4k7?xhZq2$JM=-2MI~NC$afqx^WmJ z0Dj3BVGnuP^u?a_N7Eaom+0aef^gg9zTwZ3RuuskHUww4KTN~rMUX+Xm|5gzaCYnV z{UVXEPmSxLT89k4lAk^;-vXF&Myd}67_Km}!49l1PjL>-SJ#p96v{~i`3K*!B4vd> zku9N*eKtec+rPTHEVcTfOy{PPlXkg+EB{4FTLbpup9W)MI4u!bks)ySI$0W81ccad#(ZaQEOEAh;9U7w!%TmOu#Z1oyzg-6245clY4I z-3j@MWbbp&-siUSz1Qyf^DeCwRW)nXm~+;unyW^iy^qnNAuz7p=W~I@G~IAKaM?+T zGHz~>mvn^t33j40AkU=_%DiuaWTYXe`OaGrh})qHBeH~90dhkTwo};YW;749JyCZAx?}J2hp)9AqA3qc2nl|&!%3WXU&vFs_H`_C=1b^ zX*Wc@c+LR9ZwbcU0Tim3>4WIn7L5;&uGdQP&d1L``QoEM)ljoq z!35rVve6_9(hpeNVUW%ver8TDqxtI8BknWIr7fbieXP2XLRHQ?_QgL5NXN|m#lK)3 zSKb7toV;!gHxaj-Jl7Mp61BXc;}ot%s-6DV{+q#b>_rs>P-NK*KxbJzpUqM<97YFD*@OA|FWB9)i{g< zu_1dVYnS_F0-}S_1@8!?axR;gDqy#CDmx2{9#HVc%sNp@W8%xiK`q4v;+HBc#!nsf zww>1{dA@aL%mVb8pEHJ7q?Ij3>1J*DKOd+{efFe&Hq00-V<2YP$r#LF5TbF8WI|*h zrhbO>GE@^|@dPO+RCC??i)6khHGezf|9NND^WFeFDaPPhrgtHD&h*busmW(vQH7xf zYEqYy7g)lwOENw`wuBX#b&A7<==qfUX+hd55AuV?Hq%gdli(0`^U{z-FI2LNhe8GU z_h%bx8~}f6Z=z)4DToGQiNDh+Tk+KBZR^Hy<`5Nr5&Z>volUF^%~@w@H7 zbO+!=Ru08~2jjHlP_t8L>vmf&tUR(&$YmZ~PNgv71$W|>C;>MyX9mYtce@`}@o1`!XHS#hIa=LvGHQ&RD@A)q!Ik1aaX+}8Uf-sl@ zqD_+h-x#nKCYdMu%O$$79AR4LRTMGK+bEzzKFkqJpWu{wI3CK7;AHJp10?En za`viu8EU4prd5TK6KeLBuW|6XhqQ%&%dRk*%Of8pGIl;U@O@}4H4fA4P9cSv0=pp@ zgaWQ%ze$m%g!%3=j9{%EJ9imOw-hrBHKq;j=3Ly@OdDzDggfrPS780ES5^+WOaO(6 z37{~c?Qjjc?l!_ZT*>CY@|5Qt=CH5U1%d?$zc(ZHKHZ~C-b|kEwS@511pe!L zm+nz|7YqC50Xxrq%`an6PIIQE_>ZcKqFmpl7DuVGvl{w@ANgBolF95O76`vWx&5_C zR2=2HkXjU#`-^EO+~oZOuPEyFx~41mJ!qj2G3SQ$tWry-XNf)#TtL*p5hTjMqc{NhWw*+(Z7E zTOYt{tZOgGLSRkg9S&Q}!pj*3|hjP1lfsY!&Ru8LzfVyi{QR+5PLHsOxO@K=(*=#pS^(D`% zxj81ZR3vjmO^qQ{wtgm9H6WS~QcxrVM%Tl*RP?a3}H_Y z^nNN80yfU!MaPjSNYX48?M@Wb?HY@=CkhJO1ddEPK;fvjB0_9LgMNsoTcsUxu@Y~L zp*RmqyC{tHKI_G@JVI&)MW``y5yAPC#C%USpZjxI;&2<=dB(UcG&*JMQC681r1g$} zN{d||0s?>924c+c!#ADC)LDoul9xE{M3*MYJI}l*Wu|)(xO5F&oE*aTUc7rQpY_fg)NM+g1q1{{)Sf0l2GfCwe@^0HSAmnFUvz)? z@;S+!JSNpX&8b8))})KDmk;W5QnbgP$A{cF43D1~vtw2jaj}q`^Q!F-2mKzPNQHK8 zVn4kagC~{D!xTM?q{wB6fUx$c5haR+Y!N`p@{mHVdrpWDYKoysHEG=wYl`ujYLc;E zAFWmdAcsl;14nAQ$3oP>oS2$f#aiN4cBb=tb|lWhWG^VRoZ@?P(f-97+s~ti-^``e^>57Z_Qg zkFR8cUU^D?_nF88k(#~DtN}Q!``Em2M?W)5TC}E}6mp6q{d&rOLZY5&E&nTx2|!ey zaK}F##{c5H{4YRMegSF!9#Q#)Gyb*n{}V)o{YmWgH+2($2md#2JLliTUca~s|G9>6 z0AjCyK~y*avDd#KDx81Qd;MZh{O20-0tnahFIVKnQ<~_1(R=+ZV$ZJ`&;MLQxSrA~ z{TmlWGp{B?xQ&C@0~U;7oY9GgGy0pNXOT3w*CDc&(8DoA08KnqePkq9ey^pKT`L| zT?j9JPdmwN9|gFyS0ZWhjGwObsCh&KG^8U zy>jNQm*4pYJbJ3&SNrR>4senFa5ub5+Q?iT8yU-Wrv0O5M%}}%^UqPDji~R#gzZH; zTaSszH8;%*SZEfV$(&YwrN}9#HT1Cw=;&@T=x&IWbzj;X7J>2EE_B^ju{wzEzVdY|2qMCNDZvD7S)j^T%`CE=^aar?Z8 z=Z8NZ&2unEU?R&S8ip?-H?WILyZGhZe-Aun;ESrI6R*9gCot`ScpPMuV4Osw*}s;rBS7(7Ja(b#Vs3n8&_E>TN?X>U<8tc?L?eQg zJsN||exJlTllcBM-F^H^0*tQqe-g9-!H9&jgyaE1n>0BmTcWPRQ!t{e=j-VwPTvN; zV7sXZf1{j{6sfSS;9I#-JSF?M^B=|F5*pf3)3#MuW+1;QRevO^ni z{|^zB$K&FULNe~B2Gv0BU44j!3goO%eeW?KU*ku8Z_7!HL}(bpc-}^cy65;3)WE8* zTS}6pB|Q*e^uq#-{yZr|BDv3XunG1q4*_n36$R-0^!7kRW#$zmdol7T#(w777-uW}jt2=R<(f zPwmN|HOxF&C)k{}ov>Z{>50-$T^XO`(A4SiL$%H97OZwcG+j*yC%yN5!Fd>5Yi9TY zfuo<9-O3(P-Wgex$R1MNNp2`b7h=&7IV)BdLUjq~n=ZyDV6~p0g;RgwjyK>#jCbMk zDuL9;jwxaRPpfITrK;;d!x#~WrPKf<#EAj&`OMugqqWJ}hp4y!$(5gs$)Nx?<*chA z15>FIwRT@?mB%pFyUfKPdyiw=BTwdw#mL#^Zej(HC-Naj)tq8VLsyli1|7{kM?W)1 z&Oi~Xe#(neUNE0`YqPb>IY*tYR3Z0c`&i)d5sVJAh z>CN@!OHTv8p)QDO(m)fW_at2KiNF-j`$=XU?%{kNHAT?AQLYdA(%jlZAR8@9l2xXa z5Gy)_Jp4W>VJ}#=kW^M(m4uxc5Qj;=>M~i=A*sa4)sVsg-UjW06-r5EV|9FL)XaE$ zvY!Dj{L|Z7M6dHe=<01{%c^+-2QP6?E68y72Pf3c(Eo@^puC^$nKy$OXHCLhI?V;1tcor}`3h$+VcnR$cfg=@oP*LBge!Ka=>r=UQYS^LtID^eo%WyS zgCspQc=P5HBi?}DjU zC77^~0eQhWN=~eWNja9<@9ioY3@@QZW|-Dcgbcz%E^sd|*WGM5m(qI4R=M{xudL*H zcR3f=xxnqS3bL(aGphmg&Obuec+#Zgdcv{yKgqvBXc(T93n(Tj78sv^3OAEO=`#TQ z55=gnl14VeD&m7h4??`fjGo|n&U*4wC!9JtJ1GPifju)&hLy~z{Pn^BAYY(iS-XV$ z)cayl{FBs8N4aMY(J<#b`i#@&AaF24#_3)5lOzmSSsmbldN@~(JbU(oz~gbiQXB;S zoZekCi>@#m&ZK0npScs%BdQ4r!H5k@3h?OxOE=QI#`A^9X*5PA`z z_>k>=^l|LREOc}0RY@%&~ zXG_ImoeVVssG#)>1E_$EI4}Ba9|mori_eRv$g9Ix0RtnmGvxg>v(x07y+Ydhh5;~` zCkZe5ZbVU4?ViM8PHQi0qARNhKfUOSRVtZJX5kmb<#+uf@nQX)qcL2S9!a0(72U0_3B4x z&C1$>2U67cRa~DImZ^<58hHg7alAq#>D{|>O{C-*udu3B4}$wWVq|>`Un01}Y&A>g zwXwDzpd|U~LnxQcFh=)&Qr<6(DY!&qDr_}3j^SRlevUamJ8a@%`;^TKM($(MCso5b zv)kzw<(hhp4B^r#IcEp;H^7ZMuu*E1xQ^3|lRpn@)7T;3eK-f`!&tNiKK&YvAzmL$ zgq?-!19AG1b7J*FX%8l3ADQI61j4q2(ZcTdCfeaELjkVM!VO5+{NA2?vV18a+Lz^^sj&+KU6<-z5@9jup0kWNhl_eW0+JkR^OV^ z43HMPCs&_HbEfFuHN81VL2Y)GJ27QT(FfbT@zow?8P;V~0#fwKnYM_vI1OKkwy+0$ z2TqSRO$>E%FN`)x3`KH>WRh_&O!~E1m}Ha~O7Ct(XOS3+>i*ua$|!MO(d12}cuvNU z^ckouVsm^6T86huH#TLGg(@)r2SPK39JUU@A59-&fq?C2!NopM1*F68-ac(k_kbZq{7Hcp=*pK!m$xGWJje8>m zo2yM;1P92aR;YA_y!5)&Gd)KBtb-pU47x4a3n!GmWZnzkAo_mIzfrGcF+>9%E#ZuP zZcsZS-Rq;09)srSmLBtL`*J^=koJvL`jbG6AJh{Soj5}%v%|O_?z&LC7yg6>mX&du zpYcEbtQz^AX=pKY#8j?taiKX&Sgl4&im9rzT!!(7NEyL5W*$es0Gr0%C%`7n%l7F8HSB8ag~afkPxngOUwd9SA{0w<#-<6_81`JZ z9T8Ie{r!%9OQanYYBed183N;OXReL_D*W`$9rNubh@;#-T)`&vl`p*gj3(OL)YZ467IN zgsHo`j|r9J(47Vc#W%ffo~V3Sl(@UKm-2(7yru)8Ebg#I`3c3(G>`nOI~!S4KrD2R zbC{u6-j7FIJofW@xI|wRIseg&aQV2z@c?`1P5Y^8=A-_+?MwUHoly~o%i-fT;nttp z4sDP3F_)iRQaNepG8G=q=9V>n=HK_;=a^Iv*z*wiJF&EcjM#$1YHO5rz3`rS|x_PogoZG60B+N__aaGt>bQdLA>@%yYcog}j^Tsy?(xX>u;4WD} z34~Vh@%mu#X^jEC^5&@~@BHYOy-pTYpF57yr$=11{pqcOmKm~Z_a`vU(g(Du?Gm>h zYa)|MHayBB(6J1!n@{`ga!E3`<)3Ng;w_Vk%LjD&xHMnu3-Rn49?+h?(VwO!^G&^liOa9k5Ir3SIEIn?)}WQJkU^I1US+vTeEF;soxwYT2AVBjZa^ z{Fkr$Z5h>}aLc^k%5}HpnJmwb4RW!m)T1qKRv$<#KG^t{_-TrOf0B(0Ro&`Ld7b*) zw#?wtUd9@{Zc1Q_0UKaveiM%KGi3Nk$g`w4^ZYu+J+s^=?SAIoUbn59uf(vduxNEL z0l>hmAMM;`Y!#rAlkbrCjo)vG3UpsVAG)51%o4nbP?p(*zdbzW_)0eyitBQL*hx3g7wj#lb5DD&OW3 zX9iDvo5c>SC8(?uF?;Wa`vy7-AUXDx;>FX5H)7moJ4#Rscc3G5<>Mya3t027XNl zVxSFjTPa&?xojt7VMpCpgjh$dOw*YqGOpkgLUdF0ki3lWpr>0}o{QVTCzENXgws7< zxt%@U!EIo9Dlc@W2vkjo*qft;0Pi&z_U36hz~kE)VJ3RCI5eOffWE>~hT|nBEVDMi z96okVvwJ>EtR=zrdY8UGr?^$A>Hn!$+Z=^Cs#<=pQSgc*;Wad&clrb!Fi98zhfdG2p}1a?3ONGMZft6+EM4&Sd>GAe`&|Rs&Wpz+Kl$ z#gDdC29$c+LomW4({n@9k9I>NL%2#Xc>Cuj72!rImB6=DDl_jm)2}=|?5$R_{Y&wd5p^eQ zXmhjnRv)}`2w(RG;q0U`ZFtA!hC75m`^wP6vqiC;Is>(qY8*Dg+kFeZ%os6t>*5)v z@7qzdL_$f(EL0>5T58wXi;$KvxQYSUuQuE+{i^vJc$*z6FF z@{Yct=_eSanui>vqTe9I=lydtnF=HrX9_O}RBI87;t9S=9GZ4dAKINkOa9SG5fV4U zgQaALLUq<-DHG1!7OiFfNGZrEsBn{QY=U0lLb8}_p?W#&`P;Ub{svRIP1=@QM75OQ z2Gb6q1>dMC;Z8D@nPA)uh(v496Rg)IIH^M}$Z0$Nbg*V+lFv5E6a41GtH3R{;S=@< zuHHA`95_s`_ZDAnu2TJsawp}Um-6_{a>I%HfBR_-V&nZ8!3`H-ovO^3`u-d|J3TCV zdB_dT8s+A;aef67S|pePf!Jh!4)qv`rs|D#X*!_X1#`oxG!GI5_*xs8fgDMv{cJ#N zrLy;6t*Mv;fzJdTn;&?66wz za5&v^y3flS;>5d(F3F2BZASd{I|Z6}%r{4{pl%B#n%G9mZXz!6$2|@-BUj9zY+lEP zCnGInXm4f_H%`|0(WKol;cZ?!9C54OmZW{vEvmUB>3oezc1z%I~ zrd{ZaXdDLzgb)P1kvU~S+wK>Ph+tVa(#mN4Wsnlhz=T*4haTUi zL63I&`v?a5`GrjRmhI(7UTK-Li~egw1hlNCP-u>(kI-~j#3QY+>`yIE*|ci*5Afwy zqWm1j`@K`pXX2^dlxPW?yMdQns`@?c!pQ)#@y*dnC?ftiSe*RLTVtUJ^+YEGrEM!^ zDqcMuCCV+L^{g)GWOF;%z%Fn`KovpIr%SE^mW`~8p~)<1$A-EL zxGjNoh)ns^?qB66BfV?K8~@Zr787EPnaQlC@Bl9kr2vZdwS~9Op6ZVO(-KDJe^~uQs zu#uQl+2u@M#N2R+OkGill&Rjk*sTE-w2P$(EziEB&7`qb)Yf(nSl~d~>vu&9g$}fl zvseB?3$+n^JmF6?m4L~nMB}VXjG(7$`&n(MUc$)xg_Bhws`Vg31Fae_9U4p-bG6uM z2EvCJZcV)Tth#VfPvCm2i+)>xBEoS9dH0EuuZ*c&%nldQ)Dac(mm!^ibs@|#O7=3Q z5-~eM$RDOOaNX~})=IvhTfv4z?p@Wys2DXjF?Ga*9OO8y-Qs#GMkiA)C;yf?+|~Du z0xH9g*9R5SZ(rVaqb9yJSk#*vn=&8_p^HajC?BCq*TN*9oSlUn!nzp2C_oP39R+b` z;|B=3$59N=ja#CbWA5jevaI7$+mfjwe&W;S=jTMG99Bkg+XwB$6bB64;szm-9tB6C z58mm5T}qda&JuMZZN1zcHF3HeWK?)FH{<=zU0oWq>zxjh>~l#`o8zDgZ7#9^=Bix+ z+n7pFg(N>ofC2{(P{QGkQYW1clyH;$xf8UCt1SYT`gj7I>qJ7*NPL*pncPRg-@|wJ zG14oNJu4vFvgSL&?g=u#HUC3UWIKh@=Z#|M-vjgns6xhc`^lcrkFvfwr+cdDbEkWX z)W}7ALIF74T)-x<(~d{zb*GTCG@Z0=9d;n4);drrdCw=j4N*|q%MTnz^Csy6}Z{& z2ZJb|HY1|ath@zHo{{lQ-t;8{KR!u4QX^c#6ktSuc7CBRL~Hq~te9ES??n zP6EFMlb$^63V0tL?afo1F@a;)lPHX?Wqc!CrK_%2O_X4()~wTSypt%$69ngJRsc<< z7(WTFwZ^i$-ZvM%>Z*rQ$OPm3^FUQFyL`ehN}O4mah0oi68YTcfzWVH`GgUmh_lm_ z&?1Q`oseb_t`mk`q{vpUx4N-DU`I%+3v=TBBV}O}WG`_zo|MHka^(7v$Pn8%t09y> z-wsgXwy{7-OsT-xXaqE`M%dV$KZd|ZF)*t3u*C=!mGl9nJt4*>2PoJ(JMpz)Nya8= z1m;@LQLyL52VS)yc6J2>#iJTxe6$k&97Bml0N%jh1A4K8g8hNdIOz+c$k}-T zmib@iM1kLL`X^`eA2NhrI{5!w{k%^ygkO{9901e)>5l`DOgyEf{pTrSS4(Fz7fT0Q z)4w(5mw4~b#{7GqnftGKVV41)d9wl4r~Juh-mfhXz<^2GON!Dj#gRHvs zBcDo-*VB)!p65+I%5YZ!OP@*yftRk}CVKs@N!nT$`=s)_wgaz^9=8?`$#|ljM(g`_oYxl-JF^=FIROLUs@QLl2zo{HU!hJURCd;^ysl z3)~xdeJhyyu=j)haqqxJIsdK_HP&~x_!>W`DlBoc`1#!+==DzrkQsL0YM}8se16)h zLdw-jyf%z&m(p9uRH!xE*+6-h1-oZ_VzGgr#oNvrEoK~)HK}%alnx*y9_&_+Uy*m8 zpyB0E-l@E&o>4F`eHlIN$#5_Og z`dv$`nTbHuJHgbD5TN!=V;bM}>hGlnsF0l;mB~_H(}ugc0886!*dnLe7eIsGfs(aG zDZh=Fo0vFbLV6^HWZp2nEyfpza8C%aurVoW2!&v8{3xnsiZC?QC4Xyz05RBg{=!L3 z?-hii`8v1{BdItfnBqcR$rf!UX$ zhfLU`PtC!FG;v0K|7ZJQF);2E>`Om`#yFhRt5R_VnrmB?>FQS!jNixYHqvuzNSju2%wF7Il~rwH&J0S8^s?5x`pe;Va6j_r?nkwk>d>s^I_rSOO>AdaMpRAi<(Yk z8((ros!7C8y?J>YR(vl*mmTl%rT7HUu@ZO>tOXL$WW(+*?lzbefz_i+Or5Yk2x+XH z8~QXTWk*1@5_h*+|daYmhP2rBK=9TP95tni$qnhUnNTVJ|yaIZJzPr&dy# z$p~aC*)nmkIZI`YOr3B(IPBM3#IZTpK?3D?*3PB2(6rrFHPDy#WF+Z^`Ka0YHSpqk z<#;yEi8reVl6mo_+JrQA&vkmnd9qwN&gA1{b}gA4Oa~NQTOCZBxsEzt32DikY%9I{qQd>QIM4s*YmR(w3dLDpR;h=%wSay^n zT4W|_H<0~lhWs)BPC638_ElC~kyR2rYLuO*HCt+pstIrLtG5WU4a3F<(n?oiN|dG# zh;+M$+k-$S;|03U*vF^sjmi zhk{e6xh5~4uCaw?j4j+3uS_lxBa>JI={PV*F-?=!7^Z*s7A$60ul+esMRHqW%$=wQ zn!QXFe+1^U*mnx#M^h=&vC7m>1N>r(hu{*PluHm#G%wpIbIPy)Ss8M$gLyUY_=kKD z+u9oCJ{1|WqRg?V)ieBnwFErDh|GD%vVa2$yE^@24H>8qVbKvBQI+XHZkCqdm&A_S48^rF_Mf{q za8qA-q?@5vvr2Y|a7a#2W#L=fWkgO;2heWd@_=I7Z$$AVCkoM5-q?70TSRQotDEjU zJdI>MJkt~#sRu+Gse*7lJZ?4N4$gW6tD86Mt%Wh>5;5fC@O{btwxc}cQmtb1UwP<= zZhIh6ys=G%R$=D*c*GXY6{0VJUCPz0itQZR_H>~W@P-{-Z@y={VOXS$qlR-bX(TJJ464P9sKwg zzAC=o5|>73T#kYi?yX~(qYsF5rQe{~_D_#jbti9h;5kK-Z6rRkdWC|BrjtH;=|B!R>Yg2NU(pTjzP$}wze-*T^O4CLnx#L#BPU4*OEj1!Sn>wR+(Qb@k z)vEW|9;I)8<+nkxs0Y>0gPKW%x72IX8hbEp-+v&seNd%4la2Pv*p3%UsJ>MNKP#-6 zIL7#LKY`XpS^p{Jhu>Nr$#*uBG#&}x?nL(wP58nzB^_XiImh74=Tj@YsBnX<7i{-i z2F|BtZT!1%P7b=CPzhqr*9HlWtv6oW(=L4RyWS#ez0`jQ74`)n)&btJhRsmX^IDga z3ACNTI-MnI*~tvaO&Rpo)|vqKQ-`*i&cn+*l9JW;yer4As7Pr@n7-6NW7)-geUN26 zjAk}B2^!F(3Ao+8WscZL@vz(A; zo?mZ9qM1fnT)3=)+w&n=P?-^&@OHFMaADtj>cqBf{8%@X*xw+6t1LLqYIJrvF17dl z;J~BFFeJmVin(vWm)f0AHw(^=^OnM9$Iz=gB|ap_F8;Hg3YhMhnGP=NQGEmSl%S@b zEW)!yU#Ix;Mhd51OboWS+ER3VeZx999W%aZM&11*_Pey^@X4FwB0s-6RK*b|x9AZz zCP;=xof0gRxeyL!FNd6d@C`I_OG3Ej@Fc;L@FBr7`+^phW1LAV+w4OcpX{4SJMfX8 zNw%4vX`l&MN{;p_=njE}(T%{jLZ3uqv0u{fFeo0ri-Ml2$RYPz0f;;gk&v0*#9B|f zQf)(Oj}6O8RTNkH0@4{wKDf_@Q`m|YR#gTp*=XX02m2Lt`+zl~KdfT6qSp}bSCF@O zH1s1C9qd&s&FxiC6u1#ocI2lFVSiGTnV&T_{otK4*os!nzJV+i;ilF7duXUZ>#SaK zs4kahYH2RF6=-dbx%A#x?&G1`zwK#uT7BvdS^TZrAV^QsLH|Cc#FM)T1#pW&n6OCcZ$z9+`&4RP=)Gu ze-_Up>Ve1m_W%;XL%Hh7c^1JV<-IZ7$Fmad9Z&_`dJ5i1{q>Bb0?!ByBEss^Gm;$R z@brwNP_{ljBkkedYERDy$t}&(Gvd38}zGBu%dpMg28aUkl&Bvq{jPL zfnfz10_6e9(J@m{*2@>MD#MU`nd18mwX~NnBt!@6*eY%Lp({tC@An!9yj>{z*6~2~ z9??WSB4+(GY8F?_#2Xb~s~B)s^z+}tS1&6>r_UL1k*ND#`9iWU(MACl{cSfB$q#{| zw?G9khN36;n=;=9RC-wpV@~AoxO}ZN=F|rtE9mJz-fxSYV{BLG8f>k1BE~g4-RgCS^gJS-NeDc)!5Y3`LF)^uQ(fjw&mZt z$h=&ff0GHl^3u3QR>lc#ITfx)9V3gb)5V#CT7LA)ikFbdE!g0@ zT7ayxj193Upp0GLij%PNCP>}SO!aSDCD{Zy-}UkDxZdBLceas**9I~B* z@fF{@QSseO@dntP*bvFCRkBD&o1foqPg~tj^9I)(gl&p(zVx@R>K$HLe zG9f;NtUoRG{@}`d@9t)6?cT!9VPUEDf#jolDN<+UYqGJ&!BO-!%>h4+6S9YZM7fi@ zDdByxZ?pw=B5@X6HO+T*!g866#|oCL5t-BHwk}(jFb{3*b;bQb+N|*Ccz-q;G-{{=v6YI(uK+Z+To9s?oKzD0zy%akQqBx9fdY#gX;NF!ZYH%R{?K|P^rIva_Si&y~+)$ArEp)B1He1qZ~v0*4>NFAEnOhQWR}f zI8`d#Y_+4DGJ7VtY#5%8m?bHG=R{EE1c`(M%oZ6I&2Zubr{-6Ngd&&a2KY7R%JXwZ zEsT7gz^oUM-~i*WUK9VfY2}d`VKZy`o~$tg*ZIh0`yNt^1+_%&2rD&ya+T-&K><=# zy03k{|2W)%kBe&hCL_)7+KQVp*t4bRQZ^PFHh!;&e0x=U5&5m!i2ubbt(d)QA3M2} zrt?dW6ot}y_U96dg~IW)pES6mXvNUFd{9>4X04(L4CT1rp_ZVg>zImvgmK`qCUl^= z^cZ_iI^L9YVHqA2R#9S1Oi==9ES)^)Ul(tzrC#jVWm!6+ey>auo5Vy$`!LkctHg|j zwqeJWtb?ZWh26cyqO2RF5qSJ^F@L(Jw6mDmj$Hp!hx zvRyd;ez>vew8GSJo~<2e5lK{K70DM*`Gwo%a=%l=Xsr$2B1kDu*jU}D_}1Wx&Y&|l z1|F+H9-qeNMb9@wmNgKRuunE8HLmno6ffrDvW-}J63iZi&3k^yrBHs+#Vj;s*u5?$ z6?jXcDaayGk}Sk2$OSkzlZ1je^(ZCJ`W!_oQ_M(WEfy4QCL3kO1pNY`!A^F?gi1@y zgn3K8kNllID9mHO``(nJ7>?!kjz;;(Scq7TA_|t9$z1lYRdj)xC2)*EnfBw+Gy%-s z)T>bbzW3Q9(cK_s=_#?pHy0mC_Oc{Bg<(PflY+fD66xEu$;J4}7A$JrVE9D3h7W}T z>az(-X8q2DUJ$L;-GMShebwahr`P^$qF4xOmW&-ZDH2I9^)YGaC^5ieR2?{bp=^P5 z6!O`UZNNV~hY3f#v+8XF}_D52{LCId1#Z#7^v%MMYDs( z$%mX&7=dFR4IPmDJgi-Q1j}663y#w#3B_!T6j9CE8?>Gjg zWD)J}mUagFa`wt*JXuWNh3UF?!?_<0MlSDz)Zh6Z6Qi)S8R72KAm!F+~tD zIi$#Q+xp+{HrXo9otfR;n^eOT#@Kb~?e*bXwUX0GsHOF*mrWhBKUlIPV3c;dN9>y& zXvTCntC!imKl`Gt12;%QX@fm9Pmp$0@^OiVBppo)PUS8Cu2Cu}nFTlYz_(m$4~qO2lJ$pSt!h9s+M6=VxDQK&fJHG@7d4UFRn5>c2#52xA#bU~Q| zlQBb1wc}%xsu!yTF9oRW7;8#&nvKwybTx)f;VA6diL-9IT~`jsdx;SFKF=vG&4eB@ zZpJ&`L-FO!w7x_e}YaV*(Fw7cd$;?LpWD@ER}& zZ%m&QVg&;!g4emA#L}JzN~OdG2fRHWdo9obz_VPW}qs2bEJqr7xU9TXV- z9A5XML#Bin^su|H;vU2@&hj1W@T8E})jk48KSzJeOnNQGoVqD% zMbOoQc4Qe(kg!A|(O5sj@T`mQ$BXj|sHU!q)7SI#n-Q}cNX|R9b7@`_NFY1#4Q& zI^VV)AP+Wu4gyzpilD-BF-7YP8x85(8^(5<1b$Ij+Uc!@=9hIpQL@NUDr)C_(c7sT zH=t>hFz?#Adz;%k|DCNZ?|Vc32G%Py#niZulcW|Dg4G{0@!u@Z7bGKymxXZVS$0~X zmnhr#B$bHe2s`oA-sW@q6y7@zT`%{(3@Yjl#3tOi%Rp+^@xoRubBrLhs6T|=%g|d3 zn%;*njO%^8Klsp*Nj;WKx`UJLm!GXE+c zD`kuQe8-w*TuGC(?Is|T$B66w7dJ0; z$|KbmoZWIKatsx97~J@*AX6IP46W94^HdXUPCnJ?1(b6+O{o^jRDVv8-Irp9YeRlz zef2pV=L(+88Ag;Uw$neGh)nr3 zE4}{AJCCmyO_xD|xQ^iX?CqSY)!>U8S>5t>&2{IQUpud!cJ`c6TgRFVm*1k2674t* zeiK#H3ueM|RMZO~Td2lxKYR920Y8YCI17z$Vw_=tbS{5myS={*jqf>7xjYr5PyRes zG1A$1^Z=$qqMme1BgIf2CKvT9#A^uo3oN5|b&yHUqK#1U0t1^6&^5oxQAi_mD8wL8 z>Z&bY2{Ro9NhCZkAR441hL&q&*GWjT#82q56oF&woIoK+k$dQI$@X&ZPPC+Mg;4k= zS0msZ@@idZ*m2gI^sH{KM-Ncer}F=dvR)BqHebNvJ5F zEDY2Fuo@Vo`n1qGEs++BoiTxZy;UPlo`nQ6AVYyM#*F}@{$7+16UKTK0c0G0$g~uL zE*JhhCQn%r>%Aii6Me6x_Fay?R?6oe1W>4QoZl^3PKibXkLGdTJ4Yj^`&#q?_75=V zyh23hD$sTg2pQ!@T09A{aXwE6|(%lzD@qA1?+#|b6h}UfE(t| zcKs0mfb$;>v2p=`X;(ATzcuD5Y{Z|JNtGm%T$NAGk^wXDPh7|8-^QO|cVfe(h<4wiu6I(VGec#8$NkdR%^h@Zi_vTaT4g5UuzE8{d zOmn^o6Dd8z6HaS4)XTWC$PvI!yhxgo(A4(S`t1FkL&)##-PPs)$K6{%Mb&k2;}!^# z0@9!$3eqqzbV*C7sC0LSl(a|+h_n*Yp@e{Rcju7ON_RJc|2re|s;@rJr|X@yzW@4M z%f-w+_ny1&{++w$>@J_TJlMW25gVSyv@4Nz2{|&7aB8Oa?p?rK_9SK0Uyi@_?ta}& zuRt8X>#!9kmVu2QE*i;JzRkYpW5*}^y&6o+pMtZIP8PT|vf3|)_ve}7>q*fN9FtkB zKeyA4*GlwwzF3IexF89#QY3SA?hj)aZjHnEV%YdmvI6VQc{ln|cFVqNQ74$L%eI)S zyiuQt&*L?@74u(KZ9GUFtOT!qD#?7gShKb{$Gw!k)Y#`B=R>h`ZA;O$ys9&Ev62OZ z3qrynYRnnY-&D4DCloV0W2$+_v-kt{86{K8KHA+#gCv8xOO4>U8*Y#ViEHjlvSjwS zex%%_1`r35C+gP2@2`=zuD?;Vj&bLu{S5Z+Jh$L)6KZQW(0q%3Ire!V+a*l47$>sx z^|V0Yz)L6Fx}Dc`%qejuDSAeYMwN^r!&C#t734UX1U^mAKSNEGyX$ioIVI`3_i8tF zPmDJWBwYVNq?t5I10-niJpa4=4+c&+11t-^H6x#B8H{2up6G@ZB;3d4H+se~tU%l< z{Om~#?n^^8X-CqRKK^IQ0`Bsz+b~mWT&9nc{Wwaa!l|7vA2&sQj#5uLVh#M%>E_gz zx3A7D7D8f@PHGb>SnPUiIM2)^=6OhdsePQFjGwx0B|I5u`su<7TH~GGLV8ZWRLOiR zw8Lua*B0_g=Qfw`GY~&wes|XZ$x_rrIXYV8Jh%GI-UWSyO)tnQr((?Y7o^QE&T07b z#N4zeBg>QMQY&5!<#B?bU|o_CV)1@yWb)EVKGW(>#?F)D&kI+B+)On+VlVAjvSA!E zKiX6lcd@hNZn7?ldEgg^dTlCSM7qwQSHXBrCI%bXhV6O)7LL|a@OAVce3bJK-I@9C zc%B_Tr}dN;8`%)}Qz%H7+=+5NKaiOp)ic3rwzJ-c%T*=V3#Fy;_VeB9XYW@cyr>tv zyjT`qQb_l*d3bB%ROP6?jd*jp(djv}ATDqzQtke^a%Z$F+D#qj>MuP#ONq=k7+a@z zlaJ@ZGa}9M=nnI=ihw8hAQHnM4KA4tvf=P6VcCg4es;zcU0e~^gQt#5O- z=bYN)EeH~;sXL>fN<3PG1*r6lOgvgQ{`|8(BDJRjkd$^U^E*@RubyLV9TrmhV}-nE zxV++yq&mWYCewq4rqy#*_*JSAGFk(bt5(T92A(7|QoeI)>zq*#BttZt=l5rs1aS|f z0y4hb5R0s;r`aM%Zux@rmeS3gGHm%$oW5s^$Mst5i^!~I46~LjtzW#74H!p(_H%F8 zYCR}hzoaa@Zc+-Nd5}3UwSyTZIg8vntvzx17;pzB3f_%PU#^s33J3g&f~@>kUX%Ao z+;OGXRVbiO!b8IzHoD@y>+95V{Uqn!YU;G8mTv`(UiDj-XFM(Cvr?G~pY9zS%wC*X zF3(U^YFxuVO6tVwMbkSjF_~-D=O8u^)_|O=;@G`%5#M5!u9iYqSp?Jhsu`U=4LK2S zw|t+GeEU(+6^0m#jKawPB@)ON{QE7}SufR-v|nSeO=!hctLt)7iLOg7Q;ufd$bVeI zMKCHMb<+%YPtZ0FlO(BYsaS1ImDXOcH0VQfknF=?`(rT+uuDUaSN|b%n)kw?9rfd~ z`a;x2^5v+*B`J&Oczj$eY}%{p$a0Y`xcMcv^f!FcJm_8`xuWb}`heowC7k5IGWdWf zRO+?JQiYwhjtA1reWpxi_w(GcUZ^3nwN$-Nv_d2knOpkg77A1`44=2QMD*)L(MYq} z(n_9O2bjS4PRG&L^LMnm24bF+J*h zauyL(@n$==%IS4?R^pvvbC6D=avNx$GsvTw<{Eo3$V-~us<1MT?LmsmP1&v~sd2xV z11xb3t2c=tqaml{7=t70-m85Ein@fbP-U z+(2vdG9DsQX}^_=WOz>HX<;>fC{`?dv@3o<0n zsc(KlVXAkh2$1}+07=#kl=nO$`We{2}S9A?zL&34EQGDD$Z+V9y@0BYZb_t z^eYQg5sQV05CMNWlaX4_Jc^e#@x{8i>90^1NqZ035OSAhiXht?%~p(P4LNLME8{b` zQ*{^^t@ERomH^|+s+SX!+qK;e+pfJGx!rWHkx3mxA#~qs=61ny04p%q$>z@Lx?xQC zcCz0x6*X)FKJhudFVG{G!Zu2WY+c!h2*~INnyH42&suS#L%^R@E^>b0 znhxT$eC3yeJog%Xn8uaK@ZWt3p)fhxQXJ`jx87!4#=TZ4GGd$l>`g-9czTaZGKT+H z%E3W4#IK+#LVl5Ltz?biEeWReWVix%V%doFXZr%4rEn(``@*~@6RXSBdt0S>=RL$3 zT^5yCG~#)dWE5=;*46^-kYCz~`J`N33fO(Vr_=I+C)P1!zCy(|b7r^Q9o_vct$;@} zT1v+i?8UQ1DmqPF@;aE#8aG9kOG`J_J7nLz8?iV{C`(-ptTZdekEtnd;v(CTk=+Rx zQPrq;EOW*9>Lm-CX}Y3^1Vt_&zbNI8>zmgvK&H>&R1B>eUG5nT6QqzCxGM4Hz1M{YXD5OzL%%>J9MT4ndlc&=QlX#-#EnLT&G=r9H?=#yUbc_Zty&)AfnUbAHs z3<8g>G_wueMxxE;XQk-B`(Wojvd^LiO2zhk2D8R>hu3!Rkm_cWXB0`j#9me~PS_1sKE8a@Ml!L)z3L)WH?WM=deY0>0UM>Hs&iL9QYqEY zm|&FPt7-Z95MBH8Mr3Ls^X7e4vn`T#9EX1N+#$vL(kAB}g|ju#x;w;m!v8L6Qnt!AM56k<8ddmIJ1>+T!cQpFcMng`O7uNYo+;J#ZeV zy|sYu8A_Y>@wjaphhh zl{>RU^yQoB4GnwJZ!X`Ywc6n8rK-JVEB5+rJ#Z)#1vk8SKh_9CD=~_xvS@}wzk&Iz2eWN8ELXgvI6OI zul{y#9j7|_G(>rJPAaK2r&W$(-!vTU@?ETq8{8u$h`Alqrxdz=b)eX`Cag2Q!Bb7enn$aM?Vxgc+Y0EFI-!RpAKg)H z*Z3Z_%xrj7dLxi^%qfoWaUpnJi-Vb#%nf%wm#+Edc<#RX_zI;mmj6EI`mikoiPEg} zYtT^t(xz;IJ!K(^c6_~8sb>BbWj+8T0V z^|Bo|)~GQ+yp9FQh=dOq-qG7z)G~|hJnA6JqrH`F#zmJmIxF+({R6h?X7;A+^0^Hb zpZ6A^nM3<0f$}HEycb(5q?mo$hC0p%_Ifch&6t_GjvOkV=#kq{IiEK%CyXF{2MYbl zSx*+oCSBDPT)e)=S-<-zC#8hCqP)ICfS}SLpfOLUnN>$e6L$hq9dz5+g9Ga-Th0Qz z><})avDM4VgxM4`4lQgqV$~rGA?O$SF#b8CQLy)#tDbgCu$LpjaK*6!!cA=NtIADJCd=h$oe7~S+@u~T0YKe-UHs;5)iG`Q@>q$q=JHaA6n0CZV4Lu3fLapgKHLvLHHS&&z z&WoXk{GY!LqJBkjJ3;dZRyh2fJq*?g1+FmvKV%O(?Wzcb-oV=L0R2edy@=T14RlWX zEJBB1Hnab-ko}(vP=4$92WQ^DSsPe^Mwvgy=DZm(pKiwRUOUDs#muQlx4x2tqDhkH z^rl*n{8|emw&r==trNj?8%lQLHmZh+6p zXYWhja@apwWBTfl+sUVT#4f!jN4RXbTvtR;mRku{j`I;XIoK=`!1!vO?H1tR>hi!_ zJbud~m+{8ZRfjuT-n%=48r}z;SF0+%?E90r9<53FGqGSoj!Yj&Z7gk9hsjztGGr;q}8@7X`Q0QR-DgEw+iQ@eX2hEuWC72 zLV72-+PH6v7F6pG)_qH2Gv9<9J3Kd^DF=r;9@)L0Zdwa$NEJ;Em;37Jc<-cQyi_!2 ztcamS_M?D+sFkX2(RG#S;f2jC^|H}QCR;ZW@jS`2FDSQ2c&-{|66B~2?tW}1Fl{v( zz2`PHJ<*UQTC7~<6dhXX$XhsWzqU1Xn7(jf*rILfP+29;TF=$A=V0UgpsketFlq*> zG@snoZbJ+0R9!&B%oTQWaA;Mu7 zWKW4_$P^cBP~wCPlPEn4jBtdCuUMhhDiC|Bd?54G=+5`Srt-x$KTB3?fIZ-NF{Xort2R zDh3I?=jq9V$8}5*5}$x_maM^mhFdgL?kieI;`~F?JHjm8_iQd^;6$oXhFnXWFMY%% z%tE7l<*FZEL%g;;v7ZL%j-NIsVT2KJwGaz42HFK1ytstdS1|m$#Qe17bLnGw@49=E z_&pz@10KPzWF!I?ukNj(N-a$R!@Wj5JfjC!B#MQDdx246KkV-N&fbZS@)>IGn4yJP z5s40)BH^swo8I=5c;=h9QaFPynr*1^?A0(n%@nI&J}MejJ5GyV~}vnY4r88eW`qD8qHNY@6r1e-oSfj=FZBPBoSRGSWD)Ysh-Ph1|vA0@I|88 zb1`F;_y8#y9M>>?q08|5dQ-xlXdcf@%0_PF9Kf((u$j9jp{P7;>Qd;`=)ly-KTM6$ zP`i8uK%}ADtc}P|5>i-Cb^5fu`0%Ht^m_;8g-Is4pHbN90~w)FjV3fN0GDEjLU9s? z&<;oFrW7Kz76(w84WC100cgG~iG4qRtS}~F{)(B@<_{#1_+_`lMz^7(gutlZ52FCW z6;K2T%gg`->4qc1ewf!DU}HmjJ_8hhXWC%kaY(*D&g}ro3>qrcxN0g$*yUEM)W( zd|N-o&rg1FRFSgPsuZA*bhNm9L(OX26Kkx7QyUd0kS3n2-P2QP9rfv)xBiiH^4{^i9x}U_aZJhX9FM0?I&)VTyf);d&g#9@6nA`ybz@AcX<;Sk!eyQb z22mc2`w+R;H1I38?#Ts^WfTeHh%9Rt;jOUgib`pH=#vv9qWu``Do1={EXThcm=`;@ zZA`AOS5q7q7JrxWl=WfG_2Y+ZcS`F5dq*fxiS4j0EtWGAQ*sKG{Jwm8VDN|xNoyb{ z!~p9(CF=+el@L{zodQHw_@2!bFd>D5kiD!>>?1*KY4VIZ;Le-3Iq+B5s6=(NLUBW0 zJ#_J+eo1$2Lrh&8>>%+>LVa;O@r`%lJcB9f?M=V*g7xX=NL1s&O^aKXdesH1vs$dh zAnKfN$8pV5+YYfMtz<}}(Yy`er{f0D zaUySlWsA5@a9Y<^`|%3w2CGJ}8;JT33w(v>Y@*j)jVN@Qy(prCO6gF^6JSS-_bN|; zC82ITab-De8lq2llJjm1B!ERMh20`Grj_3tUmRTFhf3y6z@RH|<0ZIm-KSwW_F$t+ z5n$W`W>TzoeDPE031ZkQ8n6>keE5J9jDQow$S*)ibXkHv!ZX9MLnw)2obT24wp`@1 z30`Lm-mk7$c%YiA-r&i2-4~o0*CQUS<2jYO6V5MNMeurL05(3F4vfoQ_l-!0j_Y|& zJ%)~V5xhnN#~2~-qO?xqzEsTN;#bxSfM6v8 zS=M?}&_WZwArXAY8?r+=OefKrP`%S|8 ziLAKLk)z)!`phon~wuWzBNDuKAi63 z!KV#vfg`8QDZ!_mZGj`FGlNfC+yY17GsD|C!aJ1%oj>6-!<)H+;SC<)y~}}fPTNbu zo0tPfU}^zCD!k7t7~V${-qxHIeA*!w_yDK*v?nld1Wxm5+eY9BoMw0%PI%99pe5;P z3rcv~M&JmXW)OU4c%xS^2tG5s<0}{hpBdiz6%2xN1KtA`3~Rv$G;)NuJO@6&XFhFO z4IF{b4Dag+hSd;&T?OaHX{$+~dn%mf(_X;95jf5NX%YE74&k(C`oG2@{M`Th-?S_c zGduXdv@A3K>Eg>x6J2TROVtP4U(S5i)c;sAh(vRkIUP=f_Bi$(bTN}T@X%27 z8*a8JCtJT^)!ILvxcha#ZGFP|gr?TnwGe%+x)V!|=<^$rH=T^rL0?af=d}3uj|bDP zx((E2yYbHKLP~0gaKpM7T_gE%52g>Uz4@|vvOT3jnoKh8CRv!;7VJT8n$LLn`M4;p z>QX`qb|Z?Gs3V2|#@bhh!_5<+2Uj{$bML&E{Gy`<4pKihyFUC8;?<`_C$*TB-}#x> zfNo)Drtrpf@F0-W9U?3#09FfgkjXA3Y;U6FQ6d8Ss7;5{=)a<)n|*8_Nt#WYoqc1K z>2`BNK339>5G@ah)Oo|&x4M;&xn6#pR$Zhxt{dmTFu~(id+Hilv1lViOSUw4Q1RFr zE1hZP>zK1^qNE|u)wwRcL)FC*0u5v$(za2jmPob-!g^xV+NpeR*0U+%g36m;@u(3u z&^*Y?$z8GFpc6*N*bMI!=EO20$5m;hco`~D6ZOS`=Id8we(NnOS9Y(01?vZmon31n z+SwH6)la-C5^;fa@|Z75)>5GJR5Izi;^^Tf_r)iOL|ww@dFu4wa#%QWD`0GVzf z?6mkKvpx4b2AfQDtjGkRix`aa(&8^JzcBUa%$Eotv&qNcvn+hp3Bu*k^+tJf5UblT zcYBWej{m$3iOqXarRDgfl_~c;GMgA@%t(scbCuNW8ztRdfqs<8Bgkrom+^S!4M*%h znO-ELP7~Jm?eA4x3Lzh2)$VuDL6g%# z@KR9T6&v?gy;>lV`Mw)ev^IrtK@yEoo)<1n;@KqgaZdx2Ur(z8CLfZLcsTDYKoK0k zj*5y`e`|gGec8*wfQTT{`yd+((0W#Be{#^jTA1%QO~ zzIyw1z9ca5HusQU>=Gp%dV!cb>1y|su0u2WWj=dJe?Rqk8V23&ta&fS$=Z8#SDHWL z^U1%5UW)drnr8kMs(s$}8ufcb#^G-qpG#z%O=<1{7uyPK4cP zv~73=-LhEpW%v>WNM!rV4G^tkZc_Wb+(-I?glUkZewOObmnsO%-xEZ#o+swzbyT(s zBT_DGMMs%pbIdnJ<{V9EYS{@QB6jTlbo;J7FjfQ|8(kv{%^><@=|fIE2%tQ_Af^9s z+f+O)tXP& z+gH6~L z2+k#sC;6MuLdV5tG?rMue$nZPkU zsogUDhcWnCdH{XYNZ?T;e|S{7ZIqTtV!paCA^^EA+c2Wef?rUjbX)}}s_4G2U)=o@ zMRbE`(vg55BIje`X+>vJIbCP$=Sj^WIy1mJ!{9TtOh^O9vUjlQkDOeud4HjDUwD45 z%d5iqk+D9VHF7y*zsEK>)kxqbL}FJt#UuJS9q&@<)`N_SO*qX+QrD%c;3}5 zx7xM$S9Ej%8uVv=k#k-`#I=JCt%|9k-2KG|q&s3H>Q1k-o%DM=+p&G@ZF759lnz}N zr+m#H_?WvX9SXEhv0xN=?DYrkTrAq}d-uTd&OYSM(&m)?T$;$DzMXTE?#NM?>BTPB z6BNH^F9Mn7UJbsJiFuiJW${YZo%|J76n!5&YNFfvz7j&zDEZ3H?pL&xQ%s4B%C*aD zjX^KUBQLjRixc*T-)`s;vRa)UGd5^2zj2$;m_j^TrgU_KP+Q$Rfsp6s1b?F#-Yc3) zTEF}iHxzw;N+vG9_Ht6&TH!=OZhjUXB9o&K1(ZqB=TtqlHNqdHe5`tstDVWg#_^bj zxf}xnUaV-h4!&gCDmn=$t0=6jWp-W7tWl1-KU2e9g?y2Yr$@j4S_LT?E?_UZWO`76 zsqHX1Nb8Q9QgPlzLe+u7m&`Lp7b=iZy3T$*^IDI)^sE%00T8HlR&_xLNjZdDW}u#F zp2fChte&aj*0$eV2`)j6^6ZME!OR&mjPwg7mDtKyj2dtC>E*iHw2}OqZNl3`WJ`Fo zyUMN?j*)F-jFZ*h;&y#vZ@DR_>;1&ub7_^+-d<#*e>L!9o(QS+^Ve?ng6J~#O+v%v zoyd~*;=J#P?uN0h1~z9A347FCNWDpg?Av+7+k2)WfvPSsS@ac8{J0E_lF}GowC=?T zRIxy1B*|i2aM9@G=+&7SylYPQfl0X@AkEK6RRhxBfv!0fJ zb>D~cOrPVK6~igV$jeyZMuj1VvyPF~t?^fl8%Vmj*|~A$-r^a)9PnBhuJI`{Sm2uN z$=gl}ifCgBi&fcAu?TFM3IXk9#9c3%M#tbECe^sfgQhC$j9MQ>*L11J{n7my8e2>4 zp}UIm2eo@)seO~3XgQUmSTrjiZ*{!4Htb@xY1cEnnuc*)orvw1XEk0ECE+BN7ZC)7-Ls^J0WT}+IORvyW==wzBx;_>5;9Yq@zqi6Im#8_~!Vf%U$`AZ1z2D zlbPNg`XT`1-Q$25 zi`-AT&L7cH{X0aNdg3uZgQS_;rt{t;FTOr7YkY}6<%C9^zCZBXvVed5b>^zML&BYH z&vzaskvfUjhI7+n0v1wNobg0CZZBCKyt#OIf`3V$VxY4rW*aM-0;g=zGy1xl30G>^ zIl?eGyUB`q#Sz&?)9a!G&S-uTM}jo3$wUK^F`_Bt@)tb?2t>&;Mq3nHm)^_{Sl`30 zxHkFjE?zYzsTjFe2X>8nZJ`Ic%g`sD=B$W-LqX921S75Ajt;hD zUE`ZKLwct>&~pF$0BNh|@<_Xfo0QvEtaa_$jNd5UV0NhP0{77T|G>TVKPlc|cDOpq z4p;5i;R+Z#T(twk6)-Rh@aRw_4GdSnzICaG9ywLc!C<&*2ZqlKYbXc13O+L!KJ&LC z=)mQ$`hC!IU?tCCAK*$Ote_k02z+J^_{{LYbTBNg9Ci+T=5NvHz=SYwByyomO{%5yJ)4Sb)}b_#UeMue3nd4#GIY0qsNwz4s|& zIDy;(X#K-KwmX+{8x++DqjG3{4+)@9DjomLgfqa z^8?2SShc6gO2BW)-vEVJAp=Ob)0gQxLBQ|l-@H-K-)e-d957tWU1RxyAWk5;?5A2k z|GIpjdj`Z21pZH9+#d+y0R1^+-<%ap z0BLyNez$($5YRXIFCasxkOn-5zk!SyDyjc)m+{Sch%gSZb3!Hcf4yaZ>+^3QL#U(% z@_~W9C^Mjv{2&;C5XirQ455;m9jJTu%Ui|{lrjGc$Pg;2*@2|rUm*jE$8kZ~_9r_s zFic}Z+!}%wiTedIcBrKOv2NYJNottph&Y0PT;yLNV`KRX$Y2^Q;s^rLlz)W`1XWM} z7&3%zqS=A0Wx$pG<15Aj71Mu=7ecqu?0}*U-O>Y@_TR-cJ2NLEC!l0-{@IE~sF-F0 zlywmF-ait=#s$?>|BM=h?xxuQb^T|s*f^nEY2e?VQG-wc%?2p!zktQY!TvX3Ayh!K zv4ejD7NE)hDOd=V&TMSZ;s`&j8$gl&bFg61IS3OxY@lxjji25uHb9&I^EZnXp;iqx zR=}$9%bNwL^nVBzEK~_`>;Y4#b?R~{|QOfU_U^nZ4fDjBZR=Fm}i z$x()}`eGn$X08e-zlzmXwSHnNwc|=!@^zr;pjC0LCqkaY@>1TXxGLweKL0p3=YvC) zqA&Y#1j}(cs)>6otDFs3OeU&}8pTy=uNcpkWon^1>`_#U25N1jjA)>C-IUpv_w>wN z6pcID*=ie%+ti-iJh&K?L(@W!DbAv$!T)u8v&qa_f24e(FsG&qaNBGNXz;u8FBs>= zajVRSEmdJ#o!Kv`67b#9dSQe$C9#XUBWA__iDrFk=Q#KaIICfm4aM)=*K_o(RW*0T z&rcRKNP4>;=lb=C)fI+AEZ;J|+*Ce15PR%43hwnDuaR|PEo5YKS4nm$KvpnMzZ%x^ zLgiC-jLTxPoMKRIWvzh53-7O{lpRBUQ|u?gWuK0Hd4h&3didDHN@R7Ni@~cdUOAtm znUUEqohKq3t*+Ov>NXsg&(nLAs>N8E>vi$QzQU%Wu<_k~^k`g0&zqNYV;_$A`8cu8 ziI)n5ieD%-NZWXaMVFl~$|~RxSu!PRm)EsLiMF^es@|8fpQt`<;c%Zo%mK1=UY*Lj zWKJ{*=ft7{g`8!7`kDA(4)UvkF$ZPGWx87xSsE_S+;K<092_AR=_<0UVb9_xF6sqcWbqFugwA9pYa$X;eW2KjE zMK-fE`=EOMi@;fh603rB5cQHrpOoiH#E4nMp+|&fRx}%#f^Xj#k5QCFg1%$ctoNb=1#w{VKUd0jTJ~<<&wHvZ;e~# znf&oa*tE8)Lv_d3x0FvYo00B`GE$g4KD+!>^~|H`bFV20s!tE1JqCK05Ex%2jcg=R zt?b~uaIpn^;c}K1N>Sl31+yfRFp$rV{MaapTp}Tg3Mi%eLC?S(wQLr@8n5V#T{Q!R zu{r8}Ybjsx(Q|Jn;RoMBAm+g@l;?19Y&OC;oBSO|@r})s<~J(}hF=wSDJxfnTh$jB>&{4Km6Mp{vAaIs8TNc`P;Cn8 zqDpc=&WSWQ!~Ka!@Jbg|2Jr2C?AeDK=$d{8XLw)-&kQ)+$AWRh5TmQMxKn-yse z&UWAn1)G)a$Sc<_ntqhS!6@K1%DGUc#B6SHU^Ad6u!J)ie#wt#zps_!b(wdpoA#=2 zm4Zv{#LLOpgjDWvpTQV{B)&Tb;(a7{((X>Gzt>vr_kK*D8Hv6phuLZWF=5A^{H1BXTbm;2jQWxGjV#;hy9mMI?{H7s1nFS&mPX>gIf&X2KmBMxTbOUVw4IZcm(Ds0eBvA_eIvMQCSM${IrEl&_Dd==?#K~ZoEU3Oi8wCB-TC+A z%)Jop5l+j+Yg2E=O}U(}$zVlS24}xJihaa#_1Ys{VN==<6v_UkzMZ0ld`sH=+NI6j zhJ+@jD54w#AF+Gc!6I|SB-&Yx$h6TWrlX8#+`NJG$J<1D!M=K-4OGg{GP!pOS`YC| zLuHM>*3ydPt!w7C_x43xkr zt&bSaz|=T=ozvA9TXob--;%z`C+Mey9sL@KqJ!SIvppn}apHPvBogGg5_VK15)16$ zGeraZjP$)x#^cvb!Q>MLVYxLQS_l(wG;1!Igln}Z2Y+rG4sGw*p}*yhj)S?3KlC0q zk1E4|&$pxf*=zj>U7HQ^+(;$t-u7qn?ey@2sgo{eaWrJw%n?K^mMQ zoGjI>AC?=aq1R~IY*d=q2QaCXQ#n! zPki~@TWx}?Y-NCyW#p%^t5NVVusfSc?t-yAxzr})k>=o9{kdP7fnT=#_I31=@mXR@ zk7Q!Xx0eJwl~rc2!;)W8Jdw0GpUsAW<#|u$GA2F#P$DS%Nty!^a|7K|vUR_rD24L= z^2wFU*=N$9oF2SHbsXAZ3VQpf9LQ+OekizpCt7ctCBwmMn*7ZG`NpLMZS?aQ4k5-p&V(z9AxHaqG z&LY-msjK#na=9X7bMlDY>4~DX8Ar|5ta*p)l6Xs^%1-ZIS?Xwd+2h)>M@QNZ zAsf89YeuO~ta8j&fjrj5YR} z3b8$SDr7mM6dk~Ry@AX*WM(JXba}-}Z@46nduwSZ&2XGNW^#LrGp&E~<;%{TxQ=U5 zM|Nw}7>pXuITtf%r$ee=wAW1&5;t;Lsb2G#Y*)*^3 zc%yMw+)~L|kQsXR&a^mDCo4-+)x<+%*0Z?4A3gKM^~dZiKuTYfDdmxg3ARI`VpcOv zw7SUb&^C35c7joG#|Oz;_ZdnRJ88eOa*|dxsmaBfjWUuf@wB%XKZfBENZ)8c%G#3H z8KPW!JMWQ92+{ixZ6@|6RNHu2lI1+ZE&RNI_xdecDN@RJUjxNB}sO3XgewFV|%nJ>?RW(hIaohUm*IV4x6k@e7jxuTV@7o=OBem*$hewDV9 znJ2Bmcr3--BO#CJc0Y<$XGt`>oko7)&J4eM;dyt#%??c*N8-<2!(#}TnDSy|8(vl| z#PRdq@P3HtMsM(1=dE)=E7@01pCiz8`IE7*nbAk2UePD0dwjy3Xav`}j&wa@?7!gd z+H?hNE!t{@^rmxO;y4EFr`1C+h;@~YH_}konu+7~d0A_+$6q<>I8pD7ho<|pWPXa+ zOHC7rtU9h=#Krso#ySCgIbg!K8%+C6a2p3KU+HJ%{r_rK8Iw5sHCRj*GzsUg^UJCFgyZ_#f0u(5HZ1Yoe)3?kn#L>e6 zIJTf>ukXYFF86=5r2LK^gxX9&;BOHKP+Q7(k^rasKiX1$M-oB}rywBg3vT-QP7*-f zpF@UFyD5kbaBTey8Q^mNE65OPIR$~Beywj_fbaYPobG=E87u`6ajTm3dkn&Nk^r~+ zA43L0sPz=Y@;wCMJ3Y`w#{cBG`OT_^{1p ze)|v@KgY`aJ>~#L4d7w_8>H9}8nDa4^*!JKMh!F+{x75-EU6x0NU?B2%d*45hhgs& z3oI7?FOWj0EN0<=%3|Q|z}67T8y3L5{#QsLR2H+a1EB_hfB`&rr{q8b;{OIJgbHI8 zHfUM`02MU;3dSA4yAG3ozs*zl-D`zVam)e&!oi?m0jUb#=mGreFtpfz7yIx#dJrm* zp*8-0h70hp!{GXDdgdxQNMD3h5Ir&Bn5SjKjVi}g`h&XD#C*XXe21vm9 zx$(>Yfj0;hIvmh8E8jZfe4_?P!TB4cU@4!7;|&n9^Al44mW1;gfegz#MI1HX({R4= z21vvC8>C>#uLz?CnuzlgQa}#QUm=B1c>{*$8J_-@|7!xyuSjvQ{J6FFx9BET7IxO3 z3M)0JjG2#t(JKY+eqK7;OLf1hnmJxFRNVqC=i>YT=6P<-k)!iTC%3q$_0i7D5|dsX zrWBBy7FV+K@_y|GeqJ?!w#iO-Bhin=^lH`UNr};!vkL}o;^XGZv<%XvgjDKF`KTjR zZlkV8=0`kgOu96K)E!eJ-CGqsjYznn%{TiZT-^?G!advsCS3Q=jLdyCH*&Tyw{EgVqS6)1CCIi1373z8kP|~ZYLGG> z7-;dK$kYvE*k$sQS?3^gqM3ZsT0y4Hj3Hg`iS=Utkb~)gJ8%(Gex{WVByibJpZuTAzHav7(}n zkY9Ls_F36?S)ToyIkoQ#DM1<@d?|(WWfmA7xbm`CeY&r~#%!b6stCUx=qsuCC9T1Ow8~Nl3OudmmJh_vl6{I~gZBl>P zK+|@#QWV`T6RX_0A)Pm+khI9+GH@TUO0n`@E;PCf__u|-?--g^RO+uaw6-eTIQ;_L zs<~YuGTU!)nWWNpE8c?e=#%7V8dhzJ?vmQO`o42}@ zZBT<*Yl&{WDSEQgwnh@m;2jUp zG%=vn^k z6Qv8ZfB21uwKoBn#5Cb1GgxqfsM%h<%mvz0*-~TH+6(nk(!8!Is4J_6Jze(5ye?U| zftdHKV%E)`){3CJzGl|-++-FD<2j?MegUg>$$+RC4#;jJc|KXwH_3l!SihH3B#?^ z6B!t~yPS(FQa4LqgNl8bXH`NzCp?$YmkvRiswj||)jWDF<}{VxD?_{$j`^xD)z~u~ zLSw3s-f}GrqRcawAZb>5k5<)v7Y!1Cd2UeusYw>C@Z;K=kCQpg)$F(M@mlliR6oc> ze0oTF^TkH3M-8T6my?#Wja`oiA9i;(r;3O?=4F?pk1^}yf})epq$&n4zIL(wxZweg z5NpudbRP^B>q5;$#*m5$4$Im`o)7q_px;>#*}$^pa6`3FV&`pUn)0@cx8ny#JDTwnSyIF`*rDc|^xqzklW1&Q4(>)4gcK61ybb&ppyH{C4nVk$^?qs%7Lmg`qM! za1VW*q3`o1)}n*LcD~ZR`|5p2wK)R>D0ccp{-Gao(EaS_Lv`uesD@(oLTvPiGDZXS zLQK0@B};Rpak79RrwGZOaJ`VsJalkMxZbcsRF4dn%!yWTgk+sq+q+W1CG-6|boruQ z@{j$=^&&4Dv|^fxEz^PKhT9qGb$T(5YFQ-C?xvzELC_+njIKPXjoz#Nf9j7v@CTqzaTaPT@kzNv}O_Mm;GScTL zeq_+t{Ue^zfRc=*_gAdDT8~|_lE|Jdb9;Xsv8ZnOWa0ei7I#*a79GxLF~*r8Fn6O% zwc@5uxnX`taJjw1c4i9qM@Ru4$h*XTC7`69WgJ{D$idYZ#WKfewLE`I);2RKnsjQ} zuMC^fDxj#1rTc!9;!Ef9kXM{`+s@J42^=zM zo|c}kk^8n5z0yt3P-`D{g>lT1cCN+`dbcIs zkg)H8PEN2OtTYn8^?CoQBmF<(^M-E5{trHHSlt%HZDzmcOv5T@03}xbd26j_{&T0r zZ>3`pM+?-eeA*loT3Q4QWJ>?z#`;%Ueq9v*gF6Q(N(xtizVYSXlB9p7<;P9+|Lj@< z%CUa4N1axR07LVmf9g>BgQEH?EeN&M0o7-J#t2A_{tJu{sxkw`c7Mj`-?E~A;R~#i z5#rYF_pIn|>jjz+{l^%=iYXzC7Fa^`kM9wX3;pL9!Rk37juyZvdum94@#SCBpnt^( zp{nu^Y0%$jfo4GeIYtO|n7}fizhU%4dM1zo{TDzX)MoSg^*8i}lfM!7dg4aK1K>q?3V%vQGJ_GvCq4f5SGHaW^y4{j5QrA{Il44<1v{o6~@qL-|6L{G%k%AJh*)inLH7R$y9`4S~>|ITDGyFpDOnf(FDUEjS%>^=N zL0M7SX%T@c*O;D$BBobY1=1JV+z2MI24v+;umT@CSGL>T`D*p$F_{v2ZoB@6+k{yg zl!~B*=3N!M8@|+P56K1x+g|Q5OY&5>icvv`9?MaQa&lC-R(zrI47qLi;&JfXWp-dC#|ZUYoE!e#u32(K5;^ z%3$zwdH`a#{qQ#yltFqAakLQ#A)`gL#@W+^hafNuT0^4HgLY{ zWv5#cj8%BZ+g9yosdtTfPw^`uI%FSIU>WxNjY@gnQO&cm)bio z;GG{+)O>vRET0NQ@@|B6Cg$9uSdy;AocFvIN*yios-$nU3-q$BXm7{%$Kc5y#t`cb z`N#PM>9Nyghx4UbD($AfrCh#5pd%E6zCDM>*rrbO$dm3o*HC%`7kldm1@SANTLopc zjcwJrCbI%*YaxR2n8w!XGoPVfIt9gQWRXj^{Ln3IA6|ZsPO3xNC(TzBobV#XD-NYGr zmc)jaER8S}Q)K&STgkP$Y94>5CtyKVV=MW!?N@-|Z2OobnZf8<-+GWWi5ounj{+jOel!o~Eh*x3oIS(H|cK&uya(Y^E} zc*4u_sYYqZowWzr(Tx2!v#$4wMCfU~_IR%Twym~El%UO&)7s~LMOvO zN<(==W*)Ul0-})cPhl@9Ku1?@a^w z4oRXuu{Y{7I=INJ@;u$f%s412Dvs}VhD{1Nb9I5KXTJE@3%?Qj^fO0-IHOmY%bl~4 zCs>>B<+jSRzirL+OR5Z}Lt+^WnRs=K!^W4gUCWuYHwt>3PZ+m0vAEp3gR{%k8W9_s zL?u6Ik~(q`LfCUmGZ%aP!R&adabE#MwXxpy4MD&L_maPw=EDES-8ThRwrpz$oup&i z9d~TIV|HxYwmR(Cwr$&H$2K~)^{?K&&$;{HKlkC@r~5G1nl-A{s8Kc7oO7V+8&pkq zq^0yIodY50dMc#TVf3O*xO_nZp~RKxj0I6uavqfzP!pojn!lzp*A>ms^)t38K_@8IZ2aasAEw%>X|5AR|{?5@M9_0rfN}V z|5*Nh5=IYacEOZjOq8ZH9+woJTx)0)o!@!Ru&M-;qJ`QbAgJ?I7kb>tq#Tk(!Xmt1 zCb;<)s%F^q0`Ie8Zf3D_zN(pVpLB2C5?7%E>P}X=eM>S(FRMQWZ^Od0h+5B#h(XWV zpcP9M{MBwS52l55Ad6*)_4A8(Ey8@Q;`PnUUghWkM80Gw%4TGug;e5oeTOV;sN;Bi z{mJ^iNDF%*R0K(JJwk;y70y=Sd3G|P^BY`|eN5Uf&O)eJy>J|h`P0jBdO6WP^ za{(sDM*_0|Qn?cP374QF#r=v3joorlCDzId`QkFyXO=oh<#J2;+J}6pt?kZ+76q9` zLqeJ0r6hKBBc~!7JoL}{j)co9n%^5LXtV+q9SO18bADh_>bv5OK!5!K*8XhpxiURB zx`Bq42iAN){9}g(>>kOQ#fSvy?3G--LpG@dwuJ!0&Y7=sbrtmWNhl3&&E!)bBKB?m zn4rp}^0?vrty1^ zimAtQUX83=joQR*MXgQ&8HcNs3@OXf zT;gqh6&Itcdw$n?idxZY#ZkE28hO!cbN8<;eruOd)40L5OwAS6Qa0BqE7K9OXCuC5 zYOH03Qg&fSguRM7nOQxXC&#(0$-$Z>#2j)#EZI~{Rei|7oYR3D70^m7{nhX?G$pcU z^w>dh3yPM^%T~k|MN6x(6iTG6>_O2+rQ?z#L+zZOh>_7No`-6~MYHm=#@1e6Wlhj7 z_Q5C`X64#gBPFX>FX7|B)FOemdmTBR8>z*%8uj}>Qe9S z%y(erY37%I8wvkc$Ho7VNcb;B`#(p*f9Klxn`ZYvjzioX8(RFMQ2&51 z_@A_1MrJ0qf6#hQ0ibobjj$aXg-ORC$zg8*&^iR`wq`5yEci_(3aC83nR^Iv@whJ` z_IG2p^TJ{C6MDvML^0cwte;4X8!KjcSAe}cmzFH=jA#qu+B{$O4mV`xo7c87%eC^W zmUO7_J7s54e)dvY&mT9x?06+-Y^y#1i=)-rdaJ2cfP^h;ae^Xg4~ z@fx=5vd4W(Q^hrc37;qs;Xq?>s>GAgwbD~ZYr#1}(M@}A))6-Rz0wnp_OvsU#_jE8 zNJo^Gb(Zy)%Y_?UkbsUY9>0Q08SDJY&fo2kI_W#aI;X7aGttKi+Lmnezgc zAjNy0M!xHwEe{V*BQe(P`U%)xq8i&Zyvif2lnPNT!<_UINkNHjW6OKOoq!t#gGS`k zkL!k4XKsqPoxI73*7nGEWkfwc^^pg7WM8p|WWMS(M&MG)RHse#=H$O(O zSklkph=+bsze6fPZFxN_PiUF&E3Hw1h4u~N)Xr#1JX~>b;HH==$#CwdCp;tS0QXDi zu7szes{)TeS<8N1XC0#k#fPXhH^Ku+O9p@t9=N7pF;4FX#@yoOfPE&oT)w8Cbdb>p zS4*c@->|jMiKo@-)FuUq=emPVfG7AeER6_h%1Szy&?5W&8K&*(yMV-&sS|qEX6Dvm zihBCm7RkY)$V5Y=#yVrs$$?LQ=hhl) zIGfMjd&Uc``n1&~f!qTE8+V(B&_zEN0I37)MPiN&e`ubzYBEGS?fs$KsjPJ25FJr_W&mvro z_u^E9vGT(;!Oc_AJW2cYyb^Js6o5w@E5yM{M|5LNBQ5TEfq_nEq(P|Qz|Wk?2lLzb zRQmc+pi)5Fd`3?~TljnixjleV;n_F&bwqjs`BRy}F=(Ucs-?{^npJa?V4O)Zo5kH-IgWp1=dF#D%;)KdUq4QX4R9kv4*5c zCCB`1>fi*LZ^V^W+g`Q3#SKEh_iQ{Cy3y@(x*)k%}6@*8@q~1HIK+ zIS&{P%2c)x)$~G|2=+owRNqe+3t$=m=Lle7Gffjn5y8r$PV-eccY+5n-4cpmZ4*Qp z4aESXGfhX`G5GgFPDgPYNPh@t>g{2e%n?r6uT8E*j|!yTnAZy~XJk|?ZNeL_GinQA z1yXfaPh~U(wN#3O3=+UpvHTndoFagkm7WD7i#qZl_ba#w89Asz00W;qIcObn9B>Js zQYsEoDI10xolwf-%LRP!Cn-_ZXlW*hXlMO~PlCfVpJIo-Knw%(!8oF1dV-S;X7L< z^H|i~r@%ojp}JV1FG^8+U*2G_LnVog9z-KjEup3~}&0y{xPqcQS3 zKjI(lt8w1#bwpTI)OULXTG2cWxlv6OBYW4ylQ-0vY5O{E;Gb^utaiUv%(Z8(c5~Y( z-yw50Uz(rpuAld}aNk>1I0ilXTUAijrjDw-+*zH`w>GDp=dP`S_lI>8t*u6(^|q<9 zCN7P&tgNlBtbLIiU;i=-k<#E}-F?3wcWu9Ld8^B_l~^t^i7{_?dz;-Hrd5v6Q~_cA zQ$iXS6kFjIT;G8Odk`z^{^D4!bH+%$lL6KC74c03E8~&} z2%Xa1S~x@uDwSE_g^NBG>w&Sh*7+pIh1DHOG@eowLn)Wx+;Zl9d!uyIdiC1%x_gG_ z8WdK0ft%I&Jr6Bd7^EzsFQaPEpytoFo-6zEWFLQ#i#~BUQ+}Gqs5}YMyb2OzDi6hB ze`E9Ds5bv3 z`@MeQMkreGmRpx@rqeNKTsu*=OZ5{k%_EYFw35WAhIt85M#J(%kB~g9Oo1<@RI%Y? zw@7je4KUL{*65r&EbD5tz>eyx^XgA7^(Ydjgp>*2=_vClgoM>*M8FLcV3XMeF?Yw& z7%)GPfXbv=X(nrnDT?n_CKujQlJHJSd+o1R^71kzKM>{?xB^+zegq|+i|1cnj^|Ga z#K@~aKo(x{dV(~?(i5;;g&rg_4Zz4V{SG-hcCZy#2TZ?ZL)mw8z?H>`kM|`1NhYQO zTZS|RWU_@_IU{rJGgoBmEnA-?r@h5bJV>&P(6w6Vfv!SfU6^U5Fn+*IAD2U4fD%s6 z$JvdM^*M|}NdMREUl0eT9~JdH7eaqaIG7}d7KSPJVIYbJL|@eU8@+xYi2e{7;4osa zjzA7O^deu@W|TkImt>n)oH#gnk~VE@>F6$bH76)Wl`IN+$xl96x?`3@Z41-l_Ct4X z@WeH1)arr0J5qM3Hf~)I)pV}(JI&;1Q>*T$XY9#2@6wxOschx` zP^HrD%1uoLl->L(&4tP-vZ6`vcAa?|r2r zv9(Qp$S0N!O+1maoiM+$bcXXCasd7OhDZLqEVKLUpjO`VP^EfORX@G-X&}1xJ(n~8k3{FI~dsDuch(t&c2mSz5#M=$dU=Z zw4P$aW2Oj07^@)86lBaf(!F_o|?A@tqhr}vRGdyE&4lFxG zZ#6L`it6urAD*scZDP?yg4~wHeCJ3Hh)Yd%G}ja zgYVnswY9HLgLA@gSxQXctg4}ah%u)}HL#>d6_g6(RVeDhX(gVHJ&P-!hXl)C`W)*s|gr;*W?vZEQJdq zaOC#!qe*Y6Q9102pc1wdTpL$fjX@cvZ+>@f+%(SC1|_&SxpKS&devT65E40Ph43|>Ke{Ge5^k%s^KmxDlhBD1k22)C>vX#-R_(6 z6eS32iy+HrFzj=UWhUy5*`tMTes&kdzQsHZ13k(Gjb)lLY1E;`m!i<25+IKY~GYhTLx!)i8<$P$5Nv zSMtgZe>f2Y@g6rclNUx^oGk4L$92AM;Tq`F`dt!lMFHlY-gYGBf6P(Lq-+6kI0K1k z9L1r9kbI2RkGMQta8oQJpAwydJUB)Yiod+;e3E0B#^Umnne;P2jE6okP{s@-$4uG; zwtcNzFdA4NOtxE`+_=aP;Ap#f51xIT)DOQvIytXEd^3J{)~@L0{`T)22>%8e|Nn*q z;SU4&zjGk`uLh_8f}Qfm@=}Ih*eU;CquoH)LHD0b_P+-1|D(yy$jJ0hCi_waP9vgc zr#Ag0@aldC5I>Mu!b{p0J|4bcoDZ@-Z13=SO-iUs_No4QeYmPu_4`WqTXKa*Rn0dz z;)5>-gq!Ei5Rc3lu3s?qT|Azyt}4;%ygnRm&_d#;yR+&0UKNK- z(gwN5y>Gs~u?t%G;@oZdhwyg={XFS4Sj-Gv`)CT$Iu!0-GXhced^(tT&MW#Fb#!^j z$VBfBnNpaIL+$VF@p5(LPI%%D{OAY8 zq}vhJ5JPbc>rD~QOQ5>gSts_kw(@?#n~^kO@<_0mbuIR!W}c8o$CLE6iyQ5%I-*e| zWlKx`{5roLzBcAyQsD)&=by`W}q7&*p8TI{j>+%wx_MA6iGZ_9* z<%I7+WGikQ(LntJh0=%+pFUUd+8jzL?#R}4MPQr(SZejA3rb;Lk7rqcL?W9f zuE{5oGC>J)?b$x^R`q*2T~KHYjKIcK$d5H9pj@tnTkA|I&sRA+T);+}R0 z%WMg&unRt@+K}rCK#3(!VM`J?q(l0u>Vp8^8*KMv$3f;}Ba6vwoYMWs2Gkiv2g5bt zBSXXGOJYbQH`%}&=LoVU@r`{##KR9bPdSo)Gzy3Ouo@eD%ih4^*~gM-#q>Q&eQTs-tUHg7rvTjkVQ?7)M0ub;RPwCNkt> zdkg)g@9m6(!au>0o$ULBySS58GWD@1g-_DiSp-;ekDK+cByo^V#au;`ut(e;D+7bfYg#yb%kCV;!kY<+y5ZGScWcBKC}F@_CjS~N}wn9rTfp5!#pmBIaV zcGeyiwyM+}29UGC?f^!1h>pl%&RR=Z`f~^oyyP(>U8y?~7YBXge<{^4KScrw;wAUrZ|iOzjPS zF=hG9^hdJVL1Md}4z8kXik&G9)EcZoZij*)9C8{$UCBOZQWutfF#Hu*Ib4&Nd7BOt zGXqYyn=S%@xY(BLfGF*y0I-iA0fdg|K+9{baQp#$J{(#3Cr7SQ^>|1Nt}giz@}4{o zIWStWC9?2OLd-J3f?qN}IBsHw#PHc)Ab)ZebbHOSJFY5v$crcxDu$N{(WCk5A5nZoY%xgYeCAAh8jF(=myHOc36$jGG(G- zTXSldTF}_hj!#&=@#n5@w|bkjki%ju9sjkLEDTOY~!t5y-@JB`_PQHGou^YJiK4&j5s^7(ADp>=I6)Rag zKzv+8e}O>{D34>smgNo*uN2V_vzSZPL}0~QXzJ%6Gu>1Rrx2H0G9|0w zn=I>EoBFbJPJOX@%f<4`DA<;zs3se09yrOO|N11RA7eS2WRS{CD$WYv8xCOfyPshe zvtQkS&JT8_n&*kLnn^Z`G8JIS>Q|xRnORLI&0FEMoqf?yp>^SC64Rdo4E80DKAv`L z);v7;(KlMQq-xdU1zWLs!|Mb13UMfGm=BD6vO4 z;h|eV^AkGmvZZ5DSFNFlf{rAg9BJbPUO8K1Vf#ogvYEK zIW@W`Iv+{isQPYdBm`k7pyms~jPguZ+1%h7NwxZPuZvPaRL#2EJX^QQ3P|-hPr8P>WCC znCxu(oj0%yDG!n(6{-~(Tu)nWjm<2u-Ld)>ntf23I$G+ajh4x)qAo_ND=iHmiNlZ< zrpa6|Nu!2Wz&4$RcFvw*xzWq+#es@q)8;lEJ|b|2-u3NTi)n;kjh}mZg{rQKj;q3p z1jqDd9lN-5t-gx8(ROARLFbsCOV2tk3eOT6(I0VaW_)#~cd08nZhvvgkq*A&vULpf z5yI`6&yCQT&w&HJ4{HhS&K1VJyTT6Pn9F3O)!{ngupl}@sKsy`S>-sQ0gps;9Px1f zYW!rey*&jR$x+LjN|4lF#CV?}r2&ISeKhudV6pv@6peN#n@xk=McawX_>_sy=(gt) z!NH;Exu=w#R&_X<>}X3=S$oqT-okA-x*cO;PH%l2lQtj}?U7QLFq81iv91_KG3w@O zTB$c7{mA6~(;h^);6oZ zugXag1E67=W$Z{%Eb^dEx-^dQN*=?}Zl7&~^yl0Hpeb_{S$k&b$~>8r7O7 z8OoE$i+f%I1zp5{Yux@T{^S1<_}41Zng{2$Fpde(n7Cs!hHnqfW9D~k?* z)YV(QA|ZUZ2pfD(Gw|{7VQu9Hf*9I=|0e4!SCa9$et{WMXJzM5H~5p|7rca$)LQYq zolL{tPTsOzk;49?fP1UQm%Y35R0T7|tw|(p)!HGcA;q9>v)*cgdUdbo=TmEMl{eIZ z%2bJ+-m%j{mPvR4tWHQ3elTP`NbmQnnHa5?yW`Wr%-O4BZ!7){P^zr@SeB%Ry@sBc zx2=aKj*_ITniMb=9Jq%bKUD{XXY&M3gmjNk>1~Zeq1x9Qx97`P;X>uUty^>lhHYXr z%f1#04Sptn`F5}7SKF1m_nE7w$)CvQS}d5ZFeMm}h6b)qu}Z#v>? z4^%s7xRhT=Y&!ida!Dn z(6>~R>5Qn6Cc1tIKTb5~?;M+}l;1>0X!jk*)b?v?EGArmNqS%s>4caYC_G6N^*UYB zwSQ)DzNCD5ur=1?D7Sp>0~w+PQF&=ne1w%-#3uhrymYjY!QZMVv1P#;AWna(v=gRG zY%7_hJjd01o~&&+F3M18s?&ddcWUZiv-W}NXhTUU_1verk7Ji<6gp(y zR!8|~mK6$aT=F7m!e~W>7?rj-2Z6byRQ;+i14v4RbPk%Sds?E#@%vQseX?e)SVSa7 z>Nk`waO2mz^#e&=p7yVGO*n>CDp)mXF8sQv>s4#hR*o3qEff}}q>bX`0jQ?} za$WVGOHo=BELYs6^W&oJz`jLSL|SezX0PHRV;VP?D}6Mb!$k&9k>@LnkrL!tYqoJN zX_bv%!$7OpoB(^YgZixJF-E6#NVMsG~CRpJWqM%@> zjEuw7UwpE=F2K|b{ZU$&GYS_%U`aOu9?ZR7$faJTV>M5E2exiB2elfW;WYnF2u(;@ z-CPp!n>G)GVJW{am0V@7=%W9et3WdpzJZz!BC1ee9&&yDmlRo{kZ-;h_0D2GET=S>7eBZZ+94EgddA)-2*n8i0pPaQkWp`Dj6aiPJZHPKB{ zgRCpKYvA0%Dut@ja%qBo0I8S0ocqM6cvc-M^Tnz8N9T_ zPR<$n`Q<5LEq}(MyIyY!Em?M$z*g$Ih9&p9g@Ku3hNC0*QPvc)QB0L`UDMzK?m;E>c4q@MlEp3`ZgEn95h} zJ;pnAN4Cyg-CUpIyL?|gkW3dj6iE06eN_!N*(yvh{46}4v96ZzeCQ{b)UU21Z>5-; zZ}V=MffO6?=zod4c>8bibNf?p_}( zOmIU08_9=nx_m|pKaoCNI)#R#tjGiU3E^MjqbFa<#t5sh+AvsCV3(C_6Qv-9{MfHR z$u+wxO21@{*Jc>NHHM7Fg=-)Uk-`S1nW1a8n^dPwEiYpOv)CG>U^laS6$_khRkSU& zs9L~Zqjp_gty;>J%i(3~w25xah#NJRD|yeBZ4sm+%YhJPPt=|D`xIsb+?Rg|t~<+t z03(js*Vc<5$s=9JJ|n2#vwnzy_<4YVqVn6Gh9>psL>Tnwb{IZUQV5fNU>li{@p;yX z}JAH^nx86 z?@Kvr@VL~S-Jajw8qT7q*AJH59#orexVU-JeJ}WO!y}*g?_vxD#(C{Cz1H8hC^H*( zST8-^o1a@Z@4DPkO;5UK^sm^MxJ1&t8!CR*-m>&7^Qt%AEO8_|-z~M&t$kpeoJXER z*6}JdK6d$V`-lfAf#_cM){qk@Yd8|9IEQj&U8+~T;S>hPYUGS(WQ?Qxyd1PNlkE+H z7E&0CGU;b%%T;>BlrjF3I79JLjSIfb+$9i*Rs#Cv$^%a(ha;GbnInMgYa84oa+NF> zi7XfVy5P2p(wr$*>JKrl((QT|ye@&u*@*2&UGT{gj&Nf}j^IM4bKe7CDioR4uYl(3 zdoIfm$B4`TdV2?6x=+CNAxZzt_~s#gnaC`l*S9A(2M{#hLWD9rTn{~;ttAEHOJd=J z3yYA2ZC4=Ze)(#*4~#A)BFBjI02XeUZVmwAOqH8~(FIfFJdvIQlFT*F?N1=Uc=T^g zwmrTm6ka;O&*v7nP-hfQinwqX{-*wg>zfC$AvLVqmB%cgZQLJiaWlwtvR%xwTqe>Y zQvmbv)a^ElQrUm~@+j(?`#0i+4!7AasQ|xUQHLkvc^kRB0f@lfwqc7V^H8$L{zv4leDT;S2wN}z)4wls73{o*%Pq# zL-S7vpQP}hx}s4c4Xf3RFx$rfeoin7L8&a?#u5|RHgjB%-Dmf#aWuwWQY@9r?uBqi zobvS4;s^vOf@B7q%+AkTZ%Vw?9WsYfDR@<68%n6ktIp`?WM(!a+5%y&DBlJ*3@VBd zBRu;=XK!X^Rx66+XD`aqe;mc-<4;sW?YCc9Zt{gp zYXrAKxwCMmKHq0tQ-95lEL-7FyjOHAH+|GImnvn9I%Cocg-9FuA-+>{lRy1YN#9vb z$p66q$o&LzfNRoWBVEa0$CfYqV(_HsFi9 z;L^$f>s+J&@Qj>s;iZEO0sr%qA^bkv)aDg*X7`w??3#-TxI`%7^Ac-i}4M{j6xcw;O?J;axb`aGQf(1mE1YSn{mNN9_Srn0z5gf;E8^fNQZY_pTM4$$JoSPNt{45}eAGCs&Uu^42K zhU=sxANkEZ4Z}-WHtv=R+29xRNe2G;TFE%rKbW&^jdp~*-Gl9g`WueG#2KbgquKPp zQ^~g(BWf%R>uJJtG8TOrtTkTIO|HTATCGp0BvT3W%(z~0SV1O=*U(8lEn%HVPN_B_%pX$*$Yb!&+g1Nz!u~GZKSgr?dM*Ex z>CHsP!1_;-T-8WGB-d->cO-X?%ZH%rOzp}Z3HT9M{Di;Q+SgQF;W>tg9eUD;q8t^x-#%OK(D)s98-O)j9ytnJkwhgYg=GoFZ?X+quXqQ@6 z8*2wbZLinC-iu2e$|;Zc+|HMm z4Tv&ry|zAt8i~bz8F=-!I&YizwhBe3vYOLGlRG^ajkqRlf%3bBK#|OQL9Wxik1`WR z-%>fqf3|8;sRDB5dAzSbg*qm}^L9s-DCx3wjDSviKkRKq4xF6Byggy}@G}qia-mfa z6~Fg8qMy&LWzyik-Cmpt+Gp8SM?Xex*wO!Bu9WT##WBCk3#b9R*db22C{_Y}pK$Na zVo8Me?#v3(YsIU-vuj?fXfKhd3sP+0rf z+?rqr3sLTr!?@Wz@5XFnGElph7eKRIR)*rIrN#lBmxx`fyCP_D^=0QIimX$EI&Zwc z-4(ugUhjObq}igN1?(JQ?!li|X183J1XaChP8<#oW8Lt$aIoDKhG$(5>r*=A8s(j| zoW$~)1*zf9RbztEm$%??KYUU)TU4uS)l;j~O1Sg7$Fc`kOD}mgq{9y2)ZRM%iwSO) z%(=6M$D<4B)X9*{g?+LcRtui|XK;&*!Pv30`$Z3>)|LIzUQWx58T9H$$XD1@nZpjR zRCUG!bh5dmapihnsOxAFdjgtLgMiImjOFNYS1G3@9kp+jrZKL=gILDCEHUjAs*Ppn|R~1dzvh)Q>5v2t9+|UDhzhvE7laS%pK!}IS_+DkUI3AWY;Ntr$=efFvPou8T5tioW^E+TWGV7Gh?kT2$UZbB0gUYo6 zKjzhJpDwpD;dwQ;YNyUecD{apnHoZDM00|kEa@lCp7Pih&0rXqO}_syx!Qg}CMIM5 zgv>E6)J>NKJWR*#EQAaTgyuVissn)nT9kv4ltK{#$Stl1q=*8Vl!MU)M-DD4MBj`M zLLvNBlGYe*ZAG_&*WG}B+EBlHcCahQDk7oZcmXl^q1U!U-$B8XOFklFlf*%lX{wo%dc9ll1PTYR-h0v~g`!ExDC46# zibm7vaSc$1`rCl{BPrUtlvz9`QVei{e!A~sf&7w;FgY>0J`X6p1O=GjUx)ufL`a3% zS()+UI3h1x=UUG8>U7IPWH88$W*Xqrw+c@XKA3_I-_GV8p_7=2!wmd$VBK`oF(f7>@$OAF$7|+v*47}DI zySKBC!$cz3b&_<0a!vt5O4DtFC4-S?WfUCTSR4CXDC}lvX zqf{RbyYii%8;Q(v8LYNZ=aRfH#i`!#q{Fo_HBF3Py-S^I64-o7RD4~#G^Rok@p(Zx zLe|IP%$!{y+AaO9R?lMG?fnu`y`u{;gi?geDjHRH$#~7$S@R&D49DNn2>-lQ!>NBX zR78Bl%za4F@TEHqUjgXoM1=g4O&?{1tbbbsXcVc}Gh#?hgzS{lIk&(MJc7J$?h&%Y zWGL58BII^IV?Q-g=_*otxZ;^0?!)J97+T&vi85%NR1K>a7vE%9XyX(1B}t zP~VN(7q}qN{OAkq^OK!lV{|+yR|+hql6Ulni1zLi8bN%nh~(~1#OYD>FMC%k;JFEn z-w*ewbL?D0lQh;pC6og`)Dmk9vO(p4bU^h`RyULfI3O~sWsR24p=&0=7XJjX5|v4G zGf#8)%Elys9w`V&2hi#uiJrHH@%(LkyQ)}aK{#`+1&zMBLP)aGJXgj{6To@lQ^7+0 z_mLYey?JOMP{6s*m7^utRTI+jvXbb0J+8{}@*K2%4Gp~g01d1C3cJAmrY1TULX6r1 z&FR(Rh?(XJ;D2-Dp^5GHEcy62hderop3WVb1wBmj!_)~_vPQx|aUlf5PB6W|EDm&s(L6!xDdjRBnXch0^-Py^rRH380^938vrazX8Nw>A!z`bmAw7 zq#UNHkE)RX{n$FD)f9_4PNQjc*0BFwvxUZm0Arj+zLl$?%qY>Q5;d2#3YwGosrdTp zGN89y^QdeB4Ja>}q_h_7BQBl9yfL)iuY-p}-RCFGcQAq)W*qQ>+Nh$Q-BBSzvd9?$YCIhBbT{3;tjCOC61`yvHGm=&T96P)rGaMw5Pd)8 z<4;Ncu_sAjy(_?RBnj*rq68#g7ZW*w0`%F0!rbk z-F>3r@k&xJcPpOgRW8%}v(+|>&4|@DODa*6YvE?skGGz?IrfrNtllv|#%QUEsi!hX zo3-HX*smVY}sj!b72_L3x?o8`&W_8rU9V0p+(frd?bh7o&7uMCW>l(Lr#>p+%iF5{7WBPJ@^Jk1Nugl6unZ}2r?H)GM zM7A7m8TSE#JtB`^hE*F$xhwGvI>vueAf0zd6l{we=*L8jk4;3t?QO>O1kvj|`@Y>o znaYe|Y2Qtk76jrnv%>!T z$0(eB1sf{!hf^+A2tl^cb{NEFkcm%Y%hCGel%bD9ddIUPTSx2fxP%7RM*G-CBo#XX zWVXmd8FwX4qZtj%HPd2Y5wgjsH^lEO0p&Xq5T*WNeGCQzl6UcVgJAfnyQ_k3=G(kuhgK(hh`U zgd%ZMyBnj9DL3-P3x-&65n>LaC`l&>m8smKFUm|tZ^zOQbn?mKjIN6GK5waht&W$Y z|8>;IPs@72HS6u**n#W?=N(XynKmrJi48^Li5*#u2+Mic!w{p33QN=k%F`0JvfYXx zWqz3<)@Qe@!C$0-Te%t|<2#ZH3JK_9$V8P-mf@RAg+oQ={ER9OI8c9!zzTqsFcyOK zUIMPRQfb>>n$&8l$*cv70V46Vjg&v&&A;MV$7)W3Vua-SmvWu zrSaC>Hv$68xnSbVrL_AtO6?DH`NlLB@LC>8Si1bWbD{8G2DzprS2Pt^)GysYXPRp7 z@z!l15^tOgAy`!}N5JIV#Yi#U3z=MD-?AP901>)KP!UT7b4g1<(+3EIs8~tUKqsQoi)KGv z?}h9_kE=M_u{=zpr$mQX-$N-DU=H#2ZoC8I3&pSeTYuKSx=;R(__KcbH~u?+*1sYX z{12d0=>e#=e|OFR5Z`|Lju`*M*#0lyk&%V9v$npqm4ltN#h-2?3qxJIe{|2#{jY*} z(bNA4Q3Y_d0RZd&bZasE2~qW5qUoFHT3H!dXzN;7SnF#85Zm>QjQ>$ChQG@7pWH@_ zY)tI`=r&RZAXN>)0+6bH9sre=x0V3hMq_=olVUKtplK)Iz$|<$@9_R*l%a8I(~I1T zuzK#B8S*77gs#Ljv!T@#@68ks&uao+;nK8Xg(%kAUS3c4vDHr14+janAwwHIK8<}rUtt*`uPeT26+!0(}*gGDDQWu}|N%kpjVBg;!gVY}{MrC9+-gT^b zUk@Ok3lXfkn@yC`wg(GIR!4Z7I=m+|xtvsAsEg*v!0_cRSQA@c^S3FQsJS@yFe|RM zbtA5H%MSOhXYQ@fz}@*nd~zpwd%zijo{Yv?$~Y=q8B%*ruP0?Xl}GY;S9#vAhsjN5 z!CA_!GT)tg0~=Sfc9336GzQBla6zUlEmcH%?X9Z1NBcTdUq?an?^xR)W$kqXL5kBv>C(u&1}fK%Q=GBi9s9Wq6`ZPA+*Qskq0G>R26` ztqQYa9uDoV=`2YX?6711h~d~ zSEv+q9@}}IS&uj_T2)P&A0A7o=P0_OmbSdU7)-|m5Gk3^6Cn6B8)%rR1m>tKpJSs; zpF%rnY0`BwF|oHXkhiyRWNA4FjF}qOStW(%H_{W9HDtSD<;P3C_5k%DCo;QWYxMej z`H6$RNZ#ZnXnWM;!+@!YZVF_QnFZR{;AlSEZmWqS8j>lj!Y`&PVwyooMM1iVs;Q`= zbitcGwB5Vi9i5Zz3>lG=wsBH^2HSzx+$(YY^#bq5>HTailF~=bGj$16Qhk6?=Q9d2VyM4Ms%0Rb zMP>~Ig89L~Hc~Xul6?=?=&rsacP!<+qm1;5Gh4Iso*tCn$Px-&`Wi(|32sc?!uKg! znRlO+{fMI3QVT`o&}eN3V)d>Mse0jb5px5RjHa_> zQ>3ROO-}))5;X$qG39c67(ipT6+kNp=zIZ9#AN+oRj{^V(%+%^1T_9e-0+}xC8Swo zYqrDHwR_@OK*4iVl*fqgm${sGW*0Kr(+}AkSs|uL-x5PDp?(P*7pSFBPBh4C0V16R zaB~z>E0LI%(*#hZ)3=s27-;`GZ7-OkF)sY4%cj0(o}YWTRs!ePhE* z4jV&YQLcJ|febZ-m>yqpbToMA?H=DG6tpkNRRnzjVDuDJ-|ciSTh?|jkdYHsMcbRg z`CdK8gotv>Lxg2DxnS$7C9vYc;j!AnSwB3;q=hvL<%m#rFi7_y-C6G~4*86mc1 zyB@j47h?gnFRy}N#1V|Xg7UkVCh*OG#eNGv?n3;us6#%8pz;7!Z6td(rR7@fObe{0 zsm7S@rhf&D)4|Y{fO1K@us_~$NKo|oF;th348psEngq(luHWS~@y@q^JyY*#-J7ZJS&kL@_` zT&dp=$Yz!yR;2ngT5g78JHngOXxYstjC9`G znw@Y%&+!`yZ_I78`JPzM&MH{rn2E*?3YuHZT{&vMX6}?%$V93%k4oq{ew$jWW0!5= zPm_DEmXIs~hx;yW|7_|EL8OCOI5#PL2~NKu9ggox+f zpEXwg0QtM*(bu4;~&}>`b^2v`YV*@Y^S;eYMm0$oKaERxfD@V z&fx={VHThiDOZJ4yw=b6mDp+uUKF_r}se?yT6|{vUU59oEN^tqbE0!CeEv-JM{;odkDx zcXxMp2p-(sLU4DN0Kr{C@UO|Yzjf@9) zR#~i=V*Fa!-03Hm;?|$al-^5f$GnLb0|{p-RXJxVUOj2a^j{Qc6o0P8d+P)=Y=mnM zINdqFCyaA%tMuxnMBC%{Zi~!(dI^fW3*FQBNT;-S zv_i*SWhT4(*?~6=Ts$!hnIk}4B=1{htMHQq$%t@ zOQf3F?3a9a-aLyF)&SG(Nlk-M@w)g%_VkWfx=B`(<0NvCD2#MYwx6c59Iiz}s&%0o z)taWsMiN?%pU9j-FA9*D(q=_XnCY$v)$hVi=PiNEWH(B$7R#@p?5V0X1xO0wUsDgH zo65esX_=9^Y2o=5IU7_ieV4xZbeK|+D9pELS>PNM$3+h3;BdVdHCw4hDp3~Y$|rlG zoBoDcJSNRma2c|Q^?bEIiM(9V>??H=R5fBDY?(4Huk@y5KnSd&**T{l72`6bS zbAK&h^#ZhLS5Dt7oWAxN?>sG>R^Hv+ht-f&s)#F?`_P^(pZ?KH*Uo)(ey%@dBE3uo zRqO~vq5(9L$cLmck6j|WVt{O79%V&7gKT^r1=T#E5!hjvE6I@@a(}yUx5&|Ki)Mio zT;|rZvB>yJ9ftO^W`RmEfmhGwSOzF8yO<&R82m%1j#eduGG-A4%^a;MdeI~UGOO(^6I2M#hwSis5F`=NmCc|i{Y!|<@-RdhbP zquh=^+dq$eh`-a2kKF8SLLrS^9+yg|?D%uz@B-BVbYfMF$Vx=i9RJdXqGdUs_c*P| zpNT#O^Y7%YKdIAa->z#@S#&;LTI}xRiX(uj)6gk!Jw;zOMC7AO1^>Fgbi(~%!F@V+ z>C_oD2}++>B~u-lYNOH_j9z1pd2D=#>plIXuzdNo@~bwbp0GL7DE3NOvKvkf{lSlC z7{W92U_|-M8}9*h54sH5H6pAx=1X&5JGKi`t=Rf-+n#+3Ke*+L*6QmJl6|_p>_up) zpfBhOxL1$xvgx&~@J*dqw}idcB=&q4vnR7EF;$C&x3pXAqI<9_fx;Rw0B?tCVi^Mj+4J zG>;~aLpglf1<$iQT0bcmkg(+LmCjrriQUG1?tO0`O zU()tozNPJr%zZpjl#SX^;=V{CD1|=OWcx~nyvXE{S-khfrQ<1Ey>9i%VnWd=#b47P z6pFBZH=S6hojjH46WVBM39NDA90Vx*>#+jbC?&G21uIT3H9WwOLTmmBeU#F}38T6} zIr_4=<*h2N#7Sw)`!C9d^okRQWpACTI^7jXNFT@=>c?S9Tby>q`C@IQ4_()Ay?f2` z)SN1z!FF8v7!Aq^Q)?6{G8T;8{y1Qo81}<4JgYR0Oah1RAMwL6`tkl-s{$Pj^nAYp z(lKeQJ#m_aGuz0BpVv*@)x6cXwzV5u^%eU-)REE*j6*x_q9yy=n`&I_3z|eC`(X)V z)IFrDk&CIXh_Pk}?}ZGIw{ZhfXR$?E`c;zx`-#cfpcE>ZLhYgirSW+U6A5??%L#Zz z$}m#W=4IDfqlCeAN5zE;E24sxSHPn>YBX>Qqp)ztq6EIM2AF+89wYbeb zB$zZMvMwH+VS_TUMFE&vUE%wAamd;a)W0*Ml!?28!PIEbOB&@)wSh@3ADGl)*%bW_ z35!yX+p<14T{4Td%qjYD&m`C@XZ%832{P6Is+IVAweiZt2?bzjWE1=>!{huc;2&^DH40zy)-nl>52)f3^P==QMeq^R*~Zz+rDuQBdd)`Yj>H}O>(F5` zDLWwEj=?9�XsT4p%M`m?9jJ;D*-@N41@B;0M@@IV4x|x6`Jb$qKEQe=JQq>)APa zmgwYc`k|VFy*uA86ASEKzhL$=7>8{48!44;0CR z$Of+A)V{eMsDhUV^B5R`7;ci1Lv8*N^Y-;3UFO7Ya6(GIj%_2bfkZ6WV*(=C%_*}V z#Ehn5u)MB5!N{E4+V5he-J-guF1|w$p1+5!_d~^=Kr`L&KqFDoCY$sgl-YrJllWd> zO$13BJrCmkc3or;sOg%>8I23LH+FFbjE~bTlHWxK2MY5KQLyb0prk7?M5TFa7=F9D z5DY#+6{>hq`-jc_U$$UxTyr7P56JEL(QpVD&`j6efIT46owT9TjLeQFIWxC5`DDix zu;)9M$!YDpLQW3NmwHSl*nl$Y>Q< zG9_(NTSre$KQA61|E?Fvd1B+P{}hDzD-Q9$1cdoF7!sKn0ifo8jGB-Wh=}saXYdMi za1e9-8LR5QLOA|nvctsmKPeCp9_DXGPJc&UI00)XMlLRn|C3nu{|WHI@{dyem%s}< zBjY~k{=vKo^(30h!TG)7)d3x$tyiyrQ{S}eqYcb^nP5D z?s~i>S)n+iu(6sYaRI2Nek$D&o!aE6pryzdbKJdCJKGe#w5}~%(m|24#yK}4Aglk# zf89w0TAhgaOxn8ifPA8f{<3~x?1FXt( zNZmi=Yy;C5+dIZ=ifSBf@@f~ixNc)t7hsAahA8S&1nV^eYy18YOd@3g<~Z2pk2&~f z;(MQLpj2A-Ixy8`d|!j*1?E7Q2@RoK9ywi>c4^(S%eQ`G=cm9_nw#9h@1nH-CT@;$ zRFLkt#eNT}Z~Ztk34F4>83+1-_>K0-hSDQfN;A;&In*}?n(;=$$HvV%23 z4rpFVo?dvRuz3hfCw@7T1JVyz2l;DSpJTAslRCkXIGu_Pp10i&N26kJme)iNN85Of zkvKPJTZ(=`Bgh}FM!ms)&0cNe)kP}$S{flUFIOcOI%RaYWhIBA@2YZ$#Hl-5T4;8A zkOa%rDoJo~itDs?UO7u(+g&;%( z`GEede>9KG!QPF3xPznL<|mu&HiKmg(>EN2;3p<%kzqx6jM?=|IPpgjhO`IZ2ZDl& zvHXNCP$L=Br_Bzh1uXf?g_+z#Ka$S%l$fEfs|i4|-Xr~x@iR<(o2E--ry`h?(=MS) za)}jy2i1I}tJTAjTvgGAjLCt{zx@Qufr7t|R_#?^ic_zBWi->X)gNe%_r_RF%xvxY zM6lRx4L$;9j9Lb#PGUuwDHT(9DtJ?~&ojN#@JP4gXY1#oT^_#ncvZ_OgNRRRi0#Bs zbd~e!9z@cjTAg+Z5fUdKY{&`rHnT1o^@){r@lABUcI%@~VP9n}^HgZ|UE12>ldJ@C zbr+ZH-!QJkwi}!Ts`ZLxy;}1~GjedVH$x5Oqo(;!;AxQH@~iyf5w#*P>YG?j%SAJK zQ^{E|)?JrFLg>#nOKRQg(CLn8`O7Io19!Q`f@jg7B=sxd!Q!YSd`>_Q=7HrHf=K0j zB4)so{QW4mwk)e|QFB=9w{9gXTuqa79hor5!&^4P`OVOJNCeV}hb>SOMs+hy+(;kX z9;a;Hd3aJ@3OEN|4{E@rl=dfS`~20-NUs1<=c#yXU)y1uj(6>HE#a8PqHJldqDrd> zhom5Z_wbh<5u{%@tuQFdJy9ytN*)TfKOA&oHV40ZIV$546;6WypQ*r#8C01vN>0%X zz|wHvixq;3QzGi(NrIQi<-tWtLZI8 z9y1l1@v;QHk7-7nxI0`@F!PL+1W%QJT_E>+{C(Bjo+7#3p`0Em@%vu4b5-l`g=!3n zg*}+5)AgOM-EO6eqb@$C_ymI@lU6WHwr-LD~Rs-*-t+jCriSR+O&`^7v#)@WtS15N_(%_5W|( zf~G;{lgM%MSY5M%*cy9Lb8iL}AqV;uzexN2(9WP4Q8WxPVyPWSEV>v)2jkmf=iMta z5i6940G9iK(;$s`tW1FX(!W~=EkQXwwP4!tkHx?K7w;$u$}#siYQ)Cw#G;!%FnaP= zjWBzxvT5hzP?FIG@h7s4q|7GqB-|_Zj$jKVe!e&BZoi;;_?Pir(0=N8hJZXaiiMM%6 z9hhhE&B=tjYHqfJg6zdVkJzG)Y%DEyK!e*#icw{=7k#jio=`%dDTwz}Cql?gG@?!< z;Y)Mgypws{*c0BKo(P$CX2^L1td>&7LyG)TIk<_;DNQ=fk_UP*1qf_}=JW2fK8{VL z$wLA$sWoXnwk@)IL_4!8(R_5tS1LT5m6|JPn<+dTL_Etjgq|tw+y}>{_PoX245JG@ zRq3iPe4cW)xV7MDJye-qW9xG6ZF{)UjE)2K67NcHlyR=dl73u{qsL+y)RqwYOF`ncFViD944yx;ZkIVNT~Hk?+#J)o|QS2q)NEd|HQ3DJJ6ARH_Si>ZAuMG#Vjv zl-&o@NESr{5Ii=hT*N3)Wz)zyMT5+>Y3%nw{UGG5z;qNfv|qyH>l9@tYl@(40t(DL zlQw*{WWda0_?4@=-lEP3HoU!BL_(=~7ZUZPUSnYkOb44A0tb5eQsu(F5nxux_A}C4$-@0p|p+jT)Dz$HWYI z53_J?!0hQp1rnDs4!5J)%vu(EBI1AYkThQd5oh_ddd+LLb z=Q15bqRHbQ>uAmvceVv11b5@I-~Iz7aO~!?BL=~f+G1(raIkxq`=u@WYKau4rPXDo zs^m}%*%Zyj4Z^R%V*~|azB`B%22ME&?P^yH`O-99dx{iBYy(WFR zp;cVqqjK5Q%%~)9mv#DkP0kq$RcaIhRAH-cY!=u zA{Bl$qnTn_L`kD08b*6Dd)M21X*YCp8KeI8ySIF49%nbhO6~C}J~igaDGcu5KHX_|CFAr4-(ALW!}&p!u3CJ% zFaiU&Q$m4p1XB+ZuS-HfUb}5@QMHZob)&4(LXTXahhv|ohijduTIOaqD3sOVulWk8 zeQW{v9qY)K{vH}UC$%Pn(rFukUus)tJdt!hR7VSA))oP2?|xZ<(3|?gbEZiVAY=a_t7&D6m%DX!23(090yimfe%t{fO8{ z&`Ewc(bNVB$~YMX!;AHW%dJ~E`nHRxGm^03Bq)NH#Ny(8(HUXD()HG1P%H($0%q$wRlApn z3!%g&gqmd&`nWH99Nvl-nju{AMktzvPq=qx%i}h^Bt2j_L%%vd(BX*79d96sVa zKfZbA-&6IU;SVf-U4sAbz#o1un*T3GAWVNH;P`JCfdIi*|7HUM;13*svMc^q3;n;~ z4=n#S$08fczlKFvi6(3MlN5vg$Q#rjgk_sRfC7h@s5+VeViCmdnJAP}0hQ{b%f}m8 zIcGmtzEtf`aq&n)`ENgVlua|eG=*O8g(N+)VYht1F;M0AX?cA3T(8ac*t8?JPA@6m zfZMDV;aH_aPTTeJblD_8`{Mtgf-?N1+wxMeawka5U^H1)%NVG+IicgNJsh&()AsnQ zPTTuo0`fZFA%caR@{RDLyV{!Kv)padgj%2fusIe*kTbnk=r}!j*%QW(9?RiEMf=zY z-aFP0cawVskl2a}bUO6Zl{j_2pFj3P8j@3^m5pM@zH*Lz+}*mwsqe5GE~SpTlcgx& zFjdGGC5?)&9d@K#mgL%VN>Yb*39tXPcq+YJQtfWi!16KqF{QrOJZW*y~oED7j`P9)3tAb=4ixR<__&OtHP)PiGCuag`))l&VCmIu#mD z2*ax35mFcV9pUH#O_F7agt5+L)nD;sy!1Id_rBO9Aa&8(bs~uTM86gUq`~-s*SdHZ45f^yia&Lq%EC5U519q2_+~lLp-+{4W<{V&0g%&)` zZFEPBiojpIF_atj1KMz!DZosNY6UE(DyeL;R&};WU75*3vW}ZHNUD?~xk)G4v9EoH z#(C~H)0MokZ&r|`?5T=&Rp~Da>iHAFxLzT#D6~dcVUW4E>$|0o9h>RTFCwRLp&gXB z(+`_F{k{)-irIeYNu#bngi|VFJC)m$(w`LEYA6Lc6r9@DtotZ-)9}}S$x@7 z(b(qJ4Zkc5^dr3wVe+-Wu44S8%@a6JGYlHDXM=-=`Q9!rx=&7=jG8envQ(j9G15kZ zQBOu1{ZUsa#Sa|WewNHmT_h+g?cKTsj>NI7i2X_=tp+SpH?Oyb8W$hP_Rv1k3<6dn ziI3o~AKjb*dL8MytopmSJ}s!oo9B-Y2aQSGd@e~wB)D&x{kp7Z?KJJsRU<29VT({~ zES9SqkU@Jo z4f`q*6kCb1X}xd$`6!O}{J!4TBz_Xr>P2Mmv`}YcTLr9!kJ$pd{wQfQn~_#%foM-@ zFV;#jQ~3R*gO`j9Asp0=`a2o!pM#r3t@c))|!Uc|2 z$^^xfV{p~&tlw{eNDediSLri!jqkJBh8_$4a01;r$8AC2V~Vi$geJJ=dV zb8$_4Q=%~~;3t&pfaAuKGi-Lam_@&hC^Wd3L0AvZDGP`)bnbmQJC&<&$Z()6SE8!< z;u~`@-Z+=^MJVl>I1?e{6Jg1o1y;CNqI#C}c80Uy2o0_ZLy2u)A~i-Uf`$0Vv3-8y z50yQ~u}QWTdhqvhBNhaXD!QChUPhAhPD($+gS|VM)vP6#o_cDUmGp0zjUtzb@UdjS z=G-#XCrq-@NNj%of|qy{IPdIrSs?GS=P`JSsnDropXi(>Hz6S$up-k z&RP$l^#U4uA0C>W5bL*BRHQt5F|d|}D}PNrJBy|NES!4h-0M*3?rduFV5n@StJWf>{C;1w9Stn^9>Ke0MCjfhUKRbraDw8ivokIAl` zaC;E;G)og6I-6Uoth!z{N9{V_h-P}t*Ew~yoXm_3DyB)mg?*V*rRs>x(k6B5{t2zI z%1_4A@GvKK*g%|I;J%4NL!Rx2=(>|ehUeBFPM2Myzl%d-k}Xk-m@P3KW>TK%Mn1&u z3ROTlL8i8cQ%0WMb42@P3Mt}+{p|=kP_T!sde)-MNFuzs+OSc7H!YZzG;|BK?K_tW zAJ1iE7|R6N(l-`~#vT^(QC@?uqbw5aSJJ4mya|SA6RFjGzjKA0%3#qZb|Ml@Cc(DT z*fAqGGBF~gGWjAlTct4%L!qT$zeT;16HYb4xqmy(f3)Q8YjS+E&T&wzM^um;e>b#4 zxkC2!i&hZ7`gVGp0ct4efGZ!te1IiyIds|#+K?+>LL>*v5ZMyc5ZQqUvjlsbbi7q8 zg1A_`M6E3IkLIi(YHbseC}-94CKR>w%~e(I@3^Y#4Rf^!qMEAYq~4K+xYLmYlN8Rq zE|vGrhB#Hm$rt9vX=E$9I1Cq}V69NF3`_`RNq8YQ!~}1S1fj|Y;I~xuG znLG!B<&{FRS%wD64@Jh#*zPAJd}_(|41DY@n6^CMy^nYuTp7#v60d)xvYgyKM}P44 zm6=Ht9)kT`Q;}rUUXdiaj)Y;7j8qjOd>U01VzQ)cXM7-UXT0>fDcfOERdLppf66>y za4+FpaZ+4kxhA3HQ4?RuA=iO#DPiPACv}AsG84^kQ;^D3 zI0)EAGNTQUO=oeE4}FN1_>35>V7!~^yf4TJg~VqZ?Pm}ZXAnQS;%BfqYp{#W3$KR{ zE-}yfp(V`VoO>I)zL&EoYLF9Zub&fYp_{X)BH0dM>nkVJg#rFdtnrS#<{v7FMJu@P zVi%eKy8wd%MYI85%N^|4F?{gpID_}>_6UQ<(Gt@}=Naa*A4vxiBLWTNC%KAZz6#68 z;4AHo1*llrO85B}2c&Zq<&CgNPvHNC4L}C2RnUkw*eUWqW|!)`UwX!A9*C@h_BGul zWa%V~6~$WxI{a;Y0P+@p-G%%6WZ6|1nAUW0^SuHEf`@L%~Yk3?1e{f4x08#vvW=->xy9yjh^f(7 zH8>vSlVE3^t+Nd9h$LtpSlpex_yN)`-ZHT0=dn!5JA1q+X>+yPW6{(MU9)+hYjSF~ ze~FNxjac%0nC9;5QSRzWlZ9X(ZI9HjWaLi&P`P}J+R66xY~@@MKF7k!EE$06y*VZg zIaft({|iCjoVM&dX+nJscg|{O0u(O`PNQ#Q)}@bKeVK>u;f2b37slJe>gUfVj#B;R z;xXCImk-jOP8n+nXI%gEH~H^hK|ZdI%k%wt31&9NUJ65LZN^Ro-e{u=?(f%M{S? z<9BZ-g*sWHacPG+_RWB_@^Hje0(!@&yk%$oz)?&cR|%+QyGK5aLA18br4Yv1^ZY%1 zJ4sxH7oHgB65m(r;yVaol}IKWI#3aii>wfR^yKbb-3(0SyjbZpzBCT6yAlq3P;;#}9(4a6Zk=wVU z9)z2Kk_l&nSHDUe+?z9#^8!Z1P+s$&uGRm#T>W3NR{uBnB3b?i*fcl+SBO{N3}#}$ zP5@Y}Gcqz0Gcf~k6@ff}e}sjRgPxO%k&#IYjzPr8!I7BK4Di&@0o+g>jsDpcg5|HS zGyl)P!9NJY$w|-hdS7BD7J!4~4`G#Z z7}meyTK^qkSpUR!h?$rGT<7%<=tBTu%s)5GYfo_kBDC=HzYgD5!xli`|IvQS1U#od zyUKqE!o&r5^Sm0B{QU_zy8bnO2kXD@zQgp-gsWqk0O2YSzhk2+br0l}^^6P|VzQD> zfC44gd@(YzWphK+E|(J#K0+PQ z=2qwgcTVEwQYU(1(>I&$bQp5FeKRsbBv71j*~HNGp6ngYAyiz^+>xa;B$l;~x5wQ~ zt9eu9PayuXFVV~1N{Ua%Wo1Z_3I9xYtwZMOFFPsF| z@6VMmu_g#daM3;rc&;H3Gh)lLg&KJ(LG@DE6D!@s}mz6k(^%; zI&S*MwUZ0hj99pw%!VM6;i0FcksDtQw_*=Zfq4-5)5^k18h$n>Xs*~&mTzkpo`<6yT96JdOisJP zt>FRqgR@*)C${`fr|Z`KEp4gXw74uG z=YboHQfn&r>8avj>Xwp{3oA5A=}a%}j`HDk)*6HhQ1d-F1s;Wx36D*VTvkV21~MSS zxVJb5({6Wat$5PsP>Hf;Qv;dNxY7o(;JWs{54Ol=$;CRigq!X14BA|jq?CC7a@vKA^A4+^R7Pxv##*T-Y9GsK zd(<>#9zZwbn*DdrvwVLl6tm@BjxJzuM3mWwe_9(={~Sp8vk5CJxposzp&kTP%{Za4 zbSRv189CG9E#-ln8kcHShxN4KRR&=&875+pXd!Lguz6uR0Y@}Q8rl)8a z>6Q(+Wv3plX9YC=)noOi$U%t0XV(MK`Fh-#@;EkYHJ2LS+V}4LRBf@NJm|m@=VJhv4Zfc@&utbpSyWRq!8q&T3q1t$T#X?mG=KJgIA z$=_4+!8ncCxu<5_tO&GL-4=bW17*Thzj2&tSr#9>w>9kd>MWFMk?bsgQ~|63eaNGSYU2!QEq7CC3Ao5dJ^+Vl2AdOB-7;t;?mMaXv33Y> z+yjmbwOq#o;eZ#&-mVee10iQ z=saJ2Gp>{HpxHMdo?VERt9`C%}i!BdcgN=cZ`9Fd35Gv6%-UUIJ8Kf4ap z1brA*(zid69t0b}lZc)#toWRjm47lKax|@VFx%>Qcr-n_cHneCiIKBDh!h^6TJ0M= z*KPvos^8`J-P~;Dz|OxJ0jO6(v->g{&+;#$=6fj(TYMEC zFL-*%zT$27ZVki*!by%WivqLDsY=#fHtl7io#y_dhX4g?eu4$?b@S$*zMZ0)Ym!e- zQ^{@v4K!MPNiA)`7Al_4#6Qt1X>)B*Ro0-H_w43wqcfV@ESeAB;BgR~f9n1CvN0gT z6N0Fy8EJJF9jIJUIm}Rcnl(Awe|&tq(BNOqnQzc}AOvTzRuK)4z^uFDo00>TmowQD`0D2@100-ZS$4m-$g;Q4SyXkc1GUrR;&()yHzJ2G!FPol{!$E z&?ISc=PS;%ZAThBdN--U5-|MGez&zYVHL(+MT+}ff_l<(57CWd^ImB8lTH_w?Dz{& z*4a&f!eJ$nyTr*{JOgW=;FB(LsP3RpA}KdwV&gRy53$kEqzx@(dS`XKg)r#2gN6wR z>pc@lREucSx5pc>@Es@kzIn7{!dX2AcT@=$8ITxa6mjR91o3eHOhHATALn!1rrZzM z>Eml)6;|5a36Iu|!@jBR>h65srex4M1KQY72P(Z$#T0y%=xTA1aO)=94zqV|dlK0_ zPrtDSMxd{_q%I?~Z&kCczA?o%asR2S{|@xzkOCAV$TX@PgbK7CDP(E_oUv~JMEYQt zcKug7h{2XpDKE_TliE>n{+s~%v4oZ~K0^*WRDKjsg6Q)4wB)X)-ttog*U#RTFlcND zUQeisI8|8##Sa8xbmY?|cQ6^&BDxNR69(ktdZgfc`KTc>dtSCRF;UW=*%n-@cyFIALQc#VvS^;4XvFpm&6DWjk+f;auG<_-$b|JNk_b zmfd_?d@LVPNe(_}5p_9sLAuAp<{T}zGKc(9yzQ6H3{-{CMB3g)uOtqw8=XHFr7OvG4Jc!uz{d67-n9U z%5n3KDot}wjX~056suw*?cR)Ut6Qe6n9%mB_52Gj-(?(0iUpiP1Kf6} z;^V9FYCz*@#BMn?}6+I81Qu_cpr_-N{G2g#S zsSDnCmBfdzJJv)IWjpl7_Bq#DMYYZ4VEFN;Kjf4Nf3LBV_D^?EAvg@_aXy>`cZjmi z%+cwX&0|KRIFiR+FtXHj3aki59Y3-Ee8T%4|HAomw&g+7S-BGBO(k6(i^q-l%949L zA)Y}Y`e_-(PSb3{Y)c{C1@BijGhEj!P9l;ciB`^YeaL&_N*tcjOTzg#mrs_bOY5OD zP5yRh8|6<;e(fj6uBRK+Z#a`Q{D%Wpp1V&>kJkt{)*x8x!OL@z20F!-Pcy1U(uGuS z?BpG8@T2boB)`hA)sf%kX)yj^_Xq9j?Z~73x`O6dmN!`5{vvNUbF=rBpi&?}I%**& z!m^c9xuCZ%?=2oZ62_9FU5R);Dpp8%xfZ@ZgL^Zl$ixyIMs4qD9b?S#E_`3V^`Jb? zq89Eab?2kt%dggZ^3RKXB*|vZ+aZj0c#C(z742LQmKpsS!lLY}_|&xryU60C+UEL3 zlXmSdnuarDd2b1v zlP{wt3)XW}SD5CcVogOe`S=@9&iLaYqc!^>YGKV>!`@yhGo@GEj+DK}K zWk7k>J%X=?i8c1Y*JE;Yg?<7;;6nO22$OUI_>#bhwK_+5`U#hOcfUeI_JMe16DL-d zH=xT$*)MMp@3Mha)nQKON2z5N&-dJ>$G+$D=H2>{q}S zOg1cmD$fO=g&Uwn_Nx|4X(q2)oM2A8Y5`pHs)Yl~#2;F)knlaxvpP&Kz@+V@(<@d`u!PW*=LUQfL?)bE_%Ov0}@f2*1GZ#A?2t{FfmgaP^!BWp*8*HZt6j}Xg0 z!WRF1aEp!Y@AwG^F*Cra`_I71pWH0}4B@c-qgBrTPZ5||066Ov*&}9S1Ta1(ViqO< zQUWqKh}oC`I^S2vrN6^B|0mdy?XMm3{~6T!4?$SD021cc`vPbvz*O^F7C<6;E+#6JcMK>Pky}q+CCUFF?qbkwnhm#YpX5&ncMhxOk7`Xd!- z1ha9i=G)Rb#z^qUQ?OGF9jRIu8)HrT{m2?NUNBPN9s>tC909`i(!T0+IW1+&rj}g< z3PAunPaTeOBU38)JMKx#6ps=mi>M^MM#7p+2A2)xm8zwBV&zDc6{#Yb@&-6 z8Nps^N~(jP`8XT>3p7`BvM0jYG7ARtmITWZodcfc?e~;dNS@;@=paSgQ3Aqm;=ds# z#e_F0o;H5$4Tonv3Yi<8Xjle} z6tIf%z%mg%HGG?b@6|nNb2Xry?U`QUL1k8Gh%T*z^e=)#cMR`* zRAY)@E3Fy#O`)*rC?OMLeIFx+14&b(qwt=V=nSI>xU~(%^jJ0`{93@Im1^(wWPMUT zVp?x_JOON7vs&FpTG`@Jg9xj~Edu%b%WZE^ISz}@L~<^T^_5!Dp^hny+tjrgN z&Iaz>s#GfQ%hEJvwoZsTAYfBnEP;}RHAWq$18%tq=GJ7-xJX56$2UHG*?<-4tI{F6 zZZE<&yWKDd;uit-=s0F>{LI8x?MD0a7{kO9jj=uGrwJsC%(Z50* zkQDl@{&jd-Jz~(NRdA0rtzVaK07@3~2A8p|#X*j*m zQOu3_-;#~Aivpt*vUpjjD4=rF@n{%f#Cx%!%e_duYV){)^>R5~iKtYoW&>$e=$4#8Za5QQjeqOgLHwSDX`YSu%tsFXo1AvPNtO)#ikn&B~I}c z8EirkwNGpbBcrxJKA8VRgIc#JN@iP=vzcscCJ49mZsnVUDj$!%)T(35Dli-{zml(l zmF)rpzNwpg8&j373Av~l7%ffmy9nMI8A>XBbO*$H$q0r9$?3v&D|^?HYWC~pZ#Lts!#B~#&a zF|MKhpk$uS+)ZJ&!D+YdXXwLZCIF6%wbJx*@7_HCmR_LVJ?Hm_N<=$phiK*Go=U*~ z(2a=uYvYdIEBcM*dq)*K{7*UE*q(X!-&&i??!P^FCEtJJX;$;v3U2AThv*M7DU&O| z=$NI*Rm1<7uV1?6W`((prY(W2x_of6BWLboj;SRdRxh zANf!~R41MYe^9i>PDRu3KS({Wlw8i>j-s|lgl?cUrPnja@ zo1{%78rk-wCsg+Y_?tWt_N_cuZc>&zdR;#&q8`o{-l-o0!Q_f^acQOjJ6W*MI|WsO zKH>dvvDP#_(;cP_k}2E?0|o0M*R8vIN2j?Qek|J#Fetbd?63)J84#uEGD0EghmZ;pbmZeO63;CRUCuc*-#v_N z*-*YYb^H~Mbj-WlxR-V;oNn%qeoAA(4pB;hg31omS7go}_~k#+umtApun{ZpX8S`4 zFerS8-bb-UCWA!u-ScU?$ucZcBa z?ykXtySrO(3-0dj?iMU~fV+}?_Bnf>v+wgh_dff}dl`e#y=wL9n$=xhUE^2(IVaTy z&BvuS3d|$OxpB4E6$Q<@V@JF8f4r3RDo~Wq@QovBvmN35=m!;c<|p@o1zQqk324&@Puis-xHs>EnVmXI2DO$4 zSm&#!4G>N*eO;lgHY}Weya!Dc_NaoWvM6)?ChvQC_VwZF=xJYjYs;_JAimp9{_F+H zJ5e8)m)_dY!O`AG&+1=F71sZh%>4gYUiL5C#riwAV*MRl{Q^2adDSnV@@waJaK-uy zT>TkSvHoIM@95?9?1A9w=g)qztUt+o0RO4Y`#(lAEX*80z11HQJ+T0OlY_DSmgwnE zBCNlX_yGO}P{qOo)SdleL5xg5KJ+VA4Uk#=hC^6@ny{Zax`1jhmVXkWzhq{BKjNYP z3Wl&Sv;4a!n?@9FBiyeXQxHsZ&u_pXT7g+b8d)dtqXCrf^7&?75#nPhLgHB*jL~FL z^BcT2YiBc(Wb=j2DjY|B0H8h{%R^CJgWSUyJ-25F^snCX>gSx#OIK_*Y^3?i(xqP@ zW}Suu&IUR|toj^3dy*<6st0H-u>`D6Z}9rmCeZVGzg|7re7}A6 z(N=gmT-^_c9xftm_gGp}dEtM)&_0~R zb9+*hw9%0wU3xa-!q78H(v;Ghs_Q70$FAE~gsCcr`XcRlx4>0D8pLt)BP$7pwB(eMdn zk7(OdoR?4XdGmAoG)bh`KBNeWgLDmKHYu@D83dLsK_i(bXz4gL@eeTdRQesq+#@1# zBIN9Mjdn{RauC!4@{mOLnyPiglX!AbIQU^^IOCyaWaF7fwi@I!&bx1G-|gbmX7w8w zn^8otOO|V#HqyU>*m8oveJOZP>nISET+XvqoG?8S(317i;FTfqj>pgvBs|(j3PXXB zC<=rdPVgS&*|dZPU!3gJE$~(Pk!KSYz}*xb|Nd#CROQ2EVn&%9T9`4;0OJu&j zS2N-CGt2zA81NKkz72d>7RLG2#v)i2Dq;p>;VgV<(fz5Y(;!X)SSx$xWcfpZC}veq zK`d4@6}G^m(z!qC)e2zkzGZvIOf0>_*vR~WSUN_%aRElmUv ze1do~$}gzzz}F?$BUA75$mY2XBvsx|`lMGuc#}cSEHXW7y28Hl#Bw6-5lCpM(|gHY z&4ko%rkEd!@@v5{1u(S5L+5w71bT%wuCJ?xTX@B=p6Rs1JHgHOu)C!@XvOv2@Hx%5 z_s?^91GpoN4Y~(noRc0lea1X>-=VM_CBN`hp+I0MqbP@=q+PlpKz@QH^~Z0XG}?^r zb=sfk*SFRWHJt2lXYM1#?nc-waBK$A08wQ}0<> zJru;V@9EBjf)AT`bPd5SpBarnFx^A*xn*PD*6_@*ytT_9F5j|>yr<01V&5J^>nf)f z@eU!*%oIEHy)SyY>&>Ble6wZB;8Z%L@U0b1X@necXWx^de7-9HB*fx}zr-U{~LnxT5=$T+Qzo;F`nPspC3D6OQ@`D<6Z$S;U`QV=O8X-wsqAcxe|9B?K8%j1 zvo?Y%`VA$*J9rIK%@5$oUBU}d;`KZfa#8*jO6a{C+qy zsy741e^Z_gZ^T&=M^k>|*Y0rpg=9Vs!)KBaHU!K_&78Kep>g6`isp-pK7xIc%E6)g z^J?(7m&z`uMCqKP#gYt;xN?9Yo%>DSxXkI7%`Al$MJfz?*__Bir`Fyc{=zX$xN1pD z$YP;^K5Iv{52w|a%Cu*V6}_%y#vkGG<&CC)EL3z!=gHbQ+TkJOUYc`P7Sv~sk_!9R zd({S2(_+$daLw7L6%cLEsE_7A>?Bj^?;^f8TYV#Mu0^5P{)3(;eS!66el_+6w_L+9 z-t;Y*xDIN>56~>}7SA4M@kljlFFB6!x4o^l)d)lZbK9j%N`xakws=yyzM3xZT_>z$ zh+-%<2Ze9mY@BSRC?hiGMmdoc5o3OAM|!~cw5|jhaSr9&ZO!r|0%i9~m-jKVNmjb6 z%y!!^x0r6!5~IhE*+&qaN|AG^v7Lt4uGI_EefFx^SXI$^&B&~bk;k1k_@u-LWpWi_ z#}lP8*Lv?vRV*EP^8w9lS6h&?%=1T$a3&4os?K)I-D6~XB-^%&M=R$yTG#n$9y`~K zozs25yRn(Pl7Oz=nv!@@c8E*6$;1Qksx=jd9?n&W3%cC1Q23)=8kc2h&DYG2($Vw@ zTJ~#Td~3ZkkS?>tqFE&8Q>A<>3E4zh^Q~y?R3_@oLUJ3v0(w1mR9Va&1@60_PT?AQ ztafsVYw)tYO32Am9Ievwy|vdGxu+OQMPWLk%w^WBEl}(ru#7&0iJ|xD_+A=zS3-d} zB5~=q61r3>*I9Gf_{qm#Fp0S7{V)LG+Rdkcu#4&(=(~_@zS=4Rc*H{cLB!yFpuuUOue3wq+e$;wTwD&mb=!ouI8Y{<%aQ;(paGFATB(ro{C9HJjY-?FpSPm0l;OKI|uaPI&S}^)o{7gSp~v@1$6KqfBi(B8$|H<0lkF z-E{iEi{skIb{08F{tHq$))rQH)c#QVDtD%G`eOG_rM|A>E$=TseGpOZvv@oyE`{%R zMJQdyE;bh!mZCaH^jdtCRH{EHUhXz?Hx}}onL~|gsQNgpL!xV*p|cxaB88bE)C5;m zxc08u*)T0q(&VjF)Awa4UOJ@^Eur&3EDb)tB!w7ahHyn?PO;#SxHm2pJ^jgTczer* z-R|tSd3wDO1I(L;gM?EoG5ta_Qad4qDJ-O^Zz3qw=_)yYNzGGRPI%})IClVhus8@9eAt8Aa9yfip5NsC4@IPi_z^}Kfo zHH#BTFPNvjF$<-f&Hb3pyOoE@gyg}p1Lf(*8gc&yIBkKM6!By<4x}&KKSk=t4$~(l zdb1oqm{}r70evS!Q zxSc@}z^aj+4V>2a2NNN+M5mX<;>!0QVj6{K0yn6`7_52W^31~+^#YjLG86{0;Y=Zb zJm9n@p0RXDS(*Yktr-SRYm9)?nl0dWz-djlc_0&TT7zOP@^e~a;x6)YT2qNG*N=0M zZjXM$%#}izH%6()ZgD^!Z|5z7nH@o~^W&XSdX{{DAf}O~YEC!|^Du}NusT{fGI`N> zJHKqH6naHv8WXCBXNEl+VkYLUCPs&DR)!v+TQOOvr(R+B51?9xeQY!5b1xmqL8&3| zN7ld-OH+W=K@78h$b+3Ei??$QWEvl**g5@Y1MC`x=4AfV0N{5&8vs1=X9JvnYk>7X z8xTfLp%{m={;C-SJDoW)Tg0dhD{IudcEB`W=FD(c=1OPKRyHJ%b<-rp4b4UxvTXv4 zxl`4S$h+Zy@uZ5^TQzB5P#Yft;Q0;*U9z@4r*Tq-bEY z+le77;$jMXpJXmfC-vv$^su1;jIh>S{gF$0VI^rk9!Q(j@L)P#jmjtvc=UL_!?-AB z>*|eLAWTRpJcA1Zn@Ri{WTYs7&(u^fgyh%C#^H}kG1H?IJJE{-Zk~}EnYJuyKd3=} z3$b)y$ctCb;dH|Q_{>eBd`>1XYLkGXOdiX$Y!4YgU{Z?&YRMVXPKJvO-}k{GOlJ|! z==<9YytFdsL`rT~&LgG94Mbd{f-mD|UI$7lNeEuqcj;TQgmRh{TrC5m4%tRnuk*l-5_32GvbEDfg?Um#;RiUf`2Hd*`?XYjwK#M0?ThRi zGzTp+qQjK74f#@v6%9U*t!iB5()I5Z3NifWl*%@$UcH`_s2Afl!)sbp$|%PNa#W8z z2BY7I)Y@-wMbNhWDX^S+<=mDvVizx6JuMWXWTuNq6&CF9TD22bh%9I}DyN=xRdq01 zm{tV8K-$@cyv?0V^TS|ozT7emC1l|x*oT{=P?y#I%zG*KY4+wvk&7ev_E^X}%>ZO9ZMH6lc z#*pezZ!aLFwP3Osic8AUlvJNtQQt0n$_P`R#%ieAs27tNSW9yKqEoQZ^O(uMjHDE) zTxh)-qP?*`b?0G1)w4b^2ZfkiRQ0_G%8AoGZ((1u)@#U#XKa;K2(_$-;qko5dMx;U z@nFTZR$(VDn0?^Eg^eY#!_4O@GQ+~s!d=7QDVvQIuqhsA(vbL9v@W>~HdR z%z%VG(;JJh0<~&=rmF6;^vg)^aG$z)%i_tk6AM(&;M&4WW-`*y7merK$iUz(4Z!>Y zMnmD+@>Q+-PRZ8=Z`m>A36jT5B{VgKrSyJB;lS9nd71UJb4SZCcr;V?S3 zWmXiD$2;A7V11XmXSseU`w%e{X$6XOKe%3)s@B+xbS@TVR~N@rG(Lz{`auLMON&rz-|sNOYkX0(8hfMXE6J2G>6TyF_>HPjg85@6~|pS>GV^Q z?UDXh!^t2x#^5Y}H>jVz@ZI);$y5U$$nT$Y`amj+{}Rgmr~K*v2`C5n2^)Ws zH^A?7?iWG(Rr0&64Dd@<_GcFNi!1#htkYkyxL-=O|6y3^Klnp3|4h98Z?2+Dzy$Vx zb`=FuFk>?l8(YVJ^Zx_a%{+im|Z(iQrErN5I1No1hFBX^NErXbT4i z;Qxcj{SEG!%nUyXB@-~V_HRyz%s`pcZ-)JpN&PbHk4F6U1^Hu-{;$X&GY1pk-=bOn z7USwy8nHyD4iJ9dl-q`^IGSjLDuaLcA?A=M6~xV*jGThVBy@OijLmQzU1p_5N0 zX`}O}M5e>{aeJtZUlup3RA>g_eW6c^di8#|urmS24xFP3GJA_G(MX}`NO`TG&GX{w z2SpcUq5H$tXEiw>QDiJXMM{0taI0hMg`w$y-S<-@8t1S9R-H1k!J9N(Zyd&9CF6t% zEbm!{Dy`z0Tzk@}Z={hGnlDWoGo*CY^Q_3*-=8Ze-!(Cskv-GCdhjtZ)i{kx=vSys zUtqfGJ0?UHZXl=#j9P*1`<-eSRgEeYP*HmLPsG&s2m!VZN@U4~bN1CqO5cWnA5>-W z)7olcyYqewS!k!KvO1==@$wyZB>BEfKJ=RC;_1bMXnu0AYFw>@36;7^P5cf$zWz&H z$&1HaRsE|#5+-_iZQbY#`)xf_Go#U@sa%X`9jAH4+-*8tolIED2SW$Fb2p|sru1+y zT>S7d7q8i`i}_KQAJ3B)Y_jv*#-=&@xM*qB_Up05ra0oQURJ-m004nC6G59IZCj8~ z`|4`q=d5gg*IF$V;|`O#p>%~3CNB%7BK{T51mZ3mlaTt2w5b+2S;@P3sD!yYlha!9 z*KbV6^_Axu(RkieGPht77iC6d;B`qWhf|ICZrsqO3F#!xDQhn?$vFm2FDG_g_IRm@ zPz#IUZ3p@V^uqdkTJA( z2tPpnu?e9Om&eEXb3p{lAfsRKle5-i+xDV$T?eg>@QeSlxIq|l2cAK|+TIq2p6j&f z6;5BtP)stn9*&tOVo6{#Cma^O{LTj6)b01Wh9Z-CZd$y3Q0XXV`w6&|$~A7Ex$h3C z-V@j=nK+03N~0Q1Q?0jVkqv|tABoej`Oqhccw>)nST$47jdRpvZXzz@3>}O-mGZ(} zP1pN#9!h*LoJ<$t!I$zZbq=U@a;Yt*s=66FRwAvNy!TlV*W5;X20y~ojkcbNj(7@- zxsn{7uHgrQ11=4sCqE=^?lX!pG#_c5MF$LD!faf$(A^Q?b1bbUeL}69)0No{>k73E zK%KyBe;$L)Vh-^4{pRqT1Jaos%Lz=F9^y|!C;+`-<*%&eV7e^O3+vx!j4fi23cA^Y zf&U0rKO?wctKI|Pr^H?Ir(VXl6s(&o6XzhmMxV-PEc zl{55FO|G3%*P8%(s?J!vsXSE;(Dt!Vp1W2N5Gbf`-*;~Z=WD@wWG=Xx-4Slng2|>1 zZ#s5DhLM8ITsKFJeS!TF?c8B4*vI|VEQNlXeoucx729|fYc^9%0oC0ZaA=qk3|;iK zEmQC%<_jji%fLH(JJE(5+4mh#(ltNro8(ddYI8NgJ2)t#Sd2 zm;xGggzTbL*>=3U>s^Us5@xiOZY7`kw!VNU`T@$msDv)-ew|jf$exrdyMBalz8H6vw36Rjmj{XKT-LA{wJ|@hv!6}$#Usf_#1>-6{vOJU(ETaPrH7s06s$~Q zCtN!}S=TNdK>vm>Qo<9C$3$I_Wyc&eU14_KuHE&%1KKKc6@M0MX5^i$X{o#drGllqI@NG2bx5j6pNoUX{m4W-pp`{Dp%rQp5@qE*Wqkm zni^nPSpvE79KQC8Fl7f^htkFsN^hc+i4!6NiyV@YxtJV5VaA8KL+|B+z5H!<;m-{4 z83s2g>e1G2(;y{~*Xi&3?@{%#t@traSNJeYrI`nleTkVc`LPGBATdp~_#l_jqWu~; z??9L)n|)#HoPdta@XetUP#OJpkY_f`@Xnv=;BEsfFo5*mxk`R_M0aGc1Jneo2+ET$ z!Q?3oq9_k^JMcTY#l9o+=@!N-#mng6#5q} z+d{5gc7I}6_L+Sw*6|8<|Jf)`%SKyB4kqm-cPz zWp?>a_(z!W&1?Q5yLA4im2m$I0xN&+EiA|pi!xkGln16orYoDyl>Q@7d^s{}LFY`v z4?E#u)WEiUVxDa9W2XDUzSAAbOlP?j4nsZuwQ5_+TEh-f9X;L74;&`TIGqxKV|?>1 z*mzwNWQ2oWA7;My%7Tc1NYTJWyJlNf_FAnkHZrI@d9L&RnLIi7LB+KCwAwKg7g6hXOYIY>N zh_y$L5pgc;BD`*ya|8WAKrgeGP>101)=iF&WJw?;_rO6Q{=_49jd7e0%036!6#>uJ zZxr*mVPm3-Ij?RguKSBFGb|t4o;MC$s3CD2q@K zHf#-z0jkaGA}Y&a($Be0m=4t}Z4s9{ZJhS|KL97GEZ47MOE zepdzetqX}O?$3LZqkH z*MtjOT6z3pYh0Jo_20z`v+BrSx$uiWHw^R}v9T2S(paR8HYd)=`Pub8rsKSubkL{6SXEY+;$mRZ$nsPl zs$`PLHCY0wbyXP7XoQ*t`LUrgcrhGKR7LCKlzElyV|v)sqlbn-r>$J&5uegyimqNKNoLw%ox|>nhhJ>(hL6N-!Ij5|K)gm$U_u_}Vk8JEc-{%>lC& ziTO7sH;P-a&pNHsIa=~H%%+&<55nI%XcTLZZ|_Ppm(+0&W=p`8Um{c8a%er1aoB|m zduX95tSysjaI?0r7Cx1FN;HX}L(NQ|(bo`F z+FNqZ@cmvc_&Y0)=fb^hQiMm`d958UXSfG{_L_&SsmR(zg#FA?Uf-B3y-hQ=|VN0G3kI8 zyA3pldYDv{5uEu{qdIelHt{BBbA`YEbgW@N|ATL)+db5kTv57`f`IrcrAs{nSNeJ= zOyiq`mXCZNFXJV<;w?2R)@0F)G%Hx?4wSm;=z}fTa301a=~tjh?OacscXOv=X_3pr zSkliW?z#5@pIA(KVNPYuUZIN&0u_7VoIPLXjy%<54#ov=&XLC1amVjLZtZTB@EerS z5N`bE9GVdCM8qoQ1WuCa$H#Ois?onzN7hpvn6VXvCqqB`yA{{p9$&kb1PRKz2QzCI zD?8uI-npNVT(Y^)hGzzQ_4%1WP{)=jlXW%NkUrUKjWlsbC=;2lLM$7$Hz(20ww*Fl zbG5)MPke+P75kjk3VorenbgKG)gE{@~iwO7&Uqrya`6B)$So$0EReu0WjQ>C; zz@Sn;+0J#n@i~Ya3LpqrKTm5W* z%tiKpi?e>k6$1csqWyBLBVYz94*~4|QTJappY3mGJ_|6i*l!BAf0@AYvwGkk+g};- zpBLe8=m$(J4F7NlWdQ&KuKmO7@OP%i@)NB6$?Ncc#~0cD2A@zyM%JHLkLmXt!UzC{ zd;|UgW8(cqpZLrB@<+Mf|7ExMRn^a0|6mEw8}uLd<-cple~w-M$2v@AAo2a#{GSgc z5V!uiHO#=?3cMP?hxFfX%U?XC!0`Y7<@lE&EI;!Y{wn+L8uH(zzAVhF|DgvBBW--|ouy-!31)rb z?T47m{bA>T1m*!$<`mHu7I=+D)}0sjttEjY%CpzTHlI|3N6= z#&fg!3RHxWE8B7kNM-~@H-0~t4H()<9;U2DfHpI}H=# zTFt28k;CE52*^**X6WfV&;^=!S9zXygdYXNOw;{>d7p0}+3Kj+y0^leWp1(UX9W7} zd-z}|ao)DBH648TW()ZAb|_+DjbLTUsYy@Io344$=6>yP*(&vIo1WzGScFwrImVnv zQ;ek;g=|`@)uMv;!h%eAv)IcSa;Z)!|D6bq1Z0*KZ2pWAeSq?XK_CO6G`u(1SSz}F zyLXu*0 zNZpe{;N!XYllW91dd9b&4W^smR^P=m44JQ{IJ?GVb7n&NTCrQQ+&6^f?M+7 znH%rMh-pl$h>kC-j@3zqT}}IiuzhTI(6AjMzI5ye?d zh;eg3to>@ zH*c5^RShYkmMPX}uY0E(=g*#sygu}OibMOu8lbN7bn<{2asNOLm@Fp}K833^(?ON|260TqMN|p3hab5`Ix&XkLg5jY z>%u{4eYKFmOI;48LsD;m1JhD6tUf8=R!Oo@MZPE71YdGA9Yn*bgO^;8(UL6cpQ;<= zUbcPO6Ye91`j8U~k3lyjr9?(V8~5pQU7e(B|7u`%5xXc|z?|hs9GJPIzQ=Vi*|bW5 zk}?MJ-Eet={kTQ`z8**kA)WxzSN`d?S}Z_$0;CE^gda7827R#7A{>Y`M_InGx_;5c zmXP@lLM7ZO{E?Rr1_SMf?_eu1aMz(bpW&V7-tUXJIRxLSkBAj+!ei^glnyjC3yMzW z6e!pcSe_~8Pdh--gh?=Sv=CbbMv%R$hH2xNrDnlAf0})N(oa5b%NNCBTgpXXG-gy1 zu4r2?%Bgl=#!@KYXMEKka4^jvHQJd@Es^`qj;)Y2n5w=a8C2P=S?!bvQ2>C?7RiLA zzGYH3(0ymxo1YJD5LXHH$2{-Kgy&^Y|-J;CnD2m=kbWo#Ludf~3*Tj)xDw8uD zC{xCR+PC5maO@67(rBgadrX;1Q_}Euys39ekwma5uxSC zr9hVhDETyWL!)37kq9?Y2jV^B^d$%prOfhRAypnQPphuDRV~xDbXSzo@(|vBqoP=t zDhh?%{!;QS4IPnm(_7F0L)O+Gl0Lb#inXRWoSLa1&zyZu#G*J?R44?Iib)7m0m7H( zNoWSv4cRIvUT7~GDKLY8bjnyvTnUmgq?howU3g0Q&2F?Q!UfGgyTjEws(|T-6$|}=*~IJ!JJ0PNP(FQq*LsLB+KEHd~Max#n6gK zR{g+Ql4DJAe(fgf$IBa(mMGduQL;f7DhUk4^9-BnnRlb?da$U~ccR4i9fGGmg=*`* zGbb2NJzjTrE+`mhjO#rxR^5;fAL5tt_td;Fc^B2wdhCtMtWV1?w&Hc@;IQ3GArN4t&1$TV zJvy*0-CRBG5}@ip1R4-Q$6)%99~{3}4naIEOj{ioFu~EdJle8vRW@Py6qpf#WF^qH z0j-PYLd>i>0}qM7Zgz@`98RA1A(o~)ehdKG+b3hVk6qDZPJ@30Fk2HWt;}9mhw6*N zV}qTnB5OICocU(ChSj%(#WUVn-p9dG*yKsm%AGKxlSJn@yM~{CTeKIZAS9CpyU5AD zVS_RudD6;==#aG`XRHWaGI!y2F(dIgQ8W$aZ44>}8b=q+Q1H@2oFS{F*l{;@yybf^ zvVd|7mG`OFHg1+ejgxV`LGgmF{4JlmU zRv%dS+ZX7jH9`^(=CGb4(nzNDcw%BA{X|_FJE7oigIpnyLp0*6i@W@vM#$KZ?vbG5 zd{LG4(6Jnfrx?FMC~Vr<6jsA}6-wLD%Xt|^NP(JW%A%Pn9;TJhd>>;$do*4~c_cfw znpGnLZ^aVaaIXz+7c-@-;4UfEk*my)Z{&;VE~oy9QtExsx5>VjOL|zKWe3kCUBto=sRo&9H=UQ z0~Ix2hHW1>l}tItwJ2nka=h z3!oCv%8@Q(D(9xjLzu!Sg;)biq>GWXaNYS54(~M}QqZuggm^(E+jx`h&rBE|0o$8+ z35{J5!zhq077n;LwGu|Qn^bL}8mZ|}auok~%M2u%8e4`K_oHRgRzVP*Lu=$_R+9=J z0taxrZnSLa#W!^j4MJm8q{oE{+~G#^l#+;ioMdib zS&CdYGPa~#KGt>z)ljI}#XdM0BItpE(8(-ASPpnC*KCXYrm=r4?FD_g--Iq>uV!QLfq5q>oOL11}7*3P1S;_I6N75eza9I6pOAx5-(uF<7$&6XO!Ix zAGJm!lT+0shuBaj`7alCGZ^mHS+G23hqnEU1$+oY>jCTUif@vm@BOb z?S&bo)JCE7567}l!7yFPAz=vMM$S>+e_vlNfzj|AL`JB#Tu?}ucF4+;0C*!lh=N7=1q_qqNl1+EZGQGAd*vNlQ$=)shYCR{Ei$Q}D? z!_P587s(q?eGT4kX{-E$($p0zq}yH8y$e-@cZX~d-_9yVbUiHI)*E2vS)oT@$TZhK zolc6Csc`FZ+C;cQ2gh5gSHp)@|L~m3bC3^nka&m=Ks*y#JDxSrZa86193!0(i;2k; z*a{B57a!yL)<$hXMO$tdQDZ<(S#4OCu);>C-mI$-pdm1C%``(e6h=fJ3=l4BysibV zjUQxuHg+-|xhdhIo;OyX=`Om@4S@+bhjK-0_+)Yrq=1*W_dRHe{}zb>SyX}Ts}p#; ztU5$z+thYlw#fZ|eXQjNafx2&sB{P1;(i_-4oO zNY+-Wqysip*#0*4&!X}8o>nwjabCWDNfP55hzKsn7BVMjk&-&4e3>VN_1|&2FsxWD zGfBis&-r=c(@S+Zh#P$@w`g)AA4mSty-MwO7LDY zwl!WKdeRKx4?kj~`~P@i<^$}cp7Nz_j7YS2DXV;O%m5LWU}{JikeN{DTIFpeR{kVp z0-vF4;C@8qVv3IY7>rxEUC$KSn!w0NzeE%1M_4+<(!+Iwm3A2lVwAPoFPbGE&b$vc*QU(hYoVgB zsqf`~TXGntt_vKel=B&ObCL{2_>>tK=5FUIKch4Cqv2q2!t@p!lEu2mg;1v|n76fY`O`zb4!+lx)TLcM$fn+uP(jeVBM#c-XRG8_fc zbQORMe`vlOD;>oV-A(_*X~6&Ksz>6TeAVWyq30PIXL`+I-1d$A_cHvCf}a&#!g=ht z62jGoV!uZCG94+0#culG*jEQ_n-8+iZA|E|E=J{l*Q02kG0-oQ?Y!t=va(XgNyOB) z(P@j-frzZrTWgKGVfa3VPir^x@gb&t*CWQ_DScu!y`oQ}=c4Mum23YpT(2rKJ zT>L9Kg0WtEkXky3;_F+iw+I~#&c;Gk0qj_K{bo9A>{TGTqI-=bqrxan#!{r>i2yLZ zyuju@x>y{Xt&LnwnE)ln#L=nUWsi=9cBJ4YFfcR;X4f$pp^ZnnwJ_7D!tsv#o}_b2 z8cV^Mq90G{Kk_2@VK?lt6|7wGX~SCk9GXt+-@+9tneAMXpd*~9X+aQ!j~uey@mwdO ztP70^62hAVR%Tsr4fOqZ0l4r_u*!FQpiDihb5>v5`Z05tKS(aW;-RF!!}OJ2&!p6S z@HRQ9R3TeGqM2{o4<6LjKIKuK&Ni@pV>TsBGP~2IwN~~8+)C2>ai#3d02WEgKGya{p7|%*^!Lq6DxEC~*FB z*u%eEj$;2C)?=8Nnf_n`3os|of4B0#VHt)IIHoW$0u|mr7h4E^W>WciBYrMH0Nelb z0siL$`g8aUvR=72+`SS8L7&G|7y8d|eB^HCkgmE~D0ar7v zf0y9o+SF(N6~ab4qw=g{1oZXA*2pK(R{KQFqUp!Q%*tyk$9W~*YfGIhhxV#nvqfj{ zGw1{v`taWQ>&-3xtK)->=Zky%3s++6i~8P=Eyn`L`x)Uc+pU`&K2O&LK0rr^^_P1S zpNEmxcDY0^MB&3-Cx&z3^TSNzPZERDp^Y898U*+)Y?!KvG%b(XK|p_~k|uT{tQ zKW@&V@VDMXbkPZBb-cWVGiTzU-;!EbmEf{(_Iy4%%Zln5@M-dVUP*&lkejwcalJb6 z(Pr3kkhNWK6mbbi*}RItq5B@N<35{?&=`8mF>cRYHbHuVqtmX?B1?`P{!Gz@Zh7q{ zV$Q5|!foioy9su?#V+8N#o`TyXYm?-MAvfwvUu;6c~^ErsBQ7R$YxH2SC}<4nCJ}( zsv|8(2%+cS! z+oF4)G(uEI?L`1yhHZKriTQc zSkE5#_Cy?V&u*0l?hR_+D3T2KgS9pAQ{dIHgW$IE)V0gC8o3mPs^-*!k{CbiUAgVz zn&bt1!-bzob@_T{v?NnMxp4u>_Tx4nYsa86Fr(L5g&3%A<(+QbB&?zGd>Pqqa@ZiV zq;n5jalLu}II)|_wX}BNDJ=?b%q6z4Nv!~njgU+~S5Q>a)8$@!;9X64H}GJobQ_I9 zeLz~DoK!BYGn*=(E_l22^;7;G;n|ceq8%!aVvC~;hK1&+1x5zAkm1!(=o6jz5h1Z9 zmNyM^@_wz^1$Y%~3Mg8}iKi!IC$QFEm~X+nyNOq+e_gJ+2h4eN`;O7m$NW zt6;^DFG<=a!oTp)t4Td16xcFmPiE&jUe=UBDU;Vnz*bav)^dMPm%GW7qHuxIVj6~O z$c0uOB!MMg8r(@Lq}Pi}U(Cv8+VU;U__mWqQSLj#nWXO?F&#N!!O41*r*_~Uq875i zcp;S9c#@OeGODujVdxc0khf^eLlKh|6fMX%aqz3;YnNsHv4~;m)XD{Gmw57VI}JX#YUz5x9o< z8gdjzSd9CI%4_lBfdmVgsUkj%DzaU=kBDJ+A(NkO?ICs?O-Nu@n6b7QW!sJM?K#}s z+k-Tx^3^yn=cgvCsVt+TxsAU2p6!G|BDqT7;SdxtN|Y&i3|j%G2cy$WC!sYk+x|m-`<74(?T^-ze%bZI1 z791V+J^Ohtsk}FX@z?9+7V6ML|1JOHjE()Zj~fZw6WL}c1cG^=&9H<=rzvt%MeHiR zn4vIA=6yED5|)~w&`%V3KgY7Xe~mZgYyT7318F2)));&BH1w{v7@8?NZOQlig6VTrlgtOfl%WoUBYR1hYX zu+j{Lu41*!jH#?4iv+1HmX?!vm_v|A$<1^S@IY~*Y3gR+<+)d5yJN92bu_hdJ2k+% zF)>c7uoAc_Vm<1Hw$gZHB(p-Ux-$uZSKsZ?O;ujNL}~G5HFLgPs)5lB(gKlOuY$?e zij-P!&&DY*2DvWML+8sQLif$a5~uUE8ibG&r1PbkxPeYbo z?85K5a$0sVLWsK6A?W@|qc9zU95$jiVjsy&#UV^KQ3Hf|_03|ChG*UCcHSNuzRPbL z+C~E7CJ4D6S^~Uj3zpSsB#y>#B=E-3=KL<<5!$?)=}$Y68bLz&vO*)Yiv80Qv3tN6 zH+z+`wvyS*kfLGA^}%;2!JXT#@`E%rmFTDu`8|_joHW4A^jlqQEYMltC)x;*hMf0& ztPvoFrr=d@5g_KKBpKl%vA|@W(}81=_5n^4Sb_NA4bVPET8NRXPgI(=V!~gKqcgK( zC{4Cr1c~kPnuJp4SdhvJ-gg3<)SMTiN)rKM{Lho2NfK9|nu5y-5?4oS8!)l}8xa9) zM8s%wKv#qcbPG;7IvUp#rKOjc(0y-o`bDOy3ky@7eEEE02M<4S2)yY{#i_N)>sYX2Bm6x-{+5_@MAw-Ai4@fJ1DDoA zdB$bWE?am#o$6FM^UD;`sx7;|>fXkOSIe?Tbc9zww2EsnqFITC`W4y^x8rJ#M>j@- zPMk%rD(*FOmnORjH+;k@-ZA#5xhNGAO^=$_!S`kC%Mo|a*D(VN+ z8^3fITRF9`Gqh7ri`!;y6|#q!IGwpAPx(Xc0rPhAJ>;pblZS6`dQit zn}Yat>O&{WZ4k2nGtGMHnJ$S~ucnLQx?359W22d$w3=Yvo!JIHzxDb6zQzC5N@`)2 zn;N&y_+e~-y6R}9r^G*$L#(P<|)>DtCRi-Cvu+itG9wwnV z9uxt0{CA8k2!W=Q_W19rn-CyQGEJaO^k06&bOkK z?zIubqs|3sIj*0Hr^QxH>0*rMc$B&$?COE_&;!o`JY9mP`HDjgg4tW&JG7VS6}h*M z*SYx%&W;J`$kym3Rup{n5>_FO$8qca$03#o<{%be=5s`}v=L_t*3oTi(~hE01raXd zVmgONaoTZgPqO)e=JoYIzF)p5zB@Q4nby4#!nxrMmD!1bEc?7b42P%88y_pxsUiW; zg<%xTG()dSh=p5}7=pAUY#@~7V|9CDILLgqU607Ro1)sPB0;7dHXT?7d`=XLv|7>X zr6+~XKV`?&!7LD!y!|8r(6ks*i(a4nt!=DsWY`sf$%L|8uvNR5Wuz0Tv~K;)gt8!T zZns{Rln1IVz*3?Ku^jb#@i-Hu9Ca|=T@H))iGXEdSo=DSWI89g#rx=hi$FrgBi4aP zu3)s%x%sOZ@6VR}My_JYMj(q2INo8o;GU)Z8} ztqY{wAjNku+7f->^zzMBoAQxWH)?qop;Le@?lze25o4V|UNr0$p=soF1?OtX{Ftv( znnYvfGL!&kXvQ8&-zCIJrF3XeVX0tWB4Y%|_j6GGpO5^zf>QkXg>JeCbQLSfoJ+{< zwSmW*&5^>5_tVLr6hNHoCy5bFlLLRK#gyp1Puqxs)-qfF7_A}k(zFAk5|fcg60zG8 zKnV&Qgcxykd{rY;MG)s$Vx#m;!K)EjA_$hDy-QH5aY&;GRAk18;gq>PE$+s6CbN@D z9EeEn* zP{j!4e-siVk?fzIi6xB9so$%P3L(iFn84T5ZA?}R=qkN535V~rIPOY8 zU8#ipnlcIf-U^F`b#H*$h$4e1gr;(DhoUsA*8!3&n|HlW!IbenEh8D@dx`DgE*KZNtk~31=oRA+E zV#2BW(rTA*c&&YCwEYdF={Z4zUgAM--X3SxF5Q0kp8I}ZTpb2C`|@Ka`}UW6-QlJ4 z?>>Z84yZkzF-jC3I6%MpAUYFB3uy;apP^$%%%wE7># zxK8z0F{>BiDknbM1Ac^j_gDUi8KQxAn#>%`hOM+i3%L>g`s>EQAr z4!y7G^e_aQqC-sfHUv`<8+!c=-V%SkDfb0i6S#grliVto(W-PRa?`2)Yp*Dzs{5}K zZF6w$Ci-z#8RV@D;^dKrA`|rD9l(!rG012=Trk9;aFdvfW&9y9qv#CXLE{c@L*>T? zu~HtIv7xqNGR1na0}fhE!{S<-`~-tffM3bA)(wD}#wHHNo88dhq6O>h>z9dl zZJs<9abQ6yS|350@nYt6q~sdq!eUe^>>KD<=M7g|rKTH=aS*Y$6Esxu+8!uBc3%hn zriCRh+~vXYoFjXy(}DrIbZ4j0zRJ}EDxmqFDFEzTQNwL?Y95f@d-q}>?= zw5}VIIg8$Hda?#9N7MatLdct=o2;8Aw~ZCCH_gj%Z|CA+uyCAcO^;XkV0n3#q@iiG z-$G%fY2ujg&z>?otI{xI%Qv%2dpZ`}_ElR#S4YaN|LSWuQk(fB>~ddLop*C%tKHRF z$){PR<1yWMzQmZhz0g=_3*c~kBEALY$K}QOxiwP{Hb`x;q`h?D5 z>Qfg%rzv4%YSa<&PM7}44}&p9sB*Yiuio4Q7@Z{4g*B{}n8F?OTNywcokGx9F^Fpw z73J^oS4RvyekV)Wj&bgIzhb}Nw&`Ijial-Y&61+Uw1x?Gnmr`3Khy|bWS`k{KXIAt z7hX%!&SV4^ireG$Fcv0x6_P`qAt9AojZF^J=+n|)>?`r~K~M+w_%EdOhUpk{SRt~> z8|sj)+iE0udbqf@)hLH@W?Qozdurqb=@BIptp_zkOnt3^aq)-Y z&a7nwHRtwP|3<`z4DkM>Q_P!rhKn0>kA=PqD%U^@~lH3)wa(i z6i;FOD-={e%d+sUR%KT+lg)_;i;!4jxWf93uHA8QQfrrj_=N3FH%K0i%v(#0*=weD`VJG`z}F}Cy6qe{x7jYO zeKC$UhRNd*B_B-j%CWajGPp5E9L!<8 zqZT!Hk@<=Lz4TQ}w$>TeS~Zu8IA_p+E~($a!xh+}#({3uAxp6`YMvRbu9l0Y69_1w6B4&;RL2@SC zgYVi9wDpu_yz$xz>{&_$`@>9q95;k6q6{Ty z`Yr|^qe$3y^%v9MhJ0cr2-=Z)C?iy!{9YeIhwx2NRB{w^_Q>SH zcpE4Bs6;R&Dk3)ODhgfQ%p9eVEzM;eIL~+#T#s6oW+PZE-?zG$=Uz ziaJD|shQOoqguyXEB-4k%=6X-5%@{X zfny_VIi&DGVKW_kDyLuc@gU*R7^^vsDB+OC5?xuj(=n{K#W{F$w_I<pg;ZhoZ;^vgqVJG0R#F|{V2_$Vq+{yaF2ehu@ePfG=bsV!V~4rvHNu`44vdhV`HaNEm<%Vgu{|0UQnJb_fu;KgxDM zw-oO$B|87!9M<1Z5CURj`c4wE0A%i+_|V<@+?oZ50Nqxq{K8l1{H1J(^*3x-Mt~Rm zMpZHc{N*=tnemp%{ALB90(84hKT8q)O;rl(&&44B!)hU*Oyri)X1O)uR-6gM`h!Me z21a)$>5qN#chnu*Ut`{XyHJRM@s4E&^q0OZ1kgY6$Ko*Eo|&Kd{=cP9fnIn2;_m*3 z3&HT6vjj@l{xAdtbYx`yiwS?n9s-;De{BH>C>;Cde-Kbw2LiOHfQEhmyZmiu-d0Zi zbY}n7h~Gfuf&d=<&X8}r;g1?W5Kz>3XVM?L;cqSY4MZ-$V}D-;hT9-#1CjtJ1M;M?~6FE0NZ@?Ste zXHf=*+soaaNJgMo?c26s09NKNYH5G70>2|l(%)9;0e>~_mLCWMw<~bh$l%w*_;(KY z4dL-$2^92qe=_LkfNqv7w?_Pt5%h-}{&pY!j>veMx^Nec=^1XbkboNpjs{TQOb`0r z{FLcG*}zKob7cHa2?aps28Le~3V=SA4=Yfe=L){8fo0g=3bc(V-7SX&DD0YaEee`vT^~$L&R-+D+$_M4@WGFM!l}9)| z+V7^^YNea3Dp;)T9mYF@ykVEi?cJBIm(3>yXPisiJcKIw4I?)7=nO*JjE7n9MXgB< zSCuRNb1u#o*DuPxUL<9<6Xwq3j;dFWx6;1sHaq9x)W}Eo_oeDKk$=<7rh3nqIbr-d zcHKjizTX}VZL$-qY!|uU<=ouc$+y$$uHdL)k-VG{lQ4$rJX~KxEDu8t#}nLxPWJ43 z8~h39RT^)CdO#36n^rN2rb+%|gR7$J^Nq|mY(Q(A*~JI<-pSLLba_v0)uEbJlxA?!h=ydG=VOJ5 zBeP!+=qM{_OqkzTfuZhH@TOp_3eyh|Lp*k?nTzi4e&v6l*eXomnj~(iZ_i-XHhQ`F zmCQ+#gSthCiE#1MeR`rYLTUp+X`NpZqd=p0L2lFtMeO2>@^ZNEu8qhN*u?MzyfzFj zH~VuuNAi;ndhTII@^XA_pT4<}QEk4(wE&&-Y2-4j1S&Ni76~DG9!~U2X+o4{Yuq&H zSc^3;3S7m{# zJxRqdr9Ih@nbSa9fKLFDqy*;yV~oH8*HE0$!xk4plgL`(hb^xNO}w@jG;{DZ5XzgL z#?6b=kHEypb;Ew?<9VQWViaz8G<2^EE%n_}Ns4cxLE41BRK?QGuuZif8~Uoz(P5N# z!-pptZ9*d-s!?gl3VT6o7AGb0O^kR${n4gC12k(tJXU$Z>eU3k$gFigTg-BxZ>Wva z00+EIR25Pptg$cWSMJ3ab*}jsgSzE@N7J5lat-nADzX9rhXqo$B+ADXiDLIJnsAYd}VIMn^V&F~96;vP>i@(C$#D ziOKbw4K?@FXC3NhXtA^&HMSH#`1~0%6lQ2L%oc<_mTRQ?dXfPvbQ^iKDDWjyPF!rW z_I2(qERHo!L71t=K}9GcXSuLh>a)Yp=je~<3Kl0kY&giK6@-)DC{fp4-w5FcX5^!4Bp0QV0P*zlF+i&`T z=PTA1a+#cGEEz}AzTc#7wv;bGRO`M98fzi}^J%H2;XjE3UwMKt-In3rho3SKPqAv-gqQzU`(LY&)U_p+(?eXYUY}a ze_xiubQ@-FbJ84o);O%T-o&h{_H9(C61d=qH6$^WSuR^Kku+#qtHnCO&+$=cGX&;z z&1^rLx0eAy{D$i~#9BVSVb8|rZL_%msf!`-bgD2zBtM7J@_i){QgS&l-^)CAzJq6Q z+{!1)st827k<@L_+=md!!mS#yF${ZV3({wFYUwd$pAKhJ-txLJHyA2ps4P(syuc?~ zxIQ9*6wMSS5Jr$E49V~uc7Nr&TxR(h1@`JZvwf>Hq7dbUQUAVhm)FpEvhL&Ov6#wm ze2nefXcgh3>;kenOJS;RW06m&%`c;Ap62*QUY;N@!r72e*pc*q`Y4T^B496xf?=;J z=1ep_bs1DgSWULy>)Dka|XYYB4HN&4|hwJ)_BFN|a0)QyHVpyKB>C=7$tcZ^NoCECHXSzh5X@OVc;81>x1ONz^pg7BJU^WhZ4)CuEkA&ocM*1bT8GF z6^QMXqe!Y$*7Ar=X5y^|ydl?fksl745o%2!X_YGk3@0UC^OcO>)5lF36pzdT?X@jw z5WhwL&}99puw$T687At`F#E6{3DAy96k*q$%2N)YMI4XPk%d1s(YI<#fjnndd-KEb0=)DEjVyzDwSB8XYpamIof=dd4rPKfYEFe+t= zyMFjR&4eSHc$q+}!;vr+MNo6bJ5kNrL~jMIAUNek zwvi66HLUTDMqmh^N;fPTze}lj%ZFyN_X|WRteRW7C(UH{mz19OG`w*GP(J9@KW08+ zj_!F77YnO4*n_FY@PRLCP;}Q&Ul1$2=2Wf3ljfr@H+J`X8i5LDrwJUj;xeQ7L|&|B ziJrnH5kefq35fQa)TH6^ZcKBe_>hGMJ|b)_j%uhlFX z7`#w(-D|UDy)2(&YgG@m&4ekx);vXT+%y5$csB_iepuBB2c+6?@zK2;;^sF%f}6!Ug@88L0u zGc?GR#e%i-sN`WPG{4d84771@t=%>g8G98>XPi^%gd8pv9p_&(uEhQ z_ctXB%Hcj({p-s@*QC<`A41vVdgPbc-jhab%a{6TlQi+P5 z?&OqcM@setbw+j}+8*Z89XC%a!(y-?XpXW3zcRn z)pqd59v2?a^IdpD2C1#$i6WgBS1-sDbB5a5BazkVR6S(E)rhbx+(+nQq%0~w^V(r) zwOg5w=}cZ^i<#zGVt2GDv%Q!q8;kJ8P4D_ZgU~s{hPYEkPZz1Q)@w*NGD=DD5ur__ zqA(+~yXYj;YCqn33V%5Y&3{Q!K2WPDM^bOlDQLL>qoXqyx_G0O@B{eV46@5ieAi3# zS?ooE3b{v_k#jd}?HLpvjC)I8M(Lz3 zRjZzqhV3qVEo*kn!Z_AqI$4u$f1Ezn6F?qBczS@n6XCWmt^{|*y%hcO*gZ>)3Ts5) zuADqxc#4wjwO-kjarz*laf!7IFaH~j98nXyIN!<#WxFHtHl&8ogGLUA_ehZ9=sZ>s zQz3&laQxG=;w6%Y$!-WroE~imG1j}PY`7Ne^yuoH5jCyi21mQLFkkG5dCeR`PfJRF=1R3DrOJHe z+m4r+)|ofr4|@RqWX6%)ol$_6Haxp%F@AbfE=%g5*7D^2qA1(itjSYs{O$Wot(PWe zWd_Z1#g{l_&Bac|O?7>5UxU!q?Tb8(I$;B6w8c0|QVdwjlon{aeG#W*HR~bp4@W`T zpPZ{C-oNknWoqGxL#rKa=FK6PeX@6hZ@Ghk|9UGLcyRy*oS=qRWiGc=$^3QOLz zrhz2k*$v<#zLCDJ1i@xF6g?HNo2&S`fj)n{GOtW-5BxJi^J(bCp2nz zrbOD9uUFVyJ3--FlZP7N?tE2+J{G6blguf6nO|6Ib+ z`mU`2{T?IUU|HNdBF!5wKJ&&m=G$uL#Ngot9&EbPytLqcd`$H(Gm~fszjDuLqO|a6 zJ|cR7t~1^J7`CdiXgN8wBkQo$-|vi~u#jrmR+ZaRY}36!b|hzX7?ClT#u_1h7)D{g zDfjb0j7qiKoH(JeMN|UO<5h|G#*>{@VpP_n)jfI{t*!O&kS9gbMW{j9m9y-R|s^A_}|e3z~Bz@ zyZz`6cDozgqF;A|A7lXA9T{-@ogXDeY(Gkj0F?Fnmw(I*;K9HdUmXMx9lvr1|7KNw13vdJQ*MjVzQN`{JBSYO z)jx62Z@}t)G6g_r|KcEKHb9K+pPZoI0NMRy3eeW!FAid61*o52$eq7;5dF`{-Tx3m z{>hYE6}USX^(O~0-wM?YQ>#FF>hK?gIEJ53(0^nE zfI8=27=aPhnZTJ!#QLPnJ!|)4J^CnFyl5APlF+5>UkukQ>dg5aJtZw zz+<}`<3CXQExvF`v05%M3Oi`f^St57-RgTa5-TfWalSIu<*HsvpVR0n>Vh?$!ji7w z&k~2Yb3FNZ<(=Fz zJuVu!imIp63n_cfG{tQ+9*pEhmNF_^odrVKOkV>9@@>in@}*v+TS|KBM4{00(ILMH z>ZIChu34s59D}AB>o0>%=h*fi;)~a~Kv#EkX2d8{%X((()G}AVGR&7}BuZw}^YS96 z(1&js#S#G;`~{A<_xtN!sbgR54;NF3rBhGe3-hQio#|FR!B<+d$NnOo6W7GMX{`0B znxN@Zq-I;xBlO;WDy>i9J6h)6Pv9YEohT5h`NX`yFIdABj*Y#0`abFPh?^@pV&vCt zl2>j$RIM4r&ks_VH|lw^faYn(tvWk%4=WrGYhkh`(PQ&1B?a&WxF{|Q&$l^DNpD3F z7SGLF&Cylq)xC^&9pLiA24pL3(j9Fkj1M0x(8I=Hw+}snKLd_^q}hH)AtT-R*!Fs_7iUJu8G9&oRPJ8YFoDT zO6?_IQ3AYp3)|y5Xs|%SeIFldx>kK5$0|~50#=zt!hH%9hvb;8WG&&Tk zL}8Hj+`1UAi{iY#}PbE3^<^0YnF;?>leKu8Lo z;9s=Dxuj*owsbTVlcQ;>#moa%6gG`4rXiR>M_b7}(hhaSqg(%ohWe>nE1{y>xjh4!>K8?il z9za0PfQK0Za>$b7llVfQWGyQ=VDWulzK1WV825)$pIIF>%O8C?ljOcADl!hywY!1w zX2pC?IA<=~674ihBY=a@xaw)cifMC2S}`(JosPncSmE;ZG8E=~9wOn3J3P?;Wyz&+ z!-=nz$wRN)kis{0+lW|k1~+<;*O9IZn{d)APt}LAB_3|$%7X?^*U-ytP(E%}89F~w z!q;J>qwOI&(zB(T68SdkAV%1*eWDXa;0r-$_iT{7Q|S|HBiyw0JbFu_;Y zgV1acC7#Wy8|sw9ndJA@b!^6ck0`ajsa5vK{>jl>IXrB|P_7H6)_a~y<>ySiVA(Bg z^9nFp4+9=jzcuokWZ%I;-eKl@vcuCr@s26ys8j=dOB2zv1)pe*vbg`b`j{?_LaM?P zJAxdv_X<*#p`X|izhqhnvV5K{^{Jn7fHM0octY%KpV5pHpD(e;GNq;rN5%t~hnBU9 z5X208frPYLbqOB!!5Tsb2!Etqc-qVQ`DB zqOc4U;FCOzGTpYMb(AeqF!T$Pg4ym3EWD?xxsQ5;9UG$Za>-t_7`t;RQ7M!#21=K! z#H~HkU5VFEi99|L;?d`R@Con|H!DrdV8m{SVn}^H!#*k^cCc*$BiL1eMd{u}8Z>kW!LrnJGn8vp z{v!l}ll$;K&@OyRZM08u&!N(}8tk4*JG$^qw9`J_K8ModYDhL&j-uK=gVJ++>X7H) zk~L;er@+Ozr4q!+mu<=!vVm>aSvGL6oa?e6topU>Jl#GP9g=SmDfkd$B2a^q3eEwT zypQ%N-g#>d-5z`=@ar#gV+D)2ba*JvSzk%hFt|M8TZ$U>zt2?s;w{MpwTCU?2cUk= zOY9xpp6FqIcOmN@{K5#salFR-+FOkS_O{TgL&nTc5VC9q30r9iR~w_YxNzoGJ6;=x zGe!$b{3E<7h;Wf$@}>k2E29+j=z&!08BF3D$?`S~?lvFU=7FZJVaOAojY_QI8~ZF_wzsk=e~4G zj*TQ>pb+5KcP|N2`S7^xNGLV1bLZ;Z0R%sU-YQ`%TYPftjfzVKvKdowN6w`VF83}# z9|LvNT|jmj$xLcNubsY}!jGS7_u6pvd_&TQOh0Zr-AO9$a4cE655Lez zu-go;e@2y&LxJ#sj>#;n`le8Z+$fgcpnhVS*Uok`*b_cJfVbI z9|hQzJ>=4GBRQ=MtaSBEJwAEmNzA7=0D^aMm;}MMJLrQCfS0^A)y14X*olFvsC}W| zD88Gh^r}yV4!#{J+RLU%;A5kR-y+KFakmGS0CpHO>Yk&0wN3TZobqr#2?x3;lfyUCdy7 zI{zU2l4PP$TdtC2|9B-oH~Oww|N9KU=Z|Ux#&?JxfJ@Y)`0{e2lb1LuEMqPN3)U(J zO3;aN^c>aZ1u#Aw%AQkubHzS)LKm!7Nb)QwPF!L8NSLiZN0j~G>wW8DnGZyssTiAe zd%RI)$ktq2t=tFePg4VJKkO2zbF{j zC(#$yvs7U##+fg>r9Zc2o;qWof}?x7$Ak%L>-C@6C$F-zF^b*dzUF=xGd?;cbFjZv zs8*yx=#tea>tuWw9?$8x8ofo3w3TGHS~C@VB-`D@_PUp6 zPq$i#?OSbb!dnvTNdioGTpn1F!HPMF9Q1OA3X~Ia!?8u&vvE|0=o8Pkae5%h8G2-J zcEiJ8xcKmIkZx8W1?$gf>;DC$`x}Z3fY;wJ+`GYd@R}89=5Pm9vjXYc-v{5pYgQm3 z@%ua9VR6)jpw zFVoupg=R6`CZ_^QPaq=tpX>nAH2(q%{MnAX1^sVE-BGcf|_-Z#GhN>qSL073&u9;N%22G%Wap#fyg>iy+7IT8^Eh?HUQrEo~%hv514bC!pT5%*9PKt zZT__wcb5E(a2zYcZvd~pnF2WEZVv#A?rKB;EAhjGyN*G(i}S}?{7p(RE9f_n0^f|d6VAJH2HUrd@h4Bb z(bclj`gJD&(r&-!g#IYD`DI7mi7NiG0Q!dduQmSa2++@g;y(eH3~bEwzW|uqDk`s6 zDiK|H8k+i`Mswf=gn6YjLld?vr@+2~mqev}dhq4s1~PpoT$ga_Ne6`I4vE2{B&NVV zI*(Lo3B~qOgFye7E#>8iyK3FhEVV}c?6swgasm65%3=hQKbmwNirJ{gjsTR|`S#ir z&voe)$8-Z+)DCj&)NAoRTWNcP_bL&v{OzPpU$@&x)viu9w=W5g0p+sS9~xe$qI@F9 z^FCWCUkt5ZzjnZ{iSE~9f~P?Av050QLaF)6)y4IZnyo(#y2|JC5cYb?#LYux!SKvRhsZCezCzAs(t(I5weqsMPOzWa>eBbRO;!#nb;% zd@gB%D|GUa`e(;;=Y`n!sD6`W={6Dh5#ofVgItU0Gsp{vVo}W4vzuW@H4k^+ITeVX z1lmN}M{~kd*KHC`$!=&^1snz+!DhU72DhA>hfLZcaF)BeN2}Bzc9B`tm^{TY(~31f z%VRPQ)A89%o%@)cJpj)n;exBI>I17HiMp@cJG%8TzkW5I2BEF$^$~k_auS4a^=$rg zUQZ1^VFMTp_B`7PT!UJDKE1@l+!^OOiQH^K${}N1-u=wF0znFvr(Yf~x)_kYXj5cn zUq$Ig_Y(ykQvD_9yUh%^o131~yAe@?W$hY+HONnAdpr<6GTR`1oLh}mDr9(kE=R`P}IOzFTZG33&n!WTw; zc`s!=)K)0K)&fsen&n;RF#Vp<^cB=QFx@o?IQ@k@45Op9>0rnJ+*}eX)y;iX6v<(g z^-;|iwmDi!Y2qSPrQ1Z$n6~3}MnHtm{6BgzgcPu>j72wAQYoivcp%h5Xy}6Rt$tG0 z@q1r;M0!;21}7JCVfO^i@R1RTO0i(@1NGweQqj7IXQkCbh~6At4<^SrLL6!$m<_~B zdW#vE_pysYK0hYq2^0I!VGL^b;F>_exfmZYDwH^|sqsjs${5la3q~fN3-SrCw~KvP zfv8|y7Ma)w4%w`nc{#C|T_>YisS#YvW*V_}-7JSI@L|LeS0UvEe5{T(b78Xw_3`?Y zT6xr_h15%e0nC^q!{=skJ>_L=_mtX=&rLkvbD}u1G~6RUPd?NLhH|XROci?)k4wf! zVZL5StOU)h+S=Oh_AEfBr=7)~R zXN4FDG46{62XLb6g8J^Q1I6a0(RSXtc%1x$z6L_f`v@J(cHU{|eQ$NdS8$-vf%dh5 z2E~bi1{*&3eY#WZi5-?->@s@GmtwZC2)bHb;|*dn*?1m^bwk@I7UJ7|reOPHaz#?I zMA+gG0}qqc7$SUovUb5l-(p__536OIP&v)kc2HKxzSzJg`;35*0#^Ecv7&m7W^GRc zKj02g(EAvH`y+dj*a6%hS0jj;Z*n0fx|cuFmAi*}ncwgY!3;F{5t^{^DM(ie4+@4_ zK@=u%*+K;#iJZO}BS0Zg0b-difL8=JMKtqp-(VD~Fvr;T!8o2?!>olJJA#aD6Sw(U zvG$jo*h5||c2tHRJhpb-okJHB4nrk!;hT-*$~On?)u%tCmUb#3o(CMZMs zt9k~(!<*tPYfdwY_nCQ~#YqYWQxuo>M}(>;l#*9c8<&D2&VdJ3ow(At{iAJO(uDWd z=M*<|C}zus+m5+qHhwq{j%=Bq?t!M#1^SAg_1l9Bw$Lpq9?|osD|hC zwJ?FLoLB==EggacN<<^;eoB!vsvdv(3I&z2WO?uJ*Go%HO=MMWXssDAKjtu0m>T!3?R8I>nJ}3kZ@BQ1gUr5BO!u&l zmBXeW(}(1s8b67ELu80 z57HrcD(NXknh|i!@(qheidi2=PmLA(BK$T&xG6%{F3#Mmq@@P-Kt|Ns$dnjXQI}sS zQcOw{{GJNMb^u%R@pNDPsAo*lvqZK-1mP!%S$%J?1xcpnaY7|H`GH-$QQ{M5AjG~e z<`RmE_^3G1j;zAgn0<3yp2zW`agk(dv{fdNAIsjlT}Gw4Q9>qu4;cGcK@{Z(JKaX!NOi`dbB?vxuFeR1#(by0Jp^={6K@$3Rc)T~ z*aOwP(V`Cpa+}I+I%sTm>ohf$O41Yt#6z5C3^R`ME4rgtrdQ!6;W6$MIbI1pV|fCQ zx#4}CC+eyn+=XH3NZD$V_km(j#5|;=T%W&q*&TK z#GKAz-K8E;<2XUAt*=aaxxA#9x*^S--`3l9ewN!J6&R;B!I;(41`iYW_#cJ}NeSDj|OX00*-}pv}2yCx-?7CWF7pq;S zt0w=o@{Bbs6cb`o!Ni`Y+Tw13!NzcuZ(wLKtlNur)`B;mm{V+oYUjK;|FGSFn03l0 zmF53bn%O*nbqa;PU7bNyaG0mU{@ydDdQ+}C6Kkxd(XS+LXGk^UPalhHf1No2LtuuaEtgv$1=D67wuW{sampOOhBA&J5Fk>Z@MP$9mM_}zQ^#_q?-Q|_}(45afhD$z})U0 z@bBLFfw?jKz})U0HE%zW8Uon;06E?N6!+{|@nD{0)G@cN+kSf^R|=w}J(?h3mf}vH#YB-vB>;w}A0S66#OY`%HhX z*Z;S6{04O6yB$D|@^^0lDawF%0A-20jrzx?{I@pzHTwOxG0^WeFfjk&jXN8Fa`AuY zkDuX{|6$(gcN>6C#NSdHL3biJ48Y#}RY&9BuETG@VZYlz_Z|BMP6qv5bAW&7iQf<= zzga-f_Cw$W^ldlL{W-n#->$-Mh?L)L0Gbhe_r#qI^mmPZ{|O?__;a-UPhcA(6WyP{ zHnku60nuwo2Fhg|k#^1n5w;E&Q7}Pl0lomr6lXh>dllkX% z8LIo`wT?60R6RXAH+$4TmKh~iU|j8Vb+wlSqqD8O-$&}|f2|$P?B5)h=i%sSv3@Ys zKybaE*;Qb7lOkP3XiU%$;7~s#Z`hD8+WGhh%JuqWDcuRc6f5owGy@62NqY{fvjd(1m-|x}xn`U?-;4Bxgo4ELV>(vCGZrbW^Kt zRq1pFs~jDXMtkCsptiKqy!MWV5=i>#C11gC%4ksKzPeoa`i@edECC+xX({lKt_ih= zV@n}y221Xs9%i4PUc?rp2=7$ySVgwfEi0TGp(!(;^iHDc$ysUHvnw;n`#IyL*{_(g z?p!|@8&VM~&ORgbg7_hZVok?wi;eHrqg$!qJaoo+XJFQuqM zJJa`pExS0GT;B&^H;-)1Zkut(lO$GBZSM}^1 z(`q^Fdy(RDF)d}6V{h>Hb1%1^y%58k77ha^FR+144zTOhRYS8G%$YG_2P1r+W+^ZP$mkt( z1SHvkx_6^xnQbyObu`JZzP!U1r&?t;vw$TTDvyFU@>Ry0BzH}J3p)3Z5cTk`kxFJw zqZjS(M`!VOgTSq&Xmx3_cT`8p4n$5yvxu6 zo4HLVb)R>0!#%B7)-K%D1#GNqsZ#a>6qOgYU7!kH3ua<(8SrAmYqL|6vzQWspoXuhkHf%s&jxKGPr>?Yb?+;~Z!G}##m9nmzAk+=F($))k-wGP|3SW7zJS(AkurS7NN|Q&XITZV8 zoKCZkDww&)plpxkOqqB)S0g*)qx_ZjvEE?f3;M7`_YD3bv@)LtG5y1tj1lCIJ^R`g z@1MJE@wkgFB+5@Va}}4yU7BqZ*&d|85+DfZaGJ!L**jrS<_;%Q{VhJ#^+~p0)`wz7|e#Pv;Z0I?*qHhL2OEv#j`|ZfQiUI>Z=5n{hZDr zFxpb}g^#cipH&8?X=yTM3rQIfy9~TGsEmj#3u+)n8D(=gB_Jj%T`eB|h5x%QKSa0yqPEi3dNxDDX+rk^SbXV6rt@YF~;-9q_GevDeKae1!Yej9}BDDxH-Jud~|x40#ATk{TVVK zK0}Q_N033hXv}8>Qf#RSX=vFnJLl}Oc`M~J92n{|*bJ&Xi4tbW>+ZD@xBm@|52ThTDi}1UEmqEzL+tX}OWTV-cx)kkKGuso zrJx)N!y&#_KZ13g3v(PVW@>mjqK7L>OcQ(df}66ZWK18VVG`-SCN*1@zNCotQ26UB zT$|Tpd(v(R(;L zn1E|u^kR%ONJ>EMnXpi!J#|5i)r{Eq)KlSXQ^-9BDEBRshzHzc81dt|^j=?mwRg%m zo>}QzujNU?2=FAQ?$FR2G(DqNKW0*|s6d8Dg&d2_+gq2NDk*_nlv7bLX!YBzQ)O&K zH!FLl`D7>I1Tz&acT~hJWs7+o zW7vEw;1wm_CBQOT_ErmzhYPjDV3kAPjBK9FGK{O_O89hagFvx#b%sVUNzz;>-tn#PfHYA6f?JN>oG7 z*iF3On?QtUj72EV;Mp-X8x_Pd#Vd2=M#CJK%C8_%!pGm5@9mzcH0@4>HecE7Zm zodg26Xlp*OUBs>zu$&&T=C}KvGR~mTZ{o>5Iia3>eEjRvxO8<#SWrU1FUPM?l zH-71x$#`yoXYCw))%qhxBN-Bw(=UfInOQ&RY@Vcbys=*28es0vQdSt$!IweFXJ28H z{D@<2Fxy2oojN`N%Ytgxt3wv@ZmbE(9<|`Ar_x<{80qx}{7~5YtFKv#I1Nk9+M?hl zQZ+R96A$4ypj`}Vn_^Y!n*2gmi}bJ`9}N5L(-#yPyolA%R$A@hS`rym^AS};JvJWd z8tbmgIXA~+vmMi|i06=MIy1&f)ChOx!g~3xHTRJoA)>skbrye>U54IZ4ST#3K?ZkN z5SAt&?XM3>VpD<|XIp{_Z!_B?Sh@`RUaj6OQ0v@ac3gH=FIH!RoNF$#LI#g{(Ba5I;U(mbXT*#cWd=Cuk?e8o~jx>R##|V?~$8+plg& z#h<^f=;*==z0hHkKnRm>q}$WP0{$_eiTx=B3-~>R7G0k7Ko2GCoWZ9Tc=Z4;Q%Qtm z%X$QDPi=YXr$CgwR^8M}1fnc95M_&GFF&Q^15wrhh_XvSl%)rvEZ!ecmY!TV5M0b$ zOhn~jSjuwr1JX7ideghX-M#6j@(>8=(GTLZWF9;Wqm>TKVxkLNFOF^-k*Dv=%`@Ph zzU-*2GkW_%ApGHwbvH4!a3Hxn9;&08&IQUY^}(TcsquLOD%?v>$l!UL7X3s%u>*t@ zP~US?s6HYxd+31}1C%&>X!;J2PcNsZ;#$ndnQqWF`|-Lw^6~Yfkk7)#cmbKCFu3-q z6^w#$>aVC+zDgzH#AaOen=G=JV8xm~Np!Dr|1q=Ju*e>QHVBycz!f$A&=ob#kW9xz zA0@#My3kC4X-KR}=vBrDuc3bXB2wnPp3+fEEO`d_%5~4Sw`f!##_lCC_{c0~zy*B_ zs8)NemWSTKW2>uLHq$H-aZy%Xj@J!+Jvm>`iCK0(atE%hrdvb?mmNJfoBg<0UuB=B z&PVj_&7ly~n&qL7c0I2d0YhU?m3`{o%$q~`k=dcbsJOLxaye&%2Nde|PQuYX92HW$ z&+EBCuVqgLW8*n0^VbO5icKdrOasm+uY6A9!(R`@NkDKy?}dVs`c+Na?T`hh_uop0IKDp!*2==vS!U~Ia>e+Xg4(s8Z zGts`DAblspAYI^)laf}pWp|| zuiSER6*)eOp1;+8i5I1&f)v+gcyTB|9xTEZKWc~dmUHq=t zXY4EQ2kHlLG;){;2N#(LlC^uPl4SCoKWNfI#D7xkQXvTt)xrY`fp7b*I%( z?MkN-gqUM)zVB;`i;H)#C$rTx7M+@F5e;K~(3+9LyUq+Po$qFcRI*Raq&~BYR?D;4 zUj~?VR=Y|PVRI2a;C=LYPXM5FO0K&ZPE+YLq0ddB#D@ zqo`bA@s;{04O$ibTb(kSU}$ak7?{&X^~7qG(IqX!h;(F()IP5cS0hMdS>wd1=f%+P zf97~j8#dxCyhaRhyx5*&%=U<=&Zf4ptK`47OcK!oVAPmaP!56eP$k;N$ z@Ex*|Mzz;goNhuJLFcyU1>@&-V9!Doz~by%^HplKTi4w*<5~Y7cW)UT$C70WTb3nD z7E2a0Gcz+-%*@QpY%xm~Go!`K%*@Qp%>0$zeW!2t^z_X4UjKQcwNe=wDn*{E%#2!R z?;ZPKMpZ&-+K66!!3s)u>9xRs9w^*EEC4HSc(mqeA6r=n?gkRTg9u+@LgLGVpqN?d zTl6kNL~2n?g~D+)^pl3%Vm?7i)-ckn+%o3r`&7PA(@U<10X2}gfr!rROlWm1)uNlT zgNR=546@W)YN$tFlokmx6B?`Zg~vHhOeexHXD4pSa<8$}ccizJ1%86D&zH#JG6Yfh z~dx#hO4Y5;PJhi4uOKcUR1?+Y&m*g-tR zXcc|4-<_(4Y9!St;m*gXOCNPUHzn3npXBxF6k3}zlAP(roG^*cAHOhRgAE+m<9w*J zoO|TqX%zt{3IYZaK)PqP!O5&oXRnCfk7yEd7OAP(+-rYH4F6linepF&zW*(jUqyI-ofm+%{^1wP{M)b< z5Y>Ml%fADG|642o`|7`9o`03S{xa77N6V1^3VUVzcOdcq5ew6=;;+BO+4KN4@UPm< z|L7O;U&it8K;!=w2lF3}A%BenK;8Y%SOLcWJWc%nXD0p@2Y?;=>$Ul<&}IUN`Tt%o z|6hI{{|;RKZ*c(Fp}$-gfbljC(=Xxp|Lm#xcOdhBivqw8{q?E&%iZx?JpMm=V*ZTI z|DSR-e~Saa5&dyhe&40Pl;gkd+W-E^{WFvKuUG=<_< ze?$pW&k3WY$Y=*Z@Vq9iM>kf3=PeqsQKpQChLjtc1>(w{ul?QYZxt`(tL-7uXHuN^ zQmq;11T}U=d6E=6(VlNt+p=pfPuJb|+(*0n?;N>zla0No2(eNWp03KPvYwl7cU;Vs zMT4fu1*uFQ*944^V^Urb4{?Vmo0P_&?SJ@x#@dxgIJ}(hz8{yRmZi+_{5V;C$77!M z$ky)u^mHMNdm;?<-bvje?mZuPrSkT{i}A&i;9jJ`@@mHhnq(u z^KHg5>W;rh$o|?|?mWWXw)6WGWW{S$GfDxPS`4pnCNI<+4^}V#9SvYYo0ZdTP$G6?FT$NHA1uWuXj!0@|dQXr~ z#cR{ai0$r;CPBpmmYt|a@H(>C1EE5v6yWl^ouQTpZaGA1Mo;{fA4I_iUz4|^GY2lD zyX&rGc3XoFfa@Ma8taEHj2@Eq>aHvkS24sPOdNd&PXmf7){Db5fLrg6g`TPX^5dAz z#IMhgr(9E(mfx>%;$n-LmyUWr)e{NHf;W?0=mq9dhkcsPB&%7o4Goa+B9(h~ix}`z zVEc^y93&1et-_Wqc{Ft&ug1WY4H1f{4rWSP4n=sRDbh>I2rx_7)bkuhox!}bY~sGTxoQ}#?CeZ@j@T0rmE z1p$R)ynS!>;8E__sgyv!%d9oJJQL`9;1K$E!6&dH$q&FPrSKf?5)8Gjq&`1us8jcp zRDxSCiQv@UL7fjrO!XO(A;nbMRcVR|yR&PUJ}x=O3F=Lx@oy z+Hd+$d7b!aj15aV%gA)NFvgso-LorHv!ISWXqY)JowIevc+RW9JD{n~(dPA7>s+0s zwWqvy7EYPR$*x&<0i|RrVP0s4s}L%osG@|~wi74EUt;@xyziMisUda@Am*&B&UFnh zRFb7=-U=?gcDfcIr*hFnxTzvuE22FMmPmc(oUES;W#0~dGc66I;W!LVBTUnkr?xeC z&A%TP;TD}EDD{mBf9?dG(9*h$TSG(rk+}r~l5R)abv45@Enzv&?nPa1hcn=xR0rXTx_dT*l48=#a_^RXHrRnGHKSAwGjx$k z>=<9b8`5W7)Di)WRDCEl#y_J&tA+ z>8LT0qy&fs-gUtwbC{#-2CXIjyE=(W1blJAhGCWljcH1+rLV`D<#|`E-X;E5B2sdc zwA+(fGgZ>z97DFq=JPyu3q@S_s3sT?X07G$9WbFgV_}ahm!AXXItsV90NaBMe{c~| zu`&UAnIvVCq_1K3bBfWS!}~J}=s1OZ3WrRe!Sg%UzTO!U2>6sR=!wdKKyNzav8A1T zl|5KE6Th9Pa5bu>k3-To#Z;WA2klib6>-WBQ&|%ARS4qawKv^XDu*hJ)Vwdggo}#2 z16D57k^f<5uU!G=n^V<@*fd8sMcZKi)bV*#_*fCsmoEOOxAT38nJf5%X6{X@cY;tLOX4lzCmnlWuX5gQQM1Is+- z#0J^CZFW|85T`fUO4n(80Q^z&30Tj;qwZxGj~frRZ7T9LQ*4L}q3HNaeRzxuo2j2a zuxZ5S2;&wLKSZ;hMN>{$ZtfS^{U}t43o5yS#?)8jDB#aE@O149wD@0aqw}yXb(|S9 z9Av4B+#GLy7SBfY1`n{g5+#CL21x zE3Wu=Kuj=g5XuNU1E~fk91uBo9*?9|V(&eK<3qs3hWo=udAP!RAlQ zHvxs}C2;JvEmL(ANGvq+16T~x@GSEr78?2mn+l<1THruR6aVfFX2So~4F0*OAOQwI z75zG~P`Vg2S2kzDXh=AnbZY%+3gNK6nhGW6>tPwW3MJ~+VwE%Fh_7(N1(NHlo9(bk zsoH^-+^>Yte^4MNLP%Rq75`e~dxJmp!GteK09~5shhglu890NF6bQnx-)c||;2i`2 z{W3(8hOvV)KnC!oS>jPP0!glEP4=gOY+m~!-MK?T-9-`KK{c@{p(cMKqYWu|eKlyx zC*{ceb`r3wUVGwA$J+#M0B->pC`E=yggr|$)3DQd|+GWt{5XYGJ&I=T;z^$UQ%*_$^-yLvPmr%gu(S{y8Ya zK&4|{d6AJV7bKiY^-Qf-8G*4FydzUd#%Z{?)`z{eL-oQF5fLdUuLl~w<3)26u0kZ@ zwJStK$b{g>r_YksjcB;!#anNuv+~s8n6^Izx@wix@C}kTi;KkVTt$TF7(c~_eE@J| z2clHd`T7KMf%*i~0e~%EKUdm?F4}|<^*fBGh|rQl)s@9-6eHcHh~l&aQ`M2B9?r2H zooZFIl`Ag!TRwMm7_3ALMfPHk<-(Z4@|F1~5yKGxsrWfQTz@Gx{DVS{xjkfU2%m7V z5<3BYQsFLLp;Y9cNLKiuNIvwSNH$~h5iV+HC?~23XOzC*1ptcf*U$Ynu7MIb=+Sxr zz@qySGbi=-)N>c{#+Z&TT@yn)G&Vg$O%(981yiz+^ z1t!>9AtLlj8*7qmc;L-ciC$+nTZccy66q#dgB`gkB@JraB|)-HHwCR{y-lT%KS~1J z1ODs8VRmXHz%$?msl|>CmV8O>Ke8e3I;8s=DPwty8uXe_4UT9U%h^|4a%p95`f>_P z6Z?~dnPNs=Th_ekURgGl=M})~)0)UWEH}`niqH=M%(at9>ZL&o5r$&PSea#t0wYP} z$hKAvcv7T^EKi`30Z*6=Tx{_6nRWA+I-6v3w;w(P0$>tCi1^+Mn1n*5XCOlL0h3Tt zzDWSIF+#HryOITaws@*z5WR)!a8EdTh46WwS~aHWw)1k^Ef$C8uA? zb*X|0v0gF+zh#9cKr^1;q@Y(G6W=?auGUc$#&?Wxc&Q7vw9x+SI#YIt0shFQtHhs& z!B(DD@UGOid8qd%6-&5r(J8_gy9+|<9){LSm1)>Iw|v@<`AUh_uQ#b(>6Weqh{>|j zx>-{lVHC>pykD*4X#>;sxNJlDjurR0T{!{{3K`i-@i{GgCE0vF34c*BX!-W7R7t}% zbe2=iVE!w}p52%URrh|6TpXcAMj`&bE?c#Q*~VSedAQ{9$l1AoJcx4ZC*|0+GsV*J zYBaHej@wCoAaS+Vi#4DTS&PTw4<`B5KGk(s$O|KpA?IYp4n^t15Oaov&@d78c7i}b|EB1BiGP-n?_05Jydg^h)w8J47J07!w<(Npq4|0u? z0^9k*qD)sBEBmP_Ge#zRJBW6!^=#-0ILOxLPHh#-ABi)d&YJO)kgEAB@i0*tx)4Vj z?l4+tHOSU4&X=p_v7Bxe?N_K94xaYn ztK5*KH502S2rS2bIGhhlI9ggI#8Y>-N+OEzKA~uN z7?UBR)-1d{L92R~LmM2)co&?>AL_KMV3YowrAInl0b$c~!{)oWb2X%TWf5}w4~ zp!Z|8p!Ylua31C514g-{x374( zxrb{-9-yjQz@UzBQ#h3`?E(uC72TU7Whafnyy8+03jXvb4Oq)M_m<{m?@S=v+$Sey zwyxuB`!ya9&d>9s%FWAHR>c|F>tR!dPP;nA8;jcNOPHYPS z<1kAp+YVA`HW}uiRDCzF)Y%tE;%{ zEWRR%iw<=MV!Z5;EoYc1{k*7w(F-d`SdP4JIjm@X`4}y)cQDFFO?%kT>fZ9INt*Hw z=-rOLPptZaQ@f=3*2L>;chN+?i_lW=H1V7e!=-_gcGP!1tEX9dJ7TV@^KtLP`Nh>l zs9S&&M0rpKRLjjwCA$oRc70O?cijE_q6qSq9hRVoam@WhpjT^TnH+YDau<`w3IbZc zULeq|X!u??Vyk(yYonN}LmPkV7GrDQ#--RXV(iTE_fnbiF{i@$>0fT!7to*-YtR)Khk5&0Kz4<&dD6Dd_D86+{CimM>X^g=Cc@>j7^6>*_w zD&PEiSJe1{RK0^}l;y<^Dn4gO=t8MxFr?Zli`k+g>LgF-J;ZA)`5xg0y7O-ASM!d= zd2ylkB+>6u))5>)wsd@oFtVj&wItF?-f=>fHE)CT(*~8E*O`e*+A6DMj=wz(;a%!x zLh=tex!|m2%?ent^L6yM*5s$CwU)c*E!P=Lcla93!GOq>(;rKFNz4Q-iR+#k{iXIi zOzumU{iAw6zjLvBEZ+Ex7NZXc_me&@uB*Mw{$0a0nQ@=fYWL0TOGwtptGECAc!^b< z3Q^i%Z3+9{rz*+Q#e>+N!!2AQnbQs2VbzRQB=%(L&vlZ;*L?cpvTZJq+#|us9X!+LKuf) z$_zS~xL{h;`j57o;fCRpU)krddLJq|>vsZEnHT2r_Q7L{EOkVLr^usfE4^MM>Cm`a z23id(-j8aX^d1!j4n0ibpT9lyLU9i~M(?EWsfI+ccY`kFbLK#@lo_!_owDxD99k`D z(Y=47WuCU%!N!uJSX(I&dKXl0^|NtQsyHSmf71_p)ubH@pjUp1hgDK;5!8DU&-16@ z%M2`ddeTm~DO0F}x)hICN4vC+2gn^P3T7|Z1p*|6KeKTKPg^l!w(+a)vmi5o#0x zQ*#~qIN z@pOB1r!}3Hh#>B|ozHG@hR-ukLDrVmRf<6RkY6W)Dp5NqS;K{nWI+Wm4~T0SOR~#B zJjH=FDm8|KwS*K9q@(0Ocuc=CH@salWHhRb6+H9%GZfOz7Qc z!H~2Jqsnp8>6h0HJzR4@VHeDOp^h`|*%0hFu*-&X4(j6qi4qLzGYiycj3l^Crp)j` zX$}ck-qI3DO&n*$s2IqQznhAIf!QWuLE>T5v0w=aY~?VoQcy_O4~<6$%K(}&^!pHh z)gb3*Y7>?~m+IbBXr$@y#Ly~EV-E~arasx zFAP5QFMJA9m}(MkZU-{3S2?fiokFo#VJBh7|4yq&jiPrOLdz3_0-OsR26W^@J6D1N zT=SPE4|y=H4&($hO};c?-vG8OK;-V0YxlGvK9_#5YB`-XQm1HiMo3`U)bPB z-7mP4#Nf2GKlpzgJdw!dW^u>~WUt7bMEl4^$re)68-5 zB)Vz_7*XD0O)|=Vw@ANhpv3kS@4ypt_?+Ta{;ZMpRgRl&#K_HHe(dbkGF*wYGQhqr z(CMB&-nkFYk`=R13m;ddNoZHhU~t^6_o{Uf{;l0;T>Kt)e}BkmX+9+^Wy#G=A>i5B zvgn}N(=;xbTkKi2#SF&)fAQFa$3=7WrIl~sZb0@D004e5-LRH zvsD9#c@2EPqinr*(rDFDBBFKm?esQ8EXk6#Cge6EJGz@S`t)hK<$Rv`)2p^h1A@6` zr@h!D{eo&q+gP%;ZH}E7llHm|S5!T#1I=Bm1f?DY=1)$o>a8i6(v5w^-f|XgNlE@0 z>ozZ%1#<&tOY-*Kp|sOcMMtaF6bZ$%u+^b)N(3?*t{}Loi>X1~QKJ<-423YQTK$vz z9Bg&XbjroWHSOam?wA$P1AAVStZWDdcSIbDH>_Tczp^6-Q+gX5lN88NY?3~;> z)Y*9i&mKMfL~AA{Jd_{>ThQLJ>A<#xd((L=$!WGwJ&st**Y#0({ZdJ_SmSPqC(oZk z6mSPj$;%G2kx?kzR0-tOCc}_x%m2(EGmZOtA}>>1qo}8gSSyMM*m6S9+$XcM=ay9f zaC$cxr@4S4!ckS_5?oP-skpe3V)&7wjzX~|r=ql;qhVad8JyQfBTsr7xhaomRkorD zlLTN4H8NA4@LxwVrVurGrdmbWrdlT1rt8Lvu`^@}U(X=IU(m7(f9h-({=CIf)(H=1 z1i=tx>?IWC7POwX3vs9!NJWrQoJ$Pf=MZBV+p7Ih4nuARtLou#;V=%mC^Egc5yOM3 zTrLtjXefx9$!bzy9wAMHuF~*1InMuCRPD=s92sCE0&I0(&(IaR#OojpH)8xy%`b5^?5RJYlY>8)mOC<#~$rLukvm8=sRW)soPC4?6u(4kC1k#BK(8r0Vz8kGg z#P5?V`tQ>%MsAN(F!X=E0(>!P;H-a1rFCuGl{bMm`ck^PPLa}Ei!|RkgwQ1#L+lqv zA_+z=kqWE0WXq>qm~xSFDjAoMTJb{%5+1Z8OlD8I`pU0jnDcYFh9p=s;huR#L*2g1 zHe1~#q#ZQ3j!Y#Sf?mRv8Kg4{>#f}$lz zAMCFHEAslGJTiV&^tGIS{rCyUQAw4XSmpPMJV=sXEAsdhE6YmK(^X0p9kt0*Fe{s# z$*;Z+qMeHN->egDj61pA&ui~s8HDLP-#lJrgig86Kdi@dxipjF&RSj=P;O`xh%b1) z&hKJ-Exm=GpX2S^|FC;j+rCblk##n>ixL=sdVe_$r1W~YEf~J%J~%CS*R=Mqx3uf~ zv@6pSnXqc{=yl=wni{XHUbQ@0ROs&uGr2gLYv4uP1YyfN&!@~jDJYAjzXKyt(4R1T zKMoqU*vU=J?Q=EgWlOJk#wQl{sYts%VLX8wB5O;lESRo0v%^i-?QtJeYDCUe z*QvAwEXxh{3f?|Jdd)#9Ju?0whj1>B7+b4qPu5Bn$`u%d6LdKmu?`#L1-t1J>GPW_JGcIgaRm39!jl1hF3EE=*Kwm) z!`6^B#mQ$~b*=Qxr!KQOwXVqHIYhPcqu>k=P3B>S2>tAG-96gpnjvSRR{goqL0W|K z1!v^e=m=~i$0YORjmX4#<+R=GGV|4KSRR`g%OLF5KoWImH%!s5MV)HI7+aRHke<3( zcH)7npy&<>EO)^S(DRR=mBq;YNZjgku@0gqwnY&aJ95yRH`M87gC#DiqZJ7x}ZnF2;J z=|eNDp^NAVo-6fCNfu=DClKDQtN?^FbP@I+<{xKEYz1q1tSzc}n#EA_ex&hql>|~b zLqzB*-Yuv)OyC9E*gm_<*hu9G;lLZW;f@Lz=w_k%)@ZlX*G;IeaBZ4erP}_K)^nW( z`hdPw7?krP3cqT?exNwccI=q17J41PXDY9MVkJAV4lyB#7#H?~Yz_Gg&ZWd| zNp#(WG`6h3Hd?!zg?rSiT{}9=ZeK?~KNM&{uS~Wt8@`WCtEJ_=rWvXmIz~VtjBCvt zuPKOu`8jeud2wq<>-!2-sjTZ&%`(t-%j9eNLho8*Rec84v>or$ox8vmKfFg4X;t0y zsL)htHIT8gH}u>`D2^yaCr<#OseOYzA-&!?Et2DLboZ&S%VK+NQJHD34+C zjc@$>)UHGZ$@PbrAM%D!v51i}p z*9U3kIDHWxtWMEG19Jn@lgL$Bz0|LTTpu!Q!4kYi{PxBh20-ywI+dNAhSBrdr2?UKqh?ZC6OlyF^V+0>oBIFW zg=|AkvHTiWT-reou{-Ieq91jOWR;nA0Wzz@Fy$u zFZn5eUSylacLvocis|=RaU1}DR7kbK8)K16zo*rBxS3ohxO0)UKfW$nm@v|;t{b1+ zO5jQeeRoYYNk6;HItkV|Nh5b--wZ>D*o2%iOyyM_YnNdT1uh>9@TqC7b^J~*l4b*H zLO(_Tc(b`zOJSVR{=z}*?6Jh{^?_1M*& zAoW(H|#=BF@-H_Nm-U0@O*5ih6%5-G9ZSz2Mj39p9| zNm~vG;$^Ib64|x@mff!dGO=6suE7B`ii!jeehOc3#>GFF9HCBix3N%SJkiw+9zm>S zD`=r0pFYDkEiNK2_u_lVXmZRmLyq=)WNA5eQ#p>tX{4bA6hfJyM8!iq&e7n6Geg43 zx>=$`F)>4mY(oLg6970*ca(974$sjFjX+Be%f6h@sHrP4ThKw&pK6i-U7>w_{^Vvsb*2$&wQFiIw^U!{&e z4U@HBk?*l(6u*)bXz4K|wQu*#xzK>BVzTh6BZho)pIjXeh4=fW$2g z5XUHosC z7p}DlaVoguHb-|0>Rv>+;s(i;Qj^nZ1bKpoEP|o+v3)>r>Eo|m_;;{6+~9H87afNmYWC<;q!*zphNn?kfd4{zhay2xL~b;Y zI?+8>UtC5t_%$jTKVUA9?h}rncu5@J%Vk)tuOsL@tm_S{X&cjGm=}%;_lswX`StErb5$WaiQAiGG1@| z`?*k^gi0VUDdL-uFe{mtBFEywj-H(2K#!aM?@ zm`Ub7S-nA<7c8YjCg1jc#61W8cbSbJ730et@4dnf1nl)U@2@GBDX398@RE)2kv(yQ;SV;*r(l`t}v(@RiLY_u1 zc56j9ms_=Vo4#4i8^Xh%?j*7Kj#L8Q9JK2ib@%L)~&^Yf6O&d@%I5>c4-HDt+ zSzJL`Jz{6oY`dDGJZ&z1#yU(Nlao-UpPFbOPED{_pobPeZ!n0MUSe+6mo(>Zxz>#n zFFHPA;*?9|&d7+f+4}JW+;mxttH`J4QtZ@AfWJs`dU6o4-IVu@ID5N?e@RV3ceLlb z%54Tjomx=Ji0S)?wZYss5LjZYsrFixxiP~u3jFG$raTp5D3Mg>f&O}?;c9AtuU+!U z&*M245bo;*LkrcIj5+sUmurdk6}=)K^Kd7PrOW=yPc=3|Luaw1rhaD(EGHjPZOg?N z3QZspqwWHzk6vYRO3iBU58H#`C7L)izY(^EpJ|9PJfo9OVySkG_^SIF}GSd9d_xn zCCrG<7OPYF2$Q|}L@%Y}9MsC2u5$kKbCjoSDVO@qY@6j|mv3LZ-ab!T4JZE7bnZWk z@Bf#ibH7(|{A(KUx0%-er4{?{bdKql+Ymsx{mbI|KWx7NX7K-DuKe5C_@DVZGyPd+ z|1Xm}CKj5%PwvzK$z9`LlRGsv-NP@RfH>CDJS25-us8IX!76~N9=&jK2}HlDaIV@_ zA^=x%9;D|)3tZZY=KgHylsU>6j__($i>FN6LR-~@p;{Jq6SUzNz04%&X{evpQ)8pZ_4SN?RLF(O^L~Y0*680in z%Bxk|_x|C!<{Wq1s0{h_;czIit&msa82fJ7<8rE&p5VwY4c~K1szc^Q_=V$w`1ahJ z+Y)slgPI|ht0dK{3yFd>i*#cr6r%06}kf3g7dACoYR*z4iWy zW@_fi@}RZc>V{oItI^9t&iiWawv()oUowK#pKTQEJMa@tq#a3e)li$Y1jH*Dbm))g zT3%`3P`M?iNIiB5aBFjCE9DyO>phjGDkGw_e2@M5gH^2Q9o`3JwF_w2FFPb?Wsa@MZSj3(Trd`r~Ttdlv(WIn#d>|Hy$T zd{WkJq`ZJDzokj7YeJ*45{n2wOBW;3+bL`KQYBEc0l5t3zb9671GhAU5$awu~ zyAm*UBb?pV3NRPg=<46qf8#$d?>bE8!2oVSf!VR$i9C(jG65U4dqDa;oLJPW5RS;) z@6eA~8O@}wTN0))bos9AVo;*)@KTOSR%RJwV-`HO!2@mu6RQW{_n=bf8xq^!b;VHRC&~?~35+B0+^o5b7w(+$lAd&U5;TI0zH(|3(G$Ha5N%2Ei7OXqn|2zw= zp~(szWzM0eJ93MfXI?f;G`}H2ZCV?_AnhjBibLHTI+d}!lErvh$H~P0Eu|rpE)`wT zVH6>Ewy3gE2#M!5vtg|2Nj1jkc97`)sI{eQc07e@&e@t10J~H;&ZC$)lFVt+D+1)S zubca39Mk0?crce9>^>#OseOeSC;qP4dwJPSwu5m!R11%S-_6P@v9-|*w1D6 zjZuh%hiQUP19(sTbYMqSXvHO0ExUw*Fvn;hvw7hl`2w_I*>O<>pgM7wz=@3bX<9vO z_PEBj?)3Tyd78|{aB2xD;F#x{dJN}>;JY>4Ale~0saqx};Uy`M7ps!BY%5-T5;u{1 zBp(RfhN&0TJO|&xv|t(k*4az#f;NlpSri_vg@*HBFjCc&T>mn)tLZVHaVa+6iw3oJ zH9T>Krqg*PRy`j!!~Q@x%vrmZJ@@LcZuX#gURWDZfLsxlW1eZ1P*r4#Mc&?_$LPu!6!h-~t9d7NwJUg}br3$f2c?IS8kO3Q#3#=BjvR(ACcH&e|Siv(!pJI;d* z2WU058s@I;A>-VrcorE^wrz8-jglrFHp1eT#L$$=SCO4M^$UK~D6I3xUs14Nw+a$5 zsQ)6|M%XRV3wxI;$ls=zaVa(5lxwCTzxyPBIm<}nv5&@n^y4eJo$yoZA=3LRNtw!6 z%iQq+`~2lbF!bt@QR{<==CGn5!Q_`7Q?Y?Nv~8=x*6AQj@3Fvt7zaLhXwF z70J`3s@0&&+K0exWhpFbrljpgE0i5wuclxJf9}QNN{(T!lQGoEC3Gvxp~_DY^+%{fmC+-Db{ODeAH(Qc8IL59YZ!}z5qc;Wqe z=WyV)O}B9nnfok=?BR*=r=f#4c&((gvzxd{owb$Z@(oFnfxvH?TNHW|)O!?4k)O}W zZl1g6IptQ#H$2^D;>zUrpAndd6&|ef?4g;*ZHJH=?6KVCg$j>3**uyWJ?91|_WP6K zt~R}LmR;scT-}mClXT2p)3v(m*JJlel1j4UZl3oCE(1`MqEmypJhHcItQp67py@Ah zpYiptw7cxF#FfRMcE>WLH3nf&#R)TL)CP&=m9D_2gK2b_;D{KS8R3Y`3A%8x+2HmZ zlN>Ht=(tnphr}ZcVo9cX{t71^u;EJ#qCV1NDXzpztYha6s6O=&>9xO^#>C_2UGNoL)vZF&UdgYnErJ5A& zahFjb{Fp@?#?e;}pc$p}Q;ElwuNGhN)j{o|7>50+^0!V%9bW^yd7J!V+h%(cEMd0y zRG9$qVWRHfd7N#_GDRVhV?iOhW2vfCPjHT0Ls;)9=c{unrz9VH%Dyc$v` zzyNH9f2{%u_`HyjTUfLm!XZKk>Wy zYN!J0MNi?|E)oA-S2@3)nrgLQCDm)B!4F)2n9c)AY$be_3U2APN`Q`Fm@aBeIe(cT zb%CnNf^nFqh5~r93bKbjzOxc?n5TlmH_-s~6V$I3KcFQ5HN0^edx{1*JR>wn=i%pX z(5GJ94Khrp@ign-4L)q|Q9=txF$@V+Zi7TQ%#bqb-0Eu(aopSBRD3f2t*i~yCMN{@ z`prV&a@slfBvk&=uGpikkndDWCF|`X;0u>$L*zX9<9%5@lJyJu&#QM|v%6z-_&cZ~ z%1Ay{(MLpumz*H7H;k=Qg%=I^%iad+(k*5pB;c0ZkPKeZz1N=){6;J*CW!AsAeF&P z?CnKJ$Mqf5AsZdr@}29h5=MIKNomQ#-0QRnk1QpLV<#Zx3K7>!HlSyPYy81ik9uCh z-|7JVXiwi8x!GmbINf&KTxQhPCvS4riO)YA{wzJS(?oO+mUtCEJ+CjiFRv|Pj`L%; zFkLeFsY zuU9$q+*l#OlbnLwI?!oRvVPKCPM$*4mx-Ig)t6=KvKJLj^bjx3t=h9Q`1-tOm`IZ{ z4)^oAajMvZE(4!}J#8FL)sDHcoVvltoJ)LNo=yqfV5tLt;FI1Mq1+ET(<*ucokIgl z`gzi7oVlQp_@7JqXw0?b)6{kRER{<7Za*2IHRf||{0U0#Q;J1k?I!g?{v3g3(2$*p)^gNnrI)m6xGQVNL3Wm;8X0 zz+-l35mKTHR z6-KGGBbvz!A3y*@2PJQpg^+p{CGI7BAp`8T5&}#-iwd`py8>ixZIrB1U+9EjU-0%+ zTSqaRpbnMZYx_0$vCS9~x2du=8M{VokeAJcjxb+7)<-n2X$B$190-qST^h5Vkb1}o znpj`ATe*y9GjP8?bak1(YPq%f3lBAyd^%<|IMm@7DX?eVb3U?dJX{|~Dh?$x>!I3) zAwIscun6UPl5AJ}{Pdoy_rzHxdFEMzq5h?uM08kqxEJ>P$+!{YULi7m7)Vn-b}q!l zM&>E<;huZDD#r1jA_o6?Y5M;X#NfBn!@ouhnEnkbz-eg!&JDkQ=x`YRYNpMKL;K69 z7tjZ&X2$?<)Beo||Ht}k16y0IU**&OzAh8fzhM>lpJVx5vF(?M11-Q@`d56vV)rb*djLN{!UG9NUWd~CYkAWDZRRs`_Y0|G)(i{$RJ+rtP|yfhxo^-)4S6Nf$tnB zW-w}R>PH0!)Iuh94Oa%m8_k^!_K&w(Fz*l3y9rmX{CRh;crLGXJMKB9(BJa9AEx}< zV%xo*H>bE>o~FC&xfh0|-aSZ8?Z6T?)afeiFSonls7|rny*$e#+)ZpB#47p>V6bg3 zkd;ziTQ?P#TY5E^Ae9tc4stw{*;=0;E>88@4y+#^@QpRY3#bn(R6yj|=UFwmJY62D zW&6l?*T{GAU;F^Jv2V|t-TesQRG4E2Uz5Pl&8qDmcI+x!0j9V6AXpE0^FA*(H7l_& zIVF2P7qeB#OmE+}r*&(>#k~UppwWIFvmNw6A;_FxYzJnU(<{E3ZwMoFMnKdBij6U) zpyo8$L%}l^=C_}}?-%6R-^PE?!FX8Rzgz4r@bAT!Vn#CplqLzEQK*s zQ4-3=GrKtx1s+C=&001KhnE}WxKjoj^%#Qgt{3qE zqDTmLa+*~GQ>Q#bCNaHMh;M2kn`~mWHvbuQfbTo-iMzIf8Bp#~YJ_X8@u0~F90SRj zVknY0(T4&x^exv3HI@M?l*OYLdGdLILwkaX?xQY0H$oM!sVa-=hkNIInj^>sUVY4v{skP)) z7dhI&R(S?`HY}`xfqS{*czk4d)gf!_p*j&;COx%Lzn;7HOc7yCHUY>yEEwd?QPCZN zM9Yo_x>LBe47xC=W6*IN76&1Iuw4z5m^?lIcRRWM-FzH0 zmASi#pNb&iK-zaG9ziOg0J{eeoK9+Qiw6+t zPHI+aPat^Ym#K^x?K4}Eg>kHJKK833c(u4uVJUiqjfANq{Ie(0sfI-l{gY$db4`dG@G{46s{M<(kBC?IJpYQ~GEd~tRKB8${2r@{mVTIPL z(@(t$c#}Rm2__oJIx<&c*YiU&$1huRJ5nX1Pa`=}%o-V3^F^22m=wSQ4mYz?M;5k_ z+sHJi`^es(+P{Wfi**vTe`R1FqK3}Tli0eF=``PZk(Iu{xODAg>HJDzB1r>Ms_&y) zI+D)bj555K$JJxQL9h{|<*~VfqPmHJwzO@ow%y~xO5tlP;!1X9j{%S|21=O3Xfhmsyv%STaH8I~v z&zJT^mA3**_aRFn50_9375gbP8d-8vxNdz=Q>V!?lM~HC^}Lj~6+{ns)h3T*z2!kM z+R{1F8H0@^lnJf$;?eM;m~+6cc@==iWqX`X?+x`H?twf4V`mTUhm2B|qw8YTj}oxv z>4k^FYf7my@Sod`*H4R;%cdt5ojf*=b6=Go=Me1@dL5|FU#giYnTTqu zb~GGq+P_Q8#6?s7e1A07R2A36)2vSn+u9`$z0~joCa^a`FkRb zuCt&34REjc1>wf@cq0eWN5SyWPGSewNf&MW#rY)(y1;K~t$gX0-=4P|_94Erd-<%B z7F6d_?B2U1xMz;GQua{@-FV1WIE_Z5?QNH0+=8+_T5@|NmShQg%=(-)Beaa(Z*7)- zV=Y5V`k~4wd{k9wh3zvf^nzicttefjSwe;QH2HK(GadYH zV$}T7DwXc^N*oo%L7=klnrYkXS>Re4={&SPsoyB7fe)e{O<-~Rv16ewl|F?B>ZGF_ z+#JBscfr$@C$(Lk4#Dxb7;5Wy;=)wCtRdnHSaBYr2YL`WWS(TJ&dHbS>T%-R7;Xmi)K-1i zRU$La@H$JE*K64af~neEjm|s$sXOmb&WLgedU^z|mH2<=Km-Wx z1PKykkip#&d`JQ$xXa*9a3{DVK!CwR2oT)e9fC8#-G<=qlG9}0`kbXQg(PjU3|QnTd!ya@8gD&FilrM_yfye~li*;@7oacE@`VW`}b3tl?1 zXQ4+nxJlU2w$GoE!zmOz$sJs+*EYwjWgoCUSKYRCe*fsi$)N#RS46rboGV5L34eRJ zKT0PhdV9IRnAmjfASkSC1&h$Ao1D4I0GL1O`T3Sh=mj1suand}J)}dJ>d^_MtaX!T zpVBQL_~oF^;U6(~<7u}!ts&|e9__XbL_ul-_57?;z^uULYdzV?)XVl#&KcRN{jRW= zFAG-@az=hrf?+(mpNF@tOl9c2f%l-kzsaoNk1Z2dzSJzVzNOzJ`eU@xY<%BHWZ^57=1?2e_31>JkKl>XEJKR_n$Fw=;lx`ic+ZnJM1lWzqWetJRgtRZfEe%}bxF9&e%`6BC zBUp*RHP$!&YaMVahk@gH{TF`&fBx$^j$V#d`Jji+?s4hAcCo?jP7mK3K=ruCJ8<`N zMIz@1aQDrDL%;lhzYIJ8o^XWR9eFHF{87Rnw+k@yk6vvr+YhgD*C{f~G>3G;7COPq z`RxV94a?v>%dz45D4alN-bIb>kp8|8ss~l){>oUj>qFEo6k5b8ufn|wr9`P^HhBx|rU*lQG+e|yU#Ud=#KFlNcvv&yt;~PYtdS}zEWR-a-vK_1mM&vu0 zyc0#WWaEn_S84H&uJW!vK67~$n{Lvtyn1yL58nHEar|RoDw?F06iR~o(=G48ZAtjm z&;9OSV?=M0Pg^KHu`40rDSYxjpqFp;Ujr7(gp8}^Z!%qateUU7;~8&GsSU~^8 zmG^E#>A%N!07h?sf5E6cXJGJVx|$S};@3}+M$QnKjEoQsou^qrU)Eug_5 ze*TYTU&Zb)Wm%69BIf5Py59<#%sO}q&5XY*_mDk{JcZ&W5$3Va+TU)=)3lRoxLccS zp9IP$x_YKcZf(k?A^#*ZRYFIWb%4a1eDt^GX9)M$ubTh0LJ`Y%w#c$c+WBeACte9M zKO0cJqD&oHL4nh0tn`3%NRHps9-Hz+R{86ev@+9?$G%wsoltqreX&9r66kay$Mg8C zk4wN0%sx_vKA;=-+E;a$I-o41=p3yaZfcL1z5)8mzbn52=XzPHH(}PtQyeY`@LyxZ zSo|z^|8-~nI~LMxttjYF5dmjIbk>Aw(|ilZg(lM~Pk3Q|b-7_a{F>L(?_M84L^)(` zlL(~pdXV#kf!Zk19shL+q!B|_BU|^LF-V1@mvhCPI*K=E!rB!>MQxCCMd0xU&Heko zHgR)$hp}>0s89y$c~ny}+L`%dgHJg6Kte{&B$Nl_LxD>gU7Rn&XZ8tKKr6=xUg6IY zC6HGBJ_1M?L_*;Aj$7&a2tJi#>bDms>4ofJ16&zU-LI!_#d3} ze>d>I^yc_y9&(rG3;Zu&2H+xhNxuFejCTiSjBJhnl1~122mXzQaDjhkTmv8xCkHh* z*Wa`p{|;rWP5zp(8}LKp|H)R(a-hbgzA;gRr}h)#m)21OYeB$CMZDqZ3MBXtJ6 z0%XJU2I8R`*zH}sgPyf_@jX`_4gt&gWm>HJE+k!+lD!;Edy2H)XMN|HtKlN$ah5G zH{whpxoApnkkzORHIN}Aq~&9fSUH@xw{42|OQ#48PXc>)*9_i8@hedC9X7Bb?0zsK zU_aauZH?*uQ*yK*Mp;LYXI+#=N;FSQ#dOF7Rr+lx#5+*;C#yn(A%@zUyf%q$^CwPZ z#&OIl1o7ewBUD_L94PI)Y;WI(I6RUmOLBtJ8b7^h;J~!7GlA*Tw^LVfVoH(+Nxb2J zAoX&DSd*YDwQ__!43e;F=OEP~MK5jTFuRO1_$lCM8q-eEJkcZhe!5FC^s>bt$UzYJ zY$Grbyzv1Hnc&V0vcRh@O|gyFA!Q%|TKc02356gD2nS?XDCnUkCuBIrfRlmrZVwVJ z^%kuhYfJqcbbeq+akx-QJm&Mlb+!T*%;#iF5*hUEcdA-kF$Q^K(hX_)u(VWzOSKE5 z<>(l<*Ih9J=%1nV`|hYi)Nh}B!ibs{?3)ZUi6I8XHW-t3sK!f}wR46%ikFip!!#t1 zm-xX-7l6aym12yO|GrfgT}gs71S>{P=_96yDW#$VZ10RrL5e59DzbAvN!+IN$tfLks_tF8=(BBAW#txGAqpyBg)_E5cQ}CJOUZE}{I=BF; z#AVE^&XlcbRyEDR^uU`5+tfR^_@xlVkDKQ7HaxPwEB&FnZWT}lZX5oyDHTM+^E>hP)biv7LtgLNQ zZpo8Mhk@>Bg`Ol_3a(7AW(^`$z;*8)0cR6pm$ zxe!^Y7D*TJXN2qvrkw^onpe?tw0tJ4GndLvA1&(Dba+J8?2CIQ+S4_jl=QrO?hKb2 z>FZX!`dk%#5`O4zYT3BRx0WWe(BR%J7o!x6Miv=d3<4*xO_v*aKEhKJ+t@Cl zHrXtl$q79*5060nkM;Qz$d9oUrFgCn_pyEPoxpe@aYLK&0=%D)jbxBrJx)fJ%~FW@ zt<8Nu3|Nkl=#`(vQ#N7RSSD?)usL=G7t1e;o5x#;KL6x-=9#JAVk&}$zu_s7;6w?o z&p!IS>?Wx9nLd>rCcBPN_w@+PvX;u*k3My8C}+F0FY&NHw~L8($2ysFVmy$kJ@ry> ztxbnTWpK8VFY72aEl0RPtHT@4>2E(D-i?O63VyoVDj4H$t zn)cy^KkJ2O>kHBJkv>D-G3&f|&os&?&n9G%^mL1*wCr)urt0MSBD@RFiF+T=DiKGq zK-#NHo`(j7xH)@>qx1MH!Te|yMUmVyjPk{Bmh#VhkD%a}oZ(y14GhZqijMR3S1__5Ae%j)Ud!bE-?my{uPf%5brl@P>=<&dI6v&|BbG&b?5K0^1E=JwCxl47`Gmm}}6$K#DHw8no*+R??6i_;*&|vc|edY_m~mCw3I0 z^=%GNyO>@6S+|&hGah2@zE(;&&eH?U#m#&M>)c>(LKk>@h&E1bZ}F`;mq(VvYvefE z@}o`a%&pJB!Hl|NgdCMfIaQN=dlD_IsmEt8X@zb%!!oLTwtk$#6uG)U0KJ(JabOvx zA9)*T85J7>w~TU3Q~}PsJHhe;aW>0rgZhR+-c?-BPz2U zvwzk%xxi3zN~WLUf76NtS0$x0No(^+7Lk+}Tj1#Z8W3;(VK&`hx(; z#HwruKA5*vs4c{H^mDIta_6eE`@}@qS)D)e{i18uB95?hr$F7s=%Ux?mfh*ZZq6}F zo%;_-Jp=e7mB^YK%TW3sdw(3b!l!{_x}( zck9GhiA!hw#97XB-Au^(Oxcp#^AGaXxanf3QYSgVGFRVH1X@^WPwAFZP$N*VBV9F* zl4Wk|zs${C#j@Mpc+uW|tBBZ*HftKWT9LU{qT#w`&Ag>s{<!;-n>-aa>5U zuMl-QKbOAgM!ZM5BNHc7?h`oT&8_bokSu*I*CEGeXBykgWwSpVJs*69FG@A$MSJtj ziTvsV>4psb-0*H!v^Spp=YFp*!C_JHDx~yRmJ9DkxcvXQAQy_1!`U0 z*PgZ9xalM5y`-CaNw~Os5O4Y&Lu_?uT^Rkv?Ya%c`7_*SBH6?oipf+KF~8~$lU!k| zMh$Sw>l-=a{R6yZ*7;Eu%Ur_)qLXAO`g5~0Odq3cj!^y$(px8aSxWf$Og&-XyCD*m z`SjhuuWS-?V9Jh*f&lAY-}I*`Q0LRsCn?ZkMouB0EhH-2{%vW$l=yf>TPai?EX31G z_xS8C+%$94CMm8NSr^vBA!~gE{&}GSoL$Hq75{Mvqg6*G55ayg)&(VyCsL0^iQMo9 zZUryCl)8)M6Ngw!f%$mboG|g!&{CJ6A*bCL_q=D@F&ehlJsZd#2(e9 z`726mUnp_7J>t#mW17S)%+cp!c-0DZ5&^dIe#D!2()HoiQ}o@`YX3TyOyrT=;CR(V z$Fp|^qGW=Xf>ckfH4|SY@$L-d=m)2*!}AB8+87Befa+6#W@pcpN`U=ztum>Hhe z@hDsmhu90^4o&&{l&2*=d#uFK%DU)0i(<1xgw)H5BxHm9aTbNT7EQmK6)8qbpX6QR zW&q{jtRx;uHPUtsnz#do?`r(~tKFZ#HnU`WHr=e$yO(CCK<-9=t;NQAQOXO9G$pO| zgo=HPDxWptbh_qqx{J=7CwB$fkw+_gi1j%=V=McEhu*-?cXkOm?}rx43GVrXN5Euv z4NP`Jz+^{~QB|rAOm-3zSKr%!$<7c~(S4q^m3V-n@yD+YHSYtZ!|)HwXMUtJ`{CGI z)+T891ObylhMpe@Rsz1lBILp(-n_;fMCmCKeGmrB*kLpeBMjYj`j>zWo)?-@0!hR? zQ@PuWo)%QcDGDO&i8}Z0^;*#CzAAxm=-o~TXU4o_+j_b+(>!Va-BauC-6vFU`xs5= zwdc`Eyxwj>vyH%2{u7Hco#yFQpX0vsKm`_`x`iQmE9p3%%&OIcOV*9g0>kMCL%)!E z`Wa&WGZe-5e^sc^KTy z;lFc%xoe02?m+!s_#K0ESMz7ffJ@EaKKk7?T#XEu58U9ONj zgMgeef6Z3%+a9O`z?}5#Y#ofu{xh@g4)nk8IC1@r`~kjETz~p$aRDTb>yC^4oy7gN z%h}w~+|bJ8KeOrXEco}?boY$`eDa@|9Ka{J?vB~t4KlK_)H61B{#REm{<|~xPc!}p zEXVh+u3FkNMMl-pUSfI~>&Rv0ZqNLveP7iJ4aIVEP%TE_-?Q`Wy%yt;Dw7=#ypnZD zx0wm3nKLt2Y8W#Ktz_INDXREo^X&R!P9hCz8)YcpTTSKdevwYRHM_LwQ+>)9m@E=0 z;^|c?v{X5A>3KEb(|kSQGkdF{=aW*~+!WQ2R%q{Sno?OS{z@%}qxy1v$fxe){;$iK zzP(?oHa=Gi3DeCTuHo~h$(saXO%w;?zk(-*x(gM)=|tIuvz@`jy3ikDjq7+O6WK>?6!(Kpxn+-_5zcZ@rCb}i#Et!Bm<8?%n;p6z?mzB7; zwNfoZqL7>#XRzqTcvJey78`nv>q)T{3N3inFgK83)HS&M197vv6GbXm^?4EgmbOV1 ze^!IF&Ph?@vP#P=ahKF~gk`_@*D;KB-PZrxcVao@9;|4|3T&=?fMIe| zi!C0VBDk~dP01h5cX_*)u9?ZyMhqjv-}Do2^|g?F@{*^)WQ?D|u5>&ckrouhc1j}Y!ALP zf1f$v)g;Y`l`m}E)R_Jxr5%{IdewWjT7jLxlr3A*!NDBB1NWSf_19`akJ0)vHj4sV zCGzE+MKR-J0J}Sl!DdB#{g~*hk;qaPiCXgdfZttJOYvdyHpo`?3ddnuC8=nfQSFl6 zgFP{*6J0S6&RRyTcjM_9rUU6Yra##CRdCY=?*4HE;%4z85kxHnzguv%utA2{D+s&H z;=LMR^<@IuYiB(m08(=cQ_9(xM}E>06t6KEYP zW@lLyURGcz7*IunU7QgQI_gg&!nozr|0cK zxEZ^NJ|_3@c1%67-@I8(QA95@D_44lF*7I-6k!t5A+dg7xLwvoxn*H_?Oo3P0gt${ zd)WNRcNY8OddE(2HYQ*1rsEhxtb?Wm0^`|q7dZ)Z*X5WtC&6by7mpGMXjbRwJ4Hlr z6NuPIPeK*KoFXb$9Shckw7XYO);6yT#O1QRUVhbmQXIMo78>;P&Yo9YJfClWckeRb z5yP8gj8 zF~s(HEAl3etz6BcrkF**9rePia>V5AZdm!VA-4RCULR&6{acUgY&g5N7;pF!LrQ28U;8>uYu*a$Tg#ZD*Ww@Mn~Zy{mL zgj}p-d&IAC&hvcp)TyFv#wjGmUlBSX7z#`^k$ZQn zcu(*@^DXgmd080W{2-URdEb(kJ`NHd#U#4qetK2sw!Mt*_R&RQ-z++dnK;$@GuRe(NTz07I&<+@+f4}qR}|MXu{D4 zH5-=2avr0B^tRu>PLz#~1={LN)Xo1m{9J&x4@;Z8k7gECp{iCZKHiKtz6nsu0l`Nj z@ah!Wx*Y9YRXM{kk~EMUH8?QzQxncdh1nu)S}mc-5H1W~V1Fw8D3d`NDa8HD@vj;U zuTc2vTl}Z8>sybHySy`)YnB* zMei2~eq`~8C+YatRTK>e>G(HQyj0TD%&DpWU8+G!6(;uS>pN7+73dPiner62Mg|Q@ zyA71YOpPyaPqI!XQ59-{jVYZCm?)03PRh7513$AB2Cpyg7Z@jeW-nyP9%MCeF;4{= zE`kwwvt$P@gvl>e8=fq7VLowA825eT{%~cqPBi8iuOo{G<-Km(?x=e~aG>#U!nkEH zs6U{of|7S7v>e!lH{-M(iwf0Zf?0FZem%od+uqp1`n@HqZCeGL!Gmiu|B`RoGxw1f zzP;AElJ56Z=a16)bd%Mw@{8&z2k~-X_E|QgcK=1zmwmEjFDV1g-68zIUZf#U2a%LE z4m}A1w!z&OOWmE5JT2vhpu|f7u=BfXhnSk9US+4&l>G$w4CT0+^@IEGWp=ZfPt`u3 zE|Y7hiC7Pw<<#hYs@;rcL(~x1&IP*mtv^0BtbAi0rG`~ZjOD3h2XlXk2%_!rkp2F; zvYIYRf4mrHamSir-}w^vnq$|ib`^h!kv{#=(ufl!DLLX|smvgc+49@#SY!odMH^V& zcQP_{rSZ={fj5q~pLpJQlI0j=G6peq{rxJOgXx0%wX7%>KCt>m zQFSEQZssuelV^$jm@z7hhcq!zCMm`fQRnv4qSsW@f89UEGsN1>o2l2-6*!URVlZ{z zHbuf9(4==71pP5tvnn(LAYUeEFL`55MwrI;+{7%autaC%QleI zcaiecPJ5*VC2Fp+*_O&uicKy3T2)?)p^8U+x)qd0@eN8Ie=}Q^Q$f`MFm)ErL4Wq< z&9JCU;Nb^$S4Ptw_2sYvj{xAt1~SM4x}wgMzfhW6M+*6 z6Vm0cMhw-xvO|38H@qZ#GUL^mQW6VJE@tF@!-h&Bst;d$J-NxX^a_Xq8?f6RQaPLdO>z#utjE(}U!)URkI?j@38kfg!PoS0=8 zqmiVW3qu=Dwwo3ZVQxNiQ``VLp?T{Sh*(u_Y?z{-kY|Pl2PL|wsbUm7Rr}Tj^4)JYAN5oll_jZ&?8Q~ zi$QP9*-=X zikQWrt{TqrgzBzmKk*=rhN=KkE_05dvRE#x$bp$zlpR$)Iz7SsZ!2()1GmJW4bGe| zW&OF6Ajg*2vVPK?V|9_PjQjgMv?6&QDo1EIVg1byeTg_ezO zM1CEW(0?mvNknO(OF=HhqN$+xK zM%Ft~%LJ_?w7ykXRngg6E-h;F|OQo11|vR4N-H)w}0sdLWfn3ZWgt#2AHvuff=j)=r$e* zM&MpSJO1OFkoV3NbD+JT7aU+ed1k}i{38E?UUPtb#OCXCSQz#-F9a7;pWNSXA1|sL zp0A1vvHW@ujx5RHNJMF=iVvwcL~S+>79K2wl2nimQB)hjesZ@v`4nn<`5G*r6n}3@ z)~si^AhWPm7gM~-SF-$te|t?u?=V{MpTRl){}>GRf3Tm}KSQzKobA7l%KOdY{v;az zKV@0}0mT4UG{DV^g9BhI|A0N50ziD;oy5=I*^0A?gOlEW4SRlL!GE7kzr}=r-BbUA zivjto|HA2hoAlpvvEPvL-)9yOzxZ3@i29%SAtxY-#C3Q4{`FA(SN!llp1A)DehB3A z{nH@czXw!uaq#}dpx>a*(7?#@zvPDiS^Iwp$@qEys>n2D^Q87Jwe9RW5*$7&r;kHj zw&r#x$ixwwNbQSieE3T|Z&KUBU`tm6!?>l&r1Ehxs4N~{P{(RB9(TE3*1kZ+duVhD zWy${Jd9l_v=d)MfnA|Rw;2zi3x!Yw!Y3nRBOI`?w-QK#LeGt>R4LGy)5Z&#LUVr77 zLKRV-(ei=!^8?3LAfoZYLHqjPYVLzrJpjq-+i&T+6plq_-aqxOpIKfzzkl{&Ynom^ zfmQoUIL)q|l3~sH^v)g@dspGUv61@n$SS>V424f|c%Z-&Vn?jA^gZuu-u)m@D;OGkm&*sM0<)v!wIIuhxy%xcL6SxF4@ z$T5HWL*h3&N6%d_0EB1pOb{b0QWv#{>aqUp3hj9rR(&LLl&pJ$QBc$vwKg{!(#?R_ ze0{#7)3u{ioMF7y2Tv+MxMa+;Lm5-JPSph=s?cbTnJ&s)nG z+fi<|ho#H3xIZJ0E)J0`CvFGFQks^f3T@cI>z*^68Y>&mX;fs~Y7@%F zXNKw{1<*Bx?gkmq)hEfHBsFL3lR_6}nLCWaW=P@na!rvx`PBLK=aH%tqXZm}t9ZLs z1$R#2Mw8C1Y7Qp&UKQV`JT=8lqN38Z=J`lE)?0y7k7|1-8({d0sc|HS2 z;BOC2^5e8T9)DZYQ4^=FZ|!7budvvV{gM8KXHC}jxn^shLY3(2!WWa{ZSiHVcRI1I zM+7t0Yg%KO++Vi26C&8UqfKJo6cBS9Z`J|GA($mzCi@oss{nU0k{kCb;e^Qcs- zHqjFE(&>?Q(xA+AfsPUgmGqk-X}>&u9};?g0tj_$)#A*9Jc{H2M*?9d(j({!!+p%i zE`Ib9v~HxZY~v>M$yE|tg6;}u#IQ95;_~@Zj2K=%B8W8>XuHco!+w58IrURVXnkLNm>Znk*f4b#0lGxvPrtKfFh3sonfZnky?y_ z1+58;7sUuh6JD#8Oz7Ch>w#!7O6?y@mR1+$9ysXfWeGALXPma+Qnl45u`T9+6#h65 z5}WO37W&Clf!9kg8k#jawvo_t1p4|*_#{|ooHtLU_ISj4CJ5Qlqg+P$^iZaXl-IO9 zjmw-rMm`{Lf6l+vv@fTeZKEKZaXfVlhVkvz+M=IRuP}=`uGqU+r1``2(N5*E^6C0` z*g6io77N3Qw@x7pbN`d3JyEJ&hH8qlQ96*i6;-%Y6(S{;s|pcp0!e7+(wNd*@8sL@ zO+-K0_VwCkc$qy^lk%4BNF$?iOoc`{mMf8)PI>gjn0Db>+IP`>*#%Y8ERjLWvGkW= zGp1XjI%uh}y(S{hlKU}!ct=jjSJPOD+8hh6F3aN?#7Le{UWQ6}csre)-6Te zGLcSR9eO^bx&D~CyT(j3nO!U?^H`!Pn21OxzyA25i+j2k9bj2ihcBK^9e=2eUezz~`-*E^Nw-AeP7~TYOeL2Tk}X#TSNvmy z3Y((z^rhq)J~hpQF+DX!`B9lWLeHO)q+S3QP?3@vd;^Z=dTaIJsj1}g(``hMQmQOW za|Hqu3Uj(#%EeFxJ2mg*Jof00 zyrwgMJww%NymCYWjIbH0V)5=)pyLY=NQ~Buly^=~1aMncfChK6m*RNK)dPTbFr_xK zeb!sn7sA^q* zF8eBaGrc@eurwWeOs0PL zv?ola%8hGb2gCT~Ja?;qhIvHrK$BqtH1JCy&&n~nGqQQH&KA9-ZpL_W!P&x_LSp~+ zCdopzwZhW_;S&$9Gm#%IYxSLc6CQq3+gw|X#v#OoXQTGbdGiYQUF943wk5&EulG7{ zI?6X29es1gJwkuxjCq9in8tR*k=b&!;+&t3Rn06AJ}%ke?5=O?)%x|=qG1O)TPUR| z%JcSVvB1{BY8#hVC@kKpc3b}yRAH-c0in>b|LudfZ4}Ca?qKCsK$h4s=9H7jEsFi2 z6rmeZ4Ex-h{sXo9%-Onix!+tXu}hxn?c~GUD~rEek2O6CRl8!&j^%h^*(SxiTC!cG z)y)#^Hzr*-wMRQ#q5u8M!x!m_q(JuKM8 z#HY4YP~LU^P_oBPUIYAH>xy`SOSZF{)k%W;r$%Um?yHtIoB3~^!t^7Dr5{o>TIc{G zs|+;#!tFkdA}Hkh;p6i{<~{1{KB2p1!?K0|b>0{aoVWdkSKTD8^ogB;1Fb9Lv);r*SY%paWZAWRvgv>+>@dPTHy-xz{&YKBBK@BpawXWL@{ z@ZiAv{l6I#b#qo@*t_;3DFza0KQNR_BhH)=b zK}e-uxXQT`G@#2RZL3e@QCM*l6S%^(Q(#BYpw_?K2qoGhET>5SE(bl(IlCis6lbWH7?fMNA6sNINFw-tQ#*)i#zRkgVhKu;_9805ob%RE?(5# zdCvWkL8RDB_`a*f2rR@~6L|BqkEuERVz-L#IwKEchI}Zb2jBWW#MJ5XT3oa+tPa~0 z%k4_T*$^(-)cb_%f~8FjI^o=2g9JG&@jRSx*!fO(*hT@m zQsUUE{u|W**q{YYoCcO5XTAi)lqckS0Yh-p{Vta1u^-ZPfxEQB1E-&)s@J?!ov!9h zU-4Z!rgGE&B+JNsK0z^HksW0&I9m9}eEhVqx9M92IyiBhI@|jScNpYzRcd&sNYde? z8Su>${uq3bt<$+`E2jG9`jpmiE>EDoi2xz z!EJz}x0vL2VHqSB-fqautXK2gs=+QHRu}}W;7Yey;n;fx)OXFQ3s>@#^pNM9fTxe! z3WtbfNlG*4^xrLnGvwtpnlSt zMI-wg+>kk2Jsb2g9QjQu5umQcdGeaAm$SQ6TheQ@1cnL+sr)bihhWuzZ#UGWHA(#P zIGm=erac!pJlnMxS7?0%?^OGT$v>oZYJl5`q-LzTwy;1dMX7{GD1p;JKR&m;{~f&QH#qno zoVb2Fi2ZBl|2ND7pj3b3RsUcfoV-Bv;(z2-|1I>Yqs?)WN{|Kl3L8Qb+w`4E^_xT>SihapancqNpbP zLvxFb*ahzaiW#VPNbcS$>ZeHwr28R9zr=S<>}xSB>tx_u(MTF(-_}dQ`gC3%q**wY z7ybCfCUkvaK-&zptpfbG5{8;ZuGd=ys|Bw2l*O{_O6yCLyTj)mPe^Yat)2M@U+-Wi z_^h1FqbUB8&wUcbL$#nx+E``Cc(e4SlPFABT)*X91o(C*=u57quH-U_{Yx^)|k zx7#EDsW2u!44uULR$DFM={R?_2IIANPR!g+?~}AYVz2L2n9b5z^w1%Q@bZK?dR-sy zuXHqenR9G{msHfmohShvh z$_rw)u^Iho0fOUR?~CIz4DNf|6B55JHoT9TrshZmc!E{>_zO>M-RsDW%73=BL{i$! z77w)w+LtRDJDoqAd%ep6sBbNGmqa!43YBUw7P_E{kinANu*G&aC_Sfw7NqakWo5}s-Xi3 z6W5zA5zX7oIGOX6TqUArN40ir`Z`%;D@L-lF8=5+#3K7VuQ*^he6P(jdoY1~x}|;7 z4*y+f?StmTr5{8Oer!y-zK~`R$NJnOvy=hVT!nuWMhpa07k>=CFu+Iy6r)fTQ*3n7 z41%e`PAB?*3}OFzue0*7v?AZo^wW3B`%4lNtuW*7U)v{W(=n9SFQqwCW6xy63jv)ZhRgEquT9dq8F^s=*VedmD%V)Qn@O-gi6)!UwJ&0Egfk<^?Dz*ITwznILJ?dL=f z5I_@6DiXLuMb{{AvzLim=>EJFKi2_VrGS3^%~eWkAL9$~Trl~1Ir8pS+`smuz0EtK z2k+}ZB)zg0szPn4W_-#38z?mShNKx&fyY0e6Bo3Pka0t1qL)tbiEt{JmDi~ zuBliiPT;<~!@axNZ|SI6!0EY(T}_yly;wtf&>W$p{;l$&$YiKj-=A zHD>|PA4_k6YaXr>bnk=HN6l|oyZEl#2U5xcQYG;v5Y(xv%o?e;Az_c@?UYvAcP+>- zV_6$rW~%gF)47(*Jhi&WEW%7KHyBFfrdZ3AcxPX|xIcAxupRFN2*9imL33%ATaFb! zx8{LyQdi~=3k6-}#k;1oON!+GXkQ_%9!JQsr*8#PbW@!Nq2AKoBhuY@U= z>c9%}M&k9J@iAt<#Sq&~FSQEoFX;7U&2O;MbY|7C7;d~1$smHRQDiBd1H~EW9!7fE z=tGaw^3h{6(sR&bY4+rC)ZQ$E(0zm&cc595t&W}R*#uX{U63IH_>VCNs&20eSR~GV zkC7&wxpM=;Bx?EjlFgF;$<<0|ML)qRN1$QOa*`ODj(?=?5Yy+8v{I^MmIWS{b?NWs zxNOnFBq&Tlo-84wp5MkTGj}ub+1_-HV2hit_uZhiyrqmpjIN?dWp zuv8(wj)ut<8lqHC6i(c-&Aw7-eaOc0gOL_X+V}b-s^m1z-%=}hCEtuoheS>@p3_-o z&cEbaZltO+Nv9nh@Jc6VMVZDktK^uF-wLxK)bw%M8W}a4P8{c+qcvEnofKiQ$Xsm9 zi^OqEoRALLQ5u(S6#`**l4)}x>9B?ke&LoJP7E(e%de!VF4y`b?W_BKW_CX}Hfv-= zRz4HGf7C3hjdq}tEDe1XY)e^Z?I+xYt+21n59%t1=81AQ*R^Ff@Ejexn-F+<)0((M zb$rq}KrnU`OwvOK*ua*6Y!M)0#Oxd@RSt{`peV%<57R-?Dp3F>=@`;%$2fPg6{dDN zYz0f*kVLP^B$M}L8a)IpbZKfpdGkv!ZN`nZIk)@OGu-~T$^jluUjbpH+y-iBieUmt z+@U}0jV=!SJH{7fHwn!3KCCA*le6@=j>egIOzk+!O%D)~bASx4!`AYg{U7Gxwgk;DeEBE?*P3Zd~s-28a&ZS?% z9#R+X1sS5X6U?~N-U`fj$_2Gn+rNB`ssEEp8tiLsU;QP<5Gk2JCFKijd~g{U!-#8yeo!O;+y)P>tvf^`k;sN$rGr(!H z^{xN_7KUMxUI}yjb&P_G1zXr}eUhsg~z2Tdmx=7*^QW6Wk@=s#$I7 zuC1!kdzgloL2!8RdJu{ks_m&v{BlLAk9e!CJp5|2Z6lOek#D2zYk;Yj0{_GI27k7c zFFuKE!a}Y^Y>*&Tp*kRbi*uD2x3ALn;WN=5HRjzhTMQ4D?`}_bTjvD~ya(7T=kwT- zIi+4s(s`*Ryz256CinLyoMhl4pHKZcc&db+^&@r3K+h|b&Cf^EOmy%*Mw94yQk!G2 zweYS;vBgj=d>YEl9N#0D53 zSP|5g)$=bc1Lv^|nGqosw?7>--^uHt7MdX}%y-~Bl9pd>#59`}72tLGS9Bmx;(A-D zoA~hYV4TL7HffB2?%`^;Kd>u|VLEj1%fNHJIH@_E=ETcMKeeo6|le-!B_-07EOW{82Y zQHmYsjM~{988@hA(&6(nIrVck=Y>aUOsZQiLgdmUAV-*1;RHj}3~s<97p@R_pym+L z2~;qqR)Ky6e@fFFBAaFsYqv`%h za@Q_hc<65K^P!PJr=KX6F~Td22+|gUA&R|Ax*^x%dFQwT=d|+&C1^uPd9Gde2e^D$ zUD026a_#ImCCk1MhEHois=d{ZKj3Ploqu-AF7z{*S7+@Tx!p}hl$~vQO#rSa!HC$B zeVy&5IN<LGY*&P9A;_(3rpwO>E7g3%VkgYBVN7_X5J76ICXD)RnbbDesBk%P zTGlQ5q{S5)(MdaKk!D`L4z^MghJ)J5+p2Qd2dJutGwb=nPXFjc`mdp77kK76b#aDF zLQE5rNS*lGi(liJCZRVvvA1MA8#xtgWeNL|)`?E`YSxLTS5niQJBtF-WoK<1XA|)l z+ex}#Sz{lk<+8#v(z96MG|e!&qMv=i8|&hFTX1)GcXxM(;11yplC}4ez0N-OoxA_s!}mee z7|g2b)kh6$v-Q?F7BSJni9Kk*_m_$Zyi+mAp3R6~E`0-vL0v`(_;0PoLXnda@LPgi zQ~Ii%*S+SdWDu)&YL9WYX{`la1{mve>iel8pPEuop?Mo*$TQ02C`u_&p`iu9=!j4e zqbWp62n+wdd%zd?-(Do#ot|(8(`-+nc{|pi4475`JC+RpSvN$e-7rU z>X1M5O&%OnCXdDYRl?^>2k{_CE$7Qj87BUo!3c2ODQyL|QEvk>uFucVer~22GScGqczAPpH?4Dd%7@a(qowk6x!j z+D2mc0a)8@=^Z(YAF%=G%oxDT6!fWbG0Cuit^8jFLQ$`mJ^&BJOhW3%Frp)~r(u!h zl<9YKIc4Mg)}~C~_vdPvz`-=ypI&@pLz^A-G&or_DTs%hkpA5CsaPgV< zTdkeyvq*UqRs%qBvaPKSCAZ2aQgT^ckFcCt0zPE+6c2Oo*0(&(1bhWK;0$u4GY2=V z#;&psp>*{^8mPbChy^bEv5e>;97Rr<*~|uj`Q=_<C8{{aEW%?7P(>if4C+5f75%Rg|segYT&9Y*#ajVokg093OcK@~tl3joG`1EUxp z0}KBc=%{CBZDXr#YH0pv)Q9swfckI(OsU5oCPLQ7VVQs`pe^=G2_68(SOEa&&!X?T zrjGbkV8FtQai`&F2nSOuek&d zh_B>$Ku!#o6|%}X$QBEoO<3AX4*b-#WVS!`V!v|EjXpZr-R0&m z{M7yQYD>Pzx}HOS0sY9xVtH|0u;%W^=@|bH+iT>-rr6Q%T~RyiAGWync*{d8*Gu4C z9+_juqjc^M=R3Cq_Zw3Wyt?MIdPVfpsX653UX4(;>{YnEX8Tu6?1NxPAv&mgYTN9G| z(%d-({F5UD{+zWUOS4Gq=ZAq#2m|r6x8`(Byftolbede{GxwgV)0)%I(Vyy( zuH&vXkGfyOnrwZ2Zwl|2Fg=uOziPRshJXaG@N?DRPafR#Mg1mI7gJEIqtubA}<{xjv-U zG)MMm_+p%9MOeM$`<@jFFN5PO+HHQBX{F?HooD{4Sb)1 zXQ3IvtG1qlafLBk765ut{>>3O#pmav`gAYz=MPEZY&1Mxzp9VV*?QDNii*I~d^l*? zDaFYs!X_F2!16E)-znis$+06g(^28MxxXn8T(-+95(Y|JALnM~0 zz|%SK;BUGSYjDu|TNUdq>kwh4Q>GsL5MizpbTL>p&nXj)DG7_#GAXq&y=%q?)VZC3 zJO`PCg&iuVi;+Zx*C%EJKV+LH*RHh{%c8)}&xGDd#tPZPt1;u!={c2rsDne8A14{O zNH*oz!Hkj`2Xa*hI`#oUa4%!M!ALrG+Q4c?a)chvHijk?b0Hmoh*}e5{z%6Hi8&&* z_pbT_JqF#v9O@vy%PZZ{F0$4ff5KJsUMk{p6XCbkQ%O3pIiMD#1>)moYp|+v*_RON zK8VU<1RdI&^=YaxDl9=2h-h?2dm=1|1|M6e@zjXTZ_;LkAf#Ze5IXPgU2Q?Q?(?zO_r zN{z0TFL4x8N4oOmg$?Dl+e+Ww)4sdm;-N3!*5 z-$k5R!X?+*QkK2Ml0O`?pK{i;?=tLJ66P1EXi%8be{c7NAGaGV&Qy?q_aVe> zfG~Y0sO{4QJfGe5?0~ZUm=}38PqcZpePKDo*_vrju74ww!dF*^p{L}H7pPiTYK-ym zs6Dfq-D?L%rfGVUACGRRBOR1x3@2T7btj>6zh81mWvc|0&x(UOqy{AxiurYl>lXwG zu$8o4jq!dfedAuo*iCt(y6iOCbu!}7mh6{taKc*XzB?X-JY|~ z%`}dj=3t(RD14bHt+rEGck731vAHx1d9_10y3ir)OiIWXg(#+#eaucf-)K47-u4}! zv%Fz-UM#UU$D{tti8p0gZs`!yQ`Ea^Ol#}@)I(tPoS@DnWubgQ#rnv zAs$SfXmhQ&cLJ5?$6+91mk|H0uRLNKd@C9XSI1_mbgVDa*6)Khl}-ntvz&^i#p9xL zmyET@nq!1S!vnj4FVeSF2BOeo`i~ebXvH(P5USqRO_jjT#E5k!T}~(-LcZQJbo(5td!r#G)gxBtd+|^(9sekQ?>Glzo zV4diz-OQ-!1<*iim1$C>Se^}X)o74~STe#2|o zRA?Weh48#$GILuBvUYaMY`-iTHXf?v3ZhAe>ieKR-ryIl8o@8-SW>upvx+1@*{@gL zT&A<+`{UqI%t!6JM?eNelb7&9Hi0Yk$I?!8<4;@?sWVIl&n3cFi>wOE*Lzn6O+T|* zrP*Z6oos~I(w!^b+7Bw>M@r0DTTn^sbGnr;BuglyjeS~exR$SBPTcf#?dzHo1x*a{ zQRQ_Gyu9Rm9+bfpn8A}(Dmmn``TxweKZB=)Y#L3tG9WpHwmMXXI;#yxv? zgP8_TZZYtkKX)ty`MSWsqE98^1y_OP;$`GZiLEWacWR_83b)%?%KaLLZ!JRz)yF*y zjaQ-hw$Vvm;h0gUv(2(enU|ZzEE>h2xgS~WnC20?8vN~WqW5{VHPw0VUD3;qVgMtVHL|4^|1L5 z+;CgUbFg0uD(f+JK8TxDWLQaVNjvA!f(1o{d-obCncfrJHq_B4Vqa84Jf^=NHH3T8{)m;i9JZzoQjtF+Bj`^YaJXC(lj%U73xPCD{XZ={ZswDWT zbclUaMlC^%aX(3B)4en;`|yt}GpG_DHI(swPaxp1UD@b~B9kOkZ?$~?C>&Oq?Z+4& zXVj$0uGhGwAsW@+QQloSPI-U!DP+WA-TbKLi*_-g{wixKmbAb8;8@h#(IRVqwXKzo zFMt2(G*IA{1R_({EtkLy&>g(g(?QVv9P+VespiO;`SKi%=?rvhdoYB4^i1FxOI4{PL6xm0@JY>=Oz88y zbP82Wjd#6t1AzVP#ew`w8xI1&1jx(1i!zNZ@R2>yw>g>#Rvh1b?75%*c9YuWWv>nm zqhGrl9Q#nHFLzMH98&myuVwacW zO9CezvGUubHGyxRxY^!tuSMwb-8sI4sETv#2zd@3Q+aEhZKglOLG*|CQ!e6plBDb3~DQHrczc3v4@^p2%-l-TupXD2Zcv1Lic z(Bx2#QEb8982e?NjK7w>>6*S;*XeEsp#qu;76=VTP5`4hnK?A``aNix1b>=^8@fH^9=Qf~ZL#D?vMCr?T@XOkCOMfm zU^~XbNcEK+*4z5X^EBFY4Ad53k8&Rq^=yb{=R%` zFC8gvi6rdq*gM4VWZw_KFcB%!8DEuvvxbzyo>HJhQmtuLa4nP%Yg{z7+Iw`U4QP?S z&s0IJFXd5bI2)*U4sB04#W!~nO5Hdit)CU;WHReNjAiM%i8wJ1l^a? z3`&y`;ai-pga>>ppqm`2D=~lx=qs~fWtKb8%*%;#UT%&cUApXsii*Wr7*mA#BJgaA zspBUK(eniO{orW(n#swG5Z?~@IFAm7uQK!qKtu&*`y}g<9`-35R{ydpSwYWp1g~sh zC(BRW=9Dm9s&}1{dNIn~n3<664C8@Etl=2GSZnBu+@!DE7ww4FQg@_8WH?pN@$9En zT;%e#Kru|nPx&n;s`9hqy<+_)4sYMQDv#PHFoAMRPWHbZMq4gxlL^r}IG}C}Q9o!P zb6CgOxRFoRimOq1uDtXxz!%JlyIpj2`H<}!<@C2W;J>0Q{||HJelp#D<^cE!t3B$Z zasCuTd#wCJW(~lje(9tEDA~^nz>@k$-c5!v^TN0has@ezLFwyv09T@_2;)2K@Y^j@tjwC5%jr zbgYB`4ET%k#|(t`{xkO`<0CZt2v4*8?vwvwtpH%{{~;BSg_-HkkmCUWIg*H?0gz)h zh=ja^{)J$ix$G?#rav;nG)#|J%tLfFJ5yBMTRWuzUs1izgB-qCEPx2u$s4NXcUo~@ zgL!qkAmC2hfwe{UD8sGyc=d~&XmfbOC!28ijg!5l0Q&C~fi_Monq?pgaHvvx=tN8e|x^-R!e1-`5X1CZk&vWe6XL6ZA}Iz5{v-`%s< z7M*3$)>j|G+B&6zu1{8?v-mOBzA>(J#Kf!sclwi+WZ6Uh_h6!k*Blz9#;sfSYMgrh zXl5341V8LQL88u`54$_nEyyE->LZ0tIm$iTb{{sY;!A)qKAQKK%Yrs82!o#kHOU&< zWO02@vPxz_&-tTRaShsjz>r>cVBdLK_962@(mbea!9!)9~!;JKe(&MHn~WgFWC>W?-;^7+Kjwf zak@UzcbzPB+VS#e7z?p%Yq`ao@5ThDJK9!7ur}D|_|>8H&(O!&9nL-33N}bBVnDtc z^Q41-YT@YRS}uBz`kq^-PfjN)J;P>t5O+phMOpIuwK@h!lCEW8`Zi(;t>~66A;7Xr zT3&axMm0paWY8*4)h0r3`G?S^b%&c9UCXBxFL8Ix;^Uk{s}`}%>of4FO-PkU}*Q!_>dF7F>AG>RCz&De^9gN#TN6MZ3$R!BXh?C)aObsmvh zuZ?1~5}lPKv*(+AP8BwkhWx{mh)0P-R}8t~AM%S5Aa+)Qcw1}Tf* z$J-dH%@nkjR%wKw0*O2Iy}yT6AHT;=itG=|GXlij${;Frqu#TWL1e~|MkAI%WXC`; zbkNl7$B<$GVKx!R;!Kj~V9NTnRMXFoi$CtK8KrWQb?en@cy0(*VfMv=HKMc^ z;FVkeQ69YhQgruRr0*tujg2r3NMP3PJ;=MKZCp3l?&q0PM_bt~kU(-d`F+nA1B`Z- zIzp-$sL5{unkZxYp4mDW-XwK|nKMvwJ#?R??XAcp?6JDQG$HoJ<3;#j_b(+QJi7`h z*Oi+R%#SiRM}W*tG$3;W*Y?_Kt%ik%db$HEYZ@R((tQToTXj;|1EIU{dO+V1{}>Iz z8P&XOEK9kx&*^Ki^Oct;Cn^+E zefjI+Z?+>5f=CG&CBiir5<_o;>$U1gwCmn(XX2EV!yLamu=m+$07D0-e_*ki#{A(T zJE%)c#$SZjlqDD>xzjxK$-l9FAXBRMREVGbvRCzsT|eoCQ%bR5kww>g0u$9p#yt#o zONx`(oRn#NGWuDqHf6KM)MO1d8~ASrwX^t@#`f3l%#D`8p#ynEyYbz4wel22E?PE{ zn<6QS%Y~TolssB*7b%Zt2@J(nf zU1~g&a@N|KA2o>YqnVh$kySHKbUr%8hMzbRBw2G4eY>-WZ%AkO)r6~%`(`r)u~_VO ziMoc4mugz;a88TcQm7ZPSZjx^XJv1@`n$v(@3%P-1w*K3UvodAgrlM8)jkzGdw*Uq zL4;69Pdml*f>HAc5u7ApC4(@+R8;vhL8<6BC2DceZ$1yapirllOtDI!s}|+91vfgU z2VOC<)lL)Gq$st-(H0Q+Y8odp?u(kF7=qR75R%)24o8m)vOnpZXMG@S7hGmV(W~sm zhN0Uz$BKp2QB!pN+(8mZ_;yG=a2lBbm%fZePYYe(bL(jQ?cn-~YPcbuEk23eu<@rT z!903&D>p?NrrT{bgdwL=<3scnAYmi3@ec%ml0?lr7BQvVxmf7)%}!gqO_O)PlL9vQ zSjGxrp8Qo8L?%aP9bOj%l~UApgS;A$kOd(nK)-$p7joKHA3_Otjdul;;8oYz8cmW5 zH_Zts1ds!mR;4@VEY6QFGrXQTXg#T(3$f}42uZ%*!>f-qu^S_C0nQN+lHKK4H=?#I zlWmLMo<8UabXPxuyB4&GXvu zfC=bEES8$~GY@u-fIvW(n%Jei>d_FsTHIMli7i)F z^NIOjq@i&YT;IAmZzt2(;1|4F(bY~Hu%mLR6hfRKgaQrV3d3(xG%p*BVz(WB6|8-P znQ8!Gi)lo*$+?5+fY2~@@u`073U*l4$W#iBuKL5Nwf}(QM3?+AxjHV;(s? znwNdiDt0R5+JY0(nXVeS=5b7CTZ(p7&OHxG^AehYG?&l&w@= zCaZJ|SeW81WUPik3i1QU{3$ozdq3qNcXd*0R$B`vG|YCKgWsF< z=53>g3~V~Tt#+t#L2FF44w;{IorpXcPL44*Z7`VH?v#9H!N)hZ1-Vy+Yn8|v>sLJc znXSqV=FTdyk|ZM)B0Z@{Sc*qG@N3jNlt?Bsajl;6&tO<6Im%Q*GSXM=0g)BbLO$M} z)A?o+@-KQhWH3h4@M_n!ct<;~F>y58LpX;we#FtzA^>N}6W}Zfj0et=2;1oPpsmrP z{A@FcQ8+lg(nV~PFY@-({m(s&X!ey zQpu5CSUq`80V!(o&s5Ho;$xEH+|ExFMat2J^MsBrM$KpzTond_NjPaTTSC5R+ow9L{%ND6I zP}H{4y^S7%%AFF>sXFEciX+M6u^b6@PGtGVjlO+=Uk?a?b^-i)i>nL`PmtFk7x6$m zLtQ2o`gpkIf(Et1;c~RKB=dDb@BXft6~b0D9K2Wy{lu#ddb{s#wA@6Q*T5Z)enPS1 zF)#oiN=ouxs$xA7{4*}_)UiK&mUhpX6mth|eGI^@ZyLDuc>=e-x7ao*SXD-nHa62f zn@7b28_|Z~Uig1Z2_+|+0PF`C6&NF5mqy1GAA;mvq5agrH-e4s^ zYf5+y+oVX@Td3ujP1->Z-2EKGHy`hQh~meOcfVqwD;FTwxEWxFyOXrN-8b+C-$Di1 zt@KV|F?zoC8;1K;BG`+cKSTeky;hnNo0^^I=#7v_l* zEgi|(WnpA|d4m#j_Y{edY)795)zfwPng(~JO1KlxJF8^Aq(;7W zk1{-Y;;;DPjEr3(0l}QlJQjv`|nw-lduq(dA!kw=&d&rogi zj+kdSZ>CQX;5(XQIBvFR8`oz-L<{L*=@$lXrW_6Hsu?! zQ_1`Q?bXd7PhTqcSPh7FVeqMlfDl>}N!m5kB?L9h4tucEed0R|6T2r3i0k-P@t_{S*b03 zeC!R;Ig1pJ&r~sDLp#kj>E_B9g*MstbIOJUh}7s9hqD(G@y~4LY3#e6sr}SGeMkQS z1-K~4)4xElDBx-E(ww9^?33(CucAi2=2BS~;Sh||448+p0E9yWW?`O7nR&AV>4b%W zLW-gXajsZW4rc{XV_$w<Ula`bgy$TzmuEnL;s$N`ZnKqYtu*!0i9qJ33^ z%Eue+3nHz1Re`$5Kt#e0bO)Ks){2ukov|Hs1Wjd6xhw7I3uIoxY@zFrO70Cha{pQ? z$>^!sYxLSR*iSTl7DoH!xBcFdM5cSjkf2$x%`K5ri9wZ!Q!REM96BZV9vS;V z-|mKHc3|R2Co?{e1DRB^y!O*H-bA{UlLwRtO@}pKuqR2jm3b=G%hfF*h6DYOp;?T_ zL;kE1qdgH*Fzft_|e(B|{$W<(62waS%8<-fn2J}@9-DLsE*>@HQ zKiyup)TTi#YY`s6Zhh%OA9%LW7fF7`F#=(O>qOD8I4+sAbZ9z6-`!YS(nj}w$Ucdf zCCU^@bZc;A_0;pqgi{24Ei{K0RG)lfUx~ zU=*jE}uU@1`~Q2yf3ZIWBD+E!0`G!`-Z_Ou#ZyYEgCX``op1pYcfCX{uK7Y$a|CX zi|AynAD10|me1}EC$%GOPqR)%+x^;Lhl~jJ4hSBuPY51tZwXv~aO^qai!L@DSp8TQ z%m$f=9w=1f{J5^-U+N6>xVzs7@j$9-dRT(Lu;5&>{xX4)uxdds+86`?r_Kv?B>UDR zjG_{CxdQWTOXF`@7m$`2|5qI%N|*LY)YPCMw-?4m`UCkN*wp#dwG0Ge_L}3 z?}FsP*V6ZtUoCj;n={*}jbXlAky#<{NNoxC;nLjQHhFYq8v?|WKc(1h=Nv+G6WHCEZUCyH2 zTZ`aByya@URsoZ-8iKYP$96d8$qAG@<8I4zc%tZqwYEfG4(DoT#cAVtJZLm$4}<62 zfL6YYkeCDd2LIBIm4&%8j+c$5m5z{UdWb6=!S{Xc>xDJ=WMV^FK_mNe>%#W@trTk|oycH(OB;2(O@+3er6<(e+u_yzXXX8+Y} z*Wj%|*d)$-j@!;<>5D9krC@wAMNgzD^Uod77IrV;(MsSf`Y5Gos^+wd9sFlN{3El; z{aMtZBKgm|QH!^i@usC|sz>H-6C`7dTc59RV9h!+2yHn>BnSq-gnS|ha>N~^CX#)X zRp>W#gcL>w&2>^9+&FI?fg(^=-+){4<}G0-B?@0lV_X6wK>^z|j5 zo5muIm2XYfT*O$2muS5;oz6D(#95Frw0HL+J!L2&3&{$@o>}OyXVjLTNmMqU2M4ur zP!W9Ur|7FmZy_!9Fpu`%Pu4h^&niDBLfv`k@9OC?6j5?kCUuHgVCHe(*XJS7?K+@t z#iKMNuF{QY_745+WlzoOtWgr#5~t|?YsV4jCY?&g0TkV#^1)}05kDx@pnWH4AiwHj zwd+M#3z}v}OTHRGC+&+E8~Lmu`nlzEfFa6&z$k)Vn-SXpp>kqoY%o=vfa!=7XG3P} z%%GWba9e@LQ1`t-VbJZ^Jmh74gU0tX1-kj@tUHb&Q*j&j7%p*)+CGJ= zRx_PrrcxjCN35hL`<@^O*2kT(%0&QL(#BjMlhm>vyBfRL?c^(h!c(^Sf=4Lt@fU-q z?1IwKmxLJjC3iIHQ9VKcr>PZ~g}B9odiiqVp0xzK-KeD>=%5Z!A(tVdObQ%#B@J{E zlz-qr{g8Cra)O}a3xX)i!g`B1)VwoxgrJj(o%G}t3%L_C!+8AiqfyXuKmeRs(s9ob zLIr$Ms@1chd@QJ;;n`p{3IF2Y{af6 zt^nGGLxe_7kG%o>;2mJX04W%v^3@*8&=-+TW}9b&%r10btHGoG_YLK`4lT?I#G}*+ zE3vftJK#lNR%R~ykUWrNM_fZ^SClV)Tv-()a>&Ufc^TDq{dWSK^~%Rzre!2y7G;x* z06W!p1^VTYQ+%CQl}%a3$8b2$hhaROC*O~*e#^jDZzx}J6y_yC-9a0X9||iuD>uji z89z>B{H0y)16P4yS0Z-@x439Cy=bh@=deKyaM|vv2=AHsLa4($^)15(63qQ;zoY#iZ;1c*iw)kum&l=oox5-Uo5LnrN2@qH%@ zCr>uCqOFSpsr(l5x;>@qg@oC7!yH^P;ryY<@9#pghvf~GFEu$$L@msc^XoJ7Z`@z= zYS3R~QsbA#o{9Z*JbO6W&E~tx{vIEx{$1(*!YDWi;}BfvvI( zRvwn_LQZbWtrA2PActEpu5G7eRv$tvp1^m~JGr2)>Xw{4yWlp}kew{2BsoR^iF@Y$ z>Dw&%#pV^Ca0Nu763u6nga=`o=@OFQQaq+q9Z@9;7}eoaoh~VgX*o58y|1}BcKvTX z@ebsckYFIvj8mJ!beD|{jythG36q)9p||BLm8gQ~lAwf5qiI~#PjqxA!*JlA#Cof3 zvnhqru|#Ew7(RpfI)M>^!dvVl8by` zdiwS()7GBOCyDAVtrPEuv`&Y+DLPo69L=qUGT2Tsjn{0y%7AD=2i>i@jRWVFmX{^3 z=pfai)BQ;ChS89P?InF$N4_Hz$u}pctMMZ^bh5}85heLkxD;O%iOPDW+^{$mh>3d7 z42c2ikD5mkJy9wWu|^yprdmZx0CvNO`=JNqLNEw5n%kGb|;-{4BM?;+G>y zbp>FA&~^m%ojxd@O85f}%j@NhI)&+IxBKP06peE9dxqgY`YJ;(mwOTfm6XeSenWe< z>zV=1V7FGM6d37^6OL0YE*IR3Vw1#)=)|)X0gFr3_6-_YH3dW|`BqkX0O=2I32%M~ zGqcSlepBPnC67~5ugD+G)s2+%8V5?lNI9PfY;0Ds0jiH5lv`TUjnJC=$v-}IyM2SL zZbEGl#8^Ot{sALXY7Hh$n;Gshr2>{6TLa~L z6Z4}18&S$MRS@EqHzut<9LaWMGOHVcI zqb)ZF*IavQh`ks^E8U19)!5POuj-WEz54n025ap^`4v9ijIJG{zSz@elq8zlw6YCUwN^h^Y`tQBcEK@)ut1o(1I;MJ z4)dW_Kxzz8FA5km1MtYZEox!*w9pa6C-LSNG_AwNysh})g;wh=XdnM@5^w6S?df9) z7`Dt6!}*n!(R^>%`5H~E^8G}Y(mA}& ze{s_sMWN-D;HC>2-b9Py8JmMw3}PmV5&_qK%+0WFm#IW`8dY3C5~&3t%;d

6YIm zCldeWA(qn{hN(_SznbUxy88W8yEo4&eQZS*~4 zCV(zW*gOEE#pnA!Zq+Sg$#ICC zL}?o%w{DCo)f)8*b6Az`#L6=oLn;_=+~8 z)i^+0U8RK*(68+U=+8*Cb-{`hnRW(3^y74ZwBpYm?$GV$GR|3>~D-dZ|&U@1``9W1)t6VO7sECF~B|qIF+b!C9eBjiIrL%MRrH zNw1mQQo%(zxl`fAnW_wX0nUQ^Yt9A5QSNnH`ZCg{ElUp^&iPp?>j}bSGlHRY%j4wa z*tP{B*Ckv!oXa`uYSWJ(>uOT!mUHaT;no!DkjCi@=ea|8PVqt70IrRHp9=n+y;zLDjLe}d*;~m8 z_5nhJr*Q3xZ$5p!w}t(-%SGLs&^VZ@&zAB=k(>r)3>LoK^zDconjB#zae(}}Fmqla zfzB4kU3ML4-EXyq&D}A{WjSlVLBkzC*?MK`f|4I!-c8PKn*BU zpDX=Mzk6f)E1MyyE?Y6V8y_vIbc!_zdO%HJShBljJn-w&cUbbaz_pPo9W#g~olwW` zl?%EqcyE@~D74&Mx6a0^wL7pz+elohdLXReh<;SCYvqZ5d{Ho@Hg1O;@%Z^uW$B#x{CKkLVSQ`ew<~z>p|y*ZNfq0<@;9 z0!24B1XgQzEQqye)p)nPQs zLO6}Onp2#I5B~!)6aLKf-=VII{|cu4uRvXYLUNB()1QdgU*XqBZ0Zm2D<|V)jI#VA z3T0?+@QAqrT-E<*JU26t0OK!sCj$`7{b#)MXE3*}oy}hYs2Tsr@%(p48WS7qUr2=N zbHOB4h>u9x7DN>3uKF7k9Zh#Ybqax$8*85$52{3z~E6)JBhJGB4hN!yI3i*qnZ z!0JXs_XkM#A`iAek0!>|sTT<|3yskSr_p^L^vey$XP~@f>-lCbhEHTJfi^F_OYd*S zHj+JNeh8fg(VFpz<2NC4E^!bfq(vrGTH@T_-(G6m9_`UbTQptH(LdA;-|%M8`n)3? zL+96)nw{lO@Ng}ZB&KCV1>G)?-4$n5`_%3eAR;f`DDWKIde7zZd>`RMNW@Q~TjGP} z`66)3bN{7R<+g_QEhyjN9U29xxvVywM+N#tlbP&8W3`UFC0pwG{>9mv@9PzPJpWFi z^73U&3NzT)K0z71_2bzvS2J-byY(@JvH9zPPop@frI@uDl(_tAcLYBI(_w#Hrrv*V zY)i&}aC>2c8|-&eG8lQf%Tb8PLeNF5_v8qanHIuoN3cAE%yXDF&CjlOVbzTox@EwX zvN+`fHeYtC=}8zG9g?UWoozl5`x2qBWqYr->1xE{XO|t_HYA?!5!zrq=eO@Zrgd*x zGIQl-n(hf&dM{tHCf%ZFLevzEFOXvIF4AiLv^tC&wXws7v7~(=Fx{VkQ?S>prURR! zRIYm?h1hF6`MMJGx#5cx9!D3(%@u6*u|-$b0f`&83f=9%d7A_Uf_fM2D$*KN5%{BBUqxpJzN zUQZ@s)4Yj6mu}l9Pq>WCgzsK%Wynw;lm8p%xnr^A&8|mI>oaz)5 z&B>&ee50^^y$aJR`FcS(s}FtgNGjwtsP0qBLiTp39??hsB=RZ57i-EK9_<{wbyFqzDkVBooRUNNIT z)dd31^}9wJ-7+UQNyLWb%8B)QYH?Nd7#uZ)5ke3L?fUB~u?aKwxv{~-T0M8}Qti%= z0WEtavZ?yUBJaPjBi7SjjgPDvlcmGZ*_(=XsD;#$#qSHz$pnL5GEJgN$aJp44OQ&n zy+lXhPLke@k{VpB)5IkjL8HJZ8j3^Eq9%L`jx->=L8vR&V!~8kCg&#ix=!+n#`h;r zl3XaO772kAk6V8e*~YyY%(*DHyQ#|V1l{#w1Dq%zG&wO!Gk8_29yg@qR*{OQmQgES z`z#QMNGr7Q)7A`x+PTDrVdV&jXx5E5)8bmj?P~hcm)Q`!>@I`1H$coqj=SaEpJc9| z2x@k!bTnJv+v;m7PHAjqMcpq z6`kFZ3=bq59gom-KeKlMk5|aJ4+tjS$+tKX1d|99u^_6-BZO4uq2bq!+-&_kW6)4T zwydXs7reF=Z&0nUt+KZd$T!F?v%?28ZSq<_c?+xfcH(K`VY2ICwnOhQ z9jmQ&eZ1M%VuYoKF7v(nus76Ddvh<1bazLxlD~&^sLvP7f4` zM+o15h<7%}%mqrt{FCYca8%m2hiSPD*uBgX|DhD7Lym%8xyry^!^-5<*tXFCf@$*O zc88o>`%SF!0iXj~pdZ+wH%1HXScFA9UaIenp#@l)*a+4mAAJVxpO5ZlOf?^A+k+8U=-l7n0uybO7G+L$WfHgltM zH@IUvzQyX9cm+r!S;uO;tXjf*Mseil?0{l9lYG6<;y2lF^}y}LJU4&;gYZhP>E!+s z%5ml)a{9bV1OL~jT6aI*U~l3r5>F+d>)H$ip#6721JWW&b@w{ z@8l>V6oXNJ81GpU`Y=rJ#K-d(Mn9Ce0ZQX##Ou@-VOy=Zj_z^ltwp3kGNtS;LG)Hm zVwa6D@96lW8k#rs2NLO2;_qZ=A4+yyY9DBm3W{KTsPXP!A?)WU=5-xwm0~q}3EZ5z z$3XCD?j=Q=G`M>hc2q?1rBjCy);k^o+Y~l$`y1Rr+o+TMFO1Yv0{U00Ir=LwcoS1x zj(J#bLpI$#@-eQD%%=8ZqDwJ}Xnbtdq*TW*ojoV<`BQC_zTDC&G3uHqNo|j>ksE(M zep!j$;XV0O^_A$c@w2W{#r6`r6VZbS(rzlVebT*}!pQtvRVOuqV1-_Z(m5gJgaz|b zY<%=6C7L?oBu5&%5Sb2!+_G0~-q+s(bz3L(I5sOV$!LcB2Cmb0M7G}}z7#29k4UsB zP|x~+DW?gil5!@iKsgUBOxfR@?bSs`)u~E=7T{Fi)dj2MSVn7$o$qs0TsWBDYSz%9 z{aPrQ-g`|>x6whvW1nR1Mt3#Rd#c-C1x4M_r`TTwM%~G0I94U>9KHyp@`dBPY>R5sNdZ`L4iP(q*d?tW+Pf~;c zFDa;_(*80e*>O#HBTjpsU%dwxComP#H(zM2F;QO#h+xtF) z!{K&Ms?P)YPmjMSQ6zwrKb4olLGAQXy~=!_&D9zrEs4OKlFz2hn#s_6bU)WE#Sx3>valeYzlFxB;T$c8i=_ zyG?W$>Z&)YHBhZsRUfr$pzeBUmu0J=T6{E6G^(LWUYbAQw}O9?;SpDpfdu5x=C|rA z2}ELPvWDL)cs-SD39liT9BI-(5+MvE$Y}`}1ve+HKQ}o@E+3V``S0vON)U04W4(Eac z!Zft=8z=k}v?CfXG7h>J-DjcEwfFgEoBcU6&Sc#A=aH{2*4!gVB}!> z6)H!ss-{lJ`b&%*h`D0{!mn7E05L2=22H|$-^*iw+P~?Ei4}P3cznnBcRhj4|4k1+ z`3V1I4|;~cr2d=Pumb^ZoPU^&m9`Ps$U@uP(9u@gK-X3m7@UcP{pSlA;a?oV&J2X3 z{Zt40p$xJKYHy^xL)7F+~~1;4yIp`h=1vx{=phET^kc^GaJ3fSu?Z#?W~yrGRYsD`rFtx zmb&_nYx2Kp#mEG(a~=-`(C6cL#(LUdBYkaSU;*kHIB8q!Iy_F7`DeOQ`M-LO5lGU> z$pl#Y=e9pxX7z8{F|z~IoS*TTe;U)q&{W%A*A#5F+5P=-U}pkm_b>kZz3sm{7OX6P zn&a;xc)*$gR`TCX5C~%ZnNtEdn*dYwz<`9Gg`MrMbP_wIOtia-A7syCIA93(-NB2jP zjxQnTCX*hLlE4gUpn79Ho6Qb?=m8OC_;Gi7zsKw+5_+31>{{<24u~x!J$$~tYjIiIVPVou-eHN|HitGv@$&lqJn|hfz_SChf@O(;jEkJ& z>J~X2&W0GvcB@kqA0Jfyyno|7)zwLHtq5*40<(;)3~Xj@hZ|+!Pif3NuGg3E=g;$N z5iMuX6%u@T*)`9B+s~ld!AfS3GZ#izFs>IcRt;lH?j7TsRzTH%e|-MDD^e=+ zP4}?~nhh~%alQS7$`*QX`uDq!e=RcW%+j?oU0k{m)iXP^h^h#c3p+ZZ0?*yIzwTaN zy2F-kLFCizBqbhCwlQ6(R``{(^&(llAb9eu!Q!Jd_My9l;@a_3apt-SB|8aVM zT{sPqF|?DzIYt!z$N8b$itbP>;Hw&NbGim859Raj=lxShK`AVpk%mM>EBvX*i35g? zY^E3r>uwKaGX%-R-Kj1y^MN8nLfMW$2nrL}=J16&cIS@_g8%FMjKp!-K7qu}$qqyP z{&)Yg@sqBnB~E(N#|)^H4nSv6FMAj~3q=@F&;uC+WYAX;A-QIv*eMzp?L9#Q0;Iih#WgZ~L==n@6_4^APn;adJy@{IZ@ql5PHml$E-qlIg2Fmq zBM7zZv=d{+0;bBw@*xGgNsEVF?`L-ZR84y;JRTWKjvRFsRVPH{c%rp#7EiZCDKCq5 zm{~O4`lM(QsWRX>egAQ)rr?>Si3Xj5)lbYih)94 zV+f~>S+1Nm!q)aQOXD?Skp@=j8jcf6dQ5b=&F$C`)aIZ zilD->nh)Jg&Sz2B_h`RrF#J3}eoFlN;6KO{WlJ{PzjzUfd^29?1uT^`ZPNQ^62KCc zJNy&X!k42m(@uk`KWPi|F}sO_SCy{9r!z55J%#63NZI&-S)*HvbVZANHkdSK5O8T0 zCSm40aD2Ys<7Rs3IUxJ`r>dCt2PB<}3HS?G^ibAIe@t>BP@GPK>sVKJZb%hbw?Ziy zFn#qhuF0865gNbG5VCof*2~O33s^3%muW;7adpd;u6?yo)Xmg;z90p$0j8 zmAU5ohwUyv7qiYn?;lTp;E|~aQhHVx?h=B}cZH5H`xLzLeDs5v)%!KBUJ75G?(?fx zA`uq)uZ(uu|HCWRn)`=;lTE(>9#bVEE?fs#orAA`yx%=O-B;VwE$W*7lf+xz+R>1~33) zIj*agLN9dPG0zH|YB()p&`qo3hS14tSX~O!oy+C!NN_3|UK*5O)W=zE59thAQ{OlU z)*KE}M!!#2y>jifwuFe125`FSht#Swv+dvLwE*|4ov*`JJ6<4+j`~C3# zaJSmk>82O6WtYQr3*2D=E+4DF)~gDZN;B0{ln(RZ{^{ZF@%K6~DT1o|r>CzVnC@JP zU}5ok1j7i@MQjbx!y1%>C*s)Crb9|uBNr_su|Uh6Sr$L%2Q}h#%782A>EZoU;uYRc zm7nFrcow{fu3hA7>3)~;!x|&za3f^foYrRF zAb5Cs?{u&Q_}0Q6;Hxyg0N>he8u;abx8{iv@FEYZ%4=Bd6IXTW-%?a=q>nje?+)k3 z-Pg;*&-<4j-InDdQ)?C(1}+@fn9k34ePq`*hi@%R2Cwk0f%)h0+ELanhh6>ux_^I> z>5fq#k5ut1mmu0;tYHw347WHF!d%+;=Nlhw|lr@P#k1g_TBNBOkr(kucZt8Nh(&NG1G z9}C+uqk92(dR3AIf=DWo&QKx2NevjXN49ykLQ(j^Em?UgiFfdi@6QW;&j@)P?A!gv zN0*2*lkpL)1^rPxe}AeL;aq8((OT%3r^!$6&u4n>Vk7fatESvQyFu`ZivRR_-=!98 zm*So?@VC>SRV>aq{EW&+zeolrR;yB-eAYAK0l**q5y^SG@|~hED!3BXQCx-fXy)=* zlh!aj(;r_5r7x9QE!MG{CxlZ*T7$M(PGA)#2vZ&hU>lx6uDqEqkRbU zJF0I7n%badNU1ebGVXB&z!5EcM0 z-|QJB9cOG{y6Hii5rhOkGQQNV5Dol=V+xYRo-mLUx+rmtrk2IZ;eU@F~;I!IRnf$fd?dyJ{-G$2yFBwMO5*|kz35>x@KY;Db+`ri zUqzdkfsb^lhga0pO9`haJam_5-9_2Dz@vvL<)aU4*p;GyAp$Xqms8+=-BX)Wbcakq zo0FODTXa+g_~BHh2qF)kB6vr%ucsy*eN-!^z`x!Xfuqw=z)zxPKUV1F(1$S*;#WQ>E5T=KnSWLJm5E)N&XPgCt* zC>pDM-I8=g7e+F%+bsobLl(>FPC~qaf;wFO1;)=ks~PNa1Oy>i7z9_V`8Hfe=>p5idi=yz1LB^A2BGk z;_|(Svfc#4>)qRH38_WhsG~?XA_+Jfk;r~<|BX!9x)AAMybi%#F`@7BWQr*DwnM<= zR0ojj#33f6g~sYsp;IL-nyXr93{MMvN2R!h9&JwxLs+_v#r`An(*k_Xohw-x;0FPE zw@%k#i8d7^#R#=9iUp!1_#sH0i<5D=C`Pv{S+&)rQxsLNDF*q+U=ba&Pp`rfr>jDi zG9bzl%#`*i^|q$b2ki(j(-6D7fMAIvU>N)M^+>U`|EOYascRi1wW!KWhR~UvH`(PikP3aAA@VHe zLfy=u zpm=*N9=mcV^Hq!y0u7eVpin7v9u*yx^9Dn$&vkhqOJ{1#Ln$-KLu7JIxi0BoLM`xl zJ-wytIod(%Ql>;U8ZyU)K-!v$()oc>8JN}7AUA=hAlN9urUY(DllVYhqI6v6BcCDC zg}TgKs1d;;uV1=B}q?AskbMWvzK4OB?eniC?l<2o>W|oF0S$Hk?wi{IyXPmbtu;8 zUdGEazZN@h?csF_>GfG6snx39iHZwJY%@Ab0XJzc$Fih1O|XpeQobU&S!1%G)oCfe zV?7ipL0Zy?%U}wYGa*q`naamJ;lW%O$C8bpjAODK>FHb�!FfpyX4C?$^ob z#xzipM(fea7g8la8n?j&9$mWR-6-w=mR-^0(^yc8C+?GqAwAiL z%jad*_J>k4V5gd`(LTF65Z!g77p+SGA60f9pT0hRj%8ren_gwHu5zbJ^HiX&R)pGP zPrNQ(O1d%(g$e@nQ^tw)Or=@!djDaI7}9=)V1sisllx9Cp5hfVGV z-W;aYoJAyB=+Aelet@Sgwf(9CuZ!0}Lqz+&*J(J-?)F$8GoJw-x=u&F*(m9yf<8f- zWJ-N_I+ZGjY+hjp)IuS$+;^Lrvka2s<4;bmZ$c4+LDPh^ThEJAD2o`t1~`^6*XP~6&p)p|s=l_!1Bb06Df#EsN?1q2w~MH&=Wjs$`uu!f zB30LiJQKmJ6?~6#tGjCX+Ek&huW{XN+Ds`Ah4arpY9*LFOA%SFR%z*udjU}N z0_QV5?M3h!&u#gBz3@F5os%*!8vOakX5o9tEV?cGbP5bR`S{9 zLo)%)kw8%|<1jI>!-4agvh6BIB{%r9rW z8qHx-z!D2N17^DF6s+WYFZ5^@$N)+p$e*3xGoS0!=EcqZxKXiLDPX*dk;)e9TNPCw zs5k&M-(c?h)e5HHlM(f>n)HxzxV;GBct8LcdPu+D^6bKd;eV_zb+BorIRKVBSZzCT zsw4d$n@JDzs@-G?o3V%Vd$GC+Y5piLea!JiWYps)fBE?zHt76MpmRMof!D$QfOD6Rb~3%mS;nd@c&QL#FX*it6enu~K}Wti1V zyGxO@p1}l3Z(6x9nAQrLWF2J`k*$9s&b^)@rLlwxOWL-{aROU`kQPf-a{Tte?YFBrWAafP_ zq-2crX@DAe%uJ=f!&dced%7k#7}M8tA%!!-|5}7+knl+ACOD#&`lD=Mwsl41Sl`H0 zfzbB-j31mAVk))Gi-Dpnao3yAO9hj;!?C5_-DDQz*YwXdl@%vM{qCrzME2W-L(*Db zl%x}oD8goaCwY0b%L@*+zO`8-kChSUI9h8G`C<2zgr?8D!o|M4YH=e2j#js;DW5Bq zHaZNl{m$h?43V03?RSnVoW@5itEw>Jd3`sdO%wN8W6 zt3o0uYMEYvHR@}xwJ5}`TlV!a*IB3@*`NRZYXyd>gBghRcKYO#fb?8h0m!RMluJ2q z$O_O^q%C)*v?%dONI31Oq}eJH4HAlZo*yUW7IyhlZf#s^fLKn7v0OIUfW zL6o_{r48(e;D@_K@K%rs;AE@x;Q2B)?vMcfeE<2tV<`0wrm{^NOfiF?qhl$8Hdbl| zL3e6X1Z{*+gW!9uUUK*2{Z!+e^873lmII2nd)~dP2=YB_L!26T{X+Qws{#%W@fk)w~*QgxA zoSU=)b_!mShjux5D|%(%UB=WkDdr7$%~3403Loj|VTlm5O4clz#p~Q^3gAFv93`K_ zOt~iPQ=Pb5Ax5!%212fm+rim(;=QEj@8{QI?Z-_(kJ>9ryk~OOUJAw_@&{N#4C)(L zGvK?Msm37i_aD#aGw)vg75Y!f^`^|WH*4hxCWAo!3%dbdhApO{LF1}@cOHRt zURUJUnLnn>Gd+eW4cH^39ywK2@v7bYx-ZXBGON@GB{^f%1xJwSa;B!AsuT83vC|); zf_o#kU-Yu(0C$})Wd;Z(tr=eJ<*t|pnNr%(=758*b1*#Kf1!F8H^WOUoTit5dlf79 zn6xrnf`Kp^RTJn9&AC?B>L&A8xG0q@r}B9#8Rb}d(|JCQHbG40_j9 zb+Edzbkb+;G;SrYC0vYY5mRfMPB4wfw3^CuvezcoMKqJsw1lP&r+n;e#n@_6{<|XT zu?S|BYd@Z(`V~=bE)L_c)f*~37cBtw`x%d-xXS2bdOSZOGWL#?yrRw;ughq5FA$?} zdd#gDd-=WwQ~e`0xIVxG-;28J<9H6a|D~L)&NMZ(JQVuUKbth!0hy?NpXGGlh; z(i%iveN|BUcLMQM{irk-ZkxZwZs)($d>WAuz*`WVo?nR#D!6KZWiH*BTJA%lAVqzB z_rAPsT}G8xTx`7{3wXNIxZ34(qP4Xw;2H8}b3CmlY!=VA$-GjTqP3?l;2GzY-+a9$ zJtVX&;2GzY;%U|JSv*uP<7Lo#ic%Taq|b1Qx_u`Op;8a_D_x%=e-4oW3*#B*mEvhl z?X!540Wpjym+p-s&&^DjexC0>b;DP?Jf6)M;1a5**8x?!-fb4c-27A?pn5s;0h#8} z3~0EigBHlNQbn~0XES@&Vfm(k^a1NR7L!r3u^<>+!qP^TwCmE1g`ML0w2PQbq|3%5 z$7ijoz01j=$@>kCnr2ecGdi(6$I%*F+Zj!9RCzqdVWNFI4$KP0e>2_#q=~3bw<2kd zVn~|FkDDn}0mpFU%Bn1IhiWtH)A?*on9p$PCWulp(WcMLBARAl=TxHgDa|4hl^DmA zuaXJcWtF<*W!|7m4RnPX48}bQQJmiO4)z0~3J*Vv^ZA$$TbqhB*u}^i;7U7ioEc;Z zkn5uWeo{VUd>D?1-1G#k)`%-GoK9ZhA@MWuLBtM|zk%F3&M`IMwVbm6^BM%3ZO}Pi zDM8y+94nwDgl6b5hglt`0n!ERkMqYFGB%Dihiv`WKlPGJiCXS`=eK#p%1#S32o`-^ylBA<= z_wVmDHE%9_yu^czoedy&H#+E#B_B-dy4s|K#mvoPmx3qZxD?Fc#mAJn7j>vJC?=2u zIH|NlaD!H0dshPrrNR1o6vW?GQHEpBWCxZa|(!Ouk%s=jX z4|!qV*QC#+tGBwlZr|4%sgr#;Z!>f)e?9G~7GdOPx@KkLh69)H`;MfeQI8EBPxd`M zbqB^hS`TvY>At5Iwgg3GlV4x8?L{IfTQ{{obasN@Cu5qTGfRWU<(7sP^3nlXuUW{! zQJ278I6_6{z7(sxwq{@r?WdKH2$HwrcHqlj--crZuzQRLp*qr5b(i8+YY_u8tKk&wzAa?Lg`4m>c9)}xw!Ky%&KJ$oiHXc7bx==^KH!)3ozU7Dg4Y9I*mxzYq!R8vZhcBJ_filtF#`n4J8v59 zc-|}IrJcwAF}Lc&l`UdwF57Pf9;s~Cx2XsDzORncB9j@B<)-2tEPxd|4>t^X4 zT^HD4+jF(9&4+3F4lF+1c9yQ*c&FEgOWWQCaJ5~FMUS#wdf~+HSBVfxC$POSsdxld!HWyfyIa|zCVH7c zpYES)#8FYvW`?jX2?7%&k0<3aor+WEHh1L)2L1f?dHNFz#`DLII}8css>#V2t;IVP zNtiOHDd<~G%~|E32PJ__SGt0(uIQCA4=qcaf-d*Ek+E;+_55&8?B^Y6ZDxR*GZ#^d za5Cug_qz)@TkBQHbW!1IWS{dhHS7C&v2!n^ucq0I1!C}F%z*6h56h=q`*vc{X^}*BDa1ISF`&(zD-2Y6yyQ2KT%GRURnN?@WX1SE^j? z^CQv5$j;&Ds%g*QXg$gq4pE^C1DS>$PZj+MNkhT!DEaS;otW~kwR7cv7JhlAMUNcn zC1prd<+-2f%(k_T^C=SjtSu{HEc@Kl-^#TP-9e^Yt~!!?*G_wFEkn zvd>GSZ>2K_FN?PX-ZJ?D{`#HRCY8CGu3S3*HoeJ!rz20HTQ^h&t@r12Td{X#bi4H{ zX9!+SHMM`AmlkP#+#nzZ=j-kB@2L<$w|V;Frtqd-g#@NV1(pQtN9q>w9;-ObW}W(l zHdIDB9#i0_Kc4!Sn;Br4=}UN1RRWu?f$pMjHhI)hE08s?@A!!pM_ueqgU7DG4%D2& zPAMhbVq~zHiqw>xy%~`G8m2Mi?3HdlDI=lfoPk*5DjDm&no)NW<-X92zE{ub>26L%RX037lgxw3Ki+IaHib14$3N2BYYd5Xt7@U*&n z;?1jGc&u=#A*6MDJgqqZrD~UA1iF-({E!lDGZ8mCz;Y6}jx$P-RFGj#wW}_p055FD z3tEMdPP*l0LiCb?6kBemVUGZVL?pOWwQMttfE+x*skOQ=nZbmkWc~VHw?ZAZ`C~A3 zPjB>g8MkxRF9vh_vR&NC=rP;?Nf3mhzMd#S_N%LDl2=sN+;GGO(mBF? zDcN1KnqjGB)dCz++oZ$%gf`KveTM*!J?0}-MT#+o;rag0yO*!$Udxbv3rWvbrbfT@ z`}?d)elRWx#i*Ki>$}s1NVVV5zr;n^tbkh@~roH9SyOYn?LSY@OTW zjfe!A*HuE(!W4r9btE%PH9E8>VkstxHxo4JfZAZyh$d7ITby1SxOf#d4Ult*5T1^& z%}%)jV=0nc5azE!Ok)VAYAXU^e@_N&yyzH3Liqjao?BhEm>*r2UBbl^BSR(OnVqkJ zdhNjCfr(aKZZ$xQzmm)ufMY-*mT);rZZeGK>d#&$F z?DLl)icMtTUl|T%F5EwScCXOy^KG?g`#C(5=j><3Q#F~{YtEed*M0YS9pX0XB^wAO ze1=DUXGT#>4h*7;KFF}BBKhR$^%+F1;VR$}^(_TRSIrWq`fzJ`nn$(1jH-3-M^yEh z8mgcao7~L#Z58|s$uqCisHk=&2k9kfL)rt9^4g9r)4$g@cV_l{Y76@<(u&R}L7~cT zmDHsay@@IgBk75G&u%Jj$cbhfuYDQSK!fwU)fUOPgzgdnZVO(_V!MJ67UR-Dd`b;7 z*hQ}V-gKI2W!~qPYsAGZb?|U*cE!Y=&mUbq5oJ-aj~M3CeO%!WExIYU2>JT?<1BN} z>UORI&(vD3kE>jLNbg`NcPHG@haYR8!8}_jWhcMJ*WoqlQn<%mW5q z1;T1RDn0dZC3<>hcw@8}OVxMA2(=1xYqpVEKJttS)KX6^VV3OD|HH+R0B~SNj$9 z@BWkHFbM5>0TknPOpQ^l;fz{P%i<#{!yMeBCI{tyxL$w{Ip~J zwA{l)LAr@~q&jvls@4jaWj#A59zeAm=`nwLsa(ZDF=iDXS;0~>jFrQ$n9{yoF%tCo zx>F!6d0!qc&!Hs6ZgMGsJ-<%;lDSUY+B^jFMlq>qmC6Gu{pZ44P+a2!>*ZZBG(l*bnh2%xn3YjiW%^mD-^#l_Cq})JV;`eHwCmhsb zBN6;ENh2oyyUplrdGRgLF4FZVa04?@L{pJ}o1)>(g`K z!*Zu1ZsnX22iaG846W4Q9rDxm3y;o@YFa=tflm*MX{{qXYUU>^U&NW2zFU`D0A1IU zmWn8?&OL&1%&(q$6+Gf`qm)UBKciw?8A1LyO6wOMM^H{%UmS7y#7zaq83fA*pp^$( z6e=)<2(fU_+dR?<^uPYPKq00UC z?hS*^H>`~Vh|vAObLch(Vgju*KJ=W+3N?*69<*{l#s#~=d)4;4zR<5FfH-hJ;aoy% zlSwDASKW>_X5$TErSr9b2Vt<11{fos8i{< z_4<_0MTQtj`gy4oj|kpLEgJWxexAA<>> z^L_bzK{y;GSdCpZ8rL(GtxeL>=f{Q5w=0~egLYB|bGz_)>jKs1-Lj_#Ks5;EBZ4bR zAkx?M0OSUWlF-)7w3L%%raAWJ-Hn314krJ+&3GxF*E5iRUS!VZ@UH6_*r$xHHJ23Z z^$g^nmyqls4Yz#Woq-g)LU~7jefhjQ1L@}qu$kC}%JAeA+nel3OS2Z0>@_BbvQ-WtY0W+<;lIIV zdQu67I-tx{AeYL$j!d}pk;@a3Yx)GZOlQQn{GODXU3rSpU7%Ej@tAp-Lw>WWliv&x8y zTS(FsSG2(pNS(92)(1U5nu14UyKY^26fY5{VVVBp^scvRd4?yQTkFgYW0KKK)Ei@C zC31O%i&}Da6s2v2ghde$&v*#>&ChG3T)1I9B0?$fQ}ihh`GY}j+)2iySfxjW%T`B4 zKBP8ODP5t5x6_}+S+ZAL*MFKTO)Zo8`c8?zRFz~d%%d;0MG5X~6tw~`o74-V2^RUl zo?c(yN)4udUGnvHyIX>dWhqB5M{wx~Ygyh;+$#b(FYHkp9hI(6!Bk7}?emSkL|Myt z#tPBuU>3lG%mHv~N|+2p2AT+k&V%b}zOLf<^8R7zIxgr4;{L|h!SMbsxh2x2I~bGv|ue^XrF(6e!Kg6(a+kA z!%UPjA^#JnV0QMt5f}XP{HW&%%RU_P2!$*5frHzJF)9=val1&{hdc$#t?bG5YV?T3 z(On`NoD%61qxhbmkTS`oiz+0f0sP=Ol8*eO1}rxnWOD=4#~X&zcpDy63@9E6ox#k4)vV4_zyERWegzhNIM%7~b zdbxi(|LCH2^C&X+FU%qRIR5|{Ne9LBFmoBNK-Rw_sRIUCBebuQ+SF%rLGIMCnBuFb z4yhUPf+FpxdV;Zp@`72TpgcXi*Y{4KjQtHrm6=7EsiLYvL3f*m5P%sndqK%gFm|fM zAx~hvX0n}%GiW9?;dB(dE>+iKS~A+Dg}8rB3^C*0)dE_i$Tu@yJq;w-P=q{Z^1$U)-P zYYcihTzS3i3nq>_FmN^adZqr5o?&cyx4j!zDwSU$whg#W-=7w7U7;S0xIWH{b1aJ6lA1hXDybv=z*2eTf{Ur# zr+)E^v{4rSm@e2A9Bvqzo;g}t{403UfNLU|EiPQ)Bufj2mQkpG&El-M4tbFO7230~ zDF<^APq|E!0PaL85T0JXSj2S&rxdPxl#8Tcz zBh<&}_jy5`YiQyGSEom%66_VkdV;BYR~n#9xVzw{(>0pl`uKI0LtF&6(z5hA6}!`g z^&eNQ!};?1e8v{Cfc6Rj`Gc_*_g%lO>71{i+ojeKsD5;>(9if}uEHdCQdm@tFUf_f zYbIA1)AQ-`{vx(3EPr!$kCfP6VdrV^aa-%PO0iubqjiUZL@l;-;Y<`M?ZQ!0#C?B7 zm#)_qaOSM5?kb#w+MjeV%cC52vgwR&GG|VD^O0iY`tCkbVSs_5bUf+B9I3HV~ z8q1e+KsboBIjSkiShUgUZq;+b<&ym@x6-x!nxRh4l&cJNJ(im3+%IlQ5Xw!tZY>h2 zFhzNV@t6S?o4bq^{qRzq{t8o8@f_CLDc$AEX~J}?W>+64WQVF=yd2d9wv!qCW`Z0q zP|;#x;0RU@Jrjz&row@AQ8uH5^&2Jbag+(|^FXZ&l95n2<(dQ8CBSY|{X}3)T=}=;B55DCP??rj%U8 z2Z;2Pwari9VvNgxgDmDQL3^L0xez`gL{qa)9Z(t_b$MYsOz$-wDbE3$`jiqPIE)8V zP8~~X`@O)C2P_zI7G`vTPmEYTs&tUg=mLiru?$r|_W7#@7dYX72&2uyq%Lro0Sgpx z0m}smWxz6F$qUFeW{>Z?~ekw=JL(C-ltiYzDV zY2E!izV4FKOn8a{UkdlEc&R2cHZ0n)dSR-Qddu?UbGo3Y^@w`%m5*i77}=v33Yw+2?pJSTcJ&ex7q=7uY(;S_+>pv{|;lo-qA9eW|8| zzf+o?nMRWiz@s?9+XLB=YkXb}_}53#)2Kj{!L`o@VJaL)om41Esdq_9?X9+sps!Mr z9;uRlHwQUXDoN*S8N$ec z7i&p*%9O&s>4LW}zce_8swuhl)6|lAzyC!-0RakSkJdABh`O=ki?Ra@l8T-eK8YdE zfo}GCW2G;RGzAsCsetJOm59D!0aX_f6=Zh+#PT}oRqYON{u8-fPN+7wsaZc_v1hKGzN>o|f8UF8oTuT>#`T)V1Y z4F#@Bc_wVm6RoRAKr?{>tyovB-ao~|=_OsDBH4Dyu@`M9J*OB=8!U~SFmz$&5_RV0 zlKSmaIgIO>vJ-nM01dgiQhvH}n_ZHbD#3OB@akBB6J-0|hBGP}typQ_Yf;o0pjMit zw#T=>RJpW>QZq%pcRU=yruXNoC^oew)(k*d?+Ji(`&zSQrY6!sPg4wKf{+%!AuPfs z#c(ivvb8+4k`o3!&o`FInSj1NKNEaJnND8Dcp0AkSsn5+A}z-cXlN+ri87KLLn{r9 z7>Xp-52KIp&fgAeMb;Ss$5BnIDgUiFil${(k+|db=G7zM>N@#Km5$FXKGV!5q!d%1z&;F{#z4i1n-QAhXqx0aI&<} zWh?5vOM9Lrn_9xUkC*2@M?K5ZL4<1BLLEg)0H;=o$@q(eSubw^&S`g>Yn6i&jQnu7 zT0mmH*eMo?e?1xMQx|6lsR^g!1uH+5w*jmFr;H>QYFgj^WFQ?5VsLSLR|M%voS(`R zLv=vqLumaqGeh8MB=Wr%CeoVo8Z4*hH|o=L!b~dK6+$)Y4AYfVp@PDeDt!KMn8h89 zy;n2#HC(Z^wHgMp!z(q&WvSMjKEkS`G?L6SW|jLly$xE{FVCMgVSQMFfTL$SIhxic zKMti~hGiJ}O12J<8F(?%1sronp&3KJqWLh|z+@kWc)6H-wZrnfX{Itw?XVew*P0ue z1Gn}(2k#F<+HdP}0<_u>6=s#WJ`dM;A_A7F+j9m(kW#1P5LG$%bR}gKtv}EPP{Auv z$sHi!O2pnLBqhhu2Hvzo=$Ey7m*J3OXnpHBhU#`BTkQFZ{P}XMb7XWqMkZKl;5`RhtVjAniF=ZH23(0T4f81mEggAdZ@p6&ds#Dc( zv(u}Az16CPPpro27)qJM1suKMIK5z{irip9hyz%*9hd59GtgJsfZJN=?Eof5;F)sS zZB@n;`mzB8ULIcGA^e{ulf8F}&SBWBrq64BoF2YPWxoH!^=$P{$B^5Gw_%1YU^}z zG{bGpuZl`w4uY}jT6Z<2;a8s=DjuNuHYx1h3EBJf=C^8Zii=v=cT{p7-^n`c^8nA= z>1(qos;&Tf%|WZOdycD>{Zm|2jmjTwktV9rAZT+BmutjT&(UeOLA8 zu|(uSk735LFRj6D8K0(l4bEaj>`XhCF_vAZbT#$$nEtekP)jI%rdLGr2W(nJ;#!O~ z0`HKcZ1svOQFg2>y;aY?pYfBfh)myH_xWp?hCS?|5PZpMLS~0^7mZKC^Er+gy ztzDiRoAh9}CevAj>vB`BL0FjAaH^lC&jhDRiits(Zt!ot4(|!gBs?j`RlZO-UtumC zRQH}x4pfiIQGY3z67(mTTs0ym8eV7k&k1m=8ICy0BU0n9RmNByawM(saD*Z)w8YcT zAxkent6@cCLrb-O=)t0dyr}~F$g78?ap06GwTd>SVp_*$-s4n@Vl!SJiZh#cbxwci z9@IyJR{6t>#6Ngp=s*5bfjX@v+u-|Pn>>7oH-R240c1fG5PlT|Un3q6rWi!w1#fQNZ_7N_r&^ty}a-u zTW7h-XVf~EFJY?8H^;P62+Tx{iA&o-r*yHk7q#Q46@}DRm-mp0*(Oai-H#aR7;+3Q z*fl6h_oV>l_(Ja?uV!ML-qDOlG#`dZZV|jcqPduHqu`~%WD%jeBbox6u^|HEZRS^C$MlpRctx{2|{$ zljqA@K_Y8|uywpmEeVoW#^)_cTt^{?dc7W^ww?hia={QuHv#*=6w|#I$=fWMJhHth zbsf7HCIhX#&OjEc#}Ld^A^T{vbZfVSB#n=tRDi{JutKY+)2f_gl{1DKqjRfhbqSrk zh(*BW_m2|VlILC(Wt!(krvP0=^gO48*-i}%zd8}>raZr;{aNKziP})sj~4Fk*Zo<8 z1UO}o?VBVSFhUun=?jWHV|aHfo{oj7&b04;b!pssPt@RW6%$lAh92A+~z3W$#yMgn?q)EgeuOtx%yY1C$D z?7OaTmqtyD@_eV)t@f%s?>l&g`u_Kq#@&Xr567g!T^jcq50a*@>pl9S zdK8CCqjs&L1ssQ+(=RiyC&1HVk`7!?lZBZ--+#!j4GTzNR_pE=BfH81yTb!mL35(r z`u+M57swK6N}nmTw~hO#>3#rjMO zpT&3$E;B#R;6gr9g^m7k#2G2sd@nP&3Z@~nD4(HOvM*ukO|dz$Hf~PcXB#jK>+a>x z8a$gBXBH z;${KHo@6Y2jeR$bfbNW;B}S2}{N{g4Gj{gK0|R1Ck9`Jpj1| zy~i9dvY7^~o`D=}gKcPXOf|^n2&59oN?AgaTelu|DPO?tu``g>E5zsHF69twn89RU z1u^bYUKB>JgpZH;eIoPvE~V!I{i8V$Q@C!M(lywU@zjiP?5^9U6l`IXb(`|ZCB03z zDW{~$|0+vTmwhwrQeHr)efRH^&&OTLA-2%CQ9UgX<1XFikvWovhJ+f(#CxqirfpsW zWmg^xy^-ZaLQfs%iyp)o-J^U;ec$IhDS~))>EN4+Q>ee&xoAqH(Mj~{f0W*-h)ifzOfxXc4id#L2X#3RL zP{DiBX+KH`{wwjfyhhP6ol8Oeq2-7 zZWb3l)RLNw`joQN*5^79!E!uyGh&GDE94!XsT1u7GJhR!!^M$_wnE^xDLu^GGRmJ% zZ`qkbnLo<0+2)o`3a^Ck3(uJOe%oullkpU0G4uUO*1qx9m+@>1ZOSLRm)Jd$(D(C? zA856sBM(}P{kHf@y9nWYkK4RVfwXua%>y1Ok-hICm1bH;`8CM?ohfo|Qf#e5>k4d3 z$l5H#9+~byH$zRkBA8(Yy7wbvCT+Do=2ny%DLeJoK2;&FZf#_54hgo3FZ{7xczBMg zb@O~iR3AU@zrPMih`F?3{yM`l{;G0icwfq9<+9&2Lv4gBi!=TzG)qWY&(R2%py{?M z7cZ18+?lVJk=#u@k@>tV-)Rw@B(-jODaV{8Ubn{C)*?(~@;@f|lH#g%PQi zUt{dnE*)d*Ivrt?EhwnQJgxkMwFzgl_&&aBDt>;}TX%4Rq>PUDReqoaee`>f%5-h~ z!DUn(XUl2As&&|3#I{6V+E{alQvZ&NVs2~A0&=}e9@H@})nde@!JtI>&(F`{Y0l$K zp6hUE)c*!W%~r1gw!GRi*o#*)!(`ZjGC>* zZ6W!+q$s9AYOwSiMKh9|QOS`$It(J3N<~XK@nJwI z)iaj2h^ZM@I=wcAH<_MM_k}%k_8CW3Z_^cXEP*bgbiRn`@*G=lX)?z$t}{=DQAnsi zmML9s!@)94wV?2TC0%pVgp%1+EX~Z)Q`M%~+IYC?C=4a>ta~-$u<)?X4AZJO!GxQ& zq-k@zo!VumY0ckYfl^oy=}S$? z<0@r8fw&E60C&RhcCUoSvQRmE8@aLPH>tdOyh#@?@QVh%E4Vt- zc_Dk#i`c-9l}%^54s@jf|A4ra5)w1efl4|wM&vH@ZRV7=87j@<>lZ3ZNd&IPJYBoM zjC=_7t>P}lWo91E^ZSJMZ61Wa+clm(N;Aija>tp}gr*J^0$vX)9i~1KNbTXLb4NIH zBxd+&k<{lz$Hzft2I3-dGmug=@GNaXzKVJR@_XNs%oYjb8cU1K48v8s0mD!1R^Q~B zSshn-m@f{%iJNR(grPW-m8?4EGni8B#w2rv4F%b57;xHcYpW?KA)mJ)8= z4s?eh?R{#W6!#x`FIaTMC*oMX_(8dCaeTcLcUU>!;9I!hZg;i8e0?B#SO50877U%E z6s-ha;C`LIf2xebHqZMlvF1Zqe&rqO88^}fQ*-BY!dw1vetnVCX?4t~C6 zlgi1;qs>`XE$H)qh%e1$b7%+0m?`>$7ZC%BIB3wRNZAHM7U&YJICh$X6@ol?*45gXfA>7nm`mH(OC|V`AB_UhMdO zdRw{(TZt>f9{lR%qGKL~&<1t<`u<9`^8Ne25z$jKeb%=#p~)CJAD2}_N5ALkSc-9WVtGat|L6Z%J&M0E8pi6k<_|f^)Vt9q?`KjHa#<( zt_f2w5aX8QolpUJx|O9M>ZKCntsS6BEEQ%b{Jl-x!zDg#Je{Spk-I43f)k%=oeFfF zM6T363+Uk~~{PHVaJpAh$)%f_Ijc7Wu z!im&55gC7O(R z{%`A>zx~($`ZugJn(+EiVn+T`bMGtK0oyI=p)BD4``h}^J*YEOc;km|gvagyT;egi z4LtVycI$G(f>q5rEc0u#<&S>?du`Jq2_mH5oe{kGI$_)pEf z=N3J!9WhTAwVsv>h|3Ts2ddx6E{KO7%BdN8*sj|y1fOPQU$+-+%r3^$%~~AE{~nw=O16o-~5li`#Vmm0FjXY z8Kc5)zyI_9zP=%>dw;XLIqp_ByZ`Ox=6~h?eD~kapHF=7-%jB8{u{3&|NJd<#b^KR z^?Qox_W$EA|K;1;I4e}el+rf10J7Ush*Kc9>v|1b3!dmSi z%D#R)Whc69_zF>K+V)sZeQr!cl(+rvu=2Lm>Uh+3o_@#qy%krowj%CX+e-S*w2gDX zfoa>ow>#Rpthg&Gu{njMZLPQ^Yuoub;JZ?M%)Yygu!Mw%J`P*);1(9{VCzQ$?J?rR za2@7x+{ld7;ydo*`cX5<&d}=SSc?3$ut+Ll{cg8$4Q|UrhX#8L>%6)NdxVjHqn!B$ zmQC`z#din4M=Kh`d{?Wr%HOy6R`^ju8@a)u?N)}17IuxkZf&Hh>Q$fiJA^Rb50pkp zX7*hv#b<3rNo(4m;Sv+AZL2_FYeRGnZMR{MD3>Imu7y1y>3Q3Z3*v3Juo7>hTCwBX ztaf2t*0%?}tI+gII*a6!rj3G`68Eg_R#D7t+nR?^Lfb|ubj^3nLIP9M29N)h+m5Rr@EunH z_COgAzi+Ufa1Qp+FyFWR?LN?FrndF(Ah9k-@bt$~DI(375&Oela%E&$uw}cJ7T@7EoQ)%%sL=0`dKV6R z+)3SN@f}MLR@;V%WP8rS?|t9MRp01&jVbKI?1EWl-{ z^=4l}jT(HU*7+TTF!4~O;Ug(fW+;P2RSs>%RAb+jrzourVKl%7Ss4K?$cePA!=4kO z;xr5$@z!M!DZ?iFa63>n+BKz(M&HXFs!M2N{d`?eUR{=7@6eh2Ozv-P!g<-<-Z~Fh z^B$}76x#OT9B_@on(ntjMrRVmLe}gD*TZF%HM}w0%l$2HhuXfu8{^z=AsqG{6vySn zHLqL+x{H+Pas=zQclm{Rtd4&E_Q=Y9uEh64TPo=TYkes7cW z%(UVBVX+Nsij))h0=7OolQ(N_M_79u4Ikg_5#rviJ)?u6hqk@TFMP)#^6$u$wY}Wj z#5JXDd&dXqpE7_@=@xhH;KjJ%_OyN5yOlaFHk-_jCoo0(A zyWMAlRO0$7Z5(LFcZ6GnHk_@Y4FNT@9pikDw=VC(R@rrfMOkwm&v%<}hF0hScK7*i z?{r+O+vO(Og1m-Wi$v*T*`XwcwxCA=iw!n>w-5Jng_7gv0NK%L7;mO<5*!~gp|7)K zGrzycT;Xh>ipMp@CK&M%hwA+vZd?~f%t6Ww-|>iaXxq7*2yA&MzB#+(um+kabC~Tf zS~t>i=%cvNT6{!IhIKyTl66?R2Fyxttb zondNmz7*K=y_6v9_mbDV>C@HvdeX}Mf!(e66TB05ax?85M%~4HP<jz8^AG**(Xp5$tC2Ou8O`AQf!Gv|-&0{bG~}ZD<#+<67;B+VeF) zdeyyt=b?Vz!?RygE>y@a+9r$8HmXFFyX51LQg z28$1V97G0o&c7op-N%AOHLSf1fKE5CI)<}>-!#alM3+Rl=}1tdjYXks-p6J~ke7Xj zD=^3hh^&zg;Zh3sTuuzbhn5oV5#~vk1vqP)Ks&MI2HhUZdf+{KcEsmPoSx})*i^ZL zK4#d0+ZjYAo#t?hwyyip7S1VcfyU|vIxmAEhqFc-mWFoyXv3Nt+P1FOvdoeGA$f=W zJs`z7KJ1;gR><9Kx{n3>q~ACC4fGG{5@ac~6tqd32TSiZWWEdj51blAgcvMVB&Qn~ zi{n_1ab30q8M=JR<_6y}-w})H{ox>1!X&v7M-I+E>YC8|u zJ|0_d!=`HT72lD*=igxh@N>$Qai9N=?R9x$r)d~3qpiHx*31o4i^~xR2gDuQSRe>4 zNATS$>^Vfjc|3;jV1uU(!+`ZcG@QrcK1Z_X}Bn5?aftR_Q!y$#rdLP_D+czY_5xA`X~A=kbWKfmZ++?0U2XUV-B{ z*q>>;b$yyPu8pk=lBnx%if|2c|3AHsJO2MukoOly~UiS^6NSiT>8 z2Lbf&xPo>L4qS8RN3;dKjJDwaAYU`YoY1y+T1OkgsEq|5uG>&Jq#R5CF6zX5htoBD z2UE5-bTF59xiENf!*@Hk1M^*=_lU}+h|H8P&_=MI<0G6QwgowskUO*{gT=({eiyzg zNySaSXxL%jw#UGyaY}|97~0@m-tQ3)Txbii1_Z~3+!op}oEa<`HLimx>(2GT1Fjg? z&q>}5{#x3|1ou8rN=%-F+~2s&N?V9+q>U&R!-pUi?l1NT_lJ^{bsO#$#66rLER3#8 za$F#GZNEfE5HZ@eK}bS=0Bs>QfHsUv4vS+vv|&W?yAQV5FWV8uLdczs8EmC~ZgVD& zFxBUEJ zMsm9fo~K}cRu+cav<{FukIN;wBJeWWLQDs3Nd4{lA#ep<91s1`eF=y(R48)T{lQ~h zB>K1vhxiiY1KI+grfu*1jW!ZCtY2~@+@D8w%FbmF+F;%RHpphmY;n4KWGkJ|&=&m3 zv<1HlZ6WrJBOZJm(y(2Zq~Yi>3BY1iwRx;rDmzzvN4SA~N6d-eK|(}=FPb(4i2#cW z$=lGfeJp79eooQ$L+)2G)A*Rt)WUg@3DoC7xTy1PiDuz!5TO*mBi+>KJ;7!n=NqCM zY;!mfL(YJ*?tS0*PTB1uYePOeZ9y&pcI9#ehcDQO}`us*8@-u z@Q&H|h*ojEjPC-ymvj*B8xe-#?n}M&GsH0ncZ<}tupbD};at&!^LU)yK_7&`h8h91 zm8v4mx=4-pvkR*TcLp&cdOkU2alVg3C0R6N5jGwvg9GTZlWP zE%^ON&<;EvF#?O2oddn^<@<&S-t}%^u_PI+Qs?~KlVYN}GR@j6T*~ht;e^ho8Oq-6 zdbGi+9p7!R)$3Ism${^xI-jPk6rh@pk2Zpn+dfcLecugW1W0gitaUih^-o(#8Dn%{Aoh~^gc+1k8N1f{5$j%?*orv=og*N&lR4N za879pz7u(hJbs9_5Z^?AdeBK|3$gncX+q979+7ay`K}ZvoUSQOd%REW8lVjZ+ZV7z zsDcNH$^HULphr`fcj z?bHsJSU-GnMt22^5*A>+W)j~ac>0)Cn6AC6`i|@1 z`0&%U^onFeLTh82+uZaWb2fY%46;UtP?>NzHs2{4$@NC?LE3#DB26u^ z=sS>LlVrjSt_Uhx*(w9r~UlYAXoG0bQVA`&@W?N~VXoEKjgL~7@Q z1U(r|_|S=cEJS-7zvMi_2HL%( zjYDMgN}f-by=n7UKM8+s+f-Y5>}q;1QI9+)o$ulqLUZBrx3om)T%MGAX}JL4qrOjj zf7RwT8O{Ll2i^yq(d7tvdYx`)$gVphzxUF( zzE9|!9IQ4LsTIB-*euGoku%5PYqOtZ+S#?+6XIG2_CGu+-uT_=x8+ zc};a3!dj8=>~sT(i^aEoxiQZ7`3`N(zr%cQv*E2_|LmBdOg&i~8BTQNrkHkU| zbnJbQN8s`}-+BEU!FnA?Nu5EjrOoY*;+LVm3Xa}`>odS2J=(f((p(PXyI@a55szb* zz0=Ph0o88f1~$lW5XoTAmU!iI6K#l(Hf9CBdcUy7u;;L3x5MFxhCmxWxviXb%8u#x zQg+PP=J7-5o65|xKCn-^KS1Sp!d=B?>AY6a2Z6>S={b*5W?wjeXr_U-v+{12!pn|f zsvR?JL64#hN)*0>$%nRJ=fdddxl3eTW8byCq%GV_+JY^J5IL`vs49z|`=vI|KUW(8 zL^fs&Fn-n`Yfg8$Z)`|AW?~a{I08OyaA@=RNpfbnMs{9k^EyEKF4%%-3p`4Z`%arw ziNVGUJ_w+XnKB*D1=<2HQ~4a{$+QJ~lgyYd*O4iW5z6Mv%@1op7tROi)?;GGc2SU* z<0Cc0*Iw7i@3i79!&v0dGknx_PTD+|Oc7ZW#tE=a*SH@FifO*XG(sVzR(51!h|~ce z>)gW9FR^~{yP&hPD4u)BTzR*p?N@CKZP!`ueg0`+X~VDPu*6jv9p}54OQyC{sfIc|9j!z*wwpKXlNanFI zqv}yJFqwxx0 zxxVchh=0UBq`r9{s2XN7k|Y}P2a%}5TP_%uJpKw;5g40?;tBl>k&qbHna}*LVipZ= z^x+EhH~=K&tTqO*l73!P`qRgUf5u}1nJk2;od@h317O=mmWbQs3B`dS*%=}Y!}TZ$ zG-!k^K53U`pX58@$ZY)(RNSsYt!tbUHn)<#Z|4v5Za7z}2I^-V6Ef1CjZel+pPTA; zdLOKc(`O9BAD@cMrwt#0uK~6UzaJPB0v*D68OH~KF*#9p#`RF-TGZ9h zF9MO#155>&+-U0j>W~8#+QtGaGnymVP=69<6zu`ledSnV;jFgKz=rxDvP3!$C0HfI5_7RaOukGq zX4@p(4EKlahq4>}zRBusG6>e^Ae*U30#<-_zQB?OXl;->ml=S?gYMs`tGu9XLDdA({PWxKPlsM*?cK4B9!aF*^B6S%oNw;QOS1>SS%)g6uL=+a}JVhl( z!y2F>I^87;2$Qk(Azo%}fN~Pr@1%;meuTA?m^1$l)12cYD9~(f*a%Umy$`%}F2fQiG;aDO*_kPYSY zMcMT;j_A$dXx3DBCg`;?)jMq>uPxNpgor0?1X9>pBd068_oUNj_GjV@C_dq9g&^y4 z1WG`VH)K(8`B~{bF4w69gv*3nUXS-C_X`op?iQA%@TRgP3yZhV>sy|m0)c=M`Pq%W zd|)w9w(F_AV6><+P3NSJN|02V=_@k+?);N_XK-3LC8$bzQea| zHVR9g6)vNZqE}|&PuRjLg{?Z zb!URlMj`KJzXBhElaHBf1JiL7E|0~@=0+_6vp4Y_s!Mx+l~3Y2iIOH_9szm&Zc{}G z3%&$4GQ?A>EQ#5)l&|5nER+-Cwm#)j5S?dpQz)mONtl59O$n(CF`qC-tO|w?RuRsX z?5Cj*9AY(rz-HuKhI=h`AxM0Ys zQL2&oIutYO^|@$c$i5#KGQ-?pWlj?nX=?hQVrF9-k&=EU5olcgQ(P%UC7N}i4TaUu znwHP^66#{UC&hsV+KKcRa*`;6;kHO%v8nnxs}MnGI_d`HO zq>Q&~K$yPQVB$NhLAGxgt^OhV1m7WpO(pvJeE-$HH-OpEYrAAs3H8Cb#E6IdP-;JWwH=mZ^9(J3=HwY&;4?kWX<2gm`{nW1NTV)V5Y)6@K4D?w#&pl@B@-qFIPp zgyBJCoB8U_V8(0O5W`67_x(^RsIMs=KC^=Wi~4KyMOCPrUm}^g{RNLTa<7$1b_B0kz!*bcL$$)M`Kd}uB=Gs1dIFW(_#+Sx#$b~`XPMuJW|7TO5v z2yI?_8(54UcCKi1+l{^p`Q1{T&9=#RV${~J-pDnXL7DYt2RJQ3wD4MldI;O!M5m1p1HSM^fxdHl ztlH?==B9GFzDI~YPVcdJgxW>4x!;91bMZ}tKJcf6K8WD(yMPSh^cgPb?*;oDvQf))_~W z%SZ&A(6Oy4B3w9Ec=&?6fkP_D8|VveS4M-Nc7XT6^S@!t=t9l|s9xvtDQoZb4)G<+ zQxf_Jd9Dh1_cKJB*CG_Ya6f26p>F%2_<_F(0xa7b=j*kQ^qt2Zsb7z4p$)ax@BtfY zRM3X8%Ekxv^K%Nma2IF`vFEfAjp+E08EoHRmmZf(K7)#=IV|$2(IEm!Fq8Rr(ay?7 z5=7wN;gfTGGRXQGAZ|F_rC*|544>Y&3T+rsj4v=2_brOx1ln0*5q-?)jbTkOgt*@d z<3Z4wXd@EJ#!Q|~SOb)C_j!>>7QaLEcG}K&!KP2t4K`2fSAGMZ8?G3)$#6)6?TZ`D z(|C>#ks;tC_rd5N5~07xLQ#9-q~mv9*Hqv6Tb#5ZQu{eo+M>@FvKH1E!WQPCN3?t_ zETHpbWzD({OB(acO6G%KP<)&mu9rR(&q8r$o8bx`yL@3 zxO~cKK}@poaf00D%Xi^U;{n3Thh3cb;CTM&K{?L$Ixp` zV}m2O$H#|>%;GWiU5GECE!ZbfLOs5nOa;6SK3_Pp%U68o?+F7NVt>`?g$rwi_#Ai-rp=&h5ZfL25m6)V zGlVw=pB(%bue!|_Ny_t%ferBy@F*k`heeID{e?$`oLhJq%4rLWDGknVZMax`f8jG! zLA39P90@cQ78>{m5~a(I@PJUujBDgM5|SB+sIh+W_`A#i{|NFBbUfI|;2)kF1fQV> zqMbir{jC`m9#esxd+2?zPeMOM%V zo}cG~-22`K=1!N#A*PY{$lT;Sp4;Z~J^32JMxjvHK--yGps}d6NgGiKHeWp&=4+r3 z8$YL5ErQ&HI3CtT@80-2BNe;eC=M0QJvB|-M#kb%b=1eqRj|8{LmiFKzf&-iw@Kl$ zHjba`;*5{0?%(0B@H4JB#?XczJFEfL;m|KeC_h6`XSWqVNP^!0hp^`xVC*Ci#royD z5K}~3s9{fAsC@^%Pmjv=+P#c9)HQ{H2LCzZBmKd~$8LBm6a8}0{X0x8J~x$m z_H|ZRuD9XSblVM~*da!aw(yRGTwZPqr;TfEH^Lk9z6yUwJpp#|)=%J|h<8cY(Gb z!zt^@bq(4=+znAEA?A*@V3ScfOJ6_QLOulIZjiYo0=vvg8y3p;9AE_DQnzgw>Y>`! zh8H57Q_Qhpj}RjQeL+2P`y}TI?b-Vv9LdJVSqpK)oKqIsU{Nbv4<*nA$BTVe9y7Hz zJRRZOv!pJ+aCSqCE15>|E}*@+ypiPC>6~)8+Ocr1g3ljViq6}2*tuN32R7J&IalPs z1=vuNh;s!&@b3t5XvYVW5l6T0h^KLyLoQxeQ>GhaTb3`x>Z;<3+ZlijemZG0ZWmxP z!h0P`Wpp}D8zZ!Nu;bx=VBvAu4A>yk;O0biG<=FL@ji$pad{V_7HNc>RKDj)ZV>9P z=WSyHmO;nHLS?zwuc}YjcS!sJ7M&z~N0^)29a$HzD@43DSp(h&A-I0eSroj6HWnm3 zw>z>{frl2ecjyCahVcN_CB$sgMijXBi}^3$gY3q(kQ0IzC;0Pjp)XoIg}Bk7vNK9efF_Rq#PFz7U@SEYh-#nVGpvgD8L`;olLn?XW25MkjgR0F~X( zGXkaO0HSRL{st_fUFbK|MPweXZ=tJ(`XyMF2!Qc1%S9UcP{A+n7pqJ=590Tr8&2!w zN@(v9#$Aj{?b%S9zw1U@sEsS4;j#~Hq^7pAirV~L0NM~i+PkVYj4jRF)aL$kwYj{D zEQxCGb7K~!uku~2yUN-lnOMKF69#<5)3o~mKIY-`Rn13-RZy?b4XN|kY2tZe z4cfg#@xuh~V`lZjUdj>c<0JFcVs^j>vGYDq-;CC&Ul_2h6*)=qJ07KWd`KG>i=)Cy zh**Y?up9F?a%be>3g5*wRmi*F1wzY=jtgJXFJaALENJ(!&1-OikE7=MtB|5FW{8fj z9};z(8$}hvcW5fH4FiX-3rU5s4GBMd=kc-31GAZ*ab?Z>c_xY1bPe_r|7HBn-(u2t zUTaNl9`~R&4v~!+o4&~#d`HJVH-#t0Hjj-Gt&8*ub56KNQZ<}jVfznvm0m6ONcY!u zIyw!x=4$gi7TVwoVIJ^>Fc$7dSS!SFZ<8qM=M1?2=-c3})ePV4k^oby#eW@EoBvwcUPkn0unfdk$44VLFM)S&ekR%|S=!60wQ-EF=~ zV39%WjMGL@nD#EHz=i2YdhEpgIBN5JHML>oc6^bRz>%Rk;XBu@z^7a*tY2&b5UppHN*>j=5rwX?L)@@6CN3mi%yR>;dWPQgeGJKfa!dj8o8^6PW>0{RW zoIYR5M+AIa8MAE?=%?T<8w*wj^C#;&JR9~Mrd-#{Xz_PP)+He|LP&kScqN^dlmY`b z7IKU|UPWalf*ucL_q<;1k;gK@ka2_gxhHzV`5WGN9OyO=cGv8G^np$szT-$bEy2zj z?x2bg`&iI*U4Bt2chctX1QXAu3SB;CvXXo(c!k1u67?JwPj9#%NUY9h2)^{#4`{d? z$~G2a-vYfSh0Xj-%mX8>pCQ!la4)ejI^UvS&kfR8Jl2#pLXN}usCN_F@Xq=?NKEj% zg}fH-7M9I$2QdM}b&;{f`yg9C^h*eH{4QA+9I^2`uYJrKAajN9bjW=yu&wx=+l#@6 zQ6_#DY$yu)bh(o@k3#_;Mil2WP%D>h`7X#73atpdhgh6=p5dWk%&^+928gj?EINR; zR*2()mf-zxc@2+<*Z9RIpvO!DJ|r=3gN!-N!Jil87nPlHIfCrzu;-VQ7^7M#9dS&Dm! z?h@7ySFfJ~xNqQ>)J_QZS2gIudBLn4_7XYF*M*eofR7^?G0}@ZWHTh$9Po zgwZ361yi_>1&4QBKV;U>2Y$rR2jW#&Qv%pxTd;BCWDfd1ZC-np_to`Km)#lFsEBP? z+{1TXCqejvZA4`ul0JywaC|cMg|^6RiByYYp$tjH7i?sdILG-E`Uo}@lHT37!`vXV zzQ6dR!WmLg*)SH|h+%FjX69po9Qd8Vq!7+Mr3m9#I4*uyRi?w`UA^BO#)AAD#sUlV zGpRDTe(td_x=k8yt;eLYeu!{kZj|y4_z2PTyRRa!w)PklJx>YCt0F1dHN`LxAd zXpX|JZS7e<&$(caNQSpDV`Oyysw~`Ivx_!}yUh)v8)P%q*>l*mZ`jz{HQ=^+e5axv zJqBFM>@g>L;ni#S@fkKtJ8LxZN~!gWzcGvjSGmhM;0v^!wm{oyBhV=H;cwt+d_ksR zbiw9E^?R>L#4PY%dLP6Nx?h7nf)9wOo1_h$B;dnYZue3rJgy%+)XxF$QMvAdg@?(7 zbqPKtC~VLdX!CkO3ZC?usI;N9TOa7eK@O95+IcdMpL=W+i-Jwn=qV8i!52-N*PI8I z|Jhjh4gt&70Ml^TH%gGW+{xJ>1Ib~zmqxP{RpmOOUQh^kL1thd9}n%hZ5>#g%-$~r zYMj1M6~gVizy`ahQd^uR(uPgP`e0@*6SATt0{M5i)qH%sTkm>2S~4yRhvi`T`YArv z_new%VeMsmaD2L|eiz`rffi#wi2V|Q5XORO$>)ZZ-{Sxvbso3Q)mPbho3GNIe4UXd z!#(G?Se!5TxJEt}q*#|6hesKWkLJv$!w53pFIw<~a>& z3${qwJjY4j`MVivBfQqvl#oEbN7!isPr)MNwqaNW2@!@*wVJ#SG?#Ghm7wf{vEE$@STjC;X91_p)JTX7-&PRkRqL3H&AWYApc>%3iq6oVewZo z0weL-SkU*wT_v|P&sLEEII-LPWh_UlZqc+biD@7;g9!LK@Z}8A8D36gm~sv2@6gK%g{` zI+T8WpPkxsa}f@G-g$S=r&vFn=4oR61)*v7X?Z|@Dy_q&t?AuUOeL|Bn2TEr$N8UI9?F!%4z^e zkL3G7pbsT!fgyMt2%-JkhnZPkmXvpXbHuof%YE9YZK=F0?@0lR6_vxfMupI$1}aaF zc~x+k-!ZFeTYKY7 host pll, 1 -> alt PLL, 2 -> per pll) | +| `SAFETY_ISLAND_CLK_SEL` | `0x88` | `4` | Safety Island pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| `SECURITY_ISLAND_CLK_SEL` | `0x8c` | `4` | Security Island pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| `PULP_CLUSTER_CLK_SEL` | `0x90` | `4` | PULP Cluster pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| `SPATZ_CLUSTER_CLK_SEL` | `0x94` | `4` | Spatz Cluster pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| `L2_CLK_SEL` | `0x98` | `4` | L2 Memory pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| `PERIPH_CLK_DIV_VALUE` | `0x9c` | `4` | Periph Domain clk divider value | +| `SAFETY_ISLAND_CLK_DIV_VALUE` | `0xa0` | `4` | Safety Island clk divider value | +| `SECURITY_ISLAND_CLK_DIV_VALUE` | `0xa4` | `4` | Security Island clk divider value | +| `PULP_CLUSTER_CLK_DIV_VALUE` | `0xa8` | `4` | PULP Cluster clk divider value | +| `SPATZ_CLUSTER_CLK_DIV_VALUE` | `0xac` | `4` | Spatz Cluster clk divider value | +| `L2_CLK_DIV_VALUE` | `0xb0` | `4` | L2 Memory clk divider value | +| `HOST_FETCH_ENABLE` | `0xb4` | `4` | Host Domain fetch enable | +| `SAFETY_ISLAND_FETCH_ENABLE` | `0xb8` | `4` | Safety Island fetch enable | +| `SECURITY_ISLAND_FETCH_ENABLE` | `0xbc` | `4` | Security Island fetch enable | +| `PULP_CLUSTER_FETCH_ENABLE` | `0xc0` | `4` | PULP Cluster fetch enable | +| `SPATZ_CLUSTER_DEBUG_REQ` | `0xc4` | `4` | Spatz Cluster debug req | +| `HOST_BOOT_ADDR` | `0xc8` | `4` | Host boot address | +| `SAFETY_ISLAND_BOOT_ADDR` | `0xcc` | `4` | Safety Island boot address | +| `SECURITY_ISLAND_BOOT_ADDR` | `0xd0` | `4` | Security Island boot address | +| `PULP_CLUSTER_BOOT_ADDR` | `0xd4` | `4` | PULP Cluster boot address | +| `SPATZ_CLUSTER_BOOT_ADDR` | `0xd8` | `4` | Spatz Cluster boot address | +| `PULP_CLUSTER_BOOT_ENABLE` | `0xdc` | `4` | PULP Cluster boot enable | +| `SPATZ_CLUSTER_BUSY` | `0xe0` | `4` | Spatz Cluster busy | +| `PULP_CLUSTER_BUSY` | `0xe4` | `4` | PULP Cluster busy | +| `PULP_CLUSTER_EOC` | `0xe8` | `4` | PULP Cluster end of computation | +| `ETH_RGMII_PHY_CLK_DIV_EN` | `0xec` | `4` | Ethernet RGMII PHY clock divider enable bit | +| `ETH_RGMII_PHY_CLK_DIV_VALUE` | `0xf0` | `4` | Ethernet RGMII PHY clock divider value | +| `ETH_MDIO_CLK_DIV_EN` | `0xf4` | `4` | Ethernet MDIO clock divider enable bit | +| `ETH_MDIO_CLK_DIV_VALUE` | `0xf8` | `4` | Ethernet MDIO clock divider value | + +## Peripherals + +Carfield enhances Cheshire's peripheral subsystem with additional capabilities. + +An external AXI manager port is attached to the matrix crossbar. The 64-bit data, 48-bit address AXI +protocol is converted to the slower, 32-bit data and address APB protocol. An APB demultiplexer +allows attaching several peripherals, described below. + +### Generic and advanced timer + +Carfield integrates a generic timer and an advanced timer. + +The [*generic timer*](https://github.com/pulp-platform/timer_unit) manages the following features: + +- 2 general purpose 32-bit up counter timers +- Input trigger sources: + - FLL/PLL clock + - FLL/PLL clock + Prescaler + - Real-time clock (RTC) at crystal frequency (32kHz) or higher + - External event +- 8-bit programmable prescaler to FLL/PLL clock +- Counting modes: + - One shot mode: timer is stopped after first comparison match + - Continuous mode: timer continues counting after comparison match + - Cycle mode: timer resets to 0 after comparison match and continues counting + - 64 bit cascaded mode +- Interrupt request generation on comparison match + +For more information, read the dedicated +[documentation](https://github.com/pulp-platform/timer_unit/blob/master/doc/TIMER_UNIT_reference.xlsx). + +The [*advanced timer*](https://github.com/pulp-platform/apb_adv_timer) manages the following +features: + +* 4 timers with 4 output signal channels each +* PWM generation functionality +* Multiple trigger input sources: + - output signal channels of all timers + - 32 GPIOs + - Real-time clock (RTC) at crystal frequency (32kHz) or higher + - FLL/PLL clock + In Carfield, we rely on a RTC. +* Configurable input trigger modes +* Configurable prescaler for each timer +* Configurable counting mode for each timer +* Configurable channel threshold action for each timer +* 4 configurable output events +* Configurable clock gating of each timer + +For more information, read the dedicated +[documentation](https://github.com/pulp-platform/apb_adv_timer/blob/master/doc/APB_ADV_TIMER_reference.xlsx). + +### Watchdog timer + +We employ the watchdog timer developed by the [OpenTitan +project](https://opentitan.org/book/doc/introduction.html) project. It manages the following +features: + +* Two 32-bit upcounting timers: one timer functions as a wakeup timer, one as a watchdog timer +* 2 thresholds: *bark* (generates an interrupt) and *bite* (resets core) +* A 12 bit pre-scaler for the wakeup timer to enable very long timeouts + +For more information, read the dedicated +[documentation](https://opentitan.org/book/hw/ip/aon_timer/). + +### CAN + +We employ a CAN device developed by the [Czech Technical +University](https://github.com/AlSaqr-platform/can_bus/tree/pulp) in Prague. It manages the +following features: + +* CAN 2.0, CAN FD 1.0 and ISO CAN FD +* Avalon memory bus +* Timestamping and transmission at given time +* Optional event and error logging +* Fault confinement state manipulation +* Transceiver delay measurement +* Variety of interrupt sources +* Filtering of received frame +* Listen-only mode, Self-test mode, Acknowledge forbidden mode +* Up to 14 Mbit in “Data” bit-rate (with 100 Mhz Core clock) + +For more information, read the dedicated +[documentation](https://github.com/AlSaqr-platform/can_bus/tree/pulp/doc) + +### Ethernet + +We employ Ethernet IPs developed by [Alex +Forencich](https://github.com/alexforencich/verilog-ethernet) and assemble them with a +high-performant DMA, the same used in Cheshire. + +We use Reduced gigabit media-independent interface (RGMII) that supports speed up to 1000Mbit/s +(1GHz). + +For more information, read the dedicated +[documentation](http://alexforencich.com/wiki/en/verilog/ethernet/start) of Ethernet components from +its original repository. + +## Clock and reset + +![Reset and Clock Distribution for a domain *X*](../img/clk_rst.svg) + +![Isolation for a domain *X*](../img/isolation.svg) + +The two figures above show the clock, reset and isolation distribution for a *domain* `X` in +Carfield, and their relationship. A more detailed description is provided below. + +### Clock distribution scheme, clock gating and isolation + +Carfield is provided with 3 clocks sources. They can be fully asynchronous and not bound to any +phase relationship, since dual-clock FIFOs are placed between domains to allow clock domain crossing +(CDC): + +* `host_clk_i`: preferably, clock of the *host domain* +* `alt_clk_i`: preferably, clock of *alternate* domains, namely *safe domain*, *secure domain*, + *accelerator domain* +* `per_clk_i`: preferably, clock of *peripheral domain* + +In addition, a real-time clock (RTC, `rt_clk_i`) is provided externally, at crystal frequency +(32kHz) or higher. + +These clocks are supplied externally, by a dedicated PLL per clock source or by a single PLL that +supplies all three clock sources. The configuration of the clock source can be handled by the +external PLL wrapper configuration registers, e.g. in a ASIC top level + +Regardless of the specific name used for the clock signals in HW, Carfield has a flexible clock +distribution that allows each of the 3 clock sources to be assigned to a *domain*, as explained +below. + +--- + +As the top figure shows, out of the 7 *domains* described in [Domains](#domains), 6 can be clock +gated and *isolated*: *safe domain*, *secure domain*, *accelerator domain*, *peripheral domain*, +*dynamic SPM*. + +When *isolation* for a domain `X` is enabled, data transfers towards a domain are terminated and +never reach it. To achieve this, an AXI4 compliant *isolation* module is placed in front of each +domain. The bottom figure shows in detail the architecture of the isolation scheme between the *host +domain* and a generic `X` domain, highlighting its relationship with the domain's reset and cloc +signals. + +For each of the 6 clock gateable domains, the following clock distribution scheme applies: + +1. The user selects one of the 3 different clock sources +2. The selected clock source for the domain is fed into a default-bypassed arbitrary integer clock + divider with 50% duty cycle. This allows to use different integer clock divisions for every + target domain to use different clock frequencies +3. The internal clock gate of the clock divider is used to provide clock gating for the domain. + +HW resources for the clock distribution (steps 1., 2., and 3.) and isolation of a domain `X`, are +SW-controlled via dedicated PCRs. Refer to [Platform Control Registers](#platform-control-registers) +in this page for more information. + +The only domain that is always-on and de-isolated is the *host domain* (Cheshire). If required, +clock gating and/or isolation of it can be handled at higher levels of hierarchy, e.g. in a +dedicated ASIC wrapper. + +### Startup behavior after Power-on reset (POR) + +The user can decide whether *secure boot* must be performed on the executing code before runtime. If +so, the *secure domain* must be active after POR, i.e., clocked and de-isolated. This behavior is +regulated by the input pin `secure_boot_i` according to the following table: + +| `secure_boot_i` | **Secure Boot** | **System status after POR** | +|:----------------|----------------:|:--------------------------------------------------------------------------------------------------------------------------------------------------| +| `0` | `OFF` | *secure domain* gated and isolated as the other 5 domains, *host domain* always-on and idle | +| `1` | `ON` | *host domain* always-on and idle, *secure domain* active, takes over *secure boot* and can't be warm reset-ed; other 5 domains gated and isolated | + +Regardless of the value of `secure_boot_i`, since by default some domains are clock gated and +isolated after POR, SW or external physical interfaces (JTAG/Serial Link) must handle their wake-up +process. Routines are provided in the [Software Stack](../../sw/include/car_util.h). + +### Reset distribution scheme + +Carfield is provided with one POR (active-low), `pwr_on_rst_ni`, responsible for the platform's +*cold reset*. + +The POR is synchronized with the clock of each domain, user-selected as explained above, and +propagated to the domain. + +In addition, a *warm reset* can be initiated from SW through the PCRs for each domain. Exceptions to +this are the *host domain* (always-on), and the *secure domain* when `secure_boot_i` is asserted. + + +## axi_dma_config / doc / idma_desc64_frontend_doc.md + +## Summary + +| Name | Offset | Length | Description | +|:--------------------------------------|:---------|---------:|:--------------------------------------------------------------------| +| idma_desc64.[`desc_addr`](#desc_addr) | 0x0 | 8 | This register specifies the bus address at which the first transfer | +| idma_desc64.[`status`](#status) | 0x8 | 8 | This register contains status information for the DMA. | + +## desc_addr +This register specifies the bus address at which the first transfer +descriptor can be found. A write to this register starts the transfer. +- Offset: `0x0` +- Reset default: `0xffffffffffffffff` +- Reset mask: `0xffffffffffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "desc_addr", "bits": 64, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:------------------:|:----------|:--------------| +| 63:0 | wo | 0xffffffffffffffff | desc_addr | | + +## status +This register contains status information for the DMA. +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "busy", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "fifo_full", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 62}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 63:2 | | | | Reserved | +| 1 | ro | 0x0 | fifo_full | If this bit is set, the buffers of the DMA are full. Any further submissions via the desc_addr register may overwrite previously submitted jobs or get lost. | +| 0 | ro | 0x0 | busy | The DMA is busy | + + + +## axi_dma_config / doc / idma_reg32_2d_frontend_doc.md + +## Summary + +| Name | Offset | Length | Description | +|:-------------------------------------------------------------|:---------|---------:|:-----------------------------------------------------------------------| +| idma_reg32_2d_frontend.[`src_addr`](#src_addr) | 0x0 | 4 | Source Address | +| idma_reg32_2d_frontend.[`dst_addr`](#dst_addr) | 0x4 | 4 | Destination Address | +| idma_reg32_2d_frontend.[`num_bytes`](#num_bytes) | 0x8 | 4 | Number of bytes | +| idma_reg32_2d_frontend.[`conf`](#conf) | 0xc | 4 | Configuration Register for DMA settings | +| idma_reg32_2d_frontend.[`stride_src`](#stride_src) | 0x10 | 4 | Source Stride | +| idma_reg32_2d_frontend.[`stride_dst`](#stride_dst) | 0x14 | 4 | Destination Stride | +| idma_reg32_2d_frontend.[`num_repetitions`](#num_repetitions) | 0x18 | 4 | Number of 2D repetitions | +| idma_reg32_2d_frontend.[`status`](#status) | 0x1c | 4 | DMA Status | +| idma_reg32_2d_frontend.[`next_id`](#next_id) | 0x20 | 4 | Next ID, launches transfer, returns 0 if transfer not set up properly. | +| idma_reg32_2d_frontend.[`done`](#done) | 0x24 | 4 | Get ID of finished transactions. | + +## src_addr +Source Address +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "src_addr", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:---------------| +| 31:0 | rw | 0x0 | src_addr | Source Address | + +## dst_addr +Destination Address +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "dst_addr", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------------| +| 31:0 | rw | 0x0 | dst_addr | Destination Address | + +## num_bytes +Number of bytes +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "num_bytes", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:----------------| +| 31:0 | rw | 0x0 | num_bytes | Number of bytes | + +## conf +Configuration Register for DMA settings +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xf` + +### Fields + +```wavejson +{"reg": [{"name": "decouple", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "deburst", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "serialize", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "twod", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 28}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-----------------| +| 31:4 | | | | Reserved | +| 3 | rw | 0x0 | twod | 2D transfer | +| 2 | rw | 0x0 | serialize | Serialize enable | +| 1 | rw | 0x0 | deburst | Deburst enable | +| 0 | rw | 0x0 | decouple | Decouple enable | + +## stride_src +Source Stride +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "stride_src", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:0 | rw | 0x0 | stride_src | Source Stride | + +## stride_dst +Destination Stride +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "stride_dst", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:-------------------| +| 31:0 | rw | 0x0 | stride_dst | Destination Stride | + +## num_repetitions +Number of 2D repetitions +- Offset: `0x18` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "num_repetitions", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------|:-------------------------| +| 31:0 | rw | 0x1 | num_repetitions | Number of 2D repetitions | + +## status +DMA Status +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "busy", "bits": 16, "attr": ["ro"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:16 | | | | Reserved | +| 15:0 | ro | x | busy | DMA busy | + +## next_id +Next ID, launches transfer, returns 0 if transfer not set up properly. +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "next_id", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:-----------------------------------------------------------------------| +| 31:0 | ro | x | next_id | Next ID, launches transfer, returns 0 if transfer not set up properly. | + +## done +Get ID of finished transactions. +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "done", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------| +| 31:0 | ro | x | done | Get ID of finished transactions. | + + + +## axi_dma_config / doc / idma_reg64_2d_frontend_doc.md + +## Summary + +| Name | Offset | Length | Description | +|:-------------------------------------------------------------|:---------|---------:|:-----------------------------------------------------------------------| +| idma_reg64_2d_frontend.[`src_addr`](#src_addr) | 0x0 | 8 | Source Address | +| idma_reg64_2d_frontend.[`dst_addr`](#dst_addr) | 0x8 | 8 | Destination Address | +| idma_reg64_2d_frontend.[`num_bytes`](#num_bytes) | 0x10 | 8 | Number of bytes | +| idma_reg64_2d_frontend.[`conf`](#conf) | 0x18 | 8 | Configuration Register for DMA settings | +| idma_reg64_2d_frontend.[`status`](#status) | 0x20 | 8 | DMA Status | +| idma_reg64_2d_frontend.[`next_id`](#next_id) | 0x28 | 8 | Next ID, launches transfer, returns 0 if transfer not set up properly. | +| idma_reg64_2d_frontend.[`done`](#done) | 0x30 | 8 | Get ID of finished transactions. | +| idma_reg64_2d_frontend.[`stride_src`](#stride_src) | 0x38 | 8 | Source Stride | +| idma_reg64_2d_frontend.[`stride_dst`](#stride_dst) | 0x40 | 8 | Destination Stride | +| idma_reg64_2d_frontend.[`num_repetitions`](#num_repetitions) | 0x48 | 8 | Number of 2D repetitions | + +## src_addr +Source Address +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffffffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "src_addr", "bits": 64, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:---------------| +| 63:0 | rw | 0x0 | src_addr | Source Address | + +## dst_addr +Destination Address +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffffffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "dst_addr", "bits": 64, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------------| +| 63:0 | rw | 0x0 | dst_addr | Destination Address | + +## num_bytes +Number of bytes +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffffffffffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "num_bytes", "bits": 64, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:----------------| +| 63:0 | rw | 0x0 | num_bytes | Number of bytes | + +## conf +Configuration Register for DMA settings +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "decouple", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "deburst", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "serialize", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 61}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-----------------| +| 63:3 | | | | Reserved | +| 2 | rw | 0x0 | serialize | Serialize enable | +| 1 | rw | 0x0 | deburst | Deburst enable | +| 0 | rw | 0x0 | decouple | Decouple enable | + +## status +DMA Status +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "busy", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 63}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 63:1 | | | | Reserved | +| 0 | ro | x | busy | DMA busy | + +## next_id +Next ID, launches transfer, returns 0 if transfer not set up properly. +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0xffffffffffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "next_id", "bits": 64, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:-----------------------------------------------------------------------| +| 63:0 | ro | x | next_id | Next ID, launches transfer, returns 0 if transfer not set up properly. | + +## done +Get ID of finished transactions. +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0xffffffffffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "done", "bits": 64, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------| +| 63:0 | ro | x | done | Get ID of finished transactions. | + +## stride_src +Source Stride +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0xffffffffffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "stride_src", "bits": 64, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 63:0 | rw | 0x0 | stride_src | Source Stride | + +## stride_dst +Destination Stride +- Offset: `0x40` +- Reset default: `0x0` +- Reset mask: `0xffffffffffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "stride_dst", "bits": 64, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:-------------------| +| 63:0 | rw | 0x0 | stride_dst | Destination Stride | + +## num_repetitions +Number of 2D repetitions +- Offset: `0x48` +- Reset default: `0x0` +- Reset mask: `0xffffffffffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "num_repetitions", "bits": 64, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------|:-------------------------| +| 63:0 | rw | 0x0 | num_repetitions | Number of 2D repetitions | + + + +## axi_dma_config / doc / idma_reg64_frontend_doc.md + +## Summary + +| Name | Offset | Length | Description | +|:----------------------------------------------|:---------|---------:|:-----------------------------------------------------------------------| +| idma_reg64_frontend.[`src_addr`](#src_addr) | 0x0 | 8 | Source Address | +| idma_reg64_frontend.[`dst_addr`](#dst_addr) | 0x8 | 8 | Destination Address | +| idma_reg64_frontend.[`num_bytes`](#num_bytes) | 0x10 | 8 | Number of bytes | +| idma_reg64_frontend.[`conf`](#conf) | 0x18 | 8 | Configuration Register for DMA settings | +| idma_reg64_frontend.[`status`](#status) | 0x20 | 8 | DMA Status | +| idma_reg64_frontend.[`next_id`](#next_id) | 0x28 | 8 | Next ID, launches transfer, returns 0 if transfer not set up properly. | +| idma_reg64_frontend.[`done`](#done) | 0x30 | 8 | Get ID of finished transactions. | + +## src_addr +Source Address +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffffffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "src_addr", "bits": 64, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:---------------| +| 63:0 | rw | 0x0 | src_addr | Source Address | + +## dst_addr +Destination Address +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffffffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "dst_addr", "bits": 64, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------------| +| 63:0 | rw | 0x0 | dst_addr | Destination Address | + +## num_bytes +Number of bytes +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffffffffffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "num_bytes", "bits": 64, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:----------------| +| 63:0 | rw | 0x0 | num_bytes | Number of bytes | + +## conf +Configuration Register for DMA settings +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "decouple", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "deburst", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "serialize", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 61}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-----------------| +| 63:3 | | | | Reserved | +| 2 | rw | 0x0 | serialize | Serialize enable | +| 1 | rw | 0x0 | deburst | Deburst enable | +| 0 | rw | 0x0 | decouple | Decouple enable | + +## status +DMA Status +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "busy", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 63}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 63:1 | | | | Reserved | +| 0 | ro | x | busy | DMA busy | + +## next_id +Next ID, launches transfer, returns 0 if transfer not set up properly. +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0xffffffffffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "next_id", "bits": 64, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:-----------------------------------------------------------------------| +| 63:0 | ro | x | next_id | Next ID, launches transfer, returns 0 if transfer not set up properly. | + +## done +Get ID of finished transactions. +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0xffffffffffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "done", "bits": 64, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------| +| 63:0 | ro | x | done | Get ID of finished transactions. | + + + +## axi_llc / doc / registers.md + +## Summary + +| Name | Offset | Length | Description | +|:----------------------------------------------|:---------|---------:|:--------------------------------------------------| +| axi_llc.[`CFG_SPM_LOW`](#cfg_spm_low) | 0x0 | 4 | SPM Configuration (lower 32 bit) | +| axi_llc.[`CFG_SPM_HIGH`](#cfg_spm_high) | 0x4 | 4 | SPM Configuration (upper 32 bit) | +| axi_llc.[`CFG_FLUSH_LOW`](#cfg_flush_low) | 0x8 | 4 | Flush Configuration (lower 32 bit) | +| axi_llc.[`CFG_FLUSH_HIGH`](#cfg_flush_high) | 0xc | 4 | Flush Configuration (upper 32 bit) | +| axi_llc.[`COMMIT_CFG`](#commit_cfg) | 0x10 | 4 | Commit the configuration | +| axi_llc.[`FLUSHED_LOW`](#flushed_low) | 0x18 | 4 | Flushed Flag (lower 32 bit) | +| axi_llc.[`FLUSHED_HIGH`](#flushed_high) | 0x1c | 4 | Flushed Flag (upper 32 bit) | +| axi_llc.[`BIST_OUT_LOW`](#bist_out_low) | 0x20 | 4 | Tag Storage BIST Result (lower 32 bit) | +| axi_llc.[`BIST_OUT_HIGH`](#bist_out_high) | 0x24 | 4 | Tag Storage BIST Result (upper 32 bit) | +| axi_llc.[`SET_ASSO_LOW`](#set_asso_low) | 0x28 | 4 | Instantiated Set-Associativity (lower 32 bit) | +| axi_llc.[`SET_ASSO_HIGH`](#set_asso_high) | 0x2c | 4 | Instantiated Set-Associativity (upper 32 bit) | +| axi_llc.[`NUM_LINES_LOW`](#num_lines_low) | 0x30 | 4 | Instantiated Number of Cache-Lines (lower 32 bit) | +| axi_llc.[`NUM_LINES_HIGH`](#num_lines_high) | 0x34 | 4 | Instantiated Number of Cache-Lines (upper 32 bit) | +| axi_llc.[`NUM_BLOCKS_LOW`](#num_blocks_low) | 0x38 | 4 | Instantiated Number of Blocks (lower 32 bit) | +| axi_llc.[`NUM_BLOCKS_HIGH`](#num_blocks_high) | 0x3c | 4 | Instantiated Number of Blocks (upper 32 bit) | +| axi_llc.[`VERSION_LOW`](#version_low) | 0x40 | 4 | AXI LLC Version (lower 32 bit) | +| axi_llc.[`VERSION_HIGH`](#version_high) | 0x44 | 4 | AXI LLC Version (upper 32 bit) | +| axi_llc.[`BIST_STATUS`](#bist_status) | 0x48 | 4 | Status register of the BIST | + +## CFG_SPM_LOW +SPM Configuration (lower 32 bit) +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "low", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | rw | 0x0 | low | lower 32 bit | + +## CFG_SPM_HIGH +SPM Configuration (upper 32 bit) +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "high", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | rw | 0x0 | high | upper 32 bit | + +## CFG_FLUSH_LOW +Flush Configuration (lower 32 bit) +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "low", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | rw | 0x0 | low | lower 32 bit | + +## CFG_FLUSH_HIGH +Flush Configuration (upper 32 bit) +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "high", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | rw | 0x0 | high | upper 32 bit | + +## COMMIT_CFG +Commit the configuration +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "commit", "bits": 1, "attr": ["rw1s"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------| +| 31:1 | | | | Reserved | +| 0 | rw1s | 0x0 | commit | commit configuration | + +## FLUSHED_LOW +Flushed Flag (lower 32 bit) +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "low", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | ro | 0x0 | low | lower 32 bit | + +## FLUSHED_HIGH +Flushed Flag (upper 32 bit) +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "high", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | ro | 0x0 | high | upper 32 bit | + +## BIST_OUT_LOW +Tag Storage BIST Result (lower 32 bit) +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "low", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | ro | 0x0 | low | lower 32 bit | + +## BIST_OUT_HIGH +Tag Storage BIST Result (upper 32 bit) +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "high", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | ro | 0x0 | high | upper 32 bit | + +## SET_ASSO_LOW +Instantiated Set-Associativity (lower 32 bit) +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "low", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | ro | 0x0 | low | lower 32 bit | + +## SET_ASSO_HIGH +Instantiated Set-Associativity (upper 32 bit) +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "high", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | ro | 0x0 | high | upper 32 bit | + +## NUM_LINES_LOW +Instantiated Number of Cache-Lines (lower 32 bit) +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "low", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | ro | 0x0 | low | lower 32 bit | + +## NUM_LINES_HIGH +Instantiated Number of Cache-Lines (upper 32 bit) +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "high", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | ro | 0x0 | high | upper 32 bit | + +## NUM_BLOCKS_LOW +Instantiated Number of Blocks (lower 32 bit) +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "low", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | ro | 0x0 | low | lower 32 bit | + +## NUM_BLOCKS_HIGH +Instantiated Number of Blocks (upper 32 bit) +- Offset: `0x3c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "high", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | ro | 0x0 | high | upper 32 bit | + +## VERSION_LOW +AXI LLC Version (lower 32 bit) +- Offset: `0x40` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "low", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | ro | 0x0 | low | lower 32 bit | + +## VERSION_HIGH +AXI LLC Version (upper 32 bit) +- Offset: `0x44` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "high", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:0 | ro | 0x0 | high | upper 32 bit | + +## BIST_STATUS +Status register of the BIST +- Offset: `0x48` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "done", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | done | BIST successfully completed | + + + +## axi_realm / doc / registers.md + +## Summary + +| Name | Offset | Length | Description | +|:--------------------------------------------------------|:---------|---------:|:-------------------------------------------| +| axi_rt.[`major_version`](#major_version) | 0x0 | 4 | Value of the major_version. | +| axi_rt.[`minor_version`](#minor_version) | 0x4 | 4 | Value of the minor_version. | +| axi_rt.[`patch_version`](#patch_version) | 0x8 | 4 | Value of the patch_version. | +| axi_rt.[`rt_enable`](#rt_enable) | 0xc | 4 | Enable RT feature on master | +| axi_rt.[`rt_bypassed`](#rt_bypassed) | 0x10 | 4 | Is the RT inactive? | +| axi_rt.[`len_limit_0`](#len_limit_0) | 0x14 | 4 | Fragmentation of the bursts in beats. | +| axi_rt.[`len_limit_1`](#len_limit_1) | 0x18 | 4 | Fragmentation of the bursts in beats. | +| axi_rt.[`imtu_enable`](#imtu_enable) | 0x1c | 4 | Enables the IMTU. | +| axi_rt.[`imtu_abort`](#imtu_abort) | 0x20 | 4 | Resets both the period and the budget. | +| axi_rt.[`start_addr_sub_low_0`](#start_addr_sub_low) | 0x24 | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_1`](#start_addr_sub_low) | 0x28 | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_2`](#start_addr_sub_low) | 0x2c | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_3`](#start_addr_sub_low) | 0x30 | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_4`](#start_addr_sub_low) | 0x34 | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_5`](#start_addr_sub_low) | 0x38 | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_6`](#start_addr_sub_low) | 0x3c | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_7`](#start_addr_sub_low) | 0x40 | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_8`](#start_addr_sub_low) | 0x44 | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_9`](#start_addr_sub_low) | 0x48 | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_10`](#start_addr_sub_low) | 0x4c | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_11`](#start_addr_sub_low) | 0x50 | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_12`](#start_addr_sub_low) | 0x54 | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_13`](#start_addr_sub_low) | 0x58 | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_14`](#start_addr_sub_low) | 0x5c | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_low_15`](#start_addr_sub_low) | 0x60 | 4 | The lower 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_0`](#start_addr_sub_high) | 0x64 | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_1`](#start_addr_sub_high) | 0x68 | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_2`](#start_addr_sub_high) | 0x6c | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_3`](#start_addr_sub_high) | 0x70 | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_4`](#start_addr_sub_high) | 0x74 | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_5`](#start_addr_sub_high) | 0x78 | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_6`](#start_addr_sub_high) | 0x7c | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_7`](#start_addr_sub_high) | 0x80 | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_8`](#start_addr_sub_high) | 0x84 | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_9`](#start_addr_sub_high) | 0x88 | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_10`](#start_addr_sub_high) | 0x8c | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_11`](#start_addr_sub_high) | 0x90 | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_12`](#start_addr_sub_high) | 0x94 | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_13`](#start_addr_sub_high) | 0x98 | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_14`](#start_addr_sub_high) | 0x9c | 4 | The higher 32bit of the start address. | +| axi_rt.[`start_addr_sub_high_15`](#start_addr_sub_high) | 0xa0 | 4 | The higher 32bit of the start address. | +| axi_rt.[`end_addr_sub_low_0`](#end_addr_sub_low) | 0xa4 | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_1`](#end_addr_sub_low) | 0xa8 | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_2`](#end_addr_sub_low) | 0xac | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_3`](#end_addr_sub_low) | 0xb0 | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_4`](#end_addr_sub_low) | 0xb4 | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_5`](#end_addr_sub_low) | 0xb8 | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_6`](#end_addr_sub_low) | 0xbc | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_7`](#end_addr_sub_low) | 0xc0 | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_8`](#end_addr_sub_low) | 0xc4 | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_9`](#end_addr_sub_low) | 0xc8 | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_10`](#end_addr_sub_low) | 0xcc | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_11`](#end_addr_sub_low) | 0xd0 | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_12`](#end_addr_sub_low) | 0xd4 | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_13`](#end_addr_sub_low) | 0xd8 | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_14`](#end_addr_sub_low) | 0xdc | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_low_15`](#end_addr_sub_low) | 0xe0 | 4 | The lower 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_0`](#end_addr_sub_high) | 0xe4 | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_1`](#end_addr_sub_high) | 0xe8 | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_2`](#end_addr_sub_high) | 0xec | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_3`](#end_addr_sub_high) | 0xf0 | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_4`](#end_addr_sub_high) | 0xf4 | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_5`](#end_addr_sub_high) | 0xf8 | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_6`](#end_addr_sub_high) | 0xfc | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_7`](#end_addr_sub_high) | 0x100 | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_8`](#end_addr_sub_high) | 0x104 | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_9`](#end_addr_sub_high) | 0x108 | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_10`](#end_addr_sub_high) | 0x10c | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_11`](#end_addr_sub_high) | 0x110 | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_12`](#end_addr_sub_high) | 0x114 | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_13`](#end_addr_sub_high) | 0x118 | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_14`](#end_addr_sub_high) | 0x11c | 4 | The higher 32bit of the end address. | +| axi_rt.[`end_addr_sub_high_15`](#end_addr_sub_high) | 0x120 | 4 | The higher 32bit of the end address. | +| axi_rt.[`write_budget_0`](#write_budget) | 0x124 | 4 | The budget for writes. | +| axi_rt.[`write_budget_1`](#write_budget) | 0x128 | 4 | The budget for writes. | +| axi_rt.[`write_budget_2`](#write_budget) | 0x12c | 4 | The budget for writes. | +| axi_rt.[`write_budget_3`](#write_budget) | 0x130 | 4 | The budget for writes. | +| axi_rt.[`write_budget_4`](#write_budget) | 0x134 | 4 | The budget for writes. | +| axi_rt.[`write_budget_5`](#write_budget) | 0x138 | 4 | The budget for writes. | +| axi_rt.[`write_budget_6`](#write_budget) | 0x13c | 4 | The budget for writes. | +| axi_rt.[`write_budget_7`](#write_budget) | 0x140 | 4 | The budget for writes. | +| axi_rt.[`write_budget_8`](#write_budget) | 0x144 | 4 | The budget for writes. | +| axi_rt.[`write_budget_9`](#write_budget) | 0x148 | 4 | The budget for writes. | +| axi_rt.[`write_budget_10`](#write_budget) | 0x14c | 4 | The budget for writes. | +| axi_rt.[`write_budget_11`](#write_budget) | 0x150 | 4 | The budget for writes. | +| axi_rt.[`write_budget_12`](#write_budget) | 0x154 | 4 | The budget for writes. | +| axi_rt.[`write_budget_13`](#write_budget) | 0x158 | 4 | The budget for writes. | +| axi_rt.[`write_budget_14`](#write_budget) | 0x15c | 4 | The budget for writes. | +| axi_rt.[`write_budget_15`](#write_budget) | 0x160 | 4 | The budget for writes. | +| axi_rt.[`read_budget_0`](#read_budget) | 0x164 | 4 | The budget for reads. | +| axi_rt.[`read_budget_1`](#read_budget) | 0x168 | 4 | The budget for reads. | +| axi_rt.[`read_budget_2`](#read_budget) | 0x16c | 4 | The budget for reads. | +| axi_rt.[`read_budget_3`](#read_budget) | 0x170 | 4 | The budget for reads. | +| axi_rt.[`read_budget_4`](#read_budget) | 0x174 | 4 | The budget for reads. | +| axi_rt.[`read_budget_5`](#read_budget) | 0x178 | 4 | The budget for reads. | +| axi_rt.[`read_budget_6`](#read_budget) | 0x17c | 4 | The budget for reads. | +| axi_rt.[`read_budget_7`](#read_budget) | 0x180 | 4 | The budget for reads. | +| axi_rt.[`read_budget_8`](#read_budget) | 0x184 | 4 | The budget for reads. | +| axi_rt.[`read_budget_9`](#read_budget) | 0x188 | 4 | The budget for reads. | +| axi_rt.[`read_budget_10`](#read_budget) | 0x18c | 4 | The budget for reads. | +| axi_rt.[`read_budget_11`](#read_budget) | 0x190 | 4 | The budget for reads. | +| axi_rt.[`read_budget_12`](#read_budget) | 0x194 | 4 | The budget for reads. | +| axi_rt.[`read_budget_13`](#read_budget) | 0x198 | 4 | The budget for reads. | +| axi_rt.[`read_budget_14`](#read_budget) | 0x19c | 4 | The budget for reads. | +| axi_rt.[`read_budget_15`](#read_budget) | 0x1a0 | 4 | The budget for reads. | +| axi_rt.[`write_period_0`](#write_period) | 0x1a4 | 4 | The period for writes. | +| axi_rt.[`write_period_1`](#write_period) | 0x1a8 | 4 | The period for writes. | +| axi_rt.[`write_period_2`](#write_period) | 0x1ac | 4 | The period for writes. | +| axi_rt.[`write_period_3`](#write_period) | 0x1b0 | 4 | The period for writes. | +| axi_rt.[`write_period_4`](#write_period) | 0x1b4 | 4 | The period for writes. | +| axi_rt.[`write_period_5`](#write_period) | 0x1b8 | 4 | The period for writes. | +| axi_rt.[`write_period_6`](#write_period) | 0x1bc | 4 | The period for writes. | +| axi_rt.[`write_period_7`](#write_period) | 0x1c0 | 4 | The period for writes. | +| axi_rt.[`write_period_8`](#write_period) | 0x1c4 | 4 | The period for writes. | +| axi_rt.[`write_period_9`](#write_period) | 0x1c8 | 4 | The period for writes. | +| axi_rt.[`write_period_10`](#write_period) | 0x1cc | 4 | The period for writes. | +| axi_rt.[`write_period_11`](#write_period) | 0x1d0 | 4 | The period for writes. | +| axi_rt.[`write_period_12`](#write_period) | 0x1d4 | 4 | The period for writes. | +| axi_rt.[`write_period_13`](#write_period) | 0x1d8 | 4 | The period for writes. | +| axi_rt.[`write_period_14`](#write_period) | 0x1dc | 4 | The period for writes. | +| axi_rt.[`write_period_15`](#write_period) | 0x1e0 | 4 | The period for writes. | +| axi_rt.[`read_period_0`](#read_period) | 0x1e4 | 4 | The period for reads. | +| axi_rt.[`read_period_1`](#read_period) | 0x1e8 | 4 | The period for reads. | +| axi_rt.[`read_period_2`](#read_period) | 0x1ec | 4 | The period for reads. | +| axi_rt.[`read_period_3`](#read_period) | 0x1f0 | 4 | The period for reads. | +| axi_rt.[`read_period_4`](#read_period) | 0x1f4 | 4 | The period for reads. | +| axi_rt.[`read_period_5`](#read_period) | 0x1f8 | 4 | The period for reads. | +| axi_rt.[`read_period_6`](#read_period) | 0x1fc | 4 | The period for reads. | +| axi_rt.[`read_period_7`](#read_period) | 0x200 | 4 | The period for reads. | +| axi_rt.[`read_period_8`](#read_period) | 0x204 | 4 | The period for reads. | +| axi_rt.[`read_period_9`](#read_period) | 0x208 | 4 | The period for reads. | +| axi_rt.[`read_period_10`](#read_period) | 0x20c | 4 | The period for reads. | +| axi_rt.[`read_period_11`](#read_period) | 0x210 | 4 | The period for reads. | +| axi_rt.[`read_period_12`](#read_period) | 0x214 | 4 | The period for reads. | +| axi_rt.[`read_period_13`](#read_period) | 0x218 | 4 | The period for reads. | +| axi_rt.[`read_period_14`](#read_period) | 0x21c | 4 | The period for reads. | +| axi_rt.[`read_period_15`](#read_period) | 0x220 | 4 | The period for reads. | +| axi_rt.[`write_budget_left_0`](#write_budget_left) | 0x224 | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_1`](#write_budget_left) | 0x228 | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_2`](#write_budget_left) | 0x22c | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_3`](#write_budget_left) | 0x230 | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_4`](#write_budget_left) | 0x234 | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_5`](#write_budget_left) | 0x238 | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_6`](#write_budget_left) | 0x23c | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_7`](#write_budget_left) | 0x240 | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_8`](#write_budget_left) | 0x244 | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_9`](#write_budget_left) | 0x248 | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_10`](#write_budget_left) | 0x24c | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_11`](#write_budget_left) | 0x250 | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_12`](#write_budget_left) | 0x254 | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_13`](#write_budget_left) | 0x258 | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_14`](#write_budget_left) | 0x25c | 4 | The budget left for writes. | +| axi_rt.[`write_budget_left_15`](#write_budget_left) | 0x260 | 4 | The budget left for writes. | +| axi_rt.[`read_budget_left_0`](#read_budget_left) | 0x264 | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_1`](#read_budget_left) | 0x268 | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_2`](#read_budget_left) | 0x26c | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_3`](#read_budget_left) | 0x270 | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_4`](#read_budget_left) | 0x274 | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_5`](#read_budget_left) | 0x278 | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_6`](#read_budget_left) | 0x27c | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_7`](#read_budget_left) | 0x280 | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_8`](#read_budget_left) | 0x284 | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_9`](#read_budget_left) | 0x288 | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_10`](#read_budget_left) | 0x28c | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_11`](#read_budget_left) | 0x290 | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_12`](#read_budget_left) | 0x294 | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_13`](#read_budget_left) | 0x298 | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_14`](#read_budget_left) | 0x29c | 4 | The budget left for reads. | +| axi_rt.[`read_budget_left_15`](#read_budget_left) | 0x2a0 | 4 | The budget left for reads. | +| axi_rt.[`write_period_left_0`](#write_period_left) | 0x2a4 | 4 | The period left for writes. | +| axi_rt.[`write_period_left_1`](#write_period_left) | 0x2a8 | 4 | The period left for writes. | +| axi_rt.[`write_period_left_2`](#write_period_left) | 0x2ac | 4 | The period left for writes. | +| axi_rt.[`write_period_left_3`](#write_period_left) | 0x2b0 | 4 | The period left for writes. | +| axi_rt.[`write_period_left_4`](#write_period_left) | 0x2b4 | 4 | The period left for writes. | +| axi_rt.[`write_period_left_5`](#write_period_left) | 0x2b8 | 4 | The period left for writes. | +| axi_rt.[`write_period_left_6`](#write_period_left) | 0x2bc | 4 | The period left for writes. | +| axi_rt.[`write_period_left_7`](#write_period_left) | 0x2c0 | 4 | The period left for writes. | +| axi_rt.[`write_period_left_8`](#write_period_left) | 0x2c4 | 4 | The period left for writes. | +| axi_rt.[`write_period_left_9`](#write_period_left) | 0x2c8 | 4 | The period left for writes. | +| axi_rt.[`write_period_left_10`](#write_period_left) | 0x2cc | 4 | The period left for writes. | +| axi_rt.[`write_period_left_11`](#write_period_left) | 0x2d0 | 4 | The period left for writes. | +| axi_rt.[`write_period_left_12`](#write_period_left) | 0x2d4 | 4 | The period left for writes. | +| axi_rt.[`write_period_left_13`](#write_period_left) | 0x2d8 | 4 | The period left for writes. | +| axi_rt.[`write_period_left_14`](#write_period_left) | 0x2dc | 4 | The period left for writes. | +| axi_rt.[`write_period_left_15`](#write_period_left) | 0x2e0 | 4 | The period left for writes. | +| axi_rt.[`read_period_left_0`](#read_period_left) | 0x2e4 | 4 | The period left for reads. | +| axi_rt.[`read_period_left_1`](#read_period_left) | 0x2e8 | 4 | The period left for reads. | +| axi_rt.[`read_period_left_2`](#read_period_left) | 0x2ec | 4 | The period left for reads. | +| axi_rt.[`read_period_left_3`](#read_period_left) | 0x2f0 | 4 | The period left for reads. | +| axi_rt.[`read_period_left_4`](#read_period_left) | 0x2f4 | 4 | The period left for reads. | +| axi_rt.[`read_period_left_5`](#read_period_left) | 0x2f8 | 4 | The period left for reads. | +| axi_rt.[`read_period_left_6`](#read_period_left) | 0x2fc | 4 | The period left for reads. | +| axi_rt.[`read_period_left_7`](#read_period_left) | 0x300 | 4 | The period left for reads. | +| axi_rt.[`read_period_left_8`](#read_period_left) | 0x304 | 4 | The period left for reads. | +| axi_rt.[`read_period_left_9`](#read_period_left) | 0x308 | 4 | The period left for reads. | +| axi_rt.[`read_period_left_10`](#read_period_left) | 0x30c | 4 | The period left for reads. | +| axi_rt.[`read_period_left_11`](#read_period_left) | 0x310 | 4 | The period left for reads. | +| axi_rt.[`read_period_left_12`](#read_period_left) | 0x314 | 4 | The period left for reads. | +| axi_rt.[`read_period_left_13`](#read_period_left) | 0x318 | 4 | The period left for reads. | +| axi_rt.[`read_period_left_14`](#read_period_left) | 0x31c | 4 | The period left for reads. | +| axi_rt.[`read_period_left_15`](#read_period_left) | 0x320 | 4 | The period left for reads. | +| axi_rt.[`isolate`](#isolate) | 0x324 | 4 | Is the interface requested to be isolated? | +| axi_rt.[`isolated`](#isolated) | 0x328 | 4 | Is the interface isolated? | +| axi_rt.[`num_managers`](#num_managers) | 0x32c | 4 | Value of the num_managers parameter. | +| axi_rt.[`addr_width`](#addr_width) | 0x330 | 4 | Value of the addr_width parameter. | +| axi_rt.[`data_width`](#data_width) | 0x334 | 4 | Value of the data_width parameter. | +| axi_rt.[`id_width`](#id_width) | 0x338 | 4 | Value of the id_width parameter. | +| axi_rt.[`user_width`](#user_width) | 0x33c | 4 | Value of the user_width parameter. | +| axi_rt.[`num_pending`](#num_pending) | 0x340 | 4 | Value of the num_pending parameter. | +| axi_rt.[`w_buffer_depth`](#w_buffer_depth) | 0x344 | 4 | Value of the w_buffer_depth parameter. | +| axi_rt.[`num_addr_regions`](#num_addr_regions) | 0x348 | 4 | Value of the num_addr_regions parameter. | +| axi_rt.[`period_width`](#period_width) | 0x34c | 4 | Value of the period_width parameter. | +| axi_rt.[`budget_width`](#budget_width) | 0x350 | 4 | Value of the budget_width parameter. | +| axi_rt.[`max_num_managers`](#max_num_managers) | 0x354 | 4 | Value of the max_num_managers parameter. | + +## major_version +Value of the major_version. +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "major_version", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:----------------------------| +| 31:0 | ro | 0x0 | major_version | Value of the major_version. | + +## minor_version +Value of the minor_version. +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "minor_version", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:----------------------------| +| 31:0 | ro | 0x0 | minor_version | Value of the minor_version. | + +## patch_version +Value of the patch_version. +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "patch_version", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:----------------------------| +| 31:0 | ro | 0x0 | patch_version | Value of the patch_version. | + +## rt_enable +Enable RT feature on master +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "enable_0", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "enable_1", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "enable_2", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "enable_3", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "enable_4", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "enable_5", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "enable_6", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "enable_7", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 100}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:----------------------------| +| 31:8 | | | | Reserved | +| 7 | wo | 0x0 | enable_7 | Enable RT feature on master | +| 6 | wo | 0x0 | enable_6 | Enable RT feature on master | +| 5 | wo | 0x0 | enable_5 | Enable RT feature on master | +| 4 | wo | 0x0 | enable_4 | Enable RT feature on master | +| 3 | wo | 0x0 | enable_3 | Enable RT feature on master | +| 2 | wo | 0x0 | enable_2 | Enable RT feature on master | +| 1 | wo | 0x0 | enable_1 | Enable RT feature on master | +| 0 | wo | 0x0 | enable_0 | Enable RT feature on master | + +## rt_bypassed +Is the RT inactive? +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "bypassed_0", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "bypassed_1", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "bypassed_2", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "bypassed_3", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "bypassed_4", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "bypassed_5", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "bypassed_6", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "bypassed_7", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------------| +| 31:8 | | | | Reserved | +| 7 | ro | x | bypassed_7 | Is the RT inactive? | +| 6 | ro | x | bypassed_6 | Is the RT inactive? | +| 5 | ro | x | bypassed_5 | Is the RT inactive? | +| 4 | ro | x | bypassed_4 | Is the RT inactive? | +| 3 | ro | x | bypassed_3 | Is the RT inactive? | +| 2 | ro | x | bypassed_2 | Is the RT inactive? | +| 1 | ro | x | bypassed_1 | Is the RT inactive? | +| 0 | ro | x | bypassed_0 | Is the RT inactive? | + +## len_limit_0 +Fragmentation of the bursts in beats. +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "len_0", "bits": 8, "attr": ["wo"], "rotate": 0}, {"name": "len_1", "bits": 8, "attr": ["wo"], "rotate": 0}, {"name": "len_2", "bits": 8, "attr": ["wo"], "rotate": 0}, {"name": "len_3", "bits": 8, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------| +| 31:24 | wo | 0x0 | len_3 | Fragmentation of the bursts in beats. | +| 23:16 | wo | 0x0 | len_2 | Fragmentation of the bursts in beats. | +| 15:8 | wo | 0x0 | len_1 | Fragmentation of the bursts in beats. | +| 7:0 | wo | 0x0 | len_0 | Fragmentation of the bursts in beats. | + +## len_limit_1 +Fragmentation of the bursts in beats. +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "len_4", "bits": 8, "attr": ["wo"], "rotate": 0}, {"name": "len_5", "bits": 8, "attr": ["wo"], "rotate": 0}, {"name": "len_6", "bits": 8, "attr": ["wo"], "rotate": 0}, {"name": "len_7", "bits": 8, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------| +| 31:24 | wo | 0x0 | len_7 | For len_limit1 | +| 23:16 | wo | 0x0 | len_6 | For len_limit1 | +| 15:8 | wo | 0x0 | len_5 | For len_limit1 | +| 7:0 | wo | 0x0 | len_4 | For len_limit1 | + +## imtu_enable +Enables the IMTU. +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "enable_0", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "enable_1", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "enable_2", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "enable_3", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "enable_4", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "enable_5", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "enable_6", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "enable_7", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 100}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:------------------| +| 31:8 | | | | Reserved | +| 7 | wo | 0x0 | enable_7 | Enables the IMTU. | +| 6 | wo | 0x0 | enable_6 | Enables the IMTU. | +| 5 | wo | 0x0 | enable_5 | Enables the IMTU. | +| 4 | wo | 0x0 | enable_4 | Enables the IMTU. | +| 3 | wo | 0x0 | enable_3 | Enables the IMTU. | +| 2 | wo | 0x0 | enable_2 | Enables the IMTU. | +| 1 | wo | 0x0 | enable_1 | Enables the IMTU. | +| 0 | wo | 0x0 | enable_0 | Enables the IMTU. | + +## imtu_abort +Resets both the period and the budget. +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "abort_0", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "abort_1", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "abort_2", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "abort_3", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "abort_4", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "abort_5", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "abort_6", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "abort_7", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:---------------------------------------| +| 31:8 | | | | Reserved | +| 7 | wo | 0x0 | abort_7 | Resets both the period and the budget. | +| 6 | wo | 0x0 | abort_6 | Resets both the period and the budget. | +| 5 | wo | 0x0 | abort_5 | Resets both the period and the budget. | +| 4 | wo | 0x0 | abort_4 | Resets both the period and the budget. | +| 3 | wo | 0x0 | abort_3 | Resets both the period and the budget. | +| 2 | wo | 0x0 | abort_2 | Resets both the period and the budget. | +| 1 | wo | 0x0 | abort_1 | Resets both the period and the budget. | +| 0 | wo | 0x0 | abort_0 | Resets both the period and the budget. | + +## start_addr_sub_low +The lower 32bit of the start address. +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:----------------------|:---------| +| start_addr_sub_low_0 | 0x24 | +| start_addr_sub_low_1 | 0x28 | +| start_addr_sub_low_2 | 0x2c | +| start_addr_sub_low_3 | 0x30 | +| start_addr_sub_low_4 | 0x34 | +| start_addr_sub_low_5 | 0x38 | +| start_addr_sub_low_6 | 0x3c | +| start_addr_sub_low_7 | 0x40 | +| start_addr_sub_low_8 | 0x44 | +| start_addr_sub_low_9 | 0x48 | +| start_addr_sub_low_10 | 0x4c | +| start_addr_sub_low_11 | 0x50 | +| start_addr_sub_low_12 | 0x54 | +| start_addr_sub_low_13 | 0x58 | +| start_addr_sub_low_14 | 0x5c | +| start_addr_sub_low_15 | 0x60 | + + +### Fields + +```wavejson +{"reg": [{"name": "write_budget", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:--------------------------------------| +| 31:0 | wo | 0x0 | write_budget | The lower 32bit of the start address. | + +## start_addr_sub_high +The higher 32bit of the start address. +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:-----------------------|:---------| +| start_addr_sub_high_0 | 0x64 | +| start_addr_sub_high_1 | 0x68 | +| start_addr_sub_high_2 | 0x6c | +| start_addr_sub_high_3 | 0x70 | +| start_addr_sub_high_4 | 0x74 | +| start_addr_sub_high_5 | 0x78 | +| start_addr_sub_high_6 | 0x7c | +| start_addr_sub_high_7 | 0x80 | +| start_addr_sub_high_8 | 0x84 | +| start_addr_sub_high_9 | 0x88 | +| start_addr_sub_high_10 | 0x8c | +| start_addr_sub_high_11 | 0x90 | +| start_addr_sub_high_12 | 0x94 | +| start_addr_sub_high_13 | 0x98 | +| start_addr_sub_high_14 | 0x9c | +| start_addr_sub_high_15 | 0xa0 | + + +### Fields + +```wavejson +{"reg": [{"name": "write_budget", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:---------------------------------------| +| 31:0 | wo | 0x0 | write_budget | The higher 32bit of the start address. | + +## end_addr_sub_low +The lower 32bit of the end address. +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:--------------------|:---------| +| end_addr_sub_low_0 | 0xa4 | +| end_addr_sub_low_1 | 0xa8 | +| end_addr_sub_low_2 | 0xac | +| end_addr_sub_low_3 | 0xb0 | +| end_addr_sub_low_4 | 0xb4 | +| end_addr_sub_low_5 | 0xb8 | +| end_addr_sub_low_6 | 0xbc | +| end_addr_sub_low_7 | 0xc0 | +| end_addr_sub_low_8 | 0xc4 | +| end_addr_sub_low_9 | 0xc8 | +| end_addr_sub_low_10 | 0xcc | +| end_addr_sub_low_11 | 0xd0 | +| end_addr_sub_low_12 | 0xd4 | +| end_addr_sub_low_13 | 0xd8 | +| end_addr_sub_low_14 | 0xdc | +| end_addr_sub_low_15 | 0xe0 | + + +### Fields + +```wavejson +{"reg": [{"name": "write_budget", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:------------------------------------| +| 31:0 | wo | 0x0 | write_budget | The lower 32bit of the end address. | + +## end_addr_sub_high +The higher 32bit of the end address. +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:---------------------|:---------| +| end_addr_sub_high_0 | 0xe4 | +| end_addr_sub_high_1 | 0xe8 | +| end_addr_sub_high_2 | 0xec | +| end_addr_sub_high_3 | 0xf0 | +| end_addr_sub_high_4 | 0xf4 | +| end_addr_sub_high_5 | 0xf8 | +| end_addr_sub_high_6 | 0xfc | +| end_addr_sub_high_7 | 0x100 | +| end_addr_sub_high_8 | 0x104 | +| end_addr_sub_high_9 | 0x108 | +| end_addr_sub_high_10 | 0x10c | +| end_addr_sub_high_11 | 0x110 | +| end_addr_sub_high_12 | 0x114 | +| end_addr_sub_high_13 | 0x118 | +| end_addr_sub_high_14 | 0x11c | +| end_addr_sub_high_15 | 0x120 | + + +### Fields + +```wavejson +{"reg": [{"name": "write_budget", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:-------------------------------------| +| 31:0 | wo | 0x0 | write_budget | The higher 32bit of the end address. | + +## write_budget +The budget for writes. +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:----------------|:---------| +| write_budget_0 | 0x124 | +| write_budget_1 | 0x128 | +| write_budget_2 | 0x12c | +| write_budget_3 | 0x130 | +| write_budget_4 | 0x134 | +| write_budget_5 | 0x138 | +| write_budget_6 | 0x13c | +| write_budget_7 | 0x140 | +| write_budget_8 | 0x144 | +| write_budget_9 | 0x148 | +| write_budget_10 | 0x14c | +| write_budget_11 | 0x150 | +| write_budget_12 | 0x154 | +| write_budget_13 | 0x158 | +| write_budget_14 | 0x15c | +| write_budget_15 | 0x160 | + + +### Fields + +```wavejson +{"reg": [{"name": "write_budget", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:-----------------------| +| 31:0 | wo | 0x0 | write_budget | The budget for writes. | + +## read_budget +The budget for reads. +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:---------------|:---------| +| read_budget_0 | 0x164 | +| read_budget_1 | 0x168 | +| read_budget_2 | 0x16c | +| read_budget_3 | 0x170 | +| read_budget_4 | 0x174 | +| read_budget_5 | 0x178 | +| read_budget_6 | 0x17c | +| read_budget_7 | 0x180 | +| read_budget_8 | 0x184 | +| read_budget_9 | 0x188 | +| read_budget_10 | 0x18c | +| read_budget_11 | 0x190 | +| read_budget_12 | 0x194 | +| read_budget_13 | 0x198 | +| read_budget_14 | 0x19c | +| read_budget_15 | 0x1a0 | + + +### Fields + +```wavejson +{"reg": [{"name": "read_budget", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:----------------------| +| 31:0 | wo | 0x0 | read_budget | The budget for reads. | + +## write_period +The period for writes. +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:----------------|:---------| +| write_period_0 | 0x1a4 | +| write_period_1 | 0x1a8 | +| write_period_2 | 0x1ac | +| write_period_3 | 0x1b0 | +| write_period_4 | 0x1b4 | +| write_period_5 | 0x1b8 | +| write_period_6 | 0x1bc | +| write_period_7 | 0x1c0 | +| write_period_8 | 0x1c4 | +| write_period_9 | 0x1c8 | +| write_period_10 | 0x1cc | +| write_period_11 | 0x1d0 | +| write_period_12 | 0x1d4 | +| write_period_13 | 0x1d8 | +| write_period_14 | 0x1dc | +| write_period_15 | 0x1e0 | + + +### Fields + +```wavejson +{"reg": [{"name": "write_period", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:-----------------------| +| 31:0 | wo | 0x0 | write_period | The period for writes. | + +## read_period +The period for reads. +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:---------------|:---------| +| read_period_0 | 0x1e4 | +| read_period_1 | 0x1e8 | +| read_period_2 | 0x1ec | +| read_period_3 | 0x1f0 | +| read_period_4 | 0x1f4 | +| read_period_5 | 0x1f8 | +| read_period_6 | 0x1fc | +| read_period_7 | 0x200 | +| read_period_8 | 0x204 | +| read_period_9 | 0x208 | +| read_period_10 | 0x20c | +| read_period_11 | 0x210 | +| read_period_12 | 0x214 | +| read_period_13 | 0x218 | +| read_period_14 | 0x21c | +| read_period_15 | 0x220 | + + +### Fields + +```wavejson +{"reg": [{"name": "read_period", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:----------------------| +| 31:0 | wo | 0x0 | read_period | The period for reads. | + +## write_budget_left +The budget left for writes. +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:---------------------|:---------| +| write_budget_left_0 | 0x224 | +| write_budget_left_1 | 0x228 | +| write_budget_left_2 | 0x22c | +| write_budget_left_3 | 0x230 | +| write_budget_left_4 | 0x234 | +| write_budget_left_5 | 0x238 | +| write_budget_left_6 | 0x23c | +| write_budget_left_7 | 0x240 | +| write_budget_left_8 | 0x244 | +| write_budget_left_9 | 0x248 | +| write_budget_left_10 | 0x24c | +| write_budget_left_11 | 0x250 | +| write_budget_left_12 | 0x254 | +| write_budget_left_13 | 0x258 | +| write_budget_left_14 | 0x25c | +| write_budget_left_15 | 0x260 | + + +### Fields + +```wavejson +{"reg": [{"name": "write_budget_left", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:----------------------------| +| 31:0 | ro | 0x0 | write_budget_left | The budget left for writes. | + +## read_budget_left +The budget left for reads. +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:--------------------|:---------| +| read_budget_left_0 | 0x264 | +| read_budget_left_1 | 0x268 | +| read_budget_left_2 | 0x26c | +| read_budget_left_3 | 0x270 | +| read_budget_left_4 | 0x274 | +| read_budget_left_5 | 0x278 | +| read_budget_left_6 | 0x27c | +| read_budget_left_7 | 0x280 | +| read_budget_left_8 | 0x284 | +| read_budget_left_9 | 0x288 | +| read_budget_left_10 | 0x28c | +| read_budget_left_11 | 0x290 | +| read_budget_left_12 | 0x294 | +| read_budget_left_13 | 0x298 | +| read_budget_left_14 | 0x29c | +| read_budget_left_15 | 0x2a0 | + + +### Fields + +```wavejson +{"reg": [{"name": "read_budget_left", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:---------------------------| +| 31:0 | ro | 0x0 | read_budget_left | The budget left for reads. | + +## write_period_left +The period left for writes. +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:---------------------|:---------| +| write_period_left_0 | 0x2a4 | +| write_period_left_1 | 0x2a8 | +| write_period_left_2 | 0x2ac | +| write_period_left_3 | 0x2b0 | +| write_period_left_4 | 0x2b4 | +| write_period_left_5 | 0x2b8 | +| write_period_left_6 | 0x2bc | +| write_period_left_7 | 0x2c0 | +| write_period_left_8 | 0x2c4 | +| write_period_left_9 | 0x2c8 | +| write_period_left_10 | 0x2cc | +| write_period_left_11 | 0x2d0 | +| write_period_left_12 | 0x2d4 | +| write_period_left_13 | 0x2d8 | +| write_period_left_14 | 0x2dc | +| write_period_left_15 | 0x2e0 | + + +### Fields + +```wavejson +{"reg": [{"name": "write_period_left", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:----------------------------| +| 31:0 | ro | 0x0 | write_period_left | The period left for writes. | + +## read_period_left +The period left for reads. +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:--------------------|:---------| +| read_period_left_0 | 0x2e4 | +| read_period_left_1 | 0x2e8 | +| read_period_left_2 | 0x2ec | +| read_period_left_3 | 0x2f0 | +| read_period_left_4 | 0x2f4 | +| read_period_left_5 | 0x2f8 | +| read_period_left_6 | 0x2fc | +| read_period_left_7 | 0x300 | +| read_period_left_8 | 0x304 | +| read_period_left_9 | 0x308 | +| read_period_left_10 | 0x30c | +| read_period_left_11 | 0x310 | +| read_period_left_12 | 0x314 | +| read_period_left_13 | 0x318 | +| read_period_left_14 | 0x31c | +| read_period_left_15 | 0x320 | + + +### Fields + +```wavejson +{"reg": [{"name": "read_period_left", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:---------------------------| +| 31:0 | ro | 0x0 | read_period_left | The period left for reads. | + +## isolate +Is the interface requested to be isolated? +- Offset: `0x324` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "isolate_0", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "isolate_1", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "isolate_2", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "isolate_3", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "isolate_4", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "isolate_5", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "isolate_6", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "isolate_7", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-------------------------------------------| +| 31:8 | | | | Reserved | +| 7 | ro | x | isolate_7 | Is the interface requested to be isolated? | +| 6 | ro | x | isolate_6 | Is the interface requested to be isolated? | +| 5 | ro | x | isolate_5 | Is the interface requested to be isolated? | +| 4 | ro | x | isolate_4 | Is the interface requested to be isolated? | +| 3 | ro | x | isolate_3 | Is the interface requested to be isolated? | +| 2 | ro | x | isolate_2 | Is the interface requested to be isolated? | +| 1 | ro | x | isolate_1 | Is the interface requested to be isolated? | +| 0 | ro | x | isolate_0 | Is the interface requested to be isolated? | + +## isolated +Is the interface isolated? +- Offset: `0x328` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "isolated_0", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "isolated_1", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "isolated_2", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "isolated_3", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "isolated_4", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "isolated_5", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "isolated_6", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "isolated_7", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:---------------------------| +| 31:8 | | | | Reserved | +| 7 | ro | x | isolated_7 | Is the interface isolated? | +| 6 | ro | x | isolated_6 | Is the interface isolated? | +| 5 | ro | x | isolated_5 | Is the interface isolated? | +| 4 | ro | x | isolated_4 | Is the interface isolated? | +| 3 | ro | x | isolated_3 | Is the interface isolated? | +| 2 | ro | x | isolated_2 | Is the interface isolated? | +| 1 | ro | x | isolated_1 | Is the interface isolated? | +| 0 | ro | x | isolated_0 | Is the interface isolated? | + +## num_managers +Value of the num_managers parameter. +- Offset: `0x32c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "num_managers", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:-------------------------------------| +| 31:0 | ro | x | num_managers | Value of the num_managers parameter. | + +## addr_width +Value of the addr_width parameter. +- Offset: `0x330` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "addr_width", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:-----------------------------------| +| 31:0 | ro | x | addr_width | Value of the addr_width parameter. | + +## data_width +Value of the data_width parameter. +- Offset: `0x334` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "data_width", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:-----------------------------------| +| 31:0 | ro | x | data_width | Value of the data_width parameter. | + +## id_width +Value of the id_width parameter. +- Offset: `0x338` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "id_width", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:---------------------------------| +| 31:0 | ro | x | id_width | Value of the id_width parameter. | + +## user_width +Value of the user_width parameter. +- Offset: `0x33c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "user_width", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:-----------------------------------| +| 31:0 | ro | x | user_width | Value of the user_width parameter. | + +## num_pending +Value of the num_pending parameter. +- Offset: `0x340` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "num_pending", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:------------------------------------| +| 31:0 | ro | x | num_pending | Value of the num_pending parameter. | + +## w_buffer_depth +Value of the w_buffer_depth parameter. +- Offset: `0x344` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "w_buffer_depth", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:---------------------------------------| +| 31:0 | ro | x | w_buffer_depth | Value of the w_buffer_depth parameter. | + +## num_addr_regions +Value of the num_addr_regions parameter. +- Offset: `0x348` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "num_addr_regions", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:-----------------------------------------| +| 31:0 | ro | x | num_addr_regions | Value of the num_addr_regions parameter. | + +## period_width +Value of the period_width parameter. +- Offset: `0x34c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "period_width", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:-------------------------------------| +| 31:0 | ro | x | period_width | Value of the period_width parameter. | + +## budget_width +Value of the budget_width parameter. +- Offset: `0x350` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "budget_width", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:-------------------------------------| +| 31:0 | ro | x | budget_width | Value of the budget_width parameter. | + +## max_num_managers +Value of the max_num_managers parameter. +- Offset: `0x354` +- Reset default: `0x8` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "max_num_managers", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:-----------------------------------------| +| 31:0 | ro | 0x8 | max_num_managers | Value of the max_num_managers parameter. | + + + +## can_bus / doc / registers.md + +## Summary + +| Name | Offset | Length | Description | +|:--------------------------------------------------------------------------------------------------------------|:---------|---------:|:-------------------------------------------------------------------------------| +| can_bus.[`ahb_ifc_hsel_valid`](#ahb_ifc_hsel_valid) | 0x0 | 4 | Auto-extracted signal hsel_valid from ahb_ifc.vhd | +| can_bus.[`ahb_ifc_write_acc_d`](#ahb_ifc_write_acc_d) | 0x4 | 4 | Auto-extracted signal write_acc_d from ahb_ifc.vhd | +| can_bus.[`ahb_ifc_write_acc_q`](#ahb_ifc_write_acc_q) | 0x8 | 4 | Auto-extracted signal write_acc_q from ahb_ifc.vhd | +| can_bus.[`ahb_ifc_haddr_q`](#ahb_ifc_haddr_q) | 0xc | 4 | Auto-extracted signal haddr_q from ahb_ifc.vhd | +| can_bus.[`ahb_ifc_h_ready_raw`](#ahb_ifc_h_ready_raw) | 0x10 | 4 | Auto-extracted signal h_ready_raw from ahb_ifc.vhd | +| can_bus.[`ahb_ifc_sbe_d`](#ahb_ifc_sbe_d) | 0x14 | 4 | Auto-extracted signal sbe_d from ahb_ifc.vhd | +| can_bus.[`ahb_ifc_sbe_q`](#ahb_ifc_sbe_q) | 0x18 | 4 | Auto-extracted signal sbe_q from ahb_ifc.vhd | +| can_bus.[`ahb_ifc_swr_i`](#ahb_ifc_swr_i) | 0x1c | 4 | Auto-extracted signal swr_i from ahb_ifc.vhd | +| can_bus.[`ahb_ifc_srd_i`](#ahb_ifc_srd_i) | 0x20 | 4 | Auto-extracted signal srd_i from ahb_ifc.vhd | +| can_bus.[`bit_destuffing_discard_stuff_bit`](#bit_destuffing_discard_stuff_bit) | 0x24 | 4 | Auto-extracted signal discard_stuff_bit from bit_destuffing.vhd | +| can_bus.[`bit_destuffing_non_fix_to_fix_chng`](#bit_destuffing_non_fix_to_fix_chng) | 0x28 | 4 | Auto-extracted signal non_fix_to_fix_chng from bit_destuffing.vhd | +| can_bus.[`bit_destuffing_stuff_lvl_reached`](#bit_destuffing_stuff_lvl_reached) | 0x2c | 4 | Auto-extracted signal stuff_lvl_reached from bit_destuffing.vhd | +| can_bus.[`bit_destuffing_stuff_rule_violate`](#bit_destuffing_stuff_rule_violate) | 0x30 | 4 | Auto-extracted signal stuff_rule_violate from bit_destuffing.vhd | +| can_bus.[`bit_destuffing_enable_prev`](#bit_destuffing_enable_prev) | 0x34 | 4 | Auto-extracted signal enable_prev from bit_destuffing.vhd | +| can_bus.[`bit_destuffing_fixed_prev_q`](#bit_destuffing_fixed_prev_q) | 0x38 | 4 | Auto-extracted signal fixed_prev_q from bit_destuffing.vhd | +| can_bus.[`bit_destuffing_fixed_prev_d`](#bit_destuffing_fixed_prev_d) | 0x3c | 4 | Auto-extracted signal fixed_prev_d from bit_destuffing.vhd | +| can_bus.[`bit_destuffing_same_bits_erase`](#bit_destuffing_same_bits_erase) | 0x40 | 4 | Auto-extracted signal same_bits_erase from bit_destuffing.vhd | +| can_bus.[`bit_destuffing_destuffed_q`](#bit_destuffing_destuffed_q) | 0x44 | 4 | Auto-extracted signal destuffed_q from bit_destuffing.vhd | +| can_bus.[`bit_destuffing_destuffed_d`](#bit_destuffing_destuffed_d) | 0x48 | 4 | Auto-extracted signal destuffed_d from bit_destuffing.vhd | +| can_bus.[`bit_destuffing_stuff_err_q`](#bit_destuffing_stuff_err_q) | 0x4c | 4 | Auto-extracted signal stuff_err_q from bit_destuffing.vhd | +| can_bus.[`bit_destuffing_stuff_err_d`](#bit_destuffing_stuff_err_d) | 0x50 | 4 | Auto-extracted signal stuff_err_d from bit_destuffing.vhd | +| can_bus.[`bit_destuffing_prev_val_q`](#bit_destuffing_prev_val_q) | 0x54 | 4 | Auto-extracted signal prev_val_q from bit_destuffing.vhd | +| can_bus.[`bit_destuffing_prev_val_d`](#bit_destuffing_prev_val_d) | 0x58 | 4 | Auto-extracted signal prev_val_d from bit_destuffing.vhd | +| can_bus.[`bit_err_detector_bit_err_d`](#bit_err_detector_bit_err_d) | 0x5c | 4 | Auto-extracted signal bit_err_d from bit_err_detector.vhd | +| can_bus.[`bit_err_detector_bit_err_q`](#bit_err_detector_bit_err_q) | 0x60 | 4 | Auto-extracted signal bit_err_q from bit_err_detector.vhd | +| can_bus.[`bit_err_detector_bit_err_ssp_capt_d`](#bit_err_detector_bit_err_ssp_capt_d) | 0x64 | 4 | Auto-extracted signal bit_err_ssp_capt_d from bit_err_detector.vhd | +| can_bus.[`bit_err_detector_bit_err_ssp_capt_q`](#bit_err_detector_bit_err_ssp_capt_q) | 0x68 | 4 | Auto-extracted signal bit_err_ssp_capt_q from bit_err_detector.vhd | +| can_bus.[`bit_err_detector_bit_err_ssp_valid`](#bit_err_detector_bit_err_ssp_valid) | 0x6c | 4 | Auto-extracted signal bit_err_ssp_valid from bit_err_detector.vhd | +| can_bus.[`bit_err_detector_bit_err_ssp_condition`](#bit_err_detector_bit_err_ssp_condition) | 0x70 | 4 | Auto-extracted signal bit_err_ssp_condition from bit_err_detector.vhd | +| can_bus.[`bit_err_detector_bit_err_norm_valid`](#bit_err_detector_bit_err_norm_valid) | 0x74 | 4 | Auto-extracted signal bit_err_norm_valid from bit_err_detector.vhd | +| can_bus.[`bit_filter_masked_input`](#bit_filter_masked_input) | 0x78 | 4 | Auto-extracted signal masked_input from bit_filter.vhd | +| can_bus.[`bit_filter_masked_value`](#bit_filter_masked_value) | 0x7c | 4 | Auto-extracted signal masked_value from bit_filter.vhd | +| can_bus.[`bit_segment_meter_sel_tseg1`](#bit_segment_meter_sel_tseg1) | 0x80 | 4 | Auto-extracted signal sel_tseg1 from bit_segment_meter.vhd | +| can_bus.[`bit_segment_meter_exp_seg_length_ce`](#bit_segment_meter_exp_seg_length_ce) | 0x84 | 4 | Auto-extracted signal exp_seg_length_ce from bit_segment_meter.vhd | +| can_bus.[`bit_segment_meter_phase_err_mt_sjw`](#bit_segment_meter_phase_err_mt_sjw) | 0x88 | 4 | Auto-extracted signal phase_err_mt_sjw from bit_segment_meter.vhd | +| can_bus.[`bit_segment_meter_phase_err_eq_sjw`](#bit_segment_meter_phase_err_eq_sjw) | 0x8c | 4 | Auto-extracted signal phase_err_eq_sjw from bit_segment_meter.vhd | +| can_bus.[`bit_segment_meter_exit_ph2_immediate`](#bit_segment_meter_exit_ph2_immediate) | 0x90 | 4 | Auto-extracted signal exit_ph2_immediate from bit_segment_meter.vhd | +| can_bus.[`bit_segment_meter_exit_segm_regular`](#bit_segment_meter_exit_segm_regular) | 0x94 | 4 | Auto-extracted signal exit_segm_regular from bit_segment_meter.vhd | +| can_bus.[`bit_segment_meter_exit_segm_regular_tseg1`](#bit_segment_meter_exit_segm_regular_tseg1) | 0x98 | 4 | Auto-extracted signal exit_segm_regular_tseg1 from bit_segment_meter.vhd | +| can_bus.[`bit_segment_meter_exit_segm_regular_tseg2`](#bit_segment_meter_exit_segm_regular_tseg2) | 0x9c | 4 | Auto-extracted signal exit_segm_regular_tseg2 from bit_segment_meter.vhd | +| can_bus.[`bit_segment_meter_sjw_mt_zero`](#bit_segment_meter_sjw_mt_zero) | 0xa0 | 4 | Auto-extracted signal sjw_mt_zero from bit_segment_meter.vhd | +| can_bus.[`bit_segment_meter_use_basic_segm_length`](#bit_segment_meter_use_basic_segm_length) | 0xa4 | 4 | Auto-extracted signal use_basic_segm_length from bit_segment_meter.vhd | +| can_bus.[`bit_segment_meter_phase_err_sjw_by_one`](#bit_segment_meter_phase_err_sjw_by_one) | 0xa8 | 4 | Auto-extracted signal phase_err_sjw_by_one from bit_segment_meter.vhd | +| can_bus.[`bit_segment_meter_shorten_tseg1_after_tseg2`](#bit_segment_meter_shorten_tseg1_after_tseg2) | 0xac | 4 | Auto-extracted signal shorten_tseg1_after_tseg2 from bit_segment_meter.vhd | +| can_bus.[`bit_stuffing_data_out_i`](#bit_stuffing_data_out_i) | 0xb0 | 4 | Auto-extracted signal data_out_i from bit_stuffing.vhd | +| can_bus.[`bit_stuffing_data_halt_q`](#bit_stuffing_data_halt_q) | 0xb4 | 4 | Auto-extracted signal data_halt_q from bit_stuffing.vhd | +| can_bus.[`bit_stuffing_data_halt_d`](#bit_stuffing_data_halt_d) | 0xb8 | 4 | Auto-extracted signal data_halt_d from bit_stuffing.vhd | +| can_bus.[`bit_stuffing_fixed_reg_q`](#bit_stuffing_fixed_reg_q) | 0xbc | 4 | Auto-extracted signal fixed_reg_q from bit_stuffing.vhd | +| can_bus.[`bit_stuffing_fixed_reg_d`](#bit_stuffing_fixed_reg_d) | 0xc0 | 4 | Auto-extracted signal fixed_reg_d from bit_stuffing.vhd | +| can_bus.[`bit_stuffing_enable_prev`](#bit_stuffing_enable_prev) | 0xc4 | 4 | Auto-extracted signal enable_prev from bit_stuffing.vhd | +| can_bus.[`bit_stuffing_non_fix_to_fix_chng`](#bit_stuffing_non_fix_to_fix_chng) | 0xc8 | 4 | Auto-extracted signal non_fix_to_fix_chng from bit_stuffing.vhd | +| can_bus.[`bit_stuffing_stuff_lvl_reached`](#bit_stuffing_stuff_lvl_reached) | 0xcc | 4 | Auto-extracted signal stuff_lvl_reached from bit_stuffing.vhd | +| can_bus.[`bit_stuffing_same_bits_rst_trig`](#bit_stuffing_same_bits_rst_trig) | 0xd0 | 4 | Auto-extracted signal same_bits_rst_trig from bit_stuffing.vhd | +| can_bus.[`bit_stuffing_same_bits_rst`](#bit_stuffing_same_bits_rst) | 0xd4 | 4 | Auto-extracted signal same_bits_rst from bit_stuffing.vhd | +| can_bus.[`bit_stuffing_insert_stuff_bit`](#bit_stuffing_insert_stuff_bit) | 0xd8 | 4 | Auto-extracted signal insert_stuff_bit from bit_stuffing.vhd | +| can_bus.[`bit_stuffing_data_out_d_ena`](#bit_stuffing_data_out_d_ena) | 0xdc | 4 | Auto-extracted signal data_out_d_ena from bit_stuffing.vhd | +| can_bus.[`bit_stuffing_data_out_d`](#bit_stuffing_data_out_d) | 0xe0 | 4 | Auto-extracted signal data_out_d from bit_stuffing.vhd | +| can_bus.[`bit_stuffing_data_out_ce`](#bit_stuffing_data_out_ce) | 0xe4 | 4 | Auto-extracted signal data_out_ce from bit_stuffing.vhd | +| can_bus.[`bit_time_cfg_capture_drv_tq_nbt`](#bit_time_cfg_capture_drv_tq_nbt) | 0xe8 | 4 | Auto-extracted signal drv_tq_nbt from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_drv_prs_nbt`](#bit_time_cfg_capture_drv_prs_nbt) | 0xec | 4 | Auto-extracted signal drv_prs_nbt from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_drv_ph1_nbt`](#bit_time_cfg_capture_drv_ph1_nbt) | 0xf0 | 4 | Auto-extracted signal drv_ph1_nbt from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_drv_ph2_nbt`](#bit_time_cfg_capture_drv_ph2_nbt) | 0xf4 | 4 | Auto-extracted signal drv_ph2_nbt from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_drv_sjw_nbt`](#bit_time_cfg_capture_drv_sjw_nbt) | 0xf8 | 4 | Auto-extracted signal drv_sjw_nbt from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_drv_tq_dbt`](#bit_time_cfg_capture_drv_tq_dbt) | 0xfc | 4 | Auto-extracted signal drv_tq_dbt from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_drv_prs_dbt`](#bit_time_cfg_capture_drv_prs_dbt) | 0x100 | 4 | Auto-extracted signal drv_prs_dbt from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_drv_ph1_dbt`](#bit_time_cfg_capture_drv_ph1_dbt) | 0x104 | 4 | Auto-extracted signal drv_ph1_dbt from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_drv_ph2_dbt`](#bit_time_cfg_capture_drv_ph2_dbt) | 0x108 | 4 | Auto-extracted signal drv_ph2_dbt from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_drv_sjw_dbt`](#bit_time_cfg_capture_drv_sjw_dbt) | 0x10c | 4 | Auto-extracted signal drv_sjw_dbt from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_tseg1_nbt_d`](#bit_time_cfg_capture_tseg1_nbt_d) | 0x110 | 4 | Auto-extracted signal tseg1_nbt_d from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_tseg1_dbt_d`](#bit_time_cfg_capture_tseg1_dbt_d) | 0x114 | 4 | Auto-extracted signal tseg1_dbt_d from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_drv_ena`](#bit_time_cfg_capture_drv_ena) | 0x118 | 4 | Auto-extracted signal drv_ena from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_drv_ena_reg`](#bit_time_cfg_capture_drv_ena_reg) | 0x11c | 4 | Auto-extracted signal drv_ena_reg from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_drv_ena_reg_2`](#bit_time_cfg_capture_drv_ena_reg_2) | 0x120 | 4 | Auto-extracted signal drv_ena_reg_2 from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_cfg_capture_capture`](#bit_time_cfg_capture_capture) | 0x124 | 4 | Auto-extracted signal capture from bit_time_cfg_capture.vhd | +| can_bus.[`bit_time_counters_tq_counter_d`](#bit_time_counters_tq_counter_d) | 0x128 | 4 | Auto-extracted signal tq_counter_d from bit_time_counters.vhd | +| can_bus.[`bit_time_counters_tq_counter_q`](#bit_time_counters_tq_counter_q) | 0x12c | 4 | Auto-extracted signal tq_counter_q from bit_time_counters.vhd | +| can_bus.[`bit_time_counters_tq_counter_ce`](#bit_time_counters_tq_counter_ce) | 0x130 | 4 | Auto-extracted signal tq_counter_ce from bit_time_counters.vhd | +| can_bus.[`bit_time_counters_tq_counter_allow`](#bit_time_counters_tq_counter_allow) | 0x134 | 4 | Auto-extracted signal tq_counter_allow from bit_time_counters.vhd | +| can_bus.[`bit_time_counters_tq_edge_i`](#bit_time_counters_tq_edge_i) | 0x138 | 4 | Auto-extracted signal tq_edge_i from bit_time_counters.vhd | +| can_bus.[`bit_time_counters_segm_counter_d`](#bit_time_counters_segm_counter_d) | 0x13c | 4 | Auto-extracted signal segm_counter_d from bit_time_counters.vhd | +| can_bus.[`bit_time_counters_segm_counter_q`](#bit_time_counters_segm_counter_q) | 0x140 | 4 | Auto-extracted signal segm_counter_q from bit_time_counters.vhd | +| can_bus.[`bit_time_counters_segm_counter_ce`](#bit_time_counters_segm_counter_ce) | 0x144 | 4 | Auto-extracted signal segm_counter_ce from bit_time_counters.vhd | +| can_bus.[`bit_time_fsm_bt_fsm_ce`](#bit_time_fsm_bt_fsm_ce) | 0x148 | 4 | Auto-extracted signal bt_fsm_ce from bit_time_fsm.vhd | +| can_bus.[`bus_sampling_drv_ena`](#bus_sampling_drv_ena) | 0x14c | 4 | Auto-extracted signal drv_ena from bus_sampling.vhd | +| can_bus.[`bus_sampling_drv_ssp_offset`](#bus_sampling_drv_ssp_offset) | 0x150 | 4 | Auto-extracted signal drv_ssp_offset from bus_sampling.vhd | +| can_bus.[`bus_sampling_drv_ssp_delay_select`](#bus_sampling_drv_ssp_delay_select) | 0x154 | 4 | Auto-extracted signal drv_ssp_delay_select from bus_sampling.vhd | +| can_bus.[`bus_sampling_data_rx_synced`](#bus_sampling_data_rx_synced) | 0x158 | 4 | Auto-extracted signal data_rx_synced from bus_sampling.vhd | +| can_bus.[`bus_sampling_prev_Sample`](#bus_sampling_prev_sample) | 0x15c | 4 | Auto-extracted signal prev_Sample from bus_sampling.vhd | +| can_bus.[`bus_sampling_sample_sec_i`](#bus_sampling_sample_sec_i) | 0x160 | 4 | Auto-extracted signal sample_sec_i from bus_sampling.vhd | +| can_bus.[`bus_sampling_data_tx_delayed`](#bus_sampling_data_tx_delayed) | 0x164 | 4 | Auto-extracted signal data_tx_delayed from bus_sampling.vhd | +| can_bus.[`bus_sampling_edge_rx_valid`](#bus_sampling_edge_rx_valid) | 0x168 | 4 | Auto-extracted signal edge_rx_valid from bus_sampling.vhd | +| can_bus.[`bus_sampling_edge_tx_valid`](#bus_sampling_edge_tx_valid) | 0x16c | 4 | Auto-extracted signal edge_tx_valid from bus_sampling.vhd | +| can_bus.[`bus_sampling_ssp_delay`](#bus_sampling_ssp_delay) | 0x170 | 4 | Auto-extracted signal ssp_delay from bus_sampling.vhd | +| can_bus.[`bus_sampling_tx_trigger_q`](#bus_sampling_tx_trigger_q) | 0x174 | 4 | Auto-extracted signal tx_trigger_q from bus_sampling.vhd | +| can_bus.[`bus_sampling_tx_trigger_ssp`](#bus_sampling_tx_trigger_ssp) | 0x178 | 4 | Auto-extracted signal tx_trigger_ssp from bus_sampling.vhd | +| can_bus.[`bus_sampling_shift_regs_res_d`](#bus_sampling_shift_regs_res_d) | 0x17c | 4 | Auto-extracted signal shift_regs_res_d from bus_sampling.vhd | +| can_bus.[`bus_sampling_shift_regs_res_q`](#bus_sampling_shift_regs_res_q) | 0x180 | 4 | Auto-extracted signal shift_regs_res_q from bus_sampling.vhd | +| can_bus.[`bus_sampling_shift_regs_res_q_scan`](#bus_sampling_shift_regs_res_q_scan) | 0x184 | 4 | Auto-extracted signal shift_regs_res_q_scan from bus_sampling.vhd | +| can_bus.[`bus_sampling_ssp_enable`](#bus_sampling_ssp_enable) | 0x188 | 4 | Auto-extracted signal ssp_enable from bus_sampling.vhd | +| can_bus.[`bus_traffic_counters_tx_ctr_i`](#bus_traffic_counters_tx_ctr_i) | 0x18c | 4 | Auto-extracted signal tx_ctr_i from bus_traffic_counters.vhd | +| can_bus.[`bus_traffic_counters_rx_ctr_i`](#bus_traffic_counters_rx_ctr_i) | 0x190 | 4 | Auto-extracted signal rx_ctr_i from bus_traffic_counters.vhd | +| can_bus.[`bus_traffic_counters_tx_ctr_rst_n_d`](#bus_traffic_counters_tx_ctr_rst_n_d) | 0x194 | 4 | Auto-extracted signal tx_ctr_rst_n_d from bus_traffic_counters.vhd | +| can_bus.[`bus_traffic_counters_tx_ctr_rst_n_q`](#bus_traffic_counters_tx_ctr_rst_n_q) | 0x198 | 4 | Auto-extracted signal tx_ctr_rst_n_q from bus_traffic_counters.vhd | +| can_bus.[`bus_traffic_counters_tx_ctr_rst_n_q_scan`](#bus_traffic_counters_tx_ctr_rst_n_q_scan) | 0x19c | 4 | Auto-extracted signal tx_ctr_rst_n_q_scan from bus_traffic_counters.vhd | +| can_bus.[`bus_traffic_counters_rx_ctr_rst_n_d`](#bus_traffic_counters_rx_ctr_rst_n_d) | 0x1a0 | 4 | Auto-extracted signal rx_ctr_rst_n_d from bus_traffic_counters.vhd | +| can_bus.[`bus_traffic_counters_rx_ctr_rst_n_q`](#bus_traffic_counters_rx_ctr_rst_n_q) | 0x1a4 | 4 | Auto-extracted signal rx_ctr_rst_n_q from bus_traffic_counters.vhd | +| can_bus.[`bus_traffic_counters_rx_ctr_rst_n_q_scan`](#bus_traffic_counters_rx_ctr_rst_n_q_scan) | 0x1a8 | 4 | Auto-extracted signal rx_ctr_rst_n_q_scan from bus_traffic_counters.vhd | +| can_bus.[`can_apb_tb_s_apb_paddr`](#can_apb_tb_s_apb_paddr) | 0x1ac | 4 | Auto-extracted signal s_apb_paddr from can_apb_tb.vhd | +| can_bus.[`can_apb_tb_s_apb_penable`](#can_apb_tb_s_apb_penable) | 0x1b0 | 4 | Auto-extracted signal s_apb_penable from can_apb_tb.vhd | +| can_bus.[`can_apb_tb_s_apb_pprot`](#can_apb_tb_s_apb_pprot) | 0x1b4 | 4 | Auto-extracted signal s_apb_pprot from can_apb_tb.vhd | +| can_bus.[`can_apb_tb_s_apb_prdata`](#can_apb_tb_s_apb_prdata) | 0x1b8 | 4 | Auto-extracted signal s_apb_prdata from can_apb_tb.vhd | +| can_bus.[`can_apb_tb_s_apb_pready`](#can_apb_tb_s_apb_pready) | 0x1bc | 4 | Auto-extracted signal s_apb_pready from can_apb_tb.vhd | +| can_bus.[`can_apb_tb_s_apb_psel`](#can_apb_tb_s_apb_psel) | 0x1c0 | 4 | Auto-extracted signal s_apb_psel from can_apb_tb.vhd | +| can_bus.[`can_apb_tb_s_apb_pslverr`](#can_apb_tb_s_apb_pslverr) | 0x1c4 | 4 | Auto-extracted signal s_apb_pslverr from can_apb_tb.vhd | +| can_bus.[`can_apb_tb_s_apb_pstrb`](#can_apb_tb_s_apb_pstrb) | 0x1c8 | 4 | Auto-extracted signal s_apb_pstrb from can_apb_tb.vhd | +| can_bus.[`can_apb_tb_s_apb_pwdata`](#can_apb_tb_s_apb_pwdata) | 0x1cc | 4 | Auto-extracted signal s_apb_pwdata from can_apb_tb.vhd | +| can_bus.[`can_apb_tb_s_apb_pwrite`](#can_apb_tb_s_apb_pwrite) | 0x1d0 | 4 | Auto-extracted signal s_apb_pwrite from can_apb_tb.vhd | +| can_bus.[`can_core_drv_clr_rx_ctr`](#can_core_drv_clr_rx_ctr) | 0x1d4 | 4 | Auto-extracted signal drv_clr_rx_ctr from can_core.vhd | +| can_bus.[`can_core_drv_clr_tx_ctr`](#can_core_drv_clr_tx_ctr) | 0x1d8 | 4 | Auto-extracted signal drv_clr_tx_ctr from can_core.vhd | +| can_bus.[`can_core_drv_bus_mon_ena`](#can_core_drv_bus_mon_ena) | 0x1dc | 4 | Auto-extracted signal drv_bus_mon_ena from can_core.vhd | +| can_bus.[`can_core_drv_ena`](#can_core_drv_ena) | 0x1e0 | 4 | Auto-extracted signal drv_ena from can_core.vhd | +| can_bus.[`can_core_rec_ident_i`](#can_core_rec_ident_i) | 0x1e4 | 4 | Auto-extracted signal rec_ident_i from can_core.vhd | +| can_bus.[`can_core_rec_dlc_i`](#can_core_rec_dlc_i) | 0x1e8 | 4 | Auto-extracted signal rec_dlc_i from can_core.vhd | +| can_bus.[`can_core_rec_ident_type_i`](#can_core_rec_ident_type_i) | 0x1ec | 4 | Auto-extracted signal rec_ident_type_i from can_core.vhd | +| can_bus.[`can_core_rec_frame_type_i`](#can_core_rec_frame_type_i) | 0x1f0 | 4 | Auto-extracted signal rec_frame_type_i from can_core.vhd | +| can_bus.[`can_core_rec_is_rtr_i`](#can_core_rec_is_rtr_i) | 0x1f4 | 4 | Auto-extracted signal rec_is_rtr_i from can_core.vhd | +| can_bus.[`can_core_rec_brs_i`](#can_core_rec_brs_i) | 0x1f8 | 4 | Auto-extracted signal rec_brs_i from can_core.vhd | +| can_bus.[`can_core_rec_esi_i`](#can_core_rec_esi_i) | 0x1fc | 4 | Auto-extracted signal rec_esi_i from can_core.vhd | +| can_bus.[`can_core_alc`](#can_core_alc) | 0x200 | 4 | Auto-extracted signal alc from can_core.vhd | +| can_bus.[`can_core_erc_capture`](#can_core_erc_capture) | 0x204 | 4 | Auto-extracted signal erc_capture from can_core.vhd | +| can_bus.[`can_core_is_transmitter`](#can_core_is_transmitter) | 0x208 | 4 | Auto-extracted signal is_transmitter from can_core.vhd | +| can_bus.[`can_core_is_receiver`](#can_core_is_receiver) | 0x20c | 4 | Auto-extracted signal is_receiver from can_core.vhd | +| can_bus.[`can_core_is_idle`](#can_core_is_idle) | 0x210 | 4 | Auto-extracted signal is_idle from can_core.vhd | +| can_bus.[`can_core_arbitration_lost_i`](#can_core_arbitration_lost_i) | 0x214 | 4 | Auto-extracted signal arbitration_lost_i from can_core.vhd | +| can_bus.[`can_core_set_transmitter`](#can_core_set_transmitter) | 0x218 | 4 | Auto-extracted signal set_transmitter from can_core.vhd | +| can_bus.[`can_core_set_receiver`](#can_core_set_receiver) | 0x21c | 4 | Auto-extracted signal set_receiver from can_core.vhd | +| can_bus.[`can_core_set_idle`](#can_core_set_idle) | 0x220 | 4 | Auto-extracted signal set_idle from can_core.vhd | +| can_bus.[`can_core_is_err_active`](#can_core_is_err_active) | 0x224 | 4 | Auto-extracted signal is_err_active from can_core.vhd | +| can_bus.[`can_core_is_err_passive`](#can_core_is_err_passive) | 0x228 | 4 | Auto-extracted signal is_err_passive from can_core.vhd | +| can_bus.[`can_core_is_bus_off_i`](#can_core_is_bus_off_i) | 0x22c | 4 | Auto-extracted signal is_bus_off_i from can_core.vhd | +| can_bus.[`can_core_err_detected_i`](#can_core_err_detected_i) | 0x230 | 4 | Auto-extracted signal err_detected_i from can_core.vhd | +| can_bus.[`can_core_primary_err`](#can_core_primary_err) | 0x234 | 4 | Auto-extracted signal primary_err from can_core.vhd | +| can_bus.[`can_core_act_err_ovr_flag`](#can_core_act_err_ovr_flag) | 0x238 | 4 | Auto-extracted signal act_err_ovr_flag from can_core.vhd | +| can_bus.[`can_core_err_delim_late`](#can_core_err_delim_late) | 0x23c | 4 | Auto-extracted signal err_delim_late from can_core.vhd | +| can_bus.[`can_core_set_err_active`](#can_core_set_err_active) | 0x240 | 4 | Auto-extracted signal set_err_active from can_core.vhd | +| can_bus.[`can_core_err_ctrs_unchanged`](#can_core_err_ctrs_unchanged) | 0x244 | 4 | Auto-extracted signal err_ctrs_unchanged from can_core.vhd | +| can_bus.[`can_core_stuff_enable`](#can_core_stuff_enable) | 0x248 | 4 | Auto-extracted signal stuff_enable from can_core.vhd | +| can_bus.[`can_core_destuff_enable`](#can_core_destuff_enable) | 0x24c | 4 | Auto-extracted signal destuff_enable from can_core.vhd | +| can_bus.[`can_core_fixed_stuff`](#can_core_fixed_stuff) | 0x250 | 4 | Auto-extracted signal fixed_stuff from can_core.vhd | +| can_bus.[`can_core_tx_frame_no_sof`](#can_core_tx_frame_no_sof) | 0x254 | 4 | Auto-extracted signal tx_frame_no_sof from can_core.vhd | +| can_bus.[`can_core_stuff_length`](#can_core_stuff_length) | 0x258 | 4 | Auto-extracted signal stuff_length from can_core.vhd | +| can_bus.[`can_core_dst_ctr`](#can_core_dst_ctr) | 0x25c | 4 | Auto-extracted signal dst_ctr from can_core.vhd | +| can_bus.[`can_core_bst_ctr`](#can_core_bst_ctr) | 0x260 | 4 | Auto-extracted signal bst_ctr from can_core.vhd | +| can_bus.[`can_core_stuff_err`](#can_core_stuff_err) | 0x264 | 4 | Auto-extracted signal stuff_err from can_core.vhd | +| can_bus.[`can_core_crc_enable`](#can_core_crc_enable) | 0x268 | 4 | Auto-extracted signal crc_enable from can_core.vhd | +| can_bus.[`can_core_crc_spec_enable`](#can_core_crc_spec_enable) | 0x26c | 4 | Auto-extracted signal crc_spec_enable from can_core.vhd | +| can_bus.[`can_core_crc_calc_from_rx`](#can_core_crc_calc_from_rx) | 0x270 | 4 | Auto-extracted signal crc_calc_from_rx from can_core.vhd | +| can_bus.[`can_core_crc_15`](#can_core_crc_15) | 0x274 | 4 | Auto-extracted signal crc_15 from can_core.vhd | +| can_bus.[`can_core_crc_17`](#can_core_crc_17) | 0x278 | 4 | Auto-extracted signal crc_17 from can_core.vhd | +| can_bus.[`can_core_crc_21`](#can_core_crc_21) | 0x27c | 4 | Auto-extracted signal crc_21 from can_core.vhd | +| can_bus.[`can_core_sp_control_i`](#can_core_sp_control_i) | 0x280 | 4 | Auto-extracted signal sp_control_i from can_core.vhd | +| can_bus.[`can_core_sp_control_q`](#can_core_sp_control_q) | 0x284 | 4 | Auto-extracted signal sp_control_q from can_core.vhd | +| can_bus.[`can_core_sync_control_i`](#can_core_sync_control_i) | 0x288 | 4 | Auto-extracted signal sync_control_i from can_core.vhd | +| can_bus.[`can_core_ssp_reset_i`](#can_core_ssp_reset_i) | 0x28c | 4 | Auto-extracted signal ssp_reset_i from can_core.vhd | +| can_bus.[`can_core_tran_delay_meas_i`](#can_core_tran_delay_meas_i) | 0x290 | 4 | Auto-extracted signal tran_delay_meas_i from can_core.vhd | +| can_bus.[`can_core_tran_valid_i`](#can_core_tran_valid_i) | 0x294 | 4 | Auto-extracted signal tran_valid_i from can_core.vhd | +| can_bus.[`can_core_rec_valid_i`](#can_core_rec_valid_i) | 0x298 | 4 | Auto-extracted signal rec_valid_i from can_core.vhd | +| can_bus.[`can_core_br_shifted_i`](#can_core_br_shifted_i) | 0x29c | 4 | Auto-extracted signal br_shifted_i from can_core.vhd | +| can_bus.[`can_core_fcs_changed_i`](#can_core_fcs_changed_i) | 0x2a0 | 4 | Auto-extracted signal fcs_changed_i from can_core.vhd | +| can_bus.[`can_core_err_warning_limit_i`](#can_core_err_warning_limit_i) | 0x2a4 | 4 | Auto-extracted signal err_warning_limit_i from can_core.vhd | +| can_bus.[`can_core_tx_err_ctr`](#can_core_tx_err_ctr) | 0x2a8 | 4 | Auto-extracted signal tx_err_ctr from can_core.vhd | +| can_bus.[`can_core_rx_err_ctr`](#can_core_rx_err_ctr) | 0x2ac | 4 | Auto-extracted signal rx_err_ctr from can_core.vhd | +| can_bus.[`can_core_norm_err_ctr`](#can_core_norm_err_ctr) | 0x2b0 | 4 | Auto-extracted signal norm_err_ctr from can_core.vhd | +| can_bus.[`can_core_data_err_ctr`](#can_core_data_err_ctr) | 0x2b4 | 4 | Auto-extracted signal data_err_ctr from can_core.vhd | +| can_bus.[`can_core_pc_tx_trigger`](#can_core_pc_tx_trigger) | 0x2b8 | 4 | Auto-extracted signal pc_tx_trigger from can_core.vhd | +| can_bus.[`can_core_pc_rx_trigger`](#can_core_pc_rx_trigger) | 0x2bc | 4 | Auto-extracted signal pc_rx_trigger from can_core.vhd | +| can_bus.[`can_core_pc_tx_data_nbs`](#can_core_pc_tx_data_nbs) | 0x2c0 | 4 | Auto-extracted signal pc_tx_data_nbs from can_core.vhd | +| can_bus.[`can_core_pc_rx_data_nbs`](#can_core_pc_rx_data_nbs) | 0x2c4 | 4 | Auto-extracted signal pc_rx_data_nbs from can_core.vhd | +| can_bus.[`can_core_crc_data_tx_wbs`](#can_core_crc_data_tx_wbs) | 0x2c8 | 4 | Auto-extracted signal crc_data_tx_wbs from can_core.vhd | +| can_bus.[`can_core_crc_data_tx_nbs`](#can_core_crc_data_tx_nbs) | 0x2cc | 4 | Auto-extracted signal crc_data_tx_nbs from can_core.vhd | +| can_bus.[`can_core_crc_data_rx_wbs`](#can_core_crc_data_rx_wbs) | 0x2d0 | 4 | Auto-extracted signal crc_data_rx_wbs from can_core.vhd | +| can_bus.[`can_core_crc_data_rx_nbs`](#can_core_crc_data_rx_nbs) | 0x2d4 | 4 | Auto-extracted signal crc_data_rx_nbs from can_core.vhd | +| can_bus.[`can_core_crc_trig_tx_wbs`](#can_core_crc_trig_tx_wbs) | 0x2d8 | 4 | Auto-extracted signal crc_trig_tx_wbs from can_core.vhd | +| can_bus.[`can_core_crc_trig_tx_nbs`](#can_core_crc_trig_tx_nbs) | 0x2dc | 4 | Auto-extracted signal crc_trig_tx_nbs from can_core.vhd | +| can_bus.[`can_core_crc_trig_rx_wbs`](#can_core_crc_trig_rx_wbs) | 0x2e0 | 4 | Auto-extracted signal crc_trig_rx_wbs from can_core.vhd | +| can_bus.[`can_core_crc_trig_rx_nbs`](#can_core_crc_trig_rx_nbs) | 0x2e4 | 4 | Auto-extracted signal crc_trig_rx_nbs from can_core.vhd | +| can_bus.[`can_core_bst_data_in`](#can_core_bst_data_in) | 0x2e8 | 4 | Auto-extracted signal bst_data_in from can_core.vhd | +| can_bus.[`can_core_bst_data_out`](#can_core_bst_data_out) | 0x2ec | 4 | Auto-extracted signal bst_data_out from can_core.vhd | +| can_bus.[`can_core_bst_trigger`](#can_core_bst_trigger) | 0x2f0 | 4 | Auto-extracted signal bst_trigger from can_core.vhd | +| can_bus.[`can_core_data_halt`](#can_core_data_halt) | 0x2f4 | 4 | Auto-extracted signal data_halt from can_core.vhd | +| can_bus.[`can_core_bds_data_in`](#can_core_bds_data_in) | 0x2f8 | 4 | Auto-extracted signal bds_data_in from can_core.vhd | +| can_bus.[`can_core_bds_data_out`](#can_core_bds_data_out) | 0x2fc | 4 | Auto-extracted signal bds_data_out from can_core.vhd | +| can_bus.[`can_core_bds_trigger`](#can_core_bds_trigger) | 0x300 | 4 | Auto-extracted signal bds_trigger from can_core.vhd | +| can_bus.[`can_core_destuffed`](#can_core_destuffed) | 0x304 | 4 | Auto-extracted signal destuffed from can_core.vhd | +| can_bus.[`can_core_tx_ctr`](#can_core_tx_ctr) | 0x308 | 4 | Auto-extracted signal tx_ctr from can_core.vhd | +| can_bus.[`can_core_rx_ctr`](#can_core_rx_ctr) | 0x30c | 4 | Auto-extracted signal rx_ctr from can_core.vhd | +| can_bus.[`can_core_tx_data_wbs_i`](#can_core_tx_data_wbs_i) | 0x310 | 4 | Auto-extracted signal tx_data_wbs_i from can_core.vhd | +| can_bus.[`can_core_lpb_dominant`](#can_core_lpb_dominant) | 0x314 | 4 | Auto-extracted signal lpb_dominant from can_core.vhd | +| can_bus.[`can_core_form_err`](#can_core_form_err) | 0x318 | 4 | Auto-extracted signal form_err from can_core.vhd | +| can_bus.[`can_core_ack_err`](#can_core_ack_err) | 0x31c | 4 | Auto-extracted signal ack_err from can_core.vhd | +| can_bus.[`can_core_crc_err`](#can_core_crc_err) | 0x320 | 4 | Auto-extracted signal crc_err from can_core.vhd | +| can_bus.[`can_core_is_arbitration`](#can_core_is_arbitration) | 0x324 | 4 | Auto-extracted signal is_arbitration from can_core.vhd | +| can_bus.[`can_core_is_control`](#can_core_is_control) | 0x328 | 4 | Auto-extracted signal is_control from can_core.vhd | +| can_bus.[`can_core_is_data`](#can_core_is_data) | 0x32c | 4 | Auto-extracted signal is_data from can_core.vhd | +| can_bus.[`can_core_is_stuff_count`](#can_core_is_stuff_count) | 0x330 | 4 | Auto-extracted signal is_stuff_count from can_core.vhd | +| can_bus.[`can_core_is_crc`](#can_core_is_crc) | 0x334 | 4 | Auto-extracted signal is_crc from can_core.vhd | +| can_bus.[`can_core_is_crc_delim`](#can_core_is_crc_delim) | 0x338 | 4 | Auto-extracted signal is_crc_delim from can_core.vhd | +| can_bus.[`can_core_is_ack_field`](#can_core_is_ack_field) | 0x33c | 4 | Auto-extracted signal is_ack_field from can_core.vhd | +| can_bus.[`can_core_is_ack_delim`](#can_core_is_ack_delim) | 0x340 | 4 | Auto-extracted signal is_ack_delim from can_core.vhd | +| can_bus.[`can_core_is_eof`](#can_core_is_eof) | 0x344 | 4 | Auto-extracted signal is_eof from can_core.vhd | +| can_bus.[`can_core_is_err_frm`](#can_core_is_err_frm) | 0x348 | 4 | Auto-extracted signal is_err_frm from can_core.vhd | +| can_bus.[`can_core_is_intermission`](#can_core_is_intermission) | 0x34c | 4 | Auto-extracted signal is_intermission from can_core.vhd | +| can_bus.[`can_core_is_suspend`](#can_core_is_suspend) | 0x350 | 4 | Auto-extracted signal is_suspend from can_core.vhd | +| can_bus.[`can_core_is_overload_i`](#can_core_is_overload_i) | 0x354 | 4 | Auto-extracted signal is_overload_i from can_core.vhd | +| can_bus.[`can_core_is_sof`](#can_core_is_sof) | 0x358 | 4 | Auto-extracted signal is_sof from can_core.vhd | +| can_bus.[`can_core_sof_pulse_i`](#can_core_sof_pulse_i) | 0x35c | 4 | Auto-extracted signal sof_pulse_i from can_core.vhd | +| can_bus.[`can_core_load_init_vect`](#can_core_load_init_vect) | 0x360 | 4 | Auto-extracted signal load_init_vect from can_core.vhd | +| can_bus.[`can_core_retr_ctr_i`](#can_core_retr_ctr_i) | 0x364 | 4 | Auto-extracted signal retr_ctr_i from can_core.vhd | +| can_bus.[`can_core_decrement_rec`](#can_core_decrement_rec) | 0x368 | 4 | Auto-extracted signal decrement_rec from can_core.vhd | +| can_bus.[`can_core_bit_err_after_ack_err`](#can_core_bit_err_after_ack_err) | 0x36c | 4 | Auto-extracted signal bit_err_after_ack_err from can_core.vhd | +| can_bus.[`can_core_is_pexs`](#can_core_is_pexs) | 0x370 | 4 | Auto-extracted signal is_pexs from can_core.vhd | +| can_bus.[`can_crc_drv_fd_type`](#can_crc_drv_fd_type) | 0x374 | 4 | Auto-extracted signal drv_fd_type from can_crc.vhd | +| can_bus.[`can_crc_init_vect_15`](#can_crc_init_vect_15) | 0x378 | 4 | Auto-extracted signal init_vect_15 from can_crc.vhd | +| can_bus.[`can_crc_init_vect_17`](#can_crc_init_vect_17) | 0x37c | 4 | Auto-extracted signal init_vect_17 from can_crc.vhd | +| can_bus.[`can_crc_init_vect_21`](#can_crc_init_vect_21) | 0x380 | 4 | Auto-extracted signal init_vect_21 from can_crc.vhd | +| can_bus.[`can_crc_crc_17_21_data_in`](#can_crc_crc_17_21_data_in) | 0x384 | 4 | Auto-extracted signal crc_17_21_data_in from can_crc.vhd | +| can_bus.[`can_crc_crc_17_21_trigger`](#can_crc_crc_17_21_trigger) | 0x388 | 4 | Auto-extracted signal crc_17_21_trigger from can_crc.vhd | +| can_bus.[`can_crc_crc_15_data_in`](#can_crc_crc_15_data_in) | 0x38c | 4 | Auto-extracted signal crc_15_data_in from can_crc.vhd | +| can_bus.[`can_crc_crc_15_trigger`](#can_crc_crc_15_trigger) | 0x390 | 4 | Auto-extracted signal crc_15_trigger from can_crc.vhd | +| can_bus.[`can_crc_crc_ena_15`](#can_crc_crc_ena_15) | 0x394 | 4 | Auto-extracted signal crc_ena_15 from can_crc.vhd | +| can_bus.[`can_crc_crc_ena_17_21`](#can_crc_crc_ena_17_21) | 0x398 | 4 | Auto-extracted signal crc_ena_17_21 from can_crc.vhd | +| can_bus.[`can_top_ahb_ctu_can_data_in`](#can_top_ahb_ctu_can_data_in) | 0x39c | 4 | Auto-extracted signal ctu_can_data_in from can_top_ahb.vhd | +| can_bus.[`can_top_ahb_ctu_can_data_out`](#can_top_ahb_ctu_can_data_out) | 0x3a0 | 4 | Auto-extracted signal ctu_can_data_out from can_top_ahb.vhd | +| can_bus.[`can_top_ahb_ctu_can_adress`](#can_top_ahb_ctu_can_adress) | 0x3a4 | 4 | Auto-extracted signal ctu_can_adress from can_top_ahb.vhd | +| can_bus.[`can_top_ahb_ctu_can_scs`](#can_top_ahb_ctu_can_scs) | 0x3a8 | 4 | Auto-extracted signal ctu_can_scs from can_top_ahb.vhd | +| can_bus.[`can_top_ahb_ctu_can_srd`](#can_top_ahb_ctu_can_srd) | 0x3ac | 4 | Auto-extracted signal ctu_can_srd from can_top_ahb.vhd | +| can_bus.[`can_top_ahb_ctu_can_swr`](#can_top_ahb_ctu_can_swr) | 0x3b0 | 4 | Auto-extracted signal ctu_can_swr from can_top_ahb.vhd | +| can_bus.[`can_top_ahb_ctu_can_sbe`](#can_top_ahb_ctu_can_sbe) | 0x3b4 | 4 | Auto-extracted signal ctu_can_sbe from can_top_ahb.vhd | +| can_bus.[`can_top_ahb_res_n_out_i`](#can_top_ahb_res_n_out_i) | 0x3b8 | 4 | Auto-extracted signal res_n_out_i from can_top_ahb.vhd | +| can_bus.[`can_top_apb_reg_data_in`](#can_top_apb_reg_data_in) | 0x3bc | 4 | Auto-extracted signal reg_data_in from can_top_apb.vhd | +| can_bus.[`can_top_apb_reg_data_out`](#can_top_apb_reg_data_out) | 0x3c0 | 4 | Auto-extracted signal reg_data_out from can_top_apb.vhd | +| can_bus.[`can_top_apb_reg_addr`](#can_top_apb_reg_addr) | 0x3c4 | 4 | Auto-extracted signal reg_addr from can_top_apb.vhd | +| can_bus.[`can_top_apb_reg_be`](#can_top_apb_reg_be) | 0x3c8 | 4 | Auto-extracted signal reg_be from can_top_apb.vhd | +| can_bus.[`can_top_apb_reg_rden`](#can_top_apb_reg_rden) | 0x3cc | 4 | Auto-extracted signal reg_rden from can_top_apb.vhd | +| can_bus.[`can_top_apb_reg_wren`](#can_top_apb_reg_wren) | 0x3d0 | 4 | Auto-extracted signal reg_wren from can_top_apb.vhd | +| can_bus.[`can_top_level_drv_bus`](#can_top_level_drv_bus) | 0x3d4 | 4 | Auto-extracted signal drv_bus from can_top_level.vhd | +| can_bus.[`can_top_level_stat_bus`](#can_top_level_stat_bus) | 0x3d8 | 4 | Auto-extracted signal stat_bus from can_top_level.vhd | +| can_bus.[`can_top_level_res_n_sync`](#can_top_level_res_n_sync) | 0x3dc | 4 | Auto-extracted signal res_n_sync from can_top_level.vhd | +| can_bus.[`can_top_level_res_core_n`](#can_top_level_res_core_n) | 0x3e0 | 4 | Auto-extracted signal res_core_n from can_top_level.vhd | +| can_bus.[`can_top_level_res_soft_n`](#can_top_level_res_soft_n) | 0x3e4 | 4 | Auto-extracted signal res_soft_n from can_top_level.vhd | +| can_bus.[`can_top_level_sp_control`](#can_top_level_sp_control) | 0x3e8 | 4 | Auto-extracted signal sp_control from can_top_level.vhd | +| can_bus.[`can_top_level_rx_buf_size`](#can_top_level_rx_buf_size) | 0x3ec | 4 | Auto-extracted signal rx_buf_size from can_top_level.vhd | +| can_bus.[`can_top_level_rx_full`](#can_top_level_rx_full) | 0x3f0 | 4 | Auto-extracted signal rx_full from can_top_level.vhd | +| can_bus.[`can_top_level_rx_empty`](#can_top_level_rx_empty) | 0x3f4 | 4 | Auto-extracted signal rx_empty from can_top_level.vhd | +| can_bus.[`can_top_level_rx_frame_count`](#can_top_level_rx_frame_count) | 0x3f8 | 4 | Auto-extracted signal rx_frame_count from can_top_level.vhd | +| can_bus.[`can_top_level_rx_mem_free`](#can_top_level_rx_mem_free) | 0x3fc | 4 | Auto-extracted signal rx_mem_free from can_top_level.vhd | +| can_bus.[`can_top_level_rx_read_pointer`](#can_top_level_rx_read_pointer) | 0x400 | 4 | Auto-extracted signal rx_read_pointer from can_top_level.vhd | +| can_bus.[`can_top_level_rx_write_pointer`](#can_top_level_rx_write_pointer) | 0x404 | 4 | Auto-extracted signal rx_write_pointer from can_top_level.vhd | +| can_bus.[`can_top_level_rx_data_overrun`](#can_top_level_rx_data_overrun) | 0x408 | 4 | Auto-extracted signal rx_data_overrun from can_top_level.vhd | +| can_bus.[`can_top_level_rx_read_buff`](#can_top_level_rx_read_buff) | 0x40c | 4 | Auto-extracted signal rx_read_buff from can_top_level.vhd | +| can_bus.[`can_top_level_rx_mof`](#can_top_level_rx_mof) | 0x410 | 4 | Auto-extracted signal rx_mof from can_top_level.vhd | +| can_bus.[`can_top_level_txtb_port_a_data`](#can_top_level_txtb_port_a_data) | 0x414 | 4 | Auto-extracted signal txtb_port_a_data from can_top_level.vhd | +| can_bus.[`can_top_level_txtb_port_a_address`](#can_top_level_txtb_port_a_address) | 0x418 | 4 | Auto-extracted signal txtb_port_a_address from can_top_level.vhd | +| can_bus.[`can_top_level_txtb_port_a_cs`](#can_top_level_txtb_port_a_cs) | 0x41c | 4 | Auto-extracted signal txtb_port_a_cs from can_top_level.vhd | +| can_bus.[`can_top_level_txtb_port_a_be`](#can_top_level_txtb_port_a_be) | 0x420 | 4 | Auto-extracted signal txtb_port_a_be from can_top_level.vhd | +| can_bus.[`can_top_level_txtb_sw_cmd_index`](#can_top_level_txtb_sw_cmd_index) | 0x424 | 4 | Auto-extracted signal txtb_sw_cmd_index from can_top_level.vhd | +| can_bus.[`can_top_level_txt_buf_failed_bof`](#can_top_level_txt_buf_failed_bof) | 0x428 | 4 | Auto-extracted signal txt_buf_failed_bof from can_top_level.vhd | +| can_bus.[`can_top_level_int_vector`](#can_top_level_int_vector) | 0x42c | 4 | Auto-extracted signal int_vector from can_top_level.vhd | +| can_bus.[`can_top_level_int_ena`](#can_top_level_int_ena) | 0x430 | 4 | Auto-extracted signal int_ena from can_top_level.vhd | +| can_bus.[`can_top_level_int_mask`](#can_top_level_int_mask) | 0x434 | 4 | Auto-extracted signal int_mask from can_top_level.vhd | +| can_bus.[`can_top_level_rec_ident`](#can_top_level_rec_ident) | 0x438 | 4 | Auto-extracted signal rec_ident from can_top_level.vhd | +| can_bus.[`can_top_level_rec_dlc`](#can_top_level_rec_dlc) | 0x43c | 4 | Auto-extracted signal rec_dlc from can_top_level.vhd | +| can_bus.[`can_top_level_rec_ident_type`](#can_top_level_rec_ident_type) | 0x440 | 4 | Auto-extracted signal rec_ident_type from can_top_level.vhd | +| can_bus.[`can_top_level_rec_frame_type`](#can_top_level_rec_frame_type) | 0x444 | 4 | Auto-extracted signal rec_frame_type from can_top_level.vhd | +| can_bus.[`can_top_level_rec_is_rtr`](#can_top_level_rec_is_rtr) | 0x448 | 4 | Auto-extracted signal rec_is_rtr from can_top_level.vhd | +| can_bus.[`can_top_level_rec_brs`](#can_top_level_rec_brs) | 0x44c | 4 | Auto-extracted signal rec_brs from can_top_level.vhd | +| can_bus.[`can_top_level_rec_esi`](#can_top_level_rec_esi) | 0x450 | 4 | Auto-extracted signal rec_esi from can_top_level.vhd | +| can_bus.[`can_top_level_store_data_word`](#can_top_level_store_data_word) | 0x454 | 4 | Auto-extracted signal store_data_word from can_top_level.vhd | +| can_bus.[`can_top_level_sof_pulse`](#can_top_level_sof_pulse) | 0x458 | 4 | Auto-extracted signal sof_pulse from can_top_level.vhd | +| can_bus.[`can_top_level_store_metadata`](#can_top_level_store_metadata) | 0x45c | 4 | Auto-extracted signal store_metadata from can_top_level.vhd | +| can_bus.[`can_top_level_store_data`](#can_top_level_store_data) | 0x460 | 4 | Auto-extracted signal store_data from can_top_level.vhd | +| can_bus.[`can_top_level_rec_valid`](#can_top_level_rec_valid) | 0x464 | 4 | Auto-extracted signal rec_valid from can_top_level.vhd | +| can_bus.[`can_top_level_rec_abort`](#can_top_level_rec_abort) | 0x468 | 4 | Auto-extracted signal rec_abort from can_top_level.vhd | +| can_bus.[`can_top_level_store_metadata_f`](#can_top_level_store_metadata_f) | 0x46c | 4 | Auto-extracted signal store_metadata_f from can_top_level.vhd | +| can_bus.[`can_top_level_store_data_f`](#can_top_level_store_data_f) | 0x470 | 4 | Auto-extracted signal store_data_f from can_top_level.vhd | +| can_bus.[`can_top_level_rec_valid_f`](#can_top_level_rec_valid_f) | 0x474 | 4 | Auto-extracted signal rec_valid_f from can_top_level.vhd | +| can_bus.[`can_top_level_rec_abort_f`](#can_top_level_rec_abort_f) | 0x478 | 4 | Auto-extracted signal rec_abort_f from can_top_level.vhd | +| can_bus.[`can_top_level_txtb_hw_cmd_int`](#can_top_level_txtb_hw_cmd_int) | 0x47c | 4 | Auto-extracted signal txtb_hw_cmd_int from can_top_level.vhd | +| can_bus.[`can_top_level_is_bus_off`](#can_top_level_is_bus_off) | 0x480 | 4 | Auto-extracted signal is_bus_off from can_top_level.vhd | +| can_bus.[`can_top_level_txtb_available`](#can_top_level_txtb_available) | 0x484 | 4 | Auto-extracted signal txtb_available from can_top_level.vhd | +| can_bus.[`can_top_level_txtb_port_b_clk_en`](#can_top_level_txtb_port_b_clk_en) | 0x488 | 4 | Auto-extracted signal txtb_port_b_clk_en from can_top_level.vhd | +| can_bus.[`can_top_level_tran_dlc`](#can_top_level_tran_dlc) | 0x48c | 4 | Auto-extracted signal tran_dlc from can_top_level.vhd | +| can_bus.[`can_top_level_tran_is_rtr`](#can_top_level_tran_is_rtr) | 0x490 | 4 | Auto-extracted signal tran_is_rtr from can_top_level.vhd | +| can_bus.[`can_top_level_tran_ident_type`](#can_top_level_tran_ident_type) | 0x494 | 4 | Auto-extracted signal tran_ident_type from can_top_level.vhd | +| can_bus.[`can_top_level_tran_frame_type`](#can_top_level_tran_frame_type) | 0x498 | 4 | Auto-extracted signal tran_frame_type from can_top_level.vhd | +| can_bus.[`can_top_level_tran_brs`](#can_top_level_tran_brs) | 0x49c | 4 | Auto-extracted signal tran_brs from can_top_level.vhd | +| can_bus.[`can_top_level_tran_identifier`](#can_top_level_tran_identifier) | 0x4a0 | 4 | Auto-extracted signal tran_identifier from can_top_level.vhd | +| can_bus.[`can_top_level_tran_word`](#can_top_level_tran_word) | 0x4a4 | 4 | Auto-extracted signal tran_word from can_top_level.vhd | +| can_bus.[`can_top_level_tran_frame_valid`](#can_top_level_tran_frame_valid) | 0x4a8 | 4 | Auto-extracted signal tran_frame_valid from can_top_level.vhd | +| can_bus.[`can_top_level_txtb_changed`](#can_top_level_txtb_changed) | 0x4ac | 4 | Auto-extracted signal txtb_changed from can_top_level.vhd | +| can_bus.[`can_top_level_txtb_clk_en`](#can_top_level_txtb_clk_en) | 0x4b0 | 4 | Auto-extracted signal txtb_clk_en from can_top_level.vhd | +| can_bus.[`can_top_level_err_detected`](#can_top_level_err_detected) | 0x4b4 | 4 | Auto-extracted signal err_detected from can_top_level.vhd | +| can_bus.[`can_top_level_fcs_changed`](#can_top_level_fcs_changed) | 0x4b8 | 4 | Auto-extracted signal fcs_changed from can_top_level.vhd | +| can_bus.[`can_top_level_err_warning_limit`](#can_top_level_err_warning_limit) | 0x4bc | 4 | Auto-extracted signal err_warning_limit from can_top_level.vhd | +| can_bus.[`can_top_level_arbitration_lost`](#can_top_level_arbitration_lost) | 0x4c0 | 4 | Auto-extracted signal arbitration_lost from can_top_level.vhd | +| can_bus.[`can_top_level_tran_valid`](#can_top_level_tran_valid) | 0x4c4 | 4 | Auto-extracted signal tran_valid from can_top_level.vhd | +| can_bus.[`can_top_level_br_shifted`](#can_top_level_br_shifted) | 0x4c8 | 4 | Auto-extracted signal br_shifted from can_top_level.vhd | +| can_bus.[`can_top_level_is_overload`](#can_top_level_is_overload) | 0x4cc | 4 | Auto-extracted signal is_overload from can_top_level.vhd | +| can_bus.[`can_top_level_rx_triggers`](#can_top_level_rx_triggers) | 0x4d0 | 4 | Auto-extracted signal rx_triggers from can_top_level.vhd | +| can_bus.[`can_top_level_tx_trigger`](#can_top_level_tx_trigger) | 0x4d4 | 4 | Auto-extracted signal tx_trigger from can_top_level.vhd | +| can_bus.[`can_top_level_sync_control`](#can_top_level_sync_control) | 0x4d8 | 4 | Auto-extracted signal sync_control from can_top_level.vhd | +| can_bus.[`can_top_level_no_pos_resync`](#can_top_level_no_pos_resync) | 0x4dc | 4 | Auto-extracted signal no_pos_resync from can_top_level.vhd | +| can_bus.[`can_top_level_nbt_ctrs_en`](#can_top_level_nbt_ctrs_en) | 0x4e0 | 4 | Auto-extracted signal nbt_ctrs_en from can_top_level.vhd | +| can_bus.[`can_top_level_dbt_ctrs_en`](#can_top_level_dbt_ctrs_en) | 0x4e4 | 4 | Auto-extracted signal dbt_ctrs_en from can_top_level.vhd | +| can_bus.[`can_top_level_trv_delay`](#can_top_level_trv_delay) | 0x4e8 | 4 | Auto-extracted signal trv_delay from can_top_level.vhd | +| can_bus.[`can_top_level_rx_data_wbs`](#can_top_level_rx_data_wbs) | 0x4ec | 4 | Auto-extracted signal rx_data_wbs from can_top_level.vhd | +| can_bus.[`can_top_level_tx_data_wbs`](#can_top_level_tx_data_wbs) | 0x4f0 | 4 | Auto-extracted signal tx_data_wbs from can_top_level.vhd | +| can_bus.[`can_top_level_ssp_reset`](#can_top_level_ssp_reset) | 0x4f4 | 4 | Auto-extracted signal ssp_reset from can_top_level.vhd | +| can_bus.[`can_top_level_tran_delay_meas`](#can_top_level_tran_delay_meas) | 0x4f8 | 4 | Auto-extracted signal tran_delay_meas from can_top_level.vhd | +| can_bus.[`can_top_level_bit_err`](#can_top_level_bit_err) | 0x4fc | 4 | Auto-extracted signal bit_err from can_top_level.vhd | +| can_bus.[`can_top_level_sample_sec`](#can_top_level_sample_sec) | 0x500 | 4 | Auto-extracted signal sample_sec from can_top_level.vhd | +| can_bus.[`can_top_level_btmc_reset`](#can_top_level_btmc_reset) | 0x504 | 4 | Auto-extracted signal btmc_reset from can_top_level.vhd | +| can_bus.[`can_top_level_dbt_measure_start`](#can_top_level_dbt_measure_start) | 0x508 | 4 | Auto-extracted signal dbt_measure_start from can_top_level.vhd | +| can_bus.[`can_top_level_gen_first_ssp`](#can_top_level_gen_first_ssp) | 0x50c | 4 | Auto-extracted signal gen_first_ssp from can_top_level.vhd | +| can_bus.[`can_top_level_sync_edge`](#can_top_level_sync_edge) | 0x510 | 4 | Auto-extracted signal sync_edge from can_top_level.vhd | +| can_bus.[`can_top_level_tq_edge`](#can_top_level_tq_edge) | 0x514 | 4 | Auto-extracted signal tq_edge from can_top_level.vhd | +| can_bus.[`can_top_level_tst_rdata_rx_buf`](#can_top_level_tst_rdata_rx_buf) | 0x518 | 4 | Auto-extracted signal tst_rdata_rx_buf from can_top_level.vhd | +| can_bus.[`clk_gate_clk_en_q`](#clk_gate_clk_en_q) | 0x51c | 4 | Auto-extracted signal clk_en_q from clk_gate.vhd | +| can_bus.[`control_counter_ctrl_ctr_ce`](#control_counter_ctrl_ctr_ce) | 0x520 | 4 | Auto-extracted signal ctrl_ctr_ce from control_counter.vhd | +| can_bus.[`control_counter_compl_ctr_ce`](#control_counter_compl_ctr_ce) | 0x524 | 4 | Auto-extracted signal compl_ctr_ce from control_counter.vhd | +| can_bus.[`control_registers_reg_map_reg_sel`](#control_registers_reg_map_reg_sel) | 0x528 | 4 | Auto-extracted signal reg_sel from control_registers_reg_map.vhd | +| can_bus.[`control_registers_reg_map_read_data_mux_in`](#control_registers_reg_map_read_data_mux_in) | 0x52c | 4 | Auto-extracted signal read_data_mux_in from control_registers_reg_map.vhd | +| can_bus.[`control_registers_reg_map_read_data_mask_n`](#control_registers_reg_map_read_data_mask_n) | 0x530 | 4 | Auto-extracted signal read_data_mask_n from control_registers_reg_map.vhd | +| can_bus.[`control_registers_reg_map_read_mux_ena`](#control_registers_reg_map_read_mux_ena) | 0x534 | 4 | Auto-extracted signal read_mux_ena from control_registers_reg_map.vhd | +| can_bus.[`crc_calc_crc_q`](#crc_calc_crc_q) | 0x538 | 4 | Auto-extracted signal crc_q from crc_calc.vhd | +| can_bus.[`crc_calc_crc_nxt`](#crc_calc_crc_nxt) | 0x53c | 4 | Auto-extracted signal crc_nxt from crc_calc.vhd | +| can_bus.[`crc_calc_crc_shift`](#crc_calc_crc_shift) | 0x540 | 4 | Auto-extracted signal crc_shift from crc_calc.vhd | +| can_bus.[`crc_calc_crc_shift_n_xor`](#crc_calc_crc_shift_n_xor) | 0x544 | 4 | Auto-extracted signal crc_shift_n_xor from crc_calc.vhd | +| can_bus.[`crc_calc_crc_d`](#crc_calc_crc_d) | 0x548 | 4 | Auto-extracted signal crc_d from crc_calc.vhd | +| can_bus.[`crc_calc_crc_ce`](#crc_calc_crc_ce) | 0x54c | 4 | Auto-extracted signal crc_ce from crc_calc.vhd | +| can_bus.[`data_edge_detector_rx_data_prev`](#data_edge_detector_rx_data_prev) | 0x550 | 4 | Auto-extracted signal rx_data_prev from data_edge_detector.vhd | +| can_bus.[`data_edge_detector_tx_data_prev`](#data_edge_detector_tx_data_prev) | 0x554 | 4 | Auto-extracted signal tx_data_prev from data_edge_detector.vhd | +| can_bus.[`data_edge_detector_rx_data_sync_prev`](#data_edge_detector_rx_data_sync_prev) | 0x558 | 4 | Auto-extracted signal rx_data_sync_prev from data_edge_detector.vhd | +| can_bus.[`data_edge_detector_rx_edge_i`](#data_edge_detector_rx_edge_i) | 0x55c | 4 | Auto-extracted signal rx_edge_i from data_edge_detector.vhd | +| can_bus.[`data_edge_detector_tx_edge_i`](#data_edge_detector_tx_edge_i) | 0x560 | 4 | Auto-extracted signal tx_edge_i from data_edge_detector.vhd | +| can_bus.[`data_mux_sel_data`](#data_mux_sel_data) | 0x564 | 4 | Auto-extracted signal sel_data from data_mux.vhd | +| can_bus.[`data_mux_saturated_data`](#data_mux_saturated_data) | 0x568 | 4 | Auto-extracted signal saturated_data from data_mux.vhd | +| can_bus.[`data_mux_masked_data`](#data_mux_masked_data) | 0x56c | 4 | Auto-extracted signal masked_data from data_mux.vhd | +| can_bus.[`dlc_decoder_data_len_8_to_64`](#dlc_decoder_data_len_8_to_64) | 0x570 | 4 | Auto-extracted signal data_len_8_to_64 from dlc_decoder.vhd | +| can_bus.[`dlc_decoder_data_len_can_2_0`](#dlc_decoder_data_len_can_2_0) | 0x574 | 4 | Auto-extracted signal data_len_can_2_0 from dlc_decoder.vhd | +| can_bus.[`dlc_decoder_data_len_can_fd`](#dlc_decoder_data_len_can_fd) | 0x578 | 4 | Auto-extracted signal data_len_can_fd from dlc_decoder.vhd | +| can_bus.[`endian_swapper_swapped`](#endian_swapper_swapped) | 0x57c | 4 | Auto-extracted signal swapped from endian_swapper.vhd | +| can_bus.[`err_counters_tx_err_ctr_ce`](#err_counters_tx_err_ctr_ce) | 0x580 | 4 | Auto-extracted signal tx_err_ctr_ce from err_counters.vhd | +| can_bus.[`err_counters_rx_err_ctr_ce`](#err_counters_rx_err_ctr_ce) | 0x584 | 4 | Auto-extracted signal rx_err_ctr_ce from err_counters.vhd | +| can_bus.[`err_counters_modif_tx_ctr`](#err_counters_modif_tx_ctr) | 0x588 | 4 | Auto-extracted signal modif_tx_ctr from err_counters.vhd | +| can_bus.[`err_counters_modif_rx_ctr`](#err_counters_modif_rx_ctr) | 0x58c | 4 | Auto-extracted signal modif_rx_ctr from err_counters.vhd | +| can_bus.[`err_counters_nom_err_ctr_ce`](#err_counters_nom_err_ctr_ce) | 0x590 | 4 | Auto-extracted signal nom_err_ctr_ce from err_counters.vhd | +| can_bus.[`err_counters_data_err_ctr_ce`](#err_counters_data_err_ctr_ce) | 0x594 | 4 | Auto-extracted signal data_err_ctr_ce from err_counters.vhd | +| can_bus.[`err_counters_res_err_ctrs_d`](#err_counters_res_err_ctrs_d) | 0x598 | 4 | Auto-extracted signal res_err_ctrs_d from err_counters.vhd | +| can_bus.[`err_counters_res_err_ctrs_q`](#err_counters_res_err_ctrs_q) | 0x59c | 4 | Auto-extracted signal res_err_ctrs_q from err_counters.vhd | +| can_bus.[`err_counters_res_err_ctrs_q_scan`](#err_counters_res_err_ctrs_q_scan) | 0x5a0 | 4 | Auto-extracted signal res_err_ctrs_q_scan from err_counters.vhd | +| can_bus.[`err_detector_err_frm_req_i`](#err_detector_err_frm_req_i) | 0x5a4 | 4 | Auto-extracted signal err_frm_req_i from err_detector.vhd | +| can_bus.[`err_detector_err_type_d`](#err_detector_err_type_d) | 0x5a8 | 4 | Auto-extracted signal err_type_d from err_detector.vhd | +| can_bus.[`err_detector_err_type_q`](#err_detector_err_type_q) | 0x5ac | 4 | Auto-extracted signal err_type_q from err_detector.vhd | +| can_bus.[`err_detector_err_pos_q`](#err_detector_err_pos_q) | 0x5b0 | 4 | Auto-extracted signal err_pos_q from err_detector.vhd | +| can_bus.[`err_detector_form_err_i`](#err_detector_form_err_i) | 0x5b4 | 4 | Auto-extracted signal form_err_i from err_detector.vhd | +| can_bus.[`err_detector_crc_match_c`](#err_detector_crc_match_c) | 0x5b8 | 4 | Auto-extracted signal crc_match_c from err_detector.vhd | +| can_bus.[`err_detector_crc_match_d`](#err_detector_crc_match_d) | 0x5bc | 4 | Auto-extracted signal crc_match_d from err_detector.vhd | +| can_bus.[`err_detector_crc_match_q`](#err_detector_crc_match_q) | 0x5c0 | 4 | Auto-extracted signal crc_match_q from err_detector.vhd | +| can_bus.[`err_detector_dst_ctr_grey`](#err_detector_dst_ctr_grey) | 0x5c4 | 4 | Auto-extracted signal dst_ctr_grey from err_detector.vhd | +| can_bus.[`err_detector_dst_parity`](#err_detector_dst_parity) | 0x5c8 | 4 | Auto-extracted signal dst_parity from err_detector.vhd | +| can_bus.[`err_detector_stuff_count_check`](#err_detector_stuff_count_check) | 0x5cc | 4 | Auto-extracted signal stuff_count_check from err_detector.vhd | +| can_bus.[`err_detector_crc_15_ok`](#err_detector_crc_15_ok) | 0x5d0 | 4 | Auto-extracted signal crc_15_ok from err_detector.vhd | +| can_bus.[`err_detector_crc_17_ok`](#err_detector_crc_17_ok) | 0x5d4 | 4 | Auto-extracted signal crc_17_ok from err_detector.vhd | +| can_bus.[`err_detector_crc_21_ok`](#err_detector_crc_21_ok) | 0x5d8 | 4 | Auto-extracted signal crc_21_ok from err_detector.vhd | +| can_bus.[`err_detector_stuff_count_ok`](#err_detector_stuff_count_ok) | 0x5dc | 4 | Auto-extracted signal stuff_count_ok from err_detector.vhd | +| can_bus.[`err_detector_rx_crc_15`](#err_detector_rx_crc_15) | 0x5e0 | 4 | Auto-extracted signal rx_crc_15 from err_detector.vhd | +| can_bus.[`err_detector_rx_crc_17`](#err_detector_rx_crc_17) | 0x5e4 | 4 | Auto-extracted signal rx_crc_17 from err_detector.vhd | +| can_bus.[`err_detector_rx_crc_21`](#err_detector_rx_crc_21) | 0x5e8 | 4 | Auto-extracted signal rx_crc_21 from err_detector.vhd | +| can_bus.[`fault_confinement_drv_ewl`](#fault_confinement_drv_ewl) | 0x5ec | 4 | Auto-extracted signal drv_ewl from fault_confinement.vhd | +| can_bus.[`fault_confinement_drv_erp`](#fault_confinement_drv_erp) | 0x5f0 | 4 | Auto-extracted signal drv_erp from fault_confinement.vhd | +| can_bus.[`fault_confinement_drv_ctr_val`](#fault_confinement_drv_ctr_val) | 0x5f4 | 4 | Auto-extracted signal drv_ctr_val from fault_confinement.vhd | +| can_bus.[`fault_confinement_drv_ctr_sel`](#fault_confinement_drv_ctr_sel) | 0x5f8 | 4 | Auto-extracted signal drv_ctr_sel from fault_confinement.vhd | +| can_bus.[`fault_confinement_drv_ena`](#fault_confinement_drv_ena) | 0x5fc | 4 | Auto-extracted signal drv_ena from fault_confinement.vhd | +| can_bus.[`fault_confinement_tx_err_ctr_i`](#fault_confinement_tx_err_ctr_i) | 0x600 | 4 | Auto-extracted signal tx_err_ctr_i from fault_confinement.vhd | +| can_bus.[`fault_confinement_rx_err_ctr_i`](#fault_confinement_rx_err_ctr_i) | 0x604 | 4 | Auto-extracted signal rx_err_ctr_i from fault_confinement.vhd | +| can_bus.[`fault_confinement_inc_one`](#fault_confinement_inc_one) | 0x608 | 4 | Auto-extracted signal inc_one from fault_confinement.vhd | +| can_bus.[`fault_confinement_inc_eight`](#fault_confinement_inc_eight) | 0x60c | 4 | Auto-extracted signal inc_eight from fault_confinement.vhd | +| can_bus.[`fault_confinement_dec_one`](#fault_confinement_dec_one) | 0x610 | 4 | Auto-extracted signal dec_one from fault_confinement.vhd | +| can_bus.[`fault_confinement_drv_rom_ena`](#fault_confinement_drv_rom_ena) | 0x614 | 4 | Auto-extracted signal drv_rom_ena from fault_confinement.vhd | +| can_bus.[`fault_confinement_fsm_tx_err_ctr_mt_erp`](#fault_confinement_fsm_tx_err_ctr_mt_erp) | 0x618 | 4 | Auto-extracted signal tx_err_ctr_mt_erp from fault_confinement_fsm.vhd | +| can_bus.[`fault_confinement_fsm_rx_err_ctr_mt_erp`](#fault_confinement_fsm_rx_err_ctr_mt_erp) | 0x61c | 4 | Auto-extracted signal rx_err_ctr_mt_erp from fault_confinement_fsm.vhd | +| can_bus.[`fault_confinement_fsm_tx_err_ctr_mt_ewl`](#fault_confinement_fsm_tx_err_ctr_mt_ewl) | 0x620 | 4 | Auto-extracted signal tx_err_ctr_mt_ewl from fault_confinement_fsm.vhd | +| can_bus.[`fault_confinement_fsm_rx_err_ctr_mt_ewl`](#fault_confinement_fsm_rx_err_ctr_mt_ewl) | 0x624 | 4 | Auto-extracted signal rx_err_ctr_mt_ewl from fault_confinement_fsm.vhd | +| can_bus.[`fault_confinement_fsm_tx_err_ctr_mt_255`](#fault_confinement_fsm_tx_err_ctr_mt_255) | 0x628 | 4 | Auto-extracted signal tx_err_ctr_mt_255 from fault_confinement_fsm.vhd | +| can_bus.[`fault_confinement_fsm_err_warning_limit_d`](#fault_confinement_fsm_err_warning_limit_d) | 0x62c | 4 | Auto-extracted signal err_warning_limit_d from fault_confinement_fsm.vhd | +| can_bus.[`fault_confinement_fsm_err_warning_limit_q`](#fault_confinement_fsm_err_warning_limit_q) | 0x630 | 4 | Auto-extracted signal err_warning_limit_q from fault_confinement_fsm.vhd | +| can_bus.[`fault_confinement_fsm_fc_fsm_res_d`](#fault_confinement_fsm_fc_fsm_res_d) | 0x634 | 4 | Auto-extracted signal fc_fsm_res_d from fault_confinement_fsm.vhd | +| can_bus.[`fault_confinement_fsm_fc_fsm_res_q`](#fault_confinement_fsm_fc_fsm_res_q) | 0x638 | 4 | Auto-extracted signal fc_fsm_res_q from fault_confinement_fsm.vhd | +| can_bus.[`fault_confinement_rules_inc_one_i`](#fault_confinement_rules_inc_one_i) | 0x63c | 4 | Auto-extracted signal inc_one_i from fault_confinement_rules.vhd | +| can_bus.[`fault_confinement_rules_inc_eight_i`](#fault_confinement_rules_inc_eight_i) | 0x640 | 4 | Auto-extracted signal inc_eight_i from fault_confinement_rules.vhd | +| can_bus.[`frame_filters_drv_filter_A_mask`](#frame_filters_drv_filter_a_mask) | 0x644 | 4 | Auto-extracted signal drv_filter_A_mask from frame_filters.vhd | +| can_bus.[`frame_filters_drv_filter_A_ctrl`](#frame_filters_drv_filter_a_ctrl) | 0x648 | 4 | Auto-extracted signal drv_filter_A_ctrl from frame_filters.vhd | +| can_bus.[`frame_filters_drv_filter_A_bits`](#frame_filters_drv_filter_a_bits) | 0x64c | 4 | Auto-extracted signal drv_filter_A_bits from frame_filters.vhd | +| can_bus.[`frame_filters_int_filter_A_valid`](#frame_filters_int_filter_a_valid) | 0x650 | 4 | Auto-extracted signal int_filter_A_valid from frame_filters.vhd | +| can_bus.[`frame_filters_drv_filter_B_mask`](#frame_filters_drv_filter_b_mask) | 0x654 | 4 | Auto-extracted signal drv_filter_B_mask from frame_filters.vhd | +| can_bus.[`frame_filters_drv_filter_B_ctrl`](#frame_filters_drv_filter_b_ctrl) | 0x658 | 4 | Auto-extracted signal drv_filter_B_ctrl from frame_filters.vhd | +| can_bus.[`frame_filters_drv_filter_B_bits`](#frame_filters_drv_filter_b_bits) | 0x65c | 4 | Auto-extracted signal drv_filter_B_bits from frame_filters.vhd | +| can_bus.[`frame_filters_int_filter_B_valid`](#frame_filters_int_filter_b_valid) | 0x660 | 4 | Auto-extracted signal int_filter_B_valid from frame_filters.vhd | +| can_bus.[`frame_filters_drv_filter_C_mask`](#frame_filters_drv_filter_c_mask) | 0x664 | 4 | Auto-extracted signal drv_filter_C_mask from frame_filters.vhd | +| can_bus.[`frame_filters_drv_filter_C_ctrl`](#frame_filters_drv_filter_c_ctrl) | 0x668 | 4 | Auto-extracted signal drv_filter_C_ctrl from frame_filters.vhd | +| can_bus.[`frame_filters_drv_filter_C_bits`](#frame_filters_drv_filter_c_bits) | 0x66c | 4 | Auto-extracted signal drv_filter_C_bits from frame_filters.vhd | +| can_bus.[`frame_filters_int_filter_C_valid`](#frame_filters_int_filter_c_valid) | 0x670 | 4 | Auto-extracted signal int_filter_C_valid from frame_filters.vhd | +| can_bus.[`frame_filters_drv_filter_ran_ctrl`](#frame_filters_drv_filter_ran_ctrl) | 0x674 | 4 | Auto-extracted signal drv_filter_ran_ctrl from frame_filters.vhd | +| can_bus.[`frame_filters_drv_filter_ran_lo_th`](#frame_filters_drv_filter_ran_lo_th) | 0x678 | 4 | Auto-extracted signal drv_filter_ran_lo_th from frame_filters.vhd | +| can_bus.[`frame_filters_drv_filter_ran_hi_th`](#frame_filters_drv_filter_ran_hi_th) | 0x67c | 4 | Auto-extracted signal drv_filter_ran_hi_th from frame_filters.vhd | +| can_bus.[`frame_filters_int_filter_ran_valid`](#frame_filters_int_filter_ran_valid) | 0x680 | 4 | Auto-extracted signal int_filter_ran_valid from frame_filters.vhd | +| can_bus.[`frame_filters_drv_filters_ena`](#frame_filters_drv_filters_ena) | 0x684 | 4 | Auto-extracted signal drv_filters_ena from frame_filters.vhd | +| can_bus.[`frame_filters_int_data_type`](#frame_filters_int_data_type) | 0x688 | 4 | Auto-extracted signal int_data_type from frame_filters.vhd | +| can_bus.[`frame_filters_int_data_ctrl`](#frame_filters_int_data_ctrl) | 0x68c | 4 | Auto-extracted signal int_data_ctrl from frame_filters.vhd | +| can_bus.[`frame_filters_filter_A_enable`](#frame_filters_filter_a_enable) | 0x690 | 4 | Auto-extracted signal filter_A_enable from frame_filters.vhd | +| can_bus.[`frame_filters_filter_B_enable`](#frame_filters_filter_b_enable) | 0x694 | 4 | Auto-extracted signal filter_B_enable from frame_filters.vhd | +| can_bus.[`frame_filters_filter_C_enable`](#frame_filters_filter_c_enable) | 0x698 | 4 | Auto-extracted signal filter_C_enable from frame_filters.vhd | +| can_bus.[`frame_filters_filter_range_enable`](#frame_filters_filter_range_enable) | 0x69c | 4 | Auto-extracted signal filter_range_enable from frame_filters.vhd | +| can_bus.[`frame_filters_filter_result`](#frame_filters_filter_result) | 0x6a0 | 4 | Auto-extracted signal filter_result from frame_filters.vhd | +| can_bus.[`frame_filters_ident_valid_d`](#frame_filters_ident_valid_d) | 0x6a4 | 4 | Auto-extracted signal ident_valid_d from frame_filters.vhd | +| can_bus.[`frame_filters_ident_valid_q`](#frame_filters_ident_valid_q) | 0x6a8 | 4 | Auto-extracted signal ident_valid_q from frame_filters.vhd | +| can_bus.[`frame_filters_drv_drop_remote_frames`](#frame_filters_drv_drop_remote_frames) | 0x6ac | 4 | Auto-extracted signal drv_drop_remote_frames from frame_filters.vhd | +| can_bus.[`frame_filters_drop_rtr_frame`](#frame_filters_drop_rtr_frame) | 0x6b0 | 4 | Auto-extracted signal drop_rtr_frame from frame_filters.vhd | +| can_bus.[`inf_ram_wrapper_int_read_data`](#inf_ram_wrapper_int_read_data) | 0x6b4 | 4 | Auto-extracted signal int_read_data from inf_ram_wrapper.vhd | +| can_bus.[`inf_ram_wrapper_byte_we`](#inf_ram_wrapper_byte_we) | 0x6b8 | 4 | Auto-extracted signal byte_we from inf_ram_wrapper.vhd | +| can_bus.[`int_manager_drv_int_vect_clr`](#int_manager_drv_int_vect_clr) | 0x6bc | 4 | Auto-extracted signal drv_int_vect_clr from int_manager.vhd | +| can_bus.[`int_manager_drv_int_ena_set`](#int_manager_drv_int_ena_set) | 0x6c0 | 4 | Auto-extracted signal drv_int_ena_set from int_manager.vhd | +| can_bus.[`int_manager_drv_int_ena_clr`](#int_manager_drv_int_ena_clr) | 0x6c4 | 4 | Auto-extracted signal drv_int_ena_clr from int_manager.vhd | +| can_bus.[`int_manager_drv_int_mask_set`](#int_manager_drv_int_mask_set) | 0x6c8 | 4 | Auto-extracted signal drv_int_mask_set from int_manager.vhd | +| can_bus.[`int_manager_drv_int_mask_clr`](#int_manager_drv_int_mask_clr) | 0x6cc | 4 | Auto-extracted signal drv_int_mask_clr from int_manager.vhd | +| can_bus.[`int_manager_int_ena_i`](#int_manager_int_ena_i) | 0x6d0 | 4 | Auto-extracted signal int_ena_i from int_manager.vhd | +| can_bus.[`int_manager_int_mask_i`](#int_manager_int_mask_i) | 0x6d4 | 4 | Auto-extracted signal int_mask_i from int_manager.vhd | +| can_bus.[`int_manager_int_vect_i`](#int_manager_int_vect_i) | 0x6d8 | 4 | Auto-extracted signal int_vect_i from int_manager.vhd | +| can_bus.[`int_manager_int_input_active`](#int_manager_int_input_active) | 0x6dc | 4 | Auto-extracted signal int_input_active from int_manager.vhd | +| can_bus.[`int_manager_int_i`](#int_manager_int_i) | 0x6e0 | 4 | Auto-extracted signal int_i from int_manager.vhd | +| can_bus.[`int_module_int_mask_i`](#int_module_int_mask_i) | 0x6e4 | 4 | Auto-extracted signal int_mask_i from int_module.vhd | +| can_bus.[`int_module_int_ena_i`](#int_module_int_ena_i) | 0x6e8 | 4 | Auto-extracted signal int_ena_i from int_module.vhd | +| can_bus.[`int_module_int_mask_load`](#int_module_int_mask_load) | 0x6ec | 4 | Auto-extracted signal int_mask_load from int_module.vhd | +| can_bus.[`int_module_int_mask_next`](#int_module_int_mask_next) | 0x6f0 | 4 | Auto-extracted signal int_mask_next from int_module.vhd | +| can_bus.[`memory_reg_reg_value_r`](#memory_reg_reg_value_r) | 0x6f4 | 4 | Auto-extracted signal reg_value_r from memory_reg.vhd | +| can_bus.[`memory_reg_wr_select`](#memory_reg_wr_select) | 0x6f8 | 4 | Auto-extracted signal wr_select from memory_reg.vhd | +| can_bus.[`memory_reg_wr_select_expanded`](#memory_reg_wr_select_expanded) | 0x6fc | 4 | Auto-extracted signal wr_select_expanded from memory_reg.vhd | +| can_bus.[`memory_registers_status_comb`](#memory_registers_status_comb) | 0x700 | 4 | Auto-extracted signal status_comb from memory_registers.vhd | +| can_bus.[`memory_registers_can_core_cs`](#memory_registers_can_core_cs) | 0x704 | 4 | Auto-extracted signal can_core_cs from memory_registers.vhd | +| can_bus.[`memory_registers_control_registers_cs`](#memory_registers_control_registers_cs) | 0x708 | 4 | Auto-extracted signal control_registers_cs from memory_registers.vhd | +| can_bus.[`memory_registers_control_registers_cs_reg`](#memory_registers_control_registers_cs_reg) | 0x70c | 4 | Auto-extracted signal control_registers_cs_reg from memory_registers.vhd | +| can_bus.[`memory_registers_test_registers_cs`](#memory_registers_test_registers_cs) | 0x710 | 4 | Auto-extracted signal test_registers_cs from memory_registers.vhd | +| can_bus.[`memory_registers_test_registers_cs_reg`](#memory_registers_test_registers_cs_reg) | 0x714 | 4 | Auto-extracted signal test_registers_cs_reg from memory_registers.vhd | +| can_bus.[`memory_registers_control_registers_rdata`](#memory_registers_control_registers_rdata) | 0x718 | 4 | Auto-extracted signal control_registers_rdata from memory_registers.vhd | +| can_bus.[`memory_registers_test_registers_rdata`](#memory_registers_test_registers_rdata) | 0x71c | 4 | Auto-extracted signal test_registers_rdata from memory_registers.vhd | +| can_bus.[`memory_registers_is_err_active`](#memory_registers_is_err_active) | 0x720 | 4 | Auto-extracted signal is_err_active from memory_registers.vhd | +| can_bus.[`memory_registers_is_err_passive`](#memory_registers_is_err_passive) | 0x724 | 4 | Auto-extracted signal is_err_passive from memory_registers.vhd | +| can_bus.[`memory_registers_is_bus_off`](#memory_registers_is_bus_off) | 0x728 | 4 | Auto-extracted signal is_bus_off from memory_registers.vhd | +| can_bus.[`memory_registers_is_transmitter`](#memory_registers_is_transmitter) | 0x72c | 4 | Auto-extracted signal is_transmitter from memory_registers.vhd | +| can_bus.[`memory_registers_is_receiver`](#memory_registers_is_receiver) | 0x730 | 4 | Auto-extracted signal is_receiver from memory_registers.vhd | +| can_bus.[`memory_registers_is_idle`](#memory_registers_is_idle) | 0x734 | 4 | Auto-extracted signal is_idle from memory_registers.vhd | +| can_bus.[`memory_registers_reg_lock_1_active`](#memory_registers_reg_lock_1_active) | 0x738 | 4 | Auto-extracted signal reg_lock_1_active from memory_registers.vhd | +| can_bus.[`memory_registers_reg_lock_2_active`](#memory_registers_reg_lock_2_active) | 0x73c | 4 | Auto-extracted signal reg_lock_2_active from memory_registers.vhd | +| can_bus.[`memory_registers_soft_res_q_n`](#memory_registers_soft_res_q_n) | 0x740 | 4 | Auto-extracted signal soft_res_q_n from memory_registers.vhd | +| can_bus.[`memory_registers_ewl_padded`](#memory_registers_ewl_padded) | 0x744 | 4 | Auto-extracted signal ewl_padded from memory_registers.vhd | +| can_bus.[`memory_registers_control_regs_clk_en`](#memory_registers_control_regs_clk_en) | 0x748 | 4 | Auto-extracted signal control_regs_clk_en from memory_registers.vhd | +| can_bus.[`memory_registers_test_regs_clk_en`](#memory_registers_test_regs_clk_en) | 0x74c | 4 | Auto-extracted signal test_regs_clk_en from memory_registers.vhd | +| can_bus.[`memory_registers_clk_control_regs`](#memory_registers_clk_control_regs) | 0x750 | 4 | Auto-extracted signal clk_control_regs from memory_registers.vhd | +| can_bus.[`memory_registers_clk_test_regs`](#memory_registers_clk_test_regs) | 0x754 | 4 | Auto-extracted signal clk_test_regs from memory_registers.vhd | +| can_bus.[`memory_registers_rx_buf_mode`](#memory_registers_rx_buf_mode) | 0x758 | 4 | Auto-extracted signal rx_buf_mode from memory_registers.vhd | +| can_bus.[`memory_registers_rx_move_cmd`](#memory_registers_rx_move_cmd) | 0x75c | 4 | Auto-extracted signal rx_move_cmd from memory_registers.vhd | +| can_bus.[`memory_registers_ctr_pres_sel_q`](#memory_registers_ctr_pres_sel_q) | 0x760 | 4 | Auto-extracted signal ctr_pres_sel_q from memory_registers.vhd | +| can_bus.[`operation_control_drv_ena`](#operation_control_drv_ena) | 0x764 | 4 | Auto-extracted signal drv_ena from operation_control.vhd | +| can_bus.[`operation_control_go_to_off`](#operation_control_go_to_off) | 0x768 | 4 | Auto-extracted signal go_to_off from operation_control.vhd | +| can_bus.[`prescaler_drv_ena`](#prescaler_drv_ena) | 0x76c | 4 | Auto-extracted signal drv_ena from prescaler.vhd | +| can_bus.[`prescaler_tseg1_nbt`](#prescaler_tseg1_nbt) | 0x770 | 4 | Auto-extracted signal tseg1_nbt from prescaler.vhd | +| can_bus.[`prescaler_tseg2_nbt`](#prescaler_tseg2_nbt) | 0x774 | 4 | Auto-extracted signal tseg2_nbt from prescaler.vhd | +| can_bus.[`prescaler_brp_nbt`](#prescaler_brp_nbt) | 0x778 | 4 | Auto-extracted signal brp_nbt from prescaler.vhd | +| can_bus.[`prescaler_sjw_nbt`](#prescaler_sjw_nbt) | 0x77c | 4 | Auto-extracted signal sjw_nbt from prescaler.vhd | +| can_bus.[`prescaler_tseg1_dbt`](#prescaler_tseg1_dbt) | 0x780 | 4 | Auto-extracted signal tseg1_dbt from prescaler.vhd | +| can_bus.[`prescaler_tseg2_dbt`](#prescaler_tseg2_dbt) | 0x784 | 4 | Auto-extracted signal tseg2_dbt from prescaler.vhd | +| can_bus.[`prescaler_brp_dbt`](#prescaler_brp_dbt) | 0x788 | 4 | Auto-extracted signal brp_dbt from prescaler.vhd | +| can_bus.[`prescaler_sjw_dbt`](#prescaler_sjw_dbt) | 0x78c | 4 | Auto-extracted signal sjw_dbt from prescaler.vhd | +| can_bus.[`prescaler_segment_end`](#prescaler_segment_end) | 0x790 | 4 | Auto-extracted signal segment_end from prescaler.vhd | +| can_bus.[`prescaler_h_sync_valid`](#prescaler_h_sync_valid) | 0x794 | 4 | Auto-extracted signal h_sync_valid from prescaler.vhd | +| can_bus.[`prescaler_is_tseg1`](#prescaler_is_tseg1) | 0x798 | 4 | Auto-extracted signal is_tseg1 from prescaler.vhd | +| can_bus.[`prescaler_is_tseg2`](#prescaler_is_tseg2) | 0x79c | 4 | Auto-extracted signal is_tseg2 from prescaler.vhd | +| can_bus.[`prescaler_resync_edge_valid`](#prescaler_resync_edge_valid) | 0x7a0 | 4 | Auto-extracted signal resync_edge_valid from prescaler.vhd | +| can_bus.[`prescaler_h_sync_edge_valid`](#prescaler_h_sync_edge_valid) | 0x7a4 | 4 | Auto-extracted signal h_sync_edge_valid from prescaler.vhd | +| can_bus.[`prescaler_segm_counter_nbt`](#prescaler_segm_counter_nbt) | 0x7a8 | 4 | Auto-extracted signal segm_counter_nbt from prescaler.vhd | +| can_bus.[`prescaler_segm_counter_dbt`](#prescaler_segm_counter_dbt) | 0x7ac | 4 | Auto-extracted signal segm_counter_dbt from prescaler.vhd | +| can_bus.[`prescaler_exit_segm_req_nbt`](#prescaler_exit_segm_req_nbt) | 0x7b0 | 4 | Auto-extracted signal exit_segm_req_nbt from prescaler.vhd | +| can_bus.[`prescaler_exit_segm_req_dbt`](#prescaler_exit_segm_req_dbt) | 0x7b4 | 4 | Auto-extracted signal exit_segm_req_dbt from prescaler.vhd | +| can_bus.[`prescaler_tq_edge_nbt`](#prescaler_tq_edge_nbt) | 0x7b8 | 4 | Auto-extracted signal tq_edge_nbt from prescaler.vhd | +| can_bus.[`prescaler_tq_edge_dbt`](#prescaler_tq_edge_dbt) | 0x7bc | 4 | Auto-extracted signal tq_edge_dbt from prescaler.vhd | +| can_bus.[`prescaler_rx_trig_req`](#prescaler_rx_trig_req) | 0x7c0 | 4 | Auto-extracted signal rx_trig_req from prescaler.vhd | +| can_bus.[`prescaler_tx_trig_req`](#prescaler_tx_trig_req) | 0x7c4 | 4 | Auto-extracted signal tx_trig_req from prescaler.vhd | +| can_bus.[`prescaler_start_edge`](#prescaler_start_edge) | 0x7c8 | 4 | Auto-extracted signal start_edge from prescaler.vhd | +| can_bus.[`prescaler_bt_ctr_clear`](#prescaler_bt_ctr_clear) | 0x7cc | 4 | Auto-extracted signal bt_ctr_clear from prescaler.vhd | +| can_bus.[`priority_decoder_l0_valid`](#priority_decoder_l0_valid) | 0x7d0 | 4 | Auto-extracted signal l0_valid from priority_decoder.vhd | +| can_bus.[`priority_decoder_l1_valid`](#priority_decoder_l1_valid) | 0x7d4 | 4 | Auto-extracted signal l1_valid from priority_decoder.vhd | +| can_bus.[`priority_decoder_l1_winner`](#priority_decoder_l1_winner) | 0x7d8 | 4 | Auto-extracted signal l1_winner from priority_decoder.vhd | +| can_bus.[`priority_decoder_l2_valid`](#priority_decoder_l2_valid) | 0x7dc | 4 | Auto-extracted signal l2_valid from priority_decoder.vhd | +| can_bus.[`priority_decoder_l2_winner`](#priority_decoder_l2_winner) | 0x7e0 | 4 | Auto-extracted signal l2_winner from priority_decoder.vhd | +| can_bus.[`priority_decoder_l3_valid`](#priority_decoder_l3_valid) | 0x7e4 | 4 | Auto-extracted signal l3_valid from priority_decoder.vhd | +| can_bus.[`priority_decoder_l3_winner`](#priority_decoder_l3_winner) | 0x7e8 | 4 | Auto-extracted signal l3_winner from priority_decoder.vhd | +| can_bus.[`protocol_control_drv_can_fd_ena`](#protocol_control_drv_can_fd_ena) | 0x7ec | 4 | Auto-extracted signal drv_can_fd_ena from protocol_control.vhd | +| can_bus.[`protocol_control_drv_bus_mon_ena`](#protocol_control_drv_bus_mon_ena) | 0x7f0 | 4 | Auto-extracted signal drv_bus_mon_ena from protocol_control.vhd | +| can_bus.[`protocol_control_drv_retr_lim_ena`](#protocol_control_drv_retr_lim_ena) | 0x7f4 | 4 | Auto-extracted signal drv_retr_lim_ena from protocol_control.vhd | +| can_bus.[`protocol_control_drv_retr_th`](#protocol_control_drv_retr_th) | 0x7f8 | 4 | Auto-extracted signal drv_retr_th from protocol_control.vhd | +| can_bus.[`protocol_control_drv_self_test_ena`](#protocol_control_drv_self_test_ena) | 0x7fc | 4 | Auto-extracted signal drv_self_test_ena from protocol_control.vhd | +| can_bus.[`protocol_control_drv_ack_forb`](#protocol_control_drv_ack_forb) | 0x800 | 4 | Auto-extracted signal drv_ack_forb from protocol_control.vhd | +| can_bus.[`protocol_control_drv_ena`](#protocol_control_drv_ena) | 0x804 | 4 | Auto-extracted signal drv_ena from protocol_control.vhd | +| can_bus.[`protocol_control_drv_fd_type`](#protocol_control_drv_fd_type) | 0x808 | 4 | Auto-extracted signal drv_fd_type from protocol_control.vhd | +| can_bus.[`protocol_control_drv_int_loopback_ena`](#protocol_control_drv_int_loopback_ena) | 0x80c | 4 | Auto-extracted signal drv_int_loopback_ena from protocol_control.vhd | +| can_bus.[`protocol_control_drv_bus_off_reset`](#protocol_control_drv_bus_off_reset) | 0x810 | 4 | Auto-extracted signal drv_bus_off_reset from protocol_control.vhd | +| can_bus.[`protocol_control_drv_ssp_delay_select`](#protocol_control_drv_ssp_delay_select) | 0x814 | 4 | Auto-extracted signal drv_ssp_delay_select from protocol_control.vhd | +| can_bus.[`protocol_control_drv_pex`](#protocol_control_drv_pex) | 0x818 | 4 | Auto-extracted signal drv_pex from protocol_control.vhd | +| can_bus.[`protocol_control_drv_cpexs`](#protocol_control_drv_cpexs) | 0x81c | 4 | Auto-extracted signal drv_cpexs from protocol_control.vhd | +| can_bus.[`protocol_control_tran_word_swapped`](#protocol_control_tran_word_swapped) | 0x820 | 4 | Auto-extracted signal tran_word_swapped from protocol_control.vhd | +| can_bus.[`protocol_control_err_frm_req`](#protocol_control_err_frm_req) | 0x824 | 4 | Auto-extracted signal err_frm_req from protocol_control.vhd | +| can_bus.[`protocol_control_tx_load_base_id`](#protocol_control_tx_load_base_id) | 0x828 | 4 | Auto-extracted signal tx_load_base_id from protocol_control.vhd | +| can_bus.[`protocol_control_tx_load_ext_id`](#protocol_control_tx_load_ext_id) | 0x82c | 4 | Auto-extracted signal tx_load_ext_id from protocol_control.vhd | +| can_bus.[`protocol_control_tx_load_dlc`](#protocol_control_tx_load_dlc) | 0x830 | 4 | Auto-extracted signal tx_load_dlc from protocol_control.vhd | +| can_bus.[`protocol_control_tx_load_data_word`](#protocol_control_tx_load_data_word) | 0x834 | 4 | Auto-extracted signal tx_load_data_word from protocol_control.vhd | +| can_bus.[`protocol_control_tx_load_stuff_count`](#protocol_control_tx_load_stuff_count) | 0x838 | 4 | Auto-extracted signal tx_load_stuff_count from protocol_control.vhd | +| can_bus.[`protocol_control_tx_load_crc`](#protocol_control_tx_load_crc) | 0x83c | 4 | Auto-extracted signal tx_load_crc from protocol_control.vhd | +| can_bus.[`protocol_control_tx_shift_ena`](#protocol_control_tx_shift_ena) | 0x840 | 4 | Auto-extracted signal tx_shift_ena from protocol_control.vhd | +| can_bus.[`protocol_control_tx_dominant`](#protocol_control_tx_dominant) | 0x844 | 4 | Auto-extracted signal tx_dominant from protocol_control.vhd | +| can_bus.[`protocol_control_rx_clear`](#protocol_control_rx_clear) | 0x848 | 4 | Auto-extracted signal rx_clear from protocol_control.vhd | +| can_bus.[`protocol_control_rx_store_base_id`](#protocol_control_rx_store_base_id) | 0x84c | 4 | Auto-extracted signal rx_store_base_id from protocol_control.vhd | +| can_bus.[`protocol_control_rx_store_ext_id`](#protocol_control_rx_store_ext_id) | 0x850 | 4 | Auto-extracted signal rx_store_ext_id from protocol_control.vhd | +| can_bus.[`protocol_control_rx_store_ide`](#protocol_control_rx_store_ide) | 0x854 | 4 | Auto-extracted signal rx_store_ide from protocol_control.vhd | +| can_bus.[`protocol_control_rx_store_rtr`](#protocol_control_rx_store_rtr) | 0x858 | 4 | Auto-extracted signal rx_store_rtr from protocol_control.vhd | +| can_bus.[`protocol_control_rx_store_edl`](#protocol_control_rx_store_edl) | 0x85c | 4 | Auto-extracted signal rx_store_edl from protocol_control.vhd | +| can_bus.[`protocol_control_rx_store_dlc`](#protocol_control_rx_store_dlc) | 0x860 | 4 | Auto-extracted signal rx_store_dlc from protocol_control.vhd | +| can_bus.[`protocol_control_rx_store_esi`](#protocol_control_rx_store_esi) | 0x864 | 4 | Auto-extracted signal rx_store_esi from protocol_control.vhd | +| can_bus.[`protocol_control_rx_store_brs`](#protocol_control_rx_store_brs) | 0x868 | 4 | Auto-extracted signal rx_store_brs from protocol_control.vhd | +| can_bus.[`protocol_control_rx_store_stuff_count`](#protocol_control_rx_store_stuff_count) | 0x86c | 4 | Auto-extracted signal rx_store_stuff_count from protocol_control.vhd | +| can_bus.[`protocol_control_rx_shift_ena`](#protocol_control_rx_shift_ena) | 0x870 | 4 | Auto-extracted signal rx_shift_ena from protocol_control.vhd | +| can_bus.[`protocol_control_rx_shift_in_sel`](#protocol_control_rx_shift_in_sel) | 0x874 | 4 | Auto-extracted signal rx_shift_in_sel from protocol_control.vhd | +| can_bus.[`protocol_control_rec_is_rtr_i`](#protocol_control_rec_is_rtr_i) | 0x878 | 4 | Auto-extracted signal rec_is_rtr_i from protocol_control.vhd | +| can_bus.[`protocol_control_rec_dlc_d`](#protocol_control_rec_dlc_d) | 0x87c | 4 | Auto-extracted signal rec_dlc_d from protocol_control.vhd | +| can_bus.[`protocol_control_rec_dlc_q`](#protocol_control_rec_dlc_q) | 0x880 | 4 | Auto-extracted signal rec_dlc_q from protocol_control.vhd | +| can_bus.[`protocol_control_rec_frame_type_i`](#protocol_control_rec_frame_type_i) | 0x884 | 4 | Auto-extracted signal rec_frame_type_i from protocol_control.vhd | +| can_bus.[`protocol_control_ctrl_ctr_pload`](#protocol_control_ctrl_ctr_pload) | 0x888 | 4 | Auto-extracted signal ctrl_ctr_pload from protocol_control.vhd | +| can_bus.[`protocol_control_ctrl_ctr_pload_val`](#protocol_control_ctrl_ctr_pload_val) | 0x88c | 4 | Auto-extracted signal ctrl_ctr_pload_val from protocol_control.vhd | +| can_bus.[`protocol_control_ctrl_ctr_ena`](#protocol_control_ctrl_ctr_ena) | 0x890 | 4 | Auto-extracted signal ctrl_ctr_ena from protocol_control.vhd | +| can_bus.[`protocol_control_ctrl_ctr_zero`](#protocol_control_ctrl_ctr_zero) | 0x894 | 4 | Auto-extracted signal ctrl_ctr_zero from protocol_control.vhd | +| can_bus.[`protocol_control_ctrl_ctr_one`](#protocol_control_ctrl_ctr_one) | 0x898 | 4 | Auto-extracted signal ctrl_ctr_one from protocol_control.vhd | +| can_bus.[`protocol_control_ctrl_counted_byte`](#protocol_control_ctrl_counted_byte) | 0x89c | 4 | Auto-extracted signal ctrl_counted_byte from protocol_control.vhd | +| can_bus.[`protocol_control_ctrl_counted_byte_index`](#protocol_control_ctrl_counted_byte_index) | 0x8a0 | 4 | Auto-extracted signal ctrl_counted_byte_index from protocol_control.vhd | +| can_bus.[`protocol_control_ctrl_ctr_mem_index`](#protocol_control_ctrl_ctr_mem_index) | 0x8a4 | 4 | Auto-extracted signal ctrl_ctr_mem_index from protocol_control.vhd | +| can_bus.[`protocol_control_compl_ctr_ena`](#protocol_control_compl_ctr_ena) | 0x8a8 | 4 | Auto-extracted signal compl_ctr_ena from protocol_control.vhd | +| can_bus.[`protocol_control_reinteg_ctr_clr`](#protocol_control_reinteg_ctr_clr) | 0x8ac | 4 | Auto-extracted signal reinteg_ctr_clr from protocol_control.vhd | +| can_bus.[`protocol_control_reinteg_ctr_enable`](#protocol_control_reinteg_ctr_enable) | 0x8b0 | 4 | Auto-extracted signal reinteg_ctr_enable from protocol_control.vhd | +| can_bus.[`protocol_control_reinteg_ctr_expired`](#protocol_control_reinteg_ctr_expired) | 0x8b4 | 4 | Auto-extracted signal reinteg_ctr_expired from protocol_control.vhd | +| can_bus.[`protocol_control_retr_ctr_clear`](#protocol_control_retr_ctr_clear) | 0x8b8 | 4 | Auto-extracted signal retr_ctr_clear from protocol_control.vhd | +| can_bus.[`protocol_control_retr_ctr_add`](#protocol_control_retr_ctr_add) | 0x8bc | 4 | Auto-extracted signal retr_ctr_add from protocol_control.vhd | +| can_bus.[`protocol_control_retr_limit_reached`](#protocol_control_retr_limit_reached) | 0x8c0 | 4 | Auto-extracted signal retr_limit_reached from protocol_control.vhd | +| can_bus.[`protocol_control_form_err_i`](#protocol_control_form_err_i) | 0x8c4 | 4 | Auto-extracted signal form_err_i from protocol_control.vhd | +| can_bus.[`protocol_control_ack_err_i`](#protocol_control_ack_err_i) | 0x8c8 | 4 | Auto-extracted signal ack_err_i from protocol_control.vhd | +| can_bus.[`protocol_control_crc_check`](#protocol_control_crc_check) | 0x8cc | 4 | Auto-extracted signal crc_check from protocol_control.vhd | +| can_bus.[`protocol_control_bit_err_arb`](#protocol_control_bit_err_arb) | 0x8d0 | 4 | Auto-extracted signal bit_err_arb from protocol_control.vhd | +| can_bus.[`protocol_control_crc_match`](#protocol_control_crc_match) | 0x8d4 | 4 | Auto-extracted signal crc_match from protocol_control.vhd | +| can_bus.[`protocol_control_crc_err_i`](#protocol_control_crc_err_i) | 0x8d8 | 4 | Auto-extracted signal crc_err_i from protocol_control.vhd | +| can_bus.[`protocol_control_crc_clear_match_flag`](#protocol_control_crc_clear_match_flag) | 0x8dc | 4 | Auto-extracted signal crc_clear_match_flag from protocol_control.vhd | +| can_bus.[`protocol_control_crc_src`](#protocol_control_crc_src) | 0x8e0 | 4 | Auto-extracted signal crc_src from protocol_control.vhd | +| can_bus.[`protocol_control_err_pos`](#protocol_control_err_pos) | 0x8e4 | 4 | Auto-extracted signal err_pos from protocol_control.vhd | +| can_bus.[`protocol_control_is_arbitration_i`](#protocol_control_is_arbitration_i) | 0x8e8 | 4 | Auto-extracted signal is_arbitration_i from protocol_control.vhd | +| can_bus.[`protocol_control_bit_err_enable`](#protocol_control_bit_err_enable) | 0x8ec | 4 | Auto-extracted signal bit_err_enable from protocol_control.vhd | +| can_bus.[`protocol_control_tx_data_nbs_i`](#protocol_control_tx_data_nbs_i) | 0x8f0 | 4 | Auto-extracted signal tx_data_nbs_i from protocol_control.vhd | +| can_bus.[`protocol_control_rx_crc`](#protocol_control_rx_crc) | 0x8f4 | 4 | Auto-extracted signal rx_crc from protocol_control.vhd | +| can_bus.[`protocol_control_rx_stuff_count`](#protocol_control_rx_stuff_count) | 0x8f8 | 4 | Auto-extracted signal rx_stuff_count from protocol_control.vhd | +| can_bus.[`protocol_control_fixed_stuff_i`](#protocol_control_fixed_stuff_i) | 0x8fc | 4 | Auto-extracted signal fixed_stuff_i from protocol_control.vhd | +| can_bus.[`protocol_control_arbitration_lost_i`](#protocol_control_arbitration_lost_i) | 0x900 | 4 | Auto-extracted signal arbitration_lost_i from protocol_control.vhd | +| can_bus.[`protocol_control_alc_id_field`](#protocol_control_alc_id_field) | 0x904 | 4 | Auto-extracted signal alc_id_field from protocol_control.vhd | +| can_bus.[`protocol_control_drv_rom_ena`](#protocol_control_drv_rom_ena) | 0x908 | 4 | Auto-extracted signal drv_rom_ena from protocol_control.vhd | +| can_bus.[`protocol_control_fsm_state_reg_ce`](#protocol_control_fsm_state_reg_ce) | 0x90c | 4 | Auto-extracted signal state_reg_ce from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_no_data_transmitter`](#protocol_control_fsm_no_data_transmitter) | 0x910 | 4 | Auto-extracted signal no_data_transmitter from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_no_data_receiver`](#protocol_control_fsm_no_data_receiver) | 0x914 | 4 | Auto-extracted signal no_data_receiver from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_no_data_field`](#protocol_control_fsm_no_data_field) | 0x918 | 4 | Auto-extracted signal no_data_field from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_ctrl_ctr_pload_i`](#protocol_control_fsm_ctrl_ctr_pload_i) | 0x91c | 4 | Auto-extracted signal ctrl_ctr_pload_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_ctrl_ctr_pload_unaliged`](#protocol_control_fsm_ctrl_ctr_pload_unaliged) | 0x920 | 4 | Auto-extracted signal ctrl_ctr_pload_unaliged from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_crc_use_21`](#protocol_control_fsm_crc_use_21) | 0x924 | 4 | Auto-extracted signal crc_use_21 from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_crc_use_17`](#protocol_control_fsm_crc_use_17) | 0x928 | 4 | Auto-extracted signal crc_use_17 from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_crc_src_i`](#protocol_control_fsm_crc_src_i) | 0x92c | 4 | Auto-extracted signal crc_src_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_crc_length_i`](#protocol_control_fsm_crc_length_i) | 0x930 | 4 | Auto-extracted signal crc_length_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_tran_data_length`](#protocol_control_fsm_tran_data_length) | 0x934 | 4 | Auto-extracted signal tran_data_length from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rec_data_length`](#protocol_control_fsm_rec_data_length) | 0x938 | 4 | Auto-extracted signal rec_data_length from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rec_data_length_c`](#protocol_control_fsm_rec_data_length_c) | 0x93c | 4 | Auto-extracted signal rec_data_length_c from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_data_length_c`](#protocol_control_fsm_data_length_c) | 0x940 | 4 | Auto-extracted signal data_length_c from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_data_length_shifted_c`](#protocol_control_fsm_data_length_shifted_c) | 0x944 | 4 | Auto-extracted signal data_length_shifted_c from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_data_length_bits_c`](#protocol_control_fsm_data_length_bits_c) | 0x948 | 4 | Auto-extracted signal data_length_bits_c from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_is_fd_frame`](#protocol_control_fsm_is_fd_frame) | 0x94c | 4 | Auto-extracted signal is_fd_frame from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_frame_start`](#protocol_control_fsm_frame_start) | 0x950 | 4 | Auto-extracted signal frame_start from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_tx_frame_ready`](#protocol_control_fsm_tx_frame_ready) | 0x954 | 4 | Auto-extracted signal tx_frame_ready from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_ide_is_arbitration`](#protocol_control_fsm_ide_is_arbitration) | 0x958 | 4 | Auto-extracted signal ide_is_arbitration from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_arbitration_lost_condition`](#protocol_control_fsm_arbitration_lost_condition) | 0x95c | 4 | Auto-extracted signal arbitration_lost_condition from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_arbitration_lost_i`](#protocol_control_fsm_arbitration_lost_i) | 0x960 | 4 | Auto-extracted signal arbitration_lost_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_tx_failed`](#protocol_control_fsm_tx_failed) | 0x964 | 4 | Auto-extracted signal tx_failed from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_store_metadata_d`](#protocol_control_fsm_store_metadata_d) | 0x968 | 4 | Auto-extracted signal store_metadata_d from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_store_data_d`](#protocol_control_fsm_store_data_d) | 0x96c | 4 | Auto-extracted signal store_data_d from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rec_valid_d`](#protocol_control_fsm_rec_valid_d) | 0x970 | 4 | Auto-extracted signal rec_valid_d from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rec_abort_d`](#protocol_control_fsm_rec_abort_d) | 0x974 | 4 | Auto-extracted signal rec_abort_d from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_go_to_suspend`](#protocol_control_fsm_go_to_suspend) | 0x978 | 4 | Auto-extracted signal go_to_suspend from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_go_to_stuff_count`](#protocol_control_fsm_go_to_stuff_count) | 0x97c | 4 | Auto-extracted signal go_to_stuff_count from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rx_store_base_id_i`](#protocol_control_fsm_rx_store_base_id_i) | 0x980 | 4 | Auto-extracted signal rx_store_base_id_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rx_store_ext_id_i`](#protocol_control_fsm_rx_store_ext_id_i) | 0x984 | 4 | Auto-extracted signal rx_store_ext_id_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rx_store_ide_i`](#protocol_control_fsm_rx_store_ide_i) | 0x988 | 4 | Auto-extracted signal rx_store_ide_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rx_store_rtr_i`](#protocol_control_fsm_rx_store_rtr_i) | 0x98c | 4 | Auto-extracted signal rx_store_rtr_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rx_store_edl_i`](#protocol_control_fsm_rx_store_edl_i) | 0x990 | 4 | Auto-extracted signal rx_store_edl_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rx_store_dlc_i`](#protocol_control_fsm_rx_store_dlc_i) | 0x994 | 4 | Auto-extracted signal rx_store_dlc_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rx_store_esi_i`](#protocol_control_fsm_rx_store_esi_i) | 0x998 | 4 | Auto-extracted signal rx_store_esi_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rx_store_brs_i`](#protocol_control_fsm_rx_store_brs_i) | 0x99c | 4 | Auto-extracted signal rx_store_brs_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rx_store_stuff_count_i`](#protocol_control_fsm_rx_store_stuff_count_i) | 0x9a0 | 4 | Auto-extracted signal rx_store_stuff_count_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rx_clear_i`](#protocol_control_fsm_rx_clear_i) | 0x9a4 | 4 | Auto-extracted signal rx_clear_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_tx_load_base_id_i`](#protocol_control_fsm_tx_load_base_id_i) | 0x9a8 | 4 | Auto-extracted signal tx_load_base_id_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_tx_load_ext_id_i`](#protocol_control_fsm_tx_load_ext_id_i) | 0x9ac | 4 | Auto-extracted signal tx_load_ext_id_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_tx_load_dlc_i`](#protocol_control_fsm_tx_load_dlc_i) | 0x9b0 | 4 | Auto-extracted signal tx_load_dlc_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_tx_load_data_word_i`](#protocol_control_fsm_tx_load_data_word_i) | 0x9b4 | 4 | Auto-extracted signal tx_load_data_word_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_tx_load_stuff_count_i`](#protocol_control_fsm_tx_load_stuff_count_i) | 0x9b8 | 4 | Auto-extracted signal tx_load_stuff_count_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_tx_load_crc_i`](#protocol_control_fsm_tx_load_crc_i) | 0x9bc | 4 | Auto-extracted signal tx_load_crc_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_tx_shift_ena_i`](#protocol_control_fsm_tx_shift_ena_i) | 0x9c0 | 4 | Auto-extracted signal tx_shift_ena_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_form_err_i`](#protocol_control_fsm_form_err_i) | 0x9c4 | 4 | Auto-extracted signal form_err_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_ack_err_i`](#protocol_control_fsm_ack_err_i) | 0x9c8 | 4 | Auto-extracted signal ack_err_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_ack_err_flag`](#protocol_control_fsm_ack_err_flag) | 0x9cc | 4 | Auto-extracted signal ack_err_flag from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_ack_err_flag_clr`](#protocol_control_fsm_ack_err_flag_clr) | 0x9d0 | 4 | Auto-extracted signal ack_err_flag_clr from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_crc_err_i`](#protocol_control_fsm_crc_err_i) | 0x9d4 | 4 | Auto-extracted signal crc_err_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_bit_err_arb_i`](#protocol_control_fsm_bit_err_arb_i) | 0x9d8 | 4 | Auto-extracted signal bit_err_arb_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_sp_control_switch_data`](#protocol_control_fsm_sp_control_switch_data) | 0x9dc | 4 | Auto-extracted signal sp_control_switch_data from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_sp_control_switch_nominal`](#protocol_control_fsm_sp_control_switch_nominal) | 0x9e0 | 4 | Auto-extracted signal sp_control_switch_nominal from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_switch_to_ssp`](#protocol_control_fsm_switch_to_ssp) | 0x9e4 | 4 | Auto-extracted signal switch_to_ssp from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_sp_control_ce`](#protocol_control_fsm_sp_control_ce) | 0x9e8 | 4 | Auto-extracted signal sp_control_ce from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_sp_control_d`](#protocol_control_fsm_sp_control_d) | 0x9ec | 4 | Auto-extracted signal sp_control_d from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_sp_control_q_i`](#protocol_control_fsm_sp_control_q_i) | 0x9f0 | 4 | Auto-extracted signal sp_control_q_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_ssp_reset_i`](#protocol_control_fsm_ssp_reset_i) | 0x9f4 | 4 | Auto-extracted signal ssp_reset_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_sync_control_d`](#protocol_control_fsm_sync_control_d) | 0x9f8 | 4 | Auto-extracted signal sync_control_d from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_sync_control_q`](#protocol_control_fsm_sync_control_q) | 0x9fc | 4 | Auto-extracted signal sync_control_q from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_perform_hsync`](#protocol_control_fsm_perform_hsync) | 0xa00 | 4 | Auto-extracted signal perform_hsync from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_primary_err_i`](#protocol_control_fsm_primary_err_i) | 0xa04 | 4 | Auto-extracted signal primary_err_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_err_delim_late_i`](#protocol_control_fsm_err_delim_late_i) | 0xa08 | 4 | Auto-extracted signal err_delim_late_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_set_err_active_i`](#protocol_control_fsm_set_err_active_i) | 0xa0c | 4 | Auto-extracted signal set_err_active_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_set_transmitter_i`](#protocol_control_fsm_set_transmitter_i) | 0xa10 | 4 | Auto-extracted signal set_transmitter_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_set_receiver_i`](#protocol_control_fsm_set_receiver_i) | 0xa14 | 4 | Auto-extracted signal set_receiver_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_set_idle_i`](#protocol_control_fsm_set_idle_i) | 0xa18 | 4 | Auto-extracted signal set_idle_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_first_err_delim_d`](#protocol_control_fsm_first_err_delim_d) | 0xa1c | 4 | Auto-extracted signal first_err_delim_d from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_first_err_delim_q`](#protocol_control_fsm_first_err_delim_q) | 0xa20 | 4 | Auto-extracted signal first_err_delim_q from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_stuff_enable_set`](#protocol_control_fsm_stuff_enable_set) | 0xa24 | 4 | Auto-extracted signal stuff_enable_set from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_stuff_enable_clear`](#protocol_control_fsm_stuff_enable_clear) | 0xa28 | 4 | Auto-extracted signal stuff_enable_clear from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_destuff_enable_set`](#protocol_control_fsm_destuff_enable_set) | 0xa2c | 4 | Auto-extracted signal destuff_enable_set from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_destuff_enable_clear`](#protocol_control_fsm_destuff_enable_clear) | 0xa30 | 4 | Auto-extracted signal destuff_enable_clear from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_bit_err_disable`](#protocol_control_fsm_bit_err_disable) | 0xa34 | 4 | Auto-extracted signal bit_err_disable from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_bit_err_disable_receiver`](#protocol_control_fsm_bit_err_disable_receiver) | 0xa38 | 4 | Auto-extracted signal bit_err_disable_receiver from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_sof_pulse_i`](#protocol_control_fsm_sof_pulse_i) | 0xa3c | 4 | Auto-extracted signal sof_pulse_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_compl_ctr_ena_i`](#protocol_control_fsm_compl_ctr_ena_i) | 0xa40 | 4 | Auto-extracted signal compl_ctr_ena_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_tick_state_reg`](#protocol_control_fsm_tick_state_reg) | 0xa44 | 4 | Auto-extracted signal tick_state_reg from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_br_shifted_i`](#protocol_control_fsm_br_shifted_i) | 0xa48 | 4 | Auto-extracted signal br_shifted_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_is_arbitration_i`](#protocol_control_fsm_is_arbitration_i) | 0xa4c | 4 | Auto-extracted signal is_arbitration_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_crc_spec_enable_i`](#protocol_control_fsm_crc_spec_enable_i) | 0xa50 | 4 | Auto-extracted signal crc_spec_enable_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_load_init_vect_i`](#protocol_control_fsm_load_init_vect_i) | 0xa54 | 4 | Auto-extracted signal load_init_vect_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_drv_bus_off_reset_q`](#protocol_control_fsm_drv_bus_off_reset_q) | 0xa58 | 4 | Auto-extracted signal drv_bus_off_reset_q from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_retr_ctr_clear_i`](#protocol_control_fsm_retr_ctr_clear_i) | 0xa5c | 4 | Auto-extracted signal retr_ctr_clear_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_retr_ctr_add_i`](#protocol_control_fsm_retr_ctr_add_i) | 0xa60 | 4 | Auto-extracted signal retr_ctr_add_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_decrement_rec_i`](#protocol_control_fsm_decrement_rec_i) | 0xa64 | 4 | Auto-extracted signal decrement_rec_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_retr_ctr_add_block`](#protocol_control_fsm_retr_ctr_add_block) | 0xa68 | 4 | Auto-extracted signal retr_ctr_add_block from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_retr_ctr_add_block_clr`](#protocol_control_fsm_retr_ctr_add_block_clr) | 0xa6c | 4 | Auto-extracted signal retr_ctr_add_block_clr from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_block_txtb_unlock`](#protocol_control_fsm_block_txtb_unlock) | 0xa70 | 4 | Auto-extracted signal block_txtb_unlock from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_tx_frame_no_sof_d`](#protocol_control_fsm_tx_frame_no_sof_d) | 0xa74 | 4 | Auto-extracted signal tx_frame_no_sof_d from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_tx_frame_no_sof_q`](#protocol_control_fsm_tx_frame_no_sof_q) | 0xa78 | 4 | Auto-extracted signal tx_frame_no_sof_q from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_ctrl_signal_upd`](#protocol_control_fsm_ctrl_signal_upd) | 0xa7c | 4 | Auto-extracted signal ctrl_signal_upd from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_clr_bus_off_rst_flg`](#protocol_control_fsm_clr_bus_off_rst_flg) | 0xa80 | 4 | Auto-extracted signal clr_bus_off_rst_flg from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_pex_on_fdf_enable`](#protocol_control_fsm_pex_on_fdf_enable) | 0xa84 | 4 | Auto-extracted signal pex_on_fdf_enable from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_pex_on_res_enable`](#protocol_control_fsm_pex_on_res_enable) | 0xa88 | 4 | Auto-extracted signal pex_on_res_enable from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_rx_data_nbs_prev`](#protocol_control_fsm_rx_data_nbs_prev) | 0xa8c | 4 | Auto-extracted signal rx_data_nbs_prev from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_pexs_set`](#protocol_control_fsm_pexs_set) | 0xa90 | 4 | Auto-extracted signal pexs_set from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_tran_frame_type_i`](#protocol_control_fsm_tran_frame_type_i) | 0xa94 | 4 | Auto-extracted signal tran_frame_type_i from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_txtb_clk_en_d`](#protocol_control_fsm_txtb_clk_en_d) | 0xa98 | 4 | Auto-extracted signal txtb_clk_en_d from protocol_control_fsm.vhd | +| can_bus.[`protocol_control_fsm_txtb_clk_en_q`](#protocol_control_fsm_txtb_clk_en_q) | 0xa9c | 4 | Auto-extracted signal txtb_clk_en_q from protocol_control_fsm.vhd | +| can_bus.[`reintegration_counter_reinteg_ctr_ce`](#reintegration_counter_reinteg_ctr_ce) | 0xaa0 | 4 | Auto-extracted signal reinteg_ctr_ce from reintegration_counter.vhd | +| can_bus.[`retransmitt_counter_retr_ctr_ce`](#retransmitt_counter_retr_ctr_ce) | 0xaa4 | 4 | Auto-extracted signal retr_ctr_ce from retransmitt_counter.vhd | +| can_bus.[`rst_sync_rff`](#rst_sync_rff) | 0xaa8 | 4 | Auto-extracted signal rff from rst_sync.vhd | +| can_bus.[`rx_buffer_drv_erase_rx`](#rx_buffer_drv_erase_rx) | 0xaac | 4 | Auto-extracted signal drv_erase_rx from rx_buffer.vhd | +| can_bus.[`rx_buffer_drv_read_start`](#rx_buffer_drv_read_start) | 0xab0 | 4 | Auto-extracted signal drv_read_start from rx_buffer.vhd | +| can_bus.[`rx_buffer_drv_clr_ovr`](#rx_buffer_drv_clr_ovr) | 0xab4 | 4 | Auto-extracted signal drv_clr_ovr from rx_buffer.vhd | +| can_bus.[`rx_buffer_drv_rtsopt`](#rx_buffer_drv_rtsopt) | 0xab8 | 4 | Auto-extracted signal drv_rtsopt from rx_buffer.vhd | +| can_bus.[`rx_buffer_read_pointer`](#rx_buffer_read_pointer) | 0xabc | 4 | Auto-extracted signal read_pointer from rx_buffer.vhd | +| can_bus.[`rx_buffer_read_pointer_inc_1`](#rx_buffer_read_pointer_inc_1) | 0xac0 | 4 | Auto-extracted signal read_pointer_inc_1 from rx_buffer.vhd | +| can_bus.[`rx_buffer_write_pointer`](#rx_buffer_write_pointer) | 0xac4 | 4 | Auto-extracted signal write_pointer from rx_buffer.vhd | +| can_bus.[`rx_buffer_write_pointer_raw`](#rx_buffer_write_pointer_raw) | 0xac8 | 4 | Auto-extracted signal write_pointer_raw from rx_buffer.vhd | +| can_bus.[`rx_buffer_write_pointer_ts`](#rx_buffer_write_pointer_ts) | 0xacc | 4 | Auto-extracted signal write_pointer_ts from rx_buffer.vhd | +| can_bus.[`rx_buffer_rx_mem_free_i`](#rx_buffer_rx_mem_free_i) | 0xad0 | 4 | Auto-extracted signal rx_mem_free_i from rx_buffer.vhd | +| can_bus.[`rx_buffer_memory_write_data`](#rx_buffer_memory_write_data) | 0xad4 | 4 | Auto-extracted signal memory_write_data from rx_buffer.vhd | +| can_bus.[`rx_buffer_data_overrun_flg`](#rx_buffer_data_overrun_flg) | 0xad8 | 4 | Auto-extracted signal data_overrun_flg from rx_buffer.vhd | +| can_bus.[`rx_buffer_data_overrun_i`](#rx_buffer_data_overrun_i) | 0xadc | 4 | Auto-extracted signal data_overrun_i from rx_buffer.vhd | +| can_bus.[`rx_buffer_overrun_condition`](#rx_buffer_overrun_condition) | 0xae0 | 4 | Auto-extracted signal overrun_condition from rx_buffer.vhd | +| can_bus.[`rx_buffer_rx_empty_i`](#rx_buffer_rx_empty_i) | 0xae4 | 4 | Auto-extracted signal rx_empty_i from rx_buffer.vhd | +| can_bus.[`rx_buffer_is_free_word`](#rx_buffer_is_free_word) | 0xae8 | 4 | Auto-extracted signal is_free_word from rx_buffer.vhd | +| can_bus.[`rx_buffer_commit_rx_frame`](#rx_buffer_commit_rx_frame) | 0xaec | 4 | Auto-extracted signal commit_rx_frame from rx_buffer.vhd | +| can_bus.[`rx_buffer_commit_overrun_abort`](#rx_buffer_commit_overrun_abort) | 0xaf0 | 4 | Auto-extracted signal commit_overrun_abort from rx_buffer.vhd | +| can_bus.[`rx_buffer_read_increment`](#rx_buffer_read_increment) | 0xaf4 | 4 | Auto-extracted signal read_increment from rx_buffer.vhd | +| can_bus.[`rx_buffer_write_raw_OK`](#rx_buffer_write_raw_ok) | 0xaf8 | 4 | Auto-extracted signal write_raw_OK from rx_buffer.vhd | +| can_bus.[`rx_buffer_write_raw_intent`](#rx_buffer_write_raw_intent) | 0xafc | 4 | Auto-extracted signal write_raw_intent from rx_buffer.vhd | +| can_bus.[`rx_buffer_write_ts`](#rx_buffer_write_ts) | 0xb00 | 4 | Auto-extracted signal write_ts from rx_buffer.vhd | +| can_bus.[`rx_buffer_stored_ts`](#rx_buffer_stored_ts) | 0xb04 | 4 | Auto-extracted signal stored_ts from rx_buffer.vhd | +| can_bus.[`rx_buffer_data_selector`](#rx_buffer_data_selector) | 0xb08 | 4 | Auto-extracted signal data_selector from rx_buffer.vhd | +| can_bus.[`rx_buffer_store_ts_wr_ptr`](#rx_buffer_store_ts_wr_ptr) | 0xb0c | 4 | Auto-extracted signal store_ts_wr_ptr from rx_buffer.vhd | +| can_bus.[`rx_buffer_inc_ts_wr_ptr`](#rx_buffer_inc_ts_wr_ptr) | 0xb10 | 4 | Auto-extracted signal inc_ts_wr_ptr from rx_buffer.vhd | +| can_bus.[`rx_buffer_reset_overrun_flag`](#rx_buffer_reset_overrun_flag) | 0xb14 | 4 | Auto-extracted signal reset_overrun_flag from rx_buffer.vhd | +| can_bus.[`rx_buffer_frame_form_w`](#rx_buffer_frame_form_w) | 0xb18 | 4 | Auto-extracted signal frame_form_w from rx_buffer.vhd | +| can_bus.[`rx_buffer_timestamp_capture`](#rx_buffer_timestamp_capture) | 0xb1c | 4 | Auto-extracted signal timestamp_capture from rx_buffer.vhd | +| can_bus.[`rx_buffer_timestamp_capture_ce`](#rx_buffer_timestamp_capture_ce) | 0xb20 | 4 | Auto-extracted signal timestamp_capture_ce from rx_buffer.vhd | +| can_bus.[`rx_buffer_RAM_write`](#rx_buffer_ram_write) | 0xb24 | 4 | Auto-extracted signal RAM_write from rx_buffer.vhd | +| can_bus.[`rx_buffer_RAM_data_out`](#rx_buffer_ram_data_out) | 0xb28 | 4 | Auto-extracted signal RAM_data_out from rx_buffer.vhd | +| can_bus.[`rx_buffer_RAM_write_address`](#rx_buffer_ram_write_address) | 0xb2c | 4 | Auto-extracted signal RAM_write_address from rx_buffer.vhd | +| can_bus.[`rx_buffer_RAM_read_address`](#rx_buffer_ram_read_address) | 0xb30 | 4 | Auto-extracted signal RAM_read_address from rx_buffer.vhd | +| can_bus.[`rx_buffer_rx_buf_res_n_d`](#rx_buffer_rx_buf_res_n_d) | 0xb34 | 4 | Auto-extracted signal rx_buf_res_n_d from rx_buffer.vhd | +| can_bus.[`rx_buffer_rx_buf_res_n_q`](#rx_buffer_rx_buf_res_n_q) | 0xb38 | 4 | Auto-extracted signal rx_buf_res_n_q from rx_buffer.vhd | +| can_bus.[`rx_buffer_rx_buf_res_n_q_scan`](#rx_buffer_rx_buf_res_n_q_scan) | 0xb3c | 4 | Auto-extracted signal rx_buf_res_n_q_scan from rx_buffer.vhd | +| can_bus.[`rx_buffer_rx_buf_ram_clk_en`](#rx_buffer_rx_buf_ram_clk_en) | 0xb40 | 4 | Auto-extracted signal rx_buf_ram_clk_en from rx_buffer.vhd | +| can_bus.[`rx_buffer_clk_ram`](#rx_buffer_clk_ram) | 0xb44 | 4 | Auto-extracted signal clk_ram from rx_buffer.vhd | +| can_bus.[`rx_buffer_fsm_rx_fsm_ce`](#rx_buffer_fsm_rx_fsm_ce) | 0xb48 | 4 | Auto-extracted signal rx_fsm_ce from rx_buffer_fsm.vhd | +| can_bus.[`rx_buffer_fsm_cmd_join`](#rx_buffer_fsm_cmd_join) | 0xb4c | 4 | Auto-extracted signal cmd_join from rx_buffer_fsm.vhd | +| can_bus.[`rx_buffer_pointers_write_pointer_raw_ce`](#rx_buffer_pointers_write_pointer_raw_ce) | 0xb50 | 4 | Auto-extracted signal write_pointer_raw_ce from rx_buffer_pointers.vhd | +| can_bus.[`rx_buffer_pointers_write_pointer_ts_ce`](#rx_buffer_pointers_write_pointer_ts_ce) | 0xb54 | 4 | Auto-extracted signal write_pointer_ts_ce from rx_buffer_pointers.vhd | +| can_bus.[`rx_buffer_ram_port_a_address_i`](#rx_buffer_ram_port_a_address_i) | 0xb58 | 4 | Auto-extracted signal port_a_address_i from rx_buffer_ram.vhd | +| can_bus.[`rx_buffer_ram_port_a_write_i`](#rx_buffer_ram_port_a_write_i) | 0xb5c | 4 | Auto-extracted signal port_a_write_i from rx_buffer_ram.vhd | +| can_bus.[`rx_buffer_ram_port_a_data_in_i`](#rx_buffer_ram_port_a_data_in_i) | 0xb60 | 4 | Auto-extracted signal port_a_data_in_i from rx_buffer_ram.vhd | +| can_bus.[`rx_buffer_ram_port_b_address_i`](#rx_buffer_ram_port_b_address_i) | 0xb64 | 4 | Auto-extracted signal port_b_address_i from rx_buffer_ram.vhd | +| can_bus.[`rx_buffer_ram_port_b_data_out_i`](#rx_buffer_ram_port_b_data_out_i) | 0xb68 | 4 | Auto-extracted signal port_b_data_out_i from rx_buffer_ram.vhd | +| can_bus.[`rx_buffer_ram_tst_ena`](#rx_buffer_ram_tst_ena) | 0xb6c | 4 | Auto-extracted signal tst_ena from rx_buffer_ram.vhd | +| can_bus.[`rx_buffer_ram_tst_addr`](#rx_buffer_ram_tst_addr) | 0xb70 | 4 | Auto-extracted signal tst_addr from rx_buffer_ram.vhd | +| can_bus.[`rx_shift_reg_res_n_i_d`](#rx_shift_reg_res_n_i_d) | 0xb74 | 4 | Auto-extracted signal res_n_i_d from rx_shift_reg.vhd | +| can_bus.[`rx_shift_reg_res_n_i_q`](#rx_shift_reg_res_n_i_q) | 0xb78 | 4 | Auto-extracted signal res_n_i_q from rx_shift_reg.vhd | +| can_bus.[`rx_shift_reg_res_n_i_q_scan`](#rx_shift_reg_res_n_i_q_scan) | 0xb7c | 4 | Auto-extracted signal res_n_i_q_scan from rx_shift_reg.vhd | +| can_bus.[`rx_shift_reg_rx_shift_reg_q`](#rx_shift_reg_rx_shift_reg_q) | 0xb80 | 4 | Auto-extracted signal rx_shift_reg_q from rx_shift_reg.vhd | +| can_bus.[`rx_shift_reg_rx_shift_cmd`](#rx_shift_reg_rx_shift_cmd) | 0xb84 | 4 | Auto-extracted signal rx_shift_cmd from rx_shift_reg.vhd | +| can_bus.[`rx_shift_reg_rx_shift_in_sel_demuxed`](#rx_shift_reg_rx_shift_in_sel_demuxed) | 0xb88 | 4 | Auto-extracted signal rx_shift_in_sel_demuxed from rx_shift_reg.vhd | +| can_bus.[`rx_shift_reg_rec_is_rtr_i`](#rx_shift_reg_rec_is_rtr_i) | 0xb8c | 4 | Auto-extracted signal rec_is_rtr_i from rx_shift_reg.vhd | +| can_bus.[`rx_shift_reg_rec_frame_type_i`](#rx_shift_reg_rec_frame_type_i) | 0xb90 | 4 | Auto-extracted signal rec_frame_type_i from rx_shift_reg.vhd | +| can_bus.[`sample_mux_sample`](#sample_mux_sample) | 0xb94 | 4 | Auto-extracted signal sample from sample_mux.vhd | +| can_bus.[`sample_mux_prev_sample_d`](#sample_mux_prev_sample_d) | 0xb98 | 4 | Auto-extracted signal prev_sample_d from sample_mux.vhd | +| can_bus.[`sample_mux_prev_sample_q`](#sample_mux_prev_sample_q) | 0xb9c | 4 | Auto-extracted signal prev_sample_q from sample_mux.vhd | +| can_bus.[`segment_end_detector_req_input`](#segment_end_detector_req_input) | 0xba0 | 4 | Auto-extracted signal req_input from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_segm_end_req_capt_d`](#segment_end_detector_segm_end_req_capt_d) | 0xba4 | 4 | Auto-extracted signal segm_end_req_capt_d from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_segm_end_req_capt_q`](#segment_end_detector_segm_end_req_capt_q) | 0xba8 | 4 | Auto-extracted signal segm_end_req_capt_q from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_segm_end_req_capt_ce`](#segment_end_detector_segm_end_req_capt_ce) | 0xbac | 4 | Auto-extracted signal segm_end_req_capt_ce from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_segm_end_req_capt_clr`](#segment_end_detector_segm_end_req_capt_clr) | 0xbb0 | 4 | Auto-extracted signal segm_end_req_capt_clr from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_segm_end_req_capt_dq`](#segment_end_detector_segm_end_req_capt_dq) | 0xbb4 | 4 | Auto-extracted signal segm_end_req_capt_dq from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_segm_end_nbt_valid`](#segment_end_detector_segm_end_nbt_valid) | 0xbb8 | 4 | Auto-extracted signal segm_end_nbt_valid from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_segm_end_dbt_valid`](#segment_end_detector_segm_end_dbt_valid) | 0xbbc | 4 | Auto-extracted signal segm_end_dbt_valid from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_segm_end_nbt_dbt_valid`](#segment_end_detector_segm_end_nbt_dbt_valid) | 0xbc0 | 4 | Auto-extracted signal segm_end_nbt_dbt_valid from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_tseg1_end_req_valid`](#segment_end_detector_tseg1_end_req_valid) | 0xbc4 | 4 | Auto-extracted signal tseg1_end_req_valid from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_tseg2_end_req_valid`](#segment_end_detector_tseg2_end_req_valid) | 0xbc8 | 4 | Auto-extracted signal tseg2_end_req_valid from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_h_sync_valid_i`](#segment_end_detector_h_sync_valid_i) | 0xbcc | 4 | Auto-extracted signal h_sync_valid_i from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_segment_end_i`](#segment_end_detector_segment_end_i) | 0xbd0 | 4 | Auto-extracted signal segment_end_i from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_nbt_tq_active`](#segment_end_detector_nbt_tq_active) | 0xbd4 | 4 | Auto-extracted signal nbt_tq_active from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_dbt_tq_active`](#segment_end_detector_dbt_tq_active) | 0xbd8 | 4 | Auto-extracted signal dbt_tq_active from segment_end_detector.vhd | +| can_bus.[`segment_end_detector_bt_ctr_clear_i`](#segment_end_detector_bt_ctr_clear_i) | 0xbdc | 4 | Auto-extracted signal bt_ctr_clear_i from segment_end_detector.vhd | +| can_bus.[`shift_reg_shift_regs`](#shift_reg_shift_regs) | 0xbe0 | 4 | Auto-extracted signal shift_regs from shift_reg.vhd | +| can_bus.[`shift_reg_next_shift_reg_val`](#shift_reg_next_shift_reg_val) | 0xbe4 | 4 | Auto-extracted signal next_shift_reg_val from shift_reg.vhd | +| can_bus.[`shift_reg_byte_shift_reg_in`](#shift_reg_byte_shift_reg_in) | 0xbe8 | 4 | Auto-extracted signal shift_reg_in from shift_reg_byte.vhd | +| can_bus.[`shift_reg_preload_shift_regs`](#shift_reg_preload_shift_regs) | 0xbec | 4 | Auto-extracted signal shift_regs from shift_reg_preload.vhd | +| can_bus.[`shift_reg_preload_next_shift_reg_val`](#shift_reg_preload_next_shift_reg_val) | 0xbf0 | 4 | Auto-extracted signal next_shift_reg_val from shift_reg_preload.vhd | +| can_bus.[`sig_sync_rff`](#sig_sync_rff) | 0xbf4 | 4 | Auto-extracted signal rff from sig_sync.vhd | +| can_bus.[`ssp_generator_btmc_d`](#ssp_generator_btmc_d) | 0xbf8 | 4 | Auto-extracted signal btmc_d from ssp_generator.vhd | +| can_bus.[`ssp_generator_btmc_q`](#ssp_generator_btmc_q) | 0xbfc | 4 | Auto-extracted signal btmc_q from ssp_generator.vhd | +| can_bus.[`ssp_generator_btmc_add`](#ssp_generator_btmc_add) | 0xc00 | 4 | Auto-extracted signal btmc_add from ssp_generator.vhd | +| can_bus.[`ssp_generator_btmc_ce`](#ssp_generator_btmc_ce) | 0xc04 | 4 | Auto-extracted signal btmc_ce from ssp_generator.vhd | +| can_bus.[`ssp_generator_btmc_meas_running_d`](#ssp_generator_btmc_meas_running_d) | 0xc08 | 4 | Auto-extracted signal btmc_meas_running_d from ssp_generator.vhd | +| can_bus.[`ssp_generator_btmc_meas_running_q`](#ssp_generator_btmc_meas_running_q) | 0xc0c | 4 | Auto-extracted signal btmc_meas_running_q from ssp_generator.vhd | +| can_bus.[`ssp_generator_sspc_d`](#ssp_generator_sspc_d) | 0xc10 | 4 | Auto-extracted signal sspc_d from ssp_generator.vhd | +| can_bus.[`ssp_generator_sspc_q`](#ssp_generator_sspc_q) | 0xc14 | 4 | Auto-extracted signal sspc_q from ssp_generator.vhd | +| can_bus.[`ssp_generator_sspc_ce`](#ssp_generator_sspc_ce) | 0xc18 | 4 | Auto-extracted signal sspc_ce from ssp_generator.vhd | +| can_bus.[`ssp_generator_sspc_expired`](#ssp_generator_sspc_expired) | 0xc1c | 4 | Auto-extracted signal sspc_expired from ssp_generator.vhd | +| can_bus.[`ssp_generator_sspc_threshold`](#ssp_generator_sspc_threshold) | 0xc20 | 4 | Auto-extracted signal sspc_threshold from ssp_generator.vhd | +| can_bus.[`ssp_generator_sspc_add`](#ssp_generator_sspc_add) | 0xc24 | 4 | Auto-extracted signal sspc_add from ssp_generator.vhd | +| can_bus.[`ssp_generator_first_ssp_d`](#ssp_generator_first_ssp_d) | 0xc28 | 4 | Auto-extracted signal first_ssp_d from ssp_generator.vhd | +| can_bus.[`ssp_generator_first_ssp_q`](#ssp_generator_first_ssp_q) | 0xc2c | 4 | Auto-extracted signal first_ssp_q from ssp_generator.vhd | +| can_bus.[`ssp_generator_sspc_ena_d`](#ssp_generator_sspc_ena_d) | 0xc30 | 4 | Auto-extracted signal sspc_ena_d from ssp_generator.vhd | +| can_bus.[`ssp_generator_sspc_ena_q`](#ssp_generator_sspc_ena_q) | 0xc34 | 4 | Auto-extracted signal sspc_ena_q from ssp_generator.vhd | +| can_bus.[`ssp_generator_ssp_delay_padded`](#ssp_generator_ssp_delay_padded) | 0xc38 | 4 | Auto-extracted signal ssp_delay_padded from ssp_generator.vhd | +| can_bus.[`synchronisation_checker_resync_edge`](#synchronisation_checker_resync_edge) | 0xc3c | 4 | Auto-extracted signal resync_edge from synchronisation_checker.vhd | +| can_bus.[`synchronisation_checker_h_sync_edge`](#synchronisation_checker_h_sync_edge) | 0xc40 | 4 | Auto-extracted signal h_sync_edge from synchronisation_checker.vhd | +| can_bus.[`synchronisation_checker_h_or_re_sync_edge`](#synchronisation_checker_h_or_re_sync_edge) | 0xc44 | 4 | Auto-extracted signal h_or_re_sync_edge from synchronisation_checker.vhd | +| can_bus.[`synchronisation_checker_sync_flag`](#synchronisation_checker_sync_flag) | 0xc48 | 4 | Auto-extracted signal sync_flag from synchronisation_checker.vhd | +| can_bus.[`synchronisation_checker_sync_flag_ce`](#synchronisation_checker_sync_flag_ce) | 0xc4c | 4 | Auto-extracted signal sync_flag_ce from synchronisation_checker.vhd | +| can_bus.[`synchronisation_checker_sync_flag_nxt`](#synchronisation_checker_sync_flag_nxt) | 0xc50 | 4 | Auto-extracted signal sync_flag_nxt from synchronisation_checker.vhd | +| can_bus.[`test_registers_reg_map_reg_sel`](#test_registers_reg_map_reg_sel) | 0xc54 | 4 | Auto-extracted signal reg_sel from test_registers_reg_map.vhd | +| can_bus.[`test_registers_reg_map_read_data_mux_in`](#test_registers_reg_map_read_data_mux_in) | 0xc58 | 4 | Auto-extracted signal read_data_mux_in from test_registers_reg_map.vhd | +| can_bus.[`test_registers_reg_map_read_data_mask_n`](#test_registers_reg_map_read_data_mask_n) | 0xc5c | 4 | Auto-extracted signal read_data_mask_n from test_registers_reg_map.vhd | +| can_bus.[`test_registers_reg_map_read_mux_ena`](#test_registers_reg_map_read_mux_ena) | 0xc60 | 4 | Auto-extracted signal read_mux_ena from test_registers_reg_map.vhd | +| can_bus.[`trigger_generator_rx_trig_req_q`](#trigger_generator_rx_trig_req_q) | 0xc64 | 4 | Auto-extracted signal rx_trig_req_q from trigger_generator.vhd | +| can_bus.[`trigger_generator_tx_trig_req_flag_d`](#trigger_generator_tx_trig_req_flag_d) | 0xc68 | 4 | Auto-extracted signal tx_trig_req_flag_d from trigger_generator.vhd | +| can_bus.[`trigger_generator_tx_trig_req_flag_q`](#trigger_generator_tx_trig_req_flag_q) | 0xc6c | 4 | Auto-extracted signal tx_trig_req_flag_q from trigger_generator.vhd | +| can_bus.[`trigger_generator_tx_trig_req_flag_dq`](#trigger_generator_tx_trig_req_flag_dq) | 0xc70 | 4 | Auto-extracted signal tx_trig_req_flag_dq from trigger_generator.vhd | +| can_bus.[`trigger_mux_tx_trigger_q`](#trigger_mux_tx_trigger_q) | 0xc74 | 4 | Auto-extracted signal tx_trigger_q from trigger_mux.vhd | +| can_bus.[`trv_delay_meas_trv_meas_progress_d`](#trv_delay_meas_trv_meas_progress_d) | 0xc78 | 4 | Auto-extracted signal trv_meas_progress_d from trv_delay_meas.vhd | +| can_bus.[`trv_delay_meas_trv_meas_progress_q`](#trv_delay_meas_trv_meas_progress_q) | 0xc7c | 4 | Auto-extracted signal trv_meas_progress_q from trv_delay_meas.vhd | +| can_bus.[`trv_delay_meas_trv_meas_progress_del`](#trv_delay_meas_trv_meas_progress_del) | 0xc80 | 4 | Auto-extracted signal trv_meas_progress_del from trv_delay_meas.vhd | +| can_bus.[`trv_delay_meas_trv_delay_ctr_q`](#trv_delay_meas_trv_delay_ctr_q) | 0xc84 | 4 | Auto-extracted signal trv_delay_ctr_q from trv_delay_meas.vhd | +| can_bus.[`trv_delay_meas_trv_delay_ctr_d`](#trv_delay_meas_trv_delay_ctr_d) | 0xc88 | 4 | Auto-extracted signal trv_delay_ctr_d from trv_delay_meas.vhd | +| can_bus.[`trv_delay_meas_trv_delay_ctr_add`](#trv_delay_meas_trv_delay_ctr_add) | 0xc8c | 4 | Auto-extracted signal trv_delay_ctr_add from trv_delay_meas.vhd | +| can_bus.[`trv_delay_meas_trv_delay_ctr_q_padded`](#trv_delay_meas_trv_delay_ctr_q_padded) | 0xc90 | 4 | Auto-extracted signal trv_delay_ctr_q_padded from trv_delay_meas.vhd | +| can_bus.[`trv_delay_meas_trv_delay_ctr_rst_d`](#trv_delay_meas_trv_delay_ctr_rst_d) | 0xc94 | 4 | Auto-extracted signal trv_delay_ctr_rst_d from trv_delay_meas.vhd | +| can_bus.[`trv_delay_meas_trv_delay_ctr_rst_q`](#trv_delay_meas_trv_delay_ctr_rst_q) | 0xc98 | 4 | Auto-extracted signal trv_delay_ctr_rst_q from trv_delay_meas.vhd | +| can_bus.[`trv_delay_meas_trv_delay_ctr_rst_q_scan`](#trv_delay_meas_trv_delay_ctr_rst_q_scan) | 0xc9c | 4 | Auto-extracted signal trv_delay_ctr_rst_q_scan from trv_delay_meas.vhd | +| can_bus.[`trv_delay_meas_ssp_shadow_ce`](#trv_delay_meas_ssp_shadow_ce) | 0xca0 | 4 | Auto-extracted signal ssp_shadow_ce from trv_delay_meas.vhd | +| can_bus.[`trv_delay_meas_ssp_delay_raw`](#trv_delay_meas_ssp_delay_raw) | 0xca4 | 4 | Auto-extracted signal ssp_delay_raw from trv_delay_meas.vhd | +| can_bus.[`trv_delay_meas_ssp_delay_saturated`](#trv_delay_meas_ssp_delay_saturated) | 0xca8 | 4 | Auto-extracted signal ssp_delay_saturated from trv_delay_meas.vhd | +| can_bus.[`trv_delay_meas_trv_delay_sum`](#trv_delay_meas_trv_delay_sum) | 0xcac | 4 | Auto-extracted signal trv_delay_sum from trv_delay_meas.vhd | +| can_bus.[`tx_arbitrator_select_buf_avail`](#tx_arbitrator_select_buf_avail) | 0xcb0 | 4 | Auto-extracted signal select_buf_avail from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_txtb_selected_input`](#tx_arbitrator_txtb_selected_input) | 0xcb4 | 4 | Auto-extracted signal txtb_selected_input from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_txtb_timestamp`](#tx_arbitrator_txtb_timestamp) | 0xcb8 | 4 | Auto-extracted signal txtb_timestamp from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_timestamp_valid`](#tx_arbitrator_timestamp_valid) | 0xcbc | 4 | Auto-extracted signal timestamp_valid from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_select_index_changed`](#tx_arbitrator_select_index_changed) | 0xcc0 | 4 | Auto-extracted signal select_index_changed from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_validated_buffer`](#tx_arbitrator_validated_buffer) | 0xcc4 | 4 | Auto-extracted signal validated_buffer from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_ts_low_internal`](#tx_arbitrator_ts_low_internal) | 0xcc8 | 4 | Auto-extracted signal ts_low_internal from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_tran_dlc_dbl_buf`](#tx_arbitrator_tran_dlc_dbl_buf) | 0xccc | 4 | Auto-extracted signal tran_dlc_dbl_buf from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_tran_is_rtr_dbl_buf`](#tx_arbitrator_tran_is_rtr_dbl_buf) | 0xcd0 | 4 | Auto-extracted signal tran_is_rtr_dbl_buf from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_tran_ident_type_dbl_buf`](#tx_arbitrator_tran_ident_type_dbl_buf) | 0xcd4 | 4 | Auto-extracted signal tran_ident_type_dbl_buf from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_tran_frame_type_dbl_buf`](#tx_arbitrator_tran_frame_type_dbl_buf) | 0xcd8 | 4 | Auto-extracted signal tran_frame_type_dbl_buf from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_tran_brs_dbl_buf`](#tx_arbitrator_tran_brs_dbl_buf) | 0xcdc | 4 | Auto-extracted signal tran_brs_dbl_buf from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_tran_dlc_com`](#tx_arbitrator_tran_dlc_com) | 0xce0 | 4 | Auto-extracted signal tran_dlc_com from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_tran_is_rtr_com`](#tx_arbitrator_tran_is_rtr_com) | 0xce4 | 4 | Auto-extracted signal tran_is_rtr_com from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_tran_ident_type_com`](#tx_arbitrator_tran_ident_type_com) | 0xce8 | 4 | Auto-extracted signal tran_ident_type_com from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_tran_frame_type_com`](#tx_arbitrator_tran_frame_type_com) | 0xcec | 4 | Auto-extracted signal tran_frame_type_com from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_tran_brs_com`](#tx_arbitrator_tran_brs_com) | 0xcf0 | 4 | Auto-extracted signal tran_brs_com from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_tran_frame_valid_com`](#tx_arbitrator_tran_frame_valid_com) | 0xcf4 | 4 | Auto-extracted signal tran_frame_valid_com from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_tran_identifier_com`](#tx_arbitrator_tran_identifier_com) | 0xcf8 | 4 | Auto-extracted signal tran_identifier_com from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_load_ts_lw_addr`](#tx_arbitrator_load_ts_lw_addr) | 0xcfc | 4 | Auto-extracted signal load_ts_lw_addr from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_load_ts_uw_addr`](#tx_arbitrator_load_ts_uw_addr) | 0xd00 | 4 | Auto-extracted signal load_ts_uw_addr from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_load_ffmt_w_addr`](#tx_arbitrator_load_ffmt_w_addr) | 0xd04 | 4 | Auto-extracted signal load_ffmt_w_addr from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_load_ident_w_addr`](#tx_arbitrator_load_ident_w_addr) | 0xd08 | 4 | Auto-extracted signal load_ident_w_addr from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_store_ts_l_w`](#tx_arbitrator_store_ts_l_w) | 0xd0c | 4 | Auto-extracted signal store_ts_l_w from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_store_md_w`](#tx_arbitrator_store_md_w) | 0xd10 | 4 | Auto-extracted signal store_md_w from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_store_ident_w`](#tx_arbitrator_store_ident_w) | 0xd14 | 4 | Auto-extracted signal store_ident_w from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_buffer_md_w`](#tx_arbitrator_buffer_md_w) | 0xd18 | 4 | Auto-extracted signal buffer_md_w from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_store_last_txtb_index`](#tx_arbitrator_store_last_txtb_index) | 0xd1c | 4 | Auto-extracted signal store_last_txtb_index from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_frame_valid_com_set`](#tx_arbitrator_frame_valid_com_set) | 0xd20 | 4 | Auto-extracted signal frame_valid_com_set from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_frame_valid_com_clear`](#tx_arbitrator_frame_valid_com_clear) | 0xd24 | 4 | Auto-extracted signal frame_valid_com_clear from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_tx_arb_locked`](#tx_arbitrator_tx_arb_locked) | 0xd28 | 4 | Auto-extracted signal tx_arb_locked from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_txtb_meta_clk_en`](#tx_arbitrator_txtb_meta_clk_en) | 0xd2c | 4 | Auto-extracted signal txtb_meta_clk_en from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_drv_tttm_ena`](#tx_arbitrator_drv_tttm_ena) | 0xd30 | 4 | Auto-extracted signal drv_tttm_ena from tx_arbitrator.vhd | +| can_bus.[`tx_arbitrator_fsm_tx_arb_fsm_ce`](#tx_arbitrator_fsm_tx_arb_fsm_ce) | 0xd34 | 4 | Auto-extracted signal tx_arb_fsm_ce from tx_arbitrator_fsm.vhd | +| can_bus.[`tx_arbitrator_fsm_fsm_wait_state_d`](#tx_arbitrator_fsm_fsm_wait_state_d) | 0xd38 | 4 | Auto-extracted signal fsm_wait_state_d from tx_arbitrator_fsm.vhd | +| can_bus.[`tx_arbitrator_fsm_fsm_wait_state_q`](#tx_arbitrator_fsm_fsm_wait_state_q) | 0xd3c | 4 | Auto-extracted signal fsm_wait_state_q from tx_arbitrator_fsm.vhd | +| can_bus.[`tx_data_cache_tx_cache_mem`](#tx_data_cache_tx_cache_mem) | 0xd40 | 4 | Auto-extracted signal tx_cache_mem from tx_data_cache.vhd | +| can_bus.[`tx_shift_reg_tx_sr_output`](#tx_shift_reg_tx_sr_output) | 0xd44 | 4 | Auto-extracted signal tx_sr_output from tx_shift_reg.vhd | +| can_bus.[`tx_shift_reg_tx_sr_ce`](#tx_shift_reg_tx_sr_ce) | 0xd48 | 4 | Auto-extracted signal tx_sr_ce from tx_shift_reg.vhd | +| can_bus.[`tx_shift_reg_tx_sr_pload`](#tx_shift_reg_tx_sr_pload) | 0xd4c | 4 | Auto-extracted signal tx_sr_pload from tx_shift_reg.vhd | +| can_bus.[`tx_shift_reg_tx_sr_pload_val`](#tx_shift_reg_tx_sr_pload_val) | 0xd50 | 4 | Auto-extracted signal tx_sr_pload_val from tx_shift_reg.vhd | +| can_bus.[`tx_shift_reg_tx_base_id`](#tx_shift_reg_tx_base_id) | 0xd54 | 4 | Auto-extracted signal tx_base_id from tx_shift_reg.vhd | +| can_bus.[`tx_shift_reg_tx_ext_id`](#tx_shift_reg_tx_ext_id) | 0xd58 | 4 | Auto-extracted signal tx_ext_id from tx_shift_reg.vhd | +| can_bus.[`tx_shift_reg_tx_crc`](#tx_shift_reg_tx_crc) | 0xd5c | 4 | Auto-extracted signal tx_crc from tx_shift_reg.vhd | +| can_bus.[`tx_shift_reg_bst_ctr_grey`](#tx_shift_reg_bst_ctr_grey) | 0xd60 | 4 | Auto-extracted signal bst_ctr_grey from tx_shift_reg.vhd | +| can_bus.[`tx_shift_reg_bst_parity`](#tx_shift_reg_bst_parity) | 0xd64 | 4 | Auto-extracted signal bst_parity from tx_shift_reg.vhd | +| can_bus.[`tx_shift_reg_stuff_count`](#tx_shift_reg_stuff_count) | 0xd68 | 4 | Auto-extracted signal stuff_count from tx_shift_reg.vhd | +| can_bus.[`txt_buffer_txtb_user_accessible`](#txt_buffer_txtb_user_accessible) | 0xd6c | 4 | Auto-extracted signal txtb_user_accessible from txt_buffer.vhd | +| can_bus.[`txt_buffer_hw_cbs`](#txt_buffer_hw_cbs) | 0xd70 | 4 | Auto-extracted signal hw_cbs from txt_buffer.vhd | +| can_bus.[`txt_buffer_sw_cbs`](#txt_buffer_sw_cbs) | 0xd74 | 4 | Auto-extracted signal sw_cbs from txt_buffer.vhd | +| can_bus.[`txt_buffer_txtb_unmask_data_ram`](#txt_buffer_txtb_unmask_data_ram) | 0xd78 | 4 | Auto-extracted signal txtb_unmask_data_ram from txt_buffer.vhd | +| can_bus.[`txt_buffer_txtb_port_b_data_i`](#txt_buffer_txtb_port_b_data_i) | 0xd7c | 4 | Auto-extracted signal txtb_port_b_data_i from txt_buffer.vhd | +| can_bus.[`txt_buffer_ram_write`](#txt_buffer_ram_write) | 0xd80 | 4 | Auto-extracted signal ram_write from txt_buffer.vhd | +| can_bus.[`txt_buffer_ram_read_address`](#txt_buffer_ram_read_address) | 0xd84 | 4 | Auto-extracted signal ram_read_address from txt_buffer.vhd | +| can_bus.[`txt_buffer_txtb_ram_clk_en`](#txt_buffer_txtb_ram_clk_en) | 0xd88 | 4 | Auto-extracted signal txtb_ram_clk_en from txt_buffer.vhd | +| can_bus.[`txt_buffer_clk_ram`](#txt_buffer_clk_ram) | 0xd8c | 4 | Auto-extracted signal clk_ram from txt_buffer.vhd | +| can_bus.[`txt_buffer_fsm_abort_applied`](#txt_buffer_fsm_abort_applied) | 0xd90 | 4 | Auto-extracted signal abort_applied from txt_buffer_fsm.vhd | +| can_bus.[`txt_buffer_fsm_txt_fsm_ce`](#txt_buffer_fsm_txt_fsm_ce) | 0xd94 | 4 | Auto-extracted signal txt_fsm_ce from txt_buffer_fsm.vhd | +| can_bus.[`txt_buffer_fsm_go_to_failed`](#txt_buffer_fsm_go_to_failed) | 0xd98 | 4 | Auto-extracted signal go_to_failed from txt_buffer_fsm.vhd | +| can_bus.[`txt_buffer_fsm_transient_state`](#txt_buffer_fsm_transient_state) | 0xd9c | 4 | Auto-extracted signal transient_state from txt_buffer_fsm.vhd | +| can_bus.[`txt_buffer_ram_port_a_address_i`](#txt_buffer_ram_port_a_address_i) | 0xda0 | 4 | Auto-extracted signal port_a_address_i from txt_buffer_ram.vhd | +| can_bus.[`txt_buffer_ram_port_a_write_i`](#txt_buffer_ram_port_a_write_i) | 0xda4 | 4 | Auto-extracted signal port_a_write_i from txt_buffer_ram.vhd | +| can_bus.[`txt_buffer_ram_port_a_data_in_i`](#txt_buffer_ram_port_a_data_in_i) | 0xda8 | 4 | Auto-extracted signal port_a_data_in_i from txt_buffer_ram.vhd | +| can_bus.[`txt_buffer_ram_port_b_address_i`](#txt_buffer_ram_port_b_address_i) | 0xdac | 4 | Auto-extracted signal port_b_address_i from txt_buffer_ram.vhd | +| can_bus.[`txt_buffer_ram_port_b_data_out_i`](#txt_buffer_ram_port_b_data_out_i) | 0xdb0 | 4 | Auto-extracted signal port_b_data_out_i from txt_buffer_ram.vhd | +| can_bus.[`txt_buffer_ram_tst_ena`](#txt_buffer_ram_tst_ena) | 0xdb4 | 4 | Auto-extracted signal tst_ena from txt_buffer_ram.vhd | +| can_bus.[`txt_buffer_ram_tst_addr`](#txt_buffer_ram_tst_addr) | 0xdb8 | 4 | Auto-extracted signal tst_addr from txt_buffer_ram.vhd | +| can_bus.[`access_signaler_be_active`](#access_signaler_be_active) | 0xdbc | 4 | Auto-extracted signal be_active from access_signaler.vhd | +| can_bus.[`access_signaler_access_in`](#access_signaler_access_in) | 0xdc0 | 4 | Auto-extracted signal access_in from access_signaler.vhd | +| can_bus.[`access_signaler_access_active`](#access_signaler_access_active) | 0xdc4 | 4 | Auto-extracted signal access_active from access_signaler.vhd | +| can_bus.[`access_signaler_access_active_reg`](#access_signaler_access_active_reg) | 0xdc8 | 4 | Auto-extracted signal access_active_reg from access_signaler.vhd | +| can_bus.[`address_decoder_addr_dec_i`](#address_decoder_addr_dec_i) | 0xdcc | 4 | Auto-extracted signal addr_dec_i from address_decoder.vhd | +| can_bus.[`address_decoder_addr_dec_enabled_i`](#address_decoder_addr_dec_enabled_i) | 0xdd0 | 4 | Auto-extracted signal addr_dec_enabled_i from address_decoder.vhd | + +## ahb_ifc_hsel_valid +Auto-extracted signal hsel_valid from ahb_ifc.vhd +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ahb_ifc_write_acc_d +Auto-extracted signal write_acc_d from ahb_ifc.vhd +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ahb_ifc_write_acc_q +Auto-extracted signal write_acc_q from ahb_ifc.vhd +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ahb_ifc_haddr_q +Auto-extracted signal haddr_q from ahb_ifc.vhd +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ahb_ifc_h_ready_raw +Auto-extracted signal h_ready_raw from ahb_ifc.vhd +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ahb_ifc_sbe_d +Auto-extracted signal sbe_d from ahb_ifc.vhd +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ahb_ifc_sbe_q +Auto-extracted signal sbe_q from ahb_ifc.vhd +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ahb_ifc_swr_i +Auto-extracted signal swr_i from ahb_ifc.vhd +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ahb_ifc_srd_i +Auto-extracted signal srd_i from ahb_ifc.vhd +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_destuffing_discard_stuff_bit +Auto-extracted signal discard_stuff_bit from bit_destuffing.vhd +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_destuffing_non_fix_to_fix_chng +Auto-extracted signal non_fix_to_fix_chng from bit_destuffing.vhd +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_destuffing_stuff_lvl_reached +Auto-extracted signal stuff_lvl_reached from bit_destuffing.vhd +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_destuffing_stuff_rule_violate +Auto-extracted signal stuff_rule_violate from bit_destuffing.vhd +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_destuffing_enable_prev +Auto-extracted signal enable_prev from bit_destuffing.vhd +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_destuffing_fixed_prev_q +Auto-extracted signal fixed_prev_q from bit_destuffing.vhd +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_destuffing_fixed_prev_d +Auto-extracted signal fixed_prev_d from bit_destuffing.vhd +- Offset: `0x3c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_destuffing_same_bits_erase +Auto-extracted signal same_bits_erase from bit_destuffing.vhd +- Offset: `0x40` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_destuffing_destuffed_q +Auto-extracted signal destuffed_q from bit_destuffing.vhd +- Offset: `0x44` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_destuffing_destuffed_d +Auto-extracted signal destuffed_d from bit_destuffing.vhd +- Offset: `0x48` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_destuffing_stuff_err_q +Auto-extracted signal stuff_err_q from bit_destuffing.vhd +- Offset: `0x4c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_destuffing_stuff_err_d +Auto-extracted signal stuff_err_d from bit_destuffing.vhd +- Offset: `0x50` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_destuffing_prev_val_q +Auto-extracted signal prev_val_q from bit_destuffing.vhd +- Offset: `0x54` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_destuffing_prev_val_d +Auto-extracted signal prev_val_d from bit_destuffing.vhd +- Offset: `0x58` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_err_detector_bit_err_d +Auto-extracted signal bit_err_d from bit_err_detector.vhd +- Offset: `0x5c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_err_detector_bit_err_q +Auto-extracted signal bit_err_q from bit_err_detector.vhd +- Offset: `0x60` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_err_detector_bit_err_ssp_capt_d +Auto-extracted signal bit_err_ssp_capt_d from bit_err_detector.vhd +- Offset: `0x64` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_err_detector_bit_err_ssp_capt_q +Auto-extracted signal bit_err_ssp_capt_q from bit_err_detector.vhd +- Offset: `0x68` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_err_detector_bit_err_ssp_valid +Auto-extracted signal bit_err_ssp_valid from bit_err_detector.vhd +- Offset: `0x6c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_err_detector_bit_err_ssp_condition +Auto-extracted signal bit_err_ssp_condition from bit_err_detector.vhd +- Offset: `0x70` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_err_detector_bit_err_norm_valid +Auto-extracted signal bit_err_norm_valid from bit_err_detector.vhd +- Offset: `0x74` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_filter_masked_input +Auto-extracted signal masked_input from bit_filter.vhd +- Offset: `0x78` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_filter_masked_value +Auto-extracted signal masked_value from bit_filter.vhd +- Offset: `0x7c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_segment_meter_sel_tseg1 +Auto-extracted signal sel_tseg1 from bit_segment_meter.vhd +- Offset: `0x80` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_segment_meter_exp_seg_length_ce +Auto-extracted signal exp_seg_length_ce from bit_segment_meter.vhd +- Offset: `0x84` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_segment_meter_phase_err_mt_sjw +Auto-extracted signal phase_err_mt_sjw from bit_segment_meter.vhd +- Offset: `0x88` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_segment_meter_phase_err_eq_sjw +Auto-extracted signal phase_err_eq_sjw from bit_segment_meter.vhd +- Offset: `0x8c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_segment_meter_exit_ph2_immediate +Auto-extracted signal exit_ph2_immediate from bit_segment_meter.vhd +- Offset: `0x90` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_segment_meter_exit_segm_regular +Auto-extracted signal exit_segm_regular from bit_segment_meter.vhd +- Offset: `0x94` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_segment_meter_exit_segm_regular_tseg1 +Auto-extracted signal exit_segm_regular_tseg1 from bit_segment_meter.vhd +- Offset: `0x98` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_segment_meter_exit_segm_regular_tseg2 +Auto-extracted signal exit_segm_regular_tseg2 from bit_segment_meter.vhd +- Offset: `0x9c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_segment_meter_sjw_mt_zero +Auto-extracted signal sjw_mt_zero from bit_segment_meter.vhd +- Offset: `0xa0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_segment_meter_use_basic_segm_length +Auto-extracted signal use_basic_segm_length from bit_segment_meter.vhd +- Offset: `0xa4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_segment_meter_phase_err_sjw_by_one +Auto-extracted signal phase_err_sjw_by_one from bit_segment_meter.vhd +- Offset: `0xa8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_segment_meter_shorten_tseg1_after_tseg2 +Auto-extracted signal shorten_tseg1_after_tseg2 from bit_segment_meter.vhd +- Offset: `0xac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_stuffing_data_out_i +Auto-extracted signal data_out_i from bit_stuffing.vhd +- Offset: `0xb0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_stuffing_data_halt_q +Auto-extracted signal data_halt_q from bit_stuffing.vhd +- Offset: `0xb4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_stuffing_data_halt_d +Auto-extracted signal data_halt_d from bit_stuffing.vhd +- Offset: `0xb8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_stuffing_fixed_reg_q +Auto-extracted signal fixed_reg_q from bit_stuffing.vhd +- Offset: `0xbc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_stuffing_fixed_reg_d +Auto-extracted signal fixed_reg_d from bit_stuffing.vhd +- Offset: `0xc0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_stuffing_enable_prev +Auto-extracted signal enable_prev from bit_stuffing.vhd +- Offset: `0xc4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_stuffing_non_fix_to_fix_chng +Auto-extracted signal non_fix_to_fix_chng from bit_stuffing.vhd +- Offset: `0xc8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_stuffing_stuff_lvl_reached +Auto-extracted signal stuff_lvl_reached from bit_stuffing.vhd +- Offset: `0xcc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_stuffing_same_bits_rst_trig +Auto-extracted signal same_bits_rst_trig from bit_stuffing.vhd +- Offset: `0xd0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_stuffing_same_bits_rst +Auto-extracted signal same_bits_rst from bit_stuffing.vhd +- Offset: `0xd4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_stuffing_insert_stuff_bit +Auto-extracted signal insert_stuff_bit from bit_stuffing.vhd +- Offset: `0xd8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_stuffing_data_out_d_ena +Auto-extracted signal data_out_d_ena from bit_stuffing.vhd +- Offset: `0xdc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_stuffing_data_out_d +Auto-extracted signal data_out_d from bit_stuffing.vhd +- Offset: `0xe0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_stuffing_data_out_ce +Auto-extracted signal data_out_ce from bit_stuffing.vhd +- Offset: `0xe4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_drv_tq_nbt +Auto-extracted signal drv_tq_nbt from bit_time_cfg_capture.vhd +- Offset: `0xe8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_drv_prs_nbt +Auto-extracted signal drv_prs_nbt from bit_time_cfg_capture.vhd +- Offset: `0xec` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_drv_ph1_nbt +Auto-extracted signal drv_ph1_nbt from bit_time_cfg_capture.vhd +- Offset: `0xf0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_drv_ph2_nbt +Auto-extracted signal drv_ph2_nbt from bit_time_cfg_capture.vhd +- Offset: `0xf4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_drv_sjw_nbt +Auto-extracted signal drv_sjw_nbt from bit_time_cfg_capture.vhd +- Offset: `0xf8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_drv_tq_dbt +Auto-extracted signal drv_tq_dbt from bit_time_cfg_capture.vhd +- Offset: `0xfc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_drv_prs_dbt +Auto-extracted signal drv_prs_dbt from bit_time_cfg_capture.vhd +- Offset: `0x100` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_drv_ph1_dbt +Auto-extracted signal drv_ph1_dbt from bit_time_cfg_capture.vhd +- Offset: `0x104` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_drv_ph2_dbt +Auto-extracted signal drv_ph2_dbt from bit_time_cfg_capture.vhd +- Offset: `0x108` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_drv_sjw_dbt +Auto-extracted signal drv_sjw_dbt from bit_time_cfg_capture.vhd +- Offset: `0x10c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_tseg1_nbt_d +Auto-extracted signal tseg1_nbt_d from bit_time_cfg_capture.vhd +- Offset: `0x110` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_tseg1_dbt_d +Auto-extracted signal tseg1_dbt_d from bit_time_cfg_capture.vhd +- Offset: `0x114` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_drv_ena +Auto-extracted signal drv_ena from bit_time_cfg_capture.vhd +- Offset: `0x118` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_drv_ena_reg +Auto-extracted signal drv_ena_reg from bit_time_cfg_capture.vhd +- Offset: `0x11c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_drv_ena_reg_2 +Auto-extracted signal drv_ena_reg_2 from bit_time_cfg_capture.vhd +- Offset: `0x120` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_cfg_capture_capture +Auto-extracted signal capture from bit_time_cfg_capture.vhd +- Offset: `0x124` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_counters_tq_counter_d +Auto-extracted signal tq_counter_d from bit_time_counters.vhd +- Offset: `0x128` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_counters_tq_counter_q +Auto-extracted signal tq_counter_q from bit_time_counters.vhd +- Offset: `0x12c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_counters_tq_counter_ce +Auto-extracted signal tq_counter_ce from bit_time_counters.vhd +- Offset: `0x130` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_counters_tq_counter_allow +Auto-extracted signal tq_counter_allow from bit_time_counters.vhd +- Offset: `0x134` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_counters_tq_edge_i +Auto-extracted signal tq_edge_i from bit_time_counters.vhd +- Offset: `0x138` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_counters_segm_counter_d +Auto-extracted signal segm_counter_d from bit_time_counters.vhd +- Offset: `0x13c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_counters_segm_counter_q +Auto-extracted signal segm_counter_q from bit_time_counters.vhd +- Offset: `0x140` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_counters_segm_counter_ce +Auto-extracted signal segm_counter_ce from bit_time_counters.vhd +- Offset: `0x144` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bit_time_fsm_bt_fsm_ce +Auto-extracted signal bt_fsm_ce from bit_time_fsm.vhd +- Offset: `0x148` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_drv_ena +Auto-extracted signal drv_ena from bus_sampling.vhd +- Offset: `0x14c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_drv_ssp_offset +Auto-extracted signal drv_ssp_offset from bus_sampling.vhd +- Offset: `0x150` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_drv_ssp_delay_select +Auto-extracted signal drv_ssp_delay_select from bus_sampling.vhd +- Offset: `0x154` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_data_rx_synced +Auto-extracted signal data_rx_synced from bus_sampling.vhd +- Offset: `0x158` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_prev_Sample +Auto-extracted signal prev_Sample from bus_sampling.vhd +- Offset: `0x15c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_sample_sec_i +Auto-extracted signal sample_sec_i from bus_sampling.vhd +- Offset: `0x160` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_data_tx_delayed +Auto-extracted signal data_tx_delayed from bus_sampling.vhd +- Offset: `0x164` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_edge_rx_valid +Auto-extracted signal edge_rx_valid from bus_sampling.vhd +- Offset: `0x168` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_edge_tx_valid +Auto-extracted signal edge_tx_valid from bus_sampling.vhd +- Offset: `0x16c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_ssp_delay +Auto-extracted signal ssp_delay from bus_sampling.vhd +- Offset: `0x170` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_tx_trigger_q +Auto-extracted signal tx_trigger_q from bus_sampling.vhd +- Offset: `0x174` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_tx_trigger_ssp +Auto-extracted signal tx_trigger_ssp from bus_sampling.vhd +- Offset: `0x178` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_shift_regs_res_d +Auto-extracted signal shift_regs_res_d from bus_sampling.vhd +- Offset: `0x17c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_shift_regs_res_q +Auto-extracted signal shift_regs_res_q from bus_sampling.vhd +- Offset: `0x180` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_shift_regs_res_q_scan +Auto-extracted signal shift_regs_res_q_scan from bus_sampling.vhd +- Offset: `0x184` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_sampling_ssp_enable +Auto-extracted signal ssp_enable from bus_sampling.vhd +- Offset: `0x188` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_traffic_counters_tx_ctr_i +Auto-extracted signal tx_ctr_i from bus_traffic_counters.vhd +- Offset: `0x18c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_traffic_counters_rx_ctr_i +Auto-extracted signal rx_ctr_i from bus_traffic_counters.vhd +- Offset: `0x190` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_traffic_counters_tx_ctr_rst_n_d +Auto-extracted signal tx_ctr_rst_n_d from bus_traffic_counters.vhd +- Offset: `0x194` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_traffic_counters_tx_ctr_rst_n_q +Auto-extracted signal tx_ctr_rst_n_q from bus_traffic_counters.vhd +- Offset: `0x198` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_traffic_counters_tx_ctr_rst_n_q_scan +Auto-extracted signal tx_ctr_rst_n_q_scan from bus_traffic_counters.vhd +- Offset: `0x19c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_traffic_counters_rx_ctr_rst_n_d +Auto-extracted signal rx_ctr_rst_n_d from bus_traffic_counters.vhd +- Offset: `0x1a0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_traffic_counters_rx_ctr_rst_n_q +Auto-extracted signal rx_ctr_rst_n_q from bus_traffic_counters.vhd +- Offset: `0x1a4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## bus_traffic_counters_rx_ctr_rst_n_q_scan +Auto-extracted signal rx_ctr_rst_n_q_scan from bus_traffic_counters.vhd +- Offset: `0x1a8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_apb_tb_s_apb_paddr +Auto-extracted signal s_apb_paddr from can_apb_tb.vhd +- Offset: `0x1ac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_apb_tb_s_apb_penable +Auto-extracted signal s_apb_penable from can_apb_tb.vhd +- Offset: `0x1b0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_apb_tb_s_apb_pprot +Auto-extracted signal s_apb_pprot from can_apb_tb.vhd +- Offset: `0x1b4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_apb_tb_s_apb_prdata +Auto-extracted signal s_apb_prdata from can_apb_tb.vhd +- Offset: `0x1b8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_apb_tb_s_apb_pready +Auto-extracted signal s_apb_pready from can_apb_tb.vhd +- Offset: `0x1bc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_apb_tb_s_apb_psel +Auto-extracted signal s_apb_psel from can_apb_tb.vhd +- Offset: `0x1c0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_apb_tb_s_apb_pslverr +Auto-extracted signal s_apb_pslverr from can_apb_tb.vhd +- Offset: `0x1c4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_apb_tb_s_apb_pstrb +Auto-extracted signal s_apb_pstrb from can_apb_tb.vhd +- Offset: `0x1c8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_apb_tb_s_apb_pwdata +Auto-extracted signal s_apb_pwdata from can_apb_tb.vhd +- Offset: `0x1cc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_apb_tb_s_apb_pwrite +Auto-extracted signal s_apb_pwrite from can_apb_tb.vhd +- Offset: `0x1d0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_drv_clr_rx_ctr +Auto-extracted signal drv_clr_rx_ctr from can_core.vhd +- Offset: `0x1d4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_drv_clr_tx_ctr +Auto-extracted signal drv_clr_tx_ctr from can_core.vhd +- Offset: `0x1d8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_drv_bus_mon_ena +Auto-extracted signal drv_bus_mon_ena from can_core.vhd +- Offset: `0x1dc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_drv_ena +Auto-extracted signal drv_ena from can_core.vhd +- Offset: `0x1e0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_rec_ident_i +Auto-extracted signal rec_ident_i from can_core.vhd +- Offset: `0x1e4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_rec_dlc_i +Auto-extracted signal rec_dlc_i from can_core.vhd +- Offset: `0x1e8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_rec_ident_type_i +Auto-extracted signal rec_ident_type_i from can_core.vhd +- Offset: `0x1ec` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_rec_frame_type_i +Auto-extracted signal rec_frame_type_i from can_core.vhd +- Offset: `0x1f0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_rec_is_rtr_i +Auto-extracted signal rec_is_rtr_i from can_core.vhd +- Offset: `0x1f4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_rec_brs_i +Auto-extracted signal rec_brs_i from can_core.vhd +- Offset: `0x1f8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_rec_esi_i +Auto-extracted signal rec_esi_i from can_core.vhd +- Offset: `0x1fc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_alc +Auto-extracted signal alc from can_core.vhd +- Offset: `0x200` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_erc_capture +Auto-extracted signal erc_capture from can_core.vhd +- Offset: `0x204` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_transmitter +Auto-extracted signal is_transmitter from can_core.vhd +- Offset: `0x208` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_receiver +Auto-extracted signal is_receiver from can_core.vhd +- Offset: `0x20c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_idle +Auto-extracted signal is_idle from can_core.vhd +- Offset: `0x210` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_arbitration_lost_i +Auto-extracted signal arbitration_lost_i from can_core.vhd +- Offset: `0x214` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_set_transmitter +Auto-extracted signal set_transmitter from can_core.vhd +- Offset: `0x218` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_set_receiver +Auto-extracted signal set_receiver from can_core.vhd +- Offset: `0x21c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_set_idle +Auto-extracted signal set_idle from can_core.vhd +- Offset: `0x220` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_err_active +Auto-extracted signal is_err_active from can_core.vhd +- Offset: `0x224` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_err_passive +Auto-extracted signal is_err_passive from can_core.vhd +- Offset: `0x228` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_bus_off_i +Auto-extracted signal is_bus_off_i from can_core.vhd +- Offset: `0x22c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_err_detected_i +Auto-extracted signal err_detected_i from can_core.vhd +- Offset: `0x230` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_primary_err +Auto-extracted signal primary_err from can_core.vhd +- Offset: `0x234` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_act_err_ovr_flag +Auto-extracted signal act_err_ovr_flag from can_core.vhd +- Offset: `0x238` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_err_delim_late +Auto-extracted signal err_delim_late from can_core.vhd +- Offset: `0x23c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_set_err_active +Auto-extracted signal set_err_active from can_core.vhd +- Offset: `0x240` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_err_ctrs_unchanged +Auto-extracted signal err_ctrs_unchanged from can_core.vhd +- Offset: `0x244` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_stuff_enable +Auto-extracted signal stuff_enable from can_core.vhd +- Offset: `0x248` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_destuff_enable +Auto-extracted signal destuff_enable from can_core.vhd +- Offset: `0x24c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_fixed_stuff +Auto-extracted signal fixed_stuff from can_core.vhd +- Offset: `0x250` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_tx_frame_no_sof +Auto-extracted signal tx_frame_no_sof from can_core.vhd +- Offset: `0x254` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_stuff_length +Auto-extracted signal stuff_length from can_core.vhd +- Offset: `0x258` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_dst_ctr +Auto-extracted signal dst_ctr from can_core.vhd +- Offset: `0x25c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_bst_ctr +Auto-extracted signal bst_ctr from can_core.vhd +- Offset: `0x260` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_stuff_err +Auto-extracted signal stuff_err from can_core.vhd +- Offset: `0x264` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_enable +Auto-extracted signal crc_enable from can_core.vhd +- Offset: `0x268` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_spec_enable +Auto-extracted signal crc_spec_enable from can_core.vhd +- Offset: `0x26c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_calc_from_rx +Auto-extracted signal crc_calc_from_rx from can_core.vhd +- Offset: `0x270` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_15 +Auto-extracted signal crc_15 from can_core.vhd +- Offset: `0x274` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_17 +Auto-extracted signal crc_17 from can_core.vhd +- Offset: `0x278` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_21 +Auto-extracted signal crc_21 from can_core.vhd +- Offset: `0x27c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_sp_control_i +Auto-extracted signal sp_control_i from can_core.vhd +- Offset: `0x280` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_sp_control_q +Auto-extracted signal sp_control_q from can_core.vhd +- Offset: `0x284` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_sync_control_i +Auto-extracted signal sync_control_i from can_core.vhd +- Offset: `0x288` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_ssp_reset_i +Auto-extracted signal ssp_reset_i from can_core.vhd +- Offset: `0x28c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_tran_delay_meas_i +Auto-extracted signal tran_delay_meas_i from can_core.vhd +- Offset: `0x290` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_tran_valid_i +Auto-extracted signal tran_valid_i from can_core.vhd +- Offset: `0x294` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_rec_valid_i +Auto-extracted signal rec_valid_i from can_core.vhd +- Offset: `0x298` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_br_shifted_i +Auto-extracted signal br_shifted_i from can_core.vhd +- Offset: `0x29c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_fcs_changed_i +Auto-extracted signal fcs_changed_i from can_core.vhd +- Offset: `0x2a0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_err_warning_limit_i +Auto-extracted signal err_warning_limit_i from can_core.vhd +- Offset: `0x2a4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_tx_err_ctr +Auto-extracted signal tx_err_ctr from can_core.vhd +- Offset: `0x2a8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_rx_err_ctr +Auto-extracted signal rx_err_ctr from can_core.vhd +- Offset: `0x2ac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_norm_err_ctr +Auto-extracted signal norm_err_ctr from can_core.vhd +- Offset: `0x2b0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_data_err_ctr +Auto-extracted signal data_err_ctr from can_core.vhd +- Offset: `0x2b4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_pc_tx_trigger +Auto-extracted signal pc_tx_trigger from can_core.vhd +- Offset: `0x2b8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_pc_rx_trigger +Auto-extracted signal pc_rx_trigger from can_core.vhd +- Offset: `0x2bc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_pc_tx_data_nbs +Auto-extracted signal pc_tx_data_nbs from can_core.vhd +- Offset: `0x2c0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_pc_rx_data_nbs +Auto-extracted signal pc_rx_data_nbs from can_core.vhd +- Offset: `0x2c4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_data_tx_wbs +Auto-extracted signal crc_data_tx_wbs from can_core.vhd +- Offset: `0x2c8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_data_tx_nbs +Auto-extracted signal crc_data_tx_nbs from can_core.vhd +- Offset: `0x2cc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_data_rx_wbs +Auto-extracted signal crc_data_rx_wbs from can_core.vhd +- Offset: `0x2d0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_data_rx_nbs +Auto-extracted signal crc_data_rx_nbs from can_core.vhd +- Offset: `0x2d4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_trig_tx_wbs +Auto-extracted signal crc_trig_tx_wbs from can_core.vhd +- Offset: `0x2d8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_trig_tx_nbs +Auto-extracted signal crc_trig_tx_nbs from can_core.vhd +- Offset: `0x2dc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_trig_rx_wbs +Auto-extracted signal crc_trig_rx_wbs from can_core.vhd +- Offset: `0x2e0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_trig_rx_nbs +Auto-extracted signal crc_trig_rx_nbs from can_core.vhd +- Offset: `0x2e4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_bst_data_in +Auto-extracted signal bst_data_in from can_core.vhd +- Offset: `0x2e8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_bst_data_out +Auto-extracted signal bst_data_out from can_core.vhd +- Offset: `0x2ec` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_bst_trigger +Auto-extracted signal bst_trigger from can_core.vhd +- Offset: `0x2f0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_data_halt +Auto-extracted signal data_halt from can_core.vhd +- Offset: `0x2f4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_bds_data_in +Auto-extracted signal bds_data_in from can_core.vhd +- Offset: `0x2f8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_bds_data_out +Auto-extracted signal bds_data_out from can_core.vhd +- Offset: `0x2fc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_bds_trigger +Auto-extracted signal bds_trigger from can_core.vhd +- Offset: `0x300` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_destuffed +Auto-extracted signal destuffed from can_core.vhd +- Offset: `0x304` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_tx_ctr +Auto-extracted signal tx_ctr from can_core.vhd +- Offset: `0x308` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_rx_ctr +Auto-extracted signal rx_ctr from can_core.vhd +- Offset: `0x30c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_tx_data_wbs_i +Auto-extracted signal tx_data_wbs_i from can_core.vhd +- Offset: `0x310` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_lpb_dominant +Auto-extracted signal lpb_dominant from can_core.vhd +- Offset: `0x314` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_form_err +Auto-extracted signal form_err from can_core.vhd +- Offset: `0x318` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_ack_err +Auto-extracted signal ack_err from can_core.vhd +- Offset: `0x31c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_crc_err +Auto-extracted signal crc_err from can_core.vhd +- Offset: `0x320` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_arbitration +Auto-extracted signal is_arbitration from can_core.vhd +- Offset: `0x324` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_control +Auto-extracted signal is_control from can_core.vhd +- Offset: `0x328` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_data +Auto-extracted signal is_data from can_core.vhd +- Offset: `0x32c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_stuff_count +Auto-extracted signal is_stuff_count from can_core.vhd +- Offset: `0x330` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_crc +Auto-extracted signal is_crc from can_core.vhd +- Offset: `0x334` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_crc_delim +Auto-extracted signal is_crc_delim from can_core.vhd +- Offset: `0x338` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_ack_field +Auto-extracted signal is_ack_field from can_core.vhd +- Offset: `0x33c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_ack_delim +Auto-extracted signal is_ack_delim from can_core.vhd +- Offset: `0x340` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_eof +Auto-extracted signal is_eof from can_core.vhd +- Offset: `0x344` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_err_frm +Auto-extracted signal is_err_frm from can_core.vhd +- Offset: `0x348` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_intermission +Auto-extracted signal is_intermission from can_core.vhd +- Offset: `0x34c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_suspend +Auto-extracted signal is_suspend from can_core.vhd +- Offset: `0x350` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_overload_i +Auto-extracted signal is_overload_i from can_core.vhd +- Offset: `0x354` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_sof +Auto-extracted signal is_sof from can_core.vhd +- Offset: `0x358` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_sof_pulse_i +Auto-extracted signal sof_pulse_i from can_core.vhd +- Offset: `0x35c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_load_init_vect +Auto-extracted signal load_init_vect from can_core.vhd +- Offset: `0x360` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_retr_ctr_i +Auto-extracted signal retr_ctr_i from can_core.vhd +- Offset: `0x364` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_decrement_rec +Auto-extracted signal decrement_rec from can_core.vhd +- Offset: `0x368` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_bit_err_after_ack_err +Auto-extracted signal bit_err_after_ack_err from can_core.vhd +- Offset: `0x36c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_core_is_pexs +Auto-extracted signal is_pexs from can_core.vhd +- Offset: `0x370` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_crc_drv_fd_type +Auto-extracted signal drv_fd_type from can_crc.vhd +- Offset: `0x374` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_crc_init_vect_15 +Auto-extracted signal init_vect_15 from can_crc.vhd +- Offset: `0x378` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_crc_init_vect_17 +Auto-extracted signal init_vect_17 from can_crc.vhd +- Offset: `0x37c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_crc_init_vect_21 +Auto-extracted signal init_vect_21 from can_crc.vhd +- Offset: `0x380` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_crc_crc_17_21_data_in +Auto-extracted signal crc_17_21_data_in from can_crc.vhd +- Offset: `0x384` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_crc_crc_17_21_trigger +Auto-extracted signal crc_17_21_trigger from can_crc.vhd +- Offset: `0x388` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_crc_crc_15_data_in +Auto-extracted signal crc_15_data_in from can_crc.vhd +- Offset: `0x38c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_crc_crc_15_trigger +Auto-extracted signal crc_15_trigger from can_crc.vhd +- Offset: `0x390` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_crc_crc_ena_15 +Auto-extracted signal crc_ena_15 from can_crc.vhd +- Offset: `0x394` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_crc_crc_ena_17_21 +Auto-extracted signal crc_ena_17_21 from can_crc.vhd +- Offset: `0x398` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_ahb_ctu_can_data_in +Auto-extracted signal ctu_can_data_in from can_top_ahb.vhd +- Offset: `0x39c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_ahb_ctu_can_data_out +Auto-extracted signal ctu_can_data_out from can_top_ahb.vhd +- Offset: `0x3a0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_ahb_ctu_can_adress +Auto-extracted signal ctu_can_adress from can_top_ahb.vhd +- Offset: `0x3a4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_ahb_ctu_can_scs +Auto-extracted signal ctu_can_scs from can_top_ahb.vhd +- Offset: `0x3a8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_ahb_ctu_can_srd +Auto-extracted signal ctu_can_srd from can_top_ahb.vhd +- Offset: `0x3ac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_ahb_ctu_can_swr +Auto-extracted signal ctu_can_swr from can_top_ahb.vhd +- Offset: `0x3b0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_ahb_ctu_can_sbe +Auto-extracted signal ctu_can_sbe from can_top_ahb.vhd +- Offset: `0x3b4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_ahb_res_n_out_i +Auto-extracted signal res_n_out_i from can_top_ahb.vhd +- Offset: `0x3b8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_apb_reg_data_in +Auto-extracted signal reg_data_in from can_top_apb.vhd +- Offset: `0x3bc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_apb_reg_data_out +Auto-extracted signal reg_data_out from can_top_apb.vhd +- Offset: `0x3c0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_apb_reg_addr +Auto-extracted signal reg_addr from can_top_apb.vhd +- Offset: `0x3c4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_apb_reg_be +Auto-extracted signal reg_be from can_top_apb.vhd +- Offset: `0x3c8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_apb_reg_rden +Auto-extracted signal reg_rden from can_top_apb.vhd +- Offset: `0x3cc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_apb_reg_wren +Auto-extracted signal reg_wren from can_top_apb.vhd +- Offset: `0x3d0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_drv_bus +Auto-extracted signal drv_bus from can_top_level.vhd +- Offset: `0x3d4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_stat_bus +Auto-extracted signal stat_bus from can_top_level.vhd +- Offset: `0x3d8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_res_n_sync +Auto-extracted signal res_n_sync from can_top_level.vhd +- Offset: `0x3dc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_res_core_n +Auto-extracted signal res_core_n from can_top_level.vhd +- Offset: `0x3e0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_res_soft_n +Auto-extracted signal res_soft_n from can_top_level.vhd +- Offset: `0x3e4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_sp_control +Auto-extracted signal sp_control from can_top_level.vhd +- Offset: `0x3e8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rx_buf_size +Auto-extracted signal rx_buf_size from can_top_level.vhd +- Offset: `0x3ec` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rx_full +Auto-extracted signal rx_full from can_top_level.vhd +- Offset: `0x3f0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rx_empty +Auto-extracted signal rx_empty from can_top_level.vhd +- Offset: `0x3f4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rx_frame_count +Auto-extracted signal rx_frame_count from can_top_level.vhd +- Offset: `0x3f8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rx_mem_free +Auto-extracted signal rx_mem_free from can_top_level.vhd +- Offset: `0x3fc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rx_read_pointer +Auto-extracted signal rx_read_pointer from can_top_level.vhd +- Offset: `0x400` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rx_write_pointer +Auto-extracted signal rx_write_pointer from can_top_level.vhd +- Offset: `0x404` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rx_data_overrun +Auto-extracted signal rx_data_overrun from can_top_level.vhd +- Offset: `0x408` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rx_read_buff +Auto-extracted signal rx_read_buff from can_top_level.vhd +- Offset: `0x40c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rx_mof +Auto-extracted signal rx_mof from can_top_level.vhd +- Offset: `0x410` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_txtb_port_a_data +Auto-extracted signal txtb_port_a_data from can_top_level.vhd +- Offset: `0x414` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_txtb_port_a_address +Auto-extracted signal txtb_port_a_address from can_top_level.vhd +- Offset: `0x418` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_txtb_port_a_cs +Auto-extracted signal txtb_port_a_cs from can_top_level.vhd +- Offset: `0x41c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_txtb_port_a_be +Auto-extracted signal txtb_port_a_be from can_top_level.vhd +- Offset: `0x420` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_txtb_sw_cmd_index +Auto-extracted signal txtb_sw_cmd_index from can_top_level.vhd +- Offset: `0x424` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_txt_buf_failed_bof +Auto-extracted signal txt_buf_failed_bof from can_top_level.vhd +- Offset: `0x428` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_int_vector +Auto-extracted signal int_vector from can_top_level.vhd +- Offset: `0x42c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_int_ena +Auto-extracted signal int_ena from can_top_level.vhd +- Offset: `0x430` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_int_mask +Auto-extracted signal int_mask from can_top_level.vhd +- Offset: `0x434` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rec_ident +Auto-extracted signal rec_ident from can_top_level.vhd +- Offset: `0x438` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rec_dlc +Auto-extracted signal rec_dlc from can_top_level.vhd +- Offset: `0x43c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rec_ident_type +Auto-extracted signal rec_ident_type from can_top_level.vhd +- Offset: `0x440` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rec_frame_type +Auto-extracted signal rec_frame_type from can_top_level.vhd +- Offset: `0x444` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rec_is_rtr +Auto-extracted signal rec_is_rtr from can_top_level.vhd +- Offset: `0x448` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rec_brs +Auto-extracted signal rec_brs from can_top_level.vhd +- Offset: `0x44c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rec_esi +Auto-extracted signal rec_esi from can_top_level.vhd +- Offset: `0x450` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_store_data_word +Auto-extracted signal store_data_word from can_top_level.vhd +- Offset: `0x454` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_sof_pulse +Auto-extracted signal sof_pulse from can_top_level.vhd +- Offset: `0x458` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_store_metadata +Auto-extracted signal store_metadata from can_top_level.vhd +- Offset: `0x45c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_store_data +Auto-extracted signal store_data from can_top_level.vhd +- Offset: `0x460` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rec_valid +Auto-extracted signal rec_valid from can_top_level.vhd +- Offset: `0x464` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rec_abort +Auto-extracted signal rec_abort from can_top_level.vhd +- Offset: `0x468` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_store_metadata_f +Auto-extracted signal store_metadata_f from can_top_level.vhd +- Offset: `0x46c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_store_data_f +Auto-extracted signal store_data_f from can_top_level.vhd +- Offset: `0x470` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rec_valid_f +Auto-extracted signal rec_valid_f from can_top_level.vhd +- Offset: `0x474` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rec_abort_f +Auto-extracted signal rec_abort_f from can_top_level.vhd +- Offset: `0x478` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_txtb_hw_cmd_int +Auto-extracted signal txtb_hw_cmd_int from can_top_level.vhd +- Offset: `0x47c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_is_bus_off +Auto-extracted signal is_bus_off from can_top_level.vhd +- Offset: `0x480` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_txtb_available +Auto-extracted signal txtb_available from can_top_level.vhd +- Offset: `0x484` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_txtb_port_b_clk_en +Auto-extracted signal txtb_port_b_clk_en from can_top_level.vhd +- Offset: `0x488` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_tran_dlc +Auto-extracted signal tran_dlc from can_top_level.vhd +- Offset: `0x48c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_tran_is_rtr +Auto-extracted signal tran_is_rtr from can_top_level.vhd +- Offset: `0x490` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_tran_ident_type +Auto-extracted signal tran_ident_type from can_top_level.vhd +- Offset: `0x494` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_tran_frame_type +Auto-extracted signal tran_frame_type from can_top_level.vhd +- Offset: `0x498` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_tran_brs +Auto-extracted signal tran_brs from can_top_level.vhd +- Offset: `0x49c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_tran_identifier +Auto-extracted signal tran_identifier from can_top_level.vhd +- Offset: `0x4a0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_tran_word +Auto-extracted signal tran_word from can_top_level.vhd +- Offset: `0x4a4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_tran_frame_valid +Auto-extracted signal tran_frame_valid from can_top_level.vhd +- Offset: `0x4a8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_txtb_changed +Auto-extracted signal txtb_changed from can_top_level.vhd +- Offset: `0x4ac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_txtb_clk_en +Auto-extracted signal txtb_clk_en from can_top_level.vhd +- Offset: `0x4b0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_err_detected +Auto-extracted signal err_detected from can_top_level.vhd +- Offset: `0x4b4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_fcs_changed +Auto-extracted signal fcs_changed from can_top_level.vhd +- Offset: `0x4b8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_err_warning_limit +Auto-extracted signal err_warning_limit from can_top_level.vhd +- Offset: `0x4bc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_arbitration_lost +Auto-extracted signal arbitration_lost from can_top_level.vhd +- Offset: `0x4c0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_tran_valid +Auto-extracted signal tran_valid from can_top_level.vhd +- Offset: `0x4c4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_br_shifted +Auto-extracted signal br_shifted from can_top_level.vhd +- Offset: `0x4c8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_is_overload +Auto-extracted signal is_overload from can_top_level.vhd +- Offset: `0x4cc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rx_triggers +Auto-extracted signal rx_triggers from can_top_level.vhd +- Offset: `0x4d0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_tx_trigger +Auto-extracted signal tx_trigger from can_top_level.vhd +- Offset: `0x4d4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_sync_control +Auto-extracted signal sync_control from can_top_level.vhd +- Offset: `0x4d8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_no_pos_resync +Auto-extracted signal no_pos_resync from can_top_level.vhd +- Offset: `0x4dc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_nbt_ctrs_en +Auto-extracted signal nbt_ctrs_en from can_top_level.vhd +- Offset: `0x4e0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_dbt_ctrs_en +Auto-extracted signal dbt_ctrs_en from can_top_level.vhd +- Offset: `0x4e4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_trv_delay +Auto-extracted signal trv_delay from can_top_level.vhd +- Offset: `0x4e8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_rx_data_wbs +Auto-extracted signal rx_data_wbs from can_top_level.vhd +- Offset: `0x4ec` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_tx_data_wbs +Auto-extracted signal tx_data_wbs from can_top_level.vhd +- Offset: `0x4f0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_ssp_reset +Auto-extracted signal ssp_reset from can_top_level.vhd +- Offset: `0x4f4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_tran_delay_meas +Auto-extracted signal tran_delay_meas from can_top_level.vhd +- Offset: `0x4f8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_bit_err +Auto-extracted signal bit_err from can_top_level.vhd +- Offset: `0x4fc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_sample_sec +Auto-extracted signal sample_sec from can_top_level.vhd +- Offset: `0x500` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_btmc_reset +Auto-extracted signal btmc_reset from can_top_level.vhd +- Offset: `0x504` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_dbt_measure_start +Auto-extracted signal dbt_measure_start from can_top_level.vhd +- Offset: `0x508` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_gen_first_ssp +Auto-extracted signal gen_first_ssp from can_top_level.vhd +- Offset: `0x50c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_sync_edge +Auto-extracted signal sync_edge from can_top_level.vhd +- Offset: `0x510` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_tq_edge +Auto-extracted signal tq_edge from can_top_level.vhd +- Offset: `0x514` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## can_top_level_tst_rdata_rx_buf +Auto-extracted signal tst_rdata_rx_buf from can_top_level.vhd +- Offset: `0x518` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## clk_gate_clk_en_q +Auto-extracted signal clk_en_q from clk_gate.vhd +- Offset: `0x51c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## control_counter_ctrl_ctr_ce +Auto-extracted signal ctrl_ctr_ce from control_counter.vhd +- Offset: `0x520` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## control_counter_compl_ctr_ce +Auto-extracted signal compl_ctr_ce from control_counter.vhd +- Offset: `0x524` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## control_registers_reg_map_reg_sel +Auto-extracted signal reg_sel from control_registers_reg_map.vhd +- Offset: `0x528` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## control_registers_reg_map_read_data_mux_in +Auto-extracted signal read_data_mux_in from control_registers_reg_map.vhd +- Offset: `0x52c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## control_registers_reg_map_read_data_mask_n +Auto-extracted signal read_data_mask_n from control_registers_reg_map.vhd +- Offset: `0x530` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## control_registers_reg_map_read_mux_ena +Auto-extracted signal read_mux_ena from control_registers_reg_map.vhd +- Offset: `0x534` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## crc_calc_crc_q +Auto-extracted signal crc_q from crc_calc.vhd +- Offset: `0x538` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## crc_calc_crc_nxt +Auto-extracted signal crc_nxt from crc_calc.vhd +- Offset: `0x53c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## crc_calc_crc_shift +Auto-extracted signal crc_shift from crc_calc.vhd +- Offset: `0x540` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## crc_calc_crc_shift_n_xor +Auto-extracted signal crc_shift_n_xor from crc_calc.vhd +- Offset: `0x544` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## crc_calc_crc_d +Auto-extracted signal crc_d from crc_calc.vhd +- Offset: `0x548` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## crc_calc_crc_ce +Auto-extracted signal crc_ce from crc_calc.vhd +- Offset: `0x54c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## data_edge_detector_rx_data_prev +Auto-extracted signal rx_data_prev from data_edge_detector.vhd +- Offset: `0x550` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## data_edge_detector_tx_data_prev +Auto-extracted signal tx_data_prev from data_edge_detector.vhd +- Offset: `0x554` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## data_edge_detector_rx_data_sync_prev +Auto-extracted signal rx_data_sync_prev from data_edge_detector.vhd +- Offset: `0x558` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## data_edge_detector_rx_edge_i +Auto-extracted signal rx_edge_i from data_edge_detector.vhd +- Offset: `0x55c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## data_edge_detector_tx_edge_i +Auto-extracted signal tx_edge_i from data_edge_detector.vhd +- Offset: `0x560` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## data_mux_sel_data +Auto-extracted signal sel_data from data_mux.vhd +- Offset: `0x564` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## data_mux_saturated_data +Auto-extracted signal saturated_data from data_mux.vhd +- Offset: `0x568` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## data_mux_masked_data +Auto-extracted signal masked_data from data_mux.vhd +- Offset: `0x56c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## dlc_decoder_data_len_8_to_64 +Auto-extracted signal data_len_8_to_64 from dlc_decoder.vhd +- Offset: `0x570` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## dlc_decoder_data_len_can_2_0 +Auto-extracted signal data_len_can_2_0 from dlc_decoder.vhd +- Offset: `0x574` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## dlc_decoder_data_len_can_fd +Auto-extracted signal data_len_can_fd from dlc_decoder.vhd +- Offset: `0x578` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## endian_swapper_swapped +Auto-extracted signal swapped from endian_swapper.vhd +- Offset: `0x57c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_counters_tx_err_ctr_ce +Auto-extracted signal tx_err_ctr_ce from err_counters.vhd +- Offset: `0x580` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_counters_rx_err_ctr_ce +Auto-extracted signal rx_err_ctr_ce from err_counters.vhd +- Offset: `0x584` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_counters_modif_tx_ctr +Auto-extracted signal modif_tx_ctr from err_counters.vhd +- Offset: `0x588` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_counters_modif_rx_ctr +Auto-extracted signal modif_rx_ctr from err_counters.vhd +- Offset: `0x58c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_counters_nom_err_ctr_ce +Auto-extracted signal nom_err_ctr_ce from err_counters.vhd +- Offset: `0x590` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_counters_data_err_ctr_ce +Auto-extracted signal data_err_ctr_ce from err_counters.vhd +- Offset: `0x594` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_counters_res_err_ctrs_d +Auto-extracted signal res_err_ctrs_d from err_counters.vhd +- Offset: `0x598` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_counters_res_err_ctrs_q +Auto-extracted signal res_err_ctrs_q from err_counters.vhd +- Offset: `0x59c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_counters_res_err_ctrs_q_scan +Auto-extracted signal res_err_ctrs_q_scan from err_counters.vhd +- Offset: `0x5a0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_err_frm_req_i +Auto-extracted signal err_frm_req_i from err_detector.vhd +- Offset: `0x5a4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_err_type_d +Auto-extracted signal err_type_d from err_detector.vhd +- Offset: `0x5a8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_err_type_q +Auto-extracted signal err_type_q from err_detector.vhd +- Offset: `0x5ac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_err_pos_q +Auto-extracted signal err_pos_q from err_detector.vhd +- Offset: `0x5b0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_form_err_i +Auto-extracted signal form_err_i from err_detector.vhd +- Offset: `0x5b4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_crc_match_c +Auto-extracted signal crc_match_c from err_detector.vhd +- Offset: `0x5b8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_crc_match_d +Auto-extracted signal crc_match_d from err_detector.vhd +- Offset: `0x5bc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_crc_match_q +Auto-extracted signal crc_match_q from err_detector.vhd +- Offset: `0x5c0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_dst_ctr_grey +Auto-extracted signal dst_ctr_grey from err_detector.vhd +- Offset: `0x5c4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_dst_parity +Auto-extracted signal dst_parity from err_detector.vhd +- Offset: `0x5c8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_stuff_count_check +Auto-extracted signal stuff_count_check from err_detector.vhd +- Offset: `0x5cc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_crc_15_ok +Auto-extracted signal crc_15_ok from err_detector.vhd +- Offset: `0x5d0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_crc_17_ok +Auto-extracted signal crc_17_ok from err_detector.vhd +- Offset: `0x5d4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_crc_21_ok +Auto-extracted signal crc_21_ok from err_detector.vhd +- Offset: `0x5d8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_stuff_count_ok +Auto-extracted signal stuff_count_ok from err_detector.vhd +- Offset: `0x5dc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_rx_crc_15 +Auto-extracted signal rx_crc_15 from err_detector.vhd +- Offset: `0x5e0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_rx_crc_17 +Auto-extracted signal rx_crc_17 from err_detector.vhd +- Offset: `0x5e4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## err_detector_rx_crc_21 +Auto-extracted signal rx_crc_21 from err_detector.vhd +- Offset: `0x5e8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_drv_ewl +Auto-extracted signal drv_ewl from fault_confinement.vhd +- Offset: `0x5ec` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_drv_erp +Auto-extracted signal drv_erp from fault_confinement.vhd +- Offset: `0x5f0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_drv_ctr_val +Auto-extracted signal drv_ctr_val from fault_confinement.vhd +- Offset: `0x5f4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_drv_ctr_sel +Auto-extracted signal drv_ctr_sel from fault_confinement.vhd +- Offset: `0x5f8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_drv_ena +Auto-extracted signal drv_ena from fault_confinement.vhd +- Offset: `0x5fc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_tx_err_ctr_i +Auto-extracted signal tx_err_ctr_i from fault_confinement.vhd +- Offset: `0x600` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_rx_err_ctr_i +Auto-extracted signal rx_err_ctr_i from fault_confinement.vhd +- Offset: `0x604` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_inc_one +Auto-extracted signal inc_one from fault_confinement.vhd +- Offset: `0x608` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_inc_eight +Auto-extracted signal inc_eight from fault_confinement.vhd +- Offset: `0x60c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_dec_one +Auto-extracted signal dec_one from fault_confinement.vhd +- Offset: `0x610` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_drv_rom_ena +Auto-extracted signal drv_rom_ena from fault_confinement.vhd +- Offset: `0x614` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_fsm_tx_err_ctr_mt_erp +Auto-extracted signal tx_err_ctr_mt_erp from fault_confinement_fsm.vhd +- Offset: `0x618` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_fsm_rx_err_ctr_mt_erp +Auto-extracted signal rx_err_ctr_mt_erp from fault_confinement_fsm.vhd +- Offset: `0x61c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_fsm_tx_err_ctr_mt_ewl +Auto-extracted signal tx_err_ctr_mt_ewl from fault_confinement_fsm.vhd +- Offset: `0x620` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_fsm_rx_err_ctr_mt_ewl +Auto-extracted signal rx_err_ctr_mt_ewl from fault_confinement_fsm.vhd +- Offset: `0x624` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_fsm_tx_err_ctr_mt_255 +Auto-extracted signal tx_err_ctr_mt_255 from fault_confinement_fsm.vhd +- Offset: `0x628` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_fsm_err_warning_limit_d +Auto-extracted signal err_warning_limit_d from fault_confinement_fsm.vhd +- Offset: `0x62c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_fsm_err_warning_limit_q +Auto-extracted signal err_warning_limit_q from fault_confinement_fsm.vhd +- Offset: `0x630` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_fsm_fc_fsm_res_d +Auto-extracted signal fc_fsm_res_d from fault_confinement_fsm.vhd +- Offset: `0x634` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_fsm_fc_fsm_res_q +Auto-extracted signal fc_fsm_res_q from fault_confinement_fsm.vhd +- Offset: `0x638` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_rules_inc_one_i +Auto-extracted signal inc_one_i from fault_confinement_rules.vhd +- Offset: `0x63c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## fault_confinement_rules_inc_eight_i +Auto-extracted signal inc_eight_i from fault_confinement_rules.vhd +- Offset: `0x640` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drv_filter_A_mask +Auto-extracted signal drv_filter_A_mask from frame_filters.vhd +- Offset: `0x644` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drv_filter_A_ctrl +Auto-extracted signal drv_filter_A_ctrl from frame_filters.vhd +- Offset: `0x648` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drv_filter_A_bits +Auto-extracted signal drv_filter_A_bits from frame_filters.vhd +- Offset: `0x64c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_int_filter_A_valid +Auto-extracted signal int_filter_A_valid from frame_filters.vhd +- Offset: `0x650` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drv_filter_B_mask +Auto-extracted signal drv_filter_B_mask from frame_filters.vhd +- Offset: `0x654` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drv_filter_B_ctrl +Auto-extracted signal drv_filter_B_ctrl from frame_filters.vhd +- Offset: `0x658` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drv_filter_B_bits +Auto-extracted signal drv_filter_B_bits from frame_filters.vhd +- Offset: `0x65c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_int_filter_B_valid +Auto-extracted signal int_filter_B_valid from frame_filters.vhd +- Offset: `0x660` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drv_filter_C_mask +Auto-extracted signal drv_filter_C_mask from frame_filters.vhd +- Offset: `0x664` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drv_filter_C_ctrl +Auto-extracted signal drv_filter_C_ctrl from frame_filters.vhd +- Offset: `0x668` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drv_filter_C_bits +Auto-extracted signal drv_filter_C_bits from frame_filters.vhd +- Offset: `0x66c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_int_filter_C_valid +Auto-extracted signal int_filter_C_valid from frame_filters.vhd +- Offset: `0x670` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drv_filter_ran_ctrl +Auto-extracted signal drv_filter_ran_ctrl from frame_filters.vhd +- Offset: `0x674` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drv_filter_ran_lo_th +Auto-extracted signal drv_filter_ran_lo_th from frame_filters.vhd +- Offset: `0x678` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drv_filter_ran_hi_th +Auto-extracted signal drv_filter_ran_hi_th from frame_filters.vhd +- Offset: `0x67c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_int_filter_ran_valid +Auto-extracted signal int_filter_ran_valid from frame_filters.vhd +- Offset: `0x680` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drv_filters_ena +Auto-extracted signal drv_filters_ena from frame_filters.vhd +- Offset: `0x684` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_int_data_type +Auto-extracted signal int_data_type from frame_filters.vhd +- Offset: `0x688` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_int_data_ctrl +Auto-extracted signal int_data_ctrl from frame_filters.vhd +- Offset: `0x68c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_filter_A_enable +Auto-extracted signal filter_A_enable from frame_filters.vhd +- Offset: `0x690` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_filter_B_enable +Auto-extracted signal filter_B_enable from frame_filters.vhd +- Offset: `0x694` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_filter_C_enable +Auto-extracted signal filter_C_enable from frame_filters.vhd +- Offset: `0x698` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_filter_range_enable +Auto-extracted signal filter_range_enable from frame_filters.vhd +- Offset: `0x69c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_filter_result +Auto-extracted signal filter_result from frame_filters.vhd +- Offset: `0x6a0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_ident_valid_d +Auto-extracted signal ident_valid_d from frame_filters.vhd +- Offset: `0x6a4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_ident_valid_q +Auto-extracted signal ident_valid_q from frame_filters.vhd +- Offset: `0x6a8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drv_drop_remote_frames +Auto-extracted signal drv_drop_remote_frames from frame_filters.vhd +- Offset: `0x6ac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## frame_filters_drop_rtr_frame +Auto-extracted signal drop_rtr_frame from frame_filters.vhd +- Offset: `0x6b0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## inf_ram_wrapper_int_read_data +Auto-extracted signal int_read_data from inf_ram_wrapper.vhd +- Offset: `0x6b4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## inf_ram_wrapper_byte_we +Auto-extracted signal byte_we from inf_ram_wrapper.vhd +- Offset: `0x6b8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## int_manager_drv_int_vect_clr +Auto-extracted signal drv_int_vect_clr from int_manager.vhd +- Offset: `0x6bc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## int_manager_drv_int_ena_set +Auto-extracted signal drv_int_ena_set from int_manager.vhd +- Offset: `0x6c0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## int_manager_drv_int_ena_clr +Auto-extracted signal drv_int_ena_clr from int_manager.vhd +- Offset: `0x6c4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## int_manager_drv_int_mask_set +Auto-extracted signal drv_int_mask_set from int_manager.vhd +- Offset: `0x6c8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## int_manager_drv_int_mask_clr +Auto-extracted signal drv_int_mask_clr from int_manager.vhd +- Offset: `0x6cc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## int_manager_int_ena_i +Auto-extracted signal int_ena_i from int_manager.vhd +- Offset: `0x6d0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## int_manager_int_mask_i +Auto-extracted signal int_mask_i from int_manager.vhd +- Offset: `0x6d4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## int_manager_int_vect_i +Auto-extracted signal int_vect_i from int_manager.vhd +- Offset: `0x6d8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## int_manager_int_input_active +Auto-extracted signal int_input_active from int_manager.vhd +- Offset: `0x6dc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## int_manager_int_i +Auto-extracted signal int_i from int_manager.vhd +- Offset: `0x6e0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## int_module_int_mask_i +Auto-extracted signal int_mask_i from int_module.vhd +- Offset: `0x6e4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## int_module_int_ena_i +Auto-extracted signal int_ena_i from int_module.vhd +- Offset: `0x6e8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## int_module_int_mask_load +Auto-extracted signal int_mask_load from int_module.vhd +- Offset: `0x6ec` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## int_module_int_mask_next +Auto-extracted signal int_mask_next from int_module.vhd +- Offset: `0x6f0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_reg_reg_value_r +Auto-extracted signal reg_value_r from memory_reg.vhd +- Offset: `0x6f4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_reg_wr_select +Auto-extracted signal wr_select from memory_reg.vhd +- Offset: `0x6f8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_reg_wr_select_expanded +Auto-extracted signal wr_select_expanded from memory_reg.vhd +- Offset: `0x6fc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_status_comb +Auto-extracted signal status_comb from memory_registers.vhd +- Offset: `0x700` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_can_core_cs +Auto-extracted signal can_core_cs from memory_registers.vhd +- Offset: `0x704` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_control_registers_cs +Auto-extracted signal control_registers_cs from memory_registers.vhd +- Offset: `0x708` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_control_registers_cs_reg +Auto-extracted signal control_registers_cs_reg from memory_registers.vhd +- Offset: `0x70c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_test_registers_cs +Auto-extracted signal test_registers_cs from memory_registers.vhd +- Offset: `0x710` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_test_registers_cs_reg +Auto-extracted signal test_registers_cs_reg from memory_registers.vhd +- Offset: `0x714` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_control_registers_rdata +Auto-extracted signal control_registers_rdata from memory_registers.vhd +- Offset: `0x718` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_test_registers_rdata +Auto-extracted signal test_registers_rdata from memory_registers.vhd +- Offset: `0x71c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_is_err_active +Auto-extracted signal is_err_active from memory_registers.vhd +- Offset: `0x720` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_is_err_passive +Auto-extracted signal is_err_passive from memory_registers.vhd +- Offset: `0x724` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_is_bus_off +Auto-extracted signal is_bus_off from memory_registers.vhd +- Offset: `0x728` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_is_transmitter +Auto-extracted signal is_transmitter from memory_registers.vhd +- Offset: `0x72c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_is_receiver +Auto-extracted signal is_receiver from memory_registers.vhd +- Offset: `0x730` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_is_idle +Auto-extracted signal is_idle from memory_registers.vhd +- Offset: `0x734` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_reg_lock_1_active +Auto-extracted signal reg_lock_1_active from memory_registers.vhd +- Offset: `0x738` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_reg_lock_2_active +Auto-extracted signal reg_lock_2_active from memory_registers.vhd +- Offset: `0x73c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_soft_res_q_n +Auto-extracted signal soft_res_q_n from memory_registers.vhd +- Offset: `0x740` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_ewl_padded +Auto-extracted signal ewl_padded from memory_registers.vhd +- Offset: `0x744` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_control_regs_clk_en +Auto-extracted signal control_regs_clk_en from memory_registers.vhd +- Offset: `0x748` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_test_regs_clk_en +Auto-extracted signal test_regs_clk_en from memory_registers.vhd +- Offset: `0x74c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_clk_control_regs +Auto-extracted signal clk_control_regs from memory_registers.vhd +- Offset: `0x750` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_clk_test_regs +Auto-extracted signal clk_test_regs from memory_registers.vhd +- Offset: `0x754` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_rx_buf_mode +Auto-extracted signal rx_buf_mode from memory_registers.vhd +- Offset: `0x758` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_rx_move_cmd +Auto-extracted signal rx_move_cmd from memory_registers.vhd +- Offset: `0x75c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## memory_registers_ctr_pres_sel_q +Auto-extracted signal ctr_pres_sel_q from memory_registers.vhd +- Offset: `0x760` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## operation_control_drv_ena +Auto-extracted signal drv_ena from operation_control.vhd +- Offset: `0x764` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## operation_control_go_to_off +Auto-extracted signal go_to_off from operation_control.vhd +- Offset: `0x768` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_drv_ena +Auto-extracted signal drv_ena from prescaler.vhd +- Offset: `0x76c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_tseg1_nbt +Auto-extracted signal tseg1_nbt from prescaler.vhd +- Offset: `0x770` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_tseg2_nbt +Auto-extracted signal tseg2_nbt from prescaler.vhd +- Offset: `0x774` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_brp_nbt +Auto-extracted signal brp_nbt from prescaler.vhd +- Offset: `0x778` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_sjw_nbt +Auto-extracted signal sjw_nbt from prescaler.vhd +- Offset: `0x77c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_tseg1_dbt +Auto-extracted signal tseg1_dbt from prescaler.vhd +- Offset: `0x780` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_tseg2_dbt +Auto-extracted signal tseg2_dbt from prescaler.vhd +- Offset: `0x784` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_brp_dbt +Auto-extracted signal brp_dbt from prescaler.vhd +- Offset: `0x788` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_sjw_dbt +Auto-extracted signal sjw_dbt from prescaler.vhd +- Offset: `0x78c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_segment_end +Auto-extracted signal segment_end from prescaler.vhd +- Offset: `0x790` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_h_sync_valid +Auto-extracted signal h_sync_valid from prescaler.vhd +- Offset: `0x794` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_is_tseg1 +Auto-extracted signal is_tseg1 from prescaler.vhd +- Offset: `0x798` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_is_tseg2 +Auto-extracted signal is_tseg2 from prescaler.vhd +- Offset: `0x79c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_resync_edge_valid +Auto-extracted signal resync_edge_valid from prescaler.vhd +- Offset: `0x7a0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_h_sync_edge_valid +Auto-extracted signal h_sync_edge_valid from prescaler.vhd +- Offset: `0x7a4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_segm_counter_nbt +Auto-extracted signal segm_counter_nbt from prescaler.vhd +- Offset: `0x7a8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_segm_counter_dbt +Auto-extracted signal segm_counter_dbt from prescaler.vhd +- Offset: `0x7ac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_exit_segm_req_nbt +Auto-extracted signal exit_segm_req_nbt from prescaler.vhd +- Offset: `0x7b0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_exit_segm_req_dbt +Auto-extracted signal exit_segm_req_dbt from prescaler.vhd +- Offset: `0x7b4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_tq_edge_nbt +Auto-extracted signal tq_edge_nbt from prescaler.vhd +- Offset: `0x7b8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_tq_edge_dbt +Auto-extracted signal tq_edge_dbt from prescaler.vhd +- Offset: `0x7bc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_rx_trig_req +Auto-extracted signal rx_trig_req from prescaler.vhd +- Offset: `0x7c0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_tx_trig_req +Auto-extracted signal tx_trig_req from prescaler.vhd +- Offset: `0x7c4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_start_edge +Auto-extracted signal start_edge from prescaler.vhd +- Offset: `0x7c8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## prescaler_bt_ctr_clear +Auto-extracted signal bt_ctr_clear from prescaler.vhd +- Offset: `0x7cc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## priority_decoder_l0_valid +Auto-extracted signal l0_valid from priority_decoder.vhd +- Offset: `0x7d0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## priority_decoder_l1_valid +Auto-extracted signal l1_valid from priority_decoder.vhd +- Offset: `0x7d4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## priority_decoder_l1_winner +Auto-extracted signal l1_winner from priority_decoder.vhd +- Offset: `0x7d8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## priority_decoder_l2_valid +Auto-extracted signal l2_valid from priority_decoder.vhd +- Offset: `0x7dc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## priority_decoder_l2_winner +Auto-extracted signal l2_winner from priority_decoder.vhd +- Offset: `0x7e0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## priority_decoder_l3_valid +Auto-extracted signal l3_valid from priority_decoder.vhd +- Offset: `0x7e4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## priority_decoder_l3_winner +Auto-extracted signal l3_winner from priority_decoder.vhd +- Offset: `0x7e8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_drv_can_fd_ena +Auto-extracted signal drv_can_fd_ena from protocol_control.vhd +- Offset: `0x7ec` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_drv_bus_mon_ena +Auto-extracted signal drv_bus_mon_ena from protocol_control.vhd +- Offset: `0x7f0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_drv_retr_lim_ena +Auto-extracted signal drv_retr_lim_ena from protocol_control.vhd +- Offset: `0x7f4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_drv_retr_th +Auto-extracted signal drv_retr_th from protocol_control.vhd +- Offset: `0x7f8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_drv_self_test_ena +Auto-extracted signal drv_self_test_ena from protocol_control.vhd +- Offset: `0x7fc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_drv_ack_forb +Auto-extracted signal drv_ack_forb from protocol_control.vhd +- Offset: `0x800` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_drv_ena +Auto-extracted signal drv_ena from protocol_control.vhd +- Offset: `0x804` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_drv_fd_type +Auto-extracted signal drv_fd_type from protocol_control.vhd +- Offset: `0x808` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_drv_int_loopback_ena +Auto-extracted signal drv_int_loopback_ena from protocol_control.vhd +- Offset: `0x80c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_drv_bus_off_reset +Auto-extracted signal drv_bus_off_reset from protocol_control.vhd +- Offset: `0x810` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_drv_ssp_delay_select +Auto-extracted signal drv_ssp_delay_select from protocol_control.vhd +- Offset: `0x814` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_drv_pex +Auto-extracted signal drv_pex from protocol_control.vhd +- Offset: `0x818` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_drv_cpexs +Auto-extracted signal drv_cpexs from protocol_control.vhd +- Offset: `0x81c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_tran_word_swapped +Auto-extracted signal tran_word_swapped from protocol_control.vhd +- Offset: `0x820` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_err_frm_req +Auto-extracted signal err_frm_req from protocol_control.vhd +- Offset: `0x824` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_tx_load_base_id +Auto-extracted signal tx_load_base_id from protocol_control.vhd +- Offset: `0x828` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_tx_load_ext_id +Auto-extracted signal tx_load_ext_id from protocol_control.vhd +- Offset: `0x82c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_tx_load_dlc +Auto-extracted signal tx_load_dlc from protocol_control.vhd +- Offset: `0x830` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_tx_load_data_word +Auto-extracted signal tx_load_data_word from protocol_control.vhd +- Offset: `0x834` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_tx_load_stuff_count +Auto-extracted signal tx_load_stuff_count from protocol_control.vhd +- Offset: `0x838` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_tx_load_crc +Auto-extracted signal tx_load_crc from protocol_control.vhd +- Offset: `0x83c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_tx_shift_ena +Auto-extracted signal tx_shift_ena from protocol_control.vhd +- Offset: `0x840` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_tx_dominant +Auto-extracted signal tx_dominant from protocol_control.vhd +- Offset: `0x844` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rx_clear +Auto-extracted signal rx_clear from protocol_control.vhd +- Offset: `0x848` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rx_store_base_id +Auto-extracted signal rx_store_base_id from protocol_control.vhd +- Offset: `0x84c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rx_store_ext_id +Auto-extracted signal rx_store_ext_id from protocol_control.vhd +- Offset: `0x850` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rx_store_ide +Auto-extracted signal rx_store_ide from protocol_control.vhd +- Offset: `0x854` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rx_store_rtr +Auto-extracted signal rx_store_rtr from protocol_control.vhd +- Offset: `0x858` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rx_store_edl +Auto-extracted signal rx_store_edl from protocol_control.vhd +- Offset: `0x85c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rx_store_dlc +Auto-extracted signal rx_store_dlc from protocol_control.vhd +- Offset: `0x860` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rx_store_esi +Auto-extracted signal rx_store_esi from protocol_control.vhd +- Offset: `0x864` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rx_store_brs +Auto-extracted signal rx_store_brs from protocol_control.vhd +- Offset: `0x868` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rx_store_stuff_count +Auto-extracted signal rx_store_stuff_count from protocol_control.vhd +- Offset: `0x86c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rx_shift_ena +Auto-extracted signal rx_shift_ena from protocol_control.vhd +- Offset: `0x870` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rx_shift_in_sel +Auto-extracted signal rx_shift_in_sel from protocol_control.vhd +- Offset: `0x874` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rec_is_rtr_i +Auto-extracted signal rec_is_rtr_i from protocol_control.vhd +- Offset: `0x878` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rec_dlc_d +Auto-extracted signal rec_dlc_d from protocol_control.vhd +- Offset: `0x87c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rec_dlc_q +Auto-extracted signal rec_dlc_q from protocol_control.vhd +- Offset: `0x880` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rec_frame_type_i +Auto-extracted signal rec_frame_type_i from protocol_control.vhd +- Offset: `0x884` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_ctrl_ctr_pload +Auto-extracted signal ctrl_ctr_pload from protocol_control.vhd +- Offset: `0x888` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_ctrl_ctr_pload_val +Auto-extracted signal ctrl_ctr_pload_val from protocol_control.vhd +- Offset: `0x88c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_ctrl_ctr_ena +Auto-extracted signal ctrl_ctr_ena from protocol_control.vhd +- Offset: `0x890` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_ctrl_ctr_zero +Auto-extracted signal ctrl_ctr_zero from protocol_control.vhd +- Offset: `0x894` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_ctrl_ctr_one +Auto-extracted signal ctrl_ctr_one from protocol_control.vhd +- Offset: `0x898` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_ctrl_counted_byte +Auto-extracted signal ctrl_counted_byte from protocol_control.vhd +- Offset: `0x89c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_ctrl_counted_byte_index +Auto-extracted signal ctrl_counted_byte_index from protocol_control.vhd +- Offset: `0x8a0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_ctrl_ctr_mem_index +Auto-extracted signal ctrl_ctr_mem_index from protocol_control.vhd +- Offset: `0x8a4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_compl_ctr_ena +Auto-extracted signal compl_ctr_ena from protocol_control.vhd +- Offset: `0x8a8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_reinteg_ctr_clr +Auto-extracted signal reinteg_ctr_clr from protocol_control.vhd +- Offset: `0x8ac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_reinteg_ctr_enable +Auto-extracted signal reinteg_ctr_enable from protocol_control.vhd +- Offset: `0x8b0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_reinteg_ctr_expired +Auto-extracted signal reinteg_ctr_expired from protocol_control.vhd +- Offset: `0x8b4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_retr_ctr_clear +Auto-extracted signal retr_ctr_clear from protocol_control.vhd +- Offset: `0x8b8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_retr_ctr_add +Auto-extracted signal retr_ctr_add from protocol_control.vhd +- Offset: `0x8bc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_retr_limit_reached +Auto-extracted signal retr_limit_reached from protocol_control.vhd +- Offset: `0x8c0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_form_err_i +Auto-extracted signal form_err_i from protocol_control.vhd +- Offset: `0x8c4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_ack_err_i +Auto-extracted signal ack_err_i from protocol_control.vhd +- Offset: `0x8c8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_crc_check +Auto-extracted signal crc_check from protocol_control.vhd +- Offset: `0x8cc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_bit_err_arb +Auto-extracted signal bit_err_arb from protocol_control.vhd +- Offset: `0x8d0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_crc_match +Auto-extracted signal crc_match from protocol_control.vhd +- Offset: `0x8d4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_crc_err_i +Auto-extracted signal crc_err_i from protocol_control.vhd +- Offset: `0x8d8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_crc_clear_match_flag +Auto-extracted signal crc_clear_match_flag from protocol_control.vhd +- Offset: `0x8dc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_crc_src +Auto-extracted signal crc_src from protocol_control.vhd +- Offset: `0x8e0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_err_pos +Auto-extracted signal err_pos from protocol_control.vhd +- Offset: `0x8e4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_is_arbitration_i +Auto-extracted signal is_arbitration_i from protocol_control.vhd +- Offset: `0x8e8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_bit_err_enable +Auto-extracted signal bit_err_enable from protocol_control.vhd +- Offset: `0x8ec` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_tx_data_nbs_i +Auto-extracted signal tx_data_nbs_i from protocol_control.vhd +- Offset: `0x8f0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rx_crc +Auto-extracted signal rx_crc from protocol_control.vhd +- Offset: `0x8f4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_rx_stuff_count +Auto-extracted signal rx_stuff_count from protocol_control.vhd +- Offset: `0x8f8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fixed_stuff_i +Auto-extracted signal fixed_stuff_i from protocol_control.vhd +- Offset: `0x8fc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_arbitration_lost_i +Auto-extracted signal arbitration_lost_i from protocol_control.vhd +- Offset: `0x900` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_alc_id_field +Auto-extracted signal alc_id_field from protocol_control.vhd +- Offset: `0x904` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_drv_rom_ena +Auto-extracted signal drv_rom_ena from protocol_control.vhd +- Offset: `0x908` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_state_reg_ce +Auto-extracted signal state_reg_ce from protocol_control_fsm.vhd +- Offset: `0x90c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_no_data_transmitter +Auto-extracted signal no_data_transmitter from protocol_control_fsm.vhd +- Offset: `0x910` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_no_data_receiver +Auto-extracted signal no_data_receiver from protocol_control_fsm.vhd +- Offset: `0x914` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_no_data_field +Auto-extracted signal no_data_field from protocol_control_fsm.vhd +- Offset: `0x918` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_ctrl_ctr_pload_i +Auto-extracted signal ctrl_ctr_pload_i from protocol_control_fsm.vhd +- Offset: `0x91c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_ctrl_ctr_pload_unaliged +Auto-extracted signal ctrl_ctr_pload_unaliged from protocol_control_fsm.vhd +- Offset: `0x920` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_crc_use_21 +Auto-extracted signal crc_use_21 from protocol_control_fsm.vhd +- Offset: `0x924` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_crc_use_17 +Auto-extracted signal crc_use_17 from protocol_control_fsm.vhd +- Offset: `0x928` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_crc_src_i +Auto-extracted signal crc_src_i from protocol_control_fsm.vhd +- Offset: `0x92c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_crc_length_i +Auto-extracted signal crc_length_i from protocol_control_fsm.vhd +- Offset: `0x930` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_tran_data_length +Auto-extracted signal tran_data_length from protocol_control_fsm.vhd +- Offset: `0x934` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rec_data_length +Auto-extracted signal rec_data_length from protocol_control_fsm.vhd +- Offset: `0x938` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rec_data_length_c +Auto-extracted signal rec_data_length_c from protocol_control_fsm.vhd +- Offset: `0x93c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_data_length_c +Auto-extracted signal data_length_c from protocol_control_fsm.vhd +- Offset: `0x940` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_data_length_shifted_c +Auto-extracted signal data_length_shifted_c from protocol_control_fsm.vhd +- Offset: `0x944` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_data_length_bits_c +Auto-extracted signal data_length_bits_c from protocol_control_fsm.vhd +- Offset: `0x948` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_is_fd_frame +Auto-extracted signal is_fd_frame from protocol_control_fsm.vhd +- Offset: `0x94c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_frame_start +Auto-extracted signal frame_start from protocol_control_fsm.vhd +- Offset: `0x950` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_tx_frame_ready +Auto-extracted signal tx_frame_ready from protocol_control_fsm.vhd +- Offset: `0x954` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_ide_is_arbitration +Auto-extracted signal ide_is_arbitration from protocol_control_fsm.vhd +- Offset: `0x958` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_arbitration_lost_condition +Auto-extracted signal arbitration_lost_condition from protocol_control_fsm.vhd +- Offset: `0x95c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_arbitration_lost_i +Auto-extracted signal arbitration_lost_i from protocol_control_fsm.vhd +- Offset: `0x960` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_tx_failed +Auto-extracted signal tx_failed from protocol_control_fsm.vhd +- Offset: `0x964` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_store_metadata_d +Auto-extracted signal store_metadata_d from protocol_control_fsm.vhd +- Offset: `0x968` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_store_data_d +Auto-extracted signal store_data_d from protocol_control_fsm.vhd +- Offset: `0x96c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rec_valid_d +Auto-extracted signal rec_valid_d from protocol_control_fsm.vhd +- Offset: `0x970` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rec_abort_d +Auto-extracted signal rec_abort_d from protocol_control_fsm.vhd +- Offset: `0x974` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_go_to_suspend +Auto-extracted signal go_to_suspend from protocol_control_fsm.vhd +- Offset: `0x978` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_go_to_stuff_count +Auto-extracted signal go_to_stuff_count from protocol_control_fsm.vhd +- Offset: `0x97c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rx_store_base_id_i +Auto-extracted signal rx_store_base_id_i from protocol_control_fsm.vhd +- Offset: `0x980` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rx_store_ext_id_i +Auto-extracted signal rx_store_ext_id_i from protocol_control_fsm.vhd +- Offset: `0x984` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rx_store_ide_i +Auto-extracted signal rx_store_ide_i from protocol_control_fsm.vhd +- Offset: `0x988` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rx_store_rtr_i +Auto-extracted signal rx_store_rtr_i from protocol_control_fsm.vhd +- Offset: `0x98c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rx_store_edl_i +Auto-extracted signal rx_store_edl_i from protocol_control_fsm.vhd +- Offset: `0x990` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rx_store_dlc_i +Auto-extracted signal rx_store_dlc_i from protocol_control_fsm.vhd +- Offset: `0x994` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rx_store_esi_i +Auto-extracted signal rx_store_esi_i from protocol_control_fsm.vhd +- Offset: `0x998` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rx_store_brs_i +Auto-extracted signal rx_store_brs_i from protocol_control_fsm.vhd +- Offset: `0x99c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rx_store_stuff_count_i +Auto-extracted signal rx_store_stuff_count_i from protocol_control_fsm.vhd +- Offset: `0x9a0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rx_clear_i +Auto-extracted signal rx_clear_i from protocol_control_fsm.vhd +- Offset: `0x9a4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_tx_load_base_id_i +Auto-extracted signal tx_load_base_id_i from protocol_control_fsm.vhd +- Offset: `0x9a8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_tx_load_ext_id_i +Auto-extracted signal tx_load_ext_id_i from protocol_control_fsm.vhd +- Offset: `0x9ac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_tx_load_dlc_i +Auto-extracted signal tx_load_dlc_i from protocol_control_fsm.vhd +- Offset: `0x9b0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_tx_load_data_word_i +Auto-extracted signal tx_load_data_word_i from protocol_control_fsm.vhd +- Offset: `0x9b4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_tx_load_stuff_count_i +Auto-extracted signal tx_load_stuff_count_i from protocol_control_fsm.vhd +- Offset: `0x9b8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_tx_load_crc_i +Auto-extracted signal tx_load_crc_i from protocol_control_fsm.vhd +- Offset: `0x9bc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_tx_shift_ena_i +Auto-extracted signal tx_shift_ena_i from protocol_control_fsm.vhd +- Offset: `0x9c0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_form_err_i +Auto-extracted signal form_err_i from protocol_control_fsm.vhd +- Offset: `0x9c4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_ack_err_i +Auto-extracted signal ack_err_i from protocol_control_fsm.vhd +- Offset: `0x9c8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_ack_err_flag +Auto-extracted signal ack_err_flag from protocol_control_fsm.vhd +- Offset: `0x9cc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_ack_err_flag_clr +Auto-extracted signal ack_err_flag_clr from protocol_control_fsm.vhd +- Offset: `0x9d0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_crc_err_i +Auto-extracted signal crc_err_i from protocol_control_fsm.vhd +- Offset: `0x9d4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_bit_err_arb_i +Auto-extracted signal bit_err_arb_i from protocol_control_fsm.vhd +- Offset: `0x9d8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_sp_control_switch_data +Auto-extracted signal sp_control_switch_data from protocol_control_fsm.vhd +- Offset: `0x9dc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_sp_control_switch_nominal +Auto-extracted signal sp_control_switch_nominal from protocol_control_fsm.vhd +- Offset: `0x9e0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_switch_to_ssp +Auto-extracted signal switch_to_ssp from protocol_control_fsm.vhd +- Offset: `0x9e4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_sp_control_ce +Auto-extracted signal sp_control_ce from protocol_control_fsm.vhd +- Offset: `0x9e8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_sp_control_d +Auto-extracted signal sp_control_d from protocol_control_fsm.vhd +- Offset: `0x9ec` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_sp_control_q_i +Auto-extracted signal sp_control_q_i from protocol_control_fsm.vhd +- Offset: `0x9f0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_ssp_reset_i +Auto-extracted signal ssp_reset_i from protocol_control_fsm.vhd +- Offset: `0x9f4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_sync_control_d +Auto-extracted signal sync_control_d from protocol_control_fsm.vhd +- Offset: `0x9f8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_sync_control_q +Auto-extracted signal sync_control_q from protocol_control_fsm.vhd +- Offset: `0x9fc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_perform_hsync +Auto-extracted signal perform_hsync from protocol_control_fsm.vhd +- Offset: `0xa00` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_primary_err_i +Auto-extracted signal primary_err_i from protocol_control_fsm.vhd +- Offset: `0xa04` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_err_delim_late_i +Auto-extracted signal err_delim_late_i from protocol_control_fsm.vhd +- Offset: `0xa08` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_set_err_active_i +Auto-extracted signal set_err_active_i from protocol_control_fsm.vhd +- Offset: `0xa0c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_set_transmitter_i +Auto-extracted signal set_transmitter_i from protocol_control_fsm.vhd +- Offset: `0xa10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_set_receiver_i +Auto-extracted signal set_receiver_i from protocol_control_fsm.vhd +- Offset: `0xa14` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_set_idle_i +Auto-extracted signal set_idle_i from protocol_control_fsm.vhd +- Offset: `0xa18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_first_err_delim_d +Auto-extracted signal first_err_delim_d from protocol_control_fsm.vhd +- Offset: `0xa1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_first_err_delim_q +Auto-extracted signal first_err_delim_q from protocol_control_fsm.vhd +- Offset: `0xa20` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_stuff_enable_set +Auto-extracted signal stuff_enable_set from protocol_control_fsm.vhd +- Offset: `0xa24` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_stuff_enable_clear +Auto-extracted signal stuff_enable_clear from protocol_control_fsm.vhd +- Offset: `0xa28` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_destuff_enable_set +Auto-extracted signal destuff_enable_set from protocol_control_fsm.vhd +- Offset: `0xa2c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_destuff_enable_clear +Auto-extracted signal destuff_enable_clear from protocol_control_fsm.vhd +- Offset: `0xa30` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_bit_err_disable +Auto-extracted signal bit_err_disable from protocol_control_fsm.vhd +- Offset: `0xa34` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_bit_err_disable_receiver +Auto-extracted signal bit_err_disable_receiver from protocol_control_fsm.vhd +- Offset: `0xa38` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_sof_pulse_i +Auto-extracted signal sof_pulse_i from protocol_control_fsm.vhd +- Offset: `0xa3c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_compl_ctr_ena_i +Auto-extracted signal compl_ctr_ena_i from protocol_control_fsm.vhd +- Offset: `0xa40` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_tick_state_reg +Auto-extracted signal tick_state_reg from protocol_control_fsm.vhd +- Offset: `0xa44` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_br_shifted_i +Auto-extracted signal br_shifted_i from protocol_control_fsm.vhd +- Offset: `0xa48` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_is_arbitration_i +Auto-extracted signal is_arbitration_i from protocol_control_fsm.vhd +- Offset: `0xa4c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_crc_spec_enable_i +Auto-extracted signal crc_spec_enable_i from protocol_control_fsm.vhd +- Offset: `0xa50` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_load_init_vect_i +Auto-extracted signal load_init_vect_i from protocol_control_fsm.vhd +- Offset: `0xa54` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_drv_bus_off_reset_q +Auto-extracted signal drv_bus_off_reset_q from protocol_control_fsm.vhd +- Offset: `0xa58` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_retr_ctr_clear_i +Auto-extracted signal retr_ctr_clear_i from protocol_control_fsm.vhd +- Offset: `0xa5c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_retr_ctr_add_i +Auto-extracted signal retr_ctr_add_i from protocol_control_fsm.vhd +- Offset: `0xa60` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_decrement_rec_i +Auto-extracted signal decrement_rec_i from protocol_control_fsm.vhd +- Offset: `0xa64` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_retr_ctr_add_block +Auto-extracted signal retr_ctr_add_block from protocol_control_fsm.vhd +- Offset: `0xa68` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_retr_ctr_add_block_clr +Auto-extracted signal retr_ctr_add_block_clr from protocol_control_fsm.vhd +- Offset: `0xa6c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_block_txtb_unlock +Auto-extracted signal block_txtb_unlock from protocol_control_fsm.vhd +- Offset: `0xa70` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_tx_frame_no_sof_d +Auto-extracted signal tx_frame_no_sof_d from protocol_control_fsm.vhd +- Offset: `0xa74` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_tx_frame_no_sof_q +Auto-extracted signal tx_frame_no_sof_q from protocol_control_fsm.vhd +- Offset: `0xa78` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_ctrl_signal_upd +Auto-extracted signal ctrl_signal_upd from protocol_control_fsm.vhd +- Offset: `0xa7c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_clr_bus_off_rst_flg +Auto-extracted signal clr_bus_off_rst_flg from protocol_control_fsm.vhd +- Offset: `0xa80` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_pex_on_fdf_enable +Auto-extracted signal pex_on_fdf_enable from protocol_control_fsm.vhd +- Offset: `0xa84` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_pex_on_res_enable +Auto-extracted signal pex_on_res_enable from protocol_control_fsm.vhd +- Offset: `0xa88` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_rx_data_nbs_prev +Auto-extracted signal rx_data_nbs_prev from protocol_control_fsm.vhd +- Offset: `0xa8c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_pexs_set +Auto-extracted signal pexs_set from protocol_control_fsm.vhd +- Offset: `0xa90` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_tran_frame_type_i +Auto-extracted signal tran_frame_type_i from protocol_control_fsm.vhd +- Offset: `0xa94` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_txtb_clk_en_d +Auto-extracted signal txtb_clk_en_d from protocol_control_fsm.vhd +- Offset: `0xa98` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## protocol_control_fsm_txtb_clk_en_q +Auto-extracted signal txtb_clk_en_q from protocol_control_fsm.vhd +- Offset: `0xa9c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## reintegration_counter_reinteg_ctr_ce +Auto-extracted signal reinteg_ctr_ce from reintegration_counter.vhd +- Offset: `0xaa0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## retransmitt_counter_retr_ctr_ce +Auto-extracted signal retr_ctr_ce from retransmitt_counter.vhd +- Offset: `0xaa4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rst_sync_rff +Auto-extracted signal rff from rst_sync.vhd +- Offset: `0xaa8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_drv_erase_rx +Auto-extracted signal drv_erase_rx from rx_buffer.vhd +- Offset: `0xaac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_drv_read_start +Auto-extracted signal drv_read_start from rx_buffer.vhd +- Offset: `0xab0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_drv_clr_ovr +Auto-extracted signal drv_clr_ovr from rx_buffer.vhd +- Offset: `0xab4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_drv_rtsopt +Auto-extracted signal drv_rtsopt from rx_buffer.vhd +- Offset: `0xab8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_read_pointer +Auto-extracted signal read_pointer from rx_buffer.vhd +- Offset: `0xabc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_read_pointer_inc_1 +Auto-extracted signal read_pointer_inc_1 from rx_buffer.vhd +- Offset: `0xac0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_write_pointer +Auto-extracted signal write_pointer from rx_buffer.vhd +- Offset: `0xac4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_write_pointer_raw +Auto-extracted signal write_pointer_raw from rx_buffer.vhd +- Offset: `0xac8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_write_pointer_ts +Auto-extracted signal write_pointer_ts from rx_buffer.vhd +- Offset: `0xacc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_rx_mem_free_i +Auto-extracted signal rx_mem_free_i from rx_buffer.vhd +- Offset: `0xad0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_memory_write_data +Auto-extracted signal memory_write_data from rx_buffer.vhd +- Offset: `0xad4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_data_overrun_flg +Auto-extracted signal data_overrun_flg from rx_buffer.vhd +- Offset: `0xad8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_data_overrun_i +Auto-extracted signal data_overrun_i from rx_buffer.vhd +- Offset: `0xadc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_overrun_condition +Auto-extracted signal overrun_condition from rx_buffer.vhd +- Offset: `0xae0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_rx_empty_i +Auto-extracted signal rx_empty_i from rx_buffer.vhd +- Offset: `0xae4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_is_free_word +Auto-extracted signal is_free_word from rx_buffer.vhd +- Offset: `0xae8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_commit_rx_frame +Auto-extracted signal commit_rx_frame from rx_buffer.vhd +- Offset: `0xaec` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_commit_overrun_abort +Auto-extracted signal commit_overrun_abort from rx_buffer.vhd +- Offset: `0xaf0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_read_increment +Auto-extracted signal read_increment from rx_buffer.vhd +- Offset: `0xaf4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_write_raw_OK +Auto-extracted signal write_raw_OK from rx_buffer.vhd +- Offset: `0xaf8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_write_raw_intent +Auto-extracted signal write_raw_intent from rx_buffer.vhd +- Offset: `0xafc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_write_ts +Auto-extracted signal write_ts from rx_buffer.vhd +- Offset: `0xb00` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_stored_ts +Auto-extracted signal stored_ts from rx_buffer.vhd +- Offset: `0xb04` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_data_selector +Auto-extracted signal data_selector from rx_buffer.vhd +- Offset: `0xb08` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_store_ts_wr_ptr +Auto-extracted signal store_ts_wr_ptr from rx_buffer.vhd +- Offset: `0xb0c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_inc_ts_wr_ptr +Auto-extracted signal inc_ts_wr_ptr from rx_buffer.vhd +- Offset: `0xb10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_reset_overrun_flag +Auto-extracted signal reset_overrun_flag from rx_buffer.vhd +- Offset: `0xb14` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_frame_form_w +Auto-extracted signal frame_form_w from rx_buffer.vhd +- Offset: `0xb18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_timestamp_capture +Auto-extracted signal timestamp_capture from rx_buffer.vhd +- Offset: `0xb1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_timestamp_capture_ce +Auto-extracted signal timestamp_capture_ce from rx_buffer.vhd +- Offset: `0xb20` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_RAM_write +Auto-extracted signal RAM_write from rx_buffer.vhd +- Offset: `0xb24` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_RAM_data_out +Auto-extracted signal RAM_data_out from rx_buffer.vhd +- Offset: `0xb28` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_RAM_write_address +Auto-extracted signal RAM_write_address from rx_buffer.vhd +- Offset: `0xb2c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_RAM_read_address +Auto-extracted signal RAM_read_address from rx_buffer.vhd +- Offset: `0xb30` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_rx_buf_res_n_d +Auto-extracted signal rx_buf_res_n_d from rx_buffer.vhd +- Offset: `0xb34` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_rx_buf_res_n_q +Auto-extracted signal rx_buf_res_n_q from rx_buffer.vhd +- Offset: `0xb38` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_rx_buf_res_n_q_scan +Auto-extracted signal rx_buf_res_n_q_scan from rx_buffer.vhd +- Offset: `0xb3c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_rx_buf_ram_clk_en +Auto-extracted signal rx_buf_ram_clk_en from rx_buffer.vhd +- Offset: `0xb40` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_clk_ram +Auto-extracted signal clk_ram from rx_buffer.vhd +- Offset: `0xb44` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_fsm_rx_fsm_ce +Auto-extracted signal rx_fsm_ce from rx_buffer_fsm.vhd +- Offset: `0xb48` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_fsm_cmd_join +Auto-extracted signal cmd_join from rx_buffer_fsm.vhd +- Offset: `0xb4c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_pointers_write_pointer_raw_ce +Auto-extracted signal write_pointer_raw_ce from rx_buffer_pointers.vhd +- Offset: `0xb50` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_pointers_write_pointer_ts_ce +Auto-extracted signal write_pointer_ts_ce from rx_buffer_pointers.vhd +- Offset: `0xb54` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_ram_port_a_address_i +Auto-extracted signal port_a_address_i from rx_buffer_ram.vhd +- Offset: `0xb58` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_ram_port_a_write_i +Auto-extracted signal port_a_write_i from rx_buffer_ram.vhd +- Offset: `0xb5c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_ram_port_a_data_in_i +Auto-extracted signal port_a_data_in_i from rx_buffer_ram.vhd +- Offset: `0xb60` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_ram_port_b_address_i +Auto-extracted signal port_b_address_i from rx_buffer_ram.vhd +- Offset: `0xb64` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_ram_port_b_data_out_i +Auto-extracted signal port_b_data_out_i from rx_buffer_ram.vhd +- Offset: `0xb68` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_ram_tst_ena +Auto-extracted signal tst_ena from rx_buffer_ram.vhd +- Offset: `0xb6c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_buffer_ram_tst_addr +Auto-extracted signal tst_addr from rx_buffer_ram.vhd +- Offset: `0xb70` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_shift_reg_res_n_i_d +Auto-extracted signal res_n_i_d from rx_shift_reg.vhd +- Offset: `0xb74` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_shift_reg_res_n_i_q +Auto-extracted signal res_n_i_q from rx_shift_reg.vhd +- Offset: `0xb78` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_shift_reg_res_n_i_q_scan +Auto-extracted signal res_n_i_q_scan from rx_shift_reg.vhd +- Offset: `0xb7c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_shift_reg_rx_shift_reg_q +Auto-extracted signal rx_shift_reg_q from rx_shift_reg.vhd +- Offset: `0xb80` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_shift_reg_rx_shift_cmd +Auto-extracted signal rx_shift_cmd from rx_shift_reg.vhd +- Offset: `0xb84` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_shift_reg_rx_shift_in_sel_demuxed +Auto-extracted signal rx_shift_in_sel_demuxed from rx_shift_reg.vhd +- Offset: `0xb88` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_shift_reg_rec_is_rtr_i +Auto-extracted signal rec_is_rtr_i from rx_shift_reg.vhd +- Offset: `0xb8c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## rx_shift_reg_rec_frame_type_i +Auto-extracted signal rec_frame_type_i from rx_shift_reg.vhd +- Offset: `0xb90` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## sample_mux_sample +Auto-extracted signal sample from sample_mux.vhd +- Offset: `0xb94` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## sample_mux_prev_sample_d +Auto-extracted signal prev_sample_d from sample_mux.vhd +- Offset: `0xb98` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## sample_mux_prev_sample_q +Auto-extracted signal prev_sample_q from sample_mux.vhd +- Offset: `0xb9c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_req_input +Auto-extracted signal req_input from segment_end_detector.vhd +- Offset: `0xba0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_segm_end_req_capt_d +Auto-extracted signal segm_end_req_capt_d from segment_end_detector.vhd +- Offset: `0xba4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_segm_end_req_capt_q +Auto-extracted signal segm_end_req_capt_q from segment_end_detector.vhd +- Offset: `0xba8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_segm_end_req_capt_ce +Auto-extracted signal segm_end_req_capt_ce from segment_end_detector.vhd +- Offset: `0xbac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_segm_end_req_capt_clr +Auto-extracted signal segm_end_req_capt_clr from segment_end_detector.vhd +- Offset: `0xbb0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_segm_end_req_capt_dq +Auto-extracted signal segm_end_req_capt_dq from segment_end_detector.vhd +- Offset: `0xbb4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_segm_end_nbt_valid +Auto-extracted signal segm_end_nbt_valid from segment_end_detector.vhd +- Offset: `0xbb8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_segm_end_dbt_valid +Auto-extracted signal segm_end_dbt_valid from segment_end_detector.vhd +- Offset: `0xbbc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_segm_end_nbt_dbt_valid +Auto-extracted signal segm_end_nbt_dbt_valid from segment_end_detector.vhd +- Offset: `0xbc0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_tseg1_end_req_valid +Auto-extracted signal tseg1_end_req_valid from segment_end_detector.vhd +- Offset: `0xbc4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_tseg2_end_req_valid +Auto-extracted signal tseg2_end_req_valid from segment_end_detector.vhd +- Offset: `0xbc8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_h_sync_valid_i +Auto-extracted signal h_sync_valid_i from segment_end_detector.vhd +- Offset: `0xbcc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_segment_end_i +Auto-extracted signal segment_end_i from segment_end_detector.vhd +- Offset: `0xbd0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_nbt_tq_active +Auto-extracted signal nbt_tq_active from segment_end_detector.vhd +- Offset: `0xbd4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_dbt_tq_active +Auto-extracted signal dbt_tq_active from segment_end_detector.vhd +- Offset: `0xbd8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## segment_end_detector_bt_ctr_clear_i +Auto-extracted signal bt_ctr_clear_i from segment_end_detector.vhd +- Offset: `0xbdc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## shift_reg_shift_regs +Auto-extracted signal shift_regs from shift_reg.vhd +- Offset: `0xbe0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## shift_reg_next_shift_reg_val +Auto-extracted signal next_shift_reg_val from shift_reg.vhd +- Offset: `0xbe4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## shift_reg_byte_shift_reg_in +Auto-extracted signal shift_reg_in from shift_reg_byte.vhd +- Offset: `0xbe8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## shift_reg_preload_shift_regs +Auto-extracted signal shift_regs from shift_reg_preload.vhd +- Offset: `0xbec` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## shift_reg_preload_next_shift_reg_val +Auto-extracted signal next_shift_reg_val from shift_reg_preload.vhd +- Offset: `0xbf0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## sig_sync_rff +Auto-extracted signal rff from sig_sync.vhd +- Offset: `0xbf4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_btmc_d +Auto-extracted signal btmc_d from ssp_generator.vhd +- Offset: `0xbf8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_btmc_q +Auto-extracted signal btmc_q from ssp_generator.vhd +- Offset: `0xbfc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_btmc_add +Auto-extracted signal btmc_add from ssp_generator.vhd +- Offset: `0xc00` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_btmc_ce +Auto-extracted signal btmc_ce from ssp_generator.vhd +- Offset: `0xc04` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_btmc_meas_running_d +Auto-extracted signal btmc_meas_running_d from ssp_generator.vhd +- Offset: `0xc08` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_btmc_meas_running_q +Auto-extracted signal btmc_meas_running_q from ssp_generator.vhd +- Offset: `0xc0c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_sspc_d +Auto-extracted signal sspc_d from ssp_generator.vhd +- Offset: `0xc10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_sspc_q +Auto-extracted signal sspc_q from ssp_generator.vhd +- Offset: `0xc14` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_sspc_ce +Auto-extracted signal sspc_ce from ssp_generator.vhd +- Offset: `0xc18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_sspc_expired +Auto-extracted signal sspc_expired from ssp_generator.vhd +- Offset: `0xc1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_sspc_threshold +Auto-extracted signal sspc_threshold from ssp_generator.vhd +- Offset: `0xc20` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_sspc_add +Auto-extracted signal sspc_add from ssp_generator.vhd +- Offset: `0xc24` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_first_ssp_d +Auto-extracted signal first_ssp_d from ssp_generator.vhd +- Offset: `0xc28` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_first_ssp_q +Auto-extracted signal first_ssp_q from ssp_generator.vhd +- Offset: `0xc2c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_sspc_ena_d +Auto-extracted signal sspc_ena_d from ssp_generator.vhd +- Offset: `0xc30` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_sspc_ena_q +Auto-extracted signal sspc_ena_q from ssp_generator.vhd +- Offset: `0xc34` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## ssp_generator_ssp_delay_padded +Auto-extracted signal ssp_delay_padded from ssp_generator.vhd +- Offset: `0xc38` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## synchronisation_checker_resync_edge +Auto-extracted signal resync_edge from synchronisation_checker.vhd +- Offset: `0xc3c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## synchronisation_checker_h_sync_edge +Auto-extracted signal h_sync_edge from synchronisation_checker.vhd +- Offset: `0xc40` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## synchronisation_checker_h_or_re_sync_edge +Auto-extracted signal h_or_re_sync_edge from synchronisation_checker.vhd +- Offset: `0xc44` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## synchronisation_checker_sync_flag +Auto-extracted signal sync_flag from synchronisation_checker.vhd +- Offset: `0xc48` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## synchronisation_checker_sync_flag_ce +Auto-extracted signal sync_flag_ce from synchronisation_checker.vhd +- Offset: `0xc4c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## synchronisation_checker_sync_flag_nxt +Auto-extracted signal sync_flag_nxt from synchronisation_checker.vhd +- Offset: `0xc50` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## test_registers_reg_map_reg_sel +Auto-extracted signal reg_sel from test_registers_reg_map.vhd +- Offset: `0xc54` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## test_registers_reg_map_read_data_mux_in +Auto-extracted signal read_data_mux_in from test_registers_reg_map.vhd +- Offset: `0xc58` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## test_registers_reg_map_read_data_mask_n +Auto-extracted signal read_data_mask_n from test_registers_reg_map.vhd +- Offset: `0xc5c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## test_registers_reg_map_read_mux_ena +Auto-extracted signal read_mux_ena from test_registers_reg_map.vhd +- Offset: `0xc60` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trigger_generator_rx_trig_req_q +Auto-extracted signal rx_trig_req_q from trigger_generator.vhd +- Offset: `0xc64` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trigger_generator_tx_trig_req_flag_d +Auto-extracted signal tx_trig_req_flag_d from trigger_generator.vhd +- Offset: `0xc68` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trigger_generator_tx_trig_req_flag_q +Auto-extracted signal tx_trig_req_flag_q from trigger_generator.vhd +- Offset: `0xc6c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trigger_generator_tx_trig_req_flag_dq +Auto-extracted signal tx_trig_req_flag_dq from trigger_generator.vhd +- Offset: `0xc70` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trigger_mux_tx_trigger_q +Auto-extracted signal tx_trigger_q from trigger_mux.vhd +- Offset: `0xc74` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trv_delay_meas_trv_meas_progress_d +Auto-extracted signal trv_meas_progress_d from trv_delay_meas.vhd +- Offset: `0xc78` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trv_delay_meas_trv_meas_progress_q +Auto-extracted signal trv_meas_progress_q from trv_delay_meas.vhd +- Offset: `0xc7c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trv_delay_meas_trv_meas_progress_del +Auto-extracted signal trv_meas_progress_del from trv_delay_meas.vhd +- Offset: `0xc80` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trv_delay_meas_trv_delay_ctr_q +Auto-extracted signal trv_delay_ctr_q from trv_delay_meas.vhd +- Offset: `0xc84` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trv_delay_meas_trv_delay_ctr_d +Auto-extracted signal trv_delay_ctr_d from trv_delay_meas.vhd +- Offset: `0xc88` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trv_delay_meas_trv_delay_ctr_add +Auto-extracted signal trv_delay_ctr_add from trv_delay_meas.vhd +- Offset: `0xc8c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trv_delay_meas_trv_delay_ctr_q_padded +Auto-extracted signal trv_delay_ctr_q_padded from trv_delay_meas.vhd +- Offset: `0xc90` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trv_delay_meas_trv_delay_ctr_rst_d +Auto-extracted signal trv_delay_ctr_rst_d from trv_delay_meas.vhd +- Offset: `0xc94` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trv_delay_meas_trv_delay_ctr_rst_q +Auto-extracted signal trv_delay_ctr_rst_q from trv_delay_meas.vhd +- Offset: `0xc98` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trv_delay_meas_trv_delay_ctr_rst_q_scan +Auto-extracted signal trv_delay_ctr_rst_q_scan from trv_delay_meas.vhd +- Offset: `0xc9c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trv_delay_meas_ssp_shadow_ce +Auto-extracted signal ssp_shadow_ce from trv_delay_meas.vhd +- Offset: `0xca0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trv_delay_meas_ssp_delay_raw +Auto-extracted signal ssp_delay_raw from trv_delay_meas.vhd +- Offset: `0xca4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trv_delay_meas_ssp_delay_saturated +Auto-extracted signal ssp_delay_saturated from trv_delay_meas.vhd +- Offset: `0xca8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## trv_delay_meas_trv_delay_sum +Auto-extracted signal trv_delay_sum from trv_delay_meas.vhd +- Offset: `0xcac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_select_buf_avail +Auto-extracted signal select_buf_avail from tx_arbitrator.vhd +- Offset: `0xcb0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_txtb_selected_input +Auto-extracted signal txtb_selected_input from tx_arbitrator.vhd +- Offset: `0xcb4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_txtb_timestamp +Auto-extracted signal txtb_timestamp from tx_arbitrator.vhd +- Offset: `0xcb8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_timestamp_valid +Auto-extracted signal timestamp_valid from tx_arbitrator.vhd +- Offset: `0xcbc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_select_index_changed +Auto-extracted signal select_index_changed from tx_arbitrator.vhd +- Offset: `0xcc0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_validated_buffer +Auto-extracted signal validated_buffer from tx_arbitrator.vhd +- Offset: `0xcc4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_ts_low_internal +Auto-extracted signal ts_low_internal from tx_arbitrator.vhd +- Offset: `0xcc8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_tran_dlc_dbl_buf +Auto-extracted signal tran_dlc_dbl_buf from tx_arbitrator.vhd +- Offset: `0xccc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_tran_is_rtr_dbl_buf +Auto-extracted signal tran_is_rtr_dbl_buf from tx_arbitrator.vhd +- Offset: `0xcd0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_tran_ident_type_dbl_buf +Auto-extracted signal tran_ident_type_dbl_buf from tx_arbitrator.vhd +- Offset: `0xcd4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_tran_frame_type_dbl_buf +Auto-extracted signal tran_frame_type_dbl_buf from tx_arbitrator.vhd +- Offset: `0xcd8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_tran_brs_dbl_buf +Auto-extracted signal tran_brs_dbl_buf from tx_arbitrator.vhd +- Offset: `0xcdc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_tran_dlc_com +Auto-extracted signal tran_dlc_com from tx_arbitrator.vhd +- Offset: `0xce0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_tran_is_rtr_com +Auto-extracted signal tran_is_rtr_com from tx_arbitrator.vhd +- Offset: `0xce4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_tran_ident_type_com +Auto-extracted signal tran_ident_type_com from tx_arbitrator.vhd +- Offset: `0xce8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_tran_frame_type_com +Auto-extracted signal tran_frame_type_com from tx_arbitrator.vhd +- Offset: `0xcec` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_tran_brs_com +Auto-extracted signal tran_brs_com from tx_arbitrator.vhd +- Offset: `0xcf0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_tran_frame_valid_com +Auto-extracted signal tran_frame_valid_com from tx_arbitrator.vhd +- Offset: `0xcf4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_tran_identifier_com +Auto-extracted signal tran_identifier_com from tx_arbitrator.vhd +- Offset: `0xcf8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_load_ts_lw_addr +Auto-extracted signal load_ts_lw_addr from tx_arbitrator.vhd +- Offset: `0xcfc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_load_ts_uw_addr +Auto-extracted signal load_ts_uw_addr from tx_arbitrator.vhd +- Offset: `0xd00` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_load_ffmt_w_addr +Auto-extracted signal load_ffmt_w_addr from tx_arbitrator.vhd +- Offset: `0xd04` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_load_ident_w_addr +Auto-extracted signal load_ident_w_addr from tx_arbitrator.vhd +- Offset: `0xd08` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_store_ts_l_w +Auto-extracted signal store_ts_l_w from tx_arbitrator.vhd +- Offset: `0xd0c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_store_md_w +Auto-extracted signal store_md_w from tx_arbitrator.vhd +- Offset: `0xd10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_store_ident_w +Auto-extracted signal store_ident_w from tx_arbitrator.vhd +- Offset: `0xd14` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_buffer_md_w +Auto-extracted signal buffer_md_w from tx_arbitrator.vhd +- Offset: `0xd18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_store_last_txtb_index +Auto-extracted signal store_last_txtb_index from tx_arbitrator.vhd +- Offset: `0xd1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_frame_valid_com_set +Auto-extracted signal frame_valid_com_set from tx_arbitrator.vhd +- Offset: `0xd20` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_frame_valid_com_clear +Auto-extracted signal frame_valid_com_clear from tx_arbitrator.vhd +- Offset: `0xd24` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_tx_arb_locked +Auto-extracted signal tx_arb_locked from tx_arbitrator.vhd +- Offset: `0xd28` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_txtb_meta_clk_en +Auto-extracted signal txtb_meta_clk_en from tx_arbitrator.vhd +- Offset: `0xd2c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_drv_tttm_ena +Auto-extracted signal drv_tttm_ena from tx_arbitrator.vhd +- Offset: `0xd30` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_fsm_tx_arb_fsm_ce +Auto-extracted signal tx_arb_fsm_ce from tx_arbitrator_fsm.vhd +- Offset: `0xd34` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_fsm_fsm_wait_state_d +Auto-extracted signal fsm_wait_state_d from tx_arbitrator_fsm.vhd +- Offset: `0xd38` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_arbitrator_fsm_fsm_wait_state_q +Auto-extracted signal fsm_wait_state_q from tx_arbitrator_fsm.vhd +- Offset: `0xd3c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_data_cache_tx_cache_mem +Auto-extracted signal tx_cache_mem from tx_data_cache.vhd +- Offset: `0xd40` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_shift_reg_tx_sr_output +Auto-extracted signal tx_sr_output from tx_shift_reg.vhd +- Offset: `0xd44` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_shift_reg_tx_sr_ce +Auto-extracted signal tx_sr_ce from tx_shift_reg.vhd +- Offset: `0xd48` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_shift_reg_tx_sr_pload +Auto-extracted signal tx_sr_pload from tx_shift_reg.vhd +- Offset: `0xd4c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_shift_reg_tx_sr_pload_val +Auto-extracted signal tx_sr_pload_val from tx_shift_reg.vhd +- Offset: `0xd50` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_shift_reg_tx_base_id +Auto-extracted signal tx_base_id from tx_shift_reg.vhd +- Offset: `0xd54` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_shift_reg_tx_ext_id +Auto-extracted signal tx_ext_id from tx_shift_reg.vhd +- Offset: `0xd58` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_shift_reg_tx_crc +Auto-extracted signal tx_crc from tx_shift_reg.vhd +- Offset: `0xd5c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_shift_reg_bst_ctr_grey +Auto-extracted signal bst_ctr_grey from tx_shift_reg.vhd +- Offset: `0xd60` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_shift_reg_bst_parity +Auto-extracted signal bst_parity from tx_shift_reg.vhd +- Offset: `0xd64` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## tx_shift_reg_stuff_count +Auto-extracted signal stuff_count from tx_shift_reg.vhd +- Offset: `0xd68` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_txtb_user_accessible +Auto-extracted signal txtb_user_accessible from txt_buffer.vhd +- Offset: `0xd6c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_hw_cbs +Auto-extracted signal hw_cbs from txt_buffer.vhd +- Offset: `0xd70` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_sw_cbs +Auto-extracted signal sw_cbs from txt_buffer.vhd +- Offset: `0xd74` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_txtb_unmask_data_ram +Auto-extracted signal txtb_unmask_data_ram from txt_buffer.vhd +- Offset: `0xd78` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_txtb_port_b_data_i +Auto-extracted signal txtb_port_b_data_i from txt_buffer.vhd +- Offset: `0xd7c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_ram_write +Auto-extracted signal ram_write from txt_buffer.vhd +- Offset: `0xd80` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_ram_read_address +Auto-extracted signal ram_read_address from txt_buffer.vhd +- Offset: `0xd84` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_txtb_ram_clk_en +Auto-extracted signal txtb_ram_clk_en from txt_buffer.vhd +- Offset: `0xd88` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_clk_ram +Auto-extracted signal clk_ram from txt_buffer.vhd +- Offset: `0xd8c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_fsm_abort_applied +Auto-extracted signal abort_applied from txt_buffer_fsm.vhd +- Offset: `0xd90` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_fsm_txt_fsm_ce +Auto-extracted signal txt_fsm_ce from txt_buffer_fsm.vhd +- Offset: `0xd94` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_fsm_go_to_failed +Auto-extracted signal go_to_failed from txt_buffer_fsm.vhd +- Offset: `0xd98` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_fsm_transient_state +Auto-extracted signal transient_state from txt_buffer_fsm.vhd +- Offset: `0xd9c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_ram_port_a_address_i +Auto-extracted signal port_a_address_i from txt_buffer_ram.vhd +- Offset: `0xda0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_ram_port_a_write_i +Auto-extracted signal port_a_write_i from txt_buffer_ram.vhd +- Offset: `0xda4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_ram_port_a_data_in_i +Auto-extracted signal port_a_data_in_i from txt_buffer_ram.vhd +- Offset: `0xda8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_ram_port_b_address_i +Auto-extracted signal port_b_address_i from txt_buffer_ram.vhd +- Offset: `0xdac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_ram_port_b_data_out_i +Auto-extracted signal port_b_data_out_i from txt_buffer_ram.vhd +- Offset: `0xdb0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_ram_tst_ena +Auto-extracted signal tst_ena from txt_buffer_ram.vhd +- Offset: `0xdb4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## txt_buffer_ram_tst_addr +Auto-extracted signal tst_addr from txt_buffer_ram.vhd +- Offset: `0xdb8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## access_signaler_be_active +Auto-extracted signal be_active from access_signaler.vhd +- Offset: `0xdbc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## access_signaler_access_in +Auto-extracted signal access_in from access_signaler.vhd +- Offset: `0xdc0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## access_signaler_access_active +Auto-extracted signal access_active from access_signaler.vhd +- Offset: `0xdc4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## access_signaler_access_active_reg +Auto-extracted signal access_active_reg from access_signaler.vhd +- Offset: `0xdc8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## address_decoder_addr_dec_i +Auto-extracted signal addr_dec_i from address_decoder.vhd +- Offset: `0xdcc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + +## address_decoder_addr_dec_enabled_i +Auto-extracted signal addr_dec_enabled_i from address_decoder.vhd +- Offset: `0xdd0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "value", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:0 | rw | 0x0 | value | Placeholder 32-bit field for extracted signal | + + + +## carfield_regs / doc / carfield_regs.md + +## Summary + +| Name | Offset | Length | Description | +|:-----------------------------------------------------------------------------|:---------|---------:|:-----------------------------------------------------------------------| +| carfield.[`VERSION0`](#version0) | 0x0 | 4 | Cheshire sha256 commit | +| carfield.[`VERSION1`](#version1) | 0x4 | 4 | Safety Island sha256 commit | +| carfield.[`VERSION2`](#version2) | 0x8 | 4 | Security Island sha256 commit | +| carfield.[`VERSION3`](#version3) | 0xc | 4 | PULP Cluster sha256 commit | +| carfield.[`VERSION4`](#version4) | 0x10 | 4 | Spatz CLuster sha256 commit | +| carfield.[`JEDEC_IDCODE`](#jedec_idcode) | 0x14 | 4 | JEDEC ID CODE -TODO assign- | +| carfield.[`GENERIC_SCRATCH0`](#generic_scratch0) | 0x18 | 4 | Scratch | +| carfield.[`GENERIC_SCRATCH1`](#generic_scratch1) | 0x1c | 4 | Scratch | +| carfield.[`HOST_RST`](#host_rst) | 0x20 | 4 | Host Domain reset -active high, inverted in HW- | +| carfield.[`PERIPH_RST`](#periph_rst) | 0x24 | 4 | Periph Domain reset -active high, inverted in HW- | +| carfield.[`SAFETY_ISLAND_RST`](#safety_island_rst) | 0x28 | 4 | Safety Island reset -active high, inverted in HW- | +| carfield.[`SECURITY_ISLAND_RST`](#security_island_rst) | 0x2c | 4 | Security Island reset -active high, inverted in HW- | +| carfield.[`PULP_CLUSTER_RST`](#pulp_cluster_rst) | 0x30 | 4 | PULP Cluster reset -active high, inverted in HW- | +| carfield.[`SPATZ_CLUSTER_RST`](#spatz_cluster_rst) | 0x34 | 4 | Spatz Cluster reset -active high, inverted in HW- | +| carfield.[`L2_RST`](#l2_rst) | 0x38 | 4 | L2 reset -active high, inverted in HW- | +| carfield.[`PERIPH_ISOLATE`](#periph_isolate) | 0x3c | 4 | Periph Domain AXI isolate | +| carfield.[`SAFETY_ISLAND_ISOLATE`](#safety_island_isolate) | 0x40 | 4 | Safety Island AXI isolate | +| carfield.[`SECURITY_ISLAND_ISOLATE`](#security_island_isolate) | 0x44 | 4 | Security Island AXI isolate | +| carfield.[`PULP_CLUSTER_ISOLATE`](#pulp_cluster_isolate) | 0x48 | 4 | PULP Cluster AXI isolate | +| carfield.[`SPATZ_CLUSTER_ISOLATE`](#spatz_cluster_isolate) | 0x4c | 4 | Spatz Cluster AXI isolate | +| carfield.[`L2_ISOLATE`](#l2_isolate) | 0x50 | 4 | L2 AXI isolate | +| carfield.[`PERIPH_ISOLATE_STATUS`](#periph_isolate_status) | 0x54 | 4 | Periph Domain AXI isolate status | +| carfield.[`SAFETY_ISLAND_ISOLATE_STATUS`](#safety_island_isolate_status) | 0x58 | 4 | Safety Island AXI isolate status | +| carfield.[`SECURITY_ISLAND_ISOLATE_STATUS`](#security_island_isolate_status) | 0x5c | 4 | Security Island AXI isolate status | +| carfield.[`PULP_CLUSTER_ISOLATE_STATUS`](#pulp_cluster_isolate_status) | 0x60 | 4 | PULP Cluster AXI isolate status | +| carfield.[`SPATZ_CLUSTER_ISOLATE_STATUS`](#spatz_cluster_isolate_status) | 0x64 | 4 | Spatz Cluster AXI isolate status | +| carfield.[`L2_ISOLATE_STATUS`](#l2_isolate_status) | 0x68 | 4 | L2 AXI isolate status | +| carfield.[`PERIPH_CLK_EN`](#periph_clk_en) | 0x6c | 4 | Periph Domain clk gate enable | +| carfield.[`SAFETY_ISLAND_CLK_EN`](#safety_island_clk_en) | 0x70 | 4 | Safety Island clk gate enable | +| carfield.[`SECURITY_ISLAND_CLK_EN`](#security_island_clk_en) | 0x74 | 4 | Security Island clk gate enable | +| carfield.[`PULP_CLUSTER_CLK_EN`](#pulp_cluster_clk_en) | 0x78 | 4 | PULP Cluster clk gate enable | +| carfield.[`SPATZ_CLUSTER_CLK_EN`](#spatz_cluster_clk_en) | 0x7c | 4 | Spatz Cluster clk gate enable | +| carfield.[`L2_CLK_EN`](#l2_clk_en) | 0x80 | 4 | Shared L2 memory clk gate enable | +| carfield.[`PERIPH_CLK_SEL`](#periph_clk_sel) | 0x84 | 4 | Periph Domain pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`SAFETY_ISLAND_CLK_SEL`](#safety_island_clk_sel) | 0x88 | 4 | Safety Island pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`SECURITY_ISLAND_CLK_SEL`](#security_island_clk_sel) | 0x8c | 4 | Security Island pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`PULP_CLUSTER_CLK_SEL`](#pulp_cluster_clk_sel) | 0x90 | 4 | PULP Cluster pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`SPATZ_CLUSTER_CLK_SEL`](#spatz_cluster_clk_sel) | 0x94 | 4 | Spatz Cluster pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`L2_CLK_SEL`](#l2_clk_sel) | 0x98 | 4 | L2 Memory pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`PERIPH_CLK_DIV_VALUE`](#periph_clk_div_value) | 0x9c | 4 | Periph Domain clk divider value | +| carfield.[`SAFETY_ISLAND_CLK_DIV_VALUE`](#safety_island_clk_div_value) | 0xa0 | 4 | Safety Island clk divider value | +| carfield.[`SECURITY_ISLAND_CLK_DIV_VALUE`](#security_island_clk_div_value) | 0xa4 | 4 | Security Island clk divider value | +| carfield.[`PULP_CLUSTER_CLK_DIV_VALUE`](#pulp_cluster_clk_div_value) | 0xa8 | 4 | PULP Cluster clk divider value | +| carfield.[`SPATZ_CLUSTER_CLK_DIV_VALUE`](#spatz_cluster_clk_div_value) | 0xac | 4 | Spatz Cluster clk divider value | +| carfield.[`L2_CLK_DIV_VALUE`](#l2_clk_div_value) | 0xb0 | 4 | L2 Memory clk divider value | +| carfield.[`HOST_FETCH_ENABLE`](#host_fetch_enable) | 0xb4 | 4 | Host Domain fetch enable | +| carfield.[`SAFETY_ISLAND_FETCH_ENABLE`](#safety_island_fetch_enable) | 0xb8 | 4 | Safety Island fetch enable | +| carfield.[`SECURITY_ISLAND_FETCH_ENABLE`](#security_island_fetch_enable) | 0xbc | 4 | Security Island fetch enable | +| carfield.[`PULP_CLUSTER_FETCH_ENABLE`](#pulp_cluster_fetch_enable) | 0xc0 | 4 | PULP Cluster fetch enable | +| carfield.[`SPATZ_CLUSTER_DEBUG_REQ`](#spatz_cluster_debug_req) | 0xc4 | 4 | Spatz Cluster debug req | +| carfield.[`HOST_BOOT_ADDR`](#host_boot_addr) | 0xc8 | 4 | Host boot address | +| carfield.[`SAFETY_ISLAND_BOOT_ADDR`](#safety_island_boot_addr) | 0xcc | 4 | Safety Island boot address | +| carfield.[`SECURITY_ISLAND_BOOT_ADDR`](#security_island_boot_addr) | 0xd0 | 4 | Security Island boot address | +| carfield.[`PULP_CLUSTER_BOOT_ADDR`](#pulp_cluster_boot_addr) | 0xd4 | 4 | PULP Cluster boot address | +| carfield.[`SPATZ_CLUSTER_BOOT_ADDR`](#spatz_cluster_boot_addr) | 0xd8 | 4 | Spatz Cluster boot address | +| carfield.[`PULP_CLUSTER_BOOT_ENABLE`](#pulp_cluster_boot_enable) | 0xdc | 4 | PULP Cluster boot enable | +| carfield.[`SPATZ_CLUSTER_BUSY`](#spatz_cluster_busy) | 0xe0 | 4 | Spatz Cluster busy | +| carfield.[`PULP_CLUSTER_BUSY`](#pulp_cluster_busy) | 0xe4 | 4 | PULP Cluster busy | +| carfield.[`PULP_CLUSTER_EOC`](#pulp_cluster_eoc) | 0xe8 | 4 | PULP Cluster end of computation | +| carfield.[`ETH_RGMII_PHY_CLK_DIV_EN`](#eth_rgmii_phy_clk_div_en) | 0xec | 4 | Ethernet RGMII PHY clock divider enable bit | +| carfield.[`ETH_RGMII_PHY_CLK_DIV_VALUE`](#eth_rgmii_phy_clk_div_value) | 0xf0 | 4 | Ethernet RGMII PHY clock divider value | +| carfield.[`ETH_MDIO_CLK_DIV_EN`](#eth_mdio_clk_div_en) | 0xf4 | 4 | Ethernet MDIO clock divider enable bit | +| carfield.[`ETH_MDIO_CLK_DIV_VALUE`](#eth_mdio_clk_div_value) | 0xf8 | 4 | Ethernet MDIO clock divider value | + +## VERSION0 +Cheshire sha256 commit +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VERSION0", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:0 | ro | 0x0 | VERSION0 | | + +## VERSION1 +Safety Island sha256 commit +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VERSION1", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:0 | ro | 0x0 | VERSION1 | | + +## VERSION2 +Security Island sha256 commit +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VERSION2", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:0 | ro | 0x0 | VERSION2 | | + +## VERSION3 +PULP Cluster sha256 commit +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VERSION3", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:0 | ro | 0x0 | VERSION3 | | + +## VERSION4 +Spatz CLuster sha256 commit +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VERSION4", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:0 | ro | 0x0 | VERSION4 | | + +## JEDEC_IDCODE +JEDEC ID CODE -TODO assign- +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "JEDEC_IDCODE", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:--------------| +| 31:0 | rw | 0x0 | JEDEC_IDCODE | | + +## GENERIC_SCRATCH0 +Scratch +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "GENERIC_SCRATCH0", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:0 | rw | 0x0 | GENERIC_SCRATCH0 | | + +## GENERIC_SCRATCH1 +Scratch +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "GENERIC_SCRATCH1", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:0 | rw | 0x0 | GENERIC_SCRATCH1 | | + +## HOST_RST +Host Domain reset -active high, inverted in HW- +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "HOST_RST", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 100}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | HOST_RST | | + +## PERIPH_RST +Periph Domain reset -active high, inverted in HW- +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PERIPH_RST | | + +## SAFETY_ISLAND_RST +Safety Island reset -active high, inverted in HW- +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SAFETY_ISLAND_RST | | + +## SECURITY_ISLAND_RST +Security Island reset -active high, inverted in HW- +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 210}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SECURITY_ISLAND_RST | | + +## PULP_CLUSTER_RST +PULP Cluster reset -active high, inverted in HW- +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PULP_CLUSTER_RST | | + +## SPATZ_CLUSTER_RST +Spatz Cluster reset -active high, inverted in HW- +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SPATZ_CLUSTER_RST | | + +## L2_RST +L2 reset -active high, inverted in HW- +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "L2_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | L2_RST | | + +## PERIPH_ISOLATE +Periph Domain AXI isolate +- Offset: `0x3c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 160}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PERIPH_ISOLATE | | + +## SAFETY_ISLAND_ISOLATE +Safety Island AXI isolate +- Offset: `0x40` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | SAFETY_ISLAND_ISOLATE | | + +## SECURITY_ISLAND_ISOLATE +Security Island AXI isolate +- Offset: `0x44` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 250}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | SECURITY_ISLAND_ISOLATE | | + +## PULP_CLUSTER_ISOLATE +PULP Cluster AXI isolate +- Offset: `0x48` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 220}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | PULP_CLUSTER_ISOLATE | | + +## SPATZ_CLUSTER_ISOLATE +Spatz Cluster AXI isolate +- Offset: `0x4c` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | SPATZ_CLUSTER_ISOLATE | | + +## L2_ISOLATE +L2 AXI isolate +- Offset: `0x50` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "L2_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | L2_ISOLATE | | + +## PERIPH_ISOLATE_STATUS +Periph Domain AXI isolate status +- Offset: `0x54` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PERIPH_ISOLATE_STATUS | | + +## SAFETY_ISLAND_ISOLATE_STATUS +Safety Island AXI isolate status +- Offset: `0x58` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 300}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SAFETY_ISLAND_ISOLATE_STATUS | | + +## SECURITY_ISLAND_ISOLATE_STATUS +Security Island AXI isolate status +- Offset: `0x5c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 320}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SECURITY_ISLAND_ISOLATE_STATUS | | + +## PULP_CLUSTER_ISOLATE_STATUS +PULP Cluster AXI isolate status +- Offset: `0x60` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 290}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PULP_CLUSTER_ISOLATE_STATUS | | + +## SPATZ_CLUSTER_ISOLATE_STATUS +Spatz Cluster AXI isolate status +- Offset: `0x64` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 300}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SPATZ_CLUSTER_ISOLATE_STATUS | | + +## L2_ISOLATE_STATUS +L2 AXI isolate status +- Offset: `0x68` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "L2_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | L2_ISOLATE_STATUS | | + +## PERIPH_CLK_EN +Periph Domain clk gate enable +- Offset: `0x6c` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 150}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | PERIPH_CLK_EN | | + +## SAFETY_ISLAND_CLK_EN +Safety Island clk gate enable +- Offset: `0x70` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 220}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SAFETY_ISLAND_CLK_EN | | + +## SECURITY_ISLAND_CLK_EN +Security Island clk gate enable +- Offset: `0x74` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 240}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SECURITY_ISLAND_CLK_EN | | + +## PULP_CLUSTER_CLK_EN +PULP Cluster clk gate enable +- Offset: `0x78` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 210}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PULP_CLUSTER_CLK_EN | | + +## SPATZ_CLUSTER_CLK_EN +Spatz Cluster clk gate enable +- Offset: `0x7c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 220}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SPATZ_CLUSTER_CLK_EN | | + +## L2_CLK_EN +Shared L2 memory clk gate enable +- Offset: `0x80` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "L2_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | L2_CLK_EN | | + +## PERIPH_CLK_SEL +Periph Domain pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x84` +- Reset default: `0x2` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 160}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x2 | PERIPH_CLK_SEL | | + +## SAFETY_ISLAND_CLK_SEL +Safety Island pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x88` +- Reset default: `0x1` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x1 | SAFETY_ISLAND_CLK_SEL | | + +## SECURITY_ISLAND_CLK_SEL +Security Island pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x8c` +- Reset default: `0x1` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 250}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x1 | SECURITY_ISLAND_CLK_SEL | | + +## PULP_CLUSTER_CLK_SEL +PULP Cluster pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x90` +- Reset default: `0x1` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 220}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x1 | PULP_CLUSTER_CLK_SEL | | + +## SPATZ_CLUSTER_CLK_SEL +Spatz Cluster pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x94` +- Reset default: `0x1` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x1 | SPATZ_CLUSTER_CLK_SEL | | + +## L2_CLK_SEL +L2 Memory pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x98` +- Reset default: `0x1` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "L2_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x1 | L2_CLK_SEL | | + +## PERIPH_CLK_DIV_VALUE +Periph Domain clk divider value +- Offset: `0x9c` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | PERIPH_CLK_DIV_VALUE | | + +## SAFETY_ISLAND_CLK_DIV_VALUE +Safety Island clk divider value +- Offset: `0xa0` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | SAFETY_ISLAND_CLK_DIV_VALUE | | + +## SECURITY_ISLAND_CLK_DIV_VALUE +Security Island clk divider value +- Offset: `0xa4` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | SECURITY_ISLAND_CLK_DIV_VALUE | | + +## PULP_CLUSTER_CLK_DIV_VALUE +PULP Cluster clk divider value +- Offset: `0xa8` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | PULP_CLUSTER_CLK_DIV_VALUE | | + +## SPATZ_CLUSTER_CLK_DIV_VALUE +Spatz Cluster clk divider value +- Offset: `0xac` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | SPATZ_CLUSTER_CLK_DIV_VALUE | | + +## L2_CLK_DIV_VALUE +L2 Memory clk divider value +- Offset: `0xb0` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "L2_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | L2_CLK_DIV_VALUE | | + +## HOST_FETCH_ENABLE +Host Domain fetch enable +- Offset: `0xb4` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "HOST_FETCH_ENABLE", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | HOST_FETCH_ENABLE | | + +## SAFETY_ISLAND_FETCH_ENABLE +Safety Island fetch enable +- Offset: `0xb8` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_FETCH_ENABLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 280}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SAFETY_ISLAND_FETCH_ENABLE | | + +## SECURITY_ISLAND_FETCH_ENABLE +Security Island fetch enable +- Offset: `0xbc` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_FETCH_ENABLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 300}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SECURITY_ISLAND_FETCH_ENABLE | | + +## PULP_CLUSTER_FETCH_ENABLE +PULP Cluster fetch enable +- Offset: `0xc0` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_FETCH_ENABLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 270}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PULP_CLUSTER_FETCH_ENABLE | | + +## SPATZ_CLUSTER_DEBUG_REQ +Spatz Cluster debug req +- Offset: `0xc4` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_DEBUG_REQ", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 250}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x0 | SPATZ_CLUSTER_DEBUG_REQ | | + +## HOST_BOOT_ADDR +Host boot address +- Offset: `0xc8` +- Reset default: `0x1000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "HOST_BOOT_ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:--------------| +| 31:0 | rw | 0x1000 | HOST_BOOT_ADDR | | + +## SAFETY_ISLAND_BOOT_ADDR +Safety Island boot address +- Offset: `0xcc` +- Reset default: `0x70000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_BOOT_ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:------------------------|:--------------| +| 31:0 | rw | 0x70000000 | SAFETY_ISLAND_BOOT_ADDR | | + +## SECURITY_ISLAND_BOOT_ADDR +Security Island boot address +- Offset: `0xd0` +- Reset default: `0x70000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_BOOT_ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:--------------------------|:--------------| +| 31:0 | rw | 0x70000000 | SECURITY_ISLAND_BOOT_ADDR | | + +## PULP_CLUSTER_BOOT_ADDR +PULP Cluster boot address +- Offset: `0xd4` +- Reset default: `0x70000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_BOOT_ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:-----------------------|:--------------| +| 31:0 | rw | 0x70000000 | PULP_CLUSTER_BOOT_ADDR | | + +## SPATZ_CLUSTER_BOOT_ADDR +Spatz Cluster boot address +- Offset: `0xd8` +- Reset default: `0x70000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_BOOT_ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:------------------------|:--------------| +| 31:0 | rw | 0x70000000 | SPATZ_CLUSTER_BOOT_ADDR | | + +## PULP_CLUSTER_BOOT_ENABLE +PULP Cluster boot enable +- Offset: `0xdc` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_BOOT_ENABLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 260}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PULP_CLUSTER_BOOT_ENABLE | | + +## SPATZ_CLUSTER_BUSY +Spatz Cluster busy +- Offset: `0xe0` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_BUSY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 200}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | SPATZ_CLUSTER_BUSY | | + +## PULP_CLUSTER_BUSY +PULP Cluster busy +- Offset: `0xe4` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_BUSY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | PULP_CLUSTER_BUSY | | + +## PULP_CLUSTER_EOC +PULP Cluster end of computation +- Offset: `0xe8` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_EOC", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | PULP_CLUSTER_EOC | | + +## ETH_RGMII_PHY_CLK_DIV_EN +Ethernet RGMII PHY clock divider enable bit +- Offset: `0xec` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "ETH_RGMII_PHY_CLK_DIV_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 260}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | ETH_RGMII_PHY_CLK_DIV_EN | | + +## ETH_RGMII_PHY_CLK_DIV_VALUE +Ethernet RGMII PHY clock divider value +- Offset: `0xf0` +- Reset default: `0x64` +- Reset mask: `0xfffff` + +### Fields + +```wavejson +{"reg": [{"name": "ETH_RGMII_PHY_CLK_DIV_VALUE", "bits": 20, "attr": ["rw"], "rotate": 0}, {"bits": 12}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------------|:--------------| +| 31:20 | | | | Reserved | +| 19:0 | rw | 0x64 | ETH_RGMII_PHY_CLK_DIV_VALUE | | + +## ETH_MDIO_CLK_DIV_EN +Ethernet MDIO clock divider enable bit +- Offset: `0xf4` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "ETH_MDIO_CLK_DIV_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 210}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | ETH_MDIO_CLK_DIV_EN | | + +## ETH_MDIO_CLK_DIV_VALUE +Ethernet MDIO clock divider value +- Offset: `0xf8` +- Reset default: `0x64` +- Reset mask: `0xfffff` + +### Fields + +```wavejson +{"reg": [{"name": "ETH_MDIO_CLK_DIV_VALUE", "bits": 20, "attr": ["rw"], "rotate": 0}, {"bits": 12}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------|:--------------| +| 31:20 | | | | Reserved | +| 19:0 | rw | 0x64 | ETH_MDIO_CLK_DIV_VALUE | | + + + +## cheshire / doc / registers.md + +## Summary + +| Name | Offset | Length | Description | +|:-------------------------------------------|:---------|---------:|:---------------------------------------------------| +| cheshire.[`scratch_0`](#scratch) | 0x0 | 4 | Registers for use by software | +| cheshire.[`scratch_1`](#scratch) | 0x4 | 4 | Registers for use by software | +| cheshire.[`scratch_2`](#scratch) | 0x8 | 4 | Registers for use by software | +| cheshire.[`scratch_3`](#scratch) | 0xc | 4 | Registers for use by software | +| cheshire.[`scratch_4`](#scratch) | 0x10 | 4 | Registers for use by software | +| cheshire.[`scratch_5`](#scratch) | 0x14 | 4 | Registers for use by software | +| cheshire.[`scratch_6`](#scratch) | 0x18 | 4 | Registers for use by software | +| cheshire.[`scratch_7`](#scratch) | 0x1c | 4 | Registers for use by software | +| cheshire.[`scratch_8`](#scratch) | 0x20 | 4 | Registers for use by software | +| cheshire.[`scratch_9`](#scratch) | 0x24 | 4 | Registers for use by software | +| cheshire.[`scratch_10`](#scratch) | 0x28 | 4 | Registers for use by software | +| cheshire.[`scratch_11`](#scratch) | 0x2c | 4 | Registers for use by software | +| cheshire.[`scratch_12`](#scratch) | 0x30 | 4 | Registers for use by software | +| cheshire.[`scratch_13`](#scratch) | 0x34 | 4 | Registers for use by software | +| cheshire.[`scratch_14`](#scratch) | 0x38 | 4 | Registers for use by software | +| cheshire.[`scratch_15`](#scratch) | 0x3c | 4 | Registers for use by software | +| cheshire.[`boot_mode`](#boot_mode) | 0x40 | 4 | Method to load boot code (connected to input pins) | +| cheshire.[`rtc_freq`](#rtc_freq) | 0x44 | 4 | Frequency (Hz) configured for RTC | +| cheshire.[`platform_rom`](#platform_rom) | 0x48 | 4 | Address of platform ROM | +| cheshire.[`num_int_harts`](#num_int_harts) | 0x4c | 4 | Number of internal harts | +| cheshire.[`hw_features`](#hw_features) | 0x50 | 4 | Specifies which hardware features are available | +| cheshire.[`llc_size`](#llc_size) | 0x54 | 4 | Total size of LLC in bytes | +| cheshire.[`vga_params`](#vga_params) | 0x58 | 4 | VGA hardware parameters | + +## scratch +Registers for use by software +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:-----------|:---------| +| scratch_0 | 0x0 | +| scratch_1 | 0x4 | +| scratch_2 | 0x8 | +| scratch_3 | 0xc | +| scratch_4 | 0x10 | +| scratch_5 | 0x14 | +| scratch_6 | 0x18 | +| scratch_7 | 0x1c | +| scratch_8 | 0x20 | +| scratch_9 | 0x24 | +| scratch_10 | 0x28 | +| scratch_11 | 0x2c | +| scratch_12 | 0x30 | +| scratch_13 | 0x34 | +| scratch_14 | 0x38 | +| scratch_15 | 0x3c | + + +### Fields + +```wavejson +{"reg": [{"name": "scratch", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:------------------------------| +| 31:0 | rw | 0x0 | scratch | Registers for use by software | + +## boot_mode +Method to load boot code (connected to input pins) +- Offset: `0x40` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "boot_mode", "bits": 2, "attr": ["ro"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------------| +| 31:2 | | | Reserved | +| 1:0 | ro | x | [boot_mode](#boot_mode--boot_mode) | + +### boot_mode . boot_mode +Method to load boot code (connected to input pins) + +| Value | Name | Description | +|:--------|:--------------|:-------------------------------------| +| 0x0 | passive | Wait for external preload and launch | +| 0x1 | spi_sdcard | Boot from SD Card in SPI mode | +| 0x2 | spi_s25fs512s | Boot from S25FS512S SPI NOR flash | +| 0x3 | i2c_24xx1025 | Boot from 24xx1025 I2C EEPROM | + + +## rtc_freq +Frequency (Hz) configured for RTC +- Offset: `0x44` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "ref_freq", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:----------------------------------| +| 31:0 | ro | x | ref_freq | Frequency (Hz) configured for RTC | + +## platform_rom +Address of platform ROM +- Offset: `0x48` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "platform_rom", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:------------------------| +| 31:0 | ro | x | platform_rom | Address of platform ROM | + +## num_int_harts +Number of internal harts +- Offset: `0x4c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "num_harts", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-------------------------| +| 31:0 | ro | x | num_harts | Number of internal harts | + +## hw_features +Specifies which hardware features are available +- Offset: `0x50` +- Reset default: `0x0` +- Reset mask: `0x1fff` + +### Fields + +```wavejson +{"reg": [{"name": "bootrom", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "llc", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "uart", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "spi_host", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "i2c", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "gpio", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "dma", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "serial_link", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "vga", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "axirt", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "clic", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "irq_router", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "bus_err", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 19}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:---------------------------------| +| 31:13 | | | | Reserved | +| 12 | ro | x | bus_err | Whether UNBENT is available | +| 11 | ro | x | irq_router | Whether IRQ router is available | +| 10 | ro | x | clic | Whether CLIC is available | +| 9 | ro | x | axirt | Whether AXI RT is available | +| 8 | ro | x | vga | Whether VGA is available | +| 7 | ro | x | serial_link | Whether serial link is available | +| 6 | ro | x | dma | Whether DMA is available | +| 5 | ro | x | gpio | Whether GPIO is available | +| 4 | ro | x | i2c | Whether I2C is available | +| 3 | ro | x | spi_host | Whether SPI host is available | +| 2 | ro | x | uart | Whether UART is available | +| 1 | ro | x | llc | Whether LLC is available | +| 0 | ro | x | bootrom | Whether boot ROM is available | + +## llc_size +Total size of LLC in bytes +- Offset: `0x54` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "llc_size", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:---------------------------| +| 31:0 | ro | x | llc_size | Total size of LLC in bytes | + +## vga_params +VGA hardware parameters +- Offset: `0x58` +- Reset default: `0x0` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "red_width", "bits": 8, "attr": ["ro"], "rotate": 0}, {"name": "green_width", "bits": 8, "attr": ["ro"], "rotate": 0}, {"name": "blue_width", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:--------------------| +| 31:24 | | | | Reserved | +| 23:16 | ro | x | blue_width | Blue channel width | +| 15:8 | ro | x | green_width | Green channel width | +| 7:0 | ro | x | red_width | Red channel width | + + + +## clic / doc / clicint_registers.md + +## Summary + +| Name | Offset | Length | Description | +|:------------------------------|:---------|---------:|:------------------------------------------------------| +| CLICINT.[`CLICINT`](#clicint) | 0x0 | 4 | CLIC interrupt pending, enable, attribute and control | + +## CLICINT +CLIC interrupt pending, enable, attribute and control +- Offset: `0x0` +- Reset default: `0xc00000` +- Reset mask: `0xffc70101` + +### Fields + +```wavejson +{"reg": [{"name": "IP", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 7}, {"name": "IE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 7}, {"name": "ATTR_SHV", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ATTR_TRIG", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 3}, {"name": "ATTR_MODE", "bits": 2, "attr": ["rw"], "rotate": -90}, {"name": "CTL", "bits": 8, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:---------------------------------------------| +| 31:24 | rw | 0x0 | CTL | interrupt control for interrupt | +| 23:22 | rw | 0x3 | ATTR_MODE | privilege mode of this interrupt | +| 21:19 | | | | Reserved | +| 18:17 | rw | 0x0 | ATTR_TRIG | specify trigger type for this interrupt | +| 16 | rw | 0x0 | ATTR_SHV | enable hardware vectoring for this interrupt | +| 15:9 | | | | Reserved | +| 8 | rw | 0x0 | IE | interrupt enable for interrupt | +| 7:1 | | | | Reserved | +| 0 | rw | 0x0 | IP | interrupt pending for interrupt | + + + +## clic / doc / clictv_registers.md + +## Summary + +| Name | Offset | Length | Description | +|:---------------------------------|:---------|---------:|:------------------------------| +| CLICINTV.[`CLICINTV`](#clicintv) | 0x0 | 4 | CLIC interrupt virtualization | + +## CLICINTV +CLIC interrupt virtualization +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xfdfdfdfd` + +### Fields + +```wavejson +{"reg": [{"name": "V0", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 1}, {"name": "VSID0", "bits": 6, "attr": ["rw"], "rotate": 0}, {"name": "V1", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 1}, {"name": "VSID1", "bits": 6, "attr": ["rw"], "rotate": 0}, {"name": "V2", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 1}, {"name": "VSID2", "bits": 6, "attr": ["rw"], "rotate": 0}, {"name": "V3", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 1}, {"name": "VSID3", "bits": 6, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------| +| 31:26 | rw | 0x0 | VSID3 | interrupt VS id | +| 25 | | | | Reserved | +| 24 | rw | 0x0 | V3 | interrupt delegated to VS-mode | +| 23:18 | rw | 0x0 | VSID2 | interrupt VS id | +| 17 | | | | Reserved | +| 16 | rw | 0x0 | V2 | interrupt delegated to VS-mode | +| 15:10 | rw | 0x0 | VSID1 | interrupt VS id | +| 9 | | | | Reserved | +| 8 | rw | 0x0 | V1 | interrupt delegated to VS-mode | +| 7:2 | rw | 0x0 | VSID0 | interrupt VS id | +| 1 | | | | Reserved | +| 0 | rw | 0x0 | V0 | interrupt delegated to VS-mode | + + + +## clic / doc / clicvs_registers.md + +## Summary + +| Name | Offset | Length | Description | +|:---------------------------|:---------|---------:|:---------------------------------| +| CLICVS.[`vsprio`](#vsprio) | 0x0 | 4 | CLIC virtual supervisor priority | + +## vsprio +CLIC virtual supervisor priority +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0x1010101` + +### Fields + +```wavejson +{"reg": [{"name": "prio0", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 7}, {"name": "prio1", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 7}, {"name": "prio2", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 7}, {"name": "prio3", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 7}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:25 | | | | Reserved | +| 24 | rw | 0x0 | prio3 | VS3 priority | +| 23:17 | | | | Reserved | +| 16 | rw | 0x0 | prio2 | VS2 priority | +| 15:9 | | | | Reserved | +| 8 | rw | 0x0 | prio1 | VS1 priority | +| 7:1 | | | | Reserved | +| 0 | rw | 0x0 | prio0 | VS0 priority | + + + +## clic / doc / mclic_registers.md + +## Summary + +| Name | Offset | Length | Description | +|:----------------------------------------|:---------|---------:|:---------------------------------------| +| MCLIC.[`MCLICCFG`](#mcliccfg) | 0x0 | 4 | CLIC configuration | +| MCLIC.[`CLICMNXTICONF`](#clicmnxticonf) | 0x4 | 4 | CLIC enable mnxti irq forwarding logic | + +## MCLICCFG +CLIC configuration +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xff0f003f` + +### Fields + +```wavejson +{"reg": [{"name": "mnlbits", "bits": 4, "attr": ["rw"], "rotate": -90}, {"name": "nmbits", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 10}, {"name": "snlbits", "bits": 4, "attr": ["rw"], "rotate": -90}, {"bits": 4}, {"name": "unlbits", "bits": 4, "attr": ["rw"], "rotate": -90}, {"name": "reserved", "bits": 4, "attr": ["ro"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 100}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:-------------------------------------------------| +| 31:28 | ro | 0x0 | reserved | reserved | +| 27:24 | rw | 0x0 | unlbits | number of privilege mode bits in user mode | +| 23:20 | | | | Reserved | +| 19:16 | rw | 0x0 | snlbits | number of privilege mode bits in supervisor mode | +| 15:6 | | | | Reserved | +| 5:4 | rw | 0x0 | nmbits | number of privilege mode bits | +| 3:0 | rw | 0x0 | mnlbits | number of interrupt level bits in machine mode | + +## CLICMNXTICONF +CLIC enable mnxti irq forwarding logic +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "CLICMNXTICONF", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 150}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | CLICMNXTICONF | | + + + +## clint / doc / registers.md + +## Summary + +| Name | Offset | Length | Description | +|:------------------------------------------|:---------|---------:|:-----------------------------------| +| CLINT.[`MSIP_0`](#msip) | 0x0 | 4 | Machine Software Interrupt Pending | +| CLINT.[`MSIP_1`](#msip) | 0x4 | 4 | Machine Software Interrupt Pending | +| CLINT.[`MTIMECMP_LOW0`](#mtimecmp_low0) | 0x4000 | 4 | Machine Timer Compare for Core 0 | +| CLINT.[`MTIMECMP_HIGH0`](#mtimecmp_high0) | 0x4004 | 4 | Machine Timer Compare for Core 0 | +| CLINT.[`MTIMECMP_LOW1`](#mtimecmp_low1) | 0x4008 | 4 | Machine Timer Compare for Core 1 | +| CLINT.[`MTIMECMP_HIGH1`](#mtimecmp_high1) | 0x400c | 4 | Machine Timer Compare for Core 1 | +| CLINT.[`MTIME_LOW`](#mtime_low) | 0xbff8 | 4 | Timer Register Low | +| CLINT.[`MTIME_HIGH`](#mtime_high) | 0xbffc | 4 | Timer Register High | + +## MSIP +Machine Software Interrupt Pending +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:-------|:---------| +| MSIP_0 | 0x0 | +| MSIP_1 | 0x4 | + + +### Fields + +```wavejson +{"reg": [{"name": "P", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RSVD", "bits": 31, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------| +| 31:1 | ro | 0x0 | RSVD | Reserved | +| 0 | rw | 0x0 | P | Machine Software Interrupt Pending | + +## MTIMECMP_LOW0 +Machine Timer Compare for Core 0 +- Offset: `0x4000` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MTIMECMP_LOW", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:----------------------------------| +| 31:0 | rw | 0x0 | MTIMECMP_LOW | Machine Time Compare (Low) Core 0 | + +## MTIMECMP_HIGH0 +Machine Timer Compare for Core 0 +- Offset: `0x4004` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MTIMECMP_HIGH", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:-----------------------------------| +| 31:0 | rw | 0x0 | MTIMECMP_HIGH | Machine Time Compare (High) Core 0 | + +## MTIMECMP_LOW1 +Machine Timer Compare for Core 1 +- Offset: `0x4008` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MTIMECMP_LOW", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:----------------------------------| +| 31:0 | rw | 0x0 | MTIMECMP_LOW | Machine Time Compare (Low) Core 1 | + +## MTIMECMP_HIGH1 +Machine Timer Compare for Core 1 +- Offset: `0x400c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MTIMECMP_HIGH", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:-----------------------------------| +| 31:0 | rw | 0x0 | MTIMECMP_HIGH | Machine Time Compare (High) Core 1 | + +## MTIME_LOW +Timer Register Low +- Offset: `0xbff8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MTIME_LOW", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-------------------| +| 31:0 | rw | 0x0 | MTIME_LOW | Machine Time (Low) | + +## MTIME_HIGH +Timer Register High +- Offset: `0xbffc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MTIME_HIGH", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------------| +| 31:0 | rw | 0x0 | MTIME_HIGH | Machine Time (High) | + + + +## cl_event_unit / doc / registers.md + +## Summary + +| Name | Offset | Length | Description | +|:-----------------------------------------------------------------------------------|:---------|---------:|:---------------------------------------------------------------------------------------------------| +| cluster_event_unit.[`EVT_MASK`](#evt_mask) | 0x0 | 4 | Input event mask configuration register. | +| cluster_event_unit.[`EVT_MASK_AND`](#evt_mask_and) | 0x4 | 4 | Input event mask update command register with bitwise AND operation. | +| cluster_event_unit.[`EVT_MASK_OR`](#evt_mask_or) | 0x8 | 4 | Input event mask update command register with bitwise OR operation. | +| cluster_event_unit.[`IRQ_MASK`](#irq_mask) | 0xc | 4 | Interrupt request mask configuration register. | +| cluster_event_unit.[`IRQ_MASK_AND`](#irq_mask_and) | 0x10 | 4 | Interrupt request mask update command register with bitwise AND operation. | +| cluster_event_unit.[`IRQ_MASK_OR`](#irq_mask_or) | 0x14 | 4 | Interrupt request mask update command register with bitwise OR operation. | +| cluster_event_unit.[`CLOCK_STATUS`](#clock_status) | 0x18 | 4 | Cluster cores clock status register. | +| cluster_event_unit.[`EVENT_BUFFER`](#event_buffer) | 0x1c | 4 | Pending input events status register. | +| cluster_event_unit.[`EVENT_BUFFER_MASKED`](#event_buffer_masked) | 0x20 | 4 | Pending input events status register with EVT_MASK applied. | +| cluster_event_unit.[`EVENT_BUFFER_IRQ_MASKED`](#event_buffer_irq_masked) | 0x24 | 4 | Pending input events status register with IRQ_MASK applied. | +| cluster_event_unit.[`EVENT_BUFFER_CLEAR`](#event_buffer_clear) | 0x28 | 4 | Pending input events status clear command register. | +| cluster_event_unit.[`SW_EVENT_MASK`](#sw_event_mask) | 0x2c | 4 | Software events cluster cores destination mask configuration register. | +| cluster_event_unit.[`SW_EVENT_MASK_AND`](#sw_event_mask_and) | 0x30 | 4 | Software events cluster cores destination mask update command register with bitwise AND operation. | +| cluster_event_unit.[`SW_EVENT_MASK_OR`](#sw_event_mask_or) | 0x34 | 4 | Software events cluster cores destination mask update command register with bitwise OR operation. | +| cluster_event_unit.[`EVENT_WAIT`](#event_wait) | 0x38 | 4 | Input event wait command register. | +| cluster_event_unit.[`EVENT_WAIT_CLEAR`](#event_wait_clear) | 0x3c | 4 | Input event wait and clear command register. | +| cluster_event_unit.[`HW_DISPATCH_PUSH_TASK`](#hw_dispatch_push_task) | 0x40 | 4 | Hardware task dispatcher push command register. | +| cluster_event_unit.[`HW_DISPATCH_POP_TASK`](#hw_dispatch_pop_task) | 0x44 | 4 | Hardware task dispatcher pop command register. | +| cluster_event_unit.[`HW_DISPATCH_PUSH_TEAM_CONFIG`](#hw_dispatch_push_team_config) | 0x48 | 4 | Hardware task dispatcher cluster core team configuration register. | +| cluster_event_unit.[`HW_MUTEX_0_MSG_PUT`](#hw_mutex_0_msg_put) | 0x4c | 4 | Hardware mutex 0 non-blocking put command register. | +| cluster_event_unit.[`HW_MUTEX_0_MSG_GET`](#hw_mutex_0_msg_get) | 0x50 | 4 | Hardware mutex 0 blocking get command register. | +| cluster_event_unit.[`HW_MUTEX_1_MSG_PUT`](#hw_mutex_1_msg_put) | 0x54 | 4 | Hardware mutex 1 non-blocking put command register. | +| cluster_event_unit.[`HW_MUTEX_1_MSG_GET`](#hw_mutex_1_msg_get) | 0x58 | 4 | Hardware mutex 1 blocking get command register. | +| cluster_event_unit.[`SW_EVENT_0_TRIG`](#sw_event_0_trig) | 0x5c | 4 | Cluster Software event 0 trigger command register. | +| cluster_event_unit.[`SW_EVENT_1_TRIG`](#sw_event_1_trig) | 0x60 | 4 | Cluster Software event 1 trigger command register. | +| cluster_event_unit.[`SW_EVENT_2_TRIG`](#sw_event_2_trig) | 0x64 | 4 | Cluster Software event 2 trigger command register. | +| cluster_event_unit.[`SW_EVENT_3_TRIG`](#sw_event_3_trig) | 0x68 | 4 | Cluster Software event 3 trigger command register. | +| cluster_event_unit.[`SW_EVENT_4_TRIG`](#sw_event_4_trig) | 0x6c | 4 | Cluster Software event 4 trigger command register. | +| cluster_event_unit.[`SW_EVENT_5_TRIG`](#sw_event_5_trig) | 0x70 | 4 | Cluster Software event 5 trigger command register. | +| cluster_event_unit.[`SW_EVENT_6_TRIG`](#sw_event_6_trig) | 0x74 | 4 | Cluster Software event 6 trigger command register. | +| cluster_event_unit.[`SW_EVENT_7_TRIG`](#sw_event_7_trig) | 0x78 | 4 | Cluster Software event 7 trigger command register. | +| cluster_event_unit.[`SW_EVENT_0_TRIG_WAIT`](#sw_event_0_trig_wait) | 0x7c | 4 | Cluster Software event 0 trigger and wait command register. | +| cluster_event_unit.[`SW_EVENT_1_TRIG_WAIT`](#sw_event_1_trig_wait) | 0x80 | 4 | Cluster Software event 1 trigger and wait command register. | +| cluster_event_unit.[`SW_EVENT_2_TRIG_WAIT`](#sw_event_2_trig_wait) | 0x84 | 4 | Cluster Software event 2 trigger and wait command register. | +| cluster_event_unit.[`SW_EVENT_3_TRIG_WAIT`](#sw_event_3_trig_wait) | 0x88 | 4 | Cluster Software event 3 trigger and wait command register. | +| cluster_event_unit.[`SW_EVENT_4_TRIG_WAIT`](#sw_event_4_trig_wait) | 0x8c | 4 | Cluster Software event 4 trigger and wait command register. | +| cluster_event_unit.[`SW_EVENT_5_TRIG_WAIT`](#sw_event_5_trig_wait) | 0x90 | 4 | Cluster Software event 5 trigger and wait command register. | +| cluster_event_unit.[`SW_EVENT_6_TRIG_WAIT`](#sw_event_6_trig_wait) | 0x94 | 4 | Cluster Software event 6 trigger and wait command register. | +| cluster_event_unit.[`SW_EVENT_7_TRIG_WAIT`](#sw_event_7_trig_wait) | 0x98 | 4 | Cluster Software event 7 trigger and wait command register. | +| cluster_event_unit.[`SW_EVENT_0_TRIG_WAIT_CLEAR`](#sw_event_0_trig_wait_clear) | 0x9c | 4 | Cluster Software event 0 trigger, wait and clear command register. | +| cluster_event_unit.[`SW_EVENT_1_TRIG_WAIT_CLEAR`](#sw_event_1_trig_wait_clear) | 0xa0 | 4 | Cluster Software event 1 trigger, wait and clear command register. | +| cluster_event_unit.[`SW_EVENT_2_TRIG_WAIT_CLEAR`](#sw_event_2_trig_wait_clear) | 0xa4 | 4 | Cluster Software event 2 trigger, wait and clear command register. | +| cluster_event_unit.[`SW_EVENT_3_TRIG_WAIT_CLEAR`](#sw_event_3_trig_wait_clear) | 0xa8 | 4 | Cluster Software event 3 trigger, wait and clear command register. | +| cluster_event_unit.[`SW_EVENT_4_TRIG_WAIT_CLEAR`](#sw_event_4_trig_wait_clear) | 0xac | 4 | Cluster Software event 4 trigger, wait and clear command register. | +| cluster_event_unit.[`SW_EVENT_5_TRIG_WAIT_CLEAR`](#sw_event_5_trig_wait_clear) | 0xb0 | 4 | Cluster Software event 5 trigger, wait and clear command register. | +| cluster_event_unit.[`SW_EVENT_6_TRIG_WAIT_CLEAR`](#sw_event_6_trig_wait_clear) | 0xb4 | 4 | Cluster Software event 6 trigger, wait and clear command register. | +| cluster_event_unit.[`SW_EVENT_7_TRIG_WAIT_CLEAR`](#sw_event_7_trig_wait_clear) | 0xb8 | 4 | Cluster Software event 7 trigger, wait and clear command register. | +| cluster_event_unit.[`SOC_PERIPH_EVENT_ID`](#soc_periph_event_id) | 0xbc | 4 | Cluster SoC peripheral event ID status register. | +| cluster_event_unit.[`HW_BARRIER_0_TRIG_MASK`](#hw_barrier_0_trig_mask) | 0xc0 | 4 | Cluster hardware barrier 0 trigger mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_1_TRIG_MASK`](#hw_barrier_1_trig_mask) | 0xc4 | 4 | Cluster hardware barrier 1 trigger mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_2_TRIG_MASK`](#hw_barrier_2_trig_mask) | 0xc8 | 4 | Cluster hardware barrier 2 trigger mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_3_TRIG_MASK`](#hw_barrier_3_trig_mask) | 0xcc | 4 | Cluster hardware barrier 3 trigger mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_4_TRIG_MASK`](#hw_barrier_4_trig_mask) | 0xd0 | 4 | Cluster hardware barrier 4 trigger mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_5_TRIG_MASK`](#hw_barrier_5_trig_mask) | 0xd4 | 4 | Cluster hardware barrier 5 trigger mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_6_TRIG_MASK`](#hw_barrier_6_trig_mask) | 0xd8 | 4 | Cluster hardware barrier 6 trigger mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_7_TRIG_MASK`](#hw_barrier_7_trig_mask) | 0xdc | 4 | Cluster hardware barrier 7 trigger mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_0_STATUS`](#hw_barrier_0_status) | 0xe0 | 4 | Cluster hardware barrier 0 status register. | +| cluster_event_unit.[`HW_BARRIER_1_STATUS`](#hw_barrier_1_status) | 0xe4 | 4 | Cluster hardware barrier 1 status register. | +| cluster_event_unit.[`HW_BARRIER_2_STATUS`](#hw_barrier_2_status) | 0xe8 | 4 | Cluster hardware barrier 2 status register. | +| cluster_event_unit.[`HW_BARRIER_3_STATUS`](#hw_barrier_3_status) | 0xec | 4 | Cluster hardware barrier 3 status register. | +| cluster_event_unit.[`HW_BARRIER_4_STATUS`](#hw_barrier_4_status) | 0xf0 | 4 | Cluster hardware barrier 4 status register. | +| cluster_event_unit.[`HW_BARRIER_5_STATUS`](#hw_barrier_5_status) | 0xf4 | 4 | Cluster hardware barrier 5 status register. | +| cluster_event_unit.[`HW_BARRIER_6_STATUS`](#hw_barrier_6_status) | 0xf8 | 4 | Cluster hardware barrier 6 status register. | +| cluster_event_unit.[`HW_BARRIER_7_STATUS`](#hw_barrier_7_status) | 0xfc | 4 | Cluster hardware barrier 7 status register. | +| cluster_event_unit.[`HW_BARRIER_0_STATUS_SUM`](#hw_barrier_0_status_sum) | 0x100 | 4 | Cluster hardware barrier summary status register. | +| cluster_event_unit.[`HW_BARRIER_1_STATUS_SUM`](#hw_barrier_1_status_sum) | 0x104 | 4 | Cluster hardware barrier summary status register. | +| cluster_event_unit.[`HW_BARRIER_2_STATUS_SUM`](#hw_barrier_2_status_sum) | 0x108 | 4 | Cluster hardware barrier summary status register. | +| cluster_event_unit.[`HW_BARRIER_3_STATUS_SUM`](#hw_barrier_3_status_sum) | 0x10c | 4 | Cluster hardware barrier summary status register. | +| cluster_event_unit.[`HW_BARRIER_4_STATUS_SUM`](#hw_barrier_4_status_sum) | 0x110 | 4 | Cluster hardware barrier summary status register. | +| cluster_event_unit.[`HW_BARRIER_5_STATUS_SUM`](#hw_barrier_5_status_sum) | 0x114 | 4 | Cluster hardware barrier summary status register. | +| cluster_event_unit.[`HW_BARRIER_6_STATUS_SUM`](#hw_barrier_6_status_sum) | 0x118 | 4 | Cluster hardware barrier summary status register. | +| cluster_event_unit.[`HW_BARRIER_7_STATUS_SUM`](#hw_barrier_7_status_sum) | 0x11c | 4 | Cluster hardware barrier summary status register. | +| cluster_event_unit.[`HW_BARRIER_0_TARGET_MASK`](#hw_barrier_0_target_mask) | 0x120 | 4 | Cluster hardware barrier 0 target mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_1_TARGET_MASK`](#hw_barrier_1_target_mask) | 0x124 | 4 | Cluster hardware barrier 1 target mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_2_TARGET_MASK`](#hw_barrier_2_target_mask) | 0x128 | 4 | Cluster hardware barrier 2 target mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_3_TARGET_MASK`](#hw_barrier_3_target_mask) | 0x12c | 4 | Cluster hardware barrier 3 target mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_4_TARGET_MASK`](#hw_barrier_4_target_mask) | 0x130 | 4 | Cluster hardware barrier 4 target mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_5_TARGET_MASK`](#hw_barrier_5_target_mask) | 0x134 | 4 | Cluster hardware barrier 5 target mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_6_TARGET_MASK`](#hw_barrier_6_target_mask) | 0x138 | 4 | Cluster hardware barrier 6 target mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_7_TARGET_MASK`](#hw_barrier_7_target_mask) | 0x13c | 4 | Cluster hardware barrier 7 target mask configuration register. | +| cluster_event_unit.[`HW_BARRIER_0_TRIG`](#hw_barrier_0_trig) | 0x140 | 4 | Cluster hardware barrier 0 trigger command register. | +| cluster_event_unit.[`HW_BARRIER_1_TRIG`](#hw_barrier_1_trig) | 0x144 | 4 | Cluster hardware barrier 1 trigger command register. | +| cluster_event_unit.[`HW_BARRIER_2_TRIG`](#hw_barrier_2_trig) | 0x148 | 4 | Cluster hardware barrier 2 trigger command register. | +| cluster_event_unit.[`HW_BARRIER_3_TRIG`](#hw_barrier_3_trig) | 0x14c | 4 | Cluster hardware barrier 3 trigger command register. | +| cluster_event_unit.[`HW_BARRIER_4_TRIG`](#hw_barrier_4_trig) | 0x150 | 4 | Cluster hardware barrier 4 trigger command register. | +| cluster_event_unit.[`HW_BARRIER_5_TRIG`](#hw_barrier_5_trig) | 0x154 | 4 | Cluster hardware barrier 5 trigger command register. | +| cluster_event_unit.[`HW_BARRIER_6_TRIG`](#hw_barrier_6_trig) | 0x158 | 4 | Cluster hardware barrier 6 trigger command register. | +| cluster_event_unit.[`HW_BARRIER_7_TRIG`](#hw_barrier_7_trig) | 0x15c | 4 | Cluster hardware barrier 7 trigger command register. | +| cluster_event_unit.[`HW_BARRIER_0_SELF_TRIG`](#hw_barrier_0_self_trig) | 0x160 | 4 | Cluster hardware barrier 0 self trigger command register. | +| cluster_event_unit.[`HW_BARRIER_1_SELF_TRIG`](#hw_barrier_1_self_trig) | 0x164 | 4 | Cluster hardware barrier 1 self trigger command register. | +| cluster_event_unit.[`HW_BARRIER_2_SELF_TRIG`](#hw_barrier_2_self_trig) | 0x168 | 4 | Cluster hardware barrier 2 self trigger command register. | +| cluster_event_unit.[`HW_BARRIER_3_SELF_TRIG`](#hw_barrier_3_self_trig) | 0x16c | 4 | Cluster hardware barrier 3 self trigger command register. | +| cluster_event_unit.[`HW_BARRIER_4_SELF_TRIG`](#hw_barrier_4_self_trig) | 0x170 | 4 | Cluster hardware barrier 4 self trigger command register. | +| cluster_event_unit.[`HW_BARRIER_5_SELF_TRIG`](#hw_barrier_5_self_trig) | 0x174 | 4 | Cluster hardware barrier 5 self trigger command register. | +| cluster_event_unit.[`HW_BARRIER_6_SELF_TRIG`](#hw_barrier_6_self_trig) | 0x178 | 4 | Cluster hardware barrier 6 self trigger command register. | +| cluster_event_unit.[`HW_BARRIER_7_SELF_TRIG`](#hw_barrier_7_self_trig) | 0x17c | 4 | Cluster hardware barrier 7 self trigger command register. | +| cluster_event_unit.[`HW_BARRIER_0_TRIG_WAIT`](#hw_barrier_0_trig_wait) | 0x180 | 4 | Cluster hardware barrier 0 trigger and wait command register. | +| cluster_event_unit.[`HW_BARRIER_1_TRIG_WAIT`](#hw_barrier_1_trig_wait) | 0x184 | 4 | Cluster hardware barrier 1 trigger and wait command register. | +| cluster_event_unit.[`HW_BARRIER_2_TRIG_WAIT`](#hw_barrier_2_trig_wait) | 0x188 | 4 | Cluster hardware barrier 2 trigger and wait command register. | +| cluster_event_unit.[`HW_BARRIER_3_TRIG_WAIT`](#hw_barrier_3_trig_wait) | 0x18c | 4 | Cluster hardware barrier 3 trigger and wait command register. | +| cluster_event_unit.[`HW_BARRIER_4_TRIG_WAIT`](#hw_barrier_4_trig_wait) | 0x190 | 4 | Cluster hardware barrier 4 trigger and wait command register. | +| cluster_event_unit.[`HW_BARRIER_5_TRIG_WAIT`](#hw_barrier_5_trig_wait) | 0x194 | 4 | Cluster hardware barrier 5 trigger and wait command register. | +| cluster_event_unit.[`HW_BARRIER_6_TRIG_WAIT`](#hw_barrier_6_trig_wait) | 0x198 | 4 | Cluster hardware barrier 6 trigger and wait command register. | +| cluster_event_unit.[`HW_BARRIER_7_TRIG_WAIT`](#hw_barrier_7_trig_wait) | 0x19c | 4 | Cluster hardware barrier 7 trigger and wait command register. | +| cluster_event_unit.[`HW_BARRIER_0_TRIG_WAIT_CLEAR`](#hw_barrier_0_trig_wait_clear) | 0x1a0 | 4 | Cluster hardware barrier 0 trigger, wait and clear command register. | +| cluster_event_unit.[`HW_BARRIER_1_TRIG_WAIT_CLEAR`](#hw_barrier_1_trig_wait_clear) | 0x1a4 | 4 | Cluster hardware barrier 1 trigger, wait and clear command register. | +| cluster_event_unit.[`HW_BARRIER_2_TRIG_WAIT_CLEAR`](#hw_barrier_2_trig_wait_clear) | 0x1a8 | 4 | Cluster hardware barrier 2 trigger, wait and clear command register. | +| cluster_event_unit.[`HW_BARRIER_3_TRIG_WAIT_CLEAR`](#hw_barrier_3_trig_wait_clear) | 0x1ac | 4 | Cluster hardware barrier 3 trigger, wait and clear command register. | +| cluster_event_unit.[`HW_BARRIER_4_TRIG_WAIT_CLEAR`](#hw_barrier_4_trig_wait_clear) | 0x1b0 | 4 | Cluster hardware barrier 4 trigger, wait and clear command register. | +| cluster_event_unit.[`HW_BARRIER_5_TRIG_WAIT_CLEAR`](#hw_barrier_5_trig_wait_clear) | 0x1b4 | 4 | Cluster hardware barrier 5 trigger, wait and clear command register. | +| cluster_event_unit.[`HW_BARRIER_6_TRIG_WAIT_CLEAR`](#hw_barrier_6_trig_wait_clear) | 0x1b8 | 4 | Cluster hardware barrier 6 trigger, wait and clear command register. | +| cluster_event_unit.[`HW_BARRIER_7_TRIG_WAIT_CLEAR`](#hw_barrier_7_trig_wait_clear) | 0x1bc | 4 | Cluster hardware barrier 7 trigger, wait and clear command register. | + +## EVT_MASK +Input event mask configuration register. +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EMCL", "bits": 30, "attr": ["rw"], "rotate": 0}, {"name": "EMINTCL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "EMSOC", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:-----------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31 | rw | 0x0 | EMSOC | Soc peripheral input event mask configuration bitfield: - EMSOC[i]=1'b0: Input event request i is masked - EMSOC[i]=1'b1: Input event request i is not masked | +| 30 | rw | 0x0 | EMINTCL | Inter-cluster input event mask configuration bitfield: - EMINTCL[i]=1'b0: Input event request i is masked - EMINTCL[i]=1'b1: Input event request i is not masked | +| 29:0 | rw | 0x0 | EMCL | Cluster internal input event mask configuration bitfield: - EMCL[i]=1'b0: Input event request i is masked - EMCL[i]=1'b1: Input event request i is not masked | + +## EVT_MASK_AND +Input event mask update command register with bitwise AND operation. +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EMA", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | wo | 0x0 | EMA | Input event mask configuration bitfield update with bitwise AND operation. It allows clearing EMCL[i], EMINTCL[i] or EMSOC[i] if EMA[i]=1'b1. | + +## EVT_MASK_OR +Input event mask update command register with bitwise OR operation. +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EMO", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | wo | 0x0 | EMO | Input event mask configuration bitfield update with bitwise OR operation. It allows setting EMCL[i], EMINTCL[i] or EMSOC[i] if EMO[i]=1'b1. | + +## IRQ_MASK +Interrupt request mask configuration register. +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "IMCL", "bits": 30, "attr": ["rw"], "rotate": 0}, {"name": "IMINTCL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "IMSOC", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31 | rw | 0x0 | IMSOC | Soc peripheral interrupt request mask configuration bitfield: - bit[i]=1'b0: Interrupt request i is masked - bit[i]=1'b1: Interrupt request i is not masked | +| 30 | rw | 0x0 | IMINTCL | Inter-cluster interrupt request mask configuration bitfield: - bit[i]=1'b0: Interrupt request i is masked - bit[i]=1'b1: Interrupt request i is not masked | +| 29:0 | rw | 0x0 | IMCL | Cluster internal interrupt request mask configuration bitfield: - bit[i]=1'b0: Interrupt request i is masked - bit[i]=1'b1: Interrupt request i is not masked | + +## IRQ_MASK_AND +Interrupt request mask update command register with bitwise AND operation. +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "IMA", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | wo | 0x0 | IMA | Interrupt request mask configuration bitfield update with bitwise AND operation. It allows clearing IMCL[i], IMINTCL[i] or IMSOC[i] if IMA[i]=1'b1. | + +## IRQ_MASK_OR +Interrupt request mask update command register with bitwise OR operation. +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "IMO", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | wo | 0x0 | IMO | Interrupt request mask configuration bitfield update with bitwise OR operation. It allows setting IMCL[i], IMINTCL[i] or IMSOC[i] if IMO[i]=1'b1. | + +## CLOCK_STATUS +Cluster cores clock status register. +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "CS", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | CS | Cluster core clock status bitfield: - 1'b0: Cluster core clocked is gated - 1'b1: Cluster core clocked is running | + +## EVENT_BUFFER +Pending input events status register. +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EB", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EB | Pending input events status bitfield. EB[i]=1'b1: one or more input event i request are pending. | + +## EVENT_BUFFER_MASKED +Pending input events status register with EVT_MASK applied. +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Pending input events status bitfield with EVT_MASK applied. EBM[i]=1'b1: one or more input event i request are pending. | + +## EVENT_BUFFER_IRQ_MASKED +Pending input events status register with IRQ_MASK applied. +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "IBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | IBM | Pending input events status bitfield with IRQ_MASK applied. IBM[i]=1'b1: one or more input events i are pending. | + +## EVENT_BUFFER_CLEAR +Pending input events status clear command register. +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBC", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------| +| 31:0 | wo | 0x0 | EBC | Pending input events status clear command bitfield. It allows clearing EB[i] if EBC[i]=1'b1. | + +## SW_EVENT_MASK +Software events cluster cores destination mask configuration register. +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "SWEM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | SWEM | Software events mask configuration bitfield: - bit[i]=1'b0: software events are masked for CL_CORE[i] - bit[i]=1'b1: software events are not masked for CL_CORE[i] | + +## SW_EVENT_MASK_AND +Software events cluster cores destination mask update command register with bitwise AND operation. +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "SWEMA", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | SWEMA | Software event mask configuration bitfield update with bitwise AND operation. It allows clearing SWEM[i] if SWEMA[i]=1'b1. | + +## SW_EVENT_MASK_OR +Software events cluster cores destination mask update command register with bitwise OR operation. +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "SWEMO", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | SWEMO | Software event mask configuration bitfield update with bitwise OR operation. It allows setting SWEM[i] if SWEMO[i]=1'b1. | + +## EVENT_WAIT +Input event wait command register. +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Reading this register will gate the Cluster core clock until at least one unmasked event occurs. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## EVENT_WAIT_CLEAR +Input event wait and clear command register. +- Offset: `0x3c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Reading this register has the same effect as reading EVENT_WAIT.EBM. In addition, EVENT_BUFFER.EB[i] bits are cleared if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## HW_DISPATCH_PUSH_TASK +Hardware task dispatcher push command register. +- Offset: `0x40` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MSG", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------------------| +| 31:0 | wo | 0x0 | MSG | Message to dispatch to all cluster cores selected in HW_DISPATCH_PUSH_TEAM_CONFIG.CT configuration bitfield. | + +## HW_DISPATCH_POP_TASK +Hardware task dispatcher pop command register. +- Offset: `0x44` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MSG", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | MSG | Message dispatched using HW_DISPATCH_PUSH_TASK command and popped by cluster core who issued HW_DISPATCH_POP_TASK command. | + +## HW_DISPATCH_PUSH_TEAM_CONFIG +Hardware task dispatcher cluster core team configuration register. +- Offset: `0x48` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "CT", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | CT | Cluster cores team selection configuration bitfield. It allows to transmit HW_DISPATCH_PUSH_TASK.MSG to cluster core i if CT[i]=1'b1. | + +## HW_MUTEX_0_MSG_PUT +Hardware mutex 0 non-blocking put command register. +- Offset: `0x4c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MSG", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------| +| 31:0 | wo | 0x0 | MSG | Message pushed when releasing hardware mutex 0 configuration bitfiled. It is a non-blocking access. | + +## HW_MUTEX_0_MSG_GET +Hardware mutex 0 blocking get command register. +- Offset: `0x50` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MSG", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | MSG | Message popped when taking hardware mutex 0 data bitfiled. It is a blocking access. | + +## HW_MUTEX_1_MSG_PUT +Hardware mutex 1 non-blocking put command register. +- Offset: `0x54` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MSG", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------| +| 31:0 | wo | 0x0 | MSG | Message pushed when releasing hardware mutex 1 configuration bitfiled. It is a non-blocking access. | + +## HW_MUTEX_1_MSG_GET +Hardware mutex 1 blocking get command register. +- Offset: `0x58` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MSG", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | MSG | Message popped when taking hardware mutex 1 data bitfiled. It is a blocking access. | + +## SW_EVENT_0_TRIG +Cluster Software event 0 trigger command register. +- Offset: `0x5c` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "SW0T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | SW0T | Triggers software event 0 for cluster core i if SW0T[i]=1'b1. | + +## SW_EVENT_1_TRIG +Cluster Software event 1 trigger command register. +- Offset: `0x60` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "SW1T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | SW1T | Triggers software event 1 for cluster core i if SW1T[i]=1'b1. | + +## SW_EVENT_2_TRIG +Cluster Software event 2 trigger command register. +- Offset: `0x64` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "SW2T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | SW2T | Triggers software event 2 for cluster core i if SW2T[i]=1'b1. | + +## SW_EVENT_3_TRIG +Cluster Software event 3 trigger command register. +- Offset: `0x68` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "SW3T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | SW3T | Triggers software event 3 for cluster core i if SW3T[i]=1'b1. | + +## SW_EVENT_4_TRIG +Cluster Software event 4 trigger command register. +- Offset: `0x6c` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "SW4T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | SW4T | Triggers software event 4 for cluster core i if SW4T[i]=1'b1. | + +## SW_EVENT_5_TRIG +Cluster Software event 5 trigger command register. +- Offset: `0x70` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "SW5T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | SW5T | Triggers software event 5 for cluster core i if SW5T[i]=1'b1. | + +## SW_EVENT_6_TRIG +Cluster Software event 6 trigger command register. +- Offset: `0x74` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "SW6T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | SW6T | Triggers software event 6 for cluster core i if SW6T[i]=1'b1. | + +## SW_EVENT_7_TRIG +Cluster Software event 7 trigger command register. +- Offset: `0x78` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "SW7T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | SW7T | Triggers software event 7 for cluster core i if SW7T[i]=1'b1. | + +## SW_EVENT_0_TRIG_WAIT +Cluster Software event 0 trigger and wait command register. +- Offset: `0x7c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Triggers software event 0 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## SW_EVENT_1_TRIG_WAIT +Cluster Software event 1 trigger and wait command register. +- Offset: `0x80` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Triggers software event 1 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## SW_EVENT_2_TRIG_WAIT +Cluster Software event 2 trigger and wait command register. +- Offset: `0x84` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Triggers software event 2 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## SW_EVENT_3_TRIG_WAIT +Cluster Software event 3 trigger and wait command register. +- Offset: `0x88` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Triggers software event 3 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## SW_EVENT_4_TRIG_WAIT +Cluster Software event 4 trigger and wait command register. +- Offset: `0x8c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Triggers software event 4 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## SW_EVENT_5_TRIG_WAIT +Cluster Software event 5 trigger and wait command register. +- Offset: `0x90` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Triggers software event 5 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## SW_EVENT_6_TRIG_WAIT +Cluster Software event 6 trigger and wait command register. +- Offset: `0x94` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Triggers software event 6 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## SW_EVENT_7_TRIG_WAIT +Cluster Software event 7 trigger and wait command register. +- Offset: `0x98` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Triggers software event 7 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## SW_EVENT_0_TRIG_WAIT_CLEAR +Cluster Software event 0 trigger, wait and clear command register. +- Offset: `0x9c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:----------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#sw_event_0_trig_wait_clear--ebm) | + +### SW_EVENT_0_TRIG_WAIT_CLEAR . EBM +Triggers software event 0 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## SW_EVENT_1_TRIG_WAIT_CLEAR +Cluster Software event 1 trigger, wait and clear command register. +- Offset: `0xa0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:----------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#sw_event_1_trig_wait_clear--ebm) | + +### SW_EVENT_1_TRIG_WAIT_CLEAR . EBM +Triggers software event 1 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## SW_EVENT_2_TRIG_WAIT_CLEAR +Cluster Software event 2 trigger, wait and clear command register. +- Offset: `0xa4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:----------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#sw_event_2_trig_wait_clear--ebm) | + +### SW_EVENT_2_TRIG_WAIT_CLEAR . EBM +Triggers software event 2 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## SW_EVENT_3_TRIG_WAIT_CLEAR +Cluster Software event 3 trigger, wait and clear command register. +- Offset: `0xa8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:----------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#sw_event_3_trig_wait_clear--ebm) | + +### SW_EVENT_3_TRIG_WAIT_CLEAR . EBM +Triggers software event 3 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## SW_EVENT_4_TRIG_WAIT_CLEAR +Cluster Software event 4 trigger, wait and clear command register. +- Offset: `0xac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:----------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#sw_event_4_trig_wait_clear--ebm) | + +### SW_EVENT_4_TRIG_WAIT_CLEAR . EBM +Triggers software event 4 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## SW_EVENT_5_TRIG_WAIT_CLEAR +Cluster Software event 5 trigger, wait and clear command register. +- Offset: `0xb0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:----------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#sw_event_5_trig_wait_clear--ebm) | + +### SW_EVENT_5_TRIG_WAIT_CLEAR . EBM +Triggers software event 5 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## SW_EVENT_6_TRIG_WAIT_CLEAR +Cluster Software event 6 trigger, wait and clear command register. +- Offset: `0xb4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:----------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#sw_event_6_trig_wait_clear--ebm) | + +### SW_EVENT_6_TRIG_WAIT_CLEAR . EBM +Triggers software event 6 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## SW_EVENT_7_TRIG_WAIT_CLEAR +Cluster Software event 7 trigger, wait and clear command register. +- Offset: `0xb8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:----------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#sw_event_7_trig_wait_clear--ebm) | + +### SW_EVENT_7_TRIG_WAIT_CLEAR . EBM +Triggers software event 7 to all cluster cores targeted in SW_EVENT_MASK and gate the issuing cluster core clock until at least one unmasked event occurs. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## SOC_PERIPH_EVENT_ID +Cluster SoC peripheral event ID status register. +- Offset: `0xbc` +- Reset default: `0x0` +- Reset mask: `0x800000ff` + +### Fields + +```wavejson +{"reg": [{"name": "ID", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 23}, {"name": "VALID", "bits": 1, "attr": ["ro"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------| +| 31 | ro | 0x0 | VALID | Validity bit of SOC_PERIPH_EVENT_ID.ID bitfield. | +| 30:8 | | | | Reserved | +| 7:0 | ro | 0x0 | ID | Oldest SoC peripheral event ID status bitfield. | + +## HW_BARRIER_0_TRIG_MASK +Cluster hardware barrier 0 trigger mask configuration register. +- Offset: `0xc0` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HB0TM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HB0TM | Trigger mask for hardware barrier 0 bitfield. Hardware barrier 0 will be triggered only if for all HB0TM[i] = 1'b1, HW_BARRIER_0_STATUS.HB0S[i]=1'b1. HB0TM=0 means that hardware barrier 0 is disabled. | + +## HW_BARRIER_1_TRIG_MASK +Cluster hardware barrier 1 trigger mask configuration register. +- Offset: `0xc4` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HB1TM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HB1TM | Trigger mask for hardware barrier 1 bitfield. Hardware barrier 1 will be triggered only if for all HB1TM[i] = 1'b1, HW_BARRIER_1_STATUS.HB1S[i]=1'b1. HB1TM=0 means that hardware barrier 1 is disabled. | + +## HW_BARRIER_2_TRIG_MASK +Cluster hardware barrier 2 trigger mask configuration register. +- Offset: `0xc8` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HB2TM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HB2TM | Trigger mask for hardware barrier 2 bitfield. Hardware barrier 2 will be triggered only if for all HB2TM[i] = 1'b1, HW_BARRIER_2_STATUS.HB2S[i]=1'b1. HB2TM=0 means that hardware barrier 2 is disabled. | + +## HW_BARRIER_3_TRIG_MASK +Cluster hardware barrier 3 trigger mask configuration register. +- Offset: `0xcc` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HB3TM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HB3TM | Trigger mask for hardware barrier 3 bitfield. Hardware barrier 3 will be triggered only if for all HB3TM[i] = 1'b1, HW_BARRIER_3_STATUS.HB3S[i]=1'b1. HB3TM=0 means that hardware barrier 3 is disabled. | + +## HW_BARRIER_4_TRIG_MASK +Cluster hardware barrier 4 trigger mask configuration register. +- Offset: `0xd0` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HB4TM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HB4TM | Trigger mask for hardware barrier 4 bitfield. Hardware barrier 4 will be triggered only if for all HB4TM[i] = 1'b1, HW_BARRIER_4_STATUS.HB4S[i]=1'b1. HB4TM=0 means that hardware barrier 4 is disabled. | + +## HW_BARRIER_5_TRIG_MASK +Cluster hardware barrier 5 trigger mask configuration register. +- Offset: `0xd4` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HB5TM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HB5TM | Trigger mask for hardware barrier 5 bitfield. Hardware barrier 5 will be triggered only if for all HB5TM[i] = 1'b1, HW_BARRIER_5_STATUS.HB5S[i]=1'b1. HB5TM=0 means that hardware barrier 5 is disabled. | + +## HW_BARRIER_6_TRIG_MASK +Cluster hardware barrier 6 trigger mask configuration register. +- Offset: `0xd8` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HB6TM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HB6TM | Trigger mask for hardware barrier 6 bitfield. Hardware barrier 6 will be triggered only if for all HB6TM[i] = 1'b1, HW_BARRIER_6_STATUS.HB6S[i]=1'b1. HB6TM=0 means that hardware barrier 6 is disabled. | + +## HW_BARRIER_7_TRIG_MASK +Cluster hardware barrier 7 trigger mask configuration register. +- Offset: `0xdc` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HB7TM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HB7TM | Trigger mask for hardware barrier 7 bitfield. Hardware barrier 7 will be triggered only if for all HB7TM[i] = 1'b1, HW_BARRIER_7_STATUS.HB7S[i]=1'b1. HB7TM=0 means that hardware barrier 7 is disabled. | + +## HW_BARRIER_0_STATUS +Cluster hardware barrier 0 status register. +- Offset: `0xe0` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBS | Current status of hardware barrier 0 bitfield. HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 0. It is cleared when HBS matches HW_BARRIER_0_TRIG_MASK.HB0TM. | + +## HW_BARRIER_1_STATUS +Cluster hardware barrier 1 status register. +- Offset: `0xe4` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBS | Current status of hardware barrier 1 bitfield. HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 1. It is cleared when HBS matches HW_BARRIER_1_TRIG_MASK.HB1TM. | + +## HW_BARRIER_2_STATUS +Cluster hardware barrier 2 status register. +- Offset: `0xe8` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBS | Current status of hardware barrier 2 bitfield. HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 2. It is cleared when HBS matches HW_BARRIER_2_TRIG_MASK.HB2TM. | + +## HW_BARRIER_3_STATUS +Cluster hardware barrier 3 status register. +- Offset: `0xec` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBS | Current status of hardware barrier 3 bitfield. HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 3. It is cleared when HBS matches HW_BARRIER_3_TRIG_MASK.HB3TM. | + +## HW_BARRIER_4_STATUS +Cluster hardware barrier 4 status register. +- Offset: `0xf0` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBS | Current status of hardware barrier 4 bitfield. HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 4. It is cleared when HBS matches HW_BARRIER_4_TRIG_MASK.HB4TM. | + +## HW_BARRIER_5_STATUS +Cluster hardware barrier 5 status register. +- Offset: `0xf4` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBS | Current status of hardware barrier 5 bitfield. HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 5. It is cleared when HBS matches HW_BARRIER_5_TRIG_MASK.HB5TM. | + +## HW_BARRIER_6_STATUS +Cluster hardware barrier 6 status register. +- Offset: `0xf8` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBS | Current status of hardware barrier 6 bitfield. HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 6. It is cleared when HBS matches HW_BARRIER_6_TRIG_MASK.HB6TM. | + +## HW_BARRIER_7_STATUS +Cluster hardware barrier 7 status register. +- Offset: `0xfc` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBS | Current status of hardware barrier 7 bitfield. HBS[i]=1'b1 means that cluster core i has triggered hardware barrier 7. It is cleared when HBS matches HW_BARRIER_7_TRIG_MASK.HB7TM. | + +## HW_BARRIER_0_STATUS_SUM +Cluster hardware barrier summary status register. +- Offset: `0x100` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBSS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBSS | Current status of hardware barrier 0. HBSS[i] represents a summary of the barrier status for core i. | + +## HW_BARRIER_1_STATUS_SUM +Cluster hardware barrier summary status register. +- Offset: `0x104` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBSS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBSS | Current status of hardware barrier 1. HBSS[i] represents a summary of the barrier status for core i. | + +## HW_BARRIER_2_STATUS_SUM +Cluster hardware barrier summary status register. +- Offset: `0x108` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBSS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBSS | Current status of hardware barrier 2. HBSS[i] represents a summary of the barrier status for core i. | + +## HW_BARRIER_3_STATUS_SUM +Cluster hardware barrier summary status register. +- Offset: `0x10c` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBSS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBSS | Current status of hardware barrier 3. HBSS[i] represents a summary of the barrier status for core i. | + +## HW_BARRIER_4_STATUS_SUM +Cluster hardware barrier summary status register. +- Offset: `0x110` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBSS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBSS | Current status of hardware barrier 4. HBSS[i] represents a summary of the barrier status for core i. | + +## HW_BARRIER_5_STATUS_SUM +Cluster hardware barrier summary status register. +- Offset: `0x114` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBSS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBSS | Current status of hardware barrier 5. HBSS[i] represents a summary of the barrier status for core i. | + +## HW_BARRIER_6_STATUS_SUM +Cluster hardware barrier summary status register. +- Offset: `0x118` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBSS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBSS | Current status of hardware barrier 6. HBSS[i] represents a summary of the barrier status for core i. | + +## HW_BARRIER_7_STATUS_SUM +Cluster hardware barrier summary status register. +- Offset: `0x11c` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBSS", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | 0x0 | HBSS | Current status of hardware barrier 7. HBSS[i] represents a summary of the barrier status for core i. | + +## HW_BARRIER_0_TARGET_MASK +Cluster hardware barrier 0 target mask configuration register. +- Offset: `0x120` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBTAM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HBTAM | Cluster hardware barrier 0 target mask configuration bitfield. HBATM[i]=1'b1 means that cluster core i will receive hardware barrier 0 event when HW_BARRIER_0_STATUS will match HW_BARRIER_0_TRIG_MASK. | + +## HW_BARRIER_1_TARGET_MASK +Cluster hardware barrier 1 target mask configuration register. +- Offset: `0x124` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBTAM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HBTAM | Cluster hardware barrier 1 target mask configuration bitfield. HBATM[i]=1'b1 means that cluster core i will receive hardware barrier 1 event when HW_BARRIER_1_STATUS will match HW_BARRIER_1_TRIG_MASK. | + +## HW_BARRIER_2_TARGET_MASK +Cluster hardware barrier 2 target mask configuration register. +- Offset: `0x128` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBTAM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HBTAM | Cluster hardware barrier 2 target mask configuration bitfield. HBATM[i]=1'b1 means that cluster core i will receive hardware barrier 2 event when HW_BARRIER_2_STATUS will match HW_BARRIER_2_TRIG_MASK. | + +## HW_BARRIER_3_TARGET_MASK +Cluster hardware barrier 3 target mask configuration register. +- Offset: `0x12c` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBTAM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HBTAM | Cluster hardware barrier 3 target mask configuration bitfield. HBATM[i]=1'b1 means that cluster core i will receive hardware barrier 3 event when HW_BARRIER_3_STATUS will match HW_BARRIER_3_TRIG_MASK. | + +## HW_BARRIER_4_TARGET_MASK +Cluster hardware barrier 4 target mask configuration register. +- Offset: `0x130` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBTAM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HBTAM | Cluster hardware barrier 4 target mask configuration bitfield. HBATM[i]=1'b1 means that cluster core i will receive hardware barrier 4 event when HW_BARRIER_4_STATUS will match HW_BARRIER_4_TRIG_MASK. | + +## HW_BARRIER_5_TARGET_MASK +Cluster hardware barrier 5 target mask configuration register. +- Offset: `0x134` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBTAM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HBTAM | Cluster hardware barrier 5 target mask configuration bitfield. HBATM[i]=1'b1 means that cluster core i will receive hardware barrier 5 event when HW_BARRIER_5_STATUS will match HW_BARRIER_5_TRIG_MASK. | + +## HW_BARRIER_6_TARGET_MASK +Cluster hardware barrier 6 target mask configuration register. +- Offset: `0x138` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBTAM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HBTAM | Cluster hardware barrier 6 target mask configuration bitfield. HBATM[i]=1'b1 means that cluster core i will receive hardware barrier 6 event when HW_BARRIER_6_STATUS will match HW_BARRIER_6_TRIG_MASK. | + +## HW_BARRIER_7_TARGET_MASK +Cluster hardware barrier 7 target mask configuration register. +- Offset: `0x13c` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "HBTAM", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | HBTAM | Cluster hardware barrier 7 target mask configuration bitfield. HBATM[i]=1'b1 means that cluster core i will receive hardware barrier 7 event when HW_BARRIER_7_STATUS will match HW_BARRIER_7_TRIG_MASK. | + +## HW_BARRIER_0_TRIG +Cluster hardware barrier 0 trigger command register. +- Offset: `0x140` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | T | Sets HW_BARRIER_0_STATUS.HBS[i] to 1'b1 when T[i]=1'b1. | + +## HW_BARRIER_1_TRIG +Cluster hardware barrier 1 trigger command register. +- Offset: `0x144` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | T | Sets HW_BARRIER_1_STATUS.HBS[i] to 1'b1 when T[i]=1'b1. | + +## HW_BARRIER_2_TRIG +Cluster hardware barrier 2 trigger command register. +- Offset: `0x148` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | T | Sets HW_BARRIER_2_STATUS.HBS[i] to 1'b1 when T[i]=1'b1. | + +## HW_BARRIER_3_TRIG +Cluster hardware barrier 3 trigger command register. +- Offset: `0x14c` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | T | Sets HW_BARRIER_3_STATUS.HBS[i] to 1'b1 when T[i]=1'b1. | + +## HW_BARRIER_4_TRIG +Cluster hardware barrier 4 trigger command register. +- Offset: `0x150` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | T | Sets HW_BARRIER_4_STATUS.HBS[i] to 1'b1 when T[i]=1'b1. | + +## HW_BARRIER_5_TRIG +Cluster hardware barrier 5 trigger command register. +- Offset: `0x154` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | T | Sets HW_BARRIER_5_STATUS.HBS[i] to 1'b1 when T[i]=1'b1. | + +## HW_BARRIER_6_TRIG +Cluster hardware barrier 6 trigger command register. +- Offset: `0x158` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | T | Sets HW_BARRIER_6_STATUS.HBS[i] to 1'b1 when T[i]=1'b1. | + +## HW_BARRIER_7_TRIG +Cluster hardware barrier 7 trigger command register. +- Offset: `0x15c` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | T | Sets HW_BARRIER_7_STATUS.HBS[i] to 1'b1 when T[i]=1'b1. | + +## HW_BARRIER_0_SELF_TRIG +Cluster hardware barrier 0 self trigger command register. +- Offset: `0x160` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------| +| 31:0 | ro | 0x0 | T | Sets HW_BARRIER_0_STATUS.HBS[i] to 1'b1 when issued by cluster core i. | + +## HW_BARRIER_1_SELF_TRIG +Cluster hardware barrier 1 self trigger command register. +- Offset: `0x164` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------| +| 31:0 | ro | 0x0 | T | Sets HW_BARRIER_1_STATUS.HBS[i] to 1'b1 when issued by cluster core i. | + +## HW_BARRIER_2_SELF_TRIG +Cluster hardware barrier 2 self trigger command register. +- Offset: `0x168` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------| +| 31:0 | ro | 0x0 | T | Sets HW_BARRIER_2_STATUS.HBS[i] to 1'b1 when issued by cluster core i. | + +## HW_BARRIER_3_SELF_TRIG +Cluster hardware barrier 3 self trigger command register. +- Offset: `0x16c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------| +| 31:0 | ro | 0x0 | T | Sets HW_BARRIER_3_STATUS.HBS[i] to 1'b1 when issued by cluster core i. | + +## HW_BARRIER_4_SELF_TRIG +Cluster hardware barrier 4 self trigger command register. +- Offset: `0x170` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------| +| 31:0 | ro | 0x0 | T | Sets HW_BARRIER_4_STATUS.HBS[i] to 1'b1 when issued by cluster core i. | + +## HW_BARRIER_5_SELF_TRIG +Cluster hardware barrier 5 self trigger command register. +- Offset: `0x174` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------| +| 31:0 | ro | 0x0 | T | Sets HW_BARRIER_5_STATUS.HBS[i] to 1'b1 when issued by cluster core i. | + +## HW_BARRIER_6_SELF_TRIG +Cluster hardware barrier 6 self trigger command register. +- Offset: `0x178` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------| +| 31:0 | ro | 0x0 | T | Sets HW_BARRIER_6_STATUS.HBS[i] to 1'b1 when issued by cluster core i. | + +## HW_BARRIER_7_SELF_TRIG +Cluster hardware barrier 7 self trigger command register. +- Offset: `0x17c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "T", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------| +| 31:0 | ro | 0x0 | T | Sets HW_BARRIER_7_STATUS.HBS[i] to 1'b1 when issued by cluster core i. | + +## HW_BARRIER_0_TRIG_WAIT +Cluster hardware barrier 0 trigger and wait command register. +- Offset: `0x180` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Set HW_BARRIER_0[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_0 is released. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## HW_BARRIER_1_TRIG_WAIT +Cluster hardware barrier 1 trigger and wait command register. +- Offset: `0x184` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Set HW_BARRIER_1[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_1 is released. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## HW_BARRIER_2_TRIG_WAIT +Cluster hardware barrier 2 trigger and wait command register. +- Offset: `0x188` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Set HW_BARRIER_2[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_2 is released. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## HW_BARRIER_3_TRIG_WAIT +Cluster hardware barrier 3 trigger and wait command register. +- Offset: `0x18c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Set HW_BARRIER_3[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_3 is released. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## HW_BARRIER_4_TRIG_WAIT +Cluster hardware barrier 4 trigger and wait command register. +- Offset: `0x190` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Set HW_BARRIER_4[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_4 is released. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## HW_BARRIER_5_TRIG_WAIT +Cluster hardware barrier 5 trigger and wait command register. +- Offset: `0x194` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Set HW_BARRIER_5[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_5 is released. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## HW_BARRIER_6_TRIG_WAIT +Cluster hardware barrier 6 trigger and wait command register. +- Offset: `0x198` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Set HW_BARRIER_6[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_6 is released. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## HW_BARRIER_7_TRIG_WAIT +Cluster hardware barrier 7 trigger and wait command register. +- Offset: `0x19c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:0 | ro | 0x0 | EBM | Set HW_BARRIER_7[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_7 is released. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM | + +## HW_BARRIER_0_TRIG_WAIT_CLEAR +Cluster hardware barrier 0 trigger, wait and clear command register. +- Offset: `0x1a0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#hw_barrier_0_trig_wait_clear--ebm) | + +### HW_BARRIER_0_TRIG_WAIT_CLEAR . EBM +Set HW_BARRIER_0[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_0 is released. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## HW_BARRIER_1_TRIG_WAIT_CLEAR +Cluster hardware barrier 1 trigger, wait and clear command register. +- Offset: `0x1a4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#hw_barrier_1_trig_wait_clear--ebm) | + +### HW_BARRIER_1_TRIG_WAIT_CLEAR . EBM +Set HW_BARRIER_1[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_1 is released. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## HW_BARRIER_2_TRIG_WAIT_CLEAR +Cluster hardware barrier 2 trigger, wait and clear command register. +- Offset: `0x1a8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#hw_barrier_2_trig_wait_clear--ebm) | + +### HW_BARRIER_2_TRIG_WAIT_CLEAR . EBM +Set HW_BARRIER_2[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_2 is released. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## HW_BARRIER_3_TRIG_WAIT_CLEAR +Cluster hardware barrier 3 trigger, wait and clear command register. +- Offset: `0x1ac` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#hw_barrier_3_trig_wait_clear--ebm) | + +### HW_BARRIER_3_TRIG_WAIT_CLEAR . EBM +Set HW_BARRIER_3[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_3 is released. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## HW_BARRIER_4_TRIG_WAIT_CLEAR +Cluster hardware barrier 4 trigger, wait and clear command register. +- Offset: `0x1b0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#hw_barrier_4_trig_wait_clear--ebm) | + +### HW_BARRIER_4_TRIG_WAIT_CLEAR . EBM +Set HW_BARRIER_4[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_4 is released. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## HW_BARRIER_5_TRIG_WAIT_CLEAR +Cluster hardware barrier 5 trigger, wait and clear command register. +- Offset: `0x1b4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#hw_barrier_5_trig_wait_clear--ebm) | + +### HW_BARRIER_5_TRIG_WAIT_CLEAR . EBM +Set HW_BARRIER_5[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_5 is released. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## HW_BARRIER_6_TRIG_WAIT_CLEAR +Cluster hardware barrier 6 trigger, wait and clear command register. +- Offset: `0x1b8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#hw_barrier_6_trig_wait_clear--ebm) | + +### HW_BARRIER_6_TRIG_WAIT_CLEAR . EBM +Set HW_BARRIER_6[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_6 is released. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + +## HW_BARRIER_7_TRIG_WAIT_CLEAR +Cluster hardware barrier 7 trigger, wait and clear command register. +- Offset: `0x1bc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "EBM", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------------------| +| 31:0 | ro | 0x0 | [EBM](#hw_barrier_7_trig_wait_clear--ebm) | + +### HW_BARRIER_7_TRIG_WAIT_CLEAR . EBM +Set HW_BARRIER_7[i] when issued by cluster core i and gate the issuing cluster core i clock until HW_BARRIER_7 is released. +In addition, EVENT_BUFFER.EB[i] bits are cleared after the read if EVT_MASK[i]=1'b1. The read content of this bitfield is equivalent to EVENT_BUFFER_MASKED.EBM + + + +## cluster_ctrl_unit / doc / registers.md + +## Summary + +| Name | Offset | Length | Description | +|:---------------------------------------------------------------------------|:---------|---------:|:----------------------------------------------------------------------| +| cluster_control_unit.[`EOC`](#eoc) | 0x0 | 4 | End Of Computation status register. | +| cluster_control_unit.[`FETCH_EN`](#fetch_en) | 0x4 | 4 | Cluster cores fetch enable configuration register. | +| cluster_control_unit.[`CLOCK_GATE`](#clock_gate) | 0x8 | 4 | Cluster clock gate configuration register. | +| cluster_control_unit.[`DBG_RESUME`](#dbg_resume) | 0xc | 4 | Cluster cores debug resume register. | +| cluster_control_unit.[`DBG_HALT_STATUS`](#dbg_halt_status) | 0x10 | 4 | Cluster cores debug halt status register. | +| cluster_control_unit.[`DBG_HALT_MASK`](#dbg_halt_mask) | 0x14 | 4 | Cluster cores debug halt mask configuration register. | +| cluster_control_unit.[`BOOT_ADDR0`](#boot_addr0) | 0x18 | 4 | Cluster core 0 boot address configuration register. | +| cluster_control_unit.[`TCDM_ARB_POLICY_CH0`](#tcdm_arb_policy_ch0) | 0x1c | 4 | TCDM arbitration policy ch0 for cluster cores configuration register. | +| cluster_control_unit.[`TCDM_ARB_POLICY_CH1`](#tcdm_arb_policy_ch1) | 0x20 | 4 | TCDM arbitration policy ch1 for DMA/HWCE configuration register. | +| cluster_control_unit.[`TCDM_ARB_POLICY_CH0_REP`](#tcdm_arb_policy_ch0_rep) | 0x24 | 4 | Read only duplicate of TCDM_ARB_POLICY_CH0 register | +| cluster_control_unit.[`TCDM_ARB_POLICY_CH1_REP`](#tcdm_arb_policy_ch1_rep) | 0x28 | 4 | Read only duplicate of TCDM_ARB_POLICY_CH1 register | + +## EOC +End Of Computation status register. +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "eoc", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | eoc | End of computation status flag bitfield: - 1'b0: program execution under going - 1'b1: end of computation reached | + +## FETCH_EN +Cluster cores fetch enable configuration register. +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "CORE0", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE1", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE2", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE3", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE4", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE5", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE6", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE7", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7 | rw | 0x0 | CORE7 | Core 7 fetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 6 | rw | 0x0 | CORE6 | Core 6 fetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 5 | rw | 0x0 | CORE5 | Core 5 fetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 4 | rw | 0x0 | CORE4 | Core 4 fetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 3 | rw | 0x0 | CORE3 | Core 3 fetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 2 | rw | 0x0 | CORE2 | Core 2 fetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 1 | rw | 0x0 | CORE1 | Core 1 fetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 0 | rw | 0x0 | CORE0 | Core 0 fetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | + +## CLOCK_GATE +Cluster clock gate configuration register. +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | EN | Cluster clock gate configuration bitfield: - 1'b0: disabled - 1'b1: enabled | + +## DBG_RESUME +Cluster cores debug resume register. +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "CORE0", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "CORE1", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "CORE2", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "CORE3", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "CORE4", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "CORE5", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "CORE6", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "CORE7", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7 | wo | 0x0 | CORE7 | Core 7 debug resume configuration bitfield: - 1'b0: stay halted - 1'b1: resume core 7 | +| 6 | wo | 0x0 | CORE6 | Core 6 debug resume configuration bitfield: - 1'b0: stay halted - 1'b1: resume core 6 | +| 5 | wo | 0x0 | CORE5 | Core 5 debug resume configuration bitfield: - 1'b0: stay halted - 1'b1: resume core 5 | +| 4 | wo | 0x0 | CORE4 | Core 4 debug resume configuration bitfield: - 1'b0: stay halted - 1'b1: resume core 4 | +| 3 | wo | 0x0 | CORE3 | Core 3 debug resume configuration bitfield: - 1'b0: stay halted - 1'b1: resume core 3 | +| 2 | wo | 0x0 | CORE2 | Core 2 debug resume configuration bitfield: - 1'b0: stay halted - 1'b1: resume core 2 | +| 1 | wo | 0x0 | CORE1 | Core 1 debug resume configuration bitfield: - 1'b0: stay halted - 1'b1: resume core 1 | +| 0 | wo | 0x0 | CORE0 | Core 0 debug resume configuration bitfield: - 1'b0: stay halted - 1'b1: resume core 0 | + +## DBG_HALT_STATUS +Cluster cores debug halt status register. +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "CORE0", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "CORE1", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "CORE2", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "CORE3", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "CORE4", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "CORE5", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "CORE6", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "CORE7", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7 | ro | 0x0 | CORE7 | Core 7 debug halt status flag bitfield: - 1'b0: running - 1'b1: halted | +| 6 | ro | 0x0 | CORE6 | Core 6 debug halt status flag bitfield: - 1'b0: running - 1'b1: halted | +| 5 | ro | 0x0 | CORE5 | Core 5 debug halt status flag bitfield: - 1'b0: running - 1'b1: halted | +| 4 | ro | 0x0 | CORE4 | Core 4 debug halt status flag bitfield: - 1'b0: running - 1'b1: halted | +| 3 | ro | 0x0 | CORE3 | Core 3 debug halt status flag bitfield: - 1'b0: running - 1'b1: halted | +| 2 | ro | 0x0 | CORE2 | Core 2 debug halt status flag bitfield: - 1'b0: running - 1'b1: halted | +| 1 | ro | 0x0 | CORE1 | Core 1 debug halt status flag bitfield: - 1'b0: running - 1'b1: halted | +| 0 | ro | 0x0 | CORE0 | Core 0 debug halt status flag bitfield: - 1'b0: running - 1'b1: halted | + +## DBG_HALT_MASK +Cluster cores debug halt mask configuration register. +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "CORE0", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE1", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE2", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE3", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE4", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE5", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE6", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE7", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7 | rw | 0x0 | CORE7 | Core 7 debug halt mask bitfield. When bit is set, core will be part of mask group and stopped when one of the members of the group stops. | +| 6 | rw | 0x0 | CORE6 | Core 6 debug halt mask bitfield. When bit is set, core will be part of mask group and stopped when one of the members of the group stops. | +| 5 | rw | 0x0 | CORE5 | Core 5 debug halt mask bitfield. When bit is set, core will be part of mask group and stopped when one of the members of the group stops. | +| 4 | rw | 0x0 | CORE4 | Core 4 debug halt mask bitfield. When bit is set, core will be part of mask group and stopped when one of the members of the group stops. | +| 3 | rw | 0x0 | CORE3 | Core 3 debug halt mask bitfield. When bit is set, core will be part of mask group and stopped when one of the members of the group stops. | +| 2 | rw | 0x0 | CORE2 | Core 2 debug halt mask bitfield. When bit is set, core will be part of mask group and stopped when one of the members of the group stops. | +| 1 | rw | 0x0 | CORE1 | Core 1 debug halt mask bitfield. When bit is set, core will be part of mask group and stopped when one of the members of the group stops. | +| 0 | rw | 0x0 | CORE0 | Core 0 debug halt mask bitfield. When bit is set, core will be part of mask group and stopped when one of the members of the group stops. | + +## BOOT_ADDR0 +Cluster core 0 boot address configuration register. +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "BA", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------| +| 31:0 | rw | 0x0 | BA | Cluster core 0 boot address configuration bitfield. | + +## TCDM_ARB_POLICY_CH0 +TCDM arbitration policy ch0 for cluster cores configuration register. +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "POL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | POL | TCDM arbitration policy for cluster cores configuration bitfield: - 1'b0: fair round robin - 1'b1: fixed order | + +## TCDM_ARB_POLICY_CH1 +TCDM arbitration policy ch1 for DMA/HWCE configuration register. +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "POL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | POL | TCDM arbitration policy for DMA/HWCE configuration bitfield: - 1'b0: fair round robin - 1'b1: fixed order | + +## TCDM_ARB_POLICY_CH0_REP +Read only duplicate of TCDM_ARB_POLICY_CH0 register +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "POL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | POL | TCDM arbitration policy for cluster cores configuration bitfield: - 1'b0: fair round robin - 1'b1: fixed order | + +## TCDM_ARB_POLICY_CH1_REP +Read only duplicate of TCDM_ARB_POLICY_CH1 register +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "POL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | POL | TCDM arbitration policy for DMA/HWCE configuration bitfield: - 1'b0: fair round robin - 1'b1: fixed order | + + + +## cluster_icache_ctrl / doc / registers.md + +## Summary + +| Name | Offset | Length | Description | +|:----------------------------------------------------------|:---------|---------:|:-----------------------------------------------------------------| +| cluster_icache_ctrl.[`ENABLE`](#enable) | 0x0 | 4 | Cluster instruction cache unit enable configuration register. | +| cluster_icache_ctrl.[`FLUSH`](#flush) | 0x4 | 4 | Cluster instruction cache unit flush command register. | +| cluster_icache_ctrl.[`L0_FLUSH`](#l0_flush) | 0x8 | 4 | Cluster level 0 instruction cache unit flush command register. | +| cluster_icache_ctrl.[`SEL_FLUSH`](#sel_flush) | 0xc | 4 | Cluster instruction cache unit selective flush command register. | +| cluster_icache_ctrl.[`L1_L15_PREFETCH`](#l1_l15_prefetch) | 0x10 | 4 | Enable L1 and L1.5 prefetch register. | + +## ENABLE +Cluster instruction cache unit enable configuration register. +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | EN | Cluster instruction cache enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | + +## FLUSH +Cluster instruction cache unit flush command register. +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "FL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | FL | Cluster instruction cache full flush command. | + +## L0_FLUSH +Cluster level 0 instruction cache unit flush command register. +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "L0_FL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | L0_FL | Cluster level 0 instruction cache full flush command. | + +## SEL_FLUSH +Cluster instruction cache unit selective flush command register. +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------| +| 31:0 | rw | 0x0 | ADDR | Cluster instruction cache selective flush address configuration bitfield. | + +## L1_L15_PREFETCH +Enable L1 and L1.5 prefetch register. +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "CORE0", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE1", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE2", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE3", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE4", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE5", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE6", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CORE7", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7 | rw | 0x0 | CORE7 | Core 7 icache prefetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 6 | rw | 0x0 | CORE6 | Core 6 icache prefetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 5 | rw | 0x0 | CORE5 | Core 5 icache prefetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 4 | rw | 0x0 | CORE4 | Core 4 icache prefetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 3 | rw | 0x0 | CORE3 | Core 3 icache prefetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 2 | rw | 0x0 | CORE2 | Core 2 icache prefetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 1 | rw | 0x0 | CORE1 | Core 1 icache prefetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 0 | rw | 0x0 | CORE0 | Core 0 icache prefetch enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | + + + +## ethernet / doc / registers.md + +## Summary + +| Name | Offset | Length | Description | +|:----------------------------------|:---------|---------:|:-------------------------------------------------------------------------------------------| +| eth_framing.[`CONFIG0`](#config0) | 0x0 | 4 | Configures the lower 4 bytes of the devices MAC address | +| eth_framing.[`CONFIG1`](#config1) | 0x4 | 4 | Configures the: upper 2 bytes of the devices MAC address, promiscuous flag, MDIO interface | +| eth_framing.[`CONFIG2`](#config2) | 0x8 | 4 | The FCS TX status | +| eth_framing.[`CONFIG3`](#config3) | 0xc | 4 | The FCS RX status | + +## CONFIG0 +Configures the lower 4 bytes of the devices MAC address +- Offset: `0x0` +- Reset default: `0x890702` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "lower_mac_address", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:--------:|:------------------|:----------------------------------------| +| 31:0 | rw | 0x890702 | lower_mac_address | Lower 32 bit of the devices MAC address | + +## CONFIG1 +Configures the: upper 2 bytes of the devices MAC address, promiscuous flag, MDIO interface +- Offset: `0x4` +- Reset default: `0x2301` +- Reset mask: `0xfffff` + +### Fields + +```wavejson +{"reg": [{"name": "upper_mac_address", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "promiscuous", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "phy_mdclk", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "phy_mdio_o", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "phy_mdio_oe", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 12}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:----------------------------------------| +| 31:20 | | | | Reserved | +| 19 | rw | 0x0 | phy_mdio_oe | MDIO output enable | +| 18 | rw | 0x0 | phy_mdio_o | MDIO output | +| 17 | rw | 0x0 | phy_mdclk | MDIO clock | +| 16 | rw | 0x0 | promiscuous | promiscuous flag | +| 15:0 | rw | 0x2301 | upper_mac_address | Upper 16 bit of the devices MAC address | + +## CONFIG2 +The FCS TX status +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "tx_fcs_reg", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:0 | ro | 0x0 | tx_fcs_reg | FCS TX status | + +## CONFIG3 +The FCS RX status +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "rx_fcs_reg", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:0 | ro | 0x0 | rx_fcs_reg | FCS RX status | + + + +## fp_cluster / doc / registers.md + +## Summary + +| Name | Offset | Length | Description | +|:-----------------------------------------------------------------------------|:---------|---------:|:----------------------------------------------------------------------------------------------------| +| spatz_cluster_peripheral.[`PERF_COUNTER_ENABLE_0`](#perf_counter_enable) | 0x0 | 8 | Enable particular performance counter and start tracking. | +| spatz_cluster_peripheral.[`PERF_COUNTER_ENABLE_1`](#perf_counter_enable) | 0x8 | 8 | Enable particular performance counter and start tracking. | +| spatz_cluster_peripheral.[`HART_SELECT_0`](#hart_select) | 0x10 | 8 | Select from which hart in the cluster, starting from `0`, | +| spatz_cluster_peripheral.[`HART_SELECT_1`](#hart_select) | 0x18 | 8 | Select from which hart in the cluster, starting from `0`, | +| spatz_cluster_peripheral.[`PERF_COUNTER_0`](#perf_counter) | 0x20 | 8 | Performance counter. Set corresponding PERF_COUNTER_ENABLE bits depending on what | +| spatz_cluster_peripheral.[`PERF_COUNTER_1`](#perf_counter) | 0x28 | 8 | Performance counter. Set corresponding PERF_COUNTER_ENABLE bits depending on what | +| spatz_cluster_peripheral.[`CL_CLINT_SET`](#cl_clint_set) | 0x30 | 8 | Set bits in the cluster-local CLINT. Writing a 1 at location i sets the cluster-local interrupt | +| spatz_cluster_peripheral.[`CL_CLINT_CLEAR`](#cl_clint_clear) | 0x38 | 8 | Clear bits in the cluster-local CLINT. Writing a 1 at location i clears the cluster-local interrupt | +| spatz_cluster_peripheral.[`HW_BARRIER`](#hw_barrier) | 0x40 | 8 | Hardware barrier register. Loads to this register will block until all cores have | +| spatz_cluster_peripheral.[`ICACHE_PREFETCH_ENABLE`](#icache_prefetch_enable) | 0x48 | 8 | Controls prefetching of the instruction cache. | +| spatz_cluster_peripheral.[`SPATZ_STATUS`](#spatz_status) | 0x50 | 8 | Sets the status of the Spatz cluster. | +| spatz_cluster_peripheral.[`CLUSTER_BOOT_CONTROL`](#cluster_boot_control) | 0x58 | 8 | Controls the cluster boot process. | + +## PERF_COUNTER_ENABLE +Enable particular performance counter and start tracking. +- Reset default: `0x0` +- Reset mask: `0x7fffffff` + +### Instances + +| Name | Offset | +|:----------------------|:---------| +| PERF_COUNTER_ENABLE_0 | 0x0 | +| PERF_COUNTER_ENABLE_1 | 0x8 | + + +### Fields + +```wavejson +{"reg": [{"name": "CYCLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "TCDM_ACCESSED", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "TCDM_CONGESTED", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ISSUE_FPU", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ISSUE_FPU_SEQ", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ISSUE_CORE_TO_FPU", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RETIRED_INSTR", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RETIRED_LOAD", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RETIRED_I", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RETIRED_ACC", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_AW_STALL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_AR_STALL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_R_STALL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_W_STALL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_BUF_W_STALL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_BUF_R_STALL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_AW_DONE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_AW_BW", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_AR_DONE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_AR_BW", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_R_DONE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_R_BW", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_W_DONE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_W_BW", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_B_DONE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_BUSY", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ICACHE_MISS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ICACHE_HIT", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ICACHE_PREFETCH", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ICACHE_DOUBLE_HIT", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ICACHE_STALL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 33}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-------------------------------------------------------------| +| 63:31 | | | Reserved | +| 30 | rw | 0x0 | [ICACHE_STALL](#perf_counter_enable--icache_stall) | +| 29 | rw | 0x0 | [ICACHE_DOUBLE_HIT](#perf_counter_enable--icache_double_hit) | +| 28 | rw | 0x0 | [ICACHE_PREFETCH](#perf_counter_enable--icache_prefetch) | +| 27 | rw | 0x0 | [ICACHE_HIT](#perf_counter_enable--icache_hit) | +| 26 | rw | 0x0 | [ICACHE_MISS](#perf_counter_enable--icache_miss) | +| 25 | rw | 0x0 | [DMA_BUSY](#perf_counter_enable--dma_busy) | +| 24 | rw | 0x0 | [DMA_B_DONE](#perf_counter_enable--dma_b_done) | +| 23 | rw | 0x0 | [DMA_W_BW](#perf_counter_enable--dma_w_bw) | +| 22 | rw | 0x0 | [DMA_W_DONE](#perf_counter_enable--dma_w_done) | +| 21 | rw | 0x0 | [DMA_R_BW](#perf_counter_enable--dma_r_bw) | +| 20 | rw | 0x0 | [DMA_R_DONE](#perf_counter_enable--dma_r_done) | +| 19 | rw | 0x0 | [DMA_AR_BW](#perf_counter_enable--dma_ar_bw) | +| 18 | rw | 0x0 | [DMA_AR_DONE](#perf_counter_enable--dma_ar_done) | +| 17 | rw | 0x0 | [DMA_AW_BW](#perf_counter_enable--dma_aw_bw) | +| 16 | rw | 0x0 | [DMA_AW_DONE](#perf_counter_enable--dma_aw_done) | +| 15 | rw | 0x0 | [DMA_BUF_R_STALL](#perf_counter_enable--dma_buf_r_stall) | +| 14 | rw | 0x0 | [DMA_BUF_W_STALL](#perf_counter_enable--dma_buf_w_stall) | +| 13 | rw | 0x0 | [DMA_W_STALL](#perf_counter_enable--dma_w_stall) | +| 12 | rw | 0x0 | [DMA_R_STALL](#perf_counter_enable--dma_r_stall) | +| 11 | rw | 0x0 | [DMA_AR_STALL](#perf_counter_enable--dma_ar_stall) | +| 10 | rw | 0x0 | [DMA_AW_STALL](#perf_counter_enable--dma_aw_stall) | +| 9 | rw | 0x0 | [RETIRED_ACC](#perf_counter_enable--retired_acc) | +| 8 | rw | 0x0 | [RETIRED_I](#perf_counter_enable--retired_i) | +| 7 | rw | 0x0 | [RETIRED_LOAD](#perf_counter_enable--retired_load) | +| 6 | rw | 0x0 | [RETIRED_INSTR](#perf_counter_enable--retired_instr) | +| 5 | rw | 0x0 | [ISSUE_CORE_TO_FPU](#perf_counter_enable--issue_core_to_fpu) | +| 4 | rw | 0x0 | [ISSUE_FPU_SEQ](#perf_counter_enable--issue_fpu_seq) | +| 3 | rw | 0x0 | [ISSUE_FPU](#perf_counter_enable--issue_fpu) | +| 2 | rw | 0x0 | [TCDM_CONGESTED](#perf_counter_enable--tcdm_congested) | +| 1 | rw | 0x0 | [TCDM_ACCESSED](#perf_counter_enable--tcdm_accessed) | +| 0 | rw | 0x0 | [CYCLE](#perf_counter_enable--cycle) | + +### PERF_COUNTER_ENABLE . ICACHE_STALL + Incremented for instruction cache stalls. + _This is a hart-local signal_ + + +### PERF_COUNTER_ENABLE . ICACHE_DOUBLE_HIT + Incremented for instruction cache double hit. + _This is a hart-local signal_ + + +### PERF_COUNTER_ENABLE . ICACHE_PREFETCH + Incremented for instruction cache prefetches. + _This is a hart-local signal_ + + +### PERF_COUNTER_ENABLE . ICACHE_HIT + Incremented for instruction cache hits. + _This is a hart-local signal_ + + +### PERF_COUNTER_ENABLE . ICACHE_MISS + Incremented for instruction cache misses. + _This is a hart-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_BUSY + Incremented whenever DMA is busy. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_B_DONE + Incremented whenever B handshake occurs. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_W_BW + Whenever W handshake occurs, the counter is incremented + by the number of bytes transfered in this cycle + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_W_DONE + Incremented whenvever W handshake occurs. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_R_BW + Whenever R handshake occurs, the counter is incremented + by the number of bytes transfered in this cycle + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_R_DONE + Incremented whenever R handshake occurs. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_AR_BW + Whenever AR handshake occurs, the counter is incremented + by the number of bytes transfered for this transaction + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_AR_DONE + Incremented whenever AR handshake occurs. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_AW_BW + Whenever AW handshake occurs, the counter is incremented + by the number of bytes transfered for this transaction + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_AW_DONE + Incremented whenever AW handshake occurs. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_BUF_R_STALL + Incremented whenever r_valid = 1 but r_ready = 0. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_BUF_W_STALL + Incremented whenever w_ready = 1 but w_valid = 0. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_W_STALL + Incremented whenever w_valid = 1 but w_ready = 0. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_R_STALL + Incremented whenever r_ready = 1 but r_valid = 0. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_AR_STALL + Incremented whenever ar_valid = 1 but ar_ready = 0. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_AW_STALL + Incremented whenever aw_valid = 1 but aw_ready = 0. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . RETIRED_ACC + Offloaded instructions retired by the core. _This is a hart-local signal._ + + +### PERF_COUNTER_ENABLE . RETIRED_I + Base instructions retired by the core. _This is a hart-local signal._ + + +### PERF_COUNTER_ENABLE . RETIRED_LOAD + Load instructions retired by the core. _This is a hart-local signal._ + + +### PERF_COUNTER_ENABLE . RETIRED_INSTR + Instructions retired by the core. _This is a hart-local signal._ + + +### PERF_COUNTER_ENABLE . ISSUE_CORE_TO_FPU +Incremented whenever the core issues an FPU instruction. + _This is a hart-local signal._ + +### PERF_COUNTER_ENABLE . ISSUE_FPU_SEQ + Incremented whenever the FPU Sequencer issues an FPU instruction. + Might be non available if the hardware doesn't support FREP. + _This is a hart-local signal._ + + +### PERF_COUNTER_ENABLE . ISSUE_FPU + Core operations performed in the FPU. _This is a hart-local signal._ + + +### PERF_COUNTER_ENABLE . TCDM_CONGESTED + Incremented whenever an access twoards the TCDM is made but the arbitration + logic didn't grant the access (due to congestion). Is strictly less than TCDM_ACCESSED. + _This is a cluster-global signal._ + + +### PERF_COUNTER_ENABLE . TCDM_ACCESSED + Increased whenever the TCDM is accessed. Each individual access is tracked, + so if `n` cores access the TCDM, `n` will be added. Accesses are tracked at the TCDM, + so it doesn't matter whether the cores or the for example the SSR hardware accesses + the TCDM. _This is a cluster-global signal._ + + +### PERF_COUNTER_ENABLE . CYCLE +Cycle counter. Counts up as long as the cluster is powered. + +## HART_SELECT +Select from which hart in the cluster, starting from `0`, + the event should be counted. For each performance counter + the cores can be selected individually. If a hart greater + than the clusters total hart size is selected the selection + will wrap and the hart corresponding to `hart_select % total_harts_in_cluster` + will be selected. +- Reset default: `0x0` +- Reset mask: `0x3ff` + +### Instances + +| Name | Offset | +|:--------------|:---------| +| HART_SELECT_0 | 0x10 | +| HART_SELECT_1 | 0x18 | + + +### Fields + +```wavejson +{"reg": [{"name": "HART_SELECT", "bits": 10, "attr": ["rw"], "rotate": -90}, {"bits": 54}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:----------------------------------------------| +| 63:10 | | | | Reserved | +| 9:0 | rw | 0x0 | HART_SELECT | Select source of per-hart performance counter | + +## PERF_COUNTER +Performance counter. Set corresponding PERF_COUNTER_ENABLE bits depending on what +performance metric you would like to track. +- Reset default: `0x0` +- Reset mask: `0xffffffffffff` + +### Instances + +| Name | Offset | +|:---------------|:---------| +| PERF_COUNTER_0 | 0x20 | +| PERF_COUNTER_1 | 0x28 | + + +### Fields + +```wavejson +{"reg": [{"name": "PERF_COUNTER", "bits": 48, "attr": ["rw"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:--------------------| +| 63:48 | | | | Reserved | +| 47:0 | rw | x | PERF_COUNTER | Performance counter | + +## CL_CLINT_SET +Set bits in the cluster-local CLINT. Writing a 1 at location i sets the cluster-local interrupt +of hart i, where i is relative to the first hart in the cluster, ignoring the cluster base hart ID. +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CL_CLINT_SET", "bits": 32, "attr": ["wo"], "rotate": 0}, {"bits": 32}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:--------------------------------------| +| 63:32 | | | | Reserved | +| 31:0 | wo | x | CL_CLINT_SET | Set cluster-local interrupt of hart i | + +## CL_CLINT_CLEAR +Clear bits in the cluster-local CLINT. Writing a 1 at location i clears the cluster-local interrupt +of hart i, where i is relative to the first hart in the cluster, ignoring the cluster base hart ID. +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CL_CLINT_CLEAR", "bits": 32, "attr": ["wo"], "rotate": 0}, {"bits": 32}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:----------------------------------------| +| 63:32 | | | | Reserved | +| 31:0 | wo | x | CL_CLINT_CLEAR | Clear cluster-local interrupt of hart i | + +## HW_BARRIER +Hardware barrier register. Loads to this register will block until all cores have +performed the load. At this stage we know that they reached the same point in the control flow, +i.e., the cores are synchronized. +- Offset: `0x40` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "HW_BARRIER", "bits": 32, "attr": ["ro"], "rotate": 0}, {"bits": 32}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:---------------------------| +| 63:32 | | | | Reserved | +| 31:0 | ro | x | HW_BARRIER | Hardware barrier register. | + +## ICACHE_PREFETCH_ENABLE +Controls prefetching of the instruction cache. +- Offset: `0x48` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "ICACHE_PREFETCH_ENABLE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 63}], "config": {"lanes": 1, "fontsize": 10, "vspace": 240}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------|:---------------------------| +| 63:1 | | | | Reserved | +| 0 | wo | 0x1 | ICACHE_PREFETCH_ENABLE | Hardware barrier register. | + +## SPATZ_STATUS +Sets the status of the Spatz cluster. +- Offset: `0x50` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_PROBE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 63}], "config": {"lanes": 1, "fontsize": 10, "vspace": 210}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------|:---------------------------------------------| +| 63:1 | | | | Reserved | +| 0 | wo | 0x0 | SPATZ_CLUSTER_PROBE | Indicates the cluster is computing a kernel. | + +## CLUSTER_BOOT_CONTROL +Controls the cluster boot process. +- Offset: `0x58` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "ENTRY_POINT", "bits": 32, "attr": ["rw"], "rotate": 0}, {"bits": 32}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:--------------------------------| +| 63:32 | | | | Reserved | +| 31:0 | rw | 0x0 | ENTRY_POINT | Post-bootstrapping entry point. | + + + +## gp_timer1_system_timer / doc / registers.md + +## Summary + +| Name | Offset | Length | Description | +|:-----------------------------------|:---------|---------:|:--------------------------------------| +| timer_unit.[`CFG_LO`](#cfg_lo) | 0x0 | 4 | Timer Low Configuration register. | +| timer_unit.[`CFG_HI`](#cfg_hi) | 0x4 | 4 | Timer HIGH Configuration register. | +| timer_unit.[`CNT_LO`](#cnt_lo) | 0x8 | 4 | Timer Low counter value register. | +| timer_unit.[`CNT_HI`](#cnt_hi) | 0xc | 4 | Timer High counter value register. | +| timer_unit.[`CMP_LO`](#cmp_lo) | 0x10 | 4 | Timer Low comparator value register. | +| timer_unit.[`CMP_HI`](#cmp_hi) | 0x14 | 4 | Timer High comparator value register. | +| timer_unit.[`START_LO`](#start_lo) | 0x18 | 4 | Start Timer Low counting register. | +| timer_unit.[`START_HI`](#start_hi) | 0x1c | 4 | Start Timer High counting register. | +| timer_unit.[`RESET_LO`](#reset_lo) | 0x20 | 4 | Reset Timer Low counter register. | +| timer_unit.[`RESET_HI`](#reset_hi) | 0x24 | 4 | Reset Timer High counter register. | + +## CFG_LO +Timer Low Configuration register. +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0x8000ffff` + +### Fields + +```wavejson +{"reg": [{"name": "ENABLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RESET", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "IRQEN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "IEM", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "MODE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ONE_S", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "PEN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CCFG", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "PVAL", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 15}, {"name": "CASC", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31 | rw | 0x0 | CASC | Timer low + Timer high 64bit cascaded mode configuration bitfield. | +| 30:16 | | | | Reserved | +| 15:8 | rw | 0x0 | PVAL | Timer low prescaler value bitfield. Ftimer = Fclk / (1 + PRESC_VAL) | +| 7 | rw | 0x0 | CCFG | Timer low clock source configuration bitfield: - 1'b0: FLL or FLL+Prescaler - 1'b1: Reference clock at 32kHz | +| 6 | rw | 0x0 | PEN | Timer low prescaler enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 5 | rw | 0x0 | ONE_S | Timer low one shot configuration bitfield: - 1'b0: let Timer low enabled counting when compare match with CMP_LO occurs. - 1'b1: disable Timer low when compare match with CMP_LO occurs. | +| 4 | rw | 0x0 | MODE | Timer low continuous mode configuration bitfield: - 1'b0: Continue mode - continue incrementing Timer low counter when compare match with CMP_LO occurs. - 1'b1: Cycle mode - reset Timer low counter when compare match with CMP_LO occurs. | +| 3 | rw | 0x0 | IEM | Timer low input event mask configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 2 | rw | 0x0 | IRQEN | Timer low compare match interrupt enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 1 | rw | 0x0 | RESET | Timer low counter reset command bitfield. Cleared after Timer Low reset execution. | +| 0 | rw | 0x0 | ENABLE | Timer low enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | + +## CFG_HI +Timer HIGH Configuration register. +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "ENABLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RESET", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "IRQEN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "IEM", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "MODE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ONE_S", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "PEN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CLKCFG", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7 | rw | 0x0 | CLKCFG | Timer high clock source configuration bitfield: - 1'b0: FLL or FLL+Prescaler - 1'b1: Reference clock at 32kHz | +| 6 | rw | 0x0 | PEN | Timer high prescaler enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 5 | rw | 0x0 | ONE_S | Timer high one shot configuration bitfield: - 1'b0: let Timer high enabled counting when compare match with CMP_HI occurs. - 1'b1: disable Timer high when compare match with CMP_HI occurs. | +| 4 | rw | 0x0 | MODE | Timer high continuous mode configuration bitfield: - 1'b0: Continue mode - continue incrementing Timer high counter when compare match with CMP_HI occurs. - 1'b1: Cycle mode - reset Timer high counter when compare match with CMP_HI occurs. | +| 3 | rw | 0x0 | IEM | Timer high input event mask configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 2 | rw | 0x0 | IRQEN | Timer high compare match interrupt enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 1 | wo | 0x0 | RESET | Timer high counter reset command bitfield. Cleared after Timer high reset execution. | +| 0 | rw | 0x0 | ENABLE | Timer high enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | + +## CNT_LO +Timer Low counter value register. +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "cnt_lo", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------| +| 31:0 | rw | 0x0 | cnt_lo | Timer Low counter value bitfield. | + +## CNT_HI +Timer High counter value register. +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "cnt_hi", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------| +| 31:0 | rw | 0x0 | cnt_hi | Timer High counter value bitfield. | + +## CMP_LO +Timer Low comparator value register. +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "cmp_lo", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------| +| 31:0 | rw | 0x0 | cmp_lo | Timer Low comparator value bitfield. | + +## CMP_HI +Timer High comparator value register. +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "cmp_hi", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------| +| 31:0 | rw | 0x0 | cmp_hi | Timer High comparator value bitfield. | + +## START_LO +Start Timer Low counting register. +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "strt_lo", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:-----------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | strt_lo | Timer Low start command bitfield. When executed, CFG_LO.ENABLE is set. | + +## START_HI +Start Timer High counting register. +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "strt_hi", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | strt_hi | Timer High start command bitfield. When executed, CFG_HI.ENABLE is set. | + +## RESET_LO +Reset Timer Low counter register. +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "rst_lo", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | rst_lo | Timer Low counter reset command bitfield. When executed, CFG_LO.RESET is set. | + +## RESET_HI +Reset Timer High counter register. +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "rst_hi", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | rst_hi | Timer High counter reset command bitfield. When executed, CFG_HI.RESET is set. | + + + +## gp_timer2_advanced_timer / doc / registers.md + +## Summary + +| Name | Offset | Length | Description | +|:--------------------------------------------------|:---------|---------:|:---------------------------------------------------------| +| apb_adv_timer.[`T0_CMD`](#t0_cmd) | 0x0 | 4 | ADV_TIMER0 command register. | +| apb_adv_timer.[`T0_CONFIG`](#t0_config) | 0x4 | 4 | ADV_TIMER0 configuration register. | +| apb_adv_timer.[`T0_THRESHOLD`](#t0_threshold) | 0x8 | 4 | ADV_TIMER0 threshold configuration register. | +| apb_adv_timer.[`T0_TH_CHANNEL0`](#t0_th_channel0) | 0xc | 4 | ADV_TIMER0 channel 0 threshold configuration register. | +| apb_adv_timer.[`T0_TH_CHANNEL1`](#t0_th_channel1) | 0x10 | 4 | ADV_TIMER0 channel 1 threshold configuration register. | +| apb_adv_timer.[`T0_TH_CHANNEL2`](#t0_th_channel2) | 0x14 | 4 | ADV_TIMER0 channel 2 threshold configuration register. | +| apb_adv_timer.[`T0_TH_CHANNEL3`](#t0_th_channel3) | 0x18 | 4 | ADV_TIMER0 channel 3 threshold configuration register. | +| apb_adv_timer.[`T0_COUNTER`](#t0_counter) | 0x1c | 4 | ADV_TIMER0 counter register. | +| apb_adv_timer.[`T1_CMD`](#t1_cmd) | 0x20 | 4 | ADV_TIMER1 command register. | +| apb_adv_timer.[`T1_CONFIG`](#t1_config) | 0x24 | 4 | ADV_TIMER1 configuration register. | +| apb_adv_timer.[`T1_THRESHOLD`](#t1_threshold) | 0x28 | 4 | ADV_TIMER1 threshold configuration register. | +| apb_adv_timer.[`T1_TH_CHANNEL0`](#t1_th_channel0) | 0x2c | 4 | ADV_TIMER1 channel 0 threshold configuration register. | +| apb_adv_timer.[`T1_TH_CHANNEL1`](#t1_th_channel1) | 0x30 | 4 | ADV_TIMER1 channel 1 threshold configuration register. | +| apb_adv_timer.[`T1_TH_CHANNEL2`](#t1_th_channel2) | 0x34 | 4 | ADV_TIMER1 channel 2 threshold configuration register. | +| apb_adv_timer.[`T1_TH_CHANNEL3`](#t1_th_channel3) | 0x38 | 4 | ADV_TIMER1 channel 3 threshold configuration register. | +| apb_adv_timer.[`T1_COUNTER`](#t1_counter) | 0x3c | 4 | ADV_TIMER1 counter register. | +| apb_adv_timer.[`T2_CMD`](#t2_cmd) | 0x40 | 4 | ADV_TIMER2 command register. | +| apb_adv_timer.[`T2_CONFIG`](#t2_config) | 0x44 | 4 | ADV_TIMER2 configuration register. | +| apb_adv_timer.[`T2_THRESHOLD`](#t2_threshold) | 0x48 | 4 | ADV_TIMER2 threshold configuration register. | +| apb_adv_timer.[`T2_TH_CHANNEL0`](#t2_th_channel0) | 0x4c | 4 | ADV_TIMER2 channel 0 threshold configuration register. | +| apb_adv_timer.[`T2_TH_CHANNEL1`](#t2_th_channel1) | 0x50 | 4 | ADV_TIMER2 channel 1 threshold configuration register. | +| apb_adv_timer.[`T2_TH_CHANNEL2`](#t2_th_channel2) | 0x54 | 4 | ADV_TIMER2 channel 2 threshold configuration register. | +| apb_adv_timer.[`T2_TH_CHANNEL3`](#t2_th_channel3) | 0x58 | 4 | ADV_TIMER2 channel 3 threshold configuration register. | +| apb_adv_timer.[`T2_COUNTER`](#t2_counter) | 0x5c | 4 | ADV_TIMER2 counter register. | +| apb_adv_timer.[`T3_CMD`](#t3_cmd) | 0x60 | 4 | ADV_TIMER3 command register. | +| apb_adv_timer.[`T3_CONFIG`](#t3_config) | 0x64 | 4 | ADV_TIMER3 configuration register. | +| apb_adv_timer.[`T3_THRESHOLD`](#t3_threshold) | 0x68 | 4 | ADV_TIMER3 threshold configuration register. | +| apb_adv_timer.[`T3_TH_CHANNEL0`](#t3_th_channel0) | 0x6c | 4 | ADV_TIMER3 channel 0 threshold configuration register. | +| apb_adv_timer.[`T3_TH_CHANNEL1`](#t3_th_channel1) | 0x70 | 4 | ADV_TIMER3 channel 1 threshold configuration register. | +| apb_adv_timer.[`T3_TH_CHANNEL2`](#t3_th_channel2) | 0x74 | 4 | ADV_TIMER3 channel 2 threshold configuration register. | +| apb_adv_timer.[`T3_TH_CHANNEL3`](#t3_th_channel3) | 0x78 | 4 | ADV_TIMER3 channel 3 threshold configuration register. | +| apb_adv_timer.[`T3_COUNTER`](#t3_counter) | 0x7c | 4 | ADV_TIMER3 counter register. | +| apb_adv_timer.[`EVENT_CFG`](#event_cfg) | 0x80 | 4 | ADV_TIMERS events configuration register. | +| apb_adv_timer.[`CG`](#cg) | 0x84 | 4 | ADV_TIMERS channels clock gating configuration register. | + +## T0_CMD +ADV_TIMER0 command register. +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "START", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "STOP", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "UPDATE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RESET", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "ARM", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RFU", "bits": 27, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------| +| 31:5 | wo | 0x0 | RFU | ? | +| 4 | wo | 0x0 | ARM | ADV_TIMER0 arm command bitfield. | +| 3 | wo | 0x0 | RESET | ADV_TIMER0 reset command bitfield. | +| 2 | wo | 0x0 | UPDATE | ADV_TIMER0 update command bitfield. | +| 1 | wo | 0x0 | STOP | ADV_TIMER0 stop command bitfield. | +| 0 | wo | 0x0 | START | ADV_TIMER0 start command bitfield. | + +## T0_CONFIG +ADV_TIMER0 configuration register. +- Offset: `0x4` +- Reset default: `0x1000` +- Reset mask: `0xff1fff` + +### Fields + +```wavejson +{"reg": [{"name": "INSEL", "bits": 8, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"name": "CLKSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "UPDOWNSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 3}, {"name": "PRESC", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------------| +| 31:24 | | | Reserved | +| 23:16 | rw | 0x0 | [PRESC](#t0_config--presc) | +| 15:13 | | | Reserved | +| 12 | rw | 0x1 | [UPDOWNSEL](#t0_config--updownsel) | +| 11 | rw | 0x0 | [CLKSEL](#t0_config--clksel) | +| 10:8 | rw | 0x0 | [MODE](#t0_config--mode) | +| 7:0 | rw | 0x0 | [INSEL](#t0_config--insel) | + +### T0_CONFIG . PRESC +ADV_TIMER0 prescaler value configuration bitfield. + +### T0_CONFIG . UPDOWNSEL +ADV_TIMER0 center-aligned mode configuration bitfield: +- 1'b0: The counter counts up and down alternatively. +- 1'b1: The counter counts up and resets to 0 when reach threshold. + +### T0_CONFIG . CLKSEL +ADV_TIMER0 clock source configuration bitfield: +- 1'b0: FLL +- 1'b1: reference clock at 32kHz + +### T0_CONFIG . MODE +ADV_TIMER0 trigger mode configuration bitfield: +- 3'h0: trigger event at each clock cycle. +- 3'h1: trigger event if input source is 0 +- 3'h2: trigger event if input source is 1 +- 3'h3: trigger event on input source rising edge +- 3'h4: trigger event on input source falling edge +- 3'h5: trigger event on input source falling or rising edge +- 3'h6: trigger event on input source rising edge when armed +- 3'h7: trigger event on input source falling edge when armed + +### T0_CONFIG . INSEL +ADV_TIMER0 input source configuration bitfield: +- 0-31: GPIO[0] to GPIO[31] +- 32-35: Channel 0 to 3 of ADV_TIMER0 +- 36-39: Channel 0 to 3 of ADV_TIMER1 +- 40-43: Channel 0 to 3 of ADV_TIMER2 +- 44-47: Channel 0 to 3 of ADV_TIMER3 + +## T0_THRESHOLD +ADV_TIMER0 threshold configuration register. +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH_LO", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "TH_HI", "bits": 16, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------| +| 31:16 | rw | 0x0 | TH_HI | ADV_TIMER0 threshold high part configuration bitfield. It defines end counter value. | +| 15:0 | rw | 0x0 | TH_LO | ADV_TIMER0 threshold low part configuration bitfield. It defines start counter value. | + +## T0_TH_CHANNEL0 +ADV_TIMER0 channel 0 threshold configuration register. +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t0_th_channel0--mode) | +| 15:0 | rw | 0x0 | [TH](#t0_th_channel0--th) | + +### T0_TH_CHANNEL0 . MODE +ADV_TIMER0 channel 0 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T0_TH_CHANNEL0 . TH +ADV_TIMER0 channel 0 threshold configuration bitfield. + +## T0_TH_CHANNEL1 +ADV_TIMER0 channel 1 threshold configuration register. +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t0_th_channel1--mode) | +| 15:0 | rw | 0x0 | [TH](#t0_th_channel1--th) | + +### T0_TH_CHANNEL1 . MODE +ADV_TIMER0 channel 1 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T0_TH_CHANNEL1 . TH +ADV_TIMER0 channel 1 threshold configuration bitfield. + +## T0_TH_CHANNEL2 +ADV_TIMER0 channel 2 threshold configuration register. +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t0_th_channel2--mode) | +| 15:0 | rw | 0x0 | [TH](#t0_th_channel2--th) | + +### T0_TH_CHANNEL2 . MODE +ADV_TIMER0 channel 2 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T0_TH_CHANNEL2 . TH +ADV_TIMER0 channel 2 threshold configuration bitfield. + +## T0_TH_CHANNEL3 +ADV_TIMER0 channel 3 threshold configuration register. +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t0_th_channel3--mode) | +| 15:0 | rw | 0x0 | [TH](#t0_th_channel3--th) | + +### T0_TH_CHANNEL3 . MODE +ADV_TIMER0 channel 3 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T0_TH_CHANNEL3 . TH +ADV_TIMER0 channel 3 threshold configuration bitfield. + +## T0_COUNTER +ADV_TIMER0 counter register. +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "COUNTER", "bits": 16, "attr": ["ro"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------------------| +| 31:16 | | | | Reserved | +| 15:0 | ro | 0x0 | COUNTER | ADV_TIMER0 counter value. | + +## T1_CMD +ADV_TIMER1 command register. +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0x1f` + +### Fields + +```wavejson +{"reg": [{"name": "START", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "STOP", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "UPDATE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RESET", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "ARM", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 27}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------| +| 31:5 | | | | Reserved | +| 4 | wo | 0x0 | ARM | ADV_TIMER1 arm command bitfield. | +| 3 | wo | 0x0 | RESET | ADV_TIMER1 reset command bitfield. | +| 2 | wo | 0x0 | UPDATE | ADV_TIMER1 update command bitfield. | +| 1 | wo | 0x0 | STOP | ADV_TIMER1 stop command bitfield. | +| 0 | wo | 0x0 | START | ADV_TIMER1 start command bitfield. | + +## T1_CONFIG +ADV_TIMER1 configuration register. +- Offset: `0x24` +- Reset default: `0x1000` +- Reset mask: `0xff1fff` + +### Fields + +```wavejson +{"reg": [{"name": "INSEL", "bits": 8, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"name": "CLKSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "UPDOWNSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 3}, {"name": "PRESC", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------------| +| 31:24 | | | Reserved | +| 23:16 | rw | 0x0 | [PRESC](#t1_config--presc) | +| 15:13 | | | Reserved | +| 12 | rw | 0x1 | [UPDOWNSEL](#t1_config--updownsel) | +| 11 | rw | 0x0 | [CLKSEL](#t1_config--clksel) | +| 10:8 | rw | 0x0 | [MODE](#t1_config--mode) | +| 7:0 | rw | 0x0 | [INSEL](#t1_config--insel) | + +### T1_CONFIG . PRESC +ADV_TIMER1 prescaler value configuration bitfield. + +### T1_CONFIG . UPDOWNSEL +ADV_TIMER1 center-aligned mode configuration bitfield: +- 1'b0: The counter counts up and down alternatively. +- 1'b1: The counter counts up and resets to 0 when reach threshold. + +### T1_CONFIG . CLKSEL +ADV_TIMER1 clock source configuration bitfield: +- 1'b0: FLL +- 1'b1: reference clock at 32kHz + +### T1_CONFIG . MODE +ADV_TIMER1 trigger mode configuration bitfield: +- 3'h0: trigger event at each clock cycle. +- 3'h1: trigger event if input source is 0 +- 3'h2: trigger event if input source is 1 +- 3'h3: trigger event on input source rising edge +- 3'h4: trigger event on input source falling edge +- 3'h5: trigger event on input source falling or rising edge +- 3'h6: trigger event on input source rising edge when armed +- 3'h7: trigger event on input source falling edge when armed + +### T1_CONFIG . INSEL +ADV_TIMER1 input source configuration bitfield: +- 0-31: GPIO[0] to GPIO[31] +- 32-35: Channel 0 to 3 of ADV_TIMER0 +- 36-39: Channel 0 to 3 of ADV_TIMER1 +- 40-43: Channel 0 to 3 of ADV_TIMER2 +- 44-47: Channel 0 to 3 of ADV_TIMER3 + +## T1_THRESHOLD +ADV_TIMER1 threshold configuration register. +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH_LO", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "TH_HI", "bits": 16, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------| +| 31:16 | rw | 0x0 | TH_HI | ADV_TIMER1 threshold high part configuration bitfield. It defines end counter value. | +| 15:0 | rw | 0x0 | TH_LO | ADV_TIMER1 threshold low part configuration bitfield. It defines start counter value. | + +## T1_TH_CHANNEL0 +ADV_TIMER1 channel 0 threshold configuration register. +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t1_th_channel0--mode) | +| 15:0 | rw | 0x0 | [TH](#t1_th_channel0--th) | + +### T1_TH_CHANNEL0 . MODE +ADV_TIMER1 channel 0 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T1_TH_CHANNEL0 . TH +ADV_TIMER1 channel 0 threshold configuration bitfield. + +## T1_TH_CHANNEL1 +ADV_TIMER1 channel 1 threshold configuration register. +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t1_th_channel1--mode) | +| 15:0 | rw | 0x0 | [TH](#t1_th_channel1--th) | + +### T1_TH_CHANNEL1 . MODE +ADV_TIMER1 channel 1 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T1_TH_CHANNEL1 . TH +ADV_TIMER1 channel 1 threshold configuration bitfield. + +## T1_TH_CHANNEL2 +ADV_TIMER1 channel 2 threshold configuration register. +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t1_th_channel2--mode) | +| 15:0 | rw | 0x0 | [TH](#t1_th_channel2--th) | + +### T1_TH_CHANNEL2 . MODE +ADV_TIMER1 channel 2 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T1_TH_CHANNEL2 . TH +ADV_TIMER1 channel 2 threshold configuration bitfield. + +## T1_TH_CHANNEL3 +ADV_TIMER1 channel 3 threshold configuration register. +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t1_th_channel3--mode) | +| 15:0 | rw | 0x0 | [TH](#t1_th_channel3--th) | + +### T1_TH_CHANNEL3 . MODE +ADV_TIMER1 channel 3 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T1_TH_CHANNEL3 . TH +ADV_TIMER1 channel 3 threshold configuration bitfield. + +## T1_COUNTER +ADV_TIMER1 counter register. +- Offset: `0x3c` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "COUNTER", "bits": 16, "attr": ["ro"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------------------| +| 31:16 | | | | Reserved | +| 15:0 | ro | 0x0 | COUNTER | ADV_TIMER1 counter value. | + +## T2_CMD +ADV_TIMER2 command register. +- Offset: `0x40` +- Reset default: `0x0` +- Reset mask: `0x1f` + +### Fields + +```wavejson +{"reg": [{"name": "START", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "STOP", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "UPDATE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RESET", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "ARM", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 27}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------| +| 31:5 | | | | Reserved | +| 4 | wo | 0x0 | ARM | ADV_TIMER2 arm command bitfield. | +| 3 | wo | 0x0 | RESET | ADV_TIMER2 reset command bitfield. | +| 2 | wo | 0x0 | UPDATE | ADV_TIMER2 update command bitfield. | +| 1 | wo | 0x0 | STOP | ADV_TIMER2 stop command bitfield. | +| 0 | wo | 0x0 | START | ADV_TIMER2 start command bitfield. | + +## T2_CONFIG +ADV_TIMER2 configuration register. +- Offset: `0x44` +- Reset default: `0x1000` +- Reset mask: `0xff1fff` + +### Fields + +```wavejson +{"reg": [{"name": "INSEL", "bits": 8, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"name": "CLKSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "UPDOWNSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 3}, {"name": "PRESC", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------------| +| 31:24 | | | Reserved | +| 23:16 | rw | 0x0 | [PRESC](#t2_config--presc) | +| 15:13 | | | Reserved | +| 12 | rw | 0x1 | [UPDOWNSEL](#t2_config--updownsel) | +| 11 | rw | 0x0 | [CLKSEL](#t2_config--clksel) | +| 10:8 | rw | 0x0 | [MODE](#t2_config--mode) | +| 7:0 | rw | 0x0 | [INSEL](#t2_config--insel) | + +### T2_CONFIG . PRESC +ADV_TIMER2 prescaler value configuration bitfield. + +### T2_CONFIG . UPDOWNSEL +ADV_TIMER2 center-aligned mode configuration bitfield: +- 1'b0: The counter counts up and down alternatively. +- 1'b1: The counter counts up and resets to 0 when reach threshold. + +### T2_CONFIG . CLKSEL +ADV_TIMER2 clock source configuration bitfield: +- 1'b0: FLL +- 1'b1: reference clock at 32kHz + +### T2_CONFIG . MODE +ADV_TIMER2 trigger mode configuration bitfield: +- 3'h0: trigger event at each clock cycle. +- 3'h1: trigger event if input source is 0 +- 3'h2: trigger event if input source is 1 +- 3'h3: trigger event on input source rising edge +- 3'h4: trigger event on input source falling edge +- 3'h5: trigger event on input source falling or rising edge +- 3'h6: trigger event on input source rising edge when armed +- 3'h7: trigger event on input source falling edge when armed + +### T2_CONFIG . INSEL +ADV_TIMER2 input source configuration bitfield: +- 0-31: GPIO[0] to GPIO[31] +- 32-35: Channel 0 to 3 of ADV_TIMER0 +- 36-39: Channel 0 to 3 of ADV_TIMER1 +- 40-43: Channel 0 to 3 of ADV_TIMER2 +- 44-47: Channel 0 to 3 of ADV_TIMER3 + +## T2_THRESHOLD +ADV_TIMER2 threshold configuration register. +- Offset: `0x48` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH_LO", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "TH_HI", "bits": 16, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------| +| 31:16 | rw | 0x0 | TH_HI | ADV_TIMER2 threshold high part configuration bitfield. It defines end counter value. | +| 15:0 | rw | 0x0 | TH_LO | ADV_TIMER2 threshold low part configuration bitfield. It defines start counter value. | + +## T2_TH_CHANNEL0 +ADV_TIMER2 channel 0 threshold configuration register. +- Offset: `0x4c` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t2_th_channel0--mode) | +| 15:0 | rw | 0x0 | [TH](#t2_th_channel0--th) | + +### T2_TH_CHANNEL0 . MODE +ADV_TIMER2 channel 0 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T2_TH_CHANNEL0 . TH +ADV_TIMER2 channel 0 threshold configuration bitfield. + +## T2_TH_CHANNEL1 +ADV_TIMER2 channel 1 threshold configuration register. +- Offset: `0x50` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t2_th_channel1--mode) | +| 15:0 | rw | 0x0 | [TH](#t2_th_channel1--th) | + +### T2_TH_CHANNEL1 . MODE +ADV_TIMER2 channel 1 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T2_TH_CHANNEL1 . TH +ADV_TIMER2 channel 1 threshold configuration bitfield. + +## T2_TH_CHANNEL2 +ADV_TIMER2 channel 2 threshold configuration register. +- Offset: `0x54` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t2_th_channel2--mode) | +| 15:0 | rw | 0x0 | [TH](#t2_th_channel2--th) | + +### T2_TH_CHANNEL2 . MODE +ADV_TIMER2 channel 2 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T2_TH_CHANNEL2 . TH +ADV_TIMER2 channel 2 threshold configuration bitfield. + +## T2_TH_CHANNEL3 +ADV_TIMER2 channel 3 threshold configuration register. +- Offset: `0x58` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t2_th_channel3--mode) | +| 15:0 | rw | 0x0 | [TH](#t2_th_channel3--th) | + +### T2_TH_CHANNEL3 . MODE +ADV_TIMER2 channel 3 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T2_TH_CHANNEL3 . TH +ADV_TIMER2 channel 3 threshold configuration bitfield. + +## T2_COUNTER +ADV_TIMER2 counter register. +- Offset: `0x5c` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "COUNTER", "bits": 16, "attr": ["ro"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------------------| +| 31:16 | | | | Reserved | +| 15:0 | ro | 0x0 | COUNTER | ADV_TIMER2 counter value. | + +## T3_CMD +ADV_TIMER3 command register. +- Offset: `0x60` +- Reset default: `0x0` +- Reset mask: `0x1f` + +### Fields + +```wavejson +{"reg": [{"name": "START", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "STOP", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "UPDATE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RESET", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "ARM", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 27}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------| +| 31:5 | | | | Reserved | +| 4 | wo | 0x0 | ARM | ADV_TIMER3 arm command bitfield. | +| 3 | wo | 0x0 | RESET | ADV_TIMER3 reset command bitfield. | +| 2 | wo | 0x0 | UPDATE | ADV_TIMER3 update command bitfield. | +| 1 | wo | 0x0 | STOP | ADV_TIMER3 stop command bitfield. | +| 0 | wo | 0x0 | START | ADV_TIMER3 start command bitfield. | + +## T3_CONFIG +ADV_TIMER3 configuration register. +- Offset: `0x64` +- Reset default: `0x1000` +- Reset mask: `0xff1fff` + +### Fields + +```wavejson +{"reg": [{"name": "INSEL", "bits": 8, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"name": "CLKSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "UPDOWNSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 3}, {"name": "PRESC", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------------| +| 31:24 | | | Reserved | +| 23:16 | rw | 0x0 | [PRESC](#t3_config--presc) | +| 15:13 | | | Reserved | +| 12 | rw | 0x1 | [UPDOWNSEL](#t3_config--updownsel) | +| 11 | rw | 0x0 | [CLKSEL](#t3_config--clksel) | +| 10:8 | rw | 0x0 | [MODE](#t3_config--mode) | +| 7:0 | rw | 0x0 | [INSEL](#t3_config--insel) | + +### T3_CONFIG . PRESC +ADV_TIMER3 prescaler value configuration bitfield. + +### T3_CONFIG . UPDOWNSEL +ADV_TIMER3 center-aligned mode configuration bitfield: +- 1'b0: The counter counts up and down alternatively. +- 1'b1: The counter counts up and resets to 0 when reach threshold. + +### T3_CONFIG . CLKSEL +ADV_TIMER3 clock source configuration bitfield: +- 1'b0: FLL +- 1'b1: reference clock at 32kHz + +### T3_CONFIG . MODE +ADV_TIMER3 trigger mode configuration bitfield: +- 3'h0: trigger event at each clock cycle. +- 3'h1: trigger event if input source is 0 +- 3'h2: trigger event if input source is 1 +- 3'h3: trigger event on input source rising edge +- 3'h4: trigger event on input source falling edge +- 3'h5: trigger event on input source falling or rising edge +- 3'h6: trigger event on input source rising edge when armed +- 3'h7: trigger event on input source falling edge when armed + +### T3_CONFIG . INSEL +ADV_TIMER3 input source configuration bitfield: +- 0-31: GPIO[0] to GPIO[31] +- 32-35: Channel 0 to 3 of ADV_TIMER0 +- 36-39: Channel 0 to 3 of ADV_TIMER1 +- 40-43: Channel 0 to 3 of ADV_TIMER2 +- 44-47: Channel 0 to 3 of ADV_TIMER3 + +## T3_THRESHOLD +ADV_TIMER3 threshold configuration register. +- Offset: `0x68` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH_LO", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "TH_HI", "bits": 16, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------| +| 31:16 | rw | 0x0 | TH_HI | ADV_TIMER3 threshold high part configuration bitfield. It defines end counter value. | +| 15:0 | rw | 0x0 | TH_LO | ADV_TIMER3 threshold low part configuration bitfield. It defines start counter value. | + +## T3_TH_CHANNEL0 +ADV_TIMER3 channel 0 threshold configuration register. +- Offset: `0x6c` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t3_th_channel0--mode) | +| 15:0 | rw | 0x0 | [TH](#t3_th_channel0--th) | + +### T3_TH_CHANNEL0 . MODE +ADV_TIMER3 channel 0 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T3_TH_CHANNEL0 . TH +ADV_TIMER3 channel 0 threshold configuration bitfield. + +## T3_TH_CHANNEL1 +ADV_TIMER3 channel 1 threshold configuration register. +- Offset: `0x70` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t3_th_channel1--mode) | +| 15:0 | rw | 0x0 | [TH](#t3_th_channel1--th) | + +### T3_TH_CHANNEL1 . MODE +ADV_TIMER3 channel 1 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T3_TH_CHANNEL1 . TH +ADV_TIMER3 channel 1 threshold configuration bitfield. + +## T3_TH_CHANNEL2 +ADV_TIMER3 channel 2 threshold configuration register. +- Offset: `0x74` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t3_th_channel2--mode) | +| 15:0 | rw | 0x0 | [TH](#t3_th_channel2--th) | + +### T3_TH_CHANNEL2 . MODE +ADV_TIMER3 channel 2 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T3_TH_CHANNEL2 . TH +ADV_TIMER3 channel 2 threshold configuration bitfield. + +## T3_TH_CHANNEL3 +ADV_TIMER3 channel 3 threshold configuration register. +- Offset: `0x78` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t3_th_channel3--mode) | +| 15:0 | rw | 0x0 | [TH](#t3_th_channel3--th) | + +### T3_TH_CHANNEL3 . MODE +ADV_TIMER3 channel 3 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T3_TH_CHANNEL3 . TH +ADV_TIMER3 channel 3 threshold configuration bitfield. + +## T3_COUNTER +ADV_TIMER3 counter register. +- Offset: `0x7c` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "COUNTER", "bits": 16, "attr": ["ro"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------------------| +| 31:16 | | | | Reserved | +| 15:0 | ro | 0x0 | COUNTER | ADV_TIMER3 counter value. | + +## EVENT_CFG +ADV_TIMERS events configuration register. +- Offset: `0x80` +- Reset default: `0x0` +- Reset mask: `0xfffff` + +### Fields + +```wavejson +{"reg": [{"name": "SEL0", "bits": 4, "attr": ["rw"], "rotate": 0}, {"name": "SEL1", "bits": 4, "attr": ["rw"], "rotate": 0}, {"name": "SEL2", "bits": 4, "attr": ["rw"], "rotate": 0}, {"name": "SEL3", "bits": 4, "attr": ["rw"], "rotate": 0}, {"name": "ENA", "bits": 4, "attr": ["rw"], "rotate": 0}, {"bits": 12}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-------------------------| +| 31:20 | | | Reserved | +| 19:16 | rw | 0x0 | [ENA](#event_cfg--ena) | +| 15:12 | rw | 0x0 | [SEL3](#event_cfg--sel3) | +| 11:8 | rw | 0x0 | [SEL2](#event_cfg--sel2) | +| 7:4 | rw | 0x0 | [SEL1](#event_cfg--sel1) | +| 3:0 | rw | 0x0 | [SEL0](#event_cfg--sel0) | + +### EVENT_CFG . ENA +ADV_TIMER output event enable configuration bitfield. ENA[i]=1 enables output event i generation. + +### EVENT_CFG . SEL3 +ADV_TIMER output event 3 source configuration bitfiled: +- 4'h0: ADV_TIMER0 channel 0. +- 4'h1: ADV_TIMER0 channel 1. +- 4'h2: ADV_TIMER0 channel 2. +- 4'h3: ADV_TIMER0 channel 3. +- 4'h4: ADV_TIMER1 channel 0. +- 4'h5: ADV_TIMER1 channel 1. +- 4'h6: ADV_TIMER1 channel 2. +- 4'h7: ADV_TIMER1 channel 3. +- 4'h8: ADV_TIMER2 channel 0. +- 4'h9: ADV_TIMER2 channel 1. +- 4'hA: ADV_TIMER2 channel 2. +- 4'hB: ADV_TIMER2 channel 3. +- 4'hC: ADV_TIMER3 channel 0. +- 4'hD: ADV_TIMER3 channel 1. +- 4'hE: ADV_TIMER3 channel 2. +- 4'hF: ADV_TIMER3 channel 3. + +### EVENT_CFG . SEL2 +ADV_TIMER output event 2 source configuration bitfiled: +- 4'h0: ADV_TIMER0 channel 0. +- 4'h1: ADV_TIMER0 channel 1. +- 4'h2: ADV_TIMER0 channel 2. +- 4'h3: ADV_TIMER0 channel 3. +- 4'h4: ADV_TIMER1 channel 0. +- 4'h5: ADV_TIMER1 channel 1. +- 4'h6: ADV_TIMER1 channel 2. +- 4'h7: ADV_TIMER1 channel 3. +- 4'h8: ADV_TIMER2 channel 0. +- 4'h9: ADV_TIMER2 channel 1. +- 4'hA: ADV_TIMER2 channel 2. +- 4'hB: ADV_TIMER2 channel 3. +- 4'hC: ADV_TIMER3 channel 0. +- 4'hD: ADV_TIMER3 channel 1. +- 4'hE: ADV_TIMER3 channel 2. +- 4'hF: ADV_TIMER3 channel 3. + +### EVENT_CFG . SEL1 +ADV_TIMER output event 1 source configuration bitfiled: +- 4'h0: ADV_TIMER0 channel 0. +- 4'h1: ADV_TIMER0 channel 1. +- 4'h2: ADV_TIMER0 channel 2. +- 4'h3: ADV_TIMER0 channel 3. +- 4'h4: ADV_TIMER1 channel 0. +- 4'h5: ADV_TIMER1 channel 1. +- 4'h6: ADV_TIMER1 channel 2. +- 4'h7: ADV_TIMER1 channel 3. +- 4'h8: ADV_TIMER2 channel 0. +- 4'h9: ADV_TIMER2 channel 1. +- 4'hA: ADV_TIMER2 channel 2. +- 4'hB: ADV_TIMER2 channel 3. +- 4'hC: ADV_TIMER3 channel 0. +- 4'hD: ADV_TIMER3 channel 1. +- 4'hE: ADV_TIMER3 channel 2. +- 4'hF: ADV_TIMER3 channel 3. + +### EVENT_CFG . SEL0 +ADV_TIMER output event 0 source configuration bitfiled: +- 4'h0: ADV_TIMER0 channel 0. +- 4'h1: ADV_TIMER0 channel 1. +- 4'h2: ADV_TIMER0 channel 2. +- 4'h3: ADV_TIMER0 channel 3. +- 4'h4: ADV_TIMER1 channel 0. +- 4'h5: ADV_TIMER1 channel 1. +- 4'h6: ADV_TIMER1 channel 2. +- 4'h7: ADV_TIMER1 channel 3. +- 4'h8: ADV_TIMER2 channel 0. +- 4'h9: ADV_TIMER2 channel 1. +- 4'hA: ADV_TIMER2 channel 2. +- 4'hB: ADV_TIMER2 channel 3. +- 4'hC: ADV_TIMER3 channel 0. +- 4'hD: ADV_TIMER3 channel 1. +- 4'hE: ADV_TIMER3 channel 2. +- 4'hF: ADV_TIMER3 channel 3. + +## CG +ADV_TIMERS channels clock gating configuration register. +- Offset: `0x84` +- Reset default: `0x0` +- Reset mask: `0xf` + +### Fields + +```wavejson +{"reg": [{"name": "ENA", "bits": 4, "attr": ["rw"], "rotate": 0}, {"bits": 28}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------------------------------------------| +| 31:4 | | | | Reserved | +| 3:0 | rw | 0x0 | ENA | ADV_TIMER clock gating configuration bitfield. - ENA[i]=0: clock gate ADV_TIMERi. - ENA[i]=1: enable ADV_TIMERi. | + + + +## gpio / doc / registers.md + +## Summary + +| Name | Offset | Length | Description | +|:-----------------------------------------------------|:---------|---------:|:----------------------------------------------| +| gpio.[`INTR_STATE`](#intr_state) | 0x0 | 4 | Interrupt State Register | +| gpio.[`INTR_ENABLE`](#intr_enable) | 0x4 | 4 | Interrupt Enable Register | +| gpio.[`INTR_TEST`](#intr_test) | 0x8 | 4 | Interrupt Test Register | +| gpio.[`ALERT_TEST`](#alert_test) | 0xc | 4 | Alert Test Register | +| gpio.[`DATA_IN`](#data_in) | 0x10 | 4 | GPIO Input data read value | +| gpio.[`DIRECT_OUT`](#direct_out) | 0x14 | 4 | GPIO direct output data write value | +| gpio.[`MASKED_OUT_LOWER`](#masked_out_lower) | 0x18 | 4 | GPIO write data lower with mask. | +| gpio.[`MASKED_OUT_UPPER`](#masked_out_upper) | 0x1c | 4 | GPIO write data upper with mask. | +| gpio.[`DIRECT_OE`](#direct_oe) | 0x20 | 4 | GPIO Output Enable. | +| gpio.[`MASKED_OE_LOWER`](#masked_oe_lower) | 0x24 | 4 | GPIO write Output Enable lower with mask. | +| gpio.[`MASKED_OE_UPPER`](#masked_oe_upper) | 0x28 | 4 | GPIO write Output Enable upper with mask. | +| gpio.[`INTR_CTRL_EN_RISING`](#intr_ctrl_en_rising) | 0x2c | 4 | GPIO interrupt enable for GPIO, rising edge. | +| gpio.[`INTR_CTRL_EN_FALLING`](#intr_ctrl_en_falling) | 0x30 | 4 | GPIO interrupt enable for GPIO, falling edge. | +| gpio.[`INTR_CTRL_EN_LVLHIGH`](#intr_ctrl_en_lvlhigh) | 0x34 | 4 | GPIO interrupt enable for GPIO, level high. | +| gpio.[`INTR_CTRL_EN_LVLLOW`](#intr_ctrl_en_lvllow) | 0x38 | 4 | GPIO interrupt enable for GPIO, level low. | +| gpio.[`CTRL_EN_INPUT_FILTER`](#ctrl_en_input_filter) | 0x3c | 4 | filter enable for GPIO input bits. | + +## INTR_STATE +Interrupt State Register +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "gpio", "bits": 32, "attr": ["rw1c"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------| +| 31:0 | rw1c | 0x0 | gpio | raised if any of GPIO pin detects configured interrupt mode | + +## INTR_ENABLE +Interrupt Enable Register +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "gpio", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------| +| 31:0 | rw | 0x0 | gpio | Enable interrupt when corresponding bit in [`INTR_STATE.gpio`](#intr_state) is set. | + +## INTR_TEST +Interrupt Test Register +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "gpio", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------| +| 31:0 | wo | 0x0 | gpio | Write 1 to force corresponding bit in [`INTR_STATE.gpio`](#intr_state) to 1. | + +## ALERT_TEST +Alert Test Register +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "fatal_fault", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:-------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | fatal_fault | Write 1 to trigger one alert event of this kind. | + +## DATA_IN +GPIO Input data read value +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "DATA_IN", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------| +| 31:0 | ro | x | DATA_IN | | + +## DIRECT_OUT +GPIO direct output data write value +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "DIRECT_OUT", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:0 | rw | x | DIRECT_OUT | | + +## MASKED_OUT_LOWER +GPIO write data lower with mask. + +Masked write for DATA_OUT[15:0]. + +Upper 16 bits of this register are used as mask. Writing +lower 16 bits of the register changes DATA_OUT[15:0] value +if mask bits are set. + +Read-back of this register returns upper 16 bits as zero +and lower 16 bits as DATA_OUT[15:0]. +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "data", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "mask", "bits": 16, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------| +| 31:16 | wo | x | mask | Write data mask[15:0]. A value of 1 in mask[i] allows the updating of DATA_OUT[i], 0 <= i <= 15 | +| 15:0 | rw | x | data | Write data value[15:0]. Value to write into DATA_OUT[i], valid in the presence of mask[i]==1 | + +## MASKED_OUT_UPPER +GPIO write data upper with mask. + +Masked write for DATA_OUT[31:16]. + +Upper 16 bits of this register are used as mask. Writing +lower 16 bits of the register changes DATA_OUT[31:16] value +if mask bits are set. + +Read-back of this register returns upper 16 bits as zero +and lower 16 bits as DATA_OUT[31:16]. +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "data", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "mask", "bits": 16, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------------------| +| 31:16 | wo | x | mask | Write data mask[31:16]. A value of 1 in mask[i] allows the updating of DATA_OUT[i], 16 <= i <= 31 | +| 15:0 | rw | x | data | Write data value[31:16]. Value to write into DATA_OUT[i], valid in the presence of mask[i]==1 | + +## DIRECT_OE +GPIO Output Enable. + +Setting direct_oe[i] to 1 enables output mode for GPIO[i] +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "DIRECT_OE", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:--------------| +| 31:0 | rw | x | DIRECT_OE | | + +## MASKED_OE_LOWER +GPIO write Output Enable lower with mask. + +Masked write for DATA_OE[15:0], the register that controls +output mode for GPIO pins [15:0]. + +Upper 16 bits of this register are used as mask. Writing +lower 16 bits of the register changes DATA_OE[15:0] value +if mask bits are set. + +Read-back of this register returns upper 16 bits as zero +and lower 16 bits as DATA_OE[15:0]. +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "data", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "mask", "bits": 16, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------| +| 31:16 | rw | x | mask | Write OE mask[15:0]. A value of 1 in mask[i] allows the updating of DATA_OE[i], 0 <= i <= 15 | +| 15:0 | rw | x | data | Write OE value[15:0]. Value to write into DATA_OE[i], valid in the presence of mask[i]==1 | + +## MASKED_OE_UPPER +GPIO write Output Enable upper with mask. + +Masked write for DATA_OE[31:16], the register that controls +output mode for GPIO pins [31:16]. + +Upper 16 bits of this register are used as mask. Writing +lower 16 bits of the register changes DATA_OE[31:16] value +if mask bits are set. + +Read-back of this register returns upper 16 bits as zero +and lower 16 bits as DATA_OE[31:16]. +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "data", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "mask", "bits": 16, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------------------------| +| 31:16 | rw | x | mask | Write OE mask[31:16]. A value of 1 in mask[i] allows the updating of DATA_OE[i], 16 <= i <= 31 | +| 15:0 | rw | x | data | Write OE value[31:16]. Value to write into DATA_OE[i], valid in the presence of mask[i]==1 | + +## INTR_CTRL_EN_RISING +GPIO interrupt enable for GPIO, rising edge. + +If [`INTR_ENABLE`](#intr_enable)[i] is true, a value of 1 on [`INTR_CTRL_EN_RISING`](#intr_ctrl_en_rising)[i] +enables rising-edge interrupt detection on GPIO[i]. +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "INTR_CTRL_EN_RISING", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------|:--------------| +| 31:0 | rw | 0x0 | INTR_CTRL_EN_RISING | | + +## INTR_CTRL_EN_FALLING +GPIO interrupt enable for GPIO, falling edge. + +If [`INTR_ENABLE`](#intr_enable)[i] is true, a value of 1 on [`INTR_CTRL_EN_FALLING`](#intr_ctrl_en_falling)[i] +enables falling-edge interrupt detection on GPIO[i]. +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "INTR_CTRL_EN_FALLING", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:0 | rw | 0x0 | INTR_CTRL_EN_FALLING | | + +## INTR_CTRL_EN_LVLHIGH +GPIO interrupt enable for GPIO, level high. + +If [`INTR_ENABLE`](#intr_enable)[i] is true, a value of 1 on [`INTR_CTRL_EN_LVLHIGH`](#intr_ctrl_en_lvlhigh)[i] +enables level high interrupt detection on GPIO[i]. +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "INTR_CTRL_EN_LVLHIGH", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:0 | rw | 0x0 | INTR_CTRL_EN_LVLHIGH | | + +## INTR_CTRL_EN_LVLLOW +GPIO interrupt enable for GPIO, level low. + +If [`INTR_ENABLE`](#intr_enable)[i] is true, a value of 1 on [`INTR_CTRL_EN_LVLLOW`](#intr_ctrl_en_lvllow)[i] +enables level low interrupt detection on GPIO[i]. +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "INTR_CTRL_EN_LVLLOW", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------|:--------------| +| 31:0 | rw | 0x0 | INTR_CTRL_EN_LVLLOW | | + +## CTRL_EN_INPUT_FILTER +filter enable for GPIO input bits. + +If [`CTRL_EN_INPUT_FILTER`](#ctrl_en_input_filter)[i] is true, a value of input bit [i] +must be stable for 16 cycles before transitioning. +- Offset: `0x3c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CTRL_EN_INPUT_FILTER", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:0 | rw | 0x0 | CTRL_EN_INPUT_FILTER | | + + + +## hyperbus / doc / registers.md + +## Summary + +| Name | Offset | Length | Description | +|:-----------------------------------------------------------|:---------|---------:|:--------------------------------------------| +| hyperbus.[`T_LATENCY_ACCESS`](#t_latency_access) | 0x0 | 4 | Initial latency | +| hyperbus.[`EN_LATENCY_ADDITIONAL`](#en_latency_additional) | 0x4 | 4 | Force 2x Latency count | +| hyperbus.[`T_BURST_MAX`](#t_burst_max) | 0x8 | 4 | Max burst Length between two memory refresh | +| hyperbus.[`T_READ_WRITE_RECOVERY`](#t_read_write_recovery) | 0xc | 4 | Idle time between transactions | +| hyperbus.[`T_RX_CLOCK_DELAY`](#t_rx_clock_delay) | 0x10 | 4 | RX Delay Line | +| hyperbus.[`T_TX_CLOCK_DELAY`](#t_tx_clock_delay) | 0x14 | 4 | TX Delay Line | +| hyperbus.[`ADDRESS_MASK_MSB`](#address_mask_msb) | 0x18 | 4 | Address Mask MSB | +| hyperbus.[`ADDRESS_SPACE`](#address_space) | 0x1c | 4 | L2 sleep configuration register | +| hyperbus.[`PHYS_IN_USE`](#phys_in_use) | 0x20 | 4 | Number of PHYs on use | +| hyperbus.[`WHICH_PHY`](#which_phy) | 0x24 | 4 | PHY used in single PHY mode | +| hyperbus.[`CS0_BASE`](#cs0_base) | 0x28 | 4 | CS0 Base address range | +| hyperbus.[`CS0_END`](#cs0_end) | 0x2c | 4 | CS0 End address range | +| hyperbus.[`CS1_BASE`](#cs1_base) | 0x30 | 4 | CS1 Base address range | +| hyperbus.[`CS1_END`](#cs1_end) | 0x34 | 4 | CS1 End address range | +| hyperbus.[`CS2_BASE`](#cs2_base) | 0x38 | 4 | CS2 Base address range | +| hyperbus.[`CS2_END`](#cs2_end) | 0x3c | 4 | CS2 End address range | +| hyperbus.[`CS3_BASE`](#cs3_base) | 0x40 | 4 | CS3 Base address range | +| hyperbus.[`CS3_END`](#cs3_end) | 0x44 | 4 | CS3 End address range | + +## T_LATENCY_ACCESS +Initial latency +- Offset: `0x0` +- Reset default: `0x6` +- Reset mask: `0xf` + +### Fields + +```wavejson +{"reg": [{"name": "T_LATENCY_ACCESS", "bits": 4, "attr": ["rw"], "rotate": -90}, {"bits": 28}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:----------------| +| 31:4 | | | | Reserved | +| 3:0 | rw | 0x6 | T_LATENCY_ACCESS | Initial latency | + +## EN_LATENCY_ADDITIONAL +Force 2x Latency count +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "EN_LATENCY_ADDITIONAL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:-----------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | EN_LATENCY_ADDITIONAL | Force 2x Latency count | + +## T_BURST_MAX +Max burst Length between two memory refresh +- Offset: `0x8` +- Reset default: `0x15e` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "T_BURST_MAX", "bits": 16, "attr": ["rw"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:--------------------------------------------| +| 31:16 | | | | Reserved | +| 15:0 | rw | 0x15e | T_BURST_MAX | Max burst Length between two memory refresh | + +## T_READ_WRITE_RECOVERY +Idle time between transactions +- Offset: `0xc` +- Reset default: `0x6` +- Reset mask: `0xf` + +### Fields + +```wavejson +{"reg": [{"name": "T_READ_WRITE_RECOVERY", "bits": 4, "attr": ["rw"], "rotate": -90}, {"bits": 28}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:-------------------------------| +| 31:4 | | | | Reserved | +| 3:0 | rw | 0x6 | T_READ_WRITE_RECOVERY | Idle time between transactions | + +## T_RX_CLOCK_DELAY +RX Delay Line +- Offset: `0x10` +- Reset default: `0x8` +- Reset mask: `0xf` + +### Fields + +```wavejson +{"reg": [{"name": "T_RX_CLOCK_DELAY", "bits": 4, "attr": ["rw"], "rotate": -90}, {"bits": 28}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:4 | | | | Reserved | +| 3:0 | rw | 0x8 | T_RX_CLOCK_DELAY | RX Delay Line | + +## T_TX_CLOCK_DELAY +TX Delay Line +- Offset: `0x14` +- Reset default: `0x8` +- Reset mask: `0xf` + +### Fields + +```wavejson +{"reg": [{"name": "T_TX_CLOCK_DELAY", "bits": 4, "attr": ["rw"], "rotate": -90}, {"bits": 28}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:4 | | | | Reserved | +| 3:0 | rw | 0x8 | T_TX_CLOCK_DELAY | TX Delay Line | + +## ADDRESS_MASK_MSB +Address Mask MSB +- Offset: `0x18` +- Reset default: `0x19` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "ADDRESS_MASK_MSB", "bits": 19, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:-----------------| +| 31:19 | | | | Reserved | +| 18:0 | rw | 0x19 | ADDRESS_MASK_MSB | Address Mask MSB | + +## ADDRESS_SPACE +L2 sleep configuration register +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "ADDRESS_SPACE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 150}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:--------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | ADDRESS_SPACE | L2 sleep configuration register | + +## PHYS_IN_USE +Number of PHYs on use +- Offset: `0x20` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PHYS_IN_USE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:--------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | PHYS_IN_USE | Number of PHYs on use: - 1'b0: Uses 1 PHY - 1'b1: Uses 2 PHYs | + +## WHICH_PHY +PHY used in single PHY mode +- Offset: `0x24` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "WHICH_PHY", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | WHICH_PHY | PHY used in single PHY mode: - 1'b0: PHY 0 is used - 1'b1: PHY 1 is used | + +## CS0_BASE +CS0 Base address range +- Offset: `0x28` +- Reset default: `0x80000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CS0_BASE", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:---------|:-----------------------| +| 31:0 | rw | 0x80000000 | CS0_BASE | CS0 Base address range | + +## CS0_END +CS0 End address range +- Offset: `0x2c` +- Reset default: `0x81000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CS0_END", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:--------|:----------------------| +| 31:0 | rw | 0x81000000 | CS0_END | CS0 End address range | + +## CS1_BASE +CS1 Base address range +- Offset: `0x30` +- Reset default: `0x81000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CS1_BASE", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:---------|:-----------------------| +| 31:0 | rw | 0x81000000 | CS1_BASE | CS1 Base address range | + +## CS1_END +CS1 End address range +- Offset: `0x34` +- Reset default: `0x82000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CS1_END", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:--------|:----------------------| +| 31:0 | rw | 0x82000000 | CS1_END | CS1 End address range | + +## CS2_BASE +CS2 Base address range +- Offset: `0x38` +- Reset default: `0x82000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CS2_BASE", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:---------|:-----------------------| +| 31:0 | rw | 0x82000000 | CS2_BASE | CS2 Base address range | + +## CS2_END +CS2 End address range +- Offset: `0x3c` +- Reset default: `0x83000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CS2_END", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:--------|:----------------------| +| 31:0 | rw | 0x83000000 | CS2_END | CS2 End address range | + +## CS3_BASE +CS3 Base address range +- Offset: `0x40` +- Reset default: `0x83000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CS3_BASE", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:---------|:-----------------------| +| 31:0 | rw | 0x83000000 | CS3_BASE | CS3 Base address range | + +## CS3_END +CS3 End address range +- Offset: `0x44` +- Reset default: `0x84000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CS3_END", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:--------|:----------------------| +| 31:0 | rw | 0x84000000 | CS3_END | CS3 End address range | + + + +## i2c / doc / registers.md + +## Summary + +| Name | Offset | Length | Description | +|:--------------------------------------------------------------|:---------|---------:|:----------------------------------------------------------------------------------------------------------| +| i2c.[`INTR_STATE`](#intr_state) | 0x0 | 4 | Interrupt State Register | +| i2c.[`INTR_ENABLE`](#intr_enable) | 0x4 | 4 | Interrupt Enable Register | +| i2c.[`INTR_TEST`](#intr_test) | 0x8 | 4 | Interrupt Test Register | +| i2c.[`ALERT_TEST`](#alert_test) | 0xc | 4 | Alert Test Register | +| i2c.[`CTRL`](#ctrl) | 0x10 | 4 | I2C Control Register | +| i2c.[`STATUS`](#status) | 0x14 | 4 | I2C Live Status Register for Host and Target modes | +| i2c.[`RDATA`](#rdata) | 0x18 | 4 | I2C Read Data | +| i2c.[`FDATA`](#fdata) | 0x1c | 4 | I2C Host Format Data | +| i2c.[`FIFO_CTRL`](#fifo_ctrl) | 0x20 | 4 | I2C FIFO control register | +| i2c.[`HOST_FIFO_CONFIG`](#host_fifo_config) | 0x24 | 4 | Host mode FIFO configuration | +| i2c.[`TARGET_FIFO_CONFIG`](#target_fifo_config) | 0x28 | 4 | Target mode FIFO configuration | +| i2c.[`HOST_FIFO_STATUS`](#host_fifo_status) | 0x2c | 4 | Host mode FIFO status register | +| i2c.[`TARGET_FIFO_STATUS`](#target_fifo_status) | 0x30 | 4 | Target mode FIFO status register | +| i2c.[`OVRD`](#ovrd) | 0x34 | 4 | I2C Override Control Register | +| i2c.[`VAL`](#val) | 0x38 | 4 | Oversampled RX values | +| i2c.[`TIMING0`](#timing0) | 0x3c | 4 | Detailed I2C Timings (directly corresponding to table 10 in the I2C Specification). | +| i2c.[`TIMING1`](#timing1) | 0x40 | 4 | Detailed I2C Timings (directly corresponding to table 10 in the I2C Specification). | +| i2c.[`TIMING2`](#timing2) | 0x44 | 4 | Detailed I2C Timings (directly corresponding to table 10 in the I2C Specification). | +| i2c.[`TIMING3`](#timing3) | 0x48 | 4 | Detailed I2C Timings (directly corresponding to table 10, in the I2C Specification). | +| i2c.[`TIMING4`](#timing4) | 0x4c | 4 | Detailed I2C Timings (directly corresponding to table 10, in the I2C Specification). | +| i2c.[`TIMEOUT_CTRL`](#timeout_ctrl) | 0x50 | 4 | I2C clock stretching and bus timeout control. | +| i2c.[`TARGET_ID`](#target_id) | 0x54 | 4 | I2C target address and mask pairs | +| i2c.[`ACQDATA`](#acqdata) | 0x58 | 4 | I2C target acquired data | +| i2c.[`TXDATA`](#txdata) | 0x5c | 4 | I2C target transmit data | +| i2c.[`HOST_TIMEOUT_CTRL`](#host_timeout_ctrl) | 0x60 | 4 | I2C host clock generation timeout value (in units of input clock frequency). | +| i2c.[`TARGET_TIMEOUT_CTRL`](#target_timeout_ctrl) | 0x64 | 4 | I2C target internal stretching timeout control. | +| i2c.[`TARGET_NACK_COUNT`](#target_nack_count) | 0x68 | 4 | Number of times the I2C target has NACK'ed a new transaction since the last read of this register. | +| i2c.[`TARGET_ACK_CTRL`](#target_ack_ctrl) | 0x6c | 4 | Controls for mid-transfer (N)ACK phase handling | +| i2c.[`ACQ_FIFO_NEXT_DATA`](#acq_fifo_next_data) | 0x70 | 4 | The data byte pending to be written to the ACQ FIFO. | +| i2c.[`HOST_NACK_HANDLER_TIMEOUT`](#host_nack_handler_timeout) | 0x74 | 4 | Timeout in Host-Mode for an unhandled NACK before hardware automatically ends the transaction. | +| i2c.[`CONTROLLER_EVENTS`](#controller_events) | 0x78 | 4 | Latched events that explain why the controller halted. | +| i2c.[`TARGET_EVENTS`](#target_events) | 0x7c | 4 | Latched events that can cause the target module to stretch the clock at the beginning of a read transfer. | + +## INTR_STATE +Interrupt State Register +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0x7fff` + +### Fields + +```wavejson +{"reg": [{"name": "fmt_threshold", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "rx_threshold", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "acq_threshold", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "rx_overflow", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "controller_halt", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "scl_interference", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "sda_interference", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "stretch_timeout", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "sda_unstable", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "cmd_complete", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "tx_stretch", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "tx_threshold", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "acq_stretch", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "unexp_stop", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "host_timeout", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"bits": 17}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:15 | | | | Reserved | +| 14 | rw1c | 0x0 | host_timeout | target mode interrupt: raised if the host stops sending the clock during an ongoing transaction. | +| 13 | rw1c | 0x0 | unexp_stop | target mode interrupt: raised if STOP is received without a preceding NACK during an external host read. | +| 12 | ro | 0x0 | acq_stretch | target mode interrupt: raised if the target is stretching clocks due to full ACQ FIFO or zero count in [`TARGET_ACK_CTRL.NBYTES`](#target_ack_ctrl) (if enabled). This is a level status interrupt. | +| 11 | ro | 0x0 | tx_threshold | target mode interrupt: asserted whilst the TX FIFO level is below the low threshold. This is a level status interrupt. | +| 10 | ro | 0x0 | tx_stretch | target mode interrupt: raised if the target is stretching clocks for a read command. This is a level status interrupt. | +| 9 | rw1c | 0x0 | cmd_complete | host and target mode interrupt. In host mode, raised if the host issues a repeated START or terminates the transaction by issuing STOP. In target mode, raised if the external host issues a STOP or repeated START. | +| 8 | rw1c | 0x0 | sda_unstable | host mode interrupt: raised if the target does not assert a constant value of SDA during transmission. | +| 7 | rw1c | 0x0 | stretch_timeout | host mode interrupt: raised if target stretches the clock beyond the allowed timeout period | +| 6 | rw1c | 0x0 | sda_interference | host mode interrupt: raised if the SDA line goes low when host is trying to assert high | +| 5 | rw1c | 0x0 | scl_interference | host mode interrupt: raised if the SCL line drops early (not supported without clock synchronization). | +| 4 | ro | 0x0 | controller_halt | host mode interrupt: raised if the controller FSM is halted, such as on an unexpected NACK or lost arbitration. Check [`CONTROLLER_EVENTS`](#controller_events) for the reason. The interrupt will be released when the bits in [`CONTROLLER_EVENTS`](#controller_events) are cleared. | +| 3 | rw1c | 0x0 | rx_overflow | host mode interrupt: raised if the RX FIFO has overflowed. | +| 2 | ro | 0x0 | acq_threshold | target mode interrupt: asserted whilst the ACQ FIFO level is above the high threshold. This is a level status interrupt. | +| 1 | ro | 0x0 | rx_threshold | host mode interrupt: asserted whilst the RX FIFO level is above the high threshold. This is a level status interrupt. | +| 0 | ro | 0x0 | fmt_threshold | host mode interrupt: asserted whilst the FMT FIFO level is below the low threshold. This is a level status interrupt. | + +## INTR_ENABLE +Interrupt Enable Register +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0x7fff` + +### Fields + +```wavejson +{"reg": [{"name": "fmt_threshold", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "rx_threshold", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "acq_threshold", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "rx_overflow", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "controller_halt", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "scl_interference", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "sda_interference", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "stretch_timeout", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "sda_unstable", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "cmd_complete", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "tx_stretch", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "tx_threshold", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "acq_stretch", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "unexp_stop", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "host_timeout", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 17}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:---------------------------------------------------------------------------| +| 31:15 | | | | Reserved | +| 14 | rw | 0x0 | host_timeout | Enable interrupt when [`INTR_STATE.host_timeout`](#intr_state) is set. | +| 13 | rw | 0x0 | unexp_stop | Enable interrupt when [`INTR_STATE.unexp_stop`](#intr_state) is set. | +| 12 | rw | 0x0 | acq_stretch | Enable interrupt when [`INTR_STATE.acq_stretch`](#intr_state) is set. | +| 11 | rw | 0x0 | tx_threshold | Enable interrupt when [`INTR_STATE.tx_threshold`](#intr_state) is set. | +| 10 | rw | 0x0 | tx_stretch | Enable interrupt when [`INTR_STATE.tx_stretch`](#intr_state) is set. | +| 9 | rw | 0x0 | cmd_complete | Enable interrupt when [`INTR_STATE.cmd_complete`](#intr_state) is set. | +| 8 | rw | 0x0 | sda_unstable | Enable interrupt when [`INTR_STATE.sda_unstable`](#intr_state) is set. | +| 7 | rw | 0x0 | stretch_timeout | Enable interrupt when [`INTR_STATE.stretch_timeout`](#intr_state) is set. | +| 6 | rw | 0x0 | sda_interference | Enable interrupt when [`INTR_STATE.sda_interference`](#intr_state) is set. | +| 5 | rw | 0x0 | scl_interference | Enable interrupt when [`INTR_STATE.scl_interference`](#intr_state) is set. | +| 4 | rw | 0x0 | controller_halt | Enable interrupt when [`INTR_STATE.controller_halt`](#intr_state) is set. | +| 3 | rw | 0x0 | rx_overflow | Enable interrupt when [`INTR_STATE.rx_overflow`](#intr_state) is set. | +| 2 | rw | 0x0 | acq_threshold | Enable interrupt when [`INTR_STATE.acq_threshold`](#intr_state) is set. | +| 1 | rw | 0x0 | rx_threshold | Enable interrupt when [`INTR_STATE.rx_threshold`](#intr_state) is set. | +| 0 | rw | 0x0 | fmt_threshold | Enable interrupt when [`INTR_STATE.fmt_threshold`](#intr_state) is set. | + +## INTR_TEST +Interrupt Test Register +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0x7fff` + +### Fields + +```wavejson +{"reg": [{"name": "fmt_threshold", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "rx_threshold", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "acq_threshold", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "rx_overflow", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "controller_halt", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "scl_interference", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "sda_interference", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "stretch_timeout", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "sda_unstable", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "cmd_complete", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "tx_stretch", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "tx_threshold", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "acq_stretch", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "unexp_stop", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "host_timeout", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 17}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------------------------------------------------------------| +| 31:15 | | | | Reserved | +| 14 | wo | 0x0 | host_timeout | Write 1 to force [`INTR_STATE.host_timeout`](#intr_state) to 1. | +| 13 | wo | 0x0 | unexp_stop | Write 1 to force [`INTR_STATE.unexp_stop`](#intr_state) to 1. | +| 12 | wo | 0x0 | acq_stretch | Write 1 to force [`INTR_STATE.acq_stretch`](#intr_state) to 1. | +| 11 | wo | 0x0 | tx_threshold | Write 1 to force [`INTR_STATE.tx_threshold`](#intr_state) to 1. | +| 10 | wo | 0x0 | tx_stretch | Write 1 to force [`INTR_STATE.tx_stretch`](#intr_state) to 1. | +| 9 | wo | 0x0 | cmd_complete | Write 1 to force [`INTR_STATE.cmd_complete`](#intr_state) to 1. | +| 8 | wo | 0x0 | sda_unstable | Write 1 to force [`INTR_STATE.sda_unstable`](#intr_state) to 1. | +| 7 | wo | 0x0 | stretch_timeout | Write 1 to force [`INTR_STATE.stretch_timeout`](#intr_state) to 1. | +| 6 | wo | 0x0 | sda_interference | Write 1 to force [`INTR_STATE.sda_interference`](#intr_state) to 1. | +| 5 | wo | 0x0 | scl_interference | Write 1 to force [`INTR_STATE.scl_interference`](#intr_state) to 1. | +| 4 | wo | 0x0 | controller_halt | Write 1 to force [`INTR_STATE.controller_halt`](#intr_state) to 1. | +| 3 | wo | 0x0 | rx_overflow | Write 1 to force [`INTR_STATE.rx_overflow`](#intr_state) to 1. | +| 2 | wo | 0x0 | acq_threshold | Write 1 to force [`INTR_STATE.acq_threshold`](#intr_state) to 1. | +| 1 | wo | 0x0 | rx_threshold | Write 1 to force [`INTR_STATE.rx_threshold`](#intr_state) to 1. | +| 0 | wo | 0x0 | fmt_threshold | Write 1 to force [`INTR_STATE.fmt_threshold`](#intr_state) to 1. | + +## ALERT_TEST +Alert Test Register +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "fatal_fault", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:-------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | fatal_fault | Write 1 to trigger one alert event of this kind. | + +## CTRL +I2C Control Register +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0x7f` + +### Fields + +```wavejson +{"reg": [{"name": "ENABLEHOST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ENABLETARGET", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "LLPBK", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "NACK_ADDR_AFTER_TIMEOUT", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ACK_CTRL_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "MULTI_CONTROLLER_MONITOR_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "TX_STRETCH_CTRL_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 25}], "config": {"lanes": 1, "fontsize": 10, "vspace": 290}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------------------------------------------| +| 31:7 | | | Reserved | +| 6 | rw | 0x0 | [TX_STRETCH_CTRL_EN](#ctrl--tx_stretch_ctrl_en) | +| 5 | rw | 0x0 | [MULTI_CONTROLLER_MONITOR_EN](#ctrl--multi_controller_monitor_en) | +| 4 | rw | 0x0 | [ACK_CTRL_EN](#ctrl--ack_ctrl_en) | +| 3 | rw | 0x0 | [NACK_ADDR_AFTER_TIMEOUT](#ctrl--nack_addr_after_timeout) | +| 2 | rw | 0x0 | [LLPBK](#ctrl--llpbk) | +| 1 | rw | 0x0 | [ENABLETARGET](#ctrl--enabletarget) | +| 0 | rw | 0x0 | [ENABLEHOST](#ctrl--enablehost) | + +### CTRL . TX_STRETCH_CTRL_EN +If set to 1, this bit causes a read transfer addressed to this target to set the corresponding bit in [`TARGET_EVENTS.`](#target_events) + +While [`TARGET_EVENTS.TX_PENDING`](#target_events) is 1, subsequent read transactions will stretch the clock, even if there is data in the TX FIFO. + +If enabled, this function allows software to confirm the data in the TX FIFO should be released for the current read. +This may be useful for cases where the TX FIFO has data that does not apply to the current transfer. +For example, the transaction could've targeted an alternate function via another address. + +### CTRL . MULTI_CONTROLLER_MONITOR_EN +Enable the bus monitor in multi-controller mode. + +If a 0->1 transition happens while [`CTRL.ENABLEHOST`](#ctrl) and [`CTRL.ENABLETARGET`](#ctrl) are both 0, the bus monitor will enable and begin in the "bus busy" state. +To transition to a bus free state, [`HOST_TIMEOUT_CTRL`](#host_timeout_ctrl) must be nonzero, so the bus monitor may count out idle cycles to confirm the freedom to transmit. +In addition, the bus monitor will track whether the bus is free based on the enabled timeouts and detected Stop symbols. +For multi-controller mode, ensure [`CTRL.MULTI_CONTROLLER_MONITOR_EN`](#ctrl) becomes 1 no later than [`CTRL.ENABLEHOST`](#ctrl) or [`CTRL.ENABLETARGET.`](#ctrl) +This bit can be set at the same time as either or both of the other two, though. + +Note that if [`CTRL.MULTI_CONTROLLER_MONITOR_EN`](#ctrl) is set after [`CTRL.ENABLEHOST`](#ctrl) or [`CTRL.ENABLETARGET`](#ctrl), the bus monitor will begin in the "bus free" state instead. +This would violate the proper protocol for a controller to join a multi-controller environment. +However, if this controller is known to be the first to join, this ordering will enable skipping the idle wait. + +When 0, the bus monitor will report that the bus is always free, so the controller FSM is never blocked from transmitting. + +### CTRL . ACK_CTRL_EN +Enable I2C Target ACK Control Mode. + +ACK Control Mode works together with [`TARGET_ACK_CTRL.NBYTES`](#target_ack_ctrl) to allow software to control upper-layer protocol (N)ACKing (e.g. as in SMBus). +This bit enables the mode when 1, and [`TARGET_ACK_CTRL.NBYTES`](#target_ack_ctrl) limits how many bytes may be automatically ACK'd while the ACQ FIFO has space. +If it is 0, the decision to ACK or NACK is made only from stretching timeouts and [`CTRL.NACK_ADDR_AFTER_TIMEOUT.`](#ctrl) + +### CTRL . NACK_ADDR_AFTER_TIMEOUT +Enable NACKing the address on a stretch timeout. + +This is a Target mode feature. +If enabled (1), a stretch timeout will cause the device to NACK the address byte. +If disabled (0), a stretch timeout will cause the device to ACK the address byte. +SMBus requires that devices always ACK their address, even for read commands. +However, non-SMBus protocols may have a different approach and can choose to NACK instead. + +Note that both cases handle data bytes the same way. +For writes, the Target module will NACK all subsequent data bytes until it receives a Stop. +For reads, the Target module will release SDA, causing 0xff to be returned for all data bytes until it receives a Stop. + +### CTRL . LLPBK +Enable I2C line loopback test +If line loopback is enabled, the internal design sees ACQ and RX data as "1" + +### CTRL . ENABLETARGET +Enable Target I2C functionality + +### CTRL . ENABLEHOST +Enable Host I2C functionality + +## STATUS +I2C Live Status Register for Host and Target modes +- Offset: `0x14` +- Reset default: `0x33c` +- Reset mask: `0x7ff` + +### Fields + +```wavejson +{"reg": [{"name": "FMTFULL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RXFULL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "FMTEMPTY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "HOSTIDLE", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "TARGETIDLE", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RXEMPTY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "TXFULL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "ACQFULL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "TXEMPTY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "ACQEMPTY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "ACK_CTRL_STRETCH", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 21}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:---------------------------------------------------------------------------------------------------------| +| 31:11 | | | | Reserved | +| 10 | ro | x | ACK_CTRL_STRETCH | Target mode stretching at (N)ACK phase due to zero count in [`TARGET_ACK_CTRL.NBYTES`](#target_ack_ctrl) | +| 9 | ro | 0x1 | ACQEMPTY | Target mode receive FIFO is empty | +| 8 | ro | 0x1 | TXEMPTY | Target mode TX FIFO is empty | +| 7 | ro | x | ACQFULL | Target mode receive FIFO is full | +| 6 | ro | x | TXFULL | Target mode TX FIFO is full | +| 5 | ro | 0x1 | RXEMPTY | Host mode RX FIFO is empty | +| 4 | ro | 0x1 | TARGETIDLE | Target functionality is idle. No Target transaction is in progress | +| 3 | ro | 0x1 | HOSTIDLE | Host functionality is idle. No Host transaction is in progress | +| 2 | ro | 0x1 | FMTEMPTY | Host mode FMT FIFO is empty | +| 1 | ro | x | RXFULL | Host mode RX FIFO is full | +| 0 | ro | x | FMTFULL | Host mode FMT FIFO is full | + +## RDATA +I2C Read Data +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "RDATA", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | x | RDATA | | + +## FDATA +I2C Host Format Data + +Writes to this register are used to define and drive Controller-Mode transactions. +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0x1fff` + +### Fields + +```wavejson +{"reg": [{"name": "FBYTE", "bits": 8, "attr": ["wo"], "rotate": 0}, {"name": "START", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "STOP", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "READB", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RCONT", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "NAKOK", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 19}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------| +| 31:13 | | | Reserved | +| 12 | wo | 0x0 | [NAKOK](#fdata--nakok) | +| 11 | wo | 0x0 | [RCONT](#fdata--rcont) | +| 10 | wo | 0x0 | [READB](#fdata--readb) | +| 9 | wo | 0x0 | [STOP](#fdata--stop) | +| 8 | wo | 0x0 | [START](#fdata--start) | +| 7:0 | wo | 0x0 | [FBYTE](#fdata--fbyte) | + +### FDATA . NAKOK +For the currrent controller-transmitter byte (WRITE), do not halt via CONTROLLER_EVENTS +or assert the 'controller_halt' interrupt if the current byte is not ACK'd. + +### FDATA . RCONT +Do not NACK the last byte read, let the read operation continue. + +### FDATA . READB +Transfer Direction Indicator. + +If unset, this write to FDATA defines a controller-transmitter operation (WRITE). +A single byte of data (FBYTE) is written to the bus. + +If set, this write to FDATA defines a controller-receiver operation (READ). +The value of FBYTE defines the number of bytes read from the bus. (256 if FBYTE==0)" +After this number of bytes are read, the final byte will be NACKed to end the transfer +unless RCONT is also set. + +### FDATA . STOP +Issue a STOP condition after transmitting FBYTE. + +### FDATA . START +Issue a START condition before transmitting FBYTE. + +### FDATA . FBYTE +Format Byte. + +If no flags are set, hardware will transmit this byte directly. + +If READB is set, this field becomes the number of bytes hardware will automatically +read from the bus. + +## FIFO_CTRL +I2C FIFO control register +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0x183` + +### Fields + +```wavejson +{"reg": [{"name": "RXRST", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "FMTRST", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 5}, {"name": "ACQRST", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "TXRST", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 23}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------| +| 31:9 | | | | Reserved | +| 8 | wo | 0x0 | TXRST | TX FIFO reset. Write 1 to the register resets it. Read returns 0 | +| 7 | wo | 0x0 | ACQRST | ACQ FIFO reset. Write 1 to the register resets it. Read returns 0 | +| 6:2 | | | | Reserved | +| 1 | wo | 0x0 | FMTRST | FMT fifo reset. Write 1 to the register resets FMT_FIFO. Read returns 0 | +| 0 | wo | 0x0 | RXRST | RX fifo reset. Write 1 to the register resets RX_FIFO. Read returns 0 | + +## HOST_FIFO_CONFIG +Host mode FIFO configuration +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0xfff0fff` + +### Fields + +```wavejson +{"reg": [{"name": "RX_THRESH", "bits": 12, "attr": ["rw"], "rotate": 0}, {"bits": 4}, {"name": "FMT_THRESH", "bits": 12, "attr": ["rw"], "rotate": 0}, {"bits": 4}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:-----------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:28 | | | | Reserved | +| 27:16 | rw | 0x0 | FMT_THRESH | Threshold level for FMT interrupts. Whilst the number of used entries in the FMT FIFO is below this setting, the fmt_threshold interrupt will be asserted. | +| 15:12 | | | | Reserved | +| 11:0 | rw | 0x0 | RX_THRESH | Threshold level for RX interrupts. Whilst the level of data in the RX FIFO is above this setting, the rx_threshold interrupt will be asserted. | + +## TARGET_FIFO_CONFIG +Target mode FIFO configuration +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0xfff0fff` + +### Fields + +```wavejson +{"reg": [{"name": "TX_THRESH", "bits": 12, "attr": ["rw"], "rotate": 0}, {"bits": 4}, {"name": "ACQ_THRESH", "bits": 12, "attr": ["rw"], "rotate": 0}, {"bits": 4}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:28 | | | | Reserved | +| 27:16 | rw | 0x0 | ACQ_THRESH | Threshold level for ACQ interrupts. Whilst the level of data in the ACQ FIFO is above this setting, the acq_threshold interrupt will be asserted. | +| 15:12 | | | | Reserved | +| 11:0 | rw | 0x0 | TX_THRESH | Threshold level for TX interrupts. Whilst the number of used entries in the TX FIFO is below this setting, the tx_threshold interrupt will be asserted. | + +## HOST_FIFO_STATUS +Host mode FIFO status register +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0xfff0fff` + +### Fields + +```wavejson +{"reg": [{"name": "FMTLVL", "bits": 12, "attr": ["ro"], "rotate": 0}, {"bits": 4}, {"name": "RXLVL", "bits": 12, "attr": ["ro"], "rotate": 0}, {"bits": 4}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------| +| 31:28 | | | | Reserved | +| 27:16 | ro | x | RXLVL | Current fill level of RX fifo | +| 15:12 | | | | Reserved | +| 11:0 | ro | x | FMTLVL | Current fill level of FMT fifo | + +## TARGET_FIFO_STATUS +Target mode FIFO status register +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0xfff0fff` + +### Fields + +```wavejson +{"reg": [{"name": "TXLVL", "bits": 12, "attr": ["ro"], "rotate": 0}, {"bits": 4}, {"name": "ACQLVL", "bits": 12, "attr": ["ro"], "rotate": 0}, {"bits": 4}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------| +| 31:28 | | | | Reserved | +| 27:16 | ro | x | ACQLVL | Current fill level of ACQ fifo | +| 15:12 | | | | Reserved | +| 11:0 | ro | x | TXLVL | Current fill level of TX fifo | + +## OVRD +I2C Override Control Register +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "TXOVRDEN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "SCLVAL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "SDAVAL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 100}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------------------------------------------------------------------| +| 31:3 | | | | Reserved | +| 2 | rw | 0x0 | SDAVAL | Value for SDA Override. Set to 0 to drive TX Low, and set to 1 for high-Z | +| 1 | rw | 0x0 | SCLVAL | Value for SCL Override. Set to 0 to drive TX Low, and set to 1 for high-Z | +| 0 | rw | 0x0 | TXOVRDEN | Override the SDA and SCL TX signals. | + +## VAL +Oversampled RX values +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SCL_RX", "bits": 16, "attr": ["ro"], "rotate": 0}, {"name": "SDA_RX", "bits": 16, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------| +| 31:16 | ro | x | SDA_RX | Last 16 oversampled values of SDA. Most recent bit is bit 16, oldest 31. | +| 15:0 | ro | x | SCL_RX | Last 16 oversampled values of SCL. Most recent bit is bit 0, oldest 15. | + +## TIMING0 +Detailed I2C Timings (directly corresponding to table 10 in the I2C Specification). +All values are expressed in units of the input clock period. +These must be greater than 2 in order for the change in SCL to propagate to the input of the FSM so that acknowledgements are detected correctly. +- Offset: `0x3c` +- Reset default: `0x0` +- Reset mask: `0x1fff1fff` + +### Fields + +```wavejson +{"reg": [{"name": "THIGH", "bits": 13, "attr": ["rw"], "rotate": 0}, {"bits": 3}, {"name": "TLOW", "bits": 13, "attr": ["rw"], "rotate": 0}, {"bits": 3}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:29 | | | | Reserved | +| 28:16 | rw | 0x0 | TLOW | The actual time to hold SCL low between any two SCL pulses. This field is sized to have a range of at least Standard Mode's 4.7 us max with a core clock at 1 GHz. | +| 15:13 | | | | Reserved | +| 12:0 | rw | 0x0 | THIGH | The actual time to hold SCL high in a given pulse. This field is sized to have a range of at least Standard Mode's 4.0 us max with a core clock at 1 GHz. | + +## TIMING1 +Detailed I2C Timings (directly corresponding to table 10 in the I2C Specification). +All values are expressed in units of the input clock period. +- Offset: `0x40` +- Reset default: `0x0` +- Reset mask: `0x1ff03ff` + +### Fields + +```wavejson +{"reg": [{"name": "T_R", "bits": 10, "attr": ["rw"], "rotate": 0}, {"bits": 6}, {"name": "T_F", "bits": 9, "attr": ["rw"], "rotate": 0}, {"bits": 7}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:25 | | | | Reserved | +| 24:16 | rw | 0x0 | T_F | The nominal fall time to anticipate for the bus (influences SDA hold times). This field is sized to have a range of at least Standard Mode's 300 ns max with a core clock at 1 GHz. | +| 15:10 | | | | Reserved | +| 9:0 | rw | 0x0 | T_R | The nominal rise time to anticipate for the bus (depends on capacitance). This field is sized to have a range of at least Standard Mode's 1000 ns max with a core clock at 1 GHz. | + +## TIMING2 +Detailed I2C Timings (directly corresponding to table 10 in the I2C Specification). +All values are expressed in units of the input clock period. +- Offset: `0x44` +- Reset default: `0x0` +- Reset mask: `0x1fff1fff` + +### Fields + +```wavejson +{"reg": [{"name": "TSU_STA", "bits": 13, "attr": ["rw"], "rotate": 0}, {"bits": 3}, {"name": "THD_STA", "bits": 13, "attr": ["rw"], "rotate": 0}, {"bits": 3}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:-----------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:29 | | | | Reserved | +| 28:16 | rw | 0x0 | THD_STA | Actual hold time for start signals. This field is sized to have a range of at least Standard Mode's 4.0 us max with a core clock at 1 GHz. | +| 15:13 | | | | Reserved | +| 12:0 | rw | 0x0 | TSU_STA | Actual setup time for repeated start signals. This field is sized to have a range of at least Standard Mode's 4.7 us max with a core clock at 1 GHz. | + +## TIMING3 +Detailed I2C Timings (directly corresponding to table 10, in the I2C Specification). +All values are expressed in units of the input clock period. +- Offset: `0x48` +- Reset default: `0x0` +- Reset mask: `0x1fff01ff` + +### Fields + +```wavejson +{"reg": [{"name": "TSU_DAT", "bits": 9, "attr": ["rw"], "rotate": 0}, {"bits": 7}, {"name": "THD_DAT", "bits": 13, "attr": ["rw"], "rotate": 0}, {"bits": 3}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------| +| 31:29 | | | Reserved | +| 28:16 | rw | 0x0 | [THD_DAT](#timing3--thd_dat) | +| 15:9 | | | Reserved | +| 8:0 | rw | 0x0 | [TSU_DAT](#timing3--tsu_dat) | + +### TIMING3 . THD_DAT +Actual hold time for data (or ack) bits. +(Note, where required, the parameters TVD_DAT is taken to be THD_DAT+T_F) +This field is sized to have a range that accommodates Standard Mode's 3.45 us max for TVD_DAT with a core clock at 1 GHz. +However, this field is generally expected to represent a time substantially shorter than that. +It should be long enough to cover the maximum round-trip latency from output pins, through pads and voltage transitions on the board, and back to the input pins, but it should not be substantially greater. + +### TIMING3 . TSU_DAT +Actual setup time for data (or ack) bits. +This field is sized to have a range of at least Standard Mode's 250 ns max with a core clock at 1 GHz. + +## TIMING4 +Detailed I2C Timings (directly corresponding to table 10, in the I2C Specification). +All values are expressed in units of the input clock period. +- Offset: `0x4c` +- Reset default: `0x0` +- Reset mask: `0x1fff1fff` + +### Fields + +```wavejson +{"reg": [{"name": "TSU_STO", "bits": 13, "attr": ["rw"], "rotate": 0}, {"bits": 3}, {"name": "T_BUF", "bits": 13, "attr": ["rw"], "rotate": 0}, {"bits": 3}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:29 | | | | Reserved | +| 28:16 | rw | 0x0 | T_BUF | Actual time between each STOP signal and the following START signal. This field is sized to have a range of at least Standard Mode's 4.7 us max with a core clock at 1 GHz. | +| 15:13 | | | | Reserved | +| 12:0 | rw | 0x0 | TSU_STO | Actual setup time for stop signals. This field is sized to have a range of at least Standard Mode's 4.0 us max with a core clock at 1 GHz. | + +## TIMEOUT_CTRL +I2C clock stretching and bus timeout control. + +This timeout must be enabled by setting [`TIMEOUT_CTRL.EN`](#timeout_ctrl) to 1, and the behavior of this feature depends on the value of [`TIMEOUT_CTRL.MODE.`](#timeout_ctrl) + +If the mode is "STRETCH_TIMEOUT", this is used in I2C controller mode to detect whether a connected target is stretching a single low time beyond the timeout value. +Configured as such, this timeout is more informative and doesn't do more than assert the "stretch_timeout" interrupt. + +If the mode is "BUS_TIMEOUT", it is used to detect whether the clock has been held low for too long instead, inclusive of the controller's clock low time. +This is useful for an SMBus context, where the VAL programmed should be tTIMEOUT:MIN. +- Offset: `0x50` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VAL", "bits": 30, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "EN", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:----------------------------| +| 31 | rw | 0x0 | [EN](#timeout_ctrl--en) | +| 30 | rw | 0x0 | [MODE](#timeout_ctrl--mode) | +| 29:0 | rw | 0x0 | [VAL](#timeout_ctrl--val) | + +### TIMEOUT_CTRL . EN +Enable stretch timeout or bus timeout feature + +### TIMEOUT_CTRL . MODE +Selects the timeout mode, between a stretch timeout and a bus timeout. + +Between the two modes, the primary difference is how much of the clock low period is counted. +For a stretch timeout, only the time that another device holds the clock low will be counted. +For a bus timeout, the entire clock low time is counted, consistent with the SMBus tTIMEOUT type. + +[`TIMEOUT_CTRL.EN`](#timeout_ctrl) must be 1 for either of these features to be enabled. + +| Value | Name | Description | +|:--------|:----------------|:-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 0x0 | STRETCH_TIMEOUT | The timeout is a target stretch timeout. The counter will track how long the clock has been stretched by another device while the controller is active. | +| 0x1 | BUS_TIMEOUT | The timeout is a clock low timeout. The counter will track how long the clock low period is, inclusive of the controller's ordinary low count. A timeout will set !!CONTROLLER_EVENTS.BUS_TIMEOUT and cause a "controller_halt" interrupt. | + + +### TIMEOUT_CTRL . VAL +Clock stretching timeout value (in units of input clock frequency) + +## TARGET_ID +I2C target address and mask pairs +- Offset: `0x54` +- Reset default: `0x0` +- Reset mask: `0xfffffff` + +### Fields + +```wavejson +{"reg": [{"name": "ADDRESS0", "bits": 7, "attr": ["rw"], "rotate": 0}, {"name": "MASK0", "bits": 7, "attr": ["rw"], "rotate": 0}, {"name": "ADDRESS1", "bits": 7, "attr": ["rw"], "rotate": 0}, {"name": "MASK1", "bits": 7, "attr": ["rw"], "rotate": 0}, {"bits": 4}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:----------------------------------------------------------------------------------------------| +| 31:28 | | | | Reserved | +| 27:21 | rw | 0x0 | MASK1 | I2C target mask number 1. At least one bit in MASK1 must be set to 1 for ADDRESS1 to be used. | +| 20:14 | rw | 0x0 | ADDRESS1 | I2C target address number 1 | +| 13:7 | rw | 0x0 | MASK0 | I2C target mask number 0. At least one bit in MASK0 must be set to 1 for ADDRESS0 to be used. | +| 6:0 | rw | 0x0 | ADDRESS0 | I2C target address number 0 | + +## ACQDATA +I2C target acquired data +- Offset: `0x58` +- Reset default: `0x0` +- Reset mask: `0x7ff` + +### Fields + +```wavejson +{"reg": [{"name": "ABYTE", "bits": 8, "attr": ["ro"], "rotate": 0}, {"name": "SIGNAL", "bits": 3, "attr": ["ro"], "rotate": -90}, {"bits": 21}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:---------------------------| +| 31:11 | | | Reserved | +| 10:8 | ro | x | [SIGNAL](#acqdata--signal) | +| 7:0 | ro | x | [ABYTE](#acqdata--abyte) | + +### ACQDATA . SIGNAL +Indicates any control symbols associated with the ABYTE. + +For the STOP symbol, a stretch timeout or other unexpected events will cause a NACK_STOP to appear in the ACQ FIFO. +If the ACQ FIFO doesn't have enough space to record a START and a STOP, the transaction will be dropped entirely on a stretch timeout. +In that case, the START byte will not appear (neither as START nor NACK_START), but a standalone NACK_STOP may, if there was space. +Software can discard any standalone NACK_STOP that appears. + +See the associated values for more information about the contents. + +| Value | Name | Description | +|:--------|:-----------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 0x0 | NONE | ABYTE contains an ordinary data byte that was received and ACK'd. | +| 0x1 | START | A START condition preceded the ABYTE to start a new transaction. ABYTE contains the 7-bit I2C address plus R/W command bit in the order received on the bus, MSB first. | +| 0x2 | STOP | A STOP condition was received for a transaction including a transfer that addressed this Target. No transfers addressing this Target in that transaction were NACK'd. ABYTE contains no data. | +| 0x3 | RESTART | A repeated START condition preceded the ABYTE, extending the current transaction with a new transfer. ABYTE contains the 7-bit I2C address plus R/W command bit in the order received on the bus, MSB first. | +| 0x4 | NACK | ABYTE contains an ordinary data byte that was received and NACK'd. | +| 0x5 | NACK_START | A START condition preceded the ABYTE (including repeated START) that was part of a NACK'd transfer. The ABYTE contains the matching I2C address and command bit. The ABYTE was ACK'd, but the rest of the transaction was NACK'ed. | +| 0x6 | NACK_STOP | A transaction including a transfer that addressed this Target was ended, but the transaction ended abnormally and/or the transfer was NACK'd. The end can be due to a STOP condition or unexpected events, such as a bus timeout (if enabled). ABYTE contains no data. NACKing can occur for multiple reasons, including a stretch timeout, a SW-directed NACK, or lost arbitration. This signal is a bucket for all these error-type terminations. | + +Other values are reserved. + +### ACQDATA . ABYTE +Address for accepted transaction or acquired byte + +## TXDATA +I2C target transmit data +- Offset: `0x5c` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "TXDATA", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | TXDATA | | + +## HOST_TIMEOUT_CTRL +I2C host clock generation timeout value (in units of input clock frequency). + +In an active transaction in Target-Mode, if the Controller ceases to send SCL pulses +for this number of cycles then the "host_timeout" interrupt will be asserted. + +In multi-controller monitoring mode, [`HOST_TIMEOUT_CTRL`](#host_timeout_ctrl) is required to be nonzero to transition out of the initial busy state. +Set this CSR to 0 to disable this behaviour. +- Offset: `0x60` +- Reset default: `0x0` +- Reset mask: `0xfffff` + +### Fields + +```wavejson +{"reg": [{"name": "HOST_TIMEOUT_CTRL", "bits": 20, "attr": ["rw"], "rotate": 0}, {"bits": 12}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:20 | | | | Reserved | +| 19:0 | rw | 0x0 | HOST_TIMEOUT_CTRL | | + +## TARGET_TIMEOUT_CTRL +I2C target internal stretching timeout control. +When the target has stretched beyond this time it will send a NACK for incoming data bytes or release SDA for outgoing data bytes. +The behavior for the address byte is configurable via [`CTRL.ACK_ADDR_AFTER_TIMEOUT.`](#ctrl) +Note that the count accumulates stretching time over the course of a transaction. +In other words, this is equivalent to the SMBus cumulative target clock extension time. +- Offset: `0x64` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VAL", "bits": 31, "attr": ["rw"], "rotate": 0}, {"name": "EN", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------| +| 31 | rw | 0x0 | EN | Enable timeout feature and send NACK once the timeout has been reached | +| 30:0 | rw | 0x0 | VAL | Clock stretching timeout value (in units of input clock frequency) | + +## TARGET_NACK_COUNT +Number of times the I2C target has NACK'ed a new transaction since the last read of this register. +Reading this register clears it. +This is useful because when the ACQ FIFO is full the software know that a NACK has occurred, but without this register would not know how many transactions it missed. +When it reaches its maximum value it will stay at that value. +- Offset: `0x68` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "TARGET_NACK_COUNT", "bits": 8, "attr": ["rc"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:8 | | | | Reserved | +| 7:0 | rc | 0x0 | TARGET_NACK_COUNT | | + +## TARGET_ACK_CTRL +Controls for mid-transfer (N)ACK phase handling +- Offset: `0x6c` +- Reset default: `0x0` +- Reset mask: `0x800001ff` + +### Fields + +```wavejson +{"reg": [{"name": "NBYTES", "bits": 9, "attr": ["rw"], "rotate": 0}, {"bits": 22}, {"name": "NACK", "bits": 1, "attr": ["wo"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------------| +| 31 | wo | x | [NACK](#target_ack_ctrl--nack) | +| 30:9 | | | Reserved | +| 8:0 | rw | x | [NBYTES](#target_ack_ctrl--nbytes) | + +### TARGET_ACK_CTRL . NACK +When the Target module stretches on the (N)ACK phase of a Write due to [`TARGET_ACK_CTRL.NBYTES`](#target_ack_ctrl) being 0, writing a 1 here will cause it to send a NACK. + +If software chooses to NACK, note that the NACKing behavior is the same as if a stretch timeout occurred. +The rest of the transaction will be NACK'd, including subsequent transfers. +For the address byte, the (N)ACK phase of subsequent transfers will follow the behavior specified by [`CTRL.NACK_ADDR_AFTER_TIMEOUT.`](#ctrl) + +Automatically clears to 0. + +### TARGET_ACK_CTRL . NBYTES +Remaining number of bytes the Target module may ACK automatically. + +If [`CTRL.ACK_CTRL_EN`](#ctrl) is set to 1, the Target module will stretch the clock at the (N)ACK phase of a byte if this CSR is 0, awaiting software's instructions. + +At the beginning of each Write transfer, this byte count is reset to 0. +Writes to this CSR also are only accepted while the Target module is stretching the clock. +The Target module will always ACK its address if the ACQ FIFO has space. +For data bytes afterwards, it will stop at the (N)ACK phase and stretch the clock when this CSR is 0. +For each data byte that is ACK'd in a transaction, the byte count will decrease by 1. + +Note that a full ACQ FIFO can still cause the Target module to halt at the beginning of a new byte. +The ACK Control Mode provides an additional synchronization point, during the (N)ACK phase instead of after. +For both cases, [`TARGET_TIMEOUT_CTRL`](#target_timeout_ctrl) applies, and stretching past the timeout will produce an automatic NACK. + +This mode can be used to implement the mid-transfer (N)ACK responses required by various SMBus protocols. + +## ACQ_FIFO_NEXT_DATA +The data byte pending to be written to the ACQ FIFO. + +This CSR is only valid while the Target module is stretching in the (N)ACK phase, indicated by [`STATUS.ACK_CTRL_STRETCH`](#status) . +It is intended to be used with ACK Control Mode, so software may check the current byte. +- Offset: `0x70` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "ACQ_FIFO_NEXT_DATA", "bits": 8, "attr": ["ro"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 200}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------|:--------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | x | ACQ_FIFO_NEXT_DATA | | + +## HOST_NACK_HANDLER_TIMEOUT +Timeout in Host-Mode for an unhandled NACK before hardware automatically ends the transaction. +(in units of input clock frequency) + +If an active Controller-Transmitter transfer receives a NACK from the Target, the [`CONTROLLER_EVENTS.NACK`](#controller_events) bit is set. +In turn, this causes the Controller FSM to halt awaiting software intervention, and the 'controller_halt' interrupt may assert. +Software must clear the [`CONTROLLER_EVENTS.NACK`](#controller_events) bit to allow the state machine to continue, typically after clearing out the FMTFIFO to start a new transfer. +While halted, the active transaction is not ended (no STOP (P) condition is created), and the block asserts SCL and leaves SDA released. + +This timeout can be used to automatically produce a STOP condition, whether as a backstop for slow software responses (longer timeout) or as a convenience (short timeout). +If the timeout expires, the Controller FSM will issue a STOP (P) condition on the bus to end the active transaction. +Additionally, the [`CONTROLLER_EVENTS.UNHANDLED_NACK_TIMEOUT`](#controller_events) bit is set to alert software, and the FSM will return to the idle state and halt until the bit is cleared. + +The enable bit must be set for this feature to operate. +- Offset: `0x74` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VAL", "bits": 31, "attr": ["rw"], "rotate": 0}, {"name": "EN", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------| +| 31 | rw | 0x0 | EN | Timeout enable | +| 30:0 | rw | 0x0 | VAL | Unhandled NAK timeout value (in units of input clock frequency) | + +## CONTROLLER_EVENTS +Latched events that explain why the controller halted. + +Any bits that are set must be written (with a 1) to clear the CONTROLLER_HALT interrupt. +- Offset: `0x78` +- Reset default: `0x0` +- Reset mask: `0xf` + +### Fields + +```wavejson +{"reg": [{"name": "NACK", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "UNHANDLED_NACK_TIMEOUT", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "BUS_TIMEOUT", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "ARBITRATION_LOST", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"bits": 28}], "config": {"lanes": 1, "fontsize": 10, "vspace": 240}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------|:--------------------------------------------------------------------------------------------------------------------------| +| 31:4 | | | | Reserved | +| 3 | rw1c | 0x0 | ARBITRATION_LOST | A Host-Mode active transaction has terminated due to lost arbitration. | +| 2 | rw1c | 0x0 | BUS_TIMEOUT | A Host-Mode active transaction has terminated due to a bus timeout activated by [`TIMEOUT_CTRL.`](#timeout_ctrl) | +| 1 | rw1c | 0x0 | UNHANDLED_NACK_TIMEOUT | A Host-Mode active transaction has been ended by the [`HOST_NACK_HANDLER_TIMEOUT`](#host_nack_handler_timeout) mechanism. | +| 0 | rw1c | 0x0 | NACK | Received an unexpected NACK | + +## TARGET_EVENTS +Latched events that can cause the target module to stretch the clock at the beginning of a read transfer. + +These events cause TX FIFO-related stretching even when the TX FIFO has data available. +Any bits that are set must be written (with a 1) to clear the tx_stretch interrupt. + +This CSR serves as a gate to prevent the Target module from responding to a read command with unrelated, leftover data. +- Offset: `0x7c` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "TX_PENDING", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "BUS_TIMEOUT", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "ARBITRATION_LOST", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------------------------------| +| 31:3 | | | Reserved | +| 2 | rw1c | 0x0 | [ARBITRATION_LOST](#target_events--arbitration_lost) | +| 1 | rw1c | 0x0 | [BUS_TIMEOUT](#target_events--bus_timeout) | +| 0 | rw1c | 0x0 | [TX_PENDING](#target_events--tx_pending) | + +### TARGET_EVENTS . ARBITRATION_LOST +A Target-Mode read transfer has terminated due to lost arbitration. + +### TARGET_EVENTS . BUS_TIMEOUT +A Target-Mode read transfer has terminated due to a bus timeout activated by [`TIMEOUT_CTRL.`](#timeout_ctrl) + +### TARGET_EVENTS . TX_PENDING +A new Target-Mode read transfer has arrived that addressed this target. + +This bit is used by software to confirm the release of the contents in the TX FIFO. +If the contents do not apply, software should first reset the TX FIFO, then load it with the correct data, then clear this bit. + +Optionally enabled by [`CTRL.TX_STRETCH_CTRL_EN.`](#ctrl) + + + +## integer_cluster / doc / pulp_cluster_peripherals_memory_map.md + +## PULP Cluster Peripheral Memory Map + +This document describes the memory-mapped peripheral devices accessible from the PULP cluster through the peripheral interconnect slave port. + +## Base Address + +- **Cluster Base Address**: `0x5000_0000` +- **Peripheral Offset**: `0x0020_0000` +- **External Offset**: `0x0040_0000` + +**Cluster Peripheral Base Address**: +`0x5020_0000` – `0x5040_0000` (2 MiB region) + +--- + +## Peripheral Layout + +| Peripheral | ID | Offset (from Peripheral Base) | Address Range | +|----------------------|------|-------------------------------|--------------------------------| +| EOC | 0 | `0x0000` | `0x5020_0000` – `0x5020_03FF` | +| Timer | 1 | `0x0400` | `0x5020_0400` – `0x5020_07FF` | +| Event Unit (also 3) | 2/3 | `0x0800` | `0x5020_0800` – `0x5020_0FFF` | +| HWPE | 4 | `0x1000` | `0x5020_1000` – `0x5020_13FF` | +| ICache Controller | 5 | `0x1400` | `0x5020_1400` – `0x5020_17FF` | +| DMA (Cluster) | 6 | `0x1800` | `0x5020_1800` – `0x5020_1BFF` | +| DMA (Fabric Ctrl) | 7 | `0x1C00` | `0x5020_1C00` – `0x5020_1FFF` | +| HMR Unit | 8 | `0x2000` | `0x5020_2000` – `0x5020_23FF` | +| External | 9 | `0x2400` | `0x5020_2400` – `0x5020_27FF` | +| Error Unit | 10 | `0x2800` | `0x5020_2800` – `0x5020_2BFF` | + +--- + +## Address Mapping Summary + +| Region | Index | Start Address | End Address | Notes | +|------------------|--------|----------------|---------------|--------------------------------| +| TCDM | 0 | `0x5000_0000` | `0x5000_0000 + TCDM_SIZE` | Tightly Coupled Data Memory | +| Peripherals | 1 | `0x5020_0000` | `0x5040_0000` | Cluster Peripheral Region | +| External | 2 | `0x5040_0000` | `0xFFFF_FFFF` | Access beyond cluster | +| Below Cluster | 3 | `0x0000_0000` | `0x5000_0000` | Not cluster-related | + + +## irq_router / doc / registers.md + +## Summary + +| Name | Offset | Length | Description | +|:-------------------------------------------------|:---------|---------:|:------------------------------------------| +| irq_router.[`IRQ_TARGET_MASK`](#irq_target_mask) | 0x0 | 4 | Target selection bitmask control register | + +## IRQ_TARGET_MASK +Target selection bitmask control register +- Offset: `0x0` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "mask", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------| +| 31:0 | rw | 0x1 | mask | Target selection bitmask control register for single interrupt line. Reflects interrupt line logic level. | + + + +## l2_ecc_config / doc / registers.md + +## Summary + +| Name | Offset | Length | Description | +|:----------------------------------------------------------------------|:---------|---------:|:------------------------------------------------| +| ECC_manager.[`mismatch_count`](#mismatch_count) | 0x0 | 4 | Correctable mismatches caught by ecc on access | +| ECC_manager.[`scrub_interval`](#scrub_interval) | 0x4 | 4 | Interval between scrubs | +| ECC_manager.[`scrub_fix_count`](#scrub_fix_count) | 0x8 | 4 | Correctable mismatches caught by ecc on scrub | +| ECC_manager.[`scrub_uncorrectable_count`](#scrub_uncorrectable_count) | 0xc | 4 | Uncorrectable mismatches caught by ecc on scrub | +| ECC_manager.[`write_mask_data_n`](#write_mask_data_n) | 0x10 | 4 | Testing: Inverted write mask for data bits | +| ECC_manager.[`write_mask_ecc_n`](#write_mask_ecc_n) | 0x14 | 4 | Testing: Inverted write mask for ECC bits | + +## mismatch_count +Correctable mismatches caught by ecc on access +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "correctable_mismatches", "bits": 32, "attr": ["rw0c"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------|:-----------------------------------------------| +| 31:0 | rw0c | 0x0 | correctable_mismatches | Correctable mismatches caught by ecc on access | + +## scrub_interval +Interval between scrubs +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "scrub_interval", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:------------------------| +| 31:0 | rw | 0x0 | scrub_interval | Interval between scrubs | + +## scrub_fix_count +Correctable mismatches caught by ecc on scrub +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "correctable_mismatches", "bits": 32, "attr": ["rw0c"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------|:----------------------------------------------| +| 31:0 | rw0c | 0x0 | correctable_mismatches | Correctable mismatches caught by ecc on scrub | + +## scrub_uncorrectable_count +Uncorrectable mismatches caught by ecc on scrub +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "uncorrectable_mismatches", "bits": 32, "attr": ["rw0c"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------------|:------------------------------------------------| +| 31:0 | rw0c | 0x0 | uncorrectable_mismatches | Uncorrectable mismatches caught by ecc on scrub | + +## write_mask_data_n +Testing: Inverted write mask for data bits +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "write_mask_data_n", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:-------------------------------------------| +| 31:0 | rw | 0x0 | write_mask_data_n | Testing: Inverted write mask for data bits | + +## write_mask_ecc_n +Testing: Inverted write mask for ECC bits +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0x7f` + +### Fields + +```wavejson +{"reg": [{"name": "write_mask_ecc_n", "bits": 7, "attr": ["rw"], "rotate": -90}, {"bits": 25}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:------------------------------------------| +| 31:7 | | | | Reserved | +| 6:0 | rw | 0x0 | write_mask_ecc_n | Testing: Inverted write mask for ECC bits | + + + +## mailbox / doc / registers.md + +## Summary + +| Name | Offset | Length | Description | +|:----------------------------------------|:---------|---------:|:--------------------------------------------| +| mailbox.[`IRQ_SND_STAT`](#irq_snd_stat) | 0x0 | 4 | Sender interrupt status register | +| mailbox.[`IRQ_SND_SET`](#irq_snd_set) | 0x4 | 4 | Sender interrupt set register | +| mailbox.[`IRQ_SND_CLR`](#irq_snd_clr) | 0x8 | 4 | Sender interrupt clear register | +| mailbox.[`IRQ_SND_EN`](#irq_snd_en) | 0xc | 4 | Sender interrupt enable register | +| mailbox.[`IRQ_RCV_STAT`](#irq_rcv_stat) | 0x40 | 4 | Receiver interrupt status register | +| mailbox.[`IRQ_RCV_SET`](#irq_rcv_set) | 0x44 | 4 | Receiver interrupt set register | +| mailbox.[`IRQ_RCV_CLR`](#irq_rcv_clr) | 0x48 | 4 | Receiver interrupt clear register | +| mailbox.[`IRQ_RCV_EN`](#irq_rcv_en) | 0x4c | 4 | Receiver interrupt enable register | +| mailbox.[`LETTER0`](#letter0) | 0x80 | 4 | Memory region 0 to put a message or pointer | +| mailbox.[`LETTER1`](#letter1) | 0x84 | 4 | Memory region 1 to put a message or pointer | + +## IRQ_SND_STAT +Sender interrupt status register +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "stat", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "reserved", "bits": 31, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:---------------------------------------------------------------------------------------------| +| 31:1 | ro | x | reserved | reserved | +| 0 | ro | x | stat | Sender side interrupt status. Receiver confirms letter. Reflects interrupt line logic level. | + +## IRQ_SND_SET +Sender interrupt set register +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "set", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "reserved", "bits": 31, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:-----------------------------------------------------| +| 31:1 | ro | x | reserved | reserved | +| 0 | wo | x | set | Sender side interrupt set. Receiver confirms letter. | + +## IRQ_SND_CLR +Sender interrupt clear register +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "clr", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "reserved", "bits": 31, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:-------------------------------------------------------| +| 31:1 | ro | x | reserved | reserved | +| 0 | wo | x | clr | Sender side interrupt clear. Receiver confirms letter. | + +## IRQ_SND_EN +Sender interrupt enable register +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "en", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "reserved", "bits": 31, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------------------------------------------------| +| 31:1 | ro | 0x0 | reserved | reserved | +| 0 | rw | 0x0 | en | Sender side interrupt enable. Receiver confirms letter. | + +## IRQ_RCV_STAT +Receiver interrupt status register +- Offset: `0x40` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "stat", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "reserved", "bits": 31, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:------------------------------------------------------------------------------------------------------------------------| +| 31:1 | ro | x | reserved | reserved | +| 0 | ro | x | stat | Receiver side interrupt status. Sender notifies receiver of a new letter arriving. Reflects interrupt line logic level. | + +## IRQ_RCV_SET +Receiver interrupt set register +- Offset: `0x44` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "set", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "reserved", "bits": 31, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------------------------------------------------------------------------| +| 31:1 | ro | x | reserved | reserved | +| 0 | wo | x | set | Receiver side interrupt set. Sender notifies receiver of a new letter arriving. | + +## IRQ_RCV_CLR +Receiver interrupt clear register +- Offset: `0x48` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "clr", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "reserved", "bits": 31, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:----------------------------------------------------------------------------------| +| 31:1 | ro | x | reserved | reserved | +| 0 | wo | x | clr | Receiver side interrupt clear. Sender notifies receiver of a new letter arriving. | + +## IRQ_RCV_EN +Receiver interrupt enable register +- Offset: `0x4c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "en", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "reserved", "bits": 31, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:-----------------------------------------------------------------------------------| +| 31:1 | ro | 0x0 | reserved | reserved | +| 0 | rw | 0x0 | en | Receiver side interrupt enable. Sender notifies receiver of a new letter arriving. | + +## LETTER0 +Memory region 0 to put a message or pointer +- Offset: `0x80` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "LETTER0", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------| +| 31:0 | rw | 0x0 | LETTER0 | | + +## LETTER1 +Memory region 1 to put a message or pointer +- Offset: `0x84` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "LETTER1", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------| +| 31:0 | rw | 0x0 | LETTER1 | | + + + +## plic / doc / registers.md + +## Summary + +| Name | Offset | Length | Description | +|:------------------------------------|:----------|---------:|:-------------------------------------------------------------------| +| rv_plic.[`PRIO0`](#prio0) | 0x0 | 4 | Interrupt Source 0 Priority | +| rv_plic.[`PRIO1`](#prio1) | 0x4 | 4 | Interrupt Source 1 Priority | +| rv_plic.[`PRIO2`](#prio2) | 0x8 | 4 | Interrupt Source 2 Priority | +| rv_plic.[`PRIO3`](#prio3) | 0xc | 4 | Interrupt Source 3 Priority | +| rv_plic.[`PRIO4`](#prio4) | 0x10 | 4 | Interrupt Source 4 Priority | +| rv_plic.[`PRIO5`](#prio5) | 0x14 | 4 | Interrupt Source 5 Priority | +| rv_plic.[`PRIO6`](#prio6) | 0x18 | 4 | Interrupt Source 6 Priority | +| rv_plic.[`PRIO7`](#prio7) | 0x1c | 4 | Interrupt Source 7 Priority | +| rv_plic.[`PRIO8`](#prio8) | 0x20 | 4 | Interrupt Source 8 Priority | +| rv_plic.[`PRIO9`](#prio9) | 0x24 | 4 | Interrupt Source 9 Priority | +| rv_plic.[`PRIO10`](#prio10) | 0x28 | 4 | Interrupt Source 10 Priority | +| rv_plic.[`PRIO11`](#prio11) | 0x2c | 4 | Interrupt Source 11 Priority | +| rv_plic.[`PRIO12`](#prio12) | 0x30 | 4 | Interrupt Source 12 Priority | +| rv_plic.[`PRIO13`](#prio13) | 0x34 | 4 | Interrupt Source 13 Priority | +| rv_plic.[`PRIO14`](#prio14) | 0x38 | 4 | Interrupt Source 14 Priority | +| rv_plic.[`PRIO15`](#prio15) | 0x3c | 4 | Interrupt Source 15 Priority | +| rv_plic.[`PRIO16`](#prio16) | 0x40 | 4 | Interrupt Source 16 Priority | +| rv_plic.[`PRIO17`](#prio17) | 0x44 | 4 | Interrupt Source 17 Priority | +| rv_plic.[`PRIO18`](#prio18) | 0x48 | 4 | Interrupt Source 18 Priority | +| rv_plic.[`PRIO19`](#prio19) | 0x4c | 4 | Interrupt Source 19 Priority | +| rv_plic.[`PRIO20`](#prio20) | 0x50 | 4 | Interrupt Source 20 Priority | +| rv_plic.[`PRIO21`](#prio21) | 0x54 | 4 | Interrupt Source 21 Priority | +| rv_plic.[`PRIO22`](#prio22) | 0x58 | 4 | Interrupt Source 22 Priority | +| rv_plic.[`PRIO23`](#prio23) | 0x5c | 4 | Interrupt Source 23 Priority | +| rv_plic.[`PRIO24`](#prio24) | 0x60 | 4 | Interrupt Source 24 Priority | +| rv_plic.[`PRIO25`](#prio25) | 0x64 | 4 | Interrupt Source 25 Priority | +| rv_plic.[`PRIO26`](#prio26) | 0x68 | 4 | Interrupt Source 26 Priority | +| rv_plic.[`PRIO27`](#prio27) | 0x6c | 4 | Interrupt Source 27 Priority | +| rv_plic.[`PRIO28`](#prio28) | 0x70 | 4 | Interrupt Source 28 Priority | +| rv_plic.[`PRIO29`](#prio29) | 0x74 | 4 | Interrupt Source 29 Priority | +| rv_plic.[`PRIO30`](#prio30) | 0x78 | 4 | Interrupt Source 30 Priority | +| rv_plic.[`PRIO31`](#prio31) | 0x7c | 4 | Interrupt Source 31 Priority | +| rv_plic.[`IP`](#IP) | 0x1000 | 4 | Interrupt Pending | +| rv_plic.[`IE0`](#IE0) | 0x2000 | 4 | Interrupt Enable for Target 0 | +| rv_plic.[`THRESHOLD0`](#threshold0) | 0x200000 | 4 | Threshold of priority for Target 0 | +| rv_plic.[`CC0`](#cc0) | 0x200004 | 4 | Claim interrupt by read, complete interrupt by write for Target 0. | +| rv_plic.[`MSIP0`](#msip0) | 0x4000000 | 4 | msip for Hart 0. | +| rv_plic.[`ALERT_TEST`](#alert_test) | 0x4004000 | 4 | Alert Test Register. | + +## PRIO0 +Interrupt Source 0 Priority +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO0", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO0 | | + +## PRIO1 +Interrupt Source 1 Priority +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO1", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO1 | | + +## PRIO2 +Interrupt Source 2 Priority +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO2", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO2 | | + +## PRIO3 +Interrupt Source 3 Priority +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO3", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO3 | | + +## PRIO4 +Interrupt Source 4 Priority +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO4", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO4 | | + +## PRIO5 +Interrupt Source 5 Priority +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO5", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO5 | | + +## PRIO6 +Interrupt Source 6 Priority +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO6", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO6 | | + +## PRIO7 +Interrupt Source 7 Priority +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO7", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO7 | | + +## PRIO8 +Interrupt Source 8 Priority +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO8", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO8 | | + +## PRIO9 +Interrupt Source 9 Priority +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO9", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO9 | | + +## PRIO10 +Interrupt Source 10 Priority +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO10", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO10 | | + +## PRIO11 +Interrupt Source 11 Priority +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO11", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO11 | | + +## PRIO12 +Interrupt Source 12 Priority +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO12", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO12 | | + +## PRIO13 +Interrupt Source 13 Priority +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO13", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO13 | | + +## PRIO14 +Interrupt Source 14 Priority +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO14", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO14 | | + +## PRIO15 +Interrupt Source 15 Priority +- Offset: `0x3c` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO15", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO15 | | + +## PRIO16 +Interrupt Source 16 Priority +- Offset: `0x40` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO16", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO16 | | + +## PRIO17 +Interrupt Source 17 Priority +- Offset: `0x44` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO17", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO17 | | + +## PRIO18 +Interrupt Source 18 Priority +- Offset: `0x48` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO18", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO18 | | + +## PRIO19 +Interrupt Source 19 Priority +- Offset: `0x4c` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO19", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO19 | | + +## PRIO20 +Interrupt Source 20 Priority +- Offset: `0x50` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO20", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO20 | | + +## PRIO21 +Interrupt Source 21 Priority +- Offset: `0x54` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO21", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO21 | | + +## PRIO22 +Interrupt Source 22 Priority +- Offset: `0x58` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO22", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO22 | | + +## PRIO23 +Interrupt Source 23 Priority +- Offset: `0x5c` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO23", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO23 | | + +## PRIO24 +Interrupt Source 24 Priority +- Offset: `0x60` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO24", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO24 | | + +## PRIO25 +Interrupt Source 25 Priority +- Offset: `0x64` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO25", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO25 | | + +## PRIO26 +Interrupt Source 26 Priority +- Offset: `0x68` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO26", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO26 | | + +## PRIO27 +Interrupt Source 27 Priority +- Offset: `0x6c` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO27", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO27 | | + +## PRIO28 +Interrupt Source 28 Priority +- Offset: `0x70` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO28", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO28 | | + +## PRIO29 +Interrupt Source 29 Priority +- Offset: `0x74` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO29", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO29 | | + +## PRIO30 +Interrupt Source 30 Priority +- Offset: `0x78` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO30", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO30 | | + +## PRIO31 +Interrupt Source 31 Priority +- Offset: `0x7c` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO31", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO31 | | + +## IP +Interrupt Pending +- Offset: `0x1000` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "P_0", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_1", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_2", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_3", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_4", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_5", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_6", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_7", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_8", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_9", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_10", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_11", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_12", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_13", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_14", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_15", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_16", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_17", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_18", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_19", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_20", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_21", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_22", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_23", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_24", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_25", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_26", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_27", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_28", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_29", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_30", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_31", "bits": 1, "attr": ["ro"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------| +| 31 | ro | 0x0 | P_31 | Interrupt Pending of Source | +| 30 | ro | 0x0 | P_30 | Interrupt Pending of Source | +| 29 | ro | 0x0 | P_29 | Interrupt Pending of Source | +| 28 | ro | 0x0 | P_28 | Interrupt Pending of Source | +| 27 | ro | 0x0 | P_27 | Interrupt Pending of Source | +| 26 | ro | 0x0 | P_26 | Interrupt Pending of Source | +| 25 | ro | 0x0 | P_25 | Interrupt Pending of Source | +| 24 | ro | 0x0 | P_24 | Interrupt Pending of Source | +| 23 | ro | 0x0 | P_23 | Interrupt Pending of Source | +| 22 | ro | 0x0 | P_22 | Interrupt Pending of Source | +| 21 | ro | 0x0 | P_21 | Interrupt Pending of Source | +| 20 | ro | 0x0 | P_20 | Interrupt Pending of Source | +| 19 | ro | 0x0 | P_19 | Interrupt Pending of Source | +| 18 | ro | 0x0 | P_18 | Interrupt Pending of Source | +| 17 | ro | 0x0 | P_17 | Interrupt Pending of Source | +| 16 | ro | 0x0 | P_16 | Interrupt Pending of Source | +| 15 | ro | 0x0 | P_15 | Interrupt Pending of Source | +| 14 | ro | 0x0 | P_14 | Interrupt Pending of Source | +| 13 | ro | 0x0 | P_13 | Interrupt Pending of Source | +| 12 | ro | 0x0 | P_12 | Interrupt Pending of Source | +| 11 | ro | 0x0 | P_11 | Interrupt Pending of Source | +| 10 | ro | 0x0 | P_10 | Interrupt Pending of Source | +| 9 | ro | 0x0 | P_9 | Interrupt Pending of Source | +| 8 | ro | 0x0 | P_8 | Interrupt Pending of Source | +| 7 | ro | 0x0 | P_7 | Interrupt Pending of Source | +| 6 | ro | 0x0 | P_6 | Interrupt Pending of Source | +| 5 | ro | 0x0 | P_5 | Interrupt Pending of Source | +| 4 | ro | 0x0 | P_4 | Interrupt Pending of Source | +| 3 | ro | 0x0 | P_3 | Interrupt Pending of Source | +| 2 | ro | 0x0 | P_2 | Interrupt Pending of Source | +| 1 | ro | 0x0 | P_1 | Interrupt Pending of Source | +| 0 | ro | 0x0 | P_0 | Interrupt Pending of Source | + +## IE0 +Interrupt Enable for Target 0 +- Offset: `0x2000` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "E_0", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_1", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_2", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_3", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_4", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_5", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_6", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_7", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_8", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_9", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_10", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_11", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_12", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_13", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_14", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_15", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_16", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_17", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_18", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_19", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_20", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_21", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_22", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_23", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_24", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_25", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_26", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_27", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_28", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_29", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_30", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_31", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------| +| 31 | rw | 0x0 | E_31 | Interrupt Enable of Source | +| 30 | rw | 0x0 | E_30 | Interrupt Enable of Source | +| 29 | rw | 0x0 | E_29 | Interrupt Enable of Source | +| 28 | rw | 0x0 | E_28 | Interrupt Enable of Source | +| 27 | rw | 0x0 | E_27 | Interrupt Enable of Source | +| 26 | rw | 0x0 | E_26 | Interrupt Enable of Source | +| 25 | rw | 0x0 | E_25 | Interrupt Enable of Source | +| 24 | rw | 0x0 | E_24 | Interrupt Enable of Source | +| 23 | rw | 0x0 | E_23 | Interrupt Enable of Source | +| 22 | rw | 0x0 | E_22 | Interrupt Enable of Source | +| 21 | rw | 0x0 | E_21 | Interrupt Enable of Source | +| 20 | rw | 0x0 | E_20 | Interrupt Enable of Source | +| 19 | rw | 0x0 | E_19 | Interrupt Enable of Source | +| 18 | rw | 0x0 | E_18 | Interrupt Enable of Source | +| 17 | rw | 0x0 | E_17 | Interrupt Enable of Source | +| 16 | rw | 0x0 | E_16 | Interrupt Enable of Source | +| 15 | rw | 0x0 | E_15 | Interrupt Enable of Source | +| 14 | rw | 0x0 | E_14 | Interrupt Enable of Source | +| 13 | rw | 0x0 | E_13 | Interrupt Enable of Source | +| 12 | rw | 0x0 | E_12 | Interrupt Enable of Source | +| 11 | rw | 0x0 | E_11 | Interrupt Enable of Source | +| 10 | rw | 0x0 | E_10 | Interrupt Enable of Source | +| 9 | rw | 0x0 | E_9 | Interrupt Enable of Source | +| 8 | rw | 0x0 | E_8 | Interrupt Enable of Source | +| 7 | rw | 0x0 | E_7 | Interrupt Enable of Source | +| 6 | rw | 0x0 | E_6 | Interrupt Enable of Source | +| 5 | rw | 0x0 | E_5 | Interrupt Enable of Source | +| 4 | rw | 0x0 | E_4 | Interrupt Enable of Source | +| 3 | rw | 0x0 | E_3 | Interrupt Enable of Source | +| 2 | rw | 0x0 | E_2 | Interrupt Enable of Source | +| 1 | rw | 0x0 | E_1 | Interrupt Enable of Source | +| 0 | rw | 0x0 | E_0 | Interrupt Enable of Source | + +## THRESHOLD0 +Threshold of priority for Target 0 +- Offset: `0x200000` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "THRESHOLD0", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | THRESHOLD0 | | + +## CC0 +Claim interrupt by read, complete interrupt by write for Target 0. +Value read/written is interrupt ID. Reading a value of 0 means no pending interrupts. +- Offset: `0x200004` +- Reset default: `0x0` +- Reset mask: `0x1f` + +### Fields + +```wavejson +{"reg": [{"name": "CC0", "bits": 5, "attr": ["rw"], "rotate": 0}, {"bits": 27}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:5 | | | | Reserved | +| 4:0 | rw | x | CC0 | | + +## MSIP0 +msip for Hart 0. +Write 1 to here asserts software interrupt for Hart msip_o[0], write 0 to clear. +- Offset: `0x4000000` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "MSIP0", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | MSIP0 | Software Interrupt Pending register | + +## ALERT_TEST +Alert Test Register. +- Offset: `0x4004000` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "fatal_fault", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:---------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | x | fatal_fault | 'Write 1 to trigger one alert event of this kind.' | + + + +## safety_island / doc / registers.md + +## Summary + +| Name | Offset | Length | Description | +|:--------------------------------------------|:---------|---------:|:---------------------------------------| +| safety_soc_ctrl.[`bootaddr`](#bootaddr) | 0x0 | 4 | Core Boot Address | +| safety_soc_ctrl.[`fetchen`](#fetchen) | 0x4 | 4 | Core Fetch Enable | +| safety_soc_ctrl.[`corestatus`](#corestatus) | 0x8 | 4 | Core Return Status (return value, EOC) | +| safety_soc_ctrl.[`bootmode`](#bootmode) | 0xc | 4 | Core Boot Mode | + +## bootaddr +Core Boot Address +- Offset: `0x0` +- Reset default: `0x1a000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "bootaddr", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:---------|:--------------| +| 31:0 | rw | 0x1a000000 | bootaddr | Boot Address | + +## fetchen +Core Fetch Enable +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "fetchen", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | fetchen | Fetch Enable | + +## corestatus +Core Return Status (return value, EOC) +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "core_status", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:--------------------------------------------------------| +| 31:0 | rw | 0x0 | core_status | Core Return Status (EOC(bit[31]) and status(bit[30:0])) | + +## bootmode +Core Boot Mode +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "bootmode", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 100}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x0 | bootmode | Boot Mode | + + + +## serial_link / doc / registers.md + +## Summary + +| Name | Offset | Length | Description | +|:--------------------------------------------------------------------------|:---------|---------:|:------------------------------------------------------------------------------| +| serial_link.[`CTRL`](#ctrl) | 0x0 | 4 | Global clock, isolation and reset control configuration | +| serial_link.[`ISOLATED`](#isolated) | 0x4 | 4 | Isolation status of AXI ports | +| serial_link.[`TX_PHY_CLK_DIV_0`](#tx_phy_clk_div) | 0x8 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_1`](#tx_phy_clk_div) | 0xc | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_2`](#tx_phy_clk_div) | 0x10 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_3`](#tx_phy_clk_div) | 0x14 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_4`](#tx_phy_clk_div) | 0x18 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_5`](#tx_phy_clk_div) | 0x1c | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_6`](#tx_phy_clk_div) | 0x20 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_7`](#tx_phy_clk_div) | 0x24 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_8`](#tx_phy_clk_div) | 0x28 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_9`](#tx_phy_clk_div) | 0x2c | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_10`](#tx_phy_clk_div) | 0x30 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_11`](#tx_phy_clk_div) | 0x34 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_12`](#tx_phy_clk_div) | 0x38 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_13`](#tx_phy_clk_div) | 0x3c | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_14`](#tx_phy_clk_div) | 0x40 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_15`](#tx_phy_clk_div) | 0x44 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_16`](#tx_phy_clk_div) | 0x48 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_17`](#tx_phy_clk_div) | 0x4c | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_18`](#tx_phy_clk_div) | 0x50 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_19`](#tx_phy_clk_div) | 0x54 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_20`](#tx_phy_clk_div) | 0x58 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_21`](#tx_phy_clk_div) | 0x5c | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_22`](#tx_phy_clk_div) | 0x60 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_23`](#tx_phy_clk_div) | 0x64 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_24`](#tx_phy_clk_div) | 0x68 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_25`](#tx_phy_clk_div) | 0x6c | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_26`](#tx_phy_clk_div) | 0x70 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_27`](#tx_phy_clk_div) | 0x74 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_28`](#tx_phy_clk_div) | 0x78 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_29`](#tx_phy_clk_div) | 0x7c | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_30`](#tx_phy_clk_div) | 0x80 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_31`](#tx_phy_clk_div) | 0x84 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_32`](#tx_phy_clk_div) | 0x88 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_33`](#tx_phy_clk_div) | 0x8c | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_34`](#tx_phy_clk_div) | 0x90 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_35`](#tx_phy_clk_div) | 0x94 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_36`](#tx_phy_clk_div) | 0x98 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_37`](#tx_phy_clk_div) | 0x9c | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_START_0`](#tx_phy_clk_start) | 0xa0 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_1`](#tx_phy_clk_start) | 0xa4 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_2`](#tx_phy_clk_start) | 0xa8 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_3`](#tx_phy_clk_start) | 0xac | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_4`](#tx_phy_clk_start) | 0xb0 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_5`](#tx_phy_clk_start) | 0xb4 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_6`](#tx_phy_clk_start) | 0xb8 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_7`](#tx_phy_clk_start) | 0xbc | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_8`](#tx_phy_clk_start) | 0xc0 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_9`](#tx_phy_clk_start) | 0xc4 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_10`](#tx_phy_clk_start) | 0xc8 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_11`](#tx_phy_clk_start) | 0xcc | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_12`](#tx_phy_clk_start) | 0xd0 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_13`](#tx_phy_clk_start) | 0xd4 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_14`](#tx_phy_clk_start) | 0xd8 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_15`](#tx_phy_clk_start) | 0xdc | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_16`](#tx_phy_clk_start) | 0xe0 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_17`](#tx_phy_clk_start) | 0xe4 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_18`](#tx_phy_clk_start) | 0xe8 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_19`](#tx_phy_clk_start) | 0xec | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_20`](#tx_phy_clk_start) | 0xf0 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_21`](#tx_phy_clk_start) | 0xf4 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_22`](#tx_phy_clk_start) | 0xf8 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_23`](#tx_phy_clk_start) | 0xfc | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_24`](#tx_phy_clk_start) | 0x100 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_25`](#tx_phy_clk_start) | 0x104 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_26`](#tx_phy_clk_start) | 0x108 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_27`](#tx_phy_clk_start) | 0x10c | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_28`](#tx_phy_clk_start) | 0x110 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_29`](#tx_phy_clk_start) | 0x114 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_30`](#tx_phy_clk_start) | 0x118 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_31`](#tx_phy_clk_start) | 0x11c | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_32`](#tx_phy_clk_start) | 0x120 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_33`](#tx_phy_clk_start) | 0x124 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_34`](#tx_phy_clk_start) | 0x128 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_35`](#tx_phy_clk_start) | 0x12c | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_36`](#tx_phy_clk_start) | 0x130 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_37`](#tx_phy_clk_start) | 0x134 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_0`](#tx_phy_clk_end) | 0x138 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_1`](#tx_phy_clk_end) | 0x13c | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_2`](#tx_phy_clk_end) | 0x140 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_3`](#tx_phy_clk_end) | 0x144 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_4`](#tx_phy_clk_end) | 0x148 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_5`](#tx_phy_clk_end) | 0x14c | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_6`](#tx_phy_clk_end) | 0x150 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_7`](#tx_phy_clk_end) | 0x154 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_8`](#tx_phy_clk_end) | 0x158 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_9`](#tx_phy_clk_end) | 0x15c | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_10`](#tx_phy_clk_end) | 0x160 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_11`](#tx_phy_clk_end) | 0x164 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_12`](#tx_phy_clk_end) | 0x168 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_13`](#tx_phy_clk_end) | 0x16c | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_14`](#tx_phy_clk_end) | 0x170 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_15`](#tx_phy_clk_end) | 0x174 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_16`](#tx_phy_clk_end) | 0x178 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_17`](#tx_phy_clk_end) | 0x17c | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_18`](#tx_phy_clk_end) | 0x180 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_19`](#tx_phy_clk_end) | 0x184 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_20`](#tx_phy_clk_end) | 0x188 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_21`](#tx_phy_clk_end) | 0x18c | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_22`](#tx_phy_clk_end) | 0x190 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_23`](#tx_phy_clk_end) | 0x194 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_24`](#tx_phy_clk_end) | 0x198 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_25`](#tx_phy_clk_end) | 0x19c | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_26`](#tx_phy_clk_end) | 0x1a0 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_27`](#tx_phy_clk_end) | 0x1a4 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_28`](#tx_phy_clk_end) | 0x1a8 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_29`](#tx_phy_clk_end) | 0x1ac | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_30`](#tx_phy_clk_end) | 0x1b0 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_31`](#tx_phy_clk_end) | 0x1b4 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_32`](#tx_phy_clk_end) | 0x1b8 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_33`](#tx_phy_clk_end) | 0x1bc | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_34`](#tx_phy_clk_end) | 0x1c0 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_35`](#tx_phy_clk_end) | 0x1c4 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_36`](#tx_phy_clk_end) | 0x1c8 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_37`](#tx_phy_clk_end) | 0x1cc | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`RAW_MODE_EN`](#raw_mode_en) | 0x1d0 | 4 | Enables Raw mode | +| serial_link.[`RAW_MODE_IN_CH_SEL`](#raw_mode_in_ch_sel) | 0x1d4 | 4 | Receive channel select in RAW mode | +| serial_link.[`RAW_MODE_IN_DATA_VALID_0`](#RAW_MODE_IN_DATA_VALID_0) | 0x1d8 | 4 | Mask for valid data in RX FIFOs during RAW mode. | +| serial_link.[`RAW_MODE_IN_DATA_VALID_1`](#RAW_MODE_IN_DATA_VALID_1) | 0x1dc | 4 | Mask for valid data in RX FIFOs during RAW mode. | +| serial_link.[`RAW_MODE_IN_DATA`](#raw_mode_in_data) | 0x1e0 | 4 | Data received by the selected channel in RAW mode | +| serial_link.[`RAW_MODE_OUT_CH_MASK_0`](#RAW_MODE_OUT_CH_MASK_0) | 0x1e4 | 4 | Selects channels to send out data in RAW mode, '1 corresponds to broadcasting | +| serial_link.[`RAW_MODE_OUT_CH_MASK_1`](#RAW_MODE_OUT_CH_MASK_1) | 0x1e8 | 4 | Selects channels to send out data in RAW mode, '1 corresponds to broadcasting | +| serial_link.[`RAW_MODE_OUT_DATA_FIFO`](#raw_mode_out_data_fifo) | 0x1ec | 4 | Data that will be pushed to the RAW mode output FIFO | +| serial_link.[`RAW_MODE_OUT_DATA_FIFO_CTRL`](#raw_mode_out_data_fifo_ctrl) | 0x1f0 | 4 | Status and control register for the RAW mode data out FIFO | +| serial_link.[`RAW_MODE_OUT_EN`](#raw_mode_out_en) | 0x1f4 | 4 | Enable transmission of data currently hold in the output FIFO | +| serial_link.[`FLOW_CONTROL_FIFO_CLEAR`](#flow_control_fifo_clear) | 0x1f8 | 4 | Clears the flow control Fifo | +| serial_link.[`CHANNEL_ALLOC_TX_CFG`](#channel_alloc_tx_cfg) | 0x1fc | 4 | Configuration settings for the TX side in the channel allocator | +| serial_link.[`CHANNEL_ALLOC_TX_CH_EN_0`](#CHANNEL_ALLOC_TX_CH_EN_0) | 0x200 | 4 | Channel enable mask for the TX side. | +| serial_link.[`CHANNEL_ALLOC_TX_CH_EN_1`](#CHANNEL_ALLOC_TX_CH_EN_1) | 0x204 | 4 | Channel enable mask for the TX side. | +| serial_link.[`CHANNEL_ALLOC_TX_CTRL`](#channel_alloc_tx_ctrl) | 0x208 | 4 | Soft clear or force flush the TX side of the channel allocator | +| serial_link.[`CHANNEL_ALLOC_RX_CFG`](#channel_alloc_rx_cfg) | 0x20c | 4 | Configuration settings for the RX side in the channel allocator | +| serial_link.[`CHANNEL_ALLOC_RX_CTRL`](#channel_alloc_rx_ctrl) | 0x210 | 4 | Soft clear the RX side of the channel allocator | +| serial_link.[`CHANNEL_ALLOC_RX_CH_EN_0`](#CHANNEL_ALLOC_RX_CH_EN_0) | 0x214 | 4 | Channel enable mask for the RX side. | +| serial_link.[`CHANNEL_ALLOC_RX_CH_EN_1`](#CHANNEL_ALLOC_RX_CH_EN_1) | 0x218 | 4 | Channel enable mask for the RX side. | + +## CTRL +Global clock, isolation and reset control configuration +- Offset: `0x0` +- Reset default: `0x302` +- Reset mask: `0x303` + +### Fields + +```wavejson +{"reg": [{"name": "clk_ena", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "reset_n", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 6}, {"name": "axi_in_isolate", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "axi_out_isolate", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 22}], "config": {"lanes": 1, "fontsize": 10, "vspace": 170}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------|:-------------------------------------------------------------------| +| 31:10 | | | | Reserved | +| 9 | rw | 0x1 | axi_out_isolate | Isolate AXI master out port. (active-high) | +| 8 | rw | 0x1 | axi_in_isolate | Isolate AXI slave in port. (active-high) | +| 7:2 | | | | Reserved | +| 1 | rw | 0x1 | reset_n | SW controlled synchronous reset. (active-low) | +| 0 | rw | 0x0 | clk_ena | Clock gate enable for network, link, physical layer. (active-high) | + +## ISOLATED +Isolation status of AXI ports +- Offset: `0x4` +- Reset default: `0x3` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "axi_in", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "axi_out", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:----------------------------| +| 31:2 | | | | Reserved | +| 1 | ro | 0x1 | axi_out | master out isolation status | +| 0 | ro | 0x1 | axi_in | slave in isolation status | + +## TX_PHY_CLK_DIV +Holds clock divider factor for forwarded clock of the TX Phys +- Reset default: `0x8` +- Reset mask: `0x7ff` + +### Instances + +| Name | Offset | +|:------------------|:---------| +| TX_PHY_CLK_DIV_0 | 0x8 | +| TX_PHY_CLK_DIV_1 | 0xc | +| TX_PHY_CLK_DIV_2 | 0x10 | +| TX_PHY_CLK_DIV_3 | 0x14 | +| TX_PHY_CLK_DIV_4 | 0x18 | +| TX_PHY_CLK_DIV_5 | 0x1c | +| TX_PHY_CLK_DIV_6 | 0x20 | +| TX_PHY_CLK_DIV_7 | 0x24 | +| TX_PHY_CLK_DIV_8 | 0x28 | +| TX_PHY_CLK_DIV_9 | 0x2c | +| TX_PHY_CLK_DIV_10 | 0x30 | +| TX_PHY_CLK_DIV_11 | 0x34 | +| TX_PHY_CLK_DIV_12 | 0x38 | +| TX_PHY_CLK_DIV_13 | 0x3c | +| TX_PHY_CLK_DIV_14 | 0x40 | +| TX_PHY_CLK_DIV_15 | 0x44 | +| TX_PHY_CLK_DIV_16 | 0x48 | +| TX_PHY_CLK_DIV_17 | 0x4c | +| TX_PHY_CLK_DIV_18 | 0x50 | +| TX_PHY_CLK_DIV_19 | 0x54 | +| TX_PHY_CLK_DIV_20 | 0x58 | +| TX_PHY_CLK_DIV_21 | 0x5c | +| TX_PHY_CLK_DIV_22 | 0x60 | +| TX_PHY_CLK_DIV_23 | 0x64 | +| TX_PHY_CLK_DIV_24 | 0x68 | +| TX_PHY_CLK_DIV_25 | 0x6c | +| TX_PHY_CLK_DIV_26 | 0x70 | +| TX_PHY_CLK_DIV_27 | 0x74 | +| TX_PHY_CLK_DIV_28 | 0x78 | +| TX_PHY_CLK_DIV_29 | 0x7c | +| TX_PHY_CLK_DIV_30 | 0x80 | +| TX_PHY_CLK_DIV_31 | 0x84 | +| TX_PHY_CLK_DIV_32 | 0x88 | +| TX_PHY_CLK_DIV_33 | 0x8c | +| TX_PHY_CLK_DIV_34 | 0x90 | +| TX_PHY_CLK_DIV_35 | 0x94 | +| TX_PHY_CLK_DIV_36 | 0x98 | +| TX_PHY_CLK_DIV_37 | 0x9c | + + +### Fields + +```wavejson +{"reg": [{"name": "clk_divs", "bits": 11, "attr": ["rw"], "rotate": 0}, {"bits": 21}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:----------------------------------| +| 31:11 | | | | Reserved | +| 10:0 | rw | 0x8 | clk_divs | Clock division factor of TX clock | + +## TX_PHY_CLK_START +Controls duty cycle and phase of rising edge in TX Phys +- Reset default: `0x2` +- Reset mask: `0x7ff` + +### Instances + +| Name | Offset | +|:--------------------|:---------| +| TX_PHY_CLK_START_0 | 0xa0 | +| TX_PHY_CLK_START_1 | 0xa4 | +| TX_PHY_CLK_START_2 | 0xa8 | +| TX_PHY_CLK_START_3 | 0xac | +| TX_PHY_CLK_START_4 | 0xb0 | +| TX_PHY_CLK_START_5 | 0xb4 | +| TX_PHY_CLK_START_6 | 0xb8 | +| TX_PHY_CLK_START_7 | 0xbc | +| TX_PHY_CLK_START_8 | 0xc0 | +| TX_PHY_CLK_START_9 | 0xc4 | +| TX_PHY_CLK_START_10 | 0xc8 | +| TX_PHY_CLK_START_11 | 0xcc | +| TX_PHY_CLK_START_12 | 0xd0 | +| TX_PHY_CLK_START_13 | 0xd4 | +| TX_PHY_CLK_START_14 | 0xd8 | +| TX_PHY_CLK_START_15 | 0xdc | +| TX_PHY_CLK_START_16 | 0xe0 | +| TX_PHY_CLK_START_17 | 0xe4 | +| TX_PHY_CLK_START_18 | 0xe8 | +| TX_PHY_CLK_START_19 | 0xec | +| TX_PHY_CLK_START_20 | 0xf0 | +| TX_PHY_CLK_START_21 | 0xf4 | +| TX_PHY_CLK_START_22 | 0xf8 | +| TX_PHY_CLK_START_23 | 0xfc | +| TX_PHY_CLK_START_24 | 0x100 | +| TX_PHY_CLK_START_25 | 0x104 | +| TX_PHY_CLK_START_26 | 0x108 | +| TX_PHY_CLK_START_27 | 0x10c | +| TX_PHY_CLK_START_28 | 0x110 | +| TX_PHY_CLK_START_29 | 0x114 | +| TX_PHY_CLK_START_30 | 0x118 | +| TX_PHY_CLK_START_31 | 0x11c | +| TX_PHY_CLK_START_32 | 0x120 | +| TX_PHY_CLK_START_33 | 0x124 | +| TX_PHY_CLK_START_34 | 0x128 | +| TX_PHY_CLK_START_35 | 0x12c | +| TX_PHY_CLK_START_36 | 0x130 | +| TX_PHY_CLK_START_37 | 0x134 | + + +### Fields + +```wavejson +{"reg": [{"name": "clk_shift_start", "bits": 11, "attr": ["rw"], "rotate": 0}, {"bits": 21}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------|:----------------------------------------| +| 31:11 | | | | Reserved | +| 10:0 | rw | 0x2 | clk_shift_start | Positive Edge of divided, shifted clock | + +## TX_PHY_CLK_END +Controls duty cycle and phase of falling edge in TX Phys +- Reset default: `0x6` +- Reset mask: `0x7ff` + +### Instances + +| Name | Offset | +|:------------------|:---------| +| TX_PHY_CLK_END_0 | 0x138 | +| TX_PHY_CLK_END_1 | 0x13c | +| TX_PHY_CLK_END_2 | 0x140 | +| TX_PHY_CLK_END_3 | 0x144 | +| TX_PHY_CLK_END_4 | 0x148 | +| TX_PHY_CLK_END_5 | 0x14c | +| TX_PHY_CLK_END_6 | 0x150 | +| TX_PHY_CLK_END_7 | 0x154 | +| TX_PHY_CLK_END_8 | 0x158 | +| TX_PHY_CLK_END_9 | 0x15c | +| TX_PHY_CLK_END_10 | 0x160 | +| TX_PHY_CLK_END_11 | 0x164 | +| TX_PHY_CLK_END_12 | 0x168 | +| TX_PHY_CLK_END_13 | 0x16c | +| TX_PHY_CLK_END_14 | 0x170 | +| TX_PHY_CLK_END_15 | 0x174 | +| TX_PHY_CLK_END_16 | 0x178 | +| TX_PHY_CLK_END_17 | 0x17c | +| TX_PHY_CLK_END_18 | 0x180 | +| TX_PHY_CLK_END_19 | 0x184 | +| TX_PHY_CLK_END_20 | 0x188 | +| TX_PHY_CLK_END_21 | 0x18c | +| TX_PHY_CLK_END_22 | 0x190 | +| TX_PHY_CLK_END_23 | 0x194 | +| TX_PHY_CLK_END_24 | 0x198 | +| TX_PHY_CLK_END_25 | 0x19c | +| TX_PHY_CLK_END_26 | 0x1a0 | +| TX_PHY_CLK_END_27 | 0x1a4 | +| TX_PHY_CLK_END_28 | 0x1a8 | +| TX_PHY_CLK_END_29 | 0x1ac | +| TX_PHY_CLK_END_30 | 0x1b0 | +| TX_PHY_CLK_END_31 | 0x1b4 | +| TX_PHY_CLK_END_32 | 0x1b8 | +| TX_PHY_CLK_END_33 | 0x1bc | +| TX_PHY_CLK_END_34 | 0x1c0 | +| TX_PHY_CLK_END_35 | 0x1c4 | +| TX_PHY_CLK_END_36 | 0x1c8 | +| TX_PHY_CLK_END_37 | 0x1cc | + + +### Fields + +```wavejson +{"reg": [{"name": "clk_shift_end", "bits": 11, "attr": ["rw"], "rotate": 0}, {"bits": 21}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:----------------------------------------| +| 31:11 | | | | Reserved | +| 10:0 | rw | 0x6 | clk_shift_end | Negative Edge of divided, shifted clock | + +## RAW_MODE_EN +Enables Raw mode +- Offset: `0x1d0` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "RAW_MODE_EN", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | RAW_MODE_EN | | + +## RAW_MODE_IN_CH_SEL +Receive channel select in RAW mode +- Offset: `0x1d4` +- Reset default: `0x0` +- Reset mask: `0x3f` + +### Fields + +```wavejson +{"reg": [{"name": "RAW_MODE_IN_CH_SEL", "bits": 6, "attr": ["wo"], "rotate": -90}, {"bits": 26}], "config": {"lanes": 1, "fontsize": 10, "vspace": 200}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------|:--------------| +| 31:6 | | | | Reserved | +| 5:0 | wo | 0x0 | RAW_MODE_IN_CH_SEL | | + +## RAW_MODE_IN_DATA_VALID_0 +Mask for valid data in RX FIFOs during RAW mode. +- Offset: `0x1d8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "RAW_MODE_IN_DATA_VALID_0", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_1", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_2", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_3", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_4", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_5", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_6", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_7", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_8", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_9", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_10", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_11", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_12", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_13", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_14", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_15", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_16", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_17", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_18", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_19", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_20", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_21", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_22", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_23", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_24", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_25", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_26", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_27", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_28", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_29", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_30", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_31", "bits": 1, "attr": ["ro"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 270}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------------|:--------------| +| 31 | ro | x | RAW_MODE_IN_DATA_VALID_31 | | +| 30 | ro | x | RAW_MODE_IN_DATA_VALID_30 | | +| 29 | ro | x | RAW_MODE_IN_DATA_VALID_29 | | +| 28 | ro | x | RAW_MODE_IN_DATA_VALID_28 | | +| 27 | ro | x | RAW_MODE_IN_DATA_VALID_27 | | +| 26 | ro | x | RAW_MODE_IN_DATA_VALID_26 | | +| 25 | ro | x | RAW_MODE_IN_DATA_VALID_25 | | +| 24 | ro | x | RAW_MODE_IN_DATA_VALID_24 | | +| 23 | ro | x | RAW_MODE_IN_DATA_VALID_23 | | +| 22 | ro | x | RAW_MODE_IN_DATA_VALID_22 | | +| 21 | ro | x | RAW_MODE_IN_DATA_VALID_21 | | +| 20 | ro | x | RAW_MODE_IN_DATA_VALID_20 | | +| 19 | ro | x | RAW_MODE_IN_DATA_VALID_19 | | +| 18 | ro | x | RAW_MODE_IN_DATA_VALID_18 | | +| 17 | ro | x | RAW_MODE_IN_DATA_VALID_17 | | +| 16 | ro | x | RAW_MODE_IN_DATA_VALID_16 | | +| 15 | ro | x | RAW_MODE_IN_DATA_VALID_15 | | +| 14 | ro | x | RAW_MODE_IN_DATA_VALID_14 | | +| 13 | ro | x | RAW_MODE_IN_DATA_VALID_13 | | +| 12 | ro | x | RAW_MODE_IN_DATA_VALID_12 | | +| 11 | ro | x | RAW_MODE_IN_DATA_VALID_11 | | +| 10 | ro | x | RAW_MODE_IN_DATA_VALID_10 | | +| 9 | ro | x | RAW_MODE_IN_DATA_VALID_9 | | +| 8 | ro | x | RAW_MODE_IN_DATA_VALID_8 | | +| 7 | ro | x | RAW_MODE_IN_DATA_VALID_7 | | +| 6 | ro | x | RAW_MODE_IN_DATA_VALID_6 | | +| 5 | ro | x | RAW_MODE_IN_DATA_VALID_5 | | +| 4 | ro | x | RAW_MODE_IN_DATA_VALID_4 | | +| 3 | ro | x | RAW_MODE_IN_DATA_VALID_3 | | +| 2 | ro | x | RAW_MODE_IN_DATA_VALID_2 | | +| 1 | ro | x | RAW_MODE_IN_DATA_VALID_1 | | +| 0 | ro | x | RAW_MODE_IN_DATA_VALID_0 | | + +## RAW_MODE_IN_DATA_VALID_1 +Mask for valid data in RX FIFOs during RAW mode. +- Offset: `0x1dc` +- Reset default: `0x0` +- Reset mask: `0x3f` + +### Fields + +```wavejson +{"reg": [{"name": "RAW_MODE_IN_DATA_VALID_32", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_33", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_34", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_35", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_36", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_37", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 26}], "config": {"lanes": 1, "fontsize": 10, "vspace": 270}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------------|:----------------------------| +| 31:6 | | | | Reserved | +| 5 | ro | x | RAW_MODE_IN_DATA_VALID_37 | For RAW_MODE_IN_DATA_VALID1 | +| 4 | ro | x | RAW_MODE_IN_DATA_VALID_36 | For RAW_MODE_IN_DATA_VALID1 | +| 3 | ro | x | RAW_MODE_IN_DATA_VALID_35 | For RAW_MODE_IN_DATA_VALID1 | +| 2 | ro | x | RAW_MODE_IN_DATA_VALID_34 | For RAW_MODE_IN_DATA_VALID1 | +| 1 | ro | x | RAW_MODE_IN_DATA_VALID_33 | For RAW_MODE_IN_DATA_VALID1 | +| 0 | ro | x | RAW_MODE_IN_DATA_VALID_32 | For RAW_MODE_IN_DATA_VALID1 | + +## RAW_MODE_IN_DATA +Data received by the selected channel in RAW mode +- Offset: `0x1e0` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "RAW_MODE_IN_DATA", "bits": 16, "attr": ["ro"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:16 | | | | Reserved | +| 15:0 | ro | x | RAW_MODE_IN_DATA | | + +## RAW_MODE_OUT_CH_MASK_0 +Selects channels to send out data in RAW mode, '1 corresponds to broadcasting +- Offset: `0x1e4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "RAW_MODE_OUT_CH_MASK_0", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_1", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_2", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_3", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_4", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_5", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_6", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_7", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_8", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_9", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_10", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_11", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_12", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_13", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_14", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_15", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_16", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_17", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_18", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_19", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_20", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_21", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_22", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_23", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_24", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_25", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_26", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_27", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_28", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_29", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_30", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_31", "bits": 1, "attr": ["wo"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 250}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------|:--------------| +| 31 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_31 | | +| 30 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_30 | | +| 29 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_29 | | +| 28 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_28 | | +| 27 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_27 | | +| 26 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_26 | | +| 25 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_25 | | +| 24 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_24 | | +| 23 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_23 | | +| 22 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_22 | | +| 21 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_21 | | +| 20 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_20 | | +| 19 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_19 | | +| 18 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_18 | | +| 17 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_17 | | +| 16 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_16 | | +| 15 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_15 | | +| 14 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_14 | | +| 13 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_13 | | +| 12 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_12 | | +| 11 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_11 | | +| 10 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_10 | | +| 9 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_9 | | +| 8 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_8 | | +| 7 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_7 | | +| 6 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_6 | | +| 5 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_5 | | +| 4 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_4 | | +| 3 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_3 | | +| 2 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_2 | | +| 1 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_1 | | +| 0 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_0 | | + +## RAW_MODE_OUT_CH_MASK_1 +Selects channels to send out data in RAW mode, '1 corresponds to broadcasting +- Offset: `0x1e8` +- Reset default: `0x0` +- Reset mask: `0x3f` + +### Fields + +```wavejson +{"reg": [{"name": "RAW_MODE_OUT_CH_MASK_32", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_33", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_34", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_35", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_36", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_37", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 26}], "config": {"lanes": 1, "fontsize": 10, "vspace": 250}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------|:--------------------------| +| 31:6 | | | | Reserved | +| 5 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_37 | For RAW_MODE_OUT_CH_MASK1 | +| 4 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_36 | For RAW_MODE_OUT_CH_MASK1 | +| 3 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_35 | For RAW_MODE_OUT_CH_MASK1 | +| 2 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_34 | For RAW_MODE_OUT_CH_MASK1 | +| 1 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_33 | For RAW_MODE_OUT_CH_MASK1 | +| 0 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_32 | For RAW_MODE_OUT_CH_MASK1 | + +## RAW_MODE_OUT_DATA_FIFO +Data that will be pushed to the RAW mode output FIFO +- Offset: `0x1ec` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "RAW_MODE_OUT_DATA_FIFO", "bits": 16, "attr": ["wo"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------|:--------------| +| 31:16 | | | | Reserved | +| 15:0 | wo | 0x0 | RAW_MODE_OUT_DATA_FIFO | | + +## RAW_MODE_OUT_DATA_FIFO_CTRL +Status and control register for the RAW mode data out FIFO +- Offset: `0x1f0` +- Reset default: `0x0` +- Reset mask: `0x80000701` + +### Fields + +```wavejson +{"reg": [{"name": "clear", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 7}, {"name": "fill_state", "bits": 3, "attr": ["ro"], "rotate": -90}, {"bits": 20}, {"name": "is_full", "bits": 1, "attr": ["ro"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31 | ro | 0x0 | is_full | If '1' the FIFO is full and does not accept any more items. Any additional write to the data fill register will be ignored until there is sufficient space again. | +| 30:11 | | | | Reserved | +| 10:8 | ro | 0x0 | fill_state | The number of elements currently stored in the RAW mode TX FIFO that are ready to be sent. | +| 7:1 | | | | Reserved | +| 0 | wo | x | clear | Clears the raw mode TX FIFO. | + +## RAW_MODE_OUT_EN +Enable transmission of data currently hold in the output FIFO +- Offset: `0x1f4` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "RAW_MODE_OUT_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 170}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | RAW_MODE_OUT_EN | | + +## FLOW_CONTROL_FIFO_CLEAR +Clears the flow control Fifo +- Offset: `0x1f8` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "FLOW_CONTROL_FIFO_CLEAR", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 250}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | FLOW_CONTROL_FIFO_CLEAR | | + +## CHANNEL_ALLOC_TX_CFG +Configuration settings for the TX side in the channel allocator +- Offset: `0x1fc` +- Reset default: `0x203` +- Reset mask: `0xff03` + +### Fields + +```wavejson +{"reg": [{"name": "bypass_en", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "auto_flush_en", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 6}, {"name": "auto_flush_count", "bits": 8, "attr": ["rw"], "rotate": -90}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:---------------------------------------------------------------------------------------------| +| 31:16 | | | | Reserved | +| 15:8 | rw | 0x2 | auto_flush_count | The number of cycles to wait before auto flushing (sending) packets in the channel allocator | +| 7:2 | | | | Reserved | +| 1 | rw | 0x1 | auto_flush_en | Enable the auto-flush feature of the TX side in the channel allocator | +| 0 | rw | 0x1 | bypass_en | Enable bypassing the TX channel allocator | + +## CHANNEL_ALLOC_TX_CH_EN_0 +Channel enable mask for the TX side. +- Offset: `0x200` +- Reset default: `0xffffffff` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CHANNEL_ALLOC_TX_CH_EN_0", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_1", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_2", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_3", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_4", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_5", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_6", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_7", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_8", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_9", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_10", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_11", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_12", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_13", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_14", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_15", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_16", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_17", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_18", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_19", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_20", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_21", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_22", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_23", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_24", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_25", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_26", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_27", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_28", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_29", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_30", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_31", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 270}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------------|:--------------| +| 31 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_31 | | +| 30 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_30 | | +| 29 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_29 | | +| 28 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_28 | | +| 27 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_27 | | +| 26 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_26 | | +| 25 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_25 | | +| 24 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_24 | | +| 23 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_23 | | +| 22 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_22 | | +| 21 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_21 | | +| 20 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_20 | | +| 19 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_19 | | +| 18 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_18 | | +| 17 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_17 | | +| 16 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_16 | | +| 15 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_15 | | +| 14 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_14 | | +| 13 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_13 | | +| 12 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_12 | | +| 11 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_11 | | +| 10 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_10 | | +| 9 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_9 | | +| 8 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_8 | | +| 7 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_7 | | +| 6 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_6 | | +| 5 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_5 | | +| 4 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_4 | | +| 3 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_3 | | +| 2 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_2 | | +| 1 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_1 | | +| 0 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_0 | | + +## CHANNEL_ALLOC_TX_CH_EN_1 +Channel enable mask for the TX side. +- Offset: `0x204` +- Reset default: `0x3f` +- Reset mask: `0x3f` + +### Fields + +```wavejson +{"reg": [{"name": "CHANNEL_ALLOC_TX_CH_EN_32", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_33", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_34", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_35", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_36", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_37", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 26}], "config": {"lanes": 1, "fontsize": 10, "vspace": 270}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------------|:----------------------------| +| 31:6 | | | | Reserved | +| 5 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_37 | For CHANNEL_ALLOC_TX_CH_EN1 | +| 4 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_36 | For CHANNEL_ALLOC_TX_CH_EN1 | +| 3 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_35 | For CHANNEL_ALLOC_TX_CH_EN1 | +| 2 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_34 | For CHANNEL_ALLOC_TX_CH_EN1 | +| 1 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_33 | For CHANNEL_ALLOC_TX_CH_EN1 | +| 0 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_32 | For CHANNEL_ALLOC_TX_CH_EN1 | + +## CHANNEL_ALLOC_TX_CTRL +Soft clear or force flush the TX side of the channel allocator +- Offset: `0x208` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "clear", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "flush", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------| +| 31:2 | | | | Reserved | +| 1 | wo | x | flush | Flush (transmit remaining data) in the TX side of the channel allocator. | +| 0 | wo | x | clear | Software clear the TX side of the channel allocator | + +## CHANNEL_ALLOC_RX_CFG +Configuration settings for the RX side in the channel allocator +- Offset: `0x20c` +- Reset default: `0x10203` +- Reset mask: `0x1ff03` + +### Fields + +```wavejson +{"reg": [{"name": "bypass_en", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "auto_flush_en", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 6}, {"name": "auto_flush_count", "bits": 8, "attr": ["rw"], "rotate": -90}, {"name": "sync_en", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 15}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:---------------------------------------------------------------------------------------------------------------| +| 31:17 | | | | Reserved | +| 16 | rw | 0x1 | sync_en | Enable (1) or disable (0) the synchronization barrier between the channels (needs to be disabled in raw mode). | +| 15:8 | rw | 0x2 | auto_flush_count | The number of cycles to wait before synchronizing on partial packets on the RX side | +| 7:2 | | | | Reserved | +| 1 | rw | 0x1 | auto_flush_en | Enable the auto-flush feature of the RX side in the channel allocator | +| 0 | rw | 0x1 | bypass_en | Enable bypassing the RX channel allocator | + +## CHANNEL_ALLOC_RX_CTRL +Soft clear the RX side of the channel allocator +- Offset: `0x210` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "clear", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | x | clear | Software clear the TX side of the channel allocator | + +## CHANNEL_ALLOC_RX_CH_EN_0 +Channel enable mask for the RX side. +- Offset: `0x214` +- Reset default: `0xffffffff` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CHANNEL_ALLOC_RX_CH_EN_0", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_1", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_2", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_3", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_4", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_5", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_6", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_7", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_8", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_9", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_10", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_11", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_12", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_13", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_14", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_15", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_16", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_17", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_18", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_19", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_20", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_21", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_22", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_23", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_24", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_25", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_26", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_27", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_28", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_29", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_30", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_31", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 270}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------------|:--------------| +| 31 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_31 | | +| 30 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_30 | | +| 29 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_29 | | +| 28 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_28 | | +| 27 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_27 | | +| 26 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_26 | | +| 25 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_25 | | +| 24 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_24 | | +| 23 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_23 | | +| 22 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_22 | | +| 21 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_21 | | +| 20 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_20 | | +| 19 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_19 | | +| 18 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_18 | | +| 17 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_17 | | +| 16 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_16 | | +| 15 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_15 | | +| 14 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_14 | | +| 13 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_13 | | +| 12 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_12 | | +| 11 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_11 | | +| 10 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_10 | | +| 9 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_9 | | +| 8 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_8 | | +| 7 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_7 | | +| 6 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_6 | | +| 5 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_5 | | +| 4 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_4 | | +| 3 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_3 | | +| 2 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_2 | | +| 1 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_1 | | +| 0 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_0 | | + +## CHANNEL_ALLOC_RX_CH_EN_1 +Channel enable mask for the RX side. +- Offset: `0x218` +- Reset default: `0x3f` +- Reset mask: `0x3f` + +### Fields + +```wavejson +{"reg": [{"name": "CHANNEL_ALLOC_RX_CH_EN_32", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_33", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_34", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_35", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_36", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_37", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 26}], "config": {"lanes": 1, "fontsize": 10, "vspace": 270}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------------|:----------------------------| +| 31:6 | | | | Reserved | +| 5 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_37 | For CHANNEL_ALLOC_RX_CH_EN1 | +| 4 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_36 | For CHANNEL_ALLOC_RX_CH_EN1 | +| 3 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_35 | For CHANNEL_ALLOC_RX_CH_EN1 | +| 2 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_34 | For CHANNEL_ALLOC_RX_CH_EN1 | +| 1 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_33 | For CHANNEL_ALLOC_RX_CH_EN1 | +| 0 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_32 | For CHANNEL_ALLOC_RX_CH_EN1 | + + + +## spim / doc / registers.md + +## Summary + +| Name | Offset | Length | Description | +|:-----------------------------------------|:---------|---------:|:---------------------------------------------------------| +| spi_host.[`INTR_STATE`](#intr_state) | 0x0 | 4 | Interrupt State Register | +| spi_host.[`INTR_ENABLE`](#intr_enable) | 0x4 | 4 | Interrupt Enable Register | +| spi_host.[`INTR_TEST`](#intr_test) | 0x8 | 4 | Interrupt Test Register | +| spi_host.[`ALERT_TEST`](#alert_test) | 0xc | 4 | Alert Test Register | +| spi_host.[`CONTROL`](#control) | 0x10 | 4 | Control register | +| spi_host.[`STATUS`](#status) | 0x14 | 4 | Status register | +| spi_host.[`CONFIGOPTS`](#configopts) | 0x18 | 4 | Configuration options register. | +| spi_host.[`CSID`](#csid) | 0x1c | 4 | Chip-Select ID | +| spi_host.[`COMMAND`](#command) | 0x20 | 4 | Command Register | +| spi_host.[`RXDATA`](#rxdata) | 0x24 | 4 | SPI Receive Data. | +| spi_host.[`TXDATA`](#txdata) | 0x28 | 4 | SPI Transmit Data. | +| spi_host.[`ERROR_ENABLE`](#error_enable) | 0x2c | 4 | Controls which classes of errors raise an interrupt. | +| spi_host.[`ERROR_STATUS`](#error_status) | 0x30 | 4 | Indicates that any errors that have occurred. | +| spi_host.[`EVENT_ENABLE`](#event_enable) | 0x34 | 4 | Controls which classes of SPI events raise an interrupt. | + +## INTR_STATE +Interrupt State Register +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "error", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "spi_event", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:---------------------------------------------------------------------------------------------| +| 31:2 | | | | Reserved | +| 1 | ro | 0x0 | spi_event | Event-related interrupts, see [`EVENT_ENABLE`](#event_enable) register for more information. | +| 0 | rw1c | 0x0 | error | Error-related interrupts, see [`ERROR_ENABLE`](#error_enable) register for more information. | + +## INTR_ENABLE +Interrupt Enable Register +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "error", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "spi_event", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:--------------------------------------------------------------------| +| 31:2 | | | | Reserved | +| 1 | rw | 0x0 | spi_event | Enable interrupt when [`INTR_STATE.spi_event`](#intr_state) is set. | +| 0 | rw | 0x0 | error | Enable interrupt when [`INTR_STATE.error`](#intr_state) is set. | + +## INTR_TEST +Interrupt Test Register +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "error", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "spi_event", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-------------------------------------------------------------| +| 31:2 | | | | Reserved | +| 1 | wo | 0x0 | spi_event | Write 1 to force [`INTR_STATE.spi_event`](#intr_state) to 1. | +| 0 | wo | 0x0 | error | Write 1 to force [`INTR_STATE.error`](#intr_state) to 1. | + +## ALERT_TEST +Alert Test Register +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "fatal_fault", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:-------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | fatal_fault | Write 1 to trigger one alert event of this kind. | + +## CONTROL +Control register +- Offset: `0x10` +- Reset default: `0x7f` +- Reset mask: `0xe000ffff` + +### Fields + +```wavejson +{"reg": [{"name": "RX_WATERMARK", "bits": 8, "attr": ["rw"], "rotate": 0}, {"name": "TX_WATERMARK", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 13}, {"name": "OUTPUT_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "SW_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "SPIEN", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:---------------------------------------| +| 31 | rw | 0x0 | [SPIEN](#control--spien) | +| 30 | rw | 0x0 | [SW_RST](#control--sw_rst) | +| 29 | rw | 0x0 | [OUTPUT_EN](#control--output_en) | +| 28:16 | | | Reserved | +| 15:8 | rw | 0x0 | [TX_WATERMARK](#control--tx_watermark) | +| 7:0 | rw | 0x7f | [RX_WATERMARK](#control--rx_watermark) | + +### CONTROL . SPIEN +Enables the SPI host. On reset, this field is 0, meaning + that no transactions can proceed. + +### CONTROL . SW_RST +Clears the internal state (not registers) to the reset state when set to 1, + including the FIFOs, the CDC's, the core state machine and the shift register. + In the current implementation, the CDC FIFOs are drained not reset. + Therefore software must confirm that both FIFO's empty before releasing + the IP from reset. + +### CONTROL . OUTPUT_EN +Enable the SPI host output buffers for the sck, csb, and sd lines. This allows + the SPI_HOST IP to connect to the same bus as other SPI controllers without + interference. + +### CONTROL . TX_WATERMARK +If [`EVENT_ENABLE.TXWM`](#event_enable) is set, the IP will send + an interrupt when the depth of the TX FIFO drops below + TX_WATERMARK words (32b each). + +### CONTROL . RX_WATERMARK +If [`EVENT_ENABLE.RXWM`](#event_enable) is set, the IP will send + an interrupt when the depth of the RX FIFO reaches + RX_WATERMARK words (32b each). + +## STATUS +Status register +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0xffdfffff` + +### Fields + +```wavejson +{"reg": [{"name": "TXQD", "bits": 8, "attr": ["ro"], "rotate": 0}, {"name": "RXQD", "bits": 8, "attr": ["ro"], "rotate": 0}, {"name": "CMDQD", "bits": 4, "attr": ["ro"], "rotate": 0}, {"name": "RXWM", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 1}, {"name": "BYTEORDER", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RXSTALL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RXEMPTY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RXFULL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "TXWM", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "TXSTALL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "TXEMPTY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "TXFULL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "ACTIVE", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "READY", "bits": 1, "attr": ["ro"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:--------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31 | ro | 0x0 | READY | When high, indicates the SPI host is ready to receive commands. Writing to COMMAND when READY is low is an error, and will trigger an interrupt. | +| 30 | ro | 0x0 | ACTIVE | When high, indicates the SPI host is processing a previously issued command. | +| 29 | ro | 0x0 | TXFULL | When high, indicates that the transmit data fifo is full. Any further writes to [`TXDATA`](#txdata) will create an error interrupt. | +| 28 | ro | 0x0 | TXEMPTY | When high, indicates that the transmit data fifo is empty. | +| 27 | ro | 0x0 | TXSTALL | If high, signifies that an ongoing transaction has stalled due to lack of data in the TX FIFO | +| 26 | ro | 0x0 | TXWM | If high, the amount of data in the TX FIFO has fallen below the level of [`CONTROL.TX_WATERMARK`](#control) words (32b each). | +| 25 | ro | 0x0 | RXFULL | When high, indicates that the receive fifo is full. Any ongoing transactions will stall until firmware reads some data from [`RXDATA.`](#rxdata) | +| 24 | ro | 0x0 | RXEMPTY | When high, indicates that the receive fifo is empty. Any reads from RX FIFO will cause an error interrupt. | +| 23 | ro | 0x0 | RXSTALL | If high, signifies that an ongoing transaction has stalled due to lack of available space in the RX FIFO | +| 22 | ro | 0x0 | BYTEORDER | The value of the ByteOrder parameter, provided so that firmware can confirm proper IP configuration. | +| 21 | | | | Reserved | +| 20 | ro | 0x0 | RXWM | If high, the number of 32-bits in the RX FIFO now exceeds the [`CONTROL.RX_WATERMARK`](#control) entries (32b each). | +| 19:16 | ro | 0x0 | CMDQD | Command queue depth. Indicates how many unread 32-bit words are currently in the command segment queue. | +| 15:8 | ro | 0x0 | RXQD | Receive queue depth. Indicates how many unread 32-bit words are currently in the RX FIFO. When active, this result may an underestimate due to synchronization delays. | +| 7:0 | ro | 0x0 | TXQD | Transmit queue depth. Indicates how many unsent 32-bit words are currently in the TX FIFO. When active, this result may be an overestimate due to synchronization delays. | + +## CONFIGOPTS +Configuration options register. + + Contains options for controlling the current peripheral. + Firmware needs to configure the options before the transfer. +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xefffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CLKDIV", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "CSNIDLE", "bits": 4, "attr": ["rw"], "rotate": -90}, {"name": "CSNTRAIL", "bits": 4, "attr": ["rw"], "rotate": -90}, {"name": "CSNLEAD", "bits": 4, "attr": ["rw"], "rotate": -90}, {"bits": 1}, {"name": "FULLCYC", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CPHA", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CPOL", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 100}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:----------------------------------| +| 31 | rw | 0x0 | [CPOL](#configopts--cpol) | +| 30 | rw | 0x0 | [CPHA](#configopts--cpha) | +| 29 | rw | 0x0 | [FULLCYC](#configopts--fullcyc) | +| 28 | | | Reserved | +| 27:24 | rw | 0x0 | [CSNLEAD](#configopts--csnlead) | +| 23:20 | rw | 0x0 | [CSNTRAIL](#configopts--csntrail) | +| 19:16 | rw | 0x0 | [CSNIDLE](#configopts--csnidle) | +| 15:0 | rw | 0x0 | [CLKDIV](#configopts--clkdiv) | + +### CONFIGOPTS . CPOL +The polarity of the sck clock signal. When CPOL is 0, + sck is low when idle, and emits high pulses. When CPOL + is 1, sck is high when idle, and emits a series of low + pulses. + +### CONFIGOPTS . CPHA +The phase of the sck clock signal relative to the data. When + CPHA = 0, the data changes on the trailing edge of sck + and is typically sampled on the leading edge. Conversely + if CPHA = 1 high, data lines change on the leading edge of + sck and are typically sampled on the trailing edge. + CPHA should be chosen to match the phase of the selected + device. The sampling behavior is modified by the + [`CONFIGOPTS.FULLCYC`](#configopts) bit. + +### CONFIGOPTS . FULLCYC +Full cycle. Modifies the CPHA sampling behaviour to allow + for longer device logic setup times. Rather than sampling the SD + bus a half cycle after shifting out data, the data is sampled + a full cycle after shifting data out. This means that if + CPHA = 0, data is shifted out on the trailing edge, and + sampled a full cycle later. If CPHA = 1, data is shifted and + sampled with the trailing edge, also separated by a + full cycle. + +### CONFIGOPTS . CSNLEAD +CS_N Leading Time. Indicates the number of half sck cycles, + CSNLEAD+1, to leave between the falling edge of cs_n and + the first edge of sck. Setting this register to zero + corresponds to the minimum delay of one-half sck cycle + +### CONFIGOPTS . CSNTRAIL +CS_N Trailing Time. Indicates the number of half sck cycles, + CSNTRAIL+1, to leave between last edge of sck and the rising + edge of cs_n. Setting this register to zero corresponds + to the minimum delay of one-half sck cycle. + +### CONFIGOPTS . CSNIDLE +Minimum idle time between commands. Indicates the minimum + number of sck half-cycles to hold cs_n high between commands. + Setting this register to zero creates a minimally-wide CS_N-high + pulse of one-half sck cycle. + +### CONFIGOPTS . CLKDIV +Core clock divider. Slows down subsequent SPI transactions by a + factor of (CLKDIV+1) relative to the core clock frequency. The + period of sck, T(sck) then becomes `2*(CLK_DIV+1)*T(core)` + +## CSID +Chip-Select ID + + Controls which device to target with the next command. This register + is passed to the core whenever [`COMMAND`](#command) is written. The core then + asserts cio_csb_o[[`CSID`](#csid)] during the execution of the command. +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CSID", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------| +| 31:0 | rw | 0x0 | CSID | Chip Select ID | + +## COMMAND +Command Register + + Parameters specific to each command segment. Unlike the [`CONFIGOPTS`](#configopts) multi-register, + there is only one command register for controlling all attached SPI devices +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0x1ffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CSAAT", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "SPEED", "bits": 2, "attr": ["wo"], "rotate": -90}, {"name": "DIRECTION", "bits": 2, "attr": ["wo"], "rotate": -90}, {"name": "LEN", "bits": 20, "attr": ["wo"], "rotate": 0}, {"bits": 7}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:---------------------------------| +| 31:25 | | | Reserved | +| 24:5 | wo | 0x0 | [LEN](#command--len) | +| 4:3 | wo | 0x0 | [DIRECTION](#command--direction) | +| 2:1 | wo | 0x0 | [SPEED](#command--speed) | +| 0 | wo | 0x0 | [CSAAT](#command--csaat) | + +### COMMAND . LEN +Segment Length. + + For read or write segments, this field controls the + number of 1-byte bursts to transmit and or receive in + this command segment. The number of cyles required + to send or received a byte will depend on [`COMMAND.SPEED.`](#command) + For dummy segments, ([`COMMAND.DIRECTION`](#command) == 0), this register + controls the number of dummy cycles to issue. + The number of bytes (or dummy cycles) in the segment will be + equal to [`COMMAND.LEN`](#command) + 1. + +### COMMAND . DIRECTION +The direction for the following command: "0" = Dummy cycles + (no TX/RX). "1" = Rx only, "2" = Tx only, "3" = Bidirectional + Tx/Rx (Standard SPI mode only). + +### COMMAND . SPEED +The speed for this command segment: "0" = Standard SPI. "1" = Dual SPI. + "2"=Quad SPI, "3": RESERVED. + +### COMMAND . CSAAT +**C**hip **S**elect **A**ctive **A**fter **T**ransaction. + If [`COMMAND.CSAAT`](#command) = 0, the chip select line is raised immediately + at the end of the command segment. + If [`COMMAND.CSAAT`](#command) = 1, the chip select line is left low at the + end of the current transaction segment. + This allows the creation of longer, more complete SPI transactions, + consisting of several separate segments for issuing instructions, + pausing for dummy cycles, and transmitting or receiving data from + the device. + +## RXDATA +SPI Receive Data. + + Reads from this window pull data from the RXFIFO. + + The serial order of bit transmission + is chosen to match SPI flash devices. Individual bytes + are always transmitted with the most significant bit first. + Only four-byte reads are supported. If ByteOrder = 0, + the first byte received is packed in the MSB of !!RXDATA. + For some processor architectures, this could lead to shuffling + of flash data as compared to how it is written in memory. + In which case, choosing ByteOrder = 1 can reverse the + byte-order of each data read, causing the first byte + received to be packed into the LSB of !!RXDATA. (Though within + each byte the most significant bit is always pulled + from the bus first.) + +- Word Aligned Offset Range: `0x24`to`0x24` +- Size (words): `1` +- Access: `ro` +- Byte writes are *not* supported. + +## TXDATA +SPI Transmit Data. + + Data written to this window is placed into the TXFIFO. + Byte-enables are supported for writes. + + The serial order of bit transmission + is chosen to match SPI flash devices. Individual bytes + are always transmitted with the most significant bit first. + Multi-byte writes are also supported, and if ByteOrder = 0, + the bits of !!TXDATA are transmitted strictly in order of + decreasing signficance (i.e. most signicant bit first). + For some processor architectures, this could lead to shuffling + of flash data as compared to how it is written in memory. + In which case, choosing ByteOrder = 1 can reverse the + byte-order of multi-byte data writes. (Though within + each byte the most significant bit is always sent first.) + +- Word Aligned Offset Range: `0x28`to`0x28` +- Size (words): `1` +- Access: `wo` +- Byte writes are supported. + +## ERROR_ENABLE +Controls which classes of errors raise an interrupt. +- Offset: `0x2c` +- Reset default: `0x1f` +- Reset mask: `0x1f` + +### Fields + +```wavejson +{"reg": [{"name": "CMDBUSY", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "OVERFLOW", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "UNDERFLOW", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CMDINVAL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CSIDINVAL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 27}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:5 | | | | Reserved | +| 4 | rw | 0x1 | CSIDINVAL | Invalid CSID: If this bit is set, the block sends an error interrupt whenever a command is submitted, but CSID exceeds NumCS. | +| 3 | rw | 0x1 | CMDINVAL | Invalid Command Errors: If this bit is set, the block sends an error interrupt whenever a command is sent with invalid values for [`COMMAND.SPEED`](#command) or [`COMMAND.DIRECTION.`](#command) | +| 2 | rw | 0x1 | UNDERFLOW | Underflow Errors: If this bit is set, the block sends an error interrupt whenever there is a read from [`RXDATA`](#rxdata) but the RX FIFO is empty. | +| 1 | rw | 0x1 | OVERFLOW | Overflow Errors: If this bit is set, the block sends an error interrupt whenever the TX FIFO overflows. | +| 0 | rw | 0x1 | CMDBUSY | Command Error: If this bit is set, the block sends an error interrupt whenever a command is issued while busy (i.e. a 1 is when [`STATUS.READY`](#status) is not asserted.) | + +## ERROR_STATUS +Indicates that any errors that have occurred. + When an error + occurs, the corresponding bit must be cleared here before + issuing any further commands. +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0x3f` + +### Fields + +```wavejson +{"reg": [{"name": "CMDBUSY", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "OVERFLOW", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "UNDERFLOW", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "CMDINVAL", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "CSIDINVAL", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "ACCESSINVAL", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"bits": 26}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:6 | | | | Reserved | +| 5 | rw1c | 0x0 | ACCESSINVAL | Indicates that TLUL attempted to write to TXDATA with no bytes enabled. Such 'zero byte' writes are not supported. | +| 4 | rw1c | 0x0 | CSIDINVAL | Indicates a command was attempted with an invalid value for [`CSID.`](#csid) | +| 3 | rw1c | 0x0 | CMDINVAL | Indicates an invalid command segment, meaning either an invalid value of [`COMMAND.SPEED`](#command) or a request for bidirectional data transfer at dual or quad speed | +| 2 | rw1c | 0x0 | UNDERFLOW | Indicates that firmware has attempted to read from [`RXDATA`](#rxdata) when the RX FIFO is empty. | +| 1 | rw1c | 0x0 | OVERFLOW | Indicates that firmware has overflowed the TX FIFO | +| 0 | rw1c | 0x0 | CMDBUSY | Indicates a write to [`COMMAND`](#command) when [`STATUS.READY`](#status) = 0. | + +## EVENT_ENABLE +Controls which classes of SPI events raise an interrupt. +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0x3f` + +### Fields + +```wavejson +{"reg": [{"name": "RXFULL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "TXEMPTY", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RXWM", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "TXWM", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "READY", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "IDLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 26}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:----------------------------------| +| 31:6 | | | Reserved | +| 5 | rw | 0x0 | [IDLE](#event_enable--idle) | +| 4 | rw | 0x0 | [READY](#event_enable--ready) | +| 3 | rw | 0x0 | [TXWM](#event_enable--txwm) | +| 2 | rw | 0x0 | [RXWM](#event_enable--rxwm) | +| 1 | rw | 0x0 | [TXEMPTY](#event_enable--txempty) | +| 0 | rw | 0x0 | [RXFULL](#event_enable--rxfull) | + +### EVENT_ENABLE . IDLE +Assert to send a spi_event interrupt whenever [`STATUS.ACTIVE`](#status) + goes low + +### EVENT_ENABLE . READY +Assert to send a spi_event interrupt whenever [`STATUS.READY`](#status) + goes high + +### EVENT_ENABLE . TXWM +Assert to send a spi_event interrupt whenever the number of 32-bit words in + the TX FIFO is less than [`CONTROL.TX_WATERMARK.`](#control) To prevent the + reassertion of this interrupt add more data to the TX FIFO, or + reduce [`CONTROL.TX_WATERMARK.`](#control) + +### EVENT_ENABLE . RXWM +Assert to send a spi_event interrupt whenever the number of 32-bit words in + the RX FIFO is greater than [`CONTROL.RX_WATERMARK.`](#control) To prevent the + reassertion of this interrupt, read more data from the RX FIFO, or + increase [`CONTROL.RX_WATERMARK.`](#control) + +### EVENT_ENABLE . TXEMPTY +Assert to send a spi_event interrupt whenever [`STATUS.TXEMPTY`](#status) + goes high + +### EVENT_ENABLE . RXFULL +Assert to send a spi_event interrupt whenever [`STATUS.RXFULL`](#status) + goes high + + + +## tagger / doc / registers.md + +## Summary + +| Name | Offset | Length | Description | +|:---------------------------------------|:---------|---------:|:----------------------------------------| +| tagger_reg.[`PAT_COMMIT`](#PAT_COMMIT) | 0x0 | 4 | Partition configuration commit register | +| tagger_reg.[`PAT_ADDR_0`](#pat_addr) | 0x4 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_1`](#pat_addr) | 0x8 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_2`](#pat_addr) | 0xc | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_3`](#pat_addr) | 0x10 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_4`](#pat_addr) | 0x14 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_5`](#pat_addr) | 0x18 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_6`](#pat_addr) | 0x1c | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_7`](#pat_addr) | 0x20 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_8`](#pat_addr) | 0x24 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_9`](#pat_addr) | 0x28 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_10`](#pat_addr) | 0x2c | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_11`](#pat_addr) | 0x30 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_12`](#pat_addr) | 0x34 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_13`](#pat_addr) | 0x38 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_14`](#pat_addr) | 0x3c | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_15`](#pat_addr) | 0x40 | 4 | Partition address | +| tagger_reg.[`PATID_0`](#patid) | 0x44 | 4 | Partition ID | +| tagger_reg.[`PATID_1`](#patid) | 0x48 | 4 | Partition ID | +| tagger_reg.[`PATID_2`](#patid) | 0x4c | 4 | Partition ID | +| tagger_reg.[`ADDR_CONF`](#addr_conf) | 0x50 | 4 | Address encoding mode switch register | + +## PAT_COMMIT +Partition configuration commit register +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "commit_0", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 100}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | commit_0 | commit changes of partition configuration | + +## PAT_ADDR +Partition address +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:------------|:---------| +| PAT_ADDR_0 | 0x4 | +| PAT_ADDR_1 | 0x8 | +| PAT_ADDR_2 | 0xc | +| PAT_ADDR_3 | 0x10 | +| PAT_ADDR_4 | 0x14 | +| PAT_ADDR_5 | 0x18 | +| PAT_ADDR_6 | 0x1c | +| PAT_ADDR_7 | 0x20 | +| PAT_ADDR_8 | 0x24 | +| PAT_ADDR_9 | 0x28 | +| PAT_ADDR_10 | 0x2c | +| PAT_ADDR_11 | 0x30 | +| PAT_ADDR_12 | 0x34 | +| PAT_ADDR_13 | 0x38 | +| PAT_ADDR_14 | 0x3c | +| PAT_ADDR_15 | 0x40 | + + +### Fields + +```wavejson +{"reg": [{"name": "PAT_ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:-----------------------------------------| +| 31:0 | rw | 0x0 | PAT_ADDR | Single partition configurations: address | + +## PATID +Partition ID +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:--------|:---------| +| PATID_0 | 0x44 | +| PATID_1 | 0x48 | +| PATID_2 | 0x4c | + + +### Fields + +```wavejson +{"reg": [{"name": "PATID", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------| +| 31:0 | rw | 0x0 | PATID | Partition ID (PatID) for each partition, length determined by params | + +## ADDR_CONF +Address encoding mode switch register +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:----------|:---------| +| ADDR_CONF | 0x50 | + + +### Fields + +```wavejson +{"reg": [{"name": "addr_conf", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:----------------------------------------------------------------------------| +| 31:0 | rw | 0x0 | addr_conf | 2 bits configuration for each partition. 2'b00: OFF, 2'b01: TOR, 2'b10: NA4 | + + + +## uart / doc / registers.md + +## Summary + +| Name | Offset | Length | Description | +|:-------------------------------------|:---------|---------:|:-------------------------------------------------------------------| +| uart.[`INTR_STATE`](#intr_state) | 0x0 | 4 | Interrupt State Register | +| uart.[`INTR_ENABLE`](#intr_enable) | 0x4 | 4 | Interrupt Enable Register | +| uart.[`INTR_TEST`](#intr_test) | 0x8 | 4 | Interrupt Test Register | +| uart.[`ALERT_TEST`](#alert_test) | 0xc | 4 | Alert Test Register | +| uart.[`CTRL`](#ctrl) | 0x10 | 4 | UART control register | +| uart.[`STATUS`](#status) | 0x14 | 4 | UART live status register | +| uart.[`RDATA`](#rdata) | 0x18 | 4 | UART read data | +| uart.[`WDATA`](#wdata) | 0x1c | 4 | UART write data | +| uart.[`FIFO_CTRL`](#fifo_ctrl) | 0x20 | 4 | UART FIFO control register | +| uart.[`FIFO_STATUS`](#fifo_status) | 0x24 | 4 | UART FIFO status register | +| uart.[`OVRD`](#ovrd) | 0x28 | 4 | TX pin override control. Gives direct SW control over TX pin state | +| uart.[`VAL`](#val) | 0x2c | 4 | UART oversampled values | +| uart.[`TIMEOUT_CTRL`](#timeout_ctrl) | 0x30 | 4 | UART RX timeout control | + +## INTR_STATE +Interrupt State Register +- Offset: `0x0` +- Reset default: `0x101` +- Reset mask: `0x1ff` + +### Fields + +```wavejson +{"reg": [{"name": "tx_watermark", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "rx_watermark", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "tx_done", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "rx_overflow", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "rx_frame_err", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "rx_break_err", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "rx_timeout", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "rx_parity_err", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "tx_empty", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 23}], "config": {"lanes": 1, "fontsize": 10, "vspace": 150}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:---------------------------------------------------------------------------------------------------------------| +| 31:9 | | | | Reserved | +| 8 | ro | 0x1 | tx_empty | raised if the transmit FIFO is empty. | +| 7 | rw1c | 0x0 | rx_parity_err | raised if the receiver has detected a parity error. | +| 6 | rw1c | 0x0 | rx_timeout | raised if RX FIFO has characters remaining in the FIFO without being retrieved for the programmed time period. | +| 5 | rw1c | 0x0 | rx_break_err | raised if break condition has been detected on receive. | +| 4 | rw1c | 0x0 | rx_frame_err | raised if a framing error has been detected on receive. | +| 3 | rw1c | 0x0 | rx_overflow | raised if the receive FIFO has overflowed. | +| 2 | rw1c | 0x0 | tx_done | raised if the transmit FIFO has emptied and no transmit is ongoing. | +| 1 | ro | 0x0 | rx_watermark | raised if the receive FIFO is past the high-water mark. | +| 0 | ro | 0x1 | tx_watermark | raised if the transmit FIFO is past the high-water mark. | + +## INTR_ENABLE +Interrupt Enable Register +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0x1ff` + +### Fields + +```wavejson +{"reg": [{"name": "tx_watermark", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "rx_watermark", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "tx_done", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "rx_overflow", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "rx_frame_err", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "rx_break_err", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "rx_timeout", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "rx_parity_err", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "tx_empty", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 23}], "config": {"lanes": 1, "fontsize": 10, "vspace": 150}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:------------------------------------------------------------------------| +| 31:9 | | | | Reserved | +| 8 | rw | 0x0 | tx_empty | Enable interrupt when [`INTR_STATE.tx_empty`](#intr_state) is set. | +| 7 | rw | 0x0 | rx_parity_err | Enable interrupt when [`INTR_STATE.rx_parity_err`](#intr_state) is set. | +| 6 | rw | 0x0 | rx_timeout | Enable interrupt when [`INTR_STATE.rx_timeout`](#intr_state) is set. | +| 5 | rw | 0x0 | rx_break_err | Enable interrupt when [`INTR_STATE.rx_break_err`](#intr_state) is set. | +| 4 | rw | 0x0 | rx_frame_err | Enable interrupt when [`INTR_STATE.rx_frame_err`](#intr_state) is set. | +| 3 | rw | 0x0 | rx_overflow | Enable interrupt when [`INTR_STATE.rx_overflow`](#intr_state) is set. | +| 2 | rw | 0x0 | tx_done | Enable interrupt when [`INTR_STATE.tx_done`](#intr_state) is set. | +| 1 | rw | 0x0 | rx_watermark | Enable interrupt when [`INTR_STATE.rx_watermark`](#intr_state) is set. | +| 0 | rw | 0x0 | tx_watermark | Enable interrupt when [`INTR_STATE.tx_watermark`](#intr_state) is set. | + +## INTR_TEST +Interrupt Test Register +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0x1ff` + +### Fields + +```wavejson +{"reg": [{"name": "tx_watermark", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "rx_watermark", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "tx_done", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "rx_overflow", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "rx_frame_err", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "rx_break_err", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "rx_timeout", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "rx_parity_err", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "tx_empty", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 23}], "config": {"lanes": 1, "fontsize": 10, "vspace": 150}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:-----------------------------------------------------------------| +| 31:9 | | | | Reserved | +| 8 | wo | 0x0 | tx_empty | Write 1 to force [`INTR_STATE.tx_empty`](#intr_state) to 1. | +| 7 | wo | 0x0 | rx_parity_err | Write 1 to force [`INTR_STATE.rx_parity_err`](#intr_state) to 1. | +| 6 | wo | 0x0 | rx_timeout | Write 1 to force [`INTR_STATE.rx_timeout`](#intr_state) to 1. | +| 5 | wo | 0x0 | rx_break_err | Write 1 to force [`INTR_STATE.rx_break_err`](#intr_state) to 1. | +| 4 | wo | 0x0 | rx_frame_err | Write 1 to force [`INTR_STATE.rx_frame_err`](#intr_state) to 1. | +| 3 | wo | 0x0 | rx_overflow | Write 1 to force [`INTR_STATE.rx_overflow`](#intr_state) to 1. | +| 2 | wo | 0x0 | tx_done | Write 1 to force [`INTR_STATE.tx_done`](#intr_state) to 1. | +| 1 | wo | 0x0 | rx_watermark | Write 1 to force [`INTR_STATE.rx_watermark`](#intr_state) to 1. | +| 0 | wo | 0x0 | tx_watermark | Write 1 to force [`INTR_STATE.tx_watermark`](#intr_state) to 1. | + +## ALERT_TEST +Alert Test Register +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "fatal_fault", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:-------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | fatal_fault | Write 1 to trigger one alert event of this kind. | + +## CTRL +UART control register +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffff03f7` + +### Fields + +```wavejson +{"reg": [{"name": "TX", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RX", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "NF", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 1}, {"name": "SLPBK", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "LLPBK", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "PARITY_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "PARITY_ODD", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RXBLVL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 6}, {"name": "NCO", "bits": 16, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:--------------------------------| +| 31:16 | rw | 0x0 | [NCO](#ctrl--nco) | +| 15:10 | | | Reserved | +| 9:8 | rw | 0x0 | [RXBLVL](#ctrl--rxblvl) | +| 7 | rw | 0x0 | [PARITY_ODD](#ctrl--parity_odd) | +| 6 | rw | 0x0 | [PARITY_EN](#ctrl--parity_en) | +| 5 | rw | 0x0 | [LLPBK](#ctrl--llpbk) | +| 4 | rw | 0x0 | [SLPBK](#ctrl--slpbk) | +| 3 | | | Reserved | +| 2 | rw | 0x0 | [NF](#ctrl--nf) | +| 1 | rw | 0x0 | [RX](#ctrl--rx) | +| 0 | rw | 0x0 | [TX](#ctrl--tx) | + +### CTRL . NCO +BAUD clock rate control. + +### CTRL . RXBLVL +Trigger level for RX break detection. Sets the number of character +times the line must be low to detect a break. + +| Value | Name | Description | +|:--------|:--------|:--------------| +| 0x0 | break2 | 2 characters | +| 0x1 | break4 | 4 characters | +| 0x2 | break8 | 8 characters | +| 0x3 | break16 | 16 characters | + + +### CTRL . PARITY_ODD +If PARITY_EN is true, this determines the type, 1 for odd parity, 0 for even. + +### CTRL . PARITY_EN +If true, parity is enabled in both RX and TX directions. + +### CTRL . LLPBK +Line loopback enable. + +If this bit is turned on, incoming bits are forwarded to TX for testing purpose. +See Block Diagram. Note that the internal design sees RX value as 1 always if line +loopback is enabled. + +### CTRL . SLPBK +System loopback enable. + +If this bit is turned on, any outgoing bits to TX are received through RX. +See Block Diagram. Note that the TX line goes 1 if System loopback is enabled. + +### CTRL . NF +RX noise filter enable. +If the noise filter is enabled, RX line goes through the 3-tap +repetition code. It ignores single IP clock period noise. + +### CTRL . RX +RX enable + +### CTRL . TX +TX enable + +## STATUS +UART live status register +- Offset: `0x14` +- Reset default: `0x3c` +- Reset mask: `0x3f` + +### Fields + +```wavejson +{"reg": [{"name": "TXFULL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RXFULL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "TXEMPTY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "TXIDLE", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RXIDLE", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RXEMPTY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 26}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:----------------------------------------------------| +| 31:6 | | | | Reserved | +| 5 | ro | 0x1 | RXEMPTY | RX FIFO is empty | +| 4 | ro | 0x1 | RXIDLE | RX is idle | +| 3 | ro | 0x1 | TXIDLE | TX FIFO is empty and all bits have been transmitted | +| 2 | ro | 0x1 | TXEMPTY | TX FIFO is empty | +| 1 | ro | x | RXFULL | RX buffer is full | +| 0 | ro | x | TXFULL | TX buffer is full | + +## RDATA +UART read data +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "RDATA", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | x | RDATA | | + +## WDATA +UART write data +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "WDATA", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | WDATA | | + +## FIFO_CTRL +UART FIFO control register +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "RXRST", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "TXRST", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RXILVL", "bits": 3, "attr": ["rw"], "rotate": -90}, {"name": "TXILVL", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------| +| 31:8 | | | Reserved | +| 7:5 | rw | 0x0 | [TXILVL](#fifo_ctrl--txilvl) | +| 4:2 | rw | 0x0 | [RXILVL](#fifo_ctrl--rxilvl) | +| 1 | wo | 0x0 | [TXRST](#fifo_ctrl--txrst) | +| 0 | wo | 0x0 | [RXRST](#fifo_ctrl--rxrst) | + +### FIFO_CTRL . TXILVL +Trigger level for TX interrupts. If the FIFO depth is less than the setting, it +raises tx_watermark interrupt. + +| Value | Name | Description | +|:--------|:--------|:--------------| +| 0x0 | txlvl1 | 1 character | +| 0x1 | txlvl2 | 2 characters | +| 0x2 | txlvl4 | 4 characters | +| 0x3 | txlvl8 | 8 characters | +| 0x4 | txlvl16 | 16 characters | + +Other values are reserved. + +### FIFO_CTRL . RXILVL +Trigger level for RX interrupts. If the FIFO depth is greater than or equal to +the setting, it raises rx_watermark interrupt. + +| Value | Name | Description | +|:--------|:--------|:--------------| +| 0x0 | rxlvl1 | 1 character | +| 0x1 | rxlvl2 | 2 characters | +| 0x2 | rxlvl4 | 4 characters | +| 0x3 | rxlvl8 | 8 characters | +| 0x4 | rxlvl16 | 16 characters | +| 0x5 | rxlvl32 | 32 characters | +| 0x6 | rxlvl62 | 62 characters | + +Other values are reserved. + +### FIFO_CTRL . TXRST +TX fifo reset. Write 1 to the register resets TX_FIFO. Read returns 0 + +### FIFO_CTRL . RXRST +RX fifo reset. Write 1 to the register resets RX_FIFO. Read returns 0 + +## FIFO_STATUS +UART FIFO status register +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0xff00ff` + +### Fields + +```wavejson +{"reg": [{"name": "TXLVL", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 8}, {"name": "RXLVL", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------| +| 31:24 | | | | Reserved | +| 23:16 | ro | x | RXLVL | Current fill level of RX fifo | +| 15:8 | | | | Reserved | +| 7:0 | ro | x | TXLVL | Current fill level of TX fifo | + +## OVRD +TX pin override control. Gives direct SW control over TX pin state +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "TXEN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "TXVAL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------| +| 31:2 | | | | Reserved | +| 1 | rw | 0x0 | TXVAL | Write to set the value of the TX pin | +| 0 | rw | 0x0 | TXEN | Enable TX pin override control | + +## VAL +UART oversampled values +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "RX", "bits": 16, "attr": ["ro"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------| +| 31:16 | | | | Reserved | +| 15:0 | ro | x | RX | Last 16 oversampled values of RX. Most recent bit is bit 0, oldest 15. | + +## TIMEOUT_CTRL +UART RX timeout control +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0x80ffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VAL", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 7}, {"name": "EN", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------| +| 31 | rw | 0x0 | EN | Enable RX timeout feature | +| 30:24 | | | | Reserved | +| 23:0 | rw | 0x0 | VAL | RX timeout value in UART bit times | + + + +## unbent / doc / registers.md + +## Summary + +| Name | Offset | Length | Description | +|:---------------------------------------------|:---------|---------:|:------------------------------------| +| bus_err_unit.[`err_addr`](#err_addr) | 0x0 | 4 | Address of the bus error | +| bus_err_unit.[`err_addr_top`](#err_addr_top) | 0x4 | 4 | Top of the address of the bus error | +| bus_err_unit.[`err_code`](#err_code) | 0x8 | 4 | Error code of the bus error | +| bus_err_unit.[`meta`](#meta) | 0xc | 4 | Meta information of the bus error | + +## err_addr +Address of the bus error +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "err_addr", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:-------------------------| +| 31:0 | ro | x | err_addr | Address of the bus error | + +## err_addr_top +Top of the address of the bus error +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "err_addr", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:-------------------------| +| 31:0 | ro | x | err_addr | Address of the bus error | + +## err_code +Error code of the bus error +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "err_code", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:----------------------------| +| 31:0 | ro | x | err_code | Error code of the bus error | + +## meta +Meta information of the bus error +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "meta", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------| +| 31:0 | ro | x | meta | Meta information of the bus error | + + + +## vga / doc / registers.md + +## Summary + +| Name | Offset | Length | Description | +|:----------------------------------------------------------|:---------|---------:|:------------------------------------------| +| axi_vga.[`CONTROL`](#control) | 0x0 | 4 | Control register | +| axi_vga.[`CLK_DIV`](#clk_div) | 0x4 | 4 | Clock divider | +| axi_vga.[`HORI_VISIBLE_SIZE`](#hori_visible_size) | 0x8 | 4 | Size of horizontal visible area | +| axi_vga.[`HORI_FRONT_PORCH_SIZE`](#hori_front_porch_size) | 0xc | 4 | Size of horizontal front porch | +| axi_vga.[`HORI_SYNC_SIZE`](#hori_sync_size) | 0x10 | 4 | Size of horizontal sync area | +| axi_vga.[`HORI_BACK_PORCH_SIZE`](#hori_back_porch_size) | 0x14 | 4 | Size of horizontal back porch | +| axi_vga.[`VERT_VISIBLE_SIZE`](#vert_visible_size) | 0x18 | 4 | Size of vertical visible area | +| axi_vga.[`VERT_FRONT_PORCH_SIZE`](#vert_front_porch_size) | 0x1c | 4 | Size of vertical front porch | +| axi_vga.[`VERT_SYNC_SIZE`](#vert_sync_size) | 0x20 | 4 | Size of vertical sync area | +| axi_vga.[`VERT_BACK_PORCH_SIZE`](#vert_back_porch_size) | 0x24 | 4 | Size of vertical back porch | +| axi_vga.[`START_ADDR_LOW`](#start_addr_low) | 0x28 | 4 | Low end of start address of frame buffer | +| axi_vga.[`START_ADDR_HIGH`](#start_addr_high) | 0x2c | 4 | High end of start address of frame buffer | +| axi_vga.[`FRAME_SIZE`](#frame_size) | 0x30 | 4 | Size of whole frame | +| axi_vga.[`BURST_LEN`](#burst_len) | 0x34 | 4 | Number of beats in a burst | + +## CONTROL +Control register +- Offset: `0x0` +- Reset default: `0x6` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "enable", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "hsync_pol", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "vsync_pol", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-------------------------------------------------------| +| 31:3 | | | | Reserved | +| 2 | rw | 0x1 | vsync_pol | Sets polarity for VSYNC 0 - Active Low 1 - Active High | +| 1 | rw | 0x1 | hsync_pol | Sets polarity for HSYNC 0 - Active Low 1 - Active High | +| 0 | rw | 0x0 | enable | Enables FSM. | + +## CLK_DIV +Clock divider +- Offset: `0x4` +- Reset default: `0x1` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "clk_div", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:---------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x1 | clk_div | Clock divider. | + +## HORI_VISIBLE_SIZE +Size of horizontal visible area +- Offset: `0x8` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "hori_visible_size", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:---------------------------------| +| 31:0 | rw | 0x1 | hori_visible_size | Size of horizontal visible area. | + +## HORI_FRONT_PORCH_SIZE +Size of horizontal front porch +- Offset: `0xc` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "hori_front_porch_size", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:--------------------------------| +| 31:0 | rw | 0x1 | hori_front_porch_size | Size of horizontal front porch. | + +## HORI_SYNC_SIZE +Size of horizontal sync area +- Offset: `0x10` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "hori_sync_size", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:------------------------------| +| 31:0 | rw | 0x1 | hori_sync_size | Size of horizontal sync area. | + +## HORI_BACK_PORCH_SIZE +Size of horizontal back porch +- Offset: `0x14` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "hori_back_porch_size", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:-------------------------------| +| 31:0 | rw | 0x1 | hori_back_porch_size | Size of horizontal back porch. | + +## VERT_VISIBLE_SIZE +Size of vertical visible area +- Offset: `0x18` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "vert_visible_size", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:-------------------------------| +| 31:0 | rw | 0x1 | vert_visible_size | Size of vertical visible area. | + +## VERT_FRONT_PORCH_SIZE +Size of vertical front porch +- Offset: `0x1c` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "vert_front_porch_size", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:------------------------------| +| 31:0 | rw | 0x1 | vert_front_porch_size | Size of vertical front porch. | + +## VERT_SYNC_SIZE +Size of vertical sync area +- Offset: `0x20` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "vert_sync_size", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:----------------------------| +| 31:0 | rw | 0x1 | vert_sync_size | Size of vertical sync area. | + +## VERT_BACK_PORCH_SIZE +Size of vertical back porch +- Offset: `0x24` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "vert_back_porch_size", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:-----------------------------| +| 31:0 | rw | 0x1 | vert_back_porch_size | Size of vertical back porch. | + +## START_ADDR_LOW +Low end of start address of frame buffer +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "start_addr_low", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:------------------------------------------| +| 31:0 | rw | 0x0 | start_addr_low | Low end of start address of frame buffer. | + +## START_ADDR_HIGH +High end of start address of frame buffer +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "start_addr_high", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------|:-------------------------------------------| +| 31:0 | rw | 0x0 | start_addr_high | High end of start address of frame buffer. | + +## FRAME_SIZE +Size of whole frame +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "frame_size", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:---------------------| +| 31:0 | rw | 0x0 | frame_size | Size of whole frame. | + +## BURST_LEN +Number of beats in a burst +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "burst_len", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:----------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | burst_len | Number of beats in a burst. | + + + +## watchdog_timer / doc / registers.md + +## Summary + +| Name | Offset | Length | Description | +|:------------------------------------------------|:---------|---------:|:---------------------------------------| +| aon_timer.[`ALERT_TEST`](#alert_test) | 0x0 | 4 | Alert Test Register | +| aon_timer.[`WKUP_CTRL`](#wkup_ctrl) | 0x4 | 4 | Wakeup Timer Control register | +| aon_timer.[`WKUP_THOLD`](#wkup_thold) | 0x8 | 4 | Wakeup Timer Threshold Register | +| aon_timer.[`WKUP_COUNT`](#wkup_count) | 0xc | 4 | Wakeup Timer Count Register | +| aon_timer.[`WDOG_REGWEN`](#wdog_regwen) | 0x10 | 4 | Watchdog Timer Write Enable Register | +| aon_timer.[`WDOG_CTRL`](#wdog_ctrl) | 0x14 | 4 | Watchdog Timer Control register | +| aon_timer.[`WDOG_BARK_THOLD`](#wdog_bark_thold) | 0x18 | 4 | Watchdog Timer Bark Threshold Register | +| aon_timer.[`WDOG_BITE_THOLD`](#wdog_bite_thold) | 0x1c | 4 | Watchdog Timer Bite Threshold Register | +| aon_timer.[`WDOG_COUNT`](#wdog_count) | 0x20 | 4 | Watchdog Timer Count Register | +| aon_timer.[`INTR_STATE`](#intr_state) | 0x24 | 4 | Interrupt State Register | +| aon_timer.[`INTR_TEST`](#intr_test) | 0x28 | 4 | Interrupt Test Register | +| aon_timer.[`WKUP_CAUSE`](#wkup_cause) | 0x2c | 4 | Wakeup request status | + +## ALERT_TEST +Alert Test Register +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "fatal_fault", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:-------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | fatal_fault | Write 1 to trigger one alert event of this kind. | + +## WKUP_CTRL +Wakeup Timer Control register +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0x1fff` + +### Fields + +```wavejson +{"reg": [{"name": "enable", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "prescaler", "bits": 12, "attr": ["rw"], "rotate": 0}, {"bits": 19}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-------------------------------------------| +| 31:13 | | | | Reserved | +| 12:1 | rw | 0x0 | prescaler | Pre-scaler value for wakeup timer count | +| 0 | rw | 0x0 | enable | When set to 1, the wakeup timer will count | + +## WKUP_THOLD +Wakeup Timer Threshold Register +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "threshold", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:----------------------------------------------------------| +| 31:0 | rw | 0x0 | threshold | The count at which a wakeup interrupt should be generated | + +## WKUP_COUNT +Wakeup Timer Count Register +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "count", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------| +| 31:0 | rw | 0x0 | count | The current wakeup counter value | + +## WDOG_REGWEN +Watchdog Timer Write Enable Register +- Offset: `0x10` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "regwen", "bits": 1, "attr": ["rw0c"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw0c | 0x1 | regwen | Once cleared, the watchdog configuration will be locked until the next reset | + +## WDOG_CTRL +Watchdog Timer Control register +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0x3` +- Register enable: [`WDOG_REGWEN`](#wdog_regwen) + +### Fields + +```wavejson +{"reg": [{"name": "enable", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "pause_in_sleep", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 160}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:--------------------------------------------------------------| +| 31:2 | | | | Reserved | +| 1 | rw | 0x0 | pause_in_sleep | When set to 1, the watchdog timer will not count during sleep | +| 0 | rw | 0x0 | enable | When set to 1, the watchdog timer will count | + +## WDOG_BARK_THOLD +Watchdog Timer Bark Threshold Register +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` +- Register enable: [`WDOG_REGWEN`](#wdog_regwen) + +### Fields + +```wavejson +{"reg": [{"name": "threshold", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-----------------------------------------------------------------| +| 31:0 | rw | 0x0 | threshold | The count at which a watchdog bark interrupt should be generated | + +## WDOG_BITE_THOLD +Watchdog Timer Bite Threshold Register +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` +- Register enable: [`WDOG_REGWEN`](#wdog_regwen) + +### Fields + +```wavejson +{"reg": [{"name": "threshold", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-------------------------------------------------------------| +| 31:0 | rw | 0x0 | threshold | The count at which a watchdog bite reset should be generated | + +## WDOG_COUNT +Watchdog Timer Count Register +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "count", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------| +| 31:0 | rw | 0x0 | count | The current watchdog counter value | + +## INTR_STATE +Interrupt State Register +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "wkup_timer_expired", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "wdog_timer_bark", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 200}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------|:-----------------------------------------------------------| +| 31:2 | | | | Reserved | +| 1 | rw1c | 0x0 | wdog_timer_bark | Raised if the watchdog timer has hit the bark threshold | +| 0 | rw1c | 0x0 | wkup_timer_expired | Raised if the wakeup timer has hit the specified threshold | + +## INTR_TEST +Interrupt Test Register +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "wkup_timer_expired", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "wdog_timer_bark", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 200}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------|:----------------------------------------------| +| 31:2 | | | | Reserved | +| 1 | wo | x | wdog_timer_bark | Write 1 to force wdog_timer_bark interrupt | +| 0 | wo | x | wkup_timer_expired | Write 1 to force wkup_timer_expired interrupt | + +## WKUP_CAUSE +Wakeup request status +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "cause", "bits": 1, "attr": ["rw0c"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw0c | 0x0 | cause | AON timer requested wakeup, write 0 to clear | + diff --git a/docs/um/carfield_full_doc.pdf b/docs/um/carfield_full_doc.pdf new file mode 100644 index 0000000000000000000000000000000000000000..6a93a77ad525185b8d1ab59a90eacdf432f6d05c GIT binary patch literal 1215028 zcma%iW0Yk?CS}X0~hc^thQ`N`a z*uSO9!=TE9TiS?U5EW!cA&YI<-exUO#%goMDPp)DgQYimt-u$TWcNZEX=RdCpTmJq zyrX}U^g+{|>r{nrseGB6@UJ|gzZQL}naYA(HiKc!eIX|bM#C4Jf%e`pgsw4xM9LbJFS*N-G<0GLd z$G)-$OZ!SpkF_hi^KV%-K^#qk1=j5h+HICtAWLMO0D~VVnnN)yW=HS7Gn7-%)G@I=j5znW^jXe2IQq^yUex6xW*4EU0|$OE7OYfEppR#Q%z(**(6wY$ zD~0u<>AqTw1c@ZNR0+~Bqu2&AlL{{Ucb@Eoij%)1cn$-F7Puwj?2&teBRX=siqmv< zhUbxx+8)f=t1^K};(K97pcE{aBd}lOEDTIDRy@1CUx-cMXqaw%>%Dn3Ffjq!Z^Ld&U=)y+wqLPx+BA&zCwMjN>xl5J}7@yL8g76vlnH(=r)Zv*q0GOa8O?T%tU>kh*2Xw zGRWa562i)1^sNf1d`zSXuzqxMj~(7)05@6c)y+B7r@pW7g2IJyJQ=v&uQ5K;ujyMm!jBO5`a_rrA znMI068-*V%k{9keQ;a{)@6yF$RSXs0am)X&qA#-@n&P4xV|EBnP;%-u+6KN^`W5{8AJ z)#-bZ5g^NA?cwXc&)}NQ72Q{CN0tRd*4T8UcB5UUkEUG1J0W%EJC~4ruRdx<7jB0i zN4omd_Zm?7hP<~k4uJI~J$C&1xyP~9E}=;}pnaNyjyelNs`pZIDpuQ9J{}ntm%K{x zV&c8BE!W^2Eoq$%edCb4;;gJ`{nIObF^aGM5P;a`*t6cFxI&=+|0~%1d zS!AxW`E^wAH#Kal-Y`}!KsvCp=-ifven5fKd2>)yWiXn3*6_#t+VX!!uhHh$fHJi+ z`EQN>w*H~&?419Ryfd@>tGusI+U>C+{Mh!+5u&eEb_(keNEiUN4cvr!R=eLOk(1}W z|DczSOf1T?48ONS6eV*58Fx!nNzE}I$;;pA5riXpPY52mR)?Yg3N!BsukokD>%j}l z@t+Sy*$zz`*s+ZVA1U3D_K|$sxqe-y7fLrLY=n*zC#>{;%~uRlUpzxzeZI8jfZH;Z z6C&WvgRap;&h{pR7$D~R@O?IZeo#1-qnM#Plk1oXMSyoBY4P!!|Doqz&=~5G-lvE- z`S#_dCJsEKAovHMi3?CST|jsFdsbihBbd*+e*Cpj`~jFVUo3Den5~&$hG!ZWws?h1 zf6h4Czr`r)fuLwI(@!QMXT_w8U#@gE$8lR|lkSwSvr_@T&Y8XR8|91uc3; z^X}$IdGm@|?tI#yizl{3G25A-igKjjE*gGItqpx^x~p;&?+B0J$w|a&P?=T%3VJLB zw4LWE>|hAxu9y{I=_Nmix$By-8FDvRSwZJaP94XZqvmbV%cU#T*$%GHBX^~~ZS3pn z`!+KS)O4%d7e>9P9o?>KAAv$Fh}&)LlSEcv^}tbb{yQ|i)(R=|midIEB__5((YU-) z+?*wzK1KVNnTulrHaeCS>Jd@5ccZ*9mc_8)tsN zj~hPjO>y%UXgAC(H8%-?ew3A}W`a#M>p<_7IzFxr-`YKgg;s}3^Adz;no{j%T)%xc z>a%K)_la|iEHziLptSPAOOGo*YWs#YuYi1eKq+coQotNKLgLpZt@@_hmh%R^V5~%p zYeU$$9H>PhlHe1uo37`Z@0zPSdKLp;)pOy`@aE)@hc4`z&Pluryq$9LsZvzJ&}hjb ztMU4;__UxDX?+j*QFq-(^#>%ekB^VYSlVLA^R( zEo9e)E6A#Pt+nS|bgbuy4%%<1r_MJT!-oo0b@Bk*=U&aYWh(}VF%9`%+G;>pG%H$< z;8Kba{lsRP(@Rs!o+Z9|O`@tczcN)lfo)|ZQz}#!d9;uIxT*erAL@EQXeysW>O-C1 zRssxDK2*)=%R~_~xtq5deYmM(y9|j@)X%N-Mj{l_rl6;e`NUM52C&k9dJN;vx^dJ6 zT0Rz%QfO0AUH5ZW(TpCAre^7Epq6M1^D5XXqG9KoX{rUd7S#iPkp@1QG>KC!IjT3} z%G(%Z^1jq=_oOQhZGmZR1Rs-{wmlrmG$QMla1u9*R5Va7d9pX*D%%+3Q{JsRc*E`l zcG9G4Nu4$oXO3rg-eo`Wz1m^gaAcC^f$Yf&&YdQH$joubw@}Ux)tAh>i&wk#?8H=y+(eS*Y;#UYMx z;%Yp60R^zj-j+AI)Q?{{pE!Qp$ud+^9HpVM7c+22Ip;DyHt>mJEjK@GH93m3C_^KA zcs`dg=}>gARD;H=LZ$x3yd8{Cnpm# z0g>;CMFZ}-lAd*Np5%Nbr-99$d{R+lth;L046O#e5f_22ILfQUCOHlrENFAVF{}aGOw)oZ~l61 z{wi+jgtWtK1-5sX>Wqmdy#hthQN86l-n5ClJ<6u=D7}WuQj5+n1o<;!cKCyN@dxKj zeGsQ*x~mr?ZldW2PJ1t6mLH4#pvTW@)a_q3i-SP1{!{3`2Go!ovE~#`jbYf7+%ig? zwM&sBcM6UE2I4t14dWx$X7U$g+?My|aOw?k@ztZJaU>o=^GLDE;UxRuY$|f&R_73P z7v!rI90g$7OCNV7&m>XNu4QIO%P3C;9BiDB{w&^@GaIfoeg2gU#CNYzv6BP=N~9cM zKSmneZF}#|=)SGApSH|}l)l6d9=Ce7%?g8;Qjf(`mcCmInq2`VKaRSM=#AT%+DEJ; zc1@Lth(yAi&$6nQgh*_>M}dvWZ43Qcodj*vFipEkY*($%>LA8IpDTjHLu5x{+Y<#} zT|r|F&@^fcUaIdPR#KZk0!_+qtYsQkFRWuZqP%UzI_Zec>Fh+`;*I&Fj~mr0#2n?- zhj?}k(RM4nd*;bPGz2zhwS*cBwA9oR$hbwh+M%Jj7nG_k_h#0q$^dK|%;sGJ@plH8 z(1{n0tIm+}I6Jk8At_lZ3lWK%-`?_j(XS><&D~v#hLjyjdy*y7T(cJ8H(xicTI;?L z;hy;L!t0BqV}zbSbvGL4$^_O>b{Qz2LLC+f9}Oz)(m9df%K+V0CShI7PaP8ZQyG}R zQKdJeYElr2&q1}_({?mnv`${QuC5l?R_o&ksDjzxX$K2G7S!r7fI?maX2_ zhw&P94=m&Pi1cc`5@ZF?&mLXAw7bWrE&VM$h}9lAvr!ofAjqOdP|3usk{YPmMB9;N zUeM66!-pC0q=&tba1Wgp$us~TXe$z7sx+FIKccpn@9m_k3YXywedyDrwX~EbxDYuy zPYYj@-Nk-;u19G8#`e44$LypBsD|kC8ne5`>qV=uZMB> ziS$5*f1~rP%>S9rbF%!a&P&_BvBC6Sy`g*pAKd%>5QPJ22I_zvv0Wjw%lzZE^3)?! zPqOAhGpu&%kECJ&Jsyb<^FmFTQ2+Z2YZc*17<+P^-jeUr)w`#o$G^I{2j_Q=e-bRI zK}6By&71<5PQ>A)yW|?qw0{?JzLroSp@6Ntp3+?4@oKL>b*>|t34q9>n(42L3EO&aLZp|n@wIGWE9wH$n1sz%21DdKoDJh-4 zp`aPeT*^M+Og9+>$VVXaS3nH2;I+r%0pnk!EALAKfDOieVeyZ)>Ks}@a{(u=ggtMe zCxrKPwA1sRdDbzWHG6*{nJ#eBhZ9OIJxHL>?-a=6$( z>{D(0szs?!j>6lvHSpbJ~pFLr#l?o6P;;virix=f!`{c9fA?584o@*?UXG zo!9t`iW{Z4aatg9k_jR*$5a!%Su9p?NOLiP#txZCrOtn3+AIfz?U(2BVzJo7LS&kp z2^xz87!#n&y#O4z(opn3sYB&y#9?#fG5E;Ir~+dgw@K2#ZVtk1jaw9l2m?zNXXN?e zHU?E2P_tpj)#|)iY`)=ZA;BZ3YSBE_dNXr~8Ll87-VpfEhfSk{lAVZzO;1J1%2upM zk13&2BVoLKQ}WWghJLL!gol(~cR~5A*d*{R+T~6w7%Z3_pIO6NpUf8wkpxu%!Ef{g zJyC5NHlPL^5de>Rz;(`xUGunwPOx6}SJO z+|#k(y>uoGEwGcVX^E4X(IbA4aVUB&sgLk}BAl;P4`>w&(yk4Ln{lC<$)I{X*HOUx^>iwngGb}X^_zdP^Jc!P1mKFWmU&=%66)D7@>rkR%ToJ zLH5u3}ak1f`?mF?&PscVy5ftcTn^4rSTo-d=Ow~ zp(51@HF2wGY>~=1g1fMhFAAEvg;}Lk^fRfIKbAmIcY;#8Q|8&y0dFSp<^0}#8Rp$T zc8q)Ygc{YHUB#!Zybf6kBM&bm%ax@oa8O6{rPVs?L`!VQZ{pX|*devh1Sa9{A0u6= z30}P}2f{X3J!7!eK8rMc#gQlrG1g=G?>!qCxNRh3$0$M7+=Spn}YFa*{ zsLfO^4z&Lfg{k1iHt(P%QF8^98ri4%SfML4BV$j~aj=+9(EH~t+o!}HVhcQ=wp{8* zrtf@6IQefWe-s|+Z0mp{?jBbo5RT&}#Jib&`aSd##*3yZR*WP%S6%e?yOJ-UDF>9& zf3rDoGWKfE7(wmpM0V840P6pbLJ?bq-={WsV1vWiPmK<%cHu#irH3r z9T|YOdTpavk-;GN>fn2D@V{&=KJ7GwH}I`l+`k%MZqwG@7Q4FnI=}8`-=CvwFi2Ci zmVDN+iy=Wna z?dtrfJ!q$cBx}3-JxRBY)gSa#Ta6Hc`6Bbni)~JYPd9ZY5eB(J6u87C2~W z!kE7*tE$e5cmX_CoZnt^k4)ryz5ejFeE_#HBd!CErl1yT7H29-d_x;uH_}TZbT^||DzQgZR z2|GxF^KztsXo9g*7=fudzm25@y%4FUB*v{lHR&vqx~#V}0?DoAphR$>rDK9FAL>Gl zzW0D8f*9fY>e*5l5W|?sZX)ng;G!G#rnEQ`Gw8(x>%t97Sy$xaIj3h@ecSuJ9NMW3W z??h?a*4)xGTaw_2EAM}`OF!Y|3-P1lKV+gZ7q{BEj@?Vt)}BfCCWb+z<5vGBm%2l% zHA+J*x#eD2Wp&7VRc(z8f$rezH)ZQBVx1)#Sjva^sIsA@rN#c6saBKkN}@G#M{1%e ztK;`u&|0y4D(^rY%Tv^%Jrbgfzd{(TT>IcuqPq4Bx);e$cm+pe`A@GFYK_ANm4Lo?lir|25o)+?pQGgz<^sGKT0E$D%XV-&l^&?&1P8MIyX97>BlscZRNC_B<~iA(jjNZNv~@CkGoJEoRLtqKs4r3$A7tj_Mt@| zT^`9IVfQ#3MVUg+w35n}^F#h<2PGDZV2|Y9Gs%7+7NH^mS8Jyr#Gb$X<6o*zp7~oj z7OYxWS_536>#0vytsi3qVqeOMt~M*+{wXI)s=gbiK+0wwui_xfMy+H6EYiU zu#^Jk55Wa$xL^ksOSPWu^;So+BW&DA-$m)4y(M!9gQt{$L0CmKQ-QIHW9|SH)JG0B z9av-rqe_`Ir_w{=M1nMz+dtPQYWt{r&SU1_KG0mpfHe+SvQj}ZRf8^%9H?o~V;OzGu~tdw1B>E#HR7#O}&wNB111dJR^ zjQ>a0mYJP}^`Ad9CjZFB;j|!zUA>_C%FyAcC5YDl5Dwta6%l|7EBd`Hd`<&Q{EJOt zN#OSCt~=`_)!6N5ADHC)Qs${v)23dd(kqh{OM4TP-{^O;EcE75mBxlc{$sb~npUdp z>k_IcfbDc;ko~HilK!EYl21KLSrj*=DL0Xg&6GCQSZBqtj7_C?TCwWR`Q5~CO8SN~ z#Ja2>FC+N;3#S-!fwTB#SniGR zO|T#?hw6+Z1s7FF?wDaLKgHZEeSv-O-mhY~*u4NQlXZ5xNz{+sdd}g55{_65qZZE} zO@ckSR7V^_uIt$HLUByifmWtN5^a03l<(5G6%-^3{Wig-dFE}ps=nn`94m)1y_!e;rdQbLkC>;*6H{HcREj7T=C z1Y?rAq6se8J%^k?EAvbRD54sFWCgBz;#SwBbb*K_SlzV)UPjrBnFKx!XeqS+@B;K& zc+P}0k&Q7&7;qcZIt!d2Q3NK;sK2?m{rYZ z@9Jh;1gK7=I74z(wJAt^@!?&Br@mruLz%g(^v_{GIEf9Lh_G{5ij+eO7u zoWJkuGoSIx#MaiQi?{RJYu7q__n@i0y}ys&lh51X)0fxl%|Xc#yyWNg>EZ=9PG@*= zqg|PU4GZ}?Y^A5%=J}g?jo%Y?WwG(Reze%*N~bzb4CjBcEvhjdA!fUO*<~l6Z63Gkddw7%(F_rW zk<#~9l*qN@Ji+h5*N_>uK_PahH)$DkozSLFbA}BCgWwbS)LE-KS-D7QO9BE!wfn7b zzpvQ*%AULLE+=c<|CO&5WQZ$4R_hiM-kBFR;ZB9EGke~BQ?v;l`_H*BAXZMmBHW z0)tL9=sq{p-Dew~0|*F#gVBA?Lg)^G&_Bl}iWww0GTb!SM?Td0bw1QdC^SfIY@N;t z$7^#jldh*fflWI;NO^4tuAUaFgtuFNYP4C{YcEpRg6$SqbwOLahJF{u!0QSe8*X@H zvz#s?k3NFWvbc}U}SVz0DO}_P-ut56D@c}h7k4SEj@4K~{u+(BP5kOM9 zC;bu^Nuxx^2#}64kyS2zj?K7d&hwGW@fq4n2FuK0T5%52v$AEC(WaKpO#A?*ceY#HrQrDTYg&)uhEixio#kz274ff$u)V7M| z$a|}8AnYH8!W4T2GZJ{`q%q5WiNxTU6o0+e8ZpL6QI%CS=?vE1qDR3h_ z(SWHP{aX!~mJj=3ki6CkREw}-0&TAt>MCzqJh`kdYKDn84`CPS(LM`4$kfDRf)Uxa&JNf*yK3Ej-KPBl z&H3p2cRuZnVyD!ft|?Sq=Mfp}DBmQQp0e8)PQBsvVc;~*!@PB)t?PbVlCf}SAFCf5 z?C=>Dwy?6ppjw0B;O4-YHFiDy*g0Sm77s{f9ItW1jtm8VQ73Y34NR~hn6)}WFz;`@ zqe3vN^!s3J?}v#s#jw?B_I6&u>Z1?SXh8m4_=?m=XVYr}=y;+{UD`}A*NO7+Mw#06 z>R>D#1nS6s)<^5nX^I`CTab(&KO~x7d)iec&=jnpj<1*w*F|sAX@cvuY174<-usO* zWtJ!;&km!GrNbdyal@Iq^ax?Pi?0zW0!Gv+ge{F&QA}alL@<@e#34m6h3OT<@RRVt z@}m{26~Lc@OwE1{=0z*kD1hf25|zW6U=CDkfLD11mwz*u{bq0&JoU{>tj7$~SgAuG zoe}UAj2XOEux9|crcNh3wz~vChhS#c7=$f2Z51K?WY(!R2vc!+gD}CYR;LNp#y3~M z9cJp(se{RT;%dO@*9cptP8HmFT1a3>-EkXYdM2Q{o0Y&Bzjo_mDm2vn%_(k3Gw=pB zo}0;dwR2~R$ycojo|h|L5A$T5I$PWiS`Rb&f@J2BQxnJ_T(4s{+1u_j{RT0BnfMT7 zeq9#H9K{%GZa}051bdmMk|vQ$*rtaR^XDK05q8uqlqI>iK9mS{^di!dp(|o~93%sL zDTumMkltj_ZYG|mx)g9PTubv)33k*kkQF6U&$uoui^TX`2V@xYkS*SNM3M~v$Ce%r ztc@(rwoig>yj8?#vpX)(NNCLksFMZ315#E8`5TtCZ+z}xe3?X_;2GF+8i#n8)L%GMl#zQRMfuc|62N*OhdHJ%=U50NvgN1fY>axYlBTSZ=68$U|w8 zOATcvxOGNnMWHAA5lJ}!h&zg5y9C80$LOfXb}Z4a7cbZ$TyjZFZ!RdCCgT-i$KlMB zy1iH;6~~{<_0&BM#0c(LBxdW5;yX{H_ZsVti5WM&xE=Qr-&W?g1tWF} z@%>z@e>^vuhIyLk8|U{o4luL!(emriPHfVC^v_F*2ROX%5lO#qx0$;?<@mq2<&an| zTS1`g&%Xq|q4K_O$vnD6i{M^Di2-p>&KA4;W+6Mv;qbFx*ALf_jZpCqUZ|R$; zWa>8z*&0j{F1aQa_eB6Yr+YQnTr8{XUM{Y4PHy=FXlYo#al@DiL-I9g^c5qShQ{8AvPlCb2k z<1j2CNc-yT;MD_^u|gZ znFCH?!Ku#HH@YPFupAf4=1{G|oMU2tT@qa96#Xo`2rfA%4)^IcU-^q^j$^5@>@J7G z&wc_v`WO*hYrNq=En`ycd#O&U~Mjg(sTAnC_wG*TqL zRbLfoK2T<_`C1Z`2BQ!KK*RE-^;M3dKrg*@0ky$hkc7oA60`{zfYv$zf zQGe39o-==$6h1XOws>Q_B*28EQu5qQuOGrz;l7 zqj7&joNGX@ACtP(LL0|T`>8;34@Qs4{r>?6vmdrWxLdP#Oh>Bc2+UO68Jc(N<{;ed zx_z-T29;91d){7ptDSIoM&d=}ad@YVNInW64RoQ?mf}9`*7@||Y*vm9jDT986ofi6se@h}wh2Ob3aq#A8G?pGD-T`@|*UX__Ma zOTqsD%qjE-ATTAUjlK00#B_k*T^E1E>E!W4qvU#8;jO9q%WcXt_x}M3r^0eu%xVdZ zd~Ob*oa}Ry5opp%RO<{k)-ek8+W5#=kYS_GXJfN-rfxZekQ+2pX&ej8kEJ0Tb3*X3 z?BhRg;mx5~G(!-bC>2RT7RBX6GF?7jV^$C%`=v#ze}z=AdX}^!fy!E>kVHnG#1*-k8*W}k#Oe)QCC%cc^jWEM=dDDwXIYb&vg;4(u%I;>9hoY zXmaeb&MLaaA{v*)-Jh#wP(+iv09m%HRViA{7T$y27(n$?q^ob!Cak;z+Km5I?FtezRp6NRexh zhW?~fj>5!i`13c)o4s~>DaRT;uBKS11A0GUKsr7Vs!<9OOoZ?X z+R$C3`GC7kN7~`iNQbq@Z|qb09zp6_2|}(21tdRZD@uJ?4F;PI|HH&wZr;S>BBtf8 zJ~p<+sD)N;p-nk@ba<2iqN@;XTbv}>K1R6&=~s7EoPqA8Da&L_f0vx11+#u_;o|}i z6+H3xyA_=UTI32$oFAKJu+W9KeQXU3Ucv{=mKS3o4n(!LNXB)D725nue4z-8fRe5^ z6I5ITUVnV{d0H$m&RJqN?V|eV0B&Yjn`?qAkVfnAv6>R*JG&k2_d*d1!<>|VmU}{{laqnDP@+uZ(3z(A0 z1ZtUWLjDx3fE4r3xf>KE4|6_OZQRzNc*Fp;L1UO|p`*vyk8%$@->x67zK{m}L2i_| zJ9IZbcscF9m`lqiMjF3+p1kE&PBg4TR-vg*4<(hx!mVz!e+tpNj~-YDWaeuFNJ{l@ z&%p2)fUItDLB}zQIv}wc80OrKVKltWPIo6m?R!3c2B5@D{u>o$WBm_RnCYLRjTh^( zaSi`fMC=ddZ&1?wow~AuPg#}fQXQ*0HEh7YDhvPolD1_q{K=%b7m!G`^d=Sv+BvYF zU<;mjxh3aD^qKTW`KIT1^E1M_XLvYn=#D=8@@Pwj91IlE#Qpia5UjD?TZ%qo26ywz z3#}h7l)=x#jgVI_J2~2(BAUK?I6N{gZb!2lGH)J^i*NXki;wKE?KOvOaL&Nl@vhfM zO;l_3ty^R_TXn^BS`WOxOAp?ZNOcHUj1^k@4ZXbBuW*gTv&WH)eOe3RzWhJtEWX+J zCogYkVzLwhnkFnmVRi+hIM6H!Grx;rS!ScnWFIxEC4Vw3F=iSGx6H9L<;A|(cj+U9 zA^9*g40u`?9)wv;QNd`!^TozR=Pgsi7KwZDR~h^9U!<){zvb@gO5ms2riVUD(3QXC zp1qQ0UO_2u2D_v(hMs3p!uU$w?!*dj%}%>2fjF(OJra-c!mmC0#^%0p^IkAFr!75@ zn)eCLn4vuyb7@mnucJ&}Se!PkC!@eM9?86P$wW}gCe;2ei!tBRch)wR(sbB#2+nB} z6n9;vlW(01c)5VgK?}e;8omnvsIBCcmG>3ULQJcIS9TNgpif`Pd5qk!@T6VOsF?CN z8Y#yPWA*l;0wY{OO^?mDd06PJy)g1|VP-~SG3f=vuK(@+Z0&a%?P*hMP*=cgV`4CL-S@x($3R=J^ zU6vIb0=zrRc5wx;+2PsjHK9{w9^RmARw^8jQea}JD(86>*p>Gn5Z!L0OSMxX=?6FR zQ)XU6Dc$UW7sL}Eu#=^56e-eor9CFtgMA>!)YYwC-112}!;)e4QV+*?nf;V0Ej~$Z zAWfHuhMm_-x5yNi@d6`*AxNMGl6g3-VkqMYzC}mi1Y51}w4oH`3ZV@TVB4>&wK%ml zz=X$YyX{pO-$YQ$jO1oahLbY|QJm9G(9pL3FPc~?Q-OO^PsK)0Va0&k#QvZRPRJU@ zReY4uCk=sK)a)RTyy-x!>RcObfn#p6605^Qk|{E4dU=*f)La*>nLr>`)FF286fcS@ zK#(U81(rET6LP6$rnNvGkaaxJ(9(pwx-y`nmLI_7kx3-GR!BL&TtPlgO$|1H7gJ}r znu99qVTO9de^416W`Hw%>ME_4mx>zky#oIjfu$}H)Eufcl0FixG+Rz^-88o`Zl_ar z_@a$z*a+yLCC*&O5(Dbf7-zgyXP`0)!h;#}#EBWj-At}6Oza8Nj-HeN%f^MAgtFed z^^lI5D)9<#J4sEo?;$gQ!7wz>V|8IKZVsr|!lH`*&Ue=~JtA2}XlA;|-qT&r-O#AN zdh*CFen@BwXv)&E72&Ff8&q5^KU%SM-m{N#{Ju)(Oxf*W=0qd2*shvhlV0f;|11l1 zGL#Fr(=iOH8cKsW>(Qbsu0hIahHl$ct%(BNaJeY5HZ*RkCJ@NVN$Jv~m`Hon*S9C5 z`@Ag{g)l_a=B93)L}>d_pPG&e#2^udp1I^|s{ywC=7W^>fz*0Q*b895N z{(!mU29qOpouRG=`GC74c26A2WrJ&t@cQRP&&Jlq@`jd* zQV@w1Vk(P0ePaBUO~mHg6^4IkJt83`MYUSI#h3RbKfjO)0Fq%ydJIM=i{&9F$TFgTcOvRu}4O&YqTV zbEspeYCDCItCa$fi)A?Kfk(y4iAmUdK1uuF>XGLOd%}oCY=Kpqer7=nS%`}NJW;f4!Xy-xGwjgg=9{>f)_zU zjKqagkB3PNoRtC0v;Y>!$>cv)1~+fsQ?;p{r3Ao91uQzPka5xs2ObV_IOI!pPJk`{ zHrl*x(yUzGjp(y{(Ga9PtYHD9_TWL%>;;08VNhsc5i>3W_q$3n6*A7sZ!lM-ep<~f z^HipGHIM2^WA&v9tSF(-ppxnU|BZ}+v}%GV5bi57Kf7WLqLi8FdI$=~-gYW&Rit3AHjE#t&(a40SVNiVwJ}QM9S+V-gexf9U%y8() zW&-~wu#O}@d|f#%T8qJ^iQOch#SzQsoF}C3hT)J_Z+12Azz0j+xIvOPXHVcR5gb$EF(2>pk={DK1Hwej3a0Q9N*|dx` z+EY0c&kKGy6LUdQ2XLgzbH_VD60Bpf8j)>&d5s+OT1zy$H8j~ z3YCV9vUf~LA9%4IKCPA>kUBV9%S+sx1%>t-tyiT?JJ9MNO^%qqYnws`S74GUHSEkY z{Xjy)!j#a?eUCu3>^t>%9FD`*VUE60mVW8{dw8LK^^m>YR3v_c#MD6Tsw{cL?{iLr z!}lJf#`BNtLK|p~z_wPW({Ly;`Oy9`Ia~f z#o1m7W83yiQ!4U4A?R+r6z=4i<^ZVW3H{vLJQ?Pu>GkyAfSFnzSJGx+aA`T@nXt5x ziyD#=5!g18FtN+F(F23p{mQqEs8GzFa)z^`f@e-ANtl>*=cMsIhJ9iBUto5Y5jc-y z0VpR=y9^UM5zapST*0lZBr!D)OU<4WqOqXk(U=NqDd5VU;%49zwj;z6d( zpM%g5omkruFWiD*n!nh`EF3rEtl~OW@@wjH`~4@rmx3OETmx!W(vF^NO+E>W#6Jm=_OXK{;`)9v-ATK_WBd5}Y&< zwct&%-K{tjydTN{vefQ|1J&P84r(V zX-(cSBm{$OrkLT5j%?&;l4 zTay)rinc6Jb2;BM!nHf$Zo)_`Y8XhG3t3bKcWkLDA`=2NLyaKI0yZvE<9G{P6H!^b znYBJs;@OQ9C?h3Tx59YmsS!tWC3Sgp4|PS)x`wD(&u0T!Z88V~Is^2}w9SBn?uM%-l1l&T4VD!?mFnq=CBX+%P6GFDFYwQfmov8RNP~`=2j4|5hE&;*zsN8s zk*V}jApG@4=6cSBo5d`_(iWWYV={Z^jcUNG1A$PH+_e^1xe~PARHX+mR0UK<7o|%= zs!6%|NN}yaXjI45%9v8EEP24g<8URn}{g9QvcgMfuMj1T;@z6 zejz+3Gt&*7j=Bgy)dkVutcAan4E8sLxz_|5tqNW~M3fJd#`vOrX<2ng0u0Tt-`Rsm zn-*LN-Vc%9&2W?Io7Gazp-vycJQ7r6<{8}xy3x}gsi>^BF%9mT2TxUwk#XN74{L37g?U9x3HXvs=?sc^ZPiV}QdG|GURN%C^GCb6 z#7~6KHAxQK#gafZ#)vqOz6^owhN>Efn1vkl7n+BY$tHni6=PF}F08dM4bl*si7P3r zWh|COEPw>5CZ+-X=w(?&z2K552FBW{%1q{yb9;69_}I4B=Big~W#yn5WnMuI4#*PS zL@D#xU6lh7)0dv}NZKeJ(NQK*#lw*ZQ-cWIzC;^O^55|98F>pI%Qvwv z{GH7GU#1&tJ)g(!Js(M3e*7*ypT%7N2>Eslh!3;orfx`c6zRBgd_BZ4`Wne-{y)av zIlPi!UEiMAb|#tFHYc`?6&n-Vnb@{%+t$RklZidCe{1%2&Ufvz_xaAX|EtwqT~*zy z*W0z;e(t9}J&Y$>?cQF9TYZI}IG(;5{W+KK9x)nv=QDyA<)wHJl6rZxdzuh`i@eK8 zBG&!dv#*+Z9n-e_H`Tz8C_Ret3@^;Mm&W_UQ&jAngrJ*^p2n6>^kJ6gG~g=7Y-7V?yI z0YXWpban;O-X-~wWBq5UUzaNeb~__R-rcdL?@5|(!-b-DHh2e%?Xb*n5_}Twr#M-B zGIbotIk>-W=ZL-BG`w?ZG3iS8TSjLW>x{R?cEKPFmn&g~YxQ}{L}B|@91G2J0?zIu zmzb%It(3qTiZ+71wnJrOzL$JN2-H| zPD<5B?fePK1d!Bcf6k;>nQ%8G=c5iSs$(?r=8rp%F{cv*QUTGVO{h2FiD;X z@W&s^q>!JuxuT7CtT%n58pKey9gMQ}JWQ%@H8i+?4r&-;ge|uA?UJ z-8WBlmb+^2=iK7+w7}Ivh!|3KC{%moK(76cT2v+__nrEy;@@JVtoSwTMk)83k}{K1 zx2)zknA99NE`>Dq1&Of3O1&EA=M-5b_J7=)R4&2~EfIXICg-rV93OtMZQ>v?Gpgib zVE&9N2On);3mUX;?Ivi}Iat1IdlayPk(=-hWDj4jrfQhs;Y4Mn`lL}TF0}XoLnxV; z#<+*Y)>25?*XT9GvXv0;P87j{8i-kh=uq{IQSSyVdQvsc0`K9K$XllHM9>iLN_~Q1 zekZ-7tI0&|*BYMxT#?AIrQ!}iYg5F*{B`i&yX418{0eUKrfo}xGK@^D0+xdIPr8Sq zC()&1vO}7s_!-=$tTGdYUvmmy7!D`Zq(QaH5MbJ1EhVic*S7v~BY#vBYRXvP*`k91 zB^T$M%{t4i$u`kaYMzNVTwrqL?v>WCH*JZ`(BH}WS=bW|^l33Es}5gV6mZcR{E)JP zWj9)_H@Rbdf>|P(Kwiops7M6G4zOzv?3ZuEf9!-lKLHWC|?Excis@#N1X z+ZTjvep-plV|(M(KB274cU%~CWC4skQ7W7mF<~+#^@zDeQ_Hk8GU;C&a8M>M&3-(O ze-?Nvocw!eW@Y-%@HQ4U_J5h*Ru{0NLtT64_+zz}e0;=~(^5AjwO1tSEQ&I>xvJ^h zy>m20!7vT~<_t&>txTg7_{r7w$T9rJ1pkTPM0kmW&+6zqdVQhC@fh+q1>yT0k^hq( zN~#xCI%I!Y0K<+f7^z2MZP)Gj6-#I#4cTJjm8$#qZh+z=h$F#_ZD44G*3*gZQkBG} zbmZ*^%ZIc6TFv-~iO<)b?DmP<`UvKZOsJCUYG%wjcfk&3Ak9Wo-Aa;YZKU2EWvBZpzr z0Z>mgM=suxsvoX)s%<(L^N;mVG<9996z=X-s0yQ+5yRvxb37Z!xvF`N;v7ho3cn}? zlVi{dYAG6N!Ig|u3trGNr{|3TzcJ3i26k3TG4R%H*Arw) zS5P(+B_sMK5DEKQ_KJ!SMV?EfX_^tm$q4(MLUaZdvXhL9q^q0^&v!>ELDVMN@(4?2 z)jV1jr79Ulg+?cZ-#kQL8_MlhO+Qc9f;W>FGisN20CS-?Xj{qo`el?m<*-{Vb{6am z>w`r&&;!ZN&pFYx5AL5`+ihQS5=zBPC>h&vc~ip|bW%|w$wN}*qQ;BqJE4k3okAlw zU4t#!;$J-G@6(HEgq6l8-p2%)b@hW0cUw|}yvC=@BFrt7d6Jh_*6S!h$K3}R@sWUe z1sSZLc}CB&`ay(j+6RjJygVdx)s0JA@l8ibyQPOibP7{aopK0n&)z|WKL8(L@XGT5 zo|=bFX1vADLXbXHKdctuPS+l~Wsa1e3Z3!)weu#OFgs-_S5z`(wd|Iyii1sCPFbSg zpB^;@C$e_kfv5JNH<`EGTN6Pf@n>GatLJ12rbP`Os}4#|&qC>BmjMb|ZQ&MuWmhe{ z1Rc{Zg$PxNz{sP9q2H3pn^nVPxPW~v)}!-CYRKbz#8e8GMQ zId!>CAU&bl&p2`h;nhe7yMM-9^MIWnnbJHHZ?4im#?x6ZoW>{m%|d8*3_YM#pR6_O zbGZ0mYjp0iJyUlHdSa`J<*%We38>#z|2%DU#jE2MVRJbgC5ndp+5%Gp_s8Y!&eKWU zb7jnYu&>BX+eTez9hBZC$Br}e4}-VRUBjG*XTt)l+HgK@GI=fnLmx8&_x1igfk=DO z($aiYN}(24tfgV{7pli*m(dezQqv=pV96_LJdg`sbS8d(Vh_OR<1sV=MUr1=!0ruF z03l{;5t-7SYT?{EuU!m*!C!#zxo8WZI&@3G46~S=3SuHHIl#C3Dm*!#B_6HKbAEz# zTs8Ym9%EESr2^pn5P;PrKlc$!IiVxOQqkf?E5f4$6Y6F(WqA9?CKZh8ouxc+Nq^#= zV_*qVEA;#GxI-Xh5vsk0WL<4|BDh}`=9xU$xPWA{1$}Z$9D`s^H+RD z^m`C+$UlCKknPZhSCO>oclpraFPPC_ji23D6^^Dh`cd`NAW(LPZk0Hv0fnVzA_ufY zL78k4)vd{~vUW|mRl9%yvZ1D+be?Jw)^VbWKzhm=uE_qL{bv|P0Yd1xyzWpFqO^)ty+;0p|^QZ*k zvOEhMN=D6G!BHdMKok7{MqSHE+EOk@JqXq9JHG$E@l8)SfAHUBRdGUw3RZ&Gq@ zT~P|x`LRD>%`s1v$k5M9H74^K1KU*)ifFD96%IYAU*qa$#L2Cs@cR@zn+a3vIcC^Q z&!dt9RN0FxYJ)#b?n3XGt_Or<@kkqc!f))O;XMoP72rGzq7wM5L#v> z^AMXGf0&2SU68RFAan!``?oF6z-rBY9Zs)0{@!TW88B-L40h%LCXjc8bsS>BLb18o7KI7?UvjNWv4&xV`M|r1B>Q*HFittb^^N0q z#rJ!c7%lg*FvXOUPYj$E6wtOvw(w5%xq zZv)&b)Y!?!X$OQPN1BMt`t)8b#sVQXrjaP{Xz}P5=#-$@KWAaYD3tSVe&q5bxr9Le z*<$4_jhXwS@^u>&$1=>;559`kb`9?X<$zGD5$*!?YQC>oP_&4&8R3vzbfsBH+VqMN z9#IP3NR^jih}!Z?LV{8r6mp;*{`X==ZYQ{{qFU}!nnc~aSVPbvg_SI9PelVU!yxMb z>hM|V(pepqW`t%6G5)@~fcUzpTE4P7bl6+r5Tvbu$gwRo>|7OY{OIU~=WbXW=WZkt zq9!9R^!s3n{04yAUFBJo%O z9d(y=70S&_j(xnZRavx6s3jBE3sL%apk>gBo4)CFd?r13L6}}F(VY;)aC(`XpD#1i zcNwgKyu5&+n&1blR9i8YUBjRR)JQfNEPwx4noP9g99SJO(==koIidCNi4*FZZxrRp znuu2cEMs?@nVq;@oMwbiAa8qvLsV79a?A@OLfhqc%t4OPbCc+Dky8B1`W3Za$L4vy zqDR+TJB>pQcO`BZmI5`JrHi6m-!YO4QfL)cuZOT&T0Y+&=P$+|uX6aew%%U$#Xl}; z_y@8Y*|Hg-dr}yhi*2d=_vTr~N;r4d@Xr06N?O>U}*Zt*We|q}L zC_0tv^A3n0cy72YdwP|66|U;bg6tOxP6W3w0jw-=ou;4_ICR?nVcVSZMo`xet38|;U}=I`MhuO z<@NUN@pA6zd?@94+bVIk9W^xTTz9CnBcLll0eBaVuQ{@qVQcDn|n%c|6(uJicju=vB+WGfd|L3b-~aLa$U!v$%{{J*lN-7$SWj5i@sapeJ+bB zuMTNiC=SeB_>BBg8n_1z*%7e=;>?VU6x1_y&63S-z)Q0i1DJhgc7 zG5xQZ;GubVzojTTwa7g*yKz^77^czLvUU_-H_IJ1KXIvo?`SJwM*KF`&=qANa2$`w zQO2o5NdKxPWK53P@cc`+GqV^S?k1Vcjfa>rqToqGOLs&2GIYOvi-cOJMML@_u8Wfk z^0R9a!rm(B#z`3O!sv(lje~|4Npy4DU4?P~%ts+#b21iCPZDa}8fvshI@kDgZe$It z16_q8juvd!C%M6lEY733-hMu0X&bMTcPG<`J|ubag6R^=^x_wtIr7a3yLu?W$yiov zF767BQ+zH?wYgB3RZV^>j_rywq<0?0_0>MQvV9kC4!PqG%gWI>SECh|_!1Y3y8~hq z-BGV`Q9>6sdOc228Gwt*nZ_OoB81j(RY%0%tgbThoeKN`Mc*Ow`9O6yke3VOS z%|5#9&)dhz2v_(yr?}klb-WIj_$bemUmFST=jAW1@Jmi8#n#?sH-~5?mrSsme(hIa z(eUe3A9C#WH7}QVnbuU?uIcmQSe#>G^ATRy{vNQ^Z3jfBx8Ak+1jocW;Bd_7c)3D~ zfWw<$rr8hSl4(vQVL^Qu!b|2z1q}51hboT3PW&^ix4opHZC0bke`D_HOl$ zrq-GPp<&o?K7!)5-10-LCZcYU;p&er=UK6rat*|9I@cee+C*_tS?@;_iQB;b9mZq1 zxr=xJ<>5Sp-*nOJY?nTsbKe}j_Si}?ZM%`(S`bZlS^CJ;kLKFgIE3HE1P!bw+q}*_ zv+tZrb7}4#!UHXqWiLKYcj*>b0IZ%wcew-L@31*DZyv($56x}ci&krC4VbH-xiGhu z=c#>>noM$O>@LA4VI~+zaA~Y7!iRXj?5HRxp}WX+qJPG>5Kp1Ip!BZx1(v2?b?}j^ zH5j~(@bNG^^|dMd!gY`a?v)-hd?OH1~`c|0~RP6fu(()U7nJl3yHf%4?P z^}MBdcC<$^@$JP4v^M&Zk$?jyxo~xEWo>~Q*SKk`d!!>?`e@W_RK zgUKm|XLy7E5U7@xiAHk`ojRFBbJaF>z-tAw7e&1t#K%g*8|g-rbFAi~eI}0EUs>}j zGQzEvq;;45&Dr8o_zFcTzgB1JfY&I@I0Bm%L2xm{hP5xqQ+%EM-6BM{$Z*2~>Lo+< z*~%cK+8vMLT!4@^G!oAsMEAEnUTr{yUZu!?e*jZzqZ&bRITj@z0pUp%3|LGdIiF#R z+y9BL@smApKe|?UStJ_GMIueh9v7sei%;{P}lX@#g@;;Hw)xBu=2{S$!S zUTpv7@+0KAA5mwXQ*OntSo*;j-y?3wz7|nKXHSsSr&5^V59hba0PYlT&A(@}p$SDi z({}h^1gtdztR;$cor(e+8&Izdl)pOag;Y!8Q5^RU4j(j=9M43MMuR!AYT%`;`{W8U z#B)x0Ie+CoeAv`G`G{_o|~k;yTl_Hu=!DY|L71W zj+s2HFg!C*>72mPIH$jtEp0H~jPpQ(+e!9-QxeLHZo1(H40s|AotaB+UbnjEGR4Hhn4xwDy-!!{G2!hPZdp!T~~DO>zVlAE5H3vo^n zCF1(Eo8+Wb;($~Btkrktkre+2^@t$%SZYH7#fgS8m)u-mR`aPeH@yJ08&`vP|Lsk%e^%*=t>C*yT|!IAV|_Wp=n`*iX%_Hn;%zTj{4 zE$X;B|2>no3b3VQo&Rd(sVfeK)hE+PcHeCm&pli3aFlC_H#!9!^J(eQL**ZLQf|TB z^X@2`)8896gWF9aoaV6g*M6%J;)MC|K{v_Y51cJdgfDc}P|m=c;wHW?-Yq?d;#6av zQ&&lYmK@eq1Ru)+59+k{%LEz;p5lloE>LBTE9v4Q`gi-0CcgK#ter6KCDv#(=f<~{ zin9=I;26-HS@#o9!@24Ia3U^%oRne7FDO1jCEzY)EwTlPo_*-gZCsW(a_2|4^QSe^ zOp7_1;5+*=Qypq#PhO02pFS8Xz2JURz4-Ny;zarJ)pVM3UYalM)oo(Gv%gEBU>cX{n_XyQT{X?xJxJq^;j)Q9TN`= zO*Vm9$X)%_a)Wi}8Vnv07gVR<=YYhvA2bX&OU8{CMd;;E)o5iQVLCZrLXbNkft#b( z0)`HXby~gf&DpeTY8~+beH?9o&7ZN=e)V%Ju<4n9@(MHjv}MdfTK}doti@q15o90L zEVx;jV$EFE=IsDcC%kv9DuU!2Tci4vroSYe+3=TT>H(Zpxy-P|Y=*`_>QLjj43hW@ z2@OyQI)h9LS0u;4G)xoh*H{AeJt21=vYMauzZL~oqZ7$uW7Bf3#;AlLfKDa-iTI4S zq0f$P^b*N+z9d>clFc$iWy3O*`s5T6lyzFHa4sp{Rh<|2e(~3cF=_!A4m`1aMp{#- zQsrFAsJ{*e;qnnPC-Wh+F0xV_k(h#I{0KJ?4X+pcD+A%=lLukzBfpq9atG6#zlbmf zEjv2iwU_8&w^W@kEu*BrQ2YXq26V>4*tvc{>WWmMzgpvq(Wq%CgbaN|bv}|gYrsmf znMw%Am@xhzxwO6A#~l(uF^%&DYpCg?^&2!Qp2A3l0Uu&XWSf0E>U5jEt5HpWqNZlqs;FG)L$V9wBK=+Ty)tq{P63%V!t(Kw5dl!a$}vfZ9!0W3;Rq5Zv#T%kG19>0n|MBk?z)i8v{2BHD! z+=zvgMrpC+kD0cRVfJ?KAWVCtZ#F7Y7X`&iK8raeyso4$9`_rXJOkW>B$7U=qz0qwUXV0O z8xQv+I*rlKs90KMMig56s4#@x@C~8!+oeR*JAPR;zX1&4Vknog(2;QnJGB>No#{L~ zeHO}%KBO}pwDeOcxeUt;ImP$JxIg2(>v?-?Cm}0&$pTGk=-uQV1C)IAeFnT2qEGD%seNRv(=K92#U|!_N@p*#`(T z7`#QdJP;FA$QslBH_V!J(`RXSf>-V@r=K73;D|BmixCd-uF~2w+!xwziw|hQS6(W2 zQ(=M|Mx^FN_c zEXMXwxP0IepuaJDTL?qcJbC|m%BI+%&?%x@CuN*UG7m=PMg2}Zw=ECnm&X10wj!`e zz;15mdvg7e!t=7|-Ho}PGc^#?^UF`su*_uOnVV6x6?GtjpX|b}`|U=m43{b?SjmQJ zamiMmp?3qq4r_&{Xm1bK+n&Hxk@*qjM&n6thkF+7c)9gzx~Lg2NO$dqIE;q9eaRg& zKC*&TUBW-zgTSBDQpuhSU8Zg-?dTDg=ws%2zS=$CqGcv5A%?F0)z0oQBb*^dT*Ap- zO5g@p=a8{|&pB_;-rRRpP}S6?zd%uP`fkzW6PW7iBnKX`}HfvQZ86dWZ!XsCabVBCR7+*vU1TvY{2ztI86XqF& zPgM)!XyF-PW+9PbF*f)ltkMNn$Cn|G+6Gx1g-j0|vTzxd4jwZ%8#%|M4FQ4HS_| zzRPmuqgrG&PW&Hj-X_ZrF1}80g|%P6qf!+DakT^|qVDVm`&H~<1Gm0D-;I$R%-86I zbwECDLoYSI)W~S8|B1NDRTZRRyvZ#?0ZES!)Y1i+1RgUZq><_1K5968u%5QeMIvo5 z`}y_N3t;N{XfaZt_S0W%5<0)KI`3hL*lJGl6c9MGGe7J;hVAw3T#&Y*g~Wx|5Q0!+ z@F(mZbUERYT18L9N_1`7`r5!Dg}<61s(`2PPsmKWa?4z{xQlmpjMsk7@dtZ$oB=aX z#!MET!rG0?%lT-~%3d&p)GzrObZX7Wz&C@rB2SGIXU*MxvgxV*R3U7ku7nNg8bs>N zzB!RZ7Q(SjhoA__hJ(zCB+{%zG#(|41C0$wQd`s@&7QMNEp3iYiObY8*LL=Sfk?q9 z`fRKDVZm3+IO~2%tLuH-u$7>2v>KOC6sVTWqG)9Nf`#gEYaiU6ImU2JBz4o)7h&%d zeE9 zTIL@!6othE{C}OWYRn<`sX|ne!*-{e`juTcnEoQ5HJ&zLYG?=nAU6NiNDf%Q z_T(`i^5lWY7*20o+S%B#mz8sY+RXYsJ(nIxC?EkYrG`drNy|2S++dhld3hF{qm-$k zwX%Fr5xh@CNkiCYNd6XG%QgX^y34!5UN32G35RtfOf60t-dI9hyHTBiz%%b`C6)RE z5J{|pb+Q_yq5G1@T=P{otqQ+p|Au-8+6@L=cg}>ao?Mt!@nl)ZGFzc-+Qd&Q9eky2 z@80H~+K#wXb6Xs#SR)n|eumIOP+$=lOI7cUlr|{RcIy@PFFYXIjwEv@4liq>|0qG= znzzzYC@lg5arv7VhDfE1?9N5(HwT`MyX&;PS^-iCBrksBco3$Hxa%r|x~{?cq~eG) z_wT*l39E*F(CJKwf!1eQwg^Mdw8V4PaeP|%drS!XFLm8X+d?B(?y0btGpucSfz24{ z%%XgrkiMA~J9bxG?`7s^*^Pv(c@ve^CyYR&lHSUngGRybj)4n_<^w-c=|rDZSjr>P zXFIDGcrr|^Ph>fDFxF^aH^Xg88@Q_wW2aBGf^kFd0PYc9R#cnV~!5)rLlfNX(==bFEUG7zkXJBi2tm;sIBS%iDL= zZ$8{ME3OjgoRofE-(j%xE6X87pAr1Rr`ear9S85S(XI&Q;RSe0jUo0;`M#XJeoPMp z2oyi{&Hl3LCL-P;{#b0C0C=Z=I~P9qyyb=gCx8A*z>ZRe1cu0bG7nS4#&r1b-nZ0% z)$@6cgw*$#{_oEOHs=2f)MEWVR(pu0;(CMf$AfKz@Sus+nicMh_B_qI@}&~TBuhZY zP>jp8N?t)Q9&O}}?hY*=s=DlncAfa#&l3F1ao+y8|IzcB<6D2gFugh5Qx?r)H*s_M zJZFy}G=AyFPPP0!2dJ5n$-!1mX4-w*$Lc|sNBZ@SCLwP({QDUOfvphIYUNNbSFh#_ z^gYIw=3QyO3E#Tl=;gi;ze>92_x4-2@f)x8fVBB-VDi@EL@Lgj;#c=#7kOX)&)N4E z-did~np!0a0_D{bsG*f*57sxtF>!5bM8I*HaP_;b%I>-+v?(~)LcYFO_f~42QP_a} z@GfUU%DQ!n^+K5!Eti9W6q)TOSxR{#Kq`a6`D(3WhVJ0S~yUJ!|4rRm;&sG zVGTaxUr^a_AI-*3c_t27G!xFgjI5Cvu=|E|jA<;i?@jz{BvWU&vI|PVNCVtGOpd!c zddKFLsfFN1szSKzeJ{hMgP?a#hfhVffS=qt!c6fy8SPSuO~6fcCUanq?a&TWWLRMc z;RdzFD#=s3;jY|XVDRvvze`lkB3>Xqd|3bMfD){Etb+m}VLCrOgW3fU!SS;c0r=VF zFX)t$Ah&g)i00%Gm5U~#l!_UXnX8v8n?Hk?5w}A!zNFvABsDkHlIpBq-#NZBhEg9J zLuDUBw`3zS!+by|aWmO7X0>_$3etv4gQQ}N>M+sZ(I2ByG5Yh}U%x25U!{n@lx01d zD!jvB4NO@q4>v(%#%n6RtEy{SBR`HOA#&rMjVeN)V|eX(7uTYW4VPU;x8S)B^4t*Nty`& zp`ntV8HE+G33A~OE8h#7#wd^W=0=^QGH;$lc=pG_%x66BUt`fK}`ib{vl(&yrt(l%E4 zp&uw>0!n@Y90t)%x^YlhZa8((A(P94>42yL(PB7>P1(|SGZ0e^51V@b3?_Xk^-v>s zZ;^rG1o<57tbNIe)!)Ah1CuUEWW03QFs<<=OyXnLHP0vkRFRgN-2(>oB0p$*Y>S7Y zb1{ZCtnf`}3KS!x=fE_n`6CaWs#=YIO-<}C3_aYw&j}tXu7xwJ<2lVczbzcdNa}?l zV@w5tR+;u>=GjQyk8m1kWdRquG8^F;PgLPiM$Ke~Ff%IhX=u2;KB%9U!#8bBjoi1v zN_edwQ&4GOMpZEKThu7p9xG>E>q4rcd=UGg2f%^PKe#Opzls4WVN=Yz&SSUWGMBJ4 zcf%#`h=yYJZBh|mmo&x-FjM!Sn-@r6A3?e?d*r@)i5hU|Lfwqnshpugdo^D#-qsWJ z|0o}mTYSezNZg;E^B4n2<3QkkvSHk|C2l9NRxecA$4f={Zk3d;5!Y$JuJ6Y4b>cXbsJX-=6+D=L|j^a$AC>MKlOa ziPoO(9HwKXA^_bg!A0I84J}^HnFsn%fKxYCjegTMcIhl12GhF$*T6njcIErkN9=Pc zW-w-B2A%A$qWpJU15*G4hBB6NEs6%Z5txfSP|#?p-@xIAeHqb!ukJ!pG_RsNWH8qV zjg~J@1L^P7p*4uFDN6Z5HMlDKZLC8uMoDp1>nqq&^a#RHx8~iE{3lq74H)bH66x9h z>AnB|ff}$da{W&!R@Yx+gfBaM@_AS*Fu+KUNRKE1S_rp8FJW+1T_Y9uXd9hKIgT!y z5h;0qjM4%p*{sHa&JSM}cfOnBhdB6A5Fqp_9Q@dGv1I%3sMYx9f#>s~3ZM9sC>U{M zT!4&mG=$?Zo^jx2f0`li7YmUPT7RU@k!f zhmCETGy@vwrgcjjntY};?t}Gs+(vw5v}Pw!E&ta}lkKDZGv!Nyb&w_kx)LL~^*28OQdG_X zRhIT<*m`2@qIyb2cAi4xn{Y>ZKYE-O=NF9$HZzFb`^=^jD<6n~(R#EZFHK58i#S|N zO%p)DGBH5VYjY{NnHYDdwG}*H*%|sn6J^=Wj&=xRaM|8Ej3!?(QW{qOP?xA5Uos7$ zL`%NU0!+KqdE&ji4x>7BI8+*IXAZAW5k?zSug@eUoIlW`7M?U8VpVi&`vQ4A}yVq=Jj!VKcZ)tpU1l+>$u zRGh5wBFhs4>cd?tv?eHgK@4MXTX9hUBaTw62%R#Uv1tK#qwM)?bRvB^)TIKE;81)!+lqMu}u>Wk4}Ty zEFCCCRjy;}Iuh4fO4ZKJJ6&MxQ}wOr%j7|O)~B=zgjK%Wtc58cRHn z6VWO(XOrH*X{Jr*0eDMCi`BP(a&Iwx#<)Vh`!0FEou&9Z#`u~}^G9#i{P$$q?W7el z&*TwvOR1X2=i`1Vm5-&E)~KI9@^<|6I(VZ7d6*RA#P!>! zmizq>D`3Dah1Ukodx`y|&*S;CVBzFR?~(V`mVx0TsTfR_@_?o5E11))34 zW3fn)g=BRs@m_qNJI_ja)~l+%3CfK_oAfaFOtsaNwcZ{FOsv?-nyQGugZ7jiWw^Y= zo7pZZVbA-QwOl1!xE-fXO)3ixmIO>sN~(6yhhtl*u>99$WgUA3=o=*ZfdUN zlTxZ;VxWxi9#`zc#XHQ71W6u1NGE56(8GMP@sN1mQFJUiLz#eTE(Ur!sjB~1c;=-e==ENc*~?WK%C)tCD@#|>iTc;5w{%3T8@wrA6;`!Gb?PXaoB zbl(dEx5#%ZfJ}o1;!%83VT0*$1OLeR<)7N3oM%d;gxwAiuX@RC$PEuxr<9ab6lkwD zG2k){Ch|l$mRaMBYIvWssp~g-I*RBbFjT;qE4`p4ZP~b+)e_oMKD-CO&6DB!M80>$ zHNBi+aV5mBl>fMcc5yR@;LDt~dF>dNB0N}0q$d$2&|)TT&-jOfkbM!l+|%Z?9wbuT zMS<67&yo$UUBm5*WGpNd(;;@P(`jKS6Zaato-@vvjL~x#U5T79L2~gi$9>~M zqZGIzEOOM$h@Mh3yMXS=O4Q1r`VielkwNt=o|qRceHSv3=Y9Z0mX!XKN_ zlkY`pKJT42NJrw%yQ!-Cetc%VR9zK9SMnJz`MlI#_NHE6y_2jm(P;Z8QWfV%Lj-REocZM%oU-2RoW^NZP*oZY<#fSp9bb(&fzwPHl?td z6br_w1yZEUN*_Cpx#f>i8QJZ)+9mQjsD^v)u#wV*-@m<(dvn`(Ho9FIjnS{wA6rsi8t_HOh04LH(}o& zpJ9(WTD4ZACE3eAI7L}@4QqAbv~;5a`GwZL1n;Y?^COeMqc4^$0w;E+A$kOVP{*If z&QSeNb@di93M1N|J_SCa-#e{RINTVxuyHDOXqmKWjCCHc>m#LOldGzATl0v^sx`{! zb&@?cC_}gV?C4yn5^X%in5mROurl#XGeX6T ztHY_onC3i)#<%QRK2^d_;eL${dOc9*P}0T1$gm~Id@&>qUNV2Z#TFM&7@{nEr$Fcz z^f4~aUXQ(wQ}hPJxp$b8h&7Z?=!lD2Wh+r!x7w!V^WfFj3HbjgOkAEVjQACmQikEG zti4>5BoS&j9_m4=3i1^84SOon$ei-SL=u&!G~dsqydyBc1V=Hgsm2rFi?pQx9a?QT%T`mZ;nLS5qk8+v zRa-z*_D40A==X)txeuCIaEpvlQU%US(Kf0JSkIgB> z)jtN8-!Qa5N5TTq;c7>1>Q^tapp^!t^C5%xvPNrO$ z*2y&dd?%vlkjss*kZz?2aWapG{nP$WZLH^Z)@YY3~S zl}em+R{Tds5rwT79?VFYE2wz%_WIjY(xKy_BMyw1?NKBt2A$^>oYtLZqA&vG$WNW< zDwTbe7fuA_N>^P&L+U{du6d>u^Q`1H@iS{lMdUb@(E!X;uoE|bmH9xA6NK&ycLU#Z z)Dk^V(~Yz|=QCH+=x;>=I12)(m@@{TO7q|^P3vBZc7~lIXLI{Syh7*#2ze1ev$*F> z+!kRi%!3Q1;WvtNB+b&S*TCN=Q2V(r^Ych^DJa=_h<;GGK)86@zxA$Q=I>g>p=+c6 z3);)d@=xjM{{vRw{J&rYcBcRFJ`=d4!9T$YI&r8}FwpS7!7LD*P)JvCG+E0O!9~5{ zMnKklw;!_{4>t&L-Bm$#!Obq+#1^0=!=^)}D(I3H$|)2-9ttOKc$6;ux6{@d7XXsg zPaTq{Rr~7m#~3|qlVN56Y2q;`1PB}{Au1)F@cw;6QG2HNRz&Ry(#>o3?1WkS5mt*` zmL-=6+TH|%gpxJb(_p?$KJ**qoIl3Jx4GyC@QoW z3pbjC8oCKa&PO z?_*chrfMH)+$-O84j`6bGOsgeg}@CloK>O9it4+T!olXKptW@{rXEAv7)nxF*3@K` zDy$bxdhv}^4+6;r@j@h%HXC5#CEj;KWX_E)#Wu8S zY`qJ)0(Jbu9PhRF1ef~tOa0KXH++$BOeXoyKi5bB!#^uPq8K%RYfP`}`y87#BRo*h zTYZIB=oB)552uy0HDMGq2N`LZ|KxmyrKaUufvOd{8Rh#qCdF_L7TN5S7ILv$E>r?f zLX))>0ttJx=#Iq9{T^eGSvU`ZV@cy}NDJ>m1$GKPP?Um}nk3j9S$I(MvA1C{YtTn_&VM& zRYQUGF{3uZ3z!DEHa&bud%0+?GNSZCzIn#L79q$SenCMH`)?tNiy3;$g5+rKju}0q z#>pVW4EmsUh#~f5P#mF>y%`b=4-9zpYV#k_KB{?oc@IED!c(e6&kc!L0Vfe&OSQ<> zKCxQrXwSTXx+`K}wrmcStEqIZhjUBm0-Gx2omz&#+3($wu9i9E-B8Rgsn2##ipdo5 zHAu984e@nR>da{>XfZD=x~H+9XRdD#b_-se*0z4?*dQpNzoQn#I@X^C_=@-}(r2h~ zh$|Vp%jGfw|8-5z$J=F&ydH1Q=j-~TE$rd%KLhi6 z*}DAR&tf*dUeU|lo-enzkJIvc?>8xWKxW}Wp1{Y)Cxva9=>y0s%(t`xi5QuH8g}OL zFQPSFrmfiox?L{=pL&7+hp|$Q_}0u{TI^P`~$8gQp=4B zAGf7P;FH@B3)<}2{GUmsW9R6;A+m^9!$WWff2NWfxS$%_MdS>`Q(zU8Yq`*u<$7Vx zKd52yhd>xyMkOeXGshfg4hP}^kpm|UQnO)qR?g}X6_%w-rhY8>5Q5!>2+V0C6g{RF z7O|(jV=v=iqdQyp&)g5j*N*d=oNezNq?Av}7p=~h$=9QtZqL`<$$1Vv@Atd+^-nK1 zkN29M_x+2MmK+8f{u-mx?$%LVc)50hOOy%%a8J;X1Ex9a3$AJH`iefl1vKAoA(`0A z9{HxH8aQSmUmdoKOoGPLkc8ew;lOvfcJX~szb3ziCBgvBH`3&xG!}3*=t#X<=E+b2 zBOqgeiUN_zTF5h*O!EXufzQlu0P*2@656>_cyEUp`H2G6CpiMG*GVcQ@^suc^Q8wK z6`zlL7zj2bK;Js@^rNh8>dzodB3ZufQB+xCLds4$kbLojAp98>*X_nVF<>|Ea@UD$ z+z0A3yplniT`fBy;pFsWA!0&8vJ;Kc&Dp-hM8?EEyjO~%6rJV`zPi45jO*Vu3jNKd zSxso(ADany^^TCOkHA<2S_x9IcLk8@TZU#0Xc;S(jGnK+e`Ba^8=cE8x4J%PL)%sw zeb-R@3bf#VDE_e%ae%Cb#c>inrt&tJnsEy0q*9VC-j6u3qO~&n9_k5Z0Oj9KcP_w~ ziwVP%zJ}?d@1yAAg?DLwsr&pSu(1PYN@Kw(;Gt${#Myz!z+@K~CE#*+>#iRDHrtj#)!^8kRJ)m4`gAu@Muj|y|MYtc^nH#t16 zfrD|;rdo4M9^W?5Q6;$3Z6%=!AC1NZ@lMRW#kr~XdMxS+3!>;w>{`=MV7b>e{1C@% zzN0&7tokGNc_elWfC`3;Vmh%JWsnF0X$L35L)H9Xff)m5IBv!-8@?zo+?CdX;ypku z+A-t0KVs#OS(3t>K{pXT0^FxXUg5xtj}{bY?Fq0noa`h(?FtSNkC;KQzNAQ+?Buo@ zk0=#VCmxTO0_=RCV2|v-buar#Pt}9f0$eQ=AA$ z#wXRsH=A}zbcaX{&bIi&o>QDAK@PPR6bBbwu%sk*XR4?$q@s7rf^aO9IL;3%fk6ER zE?00~=gFOmu?9#bIXh z4ZZIa90;@ngE4~2S5`3O1>4T$RcN~vnDkr*X=p@{{Y0+Dg5tPEeurOAE^LoW zf-}y=klJx&=2IOO_~*vgBcVGqMvCY^JJh}A_f--EzA^*A?B?6kS;v)#2P)2OWcbe*rM#F$#?*~AW>Tse5B1(fV zK!5_Y{gi~shJOmrLzDlugC7R&fKB&2G=%+6d*ZVu_zd6*asW{i1IqrfTIyo#xV;z1 z|IeM+8{80kbd@jlJmB+v19-LCDftBxYqTL~SN5~B7ZEHMLvsh= z@uQyLHK~cCx+oN&la`#>Flm$^xD}}<$pDC5`PupshmNed&E{)Pu#;s31Ad^Ph;^?? z{{U8!L_eF54pz;o5x7(#lCYH(k_pJgmu*u9Y)g}d2jZ{_{)hcL=cH{WY3idE`EB=; zLw_(YIk=tHMBx5TI~Ytng3=hu7`zlGbs!YR&`h#C}7V^vQ z&&u&t+mun;_0`ZC_~^wb=6~N0a&eF-$zKL{)3&=nrBv*I0`;nibWUqPB7TlFX zfIc9=08wrl7$po$bY=IEqiS|p0GIZo+Kh}mm(mJcGGH30pOr61e+sT%%M1`nmwOHm!aea8RnbxtZqKW$_C19_Q zKP2Ss$9wqMof<6Qm7}6>9()Bf5_Q#=Bh4>$(M^5*1H>E`db)GaRIV5T=7_INHHRev zGYg-C1LW4pRU>&g)Usn?$b9_x8Bhi#(U0rEMJJI%bKlr#9zQoIz?UGAU6Bui4cJWc zUY$C>@~=(Ze@o0D&t#?Y7+T0x(O&}iOHiB>fS<+m8ouoAb-w^38a&e3K>x$`A|Lm^ zhiLdOQM3QbF69^MCmtsi&?IgT>&WC;H=ikTJ9*!olq9bNN&^nd|MbUbHyTNio}eY? zpH-i}IRCrBcmdvEOhsLPyFB;3uO&ZE>FxlNn3TZ%v%xsu9AF(s6jpi>?+7~H1%n!H z(m5;$6W@xb*jC39H+-R=P&Jj623}!Mb@*`4;}-<#YTR>Ym+q23WO($3BLHw z4zW;cBm_+UpdPiO|1Jzy$aBkC%B*7OyV&nS=Q;j$qSMb}8`I<3|qy-?)>R zsM(BH$aVdv@07l=G0$0ICDL#3*_vE5jQIfxVDdgz8h%0sSWzT1C`H+a<`LNoY}cMK zo3EZ?E&?MH4|?2K2@3}tZA7nzl9?7lD^D(`KhlJ927lfTm&L=GXAz1Uh=;D2A;yYU~~9tI6WyOZ{QVG1pPaq?5srSs%!Zx|dwvxgz+ z5@1+^on@yH>d-tOOVlsH(6TOuB%(4=2u%QqHsLy``gVso(6vPROgmG@f+XLB=BM>{ zn#-G6Pif~QWoW@(jE)E>K|P@qqs-^NqXh2aw<^oet8O&k4tg(+!tbesL(e&NHk+Tc!q`ws=$KUJv zqd~>t`aL#ZHos9l5v>IW_WRrna!ZHK_Gl8hW!et!7POCKZs$);A7wPCbxI?nT0lr`SWM3&*yFo%wwtv6yCZZXb*YDn zXXuq5z%ro#H)SCg1HxE5W6c1aA4zy~?=UtW%TFVt`d0v_AyLzoy~P+=jB^|nbTECM zEfX-Qd|j&$sY{wa@rjCycN!K`!46=QGJRXVqNpERlWRKFW& z;z%Pi&`BI>$`o|foqwfm4n3~)D$=$szH|{qFPAWvCrSfL59~dvSE|q0mmT{R*?fdg z4vwD`tP6uE6i#3>*i=H=IFB?$)P4O86-DedqoS6ER7p*>23dkbUvj8Y(Cw&bxLsaxjPIMD!WJK^0SZE%?_J zKe92B<>iw=>yT7`OuZ?MUpSQ`Es}c)ex*yWmbIbo5;gZi;fgE@NdJmfv`zEXBSLI7 zE9cMahOg&BWDfkRW>H0@*n;o`xzX_>?_H(}SK{Rq0{2CYott%f5}q|!g`h1-X3pqO z(nA#wmV0wkHxDC?UZsb_WP7QDVfNgShQOSJcdSp4xDtT{xJM+~`%yPx(Z-jHr zkia%xxT?;#CcCw*H*lO2Bo!=2(tn??`8fVP1R6KTzn;No{RSS>{v(>*-J{O$t@KIH z@UThKE%`@fTOFOkr@xF-u*>|SKm~R)Z+r=^c*MbAuD9O;VPgHi{ZOsTo=sxl?v*kp z{8ro7SC4bUw(p&;kL`b$BG)>569u(LMesp=0<=d?zsb zth(v?^!y@sz1_iUvpqV>I>_?-5QO^pTk+($Gum&TpH`Byphe$t8tA6parVJ~kO6Xl zDlftsFll@sZx}j1c}8dn21wv<*W}^$AUQS8OW;ykpF`ujk ze%d=g-I#;&LfKJzlVnKxaK0kFWK4{Pg)iR6u3x#ur(kjIooRo?$u529l0xu*A6Dvk zDj3s17Ugq=(Pez2_*Fiiw#zs=jCaWC1BlVhV5HA*C(Z&!gO`?@9sr{!DiC%ydrvnj zqJWOAvY{ql5Q%`MBvsM81hO~bOln>%W(xW?9#1 zj$)t*F1HA*3W=#`(;-q!3+5fhAlBuKhG@V{0ctGG4J*EXXqcl|U-QUfU=~%T8^SFt z^+r@|*;JBRXXmxcL*j~;NOnS#hKkj22|o~3DljaTAKtnwvwm{!afJ_7K(qXX1uY1* z#L?#MhZ_3(xjadQ$MOcZMKjGr9_s5U+^-gzXepEiN=cux%vuR+f`UzI!0MR>N7nV} zt2jo&1n;Ku2P^|UsU5B&b_@Y|1u2+M^%#26nYperziz^Ol~lv9-4TcDJJ>4_o1e3$x^wqJ=I4cAN@>W=)rxJI)WSnC>AEBm_RrRH zA_>$is2@KGtF)%5m`5O*npi2_etI-Ql8O&VzJSF{Bp)riU|XHFEelJc4@WKYwOao? zng%540^=QOkT7i-Zbd?BMNyV6TQU~t7}HBQLLv~9(@~Wb@MVjD>>p)){RUJ9dIKR9qq`{j)9}8a)s-%UGWHeIbQAlbLLcSG;9m%pK;XuYi@<5&aM`Ok! zv>69K8D!M@{%|8sxHht1s9QfDC*UmLY`S*q#rPm$9d{V50N39SMah<9?$JD#dwli< ziCBAPUcz1yWl(xxzV=lThAtKP8W@9J?4~(TI&5(2iZCm%fATY)O8~X#2)g_|#?osJN&e6gZ zDIOdZJc|-yOsUZeSWqD^sU?7rSc7!7O9B%+p*O7{#bJyx8h82to8b6U{b`grGka)E zS@h|13%s(tkVmfbU=N1Hyf%_u)ZtCU2S;6WMH3W44Z`JA4rO^Xvr4sq3vb-%6D_P~ z7VDTJ7V>8Y7=wpJj7r0Sc1XFBlk?a={b`3}y-Og7x0hW%&r^tz|6w}k{`Wv@TmpRm z61JM9WDgEo9Xfx-d4fv6;_!x)K!aU^>ckzcK9E?ex}TNmelISf9wi#owyd#iMvdn& z7wvcWA@(cI56Jx@auM)IE=sWZUcWi^rR%2h-P_CU_0Z+v5}(Hb4k#enkpo{N@tq_` z5=@bOyi7h3eTZ!~`c!GE+@|j9fwjU%e*?Q$yYl68%M;u&alchfzr*~z%Hyd_+J383 z2geQ6*!-e$?Vh)l zSFHL-u#fKh>K=@cW=_%g3zAn9iT%U=4_3(Ng-J*u9QIK;SmOh6t3*iUHaSSV!{Yks3lE6(OhXaV>H&#hQdjZc8|LQ$iNaw$`?X&WyJ4hn7B1Le z-y#<#U+41uHADx~k+(-78}M4DTK&t&ULF&mL%j8`7q#bX6HlkutEKzzgZj zZ6pH#E?no~PlOt_Of^>JfDqNGKSfW1gYPn_<)AcIUjlxFX zrM@od-bXc)v@p{xST+pt;R^v=bd1-g76Rh1&G*l-xy@TLn`OOYU;!{r_s4jm4IY!9 zvtKGRvk1m*H@o~-jTUf}p%vqaWK7j%~~RvW-xSoI;@Ssl+2c;a9w60?$EIGgyrThd92vP+3;3?{1`WdZ1M4SwxS)BhPTmr#;Udc45UdIDr-x z%Inbv{6w#I-vHGSu0mSt*+EaTodL$Ar*asxOMN0{=?blhy3T0Oobs(Rj8$Z)uSG7l z(8i?wo_Ce$5-L!!MDuH29apofq>h0%EN&m`M|eDGHD@C|A+C+dLm=zWpM`{K?zPWR ze)(T6G}{5}kwvp+Y;|+>rqPq6Y$ELQ!33lmXbM#;H<<+COwI0%A&%Iun^qo zB`=D)=_F=%M$sX>hSYF4snYukZl-74a#|i;9|Sd_y_}i1BQ-TZ$r2d)I|XLgk0M3i z2jIO5v~gpRqOdZ}0x7b+@3pHbsV&S66W8tCGn50T1yl-RV7hOm%euojIUiN^8ovEP zpu$Z8ufxAenG1c)vAxQgnQVq?fzNoa`ONt~uIIEx&&JcE04dBA%AmxYCNn!?VQJvO8Wy>Z8r}rmINCE{vX4 z|4Kl>1je8%*RHF(F847HDsf(_>U#a5XW*$4fIE32Ld~RIO61XJ>^SpiqserMsJhaQ zlaPoxA;j^L)*u_aP4B8rnq&afHlC1u-|gOS-iHteCks~wFNJ{ z1*Hs#%f(`1jkHnTpg&rF-A&VxpVvM2Y23$N4&82NtKs;A|izTWB2GO_Ul~i1v--%&EHYr#IpF5u`q#PppUAAC^S@*ex(OgPii`ix%WeN3;s%O}MaB8bVLSRuytG(SSTs{) z$NTAPUx1*A|A#of=y2D*mITdmRL<_ExuK12DOmB2=gHM{dqQhKJB?Zc6JcH^h9ZKA-ij} z-I(FnX0nOmQ(SCzsJgTb6N~Le{SwQkys3=|DO@j;0gB?H?7ItD(2abx*lOsL5f=duJ9Hj*cifa2=W6df) zFvH63+cHmneD_=8Fgy{qq#Z}xz6!G9O4&@4TalJjTsEyayryHdv5$YA`!$`7*UDo+ z(%tWx8!dH^q5( z7`lN-dfCXTIAb9^3(&=YGJK%H9rp4|(>sKQEWtMfHdxNSIT{w*6EZ6mOw&AA%7JhT zN~tN{ibpDjjHFvVZ;THzxwA7u!Gx+P`-k`!$_E=v>wQ3z;06OqfA@7o((VzoY#BP- zg#F{X(~ep5YcAG>lp4;TW+D0Ey6G8MFpAV+C_2jrTR(LbM88_Y@*pS~2vsN#g7F`R^YHz9O`h2zD@t1;(lM7Mo(B z6VDZo=~u90Yp}-QYAbB}UNcI~sRp_;s_c#4*iGxO4}xUxB-S#hlqHbm^s!kS2~G?A z*>FdPK1d@H$e(ygo@@7FQRc(aR3hREq}*wMmh~dfJ;E5u5#=+9o<@`;m>~M*#jvOu zM+06XhezO^EjQ3S}^glV44V^xdHpl71b+3L$PL3&-g9(F`Yh=B)41bXZA1 z=!A+D^C{N&Ad6^XFgg9`QH64^=F``)zlux?jXC9D(F`UG2lZ87gr1st? z^vO{^bg(@oT(3&G>njhb1A5> zkChbW#-Jgjll|tuB=>H#c9b5%gmSjUT&n{M1@WUA8N!Xf4+kdNFhdK7>CpGbRCDK` z@l)Bg4aAqQt}6pWq(%iBn<1+h?2`Nty7}ZuUeJsv(LI%2RK~iSDc7A=f2IXYnM!x` zgc^F+9m|cSVq*Y_$lkl8ng$OEZ?YTIWhYFstxt` zhg!j~aN6n-O>hGiez)7YLFBDa%T1~eRzP6>D8g&;iV)Z{CA#G%m|l4(QSr%e$|oDI z6$e43Ld-4iqq*imK6JCfs2hkhYI?n+wvl#_qDp7=P~->Bf1mUD|1-Vp|1#%u zas8L|`fo7I4CU{f-`!J}P{sxoC4ggzd}1505=oYot@4i;L$ZxEt#g62PJ@0S=2xgk zsf6AK{P-88yNd}5c+9t*4ebYf(0n&&4Xj8$FY`EN^6<#VB@an0j}|sV!IC!zQW7?| z3dK=QfK@?(%D5%sG8=`6RAF`uE`8SBv&ol_EsO#Ss%Y!H%fly{-lbk zMe3Z7(s{hyK|WEKu{`MW$YW#HB7S1rR-h{wiO=8p=J6o>;@M)FsEMHekgPG--9_*r z$5m=^#UG3L35r*FVjQgOAF4{7PB5KAozsD^{>(R)6r2M*da<%p7tSsl|uDA?~z+oUH zi7c7rj}+Vie`o{up{SDrXRI9U;}+=TJ~R zDUbb8A3-<|Uur-NK*LLj0j+%M3zzb%18yitI#HcwVxMCUE8b4x;ejo z$4#qZJBuea6n*Sl6V0G14XdSSi9l^=!e}S7l!(MWpkiR^U}s34Z5P+LMG?Ql7gvO# zzJQ`&Ykpcl-=UkqO!3=Fyo3Es0CDTSJCvfjXB0);_U6RN-}G6REszT_j>al;R{Xog zsMbW~t6UiY7LT$XBDD)z1ur9?k2vmef7=Z8*q8#dg zPptckzl_{7go#-!`1fW>zLd6fSY{~#c=?_LQe!TjbB3pghb5pQTC=+2n|#8u&J&6O zpxi_<-*f8&4l?e&s~1_%yH3D1 zGN0fD0H(R4nG6(lL-lcNGruWLku*7`te)>Dlu}sA6rUjZhbs{EG-$ zSrC8X25;3@PEFW}I44hAYQRrJWC#lCGmm=k3X?D zKH;|RX1>yLHawcPB^_-Qe+O5R1+ni`AWrqsds`Rh*jT}#Kjv6DnPVWL%p?*fymAUt zv!Qs+AYCx|q95g0IQg>Qs%&Ef35q&>vwSM>JVrR31)UE7{d}`p&4=iKH^?2-9zeU> zoA7&b*7CM_OS)5xHx6%4^O1zCxpZQ4u5h5YOyc-R2#&UD@M~}D=e2xi@3?C(@}egt zxJddfdx924^)6yu0&c-zqCWx`ZzQE-c3m$wY~4AD>i>QI<^9k5CI3srtib;oG0V;V zpBLodh}l?bFunKrBd&`w>l`IRJeD!@20A}ST+rs~a$nej9*k^Uc8?MCNcY6Ej@vDi z&PXZ70!aDOymQ18rHqKm_l`jw-dZ#4+usI@jSNN>4F~RX)wm!gU+0aVb^+w}w#U8q zT?!1S`1KKK8wG{b9oM0h)!V>S75!e)RFxI=wqx1=^tNT%&O)2o%#=W=PFu!Ms8zm? z``h*9F0;Rdj%Yi$cwM9d0+!%LFXB|ZhPLxFaeKE-G8JUT3T#X0*Qj{8Lev|_7>NVm zbdMiUe3_A?^VgV7qgJM0Z_t7^0$0OL`!U zCP7`$hXeVSRd`Pvmi`di-zY9*F4nlGcT-J&E+ojiei}2$+Ejm9J2W6Zz#@0g%ZsMR zsG0@@h#3sD;2_i-B=EzbSV)^tC6n9Ph}+0f!9UR=t>@K=Ctk!4x)~4*ionRs_H0`! z@b3iYIiq17<8Zjc`;ooS)Zc1eN@y1&htiwde4c8V{E>e~|Iy+&hDZ9NAUw+~zt2U> zpKA0!7(8I~Fl!g82`W!he$|IT8|~d~Gh$RO?kXFQo|JOS)YMr|T1)_X=px4lkIF5@ zzjX-FC|PT8*^ zvJu)z z(Vn)-pLD?zKp91HG!j8riUxGh_pjQ$c{zkG>}8f;tGIZ66TuU2(}xlUF%7e)`1cmq zxPpT}e?K_pWI;i4DM{tj#lod9PBL+2v27qvKOO5OJ3@*vR@ zFry4X{}^Bzf}Z(koE(Ua_o-Jq;&7( zk0jOY0YNiIMUrdM?TGYHK{w074N%%sTFNx?=uwD{YB?-{+OIst>;M!?>Kh0~hE7y) zV_qjwqp?p+cSVK|pkEjBQ^0|w09ZnGqILde_G)$~L4BG+xMU2@P<&BH!k|&8f&P!B zQ=wg>1P6=2u0Mh0F-!|H1!)4LjFki6hrd@&$|XfVSpsH%NXY>Pnk1U=?o`84zURZa zS>_^rBv^`NGRgixtd(Uebr`7tV>QWm!!p|<_32~T&;gcV{ZQM~n^s~w0FpkYSUj}g z6SyMZtGEVLfBvwY{78@97#xb#*(V5od@+i&t)fnr9<~r92aXj+>5K*cKHoWG3W<1H z3t_*{n%{MUQ%-u^cYv@rMq1_^@mgz^$$Yfej|6R!Okqq?_6@Z^b!H0-zv>e=mKT2c zIlba{w|M&7@BQ`c?(zAajohx*?{yP;{q?r={=LKJ^6Gkh{q?2ESc7$a{mt=t?{3$i zwfm7IwzKQ?argJwX{FfP)iHW^$MYpfjqTiR)nHz%)6?Y{jc@I)i@1c#*{as2;{eU6 zk>}nA=kaZ>Qtaiuc$s>YB3VlN2zWO1gy%&ZPt~b9J+)^>iMwotl5t1sL?P$-Tzw;G zV}B2Uu@hzX}B%`2e{?#%=b3B&S5L_c$bGX@P9q06xy0`I?)o?x^ph+ zBA*!MK`c22tLdPL?xUfj_brbXuN9pZ?v*X4{mOD(JdD&5oIl=F_xOz|swZ%w==QXB zWKsI1Chh&J!V+(~Ky?dhZN~KBe9zL!KtiMK52uSRSI?!eZ0siupP?>hDM8nq#2ZPG zYbn81HhKu&P=P)=F8DA2U8_G65;n-CFkb40_sB8tM>7>H& z?b37m@*yTiNj4Mnue-?G>txNwKI3*AIQcw2?Y_cyVR+>ooL?L?i*>&|JgtT`H`{kV zJ>BiC`iZV|J$$MEk{?H!Lq(-rus*{3g01Wxu%iV|_Y{u0?|pT0X0|CQ5^l4mOH7<6-k)@S7TsQ`V^qA8uU+UMt z{?;H!KcW5#RnMsc%y3gh!v=+*x=+ohw);YfJ@W2FH|5<;|IhYS5X-w724J zI)sionNVoIrL@F>V-P!BM9NxUL<-z2y%AmtKs`%vHP$Qg1FO6m4o152-~Q&Z3bWRm zLc_KcXcUQeZ5d5)%|m9?=@nkutYBI)IdC`yhgHp`G!{DY8K*Zw(>f~%5h=&aDlcs= z=`@1simna%rI$93ke32zl8==sPaR@tPW`R;5|x(%K6)z%)m>X{MKnTtJ<*)@9Jz9f z#JaX5uWXiBuLR`mOD2X1t=L2e)xGYy&84@1j9UOHWflWM<0W)gKt`suON=+fYhZ=a8sxnHnF8&3Sbf*T?<2bPCiHPf0&T3hko zH*80QT4dvzsIP!WOlz2F?KYm2=VkRfq?Vki;mT_o&k1hEhg}l zWS;XLrmw!V=axTqNLPG8Bww$9B}!`&!?M#!!$KLaXy=wRJZ&I@&$4bk8ys5hRh{74<95U%WATw}Di-!v|S7_%-YZ^n@+~5?s(pqm1QQxWX8m7gF5YYncLMWi$oqm*OXtjW5aD{jZ&B=AF7SowP=pZsqO5&6_|?+w9@6M<(?oyMf6WkR z_Ok&v0Yh2SfGxBjD!EcxOt)VQq-rY?f2JL`g;+HO#~;v8{4E(zTZRw#K|%+=NLX!& zPQ#<3!Qqb12g0YH$xg!sinkSnT5iF^a0S!pZ)sKhscXtBnD_$V`kU0<%BgD*orOmw z0pZX5xqQ+xq`|isz_%p0gxnpZ$j<&6AY6m=E7%Wp>(812*Cet1Q)0M~>G&u=V5r6K zOIEnh79#_=x-a2a56%F&e`*L>8~nWX|4j8l^owc&u{4E@1 zj}bhS`(-qTMud_gP}2{YIrg1}XY@8=1n~}~*Zy`;qFc1Dy(igucvKdUs{>Rw9s+i( zmf<7*Ydywa)g}L=Tf*Gx)(^kzTmoC0Mil$MfV!S1v@jrl?7WGx&Ss^ zAM}FFg8TZLyIi-Bb41VImghV&6F`vRq#y``FH|=qS_pHHg!i(5bQgIeo0rxRJ!Yy$ z?oj9_-K}k3p<<(ofY|Om0r)^KvWu4CL;h`{$xHL4^q#-|5`FGpFsHo&c1&Tw(4-l1 zVua9M5)j;f`NkqVnKXMv(b#UzHiU_Qp^vJA0YVFo&qZqI;R1i1zREiSyxqD59stp2 zJ#h4n;C!&(aJ2=M1P(#bfrmg6m=+%)8fL;twV%{U5$rg1+)7F@|M)|MP`_(VP-etm z7tASjdjJ@JqdfZ$AM8V~r3Nbq?CKTYNGkMm0ptvFJ}Mrv+}{8#U1Egt-2QfyWo3in zqlGv_YfIsyU97~Q6TDq#!lx-q`Po>^M`$DdR zR2v=!_y$gr>5Musl6mAt2pP_|Z1eX~V!Ay%)oFIvJ4avx!r0K6EYM~!mlDE+yghUo zm_B59>RLU3O@-E%H*2qKj?E~dj*+O*f(LPzaP^Junq%xa!j~K!Pa7)FqAei(@dFT$ zngjN54?~9TX7dC)%CqoYK(WrUi8UucZb7ii?Br!0F};T>Whi;No*!*e9)_%5xF%`( z(VmktK&}eNR2;wG&G$Gg^aj66D2MXjzfJjh+5fFjT5g_y`TRW1`iCB6=vg?#$e7UA z4+0q<^6dXIP-V}5Djt63`@k@+PZhyAK)s@(yh8Y+2(y#wt>@8+fBIs-2kz*-zSrSB z7j6CR!b|LV;(qR~^!j4^6A!y0iHi;YI$TM_q@z1xSQ7F0{JIgt998k?Q+1Jc%Y{Iv z!=4(wpSV`Hh3|3SpWM1P81m8}PQzQ?78$vVtI`_^^x($|aC1Bc(vuRlmL zt>j`#*C)DBzKj!}0Td$YOgD3Xl;X=Aa``B^(W3`yM_cBnQXA4D-RuI8{S)$nt>dLe zn#2_p)^*wOygAX}E>jOy&dC>xOMKlP)kqU~a6f;pY^nZR}>`esL z+t2v=(=E|WZtb%y;PwQ+9I@l}2J4miD;Svi6#eRopob>GOs8U2IJj zKoewdvuPF!U46ma3bzm5cUA?0j+-EC=+Y`Y#s-jLPs8GfkmtZ65>$=z& zghN{Z#UP6s&l{BF{ftnwk>RhYE^o}#JNUbfi8M1Vm$V4=Rb)R8j=CnI{(BU4H_w@r ze8G&bC6jF1uD`Q1uL*p+9U}-y3({~A+E78I%!RN9=N+L2N=`xq_PL;EkQ(59IED?^ z#FAD~*QY*fT#SpUYF;;OhFtZF2USAIlaX%vv6}ke1D)5bfm1L;+2*ifLG}p1`SFD0 zw3H)&YR7!v@;7D)#1(W!7L_W^WoOc6*=I)KC6An6yW<)dn*bv^hvD|Hfj|LL*E+Q$ zS4;gmbt!CoY4z;F5ntJiKKq`xqOAo*kZqX0Lx2ZL3yk>JY-2>tAp$d{QaYj^M6 zHeoG33VutUwu@bkrVl}2A!LdS94myB;XQ;g;575b`*`M=ao3QcwcE?^^4boayxZ^C z)q$@TJOu@nb{hpvz_EY6`KRhjWy;8zgD6>;et`9l{UNNxh1{I9DmmmJji3~VV8k4W zN|mnX*9^c@zK4OstELccZNCY;SCRo&Fk+dBydGu9IQuMZD=I96ch;ZfqCu+wix5O< z9t~~uFp?8%fCYG473-7Hb&`_>3I}J{Tye5{;3l1HD|Jf2=RO96vM>-PzO-ih#i0Pz zdSnf>@(0TAagL$t>1GuwYsCG$vuv-rrQLl~q&;s*{L-%!;08yq9tJQd(`kWLPb{!8~ z_Nhba|HXxHol)WzV^lFzU+5#R-w>=&W}@(D)ihd+ytLc1T?p+=TU2x3gI^Pp#cz3O zu{vW{53$o--!L(bcJ@f*8cl7ue+3y6*>xBV-Ik54TboRRA-^!f8h01oCrn*{BX(t& zNTIm@13Kn=7jk%D*(dI7FFHhld4(mP5=4NyM1tvxbvR3$c_lMH^J(A~-r)*$)wkGl zRy@_n07+5T99Q=~?%54$ev{=#n#HQwc2ncP2!j`?U&l$;+#LIQ>_H%-dqR@QU=w-% z!%GO&E(R+@xKdfY3qL$M=AV%|9+#ipY5g7U=ON7LIdpa)zNeh8g?!*P-D!+*YHMyp z@qRT3!gB0HSL^|gy-)@@#NXdbWL?($QL=)nQgt4CUTjgBaHP2-TaCd!+Z@dA5NQ7vGy<`l|g=u~Q ze%{8jB5`kU0J$UJAM#b`ZL+!@)Bqfhf}vC4j##6$RI#5Jq&t;aLoEFs6g`1a09 z@HY2mN3Ni}klDJ%PhYs6PR_1d&Bn>zeV@!8E}c!Pl)rD-#kto_3yUIHgVL$Fv*RZm z@ZR`FVGtA~0LfJBPqC}7OZQ&kC;%wsODL(WTULTA(uZ$v#kr;ks7+ir1bqnH?9|Ni z#cb?5LeqCdD3AM?q~~_RL~osk4}$kRuPj~0IH(zQRJad$09S7)(TADXhcr)bu>M2e zhJ`nEdkivC^uzX!=LsCSbif8P@i3j~<|>ybjsZaoTvIe;#m4{^m$pc2B-;)q{ckdd zYYY^;KeJbpbO;j@(JK)FmOZO-ut0V=R1%E>i8L&^?VtP^hKZ;q%s1Q1$RS*X0w{JH zln4%>27nJu>Rg;vEg}K}Lo4)$5^-WZ-keBxlR*0f+Ira@Xb~1IdV+njiZm(X)40^vBTM^LI8I%ppVF>@Ek_zzLD91UGJrC@ba(6^D>3Qwi&;lXFT@<|I4 zNtk&y3WVyWGD)V$9B(V%dU6<>ayDXj)p9k_q|;yQeSgR1u6!Bnh899mfp(2XaM(#Q zrT$`)%1tFIL@#1GwDYs5oK!EN5Jzb7`xfu*&w$detX}4=wz=McuBgJty`y!OkblK# zsp+VHcEDBr^+g=7K^iwZW;_#dqF0Kro-2#V@q&R5Vv|^Ku^A2Du`i~XG?DHAN zPq&=-(zC8=42(>A{Aofu=WJE14AP`jj|NgQ6R@Z? zT2-=3iRnHQQnJJmB1JDjnJav+4LH$c&YE?oRmHVlX7{4kScsc9*2%CClpxz&iY%s~?Q39epHO-0 zWht0SJu6>j;BuwK%6SFv5p|)|SN+L}3lOmh*S62EdT;X%p znmG%rBZT4Q7;1kgfSF~j_eGs*+>+mODPmCzjgn!Ce5vcqu8cKCpkk-}T+s!!m>Zt( zP-l=fQ5lB6=scdF>4la06WTmyK})6)bmz+FqHV=FSOCk+DluYcm3F*D-1w+dS0PE> z^i#@3*oXj#*HHw)vJ>u31$(!iRgZWv9AZ$oYDRBs{0+S6IbN#3~>0p*aOIZFD1 zJ&TwjHOEUIB;-FYF*O;^?|d3Q11@R!n+Ov@X!S!iH$p713UnbXcp;BTLg&*q7lSvU zXi5pGS<*P5M~yVesh1hXhpO>7-tQ)+d85D2#)**re3n2B;w)jT^qd{;i72G{`L1_E7!|)>N}+D zfh)vQsCp$t|V}3uM#@c6PrZ}DQe;Vx`yLh~!mErFZXx>;C<4=9dYki#f z^e(eVj{Hj7IF(EP)OEHXw+@!%$@cyNa)|!&=KWs%_~3fAonF4WtK#%#%A(OXC&RDSI+;z<-LnY zjmBJq9qvc;ni?L(%pmQsW*T;>sZ9b%2#q=-s?ir^jBVN{GYj+#fQljYd86ri-abVF zSP};2q=Q$EOo=V8${N&2X`DcTTp?`bR+N&Y)8znU%kx&Yn;~xm+h`*pN?eX=*$O&Y zMkE=?kK-IBDva<)S@I!LWH#rROgA#4&cfZN&x3~UQ5tq~!IXP{5M1b$a6*Q$PQEEP z9B)fR(zr7!-EUhPDnO#_{<=b%!7tg-f>Ojt2-Pdq(o?lyFA@_W_JwGf_TWcht{x;V zB-jcP;n^VJH-h_!6Ny#T!+xgO2kGq%$@I7wmPe5DH1dcM>7c@VVH@PM%&5D+Eo~Cs z7ckm0Vp-y#Ab?;S6((EWC6 z0YfdRg*3^3TGI4~+nrevCm1S;8h-EG2C7*2v-hS@wh{YGf#BRVp4JAMO4gEYuK)w< zZ*>CWE3T|pc7*{PK8Ca!I#AKF2s#7lAQo%8gInRN#HbuIGbLdY)1R15{%`ez;mu%%9>bX zt8~Z|Nm^}1=HZz>DP!b0I&9CjiX@HJomdxjCyNH+emhi7+U2g5fwRvWGbs!)*OhO% zRG9(T03}S-rN`Fu0z-%2bA7o{GexrY*i;BEc&5HT*|2vx{VCBHp+@z;e(2RoVHWkP zqVjh6($~)0RTDqN36{_BPy6ysf0sh#l|X>g7EbOUx19o3vxz%1M8Yvt2ieV4TYK@h_)wEb64Pbozm?v@yyw zoUgF1gLI5pteMW}r_0GHvo#sHZ;7RRp4gEWk^_wjBaj|48^rEYMNLvoMNJ+%;|yUh?=(fcm6q`= zfTBCvUj(kpoC5_$P7Dg4Uq4+&KKgZV_Pu|boA7&8^Lrc;!=LCTuUvoA#{IUDwmo;L z4M5d2yTtzuE`4o07RtbvQ*o5vScpo7MMV%B2i+S;S66tWmptZRk zOzXYtJUm4g1Flzy0kwWgfHeuq1V_n?aLm*$Bfpq+uU^VCNeoCRk&>p0gJ8%W0EnGj zBjT3nj-esreY_bzmkClD=6z{Z34_M{rEovqrla7sXPt*P+D1@0=QS$uCtM|xlzWC! zY0j-qRRHCeQ~0Oxs>u0DNjIN|HTd^_*pUX$Km2(FREOMkPB!28DDU_GoG7sS!n8(Y zZR7Gsdo}%J)RLqtb11H)hbTn0s6oF<;)vXyd2Q@i}E z$)7wcD??I+bx>6p8f9*5mR*=wZV{N{D0wOb8e6K-JE5Ju2#B{4(Qz$N(Fmx66);$z z*OlZn_vbyo(NnK|OOS**FMm)N@@6ax&`T}2@|4r=Yt(N*!5@;~#2rz z#mq4?vtwpvdn&JcdZu5$nf2DHk6S89_effGbnnsGdzXe1x`3Pa-O}irS1G`TatNd1 zkobINX%Z#PU((;RbVrYHGktKHidP?U;NMv(qA0B!mR}&7 zy$2Kf%eNR{ek*o4Z{4y|avCP`Ip>F*iN1UO;D|+zwuVFv9l@rCN`CAwn-JLKg2$yx zS{)WX@RMwmgj8NFSV}{v96g*v0X>P`?eY0a!>8+v(jU*WP9t1Oo40^~bXFC-UMydV<}ucyuqKMb30aO|#JNy4PmLx_NM(c7Ke|>2DXEyL&C+zMGzDr76sP=8_y^ zKLwM`p3g;N;j57((ss`zL))-q;4DvXEcr^ms0-)y$V*m$xv56g7#=wb5=qp|?f526 z2?dv%Qf>Bui+e(lVxO!7=pwmu!r7~4dqYdqeY@08SM6`T;<3UB^wjNagTdFHb-3-3)Mf2g z?WwcgA7TvDzc6cRLsxJ^pt`52mxC^S@T-2k-<`=+dJUqiINn&7>Ub}Syc)zXv;MJ0 zN;@jo3cfTH7kMh+D-x1L1?XfV{&fbBh7k_wgEZ^*(OY;zjnPTnTPDDer)FIsRYwD# zpFn&y7|5(!4w>ksr>5l!$z@KKvi4I)3!fYK3#HvN@~jk^?}o3Ou#3YjV@cTWh8AvIZmOW)3cPOhq}KofpD!UO zF63f(B3wket6km9Ckk~t6d_)MZAmr6Zo|7y?%#q@UN$v*p0PC&v5YU z^(>j$s6@a&cwK!zU#}z|Pj{5lVjxLeX3Z=%x5!BtA0ieP5jQ7-NXQ`v)pkuT80l_R zwe3g>24R^7SBcb!s-S3%XCIfutjVnR^+~oC{V9M^8&>`D zz0RJSkdpPjWFnhV<@d_>o1rH&oIU`@$9f-aHXfUIBWlr>ja z0)Fh0ned~=N>Qebemn2Cku7#@TyWJ&gm3Et{2#6__$tou(t+)2W|T~lD7 zB%u>0x8mwK#KYZ3Gk#7sS!q@Jr>74;E#1RN0D~z%rpqczVYwS3DJcThvJSQ#$0I2H z7WnzkxD-(+f^;dL5GpV-%Wj6RwG|R8%|tqLlI`hKpK>OsvZPVxwz8qxbDDFGFju)C zjZ7@}WJQ}nfdm-gsmA!zEMUnK*@W$ld+BJ?0v1)^U7l9wWph_< zgNJb54A2}R#jagX--EN2LJ)uIr%%e;JAPXZo~p{l*n08JuF*$N;;=ph5+!IWLc+HQ zc`%&j-d#ZVJ6iB%r0Opg5OvdhRr#ek-Y5pmO;ym(8NQ~Cht2or=3RQdxt{_HG@wh;QkD;G`WZ($R>XT7F}Nt@ zPY7$o+_ut+qk6n>scYQe(>C``bZ_

z5%l|8cAhVP$R*c#;HsAhTsjF7YTW-U|TIt+n*qZGyTZJ8JII*p)Kb z{ikHTvPq}BQ3DR6twVJ5<$mRIx%H6mzlb7CU!@E)3Pxbo=1ZE{{o^Z#F!XFeq~P@< zO+a>C%|I{*C6-H|rtySE)YL#Ukd(^_giPJY6np!IafnFP@C2}J^?vY{K@mx3+`8C) zB)S!RskSq{f4x`J!r~DxhtZe;E49ptCz8w>fC8!lS2&dmC|BhUs{CfKv6cX@Af);; zLQ|j()c+=LdJOO?cOO~W|n>u>Jj;Tge21>zoPG}a#k z4V_psc-jIu1mvkDSQDX~zwaQu#mAOEVEE&sG`0TplUC@$J$Op`F!=U2t`a-Tg7A4; zN`y6->H4ocI@`aA%47Q{gvLL4bZ|x_d(FIGV4Ija%MP<@*gl`~(n`tf4OB_V$yiJY zIL!l5zkjD?%rGWw2>u_Be(CqCP;cY3Htg~8@ZwPKKRx=#Ss7T3*yDkM^jfx^pEsG9 z4s1dw%Jt4BF3Eb%CeA(NVkZpAYG*R7ac<4D8cGd|k0A5;i8jXsav~^xZ6Gi93^6|OnKoSbD89SCo-0O2WbL&aSDtf_sLHAi>`#Nt~Co)-b{eurPw9|Vi z-o^@t6{<|VTz|NQ1#4|3pd9l;gcyH4o3R_QcLtj8*KRWowD7n!O-!RmV*EX+bmD%J zSOk;-8hP8>DM;d(&?pMQ!nEXN_8W*;sGCT??fh9*q=L29Acjg_jJE%%-=ZsY*&-<1 zz4vkw^I68UDf=N|?ZxyHzO)xph@2*5ilR`oywJWU4?}IF1AWO!y`L-MGv+4&@on1@ z``&J>3X}Te;oWQ=W?pbKmXh)kSn}W4JQ&5&97l5M`{dgyQR&$W%M(i?`rGuA*4^5Y z3dx@OjtK-+rHZ?bD~z9#+?BgDkM=$=JpoQcWMHD@9(ekY5rp$YRMc8;Al|_W#YoJ* zkRkwQi>yD=gfO#A#bf=Yhl}9RC!_7@O1rYJ-%d^~DHxGE(V3d~w@#Q-fiigpxD=Xo zL1>~^wq->@vj5?1mO8cEh_@OOEL3C(ST0|9v666ih!D=4tI4Hh`(3+LZe=549&GK} z%nILHb-H9?$wN7qv{IdFkrWzq{Cw2GpBhqo*HS4WQPdyC{YR)|#(5*CjMKj}@_Wo> z*p|hq{6>g&X{i4p7a;z_ z-oc+kCkeC~4N^!NRK27raH8RfHE$kK&_WRj6VETm61gm1x-xGTEM4XpGL!v=qU>$% z>u#h=pkdi=J2u-}YSB_sFoK47;y$sO4E1tV0%Jl`2_GgpJLOk%LV5=pU14_iEh_XY z?|5J^J+&|E()t(qTO`e-KSPB=SBp*#v0mTk7`V~4 z*5Gd+bytDOp}A{glAv$-`|W6}l+&v<38mATF}~b6@G-ygT`}}W#!>4MHxP>`^AHt4 zo7K4ev_ln7evvAgXCamq`iq#>fQ_ON|0akcN-+x2LAuy47cYpDtzltv;wvr5ILr@@ zRu4)f#cD04PHwh5ShM}Pz2H+xJ4+_vE`V6rL5~k}g!EYm$q*-Fwnk2aP(#o!_NqV*$f|q&uHt zq4eUpsGI70S#*wV)Av*!GWX08hvbyJIyB$jOZ`9{pIV~+r@QB3|Gy-O{@-{IPPYF) z9^}70+)rf5)@A|mAdl~uTMZlLV#=Ig0Rh_ai$d7KS=kBVNqFLl^QHC#dGC)tdK1qF z5HqD!GCfddZSE4uREY&SsO%?PH_Sf>3LxWLM{wNf!eI553Nb$XcxgUj7vl~BCA}q{ zR*@M!qjQjdKTXZd#JBE55E|~f2U5xkYjqMRU-!_KwJ}Vk6g%W7ebP3!|uRg~DRu9ZZ^F>LV=S4e(j?BYMMsN#>N^nV;XjsLO!-&*r z1kRr8;JCrT8**myP7V5r!N8enkK)n_jbR9mY-bQOHe(HkYLUxI9{QaGWCp1S3}tA& zCF5q9ZKqr@e5YqTCvZXzJynH~`9%vO2|X_)>CO9RJgZl)2J+7;!ej+3!(_Dolv($S z$E9NGVe|e_^#(M~W5_s`OVXMzFf&%;b;tg;Jj;(RbTJ=eCW-;mxt(E^*g0~;UiPmf z)XA3$BlHR|mUQ!CXDhous?Ha7M%vg3d!3ibfglzK5K_JhJ)6(?{5R3TZs*eyy45NABriqm?-M~x>k;dVBirXIVlPrD- zBJjW(Fh{JBN8t@Qm3%I8o`_g-o^qh65270q3ctaP!O*6H7Y(lC&+ZlS+cb=wOO^g9 zNPSu-p!SM?1f>vOC?HV7WGtQp@x;Yhqo`5TnIT`4D>>K9e;rOY-ENGw)a(Z}%^J)6rv7$~wo=+zbb6XEs^_eEtcVVW?k* zhcn<${>%OePx@Xe)mIz=?D?4Ekr)n^={eQ}_-DZaF@*X85W0Euf;sGxW7FLjFNOW; zWmwG!xR@t{cR~_sczji2`ej)xBV{3!aUVTZ+#KCu@LkZjE-Gsk?TlMaR-blAtix)p-NEb27y1h#9IT@&OUb*T*TA?uV6$MS}}+9KcsuYfPl zyT=apoUUgiXXcJ30T;3-e<`XRR$6CPC))~UL)<@%xi}=y(~lw1E3i#8D7k`T{k3>b zhUKn$S~a(Z?;Cs<`~;2hRpXV78arI5#SSh2RcCOHMH2K;-Np$+G0T$E6&k6A=cocV zrt&N8(9Yy%ZJ<9@^Q_u~Ec`isQUETg768yNk6R-#z z{5W2yTx)UPJI9G&Zir#aLy87!N%bVopFY;=zJtbizu$e35#gZE+_gNNa1!PCdf#5` zt*rqW#eH5cfMA17-Op3IPxr_D_noNM{?o(D&)io5-?hgaE5ok_mJyq4YG|g^6797= ztjZ06S;id8`0`g}D92=svswxxk?~y~1)o0y;w<747^3cG(U+L-h)L>5u!;(>$h5I{ zc$5o&Thd&;tIPCR;*+go?W~|i@KvJx351!Y*uemkd_)WDq=K1gSQkJ9jGEUfUT+fJQ3b( z9%!S9B%b*BhtPtCK!|^2BbDphIvVy|AaPW3?Lk8PK?uwv#W?1PR-5uxKcHDdRXF;N zVmw6?%}uU?n|X)s3Iw0IFOBJ2RSBh>UnqB)p4uitp_8%p?7AR$PWee%xSB{8$%5G2L0k!#XVZktT*!;!*-Jy2%r<7r zgfE(dxmgufGAb4aa*|c8;v4CeY)x5~0aPrRpi!*L-HSLovhn>FJebxXO_roqeXcwn zunx@$X;h`6i6~AaDZRF^wAQlK=0KB24XlzW!z=AwF3$BoO!*~V&<^S_MertUaAz&7 zpD+&M=>OIlH)u(3a+3WrcU0#jigymQh^Z8JCx%zlJjWg`Q|k{0kP;s403wtBMnF@~ zq%H(mDt?Au>8qwVA%9DE1fQ~m1R>y$y=+zzm`biRVuL#xORG=}-YeQMM9JoF7MkI& zktI?^K?Jt2E{VKo7PACZtOG>Lk{+=RTpA((LgPTz2E!<8y-4(l@yX(SNM|K(bwRKi)CpBaQX37ifiRGMu)zQrfBfZMcDy!2 z@-v)Sw>nW?R~PFmXu8gyM>j0ytBw znt9v*67PzzK!5I!l=m*R$~^Dd1g@0YEe16kn{Oh^%ad;#Qv?t_O?B-#dRmhpILBE9 zGOxp7Up(!Z4^MX$1C}30r-99!&n$+wZ?Ir^>jqbPkv^hlip7C+6~Lss^qw1-g+2XY zrj@?f08}y(qya#`a}+O6ApJdIC~xQrmYcpBYjB&?x`9a)Z{E}79Vv?2_l;d7oR?^> zfY$z1EVpI;{HOuI;$v%}(NB@(*CJr6Y)>B2{ry>Gr}NnnyS+;txQrIgA&D z(c_IN(M@%O@Ioj{%oZ!0x8mGBOife-CyLi{Wd})Ss<*Xp5pW^oF3raSq?@+{S|MX+ zn%`RZfOt_Skwgo;iUnM3FNVR2{AIE42Ou9iv=;6IF6z9$R3@|*{zh`caU@&#zCPm| z#_JwleQhpHd}-di4~V}|7x9p!#otWuD3cKNkgU|&B>6t=baWj%v-;sKnZqm)@7B~M zxT%zMhd0W*x_lG6>K@IV?8dfrjnu!{@7_Zi?{?R*2e{ofzR2$=97}aGHVnJ= z)lq z=4whb(N_IyH4jWE0Q;Wc%bEW?9s(}|4bMdiollV_@INXpJj{BgpJk+p3d8G7e+2Bj z82xgv7fJ7w`|GlB^N2SCitCd&|8QYy@uuIOxFCS9(iE`sz2`rcIA>Q;p0Q@Y3BA<} zUsw4OLhCFP%aNf6qEFfY**Tb6;NSqCv zMQPq9`Jlf<+v-klKU}X2>w?f(b@*@x6!cEDwKK9Y#1iVXw2#gDyUK+bh3Jyj<@hV$02NTJ2Q z{r={GlGG*D2&-KnKwb<``(#y`HmX)v8H z`$P00=|yqt!fA~DsR*d+U$TsqBpKUS0soIWjYwvs7^6II1?fOKedUWLl314~ac1D% zik!}Y9Oqq&jvaNe9JhggjbI)wj4f_{4WV$T>Sv7Pp5(!z%1WbxXaLUAA#f1-c$2SW zf9*(iTGt4R^XTD;2lmB2>;XIr_ZZ+#bg5b(V5|bSO%>G`)*Qc99_b^|qB?D*Isobf zl;$rfE;=ZUJ76{F`y?#?U8{dw{~8;k2Wkuet8*;}cyy=T0h#}Q{@B~!L|Poz05%5B zo`&Q#dHy4CNtl6ah+@U}VEvzir~65uIkNlL>UhZ0^^OjpivwB^*9fT6isE1UyFNfT ziO$9C&>Yvgl51Kr%K%g9OR$3^uGjj`t+yNb1yvWL@o{6i0GiwUIYn{g(kM7mKu4i1 zBX#ja#Uju%wX`IglHkS+02Uq|U5&{@$uRy=@fMD^)dr}F@hU5m?~9usLZ|zfmTcHg zs~#@3uJlUi*5tuy19UyzPO{~aTgoRcUb5x5Q$k@kvCZAZ7{8Ehg~>c5*S3^3hoYT; zw|k$YFE(kIklLJiXi0X2mOBQPo!e2LKPKHL{NpO5{Fb8;__J$Ea)Un=mRr+1MKSp* zfjjYq`Ky&o{prC%KtOBZc`fxq#(BtYY*%+l6Upo+p6eU(h>u9h|9nSfX5wP~xAKJ9 z{+Z-)EcTQG;qM{SKS*O}?c>FP6zgt~4Yci2UnzB5W*)ax8|c@X=!a*yoWP=)&<7r; z=b;lnDB7NDcMxy=I+*)D8xLN)eb3!KpUtk{$J(BsIT!v?JZ@%PA};xBa@ZLpIZix3 zEO8FqrTisWzl_emCF1LZC3JnlBzte!>g|5D8%h`Q%R71qxp)1gr{1B3JdAYMcJWjv z|3cLJ(eXggE&pW0@>X}T*zfDX`|k5m_>|9hmQ065!sOZVxu8LA5##t6g9)%7Z2YSAZ22Dpl;ic`k*4- zp)HaEOcBs19QDJ06t0-wD;ktiJmIk#j^qfpfuIT?&dA>ATOzmVUH1(Pf0Tg%<_##s zokBdr17xSYH^P&cw%VP-tUBF>5ss(skLzNb@WrH|%pF{1_2LWP?@$!PJ?~ru`4_=B zd4%J-r>$lRYj}@HT2zl$^1|FJf(a)Pq%sQ*8$=Y!oD3_!%I?+C)c_FPiL|n^c)2Gh zW1}cq)=7gc;;Bqcmm-hiPds;LNE3sB;=5oJ+O)wU@h~vKJu^_LIDFs3z-ln~ZS;?W zRPf7eeWnu~JR~jTZK{9XH>Q)?66UoV3sJB$ohmD?d=a`Yvpm4-Z40saY5hS08_ywv zY6whxkt-Iuk8Y*lrJx?D%WC2~P=;*?3Zr(E?^=$5Gi*WY@Ofh>( z#wgfS7cbr(lOi$pjX9#MQ(S2-Y{_23{q&i?;H~ad(c+xJyP>FWJQ$k_j&ALOU_l0> z3ZNcgAd*f;t;-aAWErY2s~**YUMZ=;BPn!M9}z%hIe8JTR>X~WfL2e3FqQ?~k}pt2 zMvgo;P^%VVJaW+SQ=HfFA{PH7_s{-O&mBqf0IT#$Yc44yuB{1y$+JxboO!vjtIbkA zW{C<0`3tJ+a(c}8wDN0Dr7L86k;{oGqjBGe8>=QTS+x}JyecaF>q@Za1NuM zB0{RP3SWa9ggvo+mt?)Yy1k#**baA-2g|U3^s|3td=@*5`x}}J6U?WX?|B$rWDt(t+81mIlLOP*hqY;hSCDUU`R{Z z!Cey$NS2ay9kaIg92M*UeR0yf;kGWeP<`{0hF%r9d>WP z7^Z_Q?6*kxx^l7f>YrcCVA~rq0{VqK3{Axkr41t8+rlX^dX^}tH3}N0zW5A&^gRBC zsQ+l?x~@DeS;5UJ>tyEw$f7&gE-kDJRGtt2)|0_Ylkq(9KVqBz)>7Y6%Q*3RaWK!< z2k^xF*q(BX{$_ zbhd`#eyWrH=%BYwOc``PC8p!|ysf|=#tL=OHlkmMg5 zgwW$V+~;3bu`l)s|FuEbo3a2mh|ew6yUeeD>i6Xi4kXf<>BgGHlAx2N#>zh`jVX3> ztFj_L3q0RB3Ev4@{1_g(2`Y2_SW_@i#NrpOI}@>{PfkKA+a)Oz3VSKQ_ z5@L}VWo9FYgXhjShms<{b`7@k=$093G~G9))z$~7xXCS5UJJCVch9hgb;tRsb`#c0 zA7Gf*nik;txzCU|Q;_{pL{m^|@4a=!Q((=HfrxS~@rZ5~-RikAfah1E64H=UQrk+W z;VIo*n~20TX1<2ga3hbh5D23K^n6bvh8LAo7ab_yz)O5NU%zl!znXt7XnoA$3aKag ztghsXLqv0QZbXOP|8Wc7`ux4wfby0#|6V+v*#|j(;gqD2(3?ONJ^mSAxY@be7HSl; zCOSe>dj&vk^kXW2+$(;v1WMWodbFWK(;lTMBjPhl*M`jFbj7fJ!ax=d8@S5!@5R9blaJM=Y(M+w#wUikb|7Aq6y-eB{+|s z*c?DyQb8A31&XjVi`djAKt&For1bmhqMEgd2$45dN^D^V61ALrE$yg1p=vG#p2KBY zTDt%66-?r1arC{<5JA{_+j*gJ*3I+Z=tOqR}9)lfZqC0iMZW6TZ&bh`%U~ zo8pU5I~4sxGzSf@z)mWjv*f_yDe^AkF;zr!r0EZ*g(|AP)QqL!v#R?Ei{al#bdE-v@%G0vop@-lJQD1wIc- z4UE2@Sj8Jk93?~&S4ob#PjgL~;dlZ7FXwqWjkBlgNKW#UOD$CQb4;h$@d+^3fgXC0 z8DW_Y4&bIc2LxQ5LRxqH^fpj!x0bO}_+=_+(aenu@Ro6btMir`MUc=UjQOSt0L$RS zB1oQQ@z|_P);)sm2v!|0#F%nR_|X1HOG*WeFn5L2^b=T0s}l4>Osk6WynZyfdx#Pe zDR030l6?LRXp@6eTcp!#)&8v9ga$}HsFgh^F+x&6Tn`D?563ivJfn)sQaw>D>&h>? z4Hyc}Q!bBk_Zq~wh`p^8@oxj@xP0!K?xF^St_C?yxuBRyl|n8GW$7ngWkbZikg8vU z8Z0f`SplkuOr`h!?!bN213M&+$eJ0M(+(>Lw0F5!EO>!dq~F(ap#$A<{hI#Zz$J@J zMlh{V==q&^2q7sbJpt}*cRGTXtk3%8CFMzOAd%!3wUAs3zo1rE6?>TwgK6#EvxJg9 zgVg(@koJ6_f&iObg2wznNt5h8(&~Hcv|aa@!3}1vlU8nja%M;z`ZgcKHfz!NBb4{6 zl3@c@vTYQa%7y=IsDiFM3UMMj@hUR)wMBYbjQHnf+@n^Vd+SjwJ`*%QEtr11?9sxn z!e0(9LHB98b@!gM9XM$}w>{Ukg7rryM5I0HdKvQAie?4BM6ZQq%-&VvIDQc9H!jJl zrU!beHhVujU??D7vIGO)@e%S;NBKV(tkqwDdC*Uv#iux@;d8GsOyKU*Df5
P4m@=(Qxvf zaa{G?sh65-1;ouw!G<?S*b5)7 zXATuF0kbL|_kh=(8*0L8sc`J~*6NGFz-p4U7quLeKf4_fCTKipy`%C?p5I;=>VujH zQ1#p&#!bnKe<&nKECh2NfXPsUW2870>^Z)PHNo*y5kL(*_8-ED;d7Bj8YMW z;$({|5(>gki6Y`Bnqsm?j0&c*cFIoR+tGk}+5^d*9gsDr-yu(O2p7DXC1&wUw8{Y= z&+!tP5vYLaPMuFOoq&f?-k`e{l!FGvR#EMP*a`T5<>N)2kXiPw}FwI66f@c=M9A@E_2 zaLe30@)OT97{%kK(lXC%6f!DYqHRW5dr-{*H8*=7Kb@kU5(u*zV0}{yTgtLOo=J1O#A<_~~z?1Vu5fCZ7BqUcHpq0U1pNGwjDbKbuSqwZ>~HOkz9} zTy}wRIZUbQ-1UG#q;6nXtdaiFcQ{%gzCgk_ zsi6`V^{U8-H9B6SCa5ANYv4PqWpez;*SF2cXG%k$s)91Ppgwe$@Djsch{GA*#9~&q zXZnWOyMsEC4nbhOc}*hECX8x;lepz;9rqfx_X0rxCk)^6vxTC6rFNof;~N-)G-j}Q zU|O-97j0CG57AoaL%9tM3OdnUyC@1XIv$uEn#Xq{I)Zy#f_yNK797^BdO^)gL69{x z`_}B3X6>)(uaQEqrL&7)goO1fulyj=xqWsXn(rtep@GH|sQbI52lfNXU%y2Vj}Ku9 zJCYb&WRm>$NXhB|Nto0qQ;*ex#4)u4r^LoN=t9$vzVg>C@t;X4lxfzKfSsIMTtv=( zHtpD-$WjjuchvWm;cQesn@MN6Y-}oQn6j~IIJ(xu>mlgcPQJClaMOE_H8au^S3$>?!1GoB0kuNsn;fLWuvDZI{RKbNFAmPwsycB*)J7Pwq4J z4<%3@!vh#OLCK>MC{iOLrATm$Vr!uayI9G{avXWp6EUdM*<_xZ@N{kAH(#>+@c>fd zTOp{JzSAv?$nv2QGev7?%RhP;*=)k5SFs3h@MuonKO-48@7!CzgeLiH_DY0diR>2+ zkYg6_^XdewKnEcL7S)96)9fH4eYmN``STbW(ZSV7hTV6vHTeg^NDe(^zJFrK(CI2f z6vr;I%S_@Yqu>rslk<7GBVcC1Kz*Bdks>VA$g436y|;m9-Gtw_4#9=tWl72kYajHW zA`8@IZ%mpShd&+0(oJ@DSk~AZG}FDKpjBw%AHc67oC}>zy!na@@*}c78SEwVi8oPX zAI$N=yZw{Iy{20W&^!&d>AAlrLBK$ROlHKV6T-{iV~c5|Ocl?A@( z#cc4&Z8(U|iG^7IiVZ;^X5ua2-!a&#b4Gb zry=u`wZ1J#%7y{XokTg6ER=-G=!rlu=tKEVGY2piMojU3>!em>{%J4BnuWPLUFFSr zj3#B>ZxR6I%sYyy%WoDk$cYL{9;807D9V&{abG!@~Oeq@lOvt^@Fr6^LO1iPUsY($VaN*_ge*`0D)k61|fUl%^o2U;Yz_<5I zHB8*uMT!_Bop^{OA*pObcN?Y|r;|njBVXwt6sZ(bERisX5RV6$Q-ca-3!-E^^7bKB zh6?Ve5FqAT_K(kOi4d<1R?qL-#n`iV)Ykk;c;!JrjJ01pRW!TgE~0MY7VpG zd{6(2uSf`y{o^2A`XQ`6SkN{)?h5Q+r$`Ioi(6EFG6h5YGqAk%J192cv{x6)JdIoOVIq#*Rg!uxSQl@ ziQpA7K&4ri2aT(p(bSc1d1uyb)BkH_49t<`T{d>q*zf1`j((vpjE@JYLb~FQg2O(b z;kcd!*WTbUlQ1?eAw$&j*9&-AcTW8KKG^Rj$P3R~Y21r#^5c*w<~A|h-C-XMmhI=r zH=}#AW%PIXvwh$8TLw60Uo9(P8Flo>@EhzD+%;^ndwD72G#X&}rbXITS;kzo_xKnZ zxp2}nWdu6KrJofY!bS%?+HX!@cmo8HG{%`A>01r@;f4yLE31n-@S4(FVtl8tX~*ix z-$-7XtL&tSPhTj(vN0x?7FAs%^sX%1a|lH>GL$lp;FU)vgmpGQIFV1ndz@iFJ33SQ zqAr|%_tzBLiz;Aj+8@NG2n#7c}&eq`^rLcC-KI^gAwSF4|RMoP9D&;ku zayUzMv#PEW$SYbfTGwHgmFN$$D+&wfg?x3B3FFd%#IzC(JMj`79G`($cnF}Y^PVZ_ zmCf&hD)aRpMFvObHKEA(jOzDkj+#Lgmy>km{?d_K#?y_3{(4*b3A%k_tMD(pJ`3x= z3!M8WjXT*mAj!J_(vHMDel zU$lX^Be}$zkaF_*MfX=%(zoA}6<3VyhkpH~f_>NL8_%cpulH^n(xAHTD}XH?3lKyX zg?gFSi>I4MY?5(lnDf5;;5uEH0sAL#4Q#w}Wb9yx#PaB!su$J89g$nS6I~VFhw`e0 zo!q_L4ZGnu@@c##CR)@cUOo#F--g7uGiC{T?Sp_Oh#)JQZJ2idCp743*oT0C(Cwz;8%}?AiGNsEaCLJl{SC;pz_!|oy^&SI|35J_l;1=?eVY?%l z2|&&|=aIuAPb-GXHGCAM4eR8R3tonl!eM94pd1XW5tHe{CDhK|h%Sm@o?x5ah*1@h zMCYLlnc%D91x3Lxe#qzQ86Tup7}={9;8vslE-zr#^_-_s`m!$9tdOszjtK-BD6`eW zwnZDrYI4kK-<9m`C(Y_+Ey2}y$ek%Y6OV)nwd2+hR{8q|RaGI=X8Z|R?L#())Jh3@ zaQoagmUyH&bc0T=JIGbGqqVz1xh3^GCP|?jUR7@UnjStRu$!Mtdj{mM6NNhRNtSojpNEapm8sP zE)^KXmjjtNzBk7`b5T#o?n_4s}~ZGoJ&3*S{i&Tcc3To$r^ghuw@r8WPTFJV%d`2NCb2f*3%jUhNxR< z;H!GAdySVg!4c2vvmLDGZi42K`1hS(jeAHkn8{+DN1QvjUGRh-p&94hy^C14XF3EhbAo zZG%A2c*)z%pOoFhRy9w0ffV3tuA3v9oGlu*6GdKT3(uHC16Wl*!Pj@FEK2w$z!yr% z{$ma(H4UAAKp|x|)@o+Kc_&Wr)5`eBzAL(k%L)A5 zZTWITFZjZ`)g?gZ$1C6cu|ru+TwYWX9VA~ z<R80$Gz%%gIO#EZIjq2PU;7?tTB-k-3r8H z7(jMxFCHhA!SB6y)+O6_*3%-%SNGe~ci~hp^3#hG{E_xulFpRvYg9u4>We*x(1636 zk{Wj@A8>_ld_^sgQ*W+(%z;Qo=(0&o`6av`XXvJF5Qmg;KXG1#{FufL3+tRky)YaR z2cb@gRo2xqUKZG_2}X38dORE z6^r!|#7uA`qPo-=g0$v;H6X=L7b+}Y2_J?erst5_=^rXYoXyLO;oJBAg^1l-P@ApN zykl8&-9XEjq^9k5IMK6z-DYd%k`9O(`;Q%|OUKd2!j_#u}Q2lJrFb z`QkMpY&Rt#ZV@nnw_PPBsaX-)|0plsNsPB4qtMLaK(YElih-zQEl5|?XCQ7Ja#yct z;2p7*588?UQ-5`!wV=%8y}~& z#p#a9E6PN|+Dj;Ub9vjfkOr$XR*5lwkoD2k)nS=ZLC&8mlla5hB5D4HQqx0`gMB~1 zrp<+LenNRic&*}v)5q#yE4tck^TH49^0FbqSRijNPIC{nW`Zw)hk<&~Js5rQjh7FY zDr9Rti%B63K7}8mDavs_Tb!Rcio-XWX=(xrC8HI++pl;rgcjXyAxj5JSg|3?_fpdT zMr|}k*OJ$vrQVfJzT!9;A=$ofm?G&hcEA`U>nQsHs3iI{`AA%iZM*)kiIORt4HF@fmEm1FkdN}K)LJ|3u^WlNW~=?uQpt(HDv;mS-XhDWtKbWI3CQr< zX)Y*#fmEF97qMpfG0511=(!v&p?-TH4ZV0`6NbEWfjF<@?hb#h7_|2U>3rC)3@E)Z zpjqVh9)^cx=R&49S}%R9Yu*;<@W03oYawkHyEZ3Q4TA<;2KJwY7!PI(3=jt_3K`%* z=-sr@Nmfyt5xgfUfF+VdPb)aB|0y;a!Ai|RZ)N6 z(U8HmwdFK{=l7Of@!!_&5V{s~PtyZoZ^h2-SzhMz^#tK2kh3Vca48B0acoU*C<=?C zwtBEl6JUw{y!>_|)P)o;SCPk{i}=OtZH&($CoA6y|YX|5nJ7 zO3g=vb$?>C5VvFLju4st4hHc^ekP2v=TK(t4)+*#zCLtCxIAeS?G^&OtV6Uu)m<-D+7F#gd=-CW%ji*1!ALBqfXt3?6RH- z4=c466eR69;lGL+S*f^gwKeo%CV)KT?NN;)d%33&qxHaSo*9_q1ehv{f#LLOVXR{f z7K0Zkp6RSyO~>rkVF73VDCp+l_ZP;k_t#uIT>+ohhmF@XJD_F+zu^0GX^WrV^V!Cf zpU>^>X>h&x%g4R~qh6=?hh{8t?ryW4-pA9$FE>WLw~sVEzo-3)xJy6JN7p3)V4Fy{ z)AJchuj9gJs;ZF2%WTK`EIZrX%4_oc^;@m)}>CPkDDv6owcl@)i(k!F-+oBo| zx1eupEBXC_UUR60x|H|HkG&7(9+DkKURzPAI4-YxF77kB$J}+iyU3(q6~q$1zOI&C z$|2iXC@l0JZWa%fwMci)^E1=AG&w)mU4caXFVfyRtnIJa7sXwIOR?a^odUswQ;HXN zC{o?p{q3{Q-tT$dd!GH=`%f~NtTnRo%}UmHJ~QKSFH~mr z`yH%##Wz=%rdF!7fp4)gf(_X}V4bGgVkPiWiwS*?4}Iq^W4q(3D3>ozD3!m zcSEz?p(~NAByr*N9h}577~c60V;eb*wZ*=d*9ytBcZ!sh`tgpWOERi0`u$Wsxn$Db z4f>IntD9d8q3=7DJVsbj6!2i$#G@z|nUbyn|_hQWuGv@M<5I!py;R_A7s zGxjZ&EXJifhL^w(Ac_VG-%J?Yc#ko`sVZ)mUM5c~(N`Y$R(aM>LT@IBDjQJ62rVnP z2OPAXaNeaK_KMo(0Je!qB_g5kyA+}VTrjuyQ|@i3q`e{>`C_vvv;ix~%p4?Lm2ktK z{8^0aq~gZj)5(~Ipniid`^#wj%uj0&68<@~^_P$=dP44(pSmtv3gc_CtZfOO2#xt;uvgy5f|g6eMX>pZzN#9^m}5UZ zE&YFqClt}#Q&>^aM{kqGrP4fz{1)(uf+dez#Crs|`Nr;$0Vd@xls3IysYD4M{Jb>d zVww7%S46I$owf5~E5E@u#1eX640hr@4+RLJR=*n(qF7hI2-KzaV!-wh`N?{SSYira zSS0cU{aD*ae!%>oVoC89S7ZS%k~gBC2m_5YXDTB?tOaTRMiIBTE=Cc!!HDKBBKVyU z>G-Fezbpx?zn7*c;GEJkJcuH$2@hV$P4Kx=1O?`?wTA-b{2WQhpAhcKx?2?2c@mz) zpCm{Qq)rjU{QW2l4j4zyh+S~N-I7EV6J&rJmqK6EyVNF802mrg2sSX+7^l=k+Hr;# zSA-k7lO~3FZ0`XQQO$FBFkuewriYr`@TbT@$i^)oNr6LyEo>h z@_oqkgj5imHxmJdVYdQ{(p|dtRt#|0K$Q}j)T)CVU@w$<5rQ2*vmhsm zfkG?`mesF<_ecLQg+xPXT8STM_fhnzIXtZR))Jtgz?2e}#*`X}CJ>1u4VM25rbcZm z!Qgz&yrehxNytK~@wovYWu4{*^}j@$*RsUM5|`a<)UN<|gVIK#_Ur^hUFZ{a91 z&^zi6-v%}?xg+WM;70EP=NCXh6>vuO(p8Kk4ifE(B+4r&p^7;s6bT`7ukzwZ&@Efs zNg;E!I;0K@Ui9b|782q?XxLRk2_a+efxPI3zl|LTBgDxZ#1u#z=Dq1L+@(?Y?2$^1 zTg;g-+=ozFIE)x1=jF$v`+$yGL&4%_Be4+53_`)3P4u-Yl3c|RJ8S~boZ2-0&P8uY z2{mzfpu!IY?Sy1~*x`UkOivU)+Xd1*ey_^^V4{H8Vvkgk{9EM-#(pSk(|!~1@!K_V zB&0<)2!q7o=ks8c_#RyRyU;9W0*F-{U2qr!h9B<_x2KZ=B4{(>pZNU!%tRa5K{7bqa z(GHe$AB*qF$9sAsd7{gsiMtPFF*;nwVdc>Fdh4qni%-ee+mMZjlhsL7-vW^x9dCZ+ zgLZ(rJ9^{+OIWF;a944Bx;tAy{;A=44HAz1$kh*hbFg~UnDL=O@r<7(r#7bkP`QVJ zilTIuIKDXrJt|UAV!o$B1iZIv%@X$y1DQnWh`@O(h|f#GV5M_P3Nc|?AjXEnQgYBm zt%|@o=Qv=%Q(ncfITVlP#TvVk4~g#p4R`d&IJ~fI{zFM-sDakE+EH;61;WP~i7-1J z;t_F^3Bt!X7RR676c9V2;v++KY{>`znF;w?{q8dx9TFcHYT(~d#Vi8;RTL?%a4SMc z>DV)b{+Gh1bQ~BQ7sI#|!KM84NQQ{Q*C%X*P3c%SgowQr9191$ieq%BLgkx><%4(@ zp%cz=K#dx*A5Q`%bC6)ca2Q5(0HixgoPpC-1mgn#F6ejEmYu(YcOrC1b`oN@DX!ue z9Oye-i7vp%1T@@GoJBx&3M;-G&^ajMq31J5f ziB}IHi`hJW_-7Kln9Z#S#K7_)2?$Rb`#+>-UBy%H05x}HllXSUWroD-hD61tUYj{B z>5<)s@c3lHT%LSlX@C&7KK@mT&9NV`O1+~TOAW+qp(H?tOj458JWuu*mMVy=TVuLS zhy?>pJG75z$iu}(Jlf_Ub_6G_|6)!4$bui7bQ@Dv>OqhC{+L;X^--EodBL+p?<$_F zsFL?%#}1W!7_;lgjycGsz})mva9-Gq!sysrWpXAI8%x_ZE5hIXs21F}@UE2XC|~67 zbIwsbs4qpJG-oURL!XcF{+zgALdY+V{W%puK*%o#$TKJ@cY&2U1($Tzj zpdhYwmH##cVyAP1>roY1xY&`y^_<*mr{a(=R8EvV_P;qcac((sk-!@tHN zRyu4}*Z_zZ9iQ?E4w83BJN>#K_qarwVAdiq95S4artbA+`x`4APa@qpN&(?ODdk|{ ziO!@g36fWI7q;C|jOk=sPS7i}us7p(;qQ&PO}(YxeQFTuhFyLMVe&vB5DO`^d66}C z`U(-^xC}g~>e;;YaGkCw%I{JL5#d-bDK%D;)Xxr2J`*IrnBSk5Zu?`b9R8`7d0@-# zTn{-ch@Gt+|9*PEIeMqun&j^Virk;wE9BkF?)b6n>-p`>8Fq&m4(*HDfYYCg^`AXT zSj2YFG!lhkN@Gp*T3ISSC6}!X`+%XMAI;|~^NjjUR)+HemdLLz%t_s$^yb}_Q&$NE z!T9)1R%LTN<)zcu*hL&Y$XW?zLCf4TJzFl!$yyq>Tw2PIoL??%_vn<``2QTsYn8v! zpn>C`P!x=-RWt968oAP-y1vU&UOKY{)3;NckHoE`%*euId#`*Pocsws1SXAoy!udv zllW2HKw}M~1RsrY9TYo&!qyGDXN7Zk=os6gDIf_OvU_R(sY-EG)5sN7jfIe z07Lc2Im0QRG1wp~zp_f;o?~ z)Ggokf2MkltvJJ>E+zC)RaxY7ZFY0Gk|$uQGvLLUbT2VQv-*6TEkXvQw7|yu)hJu| z<*{#MbM32f8}8G}pi+P!(q9|gG|Q>tI2b!f!^Y#XxCYf4boWc7|C{P=H2h+|>hf_9 z%K)aB*coxTUGJfN_a_y(Q{>tJa^zrLcwnyI#Sv3lQuLxqW>E@YbQZaRt`DV}5|;{$ z4OhlrTPh@5m1mlT@l7z#v_s9u0Zts7;&)+lAwFa%d;>uriVzMlBUxqEnqmr4bVUYx za*$h&!Z$vko*f?W1^_|{QaxQ$X)F0}l6R2nVzKk<%kx#_!gddXmT`>Wg|T}gawsHV z2(q~19@Ut0wZxb{(aq%m7@H#$B`-uXrYn|5M!98XeIiWX9cl1s`v|YP_f^Y&55`k2 z?AJz=A*r+5O(<&6(CD#|unwNLFHx>tm@b56$#PV6Kc~V4fC{r#DyPj=zlIWd<277A*Fl@O`RhT;PBD+NINBm0tgi ze_-@hx}u>bOgB;wm9a=tj*W;-TV}M`fqh2npD7DHsAV%-*g+(4%*`$|GnULu|4WWl znZ^NOHEV&SY1{qPEN`f>i*c18=!e9!gte`s`#xjoxp**h-p{d}CsQ5&z2Vf+KBV{K zW&?7r!@@#;5Ibgm`Te_Hi0glrLBz@PFZZWTGye-lD54=#M31a7W(e7ZY~dXkJ<^70 zJ&*FweKn``Ih~A5EA2DBex(i|U7ALG3@V;?3vOf;;bnoiVg8pQ_JyDgOPgd)n zXX^XjM{~!?*NwlZ7!$>nwInj-W<1;a`m%?78hA)cJjOPfxJE=_7w(fX4j3nTJh~ER zWEFM}cMw`W)5{qZ9!=ivzcx-KIO*1UE@l)VvjhEceEV{}@`5_gD%61WeKw=zDP`*)Y-Jj9^&FrjQ^}68X!$p9bAZt>W zBmG4JYQ@HGGY4yVx&Z5ZJH5cdMGuxy&g7nZ{ve7TTh&;k<=%uGH|t0YcY7Za&jlJQ z_1Q-Vne47KzUp4KC$VI|L4%3>`P%3sR0OQe{Xy_#Y#ki~4yc&ru-f~gM1>Kd(p~S9+`??X=dbnz9(66aD-IC4 z4Jqx+gFcAI2`Xi<{#mi2=Do-hsIe!jXD@fNLo%1OT4spGduw_Sbu~B!(Hoj8mf@y@VZIcyj5O}=&CxthweVlGd*TFI++V73w^csAm*hL0V|Zfo zm-t*@o1|f?&dI?yK8uf5BR6a0y3E72ZJGMH_J9iD;NSnFeUvm7n@y&M8cVYcf7Jbk zZL+ih=`pv&*&1gGGwcXvH3?Q~bqi)y%uj@78R60mX|QdYb^YE76uy0W2w1UWLh**b zn(_l?skUw3)dJgY)bNbon|x2Dc!y`P$Vwa9pU;H90#s1OxH)iRHYlISu8IAa=CIJL zaEm$-Jc6F=6sfe6LrMF?j8QP?nsA}|V_PA%_1f+OEujOlsHF6vX6D_}t?tx}!Z$Hg z!5UT>ib4Y)W-X_aD|q%R_@s73Tesy9(mYqP@AU$b-|)TeMRF(}6V}*|&R~-IbP^E! z;BxRAeIh`)1oZOZtrMgLn1VExU!s*36F$+v_;2$miB}gU2{TdX3iF_cA!}6&6YSKA zE2cmd%#1#F=O%l2dBOLB2I;P5T~24WT7S`Rs~aW)K#tIvN|*Ymnb#H}*gWOB0zAh? zg;Cmp(M=de^oouP=bztwy}_O~HuM|>#)T)EodKBpz?!ysCc~O$u^16__mC zY2RGVvY2+k>EBV3bZ~=Jp-fe~^;cX|tPK~>aaw2df6ES(zGi=Uo;hzp{D{D|Re$}? z#0J`8L{+T_9u{a6Uf)^*%qy2QUr-sgVF_OBXIps!l z=Z6F4Wj^(=8;`y?` zlqO8DjU4r?)huiG6mY`{DO4;=b>*fD?2a&;>HX31HLy|r-6Gt*TGyD=w&{g#`zP}` z_vtHo1?CHT$Ibk_7duPfkwnuDfMOuNg@Bj*?P(X$w@mx_-|f#I{{JNK{FC7c*`Md| z2u+mom?5=iP9j(m#?Z(exutVh|iHGYm|<@8aF5yrD(;a$VhT&C*2Xb;Qw32XA< zy-7H~(w#vvcx+vBJ4wp_cLvXsxt!n6f=UPw=9WW|3({iM~rDkzrFmbto zj-`p?$!y(Vwc1{PV4NqHCr4#ay8254SlK<1Qot^N`EuY^<%wW@br;H z68h?;P7f~7Y9jgr<`OD2!y?*zrz%!A;S8gBhp^_`2%W`wkJ)j?u6)2RpRVI)p`)CM zb|5kxQUYc@#i6XPR^v8LKA?98AXyp|cU|-qKOV5>R*O!0T-0Jt((=h0;2O(JMkoY#bWllEybk1iPY)bZdE z`Nn2pVA@z6#UoQB_OV|4yctT+wA(%L*nS+>bCBqSofH12b=P24YlIN#<3&qW_`HRS zoICdK9ckQ;yk4BQ8;LXIe52?X0X)6rx7?cg(l0Q3zs7a@v$*|$sY;@Mf)1H^RlGW* z!~PNRy*ot5K|){ai5^FOX`TPw*Oj5gyY9Qyo8BZMg~cg%hFN==ZdvXn(`~GS(M7Li}_*HKJ4I% zKD^|HcKdlut4GC@hoejuH$f^rZ_KKKQCTGA{R@7UE=E$izGXdUt$=-NdZ!ojk~9I! zZ(jQJ8PLh8c_u?5!7rPsiOe7d(b=zB6Njj?HIYk90Kxm3NIolcBYS#yNkfcUYM29; z8`+P640-L$aq#6v{oQtK`3IxLOQ*B+9tZdXE?yAj_YOqQ)7}y zFju_9U*m-JSmZOgV>$&5leuc|9UhV}EU}B+XHjFX8wHlyDVjBzNEstc3-+Q>MHnFq z4vR}B3(g6L@sMiIKOLX&Lhl3~8|5jK6=1i1NB;u&qM92u8Q^`K@E`qn-3oe=QYA4f zcCuPA_z;`_KqY?r2$HJAL$(;UF&m z`{<-_K`gDG)`UjR_!#a}W35moUqhj-zfaY)A9q@Q?3Z)Tvbh%f*i8Bz>p;-noZ8Oc z>>U#KL98pYL6BKNTod|Ln#$*R0y>+Kay0joX(;cn$~BQjWSmMvD+ummW#R2Kqdra| zYzuos*Hk;>G45kvpe@zp=52Os2nfFbx3MSPp(?w8gdWdQnMgl$B8)KFG=^6MRj z2StCU7C1RNR{3dOJOqKKwBdkt#_d6!rOSPS3xbLnmQnZunQ66Ken`g-_ z#??Cg**F_sEG-V69}I%pmM&w`8CE+uT*s0tno(i;9?U22b6L_9&8#baCJad)mE(9C zuV;9B5Jg*lS6h6OC?;j7kG9NIv+yQqr{`{euP>dsE8H%ZmIiNo34mrBLi>~rzQnRm z$$ZcL_1*cUfr73??v+8{_>`-suM+992V=)}2@B_tF)fPw3Pmhm1Jx&13fmhRGV75? zcISImwV|kWYO%^Z+X~R&mB+VBR~Jy<*LGq&QSO_mYG;i0^E3gW^1aF2S6D-JU7mll zvvaZk4-y+h^+vt_&};*}R9HM>(%DldtkC>$YURE3W#lcG>CxwYlG~ z#j|kIjh;iSEx%5Ey`I(Hd#H{C*QeW)&k7A>-vY_yKY7W=PHqd8NZlupIeS!NP9`fa zFq-DLuHXAQcb>0X5y5_#i!9OoC0OM8R`2=rW_7BVKFd=%Dg&^vq0Aa{T{a&*KCH;E5XVY&cyd|{wKgPT_A&b@>FU3WYII9@@UWo(C7|=B=Z}tv(e;(}(>NNW8nCSBZ-`x0URW;&N2?PBi zs8u)7R4aN|*Fr-qtyC*XILj6NMu;hxqkYauRIIjG7lI`%t&|7nzhO%d7c^qOXOzdT zxME#1<8+!$6w|AGyc@v-pb|%=I3VFeY6arc8nlPg9CF+lLr^eO{a8$^!YQAV z{Vwmc;4Tk`E@9N;XR!kKh!lTGtP01sNy7}R*!;1y;tu6;ph-gZqOgIT_pnZcZMoA-2{|I~aduDBA^Xr&s>~ac-BiL+fX5#O6YBg?49IFq526iCuNfEtruf=HDp5D?-GFASQ179JU-j* zI9$bx=FU!o|MCK^(j-1V8Y!lzCZP1`1rMSkbinGmQ&oUP3Z0=8Jt)!lPuS?MpPgb* z1Fcii*7A^R316+Id@3K>o8xVy$W3uwANXGe=QC)k9n6$f#=N?s6k1F0WFm zbx_T}Lh%woR%88FH_|n_Im8K6e)m6D@U@WB`i9DE^jZG2nVvw?r_wErLfBue8<#x! zVPI@p(JjdUBgt%-iTwhd>=!=cXMKB>^l^&x1kcM7p79k#K(A3RP75WGAo=T%04fc0 z4~>e{$>ZM7{7Ret+z|hn)iHr0al&*I-3VQNd;evF7nAU0)ykk3$0q*~ z`Y(f&?8$ZUciS(|&1;k5{-C?6?+LC?KbS8*{Fw|qi^Y;yyO|B^pB?P`+A3I{UNd{+rL_vdN#GCF$>P*O-y$VK{%~+U@j2Y<)A5t}fWMeN z?EXIPG(5joe06VnaXImM{pcFNIoWX#v#3CbAnDBNCJjMh-z~C2(rEXWgDFG#p;7|t zSh7?plNRk@ServmX>k3Y5fL}rKVWKuFt;x5FJsRZx22fny6YDbOBw{)%_n?oGTc&r z_AO=XOIUQHr43h#rdbtwNaLT!g~3h~`NP;BDN|rJPtOyOs2qtK4?Eazmf zbA0BGdOulT%NbSX7k^7rv4=2G;GFqI4$`<+KI55vX}RGe)%EAzO#3l-R?uW-N<449 zcHp?!nhlvFj_Yt>g4sK3f&Az(Ep+R@y{7zm9AoN-M@9LuGmAB>DQs$du8Z7zn^P0< z-Vj7EVNfKU_Xm1D(%LF9YyDw`b;|ijb;;|I@TYwyd#Xu7-SWKFx($B3O1vc?H z%od)fn-0EfvGN9Z4hrnsatP{)WEgFyGDdO`#QCPH)Q4iyxf|9Z* zzQS1~!g6)B`!2?s&At+}f$8#5=#bIeWWwlWABRb|gq90y+t-aa*`EL~k{r;tds`(ytNxl1wDM`X-SDcLL-)`!Lf20Y*hFcc$plYaHKiihRfAf2ZbL z{!;HYhPxKSI~XqTL>C;9^pJ0dGUCFdtNflH>QuAosP8qjp?d?$Rr8;WMLw_i^a>(9xY-}h;uGgTwp8LeRO2s_PfB1XjuKj0(?^AwU$J3)l9 z-Cflq<+fMEyphOl-7HywWjA$nLCH+k$JiT~*5|S=79UFBmxG;X$#GF4@gRb^`S=3w z2HTEh5ER7Qw`I#a=zWsX^ELB0Vk+}h4ZUGfHV)XU6HM+#E0S^{=i!zcbHO9xC(({! zr}3lRPCnBDhP0w+IO#h1_KCoddB?tb8n1b;Qw>)~!7p<}G<0lDHA2~4kxZn6seRw_ed!)xtSiV))8FBBps%2*S+w_y|UQ5L*dU`q4_c+7;K<=ZS&qH9T6r>4p(wV9?W)_ex2CL4c9n_A4Rto0}=libK@p;FQ8 z&ECxMCxAbzGZEgkiJUJS=i2)T=k26iagZ28BwQN3;gj-)SgwSLFbSsWG!7%eL#&0gvzN4XGH` z^SgidQ^5B>P00Dz+t2?2^oIJ6Kf&*ZH(3=Q6e0IFw4v7{$aX4!t6+M+$;rqRaa)4J zR|&)Mj26R~tR!q63?De_TYUxA*xy23B_BE~JzoYppT|32U)LvdCx6Fwmd9|~ja{C3 z9XBJ))p;V9CLK?#zy1kl_coN*e8YZiCSN}ul_5SB#@&R=6>5IEf2H&xngj~JIKOs0 z@BUGjkq@YgOh^*!pda}83+rv{Hj~&cJ4%&=>qtVb;67j|t=(oFSRjrdW{jcR8G!Lp z>vg;T{dgk_VXvQIBb~W0m57nVL*#Kl>!BP)*SC8UK;N^=Phx1`e*G4ftJi06 zgZ*ipb!u#VcpZv$Ho9jtdcWt(rZ>H22#ihoMj2L?_QJE3kq_Yb*g?z{;;v z43g8~kf{OI?a2#wmsPqC^u_oRys@7sW9qeVOZ$B6vxwq&=oHNQ`u+9N41>}`xZW-Q z8S<0S!Ck5Mz6$TFtSVp^-dwenH)m7d^-vuP<`xjk>{;PwiP>P)NLdUqoaA+;K~EdH zh2JS6H(Oeb2+xg)+7UY;-d3k@J?D-*=+{e1S?Ll){V?-YZKEE>siK1Bg$*OCDntdc{T@C8-Ov-{~TO~GRpX-#a%qU4~+HBV`T=aTrH(%K1hss|?R!^kv99p@wSH`OGlHZI>`H;>Wep`-xUTvE) zOg1$LdZ}-{S{thrUa-;Z3^~3m8e#<{FswNBh=i~5%gRb8fyk8VVN?z=#}%pe-GeJFZP*>AJ$OuFOC@|Z)#|692Uk6$WclcM9HyJp`9D7n{0ZPs&+v#2Us9r5_}p*ouAe8_w!T3fB1H%F1FKi#vNk3QOLg zlK&|L_R!(!3Elgtt|}IP7P0}X_e>OhH(AdH!)qBz>dSIh9v!zZ3OuiFD;wiTd&&ap1(F;sp|NRyHuv#HO4N7pjqlS z)xH-Z@=IE-7qmZ@eF6J5LQ$Y>EWvjq9U)zg8)UbC=qv2!_81hAM(-zUHlWJBYDzG3 zw(p;qA+fc_b89lxA6uGv;wp)y14GXNIMAZ{(egFTj64DNHbq&`bn|sS);0G(z09|z zgzEfajk^}4j8doxT*jdF4#Pe&w7xMb5_gic(GkbDa1w-rbyOY z_yP39r5`bbQL9_|_+5z0q$}x}r(26RbkXA7%*9UgW9n6tAhg(>&Fd#0B3XEn zv*;FC!xx?&V`anoa!5BT$k}jhmHK87^9?#h+}i8k?9?0|{#*Bx|Ia9Qwts1jGM+8> z-%#%S%E{ILuORm-GUJ9i#8A&r0tsx3g!g7BP>i#prP%gutxR@aFV7esUjF*oXJ2jn$ z`3`%dp_VN2$>NU2=*oii7lvF7;@_`+QKvi1esJPi^A8tp&7xeZ!=k|xTM#5{F)JyP^HcwRi@53U&vK~ zM_k}kffw<8+Oqieo4IkxvQocgF)8WN>Cp$v@b--97PTc7fTp%u$WoKSur4)AVRf#r8ooe-XFXOQo+B|C4!p#2(486H+W2_{35OA(%=nCjQ-MpivC5 zCIPN+#;x}0;K72JGl{VVsuGb=9c{rYxR%GV8F!vIT-mtsXCd}rh6a=;u<4!K_*t{_*BKw7TL@h`7?cOb!KKgUxYP_Cu0h*#8;}|R0JB(N+jy< zzmD5xCmYu-M96Dpo0~1wo7E(w>&8)y4#%g0nP4MpSw@`%`Fo#yb zf@^tfqM}S20axXaGmgpW>k`L?C-Xdqh)GqiY~KE{5s_UP#+_HmV^&DA;m%=wB^u+W z=o}~+FR6Ye*rM*{zU8oqSq7Q@Aa_j!X{$mlY24UU3;dF@QhuWdf00aA9v~W>geyOM1M_Yx;dU_K>iYE@U4>C zlfb)Q)}f1N?~UUu*&HLz2Tq1qHsrQYR9-YM8oSCc4@DZk{7W?nTlp>MNz#Z{O=J^0 zG-KId%+J0~hcKZ_he=!_!AEdD4;B&DKi}4##%5jEpPxh}hqu+MTr7EaH^twg*(d5b)v52cBr?B;W-Y;$}7Bs)M zl?Zp>m-tW{X3NZ_a8Z|)&BoO={1j$ukEQQ1L>|P8ZWpc4GfSx>6=r6h>Xs(@eo3aC zX=@f~oTQtE%!Q&~rj=#J7_Bt7wWt)Et;HTY*O!&dDk|>+c1y zwK!sTHiP8*#CHFfMugH((~TcT4)$KWYo5rMiKn^QF>&?2bWi&l9G1SpOctWJn&Wfn zE@Nr#?ghYv?dqG5`LlIXqlK2`y|yLM6Q)H}irx^(k z1NGI9d!Od%AEZ4&Y6tz}yVZx=$#b7ScjM2Ctopu}yO6hDuU~g7d|ytQ_=f%vW&k*UC-LGGW!j9z75daY0T+BRJ&}itd+6!P+b^MF~A3 zpmTl~8OWsZh~-#rAe3~Zl=rN0B@nJpV$wYmtGa`)&-mxZ;w&p!9sO(dcA(pVFOk9? z4?b(CJt0{uWFb)FHcjo0#R%m(uQD5B1*6VP9U==y(Ww&Vw7t$CErU&+j3Y%#+=Sr* z9{2G5?m5pevO;1_`briW$a#UV`ZF_;t!S@Lik^R#;!HIK|16 zkrkyd9OZi(Ea~WdxJ4{~X<2PJj(!13fJ~hPMW9^zS%e7nA;g+XA0)8y8W0f8eNmi9 z2NSRAf@Ffhn*(9~1_E$w&olo3kaQsWi$DP#UmU>{ZtdtWGHH63cvV!;{xa4`(v}Yl zkFk)OLvCMMmWT@BwsaScd|H9L{SvAz@LZXq%wglr0o- z@HR#W^;kp;dk=(Nf{xbRMbdmZ2%$$XLhSSgWa=Q(<{_g;iVQpskj1&q4Z^Bq*k@XL z0LR~?5 zAt~x3MVv+(bUlN=-=?6k<{K&!fiQ<+0##duF5!U^O%x^u5!Xt#2=NI`)YN-jc37XW zl}A#7y43K-aCBv)%T~~VscsP7vWwgh?s>SF?7B5d`i!8aG?6wwM?wdiLoks0%y8(C z3uGbvQGl2uJA@Ivtga9^d!%b2JejKsAu4&XbpwDDqT7D}9r z0~LR%dW8=WvpV2lu?$ZkRfBhcdL|(w8)c6L%ZXv2pvbWoAYb;nVEB-D^Ux}Jz_5|( zx&e`9uY?U{Ksev{L~>Z=B_%JGD0j2{T5=euFH#3w)W;UViZvbT7B2&~L`%lPi2;Mj zwzd!$Lj~Uebxh8%x^2nm_mLnkw0730V6Ij4DGD&BDRIIK+}X8U;VD}sBUeRC zggPK1x%GAsD6bDm{llt(6QsB!gNbAP5NSb@= z{ExIhK7<5URFtN^ewIS+QH)scpJ7!Q*Z(|_<(2>Ck>zK-;dRG`CA~nG6KwV{W{v+1WBZ+ZqjdObCiLnXVW8E3~jw@89)g_sX3-&Ubn(D0$;6{4)LWcf7dKz1IJeSnYzGF| zP_3I#dc_=vTPJ^Y830Put`Y2EyLw=kPI$*a<|b%9eE-#Nn;3rBsgO7a?p~|txH5er ze4iT8mkgA$zuQS%6N3E3O!!QfFTWRLSFr1$5M|8rtH)Gf?zk&FMDa1}Yf1>{%zQIt zIII`Fquw@#M0S{C{&G3Z)ZL9IdihFPrl06Tn&28iedMuB0flPZ4hhZzQ(O>C;1h8> zWx6E59Xee~Hw&BYo3LH4Qmj{BmBA=njlqQ(=|hIlRQBnLHJq{^0}}2k$1VySf}v*W zEn_9}v<%O3s8s!*nOH0k|-oG_%{TI!!3ym4{zAhYdv<-DrgE%nP}8J2*6!{y^o* z)7X7Zm)GqoT`h}+-o4*3^_awJllfY9lDvHB;@&g{TctN^8V!V-7I?Bf|BZ_LX@9pp zo#zgdy)&&=MLbt!%uTys(lnZm#i(jf^tdXlP=eD__J%=MQ3E0EUihZ$edTkWME5rl zIfwp$a0a4Tl9|}PlN%| zp)9P^`Ucil%Vy31_k5I%Xg&l^!a4JO7*%Y9&J)=f221fZt8441dFDVm_*t#V=b52r zCN$+BOA4m|nOZ^?C4$3n8l>sMA4lrrQcu%RtGq6_8PEd1ZZZ(RXo*3$vD4KC>584e z@Cl7$ZQTkT3b&Kd(NQpBjdvR??}r?`UDP4^7a?$NrYAP~Ev4Dk5WN3Bout=}hUNWp z6COFM!fc)OOrJ`YQIC=G#bV=Rzk?D*7Tt0q9ZFN|RKtH6l%(8;MlwsW=WQ|FBnTsA zKit)V-t{-o1Y>7B0}R9~MaB4NPB|gggG>EBdzl0!=efO*rZE$1W^_M9EKv-@ z6AZ705)++B)a~$ z;tH=NZW8fay^&sO0HyJoA-d(^N;w`M!m>^8$qy(g`!eVW2HNqhK`y&^<7NaMA<1mB z3En5`de(8<6)HR2RJ5$+t9WuqTnM_Ey{!hm`S#~Ki_ZK8+ZRd0vaXM)!&%HzJhVg$ zGmXRERO7tAT+rW16o)_{?@R-0lwSvV87~PO_{a zu#IW6z{5OV$9R}ABi6^ny3GE2x$chf(@*cO<$W5(yNNd=_Kp=LH!TejB44enb4|s; zxP($^8(OyE!${v~=c8SOkZTR=$WH8E-e)6^R{qe(4QoUBZ4vc$})}V)-}b zqaRTcRfepCig;?B<#AEB_(c$>XQH2%^tPGtP%*~I$YOL$*UTOdrzoy+$VtX<`1#%Y zKU-FDUg$8xTQrM@+W1tkoy4Dw*%mnV>*y~Q)wdrZ71^LlxZN55-OmTl|1b-R>;FJO z{gVX+wedF#YAD%vkUVebZvd#uuc;t#hCiGC<|S1*e&<2;8f=g1Ee$u?=#WZ5E`6zR zb>TV{IHK=?MC)6zxu5&zL~hOJ?f&7CtNkr1P(4m{ruWc&imcMLxAz9SWb@|u8L{|J zqB7yN+12Z}BmqXenLdl&sQZ{eKRf z?zwQjRQv%(-k=<0OCfB{pczqfGW>Oky{n~!D!vT_@0gh~jgK_;0FhY%&%x594bo0z zsyh)p?i+2))7gyF2^W;L`r&ia4E7+3X{uj+^VU~WuG(8piU#=O?0%n{KeE3RvlKTy zueV@EBcdsbG9whi<~A36B)b_w&?f*#i6)4l-I>LqShATX!4})7ef^pd!dDV~1#@e$ zPVo_lAi&v-RZm!ts6{`ZQ8U7c5Gk1CUQ@{?tsK_9_K&!1=iU9pML~h%sMaJmFr+Ng!f>DHC^F^~Ck+WSV?lE7w{;eLpC1W!(B z_y)p0qzQ-Mbfd%|J;_l*>i2yHwg_bqIY5z(l>UA)KtKmpQ2;SotHmJAfWae6VreS|GQ@w+wz^ytOLlWCkk)`ft%R7> z=Ko$Yh&gwDqE2yab_h}v1`>%7A%Pu4MFCo92#5pk2J%cN5g9Y6xq=B##wqaTjMy|q z&i}fpF-@HhvCh@i16wq*d$IiTr|294r2rlkFW%=HX=wzkU+E%8rSN&&d9V;aU8Kz! zB>!^_8wkhpbv95qcQJ-F7J+}IKzyWF?fJ$=h#NG7XEwr|P+Kh_rt+VkO(KjM=$%eR z_m6G@&#|T4N#nZNmAI{nzz$f-vQmV2J(?OBPD)nhM46)bKVRF+iwq@pb<0-MdQRcA z@@K#o!<-DPA8~WnYxdoL<~VtDfO2g@FlEy@S=Ha6hc%DCzwhb9`+lkS5OEPA*wdvtEt)sV-#GxFie z+mL^=v+%I}&oZ01c=-Oc!tX!r+W)q`coESMG7F)$+x*|XFKTd}t6LA=Y-J;ocBZ2( zBJ2|efY_obOo@eK!=U$=Zy1(wn^NfNq56EF7n~R$%$0lcyG{^>@LNb=LXX_{kipqJ zX~KX_V2+qDNa*eMqb$F4ILlWp+3nfdOMx1ecI0O}v0(3CQ_>bMXXk^$A^PO{gugxV zlXRnFZ0`M(eU?5S{TR-g_aveep&6RWC}4w<(70QaN@L?vHs_#0(;ZL@hOOBI_g&OG z()v*7$Pd=X?o*ZQuxyvrV}~_oG^#wxm~Yo`O(Ez}EWua@rSqWB&8xUkVH4;jt{=Ls zDN|xNwL&_NV&oLhmHrN7=l99js*wIB6pTD~X85N@NWL@`wa0B6Zm$MSR_GH1Q=Wv4 zu?Bz8!$RuArQ*u`M@PP%6eBz6XS)n4$GY&9nfYFBfd*IOC3B?+GSXLndAh{k! z2O9jr3_u_(&^nAI;V8Sm(L%fVA+wB*#5Kz<3uiu{h}Mu)&&WY|uW9K6SsmXPa2Yov z`gMse_v2Hm#g2*#^*JnfVj5hqB0>o#l*Jks_Eer3((CTSPCSM}u{1_H^bD1-JqJUb z&$fo^SJbQN0W$p-r(!zPpVo|+t!$KsDIcEP)B{^>TPcOuv>T%`+mj6|x|Y(svQDA4 zH|z9!J#>EiglnplCd@zz%5>**^ za}LRW^*|(@nDVHGOWX(tOpeOJjuc@dsJnm3`D1XnyR5m+UvMfwb@*jMH~u1o`~6sC zl>yEj{;WM$43<<{Of1p7a!?4p;*4xi%(fI&zn?iUBIyD}R$3HRxuruutL+zt-f|aw zUnTy=jaJD+D)hPVcgH8UWuA*Z`!v7hspfeFmh$Npo9r|8xRst}7oJk7H4aG^?;_JOz_0glQH6n`gbHPf>yu)}97 zym6PjC>nUC7LW}vj#8M51WsDMW${HaST^c*fMn1xo75#=v%-Lf_HKU~s5KC~_BG93 zK9YX3XIB9s5DvN=u*^3%aCPG0A z1^fjOKAE`HB2-L~cGBP?bP2Zykqft07Y4iQm~gyLy43F4$+0F2xoi(X zrVF7CB|m81nTAaZ9+{8 zR|KSvj(1LM72>ogPe(`g^-p-oWmxr}^p9AX|2y~;6FvRE-2}Fz?6BD2fAWibhra;o ziNglL;LqUk|4A^~j>IL_nxP2$`j#5^k>_ekEu`q2uZeIk_$#@dkTmNJ9d_|`Ej;>( zH;-}N>;C+>==U7P=iBA^;dFZTaVYB?mL_Wss_D{c5254c{`F3E`ZmO&=_fwZ z|2milbd^%SFX4xPayr3Rx#$aqKd6E;)0a1n_T9C1YwTXnEt5t^H@CG*v-QfnMZ6{7 zxv%M71E)VYJvjaJjs11igICk-LX^?K=y7ZQ%yqow9;!XW^hGhVvww>7J)AaAjw~G{ zyS#@la(K-pedW(oK`;ekza-_ zWP^GZf`!Sppp=^nxitXgeOWq7B-YtlAb?c1&%g~wxTr7D56=Lx&0Qmm4WdLKt7Yng z*G&y;B8nZoDtv}2v}VE-oL)qL9>b2 z_W_k?pSQSDxyd|HGLW@50yp5a6I;|eXA5Jadgpr1uzO^CAt138ISzjqSs)|CVn~%sNo+|^$~>`6!I#uTdpa|7TA@Y?%E>+j zy;^OMX@ps6!o6xs4TJfeh4Bb0N_|4;ySpyC{D@vr&fG zJ%S*bBEd04l947AzH*&X1bu2d#vb=K##X2RVR>ji>J&r@1NtgW=oYR_%TleLdMN(F z%WpbgVWVVm7)GjeWZEEVTJ59wWm7%cwXt{eHCzO&l0b$(@1d1QGxCD4n+~Bez1o_! z7Q=-dEJgKLbz#&r1l;td?vnu!qt(n9`VKjS$~_^PrSdSVcs?jwwbWIOU)r6IVdlJi zJ2)yq3|U$?u-HiWPB&LxON$BgG9#>z7v(vaKIR#KIhU$sDGT0*WGkDumlLx4>hOu zDC7-~TV#U0jcR9yYm8&Ry0`KT3^7s^M<;IfXZUYJX4{7rRJ&v;760@=A@s}b2^7qk=;;#K1I6KPtx@yx)U&lr5lRRn4efT3)3CQ! z2D~ZB4J*osA`!$&jjey}TGoCIE3hB!i-;a>b2S+9LA5A1budCjl3+nCG1;Io(O&Xs z=|X6ozmWR#rzusHF);eU0J9N>V0ARMu)?7ArJo{T%S34yu>C^w*}}AXldQZN7U%UP zxjvui^>VT`A(y)Hj?WId(X~TmcfTi7{rm4RA6;^e<9`aU+5S5K6Z5}QTVDTPxtn!& z1_3q!JCH}JkNRA$|MS&vc(FAjDp9@d2a+L?cqvYTh7Y=;(8M4g5MKKCC>YTP9M+TH zyISwtb*;f5_qsM_#Y>Ml@ zWQJJ-pWe>mK1pG-`1Jg+e7khnJ01GkDQ0S}PDB`6xHt@TdaFJ9Qd&@kW}F*9DZ9DHeKKz!!Bz?qJ?FPjnh&S7c(fD0 zY5h%igiP$S&YNuYEl>|LicD{%&Y>wk7FFpr)Fq_D5nC=*b==Vea@qNV$<1=^ehqA$ zyN2BA0zZV44;JKHv3&?6KNDX>SOBZ=JNX(sw7XXPa}Jall7tT;-@Dq>E-!jJZ)KUd zH9t;i`kQa1<|U|O>03u1wp<|pCz-S6Zwn>Fk-|Q$wKrZgI?wHZg}y9uvoosPeDjGT z=9z;j{{|)x#<|RXct}n1nSynZOk>=u35$!boMWCtO<73ZoPKqsOHbRF9(j?i(tMqq zYKKJZ-l)IHwvY9*`cw?mUiJoCq(dsW{v-l@*L(lh=u2qIlbDQetL>SpPILd4m8 zojueg&CVUJIuZMG&3?C2Z%nVY+{DKZBp^`YPOa;}E)(vRu64wNWqV9XxOYG{iZ{St zdiAly0$!3@sX^mLDUhQWVzfcCaGgzYy`hr!E@AuFQgcfJAX9Bk<^g9&_AOVf(p}9F z`~mN+4gV}>bzzt%tXo-1s@Z&p^ofwARc9PW@-L0vOcyN9oimR?L^^kp9KzmO_ z2YWZiP!2Ovhltj}tWQFvrQR)Ql_VKR-noBN_|j4E%-@JchGCj$4%|XJ!+A^n!}VgM zhSzaob7_2wl=GNg)12ZmjMRw(d_#^2(5Z>n<}tao`Jn?e|Kq;(7b9qN^-BihOJl(~ zB~bZ;sWav?lkbFk)62aPGO1OcEX5m!ejZcs#K!vj;3ee*g0QG$wfdn9*upZp&8(TH zHNLPMPI7j+^pG)m%u+>ksN#79Mx*gda%-7W`}D>Qwg?oJaz2WxdQL8mxqb-4Zmf~9 z<^ZLYoS6%jDn}%$s$`&2>4>Fd(q*5CH?QTUz0g0o#S@%d>0lX&6y?I!zS2$DSqb<} zL+Ifo0PIa3UhX`oN7nxB(;qvy{m+9ager}^!P5euC@)G!l! z-4k)lPspI1@TNAS_q-l})t#&O?Nm?gBOsQZq%HV!hehhNGvtT|HO%DTAGI24F&h$& zR!1+RP|0>ETz&is7F$YM-5Es$e6s1`F8{mWw51M6+^Brk&OT{RkErc*DEFXrwM`M1X0h=23B@)>Q; z$#dQp2#<=8{D1QD?Ee)NJ0ly*zrRM&nvA7xh1ou(dIJ+((W2C!g954#xI*00i64G^ zR94kk`|hnHPefEHsl35JmyOn53%aSHR6urdf05swq(gI>Kjw3iX!)q6yZxr<^`-Uu zArJWYvw0krH!y78d^W7z^BXNGF_KeTcLGei{rf@1>bJqGPo4Qq-V-aZ198t(*MRNxj&NWYt3=hx-t?hli?YpIGo<$7TX(}bm% zWqUYcRTGz_bE*pDajcKox>trO*71Yt30~Jy5{cMxVQ-gkZT3U44)uWGNOOC1uTk3@ zuqSa46BxaahUf>r$>d*kTvyQA<=e+>Ir@_|aZ=7^YAqJQo}T3S@7CR^TZ&tP7aw}c zjGn!@;h0fJ2JdE!xh ztHz16!On6VvB4G{c5eOOcSF~~6P?mCqA135;!uUp7}>Q_T%t@%$|=z2<1Uhr%U}FA zhB7p>^ev9;9?w26_@%YQrvg(X>Hp>i@2QelB|^@y%(10FtFV{ARyJ%$G77LxX}G9| zB3{E^(8tM9l6?#Fm=4}cDrtOyKvg7dl^=B+B2gqU4zg?B!||0QTr^MYpqhw>r9clc z(oDppio!|RM?rd61Of2uP+OOkmV4MmZi$P`Ql{=^UX^yz@ccOb_*c%AT#CRZNpgIO z1F~EG3a)i-kkBufX~-s|iKHjpn~@GDDL40JE+Y$w?|+(6Sr-PO|pTDY?MJgYk$j;EN@uR&Y@myLbi6d zHrH1DB(@6e4YEX9RsgJD(Oo+%=1?=;Ec!U-ox4++?;Bi`hc24)=j?d(tG`C>QCWj# zEcm1SJMSK~^)7nVm*US5&Z=JgW#pQb7lznnN9~g-EEy%xg|TXa(QtlDP_^IMWHVZ_54XU2C1r1#7m#9IZV9@ z$m(>8AB9+*vpFo@WEqM#b7r*DWo9o*y>wQB$F-3Ez5$*xfh-$KAY=M<#Js{HGe*Kp zs{W#WJ<&cI)A_f~VU$;34oIXM+Ey?Nr^@&PNE6i1Y)60gGQi<(H7sWg7BRG(D8Eig zoUjZ95_CO@{&HMy^?GihoLG%r|F%Atc&20wNY#zEJU;_{XVJMBtD{L`{iubAVbp__ zP)KlJ3GVbZt}F!qrhpCGC;*ounBgHo=w5z-Pgy;7$hT?_t2XVhoKr&(n$l!9De^8H z+{@feO2{NM8D6s|2x}*ykNtR!!IzY5f(1mkmV_tJfQqCU3W|4v`;InTP!*NG)(x}Q z%(dSgO(XV3c!?dCL=blH0{tquF%_mYW=nT0*elWqNR-OGx_%_rEeCvTnH{1zS(N4q z>EJTGs(<37e+9C^MypbUyS-kiV>Nfu?G#sO+Z+x~4fljTGU89MEwbdkBB1lE0NeIDi5@ za^sP!oBub~ihz4m5NFvn;Z#$%E%Rny#yemksKWVBl6_$Y*=t)DtjZRYh7-^;TLlMe z&lcb{jqdQ7xH&aT~HTOkktaUTS4wOBrzvc6wtLDlpJNsxf`u438(JKXL z_^ia0(wQ@AaK8q8}(BDymxuG@4gw>)>|+rO*f@nUucrSsPLMAG6@fcMS0 zkvykfAz`bA%uB{3KnIxxqM?g4w@Bq4dXM1cxH#A6vndxqIE6@ zVW-iyotk^1o>ZEgubN-ECgLTo)w5lfLxZ~~9$Irx2605!m}_f3H|1=}(;@-j*xNe8 zw`CPV!&{K=X)vr7FB+XqTb1lK71vF%ZdMk_El;=1$Dild|3sK%?o%V@{rb?KTEot{ zePhEQS+&)8r1Yh(?#|lOjAFdD;P@mYR7UAB#2)6#vl?LWD6P679if~==-C?3Ii&Pi zpcgJq53<>-Q|s(*05eJ}W0mcF3eNvc=y+P{)@3+I1-4$WZje?0WnL~^EwQUZ*!|FD zF^%=W3Cd=BFJ9F$lc|F%I4xbETI>6$!ZJHV>^{=W@@hC4-C`~AUa*r?DoZDCjLpW*@Q;Kx7d#3)3BYgh>oo;`R>N)ed&ziCfb%Z8~ zs(%b-nehUF(jLc#NAuk6nK=`jSn(miRdIq5XrT4Xe7G&~$0q4wcbqMk-|Rj_k7mO` zQrYZ$3c5N@l2wgrlC10nXk~dyrWTyyyk~1mJz@^xisEth-{{$9J+3)jFTCQ-UP6LN zRy>yQa>RI!k#wLKJGik*!r=2N)D0>;E|BXPlS|G#x;{Zw-}3|dm=!^eT`9(!a%Y^` z@-DoYj9d-XZ~Kwtz8h9%Qdhwx-fn}5oJyP8LYL>TObO-F`!ks?0>V@#4ttdD*(4^S zM%xC0msR5LmyDhd&dDh2ritN(7xn6R7c0m|w?NQYpAXr&M?Fz#AEu3b?J+(383SXR zz)7T!^3g^oyS50(6pi16Cmh3tsFz}=na9>%l!Mh*L0YtiL{xFl8XEffZW<6}-t4n$ zzw2hdifLwLykn!%^<}fZ1YvRXY8kjGi(>t10mPO&k&2gV_BAxz9uhk z_xBBajBH42B`bp8Pp~GhQiglKkJ%=wa(MnzILz^Xz@Yv=>24ex{{~oH)|9B-WQFf} zRy%{^4#lnkgvNtp2Jn=6{}GUzopqp_Cg^^=bqmejCzR3+MmA3{TT5g=qTa2Zc(h?m z8u2rY^!M}h{Ek%1yL%Wtd5)`H42$z+)SUKYUA#15RMoI5Me8^|J^%Z$DRBAh{_*+u z^t@~}VeTmy9!0nl-`P$x%k2a7gZOtpu3mLN*berCo3lF+z!#*Mwj-_7p!YX77uD@Y z@MZ-^%3-vJUI`ZPW9i-ce2jH&0ukOFZFaa^ms8;^!a<;vr>wF8?W%`O=@W4VEi!7} znp6=!i+a4ut1<`Jb90&JTS?B2`{1HE9w$lsN*^Pfylf!U{HV~ZOuW+t%A^KyCX~tC zM?X{7B&$B|x$=h0QS_-+!(#4`(@AJ^>hbD2D<*>ByklVe0D2ZqL*Z?vJUwRMy)T%s z7pGm6gfKdmhI)>NfxRkuHk7pm$?vge#gIBvr@Tz=AkXou@r8<>Y-n(9KME=zckD+B z$~fIG?hCI0(08ZT7Hd`pJON@HPx7$~z(#t@(gBM(=~6FoCXe1yzxJe6ogs^XfPQFlX z?GsX019DQ)2{Km&8Aae-C(AE6xNed_`O!f<8AkceSGING3UeZp)G(teGZ;`cgyrmD z-09uhQ5c?obW}iJjruXemZain?-jHkzS{CI%~Bv-!-`;&H?oKFmxcR$HHyVUdU?-{ zA62vAW$x>2l>^$cooyn+r05%Oqk zFu3N70&nDH*y(}NP^&C|g?V-H*-n+C1nZ1kQ6RXDQpInp@>pj|H^9yhDLp}XESSt_ zd%F^JSmsljjpYLQ0LbnucFitp?`|f1$lss3X1o{AB&m$2^Kjl$^j6K(BCMzNL(#xa zOUNY^!RN>(L|qwA+{V9!JKLoFM*I-RAkRwdekex!6t1ed0=jb|d zuI{oFvX2rHs4&w!{0U*SqZe^f7Oe-UH;7p;!>LrvX zXCIAIo%;-&7Ql#xU~@H}J;Td|)vOEBT6Tp=?u1`PII)bwSdtN~(D=-sj2ThKD=QmX z89>NR!YRE*9(NM3Xeor|!xlRL*~@3L7blxR!IO(?;0#86M?OZRnH+SM2oHS2Y@ zbCemnyq8fuD_uz5e7BMF;rVIwAsMiEsn#lL;dHjZ!}b=z!|Q-6K>wxY>d4d@HE zc<(pVu#V0D=a{A~(?1fOPqXdytr`Jy%aNGao zJ$A0vFN%ASz~DARj2ln5Al2FR(_ngp;d;_el&8W!Ho{SIl7j9S8d*zWC38TJRAP$C z(qnZ1kAQ8f!J?f1@&VMICac3~)?o%q6^iZwR~i9wUYH0jQF-!^W4@x_!R#6{AMF;% z7-5|_p#+DOp6LlBD%iRD1>568s9Stu5XO%7aC&=# z)I)uXlM?^~*eSbbqz!LPtvzYxtEz6l6fEizDdW+zP9ZoD_Fz3o$TUR>!uFTSv6Z$U z$4n9!$~VtUy02xvx#fM*kwTDnBZkbT1%Xz~h*_>NeKiE6?xv(NM$+m2Mk}-~4l|In zmyNoWF$tdZV(-N9@okPELID{n(VG^Aw)J=&cm?O_W^z%l7SPIQAE>Y462TKoVVcf` zCbDMlp~ai*L3&>wr#zlss4%-+qa2_IMqENwu<$UGPj8pKY4ZI+B^h#~;taQLQ?PT@ zm5A;W?(h!QYxDjC4p3V)QA^}dR0ymjBG7h1;|oZ_i%VIOtoEUA&lUk9UQ!GTzLjFR zBgFY2^(fEpM{3*e72-cc1r0GB9y4|69l~ougy7J%SK=`%dM) zuA6M;=K53x4tNA)0rW^HzEFivkE~T6GLc9*De!jt-ZLn)0n=U&Z@!@|ypQ0)KDeE+ zo-xX$yrf%3FLLb@saTdSluk^BJ4Dgk2bAGR&MmGa;VN0Cd8M4I*=V=#9X>(i9c@X5 zWvg*TZJW#4i{U}&`W3E3J+Ud8Vffn>mCv(I$~h4~L(C&FJw(g|u_8vy1ra706{|UB zQl`XM5{X;DhMUSE(Uwr86ge?RMkzAn87U```2tWtg2*L-v7~wlBq%|$`L=~(d8Uy< zx&o?%WUH3#A`D=DOl(YoEM@4ugxiAhDTc9PBT1+Y)$4wV^!L+Io4VGq8-sp2VD2)z zfv~$O!_A~Je?iw&$VGD6_#F4K39EgTcB4p{9VlimZ32%96Ea3OE)6QNRAG zrK;kBa;JvGdRrK}A;WT#8+rY!8&1U)hTMTNNoLDrg>HKNPrr z1K;orw@hITnrofJ;C8*J7x2)@sBM%9Zk?YS#a6}SeAU@K2n|2)`8UrZq)T>QPg-%yJ_oSWv%Ji3_ z;Zjksas|UuMBp6sNVK;ov)2+ooJ8JAHjG!^8A-I1FX>Mj*VPJSiZcDs;A=-0R1d_7 zq@-%@j}}7jvIjGlRQ~+fSoVf6Ut=dukYMDdl*RFK`n=zEPA-zMv9-dL+3kGY^~w45 zcD$aRFK)i0r9JP05TotCFYe0fdpw6mf zGOS5@Y)is@vzFa>r=|xPYHb&BL8R+Njytx5U7s?LwGT$T&n`-OY)aA{)JE6=X3`C* zkjdD;mOXGG;}t{C{=LLBg|n`jQNP9+G0XKQqPKO7o@#gy4*pNhP+HClIg=0$VpqmG ze8ZkbN80AHUgT&4!|C$~ZxcpUY|>*(lCBFX?ZjLm0i)$5lVDHMi_X|$wG*0F)v2xq z4RBjt++#|4YfxH{B(O;Jk(x*E0(~3bl(S|=y>1W66GcyYNiN;jN>GCBw+(PK7P7EyH_Cj z^IyU8GTo^lSa)#j_^DK05wGJ^Le=PavJX<;mos#GfO9dkK0!cTH!jH^9guXV(`_qS?*#S~=miX0}3b4ZNR4owBQ`so>0wVcbBc+BJ0tLNfInsd=D*)-qsHHogcAp+w_q+3t&OPtMvrd<=Z=ksj+jW(2uoYSB z`FkR|3V#1BDKGdyvr^!i8$e?+Csh5BhPOa$?7@fja5St#mGP@iPL<`ViLwJdA;`5bK{=h zh4@BiG0Z}NQ061*oup86aUslx$mb#gOlNT+)$>?(VIkc8p92xW&dZCk8zbF@3o$Pt zz-kP89l*m}qlZ}!;5dYb@{SOg{rRbDg#J%mJlJ{kFm~gVn=v8%#UD8*)Z1|(=28MU zjbSc8gcwdh!Yp?&{6Yq}fHBIQgmC;W*oc1_=G8)kKZh0~#N33B$S(0BM2PVT7gqff zD=thD9WQRIWAHBZ5g#szO^ASqVT+AbJ_B+(CA@rz0D&V&SdOr8K~$JnEqkU$ShyrE0-O=pjIfXb zIs*KliO`S(5doQ3h!F5x;0M@9iUEK?(1Z2^O+a2XOJR>|^^!%f@>4+AHRxt95JL{I_O8fHIyJ)IV2j&2J# zp7Cex$HKOS3&3P}v4vAe>3@n>X(NN1XFeb(jDDKo7Ital0T!CMKFH-3eh3euv`6;>#4$owwEi<#R)d}SXML7J!YmyU<{3=!@?ncbED z&v@IR-NhR|{pZudjyU%SsvdWl;Kpr!rWj@XP(lC(Lqr9`p(a|xe3Wlsyp6vQkI%js z9~7GKbFD>_=lEER^%xjmrV0pzBG0FUUSWx{VmhAuFxCB2yNJO1?MhMz_Dw_;Gf@LW zL=W3>j;`Sb&H{Wx#>Zi-N6&bWpd4|H>MT;|35Ey@wt`$z_@`W8a4b?N9jk&4j>8;% z{VD9RU2WGEgXaug!vlOFWKO5k#Cey#;SYQ#TTtj0ud6b?_CZay%VP3O)T(1s+(lCvq?;?21dY z<&!}DDBk?_K0YWlAtkKX7$S`7pT<99pfcjUlQ>F%6IF9eCI4W3^Q4Tp-(XIj`Di%Tv$@hz9=PV;0oTN(R7 zy!RYK!$Ew=pvV6<8<-cp{+A7JAak%moAmt8*`x5WRk!AL5Z_^owq_3oP4{sS=QT&y za1c-6aM^7QJNj8u7cX!%oSr`m2>;qL@e&ttxPTP87w8@9;2<^(k?Nr*zI_*InI_nR z3g1{l2tD%Y9BbhaZs;zWLJBVuByNE&F1E*L)r05&|EM zvmZCQ(;8*X3~Ys~hkGUQvl4p7o7jPvVGu23FyrsBanG41(NgRS@!m^!28!ob-dT^g z=sz=XO`w*_mmN2a_0RY6nC>B!^)Acpc3+896q!lP23!$n6_>8taLW=3Mu|+Dy|Oa& zYESRl%oX6>Q^v$*j>@NPKqGb|m4HFvkPQCN;%1e;>r(mP>-kFj{`|8%IJlkFn=R{R zS9|;A{liUicX<7I`FgxOSk=lmrPf+@T1&gz)zQ(*-R4QL~1A7(I@4+Ff^yjIg%-35LYD->5diwW@P* zcvfvzx2wnf>Er2Sv?{F(t#wvT?Zeyewc(7(eD6M^)Xv|y4teXGeO9&LPQ-YBB1Vtj-d>564aDLF(oLlJXN0fs zgDbnb+x&v}Pr{kI?&$QWZ|y}unbLNZQJ`Vea2c>S;`Nh{b12l^kg0rA%bfGr+|=Ug zRHn&CrAE#B0tf@Ng=3WS|dio=l5_c#P<8T9AL4c(b$HHYpYeqFDba!a~w-aXKF3e2}9#? z_a}K>ue}^J&(v=ZxuqmI5QSOmNaKa$gITHw39YY4(g;K9e64&~%z}%CePAjtsMGrT zgKFSgio4NuGH-4@Fx6{aPnjfC&+?kX_zf`U_Vw`}9_ZN^|4UvMS*LN^^Nnsyq>{X72ZU$%ksx=&s#(b$_b8OaXX%;HPU)fP z6IEX%nkKLbMT;>IP(&dixMRt-v1Ax`(+InG1G@D+EWuM4@+HALMF zF|Lw_3oX$aGLJ3eULzg9OS-T&a-peV`qlxiwv77#O%kpL#c-J{*~y);Ws1=2%n2+v z?yHC4(M(K41mt%V)m#vUbbM{1Rf;X}Wl4KajA~E1#J^vZZNEM9ZD+!P}) z8b#mh)9JVT>gP6vKK^2%KU5iexd>l=V=fe;7KYMBv^?_AGyo9|kkgmS z3%IersS6LU0$!=6-p_9_Pp`h6QK*lTqZOIp$?7C%lQmxdTYTZt8qn?H;n}FoJRA}W zQyRVxX)DBSk2kz+%wfkM3MvvSD*WD;htG);beV*afH!$mMo@1-FN}sfYHW|w7U8)X za7pue(bpY*>rSyo=|jr5AM8$qo&URGhPjVn-WCWu?72BMaX02xgAXcPGwF$d>*nmD zi+Fk30s)`WObdHcxcAauzm0~UQijxUl!j{XV(howFThq&^l?#Jh;YfI29@K)6L}_d z-kYat8-PJO7bR~kedWxdL5ygI{wV!?gA$tNHu4=v&~4)z6)R=cG5H3H5HyO8@GXkI zG#{*W)xHC6(;h%ajc=G5Xgj1j$)XnPCKHy7m1*XU{Js`rT_l{^Aj6t;@Ix%nl7(_( zeZ_b{a+J;E17#UnePXr}QWQ-J-wkcb7%Eh;kY!~c@#bG1L?Y9kNx78mjhh-7Q=+xp zHFS3VuG^@;Z0(hT`zeq5@4aXGhvOtcIGcmDgIL&W+$Yb&r^RzVvAV*Yet7*{3s)uEi z1D^Z+(fL~Ry7b|>+x7k{CXsL~Kl5EFH(x;P{)|O zRf(!YxPu2c4Ybb=c6JA<%ic96;+}=_DyI-8zB9km;)Md#;;BL^ou}xI^pdm`Q1LUt zV5tY5{RHBIS$s;A75S29gVqAs_yLPKmV#*$ImG~Beje=xg@t)Hk)3WV6T#u*SFU;h zXnoxP`u=h<+DCsd#(p5iSujZGMhJA{^=k&57x#BHlcb#t`xI%uQxe2tK)D%^h28B> zFsBeA;6Er1L%Pmr0K+JbfsYg1TABevAl3QNtf-1^0a_5+Md%yXV3i`oRDinBxao^w&JC%ne;jH*&Q;wfuItng5|?4+QZ5t_ z8CR1VM@6Y-VA?^Z;Ycb%R9W$4#$T#4LtXFa8PQwKU+TebFDLQ{wN?DAUWY7Qw0Y3@ z$txfd%O3h<1c&CX_kHH*$~H~{9Xpj&8PqZ7I98m+AOLW z_NGDKZe5v&>X;H1-C(k$xmkuxPRC8M6x=CIlyOvl$euUYr{&%~nZFFoD^=1l6xdy8 zcF{~#vf8EHS(*53ddLFyB-gY0^GtkTL!A`~<)nAa8!65)Ncaw8`W-aQY5G{$hPvMC z&D*O(vg%V($mRDcggn@u%%xOaD(p53I0PXeJ zN8ywXK<&4KA~`G~mnnh#=kcN6Ah~o-bH3X>PM_~%$&gRA(&7^%vA@ zs*&oP88caalc@9?Gc=4>@%=jS>Cv>6c&)}pE3NotfQC5>Tar(rhNG!@C2w04U~6m~ z+&d85!2}c=R3(Ulda%OK4^}_`z0!ebk4jCNH=^!14kCv7yL}JZy%q2S1zXLZ@9Njr z6L!EG*irbYJ&!iq$xbDX5Ip);X`JJz+q_WwMd-Nf>nZ+{CoP`<1q8!!WmKWxXG!)- zuCK^K6Kg5|ZCEH}Hxqkq)a&D9@7>n|u<^ZYUmnL>-n$cxOPl}n2nvEN9ea4as5JVD~Q*(s-luSSaB z&*u3Ys@o_3>Gk5ZnTbQ-;_D(h#MX>^0GcyIu;nP=YRwzoJhWzg^A=CsdIcZ z35_vgqP5=<#4go?qa-*Zu}3Cj;-j?B)m~_Aom)Oy{re%u5aa6NN!q zj}`nqf9}?5SSptmX zMb+Vvef2ud_A3vbah6>r24uzV=diYc$y+QH!%8gOY(q7m=f~#w3v3EAL9{B^fLTE zq6i*p{4G&=>k`!cXo4vO;?Qod*=ICPRAGrY_*7-iK-&C0LU5#_Vm-O>M z;WQ|MCW3P^WZZ!}M`xX`!SD$z1?s>gHO1`wnRQ3DX=oi03(;+S=0}(zNh0_#AXNr2 zSlFRBlK2jo+|{DDJ;8(tQ%z5pk*PT<&+|3(9^)D*?rdC9Wb~12*KaWaY#de|y|^n~ z%y{mzH>K>pVNuSYc=pbiDF`a;IOBh*vPccaK$vm&7JMU=NbZt@YH`imab@nWx!F@5 zoS683+n$kW_e>$|nAl-^FvMb?PDZ!RPG-~zX25_}%b(ndW|$R0dmVlaOkAVM=JX{OT}Zlt*l3eD^+j(B}PPPnRb522X-?ti0@y>1ob5*Fp=B z><;K*DJx(lmlVV)xgm`QNKc-s1Ww-`X1Pp$&a;^5Oj#)|8vPWgT7na@8qz$@_NsNK zGTv~JLFKL@xJ0JrG%%sRkE-?M^t>i~@RD>(RJV_i5=22c)zgaGh~5cD9iywf_DF4K$*rbt)G z^;X69o0T*<$KLL!r?@8WN*0qd?3xcBXNxI&T&jVQ1S}k{gy>m^&W!%C_y8sW#kVDf zl+7~X3OTGeeWNO>$v{J-N%*rN4b=1{KQ1GxU{QfF0(bLMsX(WaAJy&18oxgSui0ud zZih1vpBp1KEq0=ix2ahh9!y$GiB6bWuxbj;4W`rmeYwv1Z}4f)THCV&Xa}M4=!*UH z;fa4ft~WJ-<#{N-!7s&*E?3>Ni=h5gY9pm_H5Mv`m(L00ubN{u^`3Hgobwx&-}1F~ z-ZoXM;5S+n`73uvaZIbHMwOB3J%2z90j^IrvlXD)*=@OkpdL^P4*K5h`NubI*8vLJ zPvpM2@4x$cidky|KcW=GiX_l)!R7|70GhN#FZix(=vy__XnKX_>iuXCgdJcG8x2%< ztF&erykLf?*=82CW#AKeJk-Cj_9Rrq8^)&1YbZ;z#MS7y)obJ2ejSYzyd(0Vzn;gosH{wKH3%=q6()3g6OrQfo~^p7$< zbk8ltBcLnE1s=I0`W)=qZ*|*2Sc%2Q23*gL%ebXHlvauDB?;uF(BJ8Ve7?oTl7_X? z^s#<{8hw5kpi)1Lcuo^tx)VdY=}oL}yJfC>uh6{ochjy;bQ$}- zX1nz#Z7v9fYlDp^r*E}pQu?eK;{o$xMxXuNa%*5tHRo@m_$KqrdypDdC(3F-J1r50 z#j#hGc)~g7p_to=a%uVzQstHBLkuT?5rBByKuL;#i6NBXq1To|Z5Ug0{27SbBJ+bP zWrPL#B*Hm|-1>p-H?{1CLmd)Gt-!AepKmbgIV3s-96 z^uGw92!68$OBPzg8tmnKcnezd?m&RCdylxm+w5*#Y9{dG=-d2}6-wM-D08N>%2dd4 zmuB#aoE5H@xt=m~<(otazjQ0mr!NUK{2z?HW0xqv(q>tpQjU1IRP3p%i&%%sIA|`sV^rrLidUDEgAAjmfT&9BC0`_Qr7(+{7#$01 zbVhMqQxK($AEk7e62_hm74i`XP=ys)G9ar8$bI227zt&^f!hNM%3bwrFM(Ey;DN5E zsJY(ml*4$DtQ=QVu!E<`gzCWlBs0L0Q0?BPSJEwLeK;HfYT43O0(fk=-}IAVSBP}l zU74K*02j7oZIl}^xd>wAWIrpr;e20b2H;>EDXV+TRrYof?kF&%iS!APVVyurezX|c z@lzBchP+W~C%swF0}6d#T>6{X0B53w4}B?qy2OCH`N0#lCYO1iV^?1635KDTpvJewZk4-KK5cp=i=VvB zeZr|0SB}d)9)N?3(ln=`)qVQNmr9+ZqLbg}13n~aRQW%i!2fQ{nBjja(v~#GevcqR z&kOY{u+r!r6~V6=QYpVJzZaEvuwhBsd9`)HNQW^>D8`u1VqY59IKj zJOlLW%-RO`w(r2j%jv_PrRgA3f6b{56V;kx!y6e)ZT6U$7yniG=YPGmYXeOtK`XHK zAlhw?5eO|vi8XEf_?+rMbyreQpLSTExVK3o))O6Sk3LV+Xc;b_4--4MI2t-D;9!=UV%!sE46{(r#K0ic|gvm7KxbuTpeYA6G=EVn=v3afPR z`fmxK4VmEz5+yc5;xD&FnBDqOs{XmpkKAvsA=xKK%?MZH<+{=d5ZKqZHffPp24YFA zFggFEsQ%rR0_Al_SJUnV`oO@AnnB?YN5h;m;?fD8$rT-|l(GthTMjJXGsyOU-f`_F z{{!(?kF+gaeg?rC-|v$7FP~H+uY|=MA|n|TQSh#qHcatJRG;(6IGfq=D2J_Np0Kgm zIg@)+`k%V|Va?cO>9>q@1gUU9%#)bO@pSf3{i!_k@Gj?kI>(dQ=7S<4V7uZEC?>;p~swXYOp`^D3+$JzL8KH zRfk!t^Vg)?vUN^W_`O#mt!Qh4h$7xS7c>yoywhd%;78lrlkK{*NG5f<0q&E;UCH7` z^qaBG_;0YHfqW>ENNPWG*gmW2`tYlEb; zv5cGi=g>?w1zCv;s>cz)soO>DyaME46$WQw06BKk#$yMfq zMvck`no24|k^sS#IVrqd9FJt!(kBLl?zsj!=m|4soAp^LI5CN4bwi~{A#-YVrUZXq zKUM6&Vh&AxPrlDtSjq^!JFoa_#;d+XB6?3)8_~V>jSFz7pK4f0F|1h~uG@i#DQ>agjVC=Qsp2{;MKbD^VYnJilou z#E2A*o043NkON5p-`7O$7FI@3^#EZsl^7Hl$$?B%1WFV+4M16SffZI_tM11@*%T|P zsM2i)f)yvULFgk!{cCI9AHx+LW!DH6qg!`M1mgjkpMTjI7ZyCHpifm%`X*KtFN|aiZL757JR)Nl{-Us%X&69Ie`SWry zL358oa^LejDAVe+nJ2TE1Mi;35q7e~=O`q}%P^e`n2QXq6J<%0Nd}v_I%IcGh(Him zB+OYr4QZC}U1Fz%(%?N)nZO&R$c*p1gn(W=2U+j@5Pw$Pprd9i(dnAb3z`4m^!DMz zfNIW3W_`di7Lzp@df7Gh9Tuac4mU9z-m#!$*%vFhj3qhruq9`nHBO6yVoUS*u*Kbh zAG;4^a|y)H%8F2>6MkV{YC*Pi?^XDQ&ae9qz~{ZE8(Z{s%;Qa$cVTKq28 z1_6>fOif8U_vQl$#7Y}y()UPv59Hdi;HKORG-Z+25j&MlIDW(nCE>L(9_(9E=G^M@ znx}Ym%=VGs>%7&?!x<=>UlB4$GfEjXn$B#Lrs)c6M96_AP^f4rq$|6ncLB?epT62`~>dekn^kj#t+2gMne&c4f0mwfntn z<5!;l{`G;`1$>?aIrx@mp#I`F-yrvYSu4XQUol_iqNe>A(wYurtpOUyO=oJo;*x&h zUsHb`<*QxW0%qvnh;)#a zPcZ>%Rk4j&d8$zqq5F*^mx7BCY91-bcg2#uf=TGA>D}o}f`g-}+y|sZ!6cCS0tyCa zdUz6RhNLlq{j$|A6jtcgfvDnylL$MYsEHfPQtYP;beUsV)t8l!?7jUl$x_FnFN}ec zve=QI&0@c=6kY%jd#W_#Xn3Yz-B<<_Ya(wx3$#ptA_HI zKvMry23e~nZAtddEl-_m7`l9twmFGeT9L45S$|Oc=AVLE?T<3e_+)y z$!r`<^^QIQt{74V^63lXox(cY&?iPJXgHwd{=5=!CYL4Y=`ft;7$~(EDSfXr*GgJvnrPx&UVg1Ev$(DKR8#F40+Bz2{{+6w^r$RhMMYo_ zJP{2M-5v^C9Y{+Iq$W~?S53c4Z^G0*T{uwEK+w{&=nM-m)Tp+B*jtK_UDCU*fJj`d zC@g@uC?#($uWT+;+Wz;? zAmHW$^&MD^REZu~6b^V9unTpQE$0r=4fZXs~tUWW&ap1 zM6FS+1?@t(wy=c-Ysl;6K#j8KphdeN_N6vBJ_T287YEXA z^>lGDwuWFpGMwtxT@sXno;O%54EmDnW^`3G1*%~HH6YM#0p5quMK>$+vym)dSz`lW z@U(K4bQGQo;)3qqp(ZiaAH~kVbYI~diR;ZKH~af0-)FJ#mpP_YG3km)wXMyy+DPP; z&M+DmlduLPZXrm#4whTqj^yhk(l8wIzsn?K-p_~x{%JH@dC$c&T)0!hz%gd?iSLza zyY@{h2h2s&p-51$fo-VE_Nq*@$07pTN1zQY zi~;o8Vd0W{tJKU|gZe0xeqPf)mZqEcnR^ZFY@f_RF5ExcE@oEGp`vp784oRTVsjwb zkH!bPUXsfP?m@@;t168RNQI3mVqOn)KI*eaxq6t34#Pb62T?MSCF(381T01QNchtkg}!X$15aifVNB(^se2>734!fHSD&mvc)oHYFo2tx%s@6K51Xv=AbR@rAT88Ll5@<={_!dHKADrLfO8 zm*+22B}$>}@66<7x6G6#!*`wzgr!E2-f!b~*LRMuSB4&Md-9^CLUd-{Y>z0$aZGMr z9RCf=E17Scm*vC0fy6xF@8wTUt1H~?ouBVpXET26s%~u$>rw5V0@HRJxb_|zS+R^s zCk?vnUDWJ*rLer;Wur!tfO*QpUkI^>D47C=NN*@IGxrrCh|a5o5W13hA`s|^XnSBT zDq4O~WIR<|JVYsm!s?d}UE@FIfIqp9fqZCQ7SLmPc(Vc9p8BvB%qkUa1Y4&v?b%tg zYu&Ax3Lb!eUS(G160|&GoCL>r%IU`LuX}DFvt*Ess@J)CAcLf3bZ!W*(;X`(+Gxzz zoC?;%d$A)Lm;T(l9We*i1fzADwA{Z$sAAP;=1dPd@k}D5=%uRfqQd>?ch75;qVJ-n zv3FnhU+_nY|HSRy>oa5B2wu=)QF@28S$tA?Y{d?9uIM+#X#N~(!;gClctcAKTfg!B zQDWG)b=ajX+XPJ0(~ch$%Z02lbs%5-;L7h&-uZLVwmko>?cvoPQ>Lv4c>01n%Mt|3 z+}uJ}#Q|sNQ-wXiq+Nt|1DG(%wOUVcVhSNV%MZgr&Qp7af!uZoZv{+>#i@gvSzCK#M zHNiw-{kcWMOkKz6btYnRa{(CW?jC^<6seouBNA-YSQ23bpR*PPv3;x>=b~Z=_hM|^ zJadO=C&AVgUqs$@8^2Jb7uej)a+3en_~a<8bg|%@n3;b+kDUmHD#YC49*xaX!Jw)1 z$(j_K*sD`|s5*O1mk`g9%U)m!eFvOpttv52sq?=~tM$^B6t601Q}F_(oofP=*igZ1 z#EgPl2MtG8G{KypQUKGm>_}iW6mNbqyKj<}x$DY}J_;us#^{(@%f~4yaA&8mBwkuaIfo}(W1tI7)@Ld5YXbGi z<(jz0?YNi*Y_mu8+Ys0Fv@BN?MC;r5vC)}tXN&*laaAj&PQggSOs+-`J4z)V<<`* z*uz@Ih2WL3vm_N9Ybp-N>}nfxo-*ifJ0byl7CBZnNlg=HBE`#^b=A(Kb7R+_wT8zV z1kM{6Y5GtsI>N8x%WC$?0z?F(5I%tH_jzkc6~|W5hSl*%8B3+-EV^FMjkF~*X~vF3 zXfY(+E!DS5!Zx)roR?eX+rqG~Ipdo;)Job*E%QcFXG$k_$CPg*E4E`qudo94S~v28 zJjKEhrZ-Mvw4hHruZ^0{|2gSz96QCgwqAuu9myb?NbK8ivs@jaqKz^^DZtG;nN#o{ z$?<MSQGt*@x#?rVsU zV^333UQJTn>4em=Vj>CB#j4_V?9)Vl1v#hctE0V?czIMZ-R68oD^KPsUQk=kxmnVg zc0tW>x>vT@E5RO+b-iz;HVx+|a$dmHiK&Ba9w!(-YfcuM z-ak1wzF^oeUYMLNRbY{+aX+bS}Z_2_HD{KnZpS6XuG+qcrSCv3E@ znT}DQ66@Ol%8qCd)e-KPo5Mm?9p*!uB0M^nu%VI!|7j@~bi>~8;Ht0E-Fx_=d-|NT zM_w}Tf?Lf7#QT-X)AEc=!hBQ`0#wqZW;vR(nwPJSX<9ny?kHJ$GO;j}RIIP^PJZe- z7-bFe%R+eZXko46YNR8l+FQCWKS(tBvFj+@>$!J?K+pVLC(L^5adt|npVcVPsE_k z_@wb@nOBTg(75euJ8cdXx0sgN-r{PrUv>o${8f6hy@npvt#)04<}n1;85oSIQaC0y z=FWs3;W65(K@*~z$JH6I?W5o9y1a!i=hgmU!l0p%^S;H7rc-+Z0O_B_GDRqslGwf3 z$U*S>^c=_k39GxR)9@ef@BhlQ!o475>t zwu>Oj?Srd|Ch}6wTM(d+$nNIKf?mKNEZ+oO) z5H2*IV0FphBWtCzO~5}Z zggD`oy75r+7RnTHLzJ=+C38ma+Y@fCv0HX5?-|)Bl?!&h#G~t{k+zsu5_~{qargvO zFfDCF=6IEo7w#&`*8E|Mni@=SClO&^-P(3Y4!1Vwa8+sw3jmGTWVoxtzqP9Jtiy*Y zTavcT99Q$eK|>#Xpj-4E1(bBsOL#0=NL>k^d(v2-!#MUCx^<_9ItW$5J%+;W*QgR_ zCZ8-lq24&wH98NbDS{-TUkTli$o9QF+$1rkY#zuFW0Y1sB=!!YA9nzddN9da0pDm7 zC|lH37->2Fgm5AlATV5N9|e~P7&<%F5Rm@GCZO-Xf+0PdizeA+T3cD+6c$}_uLBS2 z&t-H7VYQ>iogzOZcQlmH3aO`8=rMR)V4_nE)}@x0Ss4NhAIQ^8mq9=u$+)yaoqnbY z&}owpiH@rd1%?7>(WtEnpx>q*`w}|wPke&MbFLSRZdvq5!8EI=ju`9SMbqP%@D|!{ zoAdHq#uH{{)nQED+?g(}Po&Z9(w$?5sf$@#fq(@PZVR?m3WJe*pq5kG;CU%S;#5#V z%JJARHapa;S!%?CfGsSr*#T#uw!n0gft>5j?hiP1aqjPn5S0I z(pM@(z5V%u^Mh;rfJ_%Qf--;ajv_zji-o{{g0jd|nnI>XVvEE{w=aY6>uTlwn4eiz z8$bD>Udc7B`jz^vo^pjzkl4@1R=Amrv8X+>!;=m(`dEtoHNPs^O|j^HE~VVv=0n5& zFyGzH_QtCODPJ^lzeVcU_LE$jtBZ^Hi0g^VfGxQW!QJ5F46`pX3aVFr=QRAFdO}QE z9eUq1^FW|8uBnNmxC&-gIM+>h-<2Xq99d<_`?=jUk1>HzPD^Oy(8C&s@@2<6)8@4g zCI7;Cu|-|2rQBk<+A2Rp1THc`BeSD`Yh~OCAp{MO;~sNa7;@-q)%0(r!582ymN*#( z`7I?#U$4HJWx(zGIl&lF~^V|3+l3Al+BgMXHY9t4rmVGfA$%M-520MS{GfLE(ls7@i#)pxW?5#51b zhq+7*x0Cw|SV%%n`*H35J3cFUIwAR`Gj-g!7|*`i!06}Z*B-b|*Uoau2E+zZB+X+c zQBtB;UkdBiYS}#PhphyfaFe*}EOSHq}9xBLrVRB2D7N+SJ8cUI0XzQ3L zpR^vxruj>oynh@xPN!s)+8JuaIM;& z@gUSJ1FOAddyE~^5T&~5tCcUC@t3ryx6q0D6G-V1R+ z04<;CvW*RFWoHAKd5sB;KgtfHTd0m}qE@uH;={Rvcmd81B=Dh?4OmF0FDt-PyG*37 zM%V1XprreFCNgr7)!t2_YgLond7e^RCoI`jf=Z3g6_Gj7p%K(81h$bo@+qK$@buSE z%12P}9*5o@Rwoi49mDfmV<~BI)Ydku1Wn)Q_D}`IH9fQEq8pudm&=1;$tV7Z2cHQJ zJXwI-n?paQe1i`rg8;_9-Z9K;>Cv5FSENIljDiUR6RW9G+X(`#xHRx~Te};o8epec z`R+9F@V2uR+%}={uFMM?H28u>Fw|7|ssO&HhCDP`-DqNaRa0Cw9ZL;#jZCG4wVQ^S zNdf7)MD(7fZ>u~qnt|_=ekJsTC16oKSf=*0E|a#+dVf8w`q2`lqNf7nKLUxT5{Ub~ zAmMb^gIpwwJDWf{kw9`F0eQ$kJWGc~F-;Jj9ZDFD4EEkM`v0YM7<;GA*dfmWN4*Vq zFfy2qPH=~4zxm6C+u625?tTlk?kM)nh*>ifbu#q#P40Fshg;U7nNWiFk5wrJ2S4X7l+$l^p z?Za~wE(X~!X507}t^n0;{Ufb~WJC>jt%{`#C)!9G>!jqyFQrg%8(*-~(4^q28MJ%r z!>d&0?BPCJ*cy=qc(0ptgio9|hjC)*fxHu&0AB~{WLwQL24{jc%d0XHo8~KiQ~<$L zJO&cWcp=?>>o-peMdaD+%ib901U-h>h9}0Zv4)+n-kG^HdHs3*aQiUrJ&rROG(0R2 z+Pr7m9BHNgG=BCatUF#ny>rytavuGK;TzW8a2z(0s8tMj9ji*FQ@Lq;I7;HWZF-vF z7r=_z!5nZ+Ja~3kJ|MAADI{kh=vF4cx6ooV!$136xo&D%PdiIx@>p83@3Yu{m zdw0|nqU$wtr*E!l=vjk2X`rM((-ckpzjD-wL)5x;SAb~9)7y|oFy!NiO{OM3^vPhYv?1SNiHDy$2_K{-0m>ZTRHKvN|%& zSrLX`pY@a}`pXokx}J$=?g~;JSxWC+KI9lF6BOpVXJrv9jwF8L7W(P|j>G?CFczNM z7rZz+qoG1qp77vr7iK&;swSdTTXDk6S@nH;W168A0J_o}TR+ICHnsRNPyKVp@84X- z@fBI62!cWVm{faVUP6Qgt#_pgowXiDJkd^gfHV23pQEN~M;GX}8+fqY4SHGYjgNq< z;U1=>l2^Io7(%r5COpx~={|-h{R_}G119c!Zi>#LpXhmxbZgO6x0Yu87=m7cJ7g!Y zME`>B!kvb1JJdRS6m&M_tTt2N@6;z57V4e(fSq~E74l$FElG&PX8o| zF`1)wAfIfeY+=kK5Jk2r@*MyD++?2qQi*sU`;&3Ws7QOUs1&M`+DIUtX?2vZDUi-y zI}Y;*;Q|#w_$=o_ijssf(X$T}q~8p0-yUFCSSu&lUO|5hh&$5=1Q)y5RhW-ss7Wp; zyRI@6lyBNeplMSI_2*0KcW*6>tzfe%B_Ol9_{;|_DHVvjvSgsMfKs&tczFRwP&o$e z&p9t&wP~M0F(v`_E@U<^QFdMG+K$y~U!BlNc!3tZwo{ZQ-8^_XRA6CtSV|w5aJ#Bj z#zUnzw}L-QK}&3vQoKh#HRgGE3Rhv|4Mq197YhX_^7xDTmtI#P;OWN+{nLoQe-@4T z0Fu&XO@(+-!&ol%RD~As*fwqFhRHgHBTn^SI^88=YTv1VU%HNVOizR|2>q*i z`5wZb=nI4J?Lv<}D-5M2ys%pU;weVmqZ;IG=q28Vb6M8&?P@pK5G-7tykvbPhc!RInQ{1rChH+*cMOlV4{xuUP0jcw>p=#NjU%7-MgtMOYoZ^ABO$>gGSH zFn9$pnh^77<45|xvz$GoDi|-Y@!C_*N zfrK@a^nYp7AJr4O{rsGCL)f$+agqGp%8iu6}i}RHK_ocVZn3l(%V$$wrQ}51H=mf+_UVSZ*tJUkRiDSyL?Q~_XyFLPL~%vfaE|QP;1zR8QWQBEJ@KqZYsU) z{=IR1x3h7%gVwe*r)*5D26>~~mb+()*5kmfEAInUT|oiUJvc}q!*f!h(qnsNb>BLg z6Citp>nik?3wqd%_g|TrdM8Ik&xJPvZS35ISPKTR7EbK#xg%rxHoLA5VkWu1L+a`^ z>K{>!x*f(1bJ!9w~~7SuZlrMzSO1mJ)=T#XENG?KM7AUG+$+k@KL*$)~lVE zxoy>|@7T}tTvt^5Z}Abb4>4YJq#QwzC`gl~jdMwtcViY1wNmy&El!!=BYheFTtYlZh%` z!bk@)+J@QHKbVt2d3G5eYo;i4=8}KKh}%*=3sJ!z5Q(sI*_TH>w`(!uKmvP*4=E&@XarkaRW4z9$5^Jc>O9qU5krGU|S68Vnk*Vw>^%ZV(U@*;}wT2b# zJQl&!#MSL>^3BX%?Vh`@&>@oPkP0?%o<{U7)6_`RmdxL6YX+Am*vzhS=qt{OniKA6 znBsIzNqw$n7V8*tT1s_q<(o@&r#Bv9PVPKKE-Zq7gmbuqFD!!Ww!m#BH-T0t4r^%E z*<@rgo&AX-Lxhau-uIpWbht+vdb*}=Or3;`vmKHe6{wo7w=s8JL-{~!na$Qlk14}n zowYCYLWWK~7JsE7Wi7p$%2Abrvgy0{whi9asYs|Vpoj1~OXiIY_E`KA-GUpygwh)a z)W!f>8N@~Q=VXno=DhaNQD8qDc)*Erj|Pg#qQW=rKF!%j%jIk9`Ob}SkHLMgo@v>rCfD(>PZm>YVz zqv2Yc6;-xgWk*vOZPth@FJ&=JT8h#IdZYtds4bT8=knl|Hp{|T+S>bi@D*@ntv;Sp ztMYZ_Q{ndE)(cifG={wgm;JP7%cWb7Uw|p?1J{kXSd}Ww1EYl>vVnJ2)!p&yLBbc7 z&X;?WwyPaVl7-d#ZkBh9c#9TCB?{GxFzoaSWx_L981jweN0EY6C(Xk%#3Gc4E_JCc z+~>4MY6Ceh@_<8fr6q}@r8-)B0WKTmktjBuOUiyEM^$aleb9TQklr4yKo&L-Yf}9G zh3>_|@fk*0cX90_5QUK1cPdx?1{5$_LGT35n`or{2;B{6~~lRNH=JDPl!?qICl zYfjlOPv*0>ks@i8-KNp|+-}c!Awa~gS!TE&`k*Edj+JHG-$;cD{~gV+pPHqVe{8d3 zv)0S~Yi9@0fJ1eOl__KlXqlQcIWG2~^u8FAtNWd;he6IEK`>#*9l(8_N3EZc$mw+w zB~4k*TA~&rRf9%R`g1`41H41(aq^#@=N$jlG6*v>%l{C-l>Gi1Q+NEIe`DREwn~5^ zbU-FxleFFIAe!~7i|R&+Z-2xHdPSv_iQfLnkSnT)LW=Wv9wq&6=LU4;@20fN@t@=S zubcaexceLZusr{7$G58&j|Q`~Ni%wWJoF3no2#QDzQ~QEU)Q3#aqq(kzyIgceHy+z zS7&$oWmxPs7P4KQ9qmre&!hH(LIK$-x9!ZdUF_L zEsJ1YR^#>#>c-%9}k4TV7GR} zJFee(hX`Z3Gl3kSuSe`0IZs5776gMWZ&&b)m6q{$e*Ig5X zVt)X8yeA~K`R^Efye|!3b9+Ec5}i%Mm<{aVBD5!D91poSpf^@5^X;0in>8J@u7`WW z*+N2CI#bAs$YEZBeW3!-Wv~eehZr5T?y3sA$exIEWUhLZ1sLu+n3f`P~bV2pe(h zDr;rK6JY_SHH0#hR%)XEEy+jY981Cj#eFC1+5ZxIt{V?%z zG?mx|7k(drIJT#mn8F+VBL^vga}_5qmxORxR^)>YMBp*lj{f2*r-p96?5}1%NHv^E z*E+wcy(tX-?+gA8Nd{qq59@#r{DCAQ6l4_e@!VdnjzM#erhrnOlj)>e?uy(VEB)HW z;$k1E5DIXIRtC(uo%`8HQlpi&w|+pdsJ|r40o}I0BowV2B($p(;(Pe%mIcBbBdGa> zSG7rZzLiaNs~zt2HPPiD=x=AC|JE@^@S6TfayqV({cMK2X;s{;F64Jqn1Q4!4=K~T zwX0KIEQhyr6Bj6hsggzU$0*c}?%^CryA_P4dA6STYg;^4KL-MBEFhjq=vktwwAb=PwPb32SkT2qOXD) zH_}8^@raWm01nlfZanw0V*RZYTC*iQ#1W>h)wTFWhytTOQ)^|aTuWgz zj#Ulg`y}B@3#tkmjXVwS!Pd+SMC$6bPscF81vp-QEmm-;f4m4mT5cDbr8@_Yz_An> zMw`LMSW(w6>-9%>VWcYN2ezl)oyt>UIBUEb5Rp>R^w9<#O89< zc+h~wb%7VeEbxRud0WnTuR+a-Pe@NJjV|g`2B%k%Xunu~I{_~cq%~jo(0AcVzyuMZ zpfgB$H|+>nb|-ZU+@jXP!AHV``YP@2n}t4tA)-X;oD@c1uZ3~a>l7_NY+7WkkZ(fS zcP6{d%Gl?wTd}1hby2Z0m!&lzW?1tADRtr1su_*M#u$J=#aqXN)Q$-Nq$|ebKL*T2 zEQ$Z-gfO~)<$pH;e)>E`cx36)UgGa`=0IcEgkMtta zTc*krNvaW+cw+`D?KWdi#(lb0Vc!kaMs2B01Y<3ZqR3=aZ6Ll4_j1T2St;Oh{NR%vFf z{)&1@DJ#0bgoiXA*1{3y!m*Hv9mF;*Mrkl4V`!5s(8rzs-NY-&-3+3&zn z%U_%^7re=35%xy;uNH~jV+kX`SdpaBep{I(-Z$EkGT$-MRvrDL;>)yGX-h$d^TwN} z=0{G%7X7Csw%yzf#icvk=50WtP3&|&Ia$|ZrBy`E-DMT9_cV;1pCFlU<4>ita=g53 zSxFRA@}PU{`yms^9zj+^j)>auiLMLw`fn3Ak7+E1rf(LKI2Ds$4%76#sMVM>NM8J1 zoeg!xCA`#Hn?(a^A*YD6r2^M_er}kf2@y=OuBXuJ$gj6VwkzdOGH_Ao4~{@P=S9I^ zfi+CfvW-jrFou8v%h3}Ghg=h##dDH_`8f*aO2;FZ@A8=_LSsfX^Xyw_D23PI34n~r zoIJM<+E(red%*C#g50*aVpeY}$s&&Qh&u`0 z2JiLDOCz0wd+L?gF$~9B@FfjRY#N*LAGqgWHRChk&eZ(N1Y^QvsLF~zJ}?bV_QAo2 zX(+aeGo?sa*;HLG=PEZmoC^zFOI-}XDdw(JE!%a8RqT-y9v3mX2q#Dfu%GLnKqJhLuWQ3(i6oJ{^( zeUEm+>rj<(Z<(pLhGhGU31pmB8FK#vgIwbBZ|oRb0m) z!?5nOW-#sPz|w0db&Vaq=O~AFmYOlHN8qc%yE33X#DWD)UM0;YIGwwuV%1 zURX~LWrOm#kdc7z8)H1G3rvYOte{T9Hs#u=zz4T0`cx;{Z;v}xxLO*tS%f+bO0rC~dQaYWvFFp

dqvV3RD94JNm%WzdFDEQDx~$Xf=tg8TJCkxIepKUAM@ZOt?ha^5@YI6?u2RdbTAfzK=#0^#oSP;id1td(!zgOhbQo)> za7dayec!X-B(e*qulwnwLqqQwn~iRg#)7hH=rJpso0<>gc>2FHKhwvM#PF>MdTBp# zogu+xAHp)5$kR_NNqUD%n=tl^GWY?Kyl@EIsMpeO7k?{R$Z)bdWoE11mGw`fhV|b$ zkZD=|w$%K$B?lyV@9+aH5T>3xs2ktAQpC4tb8a5;fJnGmgbBtA3A|apg1#?QB{8lh z1ttCD9XtwIgo{B@-0N>A~I zb={57bt?PMGU$&>zq>}_*aP75eo^?kFa`p|0{Vr z=Y5`L1Hug*|B<}S5A{Vkm6T?B-N!VPq4n~gIKIuwy;_ev+)Pt)m!+=ENVyv zb7=u^g?ZshT=XOBa4+rc{8p?RHJ!eJTt~h=m6JnA!n_QN4udIMJL*!oPN$}6T2w;I zrBZ!sDiqo0u|z9<4S$RH*gf=_CA;pA(kzqZiaj?!jmx5<{9N*e#?18RS&)ArxKwP5 zR-NAS>01g8I(5s%8^rz0gE@qr?=Bl-@1T&=^P;Me%MA^nuC$r4-w`yM0rKA&$%Gjh z!LqHKUb06Re3wBKSB6~;iwe&jFU63zYB*0toz#ZWU<~gV@|M}?o?W5>qV_?X#Jj-_ zVcIvxDLo%{Qc+BHQCYxkpOIy6fVR&T$@6D3S*rICvXl7Zp5GV6KaPe~gYr|mu)N`< z3YDsF&dkwxEN&dQzUM8bS;R2&o?fuM@T;cScK+iBxeV_J5qCBs0l9T_ZkSs=gxsJS z;>$G^GgLyj?uh7>A*G#mrSfJLT2u*4g#_SdbI-D{EHdph$?gbsM<{L4gurVzNhRR% zw79j`_QSOu$R}>LDVm<3^hBGGN{7^21{T%!mQYjQ>wN9%>iw-~tAZ76EsCph6#6F) zRJFBtQ5c8=1sS?h>;|E3Shk%XsHhBUf#vN7ARCU!#oKC1qm<$0uRM}geZwNx;tf}p z`J_H#?XmR1V6*hXU~&+X){06UCvOm0;@2ydztJ*Xb3O`(J_*|lZ#{SJSDtQiej)B& zc-!b%i%^`Hb@Qm!ifbgua1+~cd{*+*jK$g*V4WkK9%Q{pZj$S zHivf4P~BW)dA1$ztzfJjg{rn5^6VSV%e#QuVaA#8kvdTAa5vJqni2n+GN6YUh=PMw} znfxSq_xu&*w8igj0!KMPk~dKg7sQ{Ex8u3W_&qyF@{XY-RZf@F^d=xNH`>wVOv5)W z&ujnQ4TjNCzOjN~POlW)_XHB%ZS3f_eOMBs2^V#G7nwVH{Mhh0?@4}!0P{z1ln7|_ zWPZMBg)AovBsnWUNzU^9$h9t31?2(y=4r6yW)^I@K?YfFra<#2vN{2~YA5Bxe=Iju zzb!XUNlwYhtX8r^e+(f0V9njyO?$u8OqM|3%o%Y@)5EcodYDVw$U45<*~erIklEmX}$@ zb}L!!^5wvPyLs*`Q^mmzUv$R1b_auod}njqieV8c$R?H{c_|uSPC;ecAoE6YOtAVe zez5UEL*qnW_^YI~%z&cM$DcU-y&UslB08Qb zIC{hcp8t7%G3?S$fT7>!gt_sT3^ z+7Of>uIYslqz!4e6Owu_WU(T>R+O%~@e~G6YK%?-!r+-+_1KJKD3=nZ4Bl9_b@p*$|nu)pP|{^Qj6cQ#^Lw!hhk{}hd`5e0y* z^7L=K2w=PuBY=16)BX$Zq|H_xIYdH5`+-(_Hs(Dycf|O1JkXH)l7h$74;%px2dhT5 zzjRsd?&IBcIu5V5fkr(usP|f>2ZWL9$_7p`ID+#rQ?)cl=Ch{IBE@4Itn?J&~W= zbt%Ux&y$N~ij=ug%(g)Y%Za#Qn+=;{AeFggA)t;HJKfP-2uRWjgWEtVvlgHr#0iU; zoBl4;Lv}#2$X$L1y7t}xg?iv?uN7b=ex(W3fwXp9q9Ats62q6q6Y;CS_FXT?DYGqG zKM6{Jdtw2E?WeI}iid9;;Q$BLjNk#nHYXI7p(7UWz!i~POoYS@zos|+ep_DJL@gix zw9Xx@C+5fqXl*$aAXXAGggf*sB8&x$GG9SP8KynsA%L(AtSy*glqC5A#iR6u29D0D zK#xu8jHraDOn|L;LZP8}pEU?0r=&|YaIMf$cn7?YOj&>zQcT=#ed$oQc8hQ2m_lR* zYP7%WJ~%d2TRl}`+jn=^7B~g;O`yA^x-&n`4d{6V|F4a36i&ozwZh$FGu3Y1a{g@m ziI@sqdsB6CIonDE#`W~JOk%lpyar>#;vx^RF=BZ)N0(U??G^>ZMYdMd2Xd{;cd8(F8M*;tYs#MoLE-hD+j;A;ruy{5`QYD$8w<`H4OGC>1kPc8% zXX<<5abo**>`R=2ZQ7cwG1V(3Tw-;DfnpO{hxN#q!mk{L%ja+*?o9gzKhfJ0wCmR2 z9_@#1Q5CWQ9vN0&(G2Al5^v{W3r}BYKQx@#I=K3S1WCj% ztxm`|i3r4CAdqPtT>s(AoA{K)O^rj3m>@V{cJQOs!Z|K2E80r9-HzmnQ&gV}){Dr{ zLMLyZ;{`+*Ye%PNo?BKN*-QlmNC>&b1?W)StPV-Dd_>afAfuK=vQy$X@eUvgnRvs) zUv0mpA8VRJQ0S(q^mBNL9O8Q& zVrd1-;AngNMN>=e$#CPOP6qVtb)Zu;MR^f1(tdB0Ns4b8hI+S8^l+0%2l71`$dI@5 zoD@Iw<^G!fqOtoag6!Jo&X43!Cd98Dl9yiY%TDOnNUgO9d=yb3qv!VfUTf|DePgbI zHK2|T0d~*A@1+I-g%&Qa!Xk&V1xo~qK*zp9A8c_r%Jz6v;oA;z&ejKXW&be&xRn8g zLKt`M=c@7dFAOkWggK)gm%<>kGuWx7CE&3t0zekC5Zm&{f0{*X|IRW@NB6gI_}|`7 zA4Z>Gy4G-(=Hj;0@f}I0cTevpU5aNfU+)Vw)J+2Bn7!)%bqoUu&XTT&oQ&HOv?rKu z56ioyzBj}+oWIIgx)DL~@S9VbZm&-%FbIvK=o)`|hTk@x$g2qKEL+Wr$=X=mL2pSxlXu-V10wMUlnty%!2 z0aJ-|*L+s=Q0OR8c3n{82r7o;@;D;MH0+Ar@A^MaC~;|+EldHUiP2FcD*WQ#NK55d z3Q+gW6F6Z+_(Bp4P9S;$C&&Zf1bP}mw}O=^z_j-ta01A*r-W+@1}8l804Y!JVxXdK zc8IffO(3XN-biDJac)Yvpq`e#pa{_D`3+7GZ~&S1*Z}2;6)Svz;Bt66+<5r6@&qm= zM+T~IU=w6@P;3N;N9j8Z*c%5$7(E8=01DK5NGm*;>B>y|d5~-Psg&FloDcWK0p-Ju zfP8qx4^S!jyrpFnfw2dcaoO$@((*q*795W~!cm|4*Gg?%NW5Smi))7BB^P~Ab@k(> zW*{&qCril{29i9H_@%JkvdwMJU}J`=8_cW3XQVmQN??`64*(3P3LG)w>$5h68#dRi zWY+DCmDYIu&n?FpxmXW)EeFEUE29H3uOttf;=~LxIYdKH7bLd7iMR@u?Lq&HMJTus18SxuDFe)c#AN@%4CVr)YX0DAv#~93_9o%#xYQ5 zY*;kof_FSo^%F;-V$q;3$*TSyQLF0!J)-i?BE5ylU4qVOQtlrMzFvt_S32a<*{5!_ zD90&*)aUxbSoK}Z7T4yva6TN}S~BFa=^N{|92TF-3lUHYAY zeI7t4_)4EdFG@-l6&xzJ_WED2UrMtC;biw|Ou;DD!Q;Na7YlpWp^L2s^K7L4!EH-B zntPjVVl4DDi9m2i=;Zi;(-&v_j|EOBANdr|`h|&I_3Au67JJV?S0R?e9PXs~U4*SS zRFZY*?Sx8FQJsnq`cj(c$@(qw9JfL7hwC; z2Jv-5xrEZ0A2F}vOZ(3K1ovD9aQO?dpwT#`w4^o>~8_PDe9m|gY>8C&(v!J zh`*lStvA8`pGVt)PNOCJUT?uYM!?v)?xc$+BdYs*U-3{jOY zKw(b7z6hN4Wz^bl;m`rSKRAautqXI_fD4aXA#5uEc5&UzS-HNw`}sJ)`*2V3SEvEX zAw3fzhX=@Ak%B`FH?fv|3~jw0-KEfu+Std*G(D>3dUWW&*zbq?Cw^zlxkX7qCmyLy zjF9yY9|(~2$$DbBPF={y#YKVnB<5G~n-}Hgg3L4HXc;zf8wBFI*gGA7Bj$!hgsGs2 zxg8GZ!n4OIvDvu#E$xeI@b7A_nQ-L7zcLMr0wCJA4MI7U;(mu-_3H)^{^IBnsNdr$ zOBT#^0gWei8VZ2xG8qfrl&UbBA9(Pe4m=JYzz3dT27{Xv`+<*Z zRCfCXVX-($bm#1;zi-LiXDxrvG@ukhG7*6fJh2H=8Q=d5m?HxLa|8hEQcgGrO`W

OhXbV(_jV8G;IBu zX)pyb>i%!0;b>4yA{K*8qq6y;q+&%@@Dy81BQhd9UEnV7nUYsP1d`xqgh!iq$rxT% z%8^c3w3oB(O~v>y-<-&^P`@RMsa{VQ6a*(poMn9PaT(n+4Ni-@IYIxq3$KZjVXE@e z8D7l~r#6ByURAbv`5b;M5@zomU@R{!-w7I zusO$=7!&ui}y}sl~=lS4C$`T7F=l<4_fGda93PZbO{!hZA)j0Xx+t7ON=h z-AsDKOd;r`ylB!zYT_^+^UJgP+tvLv^h01K)e<2!NFC=!w*f`WrGc%f-a51qTw_rl zTT_k(oRl@+s;kzwX^i&SuO!Buxb(qk;Zw`jP)%Ff7nZa5!#e5##W`DBSDZsAs;q z*}{;bV7Dy3QE^c%OGc0y^X_JZKb_0V9$d_%>@-0kXhzhv2s8bN8mqnHZ+KGVtzBOl zlpL2|#8gDaTy4GF?l|-%z|^kn^pC)_Oe8x|c!@-!mrU)aFNCTZ=zR6w;yzYBpFeB8 zxlUC;{Y6)Kj^>9GVswnZgRaej(&go*TmUi~e^seX{KsMSFU`ixf4>KXEC_+_LDw&g z>}JN{w05-cV8RkVFL_`K4P1W#HG4JWqm_w)MR}OaWIEO}tY? z9M+&lBzH_Xpmn!$h>Mh>*WQMOAj#S*#oceDYP;Ud2`=|iN9vIWsswvoG!>*3f6A5G zcw;*4E8yJ80~o5*$>F-B{SDV<;jFC-0ICV#?FbqD4XHtZaG^*$ph?i>vmwv^08mTJ z-*x|I1dEzWH_jMT?!_-$b9s*4a!47fgT%oTMx~5< zD)-&nr9wZ?A8!Q()qw=WAXsA$7W&>O?JO1`TdF#(1vI5+yT~@8_fQ(kbZ`GI5?sRj zt4J{9sYpoT^Z@~GuGmV{e(h4Zi6@F6cU=v;`!B~$x zv4@FttZYLLB8WL%w1UIo)|ln4MDuAKqwOXP3cSYZK@d2c8s9Vi*f z4|sx9Noz9!HzAe$XNnJ^ur_oC{EE4-1D_#n4`y(ZAMJ|idERRr8+m7C@^#)FqrgAH zYLZp(bSRo$6Gqs(SG>I`*`yS-7arF}MWP9-GMc#gUb|07Vd z|{7VBe+usbxK;)AR zzG*~p2dYpcGZzxt8Jd=%byRH{Bu1b)n2p$QlI6Z z)MtvX`;jwSiU(m}`(?`#Pa!8&l;_Ob1k2TEYb`@Lh4oJ52`LB`l(|4Ti!$+RqY;ct`-X9o~~0fV~g}A#c=rgVlClAoa-&6nwF#0Jo%0IUi){Iv1ee zYrnN$Xk;5@tsG)O9$n`QWF7oJ54c2-b+GI9Q${_S^_kFH#;jh|PyR`1x;}sgmJn_L z5j#^R4bs5GkqaF}Pbxtx5*vtor?gb)g2(@*8Vf|!tO1CcLq7Z~{PP9_eHEzTFo$Y^ zCchMC7Fe;JNFs3v4N_wq}TG7tXHQ?7*v zHTqon+(io``{Y0Oh0w)wJ5l@Q);x(C1{yZ*QB_lKNy0d0SJl?v ze1wt;(4}%9pYHgiIP~S)cfz>|0y|5yNtfZ*Tl8=!+4DOyk_%dV2d}_YU$Il%VE)}! z41S?y`Y3|0U=iK8A)33e9NSTfSThJ_f&W@uAG4^f-XmV?OQ?uApMC_n_=0uyvjkU&F%%~(sYu0( zW_uPR!mjjKIYd`aiyfgV_H^v;RCUV)Nb{@?+w0aT6|ssFuY1K-!hFDCPnAz4Irt}S zeD5eXP~j{jN)Prqa|vr${Q}k8s2dp&fF7Q+hrtzKTzZC;1&KSFhs{{N2Bfi^k7%C2 zlhYFoiLZ{U$SkBwhCRoTkwmcw6nM2bAMNNOlGwdOa6nUS^47L|y zCVzFe$Xh$ZZTaI0IbY)+CJ_tmzcVibNvr?07yk1k!aSksO*63rFfq5_Nt89;DB<)H zTB{OHSCptreZ=Sj6g>x3fuY-6w`H{4+%P-2&F3MyrIibjMi$ODo$d<(_|3!X%?vtM zGk8Jmk132nFx3(U@R8qHx}UY&STsVENW5GqX>e1rPk@FhA!Gc}nq;kGBv)&p*$qBt zzhC>Xd0htOdIWb7Co9zU33ltWC*+%r^{rZ|Sk_0+&{?RVi|uwAik1!(CZCp?=2 zHJUCUc|A3n2IA6wN*(zVY_}DIEMfOL&%}2NXO6g2FqD7lk~Nrjc_8}XGaYb4$^zh< zsT>#J;JI`kScT^SsqljngLW6nT+x$R+zo|OJ4N$etw%ARM|*%;b}tzZ?3&k|b8D16 z6Z9XHLp5X*G@x=e?Veh|(nk1FY_)VVV%_;AVze55zMT6Fwi5=xcD+wvJ2q{qT**_+ zH85sSdhy3pyC!O7bWE=2ixb*1xFiimpJouq-ioHxo-1qVWa(HrQKEXdCrhKVmEFy%Asg-0pJQLt35`{)jHG_oFMW$y>vW zi7BuM&~9DeSdAl4T@@I+d5OLL(Q3DF4Skko4ZT49m=OELp3D1^#Sm?e8Im8-ta|Gr zWo)!zEg?TW$BB|;4W=4x6?~%q5DSLK_ zM-+~=)Do4=PrQmHYRlYXB%dMu`ocm*qP15Z@5N`YBGVTb8NZf;O#UFh?ge{~hnQ#oA7^hF)#bXq;ff+4-5r8RcSv_gH%Kbo-Hm{BcXvy-v~+i;(%s$X z{ef%!_t<-#an?9r<%524^1O52_jRd%j5t;NIPI_vS%^#9+uqy<^wQx@#XHzl3xERX zk29v9u8@;+4qIDWG|A{le){`b_}lTYKxJ5SwueLCgZ+*DihG)-TOIOxqFivYdK zs1x?}^qo=j)C8Q4y^{sKbEQ_S%P<|LPSYZ9S2mxN+EXnZYYKAW8kISx{TNoY&LF{> zuphN46!cB@nZ=m{FxX?88q;lUtUGwxTYiv%nwCY0otiJ^vO>` zwWg>uzJLy|CR5ii1)#f2Gh)N#5`kPX0gE3DL9Uo_ddkmW!zxo*!QFpcF^g{jS4_nq z;EIVwc-G+!tJ=bi*P-7&G^GwzaCuaN9!S*sK=3)iD43T3XlS8b;=Vjn3h0dtqikaE zm4E&!YYAGkVD|RHP_rvz8dR!zT~%wBF~(_2b78lb)6XgUF2~&ZK={T@^4@XgCbt%R zU=fl^>ocUi028ZPZJoKpcpl%ue#C{Ftz?*&62xXY`PG~U6HHL~B<{4wYk);nUL-E9 z%32^ZME>GOeki7D>Lv*@7|tm2m}tJKI;YAG>16h2;y~Wkyt+zr)ySfb&U%e9C}It^ z5cKU#I3voCqBm5M`2^iSFO@&>qs43ml+gA9gPqxZV)j9DAi#PD`?R~;E0n6f_R$i_ zUpDk5zO)~=ZBWPygMLqLECNr|Y^$Fg%O7lmB6y`@$z=xBHywl z-KlnGhZzvRPFspKuS8-a{MNY{ru8m-85*acQk+V=RbOQvBfh6T)GuB{e)XmlGT#4N z@@y$1@E@FLiR9-S6eAp3yGVvpR+ME!o3l#>B+`4jMFZJ&GO{W~*Ldsb+juCi_n`#6 zf<5AxhB4dYw+SN7$PuJSbwYw<`n#kb`Elxm1VldLa2}Ip5k^PG6Oe+0c}&Etv_IBJ z;hbpU-u$i08wuwHba_p6y&2~^&B58wvS2HYF>&ApfJckI5xnpSnzo?Q!Q*|x%}Dkp z=X(86gOiwi7S`)+`qWGU9^~Q^)EU|n)NrbV3ZP)NQtKZDgK&b1P6T#&iVA;))f_MJ zfMT%o3fu`&L?5N|JbG*dysr86fP(A&wudBQUgkfJpnsQ#rvLAl&|hqfvzJ+7*~DVJ zzXd#NcrAi%l+F<6dq3Cvah;!w?{rTM7@Cr*ph9U9dzX_%uCz3>?le^N9fc`^-!+G9d-&4wys$6GZz}$OSdVErogYOprl+-iQjSoWDAaK~?S}V-QMoXaF74gfjjcYR+EupVfZh68g z#hK=(wuOlHrku1RjnuH7pveYsVXKZAL@>r4m-|CWz3>(c6+W>fJ3)rb#y+*{P_5Dq z5ejLalSk-B5j5e*5c(*U!5R$ggrxg%*DBT72z+NF8Q5LK>Xh6UfpXW!mvWC{IpCl? zbgsI8qFpLE$W0FHu$w{UE{H-BBKIdQPs1C~4toJiwCufdXm16u!{!s4Yx(RI`zxR} zSh{gN)D4Yc)-%TYGY#@e1@ZhOUC;8h4ZPWAk;4+O6|zXo^n=1m7T)Tl~0+D&Fq?ZJ6 zVlb;KwRDu~<4%K7DOu0S(kd5ebG#b$)O_Oo^v&jRs{o%bC#Np00`Tq?v$4=%)TX-x z(n6XpWM+s`9BRWoy^IbJv$^|kr3dV+8gXq}5EN^PTS6oqe&on|B?R$KFQpQp<^;l{W2__`dg)p!;$6?>ZR&6o6_Om~3Ge$D z0gYX17LTU!PJ@qPD>&4iiC!l__Z0;*=fOxa`8uhCDbK5qCPVyR^Uhr<8$VgS`GOd{ zKaSA$KB8nf5;M)W27zMB6rl37y;GTPqE~ATCo-GMWBG|F!VXJw3n5?$1Z~)wmsaissYDGS$O!$NXx(Sa}-RHom=zg82irSoS2;lnW3vM@Vvp7CMA^vRidfc zX*}|G*c8fi5WM32AzJz(tir{wX}}0lGpnZs!xS~edJ}`o;ss8!ihw2E|+<>uxM z%`ALQY|OKvL(Z3%ZuO5G2tk%6Hn*PNe8ggmoNYfa6+F1n@iVsLz=0!Raa_B#(0S zH?xmEt}<}_pGP%I?&C=A^8Bj%G1=j%cbZq>QYXLURluR#pVpwU>5lP)3_G0*<%vy? zW7lRrl>XbYL69%BJ#zVw&@l+Hjp3XOlJSepkhW%YU^+mj@1O*uJAw@9X_ga1X z)75weI5!QYuMc;K`y$iU0RcuTd(HLqI28a74`PPlrndYa9$pQ=!&B7#-+fKzDM0DLtq$p;R%Q01jHLXuT9P7Nx4W0QJhSRG-PBr=U>gkbKo+xGvpAV$vIvae9zn)Z=g zuRP7huo=M!$Mz`065a0YJKxa;fx1<=hcay>8qTCpx2pCVqc7;7l15nJ(?u;ZrZy7o`J#rh_?8kVX&g!pthTFnP7)bsT+PYvhaQsp z>t+>ekaRF~K`?(^&Y61q+O!6|7bhywj(+PJXk0+7fLfq7CS_gM!otrQcTP>%?5;Vn`M1 zJ}Lq=R1I}(MeDHqr%PH05*nz*fdRBQxH6wFX$nhX3V*jaAY=)+&8QT_447alC~MIF{Cb&nRYlWPD1P`{I(Bv#v#JmIyD1p6kNHQA}EO!>uR z;L~bI6psZ_Pd5PKak^0~84kLYhCE%RHEgV$)w6&v^MWftNRp$*|p*KNL}x`k7@1U|w(2ZBDr*pD_V=GSSG2+EBHZ1B93Y1tE-a|mSD zR}wjKgBrWQbV9Bfw5e4Kx-z@8w#nNUyo}AzRe`9qL?M!2{ro8>q&GFi6P++6&niDA z4Pm1YBqjGS$pNnbq~!Fdk!UIJ)@e^0u9d~&Zg)%%|-ok#gyW%AfA7XY|KLbE9dbtpS@c}Vf9`~!%kS7ICed!S+rq&!S%Fz zjDETCa`HlR+D(m{>}ub2VsfZOd&m9pyMA$o?0C8C;b1_nYF^5e>oJl-p~;QPdDEGI zZv0ouO`;7`Q8DwSAkRLB4hrU8q)a%g=bmlZkCq>t5=|?rHs-!jQznLLy-Q3is}2CFsOx8Pv^AxoO~YCUBFf=bm2qi5 zHUnH9;1*sH_LQUCM&(DC6B78(3g$@zN$=_~9za#p>@DnV z=sS@2hMxY_#~Fd|SsDq`~fe&&mpvMLpcE9ymS;fxih8t{yo8~`K_?Ih{*c3z6g$}~)!9w( z0H#p8B>a!#9@HWda-2?^7n8X@ zsmN_L>KUL>N%6uXnB8NwHq6ycW#N(iI}gvFhfMR)4&M@4!Rq=ihpwwAkc`6F>C@61 z2ofe=(Gi^0ufP>-$qR$Td-?R(0v&XCH-VO9r6bjdpF=h0jB#K^fP9G@$STLyyq9p8 z$Iq1$U8_mqgXz4TPxBveX0-ngIJ5l!z?t92n;8!1->4-iw|jg= zjPGKRfcuv?Wk(QD$T+l_d4-Ekys)78Eht%N7o-7V zoOk;1J)J!pw*f77+xR3zI&3uCo&igN0X>%KKY*@ARSr(PKdv#I$(MIrF)|O*?#RyX zp@__D5v>Ri*S3Ud<_?;h6$@-ew|N%J5$)4k_Ls^vpSR^pSsF8|SuqIewg z%L{yghj)1GixzNYpZT2+54vt8ODcHP`AY*=_FSIz#($bD4F4`AP4|KR|NY?tfZt(n z5Pt%>9wZ>wQ#G&#G~)UW8vtWplV~c|?31vMNQFwNN%ac6U>KA^1X`vZSyE|^XOKLP zG)pb}lcgu!&v>4T8)AD9p2y0$ z{v!y_Qv^sQKsR;(&vW~P=ebAxN?5e-r}Nxt|LexCwO!zS{U)WydpOuKQJx{nV$N`BKtdtis zHTh=%&tuK1uM))2tiWPI0HBq%Kw#5jdH`$+^t@a|lFZmZJyTvC>Y7tEt`HZs2eBCS z`j6^^pq?qO8~B_81_-UZnO-dxoLKa0D@G&Clq)E7Fe%dY!D;S3KUe0obJ`fWu7A#^ zR=@8@_uEfJSR>KNB}+8&B72*WfU(aaEQjLGDLfiogDrN0l3v;z=d}JtjDW^2Ai$WW zibm{X!nwmwC4LeOachS&Z;9JA!Cx5`5Oq<-3l^>@#wS6MCkobCv1?SYQ0%hxraMC# zM*Mm?im|^VEF$L)YpGX5@_UIzRm?ezRL&@4Jx53D3-qAWV%GzsFm;27@!k8e0g0CK zZ{h<}o+!ao8+6Uuk!5{CZjpZPDp!Ot0L_zvbYqe&xtK`}d@6;y)2+N5-R}6pG{!ZgTg}~wj#U>>F1!|pm3LP#tvIGQQm1f^p8hp8^~e9?Qx|KD?AcqSyjFT>sKhzY4yg(-$9$=gN6=;{gA?k zz2Zn1VeOVT@5(WRBYB#EjAUg%OzreK_c6#O;E6RVc_Q4zx<& zUb;o3iUA=)Mg9~nd%5n<&>*eW4O?v%nDK}_UUlNS{PD$8s~vrOL3qlhQ@GLr>!VCl zSvJCLW+`Bri2u7(s+SFWiZWr$0qBVHoYw zmDW%JTtJ{6Rw42GEPcAt*BAIyg7(ILcJ?L2iMA{S+P}f zJ#|%w9m)6X8x@7QE%d(Mi>pU+$@Zl`9Cj$l=gNzl)OJJ^&!Hm~Hfiv{o)D`!w)9@n zx8?+;o+$hxzx@s>h-tA>+CkDvWUQ#0P`@T_5!?Cs#lg%w09IxqF{Unxrop|Hv5bU0 z)!DafL&cm;lK(;kWo5eYxYzL;2%>y$BG+p(2Ez4}*snxYbE@<|wyFZ{QloDVTw}53 z$LLVK;JF0Bb-cP!Ye~XSz;=zdLMTK$z5PvVuc>i1L64b|a13I+LlYE6cb)?|JM6u> zPy7BC>l(?gn~rYd@jF!1>$_A=4mey(HIz~ISCBuE*WeE-1}e^TyL~MTj}mLuE2&V^ z0dG@G4w4s^f&Z)x4y1O}g_?hgM$s@|dVR#vre0+$->wT(IO%_N1iL!8N4{#@x^G@Ll%sih(XL-K_DLwKk_x)QG7`dkihrZxTDM~m6JHtr{ZbQM z&UNyWdHEw4`b*iRBBL0e-wZH(I-`=xB34>P>8NqsL;RU%96uZ?5G{SZ54q$Bv2w?5 z+S>9K)(%=yc|Y8knd+XD0yX!aJ|a$pn)F?>`KJwa0n$A8kZ{9=?#o1E2^y_f2mM8OgNI$M=wx#Dl>QnOI!`ZIGkdL=bah@L-D>Wfx4r0 z93Y1IHC^kP1|klosgiqAkuVX!`REF5IBg=F23^aD$94a;vuSkkX^r1Cg2ajR6KKC2DIq26K&~z{hJ_{7RknrDZfz= z6Z^cqIoodQo^@G#2FtE||Bh^y8md)Qa#X${Y7YNyfMC>-Yv!!K!c|9Jk!+y3w&YY} z&Kj$32*zqopL6VSPTlMV@0)-mdwXqPx%6$(5Ok_*(YUkN3StH+n;yKlb2B~+!p5H2GDVpcndn}aA zt8Cs+9nH{TBul1lY^*5S^atqYD!*jjomcv1`l{q(e7)6u!sI>j?bi;0m-f{e1iv@I z+?&C#JQ3Fp0#@xNY7bhU);OiGFZi^R)?xa$Ea&SXJ>QbzpzzR*sL>;`*KmVWT8lq< zMc9{00km?<12YsVyoDDp=9-IO-=i#)ZF}7#7C7=S0pb=6|64fmY|HA5U+|t|ufVtv zN4UU2TN!(d>J*nNKV)U;W6E|O&?#L1p{5x4la#n0Ymg64ln+{@o{`Ad)+4p%zX?dH zewVoEWp7@-<}D8F%SqjAO!4J#XI<=Iq1s19X+~)dI7V+~OLO<#4>5WDMf-;IxA>?c z03h6E{4IVoHTuD|)fEl_$~8cakC9Ub&0^WpdQ5Hm97@j*%govx%<8kJf}^Lx@1}6* zJIQQ@+g4+9TByL&-aUR`V^f9c9Un);?RtvQL4*{bq-nSJ#yq zyw|)AcO=ptedl`ik3SB%@Ay()N4=dj_dwqfPE+3j?&7sC9$x$=deOU%_o8LPz>h-< z91;D5U%0Nnv*Me9R_7wmZHpj~8vJOXp5G>GUms;Duq5es7u>zrl_4L>YFVy+L3Syy zfp4=T|FtcnD;2v$zTYQ$|6FuGx$l^EcKaAVX6`i4bbq05=VLzdxPoxYus)XJ(n47J zZQGbT=h{6sB=q}@Q~ycBPUIkDzq&m5JZuHyNtvuHRetqgR&*2Taon?d*4^$-QzYh8 z-)1HEUk<-GP+s{S_$dV%2t?Fd;N2PuZup#3-!8cI8@Fixo4oiO8n@ z6rfeQuTJxAss>ExfU*WKp}%GVsGOc+#&Vj>2fb`XS&^AqyK(w@Z}bu(?DUT_oTGw< zTSD^);*h^LUyVsNM}Hza9^Dl8OYu_dkK&<0n^i*(Y@HsLyU~Z|OWx}z*2H3;h@2v3Yi>tBVIj5NR5iFH{oUtO9Pp9S7LCMy&6%x>I^A5f-+Eohlrh$4Do2P)vmzhnF#AidFwFJ5m|Na^S3Crp?L|X_*xj~lSHqf zTp1)h@mgyVMC@4~)l~MmH4J!uCj)nDD_E!2D|#-7Zn|SM-1dp#lGfUy9qwO&L*z@n z_4pwUfeQJ*mOLHg7|2i9mokJJ-{sljuBPlAv@MM7S5R;?CZ$JQ>bxyD|7P)xH{Wep zSXgQ6^u>&K*f%cIls9{ylCIomP}1@@1Dwq>@MHUGvQG14%(d`C4XOOTz@AzH>U4r@ zHIZ7nuve5;qS6C4v>R4$f%#-?EhGAgE-b3n_FMI|pob&bR^5oPC=dJ^t5GT9Hs4#w zBkUfqxut#a2!>b8ypON*d*w2mFW_ZRigEL-&?bIsy`Fd>$qQGs>|?5K#=Ja8*Im*0 zF89rV6GtNA{qICf}`mWxiY*sWtWs|mh*Yon9 z#uDSdOES|j|8J+_?=uxeq$2oBJXm4~*JowK$r@1O>O0H}404X+WCW-_Z4z0Ny5+H- z#CiBO3Xi*b(^$Yy4hOb_IGcdHVCVf}>)j0`_Mxf$Y*Kq=(ZLzHK5(ZxPqNwGQrF#- zDM9t!gmOW$l@g?5!vGFduV=jski74I`5`WDJJi6`U#qx`?ET8@B1FRO9e*#_!cVn>zqg3?I@i#Hl1J8I%^R z4fa06Ee24`T&1jU|5F!%tp%_-o^%oXje)F87Q?5wsA?H=ev_tzp+q@ylr01UpL7zw z4gf?Sa%EknFA^fALYsQ)mDl60ML9U#AV})kV5rDJQ=4Wo=uA~Xl5oijUE_tOt3n`i z$z~+ly$M!jJzTM_9b0UP{V9VA^2m5=+!BQ5@PqKircHyX%F@*FFNf$SGizPdobP+0 zq)I(eQjJx($m=_0h;bN$o+zmYP>Eo)9Eoty>&YF_Xz#6W^LrC(qD}LP9EEVd7a3rs zsl}VYqlzp54x6kcWX3F-y#`zS;qc};6YG&o22|hAdlxP|a0V{-#sE?bvJ^x~4QOM1 zRu6xDoe416BI3ZF&phAeQREa1Z^mX6BY75^jx2Z48pgMxDEu+D^$@Ohbbl`j6Az}DsW|d3=fv!%?n2J4xL;cwRWd)0`KjraP7quQu5ZO7xnd?>dnIQ3*|Ha* z`9!H1`3aEP$M>ba?UObyaG|2aKhbz2&W3{R)EW!_eOR%ygUc1IrB5mI426CvpcwJ9 z4yD~CPBJ8ZvPCz#g3pnQ3|hTR%*pn91)-a;@eiL`;Y#>JbA!_Xd@H!#W{kQI;{&+5 z-bvEv#25dSvZHcA;^YVeZ@Nx^0Mv2^S?clw>mMh~zsn@kGyM0%$71bC8*zmYOc4<+ z22tX1fe`k`rPE7P!P*7*I!!bkO2NLmc->G0V!}`Qsdg?y}pec8N08~5GUhqr+n*KuoQg+$Vs`EBB<6yG2 zjq6GB7pT5y4CY%3>U$`|qV5n`SOjdM8T-lSYi?GtvVC4I2D?4X26(W3sIZ{cmU`Ar=GI1tD-(CQDIn|f zjm6@NI%3Eg^^cwokOm=u&ai>j76<_p*G&#;Z57w6fDk~TkU(ooyav?T>auxmZHWf; z2__ns@Bi8{Qk_5fRJb+a zc`wH2&BZWdXyz~c#knML_wHr@Q2)Ke76lD^p7K`XZy7F)ys$Z%^=P@u#S}52Z>Rb7 zwvV_UZ(|&zes!zqw~y!E=Roa4HJY^)WhcHWb{Q+!ZorU-i?OF1ob83IkZk$nHtdGd zgJ-(h$8_jyvzMXRl#B(d{FYxtUqn!<+*j>WwA2{AFS-qP^7txHJ`O(KB+rcXJ) zvhAuZlp&_dPHp-TFR1!+a`}4Djd!5m&8LLTfr-yolAGS;OZpa^oJ_w{O#;X@nZv?G&5aV0|f@)tzXFoTzemL^K zvOiQqI36RNd^K3Tt=u7%qA3;@kU3%7+f5!fw3<8ZWL{M>r7qdBvZDBXB`1_<^&?*S z(d0XH_j+T47-fPSOUM~p_*1*DXddWai-#3g)*ZcDLXzHMT5825Y0hzc;!{m7JUXa@ zZV5^fy#B_w^nKGzDl*&57QG<6O2r7eZF2K$!#wq+%J!{e-yVU04Z%;C@|9&oZKi=n zL$8y?GMVFTAhRRjQrYp3qv~H~ml^)6)-@RVWVj)}dnx-q68XJmxPYgb=Mws0@s<`t z!r2(tUO{O~w!7(UdDOs=rsr#~fMw-OvXj-YW=G#r5ah7VlaJfp@tR25qvsre9M-lU z?H>Mt946}lkV9@bzwuwvQ@&Z%+`u~ebtFeD;PnHoqyKpQa(`20mOXAB<&jAP;P~K8 zfL4~n6HrB62=e;rfxLc1QgVRTF9Pt24g)VDvltm2>6D2AKu&Stn{7{X{%v#R%r(Rq zU~oK@+P#yyswN_)L6F0SGjBV*(qcay72rkm=|3B$2>o~pCiB2Py1`N%cvw{D>A{|S zR=5DJUq;v=sn$a=(tgXknnbS<9!-E@g=uxgAmcA=8~W}M&I2w@eCGz#YR6nC(}{KI zr`ys26k2Whe1F7#PYnu8rks1Hm(;(aBvjIL13%wTMQgpx!)cPDoX~^&ponSvTrma2 ze!z7d5c_eceJo+y)tt%Eq~oKU+Qgp35Mr@-68i;F{He9C1`B(Wm!hOaW_H*gGAo}( zMsA0r(uT={`dxL;!|K4ne`Ye)bX-v@X14S8wh zJ~vF|7osjlRNo5=(3qZyIpeuxJEsTu9u#;oFnf}-tX)^ro^kE0ly56&Dnb+nyH8(V zXdK=xs5cJaFstqWkf17#SUIS?CYMCph$a-n`j@sTOVD?|M{IA%ZjTyZQr^IltG zj&%h!_Opw5v6*r|cc2Pe z&az^B`3;@X^E)ZawZJ~>TN%?Z!>oUF0WD#{&I)k6i zP!oJD$Ao+DUCVK`HTC6z5*7o63kA2`$lCLp;*gn8W>4)}@5-`!H6h z>6PMvCtr_~1VK9&R6E*%tbXYXIdWqgM_;{*rSe!nrZmFv_f>OtuwIz3vn1P>p@p{m zQmsszD0Ztc&2+8DAGneD`ojnZ5Y+HE_R?ymV{o6mDK)>#+_k3<*BrV)ght%Cb?yRqGYhXzdY+dE03e;soW^R^>{~&cFYyKfVI= z$IH9@dk>pZ_s1;HJ&Q${QuDRm_thM3H-^DHn5&ueWEdv~WW(?^REDrY=`6mESl2{A z21v-MNHK{#z zvZel_K^u1;ijU~vm4ohP_6HzVP>_-FyWLsstl6Y)BtcrL?e>f<7qztda0x}viVd*jRcCQ;HF?fjw<+1DIj~=S5GM*z`0@zq6NJv z!ad_O6zPdH{r*(6@U4NFim>^MJYS*?4d9@kX+ds)q8%X5gB0zq&xbQi$+pu_K+!(+ zObeQNBG1nQ$64&P_zRY9e5={l97?1{kth?Z{TpY z9eD~moaw`D{W+XzzW!U$PFXodFvQ3Z=ZO_3;$5xTF?~8>XNDaps*%!3a`7S;lPHw{$^k-W1~`%pPdP(_V>GyKHCUv z%I0-O!}DFOeh%YnQiHGRW(hgSZ0%WpJ;%~{hH@gf?usgIEMW__Rr7h z?UM&ibRm%AS6C9S8aMd}Zf1YQmRP|-i9&vC!J7ZNWxHYl>GsoZ8~fK+RJ-3`=WlTj ziE#~+Yupt89`ws)UIzBL>VUeIB#SkN%7T;2W7xBSN}U^ePVbQ~zp?ZjTBng($mHbR zWtD!l(LxEh6)5329Kqzhnc99$GX~?1m3!RZnA$*xPeF7!4l@#JW6#(mqJfFQ#Xb&` zeHAnUQy~SZ`hN5Fay;lt69d8CDnuiElNKk7?aQYUE0`7iYE*Ydb3Twn2NfjIp?tR8(vh9 zsg5vB#X(Y!(9}Tbg!U?pbt^;R-b;AOJ+Fmt8f)R`vqJXUl6yq_KVmdq_<_|r+3I8b zTwBkp3>x(iC!uG}U6pWjg<|hw#nL$AWIjGy=6LzT>mQ4yO#dp)%*OU#nILhCcTdaf zEd=G5E5!HdN6+d%H%e#!eMyi`=i-pIz>iC3xI;=l8&vA*6(I(Cr2{Pfw>z0IHz+Az zA0QmAGNoI#&o3wMH&bqpKiSe>A&c2I7-%fcpkUN;JY35|84!@+D6BH@Er#|@ zCyM8PJJRquTkWXGxa{8KvH_bGql?ffRtr}lDvSaz@x#G9BW?{2#D@UaSfZvCzQbD* zuDB}FHyZraV^&0V$zot1Jml$lX!o=8(9hJni#AhWwJYiOG`b0M zNyTrN${xCTrc7njBXKCYm->#}%i${hJ@ zIg|Ccl-nIwbi~U+iuV!S!3RNE(M@xl#doU@mT9WnCsp;@XYrZy{#$Mem=ZQXue8-v zbVv>H)%;H)jT*?R`{bhR>uXrmCX7XBb=x5Laf%5&FGEN-ZWHC6SkoQ4ndS3C=zU^k zk_~iIVY47kxSG;NR8#O;@?IU!(IRQCLP&vH{En46U9L>=31~BpK$2yn?g~PMbEaHv zGSQie_a;kn^(leNosK0H5qho%S{H0Ggm32Ih@_mw!xC(lXJS@ueS;@uqYNlX-T`NN ztB0+;%7gqbyTF;gCukD=l_OH3z9yBV93tFh8?26k_66$rT+u)tmP-HI0dd`*b97_7 zr**qh-`Z%#j|Wk)YdFVs>_EzzIuuNL}TzYHa_{+A2q zKd~6Z)xf3)O#kH?dPi+5?wmM4#jsBNMIaX>UhT9EA8GV+i$);``TdF2Xr>=N>-Gp(tfH+eME$~vBTYM6Trm?4(dwh?9rjnfmHi!2usUn z0Sk~Z2vfZbK10lV*rz$3GR@*P+Gm)-7j1_&&Y_wu#L)vo0#Zt;LksO#2jOlhZgMq- z0l=#QZ<4=(U>!r-+z$n;TvHJmr#A{kDQZA;(5#zj5qOkTe4Mv90Lb@GVV?%8GcgxeIPt)(8D|{Uor=x$#1)>%YU~0pR!%ckK=?a5xC4S?_>K~D4vR3o z)Z==}4w|Nbo2bii?nnJzx9q7v*K;j-2CM>O0syRb+bYiJx0fFR6)S7&8KEg~Y-6Be zwPQ45b`1bl5Adz%=YfjVOJLKJNdpczDuzISRc4izF-oLiE`~f$th}c;$#8+HL{3nT zG97BRtFh9sJm22$F_D5fzDCis%@C<>%V!QG)OTBqrhPGu{EruVw(n{w3I_t$@U4~zCH_Irq6d2+5@2!w>Xn!fv2hPhN(sltJ_XO7O;woqf{dHd8ptI>#p`)_H<*u};U<`Kr0 z(Ctl2xRPKPb)9&PvL;-P+9qSk>yHu5-#kzy>ud>q8?GR+ON-Bg?!2W;YPnPw7hBfV zTc)^A2JX+^IpV=Bit)fky>UnqigBmITi-Z-OefIAv!QNLl_G|*S6&&C}_g1Ue zjAR=iZ%Lz|K~~#|Wx62t2WvI2O4Kz2OgR;Up!O93(7q~Vyrl(goYQCzc=iW?qUUpx zr>PIPwzDQJE{BnBwyoikZpzR&ThVOX43x!q5A`C!R=l>33(|%8ECgHQao~=!el5WU z-d|1$8L{S_Y_Eu&cLRI7@9TLk$euz}clY@~o{Nj8Kzg(qg$ND4y`bF@w;TuGO)=Wm|V(U-`vlNs_8F&LZ|4|38vEyunC_{#We5qSZmW& z8+<}TRRfHW01-O=5FkRAtp>#kafw25l-!pRO1pBQM(>JakbAWGPdjBqlx*=oJutK+ zNmtuC71110Ls)>I^Pez->wrO|Ge(?8EeLW|r~n*{d(^7z>vM3`I)hp3WWAsZ9kf0M z&rbrhq#zNxBpd|uXKoBbKh1=Ald?BC)MJ>YYCx(Gva+{T+jpsGn7YtKs1_3>DyAQm ziiR%c@FH2Z`dEon&?73L0)%<`6N{Y0d+mFGRAB)q%v0?Hgn2wW%veBSo_HY4bJ*1m zgn5ihd!x{~P_~~%=uuB1^wl#FAXSJrgK0Ft`vqGLz+n6p=IJZK)z>9|#X=haZ_+7J z66XswG2HYjEDEW9Gj2V-S;S>+!R=VS_{eg`*y(#oB!&ZlyP!KB&#X^gQu7DA#1`&r z!<~xD-x)GHOrwe4xzP$sO!SM_H_Ju)zo|GL^6FE*c97lmG|og!nt+uT6qopz(R$Qo zn?H0OIi23`Z{h8@SPlNc>GMw8>#!FGr@}%k#1G!V5ae=LO!qP3a9fdcWgBQ-IhZt! zV`ac&#V$1p8WHqZk;gAuX{C68Q350EkqKK(J`}HYeBEK11^X?mlM2+dlGKC+9k9^D zqe21*)>fLR4uNDF^kE0=nswsjrc~we} z7^@WcrUl^@Ut9?tqV4szB>iAtXlTvKOZkEiOKl3@vzs$bP%jzL1S{5J69Rvg9=~+b z2&%(kG4#cNkg_|NPY?@^l{etknI$$1hC|mqjCCI@Pz!e^+ol=Yr(5Ba+!qjeA7-^4 zg@iqNPY?I*wK(n`NS`ehHM9&3qeyvLE?0ND#lKWQv{S!O26q}AU)c|;lxidW$USQK zk?$QN%;+8}@73U?G5ow)aOalaM!JSC)`+Z@1Z(k_V=6mzoYF*g@2@veHso>Gp_(od z$~}ziv!6A9*nu<=D28#)$%eq*} z1Ug+q|InFjq_Jq2w}9H!-?&qRIQpLY{4KxEKfMSKQ@>L00I;?rNyg5oR{!=mPgf@E z4Wo^g=egC`|R&aXo@U5|l4X9(qk?jM);}cAV*fD_skHkped7ZFb>6X3_ z$bUnz6AHX-0RIhVu_5rb0Xm)JVy&S?t%nN!a zeCB@LJaNBLrAN6uhpK1JYMt5pYwji~*zCf7!~=`rH=Z|8RRuKQQdZIfPmAH9(larM zJp6?5pTJjct14aOrt;Bv?ZN0;w(8}>j4S1mZh{VcgddHd!d)r;(73Q!ECW!C*t5?; zzSEjuQi8R)+oQCi;j+OpP&t=&xMmXNNZcB8HB5=Nm+Uq<0%AE1axQ&N6rwdL1FAT~ zZljx_)s|s|Dkx+_#@*AYeg$HZWgqEiQgqpyUbxE$K~Uof|~9#GQe6sOqX0*Fo|) z9YqneO8<1J!{_(VsVY!|ea+9{xlOuChB!-noeP|>CHeZhuAll5 zOhSi+TT|@%u8iVF|L+l5!|5rrgR%NdE*rMjPE z^1+4qsD97nf0##p+$x7pwT>=M2nf>aXm~=v}Pf=yd z=u2zVnm_j}JD)7N46ud^mCb9v2-MCSG;p6BfDwNvB=ehsuhjuDdMNF?ft1vdxwRK* z=vNC8Qp|e_HqS+9whXC!GG9e&ugi!iL*(l(z9|w9Q;g+!UxT)}ALqyb4*c#g&lmjT zc_4ukE?6viwB#+hbx?DX7&W# z$qSzxN-SBq`S#6fdUpc=G5D2$^CZ46e!&+5yIuU}Y4j=!Pmlb8Ph8z#+H!*!SKaV4Yg={X{Pd?__w9@B|u!0LIO6bVi5#kHgCF&aEO`TU>kp zeq__4Kl@#q*l@sA;R$k8DD}QKD3&i=VVoBrKg??sfP2h{VD~2gt_tDgVvVi@gT)(3ZoTpE(&tpYep8}W z)7iDZDKjDth}l$4F?L6)q=~DK7ckrolo>BE(?qZo(%wt9YIqzdG zFJb(iSZb3p>%)cK_>XI?%)0NX<%T}GwpFso2}!^m${Y4gyY4jO)cQ#qv^9Lomx>xR2OIN;c4?~8TCb*qG*{_yqyX4dXy=W;w z(xCu! zpy%FuzULX^{IK_*u*Q1NHRpUG#n+&`VgT@>WB^{2kji^}8-t6yHRu@4=LRYQES=L` z@~Bf*vJv>yT0;4yCgL*mcQo%vj|LNM#*V2x!Cst1TgT=V95&~!r~I~#&DpkH+4VCt8Z|6>=n`O{Y-4jivi%4t ztjH+zpF&tt_CBddzK(`FN1Qy($!Yq5r8uA7b(iYi_FGAOlpufWOhDeAW8)KCi#g3c z$9JQYy`5SfLEIGNfJVI@LYtx0#uYY0PU}V8&SDqgpn}H}p(4uaS?r@9d#Hn#ZUV8` z%auAdXlYp?R$YShK5sjhW`q2qEgROaCDtSCA)NW5O_oSH{iSkPnVE&0c2q7^I^R8n zQ)D*yKTe;2XH{lk{@WS+zh#`i_bea$)w7&KrR=g}$wKZurulXHO^Cb3*}f8goMIpd zL(w8~&~mzM<=LFx#D6du^p}w1;z&aB&eZAZ5-2!j0D5wIBe@eqyCKwV!Y284)PMa|b<1Qk z<>oVA;{Uhf6gVvn99P1zo5oW>u`@nITImoNor|&_&`u&T5+I6u1$4>P<_Q37Ob4)5uGsXN$hE0yLT;wicBmNx4a+JsCHvLup1Ud~eoRtxG=5 zcsq5eVSby0(5~dt;d&YGx1=`HOI?K4xwCj<=BLF@>x`$N_H7t4wAJ{dbBZu=vyE8l znjp%jl=lr0nvmQ<^CiAe^8t2)omIecQ)Jiv+#C|6SZU19h6l69jRE1OhCR`llR!#+ zH|JBWX`$b3j`ZE@ET>v&%{9EoY?7Xq`Ni>cBcV>VcxNLsd6oLpgN&ypn`ZrN_@f zLl1A5!h+(yWmsbk_bFnY+VMMLzKgv@sE3t!_5-(M1NZkhve*UNA`Ajz=Z+sCtu8HN?zAJ#C+;v@f2k74_FE@MXK|Kl?LpO|MLBB%@peigV?FIfJi z$1oX)Yq>%RLNVk*s_K`ioSTlJ8eK8fw)OL~Lqzd&cUcb_0vzLnv~ltLLn73#Gvv=a%cw0Z*u6OeBj<6Q_T}8LS}}s*G+bg0R2nAEYMg{ zeAh_O3XRs6YsmI)MU}CKt%^ zQq{YVAOyGAC(33@wel>=|5k*T41XeLs}8qnKG zKcyIE!JOlqH#@vKwb58MNgz?p{I&EFk3E<;@1?%;}G!l^-A(8ys;FG3y9 zI{5j552nZwW2j6wWtU{ZvuyK1UAwYwjixb(^gQg+B;hvQlw41fwGF+^8D{NsxsA#W zdRMj**sgtG9^0nF#2Y5u2{}bN6^P+l|47yB0d{}=!b)&)4HLctR>@cUxP~n-*qAV$ zhDr6+o>ENb$;RF)K4Aq@r@GkmxyRZJ@ISS%J+|GvaO!(l1$J2(JdDi2iBm|mp+Sf( zeBe+m_3@4vS6hN(wA{us#@=EZYDJ)&ygoi6c*mqUE3@*_!OkR=TVs8o;hy{`iam1l z^vuE;nzXr%oACNzqFOm^=I+b(&5K`@H@y*D=|2d}XKxiBo(Bm(tVo{4CVG_VlzE`} zr{@v0y+Dr~M>Oj_(L)bEBYAgv%FYEZ?!3oBI_7A2M4D&(*~k$k zX6E}dE1Gq(pC|f=%loyYR>>nT`b8oqUWq~JY}Bqdb|b6@q#@-7q0aett;Lv+pSqK& zq5cS7LxG6}Pi=p9rlD$l85d8ZmIQmi*t|+aeUGV~boXm;5?bf_*~gAV2a}cS@|Fi?K{X5q(1LOZaW&O@YeC`7jWN;vu4#Xk~)uTGZPCzXf0Nn;? z!Ju`JK#k;WCG^c3GcE7^=34dBVZogh)TAs0ac#HxQ#gHj;C!U({xZ$wlHw^Du@noM zSQT@4zg(^9_S4o#ogC>5w-}~?llKcQ3Sv+k^bv1Ex(cdN7GxVSN&!l|ZZ`?3uPMii zi@QBM0y`W#TB)MRU&jm(tT&g8+lhOG6pMdt>k-`Lc=wbC9l3lNIkj_*y#!<<9-EXS zXPpMO+~ORX563PW&V&R5Yb)_D9GX_W%RYDptB6vw(qJPbrZc6QjcPUoMnsrCYRJ?0 zBYN-cWv38B$KK%bgp(;h%sy$z?h}$P^%=9Sbty@y-O@!KSThEDlIwX46ED&I*i$e! zmYLzYRjk;f7)_!k&_DYY=|scrf$zG*B#+;*00(x}TwJ51&mErvm?VEFj%}F))EBnp zLithAx4>5VRY(s0tx8!3RHfX5KIQlMPaqV9OlU7GQ`|Xu%=j(U9uNqn6s|FVpKi?7 z=hE*AwdpU%H*hz#tmb=9Xan4`5UR*b1F7~ajyW!(_~z|w=YYMnIyKpWpc2QMHNTXqrKTPbT3x%*nJ z%5t=1whrC2O+l3k8iBd9r&8sd6HdkFWr$eHdq=~HhZ-BKwSaS3R2Ww#5-3$J5*TD- zYGP~#3${qO3>^ctDwhdJvynH;CnUuIOX&4$OX~m6k#igj3qyd4LXIa$t0pby~H5Y*tLDTeW)Zg}?TS`kOEwz zVursjJ^y8z$)S{u^KK0S1G$OMi?-V$^+BeYn@dpN=q$4%`Wy|?pM<$eA-K1b4eLqr`iGB4?!-WPcUMMNC712-u1>2x~1_ZKh@ zUK(Kuxnpzkbaf|t!|tqXK*xzPGa1xgEW5Vk$G(u^(_a2fnbZ7Sx^O@-J|9bhuUK>o zT*2HsfU1zeUau5ZDt%Q**m3j2flpY<#5GBP`jSRoKsC4BX7CLb!nXaFrwM`p54F_j zPCtq;EJyfln4I1qTEu9fm(~a`St?@MXuqr83bghZkmyQq_MuBXm9hKrj~KIX#5t_W zE5%_}XSXFM#!2=RI!9-e7mCicu&}EWP)4;nt~C(=!3V5wr6VUM`$QgzkYv<{^dQS1khEYc z)uGi4k9QO=*u>!-tzuV3MXkJ@idV^g_OHK4hZ4PwH8f#u{sg@QKfXH~X`t;o-7Zdk zZNNCLc-}dxGhi_V=N^gvIvoQZhyEnw9tzLEsXMZ`*NyEpJmcm<v{gNaPt%0`U;2GH|HcOW586Q`UW}JgXXU9^eN*WyswX?~ z@Po|#E!p|Ujag~KHe2 zfDl#Vc!tV++>|rrh&3)Wq86!fjIH||$#>uhMfX}}OyMQtpC=TkSiLH}lwNvd=HoOC zpvg#3gDOQOXShzd)a_Y3B=|oUhMMiIyq^XPzto!&fZ?;Qi(3m#tgj8e^6d19O zV)Dx7>vVdtUeu+nftN}+NR%0@J2{p1P)sI%dmgF(&KmpW6vhUa$+QdBwfcQAAj+JB z^k7C6*3RCi5EU*Vk$9AeKP6Dh6#+tDrTb=A^2=myxUIfkLzSu1`;ES$pMbGZ^*x}1 zD}Q=Ioe$rx(hwy=o&)S+b%0$g1OwvEEX{nyhg@omj-01heR@LuW*2`R*aNYPg_&Jn z0_%t~7irtTS{$GUJO8%UfastW$810?*PQdNn-~sI%VmO`w4M9-gi4;SzKf@-vqw|| z)pGR!&wxtc2?bbdmW9mX#pdTq$EZ72#!2k3?az;B7e1YCGCW7ux*;ZzMc2ZXrnf8h zVVOu)+C8C(GDu2}?Kny7{ zVGfomh^-!qY1ASrG((wC0;!9kZ?lichz=)s<+ho3eYyIiyTkjAo9-J;EzC?-aWW)C zQTjVJs}y*ZgLfD#cGq1urup>V79CKMTB6lqcAswFt2z3-YG^es_cX*JHdj%4H#$|j zY5qce+CLk-9gNJz=r)<`j5YYVBP_3_(q?QIkLsXkDdr0wZQ?SolFBSM9w^=Mv4*3t zzGuLDbl{6qEyB_oQaX3i9ThctN{HzboYmw99|n){ZM4o{hC5h zy5v@${UIY>Pm+bvQ7V^h`{0l4(Knx@BD=NF})&{?lGG9&A{ek ztZ2&;k#zBmd$Jtcsy5Tfyk9C%Y%ewKXR=1v<9{uVV4jvJIofoMHarCbY!HkTIf76KnYq^ORlSL%_^k0~V z<44THQR1YY$f<3N6k8XV2-7DxVcGSb9(Tt{WrO$?f&#FgC9+%ecW2z%8OoR15xZO8 zpUi%EB{aOf08G8{?p!B~A4@3usMCo7O5TMWQ)LWONzf`RmaG}jh~uX|T-{zlq@jml1X=el63c0B>_OZldW*+qzmJv${1N;YA}j za`|zpFe9YKj9wi#OI1<=$0dW7ExE}7SMVaB=-!&@77`ln)hVkke31$;jtWWQ?T2NM z3Vv(E zdyZl;HUOp0kqe;InWIPnLvZ7M>N1!)&iZyHCLYiSg~pC8FRL{ zx|FoiTZ-Cz3_v2z$Zaa}%#rBcL1r&_0`Y-MP3E-190tFb|JwOA?cA+`DFO%|2+sV{ zpX>^tuB)uHgU*Gy+LO1`~v-@)9ue;)x*>c z5)N4Bk&>{{7UAS=&S@~B9f3pWHCh0q{*XEbtsy+Zh#@8$B<8exqO|K9Sb1LY+3YjU zBxD-gOpnv;@OYVT|Nj7OQzBX>M7!zxvTHl~mi;3l=cLXBAGPZx<6z!127R}a>fS;f zf2qvoKKqYu)NkD>a={PLCwypg5}{qTBq8wj6(1 z>TI8+k)t=HFII9D1uX1@j?m3$XRPL-}pYDCEGVa0-#RlGAtZ8=eR8=O%W3sfk z7$g8Kbj<*voK7166juX)V$K<$y7ei_`MpxkmmL)4yg~}^<&l5DdBEq3AJ1v7e~fYh zFs#R-WWbF)N!o*~;#bsm@&+&go?}*K@324usxyu1yYh8Jk5@2re)7U269^8fu?J?D zfMbU{2ypE1$l9=dt`y!+D~eMGId)!SN{%L<=Nq19jtzx;gwLU*q7p3zwXmN#YmJ$g zj@)+UWy|Vv$B+XvsvI|_JJkAHd4d6tBKsb0FHzYV6mr8d3achYwIbgIbG9rnqvYa( z?k7W~y!P@;tU%R*j|r(w8cf6QMw!v|XdK~g#J+4)jMzu*{e^FNMtU`%G=IgS;@ByoTi!*Teu7h4ji)16z>U#$3KYYW9?n!K(^c1FBmF_4~2r^y70D^ ze>=D981B#N<8`aCn#|D=Y{V;E9S|;M!TP3AV9PYWP(jRkm~VB;^96lb18Do}QC=F~ z#LTS^-E5GAo5=nANqKVstzuD3LmR~*t|SG$=(usR8y3nZ*0yVz&|uysd==#6T_;I$_?b!7uerm33`1z zdTG!|66~pBF<2v%bS1!qNNR`J=bUfO?v|&}&x^Z8f=Tfmj~^rA_$j?fw$#C>pVmpn zYdxrL1E=~jF7ADzpGdurUhkLZ4QD%fUS^d1V7<5_#PN44#|!DI!@F`{*XY<@VrK#E*a+er;)|+?`+GAOn+lWNJK8MAvJF)|3v&mW^{!K z28#z)3F!*E3*h_aBkaTxIM0uq0ue)F$XwW$X^>ibvCDf`c$!_dW1nn46;xoqupI8X zoxD!A2Byx}wC*pUf77#)l$~t1V&^j+T$spl!;U+ZwVQhs4te1~p-vr!?&sRqYtFF4 zK=pFVZHo#}y&RP3Vczc}bAu|8VvCKqfgjN^?1%9ZI|tWmKe{A{m^VJI!T6g$hx_kP zCp+n}9pG9{6v#7rYnA{IYCu~R@W`{nyM8>p?{Po?uH~(j_rs5mJWx}{S0L3{8!-uR zBaAK3vAJ}~#(~3o6Yr2+ltrB`0eVHitT47+(Ot9h_xRiwviB76D5)ZE&ZX)Ek{z^^ zn!mM70bQuS;aQH1CsmJt8po(8(moaev{Fc#o&j6Gav31Fm?1iP!g`!=99*+lR`N#6 zQKxHk>)79)rqA&e6yp=1rs=d9LZa6~(4*ABfLaCCG|?A`PpD>?DMk8PvaNr)2%h~D z=?qH5>l3lR#_frN$T5bZ2l{x>tb$0LU2qEu4X{R72f2VVnc*xE5a~3}-D|JLk-3L6 zDJUWrr6opPnhhNSx=@eJL6OdZv&=5j3Ml)q;>RvjP^6Q$QZ_g{4W7E9JSDmguKwXN z!DG;&m|>1EQ?bUxOhKL znhJG0iA%rZCXSLiC-!Eki5Y!*)ihe;Jr~Q8L?*a}pVn%c51sfc=$!hV*3>#orm4PA zJ(p=(p6Ahp3CSr=X@eb1GJE;rx=2-RWx?DXTV!vsi|djkm1^y#cQ6~{Xd=@to}n+E zeEG`9z=q2{uhPImi+%_BrLR7?C5I^Sj+UEAx`JZWPUV!C6z`|2p*ZGVhIrdZ9|8mZ zwoR2Ef%#UOB-m;QP}&z{kvu6dSR8uNwy4yVq$&35t87Z~46Cit&m{cN0eh zp|sF6)#nL$0d!4?&hOYg=jUaatlQDD$7$sxH}ZVop9$UW_6z4 zxjf|_r=5-Pt8YuxmT?F7JeG0ch9NO6O};oe*}**>*zE1Bmg}h*wj?!7V=$!abp_!1 zRMS1^YV;zP-F`p;GN4@njgP$JEVsHSb~v;|V1!jywgmu0EyIIzMxGW#tQg|qcE}_t z!?n6-;*|vkoa`cP=cvVr@`@xA1*3x5)ZDnK3=#Q|t!r5gxTe(HXA^N^dn}L`CNRdn zb27x0H?h5twKLHuOxSYHuc@P>lUyTVcw@BZt|4{aMI9PaMa4g0$|v1fO|d}zlq?cE zcoUZVv7S*yWJsec5AhfHyOzm_e;il;&J@ka{C{p_i;v~aSKv~y!sr+}nL^&3-d2IP z=<5u-U5Qseg{Sk4pF7z6 zx~Js3Gx1kq`u4T!_+0_CXFFxYR*P1gZIc}4cEq*QWpV~G7m7m2+c5clu%(^yN=RiC zzr&+73ORhE{xaG%25;u_~nb5QUY;NZzPHQUM>*}{Teg9QXB zDzz*fS!)%M5QdsowSs^U1oh(&uWTrn)3-Rqs?Dnr3+9+|gD3OUuGc7=VX=6ekLi^| zD#js5nqThulBRX^^RI?prAlBd?2fBp=XJHY)z85AvCS+!|NJs_ebmRO6pKb;;7-Sx zpM%b%F(Na^Et@tVx_Upq=#5%+=G>?OPaBb4xrL8Uc;0u^N~uy~WV_O~_v-#^v*qO& zg-|vhrITM&scK6o$%I)l`D^LI>3h8g1a&t>gEFzQ&akI)SXi&4h2EzhMDUZ7*r zGVZ1-P-UAzF-!t~i86&3#wcYKosSbH{6PUGH0pC&ZxUJoynE0WOp@ zwH} z#u)aBl6PJ^tX4n(Ye(n{d@aq=XF4Rmv*#I$8%2vT8^DllafKYav({`6FeIGVu|=o0+qUqmbk$N zI()fLOZXkVh@bh3_2!gL^#sc?LWN}OU>WQ)C2ao?@6VvB!$e18BsCI23lB~%cLMx4 zLE0Gu_Z~Y%a@Y5UR2L0s(D`}p43SwJlib{B&~FULoo+N`24^LzPb~Mz3brup*?xiV zclkmTuw7RGukPu^6_=euV?&r{lot_y8f-f`tR~pB+j2edo&RD7r+Uc|h^-CDfzC(JBnQ`K0FMbk2>y%KnX>)#!?*^WT?Ct}*#oW%Ak5Li z7o1_o{ZIzMHHBQ@;zhMg*JN(vZ^$@gq0g&s&f+$};kzBc>VX;B{KGp-xA|>h)+=iC zS3w5Z5T~e}pw@X%P&I@@;i+{Vz?3RIE?TxlcV)`jk2zJUCxlJ~fY7OSNw_QE%l{7v z(2?lppGAw|UCi1ukhdB)bOXwO*Y&jtm!`nL%o7O^D4l;K0p^7UJ}p|D0K|RNu`Py# zs!e3Q`lCmwqAe|G(E{aERSC?LKsnWqzPSLTw4OxSSoH${DOD!LX*1xBcw}6Vf)*|M zTT*9at#81hCG+2l)?;@Dz;MSJ&n_aTSJIcUPSi5rs`0GfuD*$<pC9hUvQ3~1A0)_Qg-;}MHU83Mcv4~|(CPc-$*69hRF zaa5os3zqZ1z`^B(w5MYsI_~4;V7nu7gzs!h5r=kS>bFRrfmu*w7B%xkmVU zo9PHOA~*&+Kvk2~AvPPUf1!Nbv3LQ$*<1ZW zO4CCXPSH);Fyt&KI!U*gr~bex25a=~huFc^+INNmcF@BdeoO0c7diUfJD=umf5i-O zNN{nq%%zkVF&|4C9_nwRC)sGsIi9HG$EYiG3y)3*XovOJV$ON+2iJsH%3?iAQ&gvF zRDVfR%3t9CX{y@uzAi80%y&~k5Vzz6V>KNH`TKT&J(!;myye&E>!Qk#r0SWhK(Op$Z^We85RDSQYvPruYw#S{0lp=T6SK; zCZ2WRjH0^}StQ-fjK>*1e>KA^imSJ8_}QIdNXq^00Ee2c6YU=-&%ZNQGcx^+c=7bc z14TQY-gtqJh;~T874X5L$nJ6S7(Kr6<`x`KAQ+~73squ_nVy1MtDwUf{!(T&VLT}(4rT`m89K+Hm5iq8hp$y6%?)=;&6`Hhyv(LUG}}pV z?pp&VD5*)WZoCk^%6@X7B52jU4*);12e;d6#EHDdlD;4IK}Eo>qtV{%ywuxFx9yi7 z4G@CE$1cv=02{oxp>!PHxJumLwvQB(x?@y#voJU(Q3$r7BRODJ6^VB`5RLNqV8V}k z>KP0khytimQ^vBv!oeL?c?g@>Z$U-SBx+!^BDf({9X!zDi9tLCMK7gkG2-#8FK@f7w%A7!P(>7e z%4-i^w{e4}?o{>J#&ojWN_Z0D&*r7yT(~7bh?fs?=3mI>17&LC2J{D4Vii^^Z`WON zU#ux&^t;EQw5vEuq4;Ma9T>R;DV&DdU*v$-2{G-|R3vu72M>!K$(kjpBD) zSOebgaIgkBww)NlmwH5&Yq=67nMibRh`MF`QH`T%RWNn1t{9w&`Jwr$q>i8kG|ujp z&!O(t46mT^1H67jU-e+;`JNXn-Fe;#$y}ZK^Vj@{+~{YE_51qX(uY7IGYp;|>#FRn zd2_}U&<@=iIT5&qlJR4!=|_(V2%sG6_ip|f|L|w9ri#INMO4zqj-qmg_}mF`cJmCGPvqkkc;0pF- z*9gTU#a&!T7nWB@kHQQ+lM7X?&AsIR>6FsPUy{oKtHHKZG4OU0uFId$gl@HiUi-O7 z??UB2O)JiSXWVAs_#0+$2*|wxLA2MKkcDE|l(OD{>wrzbQqY~+Rb^pLD_Ka|FCXOn&qEp9RMtLn_WcY4hc7a5 zf%iKlMO7<0v}KFp#d)X9ZI8}vxM^3w1*uj2L$y=q^76qCgy%tm>jL3~9%@x0=~j6e#q zQhVKoqmSDR$5)D+vew_yk+-7vT64ExfYYxH9%O-}g1gZ;VvCAm?Q8V=sza@!1%mTr z_$9FLW(We!t?CIe=GS@voM*pnM=)aq8@rr*K^gPx=N+fe0;ELxR|rr+G$2TAsFeb~ zZ5Y6}ZRqh$6)-Se6NUt$3?M5KD;v)tv+zc6Cx>rWq;~?oZDXhG$AajfY-i+jkRX-u zbmiN(^!uo3)yD`Z=u6JKMq=s~tS;4`nZ`06k;yxS0BW#7KNY`G1<1Sxk6mIJOK8FX z&8;A0vi_Q;N=m%UTG*h$=s7>wQll+?BpFzFNIjFK>Mw<|& zUYp38{aj2YXA;ahXdHc|(r#hXSbRnTK#c8W)-2t+m#DeaWLX;*NMwR(LsxaOgDb}7 z+DW9n_HjP2=f=<0Je`d6;~79-wjP%isiv=gw}qEmMr{-T#`Hw`1nmRRz#0{*QySmx_S4?1VuhU^V|<}cS6xJmb>17Ny?HbJl5R&(TT4Q_ z7v_;m$tv=n7lUFf(Az}PMC4@cH?vP0}>>fpO zcAj!HEm-`oH}9SA@a`bi(_lZOW&9xKf8IePc_kih{b3R<@oM;0_}7c=#MY zKPpTW3#NTGuh3v@z|9#({|kS&JUKtQl-@HcH0n;{PjxuH*PrWxBU?P6Jxc0s{&51a z5;724>6*gu@X(8xnA;oJ(u`y=aUq^<9Jb&FWq5V` zE{|6I%I&erf=lmpP;^dV#@U~?;aZNa=VHk5;!9P#@3I0=E_X@RnsW)im8}I$-@n&)Wmh#0-Hn1># zjom%7k9;?Dm#@-LS$>V2+{uy{eOX8RrBD3^*^0Wq&!d(Atm+a0S6y+}n*cCGX* z?nAL)4jViz*Eh1xDNuVf(}>`-urPn2A#B+x%evb2Ifpy0BpgzpjM`In1P;iKBq;+k zD5Im{FF=^%Z$KE|{^J!790I-?D%8Ia@$250nfU1`W~IAKxjttfO4=0ej8$K3rqCv_Fd2R|Tb+RKcJHh*o>DR6g?GQ+9}9?{SG&UmUn`zh1T?J3azs=#B>$i5lJCd zBUu-^fi){cTsy#YR&3~(wk$j+n-AM}f$j6Jf(vgFMoY20er1WD}4FDXC#kXoY75tvi* zrjz~V&00qhJ&VD)K{YV6>6!REC+L}$YY<6P?_o<}eZ|FOiRIBs!ap~j z*zTh=`iPm`H|vf?sK^4~m9tr4Q@3AGSCB0zEs_sAEM4lYUG@aNz%{O;tl4DnZR70@ za{@+})jv+2f9c<5_`laUj;9d*Tk7b~_^qu$kn@liY_p3Y_~d<(^b10dmdjGWa_Q(e zzXRSDwxR;seLA#}&Q(HeCfR5b?HU&Y9~kmFTaIRX`;Y>lE)lHi&fR zM+186c_8J_(zTdGslxp)ktl7U*R^`q_#(juVhq*{wEg&k z2Zmgulm#jk0^3hQG)n4!DpnOi6{}n$f_wwCe<`M zY<17F15$~w@5P0aO{`EoklL2OvRDIC~@a^ zvA-hG`>CyRgDb|6+ev(Lg6T}U2=3eo^2A+Ntv(49f=*ujoUgx_1t(khu7W3XYB@+Y zpWDd-Zevv4>LtUqrX0mXwUMA!qhryMGS56GP=iYOYFM7iA)V;WMVQ2`<&NeKcT)Hq z^=rtMjcA$qHQQ(6Vhb~c$sL#wUa)5f{Eb|X+^`mF;;#F=W2M% z=s^OuMvwBT{Fdi?!L)Dd)sciwqt)AX{*2aaV|FY!TsBNNkw4-1)QRXkT9<&ehxKL^WL=^c(f(~+N-Q430O>>QHz#s8Z+=^s z66i)TY`?bs=x*HKTrW6HJb56{{-k~vPz%hQjL;VQ=3mlx!u`5ww2M~*r`H4f?Ab|2 z&lEH+iMBEI*l`DB#J0!}zq><9us6v6!`R?p_?Jd)4vxR`lmA@BhN2W{=mdm z)JgQaxn@_G-qw#%3^K|+Tn~@o(s-E1S(5<`4J^OljI2gfxW+NeWdNVtqrX0IjKXv3 zi21;G*VaA}Z~Zg*4JyK*IL5LC410P%cWMyc^S%gk`CbF+j+ zEB$M+0jIWB@&EGK?_A$!Jc`RSPvY_y5TBh>?m^M(8)A-qe#v7AA|Nh55ltPVp2THe z+BRFs1dO=z?VRi#7Z|l>3N5BM=RROz(Ju$54oN3Ruu+XUFvWc9;yDb2UCBfhQp0;K zkll=^Hxm8;lq>MfltxgN3PIwss_;@Yb!DM73tj|uO!yBbg4;M!0H6$r%QYZz`ItBr zBrazZq&Og~KLL~hf#;7k^3iq#h|BWyZ1+VO@RC1 zPQ`de_tU~sZVp;l(4M@J?HmZHmNL?x3r0pEr1d79s>!;+*f*VKg^CC&bYnDJ&7 z^k`C&=CE(=Fq%_jI(nz7P^?Nky8FyTpDM)03;__8HBge=KTSrrSg8Fh>?}FI4H4#k zbVqi&NahSPz3ok~u{cVcj_;0L`BW4`b3+^IK8~-f`^r+Y!nQe(u63Gt#gLz`bO5~J z4r3OQhh6=}y~()P8>MyYY_n2JKO-LcFZ9WCdeC!_~KOQh2N7mG8+d83h+i2 z1-smNz7YAmH^dQ9g9PUqc+1#?>f5(e5vU0tYMi8`KKk7Dejuze;5)qGc1X15J(i6V)q z8?iO9X^~tB+Jya5&O(b$M60*0IHK0z%ac==$3>sfqU)i&01hJXljGbk_?+00(P>mK zp7Ik~y5MIJV_+onmHaDu(WKHNTsxHq?9?x@GeX2rM=!Nr1PeSv9ttymzm2DZOjgYlJ+qGW2;^8DXgVZSF|wN)O-r1@Z~XcuegN31c~;R?}?C4t1f-{NI}>pM{59)|U5Ru<2V z3RK}?x|M_bOCdG=QpdLOw zhf*rj?r{nYHx>c7LFq@_V1>?`Og?andtq*PVP6=`9`ca`2^4|3ABwX*lrhF2wrOF@hwOyXtrN%<$0Lwx`qg!E@M#$eh zY4XC+QqzP7FJg{rC|kP%)LCX3U0>-b)qjmr|IrT$OZoQLM-zW`qotMZM^hu$n_p}u z5;eda(g&O1?w|*CmNkuWYb06%b7;)J7nnnGFZ>e1PamZlLbw=&oA}_J>t8|)3bL)i zP_82wV{ooM4~$I+$%3oY#<_jF#rA-#l)HB_^w&B_ zQ!%OqDJ^=34fO1+7u~YXMp1!Jg=O{ju;Zl;D2Zp@Ec5{^=45~59I=iQ65Rdy5&;>j zAd}K~HIJi$0*jL4xTb=q7nL$se6aI@0{Qrb-{`qBUzqjC~ z!@e(d9@F!sGlg8|T9%MTF1ghSC;1@>&hg#I*>qM_- z=q4@s|2TpEodcVJ<8Kb^|Fp0^ZbIH;kDCw_Kyh!2*{{<_umiCLB|@9TFJ_s2p0|;l zv8WbqOtn*}dno?ygJ#}63jkK3k*%rI|5=5!@Ib3j>MvJ@Zi4WvUKu7RRDMkt3QX1C z?G@~zUdjrMIiNfMyr|ws1ZuwI^hIG*7i7jQ(@J&R#ZT4MygG- z-;4?s(RZblglZ`Pfe|V%ZBT8#E~h7Q_Eu|@A*TF6yYqf6dDrty@Sgf<4+;hLplQyc zyDtw48Si%Fv^A$q&y?VaepWoX8KK26$@*;k2|5nKaDwrrc% z4C6BA^GZl25%nn|(&-E;O#JVN2=$C_Rc7E{5fK#o3L=5}$o^YA9^?Q4DxTbo!%uETdbPLYwG#Afw?!FrM(X$P5+x@{ER|ANGli@@ zpymPLhPsx57&L(#r;i5Tb()B5GHu^v(A<97+jM?D$bT-y_Zc@8N}6J#+W_Gv|5=(~ z%Ch>$y?W%lx=1-w=>YA-m%2ZD9fMeefkmt6Oz4vN`$6p6Yr?{LZ}}@t@Ft zh}-J(iN~XVK`CdBCEAJTX+Ag|oUiSxZML7?#!oV{6>cv}Pxgt-q?Iz_YQR~`-LJ$) z(K$(zrMPW2;<*RYF2%8ET0z1*m>48M#!i(~Bgk%c5vf{mofud&VuG!3l7sRbVMbKl zfho5>U@llElYf4J_|j?NNLukwVMFx&tDos9bZ3d8Ku4+)s8h&;p&kr4ua{sv8W=zL zpgDZBH=?mJpfMIx=clf(wht)FWagR&0wU=T1nqBn3j71C;K?6$nqGu9yi?g;5q?nO zHEVzKJ+ZVln4?x172Rr${KIQh%g9pyS{)k8#In&EriAU)0W67Ucco!ns=CYDPPaz~ zVPwlM2hvIxiD`x@EcYLFzf#w1hlKJVYh3BrcXjn1-l{eNeo9SHid2W?FT+0?R(0xTxl6y<~#t$`IN3Y&7xA!zd1Rgf}d z)l`%G`>ENOYc!JY;n%I5?%%Q!nF$`q4GX^;@YN2v7qaz@e3A)vvvW2`)EaSzk`z?O zVrHJVjeXv=VHJ%8*gi=Qkej0q1|L4NTw;90i!lB9=1g~AB;Oj}HwP&3xQD)zZj*q2rEImd*b_Gw? zgfe({E6V$SMk+qPn)%v6;dv8Y(o%9raIw3kE&EhSFGGX({}?-~xT@Ff>nn{kDka@W zcL_);B8^CQN_T^R(%m2-(t@O4se3k%aEt>Q+bzdR((aZqjlJcxpy6MfrDmz%9W)L>nN71Y zo^@=SPiE{o?fTzC)wK|KZCD3!`gn%^p|*~vVl!}d6hf%2U>O5WAG7doJOjxV95ewgQTY^awi;jok; z*Z|s!39(e`xje^*P!wfw2aW^|Bhp($_Xdo~f{9e*kKI)vM0(AS!ZCM5`jvp7GOTI_ z@C=Hbu^sav_z%iVc%U~3LQ#A(g3l}3jg+x@@Qi#AiK$3GE$Z{5o|o95dhoDV)(3Zy z3Q|3&bVpHayN~r_N{ro!e^WBP_$k>P3b%j*Fz%sp9D& zoi(TfdDR{%QcFnV%CCB{_+yU_+6VWN8mY{gVT5Wd4z@R-Y1vGk3^vY9f(}e8UyW;x z_YA@@g4B~5F|W9I?UX6s9FJ7`&rB=JJQIB4@WK9#;n44{H*b4ke0~OByU5FjJn_g| zQhfoJ=w3BKp)>vc{=;|uXaQvj{PHz>u=H{Ff9RW9;y1+^RwHG}8wFF6T*q+=nuc44 zDpoo4D!5AOzn>Lp>YZ{wNI(p~5OPL!?r(p&Asa_s({2Ezn(1gDkZ-o^6W2Aru@CQs zXg96{iIqe65bXvq6lXuPZ)Db4*}oR@kTuWl;LRjV3NHUDWNmljuG%UXqG5#rvbvRcA_10Hsf#n-{}A*?+yu(YGwqd$bR^w;Lae zz@k9Yj7u_{HsAh=`;9C(QA+G6x&y_=@Y^aZNKnEdpjj(S=IzrjW+D2ME5k}W@qj)P@qNN(( z{PEv@e!yKNgYS{G>o6MC|7i2=GP|K0Z!Xx#e&HidSsmb?)wW^|yc7DZq;OK`@C9Z$ zUuX$V(4BWuTS67#g^1dc59tYs4Ntk#d_;ZEEi-41`g4eq3~=;ySc;y!s^*7>IbQeG z69$<7aT5JYt2FE1owVB4{Qn4`H_-x*>xyWnb&qDTeC{)mfz_HycwcyV} zCSE5L4|qbfYV=PxzEMGVLZSyxL4}UfSv=&DzJTU$L})-wB0e2A3E9Xd06>~^NiulF z7O{Fi_*6+T&F34z)<(%N->KUBR_(Nr{%RsLIp5Sia7!0@Y}Nml<#5HN5U9z0%Se38 z488syiA6j*xe5P)pt)qC{(3y}P8~E0=0hQ9z;h_jVJ5Fig5!iz63nrpapA%3P7FC@ zG5>*}p@Bozr;L?`#r;K5NzJ`7a7>>=`-Hgy8AWxFa*Pq_Fm)tQw=7N$;%J8u2pVA0 z*VEvaCL08xd*B3t8dMSH9DIUOOGvZe;ay}luo?~ukZx4&%+eu3{RBB=ff`h&lg}G# zA9?U(+L9vRnP^_XV zz$$VPgaNGLP+T+({nv*ZO2HO4%Cb4tj9%rh+V-$;%X(E=$mAM8X4b-6apocWcjdsr zh+p(|*uxXh1b@Gbdyh+*(ET;-OY-?IGK5e1Ugvbi8(hx3s_3yGOIwdbAaejt!=_y+ z)AQvq0Z!xYxLKHIx@w5^VV=IfpOC9Z>x${m?=X6!9I{nWwc%IQxJ)&01j{x?5aAAO zx$I4g?3toi@vRsXWRz_U)xTioy+A_IASIZ+%w%AMb-v5$fb_6ZV>QNY7DFvqS0!&-l#xw1SR*l*H?4X^%RjPfwzF zAFhl|qA-=>8ehkdk2u5=$a^35u26MszqOs66I0`ANgB6lvv)lr&%3clgz-J2WLcSj zQ@hCx*r#DRgnlT27la(`60Ow9c`AYxl5r4Sf*T}1a~ACkNUv_X+i>y6I?Vfq%;xa4 zlIfNhNgFV3x}XSk*SG&ycoy^Ic}b7OamGCbhvE*-!)|boYF4l#TS`F(Xqjew<21`4 zGXs*cDmJstrLWs5L{k&{ZYKKeqMrx{o|wqmH!M5R1{ZrBQUPDsyQLfEmHO%Y zp!@Cpsowm598dq!4*mDyp8u2P--3s;qb-Jvr~1bNEsjG{XT>?UH&iDHgS9(5)T*TK zBk_*pGS9Q?CI6P?NA$YY{MJA;TGWsMHAC|WvY(L3GUY9=?j!17cjDo?IJD_#u1+@o z3~6IQan(n1Uc~@w8v7H}--N$cnunLH52ijk@)T$OV5y`Vy36vTCtJ4!2A}Kq*QP!= zOIA$v$s^R;$Xc#B)_4y^O|SCamhcF~M=G*=JspGeGkW`4H;N(pqf99R7WqzqH zBwhM{vix#?3D%vwkVTDp`^<-)Y6s9u%kL)?C4O1tXhz zk=6HTj~SSigboUF-l%tWBWg>|naHI*qeD*&AEIh?k$)voFImU8+1Kv5vyxbC6CEW? zG*jbdSU8n;h1)5bANX+mLy+D?suQ^0k}RTUz&6Tf@-bOU4FH~S=itUGNG&Ei+O#Fs;^ zUH|m-IQ}igEQ}N;HU{>kjy3X^;XrLG$kiQ3#|P|idtnJ$!3hIA7B>YO1e*`^M4}Gs z*;%o?m~`HKM}6>4(BS62+=tY8K0Vhba$-LPWWe&Rlq%F{ns6DvQVo+v^^a*P}HF%f7{wnY_7wmA``B`)KP&I)0B=Z6|Jp)4ab? z?dYQ=!Q@719@wc*94{WUHZx|*>0QhYtiBKY9;oZ>ElBQ{cvER+$;`vW^VJtaxE=4u z{XkQ(=vk~ZuL}h4rDfND97O-l9nHe~|J~eYpk?s@d=JTGK(HbZzaiMzirLGifoe_X zC6q~Au~Q=OX)haylZA`rVt^~+FX%RE{9mq!?DcV2QA6Qg1M%pm`MZscD9zbEg67qh z^TqNv)>{Kq@%m`i4yQAfRAh8$vFW<*0>5@x&O%`8;=%f%06i#RUf}$gP3TOe3FRCC zu!tZk93{35gmVM|i$FL>jS$Y!kfbIQ6${wY3gKR~|KS`#7dEJ91mzr!d%~&WjzP-e zaS2(JdW!yZh%HVj`mCaVDc>C!h}0B;7BI&{3YZIbF!BdQcAlZ}zV+n)+7D5UJR)Bo z%IJ%oNb-_!ZWF$^RVEqrkE$6ljxQ&udn1bEZUt%Cz<@4n&hMeB5rlIj=qhRIngq(? zTNM4UWvlJ}aE`+NhjYX)I?XE;2DtZ;5bph0q<}GFE_4``2#(~Y0?rW@yfobr&Kq)L zlSH5zg|TA;)rb#TAx8Mphm)Bu^;GhJJQ;$DO}nev=+OmWkqT!hDz@qvii%DC9`M>) zk+I@NT|nAQ{q|LC$Sg&n(Vc1pHzkLAry6~Os79b>qZ+Pj3i?cvjkD-+u}ix5E8HWJ zL=GnmEhpM^S3%<;@0FvimWGAv)YNJ6_@}j72bn-o4ShOJ|DC*;zy`u8;z{&hJ*3VJ zL?5{L&$7(V+_hCuMk(>-`8a3IK8wyEdT@M3)bx4kAzk`|hx$`Ztw$kT-dF#6%@wUm zTNqp4r4QcuU!y%$NDK0fyoCpdcdK&EcepQ=5=~oaI#!yqiIJzX(GrrmX0UkjtJ$-* z>x=d9@rW3E8AT^b8E~^W`phH6W~@|~AO5KIQJnZ;lvkI@`O}hY(dgTpOD|x&KB+~h zUDu~NrjdS9(`pXg-wbA;`x`j~B#ZL{svzZXGiPx_6eOt{uJ58&1Cnm@8wr{@*Zq^y zaYabaL!UG;4KGH2nx`J3XH8i-O^`{vL40l8T=exY=wxMZzugtPf!AX&Gs(CSB8Hi)ftKcS)7yB1j{W5n660Z4iu74UgM2z9e#q*Z}G9xt~-CH;ScVlY1_GZPb}mj zKsUEt94hW*g;syhKrDk##J@ zc!#6YvIK||~wFE!vTn;-Dgjj&We7<3C9ppvxohaNbZL5N})o{GygPITvke1uz5@PnNKi)-8blw$=9$Gf1|_DlRY9Q$!2u(T;dr%`3jD!zfb(oXZ1DVbv= zkdK7+{rjP%KjB6}G`?8=valB>2K}aM`-^A)v$XxdT$u$+TN$xa1j`m#JC+Xw0{eRV zo`Zm^w5g!>^X`30skmr{!IFNFL~84I8_VLNqGQe34}1yw)7Zaj7QgNREz1fxB^VWb zGY`fZi>2mte3T3NPn5!gEV)`5t%LNwyn>+cL6O+^FF9DW+mf#(bEy~94pt#MeeD00@7q)IIk5t?$7J?dcav~&0Dl*`=(h@ zo?S_($T&S?ZjN%r7tev2_bo<^bWg6UIZfhhgpjHI6#Jla?w+>t=H@7?l7(~-a;)el zO<4RTiwLP?l!z0|@^DiwZ5Z-t!4l;`yLn<;EA{Hb6-y2#t;dNKLX7uXzH;zmh*5M% zze<^ntxyuND$o9Dkh_IeygP~hkl@|`Wt>Dz;q=cSV;yPxXTMOfxSr8-=6bNXWo|B1 z)*f~`e=tjK`eqzAD1`%yjl*Ucx8~dS%%o@hGwVX#40(Ek%G8JeIdp3amB)u{Z6_PB zg^Fh#sL;-zPcHPIAe}#;3qJ3OIfCT$l|*~X@$bmQ5XtIbt4O@#rfYpy8f;Pf;FbX? z$=B;YOb!WL(wU{SOvsrhuf0f_38iCh%UZP-iW{|Phmz}Jkj5ua>XPc-3x~|pyOFh1 zN6Z(rR+hz|lQLr**@o9f7*u@Hq;Oaxc7R;U&f9WPT4|vw_7<@NbVK{hWR=AP-O%<> zr$*4Wnkco6cE>6OLbStwY$W-8P2^p5r%``SP$vCM_WA4*Cj%!gc|Ar^qkZuB$mn?c zn|J3k)6Kvwwd2m(rx>z^Qjh1#yB^s_m12|fi?AXA-bZp{y@%YwCbe`ZD5{HOZKaJS z+FcDZDW0ADdmCTnn0Q43<{zEwEnE7eSJv7sOmK74sXG#N+eEqQsz_?Qy8HQ}cB^uq z+&|8te`$mM|6E1Ty7&IK8;EM)VT7VHLiV%go*l{%=vJMXb!6%!%enS^$*B4D+w}H5 z1Omr&hQKA6t=Iz3r_ef}_gyc-Z zO&N#kQ=kb5IH3JYwXff&U%GFWtbJ4QkiRMZ9;3q~T*Zal%TG?#@+Mq#^pqo9IBqq_ z9YTIIhSqUt-6%ooIO6Z>I7mPpN8-B6+Koa7S5)E z=f8Cv?SrNlDbAg8OH@ufWf3_9GP4d(;}BA3p)~qb*j_LYtcTk-9*r8{|op{NsfN1pNqnh|uOS`tO<`6{ z(h{IPHl`uCjXz@0b&V<`GUxwMC@627Z7D3I?qTw5EE(yr^kJ|jJI$+zOj*f_Fa#bu z9LhJg^YLDLn)EaTdQ0v|!B3-ZuLlILVa6)UXiUH&Izbb5z&{CNkVyEcITVo zxDE<_x2Gic#F5&Bh#yfa-ALs;2UL>)V-Zryg+YG|;_{1aTe`g4~47Us{e6VlgB*%k}9Nt#s& zy(qZ9mQZl@)9!0yd%&HuU1$%EAbhqpUJ)GtN)fkS7s*3*9PQh4G|lv?m;X42{-r7U z?@jRkz3J<9d|g7o^FU%jj+oZ5f3l)uVV4MLRt3xtwH@V3%67+lus*XU+>o38kZkE? z9O&>@_>B|=oLJ@cl z;q`kNoBYrLQjrhD+jyn3-Bqr`m@9n*D6~c%g{reCHIoq#sfhZk7(l8ugCY-b(|>+P zDAGZIhF2jsecoqp0roNV-5vI^7!-L_PP~S?iZ1V5MdbmnA+92D)9-`c^h2PoB5>3H z<0^VQ6Kw|xV@Qt`^}OQy!+q>44X?IzH2!&AVs&(X6=+4SiJtGvYuHct#ulTYW3>YDXZQ(Y70;gSQ3lsP*Kl`30N z<~u3OFCTkMUe>Hulfb(8G1g8-RFP!-*q~0d8$v99Vl4T5;g!^Kdf!3QbspXrkudf0 zn-@1VX3x-(P4fD2pG`%8LpyC&?=syjHml|qbe{&8-BQDgrvc6fFb$?Nl4{$d%nZ<5QrfLZ za>%HIAO^VW*N_57bW+0OPA6Ta@}{Gki8|)YZ;qm4!8!Q_@B+hE33CDEDphT2M|)^# zQYc26j)5fxMEmV3rGwY5On!UD3@-^Hl<`pt*>Fk~+Z0flS>t@>y>uDE^3Mg^U?hHQ zxP^r?Sa5YHn0E?dtu`-QPjrHx9!q}$9inEelz$o?a+w4fopT{GmSnUAgPX{aWx>QW^< zQwTVhNdDNw*(Y+i$>f#40b%l15IuDrp;0TxHmfz%}Hh3MOsne61Yl7dB^ooCLA z0me-2;Q~i)3^R5zs*ympKFC|(@iwCFuT!_UH*ozD} zT%?3v_6<(C;B~tM!YYJbu>ECm+|0|gEfmg#%GMv3-nFEwxzzyKdNs&Xr56yf=~mS) zJc>MNiI87HX=#wMd0R5zvz7-w>%5{Ydk=_gjjFsGa6StOr(*C!{YCepbfk(2qYb@F zNql3zd+{MMHUQZ=&AFTCkI$O8p9Yeo&j(5Ri!;KhKGpqN<~|6;qpmF0wimR`-{I0Q zIP+fwS}LzdUIC-^D#YT*lZ2i_)QM2-9_H~1n~Kdh-k?`Ks8Te_*#$a`1n>Bccliu( z+{dlZ#j!A1&sqF#)j>wQJh}i)<-olCQmq6&{fkYU!HE1>?}?+l@zerM7S|!t$ikvn*K1X zLy|;6mC`R6)Qw|KnYDMDX_e(2Utgl67;F->G-3aZ3V!J%^U-hSD00d8Y8r$`FU0fM zqscdGM1^FI7&NNMCdn;e7;6;PvW_2yoQyEY2N1AI`}4JS^HR6F;FfoD_9?bWkK3%q znXFEXnXN!n>;5hzRaS^<-5(fg*jJoQy+j znuQ(&#e6;tbUM!`CHQN@et`LY@0E#ThopV$DtGSyk1 zmuVASRtrV8cJa9lvIDP4CjCJRf4z6l7%oxvStE_g{>5n;jzUW!uatj2X{#NDdbaC<})jdzROt!21p&7)3YX{6xCd^F`0YQ*&+gr{GC`!9Uv}JAf{KwJsFTK~? ze={EST2eq`^T#mCRR6=C^`LhR*sX%V`aN!*Y2t-h^M^O{N|@e*E6>1A>&<41PLaEj^OJ8zG+v)L!4Qk5)RAY5~m zEq*Mq{sBJ2?!G}ReFskRhsTim`RL|ft&5n9HbR7AQDIHHUpe-+1qdr3=vfXM`08un zF^|<$yDg$0ZRrRkh=t1?@G85Zs=Kw%XawKpth2ekTkIbN=-D46GqOGL#*cWl`#07# zuNt4WOC1##9Rc(#4uE`|m}KDu<3OrEAYIX#qTylh7Qf@!n2ZrK+sWB~{0ad%@;G;8 zLF(t3+o%z^ew$>q=z!`VbCK7|eSkd61+AYqh1AbWSaJ1~o<8tp9iK)sc%8KJ9ezy5 ztk@^w1i?W_oY9m|TA1D}j`4+RMU!rU2pQtR*A2rcxp>aW^pC=^@eNWYh{kl7Z;T(l zQqLTml&D^X)Xxw8sh>v-wUie#r=yV{pd;%9*OKl18;;IX5LpFy zq3ZxBW?;Gi@-keCfL$mM?4#Qjtz9TeY5bV-I0L)b0atD# ztrZ-d7nNMIGs=jyvuhcK^yPz|M_cXQiA!=W_HV_D?y=9gcIE3JoYL#~!L#+Vh_dQp zv5z>{!}ok15%MT9p>~FJd|1_!^kyO^xV%qv)1iK8cr~e?CBG+}81eJ+=R95vGF{+> z&6*X(tS{S&fpY3RCb8UFubf{pNUVY?dz#tzY>x(f)ZMOv7xjx@o98{f&N2NGbCT6{ z>4$syB7&d9i}R0jQp`{kmx z8)DnTf1Eo1&Tq}i^0$hR|Alo>QoZ`A2hc+Is^JeIXrcYJAwt`&?f8-KZ}|NaHe>3f z?@Ra-Vj;&f5|2~#c|>lN3maJ9>nYve(h?-AklJVue)sc-cgXAMw~4bG9gvp#?ary< zvauH~ZZ5gc_)hQC>c&56brCtj^8B>ymuI~(qAaPOY$H-`Nrx(S+BET-J!hN`o?^)= zP=-%;yS>fKiQ>~!ry5xhrE%B*fz>*)yc9cu#cCdb*$g$HRzo|Z7qVG<9acOFH%u=3 zZgghbrLJ_}p3T@%BmKSl9Oz= z8oqnr!4m21@5QMIgCD}<{)ASHf-ju?H>$Q@Kb3<=nr0t9s^tVr_YX+TA~AOa%e#nW zqym8Jpd99Vt{E<@IMt8}6|2W+RKIwnePokfIQ|?D0bct`KSmIE_8U^Oc(URFfY&h) z;5B=EvIC2`0t=+L)eaQ54)!9ta0!a@{zt905zlChISZ7P1i))ow6X7*2E3H5-N0c4 z+>YfncWU($h*}*6I-|cGrQfO5lEGapDbUX7&F@gPy2P!e)!YsTmHhnZ@6=XbVyRGz1Yk$Wj%=CX?e5)`^fIA zOaJDL)Ffdl1|b-xL3r!wtdNPy2@+yaY*ArRxOmOyL2+%t;kggl`(tVQ24V z?6l{qxfy3vkmfQI`o4-?#q)XR?Iqm{GkM80UjayF=|wTI$_!sQw9(5y0_JsN3w*cp zAo)FgqBESl0l)8A2xDS#Mk9r*RP<89ro-K1raR3^hWAT{*n7^0*d^zAsX$SgK;hV= zZ}c;s&fkraq;S>PRSi^ABb>@G$*69Ztc71SF)uFLMjWw3G*Q^mS3%{oD*6LR} zHs-7aZi4jSg=J4R;a50Vd`o?G0`O=(agY)vTSxmEsuRX7q#;R#*6D< zdHf*x9*l=x;G3T=e|xAgZWrrse7Yw`2Ts+2itdq33=Xk5BiNW{vlqTE>pSU!RJ z*GDDAafw0w4L69oZWR^(G?+O4tq=R}%rh(Ka|lvr|M#*Gp;E|m=;|zfq&dT75_#zn zl1_{7A=F-EGvWkJ`a+;8q&;_;+w(HIs3`af>}lI1xdnrrl=-L3uV*_SQk4tc{4xj; z!UI(y2B=?H$zqLtyzxVIagN(~ASeC!g^!cE=T5(Itx}CX`HnxDTKgGguLt_159Lz9 zqK5R6XQ>02uwT@ZJUENF^B4WKs6ndiFTfFvM<6y*6XGvog7}Ln^pp01zX*7+E00BC zP<5q=(Z#iv{)X_-DHL|JAW*XxlM2X(%q7!Q--7PPH^oWclwVB_N0_ai)m;`sg7g@7 zLHcyLqh)E>jrmMb6|oANjjbn* zW{7dqfB8%&t}M?Bg7koS)(l~uK?|h=6EX--l*BJzFo2d?zUm_;<{=K@kbl&WjVN^UlCjyBnO zG@GUCp6)A?mA2$xXr$*DYX(xb&y=#Lkwx+wKL*R?I9phPTxgUM9pEw|FZ(g@~u^!&Y=+coiWwm~5z}(LpFgcrF^|2~P zq~&TMZU{-es`dV}y3W0)tnG{+FLkT3c*y+i-yFNnhy?amRE4TrKd!Vs(MehW)ooKq z1p4P|+Un0=6#nY}ZPvY#CZ*`+{b1$@byzQC_IXRfJgJeo`^72^TWM3=KhC3n=f?j3 zav_~SIl`=i9Mh7>@>MkMfrvgkY!Bnhc?7%Sn(1mv|Ky{qyd`pZ^~w~yHawFF7)GY@ zTD5aHr+NNi(_7XQ#M{x?%_j{vz5Vf{=Z6y>=P3LcZ$<{~+i6k-I-a!dIp3ZMn{k^+ zd%qYWh-`1amKpdZ@y!K=?;GPmNBAn0^OD8DZ>MYjkL@3=t%KYjqq|4-)vB)#^Q<`W zoFKwP5$R4DUa-;-``5bFE6&w2@wY74m2J=L0SaRcts~QFfbY`rb;wKUEBy*bKw)ft z8)!pEkpiJGR-QI@^ENmT`?+gbKi6i_rcfSy03Ynr3`|B@2$5=>O7>#G7@q<}OHOM; zgog~vJSRfpGKV(uWI@Ay$<{*~7qOeHkH&p#^ko2H9?uE?4WQp<@p3xV8?dByjmv{PgjeMPtC1ZhK&P z)R~6yrIq!fF?nL#iEU^MYpeQUY?95cR~2@ajPE1XyAr{;+*G*P%z)Z2cq-zPk!&1A zEJ--+j|2TGHwmvE!BZ8vMd|cP1;uMVszu6S$d_-+Su)xL@akC-%#u7t_pO`C0)`01Y<2e_0O3s#v|g@g$e5<0T@YJi;jKtF=?t^Zj16RiQK&+yH|uu1i>YI z27VgUdo!Q>-#Met+xgrZ_xYKBy4YHQn~3Zk)Fo$V;f=b;*D=}fgj7l{t4PvOHcVCX zH+kOI_6p5Rtx6l%FBGe$Z|qMM0I?dqcgaU0k%j2pv1NH4ocK3^Lvmqt%MTvi=pElE z$t4x+^nXVDdWB$iFokZsAmW>|bXv+q13!Sh z!`6cz!t}cyMf!e~WZX-t*zTPP<2cc6-Gn(x3#&US1U4bVoJ+o84Fn?YR7geK*@&hTlG%$vMo$CYvfiESr|gvzk!YVoPWD5HCNU@6 zxqnr@p4EGidGW*gdZVf=L)+*@CO)l9IyD0LXnykG2gh@WSsA~P1)d62AkdAL??vAl z50EcS{kpI1kE4qA)+BNi*rjh{`1uqJL++ zW@Y^wU$N7Yk{h*do&Fg1+sn*cc$O_p9cejlsrvC#N`uM_WC?oSUM<^}i5K*7j zR;rCOPWciJmYKsZ{xf&m{mN^eR38*(-^HSveTHYfAHcf^2-qq1OQYF4ZK9jaHh?cw z5U~6d2-vo6wD~#oS-7t?$sVNDyvgx=tTQ-HGib-uE`*zr<0ke_D=nx(it!T>2wJ6E7}!ZL}hfoaQ+qpn~Hpvj>U_8R10GO7}7Hr zlL?-9qW;1X{|{h@YTNE)OMaji@eVNbb_I!%JtVt%JH(lysy5u>l@E9q1(s#gwGIm+ zYkkm<;bdOUN>beh?jls+F0u^{-z+We^;6UqoiYjTln*LEw(Mzj^y~&K*kJ9>D6^A* z{6QnM4NQ%FZ?2JQXp5R!9;8K0y?jX1%mCe&>33&o7_TKdh0g5^4QNq2RI{$(gpuUh zmAlka!*OT&T)7lA{R?K|-7Q;o3u#|TOp@@a+)zsz==*rYyyq7A@XM?tOn=jGzC#fk zI}BQ^XmmLOTgx;l?$zFV2AS9z>Oq00i?6SODf3gWY$MHPyU;p<-mUMDZ_iX4FzL;5 z+MxOnD^~G4X1#h$skU{fhE-`7$8k_XSgc_`bwW>Vl)UX=BWeM$2$t)KtF!Q_agTE6 zEPn;5+2?&p0ezlQC~4o@4O_9?HS;LRJsHJpK)fgi?@?#>vS7 zE<5>{oNtb_1f2gHi4Q%-)Q>V!e=rz)ymyGe#zFC%QBzyy1JC(|#rET80Y=Y|=7JF$ z-Hu2X{ej`Jz>^;%2!r7Gv+$Wo#BxVPGzu_0QV54>=NF))g}_zgsd@;NRHDyP2pcdg zM-fwQe4`9Ng>5Apx%iAWODeo_e#@%9AG&w_+gP~1sLW%z`4wPfUT#6 zCq-A_1<91EtctsAmzu}SS*C))YsK})JILR{s0&JIkh>j>e16`adl=mmxpKu9{hRK^ z6g7R3v8*uO;QDO{$3_37k~XO_&({>FAA2gqHZi+8ph)QEUWnX@>Oan>f9c0&`CG+@ zl+_d7I|iBxeWa`0a~6MaW83+bYbB0>&%c?)dpyzra%;q)#%(g((=Q%S;J>Df#J)I8 z?+?5D0=@Uc-EwXnv}80~Tzq$Kn9Ucu6)_Bzp;j&TTA543*wHn?yG^yc;(p;{NdX+odV5)1T#&2R>bAg(Y&RDa#|#$Y&U z1zTK4r(4!#8{{4D7@==gx1ay_v=G@9#ulYQ>k+}!EP0x+`e## z2W;iv_0C4ydUNc%BwZBD23mM=Ec=NGF*=b`YqK!7br z`0a0SXXCYMLoPlTz`c0?#rYjiO33pl%_lTOk=}f9JSl8v=~M8%yM|1G6dLMuoG*4% zx+n+{-NsRwblq^y*I>?TxAsyk>|*Mio@ube1IucA`yyQ-@Okb#r5uK7;MK7R~JjporuYM&iHBq_}wU$%XFIpWazT+zCkU>=UB0?HHlh zo|h7EPLVx23$piOJc-y8EpB%^QRg~(&dAvNT!}O%7<%KQ@oQ`npTt+U84?;-q|82b zSR;tGft#v1?@9=v(EHWgGtcJ`+UX2Q=&q| zNV{y%8>RmMzWaBRF3bAK_BtqEWCmh%KSK1>M?6j}2Q=(eiHu*2b9EQE?7FS3|1>x_ z|D|u5oBjVD=kI*e`$Yr5H+?ra;HO~f7(tbpsCm2Fq`(fq4}rna+dXFv1A9ND1@yxP zLi%Bsb4j|MHVY|>FKB0k&0p-v-nwgQ0L!A4*XKV48>*mSBW>jNxIdb8Q743^-c^65 z+j(DCM_gY89+nx}WQN>VfBaYatRPRw!GDhKRDvcR-oc1?E3wlyzgdN1>we;k*#Voe8{dP>Y0cjNEY8WPH% zw*GnBggpKQK}Uau!V_H+)FZ&&1K=Nl-ysbfvcCuo)C(v4N6mq8x=n+=VSf}Oi%vx8 zw`3MvPNba2Tc(ILcIGH6sNz$&pATL(jbAlG+$|m>cog~*QBq2>p<%+C-|sF_v6LI5 zdntMK3rVe>T8mBaFbaZB)I(H8tqb9&Gyu1GmVmpg>lpvORPl!yoDoEIDhT_-kF>yK4@Fa+s`J!G@yBl4#7cf>mjKp$~?JIz_?3A?5-{`q4=0UdIH8$%XOgg^`z za!#WlXS>v;CpGeWQ+{L(gSE}k`f*KsZ@;c|$?@k1HR!g1`v@ITN{MDm9e4@sxXnXv z`fsW_$}Crr0~+nd+r`IYZL95f8CXp?&r9BvE$%dJB|ohidyGsWWWGhAJ6%q6#6Xs3 zddk9>(-fqw!=Wm4h=Rp+{gjc;+QS3s;!YH&O8CWstVhvhcrHtO?_s^wk#gB9mAX(ayE#?vy8uUdJa2{YJUa2bGT?tg8s#J-f7>JwyEQo_*E4JgA(4sC5ep)XvWoE|3 zz&Y+_=y-w@I zvd4CI{o&_Fn_gKstJ(iJc>bMHnw8~mylAQaY4#CQfHeEuv+$mSHv3eJL#3TF(XGY7 z5M%S4ZKj&{C1yQgVqo(43%ZO#c6jm`K zrw3=zte(cG;+|2g=X$6uM>3YsC(AQgUe6;$mo6gJ8MNQ#zn6N4&F$7XKUP#P$J*FIhLSRhZUrq}i9tO}4P@^~n zg`e#vthuc?RO}3%@}E(3)D(Z8+wF2~yf4yvP56i0+9yE8Jx=B~H$1j=W?j0REr{CavKUz9C>gP<2^SR>pY1>ep6;y8Nap`7+=OCb$7gASA} zL>7#@S;m25x(ZI-hY%4L&ip=#i;C9swT$?f>}4c1Pv~Ct;LHQ(h=q?nNUQDfQYqXM zdekp>Zx$-br+pF&rN9{Euo6`^mIqvlQDz`%pHYKrUq%ig4?X^qA;XdZ8M5~-L|33k zQ3oMPM_MW<#{;_-sg1!*-cR2F8nnmfx;HS2lMkLOy?&zL$zsyoX@eVy%rgdoewb=Z zAHDs$0zw;l6{^ejNE0tUquoJ2Y`?t`88NweRdj5>70HWMb4k<9wN^VB`u+l(!4M-p z=72L866IvMri<0?@Tk-Mdd`GvcRDlnDu0+42-_3(Trc~6y-r@Kk;>yWb;`28)-9Ip zO~fAh1hd@Zs^dH+INO@`m4;$;V7mM!-e+-XRp(J!5uB(G^NlQOXW!HeYma1!(!AZg zvaPHJ4_%}k#zk`STVt90b;S;&MwlGN5Gu__MaS%_^}^40vqDw&xSaXo^1oNb9Tv8C zQrU5Gr+-u~)yZV%Q%fR1w#?d$g$iu$J5O|bYwx+D+*Ue3K+LIP_z1qt&)3XZn_mcB_;H}GKPW-jc&z~SO0bC4DFGxw6= zzG3o3@9%9?2?y2>Q)~mjI0s547x(fcz4B%-75tcky5YD6EAhn4>*M7@$mP$vT#T9M zO9K__6C>ZE9KpjzcjBIPf?vXYKy~)r>foI7jocT(o5SC4#G8aLrO`E)1)$4R?Rt5w zKUk(9&S^Bw1%VIlo{8o8W^`n^4&IZd)R#p0%Bo`QkCv}aaqT+a`u!pl3|wxuNr=j z#hm%`OE-t#s{=smag@l<&DcbLtF^ltsOQA<`y#WP|DCk=er9={NoYbEG6K#>lK8+O z&Or)ux4N~V4c;x^bzj%A2rrL#{Zm9iN#nS&3l8F6?8$zq@5RVpE5tF|EnTrn^;4~O zZj+Otr#;EDqlZtpage{(*s|&8-MGLXOj^-Db=)-!ZGIbSlLwKUUyN3U-AT@27qtuT z>vifS3cfskfCKOEkO?ORoYQK#8v&0=xUl?}c3l#E4Z4l4iW3>>GFTPT-mMO&Urj+I z=ijfgc=B0v&a%pwXn}S5diZA0qc2O!!T~>HAhGZ)6nX_8fAfks`u2fdv>ol6xFux?Dy zM!78HPhXYE_#8K~ejcwK?2_-<#aDD9#`rG(G&O*WdNfs% zTrC4jHOs8ZKry?!oe)YzCsyO+F7M(O+p1HMFB1($qYVaPKZ{8hEk6m-4*Fu(AyUDtpNFnY z$17>pya@XFVztwgMGekdX{A4bYoXLW98Vav3(=J&W1Nj*Bs1jGV@=JP#*l$7XKk6+ z>H{JBq9F{g4W6GaOm%FkHqMa?ZJY;_w{VjSG0l(*nF8auRHp@2a_0ICl8mEzxL?Dk z1=5F7#*P=#=~-r;qLwm5L9^fP$2w~D8M>}m(J#kmZupaNjzt`e?N)4TOG-OiCn4rk zx0^D&tw^lX?CKJb(1)efzd_XJ;DU3U?_FY)I>SRVZLVrT%y41MAnOGdMNZyaDQ-M8 zRi)21##&r?$1EpO>I6}o z*_q*Qj-HfBw63Ss-;YU}a`~r0#Px4&(|_O0!k7O{)w{BtPFrqy`;Mm?EHX<0sX20!|Pye^PL^weN^xs zymB%E@1te8xyA4Eyw>DcG;~Ydsprs8D1)d?@rT!Ge9!i)}`HsM?{70W_P-?K&)Kf|AnIUkF$2v{fAIpLTsia>jR9_K8|#y zK~E#uzxS{teOL|=qgWxwg+kHhB#YOmpt3W14tO86N!`7VCigK*^1=1%jqWG3^?LvB zgK^QrOymzuzP4tAQ0sRn6m0?$Y6X%G+!n=vUk#>8qW~`=2(^wF04UmV^Bst2pJ6)T zmr=sKUqv2~`|{9)J=V)oGf|f_PW$ELMD8vIMRjw8ZSur<9hJ2>p0@Hh1-l;fERAay zEA1p$st_w=gjI$qB#BQRX&ALr4X^1---u4zp@CivVP?;{`2|(qvK__`pMT0&xC)y` z{A79!Tc}B`TLtQt28@pnp=)YeZ@{|{sn4?;3FyvQkC$3cIsYGHZxvPL-hO|ppn$YN zcOytkN_T@OUDDm15(3g8A<`+`DIwk6-Q6V(|NCC3dq4ZP-*@cOd#r!)!m6aqZ^H1!hsisPFEVHv#r1nIbbd_L24ybX^~8;fJF0X#n`@*9Z_T;T5P2i~1+ zq*sq>yJ3QcM*G6^5oa{HLI5R5Q)6G&?no@-rA}?O-)&P-~0_DEac|u*iK8J)rjxAWS~VPhR08uZZ=`r8qq+J zuNaBV2JskSw(R|@r#%OkpJZJQQ^;wn+XDO;r+THnv0H^amxaFBh2zGcN&(+QN5Fwu zTQGPk1DBgQA$NTyw;l75zudO~UhL`ye;jZ-BkaIGLQWPm&xDKAYBmyyaE-UefK#1X z3o7lfboKGW7x?ODHb7>?c7880r~F}FitkPBr>#;{n2Yjy7F4ob;!@EZO+{_$@8u>^ z5l*X(U#^Q=)a&A<9@13J-=e!bp6kfeyVU}euwX>J-VI2wOi3Je{lqB%WHl<*T$=pr zSo)8a>3_bD#6#}LA7^*u4^5zHtP~`Fpn>F%AqcM;B!67RPS~JBrD1Gisf#}obaOc? zDZiZkB6Sq9@p`{tS8DETL%Qxpea4;J2LI+qufcO$rkRDt)Y{jw+em8#(#qdcN1vUU zmHm`84m|&&smYtC1RXz$cGercLRneJir|jRRdiS>gCrGJ(CMKt_$A#|J*e#pAv2kr zAPhF*^Ga9TnOpauwW#A^wTNHCn$YI7*nK@`wPzgBPSe(Qz*s6JJCDgzQ&GC!f2Xaw zDY7LoDtnT5jS|{mp69ErPRp7^8&iOqWAM>au;Kj!LA6C$LR$s>kG zhO}Q#eR~WDnG-HPQ{f}eoJu`JuDeuVXi@rj|GRm-EpJh;<#OV#_$gZ^P1%HQAfJBq ztaIHMf*12BKQgKpG#kP^cr!XIe4W${Lry6f4OeOt@;aUJ@H1zbQhO6xpvf^q9^euh zFaJUCHM9O{X;6vIr{a?PRn&Z2CYS)S+9N+i>bu5d&JDf}gEo2cQAfrP1NH=I|EAsu{GoOJ#5}El29&+5jr*#+gHA6 zj}xbUhC3~_VhB>82)01<2&k$YjSHBl#Z6szg zneH_8#%BL>J#YEROQ|*+8+@&0vE@zG!{T|x{YoLH{)1=%zde4ZTzUnOkXQT1FPsCG z!~2&9zN5x&2i6oHX%vt%iO32*wTDAAdy4h;(W-ZbNzFhQ0~)uqx>MjcMZE^k8y4zT ztT(gOGqEll0dUAqjtJ;0L;_d3nM=k*F{=dMo7~gQy=|cgMD*yfXLRrCfBBgI@PNe) z^EE}cdj{QaMSlJ9M?z4MS4b?eU!E;l+dm|)zY?whwYmk7?gE7X zNVpPIKV(x3j}%{}1A_M1mER`5E`LIVVMHO`jgeEh-+Euh5rSUg@=>1NX7vKzI3=KC`Yw(mFs-2$YEPoJEfcfl~>+B zv>|F2h(ZG#)L=2RU$m}gF@9}Y>34~w75alH%TE>S!}^4@PXSyk!wfir-hz=bK#*U{ zC0_fDi&X=H8xLQR07gZs(KW1*h@`L2tCH0Gb5jz4sJ$JAWaC!wUoWF|62+tNMbkuR zT3@-SGK!`2JFzPeAfc53B(xVmEeA$Wm0d{X7qA!F z14!DZ(?A2g(7n9Ikr=O(>W8RM3+|LI0ENb89{g1ECLQ3#t}K=<*yuxtZ%-C=b225% zQS}tl$fb5@s~i8a1_1{nose{iE5}ml2qcCA_y?HZ@x9GXsZ0tg7yvz9TV>_}$ovR! zx95pU64Qv-rV$b`Xm8gb@K4W9xU>s%o@srGk~%Ul{%$19d*GAq$tX3Q-{g4K+W@Wa zLz$gYR9swC4`7PZQb|RX%s6)LQ%mXDY(XvgEci$ks?2CLsnaPbn443!zjW>j{t@>Q z_3L%QbATVal|X8??XCw`Pr~s7sAQda>{b{LGj$GI4mEq!M0VVlSZ))t2gL4KFIq8> z1u~!3Cj&>LbmusjH^YS0FdL3k8@x-UCnagd;w&P_;iaeX!J@SI&5lM-KeDeCI&L=# z$*3H;_If2~U}!nv_d*d)&%Z`l9Lm@!`K&Uot_vh&!cN}DWnvJ99A=-L#0k$%A(&Yw zs3CdCJLBu)q{I|XWEG3%{Z#KWdL%Juwe5*k>p4^T@Vm#U7R!FZwomSm$CX)LUHnWl zOqFBkSLbCP5F|@4r?4xF?Vt4Wqj}(@4Cq=sSBVC`=!0tf@M_+0>#wJhN;R)3A#I!{@X}m`LF)zf6!w)f~SN~0GH4O%PC)b$HY2y80K+Tj!$`S;@RAyD!5lJY;13LG~KSDg6x^UZ}%(+ z3fW(@PT)x0x>(Ri^jd~n2+lLwi}1$WfqoJgaH98ozZu6Zc+&UqGR5 zqruT3Pt+;P`EHrLXED8pp{S7N_`G8!#42%fb4AQGAU{vWOS&n0sPb{)BzEznBPIFk zcbU=7Z;g}^a{!FB9k*6=46W{G*SgO2!~AQR4}|$UzFE5pICRVa6>ZBP-AAwqprRqJ zz3~#;!D0tm5HsF2tFTk+8X)-7WM900rR?XGS+v}_2XoXi{){lTAePdDnv5wC@uQC5 zs^c>7Za!C(i*DOKoYmUbLr1yTol6@`~Ni8v5jw-?Hrhy5-bSmO1 z`-b;?CdDsxB~Cz4MV6to7dF;=4Kqk6tytQn)BlZ)^Qh)aaj^`3`5KHh>MhyU=vBQf zsE1D~<_H&MR8sW5HF9A~Ya?%@a+2#)R+9~?2B^6gWICGnY2<}lpNiy6tm2Mi7zXm- zWAV*DKkY`SeWz8t+$2o@0Lbs7l^Wb2=F3_s9%c4{ zinjZiqLbZZ+k!t3$8%EcHOJ_TGlyIXgucDCn!y=mcgDgN*>I!MCt7_g)!fCNwiYYm zXF5j2Co-B|nYB~{I2VG zJ03BnIu{*&$Ry=TTyKSZr}{ZJp$6Hs7hz5vU!L-|jrs}>o+M*W!$8PH2t&6YE|#&% zt&orpy9mkIUqn=Oc+$032y~h^c^1mgKZ570>GCwY9C8pJvljKszOpA481Zvj&cr7Y zASs<9trzvvR3;VBv`m8bT9o7y;F~$%^&5plbu15S)N`y)KuL$eciK;OcJU)Axn9&U zB0e2QAuUW;ly3E*Af@M~zB1(pzHrc1F2i6uy~Nfc2Z9}l^y~aA<0wy+EmZJB7dBki zW#9mXk^f`v!}+Sl8R^elLj72Fj&-7+6gO$fT(HHU4}>f(wx`a9)6@o2*e}dVVTnq; z>M3vTE0er#8G7+DJIE#y%@Ny0kuEsHAp#BVz`Zb~>5#lQz4nKe1;clgR7pz2mn;_N z$5ki?2hrwPP<#I>ud)0`>-4Mt^E$$T)UlpHHQl|AGzsYEzlK#kWHUfp(ZY8DD?PfH zoWEiUdlC>sWi^l~y~~X+ApIZ1VjtJR(W%x|r9%BpFywS(blaW7@udnhEOKK2jfj=) z#0Rjixgx8)Jm7-fKRIqiF((9GNBiA6bXR4!-Hk&MtPVS1x7mi21ki1U*NGF{1eDkN zv%W#){@K0+ArYbdlSH)Q=b?4{SvXDa;%%v#(Zn|JIEw9RcPVc-IE=D`UVt~gvY@zH zgh3ct6AyW1-m)36>6@PZq;~_3s4Tv}hB(u^a?|qLWWp+ayS^+NzI^J(aV0FP{Ht<> zIS46Mm;pkH{R)s`yJ~V>-noCHCAC!pg|%b(9lrS@NWcuNHVa+4#~b&umqLvD#p>D|71k6D7`eSyj>{j_05IAG&Xryr~U_TlG@yrxD~zc?00kIJPAlyMXtR%&PX+a0kkm2GPO{(v~SM0Eif@G@1gm3UyDy z6pMEk@&k0nvzYwHQ)a9uoN0OGaX9I)l1W8qQ|EaJLbFlzZ%CteQ58yhu=)vQ@IA_h zKmPEa1Na}xApgVsSWF@s@5@k9j=R26TO5n;!26qNzzWppV91IaR7vvHj^YUCZT4P2 z62??EcVCRff9Yz_8kd7;YE_h& z?9S_QKmCbIXlNDQHXT4yVMU78b;$Y7Ji>U=XqT5NUPn-vj(xH!xNyK)95cYUglJK( zKHVGWMtlQbq;>g)u#{#poRtw)pOD^ z*2r@fi{S@6ftc$p7Q5(WTzHaTpsOEx00$!}n$&75_&u4&Qrd)Z?2kBAxy(&zgJ?MR@ z1kFJM`7LA*dsD%50PST-)Xk(Ui5Bp#0Ie>n8+|D#g4>*^y`Isx@9;Q4)m?ptd$&7; zJN2MfFS>Suvuj-_k@f4$!6|a@$6D*SWhnrBZ|$l#?w@2$YPX1o2Hd8%aJyE~GbYvcDcZ zS>U5*&G@Zx*sl~lU^Iwk?_}4owQ(JD6Hr5s9&M`2|G$qO7nqSr`}Os88v2(+NIjEF zx(J=>Z%=(&3HF<-85*j545$WBOf~pM^h(t zDj8_Chxtf5w*tF8hN;~UUbaELP{aqQpXYigY3P=~Lv>0m7hEDS@V=W5lWf0wz)(4v z#<(!6A?YiS0-9`4B3s=w;iC*-VxJN+W7}#lu_}y7M&FVP*yJ5}iEUXL2h^XDi200S z@|Bw&hUEbnasrG83ht9>0y zdP91CzX1wUf$E~c4R3qx0_>A1YIEw;Cg5}p;~8fn zaYeveK+3y5enBT*&1K^SO$ZS5H)8zue4%W2?_Hu>5+EEBg&kfl^1yRljj^F{vGz|{ z5geKje;o05^C5AelK-J%2e z!Ljm#W~mS1&#<)mea%n^$V%r&XE8U9>*^kETGV{FUo@;DaYjo|U{`@56MxN&KeFNK$;P~r~^J{$EC%bQjEl@!KBVKF` ziB=@OpfM^RemPOJ@Z$p=nled1ZngrvhH+%czq;JiIouR8a^L#5 za(q?$sdq|Uf{km*{Cz3$*Z2@UgkD?E3dSraT95P73^i2ZQ;Q;XK(idbDZ5ld>eKh- zFT}ZAAmBKs7|h>ob;WIZ|NXsYq)5cGjyC+|ssiAij4L=sGCaRTV2hJ}FQ=9;Cw^_s zyKVE>B_u(4*}ClKVCSyzHu>riV<#7c!f}CWtD!oHd|3^^TgU0@1#(j(vCt5G#id`x zStB|bjr9-6zWg;m9PgGUAP)~&nxf;+%}o4Jdg||%ra6RBn!s^YGx(lt|v+$=DUXL@jQEQ6iH8E={p^f0m|N9uC&7 zX4QB}3f(Xv{i*I(`kXP6NN9}5TCOItoD|i9sKQ-rpZv*yr70g+nlhjNwKS=W0wFK4 zC~#@Y1ed0@UrW;r!LOyM4l4v$no2myGv$ElySI>~$q=$M$(@P>{9c+8|7U69D;VB; zth*IPis*Bp4}dsoCZs=ngiH`@>E9ECorX94CvLT8R$i2KQ7}LDQyUB#YjNBNWq`)9 zdRnI1Xt{--anw;ujq%x$6QdXl@1_LV)SfpjwR8_Fn#b1$_jq#+vHw;38tyD1TkkF=`%>QPg#F%qM`Pp=wvdS?B<-yx z>Wz!x=c`_6JFe;4Nb!g6!QL#&BsP3JJLKFUz3`2;Ld+mDPHD-@rS7OGdb zuW3ns4v)dtyD867$^8_Mu6h{%sy6af(bFW7k3Ja3SyZ{7;9gdiq4yNtI!vZrW{sF^ zFzpI5`K8xsHJ&E(ij2A8^ReH$uKV{$Uc`;QMZ^~}&aSqy9HMeZeypkH`A*rZtMn0d z6_Y+fvvFW@%&`+vNrQy^_&^+~YwO$xz1vHmn^h4(O7E#wDP?-H^dmT;j3eT@n`0@D6H7P#F$jeN!aMQ7xuIfuj1N^~bg13&N}71ZE6*M4pT zLKl#!sHKN?SqpH0m!f{u#C=(>O}M^ZtEa~w0#4x0 zX;;}q@r~-b>fDj_yvdJ0PUYYCuR(aOq5#hoRNvL3U_M_1{m?TT4}cz^Sq7Q|G~A09 z%eoJ!d=hBL0dF+W0|fLU#wG7~+AgcYF%wk?ZhPfHdJ*k9j6rX7k=_Xb;Ekp+h$i~_ z?MW417gDOI!)%xdbmtmt1_{MOMpn_$Qb?_Q*Frkzjeh%2Z}j(taY(KFVTz#612w0j z3G-_kwy8~p>gCsf{9Xo;-x>R(s-HpRcQ6gFb3K~t^12UF&B_7R%45=gIL`!Xy+?`s=ie-3%SX-2rPYShoqQm1L#6WV+aGM4%R;W(q!-gHT>%842mhg$n zT&%Nf4Q)nLn$)J*$taw9c`-1WKYn55b;J?}-ypA8yf0$>T<1GQBES(^(ecXsRbNu1 zXz?O32JTL`uy@cGl}W`U({r-=6>y6hg#V;<8T;%e4)%VNClbr|%Upnxsv4A`Qe`hIW_IuR4{0Y_#?Nh>UBc;IQ!r%xMe z^ZZY1)LTFHA4Lbm%zlD*tZx0-xjUtmrHuBPqQDIYxpVa}rw+sIK63G-rKs5f0fvGj zih=pyXYFTA3J#$y9H^57d^+(+%PdnDI|3B5j{Wg4GmE^4Xk1u?)eY3Tz@7|dM4683_u}k|7!qp-yN|B4M1){E8-xAtgGB| z>MCbuSixq=#oISyClh~o90*=qqacq1?k;zVb^t2v!nBk-Qj7-Y2@ai=&2l#DC854> zxfD*Z3VvNrOtR_x4zIwDjji^oMH2y5L;e57Vxzp!c+CiIOD1v@hOUJ;-ItvX*=D0$p@hGH(qJp%1lWp*4FIM0h!{Lp zm4U(^&K^j|hQ#lVjU=uIrr+Q_AQac%SDd|!Uss%o);N|Wgc$eD02dx5)>m;-LIfT8 zK`Rqu{T=3Es1pdCS-Xz0*iv=eDOmW$`2tC3Ka|*0zi5PE*W2EHY=Q zQpk@>@)mN=KRwD$&wL{rvzaY8k5Yzgrrhi==oe`Xzt1}uqaw@kdCWmrpE8NFS8W6$3u$gW{o2*i&OE2)&d~=(N@?N_O{f zHhRNmJ&8R|T?9Vf3>)!RC_eE{^GdaEjUZr;Kda5KuSA;B5(7}v12b8J;#p6yGV?S@ z)Ud1hB13`FL|cgq&X{m>Qj1&|t4#7lySB#I;%?LOW?!oMqBI39@v+6`lH>gsH$C1N z^cj>DXn~Yl&K#|8gPj>EZ%A7|R~Of5N>nz)^k;HtJH2WZ7~SCcYA$wc)%tADdqXP5 z43%uLyF4H@CwMwV{28yxM|c zjmh%OMIo0)XSaG~tJF0{{8hu%c*evQ_nemyb*t=%a2?Kfs#S-n?}}#)#uVFe~OR%4yFS~T9766~tiT7&eDRZkOV>iyQ-cbaV+e`UqW@PQnB-n9kw zT@L=$uN-_XCut?5e+&}WAX}8l0ID?lip#Le zD$`NO1-~mzmiQml{f=;t1MwrGdVYAR$(9gxztaggD<8l1ikkZrjX zrH_y-l{|M|0C^37D$St}0Pgi6fcpt{fW`rDB%-bjlx&2&0*ybv@Ic@=dM-4y07Oh- zY4-k z+_{a&UBkcSHQ0K=2T{B5=ODSJ4Z!&WsP2KTh-x?ayzOSb)%B}-UOcTxSO{Cw03&D= zWCUqbqC;Avle`Z|8!RYyV6+K_u3SDM+uBDNQQ%H(qphP9c&T62+^>dKx`@MI<5-ut zB+4pot8-nRt*|84@{e^Tf6P_992tq%`EhvRv`xlVg;;`v1XA!fuhQ)+rDlk@e#A2hR5K=4FyI57t-$#C zTHWXZcK&R}ggopxCE#M@o5A^P>1Os6_xNgxPh!q@Jt;`RPfE!(xhLL6+N5*)J1TZ* zvf7Lwy*nHoEeQ*rjlWs+^gMIbeN#!rL!T6v0G8#*TPdAK5@{>W9e!>YLQ4SK{>sd? zE`FeyBf08ntcrK5rQTG_$QymL0ZjBN_{#l;^}v9zo>O>$S@x2hzm5XW$#4C++iTj$}YaONskGc3&H3%2&7a8vt9DJF_Bl}tsOT}EmWODGu zrSDVmPuAF`IX`7|?1-KoMpvLC6w4=n+p zu&X3hBso(#721{5G66uKQ;w!Ke`V3{cDNX}g@q55mTNSwNOB4wVbzCVSXJX}g9Wr6 za^ns6)u-GQAjUb`hLT4QFC4D{1&BI<0WRcq31{XMeMmxNOg^Ih*!(qtE~w@WUqs(u zZS8ZwODi-s7^BBpXiC{@8Oc>z0;OX(FfdXSixL3Vo_H>kuQu&-rsj)}7%rRNq&S}g zrXTX6BjsRLN-0`L0iz5cFjf}X6VgwTVT}2u4-Hdtb~1#(<$VBtMk6iI@}pfBtQa7l zTlCFR(fLJ|su4<-B!57#0h}cxIDypG2)0sE@R>_Kjyqym#LmCi+U7rKG)^ou`eP95EOTK~x z#{N8r%)kecf*J52LWHbjWy};fe>ETqf>`?jlA3K1<_Ef5KPg2&dt%0u7*D*Z*@h>EX-MtZ+sWocq03}U^}*9Pl6zIxB*QaC&hkeHQ&bAUJOQ1$wp2iAG)&c* zJvk(@`evp?TZhI!JtyJ9GE9G_70z$=z#`?{m~7eOjLtF<1hJAniTK4lwn%&Bqfgl9 zg;~Olb%s!f)CaGvDzhCK(oa;!3lRWz^h;`fZ`>|1IWe9RK^cZR(;(?d;@m}&-EED4 z!8#v+43yk7qwYE%3zP2%uL@Xxik@6VWW1c=XGRG}3ZBI*_gJ@Cv=5tIsJ20#0Xw5l zKd=;hWHE>s zeWL(O9~^9)k$KSkY{uh6Zdi$SumRLV-_sZu{@3yI-^|bS{};3I`vnyEA}j@uXP(~! z2(6;U18Mo!f4zWO56|eol8J=15YXd@r-=aOXU3HO$z(v%VV1Wm-`sAV-z{VZUlfoJ z1w?WC+#w4Y#o^4si2*{!p#)vwT_yv@WvvV7U@f5lywC1yO+zCKK<%L&Yav;@(&RH! zoGu_826g|FKwKJ*#?NNpBm|_xASa_7k9MNqr|4AG~G5abRE{ zlz&)pP{Nb>nHn9Qu?AP_B3+|PaS+9E@~*uLDHp>jmg#@;@=-Xle{Mp~4azdUps?O^ zp;!Wh!%7Ij#Ol*`L<$BIK)o6vIyB!AN@+l6O5W)sOc8(NxzcOyD6X(c#Il^dt7(`E9HBp&qeaf<= zZAImlM3~F|I9kf9d;#xxf#I3kdH0cS5hfcUC0lGwpz!c}vjdcgXnr?K*5MPJb^*E` z-0)qe?KYtVM=Eo^Kvk6}w3)R8qdCoySW-agl<1kpRR5yze5$&s*lNB(X%I<9EV@nF z8C5(KbLC=j+;ZALduMW3@c9A{p^u38jNlHB#=MM*h z1wHaPrM~!+8knv7d*|s-FHU7ts#~1F)2?^=FCRgPlwXG>c*Dz!?;~$DTr1o`nE>khZnQ95%3EWItPE-jx_Kt6+ z)IQlpROdFw8ukn2j&z30O`NX0UF9>K7mVvn9^o>3^CH+S{>?dtlm8ooa2I2%^FG5t zW>dqRn`?m=B1cyr1jJzVEZnTAYZ63SI6|tAzNx(KwA7uNz|PB`){+gb@6LtC4-~8d zyEOtTXlArz!PM$5^=28hKag4lQHd{i3MoKTqN{_`DZSxmo_DYUVM=@zVp)F9Oag$z zr-ihVKPzLVBJC}QWl2jVUx7dVo=}1RQ$B+11@!)$=A-7k!<@L_cdJ$gM%HBSFeFy( zw?Df&@T<4vp;dK<+M0&gSDu1wpVZsXtj0LZ8C)^#YMXp{)%g*8= zKpI(Dd_D-f`9;q+YSCReUj67C;$s6$KXL%d0~k%8XIP``SrLK95y>Kn;MMrk5bdx8 z@lF-GcYFw3_HWkI9~X{qMT}PsN5tbqI}1R<^eR+e@skZD#Bl*g8GCG<3b*Gryz%Ax zU(1=wFQ|0o$#BCV^Z*EzZl@&7CqfzlV;SevFV>ojN>MnZ`FkVhf;R&O>3L){NabDw zj502&L)ntvt?s$ahzrF(w<1DlJQW{a{H=w1aH-I2NGL#-KEOd)U1k)>(%S*4jMo6k zgXZ8#`~~&0;R7m|S_zJ3T{z%cy}W7mgy|>$78c9+M_5dt z=4X4{BeiP|Fiek0{^Lqq11uji{Vu9n9Rfn`$h`zWXU_QTZF^s3q_9)+DAst4BP0wzCIMLXMfUJYF~aK zy$Qd%x8#Au@|PIz&=)PezL&~u3yAUH(YgZzaBa-U zY>b48^r{blV)Hab^2WxYaNu5hhPm`kDoj#&iN|2k3+m+)4GXws;E$c)P;gQ7dp(#* zMjQz`N_*=pMZ2)3AJbQxga=7>1KOlByGfI!n=N^n_<^YjWZmoZT;n9f0 z(sCjT>T=(gHCl!Xxr9FSy*Z@SG46f`{gSR(9CaPLOyb^Ei;Fcc>xFe3a>oeknD~II zV9cL<>v5r)7QsBThoRIB0ijJdb4?nJuW4fd0iVM3IY+J)7U@_ZonH{}CuY{HN);=6_Ak`Z*;c8MYs)6Ff7R>LsM8_Nc{!OQ;8q zVnCk#yZ%f=-`L!SjMYca)!op?kXjk&6||pCn>hY?M0{XJ$qVR$Rzgy`Zei6`3Sp>YVpPGWps~EfB|<7A z)$)0R~7bJNSRKf;oLb|!mjQ8Waz2;VIz3?&pEQkx9pg1S{UOu$ItWG@CR+z%pc>% z7c`8zWh!xFitbV?=Ij`n5U0cB#|6ej^kC3ths8F__XH3Sc1p9GXM4V{b>9GNhT{V2 zPZeVO&N0k}Uwp%n*f|@Qk6tFvEen25+Ay)~m_f4W6P{-_QXzp!|R9P3ymNT_LWVne&|M^hyBHk;SB1NX;fe2z&x`p{5=nw z-k39w53>Ou`ioB9N7=Y;K7PPA__J<+zUjd2o&hv+ZC3EwF4aBcN9R@|=WX}!Y{u>( zSL4MiY|fm$yf3w4&GNyk_mp_L7IhxF^t0j9`FZvq2aIpuJ~Y?zO&OeO=tg2xX(WAd zF_(k|dWCwhT)DGFk!6nVy{h0r1ieBBgL-DXKz(Bo;BtOsNI@#g-MwupS3!WtLF?9m zEOMkS(jiWCIwpC zM&GY?CXJz=ZdcNg=1$-E_SsV{^hC2$`j~cmsYJ842Z-a=*=8-_N3;8$yBqhMJVg5# zG4T<@RLpQaPkH<>xmXjhHSd`;&J6y`0>(!7-)znQr%UV~99E3s_aA=KIYxGRNv&gs ze$}fw<8VBBG*k%xj#M`7ta3dvua4qR!>a3Q#T}l*;Vobmx(mfSEDU(n$i8ViN`wgV z&(3!P8=6lu52gNR0ehyZh~QHnTwiin3Lx9$08JhYpGqnPX*>E3Sr8C}`9*wQ0yFVw zK+!XpiPvdbliHjXzaMq&WT~GnjPnfe8iKDJ-HI(WW^TT}YUho)J#*nzw%$|UMdJT< zf>u;U$?M_c7tZyr{KPsulMqecUane%{PlP1JXhTXiYH zZ-&;iLgy(a8i9#;W&vI~e-lV?#vO=N006N9Rbn8B^-m(+`|r80yGKqBQ1h(UR0R}g zl&&nN3F>%$H3B606Q(@VbE33ng^@n`F zyFELaax3(aiCAIhV6Ih}=dVG$$uGilfh#}e=(t!+%e7iHQq11TGAFKrF$1PeN^q3? z$a=OQ##XjcD2najP>L3-*(t4(n?*Y%E~$CdsjBqC3u?Q=s<+Z1*E8&H-g&)6MZ$E9 zZK^cd;~PckCJ!fTP(3F0OaTSVvKIb8>o%73D*WtTlc)FhktEd`m3u zfA=+c(%2QQIZeX7eojS{Q9;Npvij(pvZM-SsVjbd#m?)TDSfZmr9a)Sa&4#P!}-2% z@R8X&pPz3NS(F|gVF(-czAz}TkNhGZM6FU8x`G5%Nx(lR<=GD`l;Vn^Duo0tRA}Dj z9iGt9^LF)yi(5)EE}=;@ur5Jxm+YD_zYOIdXg#Ftk9$*)_O-9Zmny2K~=2u`aW1W`vnj01*w;9DajA zaga@V**_zwuV91PM>2CvvzrYO>+zKj))eObJ0)p{)TsCB~bD!V&xaU6pQ7@!c zcQ{pWbybGt&YlC5i9ryowr(pE5x{6#+rpP_JsZIAf6cBO&=Pr5~RpaB~SeV38)e? zlSawA1F$ZF;#lo$>m4K-^JR1IP^k6FTFFHQ*qy;0e#eM@0WhNDhk*Ud{v*3{yDn1wkSc<}8theGaab=ghSvh;h>4tE)M%rIz9zSTlz`5Fb%v8cI5yyO=C%k^zD`Tos zEI=P~(kWoNM4o(nlK`99b6{YwQAA*Tqb%L!;iQS*kL}aIeNkss6+-oG?trvxiUAtOUVY)AO$JVl9WZvdHiD^5I}LHVIB|U9fvRWAaH5+D zD2+BE&gjqIHM6~0UAEJLYoBQzjFBH4L8_knepNk-)2iSAcb~OiRnJ|lo^kNTYwxMo z{udHNY-?f0TgnWNh+Fhz@x`J{EoZ_S!Bom$7wM}a1#U>xOW_41>g5YWy|!NGU8UB6 z?W$^EyDB8=Wt>B|ZVhms-+v})gS?0UNemH)dc7Ik1#o2=caj*=og~Ij3&E8Ej3D|1 zuuJTJT#C^k!S&9i2oPNVuS;?Ae_e_-zg&uM0ZHsk`TxtMXf+6Ugfi5DBM7%7q+B&F zLs%6gxcc(AKAL<3A-Jw31&Ia5=4yP6EaFkp|D}oHTh9c7S$Ig*v*ElA!vj$yQ|eQ> z$k9u7DU~-?@Lvh1sNg8Apb`CbT}3UX%_+;~fxC1oKFsB?Cq-5bCEAO z1}`KmZtZTJnt$=t9(r~A)7f@K4LF5*8Q`=pS*UKTpFjt~uupGq!@xTgCOH=p>?h#! zCA-s8YXde&C~-A9~Z6Up+#!827_WgcQ{Y>Lf!0E zVtpY5%6pu1ha-*O`kbA#zd399hS1W!d#O}oyMYyH33&VLvs|2T*K=w`p2LkXfz8+bqOjErtQCM>-D z4M{8! z^q0&{cYs~=Nc6{( zmTJy4ceWwrV0RiRnp3~w?nM7G$YEMk!uVHvMjq%Is=cO*x_$zK@M?9+ugstYD*($k zFB94rk*LhjU;y5$(l;zp-M6O%eU8ZpNMZ#8r3C}_IC(%bTXEf% z3kQ7Ep%Br2JEA$jBEL9F*Co$vlr0osOg{w~(?%d;dSS9JR0ty4C(N&^11?7H9%q$n zv1o}Q;$5)*ncu?o5muJCM`R^A5v2Zk6u+l)%}{8SVf`WzpqOpx#epv)GVo;tmAMoa zsx#Jlh_h*Nkk_yBGS;cKy8{I?e@a{%zOB5qnRmD9bF7ygwdqoUm#b0mXB)S7Z#+4q z#ME3u&iryYGu=k^u##<-D`;cIjZT5n3<^j46PSb?Lg3?Q zP{i8{=zLbt`idCFdPxlWhAIHxP}^9_<`^t2E47Hj_$V^$@dqCK`yN2Km`VU*B;O2aRZt;~3(Ny$|n%y4LAJ(I>F&X)Ff8K$;Q0q;fle=;2G zAAjsYG90YDjTB&p1Fjr8Ach*BVrxKL^!pf_!FjwxM`g3P%|=dW2ekaN+HOD<6J;I& z9n|(ne?UQyMnfFHFccp?7L)X9%erS%Fy%KW$ZGlVODY`6Mnl2kJ5@{o48j*j-8CBG z^n!wY!AK7~jFm{Y1z&T1g`(uxN7GlTmzaa!^2qcl8=o5N0tm$uU@HR~4Vi$g?01Gk zMD1~IGk{RM%W(AO9-GC6RUuU0*hiUm+cNgvKcaPwK&HUX^cXr20oSsbp?Ais(abLS zHFV#RUcLWvsw+G5iloApOv-95eK@XE+Yr|s7brH&NITAX!VmLl;hmGyQ}^sNoGi53 zBH4=Y`vPlzBVir=ub;9=i7}|^bIsW3bFnPjU~T0K7Na=u z^!BJfTl)DrVuzd$?*WYn;SpVI@Ji>)eBF;HtZcyaL7BuL#RjKOb$S>q2Y5C8@JbmK{edFF&n0X=&p`s|`9D{R+;5LOgMm>UDf6L1Y} z0jnA543q%mO@uOVN<_pYrBY8(EyT_vAi^+vN=9~Fe?M&9XwH%P3%{m!f;kp_Eh60m zf0!TNa_f>c-YsGgJm36&pCn0!kmubM{=FxLOFPUwPP0vT?fjma9-P^WY9E%FFkSAY znSKB*)89|=FWf#n!#`X12-#gAUhFInh{%4kn@kLHfbbD;f7ygYPy54`oYUiJaFK0} zd)C`Ak)B1%M0)}MN;p`?YvQ{MQQgzmo0-Z~f^vzE6Td~RJ(0p`By8hEC#pllNzp-? zM@h#CFh5NdQ*27)b7eV`i~9^!_u|Ir%*(3lpb*~O0{bRO$`H=oAMSD==5XiWzB}42 zJuq~F5ra3EAwHpUG3}#xebU7xX^ndWcn1dmI(Gh>RhpjhpH}HVYuPWKVlu?1SofSW z*TkHrhcNT%x_keIUD6?40@9t5(%m6Q zcQ;6jbhnB$NOwzjcklQ6aIUrfbI-l6dHNl}$++I%7|(OxYri;=y^B@;S_VCa&-$#_ z3tnH_vpm!(eSi4)MBupmRSmkuI|um);I2{u&5f9FAwtytX8)MKsvAAX$7p=jT;Y!g z4*=W#Pjy3I)&*eO*Vxe>RuF-Y@$|qko;QrzvN{m(@f5uDC&+xv0vyjkd(4i5Gzsi@ zo&xUifqx-50Ji<95U4#y1nzENipPO`Jh1WSPu&e3aCc+oukObG2}`fM2M}e&%fpw^ z9CP;ei$Hq}2ulwFtLj})Sen}@sv-3+L|M`QL6nWqZM!~&r9qR&jcvg9`n}#7S?Eg9 zGU!?6Z1t7LOT@y>Y{!BAo56|d~lH90?ZFLI9-&82k zF!UF&>wu;aCDp{2Nzdzhqrr^GN96Jxz4Z{^I8j8YC$t#4139LqN+7w z+{50Tp?s*clxQ!n(`XKOt2lI(UB0r--qo;(2;9^VA{TeiJ`*f~OuEf|Zp>CJ@S=mt>df%7D}3u7$QF={HxyoO+{lKMS-&ZW zoE}`xOpjdvX3*~wn7TIbD#>Ob%jL*3Z0P&lGuof~A^$YASpQwPnuYamLrcnL7aSnk z0)?x&w0++My#UgUgn$dk->tR>8C%kPx;A=N1wrcA5 z!aX%I{Wx`Bwl4(rk55A0R} z2_nwo!F}2vmgQlFn~IUVCWV`T=TMWVy4HfOnCP2yxD2j&Rxj(N_mBMC+@^>lPy5sOsp-; zwyz4$*pu#m$gY*C1uu6?1nc?pA}7<+^Lp?=WY-%D;Er$cAf2Gy^#4hA-A=G>IqQjs zmc5TNz*kxXR!Il73@6WxSM!(IEkJ13$o8F{3BjQ|*nS&OYQP)8bz%5{gbiL}K2;1v#%(8-WvB1CsZ}IrJ5p<+e-g zd0d>T9)?Wqt2vHX_upN;Jzlc7=xP(xjJXX2{bj(3twCbCzo5jm+{ZZXgTjd>>a>`T0{#D68*HYl;U@jTM%R7$;fOP zj1N6r;puSNgz!e1GB7H)eZ_d3gnX;$NZ%-*c+Y$g7ZL3*Ah^)xWvHy})jSW=C41oS z`5_3mojP=?l>X5PMyL}rqA?4ZrFx0@gI);qz{4s~%MV6G(m8BVBl%R&E&XwBDnHmp z@E+Nzf2I2$N7cU!V*h3Fqc|LlGL>M4f3+z0N(z8duLVFA-$4?B|B zpq1R5D@^~Vng6nk{^hL?l26qMyAqOa^Kd*wxuYp?YkN%y#IP@TL0Ly?pa_D#6eZ?P z3)(5c%^Wqx@mwnU8h;n)71(sYld*Ge60ZTOXwJ>^fbI}n%`XR6^Upx$pgO`xNnjGsu*Z5K#8M_LXyqCDgT>n(6Q|?mL`*3 zTzLue`isUU^GVi?j2B(e?#*76YHs}p>=#Smu;V?r7&|Y5QUOK3V&L{BB}!LuR!3s^ zg#S3+E~F5|e?>-DXK}>+s~CHH$NzuBjuN0A$Uf*?c;xk+S>sOfl&{YL2WjaP~vGH2fx5&106F%9IRO{s|m?KwN{>?JCpENx&E`=^RS zM0T4PG0@Nah^WBmKKvv$`i3WaynTx$rLAIoS!PM!-bI_6Eu?z*8N-h9d?(lVHN7Eh zBX*rw#Eq&CQjl*w^!v}p*fz(0x^RU1tm3a5r0n4~#m$AUAtySJJ?;(4^xPsOA_b{~Qg(XyIYa?r zec(~!G)iaB+$B2b`p*H5KE@%oCL#V6eFUJ3(PRR?zb26-<&oW$97{jGKF5_Q@$}Lo zwK%2m#J#ohAvH}|m6cv=co6PDc2_XEE5#ObyYTlkv@+P|SExH~xD=hy7Ptyqo*E;C zpQouf7GlofX9P=;~gX0GzDBo8GO6xc`$x%mp1S%(05wCVUZeAL6*?%~A!Wv=@r%#%EN zHNX^^)gGvfWM%z9h+NsPGros`fX8bm1%ax0^*Us14Ojr3khlK2dG^zJZgG1MIL}!V z^yA32w|ztp;gSLvB2R@8V+@evY$#*AG3f>U#SOVLdiTLf5s<3f9t1VNC8qXElr@Srls1*Zb`8PP!ve(?Tj zr#iY24wMSme*#rUx1atERGk3=RXaUZW{1F)St5|a;{+9?IMXm-hbyN;i+JNk^rSeW zYD-PRU;+vw-04*%Vz^8b1G9e$BWhZnZ`FYPQ~E98sEL-GoTez{uyWY`ovQp87{oYr zfXew7h>>F=05C`Qa+{T+laA)x8}2 z{VWr#g9C+w=}W613)CZ<~KgZ>3IG?KI+7D5N#QoyO?pf>VDg zuP!w1a!}48ckup@=+!$AnkuwQz#3vLIj5z6e%C_rEd zcRB8&p-#93@CZqLCkJu?!1C#yFrZcx_Q~KOyFe@q7(9SrK$|QkMXfWh2LMk^X?P=bN7bcu zS6K4EN#yD>yTY%rId`1tsl7q8{+sAGf6OVBB^r@bwv}8PJEdDHdY1hWUdkQV2r~>gVK9@2Xv!!2IZh)cpG(Ux=6Bq@6}8#~kLrVV-BXS2^ zR4eP=V0u%be0*GQ1MjgN@J};`?cXJ`S(yL!l9RDn{i_NByyQHeeMJ6`)zzrm1Gu-< z`1qJ!MN`XE#dX1go^oPq(QKy!{#h9R2LLO04|u&h@9X_<&XJWTw~S&{g4m)C)+O|l@*$NMjCkJe-*Ys!t@c8SY-s%xphMVR+jVHH4f6zrnp)SDM z+otdOi`$Uh8ff{XsF?Ks^L^Cae&Wjt@bTF*sKDPx*&Rv;)4=x;Z$-|Qu_ovtrxPF) zzxf?x4q6NTi;w>bP;@}m%7B~tz}S)aKTUmHpsCMAHUiuDqZ0%Usit~*$WehGa#+TE zYMd5CJ<-YcNT|)TKu;C~4%vAEhwKAQ{XcyCN$~ek^Plgd-vA#!8@zn_tEs=0pz}Xj zBxdl?S<0m+_%n0@Pv&P$#c5{)|uUcBXb( zllQnC=c7CJl8q<+v`<|-g3|Nf;>qL;d2B0< zm-8tKmE-FUOSbm)+T0=;Li;}$b~v)A$unxpQpJ!;FBT)icsl##sQO)yq|zi~SLO@4 zAew>NzJ>w6Sy@VPBY!D-3MN_GmYKN;IjLpMs^YSr6^E$pg%)T5&IqVF>dG~6we89E z)uU~zkBG>(g<=K#$N_4Ic)-InKn*bis38!I^5XHtv2u5YW4ziy)(RAo3NY5@$Yp18 zWuF4Uq17g%kaIMZV0dGBd8#5ey|bY)@; zxLi{NWt42311}wlu0AUw(>jGoa|549yyH7P45aI%X1hPB$P^iYUDMEAsYrb=25x^t z9!!ioQw-^!a)^jpFb4Oye%&Jf{b@IIQCdk)Ash?p;QQLrhb$)fjtLyn#Sj4-e!LNH=fb|q8>qR#VrwVdV33N z?RVmyHfs>~`lV85ep;(k+%&WPn+klZ*jgLU*a=Rs@Abt|xk6HT%S}SocaFoX!JTfs zcN)2IQmPqxZkObA(mS5_tGzf+@DPC^V_9bAY?ilx%naskqx%@Og%uZ^j$AgUAZRHV z{siGLnouOW+*Mfu4gmnoeSjT;?Hv{1E=5xeZtm}YDf`phcVGbJwv+fsUylLl$VpH- z5^YRVe4|=SJg)wn3|4P?HK_7PhJblI*@kQ~2h)Q713_ITTFL9+@q%nIiJDIh_;z0= zb*H#{nzTodn`eag_z)Xay#4wfxpywXmo+fjivTE6t?UNJc5#z#Xox7%c1{_$wVb4@yTK z%-jD-M_Np7rcQ*3{)G;qu@6W@k1S~47Og_n-T=@cz#Z-*xki8D%KI#G-A@h)we+hN zPSt}S3DDTmQ7U%YzD3HO`s76dVH>jF0!0H}sviGo0O?yEl+JV|Orx@22!&!bP#6 z%DwWW!j1Jz@fn4xt{!|Fntz*lTN!J*GAO%^umf4KJ?Lo@KT4||W|Y1DAw7ksbIy%& zk18k+H3NecId@yLYikMQIsZk1irytX}+-hK0kxETc0U3zy+_2HD4)FSUp#`Qh$R%sg3r?MjYxG z9&`kY+}Q9_WEqKY<@w1Ekz3aujnTGO-t!?g-6F@&g9vT62np;#1$~x@3=jPtvEj)8 zdFVjxCsPz@BVqhqLREvF^{=8=j2KTx6e0chC1U zUkcJSoGzf)tp)@iLIk8=a(;ftegAzBgNuzuWA$^@tpQh$+gCL&mAeHlSfx?3BNW)S z2KZ0!U@G9l6)=fjkc>kU>LFw#J<@_t{%q=J;FG`cI@;-w1*)F+6?TgJamzoBnSYza z{@aTSU^a3iv<|6l!IZ>ED!`+FN+Lhz{f@1oMdl6$DY)0zzY{6SB=prb#96ab`o=KE zQ^a7nv?`8+#L_-MBvLSUaLM&7CW|TTQcvQ16XxmLr<*F1zb81BNB6}(<4wTSh91{;bbZD7ga~;l%f(EklRS%I&6mKE9t80mPAvTkf#Aij zL#6CYr9SFpX_A+EJYQwxq14aLrOsLsSBXML90+4lx0Obmi;Szu*h9Ae8ZdtcNY6mguqc#Q_bS!JC<#T4A4z4d-wEMFw`>o&7-)#lBXX-P z53qs~M=MXoS({mBXwaRprrb`t^!pD?K_UEUTd%VauZ4r0odncOHhoY8Hbl`mLi8 zPii0|5c$5a*WjU&>EwBUo#h|$eX8q8YSDZ8N;EuNcpF#h?_LZ;^hw=9YZ<9BiEfnQ z_6zyr;WdSdJP)kXE(6JEqnnU{@Rq#HPUo0=MX^B1M%TLuasc9f(Uj5#+% ze+mqo3N7Hfr{(b77E-_>c;KJ~JlK9vss{#62Y=hWiES``q1@f|D86=~^>b3-?Ir0V zdZsA)=etLVHyAbpRD=z=;_#KU=R%K)bldyd$hxNgi6^l4)jR*-im=e(Q&aJ`<^G|= z)3213RUHhvlJHeJbwqOOdhvzGerZG_KUN*fzajg*R09`b3yN5QC&3f z6<8=OyZ?jK{*K?K?i=~S>LVm}E#;iGruTDfRBZj=E9rVMxJ&D>SPvvd_W}i#`ISEE z;v;7@akpkq2c?qRB092F7h6>8-#J?woZ_9oTk**py2ZM$AG3jynqfdL&yxnI>D8Nk zQO}!I7}>pZ)qk8m|1y!y{5N8(RQX?mL{Qcdi})z}jV6F70uo2AnfXZ@(Mpfrk_>e% zgYddHz8L;Szmszs;%-VD^?1h2AKvpI->JDI4c%SfKR)R4`*6De1+}Lm+G$1+m0Rv~ zM!Apo@GK&5L@OK+^yoi?kUbJz`93L_KroX zxvuJFxwxYtKIS5YKDSTncG);gXA_h}Mrl5cb@ zDrJ0+!84Z8vT0h%Z04|#MQj*N9z@szeCQab&@)l*g6z>=FE!o8bw@GWdUa=MjR1Re zsP!0#P-G>8BkFeJ^75|}nl1R>jhs0yud3p!p0MSb-QA_u*33eTIwfou(k_1f) zz)Z%sDA%ffKINTyF?o}~h+8NzUGgMHL{L_YdqHLg$Pp#La>V3>#vk3dDSe-}eON8u ze@!!ZncQ3}yO?W903+8 zT+2&g1BXbFY!bB)?1hiP#%ao~7GI4^+PXhRDZj6XTA{)4zW< zePUPn!7GG!kxeiwc3ez?h?X@p(6%Iu*Qhcr4j=r|78)ybF(O7;e26nQ3EfAiNZ$i_=3QaZ!IQeR?B#z?BWPYRU zp>Sp+UuBfJ)Ce{$jxemb=D*j{;pb5mEjw^SJHJ10t0_hyrh6#xAUwPjLbdiMWt^(` zL8x)u#vkP}WRZF8;|U1L4E;r1?7>oL&-`5$dLRtBO&7hkX82E|iT&Tjuvu9C7Q^n1 zB=~bRE0xUq0)=z-5Jf;x1T3g~Q%9pNnx};||{Jd;F9xtl6wwg2b{#-@F z_$o`~`BnFqF>LSKIKeEnp(VnJa-Yv&eww@I@&u?o8@1^}2vSO8TyKX9r7yxoJ^@0y zo(o>Dy29(KBSbz5Jal%A{p11~YPc|yd2BLiIT0d2clP+r8<0=Bo5*8j^IhI%>#5MtcEE6B%jqaP~FL>w5(+6;K#5O&PouVgj~8GaC)S z)lAEa_J80-Szvh4F@Ojm=O!e91{ozs4d8w0YWA2@ zk-A^?irZ>Ly$7{tC1Q;Rv_k8>&{|*%X)QFmlJHD2AaKzf_(1d`&$mDrk~19$L#k@Y z%Bh0sMSvA3i*f;kPg^|;PWxwikw^83c{(@@Nd*R4Q~tPfSXz_7=(PLO6rny8koAQv z8HnuR)pPn>ckTfFMYy7j4leYTJ|8Rom2~md>4*UPrp!wlsZTQ2f~YMr$Tlb6KbVl? z@rVHGMEn)w3Yl=VABk&yo^iBUehvlq;-fn9_tQOWHmj5!7`4a-6JEGD+?d6a^xRuD zLY%ZtFy)&GUx*0o;k4)i`r1ueoQrEdB{Jo>>+Ch}Ua3vvVdBeyg4n;LM5l4T=F3CP z?ZL)>vf%}7qd`{t$6vHwy^g*HLO&NST9q<*C$3SIf%3#g*BI~*mMZssV_G;lfLB zImG3g!zS<4Rpe@4U3FSvnf7~LM!!17J0r{P|MWlRNPyk5qbcv9F)z?YW6WlRvD$ty zM*?c2VT*>Zrdz%rY)kL08JSv1R_ni09IQv%ot0BNV_nslu9vwTLKl}UT-zf(C9!Ts zIewpvd;`zDtW)1*PENwvp|H<{I~?I`(@nJU;*kQ5)_cuj@%u@+0BY^?W+}ft^C&&o zd=~FPrYiWfJJRNH%{XIth82$`2fAP8Bm0i95ge1>0+Ab`h<-+`h+K&au-`J3H-3M! zXR8cD>9x#naH%C&&pIO~l*c88dNs z;;Gx}!;J_eko>DDXVwD8()I`)JI%Rt9^9)Yvr5;gZK|*oGSw#$BuHvhC5N?Sh;7^? zBY(^GEMHx2BO7F5{c6KUis0^%{RUghP=BmFd1TMWT%p(z61rx`bRvMg!<}E|SBmlV zC_lI9OxagVFH3odg6L5@Jab8*EJXm*YD$xXS9mo!k?(|G&6VBTg4b^mUh8sM`=FSJ zSvjkmf3gL$nCUCgWFjj)1@#nVwwpx$r-p67Tc(@H(o^-N2e_7*(?%o$=d$maf#v=o z&wn13n}kyNqXscST$_E`Y&ab{+B_=CW4xSMPZv526oEal2Hne|falxmo?}>{jM72U znMtS}x3kpII}YIa7Du2VXD`a+h1JLLQAwzL4Dq#wzw87eE#G6N&Kxe_0tt_xHb(V$ zzdQK){VRl^HAIlPOgr}`XK}!f3r9{tR5>&~dtJ0eiYwEM{l&V6p^_pKl!p-_5J6g- zraA|?gaF2@>OhGXadQVDa`5y-V(|9Yii|)Rphj!m-y0G(3c?um0>hDW>Hp^TL}g?;0TK)F)s?fhkAvRmH9kZ|?d z%mKp`?7#{DaY0m6rFo4%->4k;oj@lcWz~FX+hyq1J4xx$F=;U&YvavsrsLwOL!o?F zN{0Mv$5{Xo8pe=!Zk@(AIqP zO&?Q?PtjU@lLNw=F|Xe+A)lT2e8xV~4V2j0l$vV_&?6>CPxfYpgou%i{m$j?zdOl* z06~+Aa{b&;;HBYkm7RB@qt))qU?G4WGR0yZXu$XORM}_hELU>@G49i5u`5LD@6+UO z$cx0jbgur-vcxlJ_t9kDvQJrR8T#AHz!)swcw0VuQU7dIfa8a(r7tw~FG^d?7KKf* z#@kAv_?lpY;^aE!k8C7uI(V(f=mb4H5TmMfsC_UM&$&51I*;&p5#V>gu)DtT*BbVP zJa5v7E90&AeJ;i<*YqO_3V~W&0rYCq0)CRAvL##ee&%lj4Q<(}5G$;MFguB<|ASnq z`{15|!vCuTw8rL?VPlhGp}}J<>7|@j|CSSv1q4YszTf9!SigL2;f}*k#65ZWUs zldUJ(BoV)M6U$X4$(H(76AtcPK4(3+6BzY9MHJ@ zq=upRSbY&7AHkz2`%%#_C3z&?f^d-M5ta#n?=@q*2z1@=%5!GC43Y2LzQ$Vsm;Un; z29Q7S7J%+-bikdB@t#;m!eVz>eUc7I67v*vXVb3y!lmtwr(Y!G0=lz(4R8f;kdv9f zylV0s0hUdp?0Ee7>2z7h?e%TU&k-Lj3Pf$9?XGyPdc-dXBp&b|@V>>5BYHV=n=&^U zNRVG98Vq;4fA{}XBDBFD?N_SrhC7Kp?iQIky37agNTdoZC0W6LW_e6<- zR=Vq;4e-6v%d`5I4u?_Wj`CPMDlw+|oLU&uQi!jAbEln?U^CboU zYtNml#=eQmNz7`WO&(~S#|qrmodM&}FJ6kQG_P;xD~-JP_Fo%2Wf9PMP!$l=v6NQZ zoMo3ys@F4aN9A_mPt&Y@m3OeI8k@Vou#CwH<#x$QI7Am_jUN@0HQKc+DS{e=4UFj$ z%UDTZWNnM@51>V;HLywRQvLe6RAo0*jCkNE@ z?CUReq9$@^`>Lr^gt(Ff37Pan7ue|IU;{+8z%mrnv&jmr?c`Yo%wCrx6epTo-6j9I z+J?P zRl^`}dQCF>>MNCF%_W>=w^xUs&8C00wunfEo?mJxVwY#n!tCpz~+qAI+&l<4Z1kC$_OL(C6UO zw?o{yCbHae_Rqt>{+x1~79(x{r32qigRuZQtRc0nM_>HYD0=-bliPp4_YXvZM-k24 z3k8Z;Gz$HgCob&(K;}<*3+~rW=_v|U?oD5(;DSey>stkk>ySJFk3buL{F1wdk3!!2 zM<*(o57E0zVYfET%Tr5swv*&(^A)@yj=Ayzh|Q}@StW=t7GCkZ8ZzZ4objf}S_(C) z%FI2{!3vDABwQgpmX9;{G+krAxFA;>abZ%nqjIeJE&1Y2U1zNMTqlBav3l2a*Sx7` zm1MmPwO)@ezb|y!t9=&sounwsf!9FKFLO|#SVIughN;!k&bB&vgX4rx&63?C$*y8> zHUHX{`Vno1ro*(Ux0EG=foZuT0Mh&c~;P;Q)u#!ZQ=4&1VjzaG+Klv*9X8B0=3(Fi)JZG z6E+Q_MKR^)#B8a^3<^blJJ<=!Ny9#|^bD;Mo#?^U6o-`kc^Z5Gt&~Z{LLnBiKe=ln zDr@MEz4~V@)%p$eXVeWRI zWtEj1zw7%fJV^8ldJK0SZ_qgMi@zcp&1;y2>^v_nYn|Gd{n^_$0k%-%98GAD9p)&V zQ7pkcIxfxUQaoqk<=KUwEtW?1@L%OyCOGP7opsv}wwf(}67CO#EO%2`vwcTWR89FN zmu<1&l$eeLB#)AZNOpbaNEz)(w zF|9}&u_J#$lp(ckLiUe2+`bRChLa4e*sfF#AG-k*$&o+ihQ0bK+)r)l<8Z1Uv<@FR z*|1MsSd$RlWY@S%NgFppO=J7B7+dL_oQdAU^+I+;8PTt`7-)K-Pk+yj%&`gbX9X70bO!uuoV zc%G0*3KWXt5Y#Qy!&qBoX3k>RaYpu>^(g?SZ2m7GAko`d#ExZmxN^Pe z09Km@rmvv*zR&R(_P2+$1wreH+o3NdBfaFsbrJ>EKn7`+(A$%_>o7dK$Hg?c0 z%){oN{OcfEe-Mu6Rs#}0_7kmNJJN?*PX15v-vLCVm3q6$dLp1@#O~$*BGSs-8mL`> zkN!h{9sM^l(b6scL+fV&ci;e8Ki~_Y2bSTdpnX$~%6BlDJR33T*#%egE6R&0~+ zSX9nv@!GwZ<1bo22VkL&1uWEl3~lyr0fE{%AW+-pf(B^);8Wa%7bfcrKK)(P=#PGtAl9$ zC4Y+li2p7A4?h+ErBO3~cY%xl5#ZuK2u)J*p)MvGUbiVYvHNTBb4yC%q6Wsw7bFdHqSlEcGRI8xE_DENe4&`74%m51M?FhJ^&@ zqo6j`MvWvl!-{3$irpQGO=7tWx;lE^B)1uEEcjZUS#780I2yGa2B}zXiU}T`-*0cl z3yz}pvrMOch6E07Njgu86=wcuvWR^KX?5QKH2#@g`lKx=?YM{tojS_Xy52L}<1(FH z`ibF7>;*?Cj`Afc+TaS;g5b6P1Ug{-Ls~Z4<+6mEMAG-zIO+UzNc5 z46{dA5A_R|3=h}$S!X5~+T%#21Fm&EIXi^5{k4uS@fOsbV&2Af%MsZa*koykR1d17 zuj7Tg?6pT<<+otuM=!szgLC3G%Y&y5AONtmOwNl7kV@{E99wIQL;J4cIP&f;xG^a8 zZ-HZ6a7Up`FnRjzmFVs6Anq0H2KR5W!#-kSpJpgeoB`PySb<0j34VX%p+i*kqnO+p z*AmmP%;y5J7c2spp6ZAkEl@`+*WH8TFrQB#qLPRL4fiP1YLuN?(2w^Q^md8pEY$2A*uL^uTx0 zu|yU>@Tfsl^`3u2{N0($JE3rC{idqnv5Lt10TISjwyGELwmSUaj3&>(=Vmvq_E_Ia zztO|u-lB2W!B+vY6caU^73$BE4WaA%rBCpQV?IF++<3fy2?AA29nc)51Y*uEbG+4vj0 zz%65d2^P8#P+BVogtCxWD3L3e++xWA_^l>qROw1>kE!~c=7>xkuwNP&E&7WfY1|`UJALs)kStcQ-zIEHwHovzIq?EFM+zGXQGn)% z(W=h;Rzh&n(}OJxc(Apyd-l2RT09K%F~WUyfK-xxEm&Q4IxaI`=~nj^yH=%-D&M4- zH~wXCp~9Hj)MmrXVfz%B)vA{1Qd`znDTmKa@;(iF-Y`mt0nTIty}c$j=S;GP`eAp< zYmFkM=~_6kmFZZuu`wg`@=g;74x+184fM45W8y9}Y^6ry%LpP?YjXwrc{dUAx(*6A zQktr#p~m`%&5g#v6$TnK6o`g(k`Q?HB_X|{pP=M+1}|Rs&swm)SiypxFR7rycdLpa zY7-|G=SKJuA>R=^pst!7I2-#qTy6=W*5nf9hQA zpA$JxMwOXQ=6a*Q*1;BbZMR|bs!2l5&&f~5JvOdBHclUkS_%Yj+k)nXBSf6uy=+We zez}fpNJVJP8b`b?5`Nh6c58A9joh1z4OMT45MEXIaZ^UBk~$8;{YVB*6Jn1;1CD@0 z9WH>&l%fVW68r74sQ#SnnK^AO5p4~Vz z11JateMk5YF)E#3)xt6t{){A)H{ScUceL`~`_G3~9{Rnnt~sB!NPBw5PKEO6f%n_x zR2KJbnvs*Fn)r&1XDJ34LKb3>t+kN$Nnu9tx?+gnk#y{6K+v*09PV#+B9&(~(k0>+ zxZ3buKOq?KU#~~n3t|9BTLCC73eo;7o+70ur^tOv&1#m+u*0j`|7vE#wnxP$9XiFU z>%&E!2Lh;opqz40MdUA3fB`N|`#RhQP(@@!NmyHq;A?$hKfzk{mvrRfnGfsnWT0^5 z0`d|xI>e`C!BPx)Xfh-{n3Iv%*+By|)e^E>ak789K z*Oh6*PqtOaEb9ABmJGcvmJs74>S(hKwHHn3!PImHJ>2B1t^3^3fF+XOD~-6N|kc=ev8bkm_$y#z5{G2t{Ia^+7U21yCm$#pbu>U&C%~EV`qpB4T zXfTt!dyj;gRfu8W@n>$5PHR^VU_QH~C{1L3_5q>9+x}ME4&y=C( zoedM0RUL`OxdJly`Qx6>L8EXF>^mtRsOBnMR^FQ9Z#L1{C74u`bwqViV7)I5;Q$8n z#R_y+Dqe=1W^UY}(UA8nso-m`Om(_LmJXx490&HDaE-4#Y-^|ps2K@;m3HqZF@iK9 z%p0x)6uNKf-ji&E>TGXgMmcv(ielG>8)M`zvVGc189y8gb!lvLd}dP4e(l{)#w59H z-)AN{H&x=zv<(+r-_tPTfb4zpn`+5F%lC5BGTY~UO}-WalrZbZZJ1SRlo|5tw<9px zN!FDZlB~(3f@XaZ<}Wol28Tk+7<95}Bzd+tDGLN!Lh{d8aRWu@KKJPYPOXMM;bC~0 zsBH&zSaO$ufbj*Z??YCq_hooV^zY3#2@{{g?a0(_eg9}IX_)Jf#s@Lw7KlzExQcuJ zyVfnnWwDK|MGDg81fjxhXJI|&>mh7F_6h|6bPrU47+8>VSYNB-O&&&NBv)UrgqpnFQdPhFmrY0q^*xLTMC%ox1p&gCv zjeY%_?fQ3pY?Rq=yz3u`Cm%=MtJU~zVv)V6u2D2QE@P3C-o9uW%9R%2ib^>g6fk*= zOF^gpeZn7s+}459JR;7N@SXM(@iL|QALr7)3v08m{w+m0U=37kzg^O7K$S@6 zc~cW7KYc6RsGgzB9fQe9=Q4`1rN_Uf?F=#0e@H^3OJRt4-;J1>UI{d`okZcI9hJYj z0CJSPf_kQhdUfqX-&f`ffSbatYuh~zE zQ+f_$Dfxg0T&Mn>$1M!q5OyC)YILgo?~LUiqjh^-I=JoL^N_HlLZ&oBQFEsrYI%jR ztkQMTM`f;Cc}M_TvXV2DmyLhrGZ+5?nWl;Ww#6m@F;N^#W^&pRP;+GWau9?xk_12C z;E|GPHynWNwlc8Y{>6`I>*i->MaAy87B3nWEK+-6iwnWupLA-#qREgkK9<*bvg>>$ zfFm6p=tH5D!zsz-iSJ3?&LhwEh~R^yC%qFW(45YOvrr)wvh?(|^f8=Vr~ow<5I(wr zgpWL8QrotC{so7>WH^j;Pi{fNNB=ng#X*o%1XyqPEZ@`%&vD~>!ggv1Gs5p=l(J2w z11lwa_T+5LU5khv-Qfv;VOA1!0Aj)}(*H7d`xtvs7>k6|>#MC*Z)HTQd^7XvdS;BR{98#REG^@t z`u%d?GpX@QEg8eSQt%AQj}nd!MKMD)7ugDN=7*Ymf?YLtDX6by!OiX@<8`gp>ZD~G z4a(K<7nYtCfdo>i_Qk!e#;_l7H#htJoHY5+&}yaqUQN-5&WNVFpxT+=r>yN#+&`1E0XJ`;n!ljfm=DvPcVoQoXxjjmrO;-XAXU;|j)(;c!72bMo&I zU!B`w>~u93Ry!o>s z*dD1v9Y|59ZKvYfLt^4+MAR}?6z%uKkX)^s6Q4RgbY+{eK1RQu?^?W8c`2!tw@8Y* zV$zpCH0~*FC@>)YCc!&A;_X8<+xc_hYYysy4x#L_2{)S5DH%*X;2d|@T9o*Y^Xgxw zzW;uX;bC9{YLhvu!Lp>^z(~HuI`Z)$3alr>lj!O-bM9;Tb`u z3K%wuS*;t*$6dXGHl#gSY=t&eH!7Lmu@1A4HoEoxQjmOV8pAYo;CejnY_xTZjB^Mc z?4-9Svj}Wu=Aoj;Nhgc0=OfoTBDJh|JUvQ-9b#KXq3>oSSR>C0n41`LEwSL*cR?s2 zF#k>Jb|WthE54E zbd=BAKh(K%W6HlTO2|UqXs)CYW`8uxhpb8-_GH6|#Z1BOTiS3rtxaT%D(?3PYfIA! zKRLjJUe!KyiDog69V5(v*76q<266-5FEvN+SRqSWsx7$(tHcWJFkhzpD9+hj{?t^` zTYv?vqAQRz9GPxxST;x*UnlwA6n{Onn(!AROc<_vwLoo2CVP_@Do8;R+ND5Sb0EnM z$Hbc&A-SG@75`cqP>{sEwxXFq(pc@}Qq~v(6eOH;1k@xT1xcj4%y@WH#bMW}YoOzY z@?N3P6Hz?(%H6|z_VoSpVjcSwLi5_$76^Q@2)1FVTnyI;50gLvS{98H0}ItrWAVg> z;(?(F2Sj7fo#Uc2Sdke=y?9-(`P{ych_1fwg*aokFIJm8zaxhqc-&-o0_n zY?(AR-3~$5hI4iIwaWz;oQ+cuQ!Hi>vKP+m&Ka`1c|Be(FLFNcsz&YsS^M;OmSt; zP{>W=mXee0t?t#XMBMU{E8fGUmz1xdHL^o?Z6g1q$Shlqt-8h29=-EpKQAs-AuU_R z9I|Pn>uh>~-&d&i8H&&qr|lg}z+b5{?G_^At)Fmd zi0RC;e$NGy;RsdCoDEffejb@A2wk$)|90U8G5tO&x;Mfzl0)EMICjy{SIjO&JRI*ohf z|BBe!TzpP9Z&z-ngzm3#|KLedBwXwzq+Si`0g@7l_tbd)W^X0C8Vc>@D>ehVj?m8d z04R6VDvhfN%d`*gU3=fy+b0)5Vjf#LhZtVeI-%U{tLMF;TxIrml~msd`**gb8{rGe z^l5w!R5NZ>d^>fsItCjFAJx+{`+_H11TZbY{I{{>4W6oWkc};$=mqPi*KS-`Zs4qC z$R8Vkj6B>1Z}4QDh=_zU*b_OKxyjPw(O4x|B3_)Ybn&Fhe!_B7q<}?{LBQ^Nk~{pa z@IeLma#GCt50)DwDrsE;z>`9e9#5i3b?bKtp&*fTNymr(K^OepzNLs45pU;vp)48(yNO5&3%JCj^} zEOx~lqyqpGO8)Gb_FRA*6PC@Gia{FU=C`1lk;J%MEDiK|b#M(O*Ai4i$^M@j3O-On zfw~lh1degzgEtAf8lmsEVsKq5uZvt6-vxFD%Hv+XmJh23JUU5%nSF^&V?vh8Cz3@o zhEWvl_ijwvGiN*wWZol|tKHQX%ak6)gdqmI-UnPg{|{$x8I|Q4t>Gdd-6CDmUDDkt zARwL6UDDFs(kRj?(%s$NT}pj)BMs;MaJlx`Yp*lL8s{&+_%*-ho%6o0ORrrlBi@FT zn|)#9O&pc-%qQ_=-l2gHuu2mGLEcw>ZXb^9&5N^)E*Z$$8O=3?`3Q-a#sDFiN@jov8Zx z0;O8u_$G=C2g8${y}bQdC%-9B4^F$7cVlnzvtP-~`wx|n4xzRgrfGzex5vnm*guLY zOUqhiMy@574+8J9rRs(E4(_0Q>oC_i9@|tNe6M|H1P}Il=zwgd0{iTh_(2Ly$* z?3%>`jr+oJK_~IXMHM;P?6oJTs2V%Gr>J1qEob4*!5!JkPH(E0b~f<{l{FQrACE(% zM_u0qr~{Ua7~Hf~0GhV5eX!uBE$_7}-8IRdrY&|K>{HWr_U>djAAen1_?oEUf=%Bp zCJ-%2KIBS1p9qIB)g7s_^gP=_JtYXUnTa2{U&&_d29l%0_80s;CBE-^k2#zsC;vxk z{89l>XW^Vw2p;vyfW&7!dr0JX!SZNCM4B#T)9g0joGBI)qG!u@UPPtiQ1{wPjiUkC{U zYP=C7(D3Ncv8SDX0x^)K)Z-;+?O!}Py>>sjGZwtN!$%oOHj2alRVuQ)gP#xHboXm| zmnCLbhnxnS@pe*2%pf4TTS_Os6(E;ArnO>zXnqup&kuAs4iZ&HA?>I7StE{zx=9$d z9_5=rmR2t%a7aBW`ZMjru2xxsXwF^1I?shRcmPd}BpMuYC zPJ$l9Z;;S}ysMS?a3g@Pw?0WS9;yMsf3B4(RdCMhiTd1d?TnA84MGPv(p^6f*x>KQ=XuH&RaogxuR6DAJ-Fp0=8ve0hFWq%0_kS3M1Uy`4hyTpBC_@LP?V=~8Df{MMqH8<7%v_w^V6zfI}kXA#9u zz(MA2Wv5He$NjQi!qJL3${zo-zB_+xTIsuI$x$)X#nITw$;QXCjS9Xg4)dh=Wb4DX zv@7Wn3~C9ZZWXo>rXyDpe0#g7b9xl)z1BPv?-vdvhS;WftgE)dA~mbn%#F3KM&(kd z#s=yGqRBTM#}R$32UKX%WWQiiez93i_^GI>DfzAS8v5G@_r(gcT#0qfxDp)bk+Ss_ zQsae~5jo;2P2;tyN|)(@C3c?q3a4a+R^upEw$g;-=qh17^**tr6t6Q*uqKJ7pX2Q#=Z1!8Dfh>~`Uw){e` z1db}QuG(t~yk$J?FTd&$ONNSgW zaCRgRmaE!oL&RC(Vh!f_q_4m$$DV``!z=fd19Hf(hxg1B0&fSPa+gGC$P*4sK;pSe z9n_e{7;mqPZ~_f5!9)_7hCszRo={nL{rF1*%o+@88Xy%O>G(XGIrCZLMK#L04oNOy z^L>WpIfkzYlM9NPFPv;+KnSsuU~CBlIxVQpvqmjdwoKSIY#PG~v%o z8+oY#U)sx_JC*}RlI1X%QBrAxmr=6MGiWeoUeI()00O&h5&Dw)^r-Or zr__(AF=!vsyt5kD_Bs&P)ypSe`R*BJTf=YDZx1{5=D00myZoa>Dxn=#e~?cmZPD2YYwgY)vqUo3Yr+ zD4YP&DJI#>Rj*(Tsw>RiWNN>>1de4Q!Lp%u;+M@N(PCmtMTCQVboBKEtn^ICGQO z0zT51x`B^0SDO=>b5%;~7B?J|z=^tkVua#^L_vkIt@#S=DOL0I_+;QY!_$`Ttl9FN z3N*ZeqqkSHzNor-s4$(wK9)yCIC4|k^-ei+Qp(by?2FZHxb;usWIly&2_F#qanoJL z>E6CT4yI)f<(4UE)5zOzWY-Q8FE*T7^$?ljZn6F{#8Xx%*JSWk!Aj0iaZlAm0Z%I^ znjy~5Q?s1W<;67LX3;G}I1ubk!YYtmoXxQVxk7ho8ZB8>z>>H@#OghhYWv8I+Hn

SGXDJhS!lXVMXkdKx_IVFICWS& zQM%LPB6^^ZyzMe&R$JA{Gx7o1(W@oK_Zoy~^Ev4^kOnL(SI@-Tp@~ zssFE=+ZB{S9{?iB`1u<|as_}$a`}^n-pgO#zq2o=)~IN-CToL`(25qHX*tm-ZuvWx zMA&jNdF0{Q3}gUQfR@Q`HuuN1Y2h^Lf`gM%PQ$wuoUk5}Q^H;TflK7S2muw{N$U(; zEcjLrD-Z1*lW)K+IC$8t95Usv9g(-ENWsHGLL%srw7p6E$DVrM^5ai2-{k5udhdUW z`hy~2>^%ybRDL1^l>eIejUv(hjUoY)xm(J*P;WbaD*dyDCw>Ms_YgTK-KmIl;Ay;zAO8;k>nM0OD%%G z!0gv&7!uMBOTUdIOoLEQ&Ll@Xu#uz|iDJbexCOxt985YQ``bw3Jqo0@DJ0*eMD|&u ze>B}2UBZj3lK)GM8RyG2Dj+XCF_rMR1)N1dMgUM#6F%WnAz;VlAz+QX7X>y4s0B zbKS+UN|l3$vemci5;7_qn*?7_dst`hW$5<~sjN%2V;4DIE~ly8OBztTN~9sH=2!p? z&0{HV_ihcxnf~Mxsaoi^8;8;;e8;9*BJF|B79;rDDGWPLV&1%%1O;R_^{m-OQwmSN zoEMuOvaq>w6{ z0}6G{MF^O>PP|D_j?-Yhwnu$x91%Z2Tw0P``e&j5pJ|UW+k_>uwRW)J91`}iE2e7( z;2z1@UYL0K!*^uc44X2~BS}iYhZiy;a7sJwV*ju}Uh6fMZfcXIdH^b7(7_J3de<}U zc2eU@_=k7WA3W9|j@qci6WanTR(nt2DFhm4PT=>kPv9-KZwi5YmEOPz=%l}`mB%pv zx2Eoya*l~PLJC^iGwIl0aH9d_U@kx@$J}}}c?()UV$6~VIbb7^9|>x3K>Sn(x6p9x z{}cUpAZaF7%QXP$5r(Jp4x6YR|I?pHlC0V>9JhcYQpwPujr@O(&fI3f+ zE|3rU@oXEMtH;N=r0<3(VqyEEkTD$;y*4p7@FX2O)hmopG0O{XpHwH$tHqR?*wicR zU7Dy*7MyJjOUR6R~7>m~sJ8x63kP3B%9N{aK>=`;yivTuoHxyyou*!6OO!pa33r zW#KEOHhN4s>`+32Pl$YTTlZ(4$#;d(ZU`f^hWK?fgeYr7`z~djutMS<=>i; zG_Co&3`&+^;|$)F}DMLtcbB%#%Lw{arIX9~3-{s$On8;_`1IrL)F`y$<)K6meSw?fsh z%tEy5^2t-u=o_FIOHeC>VFjOPSOM50dr2q`(t9&DKdw=%zhJ5t)eC&%tS>%3StqKU zXw--YqnMWd!Hn0m`K*QOk0j|SD~W*jqRM1>wup$lK_iChK-uW!A4w88E7|v3k`y!V z{*;yECJ#;OEeF4ifPE48Z8UH52au$dYxw(HjauBbFS2>=yw(fvvIgJ=aLawFQwMYb zln#GOl8!O~joZR}87p0$f`L99P;?xl&^YC zM&itVdaQjPZ(C+N3N2D$%WJU2Foi~bsLG#gWELBc*+V+vOow*TE!C3Hjtg&Y&_~6Q zGdG9^f`t*ILP}M9t_$c*Ryk~+km{^b$oYzJu}Bb8wJ6hy_2QCKJ5lv-$JQ+rmQQ*K zz3))&p1nH0%6||8o<(rb)aIv${_oL3bg3RpfMJwlNe!(ug?UdH)buha<76S|=~;y1 z2MnWG%B_c_Y&1b_u~!~K%ytS#fg;DG2==I)w_~~PVIoU%)Lp4#5G{Ctb3bMk;Yu>m z5MJZ>6;d@dz6?@d*NYM*okI;5O}R*3qODnNB@FK3MXK+Nwq))K%sJQ)0z!`@T>uDa z92V*oumci&b61=L`~`o|UfKoiR26Lv`8NoOOb6oC%1Ljf#;wh|0!Z(Z$gX>F)5I_A zm{5>vR>)D{n{86oP}HMcwP}|q)ipV@K>3VUEhxo({e!(%c$&WNpBHDyy{-}|WP+u~=8l^tE5AOZS3&UE zPtqKje|zb0{nrRK$N%<24weA)*(WQlDuogz1<5ffAR=ibS$VFby;#4@7G87;M6i#W z?zfw%(c1dhO(aNZPNU;T-VC{{N5*-tFh3o}PS1ny9(1(@iH1sBvrk4$lA5`j2DatX zslRq!55j`h#<^uiUd?S297KCyPBx@cD4W#t>+3k}Pb%)T1q%Dg0cPE2QoDSKkVOwYMP4HZT}gP`?<9+{ zuC<$W+~?PS*szRRWAf`+JANGGQonGOBaTwhvlp@fqD6aVxk2KcK(wgc<9YRh+V=J~ zZHg*-@YaD_ntz4rw>{u2R+YjS<4};WiUOR)LVbr(i{o+VDcM%vg!G3E5B3ReRbIc7 zP3oE6Z0_D3j?yS;?$A%!yGLQAlyg{sqMJidjehSbl&YX8o2&~vHo!g@pG~j)ldVJq z7v+ajW~qNrP*Fb$GK@~s61JISyAsLwcJNtjU4OB!TA%;3P88Pba}!T<4St#i<5vc< z-2E7GS?|nJ(b=GMP1x`W!qU3pUs5=KoG_BplF2hvZGsD?-P7oq#WGohMIg6n741^A z?Ptwq+^_T?I(p?@>|TUO5Dt9k-6Pi^1SF> zcy`h>d#bW8v$EuQ1rxG(H9+s}n&g_Cn>Fn`YS(1q9Z`@c;zCy3zgubXeDHwn);sJd{6<-)g4zfe?WmBN7~960xWn50xS6bd zD!2Jzx-{R){>iS_VspnuHL;Z6U7^{f_g1>B$T}dYkWFtn3l_L>pTQ%-bMo%@OQczC zJnEC7WfQ>g2@v0mF$h4WFeqR3_QTOl= zgcdyynInhdt3}XZnC1Z2>ZHU;O|*s9uSKe9*}#7I!}^V5y5#p3L<~_!J~Had6L@HR zt`@3vxHS6Ux_Lrd(2E^usx-$ntW>y;_q?{&(FHIy~&8<9^ZfIfgnHU`=Vo1L*vx&wv|i= zlK9Kj`Cu!zRrKh;&ZGaBz-DFr-}7iVY7tDP1s*ykeYmlrkcfl`RnHs{*R;kv2Udo2 zxi_X}kC43SWfJ$DW|8sQq>wZ=?z~cPz2u+ZY=Wxj$9mZ)t5*kP-YseT-phrkt=Ufq zk|$s7iU;7U1uWSC<2b~T!t|^DbVo!mSZqP!%sA^l>38-`&r9iHI@50ztoRrrM90#S z?e*onjlfz2T?l51HP|%p}vL2Dts~3+tyy z6-;V(oxA4J+^MX&+H|c40G^HPSwU;AlHVkbqNg&W*f56zfIno~{XnC$ss`ZM{8e~K zy=oBrAButr$s-*4>>)4!aDVUMsb2-Le|(iU5Oo~w((0l5`_oI3DK037KKOtZX^qc& zbj-Qm9pov^L0T)mA6HD56btBTY0Tb?C12F1?Fx?#NAa1blQw?C0Cv(S**nKoWck93 zd-n3uZ%JRfa)bFu&Qg9!y#)gcH0zdf00b?Th*c=mjMgXjMCf74S~Fy7IlDDruUDQIC#+7tI&M`17S>n!Q-_ zDAytf!|OBmC$m)eY z+!>nfp1hBA9FXO2a0{ww1Wc3pZNna>n%qu{mL%bFvNJ1*qN(3j^?YaV#8zC4mY3-+ zU;T{tGOdBkd}CY>_8eHw?Fv=Rq|%}LP8;bE$G{z=APosA>X9DMjUT)U^}cHQ$~yCsw+K8b@E(jMqF1k)b=fHfw}RVbs%8I&)@ec}*hL z%;=P#zwcMAMtruE(8aS8b(UggAq)tQ2r4C@eB2R;2)aFi%%*8f!U*J2sOqXnGfUJV z*VLikd5gRkDe24)#|4s!&QQXVI;1SwK(ZJyOr`5)F!58B%)wQo)hHQi=+GDoJ@uSuQO?bQTH`Okcp)dpXvOhxTcG5@oC~Ym&=XIfR+GA{;k1dT z0Oq!x$DNR4lLZr-T+aaJ-F|#9s#d|BN#QgI?1~)8V9@y?y^;x2c{6!hFLeD#A!E+^ z3&wAw{u#}hCme=SgHZHULo1>%k3uwI?@NPs1P}RL-;7d9AMOsY47v!@_93u=gN+My$WB~mbi!=OiWoIVrlEX-;vR$X%oHznra?l@zMD)3pCGW;Nz9?tH-bRSRR+hr_ zBzHC`WOsLo>csnccizj2-gX_smMO)N>+jinUwbnlpqNsFJ^4$yNH~W;Ax>3FomoGb zKgIu;@Uu9;;^DCfoFrWvYvR}4%9ul#7N7@CXgdTnNt)LmOj~fi;>>wW%Y?QYh@8y_ zd@kDNlNI=ay5-5BgQu2siIvTXZ{l`|;BQ}2i{JN|t=}B6NS{t!xa-EZAuTJBEfr>L zfOjx9n_l)ObBPE#?6JkR8y7g3E$S~EnUs!Lm90;MHm(0cMk~j@OwNHp9n~Z*yBn!l zBVAJ!HOz)Z%!-DJW!yO)p_tCkr0p!s#9x$~ip5wwbUBetV=^&z^Ycrlj?4k~#FMEG zs}C7MYc=>{1Q&^)ah=}lZLR~MB6A>A6n^-V`P`s(_12tgaZjyrgO7j0pxO;Kkvrn` znD}3>C*p+9R>$_ns!=B3$CFn{3|;)))Jef9QMhWNm*xAc8CB%g=XXm%k{{{%jDIv_ zJ`9`{WnR7oU1X2Q3T`f?UfwQXoYbj&wJ0Q?XhyS>-18Z<@L1$wSjK*}80e4I+^qiH>7<8HDK|rWeZqWT=sQJNXaF260Ui zs=-jAqD|cy(%L}qGfKxXuv&lYq=l7b{Q(q<6_h#QzRyHLhZ8uRe`nYyWA}idQBcU) zKae0K_MARC-sG2jtdi4S!V-b!b7^}l>f%_;Ii^_5DtYR|&xmZDh%fR>Jg}vO5k+de zl@l@eG*IlTL5HR^JHkptcm&r+0?Hn>;>i5th2N*15>cI zPyMr&WEK11-zte@6F82)3=l^Payv6a586*ZE2#jwjM!R!M=mIQ^lwB zzEei0xnD&W?X9v?zee&kFSqP;7PjMutCuO_4K%&tBN*n9xEV=^DO5v3eccOiw2YqE zrlG19r<_0N;~r6yZxG2*s47E;IC4i=nbls{dl#(T6R$#O*VOzgBAffarmp`nb^eHr zc41`zc5N2eY!nMokGuv%hdzG&-3F0jC|P#yO@)BMSq|Kdr4IAZKL6fuJ5xV0@M({< zuk;{FZ*xbjzJ>l!@Su^{yM06>&dOo=fi$~WKymk1zMy~xKFSP+RyehHYl3V#yfdj; zafp7|jQ`T+DeH4=bpPe_+f^~QWSU@oYK~13x*hU~nxdyNNC_25!Vlqr!QW+&f*b*H zEeazQuE-pDLz*@NTPX{Wwu191vtG7lrN{3xSr_!M1%}$3ndr2#(ool9%2%`e#iwoLItLKA*Wda!^ zAI9SI1|c+CsJ>Lh8x0WmYEX9)rPw$UseT*8v(kG%Hhi{{;MS}r zMa2oD)w#@@*{6ouX!nOe))sc4p>`(zS~i`XMe##nogSeL!pQWAtaY7pU#myz^u^XL ztM`;^L4JJl$>CcW(iG>0{KEt&b7Ck0r3IL#UL=tcHm{M)?=qEH7s}pd*+=3U{<-%E zOzf5wShl4wixpmGQ1!vZDONZ++HQ((=HUjuyv33;@QIamR?oS`!kJxADE~Gcf0I5M zy|7cuum{|ohLVdW>?SIf)aaos=f=BO#pWvLXOq{yFic>=Y0U%}K?0v|PNuiXMkgu7 zK6QZsUn#D#=$M|y4xF%jIG2DBP*&@JWcecXz?)6qW)$0G5J6ZXdMSlS&JnZIt(j)b zVAfy9EDbKJRfEfF(=6Am6bxaumQ>eXB^CL?zfkPkNs!Vfd(p6Mmyy@j82CiAi5$Ow z{~DKM(Gjp7-^9^ zt-N1%iJXQ!H!FCz*Fz^$i~Kp9z;ack%#fSp^bPqDb;DUNqC3@5nUyxe*Cr?wd_B47 z_czl4HLj8@JNJ5Wq`11*X_X`N+N|(bEa3=8!m%}LrcEH08ee@6q{mq6HxEazjU`El zcn@#Tvfta>3ALtgWBs%)Svy00ggAa)&hc;GaoqngZO!(N@3=p6>KsayToIE3d_j}; zS%NuX=*w*0jO8ApX%);#tgvvhg&*@7*P)ipqCT}Be_izZf+imI7|G+gK5lz=$N%xs z;jQ2!!qWw9*KTt@HG;XI^BS;fcZ}mi^gtYgOufn?fWYt=4wkQegbP6PKZ|Xw_`LY& zbd{QrAL@Y3rlfr6N|mOu5Wj3kZ|JgcG?ppV^)(*Un|9?%KVc}13w*{k(WUSfd|=wl zn8S~qseK`N;v4%{_LB9z@N{!`uy!Y zs*sr{lw@XINL}GfT0Tpk>9s?PRzzaXxWZ^t-*#FCJMfQ7G3jx^~E0E@Gt0=Zv z)XXJMEJnOpFS|^bgX@|w{;{wK3RWJAzpq^zPBr~00NGpY*U4GzYZXXrVdlr=<7^fz zx7?1XlU-D$ga+ZTSBmVuT(!*wf3M`ksJ>B@hv^NncmwXz``4<{_fONrsDH5f-jcS}0qjK|xMY&Yyjf>{ zlJ0h`Vt|FU{3}0!h4qOr--;|>TSm?Mct>jse^(z)o`r-c__97;k-+}h@Ndi0o=p3_ z*8;6m3r+9F80Uu>4%?HUCeP0mm&mLfP~F{QnpGS|1h41UqOSGipy!8};XDA47!F6TMx-lRean^DfUmU1boX-q?Tgx{9tM)PZ)|BDy|S zDoPW;y*_5CxPHH3o7x~LFs9x^!Qa>Wu^$!>CQSKTxbW8n65{P^7*@;G*}F|aV`A4O zBjP>^QFMVY&n~%NF=@I+wh1YfpUz+HlcA84G{<^E4>!M0^=w19h1jFoCo8G=bgugA zCv%gZr~VDnzTtW0;2do55GZ@$IVqvxI%4zydIFp?ZOg+s6!C1r?Y~Zz{}`U;{6CWg zUlOc#yn%gJLK5`idW7c*jF&CoBgMRZlz3=`>dvWvaTSsrCNZYl2H& zNQ_WsDUFBEWO}#s{E6{YrQy()^~z*U7P%0Wt&Cym%Dfmk(EKy#h0+2hwjkXZE{|%Q ze2&<(eva?WZUnmLcd-KJ8hUm@dd%r$s^bXH!~Ht>l>Bz!4XV@Lj>jl_sEZMV)#jU{ zOlWYVqlVANIy6Y^Di=2iI_mMhl_-w^GCCXgi< zq78(nyGW!_J{|+p#n?@Q=Byo5`%Swm7p@_l1t7%w?nfqw{m0#|A;3c-^kB`Y05mOa$mU>kZb=g1V zYt(YLe&o``Ia};WN$sd8!rU}irhy=Oa&2^v%}k{W_5CoJQ8VXUgW&pKmn4q#lT+JLP=Axg<)m$Bs1klVHjttB<@0ckM|}EHq3AuO zpm6UJe;0A50-C;mdi-*)0l?GpI{iFMBPiTd`b zpwOB-EdkWGmz1+)9H+}Q9P@Cx^HLQqu=v6ohnl8jbv+XLr?av99i;fujQnj9by8nj zR!qp+w4pVF#ez&}6(A^A4Z|w-Hwbf}W5;`?`nOwo*3o=e(;bF7MZU3RJHf+D>5sue0WX>eKu*NG;8Bh$0Cp3J z539P!Vv*zE2pzL&l3T7`krxsV&~`o+A+&i*9JHS8DtNVwtfbfO)(ZZX6Im-XHO9Q8 zsOG;rGl^Km6&=SB^O~pwKt*FXl)|_0{mWzY;;tHei`- z=#J9wL=fjC*cq}Gtn)JoDB!cCOBRXK&8SZSJy(i40NVdG2#atWW6c2k(N#C}cOYo; zDG+p7{97mM{Z}A}?kNzIYP)NDksHr=F>PEdVLMF;?e!E0>VyFYf(S^Y$|%&MYK?sz zh??WsQhPFh3k#WO=%=NYQjrz#_1%60ur$t>1Od9VQSQHWX$%HOR?APiG-*JWHdA!O zUidN8MpaB$Ijks4X#;_Qia;(H^a225fBEDogORHb6APTl!ajM%x}ry^%v40=?*d?K zZgP`3Fc`ZiZ?D4{59J=oys?;466_3_3zzfW%a5s@E_Lj8bMNZ5cyfk}3N7v`=~Enr z!T}BZZ>blSm8bW7PoyG4hVRPN^zQ_tCTZqoYF&*|8!x!9Eaj)|BU%@cKU)LIb9M=K zgtG~Z*1BmW3$J;d9V~C0oGEdak@D+$Z7$ip`X9=VzuxH;7QE2Y2rsOj%41eu$^7Ub z+ReHdP|}A*Gs31Iz0rKxNv6;ecpIHyVQMzxKY?E#Qsy9c>i^A}>&(#|Br03SiDDcd z{fC(k|9fV*=zXfXR@d)D49YPb-%9+!P8~kt9%OZSeu_zk?I9t9_JSQ&kD?b~Y5HEzn zc*NY>(;f`)8Tsu=a=0XAX`Wle%S7^ zVYRnNFt^UN2MK!^2@w@U!W7~%Ev{$z>5>#FQiLSMSr~H+Sr}si9p^o$mLGCII|@R_ zaM$Y3Bfym7=|jdN5X6?oXs;@Boij7~(w~Rc1qi1C`5@={^*Ztv{eHy6B|nNN^x9Ny zG$#-iwLP$Z{^{?F@mD^mSSuqSVzVv>o7xRC{!cncOHBwKC~(ZQ^uG6?r8ReP7KD4P zL)%(i*Zz$NZ#T<)jCeq_Tmx}$h|~drwomk@tFHqat+9E(Aj{hotv%p)dV)A| z@Wli3WzqEn?os`l+I0VQGX2NkH2XioLH#!Pl3+r}7VO+%NiMd~XHf_$AKM_e*A8gX zG*3|MRh4EWQwm%e<{v)MFr7Ok-%B=ChO?(UkF-rUd!3$b%sThlo}TAxdovxj9yOwR z>w}7^wNtiU@f^d!>QF`=@LzYbivG`^BIgj9mZG&*O%*gl^1cVs2f&n3>G_iw(n_kot%F><)H8LTIg1>h{Yo!Xiprt5pMqve~DT_pf?#0|B zhNv<6y!yx@P*|jiEw1F-=HGx2x3;$*T87jIRg3Dsxv5JGFbe`?#}}H;=kaK2uTiEK zC!1id>1jco7S)*YqB*Y&H`iNkSH9qoI6l&Xn;dhVdq9(eBRIjkfoT~8sY8_gl$>rv z+gL$^S=YSemBOj+D-X`-pD~J|2dG6}=LqIr{8T`4+6qWci}$i17z0fXVJ1^#WQ}k+ zc4T+ghZJRA1RyyL4Q_Ho`2$xoKc}&SSkBKG?0X-IcNHtYqOR$4iF0Sk7zHE}_EY{W z%btddzaY=c(Lks%WtgeTHCm(^#$LxYE*`kj>;#$|`CWkT8dyXVyx#4o!IxhL$o=?~ zqpI&H$LgODAtMdQtqT;LKyupb1J)Zjwh|#Nyo5IMmH&5gnwe}mE(k9WdOGTqsbR)2 zk$bvMw`SujNS5mx(*zL>yWUbJ$x^y|VEz{6Z1>7%L50QZIGvSP+{sfmH+a{0eiVe5=eTV@L$7$^V9RZ&8eTdUyMa|75JzUzX0eal7x#pE(1Y~O{o8iXW1kNGU$ zJWw(frguwR*~LVbRVjpA=~{K^8Ie8gFg_M;#YSFnR-zM0`96+Xk!P$Lk=e}|kcFC9 zb=g*+dvoH4o_KdkP(FHnc?g89t2?yp>u&m`Mjhd8vUX-G2=QJu;mf~{nEx1vX6OFj zXL(@6aH9drv}4$0QPuJ~h#(Xw@@HFE5jOq=^!>k;Y3a0#7QZOD%MIQ@wA)mDrJp&q z*rC$!R0bNW<+Kn${_t)Cf#jV2%e(TFO&RRkq#K_qE_O!VpfTLAO{ zWTF#(C_hX|r@GU$0TX5or2Wa8URYuDX`fRo%cMn+Y5wK|;q_Bp)tEqdBoOG&Q-hwv zBE3BO1COOAqxh_aRy+)-L5c$E!noeq0^JNFt&+LmX)9^mR4{^Q=@s)ZgK7RZ3H>xoR?P`S<=|=kq2C$}qs~K%rWdwf`(dT>sJN9=Xy7zY? zT2x^j9v(n7(jplE)r`yoKOhn92Tnxa>hBHY>i45rbcu*`_kQEvd_-ax=yBMcJDlPk1g$|aS-vu z^W@}t;!V|@HYx^nma=pbqpwC85|qwXiDcBSCPxG!YEs-@ZEYU&Y&GE%>u%U4#5dK3 z?x29q_PDSH1w*rQ-sB}t9pVJP9;TEY<@?o1qEL}=iSItP(kQMVUA$OMW$Gq0rr#^t zZ8!H>q&pWY)+b(%!s&-?BZt0&_MxIhB1m4-`9924-?57A0_pu=<&r~e{C*61yRF-L z+%Gu96!Mex|J^C^3f{o7Ef7kWu^tU*KhBO!t$p##XepuB& zCuFQ3UHgTIZrdGpOiI@g{I#bWZ<&^^gVRvl&P4n$SVK{tw6Z_U&i~~y_qc+6R=;3F z-UDQLry?@AmTJgyYON>*5_6;#csLE7R+Z-R~F2Fa#>KJ6AGNw%igH7D6yG4HE5&GPU@KsVXsH73);e6tq+~N z7Q7#tC9b?hpsgm%65G2j=$`@x727DP%A zWL!*Xo9uCqLD{|MB_bV@+Q6%MsqX~ptZAPY+0FT?Ou1}0(X;F}5Y>JR5?_0nEh)>p zk;Y==g_v@`Nsif?w zo!Kb{Y!12`?+Zz?L>zTsYlzE^DVP%>=~96 zfQ3bP!osHHGqOaxdRdF0{Gt28e83nfEs*fINiV&}y`-(D`LawR_-rHe&IP>J%S#h`Flqy`Tg zrhL+qFxLXsVb&HW&Rc?Suk06*Nl}`+O@bJwRCpp^ixp_bVKV?q(ur^jz1tnq!V5Yb zhcqI$asbsKi`j!jZ7$`TRF{M!EJ%#zUJvt zxZf41F=I=!Y?gI*Z0KoWbSKBqOqLNH>l+%B^Vs}FC+>L>JR`hQb-|S6`TP>~O!=z` zg<$6{l&4|w*q$_%Jy+5E?zK7N!{D71O&?o)THO^vidXnV_^o~46nwp%4Gc6QnrSmF z|5VmuE+x0&E8-vYT|t57FN`86W7jsHijV9=CQ$woA&szpyrY^a6HB$J_9q4%@Ta5)P$PaBzbwni)2XQlQ!bhzjMrEx77+7TPw-d;Am{6K_mPc{w z0w_GOO@ub2*?kOBxWoYw6^(%rr=s5c7A;Q2uiwSD&X-C~18qsu$G7hS6yBYaykonr zU2tqgbL*V9!iX8xut!QXA#KtvygFZA1(`vh{Oe%(k5Olie_h~!fCY|RoC-Z-n@})> zJj5!}p2-GttcgP?c!Q$@Y;ab{MF_7mwC=T}rxLO3AHy{AU$E&FkPKwO~v6x+_xemTv zV{q9oj7}m{S3GBP2pNpEQtKocI0OA}!*q!@V3@{>odtg)84m9%W_^7L_P!Q=!vqHl zB`1HnN&b&vnoznTkD+@}K)MO87c4ge{k6k+dcuHrIREp6`IjBe^q(D$*8ke!XjQVN zfnP9I(vdHdAh-BW)(eWKudk=NORrTt>Bp(rKGa(}h$%2C5;)mg@H-bcQP{Av4m!Nh ztG`#WXju^5A@N?A4<2VUZDA5*oIAKXX5{mzwVjXnV!M&lQvObPuRzYgWo|;{Oj+B* z*eeIq2v0^K;wIIcN80_QoS4;3q$K4lN@N}mRx_>cV4!+ECAa9*`+biYIyV0}nqB`X z#?f?Vj8f#L3DIHMP%VM#-T4Y@Yd|mE$f2$p0sYFkIYH&9Mm#p%Ds-dMRs$?JBLL>h zFLrYuZbrx`91I(dTSA;=-*N9}5p5p@l0>}URp(lc!GT{jOfXU4SB-I=3-GG(my9Mw z6>eD1u3aNz%PCIB)X{42`83w=3P6F8f=@IVy-8mv3H4mVNz)(P}jY>n& zsxvaPQcihyEbUd;EioUApG9d?^h3`t*(@me$D@Q?oZjN^#mv)Nrjz?xl7owPKJ@Bp zkuy~oYV2Pp&VLItGqe4pMk;Fytc+VO)s9g^Uj0FAL~FfW4kP;g(KOY%iYuV1ZLaox zeNG&$UAKsvVB}-aYR6U~Kpp$UiM}!Wr4w7@{?%xH_+=^Y*`W*D%KUx>XCqanjbr!x zew25!3*&z3`UXK3-zmzwStPCZj`HfvT#{g0S|mmnq6>4VfDkA(3}og4HEZEYUZTX)@cpYrZIRs(*`g6^#DpA*VKACPIQEw{%N z8CV!32$HLN|Dui=0QCw=Fm-Izd8_dMO&wzaQ^#IxR$fnf6y**YI=R`hxK@TLt^oCl zp$lgy+&D^Z>sJG^;OEOW;i#S-qlb}NUn&zYQiqJz7_*;<(PRVi`b%m{Kt_M!m5#=^Lj z7%iwPzeq96W-u8DGxt090flzugbVt0`VKXN>MDAHO;3+T@#Xi&llY@{ormn2YjAh)%5~Jew+A%MDfg z`mM3Rmu^2^XVttUfrA=x~}S7Zm_PCINP3B;AS7D;InLlJ1|E8OQvc@;~>!e+WLncmWf9$^etJRz|J3C!Kr9ff3VkXWGprZ)dPvf8r9!JOm<6C`l;6 zh+T`@v9du6u5HSl>kDD8RBo??S^!q>;Phy03&83lT{s%|habcxs65xLe&x3caATv4 z*gK#orp?!X-sA0*hfaNgjx>S}Ui{LyqASkbgCRbkKnJ))Lp79&SOwC9T?@V`7p_A} z7}Ze67}EMX09H>6!0KzalLLwn@`ZQVWS-632Nm6F@4_og1Aeh-&5aMs2N#Tu#O0Pl zvV_K|r92HSmV%i2A+w{NU?s z2P}ShzP=qGjU1_oVKC+YOasOmmJ3vWBYL@P5R$!_(j^v0jjL%2CPPO^kSS?U2^fph zG!R;rZGpppbh;5q^m~duNn0j+P|q=HzoOZHV_etGcucpC7jMEhb#DSX+h zG=Fd*tyPl(bQoh}^3_G(Foy-w(+tj6ZRz#vbJfuPSX8=ZhwT{tm;re_)mQ}et*K8S zftef7nUCIO;kEksH&#pc`ygGvs5U3f0tF=#ZkP1COjQ}KgN6|dz01cnq5YY4l1eYa zuNKbB!J*W(ciX86D7NEnsJ6((&YZ(1Yg*+BC5uMI#rfst@lh`81YIfCBn{vBi{Y2W z3zx;M-ts`+o@H6M=4$Pnh8hKq7Mar)Z+UEUm_IKe5IrbUUuEnkTe869T@j_GFQq$B{C8y?cq`s8*QHU|d>)`=|Cpv8+hNx2Ei8a9=T6%ltsQ)@Y`x6! z^x&Z&S;d!+TNXoUA*5n1K_0$tF}dS|By<`--%WW}8KWy#Y4PK8Du)l+yB4QC9urA3 z%PCfAwJ_x05OyZXStHpX?=ltSbD!$u?-qd$qcElQ;Ir{7dt5u`g4i9#W5-`&tzR`S6($P2{cUk+tet`j;nRJVUJ6# z3GT<_Dq5#vkJX?RUIiL{UT)dJ8An=Zv0J?zO4`L$;!Nqq)+wj6v-hgulskW~{Q2x^ z#3ROK;p`tr%)hi7v;6G`BUJ>AV*x*y1ZqP+!o8m&o;gAm!oY}etW38tM&nu8HS`M> z?TRX>$^c^LkcjWf+(N>2H*?qoovx8S87K zY2!y1t_Gr6Zj3^L0TPBq$GDA?eX$`JJa1rub6pEgfWtNLzHahwQUct@h(+pv?n^zJ zSo12fUDwHP#C@$9NrI>*fXQX?vcwX?vqG29-6D50W0mT{*sN0o(E)T{ZlIz^U({q3 z@_ot#tmpxCU*&$#$5%lry!7%W><{z9wm#@t0pw;Hv z6DfdG2n5e@_Di2<3<7JDeLT1}CFrT?V5VLGRvQ?4!iEsc#Zs!|_jr1TS0E#7EYjxt zWWWq)h5@L`Zx=yw9)3W*%t^kFQi%Ta&?UT2(wQ5zRjM`DA__c3Vk@uGDF6 z)XodXbF&mPy}D2Cy}+dI2DZoCbgq>L>-2%pT;ZB$-rkV`=@;|7a8Bio3ERT9y6S^= zN16BfwNjzD^HeT+Q)#l!n>C~aPKyjF-U(4OB8m;Pk&ozqDt)A>5grwo5dLgx8lM{* zup2=A(h^K!`H56n%lx#K+|({HXWWM<5nv;W1AWl7fsp~lta38(((a|?QRqzuK9H%U zipPuJFF5Fqc>3?7A@i!4%^?mt-AlcNUH@?E+V69-ZY*<}f##Frovn$oC1lIH-y^ka zsa}idKqf|<C( z@T$FrW*Mz$jOkPkq47d8pXy16$N8K5%<6n3(@zAPd< za05!A_xb|Nh0%Z*U$EOAT@!els;pHFHpFc9V;)&22ZSBk(2GwX8Uqk^IDYNLDthc4 zI-T6uP zpSYg?!<^&xKjs`e%e?=l^*APa=LZM5Lnjo}oKuy0@d>2$2+Gl=0cZ@($LF7wSDn^^ zFXVyN`ppXfjgejT9t);P)mJ!uQyUg+tw(!AHG%nT(M&lbMS_WXTUK}QfNww2DlmL~ zP?6jM3lMgAp~B7=?MEx;yP&Wm(f`;GY^|T0thMP=Mt&b%-ws!xta(T4>4e{w1JD>0 zibgyOMwn?3DnifSv>p^$kk%sr(0W!Z^GoCOpTFbUBBq_V#&R^r&kvt)3=U~W zX1kcybOZZ(#7$Q@rSm3DPd{Q^Sw*no)bMz$_H(bnC)n{1vhkq00MT@ZOxuAz_@-#D~wM8?+xxGBf_%_Ohy}(}OX{rm}GFBLgeL z5-`F6E6#n*MJz3op@sJ&{P(-DGOkGP!Pl={k{>CGPuIe~`7q7SebFNHP&60I<1>KA zP_5E>2(Wr=At?t6DPHZ+lT>BlPi!juBYLc8i?0&e(u{a)e!@fpJE4u9^1!z88~BW!VG^x&kV1d@GZvl8^y~m z8aKq3fzK7M214aKd5JrV>}RK~q+P$o(7vpJmk$7_Jd7c=Hpn@z;mqi+w8(sQ^bW7v z<^iWr4!153;|7x4+(WsP-!)-?>n4a2aNP)u4{g?E$BYdd-jbeW`HpO8yWsnZQ7u)^ zzGyoYX2mXYTX->KF~6m#_=&;_X&amW7Je#^Bw=*}*2rH_r|nVvkgQTGP5>|Yt3la! z&q>w3HIlbWy!rGUF8F!a2fRqyYOH&n&7@qudXLZQVb?u(;rOFHC|+&DEAAzsdtw-Q z13v`O@3wS{BTTn2m*x#)|2TvGr7M~9Z*3S|VE~{9dLZwOc=sLE=1>EC>`tgvdE_5ruf%^yxjsoI`>Q-E(yDxA^(ANR&+R6 zjp9wYabs>rZ?85&p}5@+$;>_2(Hih-FMi;xf#81N?}(hHjD2!Te51W&47BvvXW}D{ z+0w>wiV^xBpmkjLdtwE0OJR6yMW%~Hrpa`xGQabxxXO#>J(l}Gt&vXE|B?7sDJpF< z;K#Fc>GHKVmCs+4CB$)-rZI3PH5@+oTK5H#>p?(rJyXX$>^ISQEs5Q3ybBeWBc%6pSh6lYbxQPccElF_D!X_qJ^tGx z$Ow0rTn9ZkD-la1UO*QH22&3*6dJbU1j8VRWq}{>7!1%<4_G}POF*E>^;eG(tkQ1# zf#f=`bs-g$(9<;*E7PU&x^9^Rq^T-Fj-RX>NH7}3|CwBu;@;^rhU<1tk;jbjn&g8f z*DE1j@vYG0y3Jj3eR3Bh^w^KsX-}i(y8D&?P>7Cx9Erq!taCVjVLWUGoUK@8!>d&Q zLJykf1(uP_EQV4GKM$hWTb)t8>#6+w*JJpT5{v2Gb=ago8v9MGIl~!h4=HgyW?<+z zJnWym+k&{z33mzVT9~&6+^b|+RCmSG{bFH_V-_^T+^yF2iYzjZtm4g85KbbFXOF;z zK~J>K%FR7l(k-VxX$C3NgfC+#T%vvO{7>z|6l?3@#-$ZQR^O;2{<1fU+@z?fFjonD zkdGFqfgKr=OceNGyDDoUvV7asIvf zwM?Q5p4qso#mee%lAS@#-KGkWQdaD5_K#r zby6GJzffxgOTKZOd`_ehk*e%OlC1gQ7bs%s9DfGuyxPvvfbQ|Zh-nWoz&g{cP023a zHEX>dA)LD7$;pZi1E<9ro>Bd(s%^6F&!-(f31@qG#F4b^G_Z{{dRe^21qKUOrn&^2` z7|ASfQ4(TP`tKToVRXILeJ*r9>odMdM~+F$KjY|Rgkfi@g_9TVtNypXX4MN6)0Q(& z$roKpQ0qH6*R|Q&YhC&|*JmdXLKUAiB$$1eHy~s-EkVusJ{y*7>aEek3Db^S92#LB zY@|cT%H_^6op8OWn+D6hy7^`s^!>G?GsnL1voc;BAr-vO|Ivx=pJoo*zjGur^RWH5 zDd)f13bBD!=T;aq&pDjr=`4RK){T!Y6C;i8QrB&zy0p=)Oz8?OX~fJJym@0fWIr|BbEHk zpkXG8i)HQ5X7vm8F|Eso-sWlPY@jh22!mpLdw|2Bw3tWMc=KHrm0DUfC z;&o7|SS(QKYykHvd<{Po;j&)VRXPZBn&Gc7s4f@=&ASVOnsWgZ`8ZRMBEO!^#>`7X#qf6VMu#j@ff{kKR;`; z(&L2+r5HD}AI2SNuj?7CgXCn>-H!JwE?m0Z6(EcwB4*LnQhAfBC)7)=R$n)!PWDgC z9G#QL_VdfQObg@)2F8%C8^>Ll1Rhq{6PjM6Qf!-zNF{ADxnZoKmG7y)2tZJ){S1Fh zA(&hH-isy6YK?lf61gE8=B**N*Vaq3kxf4_!+PJ31nR|zDM$iGK%ZZ`$uvrS*HhG7 zH|O~LXJXk4J!5oN+I^+>ls9Hr?Ep&Q@@9%XKydc?T5+^Y44K>a*h70DJSA|d>BVUq z>~xQ|b=iY;=YHhNsHVqYQz662eL8}$qa4!RkEDNuKYiUZs%UCs!vZ(_i^E}#->m|j z^5nlZSbAaCAI7k53aV8A@kwO~d^fnwCrL+#nrS;)#0nI|Gfy|0^~W+}KG4=@3zbiB zJ$&wPh!%IC`BS8)zLmO5$}w5YHIX>6h8Tqk!IdpbHKMhgJ^GI&?3a451dEnXg0Zbb$rmL)%>mna-oNP0U+djs zHq*afw`N`*qi>~fbkU3x&jAHHT(YwZN8=V_7js}oVK-YBf1CqQu%kl%Y`uUwqD~FK z$}IG;qcH%v^nkAz z{_nSq)4c0(W3RP2R8;^WTBI;`9(}f|zwKV;r6T?J=$3%l@i15RtizY*!`G8;j30ZJ zep&ZtILtD_)c_d@t3vSq1JIk%f76?P)8sk-hu&QD7rj|<4cf57*e@Pa8K7%OzYCMh~wcna>f=i1E__mp`f~tHW*)cu2MFNdzhfIeenff=pl!rfT74dhH$9v@D z1am5Yltgu-t-s)QMS1coJ&Ry|_^B{Ab+-)7ciCf7$;G4L1=UGx^`@~* z&>KShMbb>^*N8vq5#@-5=XE$;9KU-Xg)WM94A8s!s{atg!g2nQU@5U_SI2^Ed-K7KAjM?Lk%_WxX{Ds zER!7MY6Pi{%dxf`ht?!vS+(w1g#nxWeN0(lrU`*h9Y3*cUGL|jeC>N3ATQ$kz35(e z&CgTV@GL>n0_8R0=2mGexT=TGyJJ-0NwoA>We1K*_ooum6n7Bug$c*!!&smHG{brK zM6~^q+xtZoIl5K4mj~4WSqIJF>e~GVQl~cBJx7>ulV)!?`MNHQ*L34rh+sz{1cC2~ zI1AWqkz-QqT@Vd4&2Kp}ZE4YaMqv`HWJEGHqtUQyRW*)2x)q$UTG^$1c8y6P@X*00 zxSCSq8}STR9Q95BdMojQ>qL8<72;3Moo0rag{`X?^yF$vccz`axmi!XCvyfvANX>v zJ-Bxgu4oN^!4_*ddcM$53ojvue@Xq=Ytitj!0iDkgUqL(e;hvl(w_YHB6*o`fMN(7 z+Sk#QA|<6_KKP=;55oZ47sI-?S&<7MQy=g8kG5v-Ki|rqg}EQ1uKOG_JzcWDsthVr zhrffnG8tVUoWJf$Z=xNaclgyxdRHZHPpdK8nF@LDaCM>ca)NLvno6ge4HxQ5tEMG?w;PQ34LV`9OipYd%6#?|=AU5sq995 zTX)#7bc(UTpvS>Mt?csX@g!~U4+jS^n6M2o{0X-Ae`CY8i~)Z#8-NWXb-2T$0>tJP zD6ttg%ODvfHsc=G#1!s+?NJGB`GSg}31~nb(0>qs4MV2VLRJckUqR3pM4&VFAQ0*q z|8H!Vh4=rB4Ko3juVid?aQRY!9FqadS6VqFQvGcpFns)nY#rw!N66xjxpS$W0C-fM ze5>EsuuKpemiGz3qx!X(0w1BjVZ*clY#1sO8%A)44a=2CDFCYEvHlkurmaw0br^!e zY%AtSkFlbr>X4*O6Jr`YlhMJm!aE%w3galFuR@ARbSfjwz+J~gO&X?JGD5^-LzwZ% z82|NLDASS_xvY1Aj&+t9PVM#Eb9)~+(?l*gJCTTf_GFDO*A*5^&%F)OUK)9E8qv;1 z7#14o{vhxSi9@DJi4D?KNh0OR8N-HoA)6caYi01s`npyj#E=3e8)M51Bk-b~92ZH7 z`jGwofPSJG4|j{;GaZB}yUD6%smbF4Fs=t6GCyol&paF04UW-O-%UMd&>ti z%>2k3%}=p@ztP_XtC&x6+7vjWf;>DvqUAH$lsuK0<5 z@kX*>L0@8+l>3A}IRe?kF|^BYnxj}@9>9zUe$dXO^ks=hJi^-r*TPeEzQ{BMw~?4h zGhsQ6-X}=rd_}f4%2vpgRvrJ^#PDTJbNnEzA(1X6UV?a0H7{1W$K`#E$WOKZG?3W; zt%>=6yoUcF2R&mH`YG}u5y(rlRkaX3tNT+9!qJzibeVYo5HJ`%O92FVqyqORUr}zA z9)Iu%<#k>AF@NQn+90?+>fdyi7TuP;ON;W|Tn^z0;sI&Vwu47894&E3q1u>7?c8(X z?nI<5fsPZYG?}RXdQ>?+zd@5Uv!g zkYDoID#7JxUdsDNd9Or*!;FxuSioi-ja9NuYcWB(~g49_uVNqOrHyn`mJBrjTkVu>3h@X=~ecLa`nQ` zkkTR5_7Xqu8AyGf^fKzp{ONXz;m|i!Uspl$31vk+rnacJH8h^$z3&DSc)ugtZ_3^8HOmINbdQBJc=>{3Lln@#Yt<2hPvG9rgkJ zgBZmdvx^u&n^#rP;c56%k&GNT4WzV}fc*k_BCo`ep>og36!9W0@GU-8;pJpDSqa=!NKx~Byw?jqPVwVzCG z6|;A!%`!z>16@Di{co(%O89FEkxpK$r$qdQ4qC(EYI|SL`wNOXYCP~a3aqnyB+H9j z@pa~|$rLUJ+c*bc4o269$2!aA(c6cVV5R%U%^FJfiK>AQO3@>KU)sjt#C|3 zb@KWrBMXy0wt%L-t<$)B@xeZUAQ632`~8~lSG<3C3a8|~J|e_UaU89G#*qaUErV^R zMDHy6x7Wo<3=AJz0;f>mZ`_Ghm=A%n0*<`nqHY&)=14?G3wkL`(5R1S@JM>tPHYk9{=qbwC zGmjzfKRw2;2g9Q*d*nm2>r1oVdBIIz+h_-yq-Du@9vX$McKWEPkVO{8n+eJO6vCZ8y=;{RJMton)%tBeSG9jzo4AtR1lWH zgF>=-FZ$LER1d$#`h{@GAd@Es?{1P`zl?m_ESiX0B*d~Jelq<8f$KGjb5eGK&Np6x zpIn&<#H(7A9q@29-UisVObp%&=G8tw|yKKhB(g=VfML`J34MhraVC{=)y>ANY$X@y0g9^sCFl#bFm2O36;Gdo5si zB7fz_Fr*Y(Kr!&;-j(6#KB3@s*ZBDN>#Bx}WAwLU>v~b|F4>B9mII@v(r=tt+DSt) zjZk!I>gfmIh>;0eDb_=+njIR6ELsx3XIwhm;?hIdR(^8$ej+-fN>!SQ8F73vV7X-v zM+NRzu9KAW=wi-K=^!m{kpxyClzAgc4~x$>qtAH8mo#MtN7%9erFn6CxCckV2vnK{ z41)oE2VWw>Mtl1?QTKoMmG(#?t>TE9lmQDCJvqQ-1`_7a5hvs5PXKvGPTDPpe7t+t zo#~8u(ZT)+ z29dz387np4`mN@m%&G++pJ!e6j}chX1PuXDd=%x=7V+iEfTiC7Q1t__f5NQ*MD9#J zf`3I<8u&DlzI=;03GMPf0-(H50!Eb^CJ2fL(i1kQP%QI?Jt*#Q{uM9>tGPsJsxxtu zug4&*lVByzHCW9B20&-HVa<$VVCet+(OC3Kx4DZ4(aM=Jo?7`knWysehz#BA8w*8-XiLqqWVhoQyxs`IXJ(c>V+jmbW&DVf&L2~_pDVi+7(OX@ z*q`D!)sM7$5ubcjc#$LEjE&xqMmP7d$)baB5qtNl*D?M$s47S8Q(9*%cdBIKDzel- zLzur*nh*W1L`X(-cyL?mVfqN9Bm)q)+{fb%P$qtC*DLKbhf?c}^qrFv(xe zg&(;bKjnhA=4bU#`&5N;=^_&z@pkY0OySp?Rbu?gNv!=z3nws2kz#}iL@Dxac^<>G z!y<8AUUvDWsjc7seDRaNDd^kT_GnyT2{~{bvrZ2|7p6)*yX=7`(lLZVGKO513mwKC z8G}JRLlhumSiF3BdZHcjWYfJa86$Je0+)r~52FT;i8-s(#e3eBqJTN8rCWj}YtgfQ zy(gCt4};65Tssy+drAi{;AQqFlxzZx{*rGV2_o=?Q*^h+vls3pZ50F0ejyNuvJt?A zX9@2~5>Op6b2m+no{nUk=?Oz{Y(wF}w1pGtk606;&i&J;o8M@cgr1j9xCsVU0a;cd zy=O~NX+-N9XrkZ&3=n+)9<$K$Yj5StsV8M}8CP1EZzGbg-`WcDP?&c-+8169*rK); zJy{{&FQ!qVeARG_PWfumyI1`n_cWTu|0P59+bT&c^GF)HO$<`HQAu|@!*0Qk;?qPc z_QTjd58QT0!)b2QIgfDzh{N8mi43xErcoMq+T33STtEj{7+IuD`8Z zGU3zQC;*RnkTl?FWEM$tvp;+-@{t02l@9unUTOSxX6`jmWf8D4AxrR*W&K_YyQLV= zs=U9z#P(YRx__4b#^0j;B3ba3G0kJ=$DdmlG( zAAU;HV({3KCBBsZ@Le;#Z9s(e>L22(4azf_<&s|U@G#*Va~U3kIz z1)XD-_$lNoy(Nl^#8jIjQ^_jXklK;FOYGlLSQQ@ZVGF_M==q zlpfy?+~5bIZlN;JADo`M8@#}HE7~2W=fMO_oNmdpyNuTe98hRF#~S0{R zWNQK7@jDjR>>JRM9LVnze9JMuQ5GXS0FM_1oj}|9^9ixDA=r?d3ALT2`-d~nU$F@< zLuZtH*WSg)^~o>sOZg^iUx|YFdH9-&I={)3gzAcDDJx)NRVhm|(D22{?so|9JZdV1 ztgap0>oQ;SbXeHV~D7L%8h)Zg?Uo-TEK7^@03arY=-VCCTc^5_J1REiQ`|^JW+K z8lM}t5z(qMRG%E!8i#gEFyR%NgI*nEZbbwf?IqEp4ppMOf!^h^ER!sHD#X-~Q-CVp zF(0$U?!uEieg=fq8y}4nE$}hc(7PH=T}w56ZKpm}E<3E8>7dSMx>)QXp7Bqfq@7w8 zU@o*K%|-3S7jJOn=@4~Wi|FE0D^9rFcogsMRk6R{s2ow2<9(RSf9;HeO-i*c>}4KF z))8xFSd{&=M$A(U&J5Vbu%Q`s<@$HF!7!1a81y=0T#k$t6ocZuX=-11LX%$wLxQ(s zM3N^D!xWt!S#A0TGzB1%t1k(!r|+CJOsQFBK328p^&RApj&iH;Src*9Pbttjc(tox-QMY+p=)|1hL=}fN6PdHSjZ6H5pKi%lfSIV5aJ@u_CR89)+)1xHNI zbu(Gi?aiO&pPSyV^XG@g$5$(#fgHx2`Ded-)I0x4-qK1Ddiz;43wEe5dprN(MP5D< zf&sgq^57xPUbJ9X)z5BI<}0@=?^v)*Iq8Kw+A}HKRiMrtqK~?^ASCn+gO;&_)Ma%o z&vJlA|MANepv`@wnvow@t7M$E#3oOI2s?L;HH+ggS7&<)tPCU=k&}ok6O$OJI-v|u zn~3t4kAwokH2(mE;BP=!SEDEJi04<4}X$7Qyu?#w8X zM-waYtUE>h285vv%>TFGBVDtS4{s+41%yF3z8VIa3xIr#^MG#fdt}K@90oQ9mJ&f5 z15p6MrwZg_>{FzC0R*3---3^&5a5zNO8^@KtB;_~rLurax;hWa-=TqikCu)ClA+%t zfR7>mU*S?dz$ML1nQYehWAV`SSB-g5TYe#~YiV3J7R1`vZ0phrhYK>kLRo3U_i@y; zDt8#;hIQh-MSr%Fc760@xWn{pRhhM9;dG2`?wcLKpwt}cPqCw0%ie6;gi=M%k44BJ z#i1^t7DC%rvobaGI*dLP96k5F!n(p|hFxU-SP>-l` zfA_rf!S(f!Zl!U9OzsbJWv_*x|=IGgc6R;(t_Z19jz=%t0XnOX=}@vB+48o?hiv4ZbLFk#xnKq%%(dp!<+PvIOKbD@RdB?dO?O#_vkwl*;5H9ui zpMgPNP+cH*m3a=LG3@6h7dQ7`yEbPc64fI5gOwEOFJrCIQEH%-fu7_faX{kqTvh6{ z`4K+Q=Y`IEq{1xf2m76R6u5hte;~L1+_Kdm=zNi$nR)&(%D5`>k=3+sfQ66Gw^vly z!~TkwauxZnUpp#dV~beE^C-ps_3NB7A>msD_`aK1jw;*$)UaPa!EeqC zg$GuYz$rxLF{#G|g7MP4+CL7Pe`$B-`5OTBuVYsTMdT>5(%EY=h6vS1^IjxlMH)#W zve%d7#|c9rhFhi%@?@To9PI!D{_1RSEfAVy|GkPKhu;B9+SHGL%h;^r z6J72d1VmY?MJlnY5(#&bpd&RoabOvnTY;pG<^df!Cl^%qjK^ndi$|{EMtui)N-ky~ zk1*6Yk8&3rHxAnp5pLRMf<)Z_U0LM&6~XU+P9eWt@pIwwN-P3!+%p? zAy>Z@{d2{#yA(&i{wEKT5|SJqdh_I#j@#Lfi1j8~(xONkZo zyescVfgus&D+B-Y8Ts#DJ{byUl3S)KEMmngOZU;bJc(U|@Tp#R?sLrJBC^`^q18Wx zB%h4yDsC4!Q*)^(t^ny6^lvIJ=x1M9*PqekMjDTC=M}6q8ZU=cS)-S-5_5l#tB4=6 z(cNa$@&1e&;!!RN1TP9EWPzSzSJW$TP&h-fyyjMvz;OPOY9?E9?-F(_mryvJHRQSc<&; zXJ(!8z=&hMGEk(tcx6jiHSLjC)>NQQT-W-_z&p(YzwL;#7lCd@i&JucLvT{lfidyb zk5hzdM&*}7DNMhvwl9@YoCn*@qwv&dSu&8;o_!*#k$zMv#$@;mmS$MAI76Tb#g2T_ zmaIuRpeUDdzeSCtcZI};yx)|sPUKfF|J)0V@{fDb`#3?7eWz?5AR&4&L|<*#yQ)5} zin~?F>Y*Krkvx}UFkp(VbpJJUz715mPktxu7lWu8nwn$acj)6#G!D@x8JRa^1)|0) zUdVH(H{=4hPoana_Ednw%J}~>=3%oy% zGQiL&%ujiaN$T3Yn;Rs<<&qr9_TmvNY~IkU-Zmk?I|uV&;qUIBjekDma=+{xAOCSZ z9(}RLcgNHip)Vp?4vpefzj0&*OwX^`5r*(ii?J4qdg(&_kC4Hz_(C6}D9tpbD|g`@i7Njj7Ul3U6~RBVo6ZcQ3d>ATU*i=cb06 ze+?rqQQ)!3xB{o(i|B+nR@QU|)}(qM9d`B&M-atVbMZrFyDRbUrsU$27_Gme7k%Iy zD!t>PPJrRCb@0wL4OGB_bI2kOdl%YDdI+?VTCFf0ivgY=88dRLSz zFrJ@AU8{@%szO21|M~6t9laouisG>NU6lL|C`xWrxQkwNz*5*Ze18vJxP}KJDyQCC zM^UhY3m4Ezn&b$!b%l&jnk#^V$kGjAN-iFT9_*rkE?kE;f&*g8zKwr3=MI-kQ78vQ(ATjdl<(dA>8F zMA))Mje(Q!atAZ3UC_9^^aMJZu*6HbwC6hQt(9^z8Gz#_VuEXYpVAaH0F|<3-N@L0 zief8dcsP|+xQrarqsb76gjx8!teCpe%ar)MYD1XzbYwh zE<}8EmH23cPdN2kJ)#|%KtnR*-T1?u5Z*cB9X&UEJ3V3xf4;5!%CO3Xe#R)RYHyq3 zXw(TrzR$$;P9IWV6)%C*FZ0bgbo)iv&F97a4EamdrQ2JhdGu8gVZqI8R9AYE9pHT{ z5y*Vu3`6f*p0+z;yno!ch9BpM0Qaqia1p_J{9k*SA&EPzf+weB%~7`quH@$FkM`Yu zBI{<-@4;U)oRw<3tf+j8ks1q~c;^t*PfbO4vZ_0Ni$}Ha=6gr|yf0NXs+5q6A5Pif zoPWciK=RSjJs-i1C%#n_k4P|${e&LkMF~c-#iV;@*1bW}%e+O4?Y;TIetJJZ`|Vpq zQm?R*g$FM`?lOZ1u@%yVpx%yu8bh4_(h1G>e~QytT|i&^Z#FZ^CctK9=sVLPbv@Xv z3kptZkU|qjG8HQJO`{2}s8=~-&u)AQ+}q0lJR#SwBj0)8OO*TL@cK=|CG777ELIWy zKwOG=zytUafzr>CMhKFzGcBGHP&XkwFx?Ef;Rfaqj`u?Pl4kyMh8XbRZv8Xb*1%X^ zc1dY&ft~1qB=8|xIn#w)5d{MuqB*ZTOxNyoux$cf>FOA>UpgG%pZ5Qz6Pn!731xoM z3GIkrSbYi(nd1(jy3Zf~p|MEJXAA*j20&>bfYlZy`ck!~k5QpCx@KVd(OuLHpo)R zD;%;0n4r~*mjk4WF=`leNKMsiaQ^8FXTtKqJnb>Z1>meFQpKsDdMHaxKbCJ?UTk0-~& zIkVMy4&Kk4vu^dM*1 z<1za4wrpDy_ zt|5tinXVkkbdJjWOtN~q9Np`XjQbX`1z5-2k*;G$;>_O=f$DP;UKhw^j*k)mc&Ndv zP%iUcO4R`ocy)gafPB8$fFPg5gamiqB$1_eN#1Eq6m7OlNwA8>Xachwg(vGiWOhu(wOH<`l&HnHz=ZciJ_x)!G(_SAg0hBp0i z*{$GoKuOEEOWcg&_VWXa1u|9KX!u~$UxyQY2RZP)L9*j9l2PPF<7t%bog049n$?Bn>@Pv=hoFlF!-XfXoFg@ZU`T_meJcHlVEPBrH&h>1YZzEwQ?;i)szjZVJ zP0;!4+65gb&Fdl`sD#Y@?2xVTq$oAPl8NiLR*@6QQ>6%=W)Ijx(`b~Zb>HpVgTdb5F!i5!5eF-HjOSg+aJ8wjwXSnzt-TAGnV7pT{r z2+sQBm*}|5@K8KK@ygi0wi6nPrAB6s~uo$KY&yz=Ok zy3=dl<+?xC+8?LgxB1f16qC^bXgWmzRJjI(DuWd^&!87C68{e<+EOHFVj7msuUXP5 ze_INHmWe$0p{Zx=wr$b@!2u%2C+xG{rag}@i>p-w)N{z!x-DFe#lVA?2emv@N`@*r zOq2lc^p^-US@Flg3m@TH106Vc=|?Z!gAz~Cdtkd=fgQ`X5&YWZqEM$@ys2*`zpW8H-eH`5ou_ej(=o#<@hW**|vD{0ahgEI+_e zm>4z1$XsrbG9nqPE!yyP4^& zZ6!wE8cbvp77ivA2|Fk3ol*Yp%9XOqRQ@v0bUG4OxdP|n8|jwADlPjn*A~T+ekc@T zDg@_Ahn~RjR5Yvm@U|k)e(o*bg9{-NH@n&_+-8oncdfVCvA&f${H3`EiaYITal6^5(S+#k&$Lh zTt-uWr?TYy9nExChr^f~V)jBMoK@^#vv%a*hcNc@C(&=zb5JLg+#$z_o;ddMRWU9VhHYBBQ=WN_%?b{rW zZ2wSKO+u>3vjG%U3|m=I=1xv1$(=ix!1Q*`?a|VCJ2zZU2|nV`a<*h$R_NscivPBs z=Q|4ZkCKcY5togU;nc@;wNJ@a7AB;KUFe#v=OT_%s_ehXAUWq}Dx0+hK8W| z_NvvivOI(_vOQD5eLAtI{nLY?tL#|JPM}fr`)f%BQw;@yWWl};x!M`9QPi6&8E*v& zTDIVdU@?vw!O8L}(7GeJKU5iZZS>-tDKq8iFBS7|1WE2+vq#>Eh>YpU`wFL`rz0BG zX(cAe6eE3PkOTiRxcP`>T`f9(WBE*gb5P8|vTev(b}>sD<*|xA0QBhzGoT#K02@W= zY8gyQ+Zm{*L7>n0pLh2AATbO8EiXbTh2eLgxXo{HJ$n(m z;?__V_FVHA{%cTsc^kWcaZQS|< zzx=`FW7=ZKpouRWA8!?_@WF5Jm(22e4Sc1!zA{oZLfkufQU21wGHoZrww9D7@Rwuc&WAqF zG+V>8od`ohx@Vlb(;KqRrKz;j%DQ}1vD*^6skNo;c27Kyu{~G|Md-TrTc6C;mbcqY zIJHm<*7U2^pz+<8mj2uW@Y`GM5(d3meSw1dF4DlQy&J|!ZR3iBy*GOPJ5j{W%##al zWxUjUN0y}`xc$QO5c_*^U1*FEsmlv~TZ06XEw`RqgQ$}&5|PBN)RXwv?HmG3#YDe} zVe3e%!~Gmsse$25SIDn(*6{ynz;OLbUoy|%>O*@9fuO|fDLqijM;#UQglsPhK!(+2 z%so~=v$EjoqxgE`F2(;msiZ^JdKQL@IjY6+N#x>!Nk7$U8Gs}twZQDuGz?2$2Kqy9 zYO8O{*#vLA+WC^zPYh0<4u=Z(n%V>Xq1?FW{qXi-8p~+gIt>>3**2x{+0TOURw$Ic z6yJDnr`OH5Icnhf8;SgC7iMpjvakCR>VJXKu}vd1Nc?>Jju=+!(kP!EWx^*)pXR5Y zYlW+I%w=$FV@$h4zg`oj!f^`50E zL@6AnN~xS%jpE1Ke#q;u*FGe~{M7qD0z?i^%6o-*f`6S`a;OHt4!?cBvX**o`ixd` zm9!v65(mGJRwS}u;9>n`kZRWoT*%tOA#}kO~b5^_!!k8P85Qww;073 z;;3Di%J72SLzNmsWoz;tOyZ8G*esso-WoKhzWH6Ba1i+GuNX6ln-Lyndg;eh{=_hi zo`C_8gykTTuu=c`^AH1~ubzkjPuBL6$0~|cNj__j`^2-dXcJ1s>1xad^#J=|9AF=W z2QF2H_?m>hoQTqrGk`T&#G;Eu1oz~JErFqA{7F(u{(73IJk!aci{Pu;2KNe?{t@pY z1%MbPpTz>J&JNlKZ5|9tP?u7ZDjMiNPchUxt+4Ir!A>S+Q~Pcc(vQdqdV?IjQXq^PMT4OJ@;_=zdZR&W&w1- zW>$sB_n;#>JSzNb7SJiqV2jUT>%M?aS!DmFqcHL*-t@HotOY)=)1DR{gW?Rl;iP|J z9f0)l`6^+XkoC%{FF3)ht>-6Q$g#;7f{XziCLK!k)DGnRQI7a6B8L~=N?%NS{5#xP zN{NWlSDthD{4i*oJ!`!Wssnd0s5(ut{Aop;=|x`P=7*PMZDtXoAOVRj(5oCq)-tMk ztt_IR5g)-71&3uUR4wJq-0csy))7GxvVgFWsIaT`*^H-SusmM$)1)g9*vIKXuD!aj zrl8F3h;oflr)0gUZbx}!3YWs>?Yzff@LHiU?W-wsbnIkBhVVS9AvvjO)(=R`^)wH% zAYD&%=}h)BVEh;|h11kXCpV@^Z$IeC^zViWhG4L>s#-!$a=Z^xu)q+n>J^1LX`f_ zTUeW9UM3kVQjas-n$(fwf1E`B&cn>Y_BZADKdx9$Bcq<&59Yx(LO#M7t;+JRXh@c^ z>7?@z%poD^b8HVU9HRITiC0D$lykP9Y0>cOD-G5KhxC-pNBv?zsF==x`)VJ zr-aMe58*ji5ZuGm?$f{`K(I7-hSaY0beBYY&IrY#rCA4KzoX>AoHA;AlY>X`emOIm zu*>^)Pmb$Ihh*@xgXV9w_fuaY#h&M80#@);|I{_NJ~EF_iJquVy~7<>i^oFJy8mP9 zo{ATU%%~TP9Z5?s{Vv?6qw+ho)xShGl+EEbf$P?CKkq+~8IjVwYk$VJ6rsNzR>aA8 z`WwKn1MFBaCM)Bq7hi0t$c|qRdGxktKC&p;c+5?1g`X3+}`d#&$7(>cF&o0L14d^yHR+3)v9Z=n-;ZC;+fr`iG zfOss&3xp&JDuGGVNn$O}#CcngP6K>(hN*KmFciP`5e$kJ4hVrjX86-(evmB2M_36= zqP|Z1u^D0uEKc|)j8_cekrn50hQLqfp1fkg#D%W6#6Vs00uy#xm)) z5o1YY7D~A`K9hu4m5La55&yL$mEgF2;tM1%nbT?(pmbZ47&OK?MT`cejh-!cBpOTy z&yKqrEe8TetOM+kzAD8jb+u!LIM)WZP2X_>FtF{7i8 z#vL<_cHx}q0lH7~DeAG}Yt>qDrw>syyY9@xutSGl#Q5&l*<8iWs{@@^Ij1m3xB{|M1!bB=bRKzEuPYJ{!l`l znZ`$!Nl0Tx**2fi%VL6Rno38MEiT8G0mufgiHcafpBXRA_WyspomEtp`}Ve#E(t-p zLqNK_yQQSNySpR=q`M@fM5Mcs?(S}+yZd`yTx;#U*MA+Xqi+m#yoVmm@q6aH@9R>A zl9n#Bm2kFRq4sW7TaizN#P3y0y-3lV*>8z-NVv|Smg}<*FJ}jGgALq3ajR_&pfqno zlTg!&@_HwA0+ePHbQ@4?Fkmw~pc4lwMC$qd!>`&X^vZb8rE$eL?9(m=irb5%PWs(u zTZ&OxHkWn?y%475Ayq}eL2DykV}zM8D6fu!fldbt`HpUSj2^4csr1sQnFJgN;qoOVYf99TD zT4fc(eGQ(5NerX-RRRErSR%hQe1FcQ<1=u`hdX)2msu`K9$U!iP47f5M++oWhzPEm+(OoB@oy6Xtmp?>=yPC+-G^kfp-*5>SWUu3iZLK%oGwh04(eS|!T5NIJWDC7N*&wWfZA5wHx@L)%LZ=miBYT9zeS z!_Ax3o^$2MYsevjc!>1CTIfrjK=nn5bgvU2Hns+-04G$wM%TYq?e(xnocq!7z4ta= z>$B@(bhGjF&*@pVSRTW`wD(ywjVg6Y*Gxt8RWRc-@R8f`!47wuX4dk<8WL+OqmucZ zdU8gb_nW#`{&I$oYKLw(#aroe2aox7${u6nR_$YE##<4MQm{s$5_Cu>QD&TJ10xzg zaZimkT$hRR-cS!3OB18g(JSZ6^Ng6|mlnKdXsnMfm$I55h2==S1ygmg3hLc4EIOw@ z%4A*!gHQJb0Ep2h!KG_zSORLXvm}(MI%i$v2PnpF&x;{3IROM))ooiRMjeV@pY$K$ z(E$CQ6zTa(;n7b%uKXrP=YSj~DLzEEF44(T5aoLYG+4-5c2e-Xy^Z}D@ zHEBaDmxVqp5V~TQ{!ABlDo9!L9?s5We)KL&!CDV3hjQCp4m704QX`ys^?kv zaLDff&^xe4rrqOD%iilC>JOdA#aW5$GnVy0j=MgVEo0*GdMlPekGV_C;5e6C5qLL2 zf$~3^D`qQPIz5WE`tq2Mb5BE{{0~rer-attiKMpbGiOV1VMpLX(gx05pFC&5m%E91 z664qymHkvc8IU{e=eE4@5PHp(=-%e=l2eBSc>lkf(pI0feLtR*zDo4+}&%#1eW0YAA$VO7H3YJ z!{#_B{_{HOR)vx5tMh0+9h}fa;TbpZZW8jM&ELD*FaOY>I~fstMAQB?@}ks#BMX89 zk$=t74*j&Wkv%z5Kw&Q9Z5~j@pj=0lTg@C6#1}0sAMLLcB$O&Gs~2D$9-ghjQ;l50 zC>^y^>%a%7KTrUZHTSEQ-?LmD`oww(^l&;wS0*+wP1du?;u;obhB@QxitCUvgraLr zNko$iB7Hoy2IYTTe$WH?A6ka?A&%)ubQ=)%C-)ERk3?t>vTW7NrOgF%k<|^Avi%{x z9m{;-OPK&Kh`IL|U{v06OF|a$wC0t1*(%OFj7mp=iRyR8qd@}`sBm+{IQ7lDx^0vW z!^zapD_c^PzOUExijxz+0Q2wx0NbSy9QurnTL zU558Hr+3|@%Z1QA?fOarSXD3TbAu}I1aVv1ed}Sw3`>(APdCBzuQAI=7&-#ayujr-_`Rg2y2PcF|^Xv zV3ux2K>d)6W~nrr{Zl<=WhPZl=b0TO@Sf6kZGPgCq3OI|6jTqVS=NQQwZZbYkj}pL zcy;j3;Y9NT+9EUqM#yxMRB}^?qPblJ^cpMvl(5DAr!ldzL`$=`C^tJa`;hismgN{V zt=fWOZuQ~Q*z)Oa7#=4mKA4w`cah(2REUo|&-rr5Q zf0>A8``bnSKc9C1k%NZO6E2?7z0{82%hmY^W^1LHW|fJRLnfo0Yu-2zQLMG&PWd%7OctDuWKN z$<7K9>D1fF54u6jsyY}MiPj=60vcm;0PN*1Xlo&1C8hha6j`K z7ysT&i6LGw)ZfFm8+xm$Fnu)(ycu;TX+@i#$z(tkBL*TFDi~0-Z@Q}DzyC!kE_rtb zquxxO&d7Tb$91XJ(~ekZdCpu6B%)`E+X%mGEn@*x)}uzcq1X0m?*THI+YmryP4ok( ztf~YSN|AoRj1oIQJ^5osG2>|)lVXo63S<;#U4e`u4vQb+=JsD#S?|^m5>XKFG2YPSNl*D4@^n{P-{RvwMlI%td(T(my`6w1ORLMQ ztt`BJ)8ArR?ro0MmS9vjk%MO(N($MQz(Tb1Q7W|~?Z6_Y)1e$}AKiVSu!T#bt|I=) zzla~^zC8HhF8h_%Iu&wk#8MMe7ubf=8eQ1ZDyL(31wS!f@3KUHQ4VDIG^;c)k9dUC zMR%^zb>h*Y=g?C#IsbYhRgC1PFG#rLBa-hiV=O}@a@a6H8G;2c>mfL;S2f3(JfbGTrtrP+k$<;dI6Z3REj@Ce6nH58Ysj#e z0joRNiu@>!(>}bL9n4D0(}cSVrR+v;%?7W&%K(Jks6R{6a0>&l8+q?B{8`TtB2R!^ zP?6lv6(8(qvl)9)y>Xol=t?c?Es20Hsu5drp#e6Il0v`g6tT;Z=$K9AIb>-%}6BC^rTe;hpjG9As%^1o2T-Uy(I z0l=Vlp$o-Ht6qxYfswwn$LXjc47yB^`bD32?=4QF{A18M(gRFd*Ad4^0!@UM)_ro( zYezcorrQz!TE!)AnEN)K&xaBLolydK_-IDdZlC^H-cw*=*rDNX~Uy3h(9)RQy??D?%Km z&_Up^w#6VNM`pC)6uqK#xFDXULD^zi5(*;Ld-O-hUIkB)5>!-4Q56t0n}<2znPv2H z{%Fo6(7wE>daxb1gM>bZ1WcuGir$w}uv7C?0WRdqDb#nI_8~|>HoEMRJ5qo%^c0kh z?&wm?u;1Jgy2@2-^*?%ymbS~G*S)GE!9d%?HGVwwKH}Y+sIqd#${tC!-s0i22o%8C z^M*$8hu}D0fwX)X>Z%S!vDYdgIll*^?k=i5#(MfXZH{`w42%R?s|#DLP(=-~UnpBpNgDgeNO!PgC&$|*MGSF%zmI$80(c)MsDwr~DdLmh? zlm`YGSzkAtY{*o{W7do?An8I45+*6ut7_G5`Tc~ixP&duLnF<8losDQ%nR*W4gyHT z9#?FOvUHt2vjvSal^=${Zj@y{3~H073gx?^3{2Pxe$l77cMKGa)&(kKBP3b^(^`@T zdujw@268=1#)`A4lcKl=I?$cv#F! z?0%wRBQ?wR{3xOf7nh%2x}O38Cm>%zNr15DC0%_4BjHOTp=&MJ?xdLmnY5u_Cu*Hs zKwMZA^@c>CKzDyae1X1vq6C5qiw&uJg*^m-`VVNWeXq|hTPAMacX`$L?H_H<;wG7$TUetHZKVKLaLQk z-x}~c9o<~j42dGC;+|hc&W_0Gtp{`B&mK`x!!E1sHI$fTB%qUeM{yf-o(IqA<-zB* zI+Yz$+|wvt!GvzA@Gvz(H^TI*prRLGQOIV#g>u@3 z(klyqJD=jh*J^%cPzUVSj687WL%aCkl#hNB+bKh)rH9M-NT;{cC7y65c;>V=)VCv{_FMgXCF-F z9|<)qxyo+ ze1Q(%*XKRa+|P1Ha=EyP$MelzOdtBdEQZ5e&x8hURD?oPgo3Xo44}u4)N$Vr`un;k z|M0wIJD?B7gxDA>TWHm1{rm9)_Bx#1{C9XLi)S(}PxlAZ(P^IS-h>5!BlC)3-*Ucp zkZ`OAaAXfkSy}*&3}#S2WxnUmvTSsp<_xBsuJ9m8XqFDZAtuqGSeSN#9zV&HtqcCD zR`}SQYtKbgQIC`ify>PhA5|Wj4%+c3i_NR1zmW7xARO7dt!(2jCcVqgEa=2Pkn|W} z%g;D6P!E-3gPk9_6q34I-;G}lR0q=*1F)((9>_J=@Esd)4Z>yb95)i@p=d63b37*! zH%bB5U_URcc7Q>Am15U)ig6k^)@!EyKT*&cAQUvSSwZh;$TkGqq$1907%un2P4D0lgS$_fbvOiG)W0q-@L(P=H_I zka#Hz56i}N)T)3_z4@d|2^8Q-1)r8ovn;ru4arDdN}#6cV3u5MNU`0U=SEn$J(U_L zG$b*~G74Gl2PC1pKuPGPI!XToc(^YQS$tm)B)RB_8$)}(nv@fadj%ti`uO(fBFNcD zzHVcd2=0H>Do^sH3WM#MZdHz}X~glBWUyA)uCa^E-qr*` zhP7uQ$Rfq8J+7@W4Lnm1%5XZc3;oKD>Cpdbjn`G~kfau3i;e5X`4E+0VoSiQSe^iA zqmt8QzN-`U#6?2eYeN$C)C|LI&e+fpnGQyJ&M%(S#a~D1eXR|sXEM!#?+C&*r`K41 z^RUXN$9o{Ngw)aHJ`i3QR68u#!BvKDLkIlLSV~(_UoWOlw{&lH9YVA*=AKpXj`naR zUl*{dc`5`CdetU`C-u(z0NuBT$|9h<`{FZpAC--nC zwTsdpk=89;-3itjq4$NDviX98%M))wcQXSAtS19cySZoH#{R*}{>g~#{+D9$lx9UfzrIgoZZjBe;oyPTXXC+Drk&WK*g=YNu)nxKeCW`K z!$0gjNr1g)6Ic`_(R2)f=FqtHHD?kgA;Ob+ZYdk4-8G|Ygs3Av{W;%dm2;8jN)Nm+;)ls2?(15 z1=xm%IsW29(*S(v+*F6D)=~*e`rq~*jBtPt?U#vW6bkC47K$_T;Hxm>w3=|7P@2X0 zEyldHm{TYpkXRRC{{Sjz{B~oM0V-wZCbD@T8~vd@GlM7`C}>P%akoY`0h^)+=DzCN zNm>p7O0Q})Zhvm6$VxqT}S;)73H&An#<>g+Yhu@Wehyf!RDB+HG!wfAQSH2@ z^+l5jK7a9+0P?MAFMB$g7D?L6x7$u5CDPK;%aDncu?-o)l8KfKj72+R0WMXw&Gx9bpfnoL(oMf8-+g#AQhKUICzzVecR;5Jf`m z&tVXE9r?M;aby@c&FGJ3%vV)4Ho7OnYclQVl1 zU=z~m4#<&kj$dVe-kv&nMZ1P$LOcRNHxZr)rRctV#D*hnnB)rOTg=bMEW~I_M+$x< z%ozKmlrjgeo&h3LJg>q)*HR#Rb1Yl^l$gWPk^@Az;Z@dt7afIYrKa1$ynO)I=I6}ykdEandbNR|EDGTg$(pO6tU5|-T#3;KHd5*nwa`IwM zg}+H2|FGT9iD*L8Jz*m~aVQq^i~E{qA#9NVq^ffhX%NkyiS@rZLeRaOoHZa~{mMtB z=dI8)sFhIx$pJpAO3idT_)Q1^YTZ4sYkuYkt?pYBIY%oD#s75P71M4%jT_+nF^88yRgK>#eI&a;h>15Qet)uO}H#**9crJaolyE5RSpB8HbX^}pt?BIc`{BuKK@2mCl`I29OWwawD_r)XExTAZ1bYAnd z!xpDQ`blrzD4hj`ioavEmljJafk57NpolfhiRLsVZI#07T#nSam1(W@Pv21_?BnjF z)j!-|4YzEYK1?tLungOOmcSXn@4XCSu@M}5splITP~k1Z=qju5vHkV-^t+=Wg+uC1 zlTtJoUnJPw;c!;R@VpmfGD{Eo(vVrxpO>j`KkkjN6oXNkhdj!DSd#oO;%e1Sx-&Nd zdLPZ*sdqc_r54aP@sIj|>$J9{@_ut!quQW5c>{;E{6>nhpJgbVY;j*Of!n z{gp}C9I3i}g5pE^2X^=qsmTB=wDzqe0p~-}q1PxrDno09(;FX_(HG`9q#6|yxQyyV z)o@L!({S;fHn87D!;uGS)?UIOIHmk~kN zLYSecS)LyZ#=mrH536z~qKSBtciF=pIe#zeR*=?-$n6h;HK0sb_AmR26Jg>>X7KWW zxR?=L(}0@4LPsrRRax5>)xho^@rvudkMSmPWJ2e7-&W}hXzPp%K7Ra*Uh(956{i=g zmi8atJO462&GEPIu0NMQ=is^GIo}}x3lAY|)I4D`BuC}Jr6yw#$L5ugxm`YMgNG%A zY0EaPQoOL88*#pg#|2d3NDs_heM^7l;F>ZTL6JE8L9(k)msV0K{Qu zbANA+pzlULQw9P-r{{qhsp)=9p>2mp4+MqWgMT!^;vMzP6hEwIHn!WbAxDXK$oHKX zMSAj~?d0b)LMoEE#`8HTA4EFYb}ATMf{3G#e1>fw}po)c`Xg(D+Dy}Q*Kx{Vh{PvaTB?JRpWn87&iVk ziZ8e>$iF8{luA!IZX=4n_Rg5@I4a^j<+H%vx$Dd!uo^xAS00v?I8kKZ zzla2c015>uN4Y6`HVEtnTDuXfnS8Zb->aPLwXKmv< zPzJ-X0Low&%*D^Av7O(iF`x|Q^7WOI#`C9FkuvDhD_nbLiIxZS<)u;N#k416ybnt@ zM@*&K;}LP9*{$1=Fb@00J301n+%i~N+d#depE(Azwh#yw%?RZq0EYL(Q38{tAg+$e za4waM>)VK=5cp{WeT}kTVta*$BbN6tOXW^uO~(t}YtrKq3S1>#iamH%o2f#PoW5EU z39hum!A_HgbR)Y_+vOBEL$rm?+4~Cq()>NE6J0+K=01LQER9)O(A8A`@DyUA>sYBc zjI7sQq2NA-Um;eW>D`Z$Q7NXnLb__H6Ke^WU{^|`Y%7Q}_BVUAACWG>md;jDZqIUF zEw0fa#~^O-V)=vWVB`_JE5L23{kaYnljI?R0D_T$u3|(C+c`}oj?&VQy<8k&K|7dJ zXN{Al>l~YfKl_wNm}(+-7&IY^>e`e?<`R+av{eQ&({PAfcf%%A&e28T=n^`MuYu z$LY4%3J$!zUuT?eNXS`_q877Rkwc5%)rrW0a6s3F8vva3@J^!9X&aq`$N($xoRs`3 z1{J^o<-Mnm7%QHF; zP&9KlJeBWxKZbL{zZEE7Jk%0pyWLQz;d;D)TJd;+@$wpiU&7nK&AB%I(~I(eM(KX~ z-cH6(N9C_-e2yNGS9b*2-PZ+CBg)6|j9B6pClXD#E!hy$ii6wVCG_KOEG15k$KRrT zEsoN9WLI~>EfIWod7I;`-FI@gcJ3G{Ik=}-_8&pvl1XUTTbo0%5idP6zDuK@Yy6q| zykdVydg}79`|<%|D>JjBk`&M+GpM?B#R3F{q28Kd=%YO#SjV*1RTUG1?sl`;H&<4) z{JXKTNKwOdvB#aqect#9r}h2vsi>O8w}2S~q1~>q21go=rN=H*p!GwkYT$*hBd@!R z*%j}{gd>S>Eo8}S?dsgZJv0BY^r-Qpf<=;y1d0-sh5(r% zje;E0ncH~nojZrf^EX;PKdO*0ykG)Bk{$~l*>1-4yz-J&DoPQVprOg@kf5_l`7gO) z3g)cy%}RcJ)(7)nLszv^7deL*_m&SYGm{vu-y2!nYiw;iQlIIpKy(HJM`BGiuc+8aa=eypZJwqr)TGyI!2>RZdh<1_@bC&(q^D2v zJ=^Gnw&Uh_G{z4M0|Scilj9wQj=YR!@b_#e zA#Cgsy7;bsem-VKMO?BqZ4;0^m3N-E$3`+jpj(gdbrRz~B6eE{ZA3DwXoqLJ^71znM)cfebQL8A?a;vUme+6NeSTI#eQA&wHz)*5uO zfBrbj%|mc_^{&bcD4!)DV}K}TcKE+ds$uB*TV_3Vr)S>3w?#e{-&`3%+oCAYpfY~M z_9g%Z)h2I4D%192DZIeabFQe?KS16eR}2QO+E0YB2z=sVnoqYtbsz2qG$h!F!7(cUd|}YVf2DSKm**<8X?sO#&^8e1VgFJ}rc-o!kHjDr(J;PWlb)uI$xNN z;#z2H3K~r&ROT$H+MiriDyT>z#HOm7M05(ls8>`oBO~`vUWvd>HqCzfgZYc|!8_sE zS$7#rOzTdFnh6s0eMpO}?9WZP2#NbNRM=gXpXc_c3y*tU8~2rVyKb3!FE~11wt{1+ z>|M6n;p1*CuduH)X)0Ep_mlt z@4Ar~tIB`%!$0T1E7!pNQHLH6PqAn{%Om#WYoZ(+!{X9iC%c$&u&>f;%j~{QC!jNNE=1ZgSrIQglUxQzlP2N&OICbB5P@0+~`R;NmLk zvZCz>eJJ75Q`WMs5_+}nNX|PmxI-~P*A0p;>I4AIyVY-Q&h%wh*}i{YgsS+#f~_PlWpoq!W}z1}say!$-YUGh&ci6&CuJqu4jrPdHabuYwM` zd{IN#-ve${-;6s!o^Nr=^znXm_hs3fmr5TywdoEAHm;}F&XdG)jBk|+(==x9VPy1E z`g%O8fx-048)6k+>b{ij{xviL%dfLP_t2e7W(pmQ3y z&u_J=dWCz`wy_9Ety=IM4Y;Slip3s#63@cK-OS{X%EKA&k*cjHtQlmGY9l_=r)&O@ z&^HJGctus2=}!mDxOZ4%&H#N{A>i%ENT`g@UY>8wWQk+1+kZ*ut^O{dKj9|v3NPlH zTw;smFbqrvCR3$Jv(mOv$>7g3T#h$SWY!z~oZTmy=4YoU^L1$o=GF6FJ1{;AbBV2p zjLSGjwfHu?GITC?3c2Dul@gM7$@@5KRQWMxWGotCmm9akaE|L z@nHDOgiAr2NegYY2lm!30DE9i-tjhv!ag&867Iwh5CE+#gVztc|RQ*h+VcPsah zUlrtRYBD(5!Bp$0j}mHSTct+HRh&lc`tQ)XbNvfeAQM|dCj*!T>6A~#2>ZzS&Urg4 zQjT#N-(x+Xnpy&(>-y)=HOnbge4Jgsa7U2K@(U%k@_*VbF);kQ*fl-t-}usXK(GjT z@Zrt<%TdEOq0pu8b#<*;X50D@pw01Q8(T#mABxs8jdfx^Vd3BdhQmtnDX$Y)1<*bJ z3ApD!iKaE5?qYa9YBu_Cekbq|eV#y0wWo)&AL1rf@9)SB?sXAF3>G>uH(bPxWJ*my zmU$im@Sit!o)7@(?13OiN6j?_7KD~wZAo=BHdm~*qp)B9da_sMCP=5lXv)n%h zP+d0X6=(oubPUzu`cVI+^m*1Bk^*Vnf#+|yogfIzHtfGhXIOud&d%d>i~o|$1Etxj zOYUKTsZBsKKluDKsye;-+DwTD4slWQTj*2rEcCJ3qPzHVt04KGgZ^*F{KGR?dO;{k zSE>~E&k0l?A<%!+Ar|ZI}C%;jL(kwNB}YP ze}q0YsJ)`L$&p@?uXA-T|0eYLlke&cq#13>QUJcI8T-{g3w>(-=&BLb@`79akI=_v zpwC+L7F)|Fzsbhfq37A=W7>JQ-&xxHOEb%i(!8AZlQFM}VTOTXlTJe1bvsRh!dW+B zuGGDo4PSUQ$Jwy`O3d<*0FTxQd4XpeL4vT1LRzVH)Z($MU1D6HQtTZ5gZ(!z0CZ-+ zM}3;3QTIeIa*(ERuG!2G$@qq9nv`yvdEVJz7mY42uJi~7tifqmRq@=X62r0#-x=Q`3Sznvfi?6Imfn?-cgwywOJdrca17 zj-4HyMW+L^8;}fxH7JEW$q5bCc?cC{rw{0?YOMJj0$En{#~sR2w^cvJ7m^qRT5h50 zeqs-JTj=*jT7&&X-G^`QbH8h0v2AX+sg}1xG{P`>o}rxdZft$aZ{oMKRpJ6s&4}P& z8@aucLa$HTU1+5S+yCj!!|-o2)PLJ%4+5H>-}kZ)WD0=ac~!_4m; zoRBNT8lD+?tKs;PgrSQ>9w6F_>7bo;x~^|@<3Qaw{W?}#@{S!|#u(Od{S|Ka zzqBvQSU<|vXY6u+=I>y4giE&7R^dP~e60jBJa4B4>&BTy<$3x^w@P&A-c296$fuk1 z5vi{g;~J9TiOfw-)|MRE&RD~UlZ~mp>**%gs4ICkJWrEOjI0wn;pV<5XksWxbKu$i z%E_aZtsd$L*nZRj+fOmWuv45<^X~R7?SrmXx741V&NLNb&#N=34o>xay;0j*VD2>g zn;&pFIyz#=0u-W(OZG^CS*nQ#JqGn)|2$3m&GjKq29WGWh3Q%LV*<#2vd)Y)2+o3T zloS)Y_D`4e&yCxuhtu`wyMTLHn1p|7bqnxC_Qp_E=lz!AMBKM=tjf~?#!ZTTCH62i ziuRX{*5{tufb6GK$X|esZW+GPzXC1zM+Iyy_1Ly04&ZkNa3G`lf!c*~G(Vt4YAl5< zDamKEB;pW?nEZ@e5&^$+P`RvUU&!l*Km5)NRN4Vs)O+$>iVhVQzF?o{t%)65!w zZ{zLnE(U%V3d2}Jh|Ni=(ms{9;7Y@m+V%o||!C{GL@eI#ZY_h1^=iw4=X>~&y z&O6Ozh4|>0^;<9HGMn};j?ph1SFy^`yE`{%{`%ppKJlo+P<8{-s}sabE#GyI(}~@lxE?i}4Fc`E#GCEovr}TyT9pu7W(7HvE654-*T+e|>Q&x!D@g$?2Ob zI$F`m5;D@$(}|kdJ2(Qr*f@ZnmX1dDbfT7ejz+>p1~!I9bkauFCXS|r42<;uTY^ns zu+C*e2)IiXWOL0T4IwSHjfQ}#)*#*SLle-=kwk~l+&^(?-V(~uTh9n&ApzclZVihJ z-Ipw4c+DQFZ#(g*Fhs)fR64cSAuMW;eo`-S6jxl&z?htHkRXN11xI%B1`Q6HV^q;3 z+~HND?==Nlf!j`(8W0vEox!es`vHc+x{n^r-cBqaY^#KPtM`V`K9YqFhDOa({g73}G>n4GBYDVS5Uo)I@+CeH)=s@c z?(bfL^^?kYQ5Np+|CQ{@Z$`jhV5HRX(Y8_y4|(@jGIU42ou&W#g5f#Bh3;AS07v$2 zeodV2R{_GDE`GJX&V)HDusO|T-4d0}F;{5%%imW~t4h3`gbu&Ncw}Bp>VHPcvb+{J zp?c>+`t!|2wt)ZyE}nTC<% z*RtFec!)>1N!3VGx@nY6@n18;4U%|n2%kkQn3>|6kzk|*Jx1XSlK6AHBvR!}5j%*+ z7!=CsZB?G^5q78^5IjreHP5PZ#x^odH_k>+$%`m3BHZWjBTR1(|CN72D|R-a3?HpL z`JMkviR9fVH_Mu`X}Wpr;OFgp${Mrp>E_vCk^A`)CM_9LMpH;_-`c2M}sx#C#W+d32vYv_ipvIBNXdAT6!< zXc8o=czAQ|v4A;2MH@`+Y7L7W7&ODhsX`aicL=JqiK#Ax+!v)zwnA7Ezh*MgUcNg4 zXT`u5iW6)>Z!4IvrYaM*a;D;z-%XI9(}e?TLr$7A^Uw=bK$}^*&YG~9hc*zGjgMfG z^rJv86{SSn=b(L8^@aO|w688F0lkFzDFnR;m@m9^OhE@>?)%aTTk+o4&aCK^oqlhj zBau;^abx5B1Z29&$UdgEkmZ_|0&eAyMfR#b*TDKV6LTqtMSq2c8wG=O6Gk3}P=$sa z38HI9QwKKPt_ptUf(@-&NNFNHd`RhORxzLW6HoS!`E=%HFBIP=G2$d)=XI}wDJsoO zYMh}|I7fmjs`hX~C#l<9S?dllp>YQ&&IOylRMb6Ye;MlvCj6Rys4Y z{G)`o;`^71mPrb*N%utAQ1p;Nov(Cz3&bwJhi!qw6wVaks-9RoD8n!#9ZalAhZ`x=1hQjb7vW+fMWsWR7gC+Z1 zerGV#)y>WG=4emnXLHljm~m?_|$r>NjMOi0Mj&dVYIkBJn}Vt%fJf)_I9AC@@TkOif~u=twCZ@?B*$qw8)!gJv;t_$lLYb+3ElaZB{!gzY!+ zdN5i=T)?f>_h_unnmm)T;_>4@nfOFZhyC}hTyr?Uj`FV2(@?g#b?$P8|$}X zh|6qv?%RHsm0RGVy9j?4%CLF_UBmiawJ8$ICS}qOqKHGTBCiqKRl{D<(K3-=9fIz z|33ire`U<`I_(mm{!iM?0wV9*Hv;wl)9u`x9akutWzCt-m3JOHtS$`5{_7LafJ(mre?JK2CWfK;->G z0C;UliGD}wijoczyGF7Ma6&VZ8aE04;raN&ybmm*K4{3K7X{1OZfRR?)p&CrJ+o$0 z@a?MqnKf(n0dTp3E_vTYoC?!FVR!4XL!OzD;p3wQk3zpfwmAJ3lX0tsk>6F|6E0bDAfcpDv9@>y3NewB~bY zG0q!(-s7-*?`A*PI9%()jGc7;zWCmCw-x2lvTTeev@_1uZjtX)4_9Up=&^I zWaZX0uJ`E5jwi{^4p$iAj#JpeA~qbZjmh}76wewfpVSod`dAA8CWl9MD?Fgm^VJVm zX{C=%B5j?A9`y0hiZ^)Dkd0dyBHPP&Ry)`#zEO^ZSG_ZE0Q35%*7?inTnkS~g$bfD z|5DGmQV{d{E5N*lZ1ahGGf z|3sWVkSa`oF?+&9LG)Mw_7B{-|Bg8Iy`vi!{RkD7ET{%gd1^OGRr!~Qart|V4fkzY zMv2Lhj`Qx;@*i&L2=0bx6tXI=`wRWBWgNgQePxX>RTBnV-8hQ51WGt9-?MA`k%YEh z9xVb1r$1QNx)Pkn)`~fHI$g)ri^x&?!Q-^ukzVUp&HL#`aq{#|&{8)-HG3mRf7w5P zWw@qj<*x_8{$c&6{i7dLtmV1_WJ8#}?ae*#h?wtwZ3VMb>UUzgcMGw0GPIf>$i#VPcW?_h;}W<^z@x?GBKup!X&W@yGi*A^7SGk z!mTPmh@_W{T1WT$NTbW~r~Jb)l^<9|Nd>;9tE&OPv~#}k{!8Src4~gVM^IYkK`JnU z{*r%?0rC$S&qX3w;Ob!I5m3m$1CUH^@0@KDB z(e$|%KBoy7K#}gM&Tarq3q-mBFm3hbMvllO1ly!O*U!muQXoz6V`GA6jUFif0|_UR zk#F_L&$#R72&MN370(+A3s9WkNjr8|l?Hw?^2!ZkU|sfGF53Q=i!Dl`OWV&m6Z>U% zF`JL2Rg;0ZI1VI%OC<&~AG%qmCik@t+-Zjc30edR30FZEUn;*#81l@+6@f$wDw>PV+=X2WA;2e1DuXOG$zBRmSWUEG935s!9_=*(w+q>MH8|16fPE5IiK#TY^}-`W?KT%` z57rH`c<~6g&l*u5?GJ+!&?*n}$mF|CZSu&v6l~;)2u>Hfc6i7Mgs2=C7Dc7F4Reul z$UqeA67<<_GYQY~7;>t*F3D86fy2AI%puKnQd+<21r%Nk^5-4ZFVJO9qNm5@y}Nx( zr2XsX7!%O7b@Gjk0!T>*OhZQml9K9bRr~rIBaND5q#e1a#Jqt~wF&}M0Udhob-jn` zJ~GQOVQ4%AWF#V?QGTa;h>UG)ZvuccldZJqdoEihR)qx|mN>Y{Maux3RJliI))>!Q z1WUuq>7+U&e(AgHxohO4V3x;^`Mh@dYyEOhFE3M*zyIUx`F9H`2FAaY`g|h*wJ6{8qret#Zt-K2*bgiNI_OryL_5(y(MY!S)yXsJn#wHa3GU z^a@}}@BK$RwAdRAGQi##hCNH|U4GeMcSC@qVz-lSyJ1}qMy`|9(qkb!9X{!=n!N?_ zumivy#y;oEtab@uwcE|0M7{5b?mIDvyyr#RrOXZU%SRj7l*60M&jX{ry(M)Y+PqHG z--vrY!BuLR&+daxaQ(kea0$-93C`l)mg0U58ewuvDw4&fb2oH1C^r}43{Tj6KGRLi z8P;xc{e2bBph47?y^)V(I7?WG7(eKZ(8EA4-8z@2{aUDN=5{={2=Ig(vt zjsf;lBT#@~PY)V48(@wgcg(I)caJlIDs2iWwAtgQTz^#BOo-&T0Op9>268OW=La!I zmS?Nd$~J;S%24X4^=&NE>Wm5@tE2$K*#`hj`$G(1j(`kjZlRLVOqGSDY>Eq92yH9}5ko_NBzV2)nUbD5Lg|WFQ=nnDn1M|6k4_NtBe8Kl=P`pyak@gP0~L zxgE6fI~?%g9%zzONrug-{hXxIDF$+tN4E|#Kcpt9mAHn+X=k=iQilcv2mi$u0GXI+CJPMVM4DB3g5j3`^3*0(%+H@b5IWREo1R){e2|W0Jzs zePV)E3-doj3hnnVRF9md4HqRuzbClJ?JXr!U(nR*vEkY7$A!Lk+XeHKm^-+1CDUg05t$mGKTbVJl&pzSxg5DBsb`Qu(D8=xC% zCjoRr(di#IvOhwAw%-!d->hG}b`%wB7-e9fIT7a(>%4Z>#=w|7tIF6Dz7 zwzj^a$A)L2hGDaVBfv*E8aJ?od+Pw6r(2$ZZ>UG%3iq`o8LS?v>Bg~M|G z%>Zx$F9yw}Jv#0%n=UHX|Hs%lx97dB?Yc>$#{*7^u>pD*g7s6?Yr5}O?KO(t9Mu>zwCvif>8&Ab9DUa06 zO^eACd+Rx432$)Nb8PpHLY{Bjv4KK~Oj%C>e^Uz~t7&BMnaKH5{>$OkQ-1m>tW$pM zA2PZ2g59jHY#jt{I3;@MyZ%08B`MDa#^xX4d%hPr^MK$O^Z@x&>|8LTT|6Y?4Y8)D z{q3mwXZJJ)`u_(8006puKPG|jfQSL_u!h+1!)oi;4`J^mtiu)e z7E;(j693^`YBNmP!>au+N60kkNST>QCz8>`(gTz3X85Vh2hZ+&pQO}5R9-{)1tM~msueCetF_aJx&5q@k) zZo>8et{ZmPwbE}TNZG#}X|IpO-s30tjfmGufClb^Qk%B>;?|!Au6x6R>1~o7$P|>t zBRw(zE%{$LaL$m~20_91afM=6w3fMN@@HJVH*lu`q08ieKMmZDIEw#i;Ld;ZnZY}h z{9pKft_J9U*RneRzJE7n8~3kM5?aE|0ZINZM*pONKc^&vtU#`l&S8;#c|n1s9)PcU zk;`X%()ll6bxnv@mD8R|73vJF8-OiY-9D=b@Kw7JymjS1wqTi>a zB|rtY;japA+F?{D7VtYk24RRv{O*&o8@1W_WBHd;j0@L*-vum z6!_hD8pSGHb-|LcWHQF7isCt%_+Uu16Y~C!n;(G?paD*Gmo&P2thq_0VonpcfwT>XXsk;%n3seW~REmpVoC$9KVI>IYL#=DS+?a_vKs{HYl zTn50YiPqDEx&N>1_aScN@9cLDLsmY6Av%Bxa07Ow^F z86E5oJhS%sCZHutu;m~I9i&NIP+<)McJbn;9Pa=Y;Kwtl7xu%GVPE!4kA7`0sJ2f} zPtAz_d(ZVzRLdDA0mP}GZs#$5cGPHhA@)8{i2zdx@I(&fIe!V`1Ks$HF1|B+Nd_GM zz``JC!R0v~A`_CX_dT58NkP}&4yJ#I24MX!#J{8s7RP%f_W(|f3Se)9@KpQW+PM~X zV>KmcIRF47W!|3sK?7K0Bb$C94)_*J9u^&)P8arA@Ncuo`LK=8)s2z!n?vF2J=7nw z$Z2mbmYak4Nz@xR#`ax*lPUC%^I9gb>Nd`WntxYR5dKu)-0tA0WRZ3^>Y=1L&Lvz7 z-zzGBPVSdhyA2^iScTp{6}W-8OH`@E4dvHAjDP(~S^a$gLXuV{dOl>18qmshpi0Bb zHj`4sam%0qv~rvA_~!!iZ>s2yNMO;;NB0pdrovcISzsMxaim<}%dLV@aTZB>``*I@ z>|^|E;luB(T)(NspE1>!c7=b^1ReN&@qmts@;gH^Q?$LrXSNVndp>vMT`eLF;b{XA zz%&0JaVEGCD1cf7*vtja8CK{O=gNUCH&+u; zcxZg`k%QRyJYT(=- zh0D}&yI2C#xFA1Ql#9H)Nz4{Mi&yKyV46aD8-HtR@Q#%GOoHC2^1Wxa#Em`zyyqSR z`eWNZ7~W&%dQgQOG(b!w+JQded*Ha$0SSmNO|oPHy~mdVOjjhC-{VUVj#dZ2Q+$k{ zm-3_3iQLF0OkWsUT`3JtI6BgRTwfW%`6r$^3+^`YV~#;#fj?!Q-sYQsyNoY+f_cs> zONh3weg(h(@H|8a0gWuHx>$lfY@%M<&4&El2Ud1DbIZ*@HgCa`$~=pWan! zu^mnam=t#X_5fRB!iuCs`X(R4*B0!$Y^c0m1atbPX}VS(HzulIJ2j)giU_(SB9~vz zQQSV(pkjn>Uw%SZKT;yr;X(L={ewlnlx4ri{4# zrmQ#ke%Us5ir1ijpKBxRSEhDUbv3xuO?PpaEMEJ^qNi`We>ZfP{uu}0|3XFrbVh)! z^~C$u`W=b{g9khcP2Y&$4zstB&zZavqv*|>hnj4DH4O^}p_d1xoI@Vgnu&6w4cJ*{ z0W6IZMcZt+FJlwQi%;7!UjLprk;PaT&3Vp+KDrSX;09XEK{^j<_gKRVT}c>`Ur?{P z#te6YT_M*}P#WG&{#SZZ=aJ{;1d6c

N z)I$kRsVs?;c9!;>`L&9bz=q3jUn~FvK+X@q0K5Yu8PvhZucjm=S{u8}9x_~qn|c); zk89tdwXE(qDj`FNmL=9PV^=QDRwiXc`~SMU_*Jm^MV&JvRsVdn?ZHMWXUL7|=i| z{`pX^Mt2JRw3jQvi~KZ{Y*!l%D}Cff8G@^YNx{N>oNd_1Yh|^{IncXu(273irD{TV zpw2;TUA_%7qxpWY^ky7GyPnoI>5f#V(5M#fIlA51L=K=DC#bR$cONX7A*|PA51oA z8EnI;#{YCL79Jwp-4OvdX+BWs6%7{#8ID6%>d34A=~*%WYrrbRNKgimT?Rp{f@Lt( z4z`1OqgYF~kpLyDPPbDI4j%=8veoFjdK!q8@B~gIlWPW33SnA~ii(hE22&*WZ$S2D zN)ceFdGt24A<+(?7+1TMbni|O1rW850f!@6ut-Os0(JqwMkyJmAlPo$an-T?{)Ld* zPU|zl7F`Qg_3iX(NMLfBQ$>yO9dS70T7W=Up6AXIr#wU)*uJVfL_wkl5)a%!BeKzU zzDIo73a6adWWvFm2T~7s#R&^#BawaVabY7-xW-z52tJe-9wx>M0Ne*=3o7Qu%H1D? zN1qt1Q%K13a)G3rm{#?-L+YR50T>wm>uGH)>Nl(efCrE#QJ8^)zn9a~{N5=17aibV zaVKidhFT^J?v2>+F`JU@_G zBQNfGm;lhVP2W?NRJ@!9^ocJ1exQ+G5U#mk0IzEo$bd^*PzP*B?FBOvtd627zzFbb zbh^NFySlB%46tPS)83W!`3g(TvLk|Sv!{Z2`;tNN2Or#H@4Aywmn|r)`^&QB zj>WqIlzy3CQS*swep!}*jzmL4Q|(MAp;A+L;ao07feug^QwUqq!!P80|}S7#i0S#}=PuLhtTgy!!-vjR^oK26|@C@u_H$ z3TUCyZ3p18K8pQX2VesLqE7EGYJjK{V;tG09gXC$ablHdVf(P zd}jl2>%3>Ye~C-sl8~B`;}Nam)@8%!$H`K+PBU3`){gb$tY0BXH#)HVE9e^Il6OL50{Tu2E$e!xX2`@=f{GgyHkuoh zIX(R*O^o}f~|o`)bl!i z&0$O0rh7HM*_rg#nca22>-5(1J9+M+(x2-S+HF6(f`m`?Wi6nA%1OnLg5=P2%!S?d zv{(8pY+rpkwMl&-QXc{663WXTv8Y1{Ix{sQRn z<|bmI!UQ)LLeFC=na@v7$r7E9P(GC0`w5%Fgr@i(i8Qt zzT-%aZ2Qf*L6S7PD=>FY8nBy9H)9KkLU$5Xf@drs` z0a`P+^^>e5I#cRBfhHcLrUQ( zt;n|`&_BE6ahX6S`@ri8`4xX&2zwpd>kwDbFU896al8qVxIw*LGXlq2@ooWf$IxJl zO#4Bj#XqVXERC;aDm!tGtKSdio3l=x65<~vr3H;uXblL~RcKmxcYQm#&10} zXqUj;fwLOV?zeH7JG;HQ;4}Y_%qS}364R!? zgyYjDeIo;)lBmJRYCkb7C464wlb)8)su1$L{{>~$+4i^3{LKH18$i$TUwWkfIt*0} zW&=cRe-1-ZaeuPkk`nsVWX_DW7|7cADGXdm0fRJN+-VDZ7bN)w?*bX| zh>Dwimi|8Lu}L8sSlE4(63B(!8J@jeCm@hC28#p6pz~HS3EQQBZ{B6RQ!{8#<+Y_ea{$U#qx28v-;H6p?PHn( zx(i=$5Y4&22LZ5EVv5zdUA`(TH)B%QzCpOoh7?_xJl4D`aqEtH91=+fCI}j26pW!2 z>5cbsO|UqtZ;)q(C?d$bG6m+>^~ULt;PSJmc^D@f5T1Ug4Yvl;C?zd#t|DtGMj;Q2 zh0<6Xel1qn$7Dl0C=q7R!lc3a8%50`ZmZ3_9_R*qE#+h(FxQIl@G-usSj}WwOlZ36 z+`V*EjFGTz>2pI0V{vI~I`>IPA(TOH`W4$1_5BwGRkd@p^f8{%m-4{I1Dgzllv1)S z2dyhYRIsfUHgWW$dFmlLaTt1BKoFoYLM*3Uk&Yrw|KomgJmiIFoYX>Z#4lsK#?%*7-%7wL6H;esN@~Avd zFD&>T&|45Gn>BK&yqs5MlYBwJ7|T5p{FqDUIlvrh5_>$Y)E zAV!N`jz1g_-HC~A=-&`{ndA}ejGhjtw|O1l0s`R}$(O`9(Q&Z$0E)?E75Hbz07p4K zDC-k$ns!h2qoV3e_bey2Z{T)Ac@cQm*?E)Ya3of@4VBdO_b=ORx0`2p%06D@m7mvp zc$!*$bxrV^E?;sdpB)5hTOG^hzuDm9Ntv&54vMCDT>FsV)xI5!8hp^l%o-ytP%2h> zBPMQ6p^EL0yLbrp0SXB()&0BU5A#361JJYm*FYMvUj7UZFh|~hG#PXZm`Il_n~K1vo5V#4vUR4)5d4_15_EN-|`oLGUW-7;!6SAluv{WdMMZ1T3x5X~gq$^8vY|!t%%R_Z<@65b_zbh*C$w z6`+K>J^FUo`l#~n007dz0stTXCIFBrQn>4~MIsoQywW})km(HAS`WkuN+s#F9s;)3 zZyDOl7yuzQ`fnk2|J*l+{=Z7NeUEavEof(Zk>sWlv5iH@@3|w7pPP2VIS5*N25E7w z6e)hhzrosBy}DlwlIqE~6xiGjvK@D|1O0=Fg zwz>EYBK#OR;IE}lE(7E)5tnrIkggM=LI<*utWKZu-|uK12JE1Ozk1hE zesnn5KuvSvR?D+{vk;4dW7ro5u68PzZe zx=s=mtnd5Vi0(a2z3S6l<=$|;%XZ>zJ#n1W%^;HLvP&|sA)g&SB{V@SwVe0!g@(t@ z-XVD$&5+0m^w;Q4<0Py=N(}y`5-Dc-{uRKjwOF^yeEme}wy6whCmtA5>6i#?drC=C zsbkjTS_&NANQq{o<5e0*vNra_w)ntI{`4t32E;S%qJz1*aph5#4+( zbzWmfjLtc(Cou;dZk#@eXAMFl?$L|ppEUI5RnQ4lRCKzygN`*CQ;O_I^ZJE$Yq_;! zGP*kVZ->wS>Z1IA>Lv{I|22I66?%M!`fJsF0PL^-1@&)O&3vc&KfDmsFO-Zq=SK2_ z(YHX&lEflE2q{#S1Xl)Nl|45R_&zUfo(pHbCLCQIzb;$f-@sv~vkZ~4{cggM$@HAw zPlVTd+t7$w{2J2`a@)HctwQ0q5C-`n6|k~P_{~2)r0aHlRac)&IwF7#JJk+enkTG| zW~qs80#JlQS0mXH4%@K@Z$1mZR#V9GFGtMTjn0^_BFrBp<8j9>YEcg*{+b2dR{)DPix$GD@k+m0AS`MO7ef5pK!- z;Fh_=uM{@&Qd^;s&UeTIjGwdC%_BX1UwY4q$lcxkuxkYC!I>Zg;0IY#5|v zMqd-~qA%RITd6YC3^1=*I-p8H%$)II9X51QoQ7fmUi3`|AL@0)_i-0JE!iKOf0Vl| zR#7p|Uq9VD)GyI2g()`poL10Wx_vgIR?wlSS6gXU3gNY8`7!Ifrs_fV8Z~!OS$h^y zJa<4{U@m=?=cKl@UfWNz;zU)SW+s!IQindsx(vXQEU|^IY@&{HUz?`qtCyPv8ctN1 zN8W;Tso{-Ftad}K7PHSw$aD>gN^wKXX)o*PZ~On$O7c$FTh;4gsv`Z2>k(A7r%o$u zmApsA1aD`PVVNQ64gNDR24fK=??(5z@j}A|!Kp6iz6+i%6kbtpL+e-E534e9Ci1 zHd%D3LRz$$@J`I=^bXAMO{7r8=8dY({TLv6~Jfy+lh$iJJn709aQ4Y=q|tz_T-HWP>%@9{sxu& z8WR2W={KlkIe^tMFq1wTsP$Gv)P^@R%kYCmk#BM|g!(?K&zIs__zQ;TKtkP3I^>s; z9{rNJg69I)b6amk)So?V&o{8%M3qPkW#?%>G1K^%KMkz2OBh0xOU$wnN07Jt3Qo9l z!2M$I=`@e)Z32!V_l-941(X(g45~J~8Ubkr1Q5|sM9T7hfW4|4%Ky93#P-jEMyxFV z`JS&KY4f|Jt2&BTMH%Z3><0(B1nR!b+L#00Q3C*Md;D6bE1nl?V8b0?3PqxJj=VS! zzI+l3i(~S{n!*2-g^4}s!*Sd`y-fD#$>H{T$^QI|1uGGTAApIQRpiuXLkb=J)Pb8< zr%4f+tbms%Bqi(3R#o7qFb!Wf1AUzrT|n!aV^;P0bm5}Gg-rvig06}Ro@#c>tWmJo zBz;z;SqY7fyE!1A%404%VTHLGy~9R!1(9lWH&*1u2}%FU;^UE9ThuCX?h{9wIW}G# z;CO_}sin?-bGb>ac`PxjfabM3Kd`xs-}aI1c_352o-ev*o?nyBbZqHz;(Y&{ zqq)NDha`oc3Jlf$fjSqoM#Vf8#KAYi4zK||CbiVm2hiqqO=q(!W`EQyzm~jDGx;v% zXbQDpeg3f9(5&Bv<}koeaXUm!u?!+vNimLMySp3v_mcJ_l<5KOZS?OTN2Ika29CM- z+h0Fr3hf|F2`a*67gyiXW62D-87k@}q-$Z3mcmgSHuzmIvb(E)!N{ul#sMcJw&NZc zB5fI)LJBEax!lN+SBIK~t-8q|6J4#glkAGQkNUPtUcA_ob;C-+&t9krCZQh#?c%V;Pvx_C9^^4|l>2}n&6vU9b5uprv z!0lr>!Q1pYL)9WknZ#?C#i0tC2V`T+PSY?a5Io_AOicJ((pj@-x=0CB4CqC!o}oA& z6JOxrd{E-Tb@p-Wi)t(MPoAFc*PeEyjMpUJ@l=iME@rT#q zLdPN?{2}g^OS)2+j$tUlW&y)9z@uKZQ02X;5xr<`;FtSo9AD5A7H0#(BLp8cl|Q zPbmgN7*7l~o^r?1@M~!l3pN#9?V1gGaLZ5&4#N5_6t!4oYF7Q1ecftg%uYjGYH3E< z&g9H8ewdXKOMss`R9cp`y;0a>DjIi*X;t<0G`qV^az0gfHI+&knC2s)YHpZrj$Hp1 zFyjLQo{^Fi5Ki%`ROtU@y2L1Nsyt$|Cl${_YL`s^Qz1!RQso5jH*#ow2Jd+4$jnS4 zJ~qpR=Zxi9)i>;kUlJGCYakC=FGzjKdl1MF zeC-waQI9*MIstz(*60iR)TYY)oK-c>8O4=wuUsTeF9W9RAlD1O2hr)K18CGhV9PkL z0PSJ3{UpZ_8OI}d*X`KX9?rg+zI@nT_=GFD9WM{4iB)@?iR6+XVh{ek;b*CYw16U2 zu2YQAZVr}BY`KO<*N44+h>kvBcoJ&J`Q z14y(=O=}!X zS28%8*#tB^6wO#(WxCGtxj}nbLR?DfLg>8lJWxc(Yzj{Bq6_HVKY|6IseJ1zscBv~ znK@qQ^PpTjjnFRTBQHgxJ22L7R&6wTn6(yJXIa+!s@Nn(!H(9G5q4v1iQ2ZVl`v%# zjvUVK+t+74*erH3V=1nE9c6Ek-w@r74So6e;RvQ^39vWGxU1t z2#rKkyvjl>huEHd9h$?_^qw)q?}?WI{rt_-_2IaZ=YGAAZGi4$E!gP!dM7(H6{$R2 z7I-m?1FQBc(=&%BwznIu_p3CFKhr=4dgk2)sGk%hcBYFDw;io6JK8H*V>(gUoA;~N zhc{q|{gJR}^6}{1uPzw9~Xw8=G=%*XV#7mb=7Va}2J{K>Z=`1RY zEa-jzHQ2t_M=2IXg<>tH%@mQM!z9GDavb1z1(K;^wGtc@D`#=Fqn~%}rfK23QlPtU z7uo5rPZWD+htE^@Tf6)Sc^{?guj&)qSv7SBkvW}Qws$;=a{lIs(<+fbo~ zeCH%zbj87(&ZmQA*vWwwoD9TvSMcXl?!7jJ&&v4#CccqQh*b2Um$bZD59!w@7zUE{ zDNYHfzKYI|mplGe6u(Gk+m%K+zF8sVI?wW$^J;a7SoM&qXqLE2PYfkf)vYEdSztAo z)Ro)9?BI7jQ`N$a`^BUa9en;J2F5nrLOK>(kT*`z#NAKKiMI+AaklX>g?vAJP#RL5 z0|Wig@PWr8R|9TnjeiX8dTUlp-c|fFZx2<-u`s`4YE$RL!6+33Y_3hr+?Ng|9WV?R zxeG$=_}60L;dW-MMv>H1ES+u`hr1dquanK^f)n2|V-0~>5JXl1_;D)Y>HrK*0)b^v zbt3)%=n2-y`X=+Ob>4ZW8m2^`S{Pvp`hP(iwq1p zzG$>V6GeY@y!%+>F#agoR;AeeqP9FanMhg+bD)2Z8;z_2a&pi&{h_C`1xvqeC0X17 zCa0h&b!rjzV2v+26UNXI$Jm4>sbVZ~Uzt8#Dx)lCN4OzJ=ynjliQc=&#n+O0+N6C% zpOQV(41ST7P*0(G=nTBNabR85{s-`r;{wl&0C@)WsKnlk6lwvnpv7m=vPN}XA_)U8 zcDseo**7?w(5-@Lqw)&OJonZS6Og3kndHyyV-Q%e=0t7eQU?eDZ>ErV29cdKiYm_7 z(kq63<>-sRyGNjY)8&F;fcN_Dtpc1Mz?20v&bSz>#*UHX^;6o+H?~Iy2U9Pnrcvvv z15lVL)m#2w)~x1c4A<3uI{mz|zgjc3c0L*^ww;dZm)gW?z&%P~X^fB{2(~Rg$uWS~ zR(J}UF9WLApHaE>HTpD7&TXJz?YOGI?*$`8xbnAIoE3j{Y@o? z+7_L0A+AZ5Le!8l+#U@1m3~Mt7eVkicS6Z1I7l5|^oG-ohLK-`QyRc0XE%p-myCHzEZfS(YekQ7 z3CjCPV9{$4BmIMR>eKqn=??YBfQ;_(U+k>tp@j|^a-g36RlRISy=@#))ZvlOMdHuyObtPXr7&vna2dP zvZ{L|I}3L@rL7t=O|TS%gU$V9q8gEcAao%#9;%SE-B{gRhS%{a{tuK=QkSm773TKa zSx;h+YwhgA4U>mV`S}>LFgneZjc%S}=Pb-KOl}XcBKU7phcax<(wov#_1$F0&g0}B z=19ry5?h%+98-Ak0xd++tg0gm3N>7YBPHs6;(@spC*t=X7SFrRDqh^LH@4T^D9pyo z#+mfpOcVCax?O#c=7GqG6Mt>5wsjGKukWicRlIptBa{}nHXK1X+1hc+F0NE#@y^S9 zy)^?XoS_{9ipm0tPUO-$C(n?~1dk)J^)Uh6nF-29@=_RwA3^_etIacvxmTC6z<#Q6 zXf8}0q)&S=l%!9dKfhs-FH4g#W{RRg-hcBc7azr_lOQEM$H|nq=$irFo)yU>A2*&a zt_2os+nd*oufB>}C9XkAeZ$P!+o0B3FBP88BOcCXNc`V^+x}VHnt}em7)pTTqv#(U zWI;D!c>M=|STMwo%^XuSgZ$x%lAcv`4=*wG*QCWP1}0k&=%dUnY1(~+c**m#j9HOP z_&(!82|n}#vi5g6QM`2HXU=;AS&Qsd7&T0-wbj0R;%6LbtH17GKHz>>LBRjO#{~or zd{2DI^r7$suT^(cmh)rMNJ&RK9&HEni(5%n4$KakWDL?xP8`p$I&25pjXNrbU}E;5 zXF|ZTmj~|njn2fW+`!k|Lu{$mU(~}a3OZ^?wb(k$A*4Aufw?5mIr)oejf^A?Y}%xg z&4jt+4?zksUxez^KhNZcl@ShEKYcBRXh3&zog`=~#`lm%$E1(LkGGY-D%o`R^ zZ+m)OTtH?>?aH{9mLoNfffOU7)8p3&f9ZkHyt&~j=q5a z2L;wsyilcA+urP7c*rGOI%$sZqeiIRolKr&htt#laSNk%QR=pumC%cvE5^M~QB}r@ zy~F_5@0+oNb|;NB$G26z&?2UZHpqA$1H>(wYBJIWoVLQ=L|e4EQ*00*@680J5?{gY zWWL#ErXYo??}`%+DfQ#DeyxXwN+8L-ABsxiWQEIkkuTiRc3d;;)VP1vqo3f4d|UKg=0AX?t?XkTlEPddRNmZmVSHhYCu8T|$ymag87jH=g=+*&JV*UFtaB;i9@< z<`MMM;kl>GCkbnCt=guiJQlgkz5J+GB_~I(WS-(N^vW?j%3~#i!^+(GSV@@XpDC75 z*S5|6<|kB+juK>2s#62TCsM)AV>L;YN87W52+~}U$r(SJEfsC!zD+Y57@KA7#5)DD zrb!NJO@k6riV*o4HfbnH~+XV(ATx?8Hb%w_cTLQJv z2-`n!UHh4djl`Q~Tmb?{pq6ahb(Dj0D|lwv?O2L&k|pdDQF~_@Uro8#k%3yG*LPv+b!3y^P3O7Xw=S9NQpG?0!LhTO3G~F>20b-a>Z%w)# zz(}->#l*wTga|Hvi$Ui&#cfPnj)aDri9t~#T~nJOFe&8H9IH^%RXD#R(qDgW)F3dX z__Ne75QEzfrUz@R24fcIQrkG;WgC;pebI$z`zuCq@BwqsFQ17R_1maZ`@*?)8qX)0 z6RR_JVkr@*p5XM6yl3YisdYd6p3O*nymb6Pnlf1?=Yt#%kRj^jfDPPCd=6KFh(%5T zv{e$Zs3{4n4pROoB}W?1P$5=0U8Hh3!yHTO zW*fmT_h#%HYSr7KJ8zkYU5MJ&m>1^_X3vk(+rw};rl*3Vp$N zuR#9DWvqWUn;8FDDx3bl1CP=+%kZxuPw@iWKZjmApP7tB@O^4S5pqOz$W;?g;A zT%=k zok`vUrP9>^lt}Q?Yb3*5_(GZyXLZ z?*^$n2L93mY3@@GaZXVLe@#{q`wcy;8~;)&u03;hO>L9$G0e#}aXdGyL;gm~&d32l z3qgR@i1}ympv%iXHmwxQJUe#{I1+ijHJnFYNxDQxDJbFagWWjx&v@ruXwBw0Gb%

zGa8ZE$#clOrf0iU&?FCmz*O(*oApi$?M~Ikuv>%hfT`~JP)ZxrIHQjWWvn`iw#6(_ zhjzetuGi}E!`Zcrt5f<##%ulD8l>c~YS>9p%*2$$#xX*^czJJ{ijF1~gNQWkc+C}z zk6&Avj*c$Z$CchI$SpHDP1=G$hfWfRX|IQHzK9>$>bvlo_HC0MR$A`THy}M$c$Gw% z+K_`a319gk4<{Fq4VO3SLY-x}LTwjKN3u1y3;M3y2w9xcr%XkAw#x)fdS^7J8=laa zAAdkaTbV1K8_8GdpSimh^NcjDRwzXABr&YGM0&~SsoOF;L8fKQ3R>MjFL#r2)$P4u zvqU^kkw2I*^r|z|kxd8C5d>`_GB~0UwD3V+r0O3CZaDT(x2~O{4U8OkOWdTfwv$<5 zKl^l6&2&1H3)kb5+DAlMUXJ)Z_bPLWO!Tb=cbMKuSpV(l_-9vkMyCJVI;#VYH2@s; zdl)fC9g0owyPz*SpS8#y>W-ee0_{Z?z;a#ERCI?+u`RWQf6m-8bV{gOUP+!t2Nn_U zqenQL#gxS}av<95t+~>Ho<=Bg6)Zjk_Q9b_s>_oVxi&vx`QGKK_Cc@RhxKgD$(d-0V1u7+ znP=LfqAutsnpzvNZqY??d5Ddo&tLguQRI-V5U@*8Kooaw1Ia2I;Q9Sa%GYM`sa+Bt z@DBrT%dTuclTwS6J2+BE!jz1)Neq#GLoc2)7Af%qs#^3=noZ{rYQVOim#{oEVrsvZ z{Go{bgnuf)H;8T9oLRhFgZz?}=eSbgDFy!FoPG2VcDekKK0 zyGIt;I5L^B4^+|V_pM{}uzo|^BSgmzE55eke-f*oYL6mqW23k25-3bJa zG+#V{JPPF))9D}@Wd18(RC1-r6N@e7RFA|qX&y@vRU8lO9O@Zjm3wnW7NbsnKndr`hx+IXO()APIaSPw?yLQUb=0Ex+QI1f5_&1n&R zEnMbdaTliLuE$xCQ$Jst|CU2}0>#{KZulRWI6Zoq;KD?BVpYlQTq@h!C+Nvx$a9pi!qvA6O3fnuLC41xJj7xDs4M3?Ki>%r=ts^cn0$ znJOp|Pso`Q^lY&k5T}ZM^RX+n)fH*C8aZD=dVZtnA)*oFra7*M)>}*yv{k_QKAkVL zV``j6E6g|&s^F`Z^&pKEM6Kyv?wyUnhsXdF1v6>v4D)?mzTxsjrWM~bV1%v#%5I4k zV)PXcYh(-|kepwPYtWB6|CJNkY&anccVE);{!})F#?j$#$KyZCY6I|O$3QPTbpTjkEh=!1an`FUVX+o$@Z zxa`TIm;U@QUhXyB?UB%?W9a5?_NBBso&K8-%m+0{W0N7#tG;`9tAon76y8yjtD`B; zdt_+#G;J^ku6b^bG#ppSjj@aC{WT7ueX)v^-R>UPP7aJH&raeySc(BZuLx>kxqza7%BV!>IM!FrNQxIMD?&{zexR(PWvwbg|r?@t*XgGI5T_I z-4Qj+fsnGBhg|tBB3@rhCo9XzSn(h)ervPgG~VkYw=Vc1$jw}qrydw! zC4%#PFRak~&`FI#-Pk8k0@(9YZ0*pMbO`f06e5e6mS8o}etC3tLNep9B z2ntPmJ0^n1g&6cy_?eB8&>2UBxR1%Ubuv zuVpqKJhFeC&cO+=v$*xCLH(h;k<4$E?}#QHTCMB zuSLLb`ZQI#2qE6SH`3;Xf^i`~9q!7+yCy4g&$~l-C%%xCzB8~xOp;@l7N1A$rTQ6q zXyPb=lHyAmQk0+tw|XP#7m}T>f^%(gad?59Q$Y!^kN1YPN@K-9OOr`J!*lq&4d|?5 zp<6IE_$0ka=#}2)tAi4!%X4V@WTCIVOh4W$>6CS|f=f!X%#qs#s3#_r zNxbGSbOs;yGqBLb&rNF!Pg589hk-BKarz>2H`Ko6u+|*Up^JTUi}j4x-i6I*wJk84vp#99wujz_P3 z(?d+JihX*skNEygA?D6#S9a-Q+Z*!2JJk954ZOLcr>H}n&t05am&2pe{Ct3Z=US+D zU$-4-3e)57G6{@K|13Pt!1iBFx{(SjHfTUr697LEibW*pJkQ}%{NDO~4Mkf^cVLk@ zyzKIc;3g%Qn~AO6I)JcA3@kHN=vU0=t!%`rK3}^_aA=Q*qtPpqhez#9S+)+{2J@nYSe=Cm+J&1GUXXf6{7%fBF!(|=$M-e8d%KUM&+z0LUJUOp9r zm3&VEkGFQ-4bABi6mbjwN$|5h$I!bRywQU!=EGnRm!AJHiqW^rKv1}rI-8Lp#0#xE zDUYM}8-x~w`QCDF#xLKh>1(QOS1fRp*J$g(Wp7rq^1)}ktWf&r42Yb~cO1DfII#Kh3w^xnYt|EQ0O${m3wqa2y@eN7cY9PcHijLmI9# z*S(_&XTR+00QEpgZ5+mi(t_N1XR;>d`7uI;nFh!ac#8!n zcb=%mjof|NmYtrp;vSO_M*CWF!w_^atP>}3zRm-8vBdJHjh!@XRRL61zr16n@yb!G z5pIzCEMa6)B`~c08KU7XX$7u_)^sr?4p82QZF2W+*<3 zB}hJod_#u($mxJdi6n2~UkK$wr?Jzyp{|$8y+}ONTTm;ZTfC#qKT}yH5E9Zeh%EC~ z(SsZ{@iR|LsNj{Y{|{s5*j;Jbwd>ff*tVTiDmE&%ZQHhOR&3j@*tRRSu~$Dm_8$9v z-u}@4AorIuYhH66=kfaP3=)qv*d&>M->F8Gr(1z~T`ieE!J-5+9h;OQOXFZJfdtmyCtDuq(p$mplhP$lBUC`_u_T^x1fh-nsX=US5UjrU>nfg8!cXA9`x=F8~^GU;nh9m1^CsZ;5gKVxk# zpYUQOtUt*&`2JXHkB@5JTz(1JWx{nKIuITPV3M^J?!rWL5kD*|dOaWFe8ZBU{HI@b zEdTBdor&eY-t(nm0nyfd{8xPnGJyv$;M^($qzfFNM9}YgJetFGI0c+rrJ4>ul4f%L zjH7jdWSI-w6N^CYiJue$9sW&_7Iu3zu@7nfLA3nV@Fr%cIB53C!lgcCVwfKAqDN_T zme2OZ=9}(%)ROJ~v4rzivY9*;66Xj*j55cq;(hw;;}$s5s*XDBx`6IvIfXV3Q9fa2 z-F0pzLHzMd4di*Hur3$xIKGJ>$Odh5(}wa(-azAp>2 zo`HtRjj-*aET5Cl3OKly`G)#L#7S>^u*VI;r^@zVHF=eGtkD%ZhR~aq4C;?ulCEPy4CdwZ#u39>Z zCUfsNh-M8B(`h49%wjpUEVlz(`{2G4h;5E4hSZ$5X%n^}Ad)QVX2Il6X-RIYoDULN z_{#&arHOua*@%^x?RFh%ITzK(E3McsM8W^-)j9_x6v;{uSAJ17H$paZa6&1G@gR|3 zIYRZey1(yHG+SPepd5NxUqsz9JcO(~1x8AEihKv0SVN=`hhLxo7O6TPDx=j2UIYV@e0PV@~5~2YQwFk#;%E z5=SS3YC{4|*UlgTOUWt%HoWKCh=;|DbNC-|e1}xoO_nE6%2Lu8s-3}yUI^(0r+eiD z45E=C%^Kf%(5747D3#$8RfrnHoqDEq0x-m;o61WAn8p~d+1uPyC6N-~V{H4OLq5Wm z@^iWJoU7dP!cZcA&B3t9b>`$u!-1^C)iQ&Atq$g$Yb0ZC)J{|-=5oY`a#DdvKbl~^+dc+T1SJqI?^~&U zAEk|!k81kRb$Bc~$mGUqyGk0k>29qm-@~c5)r5yd0XbFWtyiUqh2|Tm^kYj&jmbCs z`l1E%O|2Ko62vMm{L{Thc-q#t2FQfqRxbpBdk2IY@bf-cmJsQRz8BD3p$&3v9m)X) zJBYfkK`gMd;|uauGr)bYJah6f@wAVHZR5PlLBiQUjs+EkN;+^Jn z#tV0p(OX}w%V(bP*J_V6)ad8>Y@3ZR!%87zD5kaK2ad?NfE;$M?$4Xc#V_u>4wQdP zu77vK&dmH@KgwicH`oE2$p0jlghZ0x5H1WWxC1P6OF?LM_NGpT(9e%IvIl)n6Dv~_ z*9P%*LQ6N=v;BCFJrcaTMZm8zM7Uq?Tz7yYcAvzv>Bu)#!*3*+J@B450a%qKX5E-$ zM&7>f<6i8!6AYerpF)f~RxVf*pJi~rSK$b~{U<)3-?9O(cJ6HkDX^}9SGzgfc?9)K z+-z7MjwHyrCwj3LtekuKP{99v-51DXetKU@lFt=iR?IFmz3Q45PI%EjWR|FKeX6*J zEj!mE%&*H`Yj~Y2-`C(*Mf=katMn%y!Pp7Y{AWD==-Ai#i8{Ec64j=K?s&PAq~<|e z*yrV;C*CVGw0@wITzB(YdV)Pji+G zy@!1}&7skB+UB}|AP!b09Cf-;Q!lWEHPpHSHXun1_(RvtRL)2t(?D&h8EfAtc>KoY zZ9EwY^6?SM0}0PGekr|iF+qrDZ$|QSVvtg6$iCNVHkf68!rC?r=iHFR7Y&`_3|$Uf zOZdPlz%B#|mY8U06Px-+FL-oFSZfIBY2Pn4(rhTFpI|WT!L1T2TkI&Q2AjsgWtZ|T zB3dA1G$-tZ_;#!jcxO}$KD-O2b!JedB{=g7;{?aR=bfhMkQQ)qDBb4=6R#)KBQMnA zcQao8pwn-z{i)-0>MP#8-pyXTVpx#QF@J!vrw`G-3^!>GUT`-<0mG;Fz_b*m5{kuh z4Mji0mD+Zd%Yu|`=aeG1rEWgSf-)!FrJLd5A6#Y;?Fw*4Eu%GwdIug0a+k2vmDKdARS-ZG^wCi*BH-Nj$2Y{U^12`>EQ>JP{ znUK(0iDKOtq81HzT_!28HOCmCNeUXMk}IjA#+((8X6~CQdrW}t9lG$2)h3ABWjmk2 zWINS0*>9l^%oGcwTX7K$dFb;H&m@4gQ&Hm*X~j?*%DyeLZK)mk({Xnvy(qE2K_&x`?x~J;(cYxBP z(C8KnnPmFWVe3(udD975q*2JpO8brBBM#a}z0p*S;sXbyaJ+a@g5#0jR^zT8x6)LH z=s&nO~8+Ss&W?zM7u>An1&h;M?gsxE<_N zB)YOz%M}obd-%1jE<$#CH|q&woK-kFGwbP=6;o!0w{5(U^76qQYn(MtKi?dsho*Yw@EFz!^^^J#s01lhYbpkY>blMmXgyJ$2mjH|x2!34~fNkB*U}PH<9?$+bdl z5pfkrwDg# zb3T$_+w%-3Ybz_eJS8M5f0(f((MGRih6mZn zfK~Py?MTSHLLd`rmUK>ith4rMSSUV6^6_kg?)8ZHYD1T}+QJUo5=iYA(Q;VYDOBpM z5YItCf71gzfqBK@INPhcKDO@ibKL5q+7z-;r|5vIwyRI+>v$G|UFobZb)Vo}$?8vs zB-M;azR;wqH5W7NHTnb-K-cBD6TEi8xrniE+5>4rV{A%DQe)W5MjI*NW@*ME`c$7R=S_o+(kV8oz6wk-(Y*AT^bleA(s`dm(lq8zojoymuO zam72z(_i)}EC&s_0*;qBk+x39%f;W(K`fm{sAOghV19!acaMdQCroKag5x(q#gEC$ zl_RTgB7P^hUgwNOH~oS;_U{~YFHki+pwB8P5Dc!4mM_z$DXnD^kfEZ7s+`3yVt7$s zB2lfRuxy_Uei($E`-WG@D(2yo(9bUG0d_Y{1k5Mxb4o-iGAFCu;8Mj%2qU?oy6wV+ z@WN*x-;a9L!-q~-xyfwAGU)e0poSRVT_rT{TfQT=LSR9}m)$0Dlbt&3u)uWp;EgaM z^7E$aiR%#mShV;~^2$+M7c>B+kPXAP4TJkByp6-<4z?k409>KreAotRp{G%;SVizY z*z!c9tvfESh&*9QJ&NXBlx39CCAV!>V({!dgol3f1ZHmlZcD zzNTx9S%%&@iOQ%m51)8j*7n5bKIHcvO)R~$MrG!eq=z>uq!tvXls#jQ_CclYfwa%B z>{BrLwmQuld>Uo-JyN@GrQ30 z6sq8ff{@yfoQ7~ZS!8jeE)Up~cHw^q;VIYKM$FB^weai@BCxiDg;>=Ot$F&w=iPQ5*mU49NS za*8nr-I8DhRD|_?whTmWhJ?DA{@tiPsMUbNXGO>xV4n@!3Nc~0v=j}$srCeII}c#}AT zaFgm<6OmCAUCxGrU?;wN&qrXC^3mEqQMM%ne`xArFHW9^DL;Fn1f40w=@=uDXu;$V zlk3TV-whZ|aF{mRm#E813sjYr^)!mn72qUWD{r8oOK??)d*JEfq2Sm_e34O@2;){v z+Ipgp&9rf#02_TP>CT_z5nbT~2w$lFZUR2~|q{oq_)_`jz1^L_R{N;_IgSv%?6qZ{VTFs7T{W zSC{pezMt^z-Y`gGS~S@71Hay*ZO(;=hAo)-Wu_y%Si#CQc~tRs?uzXc{rdHET7ur2 zbLFri*4&K!$?|fo!dD%?7#MNcRqn%>!2X`iru6fy#kT6xPStYPQt9h@^a;pkv;eZ4 z&r0d*_m`x!H3<5z!9PM#>_s{iOf9l>e|#chw?Ci@V~hv?G4lQ$N6EXejG5(k3Y^Re)&lJ!2RwL^^;;g8(n0?jy8Nw>~vqK z{Kcx%{&pH5J9Rv|m+1aXIo?12Sl)VnVaL3(a#_v%_|<50Ph--+*R#znCU$I)0GYL~ z)$^de?!vsng@r!Kl|&?fpG5DLlwbQ+`z3}xstOCVI_eFK^xG|EwpudO@FQg2<{Qyz zm=jj;?Q>#htnZvs=@<0qfSGwB??FtlwGzUqjN!GG6ts&-J#rl8d&aqRXKMXlfrq`IE9vE@NH)u~1w=(*68Cl~ z66n_fpq`leOi^(-&6|k_^WQg?=u9d}yx@$VuCPgLSVlbSfTc_4Gewu~hCRbukv-m{ zZzb%>fMP*v1eGyiqJJ(%xN#&ObyPfaQb}<0Za0g)ICtAgr>&)Rtq0}3Dd_dGGLIHZ z+ODX$UkIGiVQbRY*_Z`Op;OM%Mtjaa=*p|xVS4_&`3jCYaIEE>;~)HqnLu$s&cqZz z&KM-1*LV`p!Tz8T8`4^!1RLL?AD%qq#-h|2HM)ARk4BtEh%#nXBd^aM}a0#(84F{GU{gD zo~)ppRFnral|u44lR(TBdC5yQr00)noigxy1*FP+5=4ZRVw|d42`z%dM@+e|&%nb) z`NpBl?PuZ65PHtA$+-;8qDYuRXEpxS31`qgW;r!X#XElAf{Vo|m6Gz)cbW*o%oHKS z!+DWVFb^~6J1vfeP+EtYyZ~|am9tcuuhax%&qd#HYK= zZM1dO7IB{mm*P`OrkEXa5^ifB*b>Rt3JuinUtv#e0Vl5| zMxe8UK!5$&)YxP!ue;UuH|T=bN7wfrL>A~F#|yAevek~K!bl$q#Cy%MDmm1A7msSD()?C2Y1={}@95juv2H`d=aRpRx3B zm^*bl>^?)76A13k_ZgfN3&28hwr&A>vl^+s#hjtdV2EMJ@?`8c=Z z`cA8~hRT^>iIPw;ykJ6NaN4xkps1@;7bdzgf2Lcj=1p$6{)j=je_jbhuZ}I^dkS}N zmd?HMnpUNj#`1Ydvu4g!zE}16?4#z|Rr(lTY9L6)J;JLE~R1atCS#LKB4avG@AZ^f-~QqUa{{Pu-?)O5DHALx<&( z>fDtCBFNoQj~Iqe9sTe=>L%^uDh?>09!t;qajb^+%Ht48KpNro5KUQdb$S*4&=<;B z$4f+EnW3R;`dEoEj0Ghpj(mXo22w3pDkIZ*0&(1W z3t{HWdCeG-Eg02?p{M-h73nel?VEbi!A>SE!2YaZZsqy~jNDPmTmEur=`43O(o8K+ zk=*-)RfcH@e%8RaK8>(xjT(OrDrQg@3wAQnLf`6RsmLFt0(8;n}>2`yPfRXn`tc)nII>&F`o@ELV)vQ zK>$66I9QJtcn$UIJHxv5ZTMo(?7DXOj5fK-;y@<@`9(xbwFoRzY;RJrO+_)Fe!00S zcdc8$+kraq*7#<_ca_%G@$fbbHLKh1*)c3{jb%lZI&1N!PfU2|iX@d` z_T{3vT;9D?7@HF-tHs;(TCB11bC61hTLKoak-frfU9jfmeSVf~ezIV&H$xwq#)iha zLWaDc#0@v>nP+LpA4y^rj@cw#`H1S+cM)tzsZ#{?jNe!GsGG~S5Co$uOY4m=ymqi& z&j;0--pK7sr_P5y*Y>^VGLmhD3Tad$TWkGgU-S?! zozgu7sbK`&CR%guJ?>g41HAORH7A5WMkqd07Mi7Fq+lP@tC}aGX2r<&8Ky?Rd;PYA zs>X`S*aA;weG5GN9CJ3?^J8z?_wOHz&LXS=O4PU!*3DXI)%1tv+*4qJB)4|#vK>We z0gh-afsxyS08ZIOnaLb|HaxB7ZVJ=@sUtbxg4BWQDviK)_)R^8c18xRj5ZXcW|=x8 z9@o2$B%?Qv;yQX0B3SSids{IiDT|mstyE2G=%T(=y<)JI3}tS zb^a-8+5R2;z|8(Xp=0&``vQ0mqC%GN3JOO6(+KVXd-@l1{GUbc*jebp^n{rSPvmA( zAS;v$d<|#eb2xFCZR2S}{n&LZpzV3Nv_ux*6XPSm*zUnwtntnJThYVY;6y=^x^Qzl zy@lz^J}mO-$3&D|=PCne*D_Rt?_wIH9wpclyPmMHdwzPx_%6-@2@qjS0@oIG)HYKs zxzQWCai8OI&W8O$zZv1Zd1^Cz%5cXQHJS!TzTM8L0tJ0kZLUA$3N8@h`KC3_!imPE ztUWtWp4p{UtOGRe(G_ImFBGtF276SQIVPD(W5onz-OQRxvcAeJmT8LxYCzYXG8w>_ z{cGqN{JbRm0t7S*7Gf0=&UrfZ`;rUI(q=nqp_FZcN*82$le-zzkW^U3cb)nA+`tmb z?$YPbMXTRsJlfWyFRyR%-YS3T$0A`wzdKnRO90%f68bP1@02gHA62|b+z#`s7z5%K z7y+W&3V6l-$7^+ME?zwRJ6DAAzXs?L8JAUV>kE#VJYK%T$CCPwIE-Es`3(;mt9a{( z8A1n=A}`KB#k{*BJQ>}@WM$Iw5-(e3(RWKWqcep3W%Iib}11v_AP?g|04|(l>&b*?`rHQHJ(+llU2&Adh#20WS@{ZkuuDr zMV8P3mj3y9T?h^9Thwjmpj@Xt`LOr+MKLeh$>Yx$gQ!5@=scB-pZ=f^;jE`#aM~J5HhpXQ#CQRji)V${%W+tERi0?fe*&=L zjlz0@Lp(#p)CNa$+u?E(iFd@wKr@w}vl|LV?t^pBPezQzFk4oU9SLcSC%+Gtq#XxF z!<|BX0~Fcz76VPh66T8rZYL3mlvH)W3Soo9CAjEy04dFi0@YJ#99fFvkV@>dbHo)= z9+W4L0)Rw7)l{7{)#U@WSE_$y}I_Ys!FTN}?y`qnya)847qg?F-(! zI0AnJyy{h&EW?=fuF~|Zlp)o(0)C&V(E0;%0_xXj#KYNMk@^;Jf(-XkuMmZOp$4w^ zEJU<7E&}4^=b4C)1VlQ1BVHw$(BqmNApx;{3{!6|V4G_qf_zgvcle4*k^y%Tf&`~$ zf;%GOnRv5?xvlBYy}*+hZ>cW|@K=9^uqg&DB>zWxyC0;}p^9Tyk3UIv0R>W0Al!D2 zYg~z}Gc8@Ddl({8pS&%?Y#>wIGC9S_W(CnusERvJOGxaTaXT`X@E9T>gj@RsCrnoQ z>Ebb*=;SW?l?Cv7`^1T)rW|Wb+8t8FM|f1*=2?j0kICb~p$UX4hJxH}Bo>PlSm;6X zt~9lLch)2(tv2^h%bVtZ%*}sEe*AC$>jwK@_o$#M!U5}^V@4xH%PG0ulw&(f|OqroM zvu^6|%x3e*pChEodRA>pSi*SuFYz9kzA24(pf6<%&D=0X66&Vt_VpIbe7Qdd!Vltr z?x4O{0I4O?(^fUG=iIVnz2O0e3%5$DcTc2WmC*i3mcC;o7ECdK9?96c%LX2ZZ#sD5 z8Xx_Rx~l)WrQm~(<<4OEd#tDlByIU@kcQFmeMw1xr^m3y81ihP8seJ)q&F+2>9Yp4@2qisom5f>HEssJQ#@FCFSX)C)`=fVuRAI$oLU>s|{nv-_c%l5od; zq|S3hYqxazrc$V(^F5*7-rC@mIFmUY_F%;t@bQ=6T+AQ-Rm>7X!z55OJ{TLb1antM%Y$(M_HwTf zc87=R$tzBX>gnF^6Uq&~Rk!e}fS8c0?M+ih)@Cb&XD?&hiydyCR1(!SL6^OwkZVVY zu2;aMG1?Y8e16wVKN+t;Dt%wqTBtM{aNAg!TVFq%H!npvs;xZow3lR<*;@8a%PP{S zb91!JTB=X&j9W)3-5jb(sm4dm%8n5s;sbgZjk>bHOTS2ESz73#&LSjI8)P;zTOPNwaE3N3G> zU&K1@XMxO(hk=EW5U2&(6tvJx>88+;Jw&wRZpM8_d*ZRz$#2+if>CyCDm&y%3Zd+y zklfRkFgR?DW!ZDuG-CCKJR!2Ga zW-G~XR@s4AtT`Jxshzdg?0^X{vH1{D0O^B0(hDQr0I3hZuN^?37X*lB+JA6zKwSyL z<4ZNJ<9gx+_db8khAq!Q4qo|lk5cEpv?3oOS%c>G=VysJ_u3mhxW$f%AV&`Jy<;2m zdxTEo(3c|ZYkF^qpHa{^&B~qmaW~%hlT=`5uFRw8$1PCmauq(zZ59eFVP9N?m-{rg zXL9kZB}eOAjNPRXH;&0?JvYKx*TN+*kY-Y_aTTOe(^`q`h_emf8V_T0*HH_9|o?9s4GN+D7~L%JhUj=@DMy zLkPMOwFmn5X2TiXZqqAf@xSbc-{pXop`-q(iV3>k{CTrm;tT9dkb?A&8T#+=5GIcQ z^4R`;MED;ETe7%h63{>>h_(M#z-84*-{UaA!It&RSoq-9Cd^XTz$oEk6BR$Gpnu(e6!bm*dTWmiVoo zV^)zj?h~Hy3K#Og32r#lm=H4<26Es)E@Dr3fY&de0{9IyzX`Zl;)_!&o<;U7#10?< zvN`35gBw%#-12*+`brY?7sV#1L)WBL+=CB!lNauvTE^lk0kO_-F-^G{v`#Nl)@L0P z$mwp?mKYbYh8KQlp`~(@=ZZUw+f%b2s4rUbX;_KR{`r>Fq-X46dmA}?Lm7lN;K*&M4E<*$@=U)|dkC$(v-~1r z0xpR_AkscFV+rm^lurmA;jxhW+yM}?>4*(Q84>{Pe!X04TjB_ zo-+fOmj%?MH0%-{jh#}Edd}&BVxijRdT7yl--ZNOwW`fhT+!_vT5EuPWKx;2Mk5PY zCzd#`8qhGJNiEdM+z(y*e1pXEkRXInB)LnNh^tJ|kZoDq8^&h=YnENZyU(^`iP_Kq zn~BzLbs1P!vum?ms(BYo5ed|@&K1FZi{c0+XjSlfUU4RDI|g$Vu}-pfi=`R8a%Dsm zs?MhhHpr`{%Ac@P8sZ)d{Qaclp39@)-8=Xo_sj&S`L)W&u|nR<*(V5#4s4>E{I;Ej zd5d_{hT-n=~!%lW`&Zg9}Ekf@_Dp4 zRARJjLPcq2&rG2AZ2HQ9A^{5*uhu#!a&!r=3)`wW4dqICj3G8DgJ$I8-({NVe2I+h zMc)b0KtQdI`p#Z{wv%kO*&6ti{Mcr{paRCFV@U-SrS@Cc$hQo92tyQ!X*lG^>7-ao zbL;n(;`$6bz0?DQRbC+t1q=Nes zWb0ey-Y4k=aOQ}Uqp)XIEsRF-kBMi3cz@Gbf*Vi|U`6qnQN%9Gz&AalsqU9(8k>_Q zUcDxMI;tKq&6&@YW*y1>Lmw|lz|Mt$RIwt2%!9rT63J2p&Pv z4L?x;r;pD*P^h-wD9##NzF3tROY*lt6exC88w?~=&$S6g7RJJ@A}vHP#1VrY(^NsA z>E_nK;W!S{HFvXvX&HKkk(RV}H(mF&cHjMxsLe{JKJe?+NOkiKK1cf0#J%Eh=^qL=qyC zCAPdc3lc)y6>{q`TP#6m>6ZY_O=gyi2*MbAQ(s>El?KT|`G|vnh7DO|4|??_ zOZEyIwE2>(R^7nbwv&)*pVu&*%Wj3*A-P>U@w))Gt<=Q_mqToTt zznzz)uKoF;a+Q*TYT^jnZqYK+rAWh6MV!~?)C~wXYx$-t)xW}x7!}sVx1A$5N@iB< zZdDDk5BD#-Ne+ClnPY+e0mEJ9iyBKri63M=ast<&8I#k@n|W&_)lU_#gnKjh)EM5= zc=MAJH%de`k-(Ple!_C7%URkd+Pwq0;u9X3)Pi&9K{@P3v}0|}{Q~gRnt-0d-hU@A+_O^hGPtn zovXH6a~?Dy@B@q0WBzY>{&2pAtHT^Ng-*pQP(uigh*XhE`{T$%OEb#%Tw9Tz} zY@u7h$hYQBs8t9p@+2EW_enhm8Tn2lw)*X%^K~xCS3%UnX42POm-iNPF@sD;6=4V* zvhZAZa$Dmed$Wq!V$yk92d4GW#-F@}LiOwVxCy*mRz|*=8o#h8o8z~GP2iAc2yPWv zqWN*wqWD!O_kQkqSLZK;0oxp58`l)AU)n{38uiBOi9&_bXb@>t9^Am>E z2%?iSoeO=(1y<+0y!@`8S2xAG7_*8M`&!n7vEFbgVLZmkdY^?&zt5)t=Kj`*3O2%t8%Qc<-7D%mx$rET|1Tyj#k9;H0Z9_kiK79@bXQ&5Hfl%lFi0Q(p#AffA6 z&!CcldmYC2_@hGcT-uOAMCVw=1A#Qh_tR7MXro*|(zazo(XMZdO8^b5ivyYW`Fi}o z!nAmFm4#ArMK5Dh*rCf?ut`|(AA?>gjth;S455sWKm#Bjh47L&qJg;X@-3_eVan*l-+|TwONH>DL1R7E+op+DMxWpNnh<4lTxo_0g)5gVrk4%W-K6$w=W(l3j<@aYWOIQ~xbqG6 z>6WVDzWIbcT$gWS4mL7AkE`y(CiH6(Ad^mQuZRWVbzd|12xGSOpMS9*@wx+d`b5A3 z+$s<-={SmNv^O`QJ-}T`Za4oJkpB`P`LDV|^}i3XpH!a_qp0HxD1igHz|24o(4A~V z5cgkB$hZy`dUO>C@I8kgFIhV>iPelCo2?{?bMebei{6&nrpEY|nMQLjVswih3pBsSoJ6JdpJ;FM0s9sr!lp1)8U{YsBum}Ok`#B`o6(0M zlB74nuJi+s6rJkMCoQYaD6r#O8!JR?BhSl->^0D&?pNArFYIYJHAX0y`7T>K%Nl#5 zb)|xy*!JCi>qe*VqL;^GnAV-1TAgYyj_Uk7H<<9t&fCtj4PQLRp!Y+N+BgSefp5xI zG?-^FIT0n(0+M3ZEUbvm=rIknrApZ`L_$ezUg-oTScOii9*E-hN7uG*mzt);psrt( zfq@*Db#H4gNTExqm$8?Q5>(hMTk&;+n<1-uW|g5#TkZ%EAwPbfu-)t-6lkg2-*v#( z7OOMCn}M|UCDE%=-m!(ZJ=IoC;N6nBLKuA`LF{4!*02Q^p*p0IJJso)-igg4lvTB)4Rkz6?H1sFX4L+8?$`o9c+zaEtYlJll%)p_x~$ZY65d&`ib&9;jBJ^=o+G*j_(cUQedpY_Kpd`5LlOJloJcTpqDQm>k_s;1>4CW$uGKH{*PsiDUl^-qp8cdN86w>0tc=8W$5 zBrbiTsz?sGZ8NL3)8+Q|^JGr4ut|BZDH6+qU!gp6uL(coc?J?Nh|>L@Ru&3vJ6jh? z2mzf;6<(h{0w}ujv7OohU1tfoN~yRO?UiRJP<@P!tF%$c2HZRv8wnzvU`_i*Y3~ud z$S;EC1+s1uxqkM~LA-r&==b4I!!OSYuVBRKq`HEJ;-|mZ#I=w*NE2x1GNh4-*b@|_ zn8~(&qpE+))>kP8qe}2mDOMYZLwAaZ=Ck6+l|#~=sEfX~iB(~RO_)BE%nmWuciHiY-7Nnu@VZg;^AC-IK=6ay}E%D6^tHVH-l1cNw;I{Smugz44|-Q*eC|^m=`+PpSZbxi2CtT- z<)KmUuk$e82$${6cSJ-rQ#0uGHs^5)gwd6RrhIX(gXx51RT0N*gJ{ICcoVotCtti|(9)e^;j~1}LmdiOFQs@{c-^nX2(O~4pG=C`@+<*3( zoqaT|GO`Hv_MCS?JMED&g5skrR*(1p^Kox@c~1ft$@ik0UM9=GmxRyOfWO5qk;l3y zi2J%u#QSy2K+#!f@{c+9FM$)L|LTbOA5-orI3_Qu8SFj!0)RKE>$)uZJLY2RhVRT= z_hnq-3BRYs1AYkV5*(Jwj!_SMRl@Z8ie~fOo~ZhKW_0;-mlOC3{B6_hygmOZN?*2r z7z?mz8bw9E1NJLefn{E)ZJ^(928>RkiE>1J!cup}D(#-{o^fEsT|s&+F*1Pke!A*g zD7M}x4cqYo7A*N;9MpRwIWOMS3yNc%h?WO&Woi8^rcm!b2Ic;32X9(tM)1Lp8q2w3 zn0Yfha!1BL=HZpsic%rerY;h*o^%M9wvu$5rW?z$+EP+-lLN{q{pjML5xD$W;&wx7LY z<0rn@)KaVv z-cLsq2L31!git6$PBz!$`;jpwt{6g;P0R>6HHmhQ#&%+7YSmqhyMhkqJ z=>(Ti0l=5Lw3cNn1ym+4VD}Wq164at--p!6)8|GeRI;)U(oSx^NpC~?% z&ri_T8Q$ai7g>*bhb}`8%s0-?SsI`mXN}0r(;Qi-sk7RJT*JHtOpwcdI^v)wm>;k3 zEvSgoSSKA8OrgFZax&-yAYY5T{+K84gS^fbWV=XVw#yc+PLg9^ojt%+jH8UbyyJ-B5fuev2^Esgd0;G^z&;Vg5?>3!&t{UL7 zGqPHdg+p{@Z`r=CD^XeCS(``HxF2ncib;52jN{9W9ub3_4R&8W)%mRA4VDy?+NfHB ze>@tGpHOu?VPgMKA^lNb`<%`pwqQiOpwg;;;i#@cb?fMX?DY8w(5!4JS~9)ZHkbqN z!l2L%1R(nRcY_<*WKeCRT{S;n5A+O7zfAm76mtAK+=PXd@qhNgNZA6GCV-jv8Zm5_ z=NTmG2dWv&-%+??`Sc%Z_zI37!6h}JYl@pckeFO0N%UZ1B$g!?^KbM{S{QI#coTW= zll-_mbfx+qY&d?)2*3;*a2C3Jw7hJ3G4pL_A`)}~n>LK=UFO2q7VS)e8DWiX5PY>d zBFu87px3kVyt{v8-pnRUGdndw{qd9c`KvTbpBk^c7@3xEviMUy_k{m~1ET_H$vCI# zd6p|~81ar1X_Y&y0h*T%G(YY4!jRPT;=BX=ttV~GmqSgQ+heyN$SOoXg5=pnA4s2c zP|E649^W_^ciS_TCaO{39W3phf|Vavx}FcxP*16kLkE8I02oz%42gamYZBIg;ZU4_ zJ_ZXzk8D-VuBgCeK5;419~NzXCK{RTSx<{!(@ihOXu`0Tl&hr6@C8en0$>omCRg%A zD4yzs2yG+u`)^9fb9UmI32}pvMZk-43!4rfN(1xVTZnW#@R|c%^iktz3uvzWOqZY8 z+;(ZBv)YaVp}Z;vRPivsvovZo!sy8HfQ};j_a3#>Bd44Gyt+n=4V$C$#1{DvPM>w< zSy2mkJ*UY+Vg8Dy(nb^Hx!hfVsy$8k~eEu$_B?CVqH6y=2B~&17+-^5Nq;>OWsqnE9v27w^htk!P$(UlP zgoKcsIINJ}LG1+L__5-&Q-*RZZ1ze1BiY*TU#gLfYB%=T+|zVTPrRNrlTKRGL5lz+hjW#^{rXg!_QR=kAbc%PgfW$}7 z^Fs)4+H^+#4Gs@4o2+=ZoXsRV23b2ZQgaQfnsb(Vj#K(RuKrv#rUJeGB|Bpf_A}M?P<#TY5OZ+w}%R| zva)K1oBXBviR=S#t8U)bq==WDVO+aoC&o@n74zOc0NzLytU3w-<)h0UNFY`{0JFn4;sVdfor0|>uw*yTj%6%CavOyz$G~-=^GA}4c_;e$Pt7^15J^n<0836BeeuG z3D^&+>3ywVgexAqyQJJ85Y!+9>`FnVtQD>*jiS1BZFL6x@^A$|YMjm& z3y6^5vu|2y5P0H>qqR}Ko*|+4wVk_oTPriRWpQd%!b+46d2&=gQk!IMzCxEV#vGD6 zJ+TKoBM*#y#kHpnp|B6;`Dk66%S*e{NX^3uo6`r>jHH1ca2$oyM@7f=Nf;W%K;Z=t zmV;k3Ne6L#U_{y~_ibAqfhcQ^lqCNYMO|-dqx97|9u#Eu<6)C$7>`+gGkK|}9TCoG zzsQ7yk^%V8GZ-9G~>p*o`U<2;slR?(a2! zfhC2wp0-_(8ZhokMY`{l!V+xz)|`&jxGzx@MH z6JUBs<@`3Et7$pVr$KNCV#%c*>9PBhT)kr8_RKz2?s8Ky#7D@Z8n+!uN{z5|(zG3Mo@7IM@oQwNC+$)bmusf6%@~Knc}dY?UnQAb>gI z)$$FCGs?kC;dG=cZCKVAw*rFG#EO8oh>4maEp2fVJefPJta49DRr=gdk4K;fP}{k_ z7YCq9%@JE-2vr?r7kfq2aHBC@0xf{!*=AolkY@9Vk*R{oPysWZU10yfLDJ1>(kd22 z54M-g5+o4}L^?A;wbk{!QuDr|t38?9r}C;LZs z`on?KjFOuKw$fxtoe8`~c^{_DQ^?s19n-DxaixWer>fX|Qw)1KcSg5n$DuS`_Bb$b ztTSs*l_8=m8sD_OpHN?3_cC1Gi=qVu>KSx)$jV1fi4vftm1semb1KIHey9vVUjDJ1 z4BCW5cz~-!;10D#>3J=ERAJ-uqJSkvJc7|L9I1l=Z& zY1_7K+qP{Rm3F0V+qP}nwr}op?u{FJ$N#Wj*3*1g5i_FC(c5V4Yd=cBy;RgfA*3;m z$8YO#e81XzVpA>h4SVnk^U|#RO%h(csZu1Ax^B2x`wXyEkefPI_))lH{l+%|!tgR* zB(bh(9$fdHgl9u|1T@IZaPTs-NnrO<(%-eme^B&>yWYrj{BrHK)yk3dToIZN(P`XQ z!NMYyNbPHLq`i%QKgZ3FsWFJ)^uC%OB1@fs_eIJj|)4{2g|wn+0+$_05v1vn<2KJp5obLhN1*Xqq=rqGG|o)5hO0;#j8y)oN67 zgB7f5>;Xm66Zp5w-7llop9H5Qj~V`;5N9ykKKK-w);Ig~HSLrh-3M}(HyYnmAY{;j z6E>AX1K+i7RLwzhkwxWYn)JoX)_IGfHQ}L{JM!4Uv+AqZOD9S#)5NVhS2;m2YH+@x zEo$!$)Eh7?G(Y_t!0+V?a0eY1KrC5!yj=cm$RhyXcI(~0c^&>Fw0zNrk3ukhkH#@- zplr#-bfitEZX~$Rj%d?QG}mvWdL32`c$a^ZuU^-Q1Cs=-(nb{V48Sa1FRw#lD0qh(YzXK@Q}M5XCJ~8#i&PWoqmpF_V1#^ z&uPhoe^wy(RM}!wI4^`nOQcd7aZLAC`(WLGA^Euehm9w6r)lMO0d>+Q% z!jdLbm`@_ag~?lu!GA%y5^~P|aUK6Ji^3R~{=@M2|B$V3-~+MBT7dlEz(2m7$P<(U zJaduO0r2dPclW_U)JF!wNh1U{|4_3y?LiH-am%*%wN#n?>{Fm!S=SWWzn=lO#}}`s zE1xfnt|H|H38&Gj6<0<_3a(yn-qnq~mX`!z=GgH|TD~cbz+sJG=$@6-$>{xi$lARU zp}f)E0(@JCj>4ENPYZ=G6%7Yd1-2-HU#2&P9BsvLKfqFR}Or zHEFhO65glQiLTpT!9!ELYr#eLxy2k!TW@}rp5Z1tMXBVvLTmI#X|))jPW18*X$vx<|Ah$Ga$+8j~DAHI?uzOpPf$eHmz&rl6p%WVEb z=&H+M8A&it`?2`Bgw_|;$)hMDHRhr5JfnD-WPJ( zm)x-@RGHK8x9tFE4oN!EL)z3tg5pH*F$5`PqA6dfL~ELBf})$|sv0bb;SMH-sG=tN>w=S8N=Cj)4tCL&wUU`H4#oY3 zz!EFUQLrfW!*U?LeKk9(fG=X{uNJcy(LF z2q&adDVI!`p$=KQ+VPhlFt%ZmaW#dL}iX9U%hht~=c zXNoE!6gj$zM&Pw}v6+QWJ4L5|h1RKa@ByL=%o%mR0>ebI<}*5RH^cUixS#hCrt(Kb z;B=k7zv5u;S;|JyBiBl1ojV@zah3kKsA*VU4VCHTIq9oZxTCLzv4v9fE~thx#}XD~ zDK+?DLx@>6r>WjVGb23k_!WDA_6+2b$8;*BsB{J_So{v)l&SP41UIeOFFAds5EdSMQ|wp^TZeu*5?J zE%gM5dY!2*aWvA2=u5##vw59N!eG>+dz*KHmNLC(ip=+;?u`Iin~wvhD(7GgMnPi$ z{$l9}Q{1}*je-Wi`{JfG+uDjb&fQ1j)kre5)tx8U78LYR~P1&Z_Et2~2J)UVarQA%L3FL9>BUTuNqaI{<1bls1e@1dARfp6OeEm|Mb3Spl)#LE;?m1onIPV8H z8pe}Ze3+KC$&~Xf3IgQb~<~5glP9{^2bmxp_@Pi zlSy>w!pvxOUjE{S$YkNPnlD4j5_0?tLIA{wI>UUkJ`1C0hQ(P!Tuz5c^y5$FqowKXnph;*~ugW`#8V znEpuZeXvzJD5KW*hXEIVX*Si+Y8#s9SeHrLL&1&cOP(nXc;8T>5VZNJ zD3~06&Mhe3s9j&CLNG%~Y0=3DwKbq|(M*JSu0kjXwemrFsswvenh2+2szMLVf5NO@Ga_({mN z2^-6jN|ulXl0v9qc3z+;am-;;c!(adQ|tuKTToM&KvQ6!q9k!wQ{@^Y%IRAJ%xm(Q zlP{~n9^0~)cT68iY7%~|Wf*KV@y#jN;IAr<{UV`(D6u_DnU2Jiz2km`OXaSl!uy>F zfxv=Se=4+{U>mopIR1-a7V7d7%!noP!t)L}b>7EHU1(?okD!Hm#EO0I`9Ra?A?qz0 z7#J^d8)%{^!AG_W*hH2Qdc=&BXyspzT>k5kC#L$K$nZW7A8%pRHzMj3&;o9U*0NB| zBq!pZ|9tEG^#@5Xr6?_qEG10b*sgpm=Fo<|u|&WxNUHgv87!Ksa%vj7ygQq7jyitn zNf=7Y1K@a;hotWyf?Iz9JE&-5tB|slQj+h8pZmj-0a;b57jt8-tDfAAG^3i<=iub; z>BAW&j;0F+_v#W1%6+QKFaRy}b_H)2Eb*#{D&fem?C&{ zb6++^s0{8&fjks|k6?lo2@^A?^3_GfDX3iOC4GAA*@}}GH8Gp=lB`UkMbkk^D3-u( zFtGmO)x0wk8qt^&zl{uTQ*(_1^tC$csCIRJTRC*fUvV$?wiJoXN4kd!4K$Q`bYu*p zRw%5tWFTjk&E44G>ECM$s+I>p`_FpnxO=}*fGdwm1dK{&qJWX(s)!wym#~_5W*kcB zf{;%m#v~PxRou|)MJRa6L9Hshw#kf@Rx~B_u3WGjTP3vbjt0i_ zosIwa&nhY|>YA}oA zF=jSz)ly_!77Q+V0UfM>lA&amN{IlD9JFXCeWD$_ocV|EPmUCJhe&}2o0!iTPWWz~ zorY|I*zMbH{RJ7o2^m^B+>|GxK#2_>7^5rT%WJzYz_+#F+dqB;|2v02{l6Qy4%J4Z zfAhoqz&{>=$+cW6=g7c``1V3ZVD0}}Y3=lcZx2@$HlKlzP`BiylAWI2)qh^pZC3h_ z<^Qz7K#hFo$ZWr!ar<_;Y}>+}J#s35IRzLk?2eUlwmOJoPi1EVd?5A+f8p_o0St6^ zT3dQyt9K!8Ps zw4)7c&jAi+HEf(tHNQ}49c><;+7uWxUEE=3A!H=DlFZB9gD+KBe+7m7O-56nipp+2^SQFCt|{tny9`A9zRh;5;eFB(6y$JS&5ltU*?M4|apEl2sa zVP;J!MvYb%um}_P%e<&-V^D#lUY!o6^n5fSUW9SKwnEB`X$%c#0egwTc=YV#Mh1T( zvkQrj#a&e7FI|63no&wTMn7zajP)fUSy|_-%U}0P$MIH;VKj2jXeZ2a^RlRN*F8u<@^q=i?%}{Iy#fxEfp| zy_I=x!-KWjIW>rirVp;!ESVvFZ!{znA;TF6HVCQ2Dy*k5`SE+X`>N#Sb(33r*cEi= ze!OUp8()*yFvmaf(L=N*P@_#&8FuHkcfpLt`%3iV6NgSaezHnZuJFRobU*j3cm>@| zIAZ-NL|5>~XzQpkkeDJtR^uUvy%LJ8QWz)hs~^6+dmp%lBJOOhycTxT^9a}F>iI25q@ zRo}}Cxq(S-jAem7mnl@M1}2u|PecH7rc?{TdU5hsU*u?hO)Q8zLF?ksQKrk;K zD#xVF|J0%X3+yJ5C?w9eBk146XB%FAuEs=j%3zJHy%zuls8qF2Vtn0R!}o%m;arDaX~a+ycf zFY(NQH^7NoN_JOL8?xb=*Df`{T-@sU`?$^f%mA(Vp;m5kN%bTV0dNbAkMG^`N%9iy zO&@QIdHd$`n_?ZrX>bL!5b5KfT~R3Yr(1SM?(XHoF0_OPcT*1JzLn&GK8Txr+O_A z^OJlGR;!MHU2RkHHBAK5?6~)-Ax1;yj%-?pYqkoP!8ce80%m9XB1tg^MwVN`Ef1)W znh}MNO@9J$jKmA`a|;!eWi> zGAV@5d+b#MV%)^r$;J1Z>Hot>(|)R|R?s8+L9%c{?ax#FdhnaSQf!-54wZ73sI zYShWn} zW<6;_EuZd{{?piO#8)s?0!BnQ_YNJ**m?t>$<aql20;!lDo#Jqz~Mai-J z^0BxG+hR!>3?yxm;=CD#94KH+=asT;{j#-&p?;p8=m!C2h+uUlP(|W|fkmdipay${ zr$ulMK^tdfUz>;q=zFYy&6WDGog}2xSnm(l{kk3^Z~X`wuMEJ4Rn52plzJHrJd+ho zDu~(J_MI>%(BfFx zE_HbM$uffa7(^SR?iG;=_b{w?J=4arZZrl(OUTQSvjbX^OBcL#qs|a{L{mFso4`iXV}HdpiUl`r59~xqK=F<{^@IEARqC+Il}*VqlReWd4T8 zBbZq=>dqHYPU&&lTEcITB8SWzg)2;0@B~PMjsxp6Mm<&**+tPR!*`oJRwQJeBImqj zOrdM=FUrt9lM_cWBT%JAJMj$YVZsm?fwEVJI$4SgOdZGR2{juD;Qi1-$> zy^xZSc}<`vd7Ww4kO}cM~DZ$Te;gKgs z&A10QgWsuCkD#(pif)A631NLLFzjs~E~g>`DL?&%%1?pM|1|6A|GT6C6YIY#+W)53 zh;jSl{ZEPtW%7U3n#}&Jf2F95*?lG=m(`tE2dn67rT^@a@(`tM9?Lk#f0a%Fex__5 zCSCayo>$LqXGd?wbn6utKrobCx#bsgb}{C1>U^(AnolcW$fAm!0&S*0aB_1Z)Fujr zs7Of1#L-As?}!xqkHriU;>ThJwf_eIPsWkhBDLi<<7(Go1)WZ6*ONjzrEO;0F%L%p z1@{LM$yi^Lbv1{Ht{fZhprh{g|6! zCz_j`;)k8gM+I|R2bduUvrR_5$93>x+qydSjN$WIE;LY7rR>+0&ovKmI!om!y;Ags-4?A#J7k&?#kcP;!VB5487bD>|@_ zcc%Sr_`o*exrk?elzGFm*wnt}<$VJ2Wh%XzKj0tD>^luzG{?DK_DT&WzCr@q1q7Z(sU-Ec1g66^<@L%nmgBlJ`$E45Oj=T6Vm zE(%?j<4DD_P1K>IV3+<1W1{u&ghv}T0T0jP>gSlkbevWa-z@B&zky3YthIwiH#@ieHi`r{Lp){_quTO&$7ITuP5)py#-h9)f0!*Z`oqs zElsnN-!6$T)8V2E7atj22!>@>&wreSfHIM?B{_V(pe4alEwfaPqdQe2qgVtfQC6S0XN6(|8(^2bl zQISWtlxb{%XdY<-&WFJBRD}))&i=i`5Ac9+FlQQ+%>Jfq$HB8GF*3u)f{97c=-PMg znN%eN1gsHbD8CQzjoJx&DR1d?Tt<(M6yjAbvmb@yxpDY0obHa7Y2#RW87!Jt z*H!2AqO8KT(QmgTM(D5uk|MAg@!T~$1EgDKjj<;DaG6$)l6t%F96#CiOmt2;}0} zRMv%MPiq(0d;=DfKye#{ow05pY8|_0_v|uWu;W<^01WFy(;%sBYixy4xh}>YDKBcBXK<+051^I*dGp`!nOL%lS}3H{kH? z`Rw@I`ufwPvrF_wIX`7Zj9z7#^+mWbUeivPfM0pK$LPTH5uaLZ(}=fwT__F(wj zpAcp_x+bFaJ4w(Cl!j500P_S6;?D?5+-52{B2aPAk?db z6|X5`kT&kmW@`c%tqv7O=8qr)E|i*SBQQ{h;@wG@P0RMo7>hve>KCXIBrsIpYiWRk zrnD0dR?RTKW6WWw)PMp)yNS(3?ocZ*_-j3O_s#%6Ih;h9lu}=XS*NZ5DDs3M>QN5} z*w^uqjy*qWZehON7%)!Rhz6OX19liFhWkL-nWjHAM^_IZ7f{lal6L1z2bSx4x{^J@ zooI;HE0TJANb_(t(P>vr?p6v}xKhm}G6-bY1m-g&8-ktu2DEOasN!$x@5$RwTo4Kcy;8eP@Acrc7_M2z{w_3v1Rm6mcn`d&}cK zoo)FsqPDEfxVlUrl(q);>zL>6i#CYfz8T@RY|SP^P`=lBS0R zNp@N|qe}KI>~KyJOI3$xtf1K5L&RHSU)eeFRy~0I#pT+E>Sk^S%6-@uJAp`f#3%FP zLVLe9(6n1fRi~Mqa0EXvnY%s@2kLAYKSVk`(_Bt7|4DDTArWoG-(oXrbXX^a5y}E$sY_SG8IO22bt7av z!Y=}WiB;^^1D@yOKr0yKq|ZAZ(UwG|QkP|M+Ou~nNN|BQ87*TQbohb z>@W`l8Fynhv75)@58Tz+OeMy=%zvrcTe1#oO*L8ZWue(P=(lJ`u+;V2BkEBuNczW} zQ#A;Za8=W;9+h7uXjxn^!~`krE-*%Rp;B*Kix0_9g?6#q(J+^i8zvMw2Y8o& zG}e^{-_95NybPy!eUP0Nl~9FzGQHhPz8g;21-m;O6ud$9LsKkQ%}$-joLwHw5GpRN z7BE~0wvJj<&_c=Qw7@ct1@ZJOB9jY~-QwnI(@QVLo9dIKtDCEuSgfve5HLde3SKdd zDBQC_McDAA(KB^oF04m|2^OG#RT50jBG~IJ+~@JfJ6^ol%&MWqm|e+hEO;h~taauz zbQq+}5kw}btoZPYDzj;ezNaIZu^}&**mCxe)g^!lle8?rjZ|!J=0Iq$+c8Fi1Tx`h zOKNFUI_-~67)y+g#0ju^zw>U4_&J?u5E6nKjNLD8P+PGuRn$Te*u0JH!@}Zz7e$A# zWemPk&bd!Eb`w0_s0mB##Y|UMODRIVjzQ_(2;B4Pc-}IkWGEL*xW=iZ1tW~uFhlpYH-5;q=v0Lla*9rMh}X*n z!RrVE6Yh>Lq}|*_MW)c>ANE=|Ls~0k2tQAltWV0y`A0~$J_3eq)H+vbW!oVQLcy^5nx`3U#o#L6CNzoT!)2&V0B z1nQT3UrnJYtVexYGkOK~{H%#@m#_98vojx@ss~VJCU`A8Hn>Ay_VoN|jugYzu=1FE zs41*EHO#QEQ~NWF(VVu|`t&*Q(qTzoWg%%%w!QOMV?bP0v3l2Uv3@}SD3+iM6!=UL zH1qt2VM9<~HRk1GQ`bwT5%(W=od1pp$;8O=?_ajjA3f_|xSfBwc7#z-|JAfS0njSF zrx_b)r0zJ1MUwLIwIJZq>>*F2p0(nq&)PQFxK$o3T=%c2;9U0kubJ*kobI`5*$1!G z&TeNCQnAhM2TQ|%n9XIH0jrAX$LH-$+|A>wl+df=m=$)*Kh#y8YrG%Iz!I2;K`wX`<_KUZ+YvR9N3j_-7{w88*14k7L%8VIsP|^2)AyslydmB$Xd@+w2ikrWarwyXid$Xp}xW%+W<^~0)pmk6NI4$eG`J+2%_%eXZ!YW zl~Y3@2{^a6DT&hOEXx>;{)B#c5QI6+)TV>f_)P&!*%it$6~nmWoA;%)VwH81y(g~p zlFn>h&$E#^ASWSrIB8aav7uFgqJzQ2*f4B}#~?_xSJ}=zdps8tW|i54kfW0QKxn2b zBe&~9hS)Og7HL&~=e>ej$0;Ex?{hHT?9gqoOXb$h8cwPbN0E1Ckic=0L-JmFvR1Xu zG8PZG_LT%@REODZf30xVR?}7nuMCXmdiA9m29WtZSaJs}6^l`_3bsBIC;~gRT{)1| z0W?hAgQ&lYzyIcj88jWxF8yd7#*~nIEkyS5a+vF=hC-s0niD;q6|QewhkGDQVUNR^;B zYqe^>YvMX#M%@dcfX>+OF8s4keuYzVtT)8_~yXJAdo^tKz8XYtmwvotVSDHO86k=p?y&Dqo) zfRS?CidT8qY-%>Gfwv6nEK>Onikgxx+%cW>@|Yn<@B?J29x18WLnFHWIiUPXSw7&x zx_oB~rdiF4_1C)4Yq(s*%Sc=;@{>-{=B7`7(ygr<{+p-bhapTj`MX_wPlG-w zw}X}qL4n2VE&IgZ-+MNh_2V^!9qVJ2O%BkmwyP?8Uz;j6jY*mfFS|<3HVS(>VCK^yzsPDz8iKUm{g52I(3yIH!1?FAI zdDivM(RagWQQ%us9ujMYRD!c>E-apF_NEpoe{Pp5Gq^cpo;Fq)t>O12M6}CEOo1>% z+nPOwP`X4j<5(OIL7b^IgeSHA*OI7knRmC8nRzW{BE=krPD1Zl)->1X*o_=d2BA%| znDn|WLW_Z;Ttl6g5zIX~xm}G|9_@OAslb`Posa&Km_}D__w{%MoKS1Q`3{rB%`L{R z!_gh+lQKNH$2&U-M02xqAFIGdSRQyOfGha{TeATTw=Ml%_dsx~&wA$Nn|2`lrNcM< zSavAEeXZM^g?i1+^u;4M3-PStL|=OlKJw@>1j=+8@SfV5+_-%aU;-SLVu`lPY{7;G zk+2@;a!WvRYO`QP@w{{)HWx?VY%#aMB z0yj4*dg{vOa(=FrQ}&MQOD=6}y1Q+={drS1=11RJ`Cro7zIX_xl2MH(*VkTN<0IpZpj%`l1obCQopsenw08+xD$rl+~QrILg*>#1S#jxz?Dc%E(*22K@ z!u8Ih2m5oQ5wr^z=c+<)R)zUi(7*1Gf2a z|0MzY3{qhl6vIvai~)Eft&EadRDcE_#FxjN##Dh3IPxHU^EAACXigmUq zDI29;11QAxcxk%;8lZyxN7yJ_u}byY{r67GFfIZ>`K3$ zLO;@}FR2S)5JKdguuSh>#XPk_^cd7cu!r*jEcKG>2JBk-)1Ps&uO3u5}HcI#(Sl z72v!r4whn#qtSInjp$EI5)_vgjBu}89h~!;Blpl`XQ|)aG?94rS^)gDH10(5;1T?(PC5vs*6mk z+OcENc9Ub;0|5HL@)?zaJ>i zUh}LpvttDs)ukW}uTx$G4oy7(<9^`kU5pk7aFg!LJq7lMC1UF7t1c@hyR=G`)oae+ zlEquN5@5esi?RhEB4D_aO$^~f)sm$0mpx$!Tvv))8{e}gJy+M|=&i&!v`MFyk2=?! z@H_MEi|#V<`G&Fe9oHdfjn`FZmFreHf&gJ->%=KaO6)W52ehgbI@mu=Yep74Iy_qg z3n(rwS`l+ACu0X%5i5NsVHW|n{Vh^qg;EawS4RsU`*)-Spz zxg5wDO^xk8I34P?G?Vz957(|C@Zk%Vower!d~pzz@&|S=-uH>2)xa=m-@SYx-{-sY zs6KB!%g2M)%lx1WOdpJ7))RJeD4#dRHCajpa#`OPKDaz^yxZ{CTkU`ie>nQ=eB(50 z*suVSK(Vf-eK*XL^BNDwMY|?$^&ptw-|d(Nx(^y%R64?9Cgny(0A>Iy!F_5len ze2jU`VZBxrHExeTs{?l{z43SiRv+v&tlcnd;}h*zDC4jEeW%S|X`dbJethTfaPsa< zm$Ty|OS|H^#k+nY>gRtjzWkdJk<~P5*9_LCga^|i$No6L-C8(gW5W%W(jV%hLHj&j?c=mOBbPB}&}tT& zb-8Vx!L>uGcxq{VbXsST;MEH>x2Z^Nae$Edj#EWLbPESU7yt?mQzBN2ti22Z+w_-X z0T<+6-Ct3ru0{n!A!tQ&KT#X9XL$DW-x9lYQJk5>v#Q1^?&?o)R?tmXo6yyC`u;@x z!N@NtLhh1=pECiOzh2A}g_u2vA|!Jnl-yaUUy73tjEIUqmLlsejD!d-b1Op!*5+%s zJ7X^WVLfPQ_4K!iH70iSj|BE%CPOGe)$B*_MBvikRJe>aiTB7v8jkE~^W__F6SF>& zQFNeMjO`DlOu5(?aexc_b~hL|I9M>~-X@5WV@YF^PM8%XTyDmKEix3~vWwTGr3A8G zg}_ZSCLrc3ENWVRWlc-TvU)10yIvJI*_+hHq)y9f4LF=O{$5~INJ2Sga8S-LR&pO_ z)X22N+U=90%r|JLepkz#PlG#BS`V_ibjgex6Ctz8Am!`~QG!LOE3)`|XRK!2pr%bL z=ul2ODINWwX<2B87MEx27o%0~5P3v2TyK;p?zls==>nmbGWmAQoj1&t8|i z+{0lpZ&GQ`ZeY$uW!X>gxuT=30g=f|%8pvV*{m3b50xz~B-3n+`%VokqfRj?04(8D zY=)FQ``O`GLLhz*bhnCVnu$x=EZ>~^rhRSPhYNXjK8f-)_n>7t4%s3fnlr^*d7EHteYPX`6bJnfjF@|6XDDZsE- zL9U(1)@k~CionD13HZ7lI3<@7d??32t@QNZ!eD}Cft%f-5MHm_8_o9nD+AQE6-_*@ zFxBi9aaUf5^EP3))(&y@uzhuGn65W{vM7ax(wl%HjjWdqh_YR$dQG@`L!0Q!L5jH* zy|ig*;pL`aiV%HVqQHKo0qLC;%Dao*REFhF zHSB&vmDv|XqWzmf$OdfUuAxs1{OcFV+S}!lSwHUIrs%-yiFD%NpzRY2*5FZ}a^!F(%bhRR(8jHH8@-YQEy(z46opJ($1>{` zOV!q``$*lXUk`@H@$VC4zTKZOyC63CcsjlH%^#X{mjl!MohG-_pv)jkGDUB&_%#~kbnHh{CBbs1KocRLjQkQ zODLhy4iJn3Bn|?-7Ax6}BUC#tY zl`!-2LIu)ybXVV8A4{JOWEQQ8!Yr+2D1rKs%9T@&rk1-6p?KSFNj&NSG;<-JaEMud zOp?I^8x-SUYC>O>OguT0RWMH!3OdrDgb8@_Qphb!=M1dXTdSZ9p=CN{%BhuJEf*mk zGuI#%5E~gZi807fFn2QOUmw_`W&unRGEkMEFrch*V65V@^uU*dhCA)(Az7sJ6q$ut z50)oxM%{u^k=tS(O&x~Z9ESj5;er5=0(MtXu^>9<`D>cjFNFP5MrToo~H?(+WMh zBIKIU%KK;<-36iv*QF*luo9bnrTb--XHQ4V8(*g_HQs_+vr_zZa(us|!ZWN<7NcEPvWk_~L?I;M-fW)#$3~qMX>IbD?vG32V z8ETARS z9@48MTH{P@A#7)E1D)A1PZy(ZSePc!1k_I>F%l0?;*Qp);s~G0M<8NFW*w3TxbcQC5JU0(wJ+nh{ZG8l4Xk8AzRh*W(-{K>q2k$BxISR^wbXYqQC zrqL%kj*{#`%8m`N(8bzsuaI~&1V*qNwzD|fkz!I4dBFffZWKpTq{1IjC;ta0AQmME z<6n%xK;2vD-Us&pQl;LFlw=0fp5CBa4hSB|B6R_^XkZ#@P5nTDfwSTkz^UFM8Nat7h_X4_7idr3NeVqohPZvdZmgR% zdlO2o{vi{2@wG$Y|A_IF_xFPg?73G*qNvHC6OX9%i*I~^97el57$a&i9a274Qfn=T zHZkIm`yn`izsULxNR09!xM$^LE4<4{X~2oJ(JNBoa!p_mvXt;zIso)ZAtB8!G4bP< zB*IrLTC#co{EONmB~j0%cjWVZm^k~nuhuG=@nhbUv-)yNXoL5>hvw2)Myv`q!-({X z40oN2wH-LhQDPV?!_~>1Cw%ma*3hlm8f^`@2+ESgx8R!}?!#{9DKNMtksC|q>*d34 z`)A&L+RfVz!Z$V?{cCr`Dg0p%2}diyTh2xfqEdxU#I4F;O7<5hh=Hy8KaD=7|1N{Y z!0;cel+oxPe&~-H@&HU6QJ~UuA_&0AXCv~4azMAAHA>9$lDN%UTKJ^!3<3-6g25PE zrV#$?Rp^wvbWs&_>;|{Q@56TCnD*ldQ`gt_N;fGQFz_v98_asNoObN31a|Q4E9Onm zTcJB^u{}n{e|D5e?pPJH#Ja`;U=Bqrlh(J36>Ju5JVn-P_q6){dMwVR*YUnEB!(2m z3w{gDR94U@S0m|N+NR=6=P-gv={mezknhWg7ZccP^>`MoVsSQj7DJcB^1xz4*JW~b zPsazWOSkSdv|eww!Vwf&Z0+~dYzZ+pSL`ibm*#Sw_nyoE;1hGfFQYj`^S;1MC}yu} z@4j0}J<`BQ7hn$n$aiso1I|R#Jx-n^Q_&A;10V8j@viO+E;(kTj+@sYc>rH(fECFh zTfDyKMsqCrLxtKTI0m_CP%d-Pjw}l{)%GNR51LBO?k3$eB_^l~MJNR$r#`GF4TeB$ zBtMy{+@2{Ge<#108zfpoer*II|HD(J8sH-l5bGUNM}ksZzBG#}8_~>mS@ChlEAME> zm0t8q6jOeYt`$nP6bvMcG|Ti-9h`*OzG&vmgSB}t0dbR~oh@&v`g8YajcRkzqT zdUF#n?8}JRxhh-F(^`in6Ut?%%y$`V0nMjy&v}U40FBKPz$q5TFN9|dU@8Y2YzWu+ z&GQ?ZqvXK=`?ER`r0^3Mrd)6*LyRiKbc#TLJY);dtrL!uvk?OmBIB&s*{N+)(% zX%;?N5l;?@^}8f3X$31X#~(ROQaaC&2bZ42;)`R_7KJAuaQx{#+tJHK+lw<0OUt;V z1S9e+K$A;{aFvGvMPe#}+{a2(SpWuAW5Hvagu^}un`RlkJ_EZN!#)k+vo-7_nA$lo z{Ge&WcZF`$v}yx{ckUM&I*$|rxwMOmt1KbJiB(QH1Z2~3Anz3Crg~gfe)L0ZWc~6j z!DSl?^=Ya0!P}t@8n$8h-g(n!?8L#?17ARhFW)*9i^$X=Z*|$>^LGs*`EVkIL&B!@ zwrPE)7FM0cQqVit+n?DT%k9r{(>tiF#XvRXZY;>hq#{PCozb)~RAsf2#c1Q`y*t1Y zG?cML=7YU;)`+l{9%}j}-I!cf4jY`Q(VBWHEVM5b&}FJ%p8$kt?x;g;b1~V+ zQD$rEfittJF=Oh%#1Y_`Aj-<%&Cbz5IKNKBnY|$0%}K}YBUqFw)fb^koD^26RksQNe6 zd_Ib^*z&!PPrOh2asCy>X;p(nj8kWnE5Syg0{ZGcFJcuIQY+0aj!h+QkSFkN)3!)6 zx&Kd(gr4^aF!a?*d|=UmCiCrSifs{sPQgFTLYDt-7BaK`J3{Z@9F9WV{`_#DYoH$M zEAtg~r(%~YNZS~ZoJ`lY>Myx>0$1CjV#$7IOfS1`V>f6EXEyxx3 z=H>k0V}Ac;pO%h{JTKD1jcacnc5{`D3+Kx%cJ8vU0T7EYE%#CJnD!noBPY7}<3MTgoYrH2mts5IZIGRzLdrkbxsLC+Dm!g+3 z|KIp&ab4V9V|IG=vpdfzm{)CoDT;bvuGvj&YlehG(G@#_@=?zkJ`K-=MlN4ru|E+5 zZNlrhI`pp&5pnOn>FJpMV}6k8&zoz63b`#fOj8gLG#*%l28g!*!`L}SN8YUMe&S5* zOl;e>ZCevhY|g~CZ95&?wllG9ba=A&dp?|ZuVlJVyE(NCSip^BZaxu zFuJEDU}V4}u{KaIwrAUk%QspS?NYWSsRX6-$SS<2Y=zO3qJEi#eVHS1nSf3{RK8Xg z7iRCV|31Ywmx*xhBMc7L^nQ)kq=te2?UR+~m|CYBq!7kniN#IZ7Xmjlp4eB6`?(%+ zbDI-C*=~wcRf|!4CXL`V!7t$*A9C5S7=`E2$Ru`FuPP&TjROD@xnLEhDGjby zwxqjMntqpRC2BN~`KPfD5tEdWXp8>C290P1{kZ`8R}4+aEJDG<`@@MEGx|zWC&DI#$U9eFsJ9CZM3c>D5KAo4nu~uWOBXG&`nF2 zQch*Ax0+M(HtxSR+g-r@nS~*JFhJ=Qy!kN2Md_1gvnIU1d0JEIVkTm!Y|t2$D|QtH zTG$~bi+@L7fYGd;4B-pGh`&Y{eG=swEPxeW#y_LKN{~8s)?-X<0_GVeEXko%pr@X< zIHv}3$&zn2yrlgJ0@>#NF{^u;V%nJGs|;xZT6dXInl_nr@kU6AeD6%7U>;tp`&-32 zp;F2R=v60}@{^ko8iMjnQ2AQqEalc-E zTA~AjlcODcw>W))<40sddzhoaZ5o7K64%YO%bePh>x^f0RYp%|dsrtAL+jl~7QDLT(^}U=O89ai|0ayWaj9GOxAD&X z@y(j};pbhZJvYSy2Hk)%yW#>96D0XnwV@7Q>v<>JC|-l&uBbSLsFyCEwEoa}b$5u! zxTACw7t8uWXK;X4&3MQJ6*?%#)mcMbUALpxd`+S6eS@kTihz7bBCj^>J(c6%xySZk z69BFst}My=m6$b()YUIpzzY?4u_x&HZ042wzD|6S~{c{R3r+Kk(vi^5cv!6N2Xrb1EA= z5338#RG0t5{MqT5^Q|7o_d^a*8it`0+m)h8jZ$)_mgfTy7oT0E`UUb$gkJA<>qZ>& z*wK=xpHY@>Pnr9s6WF=MkIdz}R7~Rx_X@W4{dFFL=x>0+Dz{C~Qy(Q-G#gpFd*$=$ z@!c}sv_!&^CI1*~fa1@@Y5g?RKZJ8yOs^!EZ@3AcrLggk2`*Z#5babi%{_NUJYCb% zH<^?I6?(IjLD4|qUO(`9Yg#I<2Hk_Mafn9iM{pB$>-IGgL5Q4*BuEIQWUx=Y2~O8k z?~za9K|NlGTn?ET?yvs%yOr=-BYyV%Z(QU=34;3^CyG*b^|IuD3Lr`h;i;4lv~%~r zn?!T5-%t|ATnniQA2mJxfKMID&OdQfECL423IJNNu zWKA@a4anO`%DAH`x^OaG<_)6&V^*D$jmWtMrL_VQ?IF*8fW4k8{n$8da)D~73pP{e z;2?lsDQ*geF$Grn3helKzDvM?*{=HIYTlKcHPTK7nYVa0ysdmDX_mmq*%vU0WdyA+ z$h!OBEi`rbV&>x_knb8)ffJ*@*CEc(g9J+PP;jgiOf|$YyrkS}?IT4zTw9p!t}5#> zOTAn#OqParejneF*s*I2uGjof6H@MTsu8Gb3jx(Z8OQx8wzn*hRyOooo?%) z-uHU|l&xQJJB%=ME}L2OK_+tg!Sdy{{XrA#?v^+-<+Y|JcrOG--N;1UWZ?(R6S4Y} ziPvj%#LX0)|H$Odru3VHDb%+>;mjU+D&Cm-c~9E&A3k=AcNeR(*YxMdSMYeZph)Do zCJ0%_toYW>_TxG`#d_ZK#d0DN5HybjV`wpZRiWJ;Y!;o36m97?aJSHndMS)<)zb^K@4r*#qUjwSb(@V&jynbbjxO_4n z*u2kcj&O7D=ZeB^~G zvT-vnPv{gE>)!-jS8Fh}^R247enHEXb+fKO>{J(v+C*8`vtGp+#n<{B-lk)cb)EQe}VnW-$EmR(EX`8YA$I*n;zs{14fTiRu5zW~v_cW(*3(Rw~Z64Dy7`jErB` zcaBcZgv?BgO#h#oJQg;V|9z9ED_4Wp48QTDVX^w_Ff5<{caI={EW044P<&RLSOT_~ z;sQMil*Omd^iJgArm9l}C|edM0Q2e;IC*>=z)MVZ`!f#1cqE=Qa$*{{(2ZSNk}ofh z$)du>VkBzX3cl#p2rmzVKU2jb2=NHT^RU0QK!9J@IJVTgO%kcBPaP&6uE+xE%@nqW ztRY7E&jR;KxllTMMI#}JmLFeXDvk~bsik-GP%JC84vMn6@dBDM)p?PXB;XDnj@zZ~ zNLrF)-HFYDwQ=pwSnZLgqTJFQbh_=&)YjxFWY*q4qS0MNxq4h1#X=!fQvETU=kU(4 z1KA=a>0#^N5|e(Mm#Z2(!xgOI=w8u3YVh(hzn*a=uAJA9p<&@#4ntZH(-*5b)*X3L z4zgFqD5l#Nk_6Ae+e%WtK7Uhvx`Bsh`~KRGq5)vTBU`Ys=C&$bTtbsk&Zs&$&U4jK zfh$0$whU)tjhjdgOl~Qr62?umPM;AP@6R63Q~PQmYYdK(s0dza@0=BmncX}F(J{4) zoKXRYMdqDt;}GYi3~-PJ=@Xe*SRUINoa4TPKI+0-jC6sB5WfaIM;3b1TmDE74Hm=Y zx`BV=hFRvfgeid88tg9+>&iPWa=75?owcQ1$*!vbNtQQm3`=df(otBA9!>uJ2N!Tl zN1HRC`;0BBYE0z~KcA?{Vi0g`)G@Y9Xo>69aAHe4Zb#R z&Vw$8L*OrH=w!2vL{*ye@Gb4n<~oL8DR@2V>HuL~mag&yOr+pwaXL(L7!F)-d|_f1 z_-MRpY3%oWGRv(nq0V2V5rOC^yo1YxdW6V;W&dJT4c6bqqsfT3MCo$Dghu(|VBZ6V zpd~qBu=>5PIaq%O6REO~;>GnLLXbz9dVQ-gl9&k)7A2)I&pX!5bw8JVw%LKCG!=0? zfTS!YZdKxAy8$3XiK8NsiF^6Kk&faEB9dt#e&<8m@cKboJH+%2>aSR@(g@*5gbuX0 zP(#8uwbiTRN7|R5Mu%AG-2%NaF4Doe=LgB964eagqw?3at-`x zoH0|6meoW+9NV0sdbs)Cr5OUYshF?wtpiOWf6+{nRgdXDWR+<{Y$z3vw9@5kc|v0Q zEM_XQ9GfAGJ4duiBwD2yy1Fb*qgZDiw&1QLuXNp&$hqGv!+ubfT0Gy$k4gDWf+et* z4HxwDh+-;)B3xCo*I=Q5ywcO~NieaS1tm&^z&1zW8R^(WIeccAU-hFRS%UJsjg2=p zRFnGsJ17|!yoq3yraUpNf0AvE>NdBFrs9MeP!@yaa+Q)-!LbV?kY*|a-Az*l*s2QpvAw8;1U7A&i=edf2=;@kJZ}e-C>V5l zPa@(HF%opSzc?#io7yEPKVrO??X5PHOn3V|T%<7Q3;4afB`D-{dEUeXgpVD%t&Wk7um8Q5m6&matO^A*y~n%=M67DvCL`xajoIH@afozr{N@^DJ_PIJ?nwR)`7$F<%z zGro;gDgR9K)a$XnoigLWbP=EsB(fs&s{Ry|s1^CVBeaV~&;MLsPry4MCyQXe zJp(wTI)~_v&q?e;f2kS1mDyuDC;h08&oQNJUrO-a;n~A=B__}sRZwk`Rq&Y-*rQCo z4E%b0yB1G+39I-cpEI%o6*wyGi*omKCyZYFgR!@XNdKAU9lkaTwCm6|=6AAOr>h@X z_mbguj7}&7b+}5MO+2^eI`jnkYRF06TUa2H{^~@X9~t1*qQImViDV z!)t5vMHqvj@q8JYGWE=ZG@?ewXfrs6KL%WY_;FGBfa<=K(bdsHNtzP%78ch;{0Kz1 zVnm7v;;KaLo$2dS1;b@je7K5L>pKl`I>tixFlP927`I~h5>&pbNNws5MLP=5-#jXv zaBGc@R=*d9*W?4rd$OqdPekQtZjvNlePmB)u7BQM6KBKPVQ)@k@x|>->>n4tVl(7( z#xKwxp)#q9V+l3LXtQW ztGK2x{`^>NN9o-3c|YlGE_X0)sz709lJ%y~V3naar_2*`9E%kqb3~x#T%szbgE*%y z5i&<4b49>F6a{u=ivQ_dA*nbN_4O!1GGF)%OO^}nQ+3kcPlPF{OVB_}!U(=7k$UZF{BQpWL!**@)T{OO1+QyEzl zeRq$lZ^2FH*BVYHd_LUz+V?u~HPiudVygWiQ|Hg2c=v+T%#~){K$N=Ev@qU~bvoCI zlux>BXIQ)qP-y|D`_f9;HG9XTI0bTRDr35FKc*BGQrF-q-!v)|83}3HXpj6?fS4%aW#Er#I>Y(Mf= zIqz=LX6v`K1NNKu`oGmT=IQGLPts29;#+rr~ z(Z8JMZ=1g6Epwqc#E*Op?>RfnRpS}Uboi7y9%=mDYR!|@4)Ig+p67-S^}YIQt6jZ_ z!=KrXu|@n5XW_o z)bgAoUuiR(;U$=2`BDKqpm?fGh9>X1;O6N1lnBy4;0XDID^BIG_axDB z$k^2W%8Gm!@1CQrX$Z$KIpz_f_r|%?jGpsU_Q-~JpRsVMBICiM^vuEA{xQE!{ruLv zScFL372ySen78|6AnU$~?uFH_r~X`sV?CcnkWney&SW(HU4ZVngC>YqtGdT<2>MF8 zlUc2;`q}0D0pa!jqI_-~``jaF+H!B%ec}WbOhms7yR-5+zIpbEbn$(h71G9m;iQI! zpMmCLEY)M~?H96U5a2CbxbbQrZ~5vk>AC0*CIDA#rg0jWg&8e2gB0AdOF(2y-q54v z5`~1QwG#tvTfd$AB5rYIJwx$*x&4ED}+a7B2`F6%*z#*Q^8FsS%I|TF^#psBj_W?K4eS&()BxBD{JCViIXk1J!><(+ z*qeUj=2fA(hhKLs4;)Mhl*C4idgj8^Akp6wA@S|w!M>sX3ZQPzhc4gGgbLj7MY%7A zh`$ZEvF)-6uD!f1for{}=S=*61!hC1UsghMuCv9xr(&X>!9J%#KQTWh>Er+5 zKO-yCe_4C;AFz(}@#uASwBRQnn9d%?eXbCWp6h(Uuit0kCc56r4QIyBIGfv-9b~CA z+>&Y+EUh1~EPp6(9uwZYW#85Bs+6MO{L1T)KFscb)-5kc(F~YJc2V{iHg_bteBXuV zy=_NY5P?{^dO; zrSb~BCCZ>*%SZDe^uTu+)qNQ;eb}m-AX?O5Yqj{EBNg5|lpmN^){-cF00bb~tpmZ8 zgPu$1lcUED=J_?;B2W#S5m{C+CK{C*C!BCzlZ)pJ8$ZlUd|cbaMRT?S!?k zNOlm!x1fvyczbtT=OFuxYJtt*syMsVyePB$O9x4$8(^i7IAt%&JoGo8A9tTmyjm0p%%-LblS@V)-vn&QQOAA3(XZeIBTU6J1dkITQk2_gq=m3TvYlImOzxc)Ra+vyt4KrX zpqWa>#)UB6FeWm9nLF{L-GUZA=}$CdMiWACvN1BBsJ$TC(lHa{)c*|H0*?FFWJgdv zH=ikb>|Y^t1b07N7|a7Adq!o>02AKmI!;v>Y23A{fEyVm_OCA>^9N1#7Y~}p+uCv$ z6n;{EWJqx0Px`m4P6kOD#g4uavZ@ncz4mZFj)!@_Bw3?!LIy^^Q8{{N;CGEwjPp=z z`#wp5)+44r#nQ77a?d@idRYSB=rSFRK&#NFT&jQaSmv!pXrv2#Jfhb4k^htJ4lC<_ zCs$(pkNlW19*xR_6#T>+WI#AnO}#~$2!TRa2UgF+9WfPH`y0Z>-DfOis4!w0bU(2J($iA>hc%XVO6n7#td(rJjYJnfj2mEbZ=Hj zJJ473V8iY!HHOJ5;l9V23#6P2ocyWm#n6+->+L*!ARvmSSQ~s`|;%Yr=yN;Gn4c|tMMV7oqmxA~pr zFq{q*-TkwXBL9-cqs0_|Z&8OwM=MYn)l<(BrZUOUhWM`{Wx)gta~`+~@z^PTOVNVs z-!{BtSwk((05Z7sTGj8^^@$$F{-8lwWb>O%`&EtLPKvkdxnJ>uKpts$JDGGBuJk)( z^CqJ*6jr0}Zpqj`!xHb0k9tILdR3{g=NqA9;r&J|&rAh5z{r=aZ=PIN%y4x0LCR=i z2U#M4V7b(4BDv?SQKeK?l-q$qh)1vU2GyOt7#g$ukt(FbIrlABABFCtosW_T@&TP! zNA*PxLOYoxhQ`J;Ff?i=FgnmJaOY^%5=7r5qnr?8;zFt@E7jyEZHQEPYJ~Gvi6W7d zWBqGMahf0klggO_}8nUbQCqq(iK;PWi4D`Gzw=pEqiIDfVM(LMOLy#s6s>+ z6bTQ6_oR3;eX2WE9|~PDHN1#I5j%&GBMg%>34&m+KP<{>5)ovp<~yF)k3eiV)^WrF zbe(mHTKGS&=q0UBKrqN(4jEOw@L2-k8583@ctm1Y0`(y^Q;RZ!W@c^z3Ey79i$wpv zfTtZnA|cA3)G`jTN92y({m8>Yo_~RMc_qIm4F;92+USE@r46Q@Mi=RdGKAKF3tp44 zzloQcaW(p5jUWs-ViKks5T*(P*nN#JDxY5*bW)}TrP%gUo*+Lw$E4jL`` zS8y1P4H;n;Ur7LjsG^Zon?VXb>FA`}?3}sMicL*_j`iuRP8rju0OuzSf&aw~91yMB zJUO&+yGYGQ3dK@xjhfA54f{1o)2s2_H5w%He(jEwhoZCl{gCT$b^eg)a<@Oi09h7| z*!;Rb1&UJ{A$?zX0Z3S8O{(djhM2?p;@LA#A1p&{U-=CP z_T1rc5{AHpwEB!hfu~_i$kaa*(1$-(WCT(c{AyqmATwOJd<5MDjs*;H6)G{uP1-rh zr);ALSgp)n9)L%aY`_NRbKzJgNEzu>~?}K4%?c}GXwVlqL zy4DaxsZwc-Hc_!))ZW9mops%wkB-h5b}0R@jON{g7R`XHRsn|Q9gj7Qrb!hqkSr(f zC)f%M8_Sw@ixJCf$g$%}rONNWC@b#&imI%nx0vktSnCL7kh0Qwptw`o+L~lP zdnbVOCnRa0U$!0u$y}4H#j=RDlNl62>w=R|HcNCUOvy@@Lmb8U(q*0WgMqH2b z0lb2X5Igk@uaT(5t9Jc^Ts z_Ebmki2AOH`t=}M?~rVd4^HI(AsA&$OBq}0URJ#pyvX092CZ`31}u$3by|@yCyzfv zf0si66u@(Mdt7ID2R{{Adxz$OBJncdG7iI0y$ogC@c_LfDC)ozOG595Q$yK04hq;LTa&$7o(Hy-edWRw!JRhaegcXa;$Qlcdt~E6a4E=$YZa#LRKZ#Vp~-9E>jL4`;^vEI-n9zsmMD} z!MSzM-4rWAJ*UlG6*I}vRO>t@zs0?S*LIl`4I{YCiy7GWMdztP?d@m1b$jx9DpF#) zV+{Zep!p7Uron&DKQMNz0&qU3=euupM(BieBhon2WX3XgB1Py_u8ZxOxV2&GcFO9k zrOt1t5?8^ByQSJ$-^Ei$NNc%gI9{PJL-_jg4q?UY#4nawGt^jBySK}j1WOU~e_;&Nr*h6K~-54B38>sKw9ke<) z*#T3TL0ib*92g?X)=q^Vv@L_@zg3uxP~-guG0#YLGRniocN3*bCC?})KV)lfb#2MI zN~X_T>bcuD<+|9De>Fytau%Zx8|7K$PB!%lc<4Cmde26sbN?p3uFWg>jg6}?ReMLG z*gYE8S$F>A1l@-h4q!1J(xV&{tbvmS^4KN5g-D&)_rg{jU3R@kMFQ2sP*>EvQXj%L zOu$RR?Ar~(WN8Q65#{3Z;!wBfc=N(~k1R8vkz1@(+eHJ;w!-L1BUqkJl>Fs@SdF6w zBgARTka>xU*j=ZRH1wQ}`lIXIt-6sy-O6pmKN{}~RcLMDPCeaVA|{4KcsE-fDoe;a zCGC!itE)Boi=slZ^%Oj>xRpioP72f<&l0f%IHu!)e`V31*UUu(n5}ff0`s_?)MJ%1 z+78%ctx|2bgy;*dwa_kl=Rgo<>a`Xd`EHfududl?`QqthE(e1+u5Zw1cGkEgyjmo; zLRh(WxrD!YULAh*Px6j7A4J6QIeBd}ibJb9M1p5D)T@!~cmQY#K3x6;f- zQ!T2UdUxXZX9+ob4!x(^yzhBqjAPf&3#Eokt#0nkK1K&!nTwqLVppt0meGet=}A1N z-&#%!)GP*j-TPJQ`izF9jv3hWW)>mh*kGU~-J(q}+Il0ua^q||xvrEY_i)kQI=g+X z_G*+y78>VGiI>txDoZq2ZBK+eAvBDG#&Zz6XCW=?K->?6H@=0=!;4l0 ztv@mcmyD18HVNlcBH}v?^{~1YW6}} zqMH+K4qEebY`syJ3tXP(NThGYlsoO9G z2Yx`StV_CR2(PocNbzb3LF_$UrHD)W-EaW(8r-U>gc7mLiZ_N}nrU?hTCMm1o^trniyPXXdu$pER&gEm zSV(ZB_<(HX5^N2oET+VE+y&XgEJsL0<+Q6|w4s^UF*-jt+RKK_wR>XjHqUywX4dbC z@-7Sxq_Y-L4>m-=G6eAzWV9oyr`BCuwtVQIReSoh&gE95ZQkid&P&#;xGFY_N1BDC z5H(Evqen?(AChhndul6sA@DG4w_Jt=mhGNW!JTT9@!+2nNSJx!IP#iWBk|XdF=(Td zgw^t*an~;LtQu3BRPv=!e~vMxloa}R&jncKbueuFwewg)ety7f*tCQi=BNOwtmD?p z*?m#BlggWn)Iv6BU)6QHFhgAAo*ozl>4G1zH5)w+(&D)cWO>lZto_72!|M2WlNf{?#HhKhstd=BTd|p=cG$BROdfTJ@WE zbm`)Qe;8_Yffe2*ck3cK{ozmsnyVUCq76H?lD|;rcTUM@M%pU5$zZ93F9t9dS3ap- zLK_zsZ7(SgWR&V^A8xva74)$dwiR|3G__-)S?oN{m!@Qhf~~l($3`F}f||jP$e6i; z&DhS_EIth9_r_U>z?bqQ&%%u9MOsDw0 z^}GMCrGgQ4M>C)i>g0@P;&1TV=K-w&{pdbH)Lv`&k?>T@J$hTeXt#5czT@Kx6*K+j z0rQ~TF?~;&N0OBW2K+XU$yN;qzTxSzqDeh97 zAJ~o2YUpOm8Jb3CyAnoY_|V@qN)zKuwy`ljlPA$;wlQzzF67TIyv`IB1Ur7)ehSCP zuHRn*miH$E)~z{)^ag^}qw0Q4Kh*XF#NWFvY`8oJA%iFczR#FENizxmn7IGDdlOdn z|47_CF<+I#mv=OWh?*2ig_Iz{5#L(Bogg@17HZ}!TRIM^0bhw8QlBC(Hellkd#f3F zP^99}2(~QRYqHKN-&&%Dd~KhA5gqT8d(DG)*5<@uZhj-{y}5`RDF`C0?2F4=?K$lV z8&5}<{Sv2{Y@_7MS$5Kw9YRO#cMmBAUnX_=k+G&dC)>1~X$Uvqv)^P$^mAs;@-FAqlCsH`WBbp?HXk1Bg&^yBP4Ylz z!K$6g-&D06q6(BME_thEmK?xp}FYa&)|YqP$W&5lKEK06z{ZDMB&P*=Pvdi?38s3ppq7U6*8AR z!s@9xbaD!@B6!%mf~7(JzB0uQY>Br-n(K_DjPzmFha|$5N>^8t+|ZpzdyUE%lbhmg zD8J`PQ!6chT3c740_Pez*F@`%JZr`n_GTpDFTRP(l^Y@%n@vQugit0CBF?p!ML-@A zo#yMem^YhOd<64krk|1lSGAg6th63I;!`6l#SFh~i(e9zKqZq|)jYGYR`ZkzQ{CRuA&zyBzJ8HPp}*(Fz61olLw? z%Gwj`Do`?k2Jk*O?o2M{u8dw+)4aCcQV%HMr5m}cwO%`cTSgnHu%susYb7=rd2FS1 zVZ6rvY~eb?+HEUIPuW#u(zc)Eg}B30wOY^fkZ{{+IX%HfP{Fb})7N|qSyZ|8HKk&} z39XaYh7^py4{r^tl}fL%wSo;+69-Srlj}I~z_e3d85!HQfVXq>q}a64rr7IIn5a^5 zn}DB_;Ikv1j-)CXNih7)i;6c~MlzCc{yE}A;1N9&ls{$hj&Zs_nM~Cs(1qy{one*m zRwI^`281tdAQvG9F6~QUESBM&pLDXYpR;wWaI_u9{xl6pw`xI4N{l&oly;{@fIF3J zh85zgyT9%t=u-Xbpl94>+1BU`%cx)Gpd9d_3|hRe4V&zMO1*xM)c{LPA+%O;$Jqqt z!qdmybXQR;726lOgS>Lj8*Ks<-?@g1?N1Z`&;jA<-p$afJxti-x&C$j5zvd>7=J^m zsMD7+ET|n|bOmB*5nac3fJb zRtp^x#a>I)~yNd1h8)JwSfoz?O+v3;|3oJmBSssb>}dBM1uf zMoM-%fnZ2tN+Nyk+$kv1tb%HHuxeOE%ua_DKGleGxO1tGfieypXkq}W#GH?B{6+Hu z8{T6~kQo5zBOJzvAIulxnxa89W2-+m=XZ^`L)QvfJQ=4QVf7@#NoYgZ*sr!k%Iue< zICQ94oi*Rx`O~Eu-Z=C?3MyFM6Blwh&XcS&(zO zUQv58ul@ch{d4|zT16I)|IlquM*o|gN%aP*P8J_eNqC(nsFT|)_T|CNC`Imdg8#U% z%s{18m$`yJZHjsPEdsAUPBiRu-`w^I;FOi*R~VtsFgJU9o`2&w_0Q-=Yx5b zwmX5I3q4cbb{pOYRFR)y9#TzHPp$wt(d|pFv|f5T`kGH&KnmJi9?gPNo?n{&rx%<} zBu648d!aEu(aE_~i9%!_TR#pa2$uhq*gRYjx{5lc-y#MDI=zqeV`y)Nqi6>v0@*%vjV?oTF?#MrcOUB12h%7O{Z0 zeBbIg_TBO92ZAGRs=F7^9N8-={ST*9!f{C>-_|%RyO{eDE&{5N$16IxB{vRFRry`6Z_^f{`8py;^ z^8BRtw-C)cgKVR2QDu+dWURIb7$wKWS!mPbBWIn%{&ibTWgru;)gMJ|YCT3L#ct-E zESZJ6RQP=qJdg*cjQebwHq@>c9r{@cgB|q@ESDx~i2(YHgqW6OQS47(Ril4wyYNDv zfLxUkqB&t*tdwv5AX_fP)GrV^^6vQL?;apOfjx+Ql}cNQkx(4-ZkcN{8e9%hL_%2mSDi(O5RO(W<1 z?$6|r6!Kh+&IE7^Nud~zkbSfPXA6+kB1M3XSzjcAeiz`AKQLk!xS@%NieAPqTlZsyDQw5*jb>&{ApI8iuJb){0QT)0L5J++pfnOjcnW=`EG}~ z9%cy0RgaxUpLm^rzRr~6-OA%evB11=M&=KGeskfb1qQV86o7uc*6HIXW|VDAbBpQc z|Bx?@@y+du@v9N1l5~^25c_gE4-r)2ukf@>Fw9$QXS;5J0HPEED%eiIVN)5N?d$=E zSsZAki%s%X);NV8;XJJs z2$|2|QD{k+bz6fPW+$)OVCIY3>0PgcO>LrNyoj(km3}`;6|O_{w zd{GiKpA~cIW^`sc(fKNu+rQXonP0%1@Hx%9#?DoGY(h!MDaFD8j&5XTZ>+zDz!)6j zYXcr$zr$t&Akg~e_1{`@PEPCk$zSf?W~V}%-uU=mWHe12`K6ZuL`|FqzLRie3y=>r9 z;a?Sb50NEkcZlrM(^dlrRX!1n_ru#ADfsNM5sx5&ie#CKKom0$4UIeR7~&)6n5Hdd zKL^GEHV@9Sj+L0Y7tfQj!y?sA=OvZoWNFS4ijnGzz(YJPvSKxbW#`n(UY%pD!lQnx zL?j*=lhL>wf)IuPDdgSj7*okwNK}LzD45Y&ZIXklou{3I;;O3#m?#AYPEl4)a*X@D zL)ixevY``bC2zW}{Jp%6+)5INy1j?phT9B}@7}v)o|g$%?jx<7?+3($kTRuZ+(J|2 z7SR{75Br_z*bO&K55?+Z(PgQ@B9H;XGt@riL_QeH^-8+2#w4Xxn@ry$fVhB3?v=i?fw7LoFLu0mh@pLpl!J2(Z7|3cx{dGn5=e+mnx)?UmO_bqxfeuT zh3Vcw{f{(*1r$Eo<^5+Pvq>Jj3hVI-!(hl^AJxmP=kfPOA(rtyD?^zQBCAeb``;9; zV`RvdaoIdMPpBh9lDVUA#S!N>U3Sd4ldjvAbBm=)S0e#q4$*g@xzi=$rzm6aQw|AF zGur%O{ajshcRG0~-n04y&m7@r`l@@^<=x8oL{wQTpl-_gw{r7l%;T%Njc8?A7pzTl z(VXmTFzI}gy~lQYJ#he0VZB+AHB?o484iq|i$+*-T+#1f z;CEsj=3CW=IxnvWkvPL@pGh+$9LvT*7C!z5_)6BTB&7-d!=@81=+oCFoH1x#wJ@oc zo{VD#P|wnh<8&1$X~Bp*7k=9cmmXZWxyre=AwY2|+o&A+{G5(TW%4Geyv|sl4QOAV zm@)j2l>W34nm-GIMRW1TFlV`%N7*@tAywL~U9VC-%1)O3f=6^@^|rvxkQ-ca0(c?M zOsK3)OKekam?Rnf8q?X)4_dQ!s9twMyF^+geGo(WkoRQ}M#)vtzObyMMiUBc#?27) zx1dt@UNW%9xp)lq)sti6Yhq*Gs(|mT!&txRx2KePLewd5!yORLb8}lPzZ3AaB!OhG zL)wUa@wi)oBN@GoI1-yK$K*hrybQg)t$tair(2L;f3UDe0RFlz6LWd7Db=U_23*>x zl z5txY4wPd1gd_lbC!`$gti;S`Becn&#MRU{X;Rw9h`0}>>Xx~in9R}JB12@I1>6U{D z{LZ5b>E6!Zz?6UPl}A$9ZZx-bcx|P#_xg?*L7cxneS5_>PP^)?`;^u?|O;2v2Y%4S86Pq&WpM&t~KeFcjam4of?yko{PGVt8__aDAts% zzZ@aRXqG$nPcJp3<@MC|)XdnCZ>1fohz=2uwFkYLjZB0CW^0U1{tgXYlGHkMK;g{m zVQ)A*`M_f;e9-i&GF(?`?$$@ZQHW>yKlmYo3vBJqBYuJky?u`U<0A9_C@%j$_NeS^ z|J$-e>;GM3ln|x;cm56F6nav>uWedx{hvifdROvJm!~}fAB7aGhDzEyVQZv+xfd?| zBMs#D$Jx$pP}jTs^wHoEgF^pw_iC?2k~4Gvd{ima$Km|7^ZQw;3#au337;bV|Do-i zqBGytE+402TU9aN*tRORZQC|0wr!(gR&3k0jm|z_cYl4(*gbmR^v!$mALG6Kt!J+F z%sGE@p9_ttqol*BbE-Gpv8nsx)b<=-7W0bnr9t`TbO%xbnHF~;Hv`(vTRcNXkGFal zMJ+X>@f~s}9k#RV4;;jZ3I=C(v%-p~78?&iH16OmCw6cx4&SI5Z;SGd=UV&}<&&Ta2eK{rXwTND z2bcIF`3Rv$d#T5#IrzDfE^S9w;Rn?BBM*7SMr*@<+q1ijslkbeepWZRktDiEj0!j!AE&ug-d+0BCrLL> z?9_a=P3ptJcDTeV(r#29vP|er?we1krKvvfhv{S~_uwx!Vw{@I;OeHF&b)3?Ji5-k@$Rv*whW%)~>yRFHRU$FDkOZMm@BQnYYwREa&)H|Weh>piY6G6IAeTYGxsap%V4&Y z;>{-6H}u~h9%#{TVaZJ5#wGB~G6ucBMpFcWNOWL(z&QqAOEZ^DV-MyRvc##IvfNXL z1f1|`Z5PGPc0{*YHO4g5ndPE6l`uy!C91lM<(sW8&-f!Vk#tS@k1u(XQZR?O0x>~$ zpC4Rv>T-SZWB#I|{B?LZSc``<0O14Ei30Wrc)DmCFqKFb68BeRsOrX0q(~E4>7{it zD6nHWxWp|Lrt{#7D(Y93%hLij@99J;4x13qtw%ASGTT%w_rsP{1-8JVz%uw1=LwrJ zHCda$?{XFq>=$yX8Pn&gfj5KYCDun!+Lo^ytqU!SSjJtQix)dfex>Pg>vZZ#kqmJk zsIDg-q;ePs0Y1+!tiy$Ky`&dUUM}2%6wrT=2lPIoT3QH-y_+bl2k&XYncg#MCxjv9 zN+5JjT}GkmA?=G_NRn7Z{y2I^5{`w$3l$bQ z(}UlTK@e8p-uv7LIkN7btUVQZvL{3qDZg+{jZm4ql=s*s%uY5;jH#cmWQ@Sz2d(*V|aPgNGoOvHgQ^ic1miVeL|{^Rr&*=7BHF7 zB{l?v1w_vYzi+(#vbyL>@Yu5aBU$-J*0pI(e`3-fIe0s+-U-pDe zFlZ+PCJb>Gt@Q&=ltsgJgft>@P2lm!WtQ({DxrEHa^+KrdP^DiTk}@31H86Ql7rj@ z)9X3Q6ni>r8$fAfT?;bz2iep=3+99r?L6ZR7C9$uSb2A5Wj=uqg|?Ue?g(T5XT75T znYxwwuMTP7ORsP@;PO1NcVL*W2o!L44W{P2kR|DdzxIl%b>tI_nYt{4XNmoPT>C*mT|8n%zIo&VGe%vH3DD8)If^x7-tNdg5nU`*_x{ zXja^Z5fsaeE$EwDnV>f%{h?Epe8YbJ;k~cjQqKALe1{_wgMq?k!_WYQ`*_Ei)U<*_ z`?9VzNp{&TRv;e!_L=BhGT8UVzR%UDfzp$UVWTJ8C{7$eQ1BBS@_tGMTrp z%xn&nf}n{9XL5{{JNx;zn_sZQPZH5WY6Xov0`Mp z9HOSTa&Hap^@PP2I3w5meZH!-88zqy^gGNPksWqaesT<~FgHtpWNa?3$v$6sH% zS-g6^k|SDt^xKC;loYne2}(M}NH>@-BrngHkmkvEjhHCD0cTFym-*yytMoMX21kEJ z(|Wz)%+7OQm>iws|C#is=ma7)UDLtJq=M{H)WCr5TPbT((;1Ehqhz5aPdaxHpqeDzu32QJdCskPZO_ncy~LV|0Hk_ATgh)t zN$>BSMs_V~DEXi>=aB zO69HZqn{TlyU;p1=+;z_J-Q% zr2+0SmZ%WpM2sn%Z`Q**vzoVBm7U=nvK*H5E28en1)G%F2f{eXcnYn}daW|t zU>Z02qG0mWUK$xKR>M~52C)f&4K&V(I+^iea76$(^!W26FQmke&e}W$Ty@KjzhCC80KOJ|uNlWjyjSOb&h~0;Vb($Y9$4h;jv>E>;9B$f z+}2>@{=)+wM4iW4+T=7*5BZ{L zAuCK&x*HT`WWu_hSng*^S+k*08>)FBNs&G|*}Xd)c!I$D%K=r3kvM02NqS;!^O|3j zn5*mgpXbJY@H=*|)^KW|l3bRR87-|O<`XaOh18^?6;eQY?fmB3CExFbppTqdr^^>* z0n){IyGs3X$-%Tw65fcEJ>df6!z*k@CkgshV`YM2TgwS&Wh)Ndg>H)e-RW~8n`#QUbi(FQ`hO}qjd*uqbl76OXr%dK}(`8t|av17I)<1J;> zbud=u8yc4wF~?850-d$+3v)$#7Q2N0n!WkgE9A^vOy{c`i^te{ACO5aU6!vJVgKd3 z1o;SE@djFh*puL=r#{{k<7lbBJ#v`-QKqiNtzzT;W#LlsXKbyDP-R!~zym2@@5!!SOJ>8x> z&n~<@F=Ag@IxnZ6iZ;C+@HiBR19q}?hOeDv={?J+(Q}M8#5Rig*&{Bb zcRTo?A{Rr8%Gco627)+ji)yV>Xs5HeU84s6Z6uZy5VwtRv!-&vZnC{JtgerCv2tdY z0bb!eQ1PHOGN|R`3dnzf_Nh|V)+k0@nDYR_#X3%czGXHHD~l-e{@o&(#$zJWvNu#*`D|{f zuY22ETNkP(T$eKCNsqdG@Y7^O=YaLL#n>7X1;%n@xFUsSAWMVpqKTNQsBYX0v|@X~ zcG_4;TlTQW!)c!>sFJJx=W~IkBj&A5y##$}RlgRNTOGGRDruO!H_-y07%z6d_G=BzljT3Pz(9<#2_ZGiLMfvXYNZr1-@% z`X}`#Mp|~%L_Eqi`c#wJNf_z-6l!tKaMC@uk%T$MKb()T$BhVGRDrrcOr zif1%zG8&Ey`|1MAL`oL9igt|9QXWy8X5u(Lb8bXIt5Lb-J zIA%RY$WNj8)P(E&ioUR?SphfL`E5c9!#yNvgd+%frOq=6XT^S3h*jp`c2US5Kd7D3 zplv}ItAXx6#!lc>C`3ZgUD2qk?o>V}E&nwixG zZy+Si+%6o4C8Aqrl1pkyO2K9iWZsQ*DA=lT^nP9*P&|Fl{>kLNCSJY94K9YBlASCQ z;Y-nddt+8X$G?oec2-s&kB+D;W~y)nQ{3lD*$%45?fOhim~<6znFZpB;35;c*|Vk0aCh${ZK^ke;J^kZWBw>^Hf;pnf; zp?^hwD-*{dlXPGG;6wi2%>R}7y=9akc|ceE{QjeH&Rj*trN~4wzfBep9w&AZ>j_AI z9Ka#-*`OQhVmx%Yxogw>thngnO3C&S+|3*Zc--2e9ZP2muplINJxu(Gcla?39#K97 zpLdo~@`XO3Nc&jW9;Kq*?aL5e!+`cBpgcJI6^QSQeZmb|nNh_ru!nsBKG`TH^H|Lf z>PLn7EDQ9g{0b7~?b;~qqI}=^iIn-y{WsSN_{qZ~Z(&{)s>KDT*8rP*w-ynCdFB^) zi&wS7>&j=_vfFu|J@iwj0{5>&WTx<rX#nmJ)PP97xNa zy9V$I`g(i^4&M#6KH(58H$FTBu#*udSdA7Ftlknq$E+QhejbXq?Q=H4%!S<|^l$6! zo`9ar-(TSCSqEd$OKV*v#<`GZXv4LH?Ib&`%{)^hqK^JiK8@yigPCtZZcv7;?`>xx zhK+=@PkI74F4Q)-#YTFhaWvc1l|k{F2(VZ*fHQz81!sqY^ zV=zVEd0~vvVsx)4N+yd%?LP0Z)GSu+hw(TZwH>dTA3dn7T1>#vtQ(S22vby^R|`ff zs|yyS1bUhEOX}f<7^lM{H98CH{64v94)RPICZZsbydIMR@_wRaJN#5 zY-T21kI+39Wbe`XNm3oG6fpG6M#ESrv2m1oRDkXpS2J&V4?CcUsAMt*0&5ASmqNFE zCt_6&;KP{)O7?AX{B5Ir!=kULMiSd$6x)1uG)p~m%qcM3jGFAW*sHUm(2he_({C|4 z$GnF{oxBJ6U2HjMeC{cDSw?0dF6Q_cR?OqpVF{tn#E>_cB-<^p(TqtuRpA&42!u}B zzh=n;q*%`J*Uy@Y@9SW7%?a1=9w0*vf3mtAS_iZACz_W~7(Y!O6g4L-mtRvyr5d&w zVwT0p>Vc0S`~)h_d1Di1auX`r9d1R4XmS;4vl}+}E46cJWk6XKNa6_32Maw|QR=2d zkZvnaC}Rg2bV%D6nlny-3#DHdxGPZ-^MJD#6v`izWh${VAU_uD1w2gi1&Uwsyyr?B zim2mBvx84E^QKaTO;nS3XrwrVB|+rbReYivQv%xxB&Gv}daHU-rL-FO%VHdcYojLY zJdsN&6|zLihJ@{YcrnYPZM~8y(XSQK@nV)j>x3%EeTUJzJsr4aw59aalU9QD+E@IP zltwG4Ik zVTE6e#Q9ed@Dpg>a2a6)*jFWt80?d=>R**Ga)9d|vd_-)-wp1u>RH6yk!L+W^XKOq zZ9LQHbs|}%z1#I-bWEbN_m4X?eP}PbF2>q6r(I3zM>ozU1lErfhKyZac86PBZ2`nB zTlRVv4V849WR{qjL|!Bq!&Gb$#z1-C1nIzE<010bcz7+Fz5RO~>}xy( zXc8y$j=amZ6lVzka_#Trz*pF1i(&^Vucj~m<$xFJ;N7U=`lW1-Gv!s8pC4EzoxX-c zCr2;IPqlql>eXHCM>T^#fVLXA5OWQOkhPPBG5bkdb1WVugye+=@FH|Yi{>eAMXHP{ zWhnIm6ui8=l{|BTDrMDjM#C^kpZ6w4ok%HI%TDZ5pfOU82&i!r!C0#UCfN`A?6JX> zd%d*;>Kjv*Nc51-K)Zov9N(X5Ck@~W@@B1KLodEB8xAwF6UhyU9!XeX?4wj1(H<&8 zW0bHyTEtAIR%qs7vb$j1E%~;fL3Dwm%MeiZsMh%vfiQ+FSk#oc@GqT84<%}VB2Pj| zauf}A^j!AJl_n!TlTI-!&zq#or+v9MTy!X<^$Zw{S`we>@tUAGp3P0dgHa7}P=(k; zu6zdRLCrXE_W2uP*H&V=S6l=PpT@Y*p!`B550!Amh?RD7loRtr%I1+@28sHp(lj=+ zE>kj3j;X;%9Kxez4rns-*4ZBvqKU`Ki4yrTWzBn}!fKPuExCuzO}CC@rGXb91@bCB z(M}NwBw5x{(IMZ#crOa2v6p(L4)J}b|z(0=5y}T`{AQ4DSK{c@`E$+fqyEg9aMyBPSor)o| zVuw`lH6+?SG35eDTj|Oz%|?^*>jp}8^CWeg!Q%o~b7q*`{Xywy`lF9+Pr5arbV~G8 z%hgu4(T66-{1cjQ{-evElGtyT;%94VtTG>(L_XLR6`3gPB#2V$Y!*~m;2(yY2tUd( zUWgL^KAe&l0)Dh0Vx2=bCnkI##Y8_(P$gcH5@>0lfNam{ivrFZ3D5eBnO(oK@2}FX zWItGE@MO{GB#mzj0?IhftAP~tyxnByRW`dImHg0t9g4Fu&p?-i1Jt@}ob9J>`IOvQ zO2Wy8grima?Q_q>j)Y+S*DJtSTHO3XNjIyg4TH9OR zD_&iHH@|jR*ONlMZlqc-sjOpj?j;qwC3plXL|oOXvn>{p&@JT1w*_10nr}CxkeFsg z8-|AdB|=rlYK#wYNdWivw-cT$Ec7+c`W2vb=||M0Oxdu)O{ue~H_gxMo+U~I!NS9J zU%esIJ1qb`%64LT=b*8Q^zB`v z5RS@10UE@zj2uXpE$bY_i3|HC{tVpTtK?J{AgNLi5fUX)A1e$VQ{)&*Jh3DR(UrK2 ziy6jNtAsh+I?n&%%hJBw85aU_SsgnDKwt8MFkKIZ#Iv*di!Wt?ex+xLZ21h)tD62_ ze7PfbZ2^-z#eKx^V2=OdOOTR; zRK2l!r}pH0o%f)`qgASLkDs4DS)twfj6YQH3>SA5!7)wJ< zt0*!)g~A`3({nCiMSQxxqg-4l9LEq@{?v@A$Ipmp91SsgNA_gv-HJ!~_W&-|lCt#= z2);!8vQ2Eo`{~C?ezdsmYgCc>IWejn=t5bLr^NUG9v+CYBRyFX>ZI5%ypp_6sFGe6 z*?R(iN@#JOiCc3EF3^&^uMZvmWm{l$Pt%a+(yhQ{{Vbyt+yo`i43~i}d-g=@KuW;% zLZrOxC3(#tWk+znlrPOWlr=loTxCTf>cC3VBrup&8MrT1sUARzX1#|wWtGpBkmn*@ z)iCsxd6l8^e|k3knurwj=f}LjgY6e%)Mi~E8RD5( z#pJ(?rKxX|UnUEc!oq7X&sN{%%#)8_*Q{jehB0BbN~8B#ZH9=dWtIMH?|kDaoH9^>(OTntnb)EzdF4(sfEFC|1?%apHr%a&5}jiSY1}fZGE-t8NCzB z@rbDGx)fCu-QznYK9;<44@`Coe0g;F&)9u%pcj6LDJAIho1xPFO0}m*#&=yj$<6E2 z7FZL)mS~9JHifwk+96;mH?)d38{)p1Eqt9T#r*E*V;AD8$g*-_5W+*b;t=O~Ed_3s`ierjcQb$w(l3l_q_|oQSZ}CKKpT%m7sO1>pIIw^fLNDXXBI{v8qS{KuYXBE_{z*e;!3n{w z0uE7%`ck@*KS!N$=$sVJSNW*OOASgWxxYpi=N`1p)Nzn8$~CCRQiNDkgfynTC@lrp z=ZkI(c&^HW@?`*Cpj*ru-aYArsQR;&YQTeX%CM6Mvnojzc}~(o{V+#}drOy`DeqFn zj3Md@z@fdjV>2+caK~bb=5IErfyR70?l^!rZ7XXg zDkkBvwv7k3={g=ZW=wlCq4p#BgtAW89dr#TgOGNLn7Y&wUS~?$t>NCiCq!~JDOrk4{C|L!%}* zBgk=wiIt}a;2=>Uk@l;4s><|Kk{f|h7j4xKaqUSFTtRzG=G8A+60Cj1zIv7sAQbt~ zy_@{pJmJFtZE_JtJGa%d7bctYB(vN+$ZZspBlf^rDVSPm7I?(Nb^OeEgAeIshkmg+=Y7mXYdeKU5U^E7^ZLm@4ZOtd z1i8zL`Ke;~Hi6{w*x3OnGYvuDv@x?^x(vML%uaZWu<0%{r5*eR4cdt|aTyYDOOWxo z^`;Yl+h!y9%uT$1x1*6x8TZ`u1Q|f$15%t9W{Bt?UMmldW0dkdthc`Nj^G12!S&7L zZ_)M7JaqI7|DJ*Kf0Rpy{xEq0L+3y>g}y^~{3_pA7)h6O7^3juWyF=wYf$eoTW7IF zXZaC^JMntmbHU?MG<#>z3UpWAHcIyLlDIIKemHq}vFWM z(eRMJ0GI($dppmDAe>42b&O^DY*HDUt>U%<(;>S2D6>Cod9*gep46cW0h)xFDhKb0 z`@!}3RS1f{t~t1JWEgIZnb4=|2&%8IHY60`B-x*m?S3?^e2*Ien#K#gj7Y%|W-w$eq_zJzS*CP?nCA-`g^ zEw6NF*hS^RJ~DX2{lMA;4);8SEccH9Lh{+B%ca7pTK|_MfQ&EzMS_q_j!|i;fd+To z?-|FyPF*ClNK&KmwePJR>dcn7yD&!+qd2#2fHqShs?>+B6!|H{Qw!~tQz5di$-bt9 zeBHp7EmP4|oDwp2JD{~~T6u%b>V}7Bb_s7$bur!;(pf+dO0?XA|8PeFj7rD42&d&Z z%TfH49(j((Rul?@cBnTo7`JU9@v-9%sk~E~A$?AvJML_E`r>U3zxyB!&#zu~rrcJ> zt0KiCrGbB+;HK!^{Nix-{cJtk!anZXikFNM?Vmz(3v(+ja1E%jMv0OQJ&GR}?%3f? zRQUY@hH9}0ZE`yTSu~l9*AB({zEfVqS_JU|M?6joqQYExp%kmx_cLhThcTtiC4tuG*o?6DvN;&gf~I^}IMRnT2&2 zFj|TezZ1iZPKO3`hhQ2V?Xl{fBrgOzAlc>>iQ<9ITjlQQ?JqSb4Qswjhq<=0^7ng% zrXp*z^)TFDg9UK(*q0mps-3w>%*1n>$9uS1Kju)_gPvsu&|Ipu*`@NljWJ54(Tvp+ z0-&wpSgcI0u0b4oq(XW?XVse-Ow5C}mzw;P<=UG#Z*7AZ@^Vn`pIq?jI|ijE<^1Fb zjoxuH#r4spB}F8Kat1uGlnN#1?DmbQPsU5i@hs_E?(XhOH0(t*AL=a4e^QXJ&w~MC z`XvyS+*^u%TB|KqZmMIfp=5}jkcK-a2A*$0DR7c4)@CsVI^idm#2-&E7upr)6hvY# zP9A&E8nvK2MZjLQM>6%UIs!6x)r@^+g&#QBQc7ZiJ!dyhlxH`aObIf$eeqH{p-v3k zxl3deI{m0W+2;oD`uM$0L~S5WCWW8g^}Ga7D06u$S|OKweBXVL&J6Y{Sk6mIG$3U$ z;}w3t-S2aTyei}P^LIAZTH`I5!m-BQDR1!1tNx3@y;^??^@e&+J|d%>VvksXlJ~bszOL zWIcfQ$Mj*rLt*|Gs^*&WAgL_&XK?LLPF;d|+t%jI4RE01R{T3u?bwJ9eR!a;J7KMB zZVn+Jo}2pyCmCL}vSctWX#>Jwx!$Pq1NaGoCqaWvE8v{oCa(^!^q%g$T_3X`Or+|D z;T}!)T{d!V``(`xGyn4Ya{U+v9RwvsH4hclb#tgmx^f)?rJbD^h2%Kpdp_la3Yogj zZIWB2;HsX6^&<~N~kyi8c5F&wEu{)Rgrw>H}a;C=2$JBbt zJ$8+vCAkWu%W$WJRhhNctn*rIw)7tkWl~h4b286oih+Q9%i|K6{1UfBYJzH#hd1KI+d$$3-9$RvAut;c7^bV2>WxE)R z)4&HE8c{?-T2ETe$C^Toh>G_BX+f1wsouir+|e?XEoD|Ootp(7{#(P0_8f>RZRObwC-4Q%fz4_;^0es!oI&4LJV*&)i@l zgDci#qa#-tJ%*8Cm9@k1fniK-wRPf*5-Tg42{KZ{&G``9AkDV){&yO?mm@YY`Qes_ zuxHGYPJ?Nvc{zljfr}%)U4FDVsL}wX*z*nli9l3!2e+kRPRkqaQdQ%N_akW+VW(eJ z9Byr@&FkoBWYyF0E#rJ$m#7ED>@dj|8tzBz3c?Z&0Yjx|_SY%IhwSqrIuS? zhlh>&W&Rygtu4LfsY;2plv7VH2I5bkG;~K3Yo^OQ;5n>&;ih-h4i_a#^jvB!u|KQG zYA7g=$Q1EQU{MI|Rel=sNgy>Pev8B~F|1mWMP*t(=&|REv6&UMdoHt8(?xf)@_ti` zwVE9)U`Z(bMyMJGEQ`KlkomD*rLHGqcDlLXv0)A6$Jkx2%x z?`YJBtW3vhGJ(CBf9Ku!{;A>n<|z1Pb1vx(P3(Or>{VWXH$+gu2q?t6`tkjWJw~T| zlkvL`b6B1mApICO)1?{&c!{o!@P*``Kfi4R@3*Dswd+*>qI)V2y0?ng9{@?QQpP8>1 z82=+3;lJNFtHe+nfrAl%V&t`>IGIZpk^>tLeL>PI^KDpBRfE$f@1DKh$g=g8_}$N;@C3~+JO8h zZiIrE)>1pk{))62ix=ru$6dWB+ytj}ALxCddES+S&A7dCOY96yvN%`#+*+|#8=2Bd z%Dq{5Av=)Nc(XR?*)Pw??v}p?yNAz?yD2KpHRFuuC)}e> zxYfH&!sN*>EY;t8#kd`YW#?z`!Ni!|Vo1~K?=i9A!PdvDi`X5xJTSTC@5XVrq$hK= zai)Odq3q7-vKOc*4~=>T3iF!a>FcYK_7rvuvz&Cg(Rxp^gPG+1#t8}%JcSd(4b1%r z@pYdMp*VpIsl#V*wFEdDizZ^0@9oeJXM!x=5?>m{DG9MT+FdFXnON|nZ9<;r7 zj1NNuI4fLhf#ECUaHfy`&`OL9$@o8hQEDn|?XD!+LNHR4(+{Z3=c?civ>tQP=jLy= zO5Uh&t7oyNyA7kP-3^#`Oj088hCB`ufxA##Z4XpS0yWVQ=KXK?=v2rQ7X#+@gCrY$ zBP8u7oIG|eS}~lxL&Vmb(p^K85tV6%XjDx{uo^QJCbaRw@7;mKzR`Lwh9txvE({p>X+tCF86Lr} zyE3s5t-|XlF?Vs#+LSlmf`=g9a>+SYx6}N20>(H9e@+jdzsg9?)EMb!5JI5BsAX;* zggqIBEO7DLxH-1={CHNp|ZRy`xu{;@kW@no0L6nzR;c@%)gUH8CHwOv9Q^ z+Bjp5W&cRmMxkM!nDDHWba9sw!bIE!E#1lNI7laX|J<;EaD7O-JZJ8!pMRs&7(aFa zo7BEtw)n{JFy9n=E&i-Tu?Rq>1sT?1X%R%!T8S%LktY8|Gxb3--e+pMZ!`H z-T!u_J|R7R&5Zsk@b|3H($iU+WH225TZYye*k~F^j(8adLLX5 zp1k&rUcJk(xw4|Gyj|HJ%twt0U};NtS!G5*9ts=)bL?!iC|X(#_D|4bi5!MD$3kAC zXQZM!cXhq>LXQN2gc^ty0i`fzq^wY|;yc0*u9Na1hI1((A^7ZF@|PwjFbFn%>ks!@ z<-Tw8H8-Kw-z4c`BZH@P6VfT9HQ!(1sONoZ(f}AORSnU(S-g_e#8h4P@jw6Z`AM^I zDyEiTA2B1|Sizl`uW620TGW$Aq%PlyZDzUvFs%7DFI+}Ym4&Q-XjX>#d~Ni^7Rk&0%G;M;-5-T#s=82i2H^w7PaK1JM~C3_924I}s@NBm5T_;lIErO0CQO+Xm7(p}Q7~ zVtRq@Pf`Hu6|p%guthM+9)D}wQ6w$+5P$feAB1)v^bYhr|a;xhK z9VpYWRzThf>nRrE<*xQ(+~%{p^hXZP0N77H@t|RCwo8^2{%HD9ncwgO!h5u%$bI=Y zk})*PH9hPc!pMfTg&-RiAoOCWiZuc4R;3rHDlxap&+)6w4dSg7h24@A#M{+#b(Lc7!xCJjXv&ItrxfPPb`S^J4~Ch~^H1BBZw2U0%S3}@Mk>;LrW7eGR3i0; z)9e_%;sIk5@6e5?6}yJ$P(Iv$!i6T@Q zE?+rkf~QOlWvrl=*Y0!_r+i&f?aR@AP*u=Xn7I~Dh$i7<+cN=|EQ}4JT_kffX$D<& z`knLIl+t-v)&+fQ28~rRjbzSIhJ`V^8npc}!mKoj*C+Z!uBPM_I_)jx2` zxJlU=@J@7Ouq4Wo`GS!qJM|FPxv?0+zKm)6!*TzxH_k%b)ai?h2kJ3Yp&PWo%sS@x z{x<=SZ`N?S^BHSmJ)13GDQ>5N7_%RV5n=dkDen1;Dzeyk>e6SIa}55*4@4>maXyuv zis8SriIZ1VbSfcH)2a-Ye6{6uu9S8-99}cSANw@HlH0v(=(N5WHI*EwmIb-Qjg;7# zZT>~ZI|)&L+%GcjR@*g)C{_}?p4WEM28q$pJ4#e@VW-DiiAI;TZe|@fkFV(F()YJh zC#+Llrs>`I!btXA73nc^CofLW80cdW^->D$jGx!~zU+e{du=s)wx(zMbd8Tq0&bU$ zHZB?Hjis@VUI{eZ8z=kE1`|e;FPZ2aI1gre!!sUsV-Q~s5{j-W5MuQ)m(w`gEJ;DkT957z|mJmiv$;gu~TQ2zSiMq@HG35)gFI4xCv>%`Xy~wjlX>^ z&<iKhwKSS;aCg}NUi>+v&=gnX9X)_$z|AP zg698%!}zO0i#J#Y5}L% zlaTV_z$LddN)c~QEFO3R>6l=dfL~^JslieONR03V5XPAGzh+0W`>Ojm!EKIeNiuxd zEakE3vAc74?L{i8L!;av#q|O7`Rhf}HH57~*N0q#Ro5O(|_-#&!7>2ZWuR33#UOLH9A&Wd#)GOq6Iz>{sBc}uGdN)K?iia@w*CQhYpB&=iCYSKIG-|I(By%drPc;mka;-rZfG%3V_u8O#dWGTZiAw z(UiTmOJVd|+VU?=Zn2NXn_N`4I8AFEuSR@X)7CgWP*UE%Xw)ArRW>tl=%aNUZ39OHd9o1Q1(+WLeX6V>-h4ro285RFmLjqU?_sccO&_= z?90x3C1tPYsotv)Fl z5#xSJRf|W19-`Ma6>@fvB1H;a`^jG~Xfu9pdW^sQKTxRaHv0#)uWQpHc&~*Ypi{9N zxxH)&NSAt3PaCIb>-=NwaNRs!*nzmD`#@jBbYR($+YTZOzEc?Lvgrju$|frKw=n!? z)(A$1e}B#Wf*~<8Z09Z234&wn(uAb>Jupy#vegsyH2$3e*>T%{0q%5m8)Z4rafot|04hQ>&FWLyG++sH$~ZDb#ca9*13bcljtvw?}p3WGs4 zFiY5-XU&tO|Dve$W$2N%FIjI4YUXNi%K+P}NDsrTKeF%84{P9Tx8dgX>h?-Jll89i zFD9OSF)=NG|8wuGw$t5m3{p(rp%x3z*~x!CUozoU(`0qtCbj8kjZ@FXkMGAF#?Vl7 z)+dvz8ty;6pi~}^L@;NK4TaL< zQgPi}9NF1_iD#p*p-p1BtFkZg?ENQ){?r}zJpCRn^zpjHVwk|wi_B*R&H#ior=Zu6 zRuh49?E7TOKG_&VW}w4(^B z24u?g(z$Ov}h_{nqwm*C-&Bv={>E4r12FxseGx=Xf9q~<$pfJuYmkDBvw{Tn-v`@kRc$Y zQ|uFM%7sgN;a%%rl;!dfOT;XiC?%Q~b)M7+iPM!sqwIHxCf9_UoP(TPVYeZFpgYU| z3ya(S9XNn^CNRwqnWIfJhN@G|FD%NQ`F~+CLsDgp+AK-7k9&FS!gICf)q|d9{_e0^ z&IWbtq?1F+`{J!-VRE8L91Zv($$8!gboYe!s*;U z{nz{eqA%^N;2!g)ahxwNlt!HVT3CGm3VmK-*!eH*T;6Z>rJd(DWgL*du(+g4`ORqI zzqE7Qi1zMG?d7I9f;(vJcbpDB!`Jfl%GkIe{`Prl+hRm0(%_3J94Uh~!`0a0vPB!K z7q3QVRa01cS`?$j{dM`D*uQHOVJ|6_`yAAqFDOt(F_BnE<5t%QU{rKiV~#){Z;tgm zKb%rhd1VhEM?53H21I!5qw8NZ9bt_0uk`yjmqb!yu!EZFnt5NJn8n#Xuqwo(;SSN8 znhGIRKyaxN4gR6J`}VDaP}_#m54bP+vurxB>$+WblL3zb~Y=S>}= zy>IO$-U3t4g@K)<@GI78k9BC7FU`@8Fj#w$ zkjLwm%mSY}=5N9K&s-Ud|0&EzqYas1*Kg4tAt{M#Z{s8y`9O%BiOfS(=kg=q>Qm6V ze&La|w8*4g1Vcz!yqqZSn-LJK7JGbg7mMkgQLyGNKV;S9<$;L1i)LdpGsMQn_rH=n zp84~?l00T?J3sB`R&*MjWAUkebxrM_EQO(4NR4(|L@~kLeV1B>q^U2~ndF@YH*@y8 z9|>~zE6lu*E^j;wF86G1p6yW^q}urneN4~lu48oXXr#@LzFf@UaA`sv8pTsB(+Y|Be#fxRZFYUH%M1K$+ z#+ip}9z092uwir=7CJR7>OH+Cibg$$*KGlo85 z2PxPrAMc~GSjxsG3hb)0!NSo`<;`2G-xvp(YMz#7R4?>4O(I7gqq;1T3Z-W5^!O^i zlIblnV8S|7P{BerN8Ytmnt~Za_%>j+@Kh+VOz5R7bqD$&02Zc_%c#_^I9Qi7yfOoeeUrPs}sbkjzA;HTp{x-iT`#jr{rmrJ^l1;H%D z?PQ{h|rX!!WNwF?v4qCGn{ zl!o=9?ItPMO8rDTUd@oozN5|C$#@F3ZCInnE7;X3TWI>Un)Ly)$xjA(?uRBS0;=Wq zIvkD=$;KQptqL|-zqA+C9ZG90W>1RJNhj~!bV8|t*Ri!|JdYOQY7Uc{pXWaR-A&CB zU0oc1+$5GaRJ!kE2?j~FtSc$cM`cSE-vxIe;RO;u-VXKCYC)RBck|OrGG>zs`k5|% zbER5#wm-DcA6im=N2T3g#a#D6U;SZa5nlDn^|#ki99QUBh9vGPVh5c^(kj087x?c@ zQH8ngA4%UISc1Ap5xe?>$=bgEX))#r+SfgH z4H9UY)cU-bXj?zgp!^#k!2FXu-op#@Z@wvgpJXO5WWW3!SR`und{DOwR7RI>wszfb zMBjZ-a`?FOl4PhX9eENunvfb$hvx9%r7#Onw)c?v4jDYG9TtazAfMs%D8WMs;c4is z#m6pXh*uT1!qgO;Dok+fLIMmQH~4JU}^Ed0LXpy@ZQK%Lp=#vrsWi^!?YGz=(3_C zQkHaJ;H*69YxG`dZ4h}MR8e-C4Hs3naWh{srxfHx(ZCO5eKrT4k^R6xADY1H5~R#b zdN|A8t1lpCPcwF2%|7{i%1b@v95tSskzm<*Emm zu6jRl0shC0a4$i)i;}4__}`!)B&ZB6q{ZvV!)n%N(Ge^d>j)PedCG0GMCE&~!LgLw zT8K7l6$mCwj)tld)@ZQXiIH5%?I&LSP!>c!r=h5Ohi_X>ji#|BpVsJLapJ!^d?!}V z(xU`V5!|m(rW)H1v>~0q@609`<_$7sSSV6{Jdd5!*;qu{!B#mWEEkrdV0*SE7a{^% zboHVN)X$ftoN`y|XBuBL@}zL<7ZnAc3vbWOK45z0(3xL*O5;-~liho-Jo#pf=#P1$ zx4o6iumYUL9a0P}>a{>r6WLa=I-pO{mT5_73F%BEmSyW@BC0HaHab_BrPVQuQ&v18 z84D8mUwTPqt?aCW)m$QKUWT|}n-{U7Z&7<#P03y{A}}XlThrm2Ka-3e`K0F=@1UTz za;YSzj^Np1vz6{zYxuVJU*#+uxxI;1be(j`t8E!SxSKsN&v=8CKg~&N`d%HMX?DKh zOZZY3WyE@c5M$QNaz*Zz;cD4;CX2nnLJ8?s1^l_Q{O~~5vX3LeMBNHmjKPmu%s9cb z{D>603SI*K-q7)SQrZBn#`nK|gw6diCk{D3tPDDqNIJ^H~@E(|u>E&kkv>K8P ztuZcWg*W5hM6Ac(id~6upFAJZX7GMOGUD$FSdO75d)#aPa{l{T7`)LdWc2h6RI*kL zAN52by$8CE@TP{@Y&!vKp9bQzN}j6*HjCj!&!@CmUcqa($R6LPK*x4jCA#Xv@N^^M zx-(W^ymawz4odt1Yq!A!|4{?~Wgdm`zdWI_=s78b@6q!!kmcjjit-i+GIp7;uH6Wc z{3k4p#?70GtLw_eaxI-Of=Ce9m|N>+HDABW*7xrAJELyhv%Gsr_46ZI^;E>SY4vm) zbrz|nX+DQbC$TZ3J-o5=zNL4@VSx)kKbA7~&^qm9vWT^!Gru}#-ofKnhmO+tG1Sk^ z5?c+kTq=YFj7Hjz*~%*29=LT;wgrm)3z&>9CWUjy*Wi+qyt7qaqAXf0@qTF3)vmR| z*q_*u_MXFiLY@uU-b_9PPYOn|;lLVKbg~9+ra6)@PRGiW^wBn_OhL{Bz3HN-iPE2L zL5r4|Rx>31fZ4mHL5!B6SwQR04-W}7qzbjsMG12*1<lkYkWGcrc$G#mQriQZCj$|lz*nzL`d^lUi{Sc za9{;vHJWtjKlG^{ivK>>bpS@{lKkmB|=HpFNzu|LW*fAcSxNmeK6Ni zFAim~SOg*N|oqxik9}4)I_0%=!;lEb)NV9Us;Q7;c^Z`q{L+Q5< zb+vI`xj56V32D>|t<#BHll0xxyO#D`gP3FjuCbF|c8&4`sgv00ZJxuuDnTJz+{y1v znDsv{o`u}~Q}>;zgWfF4&S`mUm~BY%?@`fhY3;?XNtrrrLw~wZOUrrn6VwxEvDvj= zl;j{R=R5GOrSSXdpOj8^W?*N}&afz~R~%VenWbv1rI&w}I$5!+6tQ5Bx(pJmLa5b< zH&J0V1M=-M1V-mjvdtR_-+c_TP(h9;8T!U*sIix_YNj~`uM(3JWpi>m<)Ul{k^2R_iG zo)1JF{Qmm>hf74q4~{H<=oOFSzQ^3!HE}3h7gD;*y-yTmGN3iqYhCmPDMUH5A zkaOW^s$k3-^jWb~Mf1$=H(>93yGQVz7qq58b-e*DfZ^(gs;XoTopO(_UGN|>4Bmef zseczUVdnTRk(#i>`HNGgJOoukB>iT#7{i06|4(SH_iWu%{z?`4;{d?wqZ&}sypyBu*^vWA@-deBb=x$Po?fwKx9$ zoc_?ArMI1pH-`TJ#4hQH;5P}LcRt_0Hy|f9BYgghr*PxtyYpbp%^+@3YGGe{P|#=d z3&&3F5ZN>3ZPfc9V)`_oJ@+ZcfuoBI4bfdb1Ji4{fK_;nF<*c9yuW?M>@<7d&>KK3 z@DGPnrh6@mRlQg&kM3+|3BpWF4FASi6E!NUH%ihF+(k0E30p?!BQx|x3FTjW9w0z8 ze8Y>T!Ljm*?>@_ZR&Ezr#e?q>QT##Bi_pzDS~`BC(pl+bx<9+`!Rk(_mK1Q73er_| z?1PW%+J2(Nc$_e7Wp<)-z@Q3C_{}w5_VMxEm{%ZuWpItakSrsTM1o~wLMkI*GFVhO zuy(9;cUO#{GW(5&wWobJ^I(DQF?p_al(wa;J93~1^+3r1ouWaEBvQP)NQV<=Dyhdg7q(S=&Fze`=w1}ut63Ioy9GjM6^@u64Nir8>*_g@*830moTHG4A zAbSD&>w9li3iOGn4yAacDr+9C6QVA%$+qxMQwv27rHmL$>DOFwdIxYCWBKO=2ApB# zMp8l=7O##H)0pZqvWXB)nG^T*wyLPwse(+iS%5Zrig>cpFVq;>tYLmvq5{ULVYtYn zo)tYuzXqYahFUhq>nRAmUHWE&EfAxVNaL(yDPKS$(YjkPe!sHrJ#)*T1*rh{14vOAtj1)h3LT zX?26xHVuMxx0kt8*jFtxmeSI+(e`TqmynQbp!DfaIxi1%d%Hp;WfanpDxB||Qc~I* z1OCwyh?w`JV!h~aY>a-A_6%;fD{2fr1wOI*hGC?EyTa<)Uj&hi&bU;)cG=hOkDRS1 zU7o0+L2SDfvW}KDqyO0^nzbtvZ1=E~oDiB3vSe1S^5oJEvY896bha_mtYa1nWAhFZ zCYw$yo)8Ij(`bg)p#ti{UA@R>j(Z=UU~4!c1FibCnz$=Gc32?dM&e6&SnF1iiIlo# zycZUHInvONTK7z(7i0fxY0rKC;d#)Lw+pNqzIocKBXDtVq5;p}M=PdU>Z~&+#GgvW zIuY&y!CT&7_!8;O1-Ujwi&@g$?qrff`iZXWi4!yBn6vP6!CGc0;uI@w1c!NwXosUt z?n{+qoiITnSChX&09OzE5g!j+2A`jbUpbE$*!tP9a zaBLVrxz71KTzX&A#9*kN$FxASuuI<}-SS@( zF8mYI`uwZRg8=o#9OPjoa!~EXWxBU-1Nve-wEo~dWZk&j_H-padzxkVN$uL6+X>(u z&Zqi^C$+O|d$5cQ5Eg2rtJ83MQD`vx9dqvo9UowW)N}g79tFh0iQUk97u>hvrX8Q; zd%j?M3t#B^z~ik7^8Lhdl9DfF_SZ4+W2AiVxA=Dcos|D5+5a+L!}z~JGv5UK|0Dy| zpW!2k{)d21KpU$a+X~9N%*_2i1pM!u^VnlWkWJeJ8G{>a3`uy5JjsKhTl-Yj3CmaN zB=FbiW|Qrpn{$Ax$gg%#VG!+DuLg4%e-_;io!#c8-bvm z{}|z>M+n8+zW^mWmA4G&fa#S4X~wL)kN$v++Cgn=SXs@XInkJUor)6$m2(x>93=fT#Ch2 zs+2fk8J{qft>0YTvErRnEc#S54m$wJNT^{=8#%_wr$Wk#pt$>| zHGe#^HF+PgWM+S=j*f6-E!fO=*qLR&GoD7}a`n_;6}=8d*r^&4D>A&Nfj3`{RkqJz z_L|o|Z}T-9MXTBUV$Ns7U$`)zs#Er~P;r~h82^M&e3uUS9A{($Y!IzwNO0n8$J+Bl z|1cZ7M83VV_<$b7dJ64@`>2s+F|U(z*4I6h6;SjbGEK|HHgAL|85epv)kO1$r7#HJTML266sa^n?3QR06j6iXVp$f&42Nk0FU3`a z&QI_IU(eBut9Fmw=dE zF3=Q{%Q`6-nGkLaI_RAc@gkr64LbU(hde^fnKpOIBbUHRfZD%X2$>rDJ#ZbMKv!Eo zPHr?4*?mIsXX$IsQ{NevnYB|(0YcIrtx>Q1 z-+(r;i7Ea`p;-Q1tcH={f4klPC%b&~H@hrB@&HcrxBc|n0{WX>W=_*f|4()~`8e)E zliqDkmMyTB(dHxeT_SEibiz%aYf1CdQ5WRXy#3A`?_+XmtNe+6=<>sUne)4)ql#P4 z^O1l!r+x2W3f#Kipi=%_z>`5+I>)8zXkzh}4TgvIKN6KBn)h|~90w$i%Uow0(M7qzg*JA&llD?KyDZSIc@i z0lI^gX7pr5Pw#sC`&hx(`do3}h`OB5-Z&XpC`orEByTyn#jwJ>A-YD4ec@OSs;`k% zGO!hN<~JHjo<`WoC8XekOL34Yinhvm|HfR>Tv|TL(E97cvhRsZ_;;BSY5fn@)S9<- zMTtS9bhFQs&ttx1m!}AuNDBukF$>`he4}4TyYoRE1wX@H`#A*kLQn>R&S0jdtg3o1ZCH1Q*;Hx&2~pYIrF>PX#enr<7PUC5D(xFLzF}dihAxdaNHt=DgiRN)E0Xcw)G?O zG^kRSL?Mw6Vp=^|*l(vs5)48V41=aFEl>c~QE`z(W4QiYYMV;_M9H(5;{;itLM^HH z;v+>!sH)JnbsZe*0Dhgv|8;D*nN(=~>!%9!tOwR5RyY~I;SyZQgU6lKIsU1175Q@J z&m|K)sCc9V?X6bNyp5g14~uWZDq|&^h-n_&?ypKw&Da@B$}#8W+TN5+VYRYWL4ayc zkT*Jv@rRY@?l<6s6l1_NA{A39ii=31IH;y!OVN%H=guVAYoe#@<0{qrQ8~L%)y327 zkLi{Jh_|XdI!Iiy3WlyAv^0qytIUz$ki%}>;oUFBm`sNbReh+8HR?T0-LR<2Z!AmJ z|6GIhEe_q4DDhOIA zTBq*5|5~@ff{X<@d53-6jTd%n zwpsV`bQvt&aITEZNvL55UTWSN!(E-6t!G#oaGd+#8x{J_q=$aa4cONl<7OBHU&2ka z(^}+Gi2;(ZeY;53szC=JM=+A@`lq1>=0Q<)aYx|nQ(pW1;t3u3o}7D5VS9bIW$GT# zRL?$t5OIBQ7!<|Ip9Ynin+^Y6bwb^L6sLcgVPX2Oino#I?|;1CoW4_VEkw!6o?N)U z85YcwZ)<}7QfD_v{^cV!Uc-B-0?eq8kh%>y~FmNzVp#MTb|%ySU4{F(rk|Mct*etMN*4^3RFppN^|~9k7#?BwHT! zH6-@%i|9qf#p7bM4eJL7+waNAPO#xO=z~JVK!d07a_po_O}N#V>RXFvyA!u?qR~iY zPRz#AWZ|#cH*uyhabSs!l*wQd4)xHa?)I&AdDe{&BJ2Xz+}2-n5>KHR`63(-6gi6d z`>(>DgqwpXAU(D)YA@p-fdC#uy2T@__;snzJW|jyl5k785i7TyKb?W5xv!{uFkl4J zfo!O`0hHMUpcpe(N%cr_|9}CcZ-=5kyc&~J;ahhcE~4| zR5%vU-_6QjDD@$B7wQA2+R_vcZZZOprMf?r?1Y_RrYey_s1ynENy43FF*B{dWl0Ws z{;G~XcGNumJm)l>d!as_c5+FPo8$NtGj1o==0PCWfS{*A{CKud62Kfb#xsWNz7=+K z>?6+~EA)dpK&lZvR{_g1*`mL7>aq+7GNq}6DgK%qv}t9E0DLdg?B&ESxt^YWT*Um2 zIZeYA6?!QhL0Cz`8-_V7DtX?GoMdQcb}#*aaJ0rbNS6Lpe(psnWEZTl4=0Kk2dmXh z3%8B2S-Jif5@x{8_`v0$PC56oo5?+TW)#=@6Ad7DvU;>F_s^ca;qLJQre8S15Ga?Z zl`38>N0@nzj1@e{7AWSHErlb;%ik3}@h@^7w?Wij@U2Wt^e~Rw@r=>ZPs1eXCZ3tG zf0Xjp3NbMb@T|coCj84g0S0P%GZIRkn9b|LdgoB8=r%&JU%q<5<3ker-~!!d3fZsC zk6<;l8Y(FR#VVZZ5G_b@Ndw^!vXlReBbNKV^2_Ff4zh`6&+P|-vVk0QUGNML|E44i zl5WqQ;JAvsr9B>P7tenO+HJ$ux&WI(zHQfu;Sq*5OrE#33_U|kX&tIzZl&lBJ0H1$ zC-a8mN#Ol5@UAxVzBlm3AAZykF!T0oHrt$fycT@KGr7umH%cs%lVE-&?d*1fCI`HD-0!IAiSR}i(=xtLy?b&}dAF6pF zFCnYqk3Rr$?(y)nY@W5^@wRMcv}~Tk?>OtH#gJ|TVi38%C#GXrEg-)u{VBo!1Vx(a z0{KTR{CBYxhX2YxYxYL3almw5sUL&qOBIqx_4I^-wn5*ku{0aOOBSz;JxhgT8XSn<4-AtmXcdX=i zx{!BjjDNn|B{-iP>x{1pV4K-;vDMT#(}aw)63ndw$@iwE^j%MV0#j3{LlJ0Rmr(-f zVdiMAo>=i%;mh^Y3894f#6hjUhvkTW%b^r}_cg>6Np+B!lKH+;2AGM^?|5< z60Oz2Y@40``RnKdp0C>D@f+<0xu*DB?$X%;w8jU$aTF| z%RHGO!xBNe8|=pSjhdH3O2IpqCUE<_wjZaV8RRr2%=sd$U7J@E?8eN1X^b0)aMYi(Snf5Eu5n(!o8gE0#0&2R59EdgP5+Q5%?$3 z$4~2rQAo3)N-VeG+Hn-`eOhS{LP=$WfCXKarcjr|${7brtCVWvZs!-+ZtKbi(mJUP z6v0^f;V&fQf$SIdfHlF!S;K<0<)W=EHl^#9RJrl*9<-A=}s)F#u4>C%`WA zhtM8TRQky29VY5icW!_1*OZl+Dp#Y!$g+ymi2WpIbxt>T1s$%SK<0?^f}fI|w45NC z-gw0j+EQhziFq_uVtCclq6*c8*s;_MEtDI^qA2jW%f)NT5cawGy#}}N+l>b~(>N4! zUKx_Xazjn3nYSACc%64($+IQgrWy$SMbDE?V$=fm)Q8!fSLE`=QsgO5Qo?(WS6>nF zHTVx?Hg4s*2Bn@I6(2g%x8L?$0M^n#0O9#Ta~F^GaAJLlUb~489%Z=lIDgm{N%EZM z-6X?b%bH+X=$*xB(W^>8zw|=@!)myjOdyEbJzD-r3py@rAPU&7K7pF6r|}Qgdsv}N zsG@n|2mD;T#@Gw25kRnw07ki7HPoJ~qfNP4ERojL5G!&gyHxF@Kt`NHrC*cumFZZW zdH-l11D!fM43IrC`9V3&Z&l_R=rH?i&jp+*@o+(}5hf693R)WErC2jZ57}FQAlaYg zob|OGQ3oHtY2ck|s;2LYkA>Ymvga`;z)ki+?R(p z<>Pr_-s|G`Xo}aSp;m+^Zz23HcA@Nvyp^=@WgazxNeiRSKM+>tGK`76V~D*8%_2M> zKq+lZ?1{a*sa7JQDZ_JoX{SRkV|m%el_tBf$J-CQ0?zr-!5&gdepIz_~r5qU;S!hXR2-d zPJ?LC550Tv{eadFzPakhry1d=DAPBj(7eRou* zG(~9|T;0)6KC@7w&~c9vpt_VQI;4$fw4SNAkGiVUsAE;~3Z9f=?|EEyt>7p9A$h6j zuYR$)sQKfkmpdW0oNCiET-hJX6VnF=D?Gn4EV?2|tZ`BZ^`u;^a1^O>#UExTk>K^E zbv{Y(<%r40GJ5&(`rUXT)j^UVEbr7SsFl4x`%`*{OlW2r?*5`9%8GrCnUQ4bESC|n zGUJiF+?|u_gLjWufFv^q)cw|zKu250^v+v!eAW2saTNE7{V$Q-*NXy(jvl-OVUk&H zCLoF0JJ5&Riox)OSd;1?6TOtzCfACQ)F0`B1XoH?{cH$%BfKMUjz((wZ3;9}O-Xf( z>-EAr*H=05BkPChho$6j2h=wQCIKk?elPS$yDZOU`xH6MgtZ^4j$bldd5P0RGsLW9EFWlMkKownMKvZ%Btjz$aR|I1v#KXEp5jtK8*}Zarwb=+41yd ziXYEM=uSZ0sipA4_K2=atEf$Q=67((owEYFaH9&64BkT0Zrec-ugR8yVBNI)P@fXpDVjIMZlABwn5 zvl*Qz%cQJ3S1Wa8OSS-aoC~d6Q{GdP*+{LCXC6j#IcjiE+OX(LtXPq?7aQU2ewzCP zCEqN}u68;hhP-25T51T(Sig2G_^~X>dPN%fsCRzH73zWD?V#Byd9d9^ujj0JiBzWaW1lmUJ0dtY0(^yg z0I%dY&^}o%xj8Y{j&nr==zZsRY55V7H9i}lzKFe#13Um;lxvHFVO`iK}m=OI#Hd-N>=u(r)EHJ^0vCVYps6P%#J~|DWx?ui(9~YVMWbV0n zY6Ya8<=(`zdw~cMn97M@;_&mBleS!Q>6F!j^Wnw1pJ=<5DtumlDyGIRt_#Oo_mxk; z@X~p{k;&XF3nSx1m(PWU&+7?4#b==RKPuh73wkjA_rCG}?ZAknit_>*#DTJbzHci1 zW?%UYbh^NMpKg7(E}29PrCk6p;g=IlS1Xpl-#Fw-o1mYxU3LgH*f%# zbjITZ7~V-(pVfRsuz6cQ*_ZKWwlR3(yC-U_*&KzF+PvXzkxwK!qQK_Pcg;)=g>5Ct zjw9SI8hcTxo0ifp*kg9c$L$KY9u$l>f~Ok}4SNlw)bHDCTT+L=jkdxlCQW@tUk}d!B)C^<9xs?xxZ>*`Fhol(sbwRdYjIDZ@lpo|p;&Q5C{||uNFx_H9Fn$W zAqEa>NHSr?BA4Z8ZNzFc-S$dOT~h1xjcQPkt~+;f8lzj1vzV{_*wx$@!iBU&fl0Gd z67Cj)y%L-#aGoL; z;-DyL=lby4mTq~aS~S~B&^g6AtDGhiOrtQn^NsSfT;_*} zDvvN-aXIq#+)Nu=1W#AmYx$jMsH6FPP6T+^IFsq#T`&^JA!?KtppwR@Pwx`9tB*5s2)yJJS&Qh88^;g==j0fx4s>fPM?V#V84Ol9ohY{dO7FabI zLE7}vtTI(P*;Q}np6~dB-gWCY?g+$O<&te%A{WIJBh;lOQna%HDuOGnd4e}t&~04$ z?iiye=F})&n=E3`l$A6Q?zHKpj4pMOTGKHhNg>63)RpZ_my>^PGX)9H0$P}U@%FWp zYU%{ua%?WSd!Mfv`g`Smf}i>e&dWQwq_o_4Sr*!I$jFMZNBb%d=MZEz5z=Q?7Wz9Z z22Gv-e)6LudwB$WT>-s&V<^^r!PokW=T{@Y=?C668~6{s2H}FM5!>eaAJu`?hke59 z2YV{dEp{|(jVu1!M#pS^LL5fZ)IFJ_V~lgX*aJJ$IyS^Uw?O(a7-?X8dAS~(f zlaxxIIUkoZZg#WrK!g_){)okwjLV5CwI8Jt{;CL%_KWm-meTK@y)%9IEOrT}`~GpW zO_l|TL7bNNA-G1D`F$1nsprg3J)QQ8S69ren3P{mxki9Sq0N7s#Bd7(8OLVFo;das z3J_RI1V!9O_hQ8K3-SdNS3a@ant$%XK4e*v5ln0cF(%{jjC!5HoIUf zR!7oy%J=6yb(iU1Vit*Ckted90aOiXlB&n8MxFx55x<7B#IlJOi?S`I`KZH$MUI*o zG?+*awDl20Y&$z5a*}YqHkt562Z82bEKBHznaP9V1R>^{aR6L-mK%A>eVV6OQQufmlyo|z{v zH^JL-7Dz!&QS1)7dG6u3#1j5McP*Jp7FC>i@LRTnDBZ9PX$r~0t)kV%QZ@55HJ@Z} z7fcHOqoC$0zunym=N`3#C#a;bt&HwECwBiRl6{V- zDpV>?OVv`7sRC%#85MiVYBBdPrMjJf*)@m0^VatmU+g_NLc5P^#wR$?hFJ~S2lF!& zq_=`XkCjFUUue-BVn-dMf7f3ySHKvFAfSKav^X>Jn_O_8E;SM++-b)tm${G|BVhX_g6>cd z*XTeKGUk|EpEC?_JB+jYCw^D%x@4wJ97uhpw+ih+x-OLIFSyUwaDi_-`AU0wjwc7h z3fq(%j4_+!TvQov_VvU$)o!iTT&;}<{%CS9YVV%R1a7%FIXqxt|49Ccp6!-`^*mpk zr%55pWh*wSS{T8cU)EN0?4I%6p(~>ozO)(vJU>v~{-{Ly*04@!+8t&ep27`}wZ4lU zOZJLhLl`TL1-gw#;pl6CFJHkF(ppuSn?{Q16s&{Ov~s+5^tl)H)(wBj|H*O5--Yt@ zB%k-W_a*pI#&lv~tY4FE5&AA%v$|3vE;E}j%-=j=PVgllGMaWTJj}oEF8VoSt@75G z@Kx5(f%X_95q|}x;$`q_3-l|rLo!i6;8R}b-u3guzj*X3`0EXV3%s2|L$#s*D@YRS>Dd2T zzToRb^Vr{jjMY6prReLVbH=}A=1Y9`>(L)`apde*enePcZqdA7P?EP(W`L{s_gscQ zSV`*lPeRA`?*a*oOdS6VXgU5~nh5*PT-E^U1ih<0{kNLzTjxH%Y04DVJe!ty8*a_4 z@x2xlN+7S$sQ7^v~~2USBQh_I_ZdQFO%`jok#U`PB;ZpYMj| zGCWwwOnlKf7|({Qk>i5|*doR}cEEgi&Fi2m>+ffuv{V%AP&)I3VL+krJCW-lMLWY= zmn`zVpu5BBbTKi!J8#45(sHjqVk8KK6-S9u_*ts%h7STRqJqymc)_=mb6nIm`;x0@ zQSjq4)$FE9osy?wzvnWNc5b{E36#bD0+`<~;d< z@hs_q+>36f`c=zqzeXxea(oCy(aB)Il=4rBz{z^)L<*?noRU|-d8oYCzjIj^^rc7) z_b1EZr424?^qYq%xqF#}4>aIOF-Dp8URNaL|7*==!9e+b&HbsYO z0;^(4YOQ{n=>hseTbl0XO>?_SZP>n0Sc?F)4?b}=ygUl5`KVkvD8Fr>+S3R-++LWA z?EzPeQVXTt-wosHgo75_0x+f5U-}eGCGf%97wruh=h2^+pC8^3t&qIZkbh4_w zem^aVI&Qyf8o!El2FENsr?*bde=-=1p~iNib7nU(Vnr;t+= zeAWj*U)hd64mB7LCasbQFdzGSE~71QmM8zg$xzbH_C1$bf6rx&W(5iFtjiZ_v62ep z;c4DeywdrUHHU14cAA%|MQw)+Er$R)uT?mqWfJ>t@{r9)ym%)Dp0aPTFSr*PcS|T@ zOzY9Fi-32u^Gd21UT}*CUD{hldU%iUG6knZnoJv^dfD!Wb+Cvf^Bh%JrWopKnh_Wz z9D*c&PAm+es+eP=c&)MsL338q^mCs_iz2gyOtLvchs@Nh zPHT8Hx~dOuv}$BCQJ~=hs(nW(V$oQksTHyZ-(KxveEH9(;OD;tKBj)XD#BeM@$1nG zt%me3n|SOks|UX$_E}<&^{t4#LYoK8k@EL^r5N>jmGJd^`QyJ2G34)G!yA1?i|CU* zb^{$;^?qjGi*v)#5Pr{PR}pSz&>wsAuVnXEIiMeJC@!PdSGoRQ{=#1x`_%{^Ph>un z*ZdsSm0RbvLouK5&tH8z{yoVsj(}gm4N<>@8J82Qp+AZ5=O}5myJMTOqKXaZKR>SV zZFSxa9rIROd-mv!gq)J`flgz>hq%=2qCKAabG#cEG5%4n{#|(B{~_)D|3InlG7Cg} zufOfRETCS{ZQt#^4_+JJ4CONa?m|6c@4-zj+c>vc2{7jG8}r{Q6gkLue*zqD!DU2V z&c^S|F+V7#?8~3fjg<#1J{cAX)3Z#W4(oRiY@^Gf{Mq?4nlK#QT^QD z_IHHiz+HatnIej7#tKKsO{vRa9KJXl|~z-odB z)SA}<0el^>1b z;3W#EFMwd|B~nzl)@F27@CtY5>kk4dkYOjnuJ(XkJ*-_u?a*FGC3!Oo^))MnNHZ5h zNzdv)l|60J5*fSmU8GV6?R^0gfLu`vZkZuOzt@OK9>C7}ndB9^U3KXtJ^M57q#=T^ z;Oe_r4c2onHA$z{Yvk7c^Dj)x|F?6xZkxKSIsa_ET0(s~X8pmiGwb&zDJvkbLH$$d zf`}}bJ)luFsg*I+igq@^>$7Nih_icJp{V(V61%VN$~+nv_WocalwUnWQFms>&BD42 zd?VXp^(x+dheSq(C zs(I;f-o!p=UARj16&B;@pOm&U7z0bJpDb*$;p}aC&JC3cHrKe?5>@GF34c18Y}SZe z*n)iw71x_2ny*rqova_mM7gh^zsY#nnEj(nu2H+1TC=8FX69KX8R~^owCbcZnv2*G zDsQm;BEV85lDrp5={Qr$5<|NSlLd7swye5Rb9OtVDe(uH^JX#M-@sR&75+?-PqpWV zQw8m8+VZQ7=0u8lqA!E%ONVJa7}#D%^PAV2Srqg`C-nxi^mObUTOIB~gU)GoDEjbj z5g2cy^)XsLP-7#E{ZM%-1ZlXk8QtoSMe$)qt{s3Q~LG1&}+rD z+G|SDuvFy!<@W4M_iEZ`($ z+1?_;QjoynfQ_kmv8k?+c&ke6ZUO_c?kvGFSiCk^YbF_MwdOy0DkrvPofDz^I8I0> z2wqzEJFrwD<3G&1)Q*PWOWVs7R{Zc$^C8fbUddES#g1(i2)#;#zDQ7whP6EH_2S&A z?&X3%g;jnPsQg-96Tt2i`pMy$!TCP*3jx|Va67cz_8AKCHhOG`8*%k?***ZmQ>yQD z$Ucy-L-41M2{fFY%1dk8*4>m&XnR=fvw45>j^NI9hzCOFU2gTB;0J%{;tD0}Fj*`$ zs!@Ywtg96541CJ>Aa^NWd_EufkHYxx0t*cP4VUM($7Y1te51YxulQ?O3T)>IXy;syDsBhh^riVotGQkXT=!xM)H*fb8)_iup z^a9O_0D!=Hlql%LzJY=8L)yLpQb1V)L7LdZFyvD6F0-g=_j~YbA?{TP?A`t zGm9cLm01+kY_B}JCMz=e0YgOE8<97XDvB;Q8qB=_6H49 zPHy>@?oEm3#j-vU0$!*)`dI->VmXQT#7X02L3c#;I-InptvBPBCU4KN_eDT&3wk28|v3Ia5z_`kS5jnnSY7Q)XA;-o!7xp_|FD z=#=j3wc>sqXy=xfh{1```MTM0vmkU#xBSj?6<_ss)9=KSD;HA~zLi$($VGHG4Q847 zmCQP-JD4{Y-9Fbc)_|}tO`hq3Wg%`@{MRgy8lwaOO2&eiN*=}q-e8>e?h`=BVhdXp zoi0XKKp?T}*|&oM&l9xcnzpf>gO-4>onCzAM$zhMu*ZiY0^8oW8DMz3boHM0iW{wCDF-SI)8c@4IaN& zc+9Z7w0~5Qf4M{d-zxGAe&_rfd%6c&{2vwR2Wp2tuhiHI$1~zSG4(z!tNy-EKX{iC zri)^sj1k5_9Jb3}Hr4cE)ZzGk1Pl1Z?fg1k@9*KG#q-6J%Ks_0mqlCU;p}m^kTq_^ z7MM0d@03()~OB?I*q6Y8%ikOmoG(p&QFN1E_3 zH_pv@%yVWwwnHdV+y+x!Uz7XcC3#6{zU()7;Z+0u_AC3Pcjx@e*(*-bGQz59UP4WR zQZ8WhiW6nsaEB4KX#wNvBc=N^W-K|f5}v6a_MgmG ztbg`6fFn%V%)~7mC4?~Ay}E&$WPCE81dxbtl($XOa?iolZ9Tf4%lV+uMIM8j`z$j{ zJ9MDJb4$h`Yt@`cSm1wM18kHNa~uCsyeKpxKCm;-=rl2J3U+q~r5XK^d}kbSAo;Fk z>On>UFs>(wCdLUl-?c(lq#IK!I{Aw94650mrw?K(SELkdL|GKb-iuc^eC^Aw4>@Vuc@8HM4JV~t zG-Z9^?NC3&f8$T#NT3c&rE-W)1|dw)u!we zJm$MB-k;$zb2=80M7PvFDwViLk|dHy>Gz+yXd*U0Ea;gk>rukln~FHw7z=UV&lN;( z(zar7#mszs_vHD*ZqW^_Vu4jDN}V~b^IL6cx3bPS#u@3%hl|L>w=Ud{_YN0LO0C@uRlgVbqAz#ZnE+K^zlw@v7S=>KEvoq{A?yKe2OF5B#Kmu=g& zZQHhO+qPX@c9(72)?aJA``fYK?_US&EF&W$o|DWg$9>N+$2gu-k%dRL?nT~2hvg4h zcg$T|Evdo7zaMo+yOK41nDu^>1z!oH8^)(tbp(RMM-v0?nfd;Gd%__@vIyW4*9G1? zlwPZzqEO(Kg`Q3ZBBH$3U zedPCm;vCphah4}$T$i?jO>%ij6i7tTOm(+|q>~R4o0h9<0;R{tV3R3Uv-lE|GG9}5 zgQo9)YKM?UV%lf(C6=F)o5~B=fJ&{{4b3&>j%oz+8AKst7U|N>RGw7|aCBla5|v6W z@y$sTklgH(G?&5LqEw}9k%e9r?ffp=5?j*noZ9{9u%S@+GW;h}vHUwPJ?;MBGYjM-f?WpO8^5&8@qWmm?KF(+2gOTdr&}B?27cT)!#hc)Xen z$1yxi%ZBFq(+zmj{}*n+MaafaRM{zD-g-J0z~020WEqa4A-*HqWorUKHog)CzYv~l zhd*<72}y8G3u`Cjxu+@N$4=5IkLJgj!u#`gLQNg>i!{~A@iQghtF`!_qD4m=kM&Gfr(9{Fl28=CMGlyqzFBqK zjlD@Xx&%i33wc_czYzc3N}%B0d4ikCrg{0088K1BsHJ_f$T(4|uv-TpnD%c8jgehr zyT8dqNF&Fz<7%(sg}NCI=thB6{6aiV9h%#L6ogKp2RjK!(Alk0B0Uj_FU*t>3+3CM zX4R};{A8@~td^^C&>eJ(M{N`#U*@LSP!&$OnIAzZ2{CZRcC4oZK2KpE+si+;*SFsR zHy;$b3u@@mP`=YMKN%JOxloB7#N%m?R$G03pqk zu`W7SF7KhNQ^i*@*!h@U0A`^7bV9hl={jx2!f*3Cu7s@GQEx!u=_Bk~@fHkvp>Uw3=CK{q4aH?HUuSD} zf2@zQIvL{N&roFlvN9NUm)T-tsk&rM0iB<4g?TQ^sKiWAf_7*2(;T<_+SYHPP+7}d zPq}O+)(KFFf^Y|N2}R+2T6UK*KPG{-Xvde+d1s0B8cepI2HNIWP?&x#fc=WU*cu^b z+uF(|&TQo*sxndi-Jc5I7$s!WvMq>fKF=_USLH( z#E<8kYJosr)Q3etU2>6s_Qe!8pSS?PxmUYbQ}cwmGABzt%gr;ey}k9CxHoVUUWa|b zUFr>;AJL7zIf6Xdh8zjzCM9ECdP6*cSMd0H)B<<6o$%SpU}ke(_EB8EfVGkUKbnG9 z2tB^FhE&%cL3&Kt1j-`n02Xb5d$q%Q48quhT7=f0P; znLi83M!oBuao8*A;?@G>jQb;h|8%ckRjLET`Ns3ZH8u09J*1E0tt8q-*OlFs@UT0eT-CU zW?W>e>0`5(zSwZ=G4znY3%a$In>6;8WIFL0^ZlA>0~7ll2u@U&xYof zAzVnsib!V3bG`{5;64NpKUfLvOL~(m&5;KiFtJm+frpnvTA~ma%=5<~_M0Ua*|RD( zB^B_3-HK|}4(*L-LPv}fC0R8D8%2ubEU(=f(^r4Ax&^K}5;I^R-NJA{^Gvz~E}6R< zW7SI>&(}AhrQ#4VjptV+4upNW0!++zVb`|8!F-}r3YhO;F8At?M zcH0{knhHQ1HiVT$Hpm=ixl!bW&xwjN6E=*d;c_MGo*rC)V!1lotneE%G^7zw-4WVe zC(kOfW=||+CpFW8u7-!0b>7rROdMYd_KnqN7_a~^*j!DPA~Desgr^h9{yqA*py?4W?Nl%FMCKpm!9#T-AivK5^O^u5R~!1{LGs0P8I*2dnt(z-SIrP2a3 z3*dP%gxqAIufXXu;lz=3cHVhQ6mztNxiV^dFDKjn8cl<(A4Va(e{-FJ7<3L8)658L zDw{LH^ZK9@Bi|!cGtP1Pa~}BMO(*F9+iz@I}e3tYD=o&OlpFdBV{|bvM-#T zoh0Aj*u>UFIn?yD&xH=8QG%56ZQV@L0;c*cIu}TxBJ{xq!}BxGKGXWz=DI@J6}tp)+SOPWclxUDwy#U=;0Sv|B2^ zm_NvYTtgf?Y}a(X=*J?;1&8KAhMY%At4`xCrM@;f78Igi3*A7Opr2qpedbEQNob@)v9KVzK$;K!ZnGL2Tt9zi;Ng3jX?$is=QB09FiI_H9# zpY6o;VV5otJj*R`f52`-WZ!0mkIN8bM-icTBR@z^eR5x?IWL9)b3cD= ztJuORxk3ik%g4`MTeOzEBdjBt7fxy6fIcObM0@;3d3uLhNBX74IJ7|c=C!WyAChqJ zSB9zcE=1?fIV}fNtB1y1P{6r2Dk3N1{f!Z@FR)gIH$98$AGuW7K1w5L6BXNq zD0O**t1Bpfab!PbL+>9Y$-i@rGceQr_blyyT3}AWD*vArm|cz7fN|@izr($7Ho;&q3 zp>{f2!xgFWs%eT~tU_W`Him&V_-tT$)LO4rR zRBq3q;5_#p-9GLz|CVeIRt#lv{|Ace%u1l{W|n_}y-xLrSTi}j9;yWEd2uXHJ)|wL z)m)EsR{AoRA`lJINA&?VWGdHer0(Xf?QQn2QqnJ5!@o;O9YVNa8~)y!K`gJ1BCM&r zg2lfs7(i^)=Emj?(0dv}0%m5&fG|rV`EDy1s{HN6sNzk$YHw-=Rb%zd5@F+eM)}(M zb7M+S-NP3bX7hq#fg{05Q!+q(rG^RTdB$Q6LU-a)H8-;A&U!JiUpe+zN2cSH33AFD z`ozGNPrmlch2Z)q+~|CMaQ%EXJ{?rC-I7T9hBIAXH^ZQoJrJ>j-UGQ^uD@|*5gVJ;MQlaIU z`Hn1d%Q;mqon0KPjs7$ALieMlgfUibRJsc z#uFqfJx)!B3$`lyPF%1(>B$EDwdt5+-I1d(0%{jV^Z9B01QIjN1^B+8RrLjMo3^t% zwiF=Uuqn;a`?oE#z*K}mbd<9RUgNO--Lh?DN#S%bf~@E+RlX=fYQV^Ts!=^+*J;)lp+`$| z3Fknkp1fH#fKDT&^FW?f5KirI&Uk9(XOA2K9I^5Cx}Zwq_ZYnfFb5ncDQE=Q0R$*G zLR^z8E&$xmRsgt97yls%uv^yUHct69GPqq0;jqdMPIM5_5ShoJAwY~hU^>2db8n24 z=miHifH$7W`mb#;0&XDh{c5cDmnEEuI3%h{vUwO2$~GDfkJ!>{4**2`0e{KBLy%Z- zvJDl$IOI7cUPHxRT0p^CwcYS^8c@N$3iyct-(z3t3e(+p6u~7z2SaHG&tLH3V;XPS zyx^nH2zD%Io3MeqD!=(M58KeRxv&2`g@q(Chvn0{nZuE}K%M@WiImV#hO|AS zh#hW?2=`q6A=F1j7dLYg6Bu(GM~V30t+lIa+uk~ zbhH;3U_t$1_OTt9o*`CVxy28H(l^WvHMN(V7J>U=Y5zmp@ocTq(l2GCgNTBEl+I0n zg`G52xTw|Oe*v=jWHzi^-1D88Db9u zP0cV4TK^ofnKW!SW9!`Vsfi)$5O)sYy5>?^$MrFL_-Nto$>8Zy<~&kaPGk@W+ju2KuuGU5l(W-_SjnP*W0rnO(+YRuZpf`8^CiR z$DMVS%wFn|?I|2=<~jHs^>}~gGuz?Dcow}tGPq!PUS;;0QZHpm48hig8;@a7iphR= zBaboJ(yY=;7FoqjvWON6PSTdTcf5n+6=&p2=W&dpWmmIelRT+1`;o?CdN@T23;2?| zKvVQO|4wyLo@mE*ALXqU^A?;-7a=~QnK+s7C#$m#2MT!UTZ_W#z~y$+Z{P3TMt6C- z)UaEbr?R)yUrSAXNihiInfy@dCQo2C0jzBIy!w`O$ro^D{)l7Ro9j-^YVN|?_;G95 ztIKCmsMfY=EfMXzrW%rXPsLA$i^6gySsBPhrC34AGyE&cjQ;#-N0iv%5;FR$pYT}S z^SK5$GpUGLhIgR-Ke`)7e-i@P4^5c=f&@_$i2u{I-(@@@9Iq#Jh<{a|Z3wPrk;)pI zTA!M9AzRw4N)?4zYFky|yCA`ja5LDBxLm)~pUJN+V8hfgxjz^j@C+|s8?{2ZD3f2Do?6DVZt0qJ zW(;WGzOPm_-aPMTNL_jvFZ>6$vWcuty`jlOfvR=0d}B7H@tfi;AVjkQ;_yNgi^NFzYl#@in--6W zXn3S;>Q)$%>z3D)<0Z{(nv1*-lgQSGITuYdjv18F#g^jr$-plN0Y##U^Q;ug1~&mU zP1_V|?HZ&kkV>URC{0kSc?(8n9ZTCDrClh^lTrE*M*o0>aH2+b63|nOl5Qp(_qyf# zw^7wQlYd4}nrSc2CUxQ-jTwFX3iDLNS!za1!if>$-O@MXt>D}-UcAtC2b;5jE^Y%Q z$1bzNNNS9t$G7JrepB?tWFim!L#`pVHkN-A?sp>-T&4hfk@|{3*Tfr+t-u3REIgjm z7N9X7$-mk=Kf*Ncw{m<5U85aT7IGC*<`zLvh#OEAqJyB&-)eBmGBCdg66D9+U_Cs~ zQS5CXd4Zk_-0;jGNo3V8i7F)rE)!ISeSHLQfi{LZ`$ZZNCxz(4EXj4A`l?3vP-}2{ z)H@%&FW{p2pNDCKfgCfpcXV|^Dj2+br>+(#EvDi6m(hKir><(_;4fn<_;3_!zh4dW zJIC6@2|CI|8W0Ei;~(k0l;`T*+_ZcFppEEd{v+1@rKg_xzqg0Jv9`wi-O{RZ4VOw} zA_@yZ>G+)|@gJ9Ja@SN5+x~pd76v!rSiKVAvXH*uGJJAyO`45%PD2GZMFsSis!;D& zB)iXU%a)s`rq`#vBF|Uw7-p7a{i&qYvRmF2g7HJ*6W)UHQPG*q^(#O9rsbgUE+evFLt51^Vbi?K5UmH5cv~| z5)Jm33cgKSgm@1%vqQvA;KBxi4`OY+>_Qx3pK?Csa76ZAxT;1!^M=S8b6p;7!KuR& z_5cWVp;WC|_t6q%VQ=?q7>r*SZlJ?9FV}}Rb)zytYwqmnRIo0{f$eR)r)r&p-H$#D zNr^7V9)p!foAV$T$2>-76`W4ga3l#>JD`L&=FQ~-U*>Wg2 zJ25VS>#k&(GI)RfevV8DlZk?Ub@zm4{`kq4^x&p4XR?=Edi86{TCYLV{Axp0BdRAm zxT*?=m&jn8MklkABI-ovPa;1B7}Wlf7lpVuY)Vnf5kUIB!4~zVYKweB!bxpQ3`h4& zK6nR;wnbk?B6J9GQKqy&0znml0x^xKZZ?YMlEq_ z>eAIr0!0jSDd5~H(LtmPRnlj)qF^&g*jLvG&Wd-hFr?q=7po6HSXHReaLkb7VOxj9 zCEYnu0lmhH0JC5NGt^oVPO>C>7}5?gOQrI=jTmQ`#{&mI($*Ca%o$7Z`D`qatbRr? zn-ULg{Va**DDhU7#&(hZz{f7J`_s{xt1qQ=v)>rabU&KEnkeH!N;F0Lf|(OsV@yz*L*7%cGlzTU>J1F4 zQ@ZCF($^QAbr~uv>bcB(C1Y!n4bS@KXvrg?PWxQGvEmG92`sTWZ_ms||Fcu(Y8Q41 z>~Z7W72T}0MczjiG8PTA$h z$j<&^RsSjSU8V}Re@FAN85UYaL?7uWI6Ok=2&_U7Fqb3KGXrAe1Sp6UuMIGOksY=Q z$r4>3JbnU?M=O+F#_4s*?<10@Eq@Cs_Dh#)>f*kQ2LzeRK<{Jm{f2Ug%I&#ZTt{%c z%DLRf_M)-U=$LF=)=lFB>8^;&8$BrJVtC%O>mkvdjD?14oJvFDg)D`oRwC1LKU&|zju`h9V5QrQZSqCy9?YyuDBR#*J9@RcHjtT2FKWB$GN7a%+ zX&Bft#^Ek9pq@8hJKCEV7@y&Z1sLR+_c#AEJ8b}104bEL<8O7VavRLS>Gv0X!DsVK6j z8b{qe>Om<>3Y1<++MSgLrMcsEx4N74Bq9sgTcEU$Ib6XrQ?ZIk&Y5Z5(|c=f5>m8% zMEtDY#wquEN58EVArp4uH~`x-sYjDw8RqobHEvP0XKH0V^O=ry&C}HF znLw*)eDr704Bt*vx8bp}3d8y~7Sk=j>Y@Q{-;0OW2j|nBO(<411(UzMi?_AO<-Tt~ z0LXRUJ~qL%7;udTKIRHbhEEm11maXJ11;qoL>DZIL353B<2Lsa_qib0R~ zq;t8`BGCm1-VT~*@iq3m!M$7RE%CDJClFC*#=(+_`VXEe6poGAHX_)?M^gKN!W=U_3s2%3vc z4RUv~@*A_k>1(I%uWd@sI%2iN3IzA!;^bEkpUTWbZMQG35@D*6g6pPz%Ilw~c0JjH ze&@G+8&a#ow4dlhJeKH3;AEl|vTIV=DJ??^Xp-UmfL4rby`Q90OM(`fwhHyvs@X0> zx8j(Q4tfL|5(>GC%~>-nzgW@&6wNH7rjL_-WbRKI}TmQzaW6b}R~9xBvyb z^lBL6D3%nSv%k!aY2o(@?KGUpYbrqFnQh21?cP(Pb2b-m;8NYPcZG#Utk1$Ouxd+{ zxs-1Ju4waz$#HDI6YwsnDhXO1Rf{gx(>{cD-5-}c6o2P$EHyAG$8F$LoS&`gC4C8Y zEX9s)o_j+T3%*^{3~7E4(p0qcB7-@#KKXND7U&|qH1bd8YK5CiUSbD$^GrPX5kFC9 z=+s29bE)@m;7ji;xv?{fFo3Yce2Nw51gthU@SDt3XkZvaM6FgfSNn}yqRoss9#_j% zR)B}nZ8KON2IS0oV%+&}}81`psQyP87I!T&b2|2f$tLAa~ zVSoiX0r5aZrct_xPbr&rNg>bI9o%VgpZR|RJKMioHK3>cU)Q6P(LeuBq;91+^7l>^ zH?k?zJ?i{lhj8qp|0L=n55^gDo^4Qm*TzH&qD$nL#(WVtzcROt&hoGj<$gK4zlt|( znR&LoeA;Jve@@CwrRzszM60N8+)yT-xV~7}SaE9nq=$+1%c*)0THJl%9auz6D>)GC z`Q_y|f`!{L#;g7$?S04HuwygP|0%W@&%r9{q1XFUQZWq?kXVm!0*)g`Z(8&@WosNq zC%UA6YnVs0zBV2@AHpm-vc`z?pjN<_1spIC=0$^z_J@4SgUU_>nwC*|=^jCc?Se)h zZutP&6a}RR>Z*G&W1%t|y^wBUvdb&iSRdEThr7hWq?&S2O7-H3)2Klh3Lops-COP* zP{=kc$A}Z3qHi5$wAY^u_<7ls@(J<26eUr^d()mRQ_u2vHf(Lp$g9%vug`(AqU(wQ(Ly~`5Y0R1dqO_w{~v8hcKQcNbo)Pa&Bv0uN(0D*s_wWkL&Cq+6tW-ys_z$JHac<8;8BI-GTSZ-Nog;9mg(RgkLSc@oMxYhMb>e@Ta@?1wsf_<4Dji8h zX}k#IU9DA=$EL5i9t5#+6c!Dy>uC*dEn3~zg_awP02QgLhp$hblLyt?=gxY3#kKX# zcD#KtfW?_5c|!Sa1$6u24dU3al~OC>i13mcz=TWsN__BAb)!D0FFxLci>Ya2ytSj! z_3ZA3@CVKGv4@Dj4Qkfz(RNvf(WHP&nurfim0R5do>kV>gQ#WbTDm;d0Z!+sCWTbr zE9hZ4OR2N@#b`!)aIkaVuN7ysX7_e8qAM^l6PuqOelsEq+`)tN31g-oD)U13irV6e}HezBVt7*?&gLgzIEsuK-ntPAq_|fgld0+I+b_bF14s$&9vFKqILU-O=L~Sn09|c?PxA8JAJA9k7d%i)#>iii&;mxY;=0wsU8@zWA)8%k;t~tV)3;Q}@ zkykx<=NFb`K)-)5(DTd3Z?qGuW09{jy8AQv!_|C?bIs$g(bq!ebA7RxDi64#2gob3(}!4 zHJP#R*`jjS>^DM}fjrW|5+LnX28U#XuoF|*qo_VYUb*a194#AYpZN62Y?dLJZAr?9 z?PXlTI$xLY9-R$7-GM!&rP{v6hOxx>|A23LSpCQQHW$eUfbtJ?VAOB$9ZR+0jzhKO zXs5g#Z7->98emA!U%NlIIiierr*HTR{9xmA%5r0so0!D5R08dbRFT(0-Yd^DV?1Kc z-S};W->Odgs%1DRI!z=P8o)sX4q`xm&M`fUFQsgB>TR4tx3sNyQmEMVbo< zl8duxR{c$&hi_0MmQ+gmgV>tJa=8p|-9CFzOz^8700h_c!(AjsK>er;FOn;?aYcn|4m! zQ*_WS6?;ETU%@x^`kjORre4^8s8_lg+stI7KE~xb*`}QC{{Zv-jibFV{lC;}b4F|W zi+TfTg$Xp?*h86kFkhu1u}8T>JLA0=4KiOi-niUWh8DO($Z3>+QvbX|qT2jyBWj-k z;~5m6X!0kX!CbaYF9md@lHwH9bPi+RX_YrP>iq6t6j0T z$Kx(1kNm{Za;fkwWj?C;|BHDXG2cew%PW-$+*$&;c_>;<;8u?9cDzeimFGI?1mv>YCxP%?Q)AAKP0Ga) zl%eWxBXK@=cgXd%mu)~14+~+g4@YMA%()GwPIWf!Q-4U$`*tN+bE}?D-U7@tKgQ#c zPs`#^K@TIRTK_28Y|xcWySuo#7Xr#pnfA zVHNFm)N-gFI4#64z3#PVXbs`tHr^B-o@_YIUl(8aqrds-Lx~IJ=)03k4OXn+w_*4J zUwq2BVk%v)|xuC4L6fos0u+j)<<;OWba1OSm zJ$p9gog5OCc8V&ToYU@74TRvOKcBge-vb3~J7D(P@yL5sVTQSnrNGTg9h8iVw#Uf{ z>D?Q9tQol%2ItcNP-NdL!+$U(wx$NaH~)^Oq5w;ag>c1lbnRpMU@)?uWZ4tSc1?d~ z%E@nwv0`k+(m9=0_;0N@b5ELx-DQ(+Iv=Zxm~%)R1rGI%yygZYmWWdK2Qf26QxsG< zeOy>BXobE|R11H*6w=*=z<&3qvUJiOSl`#pc|CPTWtBbCm=RPxazFN{z!^GtRCnp4 zOF{=f4z8;ZgP2T1mjw%R&O;``a?S7{ril0QwMw(L_L;f$BK7ch2O6SYm?^ngxLhJ% z-sc}Q^8lXi3YRfE!k5EK2cKlmM#(PSsqx63T<@Cg;YJk3OWWJL(s${lsW0pSWgXWVve<6NuR@4TzlC$4I`*X)^b#v=GCEVx_^Tnt7nnR2QCw7q!%v!IXKEN(IfHh{M)hflQ1ma!`| znrTxNZYxWQn?15GrzkdWJvl>r?-*XcomZ|=(l-v*^BeX1c^wl4K0H)^slBTIsJ*lQ zQF~BQeYgKt?N$7x_J;nC+A}Bmyu>BK_PTk~wfARyFU9eX_FskD0v${BdUbl{^i&^R zq)tT+qs$f4{(v;z`ag1S=zrwiPx^&fio!ltG~wAM(xC0uF78nHdB8KN=E8M0M@hE=l(I=VDdk3%Hf1Z-MG^hNtQQ1RXib&#B&cnQ_DKXau> zVpGiekt}oOC}xL#zIA0VeN}&Gd#5&a~C@WYaN%5q+Q<(>~Qf=%_YAt`akr`-q7wf)pTC9JiZrhLF3PJ zrvCa`?c!bM#8l3-0a1 z@X8S!T>lf#N}nmy=?pYn31@ph2M;XV@YbVxh?qsrEyz1pwC9d$Dr}nSnWS;fo$V*i zEs3FgKuy-Oz1uqGXY_OcMNXO9=ZL`!7W4oYLob-9pd^D|#6;+~>|^f3A?mYno}RX~ ze{y~P*g2|9(=i3*dr@WTH7i`aR&}|7kD>LX_yfvl9m!VyHR#DGk)sJwsOKe zyAmA05`s;Lsf*Og8!Z5>e$d5wDmp|6nHecKCJpD_F?U_1Ce>!Zr$+itDB#B$j&I!i z#?>G=eH$Sf3hc_3I(S#Sj7wHPwhT@3=_mtJeN*LWBhVJ!imu~-glfV`v+UNb27}nK z%xSu$+D=|X@ro(H0Rcf+SLb48TMHnLF~gt{sAj9L@-s*{5!Gnp*Bh9?^ow$xf_aU zwnnm1?i(ULlmN*aH(4@%tWV-aKx9)MPfShGyNjIuntl;fW3_zA`!T{g&i2e&283HX z$UkBrNDNd7u9+WpQ!1vDiL%P%DNJ5a0}X(~cGID?gSPwlTJk9x#dX3ASN6)r-NXB`nw#Ko}wpZ&xa#p;&e9e zikt8bkRTbY++O&$;Rp^j$ckfRxzi#phs=NE26YF^i4gST1sn7%e39&L*SE*At6FEf z_r*`;Y8-_J)3i+H+Xsaqw%V}sb(`c>{unBrRn8+K4htSkfY69RArigDa9%)KYez)x zCoViiL!T)^3I|eDfWewmM+8EXB`IRI;1wF^An4op$69pN`RdJ#J^gVnnnwFm*7cb2 zn|H*CJJhnsB0i~@Mhivhp5!vUnJ@Q%8hm8))t&9f*cc)MFR4X6x8qs4m3iJxv%I%; zY$r~QD~bZQ74|@z3TzRfXl_AEKe3F9LU=`;K;#~a9SgOhp%~xBo%%+PGU29TsR^Lc zA3GrOSEX4{#(RY()7q!N;C6Pu_8NQqtsWOh4yc0g_GE}{YCsx4$lrl@N@K!duPVQb z47U0PH_@r-F)6@%ld1EYkp#7JTHaK&VBD^#mf-gsvgYe&6Ba-d3kgE`3jZ*}Sk&$q?A=wy0aT?+O$_=ca z*ZWiLe;$E!-~%S>Q}Qgy47d7oZ>}HJ)0qIA+fCqt`{qOsihB)|U<4nS0Z3aE+4$%e3bgsCkws_WU_E-=t5L`3;DuMs{B7ev+S@H0FLYo0%%kv7t{H z`s8ZZ)ZY7eP(#;eL8;HakGZcS%W&yfHpnLZ*O%;8pyfGWKK%RZHkGc?uO_L~l+CTF2lZxMq z4;g_H;yTf72-$d^(HC={!(b*?{qf!W>h@o0h6EnS)_d_G^O4MgQ${YSiQ+Z@bqDzE zHRICUez%ut&{h;7qRuH)RLatK)3(3?G-~4PGA@}!g*ga?5!wFvX2ZY6c3LQc_VQDz ztSXUp{<(C7LeXKA;_W)SV`&;#CP=u(sxNy56xCY*e#e&Czkn)1# z7RQp>%TYVP?Upmm*8Yjhi&vIbj|(v<_y(NYDhB_S*V%}O0mA7W&qmHh%H`70<($c7 zCetYK5?7DY6!7rIR33iF#@$H`i3MOK(aQ@V&+-)(t$0I>2e>`Vrh4%QHBat6iKzXs z&1)gUDbuKAgmnAypgIW;don~eUyB5y0T7pf~k@=?RrIEIlb=1Ss#K)_)iI3Z2YYgCS71;UFimJ4YBp@_E zPLvOzsp3$<%r~u{|azOu%y9NeL5WHRB}X5 zIA~A`5O=4GVpdsF)~!t&G@HRnzFF)8DIZFvuDCV;f*1?sYcr~gP-3h@xRmyzsyGGT zX~!yV36nyJz=dr#N$?#;)zJ_}y<$I-)CX;HI?anJSaxf{e?H<5 zv26_7kdJhGgPDPqouPRhOr^zmvB*qk=U)bPS4)_C4p7f$8t>QrD6L>IW8#DeofgI# zY0j*!?RNC*ZZ1z%4s;g9&*9CC9&-3wJMbRBox(^OVZ5wQ1 z&DqlFR=;c1S2SRMupf^#`geg3Tr{BdXRrP`?RBT#_Q_XppV7(#wy)KtWblnjwKvJk z?UJYfhjOD#KiC>mq2ofcK!U6bgk2n6X}a`cEYXUU(w}85#S}0r&ng&~nN!as_oJ+@J(e2F5&LpFAgebO^z(KsR zro9gIs_UxmzBTpQV&-gNqHnTYdUUQkK?-7g5COcEa8$zqm@Tvb9SRZNL>Y}RW;l&9uIAos%RwJ2%C<&%Y*@+hZ+ZN zCHpCDm}+4tEo@!eijbC>O7W*%U8{+dBWKm6QIJ~YI2V=TbNKF8_dY2x(t8!ruv6J0 zVSCl#@dKQoEwPYSUgZJ?o4?%%n$`1%)6jD+y+PTAPwl!NK>W?TJ_y=8Xmx@1sUOg#OS}g5@G#c-QWLDbWNOKT)c14e<~$6G-d+2 zwEr4_jcvh|4R>;V&o!OnunocXW&#L$V)i2kN^8c*`@bq7qrW2EUw_N=+&#ECf0a8z zQ=3ZrS+T0sxXAiLDs_P{gvbLH{^Sjgi#%yUB-LtnIs+KM#wsPOoo_UV$;uy*kY>?Y1}-zd&tF8^=eLATX8{+bFaaHbIc78%hkfJATw> z={xE_cu9h@0|7$5I4hFvO70HMDU|X73xEUZOaFsPCcG`L^jItyT)>u+F>$m%48%xz zTT%GHNRr3BS1<#lD`8))n(}Ju$AR}zS4tDd1G>IPF}=*h#qbEU&Q8)p{r)na#!*9| zWR$~dJ0qYQX{YTHjzi~2Pl{O7Ns3aMe%F`})yoCQg-n3L#8`QWvwfUJq#1h&|@E?*yRGCZnavLb- z#8DfrkLB4peV28Lso9aUC6qTbP2S8;T1ogcGP?WzVMfLowhF(yxD)@<0k95746Yvo z7}!-;pm3;~BccWk_=>nZO5il*$oYp8EOVv7Pw~RfHH^1Z%!7I-@u-9=R?!iufO`A% zv`!fIyLA=RtE=oPAmrz;0U7J@`kns2qVj|a6H*4u&Pi@5v z8_4k|sN*{Ahz{))7SQsopI@t9td9N_HqcjtUTt+pCs6KW)(P$U=7>wY&L^gs>2UaC z*_UibaH6Oc1tW}65Wf+v@}nB3v<=-_!`Kjng|RX zH5L#+Viz&7ReXm#EPTlk0I7!}$4WtbE{YZCGz$Ek@&=Nm3;=&_NKtL_Ox=UyTAQ`R zq0Pqp#})~o6_Qy_dV&)P+R-UToeTlWrBUO!z4e3Twvp}xul63g%>jCiZRF44rz3PU zR%;HEP!{=2kV;v~kDr4s#i@MS5C)6D2>$&u)O&2)Yi5~xYHp;{CS=!pU}2)0Eo|7-Yz*bpIILYb&-ddlmm?2P z|47n*mr}t%_uozejnQu>!G8p4{wP7jUxL&Z`&*Ei@RB=dW*mQq_+`zmYP{JI+DHIqpH6);YO=YwxbS+zN!o>3o*90W*t2(g||P8Q~<(dumNlB&%BjEDiF)CQzv?!6odJsLI{xJ!z3wZ^z{?rb04ThQvO zus}M0gb2R2?G@dp)&+;D%>jiDdFH{Q@i{=7Xwj){*-kp^uLA`Y6w|8$(f7(y3{^L! z`bA(HH1aDy+1FaM$WVHO_=bT))M(f5TCT|bKz;?@IGRE&n%Jq~6J4r2<<7-pY71MX zUX@BqrL-{TM}n%->9vDh1Fqi$6Di1)gV>bNooLFBst^f5F#}~mv5z)-8A83(b-bbq z5Z62bl}fo^MZ`kxGqP1Xo2bdn4w5n7p>FbcX1gcb({qynexSJAgJ!9b_VPj<={k|} zYFgAkprnOOf&rbuw-%!ZIX#EaMBd`;){I|By8^1zdW;ZeEaN$ysl?MpFey-qa$hu4 z1Dxq}6Jt6x)P|}tcnS*CX5(&iqK#eH=WY5MX{igirLbX}q4yw;2wzWOuZQG$j^KJ6 z+^g6fvPPR8W<1J(EyV=x=KVIhks_ zYCEwXBjN`o7Lp&}}-RYjzB#Od27+L6P>d-mTmgtQ**PZY)^^a57r3Klt9qu$nshAxIK zp7xk?5Vj_)Fgu5>kT6?({MVLCKUB?!JxZ~k%CLVnX{>q=6OF!P6OFq0h}m1OTd#YI zSi3ygcB~yaFSTwY6J7~h1#*;11w55T{VCm;ee~(Qh$-2DV_Woy0U!;4-QDg?!4J%v zn9ztln1&`M;Qo39vS1%b_$SQL|GS6{CI*K8-e+z5ZiIuM{6P5t5~zdK?$!SRlniL% z&%%IpZfTLF>PPU^UE%83Aafy_oTrQ5RGcBARk>Hk=!v6SdkYrqd%FZXowI+Y;`X`v z?u{b}jUMa+YJdJe=}fxNQqa56#FK z?Zc^>r$;rum%!=T1)xgP&#g^2VspL7-mQHLHrh$zwqs(!htr+( zupe*#!dfGehESeXvG<#;C*VDLiRb@g>>Q$O+qP{R#@=Duwr%aOZQHhO+qTUewr$&X z#E<)ad5QbVNu2abti&pF^s#1Zy;fWwOm8MlBBXqacN`QQ-`-Bn0it5-BENMhpQA1=%N-Ki7S92^PHO8^`s>vA% zW@#!C$^vr=Y^D9$oYEOjIz1{RryO~gTX#KW2XHdQ`-|31&fCBCore}YENYzB?NyI+ zv$EJiZVs93p~U-wJ+jjb6?z^+;;{leN_=z&TF!jKW!a(^3{e`8ahBn-t44=9QfI2;P10}FB|PB6 z1dwb@NGN8x(T=@u~&+3sQicRkxV2UJ3&JAyg8CU_ck8y;S

M{?aFTF;l}vsrpi(7%c%8+(Z@|;b{Mv?W_lmwKVX2BS!ZQu zOJ+(lZ72CGNm&c?mgC{rVwGRk9L853_k%2mV+F~&Yb*sD&e6Yt1{w>(s$#J$Rf zlPfV>DYkuti3LD>o&ljTTYYmof!HEKOsMQL6uledNfx}`M^6?+-Qd^szggvXfPm?S zpDJrVAi{9Xv&QC-Q^}*WXF@6|e^iutavKwlj&k85&I!M}gF++P8rSQ~+!y>^(8(5; z$G)AVQ~~q_ldG`yw@9kVJXb{W%T}{48Q`)B`CN(5ei?T#vX}O=?uW+s3(}xXb%!5? z8lTBXCJ5eK#fjKE9Y2Vp04LC!lcFhs8JJHES2Jzi*17Lg|Y z5Fdg}wuN&LD$)WEWII$}IOJhYHX^#YQo&aGKGT4xG3XGwcSi*u?d=yxfD1m_>`d;V z7Dzw~Aqb*f5b6ya?TiY3>ThBj%Lh=-)@7hH2y1-RuqW=`r)v8@eJ}P7o9QP=g(Hij zqWK)qH8$Ynx14&3JjvIC2A=c#6nI%ECaDq_Y>Zo6Z?r=>~K-XmhupdjN%$dgjRalnE6L8 z$6Pr{i=*_w3=W#p^5e+R=(tt6#}92&af7_Z!$ReQgfr@`P8DfHZO=R;`SrzzaqHHZTpPG5 z3>~N9Q6`De`KxS=+k!GDwk41Ie2FE?Me)j(_c*N8+>juLcAk!E)rAvmjcULWyN0rU4no?BrYdNRDv^_7J zNd?jm30FE1jjrMNh_6i;>_m%1PMNq|i@al5=Wp1f&c;8b8GkZbxYTAt!Zpm1( z^fmoq#FMcdbJSm=`*-z%A$5N-_mMsW+f`y`^7i9-Ym{Irj*EUg03018_9_)-JGhnO)>6iih-z}L1=o)kLy8^n2lufnBjMB$m~SpEe}>QhtH zG66}n{$folqpbBDl{cR_M;k==Cxow&5KcKGUadQYtJ?xBmDb7!4QFO~$BE;L+x7Ee zRy)=kzH0U3Hb;$EVrm&m5$7WLnM<@+_%R2D)^%CNSUm==+O|YS9uR-hT`uDynpT-L z8RNk%g`KxpncOEqkP>UBxsW-Na+i3u4OMS|MWsa9A7RTsLX(+5oLExwLE&-7<&{F$ z)`gVJ6=Dewtr|g6+fs|mrYu4auQPiK^ao&c+Xq%qECy)38}49q0f4paAc}OHc45Gn z`e(9BaE0Y6uQWDNvd1WV@lQoVO1o9;HJ9iV&- zpnDyfbFE0U$lFdkrYFC#$S*3UnZ(uMME*LnnUR+P6%mn~(an_e^BM`8t z@G3_nK)dB3)lf7R>{$9gun7`R)#}JqA1TL_8f$tM$}aR>p<*YUXIIg!in-|uqxi&CD(&Kur4)MLt8Mz9v-?yEciw3 zMP8FS5haBvi(v=GEwIb{mREsX7Crl0k|TYVt^UeelW8~~Ii*>iaP>z!>4+IjxEj8j zIi_Zw>pR#qJD(H$HE)ph#99lJYTBcg#u{6{M1|B1uqWc+^)Euh2bh@l-yF%i56;nd z`uIQ6-lT_@AFiZs*F@JT#BPtzyg`ZwuiW}rgw31i7S(6#%X8L#_b2@AvsukDmS6AxWTJyqiQR5K z`9`moXQWfyLP)a`|EyjpQRg_Z?-@AW?gr%j?I!(CCmZ9xi^Z7f{?DS?|GtHI10RST zB!~b3;{XwbIyf@4=7%YWJCN|SrFs2CN;%7tcQGV27)XV8$5*R7RJx7Z^g5F)d7X9y z`Kakwj`?_q_Q6G2mdW}BvhX=510J;Gg3I~9Z}#x`8gsRL<@Ma}@cb!L&8RMnE%odv z^%btz`yxwv)%E2FN#_VxAQU;;!Qp4^d4BW)o?tL`DH^@0%t4s1GSN>Ot& zv8-UecmC*#huVfr;{@=H*Hn*p;1N<}(#>k-nEgC_Y?vZ=9Iiz|VWVfM=H<}O^844U z(%^h1nrpSgEWQP}Fsu*xeF@K~HygHJcKlP*bkP}B#TL~t=&S-|ioxS}$Jf&|tZ)I_ z5}CWv$mBwOaeLMvup()?wj=cI99P)5B1WBm;AuLsYj#{eZCwMoGDrJCR7x^yG`Pj3 z!Yz2TdPB}s0ItYwIpI=Qiu!I@q|{xle{m#y=Yd`G3DF2)5QlLfM`Qt6vf8R>?`oTA zieaTiviiJa8EYTI7jrT=UO^=^r9(ILLFG< zPdQ7ZH)GKA46%W7FOUHKW)q7fX=d-nm_J&~C?b5!*9_20#sGxsLm_@VlXf{N*Wp;wgTyO$ri-cC+=F*;bu%XA; zXR3aLA+d{|ThT<*=g5UFoYMCJd(s8FSZ6h9#=Cl#(_x%@;omfwiaz1NVBU?(` za2kQ&0rlfhW2vTipzjdFz}0&DdrCQP)hV6yK8S_pbG<7YRFLLhmuUsD@(DZ)V-7gw z0+7YIFsL~vnnZ?XmZi106w{^`4Xc+joNuU@Dnx{Fm*5U`#okeEINb|tk+yzGqjt`TW84t!dBv2nJnf5 z{xd+es%Y-i2_39wqY|cMy<2tQPHvdbr4Ud1J)iq{ygKM9Wo4M`Dm&lag zV$Zk0qXBk=+e>%(JkZH0+9va7ndNCHN~rVu%Eq)u^6x(mihmdUF|z*mpim$Ed5;41 z)1P<%E)p$N&YcYb5cA!LoS+`ja~~(>c}d)cB^Pf}k%}3Pj*>KJm(@ZLwp%uMES32Y ziTNlC=f=n#$2>exYWYxK@p6~p`tbjc`tZ@QU^Y6(Q&}d37iK6hfu3g;^pSHDetjh_ zGz$MeboT80@mZveP^@Slo=*|XgH>?=QLG^`>OF-%_9o-V&`jo z*{P%zi6IyvhodF05RX##fSo`zWYXYs3QgYi(}*I#X(nEh1c*s0E0 zC)HkYhmlruh^;rUbBlOdZraGcjVtP%9x76{<-yBC9_lXbWj9aFn-8p)!e^i#7kiMR3 zlaCEGkFhjv)dW~Ig}ReXd$Bl$xJIaAY6os-#!#mHMVC)U86$;UmS`MGw@qnf*p8d-cj@oNT9q}OQ+}J{25R9Z0;$Eot1!wh13uT*GaG4C=w}vMYwAwckxX}ln~$^R#_^6o+O{O#;Y0EWzhWg1I70TZyKU>@*8Jm|6@(L#pQ zwSVG>jV5gQo>lW=l6mB>`0+u-I(XEt|KNLKaWn|w%YQ1zL15d!7>gbp-hVaBKrB{s z&O+=Ho~snSg+myknz8--0^86BErd}INxonvkRfv8xdi9mXOk1>Ry(_T0k-Zdxw$be z*1(<%0sc%|UNkQu(Ec7KJ?fc6-?&j+{hc7`7>d^R^52b%6CBVZimT^*pEDxgI3O=J zPuDbi%HPp@J8s|BRXzsa(&_GkQ5b#~<>nq6ON+&lhD&k6bK?8aWM1Vm7?z%&G00oy zwt7!r^tD9@?YHXyDHk7Bd{AGt$sXaPF?abY^qner9AgU@}{li|AhueGl-~JJw{e#<6gP&g? z#Rm;unkd&VuCCDcH@7VhcHR*&_rH0ju2+Y@dYtL?f<}ADrF5qJQgnU^Msh%3D=AnJ z>P_wS!+ry8?|86+PK{(UDmINd5D6^xxMGZsf5{gNi;>q zvG-QD6Eywl7Q*kU*W&WVbp&|)nqJl2QHJa1ew2NZ1p24uhTlREHTxXKz!d}M7@Myq z)YkZ-mTr1F_$p<8`?*J^XR9F|CW}%$y-<`vt|7Xb+&q%On?qGLw3^~frck)iRYes% z9*PcQDXta#fD;na6Xi*$@1(rAEF-UrJ_yXhq^fFQ98vjk1<000q*10mStu3Olr*BbWRo7CZ1Rfc0_{iixk<$?cr&z5RP=+#H{m zm-ScG=(+&bRyLb0ySe~enlG4WdXJk$o~aBM&xs%1=gawPE7Bc$6`Dm7Y_ZZE$Ax&? z?pszSFwNnQqTC3&8A}FefB=N|n7$vX{&4exfD%9$^%SIVquq z7w*pq38bKX=Ae9zq?G2pM^E;%}{Wa-#gv2Sg)0FCCe7;dNZFt?88y{$k!aj3^ zr6Wr)5_^yDjZ^0PGhVBR>2H5yrO#xBoZkgsaIk|qaN=(mA?HCT;)T`U>u$%SB4meI z^Sc>TjyWE$?5x(t>!C_ScyEj0{1nt!D;}w#?=@>;4DJW@vk8C;(xrqKyR>MOw&v%I z(p5k8vn;G2DAe-%WX*Ac&{urv*}GK@(yoE$QboYin0P>#*s-QG(7FL(&zm^WtIE8F zU(*6T*tdACBHj;09ryxG5=Pw(ab4eXX!XswRZ#`OV5rMZrjTzn{w_k>2yN{}bqMGD zvy+&Z1Qf=D+@YIKhIAqXU&m5hTfP&|VG8Xly%C3DHmOnXS{yRCH<1ECf*v(Vu41bJtC8cM_7ySku8I9 zd3*SiBD+l6z1*w+LdEm549&Q$#Hd9v?yorIEGNVu(;OVgtjT!ORvR&_#{2s;@P)@l zb8U`QN|i_2CA}(|2#ll>Tc}g2L}&(%KgFfLNUSlc#{InYVKo##Ufb0FO8dNy>PW$ZML|UBlD^yKc{E5?RD=AB5-qlQ5kH_-` zr^kXE7-0qa^aCAR-Il4YheRCM*^@V=9rHt~*sI11 z{DGRw_j!+J=%nkYEjvPI>?E)P)H+H9PSIgK#oo(BzsGLN8Y9(E` zeQGrc1);gWaPPm8O(;YbF^9H-_2t`1z%9{zu_U^ILPUgjcE^j(fX854ikY+t-UK*4 zar>ft(^%#JHd?c40YpoRdS#MUq8lVOhf^A_nTPOxJ@Be_%`5-o#QB$h4Cwy5Sgkf5 zea-^4`Aqo%tW12y4+&BKAAZ|aegkFuNJGZfpw{EFgm}Kua5QO}p>;&B?ojPx?hD+g zAo*s?lw3mmaS<7*<%;xxQOw^KIO;gMR z-|NvZ$?5u>VU<}rv^r$NUIA__3=_q*q&40lAw(n7ka zm7&rIeJ=zmJ8Ugq-;|vd-U-5~c8*Myjo^@>&s#DM*g=g$FXpN8xi@;8=^Gk0qA^NS)(^=!wD; z)C1956|(vF;V)~g!wMPnkuX>zZ>$T(fgW{dEs2mDH(Rq|)@W|WhJ+6r(UYA!^j(He z6>U5+SSpCJJ)}&ah~;4Ix#s!fgqLA_?bu!bkBzkOh;V__&aq_> z&5mBP+*D;xz;JHo*jPf>n9PNovO}Ed$R#aOj{H_#tqNAcoDFuyOS^1Ym|;dfFR0?p z-8*H0$?*Q@vFf+_HqLV&=MzO}MWmk-=qX~@kvHcM#svz~MD#I}3&{7YNziX6rc@?Kfge~lXavb}MCAlMZ|JzJ_qJq^Ck zd(@ICq{u7SF!Pd4ywq4;^v^OQRH{MJPE?#sO5a55Qg6V_>T62xf}&oy0E1SVs8(RQ z3#{)->zyShDhxw6UoJ;yr~;mmt{IO^|)pF%dkjd!S_??;tq8MRHbgb z3tOt6+tj^7$R(eg3sEWymi=xy^Wxjnq=t9*!Jyx)P`&4wLr!Qgoex^cL~t1+dSIZD z4?Oswhc%M}LZ%JKg2lJ6u?`V)p;`&kQ2h@s9L|vZCkRy+B$u*guP~_l*{>!GPzkR_ z3K-@^{d5QFF1^ikg$}Pc+mv;jA%AC;Vg3^(jkZ@#7ai4O2NbuY^s$~q$mI^Hj+ zGow-B|8&T*{5$wB`~SJtYe?7}u>2^kR9;{sDdc2;1F(KI{(e~c&n~7U$*RP2ZP&xK zN}?$DM=H8aJzoM^$IwbWl^iawI8hOl4mk73iwrc*o)0^hcbH7h-lN;oyAxb*0Pa_m z47gq+W;fIjC_Xgz7xxGK2g`>e@5f67b|O*%)}rlqdyE| zWZ3i4LHMcm?r_<1&b6KFl4=Hck;pC+Q-8kyZ{T^n$U35?f@)jal`PoXXYvUBo3G4s zqBQ)7kn5^8PJprLAgTuMY9q+Hl~8D^4kQ-x>t~t6r<`fEi8^EjKlriNuv+EeW)nI8`~5S~%#$5f0k4Z#E!ow5UM*q>5Kv))Mk$TLG{@Gk}x z(v_gYN9)HE*0`%Vk$=Yy{c4aZR`r^a4u4;q(ctf1BW}(f_LG zL4>8Y+|eV2yr*NZKHmN9`l4LizZ1y#_sna|Q5=boKZ`&Mu`4$D!+PFv`Eh`$Ay%E; zw@LQ(FnWQOt|pXQm{t@{2#?y3l;$z^cGPlwtN4EvSkja>XTG;M89}P4#f7L1Zs6GeJ~ne#Rfyx4 zB>Jl^e0gJC^x6GO243zsdmbp86m+#_f{*A_wGof$ovge`y!l*mwdEp&;8N0-R(7D7 zz2&@``1!7|Bf$f)O`?Re1F-{;k8H9RIzL*p9_(hTwA^p0!&VQt;@$dJ1#UHaOPZ5; zwfvr)6X?POvM*(|Z(LwDL8;#)aiTOTU9BJH^BK(!ZH37m|A0C}kP72b%7wU{TBzv7 z4wV?Qm=v;3>7$7w_>A-Q$uFX)d*%%KIj1A4wG5UpwE2KwXp-JTQwe&GjsRjWIlT~L{rc&GAuoN zE}oNac-jQph-t4wZEVt})Y<9XVHlx_<>UKbV^@{xN7FM^lCW1Ua2DNBv6i4a@Uz&c zKbMyw)4?O$CAJ6}r4`fNQcb$u;hAw8n1l^D*J^4gKR_#DkJ;I(Cg-_Knm*JgN0K>V}sYp zk5O9oqbN7f@VheJVq%m=t?(io0KwYHSD?LaG(O5q+@CZcX2WI?_KNNYQE=<4g^Af` z3?a)ohaF^(`Rt5)`72_tLj9WM(J<35U1`joetHjyX#1gVygY1qh59^2)a98gLmr(I zhdW4X^M`TUO zi`WKeg3uqCnD$ntXE-`tov7v%P}qs}vmz#r>icX9-jdo$h3sTF=M^vp(DEfvZ+~+3 zxfFg2%0hqjMrVRzZ_c4z6Bu;8onF~P8 z1F5j_{gkJT5b+l*t7~1r;a_=6duEGpZSU!)kPY$8(`SWu4k{HA%@b>WW}kb!xAhze zvBNuUO?GQww8K@rEVzPW!dyns0XFNc*uc@+Hb9cguG>yg zN^b1z7@$>b=k`V+sBuWysMhJz4CbtxS3#n>vgN?!Whk z0yi)Bo_Osx7&Jsrp06#v_kkhejH)) zSvq$+I$Zxb4DSdYpGug@Sv^if)^yHR+_pX*EuW6yp}D&C8pwQGBNrJcn{2yYVR~ms ze0J0uHX0vY#;!2lJ}bl7NX400d2NbZeV-QAOve6(f~a}8lmz1`NRgg)Ht!OS44xE@_-j$ z=SM%W{J4M}_j%vt)p()r`^Ou=zvE=n(f=2XVKMDTYRL*WeC_qC`!54ld_OGT%#Rxv zuO+t~nOihGNy2`ltY#bCo=h&jOI;&>_b-WaN=^^<7yCi2~QStovKU zTua5dOp!vP+-FH6y|mO?N3J&+ZvGVe*uBeR%UizpcBza{K2Sl!Xf6wQcN5G4h_r{T z`Tb)~68#d!K6#MjXf-KjR^CPI63ZMjn8Az#3pX1LY_!eo-X*Nk zW+Kv>IuV(96O9pFi2}{>AKIV=u!l9x@k|ru>bB=%tccM+>WJc*3urG%&h?EO0HB4m zdaGe3p0C0X4#C^O$dqNQ2c1g24~TS!;ubH6(U#pYV2sJ*vZPib)c49F&tHFe1244g z=AIaqpRR(A%2aJJ`mWr9@@Cq!)d9hT+-mrdpB`Nlb@)|6jjhqt*DJ|G!QGPZ;Q-H^ zW_%`hn1$7Pv55vE%63B6VuIU_BYgVvzuUrScaB5D-?RA+#`C?y;d(;$EgvrFhJwE= ztA(nl9RN-}U>HOHB~8ev0QG?L1dmloGtMPFaN zP9=25oB>$gc=sQa{S?RAsj5-l`+!gH_9oC)mC$UFSp#*&RN}O|6H9;*f0Izi1-cS*3` z9)abS6F59FELe)mrpHT}#|3o*VykYc8QhSLV#1ALilXbn%J&{@`BjorU4Lo=Do&($ z$P7*l^ENAcTwNUCPb_=ueR-1$f8G=f*?u#vwliih2bmZ1-B?KjaPS5Yn@6!~kucpY zAio}B?T3 z(Ek|i2)~uz(!g(Ej)@5DSp?(a^ovbW3D`VSrzB0#8KFBpbANNC&gBpv`WT5%;~kQE zV3>CEZL$e#T(t@`#r9Lz-c50vwXfJ||T< zMW)uqMKfWTd}6}<%oW0dDabLZ)|_gC;urq&iSy%Rk)q>EWhI>4`vJ8(be9_gFQ}(>Q8gWPlNELQbZyI-AIliN3QMq2+nMW4w~+dCtkSG4fcOL zIsO%kn*Aq*=K1B|Xm6xv^~-hbP^~R`oeu8u9{CNBF%v!8H;;f10Z$9Sg+IKhOFD_* zd)v^MZ0xR1+dZxc1f&B<*k1Z>lF-VfdVt35t@deivZz{+Yx{Tz{3b?eY>+KB2UJE+QtUSZ#ZDv0hrS) z0yVy=Z?-@0q?CH$LxROF9lFqxj&sUpNE-x);G zsLM42%``}y3mGa&WbTVNE4UK~Y$zmssb5Ea6ZW;agIH(nGMmh@1_-9A7eopu?N^+k z$|nSBT#ruw0J%(y7|jfL8wHm}v+&+a=m87?ePcU)-@D%y8R1pOf8!mph|Pu$FBhTK zg$;IBYLIuP%)Ql*THou0Ft|=OA4AVzAn`SP$7`8R39-^ zXkUp<2sHX7#-*3P$fghQnHgEwoVz+7^Wc$hLuc<5Z3*JnV%Z;K2dPr%LWX`z)<{he zMso=!&(7lf77mTF_`1v^1B`-Ou@^QcBEO}_g{H_K!t{)RdwY%h1N!w)hbs?d+N}Uy zbWu|Mj%RgZjszGzZQEPuU$$e6is}8%#bxos@4Eq9KI7jE7U(6vm6sX3;VKAIO;IP$ z5@(70MKpshsanh5YU1^7Vbxbn0mq%7_$=Giz{Xu z4_(0O(`*>j#A<8pB1c;V+tR7cM3}40xy30XCac8ie8Qp>ChdGj zr%lOIIO(48jG6YH(X(Z)#Ophn?#mAOJbLu}M#E;pWYRSS*?zeR|@Vb!=e9V@N3@;x_LGsENXc=082otp5tj#K!br0pDU; zNA)@#6yLLVkPlwDP`EpQUkH$upEYPbGWH%9httV7E%Br6#Rid5Y_pv$p-{4Dcw&rc zNXz?Tn)H3nDc8*(myR6I$F%hr)@@vt&3Bm<^s4;m;&m)HM`9JEj>)febqiKgDL>4E zZYGb^NV(}>>J4OhOCw$!cP;zmC;`+u_l@gy7_6w$3=Fhh=&Y6~E18cBOEq-4s!&bf zR2D62(hn0em^WOzQfd%|+dkW#yP+pk1h(OxQKC$;nu&)`uj}VLY6;!*ouw@2ouRX0 zMKEFct46}HXu1qX<#7~JmEimvxb_YnbvcW=wE7I^`j4U_xg!aqcg{JJBxPwn%GDy+ z8hc{rCkWfJ`#%I-gC@XKlgEBSZ3b17lGzx&$RX0J7-J(Ltg834 zr#Y1fg+IdT#&gLhjtM~uibBZqdk?L|p(@I;-fQ`(MS~>ZslB%fww|(~ekv3afeplD zmD4p7)lbEL)t!5T1A$K+T|C4+!!-QaiZ+8Rp+hb#(~yUGtZ8x<_$Y+TxyzjKNgrcT z5e!^^05J%u%r5>>eGwtS2H8Z%!(7nJxDJ85*bcu^R)BO}duh>W47&UQq8#ygf@tE9 zGn}%_ry(u#Vj5{W4vMG&nga*%ClR7r$hR{SxEq;+W>Y5seyiF^+6*c`G8Q!(j2?>Z z84eFukRcqm85KZqkR4-+HHHYss?Kk25=GNed}9d5Sq>hf1TRWc&auimHa=8BXj4j2 zQ;Ba6m(;#+Tzp0`xxx<9PU7UtEv<<>8IEWF-5Tfe!{?D z*ay8ynEcA1^;7VOG5%W$uo+L^Xo#FT6Ta(=-s4IcVeLkh{5El5c7bzbXMN9*Fj+R6 z@QY8vI39|;M2j%t#b*m5K`P;~id}0w8cBpc>AQJOeG6icvS<9U-knxvW4921+(VVp z#@eTBjiq81nWuc9@=gUUBasY#N+MCM7)3JT2|1mK{8YPSbUU{U#aCYQmOo$FnA_bg ziRxN0az$KO6-2GM3<8#zu&@uK6NaAz4H*)ZZzeH&wa39!+vMP56m}x%UOPw@mx|1K zSP_wj@%C}khEKcleuy14 zbU(}c{+9nKvUo=)fI73TpfwwX=MTu>icMyJajqux`aC59d{3M{>Uh3m*Z813>*UDj zbhjrk3$m;MTMyt^o631Flv2Ct-Ww-)&|g%VPw+7r!12hfAC5*vGetk1($p_(uRp=q}!_}=7ZV}*I`8+{xpNnipWhmN4z~lDmv#~&WIV-A_}pXAiZqd zd$sU(xrNRB8b&zM#TEq&Vy!QuDDmz^Ke;YWz+eH76*8H^ad1)`gKoKe8fxBz;+YJx zQPm<`WN4aGbXS5UcASWE;=qB_q$>C^HkFKNbSi>+xN8E)dv`p!evy1T_?Df736pHN z{AHp@zL1GYhr4}M$Q|NfB|3)b8)~}-!o0IxIB()Bo!8NORMs^J{~~i9Tz2^zs;97V zT65@)NJa-hAqs&2iG(nhaWxvs)IW{|DkI}BSCe1Yo4n~d-(u~Ln>*uF3nZ@@`KsW{ z9MbF04Waz~B-p#=spM-O@s%P7c;9t0u}j9GX74|hd9*Tit4T%jq4@(EEH0+L(o1Dl zfoiz0&vem$A?J|k(#8nh&{7d{B1q!}1V%ceV^u1khA`0cbbyqD2K6H_p^(nz#Aedf z2WN1D>0SP?s@s0=0(7~HhAOcl5Yyz>u^TQOGz!>=>>6eu57RSp3n-}wr7U2g*WML~ z>(vrrvngQ(Gr1uLLMCENjg7wW0udSG9o^!sUtUcY*33;lGgM(f(Y~6*GQq!+pRc^2 zm+7HwO@6sVvjpZvPmsps1@_Kt2zdU&^9J%n{gCCI6Mm(;RjbK(>qzk@UmsebZsp0` zNOffLOoc4U(A+XD#6VlvHAa$0Nfv%n=sPo$BbvwZuXJnYE1#8lnC~pCzVJYBK~!O& zM&We7H25=g8@1Ifd=Wb#1jr;FiA{ds#Owm?#{UveCqj>ky%fK^sRc!|^teg1b*) zb053OUmm`UE24Bl#RItj*yi(&`FZOG3=C5P zV)(LcuYpSlT*=t`7XeH0!#l+?_z8KhL#=Eyw(%c)xDe5EF!d&H(PW6W*k&bTn}%ml8+$KdovVgs@)9>7PJQKHnC+~HqwE%A&$xP26=OlCVO88 z^}VUOt{&tvsuSa=DnC(@r_aoCZUIbupp};Kr?1`S<9z>+a93y|o!IQ=fv@MTn}-0! zG`_Dpj)enV##8Y)tDi1QcYgxL)t>gTDej~=cDuuKG%wm(46;!77KToPaeCb<7A~aWB}Y`ta{+M z#R-g{Kgs-RZLL?fEWE7*WC%jKa;pdUrJR3qt@J7_S%ki(z7!S47T-WbEk+be z)M9x(Q?n{i94vKx)zqH#8eVv~Q8#&Vl#;8?Xg>0KWG_y_n(3xL>VoSRNUeXw4&yi^ zYb`!@>oYO|rl${5)AX{`fJw{olYX_Dx*sec^c?T=y$Y-P{B~W3Hld_4@e4<4$+{dD zdna12DLGq5n@ycs(AhU_WyNJXf!%I0#yi@DM2RPgx@kWG!lbkDua+E*pQuh?Pt|Lj z)am}(Vq=EvzieZz_%YDVwi=0NQtQm!Bupo&e26K|imw0`a1WpjJ?%#@Tw+3! z^0K4g&09!TuBb8Hh)U$E$J#DV`6|j2&pm%UDwX`zMh^JdGXIF!^(mgy!?MlGD|x-O zfAAlu^674nh|CAd*u%}k@ao!&sny5>pj$LP2-BX`qAk+?<^B-ftgE^OD^?@ zf$i)4Zp&#($mzY|4{`RBu?k1(MEiCf>7u*o_8xs41|4FRSx!j*w=DtGHpm*=%hn=<>>e6s=j_}0_la^7trhh^sxrgcf$j}q>CN0IH*lXfH98lNKv zOT4V;bFRUA4jSG>YO>GPhC8jWQHXTR9@bTP$s>#g5E>VGO`U!+iI=wh52?J%Uzq(l+x%-~VgQg*|XEDk~8#<(L3+@vm?* z^P-@-cSw#)*C28oaTxNVSP_O~9YK&ZD{zH+GwF}GaBKGNEq|*O=v#ZmUQhaIN?b#; zan5SU-m!FtBUsq853;RgL+@MRJg>2PKr%81kT2RX9Pm{tzK*QVZ;Fn1K2B7)S|4Vd z6=~sVGQ@5GQ}3a8H_|RqHFnz#omsc(jCo?397T88WYu8R^u6Mm*EPYRy8 z(^w?c<```rIq)AmU3D)ogjG8)SXq0g$hhon>7SzRUW2mGm^Hh*IZX_4roheT-_N_K zi?7sXV^dAgI*AY_Y9){N*P1uyLLfw;sMR9`J->aLCZJnJCK5Bqr)7oQU3VnROGUum zM4JJC=Rs{>m5pMA#U{D!W)<0Yy{IL&8#Khdwh((e4U4oM7pP}>Xg8F!1<2aDI*!Py z4wSN;N%9Ra{zfk{bvpdz9Dj&!vE*P=#X2REEV&1k*nm z9N5Q(!%W1`v>eMO(}d@p5G(`_F(AHF1P_SKA>`X4|0yo3uwFYKFY3t@mmnsH;thn5g~=E zFPJ#8k$vEstYloSDd*+&U_Iw`HaKW#;qWspQ%jrVQ9Lu%E1^r4EAx7lsu1urTTvUV zR(2FrVraJD8df4UWt5eQef-OvC9u?=VBuAgC5#zir*>HVhQv2*Rn$sRM>;?;vnI05 zoFS-j`$7Z3E?(CiHXJzlWL_HzAZkvsW-yvb**Xwn~+g0CCI!49lc-${hq^8pcAQyvBX@GcQ)F7#wRyvi@`C^xf4E0zC-BV$Uf(WIPf z={TwKP#e!a()Kz?E31|{-@urnsatn&w6`~ z8qYh%@7df|fTPbd$YAuL%&cPBP3hZ=z9`kgeaWWartEEw4VVqNwQimcaty2Pylmf` zehk6y(e^6zB#1<#6&d(zgH3x6H`Tl?PjaXwxcN|wDno`lRJa)e@a@C^0}4tJjP1wE zOO=a?><+W=+(s{kPh7&g&rhKFUku-z291S>JGW3OzL@KoFQ z!w530KW5f!+&FhXtr!sU6@2&sfVPcCgUMg^Ct^Huu3Os-q=A=em zx4i8K|1Q^N4ObNjFM=~RnFW`?P=_Ci(%6o>9;+!~D{Rp)oWr`}Z4r~=p6scNyhH}Vw5k8~}T zCechDnY2(sE0a=N6X^h;$a>OTkdyUkxt_R%!_nD*J3?7AW1+ATJWBL1rQ~KDmAuYW zFL_`iX$fu{zbd`1Hr-Mz(&_n4^6pj0eon10<-5w3(F1LP9Nayvd1iE4V1JorOcNa2 zE5fn2;VJT~*-GX7FZ58dZm<~-VAH&8icPzMM(pLWWTt0r&t>*VXJb8#!Vq4=jZP9FMF7rJv8xf;|7x;$vIsutSNG^O@fr$SulSsv6pnGuclas`IcAi zzCGYB1&2`BuGQ7+h}~;TwsZ6T^>cQ^7&TxX+75E4r9?+qE<;-W8E72|cfJ2%>2_`l z?5;nH2Vd@RgMZs_tnLg3*aLsg^y7DD)kXOXSX?>v0-86>1X)9)2lB)yYBIva9RFX| zP!qf!d!J}S&bNd&skNgY~-R)!u| z^oZX{+k<$D<%>E8AX7z&84vzPE_drvcRd*Mqez^sNW(SIZjSq(>`F>&pUpZ-!I8BV zHxY6d1y@VyWK`~7W6E>2u z6ECDKeP3DyXOebvTW_fJ`c>Kk=fB-8^3u6vub`TjM;y$)Y8WghX5u}y?$cXK0DC4a zn#d1~Pu>yHKM0xaVXrfhqU$HB``L?i_&;rgpWl&yedHAmwtR2!aFKA&<-ab(<&_RL z#Bc0kLBHLPAU79rppEd;K_hN{Wk3DptfoPVYxNv@5kTL^f6T8@G%#T}oCFqOryY7Q`XzEcRc6T*7_UB>;+YvZ2_#cMu zXX-NJz=5i}VDBd0N91KT7x>9F=lh@C*}s{#XvB@x50FX<(AGx{;J|1-W~}!!bJX$# z)_|BI$tmrUQII~i+DL0i99@+#2VG1OMWySgrj61=!(*V6zcy+^b+UZRzKje~r#V5i znStK;%}HAlG)$(7a^Uw%ZvOgL zU`xdK4s7i=PvwqlwqzgatAzDb%!`uiIxXif%d0aF9*#)>J~pJA-kh1d=c^xje$>2v zZFxOkLZ~HHpj-@EY8#gpzEhs;xG*3A;sxpu?{+4?T;*5I2Jt%4KFN+G z-&e67cj`N{8*iS|ZgcICMQXH4>fCeh`cUVp3ug>BkXqJJ>K0n(04JV#~ac|63bKlKX9&kA4jLtb=*@~c{0i~EXMoSvQa?y*z z%$^~o2Fr~C3-V5R%@|H)soIrY5@))l4+9n>;u0TRZV?hQzpgx9IZ~v#hgM^2;e(_+ zUKwZq z7j9p+4}3e!#>~#a+KjuwgBJW(vg@ket7g4L)3XB94}l64{# zxUl;9+b?LbELz|`^rx?&2s324d&5Ea)f=Gh5HeO6If0VJ8kH_9)F%4C?FRR%Npr&- zChb*(Sa<`8r{1&1K&U^uDRXtk!8o7HwG(IHl=Qd_r>@r0Nx$_7-L*pqwwp@0pTTdc zkl>BsAm=q)`~x{^*4f(|cUX0mS+_LhL_i|3;dD=vB>B!#772ozMJyGmEp)~m13+@l zb2;V8ls%>-c^R>k0F+bHYX1R@1VjClLtKD20!^FWv_RWW5`==5LCMob`WoX@+_|5< zK3Gasr?6Zr2kI8(fZE!+Y07MjuP?t4wO~!Gmx6iJr7D;8q1N8_wV*YW`IG~eT!yvUFcXQ&Wdrxzp$?KQ3 z${!sXj`9^_!hI>EMZ@FJUXNlT1iZR74Lqk*!rUZi0l!ON3zSF{dCm<^@8krn7dgrg zO?r>DVD5>t&dNhfRz-v%X^=I8A_Ju-XNCx?*(+;?7!zz$%*4EiA-!3=h>42_q@C{N z0CL$Ja?pj#MHzPXTmYNoM#gp>%Q6gxS1)Qtebx=%y(QtL)uvg1c3Cd^$tc#Fd{i#c z;iN|}(?h4>l)>N=MD9UGI>Ml}J_oOH7qElks#ikvcy*@@G_<$x-VQBMA&}%nfrfDa zaf!XgUbgh8wZz7J_=5KXSBeY zHTK*hM#$sK5FShqILwpCPqPOq0%K#9wp9=f)?jn`^^3OE^4eNc_9B{oH?MkkCAT+` z3w1-z?m(`@qVMf_G0Q_~@h$6EW}9y^Bc5tRN1>Fn!2>cdv}nu_3O&^PSeQKXc>uZK z1h&IWHn?jv2AQCVwBxxX9i`ORyX!2*#(a@v2FPt(sIDeEg{C~YG<$)9fweb47R+`o z!S*DXTAT4=vw#)EZ2$wLdEp^~Wo3`En($|QcPLDW+D3f8#V<*}$C&PE8YNv@$)aMD zqU;i34ydvr(HfFj3P{hz5sF9GfWZNGq7DIH5c}j!^c~IyAs-Mjrpq3Er{l}row1Dr z{%zSoBz@ zyxN&@Xgzi~9j(C@PfVL2D5rjn%&-<{SyK)U1}n_!eh@I^QBEyH>govVcyL=`8o-jx z1j29=_I4Z%(sMIe2bI$KTyA-;bpE4jN2&se5hb2EIk#CaOTl~a<7C+9-`ZEBHB{6+ zY&X`;D>Yevfbg@x6A}X0#wxC#XD9gZ*;f|8*4^O9%=M^&*G&xul!lT&L;p1IuZcIW zif?)+W%G%SX?Q!-Y^7XgD-9Urlqnz$g)m96$T1|Y?DnFD=JvMJ4+xuz{raE64#$5+ zwqob_w{&XUmgxUdX#X$&1&96>5g!A;Rl@t*6@l7{He>KGaYqidmDDStgJi=g*!%I;qFUE$@Mzljb!#jKOv@WYt*f-eqR(ZrL$p&?&DWXl zHLn{Vk1OA2AyulAvqcC?77nnp`#v_fmip)JI-iuj_!NY1cq$eZ`lH&08~pih{1gHE0p2>GLb$_JdP4ZoAGlfQE> zvvI^ls+wXLA!ee2G$tKRqOwrZ6gj17qv4Jtw{SD#*ayj|L#*q7TaLwmxE1R%v@4On5}P2%|9{Y|;IKZ(HMe_8ixdp3CX|A!-m3qPuOzX&(XHYt!TyEUC5Y z;$#F55C_3Kj-3(<(Ip3e=}m@0Ax#ED(ryvCayQHBpJf48!BzwI5UPy3jON*@pVR5` znI1#-`hnk-y#)s1ax6Q2!i!o4g1Xbf>Ha7Eif;UFdj#vC1=tGVauCu^RFhsZ-4IbO z_07~iU2eKfqkD%SbXhdTr!@B52+sW{KvJ% zOiQ`@;y3Ck$Ix9Vyua8Zk>V(_75lnDqnnF8W}^Ms$ly$j0&S-oTGlexuPoPX;W(p6 z{}wjEjrF>1_c7X=a3kF!2M?cyk}tb%+_*6)N02KW0k67o%=OA6Dw*g!D`*$WXLFp= z)-`QSWZGJ#(n8cwsjvT9;Ki5HWH_~+QHsZ)AXHS`G?bEQ%^-17M;aKw&L2vLdr3hM#70 z-+W%6Igtq%=zKx@eF86u5uO0hNq-3L1a8Qw$#md@@H+7!1C7bAGUEg%D_uKLVYPH9 z1+!FB1H*_AImaF6T=<_>?3jQABS3wi1Ym~JyhjZs<&2y%g1-(a8~lh=nke7(=o46P zX;jtc1hZtz0#b#7t%)!No6_JQ)mem>YH6|#jGxjYV(Cu36_mqWj_DF+Q~0ay9o?i)2GgnSBE~?J zH<-6`PR4`MMCNE4it0VpOmwQ0IZhbMD~Ux3j_4TVJo(BrA-qM43|?wkz2Y9K>Dq+U zJAQeN>2KK8-X^i~^kzol^7MEuwoT3TR2e$SN$WMrkW44(L+Pl|##O zL3ml;_iG;;s>)2nzZFl)Q7kUi3m>Mh3ORBqP~f)UCa#0E4*;DuyN2(h=LxpssC@5y zmPViv?CI@`5Ik`=;~i$|ay($Aik$7}^<5SK7Os>KV))tQs@^1#!nD|_JyEQiOrgS{ zG{MY?Dbhj7Df(y0gR~fW8IsQ07=$5_f~&%IpF22kxit06AmP@>4yXp7Fp87>lYq6{ zIIO@{961X2`LA?P*K095xOTR*H{H7EG);eGMfwKohQpwfA=T-P$281JX@;XwV@94_ zxR(iUM@5cF=TshsOhPA+4`>~Gn-4XY0&uis7wdOXe|zDodbNy@u78Yw9$nJ5`7B1% zZjg!Xt!@*PtWbYTjsY^o%xQn&3j^js>#0L%dWTGOT`@Wh-8`p!V^hE|d52)y%sY{V>@tyrf?# z5hc5uTOLzd5UtjPX6*RXFMqOTe%?9Ia~U=HcF(uCv~N3knV`tAvMP@9it{tk5p;F^ zErr>R@pbppz;72tbRo^I6{yB6hTbRnjTc#%`$lO{B&YcTwWEbTk-gQEQ?@qh%t@E5 ziIED0XER{?+O!9NEYHUhi;deGp7ISsqvE1cerW?gux2$N@u*rWY(1Z9NiVCt^!tPJ z=||Hpd}4rA@QNaU*8=Mm@VxyquSVG$%qcW2wu<@lJ@cxwa@Y~OLr1}p(K|*n_~*_# zicv$-HcY`G9A*8LRdI%$GG)rd1oFVWg~>}bG$Tf-0L{7Y39ZTftD%nXi;^JFbap;k zmB~!IB5rsXM|7{~`}<%o%D~P3KSpYHe0qF4LrZ9GZaPs5YiAQjI#Fu_XA@x)BRgXg zI%yMIGiP&r23C&$$&3I00G@w6HzT+F0qz2c2r)K2wi$?Bv9;L#ZD4fwM$o*nJ;|PX zE3J=Ksx@6GeCLp~?9|wxG+mU7k|m(xAL&YJFn*{|JRTAbLHbMy_6n@DMbK4 z(S%I7L=n#O)64jgJLUpG^E_;T!eK?uB>9+`Ig*S5hbMEpk<3?4@^8jx=n&m}a_h6& z(ah3&Wr%QwsWHLZ55k`$D=%;{odok|(g=A)#(2D;_0mAMOyjA>j>4z$%PHk#nD~aZ z(j>CTAad?A$jeZbb1!I@4e`YEuiYdZbj6KPsO^`id)6YJZX(t-Z9iFawlqWF1}wXm zq7KXgk$48fl?01+LJTk}?Uz_F($pr_4XQQNwa{dMRDn!C`ROtjQApl%f;rLYrT4H< ziQ+`)!gCbw*rxvwL5raDMLAedE9Qy{s(XRwyVA5`5!P9Txg}ITx#WO;2 zcQ2yjBOeug@s+6GTsi0O)LuJvkGvqrl%pw$JheR3^*$;#4!NOO`5RT5w=)j>g)TPV zG>gg8v~ZPBnrfbsR~>6)@3mwZOZ+AgMKPn5z8Ea;YsNJxQ+3tm+`wx;$yw9$Lq&AF zEfkaxs;sjU9n*YRPCY1_T^nXN#x}VDp7KPc@l-wr3N)#%KT?C~=w4~`q z40oVSs(Z(oxh)Z*7o^k&TY$D&6ggA)EopYx7OMKQG-jaR>My170yz|3HnUE;`Ogr+b0E&gab{i>aHFTWzht0}tM);%M@?RQh?}GkwpWsZilwG<4 zb6H2hHcqM3>Tt+K8|{ZDtA;huwMRs3AWwk`sy2$nu~~d&DE?8!3Ra_qI%&Qa3u$BSjLL0B9lopNxol+K^51cIH@q33wh=RsJTXli$h!&|zk9pXP@}>oK~Ake z1w7W$(tNu($H@~`hkUE}b7-8fp=@KM?$MRl_5ah^jbreW6V$F?B5}>vN)L z_d#o-Gu`?Lad!t=e z-sh+#zcgi7NhjybjU0W6K%3DzuDWY-hDXP?Yl7==)(o{_hc4;by>LKjexB^^`^1k) z0(iDH>$Nqo$G6kNS~!@iYrhUQ2p%*DY3&3~?3~dKyf)$6KYO5kvo;8{X0NJ|V0HiG zyB559*2WB(7GckGr|7J2#7#_uUP|GlwSUERkZ(gz7;W|AgUQ($jkyrA?}WC@1frBE zk~T`3SFXl&xw9UGV1=YqAJCCDYpTm{n28;>`9n_L)B9>rpy+R0wj5{2nv}#-Myny0 z92W4Dn2R{;LgUy2lBpr+BuNXZSypjwArSKiG^dI_msXj|6`(D6$JUn~LmC!C2pwVE zx1oUz!wt!N;j_v=BeU{abWS&VA3d%|mZC~M5C!NKxto((NtU}l?tc_} ze)uSU9QNEfck7$?gW8;D-)yfgRz4uAn^E(AJkTxnwfz%gj*b35>vCpf`gfE>%{ONG z8zu4ZqeznYF9>bdzfcmizuiR8Rv%s1rU@%QeITXQpLgF9VK$=e!4S^m-hZAU|)4i;|HfbtPH-b5OOq49u1ll zM76WwlCe*jt0ATpDg8UKm_Ha*VinVL0RSV?mp3n2^n=PA8}4` zvgk|1bhETbKiF9`N@p}bP3nd&SPKIMND_*=!x$+JyCv?e_zZ~`q1jn$*RK6xc?eoV z%%#~c6_^1z39+E9-#)pw2YwRIEQL;(!#~G&puVh#y`g@EVdmFiF)^EMvM&{|QJ`U) z=>|FAOgycR*2Udr++2u}<0Ygf^YJ$vNo1m-gP4P4_sfT|8t~_|)td^sVvfw1#T*Hc z1*>GTt^a|`L@+3R5$U;QF8WjQ?4?-o(3O-N89OWWH_)+ReZ!+}xd48a2y~i8rq*yo zCU>?v_VSL~u}kc1uIt{m#KQ3tDU)tNEBqIXm-)7)CAXe3Z{Izwx#Kx^+&On%Q-qTy zO>PaqZ1}*SFpi;YmbdU&6)eYVtjI^0Pe0Pzu5LlqQAa#4?k0juBTJCYyZ3?Wvlzsu zci#^XJ)2#|^G7k*t`;Zr-a7)P*sv3&)7tK02Bv4e{}1nmkffD09tH30BZ|0K4+ksc znH2(vU}}_r*Tqksw&k}jsm!NFfroV6mWAkZ0ms{j&i60jhvYV~CVCKUJuc$wbgQnS zZG-~bs@UzLXUY9e)cJFQW<73K-7B0hs$FwCO)Pe6ngP*w@)8%>3m&%r36AQsAgr1CR zk|E@*!%A12cw_@J62q7cON)4Xx_%Srefd5YKAe@wGSZ`xXffjEHmj;_#B$1N#OQ^! zasI|N^ql!FxUK93vJGMWC2X*ll!kqb?_OZlzH8ckF(yCaXDs35DCQ0y9||5!1eU~J zlYk}S|CJne2YNer{@V_!?k`P!p}HvtBnbhDFi8ca=LwR+0ZxOy1e!UWbn23HvPo7K zI3L8Ta&C5|(_@XqZg_+}?duYD{IfmxgRrGSJWHLZbfW69rBwG|>XDO1*^pdrqAtX^ zJ**l7=s40V=FKQ3gv)G&;i(gNw)`EQL6Yg0}6(3Wq z;M7SAV{1fIwJ=~VVUh)enJuwBI$Jd`5|kT`yum~yM~=R*LS-}@9MjpdVc>up_$C?W zezj0O8Sa70ncWx)C#`zs(JmNRv-4NflRnTcwgGO(!XP^zegS7?EJkc6wyWDrUjRO z?pq$^dvaEV@5l~-PZMwgL`rvB!mQQ6mw@UMBfdGdI;`= z0Sun%)J_Ta4ZR2JANMHam<4`+OeUAf2er!MMr;j6H9-_IDVR^8=rvn~z30P-w%tAU z2eM<6W2n~1r@qH3(Y8){#E<=H0-MDmpXJ2aF62Jg^qRvl1EGru0k;p*e&;%Yr>3T4 z??M0wIN+DIMNP#?dt4YZVf#M$lyQB@bQH;N7I8J;7_A})3Xr$r^cSOy)X;$AA9E&! zBVmbKMBNHMbViGTwxS~>Xc=*zY6pIQTnhad}4f2LZgW$eE&#N0WIZ<>(snJa)D{ z@8#)I0UIP}blu*Z^eBZ#l+;TE-MLUH zhl~V0`N(lP&`|eh4bHeAIyz;*AkSxD?n>P`G)g@(WPlGPz25}%p9<}Li z0b#wsF67&H|8y8K{%3Ls6XU-bkxn}v{ELV~@c?2f;SV~VfrH1ncqMJOakO&UAA8X4 zjIbf4*9+uFJYSE)m3T&aON^;N2!;5}>mPi1b>?N@r=_toL`J|dU*^7?x5*{#$c zbp5$kmeL^peO@Y(U-owFe4mGM2wQQzZ8PSmF3eklJxuAim>0ONe%=e1{8p1_ zB0c)ujQ#k%rFG!5ZgQGjow_9u$-ab>GOcN18H!g4oz(1C4RM-SJr^xg{^Erv7U{s7 z!+}YLW{r1Ctlm4-U*6BnZ!ZGT&MWQK#SxK+6&Zljrh*ZrRzdld4nuMq^_~;oWUmE- zF^VQ?o;Y_?qy@br=X>?g)8T^cr zLrQ`(K)j4#p zhmwd_iOVja@XEKH+&kbH{Y-9NS=N$gTYs%Wt@%_R+y>8#d5xFiI)9;a7K03x zx=Us23p)VIO0xlQE7~pE<bAEBpS%;ID3Lm0VFjL79WoFEvqvrf5$e2^a0=S#+ z{b`|wbi@)8$nO56_>p?@$t>^d&nB0^>(I>}GA?E)f-vlA|HlEtx?Jv%zyfOWC;Qak zkl>${)j|IWNR8}}fW(hN{0(ABNzl5*Sgs!+MWSZed--nQDmAgssf4k)KZ?@7dsH+H z=%KJ{3!ernl_K(`iIq<%#UWlO=4t)!vKd~b@z4KY8?zmU_^qf}nx&DbT@F`_Yt+!P zQXZGrH*|USOR|Cp#bDISCri$?WOGjU5|B1ITF|{-I_7?X8I`ehFBG43Cg+` ziW#oj4l#6JG=%ZA67?hIMPLDBk@h^^pm~(j2dJQvrdi9!GipP{$1DU>@yi7iL*iI? zy0Y(eBV+d)P}vo|afoZa(1XWLp$DN5gBJyTiZ75hwSR~cb$|p;0yj`;NpDd)OCZ`n z$^egVffCIn}|UoAGz37FJO2JIJmXLtS2UNXUidw zTo{(DiRWz&km8eJoWajAvlf0GOL>=~vtZmO-qH?rDX1|V)A&82(~#AF#M9gOVOJG- z`_*;%6P3;Bvg5qtu@8tLL%V{ANzynGh+(><5IG8J89H?blfmoGB0o8p|7^YkCYuXx zS)D6ZU@L{%4kvBuE=z)O543jO^)v^OtKs<7a)z0^8{_`%W6s?^O@UIaa;sgyAA%ae z0u^bc&XCGWI{ect!HW066GjBPBOg1O>h$4d+=}W{RU1r*H#Wm+a2D(Nt@2x`T;RFmXU@iI^3w1Dx3fY=vNyZQZLYFij&aDd z;=+PBUnu!IN|8Y=irOceKdzGEQdv_rZkiF}dOGp?BSkt@T*M!WyS<|6dx1wF+y1x~ zRkfWG`Rq;pHMzT0WnwYGNF05=f&a7Lfk%4e$r%ZP6^mNjMRDHaJ=-!Tx(cDeJUc zc;p5cvo7Dr>t;QF^_A-%s@3TB3|Ee#-~QGic-uIbL76&^{M zArvALIpqxzChMym5$F09HVb5J1KTGd6g$enzklai7MK{X7*46lZ*Zp9j+K@Uk$04< zty7sS^3F?cNzPPBS!g9NO8rq?GH-uYl`Jz!r;{lK)T35b;o-Ko-LFw*8XKqnerBSg zQA`*OCDtYK-TMa3)i zXGOF0gNOY66Wd-6qY_x$Ilx^L7`DrYKtni{@!dyISgH-2#;q z?3Oo5s(*Q|nU3hrt94MQq-%&2fl90HZj$)R3e{UfKMiMQOnJj!Q9k`+mvd?Yqw{SI z5ZzTS9;8dCFqTw*wis(_;8~0TGCT7b1}*IB?ifW45ConRSn(7aW=~lmCwQZ4wudu& zPaPqISX%0UZOowVojImNCsQQnABjOGb4Q6Lb%^Uo27@iOvFPKCNm#GqjwW&idI`p? z#7G5e(ZjpOiSr%OgvO3#PR+7S0)E!?v`r(#bHdP3aG|A?Q3dnQBtAbsqy0<5`i$a< zxfA^n%i_?_=)Q4XCH4I+jL!b%rps`jkd2H{z=Bda!|0#R*u)aFRZv|D;?Ve@#8ebw zN3GPXjQ5FDh!qpY299;6hd-3lhUXjJdHo=^RtB8$4lgG`fN+{-|k{SR%^ckiEi?~%2{{T&#f^FJ0CaG+ilQ3Q}H>fLz zlO?7}nn2VQpQxe>MF<%L=T@uamfY4aXKqH_v zrxC<&7=|7PB8Vm~|0#je$l3{3A91+b8m`hWcdx~dzwlz6GxGYLI%5)4Wsx&Q?cr-B z9s5EP=}~}%p)*6~fiV@{s=?%()W#$j6MK>)U}VO7u~AanpVKA0gM?!HjRSlZH+ zlaP{?3CNJWbJzr4;Nn-ASFC`Tvwel>GfNVB$XzkaYa`(%WHhG*sTM&*0Qn+L!jO1y zI0^j(q3!F`27QZ+m@_+jCfS7*ObZ=4ri96xXNC~PC^Nk9b0YD?sH(|t0x0I_tto#<`OBPTfxjsAYprp- zp3kp&ets`Ex0PzOJKWxX7hCO~SMhrN{;r0}>3-cDr}1@-$)mnxh4FEFf8LzJw7=gn zMEd-_d0W-%^?kl*{f6CM#?ke9-G7{`Ng(HTeO#?IhSA+l!#o>XLZaGmBqT1=I5;a< zQE0s#tu^j|?ructQNyv1MeGn8xI+y*q3TH$igVmXl^G~J`wY(#{q+s1Wf9m0+lvFk zW5|HcdF)HeMvP;4rm20_NebG7_eK;NKt~Ctqw0w%hMoP3>T0N?ia4{zoB007F;;^b)Y@*sG|B@5>e zp+Nq+qhRp}ID_@qVnbu3;2R=1Lj{>3Vfqc ziWc1aQ}5KCt-Hf-8gY?k;zR9<3hpX2V=6!o+pq;Jf=z3@7UdbMOis1G-#iQ&1GzZI zhom=g&-UBnA`C4)AFRE%_M!~l?SR{1bTuIQ*WqW))3Ggt@8Rb3Gs!$uScpp@Xoyt zaPJ@l)lS0Cp*WP=?k&_?GT-9xYge_Q zyypPIo;MvNzrL`@=k4prXJkIbp(lrb4I~iy9{#@-LRXQ`Klqe~5W4C15#ITc_$G9a z^yV)22z{5nXY?VU-X46yr2lIvLMPR}+`Bju-+N6s-z|~I`-z*#djKBA{%9N7zT5*p zQZ2{M_qTt}3cq(M&xg^hoeeJ;iQ?r7`F_x?Jni$fdWfv|e`%dZ6(Ib+l3U5E`pT>t zy_-Tt=GORPd6`P;<sCvKJKSl1WA}Tw zr}kMz@u*WRN!cB}vU#ZsZ14MDB#G&6TWv&}qjvec9e6VuII9NU{o4G&wBB#DLalNa zxg)y2$93uQ>gVA73OSI5+Dm^{d$XMMkbi@$v&XbqO~K3KaLQP=DTVkd>EqNZQp3fW z$+Nt$eV&g*g_l>=t9O3AZe*u-`v6+oZA&+v>F!DA=oJxJ`yIuWz75=#PGKh6vy&SXv(VMw9oMw3OSsvXtS>^d;_Hq}+uuD+ z%(LT~nGhHA!2?OFJVLIZaQB*M&!yhTo*~Dg2}md{>%ZJX4xUlFkCYwf@M~N0qwa{8 zP<3fu+Nq9&bj3YZW!whY@zu96?QeXLp6y~v-bQ!noc;148hpm7p8FqjlgdXLK8&6r zHt?Pkob`ID+c?VbDBjYGEu>`U;ocsCM?gdJo6o}aFEhwno>oe^9 z-p8iBHP0ezH~9v1L`bH+RERBN?|NGLjNJDHfsTwl%VXms0!fdCRo{*1cDCOVyk44~ zBd<4uW97yp((sb6xYO@-hgX(gIec%SBe%D2IRRnj5A(nL!o-nQ{Kof-wqgAvUqo%Q zg6uq^VhMg)TW>07jzYXxH*jwdRK;eIHGuK>^*tB2jKp`u+*8S z3T5srEMhbQoffmDljPV9*(m%QsmBn?;UG3PXr2hJFVUROP%if0dMJmq3uU5% z=;}L1gsj7VNO@{&4Oqp*JsB||Cx5U3@Tl}qaSP>@4LHt~e@}ig?pt#rr$Nq)t zNp%mkdg;j}ln2ADQh1|wcCgW@SW_@-b>}%(&iyy#H8{-wjpe~ZvIbN~>UWP~-VLHX zUzkpA;$prQ@Uq$wat+oa)Az9KXOWxSml@7ERYq=N%HsGDjjU=pB=7yR9U!I5S>pUv^Wp% zV+x>T*Q}OMN^7+zbdWzxKSKj}ETI=CiSF5Ok5`x;s32Cb zQ9OMB-S@6BJP(9+t8<@Y4<5ZbLRC|qo0~PabP;@fZvT+hurdE<#i&Rm9f2WRlOM0y**vRQJmJ}3;Z)#SmIH$g>A-^DZf@ng;B!q?-(_jB4s zw6Zwq6gRgdO27op72&P-s;T8$A?mo0wF-Xg#q+(E21N}db0~>e)C{X$!EJ;3ka@y7 z5Zv7^;BN4G?L1I>c*@W{KRjjOmO$w6*IN`%y~?4Hx$oY)(zvNb;N~&QIWIFyyn{S| znn*fO5|&@#oX;y8{Ru2_rt|_g%S@)@t0of(6`4w_8q?&6kjy4I z;6Mw%^;EGlYeeo;$^cBJe91}=>~JC3W;uumVrvT_J=MHn2QXvglP}@@dBYIN&zQ72 zF5_J-SLD;q(b$9DAOlKihWnF#pLAA(%`3S z8(n0>HFV&Nxt+qHU zhM03V>-jl#PEhhxdpu1$-6hW>?3MJPMDD#PyWt01NKc}h=uee4rW-Cu@a2B4!3Wzi z=+=b<+V5b@4t1fVF>Se|k1j21O6G!RU*c)HM^GofwVTjxj8#;(BC+m4?S_(CQ&o3J z4M3bH#JYk>tq6xywS|zokYrl;HpeNrZ-e!j#Tr7R7|&gw8R&G0FkiM6tsr#`bd))W z;-~WW=W7jm8H=n$uc&a{hqrc=gBmdcQ%PXJGRf!M*_p08Ee-99&e}+^gsv@GsF18X z;|PW-h1@p}WDO3zcDt~9Zou+>x*m@RAX4Mf|1>b_xX|plsue& zxCDs4eW&6qm8Ylds`!dSj*+>uE&3PPy;+p|p;W3Ol0Wgv41HFV7}3BC)Mu?_5u~84 zwii;$0bu#DwmS=9ev8&@@PF3$u{9Y0p+8nECb?rNluaYe&`?U2eK#XN8bdmQrbYrR z-p)wxzR7ThWCGdZzFDP4hrXrJ3Zq%G{f;G9sd+#{Y?H+PQD@W)^3M{tR04-Us% zjY3Lbtk+I7%6xqr>zzY8lb-4vPu`rCc5Gk1+l`+G_OY!@on2PSRKo=7Jvr;dolVz> zWS0S1Zbv#U+LItF}PBFKt3}PcVj&OWtom;2=P5R*3=E}wgy}Pr7p>g zdzRem7FJ=Qq~D{r(8V)%Y;9@y$imR*(P=x|3_e3-`{ZJ^j$d4@sm~{P+eJC>CK76o z&`Np70f5T1g@Th-T0BC?CFtW^JhtzmOs`y##<+3WPdK?ZtM?0r7Pq=#CVMX!CzB~s z^=fH>d3qL;LLga|s)C-i!g#A|y-xccD8Be9z2@x5 zl!;uGyoCt!&gf>v8T-x+&{4-_>)u&fB{ZbN_IC`rOibxS?vXn|Zi`7?$`?ftO&%tGjbNk8S!-W&8TPL4h7d03mx; zYa{9Fm-K=(?=L?NJRN;F-;5B6VE)GLdf@8POZSwPK*>+|5eanttJbKXqeXe7p@*O- zSBZB;_Edp%-gM==;Pftc|wOtY^T*30|Cz(DGq*DLVRzcFAh? z*myttf)n(f*RTVe^5za729)PH`8moSPB#|f$41Jv{~|z*B<5$diO3gS|0RaAR^XJK zWJODjR^M2^^!8>+16dY$lhV9_tTCoS9PUa^QmR3hVF(C^sMFVo1!PSwtasp6$1GL$ z_?`DS`$Uqu`Z=#>Y-29scwaRmY#q;F?u4bECGB+Pb;@lD`)nLE-FHv$qsi1(r^uRV zZWg#`##J*FCqcweQn)i8UO z)oyXK-eXh|Y$h?;fQ%K9{wNKq1Ez7I=OQ(DaLx!8GISXfJH?3nTMUKa!jlKjS`fp# zT=~+Lb9m_NxPm5}N<^}$PAExcJYxdV#bCZ-Xsj=j%z-tCX+^XgM@$f#{2K|hLo6Av zXb;F7@?Muktlb0?Je6KZs9Ru&xv_qe?TUSZ_7}O`?jj>}AGmfHdZ7@LPMkXf5Nq4V z`t@#l}{$KIn!FKX$e6S zm7@S^*TtA`l`-8LCQ|JOsIrWAnG)Zs4p`|;XraBvFT`fIzLaO{S%lKj^_>Vc`Hd}r zCxrL3xK6VM+AsokYpK#qw6p|0x?(3x>Lh||KCalEkt88TU6=W^iV zf20go?|Uk9fGMC3=KhwH6Iq@*xgRih6nd;IAo?Sv#5?UMMt_AGMYR^h<1 zTfIR)W7%tvy__7IOfPsX*)a#{hRWHiN>7Paal0<1vbtZ`&{GeRvfbTOBa)5_2_1ym?q7LF_bAI9D>IM%g`){e~;+qP|6E9MGU zY}>YN+fG(&+qUiG%YOHF&Z%9sf9$HRdb+x*e|6WK_dVvk#(+#(tKVcyCI4Mnww~nY z(<-wQt3h18mhv=fbAig8_@s}300vC>3Mq_Rd+oJ5uXw&-W7tl=+s;Wpr*pl`zc0!( zLMiNoL};HOtA2;DGLdS<^ZT4ydd&X?NLmUQ@xGE5w9~}=A{#5@^VafSBRsU6hLo34 z{jRKXWHo5DNRVT=cjDb9j*|ItTnzp<25c0l0n;%Z7IRyAezn#aW)k+AK&yE5Lqb75 z8bgxd+;JIAy@aUEQLLhea}rfR=qvArXCjt;AT^o7I(*n3nxI1r-bCB3$YVy;3256a z^6ass?1+E(jRq+q-bG&9?Wz3JLaxfU^G=FJ!jgH-=B7+dcI+IXl<1q%a+~zan9=J~dvgR3zNy(ZDFtuaLDrJ{4x6j3 zaaIoSF)F*F+v8}O1IKGNI{czK!F{c+iTam`qt2KE?}U+B92CV2q|~OiHlz15FYRXP z*P-TgkS#OT_TNXLEwW7fcl~oE9;|$NIh4nvXZf@-_b~7AWjkkd0 z1Cu`{!*x!Adf%J9ev5Dd0Cd6G=de8&CsV~+G5nVh%Q+s%K&T8KD7h>KeSupScPHDG zWFgD~93A6Kn{+Td!PIXE{&X%wVUv&6q`X&;xpZAa1Z|+aOwCVPVb}^z z;~%)7Q`fk4TbH@jm`0)1Fj#tVPh{f4&%UT#B%6B;f@aig>F7c`(kj&I1*jda_D@d339J2~MIdL+G0$YA0 z4KS0UCrS@0`k>kv6jk9OR$B^({xO;}r%Iv6g7Q$-iG0cdr8|u$yB)~=A(X5p5t!(I zqi))8m4Q}AlSo*{M6sc9*Am&vo%8;hDI;yYIq!nS@_3czqENX;3fCmD9xe@TIE<~! z)U3>oK#v#*ZB-s9VQ?lWN-BovAMU)TMKbRk$ z;nP8Cyz|IQqu`(42?a;_A;t}DsWv|{y)UEKz5ZL-SKp<64hiE{;i~M7tuwVgo~Xuj zr7y1tz(K>N zi;KOhqg(E3ebZZxhKB?as(4nfGdHui=y)yOJ-Bo7D;hAnRuNqK8-VkVQhUZ;6#QdX zT>6w)xPXdL?jgQBOrUAb5spn6Fr9_&0wQqg4E z4v$D|D_>h}BY~bRwE-C==+~tIkIDdS%HghGY4PFI6i+zuY(0bLFKZ4%P^y_E7eq`F zIL?i`7}8$`TO7HlF)eo9tHqmBng4-Fqot8Y()ZTN=0#OB{l)*P-F`aJvKJ>KyY`G0*?J9}@G3H0={D zjCXIh?AYM`xZ$ASdz6PyB|P9MB9~{*Fu+|i53AVHhuZWWI+3Fnm=*4E-M=474mp)$ zb}7){who0_yIz5mCuwtN>hEkswA{J|JE zxGvQ_5RCT;xIYs+{I7lBzsYut^#AZdzxa+d_y*U%Z$%%#c_WlrfB1a?*L>;&6aTsv zH6U5n#CmTjQ`e4}f9KJEd}?TUw>j{A z`en{go*1@C$yv+2?<+dDe%<6XcAH)he(+z$UUrsWO$t}A#O5xo{(zjFnk739g_-o$ z@gf2>EduDU%cTU^b@+|~?u}$~4O+Sz@ihozS5$vZRc+f0aFa|uKw#-gqGa>&S-jfkPVIs5p>Blm#kvc7XRu>s&E^3Znc375|1B~_OrPo!Lczt^lTBOwI(0rz# z{IR)^AePgqjl=p5Zx(?~7rXJJ$0&RXBEIWmF`hwkwdu2=?i!F4w#{PeqHhQYOs!*1 z$BI*q4QVyKz(9q$#B#aTh32BEc*%F>TCN8A_&~)Jg6=-X>$oGO1u}SDa~^8=LB~&& z&DiG6Jt<2lsF<0idFL7r5~$#eY14LNnjH3ID$cy);r0C!f)^lPu0VbKn|9Xe2W6y_ zfwt{T#z8za^mj`&^kr1mneNEx@h6)^cl-F)Z9Ji5*t#nD6*~w*7T=jOhV+GAk6*t= zu1Q7C-e!Qzg*CuNb%285T5hccBR?R(QGQq$mRTUpx5NDYXmL1@JcXv-7m1I9IBF4Q8>xO|(X*m4qrCZuMd+Ox3) zMQsX+kz_kGn=zWz?NTIn1!)5*sBI-yWu-vOl_jGVq@T9j(H|ywey?^20Ng>%oh>MU z%iYTB%NMQ1`Gp5W5Bb4VqO-k+zNI1KiLYTtMEJ_^)X|^+3X_wnesMI!|q`CK-!iI3=K+c<7jgR73H*E-$^{ zZRfu^5UkQsSQ_Ki)le2`7{ij%7xO&IYCM?l!fC$J5|xDagx_e!xD9jd$2w4+2DfNq z)FT~G|7?)D%KBs>(=4{#=#_Jj(5PE=#zqmOJh2~%*{1b`Q#R+4 z`sYy_#QT=h6yD2;YS(Al$EU-k*E=YeiA>Xq;}KRi?tZA9bJwSB11q<>R4CoF`~KVZ z1GSbcj76o-jluZ)Ti(-i-jmIY`%uZJI-MalUf}wP4`j69xdZ;v@%Grs)SWdox(tZF z9yx1I0AWW4KGfpH0V!so=SmUB_1O)1@c?_7Rn-PwaX85)Qwb+;J4}@tgu?s~tdBRbKi{rG_geg*?eAbJ{wn#Z&VWa3)HZ zMU^;ri!yMQ>+`0?tQ$u))bpy+{|13kV)zpm(}-OtiH9CrwI?5EvUttU4-|VT|09d! zIvd#yM*VnRn8v!QkFBo^@v!AKsED2Be#|JD*t~8?ltIoEnY)-7v$OSlmpVjf{ex4g zHm1QZS%VpOo=2-oq|^ENOwrb)BltjCaFb3d0xPd6o80NH*#9w45yVcdRQDnAe%KuWJ^^2jSrMp0;7n9< zKHrf9lQz$`s!=sGYPZ?s0gH-CNh%sJWe>Dpq=OIOn^03p|R4X-$YXJ#ytrW>IJ3~Kjk0R$dIxWJ0RPuY0OMc;&->O;YW$$_{!-5F?3TxUb{W^ z6r?{0S!C=HovJL1*iD|+pr;(Q;3zU~p1%mAE?T^Px4iRxGTb#DZuoveYuG$Mx`k4S za4mV8aY*!%jLAH>kY%E2x1k;t+Efm<-T?z2&$R(6VqHP64+A8d0o<1ZUUQ;Yd~eX7 zv|-z33Sug%LHCET*-ADJ^ivotPq^)|p2@hj?*@wmvlipi8s$GtK)iY#!<30$k6mV1 z!MFh*t4_@Wz+0iI!1|IA44jn?WQN{Lx zu#gV$s?$wfE~>gair@*aisbmKvHyscbMJsEzHi}~94}S9YfRs}?vVqp(>67i5pzmU z*Oq8UpWdHSk(ZIm4g=Z3Qpn5J4D*7??Se@)ke}$`Y^LlJg@s*@=^)WkG>6iTHQ;8! zQ8c59No~RKj;bB3W;>e3=ot~4<_eSbRlokJd*MNi%M4GYP)6$w(wl{}RrYRTn&Ls& zlkt^ktHl+-_DLKDFJGe6@&2}%htjC^)`FP#{Te>ih{*omN;m6&O7LM|`Dd8#!MBqG z5gSbB5!ESp1!5@fDv=;(Sk9mnO#$j@cuQ9XXa2TMo$x@HE#-!_O`-V+WrLPE-3?-z(hpg0bFa@p9q@2zx z=2C#Af($|8Wz3p%D7l`HK)RCTunT*AU*&Fj5pWZ?w7}blEOkK*VQ8Y)81z)_4uMa- zkvngc&wXm?uWxLI89@4RVLYUDOKg3VmfvPS>draT*6N%|g|ge^;#SV>_AAMU2wImi z?ok!T8?(M0d6fjUIw+{qqFfN5ImSj`T3p5knaLkYFEoqw|4e_xpOH5t#J5*xJ|tvR zo~i!tC{B$mrk8jlElLvC#DYQC6mk@=B|ivD5)!S*4=Or&$@&tGs2B|eb6+3@i5n^B z@ieqpX37D&EXiKZg$~6^thxOwmRe;P3n9a?%119!P_axTms;D;7pfnYUGDco;Bl80 zd+2X{UT9eIXeVtB+SB{0Ke1B6n@s|3U{^4}GI5K*5ebqG~nv^qfiw)j8;T;X!Wd|c3g8pSoq zB)vb$4%^dc;L!MkAdf@dkr4CjvZ zdDYH*w50A7P8t5^rJi&@dl;LsD4?Pwm-OW$?UYB7|C+x3pHbZjSupRIB@z$R2z z!n9ej@5Am@bc$$U52hc}_AV&viEjI}I~G*Hm$S+i5-yIY4M*~M=ct?@mR3Zx`f=G7 z+do)PfDOnJrK?Q8NUa*l?%`$d^H+rm!kkFoN0bT5%6PPpRnyKRZeaPAyIX=*?2ZA? zD3NC>O)e2yqx1ctR={V7+tCcQv({y;dv`ONXVB+V*37>A8;I_67ei}r)>YFepA?r6tg|Y8uwJnX{n~l}=C_w-x@1O><~q z*a=$kx}}Jt`6E9KSo4k@Ykp=bzO0_gCoejdxR)l2mgyYEhZSK0?;c)H{1VB4p&D&6 zwb$@?QiFmQgL2pXdZN0125ZP{z}}YbT20+MjK8nw+Y^woAN(X>X_)8`<4Ks8=JuU! zp>?au6TY{7rxj%g-zh((FCH^tp{F^Lo(Za2TMY!RYqrr8tfVGxx#S%b36*X_c3<9~ zth}C_AkuPOa>B?kVsmO0z-r~!Hq+A6fa5X~j&oK`=<`@uda}og$NF^{H(G4eu6_Kt zdi(Nt$sx!3;BuNOBwj(P<8H+0aMaYNfUH6kZLdDRH=l< zvWTo@=iDe;I6^YM*f0FY!K8bUow8}unhWlE^b(~=Nw%sL(M4gGlZfnZY_>majDu$dBxt3Ut&4rLWgUZqF`Gk(H=n8B& z9p49ZXX8TfzjmDeW-iOh{twaoua5H_9{b&KUcu)H)U^Nwf&nCa)+5Ggh6OMq?Ly&s z51y2uM~tP;tt6P#Vfw5}k|}Q&dR0YM`;rCVp}vj@(BI30mZqNXnRL9rah7XFk1r$` zjYtU+o(`?+i>NFuOr6Q@i^N;9LaqL>;ZA2exhs4ec{Pe3RD{-&sYIK5=5JwyxZVn2 zQNcLE%klcHL>ySxg1_V#)3V^ZyWjnC)=|j!#L%F~Bl*YIdO*@%2L9)2+NFk_x4dp8b~UI22H z(p4XWfbriRKl^1;Ndi+goDcml5UwL$3B$!$<6mc?8}3JMipZIUk_dHjXIVaL~XA5WQrSkX;Zy4xN%YRqvbYFZN~eG{rxN0`_ji>xLI+_l_F z91GE3>bNiRZc(p^H%5eELlw>4l7Yww4HnDI)c+9m#0UZ0@#2q3`i{NH?uM-5$VXX)nlawzG|rko~BAvolIzbXJ*Sf zM3G1r?x7%dQ#2e@W<(XY2&M6TP+n{3{ghH^NkwtWK5>``+xt+l=+8rYl&qwsN$uA~ zmAN(J6Cf;Q1j`7c?b!z9n)_vMbUvs>4wBiVCLpQ~n-*Rf$aofy`eS9zui&A7>8&CH z&-lPh{@09Qk>9~-MYFUqah~`*5OHwIAye+qVVz0wvp3z2v*IuhXUWK^qezN zHK#d6z5)Yur1cqi*QYKo@$hkN*heOw84X{^a!^w4IhF856;0SKREq9oR0v;N-!x3H zSD<^aenu-S1FIC$cL_{%*VB{VKhDV>!BlVW^DQd`t4`^Q?E4U$1^;WXd4 zVuMy9Hrs`xV)s7sJ(c7_HJ^6K7Eh#Y+7!oa*Gt^RXTWb)Z_Enp1m?h$ODVivAnr)V zTl0*XM?X6{8*j>U7Rz-A>V`ii(ydThDZlmGfVi(FP8Vy~)!9#VDuytePXx{wI830F zLHI;1RfoePE@DtO=5%5Yb6QgpHW_0<2Nx&ZWfXGs0t~YWOMht7io2qnGsQBs(tE}j zx`ibvwy*KZG$tR7b6M*fL6`mj*@!*aNvSn-l?L27p6C1%z#e2cjTi`fUAJrRgIi8i zD0HtZKziWN#SBLuSgEv8A=?-mLApfU2leZIf*4d;TwB=eo|Y#d1Y_2A$DMqf`Z6wGS{SEP zK+cznYd6P`yl;COm%kt&6>%F`I9d5qQ~u+Eo%E@dDYFhvQph>HZW(bj+3Iz7UP zRaD-UR#P_2tqmZu&{4(`x`&g&WBv+9*9a;9(vf3cawTiknf-}8Nhd&!g|b?ISS&^=N{E)HlbxE z#r;g;?EsT1dEqV>mrM>zZ?r=T@ps0o7ZDHj-_=+^K>KgAs_Tf`U-ch>tiV}5EfBtL{@eqJ(T*z z#)-tyr26WiK~5R|;T1q_0oBd(Ubwnmbnr>FvrBsQtYY9g*!`oVMrq;c@f8yoS5sJ8 zXHiK4ZfSo(h(g#__3H{2-ffTWO}_dn?to@-mGA}1?ZdjXJNwK1YOm=|edcTOl55xT z-RTLW{;QMm2z#$aqA%=N2;G4CXa&JMv>kJI&eOOs-x|3{kCg*sRC zcW1l2qk4o7AvJjh0YL#g2RMn)LMw=oRZMHKN$kGDuxlCf+}wNt&?R_ArHZ?IKJ3Au z-SE7UEGDwEcTbP|RgZa$s-@2bM^3S$wu7Rteb9bpI?2pYeOfH0|*Q#CNmD{Nns127LI8 z)AjY_lG_l~wb*Nf*WB{BHhKJJYA$=@h)ndV!k)%W$OS>;ow44^*M^YXJX39Z3M3f+ zkG<>K-$MGWR&E;LqG1NF0Cy6@I@6NC^0LHa(df7|d&zZF#RG0MVemVUsOBSDD}$OB zQlQY#r=Eu}DBBPHI#hY=VNjgfZ#CWUg!UyX<$CeiHH~Dm6r}2*ew^8BaB(Uv$232p zdYLIcyqmbFY+ZORvZWEu0r$;H^Zgzlszpop=(zi4`jS zaw?AeLdb^38k_CdD^J;Z( ziLAbaFpkAmrm0q4NNTdZXP_0BN4l6@9*NNrlrMje!-~GgVHAvI9UPAyx3DxRU>`N`;aRWMqJUHI>cBp8?Q>7M&jIhVY1$e6IZ`FS-fB!8F ziSeJ|?iUziR_lLH0jPy0ZJq%lc#y@R?osEP^MV_lo0AV?l)U+vzHMeqNz_HLnfYNg zYs4qtXxyGTTY7Gzu?VlLak9FvPuaXayWZZ;_O5s0u`-xaA%cdeu5dFBlyPyVym{5I zvMLJu;g8+%%^7eohBY{>#Lzs4!n^t;ws7*FO*~_4J&+lPx^cbnczG$^F#~cZs_KS* zLns;1J=<^yBI_(+;n6k7O2$_a_TBhUFd=hOFyB@oO@4o|@V-=_76yD=#J{4Zhf*3q zJKjc5*2XgC`loZM26C8wRJ}eFS?+#rPsBZyw(n!2*AAqcD7BJ}FF~gzyM+OkoN^Kr z{M3LM9`C`XPKcovSX25c6{F#O1VPgXih=&GkikHDLI>&U%x@82;l|CcmeNgSt|C0K zBKP>RAZ+Xh$KJ|LrZAAhbq^Ly>>eVl0*@B*4~6NhGMn9_8d5bM!MjNrr?e;ccPE{Fy2WAcL+y0NKW@A@>e2$|DpQ*7+mBce@PA?jljholn$Aecvt&-| z{TLmi@>aX2*EcC-utEH%lk`n~N!C7Ex**i;W(*P{P+QX#`{I31YZh>smLe>oBRT z>sqz~&{b7>2`!2ZPp?xnWD+fgt*yA$1$TK;OS>J&RSWFST}(bzi?A`Pzje1s!Pu37 zb97;Sl1ufV|0qf>9fX`AE6V+%L7>_kr&vH`Dwh7mb{4r-!FJ#<03Qx#DJ!5gDteWU zc;E5uWkU39ryn%K3h1F8yh!>Ztpd zZojr?Ek8=G&PkE#6Xw9`F$)vg1f5TZ2yT!~pNLV+8{AR`tF;fe#@-O(X|Oh6<|nu+ z|Fak9y+M_ahx9v144eJ_2i)=BFS2%ELJ;8Nx9ZoXhg}*3SH|siZ*OSfeo&-a;n23f zKC)E+g}-X%f3xx>7dvEYWwy{XJ01C&Ez*V^CQc3#3YjUG4{IG(|B6&uVf~Tq{Q@?J z4*0JQKx~Zv$q<=^=gdYse$`OmXC~coets8JG4)oMYZvXue;omj_7RAN^BT;ojaZmt9{znf0V= z=WR!-Ry@OK2bV9mXYq|Y7BnPY{9C{$M3y@q`#p=JHLUw(S1t?A>?iF83SW8fbrI3) z-kiAfJMq#^+%fU4+|frXG+IXMH_b=c>H=vL5Qh7m$7D!-4-g6oE;z{7vSjfC$I1zN z0}w9A8IH_$y{nrbhyF@zs=EK9 z?#}b`MJgVr>)IGcgjCBx^!B223CjV8yWAp`tnon@NqcV9Wkx|{6ONU-5oBKFB(js& z50H;;K>G*(?{BW@_R+-$8>(Qj6O4uOkkIBDp{z`;I8p5yqSG)#LNXzexW0`16itZa zF-Q0N|6k&2TF-)?uiA2o$=1?3YTbgtc=7#AN?k*{$6Ug=nEm9itAkvMNng9cPgm7$ zLpg$b+FgG^1bA(Pu8d=C1f}H0Nm09bq~yhXT57n~5bucav=(xu1p1@a zzN$8GqF2Ca7?87oS=}bKOR|3`ZwK&eZVD5?^pWvz_Y!_xU)qyGAl?X#t#W;7ZkfGy z)YB`z{aTFg{kW86>_$OKhn3{wADC2#;J!)__ds2$2|8kkfP0m&jo|q%S=!e>BW2yo z1`I7=peOWo7Q(czj%h1jnF$e5n;IZiKmr0$^+&JIjp3qx12?2|c$lB{Aqf@Q=3gIm zH0Etn0|P+M8ey{D(wwB_{On|oIK|j)U7Q*jzHMw}Gy5`PbZc<$v*Rr(G$5R_6L39G zYns4ap)O>bI{MwoD3)$*DwmsWOTA{(qHxvH^vFIX!T#(xkF{$$Tu(!rTrQ&;qrL_u zBcx7Jq+Bh~=)fq};7G%lFkDEz3sJ~h!RP$lG&YjIXK^@o{R4W_j@g|1*y0qAG~N!~ z4tT1wM)!k8xQTUuxH<+XgC+LoM5bnoTIisRlgk>}qnqR%E|yYDw4u`kS>c~iC|HHD zcKsE-fuzeCf$x+iif1E8k(E=1!?XSGs|}{!C?e_TMV~32W@PE8hRO#P5C+wEy?PQ? zO^cStkZ%IgGOSa-v!p938i}WX)vo0%$F9lP(~6e-i3*3-jB0m28pCik#V*v8%lZqC zp3)gYW7wynG8HvNc~h0ZVDy~mco4`Ua+y^J@gI8}lL_=BgD&^M?K&9)CH-1as3ZV^ z2VO_l|HRs2i-xZzvz1@FxAt^rp(RW-O@VX!?5sHZUuKVi`_0uP+R*N#Z4Lr&_5u=i zWCOd5JT39i+Hir@B|>xyyy?zcm542O(R&!MCt&X~<4${~yXPMG+68`P*Lmtb#g%`2 znfTEa7Jycb^e{b9T4x0n(FmS*^x*Hs82~nW5ymuilZjB?Mo6X_E&^mzAl8l?_9ccMTx&mfGZeQ^t0k|MRJV;NskW;GW z{RytyNkJ4Cknr|}o@}WZt$#*0nVWODI;$P1tMo6vB*t65Ih`4OfU9`|sH8sWY%O%4_~cdw z9z;<2g>#L-4VDFIo-mHGzP9bN6HMlNa7Ki12aL#0dTcKSjj+PV&;=ct#EsiwbXXXb z$3{PSy;@^GgkYghzA@=KrOQT#L98}fEhND3XYMjkh~JvKmCaBudk)L1{)S`A1vZvv z@veDv-4=GozZO!Zn!x5`Iy;3iU?jJjwyhVU;po#mL>O$QS_dHEX+rA9IB9EpLi>g2 zt`7&6e$Ju0^J_S0&ng{S{1+xOC{oCS47MgiT7qIeLg~jTNA~WXvp10K#*Od4oxj=s zTYL^1^FM_3jc;LnkM%EM{T{e7hPujUN9cPU-OB%-X1K?y*?t83FkwrMhB`EkMBTty zWgLA`vEpDsvaOvi^8)6xUfb?@%fUMP=2Gna-RbUQ!~C1hnpU4fQ?ht+8z`o8K$CoO zdpXdP=Eg!|^vcj0(u?q3G7%$Y1slQNH6R9jckwu=58kP15?_}wMvT0$| zidh{tV;}2u=jsAM3n7gDiOcs0+dU=7Q)mb^KTIUjZ=G}Yvy_%55qO3Tb=H0oTu)Yx zF|{eAs2Q^iR-!eL1761@F!;8;kzl56zUl*NP3}2TalL){v(ag2&U?p$Fo{qcEziGGrN!goNviRFwwDjxV)v657jUN0XD9+#>0v@>aK#ZW}LI zavLA#nKt~SBVF!2YyYJ^IPE>d!OqCl#?%IxX;EW&jHRCv6|q=mkR<7PKFHZX^ByuAe1MiQFPh303%oB@8D_ zM%mJ)A-Yd5V`ZbK&GJg%spzjTV|#}e{HM#&a-CDge!vIIBUstBW=?yM23Aq_-zxb0 z?A-GJa#>xmgaGajq$cWdsU!GZF<2PI#pCo@u3MuaCO=UlG?y~T$Y(q?+Req+=dYCA zL*|+)z={vNC=Q=DUFm=X`?8S^B1eJkD4eqSitZrpoOwvT=R-O!bCM>`ud8$h^%*^= zeLU_Mh0Vo%MV&I5B5Fm znoI;$2uXBA2qjDmWgUS!!t4N$F@7RBP8QV^tqwmBnTH^emU`Gya3f!YVOW$7ZGA?%KGjv)88?8VWNph1=bbpNK9$6;~ z6*L=jQd6SPL7iGbTB)G$g$(5;WU170+OH6P*P&=vvZA4t3076m z4PBYyGPLad=TDjlUOaReuW>IXClGeFgSkp)kYv0Qi1BMHv6z+d5@ZMXA&_sR7SV9C zvz&We>QW@g+O7*ACzpP9YAklzQgi_V{NhhSLUY9NL_ZS%=6plEF&8sB8wmF^*Pt(~ za|H0%$uMO8eOD25v<+Gzv?i#*b}!2&SmmjT_Rl3Y75Rj4l$|P+PwP5D>56Ocl`{(s z+g0lU99?Rw=7y%x=|;miX;O32n}R&b6AbWZdlPLc|4hnq^JT4_jTC5&+_BC)d@a_@ z!Te*rT=8!>tL(9FIxV}2(K{tET{ciTzV$~%vx)nZVbOM@@pcm`NUtSa^dh15w?)}> z5cJbFhD$XVpaDIhem4I;BD6J`Z27=ugjf?5Q5PPV@g_7bX2`oC=}G{^rQkl?9fdgt zVGGxsB{(c~Zv$^i^`8b-gkM{y_6_b$i#x5p$8=kw){Q9*EBdoU@r@O2Z0bVTt3NBi z)f-arJz}!gn|75S!vArOB2(>rlO#Wh9D|h&f!oDOBLN6d1T6xFDfpi zAgUI_e%rx&IdT<~4K^!>!~fbWF0PXIW-0ujIb9shTq=R+dg|f*Suk65hnPnVpIB&@ z^2reBwDo8hE?1EQ1L{}x48Ava?*JjBwVSGZd_9kdtyMYTNqnie84^0&qAZq(No}Hqr^ZZYI>G0 z!1nT%QMyTczhVp{z|01JWDrv*F3M+ebCS*n_}(+v_OD&>zY)vKjQ_lussF#OXe^GZ z`sbQ}{|A1vz$@y$Uh`V3A)I~McULSBR*+ibnHy$JK{QlQHoSO{i5#wC$YwW_jRdRdwSu!l6}q_KuBSZ8t=-nwW@wH`F{}Jp;h3nj$dZ}O-@b@c=6IZtqC#U8-cZkD z^SuT%^5V3h2@qKnYkx3Qyfc@h*kJoCo%$og52SCXC$NCI!1iEjXKBa3pxU|~dJ7C4 zj$yZxG{sUo5(A4n6L)q*w2ozEG!yO};C}Of-))^V{f1|c3LwvJ$`WC>Zs!}*vW*$s zH&?CT55BW*vdI6&w8E<(YbXm;mg?#X|1YLx-pYxV&AUV{dSfR(gqc!OvQ*Wtwyz(A z%n-Dvahd@KfV!0eT}lQ9&6bOACP^DC=7;DXD0Q&?r%T2ta>9iQY#T@-!6sn=bCAAj zahkx3v9qFS2d}ypNm66M!E9WsHO(-3$u;)z#K9&CW|y62h2?*omWmIqjX@zT;y0%y zsvPJ#XI`#`!bP!p$f*SXn%Kf|2b$w_S zSKj+$lD3G_*KV;vIhU5j=o{0* zH@;~iObHnUZ3g~@c`PVDza-B_icM}n4?qyUe({o;90%coIx>yA`|N7XF z@Z@|a9DUu6#exJuTZ-A({Jtc^p4*~ML*%7`O@|4;hTxaQE3)BagZKMMgs(46^ zNrquJ-~uwe`>DA%IPc8vNTBRmP4GlmAopp+^z1$_h~-=6ovpS8$oSg1-~c_iXl2>- z%36SqO&sX^M>YKFwpu;k8#0m_b`Y*P0hK1@l8l(z$zHH!XF4ED8&$r>_`v=&g%BCg z27PT^8g@f~+ z1~!}&dwVz&z6fKy9?8*hl!WLnv7&0ZdLAaW_OJsEDp^T_N;8t42cy92qkfH_8Ywm=A6uzLmRY zwsnj8EnE8?8l*(-6@^{XveSnv8Zq@I<5r#M>Vms6spj1b=q2L}tR?hst^ziOvc{w> z6>xF@V4D?q`$0Pg3_p3+l4JJ~u5{yDynxm{O3)9Vq_AJza5Hc^i?m(yQgb|JKkCz9 z9UTJZ>9Wq;2}fLS;}Xl-1Yo?n2Lo_9?;A}5)N9^`y2_e#_eZkoyF11CxOrcAGnl(u zdfR;tP8{O<-MQ+p4?T(Xeou?nsDbyO>tkc5%29-a=Skpn8f2C!0rp$Ps{1?NK*@=HDti`+uWv z8R`FV-}#HW+GqWXx_b33`ir{C0S0aYG=X+DWNgLpMbM=AB^Fwkr}RxZ?oYMtx~%H ze80K*VmUUXk(BXXLz7UzjasJ1e|Y=(=!8u%h7{@#6gVXJLDhX1#6t?>7=c+wa;hd5FgfdMf767E>!6IQnre}p{?2-xnS05Pxu2qkOoaKP z>1((tbPXMEo=qlh@u>LSGu&70eBPqn&iiLtE+%a|gl!y7=#rL`ROO=VNf2B8y+)P> zu+)uaC8%{t2x#>n19P!3KM2|?j)Mnah*%Y%T8q7S9k)19fCDbGC)umxdM>vsdqXys z{u(0(dF@|aK3#@0x0}1qv=n$qZxDb4cCivS{3?bM8^XEVLj*bsH!zM4e)q)yj5G1Z z6*|A=dQf^?MYY-Ush@0w6DHORsRTAM-0mWHDjH#H z9}742On#Xh&d^$f26fD}l(K`!x^t*`6&V>n-?H>d??na~jw5%^X+neFmKM!HcqX=W zWKR1Q6o?IKfPc4^b=t8c^xi`IS{7r^nHuJEmJWtD>EsPy;vH-9c1^2*_xaaxoxmar zr6!y}0V%y3hjF|{3N1A?#-(DzCxe<^r1%*B3xdH6pz5bc$qmCFfj|(fRLV7w2UW0! zp_*^r$_-gQeF0SR43ItB0Y;*OMd+dL_RWRMU_5aUXy=<((0^>i1OI5sT9K*2X z-hxh+!`oA7*1$F2i2CG2+!YpfX^%uN{OrTPE76_k3zx$d3PJbS}q z@&kJ1_1pxxff7^dur9HgvT`tXEi_-*;e6O`M|XsgxHB65TQ*0V3Gvjw<`3uCxsd`z0gS;&M$32 z3z7;H{hf5;!hZd@1cnRJ^%R+wk$NguHR<0nP`irXb6|h`yT5rW+3z_pEI)20D1h@` z<#jbE0Nag9`RVQ}1TXpCc-F(s`_7p`{h{}MTS)ujfb_xk3pY>aBE-_52GdAv zt~Oq#vFR6SEPn{)&LQsMo1Kt?`GXvj?DXth-VyMYe3x7$Eaagv z7`)@U`~&_LE0y_qSz}{mwWeWm4J(cC+tS|KnenNncPW)9#7LxzCF;AFKv|l-Hshxt z6Qtn^QBLS>t8|I1rFgTUZHHGsNleh*r~$(r0xa334Gw=m!+lztSFr#rMmBZne{rafuK@673e z$?zFN@OOXP4v5Qj&ps^eUdbJO+YZ>!f0w>-o36PN-)t?+$tAuhjW@FI(g(f2so6$r zcSuJDw3ybT@9G)v-Z8?XwZA#d^+t{MBMKJAn^Ui!2#E_PqtxNr>Gkd%3-Zv|&sUZ9 zXHN>@x-0_v+2^)J>Z?dgi~Eirzx*}vw0LolQR`@6L0Tk=kN_Ww9^~y+~8PGJPtNQl0!SQR)OGFDy}x6ssnPwe6$&mSLE|7$t0EDG>RdHdwS@ zZt3Q!PS`#8bHY+3k~RqRod zeTBn{+dHiwR%RE0#|aYrPDt*cPHgQVp1z&(!8s96M1pl7_fIVfBae72&mLtZszISsG*nX17LN%B;_H0^U9bgR;Z(vrBq z)|^pLXUJP3!|s>`e{~gzTGq6Z+fWFM0PVf@VxBBFjhmIhGpolFM3nlbFm%oR>iz8d zJZ&XCNHO{#=0AuEHD4ICc%QU?Tu37G25ZaZ%`3$;Do*^8{Hmt!6zc=wR1j1*`7H^g zQZX|e^}tduJR-6*s_cRTN$0%D;>E^{msM<0AY)X-JjTj5z%$9hI=;mit6r-I%1Oa& zhk)i>fY8Q1E;_1lj?sx3aiw~$VnWxF`^WSiO0eW0rJBc#17&Zr=Z$J;Vs=_9K1Xp* z6ZCCR1hz*#bdJs@rwl{!dd$S@oc((O&KQuiB3J}I2;H;oGCi$ZR683$=qW3s-aLCZ zSPyq~M$uBSTZj%qB(?B$NoXcKFu;za^A48G2g)wJ8_}ho3p8OJw)Ks;!kbN#jsq}_ zSCcP;hV1@659431M=yGRfjZW0!(FCK>f|b@leuZH&k-?QZ4!0;V3GwrF<7wZcU|RbmzNVVI?FP` zSd)YPAnNsIdFsRd^XnP5#b;kb(A#&08!s3MtWoCN%P&STIQSz-%03lInvUg zQPgFPb*Z#%H5JKQNps=JzyLHLGu1r+~ujaw7GXZ@NQ&fmUVmbKlOA zoJj@K-xD2H`MZ^#!XW-yjd6EvO#kkRzpEwf^Snc3d`v;`ACK&RhRAYo{Vh)L@0=Bl zH8=thm?_vkr_@#eetZ4D#d)N%BAJGk4vMss!6+jgaix853`$Nab7Hwe0J zn+#qamd-zpQh~8p#~`Zpm~E+S)%HSnP0JlwpUc)4h}vu2Oyju(H)EG+QZ`=WvFkYo z)!JlTXkGtBTBUbf1pSOrT*j-0(FKxLVzK(3*=$5R(s5omeoeKVTXs>x#UdzDIfS?H zG4Fo64|R&zJAL^$m`gChVGPx2OZ(|x+PB|HSD+)SQ=B;(EXFVG5X`7h9F49(d_ zxw$l}Cmo%$jI|bytp;w268l}epxmb81}BwClN`epf+JMc`3BSn-c*za#H&Og`kQ!X zojP8mI(4rQ#bNUJd0g30QaF-n9fphiAuilPS&@he0;@Sbm5-xL?sd#TQ7U;7M(hg7 z>>T$&{G;%p(#wRKp$|vLA-w3;Z8HJ56NQan-seySSEo52GChJ1KfW@;4_hQC!D6O) zZep5q-xEKrN8F0J&2$9cQ^A9AiLv;meEg7oeV17sDcB`|NV1~*jnPfAug+lX&r8oR!chH_0BVw92=TFoxX|^0VX` zQP^D(#=Lf7$+mB=#;j$ckWhfxB8b>Q@s>9en}v3K0b3U!X9WSrLQZ=fCKZHn3k4y& zh>1K*ZCa#_J~~T*-7K{3?-r$Q5Oz5hTo*=JSU2tOEOj<2tyJOx8KX)%+W6&`gWCqe zGNqo-(7CKXRODV1Hqfgp7=en~G16=?}xbUIUeJW?MDSrqa5&O6ynWbA%?pdmo~P z^UF7;vFVh&oB4`uoP$e6l!FRG2w7lB;O+CbGpAX?=i;d9)}R!_=S-9M%=zS-YbMMC zzX`AyVG~6kzxFh?>Lo&ZX|y{dqKqU#@n5wVAqr;^fHO{#j5{w8HCsCtRCVFEDx&XG zHBFHOs0~i+oeSCb=Fvk}vMaVDIR6YKJ^Vo)=l8M7Oh%cfQDt;8g#z zD84-PrBH-6Ksg%JrSAFgH>q3*hS^#@4@0LneQ@Zz_+-oL5);!N-ZZ-vPj`lE1KZFy zsuQhHs=$=Ps1H$VOBo<%rCOD43RdK#cdsgLHZye7hCM(ZQvHi8i!pbhyFQDpj?-sD z3?7=?A-*w4M=Q*6!#652fqzAL*C>&%WSoy9*6~1Zj+J}N-c}`$)A>j1d~p=)te*t0PWIj^0^{WQ8&Jw&{z8gS(3jmkis}n|Ze2IK^-6kE6E7i}s-ye$K8-op-6LeK(V>Cv|7SDNdQw57+cxSyr#Doa+btGfkbh5)v-t*w!q*b`r)N#KHOLh8GtY1A_ z&bebVV)xFfSG7p#B*n^_(${i3O`n$&gLUX7i~m$|c>WpM%gOyWug?EJpj9nrC!kQk z2M1_(A4?d}(`D`X5%n+Wd*TX-sqg7)Pu@bB>TKT__NaAl zI;@UBS0SS!AhrB~Qq5I_@X70AXQ0%-$28h~^E(j6TbbU2+yY#m`dnIK?r!HP)nJ<1 z!z}5h0DgcvIwY+r5SIN;+?)d5lF~aV9>1eRt7lrb)M(_3?{fMuli0>9>FyWb!7Vm@ z8P)D-jbZRmTh!)fHy_2!Vs?OMR2tvYe%)u}X_rOaPJw zR{Y^^(9v37hS9k~@x_@e)50Z3`K2}t%MINj!nRbqQF|6394XZ9n5n<~ zeFUECu9tPv*3+qdD>7R5epdhILJ>vk^H{#D{smQ{)UPPel6+b7>wxT&-)*e!dyMG* z@;ar&1r?MN1B;^R57J1m=T^eAfZa1+{XwKVXO6Pp$E>0~&K`?8jCBxazj#-bQHCv- zc4!P$>(??oine;yJx`Y-#k*P3Nb|Q);w|_QC`;DsF_~BCtbnN1x5A*%aCCPW)hrQH zizHJHvEMkPbzPKNAILqFMLJBl$04w-Mga%R3^ybMeQDc>g8Lh9&vBUPZ7`2)S(cSO zK?_i5IX@Tj8^p_dmM9ONM1D*&BW{XeAHz@MAy1`o4$7rbz9l06H)y4ul4VhCIa;TJ zT9(iZH`VgGoO+3Bf*EfvF)~-Pu9Vh%b~o2ymE>eItV|!$Hsbh38PaCB_+`rF$u^qE zkj^D;P+eXoLs{-AIJ6l=VU2fyL%#7b!TCv>2jf12)83T6K4dD+dBIUQANC|-$IC&z zDTHD;KY(H}(hp9JZ@=*kp!6IAmAJs!)?giZK&d7>N>2 z5XycQ^1vU|mj0>9Y7sY=dAuULVg?wd%8W;{Xdo)nybBYj^LQgxa1*s!BvGB|g_;=3 zOQaltRKnV@R~jAT{feIs1Cz#f+~8bcG>g|SL%R*Dr9CGs+#TBI2YL*E%VG1)G)JNZ zmiJf7vAklwDVy*doGF9`ZEGI!h||O!lEj!6^4P>w{7OV^V^s%wH~XU1kW+^tmh_`Z z*HK>Tpv%S4T}f)P;xiUag)wZicAc-yB%$h0JbzA7@t&4W|3v#ms;G`N8n94kJ6Thj z)ocKGbAL!Muq7Q&)04Q9+1EDIu>_2|tT-#r&p}%9SK8c;F%KH{USn0Fm#>!w;t3)x z4xx<9-=F?9eo`s1TSno}4_I)TpYJw}Pv_idw(i(Ni=^HNLM+S@IKM@N=+ZIA7l@k$ z83&?PBL9V2RRd8gtK0Taxli6R-N&W87o$TUYIUnl7K%g-X*7>gyjMF8kfkZ`9U1a1 zlfR#*;e)=)M(nxrJ}V)F{^|qsUE>div8xql*n?de(QGcK7twdtDPL{*LpOouX??O2 z=~+WvnnGQao%O0;yAA?YUAk+db`L(KLnCugY4?tIXXk#aS+6bv*c7tvt3^sAXwAIR zEN0%oXd#KOImT8f$DOaCY*|ymW*rM*A5A!yA#MT#!MhB27gIjCwej{%S(kXoQSR)x z=B0549KRhW{)Jk(trf65+9lVeibA)R^b+^)^+7YJCBkl@dU!0xVy?5T3l#glRl~#M zk)|YMXSFt=YTfRf%ACqq{TsD%@&!4!hSwz`n=x4od;W|#8!HqrXNdVa{!k!N{OjuA z6&HKpjr0Ty&tLD$9{;Q)un{UlmKI->fcW*I1 z1YH{fJ?G!6$61EB$*q=Ad|^zY4)`-IQF6<2t3sdeH@2`D(ggowZTn{sF)Pd8YTJdD zED*H+`hcbYULmN6XfgO!5R){#JL?VB4f+vMcMxTy|-~ zEsGm;;3(?D+(T}`B8avQz$YJCzW$i~+nZ;AP}l!JtpIKwgskE3#s3erlDoN@GuR+f zh}zUT(!LM5Ca!-rGuH$E`L9fb?p#D zB7+jnoNC6Dy~05rg_Td9=z^wL%&WB>!%;oAOc##F%Y;#}?mf|IY4nije9poW^sKBL zR;`g;RHW@3?l}_S9<)DfF6h~!vuhgaC@oj1_vknks$7*^OFSG_#?2-TmhZITQ6EFP z)Km`$CJ#1rWn8ZV#Y{w%Ajp7P@X2sbAF8pEK4ZTg(;HLGMi*EcA;uZJ6LM% z=n&(a0o?_2?*?}IpaHz3#hG`kP7IemoZTT>IlqLmX+qUfE#2Iia43&VH;GvgA<~+E z0au%>Lcp4J#C8?|wcz*$RuOkv_%=|aSyNRu?jgNTG7{06^j1iR6AQ`3h^Ej87jx1J z@v2<^Me@R2(;_yA$OVjy`j0WZJMse0pUWk|G6=%MSE)O z3lR-hzo9}jb)`>~8PTPSB?^!=>emZqxq@@Jo-2?1_H&h*6O9Px^hMQqzC%q`GkH-P z+y2NI?ZJJC8#_Fghg6B`WNSY>?a`C;${D{y`szV!^Tk>L{j-;gigPE|tTzsbTye;n z;$H6ddim5AiUTj}4N#)4qlG^Ws-vrzCN4!PMDq|Ao*<&9gB{S6bk&)|@|S>`r>4@J z6)T%6T^NF|{{W`aXW?)3&|`~_Pt;K-5fjNbpzOsuN8w!q=&MT~LPqn2d!7(gK6>p7 z(9ak>qz7n%@k~f|=O!*W(ch$%hX(2f?fouy&}34cl;mS0;`!xuuv%5`)i-4&{A)3+ zc+k)99Ik^HUedC(s9p0JWN}C( zE7#^me5ohwZmF+OL` zzN&i%_n)U4fM|j9FP$ou=(mH_ZcDA)H-oQwK%45RqRb7?vo<)vn9_q8;)?LUi7Tt;>ya;$>2eT#C+QwYlee@; zC1<%viy@H>Nzb6Zl1Wcw;97J;KIoJ0{3m>ZCwy5C8!Qpu=b>?iBuQM}&+gx@Zwk+? zkV81zMhOc@h?9z`@L*T{ZijGQ_`+8Ja)vv^K+bV&^IEZPH zQ2%yZYo*-j&f0Df?k&1xZJ$qGscg<|_}&orDGxgN-n`^FvQt09-z^awM}$Pz&@CoUHLy{@Y5IffMx`U~u5#uPTx zt$by>wPKT=?w(ZfAOt?wP@?;uVxp=@SixfG^|Bc9@A!)l@QRj<8FY_Rk`QdV- z_30#b4&&$ur{AMRIjsFDaMD2`L>VCcQBHWjkZaWiK!c%%xdtX|(;IzPI;JuGsWMle zrTd1~jhnAE!QGdPma$jg%@nJbP%%P?H^5(_be%P8d4Fk!WgvX+^mImFB$5D^V?E+o zbg8`SC-|3dny%B8=hJ{3>Hqaj!eiNB54X=Knsi)E3&S^anXJ$W27E54X^-O0UB8O*R)tm>Z zp#c>4X;!^Ij#3iIb!*pkW4UI%W{PZ_^x>AQv-q}fgfz~er0nXM9MQnD%0Z{Ap}NOZ ze?uD56rDNuyTO%}{KgE!a5zk|{tG(!o%t|mx0vbN`ZpUjz$RbdFO>IMKFO>W(ECIS zdysWK$C6w*7w~QK9<_Cb?557_Y0;A+zSq5%i8qs_yRF|$yH%ZMkRatJ>To8{tsnIL zzh8+PpeO;L_a7R*Yk(WfFn%1z%dRd+(%k@9uY9qMzdmX%4G4YG$@6UzN+P?<)WvON z;CR^oZZ%g0Wtt${N78SpY(1d6fByNk&lWFys>=twS{PjHKc0O5j5TFvW%*mgFR=gn zSK_+HGm;n`u>TWAglq+lK-qz;sVVD8k@xc4=SM>Re#yC$xdq@Dy=`!rRr+Q^LH?=o zzeBR_lXLuv&Z-Bta;G**rj~Ik6Xc8ewyYky6&T%))`%o4Kh$inPQY3u@fY78#QL?_ zaK7pv15&(wQoNgoJ4i6!$gxmkzsUV-1PTuvfg16o920~GSrqeqczs5ryRtz7+4Nrl z^f);R$eNLFc|SNvqdi=nYBRy}1IiW2DsdN2D6ta4Iax8z$nRemVJnwJ_Jnf?u7vn{ zvS}D>zGH-svz#kG9dJ1&H(|p4sk}v0Xx5QDyy1#Jw(YojfLejB?#(>tZzZxJ^|mIk z7fF73Fzi#771BCr`neS9E3~8%gJpqCdnDsiAxJ>{a;{`|sc#EMGe<=KoKJ&UmIaUb z^9X@WUcMj20`-g5n=RE5;XPlDUp%`kc&tz&*XFMgwb}eV$0R25u zC8mp9@0iHygO(No2h%(1{Kk}Z>kPbg85a{t#JCbS=>A=hpPAg-%J{&J2~aUIGsY7w}=fGA{pm(9TNur8Mb0=f%_O?uEMDK@iJnNq1aTHe|WTazFFMvQQ6EXFus1pSN}GR`1;^wd>d2SEIB<@H~e}#YpP5 zPHx_()ZObJzw|0><(lPy=`*JaxpT`1(}C=9}mXMs-#bK`pWG)W4q3^VL5Ra`8?=uRQ`D zJn?buzKtK)&k<-^Z~U|#ZVOtD!bO**Vhv#QUNMql^x`4#W_s}Ys8nGQI_~u7p|*)r zW~4lz2JLcBqkc2SPWhJw96K+in?+(PxV7TsP(~&5BVW;1-jm5$L~y1m=~>}Fm%NOaJv{X!xbE{lx{D>Ui%VEi=(;(Y6mWG7V;jtmQKB+Amjj&w z;+CLI+@8Fn1z0B+64i3hnh1BRDJisX>E(?{=?db;g~3DeXkm#Ga=`f!P)Ya=0Bc#5oD+=2xl#c#tn@zO1G(k*CgrpEq%i)PSH+J(;FCP8kaBT-5yOEG~dE25~puzmiRf$K-S3u5TZL85>j`QVNZ1 zbhZ^G8B6ptqLv@ru^9c_NU9D)5Fdwt;h4Qey3q#jtdF z(LrEuE_nYHJip`{b0qY@O08-a04BaU(JT19?j{(MA}hLz3LL#Jhpiq_>$f(E;E@2b~hZeMNxt*-*5BX3=%FU9wWXA-a$0pOE6#+{zV;8G=mMkx5V)^Mi#);dL6()TZNe zBFVr>O&6ht(Cr?8Rme*EDM#W8O5p<`gO~}9&bP%NM_sb$2b=1o*=?4!22Wc5(vEj@ zq^YhB)1WW6J1QL_7hoa%3` z;fyT3U9@K(^E;~|uD%^_#8D{)4C3_?1x0#m%!pUrNIUq107j*vwf=NA zbg`(eUnSTIqgX9XFoBsvziC^>)vCFSv4|Yta3zcKi@vh9zLTl)ukZenB~nf`PA*bQ z*$ku?*G{nfxqtQSsiMa#5Pl_{`l{(>wNRv%Dp=1rKr35LUkN-I87o`w16@yg{%{bL z3WL}NB2J8YZH2_Ck$nBiEuKJ{{pIFv?klMt>{Id&m2B`= zrnWw=*N5P$F3Q}mU9P!;DswTg$BM)&hL9#GHt1|o~^`wl7(YerHM(d zc={(tXO~l{25koV`8;zqpeyC3h}q1?i9F(z+x6f>#Z#`?$E0@|=T?p4xgl!{m#_`H zIFB`4%H_O@)h6w6__OS@U{C$iY>n8s@SV877(75ZYhxvB6)NKpE^NRh2Gl*GIv9Ml zS7IW3Z>c-SCLJ9*ZAc#XIXf+27%te~NbayjFD^MA2j+%&Dv3TPKmnAxT{X$Xzo64%?aGsB&7os*mXmFEBg+ zv+D5mF~*3&EGLH*1;a6?azrW?srYrsw(`U--_mxe|+QKrHik8f*Hxtb`Sy5T33@nPP^JU*DG7E=Ibz?e0m6HJZIEuE2_i&&gab zJkN(dTq;6kC%sa9JyurxC9q5Kqir2d`CP!O2s4-3FI^7Fqq4{Kj#!53awNG6&Y+D( zjJQOw2iblv@QXgiSvdKnkVw(l*~W!)r^ej%(YLja1}KMbUu9n->OMJ8k%N>dFd?@( zWH-v+Po}2)<*{AO)>;vi%0KDvzj;s^gzFOF%uHXfD2d~SkVa|u#aZs@Olw(H5 zcoQahfZYd53Rc!&d3H>E5>^B=jEDc=*3OW~YT$g*Q0HXey6Qnsb0;{Q(>IFVTXl=hbT3;T+0sipE_apMzc9A?mltm1JOX;sQ2_tc9>%?%d5 zWcj#bew&55?f@x=&#<@DR!-(drYI|&^p6pXrGhUk^+QgUei?e*#u2#)nTGWmQq1;J z>*z4x3#`jozB*GoEQT+Kpy)Qz7Qw@Ei<2?xec5YbIyn1!QaF<&<}b1uu9uA(mDsc2 zuXw{n_2qj$t;@nuno^H+oDFs+ky_a#?A5m&$i77kS8YjTlYqq?S`$t2?mD15S5YFG zz!lNm4$%|hHF4HFS+uukQ2cM=4o!*Xcn&G0X4nJs2xaFkhSAbR@&}T*#hhQz4VYts zRb+$rm_c}ReLUB8d&^h+{79&5>s~Of40h0p0@7hd8Ql+0V7fX}&$BU&G1aR_+;V9t zeW!sYCsEUl^C~66dVNPUl2@1@c!@YYp3g1*q|PKUPVy=d4B58={l_(fn3I8vzeI)k zlW~QKCR>t!xuK=;7E<93)iQN`9aa4*bwHQo2B(3j4d( z!a{;I2^-R_fE8)UW!I2ed3F-}7vR^v>f5qKG?lX|^@AV3mDz}&AhZi8VXgn(6nT}r zNse+#v+87-GeTQVm-}kS*Y@x(oO+EFX^T?N_Rt+w8?!}P4FR<7yV=0zp!c>TG_^my z+TP#_@7XuIHhc;b^&ARVPoc01#HpTO978I{xgMw2&qX9vX8VFW)mng_63D6Q@wkDy7dDjZ$k+ZoqI7hIaiIaC&5wwjCRWoH?d4M=ol*TyJG zyq~@d6~qRRGF#_g3a zf-z3zfFA=xk>|x%?YplaxS#4`MJ%5oua#~E<{!JAm%qLq;>0|8a;4h6j|-yX{=o?~ z0KA#^z=T%$F(qg2dY55@mF8;XKtaINV%`#+YZB5pY?9y@9xcis2#2jUha19E-tPQvw@CPBi`8dMB)HP_03sF@6V6HRma*z zNv}K~$@wE{nZ?m5@?2M@uVteJK7zx0_aAABejX(z`I)zTt$RdGT?k*dFzfsjMLAon zF;_gJ7Ho5#d>|HUqz8X_>EzZelO_`(g*mD)M5MGitiDFBYUH}oN1PS9bh~yIi+^OM zzPwZ&8!ZICoj+xISe@3uPl^!@-0iYNQYQMTUugLlesk@l!wO_}a%5lD{c*^<)J<+1 z;mzp8p3*nwC0248E=6POg^~aZgQahYy*5?B>ZpW+07Y|-X`1-Z+pmbJOEz6$#R*>V zLI*{Ry+w;;n)fwT#wNMo3iZ4v5NJhhJ=0Psrc$u#^38W_uZ(+7Z-HBZ1H{IzIAQe# zf2XRShiHyg;H&#YA11iy2u3~ktaBCrr!h3c(YzakK3=YcI|Wv2Mtx30N{uF)JK>mZ zJcp+Cv{q(t3PnS&6UUiiNA^Td<7&P!k-CN)U76%+`R$w`DLB#}gh4PEkpQmozM&sr znf*1gpSXT_f)(95?Avbm5`F!ZvxcpgL*Rzgidu%T97g2EzDi=?dG$442?_w!QvB)# zVPq$Up4gI>%dOiGU&MxH(Yp!2ANN17nd7BN#!0L4v*Q>dGAyL!t|&d+ysp^j35257 z>CaR}WBd>ep&hf9EE+S#&RG^sCYmPS*0^ZT%%)p z(jXK(=xzbV(>-V3M-cRJdKRLD*6>Bx85Kq6`wJ|~g%fVHqO+X#Ik|uM!(KUo9a-7f z@FM&kgw?Ira0$R?t+@|mhi{2+7oj}isD+GXPGOJ->2Z_KBM_|1p}~rSF${*6(&(ph z`oq>{8_d5!s_DXa^4ie8)~sKzn(0t3H;`hi*m2SKR;ACahGrK%1^sNW^;G?Rso)hM zH!ctsIpt+tFd=nOCuSEC3ya1UQO*JSy}ijRFzx<#Ovq0zbIT;E+`$s@(v`5xHp+-S z_fDH%mZ4#BXjL6vgsQ_+;kAvYYD!m{jA9vieEQ!!OCb&Gn@F<+KxD2h_oZxHOo`f)_;I?t|YLeZUGprLY9hc{1^vf6#6QzuIhg;R`lB@g^c(rh^XeVUi6Y_^9Eu0s z68^sNcs+t}aHKHx(n!GFfjITJ1rY$x4yCj3E?a#4>aKR`1Ii-XJm`I{&M^lozB$7p%QUBX z@re+^LdND9NA5qbuV@U&8u0#jl}zv;(yMgQ>ZEp*FCk+uK!P=lIaUO4AH10ur604; zv}YC+=|wKx_Eh|lv1Xjo**I%xO0<4LG^cQ~S6K0mwMto`gP0hh}MH;1VCj(UJDGWbZFK`0zy!9a)p#S4R|l?v9YB$CGx zP7B`5H?7gss|kZ9_x$>8X=jcZ3d!#|uyT6GG5|*q@mS>J)%V%!nb_V)r#zZ0pGbZ) zb`Ya481wQD*7iEeg&Vv}z$AEnoG9dt1!D1%(7S zYPQ|GkzhRRHz^F{f%z0>WwHRYXb#qB&fU^u&bLCPnHfA8ZfbQ`=}QB(`r==nO~M1v z9+TXTmQu!4)65|t=nhg}=y$q@<|FG%Gmq{aLm+bGJJh2I@7HDVp3+Pe_90#m;;Ds5 zN3nCnbHQ^(eyFZr`>;aklP{*TGeRP6_+h}hW3wgerJ^iUo+60<3_zqK5m=u!79UD` zWFRA+GWTg~Z87sbdru2wsUH2Y98v{t`Hfig!T)w8Es(IDlJU11a`ix>DP3+$R?aqb7tI935wbaL7P8 zdmg7_z#x(&qB7+Mz%663^wunJ#aCH`=tq3hZsz6%_t3uPY|ITVt4PGmqc)~L&p14? zVAvs&(dMq8>VmQPptP7r zQSRX~hj~*=Z!HS$i{CL29VB{Y+MfvDj0WA7>W^XT5-^vpMsBlBo-!Sf`0b?FZn^+tQy4QEOgoC^c^GBbxZZC zykm{3w3URHbw%rS!X>kjY9)KFqgs@<(`769DgiFS`d%|JqT_2maq=UHCj9b1{Nf1@*?8wFypCPGMO{5S}C&?`1PfFMB7_aRTON%C{$>Ko5`l=$L zxdnZXhdu*IF+?Q2NA^ZeO`^JRqm*0BKDv+tdZx_Cpq!fD5c>2hICVcH+)v>iet)41 z@6kqQo6-XGw!9oeoiUqeG7bOP;*(4kZgV1NI`-+5fs|$q9lf7ySbL)*hj2=XQTEH` z;cv=f3A_9XOj(p|^6&-LHtwa~9DG6Gp>bvl6&Yh%qPr%gWL0?jWMk;w@jV`4g^R|0 zq&t}+X0+amEXw-y3~feq(VjjRRN`2NfRQF|b-+8K@w(LdLRUZxonyDim!0NY`cIVEcQktt}n9#)%GG);dN? zJGgBI1ukp-6%UuKGt=kE5A3w}=exF=;!r7+aNE+YP=T?Ljb)OZ7kg_7e-Vq(-^Y;| zJ{S7tB;OzC1ix1beg|Oty$^hmD6go)A*^Z!N>yTSY;2C`^x6cx9WF3m`-+n2opz$d^LH*fzitvBcV?$A{j}ico$_G{js?HCC{>msGoXyMGrQzE`9r=E|Cd{stel?B z8tKJ30>6mokLxBq1)e2K+?Sa5cjkYGCI3Nyd%#8nO_H^L<_2Q5lGqxbgnmSV!xIk| z1J0x7>sSTOKQ|fH0C-Gvo_T!P@|+1RBf5^f*GQ6AcE)N|i7U@+b95;LIob$0h$}Pt zZ~S(|*&}O;=R)m0>T8^gEf=@9cm!i^=xxhnYV$GgVM`HmTuycmJ z>`_W%eWBRyG%Q9)J}V>m_)z;J>N7d#H+p`ht9^*5cPkjKFfs*?ut}N9d*?Z^PVQ4M zavHgmG3sS{r4z5n5k?5AL1 zv7{~JEUJX{K|Rn1sYV<2JOK38G66zBa${8Bz;a{9dTk16q%blfJbour5*-Dzpsz38 zTI~+1&l$(oUa@YV)aF)1xSdtS=pc?{L@O?aJl1|s5tE0f>&L5zvrw0c)cIZx`F!ru zGuA-!Imw|OMQGdi4L(j8TUtyYcNnV4WWN!8Qv6Ip7nh~&_jFQyxyKj-zD?aXpGDRf zI;DW*l)WNWjEQuoX}f8JVsLS+^Di;f-Vfy3)D2%X7Up;|NrI3{(@=Jk#nXy+H7%{< z8SNxw`&M?ePadze#~rz@xWZWLl1hi*kh^Xce6rez_#)+Vqoqg1V~0jqR0YMTv!=}Y z==Bse5Y5*?Ot3E+z*Pba`TLENX1(oXF%oB4stSAa%c?I|G3 zYCgtMFPzPHrvZZ(hi^~mBX8sTzUH^)Y-ktPn8qs?0`tZKLsnMa*7<0Q_l!CR*(+I@ zj^0gdTtDi0xMnt5!rgNPxQwD*lu=y7%bm1Vv$D9eL%xgC=7xf#lS{1|CCcCE;rqSM?+5(Z+8mV?Zf9ThlL~m z1BI643*!5xl2pakSw#aEOmlvoG}ZV;#m&kh0t_d~&07UMMn(CX68%BXV1t|@VM!V6 z%5wUKbU4$%;bviwo|-bj+VyNo&ZOJ{R4M`oti2qP+#Cf%ri}^QYL9%?E<${yMDa=1 zDm7$raOHcxCDqoil2q1^_yG8rn3!A4$uBlKnXWvoI9*A}=_uaD0adNDZ)>l(?2QpK z6%if*{StU67?ylCWN>rxotQnB4z>w9-{YHWYFKF5J8)$Be_|XPc=poP``Oo-yi9A@ zy8Fn`?$>)WbsgFt4M;hC#}e`iN&2%(FzvAnIsVDk_nxB_D@;(nfm|R{Mw$YL!DH>! z4-8p`wAv&@`j1uQpV=F7vi%);{~sfZdCEvW;$viD#JJ4(7D%3`V#&^a=-k`4vf#pH zcpX%8u)gl@Im`HoqF>LyG#|Ei-twS>|J);k{F%SL{i4&gcjxx-DHz2fg#AfS&uQXp z&K4G-|bBMS3Jd3gf2%3$K+hhp8x59H+$@rDLj&xEN-PBm*+&s+@1;*IBPUho! z%`KhTb{jRr!tYeT^mZvB^WEHUvA zJ=^Q;f*ucc3a_tK3%(+RlN#K_n+dXYEqB-p{g$2IDRF!dp3W_CZWS~s5Iv0>x@QSZ zUXP2|6SG)C%9t@Gj*{-Dv%a9iDwvxoZp5yYRB=@6UtQ^Vy9Q;Qi!cGJ{kl;E)7eN6 z@iSQ>JQ6=-+`N`z{=^VLi=q30`Ggpjf-Ohuk?A@{WwMxz#i`>3L%FyqDTnsqv{)WZVAH7(uo z9S!acx!+wGdkM%3@;CbBJ}v>36}2QQ4>BAnR+q_IRWEJWQU1lUjI?+9H}tU~#A;^) z^rKW?t=vl`Eq&;YAM&7#Z-dJcunaQ0bK!5iZ5D9@Wx=~JOtr|8C739SN|7IZN^}Hl z#TnG8L&(>nI4a|mA(b6ma*T8}Wy#B=Q<+sg@&4o;V0ElE;JKkN8G5(qJKWHEHEBFc zFMNJRdd+=sR_4LYAR8T++YM7IPOR5rv#5t>u($|&Wt(6c3N?aF}ysf zm1BxIaI{uD3F-H15wIBE@MBUA-oI8FPTiIU%vx}Gl2Ede=%+4h$v4y77zep#?1Y$~ zHg8{#GnFcOlYX*IET;1klI6my7dF(wI4ED!nTXKaNJ+(QI=|uzdM(<&W3sI;uT4BY zULl*0EVb*VTcc&y3wh=c@w8u00|O4dxp2Q4pQGaIkbk6qO-xsS#aYxwZ(sP~uN|5s7(x2*~ja zPE#gga%To6PVOE^*vfDg4=n>kF~PN`akvtCN=XZnGG2oKx8utyZGjA&iOY6o?7n(O z>cNEXoNYhCdpXClQi{uH#Dlznw5BVJ*+9K+!9JLHEvnI>P0d@7`{hS#byZug+S9_j zjXec&qmEa=zUbZPU0i~SB{)mK&#Li&M#zhLMi%jet zeyuHYXjXG;BU+d3ZzbS(fE6vRTn`L64oRiNNG(vr7U#-v_Yo>bE?@c`S3DD6CSu#+ zJwvu-+$8#<>A~FDhCZD1u<+Ck>4Ye+G`8J{wP6=%15=LHvQHErrLO6+OhGx!VDDkl zYyj^M?OU?-JDAobE~!9wO%#dt&xzUil@JUg^4bki?2~#)>>J)>W*G*fd6r=~%JnwV zD9v+$0-rbuqCzDiqOV*|`##=XVCj&I15FM{)cG zmSpZ-r?&nXgz~4W4?>bupUIQ!?}?I!f&2iA+u@%rfwyg5GixISae~VQNRP*X0;`6x z68Hi3Y4fFDQrUmdrO(b$#Ub!6^w0&)00Dk-ymP@Hg}SLitVWSS&Y#f`3CCw@xL=yp zcV-t3;`kLHgz5?f5NZ0EO`y}n(A@pK0y#qa!=H6{3OmYgN_OJUj}!mg@T1m;kAv$b zWC?@ny?ht3p$Fw||4G(M6T~toB8^(sx3pm$&eZh|?L|BKA6Hq}|CvJzJLlhB2Q|m4 z);N(jo`7Dw<|AI$pb+}#mf)_bkCzdQ=g+*E=JEEgZ`nJd`KHqDE}4`x0p5_Z=%IJK zZ2a@rMvj5WU%4RSzVo&FGAUFa06gyAjF|r_R=80O-1rDTi8hh;1Ep!^kG_T&gmU#E zDFDIDo9zl|&X%1M-n^c;kU&vU#L$v4hw2K*-zodI(u~}M_>c)kM6t;GT%I=RF`@7N zuY?R^3>BMmVOYX*#2+oQwxcM?+uPEeM!2+IW@D`u;Q>J6J4M6y}ud(#QB zQfBYOpy+?oKelZ0QMq8PEG&+eac{qGv0g#bLnl-C1D@0IS;nrC~BT;krgO8VW;xjxCrq#BS4t zAl2fE(uVz0{`vDS_~=ex!nb3Cioc>q+}cTQ%1R}^OjYw|#-U$Yc_^9p-o zDyE%S6Lob+W-Mb@j}>4g({@`opq>^LGR`wdeh-pRa?~)?20KiD96q|fAGaf>Er^NU zqYCJW4FS4X&^XNP)$~luFdPtCznOn`MtSA3z#xGZ#m;t`1DeXUZmv~hh}V*{NnSEG zs%us~Kv<~)8}S5_ve@Lu3_)1ZQ%^qm@pnRZtosQc7hTEiKL-pA9R;0tTd@9bA@|FZ@q%>uSd2QZ#x72>* zV@g$gh^aQk^2Mrr>`61p8_42TwWnAE0^EpuihB5`z%#9-4qpU4nd%$ZJ4@aKI?_m! zZFul%ij40U7Q@aGoBrNY6uRv-7DLMymR_MB*%YAr4(_mH7v>joL~c{-=MjH(Xzoq^ zz~DNrj-USNb%o{MZQnDo{QssS|3w7x2J8<3vhv-UyQ(_r)xJKO!=97U=`JKTC!Th7 zM#Aa^{bLB0Ju8p=dVAf#It}{(>PZP@Wr=hMR6| z+b2sY4!PIysQQ%nk4e3a&m2dwmCgbTaVdRZ#=^=BpFtSAlv>*akym#319=+B2%!{WHjE)vw)h@9-@5#g{6Y4a zx>tyt2pI0T7w_&5J?M|;W0+S*qo08O%+OB?NwVDFd{KzM0DRP`qS%&6IP7fmfG_Yb zJuAMVRsJWIw?7 z(xAWv-}?OP-hpdYAP}VMVPaHvza%{*@8W>p30qJ#8+MhBH#vGZ3 z;FFxEyHBqA8*v{UAY>3yu~z7S+!j+F@?aw&xF>FOS#2(;NKa?o!Ah((YB0V|Bqg!N zW^I^Bs%*)@LITXI)NR_r9=6-5I9V(kbyeYsf&y$$G1{U+yGj#R)5p`a`Fjb0MH(Jh zDL+|BM5--!-U$O6B9LQ|@W|6V6;8;O8o1dR$i*xe3tTqim!~y2>+0vmy4PiDYYjm+ zLkyviEk|?BAfAZIL#w}7l9SB+pW~WA2<=OyD5^(-Uqn9tIY ze(NA!43osLvM30%_Kj-z^JoIli6-hsm_zv%#+-1DJyy2B31&*XpH#ol@S~l+@>ms` z|G4LsQEzi6l5K@QS*Sb}arN{-+U-6u)o)19K!0H}n>p}q$Oi9Y9rihtb>HvcC4wOZ zlJ#+M3skF6DQSe8DGm_yBsXC3{Lgic3654HN!O9Yh)E?Eo!Sp#DB2?cY@wIEg74V zx;a8Ixi1;ZO#9r=V}AeTh5Y_oJLpq&^=dQkjp2W14C{BIRd=c6w%r<7HgePs~T$BcUP`jy~Ny@;I`VwM3G73>9Xi>=+00W zL%Lu!AMM0XRW^qxaWQu@F*nOnwriO0+SO6JUXR~eJ%k<s*tvbyNZnWW{a}Ra@Ip zS(-imI0sRW-0aH^6An zaXtsy>WF~cQagJ`KlyVXzHLx$-m%*@Eo_OcvUGx1VA@wLWSl~BMvQbIZ>Xkv*`Jrg zd2ihsnGE!bb5b!K#WkWQP2Ay=L^fxQTuw|O{bxGHh5*q=m;~29=;^VQo+C|g}iA{fB$VwRpOh1BnqupETZ1? zbN@APsY33(o++k&VWKr%5eO#Y)xLE>X2V01l-3*i6_`8nRmshtXj1Ork`K`qUtBOr z&JR{jn5b@)PF%9DM?X}fMg}tlKe&jV@v$l>C?RjQYAlv6sv}qKxBI!r_l91G+kzR?HGp;I$ zl(!bbAGAJkcy1|1v6XMYN)abr9KE+dXY>f|5n0p-HExV*}oul4no~lv3fjHlmp_xB}`Xn6-Tj$2 zw^2`>mrzeC{HW@lh=5>ZeUBm5nSHaO4=cjN7K{hVV%7jGVy}uXbGuMW7YO_Wal@*Y z=GWt?Y}pI6wFn0Sm$~|?i*8PGAh|S~Z@U=wckZ9&i zhdFxd+@D54jWMg?IF^IcC)C_*05NE0xVDx-(q9tijhcc;JBv4>-j*SXGyFl25;iI{ z5{EMv>uGesfQY1B3#h8i8v%E#vjuK1)Ks*Si_-}7`d}WXdIDnm3d-$pV+lW?yyjY+o{Dv+r zD%!q%@dFnsNnEq3jq1a2bgrb#S1**X=Yk*PuS*9T%c2Z z^?JR-8PZ;?AUESKZM~}_swEDF6-;>``PqS=#*zQ??VpxtT7F;Xv}^vh+A;!L+vT%3 ztL~hgeIo0h!}F#lgA+nbOLV_alJ%jOszY8;9yw5^%|+ln<-wH8O*SmYOw8paBZmM| zrW4Uj$6k?1&UwWeyr$-%t3<}sS}oZ2o)mG6L(DzOF8*px&2wIuq~>Hm{^8EICNyE0 zq<>MIiL;cfAQG$dr45!3mXZdx*C=|V^ zA`R$(5455`XQBW0$FqXw>%DP?Hx{D~ln@bRWl(me?bQ{DS4TgtO&t+$&&8O~91He) zvUF$u@m#vyw=?0c5wT8yjX=%mjlK-s_Rd+} ze$-_6l_o2W|B0c_)Jdd0NOES@q(zxih0+{S^G;DwkF|GbzDSZEgTaa-Pb`9Cozd9k zS*mu(VVkMgy%i1VDV8Ka&IRFH2_KtsW2heDH=JfK_%J>7fX5cG?H(Mnc`Yx%*X7Su z#sO+QM+CZ6wg@aYO7uc~H-PAg+phEOV$`Be3#$CfH4>!M1HVl3gq4|E!dv_sh=nq` zn^qS>@@(tfI#GZrChAo4&eKwQSnq!2#XQHF`aBnoUUFUn-$iQ#0cfGu>0PQ?Lp6ox zU1eWAyY|Q+S-|Ru;9=@C$fG^*xOkzj zXKV`WG8e6b|L9lc1YkAmX*L*J{?uRX(w zhV5+^&r3qPy3b6^`~ARY2g8{7kNxl8iBe1)|I`02e^3}dme>CSh@y!oB$n*Sg#+9J zXvIj=i0yZ5=1O_l`R&bDn5^EGoc1J5ABNxxxmXl0e0Ce=Ns>_m8kyjui+(trc8})v zrdG{|`dl+aD$44EaSlJ(>mGg-aT{lKw2=MH+?_6WG%R+%Ye2ta>5MV4zX+fPY6ENk z%zt!yw;qt7mU(YKNR5W;>=xFEm%IK|~tVQSUKpy2BvH zAL;!}qi9q=>VmtQV58fMadv?mWLbYmGvoU$Vv8so&lx&W52fGojN*oufl#nA=nQY?X(k|HrDuJCZ0LgEMtd&3SeMuByk ze9FwJZ6Q)?p%Oo71{+q%0>_|G17&E(mz%<%$FKl_YT zoQ)Z+mk7DtWmr{P9@tXS;TT?&4Yx1tv2L~l?O#$HeRA_!RUQSoKR;6T9^pabR0)V( znEEwF_=(|t)Mx>wG?rOmo&(M%ZQ*apBA%2~tBJ-N@lgRYaS^s`2~L1e7q?=1v>4>O zmcz+jE{R{Us1SL(13&$fukBDrcoVQa^V$mdnPQ1r-8GIf6JZ$}1q$72=Ze7mu3OsG zp?tbtdNn7Vi9V_`am}E<`%>-5?UvTEfNp-at#v5>Z>r9A;5q}3Skicv+xGIX*N`Wd z7zUVAwAoa~bkPox+_1Bz_6b|f>Xlk!A&j-1rf8lR{$FrS(LUO$Nt%<&O~GgRDqHm^ z!ltCDqn+fdM&k-EO(S1L2mY{>B>q(}g?evVC;s~O2!nZJh7?aidqI?tBKT#HXyloE zu_mRc4}gu8)7S)!6h?DKTX!Uif`}6Q`PbDwjrpa$Rno*pe_l07Gv!h8_VVWVZSuhO z#mH*Ly{h!nGNmX-BO*w~R~DmvkvqE;sbT;6Mb zPoqk}c*Z2A=ETLq&LR$hQmi@?k%+}woG38}nN-qdHPY9;AQp;XPbuc#sJteZ$I|N( zFJ&uGmqJE43#es-r*P?&Ma6j7K)FpZmfWDx5?W5EKUT{x^No*J;>v{{#!8JI$>}!Z z=~S3%n%|H1B)`(AX-%U`U~m$9rWZw7nu}S_+OC%c1Tl_+#At{*whB^Cb4qgzq*$IJ zm-5i5UmM4Fmo2g$;H0u_ww2~#l=)7tl7xTwaj$pyYDF?ZF5s6IA#X~ zYR2iP{#%U{Q9bd3k=%8O4a^!I7Hb+@ zxeriN_Wmel!fv)Kd-wIBHbx4NtcUA1oGkQ7!rFx36(Ky@@mN(x#tIG`oib|GA+!c+ zw8LDA$qZ!O>JGPA=2w)vYJ_0yQ0^9M3cS68`S!~dqMIcZV`AML5qF;Df(l5subWeI zkU@IvF5?d!eGvIAOs^1i!cETHd@&-BQ(o6Fi1mk!>2=y962xNi4;5?eaStk>1BByS zBB_?R7@rw|5}}r>`?P~!z#;U{312=acc104cQjq@{PW*v=4pHIMZeDKj18O2*nP-z z9txk=DR@6`*s_7<6aKMk|GVU1#{V599R9yiS0`|P;$CKe|GdEGQp{+~bfWOA+*;F3 z5|n)W>?ybo-H)wp$z-6m2Vj^HhkuC2ZIArae zNHyA(>kb#$Hla14L=WgGhD(sj^o38gS6Y>{Tk5FN;$Pi z(+FOe27%yFLJ^4Ka&b3QkrSoj?~l@ACWaX4=T*?ay4xy~anGz!-LMujMA-Uxa{@>M zUMeVdaxNz2#3<`+__(rZqczwOji;`i@kBAG(wkBMqZl|DUw(+KI6-PqF$Qb}QF?m; zo$8V{$ALF!!qEJO)~AUoow|p|EWRtGQgPa?oe*06ZlM8$o5TgN&A~U7k}~k1>>u!f z@(G#3ur7o4fYv#Nz;)C!Yr{YW|Mdhd$+_oQZs;_J@n z43NU0M}6jWTVV#Exx>gKnKCWzP`hB3PNLg0LCoR}uiDKQwjmEVau{j|(jbAjQm>n! z7P3l{K2vdL?;jUKcIE!1#qd3n+kGV}h)I&DOquMOIdKQUSz!Ta3-!RZI1}{&sOG(e zszjRBS`7WpYix7$aKQVVsguQ9Gd~=b$hM^Q%Ri zyx6NJm8GV|2L~G?6)|1nGpzcOlYwD)uu$T#N9m_oTVFac{CZy0BXif_ba8G#0IDp2 z{Wwu1d?nWldx~t4DEOz6kZ&w({jtLL5|K6(?v?^#eo%pQJvLfcmHezVwhAjFtGljK zi|MDiYN|KO-1Bs&1wuFlm(hVwW>~rjh`DgA78NH1u_(v`VO>eH*@wUjGP7f=dYV&1 zomP_`=>DS7`$oaObjIK>sL%wo<|1+x>aP`zZT=)X(h2;FnY(L-Fe8$B_r|}rrZMNR z;)36s1|AFZ+Fo;rV4D$xucp6w^xgY1K$#7p4JhSVri6fJ zfmFwW=A<6Ax*ikUei}8r8S%5xcV z55_;zr}zTHX_mlUF^MQk;3AQhR4+fwQwF#6UY?whye2;#_$|YpN79!KAm+Dm7zGLD z^xzOv*8UPa!-~=V=jS;dh6VC}-5ix5GWdM|hS2OWNzf6;*T}JB;{P5jL8Mz}wA#q) z>JC!+s3k+-dH?2Tln??XuD*;)oEw`^bEBPnDDXUrO){|Fh)$pOC&zaIPo74Z6{9YrL__uutA`x!M%VxVSY;AS|IL9UuTLl z$R(Ft7PsOtPUUIUYm*ZhuuDW^*0YgrF4J>qFdA}ztV|)l=2fu;knT@bAGjBDk zlL-t4BL|`mHG)Z7KuG-&nK9}e(o90j-7Rb+f1%F=ucf)&ix5^1(5-PeH{_wf0uBei zS}zr{hyM1@*_nqNkczlt6^alJOFrg>dbx2}`sg2aOo+pEx@in2^{W8g^O|svej(Xy z69Ow!Ehyxz%M%?e8klcV_shcWlcWj}ii(WphchE)!M7lcyKHW}iSKllia-T^;svdo zpMBkIv2bwsP}5QDT~b0C;f_w+LmB|7OQJ3dOIgp1_h>S;KQR>1RFTN0Wx4S#+UVp( zIJ=VS#)7^1yJzL&lKVT4Rk@{8G#uF{)3PtzBL2e5JkC zI-OY-2(!oZ$af=9q0>x$`M^{p{F^nyocLQ1+a0l@h>h`&Fh|7LtLxet)zXxBkdw$# zM<5Z8{d;6=h5bwz)+zVj#anJV2kc%@7Fq_+aRAa^=Pql!*Q|C#oxK^2v*$=`k%r%K z+By?rNGu@R8QaCq6J)DlJ>-*BWkE}B)in8*gd4>y@d!usY)BnPRugP3z@Q`0V7 z)Qytqu&m4@0BnY^ z$y#AuBC;{o3lt3EEFs0Cdg2-L`040p;Wgl9II1F3o$4`XwHk27O1o;&{YqJqf#}vM z@JPI`3<_SLTE0!F13b)t{!`J}8sf$u&Kjd-x^z{iaf%uV>&q6WTH+iU%cQ*?lnk>L z>*DZ^5CRp2@-c84pK-@>iIU@;DUwC~w=f%IauP2^rTv8~CC}p0!5HEh7Hb}5e15(A z*_Rc5n0vU(?+5Gl0INB?WQ!XUH>B)yDKf1;XiFw_|=TG{e9;M024f?AC^Mdm7RW*!#EQ z;vehmzYAlfXZ&A(znYW{76)|Kb_^WnfD|i?cOMkIoCtXDwN1#d>aRK5%BSYvC+s^ ziSo?0+oIC`g4woRwBb}HA>wYqmk@(Pz;>G@G|l?;_M#@*6beo{DxqyVH0LCItLs4f zUjr)B7P$62NlbA2DjD)YQ>8${tPU%M2F*BT5}Nbj!MU-hTRZXn_5PMP2L{0l$gb>l z(yfKhh*$9RrZJ9ZMV4Gf-S^pt){nl8#~~6nn8(NWugp7rJ)^1h6s;`H2Uam;PZ;;F z*hbh39B-cYuFRm3Qa_r0h_ktq+$WZ9f701fB78bSf)mr8HY6TDer zjMsD}_N4ArN%tD?$6tJ%9Cq+UxN$rf>|^iFXUO?V0XFN5>3dHxc$34(NdH(z{?$r8 z2h;z0=F~=i@}J;4pQ&De^+z$P`FDi;n)q!5eokw#&6@u?tbI<|))8BTtrv=7qle+! zF%z5M;vI*Dxgx5Qzs>dme^ST2r_~IFgkB2o1$n1<|%P#a$FG6Sb@`m z!;}}=E2bQ)9P0%HY51sTM6Dw12eeG~N~932KYk_y7z_>OiomBl=!fhXLLr)M!w=z| z6HRjC$h_o(rwr7OrRZa#XEg|g~x$TbRHI!mqvJ|;&^YXXybxUWd@G%Z3{G; z$$z&Pj}p5aTvbQY(~EDWGCCNY=40q+0pfbqww#fyD?ky(^@*Q^K)E!Ke!~_;m%?(m zJm{XsP2*f7RL(*cJ{QAjvOLDl3tE(WqMG9j;72(_1=Xqo$lV_+_E-9P!B})~a)ZsX z4G}Sjo#?K5*}5Vy9!4oVj^61vd(oC`vMbd5g+a7rziYYkXYiFdWe|@T_lS9MQ%qgu z50z#mw`tiSW=!;F!ApjVXFVe?A6Rluu0opS^ma56%h26$Ok}a96+|l%LKizpsRmRN z?ZYODLqmgjwKsxALp-t$*${q}6ycC8teW=~frxda_;s3pD&5d0tR=A)YAfqspMq?R zQ|1_W!`Y{aaDxxC1K_8xE{N|0^AKeJ!TbtlW&N$5;jzYCGhS23eP0-+&dEb8!$4!o z=%2FlAP8{)Ez8oH^+BpOXGHu3>OeVu>GNXh7RJm)lY}e9G!?#?HYW|f^$2oJI(w(RZ7szlTK3J5g#uyMQUDwG5L zMu@qY?c!}s=jL5ZgCB(zUy_R2xMoiFc)M<0kK5Fs?sfEd# z^dbwg=1wQ`Y*H&BsNMV8+L@J8qm}{o?SWzKS<5){?71IWN}xojHzJhwc?$oG_XS{^ znNIo-e|HXser&&tGTbS{+<_u^emt@d$<9CN#ZT^8QV!yDpYJFn3UC@t zCQC7v@gmN;)2_jUeBOoR=8Rrx0|Whh3~Cr(FApCanO@+-B>~fPNDeA%r`@COpc~Ru z#XZtFWVX>5HFvLk^Evawrzs_;$J-CY?DrcHr)Fq)bMER8x{^H)ji2X!4ip@!yY#%+ zcXlMdj(6+rV&;P7EZCRN>`>(JKWI_db}P1aDR|@gygneV6{j;JY)fT4_pVE}$#!w} zr$C7Aa_Jt;Fsz{hgh?7D!w0Sf5dKERe7^-2Tc9M?6hlozk1V}-9wxrN;ENY0PNks%W?(=ADcG^4|~`73IQ7<5Hl_ii&>di>0o>(c^Cx% z7Q<#OSjX8BL?E%4>;^Fbe!_wVfsVJT zQh&_VpAtG(%b!X;7+AD`$bc}6^<+9XYw^W5&&Jdbbyu1@(gy#223*AW&5}{>n4Q(0 z5+E@O`;58;{OfN?qO-{9iN95R1eiaDmkq3+@G4@eqd2FLCJ)aLyC)EILOMQnQ1H?& zD0yC<-GdX}pEV-uv0|!&i_mFW#2e zys>2;J`%ew6f$Vw0$9VNS_axfEa;+>T3cGyQzT&wDzZ@_BZxhoTjT`-TZKST)J5c^ z)JvArI+@p6A`-a+33vl($^67=r8^3wMJ++CUDbTLW z(&^x+)ue%?7!isf@i5h2DLQi923n_9$QEEd+QO7~O-wEeDe9nzkMjJErj7~{FD|Kv z0yrOp*JYp9Cn2UO4Nn~9jvPw~2Mby9xDbZkXKDUbbvAf@FB>e8EmTJKbc7c$+es|) zw5PtJOKK_Z!9004te6y2f(vcK#KxkCVV(e-PDS?`Zh0zWWJ04FcB3Rz3-aFZ$@ zGBlU(FiVOOJasJW8tQK36_tgTRgF)OY2vNv?%C5*bR*~CBR6ElPX*%JX35)*ZN3psybD~T4-jD)ClRy#+BYc`OeoSUs%#Yr)LrX#m8Ex}EWZtRL*d^*i(p)@pdhXr`p{}FuW1?Rl_ z?%f^YX0w*&W*?fT_zb^+=2i+lG1+asZ3>V2!1@euCmdwb^lJQGTUzy8(`0iF>GLLw zEI93P06G!yi?@T2+Ci2&G9rR1#d~E5YroKYuqAhbiPo~qIU5LG`e!HLz`nV$0IjAn zMh1y3JdW*(peVJu%d9R9N7+j%_iCW=&vezMflJN8r4vE4u}bOTC92pmjSoLpv5^`4 zwW(IuuX$PFkW>0$IE2K%RpFP=>aiv2>9+O!+Tha`G8X75BWtwW){-Jr7|qqAsC5Dj z)suvOQnC-E!MWmS0`~_r)dxAWXKQg8(c{@DsT>+Qtb~_Iie;Hq>W4Zes?4!_)9YJS z7bv?n*F!yIuJUACh-qO|lx`WsaI{q8%>qF6tmO@f3Jz2#9U*K0{7n;y-}mf2GrI6p ze(la9k8L^gYMOpSY3>;gm@}Q(t69%N!KX8 z^wqWth(C7fY_BETh*Cs9Mzw4`yc}!m+Ab_gWPGQ36@=5d_6JrO*;Ro@)U5&Dp$a2- zC)?V6F5}R?QK8$iw<|8v6@0;{!VYv+xXwk}e6zN`&TUkMZDYOHM&)w+y~-OW?2BGe zepJ%f)&+b6FF4Sk%iWCN^NAiFztx2k?iN%s45dy@My9>aphOm$0C^DPj zb0gX(3zFu$nn}he1+ODY)aHSueLCVi)}~;HUXzhzAro`IRW?ZS*`xgA;=y$|J7^a2oZMY!#RpK?wq(pi;X};$p)4olg#PUp3ag zN5jorF@N<-oG~#e#(rL%y>@jmzakC%^#mnX$S~~H;d$vQp(XM`I)dXGBJ$;+lOiq~|)%wh+vGd`!V3i31s?q;0_%&t9F4k*X1AynZ5(DC8Tq;(8^>TDRHRzcbDLm*kl*`c$<(? z9EnidySM4;lo``3J~)0&D}a9z214_7Lgwu}Y?t7XnoU592340uAPBaY5K!x;+_-Sy zOc350rKmq}d}!TDym)Zn6#nV^?K=6{4|ijRE*4@@@O#>o=Jt~PvRST$q##N{BYxZx zWv2LUGs%h~^)G89O{R;?J*M1##H#S!*ZI5s>$;p-V^9p~Wo6}6a3Z@Vet>}D&QhOu zqqI+)@JjH4Qr={l?e%Z0c);yJkJjWOLt5)*!2=r;7e8HCh?3hkM}QJXQx&PgCZ6Kk zMH2hl+(bc8O+=fxmAj(GawK-_S>xcrFW<-|Jx!lV?m_4EK-*7&CeLi)Ia zB1-!BS+|%=+9q9aGyO^p1I5BC$AOZc@v#9TQP0*9#vM&54=HaNuK@AuWmx1D2#I!p z1Lz~-5`m=H0>n!=Q#YsddoRV!d@u=TOBEF5U53+3fZ0#qD|$T&*Y>?)vEqpia)( z`P_y@3XMpG9`&BH{=4KRypZJ1=_^yfUOxWbbrl&nGq`qJFOH|fxg}NPj|L)OFDwkG z*m(Qin7h&l$T<%fb0OHe4c>DnxX`S%)**#i3-%j9OPjXhum=ux& z24gs)_AnoZ7pIB2K$!66wzju~pxxVNF<(YWv!90Iu=YZ0;(pKRG?R;(HQGD-Ge_JD zRSRyJF@a`FSkVIDdog&cQixKpMIKU8m;fZ{w>qGguximD&M=8M0J8To*wYx;HWd#W z2yz#J%i7=W+v1bAR~4|cmvwdgB8=5rvNwB5&8WUqsK8JPQ{yvn?lPP!o@qfgcV^LU zUriBzMSwgyrvD)5UOK|tt7QN-7^p+bNU#d10jt=3DV+dI7N)!=lhaM)E{nU)EN({- zkfUEnkB3j(Au6wRWWHG#WJQ{@u92IJ?K4r+YbiO~+YN*s zUEYk^5U3Fg-W4&hn1gLa-$&?iI(3v?*rR^IieD%MzXn_m-?_6T4#2TCQhb1^HBD>w zT8&poib&E)ux^X<3)ZH)wDBrLtTrXdRwv7C94}Y1d|)FVF8S<=-lJ!pCh6=hgQ9xv zD8?MEE2X0{)2KL58bX!@YF>U;k@ZDw(C9mJy5X0$)wfQOeRwo*l_@i-wC_pOsU#8N zU`$l$s_7t%by+IciDKY!A0d6rDQA|s zMEle%V;FlYwyI?fJt_f&>SLJ}+FNCgh%J`tWI&Flm@ ze%yEC$vWRf#JkzcD8cdfsp54yB6TWdGe-90lzWYQZT9{_oOJV3!|%g>0E+<3VIbgV zv7Q~MDQzBwh3F{^JS#3zhmRLfzOd|P{gdRk-t=3sg=vG~_g_lCuJ$jNzNmg}Yu4k+p+cE)a~6tU0YwfUZ9mlh7R5tA z3sC>~gezy&SxpM$H<|*_JtQ~ik`BAPb??SMwdnm*a#&Al8$~*kZRTqZvFw$_#vMB6 z*7})$+orQfiDh!`A~b9MkfRdq`?tp04@W&eQmYzM@Ea7`3KEbHJedCNh#kA>#Se;# z+0>qMFbUx^#gAdCiJ|mBZcq_G5%J+v{}?U`-k#?L?)g*-3M1!u3OTHtmEwAwFMt|! zj&(cf5)>bB;=%}^#L4<;3(c{Zxz*1*6z}`i2dO{w&n!sG6??e>^Wx#`WA?h{$tqgJ%d`>-{r(Ztxz z``Z|@DL{5rSBx063wK+fZOmri2$vt#1af;WAn+$wn(qXONB-UMnJX5wTb?cxs$+qm z@v178dEk5o`v&WR3A#)fo7EH5mGA1y^Xu>XYuduRMvKGtTM-`$~qyJKsRj0Y^&i32L2u@5jDQasCaW4S}>@_?+)Wz5(- zB%e&HzZ#mI$>Z$X{<1ji9DVm{4dkoa4dMndc~^|?0jjjZN!SVJ;twj7ai82L)yudtWZeWS z{!+$T%NnCCAT-lX0sr@DHJeJ$(22J$w!gt4M4@tb7=%!?pBG-l(l{;hY3) z17YFUi1DZI4_dk}^fs&4e!&owR8T?sCXzEelDS}aJT$Qfs6vU?luE|P?kl{i@$h5Quvm|c2QVxRAH`15}Q#rt@(|GPW({bYf zNBjgWcNfTE5XMYqwRXkjm?rN^!`p!tC8fqz{%&&fcvbt#)9Pu#!*?=8RmbB_I50}J z@1e^~J#pw@z1!i=7c<=LlQ51t_}m;02kn#@C8UO}s0f$7 z>CmDp9`e8mD)kj#W*K=p%a=~`k^J4N2$BeWJ&vNt!@!*I8u%Jwra_l&OfkNY^{VbS zGUtaLH7Jb&GufnC{(J$L#VXvTN;Xy!8LFoV7mtJ1a43^vj=yftm@qiL3Wv3AE;}W{ zGZ23ezoHE>sUAwD!57L^4THdI8bWAcRv-dF1!Y{^s5xeQ?6X&Hq=?jq*0V5$T~rYh zK8+UUO{61}Ci@pFqN6B>Esx+FEZ|h?Dz>s|(RWi-qyGT~b;rNQ_=6ZL%I`D&35>E3 zE%cC3F~fvV1S&(bF+kgHEg(W{hcwV|6tt z_dc>%lpc4)NvS^GC92!IONa8d%AUZ(`8J&f##zw zN*vPt+0+?B)eO&ymyeEX(X7wLgmHl?u~uE9y2FrIlUI-NW|2ecumH{oCJ`3o-n55j)zl_TUtr*%>Ss9Ab7%`KDMk+Pfa7aVtY*QhR zf)Pnb`kk?3lhdI=I1n{y^g>SeW55QA5=V9I>W>fRGETjbDJ#-g##%q&=ty&Pqi3`d z7HO*G;#~7dF)q9FO;U8+(I$(Q5sbL9z(`Uv+*b_zzuLE65SCg?R8UtQwND#@&Y$|3 z7f(}`9H<59uV$dp8KuYCp!v!!=T8~ki`TqYz!2(S*G>KIL(&rUBqxde73VGiHQ0H% znv{|*$A`3G>Z|FCg=jMvwpf7`ncbaAcJyP(Z_skv6`t=)B?milBov*ebU_3_f+cF9 z^dyhf}G8bHNhQRNHo)7)*UrIHOnElp5wN>VSg&=li1(;J&)}{C@nFWM$qea@N<+BV{ z+}$}9Sot?pT8d;mCa;kV;Gi!^By0;{FzIn49EBoJ$>orS&JR3TPtmqE=rh^~_S9WT zt6Jc1$D5p4v2ULpqe1f)5mUkH(rQ#=msExCF{#hjJ-H}0v+`vWjBMbytlqO}e6gll zZd8G2wWxL)cy3607PI=SX32-N!k-6^fz)rDlOgnK2G`k)4OKsQjObpoP&sNHj3Zm= zh1xGhq=6Si$wB)x#}D6=XRN>HEAK@rzbo(jB1DZRMaD}fhX*k!@sRAMlzF!9D~1?@Su(O#f?!(-@6DVExbX#|Lnccw#At z=>h>iBfqu88|uLfixyAHgr5EAb;!a|=bAkXBdGa|RU(=i>8p4+VbPUT38#clxdZ=q z{rgK=HSf%=+0%Ow(w5)(S5ZX*{hD(QmqBOj+|hY=J73#&TTXU6o=>l=1cIUb=DmhV zU|k*;1x@7K=KXn&oFb68*-5P*EPGC(Q?Rv$52#r8lw{bEXE<7VPQjgHxQ*v%&A~Q* zOyjQDQ9)ujtV5X1$K!`Z2@s?a4?-rN`{g#MxhP(kaIQq)fP+YP&Fy1OPMR5WXqXvF z;3B;t*S4C0CPm)qMWFzCKpMCQK~smp(93&tD)2AE;;>&PFDa?^*=hR0sfvc?HDQvU z$y=57uH*j~WAE4`O2BSemTlX%ZTpmM+qP|Y3^2d!yeE_b+5b#?ILJ z?6s7=EI(ZNG;B1?6XG_5Q}ya;C{s^%^b zx8&Htes&w0;Uff;?X|!_$al^BsU-G0C)Kf%Z5O1ek))TVk*t$vJIU-3b#7yDtjtIW zXn($4gzolJ4Au0Z48(a>Q>n=&%;=p^FT7<$;!_|Dku$eCuhp&$AxYGX!vLY|JjaIT zYej%AB$t{fCJ z)Av#p2`??U-bkv~E_AAJ8E-2{LwU=b2vo=r#-!zF~+oVm-jHqdZVkcxu;5AuDwtEdTW~5Sj1C~ ze8F2r18+BZ&=L(jSUWI!ckzYNa4XO0DYQ^{y4n-8p@rEW=kn8N?g~qtdU3!1`itFt zA@`+dJM>2*Y&O~i#eyY{Jk5|`i~sqDD!J3{&d7^5|m)BT7x5c(|%-l)R8*4WNGPXswjI^r29<1%>#h; zMa&UGiQ;nmDAPZE*@5ML3CHTA@=}%_P+oo5A^2S;c^WJ!q(*kHa(o+{9=$gJ+RE$% zmgCGi$|9PA=y+enajCUEvD;=?tHmG@FNoP>RH+*(S=)n0pIVf(vd!e=Y@@${qPh1_ zL7eJoVztdfW@Y4G!?~ih-Mr=q!B6j2m00RA5-k8Hr<*ckZJ?PYfD|;ZqpdW#W0OJ$ z^8g|~5Qoudxi8A$*qpYv3B-wP@1uyGbelojUTkJhjAHDK{c`|*)yy}CFrDeTQO{s$pc zo>JS35yd=qL#R9&`_7JLcXCnMTKUbo=lR=qp^OpX?#E%;q+4%Pt5UI@ushD*)T`!N zWp*1t;tb44BZ(MmmCK8^=hk0%=4PlnZ04-(!urr+1g%}G*K}Sj`rJfys2jD!-+g01 z{Z|$E)8tn0j0@~sRVN$h2v=I~bGvaPhgbI_^i^Wqn%7AWSwWk+-q|@vy6{OYjHSV# zolcT(SE6#Tl>UsIEs6jfGh2h5ve5QkuKtJLJ)E{^7D#5X^?SfTpq0K-%T*97w4_ou z44pA+*d7qKndoqnh|dnmWn+H}mnDm=aG_tWS0UJNfO-L(^W%OmE;V<;D^(CmmiUo7 zYmGzNU{vYsE_(%RKtSA#FnP?v?(f~u0vt3z>`o98?xwgIXXhbq#@UxlkeC;%0CtR5 zKtXW@l6udkfzoYnb`Ea+ZraT^z#Ug&p@TCzXc%Tsx6?MzmM&I1XvWt=u=;h=>bwe7 z(3=#$5i02ZZoHL8xsb#88wVZwRyp;1=`lk{p0ZH>bH3Yv{{ign&`0`DdHX+u4KOh? z{kO5@(J!u&r3JS8gz_A;y)r}-is2W1%NC!J^vkP!WV({}wx{#;i6Ww`D_7oP&TfPK z?qSrSirBwTAS%oD&ABul=jSF>`_4Ff*YbF8^Y-2P`tnJ4a%<^QE#^s}DPAVpWEcu05t*>X-*NM1MCNtPLIo;8Lt{mN=a;TB7 z!z;U}5m2&$_w6g5Bc0v=F1`cgkB+V!o4A^8-x7uvpM4qi_s9Fp*qX^S7*s>&nU>zw zcw@b!2@wFJV$a6?i)z}>0V*gQ0uZEjspyS}u`d_eI=xA%o9Jur$B0v2oR{96of+fn z@V;DczabNSWmx^AZdz8Ri_>(qC2Mbg#e(9FP^Ql%OOls^ibr!dtf}1ebBpLLh|ATO zhmk{pNV!Osa?0`jmu$?AJ4_nJO+uv4nE9^(icYk{Bd#FNcff-~_f`H+eZStTQc)_V zFqoE#L4 zOXI7~;9Ue56W{5EIt_n&!FCWZ5Kv$FpAg<4j-fmmeSeaT8^+MTjSOL;r-7vF*EI74 zl%dW`QRbboN5$x3xaas7KE{GJ(5I?`%GpiWM5WXP{GW~HXf}O@(Y9f1$(eKQh~q;* zr``T+F5ulWLQo&v-gtE>k*twjV0;Ywqmyg>p~OGtiB$m0H3PKb=buej)lR8mcA zU(1*Bf#nhKdn87%s@VxTKEz4u`PhuAt^&*?5!7%4cQNtA9DOH5ssX;em~AscGiM3z z+{ihdNA5m*Nd$9${fMnaC*b_4?L18)T)rCVQJM%K1w0YCx=Vj{^s3 z7Iys9w({{3&HNg5;*eGpM%>YS>1Ftiag%UzJg#EFX-+h&;yp#{62xhe*MwTKdwCa7 z6jN}6g*Qo$@=|c6+w&7(Za^D*u!%rObu6f0sS(ViAWzGH{z<2W|Y}cj`iwHoT%N_mT*KUM@SSpPPfWWQV%+484Q1p#!A(rc2+=Ly5+vLpJqmSY0+Z zWKQG@{GbLOZEP2U&dR0BGGVHA8*0y-%gd?z*vRg`FS!cN_ifFj_1+)- zw+(i@Ra_thSxxF4GVO#&N!K4LSL0{rN*GUj=b72C5U_4%S6R(LNiEM*)J4(?e^xt= z0d_{)@Y@U)J+)Ezsu$7Ax)2v;;MVM9<4B~!m>Q!;OSg|51q_NBD$PAhSml{%8;+~- z<}{k5x4PIFzlvz}${OF>7Pf4e!#q)MYjQSLetx9vx0=Ix*D*Vd5yihC`{X;_;>r(H zUsR4<4OVwS^zfoCYD?CuO)Y`^lHK&~qe*SgzF7g6;X>;akM+&LzprOzK%2&95av^> zLW^tf(;=eMMl~Ar$+gX8+IJ+|cL-xXi4K8#;y0arDDyoetFiN*69(>$Zm`*{4Z$YJ zb9>nNSgNU6H=!x>*g3FrMVs6-MfuEcmF~&bwX&p}Kvr2lNFguLp)Q{JJ>_~nW}SAM zOP0i_;MPS&4*fAAR?>kGH_xyrTN@)XY$IeTmV0hqa9D}NT#j z>YGSf>%}HB9y_sXvg?-D5LYADi-PC_dZ^O_?Hf+1J~Z>Z41SS0T$VLmPJWhilz5rO zhZPM)ibd35lnd$P7GDd+`VxB$}2)*$#0C)$~H(daI5T#F`|4`(q_u@vBSjnbBngQ5vI_ALra zBz{PJ5#BqOx-QED$zys&Y3}j@6+L`>Qg>cb%;M8NdS;qEUds2kEy{MPp0WJ63A=X4 zFYh;Axs#&0{i{XpbeGMxC84 zZv2Mbaf{P+T|u)+{rWDv@mlf8eDLqqJNLZ4%VrDfAwKSfdXjGIH5i+(pZK@ueA>ib z+$Gwb#G35VrEA}vduuM2-Lwy}Qu6~aXv^3ar&w)(0Bg1nqPfUt#fk1u!qhlU>^2I@ zoR{?^SaaoJm)QatZrg>8lljwsl(Rv3t=i8JcLOE00W?#CS}+wYrRpJQ8}@QWveLoS zN;#-(^c}R`E=IA;6U)Z2zLZ+!48UKb=9TYKi&BAmXG>hTa@M#Zw5;8%7uHi^QcKv% zwe1FGvOjb?4zxO|u-P;;R)&bTm9zL9*J9Ligra2(wfaNWA*|+zhi%-W&J1v?SNxUS zI$=X`Y+A|7_HAXTFf9U(>gDqOwO^HwbP_hg5elhyw!PaTlegfY`Jq4r^#_{!sT7kg zg8fU4OdUB3f_57I)mE~cY%G-OIDR~G9#0p?epjLx5Hbs*%g+gnzDd9_~HK>9b;9jyabCO<|Zgbh6ywL zPE@*(L++z^mcu8S^j)!V75Dfk{r=(e`nmCOR`YX9UX?0q^ZxiPQE>8k*s}2P)xus> zsW85k0(HiG_$OtA?#K7%RjJ7Vvf^4IBTmFtWt@K=jnSw0 zhAwXFmb1s{_eNk}JEz&Tr5-Gs_*)~!$fLUAxc?nB=glYk!qzcZM**XOZn&Cv<=K&q zT5?z$c}?aza;8svn((kix7*~*gZ57ZW)^(i9Mq7V{$YUK*4G3QoUa07CxIc4?>hON zwG3j;mk1*$!kW_^N6sK}v+W2?jB_!)V@~CC>rllLw)csL2hB_qzR6^dJy@0D`*p|G z!+9m7IF^fC(7uInQbL8f^l`YuA>l)4tWkzZsjshLQwz2KWs10m?shjWsOCM$w54Ub zxxPf2@A{~ zrnG^%W_M%@Pd0!xK1So{Gi`EdH1P(KdB$$@NIn|2!G*Pvp_=O-Qf1Btl98)c(+^fL zx6p8)@%{R`2vI$h)V0a{mMc(;ugX%RmBDz84%{Ae7wdhz`T3T%oRMsF!;@mPBkvw& zkI2p}PboI93lve3(cjnJ<&pz`OPWBxWrQ_BNMu^r_Q*w6ae@v)>AJI&=M0nh-N0

9P8s&%4uReNmHro&C}Vo7y{9d4^n+)E4sC^(q#E#Ur)l%1)J63nt~3MMUY+Q zm1c+w7b>-^%pNupi`~<^%o1py%^;@qukqGZXS#;v%FNb^*(pKaIafcrKxi?Rs_m8omJLu5X40TKt)r1TJVe`$ug2fbt=8QdT;~2jw;f(Wq3( zhoDbX2LX(L2K3HK*np$!c~#_zajwja5z*|?P*4h|eeh0W*ncZIdlyb~m7(ZFhOsdi zl^~`m6%NY}=Bbh{I}wBEjABD>LZ#_PZPQ?4ZXQf#?Aqv1T}ffU7HbFVb#{$kOBofz zAp&}6fKevnJYHR8={Q9k(I!bjH;Rum5HXNu72mPuih2_Pt!hZP=I@~o*>ixOL&0E9 zV>*WdFx}`J1diR2-MeR9`Z1?ot$qwCmkj&zHW>*|FQpLv8)@$lj5wc&#D$58I=HJN ztv`H7h2-NXQ5=x|Rufz{sJx1^gl}8W{D)7bhY5Zr>l%5Fqfek3MrtpKY{d9eT?f?A zB4IpLcFn$yN$Ovs#WnK=5(FL8=msQ~3T%Rd07(H#2Vr$gUW1HI-5!9@DxJy(VD4n8 z+d&-dQAo~(`bC%(FQX^2P~*R<(r+A<1gWTKS~OlK#`FGE!35#c;VJeO0%=j-qO&Q* zrlqI6s4;o$6KpYv1~aa-4#B4qdALTP;di)TQpyIor^zo96>5WKKH`9-EV!V#EPsYN z$sYS~#Ta^?;DBrD>)0t#nxB$?8Rh1H5C?Zz#W7oGA3e`NHcLpK%MQR~J0*||#-nO+ z+nDOfi?aq71?-TAa}p|aZWm-$<)-p?rCt##orEX!XA}uNM0Fg&i^?*flj*If)aeS* zDM4({O!D{mix~!p&8$+rEJnaXTQKlIQE|NehA)Y`gzDES^#f~OvSUyTUaQ-YQwLIj z^|!HiSuwmX92v}U22JVZl^x8efD5-Qg$PsXu+R|pNjo(rM(qz2U^gTCAV)SA)m=VFG0ha|}t2U2T?%#v_wuVQHy-8LZ zpZmrC3e*8@ayJYfn!z1aNo|V^IY1mQCIn(-3;>+?PptXjK5a+-!R)Q8$JZ?#^VfCd zg*(46_0R#n&^B*7%t*OOb>_u2yshsw_gY);VRjFtG$@DH)YCgMLry!^P<0l*6Xas; zqg1br4a-+qN7M0`c+reR*Iw!+;7qTl;M_2yTr-TX1u}|r+7$R?e(VNT8K>W??vwJ! z8tx?xhdyi|Ll0m!us~6aEouZF^GOBgSP%r0Sm`Sj0v6uO0JB^O0CO0fA`-+Q z!=gl1IX|<=9|PAvH$)$O&R#*BtM4~d){^^zN7x3}&10H~w<#{nE^a)1DP4!kTX}e1 zdTupbgFhRF9bT^MLOZD_WkrPogf`e2!52JsW`NlcgBH@9R8;#z`xg3$c3-S$W-%Wb z@F&`bt}CDq-<=#O@OFvUEQWh17xd>jBav{{W(>zU2DX!GyWrav1&v-3YF{czhUmJd zotLMG)3GM}l`K?746j1Aeka)nhG3qm+q2Fbev_5IOl7~UNPWLHjzAQkc(bHLm zc7Q+@j6_s|PSnfOm0mBlvfA8YM`No-ug`|9%X|MQKFQqze5#g{=z-(IX8nNSZ9|bf ziKGLs^_VmtcTblOfCNk2M5Je|7$aDI4kepwV8q^bv}J>6e3=vj(r~GGj9ha@^f6=; zpK?ZTR;E}-x2)aOtLZx(LE4@V>EJKT*ncjx@Bc_@HjAC$lP zBjj6n?&sUatP3Idb0(MHld8YxQe_K?2?G!(f|ab7?^CvC=%-$ov;+1P4uRRwO9PR~+ce8eY zM?JTbKaYPC{CqAq+ZodsDVagnXa6+a#1@p!v*~)Snx4t4bPAzQzbVp!fL-R( z^%iR4!h)UcGV%k5Ld$>QpADvznl4uUNven6zQu}gg*6X8L>rrsvxkW~31L!na zPJux@#Y*k&(<7F-Cu(|TQ+7N(FS6U{b;vPq1U(%xR+`Y~FQ*sLvQcY_NMCBc++n33 z2ApgNZHbfFbtkx1hmFTIem5#XttSCTF2u9Vq`0u~;u=WM|LmuQyk7WVhd?PQV6q3v z_MsM;)#sp!nG8wvZ^sk9FZ}!RV{!?%d+E?Gwh4!Ap03RBSfTtd`vC?loiiIc-wDY|@XM{G@aOlqs*;&E-JD zQXH5$_e!4Xw;7eiqf>>HXRWH$HZ`}CR%v2B{FO4O9yrJk&9moDCqAuDO?ldDWJ7Zx zs8WsfxmJcjXz$?`)oFc%rfOgHIj@ALDw<{gTKih}(FVYXzCSI^SfHAhEvwU~@R$ct zCnxm@#Q=($Qry$M3pKu!8nSL2gW`vu;!m;*7qa@u|NBtPm44KlY8++#H`Y7nhAc@y zPIXhLlqJI>h>Qoo3Ld$Je;g0|mg*PdbRFUN=^8sFQT*XwfUxezcECY|wZ6e1M=nF@r~d zvzI_D9Xrm+CQ zJWHzVK6+cz>Ci5_#UMn(P5Z0b6?u}=(DbZ7LeL|KdJ?G$$&qz`NJY4RjEQJ5Ti)Po z$mll7&cb&^(d_;^*Rte#+NX-0hUww= zQ!|M$Qr&e!GnSQA=r~u!+CB+0RwZw7;UN0~B~R~TJb_gS$+bHch^u+-r>#dJf46|e z2E~4}i7)IFjnci?dg;b_^Qjr#^&`?hJEAr4QSbyOF*}Yn-(|l!!e2$C&f9$iXoq9g zw=lcgf=`$;IP-|$m~NF*{YMYMss(^9eE6e}-h$qH5A4hNGlF}-+5 zB~mM%qvsBO)nT$L@7d z14c73O_i=2q05Np)GE(St8|NY5N_ece|1af0!F?~&euZRFFCL3wM>{qEkSXo5o+~L zUHogb1vAVlJS$-)b{T=YAW1Le^1cGnSe#P~N)KY;$vR1?PhZSBtys4CL0!ZoUkBhK zQk*r``xI9~CzHqpP9@wFr{xV9Bb$4~4%QW;NBCD1;2UI{b1YvtE>t{<;-K!F**xi= z$~GKxsF2QzGt~wJRU7akd;X>wF_iDy zHB4>zw7?EgyAk6I@$NsS)Oj$_1n)FC9vF*$6Jy2)XZ^r56}X6}_a_D-wwV<;bB>0k zOdMdnDOU3S+{3>x<5m1m%?9WH3|GX$@!u{qj(+i+|2s^p!fC1n3g7`V|9?8?W2&_G zEoIM*raDT~6Vo$+02rPiZ6u9qmuHjwb+>CV_HE8t{!mXIw@+Wm&h5LG!_QIC$D7*e z|!vL|+3#EeTji(nI$hg`1?n!$`US>!HwA+dfx(retHb- z_1rXPtkAhu3r+<%glL+qG(1qQlxO*(isJ}G6Vj)wtmI_+R3{9}YI zVJV0=z>-rqALFZ@S!#w1$giy2{{#tj4S|W8(xTvv5`t$u-&@yoLdDpZQUn_N-{XL=$MO|C;;w9bCGg)S#w;eA@`7@rgf}3jN zMYN~f-H}URhnL1%byhXq9S-82G%B2rI!}j-bV*IZy`ptu>IqJsXAMj}Z(EP7KuR=DiI#aDe<3XyZE_XuG{9 zjPMtcc%1@ zqvXISX{>&_hP(Ig>|s^+ow*l_kcU~ikyt#4u5}v}?P0`oa()T1F{f41x`NbOVG^eb z=Yv==2veMBTdp}W-92}*{vvB%C3rg}7_dj0)g8@Vo#ChJJ`EP5+D|67dRxRC1#vu! zVOWC_rOOgQaxNCd`l)qzMmueIBLSkchKoZAetBcW14zZeUs*=1+1UNt!h|loqJQ_} z#Aa5Nl6EnQBoH$?V~-aJ>5cVzP)6+0ske5pYOSeov#FG;s{L%c=OngH)ugfIB(>~i z99mTcn}Led`J`IN0Fd_0Of7qpnG@qui3n0JZX+YRKKPa`&J!c?Jp&^ZOV7=IP1{os z1Wo0vFOvG&QV=NGoSCYEPDMkcIc-czgsG2;fCZOHbpw&>V1JPY`cR!Kgh(lwA@eP? zbq^9(L}YK9^O7VcLdHLpXH9B|(lt+!DcZGLZ7g2*+pZo}z{riipQ?+c(MA_0cTiz|`w71zu+0q0F9_syBsEW{-6*hCSHAruJMVT^g*E`OV zVhkW;{oX~~T>bD-dYE}mI2UG(MZrZn>=o5oCrU#t0M`$+nx+Z0m# zxFnHHG87Z^VOgL#Fex{0oOE!_LQen+Zb93|Yes>?az&I9&T^6C@$=gUc zz7=mTX?pRP9r|FIwb}pXY^U89Wr7jHSVnU^2VTNUS@Yz~abtFYBt#%tA<;rW_3SYZ zwY_wWry;H0?$e@`i5Iz0Fta4lFu>1+1ZGCjc5UhrA&&Nk|rf}TZCTr zRUXz9IT8%RHZxc9o2eUuRr5sl;}GCr_o$l4p0=yIQn(l$W;X3kgYc8%K>nj2%`}$R zGEvGnzku8_QipIDsKxXOOfj#1`kuo*VK`WTEUWj}4AUi0pmBqD|p{?A* z0Mhwuo_BX3y$!Kgh!WZjx((3_W%D^LmwQkPOd{^kAZHsm5W9JhOq{tn{2H*$w45S( zAGCrf%dymJNs_o-RXII1-4_~{WeOx*hsFwy?5vvVLS1S{639=>^Hyc8TxX`+MiJ;n zA#%J$T*&^<55J|EZG8o15fpchx&s%vs!qpr^zu^bkgR3xUT_q)+SZ;#RNl1@5e6r( zE>60-9670@Ln|}aH*=X&fUfhH(^99EZA31lE|8&MTXg*`pV-G z{atJh4vj`I7)(^lIdZ+8F(&>|6zY-dhfAe@FVpQezyd5H)7n_^)cYT%6?}Y#2xDgD zL=@sp50Jn|AoldVtuSGZ)}))UUhzi0xFnWOn*-^U;6FMqZd<<mL>nw@ z#-UZDo9tg%4DyGt_G%ifuzxF2Dtz(-h9%66(Ct}~0>E$}h|9I&QFEl-BRJ~$Xragut{Ra3k}vb>7FbljSA({lQ)~N*Od$X-ay4p8$Vit#NA&=jJZ#d_U_o&_ zZ_E#S)lQUD*427}l{oLKzs_oS#w+O52vM61pK*taUZ7VMi%T)nEk7I9#4BDTHe96M&M|4XXtkKM~c)0<&1ld_=mxQw3N)AEjbn*y60;yyC3KIyk&8 zGQx(p!bVqKFRQ~M^fbNIC*Sa~HWaG!xI;y_zDnLjH{hBx&ZTbxAO9S=cvgJ*yq)jh zalgD5OiCtdx_nyDg4SC3@b71MUy6B+VsP(oVQ_?7P*QFP$-Bw$)EI6L=H~XH_L@Em&Gc!adt}x!E%TJU$ z8f7fJAIO@QINi4RQ=@scg&&5r8BwDEFEVK55^O(GYeqei2AWK5S4=Cgk6kIH$9pyD zM>MN$TWX5K-g%g!Jc5FFRee+qQ@-bOpLM{l*zIM2_@k;~7?<5N_kclK`O@WTdi(+m4EyC7)ZIItq9MPJDF_I9)PvNv)2 zaBzFpfSHUU2*%2z>)tK&iwBK6;m0ckiC0`O0oGx_1H!;+@&yrhGb>{8Ud>1bV|ejX7a|my{As<12dWyLY_ZJO=K{Q#mLWD~UNU6McDjJvp!&ppUc8of{?r zRzW~Bur$P5V?+`(PyZLq5>H1kg>zP(do$=t4dlVoboo684W+N z=ApDg<&Q&Ps2;MTx0r&OBFzxJ*=52*@WA%n$CQi3RK=sVnFn-;diiRKy#!#PbT&8n3|Qk9DSjkIB-wb!By{jIJF2Dlf9P_hDJ!b`ZS4aWiq7FU%T=3X5egTpxB9 zEj(Rb1WHl=$_T}IT{s3O>wsu;_pNoqrklC}m&H%?^1z%Gl^f)e1=~a`J4@JLw!SC`Wi&(J(NAZld+){*(LKveW{AT!epCqNGl;#FU*(ZWe>Oly{X^sc38|KW%8%Vr}k~ zylx3W52JH}<`!-R?a@o8v5Y`POk@;g)s+;|+_hHPl-9jw=WR>Sv4p;4N|e9{4rd!Q zv5l^|(`LgipH0kE(pe>n{tHfib#x>Ip8t^c?h>su(L1y?7$;Z49m_M(s^p)n>Rx(f zO`!2UJP(RDU2xjuhT5Gz@h9LWhPoH1M&F873R($nnD0+gAEkreaiO3M|K;P}?0=TO z5NNGc?HO-Nnsn>rmHP?#0C}Vb`pEXZW2TgHj3UG@S+cNEWZfdU zAF5dqfXM1Tq zb+xvf4A%hsdIO86|Bn2I8Gi5jns_F6hn~q@OY16FANp1QpERiZ&_A_*Vu^(w_fMrO$D4*OgJIOen zswLrw`c*Lz+o)pllIN!U`pokqXIER+UnR6!0mnMyeGexfEV*5 z4dt~}l0)wuTlG4VZ~R96=qG^22&y-}KACx$bI*scN<03MS?__g`}2{0)JMPlKc)*O z0Rw@Zp(PX#551U$wX=yMy_mIuvx$g_k)5##y^M*inX@?oBP;WNJL$RlO_%>OO(JRn zgvAFU0d&MJv=f9|(xUq}ka_<>C_0zAGVN>-xW-_ktg$S_XB$_I$p>Rw`#1wTwvdC1 zx3jQS7G+UQIrX{^V zpc%yidMf03sApb||I_&s14mH-?9D=W2AHiHN}g_G!pbw+<%dJx2cDg9q9KvyRX79w zuPamIC2uVPWKd*B@33Lo^W4k>!NbUall{Y8!MiPVrs^R|q9aA|38I>p_Ja43@+R-Y z=1HQH?#W8!$Ej`4e(R!@b2%**4u+xfmr&0S-P-|3!;^ad|+UZmdq6jO8e+M2PEGg;F0Kc#+7^RIi5!NU}Cq98v z?K@MuLuhZISs&Q1%IGCA$|C8_nzOd)NMk1r9^7+yP8-vSW<{Hs@k1EzO+3T{>OO zRCgQ_D8Q2ldIR7M<=a?eOk^r72O9~8&$0=+j`(asr;l7LMcAS}G>E*EdkJIz-*zk* zm>SUUb3Ee@&SCMB%`7m_5RS%^I?;?{=J$B# zYsFOGKM}#@ojMj%=|b0yzO9Js`a+Q0VWnS+2DhJ_l}>Gh95(P~!#~h+34%AO4A-G8 z!VIT6H&-*LOYRlw~Jd;o6=Llb!7GSNf^Fc}1$DmvtzMK9?u~uCp;Hcpo!Diwl zF4*)BXG&?+$>+QwOyh0hwkJUzMX22=RfJ3h#12WVttPW67WqU}j=}Lu5y_3IAh|BO zlZeug0a@4eg*a7WmWf+2v?`5!08vnW%;LbYY)FcFK@WLScS(J-d4{O=%CXB&osvkU zm@++iQ!jn)JGi5L_2}YEo1Ew$Kk4y5EjO7xZp70iM?=jD(B>%% z4~iiJ_Z#eSiY@u%&g0+T!Fa&?A=|P$+{tG`fNm&TX^qLGka6;6;5@*4>4xHzVaZEY z8#CD6+bXKhC%viulZS!6*;pciIH2BI+PhR?A^jR9(1Rvuu=VBK{b$=lFy*%(1{kp z^oKaLc16i_q(ba*h{SSGb@;DH8I+e!X9$EYi$lEVV>Y0a*)ZHUn2{bjY~T27<7riB zs?QHI>9_5n4{=z8Z};4AzRMDG<6|AEYrzAho9lQ@GhNf59P!9rSJ3e=cWUZfz3N6* z$@ImbI2;tBg-xZCkLGe-5*uPbq7#QDavlpsNRgBCB3g&&h(=ua95(zq@pXGo&IK|$ z{#8CG1+A@4jr9lun;^xK;&D$IaCGb;$tTQJ=L%@QB>HOATX4*7w>|lk{wfrieY1T> z7x^Y~coSE*oR=8Qn7VU`uDjRFUw)N|)fS1F^JY75Y<#|vmOK14JRevL?}Z*3`QBiC z*kSbvNK!(Whgrm_xKJ7K1tN^Wf$ri#=k=9CO)s~P^xaQ6y#t2L^_AN0%(Z;2(~Z#B zN6-W2gyi_HzQ&c+(+^+xp(*;}x5vboIHwAw9fg8N6lkP5@CArv*6m^sPhZL^@g}6g zPTMJCUD~!9^tGjn%am3FPm8FlC0p(L)l{b?`j(oNlTQYf;xlh`J~NUwi%FA{G{7mM zhDA-1Ub{j|F{{hSbSpE2&9OMFrzzk>V+7Xm4hLTsXUTCf zmaUEU6>u!=88`OTopI#7M3!{ztauxoWHSAC!%(8e-3PR|>>rtkLPe%NTQa-IM}e*V zt>1lXUbq;+{~aQ%3=IDx7zQH;^MCg(YyKaa=&i{A2g8sJ*be+(zUA#YFAF%%ryI3G z5nfXkT`y!1No*3`nbW>BiF0DNl0QkABA?{s;CDTLb@_%{^bSsHre0=d7CK&jsZDUh zy^r281>ltXT7R?C__Kp+%?P98@WW@w36*EWT89Z!M^2sbLH^f6<{W7x7Am($_SG?Y1@O& z2rR?F2StON5OZt>io-gCRei~C8&m80O%2b->(JDhx{8l`S9 zc@0K-X^M3QTM{~{J6cuRYcDRqnTf4B!Aes0mF)j^W;OHgUyr;D@b9}Ghxp*@szb*3 zmz@y6)na)d)wZ@0A^CeFF2}RV3zg+-_9^Lju9OEiDP0|{Q>HkGW;fP(ln^`bLK!iY zq8KOjoaZtWBYQeP_CNuS_HL})AAE>STA;Fif0}h#66!4%wKq5PNWNJnMug;#uK9lL zWA0R6-+)4hB!R6XK^TL{zfNLvn#i#_3O)`N^Ia@aN~c{PkYbrEj!(Kk!?|-Qb@Yjo zvL%s1pVlN|_&m=;l3+R#?0jfMY5lhI(1}RB}%ud z0m__>r6eSwHvt$g&WIhL6Cm|m`n2m6Z)xfqxVu`Yr=&67r$bNDnE{FJ%(s66FUMkO zzB+%SrtldytJ1nBtO3MlP(o^XfN`j{xNj}Y&LFlX8!elt)s_CjPs=vZqxFWb!y;`! z@f+Tzd2ixhY&AjJm)Av>wZV?IdaYSrHn3i}XW2ZW{{4VbV5N!p03=wDw{-L~)slMY z;7^IgGu-AQ{7_d@L#ppPhXuA$My<=~&DqP@00xaTx+yA#4d7$=SXl7D!qAa57zZ72 zJVpUGrMy*V0Ya@>P0Scs(Ydq^{0SJ@8EdEYBMX;Me_;uGLrVDqGyK*(^Q%VCQKkF% z$Xg;)VK)Lb#h&3qiDOk^=MGw1P;6^f@Qva#PRI-6Z?!{ zpt1SiKu#@Pye3v$Q)7`)K4I};js6w@Sz+D)E~#+RzILnT7P~#?upuNFnOSy75MU80 z@tFk^8B}MDbN`U92=SGVM0-;TFk!a#tvpCopyhhT#89-Cj-syZ_J?gl#dWdm_E?L0 z`Ed98kL4OoXtf-HTZ%sm}L;OGY#!R$xXTO%OkZopUE$y!;{Bdo+agA`Qh(`uNA z!NaBINF*kKjB_DRixbS5R;HVD>%3}}TS9GX2eYL&SIHFFm2#`{PE4HLzQKkaFhkMu zQ_}8;!G*M_=UB+41$xfJBjCDi;OqiqTilBwlmT`6@71CA*fiHVUGGv54ULf(6W(>j zsyo34OIs9{WvL5&a($)RbA?*6mGhvcy&nN%TcJ)CR97Pvv@U&i)x4;sZBYYu)jjDU zDweu)sYkBfwQl`sWE!{dWkKn=2sOML_u`7wY!^Ft{6%ROW6FVf=otO#JlxV{Ev}|s=jXS# z6dL=Ennlpgu8(CZDIhRvxDhb8xw{b9t*AS6B}}=fKoYaz-OM^OvjV(2m>ufo;U%5* z+>UcYGE3tTK%OIO`(8O(GR-EfsVB zrF64G(DnOybWL}l>2>wmdMad%8Oaczrte3}c+fMtONb#o zc{zP0CcPw;2VLgJdp+;yQh;;hiGPD$8N+8yqxB^v_hsw%yxr9f%hHaT`C9a*(N_H! zRyQxDNU*ui4rp#iN(ZY{lv)xXPtz{=N9112n7@+sThkBwKNyTAH&O`h%B#R!*O1m~ zE4x3i)L|#sOKAM3a;2sb_?){%Yt1*V~1jmp=-f|1om^XIxMQrvDD?|1YiJ;&C@XAl(19 zi3YJGI!3_r9la*EX{v8v%j%KwQofdynD6$a>+%n@FRlmA%*y?P?dKiK(M{u=?UVM(G--cLhn8ybzBPI!|~3cRnx; zz^TxVcG*-+mr)`z6RD@-xjj@-(7l}6TrFoD>oHMuy~I0|GOnEyHyccV;I#qwc0$Kw zck4Cl`zknc>}S`v(xJU8xf1y@TW3e3#jRqMCqk&LVa`(kYQ-B+LLEYB<2kKN`x{Te zVWH;5X=!T}3c4lv-Xv3r#Q{*IOrB<1_44fDNI28qO#hejFPG1zt)%mOlSBl_c611& zGjqvBz9W(lEs29%$ON_zF)zUUZ5i{08b)FXd*jpIZ17~9_NrZenftD)kZ=}nIVp0r z#4C~vtkoQMw*l~!vRK-cT-5x~6x9=1!=hB;be=QbV!idy%h*S3sx%4lf! z=NHK9%WjMbq&nh=sX2Zk<<9gUGd=zlPd%SeN{~;SD3obs>b+?XEu(!gSZ1>cWFg3AE6AFoq0rAgG&%|vto<7}$Q`}Y{ zo`W38;P-qFo1SA-3>^uNC=JJ=*%ZBWkz>x=>i2iPL)0xCL!;4$i9DBIgZWjPiU=c#)JeVFjH+GF6TI7PnLQEc_v|vCsO5 z35LL6GY4ekR02Vbj;Jh@EWVH|6kWZztaJ*aV9>2W8F7LI`bEhh*=Z!gbw%!PqwC=e zQdh;;j;I`z$h-B4E(7vcZr4Y&YtXgNO`U7dX>Kp%Te3Pk2%drI@CK~KtuQ~g5Aff9 zZ@&E#{0%#9`^Q?~vdwBuu;7c)LGTQ<-nrGWPW2V^JA$aqZB2B+_rEq9vOnjRC6;$)Z)dtTz3P5VMRRi2aLGZ6Z+(A3}6%cdrR?W8<;B5_vxj?B$S&LRI zwVzh++6L34p+PhojV*cBr_YaG!pEH`tV$MfntZx6sivuD#4uE$Mpyx`P%$0eN(DDr zS1$kXzVzL*QiC^Bm%p1Bnr{ISm*}!{&G+0|BqOpAL|$7Gs!6h(&N-{FKk}?DH>0hl zwn^LIgC>c4>1{GlQ65?6n=t7XIK*7pV4_@;4BME7aoZd;O*F2vEa2{q2xs(tX44S>ovOD7_ZsXWF-(~1wQ*H6!s?)W~6=j8<7bnn0wTbMwAT=3=e4&;~A zg{;zge6w6304+5srzK+pFffiOFM_xjntIo%1fm)`0T{kOjNKhzhVETRA7q{9ta10> zWS!#VCZ~#KE_QD{rY)9Ug=-AzHzC`_6Y0wNesoy z4Jp(oa4Nx1N|+UJszo(BS?l3+S{ZEbtxh080@)$of7~ zZLx~b+b^YDVSH}#%@*bIyHjHschW3@+{pmJK17GA`-<48h=XBq6JbG=Q+-kih zlU@7fBC`L9LnIPRk>a0niV|y4;@Ry&Jxmfu5SS@yb3suj zj4Xl5R9V=)-x=0H<3vcKm*gw_WRZVy*_|G32@K?l6(kj)-;y`JMY0Qf8>N&Z|=3INJV z)AknY?3T{bX7=iG%jo+UlT@Dy(Rg|Hmd=sC9jBhXKQD@t`>0L~0RjMDg-M!^Afsaxn-`^@9?}MBQo6Zp`~KH4%Mw8N2sy@21xj~Lw9LVWmp=D&j-THz4a13g zw119{!6*Vt5C9$VClBMXjV0B!8BwmeUCwYrAj<{K>^zvoa4EWn2rMo$-aMXugxG%0 zi>SwUKp`x#ofUUc;9v~Ea+QH5%@^VBUkz55Z$7X+Wqm^UuOG{Hc)_!2uAKlaCOF+3 z11IOuIVrSlRvXAA#M97xJN!6LrNRgjl*h>+Qvw|`_s zOSqzlTwSktizFd<5rEd#iF~!yed=kq9@67CLtjc-ov6S;k&5*V9l`5R_g-q5Uc_y1 zMXNE09Y|*0Z}|Y;fo{eo`TW(Xl+zIa9XEe4qI7Q8fT+lG0oL+W-vzVQP&aQ=?qn?L5T5S5=}~&&uwZC z6V*O?!N~B&Xd3TnJQWu}1rV&P`#C zu;bIeqaFrR>Up#`i!qcp64Ey=gS_h58VMtwcf({PfjaRYbbqH{noJGC74CpRBb-MS zapv6`hIT$d0S<%y4?k06LD){_3o+8c9mz`)NMu`sg2pUFZANEVv5#s7giqWCLr<*$$lpYFa!hF2p97M z^U}(hc7zjBCok<|RZ)FH(MZ3(B<}}oR+$V;yA^HU#b@0P6In!mR#((A3IVG^@$Ms8 z0Tz5Q7i{M#!3X64Zc?^Kb~V&3yc6o1nH&JTdyg$5m1zShK`+ z$0w!()q?c&y9B*tJPVlmY*o}0RH{SOyb(io*&Ml+j-zEE);ED#D%^n)3XTBXenkIGy@$dExV`!FT_-dH(THigL@Cy?AEMm+qalu;V=qM{{ z`z-GX8>CJ=fF_a5d=C76bHP^a4hx9yND~r?u+(*h*F$*UdSpWz{#W>kX4o?zFq*G@fC0agi5T`1)%`)=gQTJC1Si zy1gm>2`?A6zca=2G{`zOya-f<4WXU3pHd}7$6^7D9KItGI6XJL@|Eev3;0(}zQ4}e zfqW3dUUle9P2iyU&EuiemReQI7xIj)&2CCg?a0< za~CLg(v@8=mqbe{23DO#*go9auNS4bsRS?Jf>|w9V-V6@LsS>r!B1WFcD2Mv60@JF ztQ&|@G+undtDFB;hQo)QW4bUUcNydYlXO^#vX_%FJk9EGC~7$)@#B~gwD3iiPZfmk z3WPF%eRUK>sBUu*L|L!4_JCGv&~A@I-^i1V>)MnwH7r*@#UyEvDq(m1p|9FQ z4HkY8;l?j}SB<$}t3*5{fB|q!Hq@{*5Ct+YD*O6A9B$Oov;jzf2=K8WJHWZJdzvzCPzpn1nH>Nkk=?l0KP;XO~MLO<`f%z!&NDYUQ!Uk;dWd+EWwMU@^c81pziHIrxj z-?}{pVN8dXZoSN$MVW*zdR|=F_^P>8i}3u`yf}P+q#+q>I~P`6|6h7(;-6kZ=y^i@05Rzf zX0K5BO@a}zC9sDORy$eS!4P&Zc!zAj-F>XOA|yp18o!hxOHcnw>I7h_kT~?Se8l=m zTY6#M_36J_y1Yx10ImD`yjGlz_^UJt=%{oqDS;rFy3J3zPZqxnKez18ukrs+2cK!_ zA|E;{iuyAxJ$-E@C2LASx_5-9@#Q5aB8BO2SjGAEBrOhpB-_I9rY#)Ec@=4CDt?aw zAZit4#q}c``F&pli7?g zIQuqcC{RC&%>lP*ZHmAqBFintCK%^w7GCBE=L&mM_yzDolhYtVpMN!A9r1P%dW5ja zWMuLPPq&$)SPJinJ_&w=y9rRDW$^D62R}kx;o_Y7f_(|(vucUW{k!;=x%6SqRrQI> zuqHYUlbIM((qE(1TN=oS;I|j2)zuz(EJPo%vl4S#od3FPeEfvjkPFl0>grq5Zkp;> zcn057U5tK0I&mTU%4BrRdFtCZB1Z8Yu!S8{OrD0Ql|BTy=wgLuWFe2`?X&lYz5d*V8U zB~Rk$*cm3=_AmbRF4j;6DrHbTxJ|7R^J!$V$r9jrQN6q153jqs?N0L=ESDAU=vpc( ze8rWjdkQti^sDHl2@K(mNLri)?9yGT%il1WX@Ak@OpwLNS98+QmMGKdrdY34hLw`+jF)BRPxCJY}i@Riwh zD_mwu84X5@p&b?UYOnRT_o6dA@T;t&X@#~88`ipe9bXIE-v&j)tdIZ5F1KR6Y*x$$ zHKLIL>QGsVH+p=_d49f=2b^?4`7MHBSm1joZcgjBNVr^`#`jm%Z2I~@Jv@k!R?f^% zZIb%(ciF?|e3+O@Sj_c(%!irZ@qIc_CCR`;l%El^it5EhRq}k50H!+ZuZ#Ho(r8c* z5>&D_0aBoHwq`Zz`AUD2z&fIClOfS7lQ2P01Ul+9ktqoaktfB{VT0$z5IFPHlp6z` zGZL6T?dRafCg(sM1H;>ruk1c52s!kngO{e0c8Y(VGFKk@)ged-6a0U(p4gVYtB105 z#?gU9(FQT3sbcoZ`KIEs0#(cJIT>mku^WjxF*Z`1Og7LlW4g9&2(II1PW3u*Kkn*8 zA7r+U8ub{w_pm#eti%uXAQ~cf!GlzEct>3=gk+j7yV%({x<6}wmUaA-g7tj^zAj^N!e^%0MB^XOLG zTL@6?wN2$`)9ZA`-k&_ERIX++lW-=L>N0_rF1Q}eP@1S!o-N(guYqn`1+DGq&dCT) zp{>mFNZMz*J*-KZ6y645+W;ozg$rs)v9hHckwr4@MxA}U70&SM_y# zd)6{GTJuRnE=&=j3do?R(jo5&B8k>is7a!xA@>MO{^(*AJBhK6Xrd{IYS#F7su=wK z4phpXXfU0?0B{1QFiWE=d`Qt7tLZ<0l^d?>aLuoPMQ&wHysAkn?Nk=_3aL5^kn6>x zcvKfunhKH~;u7*Ir6>Ak4V-`~YE08bTn%{CDCd>VYVG0lX2V;x;=?ws#FJd%D~`U^ z9h_KI^9;PXu8|WwoY6|gQCd%ky4Sy(V;=&HLGB5goUdDjf5m@Sf4jQu{|J3Dnhss5 zp1s;AIfm5VIHV61gmAykLDOBGKyH5obreXsNUbL)(ka7vxogY@s#?^oVJ$hBAH_8H z8{_tP+yi?{UsR$mgt0ZReJ}}%X-7yS$nQnh^2q@~hvku<>%Z~I%|rfFE}6~n-#nWn z<~R>}oJ*V*@Fs@H)Lp8eAbj2b5&Bm3FU)7W5I8AjXb{;#4PipB*d`g|p==Ry-vI;# z8ylX)qbT-3{}qFzh&d61oE=z7^(nF~R#UK(`D|5c*L0t$LCnR{uc@@Fx$9jipqpxg z*RFaXJj(J*4-4$UdP^T$>w;~}hz57>)7q1AAdDgWwN%9hPzd_rIOo|;wG(-0MD6>z z1ipb}mQr-OYnZIAc}04a^4+$1c~K40)R(`t z6Uy23mks@&ftswQcVHXqw{AA1(KKf6#Qxl>L!6OmD!;^ITa7l;? z|2aM+_(q>f(>q+^KRW9hdaIkd#BD$MnW6$pU8+pc@zrQ{v9jmm|FQdcd-V7i8+$w= zZxU|+M?8LX&|8Kgj7_jyQKZFh`^gr`7KXs(XB&pMCa;KzomsWpKWu9f#OTR6|8wAV zPxj5?<~>aK!M#u2uLg)hVDf!tjbo5J6x6$d2(LRFZmwUjZ~)LAz1e(z9O+HT;g?q} zjH2k6sMiFlZf!dj-&q#x$U>>s$f&N3rs!zH7W#w#W1-}{oRP#wJqofca=tiX^%=oi zEl@mWF89M@5=2@(jrEiLIpWbQHQ8^>Ngk|_=WT|l&97b2m#lE|1bKTdz}paS$F2}# zf!x^Jov*~+r^=r!-DkMP8WFe}h?EWFws9V>Eb4qsRBmf85$r8(?Il@Jkg-{$Hrmdw z^sJ=n1nm(iYw8o?O`d(fDR$Y6<6)>TX^|s#Pv~@ZtT|4o07LQeMFbVc@Xairu~ZJY zqUtyNM4@VjUu<8|?AnT8Gp`K8*swPIF40cx*4$5kSB3oi(5z@5s)-DUMURPm9Mxa3 zlJ}*rm#__j2KxH7fYjv!zkoDSuD*0o30>vdIg+`(s2`(UtR2MYuTESzQLIto47-S- zHzX_4qKra(Nu78{^%eR)sjuw213_lwH4cQ+7-xnk<~_vPqHR;}G2?cW5FO#D+tiVd zg?c;UbL#<@S(V;l2-i7S;$roThV(fmSAeRn*%UZnopx+er;ux%BCxmAIh`Rh2|F=@Og&8oOUu z66|~Ky{(!pztMa~L6;dG2xU4rf@)8VLkvtn->zc!XK(PVd~*T;7D&&F@LpB2{w_ie z6zw5~`5XXAQ@&Pnqe94y*_8Ji_4>1EZBcBR#26Q*4*k{XehW#$pcKRbYAx1B$4!#q zp@{AuW-NEJr;eZWjbFkq#`^Y(n42fzZ)SGNC>#@lr~|OuhM8ELQPijPgBI*~&Wb@F zFu5kq5Yi#ltehKcW9bf#Lu7Mm?RaIWu4eV|=ofK}j!^Mgy2ct1-zfp=Q}lf;8!n=* z1ySfb0=H#&%xU-$H8Gx}H{vzom|UGJjvv9b3M8&7WTg@jJ1+Hrk&Sd+69I@4!Cb*g*peHFB&U_u91zcwuJbA}KQED7am1P`_2mc==qqW$pW zWYP9fhnTqcG0nhm;jD}6tV~SKn*=eyu(<3oq}ZSi*C~Pf6gZ<}eOlYvlaEp^W8sMY zWnGuJZ6Npv+cc;l0#ot~s!^m!@<;Kw$qe047a>?GG}3w#{SuNAD}5h*GrjXBtpSFP z>B&l4M2KGFM4=W^$i)sbv$Jj6I};k2A6@wgOMkHJI+cco-D7q-m8~L6W!%~`8+Id8 zq2wiF6v9EW-Ko^q!m%8jCYWAMAQBa^ywDIMx#Jq5+r7g2QVFq3=~Q(9hY~SBCF1;Q zc9jLw1y$?dtNrdHS%3~oTs^`s)k7uakM&go!L_?CoYLURGpZ^KL_q@wIu%DwcYJ$YD4Y*dPX-Qe!6 z)>##0$>V*RdhJp49C+xQWz@H z!z6{+JJyDr%9rdpro-*O&Rj>q(6R0hK4_I|T*V9=g7Y{mGs~*3oR)eHoP^4^J^0`t z*M=##VAllprFpAx2({>2_=o(ruMj{UIpNlUZ*MSEBxeiNm4qs!_xi&+eDJTWHHkHA zy`}X;!Sk3NLi!4698D+TRqi9RR70A zLVv?oykxAICAo=EDpC(hpOMAU;GdZ%|Nf-Je$M98b5}EJkaC}mu^b=oVa^F8c#umV zTP(i8^F76-RGnsTp`0)Ta<&zmHTVxItqeMZ>m+3g(wzhOj8|a7OZI|+4hw+H~)eHi;-^!e{7d_)%fe2`wfweatUnbzcEu+1M{CtpaCj1^Z8xPLj0j1f^JnC zv`+F|aF%Z4*YNvwJ`5?xmf4xZa#>z0T8vLM_lzAhUyr?KcS#haH`ijc;gwfbRr5O{ zcOYTb#-$opCI|f9%9%%)CL{%xuTkO9dB=`yfp^X zP39T#(`+CqM`3pUVyaK8J8Etl?sz3avrXu5OSg?4xpVy-J7c!H0}0UZJTITpNwg4; zoEoGhVg=mft*Hu%*K$yr-%o{8xZpQm9M3z?JK$&d$&F=UhJF*Eyxdg)z9d$VCFl>2 zaPO5B6kdHB-Qd2f$N{5V0M(^)%InN-M1`+n+U9u_xAz&!1e(D ze-bxLjQ@?T!NkDwKS&od8r*UJ0{^#9)L*|x6Uxg1Mo@kwf-LGZ>ck(Ko}OlEJ6Jrv z2}u?TYdl`dCK9dVuBVbF93CAFO|^;8L;XA>0sX8v{*9Ewzkf4n_tjd(AfWL(Sh8pt zrPo8hGV1s-`f&MZ|GMw={z=km)?{zFIC+tEYSE}+o4UGbLofOIi}R}vP?;R_?yWT0 zzp)V>^s1?=y_o-i_WOXDcVGJJSMNO(`F>B6dtZuI%-Yt++ge^4zFvfqS_pjF%{75}sfo3XDBq>yEF$iD0_cgbTE#3VWFHqvIwUn7m-T25(d!Oa(2 z!IfBX&6sWqlPUm}5?#D?B}Ubo7u?%|*UW256_Vlcsl?W51U(z&c<6ib5N~buUzIHE z&M?fd>10QKVIII}vTdlES`O~Tm?2;r7jA%0E4%L$Ty+~#k5!S0#tVC7a2`Kk#!koV zv_RY`GZdi{5+}Od36X5aUN7Mk&hztZe##Fx`@XJ6y$0IJ{;ZplHjlrwHl0JUfe}d$ zj7k53OEJkOq^E|kT|9-4k#PqaOFBE@S-c}LeALoRIy@{9Q3ZhUd$Px~knu;h!k`NVwi&*~|80s2sNU5L zu&AV(hvkG3M&lKimJ0Pv63~0N-yC|?PtTD~bV3`FyLKy`8t643pf1kTM4>n_SL$xo=dKL~?E}v>@gd>|ub2aToR^HD9PK&dF3JN%yGL(+VdR7BN6gIaX{c5zz4d66 zwhVbtha_UEdu!U83z`q*xt>q%r08esJaBkixjKVSD(iFO=)o0a2*EHH0S}>aa zi5(u}TQz-2C_j`$CE^r&Cz;L=c+;FVN`kSvQ>}BE8P%#IJeVKOAJ3#&2FoySoc^2* z<8qae*g@JN@|@X#auC^p(+;tjOwcTHm2*&rRzs@eKO8*cn<2=OpZXwXU?8j3w1bC@ z9jiRR)GGuxejqsu#x&wC0|&m*dO~KR_8e8p!9hS1v~IE#Fyy~AE%mAVZJb zJWZz#=Y_cc^0Z;TF)c=CL4p!3ZrAn~kJZ`6N3U!zDjDog?a34WX@;|j`;CAW*{LzO zE1gZMvvusWYkLygH6_FCrq)q>c`(NcT5^)B7pRK)MrfI7We!ydL#R2dYs*3rqaBpa zu6{8a+7pn?*1SS{Y0GT;i7{%e{ytcIqFC1&nEhGDZ-5AtFEcw`ookP#bSd-xSCp*{ zZ>tJ6c#I5QRu~>GcO96z4lnzM_u_L(ajv+f9558BRwy$Zq`2*vc^%^QD`duu*KZ_g zm_{;L)X>M$-wR2iC(i|RYV&EEZ?u%7AWijX_od9xcu0>MVTMujwF9_>Ml@fj!e81* zJ&L4dv5M0QD~rxLyLww*k|l~FG8!K47?nAVR`RzD%1XAJXi(bJ5r;LWSJ_2+nj4dw zI88@y=p#?bt)U&7Hn*QZiyNjlBD32`dfU0Y#t1X7Qd3PGxze}SU2NB(>IlK@5k~hf zQqrD@5(HAE9>6p6a-|s_a;fsZT(`p~p5fKhIlSRtA@XQ}eipcqjTz?JCke@OcbYIb zZSAz9DpGt1Ml5Ee+6^pF5x8?FCDuwNh>1zXi*1i1mNH~ZHy!jOpHAzsuDnCEZ}>#) z{em^*WhRDpmez>Y>foW9OMp0NYnx4S|F9t^B)I_P0_*4Hz$1kcCKE>dr;a zMSxL?#I5a{3)n?1geNJs2&F;WYM__7? zn+FGn2{SDT-XJDHhewLfC*uFwBl_#QwEs~-{Fl*F7S8{-kbd%yjDjt4KdUwk?|xo; zxh9?pFOCqQrEeEL0(VqNK9Jy2A@!mji}KDJhyO=F+n_aqm$dRKV{VF5owF z{}_?WH~%kp`W9Ap@R?^{Z<;-A99Bl%!+W2U7g{!DCuTIbfsuC(-08;#e!(XTxE1an zMZf?z!U-VIiRBwe=|6b>T$&Ts*F^AV0F;CJ%L1VPWO-xFePHU!{)W#bR19%+-arTN znw{e%=G~|GLaGtW0_VWgeXK1s8U3>U_*U#2a_W5>ZixcBDj9)FKY>P`YAK$QG%R^G zOP34CYjn1%P`)k4P~$kxp5Z{*)3hzX-D;|=+wzW5m^-+rx+-q@JW~xv> zP2}7zT~*Srmi)tMOvPxUiQd|bBU5m~i$r}O^#863&$9Xv0PNJ!WjbL36~Hri?E?y&EUp04k8I5 zbC8}Rhf3bJ^fl4btV_Qg6t)m7aG)ICySh{j?24ndJQzLRQ{IWV%YBD^fUKxps`~zD zD(BA25rRlQAN`;${kJec0mIeEk%PG#Deb5~n*jHTS^H!?0IX$INs~x7+Z2{;Uza&y zJTj98k2PJqZM7W@o=oZ|aYaZ(+gJh*e=z06c;S=h_AbM?R1PRDkK=b7!p z^sEu&p}|J3z%ohdw+GpBhboMWF{zE+EB0o)bdouQmVinebFLHPlZei!L_V9+z>K|6 zLEoy!YpJLZxev{Qz4*#@kA+_ZA2ptSFqqO!M&MQ(i7+5rm*%htj_(;FKqHC8>d1y+ z*+tF4)Dm-Wrh3n^ND2x5JL4X_6%{<`n5qxuxU76V*i z3v;F+l%?VIzc9)TlY!f=7Zhg$H(;Gilg`$>8MAwjZk3nqu0FLi5~E9{+hQEka1$;w zoNOn^#KPIESCA~TuGv4)lz79Wvf8-398pZtIHqZwbAOGn)ec*jXEw2=>N~=l?m8MK zSQ5C=tLn6++P}_tijvOU*Ax#dhlfn0i4T|8?iE2o(eDe>ug; zZ>M6*Ea;u_w^{4GQ=(b^wQs8Rs3}sUx0z7A#G|7Cu28S-Ov@~_;DT;c*&rkKxLCLl3Kh0JA>=B@_ry}nxFIiw-w66NSoz2_Uc}L{;F^H+wtnA!5 zhsG*{9CDIa)jpGe3;9`(h?;k`)E_tPrICo2rVjYibELKc4V%Wv{Z8t=)pqwj(g3=F&wyC*uGt{BkH zp8tDSa-IP}tgk5>2;}wDk%+XfE&HCylO`4US@ZG33k`{;e2j6E1zHpD4YWi{P7EG{ z!YTho6;WH+s0~+~Nyu$0;NM(f5(Z&-yi;mTz)DN|`zZt!LZVawWIAUIWiVF}j27mV zBdE|ec6V_{2Kn$)Vp~Uxca+v@AM8?ie5#Tt_YzU9DH?7%V%8rT?sv=Sl++c`U5bIi zJP$fwy;RQqq^>FL1JA})9M-%h_N{!ZO&g8-gBXxOol{*`&x1m61fdTP;zB5DkFJ=p zFOknZ!>_@pU|F#TRXZ|Oo0XlJSgJPH%5~|hM9@LgZ-;0Kbyz8%?uLJ~W~_nz7*oP* zd`-I)`FOjV`>{8!VNT3r+uBy`XCvvG^;Ndn!_$Twqs8SJQqv*gM;Lw8r&x{aS*mH( zwH(Tp1T}_gMgN91`8M$n?c5a5UUgPi?HzXB8S?zSBLa#XSV*NC$tP{2REdL1yEV`2 zvdUMI+!v`n5gH+YBV%ETWE#E=0rxhM+U_n%nLL)glPWtc9ISD!Wnp!e%f-@?rhM;m zHGP4{1a*gCgG{@9Epxc+G$xH;-_W&4jeX5;k4KT;No;4<$U59ue;1oHH>@YhdUOm>E@!?q#udltMkL9qXlCQ}Q?++8TSRLupGlMnCOc_fT!Y6rgq=7?N zpG-j;E{ZUGv|s@c9>Y~H)@>2(=lv|uo(sDku{}B^CcB$$O3Z&QV<|&Zue{i448{Vv zs%5#VX9ERQ=*GnT>sx&D>W2<@&uNRTW$m?56gkTR9gpIbT$(UAuR3-Hd-g%w(9U+S zYXM-8l+j?*ZW^{y$6?@i2j0>+`^)@-fILNR8 zuD1^%5k*?Xu9G0YqGiYbjyI~|ZZLgj+ZGh@A zHz=M9-wWAavpXHMO-J zlBj92K70idlZ{lJ73M$obqcLC3f@oQw-;{{vZY^5O2LnN()fKTWqFe?HgBJwEM*W5 z0Ha6`I7ZntOr3P!EN#gq5c0V`*`G|`jPD0FpP!<<>WrodSI@4cLI{ISb@n2crLCJi z`cWW^pcAML?R(FL)pRDDMe5;4>>x%wJ^Gh{1+OHbju$u2V$#Q~E$T0Z(NyR=&jXWV;jhm5f#~y) zqQSL#3rW~e6bL-&ZM+alB5_6nJVGGLZZ{%G1R5V2CX9pcYM*f{8$^)yq6-c z=!u`*;$UnG$7l7I^1+5frB9_AHm20|0YcRYQ5?7sak22DTJOjFXTF)+3U0lFxM|Ft&wPTN%8U1p(Jd;- z#Oy%V>CmOofZEy-Dz!>r9y6Wno()&HvoFYFXtH8RS41NGMx?=|@D+p@7bcSgHrNY1#86vtZ$0s+_Tt`7yf1YuCS*2^HyI+_GUQ~>v zp!wULsuUd2+K3k}MIOmLMI!CSYmT*frWsLMzG-w5X zf@TYoCx67ul5fUMW!$*Al#4m*9C7y7x0JOkCakc^ zdg9;03R+lttBM`;aBAe3+ZD$KLKR_{Q^b_=mHbW4A&iz=NQY83bIs0%_8=QoDJ&2N zKN1=3NrPcY)bC4&uV43Z$GyW330!y=8v!IcoB3zKSbRO5r032X@$ zyD)-}KdPUg)U#zE;2G67^%<q}@?G-Rm^98raY^ z%OjwW;f7oR%dA9xfsg$9kgzV0iyWn*+k0x1v;C)WwMy}Xc+F469MFDK1aJ6Uo@Rdq zEU8Dq&2RL0t(}J-`p`nJR`j0r(cwI(wanVtL6g~2L(S|t8MQ~@lNn5ix)q-fN0Tv5To z2yAgij&zl*TQH80MTM|pGoKDeKcs3J&)%*JOnZn>c9<=-A!2D&7;xsgIv)u7HSsvtC5l@>CNOrahXZfXdx1N*3s)tCM468uI)UJ08}POPVhRp(yLlGE`5dfHcT zJFIpfk(7Afm-cb7js{Gy-)g{m(KM_zWD9Mw@U2#5*ua7&5VGnPldq7lg*F8Enn0gf zVdP4-B3yRxEcK36)Nh$meUp$wm2xieEGp!CNw@cEp^b3Ufq}H3HMA@)%&qM%z=?16 z1;s#b*&G!wyMc~&jfJM+A1c1{gC^tkCo$5_WHSR(DIzQ5?KFQ7wrfeb+~ky|LK%Xu zIjVm9ld0chcTlQ+2>RJ!Q{W!;&Eo07D5p>%#q| ztC{4EngIR?L=-v=&L|EZ`<{i%OdCa2+v-APDr5^HnH7c^szDWcT(JF#J6PwW$F;&H zYqvfu>FXFv{kprt*4f!!XPqMmLuKn+3{9!@?X@$&s4>#<|>oHYf3ScL&lom~RELIap{o4Xm$Cm(+FqskVuTCc33pd>b#- z__%rpX=lh)>N)2%R8iO362y19 z+UnzkPRqk(wa&LwutOzH;k*TK!)gJvjIV+qyn#f|>M{Kbta}}Zyvx6Ia0{-m+Uvyw zliFbN0`W{E&zu!+xR_;0lFDqKIPv3>X&qLRV_J~g$yT=B0aoa7$~zY&$(&R(oz7CM zG17}v^(N{6j%na}DCZH{L{Zmq*UWW`8+ErRDd8295U!Pw;A!;PSs;jpne5srBfQV7 z{x+WbL!=i~<%;RRVoOH>rkv5_aq;Hed!)c?WxT_S#V<+_hB`6e5cSZDW3@u93S`k# zrua0bo)55HD*(w8(|px%QMt1O-R(p{pC*X%m;0>|yw{vGAVV39$3SV52j5v`rQ4Oz zM5Ak#ZT29V+Q)wKJx87xZxEn%xxxI%5^m^Nv(>lI>bsR3C;pqWk@0pa?{O! zYb?xfw$SRqr>H%|S_HZD>MH%jP8$p15f*C?KwhKEtG}vl)UsqP6G_6_29B;iuiitu z=lH2q{z|2>zDiO#RG->eIPITfMp0^&?q+7EFtE`uir;*WhsXSDl5ni_0?ClmjBZby z_e}RgsWEn#e(x_N!DSrLe^h7x6&Z?&jq`srjCV98>WDl3jp(W^+kP_t>;hvkcmtW#;Ba$ovCxkyg??PuD>_dFzt^Wn8;Im?HET>dY=~2U3#*7 z^d_S9CM*-ky-yW$F{RVvX-dtt-7gP`Iy%U(wG$^3A5#-1n4=-$-i+^;lOzsaL~4Au zt{oNzA!Gi<06R9-KUoiPT^=PveP<7m>7)n>Z+6z^#Kt(E%%$^Nd@yjGXerUgS4v>yD| zx=02P*z+D*kCu50l~~O%=vC4Y^G{;nN!IQWQ64U$c%%&j(Od6GVh)96%Sj~ffVgt_V_=aDaxx3yfZ{2-$gZ86KB#l5=1?o zd$)pCS(xpjna(EjkxJ-wp?)<-xqo>Vf+@@!L{QawkZvho3v;OJwhoE+NP#TcENn~V z#qlSh3r~C&GuHl?h?8Oj7V@#eP%$HOQTE@tj9`F|4p!PgFPFaE#$h|M)W5AvN!bg> z-rlQI&XJYORKUp^pIRT(AO}Q_6XN9%(K$W)Izd6HF7E&Rg8Buu!HNAdFEpk8w0tad zsi43U++cgB-!9YJ*B$x1;W-|C4$g>IfgF70$hzsCDPBto5uV7v5Fe?KM^F$Tcr6I(U(Ze`g8dDA`J| z&8GG4lIcVhF#C_&GQBFGumsdZP249<8jh<3)ol@B7)d)Z2C=;@|=*O_70-ikulI>5=HCmT4;oS--pm>tmH z3_Xta0R3{VLlB ztHiB`kbrgPdJQ-&GeLGiLChn~43&h>hWb{##*%|kD)++RSK!*Ug~J1nWO22#4SWfo z%P~Woso53KsEb``8ef_)TmgJ^4k46#(mpIR!2}U+87+eXl17q520bJtbUx!hlY-_F zgl&41jejSwxG=gNMxul>juLWX0;zH}A;w?Xo)k0iUtu)=gl*B<;;Zsr%?(F-ySt>s zk;vIbdu7S&Sb32G=%`v$RI9T*QF7t3;QiMW_l0@VB^Re&mzQ^*+kM1IN5xcKNehU} zE1omW=k~b79{2$YR=84>S3jr^=$CwU)Sl_SOLGgT@-*=zYDS}vLcL3xXKt1yD-D)= ziI?zY!&g3M+8tjZXBSV{xu1~}ID^yh?)W9gW;wbFX^D9wEmn5n>!3-g_+L=$K4|Mr z+nj<4?0*^7mZ1P5R$AcfHy4yP}v7h|;?87%uIO zsN)|%mcK@cQ^~B=8kK9S2yT9|Nnvr16|rfn(!{)QUPlgGdjcxAr;IaS-h-T>$B|8( zCgYH_S+}dhHDWro{s)B5TqEv{HwHaczA3D9jJIDLvopu@qUL2OC5b7bI#npC$1>Q@ zrm#eJl~ z$Y&8(&r@*QLT0`m7RtAi%Q8OHpehq`Q~nOd-W0cSLdV}ht9ExcJHk8r%My6CzAea_ zO23Nn&lp^D=vC)Jy=SzzRF3iTI$*RzI^|=$q`b6E(9EI! z7gxC1<^-lA;@nm~>MJiMOd0I+w0fr6sXA8Q)hBC^Sij3y1R|tAk{XyTT%(0^pEafj zL}P#UiX2gIjb`}c=LhyZA$Q_{Ft9!BU3yXbOC%2-(I{jGc`FI?_+A*$ z4zv@a2PbIjRLHU)$MrBLRx%EprSog|%JWFa_Cv>(!{?<<#zO+D_1P;2O!htUY~>#n zOwNi&UD|vv)9!l?!(TC>n_2MUdME?W{s%z_a?@9;{%btx`uTEgtl<7uUbt)D^COkr1`nf0ZoZKza8k$n`EXz1V~zz;rGOX9sOv89q2RKI=m6 z`8KCT$pmEayLaMkWm<18CCOflbj}WJADw!J8G0rk?8a|Opnm+eBu00*tUFKPd;_n5 zF!m`*_M4m<$NG%*A0q2={a)}w{P2PQlb&V%Fa2EqThCr;w#Q(z!B2mod;v>6@cQ?I z{GkS%F}5>hUtL>MFa&kn-*Ho^kC1sT)>sRmp(`43Zp<{ssg=Ec^k7U3^)r=3{k}MR zL*niZyEr(1c_?yhuy}V;Tu(X^@Id>;*u_dDTfe@&oc)4y9tRH|zdGqLsv~GkJ-cKi zKo3g64wBexJ-fa=7uGead9>^MOlIMh*MSBZa%}>4kegv~L+|?cybAAFH*XP2Z|ykv z($HDD?q@Zz+CGbC=*QJJPfcruxZ5^_AS#fhG9Y@KgZD?C)7fN)qm}QQfGH1t z^*ZG+fDUiGCr=EYn&D=&3+T%;sqkKRoXq;rxPYjz#zz&Y5A5C$)yX?*{4O>S0Z5LY z4V5kxC=cufmi9)mC{$z|KGWr2|AFj4f#^B@;o4Z@a%^Q%@FyVGa>>NBHt=-nC@3R7 zS95G?y1-kT)A=!?UtpDBU9dhvG-k_+Xh@n!f1MbAfsIOwkU~IOfSGc-NZxq`V6a+S zHcrf%9E5~=QWn?xFgf&Hn)Y>!{fQ-1Y)C~_1)4%u6Jtb`a)+Yqmn40OeCGJqL&@qJpk`B#LmDa(LRU;dn0Yvl z6KgK83HX)Zc=JB)JI<=u%r`lCo*YGQByxR!Y93eJc6SIEsd>zTCpmKH(IcblW-l#$ zf|gYAjsM7|W0Hs_P-ILgOHj`{goM!V`S3pljsu2gkMQAP51X z#8U2`K11#oeRbf9?!(NT>|=NR=-NnkjaKcCdE%@cX&d!hG%E1E=QG!!lu|`2+Ibf` z50~Ip0+u0_6|g7>O<$>!(6j(|anM9VFa;W;u~a$KWW{U_a%?Q}&<1jpBcG-0wodF8 zANL&-OR#U8DCx<=9) z0Iox!c-PA{5(F=|VvIL76DC`xWyh%oV5ai*+O_(5SM`{RZ};0!Sset6G({+!a*2n? zf23(fR44MBw9v5$wQ^>024Z8k`BZ9YnD+uj)=C9e8edC={#0(4U5G#Wg!Qyq*ilJ$ z2I-Iz#&y-XzX$Vdk5Lt%0aWi#mt0M+M7Q`g#+g#Y0NQ}9dI zDPNRWi$isl&hw`6Ua8v*&JK2x=s)O%e40u}_6%}Zc7bhfjVp-VNP5t04%vx4E?&Pb=)U?VMo8z5 z%q#B44C%)5j~^9DZfj3a7q`QKilfve*H7x=qNI0&XAeE|`?_f>bj$L6!)0;Dr~d55 zHS^nOfSv7Y#p1|yamNO?Q`jP@chlf*Xn`u@L##w;kc3)uHX+xt4UP?Cty1iS14i&O z*e$73+q2O8BK+?u7NH_uI+bs`qkZTsM+48*t7eANr4?0tIoEavGoi~$T|7ATQ@Tz@ zHHLC;+`zzFcvf+&b2=Q{`8uN=V3$nkc#iuH)Y8bDcJV|x1QM0%miMQ38Jj0ii`C7B z$6v3d^0lB<(_evyeNkaT%u zIM86HcZJlUR6vd$65In;$JY(b_q`8RsIt5UO}EmoZbAUZ1w4U)t~=v*+1#RP6(%?Kx;mIk*9(iA zG!L=HBq9!mb;tInx|{2A0)Wy&nfFBWyp~xg>fBD$@c>b_J#qOD9$U*WUvC`aw#V#5 zS{2Z$Zua|8jNqRqz{;!#!YhQ~zUr&+?MYrz^P{eAn&Oe^$NmzY*sEsh4GiXBsS@<5 zPHL8)DLc;f}waM@DT6;A$NU(aUqw* zkfAsBm-4J3(o+*6D}`0QXYzk|Ccx82%FPvp0BkeV4Fj=uz3e|><^$HPrX3P}9_|6h z3gux$?-MVNzBtGAdNK!LBYu1e*xF)~8b%YvHHP3UO@r2G1jFFEwb`RFCN ziL|DDUrI`Vvs$xUD#M1ET3uAXk_qAEANKz*tR zO9r!-R73vFxhytcdU|Co2upy%bSy|%3$6+((+(oRhkokde}?|+f!Rq@dv!5GZdQF^ zZ)bN%|C&{x0YX-0O0Y~^A}Z6DT%J*IuU21CG9sFu*5=gIbKHbJ(fU(nzt=KlbeAR1 zW@LEPBbWVHT(rLC%}xi>Ko19zUl|}ODx}M8)y`xkh+0zuXL`&kYr&aAA~IG*4wops zq^^uSluTV%Wgubel;&zIL2_!5^;}(C^DnDn{hG-Z>DmM&U>-KWL&-T6og$-?E1~}( zAw1}VG}>NR)Fl+S)U=0MZ%lgoPN+oaBpJV(ZqH z-(=KKOtji(5%!lvwBjrT24{f*Ig-qE|+Y&u)b9w1tfV6z3hYOGS@Tob82KPIyZa?zRdqQQ>+Y1J;lN(iBSjPY zbWV~LgRE<4;~JBgp##sU6kSh~e^H~JJ~vZGw9^&;$mJiD005?0N4;FBM*yFPjCh9c zi?=i_C_c?op0dtbtd-zLC`+9SOV+WuMpL>p9EaK)9i%RK+7E{Wb(;I#H<~kHj&o4U z!!b4;a~Gjr+G7ZYS(vhXe2pb_2?@mzT(l)AXr7q|;iyQ@M3~7z#a576Y^^d_`xJ}Y zah$cvRaYlMkFppXpTX3VkM56TSS!R-J8Slj>egMjuDR)m=O*aSg2J$6+pa>T$TQfh z36GW_+%S@9g}I|PCtUg;Xk?-#JFP1T@etXMTRNAggSmR2fI;=;lP-~4xKxsqyuG{X z71qEflieCYURb4g&a&cHwvt>X;A*Hy5k zt0-r50~nvC1y%sm9ME>^ct+#QnX3=4<76gu-K!_CW(9XtlTz&km7eyRWe{<5%a5%+ zYw8xJ5p8|qMEyEX7wpy)^M32?Dz0Iep%B;wKzu?5Ca^-A?;U$VO{rZ!fP~F0T++UP1FJkKXGUAoGjii}&}1 zgw=|b4KUl`4wFZi3CIW+++wu-KuK3Pcy~qFUsn|2EZ}~3Nwl^ zI3u>ZCD2JDHJ?w+qDYi#=#()$o6w$!Dd&!IxvStH4GfGz?=SB)?Wm?DGKAa%$|uJh@9c<-Fctg`N4js8vr@xnTz?f zskgs-<(T=W-Bg@*HPTF2>Mcl6PtjxYQBVlZ4z4rf2g@-1oG3soccmY_6jTJLU^(4CyLWOVmRS#4Xk_ukhpL~$ zfJA?nl~xOj99=u$tUTG5xw3+3tO#dWN|DLPmg#OuFZfc$F-GUCbd(aax5~%e+Wbcz zW5v`GqJHCKLsL`13x*|nEv6jna?jnCED(fUJ9s_p8r5P=>bc@{rGMOucCM^JExa%S zm$=(lw&*Y&My*=%=^^aBQ_-%{7YPkZ6KKzTqfZw)3r28u4B?{)J zJJJWAbk)yz)zA9tXtT}}#s!H%Hz}ejU73zF6P$7^3;}W=cDYwxv*sK2nY#AiLHM7h9JnvUakdLK8k`uS zx}Iag73JvZh7&5RERkFm^6V9XD7Ijdz@vb!$eNS}bYXXBoK>lrDCO!ZzM5Is+fGZj z*hHS;bTwe0T8%t7BA?H3hcEFbmp=lMsdx3W@0Zq)RY5wLdjK%pbrXcbg2k@ zrqiCml!?Lh#Haf{Irw+8PNVhecaY4@Q@u zf>Cw1a=SnZ5(9-N~EdxqLyG&!hxP^id16UplmlaZ=f0V>e^MZf%BnF=~%W{@V5x zb&_|raE)=8{yl|weu_r49JkP;B4K(5z%J2N$)K9d6^7Z^^}?}XPnBa$e>+YIqn?Hg zSHv!|xXL6{Z)H2s&2mA>IS-qk2)88=O|sY-JBzIdB08g^)UjW(&b$4)UAT3L2()Bs zwIcqz2x%I$-ZcVPWL6?w4}A>&^Gmg}KRr(ca8)+#vyHQf|X&Y6j6Q4VUsx z8X&8HnF$nJ++N=D$--)rO*7Z6$(&-mSd&b$<-Dq2ZZI;a-cY?nN&U9$IE55seg1Z_ zs+svll`>-Wjj44JO~hZSP8$P&WSwZmf$}vxbt5lADOT+NPjoZXplReAGt{(-5i9g! zz!L_?c`uD4y`LrfP0nmK)D*$mprf7qLSsXl=i=?y#<;t_9VVvl`1m8kaMFkPmodYn z#l9ZukdkIuy9SgrN5YPJqh;p>b=k!+U-y#-7=x=dFE&%XQazi6WnLm?21O0wYaF@V zl0SipUocOt^%^QOhU$aWZ5ml0kmH#NjAoW}PT(#5AWDCrd`oKpE~6xJ%d$*lRtH2=gx-bib_ba*t;t zaMjEHi@%8Uw0R3+^!#eNz)hVyk-Uz%HIE9(HnlT+5&n6 z{u8EgeP5jjB|EH0UHl;~C@X&v1(pA%h+`@cyLy#|1~C@w3|I4;g1e#oYV zQyji0eT6Y7zxhEh5HYRggk61f!L{`tN3^RXWI#rcMP;DE6!W+tV50<83Od2WD+&fd zhV2q!#pMLkL+>hCgvD8ktnq428~j9j5X*=qYSCQWE5)* zv#2{Gk+G2^S;OokEYUR~jsQaZ20Y|!NAj?kC)8Bz4h7P)DcreQtYR7ezo1(Uw6Ee_ ziL^i$gt8u?1&T=u$Dpjj{CgT`ji(8TV5t&z$$k1vXQBr1yG&;}8$ixyK8|tvpl3{E zJ4*D&hYFD&lHl~2QQ5eCMvShW09NDllHGl`#_Z{&ecFtkvmK{y^5>fV-Nqnqq<>Td zWf%jUk;O-=_|GbdsPgp2imK?z6OmvV5pP+-WO3-h*0}fs8Hp|o&p=63^DF_j9E{a9 zAhs?PtJo$M@^bnJ8-Y+jQG=LDO8)wsDx;u-52=wPf|4LdsGsk$=B=_-CnMG?vM9^L zMb5#XC`S^i2-@^R{sTdYnk4*(@2;j{+!)~7WeC$x03e9)UYL-lz)X(k8(>(9+fWs0 zs-Ic~#k_EzVhq|N2@c;D2noKq3T#3i0r1D}xb-qhIe_pHD=zx?ll$lWoni4n5^*jm z!a-($dXm+b)@qi6U04NnVfamnX&97v=!f2%G)>KI!dw zcmH{q|2}D~)$MwnmbocCj^*kV%+dd@_2PSUhkD(4_B}g4yZUN(bs1l+&DOQwuATC- z^_-QtX}5r3%l7&y$MJcq_3QF{y?wf1v%~9o-TOVpdzBu~ z=iXjpSghW}_nr{*$Nt`nU61#}?YLd<&)&t2p3lSc23u_;>gxJ~8+w24?eyfWqQRg3 zIEtnQ9jQVVt-?MX&0t)xM+%d<&=(I(8M@onl|C_^z88&P*5aoH1DWP>(C=+RcaFZ! zWLdqVrq^n*0GnQLUASA)V%ZK!-Q8S$cHNFu!dF-S6@{$pHIL_#*KM@^4Zxmd!$)AU zXIxx)Br1D1)c%joTS)aBI_=#`%Dk-Kn$a@vsHCs5umi0f$mc)_^bmq5O4)ICiaB{3qmVEJf;;!_ugpzm@Aw5YS3 zN(0s@HF3M!Qkhu6oFJWcHvZiyYlv*O>l3Hk!B!z=Ju|~c5XeoPdcx<~)8l5RyPsvC zpOplimF(G@wp-Yune)LRl#{b{1cOHH%qs}PTXe5BGYg_xkw5P5me6EN1FMLoxw&A( zGLc8?!eG`%^K`E;sKQDb5kE7Ji@t%M&+S-@Zy197sA~$X>(comA8q?=<_e*dcn5r1 z%YjA%r!<$uxY2{W6S3+>Hx1e<7mow(dk{S#M~bx}cCCq}bmVmt=z@K`O6mQ!r=)HO zV|*|FYL@xP8_|uGN3lcpU}O;!uQ(=E1dXuo3^3c6wt1nLpg3K-Y65e`-0?yjmMBW+ z#qU)9*kjMLn4{^C*{M#UuKg&+z5+2-U${JI(J-wOdUNcn(WDDIjG&prYBhZqfO+RC zG;N^Z)%1bu1@FYX&cz8adPB^DInq!vzfgK}?Yn*Qd%X#N^SXo7j{zg`?Jw%+j{pP% z1Ql=RGup&Mk&5ks?SS;410Oqsf*u4AphZgm;eg~*%hyW?%gNDfNwthD%Ed0uT~S~R z_RHxV@Q+q`6?-$AJ0W$*_RBUw`8ZSfTnldNyzc2|YV8=Sm@9m2?AaJUS;K0xe3Gc)0pT>nVhCK6N}*Pd)Lrx;vPRY_f30`|I%k!Xl% zZaG~iBC5zWvzh$s$;-fWO7>Z}1c2eRW0sSBlnvofo6p3XLum*x=+DS#sBVzfI8vEc-^PfZV6m3&dT1$*0e|D<0R z8ERVFOQpRJyTaeYbfQc1ovtflurB0Y(FO5~yNNEvlSW)_r|S_bcZv6J4vMnk_QoH~ z-plmAKnqvr8sjLwnT0-O@@{5S%MM->Sfb=IOee`V#ATOicUuCd4D1^j zdeT_w%CC{TU-*x~x@0#n{EuYbr3-pP&%W@U1%;1YmGrU@=5yVV_j(z4!8zd4p1KYk zv%2M8X!&@?+aR5H4dKNtiIP`je8X^GAqNz`@P#M#6KnqJn6h_4*gPRjO%jy1$$QXz z;`2_-d(u);g%G}R1t){vXV8>Wiv~S3rAL3PJm?e2nr=~J8PbAgt6kN9tHG$o#dC^A z{}*NnlPKjtO6ZyG+}Z1`cZ1izFcPY?Xj|vASj)MfciZyJrYi6>&Kqd zZdg~p3jb@JG*%a4FI*2J5z2Spt#s+cthAE0aT*`X50jbB@(+U97GUoNZVp#9--FN8 z$=9vNCfLd@x1ULYarDO?lhXa4obUv>p%qYC&EV`_M3Q=XSh@aQ3bsUk#rCRW=MaB;L7eqT2lH2C=aq#98@D-sUzl zr+BfA?Pb#)?r^__O0t=rMqQrLUTxD}`mZAd-xGz%!#zT}Mye&qRD;Q-g4_qg)zKaFgH+tei3ui<&dZqojycqA>1wI+{~Vr;G{7ilby=Wl>kmQIk>&VX$RHb`M{8 zB}KM&>d{%8g2Ib1ED4@|dbN4vp*sq;lP^xrZ%Te;6MJ)pyho&{z2~4~mfX`)m}0hC z%-KVU+E_x_HVpdVx^Fr4#U60W6WvDD$^9{eS8;iS;%yW@i`$06v)(GFe(ON3MFvd; zns9u4lB(s_nqh-tQb3hfabJL0bouJSQYO|rsG%zbnkIb(-8q`A9jPx`R(Q#^S)+}k!|${jp<-7rR4-IBH* z1LJ!&CcPZ}+NOrnRb4A%dmSiL#`%cE!v+h+1TKEtA0>%*p;4*L#36AtHS@xaH|sGq zHGBE_6kS5Pp8mOCded6ez&YpE!-3J|Ik*@i$#uo)!d|$!?^zKX{R?p~je<5~$)sMB zEr)~Fc;fE&B3g+Foo}9AFiw`ZMa_4A?sLi`?HJwX#uN){p1@|oJ*t@-T^qtt0G)IT zs)oBR+v7SR_41&>crdL51e3EgJiA}14SerWp6k+CEE^VdlfRg4+LcL%)zr>AIasaE zj{w=lHS%t{#Ycs$r;%$iFuJWs5a>mCZwt!TQZbCi^T!2>ZhKOH27R}9R$34b!6Rb+ zfFqRC?uil4Nr@L?Xfnk+Q`>WoIQ^l*#=|g+)g3394$*{Fo%eEO5vrfGl20taAeJKx z4vc*Wk8Yfu{g3yQQlvUv#KStf5F5QY)#8o+BW2N zqb%kuYI@PuW$7zn?_-fItuL0h-3^Azo}W=Z_rAWP2+fw#!WWkFW|i50ny<3{m-E&C z%`3Rlkg~&KgYS7!yTpT+nu!xagm)&N`*TWDZ6^YkV)C?ry&(1D8y36gnA@<=><~1d zTa_Z^sJqkEHu#&YlJPUO8}RdV`xubBefKoF|2;T(`z6PYUR@Al>fUyLO2E_3&aLgs zWhrA;t+NaD`a+~9YX!~dx<9V@z)W0CBPY;9-5W?H7qWN*$Hx@FP6SX?1(OVLE9thk z)=@R$-8Vor%xKjihI-Gfm*^Jt zv|xoD0j=vA^}ut_sq`H8mBRSiG*eq0=A@D9?B8?lRZcUnT$a&+OerOiC{c>MP$MYN zlvws!S7B4ODf_%j14*NGI#^K*&n4kAG9C*zI4S@N=lkj(2hV?&jNc>T>y)rPF9afZbJm^`Q^wI$~A@8o2GN%CJNl3UY8 zUXmxq$$nA`NLmd^qddW>jq~0avwTwB#DDrO3crT5dn%n>(sO=kyD}$FQ5Xo`8=LHeJRJEnmsszg8OWiG(jE@xQchAsE~h6f zmEJN!iiM%)$Z-fK<>S*{-LpVhge5C|Kt)|*swytd;In*u>?gZCMM$3oC+1)X6sRU0 zYQ+7eL2xIN^9V6h8uEt8whpwYQmG2`wwrVPme$P_Gwk>0Vvd<@!tzY#)sZ$_AT>I~ z@2#6YB&{%e);O_aPY#LMKN>(mK{GNS7}BLjFM(na_e7hdtjELA&=_o$5->3|7ZTNh z87l_@2^0#I!`*TK(M$JW+cBuh|~ZL)W7*Lpk%G9Ljd`> z>VfOX05eejy}n2rDIIeiWK<*~WBK(WdqqsMzwX@6n-+g$JC`4_?dD~XM)!gOGq^GR z$Y^=Pwn?iab=5h(+zHCP+`mJ#{f7N*@M9K^vH@U$l=eyGpBq$}X?}X^<`5Z+Yl{sZ ze>mwqbOE3;EmXsK33Q~YLU$Ur*qJHX+0e`|3R1pnwXGBeYu~Fv(H`9pEU{Q*_8YHR z$~-kK1N4M^#>8-$-|zy0J;WUGLQ9XkqW9TB02jizUG^@(=9@j$z3Pl`mxmfYG8j+kIsH*r)bRVaIrjW{d=c$ZH()g*plXb9tC3d1TKjb8qWv@sVu)gtH zBH5@Ny3{N&+O5f(Lf2%y3+ksr_XKz@A5Hm$=nTjDSc%ymsn=5HeaNZLPl1lM9 zw#)qBiaqqz&wvu4CBc{;%T*6NdaZy&JQ#Un@ds?Vg|m6b_}R6)R?6gN1^DgV0QTJ9 z{kR3J_@e3mpxyrn;bIYivm?C_eIa>x=3rHg1Vz9$mr||jfq~yCE_3-S$owLm|OnEeWi5z~* z&Nr<|<5N}~SnEJcLT~^X@gm6H@mVVE;=!VSC-eDKG@{WAj`2t?6M*fc&J=Xs*S{1dh zb~bUO6SX#QHW4;4vNJZJlQyw6b2i6kU}XPa?x^3U61&0rf1AoFTpEd)I4lG@FNitR zBkI4_g0SZ9>tc?>q~0Bjo=4Rx9W;tKeKo3Z%mk*LE?$ey+3YjspR^c%KNq*JA-CSU zyO+z)z0I#rDp%3Uvcj_&H(Z{v?8vRR=Mx1hzxj1gUjJIXS9{Hk6;4+}gK7cM)S4&e7p`hwI^sqOCbx$ zM^ozb$6$dN0$7S-M5*4))`=`A(0Pw@KP8T}+pVfW-?h@Hp9*tN^ylK&yw8-wb*RA@ z5{#i6zT&AB`M}&B_6F&23mh4~fHr(%sZd8h^2dB6%L{J1bIetIH|!uwxg8J%7SD;m z+GBIB&cQOOws5?2b{($zO_dYy#hR&@fw>RHS{<)Ul&(Q=#yQ>aiduh`%`I*$i~5>% zp-nhfgUEn^WXN>V*5R6ny`@o_8{K{+=YS_a z228{lEJL*ru)K^JG@2Axv$LW6@@w3Vxe$RDFn7HlWIR3KYzCB~m8HGI9lx z3Y>1T*pLv(*yI*=*89*ot5D#9Nt%1PGc_|#UKxOqR0rnJUlC6bLi7+;=Dn_bjq%4S z$RsjF3@T)xiw;QvsyU}i)DeijHnTi*xjizY~JE5lX^9NvC?sQx7)Pw;i?FjHMe=fqUXr6?uU{aOsvy2tP z{?etq{o!xY@&<+uVd>d3(mux8t!lW%?opV6lNIr8MbFR+Wu01y88(zh-h|u%fc|EW z)@0b(4R*7)ffzMAKJ9A6Fne*88|vO-LQ1c`)+m?V;aMCj^D6NHqm{xXOO^5j_S%+H zE5L%`3g?*W>vk~@dc(JixUh?MRX$!xi=`{}s5RQ@ONjfh8UxDxgnF<>wQ1GA8GpPPwxSnA>PAzo#sFaox5Ic58UH* ztedBpoi+=h#E{EWme6XHOzx{yDn6Z3Dnrz|Vs;Zhs91Y)9klhu<7PL)$gUfS?;9qG zIs99KE%A{AB{w^*q2~l*XOj=U6Ubk)-M-)I6am3w$J|SZ9#`%YTCI}0Tu#;zTkf`#n2TN1u8xJJNcWK? zdMiGOx&CiNbEGBiW>!Kl>uGfcl6~6T%(2jDEwO}ekhF6>WirEcr<}{4rs1QP*3b0=ygtnz)BiFxL&wirJ+n#{Gd5e7_JkLb;QKE zg6^GwyBLFKuiZ`~Hw(*Su)~*iFV-XGcA9PAqp()~+D9dc5McudM$IS-A4&uci6!bjePlCeFq3xIgXvmX_918tKD2l$! z_t1U^PS_2FfwHjHF;Uli$(fg1`u4Im;*s;TePJtOJu)(qvO`>N3=%S&-KHIafr8La z(wW6Gbxo-*Ee%c2ZY!%+L+uDvk^t{Yttm+*;0(;90+uy?jr@2)v9)HBclp#~8hHJf zZgjs{o2u!cu&2C#koo5hNP=|`1kDHpX#~hxrx38-$*BDIvqHH?XVEo<&|vTRGAHJP zf-=C8AZJU|2OQwv;k!o{-UP?m8RMnryaK$2=VaZWZEzfD@+JKfPcrhZ*=(uA3qS_r(Jp3j^5m5X=+Yq zbRU1f5Rp=Ysf0s;6D?`^D~^(elhT^c92s5$h}I$FjuGSQmunF*4yH&5g&b*-Fd7bI z{z7M7^PBh0JZ?4_c97xVYSj2^%xLDmYrcM#iYy_Ud zdAnBQppr$^M3J7g&mMW5e{+}EZf$ev3C=Cu+zCMg6t#onoIJRO0Q^Td{v#3Xl_VGyCqll?j*&+t=9e@|@aTL5_ z7D}ID3`k;O1%NX7Y0|2NhXn4ap>~P7G<$MLk+C2N>F7Y$o#pmnavHs|!+|hWeLE7X zcx22@AWTJdn=>IKt-G8yspStLwWZ4Evc5con>!JzwxfFhLn)1V6Cx$DI~loq{9?LG z3Fzm6kf8uS&un)n#K;MayYnI%f7$IeSRA8V(W83b+iM;>5%()p-mRT1te2;az}b*A z)Jk%J;$OElqT%k8%@ZGSFXx9E&|_PDgfl@y($=8n?g3{)&Ai)g|94r+7=jwCzHRWC zNJ&|`0${Kmz$~^Z0k;BkQH}hqYIGY~fv-mz-b#~Gt-Xir6yl%+S5+25ZH?iD5R4{m zHd~OAOh-a1wTW0>W3rf|Ji_Y)I(GUSx(6+`YIOoUkfBoW`FfrC5<7vTxYgsx>?k8B zO0oj!~R(k_ZVj5T0OW&c6sGK0k<$f*)pv~{-dlon%taqV(#TvGnm>k*Pg&1}*!0NZ zPb*h=04j9@7L9vKnT%|HmV@tibUuxn&wzCt*S=2Gwm$%W=@$d1+q`x3r~st7hc`4L zJo#`EGCt!?Mq>DWZt*~LUVZ*kcVTDzZ;;mvjErpmv%6fSbHx&|LHmDvM!W&567xO+ zp#J(r02grfX~i8{+!hZbDu0pJmPHuTOs=lo?EsNl{kY*o@yHTB%Px9cD;jSn9RT-c zos(!D?;7iPk+XQRTQ7VDzmZj}?bnZl-C#cZ|FUa(c{DC&mmQP-+i`(b^hUAR=#4)4#-JSq2CfvwE*8(|96M=G z&5=CzP@exMb!L{*)`IBYUBh{v>eQ#*Gn165vsiOJTN73ChV9a{WL@6-y1dZXEU*K2 zh3&Sg_jx*Ld+J2)(?Rv}F2wfL`#8QEIs9RNy`z?^Pkz@Lm2=*%&h3Wt^&rPp+qjHU z;pUtSuhtDGvN4W*{?Uc{bTN27L%^C6n#IPK(@~op4k-AdW+q(3<<5v+|FIAcM_Nq( z___AA?sMLlzF{mBlwckP5B;8DH+S7aOb@zX6C(zGZtH@E1NR2#f^EZkWP++H5elFZ zL2Dx|$<{anK6`*=*<{OxB6hm}=H+T@M2qyGZ!27mRL|1-c$r33OJYYaP_4(}P3O}M zBz9LmlEY0ZuM?zs8R)k@k!y4pb{uz^UbsQLL~o~Puc#v8QXxV|{A3UPks(c)?wlyI zekGaS{S2{1=fjP^zli=DpL11Ay;G^WD2+CArTHRUyl0^y=tEJ79ScTiS&;w7Nj75S zQ5P?}Qf5IuK^J&9wqqDmL1`&-U zx@z{+u?I~g)uQNvl%5sl;yQHmt6v359AfSGkPLm$u4Upjnq`)^mFY;bV*ry@(s&Ga zmEelG|FBxQh|DyIW&RFdS_ry!sYf^Y9GZvRu_Y>4yC8Htk*ExYc}$SpSZoTex`jtFec1a|g5j+VvntUL&>O=uu4Pd^GzjVb7 zP?o8?aF^BfNylS1MmE=fUsTz!+Z(BL2uEEALobYlnRW!@&t7$_FRgo9&~h+0QnmIc zil&om=JJ^EAq&fB$I4=cx}-O7b@$TrE+S+Pf~67h0f$UMx$~7g7T6n0lb40SteXPX z@rjP%!J$mlHQwD?D*hsN@)l zvj^{R>CN|_<}9b_|5y_LD~9jy_~L&te6N0Yj(-LB@6Pcfu<4j)8vqR6Z$)&(8fwK4 ztKZ7`WxJIAf{^wLrW4j}OR=2Hn?S>j{o8kRmcu`gzcLW*Q0_w#s3sicD2=J4p90C z3*{&`mUPn=sdA+=Bb-+hS=xoTXr^b!KD0Rsv)yP~SDCR`PQU4S4_v!5zr3FWQz~c5 z*{++zI6n|F%a&tTi&}@5eA!dJERmpDu4@WQG-y>Pv%x;P4n2699n6;%XbEUF@hX}U znf^VeqoI7)opKDtmk^vx-h^FinHl=e`K(yq8PglSG!x-PlU$p9UwmKlCL7loPz+1X53#W5l*5IALZ7VO7+1 zWR}1uxcSTmW0Xw{X)8pN2H;04meXBSI67=oyZS+@4V(LTjv$M@(P0wMV3P^K^mPg9 z6E4vHAq70rVg?+PHaD%SDOp&S%VhOND{EXMV&aLgk##7XYoK|ovdbY!2+aowtF0n8 zEB8oe6%fo0GT4?y&ShD?a0z>37IaoMX;7A$oN0wtu)lG#rBbqR!<3$gk0!WqtRMJ_ z2^Z>Hdc-|g7-tj4=CI7%$X|qvq~jS!(%_diK(rP^JId|@lT!RE5e+!vJSn zL?)tr=}&0$`5~%yP31XfvdZ+PH7b2SeN{aEhm_zdL9-uobnR7M3#@$vuAo#j;n0b3 zA)p%3zk6^jO)oD89R5zW-1fy?gWY~g(+5~*40NEPZFKHrXo@HT$4or%_e`*z zl8WZIxyB6CN>3e4%Gy>)eWHaVyed5AIzjw^9K3Tuj5T*%?7vdGUOh+pAHxG5^$%=fa`7-_%CxaKXecC(qTjZu_3O=bpdkBiME&~ z4h>LMQrXcKaGxXc&fzauyi5YxVu=M#jTL1H5+fip!9C+ZB5b&?ze}L45iG63GReS3 zT>1unq!Pf1h@l(I4hRd_HmZ?gk1;1{S7q@Jp14i>d~EzWtLD_rvhA(Qsgo@%s_wGb zY<#H7OZ#G4n4;?GMO@U8y!3XUJ_azX84N4=XJ)n~PWwRdo=03q@toCVrQ=f;>0cHr zEkI=K6LnYXeCh5elaTQE`?>p47&d$Acl0u4DtEsJAj?CdrKR8 zD&rc1;*stsD|eLMyGv?&DuKrMcc!=Bo9@jai(Upx0C?(8z?D4&s>R?XfNl2-#WPg~ z?2Pe69!iD>O6o$D0p?KEoU*Q0iNqsy!D>d*u?H$G3(`2TOEyXu@1exi>Dk=;+Wl4h zw6c66q*mymy!mbQzG2-*SjI)pqh#V=RTGiutQtq;eN;E)1uFL>^MClr^ZyTH?-*S9 z)^&X+>8NAdwylnhj&0kvZQFLoPC9nSwz^{*&+b0g^W4|D-}6?TPrE9$YyXp-`mHhM zm~*Yw8JCCc=U1Dv{93u&C^a)f0WZ`;$SEt7=aa`jts1q^&>t8?RgZMZ!WKc9utrUPvB!H6P2Uu zJ$}uj{jpZijmkUVvM%*dSNi^zknq!8F3V_*E`k8ljU;|I^EJy!mupG=-Ci5?y=mis zxz^|KD0c7&zV!Shx6X0VC{x?D{mO=(I=5r)4p2PoSXIlt0`+`RkL1|oW~y(J4(Zb{ zK-v#|gtU6pRO_+8x$@ywNHzO)_?_ z!5Z;4_Rh{SSYS4qvF(F*^oUnByZJd3Zt@NJfNV+j<~8Q~(J`*amV&DRmB(R6(3hAC zw{@30eY5yDXTT6}{L-@!$h%5z*}}!u=mt8pPx!aXNI8b)bxo5P4?5OqZHSLf6!$h| z(lS?JN$JYX(2}!#xGV2?5oNwAQCZ1j8*>`go4xXv*>n^_7hmTPiFUrYzMzex7(o`! z;g_l0joOV;jZq&hGo#M0gJuk7)qNbRTAhSqpB=dZyhQEMabLdib3T9?j9I6sq{lLh zAZibBj;?*qhV;PW7%=%s*YfZyL2=kIGR6hZgDP841a3XRQiMauamN6p>uXl)RMHS5MSLKKF$ zqArI%%Gxh0Zwf*EdT}MTjmJ5Q*0U;2TqEBYr*t>4Nb63r_S8=V$Zaoi99OZsd^l3b^UciL*CLPnld9=;x*7DUiNi|v~*u+2e#X0i9Un(i-GC}TyGBp1Hx%G%ZE z`Y2bPVf+|X2$mQE9UPmtOM(h^HO5vNO%*nCt3+1_(`mdFShA+@h-k1*<7pHV+GWGtwuch)1{flf_1p{_aOj!H=&B6G@XM19) zY*)m^%CBZ`9an~ooThtyGSW7h++@U#1)l=NGZ7N5fe71B_0!lcHV2dN24ns4hGW;2 z3o9=N<$4XHAgqZyalZMMe6_YZpgL+8?dyTWOhxtu#ylx|g5u!UCqC;NqOyi(ldT&V zzhBok+;L2Gj^of1SJp>n+s)K3G@?y7;=CAEuhitOLrgUELv|&jI|ODMg8D2}0pE`G z5yIU}K%^c*UB>jYoU^%UHo@EfY}y=btVzUpV*^lTBt9qe@fz9>Jm=DJCVw) z0b?Mf?bG_UxLzMonJ>-s)injP1);a)f1}uTxY9%zPo~)nQDY0G4O5OaL8zSgh?ABS zy6S0sE9=~s4yX%ggYx?fJd7}`o*{%2`<}njjK(bqe#+uvZE1S= z97JX>w)IQo*I@dIzUv_qjDh$ws%TB<$KA+aY&ot8}`RcY5`H4`}I$OeF zXYErAN6+q@tM8{1Uu=SZSa}(l{@r*7GduHtSND^dGQT@&`_sXgi*h*J;aw4NWhQ6$nEX$wvb+Jsf=XyoZb;X`X#nj5@y=ZT(jHE1q#wQ{ae;KpbK9DtRQEW$LreDr0^w-ai&3viavtw+ zG?!?X&{C%Dl!gXrPfwOO{F?3@SFjj{ti8e>H0WVCfXZq=ztx_3M?JHx^5A8nzBLVb zWJh4BU%2qFX_;PV!ymbMZ~L>=_mHNRw+Wwd-aBy5@|T_ymL1|TW&enDb{!RpXr9#z zUq&B%-#M=ePFfYUSju|3ZS~R(YS2sdMFS(~Z9C8t&+9)}3n&U!uETxud@_7ON>op6 zL#q*P9PiWcCnLv6Qk=r9T7+Rchh$@bpZMvfwzZwHv&l1nGj_VD+LK*S%0#&YOtBZ_ zIIxn#<=v)*OA+)`Doh6Y?Yy=z^2&0y9j8Y~hrI^JmunX5!=soTgm<6RTk_@&rS*m) zsxLIFj>nFa@*t;pUeGYD?5%hqjfGS|P0D!w=__KhMv}qOOdKy{Hi0n~nbEBYAFzSA zy~Yk6yxG#A<+Tn2arI-iN9$JJEuLgUl4{W?=jkqJza`%3TW_?<{5(`vbFYjaASUT= z<`PH)cZ6m!w&vb870H0yrb&705&Qaf)BHlb0b7}gnh1RU zRskQ)cp*Wm<}*ioQF*5z9amcvp^QdSg`6>ckly=~@nkh}Sw*!%L2(ErB8)R1QNiF> zl2*P5%cdO~{%%5yr#{IVN%=S*H7T=J|85>F{cxSrirq*Ly`_<>olEH5pyfOCi6m9S zP<$1u^kl~4P~8S*t$L;-{E4K6Ve}{U%$xbDrXw+suHonT{`Q2isvVw$yI(R@cP|Ca z6p#;J4O6vM6)>H>)^WqIkD9GagIpVj*X}NBiX=CMtTPRB(%3@>5bUNUoggkWDt3A2 z+wbN(Q9u9Ei)H`oO@?QgC5Nyo7)qW#0lb~m2030KUUEmav~a1sN44J&P&tV5}m#Wn%iAaeX(qdcro+!HT?YC z&8`fBV3fJ+S@A=oW`J*f^QcDnb97vuCfl51^rAy5yw#WQo2514;hjHHG}b*UW;JT| z`8EMRksi(a`oqKHqC)ofhuL}NwhJ0FqYViLda9;tj3=*$zPw;tE<7BblU|f<(1&qV zE&zVDbMP0>2+z%7Oj>!hweOqC)r$_KE;!NN=N8J2x{$D^+JhFwD)Pg9^G7wxoMbyu zw)z+4%9d>jFUzsZ(+x`%8DTFDu;GS8nTyw7W;nwr03ukCIsRslZiVdwmP z$lxy9wnF7|^M1!Hst=J&NKupYqRfG<2^ z;rI9P2odv9sAe4#r~kS1`-fq@3P;PEf%b*B-`zo}FK{=3v)(@~(##D1${sVZ|9xCS zP0DutKMlUHorz1pv;>Mc$Zg7EO990A$z(AnN$UICl%06^>cUv;;^!!g<~r(#j3f3N zSl36cUcD#ykg!+V&<=X9hxpoQ(_CGMM53V`{BG>%LIy8PE%BlDuNNP9?-+crJ)1BW ze2>6Yqip?lj!AF)L%^`?pEY%!$ja!P`ePG{BbKR^ojFTZa z)vl!GoXGGOmevVM}>fk)#%jjxan%VYO}IeHzLn zK^4L7b*^HFCOr#;UnF6X>RW_iRe{RoP-(}IAggS}a^dZ>wHDB@zbNg`ifx0F@n9_L zDV@`%OGm758x8LZYoJs%UY+9WgDhDeftjG}cnKDYZ3F{=dyOvYqkT6sF)|YKjf9R; zdgDkEq&n;GCF3akCE9rM_>scVpZV%$Pw#Wz4kn>$8v;Xh_} zJ>_kufc0R(KBOZW+4reg?%BuvVIssGje{a%!(~9TajnQf&CU(Uo@e35i1?;CT0}}3 z8?#ERjwNPrz;SxR1asyJ*>M5NbO$Yh9U{}mCHP)pR!exm=rXM~SMpeg-vnKnQHeP+ zrvbhP_!pE*W~q6$l18mqFXkSr1$)EWJ9VF+Jj_S<(#ye%B$=qX>khiJC+$trNUcKV zz4b*UXe(Ri{TsazdWaEb{BerDDg9pFFK0}2aK};SJ`AiWGBFM#RO^P|f zC+&hYAYejn&~A89%~e93>u^u~)nCEq??hJ~>!do8Q^FDS{GE8dG*`3OSA3yvxFf%| zE&|T(5Ne0nci%?Cmqb`N_q&gpiy^|7NNt($V|9qH+M~d~M_8`T1`eE5Gjo=xigZHH zSo`%BBGbR9(WMK{}ML+&m;3v!Z^KesL zcb=)5T(;vqbOk*prqA<-{;Ck^ZAEM^_|%54ix}wc1Y5B~%btdU7M7N1Y$1aqH^gX! zcq#ZhpCb33j}Ec1#mT{cSfXbD?`PXg&z78)Sf}sV@Nzg2A;v1CK%73d)6ObNq;u}} zEz)`(O2hIO-FKlVTrH7b-6+L^awVf@s&(ZcUVYj9wVqKlI3HkUjg}E=KswMs9>O{s9-~)5 zt9iP&GDmj&6^e6-&vw3HmQn9(4=REgau!zS0*VALB~dLho~lpz#c>Ua|B0iL3y215 zP~K>Z@F1Scl-Ef5#U9ot-9SB)C83``9i6_irLe5dNgV)f%Xb33{g$IQDhQ-{q&`)uZXN_<$gS68CJSaMALB zTF*GGWa0{?H));vYF;K^F*Cn7W{J3lIp`?2(2AvBS&FWt;CJWW|Jq;+UBRtx@rQ#*B{9ga4l0 z$J`{JqvuVuLGm!R8co+Rkd}d9f@i<@iXB@d-atMJ{z^*kwTn}lj=m|2w3}ofFBO18 zN4B=5X!EKY#of((j%})Ss{>IpR0CkCGAoks*Y>H*H#*T$x9tO(70)ya_D3ylg3gaf z`zN-EUbGyzRl3rxYlOOz7yBuDN*BXl}=TBfh z**%IKvz0xFJDV!>5<-CTqB$G;yJhd;n?=$SUc0!5yX_HOwU5wq1knq0UfqSKZiYWV zUCF-N<~#>QQ46y^A~;1wlXX>6hLuvC^SuIBjhrU@Bf0--Sd@d~@BL@B(HLY#gsvOZ zcYllyG=Ph+}TbfKNupykSaSin)p&r1{vvxu*val ziAI*vHyU`nQ?3jh-s;#czT{s`nWT29e;GX$%;m_udtaMvt8 zJ{67u?oLWX5x9@a6OK{UUE32D=(P(JaIlQ)XLhYqq`fd??F~3ruCJFWK1PA0|6;$r zde%_F+aQT>Q-a8_DLrG}hXPD(4_1ATr>XFB%)x?b{3PqFc@S^ta`k~Cw#c+9_Qoa) zgahh+*|WV_p`jh=z4Zcpdm@IOrr}o{#%9(`qRkmu*fZ~Fr(>CMgHwTO7kFO5JEXZ4 z)WDQqBOz&J-DS_A4VBRx{FEsgFRg6!LnV+iuS|Gd&he8(af3mJD+J(~I~+H2UaauW z$d`4Z%5$I6MWWDz=#?9fURpP%M?D%~;6e)tyG+q%@&%yBuV|*P5}@n54s@ zz6}?KnAA86!NNN0oI`&P%t}uSS zLQW?s%j~Vjf?I`(SpBZ}4Oqa21Oe+FofQu?<ezkc4z5VxfGVF6LkKl~;u#Dx;`Wizr^rDlVuEieY82Q$TD#l|$FHP#BbHy`{N zi;^!)#xSY*-iwP$snky2cit|qYbHkF+4w{}wI4}~v|d6TBG?Mr2!p1buUyA3{Cb;h?vwYUDrmxGjJ>*x`|`?8XvVb> zr^E^9aO;%Z&Hm1{dFAuqEGua*#eGkb4rUQQ9i(f0NYUI3LR}*&^{LzMPU&9eDP9LW zddwwD1iBuc*THAmULSs5qYcq0CeY_0BdO>6FS&{IqkNad=hn=s<*7(&a#v*KsR{`< z&tcZj^UBA@=1PP z-3G5Rk!p9H{149uJSk>oe5dx(`0efh7p_LJ70V`igeaNy-_H;9cWlklor?Y=z5i-B zk(1@`$^L)ou5hBbJUqdOelMF|i$NPKH;Y8axW`X(U*96U7#!}YkOImGv}%3L!yDw$ z=@<_s70mYrDxeSSCg1IjTCdlPtS{CJ!}MiUGovJx%@3XJ3EYwvo{#lxLl;r`BM_H& z)r{vc)ANgLG*&Q?`A1?j0bU$Fpbs?QnYnAWrv%v?K(&-C5WN{rdgh9a_NwRlJ?e;Y z;sb?Ad;RB6ozwt;+lcoAySQVb2FO&(h3LW5cJCy1d76mBV-5yQQ)Ea10Mmy4s47;( zR-Z=0o&*4F3N<2dD`Z=!Z%25qJv03qU{wPI9L9NG0Kh+DP|t+I0RWEy0Ip(#rxmB^51|Wi)7?{b zcV*@*==@TdnTDMOYJlh#6spH^+qHF#7d|_}BMvBYi~0ffM0WgZ`@BIvUGCiF$k~g* zp|S3d9&QWqLk0Gl0>Y^qXVKR2bR79yN8$7O3(_2~|~BB&#YJXsWpDq^+KZsusE5=gT&n%#r$ zu%#sjEj;_Jy(;SChOv3D0#i)x8W{mLX+EV_tsQ97D5mwe1*fV_XJaZRovY#qkk|HR zYu)OE0piPC!pHpn8r)$ZxZE|WNV8u#?%gI+EZW#2r(n21UafU2+BQr=T49Tbd%u3N zjs+!`Rt69};pM7CA-f~(n`D>A7ayK*WSlL2)Ni202_RUXkEpQFnH+J)KzO!{6A2US zT?>WJK6?)ZoBa>JHqaz$G_9p`Hl0W(lARY-FD2^eolAs4KIhHFk)6iS${H7p(>xL+#rH!Lc7+2594W4*B8fig!AOber*NmFx z?_GFu7U$4_Wp+xH!1zcHx*C*7L(_$JD_mM4F))>YI6{xSxI?hVzPm7bB^$*k5Jhh* zYeTo%F|dKcYqUO~Aq_WyqCpqXM6VGY)XS9}6k3d@@5C?GPDQ&x(`I_5V|tZjl^V=3 zMSuT-%G{RzGdD0|c%EGm95gHG?5d0!+DJOfRPB`^zIF6xvqXRV?I|EqdoqJ)ZduA2)f@o(n8{lz@`<&9pHCyi?Q zT3tP(RY*?h3h0x=D^$)h4x4UEE(bpsG?0#>8L*$~tbetPdUOX<$eW1>zX770N(_C+ z(Mye5EUmHd2)dYSRFpKZ?Bw+iO%SvRzR!z}x(TPtI=d!oNs$6eDnqynlK(a%uH-Q=i&|3<~*L z5X8}8`IQ;>Ne`Vgh5Ab0Wf-x8DtMyhLG!M_2?k*v-k8wBNxr&s4nv-odZ386&;GFE zxe9MgATOuX-5BZ*@*_~*E9q}+4O_#opxqGV>1$QjKsUd{eY78!EmALjJ&v7u3f?Ga zR(!Z=5T--hYE_4TPEWUe*PhxBd(I-h=8W{7ayDT!RZr(Rf~y9DagGhH6^bz(Ju!=i zcVtW_p$P4@vcN6E-8ZI|lFj`2QbcQ0q8Ks#@3s<9oU=lNta{~sh zHZIW@24Y=N8LGVK@Uqv^goy;tJLx1OjjGD!(#I+7v&0~CLi;Y1rR8);>Z*|T!qS|^*cCSC@^WA(6*eQw^m5i8)! zb^clE*U%G1l_&*tSUWqdA7I&>)CaKh?6cYq7gZa-m}qLM(*>M?A(EFb&Lv-SsTtjBg&@80Z4_0T zFa&4)*JUag0pNd-T-?+ss@`EJ%oEN|e!iA?H3{=eN&MDLFP^D^U}QAF@!~$~VXy>k z$_N`75EUPap(_;^+Cx9$hQ6cGpbf2*Urm{hi1m#E3wjz=WHSn6@CK~iBEA2)=n^_97z|>DDn;@=tjyo zbPFHGxHmLFBSMyCA98CY+ z69UxAv2zRv-8a;)5EiGHYlc$FaN>Rg)*`lHLiin8%l$czFB6Y5TrzATdB)1t3mW0s z?ml?aOG>Kpb6L05vov7btgAvXqPu^8`nr5qEx-c4_&(gdiK z6GM#XocE}(c6qi;gF3RhZn~#AiEEU;8e5eVl2gEUBeQA;+muJ3|}RT z0I8V`aQs-_;%{!J)?hk_zLk15t4Ot|J0F%2XV#sKv*CB8m)I08@b9R>TlY91ZzxC0 zAAbjii-F3XOK(uf;RjU9qz_Z8**Wl$^{mYD@)^-1b`mcQVR|TtwztnbRGh7xSmv-h zZQ>xRIJ+qL>{Kz1WB_u1>eoNMXGiRP811?l?y^q}AOw&Vbi=n4M{2<&vADY?Tfxkn z415{=qu6{QD6AsB-a$C%P{6e0#zOGoni>Q~`(gH1cc61bgb+RABkTE2-ya2oCZ=?g zdCvT^21J08gojj0@~R1f2W-hug>28m*$=+={764AWi9VARWLwu=vMstu8A z z+xs8&?!)sD{Z`(5R?6Wy_#Y;_=Nq=?0uM0%2=2d{qv81bf!t?mqc+%#FkKITxkMFG zg?SJ_pWr{cDk114=qCwF-+d%#n@z4T%;LdCqm3AdVMX}(r=wjiY7B)SJ9_SCXSB%FnLWRxx_mLx^;LlMAAYv9=x(9j(uNJH)}b zGk!(wwp(2H)cy7y7;sULn@m0!kdA~{Gn+B%`8Wn#CMs~a2#+Rb_o@HIive$A5+b24 z&IVxC9IVxK;d=Q$%3Dw0gS{rTZj}kON;#GyX0|!IET&@`8GC4(0nyKTULOaW|1jg$ z8sM$Fc+`XpQ%8>x^hbHC*oO>_U)ADd3qSYwL+&<-m_d?ChBb76v(EX$yT}`~A>o_2 z;?x^b?t8qnD$`320|~q-paD$S!Wefn;zEO<^eS?eiBCoCaXt>{@d-<y2v1P^r@?8mlZ&0CRFNO0A5JV}M_74EPoBZCyf6+_VZ(uVCLse72DI6k| zAsVLV7sl?vD@qE%UKqc)O;32GWgmu2aukrQY_M$@02(>?@SuS6k&h(R(@lNlTRpJd z1xI-6-72HKU;rrr;lN%#gdjowp4d6vA*;P$C@vo=&Q3mJdX-5D+L)De$4h8!ArKdj zxVL-snSFs&z$G>^U;>|=OW%uB;BecPZltaU`WheVTSHOcP2`}fW&q8u6Z-y#MjUP~ z8267oE=T1UZBT3NRtZj*c>Gs>@6~xghtV)S*U8brE2TS~iD0|PYFaE?9l>yyr+*hB z!pmO=!H}^w`y&BEaUY%_NEKlZ>(zRYLno=b0|S1*?egQ8kd6SH>|+~RV0gJmu{+W@ zk~dnLr}G6?U*|#NpEzdyS9g2=e;oAxgw+5CEs^B+KWTNG*nbzzaCQ0A0bteoQiprQ zBG*y{I!VeQ9{>gRErgrye4bc}9ewLp>G}v7!^)QaX7Mu6L9PB&)I4l!Y508;1OExc zkO5Q3i?F#1_Wx;c>YnQ5K*b-9;bzl6L9Qw~0#*HrrLm4+J0Hh_%S?u#N4g?8c>D&@ zeGz%9rl6wJTkkqN(n$#n`IE-|loS~HFb?#jt-6jo6}<-#S2rpq(ZcPv>)#I)qlD7P*R;g`w$LO5cT(zMSlUXJ+bp6=(@>1Rw)K~v%DXE}h ztHW4ARH}ZIW>;<<9>d#z8gNa>YMZ2@XK)pRI#GzFb$!YSQ9b{G&QiIW@HU(nA`FmW z3$_7wpDE09gZrr$zQeF})B4!9bDANV3`)DxAELcAIe@B}?xlh6r&)X^K!!n*$QUv+ zATS}+t&O|p$iRK{2x@WxG7Q-7zuWE{U)0~~%xU1D{N1o7eueLk3{wDPctL z{m~jXBqz0xURvmZLmFV9@vutFy9fD1I9n{Xl8GnXEeiz{;%g1L-zT9Eg}*QAD?mWc zV+ju2ZFkmyu6`B1znxgL_{CNUD4QK1JG!kLPbOiUv8%zMgm@co1kE3nSVi-pAviEl zxJsG3{-8WZIz7deP1nD>o`I>v68l?+nS~hy2Ozrm#7LtvXGY8*Q{zBuI0il^Y>N)s zPYv{12jHPaUR;!OybF=t+nMfuWQ7xg$_T&V*l4P@VNjS~pOdX%6fA{*NqDeds;=~c zp|ps2KZJY|_F)e8O9}jzFDJeRP-3G2x2qG0@@)}8xEB#Yld;*)d(?9Me^w1>o4p zs{p|9Wv{>rAHK7xe-!Vq1bR>2KKx6a^iYQg(|vpo5Md`8=EY`C6yPKGPKL%e}4##=-z}+uWLL&mMQRI)sFrxHS3`oM^%(&wjJUJ&h{#h%W#wbjQ~%pR zcb5DBIOy5|x6xRQiRYe&@{DqP@@$1UFwSli1~HqE2T za!?FrbM(}nin}X291zNW(;J`>oHx^A5RB(i7lz@t{Y!s z;rT7Y>I-PM7jjq$ZS&EUW??s8xrpZuWMcD2IPuf!r;at$k(`kx*IC?+XmypIGWln(7X#!qe^r(5MijG`~j$8oH z1xWDjUb{p5UlJ_I`X#v|s4 zFctUF0pd$!=<NW1 zp7+6ty~9VNGJa3qUxhE<<*B479l$;h|F+LVBHg_h(i^m%sf;*m)DW^HyAl!qPjf}#o(wJq;yD4>)=1)cO7tQ% z$RVAy(f0hMxyfdwzhkS0lqqW?UQH_&&pDp3;-5KZVLm^t0l8I}x9)AjISKf3Dn?NX z#&Ney-D6h%PDD zt)GdqW`(csY}^DGyHX_}sdlWfOKl)N`tR6kMmonabP>eGIToz8<8+#i1Q8yc2z3i~I^&AttSpz(E0>GMM%s6t__ zcv(yFL2P~_IXNpD!8Q$&e?eO}DP~(zzGlV>`ehrCS+VFWtNwu&G*Ix!>98sZwT${d zk<~$6YqJR%mFSF?a0ubq6j6Y@aOcd)P1*kTp;-~@V=B>A6vu$M_s}+n>2LcCht~IS zp@j26jyx9~zQu_g_`ntP<6(!*IX;q*1Q$n}6kEuN>q_pL?}E!YK9*1fx1fVhump@C z@1Usa0(!Ot4HA>nK+B7FM;BNsD5@1u{K`9jf0P6izgsDBx+Oi>gt}x#-((@KBey%~ z1XG&5iT7P)Mg{<>)gvIaDl&}7qYbVEyu5CUoz9ie&DJxgoFvx7#K_IFfBFOg2%b;m zP0>b{?Q``1RKMsWY3Jyp%OXC&fY^%3^JmcMRvu1 z2V!h|-1sMW+5Xj-94GVtimm?tt6y$ek3XU-Wr1m#66FtStw$mrglSH39Z&RRQiTV= z_oE7`_d|38z$$gDZo^4w*YhJ-GAmcQ(ZYLXag77o2mHTPx{6PyDL21yF$Zv9Z+7BQA}w=}@XMn=KFN}!Pq8a7|;v;Eb4o(I<~ zqIA*>3FIXhzmbLxQhsWYRn%DJ%bh>~>)5iVhNlokU_YL<@H#+w{i$6mii057a z)qTNGh#vhhV}zfvE3o+tkg!sco?nhkyxc%vxsJ4q#i%Sg(rWJf=9if?lGdjK&7rOacK5`<|Sr!ykhKp}UXV$UWv{;1|x2`4|1x zzlhL<#JS=+B-uj5xvr?)FI=_TM~34H;Nk%}l-Pbt9HiL_<;ja*V==0rsAyDWF8M23 zo#+T?Wl&UnDaHpPA#x`lVgFTjT&~2(R07;oE!mbcB2ynXVUN9_ix#xYz_9ZH5pDZ%u4k3>u&^PP^OXw_WfY6T21T%KiPjV>JWg_eAx}oGqk$>Y5ttBqO|Vy2(1Qj6Zwy*|Ep;(MkdC;-THHo zJsJZzl``bQ9je>UEMX88MlYz6kE zS|zIwJyiWG8MFK`eA)m?-(iKT6t-`gxUV z)_oUSya#SmoW-!|Cabnv!>5Vrdvlpi$FI-N^W@>h!`9{gY;v&_sb`b!-Z+(uGS(rf z%-D{u?WrX>1jL#ie9kfkWxh>(IWBrGeBe6zjIV$AvwtytYq8;X*xWMc?iu!o zrT-Xvw(XgN|A>Y4d*b%H%h5IIzDRYq>^=VI&CG2A*GjYOJ%Baqjr5VWdCS8kxb+Gc zxAN1kUaoewDtyD%ICYLd{1>@s$1Q_a-8z;ve#SxIna7+!Ft0k-LA@-vz?xO1dB~Q5 z=^Yo`w>P-ndD;7ou*pz{@xl9xxFroNUf2sD&joMi+vM5T;#CMo>mT6epMn*00xDuD z1s8lPP4Ya1D!u|GeqD~EN^1H2f{?Vv)TT}*w*0bN^&s;7D_{Wha(tS;;k*SQWUS$9 z`l+XZtenwz52ESgaA{S!#>ZjMc{6cT3rV@C5T*Q*+W|9iw6RG+&IJ0N6a|J8@A%6E z$%d~%x;}~?1}r4d$)@>C+GUgij95tCazQJkA|i4a;oNqmUsM*5RW`ttn}SM@+?B=F zp%hs`1=1?;ZGy{J{fVM7{q2P}Xr@}#Nx+zOtdz;uClbOuR+#pTq2<#6g|GQ{C0;vf z=>-r_{qGYQpM@7E7SytsMX-w!f6TizhRc}eH%U*W`=qV3QB*H{;iT*0B#Zu$SBd+~ zLbs>AZ0e*C{dLJY1mq1zyryq^naFLDgc#^}!J?=&cDV-JMj5&_Mo;gAu}FTYrdq2U zGsXI69r%}8oQFlm?FT{D^%Blu@jWY5TXzEp3fM$lY#Z<%q!ugEl2if{uw(n()Kc^U zB|@!<^XI6j1o^d0lOW)EF63L~k69Y81iWnnw6Lpd=Uss#)5k7Zri@3$S`x1?{H{m5 z(8s_w--Ka3-!o8n$R2 z*|~>DRafWsVYyge7<50f?lyVht`hfJCf@MfZX6eVA2_q5e$}w(2ki*k+6fFha*6OU`jKsyfp3r%#TAhaFEG?< zqT716{G^VK@ACqDKusq5kE`Innv7#)VEx;0&7{U8U=;*xo29%3Q6Z6>hyT5IOChg? zpc{Jtme`-B|K?tk*RN=9VYb>5wRL%sDOezJMVWn#+cC*(?qO z8*h+~;hnBkLz_)M+#~B-@jzY@iDxgeWP*!R^?4~rEUCI4i?BTK(;2VI)Q+?wA`=5& z7Ya#y<|0Rlv|hmxv%c8yGVTtPZDd{(W}3M_b+bN{;Pm|7Y#A>6lz{Rs{UF=+PcGCK zgoaeXjlo5z=G!{7MexBCD-2@jFuvLmhIu-sSzaVetZQ3dql#@aqpTB>{(w($eWVNd!vu5ONIVlpP>qPUw?eM$EfsP{4Wn6vw%RbhUE@p zALn<7$%}^ONa82_YeyrJhfsSS>Ff6f5|Sf$VL`xgI3y%XvBDsp;@b!$t9Yre?~Uxm zea*t>gz*qJC62M|*$~8xcX4S$M1)T->PQJ45JZTc_rkA(o&`xJHdOL>iLz!(P3enG zR8wlk)l*@;gP2Sq(>im2eH4kS{jbLhh?DfJl*c}mP2`#cl9|*J^-5_YY^b~47{WJ% zYSspo-r?UZci7PzYMNj~4DGsXvFj_;B~{KcXtX0u8U_tJ44W;v$nbVpI5Hmz`M&JN$*!+##`g5yq0yIweePjM5lW#;+<9Lf$hpp)<*H; z>bDD?D!@Eqm`FFm*@s^95ixM7f1nW2@j)T^(4*kxLu&Cld1^jI1NM%Q3j!`Jyx_7v z$;@5~-X(@dK zk&xO{6cp8_7oO=JXnWxs-_h z8#fHjb6tq+y`8Tw>MB%GJ4osvyR8bajj5S_fH9U}4rxh8C1mn1Q85;0I^9pNx8lvg zAo|!3gc}LWT#?5J(u-3B!%k6LMaoP40o>!@a_k^x;+H?EKWP#_f7~SlC+2O{bJ2D@ zneuU{Ndrj~)?*{j*IZ=q8+8>!_dNadTN1>BH0@=a4s&&Kw@fo^ir6oVX!J(>mW%5b zkSN3A8HG|j`$}C#kmux4xVvY&1q8J(&H9fk%)gr6V`O3d``Entcnx5M*?6Engs2iH zxdVZrhhhP1hxTw4LBDU>kZBmH=+R9`IOIj{3^Wg~C zn%}T-Vv6@Rv4kJFMV~E!Xz-wVl*Rhf%atK0|7ATtmaK^Fz2T+lW&Z7P*8A}%cgh4? z$N7Pd3fM6m94zOlPE8MPHCSEBBUCy)2d>)KwUan`*eiBmQ;sYIZXQny=Vf)z_}7&A zt@SSjs+PFAPBW-IJ+HHEFl2<9@(-P`k^aSQ@Ppgs+dn*q1XQ)(<|3ERM_=mC=ra8n zn!Bg0)?!1HT_He)_Nh~PUp^H^8}Pfh(by4XLQN&K`XP!`AmMd+gu()vh73QpkJVtp z2l>(Pd#68zj*{eH`qwfOU&ai|+~a|Ep25Y#1oH%(VFsgr95KO}hWm%WPaR{Z^Y|UC$EszykNlvb~MF^Cpms!A{w+wTU zL=x{)W5%!EF|4IFw^#hwIc71ZIU=Xl`F~#fdD&v@2`b^@pmQ^Q&N5Po+j+%48Rc8S!?Jc+~! zNx;qcQl3Mv_GyTlpMmc_S+;%EnIqd_$aum8m&Z(PmVoq$gQc;pDCXHgb9iY~5vOJO z$wS)F-Px%cI>0WxNA_ub} zSsDO$DCbt)mvx8tb}6xoNwXV=N;vm-PTmUYd+e%K!q`gWEgIl01F=WDXRq$qn~h(e zX@s`b+B?ymDqyt@*CKJrsy4U&O7UwcB;*WCI!Y>?SO;$}WZhb0oE+V)_z5+s{)0kt zSRpx*E`15Fmg|yF7|Jt!QDVs6>X%Lv{~mfonGs)-_`^U|s!tjo)nfP?*unaHf%7hJ zcTcjjf?pHKd_n+T3x&zu-gkDc1m>lmHfvpvnIW>g3WZO^cjqYr0JAPSl*YL zt!X7eqM!TNlpnzb6QiQ9s9jID}YN z4Va0>YC+&OT;`4(VKJ_u>iuyxu*0KU`?&YCvs&|I&)WKepEZK1gGy8o`AtE7sD75o zLc{`M>NETW)?NE`u)+UiG4GoKmU9s+qKYocQ`cIFvkPIBba}jI-6!Jt3mAB3z2tk2 zwASa{Si7u6jtW^Ur&?1xqEFJ*L;018+(8o^6Y)h|SUJzDXLJY1xnB1-4~Y)MPdF5( z{9m9Kr~L`fkXYsV>IzSCY=pr)kODZKv4Xokd5~{DtSgp-&NPbgP2dFyDh_Br`)!Hh zZ+rd-y@c_;lq2*A;OlL;?IRy{c6`t#=*s3Rx){KF#yFT^|GwsNx*4fFpt1g8ih9vU zWn|4!%NTjzqcVOBvHb*7a*klYV(#|wAfn7Mt?c!@WBXZYF8rSsefEE6D_J=IcDLaM z;CL$>b{N3%R>u$;h!WNOh48>gpV~OnHRJlDJXim^QkRglUa7;h!4Q-=m`XwDDdD52GMm7E}z%#B6l}m&3W!$n@w%9qX3&tv9!d`o@#d# zO){)+gjmsxXZb~a!aA?<&8ik@T)aYM(skp^hZx@=)MmKm1-IJB`s2HtoGIe6&yw(gF;@nz(-$aLI!CBB!1NS|h8Ls7Vi9n~F+Mh`ebr3w#46-AEB$0zGnS2LG`cg?QZ?uO@+ z7E(?JyNFhEl(>htdx7JbDJ~gpa$cwlYUEvXJ2F@5ZJEL`rhHM1`1HJ7XW-!BGkEg~ zg{*3+=A3KRR`4ouB~k3N6R@O#Ng7Z=E>LX9t{b?9B?u%2kn}ws7{aTM@TCW(Ks1L zbnT)^I<{>m9ox2T+qTiMZL4G3wr$($I63L}+h>pcob&84-amKUt1#EBvDU0wRW;{z zG2u3}cjHGFHbHQhZ}uG-Rd|fGTHF}&TCIWYNKNgI@GZmq3jQ79f$|GtquCnoV zYiWbihj6z}TxEJl#LW*IX29o<(e0bNRd1${DjJH)qAUuJfy5tMcvUZQ1O;i!NuqfH zhSAcTWibrH-}psV_zh|r3!YZ4+ySM0ouwvGv|cys?YFnrG0IU~%0#4sBo(sG{AI~w zMfyVU8;2 z@B{=mSNqE5&Q_7NxhZQj8v8Z%2R#nDx)W(!Yu&LUO3r(3 zYsz%7^N{FvsCQyhHuy+lDixXj9@V%A%NqB98ofh*1N(-9NZB2ylmyFg$zBRH12_aj z%C2osbNCT8P)n9sb%9pgW7ZB3CD#n-D4S=x)m$G!BO&*A&6$6r)G%Gy+9=EEx^&>= z@JHR;NOQf?TDhgK_KMQ(qJ|?4VMgEj2H5(-KU2;Wv*U+{ znF^}mla6WhJ;$RJj8TilzZs7Xv4w5;(JeEK1nF%?f668gu>Y~J&5Q7`Q5YxRLfz^= zgk&hM%H4`nHduS$VX-!K6ry(2T925_LK2Ef9&$DV8IKLqN>DuLBSHjIgVe(oxLzAS z6=uoxq8%}d-+mDT((8VRBfh{^#SK5FJo(j?7*S23*S5;eC|Q`cT6sQlL3o~Orw|Zz zO)QU256tmXNphZ>dj=vWcu4XU$7l@Wrw%5Fjxwv2U_U=k2C=SI&9 zc^ehzg&5HD0KEj~mv@Zi*{7z`PKKcfG1V@!R%ZW;gep(es7{Pi9!{7YYffJjhetQD zT-=UcsgPI?ZvUb8By^|lJ#QY*D)z&5`jYy^S)yvKl+0)2Bih%m>s8mIBI-ZJ9VF-I ztNxOdvDM}WJ$$g8mMOtPOGw?REf*tKK@aP0hWD)D91VrK;D`5n(-ofZ1(CnVBfo5v+G!Ei};Q*#qi*S_Z&pT&1wju;N}=J??FxJ&F!^Z*&j zsbh2K&zRcVSxj@{M&2@6*t|SA5Kf-ePG~ez)?YABUaCBCx-%VluT^_%^p^Xps0A?v z68lGsH`g2IBrAhXwkpnbjrdD0yl#ffoI#-mk?oIFR2L-4%+pMin=Sz&@0_iPY+2X2 z#H*U%Pv?&RL9ds|V7-%}suslcNjg7q>;jFlXm<|!0ZNMx9DoaH=rP~YISs9`!at6+ z8@MX$fKeVQ(pEebUURsTkI}o?C=Q^ePw8Y{fI(KX%g&uJ1@;4)?q;5n+oUIJ{_JJ! zc_C!U`De%7t9=tz0;c`qp4U>=CH=OdER6Ws-5+6IRT=0H40~O)Sjmr-tDU7kXqBrx z7y6wxqXxn`m25KL7gP|Pz&wp&fXkiy63BisGg{Uu46r$G&3<AD`#pK zR&}pFJsFxXOe?6N#6rX=$|8Z?L48za05A6%D{Y&5Q2|!>i9dDXi!QnUETV$Y#({<#2bbN4}8V)7JXtIqK>sELCr6 zyuL4#=bEw44e}Mwg~8c)>2^@{;795X%kZCrfsmI^PKVB;3s>t@y9@RALybf01t{Zd zoypwa;BX@HlNCvJLcgYeSWpuiKXWt;W7u{W|o;TT__8ji)_804=7*71Ep z;4C*ig3sd1Jc27@E4T`WGMF)R8#krRP7T;H_Kl+Y#+JCqp~$H*iYnu->D$5hOU!nP zL_llRSy@WCxLdbZpJoiREitLG(3tqWMqKmSzq_~QO82z6w^Q_tC zS<3l3VAWxyVU2WL9zXDyc})azn(VKCGPx&4in@9;Y|9VBFX~g8&>KsuRplblCLA}M ztwpsxX3zwB$*gm%$QV+vL>UmRehy2-lBLcFnoAy;9II8ZidUBmCMV&af~ahJSZ1jI z2{5kQKQ?GU2x4)@MY3Z&e+Tm(BO^zqwkJ`Pd$hAlCx844>}qo76&%-Ocqv7Lc9&qR zdpt>#+Tw~&$xBjYLq>zGs!1tpnc8wh1C-b`)|#&6#k1A+0EQ^2Ub$HI$pj;~EACu8 zA)8%cRj`dqxBk)Qls#lCYb!nMa%<{J=-T;C=?YUPdIPbsg8(&gHMeM_xiN~08|wf& z%WHAUCThTeXzXXCk_>G%1PfvF)@tRJJ8by?RuRb3qCScdx_i-50*dZ7<3<+J*4|Hm zi5?<=jIhhLcRYYMJirMF>Hy_xfSQf04X~Ql6`-00jV_SbG}a(`V1i3azKaL&0gY1X zKDu`?LtQ|Fb{#;vzI#uf@rk{2-_X>Bg8b{4=ZAS;D!qfRf0;}e=>I!USJrKx^VExeJ<(vj;s4|y`TE&f$Vw1rH zf{a39jOKVZby7r<2SzY*XPQ069;ff(_PBlm7E)G8U24ogBZV|lk#@=wOW(Qhp|hTp zbh?N@x+x`3ARhDW5S_2Ya$wCC zu7L_ung+fIN+?R1=71gk5}tvPQ_swva2RtWN*#z15&HS1wE4UTa4VpplV-mf!8bIb zkRcAwNd7#iCKaV(#}qTvxPk}BC0jrpF8>bzYXmI+qgmy(n(H&)6B<*jz+bz3=F-lq&~+!PcAC$V=jZpaAINGtlxV?BVFIKNGTB zqr_(_>c$7tlyG;p3n9}A?eY8jaEFz1y@9H_Ni3j?GDsYc>T&lRBD{;drOjuJ9zJri zx^;CTqDYk-nI)Q37InX2S+BD(1o0wk9cJX$^u9j7S#;5v&{13Gf}-d@*U-UABNFYq z@BQZ|yR`DKC}K*5$NpopC^Cw^?D&miY{bV>MW#H>r&m;Od$Fj)107V~CJVnbo>BGg z;SZi3TCz%8pS^Hz5V#;)RA~N5jKem;NS|IWxur#2qRWHY+k$E|XAsmL&rmT;*sGAA zm@SD@6|rhoRbn2Bu+h4p&45fjpW5-cFA7RVG)zoTkj39_n@cnH6bO&2HB>vbkMp4Bb*D6B>-| z$^&m*5AZ-4qY1;Z=mf2LDio^d`u$gVhcEP5>vtN6PJ}SBFv-gkmlMO1z>KlhCo0T5 z&iq%M1Bw9aCESOg?J!jCAs~+W=O^>jZwk=$HPW0BeLUKrotw4H_PxQ8HhWp+jFNrpV0r4|`M% zb}Hi4>{tkEp#1kTuItm-&2~*HRdiT@YfHGmGr6RpophES7;=B>+^+sJ;ofs9p$3M$33o2xdGRb{}D?b=YS(*dGqZG?_qUP{79UI`E|Lhk(}lRa z;-4~w90H&XFTI9JT_y(^EG$ofh4}Qc!)4@M@M>C!g3z_KY*};Zv=WW3J~Lnu-@w^^ z(j@dq&~p!kg?P2H!*0a~ZXzbRwp5(3QOgEyyu~#hlF9?L`Gd$sE9>P8Lqo#$Yysgp@HiR>67aRO6^x={BNy%%#u4Aj+R#$2(Lx+g}6Of@Z5lc*NvV>42+SulI?&doQo26xjUSd z_$n?jh}U_{(ec&#L8)}(H+SPy8WyL}mX(NVh$PehG31WK+5RAe$F@0)DI@!Y6+h7E zHgWk9SeraNo5{-2hNP?aXmse=|(bjI1(W2R3 zPY$-4|I5{!%@Z9QU4w&j@xqXzs1^>!n-HYm2hU*pR=j~XOF_DBN~xbQ9!s)d&;W~D zJ{jIQ@`kT&R$mK&)V~2QB(hIo*nFgyVcv;pCq0FMiV3!h|C`OT8U4$fkHNpBa0&mC zl8+L3f#=-tAy!EYT|Qj$T4pYM%bIcvbfl3~eEB;wHDRH%P#H&}*ROC1t@&bCD^!6X zkFS(d;->%v0>Auuc?OS4u98G*fzy6fd@FUl6F^~d3Tu0gRwk4lH;MG>K{6 zX&SOPgPP!+Rxftp6?x_NCz*IIJrigtO^>!1x!9S{TzE7wp-pfVvjj82l|mnO5w3y; zio}q=@H~1^8M!NkzR;-N6eF7%!WX^K@@Onk4WjMrDrt3Zp3S73v|oE-jZvsgTpku@ zXv1D>?PF9WWs|l9TVN=MkSZL4JNP6|#j7ij?12laZM!MlTIXCjG)k-uV|rp$ne` zYw&MMH*Eo$en#CEw<3fkpoxbMEvjnTzBhc$PE!(OL9Z`JlIK|Lp?b`S8dYzl3FpCZHq~ ziWrApse<czF05)ardMCKg@pCk;%tZq-o>>MAM zb?8LP=63$zu*NaQqlv}&^U>HigvaTF?J(x`IK0O9k)qV8+_b;70CP``D z;hTNi`Ompn5jt6-XL=PK?LX-<4GfT#7uFQ5}xQo>VGk;AVIdkBHs<16{kjN=My1uU+l z<7@NF>G#ItV*+=+3X0Vh&wu&Dmtso}g!ok4+uwRwK`x@OEFiHQ;A%UbCcFAYC-021 z>J96`a0XoC4dYs@P#Dp!=FMmh+(*M@>+!{#15S5=W(&AL zz`=Zz1A-y&BQX1gSP*6_xPVM+!njYY8;FAO^`TxY7sHyKz7yizAvrQ_qx+UMAK_x`=el57!C~Y}O2Bpn_4L+#uKebQ1|Lfpd%e5kbAx z@L&zY^;b1ktecKXy|fO{kT!9T8ir0S2{Z};#{6s@fVuES1S~+MBtx2_6o9Ci5+uJ7 zL9;oLC^E3}Cb%!T^30fKW^S1xj@DZ{oU>HskbO^3p(S07-Hgz2tU5v8YPY)iZUz(#;L8{0hYc;s+8eTh07Mk3gFnu9 zcda;>wd&5Y%>x$JVhC}qN8Kn{_bjhXHPw)5SS6|DFky}0j4YwWgobKFFH3b2FRU&m zDPEy?b7MtRYBB8pymIE1=|%53T@jVe9W^vo}5)ESJr_*!i)PkT{xD6DC_K4y^L zDXcA}SbZF!et4p(NhKPoW1v-GW(e_9p;m{SVrhs`vZ;`KNI@gMaEp*uT+&uP*{HJl zx8&HG=5xHn74=#?m47Mfu7>_McA@u#+MoCq#{8A_2^2(XNs41sXNtu)*RI5&JP6eMp{+in zQUx{>=w^%EY7v82Fre&(L^aw~1xG^6V9khH5TDtGbiAq=n#r$%xkw$*FJP;I!#tN|W)F4&t+)pkWf%?wpC3P0E96QU;`S2nf`9>JYRQwLjr`IAD3j7o}Yf&3e+Rq8AtB@*G@Qg zpn^~$eLgatXb^MJ6e|QRPrZ8>fLdL5CE^m}<9G*gHtz`ZIev02~n+8g~20ywGv_AvU^0*F5oqZHa1zHAyul6H$(ie5no zFi;ul%{o$a5Rm|q0|HW5yHb^}ds5794>z)Y! zOg>S@4jX^RlZ?&6|2k_&4@PVYB3cb>l(W}8b0?DkI29`1HGl}Y*NQ}l*Z8+EIgoV2 zG>{a)=o^*Wb1c^PGs0Rv2ZBkjgJe#f3=A?w4p)LZR4<$p@97t7^-N;`HE|7K#kFWf z!lsAga1Ag#n*DX_@s}M|36p`SMh@1g(Ttcl?Dmr(kt_9`9ObGppxKn6uKd>){he-EAHqQKOj%X-u9x0`3?=w}KrJqP6< zi)=~gJze6@40{n^M8}$3(>eR0?ucEm&w9cqvq=hKv6;w@H)>?N>!G>|@I$rk>hkc@&G=z1qrBEgC5ek3c>ivMwEgj|2 zdcYMb$u$Orml=+3-tk5g`_{8z8E0GZw>fH8YR}^*9_|z5IRR;pH(uIDR&) zDHz^0uHn_Q(3pZQ&M6c;Ao^+hCi(Y@kyZNur&X*W#Uu79mhc=BUd}0)?h~frv^{bk zlhX?}*7pTH_Hp8O`FAM-m&S|dQRlT;JP1L85ML*^h1j?<4hbK+r-;3GCa{A7SxnJGCtc+3LfBRTaKX(pJdl@i7 z`5^NuhvMKB**>@U2>c@3joB+{aaCHz(LEJ94)u+fe=p>}xY+swm1UOxi#I&S4R+A= z_V`25IR1H@+(*Hk@^Wwb&6J}4M)Wq}qNg+DyBS$ncjO)!gn?=M^ZjSWIPq$Mh(*Mx_4ysAotqu_E7#9S-`wwx`At}+z(2g7#YMF#TKMlOS!5Koj#2`kE{P?xoRpFR-l%j(_UL-k*1_i23I&x# zTZ+_brNi^hEtjz|Eoq*4+m|MWr&0R)h%5)EC$2JF%((rgiQ0|} zE1n1CYPVo@U-YuwD^WcpDsSJ`Yk3kMm>6)$DR(F@0m@!_*&+-5px(e zVR-^b?@RC@3A7eCx&g`x4=jsHy@&HI{%eZiTNYNmEd3tN^Id*Ux;6JQIiiH5 zTb=%W-vavE$F?xtV}@@L<)l7=e?>bZb@$3L|IOdNDM^3!*c_;Sc9iz&wAo{QFD32L zVZFur{M$a`8OFExKawH;YH&{K)Bjha@8=T-(o9{D7;LW{r^MI-^=0R`RCgIk?YIxKPg`N|F72HM*pkU|CYgi z>tiSL{XD+)151B)SsaLHzIQW8e`fj=)V1gSQe39aEBf-)dON+x>uK9i{g;&jBmIAc zS3ytD_|L^a#(33V8lWd{$WA{DhhWv7n|wYb{Pw~v6z!E^7nVuF&F^J@e+1PSkF*** zSu()^dIPZnFZ;bcQ-0d+dM>E=*TRn9=fTZgQZ&!Z@woJhHT;%8)+ffVL^i8mBAi}0 z4bFtXDKTG|K6u|W6IUUw*OR%0;0(X@eMhB{AuH`xaz0liN_7jB9%e<`K-+nr@W43rx9;=uMPn?&TK`Xr?tIBW(N(kBu6j)`*@y4tuQ$(8)( zaIG-zuze6Ck3>}H&Sl@=^#sF4(&1G9)(yi$8cXcbH_Z2gC+Q9w?;FBzs`{B}@4l&b zSW}!dWXCY0S~fZqO9t*^GkgRpwn!@=8&1 z8=!%dSJKUcV(N1Cac{W!Mp1nFMZG>J2sl^o*MJVK?otDQlDI73US1W%3vUp5N}!}MSbEKtod6nYUg%)8PY>w5*pcRdFcrwHEHjlO9m_vq<#0BS;i zkuU+l6aVQv=iAo!?7JVS_jrbvW7CEqctT~MRY-i&N3jw%QfueMvz}nDwsU>F`ohIRG_nX;a82GE@PiiUV!W#fN_)dgRhGfSDoQk-H!E#V?jy*!nErXOgb^6nj^DIxXeC%L&BLK*A<;s>V)#e$T zsJX$&N%>%xflq3e{YSKc5~HRb>s*3 zj{CrptGbLdbtX(|Bh}Ep^q&IC5pRY8~rjGH>*yXbg@FhS+P`lKWH~OEOH!P>gCT+a51@ zR?RPOPE_)6mb`L(7>;(0KZVk(Y46+UaAtYRTIN+?dfM$bwMQUtR3n}>WP!56x~e2I z9!MBACB%Y}m?h6(T_f%xdoIc^_XM*j^ja95CNZg!be`6KS6)G;~y~3 zh``TXQ{U&DqrwEZ1H*obW;QE86eyu7VeWZSYg!Knt1crCY^ zOxNFxd7J0lh2s@uaKsT9dV+z{`=x57cKqvUpH#RXwc|;1xkUF9WK;$7--1&Z8U8y* zG9=?3o`w3DuLX1WoE(U6X zyyN=ay)wZ@uQW?IFus(I2|mZKZY{lDk$rVdmTj}ZalM{&$qE-XMbIz5NxbcK9y*VY zecO23r#GwNHbY{X6crxoR5$y>+R3RS=QjIqmQ^I~$&12y9YeSEo}T)zv(5qm%=hg| z!;%zUI}>4R#5?}9N5P?TzC8><-+J`W-g>NAH!R%##BTL|2lR<@lImzCZ7lQ*>NH>3 z#+75Utf1~I)nS8abbCMQ@WcE?pWI5Tb$>!^6*@ia#5~a*24jUU!{c>fnZE>XKJhzR zkr;9CHazSiAzVz$CuEui_P`B4)cV2RD&_+x+-9D0`@ScNX$(CtlalD|HxpixsX8$Z z4B%9Vb(?aX>$*@%B;p*(3LR{|J`=`K&5xKYnTlwC>5)za$(3Rsl|vu(q!m<|7wYsG z7zk9UoKpka$JA|7;e<>bC^G+8GwJOU=aNJLd1Vto|1c^(y)okX9;HQyNfpT^`82XL zAB=z{y0~AhLRLzU5#bl35T?0EBp0C$`l1Vzqu@lT^Gx`NST_>Dr(}sf;B*=-5RtEB z00o^$sFN&VuSmOeZKf1dgQdJYN$bAd#I#()N6rTtW17=^Ssm!tH99ZaBD$x#TYNzu?0Vk2!NjK%l!(nmh|OV3l2e^v+ggt2r!(ZsITwq7 zF|E2Ck~Z+#iiIBwVjWmG5#nuCdQuE%3fK;@N6xzAr0{0{IIoQ5m`2;1aWpOx84jF2 zvUlQpxR~brS=Or*P{ghMqdvF@W8wjE!i-Pm5FFYey{#emPBi`82virbwWO6E5xuTJ zf^?$j)H0QhQhFs8DKt~4U~Sguxj=m6DF4ZaiE%K=kfCx}nGn}~?(OHqQXM@r)**dw z|ArO&`a`PNi=buWgBR*|DJ;Tib7CClAujc7o?!{*!bD| z2OZ=z(8T6IL?z({4DT?<*hXFY4y>1KIYbRWmNN(vz>d}ly|TB#Mkk+Qq8D$>jmJ@2 z)z;L}-1WLvGn*Y)ADFXg#Fi3OL&bztd5ToTpn$|^`e9T*6CtbkoIqR7YXiMUg=o(4 z0K2i5q0GDIKGg%^^Jf~HpcFT)yxB^sK_p_(s>7z`_oC?}0}5M>LF6OgmsQojwkdP>)5(m=9zvY};lqe@E`cV(*%YEAWzhV|CX zd3Q2C?dpwP#Pdxa79M_`krS@>3BYkj`*U8i3Q%$%&{gAI;DzAu68jcC^JP8nAhlu@ za9l;I>UaF)F!vA*vQJkv18Jau{Jc?&4tye5`Wtg5Q*1FRNuYgh%~QKwy=B=3i&$LV z_AamouEsQp!W<)(Es1y3bY!(>2up%4{wF^}T$+J$3e2#eLUq9n%P$P(=#$JPJ@!rm z&+Lbn=x3ku%q!hVAGtC#Jm{=-UCiz}Qti`?Z__k*i{g$IJNFq=2K6G@9pbMnF=dwr zy|NuEFnw6GGmke{*PTOk?f<|(?xXMDf5gMlByJ%r6?>FDnQWz0(dgaA`YgB(3F4^J z6Q>!+q*fvho#;d-Y0W6fv`x@Cgcdy4n5pZDV`1tX5m9B{;4HmzD4LJal34Dvt!xdW z5s+DKMOH7#Jge^-C~c^1Skp4|@>RZ|XA0ypFy2fh>?^Wn!x@m<>XC5D4Fw$<#^DnL zSJNl+Ub_*6*>;4A+Ys?|Yarpt`PZgh3WK{xpc^t`yw@UchUx!ou#OIAp4%&o<>bi{ zFegmmlOJ|T_QyUgzY3}|M2RCswOAT6VWp(3OYwQbeu5XD(W%j}?KvifEhT5LD7{F{ z@k-4>u#7gE%_cSGXpf>#EMG;qTCMxdo^y_uR+hqLZm!5_?P05?pP+5)jc3e5O?t@! z`w*4x6uW+>MCqr#Rqo3#jY;ifTb$G?UUPh*Imkit@YKhpI;Wap&ix@FwU!Dt9-dn^ zjhS0NE2<*X(3(yfJr&g|Bxs*X=MGo0n=ktO{*qefTFJrBq-Vxx@v~3 z3cHSHS@BKSyU(YIB?ao#p=qZE`0L&h<6b!e(dW&fFR%Agtz}*aqN7KP8nst02Xdi= zUMC49MzB)`V13ldi70t=L;rT?WUT=zrDRiJ!G&H#-Sn&`Nw=t`vC9HlPgst?<%WJD zq{AZ8odYF>PTTGCef$gRIx+U&7BLL}$8pF1{X~PFp7|e+>6_oU)&B{H|I6_dCw2w` z{7sVw`GD$VD-8E%?W&0VV4)jNA;w+YrAd9dXaxtFSpNN)boeZzZtNyU8Sr`g_i}Z| zYgA5m`%^XTS-)v{#o{Qt94+e>w_1OBp$?6&57SUilzki?9Vk+@?0d8*DMN5f*mgGF zuq5Qr$~}Fa*8b0tH#_dn$Gi5|2Zh{B#3RyG$RK{sNEFI@1N33ry|+I}%h2N1*A86x zCRcJYm_gkmI-DpP(ALK4{(gPl93}gJ1|$!~b*WVeY2YtZnUL5jVs4X=-p`rIWh-JF z90p0@l>QVy!UicHCG6=qG*}U60c=ssfUL;mWa*SDX$M7~gdycKb~wY{PbU$31;b9X zNOraFo(gZoJqJ7$8fto^)qrQjKJ|f{Iw=rmQ^XJ`1{n@0@p*VLUt`rCf zGM=@TDrS29k;2&&XN!JQpFusQ&n+s>%Ky4uzDw3jyQ?b%{)>e2nT}?4T4E6FIPiA#LyMg192b8vg_GV(hm;Q6a=&~TMRr=&d#+RkRMl9)A$s7Adr zc~A<*wm#9$8eCd{AHx2G{r6mz8?a*S@16dc^PfM1l6SWgqX7e6RY_)0L$RRQZ~|V- z=-7Df=cjnj;2w=(L^Q?^c{UL+GRl zOs}rn19Hl;4Lw3+RjRBtm#d$O&eS}UDol9#S#-WcRC%wAw!)?;$fHaq*^|wf>#P%) z)h=6-_dxGB!7aOFH@>XqSLk1-t-b+@&x|s1#FK&aD@AWJ-{ZLKT(0Sg?8Rz9xWEkK zXtGYd8LF|ihjSQUcG4;l@)SoR336(<_ZOrlaJfHAT9fmn%WfEC6cU9x3|AR-V3`ed zfCc9^pli3$4!`H4jYT=b$mnxo*0^mVwyQBr3B!ZDrtUest0&uozo7K2idV-}aw+$l zAB{IvDQWwvI=wA&U;lCb&#N0B$70(yCRauclKLd-o3FLsFm6pG zC)3J)b;)&>+78}E)=&?gauTOHc|9+u@0Gv_W5qywb!5WU-x1d|0|d1|L-u? zsrJ1W!v?)Mt$G4hMH#mM1ztx^hm+f$zY1d#H!RJ1nP2|$LGV~}p(Z}VueD*x7Egf_ z9zv`6@xK{!oIiUDx}RU0+P?mS_N8l_H7i!Q#gwPYi@cWGdGGwL?X9f4FdX=LGfH9U z#4uXc-&kGudo-Uz>vIc3(A1Dh*NFjC|7&`;zAm)^B8)#GlyT@+0X?qJuWO2k4|n(^ zY<5=FQPN9|wf8Hi+5B( z?T8SQoU5s2gjP0z4H-?l;0XN!gz!@NG-B`GB46%c#O3)t%xG?tgW6itu?^M5==xP zMoeTUEQOMi7gqq!BZc5~EJcD_F9wuwU$CYeZMYgs21_MnE;*4~ix&r+SG6PEFGmY9 zB@afV7y={ZzxfL0ye5|`E*)1Q$7%-J$+{tteaq&cGTQHYshe#DR%Oi3d*S2=$nU z)XHvF6FXPd=d$;6KU3|k+^g@T@I*Xp5`EP;POdFDPR>|>f0Za#(&Oe0yIDX z%!&aWY!O(FF_&*j!Yrp`E4`aRnNcA3y|Ltpx z@xR_X%91fhYX18sslR-N?KRo9!N zsvkZv3OW$4=G)E!kvf2=BZnN@;ffM7dgp8yz2syN-sEJ_Y(Jm6c6D7{ZIdMs4xA1j zz(a$k!h(9Ic1h!o#L8a23)(#9c}=Z(TM))Waaqgrbc237 zpQ(-Dp}gvfxe_h(l5gXF_NxhLEqCI9g=o)pO_Z7WK!1pyLvi8-{n!xx24d_4?=mW@MxLL=!*e}M^X3(>5 z4_Yjq#9gv|s^LN*-cmN4YXvVUoGb9M(4_u$V$1kmZ8nt;DJ`Gm+4S*xPr-r1Lkl~j z){tnoHd~*MxAOEKy5ZxW#x3c%ZQ9)7c_x>%GW5(~lN)Yfwv&5)HfsBfn*~sJM|?cm zFzHf9EaJ+7oK6)-rmh=%*3Z6(;L!6%%U^5+>t9Vadm-&FseC-pU$>1}HE~+q=ITXM z4;rq-go_Y2hH9;+Ni0h~fisj5k_+;Om0~G>ylzJ!SoimZ!)-?1`0N+8RHICZ)bVGx zNYD}Y2UbbT%6e2lB)8;@lTsVQ)jYo30?;2TjEaULQrV+R+-tJu?%~OlW!seRujMWD z9vZ!gYWP8)ZaNf#T$eYt@F9X_X#Ns=(bnqZJ&PZ8q+Wx+Cf!cYmgY$Zt{|o&BPA(e zu(z@AqAFnyq6YM&tOT=*aZDnt89qXci!yK_ua||Z+bO3FW~8wt~|%FIZI9d zYE+G}aLkFGCl!qzEuNDrH8?>7v}fA%MrbIO#%&p8PYBC}U^iwGd+sgCrzsjI+w1m1 z8B~sczp1i%avymH%&gV9HI7X_GcJqxY&(lkNJvXh5uC-Po;;k?f>QoaJ!6u@TV%VX zKe$nml**Sw{L%1zlGvaj@hjZf0*$FLv$0!5jj^C<$%jM2c{>0fwxhDIZVIMSEpejWW97WhbDNzyO8xtFA;I&dCt^yTg z_19vJEY?nuoI?dQL0x>2ah4#n`7%fn?CoJnPAh`x*}slW|5XSJEAv01&KgrEzhR!C zhp#;$JNcBtkf|Za9nfoFS1Q$P`e9wtAL?*D*3M&I?U2ZhngYX?HL8kPNK1Zmh z3_Y_iuw|h(g3&%%WwG4Sd7F4@*pum3zPP*?bzzS-SC9$Pw}(QEC`{`GO(AAFFdkMx zk9kFW(yotM*~OP-eAGZ27I0vOWhw_G?g6QUw-hq?FD$S#Virrh4v|3eEpr5#W=kw{ zUPpMnG10^6LSp)n*|qw^UN#7u<23MAQs7_CydSL5>?}S~**g+XYu`sz%_x~b%FczU zqWMO!X3A2}nNnFwVCE?+Giy?tOQHy2noIPP&DYO^#S5vO3#fs_&ua>aG~vxL>++=5 zb(-uD%^{mL)!T}ZTzv!QD_t58YPfM#{2}iai^$SKIR@m3DMv#CBKZ$dtxOe&El$N4 z5SXJaCYjFps4?u5)O0EnjVdrqvwq_ny4xZ%$dKei%8RiF{l1~g9Ee1c;eZ|Acm^LRcEM4#Y(~xj)j~cuA*hNH zx2`a^GZKvcRgk+2 zNG;elL3vmz*?Zzb`nacTj}Oi5V?62TO4B5u8pZfvu-v-dNu|uk$qR-znKoxe+9Bk&&=?TLzhb}$(ZkH{rk}61TK{zgwYEC z3hx^d%mb>eIX`4Y=V=bx;cWXF8qY&5-muvL5ll!WR@{DMmle*ZK)d8^BTeR>ciw#m zZxe^t{#>=|GkufSmD25IlXqi{qM_<-ArDGoU2e_Swc8c1El0QA^}3W%Ll{T;$>Smx|6T`a`mV9wJ<3AtAy zLt(tp1q#}<7SC5cnTG(_DDGTNjFiJvvYvI=a5(mL=;P1>l2{nrgJ>OOeq2X9H5Gr? zWUa@frjl8Js{Z74F!!Im#sZsbK&LQ`;pBu>T^3a_P%d7TCoFYuuT@gz0b*kLPxi$t zb^@`BbQhz>R(g+*6@WE0dPw0Q5EJ#&m$&Q4j;0V5C2f77#n8={)HypIe?g>8!KWNp zy-B3#&TD&ma{$jTxO0fbGkHXF?s(gkGTl&szTe`YW}LS_n+5941HwHfj@w30B$ui} z3_+Fj3G@UePHL)^Vih-HqtR%|LPfI}&8;hVrwBDQL}yS!I77w&hJd@vi_euF33GK#H+BoAj*9LTzPIHAO4$sQ z_uyq6CP=EL8etj1+<;b9EYp@)hB=sb@;$%=u~rtdf*E*BU7iM(OFCpBDjRIxiW4ogvVKdE zKR5uhLZ_F+iy+1|By%Fv<1<}rzHj_qbiV$SQ2Gc(O&tp^*43>W@;(N93)QFH*;AY6 z=T^tmw{fX4cnN<02Rlyfr(ujPI*01(9o2SeQcbW*^!~=~bKlVN&>8rH*dSKiK|Isg z!XzhNB*d5xA++YsF}a)ykydJ5dLhe<2}jL4%)eYEaP53)5TT@bqpnM^)Ixtskr{$w z9^KS(j8{g&?@mQiY8J0PifT4{Bm;KBn8O8I7l*WLz`c+-ba?caT9mqBhw#kP+w3(X zEpmz7BZbX~(KTocBap)G1U2V27_XNrEmG|n0Tcbh2C7J1w3#AD4fZ_!=WNPV7N1ew5qlN9$>-d-C;Ha>Q? z*1m<-*CyJ`?9C?gcG*83uKwfdlIdV1wvPoAtv)51wwtLp(k zT5GD2qqxe}6QH=tb)EM~>$8!kSWZL8r21QDq{pVaou#-cdHu`Bx1tE|hAUoG$|l<4 z=koW@!aCBpqzK>pvuuofAulOjY0%sB#QY-$ZqrZ5==HB_cTL>K-#t;DPn>5V-@zdR zMRx9s-x-Eq=;r{1e;~J}J!%9`dLG4(GUl8)hC*__Ky{Dmwf|$~`0q5ke^?9uyCJ;P z9E;v$Md*6}F~!LrGekx2oh9VQAz&l&fp#>Pm3ueD_a46v84@vct02Kh6*7l01qt7O z+BQm3K8t@LY?MEhg9bm<3ro2!dlKX9=1t@ae1OY*VOt^%8xFq)s;W8O8Pwa4c)29z z^(DJ&wkSl7CM4U!$ zRc0uv5V829)jpr3<({t@yoie%GmKv3%t=oh(3eXrH(~CsBPMi~ygV@r0p00ct>iH_ z;Kx@77bq+Oj$6nwn^@XZqG{id3M2l*yPUE38iy`iXqC)$KbqesPOWWZpH!O@5Bd@X z$2F@$b(4s-$q(l4Dreqc(MjBMa;M=e@!v+-aw;>jXjx&-t45zq>f_e1)vl9UCt8Qbz8+`qU{L(OvZINq>h&Q(ZpKglmc!j5E^&@#xCYF zM*qQhyH7M8`_tTekJ7?T(&BA0hD0gv8x$geM=S3u6bjPY7S0>&7_eFX->vlLuDk3I zj+vf=lUbUt*5FOZ)j;1hq-9cpC<*QzuY;Yw!+p?pQNC#4>m&IT%(a6>Q2_~O+eXJ{ zUMaS(!#}kOaU8AUEf7C?2`kOIu3YYEPrV9pjFbv15!I&Fk}c|u7=H%fvsx=iK;v>7 z=sdxT8<_jLK0Kg4+^Z5|*tkg)L#uK#*H^_Mg?KByQuuB@!B(SP^>W@>)0_qv(LOy| z3?%XN#P9X)vM3K{jJmk7{>&Zd3r9}Ld=e0PM*E4||H+N+)?1p9^Z`VZawWbhGB6=G zb5EE{4$NKWKvH+1+;yld?e0$|{Ugaey75s=5e6XcMA3T$V^_! z1bJe4M4pbm6Rp=26@O)ctuQMAOFv_&mOBw<7u2Yl`U~}8(dY+Gy3_m`xc<`cHGqG7 zv(u6e|Jv$#xRSwkV^Py(lSkCRu*;M!Q*>Ric#*NOK zO5a0{B=_#0_pd3j`@CihHks9TC#%++f+jRQx}yTp(d>84Cwy(bk#F&Z`;KC}DvI~h zpRKaYZ{=aiCuf_*$4TZ^ZNVAe>lLFY+NT$w&Ien)pK~*sasBGG-7AIV7nfqW$SHR* z;h{?AP9s36wB29(^6DTHpVh|fI|YT3MWnH&Yd(BE765V2tnE^3D3z|~33zjs)PZ-3 zZtoZPh)q9*|Cnk1I{`x$Mz(*;G}`~lG{--qCz%FyZGQoLpjALerui0vkhuqE+S|U8 zkM4?AaZ8#mX$Uh<{?$L4+7);e;Wfr{ThDNu5`MW(;a}rdN7y`{qANQQ@6WRCCECw) zJePr@8$RcakFU>sTliZmS1Ur#rxB<8;RL|WAxhu`{E9^Ud4L@Qw=-lEN%4vcCcrwD zJxaU)s9HU0(O1)w7R;#kz{8%g4-1(uaUF+Vxs-1rDsLi^xl+${BYGh_T#2gY=i=+! zr{}9$3QXz5PzKIO#9v_T_(sn&;LEG#M)AW4fg&o-({kvI$)wI)%7Ru2ptUp1fO4{q znoOhSy>N`Q%*2>kn`Q*1=M=6RWeDnx5EXNT&!YHNun@u+!-otog;;c@bMikY@4EzY zFrRq8rlaL+1CvetO+>2`1%NXADptDgyYFXd3xD4-j_$AERTA-mqgDYVSM2YWtEgR{AA@L^r-5%p$U z;gb(@`~Ai^z@x2yR+HZm%YKZ$;F+t8Q>TO!M$y^RIC2nd{Jo|^FUl~tk9YEGjq)}u z_$kcXKpcH-KiV`288@k0PE4BeB0!dNnCn3#hy>WUj~Yn=2Kj9aCaH|H^TN$s`bVlD z5QT{<8?k#+(SUG7NKf@T5rYxyoq1mLazw$X!hqPe=#Be}!s)M3yW$KZr<9;FJKvPG zk@=!n!MX^tyji`uhA%_om51a;8nD<2uMecsY^>^rJSpRgl77y3L>ZW0rhp9bM(;_W zg<(S+oiT(XYgoraQI2jQi}x2K#V92N?UK65M#Rnr!G_nB-RlI zvL0Q0o#laxX(>CCvT+F1Q$Bc7eP6;XDK^E^aI9t%slGF)=1Lzjdly%9bBvEC>7%Qt zh}N?aRr4f6Lq^MCiE+krs}r2ukGf&#$Z054$?K`1Y&F9@?@-GD$qF+i=lwRi)qr=T zVus=1Nyo9#Eff{orB-dbf^7?H%bC<$hP7x-jkE?T-*B|y?8Mr%*{;F_j7UGm^~c$G zdFAPkjD~Q!RLSd7xe9@-yyJw=Ft7)9?4A}8^YOz;l|3yCiIzu~m?Mg#lCv(sr@CJj zp!s3Z3MN6o7KB`z<&jJ9yl!c3dFM37!?UJ3y&1q^z6^-u$}U7{?VTl2nnwJZJ;8&T zp54pqIqW zCKDdj`e~_OQ@+u#Gn&n7jyay!Gg?!TyuasaXlHZjF>yLPsYOUMkM5upW%#8dj z@Dov+WDH-y$6LPJjyXRuH%qqJ=xCnHUOs0Fj(PFlU_=bGQl=F!Xn_1KZMh+ST&SM_ zf)3^OrRJ77{^VKB0zEDZKw(Nh2B46?Hc}{ah$}Sa@-i3a0Lh250zv@cC~}?k<`~Gq zE8akYjpd|qB{9d~S0@A>>q%Yr=5`%t4s3KfUnbgy2VF}{e>}EoXR4W%_^|yUwW!BU z`qnV9z>&n<>q~H9C+mC`!A#&I8hJ&~^LqtkVo+cBkLBaPV!$&n{6FrEKeh@#2eALN zRZt-Lu~ncSHSl-!??RobS{2HaeyZnrXsppw%(o_MHl?E=KncJcAks+Wjo+95uznQM zFgY11hj_4BJmPBlDm>4b`V9G}uL8vb=SU^odPiN6q>z}p?k^@V}{$GRGY#PE>9=?Zk!|LrH%EVv1 zpGBDtSaGOHB6{c+xdx5mfd1V;6nd^K22hmuGj{xj)Y1_PYYk z3I^hI`SB$ILCJ$=hHDZ#_`(yBb*m`=KxO6adUW#{xn@39`9I##AD+&)Y82Ibs%y_$DfK`e=(*vz9oq95G0W~RFqJXPo6b`90 zi)mbH400LEql`4Z%TQW@@d?izr-Dc3<^JiIQ2dnUf6T$pgVZ zStZun;>YP>u7%)*_u@2f!S5I=1x{6raR!&Kusc~JXJ5Iie}S_4BSluAL5(sy z0O_-pL{^%1Tvvtk-l2l8E~c z@V>Z-4F+%AZLx>XI}6tfC8x(7rvqYqm{s-DrtKZFV2NQKoER0EbqiZZF$K#2nq1z3 z!{D-h+n=l+@*E<>I;w%re*&*D8lSG5e~03$CW{`$+ev*UnTE!8{%Ai=?|OS3#^H9}cdzytqf#qNjjmMF)H5#h{c)Uz z_R5Hm6eWR>DTNU6vKzOS$NMXhNXhA0kj<;X;Lnj0Ima9`54JeIbr6UKYZBQ#0G!t1 z4P0FpbMGmHMquNE3C)hyi7`!C+ZJXpPiZpifw|Ln>)~6>^XW!!Mq%W{!6s0F;aFjG zw}#5dgjrB8CS*u>(2ri5E5t<>>-_63G4`mh-GRTlT?us4NyUR(LlK|NOidrKM}uTN zZLha}^`{XhQc~8aL{Xx^{kuC}iyKAq+{- zv{AufSaboRKhnGF$RnkRmq{uuUYKFb7crncv#ftXZNw^Xoe;;9+>kpO;EBi^-1WJ9UsAoGH7k;$GNkY75vS`d3|s@b=B7^7UV?EqRZaO#tx?#t!}p#^ zA~Z~3HU*;LiGd1o1JbJpC;LE4tV1`5Hz6#lUIK#(N+G=dfa<4P^@%sUY7AEDj94>| zw>vYxKKS1}74_=7_O*EzxPrr@u*d#Yxtc#Xf0TTq z1pM4AOaYNA5T-j%TPQjPX}+dlt>>>>aFm*!3yS{uRH7{dMRb z`nhd6P?N|N?LN@PN=A~nxoWheCDG}UX5=|xGv;5a3a28tkF+p*K#)#rE=<#@y$3&F z-Zx;tbGW-EaA~?6zLKKSoPl+OwwUIx?Ue8JX%D zSCf&&oR!ckk={GOwBhucI>)8!i?Ol9ZzEisoOD5x#NkBS=`=`4tJxv$zj?RL2bDuoB_)t)JU`hl_syfzO&#D{46 z7uHm7|2CsDFdiYZVzX5NSV{9c;*GgzsBi#AhdVMOM}~59HDx{L3DkUFy!mLxqrE|= z5k^HLaQRCIZlkDvqJi=vDmGc3YRp_NRh1`7QXH)BK8x1JAk6T~*kTPR1huntNMY&< zg2Zj4RZq5mVWvW>HB8Yyp1lCMNu!2fS-*RrqO>PwVmPJycar?sZ=N7Y(yIDwl7`-R zgG7A2u)Gu1DO-j_l*lj0>ds?Uv(Pf_a41cD`swMGh%)lB%tgKCZRp$Cn0~?N^6i5O z2E

&TESel|Omz3gIPf zcP@C{LNq1N+=E0yi~T`u_EzVrALA!LGq(^+onVC*e?VxcIhO6n@Ec#8&ex!zjm!~RSSQE|4&i=9v}T@zoLQTbmp)oKGl+mlP;Gl2z#B~=n3oL*4=c4fVy*^QiG zOOF*e810Zb*sZm6ds1_wsl`l5N}tVd)Vkq!vCa1!GluC$BMMqdbL$C@5X6uelX?WXwP>*ZC6C(Y;@43zErzZaaR^G%hXC6 zcgP$z+CSiRv%jj-V!w^<-PBAIA|3xC_u|A`G1z+_$n~F3CtL!pI<=&JQBF)(Co)Dv zE}I#ld}q%NZ+JpB*obzK=(Zh!g59^Z!_n)?P-Cd;ZZ*?IC2*sDfXNE;fH~;IGgkjy z)kQ2{7r*#T&hR6dMeim7*in(VZcv(SF`=$QjizWT5aIdCM{X96}mKF{l9DnRkdi~4k#pQ+meO zbOUDKK&Iq36W->H`|D+&rmz(cAH#jXh*0?8d}=g#4@wp6mpeJ^$QG@LFEpFQ7|7?; zNPyTO-nTK$&B2U|x1=g-+tckRPp9P?^Gmyf2l!VPj-TI$$;+uiG^RJi0Rv&iiM^+M zk~J<)s7dxtz#8c>LUh}PLG4AgcQ*0E1fEmsV z4B*_vBUCC+K=nj%1OhNb!(?5+-jeo0epDJa4!w5SXPqVT>9&yY#EvrD^1*R-7L_ zB>p)o6K}PQmHsL(d)~$sqZaBIYgQj+rM%aX}t>fJt-gAw_MJUbYkkomT%e@Zz{W_B4W;??SSaAiu-63ly-fddFA|FvT+HH z7=DvS6jb<2z*IJv{vYvuDw2>USxtH>(twkIoA+X)c}Y2C#&EI^)gd zYebdy-V6*Vc3_F_J z=`;JU$0^)>7I~F$t+3*U74VFPE{Zi_l#hM+7B*T+`$@2$Tc(^^lBkYoHm$;6kF-Eo zBX)61a8Wfa-F;%2;5CXbhiYA17Uk+xsKgapF;_mh#E>oJEIao)O|Y_ne6*XSt0>Os zOc~?|Nvhg#F~gdmOI9R{@SIx1*0-muOnPpoV}F8BXf9`wEJ!w1g!v8j%XJCJCGY0+UE zz|4uWd+SbQns2Hd;F?}lk}e^ld3;?IjS32)99Voa+t@h%8Lt}B$!;w6RVjiqW86n_ zo(#8C?SFtS`g2hE(7Nyw!hMNg`AD_z8q!af=&1Sf=!oxx(mbrLM^sd$u1A!#7$FyG zeEPB8qFD=aZx;EmA|mC&Bc$vT^klWYiR1DEb@WnlN{_`XD=~hQyEuXcK7HP#0ynCV18NAidIa(2)R_Ivi|MhA300RnR7hpq_a65mx zE#;7mJ?Td^eZ)!ip+a$IvGP5bQ^?*aM^>h%fc*3$o#Le-l`p~C3;;Mz&=Im8V4)fse@MJ+coxUzxM zzjH`YBqgcJG_C+N<5M~bxWHv{ilKg_a2l@i%}dcoD@Lg<$d`M&@XFhNKw{0M8g%Av zOQTo>E|r+`&I0q);Jke1>!J`^~$He{7 zpleNrgm?n>*HL&9Vp$lYIHTK~40IDReKBO9FzX}BG&&zLFj*hVf>|bF1+Qem50qT1 z7-J#68GU+sol|;!Ur@~GSTz5%c~5y8F--A|a9fJPbwZfeoD-z0S9Pw&N{Z-!Xx||s zHCCs?ZwhzKQWupjohLWTIuh;_U2LjaLE%Nta=`t?JPbjl$u6nkhVKmVn)RR(9B;s) zSdTM`RYE$D-BQFcv)_Enuj`LgV)CJVNdbA+M>VBI9o8KhI)!~~H*5DYpZv=~+kpA_ zz~h~l(0-+Nu0^~k)ffb?S2$#aX^}~cDY6|8U)e-@UiG0YitVkr^t$;&9dPD#JGw8r zZzIcTKc4YLKYoS}$ z6QIOrs*$V2XX^n#_I=&rd-eLf?Z=yms=A_m zl}6vTBs{kRuz{j_3w$38yA@d@i43@MT;&ICD3^C?tZ5^nmV~MqcWRnV_T*rltUb=R zM`U_;>i(A`WJ^hG+kma3K&;ukpuex~nx$?P#=B!ICnUHjnlo@Ei1d&+yFa#6wxz`Z zxMeE07&IBovN0Z|yh(zWe<&;Bu}7PF_jR!oPI(L5qN1d9-ravAm$7mIEK8MTFf^+{m0;|gWn zt)w=tz+6b{9pj3$WO(99c!&l;=$#t7$T@xMG78B(vtd(j;`WI^Y_&K{=wTw_c; zf(SMVRR>@SIk93)JkT6DeOjr!R&I|teMYFWeN86SbBl+<9rM5wqQE3~8%?L_|JuK& z`v%IS$(Q_3g@g6K<6bc`{G0XNKQJl>KNywcAB@U=tO!~J2o^6$DrD@&kEJq)yTx%l z$0S7$pUNinT0Ch0JFZK?9F00ki&_kc>h0QD#XotZARl&%r_d?Bd*?G9Gc}T8K#G1& z7PH%+k0P%K=bw6KY>yhBooe{JdG(@X36<-5i9^~v>Lpz+mVRHKV;BHN+m+9~x4&2z}2OL}+-{^L+wF`N_$x0JCrsuyBpftJFh=ev86; zmV5)bmb52{)xX085CeqtnG#T$_Ig=sai7$slP4fe_x;zMDACjBb+bc8h1wi|@LHh?RoXIChkKhCy1)z#VOZ~5z>#h{cHw-}#++l^3jhy;AeBL69MXAo@z3CETmBa2UC$>ZT z$iP_7lDR>qz3xTkRzv&ZJ#7fhU{M9^d@tjAIOY&2pdRU`5P2DN6G(~J$-XK=3)(|l zZ3t?M2-l^hjfSf`+C)^^ZI#lBuvJ+4H2N z_efX=Pxs@8xyoR->k%nXJ>UnV;IjbQN zi788~LY+jW$3MlxO=GHrQKo^+)h(tHJO>>fkCSP+KDlCLW|0i|iWz%Nt%j|Agt|lX87v|H}5_~+vaEXEI zAYW1D{99`y>Z4Z%@Fxuz+G^4ynPUW34?{ss7yhOVi7{+M`C?jT@V4q$o?AUymUgMo zu}xZg7RhcjF2P=dhp0)?*!WfOR4a8%oKA*rZ4t=nawl(@+D*dEEH$*KYAck?#Wqt^ zNw|iDR4gbabB`{R|B8yn^-teKw|20UNNXsB+$%Ho>?WOfP1V}>pnR0^5Dgm z-tO|NiV(uP*G1P`8f0L!fK$_}g|*sut67;i1y+W){%-jjFZbopDbdLS*If{YBkHr$ zD7wFy$vf}s%=}D*wK(UP3tMk7gjZH8Hl0Dp`~3jB){bZVAJgD}$K7K4e?-7FrD8T& ze@;NvUVfPLkN2DV8-tfG2lwY~Ska2o z0!%zTu$o3QtRILs7q_mj$Lv2L-eTRm%;_g#AwKN>AMq>edlu60s@vcY-sif93dM;# zqcxd;zCrl^z<9S!@|T$89kT+zpfbrqb4^B+cn$QVEY!sC!SZpBi{f&ouvzBcp}kcl z#|2Db@kOGcFuH74`t7qA`=HI_EN}+H7?GZs#V-x3OV5`yT6hGfFxxQWp}v6>52%v~ zd0G@WGRRUx-Z`7iYr#;~CzrJRq2(lMfr;x$Y|;}(A0Dfx1`d9uvZ}Io7IA3j*Chw> zq}Ciu6f~H~5Qa=^|5|q{3QUnE^gdd7eIs3v#VHVvSJ4(#7p-4VVxUf)3k{~Rxj`@< zEkoD`QesEH(Obt$80_bRAY*8MAU%w5z*|5O&oIH6P^@nS*z5O)qv)0hsV{~g+$X_s z`Dr5&rMLX%rJrj0*%DL>^+V>+1-j2ZGf6yIrg?_5pj*^M6bKEj`%Ma+445zq@|_51 zscr2t8H3Bevqe1CLaHwKZ{kJ=M#FF}wv&BEGo4W4CnUuYd(YXAB6!H=CR$&(*SvGw zUlLG#pUSR`aCL=Qna9QSE+5K<=}eQk%iSw&cbyq*g>T?}KCDsH&4h}OA}D&7J+i*; z#J7cKT3P_5+pF+8M-I|q30k?VbLmBNQqU()ExIjUQt5r4d7n-+N0R;XIMh+dCcp@u z?P(iKIqOsfZWf3ac~~bF$}d_w5d#xmQjo0NM6hi@M9|a>h@{AiDV|jnzZ*#?G(~fmN{(%~w}N0A7f8%T-k z0(Ls)c}5>%q_~QPT~07v+dGf#6EIWOjU?+*Q!FG@c}NLS>yQ8=!i8PcXD%V-q3Ws6 zs~OcCUu*8Sla+7o$BU(#t!rd(J2tUO7C&gi7%AF#InEqg!`yf7YYm^MyIyz0 zH6xKC%j{+T-3)7J`nJ_d#0~R?V^o%sIHpUQZI6ybeVmoO@buLd zDmO)4g0q_DH&Ajq($BcpNAsvcvfArpQ>%0p3};0a-Zes`ScFk{XKhqF!ZgV@VLV3V z+^nz==qN~MJp}PMIEmu0Nmpwuvwlccvn6}MuF$&4(7}M&nG>w7SEG2w)2h+Ky!a2{<1% zWDb$lK$G?t=6HQsDuogQgif=whUQF@?_8dw?FEMJDcd1`E9hrAsKC2TDek30r;yi$ zjm}xEnyO>B{>fRM>!8(T@XGJ+I~y+AM^yKPV^WusT!)Zdc9p&YG{Kh%Y&WDL6PVLl zhY&b+yYzMJ`{oPtxTp0RjAX37Su5fmy>`Lkva7~{gL1sMD~m3ZV)m`AZO?-bZN#^! zWvyyJRxP_o^A)#o=mlLN=z$7NI}{WFZHZb5=7yRE{ZX#&+26`>_tE(H zelL2zQE(QdhbQQmz;4b48R6Q|vHk9}xAmOv+auvn!=wAK-i-`kAF=fqDxS%N#wpf2 zD5{my!b#q+>HIx%y9j5OsfEgS%yQzC`i{k?<@fb`r}jKT(jOT8+kp;A+9Xv8(nK97 z1qEaejV>s(i7O`&jqdacO-x*bXHm2Z$;$=b3nq%OO$E^$#Ms@If%l4OI`R+9Co?|X zE1Da~Cca1sZZJzIm{*jM1xyu%UO*{6?^{`{A|z?1kU>ErnwVzRG;yX_I!l45L@^9Z z!v63t0a$D}Y%_68T1Xu8R*^r=c^V^)3ed)ly-!WS%Mig{ozRybwap0G%xaO)A#ar! zz3={}T}p1A$0$yM7wKZQ*ptF(rRWM|M0=vueZ#QC^dZF=%-ClAQO@+Z3i#IwC&=Qt zh_*OMEScm`Z*16@S9q4S7BL&vVyGr$CX7#vzO2${|qE(k}0PxBK|Q~h$tH0_(C31{Hwuk zb6qgL;Tus9?zFyNdgsAS6Ya@wyVx+I5aD8szXJKX#Cp_7%cOV@*~&n~RdRONr zA!{1yT4(!+vaqrEiq$H-DOKWqtpYoWXBX=#{{FeF091Y19b)Z%nzr2hGy6Cg-uQ0s z>5!ueI|WKr1sky#Yh2`rP?MeEz5vb!L>Jm`a4RWxJYZbL49xa7U}EOL`d6^B5LrEh?h6i_z96{yZ{ZNvNpp_bI9s;Un@MsU zQ;-Gy`pQ1md~+ZTjQi07v=O|q&JdAc4iXh9y3L6i`W*m}7;UCYrC)7N$b|EHG1DxUCkp|lk=#v1?QUKwa#+GViuH+%~dJsb3$(*Y6 zvZ_M_A0DCS@K;?fzuNg8R(w8xw!4*E8p9<)X@V;Vg|?n-{!PSuM?W6_Rx*%9I*<$Q zOv8G`&-FvNAAxeZ!M%a9f4vj_3Hlj_ki>NXIcU?-{FpI#QUltcx``|77`R(Ivq;u^ zQnJ!Z2Ch!^GRIf*Bj{YCdQ+gM3kvTN5TeuM;8GE#1(<`+Io78V;qz>efTPu<>9hs9 zvjW?_1Du1SQMD_^*8#S@Ty<}Rn!9F&X`jr&)EP3`lJJc1Y!VfjC_TE>F8Y?T$RasX zr?N6?{>-EjmAGDEiQv;c^h3Wn(4qDGF2{W zSx_Fw?5j&={=2;t8O8HUO@)ZJ&L42irNT3g*$y1jb>>T(P<%!SpTbhP#EzP*GvbdjTJx8b ztqJtjH;@s%hMk=34tzg`toUDJh3&^on_GKHQd{@8F=P~<0+Q%^vx?~;;F(?%&z|Pg zB+N{@k`XeywKw89d1+VQ-e0IFg<(LKfi+Ofou|>Wn)4ff`B&bGb~r9;MQ}7V*cYKc z@Jb(BO}f_y5|A7Jpgje_0jsV9aK8BF4oFzWJmae4z+^SRaL-(K&$jKL^UKdT6fVhs z|EQqNT+A;#t%hu}D$E@7m`VdlNhx8z@`y01Z{r}}BsJ=L^*#$x840Cc@zHm&6|<}V zY)r+szzZEQKF|KATMSJ**v03~2bqx$i91k(!Gv5oCD_Nx30$#guk_NpQ)c}8h2~YIfbke`J3F3t!j+Y+ofW+)x zgaJ8YpsiUGb=C6z9uhgVaL0a+nKObWH5ccdVQ1@dUFJA*q3>_+?V?qq>PqGpben_5 zMQPabai9w>uVCdos)%a9GyIt72JoL`>uFw~$g|)tf&E~tB>h_=3sqDhjwSem6OGmO z`C|*0oZ8$B$aC}5MueS@6zi-6%g`NjGRU25(!;b?#H3~Ht0v3oLx-HD8^mgZr}-?K z_xN5Vq&2*Ro9hxI@>J_#yuby!e&;;#s{h@c>w;Q7MdYO});yzK4A`=>mo);+O=7#w zkym8^H;@7wrZB1<@01>4!2p@oFWEMos#$FGCro%8FZZ1=L2|}Sy&2fqm6XdOPe7}v zAqbSA~6IFjlvLAH2XWlP9lo96Rp_Ve{m^HV0AHH~<5w4bPLflTp^}LUCL@M{@R4u3zej zlLjYs!MR~mSj#(Q5~-+ zZdeSjD!keOXRk&4&!{{+XZJ19}^G65iTo_fzU|Wrh-RtPyRfvc$8^;Io4ew<29XLfD4^x_DZl)N>4Z#P#gctp+&sLbL#I!*Iy=P)|9}a{?JxP;DyrsMs(H z`8f((D$N*|JO=NR2f5Hz3|}novSba}KYV0LG6vyNQ`Jlf!R~dLPUw%anLuYUYH`Bw z4J@jo#oWW%bjn>%2S3xTzmHZMpsD0`UN#yny$K7-;ruikCWn zOjs5%o}p*KzSeu`eX38J>#lCyLDj!0S)w+1a67v@VLRf)hv8PFSIlNij{+UQD;i)E zD6j)&yD8cZG&OUA56j?MdRHW^<~k_t41Mb?!_ls14t=sUziUu~7Gj}q+#D{tKZW7^ z$qctPLw6t!#MdE2otPpgL)a}8DX9%O_r=r%UVq0rk3%W(X&Dxe8K2lzRMe%T9aYR9 zn&b~E!5W5RH)qNVP=j8#{qn_V7Vzm`~Gn=>;;= zv|LzBYHjzn0O}{nI|K#>0zz=ZSOMP8(AZIzferm!3WB3NUyE;8*LfM12#d`tK?YC4 z-Dzjmb9>GwZdW3fxT8>8MAMF88QoOHAD{Haah|6=2kqe_D0zdh^geL)v!$H9)%DOX zEOzOTz@7rWr?z`=ck0BQ4nT#*+*j0345g-X42D=S3H3-?6#-xfF7_UGQ>DDpwKAw| zmv0@umKQ7!I-g*f;XNXBJxTCMU*bXsvrOy;Dr>eN@qjG&i({ zCoiFqFl}*&DkQTtZedecRh>YQE(2d=bhMB)LE7i;PyFPHwqyedBk4B=l@rM3X)3Y? zr7Z&+i`HBEktd75uzc12Kt|>7{`CdMrHm{NdI5*M3)+4wm5A6 znDoDa2OH3A0vNynA_2E?%+ZVr6p*C6>}ub=m+jAQEo@N7lTaaCh{CTCTh(}qxae`6 zRDJ}|=6Y`~;O^j+yv773yv88H+16 zd(14_+iatzu6U^<#~yfzymyHsIiNf>(m*ZGc4<-cmDws?+)*Xl=zQ;(+s1@nGn8i* z%6q%t#Ljp!TJpVbV`45UVTFqN8R6{bgVs5EIR~%Ttf`zH7}(hL=oP_op!s!QcDs^- z!EE(pA!@W|ksYM9)8W4VIC1#?y}o+BavDRh#pyMsAM4(Yx;DZX(M&1qjaJ!mh!NNp zP#J#L!He}BNlo*{Qcl^C;6s(#iSf}YHrkGi8Gu98-U_Z@OmzRsLghwUsdMUTMU*LI zM{Ak34xPx`ATjFACWl$SZLn!acqJzMCu72QH^>(TBeV?P56dewx!5}29nGtWHTVnW9a;NHd zTQ{yZVqcn#>0C|5LF+S;3}JYKrnG&gqCZjQ+u3HeDi^;tgvJ&V0)0KS6mX=#a%+y z;t(Gz__glnllwb%P+WTP5y9{0kLta4?s7^U1|28?kg=XlJ?lH}tjaII$ zpH^S<|hN`72B*8zDaidYwL zxymONdOo@w`$7K>Zd-37pg;)eT=7a5Kd|8UG1y_jt-DEz z9u~xNaA9CvB3O!k(J6mK?V9u8WAOk34Kr@O!}DaZkcbHDT(RyV=OzLwf3iaCS2!zH z^hqRgrM<%dVN&0K;6R?<8q{1KLgFl<$Y7w-OX@G(RWD&#GOGuV(YhouSS!yn3Y|G+ zgbFVpZ3G&ng>Q72&2EL>ry7rZ*ag!z zkq8sR@5*#Hn4Hgd>cyOA_8YN=em8PzQ-^=y)q$y@Y>H*lU!cmSLJr2IEnsB*UD^W| z{cZ3MmR%vbi*=#>A4Y;I-Jk)$X@8OZCjgts9=%xj7AIhlatH8hr^L;_Z}`W-E41%G z39-t*lO6k5R&jzwY(UdvvA zbm;*XOI%9B9;-iyh4ZpQ+kcmS+4v74UgVENctWgjjnV~CV_GKN@S6QSb~$(b-S=Z2 z@BvDSSir}4b-p9vxoE4Dy7Kvi2$mGuQZpfEtJ0+;ye=ys$3oWfefF&9) zCM~L#S#=PJPOl}tQ21c=Ljq=LC^J@@Zc6?hvX@}TKMCY)1|IHyw9X`CtDDz}i%?#0 zysOq+E3*!EXCQgmIt74^QeNEcW%1i3vZ5?b1>D`n()Q9>LF9sW;^w+q3zJDpaNY^< zzwVhEqAHGicn+Q5e}hWOH9h^;8{vQ38fIhpj~fAi$q|dgM*l+f4!Za!$_zB<7wj5D z_OG2O`?~JN!y#ytw~v}2k%qXl^%P@BQbX7S1#%^`sGO-L2(>%0#4lZSP}{o?uL^+s%k>Ry&Dda+txBfy9t&}CZ0p;eH@vV4$2v^=Dybo?_o7h z%(Wgxk3l5HQ=ZJ3>JKAeGz-g3Q#oerpli&sUq!h?XT~Ww72BIZ&VDS)YXh4{Nckg2=o7DK~!9T+@I zipRx`>QnWz2h6BYGJyR^2eJ+=1$G(Kc`YLdw`y1$k)KJZ&j1#(qF;uE6euGSsWP_d z%GH5+)@hlv)l|$`@lTOTmR}9)bYw++>Tv^Q=`4OvdY*63ib0zXx!MN?R6UKrpP?U|owbLBsA)!$gGP%z%LrHLRmQ%Wq4Vz1CcI!+m zt6?{s1(wpS+Xlu(Acv(T&fl48M7w@h zVw~OQMU(ncU{!qGZ0oVyp%FBZw-pJMW~LF&9_B5#(k){V^^*>z!OYL0ThEDu20P;w zyN^z3(oNq>YOFUKknOjPG66eTvD0Ylj!W?2bNMBzEM#}Uxt#IZ@%dD)hrNJ3vCEGC ztkv?QRYpX_B26^g17qD;-=pl>LW(DgvoSKzL27elORT)PrSq<5pu|(Jy7Cpq3e1U8O{2mHiqobl^x*L73;stc={>>8ORQM!Ji{ zSa!Uv)`akDZVw+VLEGxL-!v@`pCTOZ>S@0tiNSa(9X%8G;BR0g2V!~5yjOmXx|3A}>OHNVGG4n@_vzWQ8f=PYQ8j5K z%=ebg!xW$+U;B;P`Zd??AoPR}`%t@K3)<+)}ioi_i zG#lR=mLEN=B9|v?LIj}j=B#8#Xid!9fp#3vqa1z?damR$8)O9z?6oRoWjd{50F{DT z=WjP9e_T|wO0~cmuFVPeDoT|luEd*_+)~m8EZTi?p628W4#0|YRtL=D8+kkL7!Be2 zHQ<`OmAeg+cY?;Q%89Q`Rsi{Pu0cM1>X8L{mf8v>b9wSpT~mPfxUyzIgM1!#o2r$& zulRf4Xb9QSR~ezOSz} z#ESQlOR7r8{e(;5a^=cWe^FS~rF4JW%<(kW5y+v&cpr~6L`qp_rHCV3=#S!vCR z$<3My1>g4-T`A-I?!VlR%=G`$Vg(~38^?eAF=@%fJ+#67UnpQGrCbg)00F!O=CS2! zD-!QuT>8iOyDstTEfhWQ%tUi>5F+pFp!6X6YR&(^^J4w z3!CR>*Yoe5@$;?LGTtzIh$JlSWzKVeiwTZy)h{=sE(&oZ3<0X3)ZT7^t%ZUwY(_BH z*8Z2wzG81E?b?@*>bC&vY9kmr7JyMM6^}APcwiFUy3C5{ zXRc%yVAObkacPd@R5h42F`UcS1#8HxfbI8>LGN4AQH~|W{;U~Sb|Oa9gD6CL?d5Sg zk#N*IE*dyLc&Lspk>k>7+}uwhB}QMnFq}0WBqtM&QnVSk+I~4Z3~u zOWwKYwLM5!%;@lX{P!fRf{p_)m!$93`=W{tjmnK#mNqb>`q~E%@J~mtUE^T zEkZ(R#b?p1>DI}_BGKkx4$9lm0_+IsY*>Nd{9m#Q^|Co^1qMjJxK2WBbhbn;znlPM zi6Tj|Dby}MMK>Ol$z6Q)nC>6jK$|tG2Kplr3X!QjGxgBh6(X(9gJqC-hNY!hC^1W5vVd#;}(tE2BSv$e&|iar%BeV>lM~4 z&DEc0-85oGAWLSe+9q|xqAiKdn)S&f>#F+~CXM%MqsBtgX^^gfO>gmyeoyAtCsu4P z{$VmOfx$19KA68L#N|AP)G!qyuAkf#4Ky+X>cI`xp&DArkG7AAVF?zB@j9QPP$YNC zCC<(C)>d=&bUC$iq-~SXOSQ)9)e4eafe4o*tlFoi%u<_9;HQwxN9YUbums>w=~Hk) ziX4eInXt#KYBO;I>u_o{vkFk)#UA0r-H2r7vd?Jfu2|K9aOmU^zJ=o-6{P%%iIOD ze9Osvc|9^3tdc3jO3vPr6Ad^zm!^}}*tKd|@J^Ca(sv{4xu3+^9gba6oTFD2dQ+N2 zv6YH*rl2NR78Dn0EDV}vV97{7$sG?q1tX9vFEfxZY(ambf6j>u5f2-l;uNN=jHVcX zzqH6n;%ftlLl^3^5)#GP`!cI_O?|ZsZZ07t&0|eX78y<{H^#g+h0vZBeNgPMcs4wN z2^YSw6HvAcYKyUnCPG@0g3*A8Iav)wiZ61q)`??Ijxyl}a(|N7t;!9+JH|!qeNZp{h=W(=XRWW8Nh;=GMN%x zD%p3KEaB+UeN7CM=fFd_(UT{qdBNn7Mn&hXVSA2mWA#^3&2V;I;NrB!lKy_*vb?zn z&42_I&Az1ZCck2c1&vhvqyK|c7LhYv$;vT{30z`Xsxy@&BerAIY#R-VgY%Y3FXB~c zR^O*lAX}hV^XvqId%p0UevnJ$GYe3DN2bbGU_@zKdhQ}CIkhmfh@B}Hur*Kjv9I3M zrO52aQ@V*3<)PJA<8rv|m3eaOjhd-CDNPB!@_GL!bQ{{^!}53mYc8(WU1`9@EN458 zf{e_z3QI@+^bg)SP%Oe0NkYr;2Un#Gx5+&@=jkIj`=Y+V*~&ksJ>BDioAe@G@E5-&Q=vXq&XS;dcbD7zydw zbYZ%Y%qg>ms4sKMweSuL;#Q<4L6MXZD5<%t=H6b)ep`&$lM2P_Ypt+bE~FvAFYoPW zy5?6rJ>RTX#G6VetI|=r}zOU;A+aiU&SY}bZIUr4EeMg=W|_UMTVINIY?e! zA-c|1m30~2FA`tdfHqv#*IGdH+z4%n_EL2zM#qS>wFti&{F&y;wxWZ>f8p+^T8Cz> zSHrwp|B6F(O@@ZQ_S;Z8!*Ba%v7XOP@eiIn4RVk8S-@b7Uh$B>{yf}8)m>(_ZLk$2 z_HALheRe%cyYH;DsS!+SJhqi;?K$n&6Rq%M(VYP$j5Rd(uv~Q!Gi7D#{6>#Ra`*U- z9XzESrVlL0TzPER)SIb-e|#%lkLh#n+jb4bQoqP|NnZor%`-FZmaac$_apH3Ow7)M zfD><9&F%_`@B89EAQ~Qy`u{4I{wInIBR#`^RH_1gqU1mAg#TwS3p?rkKY!Wq$6wCS ziXR-qdPBy~mh$DRB8sABrI-eRyaUmiW6r7q)U%>B`|K?JdEjdX&-pibHCXofNbAQd zyPL;`6a>G?mlaQG18ESm%WJa&nNaw5*3YKb?xr>Grj^ZZyR=xGvEu4mF^!zKigEMn zEv_h8Q_A9DwCr==U;ud1eRqw*P2#q|eGNfJ|M!SIPHK$JdBYyyAW| zcfz}tn%?8`!NoVJf=I~>#^_TEaPzR8_tIdkbN=Icm zpou{$9>8>bou9lkN))a1#*hS&(#YLEz%~Wd@E2QJV2H<`lU|FF;IYCxh)7_Eq0K)C zG-VbwkO@+8^$9F^e3o_xw+eiXT2Rq+eFD61IHTiItsv+^dAo6Bb>$6nr6cPRq8Ml* zpG!Va<6Uscdu9HlS%bU+ZXL3F`Vj{CZx!U3_hH06p~{wINlExj{yaz4*eN9eeS$Cn z;XED@`bugmiFSxZ(?}N&SO{GorrvNe_<|r6x#qM*;d_~Fln>0qYkPny$0o36;_m7+ z_&S%m3C#2DstmCI5j@t$&pJ+kH|i|BYoCop6RkT!s!pEsomsK(UufO2?@4w_d@h&c zbQR~sNzoehf?NZLl!i?bq$S_QZkn2~SQ91p)Qh(^dmb~X@W`Vc@L3`-|3$cGDmT9F z)-TpWm=1znxR*S4{p}LFF;JIO)ltHVZTpFqR*k>z-VsLUwc`v@y0{aNq}}%Yuo2Dh z^;3TvkRpzW|gPiE+Fe@=V_Z>cR{`})8?W^G=CGumBy+= zyAUzhkFE&cv0{}^7&iKxR-X5mH+(J|``X?;Ect%tHAt*i6}tek!S|Q-&O0CI7jKJp zgr(4VMp;ngwAM06NOeFIq`k0EYRKsorEx9#MbGFD-q{{_N{6Wf|C6!DRlwgO#LJetYLC~?Prz{JZELrOpCpPX{kXIcU*TOX+P3l!d zTT$!Gy1&L?Js18w#jO+_jyfjfN#ryr}(v;}BTjn@|`=VQa zeaVxIN>{2uG<|*cdE#R=;0r{ zlVvv8AbYCj0(2Uo=1x=Fp04>4=^Vk(SG%-SyKF;loRButf`$HhstQU$`sA(q(7!Jl zUbg{d1mZ@AWq94pr=x-XurJ1Q=nRmfyTVk^BVEvgVax86_+*9%-k8_5*a0bkhhd?& zglSiALL0cj8CfAlY>ir!#@ZCVJhw+!zk#IY5ZKizhs~dylM8KHT4Lwo>=8D~RvewV{HKho10O2X0axeQW2$UiaZr{^PL96_*aQ z0x}L07;xK>R>{uQ5?MZDJ`q;;!xWACRQ0X3N_VEwx(d|V61}Xg;=a&u&6wu~<&g{8l%cDC&5i$OS zDwcAZfwuUn-JGtV$I|XAv{xEN?R;D^^i(A3CMff=#iNk#zajThVG@2tM7ux@bhh6C zdGav1*poVI!+H2=Lb4h(d)Vbc`U3p^1kVDSF3F+~vHnt9peksnt*~=*REOYICl2no z;%gM5=3inZFf*@zK3=-v%IYK%KA9SXATYFco~Bv5 zL`5Td@Fn*TBvjq+@xO_L|E+hOk)D^`Yj)aFu_0bPpuPj!wR!)hR|XTOji(Lh zBnUBCuTUiUrx*M{(k>-&F~o0ABR+|n_`uDCv$LpI_GEnC`;=_`#Z=bHcd^*|{$}*@ zH8^?pk+)^RBE?|B)9t-9Pv#B{cy#=_T2FUp_;d7LKhma{2kN6gmEuIoTAH}N%Bk%4 z-pYw{;fCwRjrQaEjvspZI%)d(q?Zt_&kyVN+vuaAK~n>OJawZyp_TtM2P{mb*LP90k51XDC40X#!jLTE)tE zKz9=qy5Ql{G;$we>Qo~I231!X4NVVPR1VAZ7du0AA~S;ALl~ppP}#eciE=u(~yX?p>!hb`TfZ61L8^7`Px0ej%ZZ=>2HWG zTx=>6_Mn$taFG46ZWn^1hR3{MuFM*j(sEjz_Yl~f3#UAFjT}5n*HG@PCo|I)VP5`X z=UmY4+kxdmg}&PO%6z{-d-fJ*W|68OrD3?FVFHN*@j;*WHi^CB+$VZ)4v4L>Ulpuj z!s=vBh=BGN;Wr0*2V2G$iWUxx*t2rWzS*q3)cZMq<<}j6HuLkG z*kar{vI#}UD~2|8RzXBpXM?Gd8u?|TKK{ABkWNcI*w8{lKZ)cVPiF4x$}X6?l4+yuW5U9?b9 zYe=n}?&>>(F#uzrbQUh~w#{LTA_+(!r5cdQC+N8p-&kvF&4P8eH_fy#AE`g~fFotU zvi2k$W>*pD*m!P6!g@ouPAx>XAhv=F??w<^MZwcEu~Sb&0Q2x;j&ax*7CLE)^SQ)JqfPAS*9N2NtNQ8H z8!Cw|tqC_#T9GR<^a^#TUg4zxtSd5I_7VA{ZM3}zlV7Yh_Ql|(BuD}POE6}|^Nk!s z(Xm2Tb_F{+zba35&v;%5K84zZ$gXWx{wrEhbK!e|`>#u{Gt8V^&z&q=zMDIOyZfF& zoU51(2zRvhXQg&A%oc|o=D7iZN6+g?nrE~|u&(T{r>yVKtXhM~kuX6Se3LP}(8(<| z-i)3nUv}*?`0vy0#OPh>a@1%oQmu4TQH4UB4b!nkSp&ORct^DrDqIBJl9K`54z0Nt zRTM*8&oYNBzDh~#14G43a%cRh))aFkUCG!@mB{;VLbledj`=HS51a)4xwT$frxJPA zrIy7MJTOG@=i;rnYPO;?28hC)B{8XqG10pHnjIgBd&WwjmeE&H+&>DQD{;$WYr?yVhnX z3fjryHV&y#W@TMzGtIF5Z=-?R8rcwGKiqoM+{(7)mwKl}Y*hA4?Kp!TT=F{$C}zA) zc$6B@+-OIIo;%-b2Z>0_%soi}yv)l_rJ*109! z#d4a?ZGms0uwK?H{rb$Zjh3s>j_QQy$7W55?z{_aG7CUT z*Sx8Qb1#WZ zolUeziZ;fv4OIw@?W61p2G7K0*)kkyag`Eb&-(CU{^OWe7-PgrX)(ruDD7*amaL48 zzrTO*P0?_YK?&>(tUA`OYTCVjv(G8)En-))V|@AuBBhp}c$}g8w+DdGiuZWjkb+GI=*IA8aZEUA;MBvS5Vj%nZpTN$yLJoDhf$Sp-QsT zPn1qzq?K!&@%Mp$O>l`On>%@c4b}cXxjoYQ2yY-NA69A867#Yq zNn+QvvPoyfSF?xz>^y58sj8o>1giW%3*WR>J@HPUUYsfjpZ@fYQY-R14R0l}p}wq| z;LI^adPe46=w!Ghu*GG#w{d6t^>krrV?k>KJlI@di*o#xPHXwbq zR@s?3Sr(Wl(%Q&_LS_v`^2BgPUGfv4Woa$FcK(7ge)?%Zk}xgfz|*dN7B)4jrhVIS z{?c&1(_MG^dO7N)c>(Pa3fi2@p(;NbuFLaL?lh^{$*jURfvesCE821pQg@{}dSTA4 zc1_jHv+H+tPh`Deej>zFBRZjNK6+tV2mrv;$Tb3%B{p_H0#vpmx6p_&Cov3z+l{@ zB2M60Ri81zHRDl*g$GF;=g0N1gVQYC?}XiONr2+!S^h==wC&S61 z@EEE2bbDfF^UQ6Y@65lK4@{Bx4Am?T;&_}ab@;YYQ2_a=U|>5*8ke`!KyzQ(d08b# z`iSD=O<%;3qk9|@Vr7Yu+_cVs^P&;saIDrSt%4a}MhFByEyyeo>29<_Q zpx#HdezWh)K-R6X?=q3VJShjVbLrPhl0SPxl}Kn*2z-c&0a_Ul72u?wU-M7f)*A2C z4S1t;#3=>Kl{v1ZFY_q$R={95*uKPllqP>2euIC!0?d?k!pf7gm8tp@A{|^czOxf< z2q_FR1|Q^jS6STlQ@yVk`-{ZQ^QX|xQD{Nj5s?ZNOVnWT$dY~^pkh!f&PJPgk1Dn} zUK-BV$Fgx;iKgUA1`TjWAzLkOBV#?oC^J~Vd^U_UgemOw{%j5%FqVFpCD)kE7D3s+ z`RG^|yTf-TSajUQ@C&R%{CneESDKRe5}f+R%e@NayuWGvv41kq8O5KH6}-W zBytTJ+MeR8gL;x9AM5NzcXR#>ZyGD6vv)ctfWVF}a?|iO zwCqYdlNzMuwQLxdOI=hw?DTb>%(2Dyl$yaJ?9Au}E^Bs;m0VNIvDwt12X@&l+-FB| z9F9c>nh-W~Re>s1Xx33iGNDRPcVpXGzZR;iY-FEWp>1Mz7sd zXpwJ(2J9-e4LyXxsF`A)A4Skd4P_@?>W7ha368tgE$81&8Z1*But~LZds~^%$73GE zKG7leOdfQ-9tbFKxEg4aF#_w1PDj;^*;!w|K1>KtP$lb`s{7y;mv0l1f0QG3z1fVk zGGZ)SZ*+>jdvAeX`7n>9TBHD2OP=u}Zn|g`y}oYmCd5(x*RcZQ|CCZ>WMTP_vBI?0 zbSyC&e9w*2D|m-!p)U;mdmX>2|CZ}~>oDHN_F=Z8_|Ct&!XIXXq)FN~Ho+Lim7)ZS z#NA7h)B9nu9OYM;9Pk34%lj)2&zE@KF00?aH`n*)?d&E^)#mfXO_rFRy(BF;yS#rK zQ~)~3_H^F-WR1l}DL=TFjMvORR4JwXURaWPS6n{Mnx=dUud}P@zo#+LZ`rahSf=OG zR+sl#@1An(@mU)CX!3txzy;w>r(CBRh z6khn5Dxin5owGS{3%;ax1A3$gvrFCF>sHR21}u$9mA(O2#b{|)x4V4jt9((z)jU?7 z5feGO(R$f%Pe(7Xk=C_rg_KCwR5qPS2m>9#%LrVUS+KvY-_a6{ZzJTswNX5$!<2Uh z0jPp@4rg$g%;#o?>?XLe2i{AnMWMt!yec+AMG$J<7ZciE1#&xK@NXrO#WIQEK4{Q> z;&Ia;9#G#;;6Ky}yH^QGN#aubD4ertFma+PoI~@q=EJs z^A(oA8JXz#>e5G_IVST!s=>L$GgSj@p7H+c*=!CC&MIycyGt4Iv$0C7tIX<= zLxFf6%f?x#S(}eWBqbtpglsGa#VxSywF}FLo&1~VP%Km zILkwA(nhJbGsAa$?kQ!B^3pq?)>i6C}jw=dw%~2JnqK*xi z&CcxdZPs87uSHHIA*6O@pbko3%*N7p6-$Mb7g&;&d{KEkQB>q(D~f7Y8up}qC#~-4 zM12S5#TDlw$|l!LAX7<3X$d8MVq6rH_m(tu=W#Q}6L82%c&bF7JN3An{@MoBwiYk& zv=fK_PhY3vReB8*nS7CarUA$HX~+A*()!9u`#_?(uRb<#?uo5?cv#{_6IBT^e(R%3 zEOR$rzx@=_7YMx>PLNDWwvsVpej;Oq-S~w8T5If3zUD>;d2}i)jM!*lgs5dA^@-MT z$}$I6G8De#=N~-bf`peORz>!`12E0~J)p>6o3pCii@7W{X)dbM%#%wd?eaQYy$SEO z3j`|8i`pon2A?u6i6WB`Y`=j{5mqZ=4yXPGZ-D@S6twa`n_QlC)mSE`i`hKc@|yno zH=vKXmP1hfRWh%6+G2>ax`c0i^P#u~Hg1_bpSX!BiW@^QK1o}RRxXxK_;)VVPuCz# z(I;}sNS54q=s5idtd??$INOc=keKSbPBH>tkn2Mswe~2iQK$Ab&TOE9l7dSH@{^0& zmkhE_5##7cA&XQzQi%|JJ*@=I9QG_NV;Df?4Q&!CVzxUCZT>hATA;lvYUZr!xuIO_VE@*+Fc-$I0zk+#X!C#} z;pbdDUgt%`dElRDhKxG=Ve3)bDVcpEialw4SZwj~FqLbO>E6SyL^svRsKSlrhy#Dk z@wCtkp3HuhhcsD>JZW!l68+}QP9c$wfFmSO&o*VhAjSb!Mu#%h#$?tId9Y2@*24-P zCYzIrL!#`8^3_kVfly0&NjfA7{pT+Uh<%vb0xJL4}J-&RUT4M4;Pk2$3kMe{{; zT`8!)j^T@yTkg?caU2SiEC^4vNsq@Tx9Ky01rum_z5j1w>o zWDGqahrJf<8`WQd)IkDikH8B0Yc92nt4?E1bHLOk?w7S{TNa_o%7$2cLt!0ge|7oz zJzE;8foJh08blLhR)5Ev%rq8$@U(u4L+Hu_>Vqz8q!23+R*?@*ESC9|1Skjb)T?;2RD0U2Q;+@B=^uS6_Y}Y1Ms#qA9ya8L*KucKw`GzRab;n<|W? zSZ}9NyAreEvy6H;I^Q+P3mG>#C`N`zlGS5dKcdNt*VM>d(J5g?fYU+hbZ3{~-G&Xy zW~2UR|4)M=mZJW9l1)>8^Dt%o*$*GGVl}y;KLL>HE+5b(HT;ze$oa zV{kDg7w>JRWN;CXmbBtKw;|HOZzb()H@OQ~&w#L!8Jx4S@qp4v)$LCS9e7(U^P2~; zXaRBu1X2SrFY1^#(Kb4ezuY?Va@unfwJ4<0J_z;-Ve;T++~l6o=-h_TV(nWrk;Q`CV_r%&X5zt!6 zl?Ab2ajPyvnRw9W&E>{`c`ngERQe<3Q(rn3#$XgmnT9})(1K1K6-Su#(bWj5UzB%3 z>+WB0+vhke@6)#s81-nB@?B!zA)+X)qKXLbk%Fiuhj=ba#vE8 zQH!4o?}wudiwOVE&yG8to=93qYDwm)4_c%>cjhywm$t3 z6XXj5ErkdF0j?nk?vqpNFJ=8_)~O6*S>SZ&>BGDww+f8f=z}dLRg0uQ`i!4hg{znI zN_)d-_)&pT@96u{3|^92I{!fEiD&8%=15m4Lpgy4mS!k*%aH!+NrwYG;XQLCeIfMB z9R5&XN*%BU5S}`Sh}0=s6JN?9jA~(0-~6~u4lni~Xry6YKPg%ZO<;ig1P(`OrU*{d zUU(xhQ5B*oJ)vPqfWUQwrS3(05VuVv+e~JcU6>9KPf3Upr!^z&erQH$LHN9s;KCD6hUS7<9S3q;h>dKkl)7xt(1VN#a2doT7kA9 z_r$L%si`OlY)&4jzzW?&?g>55H@VqHbZBD9sZe>#3sZWXiA=%4VXxPxS+2Xz$9X;A z&KHv?Q}|Fz`BU$z=6`DBy)m0HeYMn|D&(WT)V|IGJ-TWtu6?9$wN|^Iii%Q^4q_|E z#vIH6jy-QT_@jLPsxkm1cfUX6>RKoCQQTg&4ehiTa`&~3oMjmsDGh*$(VCM(K1f^- zV#b&f#aJIobVu3DD+67;-q3VhSpH3z60VqaL|6YgxYnf>K(cUvCiI3iQtcV^+?w^I zq@EH69TNLUE0r#a`%ZMJleTJm?U6`WhwpUh zBLxq2Nn?f?kxxxPsUwKGn|);+G?EsA7PghOIg3q$)KbM^15j0YBjsQZv!cqPJ<#Wh z!!^w^C{@{FA(P(>UgkGo*{Copls+X&J&j*P9zXu*o%w^Z!mpA@)@xSV!3}fR3#8gS zy=nf{KtZypQniubMa~mUpus_)8?;njhsT#v`W7M)Ma*E|Dtmpa93RSlYaYT)*7~%X z<99`x2&u4r+qUF0+m{YlXoK5O&Wvh_WeC=216Lot~EXAp4UGSFn3v2GhaaKFGY4;nmGb6K;f;vj1s9- zjhSL8%z)%_J+cc^g4u7zXcAAQ%)B*AP?2i8SN1+hzQ#irlhF}0NLG#Ua1m*ZV-`i9 zzhpvFkv^H$B)>HXh|$@dfIQEXuQt}F63$$tINoQ9K=Z6N7|BLuW|{aN8dltdWuC_l zF&rYK0Fox+E+fp6Pn3pOWX@4FC`K1(H8RekmV$S9S^*$dH)z`1dt>BA`q*L|Q+47L zR^ktlBXiXGPi){26A-boJ|3wp|OM3v^Zjr0+pY4g3=M zHgUGil^4P%%F^ydbog*P7n7}?M~o=WR6cJghu9zYDHaGEP?v66_&jSib;aD4m94a*8g*^_He4kbJ3T-qAYBr)oQ>WORn0$Dc; zN=3@HV79F{&0vZX8XB1OCb5YcT2YD}?M)LuHGuQlxY+)Quh8<>jD|HmyA#Un4--38 z7xm=;aiR$^28rf0k(^FB0y;ZL!BA_GHJr)ob~SFEJX z6}7yW2(dlx>V`KnDZ%}fBhg1Ok7@2Pz*7v@AI(^W7#IlRZPr(Z-(B@o3q9`v(Xd+z7Wi{{V+Tl^e0B2bF;k7l_TzPj7GAYArR4JJ#^T=-&>jv zX%!{fJy-;S4Zh`9D1VRu&)a#m@GoI%HjuShiPUUCl7itA1pu88VDn-6$K=7T{XAQB z5_R}t*u6MF7YDRv_fG|_)$7|kE|%TB{X5`473FW(pN~~4wp~oM(NlP#PhP$Cz(w99 zwZc^ivrq`#3lKMll`k2I-daZJ$RdX0vk|^mGqj$yeKe^8To5o79TD!8^m{RC0fODM zDyd?mDm}y;_LNwPHu!;&3cT-!3ov@=$JnoDo&SJ+NKTjko77?cpQH{03(J4foHeF@ zXwLty$ng_oUUG?#eyo7sEnuf5M{8b)JL7SI$C}RPE3uG7swHV{Q6GUT3X?cNIsxS= z;=LSJ50XXvQz;1YGi~r^lgMY_q;~jZc6Kl<&Qe}d*vi1YNB>4Z!g_fB?Q=9K**19r z!kb?bx8CNK16M&@(!2U@QRj8BYtIeErB+F6-@dP4L}~YK_CzmCFL%8PcPu`dGHY2^ z9k)S)y+C5Yfj5whZLDd^#~3sgvKpl4?g+zE|Ms_N>I%9iw#4k%eWW+2FZ0nIKNCUB zMq27%>N2}1Djdm`$qLM+0y&;Q0@3bRXa#HJ$dVT=4d_>PA{`^2S(8oMZs=jZd4rMh z6N<@aMF!|Zzf|N|SX_NfX{rKPbjj5GBl+3lz&z10lFn!UFI*qo_~_Dzb*W$K44PX3 zpQ0Z)J5IWpm9`#qU5+rdpB-X~Z87lk=FzE0@F)XnFjkXw4w{~aHK8!UceXs5J%d%b z2CV8xh28BclDkbNID-TM6!ths;#9r`z}o0qFJSOZW+Rf&pJO)JOZ|bQ5%dxnP9r;G z3*98mW$~k?tF&Fz54R#(*%#!UInF3PlOFov zB_044(B1PjJje+R3ixC#*{**|c|Lyivp z?^d5Orm1yq*L~1>3R4sB%d97*a$!!CXQrIB7a|eOsE`9fjXMLEW`fzK#eI_&lQrI| z8fWwp&j~+V;oH41KS+}ZRIr2J3g#F+u$meMz?QSSgExaGsI*eVH0SJd==`cFadzgQ zanAgtoO>XR0&)sWqe6c&h0zN;1^ezRh3lx2vnbSqV9Rp?;RYx-rwQG*Gr{7Xpvkn@ z#SfU8EQ9&8q$$sWoqzjivQua9he_w}4+PVQ5+-nw_Lxex|2R8Dg8LQLkk*tIo-N@s z7fr$2qB5EQZN066S~*`24eQEQ#qLG;=C6!~^HOZL4i7Q>`RVO%nzz}%w)neyR>}?r%@+cYUqdOFep&&$4S#KZaZ@-q<|Ld`R6B8) ztJtJK?`OM8U#rkvc}dz+6m{)TDp`P8)AB?)Q&dJFIDN^ciX;z|euVDwF4z7$$_lB; z1g;wpW0QX)2U!|c#Cb!>?jx5_albCg0y<}NY5u$aj6C@KREtKK-d^FXT#;$$^p!gx zVTRgsK!d<$#cNY-zhTqAab}>NRr060bm+GbGWkWETe7@bPk zUhEmvIZMeHshTZ{yW%$;9>ZfqkldVEbHx6nC&iLnt+^)qaHWdoSzv^9XO&Wm=N5Ac zJyNqbaPuDNx^mCZR_8}NhUe74i02mGobJ`cuhgb}#m$qdi~=#Lo8=}6B??!ANI{>o zPMQ4fPJt8=G2$s5fooj%5~!D^O9}adAqz z{~u%L6kO@zMEgw4NhT8;6WhsT$F^{k5POmM*YP4*VI6yHoJmNSa1sMiEm#O2r>fo&gc-7xc$WPum=EjS}vWWj4W5zuAG%!M~wEH?IggqNV9`vzNdUuh?rU=SPblo*d>iF&xAj8GjQquHKh zi4Bx9&?z0}EGiiwCqD_aco1i?Yb_g5X z9RdFgyXj$g3ag2I-*u7e^YfkoQy3GZhwOHNJLViui!{qTI*bxkpi(bxqjV(Vmn4>t>? zf|Tth$?5DuYe1u>=m+22O&$7K)bM777EV!$@l8(-bl{xCv~t%w$XhLgg;kN_CG=Zl+6YQZHe zngCKFe3*l#z?Ire)>zfp8_Xm*+)Qm5`4S^6yb9U3%LJHwf>0!h{Es8RNsp}1bg~xE zv?!|AEO_0?%`O6=2mB>V$kTi@sZz|Bv!2Fit{OCg*zi-W0|X;YES*fQA> zJ2jm%5%f23^E?IZb5J#3^hUqu1gcFiwP{V4px@>jp1v2PowWfU9@PgXh;ZZ89+^7q z!Byr4n@>+MsNSe(JtYZV-tHl+`dzQZ1T^|CpVi^@b=^Z}~%M&ILv z#C1L3mb^aAYA`I(At&Bh7eVgYuLr$JruaM&NXLKhKzUU1)Fd-7`to8aOQ$N&%{bzG z%3&!#!_b*zFD?mYVT3-_J{3U@KKN9FCs>7yC`q5`T7;=^AAY5;5-v_)nrr~L(`6|& z?o#Nq;QaIz3p-9I5DPv~a^+$FxVs{)6?#pXvueDy;G4&os|c>VNmC^VCxGyLzPJG? zqpk#Zb(gFA!mBBIN{KsE;(_;@t=Zb#BJOv%k~p_!K!cc}7`lcEnK@?|qByC%R)a^K zx44l`U3TcIzieNzK=%Jc^Tk3g_VmqdJI{5(w40!+x*FG5R%z@91bQsW&RW!ckIokS z2k#XVmO^KSEJ9lS;xwy4QmY&lZs%)!xaB^m-BcxAE1Sj+vlhDxV`m#Ln}5w%)mL2- zvpQlr><#*y{Q_%1`7G=-mn7#(1W11t^11Yy)vSB4MIu(4#1B3g_6wY1%#dkE%Z&4~J* zS3vdI<7z5IhRk@Bm1qklZH#?1D(q6KE3_cETkna?%)Xt2C{6UT>~n@ee-Q*#6b0RD zFx_eLZksLK{yKpdT%^E#;3W+=CY>nV=0tNfCc8((3s+#22ILL|g>CxH&hZ2;T_mfh za$Z?AXo$SrAx*{{*-JAo$9KEv6hZZ=ZG>ZX2_j*j?q+eI=IBuLiYj}I^Nn)L^1=Bz1=nLqYo zJ#g)P?Zxw?iqL~|U==oUTPI$OoLdj*;$;W44o9QV!)mDW*9I5iUj(avn><+l6Dxs^ zmgOJqVMDnk5|a&K;^{j_CU@koGY|+E_#zA|L%DfPk1?aIE=1(xQ&VVAtJ=gO8U~xn zIKqa0T-1OPM47%PhE@8z%Ws~~43`)Dj;?$UH4ZO~Gy?v+s(Z&o+GN~7-rC6Khpx1$ z!>|`;T3pVWn@Pi@4z~1&r(2Bi$vmQ{L+jVK5jLPBVb$ST?XRhwI-P2MylV$RVYlGh z@E*3pk4k%leIkfNB~CLXr6!|9sm(JISDQ((JUx}1ZBAbYKu+ITJ%)a&x$M49DSd(y z&6J$V=MfK-wr(ZpvpGm_x-WCB2yZP^>`D$!Y#IXHlAjxrx7sUX+cvj+|Q5Bm1Tp^o>q5jIhW6OO@Xvvcnm23HTy%dNQu^6T0%X z1#^AdoMpwI%~SH`RrJSE3$pb$En$s|m8$-C1S(rnKrne$44@V$>1J~)8?+QpHWwa#9;f>x4tq#Z8zQJ6efW46~AkA;;mKHs{LIfL7(;QT^GeiGqh(7NgY5?TXp3EIxfhRfUC?=RMn(Y0Je ze7y!0XiSImE*cP3;mn00E{i}n?b~k1dBoN?e%pP#)y(&e+GL|phRhkMaq&mXB8NF7 zcj_4mqq*2Iw>a~;$w9;L*{E}9FF%m(5L`s= zJcjFe6`izh-J^gH<_WhUrp2rD^xeI^zR^Pz_Yl$*$4u(fGg-L0i=mnTn}|qwUN4-y zJvWJhmMzG4o_f?N`)}+M@7uFrFP0cDJ4y|R zM*+i3g{RfcQ@RpUs$zD8A#W+VLgPzl1{qoOa2}OY`Ky7fs$5g0OoX{~ZW%3%W9K^d zvxrfs?4+h!Idyq${fzp!sr4}7$E%tZs@^$=2u36kebC;BVlnn)KWHWR(oA5LX#yMb z(#?nM>#oPisG+AANdaT>BEg7KDa+O1MC-*o9;ApI#oz`)%x=kYvq6?JzVs79m^ndz z8*Xwxl1d0BP!IxTIaNh54Ic zs$=NrqaQ4F!aa@!c}9Cp_c3D{^0C&yN)}13UF#qZkSKdS1dRQ@I>1QS=(L}|kkfy( zJ1e%AtUDp4e+V@<%>KxqebDvB7fh3-ApmI-Ttd+Le1x!IFxd4#pb*9(W0&=* zs!%vhp8?(42k?R0`&&P!vi2`B)Nxs!ru;&B0(Po?#4-V~s)q~VaKcf8{?;qL@`CO9 zc@>0<8^mH|0`$$jqy=miDR>W#ecU{*`89m5s78-PE#|gqs`FCx=~uu>E!NKIv=p6P zMRCD%ag?I(ha4Jm(}!DH3S+y>AlVPPl@=ms=EbpxF9q8kksA6mT>1gVkY^u&nO`70 z;>W^FM5@eFCn95{v`8b?I~m`FW}Vj)4hPZA&yML*_Kkn4VW;#2+AYtM!hkoc3?MRw zo{Gr~m7megmKSow!;BX$7JzIO=K$zvt^Te3g7kh_x1rAvX$)S1=XN7v|*Tsq(H1tSgwI()07r9E5o` zVNy-xUYaZu*Ax=C@IeuIaR}+rN%9FfOa=NSnP9;NBSeS6<4=WnSnff{bCkmDD_NN8}jvQzWLR+E*j8@^!*uwx5vc)q+)TFTWBqaU)QtX2Kd z;ueVsN*|-M(1qP-zsgW$AZ8JIChnx@N>%Tlx{SncF}? zK97Fswj#GKw-UsZ6_aML#yBRyp2{tOI7v zbS^7zn5=NajC}YOWTkj7?TGwgQq`Okk{yzqr^Ifu_}1Q3z-GdXr!k~xZJ3~7NKW2_7b{vjA8E zOBv}zmIqyjed}quwBFZZwH&NIQRfTe7DFCfhBbdL9vmkQH2$!AP zY`S!4V9I^O8q^VEIdh=$XkqP%Ab>frj-}@=WQU=*M>=GcRZo;T?uMgPLWYIN*gnk~ z<1abAMnY^(XVOJ9%n97!h{=V&#&8Jrof_^VJYntG-I-LZ`G|kF-Ph`Lh!?C3-m!?g z+G4`Iw1NTLfmCQ$`&pEiCnZ5rJ6Z%>b7ES{jvZC(sE6(I?)?FH&RJ;|u~V@Em>ZF& zK&RhqB@Tjkh7xk9YU&69pM^~a-bNH^nuVK3G%KrfF&rvHk296d1>*h1jlc;on$)#G zGKTmjOy81jyEL7LSGtZn9l=)vE1`HjjTQNgg7Vu{^myhzs13NI$adnq7RW8HJp_7} z3Bk~9NKw}Ooc+7|uXQ<=bV9aeK^sCZvrG1$31zKxzi&Q+x_*c|ipKm~!Dst#JbpGt z=KtSAdZ9LAN%;Rj6XVeXyWo(2L50DGEfBYSvHpyuiXGCn>_7GGPHyUp=&4Ei*Gwa} zDU`dqQ!eJBcf#pze`cYk%chBDA_qVC(HVFR#m;JwUQhe##^ymm6}pw_r>y|6)nLC)UuZhj50 zv9M1vO%r~eHp2IM7g(jS`a^ha%u#u9ysoXAcwuJFvAn|^HzxUicJw|QJJTGW>Fj3V zj?e~(3iSEwsq&hsVyMtb0`tj>*m(pG&a^XT)wG$smgS*Ze4MdqnuyPpNhU0sms*0iCRw)Ufh8sD{$UNfHok zfwEIumOtLZ#=y5QiC=^s+n^*Ie*)@t_H6F{9dOyk7ZS=ABtm&kV4jbb%7Ay4uRn}5 z{pPTIFXu0bO(=|04*HXhvF6t}ajM8+V9hO3L_3TBs7s9tgixbE9`J7yXdCeOjCvGN z7rOXZ2c{#a7{`-ibo@$HIY;Age2g!9|Uqc z$vS>|VDf;8?)wky+y!yH8VPkDS(*}_lXwty!4Yl_GXf9I@OcV^QNKP=I02A$ZloJg z5(;cARJR^YdvK|%DjPqAo@OWHFXx}K&Mn|d2wkftjtuqPV@g1uj~RtPzpYDt<#8Hb zx%@26NdCDfM?FWA8-tDrO-t8bV8G8WeZpUxMr%GM1ctdDYj_Dc{yZc)Ew2umT0 zFHw?TEOAUKQsBG7#{mbET}K+x_FEMrBytV3fhrL6sihC`Vjk-E%n2&_w#64*@9&;B zKuEGk^td}s`0$C!haR@m66eR9_iQCt*y*axi`Nzo_d1tCt`)?Z6ps)M;DOqS@{AJs zupioUYJ@0{9u6l15F=td(yb8JrH~h0N6j-}PgWOqh)F_J##XRU@*mx(r@{#3)TRWw z`}JGTo#Ig|i!-fz7m1;gpWIKhA@GJ*RS$=4MAX_kf1Ccrkw0 zkB;-`w+kPmpqtxitD;7TlV`0*SLJnQOkJ?t z+j+%r+JvGsArs%SIHeb|QVkV5x%*1>9*&D9rm-g(PBB6;m5sB0G)+D`Y>+t?ywkZm zBD%#JYQ#u)Bf@P10~J;({i%merqX_4&D&rb_LbCYyr1Mu!}9>um28hJ*=?Gy%o z6ypYuKbL3DDr8w7Tl`5>(1bx~)pvP~>w&U(V2@)2%T0ZC8{TCE-jqhnY=Ts_k{vw+CfY*U&nqq({ z=Ov~2(V@-2b3(gWN*R}edBw_+h#HM0!InAvM2JM$(|z_bv9O&(@~mC$6J&(&FHB45o{o zUULJhks1h)$>|;|QhOs+SiZlJW(Mum#QcE%{rA_Sm$&HQ*(7)_vG_&2;X3+>HJxw5 zb!xawx#KC4c zneN4js(J2~?81E5L79XTU=X~RCBzjGL27$hu zvefLlT_E}NNWto2B6q%@;EI?dSH*y-# z#gacQTL+RynSA*2JQTMWtg80eGR(Dph3CDqMtweWH^W{ra_Mx^J8XAEnKj#{K1yT4c4cG+bpv0tLDP`zHegH|pdrD@(w#mcL>h zA%S5zseL^q2|L%!5j?>FTOaK*pzRl=?_&j@=rlpb@Q857rk?ZY(sL%KUW1AOB5WVG z-pgw8{XD4UT!Td+vvR^QAUIS-+vReZsKHN}eV1yxYu7zXbEFFv) zzM4ObN(w=&pF3QTI}$o+`fv6S^&2FmWZUssVn-oJS~bVS8V2PPhBzY!>Epg&fD!xc zF~+SuNkBHLVX2Q3sH3bQ=i~llZAg@E9Kl)tdhekM$M*%?Akacyb=^FeoFToLpI2Zo zvIWrd+HJ5F&CTL!F13u&V+%AMBYrGGhiJZBxCCC5K9B&&`t?EI1TG(J6Q2K|$#B$x z^}-?aDRT^W)}fRfV|GFpVJsJRAi2l3pc8Z=JQ`Gx$5!;ZTgB>?ujc z3f*cF!twQCk`Q=zlM!Fyunp;y~&+G}n zssC~bioQg3`KZV3bS+EL^#SJ= zAVA_z)v{6i5x|^pG($9`%P${SXi5)1Z?{T;F{WC+T{tVIC3DyAg}{rd2Eu}UT_Sd2 zFJ;<0gjGuYcF~|G=q9N9NyAsMYX;0&i;q_oURSXvFGVJj8{=K9;C*?Z8AL*F^#Y}M z+^IZE*ESCLgNsDdM-m*Gm&MCZ$j{2tf6w_K)8H84@?eb-5_g`Ff|o-Oc>^LxODIPR z$jYX!aGE_o?O1#dAA>ClMyP!aJqqt8>Qk&x$=m0T+GrIP7pPRJ#V$Z14ZN(t=w2nd z*`Ao6REWu`w?1!*_SH-4&$##5doqJRDU!-bV(+Bfo||K}B=mr2iQwGTQB$PtGT@zg zT5IOzdiDCCY{=RPzt&qDeL0vITAVm&_#9fCI%r?|{&dfM@*7GQz{JLN3s1GY_*lBP z!D$TfjtxSyG_^?QU%%s88|fnp z{LGIHG72u(EQReijO_<3RIz?wt7&On+d=`TNvOx40G$belE)~Peh`3$*83umRNO7JM2R(ey$yzkf)ztL2wUG zs!A&(D@GeQ4HY^NV`@1GTDI(LREli5d(s#RW?};~pOQYXEF1v*_aJ%TS9#90$KQ&0 zy@8uYhYCJrv7;4LP|SCfXF~0W8A1wp`*H_957N8zl;e1Gg~)kdzlLxsvcJ_PTDLp> zY_i)XFv#G;M|#|MzvfM=+VfHfd>cTi$^KLuH*(`i)dNk!jx4+g{Nb z%Q_i{P)F<~D02(;a69e^a4Fk;iI|zT3=TbCL|xf>qWi)gUU<8e1gX+H!^^~g>saA# zqkE6$aMp~+hiJUvWWZ58clNsCcs?ryR=n)eVm9H&k@vosajD`p{{5XV6rvcd`8&(& z8Fg(?{^MW!+kew(F*5#xf^?zs|0T*L2y^&!2LW67Y@&SYwEF(6eCxE%OT4=BHyaPc z>E|qFG6uqTgma$}1!S^{rs7ine3Xp*_!v8R4^icsyBj+E=$pI$kYXhx^My5aZI!+9 zQ6mL{kC< znqWlDO*CQ7l*OF9>+#ls-YRC~I2FH=%hi;%h0(~Z#+RElf2%p`+V6}u(t2I-9{GvW zp!Qi^NE5qDD3od!r6)-q7049DD#aA>($OICJAs%TYs!fuYBz1I^;<2{g?R#0lv+-<>js6z9^+>IMXm~ifKfA}bfSD7rKu~Qv*-qzH14eaqnu4I+tjYR-eRn*kkl0w~ z##!2|b6h&Cd;VD;(hjD%YlpioVFyx+2n>r6m$hl|+|O)oXZUz4VK|Lh9~c|? zIO#R#zsdN2r3PdO13(r8N34tX)q&L})6HNNhy>qi*<+DRr**_845PIPKK_=9 z+K;-YmMBVHs*?0ZuHY4Wj1^2&)Mzkc;ls+E^@fdJH?n;$3oc;2)-AR|KBbH{B$N^O z7auAhgE4yE2SER~deAiHiF6~pu}_$gteqa-r2mD~6qu}WP<0uPvR4p>InS#(s}Az3 z(e)R~880X)L$*)a&f}wKzgG^gzuwkPmy&)z07k2I*m=b=GVjTlC2P~Ti@EJ;`Xk}9 zHod-uv|n8;#R-k!G7WzD(SH4R!l=vKzO6)o$HN541c`d(HIsMNlWSvtM=w}E(^VG4 zM|VU27t@jL#9bmo=$S2{7Am{Uqt|}ZX;l?&JL?8GO?)D7{?6?J^byv^HbS~}&e>|) zJOv!Vbp@t6!sIbFEniMdQ#UM;-v$W7>@?80a`vwYNULL6Fc?DHrOsalme;*544@>p z2J@EB6*zdmd(Nq?+&ZIr4K(KJx79pZwz~ z6`vQv+FYm84)KsWS(}a33^kZ(SA+0_f_$?N4`5o2J}u6uz{ov;=OO(9S8Y;=4-nf% zhoxjAXYZrN%nO%BGzlBRglnLx;50_7gS|Pz#v!*+$!M-xMY`)i_jNwcyM!s$F_Tvv ziR0h=C#Q)07=YMwZ89Z?j`kBNa62|f6-(CmSGIjCJa*ND#E zr;BOw4y+^Z6&t4W73+a8i+@Y~Q9Fj7SA>oXE~b&b*Dv{z#=`1oq`#|)x7;ioW2S*c z%`9mG53<--M@sI-$WjuQ=e;t}kW?Y743s=`o@-q4Xj!_CNf4eOnU$K`i08Rtz(&iy zi&RyDr5rq({r(p!JY$Xa8e=Z)0G)7g)LADcQhd)35>_n_7Pz94qwRn<#e@i%Yc^rI zZL%|H@1kIl*-)(;Oa6K%LQDIvfUmT+8>Z;en4mX-Uf=OrkbL#tbn>1!<@mGF2=PJvPKygusR zYW;sC(=gEeBW0)K`!c>Kh%oVi{QhHRV}XTMTDzNh+g!&W&~L}OK7?g?xa;cgYd&d+ z9(=e)L_epNLWk?Z#K~JeNx;`V63|!K$pt3oM`%_R%hpyA8#v_LR-B{F!{t zP?lPzsC93h(fje-4&o;UbKLR=jCz{`}#x2e599k_#A_J&t%P4m$|CYJj zC^LC&+=cWxz-Z3#Y$-^MU3H*F%H-|#xe70sqKV&{HjP#qzsbImv4dhJ7R?Yo0IWGB z40vL?P(L7!IS#T#*8c%H%>+%i;RluWX|u9d3PYVBjZ1jq&5xv8Vf1(1({A>)S|}P_ zV6HalcCk7MQqSH7LV)rb!p5dCV??d^Bz@BRFsJ%JR`nyt{)-Jjy>5&BOAdURv<>Cd zYKc}Ote;W(n#$G>1YmxCs{Q+qQhTWfMp1t_NM*wcb0F=7De}Y9VroSM5nnnTLmV?D6h4Vju%J z9ZH{chwN*^fcYa)9^$r_G1A?3hBc+tIk5cUDDX})7?Tt=1(T!I20agFQ_<@hkHxH@ zz!<_al+5$JZLDa}$1W;AGy_r!8|&uyuB22<30!f&QxMlq>sET?0YB2P?g zBouvU_8wG0S-th8pLlhUnqqglU&&+s^UI?Ug$MB$$v zXF+C`QfHx6F^9_j=+I4_$$9u0gn4`PAD3oZZ{aD@x0WdoA4zzP8ZU=&DJ#=+_8O)- zq>J(T0E(2*2Je)0d|fJONnkD&jihIKq+_@NtpwaIHdBICgB^k3s4yME&{88bi zg(m$EpHF;w52DuLLN}q`USP|@98ySP>~toe)segI0m7#Ff~R+^ffDTn23|^E)=Q}e z@O0NLS+;7IVGE1ZeP!*lI8}n%ZBR}_j8Q(dqOOqX=|H?m#}DG#t%UuDr&&eawJo#e z^>)QKty49M9&0kjc2B;VGocV??h{Ypu5+H*=&?9?3I_#(eVVA9P#<&tH9eEo#muWu zdr71@gLkg1nNp7~PY9h1mXD9a7QU;!H%{OxOz`pd&pf~H^B=w=opgDj>zJY_je`)U znr7^F?N)3hnL)1QLGG(3Q0gGUnhsO}o1@4|np)4U7a%t z?`HwT4D}rn*>8Pjdt?y-wl$J{Z%k1`Xb025HxG%=#x(p$xG)a9O(sr(%+p8qzkpif zt9>#QFZ-Zv6!F)y2_kx7JA*{MAd#`5_tmMZ&L3l(UAasgW3+RI^GUDFtVVup9~KkJ z{_$rU6g796HT5p#dp!6m7vhx^w$``@lY49x%Fgj}eOSpNBcJ0sO!A~G=3#eCj> zxGnvjQTDeT+w4ZL4&%4rO9~Pz2j&_{_PPT#NRt+aNJ66!*F8?M>uy0bxL+DJ`ix#) z6*9X}uCgv$alLYWmWwd+I61}4`gz)%UQT*pRXmWGv5opI%Ekuek2ln6VyIC}46B{h zhX5o?uL&lqzwRzsQt&h+yf!)9aBnd`Rzix7F*w|r$(y&VU)43;JdunRds0VDl!m~h-9=lscabm8 zOTM&&Wr=LWgR%-2YQ9!qeB`R3F{DExf|AnDvVuA~{b2eeio3nj(kW$Vl`OB$vrhZ} z#a(h`#7J)R#N9-;PG#Kn*rB*#qFcf{T=wEeK5M{v8Kdqevr;vFiXaSR=&fh+oAGh5qR5=kL?KR&{ADq$*n zVFB_mw3toDlT3a;m@Vft%+$_*8Koxjd(`u@>;N!+?rGLrU|U&_DTevlUC+brte2{K zTgkmaTPG7te7I#?%$3!29BxiZynGU0awPXY`;(pj84pi1Mhm}#`zyBk#+O@vZK}av z<@41k5a-~fWOH-W119QUqo3}7%61u@8Rqu!9TAgaSl@;46e`d2hmRFzv%(m$BL^g! zk4lf-hnI2Y0?Q^OFt4IEGRi}dg!Q3>Ro11iWJfjBUvh65fki-Gm;0#o{?{1Z!q(~v z%h{s=-YNYdpq2(x1VqCeCL~YZut1B=4g`EJR&9lSWp-8%Tr=v}^4@18pW+qJJ5hr# z|D8(Tr~|eFz^9Z}U}+cBmjHG8O|Vgq9%8B870_FjItLt(%A?cRzJy8?+lw)R>a=kT zw-t{xM9o>Eh9uc!^kKUFH2SI)dm-lvztUMbso4mR2B#*nP6V3*lzQ`<2nyMRa&^?l zPAkz7anF5K`1MEaloj!ZcHEZetJng;NfTK+?Fnv$;V&>uBgJnKMwy+~m3ViR*SVw5X( z_Npnz#9r|!L)2eKzd>dY!n8khuA-7ut24?`+Unt$JT>d5lYTla%cM@Fr;D?oS7O4l z-=yLN)vMjOzil2~^p}sa4E$8ZP11F8G!110SbDSjvfFH@SR#-C0k5Q1n5xZ%lh0j> zM;Zo$B=Ihf@W6KJ!@%NLD?!@3$Fb_navh8rus0_`-;o%j5N7{cnpyB@@vL-Bp#cCI zK@)R(16vwFa~*pFegi!#eFGYC14|=&V>~)~wtuWU4!+kNYs?7WL0ZS~$wWraps={m z^`us@Ea;HR>T z@7XoJ$}hVBa9m%3elz4J`hi6h6FAQMv)A@7XT=S;4URF?(-?7!k9mvu3oXB?7E=>* zij>;@sl}?cMb&ohpXP8uqfvmi<;81&fG+G&RVxfwBIyH<=6ZbgkZn{APUxrXaSa~a ziK4LZA>!LeF5D^0s6WWLXO>77?YoSzQzG@5J3taWGtsxSG=*@rMadmG<5;_S#yy zq#ouQ0i{EFH_rl$9YwavrUJzn^rFFOGJd)z;@}|&loZd^=r;Y6V)##6T3LZpexW~l zuMKFa$*h9>?#Kn%-7%zv0y-t$+27gR5mc=`mL}hHF@AEE97|kmOuJQu7ua13CV+9T$L0)#*5giD!k>jj+ufW-CaQ9;~>%si6TKqp?+ z_v%P4s`O+I7Y(U4po`IP+v?h#gjWHjI1MocD`;N;2cO_{_tC*j@i+t))(?4z5o4?} zdONj?UZ(C^k+jx`tZ282moR9QmP>NS56AFiCovz%|2$W$se7*h&-sn&{oQnO;9go&!|fU{;74%qM)Nl{s*6k zucFIuyUn0=jJ5d*oR!DbY;{|vzRFmgl}l3cctgu2>@-tGYqstoGG=iFCa$tu6mlX< z#+SliK4iGba8fxM%$<(gZMCSBR!CzIjrwI`VkNaMZ?DhBEFpF#54Ip27L(mz!Vv2{WJV@DaZmJLwoZkqlFv=3Me& zyF>ymZu0~Sx!XAH&gLt|iPWaqki#q7%ibClR_zpHR-5h0Vks*i&1yzb9X8~;s**@j zrX}e;gjVte!bMV$E_Vj*`r4ZTIqhsTgBqIRVw(IL@uhh}E_75bP!AHC;!VyqCc7k1 zdq|gTUz9SKLZJ=}Y7DcaiNd)HEGh2dT&c-S8-3+$zcA`T<1Gv~$ZykIs`6H3k>MFA z5@-ZuC}1k;6$!z>XOGXLIYpwh)NUTex!t_=gpq`feym7c70K`Wl2id z>?*2f{B%V+oE=SI@a!rH%hE@BTTwcj6TFE(cF2(YWvwA16^px4C>F(SFP+QrmQ|SI z<b{rTMq2%0T;{swyMhKP2}TDlOkf(*G?MKE5UQ zrMqB|(ErQtr79n{&eq%S$28yHazd`^EXFZeq&1`qL(f?Nlxb>2&3{)Aze6qt=WQ)j&pE}Jf{b6W3v@Rz{1^-H?%H^-VFuBfgWX-9k{Rs#=Y z@~K@W>BVcM%_Y0C5-Q4YL6l`4m%(zf*Ys9C)Cc= zXY~#FR$?eii^Z=nioaodP+@<|s#L0FT2Y6eS~RqlyHfqtC}Mw3M)-J1j<5jNTW&{z zuEdEaY11+9$|Q6|)&(P1txYE{`ndOVrTql?z1Bn+h55gIWch6&s68Q?$vx4|XB} zQ(=Qv(|yUVccLh9*CMF!t&tMpKO%r?iftna2ph#O&qrX|kK5Gq$a)zfN5v=W6SH_R zvPgR~`K7Uqh_*uV*O&S?%(b{%##=;tT`D__qM*M`JZP#ne)jP3%W%Eq@Qy@zN!x)D zhC@aqFxKxFwF(! zs>d!^a_8$lF23k`Q`T!grN!2rJMZ*4(!rXOtDUDExuSG_>1__7`o&R##ppn?<8;F5 zQ*||2q8ncfY{wHYxt}4IlF*bI_9?BjEJOSh+Xm_QtxB%=&clZ%ZoSUA4Mb)ns(y~6 zY77gl%o}s95=`#{4WgdphMnW0u{Nqa{fQ|`s-horLBN6p81xoOM|7@~xAB;xg0&&$ zhm?Lh92aKAkmbY!{&?jxmqj}sw8Sd8(tLs}EjK3m^h|IJ`Xc%2LD|-vHulgJ^vFsX zp;Cly^dj%^;V-$|>={@6nl9SyU~+5FKCyrZm; zh(I6s_1j-1kR8F15CcnTRhVImTH^PX=B?a3*1|Chq&It0?^Hbk1&%Jf^U9wrNFS)^ zGBc$J#C61mc$+e+LVZ|4l5-)#CDtHUR$4O5`g9E&+_RwV^hm;FY0d<7cAkxhvvtu| za!2tLBE=Mc7dN@B#;0I!byi4nN8?o*vEF& zVZ?^m10ezG(S#YI`@VlVl-kg|BGj_nlC6?HUezRXp`}o#pX0I!D%-j}9c;foW|C$t zDLJfcOyNL9%dpl~ah)!OYM-2~1u4U>>p|f-98OZ1udqGP=h{(0@{1wbHeuT^Z5@6h zSywI<3VuXY4d=iGDn*G^i6uQx?r(DnZc-r}f%(jJkN%lzCOQw*{w@=D-jaEZwwWI< zwq}Q4M;J_aPv$f%75}M7-kI7%Cd#HeNLXmVX{->dSC`L5tB=R_;ew#NAppza;{yBl z@MGUBrf^){*5-vy+?yX_;R;Ra9U90O&!GD7O$@1j;<0(BLr=B(?%cQLrAk&5=3mSC ze|t%0V)}=w^+09JQk?~Mi9){NNS2onNhU!%)wYd~YnqiFj>l=|k$EDfe zUb9Fj0s4B_g+}hiV=`UZa|%O5CLEdvo$l) zYyFGqlgR4!su+le_q47*0jsj>pEUFV zJknR-%7({EGR-V;8^jaTtJY3Hk*oL4z_NW&3LXQN*ht=S8J9xY8Kh$XoP?}mWMxff z4+J{HQdGg(u6AcELtP-f?-H2WUPZ1(V zKUF1xjqQDVXSBOaKaR4`Lk)}s<{mPmKxrwg%h;fJ40=67V&_}(dMLl?2wk~(8ZGmQ zM7fY7jRs!%zvT_9Gs1H1EdheS3~Vo!QWSx0ht#he5`ZPzw%LBw7NfYuE|utIgJ|b% zr)Xc+=G;H4%Y2k;F_r3xn-0@!n?ml zA*R$GFJ~t2t1x~*>{(NTtM%z|8PS2onkGsQ@D2kD7)+SX5v`l5U+Ve2tWB#P0#@s3 zPS`ZmWb5Wu1LRIUSN^|Eq51=tOfxiN{v6t{*OH6YWZR#PI8Uf*Hi#BO*2E*Q!~`z- z1~T!Q)U9i(aGJZ89NIQAmSaZeF7k^Q1SiQT+WdwlcR8+lgpA}t4&Da(W00{`XiGUE z(|~CTTi4p$bLvdG5E*Ql1wog_)4_91AC?$e)Gj4HU(f8wXbTuaAuDRo z8Z)-HE5u3&Av0i`xy3?V(AeZ*h&m3KVtH!hSk`r>~+#k}quGdz0v^F;8zZ_fY)w1E-Pzj?# zii3FM;Yq{vR|cg_15xdkgwj}|o^j1;Qpkw;oYFCKIbEw|@Bj+wo_XZ02wrdu1q@!t z2`96fdOlH|;%*pAbeh88zgAzJwr6I93@3~X4ehP^rn!{49JXY`jrvf-i+L_`V|6s) zd5=+@8ndGZav@qe$~UxOO=4hW+)?p ze2n@Td?+=_Y{S7?69xVay#I!hf;)@05sB(%Ob zL|()alGox^@V5?ke8GW+O^$H$7hu!YHQ+1euHN%=eR4tb1VE+!ssWI)tKT=@tNS^K z`^_r`C4Vu|HuWPZ=F`^mXW;KqUOaDU1V01%&mJ*FjL;`lllS* z^~CA?x8B0|-$n&m)_*KuE>!++H0Rs@+_@?+EZo!h+*o)lgsos~y!y0?x1 zwlb51S@h#3Fw<^4xWVA_-YEf|PciSM3g;%*TAyR=vBNJ$VD9ker+S%w^Q6%5(cI`K z11@&cDGR(Oyi+$OK^JQukeZ_`2r_^w6L5y(rf`8kTPmY_GF)aTNQR5828RZaqX7b- zHKV9a#6FdJ9qV{d9G=uPt#CNk&?W{ep{ix1{RVwve{xP$V;2kv%T;3s-OZRz$GfJ{ zQiugrAo<707^E=DlOY9l0W6>Kk_b)U;%GuPN8_sQ$`FLwY1*v{F+w_5OY&Dy5{4<= z6b>}4BU?eim+f9MWXk3WAYcBDwmb8dWLOKkTCDDXd<-zE*9oSy`ki!I?aP`G~i0us~#$8sJ~t_Usbj#ck>(!9$CYdVB#)X4JEid)Zwc~ET9;q{+(_n z+Q<+~x|^jx0-sT?C6fyRt;OeDq|VY`ys3=|*$h%&6=A0N5_C#0gcy>U>@H}-;c0+N zW{8b@S$zE9#CD8NGALcW4%P#CXMwVxXgTeU8?OL<8e*PNRmqm#Od=khi>29QTC*5pnx*vuoT_EBb4w&}|QQ%94 z{HQUb_x{WCdnejzwFn)M#(1OU-#gBtbY)=oU`-DK8uX5{cl(;Dhlhva=^BNss?jn- zeF&C|m=v6RPw}n#BKh5_g+KC{Od(Es$~xK-Fb+N=Tl1#4R4e7avmw<>$cDp3niqxu z%^3DMUpQygiG{j^ubAXZjiOLt@^6{JkQMXXe6Y@*H#Jz=S2(7fh>1CNYS+cyI6e6q zfYd>E!A&R>pKd@+adv%Uq+C*KRmlR@A2BJUW1;q0Ah`Gi(q#?Q?dXmUAF?}EVKFz~ zz;jPgcK=j^e*bs#Ez5uI=Z^l3Vf|r~{a{!l&Ew)J0Q+#D8lfMXuQtQ+;>G7BUuwG^ zZ&DT~?un-h-6rACnEb5N&?vnGc`h&T`c zSK-_flvWQ7-rNXZIvU4 z!^k1D^=#IfV~g;wskpZ^f>y<36-QTv1RjS%zwzl}w@rtLxIH5tBV}m;JnaGhL=L0Q zg@wdUDJ-kEd9&7;&4}oj?h=}%nQA1i@Ea!2IB@_OK2X0runpBo9&!?Cfkv8u;GBg$ zdOA{5D{PV+2~nxIN)Zpy#pYBvI?5c=1XbT5 zui1>Y4(U~wmT-CC+7l~7*;k(4_~FPOWS>{sucTWB8_nrQyLy5{L@D{1POXB#W$YrC zRtJ~~Rrivd^{rvp;+GD#juw^TF%`66CU?yejp|?H!7sls29kwZ?26K7+|=ba!9$`=IzW!2GNQrA2$qV_2McQn3yWB62j#4ctWcAo<+hp;<`czEu6#b%7( z0i$jau-qi^TfIKL{NZ>FhD;`RkoM|)VI&^8_mBe1SK((SADuLf8F3RSvw4LWFNBIk zJ^|ebs)Ghl0lT*URj6Ua)fxtx*>N|lG6{Z+73dK*_=<&*=Fx9*N}%GkZGs>iIvu~w zZL0ac*tZzue$X=BZ9=dLcdc~@q=rok7C3GU8S$m53sQSrnyv9COUv*vlgk8haEMU` zLkOV>|LBCz;zN)&GxZ{?d^cD!rls5YXBWLX^cZdn@r7!c73miDXKjEm^8NJ)KPxW= zdYj+820dxb8R#ARr?C!ZrXI^HEYT5zVEi-NNc2U8(8yi$0O2Rfa^$!-Wz~=478>N_ z{tRYpaN3of$)mPMocdhtrC~Y-VV;!;B{=LJ#L?#wIDhC}!lBU<1yddLM0WR4G@U_B z97`jWw2;8f7*mMSFi>^F$jJa?*4F=m+EsnjxsU$7IUN(Yto+bR9xU&3k~SGv3NvNk zS#oEa*=%7t(4rvY)POF2sBlAn%C=K`<~M4h*D6RAjw;hL!xy2xjSYldthV#RiC$nN zO93{9fZoZFD*d}{SU=r?(ZYqFlXXWhFK*54#?xS#CH&4K>BIY4=@2h~MS%hrvS@tf zmTsp;j|!u};CjCH-g%jf23%dI?#3CY$qAF?E_%5(bWd%PD7sb19I(hPNRM%lKU0)6 zfoeWZ`wG&RW&4son&n!t?Er(9Kb%xE3~RP+gK@CgS_^Y9Ikl2Jt79<6J(^pmN^&wU9tfp?$#9FB_B_QW;>~dU=y?;dkty zu!TZ*E??@gbHbWnRAMZhT#HuEVpM64JpBc6=%EgG#h zow5~7reQ)tyOpL`HJ{O*d8v$O9i}4IH8?6B50c`uexZG_Cxd+bhySAf_D~D(Xb5*{ z%0fLLi8!HwRfmG1g(z+t(a=z&obo`KisFR`}o>%aF zPY-BYG19)n$rKDZmlkB2_?BNxSs=BhDkOtI2DYLgTMFzF%TgL%fYI@)Jx<(x_ajCo z#rW-)M8n_-{x>jaVD~@KCVsR0ccU}|`+r)K)W)oF{%t;f1s;fPvIPWlppOL^of_Tr z$0>{>OL^T*@ZnX`bWhWcts@oECSX;cqOA`fQmM(-I4-yw9*bc`Jj`KAfxmyu(Db3Z zzL`Eg(V25KX_(l~tYLJYC7(Y2d_0+JyFJArZ|h}G^q91t@wy}#o({tVI}wvUBys~) zNrNisneK@Q@H_zUKU&50ojfG3b9Q3kSvG0SgoCL>GixMj`xL&8S#q~l%f_<+Az|uw zh!P@>sP6JfS2OU!t{?X3z}v6tdZ%q}6X}d>ydiyFy1&9Q%C50^d`kA16B5jvzG7dE zQGObc^sKM9mKFl#?ysc$)9WCD-CbbsS*Wa>8Uj^Ld!48UkNu3ydd-^o(P zYXq2R3^1{A@}jew<)c$viB3=*p4M+aTRSRx{{ z=g1d$kck0t?huo+0GHXB0@DX0>t!0RY14U`g2_>F{tSFGXO4BI=sZ+?ob0(}blUUb zPUo7qTi0WAP#5|1ngU)`H(2Ok-N59;Oj@=FSjgmoyN-z|Mrru^40?x7N05!VTZnNy*I)F8`$=Y@VtZE(;p+>wSWJVe}0H8wio5|aBySHUxpJm=wp z`W0H~hqwXXKtUMkb!X2uZI_EdmvtLlK9`j9KtaP0r7CzU>E&h4r`a@OxwHN5 zTS33-hp*W>bU+3BFd|P{(kagIDee#5$?hirUxrq=-1~&}@liFXV>i?|aIFsH-fx`# zB4qC-93$jj0lUpQWrz~wtXk%5N`TB<7#;x^Te~@rJlsm2woL+6aSSf?9i=N~qKJ=` zNww;Ry|Uc4L+d~ZQg${JY2+}FHqMPoTQLF?_W7g(<#5hcFQloNh_0{Z_Y`sW*s@WG zlq0*~nv5=ky$VGHBmCw^tf^3-C37MG4dD_3rxqHdG*kU%FqbbldvD-C%huxx6NY7%;(cD zUZ1ILoy2IsfcKCdxb=9IoTR6^?{AH-YM#=Zne#1=lHOB8q|ygzK(ib<+*d2V#kcp7 zISe5KYF?hZfD+!B9?FxZJ$D6-SJ(d0o82h8XUE=Ne8qJ4f&jnjvJUYm7{#5i3{qX;EgyDhxM>a*Ti-%%y`N-aD?L4N zT!^No>Z(U#S%QRyEW#wvd=YdH>eWKIKN9IG%S#|E^r~lc5OLIL)kMkz{QoNe~MD<^PM;(Y*W zAh$P>Ejt=RT=BqtNrUpT!&nS9C+Vait1ZssaQdYA$Fo4^D68mKf z7|kdxcNwXNrl++W(n~61;`UwDOAtvm3vG_osO?E=rm7Q8sQQRd=R-#Lijm*2sBMqC zH-88as`>Yl#ky-Urkd>1_%DK5LJq8KYn{n=yS0Ib$fyr?C$+laJD1QLSx`zmHPXl# z=QIdbCwo7fDw(vxnZ(Y$6C0ZcfM@|)ZIaskSYzA}%;aZo<2_B);GPuMxmV zeiLR$=FTahE~S*=G>j>ze?jp~>sK-oQIA4Yhx{H9LH??D?mhjzEy{}1^?69UNk;Y>T;g#S>fD=MJvF1N#lZ&0v$7I6 zQ9u;2esezTm0u+-&1zJwWlp>8WsqkqsBpg24}%<;SV_^)I%M9tWVJVR9lJ-+8bl$l z4@k*?QM=eRWH`2cjD0^^1P{9Ndi0YHida=TEEyH7iV7w*^XL&Ms7^yGko&yZOrH(G`JRQY$%Z)IXQ*8F5k3Mk1iCECis{e8(9Dk#V)8Y{w( z>e%X~Ey^mrwXxAzK^DG!$q4_hZx2WL0MZfrbAp-M`NCmAl94QAEYh<3_xge2!m%Rh z>K%UPU6n*!gY)MjUL@?DHW)jWdn1NM-5HnK>eIHt;0Mnc=I07y79`V*&n}XX2mX-n z!ik6);h7_r)s80Om)OnW^!?Oqx;r+<#VmHX?H_2MOs^8nK2d}e#zO;|RViW&{p_eD zqB}yG$^&*jh2~yfX;hZPz{V>=(p@~S{8tSQ*e?<(XAwDmhQbw8lpSZdg0CQV8FZoU zcR*+>{8ut$&iz)jff7N_*E5~zit>L{Wm*2KWJ3lf`u|l_|BclBQA8&3YpLS%@qG6L z{hIk~_`QC)tKL+5n8C3>{Rkoh1$U-kb}kx){IRH9@nT``gCnd7XA2++Nj~(TiM*WL zKQN1#`ES*)Z`ZwC zWueUE3a+S1TwmVb!YpDg*tx7Y>tGb=pG5P`rVB-ncW;imhDo6fi3wmc_a2nsE)T%j!S-%@m7rwC6 z;K#A7x}MYm&V%B*v*n(i8d1)>D*sr84u_vg4p~J}ZQtZpG~;4%{GvvG*E1^GR@k0M z`m%E^5ZV$Kd@jMCStuDB^woQp>>A?~j4O^wc$f=SYl-76(J6r+8ftsti#3~BAOv}{ z(hmL7I`L91CWWzt4s`9erS=}Yb{xf}%EyC6*c5u>5KQw)2u+Y>Jj(X?J2k#r1(=(` z(mlPtre?(;?I-_m?*P^l5P<98M;s5La=BMZ>|yJh12={(u`2VSc=M%pM;AhJKr`cN zh)>J343Zf){{dB92!8ikD)_8;=gv$IEi|cbkogiEH0l=`4T=I)#kxMPB=!I+lr(tI zg(%G{sy#*eK52LAr8^h6>)yE`2hJu15U+@-5ng19^O}WoLD#Z*zLdqcb)HD!p${nG zg+@yb5mH)51YYP@Rvwt>^7Y>UcnMtGWjC1g<|hfNwOfBzTiFkM}879I9vLkg}+ zHDy^i9YQN3w4vo{2|VYWZ=%gW&WRv5Ec6$?(kZ1<6ey5-;bx^A%g|4#*RgKa++*ri zN%4wRgMX{kZNVs}+P`jlO%Sit52^0ii$9Z5c`#)g>jh%!w$Qp8@)0Q0OwCq$cBTpU zeZ&ZjV`#*V`5d}3$|JlB&~#9n_{aiOBhEIrDhmaG16RUr+ymsPTFOAvQ3m|g2Vu<# zsRxC(OVD;r1Js4+x8Gj!(I~_h3Ac7jx47BF28pmc5vu^}c1a%Ch|n&hqO7H;+2-Nu zPNAi^o(VPfv{F(CKM-vDd@zq}68v@JHGl*EZ=gd$x1bF*-rU)RZ+78qg>>pL~Y3P}l`Iy){&c)7s>9}LGL>fpb#-+gC z)Fs2RvUX0I4$MiXc&Ju}{$$PlT5zv+EYP&guxlxqDIo^x*1H*Y3=AIP4HwWv`Rne> zFH%azD{ToG5Mq7-1hygZ^YP9h|O;CJt zxdT*;5)&ED(UfFyC&+g30i4{1+uQD&qtV6NZHcoL{BYOTcC={&hw(p-kR~)GH?nL}K$wnAEh=%6ob1=q`$s*-gkyXr zw_P3Xt?h>`?C$SX&+l7$ufNDL|GJS&!^>`cB5|RWfq&VVR$ur*9liop)p-xEJMT@a zJFt>eRdMbA=-96NdA4s~dnPOhDqy~e4@&^IVlF4!95KTd-60!ChrQx4vmR>QlTo}i zZ7=mE=^+}F$J&e~o+U1C+MN>FXPd#YLl+j`*~T3+Ccu;2^VHZLkEwv_(c;MlZI2Y` zST!|F!%sM7nQ6jEqId3?C!z;?=_AnEryhyFbg0Vna@}W?o8!jo>1akPmjr}GD_`j~ zF)6lbk8j&o>y5mEE5g|#7RhD4Ug^D36>oP-dV>BKqJm{^%O(qSd^o&2xo1#bAHzga z4W1o#36$dmzESC<=Asz74S;s`Qq!whCu1j`OqU>Jb7-D1-Fxf)`W)Rp=91=+WY9sJQXq7hs5H06MPuM;Y~4{< zBiWTXK~DXB3ay$ej+swjb%Zg(a)!Pze=fJP#Yyk{%F<}k5XM9m{P&K&-16+7e%J`1 zU!6>wQ{k*+f)f2G-JL1T=WEH3`Y|t}kyF`eHyaG}@g?%!%maZ+zpWOT#~j=#XKZ(@L?0TU8^El zbA-=0!SE76HFf3EpBYLG0u0`Y>uwwH5S*KM{pOrW?}qa@eJ-snMm?>KFeRdQZiyUNR;gf=+^f^veWRR_UNNc{ zDHCOAaGj>4i{$BimXDy%)M>lKirO4m>?-G9%jaiGAM>ybAi^!#3=e!>FT0M^*6{OE z?sBMxh>&(PgKsSKyox7?mjL1>88 zZutr0GP#l}k`UL_gb}7jlt5-|UO^{!WNwC=1c5mjSB=M}=N;uZ*h0^o#`x=-X~dbL zOJ}$tTD9rVq}+Jp_Pdka%V#T=RQ;nwm zy)wvX6+9F6to(>U7Q;llFBH@RRktOL&bvuaQFOZYi9GQ1&Dde$@)Va>>b3eU#Jxu2 z*~gmf&w2oQI?Z(cQr&!@lLDp`qSzT+tVgUXUM35u@GM}LD1NeNJp3iA9H-{-#O%rT zR?4_L8|?VjM{%%rUW%b7wyGFhb@x@vO3vw}hK>%)VammUN!?`!X0dwfhX6J~DLq?` zz*UJxPQB_g5K$$n{Z^ROlF_=DI+=YUGe~8DbIOXn`bCs}hZ4iGMp3dhGW?M^roo>K z=U~<8?aUor05a0l-no3@APP~%=G^w4d*L45vhxL;T|asCPc@wFzccl*{QeKN@0OaR z%?}9be@5g#HUzhMd>wo?8^_9z2pf0W?IBl1KcEb;Dbws|TykmjFuj>blJL*h*TJ)H zr{aZIlXi&LnvMgN&iB9^x`rE@ED1#Y7ugbKN6sV5({5*4p`--O@1?J8uWN7jOYhGi z7m3YXm#w*)_`TSXCI#Lbw9ZA!_a!y&=vI&@+#n2gwN>@ zTp=qn=R=L_z#VY+z@3w?=~J9r2CfO1PXO-WB%JT(=#b={;9~SXUfy`?Z8se!CN)s# zC}(>E1zzZJcDfAmEme?kPrSkU?oQI2a@Q(Pzr7aOubG~n+RV-IJLMot@_eE&egjY> zGhs~uh8asiMl`OMe2}R&Btsv1yLJw1uKcY^nqMR}`Lf(1Ea(Lv^-*3xbDKfjh2V3K zLcu#Xl|?0ub#=I>VM*lAlgVYfb53ZN+Z;|6^GEL0ya z!bIvtOw3}wAR%7*c18!mHD~N!&Lh8OF(eU~xn^&EArMv}3Wyv@$;>F%g-nbtI+-^c zbgZ~3TT06J+KY+rTM3N&+=liC)rq9S5{&VVi4^)pr~t63we!zz!}8NxKmak<{T@tO zttjNfD#8y2d7IOp%&k0a&gDluCYXKYL@BQuL}Tz^9qgyl50v|JM!|r7zI9WZh*_dk ze+JY(9eRI^cN#6sa;vR$sGT4mAyc6EzAbg+^;$@nZgCLQ=+2~&MolLcJiv)I@|WC- zVT>Y0fSW1J++*7=jvP_cEs6LBOH*W`rB##K&04;=y!yzYT(k-geV~9UT#(vJb;6{k z@kt}O#%)>?8@8ZGRJrA)$$fvdu1kxzy(d6soZMw^P|@>iG`VMdhkSxHxo4$LoXVf~ zHlglF^2*naWVRGQ8av;r&ex7Aqjggi7MgUF3*7q7c^u=;Q_t}fAxPYe1@aCf3#IR7 zfVy7FJktYeQsfPIL$7my6|01V%s%+)=d$PVfN3ezSAsJ_V24}u5H78;1z&b6^ zQ{$y2I-ZE!2IOLLCrya-OZkgCYlGh(8t#rkGUS>Z%kWG}3jB({K+}&UcX=Vze~Ple z!==OqO5J;_)=atLtKDNsz_QprkX((P%d)iKruVJ%x_P8VUjAsq+c#t_WKmp=-ZRUt zl!Eu#ePvc3F=J=T1+G^Av1;ggxh46Ck@UzVGoN}lq-=>45+)3@%7AellW#QFQ85f5 zAuSdr;b+FJLTnnfpFd`+oFcXIkQ{P*Cgp|KX14|``8Kcmn~~(O$Trm5+;+eDeCsPcH_E+@Bk(@z4D3`gj`5ZYDB{2tv_>3I^O7D|L(lHEBZ zj?XJKr35H5UuRbTVE~dL#fw?R2~0RDD@*2m^<1SCJAFm2ePKQPRTnGAI23(InIkK? zwfvb>fRRz0=A^U{0~8Lv?mnITNd^0GfG}YIRHZy1^VM8Q^}yxfd5h@GmVr0}JH0(A z_i75*q0!aA!lUVnW#84NSJ9pVO4@6AI|6-kRB=DVh^i9Ghea(yblXy4`*C8WA^B0c z5H#8S+Ned$9GmP(|5`-dnAOU6#TI)sFNV$9wB1(j4q0k_n%03W1$wO` z6*1JMgK-f~FiRVsmQLYm`y)6cXyMeToXv*`ZxsmrUC=Gb0|)J6VJKdNGwI;f%U4nN z{E4q~%6UR5NJlHTboTb?UgUH0VX8RgH|>eRwnoBmY6u+8OA|{3Qe~svu?adgyEL{K zRpQdDh)mZ|T*I7#(2WcjyIp9i$@{X(ZDtLLb9(dP&%zKC!UF!}A6wXe$$Db@kGt-F z-QNBGc=`mTAy|w@LOx3ZR&obu`&8?xS0wyQN$;PHA&EpjGp81#?C&ba=?bSlJxINqeZK1R%paEtY4>Wb%Dm0G8|sBSdl7lN!Fp;09YVcyt^x0`d{ z*eDUUyr6PFu1qI_6QxLRymymVhu2NBh)!8?<9sFlm3}Z&CT|`<0jV$A7qJ_AA8ObH zAK$*LEAvjfdYu|8E3yx17^+}5m;Ns<4S#~O5+n=;k}sJ)>&+I!t4kigeRHi=o#5w9 zbOwC}Nh;kSFv_#UON(<=atH=M{_^EUwhXvcD;sip7ORL?HWrNVVn4(%!?Ttmdxaca zhgpZ4iO?ly0UZ|%TOWMKdjy3Gy7+$m8TSu|By;{S@m5M2zv)(Am(}R=1xa#u&HBFaexgDYcxHbF8@-cUcs} z^-f11--Rf=L`AXiWb{Zd)9szE9~{yMZN+S!W{R<$?d|$Js2H%(D@L<`GZfA$L!745HSGZ=&QW zL2ad6eLDkKWw5U&#`!(n0op3a&fePrb6wUf<(>R;pHUqGAZsT2c*o7ZA~ZTal2qEo z75$*3L^F#s$^k#M8KyuEOXKD_(g0S>)E6wxeoVVKq&2buuH6T6Up5%A<{Nb52dl~^ zlDd0)%KXC?h}>F$sBbKS`sA0metPVcXlbzCv%%!J zP2mlcMJqVZ=1H8^d;Mr;AK7#*My{37NjOS)GsIw;8(so;A%bVwpK`w#WtV}HU1(uj zO*rfvJ1JsADdCgT4IEady%GmY+LzprQ9*WCOA2^wbwXqDobZ%F@?2l%)OGD5O9MbN9jCkRn!$bI zN9g{?-|f(sjeRPAFO*G>i$unricnMJJpPkV&;HYlZ@Dv&Ax&!-WNJ(d`*Z!l!G5Yd z@?#SsIdJ!EQ%nQ3&#?{h+Md{xgVi5BCtlTcm@=%`MD5X0yYOHb>iEDz8K#!)9 zJa7}ZdIlp;G?m<(}kg0$?N;bM{Qr{`JcK1`+v7kWoG+N^Jbc4%qGjfHOcHXhnn$q=CK83@iQdM}cwCAXK4%>9US(Zmb6(GIb?}vY zc)1*R{sv~vQJtH%hhVp4ABO3_*nVAAHeECo|Enz!@)}fHp`$IQ56zlc2?x?m)a(xD z|682OCZHt)C>dRW^!1oeDssAx^70NYnF#Y0B8rqxrh6Fd@k-8?99Njn6$3Q30vo$f zWb8U(r46sHsMDpSBPLr*ZPKz(ySjC1Y{emdVseY**j|U5kbh1aiTn2E7`Ee$rD4)+ za3VU&ZWx-^xWXQ!c#hBhHTha{;3y zm^KtLr4*EZWeI~v^s|-3epl8JMYiw?pTfugA(BAhdA^vGG=^=BsRaRc$Ywcd59tOc z$86PXePlA2V$I@AZhrmfRw@Qq#o9fYzFoxEaOk(67ehwL8ApJmVL}GNV;iUKkJxXh ze-e|t)309&IZa16TxBSX=1=Nc*!Y`cX`&H@=e_Ko2OaB$0?q*0>4M76ii)h-k6KDj zQAA21AL=R_FW0>n6E}0u#$_Nuy(q6^57XM~G>9trJqOHJ)9EQQY}804EGR^GKe`!igywnUqC9amV5~6n83Mi48`|7x&^lW@V_YQYJ7W4>CZq*T4d- zN!KwoOvfTsc@joeqg|Qb56mQO{jRJRS{9i!)6q!hXv_Mj9(;j@&MZ>j)oeVmszNPF z7^1rg-uU51=o_ci;aFYnBBz#4%3-$bQjT9hbUOIQ9z z9i3^L51a3`3NyE4{GG8j$gB&`NVKhBH1RX$0V;cBv{UT~GY0CceR&D9)4k4G*31YedF*8P!gebW)9(A-pur`dWRW8`2^|5c%#D4l-VZ=*j` z6}6FLaZFtvpvh^g{q>Ie=^{0j&71BJ6T1k>MR%9BF7U~ia2yR`MzgH7k^MjuxnV|Y zpC5ITl(`3rXstXu1+%z{#%u~bT2u{U;{;yVR1MKF-2;>+oP~e;bYlLBHnc<--@o|+ zv{AgBodm2e5~0?N+Hw&5Sa7ZKF!?qGnM7E31ei`9(b9uTd&X6y>vK&F8w~Bu%rh); z2QU%u%r={LCq;4gq{vRp@!lF+;`-7S^tr~(#4Kb6v}6J>OZI3>`g+Y?eAd&4-%3{| zQ{POQ$rAR!5{7a!TXaCj=G#5Axw&`Fi_E~sGA)5SUV40{uZhxCJvty}N;?UXqr zRMbHQUCbOKt1;kks+k4>%hl~i{K3LdkC{Rqw1eb&HXzKz)Ou@i_P<ctlN?olf^Wg!5IgVbF@6x{QRtzp(7pTxbf4}8FQNKjT$40{&HX&HFV!E(j2xbY@d2YS7r>4 zR9?wXw8QI=4r^eVWsfnIcOLO{PCi&XTwEKPETd1Rgeo-(@L!~>s9h^ga_I0EE~8R$ z)Q7`YgbL0%lLZJLHqqC>S1i{zua(Jm-#<9K6e;ut+`ay{u$hl|r zO6|mj6f}QA&{eq89#!58#Yrb2f1^XR*H7%Z)TdatUg4L3sP=)J2nSLn_l*pE0kYY#nW{Ofdy z$E-A0v}L5#Y!>OH#caWrIMej5J2XTypU71w4I;MRw?E;asX!muBgS>MC?X{R{A;MM zwgeOkT2>Nbh|!=~yo@x;Vb65AiGJ#w&yL3qe$3e{fKLfs4%26tY< zUSwV(NLe$w}FMFJ2uK0W*aD zEEZ{yAFZ}B3LKM9{O*MwF!BC&esSy~f7l1vTfu*GL>57O{WS9JC2VbFZRc-*pZH-3 zO8r1TN$VJuuM~U#;^scKOeneuND1Ep2k-@d0A=Gu&205{ARqSGJc6|?4M0KYq+n~Z zyKWaoa;_(S~sX2SYqiAc%GPVn8ihr~s+zkh^QVBW(8M zf)xlPsWe23=G0(p*rLV*;0o1XzGHv)pG?%MBq?`Kt0D|9tFr+HqL#(V@w%EO{bp{q zit>pi8|Oso`f#f(bxE;x(?4`81E>?Ts;N7ssUOf=2w7`Qh&YXi1&LR{N=+~I($lK; zrKQ_C7{xu)`FpehTgI#riKFU}59^zH4=lHCp`UPB{V857IjJ9`=Pwvs=Io{KEex;p zBt7-SqCG`*b`UmM;Izf%xN9fP6nodv^>x9Jm^Rmzgu4Xqg|JI{yFZ`+k(#K7+KS|OD) zP|?n|M1E+C;rDiV*z7=Vf>WeeAJBk%v_6dhukI9M-xpRsH>Cd3;zU^&huA-s99CdQ zH=;ct-B0u9c*d+B3XwS@+8lQ{L#O&mny?+o6O&u1WMNF1R}_~=!wd3A9BmN~%ASnIfIlOYi0bSpV!rwkc)#Xb745p5yj z`MRZx(C7vJ$3o8j-<(VSX8n)NbCe=?%mzKo*2hmCWu^QgIw%eoiYc@sC$q*}o(!#) z`+)Ss?9hYcXj{{^w`Z5?9)I&KNkzx)lV>tV=K3Jz6zCO(N=$G3vx^JQbAx7u6kvNjAFhO`KN~MSiICW-cwK;-agh!eSO~=ZH&$6^tuN zo}KPc2cId|dRLV zs7D_Z36p-HY9XmvT@C`2ntjXbP8 zKveMu56$UroJwY7o@zD_MwF?{h6pEL9g-b{84A-9$wV#aR%6jwE~Ccd*5*Sa!OO48 zyeHeI`w*C_8ix2#?DPruA#M-^F?>D4mI>sMpY^slV^}@S-s#~d65VT?EpnnLx@cFy zu?gw#Uy!0%c<$LT5{NVd`FDnMv65sWV_{{cGh%@3VX_xYiRiygJ}br37WkAEC%FBL zM6fE4k_{y!)Vh>39ZH?8S=Og&I?MW$1t_9K&IWh&)IxeO2eh;{l8@bArf=+{Q@KI+ zMRt+Mi4u4%c#{m_rUoBEe9p%;YyaURWMcTgo|uYmwnlWa`sNCbR&+81jP&$B95#Cg zM*>C$dZzyel8uS|f7uwcBx^`n5w{$b1F(ddP5UoYkL+l|%$ribSDKrL3%U#5lG%a#! zHnED^#vz@Fh#XJu%8h8MRYXTMfyIv~ZxC4$j;IrP60WKhxrzXSEJ{YN8pk@VW;tCYEnjvT4-2Cm(*}W=2j-c?A+oW=3-RVRF8Tq zV---9YtiJQ@9UwS{OaVZmJglHm?r>=54lokVS`Ktye}xVo@f&)nngb*VQlizZ;e9rd|6e)EIE!HA1odw z$raq0HmG%XP%nwN|29N4r^BZ zR-u_9aJplRIbQ-lB-0~`)zNFNf*~b27(X%%ibperd7oe`<{VZpMujQ#u880JBt7B9iGY@?$29IYAFfiE2DLNc;p3fINZx9nE?W4g#z{fvz4S ziYweX2?2c)P@R4gKdAx30|9p+37I`Wzp{5wrmu{}??wx+DwfhX#`U2d3aASHbvecQ zNMNnr_aNcMi|I8-2sn4$KT#Z2O{KwqUPu2_{ptCWAipC%h$LC%K+#f_lpk6E|k32?Y05{fe=>UZbL|PSF3O7ZY`l}hhEe@?c z80wEYEbO0BTWnZg1*VqkJ3vCPqqVZ44!PVc^LC3y0Cq%rDvjLnV0k_0Q{+`@b>C94 znmGZ}`|jr6;b7t4j$Vi3=6Sn$`)VMAxitKUz*s0$D1I!RLoIv(`}@0;f(77Sl!6Aa zW_b^~#Eex*fd8f^Ynxeul&CRfKTWZFX0CH80;>A-wSi`EBruF4NQJR1OOQ*Y=+bA z17o!cR6E=HQ~hpkD4AVa^n-Iu-O#P>Gml~%TvLKYRR=7KmF82-i-K9J+$Cj>_;v#w z@O2;wPZCK?tPI)-hFR*j`6cohp_9q;_oD^AM5o*P>-g?*?ZwCaaN$O~>-*wN#b*2a zZSQIVriRGJ?tSWPVPS;M$m^A~+{^j>DPv|Qljm)>)ptevG!PpP*Uze3jOl?8HyOFMgj=r=_z@H&4hoO z`g3xE`y6t2_s^n&<>ET(3cy>dW(CoCc=~mjVE7dGxFel8TzWU*c1I^O3aZqUIX#10 z>t-D|Cvm&eQO=|83V>;FxQ}y~-8%hnq_CXxxbu4rrOEnQxVcQH1B*~@y@M~-?6Ej3 zUOm=S1V@K7hge=5za%q)dQ!Xw*TvH!IA*$&7M-GJv@YRz`cHmDTg)DULyH8@>*f?M z;n9i2P)AwBAp}hf)*Qvt5Czgx#0=m=rVmxz;`v>FOUu!j6VPd&A-1 z1Iyv5T_{s1rWQq^26`ii18So^cfZ2z3CCqBIipDvXWM!Wp|}9?YrR<8oNFc9*CBIP z#JWb{?DN!SpbH+Mn1K+Xm(YC+EL?5S?_~Ak1J1FTNtR0YV*#ZA5n>0y#c?*c9^K9D zfUn?6EI0?dP+M-5xhv-2qzlJbRVt& zeOuV}>a$v&%i25Wen5cM}^Omapnut({@)Zj3OhD(^(j$ z{zjRcRXA`Na1?~jeN{*6u!tEbSqV$;|Bth;j>@BH_JrUP9D+k|cMTrgEl6;8cb5<# zxVyVM1b26L0t9z`aNFVi?zemIxx4p|JqPO4(^b>`>+0(2p6;3H@BwwU1yW8gH|3D9 zM3`=b>o?pm`XW@0Y5(yysaP@x0u_C&Dl4rMShY=|;eZ|avgfqfL|CHHDY zxfqf)Fp{VV5@E$uE?gL(-p3t$JT<1~=q0j#q?W`cgh?jK`ThMSM2przBs2$h39!E- zmLpIWPOo$O{(^QQ7FCYul0{>Vj7ZN~)YmVP0T7Gfc%_?9#3<*85{8cG>fOi+EaWN_ zs*X_dc4{V)HP>|Vqc$64LS6eAAq5}T;H^>;U8k~?)75QYS2yc_WN)4qLT7v}!pguf z(R!wGQiyM5Oj)$M{XkK^_@IwFd%bqlPet#Tq$2yh~5cR3-$W zldNdQnV&!Zm!^7P$Rm?k;@oe3w{a?i&w^d#UegOaY;N~m&~bCamZXsf_T+Tj-j2nl5FObgd({GUaMYfaP)mtm zqOhy}WLpX$QUrI;nku&T^ah)q3cB6HVnnlcM5H<`IBfEHafPEH2;upt*+}vr5v|NM zGdT@ZL1dN@1l#r;+=iYzEk>dH^lmKu^c~=o{f^xCNu9H`TkU?Nf-pErA!o`O-~Bl1 zvmdwIQ#_LKp!U4!GhKb<;9tkn$U%CJ=b2_Vr}QgEO*fxz+Y1{ceEzTG?LT@8cogp9 zzfN9-MqbE1(#>z&U3^eUTBIXoZN6Z&oZjAKWh01+vAXy*dsW|m#K-&RK7AC5P(Lr} zyNB<|Upx?g)aca1_B5Ip=1cPPgX2ifIs;p;@<;@w#_Z-uaIba#F3Q<*<6#;MaKQB9 zmQ=-E18c^f<>N&6NBqyklaegmz35+mf$6s*Eo1WADsOSrui%*6j@GLx{FYm3R~U(` z#mv9q8eKNH7CT)lV&ne6Ye-sKNVpK=M)jMd+9i$6?vKBwNLA$=F;!i6d!g)4b7Ponf3j)r|F+FSj&g z<%Hq6bPC_AAL0fbb442@Tg3I1XWf!XxoE9_BR(`Ne}H{4L~57t^?NzvJ$nBm!z;xi z5{y75<;acpvut%ml3j%#A?o_}Vs2dq@9>d$x zg^@bIe7i|+@JWIXRl?r1s75|<@Q7}fmVn8vXII| zKTUqbGqPiFGSOnqfECSF$`Du8G(!O2Fu1B(X5s~M_1?V7c%}f^uKVu3Iy!|m({9ww z7xm+BU5*;weZyr|!LowtL;We?ib8}K=E~?#xXT!&RuQR1l*P}V0 zlO98B;LRv!le@y7Uy&iUSGG)sHl8cIe^4E<*3?aJ)5QutayTUn(ujEdi(ph#Xh z-P7%~RwustFRi?(`WxIDh?(5*u~luO&ExrO7bdIi;b=dL&*$OxvKN`(+v}cUIaoK{ z=WUl0S>ER=6~gF6Ea))T=)De`MXOsrL#=~e? zRj2P$_15hwr$4XF28yOb+p@+@3)%s}$<3k{^yDtQ@9Xe`E~1v^$mM{|hRCtcQxIRQ z#}kFeoKF*s%VE!wvwwV?{VHxrZsYc7g6+<&>^5Gz_w2*ousZa{Qijf-i(c7ApQoeA zjrMTMZbid(3@=(xMfPieaJ-{(Eh!6J@oAxs|Cc2I4z~Yvj_Uug1iECFzE zb1?nqW7IRW+9&9m?Z;m*&@DdRmwxv(0{=l`%7H(WldVV3xbx8nuJ!oNl|Zhph|B7X zQ^BEo)TFLVP9<*tn$@q3)^fsMR0keYiF2=Q^+Z=3c+;N3U;0`==DF9CgZhUpx+CyC=J= zu&V;w6g3Y3SZc>!Tf&#YFeKa4WH*3n-s_vuH6i2Z?TNOvCvR^d|@G?cYH)^LCnJ+K~%c zL~nhq5D*5BW{Ga?xj2Rh{j3$6D%AL#;;iclxtCS_4Q8nziUHO0akm$#vL^aX`u^>Y z%-I^SiRv*;^g6{%wVS(?kAz^&h%SUoQ-(_XWY#{6hDSR3_n`J|09MxW6z9d zuTu;*)_4#_dXf64Q1vza{H6*G+kv(j6q(S1oCAL|B{CZ@I8tf{vg!jd)pB{n?4D&a z8o%72njo_Q2ek1}Gib=^K0I@EQ7QQ`GiWk!x3vL(=@4pW;`I^(bu`4~;Of7a;rMjS z*1mX{qo1wx2A1~PIc1_SG2=v&NmBmu4i^6s&*C(pyF3as#vc_8NvPpu=Fl+$(E5?7 zg;#j5tFvtRK>BIwdV^yOJ}KjVPQ@=1VV~4XWdzyD6fk{BF+Ay{2ay6}8<=YDbT)S7)#mPc}TFku?=opAP3B;$unQBMK7S zniHiAR>!nGad*v6#kR*L`mYi&IMDS=JR~d0pVz|cEt5Zcg&9{H_!*WDb{1X^*%2Te zq8e_ChPq1h%F?(+>(hsMQxOu$hFgDxfHmaP2~qzG$%E-49T7<8fX!hh629g9WvUNa z70=`s3Yz{$&Ipu&-$5#f$D(BJZDG^ltI6QbR<6_Ex~=VnPhf*!IK!<&!DFP!V4}l! zad=2;$!3^S`G^b@!wW@KMbHgvzKgBvmm5m<-^%@^#d;M?#0W7}H#BrSH8iA$qck`< z_qkj3eY>m@c)hwN^1Z%0f4k~!RM+p|(G=NuIc$8pe9`qCT4ZyeP97i{NIrnIQyTQo zjP-=~pt=LKV)OYvzMQ|AGyC7OsLoGF6p*9;F*5UZy1;&xA4BZnqR zS#WM_1zztaeG!>jbcN!YG9u*qUN7U&iQW z>l8=LP9W$%4Yl~ufi>?6A_&@WPuUe2qhJs>BL4WW^E;|ehq$agEgP)a*bYd;H-#Fa zhtX(N;hutz_9il`=!NFN!b3sI@`7aIe}L8Fg=rCB8e9eoUtNG~RYlR%V-h@A7KLES z)UF3BB;?khI2fL05tVl#&&1?=7V>c_o6xc(?f1%0UNnVZvCBBteY@TFeVEkkcsopL z9UdBp9U|5BmMQdXs{A!iZeUM;HqLGEkq_N3G82*5h6blInakr=+NYgF_2$pdCak+X zjFO+3=_Ht_wA|t}B&rTAY9i$)i$5%SgNzx=VXaeme}=I&!)j3#NkB2gE9WCGn@aF7 zAYftOqU4|GLomeiS#we;D zL@?CFha5=nUGrn!XW|4KLWk{2W`%7xBr@(~a&hPE_P^|F!N-=b9|hX4^*@-ZDTc+- zASh^YHnP?OFcT63Bs~g}y?+?|Op%j`pc=)gZdOh)pRN;umKv5WsB~2(SYp{^>~%~% zI$Ep zv7VNcl%J?S<;Teo(ZwhEC%h`Co+p~^WXnuHH48Ae!v0leMIeREO8ky(vfvWm{?V`~ zS9EVvV~yuwX^QpX;9&SKn$wP%(0%<_@I~=~Inj7P-I=;N4v5L*HOAivY1d%>#Lw0}$z@Sx)$)*~;1 z75O$w7fzh3VWRJrqCuhmkCXW){>xtWwl1h7rN&rdD2ntz1%Fwj1nTb{EEoOK(cB)r*k+l=@cEtuSD~(IWrUmAQ@X$h05clNzoYU5P|ew{1UC~V zL7mT`FV^qU;0WE;hx~dcA^$D&-P3!Q%Kbz1eqqH}b) zZRtnzS^sZRan|c)FRy#x-O1_+J3mW-1^sV=3veqwo|j<;^tdpKTk9vEzsZjlF#I?& zrx!;kEs`~Y{}0me_^)747h~X@uTGm+6LGz?@Zh%JAUL2LE>x&tqUQx79O3ihRc4aG z<6A|!zGT_-7V2$iTD-D)PYgOTPx-+NWR8KzT1GUu9@Nd#9N!-lXDB9|bb_4>C46P!94RYZdzN7k z7%@vvEBW-`ftR_rRr7IGogyu&*(quslR={gihhrr61G0s^aC{Rd5SMHz`X{Bsq^QJ>eb=TBJsMgLFk{5%+<#hw|i&CCYscu9mqvGj2$ebkF;%njhV#9l7yoca=Z$B3t{sG;qnQMk#vG1w<$6|E*$b zl3uD|oOTuQHL#03kVl+AeF^F2&J|$h5(oJPc0c^;z(s}NR|1ov(0BU=T3TGbWIOVLlG|I7M-;$g(Fx`AjgwxH{4U4<#(m96{a?vH z0V@f?=*xS2mjmLv%x3;OfebQz4FdWEktt0Q+&LuD;>i%C9PG8}2TDji7Ju{)OetM} z3r+*!9X&ymqhM>DLR)fH-&5g`SjfsCG8;|=W(?qFhWn>A6%UlDvC<_z28S9JMMt!T?Ftgr*CU#G%u703LNEhmp zbdk?8p>D>SFF9`A3b`E6POl7Aaa@fKc61ckIt(*ULv1ygkfU?Kabxjuk9;1?r8Gow zpz~mXX0A)%^GEjPcyZ$j3dFlaoss%*_^`AhY@I?7d#QE$!Ewef36<6wq2M zzUUAPDV-tUNkAjjB)kBp4q29IK%!Unw=WArFf`ARL-SlWiZO4-B722^e@gWNXCNcm z3D(9udQD5r{BEo;=s?(d)M@hI!7ArSz{0Vu3~@s=neJ%Kd3!8fF-NZR=Qy1R^D>o6 zU9^n?O%=5&Bv7R<>~7S%y{*KW8T@i2i?e`42OXj8*CO!VB3+g`py$?!G8g8?p~Kln(+4sMEIRKjzNQud$}KMe(-wWaiL;%oAjKv>aU zdn=ip)tT$Tk*Rg{fKXZy@M)k!57AuhN{IE4fO{<3#du5a-^ABM_qk_jLx5&8HR0J^ zIoo4Ir02ho*RhU!6h9BTc!bB|r5#ecA+mDK=-jot#IY`>iiDRCZ@v-ZE}oZxhNdK7 zlwkAC`&OJ8I~hv-O@3HJD#t^LLdi`PG*?x(Z9bo3{snDJ>_-OW?Nij*Z^Fp(c?UW| z65fa8l&?YwW8E0=rA9~#jmJQMvIkk^l`lqV*SF0QXw}6E*wO&m;mZKo?dieKE3?4# zj;Y>K-Zq4{tD7@}PhSiRZ*Ikfb&)$V1s+hR1US#s3RG7)X<^Y(2@)n~eOCUJ8QZB$ zBZ9n}X8=DfoFYXnf^19^Xex^A8%+qx^)84&ypGY|_kVd69aBQ=->PWeoJOh0HZ2k<20cB_ki zXc1Chn{U4eY2w1bDB=J}fFj_AR*jzs=)Qgmfmo4gRxOy~jki>R9~b@?8|6vOhHU)x zr?_a8Z#03!eDM>bSC+d9V65QEM_bR%m5}RiqJwf?uY~z;vG?hvCpj%WwMaQr{RDDP1iGB<^rZuf5(OLC9HX6c6x{rMtUAe8Bb;;EAjsB>ky>pQugW*;9% zu&u-3V67OU%^PWynF4(P2?kJGsNOL#KwP?5X-bPI$duIl2;rC@{W+T|3tbtOYD7c| zU|FeoY2L@8YPIIH3G}BI&fUoYcZ1HiOfSww@_{*Esx?4G#H{>_c?4hP^S}@V3RtZy z71$2oC=CcZEml9Ht>ZiGZm~_^3l;d-6q$+%Qzfv!A)m^hSndLIzpW5Uv1Y+{QO&zZ z9T3UVA(jTeH?~fn<1`m=|M5Om*4jHNNsj`&3|aOYd}%NR4b;5w6Z#Xi0B*a(xLD|X zjKO}$%d0r7i=#HY)anNo42)f26L=_5bcBE(xgmiQy~Lhwxxmb6aZw-n;-VrmF)Cl%FzCv?(n~N1G5Ai8PuxIG@~5_m7f=1ndj-pkMk@0&qa+rbzGOR2C5(aQ6(appjmt z1xT7ljHl$&1=w)`IR(I4#W8jn`)Ua6zE8ls2p7+N4fdD0qK@wbs_N2?9Tc#_|LVSq zm`@p`<0K1(z2{Cpkn%%+>tI>@yADNtKjc!hfFiC4vMIa?3ST;PvJlAbU(*`<#BLsI z>Mr2^Ce8bV!st_u2Nx?-z|mhI;?!Ke)^{8xoQ4f_0~5+tz^=_>|5%O)llRUGJ?H&41oD_`97+ibvymD4*FzslHA=q;Fw0EDxBtgD>y z?g`@QRzvY5!$m_^>55b8m{HI~Z-F!mCziF3 zKC2gTniL&8;2&uj;DlXZ?qmQS6u#I|E$C^|2jx5=&`@7Kv4@d?5(*y>?6R)%7St*; z#BZOnuD;-zQj6V+-=3l=ECAgxo6NV64VEfJLY*j9$j>h}BtS?I?sR*NA^KBDfF;EP zZ2^#%NDq(~i9QM+OAOO5!W0Q?k*H^QI6Q2|s}@QPz<5;X)tM$KzBhEEpt7Qg*S-bv z@+8|}zFvozQcCqo#hd4mEI3aOW8Aqq+PZAQy%)(Rwa~f65el|gD<*!N!2%Kfr6@}s zvOyQGSGxSSie^We$45{5)Y2&`{wv~q-gSTP>61sfmUtA87Sq~=7%8(mqe+>HeUHk- z8_4xfqYU7U`971^GP543rilx6ym9rJJI!(nj#`Z}&oeh+<-w&%W0S;3ejN4HUtE-SEmsAJCZl+jNMgn*X_Drdop%x+4J61Cabik`U7k4z#dj@ zYDAWWp9y7mK*P`LjGw3F;O~9lsP`Mqz{~k4Pg2@FoI2?85~;1*NUg098;#rVQWkyz z&t`arW_Vq{D7ohT(fQiBr^cmsoK?x8G>ZPQK+w43ch?44a801SoFQ zJ2i+RBqF1yCq%L3BbM<9qo85bu$dNt6C1Uj$i>Rr?;*K*|Aq{U6gRZqXoS!+Rs45f~7-T0Dt+v`s^ zG`p+MqJO0x0-lX^wNO@C{rdiD^8Ur&=n0vLzp{SJ6)W&c>!4CSJU!=Ghp99tdm_%> zDsVucgx8>Hw9Bn6a7go}vM*UPA+pe>xikCB-zb3ba77T4^f>i7&`IJmK_~w73!`}H z+e$hMKi0^7VqV@tW#i4}UCF|-bCv?tX307QKk?$KU`~FK2Oibj?KfM9K$5KWg}4ov z%4Eww9)6EmN7h?;D8(LW_bctKvR?7fDz-^*bFlOL>W$9Ea=$49sMt#XY=_)0(PuKv z+FTRv3O1~^iEAsI2DCLM;4JaOQZbbN=?PiMS)os-BC%+f<^P7>ux>&$5~^W4{S{n+ z_Dz^Eq}?eyG77@Nm~A5W#{x3i(!#-_H%L)o)+4Qpir2hdcJu6zev?YDtvSsLT)Bm4xl3S7G3^j<>$@+%kYoxG z(9d|51f`uN;L=EVJcV7{`Iq_F0@g$-@Ij!YQ91&wxtH&g=2gsp*uL|XK#`;WInUmjWL;dh+-@b@KYnJ6XJM<#FQM1y`suce_{dfDtXstCOcZa# z(uHwF!K_Ym8oGF7QO06k$5=P^t9Q=<(y$H$D@|jP9{ltvxyY%ituwVrqeod880m}n zdQ_3)WaH$3D;e!}0j+7l`VhaM+~Tq~GQm~IN`=5ssOIp3tKhb0Uks*K6j$xm4Q=Hc zOxgtP@Bh9j$HDQR599fNZ_2U$PtWCYGI6u~mrc2h_FA%L`#^6#(KL;K(XSLfq}cU4 zAwmIcIBcqOK?WZ~;ZKiV5{OzX&&T?^ztv>G$xz}#?F^TfI{Hm$mPHL-7PBvk;}S+} zA)jZ6`OFzkQAN4vl^#xu0sC@>>TIb3N=NJ(FK%S#A*vqv9(t$r8W5J@>5pAs26`iP z2pb4)^s#iqR6W(Xdsbq_E%jult3H;i5^{LR6gKnmHVDyDq#&0wdrv}GG9XtGSW41$ zo85@>Yvi#LF7FN9xEY;$sUDN=bL-TJN77D*+JZvaDZWRJlpFX1?_6Z}=Y};(l?h0h zGY9zWh?}#Eol)}{Tm`5iCR~Wg|CO>-r>97vRUQ1xJ{yW~lWbJ)!G&WBN++UcFRzKj zlFpqctocxW*^o@S&}1ag6Ea;Il^JPnJ^f*TaLCDUmk(>n(U74g_h6LMfZ$SK4=rPm z*%WsuyiaCOk+AoW(?B$D%C_%|7%7<;G3&s|r=dRM?=u%*FH8$;2C|1kbQXO|GeRPw zaUB`P5nngDTg1v~3%(sHz>!BGAHg;jehZxr?-EC%o}w59(_)REL^c znc!c?-#j2ac}RYdcBWH>&`Gn${xShYRKkoO;4MoBi)@Hl1;$AXNTiz$;BRe6u|9H` zUjBVD+f!E!a~7>*sf#!K67kELxm#kZ_nr+ui6q+`8oq>wHH=oYZY;&#@L=3PD1=8C z5`Wvl5<8r5Jozy>Oy0gRB$-|8mxx^6&+{}<-Xg!w*>L;8U!KBjo@@MQN!9Ur+@EY+ zL|E|%3{i3H|m=5QWrwf$+_INv? zm(YiTqDd`q2)X|udIqFoDO+h(%(_N*V#QdXdWWMlieLX+*Svgo8LRi2h{6J^g&ps|WpxswWq(wqpe~&dABJr_P zlvvGsXFg=7z|CnA)3}CARSw#+wH@gO?H~szNZtZRqcg z8-@x4svMzOPdT|IdBT;)sr%%X)LnLk_G{usUe~bK% zA5xL`TOZmq!w2n#U@d!2<)8m@vRyODcbtttCrw^=62Kz!>pr6NmuyXy+G*DDm8`M9mhD6W1i2bwiu&cB2wk67ace z-FW?5)cFP)o%DTJ%z8T)@Oizo?R*ABy}hn?M3q0;JoI%w9oxR$_ip%p%b-=`C-l{z zgDE7Dz1CDoMO2QX7@T8%xw-3nOR}XSuA)77!rZ~;U{Tbr(PJ?$P1Z`qr8td?ELl_U zQBTy{0MlnGcfvgz)7I#sL^l7B0J%;1T7qUqEXzsTaTg}0uW#0@Bj{HL6Hzrqp<4iAC}xHE5w}K#&8$zA z&xTIlIeOIxu1__A8*E*r&<|bnUt}FCeW~=u1M2J;e#Hfff1mo#;ihr{4}n+e7&uH8 zg=1HD(Vrpk^HH=bLP(g^!WTGx*~hqkb{sDpuT;biM1ENh+5mYxTk>J8HQMgu6!)94 zHkU%LPSj3!QGxU6$?Of|XA}H6V=&XH^O?UmpjH>IgF8I%bTyFl3L`kEH3$;aim0c` zWb}+RMa1HRa1e!escEGx^rtc#gIX>8F z9vhgIte4h@m2w$~xbTipQD|L0CP~|VNLt?Q46>9k&jLLGR@?LxP90=TvaHeR<4~VJ zc|`4o>NuVA%)|E;{yrB*<}}Iqy|gy6oFAGh4;l?SA*bYV(Wc~C{Adp-ak?CNaXLSO zW+U#ckHb7@S25X02J?CF?vtHNA&BBGSGxv{z&I~z@NAVU7^Dw8QE-=1T_|7KPUSC{ zalAiz$%ql@IviFY@n^0}#WpvY!jt6jqcdcrm{zGNv(1f8KZW{iCP{Dj~k%^N;pQZ>& zBXCng<1|s!r02w{{<06aG)hUsFfE#GY}2w(o8*=W%q2w#-Yl$gOU=(fl2v}j18vQ? z*S^`^kXWdUB5DGBu#T}*pMIBJ{-+9 zG6V(|NOPw(PaBVpX&c}3 z+ZMZDf$y-!VFB6}4)#$6C~vANb;ml$XP(T~5Vs)$@6r-Mm_z=F9ED5xiS^qE__qzEIy!-ec zTByMk_w5AtmtoT^yo<#S&FM)`km8_6EO_{r1#(-``qq5wAb_(r#L{p1rxV!zgDV8U zmGq9QaDeeqr4g@6$=DleE$kbp@=pQJ zbXAMAYp$+yQg^V=JozCDsEk4K6Dy*!H?8E}Q6}}$Y>K;!$$H!*zkI#clZ|NS*|a#p zF#`m)bGh`ENwJ|e8Ykgr?JEuw)Iy+tse$fDFacxz1FG*G6qyZREOL8RAlnc;*76r< z`#P1*+IAn&b8OWobT2aJcS%Xw_+@_MRFy|FYG;{`v2_$OP^UBl;L6>?ZSKJ)CZUjvTjH%78Q)$AIL-Lz%Q@#s~ZEzx>|BK6sqewLZ|47qEw3UrXUp1ije6eqezkB(iQ z>uKu4=O*XzXOy)T6CYR`ZJTB02&Nl6X>~|WJit8?7NuaU5wrd^q$+YO%uZ? z@E@AzGig9t9S3A%r8(XY&BgkU-4&KAK~@XrQyej*j?Pt@1I>~vtF)M&z6A!IHHM~! z;J%EspZA@|pQ5i@_PhZ|*Zeze40p$NhY^3i=tkeQ(?NUV#a=%!%SxuAQN&U7?#%2Y zUqwLeI74}N{urxP(W%jk?GVAjiv@AlE=A`@na|k=fF5YV+#jJ~1M~|7F6+sxBI!8D z^sm`ERr2Ay$P5jC=v&zCia&C3&P~2d+qcEq3V3Sc*G~mTJ^e~IS;-mNvsH69Czct1*^a{N}A6_S1 zJ?VVPb44us4DK!YxVJ^N{|-u$s16p0uiDPc8^;Dfg9DD<|6ZeigO((kg^l~8-gA|@ z_tdKis?4+S{UHwk%c9A%trUbNYFUad4}l9ZZ%ZKC-CmpGT0R2)imMuDrXyX~?K<(> zvw~v=+{p~mSL?P1Dl@7~XS^8i-fcteSI9}`?#R~uc{nZaFrtu|^tX-G>O(2+y^eF9 zD}lr61W*ej+en}mo@tF#lIwu)*{t=d0SAL6=DufeCgO}2+s<9O8htYUkE#r*45veO zrR@(-^N4k4#8bHooRzFiQqDj4^VSkq>{;lsp3L1}#DEUFGFXyte-**9mB{#+4MIy6g@E}`{6RF=Kt9gg7V$=k4saU>#?B(hg3Y<=B zz1T~hPA5{YC#i&|+iz&?tDh&8Jmiz}IeCE5V9{TkwF!y$eUjloGd$=6MNA7wVKVdE z;dmWJ$9XarPRbynOmt@rYzv0Cu5DkR6Rgq%e7xC@%Ipm%C)E7M?kHyt{vb7*?n9ig zd*kUL(_eMoWfDf|;R%kL}XbJ{9OI{Xx12(k%&X4Zxlm;B@K!5bi{8?i|8*}67; zXC8KRMfB2zt~@(cOIL{2!|w|JL6XIIjv~P15Tqv(Z>5PHN^dFeCC(Der^nZpI$TuPWi4RXC-+yz}7QoOQ)|t%uNK0Qc1w#yI0V^fPPQUw{hpM zAB?~lGS}`V{Q1BZjc4h;{%dDIBh#ME=z=eaIDip`UlNVc1iKKV8oTotvnh}B_dC<> zvYW$-X-&N4M#aJTWWl@7f~WIP;B>j`#S&({#vny~|9J?EtNSw!%e6)xjby&CN!vP$ zv1GQ*T!4R(8^(fbscQpcl(GKs#;=X9n`Ec5o02OTU8KXB3;iD7^Ez14t8Fslcw)Md-Hf~wgCP3vp0wgeRpM|aH#w#q1+15u>9^lq4^~`h@1Gju z;7P8EoSHv$0EK?&undL(7}muXG0<L;c@R;KIFxE<0;jMbna=Qlavk?#_n7Ctm$nxR)%=1To zI`h{c!9+G+VPa{{(&%y(jjJU>@)UVPcS2U6?D2J=Y!h3c>{(8-a;I$(L&CB#)>{_1 zE45fpM;tg>^T(i{32ffNJyNM1pY;py#Bs0H1*tX^N~1et*Dwvi9ptS#P>1Pj9AtnS z2fw)Tki!P2Jjjrt==~X;2erxiGSiiIxy5lMw|9SIf3%M@-go?+{;*!9n>9+)m0&*_euyNJxu;e2$F^dU0Shg7 zb!O&T8(q@1&QPnIS{{SdGZ_*_lCh2dsL`?(k+}o&6I{;3>Nd#4b|kTLli*v^!Tc9) zrr`rtI+pwBAsIAA3hcs1)mZgMiSE}}_ZhcgUKf1RZNQ;EXw~pNawO4ge*&K%bEk#1 zqX532?8gd(P_bki$m)uNryAW42b3S-4y12YQEFsr8(9|Vw?Cnd&H#~+u-f>^D{v-t zEh%6+)ySq=DX#CMl0|G|x8!)G%1|xu_v71BXckKc0c$yh2b3=sS4?D9b7ZSO!c)mK z?G#%T9Yu^pUv7S$l;1qcF!8XC>qu2TIJYf8owkVL1zBAYlS3|(sRRV28d+2;#EE=F zv+yA(aTaQ|*3HwaqKHyp`6xNPnMHwv3z{Vp3h-WukczWzj`)3A23E&3aHeEL-=0iD}Fv7xxps$2?ZPoAXr6I))wj zaWJi5m$l(4MWcUWz&ZUE>ZAh-56$W-pA3JA3@^YemCW!$CQb`6)tqxA6a;lr1BK^f zaTQJmnj`y|28~(7Bol{^_`^K*M>pdsGz1<3u^|F%-yGS?56#paT?Og5X9N@TSRWy} z(}Akt0aL+Z+PX9zzae^hiGmUWdfwtlk_lIFQP*NO^u%&HFy}nbU@XxjdAmbZCbg@Q zsOJlc8F6n(&s9IiMZ3->&nlKtFNa-zE9&> zz7KzWeIEw0tLo&UQhi^jkB19RAEU_wgZO=GJv$3+S^Gi7k{DPxZ5-aI;ey(H$;5VMXW#w0R7qblDo`THAYDJeMbS0jX5MEd@nlV&l@B0EjBR=c^67L{@eECJP8Fs1Z* zPcBD#)@YE`s=Sdug!C2d;R~D_o;cJz+wV+98C6PV>QcUZTf&UW8&h!X-v%B5!on=X zAF^vO9YE~aT6BCXPhIgj0xRLd-VID`1rfVZA&Jq)RTmR);|GSFp7D0VQ#n83g zMZ_^I*)UwL){=mH1HEs^@L^ZPsfo1EVtlbcLBg|FG~SSei=O%<$RmR>E|aDf39Jnh zYMPz=2+jO3zrU_{AyL7L4`=U%_9)&^(v1ub8COmSviMhPi68dtSeKbia}IpN&Nge# zwTp*`4+~YspjX2)8zZJ$v~Qu(_^ncZu&SlRRrr}3KQvJqEjV{KwlBx*fjy*7bUN2) z%;bnlqY{Z!iJ-XokpQRPzbCf`QFL@(2NMK*IaL(QLA%3HHsIFY?9Xb7`io4tPY0Kd zt#gRl6yqSjug}�`_c_T!C^xMnE)vTAOgZFmWZ_oGD4Pn7*w;m>`|I|{J&4^2L{ z>ivEd>S7z%%A#Kkz9*8w*U(9$1*#{KhkT_QU2HY{{mU4mZF#(%wGi~TE7$9nkONg; zEgd(8!S@b^G5Lp#$tWUlCu`o@38GlzI?yL1`Pa?n4 z^GbJ{tP&7qdplXFyQD!9c-vVi7~~I-jY-QG1k*eXQp_nb?$5o*-%_wkDyPCoLLN1a zSF+o`rsVOF+Q6kXQ+jB5L?756ezjA= z4=w#dPm2U)IJRhfS5kfb5LdAnlTiD}jnnVelgs;yD}J6IYu8Cb72{VA5j`z@-&&8- zy2KBV{W|+fd>PpD^Y+gqLe1*m6}?>=);|^fDd}irrZXI32+;?KJ;99X_iNJ(3j~(C^}No%>;tw zN?@os_T+9k@!wY-voeUXdC`LBEF0ZeGH2bXHH7T4&dyULPBtlE4DCB(Kp9xj>n1It zeBUJcD#c)Gkic4VbUdWlu?}-B>Uwp0-hPN@Sjr{pHWDhLs0U;}s`n>9sr%7`XiT7v zmuA+gFtTW#0XxCDCpQZ7% zvA0kslOvFB&V1TRYVmH#3&y-zWz0hV7842jh7p_#lBEq5VFvoqM$GY5atTkV2;iU1 zD2F9fXrkQ!N(FHb8bBdHwQ`hR>1}V8Qqw=AgSim&*{|4}!scEy115h7fExdq4|CWr zI&;K1L?j00bo)e(TSrRDUBx)l*YR<=iC^&`tbBJhK%?%foFXN>sed|&IYzB&3>*CS zG6~$ka+S(Aj8sOL1}b`Bl+bGx0k0;HO4U`g59R+x7V(vcX3_bA+6l1aAMU{K7)8Yu zrQgwuBnSfmX%rxh70*FV01iEfZ+ZX?t3svj+DRqy_qBe1L=l{G7tDgjG(Hd(ttAHK zIA}vC?sVUCi77wJ&?RsC*@0)M|1FwSgC)m_Lc@~G6E z$ttp0B(_tBij9x3i%u7RZz|MMlO7u-V%fmjPKUA$T`^0&v5|@+grrolG*oS+4uu$x zWf8R}{w2~}X;-r+_)5|~lA>}mR_c--F^V!Cb|n MP$e8A=ny9JYqhpKB74ma9HT zr>u+-ma1Yg;;bz!wczz?WVMg9pltxQ5Gp#p#UWZ#{5`9X3X6SoHvYKIMS6I?jZYe) zh|VI*LbZW9RCqj>Lo}xNdr~148vE!>{BfL%`vXsydl~q+2Z!h>+PK3%)Z!m%z@b9W zkjAck^x2!OdI`^6k7#wbAghFZV(yE)|NQY);4$rinqii}5Y>LkT1eiv?+Yb(#|cYbeq7tk(# z>(4Q{Oey7>E9X;IZqIx&{UJ4;^k*$Zut70lKQ|u1T~19j$7KFpgYJv6fCa&;KzNXf z?tkAHIpMtNmAqyV;V5xV z(DY?B|5UX&cezMeqd0Y*m?eIc5>HFSE7b~}hANSMpB~mrn|uAU+tBod<~cHIh|l(~ zG+<5PDi}m6hC}}N9Tj-N?%B*tRKQgfK}X}BC7-VpQ7bHEZUI4KTao9Cg9+~#o4in2 zn^|hCC?Uvlg{T7l@#fJ?gGpzsSicx`f;ScJu|FI{)nsxtwRK?nI%UyhJ0>yD9F-hn z@T1p2%%XRyR$RaXRF@mYpfPd>btApOEWwYaAutXp+}hf0OYpcR3^pah=T zDqhF^0i7CaZ>ZcXw~By070UaMJv&X3)lFe z0<+woqRbzN@f&g&iSa93*htCp#BarXwoQYwvBu~>AQ6G(e0I&l@vb1m{_F+6gkk~N z+}DB@$C#{{&o}_}(+4{p@~6%ook1V$FOodwafyTrHKs<1(8uIE>a*k0ekll%++Uh( z#o@~-=tI29GnRyp7y+v;7IUjOUiNGng%9zV=EvNiVK=jvGs4HeJ z-&Es0**@A&QPtv>M3ga~`r+$=*QkFRX)AU6UyOYPP+ZOSCpr+E1PCs{1{mDk-QAtR zf&>fh?he6Sf@=tF3GNasKnU)^gYV^g@9qC>ZPnIR4Zk|f>D%|*?qhv>x*G)rq<+bX zAP3(!^oks(@>`LXM!Ahb;}5<(n6qx3r4c)+bzAr+!aF{=k~4*f2hrS(&&0CoRxZC} zi3l8fItI94`GW&k)acR@g&+6hpYKN3{ci_r{cm@Tfhj`&#})s_&GhHTJhF32zsK-h zhU@U|r?d5^%~OAKUvpiXdfwX`EBRo_3`x`du^Cf>F*XxcOI97?wC<)@bDCGlV zzuQyeXEv;rzrF&wqdY{awUw;yM#h+{51w|Z944eEKjdhF$~Ew01x-v7=ipGIEqJif z>fH<-O{WuEYkJ!F+KK8MkQz<2s##F$;$BnYnXDeHxqDxCrq8)s$QH38kjH-iz&Dgs z51%mb0$-E|n79{a>)b^?LqbRbz^JB3-bU6VHSP!$~HmQdl`rDChnjVtoSZ(g~%z`cX?0lyiKH5%+tJ|Iyr^})ldQFVB7@s=9>*4EsxRhVrP3Jw@H z9c1(Xv@|G4BnFxRi)Bv124i+EMKY$F!}+6jhEUrk){o0BulytYih3Qo36Z=8yz{{8 zd6+NtU}bpJ26(%b-OuYiAIA;c1CG%UkQOJ-=U~4y3b+LvLsUsj?uAr4g>Q4c{wOv+0FsDE3M?>Df_+AE2WL~k4 zaARIXE9%*ae4%iwrUfFHI^Zb~Dk9-${V(kxUnAV0EocqpDhk~jMj2I8sM;SQy0IV} zTvNQ_^10649J`58C?{QrU=B-69b)5&|0RDmOrh6en1A*rD%FvvwJ^e`b# z;8b2h)I^ws<#li{?`KUjl{RhBVa?{NuY~s;sYHuOL5wh2^(?pn<2s*EdK@^0VA`j_ z@JE8E>aBr>)K?@X?06tsUi??HD0Kv=|3EOj>C&!EXY~-Lx#=E1$lO#97Wu#74>_dm z=FyX^oDtm{F-6WCStRBA2c;;eEj$C#$iKhf4 z;+KRqVJ9t3$OUbh4iOh|pv@$AihLWe&*Eo8iR|hJ;|5<^q(q5&vB`ZW7bGY#OUON1 zbo3pFeJF){b2spbBP7DKfVD|@tY68@Nk=DhJg*K*)T=?#tVOPc%6 z;MLc3(9cuLF(i6)8jM8>C>3d{G>Dp`;N;A($EYK2itp+ah+dyG@kGn@q#|+tyU2mi z>?1GH>=mi)r}{?v&4IOapnj-hd9)$;`;j`(NTl&4(&ec(063pQ@x* zEUo>+TFD3)2GrLGWvBcUqS;XYSm9KNGqXz-{1VZzJN0aDb@+TZL<~I(=dp+pbBhok z0Bih1_6FBA0c!lv^j6ka`UD(J5j2Xg5zc23BYMT=zc~gca;G(aSh8lI+>c>6yvV8v zuyR7N4ienbELFl|u=6q8hWOC2VfHugp(;WczpD*HOSDa|oH?&Oz24-u73+w5H1wY1 z?6JVjQwR`Hs*v<0vw{$j`WlqgTTK}W1SQw;lTBfqhVX+Au)jh$K0ynL5FU$(2DIM^ ztWUE*sZHTOjF78XzH&08Gp?GMhRUWRpTqAydF9+2pIdP3kd=2Js(?i1D!!l?L;^r6 zI7B3~toF&-kMQl#72L~MRsv+K@a%siB6txln-vV`v~S@TE3f4%8DBE|G%U_sZ(44cn*u1R=HXLg@|Cn`ttFfR4Rkg3R|O8iJK%sH6(W zzwwv@PyhAE9pe!%Eq7WS5L35w^Y#SjQUU91)$%yaVS>m>=@0U723P6_KRw6uYAKBgG(`1hnGav!%wzisR>+Z%Q%qRlGOz%rSr4){8WsN5Jd_b-fh){rtEXDjGmI`+{3Vt z{Bc+_R1E>JE;M)LqwXt$WDvD z8imf+_8pW#4$Sk)+?R&ct0)9+O*~OHhUwyi{%oa4i+TX{lMCD~?(AQ*vB$*}_90!@ z{4%g02qheB(y$aoVZjJp35RACZkBToHqzn)G6%1s5BKxT1@LXfh@+Q_Pw?Of;GaNG z?=Ot(iwUt_Tt*norySOCt1Jd~7%Zs(sf=z@iXgr%hxOV(&d-fqNAwKsBO}|kM=qD8 z0><0BBzMHt0*roO}N#9K`TY>WZG8bB(w<7L*s8 zm{d>9IwVjRTfcSJ*m3~ENIAuS;6?Z9ZyvwYmAw16C=x&vN9Ly>{KVwF;GhB1w})!b zD85YOrs7YUHrXvJDLLLPBS`d-OQO3Q{*mMQL44)HW^saIGM#%jujS;SYgn(SG*Tl` z=E%2O)yjfE0XOm+&s@1ov7D*cJI$qgzi4@WwRM0U+O3)>6C)8DC1FNoJ0@HIJ)a`+ z;G-;Q^-qJz^4E9Ey%V3MfcPR23lhPPBt-9Ge~pL~0)k&O z;s1spq>p<-s#l?KdCA*F(x!)yk3bEt&6QVaw@aGx>Q(igwb1&dYCO>U=Zf_~&x(FsfqBV5;ci zGykZNat3g2tHSHt3n@C@TaB)%f4VWF)$9*If~tZ9z|m~KL~T-FG1ncvt5yw^iyTCf zNI1~pNssbvbbhHWR(kb=Adt~9z^^##9Q-T&`(#+Mt!=}o)hfi=KyV*tE&@mGf~t{fqy?zNUWodw;i#T zD=C75q~OvVzl`#bdFLDz-;tPTx*sVn!=*MimHU zK{YWuq9$dno5G^-xcd9isYw0EYx7|??>08q(NO`2kbBLnBz~z4M&_e8 z>sT);mp1RI<&mh>`Xl-dZmQ)|u^i!xYp~uTGB;sW*1?~EK80-EEf0EB^3P5eMMYrRlxaPa?-fAR3Vi!ip#*Yzj*`)-%2=T%w>?ho7i`J%YN~;Sb zT)_4FN@)j5d+(uB_;3lLK+=W(s$Z#z1p@>a^ExN6nTouz-M?Z1a1HTDK5%)#%jN$j zf9V77JKd)4q+_otn+7!XHodS;l^c()`BF=4-vUhqQ7y2+9q2>L)G~#jZ57t_|63^h zmXfwNcY3BAV?d2k{Vz5CLw?Le#H{)&r0UqFekY6P8cSh=0FTLQjf{?$RyLIrQqQ8o zx0KA%4hY@l{bHEW^T@NaS9oN>WQ}r9kfM~Kf`_Oo4~`8gr*1O_&J0iUtSAzhdwt!ICp!09u87?BRf#HA zbI1%hLa*WZF7MW5QSfaodH5^u6-Ogl?CcM9>R{p05*E||Gc@G5&=S9HxV*KF6|^-K9>Plg6%WrJ(Em+bqSgsis6h#|3^+nH8PaW|oZF=w z3Uu12y0vnjOp3VoYpFuw(0C_56BsX+52_l338IUk? zFR<5ybY19QY&pQ8qMGKAHV6RkstKZj(NX=&=!jEUll-z-&l(vC!Vw09LiRoJ)I@TD zJ%&w@4~&pIDUzo61(Pj4<|^q^8|o4F>`wV&xkec3!>^uuLHJarlz zE}%gW>--P-??Fj>g{x{&C> zsga>_8puK}E~QduT0V<3G2ACJgqLg5g$MlyA_3|q@8n`-MZ+Pj4Wnv_Oo8`Xft)PP ze?!}|Yu-8sxjQf{NUKYx&jaC!4PmD`gFh_D@#4s6G*?&b`cX=J25q_2PQ+#SI1n!J zCQmYg?*D{LhLe(%Uyc|X z4;$WFo{p}u-|JkTEkj}_8&bw0_N&z2`^q{kbRgwI*v+&T^+!odlj{rVG`dt7TcDAK z*QFLJDTr>v`C!z8q-}3qm2}9)Xi%GlC==?zqdQ}goZxQvkD!l!I8INE=9Q`wjfph1 zsS2`5vRuO&T5PgfY*6ZC3+hIbBs3b`VJZTJh9p^|N_>ESw~(ANJBp^DJFL+dm6)o) z$w2TzCIRGCb5dfjl`gl+h}>|dS$%#D9UkgIW~zdr&W|dKgFZH2hO^J^LC{qQnw#ko z8|0v`0je_>3LSmj#RSn$`vZL00A2_cyW@;o82R#K>6!3evwWfAL#N%sweim1*6HWp z7;XkDj~D#a7wg;trzW)<8Dqu6pvlzK%y}b2-OmJT_Rtbbj~3wnja4n75;9GngPbFU zWt#UZBXZ-mwbfN~RoBb^A?-rnGce4aG7DWP)y<8g%;BX8em65+Vu$>o^49Wd%RkZG z-w$f**7C}Ph}aq{t7-RLqM;b7+`K?MWW!CAQ_kV-Vk7w>oax-U<`*lR3BC6ar(b?A4ZYZmW!?Wpk)|?R@J3uYhiMgs&=indP!Bn6)kQ| z03|5&g{DBEv)WR+THG(Bn@grKLzdGYUWW?HDiM9qH=f;3u&j6qxtilT$$zSBwN$@$ za7d5tEOzAPIFedFYEO=yp^~I6WIudrNH?5FY7a1D^+t zrz?+YTLsUi$3+QmA*Rcrk%7AgE2w$b5rJMAFZ}y9E3XbME~6ybgN5X5KnE=n+92Lq z+(PPN>a0C04OVWO3`5(^eP>Emx?D1MVimJF_i4M*sgUflI_`AfT z46k|jep-pG!Y-(jO%9TEG*YgB&6D?5PrXh{3L4cjGt|_j!O8Hvc%>+nmtw9KuN8)9JR1JoX}Pi4 zP46|Yr(c+Ht=7Bux7pY|+%x_uTEl!icdg#lswL{n>evu*OXH~JWSz-f$-^<8rAd6y zDhO<*JKLfAeRlMHqifp+glNO%k?ABU^^e?%f)-eQVNO9Sz!xKrF1rwZUJOfgI(A3_U-lEGK5HZF}AJU@2$IRz4d4`PINOC z)EVaJ;zqZR*-cxTa9fk5b|2Pe=}F3a{_s1>aoJeq!tUvu5kt0J!TYQ}-Q`L>J)TM* zcGC@?C#yCw-I*#q(2pd`d7uEzFjcqEgYG{nz+|Jv4lRKE2L&0jsmCk2wRmF5o^S-Y z8Vw@%0aLeCuGdkqn(1pz9Zd<{Hd-`ZIk1tXX$^FK)$ur#uQOvei4)jRyp&4^2bFCU zR7Z$9Xs{B^eG2bto|dtK;F!gna>BP&Vt$k}); zJ^NlZ?{dGnNjcFv!f(!t<7igyq40J#TB^v`x#2fsvNDsP9;a`^_R>h+&tZb`QI z#`%MUoQl8!yQyF0l7A~`MF03}tt@&)$JmTtd1c>pdeuD<)s z8#3dQ*eqjEJ6tw$v@lS%e6(<^z7lbG%ce))NX^tqI>##1g|b^tn_g}_pwH{?GiTRY zu0A<^K2dn4e-=3xy4t>lwQ6^3OeraU#ojQM<{O6EtDh#^A2jN4%pUZ3g7Of9eeMF= zws!tWQCm%I);evM|mst2rbbP3zO?r&+agfi&E+FgPgtevN3@ z?+~lAnQsY88l z5Kktyn1-+5aBjn}iQ4;m?jpyVJ(dR4q7Pqk={*yvWgD22%nmI717Tv@=XM~ywy%Tmu2qJo4%#!D@^ zOA?AXmR_^of~;C3#y8QW#vNZ9$4YOSYk--w@b7M`WpZwAp0mv=0=5%7XioJFSgN0A zW8@IT;~l#$Ur*Piwh}J{srLm&hojyk)P=JZ)>g7-c3tLDbqL)$dto3(7?)nQ4t)ro zVf=x0z)b4Ik-6qhn9SW-TS;-(=HNs4_Bi5$mQ;@KYVhcuY4>kf8Q{FlX!bq!iNiY` zS-$%=cKIlxLFE1v4#{^XY)Sn!9s9nG`tjVWScbukwUx%s=#BA<)VyX%K#ePjH}eF4 z#kw{V;5V3Jfa>rut-9h&EKFZC|rLd`?7rRgf1D+|<%tLHC^J2uOEBkaOTC>UDq`5n znMS|Fz7&2qarbxMX%KQ*GWt~I@)}dY0vp}c^b(_u?G7gAm6KtY(b?kbjWfw)m+Z+t zs@42`HhhxIv~PP;P3_19;7=l=uSl(ctKizpyG@3_iYbL=OO0pZ(EtcHfAET101aR zHs(7*|AxbCqaY!_twwod1}d6n)`msx&^{zj-oi!>u%V;{N5&=;RgSIQ9&BXv9^@ z+dMtd-&_)vmt$@V3FoSa4%Eal?0F_U>xR2=$Vq(rIPzHN?rCxMfD`7_c|E2TNIs2P z)c>=cg>S5tp{U=Wos|#m^FkiaaatdWnA>2;mpqL-Kehd1rR7J@+-&1w^v085C)8k~ zZ}uqfo=iqYSTcH3QWyR*)Y8rR<@pHaIC$4HiKy- zX@+Mi*?nk#ilQdrqCh+nV_Q16ow{D^n@%Ey$lZK-W#VZEEfd(T^kd2`@&22oKxiz+ z)l_exIKON8^hR+D9?1Y_V-Ab{IZ@*(Ej{gH+@6X@_>_Mlyr4qWUV->0oqByEdDD&` zZ;eI`4n!HLIgBxE=?ZS0|CGJXOb-@Lo$AfEQ&!B{>qA)`i(ok;ngXUC z>ix`nD=!XaUf~S$>`CV-yTvq8VmgKB4Wz@9(O>Y8$$fVvs;wo1t+6fQ-9{EonF0Eg z*KG>T*@gVRpDum0!92>^OZ3b)-)H{fsQd3x}V_b?c!mPB~882 zM8GJ`tT3>Lht;csxCiXz8f%|I_BnR~P-e~licVwjxrlt9WtYUli+6WtrrghtM0$Wv z1}VCgz6ve{2bsK)vcnPm;Po>B9K^D)d&!S3REW4oW95ZC4yoIt{_79KzlN1$Iw?{m< zE-Z?32z;{$U)uN)v24T8KxN@*&TX5l-Vo2b#}4&iCn5Qb%DQ~ivW0wh@4+y?G6G?) zOMb<_yLUNjep}5~hj?;C4B*SAAhAhL?vsbok;e6o6k!vC)6iS=k+*!IXa_&d_HkH0 z+;s@er)}J&`)}Fv)&8|KMy?2{x&bux35BU@kY9C-yMRS7S(M9J@h|B2eGt!ZI!&K}v z-Xed;Ar=`{F8c)|=f{VLv~!p3ck^{+DA>f?6U)v6t7=3Wd!vZ3O!{wm>MW&?hV2=0 z0|$Y$se0|El^=iC0Md$S??;_-hSfdBM{p#ddqnpYp2D?zaSF#wy0)7cdAUY*Z(DL{ z3@QrTqA*10fSVO)m;LH7$OYQqw&SK~f5N#A{vQWVjJ0i>CLNv_K?f$e?8Cu9@a0cL zfOJ>u`M+Q)o~7DcvPE;%2IOzCY>}nS=p{LS=Kq1ISOtY5sf=@h1p@dQ6M?1{aC{n- zC&3?RT~{#_Nk=0Mh{5Lx=q&E7gN01&Yv02qv6-F`6S34_YO#{P+WCe8qGF^$DiTkG zl)atvL{FPFe^g=?K3if${1%p|C4GQNc+8Gj8i zMVUv`7|(}2>ct2{Lq7Nh5(m`@lo<;i$kBxiyTAcC39IEV2`-Hi|Y935l#N=VtL{`GRzPn#^ij?*UG3U2ig@w0UKfM=dKH*Dk zo6i0cOu;Dp_wc)%*LHFB-Kz3r15bVTNS$GrzBAH7I{(*SJ2RheH+K5Sqo6reexfQO z9E(I)I)I{9DG!qvTp?$g8<3$DV9l+dg{ed^F(H*n7n@z7>bzL9`W$llmCvEX{3JeL z?+D_&zRsrELapW5q-WO{x>&wz>d6<^;ILaN4P4Vn%93yU)O#7T)O&Nljz*IqcI1cg z+1H0e--}LVSUyhaIyvSVIb}I7_gy#dFOIE8;**b91n&;ogk}4R$%k*kvtL0;b zerJlE%~%hR)p85i=6%G_E&s;6JnG^WdZBJn(C10l1f!^8QP4{UZkYOoS+xfw>!&zi~IIpU|zN;85W+3w!zkO2Kt3`E)1{G~^6TVv|S8RZU`*Jd$fp zt|5$9ZQ^|+@jJX0+B1F=@kVR5JuG=4t>XcQ>ON*YgVmag$lwKk z9T0Hv^${RZy>Bv2RMB#$5Tec8Ub=FSBwgw&F|$D*6M;a%s|p7VTouk>S`N{9wA`LM zskUHRndy+7x0+(=M~d*{QylzNA{T_hKvrrAh083kNeec=1q}Lpi8=(A=m6uDeK>*$ zJCEHTq~X!$4BF$$5kHlBlGGC;+bIPIcejp1*mgq$;&|OpB_Q=X);RnZL87hfjj%N3 z>?fqEgU6sZ1vd&!2*A@}3PxzEI&8$(HfaTZpR1Rfr+gVJ{YjYrTm%(ooE$dio|ckb zMr3y)d^Y3$)sXgDnb--9T6`QoQm-Zy0n2hKeQnl z@^pe8PefaivMj3yeO+USmdcq-RDbaJ%6)dZOPTp~nV_baO{&($@0H-qSX@^ae3GBf z4~Eh0UE0*1sfoY8)iZYB0Y)i>*(-Rio0p`n6^tQBD5x--6IU}Xca6JEZ)wgRW?mah zd_s^!%qFD~RfR1JmsQb#VY3E?8ZtkGjp6uMUVRm6bVtMa;9FV;1M^40H1IYlX%?w0 z9P56y$RT;K<)W#x+&PXY!~PeNpvH9QZ2#I4hTjx`EAUbF0SdDp?BKWB8<9RQe7U|_ zDmclX`lzz!$$c09`qSyfmapa#CWG5xNqY-H6X)-|&1_&XI{3&Q^nFLRv_~X3Slt9B ziy;FJ-sL6r{7osNDr|mzIGveep1&wCjPte!DE1ZRS`g(sV%@3g%&KqYo5kw9N-mZO zE7MG5uPBTW{*-*8GWn^O5U|3Sbv?8rkDvLE*V!;F-TJoA2sk|NDb%v~e0A1I7LA6d zA^ZE5KP-6Hx@t?Yp}uK8`#j%V25yf9fJC+Y5N#^s5W=R8$2E%*3fegb;u-HI!1MJS zMBenl+o(kDFP-XcXEjapAXDhtB5K&|C7*nL9#M~DqS$9K#rtchT3LnPU+E)h~AR8(Q55$Ptp99V` z3b}bCFAYNfJ=ef=D!^2^hQ+$4j#e9=<6r*z{Gva&v%~)-=4v8pe9wo~7c=n-J}&A@ zfCUBw+LLWkYu)wEey%-VRdqN6Oy5-0*~0WcshWlp6JE!ojP6y73_*$p@1$G#)f2qz zZ}0Y0T#*o0L<>q+zq(|L6()2c6HQFU(Qw$M;fA5XykbJbXR&j^1);%sGrAjd)$I}= zZ=107w1nmez+8S|QGxkoZ~7@f)C=u(9d!qTzbD44s}A*m`9?Xo{H{<_SQuZ_V7P!= zyf6fqb4K@)hbw~ZN~={^PA0oiQW0xY{%f~a;h(qyTKb~?2Dam-ITbZE{Ujk7%5IFS zWzDx=I9<8AR|201nf1)1oX&3fs;(+ixgq5_rJ@TWHGSloqqYOK@Mr>lN`~aDt+Rvq ztETQ7+1H%n%CgpLyYl0h*ORJ3h)zwOb(2_W7w~Lv($3&n-=zJ4ze{v=XBkR;2jjbS5{&f7yX(bEkMK3IZrry=s_*(bknk154bo3a z2s;uQ1%y@Fh}oTt#+r6#;~@zzh|Y%MQ_|ZYy6q9+AyatfR{lRornRULdMC_$%)WE4 z;^V#DZNfv`~wP^hJzOdbjw@~RyS1?m)GBbD>_{Qa@JdCaCdXBaYUHdGdQvF84p(wT_ zTd#IzW3_|97IS`I^>g?ZDNeV`EWvE$(B9kEkf_x8>Nr3xmvQd__D#$=T|_WU5LQyb zW~H7I4Pg*SCMYhI_jW{hYbj`=7HmF;rFI;D8aJlgD4bmHmsGgvO`$}C5kzm?T2VFF zBK~x3CFp`gd8BZsVsG_3+*UTsNCl69O5AwOMN=hSIZ)ui=Ld-}@K~Q3a@q50eTC32s=t^Ec^~d+q9z)H@7p$uLVlJXP;ZyMjsF=;!9Y zx)QZ(L3S8tCOO0{;gR=tnOC6Alb>g>z4zcH8J* z)a5V02fqCW{>`6HharXCOJ~obFlZPQik?Z;SeuM;rH;IXP-!QnQPyiErJDCDIXwG2 z{#0PjTTcje7!uQ8izR9y50{kZ8_ASp@WqCq*0w{=0SXU1Sp`0TP#&yK*!Mmhu=<`F=ppX z&ha4#;@U0hpiO(4Sp55*%G*(bTdsnLrM}YT=7ZN&|D+Wq;(+~@q%X1Ou|?r_gM?xe zn(Lg5T3iV)uW`L}jBEB1yMkyo8h%S+F|jn1KZA!Lw=$M$8!%-@2eC=o)sfrE`G#-u z#qr+7i7CWoZ2TF27th}%C5>j@AA|tMNEkF{$1C>y)4RVK6TLi%B>+JeMdD(&W<+3f z#w1YZjYz5oiPgK(B$tGACa-(FzF_`ntPH-2h?orLg1kz8d*+l`lN{*|lgpKqu!&

W7Aq2Cd~%v?sVI%5tC!~~ym;KNHg+4&0~QIFbc_d!3F#t?%Zdp-HT_7E zY^l};47@);UIQfiubr8vQkVi zKCu>Ca6Jn$QvY}y!GlKFd2=Yb)GdxgBup&8J4Dc>Bmj;AApT7jV0L^^C*b^0mE9fO zhLP7iu!XtWP(^%bZo}JSWFE;Ipx4evg}FN@^x&gK+G9j{e{jg6Lm7GsSGO=!`3FE9 zHT2>i|3FRLpn2Twai_yd_~w!j@#OV}$456F(utbKmApx4^Wisr%G#M)c*j`kT@j!E zf#ZW_H_w{N)C>NeLl%8X+{;6JJ@X}A6>|W3bpC;MFJr@8<6p@xiidol1yHhZ)8LFt zPxZhHq?YUk=pW8k9-JG@MTu+kdI#7sER7lMu4px6bjGz*Td;eR;Oh_b9~^cpjyRk3 zRC7M!Uf+|+WSV9C-}9KfT&({;^O$U0tpBfhOm^1)<4D31!_gYXR{I=a)euWYlYB8L zmC0YE*A@w%Hv)4!rbM#QjvoBMNzJF9SM_WQFh4j^q-bcqUMQ3^nENqpRI_k3W3;Eq zl!@p$tywK{r5UXkSgT#z7&R#Gm4)b;suq@N>x+A?b?lXTFs|pHy0#>DZH&F&s9~(( z@r7t1x;#zyfVslAOKwkcbtSS(rgllG_HDXQUfJV!jurGna&3Y}DrVBgRq*lm5f1rP zK7l;8s`sf9RT2*scJU2KUAD|WDtnJLL#_A^9om0EPXv92(v}^b5OzMar!}yQ1r|1`Uh@XT1|Rx>I`@ zcTv{{BXgIeG162}K5SdlLTDMJR>OBsAEwya<}OCV9@dh&q_tajY&oe-8N6m}=@A@e0wKXA%rX{rH0C$R860n(?VoDCIIw#jUn?gI`LhE??8C zwr2oLgSZHr7VS(1Enm#m2fora&1UA@-ZF# z=Zf~>0{Cd5vh)3io5LTphcSO$(6HGn&Q?aG^53Nge{_4#Ont{*)j2o1f_d0_=~0?! z>P6|jv|LHSI%@mOkQnb2r*U}sYqZ>CTULo-5}P35`{+(}`W5gV;|sY}bfC>P*C|`_ zr*z}~LCqL1*Zrf`)ap(}{QgnCU4--910_bG(tY*M%$AJJYI6^w3n|;T_w4pY1yT+!?UN(1g?5kJOrH0AE4$w4?`_#K zOrXFZYIvIwI0@3ttNaOXhKUM3?^>@MFX8oD+XHNAL-=&xw z9bHZyq6~!Umlpbo%{`WuiP8)0j$?IZzqt7+qJbS9a~;-6^2mp9P_xn%2obKBCZ9R;FV>eI$7k(u?q*&|!HQC+r2S8i^hl@8&yju!WP9z_|^=wS@ zsgyLc{<;@|(U;qiKYwm3mVCZ<9{6ZiHu`2YeonQz|KnctHPzg~E-cQsZ1>2Wv+*^i zb9ZCSScAuURrt=w304<)hDq*;^NyB5w?=x*$it6sM{y@v*ae~-@tb(cMh*9&Lt{U&1<_}*?+kE`PR`t zlzZRc)e@1Pr;CP`ifm&;pj>XMuc7C6m%-k;1GnmMP4~^H_9I*rK9!D4CKW|hLlI7C z&cFi}qO<8g%U&LBWJb~2Fq_7L6^Xaf8kj1Ks*L%3U~$^HS}1Q@0}^wOsmbH(DYiPl z;da;}d6Ch8S?YYK$>QrN=jSl-onQUOyHvzVN-ZrHZg1lrimF~|TqDqnl7pU9gG6xu zO22~B3{k-AB?OK-w}M^<=Q}I zm{13Ms4lV+a7CAI-y;nEHym4gyhr+F49mPX9q`!Sh5jiIeg)()9%zr$vD5Pfe$=_6 zeU|%y4JmKU*s;v9WwymTb~^rN@B-Rz!C)TzxxnBLEamV>8zw5!Fo?l?VqpBac;b)+ zG-srBG-iAbm>AZ-un&}PY2p7$`(=av#AkaAB>MBDzfB+f=(-OJ|LK{Ol*J$24(USz z;UdZl$ng@cIXeMoB6kozU|Br(Xazi)yTV1R!s)|)a|o=48U50uwM7({5v+Ve*0K=4 za=0A_*%}gF&J?wu%*R7h`$fixU)&?Ax2OXv0#L~LCJCgxGWzW0>5qScM59d5Ky)7x zj)eZipP&)G{eyX$p-FZtZCq>bwH`NdIzty<*n_!3*&P!1$!5x5(lCMOJa)&+9>bUlBtyh9ksm){$9r z9XI&D?cLaJYH>*MzOpy~j9gSOKeDCQR=cDLPZ1Z z0W!_&4^7w#64-4BZ&X8=dL?iQ^9OsLUhfs)8^Q_V6v^j@o4LNa z{5v#l5u1B5oh%Zc_y{iux}MbQu|v00wW|(fjH>3WtKKHc{cQZ`AA*G|I|&Zyz^0oF zZUK9Y=86)cRrH8*;D-dcqJs*^4TD9&G7Baug3efmY~_acnqi<|!XQ>2xS&g&2n?*E z7KTa!4W!`ZNdKnjA4MxQY`>YjC6NS??L=eN#9&FtWgH8PFtCcH7hEq7tvyCHr5K>X z9lxZduQBcT8~jaH7RKVhW&yw2LVb8eK9G>K9GtC?T#)*-`FD19ts0TtNgWyUusG?m zmmd+}h#lg;#kXQX{NKM?58K=RH|1U`|3 zwHenQVXk;EJNRAtv!5)+O zDth5?&&VZi0r;Ixdaqz`?*5TWahuN>%ZS}Nk2@Cd3djT4^F5+s@VHpO=B3Pt2>TS1 z$Pv>;n_9l-ur`Me29@4+;sCR#Wl97Qc)&|}*cb8CL}Ew{8xJUvKEJnHAzeubC?>x^ z`hvJ5T*nx&gw2l}5v3o8p~ICHE4IM>@WnTWWNSoL)L}zZE($?xJwhbck>Dy$FIN8Untc)S&F@v0jHi91H29k_RocedTjvBB_Yx6MVmvjfifk$frZe<41G$J}!8a7-sbntc zGhXM>GdI$9Zbjr>D)Q8mzC@Q8PXB>iVG1y6)Va6{9?nj9J_J0539BhWF9dX$^a(4B zzpHQuITp%=cnB`QMrQaIo9SQddaVx@?bGDDG&oz~VhrFR%up?r6f%_Re6aAGCU4Yv z*4)+J^j-Kd-C%7r7??S~IF?6?}1_fnO+%UEA4>6BroY3m?8Yji$^_^d> zRh-(HeTKA68?6ckyodBqPmtL|LLegIEd@NP%s1&tjkwomiVFy8OYuy|AwdsV)-S9n z6qIxEeB6Y{_!`}-ME|N}lgGlxKX8IrTf2QQ-~K+19Kcn;>tk(6PgdPos4g=b#XF!H z{e;$9=OYC&Mof4kH^CKNkiu05>~(~HrH_IfE*|K**0lGQU95Z4NI2vz#F$=!vDa&_ z^ihr#t61Zj{lCqqibkx9BWhv&zDaV2_Yu>dFT(Fm=L{VAc#QA*@O4^QQt{G2}(T5Lx}I?r}r@3SR0WQutktRVb&Gq6 z4aMC|S>YZTztjP1_EO#1s<^%;7KZd>b(?=b>;B=4vE#NF@Y!!e-E0|rJJ~YSDXM-_ zt><;RG*!gmQ^u+6IXOF(iCetkZ9R@sc!4Z}i?A!$WQo}8`EoBUo16uK?dq>sfV>c& z-6P>YjVgh-61##LCWzCXu8Pe@(*6275qCyZaqSumfG5!h+?+mEZn#%IIbVD((9&7e zn!k*0eubh`nNa#*;_5K4_?P#f%=}YBpd0Xos0oQ+i|tdG`Ocn8QmeayHKRL4v!tM0 z|4p0alu=Y1V6=e2zSqLay8-0R=rvUAsM=mhILY^vmujRW%W`6u+u3VrZjcc*tU0xIgcL|V^dj)ay zQB&ee8iMBu^)C@4l&|8YP24n8Lr4$G3y}rqR3)*!BGN0Q8Ps))Xz%yOPcyBIVPFhk zbFN@u(?zTVOej}BM!u8xT?=;I}OI-SI>uAioO&Uq5vsMlH%t+EfF zW}d?2{&qgBLaO<#w=WQfAmXMCU)ii!f~H58}$ePK-BM@4*5;H(2lKHZwQtJ;&nW=YnQ%+tMm z)JV3WkMRtup#2jk>XG7nAyv?Zv#bA)^!1af7IYt_hzmbw6!7UV`L}q1{ax;G@_6ps z0;$$5@Tsg-$9lhXd5x$3bv}(_ujB8*)D9?u*LfQD-mpH_VEh(Z9%NTa_u`}fFOi>| zle+Zzs7pv#!|_QShy@Q|pvb87jioO?p}Bs%>W#U=NpQ>q_?3$!3)L8TJ{h$s2;0}y z@kid@HJuUJ;A<8d6!JVFuqx=)m1v|hyhPdkZNOd%IQWBrm+;{>QJ35m>wSn%s#OS- zP9sr(?C9H%_d?UT$|*i@!f9jxPCw>vsY_c^=kbX#+|I@OSZ2Tz+$SST{eI=QC&Y7$ z@a~~^m=^0drjk$~zOWbfVZ4Cl|6=T&qcaJt6GO=x26Jug~VtXbwC${Zm zVtZoS$?5#Q@2+*vy61lD{PEUXUC*w)pRV53wY#eE7PMO<080Y25(te$9>UIRPdF>g zEj0Bg$xQ6|#IqyYpc%j6oIwCfI+*eqxg3b{Sw7V`SeQP#IZ9FNFXkYwZveFu&Wwg@ z6Yax`5yN)spg5W9!>%CCdG_4nEXBJETm{qUL-Ee-{Pk#{KEL|b)a|uJRyOIz^B27y-QeYA!iib zRY1$niZ2jXS}(qIiEs8TQEUb{{H=iIS`z`0z0g+b(%_(h_)i`4$?HVyms z8~))p{3H~`Yt5-3&O7$p=PbocC${eIo@j6|Aoc=Sviyuc)pN`@y674!bdVC!41^wTH<&ZQVOJ$9Ge2PAVxP1B5wZdFsM-cW?=qJS-+1{ zaKo=aSuYMOj?PI4POxkoAYICu>iW;?#I{M~fuu-TPjJB(kiY{Yl>)h+k4;L4k62YP z|3YJ@klsR&sSxU|cE|EDr^Ccp*)G%6sP!B^#2~Qr68=tfxT5m|52~l@wO^k;r_u8a zFV72#nA+Dk+7gHyvmfPd5FvOR9{h!To?*kDDP5ky@_eN-JEMHrdRqtO??q$iOxT6? zVK*Q|jNM2#)iPg29uj_;bDANMHBCsZ(Ch~ut9fJ zKA=kzOgqoaotJ>3Y6Zw+14>#Dp%}4AbM^P<`fgoxaXW-f&t_sz>$> zxOPwcV65<}8$yoX|AtCrOBi=YP@~{h;2j)l%r97;FqzzJ;$;_kR7SR2Rw$`+$2qp)HMO9~CE!jM94`+7^v zPd4W3f!Fd23EoS1Nt)}x96_hsk`@q~76r%o#-*cytwK?JrKAA7g@04zKCs5LF(l4E zZW&7$PS{);h88CMn52NDz*zP>T(9TKD)DuE0!P3msAP$EaPNE4F-*u?X*UYo%S9S) z$eSCN3)VfjLh{fCvggGOiN_Sgvpxi&EneJRJUN+{)Vcm2a!^tYv?z?=*Fok4lppF_ z@VS&)e*ai&Q~uST4wXD1`5)@7E3td9JEX}PGB154N$=ju@8YGFK0!Sf$WMnbDj+dM z3yu$rgGCUB6Q*Luk%9pvz9I^x^5+U%*#(c}2P#Su<#r3GkRX74R6rW}v4TLn9eY6X z!#^$RTkpvM3_K34{Jc3j?(i02IgegX2RiwGv<+6A<8cj@r?bJ>%7f+x3ukIV}&$XuUI&)to+ISgo=3 zJ{k~b@KvveH#{(VxPX5oB;Sz=Iv%ACd!Sq)hi$(7o8m|Ke~8FOEc<)^HrgH%MIk02N;yV z{o*(}^YFcO1R&%h7oROu@rU;MW?IT~SjU5pD(B%G>HPJ}x-k{;8NQ-Edf7Q_GA%6B z3ly6Q8p6)ImkWHa??fNDf*BSH>c=)B9cq&-zNIt%0`q|Mf@Xufh9mQn z3uq4;SfGC4jNrFj2wv)kbb-oRom`)VG5uwOMw*_uq zSX-@O0>hr81~5bp>cvCEl{tRn30DwWY7s!tQSta=c+**QtqYWoI*FkP(oJDXfzZM) z=HEOn9N?blH_pExf`ml5(M$GOLrDYIBJ7JDm>I*xErw+@Yn@$w65p>$4d#c8bFaO= zlw7prYy^mX<4Hvh0VXA{ym+mA?1jrO-f->?VSEt_pNak6$NWC-ihrEN$<_uqLEL6x zC@%S_koLWM@3todytg6W%vfEyayI+kK0K3^e3WD%Zw-CDG4|1qYHB(VyN-PGh=1Ez zaw+pYN@nm>dqaKpw)>4emBO%wn1mS~6?F8U7@Z;~&V;et0C`GCB|4o>a==aU%V^60O1?Rf)pWX5}N9s%IuIH9`^3UpcLiN0x!d z>v_~#Wjb+Lrlod5R&93C#Oqe@CTdNbK1kl^GpguL8crhM+wRT)q#MT?zX?_(Rp(gJ&`_Vt!aHTtg!Ib@$=^cMY z6+`wTKGyuh>NuxwaOgJljdHT$#u=R+R#6f^zxYS^O8IR z7A^lgqzGS}zd}!%`(;6&DD)nHB6Y{^#(WUFGdZgLf0sO2m^qj^NSI0NjjiDL_?Z5G zU+nsoh3kJ<^W@;>X8V6XyBV!F@#n7DaqWP1l650$;C&m}@DUQtbh~mpB-5QmFoR*x z{O{0!y;&AS?5zt9Xx!~{Fa zybmuntMOm6+f@?R1V8@v>%XzMw~iFAFO*5??NjqskU&(jh( z4n(at_$?Ex^32u{qfbw4D>hw0EF+lH>?7Nsw@l8$7-RmP2A(q#*?p^^Je%CcBf_9McPUW?{ z$v}r7_rXybQn6uQ!4jm5Ede2(PiNQ!q~J$M3u@}rA$A=a+$u-wwYuMyG&v&O1`Rfl_H$I z>$MC(KTijplBLSBEH zczgEs+J0UWsAL_C!Yr^NsyNA37jTeUQ^K@%E*91`=oSgLFKsY-?Zhi|6{Yxw=@XnH zE!5_>f^jqNZp8*}(!kVCm=C`AklbVv%%Zkq4?j59NmID+fpgZWNNgx$V9JmMLU~F^W5|OjNBQ5+}da4LLq~{=BH~{Cvq@v6Vu?g)GeuEmwFSkLtyWX(O5LQ zPF}tu5PXe3(BezXBV5$jvcy~Ti{8Zj!qfac(sFz?y^5$>iY4Pn&iu=6Z(42)b$bD1-#Goq}V6-^ol53Krc0y$#L@#mWlf)dk96o2JB>#>sUk`4gAi95^j#QCk^pjuJOb5)cPXco~NJ<3%+T(x-eXk`^{r(3B#W|}KRA|$201M&_QV2XS zos^j*4HryAGd)~?9XHLLv70u0;{uhV zxNW*Pd+R=S@PqHY%HT3%jCY2X+jHbMAzv?m%s8*6wrl!BNMTmC61S#y+8a^|R_7EU z1EY5~uW_a94``W_^W3dHIC^3xqk!4FpP(oeoCyAgdoSJ)-4DPmjSV(=qwuuX@S3>p z8b3+Edj?TVNtU>labY;*U7-S_zyD$hFc&DmH~t2ERp?0j0K9CWZr;^&L`Hp7MxC{G zCXE4C%ThKas)9|N?!9#l!+@*62nG_=6W^z{;E^owE(*8aJQDck*M1G8=c4Jm*D zXMc8;)rwZC`>u*8)iQGS^HV@XIjM9e4#TXBjY7;#*RnJC4oqDH&i+RmXwUC8JHbn; zCVUjteQ9uQ-VX0?RRzCSy%f^~tj!)1dX=?erc2jgCAH|sSbjR6LlmU=4b}sbzxwGJ z^CQc&ei61|Wb4faX9vH?nD0Xh8@rdVQ&zxC3|^ryX8v&EBkX{ORAV55Iw-VQ0` zh%z!NW&F%F7C4&i$(s(i@oC96x2HJ-=+QAWKqBQ-&tbv*=~dRrA%&B%#f`1boJ$!9 zj%@d5$GY+cI*9oo2#TrvJ&D)0DRPCD*68C68E}|{ztNs1HhZ9PX4mFnyrnbbvh1?2 zxA;%(t?ySVb0|xgj@*tR1sc}nVC>^@z{A1o^q33La%RLI{Q$>H|1uC)XgWwUNe5m`)GRvd=8wDAiE3}<# zWA)%&k*!hmi5tG^~UKdk`{OPFr}u@XDv*dcg1mZy7^ESI1H{3kW#~zK;DU z7DwYo5~Ga`pk`@F+f`w@5oQ5p1<*-ZtKqw(6ctb0&>Lmm?Vxt6PI?x?;PnOM{Q z=WIaB*R*Jz)z4_zc#ND38|^XPmDCoV*1B2?bQO-ame>oF5A21h)q+W`eITMn zTJWd_TJr#6rdDpL+mf69<%RNjClFJ-^;*1wtSZ{g7;~Zd$_Ofi-L66g$ku#O)7)+3 z9nWc!RJdN4#a*DPbK&W8JuRtCv-R=Vtz=$}j+LMpcQsLh*O=3sr2}$u<;<&$XKA(V zSLz-SJ|XP(;a5ShHVjsnokcYzYQx8adFr_sIx9+IUuvp6+k-<8iU9vnv;zhPtcL2i zX!c6u8jIRxW<@y}RVKr2JIi*|a&kQ&F+g>wH8RF8R}Klct&ql~YCO6UX+650EG$fH zW|Z5R#16A{;}gaLT{PtTA9aCQac5uz>aXKAY7{G)=85V~ruSew|XFraQfwkrBRqAy9w! zD;Q8EQWqVM5seUKX8Z6GYZ!ndpKXG8I>?Zx4Wkp+m2BCQU z(Lb=)vg!AqkXbuUJ^12vyH+guwubc^YY*@F;!=EMO#ZAKhk>&qtL=zYx%pnqrr#AI z^mevQ6lywoWlTx|812#J08VAyhgrP)nLfxr&(qmK+-by zC<%r@5GC$K=b-AA7UQi4X_YVFaT1s`{(-USr86K(v+NBPASW0SLi!4=H`&E=Kma3I-&q}RbWs;T`i4OsZrOjUaS z&FC}MA<0H#1`n+G(v`Q9&Vy2M7fNuOyy#K;q`F*!{Y^(;j-Jn4+Q~8--Y@H6N`B?f zf&2oClHFTFv1Tz-$<6!f+2gM&CqJXupl=n?6Fo!=gZqZa)+SEX#p^S{d}oc`wl#uG z60keFI05N+zP$a!ZtBk0-*A0-vufwkr<<-68y{`Gu2!!+5PD#OH)AlIigOY_1uX_L ze@-^STjy$fgwy?%_ZIG9HUDh~10tBxm;y>7qca8)S6CU{H7P)$qjetcL`|SJXHe-3 z^iY~H9Sg6TyHAC(w8JBEc-a5`QANZ5=;iIa`ZnE?KkE6?mA3ontvWi}EIA6m-JXeq zkW$-(n~zzCYf5HXg8JhuSS!xxgFuKC>DQ0%T+#Mk4V>qtbiWbfSvGB3N3MIZY;yz}7j@eg z|NioGQ=ZcZp)1q9YjLY-)~;_+z3qA@8gYYbJ(#84u@%c9?<2=TSNDAPLkoja`$Y1)=&np zt9GV-k8VeyM;eEIl?R|nt{R%3?@|@vq<%B0gWhmfJGSD~2Jt}ae! z7?0hw!`J`5EINP0+rbDfVm3PcOJ7rS~<+sPrS-S#wk^Tq#8bdu~#2Aysg~sZ~3c_Y;VczY zvj()>fs0N_Z{rKC>xba5+S+CBC0&fn0U>9+A5l_uKTlDWGfPM#RSxH%`#A)nQSMB? zt7L71=<)y$gVb?Z%limMxhk14R8U}>tsN9#)vz%AX01$CI6>oiD5O---glyw=U~@X zO6B-Hg%PzHHu-l{lD<^-2`;0$2Og3%I(+31mr+~zcPSyS!5{+FK?H7+=y0-Xu6{Y6 zVNgq143~l2(~I2}bqJr~5f%~8f!O0Ju3|aBCQEfVj3u~Rcd6t;wV@NA83^b8rr*_iQ zPw`1Tlh?`hCKi40m9OOic{8M1ss#f|X2&vz#eEl@- z7>YBgC3umELvtE`B_7~8`kik~Ab#K;(@c8y&t5*TU7#Y#;kThmU!&a_IN~HegDmfB zwB=#haAaS0=h2-x7tk?c_zr049fO7G)a(_nv z^HsRAvE_1nTA~^7l*QxDajMpYN}i*Ho7^G!az_eH!K8GGIpolVOl`nDj9eJqTFsRq zV?y>>j)^6KTWa4gm*FomHxY{{Imvt>$^%<=k>@tf4d z%ks?4sptQ6gDjP!0{V#29h$8b&M)K+TinTzRD8vDzM3RuZRR&dZi+9M&|;Rd6ako2 z1bMZ+!6K^aX%1nnPhtTyCp^E;+y{e#&9XSF4Z~qWOBh(D2jI|=l*abc7rz`mItS4_ zMD%5{QIX`^N@I8pL>dB(Re`pRlB`BXkY@*1s4m{n?!cyCzCSWfR@Xo}u*aQ!ps2`+ z6-q`c`Olw{ilI269|D1bIrr6Bg#>dzz3%Dn3e7--N-P^ituP#Vh^Avi{4)v?tt^K6 zfX9FwpYOnI))h%meM>l61=pRJ4@f))m2}w-2!Itg3-%s!cP)y^&P z9px?MG5Rg+9qqG)D|1+5X|VQklFjz_%nF;tf5nvr9^2jj z%b9F1Ii9U-o+iEgs1h*=c}NMkT|yYo;3@`BW$?`2d|+mmh`+)3yVb~1r;W;URcd6k zXUR*!wsG`EbN)GfOtTVkLJk5_LQWJ?LUrkL>~ndY<#iOaRF1|OxhPr6W`Es`_O>Jo`CF#B-rA9EHTne~}r z&J?$wS6arT&M!f(qY4PGE#tx#^O5W=`XeA+F=;M8!92t$@{D$;>Ubai z92YDn<~OH4u`eQ)&+OqF zcSO_9CCVKsYz50UPc%D~Zn5p;4}kZw_p=a&=)g1~9=eoaG;FLz1ftbkN1_t2`l|FY?2I}Xj;p(m;8DEu~45#Dcc@F0yc@5?;?Uf%T0v1 z(8XCveH%41gvcBC7?T8pHNE|+>4|D9zXFfvb9!D5stX-l_Q^fp)k&K{miDB;-#E(@ zg`=m{f=6V(3=uol*%V8GbTI4F3T30{Of|ZSnmXwa_WS-)P!*2098ay-gXuS=}R)rp&h8D242e)T3AW*jXH;S0#UDnIiEmHBpdoPgfqyWlotJc1}rpuO6I-uGG5@+{*I51`8aMp9FD& zgkq|nGK$=1{xN8Do3AMIcf3~j^_g*7^4HFD+T2I8N_=|-3KC~YiTs3xDxK5CuFLXX zo$~~0>hc$p67k82y##71@^DTVa@@4zN?-TV4}gIV&dDr^!G78M9I{Qp{8{&k6F(<4 zwx+l#B-&BAIA42ADl0~rmfC}dt}x?XKq5EE{$Akh8s^?PGrwpQz!K;H%&H*c-w{px zkChJsOy$m}T-r9>;%|BfG(|rWiXA-UkDZg0xkqM|@b@SbBrKEc|CKT>dv*pBsHw^` zO`Xvb{o>FqPV6QSQ<4XBniKWdI|8khF?<)WH>W)PKdjrauycR?zgV|p<@%r2?bx|l z{vvim4cSh(^mt+xrCV9<}MphE;iRldtf>W)pbhSatW=J z*P}^U!7{T#;S-8^ndZ9a?$e$ZF?Lv4!A`uEB{=p9mPD9TJBn3yOF`o`fYQvr!?y}ZsDE#_M zkeq~;vjS3sz1AyDEH~5w{=$DAu;0vZNi+c}+hkqMG3he2-rCMad(MHA9|)GVkeU*M z3e^N9%w_bivcm+hW)&SZG1T%C%w4)FUR6Q`ntuLoeGltpkCRXIAsGR2OEj0mIm{@A z_hozv?&DTr$LqJH$Hk${zjLWFy)F5{UrIt^C82iz5?Fek0M9W_uy5BY33Db5NWiY^ zQ2e{%D}eaRmz7H)I3eN6joH1gv@l0E3CmN!e>p`S%w+)HGEF3r2<@EkLpK?$Z8~N& zY>OcLcWTas#gIjVF#(_I6>}`d`5(w#T~mh)rvPl!n8txFLX$>ErugPIT{nisG$r!V z7$;+*xD5w`=$p-5oecX&&H)oG-|15@{7^%Q;pQ2qK zV(z)Lne&I6J;!lq!^qR*t!l$aW7DZ(m2p?F>LQFY(roDVlc!^D+Ke*~0fEnND1ydr67aVWUOt$#%0&Rb$W?c-E7M7@Yp1bJ}@5CxgDNJQUrtq{N*2>Qwv zz``_HyB7<8iy&&4UC_F`?issR81A5U5V$()mR0F@yC)wr$7k8@{_W zI4V-OX2cVqu?+;@hsp5NERXX3GJe}lkov=ATMH4=F!35VB@z*T`lBbwkN ztKlN2KjzPBb5Hw$fVM6~6G_WYR33G;BMgf%7>w~in?@I~;%;g?9_o&q>d0xEPlbkT zGS1Un8&muj(?mlS%du{n$X{E?pYf6J9DSF)-2h!4d0(@ga0orD6bUlG?yvh(3>Ah% zUowvs#|G|nB_z6itf9;6s!9aNE<0{hY$L24G4|l^lmD#Ry+1D+d|W*kygvaq16^#s zU#pE>oU1o%z8yV$T%UZrzNI?SBdXnAIL@Lzx3TB=HbE6ioGAFc?h2fNt7nsQ;F7-s zOMcJTJa~&H1s-^&7AvD$(VjD&!D_Q+4;)%699-R7w>+iWz-whK-2_ug%LwDl z=&U8y(q~Tm8BUsTLU8P3TDzWb65iHFJsSBF^O|41`+wQ}eBf{S;v_1t)jV3}rNui+ zCt4a)3ugpR6P%-#qz0ocrd8;JB%u+w(&T_)hH0FXS0S9FoTL_}98rtqX^dgU7%C;? zGH7BM3+;hDi64jg`OBMg!DAT((c)$vy@vZ9Is{^$TaOs0CcO%xRak~cQm(27Zkjyv zRZ#suv^EJ4>z?*a(#IJd2na8trnIWa9`zwaQ0d}({p~1~aUv9937y%&hLnO`w}Pw4 z+*f-YF>+BYV#wHbg7aabxwdJ9$(6Yx{vs7z`VQSBS}6V*lmf4w)B>-TPjbka%}x?z z=C<( zU@W)mG-(@s=rz+V3ojO4W>LtmDuzq=Uq6AHTsco9nfefLn`Gv(k^su%K97`AWOn8q z5pl%R?l4^quEx+HPh7LifHb8A+%Q~6GH@1hc~cT|->~nUNxxqqh;mMnIA>g?bwJWp zlpy2cg>8Q5$sECwv{CGQ$j}74t2ooG@MGFCC2!lhMGAQxW=dkZ)OV>omquOE0C^XVw=rQtA1|02L$+u>GvQ>M`6Kq=BHpaC^E3?9u1`4FG znYM6giq)0iMGU4;@T&7Aoup{fpqz@v2NL`qs_z2sI+ zB78E|7rxa!3S~c5hIN1zD^gW=7d6Xt&lErEAunsRXMrQ#Ah1nL_hGHuq(?1-mS`=g>|-s?g)Cfh7;mJYjE>Piw)Np|Xq52Y3@B!Z}E)=NfLE~_bOmh9m| zNV7e5^LXxINIg$$4HU)0MwV2t8lfhuQ8DB_Z&x0ud^^8^9WR)HjQRYTm)@@%urFk=@Zu7rX%|FZq61Ru#D+=Cgc{ES1B2Y8x->kWh)y9 zWfSI=(i5!qg&%8CwHu;D|1%2}VoOLRgqoJrcf}DMyF-~$UHLXfgnTS<^2;3-uXGG4 z)S}>vSLdV?a4mBEjU?)s{aCPM`KX|b=b@37>eWhPXTSu)qOv-%QuZxJx&=k zTh>$6(koYew0Pr;)0gxg$h!Nr$(6hN0du~Ta$7*=KkVMR!&@U1o3Kqnw;SYhdPqLm z1OaWri;xF!W)53GE+|p4cu2W-SFE1&0B79;uHi~$4t+lvp~wleU397=zSu$Wju%Yt zm;$Y>odHxTQdPqdCHGlc#Uw9;PBl;I94NW}i?l%f^~JPk;{?SVTA5*N`9&W>6YDD( zBwI^-`{~~>@#|WH5frXeoEmWIXFB1{VArmVaq%3z8=jFdUpZY0rk6VcKoDE$RWO1- zjB{^LUdC!?>N+DlyF$eOBdHB{+4;?rEE0;I{J$?*((lBp&+DSuK-Z2OjJ3 zlX`G+n|Z^gK*Iew%ais#A|4spC6VvZuwI81EJnzg>{O?@*=+l@q3aJQ0XYA`!U2ro z6QkUpcQNd*4fWY%Jgp9ukBlU||7+=31L!!@cLS89Ljy`~44>PR>>bC6EAIGOctZY+ zF{*WVE6DRn)N||wkC=8%psu?4J`0k&rjL!Ynt7xvsB^2Cn|CPKF%L{WV-ziEW%pw6 zo~Wc57tbr`dT74rs{B5uy8pE-`P-`X8SgHDlR_SoYQgeI#mKm0h4fczZ_PIXhp7J2 z-hQ5Nm5^{3v|>2)lmEyd@2IAR&%dI(`*WWCGC&t7l>uPo)L&IM8Nk%lh)f8}U1Ga; z9Ie3psrMf+ua39;rr#yLn$L3$j%96X>PyDdj%C#Y@;jqw0JILAl~duSjwqNg`Dc)?uSZI*myB*&;7)ncEuDG=DtwMtxaQZF z>2xa+xzw690do#D0IhA~bzB0B?dto|G19|xZp^INOeGOi$xQvx*#B5$^c^JJY5MqY zN>TZa-wFw{RM1LQ5U04G!!WkFDdTyfbwmvW`oGSXp5wa-ocl-JmbwaxKdbVRko({@ zg?08>+k42bbCLj>r!2v1dx0+c>`@4aoWyzRNgvUY&;#Sj(TY(YHNQRosHr)vTX~Uv zY3NYcqs>uPh|done%Me-MLqoD*57+vc#G)y7-nYar8M+ovSM0V=K50~Mu@7Z1Aq0# zb;k=S6+5K+=v0){)YBu%YDe4UdB<7D2Fq-{T!FSIu0RZ{8D=9Hq?`4}DVGH|KI^9W z?d5vx#RZb;IyvvJc~B96Q)yHN3YQWN)vrmVulJ_oeGR>LQE2ELd2e^erUNa^U{LYW zXh{%#5{?>!R^9KMsVRRtg?;?vZq1^IeX=W?3Tp$Gi8g?pqmPDdJ}OR60U>2H&;|=G zKw$(GKDdpm9dkQ$9&krjrDn99nR#C4VenmH&1}5L0FKAIRG4)HiH9Yw7?3>i#CDI+ z^cvmGE=-p0$yp6eKYmFRgpb78%vLfGA&w_wAnTm*y{COfDj1H;O?YreSajNm;UCrc zE0zHhNt6E1Y>o7pzw1Kw^DIu@jC_{)8-(@QvIv$WA5s=wP#kU=0tlO;R>iY@B9&_I zmo6>O28J^1%=a1UTu250O7_l!(~plSlB6_XM>6fTtRph?fE$f9i`)`&)o}1s+9>nJ z4BkO#x17sm(0s}O@X=Va7!Xw{70osN`aFpP9`YYAnMrle|DKTQ7<%~fI$HNjgNv81 zIx#&38xf0T_ByYJ%v@WaO|xIt-~xxim@4{vb=cG8-DILtg8&y@V!9dY&ATTwvAv%N z_usHmg(C<1@U8qSuYTWd$7GjH9`>ar*{)Nzr6pZloup(4sw8zPAIs{R79Zccr4^or zMk(8%y@}gd*`T9w3TDKjuZi7kX_K;Gvn!apM!zgotS&aga9=IYGuTm1GB{Ak11v8y z(jkiU`UqhfeC18ry4W6PWycbsrqV4vX12J$`h1uG0&ICbPUbUVKq<1pB_HhkYS8T& zhkeWXJ^jO~uh};T;}*@;O>yR$bl*iwAcZLE={GlXPy|OybJg=S>|fDmUaxQLxio(^ zD(WFIUr1vPOBbU;FgA~e4N5!fhP9<9+T0cDuyCB+Lirjg%hf+lhQ7d5HyqqD^1kf5 z`s>D(69zij(s72Q=_{i=-kd?vl;3FrCj(kl6JvS*iOY{i|AP_ga^#=K{|e>wJ+nSX zojtZyYyWh`!_ds1-}N+20=;_i(8FM@W!>euy$$SS@Shq7ZaRU7TSYKFC--|l=kPU+ zdr3#PZ+_gg_AWCbuNC~ADe3|4(30g6H3FvkX&6|xQ7DP^J@~h;vLA(-rE&*G$`8`- zAaQ(Nc8`w7=AcoeNO}132s$@B{vN?y$|<&VISdiYx9B_^rvZgmdpzH4ol5##;NI$I zw|PP!ihwMvZ0HGwk%MAN-y(0;KEpQm#Z^vl$mfa5P#=NP=jbv__<82WW#hZJdkW^{ z{V%sisoW5`PzemQG^AJ>3T8qgB}v0iqpsE8rrb&{eE)7!7yj7ruK<2gSlCt2X^qvN zGP~UWMT}MYIw;@lb3SZxaQH&3J*9;JoY3UjWWI_E9V1@w(=Vm)5pPNaGYC zzdE4ZyCSaJ`BBpnfpOIHv3bqROmhZ^)TLhzkQQkRm*X!IYe*`U^{G@-sZp1@SMpKM9oCGZI)PtV`a%5MY zXK~_y2)B2~jj5{7srv9+I`4bNTw9@K<7cqGaH0?KsF{1_6dH?}kcLD|Pr>p@&lsRb zz|Zo~8gZEjIGo8}MR4Ubq(~Zo7?u)1tm>%`dcX4>DzHgTj_0)C?{QHd8Jv`Cs2B#I zB$5VDf~C|>xT9si?;{-W8$&zWSyR+;5-)7}y{V53YbFdSQd5##7$Uh3n@@rN8x~AI z6{FA0%!OIlkH_}4)Pvj3RFJH?zZ)%mPFR55DJ@AO9=`9SAxD=PdzU^f4-&B6vD8+I ztR_%@0ffOAK&rz+FaQ!MKwEY0I|Kc~z%9388wLJEhO7V64Qs0VgGCsAxbIo&ZJ!=? z%VB9}I&<|4mji98Y4NZMNJfeRl4PhzH3aLtbc>;xg0 zRDAlt%(7X4Yv|$Pd=fi?f{_pGo1UhDupt&!nj-byCBBpa()7cd@KAZ{-<`bOc_j;% z>8g=<*Qz&9Fs*-jQHJquduuChT>A<$DN^&LKgQlpL|=slFD$|j!hU?1p}igryOobi z?B*~LcX{Was$`aryI5Uw5LfhFf1kW7wme|_Ako(8vd#+Z`g_m!W%{MV#P@=*h#yn= zXcqfbc~jv0@y+k`z^{Yt{n_pV?;^G9?ZUq6&5~e3fI#lax_XOWn@Pxxc*1y6n!{0{D9=&-IuaR7xlB@>_5wj_$%`MRw$A zNUqutpwwCGs`ZAmw5YDCkLhH|RAhS_{krV+bOI{|HGp*tjwHT|J$Q8T5<{OrHE@U7#SczzJjekHB1y9q0l#; z-sPvWE&^7zHrjJ?;}T>^OUu0KmZj-Cnk++f9M9{b(zb*KSaR8`Slf) zp(AZ9u-hF&MTNJyTlIu1H#BmA?LCUye6T8*Fmf6}wkB|7kN>9wi#LvVJ`=?id<5fR zbPxkWwG>`^l~Rsc?o3M)B=k=l*(U@<_dz4J6rcFO-QhfKp4VaHAVUco&|XO|1ApT% z6)+T4#5{16oY;k+uS+-xXdp28A*m9wp2&jk4$21phBVEfQEC0@YZy+Aul0(ny$aSK zrk5r`mpOfiAU#}UcAyd4Fe^eTZeIn#ALe#QG_es-ZT%aCzfci+tAxTVpc13#kb9%L zd@BLh=UdhTufodP0(FP}2?Eo;Bv%BA*w*3~9xj!F!y1^p1I=tCiN~0RE>Z*%N^Q1| zswlcsZ`d1;1}VFwO0&yWUGa$S-vbrR0pi}z2x|w5u7Jb`A?S`4*pJywYp%-&GMH6L z4$}9?#vrkTW&`3$uvm>85#$GlCkNirhZxt_7=+zDU~bUPmPUfC&jWGL= zwq=gtZoa)?ncM9nW&s(ImLVh#u1a+YhO;C`kSNOntIzNU3EjO0v}+tgm25a&D6*x8 zY}FWzw*cBwF`Y86;{~rbdH~VLmcBPGFNr+Op+<|G4)xHXlE@Jf$wQFdy=P6ZK5b~9 zMS~giAJSIBxT5NirCzcm zG+|ZzJWTQ?GiU|Y0oWQP&D|J(9niItZocpni+bG zlK76=D^6_<#gJA~uhtLRad?sHmpnS>q*~ z!(j;EDTM|Vm}#5rFVciKqR{Sew2y*NYAjLdvj=&)MS3qx>HU6g?foqh@m*Bh-`D&7 zIgIoBId(gCsH$j%TL0;sh+gWgO;kPAs|-Xl&=TcQQU7ed7~O%q_|;x;BJNa!c(z*J z#AR6csz)C$2+ZeKOYq~bRO~cu){D>I4T3tic&?+dq@Rp19umLqO7J$sD(I*1tX^)1L7@ zwVd%TW8rLlmtGnFc5s=}1w6Ed&sCXCWu*uEPe*@!~3`+}$`AdV} zv3HU8kteZ}eIgx(SI@SQ%=@0FZ8KTQqZbo&cBpBgIZc_QN4coS807mf^J{rS|0Ry> z2aAE3<4Z^FxwbJgv70wd`~#?A(QG2cjgefkjC8 zZ^(9L@ZSeE8P1BCc0JVf0-3gT*F4gFuwPRw!{xeI(-P)fqcVJ=p~QJt#mo*6eQr+- z2J zxFmZS7EU($jA@azmxdlm@a9I&TgsRST*w9kxSOJGgOA! zS_L0#SWd$C@U#f7sXX$7!>w2tW1F%>xz#wM(*P%Q){VoyqFHfVyhFi~rXLx!rwdkO zjft-9P20_gIYm(E-!PhjB4$p^aoS&x6J-?e?jC(IF{IV|+Q3oiqi+}5gp?jX#BMA+ zK4_{0yVbKRsv-~#+&rno??}5;c}&x&TWZ3hNm;Og0RG*bJE_+Wt8-@Qo-(tdRIR6b zB#!ZTkd~#$l9PqE48W(0SN?=Ml8*n(Apgr400R^Ae`OH1{~O=UkW4&oLlk-C0+km4 z42OVOovSEe+s>Ee-qxEfS8=7ClMUl+h_Dwaf+qZ+1Bcg_Un8{y{=G=4pWmW zN~1RG6}vc`m?>22bTr!EsZG@0{L(o(wSmyFV|8Fv(G2 zZ1TELJMNyWE?RszZk|MH0n_SEp_WRMT|@K1QmH-jv4n$jqim`)oHJij*UHO0{MSh3 z)Q&YUde@)zN2e2Oz>DNd#NAGPmAJU|;ZHGom}A0DTWCyq>;7Th*gblhrB)AIzbw2B;te%=5|ok%dx0bxajilx&D6XTm(IjF0RMAs$`GgLI}x+Gbq5^J3R#|8rj`(lxS55XWc!vPV~oN&{4*g2N^VWNYz$*mHga7Y)nbtOp!j?ci4lad zecE-kAzDXs+nENUC zaO|q~A;jk8vh6gjno?`9>J+MlWPwIfE;%cF;GDe5vFZ^CVn`4s#_}g-R_ct2Rq@S( zrR<4(7f*oVHZZ)bb1%gUP5ERVwi|GThoYIvSzT*s z?q-xpNedehjYE&6<45_LogPU<*7jC5R0r|GA!q@FJUIvR=kaxrfUkm##DjG3$1X_2 z+6NU%v%(=j*EE$V88kH%L~bgDS$9O&-6izL5SA|`+VbPWh+T4|_89>-I+(GTnnb|N z2qaR4h_m|JOMgo$|KqiQ3w zo(#iM<1z4;A3My2^Ke%4;wk4(|2ggaKkv2BB3ez@RzHusy+0qXyFbnkzm3v@1!&)E zmI~*uT7+A=CZRZ9I5a!9XLn9%Jib>*5!mU!z0y_^lk4G~zgs2x)@FyH`24O#N2fJm z+s(eN;+_s+M>;KI=UG_yPOY?t7FO(SziT!&oYFLQ7(c*+A_qNvS>L; zhPO{UhYh0MQIl8>CzZlO5tAH4Cc^2tUS?jx=>FJR1W_2QN{48KZ!SIT{v_|i+1BHc}YsNA!a3Tp7$ckj`F zO*_C(UoiIe5+R%Y_#wO)p}cPIy~3sB;~G7VhD}F8HXn#ZuGOnA>NVf%HP_2E-#4G? z*baAx%uFhuH~BhwyJywEmtfk`Y3m=I)8xA;dgTD(I4y+F(>&*6p9^y@hRXvSHnqre z|LJZGK&YWRKVZp5k4B|SW#Pc8$2KD+tX;Mque_9L!F>8{aX!?G+Ihr1F-po@0o?}* zqsYIyAKW<`uY?;~t6Z+Nz#`++25o`c?+J;A(I029KJVJa|WDHFv8~(;GN5V7D~W zR=8)+8iVXo$}_R@CA7`AH#}Bjp8Q)Cf9&q1(kaTQ7cJ}H-QNJ+t@{22;brnRcP9Kt z3oPE)Y^p>Jt7IL+_~9PAF0D@XHyS=HEw+vqJ8Y&o&B*HR@BZe|Iq1r%U0q*o=s%Ob zGw@e8t`gQ^BeyPTc-}?|)1get&k@rbz=D_L^#s@E@nr)pU%{4q8x3@HHqT)kvJ^)n zhtk4PT79^G;^iQg#eq>CB=cS#`%t&muZYH2!;{5b52Sp}X^mrm6thsiNRt@6*u zm)IPmh>&-UPtthFqn>c(H4oxWvW1fBSXc&E6k+OWVw&PBT|;Krzf_ zNue-yTK@NMhGoU~!2nI^X*50CP-l!R5krC|^7n{jhCR#?i;x!T4}ybo`(e`eNXHgIs0;XH0qFOt8vWB(co4x=18doWPGMci-LY^o&q8PK z0Pp7ibfcy5kfm7&Fv&2?3-I)$XQ8#@B(nLtS|o}IXp&Wtg*rk@-j*NFoJs z(U6`C*EA5R7C>-O3!!FsTC2{*l7?FBycZy^zl}iPC=3m;znvO z;NcLC`wx%Pk>oS3hdeADUYFpUzWG)JHxZK(fD3?+_TS|u=~9SyI6hn+ycs@VXD}u{ z5&bKAO8g?S0w9sJ2QqMDf*}}0f&mv4NHhQt^d(c9%q92|$}E8^K9dlW3`Nwr5?ow@ zBvf=S|I3_^FirB_r<;{|r!vhp1Y;~23%Q=vDNzT(5CMktuHuchn6BAa-Di%!C-~9C zd4dEZ23(NH36r%ao+#5uM4};<74%}9Vd^~zZEr8vcOFcoAeH@umBEbYF!3NXb*zTt zEbF_kJ}(oylq;RJ0Z6x45Sl3Nm(v5uprV()?jmj|)T~KlawvS+mn%_2LuN|XIHuLY zevJvzXVgjz;U6aJGZZ}Pm=6emmoBW!I8ho420-Bah1l3Xz&ZPKoiELc?JsfjP93No zs4T+3PK=yPMwoz`Kf6h21UuA+^bR=`i)sxBV+8ugUuZb|Q3*gx3>j<(n-u1&AL&_5 zjLk||Cyim4br zz=q6L0cd6jl%Tj%MxZTah>XBEQ5`_&IQ^T(4hNg9o{-PmP@1tU0@h+R0yc(EcTFA4 zz9+oUp!s35w)gkmEJG)fDsey0@Av1kR<9@DkFJd3DbjCOZoVw9Y%CRuxi_b@KJL$w zU`ZYF*=n`!4l<7Up#erJ!%U~;e$D|H>^r+G zbSt5|Rz}D(QB&SWwk<}2KlP1HJygScJ!~6FLzEZ6XAd_bt~MfU87Bm92O67}H3Nv}a zAGB0zMGTs1WXKCwlyl$%ADhp#{IulLk~NY7*Je?Bk(<@7>wX233oH*smUPn$PB+c& zLl9qIRjA*=c#Dz6l6ejAdaQY>P|Imf=cV7B0j*)e?MsjW@uenaWMl4+Nhj?;+5#S5 z^PK38xbKpog-$QsPW8Km-1H*48gjEq?VdYDk2+WkcrYtIA|kp)Yh}#S#7PhPS!M{) zTcyGKi@b~+2#ty^gx9OofO#*s9&lS-;!oAt&@^~1D!RT)?hD8-4q3jEzjMyk%%<%^ z2%V{;@hW*AFrHrb%~Q6064(+WD_(%QdCitL>wh`z7S+DN`thqn7{3qA5Gb!WUH)>@3OW(9mgY=5(r~Y}27PPti z{_k9#*p~mQGe5WB)4R6TxRa_5--%1y^~h7j!ee6gFBZtYvH!?{?__Q10%O za?dV&KAP>toT9o-kLTTYxj*64;Lbbq-aQ|;8TYyw{0wQev-badFk%Z5nVezyM}=4 z3_X)z=^48x&(lx1az^OMTu)qi)*nb7K!BqaLV37Uu~rdqVTnK+yGi#H_a>i}pp=Br zFSmIb>tZo3jhn!FL8_1`UK}vRQNs?vwiU$Eol>~Cwu@4pyGOfqJW=Zw9z*#^Hc=CF zlH(mqv*|8UaO(DQS&h5ut4aj%^4=?BfUpcqj2M(4k*cF=#Ar|4XhH!X zK`JDs_REp3)lnTO)uoqF3H+DF(a9*7o>AZ0j2*cqDT04ac(o8PCxQ)V4TgBI`#p^tiq4?YYG zzZ%A2yC@iZuj<1=6{=bZo6-bwQr7PC>jpto{b&F_gIQmQ5_SDr?{4WH3mDVfUEHq)#Ft@Qz0%3Gv_b zyb^wxo&tQS?@AFRiOEu9OApS#%MvmB%2(ln_Q`DZP-1P!pP|-nqPY^Fa%x9491q>x zQ>eA^;6%xI;#&ZSy3rF!h=oXnArN+<#@0zb*)vBfJvc$EC?8!L5{@>?W-4(ym)S6{RPgo#N-XLY=T&tSK6)@ zk`1=ZCJQE1el&rpS0ywGfvZrYhOq!!4mYbDh^kQ4`AbC~ENrN<6RBrjwICh6)+3W( zRf2T7JQrROul1cV$YV}_9Ip`rJwdoo_!Wa?gj(zm7*BByN^BMJ*O{78*G6KVjkb*l zwLRR#1G9sW;$fJj_%y$li0K}>gOJw;1CAKky;ohO&Gq}`^49MQl0;?Hws>pz*Zccp zm0nMOswrxyXa0@Pm9A`h(o}znqh#L$2)gu>2xxCpWURCo-GSmebbsaBVyn(;`j%^VGJP{p>^ZUlm zi&~}Bzo~OFwvy9Yl?^Rd_#5E@S}h9QQslGVi4pXSQq`=Gik%V1n;0tQTtvA>r27!Z zCe7`>v>V^hwBC8YF6(yIQr1E1)<2R%iIFsodt!;$R7OsD4abgZRtcGen`&XRA16th zInxCkgL!gVe)s(p5PH<+R+G?~K!a;C;0P;?y+D06w;XG3`y5abzSH#2ls;G2`#Qu% ztU(+H=+wY|SEZAt!v^tyT3>q5&5z8ftHfzXldU?FUUp6E(7%KQ`BXV$B?dn0f-FA78+;xYjo^#$w5v#nigs$BgJFM2mVvU=Ybko01b_TgYF^qAa zSs=|m@0Mko`v+;ai8`_4HKWF9i_0SaR&w3CC(ZWc_+J1&j?;VmMT*iBIbT_8A8Fea zgulJhrFSZ7F67f`#nl~l+;x3gGBV59UCvEXOS0yd$-~+CMv$tMh6LT?b(!|9JWsM) z9NjvP#GbXQTfI|);}e$*X~w~xBs(geMA092Ux1O9S|`(})&eLHGcK5FOz zfoK(xi_Bi;7_Vvagr>%KaZ!moQS?+4H!4>9mF0#QzYfy z62T!c%{b3FLCGgx580s9G0EREucyNtJ`M9@w}iYSbM3HuQYB4?ZBp}IzF5DFE$+JS zqd31)z$k5Ry}iWu-qY$mmKC<-#inJR@{iBn?bi=iYc8vXn|o=_x3gmPOf>y&pZe!| zPOSJ3{~0mMuFl2_!TM_pRH{rSRS$nvp zh6z~P*Fa{`MI9e3eIsBjU$47gLHS{_|ByJKGJu*C;_Nb_%j6eQ>Gpj!X#Ayoi7IUS zELEU8ZPb;>_?K0?oWZX+eWQsO^C|Z zBb*qIIEq-;%r@E0_u~FyenZ7D>D4o3E8RGz$)PAD;f?O~yuzJQ^N$9#R=4GAcfmk)Xd(;3V9@2s}8QIs0lH|A&VNZ)0ol^?Fm5IoZL+k|aquUC<;@zmW z28!1oz^KUL1fQ1bzns zv6xQsscGYvzKfR#;zu={l_znML?)Xa`U0D zGZNKOp-jLQcKV4(vNAYirSj;FQOQfx1fq{43G@} z1%Xi{L=;5)Trm%tL_*7Q=_in<-F}8q&lW>7(c1NZ145r7 zLo#s`hK5h5VHqg6>gzp-T?=sMs9!uZsUBlzS>$ ze;H%>lP!dA&x;%}2kW!cN)C*JKR@PS! z3~jQ$MS(D9L3V6^W<h~Lx64PDP=N5FF#(JLoYY<|kYv=!~WwlVU57tLtS>S6| z8DdW?=BFW=meve(kp`(em|eGhEIyaLcD9qrX{xI#x77KwCU>IR0Ij*c8VpSFZGQl)d+S#7imbSS(WZ=G830d^bBO<3^<-M=}33f7+ht2VV zZLzu6r}!hZ=5k}pJ8PoDmUS>|H%ha0yq`SWK;Ln!#3m^F&|CW!xG>PBc?xFhTh=2i zNo&v}Z1HlnCCUyNw|UsKh^cE!;{}s&A7qJYEWya;!>r0KIia6rDc^x^LtE+{M-=Ny9*UeN}$B{98E?@A73s z;USk`UCs;{0}t*G!_%N5^}pcKdHHmse;7f_w+Rh#Ip!U7GW!|l6C^U9?Dim@M^jSLkORI6)QQR0UkRk zj<|Wr#dA@ey0f1hh2~RNHM8TxpGh*st)Pzyz@@jWja6L#U3RU$=fv+XhGx1gao42# zDsLxt>``~iO7eLkv{#d@zQ4H6VbTW zg%8Tl#h3eW`wPoRoidk`(UWpxX`nxa@b zz7A$r74(a)0it_l;VyxzK9;IypR(?l&q0%YL|8M77_3p| z;W~(Uh(USMWPZQyU&g11&;l%&)4eKXAHvZ^zKEgHz6N+AYM@DfXkv3bgVr(k`AG#U zNMT$F)^KxXi`ZA*wkC!E@h%I^0b(VKZkafY76@KpTMMO9Y(^6I)lh6$KFt^y1j{x+ z+g7IjoPyrI`Wpa^sIZ!SFkR$p5O{d;+`TT2Bhc7EVhOyNOvX}dWd%Asvi)$O$MXcn zE4fexk!=rm6yp24@b!i4hDUd?{$M-e&fs?6CwOV~ygAh1!Hm_h**+Y#y|F^|Qkl=(3 z6QG8+Ux5gNd>J0_;h^^mwuJgK+kh!^k#=w=mV8jA+n5>aB07=*j8Hw61kiA1OGVp( z&BUSyM-UQ1sQkI+;lgRG#XCV#B|@ch00l8;w-~8tzT5h?y$A?S;7oK<&!!NVF?fuw zczgz$Rjg3M_6;k}#|x+SLX5qp+%i`XxZm*SG{V3-L|!wLWDzAs6ynU#<+ge6IB%EfPpz^{ePoN`z5%jYC6KBz+7y}L z4+hYza`AuruY|A}p>)swls5Ok0M;TLDrQu4@i83-%5}kD3J+Y&A6pU=k>d$6=8)DCh@Sxtt>>pyM`!B%tRY;n%}m zUm|CPb;ZdM>!280v(!!2AawjOqOQleKuWaC;Opman{B)-8lW{U4+|1GT{JZcUmYx% zqT&s7p{ka17{?kk_o~ve=E7S!*NyPC=FIK3uOl`hL%>EU1%-pNSOVejr%rx0M}@W> zxAPZgOwfxW6rDPWH{u&?pO@JUJuOa>)+o4!Pz>Sr`iM9u|Ty4cx|T~ z7PG8bdYd&urM!bM(I7>8J%? zwvCFq{AGrf?XujLxh2@KC%mY4=Av*ou8jAR1SOX)0#RG8)vnubdh%f zzAqbIs_Y-FOEx&Q<-$iB7b!YVo9LrY%RV-E=nwZN?l>GX&R^S1DI7O09eYF)Y1`}Z z!h)<`GJ?))PJ%WfHYAN{cnhubZKVK(SL+6HSSF+zwO@2cI~S)cNc$<5$T8+C$F1x2 z?jhN_;g_>gro&Ag+Oj)ejevY=hp9O_bSqchNl|}H zTd%Ag>r3>9kDZOk+s%Ee9!YgCJuTYryPWeRySMV(Q@3hAhK*x{pNZ)-?t%=PWJ_11 zZkA&$ohA~beYa3QDSaILd}yL|>e&e|tj0whk5>e{y>kf|dz*G$l{s(z8rdW{yxU0Y zNc-3z*LWO1KG_I0mE2~9uPY91C=Okb7-sVCs>pMJsad97(29R}#H!*}x427t$thaXIrPpoc6>aZ2dl1s8#=X*R4l1^q2=$l^qXUbyBr$ zREx8kPHHWrb^YRwYl+%u?~kfXBCBbS)I98jPH3KLFV;A|ddv%8f3G~N$gwAGpH>GQ z03R$Cn4`)UzgT{t$dL+`@P`oV*8HSK9XGt8!(A36R-c_WEM5)T2YUtV7S5jv)nq>M zuTi8<9<;ckFQ9Xd0F=2S%&>xg8(3 zEh`eIExS51ILzDygI7CU45gI)JcnSo2qHQ2WMgR>za)L7F~zeXj}{>yZ@C4L+gUC<_w9Elau;8`wdihV0BgMh^HK?UB8Ch}gMi9;XYXMjc6M z-GVA#{X=-ZxDUa6?Ns>Usui&jSMx6N@H1?FNm(8zv;hw@IJhqjrndWMdh8{mqA6?8 z^peb+iS8L&@#9^s^}8W!@-%OyCr9^Kff+{-UZoy4qy4HEp2H95+l`3rKXV1g|H2ha zjQ?G%;Qar^ikN>h6}08B*rAT3WhJ0_3Yz-?1YX!&rAu*H()h2q{ zf%bjoqk&w}hm;}B!C~RJ_Pz&*g*pgh?NZk&Q^D8 z7%@zDm_vlZsyxkyuqJ{ZV+yar^)?&bY!14U$&8rr(N`|elfEjUKm{f;}f_zK9 zpW+n4u+Nc(YA8&R0>YMQ2~-XopU`eJKq?R6Ob@n-aUl7&N(m);rwK#HU|oZ39)ifg z)4?Govp0c|ZIhSK8&-f})USxxBuISZtYfSmt2~2Bvcxe+(npkrS}4KvE|iqP-jXfV zW^T)p!U$^(4mg}aF}`4Rb_tYU|i7TVB4fX zu=t!55l|>6ut*IgW;g@NPso@7oJdu{8W3XB5j@VC%wD>YvB{o5y#Nx9rFz&=J|A&h zw53*<`+EFl-=k3qu`t=oqBFQ?T=E><1$t zoYVx~;!DUFp-DHmsuheifRbHAjBr#Sw6)A1`vBS9zioXZmR#G=FXK4grdHX<<)_** z{Vr6YiuMV2ID+=~;G+;B#F+H({h)YZC|g3zC|kQJ+*-N4zc2riA(#6rq21w6yT9*` zv;03V+=VoG8f(ozL@ItWhCJ1x{`B^KQ&2)$G+A9gPPD9tgCWAkyHPUV_7uCP2=u)i zj&L{!3?2y@;BXGw|0?D7M}EbYCVC46IYB2|_BU~abjaXh!uqlqWOtS#D1P}AB~H~o zM3j3;V0?2M4aqHuJ%}wyH8d7?O^aB)OrY59_D`f#p4j<2%ZBAq>xMt14Yu7Q4_YtA z9b;5xQs;~RtyilD*}R^noVL&0@v+JYY?iL; zunjQr`y|KoK+p6Mi&ztfZ_xXTLEBHH|8g;J=G<*}oiyw4*uG*?eab@J!DL}0Nd?Vo zF@91fb2pN@_68UzNWbax93avug+A9U%v(Cv9*PZa)=(L z^}&*xQRe5Ggf3K_KdTWr+Uney?TY7Gr+!E_T@~%Ms9VpC;6Tas%ifLe&5cmk6LH(8 zCOyZ3&xLB^ng`X9H)h2N_j-Wj+cmiwtKqM4i0iD+NC&G{wcXL}v}>=8l{#;QQ}4Bf z=@y9RHhSMwWZOR%gttVJET<0U^`a8=TIG2_JEcD8qT`=`PBL_tvJJY zYQ)*ODy7-1ZK-l(i_L8_q7*u-l|PDUuN ztTMIf`KOL@eB>y#20N*9X2=Ge=t5Sq#STb%w~IL<)ciuB`Scn}@wiZNWLET)*uko+ z^kGY~hCu35T>ilQbq!-@*x1A!J*n+_X5`Mda=iybB9FPf%qMS9Mg9ev;}+o0qCq7Z z=jK7&tj)FHyp)VpNp)*xwWH6s`JMFgW%b2j3p93;*YYkOrTOd|UlND=N$1LliW9}r z>`HC99*WVaWu>gfv$4glXD3vk4ya&lpuU>mTqVI1bIrrzNzBnCITCYclkoKitr58g zwY*m6Om)ge`WFBC@crPl*aLm0zMAY@CE1g--#-P!PxPS_az$<*pm+x(){$}(&BH3_ zm<(OVM~~agaZLqbM(a-R-VNXBKf?v*{{$DD{~azE{(rbg$&gGXWrYzvts+uIXiG5m zz>fCky7C{4{&qUf)8M}vD#cjhmt(igEhgutDqGq}smW$Jtt_2{^3&?jtT?_nzbHAP zPIE4g(9u}m*QmXsQF%$560quxES^NpieepF)~#9CM9{9$)RcIsw1l32uGkTB?IvlB z-=^Eo^SGC;%lA4@E9J zgw}InvyM?j?e6ONGJA5&?w@ozCI<@y!!&)V1m~;4N;N2J*{3Z!37NOorAjA-fvL|= z4H$0bBAyNh9M0Cl*Z^yb?RBUdLK|w(o?Y;%qywyq+LAF`D7rFh*5l%KkvPHzS85L_!we5N_OHg-IkBuofoqKyE;Inw=oRhBTA7 z5x++Km=66{I#!#t@6I_WXakvBfO+7Dm+cDUCSt9!9kC?;ZFdtvKaF5xFm|$b5k-3QHKx zLKS?R$*~5@VL3y8Ok;*1>S2bm&N-k0O&a_#5{~59pC6ev2;*ufp5AZa8j3lkg8OX7 zh?7EWT_Hqj5XuxORe_-mD#Nl>i^Rf&R82LZIeJ!sAbCqD-VGa+4wKFpz9>j>21##y z#;DZPLSldzh&41nP`+WEOc|e`ER#AT7AB_J^DU?>9H1^{4uIS2uv{zn0pKw2RglsRb!?_|g_ zE(Xi75Q#BNQW*9me;DkW#6Kl9OemN=VjQWona%lBnx~tkVR8O27AgY2^2pyEA4?;o zUic8>Vh)2CAFGHmKU4-ZE;!Tnh&RSCUjGiCT-d+>gt|>4+FHRW;@BK0LwkXtb`U8# z&`ZfU8EpbNgk}|Cp2kz&US1qThl1^7jv_uTCX@tZBTNYLK@ir_{`5iYFG@^7d}zr$ z?}0qau$XA3W`hF8H0X|?!4vox*xQ>*(V|8Z8QUhp51@CPC#|VFOJ?zqs!phk zt0y+o{Nns$HP^wy^W<#r&&wz3M$}IB_vJ1B@7H0O9a8hBI%_jF1HW31_Ir<1k45MF zPkjaA>!?QfFIf=3TJw~riru?!i^xB@e({N{a_( z7SfjsdLd~+$&Shk7{$dYi`V~wSb-1o>iVVy80w~zv^T($>r+qQ*w)Pp7}c$SS3#SV zO`v*a;pFClw;_lrw{qI9n%m4^QL9y>zxryWwf6eTYFiwh>#DOZ$_Mg_+qpT-6T-{# zS)JEKkCz%r@50Eet|Dc9(X&ka{ORM6g0_S?Wjigpjx#G46Old5reR6gL}IsHBiid2 zp1Yy6rC3|ta zT7p^=?x3#{Yk5FTfn4AwUE1V1xAlf1AHpQx$k-X3*&_o6!t}<0$1kp@ z#m)KWwbh4~S`Ge&cw7yMI2vPdG%gWUrTN7ym-cIUw>nk<>Y(=TIDq9B{Q_12mPWG~ z8bD2^ijRF#*y`NepXpcm-zxFg24eB^h@#>vJr5=H6Bw||PJ}5KvX(80gsq)hanJWS z@W0`_bhK9f_WL#PL=E0V^}ZdDpV1>qWYCG!8BdO$R#7+nh2b;PR`0RP-gLS%J%`YV zWpV5a#wUfRZdIBmqY&S(awcI%6QbYlqiFmrR@;1)r01zg=rE^t%nff1&YPeHxk_#m z+{ta9JL~wnT&ZY5Wj0|3sulWC`%>uLISmfJ3N+63+M)0Qw4%893uW}K4{et<0w$Mk zet9;JZU7;i!}ts{q`RBjPd>~Ug1!%0^(9=l1n!$)DxJ;rNvcuQ{GQ zB%}Yro5a}C8T{HH3UT872X@8}%5IK-xg|d*-}wn839J7jQ?N7qPfYROrz@D4{tr{6 z%eEX>z=nKchKTP0Bm&41SCiP8fZ3I#y`LhN*{&;qUiOG>FEEPnYb}ViY1XK9bi6o2 z{;JWZHB+BfJzrc~4(I5_gsIe2T{~X$Slr8{xTY-CSavDA&CfffOh}JEQ++{;UMCi& zc`ZoG2q)<*xKP|lH|kbDinHRmTv-ZBC4QJ(333M>&E2FedwYyfKJqlZR;H>;KUaJS zl$Tbv;7PqFeJDtgEY#*kYFEF^ovS(JIulf zS_0>~uYvQ0E{sHCm(N^-Utp;i>*@TzuQCXT0Yzb z@+yAz;R!BrLH!-}Y{Krj2dYNLD=5!^=XY|MH=h}?%Uhv_v~Qwt6P^IN6)!y}eEmDvz`azDWzA7*x(L@24)gPBTy`{iYsP=qYX;X**ig$VeyaF7yYq)1@lKs z+@06RG7`iXP(qgwU=<5gMs_@v^=bK%2wuRVHu%`?+k9+y&9FTXfpb5QpiT~A9Du~4 z6oc7ivr#nMs+!7;oz_HteNLsVb zELGM8mTlX%x@_CFZDiTD%`SJ@w%ujhwmJRJ%*C9E zFU~nP8IczmvG4MUz25b#DCIh(>Wn?b80%rU>+gPWhvm0qruq6P=3-QJ&%hrd6cSBU6X z`_1c|K|N`OF59@-n^<4<)^lOCYQNh5BobB%^@D!cl?H%~L1_m<+NN{z zz{RTUI7(-Q{{}Xx7f;S>wu|UZ<|Ws8DAYfF^Ew=?n&>aW#l+}&D=+n_+%pj?n}T<9 zapxEV_=BsWH4i+G3`|-Jy4;3|G1v04iEz9wu|&-*sYVXVMdOy|zlG26EUg8OLCH3Y z4$c^1SqGP(oJjF}ux<_iWFi5_Ao}D*FOTL0qul%N+X@Mic~a!@$cW?L{3|{#cOJ@h zx!86D&Z$%Hv|QoXtxa@0kRBy4)eXNaG76}uM7z4UoKS35*NKTZWWg82Lwe3Brv@94XKP{m2F=Z4S zhGA88uS(ZCH=rwcua2CZCMyXPAkSYt+)lga zSDrrZYCbs;J5wtj8lok;dV5RgBpRCiS}9@q2u}juBD5>y{|{qH1V(8fa%}kA=y%ZZ z*LQ3D+L|ZGAMUw%Q08h$nBaw>5tsP z9)N!S^8;ENvWRQ@2`*(pV-!3V`~*BURrrI!x5MWmQ(!3b7}cTDUZ6QMzlWvijn`n( zV`hfY%tzRx-{|*p@e`ZGs{JlV_`+%J1A1%mJ# z{10Ui*8duQWXg2lQ^JLuXo1t70wsCak{0pyT=p55ulf5qU3%l@ZVaK~azOr3Ooi#- zD@#pL$yZjn`jfK8rlnA1DHROaE_KYT;8pp@QbEpKrsQQY`bhQRU5Vk3w1UcmWV2_1 zJ^j)eUlZ9I!A4S7&os!sdD9 zN?91JtooV{!_xsKP1X6FHDwEl0HfJSkcIi(^ngS*N&co2Hf=3U4>pJ&9CW-vVmS7b zxfn`cI;cfb3&IxeHX*G6Ux6hEzT5Hv*%y}3q2 zjlz-T=(=F$iul!mDIi*5J|S@;VA$EQYIGmcWbx^{Ur*tmIF@wmQLt@R3L&QW04k}L$-(5+POa+g~27Rxd?WV#$N4MvAik^vbV$wzuy{<)vRrx zPWMbxrOrAWYGf$_MjR-R`+}34@4Wh{MC{_qI`<7Xsl>=}92F(#^)+`3+V_V54^~8= zF=sH`y9G{|c#fZI1#$bd#Tks(0}1e;ql5rZ1m!>HC1qhTs|=a3N;)#-T1!@W@!|Ze zy4GaOD~!>xbfy%pw6u*c;Tq^+jja<=gJCv*X@4PiRxNHP+L1r5y-APVD`^yrkLd@F zv4$abj^+#}F9^By09d<`H6*#2PtY4!lhBh|3t6q|F#W1W_{ zr)I!HE5;x}M{60MLP3)5TKCUSg|~FfO_#=^hlgLztiXvwS#`Ke-q=+WzY>Aki3|wc zyzKpvKy^^6oygdC8sno~HZ)Bb@5salht% zf60Iw7j!fVp;T_lY1)spjf`;fB!RC=)m^Y;cT4pU?o!!w)4QTsh5GaM`=f-Cj3inT z3Qf&L00cv1J|SW0S^9v~Hx#VaGjGpETc0?xkvAft%6>AS@m&Q7B{$Y>JyE)Ty`GK3 z?`kp_*E99`POysL9Y%CwZp9i%p|vz-i}_KMDj8)ub!=@Ratn3wFKCvv7phL!g_Z5_ zJ=H$}JJl<5O>cbhZbvVWHpU-1IT zoqp42`To7WA0L>d*6j*THM)Wy8Ao$=7{7H@cSkQTH?(U&F)w}c)u7f%CfhvjO6fpM2(jC1#W(cNKP0PrH;b(Hgu_q0lb>^0?K0dFv~755^w#jz zp+=~j|7eLcx6>cCbxRGXKKyMQ3_V}gZN5xwUaDNC1OzF9^7JD$En28179epcB2|mu zyTA%2;K!bd)(|cVNGPJWA5%8+O=vQ_-C{p%T&)l`ZivI+W(Y2%1E!@vER z)5zNXn~pOxq*v}H(0+YP!AHn8MSjjV})0%G7E7)6?qA zxz>Pb&QjpZpwdlAn}?qn%pw{n7dLf>L0#lB`JWtVP2nnr8&E{ zP(V`VA1x9Y^#*R^ynq8tlUwWY*wPR!K!(o zzWo_sT}d8OlMi1%16)zUsSOD|KQ?Z_(AzE{LmMxB7(EFY}rf9 z{@1bbIR5&GGDsC5f~BD}LjjTEJ>wg4m#;aJ){tNNoOeZ+d%O2)*8jAAIv<}*b?NR> zGiyTospryW4@S(}2=3SHtrM~%6t{v2BN4xM?n7nt?U})SE zXQ5&Dr)b*Ade3@-5EE%-m`uD_uO60U?Ufqo|If!CEALQo@_H%kN4Az;2 zZ4I!TMy)bU7q^AFB&4O)(#X|RafOR@QGHlrsG|dQgkqB#970!#N;(mTk2r7(c-!xXU(w{c;*b?aNQR0^{+(dPtird^{lu|9V=xz)bL%}~r4ruyT%!NQi zLRf4Sz3wdZ7{rta&XLg}xmbY?HpsEboq6S~)LM0@O5v63gT~m3-1QOQP2^5J795NWimWdvTF6HD;<%Q!wtU;e7A~ zon`^9bhx^8K@fq7#6|#13R~|jDN$o!es~wcXSv=(ia6F3_v;H1;2}{Qkky*NKm$e& zJOR^yVaWj-Ekdpw5FwUOERS^-ke;kroXX^=@&T(KCI``VY2{Q@%w$mw-XjBX_>DA=WmD<&9QR7(oOk4GYl zW=j^1ET+iXU3d!TCW`zNl}+G$M64k?M|wfpK*dUU_c$h=Q#z`lFVJAS2H#|X7BhU z#JJf_&|%WQ*G^opv`Kj%Cbj5V2~9k9bApXG_cOxfw;1s8@}|TC8;lyqMz!K9UDfch zJZABSK_fB6Vm9who9|mYY8DEmlAA{EN%-nuZ=%lqQTE5;z&o1wtFh0;Dp(D{B#^)tpfDR3t05vaLl5=L8o9KY6_W4#R%ZqRXA_LME|l-H zf;d1`cP3L9T0sF?CN6?E?7t7b$0Kqv6J~eyeSum5D#@l%XyMkf{T7S--$O$=fxJm@|SQu0zQ{!r6E^=ovYGA zgK#UOxDr>z%wtG+;|qj+bPD}!cYo{{<_(UL!SaQ`iCdt zgxDE}z8uKj!rFQ{4$tGOz@nsSRhOpV) zE^fT*t(l1~9~g*5d?Nr4+4at$U)ohpemz?XIWL5=A@2Ulm#jK-{Q32l(x|p9g`tme z+H5_^X?mOvv8G|O>icxSbBloK(HV(nywUvb(-%u$Nmq-%sI8$Zmjy`x6pz5YK$ZgVi5r11Z-?}?vp1*bCCojZ*%2j zb@)}nO!@?h_o3_XTp;*4;8S3mjZ1hHUr>JFRUTCVFs;th+>oc%Hq`f|zM3telTxJX z6&q{*=uw|sVa}^9dX>7l6&cvn72kQZOv8*x4_eShsM2G(jlA|mEasIWd; zzty|?&GgY#K@FMIP82@5=-rm`)~#PY3O=+0YvPp8#|e~M@mb4pS;yixA1Czxg1zgE z9A|)?v&^zH<2uXrO$SHy1X$b&C?H0$oLK&$UHgWsFLm%G-Po(p6v})4Mm#Dby!g+U z@xM}W{tr5E*8eKB$kb~gFM|)=;ful%0w*Ij#PMrLPQ~^(qJQ{H8P{34%U+cYN$3)7 zY*Um^Up~{$(LJB4Qt>tK+I;zT@9H_{^^|ctP|LL7LHZyuok|(&PWM61rEkq;V0?C7 z0hdubfg*QC)0`?JbRFvXWF*XRH7MRG%P)R!MraE`c*d)Bye{?b|>RJV2{I$+e~yRoJ&zLm9@ zoAJ2#_`u;()11u@>tPassV~A4sETPm!`_x9+`k@qfiFBU%zX_J!gz?b8zqU(uCGFu zj=H;EC#xW>V*0O*gTr?b!5gI_ZK)o(l zqyO&Tm^VLWyekBxB;`?GU{{u_dJ6S87clAAQAhH2_~kvIWXk6Bef*m zjT9ux?V<@0@J=9XamEcZoTXeLC=Dwej^{-T$xp*AO(x_?MD4L;+GaUH?E9#4X8}`F zAX|~OvZirt40jBi3O0=Lff{~E`H(7lEyifXIhA-))DS{C6sz@bQgOVc!d3XPh9C=h zDa*ONPE9>wSrh?oWeH`(z{GygXpy#E;DlC0#IRq82P05CP@*yCqnx+&a8^`m3r2Va zVUhEavUXo4Ilu6Ex*HX}vDq{?H^L!M(!%JJVd3nU&STCEhdylGnT%7-3gJmDL?tUs zMH3Sc#Dn<5jzy)lMZv^@ps81jq~(;D+o(zL|IF_H)?qTP2jIqFL5RwmqKUv1gi2=% z)rke^jC(r5;u9FFoA?URbtrWmm&4J~79nLO&{-29rfIsf>lwM+IZI{?K{2)UcNvFG z9CuryDMl-42IBbOsP6`+=JC^I+=$Fa5`d31EkIPgAhLE#C-u{bn=uv1%!UPF7bZW1 zW5bi0l+iY;7q%`Yj3pJ7vB9(!fc}nzb}CXG6q+*yV-$vRoHj$+|E(NKASGr)7aS&L zvOle;F@!c3Q&%X0v1pt&EfTv1LboUgS5**pH@`3Tsf#yULHs=Y=k&VXjI^*6z2?J}pn#4RRlbWO6do8SQa z_FKwr(aF!YIAqnO^Py*uI>G-^BS+%$;;QuU(On%Z+Y0$&S*?uo_}zq z;gh@YGnl*6LP~SpxBdDuEz;M|iADHTEeEjK@?^>0tnTUB8{MZV+xNm8TiIvXI+D$? zl#g_x3UuOJJ=FOtqn^NewHBSLJ=L(#%)R~n)3Bf~FD!((g{%+gC}zI$3X^khF-Sku zI4Sc|ZaMrw(bRGp>AhgjB}?b&efKyIcRkmAem+AB-^d+HLESriN|9Fs7*F!q-`BlQ z&)uYd@!2C?*>B`BD0f}DN|os&=r^<-UMlc7RpvJsYj@hFrTMOm4mybnn28BM9W)e) zVWs0wZ)>_YNq48~1va&0&%cJ$C8yJskxjj&gp}m7RO96^)rdJzCNSL>t7IYeF%Iai znrp_a+jH0yPIqddPAiNiwDDh~+O5T6S--2MPIj$qUhn@6Ge4V=K=gufh;u1f;J$@$*USMO)&Lo`#>IlJZDNZxe*30cAR^dZLh)EvR|Z_o*qY3t`A2 zT)D!}qP#coX_a&Q_+9o;rQ)Yn49jpZJyXUMJ{9R=}xA1 z%J?0U$b9>mYDDV1uaG$TO~9-yKxVvp0XTJA4=B@g<54u?P%I=Ovu_skcYYi2e>%!{ zskz%p>fXFtE3Y5p7I*O{9i2}GHg(61AK-qqlD0*i;PtEVZahb{g1M{B_$5V~Z-|)P zgjZ?aU|Tpvi)_*Y%&fBV^i$M-qElbi*N^`On!h}tv;2KAn$*3q!{n~`e3r0k$Tw3{ zXy6XFPgUc2<`W!gm$Yh!{i4^iacb4?fE)qw_qN7H?uHtO5A-zFrn^mq8{$YTl#B9wE~Kd% zj0&3)7O$tN8iElJrH*7|R?qx*^MurO&;Q_cr=|Bw6?fk7J5SJQt&#+08ReQhh|nq) zg%z*p(R9C$#hF5WF-!I`A}GFrBx=7pPM;;|tZgVt18%lrx3W*Ll0O)v0A?471j~s@ zd=zzgQ9ESs2CL6CXafTDpL8}8SpMRb%x0hGkESnEWF6@mk|GcY$i3b&Hc~P=lPFFp zm6IjcE9V9oRg+dW(;c)X5&Q-=DuIs)n29RmG*5ahyn;Z*Fq%X&RNS7W3B*ZJ97~o- zHJu@rMf}8YfS{e>*_d!eflduj13ZvP5h)-Di5g!999j^JOib~aPtm#7jsXHrxYC@T zzfk*-RXNVaNfG|FKw^NB%q<9rw?7WJ$%|53t&jQ^cN&k1Aoe-4G?jr0+v-+1gb~#d z04$RL0ZpDujI7&9O12!0L5#4mfDTkvcx+$&H{x}+iPd#(B9Uw)*Ej=vj4MX4 zxrq@Mg;2fjAG?~EER7nt1gI1d?pBi6+$zvVRLANNq6{|5fRVCKAf&-=RKc=7sW|PE zgV#RgC_{`1!5u;UxMXZiKK;@HxavkYu)<{`Y$S9-lEgkm(d2QZ4y?QQVt*umP+8-H zBDj?6+k^t4$jYhB*Lf>abQCI-S(u5wdEru`Spiig3o)PUWS$5%ZUc&g;Mu9TJ!VUS z5YjVB1c5{_#(v5eb6NNxS8ZA=STW07bC`vpqU07TaU1y?;4o_t1rY0@A&>SYFVx?$bQ2*NEY^e8 zz%+;R=GJhCNKSQ9+`9|}qD0xu#I!QG(8w$%6d^)tMEPuzws5j4TGCIMVG0ZGM$X_- zqCyDmxR-JLdl~RYLGIO>4hsdq!B6pQ1sWDvz^_CYxl>k~?ypox`GICr!Hhzn$H4hS zFC(WJf0hm5riy|GQ+{J#GEuqrF=64Wl$$mHMZ!^$kcD+G2x+~!ZcU`^ikLXs0}X{< z43n})7Kg-qKn4A68xhzf1;!$|$3G?}S%N?IL%m*Y{=ECh_y3Bus}C6lKl}XHdHHvb z@eI$F{z5gD@7ZsoU!=Kfhn9U68k1jiKB-%K1%i=Z6!(k&1Yhx!&mkT5>m9GeeM`K0 z16<>cxdOy~=Oj!2Dpg}Gbi-26F<<0zVlV-83m(!}ty1ZNg~sX0eME5dW(h_SC%?!E z(j)x$ouzC3`aAvrAjHuIfAcMBbXn*){X^xVrA5N-uV?e~cL<3>@=LLy=mX`e5!g$O zJ$|3Q|63*5!EqOp662+He$jIJ_hZy>&ng-KNwDl-J8{-&7?(1KArAjG7^nqdx5=@; ziIBU_jj@7&J0R98byP2nXNq%B*QCqnI+{1@yri~$b1E-=693Fo^$SdVabYuoGXcHq zOG2#G?AK~ljT7qes;NzSk9aKQ1P@A)9^*`mUmsz(razTr;gW&DiFhQjU%?O-WK7ff zI5S5Em`tokP^4fNmJx6C)&je%FF3)rf)BRyt;hCM-b-5b32rt!9Xp<Z7hO04gL2UPu7~4 zR+SBwiOL&XGVc-M;du6~&S=KRh{Oel_=o^l3-ib>QFTzT4&hrXAt%>;v;jT=3U z+Rh4l^w0?@wRMGx2`|+pV9G~Q`ESzbCF|GJ?~yYwa0hmY_&X7QTfTVPuG^>EW@#Du zd2ORll4=!L7DReQInT{=b-2#4RE`>W0i*I!U%vg_1>6B#T1Opzd=t@lo`4+J_MlHQ z4qi8aO@GZgZBq;bUZU{u|1uyZ=!)y25&($j>C zzl20#bFxzcZ=69HA=+Zx#w+xpZP~LO zlRZG`YgYGa!$`&Pk1t`D+(y5(ZK{+;ua2CZZ}0sx$Difxw<{kC-;Drv%n87K=A1l@ z9B));_tEzBSJ`= zI4p@mdh(5k4QLw)`{ftiZ^Qv-_ms+GRQ1kHjVeGpp?|cb z?`LXl9B2%WBG6Yw>+rdC6hnFwB^4aF&Zp0VfqPdE*If-4pVhT%>1@w8Mnz%k4#CSX z``--*>$Xw+;zs?uU7bAz&PRx(jRoUg+eQG<8^ka}ehMmDwjeunRkWVqH{l!@G4p>$ zjQ^F4lZEBKMGU6@V#@kgK5aN;NBD;r+<~(DGWvtG8~84u;qE;@rVU>DQgpBnB;5L} zlE^@;fnZvsyzu~0ae}1Lj6uYy;&Wbc0{$%g?i1wehtsrAXFR@@B*J-=Nl=5R`y$Km zp?6CHmOG_KKPotd3#al8W)UVVU%TvZBj2WoK{%E9y3vM(B)n~=G23t(3B_%z>x?z# z;A$5DU!j6_7H1GRJ^jh#JZFQE^t@9}ffOG~o?!zaSFkwF@@N7|9wEUF zmI8=D|DSN`XUigHcUhWCamr7aC?x2*mB8DwK@#9nr?xt9aM^%5&5`pl}suIF*7!mV*dD*l_m02MHAVFoA+8>>abtCk?US1Q)L}q0)0|v= zIs@&7P%&*Gwxq2YY-e znz9}Yn@WsuA}wj?XGcURt^Zz)w-u+VD5cfcoL6JyO~ui~ znZlqeQh(pYD;`1}uZ56A!u@P(LdQ)V!ZlHeNswkuB*H<1$iX1RKv5`6tUVtfizOyl z9ak$L$brMaiBDck08-#Sg-A3)X$Ho2rNMv&7#7Wln+3?9g1xKcx&RT*IomTF6I;sZ zPa(qjGCN?!4u7Kb43{}sMk`#Nz3rnWrz{uPW}HTA$wU0Y5zV0U6&B8dVH-utQ!=2I zzb)#+2ZnZA!a{OQ1!f{zWhTP}339^dRUopc*^HILQXUDaxJ*u#x)2fw)NXh^gWS-< zoS_M}PVOk#5nodDX=8JW#NJo&8af0Tyq_L9<3}*wJPDM!6m$Kr%6fHP3in5?VhukBw;P2j{_i zLMjP7UUY?q?j%qiR+)WHVXlLwXdcbXTd;DR{W|mvQ{K)PL+CF&lV2RU8)OP(|M|aj z63T(0Ucl$qUjzTIlXOB1!Mz4FZu#PyziJMW=NA=2k-}f?6{7nMFjAa%J3s1n`Z*+y ze_edE*x5TK^?_Vw-q2DXJxQLn(@q-AHW}>G=H3*>j)Qk<9z^fEzusAKv^kqUMqmdf zFx<72=TO(~k?7BFV_LOPytjA)2XXhXm!vXTR=TGZ4xa|4et%o^IMwZ!cM<7kqV^J% z+X^8H+Df3`lpQW8wVJNSd4-RA+bOV9N6_KdFvvP5> zMRlw8Uu-WcsD6QB@Wd4rSV)}5v55Lbx92}hI`o1(X#r7)slP6cR<(U>!tTZm=>usQ z+SVC<0@O(Ln)R+>JF;1lin(%6^b}wV7v8q%_aX<67T_J_FcRDmuO`|8lxy&YgVB z@A#*Zm%9WkSL=OJ`!LUWM848talut;B3)wg-GuY`=HXF+#Q5 zyFsBD%BtA{1^=M)yfd02HATB#$<1MN(0h@?CY1InNl9$)Dl>jBYAkJNadk8ge`Sf-+lpArxlKUAh3b_d;9bZ4 z=#I;EQ(va;m4h*yJNI%jM85V7OLj#h@Sm~aeeOK^gviE%%gCIN?YK;zUdw^8O z<|f0#q&JO*dsw>xm&SM239U_cmIgty$Kkbx)YG~8gIckEbBl8-4uwafVP)z(BQ?PD z-Z^ruZm9gB`~_gu!gQ8S<3e8IO5Jmq!mF2ddEVYUIRqlcFvv;e)r~j2qzxiAsm6S5 z{#IesiCuHdvU_Mf#o=I!1_>IvHB6YS5gwSsR$vW%0CzjvHGUN8W`@P^TA7)jE@vi3 zAnsCyfGTychX`Z@#mDzD^bx8gHv<)4Pw*F_n<+sCAXq?z8T!6|SM?SUXf7q>m4Qx$ zu+b-3JqRpJ+yy2pS~esCOj0?_6fv<*dpW4g4x**9FSih303#5i*x?4J7QnkYp{9>K znh0|Sr>SQG;Tl#gDY&oPxLQurTm3K#m&{iNJd>?wvYI)8|86tkaY+4~9}+G<|10uH zU&R!R_1dbyJqZ?3h%#LnOCEYEX`dW#k6L{I*{GOtY6Pi3KlO;bdp4C=kWZ6tSi6AM z0pk=h*J_+hOMw^F4m5WWqbhJlM9xmoSfvD<%%-WOV8evJ93&e+$m zVOZG+NVb%=&#=LKC{os_16hyBb4&&_`Ka335Ckn!f`YhJ-&K%hD>ghXLE83LpXb6u zgsh;~t&I7;3)!zQT4PGF>f`~GK%jZ-C1hjC)I-vt2oBUsoQ`DPAiduPK@UJMPA9X_ znY3oRXwMXvq(n}lf-qxP$e=`_O88DDv7&X!NsfhJxCK~e1<5()_*@%>+*%c&Nn-5x zDyvmPA6!Y1#KMlux)o5slG{W2g7?N^5TDU&Y2oavfo%B8fiZ+t2eGaJ6~ZZxfhJ7! zU!jA_X9UaR5>Ae~$i1(ykR14(`jHW(yb(oB|8{psBXC7X1Ph0tjQfs< zd6g*+%g99s{W2L-i0Vv4_kip5X^KIehKp~bB%1b;xh=tj$cu9eDQMV1d916S1E;gs z-^ci5wM{)s0Zc>Ld2>3rN!We{H*Y~2*fmip^4Nr@Wg?YdLI&i{!GXZ6pv=t zTfqUZsgUujDe!PzD``?G#{_A?i*qBTdtqlsD5X4!^IJ*=qnTL}OCU1PNsSsth6x4m zSvQf#`*M9WC{dv5Gm-HzNu66@^^-YZ3@nE$Bz6#R3k}W17P4f|QthSyNL^tlx#!}1 zuq=L^2{IaOlyXUXq>!mNBL*1`v1!MMd-j*~Q7Fms*4>fJ2d~x-m2+N`N#T94K@g zE>&%<{(R)$?EJhR>BNN+Hj=qtwEpCv1s9DLqjyH`{9QX=uqCAsD8oVbiXN{Lz-+k7 zmVa<*Nv{37mg2Dg&3uvEJA5w}^qrw5!WXYaf4?28otdUBr$7SJ@yQ~$HgD%Z5v9NY zTZa}p4Vc@|BQ(vxUuH0k_>jZ)Pj(_nqH&4H`v^QvmGl~q1>umDo|iy!ehdapmbpE- z#gXbA|6~2_mUPmkX(fu{zA@hhW=U*~5IE2BtS_|Kr6o+{KtuLai(1kyYo#(l+%`QS zWt64>V`GLH6j~m77+RibTEZ!BkPIEg=T3`DHsx$xTb`G*FxRm8CKRhcFEER77sc))CEN{NB+bhAT~A#87cHW>Xg7&_ zlJn3*vBflb5G~1XRfb1R1_a>ww&NREVR=7mW*NO$c48hJ`qoZAO?H|A`4-sNXj@Di z%r)(X+J)CYM5pyctMx>9!azzYH5l?8&*hbA@)hY^cEy_;sz>KO>4A;a6@naK@wF%i~HWI(vqAYJZMFivuZN<2} zKXT3+R7RvPDeEVss*Z@%|F|&fGK#q@WDRAVSgLy~w<2Yy7A^sXoc;V~7>2T%bO2;d z)9o%BcTEv)^wvj1`!vgi28^DQ;HJN&L)Yxml;Z5yl88&=7slRWk1|=Z&i^2%0i>g< zHaexIy%CzHF!v;3>gf@!6hNMIS~qgyO-Y_o1}MsItbIrHmY?V44Y;!Wl<>gC)>*$S z!kzx~OuBroY%ZS8>mBN8(_LMRZr-Gde3N#+EDf)p>1+xQyn~y3*EAFG>+s<7iz&3T z8RXj>vE5c(JP-%V`2OJuvs!3vk(izw&1(J1YeCC@f)(fTE!8R4jE}F*i;I6Sr$-pN zNlu*F;$H!9>?kFYZ+&e6U3|7{>-gcxu6)VwePGJ76G!}K?D*d)IRA&~kpI#={TGNd z9R90d{XcIj;%z+4yp8RdnEwSL&=n_ArmgGO6CEQ@BCNs(;xnA7P9pwTIqO9x3YKk{J#+v)R((2|2 z39Ih2;MLkw@@R6rPg&9*9((a^4gjO!sjh7@w>SByUJDsKT@+veq2Dfu&nq^uUlz1XeN} z93Dt~%9>+1#xSd00~Q1!4aus%AEkmFIL9l3TGYDANVUH*ICJia_!P%nmSgv|KggQv zH^mXe3Ec#I)on0Fr8#VIXmXNPX#{S|bO~3M+Q(3^PWV)in`&f+V)a zm`ZkW80TI(+DlWYM0Cm~r^MuSmI7W~t@l_TYKc))Qx63W4@ycs#V}qOCgGP*&^;!5 zcuD%J;V*!bs1qfN7dSY|+Y&7VYPT`GZG^f4yGZEl-&3g?L2bUX@?avzy?(^ln&V;X z1#5lT@I`)BqKAFo0w5MbE9ti(-$Mf7Jn}zIP+8bXG*GCsmLhY8!?RaG+2vJ5)P}#s znkj^srcYH=RdC7HE4iBLQ{mFhI0;ZrU}hqS2Q6`@j51@aW)YNtpsKEc@|Vt~vA}GI z;N{c=@IIHNb}bolm=l6yq&1xbc5n3|)kSoxQDG&FuCUmC&sY+Ok<-F&1_8J3WBY1b z7!RhY){|S%PS!3#Rh<=O0<9{(oT864fe|KwH#YUE{Titv;;rMcoK%M_Fo`I@^T5C& zvC+cNAQc%mQg_!NwN!N{HA9DC{ndeNb<_m;HpgLi#FA*B{iZ?9eY|(0 z*Jl2@iRQGvbzDMq({$kIQRZ8{x36dY$}HH0OBChCmVbqT3s{CRp_uWhzMUVF39Ym! zm=M^?c(4RnDk?hH%mRSjbnkSSetQuAqrKJO(ACF{fdQ7beI5wRxaHsZT<=(3+wi`& zujto}iiuNr<6&Q+MP@x1aYPwqXSfn=?zxwU7_O5+_6Q-NMJ4&3$WK}d7;zZ%C_D8A zwbnNo!FH7<9ZSsHXPUF>qo!$g{AX?xx6j@qw83psIbZxpyaLA&H`tdl)w|v9O$`di zWs|T2ciE^uyXt+D{`%7XZBISXJ7_zk zxDnnB=iN}x<2bAZOKMGaKv|adl6^e(ktDh2E1>OOBzC(OXWYhC@T$XQOvkz<-Faw~ zZalYHJ))>D2V7d#rjJZ-o*#D^jB7QyanYxZ>yDje5OyJVCoJR=*sQ>0x3Jzs7tRcy zo*od69bC*+-Ubo=0tNKPW|EV=HAIty`6Bj zDQcar+|xEC<~~vy*#?+hws+>&U5Z*W+|wwh;X3J3X_CvjpP2hHu6M)q&QV6&^Xtic zLBE8LKGHp5ZUSFtOV!pE)mnN>`u)Y zv~@X_vehz&UbB$ZLiP!M;%)Ru$ZXXt<2Z-gBn7`+- zYGgRR%R(A^^C9`Vw}rf4+gL_#rJBB(Q+v)gNwf(yeZ*S6N1`fv2hvgochte7;UMYzNu%3VJn;5K zH?7$4Jt>GhX1(Y7yn3lz#aItTY-?>v9Q0P`+z>0z(I%`=_i`%vNuIFvf8P|;w6_n= zijVLGh~39~ zi9)I$d+>e{g|&u)Vsz5ug(Mnqat~lploD0k5$G=>|K?+~)g*N_8YD@qLy+o-=}|N; zuLdROyur}{Z^6<=wC(%7N?0dH20e5Kj2{3}1XXYE2w}N8Xh|>|0IAhd(Eq|DOB+-a zp8y+BXZ{SO_1UT5Xks#AxegL}B#%M#D`^g63=4u0PGnO%!8-BNM=8?OuB99g>#cAe zmXyG#p*iw50|010z_SX;=!5bLgb(91b$}Nd zov$StQkjF|8^jTk1rZRJZZd=k>k2}O2%7y3#TNn@G+W2Fniq&dMHkcxOcxe0h3y6* z#R|$uhtNJW{MaYF8+*RUka>4}NDF3UwQfvH@IH)z=ZV--*wPN6v&za7;WQd8Ii3o{ zL|0xN2t{5C&KTt=)O=Ci>>&}sxQ-{H)5I*kYbM^DL^TU+X;@x~fGz$I#Zwh12n-*l zS<^Pi8y~^52$BdTBesUJ7YZUXG++wpPO>MF;8^G@6pX(V3euyY7vRv|$RXx;}Li>5)>93$5SR!%eG$|4)!sRnK&kb7+@<`CRyQ<7RuI)>lTVTd~J9 zKy&$JU2?tC0LN{Lun`UX_7|?5-Qt_J4DpiPmEdJ}8KAF7O*Q(ak&5lW=>KBv9fCv& zxGmkXZM#m{wvAJ^b;`DF+qP}nwr$(h^|~j0BmTJW4mu(;BXgFMj99t%THhiZe`rQm ztPuY~hi8x4{D-Z)SO}int{^h!d9}#e$Ud&*JtLTFl`NKo4Zqzz4cy-l&m%uawuLeM zv6UpEj;p?waUBNhT;mvl$;D6>>esPjmZU39l*ra2S#_Tkb?3x7n{8gw^5~IyQ_6@f z(bu?>N$jl0c+=9bV#4{q_ImLl5?0Z`cg1#w?e#G2u(R5moc$!i#>+%8 z!o9DEwsd5=+R99D|Mj0>Rue}*Hd^{r`Cn38|v9Tf{J1(0(bHxuQyA^#t8E~zh6=Og& zVo;AL;-BbaN$NE@{#+;jlXzA9 zq{5;&AkD&pDQlJaURJqIVWjkUQGZfT={~N(2ddi80(c%*_n(uO zK?~E?^}0a^BfH3EcVlRg^QhK{5Y^Y3i35Wk*Wj5EU(=o&fjN%U(07>0_*H@8HZ?To zc19_K8z0166)e>+ilOv~uJ>>Y?q62pnkV||0pHN1vm(3C=bN-TN8{k6GG#>=71ZQG z7}cKqm9pcUAReFOqZijp*`UJrX^PYnnk9waeMpv@-fKWe75kVguL@akE=O0D#y3`7 z(!?Ns!*)7&!6|M$@m-_HppP{eiSB<^6#q~7oBzdMk)-~+C~1N1yg+>dN+$sDe+`z6 z$Nl!}XZzVnv%GSQ>l(rpBNxmxKolqP11Wb|e5}x!FB~d*!qT`pe>yK%rn<{1H9)sf zTCxi>B&BeZ7-TVju2@PP8Cha>-L6@_D}C=Rh@{edl+x$5S}nqB1c(Ul(bL!Z!%A~# zY|=PO2c3a-e?P9g%c9zm@7B`^EzN9QtaZjyvt0{;b56V9IRG1Y`~ZcRK62C_czh6! zkUsJyIz+6>n{q~01NcB}-T_w0#Z3eekbMGsnq~*dUGFx-S&ic*YAU@0p>{Q$HBAb{ zU3)B$!yh`ECI0$-3u$a{Xy4nw?9hI#7PP>&ZDgeQ7G3@qgT27^w`USko6A?&fS?P3{HC&!k#ib5mN7E(nmP7K? zz8St5FqHAK=!{B6K^fVtEhl8t}n@=X($;2X)eRG-*fa=cKa~H z0miB8uo&)kV*HSIxB&LrssC4#39tL0=(bc0LZH_W?-~hl1<8 zKl=B#GLx7%9~ih=2nI}1;Nmi$rn(PIF8NV|5U^vl@}Tka0`UE#M~YvNhgOrB5+Krp zoP&IDR!0p7kH)|t8t5D1tyB|V(wicvBZ&KlwdELyQz>T{o1;eb z&JT7_xf*@nKmLaUf#~2$&X3(toIBUH(y<<5Wm%V6!P=o7f^B;gcOE2O{tT;wnyGcz zIwWO|P;lAGJ@^ccj2KaE5t#vj=mE4i&af3rX24%W7G@RCsy!fWZvmH<9?ZsA96&1V zyS4rd9)q!%4`B@JT$;7U${cn*B7jHDsC;=1jy$9PdXZ9ci^4wZR*OKgHh{RQUYj3D zp13jKas=rGHfJMLiV+pJ4Eo7j>urL_13{!LuQtnxEUNqff?~^8j1h{>cYm?aZP4yX zR`)tfQaH&j*_^#qB@LFfNOM8Yh6hoAj_zD|04zMgJ&Y9lbVou`_57k4^xO*tykM7pPm z7?!m&adkVU{d=y6=0TfoU#tVlcU*wY?t$m|r?#6B^8I&x07cEVTq;mfN-mgFfLQUX z8-n{&i(cf6x-^SFw`&$U3BY|W>xn&YI4uHSE-Dd+e~Z`Dri93!FB)t2Z{%wCxB*n6 zgaVyj9Rim&1S?o+taUqhE)fQ3{qqY~{sSvQrJ`S0?$tdxq;vNiAJAKI|t;s5<*_V$e;WoAq z#oUPnv|bU7et!|zU=D4+d+tQ}SCz6svA(bR~?+2q!eHaeeVyjo8sJJ%jI^FBQ&%siM?aEV$+kzU6dYn}$65`$&pU)i|UfY>L+!yF{Dsq-|L zC6Bq845K0As=tmP#)O19WsF?^d&MR;i5%N!$xnCJp84(=yO*h`uo|~7y6b+ z>|>tkeA6ek@ZoiGq^SPved^nd18vd`;mG9|>qx!6?iqi%;o+#Drh2hWQS8At<|FlN zwNUOywgheWk9FE*75rIjpYTFaswN)M`n;u0LDUktp%HkV8%zWEB!f_&pV@*>v91Mv zoRGf}SM9H?luyZ6-QUOahsUaDcVA0Ul}iR!XQG-EsW>JqNAT5uiN94yHxPQ@q&HG^ zK7J6%&4)GRpZQt*I-^}+p9Y+aMN~wo zNyLMY!E}D0KKV1Q53zaPBYpb~{7MRn^=w+xfD^_(6oN2m3ec^gk0sjuKUe#$r3_=n zcBE{dec&cz5#+QtgXk1sm)`Pv(ZWaNLHgUQ@BS`ooun@W$LUXF1|05b>SKBPWuUsV zt1>n#JlM$=*?)23CnJ48fa;FvfK&bO19{)ZK|`^Z6V}$E3_$1w0;0yNAS4n}&~wI; z-JuVwk$3S|FHrV$qU%53N4wDs^3-jeqJk%^N*Nf70#E(1qD1H?n4B+#?XfaDvoIDVkD(cM8tlsjak*}Q~=ua(?#VqP$(M!!$$qXib)BjZ?N7OwJV3YtQi!Tlq8&7 z+h<*c)FBGc@)BOfO(2=-7ZzUM{YE~*uvGx$-zPj*oZN#0iBT2Y3)j3`q^Qhb(rOWD zTR|z`(ZvW)HZ0yLs_--kfiHoE+G@CH2ohZ{f~K;oCZU`ZHi$M(hykJ73X&g%h#_hk zEU#n-QZ4}U@1>jtQAt{5pD4fyL`f(Uzi3HjgI#s!v!x;zg=e!P`~3X1jK@V4ZR+NJv&{S7H8pC-ISwEvV1q_fY zhKwnM{YHP(09sJ?uZzkk! z+^9x-M z$~Q!7InA}_%pauNHq{N-$L$6NktENN6+b06AA+)rA;V=1fiXBr)^-kOz1*U$I#9!4 zOipg&OqZP6ErqEMT?%fs6(I!=UN|`3iV#gq3>Zi?M9Xr8gOUJ zrec?p(_#`iq1vPR`x{3xveSpT)PQf;1K#|t!Y&z%RFcr&$Mq%JmfIb>Hx5H|W_S+e z-lajAiw47QLNv0E>a%{JC2RF-GVO+dFIgF0BmMC<(9jOnzCp+V$kRW4f_%3bL?7HQ z0g9V|(OVa>7zCrylukr0gr?Vju^yQ3b+{CUa6`9&9 z5XScKY88G66~8_f=_HzNJ?86v3~iGbc^chsJw~ajTK32LJ?N}8xtz3-fay9iw#^nk zl-km-j_HC1Ngd7)h20hkz-eTh=KdBJct00-<6X13hT_tiE8J|#94&i1XRuBD7(NSe z|K(_?EkNk?v@LNsviDdnouKUE&8fkUk14fvcw4=w zlZsTHKN(ab<&l*zwrd^HUzUYY_*jNLG&~T*#~X8*!4-(Obzjxe9esGA-j;GO7?pun zzYeJ=3ZvCdvVH>!H}e)od~*cPfz&W|`(v7P#2(jy&=_kGw?k7Gqn=H}q@ev?9lCiX zyKUEKy4#PazCFx^rj`v0$39~<`gSb#VNth0r0)JjneC1=!#>v{R~!CsKF%LmphBUD zyCWkDkGcX){TSC~LO%!ht&bnChV06bCl69QVU^)FPr+S@f~!0+ONsJnvD~|F~ z7PoAjg!}3L@_B&R(HkSR_0ZxA>SNq9^{XfUO|0L1^HR^W#5^If1$^c)J1b#vQOFEa zOo{ZwkO;UKMvy@AJnjNZT*Hgt^GV@vAC+-6sljzDJKBUqN=_}%5hIC_!*Ld7KU5GM z+m?S12RPy1OXI4LdK?F752>Dq&J=~v8)ck1`6T9|}Z`?2d zPwe2Gp^9pLQJ=VqF=mpKia5Or{PEw5x2(XTo+MgF8F?pq43E5c0X^iWsFMuj(0mX`+57|W07xsT%08CXv#cH6K78~QjKZQ}Xbq+Gh2%)F9SZ_wlF617C38|T zO=Q?2@y~}sSm=rr+mt=R91+DtJW&evlvz?u;u0(lWvG9f5HSpw+^I{;+6(uZ3ROtm zp5oGx$eGq-+gzm-pdwPvCDfvZERe7r?1+vNH>t_00+^Hd#VV~O#3Es@TNvX{%*Tuh zbv$I3%bFUg%l?rb+%94ZxJYd|79Xpuh>s?yWI={05yJ+-&>AD2A4#-o#RCJR36QDG z04nG98?+5GF^3%@s{5{Hjv6l`V)o@u=(U1C7>e@A-HzfRKbQvUvePrG7SQ%5OQC>a zRw1U*m#ByN`{sT15@CefcQr(V=r5`Sutu$iCTcW7!r<8`0g9wU5wkE41 zuHm|tmJ-tW<`F$69pF)>r)MCjmy7>X8FV#6CUR5-!YJ_9;3gmvsyc$smlgjyj46## zM{w{bfeJ5`2~FL)gw983`5Q{2Tm~4I?;xKweXh7Nxt!l!-W_l+$c-4x{}(ErTabpss=?|2i(iLY&>63X$9%ls+{V#wLjV8ZqSEDVYJ1zi6Gki`f8}& zoRVfCoT3039+9z7Be}nPf-PXU&FA!@^fiZ=xymI?!B}Z?2z?yg%u?1K>sHzD5Lnsg zgwii#)KEAn=NN(Cc$57FJSlE&Oo-=I?N5{<3F3r843hfd0QcCp@?SOGtS3jJH0oSE z3OyTr0fmP_%uvuTeJx)Sa+2~;{hY-}k}5EkX-=7*QbI!^Y;E!28V#jBqu-*5!LUa? zzt4QPdS6LlO;_^92rNV;M7K*osKI1;Z?@D#fQ&`Ns8#e*iGGAldTz+J*HHU@cr{=0 zPd$(V%kx>o)z4Z4eeN>|4yeKgBza&5NSZhd{dv&YcKN9K4cGZqcue)S0q!fKa~~3# zy!UWa#OW>N{^{_kz)4!gC!^W%n3K|Ka}t=5Y6k}q^!Zqg5`uj31v9jD@dF@1tVq{K zELK-FwvR{z&pEa-L&e~7%$3`oGq&j+^|X>d7HGamrn$T)(bv?`} z*sFU<+M+XkQ&*mz7%z6-v*QypE1EE+P4Qldv^jy#(`(Uwm*i}$mOE9}i3!-j#UnfX zx+vt5e2j%&^Eu$>b5Cs*P};2ihM0ru))SZ+yaKS^y&*rcOIq2C2BgDi-XM2=cx9i% z!b@nTZxtKH?zqnt!uHNJu|0Vh@8+E@E`mKw>cAb2%B|$1wulk{*Ho@6$H69h%bhv!Yl`A~c9n2%&SVirf-%{gYv4wAMkI2W+Q}=RAWbYV< z{J;rEdw<%5&C>WXq3a&zu%;~&>Fhyd{Q!CERgJd)=&;|M#J0~W5y>TKLuIphwcT9* zV4?@U?c&U8av*Zg^8Q|Jz5xw(*c~rT&)rd&70dTaT~u zd_L2)6Fs~fGi;KBA7dL$H9^d^Ytu4qcu|&rs(cmZuS{QlG3JZ>Vtllcb+WZB%}aJV zwJp0CV}I((72g3V!OQY`^|(ATeS*yXU|^XEwEY<&$-5~d^`l_M5~5|Dj`aZAXrm)A1$*@GWg^3S z9sEkd%%f+b9oL&QSLPp=KsFPnDmM<#q&tpR)S7D-Hnoi-@|UeTLh60C++*y|yrt^b zl>YG@c+GeA*1m4g!S|~m=aRpY+UtSmVVm2$B{mLuQMoc0UOc&1bo5O)92!ZJn!;XD`D7q23C3<7zvUT4p3#skED`TQwKM-sF!Q zz%=kLc-3NTid$yrxJFUE$EB*8rBf(>ZNz(o0;Aa(y{Dp%W~zn?AE3pCvsiohvc z|A~=Rg1-_we`g4D7@r4wUa9tsx*P007q-Dr)%@Id?DTd>n6glbEn1cuui3czC~2ZB znM;lt8DEGfbm7R>_?)$7BY7zZJO1~V?hf<8kc7(P)Ea{-o@Ik{$1Ng7OkQH5q`J-f zLu-2H>9(HC?F+57hrOx9nW_!HH0=kzcC<{V{O_XWlxrpaXTOO~wnns-cZdte_3Iun zyJ^_Nd^@&@+M`SA4>mVO4b9_F#f02_uvUWkyma`~G9k-3U@bfa_U z_({pG$*#^^+DMXWFIVlVXGl^oDKAP@>5wd+L@iVOT#+18wJVlnXp{U`?$lGbNI%_s zzT`lg!fe8PR@4@plT5c1p0i9_rO#wIUc24(W}H7jNW5aJNPEG#>5H)_Gevh2lWE>O zkr9mFW^N)E=y#vz-!&{z@7$pgE-&HDGWnvDcAtW88{#$%<;%!DzI1goSG}zh&CRRd zK1o< zZTsU^R?vnU4kqNMZA;c=yn~FaQ0jj7uumTLR9TY-@{wnfg{8yb8`JYk!cy-Y|GUf9! zc5eW1ICwr^!;Tig<~Zsi1tOlfqat(6RRc9Cy@LTXh5!>7779ODp{d`;PT1@9+JGj2 z!DG020FdTr>=*g_R9OCg1itND-B+$$hVeZx)2zHsy<6j9Ep$pzdwgHDXnz>~G{Wdo z6v@s;z$zW0GH~W*h&wO@lR=MMy@p3#xmuhgAgJcj->hkpaNm5QZ`j_ifGeV4p$SEa zCmLYG%c>k8CUcO)i^1u)TgLX;mjgSH9**<#%aWArNJvo-TJ-hH8Q$py&|F~F6DL>k z$5jBXG3)J>BTxUTuwrdoGW!aRA2s&pAi-(W2C}H&!n+u1i2Dv48*i@XS3D`p9{A&33SJ{ezm@_90 zuV4)m01+;e+rSqIXWO@$!0m~KN}yc1_OTGS!}=f!VIiD_AWP+y%A2B*hH%~U3HM z*qdnDBqybqzeE%zV}XMFVOgpfE^CBF8i>0*HKB)XS(k7*SeT-Z6k|Prupxx#3E)m4 z$POctJ7JrS5LkeMRH=O0AWh)B?Gt2XF7GROuCaQ6PcO%o4Ll_EC%KQDYc zJwHzqY@C`1 zNFNO~U@^biP>@)Fn>`(tb9{*nioV(R#1l9Rfr6 zB_vzCD>ZDp^{UyF-w?yyo__kp6I!cygBSwT`KSxfV)P@k=|_5AW#T+R)R!~s+>{G2 zPL>kMOkU`%K~P^vbY}N3s)b) zNUV8dC|bnqWhld-XNjRbGS9LUpUlk3qMOCh%6WU#LuFrg!t(5pGnmFdw)j|yYTAL4 zJ1)2)*Z&GwJ54QluY8k35V?#YgI@8+CckIKBDpmGduR1`=253e1#Y6bGMIvm8BQuTi_%5qOPR(2`VZ3f=RHqj3P;Cw)iq2;% z7b4Nq_9@@Xbvke?^>Zy3tCBm_hF8K}O#@q^`&)Jp^@|A#S?LF|v!Y+32vv{I-@>!i z_7%qc-Y!1*Gi`pI>b`wXyvq~$epJw!go81Z5xN<)lU!mQg3ZW1cMB5(P0j^21=|T( zx?`p(t+|)_0peCp-Z`AcoL)v|Zg?d-Qn`i@3=|_9F5`8*+ zjC^t1%M(BL8H^w9w-E{O#!%h(?K5begeXNkL%K9F=o;;x$Xp(ud=jylB%>c^K(mkJ za_&f_nSZ~EUeBB?uat0~dMmF}gv?rAkp;McY#zw`?T2f)5fh7~@0%KGbq7??c*7>c z1Tm*FFQk`&p}Wn86hO0Mlxw%06*@K?S7iRSm9yYpGbJylYx|V$WqXWb5?zXA z%@s_aO8m3uIg1?6^M7tROs}}pyiEznG;{NcPj9CrOI6Oh`#WRC0ZL4KOP*+{7|sMaarieF}ttDq+uJtG;t2zx%^=K+E8|GZUOoz5s2S{y+p z?a1KC5|>J&6-;(4;??9yP|R!OyAWKs4Q+xd zPe8QD-Qgnp6TM_LFlyUT692u?4jt040BP=I1qdryTRP$Svz&-%1lUC@5o)H z_l82HQeq9#V^H=cIsOf4xF2LL-GZG|Ry|G|E|crjy=pL7;x1U&c>xNQoTSboO$}G- z2qJ7~Njg40QKptK#;Q#W^$40Qh)#mw6PxzuBRYX#(F>q?1O2O&i^iGABheamM@V|N z5Rk_rMi8Xb;1)E1(VSibD7EX%KPa1(Lui0TX;?;7;1&V#l2K&b<;O`{DQD<7mI{sD zOD+^Yw*r91Q45AuVeZ3Dgq~o)9S20zb0!BD=AZqLTM&(h;ke5WfJ{lJIRpbB3^&xc zK&SzQZK|uCC1kU&85)g&@>SZ919_Ae$*e}@Q2BtCn?M1{g*()<1rTIp9Sq~|myZC1 zEt4eaO<+P|L?@>w^y9qPjcCnlIa#D;loLN@ZUU$Dqg=OTl0e zy#vMo6jKHh?JVOR)*}+a*#%_8wxcu^7&1y2g)&wE#Qr1MQo87HiFs)Z5gZ*891B>!$PQ&OdU_2 zXI$YSNUX%VoH$D#9BYRrj`-&R5LTc3R*nD}XGo0FkiB44J`f|@DbtlfD;AnRjDhGt zhB~F_Bts373P|LBcwGGh%rxCD77wE;^dMZ&SO^4rMw&(5K>wKhGJDix!4Li7S`GOY zNaUGhyO9(H<91(v9v2E&pAFX)XNq9g58BqK41hx~Pyr2Q8>U1n08K*OAu=xv=@e6y zlHVeCUJg3W|G>rUOvryQp*U`I0ZE^SAC64;51F{AR50*<2>~Gz37$Rfa^aeE#6_wg z2Gsr#vqEs#qoX_`mTdpp;6vuqJ&3~!Ql%t$ZNHVVq${kW0g2f=z0DH1mFJI{XHar+%t$S58lW}u+XYA2uuWc z$V_$tmsReVMX`j1c=;p(60ZSLrkIaipe+S(bk{%J7`@!NAV+aD*dC@sj7yAAMO~Wj41$KzBU06)WLI?e4M~SCg+0&cZ>AhkvlxCYak1h^ zPWS}%dh~s|@y*J=poj18ksQ!O#U^l&?~|UN&xaQ}AG;IYm;8ME!ucPMxO}H;5wxkU z)wAR}M0oPgxeB#WoRtgiW$I-e?{joYzuAe&eRz~NKMqHMUz9I^^g5pVU(Exfg7q9OEr;p}Hn4Bllvw2kg$;F#7}tqr1_GM?EFXeNjp4-1dREPBHX zpH~pfjMV{MB{NMAvgo?5iL@avmI|OuQMbcX<&T%N)dV|Z11ZtOSqkIbE9fAw-tXk- zS9;qL@w{>w=0Wx5x&~b14YO79MyJb4n0&3(p}xzl2;#cuk(f*Cq=veVmErN~G;TuV zzAx#aX`)b%M;YRcafUNwPa?Oe(5yoiV)mA|2L56@MDiJ4u|IV`?`zqY8k6o6$DKHt zM;oN2+;go`1XirM+CW<9$Bk>^+x3Y55*1mkKX00>pNhBIGp7t$omh>t4$@DYoe;ZP zAsA{~02)dVOX8(p4`?9NpLy7SGMu;1MIjpo!1rPqrnh3jre>8)%?(ys$UT8 z!T9bm3sIa_JSx;aaNT#sS9=@Dvf_H4ZG2%_i6HY-+ED=YpwsW-)vVB|Qm$SeXR}~w z$30y3+=yH`@%$LuJ9I@r)1?D}p!`*!Ub>sZRe!NAH_v^D72daM-YjpCT9{L(rwX@(0nlt1T zH)SQAIUMY7?6@hWUIyX6-9Bt%De@AWzdqKjbgVAYa?NsXJm0qdCG&UF z0kW=?$aE>i0L4|Q6VAj9eNDiX0yE&)^O>(PA(0TxVWD? zUWCVVDeYh#<r;z=7_xF&tMZB{%4`_Kf-b{{r9yZ4F45= z@tZ;=t$@w+K&{M;oQ1a zQ)xo4C}K-S;+UJXZ&$NLnb+{w%a0bQP{HaWp=Ws(G>Vd93K>|If|gcRX|?9{6w`ll ztPbjcztIW2XR?tO=I$~W$JHr9s~Vuvl$XUmUa~KjM+y3gwI0%W5&b<=-;cV{eYOl; zXgQ$R?eYEcA31@{&geWZYkI!xj^KW#=a^`VK{TOWNBAfKfA*p`mEsXQ^~wEDeWP3% z`-zQHaql1pCbe+GNQAtZ+=Tr^s)<*)i4G=$3kjKdEwjWdVK7PBj78O2O+%m!{^|8i zOHlGwvXBM2@%QUu8cD9}a{6U8!iK_(ru$itnBZn2U9#FXfvJK?(d*|Nr}aTa42g>^ zN3=|e{ZgMWXUvJj%mLsWvUGInbx6Vxg)hfwPH9n`Y?*_(C5P%JYE$TZW90b(AFE7q zMPZ4(-sE8rA!F$!9tHbT5=D#(n7#M~txRM9k&f%7i7UJkb^HTz&;r<`8J}TnQw?!p z+-03pQMn0X=u&DUZhM1w<8c}v%UBf2Lkm8O=|fnNQcUC!)HkN$0e4Yh`h5Ql%U80< z_g_lz7j0sy{9*Mx%}#(>))2$#4Sd+%#_8XFlF|DAOnUN6G_k3rnB3dvGurvK;Ot^E zD{+E-p*tw~EES{`$?>r?dg5HjjKH?I#72K`a_H4$Fff|pQZJ2UE4A-f$jU(iB}73k zazoy(02^_bpa!Vg{V+jD2wc%CK?qWR`{xJ-5c~jueG`$u7y-Qj3J$QvCEF{*;j7?; zZw(=qs{q@KT>wO7pR?)d&jPdIQ82l3NeC*P5pGZ+Pofur5l#?tfDtBnJaBw#bMR;Y z30(<50QCQz2IPU=Vs??jkZTmNLS@iTo`XkcicA563wkQ1a}5F*&>!4k^m z3Wqm76ZIP{_>~$i>I!4{6WD?c@yo+nstxegvOrkK@Z&}Vg~*x762XKQ8!Qsvi6c&_ zfaAF;VXgs)KOrJ?TOE=nsYi-o42+6mc$&sdTM#t2AR_8(iD3*5mjTGism_~`0PHyB zUIFTm__<4xCx*|n924-Iah@n_QKicfnJ#K%!_i2HVwx#Sh9r}T{$&Z={)h83X;ksvws!d{o8Wm%wHZWG6 zl##CSqkfej4G^lF%F*N0l)Ht3FqW+AhNLoM!7-RoB*8t~&BKOZxZzsgY6Asp5QT1Z zV90Y1@1wM_qLC3AQl-CPYs%}%u)Lxl?Pz>Iul!m%b4Z6$4ghU_-fr-HK0oMc1=Igf zX}k#J>Z-^xWLFkH=c@XslY0DXR&fW|ZE1R0TTje>-e>?x&8bqxR~o0Q$Zz;ZMeZ@{ z<)h)Wg(w@bvvI~iBdlJ=*UEsyTA`io-nb8tO|U1Y4j^>^&f_MYNX}c=vh~z@XqaO8vYtBM%uqF3(TVI zKHP2FvYRaCsJWqm3EPS8fyo8?X8E#z%bWj-a)>SIUP}2AfUp5q{@iZz-8~y*@Cw{adLXQ+Q*p^YK(0? zO05T~B%AARXEo^1mp&J+hr)%B^S<_lC)HMvLywt6huOc)(iPE?>$TR6poFLXEOkEB zf(X+V~)%B>iG08nPc#=#+r3o}oWQvckUse=1>qfR@r8Oe(v)RJ+^Oi$$Lq+Gha z&bW#`HnT(TF8A4|bAb`OGj#jA%E*QO&#hCv@f^bxhp^%dHnpg)#drzSBM_$(QuOj1 z*EJ`bBjc5>-HQ46I;4 zeAirUUVJ(;=#oNA@#6Qjhf_xDr9d|9NTxkLPcwC(Zl)hx>9jD^qHcBg1K_G)Jh z8$(fj;L9+XjFrh>@Lma5d{W-j$nYlDcj>?-+OTr)(!EA)(aCQ4VtjLq*?QUNl$nY3 z60=xhcyacYyi9#bFPtDY9?AS$&5QdtgItUBenI~Sn8=IR?>~!({~36b{l6t>F|z&N z7L2I0-{naeV&Ds>$nUs5_y@!{$y&b4L&th&31*BE~*cu_NE73iO zs#tBnc+Wg}L;00Yvx^fr&zRTnC`Y~1ptyrmJ4y7#zDRE5(Uo)}eWyn0K2=<`1Qpmq zV_bDcb|6YLGKB>@qL@moL#;uVgGoi9(|#$n!5>_M(5+|F5@b9Doj8_h)e1yXRU#b$ zKm{b)_==LI*7A@zxK5*;GUJTpRe8<2DlDej3!$TE+?~=*`vXXN^On z5zf<#P9#sqsG40FjC^88m`htzg|C{!G6HG#wY6-_6Mnoc9owf(V#)}Y#q&)G`UKbE zjS!}?#gBkLtW?D7lrFmiEGy220~*a42f~YiHPC|qF$%gxs`YD8B31bCOPS`yfLu2O zw~Y~`7xb-<*VosZXsm>@lx-kKPBH|9>@!jIr&cqLp?H^5tYW>T7y4v{4^zQ&RpazS z~z2V^$RSBlFCRBVN$f$N(J(7~5=s}JlW z$r=JnC{K~6mo8cZXEs@3&b`xn0*~cv!fxzR5Te2}VIzk26QyaUd~bAxKWtXucv@^~ zHE@xDWEFf~4yuxStb?~qG|6@CE0)!Bvr#frvN{yRr}$%Uf-}0A;iEK^Sf9Qq2C-MTQnJw6M{6OROBgNX7PIwnp{K48?w*{wCz1O z(y&9Dk#({58-+(w%_m%E;4dN~SxCt#HciSd!Bie>-x{(kd0&SXJ$#>=+#l6L7Nz?H zXV-#DRAK|QZzzJND0-0wRY|4#vn0kP2)W70GUxakP%~= z`msw&WmH9H$)wTAShkc(4MSbTY-sS?^%5+VPy;BQD0LoO< z5W>>k2ADikon-vjL-V)ZUWf6a=ptK!$SNhZ=UDJeVJUe|iqIV@Ms7WmMkB#p({M4n zR>_Jo44i+tOnY_Jja22PCA}d2s8K{z^~9<)$QoWn6piQ0p>kZPeRcC7{?dzgVDN#{ zj5`PfDC0S+m)hM+C=*!=B6Vpx>`|enoJ(4WVFl|1`R@QC!h1>o7OUCC%R_TZ4UClp zke^TisvT4T)y0xT_>&kbKlM532A*nszCZYWx-eRd*eX81dV0R!AMkx*OV4;TIydz` zFrp?*L)rE{Bln$d{M2(BpWl9@W(kExQf3e=H~I+D;sys4@AP?D=jGjQk}&TL0ot)#k(+!MTWJ~uK;E&pYNOUcuI z&g9p8(yh~w(5*LNE@@ofFzZOLW>si1-4FRy3$!^56?{D^b~n1$c99Y%Tbkb_ z`KYQ@)EzCDwTyPFrO2Miu)1*y+^av32VclK(h|G4Lv}1_(b*`Xt!EU9EG^NV%q`Jc zaIO{QOeZP)m6#J;HCFTh{}R-fzA_4RgG#U5{-zX{60^J4a(KGVDJYt*R(;Rf@#f5t zK)Zf6+wUZuVIEeMuO7b_bVzAMM(4PB?^d853D{cGIkEMTx(Sy5ED z!}BU%cNM4He|EFm}10WG-UY zWmb%;i6}m^2p;gV#ngsrD_*E-&knS?VSFXxFYjg%wb)U$W)RJZVmP|5K1aL%uGA`G zTH3xSPH;(?Ev24$c7^-=gtNA)yc}hgB8cN`QW9Q6R zG|1X+`Tg`BcoM^ECR8KCn9X~OLJ>gE$ zy*j&c@xgYsX;Sewq9;qqlqXXM!GWg}v^@lQ#;Uu1(RpQNLRV9vIxwXuxBtw%wNwws ziu5M+(}4Y}bna6`{7w}x-A328a?%&w4-KoQ(;;ash8-KSJ!F7Q^gYew$Gp znOT&0#!Aevp55nRw&mY-KVeNxjax~Iz{20s4(=M1vD zA+&@_yD38_y*j%~i$$BGCB0@^kfEc#u;OXG+VaeP!ux2s`npIfemqH$@(O9{PJcma z^}N4i-cXWTmr{CZvKPZKPAUy_s=A-rwn|Hc=XPDWTvyw@M-rSe;@r4Dk+f$rRT7il z0pHhInHxxM6*mIP+ln{$$UF?V5YAe0pmM1~8Jgfk4sDgU8NRUp?b3WN(L*|k=ygo= zfWC{~G^>FPbCm^-u1*tJ4a@|FYCvh+H@TKVUniK10mtVM(F|WIoMH@VR=;SpcQ_GX zi4w*LbS!i9A845ez!`vKZE_PIZ=H@kd`>EL5qyqqA@d)q#$KWV*}(=gd|Lf6b9~yq z;3rr*Uaj!F7uzs8Z2ndhNCw||jAlQ$LSUr?!;z=E07Z8IQdpQ9cy89c z3{U7sJeUIrUMHVdmwT9KyFsD@Pj-bGzz|}4iReXJU(yFB7fUL5N=)~1XgaMEh+bVkPH#Ae7%N6GR0aYfPUg`W?ymn@?IeF zy0AQWK5lc8KS>2rG%>^s&}*(CPhe|H5&&lJg|PgvaHG4Eqxj9Y(+_$TzK6!OLHLN_ zwvZV-u+6Xa7PTVX5;X$SF-W*5!e?-GZ_8QqPN``8_j6kA4f~NiHJ$hC3dE(+3*^2*m;03)2{1II2Yfa^^ng38(U*P@cIvRXEU zKN2NM;utziVSx$dg}J*Nwke_DFZeP;m2$?>MOmdDb5RGH?P3w|+;_1PWL@`>FOm-t zPRz0hFd%#__7in*8ApnAhFu@z!4x&jB1z~&3UY-Qfhg7Bj0dmk1wZ#P(9<5)T_vCz-=(7hFGyqAh=P^Fw1d1>F;^2MoV;#5NHbi7L{Pc0pYEggPIM& z6h}R;762m2h!W135ZXJ!@3B*5e;^?@BmKpPMDmlXvy28fC2drW9jH7LO|{;nNYM@V$i|db0AtK%1`m**%Kvus2N-eLF>iVSB?Qgp9GkRB*F*0pL!{p(+2_s6&!|9sGXFvG_ilTo~8xma-#w{N)zb8Jm zVH~RcIi}aR85oc9KIO!5C?WY*qBTxsC4a^uc&oId;yrIQbF7jlb};pbPoyWX@Wl*9 zZwC8p_Fd(BjsAMEoq>+_3_bbMvWGuaTK!mXo26ha@VRzgtKgT|UiKspc_uHS)2Na|V|wo0_;|%^t4WjB(7GjNqxCDgXEIA zCYlrUnx=KF&wsrlWHcAjY3Ru$Hz)WI7se{jAS+*8P`DufO_#q{XNPcqaX(z{)*#z^ zbsgs3pLa%Ql=z!Y{@@_F`YLRACwbhc$wYRwD#@YFBc_myy739V;QHn+=uVXu_-n2! z5AdC8_wtkv2*2mz#W#0%wE0A(HN2S{-y0~3``5>JO}fCkHM;$`+8vS{ul#aeNTI!B z?g>^zVvj1wSU5@>=>0+oZfnp}{o-!>ZdiUFVe)r`A&6;zn%O~Q(r0=O%36`JSn2Ea zTtDDO)mVG-TO6Y`Kv1V3p)sPQDY{P|Nq1lH`TEFsyj}J5(JiT)(MDKh&aK{_IEl`c z;^2vE%n(}nIq~L`zeCAiB^v@7x$*X_9V5{8J$GQ!)xc(9^jO(xMPTCoUnWGho3xrY zh2Cy2g47VBSwzMyu>O@IE0;FpzgH*zcTk(0|D%0^`#)1ebQGaXbQu5T}0>jV>zaMt$u@V;u!` zo3WS&G*-tl3Pibpf=8Fpe9U$20;ieJ#)*1PbciRcq+Zq!VF1TW3{q`-$)Eao-Cp8d z>c8PXKPy+DL`m{Wbn#>cZU1_-k7PAlh~+ys9hV`k>PFw-7xKWuAVtd|=W*Ilj>y9j zG53>Jiz7X@c$BHa#*+LpgYv#Pau0x2{to&5%|bI@P-Z6? zxUa%AuTsD22<`p;j{LstBrIZ@{oI%n+!BJ|L3|z-WY)nT6|Oc8Zw@cyCMKl4njp~{ z(l#|H__YHB_)`WGBFS zV2U(0$o3n2Unc=<{f70K6AtEg2>{EiO+KDgMQ}Sloye1kObS zjYh7;dO&7yg;^owBkQjWvl(p4uhQ=f?~7SFNSJ5@&P|nv%MCj)movOfTG%gp5_p!d zx^mS_>(bO_tMH0Uj!7In#-&g|EZ)C%ux4cXWzNYXwo;xUJ@S*W5}3+b&9V%l&hS@80if$ z)x9cF(Du)g*dF0c@H>2FOd)MkDUwL}S_OzWW=MMQKc}4q zoEv(P)u>|}%|fL*nIxm6@c!U_jK&rqGVfNdQf8~e_WORhKxv!)Z-FxX?^FY;#_-UG z54_Cz+h{xG9u~OvNX>sF-0wT7QsBudYm_@JEpSZDq?EqPMZX0@Ah(={el11r$ZcFO zwR^`}1Ic&oKo9TcS<%=Zi=k;psRsn)yXKR`!4W%DRp&-rY+wasSF8Jy^yQ0Vx=5QF zB5V2mE5AGkq*-fO+YDKv7zWfL9Pz^*D+6Em+fhU&D09C}=e<5{gVqBdMoBMtM(3*D z3El(oQEDo_`(DoLChIR-sl~ozem`}~w1+4IXQM}Im8K}vkKa!x&73dkiTV)Bp;J-5g!(1pYpj#bpGdkua9C=zQF70_MvqS) zde4K+MJx{&6&Or4^ zAIf$O!e%eWI4=V=JBMj_zJP?IcLg3+y;*Yeyy#f7hWQ~!Jk3&LV>`uNeLKY=mDSaK zoL+Aw)E){P7K$9s5d)zyX1l~mmyy{T+Bd7;J9K<5pYkQ~wii9w8goik+KCn|6(lOTA5^t+}7+(f$7_eO&lL;j@zb-sMmo^1Gi! zWx3$Ynn|s_bj&bvZm|^$e0Ur-;5c;I;=bp!9mvQn)EAf)sE?BS?66po7FnY`E!+7z zto>_5I!57TU~ zOsHZwlBd>Z*(=VzVn?mJ-A=Bbo}neh7*VyM+f2rNkk15d70+*3&To0(R46th##Htn zgL$QI%beyHQ)E^c$+I4Zml`b-d1uiwX0JbIGYq9=BO>fiCqN<%0~ z(M-cyZyXsvY1+VZ1z5~D^>=msAg(>{eA*ew^Cd$@&oPriR$3u~G)Tg3iqAsjV4lB1HWj5$>K;aRG6*xe)#PoH27CO-VrbF{?+ z+z-^{=ZQo{QD&(^hM6a!oxs{^R9lH}8~>%oTw&RYaMOx#zR^mB_^ zb^inf?*SdV**MOzuUTGdmqaNttz119;@A6I!CQVfpN6=(=Omf7Y-k&Y*?F6eh0Buj z0uLS+Y|{LM33tw}stgn#hPx7IU?Pf&>6$OMb*mA7$ulAwdNSqmR1%~e8biJKQ)ss< zsrN+&F@a1fKl9<1=i4@ww zOKnGHhe}bnN`&(hLQH4V+n=`**%5IW}%Z^rKUA$EmaHD%&2L$#e@YFmeB;A3RGe2 zgIr28(!|Wn^)>X9Y{3aj9Dke8-WA@^lr+{dWh{S--l5qKmqj{q1$Jxeec%qFL#snK zb7#N8bZb-2GJ4EAx;Im`lr}fQA@q+6-1S?;>gfnIFZu(_ZP_|_-67$g=2_lF>iGDEi7 z1{LiSyT%wYim02^*BBZ5#ZQ~gw4~}N&72te#Q%!WLVjv9DSUG+So-SL0H0L!4=$n~ z$r%i2sR?=i4DhjU((qlF>DUBPE9udGl`MuQ0TOrVA@>j9OaAC&!I=yXDn;om!bo5rnTGmdZaxfeaE-ZAyVpf-Gb_%Hb+$NR)(OyN@e2XVgCh~$Dk29heJcL5 zeh`B7F}*;(z4kjUp)wl;Q`H={^Ku6^KFJ)m4u_xvO}>>Hq8hi&Ib_6huEhlO7j*p6+WyfA=)I)3GrA2?_q&u&7sgOnNRIDH8zSb;e{WIu(1|23o)|ce(Ao@J+biXWQNKOrat2RNwkU$ z<{vER+sMQH(cp=oKtvO+FBXM{yD=Mu5Q@hFKpL1W?6eglc0oJ{{hLhdU5M$C<@;we z?gU($@dKDc^cdvy`*0zq+g!G$%gcz1vds68MTzN!c@+=-0y>1V0mf<^d}v zIDI)jAr_f<;a`>k5xNHljpk>LRzjkL5}WGVZ_pdfB6nTV!Nn3f(^wk&BV`)vM~+M~ zRjYF0_>oqD=5a5PFHjXh0iVg98uK8y;mZ`Ba;4$*wdXg>hOW{tSEEUcw%3Q|vlm!I zWexZ9Dw9M@$ew*FIOWVzjf?ScM_}2*7kgD-OK8zDA#YG;uO_6-9zSZ+l2O7lN5bd0 zINqZ1?_Fpa0hgl8l&hV@qCt%%eT2b|$h+qe>_Et-Y%b6jmwb1@8ARuIz% zUlup>_2)>7T0$re+1Qb!lMrjNOD}`N{z>p|CZM82W&_Vnbv)^C09he`MnJGq)g@u; z_QP=IO$<6k0X0d(2>2#B7LfFgM<_{_2O|v5M$igCvv#`wA=YaDDuK~*^&m@|z==3T z%X%+`@i%>?tq5ba%YqlvZ}J}-Vg;C;34LbpwjZp`ossC7D}BDJfDI3$o|?A#)Cl2Y zZR=%yTsQ8ua{_L)a}q<9Si=gInAIZxo@I!ziq#@=X|2n@nJ&u;?>G+@I~4O2No{M! zEt=VL<=aXww6EWUuEPp`v#JFhlU?={t%WWGZ@P$fYfPYfAkIIbh(sbi)Nb8)&U)ZP zKckwgvM0!QLx=X$D5b=xTj@y;r1Rxi>tug^{f6~pX@$w*{;4?YcJu`)7x)P!GF>o1 zB5EgQ&`2&sCh@C__BHnSsF4wd%M_|?;@438usb8+=Hs~?=|u-=djbSry`QII*dZ=~ z?=d{zU#2OZLl50qA)(>qzE3}!ijfa86-Cc7i4VVGxYG}OXj#pL*tXEg@M1pQ z*f>HDGlz8C8ZI-v2y%X1$31U{Ii1YwSYC!LlD>x7ekO=W`)Q^%lAkU``3Lfj2Cjs9 z)M58C;!E#_nG|~o*`TRt84@1YZz)i>BaybW(>_J#Otkd-99WUU3Xe#-d0wmHPF~b8}m%3ToVdtyUR^zJU;|;&%6~dg7jGv9p z5AHWC)z&r(7&e_la*IPCNWiku*7Z4|&1Q!u_hsNw?poUer_;;J9;>L|LwDBr>;3d} zGv@lsIZPqY=jnEo!07e<8WwS(zFPj=E&}rm*u^1Wbvi5Yc7@!ILheZX1SDRbN0Cwj zgNMnrRGpqqBfYzK<;9h+8Xvx%UIrUoZ$?w(z0|@^5A=uVSPZDD#Z#lBKZ+}&fytY) z#Y9!<14ME1>rfn((D1Ftj1nyyboTb$RIwHnLo!-@s_UcW{LEuP*|3D8Vc9W`)lwHl z1XuS4PkF?}w)S|Y?Ew<|?WB6*sev2PX2X^v=06#VAuU;_7~#uq^@a;46s{#bry6G} zq9z>n4*JQzR}ca$-1_I+&!75a#bq7*}0 zQ!a;YX?gW#$GUO8YerQi&D2|=yc3_BMpF!^PKK@|Cf#3=j%;elrlc75qJ&gG4h&1f z*4CGtPAGYL7mlk{eU=kyTYBwu$w-1b%u84(-&~ktTC4SUj|Z$Zh?zfa<@o3JHISa+ zkANOsWy3Q0v*BQ%V*85BwF_vuJ;a}hmv7GLl2`?E+9{4ZyCqzmf8RX2^~AO|PzjTN zPV&-6j{9GZ7KKEMHee9=39@d|zO-6o*ly%pzPQ7k^+^4M*YBfjSjjKk^hTQ9fn**` z!hV{aSXQo%R8CfYp0mGg8oexqDVX|OR*sj0ro^HkX|1;|0fop4PtwpKP{jhuc2RFNy@)ql?~S!?EbCrPbY_f6ESEG<5Rzv z2>-xB=Jk5WLstE&=p2-6%YY8A%Ycb{WZ)ust*;m$M`|m7%BRKn5o1lgne}c0@?px0 zuyRP1{HU+9zZ$7AzQ4&Ej=&bl18|QV27}B0ZcG?N%+v?ZH|J4ACO7eA0~2rPBBEt>JNakZ7IPEaw_k?y?i|jeM}{k z#S@2nl>9~lv_$DUMS0(F={lEK_z6FXH~-ucXf!~VRDcI2geM<~C2UhZO&s=7N_s%j z!&lhiH-_!~2Ae7Owe`*~QQlSXsFk~SLXIw{AsLjct4%x0?l!}M<*@`Mw?Pn9*4zUC z)MH0Iw|bU9(ZB0M%UB}trtJGy|HNMy%saX)d0TSgE^!!~ znH7QQwx}Aqs1;)rDRT%7OO6M^h+0Pkbz2dT0C7f@$qGeQ4jDYmROvX4i(e}=3Xt_F z!6Ke)dQtDctfE9^(i)_B40DsLoZa>iwfN@A-T&%fh@;%1k)&HYZ%CoCEHdPp1V`&x zf?I^&_GG}ore=$QJVnBwOJjmo1rPK!PIXc1xi_r#4wBO)Q1iuBun3}L|BQOJvyffG zRF&QTDB(O-|A2RxU{ko{xJzz(kNVKCb9mDw(#EX+XzeuqK_RR#1f+a2WddQ;4Ons$x9WA?b&^|MeF}`{dJbG`Y&+Df(WaitWt0Z)llj+ zq%KZ(QWr`e-nkNqM}6lZYq2j(8bdTcoNZ6!+8OF^s655>f5l*;%8U2?jM!x{|9hje z0C4$xKYaXtSSt`qy(lIOzEJ5~aZ{VNCdCKzdXLY24N72t6pl5sGFCO26)==_ExL^( zCYff;YwV;6F>`AL!UU7p_Q0>JL1^5FVN%B+~Ui;JrV5<$!z(50^bPwZ0ne(jxqm$QkXvmAi7N z*#1$-%UqPm!cOU*VjZ}LwT^0+$0*Ez22S%ZZG&bPSI_@Ii#9(Fg&O3F5!W7{koWuoj6;5 zs_5~KI@~%Ko9x#PNUHh4|K)DV%itxAPwyz~8n)anFZc>O5e;~{a$J9by}2+!Z}-dX zlTpCa5yd75G4TEcwwxF6d;+U%R~+ZqNDP6^*NehVV1dAju$%c;zt{Hl{vM?O*qd<0 z=9kx3(pUL)i7E8qn8lu8p15DmJ$R&AeUdd&1hhpP zctUJrs2;9Y>|267B6i#IA3!}L%NNHK1=eOm#7XUOrDN*r?GzWWFaE|ciBTo!Lm}@@ zJ8A=CYGMb0N(~&2XZCSJ0(t$^^+zVxH?ZxVu|7m%^#+{j(`r-4?Wq>IIvfI~?Qh-} z^WEDPSKKza$@H$G6)-bPS3aAyLOcvQ@_jTJ(Q)dEJIQTxS1*!uB*iA|;g{-a{%o#@ zX?Tphp%juXTt_7)p1`C%N5f4=d2$2XCw^Yi%k0ziCHGW*(+lRtos9w*t9<3 zz~-tggvl+k54GE}((T%;M(<*fi>KC~h|+)me@2leXG4iAIu%con#Nr2`Ku4}^CJD+ zII(Kn9_mq1EWoh#;Fr-bvqwe)fE@JFY#s)#!Fh*Y@Zh4+a-3mmo0H={INf zg3wrIKmTe}Z;;P!m9#7Ohq^gU@cvVzkjY%++e_ zjzHwNzX4ldE#sc3sgY@Z)bG>MGby*ItQXuEyXG99)!v86y^}xQf)y9HJL)AMiyD3* zTMW>qlwWf{+hR63cS%3D3dk%VF)iDCPm}nfk9{xw==0(;Id{8k==we><4R2L-rb)E z;XX4n^=)+KJKJZ-#R4e>cYlA~8!lRhsjJ@%Da930z%;nk1;o2QzW4H{QMA$5|A0+I zkXDKeCsDM!9mA|{TYT!`Q)jD)Ct)5LATbUeWq#Xt^r5(|Bztj$xn}fC{>t}*?9-ZV z=;GdKVWS|}$uo+1+LiQXTvI(4@5u@Y2Q<1W@9MdAv%jl)VehvGp6}9B8s>4N8(p?x zX2o39zt3`7@XO&cDly;5-7J2wk5kDkm?oB;z7%rX_FE9j=EAh9A6KP&Np~rDSX>?% ztQl>TcXi<5)9QsMe|0zOnO=)o=9b|Zw;Zh{@~GGa0uM|nqDsaWfy;Y~<=#96)fClT z5B+`$XtnS*m!rTPAmU{~kR8uhW-RBTpq}$eDL*Kuwf2A?=rabqjzJ9yK#}shLmH9$W$q=hU$?=A*Q`+^yWMSFSlH+?v3=(FRFbyqL06_7t`YO z7Ht|apFq|Y)G){UGL!*{2#H-o2KFarb881Sqw4QopgUQL5k)w_zpD=|U_=QxHuAU! z$9_DkL7xLwd2QEiH<-yb`%Max;97s(B>hS|hV~k`h6Es^RPleVb5?JZNwyPdp^}03NxG z^}r0~U(QLx>O2Bpv6^KlYhQA_mSk@|6TWwaZje)2&raHIkl#5dwq!{RMW0a{Z{8;& zEP1{Mo6(;p-mPZQtjR9RkukRh1~nV{`_>65tJD%K^7O=&8_H^8VzL$LDJuCW+OwM) z2~|^9&L_-o&lA^H$92Rl7|PmFkk`ij^@Yu3Evoxs6KG|-Qm^O>8q4}u7POVT>#cz_ z!O9m;kv)nx+>19Jj?flexCNWf1)9$e8Y=;SU-k4KlLR6uplAOL$A(bZu=#{EHJk(rBP~b#VTHd9_mqT8llg`2KiQrkL-p zc%A#2Rl^qlH}Fx1TPoT`2`ilbBaC* zdF`!S4w>3+f6;kv`FGU6r-x8iOE{y0wiQjN8*mqahVFqJDiGRvPI~v5Y4+PE zOds6w@m7F8{-|eNS|NU)x)39w31YiWg|>mNQ4SmX?)^!PDf z!!2bcb8n+s^Q0gnv@ezc_LbDV3xA)N4fUHsV~edua+O2f!wRz^F$=BdgaiMTlu|`* zZ>6&tK8sIXr(DW{|KU&)CBU{q)dk0I=SXdk|Y&ebnua zTxfsa`NO|&aWM>Eo+_MxDm@2zDI;7{pQ`Vz?T@^4sa&|571@o7J)#0QL6ZiGV^9D8 zwhXHB8(dtd&T30`hO1VbO_^4LW+hb|tFbYk<*%GxYk8(E))7+=k*S3y-9mRrq2ViypJZS(`Td1Qqw_`)$!pzm`=UgIPFT_Uom2 zJMSAy!3+7vYEC>by9~Bbe^sook6w069UoEexdbP)6=qzPnV`vCAjfLH;-=}6)|Fkq zJ0&+R7;EZR#XhfsxFSmn4I;6D=lywbgSJA2Cn!1j*9rFu zb!-E}rMecEnNjv2mnlq^I>2L}qid*@tmC9y@@Q1;5^5etyn8XK;Ggc-+*al%*#(Rq zPr%PBKm-Av50qZ}Yr;g@qZYNFJ!tb&4(T^>Vo`=ojxwKi$0MrJ&JfdOmJ+=RX)fr) zTw|X<&m*t;TG@rqjvps_-a^~RZTy85+;Z9H+kVK-i&(LG>BWQUK2gw!Oa_%1v#xyb zv_OJpQrK{dDqM83;5BW3(3%@1udk_vV@8!@$g!SC$yNdJDg-yq2!p?({}#5JQb)eT|jn_bpu<V+@o{oQo^W&b7u} zaY)WVx6Y9tdf>J^yky(fRd^F3-LiISOYAoy;u z%qNeIn5{nzeZ%AP{8Dbq-xF{Ab1&=sCEeU|h>-X9;VY?gUG_C(N7?V-`N053jb0Ta zn-k-yops|PY#uMc8rxWv+h?)!O+GKdzqSS{w--|91oFoI3Cks`&1>Ev;Qm2fP?EpE zWKa&=$@{^MFCVkdH??wmx=+p;|2 zr*FEq2=%dbDK{t4h7@&!@8P5Oh3UUv*d9AGJ{f3Ur%HchJ76SE&{G=Vs$#ekm36~C z{s8h^!Q1!MtidgdWk-=L+0uRs-!6&#e3v=nPVO+nUNh7^er&x9M(n&;Oq zUaVek3sM&E^ZIx{yx#^wy+F^BwnG=2BMyo=c!_Ugcu?|v?ZaQt4J?Pe5T1GCyRBZ3 z-e?iC#@50wV}Coka(42xbhD1M0QJx8t$Xv|SOh9#*nx%TbbU#mA6PgkZvUlx^ptN6 z0mt_1l7PCS)UMEc>Zpt7`nH4U;{57Q1g(C~kXfm$u7}0?j^&4dllpb(K;1bBZYQiQ zq<%n4;CA&JuMWxCE4&%v)zAOVG{(dAzlm+*{2vqexp+AKBereSU^4EQ58HpA@$x;Z z{<1~$(A1%VoLmbf;xn9}r;IL2^+%@2@e(__9F6tUBsaPP_^4KLP`}7`=+Q!)>y~7k zjZ^4+;MGP^T{2p-t6~aeQEJ*sM|Fx~0R33K24Tx^K8^gVqA)LpNYg^1&3UPlqOHHa zPlaXj% z;Jb#*{MVyhysVe$A>Xh~GrI>vS3g<@8*ry03|tIBHc|lA&u;j_Mu|TZ6_rVTBOyQb zcGFRwC$%9PG*nCkQiG1zeochGf5$9eeS`T9oKbW1pqr?zD=hB%r%*HSM(i4V#&12E zAdssosYDhykyt%jY-7(G_ww1Em*3$5lBT|)nad^H|Fv63IQ8)S&)c)ud!VY-yd_c6 z-VS!4J$wJcF_pcRm3F1k@@(hg61djr36fF?1CRZC(EY{;45;8fk8Hnvf2D1xXMXVF z=-emIT1i7wN7V0ruV~kuc(jnTLWK$3xu9AV<+jBoc-w$vF>o$%fP!7?;Oy^2NnpKC zL(Dxl0@8d02k`v|mcrah_JLjz5g?XJ<5P(YC0#W{uR9)NV$LB}Qs9%W=$zP&S+r9* zH{!ZXWpPrmA_by54=V5(bX6{|vd^HydlR3hCBg-`!9=`t#zQCYf6Ni4imfMdcc%cTm8 zU*SgEcwq~Dq1G+GWsEa5f8Z95Rtiu@K6>HDvK6*l-&nU$9mY@zghqbZo^>nIlz*Fh ztnkafnOQgMD}z<=0pZ(5lDLv!{^ryuJH7$7P`S&O$x@>+IA8nO^WHqL9GWQ1l5m4h z4iSED&ST3h-aSI3hoo9_n{=b>pWmiV12t^#V;m}IC9af1DcqbPb`!_a^^Voz>SLVr zl3w|pR17g7iwU^jj9?9f9i+9lzn)*bT;wwqqlW1(9@L^hX{dHQ?rW$tNfA{*r!LoDRUuhJ0gLeNxBNQYP ziotdJd=}dogaS~(uM)y+2u>vOdoqA!IiePMcmQa0ZoY@Rb3q@F51GF% zZORh|7Vmd!bsC2vk$?cpEypqw<0SE9JVE8~2V#z@fmhIhtgaPVOjn!oP-nLRauO5y z&%4_(6VkB-c$jA4im7aF4*^VkeH(09G>XXb7>HV)Oyr^6O0x#sq07S>V=rx~XU^`= z5BAUgoxj-CX@)fxTamdcy@+eIYK~K2DiaoH>TWUp?6nrdcHXSD%q=3Y3UJF*NTL>; zS@>}3CdY}sM0lCYHdR}%!MZQC|H$xAs_Zga=W!bI)2>%JWi|ogw>>1-2kX9=H0JGH zvKZbX)@0ac;}M6&8oe>Wv{aMotaxl|a)JXJLF*Bp#TvuCoF@U@m_?L^JWoOpTz^bD zGxeTujF%23h>;T0Bj5tx zn)97k7JRz+A_x8O5!%8M;Qw}W*x80zXo2m+}2MxZhT5^Ky|t zNJo=tSivg?Ue6bfvqHNMPhc^KZV%4VuzG~?;*I|}ID|->37{x&9@WKsX`6+OMp#>+ zJ(uFgu>pEP453DjUDRY+{y_2WaWG7$^Y}}ufi#9;`>@}S>OGy2-=;bmLn7lUpp)Ae zqmfKgo!W*Zct_IqbcS9Ii;Mo?0FP%=OQuw!;WgNP&hiJC*n2=P+S_RO0{>Rbm%|&3 zJs4A06@>m}o8#~?|LD}&`*QGUd{x)ylGJk^G&Ep>%$V9aM2_rBau;U;|6(Sx+$_}V zZxju;!xoA+Y;18Rf3&JjkM^-vv%38IZB;78RiGc*C(AO^#lOjBj%0T5k&C5-9)Isr z^4@9V<5&uSFs?GLu1SlP>o|m)x;NMrQ%pObLOa&|Da@6 zd$nF7kYWNT*#4P|U&;TXxaKmMSPV%G6)R!B6Bv|5i(_tZA?3Rgvuf&uYz_YC)aAL7 zt=7pHG)4&U&J+-lSR1ewF#|9acn2Dzsc5CWuFcbtSaLZMjZ*YlPp3o-PCFJ@!R8_^ zcG#!AhuvPpikCSy*^<16%|%X|J(EQ(hrkBoW(%38t0Kl(jVu@6&f%Eco;8jFvM}V?6eoN2k+QTP%3TpD_7ZfRS|#gEwvG*Sjnqk>iNQ z^un)duJ~-cqjxjqT3S8LFDcg7kw)UyY6?Un$w~+f#_7F!uhOwwEqc!3s0~?}v+6HR zXQ4vzEI8I^__cZU#{|zw##+>UbBYVNYyjlpAj%dvHnWcOhY*W4F*<-@Yq>Iftx1&~ z;Z{T`E5^IJAq=9>l1pM9$3S&{DYp6qwICp#R$p zB?b6BK*#&oz?d_JcLdy95|nRZVfAbmu`1mJ9Zcv?P}%EDP$fVr7q>a>Z14 z`P_Hye&2i-<*r!BBh#Y>IoMMOLe}x`s4XpO%1Kw{kz<@iD%TYv)4c~d9Ixr%*Vq`? z3uK1>uxA63ySJQdESSvpVp933a}d)BycvVo^<;)qFLa=!7A!0zhxLM1Y$gIT5x;OO z2d#BDip|7TRRc?`FWx(i#A|ManTZhIlhste!D0f~6myK1W<|<9fjJgNO)&Xfi7n8Ow=Yv?E=ezpvrd`Cm zcH9np4>+*{SAZ(+aWfuB6K{4`)USS7&XWTJL12Fedzmg7sft@oy{Qfp=Ag7<#RwDhEQ;EI|b0+RKms_N3q0;aXak<#jXUS>ukstHQY# z4ma6@E(vDe_fUE|mZY2%s2UoznvRk~GljEvAd*gltc(QoRc)Ah{uC;^J3&B(`=H)w4-k-iHy#I6m5^i#Bj zheKi(Y>C(-lF*xKl>>S{jr`NxkIWc5qcr@vTrO(f=_6}*6PLa{h^&5hF@0@Yu)bmS0-Wrn$*F z9lpzHn88yYqi4j-Mpi9^tP>>O{h8nT@Q0^fe={Egm1WfpAtoG)16 zUhc;*j|8e`-M2m(n)QqUkjvqFH32_STRZ;1BG9x2e}X-5)9w)pcuuCN=Tc0|7<*~_ z$FQ;xujts(gdC~nvQ5kQduj3+mDyDGdj=!ODqP&-SpoF}azbTM$b z#JLKdoCFID|IowCuCdoCgJ>sJBa`h_aQf1`RE8>FzD=Xquec(A{PK*tj}7#XntlA} z**EyS=h$E(`H`oGqgga_G0kY)-IcyI0BEx8ON9*#iJC>kIa6h$U3p|VPDv&;1e$=^ zs&!4ax-ZUT$V?C|oy$mQUkd%7c9AO2+8QD{&5EH-rd!)UR%XYiXNewNGgC-kPsx?U zF*!AxncgV-g_V$5gi%({2D`c*I>*KH@9l|MR#npiHdj4=jtiG(s&l9%(VH5vWDANC z4F;D?$IG}lYITK_{dK|yCPmHCCT*x_`}8}fPq@0mbJor>CT*zFLdsadE=@4_8ynsR zOHxa_GJD!h>%P5*d)HFH$b6n)qZFqdnx#XTFKw`4RSlV=gr_9C*T{+{K)H*^*Y1_g zy4;&q^Gd0UNJ&{sAO%Q)-MnJZA8v9B6|hEdpGfUbX@N_dNZ3ndb(H;ooWJ&n9z$+D z9c>MxY*|tlhua%d#SBOk(sRHVnPOyhIekj&Q|a%|bVA>j)yfs@WAktO7?mbE8rNMv z*K%d@;{#8b>54{A`U2TmXLVbqwm*09qirRZ%fr|v_(*kK#xw<-DTEEIjheN@`7?SO zxEJ}562t6*iVbXvnsvkZb8xE@*Ki6`W}TKQho{p7sKg_$K*+ate?7&?Y!NGOq=e0S z;uN0U(pSy-)-=8EC3Z07UO}{J5I$}^Q`u(!+VZ8!$3EnG=@!uXtuTSvu~fQzkyf)- zIo@))ThgSrHXQ~g&-x?`jR*#F^3Unvl-1LE-prl)P5BwxRtizQXbVZ}3R=5H+p`!R zm@@NJ>)N?!MW4uRZ#nmwXhNIpU9{>?QiMIt2p%Fk)BV9OSu3-Fg2Nkn?i&F6a!fi+ z3YF8t?i_BRJhu0>)w7_a=0|4|P4Lynm&r6Es<~*KG6Fi!n=NR_b?v9p#_IS}u*%zc zO=)tfuw**F0wxMgzx;Q0CqAzKO_l>E*Z-8|z{Sh`9|bdJ4TdX@`mk5_85@*%+Oki* zxsCNdi3J@aP+wp!?86hjx9ji-@e9c0^n=7{7rIG(GhA_H_?dl>DXZlymr80ukp*>r z47Al(uuvo(t6u(KkMlX1d42~As7{#F@mcg?hWDA+=gpb@BOCRZjd@CD3dKsJ`fk^m)PD!sALdlfhUoxRMZra~EGlNgr` za1cv(lmF;5%O1^APM$E>k7+ciW#{&`)z$L}N2}`%9gLagf3%uUUBheGx~|;UAD(pd zFZ5}dI~w+yvxo82v8ULBX}*5BaHIY-gOPGtj#V_H_-Icr=dSlEv#-!vSR{R0w1(l1 zhUZA|U5T4~YU+1SlhKi~#x@<8_kp9S@F)zoGv*ew z2V@p-w&j1cAG2V4?}<~p`zH8Z?2XN_XiWKFY-(cY!cZ|uL#E0LtX0@o2~eTl`v|&g z8ifSnaYH&&Jmxec?f;$>9E30FKMi{l<)<_msfUymsMn=%5o>MDBTBJ^g(#}WTOw#J z86{z1&)&`$QeS@Cn)wqMz6~*S0Q%ZeQ56%brbR8d3L75n{zI)`A#i4i5^FNwS^lXd z%kBMlTigo%;p?*O750M$t!bJF7oySOY>ZT@5LSGhxnMAu^K45lD3B=ejWw#ptIvm)$n@I(-Bzx}s{eKs zy2m(ItuZ{_1P=XW$5_fw(KIq)TUo6#paIQs*k>VMo%1Q3h;<-n+WfEn$&5HadyK^k zqXchsNU$xxZY9RDJ``dooKIePQ=?ksm(x39@q7fG8|GGrJf^iCU4}XUTXQ8D`rU=J z&JUq;N9s&Bwwjw0(o^=p*5HOWsqjQccfBL@Y7$Z6lsOWC%)__tMiq-lPb}h&6|ytG z^C25;&G_~D*fJRTW)#famzrtY0^bIXEBjXY+fumYG%YSnoxw;isy0z-an6Tx)~oKj zPJ|zWkyY%6h^5>m)a+)Z{~9c_@aRIfk`}D1B6~uqK8~Pp^=(+q#j!bc-kwa_5Wu?o zkNy%2Dk2@#GPD8LmCXJA_?x)_7cx)Fuxrig1*;^da2K@xydLnh`;-^(dbeDE=6H6t zbfT-S5v~M#&0oIzn+H+T*&anI7 z%@+0Q#=JoQ>#v2AfRS3|L0l^l7tVYS#=Xn(8sF*0d7s@$!}i%f^#%P#`rHryWxt82 z<3-P0ZHFy#MM{OW7wjl`DCGbrh0=wbKC+Z!GrPZ(J%b{{PEuUd=)Spq*YkTgEg zXWgos)$pJc8w;6|5K#|n6AsIbGjhQcYb_)a6Y*j$)XRUN>L*5M^$)@+K&QT9BPQGr zA`xu~4U_u`6rcXxMo-uJh)wOjkuSNq5Q*VU)b?Y{S%Tet3Wx}WAGA3I(P#@*86#0FJG zX0^NbV=*;YhGb#6n)u@qK>ez1X_vkRq84U_QhZ+b9NQAA!F=+bLh2PI#zlh$)E&}V zOVAZ-nI*FUw{a~VttceUYr3n(3CGT-YJD$7FjlTt9C8;k;lIqU$!W+vbHzD`=xI){ zdA#dlX*N(pcElY!n#QjDU=+pJ7=b#Xx}*tvXh@!ana1X)YTd^MQMD;vuzB3-l&H6Y zkbDEucF1@&vbSE+yaFkNb;DJT{OJ^~o%~k0i`1z^Emo}H0%D1N5nVB8QPcJPeAe8@ zlTh?1S}xA9f#F)GpHJHupoG(|o|A(hQzn)4DB=?;&v_a_i#0PH!8>Zy(zlPWE-oDA z(VmaFf|#&wv$2ukT4!%MmH=&%TTV>J)y%jQ^NmzIT+y}v(~OqHGYeJFajavw)25mdPL7#_*wCtWbf|v= zq~PK?%18~n@e&Jw1pgH1TaEI;d3$|eJp7PJo6ro5W#;gOz{lRJoqnNxVgz2ofW{JK zn-(mma=TC+|777Trs6zgOUMQ0(d8TovR|L=mb%k&F9U@G#(^wPIE90#m55v-Y@ zJwv~yeM)PeR0My&wE$`3^$C=_uQi{*D4!S*)I~HCDsOJSuKJybvFPrevn7vZeV=IZkdRl9lNM|$G2|wS z7n3By`Ot15ocIEy#mBF7rj8UL^f(g|8AJ6ItxqXXtdc@CH@65qmmpYA?*VPq zKGOp^1gg;A%#7sG+t#bluT#9f+vhcSGcE!FOfXGqe6k9ORp| ztj#iLflC4=vz&>+QAOjOH5EW%gqY=OaUOEHf2JziSTk8;KCuh-2N^VBu;&q7n4_THpHZt%A!9mocd3!{)v=iV* zq6h)W68HnE!MI+{{mv|SlUXY%LbI33$b){`fIMsyA? z=x~5e7BB}s1y@8H31j@p{l25RROv`)desFG<19e608JXDbpaTwC9uZAH2<)*hoqqZ zi@VlDB`JM|OzXPvJJh4pJ;CoDdYS98BnR7BAIDrU4$1`j9FmxNA;Z)d)@5(!#3 zHLy<9YQ*3dEG$2O=1wd)UJoM?p!VQSq<8zZlF?BySlBcu9XS~9zXOlaJbV5lAGAG0 z^p2Q+w@V4dw$O8+n7xpySmemo3X4WIO20}sZ(@=^Ire+G_BUel&&IIS z7|>9*7m$iiva90ENvW7#<7SGro2$~&5_q;;)69w%Yy@(-==#X$)Cu@nbwLNeUR;{I z>{>SNe<7>3{G}b!JMnm}QTVF+G&q4kH3rr@IuXT@KYlP`NCC*StLXp1>dh~X^aoQ> zCf}<(6h0zqFw>PE=a&&1NGe82i@xhOVz3b-z|oii#dr&CymC+d;xJf>>gR=Lj|Rbj zs1~u_e-<~fzlXO}2lzUezA^S=FrSh={}{Lo>(%ztUXjHms9E_VGT~lG| zZ;!u!#>D_L9Qb{dibv*Q$~WM9&CwS-xgWP<>Zr}7!=V&)B(-W~q3~wA*PfaHAOm|) z|0!a%J3RKv*ZkOs(Nv6s@wnWKoxNtDI2b;2vy1H}i_xbraBr%xnG)pxe#Ugmq@9=X z-mi)>0^%XRnBfndGvzlbP_7ZrA@cZ6Km9P44ju7ba5qoz6X?IUSBRbb!8R_$0ew?b zJ?}GDssT|g?Q_jff5er8NJBD8``TQpI`kHK7Zyj!834?%6OEr#n9l8%T$~Uk2xeK4 zyP-FEJBC#)>7&t3f;G}ZaP$>=+9n8;tqHCm$7`^9yKx z`2!K>J{1WF15bbNSbJPjo}X7csf+;=t%JJ*bX-uKPGz0*g*G3=5D`zt)pRPO#CT3H zmFobXK=xV0q~o8=9}umQ%}MU>`AfJRoa)VI{X&OfA7MBe=gc|>z1$_kc!FwU+OQLK z=Xu2MJ#JJxYrnUS!ZQOf%i~+6*S_b&`-zHPRA}~9T`KEC+<|Oh_n~Dw>zDaKi}ZTK z=$4>?8jfOZLj^()ltjB`8Xu+Tt4xwRR?sy*5(Rz}%c}U}_n85M?n4_f`Y*Q(oRmHo z(CVu|k~4e)Lwm2E4v2H49$4!)hC`~$lJxjF&^O5JPq{}?!y;cN`fuXm4Uw~Q@2|g- z9K?M%k31N}M2pLU-%~|zPL__J$&0n9rEaKoBb#2=`-iqtV^Wou5?GgCt!zb+$i>6lRbd z)Ps1XVR0$p4~L`GGd9)8rS#nVJo$jG(Qj{Y{X5zbWNkBBL*DD(Y9zq$TnN*0ipi>G6Kqhi$Q_gCtZD8BIiIKJQgg=H=(~! zcM72RHdzI0`oo#p%7S1fDq1WX(<&pzHAu4Kvm_Ffq;rXuRT%OiSCfRD3TyXVvu}-} zdu>}#pCWp}JEv-SUH+ZNsH?UZUEz_b>Ox?E7Opc;z<+S|-!Qxi3S59}Q&tuyh!u zecyMTX+9jSRx7*%s}B`m*?WF5WlSF3pV>#gc8_T%C2BG-U|uB`P;d;5DDIdjL_KdAR59wHA=ibDs#e zQ;jA`h zdT@WpVnd4q#gfwj-Y@f~I&c2K3_%Kc+R{4cegJi&r( z68J+Se{%*uA$U&LdV?fM$99g6N|bxqjb_#=_D_A5gSaFlppWhc?h6y-)%T|WzgUCV z7feI}+1~#G{Nmx{6{6#$b1<=aB`V7C-OJG&fvVbQxY}{3&~bBeB8m{5U0mt7d3gVK zgy+11f;|6s!t)vZh4{?|Lcd9^T`sS)-_aTGgZfdBQ8w8)iCzLd+%Y%_<^tQX&+k4a zsW&Pt39GAmD85BqUUQsdz}I1=Syo8_we#A^-1G1q7U6_7oc-uSw=sb@Ef#&>(3AOG ziPrwi!pF}`vXITopE{RO$h&y27o06tsvX?C*2QRNOG(PsjHBMG^RgGbC^*6gpXZi4{4$_GjYd_EQTFWzcj%>2Ip{%PqI-;a=G^yaDg)VlTT zRhPIc<;3i&P^L{?Ol8t?6JqP17kn%K`sj)~l5;*Z_u06}FQmid|6#dUNA$&^uopAV zMmA-`1d>gM1;Ut|fYSp^UQd!_sZ8<}G78Eg^>`lzvTUfG7dAUM>OAd+{^DijwyOEDpnc^qM6+;|$Ijo@Wvt4(#flIuKf+$ESR&QO$ z)Fiq%AF`!j&G;G=wJseun``v&Hf`IvVT$7O=ZkoIA>r_}`=+_LLG5#orMcMV?Wz!s*F|+9(^KVf z-_LJ^MfrZ#m1a|bWK!>aV2;sz%X?kyfFH(e8TxjrRa?$-eB$mQopY3Xg&W)@Esi@b zO_PSBZrvH4c3xLsnm2!?_wFMrh)1W2?F1_Vlb;d|Mz6}X39Uz6B(ytv515INDSHG(+?+4FR5| z8&l60>s=|>oWH4R5M{1>0{cg46d16jq}-}k>b@-%4{%eCZfGdIXPVgWP|zM7Usr6- z=GoEHi=Ws1B{P!Y{X1Yk*IT(Ddx9|Cc}B(!uP_zN{+s7I*?_I{VDoQhxl31#r$W8* z>r&kSHw~4z@)9jt2({rxy`DQ?z}5Fk&>|7cS;xlbH=~snnPqXqqTp--M@94Wi-Px& zPAR|Ih-LsH8}(UJ@efJ8SiSkbqwBqTy^~J{cJezi^{N$7Er~V`Hdzxp>v(QTyzC@Z z#l~y`j@AKTMQdtpV&G0^srk26Tfebgup{j6_u9(B>le$?)q8a9FDthZ`hYUT!g8gZ z&3S!tGwnCroBQiX-3fVCc$Y4uJeU=33Pi*yuh;eyrWYYyd8TW>@BIS@)GSBl>(iTnj^ zL=cr5;0-1NOkc!Bg<#iOil@0Yh!t!*c+g@SZ|w+hE4r=RK)eBNHFGWkwQY+1v^FpW zih11t>ZoOxiq3eFJcBwwfdqn)A>-u5|LO7i{uw8(Drtp?}eo~Pw`M{yzi?4*is zJkkI0M&mK9=}*S=Q-!Ze&6kzI!RMO{j)LdkZV$7ioiEqZ4h7HGI}*4pU z`JEhjYHwj*pt=N<<-=Vw3b>%ZOB5rWm2G*+bZ;2*6R}Z7IrZk>!9q@D zIHc%;b!6)x^dsSt_LMBa6kqCM-evGgTX%*@((ky26Dt zM)lJi?|e)wC93(2zgD0TQYPc)QKHQ(ANuBomMarW2Q7cvF}8vWU7iL`5rR>?P!HFY zMvgCNQ1lvGsr(^Qg~e60$Fjz<1fQcDnZ*`^-a{!?AA%P>6d#m^zg$KGbm?4jb0z28 ztc=npB^!(Eq!^Loi7aWKY7>m-nNJpz@;i=cG9{y4E0^y$OjMo_w9k-c#^kDG$ustiVK zjJqL~_alX%H!(t!FZ?eOcZPi*o_^QT3!Uzw7lsCX#o?t!+g-w(mW~aILCQ>tb)1m!X zy@hKp@L zDTZ}={aUhXWwMqW%38}BvnN^TkdsZ$!`grwb7v%3dIL4v+yq?nTIk#AkhN~`cKvD> zurRZwpm;#l=~2Fs4CSIU9UTxnM7^A^*}I(Tdt03uS7UBU)hK4vdU8~@9p0^T-CuiD z-t(}M9NnuF&6cw6N@oOK>5b}*jb{6`?)yEl5lc3**EX6h$N4Bev=lz4;H}XTDHjrls7ckBCpA$FIsP*gGwVnrme;{xH$T{tON4J zho#Z2i#f(WnT%ee$&Ul9!=CdjG2v?zOSf-!-y$+cy+$*A=kPD@Z#oVFO)<9ELe8CJ zS5Na!K2;<0e00c4&7f8mNlGorfpsSE;^gP`hU6_A&!BrX^WS=s#Skgr)(e`Tc z$ZKo>f+v7}!_~E7gPfVC!)E{LSrXXt{McvN-jZn~W?$>QNYW#V!p_s~}}vvi&uqJi8{ z@QA$FpPExIQGtPxc3TLs3V=CxeIV8r;-@v>MxOPQV{YY=bBDvi3E@xy80P+5dG4RL zGgPmxoaLg2>TZ(sc1sp?v>8!rkJUj`g!-GFer{~e_3XAf7*w6)R3OD(jScT-X{3hS zuqRNh{v7KtdhJ^Kc9&#Y7ByhH{sSaV1wfg%KEQhPwtB77;$sA}x0ir6vV}cBBdyxwRt>!X!LJ^(ndhn66s_C`` z--7(&z`;RAk_NDQacueC5ub!Zs-{6i$IgSOv)9T6S$z{OHcDfOQl-*3#^S{5IOpPr&ykMW_)M(Xsti?k01mrb}1)JPy$iSVhq;tm(Xo7YHPU%V7 zpu3f7eK3;XU2`GsX&&P?G`ydvv7Og-TkL>A0%1`BXyw+n2E^w6Rqm7)k01CW{5!tB zXV@l8qr+pHTJyF@KGO+*>GUVTfnUnZL&;+x{MH2f(SqaQRl)G$>sE2?)*Ohtz*Z9~ zffWE7TVn$EDhr7@21Z<<=NnUZlw6%b?CR@2t_Xotw-!rj zhF*bJqc`C2eIpm2okP)%_ijfAGdlw3Tv(!tz;+w^Juf=a!TvB&RtyYF+Xmf#i{~4| ztC@%T5{d&z?=d7v1AU0L1kZlmBS`yRqFLCR)@@mi8_RF|-AAKoPchPyR%{`pjr9518A^t5$-)5 zr6Ug^z*$G;sf3%iLeKHEmM2>Ni4Rm6iZTKf^T=j`h+sk%V3#r16I@Y`iGVG1DC>8s z$!Y*Jb8ndfmS8}K+3F@(Jwe=Gm?ZT2p*R!MSlOf@yHCm9ffLj?NerX4085Oy?$}aY zmd?IF5;c07bnUNk-T8a%qhR&c^L{HjpjkbbJRU0^EOe+i>3y=utI0Mj=Easxd90aiV9{K z%@sH-2Pp|xi6?f?*VxvZ!s{uKHU=~4Ebss#>C|>uxRrjepkAe({r=hw%#e!=XU;2b zo=RQ|Qow9lo{w{JoYz{kDZtoG3tnOL#zp#Y=Vk{7l+|XV9OCvJzF$_0v!Ll~%ogJI z4Zi=gHUH}6 zq*~U?bt%I4QA=o1T;#5mMsRAsc;iL7e z#eJW1NJpv2!c~3g^^U_}-fr+6sI)N!+okrJJT!&W{i4R78Th16I z1iOv;2sMPahFt9D2ZmpY&!*gDyZO3h#m<#SnG# zYl4W3DHqv<7)8C?g)j1R)m$g)6D!sW#L!b)<7Z`m{yyoP5?o~`lcK)D&tG0N&(8-J zsb}3`a#8m|S5&D$u&p>7ivjgC^y(XLzYfgMnB^;785$&>6-+uxh1YLL59 z$=a>}fv_Ch9eFzMBMwsj(d>;kHeXLJ zdSYkKix1UQT`(%@OACNrSSh;u^%fKr5(O)sd_`=?S~|%k6!h%8sDrz65Q-JXN!#V*V$WgwMiM7 z-+UOTy;SPk3sXdOb`;xoWE8L3Vkv#=WyO!qbLQ!rrHS4@hc0TGHt+9*4lvhkX z&&?-uP2T-2!RXD{ZVlLNd$$a^juBu;(`-w|WEcU9CFe5O&DYBW-==nyM8&A{l~^@{+`NAF>OJ%$1>-+|vqhr)`!^@@ z#~WGIXSgyp7g`_|c zI!UJb%Fa|R$*EA9(I$0U8wu{p%{_0{4TT=CotfUA+~jCv(YIN|lO#$(JRBBc?F4f@ zH$i>t+uwxi$pTJoQ*=4Pj`l(tcHHkn+-(7|F5#U8cy zeR8xZ%Eo6{3q^k?qraD^N)O?fNc>8dLZDUH5Mf6OmOxMHEBH^S!#>`u25FfZL_G-o z#BZ^`&^|yv3tV!&e4gXmJNBC^?E$vtYmOv3Cyo6Y$5-VE^>K;O4PZQpr^_RUfS03A zM7|h;K+I}^;TuiJW6E8m#Qlbc5CwD95~@@qTaKMxyei zt@UgCRV_EQe&po}yvgu;b~j;N%5t%ehw-;Ef;`^LGBw>HqTV&?&&&=4Mwzk0tV+QdTbi z{z)jfb+U$-T;zu~^X;s2FwKK?E(w^p1)fk0is;6~>QK2u%QwIkmB17?Ib9Ckna#hm z%uA}~84{+~+r@2oN?ypoKX#KGz%x1sybZ%U-4QG_!bCd=bj?EzB~2K8pZ4sniwZZ? zpqraBsh$cRH*CBXcvwW*=TuX4?+G*8(b!wpVe^236eLD7XTFT>2Q%_GqqP%w+sBn*3e@duWzKA`~tbczNN0ivi8G(ow-x4c8D6xdF^Z zd*>$L2#o3eG-u<=$Jvc`>|L1Dtm_}uZ<6Ct;esZ2*D+(#r9m+PRh3}A{-$+6v1z6*9- z8*v-R%M5z(z4Wz4C8!)525f(4&&=`*W8Zj{XB##ltF&aqylLD%wz zkB*;PePBjpVL$JQF9ulU@?e3iwQbAdQgVQ7JC0P@0tYPln#|-mELdGTT`^fUrR0#_ zbhyTVT^eSDe(j64PQRVr8tii-8t+QmgVuCyS>u0t<`(L+4PI&b1*XHaG^uW?wFJUl z9^Y15nLg4~XA+u?VmaUIRx>TOFEM%dV538$Y~i0L3`v$7B?qki21BJx!jsr~hqg4O zj+t7~c~We%Hf|SB7vn~fpmXN${caHMF@a!ipv7DNgGa7z@ zmsb`7{k1vkodlUcUpMa0;W?FxPj-_N?FYeG-)hFn{(wSguZ3EQ)nq6`1|h$-0h+g8 zx;QMoijv7$Ep+?2D~Mp-zrQ_+-$=e2^lr&ezsK&Xoyk!ExjwvlEAA)& zJ^#u-aQIu>UGwh&>HrUGo^e;YeA=T==9=A~Or1BQ5Ct!S%lAL%97jQoNJb^!aW(c0 z!h(=m94`Jm?TjBCZ`C)>*YRwpkv96Yx@RfIz`uPYE%VVY1oFIst4o9ttG$fyv_#OP z^BZ+dpp@VsRq3~S3R{4f=rOk0IQ^-OfFLeoBeS3|GL#08Wm_EuDgvhNP?r;L(a@d` zmcqmlZYS97KYqYan>8t%LK&~ZaivEViU?xDscYl@1CN*KG!Houi@6|gGyi&wYf<+| zWHqPy7G~~Ye^a9E6pE~avAK8`2Fz#nG~LqV2DD~B@U8#2N_mht1C@FqW`E3@x& zLY>m#O^%$L`7}MTltvLJawT>{`Kb{Vaog*htxoAnO`ga@#y3w9OMBBg2ln|uTr3_k z%d8m1LDZfBiE|Uxv&>?_QFXlz$GEgT#t^|3=DgX)8@RzFhT52VuKCAGD%{I~96A2_ z02S7I4%_xJpr{4i1UJD-e)UAS$XO%$!iQ-P{RaEuLq2nJ%phx@4(a+5cHtw5i7A^; zjzs0$%~eCL5H2p1&;cHKLx#i>6QOW-u^@jF+^5tBWLn>Qn@CUTW!Pq~c~1#HrLr0W zw3)Nyb0AS$?)Z<<1_HVv$MO|msdyeY* z-miy3@kxwf>ujL2yMCfEmBh>%&rxk(ubR+WVg?J2f3YK5q>G1Woz7)0H{fNrxu)SrP9Ug{=<8 zh0w$E=z)@Qj+l984QMP=zuKJ4w_AX3D>d@ru%a4Yw zz5bi0Ng1*MrC_#{Ro9;RpE}Z#YmHW|8>6>@aCD%1_nn?&L08EhrRs&k{`zPfHU22t zm^9?@larTzAtnB(k)KX&?eDzX8~#5)j&Fa8X!zTJmmfv7=3@;HH$==J_=0+jJ4`-#a=Z$z}p;^JwUfVbqQ zB=A*Mrt>Ap4jR$k;J{88z$@}ec$vs8D{^}J6->-u#5t5MkB?vnZ35&6by7jyYYHGf z;g8`dUG>vXy=@7a!W~Ijj_3`-c_bUig%%4^y{{)k)9l#*dR`S1O#QCG-Hiri{Du-^ zJcMW=e8R&vuIgjVVgFE8QGvqRttk+9=6+|%SNi15E`+AzDz({psq?6~`pc`W9h_`r zXQ#~4^YDhcYn?)D^wrk$jK{@0gWj{1&Q7Z3kMjbtNLLCAm8Mf+ai)m^qXe6 zW7IHk>kM)+2}gcSj;r~z?Q4vPtiTzZ;#78&9eiwA$U6mqOsaYZ`C>&@j$P0(awJ8_ z3`y~K6{Mk<@hCsT`~O+3)CC;em6t;t7!f0wQ30g;6Lhm^{KH71-La-j>*D14A@Jqf3#~z9!stc9rHHM=8juh|tpE^7h1JRQ-i}<_s*XF@dz&h& z)@J9|mF!XU(J!*88NN0?!yEM?#V7E$CI#6h&&(C^#VK1MmAukENro&lR_y6ZqdGPZ zwxpW5eY952AbJ}p&{WOOpkpVeI~^X1VGBXhOM-~gSM2eePtG81Kfj1`l)uvp&0iFrUo!mR6U3;Ymr$co)Aj&hS; ze&x3q=XFGbW2|e*QaA`g@fKDWVe34-=muce7DEA*o6i$OEgqYZve)ir9RYsvPS;%h zx^qg;)DAuAN%gDX$y%1O{)!3Q2y z&kXD8H_SftrhD2(RS1B3tP(0-qLz10LQZC8DFMU{^RPU=E9izxFL9(}UhTQ%;p2?g z2DVvKgHAh-!L*17f2n8?#;hWX`vAzqa&RYynP5#Aq&eZKyk%?1?%kuHr&XauQ8k>} zEy@Rpdj1&Yt=M4vrZNKnik+<+pqY@t*NzSAn|l>iGs?V`CCfUHmOxKDO;5NsZ^M_G8Na9@Mu1MLX2Md~=XxoA zaB5zA(wj)tuZ2iCgUGIXK<4u2kdB0$IZP7HQg?3+icR zHNioBhbp=ilRvxoW}+#%9#FM*q3Ij<)^B1m_f|FUAXiNdy4de6#Nj6iW?%F?Dvk+U z1eaenEX{k>5i6ER;35i}ZLR35|N9$_i&lq4hL(`>;g9xyM8!Y+D*2~aO|NU*7;%it zUjdh;linMCAo!sD&0)3iYubjl;-WUUj}kK$L>d1p2#%MJ>;DS`$Nj&}ed8ARe-wU> zBe?hv8(#aJAh`G+l3BjJXGHEse?_tjB&@qb9ri~;jz*KSk9mGn|7kI}*jh3`~%TRPp`SSs1vN#2iwy|`*nLO&3u6m#P@-sbt? zFKbLfO@(9|8>#hue<=Ylh0HA3V)ax75Q!6bnBf?tb~B``OJ|`Yz?SGMBjXiBrOW#X zXV7kZGkuj&_goRHtw<2m9;+%G(-@Q_OKodge9BRu1X6Hx70B(lPl;F4Pl-6t6%z8xjg^pRMprK+n zOu$TyamHlBLR-Q5uK#{o2zw`KfzIc;;uF+%*nE$3q@=Bnk$J({xFvU?p$q86j1;6e zEn~HS@-id4(h$~V$7;7AtRyb4x7ySpCvmVFm{Ei@7)Iy0Pt-+s;G&l}KX|Y8p~98R zadDN=9>^m{BwZ%4aBH;i=?gr4<65D=C1SVOFlggz;#8SWOnp44l_paCMEhpUe6Asm zDnpjj;HP8hLPOHVd9>ZaTSBf;=lIc?j|UneKg}hmGTKs}E{IT~MiI-|8fp^$@Y0>IWrU5uZg!E0L*EZ zGc)gLZREda9NO&VW8DDa>l~-sjyfr(3YU+m%iZ^*Z7QZ`SKw~u#+nw>VJ1g>zpLA@ zBtl`PkJJOjvG*CqmqlZL4Ns4n{MEO`8gvqYoIb%p1v8UeIdKW|s!1yU;8u4M z|Dbtwz49VGU3q{>Gzt-oQ46BvS+og}4Bh#l%?Zx^pveunC#iImn+@QJhXL_({^ z+C*AO)AzRFY&~)DD_kPwO%a1r^Iy6*iTs1(>XUu#rp3umJcd&7bPsDy&D7?L+f7-? zb>Ld_?qOeaow_*B$*u_h1&NC{8j&emRE>QAiCh%>(KGb~!Sw$00Fw@r_S0H6w(jN* z|MiBG155jejy6Y;S2V}evdR8jhUgh+_*E2oCma`=r|J^9-u8-51Q&0nfk|$Hm9oih zg6yVXG;TaZ+?7 zDCNCfJSF?XP7`uloshl8xI^dD<&&!6^V9j!!RP_lMafw2^`ppz!}G+?ZtJy4o`7iI zdFR>Ly_LH}r?V&tiR+V^Dn&oP=kdiQm~rr?V1dL_n(52I^nZ&q5xijkQ>2+u$|3P| zej#xB+LHA7{O+Rk#Q*kcYllPAxarf<`K0Q~)BX9%?}f#*`zu$5b`Gt9pp!K&|Wk3gp!l#6LO~l_hRwxQ-U}jm^cU5D(kLmsQGeFW+IUjSUd; zOk2_0j=$$W*vfGGcx88Y^6}a)*f)ag`C0FVYxm83JIWIH)~TxceHTrQzpt!1#?){; zjjQXUp!cZhuGg6u8Czq>E<)wzI#2#>_t)j8B#>P_RogWo)r@Atx5BSU{LV?=GzMBv>&C~q$RT)S^4IVDU$?h()7Y4cIa*`Y4K!^a zZoHCPcHgtDtwXFq|57V|{fpnshlYZ`QU0j$qUB3D*Et@v%D*q2RTfGARQkwSsaM;a z%S-&Etl`;b|C&Qx9 zh-I(u4vtC^epiUegH&Io$j-n*i}>EzSxLA0dj}lCRNKEQprSRfGgRR00rWkO$C4h> zmd)?LtO@k|HCOMg+vOT}zi3^_8vbAek|o2!cy-8I6!u0X~zzLxhsPYGr zpT71fE{WbWM;U0jeJvTs61{?>&=hk@o4a`YUCdjeE^~hINxmk?8b6S~@V-tt=W8k% z@*RFjSM42jj!ljczn(IxS+{)4HowG zVEfl8@b!^8lXoFIv7X5+d$b6?eFpIoWj5VTxu-y6|N2?Z(qdxSvQK7@x`+oCa$M*a zW74bJR!(LgxHO}F%lScDSR*73ist}Q8EzUN-9OQP|F3b3M6l5g7F^VTH-W4Pb&8GN z%*A7BQNL$Z@8a(<)~D=&l8#yR3UK$BMvYgS6%EH!rBQQ8?QgT)8>X^=({L)duK{lX zS#Hqo#y7i#`2ErC&7VTee?HfRWVd0rkMDhP@s=l^GPEHV+5e_Fw`jn?Z*fGGF6SSFGAa2PHdMxe4)R5*suO+-~6f9OZP;n zeRsI|eUMKgl`v6T48L?0p}n=7LEQG%g!8V)L#scp+1))!;O?*uqJX}rFzzkyz97Dv zZ@U5LNLq=1y^wHY*z0(Pus}=mfti>#|mLcYj+Jb}piDj)#gnYz?l zK=>6jj)d=ViTlhJYy{=Y>@>34DtJ?hgcBq)Lq-7b6rF?SX6z%zzNugD!!3Hkw5(iwb;3C zg6MJ(9)2OTz8_?F=87pSjIbcCy6P(x`BRLrczvcT$amM$mAeGTbBFz!Ox)3cgplxjEpx??GCG*#NesEVXQKB9B_+Xrpc;EKG$dg2j! z&nF{QTV?c$@@}!<6a4EwnC>54%13(FRfPIAo^A-Ls5C7eLcLvBFBB@fJJ6j!mrY$~ zfhhy!@OWI_=0A(RJ$k8w+}&|^010f{@pP+t*)H-Oho?Vvf_@tyC>#Ru_uU5a|ZfM8N@LScP9w@pQ? zU{WJOyyCL)i{(uMBSbzf8|7H*_Y$;HpaY|S!sHj9Rm1~H?T%t}A55}_dS(C2dzVt9 z5G;K@77K>K1dj;R^i5T^7iL!WXSyzs+ACb<8IcGlwpa3Y?J8s{+{h=kHxS~{v;jus znXUhF)G|!^C@e72^5RP6vVq@*1O2mbPN&Du#(H%hPP!84oiDRDP^3Np)kHjJ<>p6Y zJB^x;7+rev1!KlljN;D0${#3 zNW~Q)^B`2>T)svzNo!Ev^;j1PqQwbKVcnII56CFma$E;rZ9cpBNq}>0@h;gt;!^%O z!bHFs2(FXGWXcxNawc;I{;FffEaCOY-(=rxu(y`LSMoZh8WtO}GbH%eL6_YGHu8~jGC&uX7W#`K=VzCRaX}fV3Ukc^h-Iv|HudR z4tVL0a!W%0=&Qv%)O?POC~jGqALmo>4YgF@j#uc9c~380*Jn~k8#4BlFWhr9Vr639 zL+86mFDB%ldHAyH@bT^LPyg)evq-%J^sOp$7(E;&Uc=utPJ`J>(q3@z5)0$dc$3-K zVxQ)e!8cE<_d*eriHUIxRt%n$$=lanUMb^emYm(!jqi>eWOAPQ1qv6OBnWIdDE}Jp z*X^03wuc*NeejiC$Z}t;!)efZZC&+t{`|L>Nc#Fn+^+KqN!`icc|u^jgv}uiZiC@# z>rTWlI4c~6|HqrMVtZS8GTXY@&m%U$`8B^cA{{NCf7-d7xV_@d|3TSXK(*C%Yol#x zp?E2-!CKs10xj+i!QHhuLEBQ?f6+STdUqO413Vgj{p3Me0)^F8;#@RS-I`t@Ag3cV zE0z7LAdv;~A4GcJTsuYWdJ$5$est#-QueA(p>gKSWz$???E_)V!c=I1W-#88& z);13x10>9LB2LRcv8{bfK@0K(R3aO9M7^!vRgS?OJsM=O?c(kav&c@?!m#}a=aTQi zt=QayhB$0H0QvjDd&Yomr+Qx@?_$37jlYcP6%2Bk`iU(ledH%fNMpOXoL}#=4_Omv zp!SA+OuIGW#lwJwXfeUs2B4vwU(n4(`{PAfAaWl`)pt>(h;s{PschQ$!V4LKo^ zLB-}E@L-baQ?)6tCu;}?1D3XIF10PD9s2rnd` zgn==g%f8RyoI|?LRQmA2`ot*_4U$bFrEy>}o+L<64AbH&404M5iPI-%b}4A1ZL=Z{ zA*r){%73*y%8VB7bUW8UQwJy4NdEcRSvf*s?p=jks{3+*);_@w@}>shcxKC2*DfdL z7q6Cf)xlnMBPDkgp;ooJE>|kl#*gA4+i>$r?&{rm0bt;20I4h!JkVfmD~=nPVqLay zo+7rin0q70cu7vTHffV_RiA?@y<>P=D&UVzyJT2-!^s%>m#4J8@riU)>H6HJs=&z# z!Ws#Bjpt3<^a724&K?(I@i13+tyS%=&|MM7F>tEmc^#akI^tUj#XLn}JFP8@#k@!$ z6|Bh7GO=olxZ0Ke>5F$K*ka+Q0Xfaf)kSQ_BDr2KTD)HseR+!;yCwDNKXs1q^Kt*L zI!FGmt77r;bN+o|U~kr%GhEQEZ~us(Maj8g@J9~wqhQoWj|YsZGZDS!zK%3i&LsX*beubq~BI2^D}xn!r9OkKn>hy zGuY6~cjPmo4YpA%A>uJt!{Wov{DIXv=}f;1VJ&!F&Fi;#@4R32 z;C=pqYDc9=zCrJ2kSfd`YK9VR!O@3pyBEUtgo&ttO`3w{Jb@`6?-4BJP_)6hn0Fz{ zKmrmqk@D2aWoL%#RAb&PsYZR-O@Z!lR|-$ev!n*Y&1%Ca#uo)Oa6KD;U36`g?sBOF z6k8Vb4Gbq1P0}c4ZL-h3<)&0_WR6y|dWr_vW`>RM^1kLqN4|H4pPcy=>q5x|-W$H- zXD^``=NIb$yrp@A8MoN=OhD;f-%H0dc^oQKa&AEcvUK=f|uEkCZ2<829->>Dun?5#MBY_`)P0Hb_azQr(a*k){MA*8s5>| zchnGwSa(AsncFRXgl(0vUNGLr)ocQul|(ez&31<;=ecx{?BFimz?bitki*kk zExBWF#58Aa@D1zeUUjEt;me4nO2ZJ5`R48$U&BssnLQIX_I~&><)Sa*4a(2~MJkKZ z=@AtX?UfLFERoW@1Bv`%>IFViG)@dwt{ipx@Z-p&_3#iB9}RYEHTtB{IYn7|*K~>M z5Z1X3Ae(|1XPCJn6f;hvjukvgA6c&8jg)Pez-SwBC6AyA#rr^gA(>UDUNLs_{Ohm* z0?(#)8YSn+Cpp8H&mSlGe@k%l#X->Vpi3k=_m`t{$$`@qzC?(P!j&GVNC~B`yXguw z(sjrIIn$|i2Hh(j%5)}0Ej(5~<}u?poiKBBHw=f~Mi^w)f_q*d@L!REC6-y5cX;mu z-{;0P^*+oae#V3Gs%m(oZz*PDdA2|EQ=%X(J;_Z{nkHn@mg9#pR&D3AL=2zDq?>No z-EY;_5KR#^nK0MH4I!@bx23N~k-=n-g&I#DIv>-S*DoK*2GJl0HxlmOJB09JNE(Rq z3ePpg%{4zT4WuTKvh!y7(UDKALEdcy^c9nQL%%Ka$(I))5>No%5r#sdFCyqu-$YzE zxOax>Qjcbu{$#lAy}p#V&6DZkMDP<)vfpn78l_M{%qKtF(Et+F&pF^HnP1m^oSD8b z_w!Wx7^}lcVqr0&+cDtY7X(>tVaf70Je5u0*A?Ba=+d}H7)AHn&g?OLp;MU;yxdyK zxxL;o$qw=b2ZGTv2WjZ3W-(lBRtLn-8G`Ok_x+de{IAALZjWJ&cjt4Rck7#-;^H@# znPLs`^DDnHj zLL9~$w^!*wmvU?8Xq1G5T3m<#G{Qm9L?h4Hm#>cpLxLDCM3aD7MX8P~k^1T#xwe(i zikG9lzC_7JdKj@a<}8Z(df?oepNypqHD$>&Xv`?Gq>Dq5I-$5)_p1O}vXttRX6*;% zhbMfhJ9|(W`?36SeS$S(#2krMFlD;d2APUX$3QNb6XC}Xe3#5(uw47vW_xCxrre*2 zSS9?Gr3DtsxLOF#qQ&JDg%&2*JwL9rcW^qZUgdV??`_wEKy4j^(q(wu+B)B!Hq}vuBIT zG9ykO(3ssXiT_Zg-|anha)u)K5l1)s%)#RbUV9a2@0Lf*Yg=~`zOd@-X#e=vwmc+! z!FU0LIo6O7>uE=smfWAUST*37k8|@>ztb-KPK)vTcsXjCV?Hhs{Ap}q`Q?by`#)(1 z5WIFOQ}3tfG_v416DHc)Igc%Q(s>i@x;F4eqAYn*dEM>045{?45?qRunul^o1s)>y zKU$e6`-&fm*AFz`h;DRRqy*f!-0-|vnE~98sW3SPCL#pN&sPYONUQI9it~gfoSYL8 z{A^7?nQ$QJluK-6IK~fEM8VNG5pmyZ^TO|C+$y&F@vrIm=$9k5_QcyS*7|CHY{=At zl|J@6b*-!K6=u;iQU%CIjF?PbJ7L};EW~!#E@de16Zi3t%%jR2du6C^c;qf^lpEmk zTVz-}8gQNVvj!C|k7(n(b^QMvqs;t0?>hxB4OP2_B3YRvGZDa#+^EnNGE2C!!^bu?D z6srr;)xO`~u5f?KuGe4Np!!E(r^$_Aud4g$8Lv&xdaKEr7s1lHq=UZeHEnNY`>?u0 zEJLk?i@h08mMf-61*11M+rz_R1d;sfVD>XK=M2m4Xx}xkR6a}(A}ti_M3p|EqghW@Gt)N8|HFwMX>qyJl!Oc2 zHnZj~(!zCr!y%ASPFBB-C}r=jj~yHo-F#w|qna!kDu`iGMYzqyj4Eq(`zT~Wr>H-V zB*sOxR+eIpR?#;xOg3K}VH37JK^69yDvWly@Xa+2+9N{QWZwuNN$^fc@IV%isSrF{4Ts*ETSZm9| zi%kJ2neoDlN^u{z@Ung$#2zkD#C=?kS78=32+ZhLKN93;5H{oxpKpu#*!b*T)eEfB zBjZz~5uTW$gg5G;e@uSBK$ywaIU+T#^kL?@Reoe{&8z~OU-q>-0hQ<+YDP}(1v(ry zn~pzE@nl53$fRX7^9zF6w&GFXps@R+jPl$CjAN^vVRXmQ_XyTHp0#0Q_~37ULDe2{ zKWoxL4E};Ovu#1a3{cspwc>usETNCQvQv@J6LYPM9Qh-j7j*U+ohD-X05`39ETxa{ z?CSZ&awOE&WQd2@#bo0XMh5eQ(xdqzCb&64`$NQxf8sT742@Q2IvpEcj?8|DD~7cu zEnX{s?6m7$Ywn|#dPBRIsr<3luD(NUto*4}MzuT-Ke@vbXhRSMXmVxKNuxn1gV)Br zjbw$!qye14=fYzcy;sI*nbE4}E>IXXk#&CqxYQz?Mv0*!LfK9!)+3XKDpDMP<(ziT zTg!}eJszGpk?`s3jvOa;>yh5*KF7*bpm7GeWrn9-ExW-^wFg(tNLyKY>e2`D=DzC5Y~0dq20sYWC6mxw)7R?uTAc-uGcfGZVek>WoAi~6xQ_UFRCP-0 zSh|V9CHxJbQ` z2!8_+$`@WWi>C>nPZNGjD*EPA8uAL`aO>u2yw@x#T5aR z3vQbjRY*l?q+)L}hv&3I9KUR{`un-dR=EhYii)LGo#|B_LtlgaasxlZ*;{SH3(#31 z6KsO1g-m4H$VD~_xN48fQXyJ)vgI{rU#Fjt18V3T7A@zoIq)8Mkp4nwt(cTkKUfVvu9f$g$ph@v|*X{IN#Qm;3B#NSHJd)|=1a zO}L^bRM*~8)ZWr`xE;F>RdwIJq|E+Q^G7;2t#tm2{dN-4HUVe$5iui1_tBpd)!Y56 zNlR}Un-14HqPDBPo-TbpT{6dHfC`tYHZ&5|HxhwX7roW93>$#;MZo%|!|D5KqWjiY zHtJV4)%l6)rT8<}Ij228hVZZ0OO8H7Bi*Hu?!C!lCq`QR`{q~r>R0-%aEAcm8M8zr zNE!+1^-58m*i1x9OCzOwWr%4-qH6;3ivsfJ7efa43u}x^gbegXWbO{A%c>C5f*9Ny=z?Q2IizG5+^XpqD4Pw#l~gwDWk-eG z+MhKG#ZSZ~OP8kzU88vb--2@YKhYa9!JDO12 znNauo(A0EuF73-M?#tq_OL>u4`(4WUT{0G6##4qa+yW z7R=I+Gjzxqs4mCv>Q~2dSI3OmR=S6z)>lVzS4WJKf3mw!*||_jI{-(SpvW$|`&ZQ} zO#Pay9_XD1^nN^B>xu9qP-U!c&cELn1H6A2p;XiEmDld|xKAYIw6W*7%niDjIe9Cn zf3Z&W?cGoVD7Fq1t7F{kTF5l&2RYgbpW944y=pyTN^&LUyhH5REu8*{KmCCx>IGz5 zS{0dG710OppI+IlQ!NJeAD>*1$-Wy=LbgJa_xI+%UKw3ZNQ|j?WMnKl$g)(f9PGIQ z#mxBkJBKuF8lEo&%Pt1Xvf!?^rlgG(#mv4z$Tkqi)e*<(7`NT%)!pFyy6pjhg~|-X zVU*w2S}GSh#3wt%^)GJskPZ!ZadmfbDYu#go>WQ{@< z?f#bFi=oy=?KZIH&;d5njmv1}^66gu>7IH?4ya(y`n@>n;wo@*6U|vHSOVf?csIDw1Fj$V*R?@Mx$C`XvE_L_IoD`GSzog$+zn!>xo9r^E?i^>as4A~0 z4o_w5+(m&ka3t1oBJe;cup>ib}o$VzLIx< z$gxHB|J0)+$j9@)=+WWk<-1??$^~D)Y)IMx)J8pZ= z!LAMBytdcEN;G)%i+9J2X8Q3a<)x~-t*alQ5hK_y*-+uAeODoEpK$K$b=3BQ3_#;; z=YmiAl?~S{@&$#)$}RKRSmcOzaQCTS5NQ^;lQ1QbXI_+FgeOHU^GS+Y)(fhoOgPx_ zV01{d;mg8#KpQWyDB^w?&TwsVpi$SDMIt7;!OT^1D8*(@a^QC>Dm5cp(T3)qn+ql0 zcwmu+uf324l#=GaE(0^ZrZgLoV*&HQqm>PFr=$7ZgdA+WC`Gy2s_lg23!9PrK*T}K zUCv~gWU!);Ga9dZ@o;VZx92bh0#wl0im5=D(MQNBX8xw)Z;>s&7g%xcp7H6%o zS7(}HvQV4EY#S`hD$e@7Sl{o=3B<)z+--UB)6cPvptu3TJgLURENj58Je6PY&TV`3 zj$D$jj!o$SlBjBl)?M1_!AgJ>u~4wm-C7~{n(B>bm(E5Lt+>n&AEV2kIqRQe-eGTC zGy(~pUF&4vF@!@~*`hIDk-alFxI29#x5Nc*+mmd`0hHrL9vI)P`2%23KDOb+u(}(& zdE+>9^KGZ;%Dzaz_qjgm25xf_XlURp&nexb%TG5OH`;aJ&;z}%IxxXVCC{EtuG#+9 z_#mfs=FeuONRnW#;fHufJ}cb|zG<|Gs$`1(9do)ze(2RBvy?Q8{oIBmC-O8Slb3f) zePFQb^fPD!Ta1MUAk!?mjQ71y+tOH;{(iIIb^@DYJpf9B=D0}(6$``5U-xxi{hS-) z4xh|mjrHQ7s;v_>Ze%;WELF3%yQvkcv$4BbesR*F47E|r3J~_KivBhNR8os?B#WZ~ zvBmoA1kISW7)>!2#vzgVviI}1;COFtv@@VSU#jl+_WrD1DrVY{O|iKXuncvim^s`X zbS==C)VZ3EbMTD)IdSRKqq0@c9Vdi9<7oF}jD-#t3OYb@NEbylFKG>EAH65Mz$~cy6D+l=#1g$?{r3=@7$&5 zJK2s(&U0q9+<0=7gsu4qt&+IRaUIGio(FPc?&hjkV7hudx+JL;Qy+mIr7>Cu#T8rj zS^iYsV0G4f4G_MuN>iQ{a&k3P!EL@xtu}Qy6BE1Y;nCw&A?weZtjq&ssUc`?eodFQ zh8P8<53yFwiNc*&&$-lN3P@efWVTX;Fez$@8VdFU%!E{0PPpuZoLEVcNBA7E=OSFd zD4<=>okWz%LSo~u(Y>qg_s2+7ozo>O*--GayKjhJvd2~Gh459Ksb_0AL7x&SgZ*Wg zjwfC_bAZaK3U5X8C{t(5JGI8Hl)j>EM=Amm{6^2r)913P`il5$P813K8;iKr2fmpe z!^X4x9Vd-fdAm1)Tjyn}Gvwy}XfkME@^LKZ?h-aN=VgVahYe#@Mzf&~NrStl_FlX)Nekjc)EJr-x{PrkL{O;J`%4r|%YD8eI?W)_m)Bk*n z=hOZQVD096D(+ov{ESQI?N!*_&2Uob-Q|ct&{=YY>D5Y~E3Q3dtV2vd`8sh$y-}T? zs--ztZQaMvVrfn=V1-P4Wpt})*41R^I(g}0_WTsLf*N4*deP+d1-W4t^eJ0E2yzBe zb1`{MdcOT&H}mi!EVlV}QEW5^tX9&wSG&7+6EC}IJY|SjbF%8WSUq>Vb_Q63g~Xa7 zefpuP9<7<^q>o3xc081XmH?&-y`2vqR6fu{T_ko4Ikq{ zKZQ*w7{1=2+^_~1=Ld}89eq``Q9ZNR@Ruq;E&?(y(vHAm7nuN)Gk%6xS9OG6`}11< zID5C@owiL+v2Q1~VdbcCm)B{P;ITPFfZ-MHbz%CCiG{f4v@^ruv!(&?%k0FTU2O?* z>1k(5tlnuwSbNDlsTQaRAPNkK$~;PH6oici<3fXF2lpD6P8iVEQ1Ddmrt5xv9doGH zfp-_lFKlhGP+Prhww@yXR!CY1{=CymOe0p$;Ixcw3x=SBr!`uQExCm?2H#JOUoltn z6J1ZXSWN-CD1vKVQsXr&?7zm2y)ZbvW;=1k&i)iAgm7MPZ>$T>v@qI~=5Vb27OYRf z)3kd(I*ikY{2dwiU@k7-clfAg6Wp5`bI1#^KWUUbJ>z;c2AWXd0`?p0;S11sXV9xLx=It?gHM>SwR?;4EOHzl>Fw z6)egIXl=W~Q@3*ET)EGZ-n}tQ(_mxX+TRn$SX@lx!=O-H5(KLSTZ}eP+Jt4gwxWtx5iOm4>E=0w#*WRO+O%~~Cy?GR2))jD zA&FBPuL3eP;f+nWzeg>CPJc;*coK2@Z5nSD;$}5u5ob2s>BA})T?^|63*EQ7XNRM{ z`hyFjB|;@xK!HaVjnS!<6ndt&?7ygW)NkGa7gb?hWM-Qdx3k zJKGHl>PRth&-@CQ^A!(zz)^=Z5mIp#?j!a!P)y>c<^mAA zNwm93R9D$>n({_8$W%NiO=t9I-e4~lz>f*~Uf3}8(qM;~2MGCzLq7!-H za;ooVOKCA$h2NeDC}iD$On2G} z(Vw>q)vG-!wb)EsZ`f>t6Fba}(q6IEiy&H&7tZi{Dt|jmK<)iKR)0COhxtMTQH2z8 zM3yc`$a@W&F7XJq4SXwS(@m5`;>8L%qTx^Q3pspsDU1+uPhgkFKer^zRV=`Q*SX1md2yQ;LA>Mj<|Om1X%OtHC{KQo|fOY1VrQKR{41!hmTlR_A;@OjZ02p1LpY@8-(ClXJV@DSnK4J%(FK*a&=GD<62dymoOc z=3IDpy0U-2p5W$KPE)%r|L&Eb1D*}rk22}Z`tVw!DOGRHbFZn-UUtT?y2KSN|CM9Q z6$0fIUa^&Fwv}Uw6$0#)y6fd>4hCH&E=oz|D4{Ur+Ld9FUj)0wQdC;b4i_8h{PC6P5} z3s2*&Ht8M2jk<;*aaH|J{C zTQoW|do(|_a>>5Y20AK}jUUvOLTL(OTAoqa4EE`Uk0@5|M0w=?{ zNV;qvcjHCNa#E}Fxm2~0CZ>)IgSU&Vv%j}FSW|p^vD_8KF2%FhbBIdz42PQXmFQdl z2M^yBET~P6ij- z)=#Xr-XUEg&a&e9>f)tS7htoH_qC$-I2qZFhfS0uSS2iVe_>>JNhVDHMx?E1S>tRu zKX-+r(vd~~Mb>$pGyBdnB>P8N>j7E2^cee?W%4O|T|)lNJO92x1K&ooCwi>n+E z=b=o*%E0d+PLe@$`lxtTnVNqSUG?q$SsJ})ORj`o63E{j+U$def=lFue(U}&EiX~) zxr$<5J7L*ds2OOwmFy;M6?Z18~E_*!6}Lj%En=lC@93}y2s*V1^QZSo>{tX9e}k?{@--C3;*(oBQHn zIr=j)*M>za9{0GD`&)qAb8h%_fk-JG`Wo7J!iche zNn8%iAK+Z$bbpin)Ve>3s96);?23rjl%&(~|Agw*Auo&e9Ha^&=R~7@$ZJmL?krv@ z+){!bpEmv3;0L*vQrtBBY@Bu>5sFHd614cw(;)*Nq+Zf<)5N1kD9Kq$yiY09rNWQw z`9RC{NluCJd9W~75&pj*efEnkRj}|vxubwyU`u+UkyY!?#p8Yaf9H5oK3FYmDe+?? zejrqepT34B9y`KO&Qg+=Tw|IR0HY&+z5w~-VI#5cRZ|Sr=b8TeU7ybqtS>PA^^*<` zX;#EU`eC^TAN-d;&t|EI=h>?eDEe)t5SLx9gK1K4c2YgbP$@0lbJF;Ma48vjZrXUf zh-f)WDOx&>iEU;W-GB7VxUs?3dvZLSunv2uRsRmt&Q|RUYh%6_Z{KUW)R&fd1AV^- zyrknMjUNnGlCk8bO~gx&9MZ85T0MYTsFSb|a}1_B-iII=AWPVx^M*O6xdaDfyC|djUeK zF0^I*07mnh4~CX4VYF1{l4G{i<{DtOG*&sYSBb6|kKa6zv9i{({tXDyR_6$|N zqv*{e>s8?6b-h!1qxiWmMNz=?f2SP`RpPg-p-II4BUQAZcOMS?L;BPBVCb?3NVd__ z$0Te{i)1;Z%jo}rH!LD-O*vVI4@nBi#hQjx=Ac5CVP!ZAY6GDX`~)?hAlM;}j0IOZ zZKD6;mXb8&82@%ZUU_N(wv;q`q?Y!8;N^o5^jBtYh*7=&KtxMz-{GI;ev}{A^ql(h z^p_sH0sS@tXy`CV)d#{8JPPAx{>3F^2)I8(@Is;)Ev3w)lFJOjSmS>431zvJkZC8m zm9Xg;xs{0N@&Qkd1UQ#4CbX9G-*7+8&Z_w0!ny*qWfkjUsydte3iutDnEy?XndDhX zQeGAW-10WYE@YRNHgi0c_oDto2K`usZ3jm0f# zaYRIKW(b+AjKEF?L$JmCY%mi(i`;o3FrVr98$#B*eJKE+*3UV~`(z!q+7QDF9*L&p9#rWhDf~^12SV&|`7Q-Ynmb@A|%~9f8G7n#Vn01sSe#L`~_> zMR@7;E0@JCDN+h}3Ok2+ET{c!0{*H=ZF;?D%~2m^{83PFKmX)9>ui}1(G&!8Wk_Dn ze%Ws%8GH4H!n<8??}h7f`S+%~F4x9)(C&TPVUd=tSnDQe2GW*IVv;r!=V_PZQ z0*#$5fC_BcG77i6jeVI7MccIfEaYn%tD|!_c=$d#!9cHaH_hf_`p%D5YvZWmB-_l{ zhOIY(3aGK(U0FJ9VCc+&O78k)<2sO`KZ7>5^fcBzb;`2a)3858rm#3nQ9ss!JvQo* z3jY27P2oTeH>G9DLZ<%daV~GyOhd}<1w6diCeMv`77jwOZ7^&0`+GCB)T4er5&v4q z{rsG-KPD%(V7@O~MuwOBGhwlG8#DLkc)XZsTT3ZAIx^CUf$%>b?Pdj5)zQQ}20hiu z>1VIR~tCap@XfG1WcGF7W8e$kAQZ#h&*X|H49*dJ1CJLIlxn`YrS z8&d2z1UCmT>)j@&zJ*(vf|+!UaZ*e`ELTH{orhKn@0rz5Q&Qi<;ilkb#g5ga`yXOK zD3u$qiZYP*uUXCdzQPia5gBw_Tf4Hrmv5%D7~M((T&!ixo}8)#x6-_5z#7b#8;U3J zNbzj0gTam158TpI726H>;PM@!3#rWDi&VughNuNq56$kE+nDVCscvldF?6%_Jr1IR zWm|swJ}|P`aQKARCln$Vm%{KATz#oaC)1~W8AaPy>oY+fFIVZ$zR zKmH9iX80b#&71nUnPTLH9lIhvh9Bc@dN$kZQdijbhM#fvu6;t(ErYGSk?9Cnv`HCDy zfm_d&Qq5Wjrr>EmHmpl5?FwK#MxVF1l~e6o3^l{mo_(U081z6f8Y}IZ+$%&9rUvI5 z!I3-F&g+^pivEcl80b(47X}j)!h<0Xh45k6K_LPd5m1N_Mllp3f-wk%05P_p5OECj zJjiPdro1Y61c&;yWn}3FJd#7tf8mEBu}R1I^FC=ty)a^<*TCcEid@Z>oycF7=3m)x zc;-{ml()P?lc%)?ltVVO22?_hwFXo}9%~P%g%D^DsE5#N4`_t&Y7c0JNNEpfg=lFH zXopy859ow=Xb*rwK4=f`EYo7!f6qVvOPvNGZl(38WljtK_Le&d_2}jaNx#LrKv_y`B|Qs6*?} zVr5OHWJrM8JX#14IaOK_eh^X-4!ZDVQ?-66@>RYuEZTXTFS{ra9kaL!f{8g;^>nB2 z!!J4jk=aVIoC7p&QRN(chbr_J9UIZ1ISm&Pw*?I!k(&jL5RusnxgnE{e%i8VJEQUk zw6a8IaE(WD&t6IBEhTEzJdj8~F45e%8SXURv-=d@vNJtJ#P-j#$B-|EBxBeWLsBs! ziXrJ3#l?^ejKN|^7RJ{9$4Q6N${Q|eNhdHSs0p_3V)z!0c|Nh4IjXQNbTZV?p|K%M z(4lc4oYbLlA$$&^aVOLO(RdRkfN1;(CqXnpgwJ)aFq2tv2CYIYb$aUEot?4_{5EG1 z%~N|q$!(`&<=7q$Xe)~nh39dRcSZLQq;CQ;il4+Zimy1_4sFa;@e-%^3C1{-%2EQ! zd4?E*jF@gFeOv_NB#Y`TM ziwn8dm4k#}>Cr!=N2iv5AphtoaIW;Gq)U8_(8JQ($W>o0l?k)B2Eu|lSOa0h+^T_a zV4~MTxG#Oc4b3|uJEvYFKi4^H z!;p4Xefp39jd_NU_GNB0^Y-mXL*t*3{>i3|$3)YEt6|q}Nd}M6njSA!1k;-H=z&tcO(y@vM zAsJYMgODt&twBf*7W&Y@4%gEip{F~qpYF&%-BEwKqxZBhjHYPgMDT;>!lQ6Ys{x%* z4=c-u^qACo4?gvH&!oav1tJHo);9z6hO|wxQ^NAeB|Et2DJ1*2@+j!mmZ2Z~y%Q(P zw+;6+B3E;sbLtJ|ruci7q?ib5D}oArb@G>E%t?U??0 zY+iZ=$pYRy1<49tdPT_wUX0m9KCPN(3{&`S*)&_ERzMkf%fx*wjImT~<^2mUNt4~) zCstcVk`4iTcMpA7^cVia<78e=&i~D}*<1qL|Ch(fyh4KiSim$Zvn#e+&iU2;1;$-h zxMjTbqo^nEDcsSCnxFVRO?VA~IabyB4XhO^944-$Y}8#%7Ns~vT2>p!TTM)+dC{7`>02B_j%XujJnS$g%Q2o6=~J`XT9WNIiLj!K^)4>2jKj4zIZ5W?1z_Ai zFk3B%c6GhphxxQ``n2}H6mx#Qig>fVI@dbK%sv~nej`LUX4RItge<(}bIF1EXr9d2 zQfBMzSq~`p>L`0O$$NHq`l>W$*mo9>WFXYEoQ|q5f9)bH%QG(Pgf^w)w1MO~aa%tP zWt;U~)>Q&9MuY%cOZ{Qv_L8-Zp0!r(tve($!iO0v0RmdQ^-lB7*044>XIB}bFwAJy zZE>}~bgvX?EfD4O$kQ-JpRFdaHd|~>SZ3=;Mo7kL3Fc}Ltl(BOp5m0?C>2q+wTAa( zLF9iW@a;ajZ0GUeJV$*j+LGCSR))

NjE@{P0zfO)QYdG((=<4uxnX%HV?IB+hnbd zWS`b?B-nLWeRPl<>P61g5PL~-q8#JuYE&tix8}C0Av?WVgDns}p$jhUTF>GlGBe92_#39ruuGS+@Tux|Y_MVAU>|ak<+sUqJH{!KcC9g<8{zBNdL^#v@_sUejn{U<|*z;-m~yHmbkx1>0RQ(S5`k9 z@`s)YuNG=HIAY2v3w%HFHE3v5eH_~aaLG~BTCdPi=58QdSr-$g=rpFvX|#&^YS+m| zM^&esh@_eja<=5j>(7h1(p@Srlj!mv4TfEtu02+%)L(saNfFnizV;M<=do3pXm;vm z0vRl@b?n+9xOJO_!arjHefxVOGLh$1ixO|e+W|wT4Ey?R{0Q!9_LdI6(d?ah^S%#b zu!eYnFkKh&eVb+67Y!#3drxanVd1t1VxY+uE+6Ma!T6tqM~Byz1BkU zbT=(GW`Sm5?ro&>JF!5@{3YiGCmWXQ%jGedFJorqqVa?y?#{fMi^@h1Id%d~Ye>1y z9vU!6A(FeWvqVPQD0Y&f%0xB{4}?yJqm_M>dnz&23vT$l^|QtSwkCzrh~b&}L+3mG zU3`VvFm_=aijTMK0Q>y15=;h%Pht54s} z7cgEkzYvT6p{jusSj*Bm;^BUzW)W!M#~`0#qkcedf9)5S{V8XcZcWzH%EoAs$+wD! zBd;ltx)+`mb9t=?KGmVi_HWi$7ryMpv9BxCJu%{s8sFiyl@x1|W(~`AI?K(fT)feF zNbz-Se?h$2hGK8ag{a=BWl4Q3Vse}z?g?c3RSABNk?P1#7PbQvCHkr{0JiDXRF4(@6z1a+_x5f4_U$6j&Hdn&vo&Yf(IsOA5z*do zrDn^fo3ghNjy1*4iken|)T;sk`}ao%7iTWXFtaJmfEI1>PRRhbFwy0%KwgHKDg%<9 zCFJXh1~ks=SABGuR5Fh4SzlMql@8+xcoQ@=@(mLeOs3+JP>LHee^&GcwCAy7jVr2N zBrJ+GHB+5`UV{b9;=d2G(Nt4C91OGcF5Y~Y@A8Nlw}lF&gesO+K*_CJbPW4Q+1aOU zlS`luzLlM2@B*cv^gFKGN5`KtPoXj-d^XPtnO)HP1+-TWgE^RC0&^>KOfO_r5BKW? z#{?%Urylw#`yVp9$h+joRkJYN;4>YxC!Nd)#DKl5XKtAGvQkmzo|rxJf7`||=*RuW zr^@mDgQ%mGe3O0l(~r-sD7=Ur3hO1ku3kBI7E#vpGiY4f;J^O-G0$jWNmT%CW#{oq z>C+_vEI;P$n*Bzrg27sDb^7!z%Yyypo>J&x4AfXNYdN8eqjrAGhHD4E`eMa?V|1+b zZcx-+@kHfoZbcNW$d}TM!NIFO)y3pIBl*STX+OQQh$1U9YOJJpT((%5uQ`8WB|J=6 zSXWTdoPB=Pk^dqrX=dAlO7RDN^_sD)$!5HVC?-H&BxgKfr^z1nIwwlMSxX%9+3iKI zc>HAGM#giA_Y`H*701o1#f?(mqQq|Sc6(nM&~rcW9ZGvn=NMB3|CuKz9jWy0yocUCXfIM&#)KzhO`wl}sn>3gr9boCR0R_E#+qW=Nv*gBcn z@3m5KucvVfsgbQG<8yE5i`iFf&ihXw$oe>>0oB2KJdoScQN${+elhO*rLhsR{|&{h z`55q*2+w3Xp8ft0f9SkbWI*G*chtXuC4LxP+Eqe5Q;mRupch^GT@N!oae}v84bRGr zZ#cxaJ9rLwzE{VAR|7b`pBOxs6g4j-*EQ675LP)N zddzz>(o(vHRxiFxPKTZ)f$)z>vjB0lfmf}%FT0GqO;`txy$YU8A!Scg_C6 zHO%?Dl$q&vSB1jJ*d3b6zSo3q{3({QHFOK{yK-LiA_;Id_@%Ks`7m0y4SRV3VKnjwaA9SnWU52PN1 zKX~?#`q8V$Z=XKEdqDgDPZ&Uj%-Io7?W?vr?p|;sufRwj!gj27-Mg=s#Iv1Mw;?AS zWkF^)m^&u_dnr{gq+06gORMYK>Ky_60vnPY^Q+4xn+?$*5cr5Pap`qe6XXz~i;z+X zXgs_%PyV7F(WbFZW_AW`VBlkqb?w7Eh#=@p(8!S++$XX(G5Y$F#u0t;N}yBD`Ape! zEP5%MRI`c`jGLvpJM0j6?$AQR1k$+1XF|3<+%ReD#bE^3lN}2Cwdd4`l}>QvCHYh5 zr?4;~@tIEVSKf6+ud)zHY0)P-2_*oJZ@wqEMC^3oGkLz~?ck6mzDai(;QKHvLEJpK ziOs#88)qV4teR)|N=;fELVHNJ#%PzAKwr$d#yW`m?SN9WgLtBYc=J|El~E`;L6b=+ zd8lGwK>%&X0tRwM7ixn48hO1dD=Ik+j8fy~enF@CcgWAvR1oH)Cr=nGP68U;L#Dz# zXelh&MOL~{#S35NQfgdRxuk>|_)3)x?7aYgRNxkRk*LWnB!%gjo6yPVnX7@u{4c2KW%}{ceaKI{i+8vdB^N9{#XDP^G6D_o)wl{iS1_OY7JLv0_5kj?`>#{lT;m<2zj> z`v2 zWWW7YQ>KMoDt{9Yg`xU)U(`fI>n8yWR5E-H)bmBwG4`|fz{y2o%Q1YMTl@bKX2<4aJB-)|FFL=-HC|8HBYO8+>3m%Md5hmNjiz%NSWTh+-*77XcR-5@$BB>o# z(vhiy$qqYHK7*^VZ9u)e(snr)%xbzV!v=8@DPM{xd2uT;)Oy^*GKIC!uv;3uFm5vz z1{kge0LDi4#nyg#20#jU`JGY=Yr4z|yH&!na6~A*gm*pWx2mRo3kP+n zpk-bpKRL(Ea=TxJy~9DFL>0#J_`8rbJUPgE4?Dc%hXSfVD&iIY#SR4@sx=htdXnjr!c7S-n*v(+`GG_Q0u8xVgWWRSt90xg7?^t)X zlNs7E?oYtDcy7?EySKLwZ%{7(A#{aOZdAR-A>XK)P#v@UY?3oL&GHfo7`5E4Wj|zfLG#g10m^;iyfx7P;d_r1~6!Vr_Z-fKQajW+6~;I_NZCHIbJ{7+0q1{U8Y5y9H^{wqe0TWAuoVyb zTC~JK1jykm=`WZa^cE>AOg6rld5Em)=)T0+v1^>e*%2w*|I6AEzqhWy9ZPE)t+JB1 z7kf9Z^)8Sbhut}`i}}OpCTN|zgH4RbynJxuZRGWHvqgNYkrV?glJ3snUeKtw1pr<4C*Qi}2N`Yw=5Rzrc6Y04 zyH$k0B;&lvM={)b0Qy6L`w!*>D8Dg`3VOU<%dxvo%3AU61QKQi#4%GVtT%d5FTS&V zq)wKSJnN)P{qYs=y*2UpGrAOh_@q@SF9XZSps$Ncpy!Wv$&2NPO7ijc%8Mv`0J-Du zT7TRM?lmu;{SHm)(8w3j#Si~&DeMUFvy=RGlC_eo!0f?}BBmWYDW_P*8)@V(d@-$8`8SqL z(&Fk#jjSSyZTm*tmKCiJpEQc}e@8T}QcjVJFHp)qP&VaO`J0tpPy5C7|2!BPbxW3I zFZ3W-Kl1Tv<5eK;Y%FOlm&x;Pa>`Wfv<<}CZD_2;q{uNKE0vJ$T_(IkP9#&*n zvTh^z5e_;R_v0V@2dAk{(+4B*))bz0$9Cz}v>QUz@sW@st5!?i01l&cvKGXN+6T&& zr=0i^1JuZ}2c{_QdLtZR&HD0}qYcj7NLSURqG|4mOR+q|IK?NcQ*$tTEG0i)6zi$| z_=wc5|KXRCE7xQ1=Fy{`*Y7@83dWj1!4eA@#|s;E3%NE2B1o0sQSaiOBlX8rcT(jv zOMCM+OM50k5l`@zRHpA{72=%Z3S(%j&JVA``rqWXySp;G&y$1XG&3Wo z?c{}I{&OsbQ=1oPHO&XMn9h1i^#?T(vON_D(o4#HEmOipIQHq`CrA1VX4v&J(43_N9}_{lNHSVipP`#{1`0bMMruu zG*6Cn|CdxLp@!cnWuEFUTSilt;FJGdb>Bi9NwZax@eXu@%PqNf~67_Xr4 zt|Ds~3Yk{adDs?6D`25eAJ`ch!>;eH3}Ur2NPNJ* z_&BR*sl;sh{*Fn%%1pw)aDp|xF4(F1>cHMzrny&Ny;KcVZ@O@gzodMT_wD2+v;MFy z(fVc$DKl-k7w^c2-Plo_t}1w~jWmqrSKXj6@n4CjjXxP0o_x#8nU5W`oVf1YgC>;K zIktl8Zv%dJF${gz5Ho4~j$xFyGR=#7H$b+n`kC5u-kbCjQdSHqf2Nf>-ArTU<}Mg3 zpUXnG*W#-ML0d#;gk*fG2fSmk{(JLd34SiC-Vwg-l?47W-Vn&8tf45MVwD>3MQW}8 zb81#gfTtA~Nt#{^&7nwVgn3N3RnXmHVz6%N$cA8f)tj$*!M*&OMpd^;nvGt!wMk`5P8N95o@O*3B2)64>F`XU&N^ELvajsCSC&)jA{S zYLf)kwhInq%F5^>D6Ht6P?2M2`4GKdAFTzRuAdWMUml_|+r&MEw5^}cPbyv?p|(n2 zF7Ld1GIhKkem7`zd`N_v_84pb-GA5qdxS#F>**G{>iK1-;p~bqGDhHO!`YTiDv=0A zNf$2yDYs*vsdr=?#{U}=3NdXoc0ZCqdcVNSX}C8x!+qiNx=!owy-J>5=hqQ$0%5{m zgHHzy0@Mx%2EZw8%&0+H@#H#r9?EXP>i7z*99qm@{UVB&C z-)j@Jz`LNHDU*~?W>!IG;tH$FdYKV%OsI{NI zjDq7E8LGq zy`kC>{!fzrCB0ttOW(H-CJL?}#^6o$UtfJn1!w07kFcX|_N$ipzML!mlR)Pn7mM@x z^{Nj2x7BYJd@Kani5XFOIhz8`WyKRc__=-%l?E*+uNC08m6jd#!G`X?S4q&LD-zTu zJms17Bw0)USymlZsKVP$YKI+D5~3-(jlY|xEB6m4`s4qm$0M!-DtpEDQAvSO$!02@ zcNKpMhTFyQ{BWIZ{o6fgetgZ7kapfBp%ZITBzLutCr4t)F) z5Iazpi6#O*x9ewM1o0@Wtr*mjQX1l>47#x&Cz8N%{+tZ@TBN=(+|tN~bAN)yn*(2U?9uI5~qnc8u}5t8=5 zhYH0ZrpWxe*TT^Z_`omsrV>A34YFA{BWNi9&ZRJF2qru*D;@TP+=NPq2XRqyT+Yu4 zqc-key~N()&r+;-cEOD zH_W;GM$>%}$;J{y!Vh?pebM|u*UWiQB%UY-`hUD!B-d15T@KdVUoI3!s9q1nleO;v ztA#~tEa@a25f4cUL@bB;z4*EzKw%L8=^(m7PzXo_LXv~>!SJ76MK)ir4bdsirnb$A zy6pC+49elWn0&`=`mluaJP1J%wNZFu5Q$V92FqJVW1P{?oo;ZVAczxOz8CvM z(HY!K%XwpMym-+qouxa4BdyKdK(oEqM&Y)UuG=|_5>gB@@UmX9)a}#6=PS}!>K;jP zJ*TV~>c9wEV6tLb8a{!-wPn7`d&JR3SkXq4db(>7>O)`o0<6V~Eb^OlJT1Yh%dZyW zlt?L`C+Iv+L_mwa@|1wt@+<>VwIOWC1vKmeNe;Q^p_y$)b)%})tGacws$YNzp@RKDQE)Y}Ib!|=93&z1TMaGn!3l;h7}m}IO2u@c z+N9B7TG%$GE@1KiMrur?@(3I2Hyt}CFHVb5Tt>e27)37OkBCwVh{B&&;M|58Tp!c( zkF)4#tV4NFbGZ#GJjIq@q0LYRi7^0fz$Fo-5_nJ;c&oY`#>s3YX^U0U)uu`G&d~_h zyq6Bw5}H8C*Aa4k%-g0W4{JaObB0%sHOzJ(1?ZHZjBwLYwEB?(q?-K{1tLadt+6Tu zAhFjoadVAz1osgrq6}F~e*?`E=VObKLW_{XtbE`UUoE{|clDx?7#03Ye;?!PnBD;LZkEQ1r$S<1k6{8e|*15sv4~I9RYgS4b z!hQ`FVT@SH)jI`^SZw^~1Cydl*pP<>kuAe?vjV{cT5#OkNIG&#TyV88I-hIB9ZU~@ zs!2zFHYVPGHoR zS|ce1dB|pEzEOH=hKI~E424pd7%q5mN$TPgh6iHq{i&#VJ>6oc;-~s)RxR~rzu0)) zR!t#5W)D2k4Um6hA|c;eASU7^UVgUmU_ktk5e)ip3@!FoI`;cci3`4%+lIAeq5xy) zduX56K5NXe?vf=&cmWy2W(!c7{c^04$Dp-yMLn|WcGypmOEl~F0NKSW9 zV+2>{@f=iYXHBE&zoi!|G5lI$NLBXb>>YoyL0TmQM+d6)Mi+{X`BDt?<3dGb;w24?Wnitm8$=|bC^o5_? z(zU!#xXX@Zz5kNgQG`H&-8U(rTDcSnIT0?zuvpMYLQ5U-ZK6?YOVo4E3{Cj+y{L9k zC1CdRux(`G_X&gOy2c6I1SW?MW)qS)mb25+8q?*ey1(*+4H=a8Cu9>B!#HNm60jP^ z`A~*3=cJzQE6T~Lc#3ni?xfS7s8JIJ%S7cL4I{;lfZbLL`n8R4PAZN)aAaBHWb`9G zE3x@?hY8P?Bb=At#n8d5DS?s8dNpYkRvGMvSOlnj9m};#jYT>QeU%UTMU1i!4;IZ@ zB=}|W)TdSrnVq_Ta>uam)q*7x`w5&X7Uh2h8q#HyJDho3mM-?CrvmqS6uS;v=I zWUMUBQ+FnDQ0%c%z22KAs}x+$!+|wyMI1(v(Z@-B2X2@kgH(2xB9P?T3f1Dlu)|05 z2F>3KgP7Va?z*EF@C2=XHU*aIE-2;cJFqfheX041z>Q`Rsq7J9@l)9yrDgClYRklK z<}X5Xoa7$e1(oh3vG!mOE5MJhn{tbo7N?!nf_IOl`d8q)M#HV|dCkoT;XUqZo(K8e zChBZ)bG{2XMcZ__46UwARiZ}0_+$0=wew+O)ieI53cF7i*YasUte&qtl#EzWN@-AXMAK7CyrJ(|eYJPVHEa$@Ek@#^g9$In#ytu=_*A zccTP&&mdYH@i(L4SraFD>a;y%CCrqqy;`++aGME9J8n2{sQp$=>`Bdh4RBH@bT4uO zVJ2Zj&9B6+WVMEdVWxgKYN=xZ1zFX_uN|q`kHXp*dS-(sn;2w)wR1BfEa}o!8?=up z4yw~)8;O?Rl|9|M$-DE!8`xBlf=tKg>w3reSy~puc5`+QP?9BYRi=wXiAWKhm$+ggy$;i|0S_0=ZNNp@7G_s3%q4BbH$vo zT!#h7ww6ayb;-=&(Ywmt493sDe%)5h;M7DIr!p()?DMe+!Q6G$X+-N%qLSoA}Do zcyP1;GgFSOGd@^VIg2gZWT|e|H(9s;`=XD?>*4k}5qeJRUc*^iex)IX!1MXs>+{_b zn)mO%_UFAhYk}8#3S6%PdFbBz)H;vXRL9fR%R7OW3$&o>wab;JC##0qio1lLcVn-= zRhQ?UG6f>r{_=1XmO6z`Umiz+qXg#}0zKga%YnXW7z@BEiY9G4m={W&MD1UMap`Kr{9Roi|>}V0-pw@E&oChH3HwWNHN~91VNi6xO5U zk7a>_a#(hPa8~f+JQSYboYXf9)qjmXcf<)K8+=O^8W2I( zg@IdQvHG@;YO&PZZY%NB7>&aHJ5Cb*5Jig8Z<-QZ#J>d}yt-bW{3xAZ+*w0^uBzE? zbg^?)Xsay&pV=D<2pi5ix7^_BXYC-S*1&oG43hgQHb$Pi^(TJ1G5F!+FK$K9bwSig zt1;#XZmjJf$c++!f(c9uCB6e-x%J8txpnEg@6ma1B}TXnf;i()OfiA6p;_Z7Nc>wt z!K?lA!*GPif9Jc-nD<6;{M=kI=s8I;p3nP`$7-ca<}G<*j@#lng*1PyT$V{At%-R( zuaS`0BJqOVlxEnWY4EH}7{nNiq1OljK$`m?98wPZN#ARQD6Xgya~|4+?M(qvnL^p( zm?IkVy|{kek;rg|R2(2FvsA%iHsNdlmIv!ZOR<;-_5#Y!$LhivH*i)H6|bYb%dAj~ z#|!Hya(?s_CuaWo7b@_gXa0JH#SFj1B}!rxisJO&!1#fBem_i7nKQ`lzr?YseSc<##*E%6v{ z4E%H=tRwaz(*+|CcQGR7AnS= z1$|}#-bbXK)JQ}2EZ_}ZwqxJiY|E1Z6pvt~=mAKhS-;4v@~(vj>XW4{qXLb`ToyAf zeq~$;dfrzX^L%Qnu1oZ2>y3LDVg$Si^zXvHJG1qCC8VloQ2IJPtGVSPhZ(nDRtxga zagMipEU1$`bDE3v_ZsmyNyGKX0wJ zYa$qIz_9xJjZxwU)e2Es+K^b<*^%YK9>F3RO$I>={qKN|==!5ENN|J1lDRL5Q01O{ zWxI8dRs^wzW)dx2Mm@(c#BUH~&@+F$!eRp)c3e^jF2{0NjH)Kf24@NlK>QrwciI#` z0kgBQSRsDZh7}eVEtYH*V!BdK{0`hd$GP}XQbpj7)XDAU&AcG zXA%x!YcYaCP45EUZDs3DfA^Pw$36OGd!pf9YG_qTF;qW*KO_mpIH|gv6HnzisDlO>}3`17SP404PC7o6X;0@t3PcgPNWq)1)ehd%4rJWG4p zR*?tVAoYq8>;WiBwx+|mN6~=i5vdA&#kt>=YASr)6#67>E~(-o{tih-fX2vBIGwX4 zY=pim_aP_tk#IT3-nfd>@=pqXT3b8S@p_mM zOB}JDBE9-$1|-#kT45zhQC!1pA~49d6^Q&N2T68$0YTp*AHXARphHnlV7k+ODZet~ zp|C*KubNQ8`1C~A?Oo~v8=`@o6z9!qC*jtf#(lpE1wqC2_pLv#n~=|0(N2!GI`VhLZ2qIL?3 zP(p_5a$dOndaP__?ZZsdwgsl-AiJ1r`XqdDq)>A@Tch&RV6;bX8$%ZT*Kjlp`o_wi z2Iy?41La>dYSv7~STBU?+3uD#t7%(Niytmi*Gz)4WrXPrNu&(sM#Mx`3ahX`Br-ea z2L|+ItpHbM;@hHe5~s^?2uq5srdZ);@)otsklAbpZhaoqFp__;mZlA-r7fQi$aExY zfku)hnKI9!yPA@4jfxq5@R1*1%~O2AM_XVw(>b$1PV_a!x1rE+A&Yy6MyZaUfo+T8 zg@2}MhI7+Cs~_5>-9^(MKbBl@u3AE4dmI=juYT{D!l!TYc9NmkH9(64Zh9_B>1*D; z+E1=PWqkizB?6Ae+A@@ZglSg`{W#H;Y>UcN1L;@`o{FzQdEttL<|YjF%=0)qdfyhD zv;%_;m{MkEurQBk@WEBBwMUKdNM8Y95(|}*%GQ^-w)${dP zta%tD;$H36vgoM&qp5X7UsnA&KUK{D#VLH+fRdCX?l9V+ST+dGQu-(av-(vv%JqsV z{6IN~TzaUbJe%G!05Q2B(j$~`Ez(fJg0-@@{K8+iB8Ne?fr%#EvSv*GVwNT<_*gEr zpP}YW13QytoI0+~&qi-~uBag~hT_PMdI$W{U-i4Ar*>P_NwbtQ`Kk61L$^PhgliP! z7@J1*=V-BsY71%Sm`##KWUT#XilzI$eI3SU?Y7V(8f)gJW^11_X1;MjS@H}O1G|uu z<2!6)YLH{ib->V50aza4@dHa;Hc`IzR)#yytSBf+TlV)DUa9Mb$EEQ}T!Gn)ok6-B z!O1Q&-5CRBm>M#Ro{jHE0bVH_8gXl@ylp*zz)5sIPT)thWD^d|vigg@fstJ&yvq>h zRF1fL_^|m`dU98pty@q9Ue{*MyV#$JsiK+=Dv``Vj+(m24a~=S9Q6=gTqik>s^GJeOoX63Xo?7oQ@L5}tAEeSPN& zYF08Qy7XaiywNABp!I)$PPwHp*XsVM_$=pQXI_&EeB(hZ=1FOUMxmnA*QpoM)5D&n zMLlJK^07_bBGn|uI;ZCpO~B*#!O@+L*Xs?DPP;pwLTTy!!H^DgVxvOm&s56qu?n5` z=Xw>qKf`X1#}To%R|}4ksHc-YqSy1VNn`Nh+rgK9=jI(}_W;67*{y{?b0S+@6+T|- z=2>@UNx1=L=Oy^`;(rE0AEZ)+id88$#>wd|DNRwbVIQtP9g$T$Tw`VTqacX`9pUpm zOj6sD^DqPMPR#=?!fqzw`1w9>ECHQZM1h9zq5?ItM5B#g9#V-_CAb6xi$8(geTcj~ zk2kZgnjN*lVti#aaKL0ruw9!h?~d9g=U%DUAhqI_A81h$H59yvB83VD%4dO_P6XvC z2Td!&xG420Y>O zJ&iuXuT=^b5n;-&NEVzZ1}o>P#V3JiTFaH}0{(O{i7sYdwF!A65*UGj-4KP}d14}f z6e=()sB{noY0WVUH_pd8&)QE+H=Ef|nd<;kK}?bb_yG|oLy-D9*%HemSK^GqZp}^z zP)I{IyaAOHM99@lVe)s!ER=q6zzwt%$cGxM+@Bxm=jdg~^{X{kneJlkOe$M#r8Sw8UXR}waa+~a_x+MueW1ZcVHWnbcJBTd3%i@!x9~f{O9u1s!4)zw zmJFjlw7~)gQ)E~ff}wI&zyAb7fq-hMnPz)G=+VA#_4#k5B~)41YGJBSs+~r!!BfVP za}XZ41Q502a9<>oHHPPr#=^lBZ=aPn6QOhalTdX{(X)7ilJ1w|!p;Ni(qb4P5-bEY zVmZXGA9&&V|3Sb!`!{xPKvGAVK2Y-gLlG%Vs>IgV*Cjn>>6P1w%&KIzNA8c5z>)Ou^;e*)&(f!}`r4>G{QZG7AK z)|HWC{CdPwxBx@QveEo;zCL zm3TdgUkQdq*TI%ZgX+9xMdjm5L9TS|C@06Yow{+zq!HLkb)J^vmwE)}HnDkJw~B$c zXX9suCh`~n)_3q9)X-e^kY_Qz`6`Kp0=$H&OFIEAxJcHE=yv$wZ~ zJVqf;Edk2ip>ns#+Duuv?r1wr%+gU~{PivqG(FN;&Sny&@R`#gMZj|5wQNYPnn;b& z*-Vy7&2egVX65bMS+BOv3$ukg%P~dw*w69J#{)=k6MjvGLbvLbM?zOw*?nkEIMQ$qtq#pa@ z0iqm*#5tTV=WmWYz+3m{8+#Xyo6RRfhVWqdCDps?)V0KwPl+pMe=1{<>U}3?DAOoG z+R;k=(eBmy_=q`L6hHg3TDOtmb#@XHeQSfeX1?_g0rfyRC!GeT)EZryZaV!7lV>Jj zMu>L=$HlO9)XK2qXCVeExC6bV4ALwCtB*puVWfh3&Vy8K8-&^Cuwmm}?}x-VBYOXm z4)lrqC2b})7No$(?8Y9EftqXFwZFgwWnug$YILtH@F?CT-qmUv;i$>grddy2PTgKu zy(zsj3HZ&cMq)gFh!0aX-vHAhZ5_^iBg-r11<-I8vEEnvZNR9~tm?r&yoQ4W^ z9s1Qxlo)w{-pIN<4x_jTStv^^=l|g#$NtRPBHO=5;O6(+{^$SqsH_RHELEXg@$vl+ z=;a1~8U3|c!YqU@nh=TP%DA)|iAUhz(5e4;8X*np z8&o6{u%JH-KGt}a4?G+zFiYrPy|NtXO|+2J=U^P+uF0~9-aI4hi`NTxmt-@_fqvic zQZGsFc8o(-Z{P218eGD&b0+uq3~Zwgu22qK6(Coq`2_AfgeUfOotg{9UyS0`?l;D;6VlW@ss z1-L#n#Fu5kJoD11wCfmz{E;l!n}PxlB2lG>VRnf#KLdt|%#S8v)c)6bXn(p(ihV3| zIjEdSwgjZX7S+m`>pP;|%zh>p=edYJjuks<$%>d`s5J@$52A#vQfBlqmSNu{iFsRP z{r=M>M*4stCNLCks`+`)u4~CRL$>-NQqd1R5Kap$CIIc6;P()*x9LO^9JSe7OO;x-0 zuAyK~p^V_#wUlbQfsj@2-SE@(s?Qyx*Y$mO<8hp*oVzXYhEjdRYIQNRJeEdgPqxY| z-9;-)6h4^`+j>Y@tn7p;SENgFw(v_aN~M+AE2z6*0zRq1U8s7B7| z`y-M0@c!9KV!Ce3BdDt>Hd8YwF2ypW^drcIn~_-r z3r?R_yX&7CeAR<$IJoth83IvQj2=xP_B)@JB3(n-I6y}j&y>wp?OgLykQ{|ii|O!m z`SkcdodDr0#guvU)dT5Irb_;nWhd42VpayI(o$@Xj#JW#dqwl<$xFL4(_g|^jJ@;K zdF-3W+l$c+rwo+~`+=qqt@y=`saVz<`lDFkb5Bmd%q=r~P3Y_?owQsdeVD>xt%@nL zdkVW`j>0mE(n5q-5AMl@`a@0(#8cq}^iF>s+c1iC@R%+idYUi(M@c8G5pAcH`Vb>+ z9afxJ>Ux{{_G;wrdQs|SE<0=Lbce5sEJ9YqZAv#(D=){1`AcibGs`#w%d{ee(*z^b zQqqz6)E&I_1@k!Rpx+U(`Asff3mFUpxF;Rz(|4e;vUq&Ma_PnkVX>xrIU{F%eV>u2 z5&LwdxLPx-_ZIaz=!>KPLo^%?Qqd@Q_MM~v*^UAX`}}&7m>nx!h>HOp1tkWyB?!-4 zxmlKraa-GXZb;ARBwQ>EQH6ZLFh&dzeH+cXw+?Rlsdus4MzM=~?185eap?68eq*`J zT5Nao18FaN#Rr4ak-7({S(_3`+;cDdrsj30&RahIwE zfLM#wk{ET(Kd9J;`YgS}ujfH_sC6;)sXxj3wok2wW+ctlzp&{I$_8%_<55YO#!R4`wrMxw?Cf&WxN3CzcJIL2Ajzzek@Msi*QsPb2G(qhM>k$CNW%eJ0az z5VhhqPhnZ`Y^1QzpOjD+&UZRWOkk3>+bbDJOeJC$7Bf>xz(26Fvx@p@tX5!F%M;sZ zJLPU?QMclKzcIA-a<>MRsUD)dy`Nup3UyxZZy#fi=d5)i_g6&Jyk0I7U!RU18GC&m z7|#S_F}+_e`UC*K#&p_WANs6cpB`2iZJNEimW3soucs>3yc)2B$x^b^4qbe5SRhY- z1>Rwx(hMlYCvB?6_e&*xVT{(B7tY6pywag|7B?x>DuCkR3hWY?`o9_jA7Dkx4Lt0L zSIonaA>Ekl)8$yf`f|BD?M2rCIkB-h)_$i>kMc2mzJw=b>SE7LT zs&{aRuAt#TN= zjX0R6K=K_8%;~Xv0?UJ0`Y?OKFWsO)wcvSWIEy=GY&W`<%d?i6R+BgK1RHo-u+((c z6Z(O$hBDDWo5$_1)~f90BFNP-$`pQ*Z$Mf*Vx|Hp5!van2aEKB=Oe<>P%vxz0;%zFfW+C<6c7ov9df7Ie=T1=j3 zv+HM!+N#vTK`;4e)BTp&Pl6Z}0+ZuMj4mkV-T9#(@t*|jNb^baSq{IPxZ~7Hx>ZyA z$-(ZvmRl)`nA@;{(gwO8T&MM~fHLG_Rl2N55n{d*K$|z0>L*c?kO#q(RqYl@OnDx7 z26>3`Hd*FYrKtgCssKIE@uTXrrDoMF{>L$vo0=FefGM$d`L6Ck&;oJSVURiq-+Qk@OQaBp)yRLNZeozfJ|o? zFBIO3vJ0y%i8&){-#Dn(A=>my1w#;%=$S-47bV!WEW!|MnwGyk-QB zIAp;jhEXh>3V6rT(<~KDJ&s*7+PSGGF<`rH97|0eKn3I$9=KB=&l_{d?dM3E8Yt;; zoDWlh=^(Cu_oWOeMMfx&+5`kATaYz?#hUC#sWfiz56=UKCt_2=1P@*XY5ZO^zBnhL ziJU=h(8u~sDvgQCncu{!b}ld_L=`&UYI^0S!`nBjdu8rtv#DG?6_L9*Lh^?VLZyjFM%kSe$no1^T1c8~^bgq=k3C1KPQB{x1I* zln!Xx_WE!r_@0$-LUKS#}iQk(P;4;pPG8T-U0hxwp5069- zy7s(YJ9czlNhgF(+L{X*& z%8Du~LYPGXN)YA~Lkskh?RR=**2A}YTC%=(qAsZSR$iieg`v)~9gl>fRw~m%q6Eq< zC`u7BSd3kNu6P-Rf&bGvaG0&YwMXZA9~d9>wY?>*BIiBLVb35cEaIJ*ySEZKYm@W1tAoil!8GGgQRR{k$1OA= zn9M;jRk%9v6=eKALw0y8`H0tD!Es%3u|q{biJ&V(n(7w*=|j+l1s%xN1Iw7aG&5nkUt zOm})&G;#8jOxs*kO^5J$(dFCKOqVjUrxGp}&eN*4Y_aXy*-a^(gTZ|H$QFz@4HFiwpoomI-Uj2=Or6b@tNTzig(V2V87Iqvf&S=(b8UJJ`K zv;Mt@frE|=*J=6R{WG&T)t)A=iqb)E%RN&+fY%lq03?Na5GLH*_j>!p@U6ClVDgJzhJyGRUEhcEhZ5*6YDNM$5pxpw=a*tECQ8~)P z8(BM!PkPs8Qt0gW9*_ImaW4W~kTlb0$cG%1d=O-CZ1eMWY{e%z@h{d6lYt@Ue4J8A}G@kD#DE(=))8x9i3hZ>om?Jl2?m)*K z>99f3vL_pcok_&HegVKe=5+Q5=DtR}z98mZrV!hQuXd4*yuN&ye6vZv5s^HxvY9*h zK$^g{*QS?Nld{mKcp>f8^FKXrI3anUkX(B9_B-It>D&!Pn<;Hqrc_!Lv%Eg_dy8p6 z7{5>q;^5O&9wr3;jC;IU3JC)>rCO~kBGdI<(&R7sUP!0C!~=anL{pgNs*aV$4CfpJV?6=|Ev9m1QVZPvm0L4#b%artGVT zInG2%&kb3=z%$V!JxSt!66shu{>9|b|NW2}HkN-gDx?Kb2+w803S4`}c1<$`{OBcT z0SA1c#WHeAJV2p)G-5kJ(uYj*U$0f{e&VkDjGW0az_+*SrrOiC+-!wWqT^-q-U*{{ zv~E>9sKmOIbJ2b;haB5-PA2bs?fM3(dKNqxDeZMS z2~g0RUuVmiz4I6>qNzMtFi?pes4K&KrR^H+Cm9N~Rt%^o|)qDo$6 z8>uUEsiY`xyiSHV)q>_dgV%`x^U>2F4VeqQ?Ly zIUG};6i0lVBRMZ>C1jZ8$~4Zh2^uG~B~Jb(=bKe72~LzJj*Q1QsEoZ1h>y_lFA|)C z7nvjH&V@<$t;XYm5I<=8@5kjaHN5R8r0g&bk}^0imUIw<<0i|_SYSc8nI`|409HLu zJ`sZYpHth`Bi*FEg)#I+LFCHo*CGjqAlamU*6OI+%qU9kM4dR-lQ_?@5oT?{!GA39CgWte`X3Fiocv z8i`L!#3bbS-#(komDQp}!*@kXg}`WDpCsNtiWZXiUIUi)Jou?bE7cfhZ#H64yz2_h zFc}6;!PZMQ{8~#iu6&3#;v|<%)?GUEdcfGG!$|7j9L*d38E%wa(-Q9JnQ#Jex+w5^q@=Q?2FC zHZ%lom#u`|i|z(iG^#?$Qq8A40-%dv2TYh!drlN5OXQYptOjXn4O`Lt4~ia#V-J2j z4#Q`!zTCZbR~~z+K2tAwxjl@_5=CA*;1q{!XIWrTrwRjDSo)ciSic((Wg*u3?3S{i zU!;Y&h<(86rp=-_vNP%7?$3KNCIQ)#f>`u{!TmjIr0d3?nmPMx!V$=F`Itdr3}k2n z5&`~SKih#B?0oFf8IpHEDS{vjU5LFDmzZ1t)S}oP9@hskuDxXaZ4nU0fJ9@zgh-@a zgxymbf-{@M#kmh-#Yg*y!T#AbX`e#&uD8d(elKkeDUBqJu2Wzz zu(Wkn?g=jnQ-KA1SQ(NaC%e1`VHDG(wWz9y;C($@XTBu;p?4r3m5Ez?R8*FE6xz(^ z*ygOscioWWwubvU+~`=L;}L1LdTAcOC7LNdtD`}Xe_=EvX39I{V3-9nmdeKYwerZ_5=SJzRdp<__DHc z{aeczw_?`Cgc5jmh1Irf%*B%x(0->OyyL(*A6ee3Apd{Jrj zK*l%v%C9M0UI%RxwUl4v9X|#kI~s_8fO9?V>ggZ7M%4;lj4nAz_ETZyYg9WaphD|s ze?4Bn==)A}rPRE@w<>e00O@Hg?2Lnlsq?MJ#JL&M3AY^Q*K$0v|?1z|aI$iEcirpSaWS+6+ z`fIP}X-V4N-bx*_z18c@o|Y;7GyVNI+7Vx2zPv|=Uw+wiAHzcCe@I@rmJ;j895x2J;e z8@m;Dah7K;hZ#zOk$Tf35`v~FFvV4ZlPu2wvJ%IP0_%(FV|AtsZj|Ax@@ZVM*W=aY zl5Di*^oCbTl$Mpc#=8fHzEoZ@V(~6T3dnz6aUm{!Z z*12x^>ES88XXCOv;UO#Q$*5*41N&C`Nb%X)6n~v~ob2w^g)P_Nk8-)-w$e#(eKTva z;hwpbQOOlsW?ub^HQ%b@ZGG8GLYJYtm-lLhAwymsN1OBgGA@zUz;4|*!{eNB5xn86$b!!Pne$tnWX zxA(~V5v0|(+km_jFNGhXijmd88Bz-QCWV3U^YsDl!)EN5mc2C5C()QTAB#_1DfEdO z_JEX3mKtu&LYzG3yij6ubi=s>;)(9=`B*i@=_Eb9upKe|)sC9RS8peh9m+ee*JrP8 z?1D7cqbvR~00pFso+3s9zU*r=KkqcH#o|>QZgB9u+IxE3;Bd0&w~Ut%poEB_z(kMO zC%y1Q&UsC{N;dItTQ}-cxAFwDw0V4d5s4nl-f@8L+aBc7`xxQ^N1?fE~U<`i8 zml&XiyWxYw_;E%O?$O!msrqmqBnl_iBOqXSI1P~QB-()v-}^xGtElniOR>gSE3rJ($>~KQJM<^Yff3zror^H6#h_Bj+>5#gFE@26&NL-u~2N3LTeJqYZI#*%vcI*<%cXv^P*vYOl ztTEM9*j*arE1n#cpoD~lC2j5EV4nz3@J_CcL}}(aAs@6#oESA)S3lA+TBo%b?Zg@~ zTC1^B&@f0H;1U*JUqoIap(x1zo=bXp`6$}PX~xMGi!UmhMX9I+$i7(4{w0N$+k}QZsb?YTOLC)!$WP;C!3D&B78@;$Yai=4M_#w!OicL^=%Z#$-4_>H&A2w3IE~xqSxm|$~QWGbX;<= zpS}0<4AtUHLrieQ@jhw%f^QLm9%jySxZ`LF4AqGX|ACK%-np#dLD+2Z>-H;4>*8jr zhQ=Yc8H*W))NeguvL8F;4iBR^PR#eNyq;9`$w*FBL>`wx7xVnSH`l^Hyw9~Jn@E)z z*GI;6_+5=W&T*`}Lalwd@4qoJmQZT9oBF`V!S?{`ewnzUH^-+cj~T$i`I23c4lnbX2o_=v2EKkwrx8VI~CiuZQDBE z<=XA6i@pEA=;La%(fadZ#vDhqqlO5qbN%S`5GFYgtP)KCsu@pQ_8T&8cTJmMV?VG9 zf@^43?5ru0TR$8K{vZ%7>uT$2yTsoir)$n8!M&Te9l#9gHkxuHc(LUBxg2l%w{O#_ zNBKz#6piKbRJk^6>=%><;xmWQuQ9O< z$P$Wk7wZ3dIm8EHIT1UE(p^4v7~n$+LQa}ACCir1gR`>_`4V7jMPTGy@sB9&jZ1e` zFT3G43?TtOeF($-O+g0gqZ9lh6nFem2NniHd#P*$A@+wzL6m(&mwj30FGqGQXdL}q ziRVNhfSHtoZ*LALn}b%UD(KANJ(zu;bfT~Gf!?XG5R993dX1Vo3i^Js^`znq72Q}2 z0IXz64N8v-3$r!rEV2+9_VQyHa1USB_Hi1+9Wl-&CpN`naRAeBH6y7xl(gS0RQENC ze&e$t&AdS%42sl%F-O#X*&W&(kV|W^`#Wyvh7Gy_znCV5qMU^r#XZ}w1(^biUHn;d zhQcD=Tk7r=tLM#wIjk)3F8gr=uTHLXgV( zC+po$Zd65BYQvYwKjKDwj;3B2$dRBy!WHjRf{zF+IVYtyC{v1ar$p8_)eiMxo1ksH+l!4nvZ1pWH)AbFc zGNj*HJPXut=EQ}RDn_LH6r0v- zw7Rct0~haaH$?F%6BKS!6AU0Im31;sj0f`t(%tcWI^t8@B0y0oeY*(@P=#c2ykxRx zPVonqOi-W=&W&Rq?@rybtjF<8#pWO?Vk$~y<&M=Iy~zGw0HOnZYkZ3$)0DqC5&IrU zTn1%Y1$>EDPK*CeQf4Yr(drULPfvH(J(j}$6Ebh>G1a61j>#+3EGdG55q`jLkiFf> z-&Uf0HfcdN%jzD3HPvT*Gz7z}RrD#o<=CoDRR~M39Os>McvXBpokI1PDJ8d5P$gz} zmnGMOSK4g2|DLpEDqCURqw#zY(*l)H!GX~cBAGtq@0*Dv-GxJd2Vf(_i)lM8u%ZsIdp_2}5Z0x>ybFLE= z(0|4s^le<^_3xKKv}*E5vqcsi#oXEI(cGlJV&%FP<8=8%@^Mev11&WrBU+jNNQOrN zZq>_iKF?7+p992m+BmGb`VaPDHNc#&J6#VhT;-DD*BUSwZs(d zOf9*4J{C0-O?PL2_lD{k-qI1XN=xbb)vXg_<74t_gDQhpJNk;+BgQ*0_gAAnkTV#H ztg}#*^7(-7ci1+2%-&^QNdlxgM4pFBB?Px;fept!9~EkU6|bv-!>Pba{;>l`)WyfA z2|0(Bv$iV}C*&IeazlVJiQlw-#G_&0Idx4RXTh<37`=wf{X5*4^#`Nm21&ZkF4yMZ z$d6NcFKxrGtrUI_ay&s$9_a3GqHTAUHWBoPpcmYKc^9cA1yY@e1d=}xmQyzxJQp-) zRbX9sgZQA>`F3vlTsmcXy$8oV*=ZS+ee>RlET=62QFSW50QU}N7S<(B9&u!ep#pgd z8yUy|`nxedy8HdkVUn(%d=kZuINLF=tGM_CR(|1iw+1~VW__|$KbRu?u|LCZ3ab5OA<{)3p%-6FgvmcP}WYHxEMCvr`*ZyggG7 ziAY0%+kM2OLn7*T6`a5wIBe*q_X#s&De{Zjfi2{nPh~__?>7P#>phG&g0%bSkPBpOorZ>PTvLj$ z4~KNDV)_U(kCL7jHv_kR-tf)ThWb*4#m*KI8rEM#4R`*>^PC%bf#WsDHa>=*;b*8G zfT6i#WQkP`PX!)F8oH7)(Ozeed6e$?l`E!=qiNG$c`^rYOJjOry= z4|KN@G4z4+Z>`|V{_VvE*D1nB^#4AJG?jF}RGPDB%<`9HFm{;ZR=2k>{U?F=!W z(|dyVqZ9KMId<+GwJ~u^L(YmOdK^G2%j%gb0tseht>iL{{(IN9C)hh#1~9o}eT%8> zz(uQ?_W#5bwZE$QzD{+b&Xjx}P+h`#9tQ*8SR6=o7j2+f@R`MMyqFElZ+3{`y^q$? z^~nC6IOA-z+i4SIkNPG2>vUr0bbMH^W)4Jrms&IS_$K_k81M^&y+n`S{QdR4_kQ~3 zHxi<^`8sn#AHJHElVo%(1sdA*g~d)7;=K1zWjf!>cA+R=G@F=H8Ksu4Z!$?L#;%)L zF%ffgd;Mek2p^qp_Z=%wJ++kL98;bzgk;bB)YkU#;OR5fy@^wU$(8kk#tdhL@dIbY zpov?@6yG|0((&UCtoc&-m*Lced^v-)n|BpU84&UdD^Sy5%{+K)D^*|oPb@04fG-0< zKnNjbV9?#vc-;CclNolu_3a|kPhkaCcS(Ltjoci;98xC_mElPPYi`__urhy`5&^)I zNFRg4?wHHvqA%{0HeSab0hK3*E&(iB~V&oX4kFKNfUyBgAd_02M?49P{V~% zImS9-z63=+j7!Wf6^PTNIXqx%)N?)oBjv0(cCK8;18%6VdeL8eSVz9xU%Tk- z3Gli#pW(S*=q|-#?A^9EG#jI{6e^)XMuecI1%MGVA~8TsUlHeqnonbe(m+$AJjh}~Q%Zxb zi${|mn1V~0MPWcZRAL(978W0UYj9(&0mL2;Z}YNCwUn?kv~SmAJ4-T{-+ zX`rm;F+Di!a~I)2=X-jM$U6snH*dN<=nOE+QYxGy1J?{fn#ZSYf>w49*CHv~6TJ1TI+_tcP#L8HK@ff=8fJKOr}aZX^#kZu7oEwpxOC}a zRZstX&uFnKJkRtWN$Grnyy7v*aCHw{l*~-{rDBcS2T@!)roQ8%U0)TaZ`|A0;n$cL zkJ!<$n-$+6ayecC$9MwuJm+TNIa4n8pKtYz+u7gz6o50Uw%^GsME+39QLry2ho?#l z9!nVQ4EN2Xs9d~OeQb1^bKTV>Qe0hcg2zea5_6{O?^qr8hp7$F8Tovq_Z=A*enqNb&3VlP%j@O+qLMy)tZj-4eIV#U3v^)e%kcvn=m04Fb| z=T4~a@TOh}OGOnvpWj-)cVD&3LwUevQu>&L)bL2V5ua_rt2i`TETj3Roh})tdJkUC zm4iotwtrg&r)6-0k!_PvN?r|J|LO|eos>rgr6_@hFpNbI6SxtqGT5$T3`H`iEUGB# zX^f_+7c>~drt5&T-0bWcg3^^m$;5Bx6FEcF?a|i>8065Jlp-m@-Rt@k4QV5e!>ru- zuP&Vq=>l0F^tRu??C*x(Ye+HM)}OOS#rrsUn0bZwcJP*3cK-NWZt32{49@JmJva`* z2GbI!nD2m`K;;E0_1e?`@iKX=To1Ly)_{p1TXbr@`PU041chzJQtU$`yc?*r+>A9% z$c^5ghwM`1V~%UoQW>3VdwHy@iXz0*pQy%GMDt-%-YUU>oKqbTO_E7n3XF?)@d0*EDh)|5Eg`f(y%QSi_7?<5X#K74~VwtvO_6Q+UPlk^xM2y z^|Q2elM`2Sl}ylPe$Q8=LZQ6`483&>Nr!asU;r#5(sSbUy6xv!$rHf-LLA2 zO0Zt&rOf-IH|I!5ArS7U`#{y|HXybxm7Tsq!~m0K5ZRCT_PCVm?OhGN$-5@8hf*J z^UNSWrxSA<2knQVDsR?9Z_d_1??gWnfp8+0;(q^ory(9}EQZOLwhwe=9UI>=12#11+M zg1t1r($&+_dE}m3up`T&DF#qJFD@r&jY*Rlc@4ihGR1RzVD#$MQ>^AIQUk) zH;90wut)uAk1awAzQvX(EK0ZHn*lz%eDAR(>BI3xurAG^hZ2yFW|_kgYW$C^dm{L8 z@hx&p)Wit^Xda?zn3!mOHkQy6-Q!|O#oPTi@9iW^AFVZlWq%q-C@GcGMADJBqrwC$ zo9P!Pq`dlht85(u0-BGRHL0ZxHK_;O2EjWR4;qyJ1c=X`w4}OH!JoI!BDu=$wixT( zZ2Mlk*Zc5-N9wtV3Hi=J$aBEtAocJSuyE&MGB#}SJHQExZ3|! z7(BSfQAlY+4A)UCVc#3OsY2Zpsg#LU-Yuw@6}j*6snBpP+;9$ncpB*q{Sc1?WMco8 z3u?lSTs30B83a+%j1&S|#N(0LaE%pK(d<@yN`PmiV+A`52S-4c`9rd`)twM4s+l@f zttFx1jE@Y97gw|yxO(bVA+05AKu|{l=0XY=J_jNzL!NXt-uPH)gN+o}PE14K8+&es z1w29dm%mS?|XCp&dqS^azucPVcTkQFgBukBQPp5#ATle zMSfzCH@q#R%k&XTijhd#u&iU`)>@A>(te9yG!sa(4o26 z?tL&jb3&|GJ@LGGOMw%4Uc|Y27Prx3|UBWV6Sg=2=nDfKLm~uh3}9IdOl2_ z(|52j2u}XA0em?NJ|r7YuV_quy=YWa@#FcHW#Z=si_QtLhLkEYQ-WU{(Lt6Pl`qop zq&ty?+TOl{d9y&k3Co}XYRo^ibF;Hk$Hz|5@C*S8%J@5?q3eCWpV!B+dqD7Ri;pwk*GEPf z?33i93{KuqaiCT$Q@y-gQoXHJ-Q3b*W!?4EjS6`A_@*?l_1?Jo@cZQsV48}ob|iU38;L=tk^bcFC(d; zqas;1&$y`HW>M&LCwi1v$K}MK!OcOZ(#B0RYX6~Tx~g_m@yp&+Rz=VxnT3gkj)HgG zw9rZQk3%vG109Q~lpZNq3)HI^#4D|_@D~_K%A63$I7Fp-jnXs#E=J7@!X5@X2KG;T zJ57or2*`N;>FI4NgCMvt7_f28BRO*M$38QYq_|nCeXReHzmwa?= zoSGd%l*&7l=m&&-T;{8}tp1lo0%59Cq4*!tzmAI@R-i}Ha>W#iNq?yqRnA?lAfF(g zD4sB$IM}l?McR~|sR83jnF{pz7)nv)FI0?H%+0}C;`C)|e`x=zE?QY39LZIe0jc!= zTP?`GDT6Gk(S*a6wkQ%Wx>-S?ONS`#seq$Pi7C#hz@y6yDZ{9cG%N3$hy{xH9xFf4 z8#YkD2{q{6%Mt$Yt5;c6x>wOuV_#@ogv}$JL99uxNwo`XnJCY$l-e8Y9Cn9&Xg<;U z*^XNy*Q#zXG<`MsS^aFdU0hAC@vMEU<>A!1^acdX2NXelFBEL{O{xGg`9{g|=oJ$6 z33yFzBZyhUbleW{xA2_t2?0|ovZ~=WY*9HRIs8~0ZmZmOkS7pOmy>2>y;wq-q9R5jLyWkHPQ+xb1$46xRQd`c;h-_;;KVTSB5MV!ix1G?l_p27ZvQ zl0Wnv{v(o<COzJ!+A9zaxK*`n)MtPLVQ=N@Tan?VuF$0soDXu9*B$#bV&XVgKKzUWI; z3VYzU+r58a;`nx3fX|^r2V9qsM|G0VO-9G!zKq{Wxq-JtypaQX4&ck972t>7@dCSH zY8B{iX5z*uP#Feq*kLC`B23Vby+jl`KzKzbtn+s;f~$H4HipQcBDQDQw2IRx&(XXa zU%FY-lp}Q06pqQG$IpYx9@D;~HLzVzUW+=|>d4y@jxalwu)5suvX|ofc)8X~zGaV4 z2%g{%?|Zl73o9WYu_Qx4WjUXn>2wg6r)ns%qdJcCqO(Rqzy~Atz;veK%bu2=E633T zR3so;(C3l)sgt{Qiv2qbcWi{Sv0ES@>mPCZ z?prr@aJBmzl+yv6bIjJEF;JyGu9LQWXoZt%bfuNNyt1;SBx(SE*^gVoZqV7-P;Mrs zv8s2K?1$|2@;+uG2-tdwz_q5MYRBeurqN&_XA>Ahpk0vd*IjCfdMH z{|}-(-{pAB8~~%-zXKz>up32?swJnPD_Ajp5r?5olH83M1n6Z4tb5$4XP&)_wCpy! zY_vDGZHyj>%MK0HAH1L%T!xLDpJ%;3u^k|ySex1R*GyF&*R3K7{Zx+3o`rIBH!4!u z7|pbV1uw@3&n2!~Am{&aAR>tIKLh208v}jl$Ak7hqQO2k>Mz|LqRah7Z*CF?>vM7s zil;JmT>2J!pe95t8_$f-)YS*}!gv6&<~A$&LtiiG5GH8g7SHT+Irv+S#{=KLRW{KK zOXY=h_1l8HGyzy1E|C$@K1qhqO6(>!N`e7c8JJDt%}!WCE9{cX#J!NeEv>euId1e= zZ&LIiQv2jZEFDO$IXU_S|1;{?PFFcKtLf8Q+Evi?FCnB`(?c>o;BeQ~6;sv<72P(` z_=RC7Nb03(P)p;#O=4)BFQNO=qRVUcK4vSaMyTgZ#(@t_r`?+aYs-68dS&ldz&#|l zY=;lwyMy#UVtqp7OVsf_NB0sb2*V>NbaleR<{iFzPZ0I3uS{U5^*n4EI;H)VS5IY0 zWRRhAaTqCJ$d0HFp5)&$?4N}sYEpy5UjyK@5Ab(N+_b35PEox~L-E^ZdaLS0Tu&CQphVMvUTBe-|9$;4*G~y@?%{w9N{pUPT(C|G{UGKmN zw_S)y;^@W5y**YXQT6Y{QDr?Ir;ExZkSXeX41FS#^Q8?HsZHH)>NK};X9D2nZK71k%xmoddv2C|MqOyz=9@wg zxvkUsTY2Ae{Xuw*bikeQ5({43dSq-C&pcjN>ySbwZv{L4k=0NMe7?Vx=7x(I+Ug;r zU}L7A-wo$gBtbC@%4wyFOke$^6R0>i( z_Te6NOoWkV`s%IRaW8rVNCRhk1<{_LBX7XM*3w=fT5@YJi}+2R@43G7Rc^c*A5A+q z5-@@|a&m`h*qVT_PiB73SW%a~$~NYHX%`B_@$ev){ShzQ*aMyn=hz;+&~DsRYa;%0?Btqj2z2jy63u8_il3%ohB?p^JJFTyhw$g z-+(JU_^%-BPf#)2k|8n4 zSjDVA0tpyL7?d1Ir_eshU0TFXcTj(a+Eq=>RMYrG;^V<7jqf)_vdw36q31OJ;EEtx z|1Mv_C(F1GEANAt?+tsD9eO*9@PO6pjU^#Afl=bu2wZODH~tO}^hmjmz-!w|H02n~ z5OGL0NzW+BQ1~%Q=ab6DBl!6Kei@<=&iSpEu7?g5n{T{Gr8IRAeGQpS z%prNPWQ8`cFFBE=7tegn?B$c5YP`5kg%4{?s(P4Q|3qhHjBR^DEyDtnz;=)mZ!s#p zD-z=+5+jTT&$j3;kihcf2r-l)W~2I@8)!q2DMrWs$YtaidPaP1fbBX0NR={rF&df( zzN9DU+1?S7pS;7ge@UHXy@^${vtF@{-X$28V}Yz&P_wy*-3utp*jW8?|8}}#TzZ_k zi-NM=H|wb={W(f(DsxBbyp9JmWCUmaCxJNm>p_`SdqY|GiH)_P zP^Y$X7q=PGC%SMW;ywhFy8EMfWCffjoH7ZAZ5Hqr?SsNrEGa2N8zp zzKrs@E8Jzxc-q`YYfdpdtiBAH`ECq7TEC#BMe7s(7xr0qApPa}JYQyb)ACS#V>+Xk zPZWz1(D&#dH5w!o3@KQShnAGPkNt|!I_E(};IM?&Scw@`{Yk4V84>osTo>fX35lhqPtB{G^S2JM6^I+^Bpk+TX>FHfIr2S8p{xVtsjCV!U0>w{uA^&$JzD2@f);&zD1n&n6@_ z4~(5$4`U}C+*HM#@3x1>!9EZxx+)~6HHNMJtFQ5T%s~Y$(+{V>cQcw@nG|_Y5E!=( zr-)lByPkKhn4C?=znpKf&dKPkq54wxnVzn!%mhx@^qT#QO%T%N?(@6fvDA3~vJCt2 zN*OApEKj-u&XY1pVsHxSw?8t$+U;ir{pk$b*KPW?V#0KO-M>bB)+Yyyd(ee549;=h zX5qCEPkbP2Cb3(?M7W>YS0_aKg1bo>j6|cSg)iT~sB_jlZ8l8PW`a>qZT8xKl`wzT zI2_NZU-Vs@BMwo9(r|E&uyb&zw)(>O?-&^%I6hQoWrF|vhcNPg~r(_^s-^4J=Jw&X8EUkn91DL zBBqu*#l!;l_eE6RJgrYF@EFz%MuCsqTPJu zs?N@3F;Wk2HKwpHQdDLhgE2K|HEgV?S3t|G;*pk4x~8&B<0gco`S_x;Kj<6asL0Xv z<>&nxj*Rd&6zpv{kXjMuld(>hv{A#;+-p2U`8{z0F4;wx}qeoT$16Z;)#UXGKza$Pj?g&PwFXjA!9-j#Y<2MFIK^2Br zZS)T`hT#hA>q^Vl=w|H`T~y?-#e3;iNR%NL+2PklI#CYZ&Ued=|e+ zMiM$y^IS8~z)biRQOv1?*vzF!7z9iK&fHh@dK%*^0@X;LY($D7g0^aq_W{FGRcUT|bux#C zU8nWSPcGT4G#|b=oK`ta?Iihf>`3$j6SahUhzgJZvL-YE93Rk>f6EbVWbd}qUsK#7k6PlM%cl^#zEIq*Go-CQ%hYgdOGn%EC?Uu5 z+4_t2053N{mRwLEz?1HG@2|HH8hbAxNtIP6m%ph&;#j2d-Hl3O7db0&_?68tWbBXV z+qBBQsLoeWq~`XIR^Mh0ISY^n>oo&)%N${h0qzjnP@%+F!w%QrHzD_|1uv2%4tZ)j zT;2+f&eLMNcs(2!U9CP@{n~MhoP@ty+bvoHHddUtdLp`vf%Y2=d;}~?1NO^jj~QNB zDqRdIqeCF)!NMwi%+-sA*pl&4t*|i!*!3LVKak&oLOwoWf!uQVFqZdsaIi1ApB~hs z+~QJwfw%&G=28Np8dI8B+caF+5Db`Hq|r*CBgs)ENK%q*91K@oIoKRH%{vZ`jQ3Js1096S3qg?5!)=Tu17u*;7mGEf^WA-V&JqW&j$y zZ-{Z6MgnIwXvI;=WV5oNTq_MxPldHwNQ5seawxqM7=?e?b}q;>uNfnbS9c;#R?Pi5S%dkX4q^Wz)L0_-{xt+7sx z7CepE9e7C^vG>M59QJkDR1xfrfyI5m<#Axyh$`KZbSo0&7t9m&E0pwF_0*!ZXXjsU zFhq=^VgV#(G^SjxLjf@CAdjUNHnwkV61mYC`JIu}l>BxQ0-7Pp`NYl3KwLUxpQHMH zi+jj@DcZYIuI$bL1{M{=V798lN=2N+y=%lW%u90E+3;F=mE*t1e3b+Am?ihPsEbPUW>%v9fSw8s zZ>6$X3qi;eoS~P6i|EVWpJ+k)>$3q~s`H#zw+qoS!Kl>~ffKbhkp)gdFd_M_xvFu+ zNGgu4+ffg)X6vgs!jsXKcIE*4%bChIHtNR(MZC|MnzfaTlIMqa$GBC<94R#fqs3D@+Sqo?&cUTu59rZO2PS9B`Yr73Cy`tJHeyrCTaqHWcfT zOFH-KqS)Ol)h^ecqkgi1e!+{$M_7cc+n;kUvI#ARL6j$X?tI_q$J=HEIJ4D#r`FwmFN5eWGNVR>J_5#e z!JX`?ptN;eQxh5I4I=GqQd1EfQwqifOXS-YPVq*UcW7l1-0ZwtpphT_wFrZLQ6GZ$ z9`ULsP99b`M;*<(_W`SL$yxAgwodTqpA*6$@b}$5CBGDSn+S%+Uy^8i0ScF3^2MgS z9&0Rg#3sq#v!uG2#(zGd^)8HMdZx zV=vY$&-V0nO7;@pyKK*+w zNX-P{f9^u-I`Oy#onagY6bm9!I21pM_uBMXxz_0B&A}W!9{0KcT5G$@{RQ~~zg$Hf ziL?g=#~loP`YL09>)?mV{gL+EE$3KW?z>gc7t(4iq!s%rz=`DsW$M1BI?Nn`erB^^ zU+Ys%t3~hfcJ$X~oV#!Ho}E4T2Z8Goe9QM122dYlL!cy}J4-hquX^R=`vilxd!2aY zyg#Xx2IawsR_WiK#|P^B^+@#&`;vtlrel{k^i1%K|6evKx(yTUfQAO3IGaA6!ht*6 z`r>NUY(((;%C9C_AQ$*(NAU*8QF!Vyf@O!K>e_FU8j=#j)LHFj4R#!YlGv45V zg6~EuO07tMRN$aB#<~s>r>j0(@fF>U85U7Pi*cwT+Ee?{1&kS#Yr?;(UmU8K7-Ro@ zmn-{iK1eoJf_;g+ul(mMm`qG@@9z=y>YCA=cx0TSqTkju#l$zhe*nd3_Y(griR1pi zGRCuT{r^Z`9pm>WaHl8aKho#j?+?TE>(vV;;(s6UKRm1dudt7siRu3sU7`i0gSN7q z=bC{}M?C(IKZn_U7R&f%7$t`Nxn@=Dx1_xcql{+D=2i(~7aiRY1PJnF7bl9btdW%D zqvfOwT|`7%qn@7c&ZUtzV>d7+MD-Z)CHFz#%5Sp^_pK!DX%o~INiI;Ler~NKy@Y8^Yw<*m-fw5z{&ErN;=?gyT1}T{8%XY78 zW1pY*l3n9<=d@o>qzd!+(JQX*Mm#(`SJb{x;12Q5|Fuk#IsQ=5Is|~{QH$C=26EJ!q za+hlF9I?!>Pe}e+uiFk}TfT2w{-TrP_gH^de}4|JKhTtTZ(xM0`e6(C8Vw!q_=fBg z_ZWTm2;=(bj12Dn5!N~K_Q^@>w9_qTA#gVzy3CY^w==N6D_cCy%?bA9-swIj96E#F z%_ex#T-G6dM#FwD_qHBHmop@;`FraWf>yl>x69_PGfutg%R^SwB{<35Aw8)~J$NJ5 z|CZS=@cAeNz0WYf4kY+?2n7s=(unDffjJsWKAK1zr6_!E5X*>;IX7KUmW%>9DFP5q zJ*Z-Y!<_RPpDqOyog^_sbq;SEwkq_B{4M$mSrQz%PZSziIv9CR z6r7lpB!Y@0Go08cf{P?qk_aWjxiFwmU#ur0H_{gqt`xmn2O6_7;VPU8nSA_u*p2qe zt$YLFj>R$O-+-NePT-{&MbZnoP-0i&NHXJ7L|5Op;Y%>VH{bKK&eDVMOsrm!7qu6k zkM)7}j|-JsT_@l7)$4YbH{m&JvqI4UXlB9J*@Vwox3s0g-?GO)0=hl#zNtM|R|4gJ zU%zTW@>nb{u{d(REDc_JkKG}AP!T1O0KNy=-1gTpWpDC+@D;e7Z(H9tsfgI@WTvC) zH`RDF*zZ#x5~0;NZq6DfxBLUHq~*vm5+;R^P%^M=MRI1o+R3B)%QJW))v}{@@y=Ym z!if-P=a*a@@+FdzCv_4ham=`U`#J1jpym3H;YtZ+R?6vrwQ8pp&i{d(+LHw)9(b_* zRXsB5LK_n*bwq6?HC6qjjMHYpDTX}^;puX3 zAs3a)-m2)_c&S0~V~wYu!^Yg=?Gefla|3Y6tpR!3Mu5$32elUY5Tft=I#8sf#bdRN zm^O7CBO%}7ns2Eo7!UP@G&U23qI)dG+~cp$z)t0C&veM_-Z(grGKMrQfkWa!9SiGMGA^YQtiupIIPc~mo!^ioH&`9ta2vf^b_3yE0J zLAbx1-nj|@LE>?sPuAcaKJ8Ga28@TlJ5VW&46+y zT=<~J)1v8Oy^^7uh60S&=)4EEu|DH&0$kkS$`f@~#(e%w(~L{d|3C*r-GY(3fa5sa zTnlh*;`-3)wtK>2fPE6oOX9e!L4lmp7t{(^d>Zhnhwv0XaLVF>IuMSjxw?UcRm{;u zwsr*y7Z{gNxtQ`Kqi@QvX)@SoJ^Iaw>`BUv<#!#XnPa+wJ?FCw_?yZJ;` z=xSM4*2tl%;*T1+@!)+mUW5jW_wCcOYKv!ymF3lPAyWmCH!Ve2eb%yy}PGb^P&>bi;rUEmWN}Iw&jc$`E!r^Jp%aS-m zduPIn++hTG1R;o1%clk)hh0MSs*TB&@A)=LHC2My{$o6*EXq(!%4qOg!k z*JHz$dn>*2xE701AU&y30;gapC{b))IwI#0$XU8azGlTh{l|IzVS&{kA+A|8ek_qes(r7zO=BviWh8l3Rut;a}zioEf3pmhG^l8c1vqr*7aK9Yj*x$6VL$O53Lwx&#@Vo zzZI-gwVRn^T;D)F+5#Yqc&y~B<6LgjC^9#u*p2xQeH?_#M5-WW2JOYZau-iFoULk( zooS})$@w#w^U!rDs*SOBXH*93ps*|afk6hf=r;F*Eo&ypDc>!_x{WZYoLAE7elYwz z6AS?=1~cZ2*`5E%oRV*xm%;6iKWo7})0l~8FEkTD2_JyvFL+FiW>}liG#QLIOT)va zOfQWd=yOQ%ge55LtWHsR3s^~$z)Plzu2-a1LItD7@FZ0$;RI3PuF01 z7edPP$cwl5b;{#Pb&fD)jo0<7{T1$0r{34!NWV1d# zo97ji*(_s}ugGB>eoxTbDdri@3_Yz6$hA+@W{YxLWiYp2+tqoq4DNA2r2Jo(=}UwK zikXgC$I|b4cThC@88Yi40Avjk5`zfXb3U`TXc=A65C-F;h86(=s^E!2Vz31kx+-K8 z*EeBeA&bWJ-jiFu7Vqh27+JSN1zk}I0&z(}0Wq_0eu*<2cI{H> zaiiz^BntgX;K&!ZBpzK5I4U7q5ty(OzQ@YJ^;Cx;#bZr`-Lcl?^|;oDU0gv zJ4hQt?Vhj-is?&Mi?AJttg>-qB~8C zV=30mN84D%;LG)!9c0p|BU{Tx_ks5~0Sy6Y11s@fIbe=c!ho3YoG1!k+X<1%)!t;n zB3^Srgor*#1h%`x^WqKwf4z(`&{B*@3OfmFSQJfSX%Rg|9V9D5u{Dg8XO@EWU3+8% z5M)gn^G-EF8b@;DdkZafGwq_y681y2BXVy@BL`q3*Uz?OUr~-7K?^B{@Edpo#$*raXI;h*gNSrCL zhTy9dk3jvo8Gu++etC4Vx1$cZV#-131h=V*(byKp2WYa^uOsHf>h-uu8zj4<~)5*ARr7;XS? zLjme&7F9E{I6jhl`pTPL5j-OT1p-C3etS#joY>>=yY$T+K)G?=ECe+sZj2(zV}#3T zLd6ZHl1nm9DNH4s2mZ&h<0s`+M9^s!q!P+ZXkZt(w!@oq`T-g7sWp;@hi%l5U5I9w zzqY+viCHOG^UjQ_Fefe4)pPkNH0GQ0xU=6!t(?0ft>&?7f@m5=k9eTG>h&56w$tFs z3vCQzQ16(NU(;GUX)IBE4lqGIx4y_#*qs;=1;tLW7`zVXg{e{ZfxQnbq3yatdg`av zz^*?d9Kn4#IEd9Hb|TJ#s8mw7wE9!>Yu)pdu?zWmYNciFb>F5Bv|ZQHhO+qRAG_3Zw6F|(LWt}-%LnHiDy-gAUK z2W1s(RsBNqdQM?8KbDtdznz{{AFv3QDmG<>T2nIFw}Y#!rwxH@C7zbeu-3<;yo=WB(bnliT?KYaIPUe(DXjgaREsu$m%SbUXOx98&Zk~(Nkwlr zx$@;f(4Y^n@Z<6wY5dGwl6W~HDweVeas z2AN8tULpvsFdT31A@d0pL@<{3)n&#$O$# zbyMmz*pJQYr_B#5_Z|^)TX8yZDm$|V$f-z^v74jAnnWu(@N7p_X>FPu0P@ag>{E1U zht?x$(aG3~Ovz0HTH* zS^@AEnj&^J0Z#7hU+uA+%LN5mNng!x>2GkFu(L_Q!m={hVL?2z`+`5LmZ(w&ppoW1 zCe+l_pmumhX!V`=F0BJRp!ik$Z{&0#sDLXmax=4%qk3?k7$T89+LV7^u2a=<=~>Gk zl{|L3TtU^wUmqCksc|^D6b$>Fw}Kya$3yxijI|m!as#+QFg$LRmk$Ov91%a*2%e(L zG(X1lg$TV|ncuU_In9vHAsTc7)oNwGbju4mq1{$t!UO`eMcQUGQGF*c65pw?ZCN7) zpvw|bldV}rb&91b!_BxSe?b0_shD-BCFbvmyYQdoCRHw*G=?yCMjaw3v)%2X%q5@d z4~Ex#&Px7}(W?K1)h&HfBv*gcod2{YW60j|W7}`oI@)xqJ0Lvwhzs!3D}2}&jr}c` zr>NS*{kQ4g(k0$9V`=+`R3qtpthP0$4iE@I+1+m8UeRo&0lk_mr(p`i7(W13=EcbV z1AvzVJ77e7cQU?}F1^8ILV`3Qw8QDb>>FksBneALxib)D;Z$nu%!}uns~ap1F1!x+ z21J=|277*i<)DPyX_oVKppn&i$=4TyMyG6G^1j4F!jNW|lDw!5%Ai)*NwJ~68x9cNJOrm&>p5FPv5n0hJUmrdEAkN^ zJpk0+kk6<-VxnwGKfLgc!d72jN`<|0E+v99+D&*Jlg%LZ`kGA|_~1W=pL_4*C15#a z8xZhIxK(R|H=8t0)h89Y`&JAiBN^{zk7NO?VctY1rB5uM%7?0y z*x*mhF3{U~t`~q~H5ZjNQMeoN{@K`0qPH3mMdJ^R0IY(kdaAd2Ao+k$W_1%(Ek~iE zn6E!q|IynMH1$oMmjD43EJHII&4Qn#xwF*z6(_+HwW`MqL+xcShT z_CNZGh^`G(pHEz&fL62^i^Yu{D@J$phku}V*&@rjR5!85m#|DNFpfhjDQ(Wc6zg8A zoDuR~>+H5(!l;?)S)=|Y<}egbE7aF(C~kK%e7vxAm*c~+iCVr2wTgl+`XC>!E4KWQ z9&FAr-JhGCH6&7Uq2>rh6UxSi8=r`?#y!f5l-QwNtsuK3P7cA7R&30j8~Tzqu0KW~`qd+KZM$s; zT)t$xz1ANjmU>S(E<#bA2b_Q0w4O_dOR6G{8d9vn5) zAQeC=N;||LQ<%Gc#?h1`?*rp&S-5gMY267nUO8tZCXdkpCYJcDW6G@Mc$P4tO@5N#bmk=TceRb|rY5RE3L~ILfBF^(#{H;7Kw=z&<`@>z zCEe%p()W_40Atjy#{QLF5<*RC(_E>>oz|2oLSSR(m!JOd6!>`oi4O2#VSBEYPw;-l zQQK*rd1W;P`NzTYw#|LG?u(CqunaTV(DjiXRo%Ovz=F8w3cE()o5OD~1Wf9`_mJ8M zZXOLN8vs=<_Sx}+F#0e!`5`@I&#_P`Awj{v0ddt=TWD@bA)dY~_rujKl9wTczYVV?Z!g2{FdUV(m&ny*A5x~KGI)vIaGDs1~6iTzB8BB9#1m(2qulT%YA zLDl@_NXdA(tZw>kCPt7sPy6V>lA%Y#?Q)(dZLvFzyr5Jaw$IQ_q{xqCr z%A8_mSC9bvUL}<_Z%#NQfX+YN6nDcc)2hglRnoH04Neo|Y==7ltzmOWNI7=48)*P5 zNj#B1vRZO8UG36VA1UMXbaZN$)n00@YHIMZ{{p2#I)nU^SGHnq1*V)NbWpooBh74V z|xL*rYR!yj6xL~o2oMOe5b@!GbZzNt9 zdi66Md`-N=bAEHgEXvinwb=1LKt@`04?aujTh{z=^=56k0g}sJ;%s~B<5O?e&?S$T)a8;sXKz}g`9(9Li8WkDmd&RDr_(uZT#D87 z`HErZ{-gHTjuaeg{MYs6vv7EtpZ?US#)ovhQXt+En5h)K%t6?;Wa4lAEU$XPU4EKR za9V@-Fwo6?s3Z5O55pTia;y$q&R?&m0fkGF-{V;*goO=vFFi1SMXf(hp_eNH>*K|J z|Co-xdQ~+cO}Ars$KIf76jmzy>rVs^!*p}lg#)W5?LBvA#;7$@xnc@+K{!K|MR1_s zPT6v`{^M3}VKiz)h&XUH6 zN~PmG$KIk5_)kvfE#cU0*(4u&aPbZUWT$Gq^-7SF#>c7s|G95;nE8-OL~vwjrp6{0 zL7rmGo&K487ZfNxcZ4ac|Ng$5E+9vlXpeN1@qy4fxx*=*U)iTi_-&l-kCvgMvE(n- zP`s>=J*rBX&l`v|-~%Cp3CmkmIH11=^wNj2SvD7h4GZI@iBsdKp^*XP9Ez+YD}>^UiWHb|LdB{o@r>(`BJCL9&+8`>k%U0gc2qUZ$N-G$MAEB%YP&~5rnmnI+= zm3&?X#u>Y&DOIuQokxeF-yRURQD$7hV8%k!7dz5(+GI-wyCbX$*o|^T1jJ-HLvMr-5;i1sxH}K*h zKr2Rkboc$*yEan2N}wYSkdczCV6h%SN^i6NQ8 zPc+X7I+N`_ML7PZy#|!%G$NYlWZTEccYWwtVLyi)eE??jJ|!OB^gfmXzu3P7hyb1`T0h$ zVa76a&E4WeF_WyQ1!!W0QW@GWhU=&y zYY)6~%3!RxavnI@KACcFbjS#!4bRtO<})(H%(oeH6KB_w3V*tJQ*<*&$}B)lU3a0*vYUUx4N|+PvSPmDTej)+?nKwJnW06_!tNyKfDToxQS~QAY_F5N>65Rkvu30UY2twP> zQjf}&XyxN62cBq8yI$E$e9p5PVIm;Zzw zDrm7Zww6lQ@eykQ%IhD)k?kulk}FrQNF&v(svKe0>3T70v+&A+o{o9%N>RH96ZW64 z%rbU%LBchg%gXL_BdDpsH?Xs!$~t`GqUiG$RsT_lGdSd>G%$Qt4#r{`kQ1xlIC zdS^*bfN;^2QB<^RN1p==tO<^Y+NxL%fo%0FS+3$8;~QA0rpfob%mAuvtx^()9=NQS z-mrQRw|0`4O*vnLj=(h59ekhdSHDf85M> z-4nHjh_0+g(t<87K8_YH1r}Di58Z`{N4yBS&zugeJmQ-fG!v4eTbH7gdom^x$#oR% zM|ux_5gp7D_#u(JIzVI&%~dEr_Bd_Ma#4+F#9@5iIyYv|!IR=6eG71+&14&{HP`*aMT+{P6SyrHwwB!r~e+ zD&g+nB$i6SJX<(%Ix@OEUsU}yeQF+$Q5kC$3Fd&fH4HFBzi3gL$`w0a5kJteda~%s z8dfIr_WQv~xAot!DbWBb6g=e)@2W&kT<7T(Q`ThFTj0t=Nwjnx`J)p^u!UN#jPM0mgXk9TGYB=|LzOqyTM+)7Ol(0;T*+t z+Dqtj5;k=ebzj}s_td>w0N+T_Q}O0NpzcTZI3jCi)#J>rL#YofHe3tkY{;jc?i;ax zbh`K5I7PNb&q%w}cr~emvN?y(QWZ6+4P#D+(l%XP6Yg1}82ogt;0|>)wDZu?H14*# zp}N_fbe_j$VQU7-1HEbA2O35O_*hb}592zRYSk!?X0n#8Dhh~XUbz5 zsP;zT!FJpID+;JC;rFX&58#f=KAYK}Sf#jk?+r=ztWX{(#MJcFvE)YV&=C--9Cg#0 zQDZBCSnX1hwoK8~uEnsLkJVGYLYNR2qGr>|PM~>m3v+xiHrLGKSjBE%*_(kMO?Z|A zFw6s7qK8Il2aCrq=1>L5`Ds?tpj8~xD9wY9Y|ye@J?>mKDabli9F~72?}L^5#4Eh6ZloXJ}tj1)BA{xBesf4{Bk&dqgq_T77faHcfy zl&JhgGhklhUXaf~7!qp7}jh*?@IPf~>U{)Lc3 zd`dZgD#p5LVSB$KRcUPPU4Wc`22JQ+7NDS;*1u%#=X(!4c8d*KVqP>^Iy1nhrq+IC zOIwXp)!MTQ_=&AD_j^?dPI1Y;n%Pasf!V$ND2SzHn3|jb*2%Jo6=@I6uq5#|iBrI(7t-k$K*E>dwY7jE%J_V$24Zh!8>~pT!p6~(*$+ZO(x+fLQ zj!u*F2t`s9fj!r%VQ!Z3UM?(e9EwX7D;w?7su#~^UoT9pmd(!_o;-cb)Wm9Ae_*cL z&!+$9I?jKfy#IG-H_LxRcK_G5f9D=3<*lsx@dCFW3Y<-yRMw3#TU`c8-RXyjh*p=0t6TJuvl3 z)?0Eu{V$yAI`znX_1MvdXZK(p+5cl^v);kNL!;MbavvD&ai4x39uTzo)%YDdXs`#7 zmV59vNb#P#_i-u%?#Awb@*{soYG%jys&RKzk6B{Ro^yXl`NJ9NuqP6*N??|U)$g?C zwm%t|3yu3m{$@#QfjrV*Vu)ZEYt&c|7{Qz|nQ7|Pv$s`p6@C~gGBMQi)Z1SOiNxrw z z;Cjf_u(O_TP0xk^J#yIaUIREKs@T9%gF7Vvs!oO$2E~v|gFYqf*mzjS6=ZEx$;Q%v zhTQl#tCY(p5nZ<7PpOlg=q$5AxqY4i-n*zMf@8!%qbi#5VN< zXUh-9_I?FOsEsn`pb?T2a($d_DXmF^Xl*c6F)3piws*+V<-;oA+ro6tguAUN>Mp`o zRyjRrvSNG-aNW_V?QHRL_=S^zWzMFX;ns9K0%b`6_9e|VmfAhV7c_9HKg+q=O~ zbm6xPMXVykmhOADiMnoKZD7UCOI8>t3e`T0injVSIYRkNGyLb=(!T~l$VmUbUPCVv zH$L`~Cmh-UY3wX`G45#|Rj*iqTicJu(jb87!bHWj?z#u)J*5{2tLhRs9?!z|yexd1EA)Zrl=HqBwTZ+Pj_%%Jp82h#xO{ZYJ`SB& zW{5v{DzG4%%0z!k^IN9_5A|!J3^0kokPOx10fIb{e*qGNY1SXAJhj45>I|cmD`PVo z-*}z+E7}aFdL+7cOxXfozvtH=g7{qmpBu1?IyFHQXpE+g=@Due%vjKi94Q_*Zgz*ab5-(yQsCgNfF8w|SeA}`0}(U|>n>S*c&T)-R@4V80Fm}{OcC0=+rM(6uxh|JQ1dEX33 z?Qku5?t!UrU1V;Ae#B^gROj7~K1p%yP@JA4FV?r-&=taY9Ehav=NJ6E@<33CnBOZ45&7odbPL z&j6loEa9#$v?V*oW0F4*&jLHsqy+gh2 zu&$8bujnUKAsxsPr`CPe$l>m2?GbK3Sa+`CgccUy2!_#`wc$@>&h(~p*hyDzZTZDp z7Uk>#o~QvF>1>R-xYEaHR0f9Ocq=i2$;iUVHEBkF>tFQkvIJ7qty$I9%4ZeW?O4;- zFXjDZk3=gqo9=f+H*R_(TVx+zJv($kUd$@ORzG6ePe5H7;q>ZJf~fd1PZ{NBOo>yn zG=82zdk*4)0HBS?X8zvzp7podjgh=+3{s`SLv)1*Y>q#S-sf~r5A6{^HTvNRZ?+RH zfo6I26fQ^0;66@9N7t7_VVSYwjEOlO7wJn6HtJAy>eY` zeBWde-Hl(m7q;mkiv&xoN8>%@_xH8XAI6A%B0S#0T=YXgR^Vim8;?$pf`^>}Eu06i z;gcmPLGN&%Q8o%D76*0&SG|>X(aabr#>-VCDtR^wanwiJG^}b+#2GMYRsa5_NCw`a z0Ha5fbkZeJv#%?blN-mF{2IjZ_^hKPe5wde^}_-!oYu>DzmpOBjZC0*m&wgQaf;sI z9(lRTfjx06T_&HFJII?*1O7fm>TOKe4YSr%o=5+%5-m%&T_G`d6jod*RiG>xGNeOP zs#Sdq*BsnBM>ai9B@uZ(dHYd=QHywx9lhM9aD)J+>Kkg5(6 zqg#&E8>K^=Ga=7#jCM{r`4bO6#8SD!_M8H#Yj~4HOi3>NJf|R>?`eWBM9_avO}cax zzC;+5jx-6{I|AB0G^K@|Ul_F1lqVr|c0~rS9WuHP4qv+H8&g#i@*sDiqX*4Gu!`0= zC3d84smo@1E$%KTSNR~cFS73#g(?MMz zqv_PfsGO3trs{q)R(4aDli*2D^Mp7#ke zaNW3!;Y$xirl4Q-k1S;I1JAsxpty5p<;begZ0p zl`cQjQk3)705aX$FxC@QFynYbh=Z{$4Dn8$Ic-e@?17MGp%;Lkaz@!LMl+902Co4( zXQvm9<~c=M^~2n=blaO7ZkCPbN%KVF`t~i2R`GlGnoyP5*hyK_OB2Hdt2?kWCJmQu zNP9e*3T7eweZyajk|kq;E^mAN=@|0d)%wx#ShzWO!js7qpI&-p9OiFPXz-$bbD=pM zA#2xq?no`oiy0JXI zeMS_bdz6fm0syX?Gc)tudWTdhwnaELE!q&1(3DY2!%nG;*{7GLsgcunit~NN7Onkc zeoO?{?|()K=N9^%G(~e?i^H){xuXlKiqBmp$mMdNE|G!L2OwX8K7Y zNblDH=?#WvQS)s=rF4|!FZi-t^SYZ`8sHV&lMIcKVhQ1@z2Aq@Tl291Fq$Y74wguY z62tr~qaNJOwn>3NuV>FRX=Xz|`HyMr$1zv3)RD766-SZ$1+mTY75K*5>cp4mOsLom z4XJC^^Gs?;mL^SVAn3=|J+YmTdi#4~6czP2Q?<@bvG>v#$F;#J6ysE1NpM}hlbaj8 zj!S&3ymyos6IRwfu)Q6BN{m;-=v0@mgl{KiwmF#Zc{qZ7a&Awe>;9XCYog3a-c* zye>k6;vZr=WDxs3M)6u@>Pneu4Swcx0!E2<;b5Pm7*~KNp>g};eo9HGH$dB%@|=bX zX<5Ga-bffA>6^R+=Z-ALTBjH8{Y~HA?=>V>W<)u)#Ww<9%$qf=SsRJ(i}PMNkg`tu zU%~ZPdeVWHUmKLe=1vj4bGF4bk$lULU8%4JsDMh}JwP39x6pt~WtfJF8C#mNUelPC z!iKzb9{6SwJ#3_49us!Bc<;EBcuAOBV$w_osUKTcdRS8X6w#n08piE==uITieVkurrqMQ4w9G+P=dE;tWPHvwNsv?-V)+QfEy?Mj`yYg7nAY` z>IpzYr%z}W!ATLM@I=Hyv9m8nUZu4b$>N0zfLbKxkk_?k!HVLVtw~~DQe||~^(#$s zYDC7&jkA8cz1UM=ZEmf#Fsn(Ew&k<;>4kAsV6ivXPtK$K4`x>)3I{O>8+SIiaJH^c zcl$y;Z=ivhJwfI`Svn_SVm+!<8C}zKbjcU`bUVx(Y14d|E1*v+tGDl#3sM}HexiNo zRqC<<3`-L$tTHl#+xxnj@ThBT68InrBl~6g34>T}^fX_!u)Ozl^SLDfIjAKGyfdN! zG~EP!duzqSj*&z0#M9aj&w>5=jlX4Jmdo?`24ZMheaF=7SIGqd5GCt%Dk8Vp&CUBK zVn-mgL-2h}Zc0t+ywp0ql&=IuB4U2GH3KC5w$=9zP|j=V9a~3;*UK-%m7gvNNBUSi zV|$mhs}jbq-qc=o;Lg>OA-Ry@VB$(Q)k zyp_NKV*pJVFb56CG=}Ch&Q5uktFPgSMDkIg>TIPST5Odpw^y zJ*^wp;iA~Ls)I9>eEf|I(@nCTO;}|us<<<^EgZT0Hy4*qs9`o1UE0&8qtgFILb9^_ zl5KxoB`6G057PwJaYvv2Vp|1pY7O*umT>n&HQ1KN@E7FYT#QcZMv!tKo~aOn5w)VR zsjzu`fTMV_Gb^LyMEbr*REdIopn*j21q(KPP~F2{Qc-c5hJ44BQBh6KPSQuLvnPDu zd$!<&zyhzZG_oIE#>TQaD%_!&_~u^z1K|GDoq2)pqT`IBcYn;{?BMfaEFJPV9RQ!( zt`>Kc1#N&fPbsb~DQ++DWjT^s9VcYV*OsQR^c$IJf)WKz1@;9hP);t)0+T0cjtV$) z^4npwcRwA(X9h_G4oq}2wnjLnaKkW%b1bB-gGp9dWsOa00aA4UYh`h_YTRhlaJp5X z#@~LLv5jofD08+_se@)Ue}Me}v6l`hcD8YlSb_WkhlhF3g^M6~rL?{@5hiY^TDMTA zOc=HPs$|$!JSgGT(i)KxV|;Tq^@5F9X)-i2D@rp`Xzatkh`+J}yd5wH zWn#=UM19p6HYb!yjChJuA;=YwCBPEfH>PU7oLVkI-W6CUr4}_kP63iMA|m>G37?M&w7p`l{WRHooip(a{G@jF z-0h+1{BAQ3P1uI&s|KfkqPNs5=B?P86zx}joyDP{oCn$%29%V1oM7mG=U@Kb_bd-w zpQ!@%=$b>Sl7M3b$+ANKw zj^af^vly8AVu3a@_n5vB#b>xMTr@JJfqp5V*ggE1Uanj7fU*ZJ)YEUWo=f^D`VMQ)}XKxemi;()rPTYW_fRTX^f zQ;5GNMMqW~%y=AbTMTVInT%t>1AUH%+&#woJrLosDHKJ?&%w`4X%zC+48{JKCQ~(S z?Vv(nOSY*69f4gwK%V=C8D0Wg;9^I8#4W8D+b|c^-jDa~=uEYn-$*T_2A)kd#%P}K zuZieb+Ao>C!UO#PRjgO79#9-bVEz_JfzCi!=;r3V-`t|vy##nW{lPK&Xs;Llll&_J z4HU(j=7EMCt^Ev%wH(WPKUc-$z3Tlh)6^A{T7A~z8ef0&neeb?jo(qO>-nyDciXsG zQwCIPMFF8SoyvJXx0#?e$)&r!B;Cig$W; zXW`W1hkK9ie6Srlo;I8t*TLPE^?u;*-82hcbv2xUyi0D$iTy{p!1E24#eK*_qs4`} zPVWH0)Gh5Z)T86WgVdE(CN?WBJIq7)l}J=bdV@Is7XN~4>${IZb(1RZ94&Jy#&0}g zbba(35eB#dz&5CG(`!xpk?{KZCdS;yY+Io=pkEaQ%qap{ut_8C4!m7|!)wdZ=FhA0 z=)82>^d+|$R&1&QozY=)V*K8PjYv;aoOw?h2e2N4SL1odEs8;HJ^vc-D@)_PAyWK} zg#85Ax-Ez^+WLy7YelkDIVU-{c#go%ryk9+XEOvHuLvkM4-mlBswt4C!{;Do4nMn7 z3@+{b3|uRqfVU>Jq-F=9+R&~LMh!)dEpuvJvx$*!I7`S%YINSRH zz(!tCWcYojJWw*r58a_#u5g-rd+P(oSw*VT2|BhJn&kcL-xRBUzwj4|;Y2Xv*>iBW z+`^y>!Pvvn$;@4B;^}AwHAymR1Lm*FKF;PrlC5k9!Gd3>!w|S!M=V}x;*TS4;Mg?P zOW7xje4}F|Y#!n5#SlqUDmzBriL8DusFJ4x|D3|h`!-dC84tE(TwL#1lB18{@=b27 zY602J6vwhht)+;HlQV8kc^Ge2zbsgKxnR~w|KYp*u%-cp1bbqc=NRSe!7$6=ikpDl z1e>{41vT)rQoG zWk--%Qwy02;2Yck&EL!nk|&JT4U}S|*20FWw>;VKUTMP%3%tLzVg?30rQ~2DSw=tm zrk{6O^3OJOVbkxoCWrG3=zA;+_S)A1-2yO}LdRRJ$%Z!vgRRzgSQF3(t=1W^=j@*_ zoOkd{OeeC;{vhd&#>ceAzjr&U&Xaq{r3q(tnR1j%hq1k@bZ*c8>uAU%QJ`N5s4u-{ zHr}q==G_XT0G~WOo@I~5xp$3(;*XF|*yN=%&lnm64(5n;dzbjH`U|f~>0&u=C_DV% zEb#v#i&n8{`>N~sO^cDbeM$7>Wzy#p`|V&;|n z&$-Bd;E(_J2!@&U{~ui=GSb8Abrsj#ujlIG{-U7(&-$M(&&K#4o9_Q>?D9|6`rq8a z(Vh@G%BR?`P;n?KzmGA8aX;}ZRJ9@OE^USb0u8DQR1^?V*Fl8|tLk2%yl%VE>JLW3 zNy=;sRcl+CMd~+-uWh|@7ki#QeJG$vx@~V?g?yn-v)p)ZSpWbENJtbEVM0WiKYyH) zz$G#0(^|JDd1(7YO1j(AGbg$SGKk=ja7p&6qT1A>+bzkdS%CCR&8nDKu>Oo>>=yM_ z2G=466MEnR>{!i#(=ufb0iM$ik*8L>>KfIJEe)@0w+yPmAD>ztpm=o+ ztu2mCEgRITcWyq_da2-=9-i;+ptwy5_)U%vp0m`nOVa38$8?FIU|~Imw#P?@I9A1R z6JOPD^6BdSsp4g;K$UfQAbQL+?XjuLCD}Y#RW`*!jx-Rv-+Ds%dTNg+nwlY=9-8lC z$Ne;?v#DVo+R~;wj|dOO!lw{t5Fs(0DK@&fXJg&J#h)rV)*J`tRWdA^n31maHh;Oktwnhq?I9WBcl4h z8ZxvbJESQnG=Gzas1N84Y>ns)MXE?vP;mZ62h-JuugR>TXhT8_#IH%&knE7PpzuIa z7*W(m{vqEXaYdmIrm0W;L-B%yA57uke@E;MsXq{VM*;j-koa#L^1qce5s5I=Kc{;z z3N&%xU)B@bQGg9ei)FQi@NX1=cpr9n)K}C*^bGbUratq}ph>%A;<#V%iZH{zrX$rl zT?XL<>bKp6T?JON=hE=J_$V!olf{&{S>nH>t|nTSP9sr4{PTgeuwEqX=A9kT-2eRl7}oR zI{#jyM$Da6u^c)ts6ey!H+U>w85;GmjTkgaZbAYg4U~-$&AhycD#+$ajX`(%M{Y=6 zR8=nhlUf~60GtilBZ}twPz#egTo=Vi$`Qm}{v5C9bx|mfRiqR4-xUQU9nsD<*^v=< z(jzkpB1pvT^>;8|+g(^!T?1QZ5f5p@RA{s^6*f%?RkaE91waR4T|ht1;(gn;6RAqq zHQZ-z$H&9wETNUH;P(1dp|dpJ=FIJzeSH?30AhIA0;N3%d${Wp@0ahax-KJ07*p67 zLR3579z{(Q&6EO>=5dJ#k*T0gBkefDbZyE}UG*mtey?8Ia?wYgs?r$#!=v#xa*&Fv zCJ`hGM{vjlEPJ}zkl4SmUTG3J3*lO5xa~mO(Hd$9X*3*nsKM9hKvbMeC!r+qrP~>z zS6Lm~V^9=%(F>o3)8-&+2UjFrp0!lv1lA5LVhuP)^YAM6-}yGHGG!gkDr9RN`|2t& zj!QYcv&60K4@evmTsdlywLX8bmOx8<1@OdqX1!@y8!V7?(tm$bo`1rogwN2uJ~pSt zY6Ea&2+JY#SGYcyn%{itCj)Gy5laYh5hc^T*IQ%mxf zIHGT(>2`YFk91dFrVu*a@)aolF~}aR=^gbF)7ANazU+A!Fu11k{b%! z38~=eD(h(uZ;Cl=V$OI(`gv)q47h&0)$u!=#kPt%RLPrDY-$EhrB?1|y^#4sP7g6~ z*_%65$|V22Te5kP=mbrPz+UXk-k7@|c@U`(Q?5g0YZz^SnVYYm(9Cw$lhqUPqQq%O zf-%AnXG*8KvMV>qAIprsj}c?q>0~)}jvyvuts`puYdHZb zIJ?l**~;P<4_p(mDXa=bsS*<1!0ah&m|PaZcf1vmp@Zk>eMYJ0N3?9&RjvSjc}>wT zE&4h6Ek8C74~XKkM7E)UHtN2Qf-Tz4ZvAt7Xm8C=W3J+H)s8-{Jdf1!B>_e);Hb8o z#}nuZ*e!X?oOCawat(hc5hdY$Z9Qj9rL{jAjPEt8!#hvSI-C8f7e$Rr{eu~heY1Y2 zQ#^u6@AcPjvw(wHfLCm!Qyt`1kMTA3+`Xp18P9{Vw=Re&R^18As-Fo?=a3`DfB8Tp z-^RNj3vNQtp0pPBxd?;y8_jGGC)V$}*Vp5Af|;C}ho&R?#>Cnh)8IFnjj@4=m9QiA zgoH7Rk!cB?ub1^sVLfK%KLqcnwm%?P(%?fCpq%Z-uK;snMcA~P#sdlLAdQ%boE?`h zAy!X?KBXwJV0SQ z3|rK77S(B>~HJa`;!&) z-?qvT65s*Nr^{5EaC>j&77LF2^o>>2V%F3V@{dyN+I!4yF}k}e`6^vr>9JXOz7 z{K{vfc$lIi7Rs4wV74F=eMljHU?s86eHcWi^#H3bX=N>Wf$bncH;Cy;`0-IYFq`R= z#j7=Zud1vdr{fz|Eihwr0(+9~Q(2nsxFRlwj|Ap{n6$IJw!d)-6m^vdt~*` z61&yPTx`aa2KAbUC8HC;FWxz<=qbWn4nAL2ZLH=?r%OF+B=G6H{*D?na;VpC`Fg%m z5dH0FWcQwIX--(5#dypyy}ufNwcx@NecJ0P~UdGWE=sc)XP5t?9V(6F0PMe@fmM5>*iEx)-LJ?DOun;^q-=kU~iNAsM zWla9k&XzwWFvX$N>D14~CcnGC&3pf;XEGnvMb_6J7OVBNzC~`bPLXI8BI)gqZL>f5 ztC|-;dn)bW1&K2_70l1bF~)LYJ{CsMU`ttjCulC~BMP%%)u;<6y&On^J$95W@T(=# z&-)UBcVqOQbQY!GRRTSFs&?^|N{24OIC7ri?VX2l>^>$dodzAn^sAxQTRRG!P#JkH^bqgU^*lf{5@;g;HycVT=XE{3cn( zw`IhZr2-RUl@~6c!%S)o!T`R{M1u9m87_OE^Kw<7-UA0Z73h)s^J#br$3;$^URKrB zRw7V5bhqTbi@9{t*t-=pVpeO2y=fShdyk6gbnLF}1BWs~{ge{2ToCGM``#bF+J7=} ze0lfs+;@pytxm$a$yTR{;>afZc%y2?+kfnka`5r@CHtN}y~hiQErT-VrF=(vcC*fP zy+^9|0WuUB@qRwsFaSB1SUBOxkZ98pZH{!AGBXVx)rRVascpQedUf zj;K3cCc?BaAuSEHg*GO?WOy{ybfrEatEwT3I4RyoWk*Dy^V2~-{W~))Y;TWk|v15*!bSn&FwTB-<+QKLhU9wk%B>oyT=>@7}&V}bHk_6teVfE zp`xy^5L}fNy}|9=7qLNFTp?kv9^Bi#*u3TZn&vPm8ob8BAVBOY)Ti%yRzB={i!(0? zOT%Ysj1nt0&ihZ>RNhB47H!s*!NKwX8HL_oVLeDJhG3qdIDsBFqh~XY-M^5a+5m7i zs%^Nv4WkAb9O*BW5j^$;hFd&7zj~Pu_<;zJk2mX;n2b`KVUmK-P2d@bns6SUHO}DM zI0s(JhjSBY%r=pfyS%?xRjjs6Savf|CYs%4;p>p@vl8L z02-zBN$eyuCDhBN9D*|hJnGaA8ov$R9ScJr4rR86v#tq?G=IaFvZS#x#zq-+3wy_@ z|M^8z8g$UmV1%j4o|(*G8Lu8X`ETKZnEdvFV8b!R32erJ#HKjx^U85LXWiM0;W{A9 zzkJ7i0E9R(COJ7dH6XoLMm7aTu^+G1(oL79${g8zy10qzb!bJTvKl@Sb|oO~=T29$ zN))hPnR;}W#+W9|AEsy!(ik!byVsLHZUAfloxImk=myaymo;$=zd`3eWZy@R2|;XF z8bG5F>+XvYp1R*I{3cq<^odk^i>1(kIpih{zI1zj@ZgMBF)sj> zE_W_42)iYPK`i1AK5o&U2|Y#4$2i}iJ-A^7>1I;YYeK%oB%<&s zvn%w|Y|JENRBOqz{E& z*S}IKU9aS>6XA4msh-E=ndHaGq^WboreLOEGOjzRaq5oqDr|_tR;zP(SyGH~ow4Gc z=onsxQ7>!`)XRg(7ey~(aTC^PW1;~$^$Ek#Ml<@ZTs-gFsBHuLvex8 zY)4V+PE(?goH0Ok-&C z)HK&SbOF9DwOenzy%&80=#eri`?JJ#%fG&=gMd2xD@mKn$cf45>CrssoMK|f7^7!k zXXB(yRLhT-w>`w=3j&g1ev=$?m=B%fEydN))M0%kINDXewNES43Tynx!vYPFq|+hd z8URC;xaIPnzAx7Jv^dRG#{JN|Z$oYBdbh`w8}_sWUuK;afmg969s9lVmSI$5nd)7sp#cr!fE$?4kNo6!DL7oVu3*tY86EteC67U2%E`C zA#Vp$+7M&8y6c=cwA}80V!%77T1))HfW+N|w@#eQ#lo81TiSKI|^ugx1@Ya^tgyTNO z`vwVLn+_-;?EAv4>9Fe6=*X5&ff0ii5Lr1VXBi(I2SWd)84*0ku(DTsY*aWt6f^hT zULI`*OxW1eRwD0@IBzhtoE!R$N=nmGQT4qltNU2^=@VxR?qvwhC)a={bjFd<<^eFrIv3y%_pk8@B7^#rcGnjUT=|7R?Ls7{isb>Raru zeQV|9s~qnQ(mH0Sv;JW5<-yh}E%!maTS#e~RF+}2a#q@aoO{NwX>ZPkkVta#o}0u) z%9!bX-)hmx6P(k!P*&MHYo8d-q}cN=tbkQDQG*0Y zAFi6;Ic2MO9lq2a`T`xr=WC~&6+i~&e$TM-D5y_S^@QN4Q0Vo;r#Qr4^(PFyH&R~A zH0zUp{HQI|?<`Ew9YAR5Fqhb{6oEq>Il{yF+Ny~QCE5_(k-*Yx-u&amM_t{=9`SC@ zX|btW;-0wjZ+h{+$e4|xID`YTzGDZ?$Y^C=i&Ouw+(Rl#OIK{vV6$gk*DFIqd=o!! zH!;4KLK)C=T3MJ_yCAfsz|d{oA(*eiB`BDGX8jTv+?@FSneMRe8@*wT&}-3onRflA zCp&Q$8I|K5&vP~D95?wNoe5HooGiarWovnts>-&d{1!akbY9QR51^CFD|SrLafKUb@H#b1=znOme4>?*pp(P%#&i&u-CJU*yxPsG6&P~}FAoN{ z>S2&DCaNQIR;%TEYN9ua6TSCV@Vu*8q=er{s@qxM=Z)sm}PI%Pwb+?mVxN@s8 zk$tw9!k3l2*-T{enkIeb&G<{KC*++%;X}MTkMBH1G_EaQ9E_p5MPv$QWx53~T+y$1 zhu*3$E3XM9LE-*jxk!T3eHZhndh5ThV=`$l&lHz=%DRU9*h4-02 zYi5l3(%}v9b4t&QSU*{P+wagm*G6&+@(PP>IFvb*dgV7Z zTt}r(G99OF{XkO9W)Z%j+^zRpojjiq&;j}w2$1Y~@2QqWo9diHTK&)MDAMuFUODdV zJr907^?qw+(c$|7U%KRoH9s;M=@Vn^FQg5o`p#oZYx7i2kpv3J+ZpNcb-io@X<>du zP7jDaNO(QgbvjBPZQKAGYfd~?Dl}!w%ZC40ar%*b_-#KE*OSW5$$g{;-puTl&ky2Y z)8XhV1IjM82qFaT+CJZlnQz2FyC3Kh?rD}@MSq@&(RJzRsaxke!^Mu_d2%s4ouhoi zm-fKFZJwdm_s8yzAa%$ridb!^!se9Vv_dN{Db{C$xaNXP_kb-gEr@IWOs_lyOgwm5 zk^LIKQ~d4sx~VBS9;49l`QndH^H-WFi^PqyH)u@1UG@nop2WxH@qGMzRSh>p?X#c9 z=chzS?{;F(6^rSX5tyr7J+eO9N;(f|od7o~ui;1>Z0s3-bVq%{GG=hktnzB&^#tkS z_qQt(Y>O=GZvUV&Oo$>7TuPXmd{*)9s>=iasdhu~(YWdNXj(`a4}fy^RR79R5DyMA zMT33s|{US48+9#(erSaKH`@0xEbC-Dp$WH)kdi< zoi;>+Pq{{DBAP5a}HW+n5Ya*{11{)HC!Srr{Z$K7TPUt`H{tOl6Ou~CpeG03Eurd znRc|taLK$#UVpM6L1e?k-k2x%%81?Pp`>q%mZ1~UV~T-t78du45gwIqSD9Vs_gYj0 z3ONp)469ZnzwE;p!G3B)JM|H#ASJDB0dT9kS@cD|zBpYoL3i=uQFYX5&~EB_lKFn= zy0kOJz_F}OqEUx(;@V`8!XhA9K0$lumFrWz!A1U&43p6u!9?El$3g+D#<)>Ev(H*D zE3VMz)fw)Zx;}!U^)hY;GEogj#<#C}m=Bj9bm2(s@g#8+fLTt{OB^ut9{aYmTg=arC;61t0nER1?-X=B-Vo>`J-s}7cUo~7X!5!iR^EWyA>u?fs;pF8DO z+PeCr=aM2~tz$m0pSkqd>S;HQB=O4umKV7ts*K|me#yb}3CnsdyMf~zcbr+@Vu!~* zF*fy54XyejdpYGtFZ;+qG3n+=U_}67H0z*2bBj@T%}1WMrlQklw`|Nr*?xSuVi4_Z zPLw0dj{A(Y7F;S)Gfs=(p}UkCABQj~U$S>WOa~t0ad`^r2Inp?0kVg%RwC)i*6Ka+Gjmi+57XVEQ$<@$k)cVusq!A9e6!0qlDM1CqfZ{{W0y5-Ms$7%1Iave%fA@Qii znWg%sWXm|Mj?3cgZtuajt-FsK@ycY6DK|-ixda9>_rE#Lf2ozI%<&2hOdt4sdUo>Y zNl%G0j!L`ys72!Di*JPw<~k*`MBMR6OB5$%x<)vz#SVLtWL(=kl1E z!}Oqb$4_Hjdbj-b^UjwUsltz8w%(uujvfy7zGq~>ys>-3HW415EW7%`BoYpRRqVjt zu7YwAE})4{A!n^q?iU+wJ<**9=u3RV!VverF7*A|%*uaLM-={Z9dY!s>3Hwb`?9I= z$K~afE6NCb>c9GYApy~UEd#6VZvT`|4fb5i=_MbO2_y*Oled25=!88J7Q>#}I6ZyE zCvRis^i=k#xt+yRK9#4oR!+~D1jR)Eqn=n{@G_dd>dwWq325edroA31q=DS;DljUA z$sw-Y*2t-jv8b`a^Yf44>if7mO?({Pf_0vPj#D*4IPLj;-&n)46vHyf(!G|!z4Wi% zXaS|3dS^aiHF`Ima~Z-i{!Eg7gmVVc2Xw=fy=ahrQz-MU-(3%e`u@I`BFf2-_(k;l zEv!?VQcjVJq6=s{Iv)S>+U^rh=<{s&dU$yF7uYN|S;&G6TyF^+LfPZimP%4}KkW z*rzad|9F=x1B?fJT4nz|Ew5DT(+gd7PzAc*;$@jD`-}O?+$V!dMy}6DExB@FDE*qJ zaTpbr_xbZ#-LVt<*>QvSK$O`wLUfU16?0$+uY6pe`YR;ID=H(+#CwuP1xgHKfRc3Jl7;IUoxe7ykEK_>X)y(Nk)ke?t!fCA39;u-B z?u_LHA9jgV2C%~JV`s?NARESd#6@6SPA@s)AxV(3bOpdDtSIvEiH%Znt}^6t<_1{p z41d5oNaT198- zaI3_2+QNkIE=81?qU!ySR|2gMvnk7MMJkALtc@JB6ZD-cj@y}D@}_c$2h}3H3wg#> z$1I0n`7W?et9G_^U%uD-t*%e2gdQGQRu^=C)kqL}i>DbWR67_r=x6!TU+-!Xz~45e zCx5W(AtXhgd62*&f0#ww0P?92(r69E4uXvxZvCvNeY5cxb}(>gd9-@6aoDb6tvPTq zfH_!>o*0U@+S+JZ+ZcLjXHdABKQ&Z1JXuiT_~~soW^8C^^DyTyPgpJeqUT9?Lie@% zQ zau=AI-MoIAQn#d}<=(B^Bte1KVw9ulQ)QYniPf3Nsc$}FejlU$<=&OCIu3bU#w8k~ zP5yC}y}R;pbPEg;E4%N$1@IEp{ygC_MP210)OYwCc0J}_8{U^27S{x>CcjpBm?PE+ z{EB}pYuyHHS|$tN#W5nNrFH_Xz`mpOLFT9k3PD}&hm=hCF*mFZjpg)@>i`d)u?eB2#eBX>S-D-q+7$BaZYT;fl~VYq@Q9L;Bhl=|eKNH=pZn zEMPZ_q~9W5*2>1;3jCMK)>8z*%EeBzw`{1Vtz-3U|Et-sz$#7M@RXEA7&KlS<$8Rjv z-!_3svWIM-q0Mjeg2`{`n%XsQAwXL&kK06@@5JLj-FRvn7i!?I3DxN`Ph^r{x^cbD zaiXy1hqXtGk;fBz{vgsf@4mF&h@=j(fWCM-eQoE9>{ohanEq?hWp4F&wtHv%k65p; z1{#oWRXyA!=45>QPUBk_C{7%hOitvlCVeI^ra;;g8|VnQGhMBsAh^g7 zC%WtVlw4=8+2Qz>2#;SRZn$)A$E^eE3tZaRSE63N-`%L~qbH|`?T>!MJ~BTFUm3#l!(|n3QH+~t@0HB7#qQHT5+415&*<#S zh=Nq#XZn17+N_Y5`j&*R(91lg@g#nNR(EPTyrVSy(`B#?9hfd0<;EI%=Y}{po{&QC zS@JuYQdSSkGF)k&tG8p z1eaL^YZM?CWG9@sJH@tf>OhS2r8htkDnO=%v>URtG=mP;Sh71GYHdOus(kLDZdjQl zjo&RPd~L55BN~HXd_FmEIyr!S#iS_j_?h6I%r9QNt8mpgJ?QFBIZP}y4iGFZ-8eky<6C}U z;w9mGH1}rHB-$UJmeKR5xFdSPiK;Gt*{W(nq4!cd<^90Jq=tnD)!Uxf8HKAg4qH1m zhRUmk-KPkj^6}b=CXn#CE>8^2*j7I9s%@yR)@(dmTo1q$5_z-O2jS#nnwE5N7;e3P zb&y{^QT}bpbE1^FuzWDZf(~6_^gQB`2>tM5R)@v5;Q4V|m!a{p%85smnfdp}ZWYJj z{5YgR)rU)pkLb28kL!m?HXezB}hm;aWq?KaKf2Y%cQw1$RE@jtg0GM%HF>2@2OnYjX;2940fkMWeDhLx)@zE}&t#i02Xr{zxq5{p2*oWrz{T2O0N}p9!-Sz2g$~`34 z>jxi?Rykrs0N9a#!1P3*Hvs zizJ!dJRdwX_;!2Q=vnHcn?9K{wzAU|!Gs`N`gGE$ObWiWAH|D=B7~ zj45#5O3wML8 z)JT0?yRIDUIc1QNm1#a|G4n|=UH@iwxFag<E@tEW2r9@SPMcdHNbYM(!dc$*!)v%alk85{9J`Skz* zK@*Ym8=jT)LJU2G4~yX)twRIqI{`T5?WF2~8v`g7Ov z^OiXi7lq5T!~9Pxu;9qyGc@{@f!+6IsnX(tsbMDJ4)_oe8Y~A@`+NbMDQIl;sJpKh zTR@1R9q8$e4>O8vH>f}III7CW-)Jc8vulhFv(EmpIizPd?IlV)?<129G0)~`QnHrl z<-8LlliiskWkY_u}NViGeut zWM_4E{Y11c#idcIKSjDp-VR+*NWvTPT&8ER{UYXb%6K4+0hyJs{AOR$V+IBeRXo>( zV5)oFll005IZgLG3dF{E^itmxH+mkP99(@AncfsR{YBrdzqpSMzUSe%khxFYzu#`F zk~{sSbXsEPOyPq@CBug-y^IBhEE&gj3Ed1gy`bG|6mOGZr8p=lD;I^3vsZUdmb%xP zE>YZb-=>B(t12ZIiwFr8t_}-S(cxjoVUnKIhfB$v-<+V$^gUi3l!G-w+|CEF4Yd*E) zgUA|4z|1T_0wQKlg+$Fo`Go{Q7W_gYg2EP0MMXhkB9`L9QvdrmjQBL|?3`|cu>V4n z4`OR+$MjQC(B#vy_ISz!5)$SY;?pw#F$ppW82w$2&o3k-`0pBn(3Gow{6_MnFEmMt zz!XJD+2-$mx5QjVj--^ipM+eS``)|PEcy>g>TZR-?!Q4o;n^IlhOjG3VI8v|i<9`l zKJ%&DcHGjpGiQBCw7&Soh5Oy*on*(Nx-Q`n?-|yPz3Q5pn)7+aP1}qeTTlC{x{38z z+qFC*GhRy5w7Qg(p>EYl`O2Ca4SaWI26hJpBB6IAs?X%{pY#R0?91YMWQd-aK3I>w zZqG#6(!3HbV}FmZbx!P>0{WhVQFL!7HCT+b)c3# zCyx0oXzQxjbt^P?YNR7Sc`HBtGFl=v8sDCow*`f^JS&u{y%l9EctC0x_RU_r=(D0B zJl|eeevZ~Kysw(j++MQ%Jvffef$U?UU9;F^*iQ8wGJcXcei|))iUEG3$#vZQzL(1@ zgGn?=@cZ^aOEZzpmZ@r7M|-}_)^oQjjyp^Y(g!?WI<9F8Uf!aFkx+R6$&N~-0KdJWHB8rVJRUpN}=jhJbLVi@z$;{H=ekdu@mZjW*m;@Vfx+IL!^>}tL%n(TJ>Ff7L{koCc&gBw3slhX zJd>jv?<2dr5;VOMa9;9&@Ux%TE!<2#!sZMyf{^)J^zh8@MCT4dQO%`dgxBpQaL_j# zQlyL+r(~meBRxo=?M$iuS|Dl}ds=7*jTo8LoK0##26gb97}fHem*H!C2NK@)TZaD1 z4m7+S6x47o2Z|!fDsi=gJ~;=ciM)~7ClT$=)B$TCO3_*Q$-oo`{PsEBh>n*@ui;67 z&wH{=IX~{DMm;YU;3spPg?6>rOa|3CL|1pue2nG|$<*4K3O}`f!0_2nA~b}bXs`4N z(L4!v8w+=PrW=9swpb#JChc>a+if*-aot%OiSPtB!u)LsW8$h%gOe5BS56oL!b~+kFw9PElV(So2 zFrsjjl&O`zO6C>TyDi@M`OWcdlX<%J=Bi`DnR(o^(1v3?WPZ8?#^5}R=x8ILoYLvP zn|f9C%anqSqdDp$&7;-}u`9S}Ci;j*u^S<1e)=d@dq9-*gZ;m4>gdGXAgNj!`Y9hw zvKYSAJUs!5pP-{gjA(iOnqg?TJxG4`*G(ObGkMQ8`N4OEDtP9%?CA&te!?o4gl+2$ zl{SD%JGlxxY?ye~^A4%8fkQ43D8hle?A7jZ|&Un)`2Cy2E{b4aTWEQAMv$*s-&f7Ifg)v`x6- zrj*balu%4;^H!SUPPanqqm7QQFrr!4+dGbLq@xABqWHGi8e2w=^2))Pae)foK{CiZ|%0s?=dB*jSbB8O0 zZI8sLy&Y~5QdE^+W*)ty?$B3}q*s_#q!030iOzH&h(b9~zn%vX17~GZ1LHuqKFn$p zv=gTW4>;iTv^^H1TQoaLmyLp8;`10B053p?DvIYX+}B5G62`F0MBHfP?Y z>$A$F-+d5%xdYW^yJS*;rvu|=$MvLe+#TX2Gbzehv)}Ia^TxY!2dnY34i5SFLkfCd z`;b|@tz@|fEjQY4rPq3A9~ZPa>IW_FTr+M{cB3ht)u|62a>Fj=NNG2#TF`2sAAM&u zv}%V?1U`Xe@^+l~s|9=HuHmw#zAcVce=rDeGMcXR(GvhU0I(np%x7gRUk4Je34W#(rQ z{-2PY+E3Y@gST}NeYg`NRZBr{MBxl5YSXEv&9uK$gnDKe0;*;(cerlbrdmx?WlC?0 za+?gsOA3V~MQ|jAStmtJfUXNV;BJyv6~F9Lc!TOQ%Iax1s-`u=PZjhpk`?&R-) zhfR5=Kd0!2RFyE$m5|uY-?eG6v}xA0X{{TLy6Z-Cf2Xn9dztQJrB)1F5%N3Ictxmf zb4ax=A73*;b9qJDmEg{x?|VfvZnGYuflfs}!Nkk8z{B*Tjg0?97CJm zUp9G^nb_a9^w5bd<^4X@#g*rI0iYWn=A2Uf1RW@Q+Qq5E%&4Or9T<8#{4p{L2U41`dCVG2}EN(stg&9ivK;zhTY)y77O8n9zvl zg9=n%`zo|TeuEk@Mygq9!@zLRwKubxhQZ$)Zpx#T41@APxBohn#yXIktf0kfJqIWF zuabfA;y^dGKz9Zl?pvC&Z+=E51&vkXyUsIoH8)ff9nD|uLIt?p+T&-$-{xm%mgXi+ zUU-{~qM!1{{B1n_9PWn4H&0O?Hc~=cY<_1L{qttK;jhX0F0w28LDb5r8ccw$MG;2H=a=LS63H?YS&^;;orWjIa1%O-@d&k<_~IloL`ff+k?3tyHDg17!t7^s~4RK z?u{-n04y8SYMmRDJgFEIJ^vk=hC~-BKDr;^c&d9-ZmDnl!2O;6ObAH26vb@HnXFFW zTJfwzF|d3{Tbrzb_W0zO2>(Y!j{REUA!H{nsD32F7#nVPkbmwzbWihK8+ct&g+;W* zNg$?;Q*)*;?h!yF_I|pvKvJ7l*1?Q3S{W@TNgguG9~)J?mNvJ4tRDS2cEvEVt{21b zzynA9bp9EAfVrH)#}$G$JTVd=+-oD#XT)N9QTgt_(gv0py26?J0Y`+H zY4CD;5%89tFB;sh4juvpn^k}D)!)x|bay5{kcfTo#91oc@b2oh-x*fuS%uaSUxqLJ z!EfC$sJiZSwMP*=l>8W;-!|o<-&FfnZ>S~=O8|5yy-(NDo_Vlq6}M6wMweD!6-Bd8 zVtE&I@;qSwnE}nquxea}5r{;mwgb`baHj~u)Pcx)0CKI<2_vi0VxiKkt9Xv?m>3 zIloGj?QT_)2+?t4;G31J4}7z8+ZgpiKXRm0ev-&b%Pu>yP*!v1Z-btc%iMLZdz&Gx z2aS@jnZcvnUt+=U%}S4PZ{(y%>awB8&NsE)&%`D*G|pZCXO28IteM(>z#iQ5`TszxF@i=Rpxhq$f@(drK`ZO)*w=yl zpEH`yB>%jm;MMB8|EFG#I$xspPE-Rk0F&8g~OJ6blGFRW?Bi z#R0-S)f%8r6gAtXbwv(HEKNt66aXgGt{LN#rDOjBT??sUJesY3p#=eFG`Mq_Kx##wJhL0NZx{ zV9n`L>ttxsGq`u>W@DS)G3|^gQ6tLrnBl>!!a7QA#jt@#vS(<*{N!un2KdDz*ByTC z71_e+klZ`ZWXaz4`RjhlxGUM`XS@g zp66-n;8ih(>kikTZ4fb<0Q=ielqo^8wb)&&P=%&$4+Ft5U6O;p(hq)TnPky^mxWbz zsT&O0#=j!>@DBBn$5UOD%DI2dHf1E_PgY+(Eh`kj+^r@n=cjX>vz-hOuckVh^O1O6 z<3>Ex)hiZ5W<`U>3y!j4B*h_xQj0Kcs|)Inj<4vIH8y_WX>UpXMm@I)(ojkg zK!&S}9&0)_Mh$Bc#=i>4rB~^8D&17hGN#EYKIWhQnScJ)6+?fI#yd&1s&+<&smr

%i#~;z}R5$3L~5 zKb{eHRO=P`Xg{&5Kr~<{biLm|uPM+lgRq4|jN-3YD2f#m;t{?#3KKr~h0@S|&oJNx z=!pbO;y|jvobh??PmSlV*=U>jygF+OCDQR?D zr^gybF9-+os^GJr8zt8cz3!a5_DpwpZX?GVjqV9-LNHWc%gc~wGB8nSR#%nxLIZh; zO${)qgPG&4^4eRqzpp!T>XQ`W2B`D9qKlda0&;WaWuwDv7YYfXdU?9=`%js_0#~M>wVmZHsaL6>~*p3aHwF!g!=IjIqy(cEpUJs6&79 zHCBeRZRep5F#s`CnO$Rtk+O$(1kpDDIo3NJG5-jJe0zD9gQ$~VsdDJPq>QRu zAGYI%Q@=f?((6M?{cudmbP#6Zh?p_s#6?10*zTuZ!OPHndN6EKa-cSd5%dni*fjmj zpfO$b3KhMKrBp*=JqZJig?5W)Sf6E~*o#NY11IGKNU@P#adYRF4_V)SkD&bY{?5h< zoN!;-Zok=Qlo6@6Rt#M$B(MnI9K=4b6Erb>SgXBQ)aO{S+vndI73Qg(qzan~`zB~R zDhEk!&bs~1eC8|&{-ZOY=FR=5(cG1}Jrg#6E!&~yxfVSPzKtfH7$(l&j%Z7$zO83Y zjve7k9l6GjGh)tdOB`KHwf6F*g#m_a=1=JYI_RYK38}C_k@E9N3?u;Shg~I zS{M&#P7H0%qmEz}yYpe5AoV9N?P*pAxt&SdaYek$Yq~d|P%=ff_Hv#2s#JgNbdiG?V;K%b$uL3Qis9T^bSup?= zf<51&I2MFGNOpY?0_rpb74WYt-0Nfk6-?*HnFGR6#OE)N@iE*atvDlK`&5fOYV><& zO{Fpw0=#Z82kT?zVC@IUR3?X>PZ79aaY&gG!5Ep-t1ycS>Q`xN3qp{1YQi&pAm$?p zPw?3ta30fRV6ZgygMuv@sFkFhUL^u_34qgUSqO^&YEBlXS5X#m)IA57tT2mmYTm`Q z1&K~dkoGBN;aaCIXmX{mQ;u}Gz&7b)oHAgd?fbqi@C^jfW-qD))Kf&DzK`X_RlNoe2rv|oW=_G4Sk6Ot}2AB}|IwMOd5v{P}4szrt1U*S+hc5C{EO}Vp znKaN95(V!QgaS7JY_NTYjf`6VH(?Ind6AQ>9Axv~`JAyPJ?V%{Lj{lYg?Q=?iD4{( zvj*W1_H|xI+y+5i3gw6(J)xk{ifa-q;#}>?r%wH%q!)H`$h^UiCM-Go+4`tcOjY7N4^(MK{h#~sA`HH=Z4lp9&dvaCyPP?cR zFW@fBM!%TM6>$o)Imw0&3R=FQ-r5|3`z>TpZygQ5V;5qn8HX@!vi&^mR(sAcc6XL` zy_r6EZMg?$yDJJ@ijW}7+{@I3M=k_WH@WBlT@Y_zXUpQ?9e_JqyWOP{kPuM?J2NhV z)++fVDB?4WXmtq&`p>6|!z&mW9@XljKFpV^fByJ-f8jKiiTaYvcwkoc} zXw?hj<^X9hS^*6pt73hd5V{sBk8lg`yc_}3$e~$tu8cfBU|r?QffG5S)dU`@XoX-b zggPIBR3GHTfdGxLx91AT2sRp)oEi-xR3chb~+!e$e>JJ`a%(>*<+639G10EcEoYGwRsJcJvM?wYtnbkLZDM0#Ab;Bgj%E~Y0j)!+=jeM5~y0S z;Ox8sdivlygufF2+Hm&vX9mQf;@3`mR9W#zwVGX!D!^pUocBcF8o|e@_O84`FHB-=A?R3$=hJ87E*YK%JVP zhVuX@i=u95o+}cX7$Y0Dn(yjd7H^S|bkV5?{HCZIzG_f3R+b7-Qn};=KYmoEtMb6! zTZ;wq9<@K;gt1`j1cS~CAi#XZ;qcWN!}Q(f2z}6bjsj2vK-ab(lD=kfr_&O2ZXFFB zM%a)Hm>6w^v5#@)_^J$bf)Q>YPp1_?utiEz_ho+E0RRp=TLvoU?U&;X;0QcMIwX@?20gqv6mO~H; zNM(|hh{S*=yKzwdlak2<{kV3U?768!zGoBl7wZNi_@wo{Y!Yt0TQUP|v9>U?C~# zs2yVggus&=ee>hE5t<;XtTjMNmP(i0WoDca0NCbLuL-P!K*N8;zX;x9=Ahc68F}2z zEY7;bIl@`{W}zU7Z)>nq3ZVotarMSOjMIkyund9{#-vg?&OgJ77KX%*`=4~{}EE;poE2#AHX@VIJ6(I zlwQ|pk_{+?T~w@%Ys>euFU{08ssa_qQD+?#*of25y!7DG2>3y96aHhXNEjp3>0KJS zwwa%rrOe%~hK)GxOq2%x(4H6x((n-lWGdS#<+s3ng zmqw%&#O(o!+eo)%fmDjd;ZOT%k%jYoCZYzc0N|9`xOjs_ z6(e9{i3M>f0L#*>>cf(#HkQPVqWj4P0Nqjx)$b5VxDmH!)LNEbn-=$}kzR~EX^8$V z@7jV0JX$~M>@ij}IDs$fe}ukO#0kyr6821i;Dlv+g<(Yl9C-F_0rUyP3-xNw6>QB) z!;+X^R5-&%!jg8aEj_6-z(WZr0w1oS|OzR#;90X?PNG zflmE$0=nGMm+#|n0rPFU@8y9+kZW!Ig8IN{#cQbDW@o+cssfL=O?HMm%@J_ekJ=Z$ zX)!94-$adiIn*HjZM#TWY{W@sN!+R{s_BK~z!$$IfZZPn7;#_r8UgtrmSKx;iq75T z1eCci=icHKLoCA=kM3YY4k>5iWv{c& z68|WvRbON66X!x-$}z5TMhT^ji;HU3IWfpJsum<`fFH{s?hUVNfgdX)0K*O4U^qL3 za;=#iS-=V*TbnZn!MfzYGUI zH8V?S-)TBe9zwVEn@%6Nb1CGq@}U!kh%E_j-^99KQA;A8_Zu0VNVW23$qn}{*A89-J*F- zz0M=p+DQO(P-iz_l%Y<_)j8qpUL_R;SVON<4Yr0|P7ixQ+J>5cTCM%;eK!;4-8= z+8ag2iEy?omC(vH1sD zgYJ(Q32ki|`d*Vz11pZ|tBK(zKP?1cA(@-h zQ!57x$t-O?BMH=siJ=WIBA^ifWz@w&8B_)E4RzrW4ebJOwO#mBLAe23s0$PnsSnYG zpVMK}-AIdy(WdzfviqG+N_{V4p%PeLcroug1P=hnuRkdM4yWq$D7`$rTxm-I=&oP> z@J1fT*pQ#5`xeCc08-j6T=mp^5#8w3>AbkB0E4_=I)TDISm#co#VV^K!B;xMKbTkh z2*>D=wUzt&V+lDRd^si#oUDjoNy}_3ih}@F2mk3>*&(?1ed}#|oj~qSC4nO?E_x;H z@&5X|wEs5B{S*78B|f;X7Alk-aPJT}vvEPnP>vT0$O4uzwloqfPaVRdw4i_tmf?z{ zX%gBGRuC1-j^RD}& zB!#Z&70%DcCO?f)!usK&+ke=Nb|lVTN=DT_$zyHcNqgD}*3-+KN4qbjVd;$$YEL>E z`W6BWwQ|nF(i>=)l~FmC-az5YNZ%0%T_?@Xy5eA`5vgf?MAO<6<+{%Nyq^_s&a?+EMvv3_GJ7z8 zXzY}|CN+ncJLj0LqgjKUv&=R9>79=!+|%>8J7*Jj&oK(d4XRUIghz1jrR=oqhL;P& zcH@?ZN04vOA3g+!D+l_*p{=k*BYDh!Td)48zk_W%2)f#SR%6;6(0U#-Wn-cT=i^wb z;r}YYqck?bcG>GGCyj6ZjFNv*nG4MLyVVx`1CN;TZ_v~RH_|#O#aK*uXo|MmCDsL^5MXH&G)*m^^(fqrOsr? zIJPSDM_H6YVNXobKa%7mJkv1;x(>MBwzF-A)hlT3MSa+EMl;c{MCrl7J1jJuQE6-7 z9d;VtsA)UwDp?kRVvQm{6^X|bebX@(8sE!P%p?e)Q-txtX3fq``4u&zNn@_OyP~P1SSk#ZlxF=Fw?_1%&n#- z%7b(36?@KgFdjQz4&iUbxmlG|HsdJe6QgqXH<)Br;{c;{(|a`-qE`DI+5_ct?CMTP zRmtCckN1rI@ST@gz(cpfLDKd9AsD?k+ZaPkb~VA9e+t;~Zb2`x%lMhmR}lTH!(}}XyM{(^<+r2{w=ey9RYZixs$w@Xy!ZC%1>36VaFa)fVtlaT`Q#+@@dT6Y^L;j z-LoSja%7Z}D!E0|Q9~J2u$tlrEryYO%)EFwbyQU0ttbCsT8#W$qp*Ro^bH94LPJrA zRpF>m99s46B+B>wba+S!adhU}OB3~UE1_i!d0Elcp7RMcQbBaI&-LylZ&OG}+rCjI z(j${EsvS=($mfwO!a8EzutIwHsN3;FXLUFO5yndbYaAmf?lXVa2)`4tBvBiq-*Xn+ zc+co^Lg|za8-y# zJ*=2wkvgZ?AI%jtV`pg5a=U5QXRV;-6jL=XsNFGfR8-vvl(mYcIv_9%PT{|MG%&Af z6lhh7V?e!eP11Wg@-iHD>vE=*_<}KrxuA;q?D8UYGpn5O5ZKu<;C7RaW{+L6r|w(f0hFazGMp7j1ipCbtXP7))2hFpN56AGHIWhkq<{gh#LdYDz zlB{{H4$S7zW-sncEAoSz1+5}pfyFC3nVXC2G~ZSFkBmn9T}9DOT*wPC+Kw2jSt;(e zxLnI``WQMlx(S-GALqBn#$6d#)@c;(M#WasxSC2yUL6E(3k;icWr}a*NgvzUirpWw zAp+o`5~xGQ^dI)#z{I)X*_q*+xAzaYR+7;GOSc$$S3Ojk8}?P+OZhLlQP7nH^pUP; zd#=n@<XGP3*yy;NWz2I zNWyF4+icV@DRezOa@9!yMy?W^6zYNKv_>7#ARV@#v<- z7C%;wqM{;Tq$vo9G?PdP^&Axth#=Ctv_yJ|lu&|*fIt8tl!OvI(t9tFCY?YCM>>M^ zBvPa#v`}x(@BSbDkN3XchrDErZ;UT1d#^RuoOA6h!Q3|S8nEi}u{D}CUs{XGxz-lm zz>V>eSCJ@W07^G7RzLm3)@lHPwj7zx(xu%G*3!@ElfFJEbJ3r6QQ!ItRJQh`g+TVd58NL?JqxOV*XzpXdV6<}Am zT6t9vMCCVr=)+bO8X%lEuPWIM-YzgH)^D!o6a<^|xFn_dICK4g-i+01VCPsA52$-- z(-z>`rQ02(tH-xGdKTU8KOJ}YYf{?^&El%V!f@LKpvc9$E+#t#r~)7BR~DGNsQjQ(!k6=FJ7FYUji;a_)P9v^uNJdiNSY_3<641kqZ%WeCQRtftBDW#_4)Q zc0k?F4~5&e^otKwI2q3J+;f)#q6-J@rQ{Z$20b0r$NxFPC=|Ek> z{VS=jAB%oY!>uguTo;CP(bc4S&y)2%++y0M2%7*R(KX#E4UCw30 zp1?#0Iq7cM+mS20!O@C5G5R7j0E15@AEzdu@W-*&<%nSe-R86MuZ7mXHKUDn;1`M{ z`psY_SLNn|gF;uB1&Nb(9c{njIe}O_0zKQlQo}cHs|*`5P!Ikie%`DpqJHyQCd=S% zuj*j!GshX!;i}(iZ<({(*`{!r_1a>o1*3?vfEmk=EQ5Bnv_X&Uo%Jp|a>*nTXxSK)b3AZf{b^XP2aB+R>yr6*qCQOdarbu zy~svvWW_3eWjQawWR&yYi(|}S(`e_TsS)`~{;YYnb>Nll>3??H=FxSTT&nD&iet~L zLdPosjhh!xpQ`~D`=SA#GnFQ8mMk3=co;}9iY|_df#OPS7N-8e2Tft8YA4>Uqz}b8 zzi81pzMeJbVz^qJ{9Si=GLE0LLR8>?>UBmspC+*5Y#AR_PocGDJ@mn)mNvbhDvg>UM#fjcYl{rfqo-Am zQt><^>i&0R?D^~Ff)!b2_QcfvP+)MwtbyKxm2txONMq$~iA_bh?~I7AoLTcq8ob?H zFIBp>Uy98ONOlhUbB*q8OSK3SV&Y#OKU7UKvIDDZ6xJ`Il%tai%IX9QMh_;#^ z%2ByTy`(Ji+QW8?X}F1gseki+RE~g$J+JRPd%%dy3Of^ju=p$^lq`1ePwU2^`Z32* z>VpiTH@f=;HoEcGt(6WmAq6n{K7LCW(XE}&8kaiQfjx?A(^BB%`PV+j*w4%>19P*a z-8=v~GO&Mrbn@^$F1yYpPvB$rZ8s%72dxHPj$x<2C87@a4=>Ao4tN-(5g&WN5AOSh zJ#4^CzjNB2C^SM{DX!p7U*5`D?}YD%ey5x2)W25DytXYwYfbKMjz( z?i$k|AeGk>86YM4Ilx=I6S2LW-4f-te`^+O4lv15f4kdr=DrK?jNd#f^T6-=T$NiC z4(h;Cwy!MQdCVisnq_mDycclMAgf(s;v@gW0AGVn{(rMwCCnXCF{~-xIXO^s@X?G! z0W9@kFX2QXL%_$)NH5M0XA-&j!1!PA`-6uw?Z#_QYFl=OAU8FE*=RKL12XwN#2+o7 zwxV6q#@!S@xV)8r@{M(-R?S|Ceqlo@{`*LmY3K?MUc;N)sA{Ji zd`9$&JVR`ow4hj(F_|2?qIIfZ{TVK|^TM_3umE4HHUy3YI66GuiFtc*y~j>j2mT-; z!O))5cb=D;__gYTK_Ccrxmw~P#*;$@Q5bK>HPh~E=+b!b;!qf&_4}WLF42n^U?iE@ z@NVe=zQf$L%ROMETt$WSz?O8@xX7p>9Irlt!^Y=t-I>XQ19wz{&?;!-J`b7D0+`cz z>9*XZK2xaXj!s-!aesl{f>~2%FC1$k_{)rZRQW|FuIsv?-!+K>Bbp+*?fO|Ya&+RI+x{nf?8u=0F?&nYsM94@nL>rf_3-;&kGF#q zZJfXi8IZW0-*R;zZ#C-B?JIej$0y1hCi5DGt>zm!V)y_-s_nh(*w@yD68&;3CZwzK z+s|zHVllsbB&sTF5Bjo}au;l^J$2jR5$rs;HI?Ad zeMaHV(_bu7;6A(8)oxqRI;-g0mvwU%oCMG=*8Pi7{~5dC|LV~{97T;Kt}B16Cw&ND zTOH!Fj7$Gzs3*i?4v-hAc0l|SA9(uHU_d#Teuf&)A30Q=8lYSxu^eQ$YH>y7u%O=V z;ksQ-HmSf0t4TvC|K)wQe2#yu-DJA}C;BTY3{ahD_Bak7c3-~ooQ*e|#IL7=_f`@z zRFqcrZfh*S46{;ybOa?TE618to>BTG{uxEah7oM|BSH(xlp+gL7h#5a7HlsENWvq@ zru}bDrg^XYWmFuP|3p#<7gPM`T6M)cyxoeoq2EtT!_&N^?&ZA%y}6Wy94l_^UoJ=iq?Jk>YI^+3R@xm{APTaDR(uGc56o= zBlJeYwNY)KH1p$8Gw$`CAPuFClkwp~e8t1(>kFJ~j@*-;cU9m8nyjrBvEp&NY#5OO zNr`2_YTA~l%8K8U9eFT^{=jHFNrXegV6c6q(X0#36Y2uIR-YY!g6IXG?|&)cEG;{P z2u%>AKYq+DX8%AsntI|B6m}^E&rMMptN~CWdRv5 z;-M{n`!}aw>B>%27!wMC7Hy?SchgHI)lPBS04gR?4rdF-1M?tG#6FQ1ta{=9?3tf`488GRMatS|Xd zgDyfvt-Dd33WhF)2lXdm{(S#M`TKA?Hr4CO#l;{N9#*udjCJ4AltpD+p^5PZZ5I)FmpwV0U^4rb*4_M{~0ix zeZu8^U$=cS$d8+@RcN-C=<((exhuKh!l>1@#L8LaD3gjaQ@3AOeYalZ-Btdx!;{Os zO_EikX-xmKGIsn$MpnnphJ9Zjv!%YiB09{7Q)J^XPm@4(dAHZH=L96jyu)KQ^A?AB+EcBoxD7W;hg(TXd{zD9>s z?Cjbut;q5rCXSPYIMyOjx1YtEZ#~gJ<}W;0&7?G>;q^xV!5AT~69rn2m9 zb+2fGH;;Z*L(GF$LO%zjUfpV;^-#b68te~3kTaa%WTa+e04Y_7w<=*5|dg@=K1x*nJoOh+CuyDS?8ij8gF6A)9{^Pv?@> zsmu&b$1U$Z;@R6u%lH?iQnUg*--Enj%J+;ure)gz2_h%;kk*}r-9oj#F@YnEpd9^v z`yV}OQeKe&;){YSAgPMl+RQyPu64BE+vD2O1KoK`Y0k;?;EC}KUL0-AriA&`cPA2y zO7Ykf$Z`Rz?^j|^Qoy?<7a9>2wJO&!e!~dtOwP_UIapbg4$gy1RtLJ%fv2@(OZJNa z8oxSc_}aZPL}8yOOiQ8%Ayq8~u$E@sj)7?zJMhESwaNmXDvZc9D}3Noh|%f1Qe6wq zi0ye};&mCp@o1WUv&=RCcWo;JyPazTUw48#=>ybXMjNTeIUJA}x=mce-4_vGu-mvn z*vt#b@v@es0HD3(#!|d;S3e1-7Q763dQyCxR9T01F6fxP5xeNGyBVlN{W%Qh8{qqi ztF8Y~OqfjLa5iDs^e(erM#9u4FtjFbpYU)D#iO4sCI zNqU8y0j?cQY<%5o;b?WUrImlR8~bq1k9s~5-*h`=^l%-e1mYOPC(;XcdF3(;=Rjwx zded*ykQ|ey+x^u7h@CZYSRv(~j5ltq3wJ>7w=mXQnb7i|m#nF7s$4h*A|O4cs>uhn z4joPH=q#yF4rPvqTXvM%d6!KM+C!18Bd8&BV>5C=1a+-fm5;0?WCE^cP(8)Lbw|9V zt2k_}`G}@ue^E*Q^zV}DX8!skt zS>BQe^$ELy9;-!n#wA8cT3{1NtFTRUtrJDEdfWX3I{tO+tLA}8%$=SL3Z2JbO6jQT zlLS+059n97+;*7h_fs<&kykVzYS&Uf9RaX^^bTop5RSDpRr7U>S%gmBFHiQt(+`>faq2?+| zV6(r~+|Y@23feg;e*QB>m9I@Xo%Z_`eij_@NVsw4jeeJD3Q|?YfgqP&$$5yVsiiRY z9x;^tpRIl!ga>7-b2$QlIAWsMm>xFp1O<&b=sFnY4Z`fpvN zg5cD}F&xf7Ex=f1P|e?pbg4gtap}|to#cp*(KB~^;N7U<`^1EFh=YMQ52!;Qk9-g0jrV4Ura%944W=ng4}Lr{xH!XDaMCSwux@)N0W>Mk_wx z;GD!qXmKOlg(HgjVtMA_&lkCYxo-i;{p8+hCmYy$NZGy((x7f=4CUbhM#v2Y0Mt|T zLj=X`@r9Z(d=jFIt3&a7=^+EtD`++7>8o9P1Tganh(mjx_?nWVuC*J z#ziYjfj0gvF3jcQxv(NP*e+Penjl9|Rpkv+ruCJVgkd&nl}5+~GCKJu3I9-vT1Y|1 zn3g^pWR`p99@AzN>{%)5OB!y_$PQnOJEvTPYO#Z5^3_CS?0Jg>IH};=QuD*uc6Bev zK6*})kR4Nxz52?8V`TK4PjX5IAno@vV@@1!6Q_yEUW)~hjqHU-Cro8A5Y4?LmE-#! zOx>Uv*2!!(y6MoFcQr#9p?(iHL_~gO=KvT-ClB1;W>*Y0)s`%7oSMLHX7?$xOQc>A0xyOOtU9M@#39)N|4OZV5ES)?@K%QJB2t@>l4VTG|oQ65*a(M-M_ zy-DqrLtw(Pz8YMGr^_K__zw#_{DaN!a%G9kc|jqa%E$c=d|-cA8SE}Gv;@BcfsRsH z)#RP&ylZ+}en5bmYB;-Fh_lSbcjJ%58RD<^daf2QPrt1|;gG$kUV6#ghA5cGAL3F- z`I3_UvG9$IWhD=}@He`Eu(Bu9=}^N|m>T=*c&|DfIYX>7GVVa~T6eahU{fda2w9tF z4qVh3akFcQ`MEcgDzdOgs?k{%G|yF;IRtQ2>ePi@XVV_G9mvm0V?Q#i6#o6uJ>h~2 zJo(Gv#TZ>@oiQ7o(Mhlr74;C3^XB1*(Nlx2l*Uoezit!7cg?$RO0o*#<>lWcGOFM; zZG|bddY+k&B|QhOpKq0SImj6U4y6fUs@$0GR03vtAp-*_j_&oI5Jr zw&!uwcrJGxQ#o5YiCL~(b1J7qPg^=z)G>6#cJ+5bC4FnhOCC-g?$Ef8Q$hDdHxg!l zY>cn%S-J^sWn$w_w8=W7rdd)oU;4>^K!g-4!HDnx+C~b)1V7;t0`9Rl0gBY5oXO~A znvVYqzU_o7L59Pf;-13kEuQBQWpF*=u+?&wymaQ(N|y6wXr)F7Zi<}hlqFh@;M zXXDirZobw88d4iD1@UbLYjvw!yGhU>yqIJr-7BZ|YMbp@-tyOdd#5heC$1!jS6MB@ai}6<%3HH+~?qu<}ldCa_KEB>2-jPDwok#+O7Qz-a2dE=Sx4am>5(>ki98O#YnT-eD5fAbA-`Oumy z;S-op4T(h5mW7{~fbLLY9WI?pgdDSnNGzf(oYWm_v+A5>LR1hIWyQ_S&N5(&aZ?2O zD}LJY&&IKpc0uM#2&1!X6B zHCsaiE`p*zrvn~Q9_F#Dn^GD-a_J`Kpad*bB}Ez9Wra+K z7bHsp+DPfXcUo`ek#!L0tHbul`6*m|E`Qfr6`rJdG7(UuSmho)nEbZBv@h67%%z|- z2PuYSFgaGlvLje`2@RWhKR*!%4W13eHYNney}z&`=CR(#v>>z|Ta!?=H8#f%Gk?!q zvK|A;d?c<_%N%uuuG|yuq2J1A&eH!i`@pID%^RUZw>#&pdTzMhnw70ub-%%@ zxEPyGy<0ZsnfI$HvOfMVpr8k$oa4`BhxN_OKTb-_|NMeTz?Wx8R8yY=O((=K z;5WG-bQ_$?i5QS;tr-|k0-7m!`}EeX$>j3NfZ!YG&B5ttWf8}*S5?~%DjYZz7Tx>8 zZF=s-6b4R0@AW>%Z~Hk;xif7>Gb!#du0kNcTd7?R>lXYW5*`=9_9|xIy*WOSq;Q3) z$e?j`*tYk<9=&8+e)wipe&3V<^-iD%r%e*@oLGC>2u!z^>hkI`GoFO8U zU-KR;i;4^ojzbf7^~Ji>cX=jXF5TV9plzR}7G=7U#*-G(=rCo6xCYG=cW>=fPJ*Gs zx@UI`aSIEPRhy*i)E&t?Dhr9?t~x(llyD?rn`4FQqe;VW1B@}{!r(uBe~?M4*jzN> z9CVj1r=6Ao3w}oCGP5GFZ^f>yZhxYoBpKlhbe3+hYwZ`ds?gz)$TC)PVJM*L{7RSGfwf+lOnzodpZu1&gAR%Aeg zrxH;l@Y2>phQ=h(554&!e@TwKhlRTA6jr|Hog-_O>Cy1C1;RkwmmpGqCRNh!n<1y%Kc`ipl z$28_g2o_AWcHW22-4fAm*+#1o*OCY9=+}h&!T^q$sA|xzj(Tq3!zxLz3<#OtAAR~< zYmjA6wM*2SYvNAC{Ulc5@uNpS>3t2R0I`Sm8r)J`gukH|w)oZMUZqIYRY$v_7E_Ic zB&re<<6aJZ*A6h#8jhhCW6^0RPzN2Ddm#1F*ey(x2+{bbE&#!kCjVBZGbeI0t=D-s zkSqE)+tXZ2|z$@)W8O;`m|og~&kqD#cDw{HJAtlq*xfkyKDEm;|)PX~Z~*w-oj23t=uf zqYo@g-eyI)c8$4qkciF2BOww#2bn(#aI6Z&Ayu8+dIR@8k>Ps!8i>r6eeLro<17Ef^v12_NFp!yuQhRLH|rx0qn1lX`qi)T;LK1jp7~zK z?4cns+?AB&9`b{p5e*jakr|HY!@54#dln+u3)%@JhzCERxD;X%idF_JhKL|^ykBN;;bs=sCTE}m5e|w{G#MCa z;!Q|#Gq%OK5uZk~36VPa+MAIHN(XJs;R~i5B-JSB?NV&e){=}Y&Xtjx(FXg-CtlUs ztB3Pd_;zZ(7V?5SYr0g&m6>V>3Sr{tc^=A$yu`pqfogh>o7GQ*yvtkD5xr0#fGaBn zS0B1FO4QU&yMcy?am>Hm!nGpI1{{KPs~*szGcvOFMzk(Xwf4;Zyh~?iwFCI+8-V7F zjl0`Bfo1;)*VJqOu%HShzwEx+r(nG-8Uxk2otuNRJxEn#zBqc2%lkkydw@;cUdIvY zyS4N|ub)K9Uiu*E)H=%w={F}Gdp9>&g|%@Rf1R?;bZ^Fj(hq8L?0L42A8N zAl{d%2zj31Q$sH>|hjdts=RjQQ_ zXL@UEWVmm&fxgTea!mFN^ zd-FL;x`enn<@N$HoMg~9TeXA0Tl`k7Gat1gQov&wR}7Dn>SO7?T$t}zR-L~=Cr(+~ zIIR27KI#b?;zbiJybC~7$s{nm>~EU~PSi_y&XAWuj=xtDuq1MzgPvP0g_iu5kSK5i zYy$v0D08{1rm*%v3G3xf+oNyDA4R$fhe6VLG6H2+iFcpvAID=vhl)IZ1PeL8m zF_;*8Avg%&0g8b5SrYHmjBOC@%!lNbpp9B2a|_Vm0j6+KX{y4+fqc5!>G#s3xM8L) z*ltSuq1F1QR%*a+#CvYpu9gNT8;8ehj=)(K*Pt{^v`%l^zPJ?B(k25C&b*RK*sV1_ z-RN8*Do(z^#MD;yDsS;qAPM3dFv{1mXTY24l|B?+dLQxkO?t! z*IQ@j6NHEB8SK11Cy0-Q9hOEn6hD zfulTYAw~wie5&NtIU*4!X+i0tv8X6HhW64+-7OtQ$HAYjRWC#tG%H!pmxW;J=2z^~ zKD=uI@ot*ftW3iPmuCVndI!2r#<++Pq~}&T8y^E%;7crdgLo!)17hWXH$!o&J$1Mg zA_9O|7tqA)=qjnLZU~;KjB-m^Zk+N%Hgy5V0G+r)8{)^rt=n0}%{_#48Xgpe$Xo}d2Krvwx|Q+xQ`OC(JURO=VJ9Mk_RLFTyp+==$gOIkyV`yoO;c~#daPfvVM z6R$SZK*qSg485)dg^lWx`lbm<@7GNKZNf{Wsh6207s`Nu$)M=DQnrPGO- zlRb(Ut-v^}7)#sWLZl{|-Ouk-t_=z&Udr0KNnn40TJsgk+Je~ZH}kT2pQU+~VpCJ< zx323k{9MTTDU+rYvrGVUGL#S>;D+R*c|s8NpO6$tAAMwVOy3|S83)#q$Ww2wR{nrd zh%d&0X{}>fGB1+G%1%bj`!@Y%XQKU{#rri2Z2SPu0A*V?Q9Hpw zH>fK5pd&b1d*;^wjn%=0w}i7{J+2;gTi8XjNI#RYu@7Bl`p`@L%O0-%EdG^bgO{kf zkLmZiWCAQ*y{i|cB^ud;XzGBQ>v|bGxFrAzlTW(QG~)PU?{ITT(d=Yz{#ml+vMwFu z@$m>tF~xIXJ(5*lgYsAr&YZM?iu4O(8&{`gr4|E#0KJyv(+z!1Y9~tymktEe~_>#WqkKVvkgSO1sH2tfWpJh5ya!%0f$=# zEw8pnGEAYrcAbLdHg#Tz?&-StI;sHyqZsI)%UN2p8_w=GFkT8oC|3VG(|Remg=_eE zzm^iorfCJ5?4dyAMPi=G!8oabA`C*D605WQ=mcYOP-DQ%UCV=%>N;wQ65Sw<#$zci zItc>b^pJ_Su<#zBOw|_Fr;rF`vVmT=^Su+WN2`kKud8T|cqj9~?)k?sO=@~PKt<^( z)S^G8A;JQys3)DxSN$8SI;#AA+>zba(cF-&e-RQX(J-pG8nyiEQmz6+RGJw_&l%Q- ziuD7)S%hc=)+5)^P3oC1jK}ZYGFYY`?d3+gW|zoQCZp+jhX)ac4bl+_Hk04y$od*{ z_#EojPr;(K1}2jMge3b`wm=Z!F}PY3Oi^`ARx4py*)RxRA$d+jX} z-2d}P3tH89+9%O8fWFBzfwo9*SJpPu-~Rhf3b$tytWN!fT}r*j*8{L5)fAxRW~mce zvmWxa0#Q<>S{EJ8*N?Mo_p!?}*Ug(1ME3nibd#ig&4|qR`f6id#miDTT3Kx7Y;i*- z5t_cCOvQ_N6uVShQUcqwzfd97WT2Kup=zd8i@JWkeMo<9Ouh(Y7SvcIeCU;gb!dXl zqF@6{yypo@=D#w0^_DFA2W!3vks2D%e7#2Ev-JZ=nb~XD_NC>4@dvvx89hwPZ{a69 z4`enK!F9^xTk7WeW@C0>->Q=rcJ%4AJud(pd*wMGFr_&Kt+o8qs@tO>hIx5(PpH*F zBOUHLdM?kV`A-8H;Mh9m1y+AO825wR{03GgviIGP49Bx4YB{kFvourOVo37oN6R*n zyAq`kZ0|$A@PRb!aTk_MS^Bv8ZHA9@$qod5JZR&QIgdcO5ZCR-Ov$9oOBwy;4WW(C zs0AcHqif*ozjz@AEQ0D`lgG6Hbgx(G3AmQB8a%Yod@<| z^4|5n$uej$9V7hTufzcT2eS3x<7OH*pMXB;3*04L(-rhSw|b;ba`z(>m4NSwLA6Pf znrfyqJ)F>)DBd6kH=bwfw(D7|RU(WTx7&=MnnC(a)WC1jmCu%xJqtv)lf!vKVQS1b z!V{5IZ)$k%AQB)Cc2T%TzZ>E}zclL=T-Ze=$x8V3MoQ_uhRw>ry{{kN6`g%DklrI! zCP}n3&xGt^91CO{!8XMi?M$e}0dAQ|deh-oCL@A95|Hh3kTjt4`8syrhdSa_l=CwkaxFD|#EV*OgIq)b5jiTjG)M zQ}3Y6y6G5UNXL)FC?R;ok_YiH$)40O%}cU+xy~3i2lJa!{TJ z&i({QA91DO}))V?JCyXzill#xeq z5HinOBQ^&`jdxC01*OW=enB@Bkd=3qRwpuXB}&<)rC+#{>pLveXXa;7lO4iPrKY|{ zJCHXBX&7Dk-e=55Y&gkH{luQYt44W5y%rRQMc)|U|9(+4-fyM`R)ZklhX@E(yyG}_ z(TKC6UR9mb0TO-F%SVh}cfVhMYptC%YTu9S82#in8H1$uF+J~q_Z(ChDW?jE_`RgT zjKYW2a_QA>)U0OXsSk$C&F9zkM2Ja;_|5!}Hp5aBd>%i(ps%_^*4iU-g>1vFcIleZ$acd6sF z;CYu@Yfx`%(j*jMrS|Em!YhXx{Q!2AFa{wJ$!R`9M^V#n2|C$3;o>_TEc*~{dABjR zBG$VV_bx!kViHlO=*1Gq@e$M5q(vtg`ZsfI=#Kj$N`MDrd4>nK@h6Qvj7jwn2NEkk zL1bkoKjNCxW$Jgi%u)#Ug58CduQLJTd!<-(Ac@o#bV`BasVsIEjLh6)n#B{Jeb8-;A1 z_r<*8uoqJpyT0fAEG$~|GL>~qo}t_YjCtTW;=3-hL~>(QzLbD4k?PYf(NFC8Zlr~;Hy7QQcL zM3+s5yTK%bb^6^VF<}rq4&nF8L88tVrQ6!}D30ntzB$}Y7b=5Mufa1&WA<*<+bnGD`M_iI3TrRRc;@K5;&)gR|w)Y*S>#>W`qXu_Z-drX<{b=Wo12)eu7XeMOv*$&+E8Vdt| zfq|I#vitope6I}(~f zX}|%@mdfV<(`pD%->R#2-KH~bK`K%kYbg7;&y^`)U13J=n3AR=pASs(8W$vv*uj~P zID@fzwD+7i)fC@q3a4^WA7;5|S2f%hc5g|Uz#|clp``o$Q5ge4I>2MGJsi3a1L=}E zb=G$@#raG?NrwHI6Y)&?cRh2HnIw@#mQ3>RmuQxPTISyJAPHEE%Sr}JnpwcA;BEv2 zs~xBDY{up%F4Y(IU9^LlxwCu??Lp`EOn}S-Bz^p+Eohe85duU=j=!c--`c_6z*L|7 zKn9Q*v2#nnhOV90cIyT5VA)gb2A`}WmhsojBT){<*|NED(w&y-3|E~%Eb^FElS3fzpahtLaVtE_ za2JB_G^aFr{?Wr=cj+JBs}kJvYPG>Ts|f-Zb1~`<{r1^dI-EB`WX~$#qPL~s$k!7G zn7YcmQmF)l4^@-VWIHe<@~JyP(R->H`UB!d}g>IaGnsbq#^tT3oNKf{F+`@CJ21uIL2``111;*`C7_@104 zz3rU)#6wTIX72BQWcs-d1i85n)LJFCLyE0`okGh0JzX{X=QNk~v0n|8;5t;hEM-#s zuX7}O>E7wBAFhA>^E-~`$L|oSnvmlsk=8PAE$0;_UZm^)nr^*pMW1E2I?nZNsHng< zj*kcMaF6XCQoK^)w-msvQ!~Ke?Z+XG-gQ|N2%dJqdP(G@oAmf7(*(+X>pJ-TpScrkBkffgJn)^VQ**PAgf!O_XM|qS)1almVKD*B(Z!y&0{|WvVJ-K zJz|A1t*IVuc(A(_N%J6G+1d`-l`kC)tAz%0O{2iEULIHs;^E}@lREsQ>x-rs%CGj;%%&E3#{S^tmZhZ5?tSUXFbo!dvnS&EKogC(|vB!Wd3R51|g=A zd2Y{BX3tBFWAkpv(mesHo^pE@lRch(JDzb~kA6#!+2}*3+LE%klBR^?mDXN((;ec=M+Bu zR}mEcx4j@STOrL}A!Shk[rQNS4}Bo8ZOW+5)Zy}99tYcx7Lc`-M_q;w&1Hry4Sq8Zfg69zO=#`n>fz3;xXg zebW0>nUv-KL5;y9KmiKSF5#EN@ziqVj%wu|M$@;Lrp{S^Tr1=9>73CC(d8&+92q8$ z{GX-AkUpJPnW3HI{{O8zn@tg$E!o*ksoAY#vtmR~J9sp3Hmg=T?zqA-smnA8J2 zG|ka8MX;K$zxu31)lG@&%f(f9imNZWRB^jhUt6sbSgk&zX8Tmm&R)*eK+Yb)GPKm$ zxzyQO)Y%96zSi`$gZtW=_}csJzSi5d^Vqeu*|iTr^$jY#I|um~2Kn$5g6@F47luS< zLn7=Uaf^^pPDm665^eyA9cDt{o}zFsIhv<*>zp!~c2;^xNSb;RMa(^l?r+GDXh zNONgOS>2Z%XYjhuX}B-IQ2iSX;TDA0DMFYMQ^n6qK4eZ{ouaxwW3jBhxgNQMV%h*xY7=CrkL23-fKjx@120zC_bgrGbqw>Rfwv z*S^KAb&}WG%htNr*V^!FT{CMPEo(g|M@d;;f3SI9XG8oM>3usAabDB=7K?Z2@#gD6 zoE7uFDTcV5?|mnqfgsO8$qTOJc}r9qGGp+9Wv{v=NrYv^#%8nZz|LM!PA51lzRn{A0wHZ@tg3I_H5V! zd*~(KqDwmaO4^H9B4$ZjT1nTBl8&$cS+&0DO?---z`mGB8koqCnn*02NOPM=`8|Q> zpGe4@z*$Ws|D4EFnZPtpuuRga#}ipubnvygzpgF3zBd2z+M;LN-1E4FH*xc(aV)#> z+%w$;2ilu;B> z13O0%ybTHI4Y*mllKZ@|`=amqoGxn6YI;DhAu^BzVmgkRy`ifK6p+gEofhYgOFsP5QNQsW#rKJl;S*FOk*-?=srMvUx>Rj|XduGF9q5dHpse_q^oyHpSLye+w)C z1#G*uGv~eVOHSOIHwU-Qo-TPDWrl3Zm9x?p{mjOu^sM0bpX_Uy?>RIFz^V(JEfhq{ zlFJt4=B(LC!E;JLBmX}a;@Zw?z6njSnfoQ-8N{VR-aXPZsGN3l~NZWY4(sE;%5=8U+5=5J#*5#coe0^crZvmueW7lO@&y`iS&4c^baz5PUo_Y(#MgQdgePn zobNvRLQtpJSQa-uLT0~j!^z%*>5-{W~r%=5Au&9!VvS$g4B z*_?6Ne1Q7`w<_)4`Vz-_*gfLp% ze!XGZs8SIv3ravPvzq6W8#2FB4|jhAYfc}xD;4jd+8>s*DY|~U=1QWv4(wX?=uL*J zOr#$};?6;mgdr&mNW!o}c=i7*Ll?qF9m0E;{iH_b)mDnAJ4M=^ri-6PoqTInCJ7=l z)VAOPlyc>^Rpr6ieYVpD&Y1-()j9h;lZ~vp0B-S;%Dt4$L!FkL{=?$k8d!MX=CQZe z*lVX0dl6%}W1XGb{|bQte*QLKT{h(>Y|NJI$F}Uu_Uy>+?8_eP#r+(^0UW~N9L>2L z&&iz5IsBY6xsLO>lnc0sOSpn-xtja9kzey0ZsR6?%Pri+?cA&WYg)d@Lp;c%Jj|bY zipO|@7kHXyc#ijZg_n4lfAK1B^Cs`{4&U)1pYkQ&+S(c{=9hnqR4MwOwGFeqdddRb z(^tZKn%~;f{I8z!LihBIs6|J_0dQFKLv;Is|saq qWOH

N%*#auv2YT5Yi6SlT^A#m4 z<8f)A_%J12hG_;;rcdeKORjh;5jMoiU|%WN)c1Z2v})8F`A-H>$(SSxqLZ;}n#Chy&2| zMxts3+%BBiS@zN~u|u0Bh`WV1*mXKKs`QXoZEqjHq4AG?fWC>z(QD7slJ7L+sc)ED zVz{fo4XE!EWD*G_XJ7a}-w3*5cg&91E-@U3Hm2JJ&v+H3ep6(!GX4I~b;Y(vtJ%t4 zBH~S3#cAt?>(9F0L2#K2NU{7VRHB~HG90zSzFTrE)8F+c3c1y*ocmQfT&tR{@|G_k zD?rA*>QB*Bi&kD<_B7rdeC_9@TLstljZv{aOcFS0lisBWl<&0~Ir~=K^Pk6Tl(lnU zyo^}D=~!HDdbaCz{NgEepeM^ApG2m@AcKIr8@!bQo)u$d?i~!%k~198*}u0PZatG+ zI*hzr*p_(8GlWJTUCn!J)*sd_-*#tpdL+L8<~mzWH6kC99~x_Y1T;=i{9?C$p38m! z7XfGG|5J0t`Cm0xzw=T5Bm3ylny4jahufM_e+AbeRoP7djB+w7Keyd1nDoFXy5Q)Cpi%fUXw0BG=@{$11}g&WLGG@Jr(SGb@}@Lhx)qtl9QsQ2aiAU^kEOF~l^| zekqKImdwg*p;{IkqtBRau~2B9tPWTMaSgf^lvno(lR)`Hji2E$V{S~sEoMRfM zN^#i$X~JfnB_J5j-?W`kOi3~T?=`V3;FQtLiQYJ*R7N~#CE}%NDuARQ0l;f1!y`Fj z5{1fxG9peX9bF9DU2|_LjUU76O>TUXRb36hHWnfxGUtHbSa)#;u&(@Wc8kqVPpz9$ zK(X(#)YF~MT%F0XTzYN`giKkT8yVl9@;4p!-=4)3n$vzoe`$%FXtY%bwe=K|H!IWT zgGM-M%3uV%Sme_b+OhCE&>c)~g*UHd4Fjm65w+yB6;zI2dXmMH<#f3PE_4%D`^kD- zJNC~y5JXP*8H0x>Jm<5`*~?|2$9<%3Bj@d}-x(DLwKrF!K#?a_edGKWuRuz`b+7FT z6WbH!BVN}FNk}XN5#+zigs{1t=CO?)}#^S>_sugXn5`145j{# z%0=20C>fJsErt^RK3fgUpfoOT>AbGM!a>Fdr0L2IJ1n_2B zDet5+$LBX7Mxnw`r$7UAVuW~)%G24DdEr;>z=FPj++GiY)Rc*Gf)`g%sOdOlBpBh+ z4c5!Ah>$Ubkpr6}Ob-IrbF&vwjop}+;aO%suceM`w9qODg{yO^zr+{(a}vUf&1Wa@FH}?OaSBM^lWC z6@mK4s?Ym}SfgjnCQcj_bFHkbX6_&lx?WwTZNVOZA#p6RX%`v^u|{>IPMhbPV`W*u z{#$F#I{H*-*rdJ|X>QY;D>$qjfkU|EIwJ6gXaU+7cp3hjk?VQ536t?eZZhLN-__0y zchM4Dql*%^%u!tOCxfpuuJR1_EjRl8R8Qw~7KHnk&`}}Ud;4UOSA*74SU%JQTdRh< z8G3-n``jR*Lc*)&gm)&OfT?yFllXYHo1z(emlbDN3dtY2NkY56zo}JR6mhAm0bN;u zCXh1Of`0n{F!oMef`!T2ZQ8bN+pe^2+eW2r+qP}nwr$&)UyXCM`;5Nm|FFi2h&P^? z)4U(z)fyR7zi70LyduajBI(%e!xhUJ1f@95Lk=-7Adm5wS9`iq^D2UeHQ)O)shyyt zx4`fi#K@g9Nfsy+@Y|0Zbq%Y6Q9c|GUXCJohGnib#6aQ-$Ta^>8YkvZd3tUQVPBMN zdZKw~HEj|`ST3h3j1zQ*INv+6R~0TbU5Vv9TG49j{E#xkL@GZLFmlv9-Ln3h4LQ!A zLsPZpbl($n)~Tc8EA}m=W^jhPW9NP#_!zazU zvvOO2C+^6vD;zqWr4f9X)n`)$ug3Ef$AbEYg9I&ROi9&OPua0df)cQ%Te_x<#{{W# zp-EmU0?UBD#~(_Oh4Hr$a%fOHjbe?gNv73k7Ydrl_Ey6S&|Rr^ai$;KU2NAB(b}ny zHExXg{&g{cldT!T#T{-XA2R)8p-3r;N~_yRg+!+0eJK|3zA8 zZ2PW5tHG}=Et?25yV(A8NwVv%1i8$t4i0-TI_SaR?wl9c<7jjeUvXO|ATWPcGB_pF zseKeEmhN1J-k|3Gj^bI^;#<#U0(UR+b-AKWT@Q*cVp@W%wZWu0iFr9yhKX3j5O3*7 ztL->~gsBqE;j?x5l*^-X=HFTGd(G?YAyJg)8*~2NWn-6}=^>3(Za|$I4<2F-Sq)DSEmhrA}IQz4V8yzP6R8>*{^S zNgO|YZ{(+qn)75F{xokt|FzVt3oYh8_^TuyUZ$}u#{Y)N$t!?) zx&Q|DB7bs;n}lhR!BsS%fE9*?lJ{)HqmxnM=8?05ST%HW_|pEaR1@I%5+Nr5x#nzE zK{IMj>t%DKsd!b*y5eHa9s5zpiYs>4(;sVZw6o#E;AkLMKI~w|q(j|GB?IA;DWa}l z*{er73*kDex$Ila83bEK6>3&@#j1(>DaGA_92ylWvY*qt`V*} zTzhH?lRjj~8yAb#*uaD)3c`icZM^k^%mye?BBF! z;%nL(TDQg2R6aOY7|X9}T>z)i%X2z4`kc`wQfnN-yzWTebg*g~!DD|I;{W{(A>+Mg0Fn=u0P`fDnxk z2-ssY<5vMRC8f0u;pj6Xz4&O6B53PNWvp&jAg^#mrjH6dDm>45DSGJbVNY^&y2ZbS z?!TnG-$_3|F0YTXwUhAt8zK>`5fuOQ^hD1U&DwNx#)l6bzlT&qoxbm=UeBb9!R|}=c<*S|^wTqo`8>rC?pOFu0S0*j!sQPHx zJ3@u33`rdWLmR8)i8;0$Yo+fx7gi_{08;4yysT3Xu%7CPnnKxZtXl#vOV8EgvB($L zvS5)MBFKV~k$1+m*7@BrD=vVR0dRB&dSHIE0ET7QGH|^5p>%RY_8kqK9Rire-s$dQ z90pZDj66}mBzv$BdaqffXc|894dPTwm8?ZVX^5R&+D)nqlVH0~5=9PEyl;0lA#(Q` zjY!7n8c7=1Oz_q5Q|h5A>c5c8H(*?xdncY-bebWEROkOTM6TVDan64JM8uO}i)jn1 zz0K+Sjd&Ohp#eOBJ|)p` z`4dGb#Lb_or~poy!OaElqBLVDN1?5*;0v5gslT=@KZ+l?s6u7R#nxz;6P$=oaxSJQ z{d_rE7gatk{cMh5Rv;$3rpz^T?brB9N55j9wRo!rP_O~!ec7g4Q_pth*-w;jU$nVaq4Bh!ta2hN<^_{MGh>p8EHTzVb1=N0cuKxKgN8d4 zR}N>tP|ZRHNxVyCOU70FL2`BB#Hi2qn2H6vtlIYGh~Y@zlPyKZkhcmg=qv>MtM9B( z_+{N{{|%LE=@s43<&kz`nTkdLJS6$RnUA1xP>9ATgcC6l_T?a-_dycMW)Skh{cJJa z#ys=0zF7dMR}jvs{>cFnA77&ljJt#F>{a(L77P8lGq=`a7$J8^_Z(A%bPZf<(?9Rv zP|eQU0*U@;Sbieb@)XFVv{km@BR456gBlfQ0AsvVC$Yx9=IuivaIt|{I!~GK1gZwmkn<90+ zsT0MK`sQrW3r87V(_U^BQPz%yQxw7uM|^Ock*e(9te}`rR4*Yp!3NNjGsOd4cfl#9 z?1?QNqFbDu9kbm)`ZkPmN49T81KXiBeP+d1(8wy+t#pran~vcJ{;xA`^lY9+7m16L z42g{t5M?|5w3?Vo*m}4bD8V(-jNEwBvN{})5?R|@%8I5GFVtLpDb{so8_#q{*Q3OS zz7Z6Z&Y%#Ft!+v!lBoK8QY8YDUA#*U3c2+qkQL}7AtucJy%9oa?^&%02hR6-#|Sb6 za?`jHLhE`vSzG9C|2oz4(Rkt#xPGQf(ZRwM=OZ&TA{{7k>tz2u>4y{EB@V6toPc4s zW|XGn93^5$TNy0Qb`c*Mg)@zlt>Bk_`MgI}oYj&1GKM8g$Qn)I)cjjZr=83r^wMxnQ5^!{z_#Jr(cat5f8kYKuxpd(g zs^mBavT#L-X$MOY$2uaL??=_5m9sD50_}R1qi(2;f_Hu>qlbZxWR zCVU;s+p%bSOKAlKDyRqip;`5nst?R#F2p8u8tqn2D75VbM1;d~X|hdA%v!d%T8sVB z7wI<$&vnYcqx0v^I_DgBuho1PIj}H~j8Dx~T=Lf23wtb@CP`a>bkWHQqfMbKR zZ>lV(gTPmoXzqBJ=wPY9Pi(3|!>|#-;L!GoP54rOnLhO_6xwdCna2 zQ{!u2T{53XSbQR2UVDdHx!lP}uOZx^rE$zi!=FlH>z3ZzfVsPWVT=V8@RZegCY?XI z2yuzTV~?8!-&wNy$<#3TT_Q)sCa%?I^Qr$`(cWHbQXyl{0~iijp846;(BiuOH2_jwjvyeOorZ1vyd8W^3<0RBFxuDOXvbRhPWF+Qc9w56?6dX*SEV(l9TsP1oo) z&sBpeh&}TisW+8oJ2;K%y!SZzuyrDkS+M&__nOFHwt^id*hWjmr&-WScY7$;Mq9}@ z`_bKPqzd^dq9@otVDNO!@U83O5nWFlXwzpxRVp@E`SDcDYs~z8_=}jh&Klg+_@-2U zt(Ay_WXn%#eh%<>or>1-&0)J6%BtRAi$BkOG@C_sGTHD!n=bNR0^(iBsJiUHJjT@6 zWwboyO&zQ=ci#E}bNc`Y%?xq9LPMAxC~jR(Ws4`fTLNjO3wkXBS;nUD|UT>K8 zR3Xh_(yZ$AbKE3iv$N#c8QXcP)3QeUHWdGuVJ8MN z65nqAOfB*X4K~vO!Uv47kX!si>(9X$v_29<$|Ewh2%%?a7lGMp49!;e) z!z)U^b{FD0_?nlde@bvAwM-8P7E!8K9y0ZZj4NsjL zNdG()g?=qp&q@sD8*cgS`C0$I#}ZD)g%G2OE^yqIvMnehK;LYiP4u-T1`SsAzqCzv z?PZ0eu1Br{Diq)vDdeMhfqUa=GFOozQ>2eV4P^ww#6E+kXyb&xp`6qcsPlVvwZKAZr-wn zt}0TjPqMn>CqTU;g((AS`hdVG@k|(C*`;tMLE7m1Rwfk)y(nd~rR|WQghF-@-69UJ zX1(8%I#Lo^d>_a*@}z7*o_%Rb<*I0=XA0=RXxs^;B}DzF&bqz<(guLG5m3{3YXuvc zGa4pn7wd$DEf6&~m@f?zc1q4d+t6K8O!t8}X|oj%Xj81tvoTnKRAK;1LJzGRf%UG3 zwIEm-lC)`(aC(r~jyY-E0nTFn?2a(x`lqP8sTWK#Quy7)aJ zO>K5yn?@+g)B$E4f-PXni7dL7LPr=uKGx~USzwk}yRBG~SonJ~YZLw|ZWJhEU(I#1 z$dH~_6F~Ee3ljUdfPI1E1$xv+S^bKk!(_%Pc_oI9de}q&bDwwKi^W#}{KTkue>{k< z-h_%H7|+-^;^fZ=TSrUco#!g{wDW7>CFCXB%F_nqTQ#!e>q=2b?e^~WX&xB;@*TWF zDo*nN4)II;;-7(Rrhm{nVCcM-%0T*N>Ha}3ATNj*Eakv1%lu5-+UEu#eo7o*-@LNC z6grfl6rn$!HH7567o`AdSWXmGB7vfLtu0C)mgMPZ<*Q{ogh?Ll*%8CCR3_?hN1X#h zG+yZIzVUeVql*xGp%ubpLNJ_|5HJC4e~TYO7#FGg13#fWgHIBsEoM@!;Gq5aw8$m~}$F5M^ z^CLmKgQ9q`nTxNWaOg9J#i-j@DG3&=hLX(xx$_H$zhHqViUGtne|!e%|B=FA4N7wo zR1|%!CN(7XuUSmG9T?i#hzBj0Q=jjmE!DU*}rrB*^A zi$!IrXO)_@WpQU*6X4%R-ZX`{WyXm+BA~2)D!R#V&K{dwEW}_$;HTNC?DeXvq(OeX z61NK8tD|(Ip)LKZnFGS0zg+M<{lXdP)Cuxy2%k}Y?&~nAZ?e~qZ|f2gV#rDJ z2Ce8-GcrK3&tA#Z+5Z&+6KA_I*t)DuP!ytO-^3?0k}5JB$=M<_&KzjK!#8_sOsUOZ z4CFyzPrEz@<0spK=u;j4j0bK7Kj0vd%^=1{J&e&6^5AJvZ?9KpY_!uet)T_IUu^Lu z2tw_2(J%&Y76c1wmTiQ8Cfa)1=@kdsThBXp7KK$p3s;>15V@%9rFDC&n)C{ilZa)@@jN8MvQva|?t_e9B0qS^ z^)nWDNZX5g5yFmudu^HY_a?EKtlhZroSajSyn>qwE*CX>!6E#B|f<}Z?F z8TEfHfd3Ozl97YsKScunw*ZdqO98>qL$LsMNO`)6pszfuuuT(fKfO*8no%UA=q)s7 z0|*+f9eB>bn8B5|{}Z>c4g4lX1OMu=)ardNlK;LtK7ChPaD&&p*IIzGWU5kcdf7C& z*zC?9@=xbZpPsCyo(zgDi_gClq)ty_aEmWnmS?06>S+-^RU$0-J`n^3Z12+dvLiWf zYVoUB8w4TP(g%TB@ArOgi@xaBH%5wl?Dc|IJ?s|NqVcK@Vn5&E_gV5My!1xL$PC(r zZx43$cITOkVh?UxZC*YYFD305}e4{PyvJ>UxfcBPpe!s&uTl#$g5f zW0npEC5vI>%ow?07wbz+ip+5@WZA(IuT^jk}>;^vPL9 zebmc8i8H^|D{28h8U>-c=JN*-1ib${fOVi8SUnD0H}GL7bi+PtF;+3O6&XQV3pTI@ z=vc92W#-ldox$@l!y0vzN(sOcn{3xd%-lJfB6-sCbFG(1sx&ef{KCbAoXg<`9F;@n zFac`!{dZ^71JBoA-3kQjZ30@McZwm;C5-5D-I1GOk8Xyr#H+1*D;-3mTrCti)1tez z$%2c%cN_=y4`WsCZ;y@wQdG@~Eh%fs)?zjtQVL?6b}rty3{wQN-e_9MXkD&xqetZ= zyBq8L*yYY@^Vfx_4;UF}n~o^JyvFFcR8Y3tXYDb6YZ_wcuIRpvsqiQ z@-?M=ZXwU57f9Jrv6@2u7@Vv^{wZPT6Cl0l8UkWI4;oR1G$W9MSM(X+Ty=OUqJBgm zkWkA>Uf#|L#E1J018BegdweL#PQMzrfgVLkN^5X6DapPl0ks*Xz49zE#A|<(eXLbm zU-X{t+Tjsh?l|yG)N4YRFY(Ai2M-J(!E775hu=P3#3cw05E{@dUy6~pd24NrA!4uD zcAI^fV33f!gdof`w$)S}(-Z-mI@&}z4F-yV$w*_StGbJr1JM`-R~>e`&(U+g>ByS_ z&Hw~Fr=#x3<(kjRLZ1rx6nDY9E&0S`-ioe`wy&*ks?i~_waYx?JyQ|sEaqx^`*7%h zn9Ykw|G~*LUyWI0WZ-bDaYSibTxTLS1iH)(0H5J3XK8`H&@@o@Mr(LwY%~o<~mr-R>}vyY3-IubWAAuYZ+t z;G|jFpRFFBTZOdJOMAo$tQ3T*iyEt<+Om%f;sGcnw$l zRO55+hWLi-Xh0OTH?nTqWK~N4KKeH3Jew{Sq8=GF!xx(m<&>1v6toknyk{p&1e;VQ zNQHL7wf)J^!6d7A9breZqqJ;p@RDnH3fV~iH?2QJZ;nmwmsF?+Sv>9$@Id%&GJC8h zQ>*8a6M%LgJ!h42xZ2zzuO4i9uTauL?oPq%Od57*tIm|DMRqP5x&~S}3~m!~b+V@{ z#aUb}1AMX~dbm;xQgD`)A>%?ukwN6WVgufS*%C5X9QmN7W--hhm zCEsfFR8gW>&KXvm^lUm6^T&jl8KYK*0=DCyD8yQUF@&bG#wod)%Q?s1%m2U54=k7 zZjv@lpMhUzgoXnvM@k$nQR9xzS8<$ANP@1)_6EIYNklW%oEost8K-ty^IDiLWvt@j6{hL2r05ErYy-p znM(DIB9Vm1`GMC(;=J!&m?L|u&@HTdKf2h9}X8fNBF^n9{{}D#H*5r;QVMUmENBssLd9!J4$^d|r zB?7hyfoO5VAOd>(1w3w^H$k8zm<^2`3WDFc$+PK?cKXT z_WJSq_#V7``j#_A%9{2z3 zdMQE)*}DXUKi=LmY&Xe?erta{hz+&FfOWHTfLvIMem*Dz$Zkx~zj~#mjs~&MTE53k z!**KQDvncol%U!c99_E*%x-E7paJbRK;=PMrO{5$_>b{!+J-N$B2p%zEUP*w{SM6o zil@d(ryQVSsc{5jC+P*u_s~5VR{&F-?edEZ)DWUVRY?{P%K6w)?(9kH$< zMG$J%bOkHPo4@oopd9bbzaaQgp1d0p)9d5KYY3zn_>vrCJ5Wwmi3RzDDoeeo*x!S{ zORiH1tII%n(}Nb`_G@k}e<(8*sg|W`keFFwJyfB`_ocpqcBzv~A+gKZgn$;;aI)#w zYq8VExpAHwn9GZ5x%Sf+|5Q{`tlASik1SpwWpSte>6TBqH9FU%SlfzeGZz_$9qq`H ziiu)ugi0jtm}FsqIoET$G$+#zE?lO{;NlXad%1LU^P+tl%OE^)<#Zb)(mBmM!!}q? zR?22V5(8Uk#7-tZsXAc0@DchIWg?vl`=K;(%@j+OSY=n-IWB?5tp_V0iU`}dPAbyk z9aM<*`Q9>jS7TXBWshZ@(&9D5lWfl*M`4s^y?B%nc+8jF7XT`n2(;aa4TD#rV?5OK zztvl^h{;@-mX0J;Qk1kMTrSt1#oGk0l4+7P>D*y|*bCQW2L2-%yOa^3$PP*DMu*dx zR}uQxPs8TJYb7s#-14=&HsZ6n27UWp*;>!h^XT6|8MR1!0n%Md{eTomdM!q2v8++- za7?+~Dh|rCwJ{e}Qc8#^Xq>{?DWWZrket|QJQ-5*wJLW$%CCd%R4-H)2~yrHpXPCc z+91*2gc27fxLm&k*qb077Rnnf##}UNXv))y4ES6*a@={)Zb=P^{Wf>6Su!8U*oH$6 zY1WR_BjjI+NIwoV@|<{H6Vzxnl5VQy3@E(co}JRPUlSco*Tg1|Xj4<+)}RJ5xOpaI zW!lRM@%BAr-)|wmJw{McqWn1123#3Eloj?YU~;i#w5=FjA&LrdU3Xg1iSsN3+^r6< zC^KhSF96qf-LSiw7TRSHdcufma>lM*_rAFUQ<+P&D(Ov~ZJp`p_y=#%{;3pMCNdz& zAP76Iv1G|ETu$!q67AADzK{XVQ}+S!h>|4GuBGvjl7j79-IoBqZl|$Wz19?7QxOgh z_e*m=%%P7lpRz(py5!4!>yky}8hXxwxToo|IKQUC4}Sv|t_CGE>1HfT5$f?MjED;? z;w}`8Gl?z`0L9*Ay4+*=-?pwhdOHaeEv^aJ8<4HmI}Mb-Ac;IZh|+Dk+-nvnDa%SEI!mGa_yM2#sZSW=;J8USBLM% z$8e`{(aZE{Q}KleN18rYs1!?6VA7i<;4E%j_1zccKiqLxID1yItQWk{NPmOmygD!l z$Na_ntVTu)>+W#(7_ITakY%;a9u;A03m&%=YK~ZZ1~IWx416sxXLSKR|E9~wy?`0n zQhICT@UPv4*hpjE5~LIuvF+|R&9yfELtZ+BQ~mJb?fRkOa(0AAN;LQHVE!^@Y48WS zCmHEtJL;-j<9Kaz8oXY`%Ik+LG>R4QF9I6pOR36eEbqJB;OK1x(CB`BHgNg#GwJpV1fJ%E{oe{M)Bi@k zU|{=C%e2O14GAmE_9N;yFfP(5tTV zi(5s)n}anzd1*(?YNR+P(u5ia_r>(KDeRr=@2 zU9q}=C)@xz*CknV5m#YYud>V%9KZH|8@^g-W89x6666KCPac+iz7M4u(gW0bQ%S=K zYSQEz(ZGMLmuHNkT9gW9HQi+)2?~B&sf;3KA;fvS^hR9A3n!@qTelc;ZYRnB7E(aK zKlVESsJMW3#sXzebf$dVGXY)5`MxJHt9gF2q#+1tQ?;Sj+b42A^qofrhhOV5E(}@j zQDE|F#7|DmI0WB$DrkmF_l_|*!PxP(3Vy2)3(?S91ZGIOWjjSMg~Z?Hm?3x`a3K+y zN!SVwdTrOK7s>=a14?Xqbf(5P>TuI#4k=gRN7dZRmZF>YEnW(0v&2Fp+}p>g_TQJL!fRBcnzXU2%`-Cy2C>cZiJbxgvZfz zTO)`v9FbVocFP3D%S?XocCoI)7}5$3I!6@c>wLAfQC3-PR?-VK7CciVCpz`pgj?o= zGDdeB(IJ6(O$$2?54OhOAxB*5)EiKFoLRRfOV^3cM$P2po zTvAdt%UW)Ndgy}(6Ock!G*drYQAI(JeG&4It&tvw>B}^$Y*zIXa{{QQHODXm4W|e3 z$I7;|T zqnZxb%33wmP(15Qm-e+Lbaq=iEZwM9sd1T{dGV)Mro^Km?~t|Sd%+H8&1n&#fh*Wg zM@O&{%ZO7EpPEL7)fgHd)-3ILd0Cn_>T3H9yy(?XB05(EnxqAi&_ zACO8vbd}-2g{@+M9P{Z;i{@u3j}C^{@9JSU0rUOx;ug-=5sfvD6aaTKcc40i4{@*> zd_0np`9MDaGc&Q7`(XxRl@MaBuCjgwN$g?kmzF3w8 zQY9SW#AIp}j_s;4&Sw=`%&~;#WqnfuX)kL$e##KaWuw&*sS0P&2#;eT;x_hm``PJ* zs6-KkD!Rx(3sp_&gnl+r^1~4^0hwkz*;KQayR;yd=ECWa7c`|NjHiEQ!8wG7CY5hm ze{xLIiv37uSB(55bt>3^@wDhL_hy->xiP8Mpa#pkxF|^rn&mGmWcU}m$}KZz_Zc$H zQ&fXZEhNxcInzQE6@VmfYy)a^Ve=3+O5qqA7K^}S$fX9#!821Un0fCny@(a2ua>Zn z`%TL_#H}heA6V619~Ym7MmQz2I!3vi<~V(=0mzh?Rd;eaN-|psOdhYtu^CHGIuoe| z=dZ(D*`A5!YQ$`JDu)bAQLwJOYMI_Sp-w*zsvSFAjTGTQzBV*eZJQ=i%nGIX{O}L= z-w^8K;rGA|qA7z9v&OAl=@{SNc9PH>%^zI5AxIO)q)|;<0HUyuw#e7#m-d@e{qs98 zCg_5Wc4A_{fncAqYhEh-DT$|ecEHFN_&THH`Dk&>z{=7E6-*)Sp!9+Nsh}$t#aC9q z(}?aTUOcE`uA4}&=pX}pXpm~%$a8khaRWK~DM#_!S(nSfw=E@GGBKRfW7%VmH>Z!3 z*^=1dN1;ys%-r(Art($TDR8n!J6FZ~w8PYV8&=4b;tg@)Fww&1>1Uo(M- z3R#6VyTYhj!#yBxcowr20u%~}IAATQXo9awPWnp*UIzri2fJa7E3t;PTJ;Lgm* z`X99RZmsDU;`V<~Ey^z-RT70>fx%FKaiDe^rdEQ`m%mw3FLmul&&1&c!sW`x4^yV~ zo93M*Bnl+Y@n2;OjYI=)WeoCHh&|I+|TQva3N;*pw zn<}9XdnMmuDFM3Ujsdf~d%(rh3&0Ym;ItN$eU)T8ZL=()v{p-{Cou=} z8xYikZfp7&>Z)*dmwJ#^S9!lp$+z>pp{XBkEtkHzn2qU#hwlH@1Yv3`7*>i>DS30?G;*bOZHb*5CZ*tHs_`D^Eg{{50t) z4GkBY$J=9>D)=M;K2jj)L2y4o5C(P9jLkH+y3wvemud2V3EYTOB%5ma^7-a}yhPb( zN+nJbk9-3Yle*R=UUA7SFw%5#zpg`N7j6TMClix`Ah)Zl&QmB##aDIsT2&eMgIG(t z^;F^p#GTp$B*oNMO`@rQYc|9jGsu6^uqYx3pl0=UI%68T(qFUq<98sSqOK0_sunUs zKNk4->)F0}6z1u=EBMn};cfG~(E1yQ$#;iUjF6?DfQ@i1@~^riWP0L@=mtJ4adcn{ zb4k2@PNuP7A~_P#cM^g$5px}T8Eoz7 z*=*y|3S4`+VGPP>tBm>JiNow%y)TDs^-=+x78Jc&6D`!d;Dq?WhL|F!z_OGg!%irj zBUbe0T%5(rXdD!T1m3!HS!a| z#A6`=NSK#|&x=cx?}##tiQNVBm>Q^e;+p$(j$vNJBRs;UGX!bhj%dE2o3*3aKox}b|Jo9~FG!8oIFh z2^yEmS4ph8hSlbAu0C8rop}L_GYo0Y9By*PnB)5d6NsH#Cu%#@;uUD%+BQ`3EGKMR zk!uHPyNJDo7())ifb2HZ0ym#OU?xbk!ux?fQccptW52}F2vznAT_$xr?sR7EM1jjF zw7H8-3GO~O7~&&6{qpZL5TMp0FtlcbO)8B^uuXR@m(I6Eb;kNKxaOP93`IIr@^pm* z)XO6lxmjZ`b();sON6oqi<-i~_8Sows{y(QmBLLjNr@BSk}Kg}$I9w@#iqclNZZbD z7>x#Ai@EbcI-X^3n^@Dqx41p*807^;Dyh{R%SKnXBov|8Y@W&7+o{R$JB*6TahSOg7~l7BoaJ*+w5f?QT~ zx&Vt16)r_Y>Ld{wf_3Uw1t<~Jf&ja4Ue@}zjVU5c$-@WxFG*rH5UV4GgCVMkk?H2J z{;VU=^7|xyHWxb9KENpg(u>QF7??WEh^+m*ee}KUZaD6{>opws5#(W8+O@Xd9mDoA zzJB+0r-D)JYv>!rIf9BDQ&NwF`1JAD_{)=K(U3a z70M&N5Sk}MYQwAskW(U?u@I>($u=trH~6sT1% z;wn%WY20H3&Su#-cgxfPbPd1|1Q^P&w*nn2Zz6ipS;LaXOOfd-Xs_%Xa(F<%Ff=-3 zBNvm?!ge+mf(P}45q*v4!+Sd}qPN^N)^0)}qEX3Z-ucOL)t;0gB`6GE-Pl#Q<4iAA z1@g~ zk1irl&}rT5nS=fNd(G#ug?bsNjU{U0Rcu4!p_`E|?p=JxIk}GzxAFRLEK(1@=-?oT znC44I*z&5gKi?Oi46@gLPkh`&A_yDmI)u1U+S`#pf_F%XSDZjMSglin14-km!r|C z&;`~d)M4bW9yK>dNC#QfXY%i-|3&>p-W^vn>k2&PHiH_Y0#5DQ90 z$w2kFU{`4=Zj>Kmz@oO!Du13*F-@5l-+8(bYp+K&u-?pEC?Z#*?`(Xy!c7!fHw|HV zRk?1|^SPV9?`bka9B!D|?&L+i4ti!R@8d>9dG8J`&z$?h#Ek36pCvAiBl=72z5UKV zU+O@Ra64_t24>MVFmKpfETvOyCn)1`boUNOdzok*WtMyvm)bw;{$>n#l2B>BrRDPHWGjL$G>KW%58 z4%ejabG3uCOX^m9N2KnoY*2*t0ZEcvyIVi#O>4d!ieIPi@G#6~^?phw7$vL-Vr0sB z#lZZ~EimiQ;D*IaZRbit2pj!;(_R5m-^n+x%lWTDdDr}nY}0G28)PQHWF<$E?pbtS zmdPn7Y@um|)-I42jvgt~pbF7q4N`g{hR$eIYK&_6b0oA1&pb^WIP#^1_XKSrrsP%A z9{bm|BOJ}WM;O-QUm`!~Q1r1pfmG_bBzAckY1V%bO!;pR;txTXGMv*DG;+b5ldrS}-e-PJiHP><+^CF9kr7~qa{d5FLBWxnCA9XG#(rhor zRrxb~@GH@~Ka(RD6#had);jQ4s(yvI=(cl~eCY91{SNel6Rw-kIbuyGXhK;S`7kPQ z@UQXZ5wK`WaP)6m;ZE#cYG=O^1%*7fG%1$s^Z)Mq!cC|E|F^k>`F~2nGBL4o{NE&O zx29C=Q48Wf*zXxU3oY7iUmiT5A#l%nx>nqvrN?IK+n)BrtCEQ7J*n%gHIvm93yFep zy?Sgd-o|yTj2-vSq87l{W^3#2{W2S^WW$JEuic7R&+qEX>vigN zZS5vJe~HX3)wP6Oty>1P>@{M`>L$PL%l2Ro_E*3E>%TATc-?oHvGGF_Fb=3)Mr|vs{MX z-Mk34vBaF|Yu~W}uh032Sj_-6vr!6f_scq5}fmG%!SYeZcKEa|u&r@93nQ zH4zQ+gPRqcU^Y_p^{jo0D|N%s67UgaG`EqYZA65!>eoc>9&`$u2lxfV%z?O=I)TTp ztdBD;u}P>|3}kD$$~z6~qMCYRDWb2Ef{RCmGe-TBbY2++c?Ak+E^<>i%$Bj%*wwWA zAN{A#0HdB`|8!=KYxIl<8d-;)9)s&Qtw-Itjb}(tz<8P~q!p{QTMe)r+Wk7Gq6tw-MYK%vC~wM{%t9D< z3tdA~_2@L%H-ap@CV2yy1U@dD|pwsJzy*n`l*d?e|{1err!;LV{> z#VO3lBGJ}p9M1!-62Ae~U1U`MN`&htPg!82Oyt*lYFi1I+MLGu6NfN@Ts*kh^9;!|Sow0xU}yrtj(_sP_v?R>K#+7jLnwu9l4A8OuaZv79 zNYS?0!{4ej(7wYksKUnS-vzvC_i+}xTxH1^Q+~lMOJY_)ijMx!j59Hh@-e>t5hVpY zEM@5sksXBZH{i&JuDeuV$-6ts->u$9;;D0k_-Kb)Cyt_Xr8*C9G&5lgFh~bdFPV~W zVj=#Ny#T~jjHMl-X@V!NVk74=aqw8wBt7+WA`To!T#hnAJ0*CPA`L9$9gC{2^RXM4 zoE1|tm#rv!mJjGi?Id!xB^xvpvJrd^>Re)+M5vyus{+$*)0y5$7E=s?i0-Oya&*k_ zc)AX5HqKI5=@Vjtt1#vXgq?5H5hHwax)dU`!^TBp{*K#3Pb({)3&DG4_-haaRb@WW zQ-9quq^4EKGn9{w*%Rg7`huBSHiXQXUPub*F}sZ8l|3{gaf{hAL+fG6X3!J%EbS|a z=iwt6DZ&G?oBknYQ-JwVqg~Tnc66Xc*#Tzutp1|EmGQze|H}oYO{bfys;q%3I$QLI z%7-ME2u8BRKb7%%Qc@eRI}hBViav8hb~`Q%`t1nkUiq1B0cp{@to&^uhVNyJ3q-OS zc3u5e$dqkPK<3WL4_gDGwTJFpqgWvvA%|O8=g%w92xZbi0pJt)T3r1E$magf!R9La z+O&Y|6&UT&=ei8={fZ^mtK0s1YWK$cbQ_bZmCK9#T&j;lsuOMD&xAchAr0!ISZxcY z4Pz5!V<%pyaoJ!#=7)`R8o?;&(`TX3@2G>}da~;VJ=I`I+Z*9*XB{Z>xIhuhMI0oy?l`noRnul0RIDa6ZSK2G#FnBQ4D7pxB;oQ|Q3a|cPias3;N|Hs%jwF$Ou z$yVC7ZQHhO+qP}nsj0pW$VKJ%I^7RZ z-qCto7e^da^s#%yo1>lq+%Gc-D4)Y7tAS#(9JTjkd#vibTm?upHEH}7jpv{U<(WZg zw-4~|hpx@K31+lEWF3iM(N>n(QaH;2R+tdjs}GwA`_u?n!9Q0p?q`H z#N-Q6FkqHWuF3dQT;T8v)GaU#Eh8P@aggG3@stKx#>hLtes69=|rs!oK1vHjO>g}=%h_- z&795g8QAGr|1UGz{$WNxH$puxKg=kdAk0p`J`7OCe`n#Q`plra!N~&lyx6aoX|UCJ z+_e?TI7qloIAPFkXK-G2my|`~vy>F>RZo^q@BSP~S5LKfmlT2f^*m2Pf~YHQQ2_nA zq&CS_^H&Ql~2TI7|Tw|WtAK*SJ7H}i$kppVo*>E5NuOmT@ zxgmC90QKci_zbb&Z;#u7b4E_Xhc5kx1!U)hbKC0m?j$Ym6~XQ*l)ZlA?0wgc4q}ECH{%)FNR>V%_KZ zE{UTIKMm6aGIKYVqwY87L0Y-e;02(F^&I zC{i^yBv3F-NU9D@9*mf%+hK9_Xql?`gk_dD!}d)xjbI2sk!UKqq*;*niE$=nZ!q=4 z(uMTWYe7ea@|v~q1^vB<2sC`?Ho)Y2bB2}W$|><3TP1aK7~NU~LRr@_igYmx!Ujd1 z=2yo(nBA`9q~MGZ5#4aK0Rj_y!OtNe`FCt_e`IFICi(-5F$$&$v#b;BIFj<5>yNQD zEv$8C%cshs&u6D4Y9%Vp0t)R!#XDc^6@ub9aLn-|n$pJK zuG^YhYRGKAI6olD>7N6D5tvJO54(OWO$pUqxoH$sflpW_GRmH{6%3koz}nF=mzgJf z)xIVeNdiFN5U%>Ha60>_M7DGLf-r}%T^WE>U5zX?HSUGhq<8_1MEiWD@-=ngkQ=4) zx|YPT#SCp>2WYS6-MC2O0swQ+e7A2eMCi1LDBXQszYC;Bn#=TEm{%!?4nGJGW?h=( zu2NtD@{e@X?Ub!W8tOYzK}>=N1FlZ11kqFBM$*HSrIQ^;I|uACX2maJn~AZV=P2pK zqtvN=azMI^QC7^c@~#!Suj<^oC26c`m)#{qvY*nR3x|smW)9W>3p`|gt1KIC#D>7N zlx6csOo`_Wk=P+9TkFp+F;N>KDzwD+6JiRzuc_!o49A}uca&W>Un(Dm zIq1xHo26Loo`c(jY?$AZpM~8eg}KgPXd3yrmp?7kr)nDu4q+8?k|>}PL0W+d0P8DVPX>?+MqrJrpHwHVq?ywaW@eD);RP4HR^;?6~57= zUC((AZz&gR<&A_Cl@0_+`gW$51CO*6-hu*(`#8rN2dV-;=g*Y%H_l{9$zLCCi(6!#aSa zXhN}Vnc7YIicMIi_3h627gBJ@a{Db83a_egNlW((jc>2)AD(5;xn9!u9fe4vbdSQI z``smjUMHI~e~423Y%S`ezDlJS-ASl6F(RI0kxLUTqLLS-KzY~=YQzrB#@<8M*!Kr>E9 z6(pAgJz5i-Ao(j)T*$H&$X`x=8%zo)*d@lRXOYs;pe(C@=U@fa+Jxz})TBL6=&i6c*b*%ipx(Lqh(;SsKHI=g(J=&1)Fj#63 zYwonTmYY5%8tPCkCvtMUtG5}!V+CzZYc@k|BTCCs-8;Mbt1CV4Uf|;wT4{2j-faMOOf(` zcLbC=_k9h&{pWsrUT>=Ecp$<2vE#oUufCLc$?w?*& zmVeh;P0#V)o@R~7SS>c_|Gm5=QIx~KBjnf0@66vp(RpQ9lxZBJ?A24OrFxrSb1-Eb zGm6(Gp zq3!cal)_DM0@TyLXY<`hPE>N<%2^V_Gvo=~6C}>}&LfqTjE9w2 zs=F$ekVx3tgF$2;@_AUNIb;tSr9XxpPT@Kwy!R)qL9h76cYDKP1+IAqO4A)vuDJjWhCCz zUf!lv6pp9tL(+QqXvCo=VQ>5}@5MVP>{XuNu;PN9GaY4fGgHhNJg84DCATs0`- zw=#LYI2RAANBq|lf;PJ7Mf0{R-O`tu?NTV1RY+6})%VA55v~lZye^yCt;^0fzc){2 zgMzC3HHs^`k99czEJ+!CZ{r<+6rdzE39jBPIYIUO&#Le z`EFS74T7hfoV!!gI-bDt{7F2Nv56oTTsLqrsV8*p9YZ860yeEHFPnZ3*QG#|W`(4u zJf6^jDShLrGJDCpex8a*J(<6BMf({Xjn_4bS46PF`yRleF`y>K-_E~*>d-e zhUxhu;C1!WYkB@wMJx!I@Ms1-KQYMpHhe+J$y%uOIoP|9OvtL3@xItOIcY9elYO{^ zR4ws?rP*+g86p6Wo?IvkomkJV2=cu=Q}Uifzs4AJpy&{Z^G}9~aS)z>#G$BfasiA* zvvc+Gb@1{F*JIt5RG8;xvYb@1vkc#U8~eKy?SdyxuTMvru#webj+AJdWdtpeG=r0L zX%gdtl$BqDghP`beF1v4@gt^^5aB z00m6%br#itB3_r+)~s|bq8s^*W|*$5P0WNk8%;-*^V8#fU-6XH{kOGx(>n!cTGikY z@;#FQq7*i#)A8uUU!>A=CEm-gS2E2%Hs6EguCKS<3bFWi269)}KP^bt-zJM3M-yM$ zKUE4UPZ*c~2uAA>hvJ`7yaGWFEl$XhZRg8pS=d8S3H{Yb3HXKad{5Q=C9rxr{gt&qA*lS9 z(yAMFz9PsKeMv0@mszmp#|^J{(fxj1wbS!Bfte%Ia^X#;h#)@k+ZA>B?fqpQ{g)B8 z4#6TwX;AaXoV_?%xN}@T`mHROhd?eH$6R6Wp&DxW3%5*r+=zO|R(&4x6k|5^!?glqOJ{GgFpnp(d!2ih zM0Z&I8m`4#Q8pi&@0T&p^1m&fM7Xqd8JOjg2aqxcumCvD-m%DF}r5qtcsjW2XG z`5q`i$0)(Vs`FRiRbgWOA(#|9OxjVx<`m~jd0vGia3HIWVJv*Oo5jRzRHwmi778** zJvk;XhSbXqws06MG*^|yvChke7VR@TKx$A~kP>0=B~=9Y$5zHCeRtWamVBAWYon^Cnz~7?ktv<)m?#zl6oS}l9BV#_o z?ags~=y5!u9m^v*(?2!u$MZ2B9dfJ3aLfvIe)cyknVwH-3(e3;6)d&%A_d9f-ldk| z({js)*?RID2N6m7$pT)7n|^J-8RNDmpd|D*rD`aI*~V9pIb`#;f5@WIDuod#lSeqv zB%~+_UTb9IGe+cCNF|lHwu!apHn16St+k8tr6q>?D?v`g(Z)kUd~$dtw|J#)x7)@|k(`<5 z_a=<87N@1_{(?Y@htFwX)z!L4{1f1e`J;YT$l^O`=(57QQiA4Tn`YHaelqs|sao4N?m z!%0jSlXaM;oGanNxta{sY-kRjKnclWZ08V|PC1>t(NLc*q+$HReW2d6ipm}Cs%}Om z+9DNgagE~ur@V8jceS9YvLQ86cAklBZtoQfL9WEnz(#w>$)#nYE5>U$H1UW?M2@LE zevw5kwJKyD5dkLPn&)OynYN#JKh;1?ODODi)Ca9eE2AM&HPk#H zzphV2YX%!n9IiixdL`^&=gy8e4m$YUl293Nr%F)mZ|fvZgqKYeZ_X#8AUE4qg;Xfi zqY4{XDcDoCXNFGxq~=fs1SKD>2&X(jXiV{62OnXI!V-i*E;nAyg}BS!tXjURO2RF8 zNn}1tvD##6&JR^BPkgxPxSp@PvW0y+Xfe{98=*ee9jFK*wtB~Gby}*OBwoA3k8SYf zXu0q$-12Q|LB7`%9eQSOac*`bSMB+OzE#_zD`099QXx)W`AYwkOp{r2vPbctnZDX8 zL-g5mqS3| zQUWAUz$JLC!cYcZ?~`l_s8b|1ADOvPaHL$8>7BSL8cNvk0KYR=H^E*hp&^H8)A~)T)VLRTC-8TB>W3Nyo|aSXDAa z(@d>O!VIadR0wd+KBL|#iu={n79curWC+JMG6*g{8+q}PC6O#9R6KX6Jx^;2J_j&R z2G(a1`;c}9KwHy0da&xafNz@bdl5Sj2(;M zGn$m#OBl;=NNJZLG%iT~DZw+cd)8 zW2*)e4H%gUw3;9MB2&563Nz{vg*&L8~xN-+*(w+gff``hec2n*h|Pr5gte}43u zhwk@z@!1Oxg@}uoHYK=2NFG~Vvy2-xMrq`gp&Jy7;}5Hr5XJ_UYYnLP;5zS^hg$;|I5~*#3jt z?_fjm!#LTRJ@to`Z8CanJC%$KTVWWLvUgn77S!ns0Iv z*h)2u?u3P3uy{qmM7*~T?w+M4?5kG}xV}%eo%1`1{G)PBBb44sPYsL#!LuM-TY5kc z#N4kqldrV1#b(!!UC{cK5Oq-=H~cUp=Zn=gKLr{SM(&16T>tLGKSYi=+2Ul$(*ty`G$sqCLgf?S> zD@PgU985dRO(Po>1#pC%yH@I=Ggjy+cLMdHdLv|gwXeZ2(b|w%hG#D?&-c5CH1%L* z_~7C6gW}Nhx)H@fBN7its2VS4M)vYt8B^~W%6Lv=Z|TJB@T|d>s@3Ds^Qfzh!(Zs2 zoP(lPG6|iN6Kwp`RkWQ`pwjTD@-)Tsf%i5_wM8hJXwepOV-L5#ed8yVh{jLLZ;gVD z0+pqmV;CN`Glf8=tWb`6iu;otS&I8w3>5Aqv!H*klcUyzLr6wrh!tS@Ny0${8(YDX zZ9HPhN;;|j;!Brd1_uf-Dyp0=yMpu1qo)O}xfBMTgTz z^-h}*uVbt3GTv*w;|{;_=s_1u9@zMvYF1bWln)vS7Ch*QmsiZ?U4af|Dv%!rNJnHb zmSoA(tC-SEF@)Oe3N(8S1-H~x&_!p7Dt*jiWPT?ZcGecP$0^__Ie}dC4iF{aW|0X; z;`RVT)WJ3ciiI7CL%ivS0BhkoUV`>jN{2J7_~_O~IC(dj@pJ8dUO10>bXYMx9n?3t ztbP^XtiC>3#{a82{YP8_vl#q%np)~{8iJh=?ki^>)G7AB%Sm^N^pp-FyI-s*&iohf zxqzO5zpGQ*@UNg(PnmGF)alI{$lW-FKBznUgUG&L6a|;D*(Qo@!}5cv-32ujoosqI zh*@DCZ`hX$BHbrAgmaqgR_~yYa4tB>9<7kt!W*j_DjMTkH60Zu^~C8%Vo~%slf9*H zeZ##89pZ1W!{0O{oJQjTiQB>w+%a*Ao#4j5!=IwG@fk7(vOi z{B3hLqu!#oV*?|C6LkgC2UD3?g^wAoeiVQckv_eFo*3ADwggE|mu)4w5r$+g{8OAB zscrH78STA>G%kcfL3&zzJAa|Rr2eG0&&`-$g)#ln?*ZB!Q{tq$nxo~dYJdZ|#s?BP z>Xzn0qg_oDQ<3>%bf7#Ij)%=*L@zMz+bXX{q|9V>uK37aIlyr#EJR~m8f1Gi6%$kC z2nt=Hmh|9F3s)B1ieRVZo9_67Rj0bUZeQz(RUVRBvYHh(bCI)h5Tw}bxaQpyyz0HF zG~;0N2&^f=WXjQXW$D%4LJ#HETD=Nm_bWKU0Y4u)haz(Xv>;k@+~7psY1L)=Wcjzn z+zWTzC*2NfPiZ_R&6H;U93SL48*P!QLL+$<=l&*5(P`m<7=h26AY}}_YJrkxpKv)v zUWfN;l@J*eWKDD8N=dJXUnl1U_Li1dez3qbqqFRF)5^Y(^TiIQXTcUdl-{vj z{AJHxow+5`DLSAEj=y4KAUlKuK1Ic=_8PdNs*-2-jG zzos51;2`dmtK6T|2c7maz3cny>HayT*86Z-JN+^1HW(IXN-rv6WzgnzvYa&UjS|** zAJ@2YBVdK~`lW026S|^grCV|z_;4foJwx<>vKB=`X z5PfMrp?a25(t*OG>Vn)+Dx$v!oXoszx%CwgMyJ7 zGJ3QX7Uyu23Q$Te3EQZZOTtqRB91YJ8O5*OkH{R-Rc>vUS1IJOc;ea~q-&*g2rFj$ zmd`#GqsE16ffC(4PQ)>M1W}u~`8XhQ49}`7j$Z3WBMGcVa&SE1TFKzoGFO4PZbz9Q z!Ade&45;Q%XTZy%BL$~EAFF6`td9G@Lbh+*A1Rz(WIk1%m>lt>*dR%*Wu#LeVwG(b zft<48jMW({g?^|>hND4ExBb{La$Gqa6H{c?5MybFm3D;XEr*BO&?8JkCiw-uaut%; z?T`{h5mdJ$P_=?%>1vFI*FpAccryfsHR0uV7oW2noCB&wc#0Vy?`c?%KAXm_zk zd9{S`P`wx*_$r{VNF^qBT zLJrL>|1K?VPp&1Bj7d2rX-qcv_XqF2rJLr6zjp2BUrKkh5@E1e?ra?GGn7exZ*$j+ zBS6&Fa_T2M2KA(yRX5}X?c~87G&f9Gt1bncVamv@>;`XS{f~N6=bPJPl>34_aNRUG zBe^br+oN64bGqemkRuWFK|r!GNb;RcZ7+0r%34lk@dq>t(ys5Hj|T_W?29npdu}$8 z3ox42M4?UqEe=WOpki*XP?^ze?OlC$p(fDtUFD8V&y26Ma;<`_suoT6_vL~Q1X8srje4GMQ<;+R$T*3x-YsUBYsLY3h z&f`K<3H8t2LOqu8^wmr5I5=48qBA{*@j2R3dFTLisAAZuF=MhebEITLp$<&c8**D4*-<%pnQDbu?ad-_%VD7=_|zWZ7>u5rr=9t1+rzg|ZgUoV{z zAc0Wqmxve2yE_UV@oTIl>90k(zknPX)++yqxh((6pTWTKU(VHQb*Z>5*8gDc8Jv28 zxB{F$Ll~fq|5o7Ck3qxCv^DJ{Ug_IcoX6UOT8?bpdLHnnIg}_0dH2)2l5T=>&`%X) z&#!PM&*M3_wwLuqFYaRdwybJ?oVYS}_R~2Lg~X-n^Ikui4?`&7Htsla7Z{9`F|>6a z>(Kw!n`0-?j5KI4ZxqhkzJn9Jt7Hxq^rQ$%DQh66v?27-fDpeR94h5-GWX4wa>;5! zlz^-MJ|m*G^mm4NaycCji~jm_a@HgFy~cT_*pb=0a?_6G<`sdK8=F~^4o6{5Ycm2|V+As_|S{Mk6Z;*?kNc z_<`Ad5|^|`Km*=*6wGW??*q?0s=yJA+YOQeJAFicX^2o&3VY`T079;xS*@#UA`zvl z=+Q*@^i0P_>!N3A$q@^wxrt;k_dYeRNmLh_jZ}w8g0yXf3CcUZDi__z4cd%BWNyVY z)Ubh|u!m*TI^z3#QAt+qF?i{LY4$cn@?BlBywuFqnS8mlpQ#mGMj@*FzB#hNJb50Y z(@rwOqqe5NjJM9*Ws;OE(!C)wX3R0}IDunz$}xUxgWf_pB^Jpntin_Y`;?;2h> zhnDMo>x8E51aP$o5*-hWCv!HgtCfIsu7rfNI4^}Ulu z2&T;{WQnNOL#cc;;rzxx2fO8FxOGq|HtwSG9x&T}J)GPP2~ZIL*v3nHuH^;qi7^E> z6&(KGA$lffL9m$oHDDJpM$4Hucd2UO4W%t}mKE^utaUdEVi*c4LYmoI3I+qmjeZqC zHXTQg&%5S{y2}DU^v|RKgOTsB(nuGWZW+YCn-YLUPC<4&Ei^CmD~Yb$BGU2kSiG^L z5D7vONg9+Yq*3hY)WOOlX-&=<3KT(5K?FkS)#kwTPQCVf{zINlVHP)KlUO%>=xtu= zbK$n!&c;~n6A=(BSaW5m7(-w%>B_AbkX4*Z*@jdt0G=LmsAXoi2^G?)Fy)Yrja%cq zPfGnXO&fVw-vHI35Mitr`lrEGlUVt&LlBJK_XF&$qHs~6*UzM0d*wG7+-}=|UeSPV z_2c!;aoU(p7}k|cSK?dT+|x!&UuV`o8DfUPGvPwiN1(U*AfYN}`GFHNFNI8S{Mt<~ zzZ>W4vFIa3J^H+A-dL9|c*Fllcn!sn*8b$XOmeaFNq40gIeC+q_tYYO`;5Wffv(eq zSxqtiO!RNMjVgRs%n%leFk0;9)>`9N^g82%eRPRAl`Wf&FH!rwIw?Rsa8;|361C=0aa{+o>tMM zOQ>xEG_i$$S-^L`xAe3?OsJ)fhvge(lht8oTK$RZ^#*da!SVVh)MNj5sK?Cq-%L|| zJeG(J`e(s#0ahix1k3CV9uFPAN!$a%;XX~`l&<~oK|rFQs50*A#og}=6l6O{nirHh+Ox(&KK`ohe6P>Gi;TU*m;9mJ&gD65OSG@90zrw5&%x|$=lLUXAQ<0Ql(6G~1dB~J0_WNJVo?qv=LqM+ z%a7BJ0cqn;mlV}?)4i_w=vL6qfw*bP*wp|kw}5PX#x*I=ned;pGxju4o%h)16plZi z((hEKAs|OS>yKNgNT5?n10hf1y+|wD=hgKsd_Hq$0tI|N80{XOnix1UV6K)~IGC}) zoVWuVUjxp=PE;0s+<>lJx3*wRaQ$m;sFo~qX#%?lDLnG$^ ztlt^4(UO(PIECPfaBrX9Gq8V^CS;khIahfueB};rnPQL%s!)F=4@N^>-&+DU3Tn!6 zI|CNsklAmHg6_vu%ZjygLpyTFxM;GQ7nmR2=tFBuT`COKCN4uj!wvY?=qHbA>5FHg zRrza9Q#W{U5}2fhip*S|gWzuzzJ@afO-RrQxX_$8Cp&YUQ<#M$PUG(4cf+isrPx>0 z*K+TWqcFPz$ifIxop8XG4{m}hI}0x4A+N$L}lC{FRYWlg00HW|a}GfA~qEmIGI#@0ccZvUMa**;KM!R#2v80S#Lw^Z2Tg6U1qi1?jQNFPV>Mo_0;@ z{#ev$rb6Ud6ZHi#IW~=i836{a-NPpke8eV2xYoBJX`pnw*9!N1%2zB!Pxn_I59?F0 zUiowqaJrp1QpzB!D(h)FOvIbW!ji&OVWb^D+d_c4)1WEDz9l~Pd9Haz1>3Vibo-hZ z$plFK)}6X29@f0|6%+t0T0OIUhmAEC$eXl9wdx&qFHY|cmo?BQh;=S~Q!s`tiZb;= zzJk+zFf~HgDC{TFU5Ix4X6+z~ky^HbCN5;)whs+@#oPNlBW*s8e@E&Zp?CKCi?OnG z&S@K{ZL4U#d{l)OrQyI|oP(4RE zfBPjrkpHrZ%??1_PUNqGC`ID6tW=tYhB$vNr1c=LRW)+X<}WKg5tFq7Pq1A(opU(; z2-6PT1#{A_CN8esP@QvR3tBgWSFiwac;c zCIlyC`WWa(sMx7|{dw%OwGaenAr#5}ESW^r!0^2e!D7)HQ?}PkX$y|FNDCc z-%IK%2JN4RaDM^3LzA}u@g?|Ii4qL-{~!O=kg>z!fbPDnox`i6Oh6<72!VsTqMg&K z@1gmlKPo|YT~PY?Cgq&vT+i(~qU;j_|f)6~r36=yzhl zD-o1uS&Y8yc9-wKY~Lv?>;LvQ;BZ zBWfpR8^z4`<(nrh)iqW~+pK;#*w!Eel#5s0R}1x}y0m!$LCvtuLPz*g);2;2mCuAI z^qiV(7;aFoZMwPqK7`u@Wa^!h&+&pwq`@k}()Fhi;*qpsgmsI}C`;_uT_zXqOTRQ^!%c>YJuT8!q>B1q)07kl z+f+nKyMWBW+QvFzZH{%k3s>oLaC51P^yacc2O2BKK`|1Sjnj(|# zzM=~UrNf-oiDt0WDatZY3)nD9D9>=M*% zdui8Gl9S(YA~9dAz|ek!?h2ZoGcaD_q0AE*qv|S}GKk91!k)k4^p=~-s3VV(i1}Gu z$5k{d03kV^V%tjy`npMQ+5_c;)>y%Ql=Ow}SRF1%SyU4n0JXl+uin^nY|`UT8X};g zFa3PW4R-b$!d{g(j@}sQP!xge@*tw4e2oj%cSM-i=HqdkO$5EUdNJ3|kXlcjho82c zWvwz1CMFBa7Sz~gqxQ5S8@lJUdHk63LmMt;X(Za!!lwuY>0BpB(m3bGt$bfc>?O5G zxrCd29-7fY>pc&ypUUeeHtrvmMOj-VpYQOm%)mmNzPonq;7&PXxDt9!-J0Bj9;=>D zjun?hbh~bu&bsI4tA_zj?X860>vicDr58Fau|bPNmHkJPr4!hHEBV%sZ;$nzJG4G4 zt=D4-CJMx^!?6sa7rnxrW&O^-zgzzTG(FrQ{}Uo{F#M~DoRR&%Ci3GSZhFM}A8z^y zRGc8J2qk|eC1{XAdcN1TdZkH4@Jf40Psf7KN`eHy7f&I^uI}CL>5^Uo1HI;SvcK&jzSCW_eGqwIM9;D6s z<$Lbv<2Y^63~UEq&WRIVi#Bpk>9#$qz?xfVc9|R#1kJWVmKSSswYz+^haL`Bq(Cxd z6O{C7^Hq;2iJmP2LEed}aDz<`$f;{fpfI;r{J>Fy>H5@>{&Rr-i&B(34I^6E>|U$i zT1|hP@7Ky|+gRqlHnpJCFUiRyTp17aZ0j%fHl=Zrb)5&OMUe+rf38K_K7!R`X4=#PnY3OYI8L*6%w8J>|@p(7tCt%TXfUdjymysC3>tjt^UT z)@QCG#l0q=Q1ybm$@Z(k$Z`4z8~JPe22u`B@PxW-!USswFLFVHau&!AZeevi!y|AF zY*Mi|=^iqOU_qeFmY-H2(s4-WTIzzh>Y=Wm$QdP=oAT)O6d;f4O6FNh5`{A#9wo8r z8=qx34_DpUbP==0P`%k(jZCNsnvPJt360&8XUyws#>>`Mh4AO8+ zM9?wz#G#1;?6Iy<&J_u~v*T`5iVc>V1q9i{2F7@7@UAObq>+`LKBK=IRZWWF^p-1}TN$uU_Xn=u&3CU&vDAt2VLMVL z&|$~rCF9(v;-&T5G0dr3gGW_K5QWLYut{=T%r8Y$D%Va6nyN^3C8Cd{A=4rh@N^WU z?W>q*a4v{NGiDmju-6^mGO7ZBbP zm^Vjst4oAX8eH`|N}NVBB03p2P3Ko4+izL=MrR&R+9C4zTj zLAe-o*dZcGYOrxh>^M@HBm8??HZU2IEk`);6OIewo+ZAXz*+Coepd}GzI51J5tA9N z;*p?87nbULTJnfY<=2>Pm@ zSiXKclhtMaBz6F}6CW`V4ZPZcwrG7WYfGZX?X-Cg180ONY}&EHxR7QSe|0B0{LL-x z(WS8ZiRUG)?jL6Csz3WuFtu5*W%;j9?r#0vBKgj@a>zr$f8g^!G9g#ona|ufv;9h2 z&3ldQn5I97o7ivy9o5L_IIy*|{NDHNUIShh{sB)p82+8A#LCR^e^sSpO&Pnx9~0Pr zHk`pEX0IgpcLn^N{C1lss!#Bn4s_dte-?UoF%pFmQn5EDHe@u3LrJ2J;%}$1U@2hr zz?jV6nS_45uMXZoZTtM5#cRC9%MHEt8|XJ@xtNER1ABiCxZPsszV`E4+OTVORj|T7 z-#E4c!=fx=;SsHE26-=uD;BfQH>`X6IybX)=e9)eaumP>tvLUqta-Z8HvLk!$<1!B zO(~9IYO6vW-g!+jJjz_?+-4P&CBbIh z8V@x?&{`BTG4J!0*&9b08a}jlU8+k3-Qkr{9q)2GZ?Jao^s1)jnes4MgpWHo|E$s- zwTYVy%T`&okvdXo6h?R?o1rla41B9uI~gXn0M#W7V&sWO(E+QiWxJU-gA(foj=vg) zPRRx|Sf?K~zRl~L6JVErzsd9 zr4$VALFo%2>NTNQgTHL&^0ugjory)yh!;~33e0f3d1ZE#ByL)XfQq@>i9?Y4?y0=l z0z=kzgm;*V9Va2lT{G-L(jmRZbSBt}{fzRVoG8h90) zNHl9y1IrG%v?S;_TfTdB!Ye64UGd?|`(lUIA9?e1|pVrh5R-K1?lcBPj??rjb4YMC=hKlNmGFNQy7DI@hu4IR*; ze-vc)AzOTqEE<(puZXA?rIO5;y%G>~l%+n`HSV_&{3K8D zf?X;LF$=bv5Baxk=}3m$hOwrwmUgl#s`&KifojcoV#u$3PZs>2UHGwLIlkpSmb=cz zI%nGxi*&D8Te=D|c6z7EQs+LW7Y@AMfppC6)!qj$#OJcCd;tGy@hVt+u%5s1@B}hS z0J#qkDS9gZ1`smd)+!V>t9bn2 z+M<_eYbNr(v+h^GtMBpRJ(BQW6`X3JDK{9fum0qMTEvQnas-|^1w1qYu0~FM!x!|S zJAm^*SnIL6X0zKjvNhvaqI|y>G*z`~U|U=WdMQ37va#o|N@2NA`9f%yl}aSvj9MDg*%i{@b>(lWSnEodeW}IXwx6f6a@cTGpRtZ;7T-ZwHgUA0Zmxljy`OkHoiRNw&v@<`OZ3BgMdOMeawb9i^s zZT^)2R~XL}l5beWMY{-fT=IT;`wh?@3)T0J57)n1Qgg8USG(emdD#|=0lNGDwJVY& zZu}bj5$68a46#RYQ_OL+v`bfRf*QwTlMNgSK!h;`EfUGKORg~cBg^sq$Z~pxu5zD$ zQfl>*K1!S4UqMn>I5Uiw-}{zAy4s6YKJcWBK3CAuV)~7tc~Z^5s7x6{)8?5lUT4tm z5wX>QRrywT-4C6c7~HP~H__D>t}`}~Ew)nK)~Zoqv+aj+qh1@hdhDQH(wUsX4Xjnn zD?j!r_3IbO>TlI|>>>+|Fy_rg^gtytC10kiZzG0H!dpBoCGRLZ3ro@v#CFGYjPcg3G%Ggp z&;KTmDvN2h+?OyCelCKSC{5>_uzS|wN&f9JxG|BKOCmIPrWMdnf2>{4s#X<81&-(x zfl-b62I3?_M)!^VzIN<&k!sFHJrD~W*B$Im%TbC6qmY~D6b#18VrD|A5HGMqnu+$qH10E)?qy|Ij1?)vKyoV84O!_8NB(KH4#i#^Mod@FzklYqPuI6aP(lti7KII8MSIOF1K)0^(h$ zIC@RoonQb5?RjZtQKn~EcRh6>iC95w$)jmV zSvvulYDjB?BqysDAya=|;{e$;LP4vFtTrVq3x7ZA2xJ`3Id@x~^^>BhF3@aLR^ZZ!+b(@i z)J=qG`b8C-w`f$Zf)UGB2!9^r(pH12mid`M5V@huoPo_=@$kK5{HuTYQH&jE1yYZc z@eC)ac=OfmApH4)s}k&@k(6*(O`E=Z<)X;{OA3sy3=}wu@p?>l!P6;@(m|l_}-moa0~wN2b}BucBst;9}>Jg+v!mK>tI;#$e>ZkKmPsy zZZXNg^k1~~=c?+*1N$S)Q#}1d-6kTE^!?CQrTo_X9u%IcLl?Sfg3>Nu@vmqzYmb)L zMiDfah5`4Yg0Z-wSBc0s>n?|fSuD^ur;|f6j}Mg%J+;}{5mHcAy=XBzqK0+#0droA zA#(;pufLn0w!GHDN}y0yEh%pU&Z-Z=K$Hq77bIwxMJPrB;BOD z_B|Y(Y3Fa3bmhl(Vjr8apI1gUndOF_6*}o+;-Dhld8huuNQ{U&;8*c@qnS8w`*8Z3 z^=4A*4-`TVcGbvj0Negt6{so!EQO4D_DbBb1j~@L{DAJDC1Y5R-bFM_tIE(!2MGGy zSB@DOc}=_>Epn&sfGk&R19ahvRW%*2>sotTFyzuF9R3G3Dd767@7 z35!&U!7bd-K-^G5@e4BqQBD5n;;nS0YeaLy31_fP=nFQl!(o*dMPPrO_Rc|;K3kM%S5=p7+qP}nwryKow$W8xw!3WGwr$rbO#SA~i@A5^ zz8CkelleuSJSXCdT)A`Y+-o6_p1zYXD07XxfR)4$u-}716|pvOXb$_BF2Y7-%jRCy zO9U&>%nst(Ya+Uy?)0!n&Fq_=Fs`8NF-)Fa|4?o-v^fVYmtIgs6dM|uID1=AmO7V{ zhO~i}+Xfva3!oE~IIdwym?AyC8^3eID6+ujrt2E;6zs@^rt7|j)Xv1#Ty}I#r zOqWF99nHsL>(mc8#mn6GK3voXeqtH@#Y^r7JoOBgtKn7B^B9`qsMbVq48DoQtQCs*hX@c)~BZ}sw#1p zv(ANQB6SsqA+^PVszc^{P~{gS$r1|AtCPvW(z(3R5n4^1>X#BbtgVG8cn90B!nH?T zB2?Ohi_r0jJ=v@t60Q<&k$AV{sd>QG$34gUwv7Mb9>J@wRKRFnKNI_5Dh_3so*#D& z!qGh^mRD>}P2isBFS}vC{iAeC{Fncq`Y(1%Vy)v&5`)x!BxO#Lgh?S$<>kx$yb-Yk zQgJr0ufK4;u+7=4A=q~~?$=s_x+Xw}0wK*)y%UX>t1Zf5@Ww`+6n9QWaCQKROMOV@ z{G{|y(2b=gp*)n}c%Zm3<+tIV<=0+9V!W9AHAobutDt0`a6jK-(jeg*%$-tAu(^%o zIegTgP`>Q_8A=nphL=pSj!yiaDLOkq0KI?gQ$*Kg3kow}`KD{IyqBZcM+wKv2#47{ zQ*gd_S2jS3+PJQRsmHqft zb-a+Zou)YiU@+8#HwTHVy(^cK!|j8yE8klQ1AHzVKB?rp#~zm#pQq#cOQ!7{rbx^% z@bpEz9Mp2>ZaiN1d$s)QQwy3X(vAyYw5W}KSW8}Y>Tx~LSTP+;&ohIj;3_@_bAP_R ztlx|qGmZvh)s3nqVZaDkknJ-D`EYAO%MXJf^QlNnsx8>BiyZ5f9B6Zx})3FBycKo9^-%yXUVAe(-x^x%HDgpNA*`M|e=4c9WeX1%Ti#e7IJg=*< zz8%=NzqSHqcSQuOC12m31uG!JbTZkECrU~}C4V{>4y5}__ZnjLjtZPb-YQ-}JI^^= zf0pU}J=VR~zdV|4)GLTN!?NwP{%W#7@VehsIkJA&;yN=Qljj`KY?GPMGKE?~b6GUY zHx;i6S(#)}u}8Q5scoxR2fs;0I7Ng@_+rbzC}9pTclb5b7HtkB1<}6@lpqsniS)ty z&gXOLGQzWbu9Fzn3)}hQz8>02SFGxxYi^vy-i7A?e4Gk?~4 zv&>8+<`|HDsJT(U?up3Wup1E7QgLFo;aMFAR$$-$RF?Xdy*}3)8sF|BRxkh^n-(Jt zV`#@aF6WOR3UJ8!fnX^1<5vqofVL@|Nl;vrLxly}Ri=0Es-E>9-GQiSQSjdnpJcbd zQ|(Kr_d;#M9VcEBSw&eBS=$iFo~q>-V-&hGc6tVdn?@$G?VgxeP3|+*&0)Q+5$Mgo zmP;B7TaiTLjw0Iu5zAQyuT2BcWTSvhyf`-mdzpL$`l4oIya(y{q*>838YTRMvA&X&aONB5aw$(bhr7Pu z`eQTJvK^Nw=}(OdEFh(eo?X*|P7(_gZH{=WXR7N3)y1m$%=$$3BHYCdL29WcfXF1r zS*t<9D@B)txzf(?KcJ4I&y-m0As8|!C=-x%SeF;gXIFlaVjy%~xqmLtigt6wYYHtG zEqOY5g_8!tFWR|x_8s1Pr@lUR(+?{}{QNA+6Whg&$xbmawhm|0F=NnYc`m5hyjjey zN%?Piabq|GBE~JE4!}6Qv14LpEM*@$qO#p_VmpQ6{D0*nY-Q&pT;=3Kddf|%0A|}H zEEl$fC!P3UKIWOT*-AC@I|zghXo&`{-&e6<_N_BC^FSTbgt^l>2k{Gz2Kmj^>`@fG z!wHy2*5z!n_>!0_OZ;C?^?$%6#s5bb`>#Yjzf;5iF0!G~8oMusF!}NAV`Srw>k9+| z3T6W`g{Ef4F~isp!M-xmeO=BsAeISm~AR5hEW3_Fhr5~NwZNcHD6bK+lbBMbtplMJ`PIWickHVt*rjAM8mms z+~=63hj_l()iwn%^>hrfJ!X@?RsUxX$c*U}c zSl*@!#zK_Z$t#QTk4nnEjO-Db$+PPRFGM}Y3~F3;8S7go7eRQdF4L75G)TIduKh&j zy3z2Og~a(9e<&fFD=}6aaa9N=Cp`^g+MEHIi>FAos&t%Uyb-*nnQ%vpH9@MUpPZxN+@%Z`!zXD3^ z;Z}vRbEmNmH|N={E1cfrkL~3ovtgN=u}?RVThe+V)9erMzaXx1rfk#S)+F5-HkdVC zti@qe{Xqt#5eFiLpnhF^Ei>vUi18(#U=p}{BFBTs1a?#+&~GcT0^!c0VnI0tuRB~- z>!9CMYt#3(D|oV)09v`noP%6%im`WOF^?29aWz4%t*-WWV1p9;xIMym@arw^Td^y_ zea<#`0h>N{>|{CQW)O^P$y`%s11T!>1KsZr_?CevV*e40{yQB#29|%nvG@-g#Q9H2 z7T-lf$ateQ#TX~)lU2QUHy*jkO;{{F)Ac!{9_*q zWyi^(La@jcE!TWt0h+HK zG5ByP`XAzUb$Vh{v5XXoUX@y@xnLa2c}neJc(~uk6xO+!%A8RI#D9({wV9*?5hXfS z2m4b#%xsLcuiG9X=N;@>5@^Vo=D`wdB|McrtY4Y(O&0x)f1%7#QkHYk7ztWD4!?I>f_>ROdBO7+SI~iFc1KL#9OG3qbkcFCc!X9RP zT-RZVU^)xzUl=YMs9zu9Dpy!t|I*8LJPvtdiU7T7^qGtfH?=n6A0-r1SVbJ z+O3DJ7n8a=#~Ty9i}v=tdZHt)YAgETeAQOg3>_UqJ4!2f2Kk$fJDY@u)8)QV5k3XW zfuaX(zS3TccH{%rV5Gm8a^nVJ)usFuc{=OU4P zaCjEY9H#)F(ywOY!t04xy#NVVI5ee{9{mZQw?Yl{!Q z*|qgwl}$*dF3uT8z@mu5MdK@^9h6Xn=Hr1|=tl0{%C(w&btQhyMHPPNTiG-vH)=Dv z?ukrj2wl;@t^lwByQe?UOT(J6fH~9wu|%K?^&#XVLmE-p+!{$012r4f9ZHGUgI~Ip`;061nxC!ahTGR;~8>98i@tUvO3{TC^BWH%>N> zoa-XeDE&T&qb43nzlk+f+rms1H?rzdl3eF@=?B!RK-xzCq#0UIDE)4Uo;+tvIS^hj z*P~qnoIb~vbbmfjGZ+)UoSv4_f84xFGp@$ZxAOoYC&@%`+_%$y+`!00m?CtPFf*7Y zf~R|~r&beK{lN6-f1b19Dnb`NgFW6t_>(<hy@g4V0bGsvC$X~P4% zs!f@`80pKMTMR&agexnem*e%FNMiB&K-TXaAV_%XZl#eR+JluWtEz+qpZwP{0yG=<-3ai}> zF5W#QW%=NTP9J|gZg9Gg{gPO6u&rQ!Do%-t`^GR4P{Iasf<}u2ik%ZO?2J?$2k5@` z|Lxaq9vs6~%&r0Y7P@u7Q*X&KErOtxWz*#jn*zWsUMHEt8$&e^>|l18qVd|bEc|vKb_pw&q(qDc zVpEahE(!gcpDuxgCEpzeZ$@~Bbz1B^4!-S2bqwekE9>VIp?KLM-lmqKt0PU2q9Sxn zDMLz`@OvmRzAK9kl4)UZKK(c0EcG!_us%>%DS1zXHVQPle zTP%i?s)!6Wmpk9*q_Ham4HC?~vw=GUVSiB$UF;09h&p?u5%d#M*wj!KQ!69?nbg!# zjw=>!aM@&Z>PI-`%TqGn)2YR$Ne5TT#5}JfPHqpMB;8WL>pklaAvr4O%g9d}_AS_Z z*0D{#ywo@AsXy`&1P&iqgP*pW)?_Z$Tn@R_BQ2?KW=|-EzG81HKG&Ru9*acz79&d8 z`litJMg3TfB8f#wJ{qQ2b;6^x%Ju^J*+lqHf&uE;UX=M>5Vj{e3HfCzOe2z{5EgcC zyedmZtP=E%4V{ao7X4=|s3`f!YEsryXj0fvdiqJDeL`}pPQL?pJfi0*vOEk^qF|%S zM8hf=6~3GlJMo0G!mGHoMT`W;^z?m3(0FynH+?v?nSCM>goShfY93tHYQ8ZS1k;!T z^2FGxc%?R;QP!Ml%Nt{QeF`F9-d1HyUhr8xo4=wUdr})hP<6{J7ViQtfpd*#$VoC6 zE5!0dcAK;qgQ)BoiRztY&KJu`iJzcFKo2?X?xJgFqnccaIF`evJRNgKs?DHE8#s&& z4-EVA?D#q?m?bWEFu5+BWVy*omEiBGW;0V34`}3I)sFJbD_LUQesE>g9uZdt+=|ws zkX^}rzNpB5eI%;kpD|kr&L5qlk2Ow(%8+r&#nLsfv|ME7q+ zL{4npvVxboTfLk!n~+a#z*zKE&&625GH=NzYXq46ZC%d5Sl0VlS>UZ6SopPJwy`IV zaO-V~kcKvc4#KG=@ES{T_;v2OuFWa*1(-YxtGa>4J!B2>7Edfc^P%tAI6@+3Clpz_ z0{XX^(pLOF5B*s}#uxt6PQ(6R=~i<5A32T8Njq#pgyCynD7_vOvoQM6yL=_=vgXDv zRo;P!Bxz>}df$(}`gX%TDyk9apN$JKDCWQ##(rQ(vFTpqMyA z{?uRKg~PK*gU-U7=ML4%xA}Y1>kB->Llcwpf?6T)wYDxVkm|hk{KMpP{w)_;lr(ueZp<>&^87&DgF}@ zjeCa_Pq`G_1!TImtYF53VRmtSK2KRffuIXA26nW3>7Qt(BsGVAkfAMiVo)eF5788e zwIDMVz2*+y31jsm9;*(~s=Y#BvM9N9J3EW*SRym%XNX#%y_EzrWweVvAAR7O=BkaH zaZHJsl+=tbWaofhx{xG-R$%oSg0a%kB+~rHgHS1>Sup9J>jhj%^)+U><5NA=hkquF zyP2n7fj_hbf3B%k*IC6#=oJn#Kh@nsi-PDnie1(ADBxmlI(Hi#3 zLp{p;l_j0QIInosYJ8MFJ3bTXq}n){oE*QMY|J;z&ZbG70#`+_EV8BpRS@k<_4^lR z-a?ydvhL$;hBPIk{x4&@W}Db3ZOFC1e{}9&Go&-vC29eOpbSY#rP`vas`z=W$w7qy}Xf?vWqRf z903yp!?#+yld}r}6C)%0|BrAx3mfyl2ZcJ;-(n1@A6?yl_@{g%Ts!fD1%H?`ZL!w2 zLl{jP1riWYM5g{yC`>Ih^7jA8cFvNWv$Lx5(4;kI2%u%vzTj)N+Z=9ntym{P#@dY@}FtBw`r3ZXwb%=*2^u8#$Z=Aab{z zUl5sra6jXXcM_~C**f|{hcYSD4~EtRJaw!p+23=QV_+lvA6tkbi-5OSj%2!z)Y0inB`NuLCGYwTZ#$3a=?v7VSjmH+kJ#^M`40xO-8w%&O z7zN!k1YgTrPo`jjY;5r*@voC~X5LW99l~$dyg{=y=%2?e93+#Ny@c2CoJp8ykkITX z$xK+p#K$36(&!_}lN@KX$eTYig^o6|C<^`%4Q4w0!Y4y-g}HM(qF=I(`6Z`Zs|F^L zQCR?OxmJ44 zC+Xc)#j>(E}EgtsA(%&VFMCgW94@j8L-e zRDXz)4k}mpP>B^0mMF{ztva${nP$Vn70qaF6&giFQOWP3{#dkv*6)^F6TBw<)f+&7 zo^1O0N+(+@f*HC)qDbW|n6OG+OIk6wgxPBF=p+p@XeI4T!{8l-K=AFY=E~rd3P}V- zhGNdT&j6P|RgP1}vpyd&~0b{|UItI>y0Z$)%s5M0cA80nv1Kly` z_E%|#7VVEB*e`QOT+@JN4QfHi;KBSf&e+7d%52cg6dBDt6Tg(i-6IB|jMo7GT85{^ z5)t#L<_5Z>($rqp)Tqn8);W(a*xNw92%ny{?p`*UN2)6lJXDwI?ocv%u4y}r>W(G^ zmRvEA#TFwT3P;8x-?*tv-R#I@z)_M6^ruN@NLUbL-AG(A5F@mqxJt}427}7SF@Li? z-^TPhdc~sGa+hDr+UgT~8El84T5Mt&8N)QhAF) zcVc?m4?u4m13){^sL%iWd)!-cwe3 zxU^^z3aTJT&ylI|-MKQD4X}+4MN)7E1yiFNiCM*Iy6?nLPXZVm5M}9Hnk+bU$tS?GRaTO zRwF1ve>|F8AN29$4aCU_0D9`u?ai$Vz@TZ9Hoy2df3JCyZg_9W2Y723xwLcd{!peyyPy1UYV&U2 z+9=B!yn5P|qFuVYaO>*SwK=-%*X7=vuv-rXQ%DZnD4VGNaTF67Lya&-_Vr$$&j9io z)O}cpqv7~N^Cw7{WIKIM#uI7ZMw-lQQv9dq{Bif`*ScPcl{@?8Q@@qFHx|_n1%+)g zO6>@E*rTjKBvd{VgO%g}$&IgrZ8%h-ob zMf2$y5n91c;p~^#Tc`VI4N;IB`!#xZ`QuS>j-IXd!g%GgQR8r4$O5WDe*u-ssIw}n zDaM(9w3a5Wcv=aA26y!!#thhmNj6TIz7sYiwH}t z{8vt@nH7oHX;Zlsvytz2@M_>=1@BGl`8UIV;e~$>2?QQur%czGuoQ);oGI>ZBhC;U zbKrp>uBntL+di92GnD*K+YVI$Gf9Odi*42QamA()yKYnaq>tau>$c5uL*P~A>JI@7DpVbj2@}s%XA;LDtZzOJO z5r+jtGxA$YC|^EpS`w{_M~=`8p|%7F&Ke{P%G5V0_>M(ZbReFNi;^ZC zvchDh67u(Va$(ojfD8ZT$8||+R!@%tK^-elvzh-QMa|?OYPZV#YR(CsGr^H}dT_u5 zN~IGJsE!P|;v)55Vo@Qw5(|aY&XB3W+l9Yc7iP`AJRDkd1N9NU)`NfRp*2%i5kXaI z?O0B$`76oR0qug-4|pWfH0soUg`f8m&U?8Dep633c{xmQ z?+EJpk5RDc@gCgG%>^5#&Mqv`L&H;-#G?QrAuf8y`A|%4{3;#VPPB$7hMZgg>8R_8 zioqL%1!y%v#_fHjCwCS^kLUi#)s1#ra^~cNG_Lp^G^~J)RS836kcri}VWp?@*(C6R z5@csW>3t+Rb&1t>`ABS1;687fPtFhk#qv20wnx|aCQ}Yw8D&J-)9iv*@!A&`lwgt8 zd%N$lRMMW`-`8J5M6f6z4Wbx-H;Td7>3)$j8sRy`FaactXn4q-BLXYtE-r)lkk`!B zD1TGDO=MfWpF`u%EdW;F4L&!BerY7OCj9JeK+(uGm%In)+Ij_ntyLVpL0!3@ zKy`XP;`@I%-Zg*uJet*Kbm!PhOf3QqpFYGzg9F`o#;o9}P6RrlBWg7fYHfzbfxp$o zaNK#<Et8mbjiE*Hu_Z2Bjj&sFZ0u%M$Z#ECUv-zy2$sd@!4H5@rReIAGX00c` zeKGqr2cl@aSz46~Z->fgyuBDe4S(JuNVoQzcCJ}_=CyWmKSvgDr`=c_yOumi0*&<8!W=xxnP&GIz~&O8!h74dKb@3IJ9Gw+p0Lv5js9pBU|zF~m25AvAIO3PbD|pu@gRzj< zm9)mvaC@LWyZ7CutCr`r191tL?si>=Y;Q;^{gL|JHfOH3H(lFn?n>%hzg5w+*8l>i zLMx?@ia5zKRokjDm?DD}upX2-zXrnL-PWrLG%f5PhKR-q)SEPYL=cH_S&^4U==Fdk zMiaeeb(JUN0ja8U-srwu0RD86RJZkDfyno&wT#B*$qN8ouoq*9{s9uNsv32;$;EJ4n8pK7a!Wvh3kn7K9geQa94K zv2`GOq^5cQ`j`b>x%&P$@k9DrPyLC@y(Y(i2!^LfI6AI6`=Q^8JpET&xVN{r!*~_4 zU*S*WoCmNd4t9kM=rrYY-qFsz&Zvda$!oz8684AjIv{7s^j@(i(oEj*vJK=rVc1sU zQWrX*g=^2AIe^1@&%W|UP+^zN_GL-ECZvGfHD$5eUsRjp%)yGDxP{U4YbsMec)8jG z26OX*{a+2JO9DW=*y>ehxx^%?r$v*cR%>8pHUBaLdXah3;ulTtTe{Qrg&C2;1EMI3j}-I>eLZ@bEfly6}rMZ;a~0sU5E#mImR5 zt>gu-;mN|;FobaJI6}a2QP9_%%nE|L<}41zgPr))CY5~|+`tUED*2BHKUk2wJ{h}H zE=hG6Vw~WdRg+w!o(^5L#57MKY2$!#l_V8*gS0h~pI+CW^b440gdBo$=#~dCaqzWj@50LIMiPLFGzPc!874BK zd+6-_&pKqSgp@har0W!!duyIkY9*nHxm9^SI>2f&@!&9`>IK-bOP z7dejhI#mpe6o#Mh1%#y$dr?rSJ1&`o?MzXeQeD^i9xSC(?YKeMz0^a_+mE@yZI=s6 zCSnIk*EFB^yY#78KaueZTxWHHKX`3!p@f|P{H){j>b5iY5PY|9dGeOeJ&IXGw%vJN zN2*=E&Rltv@$&G!V%5f-As)42k9z>A1qS{bj+L>ORdaV%HE`LewROgU&Wka)Tf7|7 z3j5-~(~`HKNxW}YMf$U&dK?3Al= zKu%>$6OEVKuV!yC?YzjHp0C8Phz8*6$; za^gd%7e|NUOJh$i%s#A%9+o?yu>;0-)ZPhnmx00?V|tr+;#2Gx_=CQNwd7uE9z7C9^)W@g2uYe%$-P>t7l$ zZ-J@LCyN%ZoHx0t*S*wpcg`ogwAZuev;Vund;+euRj^!ecs%2+)g@jdF+QFD{B0jw zBQ`!A_}sYRu_~{SkosGYf98(YOH|7buCwHj*NgXG8eks+|ND2JPsFu8-Bo^=x&H_1 ziIekRsHgvLTR;xhe{%)A{6C3c%6}z-bN&|*+-H~05h;Ww?N%=}IR-&Hf)E*i66N zBDqk}#?D`tLX=(VG~J>CrSI+esQrg+pX6bw;q_W%Y^T)M)%>_; zy=tgja6jeQWGmpnvvZumc`U>OcZ7$2F$tA=$5ztCUk;Xz`yE#WE-}_oOtHBHeR2k=lOzI6r26z zW%2TKo(7ejg@3C%mWl=jEF+Ws<{n0stu}>ler8=`ml@L>#nNE{wZ1`T)k_b3t}~z7 z<*iai`BhD<3PP)r;Vp)`&AVs}xAYG^jA*U=V{&s@W1C@@PJ_Ji2LY>*d?oEJlRLkW zZ1HAmNAM)2QV{`AKJjAlPI`MynO{K0W4cC8itezLGRZ^-b7@P6wEcF85(T8tGHzL8d2P6t@Hz0%nH9R^-1=x@&Vx46G&SvAeg z2~Euwk?oxQd%^1nNvsuOO395}RY2h&2lKcQcOg5=n5Iy`n{Qt*MIBHtC0*cZUM`!! znATIehpE6j+H2J-T_I#%DeL$>%$PU-I`_@Mw^i7PA45te3`~BzcE@@BTK)GY2st3d z?EhY#ObpEbouv;0)4yMR%p8wh;6ey{<_Xm|fNH1flK2IRL{JCf2<;xVWuUy7V&lWMVjI?cNFe8bi{8CeB^K4ErlEfSi*hLWUiJjOz=dY?L+iZmA~EgsF-Ceer9k)#)qir_*m7(fuwj!lJ?X)YlfbW$ z=`5eU9175FcU6b`4mI({ZbC$dc3XeuI&k&uW(|i+Kuj1ba6y(G{q9OqlGpZCR=yNwRpf4{_->Ur~V z!Nr243W|RNQldE5r6&}KW+EzFU`*&ZGp5fl+(wwKxHsT3dRjPxel^DDf`0&{3dQ!d z=yRRBvlK&*hWdPKn*4Ui%**g{<EhE=G5C|0;_5zc{3X@DDSDszHfqzXY+ z>oxS9?qwcL9gFE(lT6ndQ6sddZ%mVMo+Sg4wnp#sSq}OOwF`6Umy{EMhS)p1cIYr& z1Z0mJHUyxtYj%op;RHg``xX|1-lU4A+#HRl*YCLW2o8_ZY5!aia>oh{YnQh?=JT%q z8GVZ6kcB6pYM4E{dEM@OtF#5%4|>DK8(H2zX9U5)hatp&%fp2j+l4C;LZ_?RA@Eujv?x)zYr2J!S9@DAAV_=9Te_;`ptx&$ zs!f|mdz(^7%c+fh(V!{Q>0_-Pa7e~O1A&v8zNLh@XtnkLTjX}#+tx@j*w~?{>@@aF zTl5q!;G?tWJt>7ort{P_A#uKIUd^uD zb0A=fK9iAkN-d?Z-cOiP?-zlG=85low5p_BXIz%leIL-st1NPE%V|&@3vgE0aV%wG {JOFJqfE6U4f zWRm-en=HiafmXj}6uKsrLw0^iVE=*ZVexo*lwBh=^v#!GJFk=8g<Mh-4Z=O|+c5b2$M*L3$MaSI(*O(x7=3UCiGHB; z_Zv?Ge1cF0|1akkh7N2$PB{LrGcap{43qGE&#pnF+M?Z;7eEf<`z%HlzYkN`&1c-c zJ%|=~EXTNP8i%or2g8tYD~bL5M{lvk_@*J(K%A#HRmt5`wtUvXy`@j)^$0#qiL+$( zGp>AEEa2}3A5=GI>Jg{g)f!J$4>BD#2fk-lL`cuY(OcRPXzs%Myh_xct3A=h0Bl%~ zuctP^a!J`uBTY8Oo$a3&B^^tXgx-6Sz~tt*d3P?|TG?X?T~l-U z!U1hdanMUCOVO;hyh|mzT(-F2L^j3OF8sA-==Is) zi|nh+RVp7vSvXcV?(ap| zEhvpc9%1*j?gK!ExHUUp339vTzwp=JKyU<*dqwRW1XzC|I?Vx{%>sR!MZ?0ChOr3A zanuqnbti%}pW7thysVf6nE4PNpn>gJQIV<7JnaIJ3-p1(tAOAUlJlH25Z^!$uAzam z^y3qfCwthT3WOkhPXvNZ|x)Sx>Cg^LWvF!?$4GTSx6{TcXJHvG}`1Oa{U1r3W)|t@O z@1u{cKeB!Y1P!ZLwk*h>P01wkIj*&_5JAT=JF3VZO$$&ys7LV4zhzbiji-S|?v7-n zGKQC&<^n(aI@u9;S!dJ_>zg(byZZ5j{dOvYVINc>ZE49*-Pt?bzk%;>Xct*U)uGyh zH};;lac@(Py6NAPOq1^EQvY_KxM`JWd%+q>Tk0lKFaI-!1Mlda$!^+euP66>$J|%g z?bxy~fj>}v-v#EP>blz>-72@y2D(0m;VS(kilC#6u$!=Tq1*V5}~-Ew*x zpI0T_Kp~nh#Qy>K7@7aO3OFXle>bqnl6C%H!1n^O2HYN1gBb^(Bgs6kt+mO;s}Yg% zeZryp0DwwJ5vkdpx%P4}asCa{Cwd0Oi?}ut%$Od+)c(wl(DNlw0@D+@9dRpWk|aX<(lc`n#I(;m9?JSWDdSbpyz0df(Dg z*Yl}O{f4~{daxXDd7Zu(``e|p7X#a#x77NHXYRD53iDw{bbpF*VP2KgVW*WN1-Siv z7coymUY+Uz)6M&rCBx0d`S2e5rzX$bPJZ@jQ;3jzFgfq8EfFDur=-udjuGR=8;(RpHhh39X*qUT#=Z|muC zrku!@maDL5UMNrx>H>Eex*R%`qT>_!jSG1kZcSMiZiazgVt-wI%3hpWP(L>|+o^i> z=03d}tM9ayxTl|s)5GHnPJ1%)T@adIO&$yOmZ&lu-zzk$PYoYCd7e##*9Xa02;Ag1 z-ADXnGq&fG{2oB?IzxM-IpwDm(9?PQv!-XB3c*9oo?jHDrLBUVK<0FGEsGB?PcIBcF;5Q&I2`2ZSH(NqXeuDzUm;lda~G8_3F zO!6LZGLIES6Vp-hTvf}g(`j}^5v&$)VtFBf34}xzDJgh%A5t<)C@7(@l2#|JDSYZX zaI(tbcUR%Nn=iYAOfM*@Y=Xda)UVMEo9OlnB34ec-m9~`aH#Ck8;(%bYB?;;MQw}Q9w0c!PsKvNg{Mrru106(be}nxvaZ2BQues@wAQ%j~!{2#r|tI zi4)J)OwfFod%y=PsL^I?C9vDk+?I!A%3MEqhH}}NCw=6x^%6CkCK1w7Ft`#GWgi;9 zC#hUB^9c#)Iu}sZ1hpWQ;HtozQE=IravteCDU|}M3gN`{>j3T6WI&XFLGh8%~ty_ym?)c(${(h-8xr__9KHdE;H!jXJA6b6Dh#3U&DxL_x*nwvoE?x}Ia63X(q#?zJX+KgeOH;I3Xh@Uhat0b11RH&TwCWTB)6bg8Ho6Xs-q*&T^s{T4A8aO_CCGW0&(rpG6uRjNZ?ORO7$iXe|&Y=<2DZ4_h0#a!3;1R_WP7& zq-;T!tKW2N5hWszuyKDmmxS;_6newI3>8@U>;&Wls^}1Ux}GADhA>PESwN({RIS?; zHZX12Dk0*&yWz{dUe5kTlLO4(aBb}RBglD69z3HKN$+>TG>Z>*Uj=zbCR1HW4zu>H z^yVMbM?qvuz&?RL!;sp(v1%eVQfDwzpFwJVHAtyx0s1vYfafnY~ zh#>lFc0GJeXz-y96U&QX$8!!S8}meIGQhy3OV|#(yUw?SDhFu9B9YwU%t%Tzf~9kO zgdx;~@)Df%c;+O9&$uB}m$ZZ{H6c8N!8#o2Ni)vi`BL7ZBgs#9gb=i8VUv0(T8IvwxL> zD;9Mzc;P)Qr_wPI_0q0!YI9u}s+8GdR;^MnDhgdkSya?$h3IOk=! z?yPZkDrC(VX(=o1nUIoKm>(^$jw)m^9I*&}_B%U8LaQ)4pJiH=%35$%l~FnY8@AT7 zu$SaQhOdP{mbliUZ~{3*a4?rtdwxGiohLplIc!4=h_vSBF3xTJe#BVJ&{j2{#IE&O zS~%j^!xJOcZ=|V%(jcj?qkMjfu|Tvw(w*f%5mFk$Q*{zUsGxJb9yDqWjz-wQ7!UAa zjTWlxyW8Gv#7V#A5sY$7eub#bi+z&Xw`7@If3+aZJ|oQ+!6$`wx4?-xDl%-d(Se_; zTY!}9pq`8qd$&6s;j)wU#DhDIC#g>( zeU0u?nWDZ&?KF*#NwO(Y-JhjtNvp9N{~kLUJhdZY2fX)Wrjzo5hE5k%(VrFGYf6%4 z>Y2~s#9SFnl6kqS9*?{k!Y zesu(-TmcWK@J>r-I!ZVtl99J zHJ1;{h?HenD~^VTUENhVta7nY0(~m}TGnin-kfgvh)TrHCH41u!OCZJbbF3*QSqJy zx_p+p$0Ng{f;Vs5gvF&i*B;4$(mZX`8rrea==}xF{=j9$k@3J|$GrQuX$SroqIlnJ zIASY>FQy~mgh4+$noWT*gfyP-J#)x3{|9`D;@;GM#Jc~^YnFlW-zl?iA!(Fvxu$#S zJ8&!{Zbv4hH4r2MN8t-t$CE3!)}BCQe|&Cy=8RRDioe{zs;cdovHJs4<53@Ks{ezr ze~Phn?YcJ5vS(?QZO^i8+pbx*ZQHhO+qP}ncGa%;`?Hh1cGkg4M#jODJSXFzjl1`| zwRUwUDg}90K=pJBV|(AOlYV`)xO8ooH{({;DZ_2~uVt^g>Hq5fW#;|%G=;{Fwok~@ zNq1#6>_1eqTDywl%wlplSPKUSA3d8%*LxwG0Us8b4O< zKZBzm>A5B3k_=Qx8#g4Dbl5@$yk*CaNEQNWIM!o*eC97z1pl7OuR5vd)YWcF{YU@I z4<-Pzd6i{yKgLF~-R<4hacqX~b<2!B)USL!VoY6oP_tXy*at2G>Q#}(u8}PNA$4M56Uj2M*Y4`sXUgtN|4g?~19F0Fq zutB+nST%eo>MSNp^EF6=W3K+nhox4;;CJ64PdPS^q}3)1YpnnUoVL9jXQFOJJQ-mr zYDh^lJZqBOVNGJVTl@8!EVSCS$HZjEtPHOi@_C|4&S%dfeU7KG&I@ zHT2M0eIV`0{hbn8hoG*{++2k;Uu^4)lr#msjJBgw3_irr-i$$QsDyuhQ$ zpCqWWM-Vd?(j7d&7s;oHD`B-ZkN}UcUMVnvtz7}>GmN#+??NY)>hLP;4~20}jSerE zsy7DBu3Tg-y@~;EuMxMu94x(6=sc*cFiuDLwN)7G;+j<552crH=oldyPg&(&2h;@OcsO znuR=|?P`oJH0y%74xi^Ig9X*<_EVKOaRgSF4CF29%0<%#`>I|@8e|_tpy3`=LX)c% z-x9gKrLuS~2cx^uauXvc%xZb$E`ub{2EQJoE9I*cpn$n9Z?JVmA`|kKhsX_mvmR<6 zprjXIoV>5R^P~3FhIfeG*63u3y5!9h^QDrxi9K(ZMmGec_bq<4*;~L zd{^naP6|ucN+*K*Ja%7DidvT0`6pvUZgriWa`3Pp`LqsdEmG&N)GekHWYn*ZJ6}i) zZgvKF2+&L$5ipGlA%#7VNmN67pP9VFw+E9exM~wauuga_I+BN!QX&4_7H~MuWl~@C z%+E8JJ2i`e#yglgWE`9RrQy>59_wn5Nav@sqs0n_7@DFSM&Wj``5{t)(WwuB(Q(ZN zqu7?V2BiS!$CL0UZUoa0Clt_`GF~=BOvQvuNs-(j$?U-PF(>aP^f6;pMl9S4E8sLO zKS-jn{{6zc4@oOaU|6T`Ov)BS$JqE<*1k?ERx~}^$plCeKj{cBg=yXy^KSgio zVNk%4@Af)p0FnPgF3m6l!U2NFKX2kptra1xO)Zk^My%M^=7b@ytg&MkWQ zNmLGvPM)UlUKFvmXtY^Kg=MQhK@{H5@M*F)U8$Duw=g?R-2nb%^H7keIyc89+%>-?3u6Z}{jGtSan2xxN^7 z#g8Bs$}R<@bI&z8yD7q?lsq9F1!`WJTb!;0^K9o5?<+1~hBff<+|mgQ?rRNUHNaQe zHpCYd8AJ`Jf~6ylw!ndA~P9(^%^P8;?$PF9HH~GzLDJjc75zP zIi&^z;sF!1vrGn((_DY|50UT-!EMNZm7p%}*W&woUP&F4`<@aidUYy~7v}Ef4DU7i zXZN~+_$b;*kx!j{B2B+iS*wVD<3eb6W@9CTd?}4 zBc(Qi5~&0x?NMd1#lfqXux>GAaYs4uwbp)zZ% zbK(%+G^oVX7SVox{g)Cz8n(KneNb6yGmV@Z4B>kn410ct_?0z_V&=lzuOPF06DzS3 zVV*^aW182}WNsBtC#aFj8D+#5X5UMRPtUUD8}XBNkZdPVy5X7HOET^ks8L+x?7xZTf5e3{($oJV zwyZvCb?{T{d`$W9ze)ruYMYsBmGX23Ws7eVTp zI$X%3Zi{AJEJd>)#u#uP)#=sSFIUcAAN4I>)`~Yf>EAC^N+??Qm9^9f*Wb+E%sOd0 z*Xc6ZrF7~-*i!c23uube{PTB<7#3I4-kYYsavBe#!#{lIx1YTk4-$^twA5Q{{CZTb z8%W&EdhdT76-iT8OKm4)6$pb-ERRg$3s=?YG%|nGYMpKH*U*!3!gBePyF`HmTLdL^ zVRmKBdvtGxUmAqgU6N1)%U04jr$61R2uOwJR1}(R0?XjVGcc2`=rK=FWaY0N;w$iy z{6JcM+|@5^q{s8mas;-p`*loq3&eyfpD5f}EL^LEpT zt+Zt)7OCfmS-qzS(>oIp$C`D6_EnXf%T4Q?%^QmBCu=D#yx+9kn*(g|m)YFIwTnID z+cm$ZwdgDXRNW+9eyWH0w{;m$*J9IZlQAAZ-`IHaELFG2^*`2t)C39=hg1OLhEseX z2Cbk2?#Em;ec&mZcz%QTxB9!nTHsZ%+ka8F>)Dz)tb)gN2TtgPx*PGj8hBB}5*8tn zi+w13P~2`Ex--`k~mstV?yku)tjUA7h_IxQWQnqBv&M z1OEo)Ng;qqhkBR;vd!ezPz$h`;Au4!>&#|#q>D7$q9vBK?i}cO=k8!#9K{T|v(&aD zS*~lnBa(%!pVc$L)_^o~gE#*%39b)Wf}cw>sN(`;niJQqG*5Vo%c%l!cypa~##d#B zr6RkX)aqPJ+wsP-fQ_gIcOr6Br$wy^yJgM69Oo83l+0-HCSRMy3Q6jpZlwM5&bNdG zISlCtd8x$&6|_%`4VOF3XL$-6^?-CQ>lmzt`M07cDQr?47xD%4c$o@HJhEzAn;J?G zob6mi2+*M%zeWGsM+`=rL~Hda%*LaW3?i&~IXT?#uSpPu6M~cyAkRs=lp)?}`ya!a zasXNa>#mkFb#O8Odt%U&kic~jeY-}q2Uy`<;|Crn_HWG z{R!}`r)YBA-JxNF&Y8$)NZcpmeSKVa<#b&9bh-B{BgO^=>bizn<$7j`u`Tq#H5j3F z9!icw%blPBxssvEh@e?;V@4n9X_E&h1x193fh+k2W9O@L{Lh;vNz;UFb{IHxY>RFZ zJPh${C}hOgg zZyr9%3CPozf6dHkKrVg#1wxDgMy{89gxtqG?Rrl0nJ^uyBsvg+9C?F1nyUx!8&JB? z*(!%Gi(c(unr`!cJ@gI%0q^=(RsT<|$8>ZI|G=MIs!v7{lEQZ#le+-^E&+lnNQ8@x z6K$>B(@5}l=lm%TTv5>GQTlM0=gG3DvlTg4W%#optB9-v_ytwLOyH}BD#qq@0i7%mn-8IV>=O!76}(b zreG|1$)YG1hw?0W@AMdtSUo-PC|5PN1)Z&gF!K~o!Lk)&d9q|$Hg96Ti>FjZTm(qo zn{0AlHh70oSkZb6bS`v5^}hX0&6BEP?)hLkk2#hD(G(^UfFI74`7o1YTC!Gt+9hCw z7}D;_1pu*6jW}NTT3F6IvuDCk&z6^z(CyUN^~z#3vq!MuF=)B8xrZQrOsQmm1N_$) zEc|r`E@0@$1oM;6LfSI`pL{UV55ozVdwHk6J!BOH;55X>Jx7>8!zRwT<;aTDC11Zr z@@N%~CC*i)XTJ?iBom~tySb3bj*QgCfH@{U4*ypG?pjk%b>Xs|^$r;3hmoRP0bEF) zVHMxfWg}B!Ggh^F{Qfo=+tBcmIGTG?BIxx=Tq6!Ou}ZJ5-Q=)eW@D1RsKmtw?8@u# z0POx}tv+USsMZ=_`-AMtt1Zu_?r0XSLp!EZkClt$1?L7X2b;gU;Dt%>WmMPGrImji zaK0(62}_h)s#g=?7J!!9Vr~k4*Ak(Qf(oNzcWsA6T|ayd zIbB6p^=VBDe~SNF%Qs?N83iezB|B1q5D+k$1wvcQG^B3#{MVul#q zz76#;no&bTY{){)63XadU1l0|nATJ`v-Cu7yc2-Ne23^X9#Wrmam0zeW?TYUJ3*>y z%b~C+J6=^sjO~V(QLeT&ZBFPK$y$a}IVRZh-4?a*75!l~;F3h&-4j9z7*@W zRPG_nqN5TELw#*ELmDkJC(E2D$R(##YwCgCG5SooL+w0{3w}_lapPGv*ZxIvUyEXw zhv$+I(`D2W>GEJ(hWEj23h3Zla^!K3HQMl2OZ)OnV2p)ourBWTapU8C%f_`O_I#1! z#;DsyQ;)re9r&>&+*3MO3NzP=Eye-1&6Tevo19zlmdlY*-_K3TY#BRZZGld2 z%fydCx|*KwYZZ=jFVkzAPfK~x$`zzNy>xE7BO9YW`1>R(>H8#_-{-d#Z@dw<5^?y*&2Vi0e%?5xW zET92EJBGPtyx`N*Q_VepnJ>@yI5QPz`Vj}>-iVwzVQy+Y1xB4n7U{2!P`vM{4v*N` z>AA0!N1aG1guGXh{9Z(``$1XJC4}bN>?4)?)ejeXT<+T2DWl|0Hm%6#JM@X2**FpV zwvVS-Hh^PM^^v)q)8~1bpk74Zm}(AwH$O5@m?=80Uxq$-xNJ2ZcS^x-ZI5b69m~XS zwo?-M_H4NWp2C=#872Ma9vBAcwB#-+6h(KJh207JJei7sk`qdR-0MCyihSv<`2hp7 zFeUtVWPA0rasYlzM`Zy9zMmir{7OLYZDY)YQ{_O6@@yOc42i(?R1_kyat5FYUj&_I zmmM=H0u*COrRIw?1ZA)ayXsPSWOKt#Bd4$?C;hE)MZ#5CN`tysBA`QIP9{4G!cb1! zr3_GV=~WRVb3>-OVXLS=UC-Ol3Js}&Fc$5Y!h+jsh*)Y9L~4ambF=9yfZ+trR4ecYxxY8>Hb zYs3{MNar}i+-p68IdJ;8GTJwGI}WCz^}afcxpkgJ!lPQpKk@4I&+K_dE;bIknBVtX z=A$_Fmad}h*k^5`U-^t^$c2AiMKV`!u;%~)Pt`_P*lt4xa^t#Kqx3_3e1f>)1)25) zaT!3C1xRTJfOYUk1YCyr_&_=O-2uA zbpxaZthnO=t(i#cz(OM!V*@3|ER*)6eXjZF+xQYu#FD*l#jJZ#}uD%QgeNh!Xs!%-An+RF)nx0Ry!YwK?v5xpH z6~zTgT%hC|CB=$xp88ya#(Uqx99_pjFb16(t-Gv_#c6#RmIqQ6mZuv?3b|am)!yI6 z`H49*O8uMVc{WfeyH3c5v5OUI4c~&GLSAGFZW4fj%%Dgf)j&{P#(=~=%{cnY<6nG$ zhE&$qoltnD5r|WCVZz0EqMogmQQlv>9Ns!`SN|qNtpCk@Ld(eV|2r6Ws*Xqf=78V4 zNB;6fYcKnV6IR31s&a4+xquHhpx5oEQoVg|9*g!`1q3u@oEKleyd%$cYq5Bg`k`4) z|IjS07w##WzYdQjp5LWT(eO&H$JnbOJJ?P5tF@8U%e8XWzRI}E;LbM1Iz6uw{*Nkg z$}FL_U?7)Sm7NulYphSj<3Itj{?D|0U(R!b2)I8f!0+ zXfcPQTdH{ZTB;6_Hlifin_Et2qu-I7m)CLJMDCdvolK{?hNPzA9?)|KD6S(q?C%&_ zKzS=*NI@k*n+hXx+FJrURMJ9O)(s=KTSs%&Dv-FVJ9v{n8Dh5`2HDRpOroUIIxldM9*sgE;rCEhV(BVX60l{Vj0X_?4Sw~q%7 z;r`V~O3;Wo$Mx=CHp@z11QLd1OAie-0N1&{qpQgLkI`!y6+`5{8TYwyJYZk1RgZn(PhO zG>%N}AI*`j@FNb0r$ahy0&>&xjqB;qDdU&Ngr-R>5Db=rW>ydq;DeWZ$}Y{K{!%O{ z&O{ibCm$vTZ8ffjx`e=nTr3>yZ**v++VN3DMF+629C_3*ItJNdHTTLK)=XT>sc*2E^H6m`e1yPw_Uxp#ke!3v8xXeq z3i$=k%z45a3442K@pw$0%eq8ARLz7xN&>O9R;=?&1O+%fUy_sJ z-qm1yZ=M+!$G$fqFe1Xo&_Mcj-5`(!rZRC+b&~7&c&UDJW|Dr@et!kmQ;*)ryJ9jB zv|{ffJ;Of@Y%~UT3l7m@bzDO4GqO`ac{vZ)T55d@S`fSequ5_v=H0D~`0&MByCpWPRz(MmW~91VuedSX)J(e1qYQJ<1lePP%-ikG71i6%I%{eKRXn;Mb?6Du2(GN zHWAoc&+lm+WKL>W(+7>L)M>XXT`{2ZCIpngX35yoH7TGXV_FUHbiCp+#eTm1tGxWT zxQOMI zxmIyX)vC^7o+`?z5BiD059SN|5^rymT-(at-IUmzE|1xDl524a;8G_G;r!w3w2Rl? zi#%ubZ~Fz@UV4U+Q6%b)ZaAfLrgbIK%QSF9Gx>DPT>qypj}OgtCQPoRYxt6ZWt2Qf(0spb2a&MaFo35auS-M7u3y&^m|}-V(W$mm zoBMq(6j+7j>Xg$P4M_L*5hXS8Z^A`%XbB(%Sl{@r7(V1;NeQvL1vto zrj=D@SB`%(S0{aFlW7+dAGuaZyU|LfFHJ~)cwd`SZ9QY4ui?BOCsI@&D6-$&r7unA z6^=t4sO=Eo<&YalB^94*cBk%GyF@~T5MVA~vW9?!%Un5&xEB%3f*fu}YoRW`VbM~m z^WG#aQUK!j!FZh|q&5qN< z12Y)eSwvfEIh`+TZpq<8e4#W%&JbH>*YX@b33d3Q!2q+Sye!m?@k6}nbwCds z-xD-j%P(*h*oCzO69Z)uJSgMufF9 ze>PLPuvIUu62Dk}ZFd`AZ`VI();qr^-?kkBLCm!hXG{H2fyjOID}10D;qiXK4cIR&;kOY@czXO^P{m*7rO z+1GFCS=j1M@19V(Kc4k?8341~@q^1rvKRNV@ZI5%%MnH-S(Wc1UI^W<5d|MnI6Sna;_^rw&!O&GD zKRB)h!qAmwFocQ*ke({{YIg)bDnA0OWDE*V%k)&RwIFGWtRqnMw2hau+5{WP>kE8t zGT_D{L|IS41x_%Bg*|LZY$sr$<6xC3G)u13cU#JOzpIed4oI$=Z6kTFHnuPeT|B!A zGN0xWF4k5MM&4#3FddO|-cwy6%k#EO!1~3`nq|3HlM3;eYAXpr0o{yIs+riiBaiCl zXr5UB-+2h)H(&wDH-}VDgnJ;ips^fpCAxIXc+y4R|=R$k*l#VL-smziwQ7?NIg*@P)^M@J%G5lJHtoI!6MGL;KHQeWz4QLzM zW(_PwdD~slaY?yx zU2v5giCt?mNrmj8W4(^-)&45)1zS$q6RBIo4Ef6*)nK?LA+bx?x0sGBj)@l$(@jR;SF-=(I+`U|!yds2QqymM}-rJZ`C09k-Gef5)UVE%)%Z z%p>T|gDqJYdq1g5S!{!Xta8F6ebjf5aZyG8cZ~sJHA0Yj>w-xnwos@k1L8`B)&#zS zB9+aCw{tJ3*PQYgZ8J1C>{Ayy7`6RW~oD?sN#I&%ff zQ|4nXE+&5XZ8HHccJn3gdC?}60G)oq#{`pJ~J zt}mULR=hPk`$l;k`SaLby&A<3dUKP!G5QVUk(=j=ixUgoU$?(yL)BaVO-0!LQ^6z~ z+dq8wjjI1-=K1sl14;cqX5Qan+y61MzPyC~?5h#AOBu(Y-I|DUpT*{lgs|iWhViJg zhIET_b`KTP+}_*YK1+#S_k?cqbHwz5)W!!WcR)c1Q_LN{Ccltm4HWyoyqNsIRPnCe z;vAV+K5Ird51G)k_~}b-ygbA^Zg4e0&I1X*5#Ud#Sfr4uhW7(AZsr)6!(b$(R)AeJ zoYtwdV#5)N4>8s66peIGzK^nnW)^krx`!(vkl^PW`e2Jdtu_|;DV_dzRaVgn$q?@v zvHqSS_Agn5pK(rfFy_vx0xF!e#twG6i%;ko!WR2(|4iUIk;loqOM1Yx!%f)+30(p6 zi78Hhqv#;@771TLGB-|DcD@BiBKl&$22p?oXJQ)Ikzqb<-L0b4T1pH0QEhZ6rmo(J zp7egJHdNtUeSjcZUuyO0YbP8CJYpf@wG$3jQn}Z?&PZ1?&ihe~>23Rx zM7?dxr*uzzosFr_-r-@|W{bj7Cwz)D`z=<=eR7`udoSajnt*QcS=SA(3F6n%>AQ@b z3xhfv9E}}u?Z!)>ejEl=1?(sC(cp-h4Zg=n+xd0c=GX^^Cb`Q$&m+Fz%X7!#eQy&8 zZHQ6C>4{=GDV(UV@V=B(b#}LGe%~ASTkLb!B$IQ;3PYu{P*oyke8Ivhp3s)~56kL&N=*#G zyfi;pCPU2dH3=-bU)T)jOlpG6BVJP1*T@CyfXeaaQ81v+y zEA@q#WY5sZ!|Ixp@IPhI&2=S4y;|@5+G<-H&{$Nkw7{a}L?{-n&8CUr2KETTL!>sTl+*do;GSY zovAx_JRf-CX(y{?>Xe7}XC$W1(KX$XDd0gC7+9C8FcM2 zJb4t+FVbZ%sUJR74NI(b9g9N0d)S+5HJ!s;cu<0zr2I8_;9$iIR1q0A`njKeS@L4~I|51&F$1U~CG_yrUZyS{VVs6-UvDy^Jb=OWSwowc zFn{U`XLZo~p6J`Wm(zso-Gq_y0#E^6WKLkI4t_&VPWQ9DT@sgJZXD^`B|6+7>J5@3 zf$f2DYKGg#^^^HA@qL@43qzB=OV&px5^43k`9wDBiF%w=5wEEurLflZiS%dQu9+#h zw=abjHS`KW1=Jwcc}?NP9rEse*KUR$cTgVjS;I6?E8^nw2_=v6&5u8mU6RJYMv$0x zIH}dv(P{|yY!L|u0>Y|w#|SDm^UF5v!fD0#7>=EXU-Ei3m9I8q_i8*RVSkd+D%2l@ z!jtoo3rTiSd{rtTlsF>xJmwK)SEiOiBn+r1o=nwawJcUjHQpTYPAiWCej(<0^FTU~ zIZkZ$%hH4nm*QukamWh$`JVaFGPymNW_ql>aj`D7{SXx7V~WrkI`Yp;I_GCY?G{C+e= zV8VcT7a!FkkscOSZZH}Nvg+#;raup?5AQT^b1Bn~@0JTC+*(m>rIH%KS{V=SGb!z7 zmi%-BURX4?|E*TcL9mwywyI2qM7@mghqx)u%ViMlE)p0>F-AQVUzUVBxo}cb-Hi*% zSllKV5!^7ZFL&a)No3GYECiaQBl(MoVe>LKtmnAOv`xlqib>s$uGrz$XmqM6yQ*iP%$>xwY9leb?*U_@?s1Sa7- z_uY^av(`at=CYHegw$V{^>p<15zO>docEFSv{z{w!2TnA&*J)?Zluj2wuW`1zc-Om zUd5*|GtDgS#o)as)_idC41n9oEia<7^% z6c(fhzPSgxAIZ&7J=BJP2C}1SCpK4Ahup5sA2rD$02Pv7-mc)j7KfG^u6$JHMX;5ykX&(`9@0DPXu#r`A@XXOOAjrc0r-6h=%B9C7s zTb?#!7@3lFXD?+`W-xNtFVZNBw;#{`bO1x}I^4IQ(b-Yn6vvFhdza%dxVZQ?TrT=p zTsU{YNu^sR{!jFaonx4*C0oB`z-gdQR?)^$GpWNZ0V0{TmHQ=hesM$wFrSV5;r4muof()fZ<2u_0II3LM<(VI@tX=ppo3EIO}&5u zL7|t`9;QO45tw;|$FB3LAjR9B_COtyj;y?k(sLb>MVG`k2CXQ+lO7%d*!7JD+nip}~A4Wvs{ z_C+B@2;3TxM|LzfyoLGsA)&vdIjxY$uy8^|omwX_vEwL)%|+t01WEW%6L;ClU#{yRkJj zgY9I=_@PwTrZObp$;~XeR^7_|n6LiVvG3ZNUvYJK%2b48&OhZQHKn4^ zIU$-)QciU9YT34x-)VXJQ#-Td9!hGH%c4qCT3l{gY9gZVgjrupTA6%jK1r=f*Z@RC z+LegS2We}9T{2howDSiFMJfH)AB`?WrFmK^C~|h}i$aQlmEfXM3RA*GmckOxJj_do zYEPJQC&7$HLaOEcD<=-1Sffjbd`my~M#2pIOe!jJQvntXM9s5%PD}?M4Q$A{B%77k z9rcZ!0z!lvZpWs_sPU{qv9I|sw*w#86vTSF9%hGpnqAGg-d}kZ(%Iq;nT|FC&okT$ zzDJl%u*^o=Gle#@<^itB1RU;I07rZ-o%-9x$60~LJv-ZT^)@P8&@VbqRGg}obTFHz zIuBIp`_AW#08yj5D$n>QXd1YAgKo{Md;8Wr0B#7&QvWJF|IIm0%lMC)?oL$+YfQGE zwMq31ZVg53!v7L>HCj2%d0l^={x|Ym<`#dxOPuYxij9JWfRFYtV1<2%dhW@}|1Wg% z{S!L*7UufiEAD=It9|{fbbx_h=pJ(`|3l(96QKPmZ_*L9wRD_)*8Wz+oxM;@BdwMn zFQ%MnHBT0vMpZWdculJRe>$QS!N>Y#|5jGy~uT?71$FqFYOpWFx(wf|lB zjE38yfa={A21F76I3M>}??iNMXoq|_bZ?UJ!CEc?cQ*zBQi@H3c5NMc7z1iBv1y~| zE`-5ZdS-^Mh9J*?TPxUZM<9FggEmF^X!K!Prq^s_#|uyURw5Do2$LsZqt>Gu;IUdQ zo@{rjSf}){S_ok!1+XN%IFpK61FUrMHcsW%5*+tIK++_pI%G`qew@ko!h!p~@Qi7y zgoq;2HoC0`T{8n{p~K0lAmKgJxd~wB^T`cO7memlzTj=#pDE;c)YgwpB` zna|edQmz=rUYQTJUG9y}jX61PL|FqW{J*(R{PSRFzg)AQZU^+VjRxKHo|=zlFv_h-*dc8l7<_vGd)M#3{H?p`O2;HP-&~j@-89V z_>V2Unx-=QHVJLXq($O%h(^PvyoLw|`8TepB1?9w_!|NYO)x|YAHHow_25Be_u)Zj z6Kp#p#dG1~ghQV4lDgi|>tR+#vU==*MW&6I|z8+~Kd=+lO)ydambpNgm73?DJ3R)8X82t)lL% z9*0l;@}f&wFAaP^EN_rjjfW16h}z3D_3UdJ^WWQFFK`U1g#XrHKu`PMs$1yT{@Kv> zW5fIZ;>YtvksiU(xRFGm9#9sV^T4Owntzy33OYPL#@2(`h|Qc-A#*gfew;`_uMa`_ zJfvGCliZVR6r2;8&}5p22WZc)i>_`cbWWGs<{4On24xt;$lp2va>^7H)83)m1ID-a zVjeFBfy(q{C4;AyIE9gdmIJ4E?|kGQa^mygB84zm->jb$jE)dX@pBu46onsZixifgI4q&J;PkI4e5W)%p(s^E5O+pOpg;Z@FS&C|SKz-h-`AbkPi1I= zU0$u62-q{ld`L1JS5RQV3!l?>pGfERw|XAfQC-a3=SZ(Ak|t? z)Rs)X$eMsLDJf>RB&i(3H)(BFwg-yb!NNn!WHgnLNYWH9Q2qOSxED>?S;pbA8D3kx zJf1^IgZ+hyx`Lfpis{m*Dx;2>i6O@nZm<-i2n3zjMYBL#y4_VJPM&%RZ_)nd2uUvX zp?KS-q8oaX{5+ktBK{mSK^6{_G9JC@n|% zw#_lsUZNC`E^wBS=5vUlFeXtbB+l<)%9&d|-gR}AY9$|=baH~RM6LtzV6d)vwJ;8n zc-~6j{(xkwT4)-IK(;|}-x+_;B0lD3qU{e-6w9tBOg;LL&g-(>I&Z2vd$Ecq%lB0K z+V@J+Zc=wE)E7rH*r(sC*E*0Q!>Q?PhXeFi_t8LKd^|C!m51G&t(})$-N69oz1Xyv zi{0E{l;_Vgzv!XSOu`_#G<$kU3$Xt3Wzpf_~lMjzgqeI$2` zlSn|+qxJ8x#<-cBznuu9;dXK3I^3M)r?{PVskuECvYx}&?)&3eu0*z8P7c&oB00Hh z+%4`tyx69Bq^C5j`YYw=TUM?F&F3S>f1PJEU?{_er2Fr#hgfObte6bAx*p;zfK~ScYzt<)eJs73lbFM1k4}Ps zpA2WWbuWEuzj#|syD~p!r~KAL<^8g7ek17iN|?50nZDj?xAyLtQj52++k6)icYX_3 zc>ZB3O{#l0{D8|J)Usr|7%mFq8t*VVJL2>b;6^E1M1QY*zkS6!WK^+(S@*oI(TPfM zOIT{C@7I0=&3g^^s1w3AigI5OP3xC(Ri>KzL{V*P)e4%wE1DUX5BSEIjo-Hr|Fz6C zgPZT#ZSy*3^S;PfoTOv4GH=^x*1CsjYGPsTsVyVkrc>N%D=cINR+`tuTp};* zY(hv2WET&quZLKi7sH(sLJuE%vC%Xu-+B@coCw?QcGlte4IFS4P0jXOv-y7M@4%Hr zFkcJZBWSlXk8?Iu>m3?xW9r{?>YQF2dR?k^+4Av)vwa*tPJc7ucdakqRI_*$N*aHs z*VH!^2Mll*=B-x~syuir?1%dqb)^}!ys`)k{y%Tigxjep;M)T9SbHPS>NeBPrb#_H zC`fiZ3#BOL2;dTg4@p}urj9tzO0Zhdt*cY6#u@Q|SYf%Jv%HCf!Pb_kB{9;*Y$urE zuBH|0SN$7`!Ik{CHwIDI&2|?ritfSMkrsQX{q|C-D`ugA-Y%h&xnL`Q zGvM+)*2RS(mmQ~42VgFl!+Thv8J-P@Nf=B+UQTlu7{FX=( z%}}c86cR@Zrc*Oy&uFCqfdy+7K?WV-4K!0UXI&Eh9U5aG&cAKKcm*??$RfMlkaL%q zoBSu-0-`U{5OIY81rTleCPv5-j6U$4n9?aF05Z^_dfBvAcvJ05((mH!3l%&4VBg{| z&pqhPYb>wVhtI0W7LUUS%y&32!QN+oZY%|2Ue;j&aGh>E97!Q9(jV;DjEg0^hgIE} zKMTdLzE?<5X)A^@ znBsWaiv7%--66F>@(voUbm=X$`j(q>O?n_U}IWD2uaL)oPkiXr`>L8KA*m=Mv! z>x62GE2}G-R}+KVY2F)JHfLdFux!n9vSTG7GO_zJOCvfudRr+O$K!|u_Y8q+hQd;( zj=aPOozL*`BZAmnI*su55jcgEh#hd#(N~0Tpi+Er$noU`lVj|qJnx$Pj}4Q8FbhE- z%5@Eczr72x8!7ju-KJ0_Hka2v4Y|{gNa_=N%d!iSD5%_RoFOV7ekBG(A%+AKBXCPk z;u8u|p8~*6xtzkg1cKq9mMN;~(;W$B4o=y~69!D-@{lK<2B95(RpSFr+Ctl$pTsfN z5nq;Ri8?Yptk$ET*$-&i2Y8wW`~qmMZe7lX_b^JsH34{H6AS$Fc}WAF(_50lJ@kp$ zbAuI4!uc`SfaA@Bv;Do(8L6t`ToLSD$%N}2KzlErr58-}To^32{sKYD)!zPB8UAlR zYC5KW%CMSL^v^b}^I7EuE+tX)3|e&ppBEFaIme#TZ6$T|;b)t6woUV>tMN2~BjW^Z z5H7TIlY&Tm_9_=`*LIzGmGCj2De$VW`I^q@nQ(rc{vNFVe15%P3d#q%iCwLCxgQU? zd3$#pFaK1Ka4UX`T1a-V4F)$SMs7+%DMjYos+x8~LGAK#{vrkj8}2*nXWQRHmUTqX zsq|E&;5Brg%VMGj$MdMy`k;1Iyy3pZz@=pmhdHJNsn6I!&w4rbv0GYbl((RD-2&f=vip+1Pq=tp4RP_Jx3HcgVGo$BK6X?U&3sekuNo z+BhU1mI3BuKrO?%3zTYhYA6Q(PBY_p_z07zO!*Aa+l#|#o8tyn>siJi+7M4>vpK2~ ze9)-Dpp9W?A= zWl@uqY@SQhxnb6Knn@?Vo&+S-`(cPC-Wh~=&KFviuH%8jSEpBZB?Ts!RE$KYUye${ zCZ`91O14M0ar&?`oAApu79y*dmO)||g{6^IT3LC=1;|hbM>t1xc()onS_YIVH&N<= z^FeSHV_Alpdv-pduQd}Vh3XlH3@usFnnYl)u<(uKwSnIz%De?!A+Y(XA*pkIrzSoQ ze5t81@y!+*Ti$2Y%>QgbWU06(x=Sbe=iSInNblG%IyK#q8mCyL%M_ zi6zjlR$kQt(Nj{*Ruwgi>u zj1dqhZq}#>`W8bFHH#6&0=BD!bb(d#(#iJdm#WdztsHnjZo<+mJX>$xzeS&$A>XT> ztrf2MPVqYEKtj|Gut2Iw=gY?ESR+0wKoyMyo`}QCKSJxSmkoF*@>Y{Pl^Y1&$sPlr zstMjff6!K<42ofZ`o@L6m59wE zUHSYM?T?V>gSLLN&*E;b@KvHaPqnPXvY!PzWD`La7<5v;BT594s%!43QN06EbUI7$ zl;t@OT6aH~kD{F`7vjoDoi6wI8u4o+ZHq4>&B2LwgG&8;VWr}RnG`>8)Bx%zyp6io zT%-?thE9LHr@U(ecdRn-gm;Z#{(l&I$M9OVZfi8QZQC|hY&$EqZQHhOCo8sX8!L8J z?0nhpIp4i!pJ(6u>_0VURgF=jFssep`{=#3>R9c-)9rFy6eXPgudB@&)yUyiOp+m| z>w}pX0eA1G6ZnRZr3GKzrs*DlMH^4j-~bPM-a6L?bYGCTS-;Dy=%Gdh6b#w|M%98} zUCE`f0I9&RLjqA0HG~Zem?e!PJsS zF!R_yz%N1r#nV!0;5?zjgd9r$mPH5#(oKIx&!o2{vH4XKDhVr z!Ig%=2=Og;VvzQEW~z&Q_{iOh-P^x8zq`2##HL9D8H1ZS?kj*?A5GAg8n`>1AqNl! zNEsn_zjo(NjxgZNP9jX4vsZ>_}2e9-h% zV~hR@3m`QimU9dN{^bIaDV$A+BjuF+(XQ>U8i{V0qrkk%l)hE?h!pcU^I?TE!j452a!Tb?S=4cv1tM(e`{9P!CWyIN zt1@ka_<(fUxr@i2syM>M^*`KYoeULOEElscP2-IlrSi({@nVX%Ir66=D^jTaAiuzSlP7|(1mzAuan4ie5LYNUXL3X6Dq03MQieze- z5(V)Ea_C9BgtCcu1=H35xLcpwflls^@kUVRNmKgS+;^b4;((J|0fvL-w#uLf!6WL$ z(uu>)2GHR!fO_sj8KhsALbOnHXA%&ra(PCmRn=kS+If>bpkhmUm3 zmaY`LGj|w|vv1fcfC1@G!=%rHK{!exOhro~^gUJhMO}?5@d*XB*JXQdQh(zBwU=$r zXrlzNo`-kx^c3DkzPAR9Zj&}xYc*u|NHsn~7B$+#u_?Gse7IxxbTOKpZAu{6oMwJrckLFDI7`pr>@Vd}l^ATE~ zpKU>jfXHLMxkem0BY8Jq)}dCM_sICA3R^N)W(x}DlU zv5!+nkeBwSS>!EjcF~x)wuVNKlUhVp)SU=h@=)&n><_dBFEDQlXO@5R^A*evY8~C{ zaD9=W@RQ{;+Ogpxj+a`xF4qg%S254jA?bAK!g!%@tx3j zze^FKiH&VLEGrv*jzB{%Ta@!Gi*qR^L5|pIy9QW0eZ1!W0U@Ej;~K^zndsP3%LS2h z%{SMo{o#F##Y%T^Xq;aCpcF3E(d~(iFRbxiJ&S@L5MFORy$*3#b81Dz_jwE3rH%#l zkEr|aW<;1d{*JopQnCMuT&hjt*Ac}hPyqVFgJuA96+cv;=yx@HesfM2e{)Xj+|>;~ zSao63$dg3=IT5*CAirIJ*#ToV`!odu`m7E8o{oJ?|N3n8_;kbI^I{5Qq~Zb}*z2$6 zE_|Vd3th0qZ+aA~*52ix%_!h`;`w2D1$1zQ%ulaL3@?QD+dYi`PX5!H@JRw&=dlOh z2hWGgDA5Lim@C5oNrDq*>A)D@FZamZ_E}$uEzoK$zmdZQpuGF=u=E2Px3W@`ajcq) z|I*0B!$Lr?V1&Tt^t)E~Bpke#129La6Q6I$ylA(Ih<+oH81+Z^lt)gq!1hEHCZAdI zkp2ANO)-X52sThLc=@0c6-P}wS|?HKW7YLHOWpyyJBb;Y9Efkv(GZ-WJfScdA=NS3 zv^dMTFLS_NfL>oY!WLEOx#vFHt28pCpr4eJf6hcFhua~QyFYoml8My1zoE~un=4#a z6vRG-XNIFSA5)k0Z-;b8%^JP)Dr#&&-o9@#u1jSa-*$9?XoYEmv*-y{i`puMm5vyN z8}PHKP{SO0j4`+kz6{hc`8b|v7_B@=sqfOgCiyu;YLxa4g;gfqz|_%Z$w$8{St3~? zYv~WRvL8PNb^?DB_P>-NgwzH;6d4pP-yYwb-xMcu!crjng>uUG?n8s>x9^Q%JdOOg z?0u~RAJZqB|ATw3hsID<(zpDH;`p(inqVbp;P96i-XlQBwn&m@<;SC47Gv`r0B@CL(#C zH4QVFIy<%P-FgT_;(AC}2!P_Fb1FHYeIp~=dcM&W|fV7!*tmc(D6;aP1bQla!$YkQQD_N?; zMquO>v08a$t@N!-@|b{+PR$fc$)u4l(KdiC6%F1R&yp`-9m(nc?b`dc84n4!DqH1uamz_u_D#G^_vV zen16af;^j%*1rmLW3ri}3M#_z%xY~)Nm013yt!1;#4JxHS~HO!u+CjZQ5GwItC?FyIq}tfd zQZL>njka77SrI5Yy)j!6XR%AXpDH#kqP>P#eo}q8qa>pewka(=7A@%yG|y<4ZR8ji zYl(J$#rM!(+%jV0`CQlzK*)j)up`J736|}oZ#4DOr9R&d@W=Su{6j$zBPZwoC@A{> z)}dzL`2W$NW@cdeTUGUCmP{;83u4Ii3#zv?9S&L#Gy}*puq4QVo_aeZ-{50ELx35u zJ1of;pDk)8FZI2hKM7S0%t^z0EF!nj8i`*?I5(QajqSZ{OL z2oT+mnZhvq4<3}AiNem{)tP~jq{^ZjVs_4SJ6_Zw;$VE*-$wX$0$L)lRWt+I+iOs zjJxqwagL{On#HuE=CX=yK&edi{S4P}FzQK0Apw`A)W{{kbEZ^@9ja!bFW!X@ZW?wR zE?mJH*)K0*jfrKoh(2y!Dq_uXuhg*Ye6B{Tw)d)%vFywPtY3B$fW8%JeV!{jt?$go z6sIivozgfgwS{G)q-bp^Vu_Tzkilc5`?1U+5hIB`0bkTVJeUBSJisU(6Je5(a5QRG zr_yS+uhqCL&$-#SJUc!|+=$YsbltQ*TLDRHZW|XAN)36qu%T(b|tlP6@Wt&3bV;!qcsKNj1XL?fBveqzvFIrc;GkBveWm_}p2#VupJj zNlG()l>)K(ev-JPinSj?>5>p zHDUuoOiIKmh0A>C%ueJyP#S+fXgRr2b!jaUQVC-ro&k)79R-t&(_%J7eJ@E*+9+C- zyO^9jH*NV-Nukc#B!Gx0VP$fu@Zw4Q%M>yY^RJPi;;c^ITLa40epIqrvdvmpX23R* z&7n!mW@w=#DgBZibKuSn7!*H7*y$7IY)zvmzCC$0bQE z4U6L3+ZWOzwzn#y7yuTu1&J!-CW!pTu7De((pFhVvR@D@%kMoWUfia;WX&^S$(m4z zcIp~CJwa(wv3!zzrD+s18WX4`AJT;X>j{s5==?Gm{Yy15z*EN-Xr>n!awe#~b6#V6WMR)t-<96xe zE%$1>=OIn=`I_Fht+U+?I>_lU|wpruP0-;=mMwaV{5BGG--0ZT7DjMh*6wQKAVyHrL_=c?a!6{oo04?jA< zUr5oz8+tlAlj;UDL+@;e?H!At$eJgeXLZ9uq$dh zFmXk3Q*LU7cSht?o+~sBP`72N*3aps;q@swV2rEIb>YOQajArAoDzLg2rh|fv;T4p zGp#&Zq_xo}G=w z3Da1)3n?Q#G6gp?w$w?bMJ@=v5Z^u^jYJBqh2W0 zmfkyni8t48BpZX(OQWKCO_!o#XCa#c7KmHyV}`m}=q}biAFfTIkBD0-D33qa74&9& zAF+)(AOIg_ZV+C1LdvQA2=9^HM^;^6>cp&J1n1F5({!NX1Y=B-V>tT@#<`LUr=UZs zAqnq3Ou|7!^yxy=Qy89Uc3H%UCQ}>5)h}m6`&X-~>X1fNg*K{p(?Y$LOBhGx3240x z%vfH_$yr0h%v!S81=X)86$Kw%0DQY|bs|_dGg+Kx0Xe3TddOS*_VJnYIIb}iYTAP9$S>f}zTZ1oI*E})sjhB`r(31;c)yi-qOj{x;Mq@9N(Q`&*;$T_ zZ)|wsnzJ8T`$Urv0C`tiQA{*JcakRr*p=znPe>|bEk~&k4OwcTG=!d`Uc!rSI2Rlf zA4Z&YGOtIa~ zv#3~uZ^<`p<#}rOYF!G!VU)U~dWUrf+L*rD^dkOVe<&xPrgQ%un{{7+{XUBQL_-x{ z?JZ8yac)HAe#-&RX(`Jbm3I{A0FgHy+6U7+wF-P|wjt*<-Wbp!`ZnCiM?-bab%Yzu zFeTv$tZN+VzyhC0m14U#;#Qkc_cE~9uvQHUX9vc8yp9CPrmohz&_d8{MRR63j@ohyG1Mb#;o0O_+Iz)VaIPB)bGXj zH(FFzA3^(TC!wM2T=`AzEqVLYFB{)XRxhi zlZZDxY^tlDrpV zL#NckyBp%sG3lCcWhd03UE<=|3w!92eQhw5ApF@gCU3KnzKLfg)uw&yY4-hqY*xxQ z`A$L{I;LB0z8~UdjZ&NU?0-5C;5iAkX_q>@lQyiWTEMpyZCd_&AesMXEByC(Hvc_d=J;ix z4Moewe;shE#Nn;Z`g^>;8n+~FSd+EDH~*(`7kxg>mP=;)B_O-)3Stb&t5(%U&gcIuAWk==3NcZ%skfg zoP}*-n`wH?!?v)_vAh&uU;L}f_uXxBuW1TBVZLAIdHPbS3 zG9FBm&n(_OB!7he>vu5j-W}-bdliz9IN^kR+3L(aGwQfNZh3QsJEgPOd&#Mr+{?2w zKDLCa5xlWRckA=n?bp?V4Mk4lc8rbX+L?dXN96ixd)IZve@}<+$jCKbK>JW&gX-aq z*>d}p)NT4zH%VUYs zRodW7J51}V-}?yF9hmr9Q!luWiFAMZp_2*B+e>NqHeZ3? zWA)vr>t`Qq2QR|M&AwvwJ6yqHx{9mQ)O=T6@%&pGe;$z^Wp&JLPiDhUqIPzEFrAp- zVZ&d-;M)RXI&r5;qs%=2A&T*DS!feJ4dRcYQhm=)@AgPO!I2GBjXJ2mGE31!97X=L zv)sR$+QgdU%!s*6Y?xf0aoHdbpWeG)6$*1^?=Rm&6D)A#;C-CauU1psB8{C=N18^w zUX^CMG07aG$O7JWBR1)knNY!qK!ZAtbG@KGliRlYi5ToSc+Ty4E70OePptXmj>P!5 zeBsnl&6-w|b!zA;RjSM0@(zCe-2V?UqD)LI|1L|7f$eY3!Iq{}>;eNq_Z{^+`0^^V zkE9B`xZfb`39S9Rc^d3 z|5oXf&D*EZSEPKQKq7w-Q^LGe)sUCJUW*idnQ1 zF9CAW`P`3|cr{IQAo?UVINV#+cq;clHV4jrWGPS0=(P&UkSFqLLP5A2+>6yj$!Gn$ zOG_pm&SL5*&RY)XLXmLBye6xD)RkbqJS)!J{S6GppoL&EG5(BgKQ`$4r;9~7 zTB5_>WReag&Zr|A29GrrSFnip!x%lS6pOWAjec)DNo;wZK(Ok`h(xU0VPeZ1nu?c% z7AiZwP1#XJwFm6H+tWDiA8(S6wsDVdTHLMj0NQur?Wmlpbq~DVY^9-fSt}{#xVlcM zr{Pe(lzzqVxod!d0E{En>h&riXNUuQ@ZC#!m`25${z zVO|ecQo@u2c!KU6HkA=zFAs(|m(nnvYXp?fQ+GMji)evg49V)8z~8e{H8(&-wl}7A z>eZLZ)-%m#D;u}1a{)gpQv0$5SRf$3mD$R)O4i@cO^T?t#HMJ;K*pgwG*y)EQ)m2P zcEcj>v6kQ(c4fsasaTjQ5#;s+RZ+eA=3LW?r96bYNKP4&eW`37i2U>R*XX2Xi3tQ(IAO zX$$_fVEu(JVqs`Xs%^yhQeT7nAuMyVKXrVlRjf4SI2q%hJuoK#9 zTM>8_tK)f`c`4l<96C5kTSc0mlF`Blq;$+*H_W_7f;tf7lV5fQL0`rPf7bZ7-p4gi`W)96LWkMuMhmaG!tTVQTC#^jyN=I6w%?79SA0tV!4M8 zhz&P&8y=hsUfSLzK{%+g9*zuAWcze9m-o%c&hvfpL}RDg+?*Ixf<` z)?ph&D;_VKFJ!N<#V0wLKVohgpq~nqRNqd!AI^bUQ8?iNF4!ztB+#%L5E=QjD-TC^ z3TjLsQinF*0O=E-OvN)}Y#ZztuGnZXAR9q);I?YmCvbUm{R2sSjwo(e7Np37I5vcp zibGTEz{RaGOR|z&hs1CkXJp3PRq2$^OVy#-YrL{FypS%9yx))RHXy#MdS^ zbL4LWwVg zX|fcmDf1YPVg+%2ZU!k01}~G8`?^DcW(@M{n)k>_t;A)XaYc%J16%4q8)E;Tqrf&Ht@U(A zb5d5pm`PGu0H|?Ytb7|?qK)Nd5*s9NMvXRIM$SZ(N?!^K)d;&z-ca9CdC7bV3_ir9 z=c;w)ys9nw{45DRR}&JOSg~sFKJAl<4jk&4D4R%Fbw(RLZz$$tFdzRFCZ<#e-rT^p zctHn8KdO@Q~wFYppa`wgdW}Mgy@ZZMJy<->6i&bm+hv; z2(`3p11`n1Bk)_}FIp)Lp=`A4AVc1R9c&A8(h+3xO7vs(mb=~OXP%d?pu-fJM#jZ; zulZ8pEb6u^xIZ_0_z37=>HmZb?Eh}+iGh*je-f`9rb{Iv6MpMmeL{Wq5;+0Gs+8kY z%~#(xXJj7srA4Fjo(%QSPxZn~nke;I;SH~6WA#_+?y$fR`#}9AY92uFN&V+R?A;l^ z)>iI{KlmPm#0R<@C4$?0HXOg7BY{x<^W$698~*o{WT%hmcfNdC-jGFRs9BO|p}I96 zZ4#4i^86pB^Hs2knaU?125|_!2<&$CVia$MaX{Dbr@BrdTXzOnRuklFOPlbg%kNBF zu-G=&PQQ)cG-N5&n6JeRNA(gX8>pEk(M^TsT;ief*r}F}nV|&H^%|}zS(A}i?PZ91 zowi`rRrCqTjg$cRS0le`Z3F$}p&3M}s*j267(${A5Qk(g;`%Bzylm*5$21r?N}`zO zI6;(pm_ptcSI!hJCkK_}>>w1TSc^HZ)B6Zf0wEv}DjCt5Bn1}ENoR>VC=LM11=tRI z>*08StH`nSu;YK^&}b-B?HC=y$GC*d$-HYIH^|CW>jdcXSh}YKC|k@!XB+{^1z_bX1L|Nk$vm)_s%ShQb)u}}-j#BGOq+h%kzhw! zko;*7PbobBnSQx0TT%c^M=wcHgKI7YDFiXQxRWL_emS_s;Q|Ne3bU><4;wlcFYvui z_bnO6cB=PVKV9mbNe=2U5kM^G2uWYl1lMaYt?|J)=K{keW##Gyp53DW+m5Pu~dQCcgJ+Q$yPsbw(l^_ z%C!F@VZ~Gr%wwBIvkA-OreIQfk7M)VPRQ{$Gjj0!4~~Fz#gTl>{fa*#}=tOlK4QAgc`%2hMjK2kdus^ zy$8E2+j7?nrx)!(G7mTNWh!?8YW-57YwW2;FzVq>lP)0>hc`w!PUDeg9)+uODHN+I zFI;&ROE!7^k%B4?!<*Ek;I^0hn-UPX?HgYyfLS{Ews z6$;^zJ}of|F9%BnJE!I#>r`GXX{fPHpAY;Y`n-F36+pf^*b<)ECD;f=zv@Y6Se^q^uC%31YBJ8?< zm;kV(cfnn=RjAX;%b-K*q42&a?+bPi=783 zGg;49lN)zmW^~~FEbcC+KN}G2`Vt=Zi$RFitU99wYho@#d)l!D*u?dd$oyGi>GEm# zM?)iOeK@W^nF<8p9l7^sdBQkHu0BCq`UIwH?s&15#GwVAce@F`#bu*LTZ*Q=d9GG@ z>QnS)W}uH&7^{P@r6rj~Y_n}mj{6#(<|U5GB@*X`6qL835o7X`2x>4Lli4`rvq#5w z+YkP$VWJDWO*jeRjXGyc6gibB$|T8?)*Mb5;(P`X=AM4 z0#4!#u>r-|G+NVWmU{PHd$eFK?amUHXq@6W!Jhfd$tZ8&D3eAa-?&aUm$0fL2w2Q$ zPfItXuaG%D-?t6fkk0K;f8M0eD_Nk4LPL-I-jb7q*JG=e@x{cfiNG?b5Ha zZn!Thxo<^X%BgagpPFm1z8o^2F5f+TF@G3b(ndGljMlcrgw)1whSKxDA#Ol+K63Q_ zd0;{hY>pzX;S8}~8NF&H{`myj$`IYs1g_b$%o;k7SIGLk5A4s%`1TPz`Q#4Xxf(YB zS4@T%hW#8POt0u8oF9iZz=t2^v!EI-rSUoz|L+Pz1mEfl>(7I|nIOn+=WW{$3-BMe zd4c@L$a;KgU(iIp+iMzEaL?Q8<5$4qE?jbcZ`Dt!ouR(oU9$qSfpbQa5HL2Pet@d zU3X*^%pG;K%|+Oo%aX454+Pkt8o=tdxCUFG0_FphbhE5TL>ZIQ^2R_}6a8hE7{ja=Z|Qyd&T_wbR)MAxqIAV7;a|9ZG2+D>=$D(ZnUmHsg6@MPO3x znmMWhmn9Ys)*HBZfQl#}sqMs41;!lS;{Mw*T~*{w)_l>>qO9Md#ul_HhR2%Nj2u^bf|gOVe! zQ*zSyuVbXV8Gt^g-5>*6KB+=K=RQO{+nMcFLv|@*-^O<^<23EyeWVF=rRf3b6W74u z`$=k72V$J(SXS;sl3Bt))WT4LgRIV{x=BX~D<2P~odrLw&+o&{j2*zu`gmR&Q@3;} zd%V~{j;|Nsu(I)ZNO{p#lZocU zikia0ZYUQ@y-AhAxnUoB>OjWD+2htpC1)4PiP~39cf2cl%mul}_!Xt)l3O1R?rDwh z$^!L8j!hfd=Xj_GhJz-<<*=p=M>uJ=`y`1V!zzUEeei`{cXnd60v zq`d2m2bPMCmp!fX$F?XwY;?S&Wcp2fT@{M(vqf$77=eGDrmDtECi(z2{0%?iZ)isM77l;ZZRDRB9FoQ!A4vJh1S5=M2RC_`{T8;qySeWR;?G3MwOmEYci-ipD_kwhk@A}a- zkJL=@T?+r|YhRk+UR}XayIr!y@}-#vwUS=PLv4msn>j%UPx2rICn<^#3qV;V!%UyP zH+h>fvZRh=_Iz3EyRAKWWps}|yBfwV^cm8o=x>CO$PlgOHlKF{uAry;x^3r?$5Ald z8FNTN=V9q12F>r3(=k`0fvzzG>fUlH^~Fm7++p_{4Nek5?xGt5NhU2ILDNRs05#7H zBvAAdgi+#lU!^k*(wcnXSC%;iV!R&@LD-m$EGgoI8nhtHcFuG-1sZt1TyvBrVqqDAF40EVD(U9Ym*NBvq^ki!wEtSn<9UBlvjNG9b*KWm~+R@w+~qU+TyUqqEMlY3&fTh zK0j)Q11h6SVG7r#!hvWiLqEK}WMPR+wv);QX`0wgF$04|HPtsh_G9Czeq{wf_wo~g zFKwpeB%Ii(iw6r?_8n3!;t*S1n*4pFG;_Tecvugva!5^B=h_01*ACOFt5=eKkR%oE z!rLb=;XnzybElL*)--pmfzq66VXMTJy{S?tWZRud6@!b;28NsW`r@d#&NMi1R<6Sh zMq^Jh!_k0LHb~{t0-t(QwmF`Z4z-dQUJZ*DJRBKTZOhyJcFx>VLunZ)q;tw1xrz{m z_(<6{XnxAJ$}z>W&}7(X;q_OFT`!3iUE=<7cB%30gI17AT4D@sRMV!jt`{Y^eb1@Q z>dMPpOcN$e%UlI9R zLRvMwG=Ho5KoSlVujI?J?x^La1I;A6_Gwud1R*>NK~$DWw7!`DPRpB0=bp&4)|QiP zwnVq&%WfSn?ED3!DcBpWGUYq zZ7wkBnQNYpjqWz)xg>XPP9#g>jxJD+Q410?|3H~SyTHAQ{$sDaMlE>8q3*oOxW=qKx1Wy^RQ#z=27d;Hr~kHsr$XB_|Wa7fC$R>JMIKqA3rM_~Zb-csm`UT=41r0tPvf((LWxIh?Fa z+=SY!9ZL;h*}VkL5B|QE8;=3di?;yzbk*HCRkZb#r7Je&n3t`Ri3rA7m8<*w%&Cf7 zyHnykE{4Zr+zS*88{Dk4)CTIPK42)HjxL_4%=KzI_WSnMNg>PQ37KDEH5cJR4B)oV zbAyF3f)jg-2t$PdIC$qHy$cT|GjNkR+5WdZF`P#YW`O2xVy*^S6f7*_O1Ka4u7+^@ zRHwf6SqzY^#yW?2E603E80Z1#fg{{C zH;akNoTw`{Ff7T`s4V9WVGkyizdJE72_24C7lBDPIuY0!nQ-J~dqe2@$I3uUhYI+*z z$#)rGYIQ7zlF=FQOu7;#f~Dgkw(_~KIK+7Xxs1aMs?6=UQMi--nKR7n|FCK@bfg{56B)W=4Q9ytl?mW?7y5I8-TOZkFZza zXFFNxBeq%kzU8;hg9ZvUZMgaZXq?{vQ=&OD`@eDr7#TSJra!p#tv~qvci;8&muPD! zPL1E5kU!fGTWfD>kFo@gZ-xw=*SAB9#0FfA1au8?m~f<_boVZS6J(078J(NflzXAvZ@#QOC{cmf`eBZ4!W!9e{{8x+^m^XqI{Ys(sWy2Qkq- z`!SixDpz>EvRzxDZ=Nx`lz8SqMNthufuD7#Z;G0D5&d2Ac;gH^kE1 zrdoIjG%v1RnggmmDWBdD-;@a(dFRbp#tMxGmjcWWe+AIF!UzVa|N8BbzFS9$Ic7@R z0MFQbfgFOU{TfeC9L5*T_rUk+CkUbfDYwweN@*o(fdMs!b+*dN#IcgxsFxp`wfcW^Clb$m_ac_ENJUdiU{w*PFv(SzuGz<87e zH)ypwkOfOCT4##DO;t(CEm*@#8pWn&5ZVzrG2IH6lB4>Xm|bqF1;A?NQN)uAuAWOA zrVl2L0D3a;z=u+{Y32xE+wcDbEYp0h2fvj3Rur5nR3of2rTOl zCkB+IU|yF1G!C51#D^IoQ9c}ENZ75RHvv$4`I%@|U`N=#ifa@WFNhG-9! zWY}2Ol0&irCWb&IMDIz|olJ45Mx|(8A=FOK!lH-^ZbTWvd5>wRsUVEFGKuQyFzbO_ z{!}89pF`o(N!a&!iLCNKA{7gyC}4vT3k(@eXk5bDCl=04g$rkaArv?(HblT_>lp(# za|L~f08aU61LuY-IPj?Dus0sSbP%w-{I|E06$lMUnOF@qGv`W$#PMTAq!#6h2*Jql zTVSLdrjNhd=B2Li0K=&qacGQ z?m91rf^X#0`O(UR*m+*rvd8Md`e>x@CqS zykc}~mqG1#OL_ERT=NoN7WZ)H{NSUnn179LL5JKdD%LiVRZELZJXo^I*!YRe-i z-&)_F7X}%FpfLG`Oy86j@P`qED^{HwW!&E6FFF+SR_X7+~RiHcaV= zUYBAf-6=xxIqm&8WZ#t7FAAHofP602TCfAwPo!Jz@RNbi@oYByk^;F`fw=R*HOs-b zI0p$>W;n&_a>kbxhVJo@)3wIX=f^#Ms%_uqf3h?<|6Qdt1M}Z_2e&jQ{z9P6{~*wq zHlP1D-LbXb_WY~rJ;IR7eYPFNylg-}nsuFmk<^i17X_`7eLNBC|vMK$7TZ zweJ>0K3-6qzLHEU_{2`-HO#Ez4INBshS_&HCVD>rE2L+SR^GzmS_!oU?j!6LrcIM|GuKpA&W3JfbT+|Dc^8cSg^`HYd0 zu(uBdsb>FK03qI5Bvq>_^7Y_vjh)H75BernRv4r_x}P(BjHnP(v}aKet{lMagxVjz zV4D-6Vk39Fd>^broB|}OOXH?f-&kMNe;XM?nnaUd9VeW+H&?Df7P#(MAkwx7pNW-@ zG7H9(E|J0{BQ`GCp0qj@6H^&ZOMtT?o2{ovRNrW;9o4JBGp2?LL`C=j>U5N4?4X#D zr?1HID(F-w_!7oSdDUHqv!bxVDyAYvT2x~*J42pcUb^=>PHe}=u)l-kl+k6ouIO(! z$9#f^xy*;0nLR@_sQlw1(wuBe7MEH>Y=2TKx*0);xh~nCvZ0yo{K935x*b}Hr1obG zWgZMm&>f_B^^0}!N5E-n7Gq)a=8q|d?V3q1c5jrp*VnYM-;)^7N=$&YqDBcd)8EXg z_RuOXbyLVqRB8kv4dwBofQ4}(Z#PN6!Chm(5x1g+(>R#7-+YZ`Bl)WCIjsYn(?nB*s;kmJ#5 zdJcqzHD;RZlf%PKlcL^OdPISS>bzmS>>B1g&g%46m=n$PTNz7+kKKTBQwPwf&0n=N z27~kqjju%7apHd#$|;Ac`c_efUU%Tl{C-W942!W>yC28y%kIliK5I*)$;LECu^AKv(D6Wc8iMfy`>>B{m+;y|JIY{HOkM`O5LosK9sJeLLCe0;}kGwv$gmX#IlxKS2!n zVBfy(4+yo~{^Pfz_pw%?;0xX1;9097fuE0o{vubrN9R3j*B8)l&J%oIEYeU{!Kqdq zGfG8A1gsm~@AYUv-QWHTc*txio39N&b1|>lHmJRM7^2{=uAsVzkl-mh^(BnV@FEa> zK28~V(%ZNHB6oRva-*<_eg%|oLl7P5Ea6xWt4Y>%{Cp7MzGcKuwW=dYgB$2Mj?}h;6%ql1|eK= zUC8ManT*y;s?$EF%^)}xtj4ZqGb9lp=7k*@~@s}DHPeCJqkfb)OZ{pHMJN&ZzXq0 zz)g1`;F<4t=gOFdh3HA>FAfJ_;HN^7Vz9xpz4BxX&kkN}Cd4b}gOIy$WOZBzP|qcr zTp42Po#hc8Pc)qyl=$^Ry9a7Mv2?IlhdU<|-JP&rdD2S-Cz`GV3U2T9H~H{STNh<# zH13z<*2||VEal6aDkc249AwGpJV~nQ&^vEwDx*?TJe}Byf`7Yp0#k7|V&|$RGxB@% zz2~i_l}(wW^EiMNmIr8K+SH`3JbJI1EvD5mPH2oQ&PFqy{~G3->Q*m=Nob!Qac-vz zhdRaej%+%v6)03NjvD4Br>MmbdrJSBl?rjy(w9pSG!bQ28!;~ON-qul`E0gW{t`Ae zBd9~IgkHpQ5P+>ZJ^(4Jc;3$mXzb?Z=ESV7}LBD^7r+ngz{nnjrW|uV;iCbyy ztzou|!9>4g0Ht0SZJW)TRnm^s(}i_WZGAiz^(sKPQZhP-O7}dk$+1U=Ys&ZFehI*V z)^qwoWqNM(S$#V?S~Qsv+k?=`DdTI_ioh<8*Yp;wf_}8J#RgKy-f8Ue?fZJtZ}LqK z3#)d)`h7rFwroa)c}U1r#chf@Q;_XVWi_2OWd-dvxsLJD*b*J-$doh(X&SR!tyYn^ zP6G@P+Z+!^Gkh+bUe&a8eO};C2I4jT34i`wMkgop-!mw_;b;8^%*gcz${lE$$A!CO zm{74x@pki}>O&pMs?<|m*Zuj*9fSc;N8Aqrc>xw7ozIQWJr2M>R7n6nlzVYI1U_9i zrQkX_uET1CT|(raP>??ih*&lL5H&h8fqX+S+RjknGYdL?4@UkEFbK)Xl|uv(MQWtG z!&pkcPtZKKIq2<>U%7X+K$PMzIa7z)FaWLO0Fn0Scmq~~+k=7HI)$k`bidK?R(|QZ zW7mvtcj|2po6hmDb6uw%QQ>7q`Q(VLM6sFdXF$y(*>I~ZcV6S=FRr6p&N(>5qH3xJ z4em2lGIiI(%ol-pd9F%-@t6YZZ}=@EC2<)U#N$T7l>$^XEKovJUUV)P?>O_Z)ky7A z<&uvLMt3H>X~!B?K&(e-8S2MZbIGRNPT!G5D2YQVMq;*`LyA$1QDkUKDBcsE^^>(R zrd!JL@3DY0mN1s^Rmdug3N&#UWT-Q9u@IcDk)-qRp=cODiZM#jK}!XokKr`Z;Esp? zvErCs8OwExfb>rp$K{&Sc(x}Y)YJ9R1Mr~|vGzG>e@|ooKg5=G_6E?7@%Y+Pg)sZru|A_dMWb*#8o>eE~+sH?4VQ)vBJ3NB_I3nSSJ#Ji~1BLBx8}K zk6#L3xqMw9Y&cv#R2*k;WD|_Hs0wBpK1{BM`$bYUGj|c(eemc0v5pi1COK_}qmYvY zzVgI+2n8Wy%-ahxkv;!A2>slg-}^naU~&~3KgzH>vo8mV8kOL{<9tRZOj$dF@R|wK z>QDHY|HIik2U+rL@7`_qwB0>z+qN}r+qP}nwtHIB)3$BfwvBgxPrNto@7y?Xie@H_N zB2ZYRlel>GooS0O8%9>hvMUl;7To24qz~`uG3hlYmpqL%Aq*Ye!&(p59Qpz4tbo4N zs?E|Z`t#T?;Eb#mW5}WcEf*_Vw^M|+1YZ1tG~N!S)<@5a21kV-*cTsvXJ|SMoHRy} z{Kg^Gw=ngO!G6U=zbJmT%^S2>uN=3B7rz>6l&&TeUVG$`oDrqWxZ=|$*%h9D`9yO- z{yET};og_+HrnIR$?x|9Vd74J?&Y|6`vcRCf!_PpCTH)qpTFn!K<7XF*_oLChhFOc zweXXf<=+-Ji`t{HB+W>j@6>nZdi9vF>;jkqu*R@Ag7MBcC;FqH!VEk%(PI9e&%Q`0 z6ZHzlIk=niX|}G+)Io4VcbL+Q((7|WRTji_Z22*NR|ME9CLuiLtJo;CY`^R`Eyvi* zwNRP_w>_^gjXTI$y%fkg60Di-#fbQ*aV%~%HYwbSlJ3P)E*o2|7Z%LU#X8?;R0T%O zF2S{Li+1F0Sgwja(fyi?@u^?bG4gBxK0$wdP|luKGue>pSEaJb z*Q^g^9UnDr3Y?3y06t)RS?s5)X5*z5Z`Pa1Nw?72N(MzyB^7U#*g+9fR5Y?tcBQAK zjac}%!tM7kRpX-`i)X2T&01>fyY+T`;-uj&CwDEEO)E$3jYQ3+naTKO+~0H6#QVzQ z>iGN0v}%87HcKsq-YWk=Qk+_nS=Go}DP+46^!fzr5(6wu%Glicm^)R;RWXy_L%*U4 zFy}u1+WgM=ob>rU=uVp4q#2_o)UcRqjh8;u%wrb{LHG~^|x0GxR&XJosXh!HX z7^_9VQeEkjYGF0`Lj&{roJ30(`qsK3@3q&Ni(JA?xphW3nf3M^L5?wH+940J>0D0kw58x5U%0c{-Qrs!#`R0Wj ziy4l-6$$-FC`DW0jx>=^;EuG0HJtn?5z<%C8FY$Rejwz9dj1)P3$m{#4T}7{3JcP| z_?5p)(jmf6Nm-s}$jbR&K?#5ro*{2^Z4c~vya;8!fVQHNnpg!;prwov1b*cokU1&J zY%c~+oy51yBI066%6OmpzBlu^QnwCM)hL|VdF{z7C`HsnpD?S>97A79q zBIpz9|Hz70W~P_DR4({k%pr>ts5vycinzeEFcM0TFnE!v?~%M1Qn%a5*^Vk?MA=T* ztH@}5fS`Su%J2W2dXN~tUnaCEq5r8YBf$t30rJ^Q=&DeE5BCwO$vu4oOf_kO&?a5d zek15vL6*j6J!4&TTa}f8dW?k{UCA}ApH_Z!WCs+XIT=pz6j^ZkTS&RwRY^UhOYl1; z35K@xXh@WBZDFI$-0|IN7(OYqU>zeHD%4gVwO*t;gH@FwC^HLlUT#H!+ZNo#zTg!! ze`%6HAIfrbGTM-E!RZ!KpgQdcA-&bkbpvKdFn0p_RY7FsSu^vn7W&oU_ zdL%!PZtVs9m2D*boJhzfNJZ9@ z>6cn#o6plX8+%3*do$dHwA(&a*Mm&W-ji-x$)2>EN>$gx@1FO$zpx?nn|i`s4;LRb zUjp}!+!0rH4eT$w8G_#zf5#ENzmD6-kFU4+eLB3q*X8gpYx%$LzOK{gbNN0VH^Z8t zXNW%CU*`|A#?$Oh--eH0R-V)N`95!)U(cSqzn#^>L2+%WU`J3O3Te|)>c z5;v2h&QrC{D&#(MwuYG$Tvb93Wp zSLF@&`+WE+`egF+ck^?5U89kCX56~J3@gj)_Itj)JY28s>iW33(!&Q7o$k~7c|9LK zE@Ld~Z4X!%Z`%~JZ0^1c{gSfd_BMiYk$hfo8npB8tQWQgwlJT@7S6tk*l*?>NNOwY ze8faT?jp{!+6tHx;JZXqrF?D>PB0o7=k*8x=?(0+y99Top++rl#=P?s*KNN#5`(yR zvh+e&^X@9kHK{$iYvj6aY`~M?3jOFj4JO{GwS6b3ZRqD6jPGvF=^?I5v1ep`o$c@J zfk?)@du~FhLtLuQ6-Ur+DpNKZ+1BFGMt9AxRJ!(GGJp^&Kkppu&#{N>YFCgm1?K>q zadJQV39co0JiT33d(;5j@Zs0B%}@KS*!3NchaT-Z5JvIZXEp>~cS!7Q`%_1xd{a|` z(6`P}&{+SF5*!z_7UQo2g`gu=OY`*RauEXS8LxMZ9?pDw?KQV{S?tIYUI@>#&es7v zKf4xT_-T#ut3t*lt?NlMx|i+@*^ee^g&KP@-Vy)Jtm%m!bJs9FZ#DD}J)>B@GE&ETHrxl&ia zuC$VU)0>S9#FG{$9WL9edOf38hgk0BlKr30mmJ+W?{jttX3v@*u98;WJ_O$q-8$xn z&0*)^59=XmzFsSFfE~uC&0#R2Zl! zRbG>fzU@3M_6Ti~Jd7`RLZSf59mf`f&f&xLa9$NnLRNeg%*^h^kN zV{5f%|7a?Hg<2rj2638MJqO*ecfS(Yn7NbQ3sp^R>AiYge)q$*HFt@@Nsjwh%f@Fr z4b^wsE{U4GW=)sG35w4p9XRq27jLx`&d{uQD%*osmUx7|;bD`x;(mfGN8i9g*G=PR4Q|GiK;1h8lb~-5#To?It zU9)O{$4%}a9fIJ*^tt{p0Y1jXj`GqXxVVF`c50xKjv5BsSuL@2Zw0MFka=tk9nh4H zDn@jD561!!@IMFd9LfVC0R17aK@C7r_{-^bili9f*cnEV*`q%^ac%YITv82tQd?-i zm2}N0#Z(LdXRW9zf`@$VF$Y!B5yK&{@12DxZK|QeY=jSJ33vlMR1q8y2hcK?1_Qu2 zb5Q2$->^UK0%Ef~baWZYyOD<{>$|Sv!2I&}O?C91NjDsvboHKATzaAK+5NNm%cXR}*&TW%otLM1UK(bz{$+ld_di{p-> z*>T13vFy?xX0s&|1^MVC`;z!FfwiET=&_qdf(l23FG2h9lK8MCn@+Q?k+Xr*Fjt7q zaVIlM!pCQC0OLhu!v^C-WC4Si*Bl34iHd0N2*jOQ)_ZW_&zZ!Tt#$QdL&<$u%q*a- z^Vl1P8}sgp<4ha!e%gPg0NlsBXp9$Fjd_YGkeQ~|%wxw=o$eh{XshU9u^xeqanorL znWo;%#Z1P{jU#?r?@HoNYOFF9(gM2hoEKrymJ>^&s;%}ViDjZRz>i=t?Nn@Sg%Srs`|}Ir3IoeUzKzuARFuqf2rZk}evDF>CMgOONYv5>{I!aVB4;;*-2L+(K`PV~#kH z)&W})>#*fm5$hzjOy)7S>hegqJJ~h!se>IL>wwW-zz7Xx7DOd|h1uemq59pgm@Hy$ zsP=WG=mS76G26SAEAb;TavK&i+q-h3=n2_hntD?d>%iDVMb=46Y0P76BamXNWRvt} zvhxDt0j#o*g8Pq9e+Ns%$UEtYhuHhH0~os`&&RR$aSrsv-!a)eXDPJyF)rSZ06z@o zC!hP`sG|YveH>{J#&tk56^nNS(o_s^y=ip?*3&{x>PiTJ&kzfsB{)xj50y!#!(x_f z1?CA-q@6^U8K4RAD6qhETIewauyVOS6rt_6gDgyyJRXnG9J&Hk7%zSV>=RF?L~fMP z)Uz!=YZWiC3_E|AHwrOn2>pT#MqC0*`pqnd4k-I_7d^jBSX8`}q zWKlqgm|-h+0MsSwqIQUR*YV>|OtH0gwCr5a^(m*~dw{zv883@j^rZwM*wBjcoUqf- z3dCy*W>zt)Hm>9>M+-&L&&1jx*lbX_)Nx9317iUL{FAqagq#xW!{u!z&eoX$YC;!TSG00W>A68u~ zZ2xWE`rr7vfUHsMItOCMwb~8j1ZkFRJv5v*R6KlL^Tk`!NGOv&CH`$U_kSM&-FsX?~(@7&-XdLfDK-KFNNMmK4X9_;eo!HEF!``;tI+h{a_G^kQE_`lz$XpJ^6r(D~Gwi3W9$`RjLy zq+JMuGvZFU&;G`i=Vcn>Wk$NcMTzO5dtkPLM#V855d4gff_-2 ziPKGt%j0m;56ZK!aPcqf2F3O{j3~`;^`U+}P~JnL{bY5=B@I`$1ngF#b%HqmdTm%n z#u9JjnCrN;2Z0~#lxSl9=aHrM%*H>j2$QdK(9?y!JK|RuUV(L{q6Lum>HeK@YhMWf1bR{XJKDp;uhdY75*cGJeua- ziSjs)a=_?Vu6;Icz&O~`z|dhOc(Zld3)De}$Rv{)=|4TpQDTpDd-zCcF8G;$XRI3$=AU=EA4 zBb;AdolZbe(kQH&-|o~6FXM$2j#7&HZW)~9Y{1Bij%YMd@o!#?{*)U2buB=K+dM-V z_J}`MS&&3H-6uh--^i#)F*W~Ncn_w~hHkMU_fjBp`AZK+`eUoWM2bYU3PGq9G19As zJ7z&U9jl_K^`eUA$3lK;JY|ili*78Y`L9IpfvQ6h6L5|XRRZgmIsCnQ{BEFB!$1Fl z_{GG+@n0sc+5TNR^KVl6D_H#(`F!{pEzRx7pOq_9q@2ZRUA|^5D}@~qcVsv*1v`FhBMOU|x(44)J1hcb?lCKM58z3`Y5du#$|0QdkahD2yte+3>mn0@4ic zjHKypmfdL2BhHN4Ibv;{BE@E{{MMV+L$t}+#Ik?ai5dp=)VvFxlvBo{{C8I8CTJ4*{2??LtE)#q(s$vNyxiPK>9Y z5>j+$Msdv~xuFCemCHg7@-^ZiB1c7O2~3t|jM*|gW7x!W2;bOM;jE6GrwHamtVoed z2sYEWs~&ZYtElP?9Q;(dLEq*}kWsMZuI+|HS_^{K5Co$NJPw@uT_xo$7Lgob5=qHU zs3$1CtC01h=oa%7aZk$mV$#JA&6Fs=LxD)+VkR(Eon@}sXDc1|CfJc@v734Hof7Z0 z>&ZbyT(ND&L{v8|Wh3bU;m*MmiH-(sO0CX6MyyF}g#nvAO94<9_4i85vV~$}bx$a^ z2!WGE@PgfSf_UQS;7X9<3 zP8=QfBZUzLKu}xMXh_%>wA@T-;2=~RJyly2X!1spXycXb6G&RL=aq~-x3`-XFBkt?^&hnSJLObDR;48kzdAI=L%`|HeB!fm6w;K&0$ zC4hC+IHI7dICUu?c30_Z%e&}wFz1~X0gKACw*!)iIA2L1r!9Uy-ea;nL-3QTg_9WM za7X(-rp4X_HY{O@n3u#o{8j`l#27Luc`7bvqRv3*R;HI(EJflEFVn<`8}f{h z8>EY6rIj}L?cuGv388~~ zX%a`$1e>3}Rl)Mz!STDln|3j){A|0J1g3l25$SRYLlB>Ip+KFb)ZZTAxnwcc8^n15 z70R)}hqjlp91tpe+};7PA?@XLH7Z>6HPUTt5T6}{Rsfw$GZ`;Cl#P?e^!XEFiz1g* z*~qM}ym=r|Po1|!Wy5b`fG!`nYx7F&o2L}03r~QOu9ycoa3bN4d4trjeVVWuCl=p$ z`P=e5*M(x=85s78^d#=XrqZgs^WrMvXky}f6$z>wm%oZG+8=etc8K<|%zEFH{dH}I zIh4l5kkY;@5Euz|;uK}YKL2bHamrpXr1}KzYHw;Qa$`bq;jCDZoOMi5Tqyev8Y}zX z%Gj5IDhbk!QOzBK1uYHYwmk5P=&d*QWW`U@JDAZhqP)@es?iSuk(xubskm5%>MmlA z6gsQR4303OI*$6%2kOla5aoy7e9lwv*h!iW&R5YVE9nD_C#Z>Q7xL=TJ?chu0Xf#6 zo>_RctpYw%?C4kR#h|;CBrdzXuz`?$=d5FWFMEAf);>V2>_6nd%1vFe+sm~`HQJ{uPs4V?Q(?TXu9T15KPWELvh=Pl5*{8#99>P z#ywh6e!$iFCFA=DL7R#}mh5h|G1t%Ygd2%nhE##%+g!cU;>@4` zE6X_-kH#|gpfa`f?7V{{aZ`d$;9(EBy^IvlK|`0dfU~M(F*WULgL!G$>eQ{}CZ1 z7BFzNX{M?xu;<@OZ9^6fO)dP+H+Go3T;U*l95pBKE^TAfLQ(A8+N06JVQ4Kxmbp-K z?=8K?&W``H74Fa0ka#x1jV$D+vlt8~ub6#m(|$`UxV__+S``rHPA!BtKB+x?EU}+9XiY@^**038xe*BfE1R$5ZXI8gV;CNfjGA<3|EDuxJADI)3?_$Rmj=FO6=2ykAr;VxYpK`C6xu8r7=Wbg*FOV-hH#GlYam32> zU(QSz{tx}jBtTLJNI-kRbPBLWERZ7}Fz8d)X*F+z;+>VAn(#WOb$&@m+R~6)6;4TR z>a!YaH9e5OGRsn<$O*xUemC3*_(^T>&dsvgAaGwM#rFnb_ysG&45qN03=}a;jbr+7 zevx)X;oMq~^7;M|qQ(Ny?;9zb|5d|Z?MIW$fnl@}2 zdgfwXl?E3JV^-{k7X}(anx=xff?(4mnZ1Hqd8~@h0O(S|(IRCeG7-vF%ba%^bAd8N z#e)4;cMou>cIE=%&K3^yWyG4?S0qZ4OmvP9?;U~=#rulW6aVb9cbW?wP{PJ+MxvLe zaOI&xkEj5z`x%ozAi6@~N@mEcGzgJfba5%UL#RvWp;Q^%aJw2z}-%msPd$T6f#! z;c;TQr))5~a|qvjUB*K1cs*0ni#Tp4yI}LL^FVB8t-bSz`61|KH9gul0^UVXRd65d zW+j?E(~@00iv0LS3`!8E%jFblgZqfk``cfF`#>9|n$p2&X0b^1!tktSW!Kf611wLj z`~8q_#P%-mDQ4M?iD@2FdCuM@s=PzZaZVE_yM!f6Vg1AFs{${IS|4`$q<`E*x@}&9e zg-ZTy96DC`__Wm$CDsO|6wlHjWOudwP4(Wa;(^-lh@L&Z=ie)9LDy5=yJx3vNK_D|RbBUv z60=~5Ts&G!HTLRU$wJ!W#2A*_%ATn$vuWe**LzAjXxk3GqM?(jkEF! zoj@TGq+|t;g$~sxHs$)`tF@nPzZ(-Y!DAAqEQ!l7aFVH_lsKUz0)oY;2BF?`?EaVc zRztrhf2b07xW^ZQ#=UdFS>YW^AUW7bQLV>vbeD*Vid>?u+D_Uk>1ydHhj%VT zF2~XGP9>wQBnZ^_frM$_{Is>D9GLB(Nk8NI%57DC=q-zynfgwnRCPoK{9AC*P_wOd z-qmYx{%sfh>iT*nw3bdjlj3{qs>6a2aYj$T;yh32TT_@J3`vNg?MpTqC_|?q*M@0+ zyhFdV{TvpiIssXnQv3EJqGUiRHF9>0MDC8;Yk^1-yxmqg>awnTy`z4+--UT6zYZ;U zA!y?cs-;JUUQuCOA!dwhQxU*-GNuJ<{HgS1=NJ!8L{l z?4=j0@A;>gNNNLDv@m9sjeA@7lC=wNjI0P`L@_A4A5S(Gy6@q?{apxZR*hw+<2yd8 zpgWSng~?^pc~_}_G$uHwFePPI9Jt(aqEID6?9EVPviM&A1y>iKJU}X4n+4qET@WOZ zOA!0n0Mcdn}|2ceAh?jESj=3YDJJaNAV^u11Vldp1Vw% zRp5uAPfPaA!>_E3AH08$k>>(xN+s=o5x)TMDFFgVENY%BKlh!m24Arci*nC}<;g^a z-1Um{0Q~%Lae}BR!w8g_2B?>LrGUzXz}o0s$vkHhxH&x|6V`D#le6h%7JR~t_2{F5 z3~&WCR<>xU>|gWO`)G0r-7ia1BB|=It=^h4h-W#IS~o+|V$jJ6LoafqDs<6$p1fwm zebWi_WUx!JQUA=CHNHF>RQq;M&+UwvDLjlkB#km-d-oxm0AC{N9W)|lX3xQ;xGx2T z&iiMaUltY>Os;(oFuW-2n$nTToQ!r6?W-I)7=p#x18YM9wFM<1bEhV2QtD_3hn!+a~Lv$r6pQHm5>+++K5 zohhvrvwF*gnZ(DQi`GTFee$h$M;)F}nImWy^^S`4L=Q+v`qtY_R2Xe3F|MP)e%@zx z->;b%=Ap2N7DksLq#~ROG?dtRl*Ym$S|&yzOf@{@`__Nq0?3_84t|>M_7oiL zF|imKN>5^J?pgB(qKHf$o#;B+Mk#4g!^CE2xwK^vUb$*)cEwMyD4 z@&E&GF^+-mj?c$vIp0(5ZTa*iRoA3}9}41<dsnO*O&@7k5Chc?I9txx>1XHV|y z(!g&UesOa@G-9OaEe%Vb=D=3d>rA{~9{kKm&9<=eEVyK%Gx4RP6Z#Gy2(9iW}q4L zTfFoY&OgJ=4hT;W1E6e*Rd>GQ1`K0rrb{9cyH$ z?z@sMQb)WJdoEr1g&~AnSPKsil@tR%ZzO>1t7ol(pBR3#E2poNa1E4+*Wgt-C+Ui| z{zGChzbVy>0|!l`P?;Qoy_28(rYew~Y%Rx+kjD!G`;Q4fK6|gIA@6H*zVO1urc6iM zsdi^5+X1R`H*EcL+-QZ;@X`1W#aPLt&PN^=jJ(6OE7-*?wZ?5S#7e+ zz7IN$X_ZY@cSA>dB<}9uIq8O6_{+Xv?w-ouug`7bI&;}wz3`%1haZ_P5ju+p{CZd= z*^d?R{yOEysJ>J9Pf>;Qzm)I)yKVQOrfeJ_ssOwbPY^^>Bt{ec0VP3~Ae}Z@TC>7` zS1(GuR&?KRffjUsCEeQABr@kQqS*c;ZXnvsG)Yv9Pfr^POrrT9_C|0I30`VWRI$bxI+$L?B-_feMz)Es8kpZk$n9-$Q^A^}S|=#)nj zV^SOE9y|QdO~0;U;J!zoA&HVlYT-HuYju|7*cdqxM70Q-yeV-<<*k!+T>Lzg2rkk< z2*Z1)y;dX3QFw6QrJ-abSJFyGLvbj)g8rW12kx8MXx}m&1}{Fjb}CN=d@uX=2@SRh zV`1$l5>V3}dDNbt{7GVnPZ1WOGf2~Mkc#XDWYl)e&a)1 zYoAfBUAPcdSceW;$@^Ogj?sxfKV?ouXgpNITSqv#dsXNx<9~r$72;_NbHj^uq4qbC z;!M5IOeV*SN>W@qeLM1!p>PI^+p$WP1+u07nkWIuJeDeBV~KI$4cTCL@k8_tOo2H* zI+qD!exy;&MruxM5sHeXGEa$};$(Exc|JJ(JvnoE4hd8&rcH3~k+TGGxllK>*6Y%6 z-;$7(*VO|C&EXa?gsGhd@YdZrbXAWCrXKT-@}_b}dEHSubYhO*VCR>$C5B<^Mg+wV zuV7%O=Q=z*KVEQCA3JKTLA|ECXb%4!$bqgl5y#Ur2K$v6;EN&d=O2oD-bBqHat2`w z93aZGd$)#;j~=S@*isU&A=r+t8eC^fYGE%OA%l?F?K|MP@7X%fGPeQ7BNjXOs4R$c z4!s?bi!HPLabebw%Hl?&9OisRRO6VFciaYnv=~oD)W;eXPmh!S8+6l4qqo!MgYm=! zs8b)QolB06WOJ$ypWWyEb{O1(yIY@CpOaB#hKjK@88=|= zoc^@Wjij_0UIs8r*`$>xI@y`K_FN6D*0Z#dFoNH8VpTq>ABNlTC7r`2SLhyOU$OW~ z%1elHy*;#!5M^D6h`sq7D128gws#1Mog5~=Ha^i0KxpnqpsLj4Ydon4WLiQYml9we zzUN=sVzhq0EuUAdBrUDILlL>sdV|mFDfsiEUVxpvckk0%jXiPw8{5vM`ERr+>`2YV}g%pyUm+Mw*fv<~<)m8rr`w3hk%565Q?VWo+&S+$ z#Ivyh8fzag^GA^MVr?~3IpLW4DKME5Q||J!;m2JrKG@BBTe6VrJx-k3zhZ?japEGq z8WEle3B(l0v}z3nqUh0$e#>foG+{i)goo~y$euF@e>?e?2o-ci7)kP@^lV9ShKzG9E#&mCyM^{t6(G)_yirk@U=`oM`Ds6HJ5o!& z^R+OkHt-l5;@`{*aqnvl%6!sL^3Bce>T!J%H|6h13KW4kv6IliD(!a4Saj~4jxxzR z|6C%}IQ(2AJ)XFaIRRTFtBn#CH;kXf&mz2bk9M8Mlz6<}Bxt^NPQPt+-e~xhLU$DH z{Hc8?W0W7$F;FTWu5X9kr<_=3Xj>ZXvb#pighm2$e{$PGwNcf|<@9;4c)O12v#yxJ z!EBer48$&T0?H{3k4WEv2?H{+z5UyvA|tS?jJ2aHH`9HtfrScoS^NUvZt;B8^CP2Q z7j})&k=YI&Jd<16k__EvtXbHrfzJAtFPagpS@EEo3%Ab-Nq6#G(NigG97zFJ+HnK= z0arWEJuxL)i5-m=^J3xf7n&=|iitb;3cDFST^!KUUq=?!=Wp=Rlzc^cpi@uXU$vPZ zP2jscnVI_P487B`{TU$NWqa6Ku*vt?TH7OMVTQcM1w3hS7H5;mM`HTD*4LXR0=Hw# z={(A#(^;nt=>Vs#o^2)NioDt^k3Fqwogqi4(rg_V45x2&=-ijN|0?xhXP+u zTMDhm>XCf-;G+80!XrgdA$Ge^Fd*6&kt4Bfvo$r9jOOx;cCIy7m`{~I!_NW0CZ_?_ zx&JU-Vq^aA!qfjzKz;Z>SuGa{JpYr}bhh%ph)snw38{G0^+cSahVsaiTi;i{$ovDj z8TyD{V1JoDK)u{y%-nXL-Ie*6uc{g@==XslX*sC+b1|{UJDX2G*x#qF{)KcCWd_~| z!m#d?Yla$BplI6qQU}=q^@rl$2iYyBE4zSH)^m{5^r0b0=m5>rf)e_Isdlx1H( zgRvEEEy$F=QriObl&K}7$OP*8?{B+s7_uWyo#c=6o>^;b^WiO zq*nNI)D9Zp5pyCHB|xgW3e_6950neY*kh`Vvu9+Umhm$&9~KW7Vsc?~iDy2_VxKgq z1Q<<4MdxOk@A`$lss~+6f(em_HL>bwMd9ysIpeA#?6MFeYL>z#6MZ%9+b`)0tARg@ zjU$;ADH4OjlI|jlDLgWhlQgbRed_0WQI+w|sm;s{&jMlSPUar}+!Gt5Nz=6|IqgpA zrL~6!xqOD7@*x(3MkcBDgy1{c76alzn=IoqIjCi{~2Kbm- zwN4~shtF=GrrDYAnkRyv_I%|Wl(CJU{ez7ejTVW9owc-+OI(< zncHY_8i&xdP0Hc&d|b;+aO%RV4= z>y+BJ=D>O-EjsCGI__JI-S5J}9G&j>hb~jYb@uDb!GY9WoG{w!Y2%J2;uRP(HYM2g zW-EpWEn0?HJY}gypS^UgDGi+UZzzDRdg~L z#8DIzl!?_9Q>VKPuk)~`gbyF!4joUow^vsxmKUKnzO7Qwonu|IDAL1eP8&^oeHaB1NjshTjV$ukvQYe+ntA|5ZrgwjT+Q~iGle}*&(nY}ShwPWKkJmJ|5&3>e3-q^{=BKj zAj`P%ODwqihsp3hm&2d?G({h+Rv!Opq79`_UDI1{R!Zx5%#h;u_xd8&XRR(y4=yQ? zdzWOr;S?QOTUtNsGOiKvO%Uo7Ve^Gc<$J^11O`{F<_zqHEl;%H4jR1v zp+8xWkN5J{&UlK#e0bofWK{m8X@Lg4xvc5_7aqRgA4;U7F%bvl+%2YTqLDFKx=Ron zRa3!q(7h}T{#no!PU`$g{Kf#F=G6Q|AR4Xk8ro;2;0_(XLc7+u1T~^e8VN#%t+CGq zCQkZIWFgeEEUa(!w1{ib6W5=M_}W|@8vKp{j1OYfvX8CKtl@lxn;yW1(XWc&1*0}J z-g%f=sMNehh`SXOa%_jMQD~+{%#_A;@x^ICY_UHBX;8*7QPAPo2C0=f#H3HhsQvow z=SzStoBqHiuP2a>)}HaXnE#}VK9fSZQ3Sg+eBfe=dL(+@6enuI5>}asNjsmMpCXC- zw*=b|_V;%JEqt1R~v&1r9C^Mj=hVdYU()7Ux@4AMrI*(Wh~Um zu~ugGr_lV7ZWsDen0NG3VcsJZs@T*|GWz4PqO-A)4fk_Fpyjbm%#6Zpsx%f;)4l97 zT+_s6W+tb73y2v&Y8>rQ$;3m-6SG>>Shl7w9latUg1sfQk!c$kS2+ z7M$Dp@9o%A1&q;oaIg$o8=sKF*OF=4`mfXSS1;}IX@Mxy*dU;fz%5>es(aoK9g7o! z7Ss;HQ?+(+GJHjlmM=&@j1!+;0yvjWYPnadS24QIn95sI&p>qF7;KFsgw$g@&`-CW zn%lpek)$&=7^Mjr9U0sVS)wIgZs#H};3&th@|+l{{#0S`$Z1%#)TvEmL`UKVTWN%= zl#&%y=2$76#C*weGv~yX>a{A@-_42~sC*Y@1+R0=#^kTHl^0czKx35b*E)96*0?=p_G&lQr&6Wjp|I zvSU{(VQ608l8nF`0VvjuvdvI?iilb^U9><4azML!j+eE&ckgG+!j8B(kDIKrs6grX zK-j`4e$L}K^;8?yncX8X{5Ab(ej9W-Ps=xajZgG&%O6U`{A%?U7}KIH?5=MPXjPOI z3saf)+9*wvCEd8q;v*%>l3pjAYxgjXYQYC_Sz;;mt!6t^WIN-RR}as^^8r?F1f-CJ zTsk62@wx?3Hb0b{22j)WU6;wgNq&BMp{K9(^HCkd^YT z51u6?zC|^39Po@VO%O_Gc+D!*O+rR}2$?bYoE={(%e9{cV<=`Q<^^MiSPlK%z_FT_ z3Vb9{oJco3&+qM%e9 zYBC@m^ovenq(wMY75h zlQKPsbVHObDiaf_L;=Q0{ZrczUO;G(%dtH;r5a=@Wjz{PisKrhCv>P(B{cnnR|cQvmj@m~9ni zMoxAq4>}G-DiL|TvczS*$b7wXeDZNMy^3;^(cMDIJXYPRMzj*x0BKu<#`t=bN>z%Y zSJmuJ6)+x7vjAOXjP5dr*g;l7hW-z0WTk#Z!s>BFioBULy0kn{t)ZG|Jd+kNRtE01 zOEs3xMu}rRwI!Nusn!hg>bchTlV66ZDyP1>^E)dYoa3`_IA@x5sStvCvEWL-+2FVW3^RP;mz6N4sel*@8MO&%~ z%M<>IlD}_VTgb{7hCjN{H7Fs)b08clpL64GqyHHJV__4E`b$@(vGRdg!qVG)wOE*#TG4~X`l9}VO^UOeLEEoe)} zBbc_;liPMfN5ozp+dc!E?cGDIJIDWFPQt?WKjtL=?{(Jyrp5i=b=K|;^cvcMI0SI{ z;6?~LK?J94GrftBq5AG?m@z=_*Pps187>m0IjEag((LV{hVjuMaetJPk+aP-n}xRJK>3YDy-=oICAvBR#zLMN}A!c4S!F<4NjNw0Bs{ zRWKZvw~mBj*4A~*`?ijBPEt_Vox$V^;rR_0whj!()~JhwvA<|?$8FRtWwq(kW?{^1 zPflX;E_+F*d8Oj$LZ(=s4-{cOz|fOLkhNBPYSy&0sdBjc;uZ>@*wQ?gwyp+@m>IpU zNj!6N5q>G&S&Nb8I?yX%I71i`f3!QgA~HT8|3KPE)BY7v`e*xZ)Otmc3CG}i)hTEl)wkh<34tJJih_Je49;g3-XJFnDNyRO z1Uimr8J;l(RPoek55xy_n7?pe4qCe7k30+KX}KU&PRI_4HOSxj1E?{+2(Xc_|7Vj@ zup{nIaSkLO#phro|BE7@E>RPUIECo9W@#ZP!*vZ#MkJQ>3~)-SfHTlhO!XODcC!*Z zQwlTqnIObtd_I`9AqFL-TR|S7i3xoRra&|^i)KJ2TxewILUKO`$5mpx{{%Snm{Ap_ zzZ@ zADL@{h0_cebe$xmJ_ZK|9+0I5EwpolYt)%SenWvjqjjKWM7$7-V0DlF#SsPS8bUTr zc?vQokQaPO;wHEht`u=QY$e(m@B}gFLB|E`@zLk39>c zU3EY^5T1nC958``*DUag=)Df4zoyc@Vm^EU=`3){Q}Y>+ycLfKi$x0csw^KwU5u5# zV{j>1o4|^Y8jeo>q`B%9{DQEYE~NezopKq-RiCLbp1((dJ1zmsGp#*Dxs3l=0z=&V z?`k^jTm;lWA?_2DkbHq!1A9@k9$jA2pR(RdX*HlX{mtc|b>`d5k~6l##GL-ecnjtj zYambzX8E3i6s-_H9Y?6ZlC{f!vQIx6rSa%}#f02Cms_Mq4T~%E>QBi(tQ8icI}%pD z(ru(*7nGOM2obCdME_AZhULfMcIlc~156r13{w`uG3qHR(C9Z@6`6I-uaRk`7N`l) zuuFy5NE;6T$1`Do<$x;7K;0c6&_F5!M9@Iy0?r)#xBgg8!-mMZhwFJeyzh2@f7!p^ z?GKkt1B5#7r_A4P=k)mB9`9$T^V|I1p4Y&%A92my8(W)QzW7i4T?4~i-Jh?gVP)&= zejks`dA^@F_s4p5F#djlS0* zWe8rgWBYz_kL7Cjg5h_1LO)hLOShV!q`xO;wS)DNecV^{}?;x z=t|aZ-N&|V+qP}nw%xI9b&`&gj%^zqc5IuSq~p7KpL4$Z?KAeh<6D2MQK@=U^{yIK zbFG^5na}Ui$~YNQhZy(FG6&Ol1+56a2=t=mr;)33Y2$PZHl3np4rFY{bF%%|B)AEw z+Q91l7PFWgwIOMXT8mVKeNR zjmR%c=&bowpS|w(TXAk;R3x=)4$cg^o5BR${TP>IMD%^T8U$`!#V&$Yr8{8((QKJk zWg~9g8N47x(aw|z65o2`?qbyzXVv2 zY4c!fF6S&ODXPewE=%pOe)DcyE#4)W;h3pOuF>Z=eM+y%b7{%1m}50KQkCXobRu11 zBq}n4dfRM=KV0eHGs7aKLO{WBX zN*A$B#h=4i#t_?Be+>LgMcC5q$X;6wkTK%u*Z)PfM>EY)xV*=1m7O__#NO-{mmR*P zTUbhwQEm;@LvCa9y!Ml=8$Z0fA`SAk{{4bpU%pzvi5>nfyry)iMtEIlD!rikVe(d_c|8?u6u-J53!r;VaG#)GH2M4(+m}oZzL6vn5C9_b_VNdij?)lpF|awy{+)f zF~7xQA@FK11J=U~vRLdyd-Nd6AuQ@+6r*aFt!G`YYe^Ax-a>NocI#Nd==W+4^hFW`RTLuFcf_BK-%b^YyaLDKLwUlN0zO;TYFjNXG=yn)KEo!94a z6PL%wO!>D<=qQDE=S}7i;Bzj_nI2mw{RYgv&%CpkKwGT`Z`gFO+g6K@B4#3k*9J$M zzZQ&r_%3;lTRU}b>SSZc&SH)`3NhJdCku-)R8Li!gN(XHY zufQ6k7CX399DQ1D2tm5rE<9?bfvS+Za+JcZ{yRa6IPx?;`=x+{>|zsDVOF{IQL|QI zDPX0TJhY}7zm$7QSk z*+Bre(n2{f6JYFG#<6Tzy7=iNn0(58EjSzfnH9op(--eRatoc*IX*&*KU2%JR^c3y z1I#-rOC`4R`!EtKeWg|W$qL+$Rq;_XW%2u1YVn5hLT`yFz}&c*7U&FE{~GQqF-PUy zI!Tobn5XicK#I+U%$B*bxU1NolXBcvJjF16@bL%FYa^<4cOQHkXX4;-^>yTWPKgKYSJt#R05;%TA!#x1i2={=b2 zsl7OhmzSP3Z+c=)y}Z4^x+fZ5V5}^1AB%q702n1SNahHI1Gp$8y=?UK(&N)#sERCy zBH&nk&WdVJSGPOEGfM=QaEkFa~!lrX^Ao*bcZy!*lvt(AoU*B^zqsNf7>i=MaqfwJg)}zSj(8S~ORCj+C7&b18xvZ#xj+bea+|NP3`BdEi@zH+WBAbB&xV z=%`bhdPxVW$qX#W;F0mgQ5UqvQAh?s1dU>>iDIB>zNKGWRUXr5UD89uxXiq*OgQiw*_Q`bQ*uO#CP@A(XGFHrX`_)iDkK#6uU5X(kb2R)H%gQEye&zxX~c_ z5Lk>wm_^os8?}bifF7i06pjA^jkI+Zw6ClMg`Gw|DamVKyyw|*`RwJ=9q ztx$HMaNWP?4D6Z6Ggfcc9*cWHoU_4VP+8akV=hpS=Tp43Y@%z9-=Uo-^}y^hX^uVx zbt%>ga?QEHuza(r#TCcxeZ^6E#ABdx6bO~pd^HL(NmIj>;alN|M@jWY>Z4BH1TKy&at9I5oc?@NZtUoP% zKHiS7jbamC{Gp`{Qra%gPcb4D#_z&`4u1HF+ED&P<6pa4_<+m^tQsy61}X$r;G*2q zivSp?ciOb~N`k|dSGHjzk1)kGvQWvFZ7{mWS4HK;S;ghL%yzv7u8fZQ)FHddgYxgB zqb?jaNM!*QNoMV$%)pNCn?05IFB^xzj&6Bf=q_@j>q(eg)_9t03cz>|9<(+AcCHz+ zJ4X$)+VFY|l0Q?%v2RO}xM1EzwhqQbZ%n(gekiQbe_x9o-~5r;c)!Y*N-F--bOT$9 zx*JdG-U5@aBuLkPA{yZ~3|;@q1$w((-3{`<>pN^7M1L9*>doUtG=ryiAMRI5M^z0s z#Pj%QUE}Vn5vNYy%}S>yi^|NsyM-@VxxFm^kYC|s{*P35T%3QC@*ZZ*IN&hqO9E}y!=@X)JBT0}A$5EuGi?xzv2tB?~!prO9VFol0X zYDL`LbmzL_T$3cmCyn_c0+N_1C9lB;Wv}fsbNEhptGW@%sCxUHgA7v)Sv%yWt)NWS zOv0@H)&Vlx3PgkFL-11f%Ky%g*d=y7;N~3(43r0~6)P%o-U-c(s(ADkWf1B?;49L3 z(FO1Cr6~~sYHHXPjZho+V}ITjeMUYd;OodNz_t=S`)(ek22xYNo10IhqM3Sae~P-R zU=~7L>YKiq`p5%o2pcu9V2vi@=hiXw+Y6YEtWsrGFc;+0fk_@s071xN4OWPEF8zDk z)HSw8Y=Y^nbkE3!qceGLUHz$)9J%oK%)wQ>1tb<(hU`W8R8!0l=yvr)l=36|JN5d> z3^U=SVe%;d4X!Wqv6F$2yXx_5m2p->U}O;ury7#6s4)_+0@`t;U04SaSbQ2T7q!fg2WHGpZQ_>D6c-!FL``ak@gnDO z+@2MCPgA}P1YcWq30W5hu#K0dQjuZ!{_5ne{y*1R9DYV;mp8!L605JfIrBStYu{IW zc23@Uo2xolyyT>%Ip*)}tGsHi%@@(!{65^RBF0MmoUfS=cnxV{l6uz~%Z3-;Mb)XT zPPRZPHwf2E^aQ(tSc)+7Ct?|eYsSD{LP@8Uj+f|9?| zv^wVfp-%At=+UNv-q%tc$zjc@9yZT{G0y$EYezg|;jx_2zTLfUT9A7_5k6gK4?@eW zBWBG5_b$^;oKu>G`m%18T)+eiENX%PxQ(&JsN331Q#ro-o!@%Hc4rmKjWcfajZ-mIWyKeuRFCo4*miIf| z>nH%{XMxvWhZ#QNa&7v|2L;+ zT@04^q8mv=YTW!6UBzAVukx}s*b;KUG??=To*sU1Vvv7 zV1i;0251W|2=6bU%^3t8Ms~mZN;i5F96{k#OoT_MTibO07q2T|qekIVpcUe67Kj8> z1%slmrT>AZrSyacJcQ1AVq;1hU7pkI+JU4Dy>_Z~vM*z+MqwVG_(5w1I z_WH7N=4mh8+hDI0XJEPmb+@#2R)c!t=R9Qyd<=92FdSI(2#*4*RYG2}pie{XC#0(d#bq_Q9Pv(if zDA*r}PKQez*^Fc6LK|{1m-h&Vx8AGg7d_M2%#xoC{e(Li%H~JLl#Ll5h5T;QI>C}5 zVb-ra4&xa#6w&hO>_o3i-4|VQps>>hZ<8V@@^2j$I9@0arCw+TwNy!9jjClm=6BVBGFOv=^Qe zbL)Qb#nhYEzC8xpULIgw+3*~IZiRcW0+ZRJ)YG(Ql@PkDFidw}R}9OLS%awD!{lFDk0M6&(d z&u$$kik)_3BMq+faPFyNKDvIgw0jljV6o<+RNQpy6r0rKPwy~4G0Q`tx^Z%+stJf? z$auKWcTOyZ2=v1?O`iVd)g>rdNlvAJ1CZV5}2Ul~1`mdM9O3fPa2GDbT|;JfD9J)L48sJRfWZzj-=9N?R7I5s@^7e2SY%Ybpwy8MX9)Nnc_i85m%H-Zi}#*b{eT4 zxm+4|HK4Y^1@d#lif>zxk17|CQHBZwQcxlSel;8CulSMyK@Rp6>ipu76dDn-jXHt& zNOcqcg=1W6fRf~upCHqKKye1!v2K*6Z*n6ykt+Xf8y5@F zDY76ej&lQP#YWS5s8MlG5onjTUespr-q7aJpzTUoF5{jfSyWv;G}@PD`)K9`N5R(1 zGv@Ge07C%^)EJEZHUsnNS3fL_V(YCe>A=D@f;=hJ%QRvUL;2`P1#f7?9Lae2Nq|Iw z#VuQ1NNoaJ1dKMw>cXceIC=j{v(MG|4Kpt&bPmm6Aoi4>=#V__jXScU!nmZ?BowBL znx!XVXHsKlueX)Y}`lUOff?8TWvezig?i@F%0zCT;iOIdb?2{r7n zH^&atT|Q^clqC?hm_`2h_&)J7^)FyV@DT7KUa4w>-Q zUz{t6==8CLp<+Zw0*t86ZD9h$2Ut}BdNo$SXP{G^{OzL!{1&RXx{ zhh1#;Rb`gyDC+QcT*>>^j9cc|$v*oVrD=6lPNiIeA$tq*$%qC`s^9*OhHiGV96Q#b zna37sA}~7EKT=*&DjSB00k+%kkPJvY^km<_aENOQd*G9nSBJubUM_^opGo;LQn!&D z#}Te$d#||fB=u&!ap@G90}!TCRi*3xQ{>?I&n!zg{^ossnDrN0EF6$N=n2$z38(!x zgQUWhiITqzlG>#y%qf|5$2CaEg2_@A-&pUXa>h`1L)!%v*xJ5GToG<=#_=6+66n7)^DXl7Tq^xZcAkPuu~EJwZM_g^ebg#3~R32-bWzj{h^j;3lpODItSgfDYLwps!xkLkPdSj|fFKAn+ zg@gHZo-%$B6#FBX2Q$w_lp7iwZuA`EtyE__uJzACjF;+%5)RhFxO!T3tmvw&?hNPX zIGude5Y7 z3z;2aVTI2DbzZLLmUpQVY{HUy;{_>EQYXDUHYZJ^G&*0<3%#`3ck@}Qfup&-Y#Z{r zH3XAYpoa)2A5tMPK^GfoZP+q1q183BaCr{i`we7R#6G^z=B-;2c}Iro@!Cfnhy%$0 zUkkx`V|8{%#__dY>(L8OaBZ(O-<4`{6wCY%$1r7hZWhUeFVvkKs34o zqFH1Q+15*WNsqe5&{JibU-2-o!tA>G$tYaacu@@R@DxS*`^nmRmp{B_*a5MoYu3=a zDHaB+8wk*0q-s#cn$XimKvh*}b*grshv%*JT9m>?Q_)<&(M84hX6MC>P}?w{LNgQ+ zlBVW>nnI_HwrK3l8P-=PJ8n}VD{;xos5>9x4hn(ENz7Ai6bT(kjI)HX0q?03MM<+p z7#5;&Z+^C8#rwloEb=5;o91?=oJwrKPn-{=AFCIwKl`5j?9yA`gH%+(iyYtvjqABL zUM`lc^|L+L$uLx0QRaSFbXL#59y(dTgYzFj;j2L1s?T_)6~sx(n1UOI4G|l3x)i6hE!)b4v0@Yde)^O62VdP@d%zs1Q96fc) zT{mVZQ%#LlE^-pVGQ38&0iruV03ON$@sfZ_Z$K=eI0b&PwfhB zR5?PnWL<;vTYYf2F1dVEy|L+Dn+$@KhUa9s(NSIaa*lwT>1_DrCh`wexT0wE{-0t2 z_rIw({@?aR{~O73sPk`}!Ex*wAwZ)rfHP(iul9mGo47`tw|p0mi75o(biZ$iX_akq=-LQzw)cI8 z<2Y)d_4&AAh4-g%e#sY(l>(9D@qqs@eMl8qc;0iWM%tzDA=61{je3)6LNVwN{-UxH zYJ2jG!$&o}_Xq?!j&kPZ*|!1)TXo`RXH_h1ymDD#NQ|0#J}`SeCP!+HL6NGB+u(G? z94EdMw=k=Tb2w0Jn+-E=9{HNAI#1|34m?HH9w5UN66#sRb7f~WcN9PXZFB4G>iu|? z+AP?@AB_@JC(B1Rzpfo3s8&uZs!<8Mt)X9o?)Y)O+@Go`MYS3wSF5SN1h6wdFc5y; zKtYMcVMDcrTEG3ZGRy*}K)@}oUsM9OCnU!ekr~fje*Kv>yA_n@2OQb)Q#GmXi9?<- zK_T6hWuZi2t1UWP;51k0aHGC8nI$!?9uZBHb9sWT-q#K|qk2vVf_Nd&>%M`)dS@F! zqLZJpRu&ORhX#5iV=9v9 zXbnHUmH2sM(D7{96?3DAMSJWAUs(TaZF|w@#Pu$g3b04vT3?3xPnt1eGsjgY>t^BI z9d~jNNzSwa%1YQD3nCET76%&6g3p(N7uACBw9#_Qf&e=QjiG{xANtrk7iJ5#K_Z0> zz8A^QVi4_(jozt@=-$cg=y#X6c&a_fxw4lj=y~!evALv=m|qU|%JnBN*7f5(@zL|* z-TBxhPb_YdorT1)u|3?aZ(+Ip&J`5H7G<-vNm`&m;?Gth;)HE$KKj*g5{QO!XHUE^ zb-lvB6zP3EE@N_*?lzXl zk~Syey~?r!KIietxpb3UnO4>-;_^@Bz|lnkB=h@CZpUd?FHrqm7Q)zYH#bCSZt`2d z!o!~_OU^%pRR-hs^=xgXK3ws(H@iP!nlARP1`Q|0lJWi_{%|q>he}n>zdglV{_#)a zK?;BR?;j%vi9$Q#K`la_m$z31F;r2V)|i*2wT1@t${r}PNp$Ui=NL?t13}jO2sHA? z6lsdLd^4~Q0MVH663Suk{ZJP8{PAI$zuJlK`zp*z z-G-{ruqm)jl0+M2=lS^=hjgX@b;|kkH_J-EroTyGd`M$YrL!6q3Vco|{r$VN zvcE`!Rs6s3rte|mG{H`uo}|-SN-X=`;rcQXA_fh&RUm8DgH!-e<8u-mG8sN_O1&27+Ex>fvQ3xxP;L}Sr8P01c{7#MXG@M#ZHdTql{fq0c6 zqj3vZw-o(-7o!IGR8S1I5)7TMbx%}88)WBd^;bP!M3o#gM7Zq>6XyCezNWCk2dD(& z{G=uGv=aykY1LfLI#XX1ofGOjVL~pidIAwOr@|ysDB3SEnF?(GT3yZbv;$t; z(85dNEtM=vo|gn&4i48v#BnWy2hFX*yS>22L!H=T_oNv`0AO{ThrkU|WAM6xCGzri z37CO32SVMq@Hi8r*y3Ag5r^LoyA~C%@CGEv%Vs2UZMf861*s96KGqf>WCrmc2sI~g z%(&yd7n@Y+Lp_u$b1^Bw_o;Xj#cb<>LxL<%IxZ=Eho+d;-FYo=QsKfdn6;PR({uc>MM;>6T1lN82$H^c?${$1+0kj3A z(|yu@#n^h!U`f<-bvvJGyxyGG8gH?Jw}}0Xc=*8AuSBZkB1@WLAi)e{pw;K-*XG z8D9ue0IhiiXqYMXU3+{zH`lFUn8*7JE z5dyGi0%-b-_P?9R6$gXRI5w&P>Ta}fFB#+z3Qyd+b2;Ua!UjeS_79{ICCFS5J#cBF zD%5&3on+8&aR-!zaU`b_@79OsK>G1~xRWLiC}de{tOJ*o|GJGUz%RqKM60SzF=%geR)ZJ z8$oU0)1ELItb{h#j?m1SYMH*q1Tzi=gH^PJCONX5{|cI^3nS;a6{wqUW)z;C<1w5D zFnM$knbuF+lWFY$8C-{Hwr^KRK(`*} zNcRz58KqS}{8UR1IufKEM9`Vj?u@>Y&ww)|bTm7NqJC=&hjbQ2MzerRH7KvFO#698 zsi{jX+ReDEieL4sGznHw-#~R9h%-W*Y!#8I@mxWU=@X0dS|f{Awo4=T56x<>cxxS* zrw)-0XLm0VDQF|&Qql?VmcbKz$k*&{X;hE}7|UOG>VG`L>)+%7=L(qx@YKh$yg@bAHuouF{77Eirc8xZg(Rr)zMI zRVLyBd%95M|L{(0a}ld)p3F^{zK=L|2)4L-kD90v&~08(BOa$f))t#M<2#gRa!I+0 z5@R^`N`#h7>Ld5u9_8b}j5bxi&FBiok8Jz}b2L6r*TPZ7EFPb8Q&qIX!Q@Go^x-1&t`G3c9%R;)GD;iiY11#@H0XY?$@4eT6c*6cC zo@h`M5+w~KGSQ6Np&d7@9^DJXS&wkOFIuQqs^UH*tvijqCteo`t-HA&mprn0(o)~g zC!myIidPRMi;q~-b!qrpberu zaF~i_EYDBlaC8Z+=ZdbT^at|z{dBN#iq2T^q!-dm9rm+O6q)4><#0+9F6vAT;;8X?nGN`&{On6UwUhMHI-%@{(IA#5Zc~kXRX|NI3Nig3tHSIWr4gJNH5Q(@lQTQ`O8?@ASI9AoMmyTU;2k>Ya=MZ!IkDb zn=S@j2{?X`5^o0JcBxPR(xA_PTXvoBBLD`%ZW{>5JQtI~PlygIBxsjl`ejFsE$0V- zbbOY-cB?1KCz0hTOjKd|IqH-*AXO2_5IQ!hgf3TRRjgUAWUceD{Xm|(7T+`|m9Tmw{EF_G4+C?+-P42tpBJ3?Ac z=$H6n;~PXWeE?97Sh||-pvsW}A;re8HrK-_rePq&IJ@gyayrD49wJ%k-WsL&ccfT~ z6}jcg(&3GV8q$gQzBGBcJoy2J9<6kC_ZL8O;Lvc9@^2g{*eRprrN|1 zrxcU$9mCs^maC<796#actNHXAnWsC@COvwv{_lI-vq0CgJ2nvKkF52pp2QUf3_XnS zb9A($s|+-S?w4~iXxja6beqxKGOV5CFjT_AiqSJ~mJ}DLvlY87gzAL4XiAEHBQ>Ls zUWoQjF&9-uYJ$!A9!>{heYzT?g<=$=!K~eqsDh%;efhb~C|l_52{BM3UdCsAL+z#GwaB zMkftBP(cv~Rp{ZGBmb&LJC(HAWK(^z5ixRERYVB!7;7(rj%S}3YMs+~=& z|ME1sKZruj8-@2j^^k4>!i1(V(%sN!L50|x&)Bzs8&A%Uw(GBi(9IH9cL_=(fmP*T z@&u8K;XIb}?}T?>Hcl|X4hR`v zu8V+{(f?QoX_5pB)8T}K?_v)_?AxK_Tzl3lUgfXf3UH}3`QHd|vB%BqySY>)DRab+ z?+-aaspWIcs&f9_$ zEzRAsXoshV?+gi9MOi@#q`67g&a>hgFW25F%!9~LLdYlnpy_|FbI|C2T&S1tso4Ae zW~>zQPAouclsIahT z_An=H7=PL-NNn%a)#y61dn&cZOJVZR0z4zJa+lm<0^o9$ZUQAI_yQLZ5$qW(?Gnd|^J*L0xo;{-8x&OJiKm*!fLN1el(*<>nD?BxffR`7sd5y1R_*XzmDmb1aT+OvpWJCVDS?x)zZ|+JopIp;|2PNro9Xa5@TJFS46>ncX_>4o43(S zSRq_5z#h;ymYLS48mL0j%%`4lQS4LC%#i#<+Z>qb-hNRyz{1`rqS+?26qo%3%Co7$Jm+2;mEn`J*}^3B zAxlMLuF0j?Y)_SwguX`QRuSA$ea5GZC!M2!nw)C&19&U*-FFV+lf=mkV6t?YWikV= z&WpwHvn&HGqQH5jouZGHyhtejr^_e)-0Quzf=(_{`1CW3n=Gwz=#kpbp1DSbNZH^C z_?Xu?eQnXN1h3tNA;&qa8XzSy>_$uiMtTD3)6UHT)@nGuU>QY9JsGhj?S*oRL$N8G%w`8&GX4%g{gvORLh*zy!0Fnw1j^D+|qF$ScVP4@(5a znxv&RLEB`d;)2V5!&@Z)Vz0AWq>wrgc@+9dp@Eeq97H`wpyY+j?;pkEu&|GL1CD;t z%)!hMDkB-#W};|+mZ(XyT8h9>IxvwH-1tq!{!EJ&y}lyEJ5ZOy9Zob5?<-Gn`pTnb zpY)J4vIJ4!P)l#Hv6Ed(Z=xQX`Ve@bY!$08>b}U3o5c!naO^247V-+#ub?WXtmJs0 zXY$Aj{y=r1@C)F?a@?b!>ppDhV<2n_yk34F8A`tiNdsQ>yK&y%SVk7PBxf zIUu5`Q;&eHfzLHSGQnkT67;q0h~WY&Qs)#@^o4~is8fAUj3&>{WJ|A_T=Zln^q2o8 zO1M;7S#71N3BX8|)|kMy&sCf=CCQJe31$LG%$Y_{hst>ig72$=cZ!XGO}rxU`wBf6 zH&lF=kRL9snT4Bcgk*A1X^WMIROIkc6$?G7=MVlIU>+SIF>h4l< zt;a8JdCTzQ?bq(<-6r9e_scRv!hnE}!&B!t+MVBuj$3*GeS!iY2O8p=i)%VgMq0i8 zqhy*u=LwEmZ@c#?jFxxe8vLQ5*Vu2FHag!%{KxLI_{J;ODodKtSXDF%iV+`t3K2G2 z8gP(#z3cX2tnP^c{}Q!aI=?WEsRPT6@6VeA$x$s`0*Pl;Cu9u1*Opl3L}55lS?X!X z&o+Qlgy_zrN*Sr!L%=VNJ{a)JF`pp+Az_Uk>pfyp_h;zz8rJEnqM~5$7q1Vm=a0_T z3`E3F@1CyL z<@viQAtVwV40&fT`q!c#aQR{A%rzu>G_`epeq;H&s4q6`u3agRg`pR2zbxOTK!(~t zq#Vq{Iv&0SgwN!nGwrFnrg!ZH9EtV-aHdA8jHP+eyy3XfzNFU`ZKTs^Pr{qZ&ZAtK z8z8r;v@?K3Hq8ws?JA0zqP=+Unl@f<$zl9SJ?HD3>+&|z8FbIG4;eJiD%as|#$i=w z$t>zCgnYmbTiW-wvQ|``%UJzD+LvweisJmNjrR2Znjq$tyX*Yb0c%^^bEFf`zNLfr z^x0$F4&O$PGp}~e!rshHmaGn^C$Ur25qV=3_3r{to3;_*@R%CFFwM7MMKA}Dti)f0@K`$?9(6&q z7b;W*>bZz~Wjz^&8f$JFZ+T`0c3mBH8VjN2mSMnzXO?3z zaT+L7Aii515t`)rxSrgi26V!gR$9@<>!3@WF$?2}!EE2EakMUKO0gcU_T26)$3k!n zOb67d$s4hxf8Fhg`Xd!Z1^ez=H0QLEen%Ste3Ts~c3cmN$0nT2QVmceQSX%nn;oxZ zD)6%QwW}=%$>wSAtBVt57)eXWjEcr0)7GNKkeQP#Y{_bC@XqOE@a*E>ftw{}XP{cj-;>o64JoOd- zb<3BB*9@r$`7O?moN)1Qf9SWn1N&vpwKaRxlt2B~uKZf@H9nzcUawZ5G{pT@rWw1{ zud#U&x(YC44NHOU1cqsFt^}h z?6;sOhSX2PkK`@wSut_6+iJ+$x=Jn}Tvlm?||T(|YT5x!MXG z?6dJTt9rsII=3Y)E)1#$Nb~bi6^$#WK+m&tWmv}%za}!O3TpP2bHB8EsYxspneuv% zo?s!KS;glT!aL)uMtdnqEOguXUj`U(5U9=lTG2D?G_;F{6laqZSm^N@^`ii+#fzF< z-^17UFBP3kWSm|$cX3mM2Dz`i&{3`i0tKfh{rmLUn@qbl?k#w0|Hw(=qP zMNsI}wBn^C>Z)bO54|yCV%lLVfe6@C<2~zZ_hZfk7i~`OzJQ+M^4Mfw7+StHGkztr zXc+Ann*VhTUtbT;@!d`ya5Ppm&tjcR9&9)e=xobuJD2nOSeg66;M2xz7wN4aaZNuSlmoywK2t0~}e*i$t zSC9ZhZh%DOraepJHnH%rJ zyA3sS@r_!t`Kx2`z1<>yqj%d>qc=kHX~y*6p@dT@B{46ArNkktuYmmLSNc&u9D>vt zyxpXl7W_fdqPwiT*#=8d9*U-$f`Fs8OV8m`uT4U<*iVuL&1^mTT4anXWAwXDQF)ZZPuo z8ksZ0R-3^ij{e$Z8EK*<;Ht*=v_>qcI9hOUNPdq4LCz>?AljPwriUMroH6*b{*!P1 zS|2|@%P&VqZuEMf2PH;&ATB>+-8K)Op5mLg&aefmmyR6DwGFd$hi#~tlE4Ce>EQC7 z6?5E#WsBTm!0xXpF?_%Qdto~%Ik?v7iuSTHzIz=h-^zVzuWZ`g&~EN3-%jPN^fgrG z3^Uj6YMjP?*0$eQ&u1xY%~@rp|40SB{G6G-6a0-X)bI~aTHOCxQyn+g->7|;f6M>= zT>`te_T#@Ku-tlP$}X`~^(5^GCc?1PKi*jL+lMcb0QKK|K>b&;&Jc0;iURMc`=0b) z_1|DX{Ws_@YTsY=U;5W3i+|OBw~jUc)PJi1Ttks^Lydj?o`U?6`{rD~w+V~$| zlbW%#lh}rZ%c4w=;ANJ=oiy54LE(>q*MLqnS1P=x!Sj5RF;$x?$~evaq8bl#A*QV9 zF831qTRggD38#M-H#*q7KuqKZ_BqU#UcUT607`--pAA2{v}&=S&U9u2H}iL`%caX; z3F#sJTb!yaw?-vtUYN#wHXKd|}-?XH;tq#i?KUuM9AW24A zvV8w^HB-j9s?JGV)vWfldGamTGY{l>-?Ma3vzdgC<(8z6itB8x`Ha09cUXmuV!AMF zkk*zyMd7*4ZRW4{6=&ND62Ios%B8L=z82~aik+GQ%B0P*&z!apa9u+db$^Iq|3mmQ z4Pij&3>`kUz?Q#+KMk_Y=$!4jHRDL#b4eU4iu44U;z(dQX6W@)9|?sOBz9xdz-0&P zm^dVGOO>Dpq3Z~RzxWh#l-1m+zq93)_l)K=3T^;mw;x}*n=>k$&1n{Q z_V8u*4&=&anfB`cF!qkok+s{ucG9uau{*YH+g8W6JGO1xwr$(C(Xl(|xBA)pJ^%fj z^PDsGmy8-2wJK}XNZmEpJ?Hhiu1r`-JiFhY!J+_dU8ZCI;+BT@!Q;_eWjKPy_<0g1 z+KjXs*pVe$BP@cpWJ6l%^^LKDKFx{KKF$QVDYZa@Z0(D)L*HZB_E;RtHm-MZqED*B zRfC780Y01pv483iaWMT?3LOr%zX5!JZ2A9D^)ZJPQbR#HVAP_nR(-b_fWMr7sK;xc z(DC^dNyA}&z%08-Vg}+P&iYE`lT5MkXGCN(#|Ue)N3SP)b2;jb=P7w65*sf4Pu8jt zlk93OnP}AU@_FM&hL>r}&xLre_xx0pO=zk$hb;KGQ3=BD)!vgqxqz_1=K_xv@Q9p= z8rWHf+TpYa?L-}VB2BCuYKF+JWr0?5rXf0ZFRtM|51dq;qH`Z6whs&r# z-ul|V3;}cUQgkwLirD7!ci?$cw3lugcwfjA$6RbVM*nIM@waG+)Fh52gQ*b!@7SMr`WjDljh=f#kto4LlEc!3 z)m0Pgb??3mj~nQw2s7tcgHKFBT1XJ%x~m)~ z|5nl_X`@8sVSK26BRdbD_Qz2l`=-TVe}Cv^^tkz+SBlcZ1)eO39jPqa!4&Gmp1P!| z&_ZA>tV{b3$<8YSd!Xi^cC7E*bj{WVG2ilBdLLU={FMjiQYqkCFqqJ$;X-P)#LxR8 zuaS>&_1oYl=P7CJCIwS+;o58`4#eQySy<)KSm4ef*x-xO?Z zoigl&1IMmE@sn-P@zWI~Rm)rgPBo`IYiFxYRq;u=Tk1`>f0IMP*;yZ^E_?_NN8po! z3vO%UJ28O{3JSvQD~Hd54A|Wk5J4Y;Iv;K{#yC$4K5r*MMCOMhS%WS6%(l!hl?f^$ ztcIbai$PB`%?kJAXMBa)=EJ@8Bv_sCqRObXnQ_F}3pz}{DMKkEgWjl6^Zm6$2PC8g zBJ=(wm!P3mQSnwsAnU{JQURE(6@HKD%aB4&y(BzVu2*A%@U@ufnT^az7?r_F_c-q^rnbwGC{b&(4M6E4E zqg@xN6QeE!Y=Y12QL*4*JI4_^H7DN$!)2ozePq!FSR`{+d_A34Uiz!->&l*j`9ASp zAak&hA(xI-ae06l^=7sCpt)yky|&xFNyNKyxDI_(l(JUjD><~%Z|;({N}&-i3tcq? z|N5KmkwanV@ejgSyYoQ(bi3|M47M5O`PMr^&Y!yW557OKId#Jm?^2vOP*LzMH`YI^Js!K}de`<#B z1V*ikq=|j!C%^tZGnW3RX0ZKJGYFom!8oO3Z5)TK2RjLo5NuU-LK)koScJfoQa|Ji z>Qof#OiEb*fL@&hz?AB?R6;g(U~}ukq4{4U9>cQ91)cPQ$fBSa^VUq1m-WVfrc_%h zyq=!D40~JP$cO%{2jt?+2I3e+My%nEV^-ZetUnw+w4$3akwgf#OMWHJcnxzGK5Z1s zSgoArWV5k8%_FgC+bX0gELvEdZh?!0S5ln2HN{T1%Lfu%DGu(APeK1=Y-5a~Q;r61 zInRyLLcoOmqK`f+pibH}OJ4MK1fK<%AsjI#)8c5MRcAjA(tHG)Dz{I}tl;Rh;pcCe zMsiBSt=MWbh3lS!^!Hn7s~@f=V{#p*F!f#h03GlWB<(pT+WOjkJO2} zVikGoW=Ag1Hyt~K$n|kyGw$sa%#0!rj$GT>;QDPG?j8kt*$xM576)}T^NZPcfvJwq_coSK*QG^K-@tylaWjzg?fHl4;`MXe_!xA(#dQ2I6Q@yv|R%JN7kOdpBUcLF@+kn`cyD_T1|mGLtm zj%1PZSK71{5KRo5NX*zxHLh^VqQ%8%<30CmHWR(3dYmFGhjJcMpK=^;Y{gO2kLA=k zxhgU%*{&U02?sMiPXOneYXZB|%jw={O6 z@+{gXN;!(tdHs=fvmTMCVy!tC5c{LWr@xx=DiM?15-0k;lmrgEAnac;WN!^#>RbLM zE_68^)Fl8Gmo6lw!V7Aa4c;ApwY}Be43~4fy^Z(^ZRDFf*hwLSB2gtinZj2L^b4MU zNQTY;bJ}~l2f7fS;l+$rjR9!a8(962(*BzX@?9`?ho=bLfp;H?{m!I+l(DO>#Ryy* z^|r`}VS!_pQ)R0)<1e@Ac|ev1i42%I6x&b|Rmjm-$ts!KEE+PmIU#Hw!SFZZr}39% zM)3rsn@f`)FDC@pkQv~O$+^lS!bqSRurLQa88Z8x3>(>Wj#o!f(Hj1CHonL;9qwRpGDZ+?t%pEi$J1w>Chtc*CrOPBXWa@|Gkc*G0 zMqsv^Ls^FjSS144xmR(Rn+fRCr-vf#HI|MCE^ zh6`G&(|2S1Eqx;uFDHNa2HcC(bt>-XRcL>b45~G|7a{9HK{bWMj|-iAuhqKFZBJEb zN?vqNJhzAGm@?hVuR$=oj;jQIjGFP!Aa`RYXWq5;aQANO?)U0#n_%&>Fh)qgXNgdyN=Qw;PF6*OAg?0Qg@LkP2d5P?_ayA@z zG#`9xoV#Fju`t2sPrToo*?)nsx4$L5n||v!j*5X+fCvjL0Cun@+CumRq$yDbWIg_3 z2YP?y?Q0Wsz!@X(%|Ly?chI>c=J(@d_12}LL`hLScS8(HtL6DeH{MENC9KV;1k_tu zT{f0YF`>-YywkHTM2)tdp>1(hLS00EOFHpkiHHE&yq0UMXtRkQxYY}(#YC3|T1tu- zt~(*yk_IW;%)1YvCpzJqm_<=Vx28l%7gu4+s7}y2`2{dQSsRC-M|bc%VuHG3TY-Yr`sR>rKEHq<$gXuZ@D(sl{!$xlg~iy&OI>9QIMxXzE@BKO&-g%;)WmM z?WS5jf%e2%NpIhs=8c_ONMNtKFPI^bl5k-%Wf15sS32~fjhmX-Qm2|GGBIH0H|iqI zrlh)2%1D%*+PNh~!6b$y27L|-UYvj8(vFA$qd7Tf={R{Uo(_Ww@CaWMaHU-x}~ zZUBP+a&}JFKXg4wk=y&6a1DpUOokuAHcL4ov^UHK{Lg#5-1Rn74 zJ*9`Sm!*b82GY%eh2!fpFE*q$$RE*NuP{; zM$OpK?QG{y%-Zcyiprm&p-K@JrM~+MiNQ&KPC)2>RA zjA>PJI5uYbzK1KYUynryjFiCju;YNemVlUn8GTU@?P&F-csBL@&ca zhxxS-m*&9JpuQfN7PE*Sbw5}&U7Buvz()5roOnf$K~QKjCE)E=mB?E{QxXjzPU#=n z$#x7{S`xeSF=SdR7=?q|IHGNCu^OJW9@rc1{%qqbM6Sqlbb_R9D27+1%&h-~6O6lD zH2J)tT;%i;U;m}wRnkMznS6+ooQDDD+IQ8wM3J8=Ya~o+?%kyQ+b%6kCWE5bmyHxg z(Bu`F%dwT4ZDv}WHhC}ISy}F>FC1Yffz1oZaMqd@F7nfEy1pw& z`Rp9wQqFv@NM5=BO89K80|!J+`pkI32jsXd?oZK@(Q3WU_XzU1qC|&y;C$oZ5X`-- z7(RbqXs2Z&38G4P7G8$iRI-z@P_)cqs}s7e=KEA%H>2T9s}mTO^2}_b!mBaQDq|h2 zA>~5y)3XN;*h+33aWy@Bjuq!j>0?63K5vPVEXy%zZk%=9c^mzkfVJ*Ce3SYRGZ)%A z&)2qIOE`%|CDo=&Ntb4d7CLiCTbiWH?pn{zGM9BakmUqec*>yXM$A^SDu`Pd98T*de2i+)_TgnQgP(Ew5(C}ZhZRFS+<8iAs+CeDvfneGIsJ98;s@3=rF zi?k!74!IUPfjF4@tq*mkV6{kl7rm2Tf5Gv-wJ4SL$NPw57z;fZO1mMg4O^9gai1o* zHM`SUTssHTZ&51M2-OQ_F22`}4Y`(5kq3eqZytZ(cm$dJL>^|FG9-HNlxmz{GGD^+ zMgR@l>qw<+BZ9x_hOR~;1IW~Xg@19LWBa`+4B~7B6vsGCg$#@sp~p?{^JD_To-ld5 z)4@&}GxH%hLgGeuXiQjGmnNPJztbc4fw&iRTl}0GlK8-AJl3IBixuRY%sjl7=-6y0 zdkn6Zl}^o`z^(^lIqrY+WtD3Tl23ylN`W>zYB%!~GDv4#AP33X zdG}VDIKppZ(gmHmZhUkxC_|<9we}k_Ld=U|yXE?Q0|Jig2323IgZ4nCNQtJriGCbs z)CZ+GL_3N&{w?aU`K*JVQ@*jiBF%)U)GML}HvL6*Z3Cd+lxHtGR`IY2y;749rHzFU z&{9i+f?iR51e29g!%9c2yF#@*#eNO9odln-3=gWXraAVyOsqW5=e1b6sS7Nr9DZohb^2w_#wEM6UK=t#Xje5|=kvQ&u|O;-#j{GL z9V}6^T}nbNM|MQsshr%6`FOmARx?0(AQP-~7ZXij`2s#DUAb{AD5J9sLuaSZp60Cz zX<4|}fS~RfYB7*aBgCAeq#ZIIn#Z(!V}Xxyd2uL1o=046DDyW<$TpH>)h2RDI|mkT zLR5pE0>w%#8Jd+h;3k5ZoB)Lm_|Rc~gUFnnN|{k4Ns);R+~A=p$oE}i#4P%p$Dlz{ z3ZqGKNN^h-$A}P+r?AQ%p^{(hf6(7=zD;8KR;n5Joj)B?t#kW^b9O$0j&|er{>oBs z-pm4(T4&5Sdgb9#3aU=^Nin?bx5gTBcXHXo0G`u#Qq*pc!R=IN1Frz+*jCL>qa|sjC~P!>!)%4uA3w^k#xym zY$(16wjB%KcH;f$nR8jt6QndQXQP}FLB8#ls zV`kc=@deh%*x7BidIFMvFqyy%z~+k_)PoUES#;{u6sl3O0%t=*S8rA)bxbImOx7`h zb-sjP*rTWf`U$cNp8>&(nyJLYxyuPi0@q=Y$a1o9Ch|K+R;n3k8lx90F}c^i2>wh7 zwHkw%OZ^7XhJEQ0Hw~K=)*SYX!{~zVJo^M4cs$<(swF%I-wJu|FL~8pf9-a4FVh}l z7&qk=Oys!ZH8RFbqGqN^GVmiwt6NWwe^jQKaox_nubyQCv%YFJ(ggg=wvh!q`$ zK6=eukI$9$StUfL)3{g~YiuEn`zV`q6HAs#OFh)C1Lv2xj?JqY$HboIc~ib_j~mt_ z{9NQ9j8B*=*}Q{l=kd1{TJed14x_S&OA^6U+0swg*Hkj1K#@lSx;aOK>0jz#MJiW{ z<6HMml}SBZ5@Xidz>x>4X(y6xILmq z*QK-XeE7^YZAvLRedo(&&Lu0>X4WH5`-PqiCtErL=0mNC<4$-a6xyVk;35LY$EsNt z#_a5`I1#l0G+B%^v>UudpXps{@*RBf)YO&@dYm9FDXq<{*@0kCj>|Uum)=y9Lx~yp z6s;5skP}r+0pYlemm+SlLh}A9zZLVrwVhig9F2=^4qK=21lqD$5^D5eQNzEr#Ck1< z2R$(6j1D^GWwS7HL_RhcJ&kKFMF%Xx%_=}8^{BTu2DxEbulZ!sQl)&??pG-mX7a-l*BxA28lOF?%|4N)6jC14FRijC-J6PNWWdV?_!!sqStqP#NP zQLC=&{)Kn?IJ@rMyclKHLHF;kAnifIk@>fuLv*88T>n_jF#mT86FoEYe=ba0e{W(e zk|7?_>rvHyZ`lmSJ#IQP=5b2t`V^LECgL*BFSNu0)Np2!bVv1 zWBj39{-V<8wK)N3{ZBdq*jWnw%RhUTw9RLs?vNM3qW$g-cchVhhP+(V{Dyn9lvb8W z(-9l-)lmt6O-pl4^R2W$T-wI)5m8M>NN>`-2Gsy%+B{Y`?0j*kK>VK_%8tPkUn6Z+h;XODjz-{OUz;yqASVh_1ts># z$iz&^MzBOmMYkL8todc{1+$|(CB^cmNv8?Hk$*x%%xwejV5gbEA@1&-6N1!nrP}@z;y6vEV60`r*1Fh1U&ud7Kj1-)% zrr1!GR~X08_qz@kiPj2=<8qu%g=qbP*Xv-{9Ur27mbi&5Gb4At{GqazpQz+er#Xl~ zzziCqmf}75^GN_vg3(>fNTZ91bP8_)jrdRZQx;kZ%Qj|2e(qHsM1i2ew{(moyy2>U zCKLH~?IJsaLc4H9OV4`EGOy-?%eG5Hm690FuYcmpQjlQ}3~gp2DLD8a`V}XYHzN+N znUp9ANepO@nsFZU-Kv8$Wt=TBt{139wi{iq?y%CYB9<+XDp?9|3DvZupYB?0X>bbH zPpgk2$i+kFyr_ufvV~UQw5!5`pOOR>-}-oAoudzoEg>wHwX!VGWJAixqjS15yNGSVzducP1+tN4+(Wp(54oK-D{*j=Lf|x(UM;PP zhQIwH^TtT;);@J}kPYuL4z; z$N&m?vQWHf{o{BXN1S(MPG~-KGkv|dV4RP8^?7MPP*>ZeAX>N}mPrugB4nL zQi_>(EEYZ>F4-<$o%ASpO^FmE-Tg>lUEqSqIcS&uT9SyXyzGQ1+#Z)r%X=o8@?{ zFh7etR&{J@;dWw>_ z?2QG8w@F9+CG*Cp;@0I)q}xA5x)a3i%w>4J6#|*gQxA-~q;&WEC22?9?+wRNJ^uyG zAgJ=K=t4n?^=a7B^5$b09)~f&y@c9sSrAnA(`C4d*?4Z~#n`$~m3V!#T3Gl5`gva< z?o(~#Nt@~TZbSdeEvlNLO!)%KMHvPV8+6rqoee};B)K~0U^hdwi1!t8$A*y7xWQOd z1rQq)^7Qa5#k~6qys$9x-Ve%Ya@4_9e;&B*+gt6BWgtk0s~qVaqk!LJG0~Dz7D4gL zwMWz*l2zz#6(o`@r!o>Nh8594sH?_E+O?tEyGp>8$kcTpqQL|LU?+Cu7d3OUw5|R^ z)SwB88GZaKaWP*LIZ6{_{H}1v^+)RkLrJv{HYinste}}a>c6@q$y6M>WW_*ZBGO|w z+1U<^Qk97`haFEAD&=CALtrV#_<4|JVZDwLo^3KfX}drlNGj@Is@M0&3Pf2!-)pd$ zab^~%M|P_$-*y?e#XCYQvCIlKv)oo1a3ra&EYr^_5mDLBFMvUcG@%j| zMqJ5ImL$rzH^r65Nda4vqf-mC26d$1qsud7NTNj+=c@`0?b|tBK74&FD%d?%8C5vT z?Ca$tDfmPff~+oMdYa5iwi%%OI+(!ps)05#nre?Dy`}#;zxcBgg+7E633+bLUUMEg zbm$3#$7Dm1DI<|MF%Qe4<*t5bYuMa{kIZ%LkgZWv94wQEV5{XpA%OE)`1+&()s!Oj z9E<$&M~k$88q+>c(ujEK26gwCtyPpabg0mWbTL|cW_+8~fVh4ch_|E6j}Mh!lzUH) zMHy!((nJeP8K9(51(GYOO3>)-qwfoKJiS=JsEEN|(j|+W{3q13Cv-I+!p+N@y5%84 zSo!-Obl;E#p-knF7s%ZyyK-cv<>%%5j!rp8~#p(=@RP4TtlQ}tv(b0sF@Bh2 z*T4CV3~Q5*NRH0tx{qe2>yhfu-pOxBW7x59XywBo$Ul20SHB5%#)w`UNxt=n_hU9q zI@I$FO8pfq2nf}P3?mzE{XRIo_CLXbE=v^g48=YS#l1QE%gzmgL?1)#oPYS9T9dLipnQJ)>k!fvV68)7K-9)g~K!|kXwiQarb8g@&rbaTOROd zZIDS3kh4|KD$4VV*_cUrKs$KpQ#~_DAR9maL<^eIdKzdJwus@Pm;T&#KJQ#tjW~MF zutSgut^53_^lFPeQZWDS29vFIJBu1+c|?WGszHvlW6fVvK+K9pJe+Ts=V_%QSPBD6 zP>o7hSrO_*;q~gZDDYEKorJsGkB#D|uOxXiL_7S^$a^-Ud($CkYy@QMc^Q(xG7^OxGP{!f zaJ?Q@p|a$TT!Y1z%dIFVQEiL{kEevIUiMnif+}xIyLq5h#DlcoPg`~*$k+tq-^`mU z3t^=oq}nK}EJ$jJs~y#CxCtFpwGc?1QA%L_*JtW4;DHi}(3W`$p)VKax@cPj-o_cD zLzoNk5ZECQh>*Ei@!Me|Hs>}|A)o8RZbYT~m74CM2I0R8Ye>GOFlXY#VaI5<%M8CB zR?}+3eL25;zF# z&9cB5=a=fA6!<=_wSsSM+L#(sYfjbyie=#^2bt<)HPCDw!;)oBVP@VsR#>hzU2Bin z_%(ggI)U_0q##r%%!+OYg3Q2F*gz4oTJBgEt3471ST!l=)#?Gx^j6CWnm|hMW&r#S zloQd9wvA$0O3^4lyhxSXTm6zx?TSrC6c*Ar^)+A zJ0ov&Bu3FAqQFcwWMY<0c9y2%;#UW{ytM0So73>)#80i1I*(!F{|GX_Z zO8d{`Vz+m2SOlh+z8)Q55SLyYwk%c|R!4;eAqzhPVJ=bz#M!Vs%Ag0Fo_Qay+*!&UU^y{?by zvlT$x*7OOTU-J2`ypzxSs4+gl>~L&jM|yAOGm|7)6xoY4`F6KD9oKRLD@!JMicJV) zKg)Z>@V^|;y8r*l#SSapA0HTSt=+&B6bGJqUxF|(Ll6ko#q9fq^Y*wS012e$O?713yRx4ZQQoruq4{M0S+XDW@DNtxh2w#m9{b$8s zaSsO#2%mW$zbwx=rlI6L6O5wOgg?&xY7|ZdiIZ$E#2<_z$w^<Cs=diF#m-=WnaG33hm!(hy>cM$wWQ1cJk7uVG z+32I4(i7S(zQ?S*whuX6>z>TopAK881(oS{9Hd70k=np&XExtxVWaG&u3~!#Y8?o$ zO9;wRQ^So1V(Mz0_p@kcT4wS8)H7juJX=Fc{DCqkjQ$dv57VFHbKn_ ze*%rtwE0U5Q>bc6Bu}t~8ZSg>v*!)wp6B55pB4y)|0|s#rnlTaZsAXKmLSc(m1hxsC%DGjJ@BOudll^ zHt)_pwLZlEE89FDkZq2y_$S*O5YM6JAjNAn`X=}9Z1eR8NC--f*r}_HbcWXihAXzV zN8|k0?pNu5XPeUivdz8ei@~<{pQ|i6wMEX63eM;%ZG!4@;}j1nDQw+As(-LyN7=sn49h}G-14%8syNcjDkw_741 zu{>5nD;nxu1thE}>#T6ac^$B#NqFq1Lb8P{nWADIs2!7Ju6)C;M&<@g`U~@Y2mInE z=D?g8^TRwd6}A$%bxt|zpQv-p9B}C}6eVMwNOa%yU|o6di+mbY zzhPioi~eE1=3WC~mPo5u`v@i-;k@i;jm&+;uIG9mxLUk_laj;LoqH1bN)fW4g$I0d zLv6U-fa0!q9q)?ho3BX;Imi!z^v5S8W>ftn^I+q7&vxFGVmHtRAd#jZDE(k(J`@H{ zp5Mf^WjUy*yT=45eQ*ON6(%{KxGVXfrZpoOHV#2^D7*d#hbQNiAWo+r1Uc4NAeL0g ztl+$0SxT$QHRv+C>6}bQtIphfFh^x`7{z$VxPhhmOfEf;WYnP3^M@C$Xt&<32T^3? zLQSa-ot)WUa#Cg|KN$1qsq#J`tGfC%;7S^lQz<&0tg1{pkR&n7Snb`CIBz-+&>c{_x?qzVRE;Q=yc zE!rNTF@>yuv*PN?2Mnos98lWqe1LtxG3ouE>jfhR{eO&R{y)HZ_Ww6H|2Np<4>+&g z0=NCFX0~QCog~adj!z#8v59p`7}~{DZ#FOR73C2n8l>@e_cu3^Eflf#idnXUp~&I+ zuRq9nc@_7=rqoWft-9L~sjz^3j>w}2d z@<$>CI1TOm;va@j1u561Xb)8jle9_|JQ`p!8(Ugu%XuSMz-qeiF$$jcAssSri=VY5~6r!KWb*UjL5!8eik1X!gs>QCPq|!6h;Np?H^E?QE#Oj5#l3^sCsV zOmw;fR6v3nYtg>q!}@n^LJiG<2|dm<4hVXMWYU--#X`0OsidGYOlmaV0x-O{!mgns z`G>W0MsLXoZCM3?kD5cm_Ldg?2$giIva?^+$XK1~FkDS1=}=N0Aen`6({QAyCf?#l zq||V!byo|&D+gCAzk`k>-wd=NvFf@jCshl$gC4Z3T!-ny-&)eto?10(T-8U4W2i0L z|EBp<+git+gZ+uPOC2kOdWMlBy0UA`em=>;KJy258g2?cRZuF!Xx>t%;c}8e+@_P- zZ9!0O*CD>~os|?kQf}9pzRMv`t=5fHP8Iw$;k94%aQi&z-OoDZemQ24<#1Bs^%3fN zP;UsiN)Y@pUI<+I!Z48njk!tzh+6WH&JU><@f;JvW(qVnRp?BvIl8Mgn%Wm>9s)myN>8E01Q=B3XWMOze@Lja5%v6`~hH5(*+c zo|+FKJq}VF8_(quXo3d((Wdw!Az6?INpOBd{Ad*uAkzQ~v~-J>eE8n){4Id<7ibFv z{e&;qHuJ|?l!EZZdI0>;q>w>_S_%rjAk1@DPg%v%9mF5MD$9c|H!?$GNKnz~*3%j7 zg758|W%_d&W`OsCoqx^<2oF-81rw+Zftt&obo0A*>RYEus-sH-((q9o-a zzMX=^P^4dlBqcF*t-41%F3eO#pVk~i|p_{oqL=&C|3 zM5O3pNL3+E;lg1WA-wuP%-B<*DI&=C{umO-_kx808~Bhny19W)XAwN&??DlW(N22o z`N7Uqb?{KWCGo8_ z$-zCT{|xa1Kfi##Tk4=dzJWk@<`5ZI0`<9+m>;5J%^&UuuhR3aUL9B)4raNAAkQwI z^=J#STW&i@H$1&H~CPnqHImx zcm&qPgEaTz0#$}wurHzVc{ji~hC-iKJW9Djk-t}efikH&G!ytVXY;R%A;pYqz+u?) z0EJkO=3J5q)&_u;J+?rk@{WpM&5$Ah4vh?gY}8Q$Mo<-MB=BK%t1BFcxbJbVR@b)^ zs?YOgb@SyAQ*2${V%0|-3Vk+BfZ+E~?q0+3odD4fhkCVRb%WG~hdbu_vHGECZ6(Y8 zog06Rh$Ven_BUVg4wsd$4L1@izVBv#unixqK8Qglj}-=;Ed;j3sK@H8b_$6Vq%jOO zz)`x2cn;4h-D3@j-M{8pOl&_~qbDRQHpN;?kU2%h0>y0eJ;%Q^Z)$m@;Z=Cnz0uW> zSEW?n1fa-%lkh_rljQ##az_rsTDS7z&gfJJo)d4F$D$r2wJ>XVytTSBcnT>j3z-W8 zgYR6$A9ihan`;RmL0?jkk`{wz^<|*_as}82(3tIjdu$kjiHm_1lZG*qBo#& zO|1`-1bB0zHxOCnxB7$Et8<4CSrKjZ2X?zita1UeZ~l`g+wb2Ra$Pd2Mm!Ezzr2x(e%z4xNhRLQoFDXGar*PxPp&*$d(NCNau(r z9?!73iIR^!Z!x%F(>IbGj*aWmz8kBa#E-Sl$0M4UC#fxu%WNu^hxMRmosOQ4yaih8 z>&A|04fo6Q>%!9-w2^tsl^gLI?E}C$;4Dbpt|#HSH|sptJ>}Y*Hd%U~uDN$1TO!n0 zV_2?m)j79hC-*sTL2L}zV~TD(*3Gf*gf(-S(Ze>s%GOTZp0mLPSbLk*PPzDBX7ANM zYvhHl&x+yoPR1+n2K z-_s=dD{POonrN@Lk|$)_#HHq^sdI(zNB4`}CW$*iYLJ&3v59^U4R5B-27E*94*ECe z3**#Ny`CDL$UJQ(IOkM9^dR|U4V0Nltl%pySURG+ ze0LKqQ5;QMSIjuTl^{1hRJDN8{Od3e+Z4cIx0CGnXIIBTnK5>e2qJLy-#ysNu=9gk zYj|+n45U^O@3WMJ5Sroig*I34L#<{hFyPt(;Q~4dtkjif zBC&!sUd+`7dI9I9FhH+(5xfSzz7w38mi&7Fu7|;G+nZ58-Ul;BTCd%apJ^U0xYk%9 zjEG&NyKouTrEHb}do}hda|ZU@`Gl#Hd=S%xL9Ex>6+Hoci0Pj8xK-I8^`|<@jPxSo z_BMPIb-3v&wd`wbw5P*fZzBDJTD5Wd952=|N z+RWt4`1iaoftAMM%p@IiG+{KlgLpmpaGN&7E?n)yCy zwvtpy`h$~T-)LNC&P7ht{-w}nqLLH4EYfc_R1svV#|`MzZ!Xy8C^(BZO}#92nKtA6 zF~OAH&R2jLZyJ^cka{z%&C?BRJJ9?FS&L&h{Xg%vm>8J-dzQ{6H&R$o=dhB?E0-W0JVu7&R<6>W@Au2ul%=WX!ndL(H`61NQdgdZzl_ z*`?M;Zxf6DC*6S{{&#!9sVhwLfh?xicec0b>a`M@w-*tHzkCgsye@yh*o`ai%D=$a z9)*MJe`TjT;Q+LAipV5^^lXA=kTUPv)~aSIr&jZ*>#ttOS1%vl2aP=tEp1IZ_?!1~ z1U{AIO%WrE4^g6gwgHymiRW4g(UyUEj<4hQR|Iy1Nlg$Fb38Tj9wNTpJyPX~)-*8H z24A|he}wp4#RIc3|KVbZkU6<9aXV!EPW``(-Qp9lyWh1Y_gX(tP=TdQT!E9c~5KyyXDZh`C1jk)D~VO4kS#RB9OnxwaA8 zzH59#555xI(dxZSCIh@FoCTw4uspo!MZ0M{ zMq{^w^C)x(KPukYIiX1mIqg`TVBa;_F^OA6xPY+|--e%JtB0OC9y(j$VA|Ky3lqJ2 zk+Ktu$RylGW{tpzp8Sm!x=m=~gs3<)c#z>MDDxD5r4GnLON2C{z^mLdhGfmbfPMvP z9c)Qn8St)2w@YFSmZxA>!(8Gzs_^LWc3v+^e#!@Rz(FM4&9|tfFpg~Nb+c!P8CzM@ z!Vy_`EWCeQ~oN)QV;g8Y@ad}s^2G+P=QJXy`RfHLTF)~iPl8G;J_Fj5tRgXrpIxbk7ZCU2`1i%+yr63@da;c)dZ6*!g%cBc!Tp zbb*JRJ7mS$a*E4#B_Se8kfOC;)fS&XQtn5v;kpn$`1;{g_ttxZK+m?XpA6->?s3=6 zf3F+PTBcA)p%3Fsn@pX#u3WfYd`s4=p3&H$JEF--m|oeFkjSHLH1D`G%r75@U~i4CQFOr`y<_p6=V0z`lHads13ZT-0XzWJl05ulVJeRQU~ zv9>|myDAF(=;wI`fb-8(bTZHsF7vHL&;;ly+Z@z?j8X~L+YYfO+{)8L{4QNFIucCk ze+lNgx3)e#L&2?V_#wyHYouSw8pBCDIW|S>6tqyz-(1-w_r{8t!Ig3YCH)NRcqUsg zHxwv(Yoq$)*6tmUs16`s7YQp+%}$cg#*lrkktU;9VSb<5Xo!>R(h1NhzF5uo<|A;D zEWQ2w(GMhaGqdL(OL(;8VcQiRo0dZ;%Ng;(IXPJ_F)@~`hxR+Z z{-ZUu`Gs29ov%m^%QRxhn-+FE3){%wL7U@|JJq6avOkF7(J=T~x&Pqj3);Aar@fA+ zvB)(Puv?M4zXc#+*`A=BETPbA`yjK`Cb#*KmuSIs1{Gp$>!1~sh#U+#Mx3_$WruCF z_rjN~yjLIHG{(j{mK%vh%u2i-_@@Wu`mpD`YUu*vmrbxjY-#%aHrqLGwM=)sdwIQt z-0y{Y2v#36-MEe1lW9yPizZkiR=-9>5ttd?E^<$4p@5w%0%c-zZ=gMnAs1PLL>5JU zjqIxA#U5bfv{?Vdm30%blFSu!2{lp5qE=osn(l1m#!jQFw$d!jyr7*hp~?wL{31U$ zmwtCR?}k&Trp!x1xOA>A@c4Ns-+NIf)0t$m)Vb%=yAk+)kJ{s2z|1DBDc^VTm}m0V zQ|?-gZEe{UV!jG|#j3lsTE?pnlC>Xl@ly?^_Ija_mU`=3U$FMO&Ov0H`H3B8Qd}Qj zk)sJIYD!{RbgWgmPtY?<98VR*3`*KsEO#b+?4sSld>#vn$qTN3;MR)C5=zeYJNPiA zPUAn-7;OKsqx=7$?->8q0Qy^v@rTsKpZyoIKHdlQuBZSAL~{}Qrq7Kx@)*^wI+ZL zF{v+?oqv@}TLeBWSl#2(2AuCZ6#l!I%{zltcMTsC@yMLUH(C}2AU$s&Ggz7Tc^0aA zN+(wHn9W~Dq&T+|+6Rq%!Ov|?zxCLUX9z#qLFn@5Lcu5nyktj#9 z9ptLpS4aaYtvh8?7|f2)Rbw4IfGcFY!s=YCBh{PzBb?tsUsQlLpp*a}p3e6)uN$Cm zw<%#oB}cOuA)jv~FZc1?!(>7e$hu*O%#3Z%ymwnfwRkQqaD(?{S$$L>8@{SfG0Y<- zvm_g&P4-ZW&?WGg{Pv4Lh&_H~a;G=h7}iJD9-rk*r6mXH@yZ2OxmTl*F;HoH#>H9P zMTXa62?<=5c&Moe$}LK2^39@Vr|6xb-~k-NYdBj3w$O~Zgu`Cr2b)sq&OrP&Uh>K2 zcIib)eBkl)s)l~r^8x)yx+%Yiq@n6gKhA^n1R6tSJfqe@#H8GPLDS1AjcrKbdYJOf zjGk`XyVYhp}n+qTV#ZQHhOOl;e>Ik7X*#L0VS&;GWa z-8yg8`43We)z#_l@29)3(<>U^w3guCobSDy$$et@+XTR6*Xu+1<*o@DYh#hN}t65JU~slbb9znJ`}hze3C(`%Rht;He%x zifgpVl57>+s`0ppWD5bh^5kT|n<*`AYA&+QEw5Z(*fHBtng8%Vdd3pb7S)qtp4{$x zZBK9&57%1YQxn4z6m#(VeNa(`1z8;_2YiewV7WVJiMVrV}3of z)q9z2sMq`@A#8(!JL!$69<~nmw$C{|404js_s}N`cXV7wlg~WEgsO<^4o-&y5Kh%0 zF};7n8OgnAc^mm=2e{<5eonr9-lfYW)!Z)vXB9_SaTKWNYbuJbR8iUpV0P@U{enfk>aA48Q(UBf z?k@ptnP{ zWp;Z%R`gtBZDjJ@IV%?>|CpjtojeU#jk-rT=Noq$hk5aZdIf} zB?U;p_gnD|U_@L6HsX{P{0Buy`8N3hTTpq*ZlgUjXC)2_D(cb7eCf9QEsmz|f0!Jt zyBZ|jdYsNafIsJ#ta)H;&{}`nlG{98lguNqm=!Q20pjU4MUNzld8rw(HP-W<905Vk z{=MnZAP%^TVvmjRcC-#ZA3<^GOqYblW`dQ`ky_X5txolMwvwe(3~=ou*#de5tWx-} zQ+inBUpSlgqGxI{H!;wg^@lafP(_cb=yrzW4@fYjjL^nRI_Np3RK^OkLNy4SLYOnb zE!tHIt123ZvN-idJK9;R0ol=s-|2NK+Z^n;x2Z9Eom$P+oDgjS*63|){kPsoj2+PD zsSXejrLA^sUu>XQWZf%{SnsR*bjUmPY_dvR;Pk@J?;DJlaPZXn?a1IVzB)3_usBtU zk8=iE*tg<{qf2J8C4Vbn`C)5M88bgyTjNjKO1gr!|4ZKZ{*5r=vzG%z@}{qugQ#1^RO|R-?Y(#UoSavpjuQHyI#c5$=hIkj?R|SN`J%*2-diejrBs z8|s8}=T}4TS@SztY37ByV89OkOmNzxIydEJszgSoO&1cW>&(BY_NU$lDU#=-t8j`BH@#PXjw%F{DCAda%~FXsTT^azNfSY>61?Mnch1D_4ZJlw$8 zUnS0YFh6tF0hL+~ziCn>l^YQHwxIQWe+Cv*vm7%qH=RVUh3rL3^wm}Y8gzcAT7=-q zsk??l9euX$X(_Cm-rXku=c_-4NV&@V&+1w*Iu}zfQIG8gX?24I6?D}P2+wvaSsz{! zkS?2lg;7#-^(rJ{NEK1Y(&S^ujybj-$o1Na+urJixXnSFNX>~*);t5NxP#EZHX8K} zMc|V1XoTtSHjJlF#0`OJ*L-Ub!s!4z8MQBD3h_V{Ey8_(O|(fVor zx{PJjqO(by1T$X~zKg^@%U#BuaC%yl3>a{8r^o^JB(7+6_aSa=ynHl;1Ar5y47MNa&;w1NSCH?^#U@_{Q<<=Qja`}ZTebYX^etu4g!<|VcTUj=K z%)KhAogvau+No5#juU*0Fpwazg^(;}q~VY?vS!FG_7GTCI;Qc=WAHs*{GlF^q=aSvu{mO+H=w2&VM&YcC=@J7S)sduWxmfkd`Cto3UB#;*nVom&PA z1LybEZYzuf_cdgsKjyq$pb9s;C%TPWP5;R3_d|9`JV13_rX=h}!F+6z*4%0Y02=jj z8yhzow?X#)09kS4br5WMJwlI|(S!Zn=g;{6>>K?5lX`l(|E|zF(2$H-XM^dws-D5a zs1)k-!w&&o2lhC#wibpzn<`BCGo$n8DrJGF>74in>7NxbdSta|+*dJgLNoSrhyVLA#&RhYxRi7Upbus6ges51(bmXoG z{B`~GvT@-SWh=j)=4Ak*agbqnn|gTXym;@%xxgVi@>*C1fe4qp1XME!9l>u2H^JZA z@1neiECjh-xi13-d0a;eu0a+;%1tf5Wep8B6}HMB>q001lCm;CM|&#$tL&dL&Q8g9 zG%_Nyh(+%a@`QzQe?Mo+Vd@e?TjztkKiQhUzovr*R(+{#jjbc~PqgEpmdzKFM=Bt= zpY?j>Ar3mp9->Imi#<4bpW`?h5;&vw&uOJ^fNWI=<1t7f=|xl(9HwwAbxiI+%OK>C zWAU(Ux2%f9Ar&s+&^`kneA+)JniK4$Aqp0PwdZpbVrW|w+8Yrr=%-BXFz}-y{}Ucr z8-@hfyf0}Pb=3-xvW+y4PbDQ`N~t2X#9U(^6!uLsTkalyOvp`f(ox`T9Cx?V?as8M zi}pu-1_E3Bi9*Hs!!(lnag#XURV6Z!tp5a-evSzlLp|?`5ecg>4?>NTY)ewSVWf$y z)zUm!#Npr#(`%#_%%h{L0mFcWy-B3}P#YtGqBwzERH4d$`5-g@4>+=2x%ciS81lwY z?HNxQSQXBx|1W_o%4Y*@&j~c=ESxm2!YLG2JHYr6GONOMCCvqS;m_QA@y5YZ>%iw` zMDs}6C0My!m}VX7o`O+$Fy=%co2@3|ex1f|MH>f9t2c!s>1kNd!x%L^St*hO7}6p# zhhbG|3a!gE&s?h#c})EGqEXZmWK{$mUw!PEDJX^`xgtyTR6K9isr-l13~bJ;zD=v_ zuJrLs$oH?NiHW2d96)5%A$21vMa&GWxj&jWm*LTMTk`as<_aK_r7~5H@F6@f zn8b;j{vRn#;Ghufu24{okpf_gZrzBFz{w+j{Mm%!;-JAgmv|J~$5gqR~w^`5>wBmXr5tAGv|f#n4h`e_TC{U;m?brC!j=-hnsJu|@S z633hGs83sIWr^bcU*TAh4|PRT4YN*oX?JUcv7MW^+h6}~0UrMCAM)K56l1MqKgl@@ z(C8-x*qwd>#8pOpY5&#e7xfit=rC6T+4L4(;kRSe`L`FV1bkwlbH%NIHEsKx=wWBc zzKhK%DQpUUa-msw^LnSY@;v8y4KWA=8U2wm6nZ=Rdf@g6hNn#8xZRau@_61ElC1a+ zXf^!J$bq6eBqU-_DL$livOZRZ(j?w|z3MS@#7zt`X(vB!Zz0cs;d48)12w zTa?bkz68O8N#vw;RVnRS)$S9kPHprkl*?3a zA*fK?Qd7EAIo)tM5!4j)&zEQA^08HAwGn*K8y@E*ldNwGx}&`%PbV_uCgYb2yfX?m41yk`gye4$utz&5U?W z6--uG;igW*MHXaGVR(l1acwiXnw=UXE7<_d+D#?e&f=sMsDzp|SJd^1w`pUgGAGOX ztkdYE*1k0`dV;HE>U4vnb%KpA-Yx}uJ(C-Y>$5T#qoe=6UDLN*%gQff{B&M;cgply zZLavOIDf_t-ris)+K2i02PUZ2#SM_{ql9m}KmsfGz`x`Q;Y}NAul&){+Cg$hD~cm} z_peEB`z+^?d3-i8Mtav_+^dyl*LDn0-3#ZhfPcV{67(LARSO5w@Lp?>mlGI^+8yBG zgWr$mm;x)tvXZGfXw?TP*3x>utFdRyemS6e0RP@ofcq4Juh8n~3poW8N7T!Wkq{Pw zNW_d@{Ayo&lALn(^{pj(a+vRY+ifgz#)*E2z(M&yU0N~~cY^_45^Xb!7smNeRx}+O zql@nY=`F_AQO9IvLmb_)DVcK_wJ=?3#-+^4BVzjM9YSt#J^Sy_hUK623Nh0Ecb%}> zX!JK$gw7+%XNZAVWi257kS}3=8=1#w`*c|9T`Ler@!PVfqo>C8jZTKsD?NH5$JW-3 zofJIwj|{2&^EsHnGu^n^yz|SP&t6(w-7pm3kp0~Ob66o!b;lvo0r&hxD5no4zovh^ z{T}yzd}3wAsEn5}UdcH{2^hn|{xjU&q_J*N3Hx^L_pJBu@csZqM=lmOkVGJ3fs@_v zr$_KO&G}noG-=43LChVOEj+hu`+gZb&%*2-$Yp^tRVSzB(1A<8L;Z~IgJpXCR8(OM-We}mgzo}Wjf&Y14#W2{X@RXU`2Iqxg9CcT$+8= zED$3&PRRAsWTk-o2%0?b2q#o-hgkMfQh%TugQLoQosBK4oMxEwNEs8w#xH_#Sxy|G z9im*9$J{keC6+*vTe(eRfiic^{Lzxcz`9@9tr}djEEy~K=A`Cv#UJa$+CpQTa98*@ zjA@n3aN5+uX@I*#01LWvBj1f$PLgs}maDE@)qpx%Pod9$#YA=nX<8dx)A((3VpOUi z{;(J+dmTWoq~C~6VyWTX_W&O<_U0`)r?U9Ms#pzyjg4VT(AC%EmJ>(KwRw?sYdw9% zg4s~{qWevB0+hZ3KRR&huokexo?VY+!gz1O#;NR%7WqyCwZ3PquD-IA%djD0#4bA# zEs+b0<0;^g8(VxRq!0c>$sUf)zK~o`ZY}KRyIdhV*>(Sj-&~spe+b_GL*$<^n^mBK zb(wkkaP1+h23A*bSL^y2tXd)Dv;8_?isLFtSVQJ?=L~+dYH_X~_73IV zM-O3-?PMu>AfPILgnsr|VsPgv11FZwU|UwSf@nCnP)*=AU@_t@$+JUz&t;tx<1QnKGPV~vuNjE?R-;vq zzuWKP$jK-bw>{%OOT`x8-`4(&s@;sYG;=S`@Wcp@f*qu1^Z?J#{V=&NBR4iwF%Z3f z5gesF{S&5rXzQOIm_F{^#MJcCPG=xax3yBNl(=PU2_4n|MOUJHxhL(K#d;rGkEKlP zzc#>^UL^-D*)hY>AxGD#DNGG4HG-)5oZvyAs9F|uuOlDtg=4ON&ulL5u6nF(a<`D* zP*sGc0^LYjnxUFMw z=^hmifcmxovuvHeh1q{(E7Q}n{Z|C}LVYxvh!q9^v!@UhabjVKU;0D7q1yL{}RZAMz%Ju1F$xX+WFiT$uJ{xHqp% zF&bguNvzGZ8AW3sbq*w4?rbZrgbvxhdsJ2+OFHCk`7Ti>g%hZOHrF*7o8bP--~ksmd*&JY zn;Y!c1x(>8m09sOCun)cA;xJ0yS8w$3cRc$cf$iu2# z&1!MiU18TDJ>R#*NV7d2hgfqAKD&I56uqzIWDpEu)HwXk!HQp*D}I&#sC7ifKMrTB zI0bo;Q;}6Y4Yh)PvoCu4Iq#YjY%K|vev+4BaOWu71;_*MVjI;5WDGf$6_6yJnm!*o zmnQh7{5e8#7=(9^@?QNhsagBH%M`c~G`w>Iy0|7|x;3lFM&sTQJfIY^#m_Si4`$qj zZf9tQ7ro7itWL4l-D+D97+$#1Jf+B#?}+d=|F-I-URtT}6qi|XJE~_&07KVxwF!>RD*92x2Lgo;GYp9KIr0MN!=!t)*x&3ELQaG`-qM6cCUSNDCgK z2fR11L(yhb1ENm)jZR^FHO0MkxQh>rg0yTr72zU?oYJe<+&-J>a~Rp-G)5N>V(bX$HHY;w1XM`|- zHR^IF{)cb9>R6Fug(zh3GxfS%mC-^KA&T$b&u1ACzf@~FsJqsE-C^|yU53!QD|v8v zN4IsJN)rTxUgA_%OExMNOACX2@%}0Z8WcZ+u{{)j649_F1xR5bcmj=Kbe66BTBX)t zS-jzI_!8uHzs$dLh4m+}y+ZE#Vnn)_Y4v9uAazU5hUlzRxVgGp~c zC(2;KW<~^o1u|eV357K#}bhz(J&m8eLIe~ zB7&kdBJ^AZB;FuZsx^Itw+g>NrhmmeBUD@wydorAr3(Y^pH%YzVe|VkT#KiY9mMRZD5@T@)AoI-!Oh+d3M(kGc4Dp}3w=|3VO2@2 zcz;khZTBn0MKAgN-{Raq%ttc*SAzONUD9Un-$q)fNIq_%Z(j(QGeqjTp1tOIo_Koe zIrd?LkB>OF0ee$I8#NjRzA5Z*qL{a5=zIFloH2@iUKN7h)$+r5uXkzHSM@Jf9``4* zB^9%y#N~fXk}vnki5q#}?hU25FpxuO$!u>89h)Sl;{l;T`&$ ztm+WKsqZ9PjWOG`wPM3&9#_BJ3K(Qvz>sz}t;haL-g)+AA}Ny-gvFp@^Vz}`u3lfbU%C^!wwH>p-Wj5? zP6g?|f{+^}A-cBS!a&)MNuIswW_zPf7(`69aD62HD*fP(_{jjJv1e<)1LLfRbn0NF7SU!Hz;wP^jWycscKEfyz+=*YE6TNAjVNYe7A+($KNlOCl6@j%Ww28hH zXoc7$7e;eP)vLpXXX`23tpT*TWLk9KLg`SQNi-_fvG$R^{cR-06@*lp`uot*u(dPp zW}lJ3r?CORTqOvCr(xgUVG8R%EQ@1d`>(q_0C(D8`IM-SAkqoSR5ZSMg1!U3Ho-3d zjoSHygy%VSRT3T{R9193(SWGuA1oR>P?W41p)-FPQaARSw;cF)j{NY|>z}Y{8&v>v zI_ghaW_Z5kpK|odKSZnE|^ePj^<--3qr>fhL+zZa*up}{2E2e6%)qilDGbM z0|K0mqG_L>%UqahM%_2~1DxpoXkSC&OcnO7^SG;!I`=MxE&nn~*A!l-a+x=Z9)oIG zgCm7#HZqy%htP!%9#o6!N=xs+@ATA0`(8~WrZ-h@kae^b7a@YHv}}5%sk%fugacfLWjzW^5<)MO&e;OkBmkz?c)uPZ0j?6|{Z`O6*nH5?Y44T2$jcs-X;d^ZL9 zCVzS`B$5g~(PBWkPUD5n_%N=`a7P0ZobX*{)uMzJB7gim#;Fo~aD^%?6)Yr`cS|hI zC9ry9IvVdo1^8l%p+g!3o!=Rn<`YJ?W^ac?%jeiqO2jkqXf#L1j#5RXx zOhasKq@;U%vZy#TCV04FX$1ebHhztfJn;H^&gpr<3ZsjG-bGqVxM4T*9I$|}S|x02 zdbHhmC`6yRuh4~>q*Qz7ly8`;V}+zuS#^d_@Husc;LFA$rwUbgs!8{7P*!C-+~%;p@~9cR;bqUa3B-sBpxgC?{AeiARCUXR0b$! z#7y(%ZCX_>N!{SLldgOF(;1LAR};U=x!%Z^Q&!)av!3qZnYLEX>sZ@a^Q`Z}>Q`|- zp7ym?IETe)N>z8>J5WWA0>J_th$YF;N0B zY{F*A3R8i7G9hgL6tMA-QQ+ljm@R#f|s2c@A;W`6vz7 zMTAB$&7z=oQ88RA<}MINiqZ-uEGE~KgAEmB4;?B8d`9j~hc7@L_N2dSL$nD@c-}EU z!s|Cuz!#VWDj{Jy!cVFVL?~t2TiMw@dnPC*v?qVa-q6ayIr`1Y2Q{pwK}PCPMlA3c z3yHkkWo6TOB33MqCsHUp5g2N$#3NR$j?UAIj-Rl_^)h5sl{8?kh_S29g%v4ml;ML3 zDK16~4=7B^dnoPs3l$r0nsn%F@j|WO2Uv+;AOFCSuJ@PtlA^P}MV^0jUrbNO_TPp) zKtTcKJpkLS$M8Z4V)F30BlQ+u$&9x?c>fXWZraSk!v4^&C{N5Tx~upWe+)W>IDhnDi^qEZE>s;<}Q!kCXslNc_ZkF zz!e}*riDPz&z$ehkd0-B7P6eA5_!-AeD-i?De>)@Wc)VKy{2UB_`}&x}eg|d&WfI_n_?5<1frH z3~ygE1=ranqf6Po#jO+m0bKc!n^2cZ-(Vp(7 zkujbUM9&aOm?~2VZzLqTM&ON*4N4v_lNsMIQ&+t`Zjl-gvCc?Lk8&nUx`Njv*Iea1 z8rQ;5g*daT+%Q?uRuzk0cXSji;9)gJa-XGUW;=B*=8ju<_u5`?Bc#q$95E9X740Or zhZfYP4`al$*y0{_@t}c;Kh-`6y?SCQW%Stm+0%%Y{OmM}>%D(HgGns#jg)8sf?Nxi z=K@2AiGej1rqwc&c%vHgkbp8v^LuusZbEvNAcEdYtZiepHO780|2qUY(A5(p(U;-0H0^wo7?@pXzzXmFf818q?#QfBcR)V_MC{$>GG$)gt=A)o7 z_jmOCQ><*rr)BO9tbAH5S^vEQ;iqfxpeupODqH+q6r)l+KMLA-i~Cj80GYVQ!14eY zfB;QZJ8#@$kZj?P!RBWMkVR9j%fLlQutUgcfm%HU>{S3FlyX!F;R-inHwte%coY4~{-Pm-+Y-rzak2XKcc}->M66jL4FqnS=0=gE4{@#M z(5~iVoZ-y}vmzeo^jGJbPwHbhVl_BAz@~bAzsU<&VVh zJ`Y)ReY44Yb?e8+Gm+WeKY?$3*V*93ov7|ExSldj>15{`KbFZM%jka^hdA1uWtXt; z{q5zs6_M*e=s(+vKToC_OYVwBzw+VqsF-+^W*?f|LJpxWZW8C*Z_WibZM${_DMm6! zhPr=4+KLBpQdY=QTaHvmkw`)A{k8_bxF z{tBK-0RV%>NL0N!Q?G`;gR}55DH_zI&Ui8se5d4~CHhF6KAewjTQEs^Kr3M7G;VE% z3E)|J!7-G=+HZhRsX?v4?|=5?$jL8e;*R;GKIEe6#eHSd0+?_+P6gF_P)_OrI215# zZcjS77nwzTOl%o)V}$opOK}!c?sVINfXgG$&aI9{{+!F-XZjQi9w zTn0;Vl47Nj1*=hZdW>|jTfG!wqpZaDBjX%iICZ>f4{7y9b%TS;ekQi=D6_22dE>ZX zto0?-{_Fg`AT{#+H7BMAkWJx zC-{n?3s3ei3&x#RDmN;370RdS!dnV=ox&6i&}&>o7Go0YW)Q#AlLSvpJt&vVTK1BS z5X0xdbUZK84bL+@eOE#PGf?mK@ZkSk`_#aP%BS-_906p>Ag^z|5!6+rA0J`HK~$bg z3*6=|er&>l5IoY229ketMNC4Wg`lb!B)Cb!_Hk;e?jZl+k*lTn;VH?qW5*c(zAwUB z_I7x{j56Gu@l{Q$1T8yc=U0e4Xq;Sh2ZS$b2l%!dJNS@Xd-x5b{KqEjkdKbM5Mfuz zexS0+f*Tbj%Z#yi`1tU^_7T2;sg*g{U{3pJZ;)Rr;9sYXMa9G?Vvv2#W~iU}r=V$` z_<40Cc}MKrT+R(7;M@+C3 z4Pi=X$LTnr=6FA$2R~&z{VjGd{gdwDXCz-*HV1>z;b%+E&q6Ya=w1I zmAm>7Hj0w@uI}V|xS3U< zvLz%+u!PL#XYz?O{vt23x7dc-N_YJRO$eN_f>lXAaHl16^n7yNg$i6|k)_^bHvpUF zcFN^m-HW2=?D@1#rJ&gy9k^RFh(G7-4Gu{}+rSc{?m7 zQqogs7;vGV(G#9u5+|sYY^VquKsN1j1n_A%?5qAwUY4?`0pvydU*yHBLY-T}v7QjU zK{8HRDO@Y>Ah1B(l?Omx#yrmzADs`UP68(HB#+4IMq-2VI$RV6BsOO zRshJ0GnUL7j9Gi-cTsWyWYcqiQFA{(vVN-Cw$H`AYtZ;<)SNQTG_|3qg?ZS+eUg{a z=Op!$O}9_#qKKZ+M4F{oiDD7-Jw+xfvb8+hUV`h69I-9W%~Ack0a3HG#H0vk;@Cq; zXJX~?)Dr`31Z7%O%MCeq#TqwtkpZg%-=tkeG!qkh^N^GP?Q|r_Wz!U`(|NqGO1oI6 zus{P5Wjn#(nx{Ke6Q?xsW!G-`fHHoVHp$`_Hi zpg=n#^-i@0vb{Y>_%U7&GDinGVnvz?m{l*1aGJ^h(G``-V7lgu^$?+uH)g~R6q+AX z0HHH#c+ZspB2On!xT|ZuTwuk#p9(+E8#_vv3$eW@;c_hGQ{lzFOeyEGEu`>Fa^JUp z0u-W*E7JF+N(;6D%y&7C{ufTTCoAk-7>IDm(sBOvwH|_KIe`1?xW{P$8=Ba%P||If z0pAaaG{vN9WC@HkOpQX=1&80e0cYV0`Zn%qZGXtOU-Y_8p8=APFUcnm=L1crpIHkj zsi!6cq$ApZtfi1hyY)D@nqddHPX*c?w+mx_M6(^;|Kuh;^v5ygM}jl-EW~l`lSV7N z$k!*EAM(t(ZGQ_e|7a%_05JdS1zUe(|H}*Bja4R&0ENK;HUv-Aq-%qfqzK3F zVLs+3`^+erVUHDafFtvg1ws2MkzQAjeQ+c0loYl`l)mzyPGv2$rT|mD2NQcw-3JaM z9p3>KCU44I+wbZI`K5oPpN$+@&d%OZ@8PqHS{(gSn}UWDL%k(2fUQ)kEoGx3N=lTW z4qYZe3(GXdg5YS_&&x8ZV84qj!ggu-HO2XhlJDT2vViQ8_>V{ojVT74uk?I6zC^q38 z5~^)en^pzAPLuV5Ij5p29jzf0ys;87>3vpmZCS2+60h$*uxMTn&J=gXIFk&(m|ku- zcq=7?g{j~u^^@%2PiLl5Ny;mmqe26QIUC6>sWrbJPt$PR9#OZ|OToNr?Z=6)?Uv*d zi{{ius7=lK;|&eh#=gxW5xe#LERGGg4=kg2kQ7nb=&XrJx;Jg-?-f?JY&psYG(xj2 zojZx&f;p4F4=re(Yg@zR+v(NEWS~WRMwSI}cGs=t=O8U$I}T$P(LAqWAulo~7WfoK zxuVuOJ5CKR$8#U{w>3HXW#lq)tTl!` zsl~qfEfDvt_^5a35LH4(WJTNs(V`fCoHQOsw2J9k_Z|$T{%j%{q~8wOP4%-%tuA1r zw;v2r4iCscfiRP>yTR8eVJj|R19_>@Nf^X@Y03JMH#@YZi5c4vknxckAu#yDcX&(XvYOiA1L18bb_^b9o(%0 zyN!RTbd*sR%?g8(B9{^X_^VG{L$F}1C&sO1-l?>X#&XQLnlXhvsjEQHTj6**G^7@n z;?H(mesR#*;=Gzy34UE}g|oKHqT7Qzun{ZQf?#ct`F+RfkTv?jA^iq64JXpa`gsX#Vy^78Sbz`^bco1~S`n>W$JZ3`;TLEuyTj040EwJVas%6sDr zRo|@;n~>y2V1VtMe5v-YAuqS!erG{Gi8vW0ej1zYouGHp`N3N$nQ3n5R`bd*Zp0;EwE!PCXN6UM&gsg zILI<5{eY!tG&7x*r_Mwpf?HhMV}b~%lKVG>aVt%d<-F}*8R$9GtxUwA`p&d19Xc95 zag^jUp?X`CNOQk<&^dTK8LWO;*_S(g?+k*O@SWYt4`BON;EzB1w&mm}GjV76vuxB` zvX9lF!g-;N*?*}H$CbrCt^3ZoKv#P6>j7bHN*zjQa5Zoat<0sVD$`*pV0GV=UeID` zE!TGD7%n`N`hb{%Vo)y6NHibwx0`5vul^2lPMt{DW-^odUUK|JDzi>t35A9FP{}Fa z@mf%9!#Mx|FJbAQ@PhXjykr-W!G0Ed8#JHT70tO3ex5!1{cq2Bb0CRo)x*Ona~Y|*qpL?B%cW#PoPOy7GK=N%XsGu z*jasEyBx*2tQ!Y1xO=rzKz10}OWSFGn<>TX7fMi4HCOaid83jOEAm%rSx9f2`nN># zT|x`)ajCJ}uo}a(`qB9j1|hZDiiU#diC#kLuoh$K2^PW$gTl)S-GZOlz*q>)01HO) zD)cbg)Eg|{595IE*L$RyWC|UuZIjfmtUN3+!}^Y(JGkW{$rfyZScK7Te!W%&5xdL3b$~Vs(Ba6 zEpml>U)t`fVNQOiD72}YmS~C<`{nkmxupwuJa&lUiRWBi_=2@to=xECYM}62*yE*$cD*ag9BJ+2N1I(>-6_ z4av&4fpV;xcc7dhR|whjoN@0D!MU&=i{OJ;_KkLMizEo2BY}|z{MrJVxiOg+81tad zTJUZ&>PK(XsiabL@Li~fz32wnvmZaAE*5D`bo`OitR!HIV6v#(U}F>!b-iD{*0`-& z|1Adnvy*Iky8o&L{=60Z>m>UTB!BehE;!6HLeJNo4E@bWY>{}tR;?;5{ zXnzcZa}k$>K@A=1w?KK`|FeL|CDE?$SJ!rvUmbLe#O zVC=~bwTz(uzAd0nU3=;AAF6?L{}I|8N4rbyY9NpC&f#rvU{;LX;haYf!E-`GWi@8T zmE^((4*?-Vyh|qRxyraLE9_1|Zqp0kI0v*@3q_wC=lPT4h{Yn^{XZP%FB^FJ(+1WY zLfqF<*%g*Tl444~Jd#KNLr& z25o`h^S!&CXQ?6^Y}0ZC>_Xu`6z6M>3-LF<8}?}OuM)j5GV#n-0K6RHc%^oGX~i^DhiS z-AHhl5g`$gUb2}Sd*mV_WjxXhV-`%u5;4;LNihw6y#a5Et0CotCqdj=VV}}unoL6Y zZZ}@I@LFG@aR1IAHX44BN$K#d7{T9vPzcuYAW1jSAyjF>5Jq>BG_;e2TxJhl%ShEEH-SE`iR$I5sRx zIiFe*Vm|ymeIK}91V7kKC6|vO0t*8QbR&KF_Qi*IF`j+T=9r;?$xjhBvjRGj0&;(e zpOXqNCp)u2#?Ny7UM4Mexsu^$Bf?F=TrD6tPKzJDlVKw6!-XAfUp5U@O42R=X}Vl0 zw)8|nq0m8pabl!2fTdAHXuFnAxDk{9??d0lA}JwOokz&?yj}*`g2_JibKJdwp{LJF;105_kEEos;3=tl`>oX62*x*5L!w;?bY9usszh z#O;tY{6QRJ|3qBto95HB`dIsSk#h+Q&XvhDiCXfUpO~^3#D^V)w7TeFGD!NI^!9EpGJ>4Q%UBBmT zJl{IoKJ1lvKf=ebvZU%xANv*pxLOONk9cz;uM6mDZopoj(rC@6K^U?6sQ`+bN2Dt> zW+!M>@A2%BlTsG?V5bpUn!Towld+k6jxE`Q4Hf`QY`X&hU_#y=?&Cg6EYYKYkbH6& zcDii+64A{QmLti{K4M2sq`~Mzu~pS+X%|>bPwiyLuIb3+b;jmD5=8BW5z(;^BslrR z@q=2k_AviYAEzwQ(VD-31)7=@fJ>8+g7<$qD)^g(2YD=2plc(T_H~{dm2{J$f&8CU zIR+B|+AD$(@Ho|>@GkEIz$GW`?f>A?8QrnPzi^2VfJ?-h@xoHc5Q(?PMMazAi4C5z zo`zbxL>%|pBZk0~!88ehfmDOV>EQI)yhjVpy#Rj)^jq98;h$cWu}XmS68!Xc{&m?W z?p#ms>F-D@MQ;H7oqBOs?l^PMF?(#qcq%YPHu5FU!p9ZT(UktOagC(wqG0t0KAA8~ zxX_hJw2YJDnyg@lZb7WZ`~5;;S77P-mGfq|bVJRLu|%zA(T#H!3%(FOFEFgK&%-{_ zqufe~$n=Ws)uhm69QJkgl(O176K0nUEV7QMl37hHr1Ea5>!T%&<1s+qsk}kyl+dI| zh8pCoDL&P8LcyGVwN@&e7ryB^`OKoL8ZPmhX$hR?Y0ef&b}_k>X7Z58+tfx1oz1?E z1m(K4rEG1SSx)A}l0!Gs&Ct3le7qf&>s?AcsV1W0|Hs%_2F1B<+d6nckU(&EclSVW zcMtCFZUKV3y95pHE(yV1g1ZKH_xm+jd!KvOUAJoe?O$D8)uY}y$1}!ENS=c7i$p31 z<ZfKt6>aG!GNdh@Tm{4A5*MmA^$*(m`qXH1(!Fu`4l7M0DR+hUn)A7wvm0w~^V0H+G~{oRZV@sdC1yI6!sZ-#7$ z@!c*Rsk_hAyLgknC{DpgzD~=bPSH9arbkoDW2|*?Nz{+IvE%6Q!JYDoNQMtlV@Bz4 zqs-1A<_nvob1ZJJvk}~%ir@X>7Rcal$d=*r66Rs%nCR|IwSBv1_=pefR6QKdC4p1% znJX{%d_fL|T^_Q*u-4(5V))TV+_7CSr>krP^+Jf-r4BFd$q>Z6bAGPtXaqZxg*om* zg`+i`&}`ZOe7J47@PqcOZcXuP+eqfb^H@BN?J|yDOc|60IaPm=W?zRFp_+Q9D8BXl z+VN~Bq5_;VvX@54lRP@^fi^l$b_GLnsv4Z5>B9%O)x7-`dkMG-a1IRJ_p3h|A#C5- zBG`tGW54PpzkbDW{;WCt2-S-q>U1LTq%=(+9>^KLHvF-BJF6Xx@7J94KWfdtM2Y{7 z;PhK#i~dQb&F+>LFTe5)dR6bc7=D6wLl7HFf7Ma=&|c!cc2QbOGY|~+5i7i)`N|59 z@={ve=%%;$)q}<4F7*em)&28>rx}6ATf9GyptY1DZZ~^z+>vMC5flY_1Y!91Cr8hp zXJSU^pTanNFcn&+1HPn7DNWKbJqB)pzr449yb;A|45s&3 zzpt{5;@qN49_UbbTC~gXp!>02A-le<6y-xB5M?A}@mscgp(%+ra*U;*D3Zn`EV94` zFNg%=XDkoSUt+`aAF;s$#K!W!V$%&08=kTkv7z}(Y}{PrR^mZoBl|~eN?yc9uKkg9z5IO4Em8bpfiaY@ORZ9;$}zUgc15_Q~b ziSCC~f#ZcoMy^IlGso(3ec~>xe>)xHKsp=DgI0xDuTbw-m+jndAvG3wS*3DGGB+If zX^c*oO`g*}DDnLW+1i#+F%rd~os@Vr%FwcSRS$7@FQ0fj4uaNnarh|fP&16Z1ZdH- zWLcGB4ZC2*am}44uPKY5@r8Vh0a)~;6$;c}R!H?5d31GK*FZbIo>a|_X+~D-2Q8C} zUzW*QbBBH7BW_q&)E+7hy=A^X7hJL0x=E|<3JIUIvuaZ|wLkS$%WbA16a|b0w*9JR zu%QhJ6Q#{ZOX5v5JKb(8d)mTE!!H#+N=(o=G4pIxmy*`RsHernzJ#%m`?&PYH(sqi z{f4bev|!GT$sp?StS`-G%}XqBC6H~{I69N=oVy4fa=6nCi9)3FtOxlNmvC=2x0b3R zZ7{6CUNXo2ZttzZpz^SVv7R~&rMn* zrP2Y0`#bo-=j(^^H;?;;G36b&uf<_RzhkcY?l`U^Qh5DHaD+eO59Jba>E)^D<}ppL z_nvf&sP%P=Hf*b~l=68niZ&^x|JA&-*V6VQWYLd%=ayJds==2#{s4NBvXDKv&@7c7 zSK=g4E-1E${zCteR4#}`xaGBzEvB##JYS@o5Nk866GjDdSCe3d@HfF}JNJjZ)poqS zF7AmY;tUJ1pvIcRoeV|F8CwLfJ-~zWuBY3#w4?G8y8)BU(W=H(aEGL{ZdtDUBgV`hk;#30SR#c{+SwbSY zKAsUT%JYZ)ON?>5j{h(#rR4dr!EGh5t?&=Z!_4sSfMZ6+zYSoLQHyMV0}dcK;Y1;m zZ(n=9?11_f{qUT%+gO6q@2&+U*43_NnOkO4a=@Tl0%uUV*^5TCF9p?&c6y6*s;ByQB)le? zzf}r-B9;5AB6N9!N4xDMi;6Pd zp#^qh<+eMG2)s%D<~F)6beom_2N#ZrlC%#^8Xji(H%P+znS&JfmI;J_lNH=bPj~3j z(ww#Ns;c{eNgugvQh$8ic9*iyvDi016gmXKBE*bwyneGR^vLq$C@UOQQRBXsEd&xo3@J*y&*oQ(_!0 zGY%NRG!RlYw)9Gw`kB&G)2tBUqm%U@UTN9H0Bay4R=hh*BBi2!dDwFy91r;m$qx}8 z`QA;EBfp4gfeB2eH`ojM%Vho!`^B1T84*&F2)5E8iN0;nlDW64GSrCHSqbY$>rZ0G z(=adi-tlLPGuX1U;;(71iA1>`hHB#aJ|$w`OB^QE+?c!6`Tx|b9R3~aa^C!)YrlW{ zb&78k@uX&Vdp@=(oO}F!;FB_NIv`Ziw~+8!=rV;kK;**ps5{BKFaAxFtu+y(6|?pQ z6&`1`RWFGSof&rTZ?gQMS^>PTg!XF_Cou-DX7f|fv1q^f6Qb)+%G0nSWTxq)6G*93 zFg>W#mYu>l#=4PZKC0Ca8RD+m*H>Zh&*a^0XZOi>{pd6={2)L69`zCZTVDWwkix+z zCE?OfVLD@6-Y5OOKGF*2w*CtQ_6b_cP5TMPTXGI}dJgc7I{3Jp_YWNGPSDlw1qjCK&x|+{=#igQp$;CA| zlft9>jBsP|1CBkzngd6w<6u@NcA*Hx6QquEOWw@dbNtX5ghK@5)V5(+YiKU?i|a=r znq%&`c9-y^ZTJm&gW(R0b)^^{7`JzdM3?aVv!QMqPJ?&BW zboRcs6}{F~&^HHp&z>NUI=h?L)MR@3+|LKjoYS$+t+aYHC_rg-U@$>`cN6p*m^ZC%^>1r zt(QDy!@bIylLeO2Kuq-UaIS3&V&oa&we(X9Yh6-Ks-;5OyIdLZ?6(art6V-QVK-+B zvirPM}cM^C!F&A~Wvam5WM-d7~C+-9@eN2vZ5IaY|Z>*Mzvo)=q z0Ks~zTNa!VpJ#n54vqa>9$i{8v-@cP)u|)$>(H3ca}x_(RqxV$9$k}_&$NygWXMdj zk4|}_nW!J?F)-^i`+mNvOcbd=62;wrua;LBJFl-vYN*2DqOh$ETY13#jgy&otq6lR zBUhuwld2`-xO%Qb+MszVX1fX46QwP5a788k?yMS8#fhf=?EuX5Rr>OF$(qG<8Rgj; z3$XCGS^*nG>vAq0?Uw@DVFP!SJG5OR3L{l#3wl5;LEn!~)rfe0Xkvsc7})XP5sOiu zPMyv|U zhhEGr5y-l%)c}W&aZ4_Wh;^o9#a^m1l;JqmTC$inI6i;t+H!=BshnX`d7L`Qeq|;! zqh_w09BI|Y?WH)hd=k;DU6OUgyO26V;!!8*a9l)B)kH*>9%mS*m#1z`MHKAR(uPPZtS#%dyU=fN;8xKhDd5}JC1 z7J;JF3TT(LZGT&*|Cj>#NDBk*3&mSbcI6MrD>n8l;70(->EHMvQDa7u<+WO9a3Oy9 zYk>>0{vb&k+e7ydSb@;MTp!!74fce!%Z&_gny2eJ0-|eME0m-->-hX&0}y^MCe1%^ zWft6d<-^_*Y(aUkpRF~DM=k_}O)Rz>v?uFuK>%w*kI3h1))4(glHp4XMO3 ztQ_*k3`C6?X!)}*&IF0W^T^7f0P{tJngDNtI;Gvw>%F>qaoP}zfnV8(&!!_^bp6O+@3OKxlAD%C9L6>^qp47w;VrQkn8wlE%~ezBl>)<79o!-oo_$e zBals=bbda}Wz=JVCe|6j5bL=S^jNOUW~2f4O)^TOAJsfcm|FZ@acIJpDHGn39g}L; zo7!k%rdX>-Giu#{IrdeoOMKwm$i)*s?BbI`Cg9~y!`{o7uSjxIfV}+7`8V{WJ57;l zATQtJ$SBM|wcF90cz;emcaA&CUnnZ^VoB`+3MM=Bmh&$!KV6iHG9!yXW#J7xE@!|x z(R#Ui%ZFhgF`jh3q+kE4S&VXKps?)jt0Rf%o=#ExDyxv(N&=#M&G5#+hrNPgXh&epAUKoNFyrVn*veMLEUxQ@B1auNo_Uu zV|o+O(WG5b&rY$0R+*itviQ)e+h^q)#bw1X!aouv*0g8FO_uN>RDdmXiA zoy}H8qwD9*?W>8HHVd^aw;Q}u9W@^%l5h$|Kb5jsq?4U_LC-5Bfm1h<3(bg-3LRRh zr6yGItD9_E{>BM4xvg=Ox|C^+=j|vP4)Xkf@+r#f8=I|VOnOq#P0wMh!ufDy{(7f3 z@fH=EeddsrtGn2~>+}-$170gTYl9Wl-KpueNGYUw3Y)#i730E1!JI(RWm0>{Ii!Xw zJ(#VEAkRM3DWt+w^4h*wTuN#ox1*lD)X65=SJ+W+Kcl&_zRT?cg&;b&F2Z+Lcp+n} zMyAlQ3R`x+v|A;$6BA>q65HaGf>=lW21R6f15qh7%ewvf>s`th@J>Zvi z2K*4ry1VArZ0_O4A(h@)!92G`aQL%^&->i~RwKSXg`F>#I z9u9OJkZt*N@Nx`EF8b>rNKO5!SjTgW@fhoEc`%M>?Bm@*I*I|@5q=kY#6oF_!9@s_ zM$zD_FCJr5*VzsBQLmm5j(kt7n}Qm?^#@JKxTkw`kzcwhL|IIB2IUh8g9ZJ93jyDUXUyN(_^?F-W2K7+GKi;FE2A*z zHo0|;9>BL??7C2XheN1h z!nDWOeZG2QZG^*f`q3RR+~BGrF%Bd8)8a4N zp`#Q2#>2pK^KE#??1!ko0HJ<1oydmOE`5flwtN4C!T|f%^NNZHo)h@$^YOnL=|^ob zU=X!Q)=9Q*s$trX|D!2(7qjBH9+W@UZN%2M6=Yp01x7}Lr)jc68uoegpn#ll33c+QC zl7uZ5aq;m$z&G`6w=Mk3!aEI#nd>Q|vL4+j{;q2ky|HcgKh_zN*blTy9Qr|s0dF{k zi6<7{#N&{LaM{)^z`sAMhM*4AE(BR;KvWdi8l`_d^t&9nN46BQ4x5G1R4s?H5P+vN zl^RRE%s0Ly*fAE&td#{;)Ifg1C}`Z#bvec|8mL$(AfbrCY$LH)R%peIUEQ)Pu1+-K z`O7-9yGIClXLF>J4V}L+(e2GuE{eS78GWA>g%$S;#a}A!s ztbBuFm-YOEHwef&A^8I??-epRd$78V%z||msVG^$AG9lZa6~E;>$7k7wZcm#h3P^J zHUkODlG@E$X~71Y5}R%@f<#KbRl8mFG;ZFB-1ASd+|>R;)apeucL>}q^74L8Kuo)D|S2v152y&oF#HG!ys+1XJX z5<;*x`IFxm%%>zEh$tqncp*D-sy*V{V}Wf9*ky}R-cylrc%Hj)i?@%3P)4SX*$$XMSbVt9;W`@shDH3HdOYm4FyB5>y;5Ci& z80%alUc+4^&XXPFO}|Y2G<%SD?GSa7hbOyd7v|m=U7OJcxi>(&zNWwSlojUMh%xub z5Y|AqM1;2t7-hU6y&fS!|Al}8TmcAZXxfD}9FY<6*3-KCC<_1flM&pY(`;1o_G!^> z^MC|T!+YTe3>7~*Z9UQ*`wbp6MYCbb0&|Ogwa^GrOv%eJmO~c?G%^>%buNPrW$zz4 z*#{35q*FUs=oETO!)nk{GTfh`mKr-geffCbWbzunLm?L7HDY!AoR1Nj)L>1gJiKo* zR8J3e-nAb}v`+EO-7g=^<;;JIO#sKI{vGkx^W(GC zkGY=%a4^JXn_bwJn=3A;h^+UqBB>qVZ(nl*)|mQr$4uK^+Dk~?Z{tI5q|WWGOZ$`h zqR(7OmJh@W`&{>d*@;{>e)8#JCXDe(7f!f6o$=kEawg2ODVzJ*o6IBj`2L zFSkz0bEVv8=%|9y7J;)~O@eI!q|~1>K+!ERrSym&R!ANu)LW@F(?tON9BVOrr%~e` zzhf*6if&QuMFP?jkQ-vF4$#j-f9PlCXcCKgh1P?(t}xwFKzcY-*#Xy{kg*ftRr9hw zs}_3wlk|Dsn=(opi%ValAytAq_n081#`9q z!Cgonth{hxn~^Lxn{+eok=8vOytBfK4YzVp^RLqKJS?}z5wyw~L=Al?)+~qUDdsEr zyXRdRoV~Bw*i6yeh{yHz0q6bbb{0FWj3PfmTyd$GdfkzaZclE7jaujsuH5M&RG1rJ zk|Pwlc!DRon38BW_Po?O)h)m|r zrbqVsZC-qYuOH~KcG39kfXModKOqXbIJtK&06^zyVsz(&BI{ze6k=e4^LOIotP`lw z;1vGe7W(U*82MSwAJb&Zoy+gFjj`S$BBT$0`p?fcf#bm5IkN9gNB=E7ztc9pqP&9DLt^XD z7D0LI_rgmdii;-eD7ASI*6o<9y>=3wKjX=znxGV;K>@CCi6$ro1}-bc2VDXv10cZO zwIb0BrO>AqDe3MPALaKy@hzylci`V!t=ne6JjvtjQDfdU$ONB=>&Osk-`gYa5(-Uh z(zVAMx*_^d_AlNx4o@8O97&Cfbq6cJ#_orKh&tN!CMbQ8F z6#AE}H2eRPB*o_ZQ)*pF6#`6HK#{03`mCn>3YtgoA*j__@!4CP*O-N#yWAfN9HU>? zm?Vbi1K)+wf1W~-J`r4A+YR4u@0uHZxV|C!_`VEST&*WNGRq7_owqAdJzsJeF>dX9 zUaf%5-)Ev@bxIOoY#61|k18GobT2-A@BC28GaL^Zu%Aw*2xALNF4> zQFUuS2s!Spc5en~=}A-?)RCoPhwlRdRqP~H4&~%LsD*`0Ijj}3-ShbX&uEVI>yv0= zjj-sih6{h8$mz|cs=l`f{Qnm%&6^M{XK5#dA9p z2b#{d1%T>|SmH}XCQ?^Glw7t1CrceLZVLdEh}5ZS6mZcXOPqx~Z7_e|sU5q}3B(ih zwh;rk^cfEgJ;6Dnn8e25YamaW$&~CmkaY)CXB?MWUhqf+4X`f2#jhy^(>hyG{8(g2NEvpWe-ZaXn?ndhHq21gYbr?{#Vej93)|48&S z7Cb5ncM?+>P244_x4+Gsw5;n@09$KKxc6xV!f5gdWJ*{Ez2E{KY;BQ2^)_mE)Bs(C_vK#CgOjtd{L zF2p8HSRSGr^(0k5r1y23K(*<1ej#+M)Nkv_ku4|U{G7afqYaXJy}`=W>WLon z@nueOJ4<{5OSF0acpkC-X90;%uRY1+e57i>TGV#QPkedGKzffZPyQsB1EjjNa>?j~ zrIGL#H?^(7p@E$>km^Eje1o6JHJ=cPSxIn!Oto92c ztnuY;glR~xWG%_)Qvsr~ySVrXo?q>kKFjHu1CL*DpnXA9v@r^e3LEMMgT#(*`Xijcl=5g6&*6E zq%-y*9D^?-aUYSzMv1Vj>7_DY-DfF7KCFEEh3nqm{px-;#c^FLd?sCvCK<`ku%!sf+z+0j$&#o| zlCO7=t4U5|tInilOKlr;h~61b<--YUU;V7a_+6;n+%q{p?G}>L-6?nx8MTq zH23kK9Y<2EW9A{28wXW?|7pF2e>!pQVa1LAFQ~PQZ zL`*KC~zZdzzuWJUB~MzRLUeLz;N*07Z38t z_g$+ak2|;sAo1=dzr)N=&@O|;v$$RRGa`a!FohjNU}E-)hf0?Tbt zSWdT$7w5bp(pZ1OiWWKJh401=#@D zX(g`BuxZ}Ug$ZNyP#6inQeE_B^#gS^z#Otjkn!tVqiDw8j=KJ?!JlcUw^WOsb^9(FoiLc4hTq-2r zXZhSg-yGEP{G%ZKE1sH@^KZ|fKY8};mppq63TgJAJbQLK6ldvSW71}{qV|V8ZyqcU zy;U;&q@>ajq?ra+#=GNu+iMq&h-}&>@{o%;NDLclorSn|clDIKD zSB|A~@3jvX`t^u>EP0=aJ%T;Hjqn&JlJ5@A08^iTHHr)oRz1G+bLg4pR~{hMkpMF% zE*j(P#D1{Pfm4qSn}=)``_b(|VELYkH)#^7g^aLe-7cCdQUR>Ejj<#n$$eeW$-P~) z4(;|+SzCSeeTSAo`=tEUZE@~?%ay+qKK&u$eY1|;D{D}J*ti6ISRha!hBa~frnoL^ zY#it&r6s~kt?M1ch_9*4#7E18VsHf_?N9S5^gUzoWZjS zGWJ4o6qp*SkkVhyLq+_n4uDigPM5VLR;inKzx_}sdPlqw?|`kjbv>UPf!zZ9E4Vt+ zUO44h)mx6MXubsp`-vQ;a7Egya}Qo=4-X*Gp57v=F~oN4XVk+8?q&WOlxUaVDMOAG z#-DLF;<^S3#BMqAg^rE5R2eqSt?)~_c>~tRClDV` z5#}d2Tz4K@ICX8PC~A(aTdA<77+g|1!blCmH*kd7o=YlTuzNQ>Myev@eP{D)D zXKc4{Vr%j!sERXwq~3M~%p=TE%fMW`WHd|-vKnKnJYo7_W_bRy zW5hwt?~03T&n2)#8V5GFRCVZgDl{cqLGYWguy(_#$yQ$~gU9cf2Y*X~zwe@bH#<{& zHllk3_nQ<$Dp;QG9o}&~pHo;TuhO)cJM z`ByS`M3b)4Rur!oH&GF*+JE zUMQh$&}_GQ3U({&Ig=lRP&n;ot!^uo*WeWSpk3jjNG%3Eix8 zdNj=5_s}K$k1FwR(dNJTQU7_iTtFE26%&O)Li0h2{q=0IYT^CEHY?dxQAk!Vn94%< zV^|5GB>}k$PZh)!Xm+(*2MB-91KS%a+3$mwM$XSh><aMQ6;xt~ZBZDWlpA3d&vUdy8YB*Yk%=IE30iJz)J z_>=zH=-3bCC?{%K6gavEjZ0ax)2P+dI4#P(-k|swN!_`Ej4P##?De;oron9$whxWs zQb|l_e5!^lZVn&Ru1_btXOkXZsxKme>I)U1`T~f5e{mdRVoOmKH@vCu zv4ncp@*J1_usTd98OTt7X&OXXD($N|r3?*iCNeQiL1K9`%8UhH&?@UG5sJJ}Hlr&o zDN!J((8?33KAjT|q`wX!Fp*o92=rAoa|%j+vJLjO2i1-z#^s`Db+SzB|618ITUlZIkL{3j9=RHEM1r z`E|@`fXAo!v^H1jJN~wkiP-Rh8*I^|f&wM${ZhMqE zF3WQ96B003ghTl~ml#FE-az*k8GS|^t4{uQo?AD)y0NsQw>jp|RHLTFZ+_{D1f}Z4 z7*Jn?!>236(R7f}-ZhMEn4|Jx4#rh^LK^tK+x)Tm1ZO7L!130W>0lSefc9OR_!)KX zOAiKZbk5pNR@YWrmoNg<#!nKUZV+|dFYnMR-(X@t=q$0de0mjk5z7DMAsMeztFM`Q zF@VOidGLtpIQF{|=Ss?VlqGjvbT5~aq@6s9U!}DgE1!&EgL}9#83OcwDty5DI)rLa z^8=ofiP7OGGrKioEgSXyqJpHF0h?oo<%#?dG=9HjpIax2%KpXU5E);{aNO)75nJAO z3o=nD+$Ld*KW=&1SB&llhSLUwr5x5}t`1UOvtbXjhz9WZJUMiKHphTz*N+g+r%Ad2 zXZ~)|Jy>;B9A3_2dm5*Hr|*}6t?zA%6C4e%t$>=vDBfrV&DWx>#{Mjk>v>VA6u>}bZuunLF@?i zzxzkg`In3{+yC=6dCv&fevabi8`w2c@x`4VoWweK`CU+k^B@#Lx~ta#$&n!!Gwl=| zHDU3RJh>h6LYB{&lPah$wdM!(j3LAIa3B-&Mhe;H7j%D+d9BQ^#&t4>V_;$Yo?6ttk%PeJab) zr1TczWX#HvznXIoOlQCL2McVh#Sa89gdejES;S+g?s=gbBiX8CJ}|ekPlZ({zZS`)(|!*~AgZaMX>4DAl5p3YL5s zb99ZhWzna!y`p567`Nnw0lIcb5K>OhIE+(-Fr$Wtr(s}8j9Ub{%In3XRRf43g4%=n zN;fxMVJkwcONGbjFIkQf9=51BouX=!fl(=P{1Pd;hz>H*ZgkndRzeCGl_scL@Hlrl zqYNa(=r@}D^h&1(l4%oBV6_Tq&J4l|iwv}TZ-VsVYnG$CH{7tQ5S3Io!w{XnB_JVa z%2-TmuA4o*yT+KYvzfp?u;#`<-OaS-$T%NLw%?g0t2esn#&kQkJQrL+kr35v+-3k% zUTUq+Ga#zhic=%VPa70ftHanr?VesdbRb_Z009aX9U|c z-Q^c3kB%L~rO9Ol=ddfZ5Q~!}$Tt=$UrHfH#;NT-d698?%b0yW;g2eDa^GfgkvT_B zhyIvNO?uT3E~RC_`mQE&`O%;iI(8SVG;EGIH%7ej_w^*1PL4mU&1 zm}g8Qas&0X9(qk9Bwql+g-KS8jR?|DXBpEx3Dd5E{PM6)jL}7JYkRmSb*J0k1O|N{ zu*j2=J**j4O#Hfo;`ODU)Ow?+RsZMq8r#UHyAtWR@&yDtYwknXw+}rj7vK*C8bdSA zUM&GDYPfJTXKC{v(Qo0+W2J6BDz=U#7aNAGK&~%5Gk#BbP&7BEcV*%zk`9(HBnkfl z@zX^SV;AGp zb4CmetH%_ah_kNH2}^TYsn>?0rk6aRH73fCcg%YaDa+pZ`xV`fg}Ha9=s+o7-hE{h^6S75T@XvkrENsU#ChU*68U*91#D$< zU&E|lpy#k9V9Q?Ojs$i1n}o6`a5f*L92H9N=5IEbVnNvjNQye`7QHHIBdp1A;5;DU z=H1dO3gA<+mjFBLixX(k(L zpOTfSUXAAV3SbosT@r|~ONR>WRgMT@D3!kH__?p+w=So~Z}iPal*YVACpe8JlX)h- zUy0n;%3^~EG}L!2_LYO_mNP$p3=BGem}Zw{Rg?D$nt97}_0`*@P^_ETjQ%Y9l7o9G zxtb`q-@IhvR6JO^;{O%Yz0=6Mj)YzJbRwbTAE&7GiF=?l}$ zt_?8FB?`dfrXa-n0MMF8mNSV*`=rGJQH?Snz16#O2iFJCHiICo34hTVMry_t<4wcg zo>-C}jWH_{FnY|(T5Gx$K7LJ$ClZ9M9RiDSD7zCv@6L5=r6IoZou@K6?Z`AY`7-D` zm}(U7nL5+GgxP@WGJlD`Z0NGF`mOK6k$n7YC)s|_)!hz0syQQue6;O+0x^JTTxEn) zN+oC$y{$X*ETG9w+TQn@*>#T+YDf{a1#H(%yUhAvf_rG`; zhZ}ydyaUIjtomSNxQkcpo9uLP#NEjn-8yo?o#)a>yCldK9T&+Wlr{D{V+=ZChD|C| zCeb+?o(u0-^F6bdvY}!@nVHuNY$aDym?6WvGuc}Kv7VoJv6L;`&d5;Zgh>O}bup6T z3a^B!*5UiQP2B4j`k>gO!-PKw({+DQ-n4(KwOg!e5C_H#Mgqrddk!1EZh`@Y7a+eH zgVC*Ck-P9f8?ziGKk+_?hj4&5c>NndF;|*WU%v{K%q|OC!Q{82i~)6~!9nYe#^LHB~rnS1(i|X`$ih6m>3DX$kSJ50; z;|$u+uRwMrWBW1Q{I;QI+?0ldC@iy~|6F53pZ2=v$8ipYGI2rTT zjC=8rAxdKXoo00F8;H-~QiNR-|0p;A4p3(JyCDw9jVS2k%^i$V5s^AJ!;au*5`JqD z$G7&$i6ZR)pnP^uXd$m!QO#rj84OZZQ0r~j=7xf-{dFC4#&4g3^B+FV++J(r#}A&` zo=^4%-cRt{xyqB{j=gV3@eBwWQ8UDkW2?MAWde$(#Ml4*;02Pdum zT*!XDzk$KWGYRrnoSy0QB|S`W*{6vR#Oo~jpjKH;9NrR)@31~fcnq9^h?y~hk!*6P z*a{$a7}yJ{An&=w6d&1S-gA@u(Asy)>V{F>y85|Y zw_T_-2Nf0#Dk#4Yd7=oKv(Eh6PB0q23Q~~%p&OomURd=@Z~I1(Y}46()%|?YYKP0S zL;;5aM&){zI$QJ8@ui-iLwk*~~49Uf1mn9x?G_YgvG$eUyS=#@}3>t>kQ zr7+}_R`kTCyUb^?^)X31lg5Oy?=j>r*k0TxDu&>*i%j4iL7kzMGaEsYuxSP@v&RV5 z4#GHPxLnv}ozNx84w>*YH8w;E1-C-rZ&Z=ElV+mvllaZqLJA7ECCwN2X->Ffa6Q?G zb-gCY$l^&N;ZuvK+Av$L zfSarpK1 zc0&lH*Uw@IquQ|Qc_uy)(p6Pg!=je9noS*6Q8S*nWti#9$nDDmd( z`CrXFSbC5ps-*3??n#=(XV|Ihzt>9>IW;DDAQ~tkY~)NU#rMY?M!VQe zA!DR6D-6U!w4!Tp-fpjCJ4DY=m{i>C)0D5hGm$e{w!{^!$5GaY*y7&i4lNQYzk6Sq4-xv7;gxEwq?{+^3!2JCBkBam!kza?%AcJ{rD(D3i^->*XqWtO!!|AS1_WSwe_1@Fbx8;XFVBp?O zR|$+;4k*38g0&%PKmnxJmoPW*7S4Zs>0x-|uKn8z=_lNd+*|yspD@Y(LD0^9gk zekTF6-WYGccYz5;+;aU@uB>-hl;>D3kjDm3%asGf*FoEz)}fa(60<`uXC&&*_T_=< zFyM?tjZ&x!zy?MQ+NO#oGgt(kIp0&pN?((P;^i9D<^f%tT5zUu;c2>Kd` zH@;C?0(j$~E;tyW1NX2g5O3VsltpM&H?>J3Z0eWhUbSoU$Z}eLmq6#1iDy?cUkZln z_g8mV2yjS(?d6a}Pbm%56A!To^R^vT2-~1x*=56MjWz$81>fzwazs*(6<*6`j2$mq z)Qk}cpRH#8q-UkUE}RcuYH7OcdA{BCy`4?V{T2F@#eGVgIc+WFUJu!E;B5INzj%fe zebL%_*p6eE_ClhEByMg*R;k$?!s0->?4g>Z)bXuJZ(K!e) zM+Cp~383N4_Duj#knS^vBh#`AnK3)%vn-sVf&)@-w#g#?ul-ewzPg$q1A=^PTew>9 z!RjQng1!e8HE8>)!49npPxwTEL#xFeCPa^5u(HT-N{=qN#pQI#?n})|IJ4>_lWrzZ zkMgne@4+gmR>2hR_$Fv09M$>^Tq>t6tY|x=TBkJ_2qroaww2L`GRc|GaF~O3;w}W| z3Iu|I|FN82F>T8E&)pwx_a1}y*Ix7s*N=S}>#S_9D#$0%Cgr5=1aUdo$M`uqb>VFnG>~ZrRV(Y8X+_vku6NQugPT8%+x(OMu>4Cl zndAREfaUa4(Fy+mUPPcnHcp@y(O>$b)h#@{oM+b)Hyg}g?#Qlw-$Nd8R|-@Y0uvZW zf4XdrZ|*Fdo-YCYiTtZQ1EfFa;<%$et*m6>J+A9-!vzjjV8~bk#ewCIVH$m}=1G?! z!-JdW=+9ptf$_`WJ;KoLsFW2fdn8a?*a?{8u&Lj0bgsIttK>#0w`fx(IzFu}%4c{0 zM{I1wfFm|Ct`ssOZbIe-0EttVFdQ{YQji}$WCCgyI}}A}Z|p`i0PsNFQbrxoQsFRj z8gra!pd5AkKjo-IRwAHQWg~=YI@OC#$Ds1ZJHEy0$LA% zcGTVwP&;Z17PNe3mV+s`N!xilhh(3X0C2?y-~)kHpBGo0Z?ZI#q**;CYMxyGzv|O^ zAjXz6_`(MYGrPX14>w6jQg0Ec+P&ycwL7Ri;}SSy(_DGj{JH zJF|6=Ee<-1rT%BvgJ~+M1zXzn(p*SnX41J_>e)EdH#g*#E|D|Lq;Bzudsd1qcatjn z)meGt(!h=G2@Np~2WGg_X)btpQG}8;?NE)2Fdatoa_b>wyE~+AYnZks-pZ7V5=?-;jV70+fbS=g=tY?;x25`SVV84d?xC%jZWg?>493W3X zhTC@EF9#bv6Y^adR5GT?0foFP_Jp9M4XZTfYSme~Ge3cv?I#2MIMUU1!Nmbpkh0rj zrQNdWHKf-RsKda}UU=bk^0vSc>bq16`-9p>L@!wuo2_)ry+&if&QOr+^f`QEAVyA? zmKwwcSt(dx9J7+*l(kghp6imHMvRN?v>EK%cW0h`{vy~GS#R9&m6u1(AuZuog9(D!-&j2`xC$?5nGLU+&ylT zJ*WSbs16R0D}G(~ZZ`;=)4LVco~J>Ldv3Hy!HbF$JqU-EKbs$QGo+WwgYGm(#`0%4HxhGw2F$b`@*)n6LcyI zN2dPb#}rkUv)^&^Sx=9qQXCi?A@mH;G4$rg5bv=%Nif3gs)v&{XgQd%;hqnl_14VD zaQv>S-oX66ATMAG_;X5Y1P~#tB0z-tt_8nlDhz0{B=|M`EXw7&RQfEu5-l{^lzyTV zo_Q8LDU}skFG-t*TO}^#fSEFihAF)~5lP``7lDrup!4v#>dtew>Njn1`!{bj4JyKn zOag_4H^bca5_!r|f>T#4Q2=e1aIVLy5i5Z%X)u!T;d(D<0@wm&#Zq>dkpQQ(-sY+Q zHrh(N%i&9!yab)nVpOXOi}~*ebH{D-T^#9bd9wh*=;&NsMio$>8cw=doxMEUY(EUT&ga(yS*Dg{t`xPtgT#Ts@@CGU%(GE2}K`u2D2QpXd^ic+hbrc&-sp|Lq&VL=#!vCeL zw-8YXSX@&ei|Z?}aqf2ZE-8$8Ii{8GG4^syO9VKkMGG9$TEE`p1=`*7GT^b>m~JGa z(l64t8A&zh+uJv*<_tkQH{#V;6F@Mrs{eCnptG zXzU9$Q+&j-`+w#9w*T2zRAeu`?w2jtcoOemmMgA2xR3BFv^Aqf+e0$8V$os#0<~g` zQ>m~UwGG%jm)C`&I(3*7NuWB1mZLuA^S={2B0Cu=tzJPP=F~Cq30V6A+%QsGhE!k?SaX`eTXZpAnCNSJIvK#@DG_L_3}5IB`jme&i}n z*?GlrHrWG*2-U|Bu&?TNs7|hQ31T;V-~7WaVD~6mR4+<^FqGf6e~y%~2WFjNp+0!-%DL%E>ZG3Vaz_^%%Deh9bIywYzPIPdd&MdOF} z*)WxUo$`KY@Ze_jh+ZWVZJ-ROmETHKZ6=l!RFAknv;04dy=7FFY1_W7($Xp2DUEbW zmo(DdjdX*QbR*r}(w)-XNOyNP_+CGp`+lDPJoBzK9~{?WzAzu=Sm$*d`@U_6KwTac zh!Y}fZ@1rgM5Rd%D13e2QT$jD!+9-_5z@jNlq$*dT*1zxO#-U9&!nk?xbpgH`+WzW z0OWJ(1G0gpin{fUVaw{*Og+#4T;+GtB*b>O0%vLk1w|cUfE2TODGwcxV$P~;(+rEt z8SkHrv;%Bh_ht5QtOW$oRB0dqAh1bR-7(!PzAxeZKIP!yh?PB#!{XO|6Q^4nam79h z5&(+g07cOdXBGSx0ifgPOHuT##yS<}rD|WNL72rQb170h*{mWc#k>OttgcCRf~$}l zX!K4j@ESHtD$K;R^eanM2+S1`eXN#2M8r)%Nij0U)M5s|iUZu`al$%l)clayfvp(%s_8>Xh}#XyJ?h!5`VQDL|MD>UQHlHJ zpU;i*ddrPuM+;VUdX$-wEo2lS!&%809=7F+d`<=5?O^*&e%dQhbBvuSn!^r7DUeA) zD6t~oEE)RH#LE?k3R!M0c$Nk$(_r^`hm%XJ+g^yb7@AZWrc@wO&urPEWK?~A zQ@K*vM{#u4{3B3u;TMfvykA#k&F+_~f#cB45wT}j5xtfjFrrIiA)Lk@aSJg{_WN#? zpfCU~k1@`r5m0u9lAMJwz7*829t7hv*)tkl2Cqp-E;g~N%$a8|$$zfBNd~`+;)9%- zXCGr}HyeGV=ZPA>L=CK4UNAjN0}gL`wU1d896k=}quNy2;kdi%Xb&5f5Kr;j9I zn`)i4G3S}I{jtyv_Bhdq#Ro3i{XUi?!3kN)M?K~My}ty3VcYBsp^}Z0DRmRLP;hAZ zFNb>XZFT|6*KGHOzbLc^?bNFJZt}7DlI+D0CT)JEd$e^K;>ODb-tuaEqthL#x;!-_ z*xx79F63P4Qx3-9_!a`ic8cDsNom;@z^}1I-ItqUw8Lka_8Zlrt|dS>OP@nM{)duQ z`=>>p#Mv7?^6T$I2G<*aEbw69fCSXEunF3$%ghayX?p_ibgutL4hPG>i#szi{cWi< zShm0pw=}AJ3soYKQvmg4t@~B#>qhD%O~w%R{?uXn@##mPWdRZ%8==6-67Is|N|FlW z^V%O<-n9I+=;mwWa^I-qySunqzk4WqIE8W)DK5y~b3AFDAH?ala(cYatHG(sYbO|+ zPdoq6hDcMu5|Xh&t0jWGM(b?Mg84k}p|^4Nlbv0-6&q?MheYzABuw8kpmPj0Qp`_$ z;Jg?2mcwYTA*b0zlT>9852sL{8Y1DzLGH1+dgGb{RAZMqXLJLQ^gV0E-Oi>Ydx;j= z^Xffo!lOU-IuouSpe`W*Bt3emY&j(eNv}8}gH(Lw7aX3l-uZrAwwXt3n=sYz;trH| zCYMh)+uA65SpKu-&SfuV(77qCqNA*J(YnijnD7|Mm9%ug${tHByGcv0`I#|%H73|a zD2@Q;43sP?UzqeA;^LDJ;A*ZS%M)lWgZT46;2Bl~fl~?_R651L+&sPH;a>okjH86Y ziCiGA?uh$t-hsV)zl$bPFx*J5$^+fFM|d8rw@MN$R5aGyX`;q`BF5S*<%+9-7Tb(3 z7R_Q!wd^Q&N}N(uVuZCKnP7-ODt0+WqBp7T{%O+R;TORImb|jLl(dpi&qCq5gS(n^ z@+CE(`L(l$tW-Q~BD=i63g%EK?v1=if;=S`#IL%+YLtsJ`awPm{kDt5X<$@MSe_WA z$~mdgVTh^Fe!$?9CYh^IVSp@&T3pa=pCzjP)p%&b`I1d!CHjzj>!r+kQm_Y@^0I$j z(<9wAX|Dt4e8qgjyAR%4BQe-1?lt#^@l(&Omix?6O2<@X_#=;5ETlguyE!m&v8JF0 zRNRyXc9Oz$<%wyyP`nzE2NsvFLyeQ297|1=x!;s(1eS^tPpKznk4RpfgBLlS6~z~Z zfS+up>KxT_+eLVH2^<;U+LL#^aL}g=`td#5>_TCck7k_3@N45Kngr^$QAwpnY zkt%fao@_0|C(+#np*69-%8+B= zYaS)Jy?tcwv-L!Tte!uUVJ2M^{!~kAS6Ss_ikthrJM;uGU@++NL!bbc^^Dtz2)RL2zj%@{X|9?xw66WZ)HIH4 zT*dQv4Jb`Hdd2a-glnaAF80Pib5amv8i>cq2^+v@8RC3uv-U#Xy8FZdK3G8wHP;UX zN~(>vXwH|Jot@uR z9mvjXj<~}}X)MPB3LCLI17V}bdKT?aDdem>$q!_a-G19unUN*C+#`>so-FBR`{xOo z%j$5;7J9KxqYRk(JeGv|6NLFNSw5vYQJ)T8Iq*P8nR@bgD=n+W;To%EJtg=vNv&RG z#7`msVlOFpNSab~=F=R=_59j4Isk(}VY5WCDWK&rDgd0O zi28_oRXh|jYKr6&g%}TaEoss(F=*UBG3fRlF@5m+DWo?)>Wz(n7<3F7!3+?Cz81Su zT2l!5Dd}-TGl3?TK0P5{+Voz*qfr0wLF3{n*N>td3BRb7?SxK2f0hy!i3(jWWPo%(JVbmS_{|lxbBs@($U&u8t$&mdKFuo#d7H|nX{K$tuhRY zVHubz#cTRT5_KTk5W1VGe=#58Kth#jtouEX*H=ZWgm*TLYOH=9s=P@__^J{TT0DKN zLyl;4Zq0xS%}@7@eHqDUq z9f)@ZlkO@(D?LjxDc}Ut`m}0+pR+1pID}kVGNJ3+Xis}i6 zLnNj=3(fD@Xlhr?^*tQ+Fnhl~-b0brby_K8rGt0#+rR`b#$4~dW`v5FjRC>Ys=vsD zhCACsWDn${$ocDKa_MaT_oO_E@3s1_Q=)0)b8aG$C?(p${f3@HKHR*nKhKwarkgSq zq%YmR%~+pw@&YrH$gBLvaq}B&RfF!!BE_} zw;-zjQwNUxo?ZVjaYk##?FFHT6x7#FBV;?;wSD~?mpA5|TjAKJhjIWif6M zvL%}~!2l3JQHH=RXGgXnKcyKUC`Kx>J80ym4f2D6jiBP`XP|gmQggavb~GVzMiSh^ z{Y!4sVw&ha&QmBZ#QfZ<;2ak!kal}8Q2dWSc|t*Y?-G3GJ%yP4Z7h&BI!>y|cR?6X zZB6^D4KG>h&RIYpk-wXDpH2-FPXU7Bmf%FrMdd~MeNpSwL^sIOgH$r#EhbY4V*9k& zVWCiP9BFRq*p+izUc5<2dlS#h8^KRK`iayxQS5nEnaI-3_%7puvV+d9(gPNZKxf*5zNC$SVRJA=2L(STUd3Beg3r;oMHq^0mqmgtS~w<=Y2sQh%Z@Ytj^mul zE;eh9gaW9;3jt{(e+H#Q1FW>a(ne39I((LXBORI<_tgg>$6Rtz+9A}Z*$~^-%SlS= zt3lAV+q7oB#D-I3#rPx01s3imV$bxR$ke*Crv$uyNbEYUvlqkP&O-v-Ca8SW!gOyY z^Q=0wuPGL7Qa5r|i4$Rcx>9jg+AKAtTbgTXA2FXNp6-B-;{$!DCDm=%?At4cS~jYY znor`|j!QUty;Q4IT{Z0U2Vu=bH|+{5i-t_4i^__^oOy;3UwrO}{T6e`&mi+l>)vG^ zuYNC-r%O{tqQjjc!knrldc>5farw?4y9*0VfLFcUk^?|Cy} zeKR~fDcto=v3U!p>h8vJ-m&K%E{7=u$Gv$sut5DKxDK1hasy4Jn@W-Kbv}D8e)G3i zMIqK5R61w=?1np0gRH|y;uUZj6`}8MHd1d%4_=+70rIA)@ql5gCW7=FC~lYb7~tlk z0Qh=@#~rP_QPXd6Bp-*{gJk}M9cO62_<(4MU@42R(qn(+jAqckfO@AFCw7lCYeP4g zF&Hu{Wrgb}E}TsC_d_b)&3Tv_f>dHhU3^f@h!RxOruEN=uN>Ri2{Is0FfW4uBMe<$pnCDPs98(FXrGnw# z*>Xe3lpr*DU3*p9s9^?Vcv$p!E8mltCs$(k+9C!lt#*WnBvk{;@AeIq>YXIpcT&?x z0THP)6~6$h1|$k!yyH(n7{^wT5+jd4^!hHNs5sVhPIU`rw*z)?oxq)$PL&y01Wf8} zbAXmu2+$H$ME7+Yd{r#DnC%VX6GlMhu#I!LbFH#NL}M8cy?$Hcu3i~nx*})YQzZiC zFu(mKTO!k1muPnduR?mV|3t0f8P8{dZb#KJ{KtgN$Vr4Oz^cK4F$h24{x*8z+4K!< zM3+Jjs!RjW?VxegG0g5Y_4lI*IC>9P>GBNJQXvjfZ^&l-G%yMgYbEGFXdpCZlxjVX zf_zsbK&{McCKFUwfXyK|2$#Kg${Z82u;qY@3L`Oo*o-^V3{>GG0W{D+rQ^V@VrPj5 zKpS%eBX<0&3cpctLL>!L;VX$b$EE&M;Y%&=s6X58&_-@lismL?i4DxrH)qjV#O#CaQ9FYLxVq!(k0)1k|n zjx1}t4o{NBZ$nyM^}65KBrS+#oOQ-`@C-nv*F-DN(Ctf4#OqOul4?pkBL5CSH&!Fn zGTY3ge_m`D;U2y1@BM6|%tFed!l|Lj(n;W5kuFiWaQo?3A<+!hYeGIwGv5`*FsUpN z!RYKoV-w9SV{WkQm@B(cBvx)}GIB!W2=LYNEh$1gBqernc3_3%8&3+sPIFnW>f#h< zYfSYUO41wYmI(P_M+8-Kg9=Gp^kf-R!F!YCELoV~3%cgU`;X$inC&CJ2>Pot&f5&MbM-Nm30maGl-s-r_-nfA*h929)C4&APgodtn|g3HEnt!Xv{ zoRaLQhtIxw1556aj3Bx(T+ou+^#dFt+eM0!bf%F?$eZ`q(C->Tb}EBlv=0_wHP-2- zki5Q)es=2?t-LhijV_Iq!MkPReUozsp`RSFI>Uz1-pv*_Opis@_0CIQTm;IMb)!6~ zs{W>+9RIFhxY=XG)yjw{GVGZPgXv*sj2rUwQ*t!6KqzN!56&j#BCteJNw_^fekV@T zF!WEei1lAav047MG?I+i_=_+t^c|4A6P{**9LvIX)UFB5u6y{`Q*GMv5h~$F2IN&u zOSC?T?fOAz{Sk;>BLy-8?>qUFAXc@r5eV*%m7gD3nx3l__?~_KqLghZh9Ll~lra)9qIwE4C6BzpsZeQ2Y7yvASw zEe1G#wr=$i-Iv}0mgPkV1+uO+eF}%eTtKCv^)oS*O)03!o42R2c2CSxEnMD?aDu`BK7+u@2qo4B3s@QbQT!0USPTKU{YyoD7F3b909E91{^FGNDhQF+ z|55y8TY)Twga1qOUJJm2-u_qfPF;mEX(%F5{U+UcQ$}H>v-RE!+ih{jg)L*Zw!S%W z-xy9>|Ip<(DRLe3jv)!J9S)F1s(qM%d1jwAquv>9Mlgmh5C3qoeqHwCvjiac$yun2 zA?Pagv-eNV5y^|0+TCsXFbo#G?7WxED^ubRL;(unlCHup(>}4zDwo1so7B`@XDPyU z&R6%-)nK4}IVZ_RxOVvE^9w<@u=pMKJUbKTJf;6oC#6Fg5yoh}Po3R~gj+xKke2xU zQ<5kEw!h#YAu9DEM|YQ!{n{e@bGpopDV9R;4jT@ld500{9ux)Wl_Mm@>+>+Cfgs-N zvPSm+Fo^gvAdki+>H8D1_aZ$U;3e;X^~M*IfVwr-kFnv44{Wrd23RBdnY%<>F;5M6f(TU{RMt^KA9kyr1KoA8_ z{?iFJY8Gnsyn1D7-DpC zzgI}!^BZ)nZICIIbAoA2yDZ}Nw6pCfyY1aSPMCk0zGnR!j!gUq2@6u|1@$A8-l1Bv z7$p?x$8}a>wyrfp7mb9@l-mbI7xBftV}s>ym}tZ14GVO?w6^H+Uv@p|Y{;9ViJiuG z_rhs>#v2h_7f+*qc0G=xz^;dW#K`IK32Nu(GKaK7sH#ZW3Yu<) zjY0X7{!KB%sPYhzN_Z+qpEU2=n&KuK?Y6b@C5CeO99Z=J4Me76YCy%@mSv7sbZV2q z8Ls&C^Ge3{(5+v-*`a-eE$wB48P~7M1!S&X_u=fri|?X4Y;}UEa5koVhXum)oP5i1sw~&rxsZgeCIA6w@1^5?*yMMumk}6w0Zli`(MZ+;tDHOm6YnaqtoH1z_kW|uUF7~K;NB2evX3G@JilZeFoHHjT2PzV$`ZE z5yeVRPAo-4i?2U|L=KooVH8Bao_5A{6H7nha9PV@j-soX-MVpYJUqH9{%m`UZ_2pP z42DAzhPz-HRlr!a%RY+sq0{Wu8 z*ICD&o|`HkynTabyjfh-&CTjwhhu?!{J9lq! zu&swfmgP)WTv{har>Cg-%qeS{XEg* zZTX9oJdictd07$ShdsqoD^aZ9R*orE>6UvRtC@oehvWQOc^O?lH4V!*2(pg3O_wZE z;*#nyweRyBA;e}LDhk8~IA6;A)heDpp*&*$`dSZxr5tkg+5*3Qd*u}?l8?PFJ3foY zK7O@#LhjE!95A-XS))5fChWz$;|`p$k;GeX>*Zi;(8ebk*!V!U@=t&Y@LN;&)*Z>U z%hA=>fyt3jzK@DxcOHZhn+NcHlS(V2bZddI3s)ejq`jI zik|bdWv)qd`x1zvB6Ei0D;OJHKtO(7TL}Cl^qd%e_4xDa%7Zk& zLH1sPnJ>OtHw@B0+=^D!fAL`9|KgeaJ(9E!OY@eZ3Wjk$mJ^plyLrnTBfa$j3i^K2 z;2&qszspxMGW@MVFaG0?H{%xYW<+IS{Pn6K1YR}HX=L%+ks#g}ZEf>#bEz;Y+%nE= zo>*{G>zVxu=cMWLhg7KNUrT_p=cy;1zW89Y_qg-NELLe&cpjHlqH82Y@Y301uW0E~ z28+M@m7KX-|0p=m2eV>lO9q06jVAV@fua>9!ophH@q? zocjhp|zO zwv@y)xUf$bSYQY4U|cVEun~*_T4Q+ofR{Viy<(+n^ln~QA9b*I9VKp|z{Ok9$@O~T zxl`8u3K_YqO$V75o^xdg3jNQ*0kgO>wM7~`LVuwfC?N~ikUG=G^0Iq7F2VOTGax@$ zbE<2_vG#*$bm<@PPr0h4i0}DwEmlDeIfTeMeo#iZ1l$029V4}!UFZk-=I_9n{+Ow5 z39eEAdqC?WM5CPPHT)<77k;I``kT1$R9p7LWb-?W zTFB0CQ5l~Zm_MK(JBpYbOC+ZBBNZal8T*9{tj)hY)BF8_`jo8fH3BTkG3x=?Ece%8 zuh$ms4b1RK*?G~&{5Yp_E|n`-_1+)fpT|edtO+ziS$`xq&VXulp>E}u8mLzt|2zTj z?yJ=EFw$i~zV#byIrd6E$3T^)S94P0hEVJFB66sj!|^ifQ~I9#voF4L%dMnisc_0X&uUl9g8* z9G@OTL0R@V#Wbt7GbGNTvvY zr8&k|qVaV=U)GzJ8~6!$RDA5bxL7--<6O>(291%8GyGbYp4!GZj$&&)to69F*DElC zW2L{?Cig!a(V7K2I^`506khZvVmNF^+FPBgkaoMscD~ljSo3{* zdZl#v%P$; zSG4>in*TJM*#2esn)Pp3GD+(N27rbL@aBbLfKRTBKHYX!ojSb+crIq~ra{+TQ!lR^ z{BYa_@kt1jQyP z&uu9q+5sNI3Anit^EcHooDFA~JKJV(nIXu7^knN2ZagZeA5_d+?a|f7Rth;b>dU%y zTF8-Ky1?Q$29IxBX&3dSU10NU13MnV%~$MRW4L*sa7A3*2CQ$Yh*TRrE0(0Hy#$Cj zXQH-1&UmROXySLC9sHB_Rw|@@`^V@ zBYvK#43(K4=7h2p8*=prs;_6PAU13H$qSp6+XOjn6`=*dAU@egz97jyMX;*_*=vN3 zD=d>7ItZopw7?7yl1#OYnVR4m7S(l))n&w%s)S$`;fdbEDcl9Oe1VDit0XSjn6G1t zNi)Hi11&M~AEvA%?;f7iF8jAROt-&xI2du%H=CVEbG^2i3wlqdYJD+biE~vW7fafQ z8*N4d8B+b>C@2RO|NeTU%5=L+Pr1g%ae}O2@XKyx_E!><%@HdB!;RbqdCg+#b!T4O zeQ0e~+An*rhptXSg{ehFL~(KrTn=-VnfxrUe(f)XIy6LSz`Kt$XoJ#2Hk@)@xm)In zwY{?7vudOohd*#I8g!$6dkX`tkGBF|oXis(%x?fN>v8HDa$pXs7vCj<@&tzv$f~*r zDgKNeok3*zRIrP^2TmG=N99`QzG;{F2p$qS6Y8j`?({pHgP_-$_q0c!Nb4R%j)HsYD``uw-RrBorp zE=yEmEg0{wT>c-wO~YCkQzZ!!ss2iq6Prow_&8$+^OpaJh$b6J<0BC(Zf0cV+2Wm+ zMiZ_-INnZ^1A;#$-l}Fsiwn{DD<1tbh!ZQ$7?9B=T>LW`9f_k(LYdVuCrZ{Wes4<^Q)B6(>gTd3Z_Sg z<^%x}gZZ2A7>*!QH^Dj;dj&h3*U_`Ve?`t(d*Oh{*=#Z1i5(6HByv^_29`XJi=ZV> zGib@P`qz>Nlw7pqdCq0$()^QL)cP}ck`DR~K!XRkxC6;WHN=O?7m@RSNr;j%WGRy` zgC~=u$*(?;UC}(^0&}ya;1DrnT;Px!o?2~#Z?+r`U)DS+-~ir(`zU60>omoXcEGvl4}P^161i!9-Lmn$Mb+Bu3x4&y zMA+a>s(HoH%Klz+?bZ*){#g)E2-rD;?~{yuYeZ7%;NgHO{j4`-@Fel$(&{iuPrF#; zw_2;D8T8w8y4r{pT~+dY`J>pmofy(D7u!t2UA%OOu}L0|+Lg-$P~xg{A9@ECg9@(> z63#7Vc`e*D$r!DcqOL73wT8fL_c){7x}{a6@;vOKFX%lOcciPo@Y>8UXsl(C+e&4s zC@M>R5g8*NuP?ATRBjY=C>;shxT7q9cUxk%GQ;nbuc1=`|K_h?9R+PEhFyRdUAyQy zPt1wC8fBP=Fe>G}^_L>nKoW=F9-EP6g^N=P2j*uPF5tU*gSg zrxol_-F@2+L2baVw(|wF{^{pf9^gpP&0zO$#H`MwPU%E8V=(8NMEZ?7!GAY~H)es; zij`_k+GTU+7kJ_TgYrWQ03t2%PEFu=6g1M)3$7>A2~IduMB%r=F&^ZAPYxIc*049h z1r^5=?d1dink1g+SWx5Jr)OoOeK7XC8#znvCVc%3WR$nA!{AlZ+)Y;`YX>>sDh zzspB6u(AAo%KT@S3``k0M4eSZZy+BXvaNKR1XghQb2vlC|l3Zd-uI4NfROjlNG5M3^q} zWe>aRdhZ!ZiVAK|o0C`hxqT*XbKY1i*a;9nOs>SaF@y`SAta0njEUXo#lLN#pRg0h z`umWHcYQRsacmW>Ho8+R(fl)H8mFRe=0LW1V902zEC54B`~R`UPbk3bJc5tUOPlQW zQ4y5^hpqVyL%4I*vJ}MP@n~jFH*DLo$3}&fKVD|0m*)-Jmitu61@}e7y@Cf-p(Lo( zF|H28qfg>=$9i9+7lggYAYVL3THI^kc@sThpY(C?q)YM}3O(qu#eLL1z;8W?V58~- zT()eTpHu(aYkiqAL!c@1;)}0nohiTvUvfu+kfJ(A{tQsdRCSs0(v(TDJGMOjOc`+> z7J4czz!y*al8y#mH}fFg>PtGB7f46fVuRArRe#dai;5vfk4iF=%W-Y;WIM;m%2mVI zV?_15Z!C*oz0ns@k%3Bw9M=JxYpxsDjabEx&)HtoZDcIq5Lh8cJ1gaMF$yr`ZLgCl z1}~8o>NVueYUe!qoxO0$G=)XOV_YcGcr7$JsN9ulZP$fP7Gf)dM~MV80xTI6_|H5V5bOiQIdEE{k(j zYf5A~dUGrBy-WpMNpJ^J9VEW!+4Iezu1j&eD^p7x?3sSG`Q?FjklP?P9+)u;qcr;T zK~M{2QD3T((uOwrxt|fYUoYEjAUOyYS1-ky=R;YV)DakbatT`z?OP zmmjn;^_p&4B~e{Lyof6KFzHjWL*hm3omij$Q*+FW81y$cF|pb_jfQ7mQgC~T@(}@PbthhHy?IV! zqOH~GQTS(3Rp{o2WM~DXd$@EVBd?gmrdNt4v55S=v$KK^ls?Xd>w_}CU%y&O{l`K* z`@hRRGcf<3GuEF6&JaO4aa1hjYgmFe)ex?*>+0ja1P205Wk067tSE;E7H3iFPzTW1QU3Bl!Rtq)YN!6?<#Wg$4+~B;__}aZ3IW=O(qpOaaI#4h(lpb6Y55gsy ze%j%zOrZv3JCb}VTh7w>j>1|SUp4eSu_`c1RrKXHzU&p|*}D3eSyEK*?o#0zlK`Wq z(*@yNRdFO>&VtA>&9>}2A6w^5hY%#br%5h26Q<2At8Ac%eHx{9z-VW_Jcua-5)hUE z0>bxj_ZmNx0bXMC2DXZCX$LXU!5arYNLo`bT;I4A@!ArZO5umrxBj12FEe)J1T<$1 z6ySaF)4X;-__Fg>b{x5R;_DHm0TyFCxMDOoa+Bf4Qq?7M`wRZGFd4b<0^A0H!Em9N z)9UOwodMf*g$c?EO*g5T>RbaZ(y;j63Q(t2CFOR zmxP`dgBP};`jc6FN}gy+DXVb@gF?Eu$iDn4^KrkMNj6G0(K`$y!`W1$ocUjkjNB0| zi{#pQc;=pmeKDO{zg!}ETGqWTwkw6EcuhgC8!P1^UfdbA%J=DZhT52u_GEdLk}}rU znfo&ubyVU_F(Wt?laU85YHr!72FcC8KGb=9*b!&8<0B#k>w3o%`orv}Y>EeHo4`eck!-CnyTPJLu{LHYVr;el#mybSLe3&YE5N#~h?MP5a) zbOro48bG&`rk+yMR*#RZ~@)gmI50W*RtUPeH!rpreeFiuJC!CVq zxmWxJ%Kf;fJodkREI?OoZVVP`u0{}j6cz(NWFeJrTss2r{qIb`57o!SX1??DKVQ9N zCZ1(NrpZE{rOiMN@C+8wG0h0gbj8Egjf0(UK?*DBqZSJ{t|w9d7D*fP)}s;CpA^+7 za$!)mZ*!DMffS-O0l#Yt6US-{EfQn=q9IrYi0TkkXPo`hlZO4@W|jXI)fp@U=E~9y z^(B}RS#&fd;b|6d9&gH6M%UEP);6A`sT?>7nCi@~Fn(-@_km=vh0+(#5yI!)9_n&u zTxP%9k$Q7yw|!L=`W$;O+5J?PdUu7$ygYYU$<~xTWMz+5IfwUrx2mzo^{#&T>ZeBU z>ssR7lt3N(@Q=r~Q8XQLLb?wp$MkdD>6QrN-=^50#^Hdh@@JeI2e=;#QeQJrxW%J1 zohfRL#4z%D5MXk2u)>B2F&`CW|AV{0d|GiQJ|8Quc|{ zo~V3Fbq?Y~(GPYVvjlD8nelaii?}v1`D%w^x9rI;JUlJh`9EC5kt|nU8WC8VQ|9j) zcOJ&An1e9UcSVUP{lwXK7L=9Wd1OBPPHY?QO={E~qC24#v1X;}Z!yLUtys1qBr%V4 zffWatP4gVSHjcAEbg&YvDxex?wUIBp3b03Kmjj?iR zob79e0spe^+@=YmApJ}{#e)g4a-(s=;zhXBaqO=_@tA zkyf3_4(3+z~RjjW-)> z68bS6TVNIa2KUXSQjkS|Z;e)eK7Qf#m075@0`1L+@^&~aZ&^4jM)$tenIU!oygUYn z6V79+kt4SS3oUvK3ZfH%6?k>Hx_XPAam-l4m6hm2%rZP28t0ONok^v?#&7h?p?HAa zE2`=|@>NOLFJuuxs%p9iD=rXYT@k6X19nNrCo9LpjJAbk*FwiERIdX`ySapJI8CVhrM7gJ$o33Z2(`ljZ?P zB6kYfXZ@xtYyRBHcv{f8`E)cu#qYu87Ero(>N>g?ky z%AMa|C1k%?BE@W?u`x z->@fy1QuEKYQiTwc#k=FGV?Yejhx9yC?iTW_qQY03 zSEJK&Hd=B>*#F`@HwtjR=@0p#?j{p*NjH;ui%xUx#27|M7LD14I;qp#!@R$5=_YKu zmn|~wm7w|McY)j$!CgTVEqufltfM#ep^rxz-{3)qGMhgWLf^@NcJI7nz`i^rxHlbBMu4a#o zx|O?o*Z)C3TU6mVp3p4y;cV$T-5zw$m)FI~x5N+ra`K^-sgBFnDW3sbxjW|uKjDV2 z^*VXh*>cIl^~o$4@K&DiHeP7NzPZ9%uElv1jb)m$b!ThszVd5sGVvV4GMNa0piwoz z6GP{U&EO1(D>u)4%r_S@PfRba+tD(^m1Eg%2(KLZj8}BR9Zq?$KH)n1>&geL=Nq6R z4OTK!0mRNEWC`j>rDpu&$kdFq#0bL+o$iRiwAx3V>sCaLQ9aSrZO7kEe8rL1Pk$Il zoI;`^tUwY(>!wolgTT-6NsUv+@ph2DIIN84njhfqTY!0^A1wuNSl`rs-BP8Yr`!N~ z@skhG02~p&GS;Q9?Mk&z4^bKpuNNJq(xTRyA@J;6Bjd=2Oh(aHs?RX$UMG1|z8vA3 z6awT2lZw__O%GK25Tf93wtA?RBK>2WKTTY@!}_d*v}bHSsmcaBN>-{)Mz60$LeT$Y z9JG%=Yw@4E|LEOi#TGa_jgh=pBrCd+c|!DlIt90;FJ-q^P4PiZWIfND`~hCQJllFSjvr1Fo{-bBEl0TMYPB zE@(c=ao&6qP;Vm-;-+}t{!FxHcEyu85L5U_@CiV3_yTB-fZ#G4^uRfxb3ROUZz1xF zUqD0(Nq zmhL=a!Nx(Aw294i7R0CO{@5`KWS5r^W1N$BvAKv2FykK$C?YCRD?#njI;i)J?b3bO zubXc9Z`3l~Pj_O+!c3dl%8}M>gJAdq{J*Gb=nz?6@~$itam;;1OjuYPY_1w>rxl=NX#3RxYJcefRxe8j%D_Qgk3iXmapTU@dtpZ_N&C?rd zsfUyNcf^OV*99nfgl*8dQ`4~tgbBsB=aXK&f(5Ss_ze1&iRBM}%kcb1@qP)GD;7%` z^mRPol{7$Xy`=5aEpj7|zg<=ET*--}nw|++fY!@koGf@BoYmKxt2J8i=V~Pkqy(kY z@AlZ9A6puqZ58=`@5izv!Kpg9>+ccDi0wN+U-*Iy$qEhM-suy6H}(Ug#_oJihq>YX zuhK~@6b`-<=dq0$B*M;F+dlL=gfg--cHITIL|Dw zb4U7M(cGK*PiC1^49F~t{w=f2``^s6`hzab0|eB&|D9P5F6ZVisYS)+w3Yaj94L4N zB9?&!$+{oZM;xL6W)MNde#ivC4EimR3;sjXcE9Qz$SmK{y{L4)|7lUssjzhQ{Q~Js z?-^b-kcvw~{WX>lrDqf(qkHOLs@=)7n8cblWjxR;XMMl>YUSgBnx)D>v(!Bu(3uKH zsQ5^QFA!gKDD~&+&=z?6ID(g|YQLCtc%idJB;19j0h5jrrqs!@GAYjZj>k)88CMq6 zEY(6FbhxephS0M2(hphYoKa%hxu3w&NRO9P)*>3#Da;afF?Xl88vRRP;~ zjksO!tPr!dL+~X111|Un6w3Qu7}?g}nG&?sx-P90QE^yIjz&ni!lQc2=LJnoZN{)2 zA>_ts-;)oc8f~bdsjVqa(_NISBvi+*6=!K-*XSleK4>CvaWMe*X< z?N)fA12ETPI^9AvuzMxP`_|nG!|bWw3SXW%daj`^ZjW=diG6#fc>Jlpsncmy$2~$n z5u?Su*UjR(24>2IbNSgeOykRm>EQ6aeiUpvN)v(6nbJ6mtv9eQz9fAY5e>@>2OP@d zeaRa?(v5M!8=X9;I5&i7GAA4~Sw#pF)(Lz%cB_DH?j!ygkf{B+(g=2qzZU6OAC|wh zaJ|S8;?`Zp&EoYtudqHkiz@%qQVSy0W?x#QrLA$xA)Qn1chLb5rS%a+L(koeH#m{m zpI*SM^2)z$g)rmEd7m!PKb<@G{?k<9_?Ow^|4SkJi`Wvyv}#@ zP1~!tLp8?2w)6P22-|&+=`3Cwuj;|gj4h4RZw)#Rrtn1$um-y`5!zutA3Zg^)sT;WIJ6zf zaOxxnZ>WRwLbS-E6#HpVaj^8_E{?bM{+y}5 z8tq&^-vU1+-+!LeFj~H<|41_LVMA$B@oMvS7RScEIy`&md{WbqEr`KEaK3Kb9FwYg zUX!_(e4&rkWoFUyIE2+H#s36JExNp+YVlY5-iN&RES(q~vkU{V9;UgfiV^#v_sLwI zM}r4(;wKZM8v=54nBX(cy>+TN>o@{Tyye@amuc7NdBJYsmD=5Ka1dTbiH)_M!zfp= z#$Q#uLyNmF2(b~f&a{!>Pqpsdch$Xc8bw$LNl_C#nJQmLNktPtfi6+lOJC8X0v}g# zPPTAN=Ggfp8(HnWtqE08m(+SgoyOsdU~)!V%vB*JM#AP&L`>-A5HAH<^zSkE`FH7M z5d}U!i4YWBQo&PY-%LcB^%qC0ZoubP);Nvyki( zxJfyjAg7CS?R@9bp_zN*(&rwe6i|tLQ9D@&pi! zIG+}mfL&7u5G=y>_X8-9~Fi@YR2`S9e2@ zfw8A7&mQ)-d(q3u3V+}`-an3@e;H2xyP35A|LvlK;r+LZKKMUfbe5)RTGa~V_OCz} zod(1F$2zJ(D~@%_qYEnkbE?ZTd9n7^9dNLk?0CF|#eNZTbr#DyHLhDA%=aPRm~CK-9`$Fcd-Mo-LdPXN#2317d3WN`RpzlX>x`Be18?u=@{t^W9?c8 zcF*aa0$u6KQUmmPegH*uJz#H)Upl2XzW!y8s#D%q;t1Q-UQzN>F>-*>k!hlDR!EVj z$}q?{OHbH6ZM-0>?>u&;;#226L79OoyXC}5P8k_4do9DVIPqcIy zwq4tNL&alKu8~+~v1w2$>11yd#-g`>QGs+^gEn!ruK2~Wec)Q?EuSc+45e6W7z)nM z8~hx<0ON--%Xs4w;B*HOpo1u&5q5`-#XmKWs*a#ze`;C3!7|B{)aLYJNEBJ14p} z$nfUMQKvtvZiwbyGZ!TJ%_NvXTRsX7-N{Dr@uj_^gogXkWW&rA&*Epv4tFZ&IG8AJ4~P>d2d>rKDUVv`Cj44i*TO$r@RKfWw>2J>A#h~-1FBMZNp0@jP`F&o(2C^0izPYEciz1Y#_yyZYe@4 zE7u;1b-dWQTrANsM|&b?d8b`(dSF7+x|8~Ku z&ez0%y@er`2|lCnXh7&Mk8;sDv?9_7AwTO9BQ^n{ zTE_xZ8?>r3zFu3nQ$M-l?Rk4|u$gpCQxi^oBgOk4$(cA#o<;eR{9u{o3!Ji}$J;!dh}1lAqiefSzRM^6t-oh|c^OihIB zG`Y;xNku00Uy#nO0=!;tVaB!o-}l0|D1D--!M5y zJe5-4{0b$$fYL;aG;be|fX8uqop_pMHI|KxNgP4LCdo`N&%Dg@K%PekSO9+&!MA#d z9=4p1yEHeaEi9W&?mOfajrNii)(itXo@gl(mzxLekY((3-THemy`6j>ZY)p$RB%{# zgWhSZ^{aXLgZ8Pnhf{YV9 zFif@izuzA*{cQu>-VcagJFpEaO1e}iznbXV5;LOxev9LjMsHem`Th}>=?&eWzh>ea z4(+^zbdsr&AdKLk_WWF=E$*HIa2ql>bXCkd0OpAC154%dbC!*dPCu0RW5OW3fCT88 zgxrAc`1X<^NE`2FgHX zJC4aE@bg9-7rfaL8t=mj1KwwpW6nPnr*+lSd*n!lEs`=AB(r7+XYfJFO!xw!t6omf zvxj2;HSp|#)Ia=f$6=YW-ghOzjV|V!F84DpdB>dL#IdH%%PE6g9@@E{$=6XVC(WV+8-y!DMCrnDqG|#qpVjCz49x?hwz>!1|ZB z$R}yI9y`Nc6b&7`K++2D(eU7T=6K*Trn7(H4%)A;K+@{yy}&0)f!}7Fq#Z;EK_J!@ z8#Zg#x4cRS^+KqR)iKUA!*B?HJbe|%=LvC|2od?Ud9k|9C%Np}vmhoZr17(T=T8v5 zjC8?OLM5BRcyiHgy~LkT)Jza2vyzQPpbX%z)YaRl#df)ZX^LAv&i#TeCfc_pYEdV9 zlZ$aWL~~TMhE_2SS;}dLk~ONcKg+v%~wM`^I3;_ zBkv43d`W@Uolor#M-=jctlqBu6bhxe`QhW?xQ4yZEy&E99sI&b|T z2*&zwyd2~I#Rix7u-!ND!g63LYwiZcHl&=EaTapjH88x?9fB4vg7Y5~h~@3SG$C`a z{co>MZy1n42jf>IBgIXg#-}UY#Tyw+sX13p>mo*Uz_RcB8_luwxz?DF(^S><~V=>Z9|((_{~__2Hz=_9=Mm=@OuI0 zl6@U5Pz3$2b639iEs&4^=B~*9%w0}E1YPmUztadfm;0sAdRR=#=IDLRaF_V*IEE$n z_+cZAgc(3qIUVi#=77U;VLZ9HVs~re^!T|t!AoPiOTE>$xAohm(@RR7s8SiO~ zRbVbKb`c|k1jy;*|4)Fptb5fEOrje>@Kp!a0+|01AW*#^AV9LrAOXVvivWQ!hF}5G zDga{){~|zU99O*Ap*6skIY9b90#pqWp!a_fAoDzsQ777FM4enzW~%hEZ!upi2sC${ zs{(UZFV^J6DSfPTQ(Cvl*@#jO_DD=)F+pl>;7pG`z%Lv>(PH0R)VM#5v_ZV?xo zm=mA6q?F^BG9R&6&i=;{I8A1={SIn|&$doo6Pe;no8%V^I>hm<2+EyN)#YZ16ybS>C(Y1z=gU4fZ4v`)wQl7>j zYaoOt!wE9%(JsS}{UFX|s;uj?(1stzEk`T3ez$&V+qh*~8@PZ6aAfyZ)YGtB>s9>G z7H*sA+Ho-Mt=}ly+&mqPG!$pnVMxG&C_4(vi(hHB-bLe{4<@ILsTLhD^NwYqre@x* zWAo-7AK=MAOX1L9u|+asiJ zKUPT#*_)QSzGG;c{U+vTaypV#XZ!0L40GzdM8ITQSGeU4UgKJrRJmss^Fz@gVu z(W~%vu))xJx_Q~Vmh}D~Rp?*(k~#lo+v&HU{h#wX8u_2|da$#KE$Te`;swJ|0T4e& z4)01k&4Po6dK=Z|NEJzfOlXsmaNLDU$-nfrr<56309_P*^w3=Jm`fz|5L{0kWN@i; zLEjZk7h(g_=Wm8On{0?Dxee;&-H^&+Lx*}XLx2HHlOc-SG5WCV(dIfCYuK=hc&>Gk zBfx;8&jRqwYo!DEP$<|2Qkfs(3?32p%|~g+6O{Jm{#>qj_W0eJUniFnCWmdfPphH1 zr{xOuJxZ27InS=ISTLr~Q#m)!?OZXeYfr9|yUnP$bwbqZxCg3=(X!IvAjL;QbMOlm zU!ikxIm73QbbNDi;Taa>4BopfOQ7!{mS+GaupwXqV=TKBqa}|5NMOm|5{hPcB%at> zlHXL@wyOdpu#hEC&nYcp*GHh|l+ie9{CCf3$KBV4w9GhL$7BK8YdR^0&uW?Ns=g$k z^ZK-eurT1;@fJjWla5d&T;?g1*G3UjBd%8_V@ry4{H25uPaSehJ2wPU;}CgEr8m=Z?zi<-w^I;2)nVz za+)Y8X&d~F_d4C(k8>qzr%Ua7jh(YQP0o?%m_xC5GKpV&vKl59AOyuj>zHWuI0nTp zfeGw^>(V;im4-HFtj}-mDXLU;nl|o5AZDAsTAu6}1*bzg5C?VUv8a~D$ciF#pbSHr zvWig>xrJy+<{dOn_p3U#x6sKR*|QzRNp>Z5I1?Ur#ZRu0PVv1)Y0&1q4W66sFb>tV zP-ixilMh#*9i>jmF&-5%p~bQE%z3$GH~rZWqBE!D;|Xj^j?cAI_8zWKMK3x1M{K@F zR#(X+ink?R&~Z0o%rAilkkTIK=(AJE=Oy;T(Z)Q9UBB8`h(xh3c!r)B8ai3OR&ENU zhnNe%v-Q_{Gpx>>K=TQ zbEy_>HQxTHgybd1;n+vmA!veL48R$k#ptSE#OtBbHg-q_9r`=LZ9OqD+##Q!Idy-> zns$O?I72IgwHkulYm;is_PgMCBY}y(I4p&BKbqCYcY%;Hah>8u=Mv~}9tGRE19OIU z*2Yv^;q1)+MnYEoEStR62(HuY@!-WMS*FcVGtbc#6#C{=o_i=BrE)|-QiO*a94A&vu zc*I~6BKY)VgQ$5Q;;XouMVDF-%3KyP+oHF{D1g$OK0v`VA2T+h_YwP7V&EJ82ZTZD6t#a;qJQUIW@P+7 z35nlq=N;q(Vne?-L?hn>)QM_|nqTl19ooGaB+h+$95~UDW75}H6!Co4r5?db<_`>I zH)`AuSOXci!-xboS^fZ#{w}(-rSz!f*dN(rMY}49D@n)0VE28R8QxXy7s6_Lm}2uD zhY(jC_nNn7?~0w^xr*U#hF+hdq&RVfcpUOqp4ELodankAMoX(G(~8eccs2|~k?8{U9O(8?r)B>^n!pNX2B4qcXOi13ZhWaTfO#`>W3b%_M6cQp#zk_ZNm0 zW1Zinp4T|qrc&sV#><3EirVxf9>34ZF5Zzm9SdKTbh09xHn7bijKAy0A=|3f82cu9 z{O3tDP$P*JU9w-i@zlS-cO;%_1K&n#k*!iK_guro)RQ$csV{%FW?U*rSpVIE42+QR z{J!6d4-|Kw2JH_ZvLNM5Bc8Axc#ax;Fg_T!P|NcDGAUz*0% zO5s475vqSIE~Z3wI*a(_?f=!r74hckb6%#4G?c62(%2i|U8IU}TPwV8iMpsqisF6N z#<$y}u?uTb7?Mn`iLsbLDz5%wd_RGhwB9q6PWEswiq_xAbRw7yY`^_>sH6?m~uj^D5vN)+u7*|3xuRG|l!5we=cnqni z$Q%s`(ND2qicOK9VecpQOW&cWsEVevcu`TxQ!6GwS$X- z$B8T2Ag=Mu==t%hht1$uR^t6LHgxjt5`UB=^)m%391Jb@dpM+uZ&v@LP>lc5;>__k zb5O4Zx*$r^ImY92i-y7icIq<-xQIHD8$XT?sk#W^_YZtZO^(i8%;oqb+2WY0>-k4> zwT2&tfsK&|Xk!#Q$9p;tKzg{G+~@MbwLYk2MN24~6C^f7vByss{8}HvYGLi_JbUNP zMRklc{150qrRpepOTzd}pMI={DEj<Rz4wu6?B6{7he6#del`_q)G!+`2sPR~!eQtzKiN0P_U~YS#IK8pX!t(wvVX?nBY_ zbZI{JoN2D`4y6?>){9D9j! z`GXfmP0SY%z^v8+ER1M(@t(j7BWQsqjISA1b9Zv1tYZkzpn7+V;wiS;m2QL=hSBl% z$atk4Zi5}Y;~`25F4!EO+bqSOh;lZyernz|JP}!K!PI)CRfs<{Gl0Iw z6XXsib(O;yHa}V$o4oPb#*hu{KYbDYt)Gsj=efl5pHNO8{oc&D!9UTTzEF$TS(2}P z;BF3JceL_;y}j}R$aEQvsPu7K3O?wy$~zjac!5CkJ+=&MT4ZKvm!I1JEcYg zR?X9v+FR^Ho_^>bJm=^FxWu58*MYN);)o8-+EcsM=3P9~KZ?-5^h3Y>dvTZrE+-05 zrF!#xEuz{I0udj&2k~vKwk__4wuCanDRC}P-OMV%s9=WbWW zUPaF2kGOB1&qEpDZz2uW4+zXwuczjO-f3@Ksvd_P0}5Vm zU+8FDV8Dc6oZI}N7jj(3tX@DZR;L0ddj;Jj5#VHhKaPcHD91@?04|F62k3>2%V2i1 z)^B$65W32qJY_>@a+Wlq%r z@WtLPcLxc^swyQKPfi69TipOk=I45dDCt-R*bv>oYFhT4oO~R_ZU)!(d}~mx)|j6lREK`sV%A^io5wJTZRcooTg~_;`THPkPJKa2Ic$pl0C2P4qZO)< zt588xNs|5Hmk-JB!$}9sYq}hj(wZ9X6p7A~ECNLWU7dSQZ$n|mZ!n~v3q^<$-Y+e` zo34ZIpnD;53=C|#$(#Eb4s}5#r!RYYyE>46o+|(J3@b*C&Nj_N@Oj=lyYZUKVCBb+ z=x*9%ar`K`)dN~fYle#A6X%21jMmEQjuYF_p#qOS%7Ud-*USTvlHKJYN}_1r)?io2 zno3upqm^gT^FI>aP9uv_9j&9EVH0=S(WXD!*K8cj?4ulUz9qZoy@7J7iTtT+*O)4s z4U_6P5@>4cB~;@+HdDBPlbAtvDR!C~2`4ErfQ;?|oP-m#!AxiLFXZS4P*f5?nhWqP zNx$vgT#0LLfn4mSIPsr>k}~e_X^D_oaWO!54jf!wL}oi(H`6^kjzA|=y|HI1M9Gq& zzO056>;6H{=XQhiR?SoAA0^}8nVR3S|Bc1d8%D|wYF`E-6l4tQUp z^iL*bHu%-*8#b3$WBmkT2bkyep_$u-p%%wXVR_D05`CBe~ukZ!D&uRGXsy=Tfvucl$$|5_yyf)GYx!W=L%7x>IVr%DhtbJ88%ixFwW`) zxS{$xK6=YgnMZbM&-Ybp^CrmrzOfst@lpZ!<*+!LDAJ^Npc^}|;jw4IjSNcbh{4F& zsVVABs*N%8FLGpj|IZs93!X6M?9!{Gl%hQ8?EKdN>mBH%_|!5-p1T`~SvbgD#yFPX z+02sNN_&)ueV5nqxz|5dEzmJ3a!>2H>jb>vX~1+&HF@1MQ5~ce*zDw{2EXTDB|5Z- z+)_G;AErSsQ>|vbcGMomQ>4d!@aa@3+xh5jBFk;M$=6pXPvME57+7LMGfeme_~p&q{y9HQMsi+bw&E zt(c2H@r5h838M*Hsv#(b?Urhow8l^Pu@0lqby}__`T-`Ng7cIQUmXFHkLKCuSF)m~ zT5sWD1)-hs3|+MvI;n{aa1)!Em4SnMTnl8^*ZDE}PY|552{#gSe3En^!k4nG+b(>$ zfVDEk(^*IMw7;Xsn-uFWFD6s{pjm$^xqAw70B0{hEuwqc2grIGA8uERv27l`ic{F( zJoP*4;`F0!?48EX3#I3XA2+b?GB;;6nuID@DAmQ0&qES6NSB70@ow&UOnAJDUfuoj zHi$69r7mI{>^2s4t_Y#*uj^!@`n+#=-dwz}h85H59JGwxoe|Rk;+xVhu3^#Xji=|` zN9#2v>y`ap=Un8_;(5c-*X8i{U!>-IaR2&wLODv+72)nV;Op_w{rRPX?`QQF_PrzZ zw-HAO-xKRI$X7M1$Wn|X93$c~SmtP`Js;tzS6^+vA}Vsb9ffpGiTS*{WXn%|3Y#Ss z>%3FjwwmHX=d3oj%cqQ%f#pU>oA{`rPw>2K;q}0E{-BiR9=(4YeE$aK{Jiuxfe@*bWN{bW(1zpjwzuBWHcX)j#-3s8 zZlLV7$o9Jz-ZoIy@xegbgb2o!2fq93btfG>ug#fI?}LqKqaO{p;g{HH*WA#`p)AHg zf=lhFyMT9kB6larkINOO>U|bCQE_QwOvy8;z3nn#GCDjtFZIR+uUun53Rge9l&ztu zpW~Hwfa(3J>NVgo#NCPyu&a`9&s?>{rfxrjs-BbG0ivOd#h^&VI1|h!UBPy{Nezm> zxL$tjFwFVj%q!v~k7{{HHEE+}9QfX#!O9K7bN^d;src@_vnAaVgV$LLF1~FE`;SOW z6f)Lx!ir@WbZFV_b7DFy3KuT>m5$m0Wkuq4_W^(2{@yxm#dwDGiu1w1~`V2@85 zTQ5j|{>S5^Y}+pg^7x3cgvx)j6B!}nDFu0a+|U%1V>0I}DNL8-EAT1+i=mR*FjI5Q z+j%^yh`L84RR5(YJwJwn!c&%^2!=yePBpnyafLTm=Pvv*E-s*CXs(!gG21byYXZ8# zNZeCpftmS2F0eNW8Mo3p;kW!Sffme~--kD!m<}YOrAK#ce3FVbVw@G@b28l}_csk^$2x#HOH+~iH9!ly0O_2Q=;;c zO2BO{AiOsbtgEXU1P`*T3RaO$vZL|qJAz(rh z_ec?i9s2?sW?_Ll7RhvXItoZYfxaN=waVBA2MfGsqi~Oi1jwjdHGBg>CBY>TsATvT zxaiDy$7>`>;?gRd(9o-k)W5L8AV#%TvFz;HyK5RYkjB%lE&Us$wBjzu=j)$$XiGHv zo1MaZ+(!Pyu~O8`S=B$&Kwo}sil#4#DDeW&C1K`Gr!pu{;f~Xr}^W2 zu*@Zm58$cjoOOU0`7#8afm_=@i3QWYbR@I-JzH`9nd{12OUj zgiOs*U-H>mvf!e#`@~gp@}+pPe&estyxaset(V>q%x)!vUn+<|G0kdWBM>6rp1spC zTzd5F;!f7QGPoxBf$NrKX5a0x%>DX$NDgO8{EX-2G1PBZDc5TOWhXDZw%~}itCmH6 z5*}F};i?W94p>Tj-?^6yb%aa6F$yI@KATx7qMPvZBJzZuq??`!^~8#vnB77CGZ+^= zW$s+-2|+vifh>6hH-e&6pxBog6(4_((b<-J+1V)?{{f79=yU7PTOOd7J-;in zOXrBXP0?G@97o+&5h1q|RLjmWC^(7%{Rp~64JiP(sO=$FX3#CFBo@sZxJ4DhF{(v6 z&E4wqC58*{%4_|(Md_PkK)aRH;sTRRuQ5VV+m!Z;*{RnP=dY@>cQ^5>DhxQSV>YSq z?r35TpMApMP3HvMfcAMhA2v5_-~c$+i_ErJpE1mQhnl00)_<~|rc=2|lis4WR3tSq z(Rq2Va)kWR0}Wco0}Z@|SJBfeL<1M&Sk%_zqSg~wKlyCan5uQf?-`^%CkG#+N^0N9 zO#2?jgabR4AH@{I@-cqx^{hQn8Td9VFb{;tS%K`;9Pm`}4yUa|J2w^u z+{n1==k@XP8>TLIpQg5Hkdms;(LOwmp>eW5y7MdA0Y@k@Rs!Po$_m>Hi;~2R6 z`CA1t^<~FS47Vl36+Z3Nya;YpBmAWQA&-$^HrQ0u%nKo|s!G4kho@X5 zRn0@xj>8v`2r|;L8krzr)f3zOg~3-W{m(Z1o%2(y6VFoU6>bJCpOaOnS-KxvE;jh# z0oSKMf|1qY5eR%WLNSr)8U_Iv#32d*bUa=dA-tdZ^bsC<@!sNYVuVJfE`;W-b$yXL zTER+iUS=x841bS3El z^&f$!2!^Ps?~A7D-%pYEKcVLVKu*9JivrS;rBRRi4T8k~T>blV-&KLh$h^Fb7@Y7TB7?U2Zi0rXy(x%+%)9JKq)sbb6G7Vi!f ziy(DY_T~%+29b3u{y+G?_%x;ghY!W({=hMkyyLgP3=1v=_dS6H21NgxUOaJo%P4^L zG%0!d`R&??IT2y#4v)eU_7h%n%-CjgLkjcGVi}y^QSr}=VPF=5%c9`4AT}yvRVDlE zCZHMqNh(QJ5AfaeMs1Qw+3tY+#_!pkamhh`TemJC{2#iF6J+)3#cw#*sUh!B#nAtX!lCE+sb6kvNvSW8=^b%7;DafocsrpLm z{`(NR@oI`t1lq~#;%`oqZN93$6yHQy-WTM<+1)cBM(@dK%6Xgze%QWh&>zLFvC20F zj5mgj+FyrA^yeam*vHWk@!AYnpU;rv$k3uh6%tGwpk*#5o+l^((LqYsNeT);P&bG+ zc!@<61zPCq_LW~!;Tb4aME zH6)^+W1_@sln|&chrHsNO^4(4uS;(ft2MvINV{QW&s@FF?%{tXFTPBXEfOL0#Wdns z&S!0C`GYyB$h|Qa0eFrE^lY;L4AO4Sy&ih#S*HAjc;se8i7wJ+^i=65PUaV?t(~@| zb#z_L*ArtbDyN&dzn+C*rA_>!JpD^sGTYxyOn;?a$dmlXjsvD$%wHP-w2QstcsvP$ z!T#_CBBN)d(^$ylavQ6{-9fjyjaFyFxX=LX;zDi7J$^X1^E}@B_LluO?82Wt^5}xz zz=q@3Wg90K*J}kQd0U3YxNBIK#GMprK{Uo51wKK)6`AippN`uJGkJz%p3nBkaQ5^$ z#?6)#b?G_zkGsDn-V0$Ff>EU@ zkw3vWC8(qex-wNefum4SF5kR=ZUvdS)4e!9X;&e@cJ#qxzd1IuUs5lzzDKp9C2L&mw4B2nJs3p+8UdU{#<}l{Vr_7U&Hc3I>Ly+*?(7 z_N&>=CXq9PZn|MGzzY)pUbJ`>P-w><`?dmb618@&x-Uc*fHur?N2c)OHlDBIIQ-X!g6NBD1g*2yi2PXh zUtgKWX(2SVE7=Bn2)vI|a7Bx_Mnkb3bxtDFMAsxH!b*{G&(gC`J!5#1Ye6n)40j=d zgORau*3AcP2hS#qLGyBd38vi~-V1R3O!>i# zlPxsDD_AZ+^PsiliEYLI@&cLnPC}QTw)XpHAJ^Zz-5~siAs=;22!g4kEwUh9AVb`b z+}*{to{+A$2+n%2Aj1t>O2W&oU-rMsPO4CTAGMEd#kSb=*^m0U@w(bP(Ze{bP=Ok( zYq!-jn?8-VvBHRa_8+^`5J1__nfjRZ^x)`oUJ};xT;0R^*un4-vhO(|jl-DOGE4P@ zf>*xPk7aM}!8GJy(y2@gQ#up8Azr((2_pGqKTP~lv^A5CZ|W`|w}|#LGYOR|eP^6- ztcxG&|Ih-7W5Fp18PH9;S-!bocu#>^b6N$Qf)Ivv{Q{b|x*@>LGsNO$%Pt4o?vD&Mtz26P*JA!20T42p3Ki_j9$@<#&9=Dv>a_wN?digbsWq^f>1RqS zNVY@Th)A#!=qRaG1;#CNR=j)cvAkjmO6s5JMtk6sc2(_UscrB6ML^-C!OI<#ykP-S zAX1KYy@6LH7bq8fsZn`$YbOerkZ~XTCxDYSoD9#PyTCd&91ps`Ua^mt@Z;V5l_+cn?uNRaR6XE7jWcJ;v!1RE*^4ugzVt7S54B zg8&ZO7WR|RJ$X=iet8PCo^!x{<44EY#ew#Wu(iBM{)Q3&G^v~H;Fn~ZazM#X5I4Y} zIMJdAu2)@FW}0Rr2!IaT>=YE=?=4|tu3eipSoHCtDE+8iIuq^VwwZa9=b8&I_HTTU zk@%*@xL46LrEYu{#tXivZN9lvwo6-$lWxMT{fxlu+9T_*g8ABxY^H<0&R2t~i_@al zuXHWWZ0xa4f29;Xw5}CTWhHo`A{pE7MQ;;E0U4lL=mimW*o+peOY`3(U5R30$u z18C=mhC(Fk{S*RPXz6^H5pz#wbk83LmL(hf6jI9Z;xAgMzjRU$S!UGvG~ls}y+~Pu zWlboS;ymtQ#CEF6>D^X`|vU$mZl(t;nHDquFEn(K| zPwub2tEVWn9w>qzUtngy9X>oT1WgYeuZ=CXlAK&aw-)mUoamj@swukD2wK>85!uXG z40{We0@hA*eZ+k!WP50!r1fg2*FD`1u}Ym6l_b{C=rneEk)|<+lE# z<@U~+(VZs`+2dP)z1NFds9`#EoxF1%k*z(JHSqU2g<0I_kgn!peGSHqrMAdCEzka z2k%IQ-x>97AS(ev3;s7NK``L}&Ps@bvl4C!psYmufXbzs8%_TH-9d$NR;|fv$Z-1h zjPOf$7`QAb&Ld)QR-$SlqX?Xp5F0s5aO|z?kh0yYjL3y6!nb)wsjHf2P zvJA|gI4JLq+I(t^e}!?2higOW_iBo9WAetfc2Ft4qry&*iw(cF3{^a*P}~CJ$Gaft z;`e5bN5QNPNxs|2*6-S8f>W-${RCo@R)R9%#)u~H8%M|sr0hiShKifnHtfcQCfXR3 z*S$nq`8gSnE5th-d_EqqiT|`7HxAb-u-HbqR~nglTzNx>4w}*8hTx#fFaTb%2?64I z+gtY+?az+u+x(li0qhsvbD^=e(Jx(0L|hhlZ>{RyFRo!n)Cr1Q6XARz$1zH&agVYE zprE4yKtiiJOd{FQuc(@{x0L-Yo} zV-6empE(h$`lfad8%g<$y1nfeGVwQ}f%Ytc)OryvDzBPX?#yFD^eL9k$)#&fFE=Ri`Q{+eH-T00Z*}*4|3W z-ywDKGt=_s{>C>p7h!Xy8bOBhe8w$79K}rK;^4bJz1VG5oc=ZFKvo& zj5iAssV>y5x}~zZ+c^Zk6jL;hP>a?0Fo60RHh!V;1O~eex0)TJyD4|5+1E8!?W$K` z!2$JymV^31UG`Sa{)HjFs5J+*}{8pT;w?x1U<|+-$ zV5}+k1Y-so?}yaiQH*>9TWrq37-fa)faF>5!zf%Jc~40D1?XV}V3eaTxtpTWatVNv z2$PFp8~WNIN}H$vqrx)j8=R=C`puX+?{z2(JHu2`U7~4e$w2|`xT@=I?-Wulo3ep@ z0dnd445WAU*4asG^Qn1#2;JLb3w!&7`yJxRM4;k`+(+Z?+eL*(|6w?%`0B zl_I}D#WX89(0>)3@UfqJ7tO8V286RzfPg6WL|oGs^$oKPv&FpWm%(4hS$vjAP;tc7 z0bqOGg6kY>qrN^hQ9}1}2?&rbNkk^nC~sa*lOj~;_|%)I5*f{JB;ulCKSmj)l9qel4J=Cg ze1SDM-qlPHuXj{Ex7_ zwDQ40JOYuCmmWg{zRq%q5v1F2=_rROj4!T}hV4_nd+@k{m2dnh*0(qLMbti}mrcn~ zRc2;|T%5mMDo8>IxxlJ)n;aHzrEE~Dix;ys8TQdDe!{!f;-T@({u9~_a>U`?;u`q_ z<6L;F6y~oYwYz6woF0na05BQrzQB98zuN-EmC)?H zc*Ti01AU-OSF7XClcYH%EPH=Xs^1%@$89`kuIiZqfCfRhKWB8`2OhU|0#tD3nY2zqIP!Zti?I@#mRB+oUIWDWU2WP-O;)=7HRi`W$p-J~-iupTptfAaVhF`qC7k$fI1p9As0!-F>*zq zj%H;ibQLWi3sb-cu!n^aaK>0)&R-5a38Bm5Glc1~d# zR!~K0^mwA$SzX2)7&ODh>QY19_z0{bm*@zH_iZyo7FyhR2?E(Uti4I&S6~4v@s2iC zjFh$yiILQ5s3&R=0B9%mK-fjYTJ7zyl3;&(rv7#fY$Wa#Bu|AP4g27&cK6h!mHCST zr+&>4t@{w2E=uYiD91=Z;zqrZK_N!9n~STU7(X~>nMV~SkPI8r4K zHGho5C5dP~xZEF7^DW_&?Agvj3QgUWW zfT}>fC|0dRvQYC6fa`kZtHmT%)$ypP%?OM)T?%oRRO{dB!C=#3l>m;3I6P)W9j(y& za{r6jv}j6t8uVSo;KzqgvbjyX9@QY|#h^j5gSK8aBcz)N>~ABEGRTM{)x?DF0ub5@ z85`3~>K&T-a*y?0i*GLZIBAdt}Bek7O2KQP7bL;4OyRMiO^J$m}e84 z+({zr#h(_%=7i)yX#E6{+CRknA+-fYcsL6y_kD-q0xm zas@77<9c=gu}}ZeRW`feaIhx_ElLay4)EkiN0rEG5|fD!Np`0nCwTr+;3Mhv5xF*h zPx9LL!|g*f2i%5fN_J6mTfFXAWV}GqI{D7hPpKdgUxFCf>l3tklyegLHga{yh}^2| zG;W7gm8vBnDeFe>xDLUarctyrGg9A95|@;?Y)V?EiYSdDAHX(j&0m$Mk>Ud?`%JY$ z`)wPZpP+yL6SP$Bl_1z81KWm)q22c2DRqPpEOt#lX84OsT$j3xY#%+4!b$CR`0xit zplFhk>0d(dC;1^TSx>mU#-{!OPfeA6L`qx!h8GZc5m#_j7)9o zX5EZz{f9Pb^shN-w`Z7h=>s&ds8ZA~tG~cT zRxn`SNoPkqv)bCMY<#2{)_T1z%YDB7=1AZ=b>4i1%>h|1qQUlveeOy}lwodW(WhLu5 zmu02w92MZ$&0uPh0?D^&9CfwEzi*!OYP zK-;hb&^8?CImn+x%?Q3;p+sXOQuZxxIh^NzX9xwZSDib9erjE5I&Zt2e|UnfS2eAB zW_HRb70nq#xp~wwrP1Sk3Hp6~EGqZNtPRi%tE;**Ep#b*hX$CAfczs;u)P?ag<`UjO z|4d?-+M@`76AWi+W@FYMq++m|e@TK=O+JsPG-G)C_A282At$GV908I7{neujuZ*e7 zlSyn!gP8gNaBN}nXM{{;@o6nwW<~{I?Y+>108Vf%U#!5r31{7^U~}n~OJ=#>G38(% z(^kFwQB@u;*o@~=qkNA^Nl}(MHRVT|yH+JXK}}KvO=ZVG(`aqSesk>X#YMUqH4UrA z90AV#5^KAAjN4#54&9_<3zUIU zKmAmdchpZSlcP3aFtKFKRQ1$Uf^E2;rA4#!BD7T_-e^KRkxlU4`17FdXkB`5uzH*c z{NOS9nUzc>tjJEifyvw*v(%Ce4`e1GS_$Ut^9Y`2z1PpkP_j~BcnDAd+E>)q30j34 z?F=ZiSvr0aQE%K`OghgLI;ml&l_-ZbG+VM%_c&Vsm=&*W$#xqXh8?Cw7+1GTHSK;5 zEl%R^lX3eHOC-^18bRih>o7Y?_OUfGdf~^4_-J*jSH%+n2g%6KTM-`l#u$|oSc5?V41gyCenxDU!aBwDC^bOdl|bp8N$ec z$o(8ueoQPl>cBfIgD<3ukfdYGoo{X-M3)dmdjhk_eEqO&$1vUsK>&v1^eqL)uZIlH`TE2`$`F?CEC1g2F59bc0$aH@^xByMm z_SkDiQYl0Il2v67X$aW;u4>a+E5J{P|)-nc~%b)JImhbMPR zX-^UR%Z2w}{8y)!t-yvIOULNZRK8mly!Rd+6>NCLm*oq)X7ssd2Rd&Miet&KKEwYe zl=fQB{IaY(4*vUKi7gSe_O^GWX;xaTkw&M*b?$j30KJ6*Ql6lT_wtO;u zl9OF>T-nd*-S!f|ZGcfZ_xNB!DU32;ACA&-6G#mgRG4cC1+G+4)cb$~*EHRiNqWUL z>zoQ)00CUYw_BKjn~le8r~yROZ1WD7({c&Nh9Yreb3+PJ1q}ig=H*WS2bjx(IjX2UW_|-nz@Z63SVsh zda!(ytwMdW-iWnU>n?K;-*6RAXkRANGWPzPKBICzT+I$5r2}dot|2<+4-u>Up}cnN zpt*!;nRRVlTPdY_ZB$k7o^XIt$}Kc@G1(EjH6Eq|tY6;xD~+_GXzBew#@;e0%ROq} zmhSHE?(S~smIfuIyFozd4naUVmG16tP(o5#KpG^4|8?KE_w&5_+3(E$Q$5msluOSpa!LN&?YLxJq$E`!4 z?}WOtNfe*A{v-SCX8T*INpd_|h51kibX02FEw2|xY3tYPepI8GtZ+kwyItg&LPc@w z#L|8tuIT-$8NhjYw=I8vaY!hVRm3jp9(EOCwW=4mfe*^8QdreTC24kmjd{QtIIPX# z#Q=c6z$dC|EU7~Bmq@z*SQACVq*yOJAOvY%NH!!iq<~LfrZau#E$25AOLy2LCj`>b zz=@MI%K>{}=RPrlJs_iV&wkp7xD}*ZS6& zUC8`|hxfQ#dVppL5!=Vj{=!2Ofr6tip_RlO>#uN)I$UzUMcQljK+S1v-FsT?Cx`7j=;V-&1ECKGy?5u7$G0<-LD5!15Yove?Hh0 zi#|kvH^Hwxx29u+Zwfqm#Z(90wsVNSZ}r{2Q}q5-wf%131QS^p#&37@6r0$a!0vJ7 z_xQ*cB?0KeQU21Kec4*b}mc7ZOf4VxjlWnlc1CXCkBI|H2Uv}t3!3lUT6Uq@=NwLiMj?7 zLctoOet?dnF9hNQx>y9hh{k=n%dl;D^QyRmi3CCZcf1mU3cv|eZbs)h5RUQF&YpEu zFj@m~0z+VC@|2J$u7R7E(|r77MzNGi+k1f_-{FyGCRy^WOs2 zP7fT|Z^D6-Agk4`zcVjoDkv{Vl?v#Bc^Rxhc;rIaOL72@ENqhv=z?{(kXg8*i+aCA zONW4U!8y{F2QO zcaj~QxWcL@#g;eTg5fNNqzpU;KRe95@Ea1d^0)^3m&3`X1p|bc_MAi7-3$Aw+{GHj zhE2MqbCMk>1*4QHx0UX8Xi`mXDaT1H*O!Bm-J&0u=V{bl5&?wdZft>jKUCh_8jfN@+a%hL2U$1U?0rvVc8VAH9zE^nY?JD=Spz&k0 zi5H(o>+lgR_*6EyJH}v%T>%71HqGGz-Jb}KH}Qrnmx||P=M}=dxGiTWzjbv{3l&{a z5Q#el**!y;c`4kt6jS-qbw@pAWmq^enYeL#>2M56c?#jD;CYwKj+uLvgUbY7G_H`G z^PaRR0qiIfrBwD0}}>WVwC}^)&BZ z-;Y9_0+k->IWHlE zU2jTwgX9PCTlYuiM-BVW!?GE$Q$GFcAo_2yWp>_w3?hZfzu`DER_l<$*J|V}QwC~l zk)&CT#_3Wjzkyc7OZA#97&dyst|2UQ6syqM^CV6`l4aBFY$C{^Y!XzHtv$ZxhmMxV z8lr#)95^fGnqidIS~b4gK7i8x=vO;;T)zF{$SqMQ)he`{U7v~hhXt6@j+yxmkkT9m z;DPPI>r=@g@@MKzK(W!^JG9rMw+k%S8ztH5U<2fO{)i1OCEbIu2Mb_pxrWfL&%G~j z0MFOw3S^u!25J%T%C7)(%#IdT8rv1JQTY`IMhh%MubrvA6s^5p-CEepnA?$^*} zyvBDszZVK?aDAe*Kgso20J&bq778HOyEU%$nfja34wCCd0&=~Yyl?Qy+kM3a>WChr z>18&G!!@deYy)7qp5c>R59Fk|d~XNH^$bu3146l9e;!tkI)f(k1?0iEz!w69xE9+67O2WjI?>=WWbBCmU}*_52oG~-nVl#6@|m!+_=w^>4Z&_e0yWjWSV z@5>8(!-LC{nhNmpuIckknSv5A_g$vs`Osmo2&-(_%-nnsHLg82KFS6j`PG=(M4_MF zi6ewJ=0Hn(8Pr!-Oi)PYiXu@&lDJLZLcfK#^DA&i4vNC>`S6`q&ZFAY85KJ&>ydLk zCU9pIx+-uaZ}3@fXc@Oi0l}gdD!=eE&?|ID)r1!0QL>EQfZb2b|^h>cG%>DYUA1RaN}^PH}&II@-z(4HFx< zg9F=~#0`UNEb!ZB5V%p&hiORgEGG-siO*$e(9QF~4 zj@WsNGT>*zywrM@%b#$dyJ7L4aG=2arb$$-Cc$+24S+~q1R;_MzZlBBuLW|*o`-Vi z%~jNBVU%pnU23laNd7W<9{!cO$)hTM+l232GMBX@Fa*L(;Qkd3?9hEu3IDHfpt~{s zV`=AXszysiC95ru&u0&clSPow6HN#}Bo70KVJyGR=nL`Dd zISa+q>WG$3iNMS`Z2%ppz*ULn7QJ2IKt;S4ZynEuQh z(1Ge{=70}Wyx;?sD3ggT{}+p=eBjaoC?CkO8#?fN!=(0C3-p$sLqzi8%`df2i`lRY z3JH_V>~a0bc}8&r$33H;VzhN!W{ZeP(#J&BXv{fz3OrA#p0t*O86xW+8;TkEiexg0n*Ka@( zz+opS>0+$Sd(eCdBPN$2$@7&AyOM*QEbJx7~BY}M7DLL z+)zrKr(}Pp{UkmKFIW^OfrGz^qNVQHxMV`J8=kM$NEu5>gJ*wp!M`CcznEb$rf#`H zx$}&~KYjV+^833Rb)&^-fxKz#p8T|4&e+0LO0&fTzwHgdEXYt9Cf9l4P$@utyt8=% zrw1FbrQ5pq`6($C~E4>z<(Og|ftRpZXQQq1-k*Zp&<60=eP z9z5-afs;p_Bx9{&Q{Yn-vGKc>FLV<-P7mk0yFJqaDlUP}tUIS4%-EtQ5Rm>LD=>gf z^3O*>KlJUJ=K|29)eLY6TeVKD5`=NRT$#Us%6Kfd3s4!SzS`^(*#;`(i~yAMsA)n3 z@B4ShDJM%GZZ#Aa;K73wNZR(%_uEFe@~e(H^{xAy{Jo69T!qjkYP3NKyr*rDUmgcf!O_ zS4bv&?UlzBOCx-lJ-56>JTEU|D@k;heBA85`ZiBt@8eDz6W${Tdg7IriQLbiS$$(h zIwl&LrsX?6<)sVPew_&5D)^1x3icuyKi{4scW+}iD!G^kyh?x>e?Us(+Scve{=?|`$$2IJ z3wDG=lB`L|l|7>3^_z=btT$rMoRaU5#O0sij|#Q6vqQoo`8;z0ktv2hzFRqb^m#CP zTl~Rk7bT2#d00ghfiHQ*i~jhiX|4JdxDRR(=OTs;^g%mdN&stl>89YNA?i~fRA9eE zP-G=v<9|M^UZ#%@-Pt8fZyDX?N_d#rbP6T^1{Xr-|0;yeXVqlbs+B5BMa8~GaOT*k z(DzN>1vMbnSS-OF2>qK2VLu`zWLD(I*M(jnZMk54oUA$U%0Ui9&Q{!WF)^AWyzp3f zM}DPaRxx=Qu!||H?6TaN19Z+4;z37o9~K+YI3R~Zt=OgT{>OrDZv3#G_JzeVuw4dm z{Ze*!iT}{Fq-~-WgbWxACiMA!Ci0~j+Rmk>&*sbWF>RRg%c%cd2(AK+~)g*Yv_3HxnV~7MWWk z74oyQ>R1Kn%c{)eLrNAKm&T#(%8$-ykXLV}}C-N_8<(apCK9j5N*smg0p($tUSeKL|QayLCxHjgE z$>NtiRV~qR6rt0YwqK!;S?%_ENejC*g+apzlgpmP!d)<|0QJ!Q+?+bc=;s2==S;3S zGshIpL;0{0H2oINfW_PzCAFg~*@5TyVspbE76YR1dBwDiJC{T6lns1j@%;6X1r$TO zpBv6V*|y=?vdaV9V^G%tcFt6C)AVqX>&CL3z%Fx8!YnT1dvGBSNPe}P)8yWipv(8O zj93>A|HJJ*RCFH7;+Nm1Jv5wcC&L}c*S(7n0~aMZ490?8^sFD(oV*|+j>X#0)w!a2 zXw&0;+#aFQ)9&dkcA$`m<9a8;Oo8Qc!TUJWIUc22;2iF<^q9|ED>e}_5XGe$ea^Sbp z>_91t7!_K*dLa(?c)HZDN7wUF9088eQGS6uwA8QAM{7e82x81|F9y(0KC*4l@N)=7 zgH^*exx{TAxxj82RKI%KEpL7YLV%e-2+;TYU5C@8z&1nL2n8&eP{pfBpy_$3@Y8S~ zL#}_XIof*s9#|~{O;0NB7@Jb6(QkSAd#x8z!N_LHq`zd0H{Rq9+;al7i)w&&u|A^- zH%cOHyOb*<=YinN1G;Rnf--6%(O3U>8$Ah> z0lWma(W${qQJ{_f`rnzN17!t`=TA)0#!`THfkilbmT=rLTjuulK$3Q{2ScV(bv$Df z6XUK4Jc9gz5k!2bIGyck0gND=^~w&f6S2L6}LM7Zov~%j~G(vG08+B0WAmjVG`vse5J^#R~$GP=wc=lVm;O0=eV1Mt0 zU!Tq)t;~(kHlxd!vMcl+g065f%>W^|F1f>ZWW3#DrbvX(A^A-g{8J}{P%CKM%p3l= zDSQM&;R`Hl=F4!RAWOx>6;3Vir3K^y;e|hSa}7jtc!<#GD$5iD%$-LFr=6(Ie;Y)6 z|22vHkL5C8qT&5382D)e7GDq_uz*@NIm)88k8NR+`JDk0P{k+>#da@P31n_dXa$)X z0MNC5;Bcw@Cyea)^^~declZ1n-c_8?<-zfj4$GsGnPh96re4VZ#xz4T2&_4)Qv>xtlc6fz=(6lbUJECC^2dfi(Q$2XM_t#* zb&!qxyixK-Dw;qKQC%t16#G*I{Yn)Z`Q@A^k7p8q8!JB9XcYh0XcR#<8ry?)wI>_R z|7uvhb?FGPwin`dGfzd=1ud9u2%Z+qJo=yo^X`bF(53PoK6%M;B10CptdU5~Jjg3Xm+(EHJtb3% z{8XEFz?rKEF~lw_8+2lSf*XTQ?Ak8lfQ?2Tti!68U#I_j4owUZ=*t4w_49C`?_m7Y zcbHZHW7kCyj8Ti3ZGq(8zU3hl0VWsfUso<7l;VysZktgMb{zr0t}k`Y0@(F!0K4Ao z+c#?mxP{@rf;;Cgxu2vu|IR+Z&5HSDtR+3jkpy;^FaBuTF@c!AJ2V?jMn zdnbR^8^2Y!b=|?Xy6mkpK?Q7FP%mp>U9yg9@hoPMO}4Pf1=$#hHf84lv?zu%f8)bq zPNVWBEo?x&pe{3HK10zRbK*7>#h$e|W?F`tP;4n=w$ve?1eEeRCYQ7QUAo0Vq7z7k z#rOHgFn?C`W~V9fcM-n(scZ;BDBYAIm~ig9gheRWj#EStMk>Npu z;jm4pA!kH)4(mLotzL}R>;~EM?7!LXy3#qK0@}^-V@D~a{pdmyLOO=oHEyeHUXiq$ zV(4x5GUxp?2cAC6kdUW?fs5uCP5qQF^)tVHJDHV@SH8`4Cm)TBcZNJ-X6Y}2?E&n=n{$mWVREk~ud7?((YuCFEoJkh&o*BHVL=e< zOUw~}Yx2V`D2{CSn6(nP^uZ)h?vHsUWjdxqowv1jO%-IGN#1&pIr>h#1Ii0Z0Lr3# zSBc^+L{6AWO4Ox5kHC?g8*^76FX)I`lZZ-rxc_>2-qUN<0bZVFh8kz>-cdxmi zquLhp^@&-$V6?`Y+10e!i7)&a?Tev}qB4(prKXR*KvDV66IOF{@LbX7DHhw-z9ij+sS^lMzaO$GK91 zZU><*2J4MK#ENJf9?asK6zLy*R2`I5%wEtOu0JTuQ`308RxYNBP%rnKdeovcGX!e?dS`j;{~o)_-%Z_~IR`+6(X z4qX-tc_CCOpXnKI(f|f58hSk_E?l)0y?v(f!d7pEGhWsg4Lyo&7K8aRDgHmu_=b-K z?p~Oy7N$FF(qN1fkqs$AQ;kwo=zP2LR`8ihgkx!zRRmyQlcMPMTZ9YixCzIP&7vkd{opDk zk{$nb9{tDY@;@=9ijIJe4?K^ebtp^m(66hyjv#%JJRD@uK73GOTar@!eMfVNKT7IL zs-TwBMb2TTNZrrZ$-m!PGjbBA4RJkR@|!QPoC}Kdw{#N$?QY){+1S9)6wN z4C8ll4ajtKo{(ItY_D{8y&Ygj@Oc&97|*uB!p}*7Y|`*pbHa`Fm*D|QGovS_^$hjS zY_khNhPd>plBK4~u+5V8oC1+d@RO7(%!`Xlg^SEl45|Jf3~}<~7p2y|6&AHr+z~dc zROjC)^M{2Rso+gsY=jxDBgkIM*rbC<)+i)anrsktk@uO84AKM#mFD)n4iq zhP`2C+y%nR=t7E86Dgey`>it^;%Z{ln!+~GB^?ZB>a}BEMjrRYE)D;Gm3-l~{d#?) zKqHH+y`WAgRt0Eefe&8(+3(tvOt*996Qq>hn`*j;5NBoA+6uiQ5zvi}8M46eeRVKG z^NOWJ`HT?A8J5c+`kp$74#6C1Y*8`FOib1Eu2Ksh%5y_nh&C`pqy`gYLIXL&w!@_B z(e*S7mJzQq%Q?|_qnDv5K+dp#5Xc#N^n$WJ_1jzYGS-kW^$Qb@m)vI!_bH45?r}|N z_H%DggMh40A&~XC2O3!bSRH6&73xxE`4s$^|1{khTfZ!rU8b%~=I!Ajt||HESLsdl zwd{4x_~5`iv!E*0biycYVNw1{$`~L9-HM!aX&bW-puwB_t?y~&ku1pt)py`g1#R+b zwT0%;oM-jBlykcq*>JbIF6ZH}!Vy5=`6x8glPT$xKDt%LOI=0Z&aPb%QHfCx=lOCU z)%XXkMR7_vex{rxVCMUzVDRG8HyHnCbtvtElC>0jd7|=1E{`@zUJCshQd;dhM(oK=Ztglzj_ADgXu<;@BGzII`Cj+KNMio9D1Hu#G8UooSv?5Q}XfW!awCPvn26F<@S2UE~-if#XZ#plM@7+ zt>a$S=8CTFbp(SU^M35CCr~K-jW}VM5gbMnJSBe~|A$5Gcl`)PN-advCnoaZe7*4b z3>!v-E1?9u=JBqplQ~0hrf|TM=&4|&8+F4F;}!f2}CC~1wiIF zP)o$Iv*sZT7GhEcpr=1;drSK!>u9ERL`Vu>Z(;?WYINik&-vQv2gx0)i_h>-9#QZi zzEM|SytA}lWbU3=zQwR_A~Ac5N^kVF#IIL85kt5ir7;M#AuBj=Gc0nrQ`vG&pO|Qj z(YsoBpd$G>Uq+PI!v&TmXV~h$PNe@De*T9LYdH3=zSelWc0UTc8+$zT(0G-DEGm^v zvZCL~aA!6n>xvee{y+#hEVOEVM*qud57FuU3}7IMeTF>ARv)Ysz75Il#5<1j{rjWr zmsJrer;Ea&s);E6CfY#L&~fS+i3Wkt0te{)zKRbSa4sbbV`cen#pF&*&nq1PuF}Z5 zCrGyi%Qd5h5X}O4aOKZ-h|G8ED%Z)xWrQBs4k2a>R%im-p{IFd6KY(6Q3{X>?Njx6 zg(Q>Gb~w)j4a~W{6@~h`(dXuRbIZWv$ixRwwd$B?i7~Ud1Hr?B29k77&=(nK8hsIl z^=4zd>wW!a8m;}>&j3xMHJYbs#0Z*33IFGd>=^t-#wXrGFA*yQzhUQ$%b^ELe?G1F zy!Cvm?p{UM!f=B@@R#0@IV2NNy9!gEIRdXX-_XvDP-_Dh2zs#qf?n`7XjBl`N}vqe z{s|t^uZ|Oe*gS1A+rTH8ni_sNY@Jd1B;zjobDU1{aA_%BW>g?!F49AWqDs(f z-j-SkN`dTBq9#>HO(<%bj&KPoW*xxnFFAJbT%mHK`+>F z2x*`f3MU!J%{{|H5AKE1K~bT9RJq^GuDgT5i1n%yUPJ+6^McUCW#8q{3ojw5;L_<07iyGI%;;{Wg`*%pb08w$sDU@g;d?lNFbDX@F zzyrG&2tUiVKynhFq8Zg*wvKfQzvWEt)Q7b&(du;B*@}wwFq_(0cfxV!XU#xAZD$qk znMI1bUN1tC>6r;-^!5IRvF7#-V^A^d`nyHgeCg-+Fo@kTqo~~6t%vX#jU=b`jU+kU zw|DCDKgmZQuNyWu0!>)$pABA%eCiI%c@=FGlX9CLb$v0~dDWS2_irkoz-A*wh2y3Pp;8MtHQK@iW@3Z9i%ByjPx$Oth;C*7AI>B^dS0>7FCT=$o$d~ zpkP>*g_tF^bpwuKlh;~k`zy@hA?w&O(kmbeMmQhBBokqb_y-lc=lg}Gjb+`0smaWD z1rIOV%=Mx;J9NM!s2V790mX}#zzF)hz5o<2mR!zyWUioFzP?Oa+uxI1I@A5UwG6;g z8^Ewss;QzDbpA`t+DtxcfAX+S0xoYk4>%3|$ zZ-hdu(0*=0Q~okF@pY5#tVJxxuHFjo1vI^%}57rg@iauj|x8^C5Yu7jMt*Z zQ(95deM4W05@=M9Ld*F+c&F^*BX{L3%y?J&53e$Uo^;FRtr9_@;vkbR19Y1hmH`^B zbJ^;&suD=ydP7b65vpI$q*)$eUIV1mDfr(4Ger*TxbVQ0%mlev+&pP3Ro2nzW6L`u zQ1(!)d(@yC3CJGCfhZUdZ1Rh%^MaOs@U3df9~m5|`a&XBIY;{q*%~U-29~z4dOwSn1Z3Ju zN$30rgS22ue7cgy`5tWS{E}n2Uvs6vf0bi(7SI)WF%_9I#U^6!znm(nFh!)@TlF}! zO56RMBk4Z5S^7)aK=FrG*@SEH&s@K6(`P(^-`(T8HP|RNgjU>|+zyMVDp%P}o4-qU z&G5*YdG)`lWr`l7do-S`Lo+mc!HK%UxZhRh@@~B=h7B?Ddtp>?Z6Ij~2}PRe@Ajr% zLbj7D))>Yk^36xIWscjA5I>w3yf{P#7PPfd2S=0pQ`Z6@-N!QV{&hh8r(m=I z*Z)~vV{w3#d=EkRt+;HMBOoImg^Lt1?Wj`_6kR|zBb$w9qDp+ILeM2=hF8HmYN}_X9S2PYQF_~ZyGKL4k{d>UAle; zXwJBx{m~z>1QMwX@|+1DS-+Pk2Wq#=&jAT;Z?>6=*P9KZU=>!1d=mEXwx`RQ4zNBF zm6@mhy8fHIo~-cM=T3^x*~K0{Ie%$wmY=jXrGKArpOYMo0|E2=(tcZ@1pq ziO$Y!SGTk^;yfElX-*~X3?kIIOxA4kkK!H< zFeY0-R>G0cqM+y{DWkxOwE3}4p>}g}%$s68Hz?p(XaI|gQ$j%EVlsUlPe5E8p1+;B z6;7+pSa$@U{&tXLT(%&Oj>AHR0nlIpw=gS z+zu!)-e0ZOL4yf!V_7B5uCNU~#qamFDKVL06!7f4Z_x2wsI1qTRT)mWlVbKa9MJHn z*TTJb^mm^QoJMBp^yi#uSZWPTl`PYgwY5KsGn}_5KMkw)9^Gm_5tWp~rO&(+S0LX@ zeyz{thfyZ>>FcY_o-yn0Iuew6q@}l!@sXj)mC-p5 zoJFwS3T`jnA~W~9_Hoy3+vh9uwHjM-EMJJmyav;#4Sw?_Ka zSRdUY9)HA}5ZF&^agFU97O)hn8hiB&_b6+OQT_)*VQ&6&&a=`8)ye><;`tP~fBlR9 zkEvwde{@0>fMg(c$1boqPNP}tfx*8<&-qh@82H7Xx)rba7_heaQoX@E?iE$nGg;Xj z=??!dbXM0KP2D46e9-Y?LO(l3zht}kix`MGhORwyb?YVBx%BRkw=(%}aNGTQY?K_@`~cUq2*BSU@_ zfFNSxH~a|R&b67rHMj}!zlfz4{IfY=V(BdAh8@tyY84xon3Ita8~ZD-Zr!#Th5G7TOucR_NAT$-0Z|!&fF5Uk|A4nvE;T&Aw6(@<5|Bz($!H zkf}}P&nNEm;@7p&3e*69x`2jrgf~c2#*r$lrEIu}5LP?u7?er|-Xygcg&<_<3a~K_ zF-rlxN%Tx?bvy}I%D`_DnZh9)eHCipuO4e$HfM}ZlqN=_%686N+2DDs|BM$$Ea+k$ z_H;4#XqN<#rC>t@_fG&>>S3T9tC37QwGgEocu<@GAWJ=loqhVgy>`V_g8yojWAD!3 zM0nMQ3|Kh1x9*qA{8)0!o&q~-1DL}HW3`skn$43hb7x2fz9q~zZmhr1*)7cTczyr? z0o|4~eg|~U&1mZhSpE7~4bw?%Ab`S#c3S*==Du-QVafPGLzo9f@Le5lRQrfT!%Fq9 zF59(bZ_e?y%J?z_4a8!Ryy01d&{7xWjTqCeo`h2RUr3sTEt;xdzY&KDcBLvOQKT*# zo=@P{Q8v)Flw2}$(Org8nD-W_nOH`T8cFla32X)olV?W{o;&A}vX~_0iS$#D&rxo^ zbQK92!V14fB!^rb^(DWk3~g{ni4>QoW%p-ihXmRXabc_LE$%3>;*qq{0UHUvr|?g0 z2z#S0s@tAO2QyGwS>36ic{#J^kfRSk+V}+h;1EHKos!}20sVyg0%25sT*SFljNg~O z!{?no8+C%l`yQU8&hw6{4qoosYF(cCQAHRs_>(DQe6qF7tv}tRhzvum&T6nCIg&p) zD+Q>ky1?C4#F_rzem6z3y~f&zBMbzd?-Lmxx@C4=3I*sMGOmm zz}95WSINl_l1uX zal;`i9>3GZG1sQtMu7s^D56baWX$pc*QWPflzQj?a7XVq8ddM_`3csJzb?h8fH%U2 zSzaDgj>$kk=kOyC&_R|VCEM3rLugR4Mo!{)M23vJCui%%O6vY~cf^IH%C-KT=N&C^ zT2ic%J!0chswY3dvY-a$jAX#iph16N&VcF_hhc=UWYpR1kAi z$Z?kT4*~EHHZck)e!e50z_p@K9gRx5{6SN=XXB<%ip56oyzOn6D3Ui}_lRs9RahEx z_rN|-{Cu3KIE<#DW*m?m1TTZf1i;JSMH=h=TeW;2^y8fvdh6#2jV0IuQlp5zSSwYO z)9`6G3q{n%h?a_&Wi|?@HL4qIE}-IPYw>H~B>s)YvekLQy}lpRI@jr~2DZTsPut+w z`h{PAZG#EGt#e!Pus8nDi&}V)OaZFWQ~HHbgykj&DQEz6^fv$<9pnH$HBVU8-Ky^$ zJa`qC15Rw~x41>5`B+nv(;YlaI9JIU6DugW28RuIRjFH#CR=Wmh|-8&XBvd{`Lnr> zJ8rz*<4ttUkL8!A9=;6g2zQ0k=T9Y$mkrcF#FX+Qer~h#au8JU6!lVEk*IpW{2vLAJU)>QG@wU}EEE#O{#Fx=76j9iTE)==z zqt_pqE{Tn!IV;}by_1T)$y-4=>3KmyUa^7H7|kaB>I}B|li0nA1;zYs;CW1N}TCP{A+gy_T#bQX?0NJML1-|GkWb)IyTNuhG~fL-HsB_H?!xQb z(uFI_sV198f3_*LM&6qWY+M4CyU05|`2F8Enrz?Lay+=<2i(Iv^*qC(#*QvxW}NsR zPtEQ5^%d0zcF#U5;pUmQrtdbcrm%Sf9&?ymExXIYL=;BOQWo6~)iS$x0Z z#eD3vcnloGH|V#wo#_bTWPBJ)9qm59CG&Yycdeik^2r4B#~|)#D!?6W zvQcs+@y=!vOz$WpE4%Zu7b6}G0Ff>_q|0(~m~e5z3X7r7v9xT3a&z;GoeV)@Uohvm zBNOfOwB%3W?Mx;yvQV~=2xQ^={12FI0O?}4JIq>o*L~-B{c2rP!D#<4(ggt+JNg?H zQx?T#8H#BE@qMZdUb8*IC-NiEuq0xi#xDl%K3akX!=4Boda0&zfK-xB)m z3d35{2tIQoD?F$EdGtVQ)ie{75eU%riK7kMVD@t+DVqffo9|f7i=A}Ub>WUHLF~0T zxwC7HHWE#{54^8ylhvP(TY565pilTJZ(61{nnbv6*=Jhth^}nQ%~lFbwG@l}^67;9 z@-yq@r`+kI0s(zHH2ukjJ*x7U-HsowgZj;bTLWA_-`D3$Tz%_pu?-dpj_5YwO9}DL zU(&)mh=h#KEsgPCsw1JbCoXGd_)Wv|*|(pwidHaPKeWn1kCnxwdomZzU=DE3^gzHm+E13+RnCxeCy<44Jp^ynmiENRp>w=er zazWTAaz63Nz6yx?oU8z%OL>Ky;YWSDqr1}MxWIE*#`zQFtY8T*KP9q0&8d|QhMSt! zFR7m_y0t4>jyD*;JsiCZfYODKIuofI&|bEQ!hqL>*dU;C%7}ipI;!2a{`OI~VuOU> zSB44PLqG*4nbx+1wsAhAG3SypYmDGIq53IC^!fcq3>>ojG&0(UxzhP?L_NBu0yy>N z)RK4{u<)U-lt}uWFkzL!nn(B}gXVC6$p9|l_eI}Ed_)BT=e{^I`mS|YDTdF-7r94S zTuJJ?B4f~L`#gph?Li;B*d-i(vseZnjP(r{F>sZ_Rq~{7Y-D^u7+pcE(ivyMJrri3 zi{K*s!i6=wT#RN)cdg>VdE+^mtPFwk1*$fJ!=qle6V;MY^!Eu{EmD)hzs{Tgm_X+G zKN%b>4rJhYa|TCUTTB!wS2d}bc@BLiuHszt}0mKXk?gaVz6C6Wr9=T-$;nMt~Lm8M7&DV)alkj zSgjo#MZG55-x6 zX<6j@O9(82F3-bjL4iMq^bkMXlyfs)0}WX?RjG=UE89y&P~vY*1DyC111J81&ZPX+ zf!;$)M@!l4k8=HYUB}?)@e7F_dWBdhXoLpns5EAzJ_`jvgats=|LK0n1fc5rAgH?S++g}_xilZyR~wQRAAY}oyK_PD34pt$!bdtChTvscRKX6euMfUdEqcXNJct(!gt`6-0l zaVn$Ic3TY!rQfXi3eSE!#Mjt+#5Z$RV5e^CdpcINK9`SOaw|}-+>K1L@XRq*PLNRiy}qRXM2Rqb|MCD$~e+QHxGN^0pwqThc6$S}V=0X3gb~|i2@y+Ph(OE{<=OuR5n8<2|VZ}U1vr;|eS{=?sOwXFj3K!!B z8^te)0*kj}!AJLqgO5PdvD+2CIfsB@0w0aNPQ$M8ru))EHv)^@W$K)n9kL?`vgvXZ z<7@KHH2n9O6}Gh!d@)(7Z%yBPJJS4x2oVIoIf)P=Omx6 zsnpQQ?oP#&{q^W#GKyo}G&=5nnJ6TpQ%cWwffIDL?#3T9--_F0X<`=w0ds)bxb$DZ z96C^`0nGws@NggmFP7g);9-GE4DFro7y}b0$SL!uHcphdATSGx62E$?je9r%`YM2z zGyCLf82?S4kPpDRu)QOoG@cBepiYC?QE7pTU$C`3UEPl%25dYkfSvw@8}5c#7mzjB z0sbnDij+0a{jiyYH(vua7`j0z8Ya9v%a6Jve3y;48qepiW-ZDGOlL#Gv;P+CQ42T( zQ7>RJ51Q-c{2U~wIb@TXI^#Nhe;U!aTn#v7gn-((cRa``QxPhGI=Kc~(6pa-@Dn90 zQU03H8DX&kQZ$G_ipFwf{;4*ux>!6Urv-40EyD8mPFkqGk*9)dU^L!7<4+Z7v*S2_nah*iWAh@;ExdB5BVD6yw%ofsJa<`$fk)~v zH#v~szR)9sW1@|>$w8#4?ZCv?QMhl>Tc*^!bzH&oM@l=T&o{b=ENY3Jc&$w}lnHKs z;}+AkM$ar|BtBfl*S5=LKp@Kn6F}%7@&|{?>*l&t8GK-x?Qfxi7)q5QSwARJ|2lV5 z_+SLo$z!d3qu$zVnis$(O756_t=P6;a)r00bUErxw}7ab0fCKgt+YD8U}GP{!&*98 z@0W=tK?>y19hfDZG=zJkj1bS$+wM%8p!4P<)~G<5JyOmfY#y1%x3rG$Xsz2C%(Q@R z15|p>W`g59?aqVpP{FvYv*esIFI@g*>6Bv#W(Nptd<98!N=qNXhV~6WVtG-wBa!AZ zF^8jVU`%l=xC;j}c|n^+%5Cf`lLg|&<>bPhz)!}SaJQzwzoZ-#(I8ZXX&(`&G0uLb!@hw67pYhR*z{JOQGr=G4+Ct| zaXA<_qB4{(y&t%GE%1qNyjinQaO%UQg&R?1{OG7RdRVA8er!{;e(oT^9QGlNm{CTItAa`_o*)@;ey1E`8E#G0XXr=2k=xv>*}r;wCD2YB*8kA=XbVlkl136Q#k z?r(*jj@1ov1i&$<*v$93rD5*4Y@7ay&z2)aF`Iyw(z-l6r}4e`kxPP7w|bx1`TQ?c z^(@*E&|+9%=(%Wk9m{8D-7K?CJ&vm9eV}X5FPAl(z3KwM?Md_XyA+-KkHROnr=|#~ z%W0giU+c#>m-Ppdvp;lTI6Zyw@eaeyD9r$^wZ<3#R&a>P{rP%wRV64ADw%7Ll9Ka8 zaK;6A6{JNRL%!pqr9l4({s>=v?gu$+DKDq^H6ub0>;qk=C^*dt8jO zUjv)Lh}`1+@GF2Id5QR$pOi@uorz)l6pjBt0?3No9>0FlNmS zxecU=HIjo@s$gvmH8>BGHu}B5i5VR}ATblaFpdZ$W)hzgGgDwr;8}r;1?0!q03>IB z57c7N8J4>Wul=^eoQ7T!Cr-34`5hbB4FfF(U^lE$8BGSniEU?ptVNaYYpcXvaTa&t zqzJFMOZ)3E8%z#eT}3{x__{Ogon8{7!OOryv{GT-A!f&IpFv{o*q5@xS;2{P&}v`# znR}vKYNjG)H6%l_az*a{G4_^0U2pCCwzPCgcO%{1-6h@KDV@^Y9RgC4(p}OeA>AO2 zq;&gyzPRuB-@pCL>=!zS41+JcX03Id=W)ERUMRyIYBZ>5`8|i_dLqSoO4DZ=ep|u8 zR&A|ZSqVG$I+R>*DZjQxXPVpBNT586lwx@qzv_FXnhGh&w^-*B*?FA11rd zmnPYfz)3Q`0@Og1aN9&5_DiJsPd0pzDr_Wx2$)YsY_itLFWJRz9~@P9N}_9$nO`s_ z%oHoGp?4{&9irpxEIp@}mwM1Y!X4$|N=>IcmS%$5hUf>5I3u7@Mals~TS&+BgdV>@ zVAG$<-^1w-Zt+t#KiR`MzaydFk;nlv#BW<8eWRV=S1r93yEsUP*Ba&^q<$~f2`s9K zyEOUZE@E!;@fcg3V(jCYtT?S7UAJ);^Qf;Re^8O(VHBjFNTdzUx$ER6$JTfkn-A=>z*Ug$h%6)&9vdgHi^S zn|ETU0QsYZDdOE0|8L;Mc3XZ?4c|SLZW=46ZbPlUp8UW}HbffL(5`(M{Kqvsfe5zUMX=U6 z3|duv1PTs_fJP>$j&gB3bX8jY54G#rvj#-%qQ23vVIKZC!rH42S@{MP6rj;#NTlbA zzy=+LC`P73oXwtp+csSF$oa_c zLsK;B>&k60*=B?uxS|sxoO^f-{ZcL$Q39b$&3uJcUu?rU#L^AiS)bdqzsUra<5(c^&DR9R^ zWrLmI&5RMc%kE3Y00n4YX@fZL7q_^E$?$qYxevAR8{Pq?81J z>y}3V#o}t(qY<>M^7QKK|JSmL9#~dI0{Iz$pabM*%+yJ9EDG=ETfY-URpF{J#F;Ek zuSd$Pol+Wm+k3=Purb14NiUHX?Ita!$=rlhrdrj>UJKv{7!eFMdausEE%LNQkH2n> zMBdDw{OR%?7tfb$*{^2q+Gf4pbCa$;Y*J#YJ!`g;Qh`6vm!G{GvuMYdhv+8)qkL5R zwBh8&#ZXm{=W4@OmE`)F6nMfGQ?yNA!h>IkBzW6-A+)`pJ3>n-Nj@)D1ww}g=6V)? z0*d7_9pt#g`ovq-H-EsTL~;=AX~IPJi|eWOPKcnyjN$+X;1)i2orKX%v;T!C^*wk< zvFDe5PeAGp0UJ$gqf3Y*u@?I3NMGSr*sqvZTT6(Y0Rr1Mn_*{&`HmqDDE( zJ_Xsn$m`U&mlQg5d|x>~$X7Ri<5aM5a8Gt;lhZ$$J?UvK`OYuLxlJotu`bQ|D*9^0 z`<+yXU)r6lO3k*JRpP^bXjsK1!~rz-F!q3Vhg0-ly60dS4u;v+M%jT8qyjWMm!{r)0ga%|JuNz=HEE8L#tfm@ zYqLJ#n{&B_hK|^jc>MAAZZR&^^>X32!i7OqiLve8{fY_UvcUz}ZA4j1WoC8~0t=jI z@s<1%0;Y5oiO9NSM1&qA0v;*8*(6@+zSaE?i(&95tkrSD1{w^;hM!KI7H(1GK=_;; zVuZA}osZ|}gSUy!e>;5sVR)G1e}>QhW0z4z1{_vjISiYOS`c~Jq}xW_7OedJ3kd=~=K$FHoiiU~Tm@2Z(=nAk-xwxL6-|AAfW=fmgM0>1XFzx` z5*5lvm82g`TfOkrsQ;XKjv+UT5`_G5?$bQLExiZ0rSqV2`2oHb`yt@=ECsne)#WbO z&-rxbEDt~4le`ku%tUTuF>nMOhs6In4yh`_?(zgl#vFwh z@wiN!y5tH3RXPzU2%Uk`kQRtsioAv3q!oDl_N7}6oQ5bQ-vNFZV1Z>(z76urP=fGX zHEZ)FCs3>Hs8I4W=a_1MG!Ms!jet;+9JhPN^GFpfIS@xGke!}}@LKwe6u+)Q9EYep zs{z?m>RYuiAkFj00;GACT$lWX(mD#U<>3mBfHV)t568R*<%jXxK-6Slf3Y+VPz`2(l!NeaUmG)Fs73F znAwOYJ-&X^pUwNd=Pp=?N8DWn9c?muOw&T%QDTN6I^-P(P_t6et0VoYX~a-AmK zA9C$fs)WY`votYrNT9aMW>X>}w`&2M8Gz|rMc@lGdDu#o)-DMnPm`RkP8X#XFBS3E zYmy(|V!jS@pzbuY-e%zRhw&iX{K#Z+^c> zc7H3|y;$>R@rxg!nRGTUvII?y3XT45tAT?+%-uqxO7UymWcBh{r)Pst3UQOplJo|iQ^4;kNk(G zEm}HrSN+$Ka-aMDM02jyO7MK)tQH8Ly=pm5DiG;zENp7luDHKaN6*2*OW5!O#~nu5 zv$wWP&mB*sJ<}16;gm|~NVTl^!ON+u&9oEMM4VuO&S!l)JI>xMr*Jpfs<}hzNbHxB zP6VJwWd}Lyy;6KvrH?tMKsrb8PdY~_DP6&A+xJg8hj>*|_Q6Qw+6F(~`Wq;n)6b5{ zjlZO=$BEO3hGo822#7`P7&7YZ$zfJf!M%-IeArUPdxV*D?d zPVwMYqHrq4ptXP@cWVxXe@W2b;RxBOD&wmc%P^NVL_(7iA-aC3%90o+@0w|chYn!<+QC0k_lrk?%nEgs z*jn;DKc*$aM_y9FN4Jhv1k=kpou|=n%=!i+_QOILn1=UJfFz;E_V2G`C77f||t@$E$oi6Oy*T^%S41#eN9I_v6H18|*Xdfpy1o?+*cP=(uYh1-~YNYgUn zsseOfVX7mmScS;VqNH4Z#E;b}O^M6jBRac%-g#{5F>PxYfZaZw1rzOW2Pk~`gie&? zRQEn#<%<#egkd&9a9oHyUmd8xsXoPSi&g>9N?|xW8989p!6_(acJdM!43jp#f6(*( z81=(GSFVKMTyt6o-7#b7l9UT}N~F(&%29>K3Nbr*cKJA!zzR0ol-nJGN(zz8)Xw3~ zg_MhI@-0`uDjb(E7Z}yzr=9n?{>Rf1-(cNoxloDaZ&AMv9~tnxCn6qNeubPRWt!e% z!~f)kma8c4^K>j2&s#G7HP5Ilp%yW?^RH z20pZPF>_{=ur+cq6Eib$Fg0V8GqbmFu_R{U_@9Wdj(i+`6Kcnv##y>9mubzd@&}Ty zL`tN@FuhaqXC!Wz0jOelLoD%+5AA~oISt=?LlT;e;rD~;vyJK^O*_2Q`gfCc$qSX7 zzsDEVDF@B;NWhzY`$A})sYk}f7Zw__#)6yKgMFj|%WZZ|14*&PRf&>e;Q+5B^l1s= zd29{Uxna?U#NEh2o&?!Pj5f@+qlQA*IkSTz93!?8xA0wTWqKvj&q{i!(QFK!!n8%+ zz-SI{`tUKWG0zDtb~yIuLCMH(Yq*hbuQ(nx9*+8Z`N!4*=o1#Bq;ZSYSuhJq-;eXd zr1Y&Z2+RJ^e63Vjrx7&A>}@ld1N;o>d=xi?GfPM8N7vc2L!T7HJ*7&Fj|eEU=2`wQ5O0lxy(Kkz`is;&tV?|rcd-)FWqT48;2L6nb$<3B#QyzR>~#NnRhBYIV$ zN(KkJn9ajX3019-PMvjzEwwdO{hQn3K5P>4M_BT!-=k;sG+@p@I4;13#$qfnUcro# z;X@sceFY=Rqw0}b!H^1uD875OniV-&sFTV;Aq2G&_I5x0j7T9dhsM{QL=T;?4`x5h zkwidfk1qZjW&IdxNMVBP!3CHlt!rk})YWo5V>_yD;x0tIj>Hd$^w;WI+|tdI*k+E2 zOpJLc&2YB(*Tvsph6s5OKhT4BzYZ}n_{#L2%82<$m6D?xVk5ofR@jK+2B9->SGS)S ztf`Ttvtix4FWV64(PFi**pSg zd>ZsMEJKbH2%&KEVjGOWa_L>Bo{~4lpHZ0PTa?LB*D$6 z-$k`tEMkhp&MP(0e3D$I8Rv{LU+ln?BOI-WcQINKZV>D@Dn;ZmBp4dSh-ON-2ODa- z3W*H%>#qS~5k17j!uevT@4p5D9~he(RNC0T6GrP`;2#b6HY5AxQm`N4&h*}PfNy>ie3 zciZQ?>%V=PeeO?Ix57pbi8}ATD*8X4tgbWW@^}6|?0sm0Z4tk}KmR;hKDy^{an<`7 z`}+QTaF8=DjnVJ-6Y{#x@3Z5uQ^Ixe2$OBWb`PgJID>Ym;r>3yHHvYy8%(N}Xu_IR zgD#I>Z3g-s__JyFFhbzk9e(O^1$UN=lE=~}FtUM+WDsn|_K@uNCG$aE2mBn({a*;H zBR8mtuC7Wti#2~>hSNFmNS8A={4D4sn5EjfQT!=R*4!`YD_8>KFDc;-wh4Q z$HU&8S;6P?rm%@Be}T4V&z(99Ub-U07*EQ!`64zvp@x={CYN_r!N|idnKiS7W3_SD zWWJ<3;Xw@&W%Cm)l6`bUSCaP?9RmVMG8qUe^y1`s0zcy(BfP+(yN}*vAst)4x;p#r zSE$I2Hjo5Ewivxze@*6X9aNN2fRz=X3PY-O6+z%;sz|O?Q)9e1YZE&}>Z@Z%+im2r=wXF)<%_Y~pr zXgy1LQp@L$_m<1^cVRtMenw3F$z!)5bd=7aX=D=P{j}&$ZvfPd?NAlTb6py zukEE(uPGXCOS)7YdN-wTbEiV(7%yvlI#nGt3N6nIrbCe!D|#iL5(H!kzdj^gi!i#d z`0AxTv>gzP`i{E)v}?|Y@zUvd=k+P+07#)iHx#W?D^|l7aA!O#bnDsJ`lQsnv2K}0 z_N^zvVYIMRYdQACY&E(Y8?=)iZKfaUjgM^}up1tA_P-#RXr@0eAF!i2Z0katNWuiZ%$J~v^ElQ>XMo4nA@l}e*?6=%rq;bP=OSu} zq7wOlGxs8TiGs1IYU^!2fi%~!(cV=HQojt77L)SK=jNp(wXnSK3;7# zSOI;4-s)DW$IZ8RZmoHl)pp*XVeZSJ_CxU+v+cZv^)YQEUjgu!GoZh;o;NF%$J}}V zo2b@1O1zan(y=Qz(frg_(f>eN#iuN^qg@z;+y z^{D7|>M!K9wL5a_ztMKglX-Pz7d7noe$BehU4eNFnZ4QR2=qM^O!bDcdn`Mp%A}9u zk!dxzjpbJDN@6nC&rQ`?TW5+f5=f}q+i~sVw>WQ$vD8a#LZw)~It~YRC5P^417eLn zUTwNiPAfhi=3PCBoRIZmZ%`}e`;}!qc@7=3!*v ziet|Cl8WsQImx|O-1w|}R!WxiG=srSWNLp^_&M*nSUulh0h?6Slk=-N-0 z`6+nAGZbRj_$<`bKzxbO+ZX6sTNzdjO+w;80X7q{2V~;xY=g!X8NUzCzm*=>xjP3y z1GlyLxskx{3F1%Gb6Mk){bj^-HUHy9w{}-uYJsjng?NXvr#W`WcWonK2l@cr9m!hA zsvhXAuH`N<4<2-+HAl-HVYhSPX1m3g7dj`9)Pss4F?V^?Rik+?`yRt~M@bZ!VE)q{ z=!LG(EoW3&a`xbkFy#fXKLrBpqfNI&w@|l{QTdf&{(*@^%3#AWQV`UGE)KX%FZu&0qldM9`zup$4!KybOFZEP-cbaUs8|K z5$)7p4S$jn1f2gt&x-y*&yoY^S@{?AZ00oxJE6Mj#rJz z@Qg_{RJj%iV!m9K2RGkekH%UG$^n<<#(QtN?`I8dREi9vqIOAcKmu#mt!VSfXvW#@ zes~Q>(VHU2&UIDcM_%SA2b9(Pbq5JYgCe}VXyvqojeTu`ZJSBMUXjBlUjXJfMZN9i zbvu?bX>V!TxN)=!9EL&`Pe1&0L94dLJ4*p@>+m`GBqPe>#+f2`%m8-s-VKH*mxs`J zIVov)tx#p&)KW_F&&yTNhzL;rMj5S*&sl0m+-I+90OEDqK?GmU(3T`I@|ixg|Ncav zL~95?F*$m=AIl|3>d_Peg6@Y1z7%W0hP=VTbA-ny0IA29S15l;J>mw5l&q^T=E51$ zeyQOH>YsVY#dVWxAHBg>(U?E3w4=)Apx;QS{jKa#C^aqGywU*{C&U)(^d@eDg;02F z?_Q1(N3roNFU6nOU~v6&&){RN1XWVSl7VJx5~rNC|NX^Sx+4>G#Gtzge%!O}8Y;BD zB?6;UK>t@V!JN+SupbjZYpJeGPP76mjJEcH(?7YZro2g2uOyK&t{;1ZR)uY+zL&9;ca2F=!?XqCbuT z^vAS7H(*uJIbT8uwd#W+5fgD6-b!j=nPJ4%(Kar{mOt?Tm_De*S@S^PBR+z}jSzc~ zV9~wwMX<=+JI*~n3z$9t$yv-__($caiU_}oemB4J&rS}b2BnEMH+e7k$LP*DA#_)g z>OgOi;JLR1Rt~)~RS24S75pkkHnZ5{{p!EoejaSO&3zDrkr2 znLmLYt21j2uhbO)q-V#U-U)FbCU%YyI&@+gbj2`EY%Yts%@fFH(sQ#NKrGDiFtEUe zxR4DGGgGx&c_|-xpGNVym!x=)dKTy*L}?GF<-1giuCjNp1VGEo%kLO=eb*~1ca=!q zrOoF!x0@!liYixYH~v0e@ZD4zEiFqiQxkfTWqhHD{gB0l9fkYIXfz-2d&oxh6&+h7 zw!9Ysx2-gxYAQSGm(q{k?lL4t0XKME(?yoKPe>Jz?jrU(s0NLACZbFH5=rAbzdm?` z3%L(!QXCq(g%ZelM%gMXw>?1G_MN#+;f_v!>fX%lPQ^5_$5VBHz&Um2CKQIuJ*v9- zt60ud(ra0nrq{9=Pe@@Oijm%AsiY}s%?1ve9!#gp&Fxlw=KpF6&WfYi@=^6Enuo19tL#B zv|(fCRY>nNw_GrD+ZWDzbPoh)UvX!}P39kzaj@?R-;b6)=u%GNrok%iu-rxaI7wa* zrzMD7W$6ysIc1=j>r&b}XPkjCB#}NLH-FnU5LfjE8zo8-iOvjfl}SP2$}GQqoaT(~ zYT^C6;}FX~TOKeo{ZDLkIQGvF`UxYGAf*gHSBDzDB`k53m8+wZPWR&JM-v|8$MUuSBKOYNVGl5WaKEUILZu(ODj#JZO2-oJvgEV>8niv0 z8u=Mkg}bFInaHXoIoovE8n~L7S|Z%tgmfk)BJeeF)3W;~a@x zjv8isY?Tw_k~+56Yu$)~r|4UjvhKEeqX326`2d)PDtbPwHjTIDY3`+*E8Y}6WXq;4 z{bZ5&#Hx47U)9i)H+D5C+D9yn1mOW>(MMUd^p&oIk`jwYvFqz4)}}B#M+ukTn$|** z!F-eiVX*CFvA54I-Qn!E=(O^WY=!KjCV6zIo3hy_ufEenD`mMF)OscF7Y7Z|Mh3)D z6b+YQV;yK^dF`B!Q?e(GhM3Gz4xL(n5zrm`J82?G1h$Nzq4xOU!{sPUD2kZSa-|9+N9IuX@Tltwz)N()&u6`E#x8{KzEMmSXdhZ*lK z@Y`Rt0VNoMI}t|4%X9xcEXP;pY*>4aA8loXgM+xS(x&5+GBnl-Lpw?!#C5XIC zE!6Hs=&FwohQB_Bt%l5nm96*$dD579v{g;st~3mvvLZ^6O1ms~5+>3TCT;u5tm5}D zQv_nbm^->Z`~e{)i5(ZiuMla0NNK6}dCkF@`0u6={rG)Vdo&p*y2FeaSOl@ z_Z@FS2*7+`66gdI8aZi=F>^=aV7byVgb1Y9u$g;!wJ@oWv9I1OLFiO&*h|;>YM8PD zDfZ~+mSvD&aHS7>-CaM77;9bl96j2vHPW$!;WiYQExN;1e=+=|-@9_hFe8S;o>d~R z&j!vLnkjl!b&~aj!5Lme!hj=fO!?^Tuz`um~@ z?zuVV_4>qWj@_4f0J-tqI!X1;B$FZr##kqMY9wF7KhrQcG;9-o=>@AI?cGVSy! z{L9y8fkf$yMH(}1hjJUrEs%1&_U>3;3|8jgKCwdq>0gaKg>d5ZRX~NjyBv?#)W70+ z0SKG1MGTz_p@q~??c$dn;;6lKoFxWLXEBNw2pe*vj6IZ1#S&1GSyZoJbk&FpwAT+0 zECxdOWdH#wnkf^himVn72vOhzAqwy#X%5iI=qPDJoXcEm*{pqr2^1;)>K7KSXZMRm z?@i-($DiI(NsZa~m48AMSN{r8=mH^%F%AfIAVfi6nQspty^#}c3(~)``W0w+wO&j8 z0uhj~3@FO73HQ+6$HHH~&XvH=w2#tILeC(#Q>UAJ$28thlMR1cIh<|+@0lTq205=L zL;spJdFt$Q$F}SHnQqzum?h}W7<)+5twV^iVsc(>16R?cPOxL`J8{Y^swdf64}<~X z2XPgCMqiyFe!HDQ(YPgH-FH~UDxcDSRt%dHQ>ER^ORx6OK9z)OOG1VtDB3+Oe>rAK zkQlca*FO=m()vxCqc!<`a)z~DCue8#y(_vi!!5mo&lKS?+GoeZ%)*Q8PE90uSWcVs zVS}8>oOLkZxCVi918V2Ef^{6OypVU?4HpH=*&MVx2r*VDEe;)(LZCJ{2vV4s68z( zh(PIfb&5nZ3gUF}0H9QZb@gSR)UPmWtzYj7&`=wVZs9x>JHfB?NI@qhP)CL_5>W3( z0j%sePK5KrZ_jl;PjnMR8mB~!yAQd4d}y}orY;2rBw5Elny~gZ$6MmJpWZ4uBGvf8 zq>D{*qjvA(2ej{yWCU`eh8)}+Gv@P6B#YJuv^mG8{2-qC@?}8pDfFox7Udo3$08}h zuC$vkG6pg~vDzp<0d4WpUTP@K;~1^u>_ZwM_Y3y2hM_&{@F9j7BYLfHr zF+r{bjFn+}dR2Zx_5xkknm6j!otA#h61aw)LDt8-E~onp*_ixDV@m*>){L?20f5u8 z#VAO%Y>&k0T=XyWecfdoOP0b!&zuM~uFbz-JO6w)>r+;WH*j>mW_)ShOLv-M#5CZw zBs5Sctbkt4qw`UmrGlvBg2q}Vtf_8#gm*LxmS0Fe>^ccfK_3ZSx~03+JAC9^2w+&t!NhgXv=#zJVeX%wY0OZ_+iV^d_sMJ%pW zU^2TxYooEOW{{OBHc|J7;u>uf$7Wt`&o z^w&?`{2%A9A7?>y+WK_6wE(kXW^iB2*8v(`dnkELGIFUtx(6vPd{@A8k%kGMy3QLl z={S>qUB?#K)zL*{y~ZuIs)KY&JJgCVR^wca1J3V+QP0@R@zxH>RUlQ~al1qMX&jOg zQtB;NlHa80PgI{=3A6=5PZ6+*3r!=xpNLvhwwiC~>Yb?EJxmXk=S|yn5YN9IzFG~O z8#`P;k>S+g+S+ET7asA_*GRVstZ&U02k$nY_$=;fqIn>OXq}}ji6Pif+-09>Tti+V zbgu5D*!krVYV_;kc5jhcv$YltueC6B1j>9x#G*v7jo`1!J<_zjJ}5{`Xx+*Is`s8O zX}<$ogrc1t&pc8uKY6b}ap@pk#?)X*b(?U3bnfXHos8c+US?znwbPngZIVJGJh%RPrQJRRm zU*HaSt&%o@7n^C1h3rH{?A;Lsf5_Q*^^_>uj?GhyVFGv5`l^gH+SJW{HzrXV6`$V+ zI`dDTI+&07D>w$uU{m=Zbc1!Geh_#NHvC+U4>tF1JVSxN7h}3~>GD;Tf5%>9DBWsv zrLe9k&)UGEo&2&#skmCn@9joP?VGOV%9dOA>7ovlz7123gvH|I(8yU7wj1QP0=_q# zI4#3}TfbrbhoF@Iea#+=eQ_DlT!Jf8L;|h9AELm3a){bhzeJ(Rcp(=Yrp+kQ@wz20 zX3#SUF)`z-lK1=j{wi@8dE4u+j(Rp&vZdj7|FMcu;|BDGw4VLv4XKOCl}b^d^y#2V zaUl3RHqo8m2K*gwvIQ~(D{e0x19p&{n-2+NH+)^s+08SudJg6YiKU`EcXgp4s84K9 zH{poyM%eDy7Xg02X*Y8xg*MTP_0&N#ltVrMv2M9zm z{_s-Rb;eymwLgO!09Omt{<>6Xz#5_yeATdl+8@@4;7`S?mgFy|<)hlifoi;@olS5- z0`tHVQdHtL*DL923e6!?PsduqpyYc03{c!OEn2ZXc(4;LBN{M>T#$oou{EK>9Dizm z{9XpxF|q%t{prC0yp%Do5-olimkWuUdPRVj0y0#?NusZsiPs9J|Ec}4dPvW;7kO}# zN2Ix{0=2)kw7*nF3*39HYXGm7!M5Dxr-f8OV`g^!Yvdm@QFg!Q6q9Vr4Gt1VFT=}c z%@Hk0k5~a?BV0uvzbCTYyVjELp)p!G1EVi>;?Vb?!0CW(g2&K5`JeX5kp*7VY%7e?umRqEzri{N{#EL-27d<$Y$XeQWd)wW|?mTMH%ZR(Jb z9$&8St5G&U?OmD(p`=MDC2!C=N?rQeu9KrZg&x+qcu}a$-GxtXm(=kSC+%kjvpS7n z+SG7S6pH?eZWhbzY%6KNkfb=l{&KN+!Elw^MWnbPyTlPaS~0=M2SjqSv4T>9sdDw* z>z>SbU2vn(+E-c!YTx$f*vmI5guognYU*_KZp5e+gU|hmFdOPl6*ITiVdjPHEWa(0`gMM+=>nNi?fwbC3;UmOU zuXq|H`@udqS)<8O+QMeGrjI1#UZ1Pb5}ixQ)(Z-WIe?b5Vk^FPuJp75=@lzJkU0HF zcInF%94J9V)K3z6$RS{^EKD6sOW+uwMA%D$(CbKVz8)t!=_TJB@r>*+Nb(C-G>2)M z5TW~Pmy9`#NYM%e3AV6KAu_ZGlLUw0H&7{%_)jSi+e(hKhQK-l+ zOrJdYW{WFz>y0q!>!$eEJ(y@(3p!VH-=z}#8QD~>B4u9 zk3SptED4o<>3ptyZ5ecXtCL{aBk4iQ@^CY@0&^C9QLqF>3LsRx?3esKolu7%I%n|C2)f7d87YVlA}q>v-%lfSN4~P_qZpZZ}l@1l4rO-O6>QJTM@j zgPjWGYc(sp8qVY=UYdYJ03q(B3HV*ovoogyh@lewCx&Xy$paALkp20!4&4Dl+)W*y zDSa`EIkxzuHY#Yd2Aq|&0yR)Wew`jufha0}nt%$RCSaSB#sCmQMW{ggMGmlpI@;Yq z6qN!)5JhFb5D7$4nWuW8sI+GNMNxTS#1%7-xdJKFeam}*5!cE{cO0g-SjA;nlAcTU z*R`$XGs3?yD#6X+T<>g#Ksg~;&pXAWF`1g0}MfK(kRYQc4 zCw@;%x{b3iV_A^NX!Wfv^1L6`g6XC731%T-L8{j<~rk7>}RSkI0)&gobaUgE3 zXYMVib|X1wC@(9M>Z{U@t*AAZ9}T2Xmta`P-ByT=HFTWiG(zmy@$U(z%ykrU>PzJE z0Ce_+4*$pNM$l2o4FvLkS**RTFJ*vK04>(EUlwauBOXTy)&}Jgzg2A2s+_&rF>>n+ z+{7MSdPqj+PSSmSXb9PDDLyJqPki2;^(-s-sPZR>YT6|jZRQY@(SfJ~t~uCPso&Uw zpZjiU7Q5+0s;zhnF@5%){yi@Eu}EfAzdnDE?ewTN#DuTY-gv#E0f`iCf{u$mnHQ{e zJnG>W*tKwp%pNCI_cIZV(l2vwphyi68v?4bFe#8b49eD^qP}LJh&m*|*-7D*A!iOu zMJ^S!o0`#3m4OX^y0HOa4kno3({iM*$6;Z^eF2268M4H=A-P~s!iO7YlHli9OVxQU zSOB~-%{U+f6mq71dxag&u%Z2uuU z#iZp>D;y~}$&AT4>@Fa*<2z55W+<@yu%&hQX2?UI=2l!C|>idq_k z^#2KdXPCJD;dtrPCdY46BcZq{TE||)49f~m)-EL6J)Z`j;X6hwr#}lf52RC#W?dPp zKvG;6UheSHIYo}5H$-kipHO6!k3_E7HL*|Vt`B8a^+IB;v|yh_;jR5PE1q%DywkX% zGjl20@kSwB(~OA?qE)L~;}u*0k?yN`P2f>L(3r^=0$I;Wro|ZUye&PN;uI zU14VWKNAZ7uYFskRAC8}!wO*LYpysN^nBn#cBBn-36-^vi zxaoV&{8_kx15Zmx2DitYg#HG6FXl(_Kad3Py~UVzWtFzATpg3gHSEYopRFGw@$P{E zP%%cRmjhfIRLFy}XXD09j|~qWQ$A-npJj@uBDE*Q(%FsJuK;K{1UzuG2re0J!t1XS zz6m)p09sB>1VO+}Wl;YGVY$FPpG2@a0c_jofU^>4+a~g#ZCjcj|9{ebo{@D4V=;p60Ff~ttF7=U>i^h7w<`tqOoByc>VQDpKV?>R;8mx77d zl{hyM`yt=NW5KghuIzs`b1eQ(Gbbk%3$Q){XgOaS`$qKSQa{NL2S4vzF@9zeI&~kAlXdtv4KuBl@&~gl? zfb}sCR&X*IeH9&MEpPd(aqRPWP=#pnWn7*tm&*7)q12 zyE`nlYgXK+=I?d3aXP3y!J>oc)v+|j*~~O6+Sf%C8HeaHk5ODA)7`}Q5+nU~!V11x zN2*ynigE3Hlm0i11K8=^((5OAfUV7p1?uJqV!H=O@%(C%I0e|+{rbe>1f(7Nqml>k zxKneAAhz}=#{I&MDi=BTdxoR_Suq%Yg}dhPB)N*{~KVHlD94#|+9S<$CE#D5y(Z zcevY^Ikg$c(`Z97xl(^>I`p-1(}}mn6pZT5Q7K%MD{jt$GZ{MBeE^_EP{EH*;jf+! zk84y?d`+~hms4V#Ga3uR3*?`}H6$s1E6%9y5=W!7t6zeT=J8gt4@NpBo|My-(K%}S z^~Q-Akpu)Ff_$SNSco|0IqZ8B)RG4OELa;iyzWvg@QQgX&U#C95t$d57`!5wNk0xrbp4qK`$K*cm9*!|6^520WX-dw!z!_}?3d^8ZrWfgmalQ6i zGey9G1gM<;j{|9ZdPw6+%lB>RAqaa}&}5AczWzd>GlGCEfaFF(fwTpS^3Wty+AT;+ zc5`@n@E&RIQ>{O(iw}dXuyw)L2p>hWEn@<#Bc}*f)(i&VZ``^}}EvPjZ z13Y*)gv;gCU@kvb<_t8@`xnV5tdcSO%Q|9L0w3^Zgl+{a5N~4rVG)pN;rR6psq8`)Te5BUcz!Z5rW@C!yWwCpEC;%2mb4wENk@lpXvMc zfRc8;Rnnyj9+RW^I`Y*SgaRzp;5`E>g_sZ@v8(vsum3a0iF$C|~s@%VgQ zaJZIm&-itY2brcv*&ZMpq(=F{FkjBMt>1=(fDQ6_G8f8jANS@1kQKPhszDA{pz_lJ zY>=Y!w=g$Y1o_@*@i%BF+(8vUVGyrXNGLvfH^`<1XbhU%!bG1}8jLi5U2c``BzkYD zj8;3$f|14r=e7HjnLo6^Fb^KzEW4vO%~oL#-liLhP}M~+axj^H`;5Wsbc1=#`p_|D zaDyezDAQ&un0+P&>t4zA%AT;UJ2?B;O@jT)d4}cc3`;QksB{17fFAHt|07`~q+&YY z(VC(&x2=!L)l((SW+sHI?syxelx#j69z>CHkkF-;;8<6DtQ4IOk78Y+RXl}I+&mxc z>;J1w2>cs#@jpS=U4Pj#AR5pWX`k3RSnf2&XJ8!Va`TsNQCy;H%GqI|x(L3#^SR%maxN_v{@X$I zUv;1V|3(ip6Bo<>8(5N!`!8`eKQ-vF$u3|GbF6aTC{fPqfbe>z3xG`3;4crGQh^?u zOg!j-#oVt?6NE3q+QG8dk2W(uXa%1J=GUVh7c-lUS;V zvN<#|010bpcV&S=^{%D_hzwjgw*1RiD^(sY+Hmaw_-fN=L3Skal<}N_Y}#CR;Jpch zq|Bc}HE>$0r1LG7RNeT+5Gb-#RQTnzZd5y_yNpDlvk4Sg+Ij^m9Vka82B!1XnU4;c z`T~Qz=*bFTy#SG=T#pfgd%A5S7kLsX7rC}65b^&bW#mJi#*iI8ylGpH;j7`rpmFcibcJv;$*q&SY^ zpF1ANoLvr>v&(xp@Zx-ttqSO=sOU-2SKk58P3nL;GPO&EV(&z_e9;_nA6t(ofCJDY z!JQ0y1NCNUUOWyjisC=U+R%9ry>5D|0hCxG%Tz>1(!!*?o1?kN^pzct?6&$zdp+5% zTO7MERs=jZEuYA;2X9fAu3S6s+G+AyG}fG$`+p5<)ppKvRcvx7a5vOGY>So-FO-%3 zV*bE9-(cm{F*77<@YwRcGTUN5!bo=x1&$}N|Dn}7R50I-E5)?wm&`nH!@~h1?N!Bl zY_x)KhgutuiFMAE9(`+2gAh%5Xpu_N6KYn}2b`gh{1<8|$q7(Wx%zG9>4F%g;i`4^ zo$AhW=yrxxo{>|*NzO=6AKn)r0;o%rq}VlIreg4I*G(^`GgNxy~uP&9KnBr^$r9^0yeBJ@UnioC~@|j4e_)z8F~D3(ZpB zy(E%&fDcLe8OCnuMXB#$uMZ*w-fXK^GH4dUiR26b{@8R)*;`otuAFc5K56J2ye zR{1f})X8R9lx}A-NZAlcoqZyb+IS3rJSC^_F-Gm$v`s*h!y}Sn;1XK)IEH|ICZ-8k zdA0UUhI&)dkfQGQ5#Y?8xXhhFF`f~dnZ@7DY=kuuzeA(;2ok0H#?ZV9TKND!! zo{SR|-oA(Fi~plVk^|r72nQaS=2B&MnLa;0zjIQq(^;KbPzOgKUO;S(>Nh^VB1blW z;nciy5`A^o(EB5*{fTm7UE`3k?Z=*hlj9tD)=D)myla6&cIfJ_2`rnZHSO5iPVFda z+BEmjN+xYuy8TLucr`)*>;jKx`+Mn$p=Vl-3os+W!f+2u{%G7`I~nE0Z^VOEkL7Ys z;5#8c>~vJ*zM@|k`29J!%fhZtF@2>_tXXo-W1a z?e$D~E~H)jgh80yneVL#8x{W4|RJToIEiWzEGdd7Li7D$`f5opV1-CwPS6`p$$w6z5U zD+l2>q0B7)q(iIi%sY{+q8Z!!ZsjRoYsNi{2}~dimVoIfg)LZitswbXL@&>0kf1F! zq6HgId4%+O0N~u25Fli2BT@o@aP0ywrPJLgE^GzmFD3ZEEiTq0>8!Tk`|IS12zlua zjH6U`&FREMyWAOr=oeUTOQzO?kXytmz_}}@ZviGyBVH^pfo4*Z3NUtH+2)Mf0B5$x z3vH^%yRYB&#Y7;Pm+=3{kt#K&iX_WGg0|BAGIijn^d_rL&n@cO>{4{Ma+P`6qwG3= zA)R&h4Rmg%)_hBTq|9;Q42J7N;`4L!?26q;{FA_5V%_1mT^p^8X!cvZMfQ%6(PX{H=PRxDn zCl8XfrA+ixS|oP9mjcfxV)-(+h@Qm9Jp4OA`l~k%?5A9`7#HLeKuRD5`>fdvNt#8T zOXd~yhjk|({uoS21hDS7C-NAeL99Cv^+jedx#kMR6r9ZeFzxP}Uv~K-)Lu>7_La-* zue}fA(BU7RF0p}P9_Opk<_9pHvSjX9nipMDKDavWt2^x=0U@@u9WGo1hO>VQvn7lJy}?qjGKu z)0G0yzUERzE4}m>MemhvyB*>Csee91bO6z-rfS#Cw97tvqJDbYe&s{}Km|O~+Z%~M zxE&V|etcHlI7iCsQIR0o4Eg}KMW5Hx^kL*J(+_dOLn4~0;XvBKI78scTl6Dn#|JK-RXoGQoEgeuRd<@ejncU7f@w`(tUUH z|B?05F}D$ZB{V&UC|gumqxel=P6oZMIIOet*BE7x;*H;?lJRbm?3>Jz;`CZlJRO z1ahY-&&4e|Qyu}2aNwjUHgUH1GbE8g#9Z-lwc4PqXg62t_u;$Ju1o|My`aEN&@4f^ zYcB6UpKrsUSGciA!n^i4Pqw%R-&cVlHz<{XiY3bOxC!Yf1JX#P2mXN(sVJ*&S7l1M z2KAzbZ8zMN!xM7HCdZ@fHm;g)i|pZ%CRqE>j+lhywc^fXzYXmTc9M)an5~schu`9P>Kj2A~`w@V7?cFq`sif zH){6mRdYew&>0RjBTIHOzJr+Qq)hZZv+!NnkwGZgkvL)kSu)$e1a#r?Uk*aq$m&Zy z++=)INj{{&Oj({XBKPOAg!fm2tzt*v@6Lk%xhy>k#Q$F|OL5#(GE?|e zmo=v6Tfg@r_21r?{$POwU@YA^4>903RCaKyg(WrympffPTnhM28g_57DhOfku(%dT{e z$)67a#tx#6vW%3J8g24H$Ol9cO?QeE#hYA8>a#MN?m+8gvfc>sHEx%l1Vid%Ka$EP13B z3=3FAS!CN@XM?@}_!-s`1^r$u8>PnKJV!8K9OEF!;O$Th!jRR};@uZXZhjgPLg z=LHk%7G4aEeb{>KI4OO%1l@+G*k9!Jo2|4N)5nPeBw1bsy=Lhk{=^ddOML^TYm)Wb z7d-MYHWK11_V6?hJpW_p$Czr7Yq3X$o5+y~O+ps7qBKOl9<0V)K^TwJVxUdZso{HV z&p!<)=6?x!GyH!@I&kpGyP|j(30TL`Zi;Z7$K;&&W2_tJ&v2( zY`#Qb_$^?@c^6gDbKYT@1D*5wFo>{ACE#VFRhk1|~`~1 z^yf?2^L&NuN6LP_LI&u8`#Vm383{H9nP&WmO^F#quxQRN`2>11#m#X&6z0?MdUho6S{6VA;MfDsbo_i;9Gm3K3UV zj)|sWUfaSI1)Y?{7lxUOiHbL>RSodTxuP?+USbnDi3@rk2()+Yx-v$yqTcW%L9_Kh z`B)7H0$*sMzv=E7Xn^ka;;KeS%u;g)*OlQONr~c=5CzfQ;0+(D`9()e(Fgc@I{gE^*0-$t*o-Cj!^SDEw2 zu?GhH*h^7+;vEm~9_1YBWFdUNGtNL{bdv$S7?^MHM2)xfk6`sUptK_g&i=RWyuS)rwh@)%uSZ@%yHi%sjLc`Z zpmTNFj7eNo6g)nVT~siyVY@9l!-3PI=y9S6MQ4carc~aTHrbqRNrK-vZEl1vJdkI! z4wtp=4-B_vp9~o$HqSPHw$E`&9XveVinY@@!lkI^<`5|#(kZ%vSCh4ulBe%Q>Q&$- z6*wl}t#~lIYQ!35TtlMnvBcFUClH*UoUJRrI<8uzuQ1Jx#pvs4?RC(qDM)t3)EJiu zLiC%`nE)$!3@q^+Isi#L?IToaZtGp$4h1tMktypGvN-A7$lVgJ(I9_cp7B+LY-MIZb?UcDxtf#6?JOC0=bpzKMT@sOwB`( z23wP#dnUD>dnRR1BX2s~%L@DT99^v5JAeBuTgKI)y#Po&8ORscs{_7*a011`+`Y8U}`WQ(vMcN1=Bc4`%98p1xz0G7?ydgIxL91 z)CQ54Ti=W6LM&B4MU(oU^8xZQ0#r1KycjNOklq=Gp11wIBn2?(VI!!V=yDpUEE~9+ z>3rvwA+!N%a1mIUTE7FohKi+v(0e9b-zdN_*Ei_nt$VD4tvQu%8U=jKAUvS zC%7abI8u3`6JxJo?-NYOo^r3+lS|Mo@Rdvr+eu@Km?FA^-`Kqcks?}e6^w!}zaZt_ zl5z7sSNy0;Ix1__-}DO7(|3tHB=la8)%DA3LS+;Lw$oVH`PDuxf#xq6o%(j|M;jDN zA5IApGNO#$n8aU<-`$A0j>JN7)eB2g>hDoN3B{_DP{jRkH6bAgO_dQ}^-SuV7o6^e z;h?Kqhhlf3W7nbJ6@z{4HX?-C3xld^Z8mHd%oCSp?@m@+!5CJgb>!yB>W5hfC*jfM z@03k@GqxAU;>txCJf2BNgHE%VcSY+E-FT9`u-rId#d@5)0!ya8#$4BJcHXDoZgx87 zmWZ)C*d$D@dytGOXB)6giM>^51bwx_FbnDb)N4S_b33qvS;>|QSoy&Q&{pV&vneZ3AO}vPs*T};yhof-u*PI;$ zE9!%d!R|xr$NTIW4pWO)JX$sRp;N&(i|s!`RKLM~zz6d@4RVHFQpO8xMewRRsiQ}b zQqc;3HC$~pHRZyBf5wp-xa5l-PH%$jHSjs3r-W-djq)dZ-jb`*K?7#Lh$n zEIxC~uG4fZa(2EZkr_dYraLd3X;}ZwM|xKq)p z%4LL#d$8zuDqTU6omtLqnumOmOWxW+T_v$uj3?` zX!E#aPxcuNk?al@DH`3B_W66wTSkNQ##gS}M7mLuKvWL6dlO^y!~Jx&jv2eO0Hfg| zK{R>e5-eqbQI+(gmp{=Y(4RU*5&}|%^C2zM!na1>0)d4vQOMYjCdRA{XZv;=P53Kt zb#lBQ-OdjvQDTAA%r?%2A0!DQ|HVe!_={?AEh#&5{X*N|+a_682Q927MgetkW0)1$ zz!($?sp~d!Wg(4beqsBE-C+yF!m;GoSoF~orb%6m)~Ru(+RbwLz8S7|!|&Lyf4Z4E zWrifv(EGYoW0)3qX7<*lX^JIQiiCL8;4G5ey_L;7uUk+0r0&Z5!0=1P!7SCGC6nPN z?4^nm?>MRBdqn}wt!VHz2XwvH?YMR(b!UWuMLD^xsLqIYKc+|Tz~;&(%!{NXXz`2B z5voI*sbdFYAIVfw{g9zWl^PX`wrVWk3JWY!?H7X4UX&EU>2V47m&_UxQev8w+yS zv4Z(-v@@7Co0%YM6uJjv%0kLUut-ggLL;a|6!;k*ji`lx*tzb1cLRsOW4uKo5ReHj z<5d+Yzf-MFSnvzR@8t^4#I1Iz;i!YM9(}Lww(u$!U&8S1$>?mlo!y1b18>T&2lYBkeTpsOzMFaiN2$O!iqtGri0VDT_jq_{zH`)oOmb zo}&WY=1*sYuBaF-e#yD&8J?v~OGR+Zr$jlY-pD`drbHRaRt2}m7VF!LzbP2W zN^v`sg39o-zM@Zaz$Ee=VFAkZ&4Zw=PAuj&K_mN#=F1hQs>Jk?sNIScs)Iooqx1e( zmeR*iD*gKzyl|Ta-}WK|5QvzVKkGC#nSOM?-_W8;{-*p-X4qM3hJ1IiQ<3R>=iF zP+o`I))?G&z4Zu`*U`oa(059*2a~4x&tsTyCOA3cIf3Wm+N_?Q)+ya^VjQv;v{aVj z5~EAuO&0<}lgGeZPt9GJAe3`;;Tpq7`6dn5+0~W&_Zqvswjk~@!NxeoXL|jY@;WnO zFY{J^SdDpCa%ggpL9Xi0dWgw6>gxTk=n=)(LAwV#RgklQrbnkn70{ihx@~Md04MQi zpP<&7Prj^JHrEW-Na5R@pB`~M3Ap2@@>+nCIMzaiUc&H{&d9Xu0$=-Ap$L)+a<$lv zfD*c|Tknk}#_!^)@4u|~%Egd8%{gU7aj`L_h%z5tt$Y?8vlhjq z<^L(M=Ixr>>u-lXsVE$WNR=rx@5d!|I5s}D3gFaStmg{3%t(Km*{^j;)>nJljZ3W+ zQ9ocYYNNkv0Sljq|6#I(id?PmdDIz`#nFH*-3joW=f7`4*J3VOz_%jX#0B)9EgxNs zn`nl}>6isA8e_iT+J&3WzTGVdlM)}4cA{P+kjmLLZgIW~uMgMZs6DV>+%o@urczfp zRc9gMW&Yu?S0!zke;j2SV@xyE+yX6Q#2!C})E#lv_0`dDMS!WEX*9~DA2<;ZWv zzA`pdDVTn}5JZhG4{Z2Rs}ZWWnLd^8)I}0y5bb^x&2Z2}JMm+#y9xwc?i%1zXu-uu z5Pau^i;AbU?Ve6oxzYqfL3)a^w)>eLy#87A5m69~s5jup1Ky};Ej>(yIm+oW_FErO z^1j+&?iE07B0(tB5uN^HJ?95F4K}8s@GSRQoQK$j>Obnhb$W6VBFd(NqH~=ZKrzf*XmxS1jar6IttN7mcy6qG zRR7U>OX=7rF%R8oQhkL5M7cXz*owI~-{xG(C|VQ?3e4oqqK7BvB;GX=EHH1{;Tfcr ze`sit;6c-0slNa$X6R7sfj4Bjc%>5+#%$`Y;?}>jbN2R_Qs06FzBzi~`&B7@z3VWq zMuL(CqI2bM&K5z@IjzAsENXJ5<&VLAAwz4uJe$&IdHJ;Avm4D_+k+u0hrkD1*o7+u zb}S@&sSmn2#Jk=K?#!WruT+vjsKy)V20vvJ3M<}xlL>qUMCT5w`2ik02-43I^Z^HD zM1`ba1d7g$&a&7JsvsK1=XAk0D{HCAJB3)z2G7VzRSCsXVyhZ~4|?}theHNcNxA;=@OvOD$d7#;r!C~)b^23m>tWR^WE(T zjU`wr&8KVqeQ=anYAe*74vTFJ9-mZd3Rjf4NE9@CeUDU94T1)K8G5#qd;XrVb0kkW zBJ=6_7iLaQySK~{#881U_xFSmt2a0zCu#2%bQ(*k}d6iW6D zWik+#+by%}@wzw@5f#sM6BW;tmXPzM=qI90Sm+TGceRb95UKBy1(dL0A*xprG2Ki0gZD1whKaem;g`N^qJyriskcxXtU# z)qd%xm&=Hy9sjrt{aeKQZ$qaKh{J*S0HBSkSGDfNYXU$VVEd-CmM|#c;JNzc-m|Dq zIgV!bWCohvXO!lv0`-(;7sbV~15ic8se!u zfT6o((pz(SW_kS~35yWk%Ph~C0kjN7MGEVuQ+mB_Ma&T2vDMNT!ald0@hAN4LI?2y zu>c>yG=l^10o<8oBIRU*1fNDux%y%@NF}O|ie-AirO@#TKrZwYQ!IIa4+sJ%@6YvY zZ)E45d+?Zz{_p{Vx0>G?rne1+aN!Fm-@X+o8>u25CFLwNW&zvqSp76c3DIaE2?XNw zXDPxl*W`hI&1>1k5<9}6PRsvacDDiX&haq$J5|`U`f6B3sG%y+??!=P7kpH|E{57 z<&&aIfi&^pB#y~=yl~#C$NTaJE#qYVG+ovHE`mwE@3TX50!I(ly|EU*ngkHZPlZBF zJdAHTlvxMIe6&;1l;ZtNjh&^ZJP@w6T>@@rG$S z6#8wUnY&<;@C8tpO{A8 zC$An`f?F|<1lj!KF)96(4)hMJKhb(^kVoN%p)85$2kLG94W#dqhj=3au{JsojbUcc zFE=LQN2f^qS2xFSi^@FV9AD-*-0^hLuFrs<7N=daIew)iDpc>PBnUz;UJJ0ow%JfuM^)@MHfsrR)AMfUR@N&^dln{Hh zE<}{R)LruP=gloo)i?A88=itFrN34Z8=PT2vk4@*hQ^5n7KefHZQIG5(SPuvKA#`y z+iw-LBk+ch>e5*gpa(GTD^4SGTk_R$#HSaNk9GezoLK)I=S|PX_IG@89@NuNK0*)- zw2b5b_z?uw2)AEqY#GWG7Ar<~kOh3H#kh9bno}@ZRQ!0+)@e=s`5B+YzR>uq9A@|U zH|V|kXj9I8AMg_=?PHax*Xn2*r>xxFTB~&T^(axHNZvtHvxD@vAU>0lv%BAxEk^+C_b;l52Vzno8h6!nc%3=OvHW~W_v-MxlyNp7x3fi znO>R!>VNrw`rrTXlcN&iN&1RKwKA%DX&*;0v({2;DHPZCkc>2>93R)lYuoPgqdo}b)KVW z3$=dk%2Rmm%1hFD7MrjDVv||xeK*lJ7VPXM(add0AdqR)%cuB>*%}2-;@B|Z{M553HzM^BojbSGEj(q&QK}SO>Kr{%qUjs zmq+HPx0f?@oT~)laR@O$PlJ)>XNv}3n&E~5rFnIwtOg5VMMR9)6m6HP z?Wz}L%HWEPNN%C}qeEf>7kpz$YO)-0N~HrE>!!T6+Ybo__*G*NhQH>R`X0nW#x@iexOATwOD zVa*vW@yL3?h3^?;2RK@Nw};(IArAQ-Zm+cXiit+awR~*+%4NdrTI5(X^}v7!_cQcE zFVV{j_pTxAiN@7;&#-{v^3hrRb>=(72HVgwP)7_NuERQpiVbqL!>_bxbPz0H1XSgz z=?B2Grk-*9@GH4zP$Bx`cN0+Rg=L@6{=Rf{f2J`b9`Pk*UDffk5*vWCA2g~_2h{oV zce+)^*@x$WpPiF87I(&^$#)?X_nVl4GKPj4sET5NDG3tH1lE}+cVRYS$n36F+1 z(sa;-%>p2rYe+>X31Uc`(OIybmY#@yj`Onv6eSf@^m?rIJaKr?DMF7;&u;^6B*)J) z8IS=N!+ZmY%IjGgpnWn;abZ^|@@gV;i=hZul2#A$5@{lUxJh0F^;Sqk{t-h&rmc=7 zK7x?unRnLaJ%b*NTIFW;<}U_0nym$2Qwt1L#|iP^=Zlevil2FCh=+11hAyT_Z}aJ% z=QTHINqRCZcwUlNfF;R3o$3kR3qebK&vyCuk`zGre_f2gCBKu0`hzY;qh=Ckd%(r$ zqpd!BA2Qw@EdWt|5}=Fq4=m}*PljYpZ{3=3Y-4zz_{nBv(OVR=G(+*28Vmf>l6krqDf&W4QQ=oy>88NS75T$V+K= z#F2VHFqxQ&jl}>M%0b<4%bO-K77xXrY?ttDYUWcRP{A(HjdRPurOwimvP#9n0#lb~ z;**9rt5L0oawdT@JJbsS2J7qPJ)MXfyZ8are>@Pw#Yvh+NH&n_lc=HEjYVi%Z@ZZl}wuAcQj6* zQ*|-Xxw5TYlN@|Gkq^pl<4MRprQV%klkRJgCzBIcb`~ENFZ9mH zwfJlAcZhYiaAi@_-Gj6d;`I=Ul)g4-+}O%lSX~}Gp|vrVKIq@2PGj)3H*&NCN=e04 zzZUb6XuN#)(fEhuL(7>vW_30L`zyLUEk*%yUIoK~%M|T4h2C}sX`)pRLbz*dh$`=C zO;yO3Cl-A2CuEjXc#J=KT%B(Hwnw0LaU(51wXGkcFpsIZ*qbI{ z>UO==ht4yS{7JDg~V-xJxY4KB3p*yAofz5pO8Yv3f=kHws{ zO+HDjl`V95&ahb%Ba2Y20`++gO1T9wwwNE|S3W(Ch~c?X{a7uRUfrt4e^U2NPe(3Q z;YPRG()`W_gmi}-*6qFn$LviTaCXdup^mcD=aB9epv2Yf%3h_9lpkZSAyiEX2#ipM zu|c-^x`aPu7iA$^i5NP|zfb(SUa`e|67e~tn<##g`##%MVLit%tswqsVtH4MN@H3n zu?DAEAqDAr?k)VSIwIf@AnUX7Ce(&g?(Dbqt0HKQt9HZY>!0pa>n2;u_RtDw`l#JC zV#7&9BvDn^PS|~R2XBE11mVOhkn3r53CuO>(f$PCrb>pHi-92A8(Y3cv{}LUUUXGQ zEXnrq2z?S6?wP|*;B%orEW!yn${&kRNVD+S8 zYz{^=4AUhrnQl!ufhMblbtbM=-5L-{xyv|`(151g#>Eb0A+I~3|1ejQJ06Di1p0bA zQOE{;y}jS68}QyV=_ESBgB&0WWZqoEDlcE$G`k7kV5Y-9NmQfE+bmy-4 zZ9>-bb_m;}y^ED>8g=3}FauO3xf*l}J-bYt zJ#7?rylti!m1PUL0Ij9(_n~wI^o|M!1Jkb#BHq1`Asp`CYHoDW9@%GkxZ;Uw|jOx_e7BTx&GuyWtKq-Z$6KIjp zNpo^Ez9a=Z{h|U}!()Txp-$Q?;IKhUp|wRjvyWX?SWeAIayyMRCmHv@KVo*)GqCQUvcmMoN=pd&dBJ5;&K^@H9PlrA9Fm-{Q3@f+ZRfQ zM&rg}&%&DZ;Q3rjt3g6B1WJ?i_PO=9kZFmoUgj9UpsvO;OH??oRzqI@iW09u4nGm#ix=$}js0QW1===Ws6& z`(2xmqVHS-)w{w#Oh}2>7lw)`rI#!%@$nVb;sieNA3c}8biat;ffB4a`Pi!)rZL<{ z#}QBH__oF47N%09NcJDc&cEZg>6!l4*(n)`$_3xj+Dhz|NmLoj7OiN<3r1=gyo3~V zfQiXwy?Ug#rANV-HY@kN3FYgY;<(Lzr|129>Bim0s-MRh3gGt)K>qe<>Ey0|_ToaZ z*){a{XPKMsj_{$o+7ZSkqZM(I$8$DGr7G&m<=trj$NfX+@^k$lq%1vY!tAWgW6>o+mi z?8_9K37G{fRc2GtUGsKyYPb`QAJ4d|(rDbOABNTlD|5))X3*W*UKZ+lMkousQ>1>2 zuoW%-p@5>d>>1$Z|2=dz*?W!ZZMi{>0HJZVrA@O%N8%!2ay+?mzT;T39-n9h2i>^E zT8bif1*kNZK|{w+;SF)i_h*R`P!}v_i|Y-fZ~H5iEoG+kqGB!!kgMG#oAljR$!d>^ zqq-1EaP4tvNcF{jjwJpJop?@6(9q%2^PMV*d>%Rk>tc6kH^D{G@2X1x z-DHL$>6`T`yq-94G6ugyeMz;DL;;j0&IpC6s<1zO!M}$NH>fXI92h!GCdGX=n4?6j zm%1E4U$F7>&@ln^1%HENir!-!5d<7cE9p%^EFdvJM|(-!FqlDF^s3fgw>5Q(xO_cl z1n30~dxSHLO<&{F8W+aL`TgE$y)SIOhH3StAr*Tz3sNx{0XN-CBi{^#C=goY?9u-Vv zgOM5Q>{vO{B|~bKx~ItoT$8jXD5A2T&Yg5m<#c_!&EAj;O$!bqp}Ob_H8Q+!6uTkT zjInH&pr_Z0+)-@m)Z8T7$ygOQHGN?BjGYB!LRz($34Yi8&Rk!;dBtin^;;BiGdi3N(k@Bu zz8eJG%dze|1q|PQYJW2#NiV!YsEnx>b?E`U-Z|Hy)Zir%s6m23MpRDRu?JMlD!Jm* zQOLb1kNDVM?yn4Sz^>bKz@j7GJCJ3`7j%T zAs?sFtx`GbFfHMfWwME$I%4e_=1n}R8+|Q2D60#=OR^Z zDP|9C06h}5Xe|!5V&_d)Zb0hwLRjiq@PxQl@^=ZE$%tH({`#<=TPg7IwbdjrTB>V7 z0&AE&+PmCZt{4hNkxyhKcT zjJ7K4g_R!bF_riOWrCp))yf%e@>-pZ4p~v=lwT6J(U=A1;oV}7nMg)OgUC_Zx1Ws)b(Hvws`jIa<4!u1>3a)vt$^XJ4K8fb0Zt`7*G?(1@xM^6qq*7&3evjF= z`ne5Ad+8j4IK=~b&kKvQC+`*tyZA{xSvUBvHT`HP5B0g?vJVeg3PPL+#L^C=PC3JR z3zzJ}0PJVZj=mW}S9oG7-8te#_zPb$NAV&JSAdqV1aRjbY2 zFVpkTQ)|%nqk=^8_<64Dz9isk}kag;-w5pO@^uZsq z`yJ|x{xpN8eWQGSUBfmKDateY%C}S+4TfLb5mdbg+r3lbuX$+@Cjh}VMsPH1IMbqt z{WgxJkGwhTc`OlTZyUzrSQ5@cP?-)Unzq3WP=l_fU*f5Un>RfDpaGL+#h7 z=r1ud$*$jxlBn}{Vh_CC;I0FQ)%ZbXap{|$wu)7TPXUJP%Nx7npro^6p@s-%(p9@~YYh^eWn>0N2Wv=U%MJqgdde=h zRm9Ua@{p9tbDR5Ug5$N9JY{W&y7~u3Z}4e?O81w?YEQBh{A8l8)?b!Su#pn#Xq4Yi_KOKZDa|#GPnTklLU4 z3mRFC)PJIr=HD)(Aaec?40nk`3y{!ZXWwRpAoba|#0I+vr|W~ITiv0mnZ7>$ z<81nOp!IwDzpXz1y#<*%0c}Y1BSgHqKUh1SZ$Z&?Cv645gPALG3L4cQF*wkM1RXL7 z)FDliaNXnnrws{#XMN|J`Z6$^jsm5QN8F ztLaoLDvzj15IWV1CajQ_R6Mv{3HcX%u|5tI0GfkiBik+d0VR?VoB8u|**frC#&>wv z&b2X7p#3gr|FkD!Z^rH=hDURQA78B=0+FveS7S5+)ad!u%R1P!#32C^k2rP= zw{^bIxmIHAifs$-i1cx1B0l?gV|2~pPE*+L;mB?@(x`*#yYOrtIRJK_*R~7%GDgMU zM0;<&8}OU+nKFb6Hr$@2ZQCP8Sy3>l_~#6VGO^4v@{5^4Tg$UGX_X%bx@LmqFe+KU z%avgR)xo4z^gy703kdYPvJ!N*S%=sHryy)q#ZKT9gdQ%O*(7Z)zMH3ATLPFz;;8R( zA9bJ2Bhr%tb5Kw8UGfx z326;NR2?u);W!^&^ro5UXcB!`(?=UJ6Aa3H?3Qx_PqP#1Q@;X@l2uL! zqP*t<-IH(sk7Lj)qI1UVXiFWGDA(5?Td{y+5P6@Ppw<6ggMi2y2p$5iL8T5K8xU#P z!|k}w6qRa`e>HL^8wgCB>`M+13ka@wHXs`MICmXX%>^Dq9TaX2oP3P;qTqam{I-PB zcG=rVe}w~c>I9y47260*YUN|4Z6#jURoj=>Iy0ks{- z&>CL|`EVoXtiEdFL>iz07l@g)WRQ5ff#I12INMwvRj&hd(Jmf3mjK>LYvw1%_)X1< zkJeJS)=UUswQay+8biNt_lMk{dzUd#==K7uq{YHbz=G1EA|uFssIFK$ATNx+lfy&1 z&HCV#L|F~%?vmpmPqqH;B6qcZb3ayu)hlu^rM9uR^ga(igD}8T2cIfFJgwbvR|~${ zsUc8h=?oEDh3`J^6=b;DLD&Xg{wziQbjB$3>4%U5f$!({jx_}t%AAAG<-&v;6)^ue zn*Jqs{rAx{81d#AAlif|5zVC(|Ir@w0ust%rBo>l;3=x zlB>q}bQ7Vx1T&RwT>4eJV#<$mW6c11Nf3SN$>I@tZD)WDTwo#0Zy>kXc%I=+?FOFX z9{S5dVNMg5o4Pd4S|PWRLM!v)zya7hDYIp>ml$4tflQUCni837?550nz@2)c9|MXt zbZ0?0eJdo~&0f8Z&$-%-)V7sC^lzNN zaB7|2LnjSu=(BlU0z^PGJ8ykI;QQq>HK+0R50eTc#K7NZWCRdjuGnXFm;?rvqyP;` z4bG40SqHvk((=CHlm^Im+QsW~6$pU}u#l+Lx*nyC4WI1K_&WpT;>e1GhejBPja@k- zwk<1$&q(ugDJwN%EvM>o_1Q?fLXYDNED}#j1A(xAU}u?9@XTZaHPDdsX2WAyAh~*D zy)R_9f@e}!4G8<2SoUj`#^_xIf1BN;#xh(!0veLkR?w~l!Ali%nU(?qGY%#%`Ed=BA^?=6wkh$d)1!Rr9v!Vj4U}W=n+>XR(P}ho$Rc`v(#k% z{`fMjj=VL@jMcSkxv0=>z9D;=W#_f>WCIODfM#Rl=1QNE)jaFig4aRl2dCUGcCbX) z6_#>uu+*lDzZrA(lbUc^$kiTyWCiZj$PmN?Ff}%GjTogm1Y1Rp-6YoCBHLVYdGXW2 zILhNnsxlm5M$H2T>wAIg7Kjq*5WT__Nhf*3ly<|Pp@Y3d>y$O5$xro(pP*2Ekk$!T z9?gxj&D6o!u*siNDv^WrW9~0Tpwxw?uc32|*~Vg{79>PRVr+Ec>?Q4eqB3jA8|ou& zRHNL%31k=NU4n5D_?O4^oT1nEwN{Cu`Zs+u6xLF`&~|dJMNVW*cq`prJyn>`1PVR+ zoZSmZxjB+N%Bm+F5Rgrz+(1F;<+#y3Rdj#w%n%9qLWr&XL67`sjex(EGf3nV@kq2+ zQMn}l?ncCYERy1(PMF7Cv^yNZ_ieo}xBuOnts7Pn0&Za&p0L%@Y_oO05>y~t>%Jht zEs8)GgSLB_`I$Bf@s!ewWsSde|8~83pQM_JJ1z-*eoFN8+t2zr;4kEOA{59kr-*yP z$4ZvhkYFiJ-@Je)p`m9R8e_q;j{#AyVW{88T7lJ!Y~3`VYyArYf+*Zd);8(v3Uwz@ zIZU%PX{7^uwC<;2b`In43NkANz+-CZ)8=?>ggro@1g%xT4gf02NrOz1`?Sx}UiaXy zY`>!Z(`aJR_hYKoqqnpu zZm~>Lq~0&vNbFfv6adxjc`TvAE>9M3TeP zqiX8tnKP>QN^qkD7ANFtML}S3stP+LngzLT540MkbvY%&{8(|5ZIC3nL#k=!>ga~8 zXDqRl$yQZD*4Geh7cqA#bGaeZ$OQWdI12UXAe8SfaK;8AAPe~-9VSeH$p3sj=n0KF zzc9Syc{JgR$TU~vBHm>`yKaa78cq0x`L^!9sumPX_Mp898DOq$lKtE<;?H#6KUb7Y z|Lj>j_V}$K5r5W@SO6N58P3vsMt5xP#IcQ*hCdpTveNd<;R{E=*hbE7NklmVi_r&Q zMu3KdY_QyDEJ%gkz=D+M z&ArlKAFjB)4j)a>w5qA;ldyr#^tJ&w{VIV>BXgbZ_@g1JFN`x9OysgmtBIjpscpki z(4dDIBx|S5%nq=B5x?f6o8ZX5$|5p;fWYx(;cV_ZDtezsYQ%xwvwG@)OC)8TI+n27 z+EUWLcu)-y4Ns;?mpDS1pUYY2aH3-QquQy{ySn)A${kUzk+2-2M>cX# zdX81w28ZA0okN4n&+%N~*fB6_#1Au$wrEcH)bOh}a4djc$v4fsyFZ!7_>seMjzgm{ zLSz@Na-4zd`dIrE4DAk|>LD2oV7;ZvqJ^^90W*2lkhtOJKl#_hT{#z)aU{V>NCX5Q zb*TT)x_z0q-!ght#B4x^s&>??nOR+DVbtW)Y>a)aaO!Ke9?+iDgocQ*75P-ZtnSOo zavHvFAW(wKDdi>Dmj*S8=vImH!`<_u{( z15r;Y4hTt_eJ3fNnAnxkizzVs zebV(&0mDy@w%(BL3RqV?+~eNJHLALbw_#p*o?C@XSDBBSbf!MC#(@Gu z31>55_uT*7qc@sv1~T3HDc#r=I2_i1C`fhH0}`o_@iXS8a3xRNUo%jVB=Pe+mwKRz0h37eK1pErZ{x+mt^lZcp~F(&9ZY_&gGR zt8Qfh)$Nf>JVd?)%~r5$Hdq~_(h2BK0(>N|f17R#g@Lr%U#44}Ka|l25M@;U+jJ}X zd~vFl228hc1~fmN{}fBEd4uYcK;Lw;)`!paNvV#=X)F1vz;JR+o&r%u^?-=`%U_gH zHZ8cKwX`5e#C=e*ycd5mM^Z3{C%aVck*m9rv86FGDR0VsqpBdm<&yXjZP>QRV&Klq z$}+utT+IE~sd(XyZe$++y-W4vl6mpXhkKs^?nev9<)I>?%GPXq^D%^e-BmCDJb$@{ zFYES~eH*u|g9tIIuDdCMht_Yd@Lk8Wr)vT$Nnh(~Fo(j3^Vm%bEw-sG7V>^F0jBo+jCD?vNnF$f?^HBp`tp<4_m6Vtf6J7!|tE6!Hno z-KvZ+kG_`klbXAe>N!6zOC|5HrDDKV+v?NPWYyh#w*|Xp$L=IPCVA+W-iod3`sUEj zIrL7u@@Vg&Fu&x!5D?4A%|11=$yF92f!z^DtRq!JH1-Y1t;&TYJ{tY7Hl@`q6T2k8w4u10u=&)uI?T z{XQW}5}-Iqzptxz^X^M4P@F^^4U*kP(klDKTe!~$6eF2|IZl-2z&ggvW=PZ&O~?_ z^QXx+ad8N!vK_yFj8auE8ni6ncnL}00JjkXWMtLP)fKhk6at@0V1GObr*WT+Te&|p zH$1t^^E`$;KcVe9{~GnzfldMq{# zH_`030qJ?*fQX{s0^7Mr!oBt>SFC>5wwD53?%{u4(9ERqsGX2XErJ3g_EA>JK?Wo` zy{N0~DjsuTxXLr8b@iK#uPu~#ufQ)97`kG+gLl6X18VK2h-bC7_-?~*tnq{YAFPp$ z_di%8F@6G6+zp`CUNrcvg-mn~kpi$rdY|}k%>r})YfO0yU*+=LWb3f5{+C*tq!v(X zBm5pXdCvnUTz!OAXenEK9iD~}h{rkzXCqVo88|DX%4adFCV&7b=u<)s#bBV_vcQ~if1g-rFL<(P<-zi?= zrvcCQQssh8m%W9KP;pyk1ck~s(=M2~$>M_)TE(VR6vHu}S5>5HEVR|3F`*LF@5`BT&sEAt@F0G_jrO3o3WbxIiIhlL{N8HWXyTNjFJFL47oK%(a=}!c{t?Sa_u=*q@;}XlmtcI@pZDml@kB z4s0v}oGZNsQM~&6ymk138oM4y`K5`^y^x5G(}%N02qZ1G@zH%jQrom>B0y^UcnXZ6 zpuKVY^D~X+ z2*!Ix;!><9XJ6knAYCx&t9kC6#c)q_9N}!%jzd9b{y&VJWmJ~y7Os`&il0%z}@|MYZ+rh>^uz+rE0IC+0weHDe+f02nw?P2rwv{5@2m0wm5UTd<%+{>AYS!4+#g@5otRQLV z@OqkZYkaApcUZp^YvUGQp9VfXmOLp99@uRAy>CkmYP&pIBzzXPRYo^Dp!B)LO_oZo zweWZ7HwB|OLuRT%HrxZN?M9DAh0NX>43hYWj&E!AK>aMWat^@#>wNpEh%>1%1*qHd z;un#3anH2GqMy}mJAq&b)nv$bZ^}4{*Z|!Bo|%0|_KMw(`KKGCZ#74wV`JJuzzfaf z!2VDB4A^W#%N7FdGoG^{H437$G80KSOq?OrS7@4J?zlHS_vZZ56XDPJ5cewL7|#(# zY{T!1f}&GIXPDw`D&>9%d*Hjgl+rubE>I;4Rqq>;jNjmQ)5fj5(BbglllnSL5l$5w!ZGcN)b(vxD6)dB}m)` zC-U4rYp|XG*+}vgRhmgMs*1&MmQzvzahv!8u-N`f+{PX8N8C2XhCW;~b9Hp#lyGoU zr0lRu&WAvmDO)yf2or+!t>JDiGLfpPc45~cCn=Yx~H41a7CRr%TKB5 zp853zCUs<56P=GP3-9Z?l#CGR;Ls+(5bN{0mEAM&yS1^q#UjK0^!ip3RotAkl4%WW z^`ll|WXb@8VRQmg)$x)qKAmS{uk-q&f~CT%_o#V-_Y!6^ZeMs<6X(LXwKTjeJNNRL z;__?cKEq@B)(!6Phbn2Aj6q?s$>+_UPurLYCLZUr4WL+MIR)crH&NhlQ(_XS=ygt7 zxHE@RR$U7uLFST$r+4ct2in-fXIW7P5Qb^L5KG;#)N`r_5VcrQvuHh(ZEkUTS)o$} z65|(NXduA-V>zZJd*0t6Z(=z&Pi$L$&U)z>?y85@GIV3;2JO(?&J*>sAn@MocFW61 z{fLfVA+KFx@4*W~s8QTcncr`~3xXE;g4L>dR5nHGXp3~1WaYu@9jSntl6s)eR|y?i z^`7kbypY2+QrM7jym+q#1+Z~o z2Mv5uuIB@6qNBH)f5l`Pt;;i`rN1DjX6?*E)+Q!p%7U!Bd`QqCFd$v+VM{>GBMUn5 zSL>eqiKxY&&e^A39(cq(^i^Sl{Bh|gLQLgI{V;*uXFkC!YEL!3p&v)QLqrl3A3bON ztKv+(pca)w4-Mf`f04IZn6 z&8V~rMv)Gkhu@IuT6ip>ElF<~OCZDPWfAWO?P7t0K|opin^%->Yt-Q z=+?63h+;C2`H7kBSE3hfwFkfJ4yQ5hl_E%EnLyg39Znnav!X zud{!3<&)y%`CyTlRv-pQ(w2O~qq`B#ONb$L>_-Mi#mFh7_=^W62e)u$rLv1hoDa$) zJf(0x9Ud6NZa<8pab4X#w5T|9+SHI?M8?2h2@m3z8BWQldd2-5b(k!`Kd{{itDrIB zW~+AjMraYLHEmilTTp>BK-O@20~Sr@>?HqlCI;*-pREIxJWt;udS#VHG3)b$4C^oE z{`nu;uF`>MpDY($x=8I3_`dg(T4W`he`aG~UmvAN$J6PC-yoMcnPMsGBsYJ-6ckpJ zeyoRxJazn`912D#zy*KHZMm@rkH`csnIGHnV<$WOPeO1T&8vFwbtA)7Xm>Xn_b5~= z?<5TEn32-t%f( zTqnR@C#BoCS|N~2F%9<=JkHcP@cgOa5Yu?4lSJPjRU@-CuRE+Q_f>1vDZMF|EuU!N zGumJhSnu-U$)5P1U`k3XAXmA~Pw_3a55v>nv}rE&YtFy| zm9w`x{zCj!7c zX=Uk=Jv}ed0x7Whk_bNtJ-6r2j%g>-`R&<}3k3K%v5|_o;X>Il zHl%2{0^dDWhnFgz{*6_muLz2MIszXr*N!zV=Ehf~F5x!{zdv5;&Pl&%X~hPOF_8UcZ%k^dbi zeZW8g8X6x`mxp>Z8hKTK)Q~?%6ZXauXrLUqJ`WUvY$#2C5#cH5i3{}V+#6u3G?=P8 zq!|ZC7-GOB|JW0ijs4VE+?S6Dwb<-M|K)X>u|erDMO>|TPF47GcRtY{=+3JXYN|xy zE>@z74FH7f@Ej#G?PxQ!3{_UV=#aGQI5x?#1NB%oTWWPA^|dZeW%Uteehv;`q7d8P zy(U5WPCk#IJ)^p2o<^KLXX!AW%?p|+cfdq3`ZG~9N`TN%x40n`x4F3QbiJv`b`DxB zIbp2{dAezCclMQ6gMhPUku$lB?AyUchM_WC-+o00@mEiIIu{!7sdIyJ8q^)^#^fb* zU;~v3nYlv_hx|8h58~|RER$U|d%rUxx7lueDQj8E%$KmtlU3)Y!e}wrXRF~}tnQ{< z-fre8B8*%crFvz%fls!TM}t)oSg1Yo$)r$-3j7N^;vIcpe8>?@-)&U2r15y#$U=8X z#hWoR(=Im4lJ`mRTondnoT~LC7%B%MKck4V5zc|$OuhF z+gm@|kIxd|mlni}z;U^z#xMd{=u@Wab{mKK_S947xV z;LO4H_pg(`7Q%q}3= zg$`Q{0c7n!Yp%pa_;B>3w`OhvvUcD=Pn}aPS%!Ra0(Ycm^BM4UvQHA;pyIPw zL@25F>FZ;>B&-bSm)lY;q9JyMm=6<~yO#gSH#cG5EIpShc*MnHjBttIX222*D|oYt z6@h$n*|S}!@48d!a7L9l^tBq-Hm`+vZwyG<(Q&o~Dpj~HCF;R8(0xU&l`Mq>@YD*U zNm*=rQbW&p>YK0LB>dTjK&e6nkai?u^ocsDM;c1{DX{)M-~8uTWimr-FsV+2I_XX_dLR&_bVlo+r)Q4CRZ1LoN{NS3Gyr8BD*9 zUhFQ@{Ju(aF%Sa0b zsY4e&+`_W#r$(f8GePjd^ItzODD~0NufkM2pTyduigo^uLWhRBk%Ck5HS~Hm1OdVh zP{o3xv0bG3EuzWZo+c;nd(nLV4}y0aLu8$f1Mk`+iHVWMG0;{W@L85EHLYVK4IE|o zLrUtRA`N6Y1uITo-2CEr1vy7XXs1R_ct81?;^=m_eeMNLhX>&PxR2m)6S&JV69B(U zy00_F1$WE8%5@Z|*DAV1zv1EF5 z!u}7FBTzMYaR)1J#qM#fZ_chdA-g7NJ$Q|yO$VX`0~KM)BTAltLF)L80q`YroJs}2 z@lg=$6@iH1FbNPbUJOJ=y0308{lf{Mso8kBghFWD|L_SxAEs)y`F9uk{yvhiT z{mJ+3*=;u7zX{C|ZeB`yy$(U_#Q{$Hb zA)dK2P{2@kIIswGirPq{5g-g;@DE1dz0XNTYX$;_TWx`6@3xFLk5;Z$6eYBGs|L9I z+Yot7aGnE(4@l1eLvWfIxP(OW2fzvoU|e;?Mo*KB`V?ZwKkQb?(<$QX1AxKX7icG>DmyQ3MjW6_b%~&L-jsNIXW=wXc zi!5%jxkR6Xc*q~?qQ-AF{uK|f8kULxR>LKy4S%umjb|cjW`=>r`=K>x4YNaVVo}Ql zA254`YNn_SleYT1@!s83K1Gwsz^72r>rORb#-t;7oH!2++jt1UEkIofl zJ&Nfsi>PW@^V$d`xA_R-l9;WQd&i?jhn&7eQv)p(d8F1>r4`y2FccasR&Ss?B$si# z2O+yLTIW`$rRVj9U&T-qvZhqip3wyOx~-X6V3*=1SiZm0V;2XK0-anI2>Xz3eVR!HF}O~1R)9O*@pH$VCqZ*0T936jOG%Ysxv&Y{JEApxX( zGyUJKAOS2H1pvcmpMmqRKB9T8$T0hqTKvPF_R_0i8r&_lSPw;%@F#RM#u6FLy-H=} ziqvE!5ltAOu*$Wt%IUmkZwQNnb!iNS7AcK_kfO|wqO^}kL^P+j=`k1pdkncK&s9J@ z7`gQH*PFWfkiK!_w+JTnL6G(>f9a(Cy(99QzKp!+cUSqiY*B{w z(@Uff5?@z>DQY;KJgVU+Bb5<|-L`3s;jW%5d32;X>Vwp;eZ#Rav7Boxd?L~4KDRGY z{GOuo-#>!0<^i~|a}aJ!8`S~=Y)IMbc13qQqxSTlzHpfSU5@$x88iP2j24&7{`eUg zvKG=qbD}OgkW=PAYBHQ5x9*5k>yIx)nUl7KLhi3eIf8CX0ATc*G}w*v=1EbQPwduF z)fEHu*;(1|eJ|1obJI`x-c7sPvslNIZ7sbm#(|EDG5e3-t(;_P^_(IEmrkQ-+p2=v z9?Lq8vU!0AQ#G;k22sokS(A2rx8duKH6JXZZKMpBXx>NprJhF57DchXn%5*4vK^&A z>*1eqV+|9p2){i)nJ$5SZ$tcIZ}T1D>H{soIjKhd5A%#aBGNy|_k8ZxzZhXk*M@XO%im#379U zw6S#KzR$E$=bR>hecFw0+dM`tk!=Q8!F2rI_X-j#nd0Qpx;fPjX*mG6=nXRvE;z6|QYz)-u5$Y#!oW|;rpcj)SA+Upa zKtc_ii!ls%vtP8sdKtw(?+Cn@JkbEO#>f$X*0==h)9yP2%_+bRMmo3~=Dd&?0@%S2 z3);r_CU`Au$1}a>L;D69609*n!@{pjLr$@cJCVYi5;p@m*{5oaK9Xv?1)DP^`Ep~S zvY~+; zMu&%wSr^BQm>xR{G_F`+nhBQn>I~$gx!0_PjEQKSJ0fPBZh0LO@jC1w;tdoUEX(ZS z8zbmbZvgYgF}ofC-MBQ*_$F>_esy)8k5HM0x}?;+ZiNgfdL3=3TwI2J0zF?9zD~?5 zlsm>>CS8lOed+1V&^*4_8xG=Y-eU!&C$Ge3^92dRzPy0mVPCo`S3b$*{>A1BO)ySR;^O`oNh_j>VuX7{UBCmq#^xwcqfRwOEY zC3*wnr_C+GP6d2j18V0Bmpc*Wvgm~DBe;mkbjS#)3_p73#$Pt;)Z)StKi|j}dRwO# z401`@8(my7(9}7i-%yc?m2FVT;L6^YIvwm?4MThn6JW*07{iGv<6abS*ey9VKybw36dR3vT z+$_lCUs*-?kucx1+@HT5uPXlXk7MTFWs(`$|90p8?^Y&=+*BM1mez@C6m#2JemR7| zfM*s2rhmBO=?E0*i%Fj`AA2E6LPfUquxcvit*C>Y*n0Y%P`jAreL2HD8gwr1*;!DHSr=|7ZlI$q zA1zzZME(~Mv1&Q3aKLaMIe>4ZUAhe{Wh8LYdGoYrS`Q~U@|k%Do6JGV#Zq?7iH z%+Ab6RPDTlLktP)dcKa;t)_rh9#p#?N-`he4ZB#O9T6^|0qTWR%IYGC6FJY_gcNuE@B zCgqEX>@YoJD&P*MgO>hjwf?+WuToRNQFM<4jfa$+O&YxwUCCp*GDXP9shJaVxhXpq zC1Mjx-FD~sM!v=4Aw*k}bXJv`tCAXQq(EjQkG2I<(+pD-4<#EYSQ5Yrx6tm21EYo{ z@_Y5v2o0w17*qEW2{CS3*o>gU3~$;T+jk3N8^%7HS{Vx>D|JjFc)m~^Z4VRU=1){V zF2D2)wRq~qL5tonFv5NMp$c(PCpzC4pztw<;)owx#&_F!bp+#khw~n;f-gFo$kWF+ zSHc*qI`fP)jkV4%za7_PgUab`iQhs52z8H( zRN_TS8fIXvXg!P)ZylP57hx9II>U>22ag?bta~@v0y+T#=dx z|6rLRcr~|Pif{ZkH|t;Pv3Nh=mMfrigH@omAdPw;>8TmvDvh<;G7sNT2QPL5CcJ$@ z0mod(mL!6pQ`fhO$WX4g21T!c(-PsKU|H!ujU48Gmo;W&{ae;}DB_v#OnnVz(uWiC z77YG1Ts5Qz{I2Ghzj2wPITF{#1xp8EXeC*bI)eroun49AHri2R8L?2 zx<*OxFg()Jb@#v98i$P`2jah9j;b@Y!3B(9M}43et-ui|Ai_ zK0(vSs`dl@bO4GW^TEJe(Pd4o8_dmi^q&|;-V=nLYbl5teS#Ij!A$9HC5R9d4C{_TwU|{NWJC%?gRsDWJ84;Eo1Xcjv`lvV0&Q*{cTFv9lm$XbG zjd@ta*Ib`}>&3Kth%z_&Z_07$I)@ee8&3Chyj8f-qHal&(b9l$O{@d4#gu#Ujo3pW zf84}{w~KlalUfbws_V12exFD`j;QCQ_z%o-eA$5)#(Yo`<{vTy2aY*!lVSDLUf2H|`7aXSi=JKAMt8ahX#oWjFMfjh?H8f%Q9Rnfn{D0fU zf(L(*gTgf%Q4kD~&*7SeKj9kC3o0}c^nx1yV;9R6G3o_AY(Oul1M3?a&VZGZ|SXNJa$c$evWE@{qFP7*;5)IzN&dC0vbAy#tml^G^cmY+NvGd;ixHz z0~4rC4RHW5Y`#M2Ehl2_T(qIt8@+$bePPxK+SXsQyYmw76jBv{j?qisWr)H3DQAP39wIe{=(xg6Bk8!=X^}K zyrdOBmWV{A)?BSq%VwPF9;3tfmcj1YMzA|a7QP^tUh+28g3O){Zl&`G+?(L51*5hI zd6ZBk$fGf9uGLR)vfhQ#7NQLIDKaD=Frg_Cs683Ndu+F}Va7lh+%)tc%=g>2VZ?a% zbZSEQ?a(qo!KnpWsxYy{oV)dNUJ}9zg>;*83Rnu>U|2pn*7U73(+(mlxkZ!CgaDGP z{gkCc>M~4VkGrJTcpRm4gP0<|X>GbTw(}-|ggt7#_zn*#HN7ai05FFXuf%~l1O#Ye zPN^hL0szqbuEA)&O%(c(od4`?>6-2ClYidz35C>&mL&SgcQwiSK85X#A^wR)sRXp8 z@Vrk0@$Z)h6+Z4$NCD)sysYme)cUcxqnZ+ML=TK)#+P-O$pez_C+&z?rxirTF9{!N;3| z6aLyX9I%2dwiN@~LIM8s*`k&=MF>x77@)5i@0Bs&Yewh$2d=LGpxHQFhC`4O{uq6r81a@N% zf&pxqyVoy+-=*c^3tV;{8AfMF^;0FiX=}P~h~>Ug_}HbxKwolxUAKDf6=^nfTBz1k zTX}<;(p^0feKnh%v!i*3YNU&O5NJ624@M zCe$4h(71scOl!`C^S7?s~6xwt79oj4T z-;^*KkP?OiK4uz8fRymj@04)Hb7=3`T1fpr*22sG&XwoTp4IQr9>*kry_o!2UAF-^ zEowYF^`Ap~(_&fD&cx+@o+N%#Ane71N?Dj<3|4lTj{QG$du_lB{YHhY6T0Q8N))P4@>hFsu6`Z?EAz&*e|Uw+YVPS483bB6Fn)9p=>(@KlAvqFC?$I-rBZNgHm?RL}sH;ehP6}=~9cxZq z=km4V7TE128=uE?zG(XVDK-AafQbR~>_a*BaRx*5=rWDZdsnUK8SG4_<86C z&2a-r=dYRg0?YJD1L#^5R9ZV8YaQF9x^EBl>(|MWLV0w5s4s)3LByJzv2(#jaKV~o zcMa(x5iH)jZ`jMUKOp^x2yxRJ8;;Jk)Iv$hh_&nXaRXy$Gd)E!m4M#jDB6E$CTlV4 z3r$$aA&+30AEpliG=_2YFmsK^{?TZE$b^NSxt~B9!_c_q#JK-z40As{YYf+#J>Ssi z=bmyf(b=ASr4{Ke!i! zpA5at87lrM>N-8^7HQWfc}r@V$g^m(8}=^SbyB?=+1fhsPxU1Zuk@DqOsS6^TOcaO zkJiYmK0E@#=QnZv&#c19cpl@z)ir?UOz2%I{*N>2U*?M0{ubloi3D=Rhi5dK$ZFBz z@^K&iLtjXIbPBA8S13MMv~=iFzPTg5I5yL%J!*z2|5!l~MlSCadt3av1<|JbbPEdV zW@hDFS+sTF%=qMSgYo_z4{12XC>9UN7Fg<_f>y_Su{A4ZbRw2aeXcP*iA-%eFeMmh zpyhELuTH`*>0Z63s}*GZ43j}(?A2}n=bZj|E@9D)*6?|GjBcL`S{^q?e)f?B{qheoG zfJhZsj!rdW6ft}Q;2CIxr7Glj zC>)sx0R>QW)OZq8Gj&v3kLF@C)|oAD14RXfip5wcOAUoe{FvKNyTM9KW3M8UDgG#J zgWucZPABCVm79gDDE4^=hxKgM{T>agQ%$~bPt8XQkhV~3=vi&S4`%%h-dC}ek_6Dr z=bX@6olACBhzXCe36!PVrVJ}T8JK@bK0=lKau9>b5M~@5F;r|^`ZZgDhnh`fu_E^a z=MkH0s-EqUW2tNP!9rtW_Ps`zc3h(M7ty8*i4O|~E(4yp5C?Bl!gJb}*r{`skH-^T z52a}+F~L%|-Q>yL`tBMnSMA=dwbvKIFe%!{r@1 z#N>1C2VdLYovL}r^Tbcb(O%^8G0+rzLDmd`?0t_#zh*f?=D8IF@lJqjfwqd0%w0I< z2|Na{f05XI5U(!O%zAEqw&}sXW0vp{J%^eu)cgUVz>2>U{GLFB!i+kTLK|Uj0>j8} zslTmejOk&o2`m;tly#nY%=_az8JL%6JLxZik*8k-Z^`aSzSVlO*t;c27V3r_WVD2X zyl%S;{;t>VxJVGfZf^mLNZ2OiZRP7CPBP1La88JDGkXS>#761Y68P>W_XlJzXq5fAAM;@k(T0-EM* z2@LP_hF8ykDf3P&^&gkVEdMer{P*zQUpJ~}RYfkD-pX5FplOadRI*KM*z?^9*>iV~ zp^#A1aAamr8inX1DzeG%8x=p#b67Z&19g3E@UW=)fq1$V>uNb;u&g!bIlbr3-McNi zOqE*ju$-B;)(3J`By9cC8oWr?qwyOKhN*OXxlXSdMa>yRW%cBKs~ES%vhgFqKozMn z=91)K*CK6~XTKH?Od;4Q2F~FoeWBnDU*bgFcFL#X)d!*)!n_wn-;3$Bw^z1y&%MGe z=uR6nJpbfvw8Ye(m&fDCkl3r^9!a|%&$2NJZp3}mH zeeol*o2eDl!mLl0`F7<=qh4&ju^8z+(NBZAn^Mx+xS;Lv{t$&|!xe%*)6_ho(Rb57z4vjIr=i-Qbw;Rau7G(*D$|Rkn+&H zY_WUk?SCg^g)>!QUBzKlcHvT~t#X68w?y7C;k+1{9w68hwJR`-r}crP#CNNrUdmL1 zvkWD#pZ*Pm;*d^ftw{j8Umkj7Xn-}Aha`B>(APW2+^Lpn#87n$4!X%hKapQ0V%UJ8 zLVDDtUp`h1S6(0ntAw`83E>M=#x$)Vl_UdW=ya+2Va88Xl)EUqnr;HG^)|63|Hv0r z_|O345fD^}f+>_mw?nUyMfIB8ATe<-1lUxd_4akYL)JLe(C~{W-ckpphpQp{tNO~E z-e)XD#^aY(qH$4u8r|YBAV)8)h++1`qM_!t4~|FIE;At)k@^C?vBR$tqnDn@N?-p& zYO^@krpakZwfxYOTteLB(OzX0%v((bjdvE?t)^RNL~`6ej#s>oP63TmQ-FtHu9r>{ z4NZ-36*`9ukW*xuKGuHGjQf=4g~-kP08M^lE-5VYF$NviU^K8)4h_z%t;9QYZOe6y z%;_N!E#@>Bb~z;WSXrjs)dB6zzCR`xY%46~3MtpGCN5Z0wN0|0xX^MkV0PV-Zt?NQ zBabSpXv=MqoIVgL%y(GB3(!RRPkmOLpzxlBj4XP_u(H?92G4NiSNMPWY+?C#X<#PC zza72*dRh$*}G5 zxozfo=IZnyBAi+VE+XSRkdM^O-bD@_-(~)ha^V}fWF4I$xf^61AEm9oEOFoofJ|*iqf9(Nf#6258j~BP=5)_zDOdV#@154z*!j?! z-eL~`*3rDALF&ag<1#=jQLFgMIY@e8XCYL>4v+Y{ru~^HcqltUG@orih$#yq3Obg0 z%^?Utzrt|?usY;X&sZH{*6cIRGw*9=FZ#m0yM2dYJ-dz&^(DHFEP=fXI5bhd^?E3k zzpha|S=0x}K;$OfsP7iAQ0xI$Z`d?k4?I`1UXK|ieYv%pXQW{475Ot(2f20_ke9ZV zOSb9xsT7x8fZR9i>$BGYVL2Xz)q#+1Ukk~AQd|O*Tq3~-b9?$g`yk=10)P}$pOV2r zW&^M~KtKGuaA#?4=X=%9*6~-~$mUgalwyGUhII*1>x$LLmYbc#5$qVEG zfOnrp>%PZwUCUkeCL`NU_WHA#Dd5tbs4X|r=qxeEu6<=tAeN;q?pSeM)Y!-Ftz-GC zhT(7_8S{|lT_H1E6>ggv3;(3{t7gH7u{6{#H)E{)-EI|hT zz=59d%oU~?_rX=GQsb6yipBaqIGOvJ!LxvpaM&G_h$daAJ26AzG~*N%C+)e<`}A0E~!Hkpq~+kwJppHlUwW&Tb~bkTOS|!F&gPn{|1K3 zHfcEK@!E$U?YVqVI)(}de71DSnU+SQhUnp+K$DW9=hPEYoJm?7VT`ICGA}~}W?=L)9nS7SG4im^DQB@09I4m>`I);IYeXsUQrH(17?}LYoS`yZO zxD^FU{3{oLS9#gzCAmp4<3A3jf0ZicV)>gMr@;n~3FY7nbZmX7AXoE35lv zCc?jz$_xGblFOWckZTL5C`^GW3JD`*$kVO?H89+iB%n;OJV6Y3JqDB7)0`L9#*H`^ z#6SfN^lYDJw2L!`%^uJG6b+P0uu~L?`@KxJbv!VVG@Yb@$JAfnI6~SfJFwG}J39oE z8tXu&*yeYpSWRpe^o?VCC^q43Z!Tc9=L7o2@rqCrqhX`PMRJtIiI9~mdH56&k%9J; zWOcN7k+3H#P2|E$Eevz@mpN_2sj=Z+)4GoT<& zVOv&U;s{WPQm5G5wGyTdW#yhXA#j}XSKoN{DeqxUre|v+t(tLBa%D@zA(YVgQLJ=? zh>|MIQt}&%P&cw!mgkd`4-nJngav|hT=SbId*G00bvneWa+(fM6-wcjN8jiZH`22~J3>2c?CwOsA((H_qewowANPU@V z<5<<|F=wQK8-J27im7;4j2(E`$ICatPMw(6WbLEL!oNSAQu;vaAlnh!o7r7e!r!J7 z{R#8u5~BJ1)f0m#T#XCfP=iIzF2(dk#pdmWT4x?O-GUTVUCdRL!jFW`lDG&W(Q2~b zQ4Yi{de+DQIZgSe0mRYUbMpbTne}mnXnHk>m{hI^%)-%-YTJOXvu|D(EPt0$nff+1 ztWx~b4CtmpQc0R7b@gOOv=f{m0UtOgMoij4J)hm0p-w)c3%fRA}d z38Q9AZYmkM7xIV4kbw`JPOQfhtw-O866Dz2J;lglWHQrOfiWgj-87##(RX<&euT7SmcBl;FBf7 zi+1KtrVm=Dw`U+Gvd@-5k?`Z^A<8N^rn$IrISmhcRszni^|!~!Yt6C$ScGKxm(kz9 z|K$5@@Hu`X)!)X}*uDJ3^^B@Kr*LAbwuNtJR@ZvU}X%zsfv7_HlUt7mFai`eYR$9iX zZQo8S*F$0M)uxXjcSBQ|d91i2>px3&0E$VfNF;q?D=x~oe~L*oVk!0F^dF+`S{z2W zF6bJ&i4|5j?Ouz~|FE!?OT_eOH+1%(&(VPYP&!3lvhUMb%9OcB<pX zt3_dZ)?u||l@?@?56LQy_VYde>YcDbIxHOyZfP`-4od^u>FiWXn1^$qQ!8DX$~s!q z6mR4CT>~A8<59(5TTH;(XiOTB;21-PD^@rP?03n$bjGaSy>VDoocgPoWW;6kti$3P zxSm+Ba?JYFY0VMDd7fa!;-s$|-eVu&WKjk*vrpfpcvKuM-l zi{i43O1y<@?&f28OBkO-dsEI#W9ci)g7&RsgB!78hn?fDs34y5ym7MB!^*)L>Ju|^ z-PcC=k-{!Mr=tY&oJ&dgjfI1YyE({}`U~WrkLy0n-4Ka}v_*X299~~32E9?tmmQW1 zC=Qy26T1}@vlS&QtL92HdYzGH*yi=dNn9W&F5=$DWHoA9ZBUV)PQPSz*2)kD!6d5ZtAk$36*N%^=7LQK^ zN@0Gs0;k^!ZFIUxQ9j~gd|82s!{9RiI(Z?w?}P7qpi6+g>ZSs839P_CU4r3JSh8C6 z77Ecoyd6w_-!!ZDUeHu!kW||NAFYt)-NPIJp8iN2($K> z)@$)M@~S!!JnJl7ub#*bUzF3|jFA}6MfuD~ydD|reZ%bm`}i^Y9PtDis4KO1*?90h zio0Ih2NKr(f`+ZUtn$y2xA8@mBpSk9#<|Xl>%3Kxfk9by34(_X(eK+tI`y8WS6pX#huEQQIje_+ zR8G}%t<}SOPLT>8B7BueA{59HdHNpI08ay;kcp2{eq4}92c9Kuue*jpR0K|vjKg0(qS)5H=r|JAJUve~r zwSY=N&6YbtCH}fY_?u|WFeqnE&jYQ@sKue3CjY&q0|Es`P&nwUl3k#DxWi# zg7S923uoho3%E)HgC*^GGi$onO9y!Nn${8jn5-0>sz{Im6wxu1fz50(5VtD>7AAu3 z>DO`Sd3smR+|c)Txo%9r11CEyao6Mk90#pwnb<&8GdsViogHr&c;MvFQTAvnQH-jE zN`ELSu(t-0`7E!3iU2ZS63W*|LA+gIfXvs4@ch8JS1I!%@FYXmJi8dz|7lfvi6tBQ zJ_1AeCPm@qQ9)Vg%qW?_A~jA*a){lP7UyWhQ+hf-bbs%dOmg0>cJ}U4MIzjMFTkle zq6L-ovqn?+=7JgN>}99Lh@)<219(ZA6pU5#h6tVBfoG8OB!pocT)gN{Oy>~QMzLgb zdg>Q9Fkizx=2^|bBiu?PRcXN(*&CNgFy^A!We8cd^ERqGT!;D<*yrXdopEhijgteL zcfhLb_EL=Y)7(DJ1cm`HU_Aol%@fijXg7v%fpb$Kyv82BXK4)f9SDO}_Zdj@Iz@gE z454`EgA#RxhEi>nmPw|K*C-?yRU94By2Qj3p6;;m!+guBsL77Nveubf0=rr^{XQ?C zJYx(8ZaZCLgTz4&##webFqCKvk>0OUmgAs!Zwo)S*b`c&E3bN;TqJYc|MVP6$4@V) z)*TjK)jb%0(7a#j+iK0LC%EZ(H;JHtwIcUm-tnFda*$&$Rr%6K2aT|LT}bM14DA$n z@w}85JB&sPA<`vjhbARQ&q+F>1T7^*KqK@z1$kjoN)8ivr)EAP>gSKWt-K7EO<5Uu z27$s50TlwTgvsU8dmhi$MMT@bK%j?YO?cY&xGp`Be^H9bko#W^r0COpnt}sV(y;4v z$bG13pAc)G_LqW>orv+9S4Kbi+nvgPwO;A=RtH!P`g(amq!@i`NT*9!yVQB5ekJJb z8i8^sIp-r!VymHI9Myq@(5dS?W1L zI+cxKNo#?>nZc}OAy+8S?++{6AJtttyYv z|5!amN=F?)R?kep>S@e>LTw)Bw^&JGIj7*TAKM*jUtF1B%&W|?hu=$FF^@>%@}1nG zk>09cE38<)GydZ>gH(ZP|+k z%$?P+R2^jI^SzERtgFSL-0EayE>Zo73o@lbSrcdIIVlToClS5G=elD9W)w}n$m;H5dE&tV9 zBH8lKo`_sH5GfZiItdok`TcBtFS8jxvnZ;hNvoyse>ya`DkQ&3l%DT(V$4XN`Zk!# zdUOdn@FQj0%>aj_SWQJk8a$0|oam0t(uIs}j+Xd5iG#%pl0M*kS`2A9RmSTq`Z|7p+QX!~zEQ5G6v}10S zHjH9nA2?+*M3k_xJEX6E%ve5(Uxg#2vnG+@odlGEk#kQ4-_%9HNf}MIAk;l>EZ4qd;xbMh;AU`^q<_Prw@x3B!kkbaV&m z0d0bT$q@)FlBK5;0R*oKvws{n|1##w`nRu}fznq@2#aSJH@*R#5ob|ySmGZ$k;Yyd z*x%J#>9vI{_YCL6?hIDPsi=Y}Uq$3g;0wrDZ7C@W#Qz1eI`BE(1{YYSII6?DxaE6e z>BQXkZHQ&0)aadr^`-6-_F7%H94O?gMu79GSbY>5Q^+<9+~;h~4K~9auejBQzw*>6 z8^1Y!G!FbImrpA7&*nDd<2w>0g$Tl?wX0h3NOEIzKtZML^JjAlQcx8VJSq7R9Q{^M z75r9E$vCfjgA`Qx_7JmJo0lE6K;Di~X|Uig1yy+5uL(ahYfM~j1M*Jw&MzKK0(|~f z0~mLVo*FTtJ>tNpjVs=TA}AQ68$-PWqVeUcjpI{6?9R`9iAzwPm-wG#mxL`mrWeAv>HR<)C#_N$f zsCV+ua68hg!CS;PcSDq@W$qRpLI8F=zx-zh6|lPn>XJPeT;ab?`6H-dCEJQ6kSw(n zn)hRWiEtXJ^B8-T>H|k-Vx~O|5|^4Tlg2kzMf%IXkIthc%x#D@Gy8QOxR=k8PM1i| z)Zh3#%F+Br(*Fs@2$wkpeh~}MIICfKB!gtv|MIgllZ{=A;|UpfLq<V0jssk4SB=jjluajGOx&}iud1;gE~ugIR}pSs6yoEJZ# zb$wQ9PrD$_C|T;zD)G}I^8^%%>CPagbx)9zelbh{+w0SZmsu^A^owkTRv?F#pPc50 zKJkhHB>zmme@QchCSaYagn4)v%cnoVfRTVcBzVF!^cCkm;RxgZ#qAtiB^bi}&Lb*8 zQvx1$d@3@gR63oQZaeq;h|~L>1i$s~T%iqkra~hN{P|exw40K{4n~v=!|HI(^$}HW zYU{N1gX;UCc9`^MPjOY8Qrw)aYQA-j3D;S)$o&q%m7K#?JdM1&gXHb2BxZZ<0-|bK zVf!tFU77{-sF=(^kPf-sfkywgYtwWze;5U`1&$S4Ydg_9v-y>wy_}Ilb6_cTnki-H z#w(Jg;Pfb-9vO%Jw38~y_es6>mxu2^m1{T6c4NGUpzAP6OopLnM3qTD@y;Yp{eDy> zHO+$hXwtptSn9Eb9WwpvtXlvC;Y22qzR#zPx;i7tG+f zfvV%ibfzLkrp^PD+IF@6KaCc)e;4OvVr2fmtJnjjYwQS%SAd~hg_P&2DZ zsEVescg=)7y{q{4j{G8MV@8JJySeX6zlH$o5ZmYpdr@y?pg~}&{Nj;i_xkg)&&J-_ z>f=wDhimxX!(}nK(7#z;q3I`~ZTGc56MA@?QJCkJDb*1KDGP1~?Y4VxUvJ_XIcF7i z*oQ+O!;KwDE;mrzM~5wl%r$eA-7swHttYbCIr-emu%@V=Mjkn-c=c#InNkbZL2>E?E7# zyRH|7ar76H#wDV*lPF-zK!>1pdhG>lj+FyGv3Mo9dPLu;UnRl!IM(!n+zroF^0&c> z3l(L;6g=ey+ukuzQN~r;(*D>ZBV0AwZxvT{+Wmiz z3X+1LG)RMVcS$!0NT<>u-7VeSE#2MS-Q6LLbT>ZVy>aHg@A=LDdCeJTY!3EfUF#EX zOR+&#JRpqy6$G0C*qiW%lL`QP^9PLS&n`UxHbn%6P0@3$8G#9RGe;i?ZB(_0kNlzM zb31dBFR&`cakDWnj7DaL2b)_)oY<4HO-&d=1|S8SPdMIlvMsAvQt@$y8ZejznkzG} zG1SP24e2|*PhOSID6%c**}^)Lu;3VJOyJn69_ecQ^vpXUkC|*KZTI@aWBy|~6Mb@~ zP~cJdnnVTfIM!YB?pdb_ThHrAW{WZQl%F3tKBX!DM5)U|dmt(~i#aSi#<}Vnt6$b}9@&-2T7FcYgA z4WWBZA+ich&JeM{w_HGNjdFLDndjvtZV&MZq_{@u#yd)jpxT4|Z@E!U-#dYlyq1s6 zG#}T#=v+Ne0=xw%v0kNNaYy%vP!DAKr1#WmrihrkFW=+)Vh&E*VQ2q>h~D60+;m}| zX}~41%w&;)wczmfljb8^UgjfvxBTw3L5%X_fcLHSWW>YBDn1X_HyST^{&@f5y61M9XZPqwUL0!G*$u-ooGIc4$Xo%j_v zN;bWGf1W1^XQAGz6{)MtJ@~1AX^xS(R*N3nq5>f6%wHz=Zq)GZ&;%8e7{a0vmAtAT-PYLOAS(TJ@aG9Ws+ z3C%hX&J!&Ee&Jm*xnmORq^@MO8F0$kJVFMPq07OkIe~FhL+k1T&h0|}ih(xS?&U&6 zsshqrQ<=^&OR4m9nJCyIQe;W#*f&E$=ibuJ{g_$MPSZL=s$wDh)An?d^3xR((nG)% zOiVMqp^v`++f~2V>mMNm5ESisUvAt>JN5`i)tM=0U{3xk$m()*mK8u7e*| zFlAR6592ZJax-~!=Qn_QQmcrkK0?ZR~|!QI&D4O6yq zK6H^9CR#SH*&hF#Om*_r@@-g^qwaHc>f6tgQ-`|`4X6b+4Z5?v&gxiX6qf|E8}_C& zKe~^LPz|F3iGNDYmJ{e;L8B?;Vl9jmLKY(-iDmj3Rtz15?I8HOLJ+mT-Vh2{C!VS? zbted#6S{0cr)=+J9_Wc1`%!HJhyGcLnWUL8BbI>hc{TN5K(QH@XHf5+{YqS%dkYV( z#}Pu%`(CKvC`~x@HWMv~5{MwYUyQBLk5IH?iM`OFiM>0phOD!ELg9zKI|bq4c3(3P z6I~uHb)pVicMyV1pAp`$YA@{v7;)5Sg-aVGhXTL-l+6F;^Oo5{J!BwyQYZ1s=P~im zNS;rJ-xbG~sAZ&qr5B>~*Qt+i8GhOV3KmG>dtCx0UV*JVzJcE~f52sI$xT$X3JUfh zwh0Ql)g1;7n{^0c8={~Yh8L~FM~uTW_F!~*F{yRFJ*+i&g*NmU%Upw|3@@dJ_N9_6 zD{Zf8Au-a^@2bV+8KS`bhkqO_|IWZmNB6gNr|-Xd@c^PPx(hTdOxOY*z?V`A1T~RI zt)!Au8(oqFe+_ki2GKA^qI}m)stjIs%Eug2D5``=LY(E2oaQ*#DM>`|4ZkGAqjS)Z5j;J zmNjWMvo{u^?knJA)e0kso#%(^v~iX8QJPE_MIuX!+U;kq6c>tC*$io!6*YjD%E{p* zV4BGJasYHc2pb?zs0nRV2nt04EmqK)N&x%rM=Vf74r;Lyq?lHk1X`?YXlL+b6Max| z#*o(l@kzxgVH!%;&UUggmj=))@1>k|)Yb^uFXej|AQavv z3nN%4M*vrw^rx%MUT@vnR{_(&Sq@dZVxWio;Az*f0*YtS6H)5Es|OUO%Wl9@kzz}> z5BLK#-z^|vAn+&6w})G_5gQEFq?sB5b{&zyQhtDvpd>lteZZIm6wlbIN`}aKk&Mm) zN8-Jl@S3R->popapt-W*r8V@V{&y1_vQp%$4Q!xzMkW&2b&xHR!qYCD4+g*9Im}P| zV6-((v{0jde;=%|aqURGmn5C9|8e?;EtJmCm>u50N%>>;6neOBJdg*qC1b)pNV5*% zc_pb(z2dB|0dKPHExk0c#EoJV!(CRXz+-YsZ!>k`<1BGua}zc>a31;YeRF^-y=2at zmXy1+2-3BFE>YCVK-;mzY@5cxu)tV1TUYRdg9!4Mo@z|5EwIzRbrX+v~B>W2YJn@pKCrn^?}8(MT1W$c8!+bHTSjOd-XQq zjlqe0Gv!SR7wu#VNK$!q+;5Qqu62)r!yM+w^j_agk|2ELlZbM2d~qP(_RSo^U*>!_ zzzSGI4DndSaYAHG$6#&0dMsV*dLKC|TI(qOw>KdE9R^#_WQN+Br}T}BqJ>NaOW)}r1RdTW zqlzS|u|w7QM9^(^A^p8J@E&9Oc^;kmxUqNC^>F3scm?(J9_xr#v^y0L#qpsz3O*6m zevj$t?EQ(_fn>JgI~}FRGCCBf8Vfb)27Uh*yR*)wVfNFpCpFVOOOg%HvETt63pnebMW=K!0ihFpXzvt+Ki^~_XKpYpw?79%=VN@K+ z6?%kc=U2XgA-~lhT`%w({GH6 zujg$x=rPvv`!PliI`zaxyG`o<*JF$tqPYe{{=LH?3X0gM^#$R^Lt;0d>GC*|8M220 zBGwuezkdzjgW%J!1#shM_I!LXIt{SEV=R@S^1mNr>UF39`Bz*+8zBEmGZm2XvS6iu zClh1_%4xh~aD;%z7%5B5z&2|((R;`WQqk$kEc*r0wm@_6S$T#QI4g(60i6*I%U>AO z(W;kd&%qQI>?%JAb8Q;tyCRTp1;}$#|ITyso4dT6myLZ+Q47QifU~mgwAo<4>+h@b z(a1y!LdR^8Nw-Da_aw8^^qv`)6|v#TJ+^IB6G>(2wluu3i)n^0EAlw8%d0l*%sMff zBxRO&S(9I?dd7KOXBU2IhIHI3xnj53y4u%lI-sgD-$a(lCt|d*`!DHSkeh)GXrq;A6Ndejc!GgI<$kZMmtk!ig9 za3J5vd?NOyidnGY0(l|=os#gx zMyH%3XQPWy(1(;VEzcUHJI%T4mBee1G&K)g%*3c8^C=0(Lc`tAyB#UYYx%HGtGxk! zblEIfJ#y2_o$S^eEmLi~{NwETw=Utog`5729e}E_h=@UeyXOnfo2Yyr9+OEviPrWUq(qkq2(gP6Y3Y`sNYpZTOcg`*EAgKnAmE z`3TUpBtx9EAXVE4kbstQd-#O$M^2BJBT=71X?lSX7u0~b)?GfDb@*4xEC4tG0NerD zZpgj9JLIndWP!6#s>CxMHnjV)v~k~2_T-kP^aWXHKt5qz|NL-<${^?juUMp|SJ|8( zjui4j)65Wn--P$gw08jTn+NnM#&K1MIwJe7z99T2J%DPF;lAL?6jhZ9QTXI*SlCtV z3drbSz@7M$jE=7N)9$-}J(YQY)9E{vf=+{8?_jV`Sk1UuLGSWGS7pK(v!LpNRTORV zMpAR#gjuCNFX{W>5No5g%NqT1x<+Ep?*B$%5d$E?Lu;vf5 zsZSd!+nE_+yWE`O28zd%RFl-%b!uzRE@qiS8>dI*RCWhzg_xy_rgQ>d=szsY$?x@QL=1-fc#aT~ z=c~h;2pDL%B*vrzP2uC~SAEUnSC_Lb%!cI)6d zMs5sc0K{=q3k;Dl^K(RcD^HOx-PN6607glT=wK?a}m<_Y(F(&*e z_3MedW6TY6?-{(aoWy47T3^egFIK}A0Y$id76G_7A4ZH@+}8!d(%}oRg+u3TNZk2~ z$fV*0Y(Gbf>cpx*1{7m1hM&ovSv@~RQrNRTWlSYepq}lA>i}EVjg=+3ZAG z@m~mQ>NYvuNiO?D0awib3vvO{txw^!OyV$j#h~>=tK_4H>OJK4y>~U{2=q!~%UBpp zyA1auOF|z{Qud<<$R!L1rrY6@Ik+SwUY}0b2@nnH|KnWxS0-UPTE_q9PV}Xh990-{G^2)qWH{;e+8EoH?T;x@n~6U`oqfq~kb;IG zf!HN)^{Oaf?*U?$;P&ClsCvt=NNZF>Md|f2*ABxLLcHizQS#n(Y2YHXTbJodJVUhc zi4#$FTL!lD7Kv07IfcgR<5zDZT;SctDv%&nbni&38N3P6cb^lD z>?tU8*5%c!V9i}}Z~VxZYP>tHq`s^gw7f4HVOK(nZq>BHD>O}X_AUZwGlx{3Mx1mB zQ5ipHbXQnbuEy4#gUu;})n)sp$R9cZ^GZ1q2tye)-m87b@yPn{$x}C~dX;Xr+LB5M zQ7<+FTt2L#ARS;zC(tLWM+a^*$KhpIJqytz^tP1x0)(L~oyI};plWS}M(7;!J>~8k zRJ}xyQ+Ne`ZB+G(-cEaS;_y2BZb1_XDHVBS`()sf>ru|`SI|9Zd$$d^2jR>{wa2+P zGiJ6@9L7W6<_c7|^%N;%WMjmWXx`ligfeYCH#t<2FR>{Zl$l{S0vx&zWqr7$64~!# zvoc)8DK-}$E_>!*oixtKD&P?N9@;2D^(-h26x$93moZ}DbgeCw?YUA^ClFll8{3@n z)E0+Mj`)_{3~T^Z6B}C<^yX+>nXyFq@?UfGt_f9QbGi$B9JGH*97kV@9sES+Q?)bk z#VEQ`HvY6Fp<#OypubA#l;Ge4jg>NmD%Tn)obXt?DLKeYKxsa1UY)88sTuJ$tTfEL z;_Q%eb6B<+QXJ^diV#_E8jICfBMU2+eA~>B{ak{1zzkKp)nu2r_<6j^m-@(P)jnAE za_-@PVj6XP3Uq7G;!~I3Or{twSyP|}nQ`nejN2hktGP~YbJeYs5F=hpujxXgn5WX; zm9#P}PdiSc=)O*__>6;5r>a3vp5%O)SDtn>R7~E3G?8!dYvV#5>`Hupa$aNSCy!6n zsY@6po5U%|=!J;89P4E6%8Q{uPx-hwr*{&X+G%pmV!vGP@1F8;loY;aRJBE#2kq;U z0)kwz0lYK49mdr5qRO54x@l_`!Ifc^3SaK=#@in;4apj)ijB4|EM(NWi7}Tj-9KML zKbLE=dB~|jiraTcZaqeoe*HYsGU?3A$Uc}fD%p-cZleRSRZGteBjFB?2%%!GD~gf< z@d3m7)3!KDs@pB@&`CA@KTel_Ye=U3Uja-!6cE6GQ}Yg@Ko(Ft@x3<<5Ws2#fnxJG zA_j2Sa)l;On6k%KF9!p@G*GL%R8kZmv!v1Z-+W1Wc4I}7e(%ZV5>vCXaqDF9>qg7< zK04?{B0h(eJ<_fe5JTv=8A<)49qHSfKl)G@zPS}21v$k-l%1MGc;^OY9xRwt1Uz%fHu{0W!LHf2bO~-uavn8Nz0S2lEq@ip42Z}37 z{#Iq5d&5CKBq!_ov9n4(^=YlUm!75?DR7mZ75ni875~>J%)-f1aNOg3Klxo1-yeOpnEeYZ0WpOOf(M}7vm zRC9W{?cA6nK-h9T1(3j!-#mN@bor$rJu#osqCy;d7_Lw;^lTpe0o|P%6XYEn3~G{> zEnoJI)=&=A{uypjUUgM+tmZ;Jx)mZ{rP3pY>#ZQ8YL#jnvZsC#)10p1d$>t&Gigee zmDI3ws8oQTbd}Jb-_rTI8QJ)#rpz?M?smM=`fZ?1kMZuzmjZlQ4n{@NJFat51&-A2 zHJW7OP0oyO3bI-<{O-ocA59DNuHT4Z4a5p|bW^D7dz3^eel3MBE=sJ<*ryV=6%P?h z?HeH1EQ4<&>9HDsuA!tLW=5QhVZvYdP}?fHG}o+$;VdcpagiWrOP z7ays|DkD&1oeaGqcpoU<^zb){kw(qvkUYm!Yy%v~_jnXn5h$Qzazt^UX&B1s{4xvs z)+`y%w*qTuvD2(XHE%x3?ac;rl%wO9ih01_M4)2eUGQn?$}&1%5OJ%10IL>O-@$f4 z&0C=k7N#wp!NaIsWhH*qi9r#c0_yy#U%pWr%VoB(@vctH@nbZUyhCulecx9W4#tEH zru4N)=fRT`EJAW_VmhF{#w2~l57zUI+No#mqWCBDr{IFRwP$WA=*m1tjm;C2H<+*> zncXfcMK{Jlhf>@3Y1NG`x{gM2z$34x0Poy@ej`#|NFiSf6;?01{SVxB`iv~{%M-9{7WD5|J_yI(7kRtLwR&ZZ|L6? zX}oc6D%PYMNk_ba9(Ekc^wG;Mwx4!}jOR9BfOX|X8Uu`yUea&CR!Wem(Rz|#) zponD|GN=}-iEG3v%%tuMXi1qB1dhv%a|K7><8qkTi4<^LmIN4=d(J91`P})4S=MH=E7 zlY1`U=_DSK3xO5BKyV2r@Tz=l*kA&>_#AVUxnSz&UPDTfmHU&2Q&jHLCLpBR5@EG% zT4Bo}M|og~L@=3SEv;$Jrq0{Jt&Ef=bOhEAB?AS3*)O<|qOiGh{Rj^jI@4pRPm$$77RZkJKhR>QYIBm(S zAVV=v%7chrnifQ{P` zsmYQ~h#T1lb;Vx>XWAh=eC&N=vYE1uCF5JUPbIyX*Tgme=@G(OZKQ9niy56f{RP>m zS+;(3S{&Eq`q*!(4{Tt%I{o}&D86=<$9I6iI*Jui#WXj zs2s>3NTt3?wgKwInnGCDBqo35spfJ*AcJq3^ZI1uHH!WLWV)=aSx}Zy{F~_ApGU~i z>4L?Zrw14U-Vss=)$y>!^eB_4`(B8jIw(B#y^dHO<+|+e5##zdX!zya+-HB}+HynS zXz$;Sa*4ohk#jd*!(3og6aM3L`Iok1Cf2|0D*rza79DVT`4y<`Q#m5C&=XP?-5<{% zdw4w&<5ccTGlp5xz5N?r*JL)==$e(y+w$69r&_L$uY&EE8}^4fDuNErgDV_ZA1?ap z%*{h0t=^;YH^go?{Z33KM+EA?rs!hq|8l+NkJ^UYd`;O?jIBeQDlk7aWuJQlrmzr? z6FpH_;X7e4wFx@!D{31!*=Z7Lg97l2zQ^a;ZPu7xne5T3NL z08$Q5wGcqc;VCjXAi|Vv1(#o?y0eoT9jAcgyLGTj57mV#e+NoW;g199sTruVq1m_i z32s%g&y^*BQeoJ>fZ?-Vo-OIKx)|!vDR5?z8mNVU^`ryt!#WZP8se}57gau7q#Ya3%oD6<^=5VC#}#$%S=>{?65|TiXNkABXSOyjqjh1=h?Ipq@g+x0o?M%8CE(Rj*ii->k=S3h2 z3-e`v>%=<@Qq8+ZloX>u$oa*xe2qP|Ibrp^Tq@;gr>|FY&C?lbF(J29MNw8)3%Eus zUK1MP$}_Rp^)sI(iQ8Wl>Q-0wn3OS6fnGvss(-$Os%}f_`z}ZocyN2RXgFqoFDz-Q zH$>n&ST!2fN_mERq^#!bm_nZ#+hmyLag8z@9Dakn;se?Y??Pho1qlu2n*i`V0w#1ghOV(n+XK{DR!m?mv_liZtEX;i0V7T(ob>C)S^`SCM7U7s-&E9^u+=O?R@ zNt{jFP?%-V!Z;+if2D_nNc^@Xk%p zglb&iR~`iBcsNr!G)vcE#QYyjuI4@`LxVuyb)Kv97X6*{*rKME1#7&z-&l5(PjhC@ zsh~v~xPm4er*_~UC(XZf95ekbnf?EE9DjKMr*O}0`z~2RKf9^s3Kk+?ixH>CVt>5{ z`{jik(C`^5|LnR%rUCc<+`Yss@@^s6@!{Q*PQKMU9?dBuoA?mR(tTY7T4b7`uR}KD zwT7N>-AR-uoAxjvjjyIPS#am<*%=Tt=x z+TXsrie}m8(52s|C50xKq!6u4{kIN9{#%CvS&ji6$_K1Nb)9|#n*wp5Mo+m;BGNj= zO=o@+T4?vf!ieXJ+wpw2S1{(Ol`I8-x`;*8GJw!R4G>z2o`iD#p`TKtLr@@7Ag&A( zphKYmI+UScITBFuNk_~}7RMx7-c8jtzzw6}#UEWoxnAZ2^a}fQ7ApG9UZCPm*nC!f zb?55CXjstK7O(@sat>7ST}+gMg>pm3&N;A9UOe*Q4Iq?*s`!|}RebG**1n&GeA;H1 zTkii_W(qgijEsb-cHgl#+?`UgW0dhvaaH@}=n~PHs{*o9>B2aMYfDUd%mZ8MmPM_n z)j;i;QOZXeG{vgf(V-O6k*rYA8pAF6s-v%(;Q-Bl1QEQ(Y;pOf*vqzM)^H{sOJ!>= zG4(@QiYKPY544#YVkUndG(r1Gkp*Y6T!nJlc`Pax+asO8{3}QskewJU;gL|WDUwO; z^?fsu?;{wv4MXMPh!Qr9KMig#Lb6g4seSF`aHxxn<>A$6b#k@ydbAlAnAw2?DNb%d ztselz2^ZU?Ro*(d9ppK#w~E`gL}$z_!bMSkqrOTDC{8015;s&LkC3p0Wah^Pu$}

7;TYCA($ADF9d*iNFglOkgwjzs#WAGUH>dso@j86?*rkl zuGm9!DE!6o@uC;o0rQ*oDsT6=r2qPKVfzKu06jMds^JgYbWp&2Ath&yZ#B#2SHHo0 zA>VYLK6p=f#3OOJ>6n?T7IxT(w5jVcUczqGnYX3Vv?5IU416IMST0OLlUrNCjb93pt zR@i&IImj1M0v;p!zZV?}ko_2Zxd0S6?8}9Xqx`-|Nug|5$X) zMT^#kfklTgSai_Y23Q}(MOWnq=|y*+wR+nf4^t#cdFvu;eeghUwB#J!QrgA9P~^_D zNjL8I;xrzzUpB#+RERZKo9wSiQuKeYEWVMsu8?T-Z0gCFoC57DOINOP)1g#F_G_vs z>WM6ek3vumZ`Y?`aI%*#M~}ZJOtHRRR6jjk4gL>mYyLQUpNj8FiuQ2Or{tgTCR|-> z6v4Z?*mR|27$!!>oaWcM%mFS-c{t!>rUMavRwv zumimgcA%tS2ikr>GUW^HI0&-A-;E73gAkWd5pUjRFVMJIM^7^iFX?p9sr~dD&e1^4 z=gLjxn}H7Kfx>R(%MEBXndx`9kR&Lp5O3eBU-v*M2o7k3tPj9gctQx%2uWdybjRznJk=pw z<|f_e4$`tuF~*0y$7IWEbJAd?Vdwjlqr)zCzTyJcXTm#`rBSaYS`>C#=H$F)5CqMI zoQt`@9RyAzqoGZSt+3$5g73>h`TC?OOVW&{BE6GrPZH}p5c zgJ^wI&)f(At&jiLH_D|(C>}UMG7*;-V6?swNPCP=*!lOmJY!0{kmC*`4%leybAydW z&;bXdsHUO3P}h5J(Ok|2NJ!X)IHd|;JDo5gAs!GC(h3TFFuT;4hR!6zBq6(yknl4D zqH){(1QfqfHs~Y8Iqy*I@*@RELZAgG1z3PidYlIO8m>|s8U_sV2c#X|T*`t@BjqqF zx|_wlkp6>9D>@Y&M^Wc*Ko@9@8;3!2AqEqcyMUcW7JI;4=xY1@k+RlDfJ?My?RdY$ ztMTyw$LrIN_kO;CNlYb3D^X`Py=`yxYT6DPSXip<%!eKDJ#<_=I%5px>%W)!T1`(@ z{kmq2va9xjruLnId8^{|>~VfUhTf1!_U}f{VyE7BT?VQMRb_FN9Csrs+|46m#1ML|S)1U#|t9 zC5_$SGr$2!@I%4Z)4)o|iH?@vA8x*Z0ZoBP68l*aXbOn14foQI3-+k%x{Hm=>6cnz zy;$flz4k5NkBKAN3LI=blN?b!=Ak=?}ExKQIwdTjhQjm6!Ng&0) z4ut<0L@rFpG{HLQVWy|jUwLb+%u2Tuu?ob3)%iG8mjHQ zfrmt3B6vdtV7IqS;V27PVqy#vf3%Jit zuRoFVgU*M$*-^V} zAqIGjt-wIQ&}a%l%ZMV%k1Er+>k^_@^Pxu(%{})=Zq84)hH71{T)9~d&E&lQ+pRQ1 zPlzfNx?$m9gS=#k2#)IPym32a0i6n;t5npQE*n3 z&Z3c-%^;~b8<(fdIuoJ47T{kn6kq41uo5HsxLm`FlpYBvN<$!k#>+{L+nQT!x~5LY zgVV12pYXICVlf5G=lWbxauPq}9jh4S^9W~e620=bNcI<~C?vG=d z#VJYt92SouYn~#~@ZN7|ENOVI7Iy+fhxms-)EHer`}T(~_nXRKzlqPyiZtbg4p>{I z`GT&cE<1*m$o#Tg!8cB6&YERTHXF$HCov&tANsj;xhFqZaAL1LZy%|#1}X|~>i z3&plq+j!O%TPYjix9)%SPjVq&1{+Y}D)^VP_K69{az4(i%gJefazt_Hnu8PdwiukiGNC(^6F&a-%u z7C_F3CNsOKHOqWl(ngm=BP5CBf+dT;_`UyF74Hp*XKj)67r(dr*Rk@S5}yCy0=Jp3 zh+ZGNgoDT6V>!qHZ@`#H6>WKG@q2S8eEWVFnCG_Y7n|rL^k=udZolBTjY-BO_oocT zlKHYU>csf>Pp2iz;p%7{tR>n%U8whl$tAC}y`f_mkhb=WJME7eyJM$g?2 zL<(mT&<%aS2goPiq{Xg$g3JdbE4*=g;H9CQVvO51C2h_3qksD&7%VxUeL|`f+oUMo zKNj5IF~>JmK-`piiS>h#dAR52NJYB(d5_#yIFgndO^zJ0FR*@umsr0aAx;`<-I|vu z(E9-E$9staRldafoj5ST)}b{FmncwX2n8y!lXln-JvCs*lMe=vjtl|=|HWA7yZdH` z^MmC10|@I^V*_FR(k`%masLDBR{*en9}_5AAL#y4A4>rBG3?a3{U&f!pr5Dpgo{#vi6W9@2)?#|%`|X5k59ZJvez zW%t(%hWu3~#vlxnM)AM}Hr~XC^0aBo&!f}NKKd;O79|O-Ook$tqJ1Wz9(^Mg7j`sm zmz&eAzbnzy#87qDA%3}9O`xBwU%&Kcq8)$Gn97~jqld4)s>_sSt|a&<&nO2AS3SXx z{rdAG1(T=T6_5N0jDkVUr_ptCZ(NC5Mx@2sf^&DLhn2(WYwMJUcZztXt~p3p3~qpr z499@zZ=YRvI)`RaX;vvcTxnICG4nUb(e{H8&1$X}NQ{ZFH(&K+)wU!Hp@Tx5-+}=+ zPZbJvf(p!HX%ta$_k%Y0tpM>!$ne07R_baYS#+MPN z6}o$JNCwM`-WXRc5+v10SA59bwAMD3Dr(>k9va8~a~eEgV){>E&40F80Ve#UDq^$`=?F2}Vx3}~WwXYF#Kfu^3g2=R8_8@F-_+JP zoq190`z99TE^5{~l%d?kNZCd1f)N(?Ry}GuG3NXJkJCs6IxOy84~u)ZISCyRx2C$6 zJp;3#1X2?=G<_j>87V>HT5h!134??$%$1Y#`~=$wD_9^)ALK4RN(tR${yhxjzWf-Y zuy78++yB!rfHl!NO{za>Qjb6$blZEd&kl7MCAu69^MEngbfDh7$QOh9Ye@c(5d-y zU(Hes2T#0an;kF`db9e%Lt$7p1+OqMyV{RUe_+D5{~J}IC$Sa~3aJRbuWcPqW1L>L zTNTlW%kH_hb&`T^Gh92&QI{51!^UG=Un4=JQl016U}du1+^P%UAD*xJHoG!dn zx;*$OA*`Hvuoag*b*cjW(}zf0y4U$Wr}&T=TtAdIO)VJlSG78kaWkEa(9%J_v9^~> z-YBi5gQ0j%-<~+!7p_}i#cm@`UKOGgDHJQX(oTVfLNw9%(Bq@0tix3aM1&}1wY;;6 z!>gcc23H>Z+!jvKw>Ng=Jm|rbGa2SXTqJ|xMSW<7*l?4+creU>ghu9egi(uRnDVb9 za#?@Z@m!RYDzChe?k8L{md#*6m^Uo`ZdxDH{0H@BK#nNH5OuP9eQrjzuH=j_g~ zRT8?P0LXMI2+Qr@W53CKlI9e&P(Rs|B}|yAf?*%FodJ=>8DM4BNO8?i^5PFigCDl1 z#%{<3_Q{Lo0J3_)V0szyAF~cYiwm%~ggAfIT9=vuQ%Ex~(>pP5znzGe9{*>~U(BZyCRn5s z>93qWY{2>R0m-dd?D#Z@^S8X%m!8NCq8LI#u@L7^A4D;v+39&7akjIKg=r143SVxkTMBi_)OlL9pPC+HMB=9xr)tWZ!1>Y%^ zPcA@zY5?@7$8C2Gy(jiBL4P%MUV1AU0QAQQf&QR8!W~$db?E{Vd`M4yWqWJ!v(mfS z16DRIGT*mhxwK(#BN7zvX1VL+mn-D_?B*)Fjj(prd@^EBhw%1jT7}n5?lS5;89u(3 zr_Qw-8PYiP>4f3KdZokNkIpz&J0Ix$$RoMc)k|iqxZt@$o(?ZE-i8E(Y4|MWBS!d$ds7Q9b*JtA%c@d;QtgDTTsI1i5KAH+&+&Gg z%&ILm7it;g@oNivj#tgd{j6I!+)K5BmQNLyt@ovib^*P!_+*e>EK{JBMB-OuwIEO>7o=-ZMb337H9p~*bFOB#;H zcd~&Vwxaj(U&qFOihD9MvHXJ?{A+A{hh@S4JT``)u>tNNij0)eH|d8q5I}|t`EBDc zJ74R3^zVnq(S2p`@Gy9JHuvn;!^7v|;h_oE8#Wy0yRgJ3Y`p;zpT{+r?!LA$60e3R zKnETr3HhjiNeK6oUe&igw}l>Bv8YloHbS?*SO>*8;lkD%U8S8i3@N{a1awVS_mb7X zdSg7d>ZeshE;HlHo1DroZC$}fNNc0XmP7Vd6i9r|t-RYcO%3x8^LYuR$aqgpO1cY@ zm2}IaAU=cj>{d(T740aSfA=~YKV?7BWtUN5t(9}#9;`P?4p=QjsaY}-7bG504Mf?r zfraOU-~hIjv|Oe1~KVy>+Kg z>t%RK$fg|kxT1m6uHL$>TyJ%&`&0Q%q_xM>fdnNAckB<1`=(yltXlSEh^!KY1ZfWN zN^E7A-!d!Alu`GZN)jSE*>-u+Hm}Mb$P{7_u5?N^JGt-xY2~MGG2fQRr>NAGwnwS< zv)%LW{26|}Pc){%d{vy!9-C@(Pm8F($RAhUl)$ECRavtkFv07D50*hyFPp~8EQU{ns zjJ=7ZF?kzajpOE~2keq+$lY%1D_C|w%WcMDvqChRL`~X^)SMoAgR37>2d`9ll~x4_ zZDW(A5njnfS>@|i(gOAZcNMsSpmxeBod@~ehgKH?8DQ^nANCQFJ`FGT`tIR_?_hO7 zfl8**T5lnIb95~n$(Gdp%Em#Jdx-eq!=2!ly5<~%rAp$7vJ3l#^+!nxIRZ-O`H z7T0O68w@S#Vua2Kgd6kxi1MD1uTP6VgU6P!?f$oc!u+2Sq2N>IAKEieT?L2L@0hme z{@J)pwgluTOeN23iQ2!0{?wR;8IMfllr6&aX?(7DjV&rYRJ~0W?iALK`CEy&8Nly4 zwK6h&HlTHS82PlfC0Y4cc`g8hFY_ye>xw^fy-JSxEM(nf2-zd=3aS11>bc=+xA7~& zVA}>2+z{L`zt@R0eTgpLX3Q-Yg((B&!x(L5j}ygZsOJjc$GWWLyl#VyE*_$kQe!imWE%ZYd^qrMDrs7Tdl z5s=80v744xjpJUKw&5L@M$soR^ae}L^=X~T0{9;k#emCW=Gy%PGoOW5XSshLkWa{E zgy4U8F!*2hXPHBD0ROWlu_r*V`P#mf??Uc~dDv4GI0#7O=rH)-7e-Ol;@fYuMA7{; ztj%c&b$R&zY(A3#=CgGG|7!&Bza0A1P@BLYuOeZey$oDqHnOU}n$HF~TLua*&1ZU$ z`OM@3*Y)!nWIpSFDG?Pel!#XNzdQO@I+cG3e1@J$g z3;3To16)Ly*sG#v4Fi%Q2yHedb!^0^iPDPuolhV7$oE&E^eo@I2`}JX5`(rtx~~tRtoy%k!=I*h6B_n1VWm) zms|z3^$C^6ikaZ|<&2x9i z;sCf(z0m;VZ#8ST`;Li#Iq};ax#3{a!YM(b+(h(V50pDB74(`3=m?`OqvbUeW)S4h zo3#{1o1EeH2jt<@ z*;neC+zoD9C8=n$K&gn-u-?oIDHSO+%$Bb1gYG-q<|L{8EGZ!Mg!)%n`q^{Df$lqz zqtCPO!=}7x68l3n_)Xq%Pfo!Sr2J0q{2avf=GP|_;~`aTJ|=GEp7sRjMr@8qW*Zo& z;Bv&i9oSOy1Y{P1=x(jYdEA{YOT(nbIdiP8AK-Vp>RIW-`>zw^KLtfO|K3iM4C)iO z4#-~fn6?{(+aEF^vKLVjdxK|Tg~nv9Uri8ikYVp_GkewG;LI@^KbGRAc(OybEVui~ z9`5f@n`;s<_z%{2$tDaJ*qwKeNHS91i{J&pnFEJxS-6|w92jo49*w&q}d=q3+=>bo!_-O`Ng4k8jN?iQym zdXCDMbdGkamkw)!*=(5TB%3#;DW_HJoq4(h_YC~qHGbj#?DE|1lgP`~NE^Vw8K<%r z;EeU<_eUzI-**v#$)LIIw>fbHW={MC&S1aYMWI~|R820@6#1S+p0kQ1WiP)CuP_`bZM&+)8;A}P0OP-?(;)tF;XAw@!6HBd=k>a!j<+j&l^ zit;p?{B&NlNSw&`i}qJjhVV>{6#a)6HW{Ygm$_4P zksoRk3(Td-8kNSGcdZNP(;p-m9F?Q>4O~w>a$VhvVJ$@&MR!#535_pbmGZoKzAeBM z==u4fx_^R{EH^7ziN~^TzS1q7G8|~T4W(&V2opJC(;;N9F<9F}JfJl{4%^tn9oSK|7QU@C-LFPvEC} z5Wj}CQ!X)e-63(HBstLU6*T^6JNfw$SLys(%1ooU&&Oi;O83pu_klH!x#-S27O{@~ zCWMv6eWX0Kub)#bSbFeG-x1F8%eBOKo^6P4-?`}(Q;)6v1nAfY4&KZR#aFsgP8eCm zzIgfi6|1^A0l!@>|M4IkKEIvE*qI!;qxRi#IDazk{2kRwcn#+=Jff0qjAZOEN2K0X z?pQ}3Kl|}b+i~VYpEd-!*%0cPvG*Ib3Nm0geCVWiaoHtGng4L*UuVOA&3XR)brA@z zv7ovNz!*9q+2~AvFuO$U_Ae3TKXfI+4D9V=uD}zR3Eoho3k~v*8~f7-%gKHFnpWt8 zW$D?kikgoy>>f*z5L3k&b2bPErN|42W3FuAl24v>)mtQyJRg2`?RGTNLy?;z?xBsq zXOIni2AHH(x#E5I!|F-qcz*P^{W_aO<#2T^|UM~rx%G9d-6r|U$OiaVpJaC!N_#F6sCKYk4NPTfJ{bNKfgvRJIz<5iaySE8; zrG^k1gP*LO9om(y+gy}Rw9!H7#No!Nfg5`~=%_hD9kpLNr0oyuu#TE>&|h>&v7c!d zD#@7Ej2K9VlxFvH?{7i_aF6|y&_K8V++)oqT`q(MKf`W#7&zLh z(281DKKT;6vTJa^c6xhI-;8l$4cA2EX?OPffr*Gp^X!jgYH8u#U!y%pm=??kkgk?E zi(|Q_aY#v%Dxz8-^rdkH6p~9ae>^2P`ZyqZz_Y&gAn`{Yeds7<-tleAmtnaSz~3YN zoP;^cz1ofIX?_@amDW15Qq>$-rvR<$5#Ap^wa5AbiJ% zo~-%krxKsh^%1f4TB%OYUb_#A$thI)5>4-ID_`3}a17mP`yP^BL9DsP$!f7)L9pmR z>|0LaPJt;6B%0tQkeJoP%|in2l#6je>(U7cE>t9fyI19zOb0WcJoYJcSikY^0U7ob<+xjiEW~bBD zCwAP^yg5}-263?{o<54Q-(O!u;ER&}%yx5foBiG0*aMj*gtiiaAddJsO7+#Vz5D=$luY&{3zx5MNue-}BBt-$=ponR6GyOGtV`7W>^(;LS)G zZ&TFu$Kl*AM^j`!C)@=7b#DB(wCCSl%#wdt)F2Ov$CQv~v4Dl3E3K37>X-(QF&`dN zEa(K#nXF2&n_VT)672OQ4kaTy`oR|ej)k1;Ib|zZ#Ee+kv1TBq|2CuZ_O=CVJvzh> zTaTJT=hoAuJbI||{%bwDb~b)aF>KX+QF({fqj#b8sE<=n(-^3{LmF1%HJSw>NW-e> zeTPDAid8&T^xnmu16*6HhrpaXlK>3Ik>BFQEU#Z0R=dAzSVu3!ix&qL zNWA#_z*6{!c(MF9Pv<(CbdC+_J>x0_UNsC>U?BX9L~ZDg?Wn_x!zsJiv>Wp7$J@QK zK5ROtXgEJeUcC1C(L>E_iSI$wT8a_Qle(G}V@4R&&WCbX>4eDv3am+pN~a1^Z?;L7 z+m64ew>79%zhRO%Yo=f3vwTRmTO%A+`^fh>xVc)3r|-QXe(_xUsrEYZ>%>Zg;dHH+ zVM(bDIU?Z<5J_iLq;5LN_NN_Z+Y1(}`f`1)>{4uSU_s+&eYcy;-hV$pVCnW_aFnIw zcW8JeHd;@`FpSATDgPQI& zVPdoFlh}tf)7Xa-+sJ3y4hTnzq=F_q)4Qy7?qsY<4_EiNld-b{z~Pi@T9B&xUcj?M zpH8YkmP%k!#EwaRcSIH<0u|0gW5M5p2MTA*o6oQYM$w5HP>t~pZpON-r)kmk&#Vcsr6W2B$f?v`Yn~R%H+rO$_*NNrqemReI z^0P=|HID`99s)jTyAJ<3uig%U+?zm*#e~J)GFr@s_+PcxHo$-O(%%y8--f`0|CH?n ztBJpbJ0&fM#4c<|-LNT;_{S8uodvlR&wxwO=s8*b&jtppr#hAK|zPa(Oute z1w&JSpQ%X(=3mWTtKo_I@%-_i3DR*LwEV zn=Y;-iGRD20It>_Qvh5^9G%tXVJb!FN+L`snQ?Mt#76|;o!Y-L7Z3i>ugd;IzxtQV z1>FkTl0E3R^XMqA!7>+zmv>flUMWJtviTSy!WWf1_})GdoOg*~=}tqC?tBiGow|QZ zckcX7cVFF(c(+(`ac=0fxL zjReYanf=Og*-4_*R`PIV<5HEy-M>$rn|AM0TS@(GZBgXHdn@sg`D?OSJcYRoEuQ$E zrBpHl6z}s4rYk#jdZxp^^I;!$?>nK0gHUJkYbDq3rvwbnMxO4(6~#~DcCEbqvfGRm z&poqrcuW)ghpyf8%B>IgV0-iW#d>q16bioLAh(bXO>JR_YriVsQz>QTYT6E6oh|eC zZWLJ>_1S%rCDjOyB&(K<0g#CKFi}UN#>qxA6^DjI#IO3J%q(|&>9$|^1_~_BwGC85 zGFZZqhihW9I8dA`BpvoUpw!MC?;yknk+m*F%s5a81C6goGJ#)m2O$T!4SSR+Yn1`J zz8+a0SKdRHyPjGM&WCstp_Z+u*+PJoiC>JBDV)k}Z8kgDp|~ql$5I%4*1uuS}O%MIs508HFrlKwPr-Ix4v{+tBHEstP@M( z#*TmJMmjwn<@4E&a`N>2;Tq4ZrXzBj#T$?qM}Wpx9p~fyb6-{%HDe9rRJ*aD#5gy) zqY&Y5hpR7iO4&~$j~cK@B46T9A%FG$93J(NJ?a+eP5nLmuv>*ReUf)w$%CgHzW$U| zxZzM%?-O5rl_w^M|6eD^e+q$ea{O~}a9*!o&+8`p{5a%08nO$`=L!J}5m(wh*%2wm z)x@;3Q|jFfBOX2Okvp|)Orc-jJxmdYG-`T(RNXNqX8R_rT~$XX*4m?g)kRn@>mn7P zF4BYqOKXKgb&;!}E>hrp_b<-}G3fbld~{J4xnUftTQ(}Vc6^^V{JRWxl(*6A8SMqB<&_sjMAhB`#Q(E8HVLS9MTh_wuX~2Hxh~nQVIx2Nq0$0BMnm0@!r2j_dfgVv;XhdpBUpA z4CIT8b+38NIX`k09attT7|ZD{j!dkYXt1E)cQC{>A7b}U7uWI6Y*MJpaQgJdRPyfd zh?hpD6?MUw7rI>ey$)I8ef&&RYZHz4&d0+r`zrJR870s3YD4d{{IraqE!sNkJxIW6 zP>;`6fu3+HUrJO_bU)MQ+j@uk8WLm|G4(a56$ex(3FeM#K8y;rF9Bo32eQ2jUb@Mg z{W(T*$)PdACM}B7?oiRfGao~pbwjIw{FD&=sHun7dxpCFwb8^Z{6emx1Stg1;n>N2xw#VSgyQS)D z1J{XgzgwR*>W15`-B0J9*TLo>>o*8BE|j2%DlAtp^gfP>K!U5#4i8$ULhHk@?-jB& z{Oxu++`YNmLfo7aMD5dt|$-1W}PP8?6vU^h!8JBDXGDV?y2k{>+g!saDQXo1g4 zQp#a#MQ8Mm(6i(p7S-jmvS6)ffbcEU`Y701!9-;FOY-0c4JApSp@beZln{$cVz58M z&Z&H@;n2SaJ4rw%%hR>U$R|@34CWH>nopaxlMPq7U=7Xj$|%5mI)yS8I&&B{gReqUK_Qf&v#=E;e=lJ+wNlcTb{?nQ?28> z$qij|k*P&+=-n0Wmh21=f8|UjaiJt?Xj?>aqWH$y!C9?+n+|~8rwP1LG#(vk6{Sn`^zzpes z8atf-iWueRh*YhQ~u2p8u8nVwcje^es5C!s{9wQqG;vxLLS!+6H@0`~BSCe~c3iq4`uUW} z-P4sG8c^Lcnu%%TI7a4KPA8voZ2RjU8+ji0Zf=~xqYCgDvJ*SeSiijG-K}}2Y!-AP zp#*?VBuus*gzjTHU#D{*lBgEF{3)`p`EeU`A|ba8jz5$Hok;4^k`b!|gbS>u3Ycd= zB)Jbn5@)FHxr_kRJy*Vd1SXC~S<;$c5^UmBM*b2>;2%G2*G}r~{w!bql*#BP-zw_!6yM`{MIOf^KuYll9Per|=b2@VlJyPlG#H$V7(6W*=DLT*ah@ip zo?X5y6A*8nZ2pl>u=_oByMn$EIC*t~G!9*9 zKK4ij!H+!gEC*d`tJm_40i))-T1x{nrutCK>x9&NBu@AH@m7HGE{IPhxdRkSPI2s$!!owm)K}6rTQ8!3?AnXy&jlxv z(uJCejAf3!O#_;dusECNx#G_8d-IhC>C(|pwBQr5>eDjwiOaC5_*zs#>`uqwc3GWX zCV#vU2%0MG*Ils5F-27mt`$5R{nbVESy}=~b`#1{zsI7k?Z0$S4c`n{WVYbhqhR2rVL&?t1qJR4Sp4=`e8Pu~o$|My`TiKEx!SVA%1&zh zZatb(kGFU1&7w9nc{iwpmef4ZqCw;#YqTrb9whL?^Bk z>0P5h+dyYdk%;_Qwyc(ni*xMQ@OxJA#(B@pF=nI-CCY72YjwOe|EM0wY}gyI^}4JF z=F|tG*9x%w-xg_D^}uTE4;9jW-yN`yXe|pG@W9XCY+BkKUvLFo@LX?6T)2=t|`Ms0p`gw_!(-c=7U9HJZvhtf{f z_gvOZ!l^+uQpvAsB;9sUja1yVRNkpb#_%u0uNAp7UFGNaSXNnWk78tv>0qY8rRfj{dP4P=o+^(>!T@wB>KWpI9L zvsP~vG0(zO@WFDTow-c}{~>l1b4p8rew8SjW*m!j%KQJQUv&Cizu5lQ`b8J1-}Q^$ z#Qm3e7GKAb^6(arT}S|d5sA~I;3b|WzW>b0Vf^DfpTKw`R<-V6PE{62-On!}lEEdO zV3WtrL<9TCH~1M8yP!Pw^XDbBjRxoZd(|csE}F@tIp5|JT4A50AMtcygeIdB zTo46ZDP88&L4%56b~UK%Yba57A#0`v5Z*g>cxAZnrpghXPlkhy{F~5N09Nk)#A_;g4fbppK+t zv3s;|l4JB{;v$2k7V(ef#OT(MI}s&6`zzhgzkD+?xe_$;_y4ZW@8u+f(W;q^uErvX5ms-+8=r+Ky1!lfAq-c5Lt-4fO{J0gcQwZ#GUT85KF&^DSPo$EnMkSuyjVX9@#mW*7D_S z5RK!ejog<@<<)x~i!8El8fJ8(ibWc~GX#;fc-^FO#LD0l~Lu2&UcLlYUsK?5vyC_4tU5MhUD>IEQcm^w7{4a_N zNxRY=P+Z9n#Z^1qBZM@W%yMPVtt$mvFxX^&K3Pvk8Msei=m9>lr)T{kkFtovfF}R}}YkE9ng)Lld!XEPiQ8y8y zFq;2HVLbn}VAxGyJ{*6t^~S38h)3^?aX245X&y__Pn46UUyrF-Gwt1Eyw%*cwtNeE z(mc&?J*S1*)#9xmJ%k`G^gkdjTUP()h^4E^d)Dulzn=oWAb{y?B;s4|SB=&L- zM9lQc|Jv;9>e*}#ud{jby-I2LhQ%Pud2`=oCs*%z49BkP5umz^lQ3SsFZ#KvFB9-B z0cSm1E$%R%Mpa=SOCg|Z9WnmkRVdj5tbnGDpi@jnWN3g06+@pu10+7~GZpOuwLC<1 zJsP4`kZ883*ztUTg)DcdJkmIpH}*(@s=WfC`SYvCc*%h+R#K^&?ZzS?%FP|6jm+l9~|US zzNym2#G(ZR*WBMj=RRg9tCM-zbQ`^1hs!p2nw7As%ozRMw?m-y>a#^IQbNa@rjFt0 zPB&<}5zrD-e_b<#nDue}?x&1cImeB@b1>d)?o&ODHtE=r)+(LD8d zciJa>!O<;na6*s!n!~TQJL3b+db)iQRtiba=#ZjlPw%ACfJ!%FeT&K$UhnIZ>)80N zYaHb!$t){}TW;`V>5@y?C~H?-1`A87z6cRJHSqs5UAX=wBg*+d&1=N`5F@&VRGcIC zUMvp{fd-+Mg#a|KO}PjrgA{-ZA32uC@7i3Bn@B1AVsX0LsHFGohZLn@D+>EPitC%s z7wxLP2S1&iudPb2F692&js&eJ+p5{wH~w5v2*HYCa*h69<0TUsFQna^WWkw|^hEZ< z6<(>-bLi5ZC7{yv-7Vcy^#bRO%9w5!?>HOQ@x1{r(j=Y=%Q01x>P`JBJ_%iRmhn!P zH^oC^K!<5%wVqtcnYe?7b8q>Ni-{I!h+Y@hupuK7Sfp(QI?T?|$6grZ_3aPH>uG5N z6M(!#+kbVs{#sG!hkQ2-eiq`q-Mj;}BaQw6dBIi`J+PucovwI22wk3?qBHJaSm#E{ zI6*^!Nwhb6*hCzkM=CRoLs!jv^N@oJLF(Td$`062@SJeiZ%$WtFdP5XpZJb20jcIXYqHZFLY8P_$W;tm%^cHylo-c$^0;_3YK_M$BvHC$Av%+UAs`g#Ex;{^% zpfJkH)kH5{(gNSt5;H-lfr?l#?26;)LSxL^=z-DZ6XbVii6}&rLR`MOgw1Zk)HnU4 zW%QWSlZLYcD%DCJjyYm|bxgY5UG^~cQ2};z=g%68xGK7mvqwR1x%g~o(I?vrhT5a* zKX8BTP7f-5m5BbqTaldh{O%sc9a(Xz0nD33TBL!S?#rNfh>Hd1dw-Hs8K+(W2i3lXDRi_HQ% zodP6#(b}vP^LR^kLg(?-jRE$?>HM2(?LX?g>E&0ZT;rrvlU=9EqlcrVy?^deE6)8` zlKtW`h$mZWN)hCa@Z_r3KiCEhepZyPGo8P4tI^GrJSwImIl^OL!h`7i`~k;8b~2OK z*%Ez(YvDhhVY&VlGzxqy|5Fi7%zn2XT39q_L75|g2#)!kL%grmxxpUtY|s_fN1lbO zFQOXpD911MZu?ja)#;}-liVkXkAr-RQJNZMYz$7OH5+^ecCyDdmhd0R)1yCmpPg7O zaPk(9>_o+~{=A&)Ry{k~Nq=&9d(#JYG7Zu3IS3n-VY%V_LJQX)*P`Rg8-}GfUcuXz z;$l>oNQ@oHGyC4^`5kflEGd9G_ZgSp_F!y+QRhzN*Wsmok7Ql?_6ywvj{!A06=hK? zJNCgOx@t}+io##nywn+ei>~zH<*y=f3^7 zUD@k!a?sN}5#z~k>L>Rj+Q5hBj0}CON>J$MpG6tNBK>5-1go6STdiV7iHn(kcYldl z(NsFF)Lzs6Qx_fF?O+M3(DvUq*bh1s&&HovLkkPn7Fbv`bhXjyLX_+z1$oZ@gN=@c zqLnob3IszJ5ek17GTFagMB>mepd0MWZHk_u2@_~xY4~w~yK+xC@LBvi!oW=JfPCLM z?%NH5*<`U-X9LR2B~ zA(qz~dG5M}nFwy_RUXXv?$w+%3`438;^j(0jAzdti8-$r%B5{!2zhWtz5Dnx z_pZV^{!W*B6omyo+V-Y{XH#g+W1<4?{HC~pR~~8^hfG?Lx1u9MY6N*Kj6g%P&}MYR zz*g|rAkl?DS!HBX5xKhsrDKEijCbwujarW#QV!?uqoX;Z2K!41qz=IiC$ZWQaQP1q zo{KsVe0&>8idkLd7|?0$ap9`Mg>mBlhXzVh!-OhAIGVS=;2Fk^r_9BE|Hr=VcHDME84dnJDB zV+ZECr6T?bl6JvlYoPD97+;M2;D@aHUubv4XYD<{)z4-x&maHfs>Jm>3lcZ9>5#bP zYXIMHUW5hj8x%h1kMeosw6-N7Jz=!YJ{~K9qyup;$yOSJ+*W#4T0!P|p3omjXu$Z$ zlS_yd9kr41l_t-`_U_>V`FpQIt$*B5{uO7+&;Nf<6Gk;A!;=RfokREGTo@UL%Qr>G zwLi_mX*+Kk%ONHh8JZTKSW~{1l$iT>(!xh zX&txap~9a>=U9G1e$r&86___%Z;)w_QiEG{YJkElw`u+9&jx`I{l>4mz%r%^WU=VB1(a?s=M|R8 zyRT_3sYS#0n+g29zOE?x+6Rn*8c*OAMIKttiPn@Fa>0=@ zowRJH4m0X zxAwdDznKSk~kH$M<7;4@g*tZSTW zdTsoVQ{vxIrTl+`(G_i{?*lAEa}8Z8PfpmMA{cJkZzk+J&(z~ z{d$Zc1IEW7o3Q+oF-^^ShChrdRgI_HoCc!w$LLl+udrc8l`&74&+VmbgJ9*Xw=R4P zQdy^K187+j_Ujlu{)rE}vfliCWu0aRSJtTn*KZ|wXqk4c{yqC9RbF#AJM0CYZ@wjA z{_aXTUa~52Z{>`}lx!0`VQivIq^wp{+olQ=`=STA-WZW;_v4T%&wY)ia9BtXdLH(< z)n5YjlCPN*`B1!J>#kn0aZ!X#AvIZ zxlVH8m;4F8jBdKxc2hEfF+PQ*8-KoGU}sh)t}XQj9hgyt=`NOIXsSuY=a^ziA16?L zaGIrY2b@`H>wpH+nPi+t9{9oyoJhEdD%^egF?YPG7@z&%I=)RS>QEck&xh(i`KQsX z8p~=AZMy>3V)pkV1|B?Om^eGM<;onOm7~0_iv}436_S0=H-PNRPg16X0d6Fpfm6kX z8(KNuzGp^a`GUPQ7-a))B+N`#;6@S(oGPSWKz%fcj6wz*^ok)e$%}(tF-J{4acKbQaI^z|H}VB!PxYd)$xrnYpxk#3#moYHSV14j9$@XgZ}A*F{;l znkuC$TVOX@B_&_z$G*H-d!O9#iE>XmpZZpOt#i3XFQsw1jBp}c#46_l+-OeVhjUch zXzLQfdd0u|ipV2{*!?I|2t&4VQs6;*o)gMY=%L{-4@uhC%A2NCi^o&1D|24ZW()oF zN~vTbP!=n=)$)}jo=Z%qBDjBwT9R{`(qzHRdN*JHODO7M%f;xF8{Q|1V^--i&E+_< z&hP$uCE~0p87lV$Ku9RO1LbY6+LY=Lz0R0hoB>vmPH;6CIySN3`+_=OGFyh2CPXUK zzR+XfQy#lSUmmtZ=QWFwuZ82t`G)G)`GT|BE3y3XB7r;3#!L)sVwmJv#Uky^$v&SF zLv_oDxXML|EZR>)xW2kUQ;&k7k1p2x9xfyi57Em@!2L!{9Xv*luNTmJ&p-{_jc4lf zl8Y>h=tyscBgHhS^_$51wfc00b~{k_f~kE7zEfedK1E+;Dd?Cb_BTR~!6BE0{G((J9wp(2rJ>^!k7N8+q1Pn;G%UFPEq(g8Y0(w+pSt)IPijRih)QdyQ?2)YMI=qRzU$t%LU)T^Y?yT?dAPku z>zVPc9_l~viTWM#vkC&ge!MC=A{7v*RaC;q>{!{h&kU@GXLZtKW*i_WgS+VT9pYQ0v<1 zNMqkbqUWp)aIQSrd&(?>%egL-ZF(nC&#@mBb>{Ph{$C(6EyNiqUO=B({z;z(LfN7q zDZxbQp#V+?}x~eZOzNb_-z)Ny%B&#{NhK4J* z@~DCev?TNxGJBF!;8k(9i*n%biq3BVEo^t*j7q!8f#gw>aQt;QiuGLww^nJ^uz9kD zU5<0dc{A)NKTfkX$&ba72SbA3+lm3D zl+0!C8o7;{*CiD0>qZ$!-^#j9l+!r{EeG@`k;}$=Y-u+E^PxQ8Cq`j(@byIfrtq%E zOLWnTJJxCGWB)io{vCz-_sDWUn(;ySI#@TDAPUt%%h1)o9+d~&IOI7-dX5IwuYKf& zttX@CQ+dQ6QlzkN4dy}=YI?-kyJC(DqsKR{xHnE-ie9#iueMzd)SoTc!p+ z5827i*Q-N&tGgaXw@>=HL~W&w1J-P~2T#^q@XaZi_CS*G zlur*|z}id4GdqT}0E8fvQ>^kJjbg1wBtYCv(T&khe;EYC-96^T2lc{zjxjb5%hAm~ zyqo~yZsA3xrUCRcv6W2KUgDN2Xkg$_QO|#P*m$NYoCxpi?GK(NyBvRzAFjkO@&gS< zeuRHV==O{!pV)5Hh5bEt<6BJ~LebOCpL zE^h#je=_B|`Cl%l=F?%&(`0(Bh9x|JhUS4jsFm;B0+-V%a5=4zzwxCUTu%2YgS6ro4Q!niD$dhGGFvCaR>U0*Ix1BXYTYev9mUyn#?zRw42q0WGaRR#Fo732;)I zV-R=04ZIYZ?k97LpRyvQTS7P5`Dh|QVSys4uEy%2l`8X^R3{yo`P8`Zz<0FNkef(o z{6x{!dbqtcRrKVICK+$a8 zd^76a*X-*{6*ns#Q9@63G$!>T9~Tvzklit2>##5vML9^td{MZDZc<4w?mpcU+{Z8z z^UR1TrK@d{%%JU~BNJK<5^ALsh1{~qd?5#|>p2E(;>$H_v!}$EG}m}YIc46}Esw35 z#VZbdNNA8G0#DQJF}&BFx-InQ2cPzzfxXknXcKL9#{C0ma>eqyLlHLT0vKgCLjclzIR0yrJ!ZTr~yzuvZAd&M!= zVddhv(9vlY*ekTldlG0IJlh)YXPjYpngcs#^`p8r|dGU(GA~I^Dt({RsaB zmmFR@dj>DpZF584Ju&#zM=IL0YAG7gkj}u6&p{!OD|QiQP0=;vws=Cz7w<@^7f^Qj z(P;7x1}2nUPC;cWClxXz;Sdh86Myd%ikPt;Zw&Zvjpvn%*FYD>!{DC@?|7OB8L99&K?hE^sg~@PZeu;$*dV zjU_jNjr6C#*qf!Va~&umqNT1UyEAj<{mEPZ^#7da-yxs;fBSz9axv~>0Oa!m$+Df( zN1^D?T#TwZy$J;RD-li~8kP7rH=V`hMxQ4bbD$55%z6AJRc9e}Zua1(jf?LG_0qXt zC&}Y{7>}_Bcnp`00rday7|2aaM?E_Tioq&GUvB{(<1vQzAZaRL*!}GuL9#01KbS70 zh93~qH49_9I-)iw94QmOpV9OPjV?9rSBfTLzE2fR9PQTxCrM=^fzjCSN<%}3eV4bX z@ROG94VG!qa4b7lF|CHexbe8r992oPbReiJ9D=&o7qv7!h5E#+Ov1gPSd3MR&e!`c z1wIUrVjBEQG0jSZPLkB?b!Yh^Nx%Q@bEG2+=vclC^6suC<|3mRw+|P8#>)OdDG5LB zM-2JQ2mv5Ir=eI3dMFm7GpTiOiGeapvEL>#h+trV|4ZfokMvgN3dESJXby*sV5CI; zCl;d|@5i9XN2QrwLpEpwKk!$ zgS~>P{YejFtI0_N%?Gi#vp4 zY#f|cKsd%c%VzWF&(6EOn=vT6W@8YJu|kPrrMcPtfe*0;mvJ~7KGq3|%9X+a6{C6C zDWHpWP!8Ykw)lMCmy2kz7k4f0V;_Q!b-&vK7B;avV#`5dFQDr}9JnqZO2MuROccXw zaUVWsy3`)bww)=DHNrm{M)gBMdVcfmgq}IC!`sD3(*vAN99_0s#$gX9>xyzvj8mvE zgI+4=wej9XDGoK;L*2p03T9qX^>1yw#j{sE<|tg&tcyU*^d8ks^l1%3I{rj#cV*)*DX6*b%Px{+9I}T)^8hj-@lpqit5#n1u9)la*Eq^ zE-A{?)6cK-9aevxUz&efu&`8QfZO}7;~%HRzhpo;{w`reL5#&JB#6@dIyZ2_Iow&) zjgkE9#0n6L(@V!C#*W_L%l>XUSIhJFDJK1h@T`M6az!RbNY@Y&7Qd z7Vi<|s*BTNxB1DRBIS;0YtO#l z{_Jw}j!7$kEKE)6qc6gayxF@satH*Xh_GswGyarB|MFB�O7>wiqX_UqM{QAcza; z<8$e>KG{;6!*5B_;#gR3Q8@c6jCoY{xwr43@lMj*Sb!$Ri5d*Dc*?^hwe?33m*jtf zxVWl-ilGzcOxr-wM)652^V^L(5$`!865JYoKNa*hDxN+rhr5jVIJABvXX@8^lAow< z=S*i;_{h7V8TM4*;17KysyXQRAg7zW$8l$QNvoNA(BibWqhcnpYBzYrqH7%WZK+V| z0l|T;)^+T`=fL+6BW`uhN_lsW;|uK|;TP5&KpQ zTz&pFBJt;IfsYf$h+}K*LyWjK#E9D!?y15UakHy=XPC(R>cLz6NKni^N%!SeP!U3 zQfcn*pHNTME~Y?ny2TRo+=Qaj7pZ1MhUoTfR%64*(7U0h`Pz*t&L@;$Mn!6?KJ>Oc z6Oo&b^gaz0IxSVJud#sN6^^;0X2|W=O~Gwe%ar|oM|_k9HtQ(p_DNjnZu>FdEfIVH z%if9%{GfPPujG{E2ODNn&bn8n!Q4F*LkU4zKB8}jhj5%$Cd_1)n3XH zx*d>;G@O!KeaTS#$071BF;MouVW5AxSwcf34-GEvMhz+$A}tfo2f)p8zJamm?zI-KpKqjq*Y^U^)3b_C*H!9`SN;IhYA%|QcP|Qz zwp{WDpjOnib)>lMUAVc^T=Tmb5qtM9>dwO}B@1l6-g+P#@)%QVh*Wz5$K+eG8Q)!E zBo&%P25GNJgt=pBk9&-&&5w}B_B&KICKTcDU@-al$$;1P>TjpX>;Lw)CD|hm-LX0= zWBdQy8|-nRA+q{wh>ZRoB8@*lIVKn)=QY2Ehym`eA(DNj>;1n@lVDUWTd;Td{nrrT zf~;*5T0jcTl>}Uc5<}1|EX_{^7nMB=mgdJOy%xAa)(o?@F^Q))J(Cki8%t8_;_pCe z*2zVfs)DT@JYem}1#8EnmxN~89D(s(%5`Ba$~?$oe0VyFTv?W|G_Kw<@jr|vHc%SZ z`>F~OSIkr~kjC{_tfDLPDKMJ!!$>WpG$ECWhsm|pT92*8L}_fC1jOFDz(_6asP^Y| z4R~I2XCmbHH7$s6)0NUw_}8l8oo>Assq-dn-0424JXgEAnh?6@UV|`$O6N+b=tErP z%CAjJ+p>yr@UGF1pmj4O(a$ubMr$Q5!PNdq75zxBphf6_clN4wrBKr#5vs+|eU83v zDP3{W$f}@z0qe)cJaR$0X{K#8JoXA*)f!lD_tzhqT}T@UTaZ1r>Z?B-qO(!j@HQ^8 z8zm?7nnY)W^X)?V$~sB=WMOJlXOHUi#*S#j$-|@ACtFKxB0EpXp)ta7Ha(1bBi+ zbF=00x`(J)D5vkPc*ae#K5e<$v8GMpcziSWduEhZ=_7E5NFX7-S)1Xeh^CKB_u^gi zXzZ-9q~{Ot%;Z0W;+wcrnAmrc)75m|sa^|PYSfG`FdIz7GcS3cSb3q3I7&UHVW*;c z1y8Hx`7#sn&NRAU|I{Z5neHrAYHC^ve&As1h{g1ZjYW@*?eev!n}-`oEdOEIqX5_InDR}r}@GAuRu?J-oIs%|HY+7BB)xp0f!v(>HQk2{X~^6tKEF- zTt|OieCoPY4z9$zs-a%Dt&?r9?RVMT4D+IS@cT%RN6mW~yjZ-eHEcy=enAwPzafeu z_05@N+8gdS!o9wmP~X^r6Dnya5iNIG%NJ*XVnA=k-kga_&AC1DMrg^U(r)bqHJV;h z^5nj=`lpVJeVkVgWeIc6dUaWM3R5=YQ}|~(L=UEvOpM2Sv%@MKnbOH~wo~4C8uP0| z4mIe(64kZzrc;rG;cLtQ^;j;h6|*JDN|r!|B{)p4sem?pm$IqH>&Abqo=m-#5z=fjMfqN^o zrnQ$tn@nz2vcVaWN7G>PsHV#_eqIbqXl}B&givzEG!g2uvq(XjZ76~uP{_QGUncVHxL}bH6NkJb-X?KW}QC?CXA9~ z8#lFatmc13qGut&kq;L>cBCF?$U|Cu%cG0b?UwK|oq8P@QTVuQ#uVJ1=_I;X*f2cp zqE{6rSDAv0C`N%#pGV0PQK)R?d^qYH>~)dTKEdXJu+H9Fdkcq_HeOi2WKs41Qx?6( ztbw>r#BrEV3UQq=J*csFAg+^vIME5Y2F7)2cG4no2)fa&6p4_9k#fXn;hoxP=oLaQZlT*?h%W6&u?xnUUfXFzrOQ$ zxGPZe-0b^%kP;k;1n3FT%X)4AY$AHChUc>HT1N!Wh@MAVlL}bn@j$PWpr)Xm*6ue1 zOF2R<_SN?DQq)m8t;xdsmk&M`q=DDTs3DW@#z&QUJj2Nn)r!7Tfh$PJh%8R~sXn>w z04)|8N(bB(nJiWxe}cuL{EpR;9mCQ82pOI+kJE#LqTG<7#i9-pGQ1z|p%+a`Y*C@s zJi7W;gb!OR9+-}~p$-+=hDD6vSm0b1i4+$6jtNH4_#iI(MZ(^VSanP0SvSBA%k0`NrSz;6d@HEgkf zVm@v7e*TL2EDBM1_1^}Q4PY=agc(c@XxGHzJLGxZz3mBl+=g^0IV@9v@M42ES&SDx zoYX2ms_)u&)wzeV$s z0(|AVVMm+dFWVc?b&+@H%~?8j%HryC#5a72oOJ>oEdJ~trZPAQ_=@w9;@<4iy|MFM z!7@81E9W6tCKgu+}!hK{9&l_n{>i z_+XC+N3yS>w72gR1$#t*ReqcM;^E+cvQC&@69$D&1^mou_#JoO(B2a}bq+_K&J7E3 z2OwCt zD5dw7Bn|X`zKejrf_x(ZQ}w$et_@ctGmX|?S8em-RLJV5gqUodb|1bM+Mg-xyBa5g z$jpWVuvCa3xRLnS`jk1Z6^p-zmI~BZ)S0Zr9D<)rk9UgJU>I~C)1l#qRIXQ?kSHBXlN)NePRJa z<0Z-|`|ogI65t!z`O`Nd4SXXmqJIkqcFubOsh_^Tub@wUgPEmgg=7l9Pa4{Nh@>o) z5-lR%TTmcZ8p(YyG*V5` zya!GikM{g8W4MOa{c_HJoizA}K0qf8?~QY>SKy?y(`7sxYe1y-x#er)si4va$i;)XXa!1&wMrldA9I zDXGw>kl+Kgvm66adingpcvf7#vZ?n8F>L^C0B7YM|R1t4a>mniNIV}TG1#AG8Ke+@v)oim!} z{XfBlB6Ec!m;2xkB7$f{Pd15DT6Uy5f;vP`E51WLHd*MwTSf!ZViTq@y{|&d)Xsd> z6gufIlSs?47A@P$Jv>v#DW)shL`pPZ={p*yr*9h=fiiM^*9I0C?)?}R7@pra`eQ@g z;=wqt`Cv2UhtyYjugA~tMmp7z_(8-2uu3qkD-8aUM%vW`_{UF}YhYg0c+&&Os~T;B z854l0o60{R5fB*fp?T9LuJ+YpOtL7Otx?>q5KgGcxq=Ju5mJo{(0pL^iXo^fTOZp)T=OkZ?>>K~ zp@TKoFzT`d#)%XA9JK=_=psNY;f6jjuax$nPNt{AuXszDCeM9u9nT?Wo=f}KSAsQ; z%buoyl&(uhmTet*?d2Mg2V=)h-kJ&Zt9Q;(h8vjI_Yl?LxBGX@C<#2MQ|PG)m^kmA zT462;{BTY64cKQS*LsTdF8H5h=sqn8qj?4kgXU9Bz|iVmHO zrQ~Wo5vD>i>m zsHu(BFf}!uoEUBwao+yK>=@q)1a|#WQ!%x{QIjByW4ni!EGSZv9?L$i;vxm15gavH z84cjxA%czpdgrazf7(y8PbS%%jYpY*!DHZ;!Q-PI)KLNq9^Zh$XmbRHQ&^YG{ymXD})eI@TuNFL!&(zBmVPw+kvye0L?{0UagkM}zcvcXhEOv*}Uy z^q#>wO0EG#^&f)=zkYBDK(}EXB`|{rI?UiP{oe+Ud%b);799lFP&p6G zSbWTy;1HP46vteW7w{7EEnhxMQ+-i>5SUtC%HtFm0&&_;q?Y}qU`i@pq<~X+2<#xy z7!uMOY7`e|RN-22GoNxgf8_34=eRgBF*Ua{6!~($>FZ^s!U=WTfnto5XR8*7ZwSEa zgQzySsfmi$?5?S=|2=@4Utp=bi8zLaUk(PQ+!0Bu(JIt$8prJpuMtYD(Ylg-E4dXN z34V*337iur_wd#>I7?N|s7oJ&$Fyr%Gp%mbtTBb>m1oJFMBAu5FOlFh zqLF6!$W#gEA|QHjfy)6Va?4iTh71PSTxE@_aG4vFu& zp9kIX`uk@8%j_APJ;R#&TI)QIqsI0@jMmlcPpfY}RZKLyFRqphgliVNFamX&sg-w` z-s6q%J^9hJbs!?}(;De(R_P@mWq1fg1l%RMjj6LhL@?9$o52+iQU8iMV2O<19rjga zR~1NfMAi;paDIRmobRH~l-)ll{z7Ch|3+lYylV2A7r^`_I-+vIJW8tsL&TXF6AY2i zwFENEh!Y;0xZ(fMw>#?n9WQwo0SyJLRse7HmKD+A5$*r#wtEYRk?&OEzw7u z^wX`I^Mz|zID*;Q2P^##3p~jf^H;b&%lUo`=0q%kmKtwIi>TOIGz)}xGU#HVY|9i ztoYmH_z)?hm^zt7_!$*I?OffVF2V+`l8*OkPhQsEfu1Dbzw%&)4V38M&%1uFp@HIj z8Qr)vYIE2>TnWWRmqAdT#ue?xl}h>a@Yk=4Gy3VCb7nt#p3@W;+^|#>&Q}zE_{9_% zaWaFNbd-*aii=fX+X|4~BoM2$0;-ls-zYl{cuVfpWGib&{%WX`iSCq(9v(Ybotx#mosz*fo`Kt{ zs1$=;NH8y&8|UwhrzLw+{g3W5#UadhWy*qLWK^nB&!il5byOm^l&b5kM))mnUYEHw z+fIJu#?Yq%<^?Q|@jYGPZ+VP{KZ(&s{}Q8NL1MIL@5BCv)baYe7!5G{ATe5CfU9~Z zzAgcj-~!AGD8Y5E-QGc*PbILY5pETCGx*+lcFjQZuZ<`E?~Uh($DXt`87fp!m#$*g zR!WRN>D828gRoqyuJbasYj9?t(?D1Y?b5?u?71Tw=}&>N54=T;Hm=J9DwpOM+88pv zMBhb2T?A^V_dNMWLtX6ATdQbVPQD8-+M7$>kQZ$(1D@QzCip9kk?8X`FWUdaG4Mcg zdr9EIEbyWwx6T1tT{g7wynM0oH2J;pd;&GpD>io!Y@#xi3uD4dT|{FzOgT|7C8h{i z?T{;juY5}c@j@bP|9bFRzBT(6D_YTAzU)ZJx^&4#zhV zqA|b|zb5y><@-_t9{3eT-S%Pdah>dq~_t$l3thKFuXr0CJe?oym`Hj;Zg{G6(@Y9j3P=Jh4so6;v* z#1UFt^HLJzDOAuobsN*@o`VruTy6f3C@ zBB?!-$z)#E-ko#W^-4#;s8SHu+MUx}0Zp=S%;cm~vlYzKWZXl%EzTk=D7bw=1HBh_ zziOoU#;C8v*#!-hwEJv+MTQNlLdC2{NVQ|APSy#(Yk`P->Sr>IDS4!KsaFIl(g#$A zz*iqS8$IqiP9sHG3M<|6VNA=`ug`rrL)WV#BDT-d?NNWsj()`NTf1Z(2h#5+mlbZ* zv?ew4W4O>~#h!RQ_ay(p7pdm^yn1;n?pC&RcJ+>nZ)lARN~>2M%b$h`|9?t?va@mh z`~4DfL;M<8c~E|*3XgB^qd%)8+81XQk)+ZD%Tl* zI%V?`?L8qvInjG4c7{@V-l#}%bj)5^Gyb8R0=DodbybC3R-uK*c>ORp?6SJlE`7-b z;D(RNP8)_&iZ7Sm>ASASEy-hxs_LUFU%4Ihv$HMbMlhd|Ms-KxW@W1IP-NDnM_wOK zQu+mUAIrkvpDO}qg4&hYu*=Do{RZIsmEiT;2Ae)_BR2cuL@K`aH9~kJ;LA6$f1oZf zvjkf{n1Rd58qARPMOfY@?4ZctFGHGJjvEBeaSypLq&4c7PK<}&~s+ZK1+jr zM@kZ?r?*+FOWAsojTNqg%c>bX*af1X*YQaoFY!H?U4a=Em0`CNWrJUEF1u;?Wi^d` zH7_4!I;*;yH!_C{!{mBXfwiG;;W+9jg=X?insr2_&YFtz0hg z3KEnMY&qO3@{JXFh!sEP?TouJ`AKF=D5-$%X`?U>P(~TSnOfu$4kdVR(w`siwJe`=Q2z*9ic3I9eAR4tj%PVVbzkl9WRdl{##{S8PL}_e z8fE|2D)s-D*jUq1JaJtU5{O+XnS8B^maQw(ztvE9dK8{71$Elbi2(Lb%q;0>1$5d& zHYkR^pVB{&qYu^kcmR_xqKCRT0E|u<@^5#m^QF+7%~e*|lLr0bNmD-8s1#|el4w;4 z$QMO7F>?U<0&s;jgtY*d>-*KA?Mm~(Jnh#HC-&qf5;o>2j>hEe^oOfN@GL^%Z<@G^ zH;n@+K%lZ^g~r3>trXNlJpp)u0rghtm|6Jx!-gp-)T(z9q)2n%7@a3;bEai}pJo5n zX&1QYwCBP?8tL9)f<7GKjy@ zC7ahG+mh;I1X3%h_kz4V`}HRQ^&&sJZS|mDsP!N#^#vnB*sJ0-Qfj&3XEY-3^l0js zwHF-AM6D7^bwa}RSJnyTrbIX+)=umQ<@m%AHiG6^3H_rIk*m(7tpQWRfF`=e06_d; z=ne3c$!a>6m4%)%x;o(K69yqdKi!C6!odNE(8xgMPmPB=pg@4nfmh!0Beg$)QXdt%o};O~>|_tiHovqZPR`!vFo8_x;HC&!zp0mhuVf z(&fymV|A2zaHquB`j}^C+_cUFBiN76-(G*;vLk0$LH})Q_#6M8u+LY0~_?v2!C`In2TdZbIsjz`EjcziSf3H{fl_3 zbT0&*%wCp&(l3t>Gn-G?x?Y{|-B5O`TdQf$3bl3>tT?acrZ}T{V}?oCu|J6XTu;^z zPibSy6wCc1!tWN^Rcyt$dU4*;~tq**CR5` zX=765g;{>5iAPS29=cv9xP>9AChAf?Rf3Bh7gBltRm*l9l>5bj8fxEZ)r|KPdqDh*UU=UV5!F;xlB*=z-3{)%B_5EFebMz`_b3y0h+^3m>TlK;bs9#EyoX+VxlcE-j@iF zVu;)9@?o{f3p)37n&de|hX@CIEXy;3R(7-D{DU<|ovVX9%j+48?f!j>XHqq(#mKgK zGm4W|qloFRMQsNu$b1^HSUfE2e1T|5Xe*`Gdh7eTQ+QbNE)DImhIB+y(0r@x)K^)^ zxn@tgn?VA=Ic?c9Zc@^BfTfWLWAz>{;T5VU(l0q81UYbYOTs3YNz7L8sZ*9&3f+;Z zm6O{@n|aJxNq+>XsmoR)p;LWsy5rY(tl7omPrLIz2TPBf+wbLK<^da4M2+)_F_PV^ zMoqo$4IpD{T}Zj=(smFym6lhcmL%@*_c7P_ww-iL|PE0dJy|t>9&V@>*|V~mebCG zF%xs^XudA5V=Qe~D^YHaeY^HNn}@tf!{pUVd0vV01G6hNB}*qRPqtO`4fZV(h(N7f zq1zkO+HGC*a`C^KXV2_doFkl_rN92e-~e}7N;XOhU6ZRqLafrprnUywtkR}Bwg!?0 zdKUTytnvot&uxt;!D{4xLgv3{pm)P%O^~ipAa-111Lqiw#U3qznE5a`7{jD+l5E8H zTF}Owiihc-zxr}rb^15Fj|>3Ir(J+tNpxetw?+wEa2-pXA5DG#mPRb}V={YkYdV;H zIhg93pf+x>hnk*{>G}9+{a8vrkIAKh>$;DSRc&SPd8CLA7Kkv%>n?N#`?UwIf9VVg z-w5nq=nRfT&R*xAK83^kDtG_cRN(;dK5&lN2j`etB`WQk7hfG54^VA>!~61XVh)ba z0oX9G85G2^G{BVc-S3X`Ad(JWOf0vSgzfkEn{!-J#4*($y1xT>-!K8V;35Q$CR6J$ zaV@JLV-Y(cjTvKbiv-Wx;l2{lVbypbLdM8n;PQ@kn|gf66a*pJj9!$cKRUj0&i>L0Payy8i8O zFOjHM+atm(V$6CYnnd;X+GDj8@y}^REySF}^jP)UEOd5mKhN>eKOx<&{+LIFwk6<6 zTR`Lq3M#Z20>rd7JTxrZeFv_In(as!{Hw3*d&O-Tlh{AjV#z(pOU$e{lrj|Kn3&_r z87jU0@MZE|GqZvyv{jmq3Ljw<%(NfR7OiZzxy+90@H!-2u;)6O?duRR%XkO= zC)|s+>A507A(52x9UpzB6l6T@&p1fx@OFJaaDBWhFuYH8MYez#$hvos7cUKdx^VIF;Au8mRHfjjoy}=!dK&q(#=wtLOPl zw<&kzo-NX#?5}FaDmfAmISTPZL3f3DWVi4H`LpK$$K{yUO7yMw$H-a@IX?QCL3Mo= zFvt4^q~!i_lKjV5Dcire!tHtE(h#+L5mjg*YzO&v2}2M5^6mEyQUqIb_WjI7ZJWLc zzT8DL?d6u9PX}a?H3lqY$wd|=m6M{BYaw~OyEvKXR{y5UDQD$*k=n1D%xTWHG_+); zhAmlNBK&^91hMPey%+e)R8AN%Z#84kE|uFDq{qnCAeUgl(53hDF4*Qf4j()$|1sCO!@F!Dcc(4 zVuH^S$i>vB8a;QrhzKt-0!QBVHb|b8i z8D*)u8x^X_HkL_KwtA4Z6(dLRiV*aSyR;tc;J%-je00!?B+2 z!M2l(sy)7?FzSga6=GP*qEAtv>i9gEIL@FYOGcMBVB1?5gZY@)Y~lW@#uWx?Evz?>YCL<9OSq&K z&j86U@3b!d3@v#S3t>3_5bDiB^v_kb)uTtzUK7i>D>Z!yyXpLjaW+_;u;MIHza$A4 z3@dyfYXecaX6)~mh}%HN8O69Au{eo~yqH-p=~aa{cB06g**D5)Z#i&Z8$F}@B8QdC z>s`K#F{8O_$nQ5+S}J1cKZLvDkjCBkRHWYKS#WDE_PhI@_4BoHpYB>NPhuw=(z$QY z^Bo#_>SZ({Bu!f-A}__`khY)W*!!KX^huH+13I~HkMle)rjm19*k`)2Z@d7@MVEN8 z=yB3?{rv6xP4u!)!O%j)9ogIl<$L+5yad(MEIZYgs?nJb+;hwt$ESSvFqtXZ8-IM! z*3KL42zu9ZRq%?%@z~ZmHT|3O7jdtAg@)&^{XiDt`Pn_Do6=Wj?u#Yrih{G)#`wpf z@!t}q|32fk=K+(_BnXdrTyE}C`S4i`k;dL{0~>v8s>lO{$&ErVRAI4qAMuMCB_rYe zX1(UEEoxu!zc}Qj=S_+hN5>qMHDe!QEa0nDVaDHi()F3Szw)Hy2twu}X48fL$dh_N zdD1+gIZ%;ZmZZjf9L-w1^fS*WlzZWp7!*QZF2VeQ{{R+32dh-hU#ry7br*ODy&r_o zZ-Ef{;zgd637#h;$zVP(gJi$kjlP!1zfj&(EO=seQLk@LRR@C7f@_4-KcI%Di zf7qlRfl_@Lj&_(X_R}DR4PmYK6J^Tlw}VWInLf^9nH|vjhPE^WBnXEJ z*6gi{VkYNB=ol-l$Jt(S3W^D5tC-FB=Zx_lr=-SZpgi`Uq2!4-15WSEJZQ|RaHVqHR zmJ$_KfUvqLEL*B;BcThM6=40NNzDUgOV8|e=YEb7qgo13#>gptMpzN&B9O(pnU}=% z>ATKdzkuBev|gN*6*Mse88u^U+I5WEeUvMoq{g}AGxjzq{HJu6BqA_6T@Ee+4$oUJgvPVtaKcFI2eE^Nnv+|ua>b{y2k^ROKUMG?MT>A+*s7M^QpoWZIwEr2sV5Kq1{%7?T)Cog$~ zQhZLM2waa_vuEu?CnqGarZ%xoRKEmwS&ncn0GdH>Q%j>6%QwpH>7WsPKRS`;xphHty9aN?65 zP56?-__~$p6nPhX$q_hullW$E#zVKsxbCJV($1PJ4jXJ{Itvk^%NG1wCA*K&iBE)y5x0uq6Ky!3vaNkJB(%)*4DlN;vz+0)}7t7TbRi!Tz5f`3r_0 zIbis?Qv7t0$hf44%laaZT+C%5 ztuiFv<=(0<8J@9etmy0NRcB^6ap%3DENsQ`0~fo#wVkXnSzohb^;gD3`oj}@i=Xn!}DUGN{Fy)jkwcjVVmR35aF3IoT zdG&5`6AF99&&b50txSv85|9nXqHW;!6?}iZBjDv0u!7t~@vSQ_R6yt> zqKctaErW*H-SB0@mJne7FkD$;Xa=DVS)pVMt~4Fj6-?@_kdJR2*(2yVa1^(7q63R8 zLxT@%BgoIlO}(EKM>lOIlTtjR>vmN9dflAuMu_=oBWB&6x({lvi87qVefAz3SJO>+@6HA_?=Q(z zcYdJ%O%LBkopzm{8=pTh|2X9a50@S%!%#gxTAl+rBkMg_9=*di_>$wLAD@mtpEZDG z#^q8maGrf6scI{zbxkUkXMwyt=d}bt^cA#i>y)`nMGnqISra7ZJ!7d^Rb4-R1i#Pr zyPi-}#H)~va_0j%V>Y}pp9SQMQ1$gbBxhXQwNlwdfpoC9E=nr$)OL<0;`V0v!~(js z4H^xFFDnJ%sGfvQd}UbB!|h{YBzS@(HN&4EZVZrr4Yk){PeVBJ;-g}l1EPmt#rPQs zqlW`I;{`n&qt&J*W`pfnOt*0<8~CWuFNb|p5RPF%+zmKA976N~dN@!Kct-#gffRwK zPi_0}l1e$Oq%sOa^ubCh0MR${`7Mkd{;!V;CHO}LL=RsFadc@@#riz>d3Ho<2r9n* zjl1!;^X$>z&$ECYE^$E*hgI8Vj5>-ywasDr;3xomREQUTye?}^8E-v}6kh3|U29=O zmvkT{id4mPNxv4;?qMZ*+L-CxoI}l>>iHi;vFgvPm#mhu+aeOO^m8`Ck#&lLK0wQE~ zYlY7jeKefV3@{wM$XvXcTsJC)zAEORM7jb?%;Z0NaI?;0_me_X}>SuS@&lZuN6#ckyz)TId|NvUy$CDjgtV7Tz43aTWl z27)5=-!UZwIqG6tg~;yguzD=(wxTx18BnYIt;9sinYaM=VL7RRl<`qGo7sU{Czcl zoDBahGs?&HPi^b{&>Os zr-C6A?(?G>dn%B*l@alb+vMCUNo0F(dhN_SXUa`1%JwSu!2WyBLEO~GDBmj8Kz5^) zoiNA>m|LH6T@GnN9&s6W(|z$hH~29EFt-vTk{ly3#p?!DZeIi84KD%^-r%oZy9jU4 zbAa&1S6F!Cl|dy{D^J#{_omBw=7sra2bhoEe|($yLSOL7kkM-A9A#me&3*y&;&|}) z{e-Z*Fi;CfNXS$v2?g>EOp<5vw^Tpfg7Z7?Ry>@t08pM=;m3B2oG(0mmItvGf`)H@ z76<&!RFN3OJy(wiI;>nnIT_!NJ;{nkhA2FQt#%Wau7C!cUZGI3i^aB#J841tL5apF z_D%N%0Obi7N#T1*4100pK;|QUU_M&ANP+3VUL0fCIe&Rd&>>HW9b`VbY^L`OG9O`E zLobf-QODNdPdR)O`XB`+0j0nS;VCdvRfykN3HY6^_k7{}P93~nD&7*k9awflBm%rR zauv>y(XT--4l5v%HzKf%gf-Y6ZNZ>CFAzV#%|}l{n(`o?M$)m!^fO>SBIF_Spg}Fl z;c3>%od2oP+xd+AZUIq(-i~r}aSdDIdR~bPUkO=E)#NLYrPkYen#G4f_Z{%8Jm+bI zec2k?(PA#;Q?BX7z9;8I$q zNyAwCCE$8e`@=r3Y@xSpEb=H3!>vIf{@`o=VGni^-M+RyBZTlweGZDJ*)Si8{6dI4 z3fxBm20}KaQ*hULusrR6WW~!wjM~Xs{XXHh*D~(O(~a!~B0o|~WPiu(%92UlqQKwI zX@o^bwsvA^}SQ)maCa zOeM{xNaJ&(tL2QU~nEdvBan!2qL#$z#-B}+O?f7F>KHk(SHdl09f3gIqXx?<$G zxX)T?ELQboW+#4n-J$nSR%dqh|CAEt=l|FK@?I#cmjVdC>KU@%Q3yqljgaPH5~C5V zg9uXV@6)W=%^^*5g~cm|9?4A`&xA;oX+%YKKMuQa|2m?Q*0l6HSDa~0Os{w5*Svu- z!rgi5MhPQEks~X4fA%LmxpehXkabMpjZ29Lh#O~P?%3;mMqZf7yDC;gDitIr78cs#W9 z9q@h0W!3~2+l2!XbDVciqpc(d1BZc2eh&{d0Arh0m+a#}fe{}w^`4`#xWhWWfPe{Y zW{#iU&c1CdoaG6y8B~4hcNfaP9GO5Y&z+}+n4XREodosYSm+ZalR7CD^;ncd@r_D) z)0k~~=`yv9_%dC}#Rt0$ z!rvSjLpl2Q`yv$fzF7a~`+@~O;SsXnzuy<-@b`te#IN_oxFa!~5pLhh9iC;swhtKL zdA}Ip?mj44Lr&zkjDNi^ZeWaBW{&-0gs(;85K6ytzzH75bp3cJ66{)?_8`OQ!P*Px zeUTz!lT&e)7xb+f(=g+4Gk9J^Po|Vf@!2W9sIErX3wCfL({sxCSzSAt**lG^h{=e- zN*a%|{GgV}eKQrU0*8`htlVtfUyT%FV24$MUKMYHU1%n2Y8Oid}k%|`%CnBE) zkgH`XoB2)|f(M4i*opQY6QG0-6T7d3wBu81f;7^p^0h#UfamHEBbtSVBu<_6`?bvubXbPl60uj>wcn9j3E_WU#^jtKUD!P&^7ltA z@h~(6zZm<*=171)D!Y@E?yQ_hhqW^Dfvi6k^U6#)C2dN^I-R&NQrRWDp@8!`?RN!U zB*?GH%xlK2dhOL(?oRG>w%o-~3SBY$6pk0pP-L0$-Q1dx|9mt*h+ za|++s)1S|M$lDJ4({5t7*pk&4tD>LSR@66ZpP{_=E%*}*l%3;0ML_xa|J{R!vA{R; zdno*(Z)Ou<&liY2d1leLShk!ZXZX?>OL%>n_13+@lNK6H{mX=a1#a4(&fw;9ND_Kv zoPcm-MVETw$$u7Bsc7x;B;kB4UQ{#!HYv_cFKhzOE%vkA%V9PFW>jDkxD0FpMdwd) z^`2uGdg3C+IdH*JhM(f{dUocN)O%uGJcV~d*~52; z%SejMZK@Rx8Jl&?A)SEGntcW6!kaQJ9uYToVZZV3V20>gZbmmyWnw)6E-Mrp}aeJ zq9=ld^8F`bFwaX|ZUQr17!lNg1h$Frg>51lUP>I3wq>}J7cwnXjeo+95SrD~4q`NX zAfuS}S~`z^DZod7br=P-Uc0XROwN#D@RjR%w0oxqTPk>j&d4k~>Z!HM!(48Gc{8TI zSrL@g2VrHT*SM&{bBey@-W+l294@&?TR?I0ejAKJ1(3E_%DtjGbvZ{mQa;DSc-W3y~_Pd|zrBVstE$2XPvyzUl9a3pI5hd`y?{ z7+2!9MN7+NubQA5p+UP%Tv^SJwFAk5Tq}?1*uEtAQ!O*a{xE*)K87e!J0@}MdGpvy z?Lf(JpQyHU;+UYeg`fQf?YCKuqwGioQjKXn74z zr9ipOt2T-Uld}D;aa{!WpFUZlyBWDD?%nf6(i^+n0^ew_jPkD3v8tqT@HM-JOx8YXp(=uxT+>)n{^S+T{nSGU2#1H5yU8;7cSF_BBKG}GE3^IcdZ@dUwRASa z$(+PUjP6{CU%o219rE#$V?ml=5w)TxyFj+PWgG7Mu8f zx%fkG?{96{C%w8`yKqBkw2R3N@#-03mZJ;eXOB7gvjuK(ECZqMIW*WUyYJjJ^RL@8 zxtz@rIF8Sa|LMWO@t*>n{QtggwEmS8|6n>yC&f>RfWs?k?uR62_^H<8Mop;Zz0WUO zIj}ENrN*i{z>?xCyu#lri`ssKK0-Jget*ha?cClRGkP?r`o+ZyM(6jDLoFlz477a23$|2C+wa$ka!1^(La6M=Vq^6O0b3pDT*K~BJiw=!CxDobMlYZh8{E|uKAAU zLdl9Lm=%!}u5tDS8s{FkqUe{#`TKkbWJPR-tcb}-_aQ4HxQ41m2`5uT@CcAm4!Hip z_rabU6#sl~FdbB9<_WipKcW;AYck*@YqnP#tD}hXrBzf*{(?xLpx3TAcg#qiV~Cmm zy6QzAEizT2OaZbjf;d6@L_{B%CzZ{F`r}0#QPgeb_?mBFSt0SfxN<&@*X7YQ)E}i; zMfDX9#rPzViObiAV7nTI48}$6(Trx-|RNF0gx0 zp!g`LxPARwbc0{bUD>{OVG~zcxxFFSPSDh4C^(sX<)p9R{3exn;MmA@bYL;_M)u%B zn7Y!6apejQOnvys)<5i-C2^}TI+cfqM2RuuHV@NyN4R&%=$mdVf|k3VQ8ZE|T;{ryFSxyyQU z%&qv?q8lUcp3%?9Y4e|nT5}v*^q>iStDxJw6zbEwxLaTBwQ_Y+`viHhwj}?tdl+?dU<~D7G=|ysK z5`X8g))O6fqw=+74iriDw$MMMzd_CC32l2q=JJpU3#7k`&kK2eH`IO@1^Lb_Es_Ap z_}F{ApncKvI#1?d<3g{2_;I1GvK8O{K;2WX zwJ|O(TgiKVfqoLD_M)NULsC+r%+lzEFz;cNa`#!1vg_}h`fm|R;W*B~a>GI#`mh8h!;!zx*Qqnvp~s<$3ujCW+G zQnl@XhT0Bjs7)E?fri?w?K^?Fk}Fl$%I89sR&0@B}N zdi*@6AJf%UPtYT-c?J%)l0EY%w8dnhO;iwvV4tbVS)Yy6AK8jc!(pE6Pz$)MJ#he;wd5g=H!*1t`C%*SYCP_cV}nFv^<0Bq*~*N?mptY zTHf0)L7X+O_fqTLNX8RAJ?Jp!WhgVtr_~38qm0i1L4)9)=$lCLU`iV$<_z2E1K)`` ze5`6Y%(A=GS2VLf&4r2e;bJz*@gL1dsxcb$w%vDWp_dm%1<*c#>AHvUZG;p|4l6^f z#8Mfy4tuo3Gj9xt8?5hjXnAb1@G>I#(lCRx3yXvtuaC7J1FH@LEQ}>ol8t^1<^DI7 zhO^LXC{P%yB=^4NGX^M()ufcyq67+cn5{b&9VoivOxy6!9llsS2w|-UWsU zv=XFcEI%GQk2C<`3ONbIg+aKgz;8}w=!!7J;|;I|IJ+-J8ZzS!)w$%yi#=G(AL_mh8v(W;3@CMi3nU9!#$J?FM)VkHaYkHU6Dfz0SZbzs_HMs7RJN|U+ilX&ew17!z zZns@|RwcNAnzOT-;R>sn**a%I3yP&(D>e9nLZw0AakfscB_EKD^m#pACl?U-PMcZm zr#HT?6YDh_nBy)Kf3cuA_y}82xClnadOc%z+G&JjBlNw`cY1#xKqC$QnDX}9^V#K( zym!u_qt@kAY)wVu)bO*A@KHy4NFqH3Tw-RYm52USq9fr(i1@uwCCuXF_+H-B)67CLok2?=;G4-M&=wtB&>89}=VLM+vv}SQSg-&Lptyw2zE#VTP@L z-hFzRO|x5!(?u9bWUwMDL)+_-!!;BY^?@W`{6?$yk#&y8Wi%!HO>Z{zrM&IlJb&P$ z!N^HrcR0enB(34v=ll?fF+XE}`_rfVWoCqT@x)m_LExMDz)S5Q?G<==e1g9`CR@q5 zeA;C;w*qr7XB6J*?e2>^N#@3SyhB}bxwxFja5ECDpkJV+a(()VXN&=@E1u>Bn)eVx z>xyJcthuJj;UvsTlS$E6u!orFa)qlloTe z6rO~y$L1bfFYdim$*_>NFsaR#wfIix+7mC>Pcn2F)y1XMsV817gO`IMSB7+&Mbp-6 z$}(j8>M`DEFtoFX1i!t21nevVQ7bE`E4OF}il5@vu^7%l>F)EdriQOhNmOl;uy{7U zqmn$HrbR3Cel9xFGwxPUH~gGy_ZgRHtC69oOlOY-k!dwHlB3>d8XyM9UwIvv+Obr~VE{~s*QUy5AmyTTf zBX2I7hdm)|eP(E+OoK%s5c{?pxD7?SBqM8{Vdih|$3Jz~o^YRx)fR!f4G(mGyAAD| zMU(!aAo@AH;Q$*87{A6s8#EU3HyuaJgH}qGRVd7>c#*7Jn zDO8?ZX^&1uR*KVq6Ka1XE+vo5nm|!1E=l5h*;UiAuwX=tN-RGb{u|zWnB36+jNSch z=r6fpQHNCg+m|UbZ@1SkYhLQK8`FK*fyaqoSRHnTxzJl956KP9f!xq-wq6}tM@V$P z@qyM6K0d^(-6%6uU>(s6TSsX0+_$AR@+%4&p<9NpBb18C}F8`hjd;iB=Fo)&> zJD3aS+~m!-`ZB&SXKC8rpU)<%Je_)wnzJRva=Ec_bWO3~+kik;ctl=IvP`>&ArSlh zx%{Chq0Lm?t(Rnx{m?iO_b2h|bmXG^P1@{<#6ps{bUAHAzTS}sJgKL_*Vp$;rM_B? zMb5-?6x7KNZ$)b>4jyijS&X6hV0KpDiwSG8C0QY!zuG4G`iCA5F2=lbRxaQ;FM1wgWg{$CTk)G6Kz#uj**2 z35**o9QfAyb)80!2|lvn!#0=94*JX&qrfP*5K2azGY3f}{nW|{qMi0A4D%uhdQB?g zT0WP$j!$@Ra>tiFn)n%iPR@)oJN|?yVY@34`ipK*F@=7gdz-rYS=9II&2y=Ns)XoE z3|VbYXqd@+F2@y?+6QeEHdpp77CQk?O}zxe-_n&kf1 zA@dKH3iMt4hVo=zaH;4cwQd8K3SSvcH#35bn+QRZbsa{M;U|YZ<&Sqd{|Z7eTDZ6D z9gLpV51kwf{%;VbIh(NW zfOp}U8t}H)^X}*151vON{j1JfJHqEwk8C7VIb&A6S)sPqXOq|@P#aXW7uD5fXB}p+ z&dci^7CfN-@U)61w30EOPsubaiF&B_E=HhFeMJ^|46*HCUP@ZpW8Kewd^|6(+6i$r zpYF{y8ePXoY>Hs4G3(^j(+gSrd8?BYIj}Vz{s)h7swWZ~$}N8S7P6UgbV7gdsWXH? zFQR!V*lz3@^amfU<4Sc3{@^L-*V=?FRBwCJBsq%GrD1Yrr^d+L5gvYPBOwtLv*h{X z8|RXDTK@y;$oh^I9@~0jKMt^eTsFv#eX3ifmOCgoZ>QLo3fn&x~^dAaUpzW0hwY|D{9~MDvuaG+r zNJj?`a2}d>kKoC_E6sH_t>q!wU>Tb>>NQupM?;z^MWlu2foJ$Rq})Z=V9uSlN{)a~ zfU8pE8XfWcT+y&4AL%~@%__Es&YlLxGA1b4hft%dNI zVsvYnG(SYkv5M}ctnry?e=>oxP`A0gZES#j%vc9&vP6cR*`6VBCIG`Dx7*Rs>)7)2 z`+{>+LGl1I?Mo)TR>h`medc@}W+)3ae*3tGtmzK6ftr;lwH_=BmARK981x!sp@fOr zk%-WtEEGNIJ|dIleI?F=QW9FLwXN};_1xo(UnWwM^A3x@7!>fz z76?w;K_FgG*;=1j9V6Ur!v67&HK3`s7s!Py#ub^#1dQQwAQ<0@J9i^lGjCjC(AYm8ZRoAG$Y zvNjhjlc`RX1riZqUWki19&9aq^r%JDhpTx1Cq7 zSMKX_Yf_ix&-5sUOPd++=iU_Z@Ub^NesZrc_mCi+kmj~3y~EYtK?X=f+6JJTKt#Iy zOGLT{7m=<7YdW~HY(XequZp|g`Ds(j(cND>lTs$`^FXX*I-Ht{ZVMf{SncLQF60>`@{PU?IY z<1fsZ3+p-N9D(*IIlbR1RyfL=>C8F?$Uhl{B6E#X)$O74I08>dEO4N24;t3pJVqeD zM7X6rqxiBm3H77`S+PxI%nV_l+yU+3b*d`=KCDH<1lef}F!E&crnozPT$yyd;k+vVNp1X`?4T^wnp* zJ?YAMGuAWi7EK+kEY8_ggesw%{_d~C%w=dSEhO*sy}3+|%7G=ho$BX(sQ4JQ#{xCj z7A0KiYSoLA&{qurLu<%~=1_O20T z;50FPIClSn!MRjv>gHXh8PH&iVYemaYOwK#iHxhe0fH0Q z$pkyOJs~}aidw>joeYNH1a>k6xFR3x%8sa# z(Ei+({pppC`Cq7KX_l^e1)n~5t*{w=D?QJVbg!%%eq|G#1O z{jy35?je^`uq3p1lv&FK{{Tj?cf5g>x*a6hNHra#8%}Q?j=SVvFX4_ZXS_}q+MIA{ z)XifLrKSnH77wwW+4)r8_ik$!*$1Ai`OJ}*x2%hIQ8ESRHVp*cmXsG9-k1JxrT@hd z-5a++r^#;HwHvWr%kB!)yRYKYNg2p74!*4{nJM<;iPRjSXytXt{c&vkrvN1w8~=Ck zfe|i2Pp%ZR@LE(|OHrWvQsSGqzZnCL6zf%nJY;K^>VkCQ=^AXI_#6;cWIVStNJfjC3~5{KN#Vp{R+r(+}eEe=u8Wtl?w2oN=U zy)Q_F%K`1%8~H;A>2s>sV3?6?@;;B;D@(`$AoP#`U^i!AgJZqX1jMVg>#LIh?YqtT zsgxsP@cPJZd9<#^7OO0~EHpR>A&wrPUx9cvjH3sMP(P$19aF&u#~{431r3h9(uM=T z(Zg6|yr1@LE<8+M#%Fuu#rJs)M{i!#1*Mwu*%-`Ifx$VjmoxjUAIwud`FhLDw@<`v z8fePCPzf^GuDIM*U5=kS@6FboUVb9CoHx*%FAC)8FA7j$lCn$Ak6FH2BIU{* zyyDisT}SM>mjeVp=p%RbF?8-diaA&|?dp^@z_edfLh<2LqOC$BI&n+K(e_R-mtnND zNWasU1HL=Bu+q1mgkRlC`h=N0O-Hbj41IUt!M;0`DyWsfcgGv( zyCV$t-SJU8Apc78=li8;{-gsuO;fWcD6<(m1c_#=Y9v}2OV2WtrmyAVq8h~e=x<(D z_2FFphM=0~71b&lMOTNEXj4S*$R#Abv^2a&ne$|3B~*KRs_~C)46gqcs^tFnRWlS6 zJV6^{8&f0)2sE<5wg6ihIKMH#W-v+|l zBe+#|NR+2gQ3xj}TcQF)jvUK-gl2=fuB=&ZEfD7+XBi+|fB{s4cp}wB~ay$2nNC-dxpiiZnS~$gt34L7zocX?pXOJ zcJraVW)=G1;Sx1iAY1}4T-QL3nii@LC`f&Bm>21#4Xq=AgN02+Cl&PFED$c?e*>3b z{mTNuz6Dqyl+{&bl>xZKNT|j2UxDzACDek35pMqo%zlUk!U&)$XtL+hy8UV}JimFU z5I`O(Cp!S97icg9FulQok+8T~t1!>Y?<{j^yCGJE>O1LBOcj>AnR~({otNx=(nZM~ z##HaHNzKzWR3}9&Oq>v+C?Q-EtdF>HFOo6ll#-GcUNp0EG2Nl=7-U*SAq+7^gN)o7?_mS?Vy%QIybt!r<~TPh~l*s3N#K?{6JtjBgZimfRpoT zLkOFs)$v<{2ob+f%$xC2MAo~9hRT$#Zuwd+z zEIiU(O6MePXAyIgwuM@Z z8=m|pzvQ3fiYZR;aJhyiN(bx>I4AO{)eWhyV_F(?Y-k=ZI z8-}l}{t4jK2LQY_^!?U2j;M(eEs}vJMF@3aAoc(6Ri-hJ4)qiO*lor;7NH6NyT54W zfvZFCx_fA@Q8$4_T?R2Q3O?`${|{znND*Q6q5kL%+)hJ`V8b+Q6`=kDg~;EGNgb2@ z5^0HlZhRRcg+JPkzS$g@Ae#f;nf7HGf6OiQzaS2U8?#LGHUCmGYAy#r{TD>OZ8*wB874Bm}xllUDE=myBe`KGMnFbeSs0 zM0Rqu0bQmwu&&1cesbvFq2BxO5~xr&$Mm+ADtTz^e*5HTM#ZS!*JaftEh}FbcZy)2 z9J2i&rVk^t4D^IV>S_X;1It}dvhan^9O5dCcIEo3%VP{P!JeAkN%w$27q)X<->_N=fAZ$#af$T~1y~#U z#x=lCz_mfv+)~0ETpNrAKZ~fh+yU1Hh5(uFCpcqV(2ZF8k(Pp5P+M60Fi>dyYWnYa zsc8%jd+$owi2s~7t-y?yq4K@3qqPpy_(WDwcC`CplvmCRRmxU2VqQGDW%fg4_=60e zbJgyo$P0NX;R~~G(1+(j_>-v=(J)r{^Er}nEPBxAes!9)nk#lo8}!WAaY9e?_rh7x&{e|* zz6#b#T|&op#~~#iXgmw1OIXz$FKWN5rzG)N zZa-%#Q+Pkd7vs0SVvRaP*>AJqXG_&SuN7bsKg96=4%#U7yY+X4-~L3XF#!-+d3A_@p}d?&gb?*&<5ax;w&%ht`> zjz4Z6penv^6DsUtrg#+2FEAFGu(65d5pyh~D41fv*&RfA#HbljD;H^MfiV(p&@;cZq`0q%%{uM|LK~tnum&xxI-fE?Py38T#MS z)q1m67>>6+c!GxnlTwOsGKQHqO%*>;QLL=Lk-#F9;|}@u79(zMWOl_HGje%A^{CtI z-M!e%-f3dO3+N!8M|cRQx-R4~JcBoj+3Lth-QS;b|p!zN63AZkd{p9Pw$_La#kCRZerIjiBB31GD_%OU!0oU|Z5 zS?AIALfz43-#Fk{xll1B1kZ*10m$9qohD0V>NyBnw=`}oh2 zbW||$9lG8u4JeGX_h9K4d#&~i2lsUCCiZfYbc``Y)cO3_T81T<@U|ix z3wt;o?L8KZEJ7YqlU3WyOTl(oA>_MD{bYhWY~w_bHxf_cLz7~$;g`Eeia8~cW&-a> zQ#g+_R1WD>Lhgj2yb*CSA8Kof7jPaTZe%_ubv}b9<~5C-Z$Nmbb85O>EurG=_K>_T zx-gwiuaYHZmHDBBEHx_^!vY>{oP3Y}n)Xgj^BTJI~w5pJn9M;VM2_Sqf(K(Fo3Nur{EL zHK3)aHJv}3>3W}CL#s%7wK)QP*e}Ph0s@QECtBWr)(HR1 zxdccJOK$ zVCJPS^P0q8XdA;2{ium5ZcJOSne>8ZAn!ywAhZ;?M3}EH6aCW!VE=EvNcR7^X8g+! z@jwFbLyVMv@+ah(lD6x}_7X@ZA`00q9DZAD45jD9Or-XpGYrjx$E*&=NYFF!9Sz`s zN?Bg#sJyDHxGv%lxR#=tB4CcY{DRom7T!aZI$b+Kd_4{G+Yo_8GQX35xeFn~;Qu1S zM7PSnH_7RD9=8A;P%AI!K?hXMmsq-^N5bl)Y73mX+@W8>bE-+dB&?pl!LH1-Bb)(@ zk>94ILHzA*T>mkRYu?V_adj|xj#f=(nBupW1T^d&OcCoRc&T^AOl;ZkbWjjKvTAIl0PcnuT#R5in zlkS{U#COvVk@{$Tlg8W`s->EG8R-Psu+`+)YH!gne?>RT_c&!E7`F|$c0ZYs^>2@F zAID&7hA^2vreW+e^zwyY9pws%F46KOVn9&SPkZNQ&Z%fI&q<-V&#r6kD2<3r-oW#& z&BDJ<*&elkl;}vnOk1 z*PRoY&zrW5`8=)UUJ6~;d#mi!LS0O5Y}ySv&de>aOxYZ)pNJn<_g?&cS^!I zhIU0o+efY%@#3X~t_kZg%lak{hR~B5n0DMq-X+T00yYIPdEOA7I zGmyDz90h*b1_FY?j77l220$7y{2OWetL?||mJ{`xg}qP7e-b^1rW#bG_O+F$0~QCv5btXqRnXF+ zf)(3Jg3X> zGc(}R8X6h$i+IN)+~b7zPxCQNB6TaLwRWm$`C>=1?#h5J>2U5~1&MDn;oo`>JerIu z9ap)l%p!nckP*ulI_}i7>IS%^kJru_76WpynbsHcHt0|v;4ewvx};UaH}Z;1xI$!*v^B9T0GtrJFH3d#m`y0^PgPW9Vmv~dn0+Rv1u}T=q$Pi^D*{(JiiC)vik8D!n!5SNyEhksCWz+0i-v zu27|x(#{>t&ahOvWXnOU{>_(MGi=z;49e#Ejc6$=Y{g$Thw0KD>eHeb(&pCQJGpRN z?o{%mRn$2>A0ZEI7uBw6Rszu1GM-|ezJus%o=s_|fItZP`ZI6%XXi+?VvXpxZWOHu zF^50Y!=n!lYF_8<^L8AGI)v|F#`wF}3oks>`M78H{^cE#>K5sxjIB$@r3^T=ux++* zY}My)7KE{8m)M#R#xumMl4(#hKeCZtqx+v++kBW12sK>$7%ala4de4{YLCY>NhL%S zmB;;JTVV534fY?W#((ova{X(ESY*GIC^IDZd>Z^=EPQ4k_I_Q{iR#(Pa2r>=_LSr^ zKaFs%>gdz;dDT|H5cLVjR#>rZ1hL#ZY5(kffwZw7Kj*o+IlOVzEqQr?pPe4{G+#C! zQon%!)NgFqUvAzNBx)d=J1xS1(uU?m^-8&VwLM_+nww-jppce~u8Ix`px4^Dw0B!u zuYsqE7$&=g^Gb<+%4G(@_pcbdw$t-!A1J8i$rbf1^Inl_uV#eyd{|ag-F5}@SBB5J zxr&k>*_E7*dcqANsh>GBoF0Z~a155N+<;iSzu$Tz~KGOm4S}fgjygUzVlQaf~ELBme@oa*GOJx9Fdj&6fr?GWyNgVW47G|_e zJzA4jmn$|N`N)U|!fQEh;kAh{nn>1uwU68L^5ExU>-rG7R6kI)Qjr6v&Aw%iu7NYc zAlW*t6{zJvKhmi_TP7CesnY7ja<^rMG&M|0EcSRdohmI+Zf{KgoBBkj(stj`xmG=t?Hutm((%4M^sgyagy&3F- z2jV}%9o+F8wp4i3Wxl$be51`^zi9oQq4{qf8( zXnyH*E^J=k=zs`yE^a=W>Vkq3jfzuQir|Nf?*RqpT=cxk75+Hs&uVG#SJ>fa-*}38 zE<%-N;bxnO@LaUvewk>An&S)+8TuPz(kX2kUVQ0?xsJw1;~J zXn^AIQ%Mm}9DrbVSkh?WZLm8zf3bf5N#ayTj;a8b)v8t*r?C3tr2L3&h4U|ryS4$h9s2GU@F1=VKhde zldB!LWqg92EQ54_SsYHsfE{3;X@R0179OB{)Db8j1#cOk3!)~UbW}2Yfw>xm%yGMQ z3LvD-`soRXeJFXqToJeihd1^24ltFZX+V)w2NcQgu85$0D)NRSHSx;@G4s1k5Wqh) z9_Io02hatfGYmrJL|lmIN_g)-_>t{s8SyP*i!oTACpzXw`-(y5H(2z!6YtHFef4sW zg0vSr{u9E)qEdAKJZoyeL~eJmIVG0#jhUeH4nIVzlI$(*!=z8A#K2a7mQ>_?LcXl) z|NfEEWNK+_OSoJ#_wh@}VKc)or5eOYC7-^=zQjN-CiczJ-UI9oh&Nzsv;G&tFw;>u zdsaYI&*MmZa+ka0pkpd(G4&mAUS#u;LpjI9MFi~*#wzzUbtoVaO$nli2+%Pl3p9X@ z;UIz$O*`gD`PHCZ)N>g3+MPE24!n^GpfM?4$`vlNNygJBTd-it3jp%k_Pq)`oWOa8 zsMKeAd1e8^xipQocR$6zR~4`GYT?YORlonPSGfJal|1AGDO%4m0rVDGcK7@@-<+tZWvagn_|se@VuodAuy(gu!=MZ->Xh zyI0N>UZ1P7%I10A57d0EB(@1KW!X^6E~dl`OI*|22HY z7&}R`fLxZE25oFC#iAvJ_n;`02r1VGksv!30TV zF?g_F#~uGlWs$9Xl6h7;VEydW@GYbF3bzF_?MfhScM*Sho&WxzfE<|0$^}wcT6>=K z;+jAzOYW~!R?0uqno~pXQ%M7H{+-tRTPiD|U_Mv+Uun(Nzo#|9RMziGo-9ozs@qDQ z!T-NXo~+wSoF%RM5u;v8LnU@wo<{#-GlfIoD`l<0_0;hdLG!gU@@<~{?j2@jP6W3qhKSldR|62G zG|z@me4DwtNDq1T@xi=?gr;^?qZN?Xpdz|h3B72Ga*td7L_htV9c001zn+?x&!}ID zWe;!^n8md1yMF8AmsrS#i)bea8vS^1yD|@TXiht}Bh+^RRG15=Ezr zD|HMs_p0V|fja2j$3uyK90vc%W5rm;?%AoH_K04b`hIcV=6(|Otc>dwa{~4) zyqe3cc;fm9P7vDrd7rH{Oar#J_hvmuiYO22~ZbE8#hO%wvo^0XhT6l_U#KVI}DzUyL1}_HQ zh*~!J7Be-GS$m4ikn<4sgF-Q$LFsOKf_*G-J11dRX5|dC^3~X=FV9cKtNHU-hdRZS`X_W|zvNMl($$_@Adgij3vND6Wz_qQdD?Sg|W z86x;&^E5M2iUO^RxCDUE&$Q3wHMzeML{c zdDPd9x&RlFeO`wjk}b5sQ(a}pYR8qy+dlHP?|JNr;3BXBq3sZ1%j_2ZFyIWze;>@|5X*7t+{~(BSQCrN=f{ zz%$wNq2#-`reZj9A+F=|$ym_QyfEu@o3dgL*ukt6a(68zQEwlc%<-g`kT1N}qF5Wj zPV_;VzF?r9n*Xs?PVlL{JaO#trwOk-K%+ob^w@)giT}3v)HcZpWlzVyzy1;-4tMO2 z{0ENzWTpgsRR3E&Y>5x_YOd0qA&lqc<;+6)BEU*|Pa_{ZTq0rIZ{ytSFnnf4FMHBufPAFChiFtJRmcsH7-$XK)c=_^Ao z@AUrsv5V&o1C=(t{2k7_9}1e|+Tt2xom1kqDk;FHMErF3>@~9pR;H#$+oj?1Al=gs z6)KG7vFCZV{anD2V-Y>u8m9u49Qy`OsUhbaY39V3riSEoJ3;aur)&bD&yBS+fKK^7 zD0a!_2kKq1xSJDF4A=~45d6LT*BRk{u;Wj+t%7%9Ss=QmI8d)6szY9ec&1`X z9gDa7WDM;1rhdKW{_BFqjymTbj?vSeu%DlUsN&eNO;%|snEhV5`urg0b<_B zy4OJ48^cg`Edw<}*L@efcFX#(=neq?kRWsbbo^zN%(HQ4y^qW*hs36%`B}hn#?KOuRb%KpXD6FOz7l<94vC7X$8obo_8d{EJNhZSL$_`ynl}P`r%PVQ~kAKzJu?{KZ|C#w`oK ziNXO%r*K4}=;7we(2h6YD#1Alegby`>SZU)a zex~k{y}!68@m8bCN9m2(Wql&{5zndEU1sp051|c03nqtgmzN`mS3xs7pj*Do{ios7nmJv>*+k+es<9!t4=MfU=-Y^ zLbmF)5oFbHUcuT6raoox9H+hTj|S2L2&5y*x;q?G$VK1RJe)dk=&V0#8|6;buPq#e`#axTYnu*jre)C>K3 zqV~hQIdZ2tOxH}p%t9FUZ@g_C4BYfp<+)7m;;S2Ir6B;VMEivNEiUs6|9C3oX+ECG zDC8`n_)W`nBmb_9NN$tP0C%w3%~@pFq3LO5rXs#(=^8+{odoH&bSuM80+YU&9UhI^ z0L;qOEt{O5fv~N2PVsIlLPr5e#Ej6(Z614j``EZXve4eCW)svdEsf*$;@b_xb2gp{ z+(5?kZYUAIZlo5T9K@!#H&QW3X#C%lh$|8gG=LJ(_lpt%d5>VRu8XG_BHhqqW@>o< zzJWXx;ur+qBY6LOk1*9rbpO2BK%RgbNSAMM;H%9i+TD4P*2UfT(0kvG-j~T|XkkaZ zM^G?>J~*IN)C+7N7QDfV>C$eheP2GyE>#kqU)5%`DF5C-bQ&uiLdhvL8Nm&Np=eN4 zggr6a?bnU;{1@KV4Hu}-xMcfz8Ux%#CJHveyGZtg{I|i?fk=7ZU~-xxzT?5I{9r?l zZ=-kpcPx4*@Wbb<+qyZsr-o>D?No9rz>3i9d!O<-4{*g*9X1|@#G37JP zK7W?QJ|g!Zysf0nxNvc4BL!a|G|o;P`@J1WF}qC6iX-G>BJ(yu#TpnI??dq}g-nm{ zXqrbrXxtMBjr)Rk(u#ecK*RmWu~tG}-ZdKYQqeCm1$ntsezr*-YzVdCwI4+B0}3=A z*vyfOfT3~U7zgkZ@FIe|9EuEHM9MqF@6YJcJg5Z>fUjt#O=VNM&3&S{5Dt3c&3>Rj zh!G^Mbiwf1hr{(qsb6ioUgaF>AZOmmG2&3Dqki4E-uY^$`<03t&X3cO<<3`Eig%j# z^OeFliHHGSOrv$EZI^o(TpR49Akyfl7{}dUCv$@!YM)ASpFIk+AdnZc43 zT43`k957`>Lhoa`SHz%e9#8H*;Djye6w*pkrxBW75aJ{{6r(;EPv$|8^aul+Tam-k zUYz3Ilf>-qFZ54wV5&xXZuT%grD+wR*!xW z2V<+}JXeRAsaN$1#YUgp%Xx*4F?bMNEnG0{&b=R1+IeD?+rIKUyv;lw^!X4ft znCOeI@Ew1v_>=R28>H3m-ED|NT8@w?pQN}93y-@G~h{B0Gl+W*Zqan&59!K;+I_GM#^}p>Jr6+9w@i05%bV@XlfS6)1Oh z>*9vj_+PA{-gi7rW~W;O$aIcl)M)_>ox*ZaZ=D$*mt&!*@(O^~ZHvHhAT27~*`El= zow6dYo)mEl(@A$O5iBOXVwnA?Sx(X0{WM?ZPy>)VVKB{K7$%Cr;on-fpJ93%gVt?s zC2TY54oK~erpq1+Xx-MCbBds{FyZPY<8G8)9v=nLqGdN}(O_B2H}F|Qxav~8DUe?B zAfT6gkU1yU$0LeuaNYZ3-c4GxfWr_>i=K~+0YzOgnVn!!*F?m}U@^vBR&;;b=I`@y zCvsfLE;3Ds1)tP`)5t(xuY6bQZUO>jXgx*<)-oISYrgvTF4qn3)UuJNovE~04d0j> zAEW@sk#68PqW#W0C}UT01KY^p{=>Gn8B2AB?^2PeSt4`1rpaPgGl6oAiqDFT@6w-S z-ER~r+cPOC)Z0!pHC>kZqHM!JEPsTuWO zwJt>1Te$d^b4gz>#Ap+ESPnng#;W=l9hjtG4l;91b1=3cVZ`gTK|Zyq=j3pMe}s z00FcZaya3O>visUIm6z+H$F<%_Z4C1Xo4zUI+$wVEQRoMF@4;#nAxyS{ig?oNo&_$ zMU4x4oh!SXy<6IftcT%K9|;JPy{j#*v1&?&7IFFO&frOrhrRwdKmLEaoKm*ZuHB)Z0DGsH53+mYg1g7|Lf8{1cqsA8?p8#oFyQIpW$ASvMC(JIE+AU} z^<9w{zn(5%L_eh8JYA&vDS@X;6#7?doOIN*2RBa__mm&1c{7y&S%1my=;tk2|KOIa z&j?yF@_$=0VgnpX6q-LRSOZ$9-ES>a6QYG4+-RZSZnaPWtKOHOKP%4tOztxW^XPhhvZNQ(k{fXsY zXnlc3U&YNtaVa&(?(u(DKfZ$gEbTV_Ir;1%-baqOAff6@zlX2mL|y-hh9Gy@-o+=9 z5{zxDVB_*H449}hn;)tXSV-Uzx}CerEiX;m6C8a$iWF~t8M`G^5vF_O9E61Gc_U|( zj}(-RuG(lt$2%R7B!1K1t+Ay)8S;t!i&51SontXHC8tNDUT&u|2zk2T-;Lb?6px{J z0sCR%)`F9d&VKO304RG8c)IAEZh$^bdDj@s+L*#6YCRX0n5Q^MhE}XSp+R-_{)OnG zTrZ}d>eDZE_$CaNKt3rlNC&f8KZyQHy=Rz8lsJkYB7t9@Uxs6{#M6X;mZuY>u70euBwUFmmviK% z=^5OQFrK8X=4Ro!af~V^smybt)whrWBtU~a5#qO-OIEJghn! z5I~w1gLb%k`k`&7=ZoumGGZ`H z+QiWUZKcrx;I!plFeN9qCf|*ekWgm9latw2ujkx|{q4^90SS^muCAZTE+@X}3gw{# zyFx8^_raF(P1wJ75LoAF&nXYx^#RG(lb|`{9vM;P0)-S8HzbCi5|Xui#R&XY&Ax zg*)C-x=drcbi%&vXHRVhg`< zGKQ4r1A9uK`46Tz;v2@KiWK!K9x=rjCgG(2X!?Zv;iPE4o+?~ANu#o1Uvc=W&2+8B z?C;i5l942McwezT^gU^*LbT<6RZaTIvS$1lN5HlP=TG(Y=j!UHYHz5=bpUe)y8=DX zENpV8Gib0=bI7-OO+#6#W)`x8*tUb&%yj_Eihp7P-+!ZXV|ZHye}EYerw zO>|iAqc{Dw+p#P;r9W1yrj8f^ql8(HG@)4E3qsAg$*|A1 zdy%|5UuxQXbdgTEb@|k?TR*kxY-hJ;z<--$I9&VuK8{hGV9GMA`)2)U1=f#b;1pZG z(*s#Q>g{f%kDK*_?9%LtE#;T=@%CTR$4H!6k4i@sMEXd{{7d@Kp%0Y?9~}?ei-vf&Wp)@b)zTzVIFlEK(i0#7B61p_l~+e z5$Tyz!XBfHp>Gqq7nKg5&1#B%o&)II5E}rKso7NMCVz0^Yi>TCwOKf4y%y@3bzep? zmXU{7k;wpRcpF*Ce^aaQU5jGM+2X9TL6p58QEd)|i37^JGGfJORIW_vL)=rLkZ)KU>8@7ueY` zV~V!XeDvk`sg;$S1Ve4K4j1=WVQNSYfkfakc@+!@0PuN`@uv4_zBFP@1$+=zm881l>zA%p5 zKCp+7PQPXXPqqU0>Y|+nMn}BG&*MH8E#r7t^44PL6TX;p^LoFBZbgEFMkwtL{N0B! zTa-5Zed0`a2I!{k%54c5H&r^o!U1^%-(Lx1DiXAU%zG5$D_{j-eqJ1yw`6J4L z>%TcfIsZpM{aXqZ5J6r68FoMfk)I1B`u_EI2(@hyCHp>`cLZ`j`+F}K`Da?m+<)K6uy zO4m!nyFg$TQQji)sT$!VX!&|SBkMHr9YF5cSBRIfg5(>vP!h+5IKI5V+Ihi`!u(>n zAF=2jV)>h-qoVz)4t(SM04OV;Ay^?fFKQJa`qeAylAZh>aEA(<-}H(m-jzD7k=?S&&`C>3tzUk<{>LyO$3XdsD0GK^{67u+Y>e_D=Em}623WpCc&x-e%zzrmjpge`13{ub#d88I zU!Vp;16aN$zo7%*8|wyLaZydT!h}4Gsi}hXEQzSHA_8TMq*wlq=2rl5?`sP{+=IhT zi<)Zo71`W+D#fb_**}1CZiflxoRbDm3CR9&2?1FE`$s%L+&i%ZLT2)RRR_}cE7YpG zg!Pn}Et`fHV{EXZ4(j!imBw%P^_Uma@-1>O1V{GJDX`eR$-3WQWukS?eC0+_llZl? z7{TfZXZ#8o4_{Oe=FwY?3KgnUHlcSa)2bZ}O+u91>n-h`HA@&=d>n`l_jHD`Fbk0t zq@M2ky)$Fmw%Dq33PmXe8q2@HMWcOo4NjZ}8_Pp`!`3~Y4MF*zHx{2`2p;gmX?W?P zC6`DW79qS_IQ&+1Nl`Ck3FsdRzEL}HtFqR4q@0k>a?KBGFpZGTaz2PVG+0IRz9tF8 z9m>;KNeXd?;u@p{GTyjDui+a_$d!Y&M6HJy?xHqv`MzGk^R+XeaHvFV%$A)EoL>si zPM9A^nxBrFS23|^IOpJW@;%6bYu}%1KrIx2{2H)bkRB49hQN*_i>K$kWBh>+Y!}#0 zo^~Rhiva?`wh{2L6(I*P!+LYRQ%i4@$w<7*2P1c^RkNS;ZlpT z_I!apaUD;xA$4CoD#NPXxTyN2AzMWi>xbCK9|r3)#n(vDM7TJ4q5CJV)U7LNi1L2? zSYWa#8%F%&hVh>)q5qaRxfq(2m0SK2D_xcDq0Uk{{EuT`+TukjpCTIEts&#WA-3lw(+K0-)0$Dbjj zn>~PZpbM?=nR*cC|lgg)~#Rg$zbKIdMt_#up zTQ{hiI`P{9;gF6R^H6{6hHt_9j#J4B*f8|fmA0BY%}E_2{4{8Zoi@rrzJ(F}4U&^d ztj#2ljo~uCE<691CzSrTC$s>1Gh~Sy6&=p5G1ys^2(0fI=92};Sa|FJk~4p806UHT ze&9!cNf9!Dj0L*K=Wu~WFe!|)R1nFjI^eJ_JU~@|^P7w%R1mY~T?QaI0rxnFuweiX6d4$F*|(#ZAz@EixWW34aT47zEpxE!hn?X3hICUM@GLc(FyZp= zq#JRSSEfle=`9D8Yl2bjs_YvIu_#{xQP%v^Lu3)|ezRosv4rF79vrtA8}r>2nOlVg zETK`lQJ^LCe4qYX!rQ0%sWod-j+-vj4`4!P~}QvF4m_E7G`0s-CD|n z1h0@>1uP2Mn5~?ln=uEmkTvO}qywD-{d$a5KCBq+8YdfWlB2rpR5(Z*5D?j#eH|{y zmO9|hD4diF`M95X6#FJJESmeIzX}_u?a1Qx+>QZQH*8%Gz2-j&z!>}#d39vu{^PS| z5gjpw-@(hx{^DS`ibs#X+dY!3QjFxGtb7{@@;4`30OpK5UyA3BFj`vgXUZix}qz`tvi zQ~HC5fUU&2^ij<)%`M5p+>9yFInMpIU+7Czu@R%nWnXxxm7KA{-0=aKX=ij1DPzTevb zn`~wK5Wr>epUVxM+IADx)tw_Xtykv!VT`aa|0mBVFh>3*aZE9z1DBQ)Si{cvg*!O> zpi-&~Mp?&YT}@E=j*fYn#Xjk~NNy0p;JhOV`fhIZu#R)1{IAL|RsoNd&DFunX64%J zHxNqB_6;Sc3w93Va^^!S!{$yu0hM96KxLTT`P&Q;>YK{27w9SjgwDl}nkwk}3+8eO zI43aLHE+nij&e?2ip&lO(x)Qjn*+PIVfLdFggQq%+`$jWK$yJ{470OkR)*3W1%+nr za)y%F>PUiQU+V^WQh{GnWKn{!haun>B?okt`vZJE2HKy$E5q8qo_z&*S-7`Z_S~B+ zyY@!HncBUPBX~S}>xQX+fqi`|Uy0YygIvz5wPf*MVBdTY>^-_2mGVGlk5e z^!@T@v7ex`e8P&MwFpx?9MVv1=?&jDiYpFTGuT`b_0t$ZuR>lruST0k}Jy9gW(GXWsw(;lEBUm+%^*J}mP zCS;4#^RXTa7MY#Jp!+!!>D+xuvZWhurZA~zt$(L^NCE9Kv7^{>4=Qm)ce5f`+R>bp zA)M{)N6AMV(1~%f8GLF}lE|m&*{h9`^}gSXtxeDgAnx+Mi$TgJEbOM8U zQnYpSD@n%>f9N-lY$9~8eIEH@;oj<(D=wExh25i6qrTzS{Hsi@VeYoWy(d94DI~~F zSNmueZ_{4`-C-t`2eH>(+5y+f4p5g1gE5Rhu%&$Z%zx5;AS zNM}MlZKl9>S-^AvE#_=#jJ5TZ?Hk(rA{LnjRl0ox?@!-dk-6Fi?JBw7HClUzW^zep zq)Ns(5MjW_1ZOL(9YZ7WP7HNUch~R%-0p)VhX?xm0x5{j4a3q@wNIOy3$ID-p{viNI=B!=u2 zoV#7Ws}yOs7`X%V4!*~T8%%O8eAMGivuiyK#8Xr;{9m-h^6g*BD~G)VD4h=QcBhKv z8zcEJ^c!asrn1L-Ozwo4yhUbODS>5n3<-oEx8pM1^!e3)8lU%W-)+K0Tu=n+^Pi{SD1dn(!HAN1lxEL8t_x&ETSZDW8m9xWV%Xw4g!ZEqWBL7gyt7cEN*f zeJopXn^}OYhoXLBrUdLd@sXGZBjUyx9Du}_H(+0r7{^383*Ti2uzM=)gm8P6C&6*_ zOf+*cp7yJaPN&I^_&}GKoc&hR^Nu%UYYy}1-IOazwWLi4c0a9+STpX{4r-9cU39ET zRq6h{OYDTE?%}3)84zVV0hf{PB4!Cem~X9H0H!l3$~ojqV6P1OyVuqdz{QsL<$d5{ zy8{WREVt?cd|&P6>|FrUIb=I7HVX26JAsRBjV{Rdtp@@stqjc3eHj@oM-M;XZ~TY ziyc_?d9>(7PcKSU+2D&-_aVjsh0C6!2@*5?SCPT?lIxVEUDzg%RSDn4X)D5)N;4~p zJyWe$8_ExLnSa(EV3l;R&b69ica_YA2FwU?nX(AW9v3zrx57)TRbC*0651d`J`;BU zCQ!Im=WP1OZxbl07l)#w7QLTrW1%EvUui(ocg05)1 z=+jSl(Jy}LyrmmM=Fs0@Ky)Ru zYZB>!riX}(*X$wRL}l>|FFW9_s#xCm_BHy`a3##wDXT7x_n%%oBM`a>>V`g)sfnwIM9c4iH{HPp)`oG6 zbeaaA;5IgR)Xi0>Fk-oZ?}eRdao^kb-guBF<6LsI+)alrCo`EMLUF3PYEjH{B^lZN zaaw*2mHJS(|Bo}}zdBF-yd|If^gJ6mmVogRLiXq&B1;0`3{(l zwZ5u=B|&=?vFko@*Bcuu>|D;@OO?ldGW8Ax;bUbneKDt%M)~MIsFzj31>vtzyN(n5Lrb{6H*c-QEr_ZOj zVtl}G2~c)M5BF36%Fex;!ebS%@R-kmQ(MT;f(|G%eUJVUquq4dh3Iun48!K4X-NRL zoQUlEdemEf-v`4xHEn<&7-9mU0r-7c$x^;m{6c^L;u43*t!Dbp&!giQ77q<`v!eZ0 z01@6N+)t|x2Fbr@Z9wI~R<@ithI-^%Epe1R4P8J0DRTA%GH?8V0OIt)>`i0}r=}Q3 zqF+OE$Hv{S5M;O#0H8d{#(Cb2mE?@i=tn|{>U}B| z9L}gx;SutK{RxZVu-w{h|8~62&u$LLyk#tN1_dKJ(zlm+(mfi*y7r}bJ+EtT`%=Z4 zKFLh_-Az0;%2??+HcDC--fcW~vP#~<^HDNV^g`u=;&Lo^UM(@**3nEnUt^x9|D?`L z2&!2qWwXcEH3A%GEN@uVX}_TQ75928>ul!F3&jknU-2jPqGn+`T3Ny!>WZ^$nL!0cq(*q#LA>7DbSf4naY>yHk)9=?>}c z2Bo_}kOt}QKJWYCT6_Q2_MEf+((w()@Ebau&iOpoeccER%vrd)Y{vNOd837O+nDKs z;i5@c{gK7EzU1L&p3}KJW?89E3Y6DJ#6NS2#K%j=zFhI1WztZ~rPzsCLV~GwKH?ui0%EW)Y80_& z(=dIbuc!o#+JMjIUT}$Xe3ZnU&AqERALzTICnV;WnDy0Q>0YFdd3l+YKJ&lg*X z+@DyKTq7omZ70}c&n}{I!|(1iQ<+%;c!w_o*D%TS0tD~iZU8=O!}$EhpjEJEp<#7@ zibvjm0=Aqb=CYIjF-30586#`I682iw17PdWZ^dhmw<{KxJQ!!crkd?xjC&qYcREb>{3U2mNC zSBbQ$nqU56Px-b`OFT>YV+qioH04@U-U~ShBro90@8~U>drl^oZbv7s&ryNCqBf%{ zDeR=x*gpF7pFThm?hULw+&-N{tt(6ml}KBE%FMiYJg|OY0QEegIIWfs!SxHIuLuTV zRT?`crgvwxDgUR9oZDL?VoF>L*h#&WXL-Lm3f?6bV+;3I^2ZD-1LXPybK$nTr4Cz4 zvBHX`Rz`94v5#^nOZRe7j|p+0Mpq2x*6?#CJSKG6SFp(@L(293q$K0tHuT#{)m(T7 zMTb}O-5X+=(pwdovks3YTsfjS5&(zaFLL!4t*%_8-Y4C!GMoGNekn2yvEtEbpwpR# znjMazqIE`DsH{^O6^$aOy)9xpdNzSSvL{da-6}|{cCEjsJ$B{ud{}#q!K=LWUh1@D zlL5D2fBO6Vi_l}@BryE)UXEu3E!)d4q~Y)4!cvvJp<lOYCl;qRJ3r8y*=#n}bm?M3tG|g=NU6@&=Ea)b1#1I&Rok8< z{z&iE8Px+x zycQDesJa4}x^R(zFBoN!v<7Kd*7^Dlmig;j%<6d@?c3dKLgrb4anCd8&^Rf-m=mQ8 zoY^I%40$r)anI3Q1OfZJMMk(L^k?f>NZrv0oC|59Xc*CD!udmwldYt2dm1iV-V*~A z!+n%N>{|&RR*);P zpv0zm<4gXGNsk*0-p)H zoN4>xqD4|tT-W7DMK=|bq|_t1EGzZbRY~)1$L0+snRGN)TKKf>pGzTPFoa{jS+Om} ztj;T^K-e&B%Im3AP&8>g3x6iBO=MOx|A4#X3qj??c<&>vDk!H<3JpuMj+^WjlLe7>xZzL!OEA;GU*vCLEf3$~wfGzXIop?lL6Bb;FxBSP9w z^TAKR%ENS$SD7SW66S|F=P=c@C>W|mpJv-UX3KuxxM!jLZG&du?2)89!gnOwFg>_A zchw>NjmfSy{YIXMkNV18;%X;51~6r4y9jZ-^NtFrae)UCw8_%6Z)TA9PtcYnXx-`J zbT1f&s6szC1e1m%4=5nqO08gl*%!ZZ;xiF$T zV%Q^{?_4wLv1dYNbWLuNHOm;c))ZFri@0#+S5ef{&nE>kp3nDks4EQ>&m9a?s(U27 z8=7Wt9sTs{q$4KJjj}v&Ao5!D#44_RJB9jfMId{WttXnZh+5&U=$my3F2-0#^i7sJhD4<}o&B$?l&qiC=y{W9&CAFR$T1$xq5f2`1Da z6lrHOI@z25^Ni8gqwC@P;vx|0BlZ}}D!R-ymMSHivN0;E9!lA}@;di3-^pv~cCD1Q z{u7~FRI*X^-%Fa4`z1}I)C32(q~QjaG?7AbfP_3%o?@PIVkihVIOsd~>i`qfGL!P5 zApj%O76&l0Y&&4Q3SeXa24V*;Y4$KS6Tl_So@^Y!K4FHU&KLM>vx=h;;myyNZ+_2L zyYy+-jdF1bPoIz>a*|R{TD3tQF)^$DD^FKs9g<6X*ErFEM@-muDT}096}5lzd$jv4 zuD*cId*Aw4fMf^69nZR1yo+R2fi157-&kb zN$#+6n;xAfjv8uM(}-!VW!^9DUd;3gh%qXt8qC@wGLqS`mUKPS?##CsMSF zYsQE$I2v4oWIiW4mz8&hwd7emqz@GYX>-{Vl!J}N$I!|t| zcg;GsQw3cQ44jG$R4W~gTcS`blBgaUJlv9=x0}%D|Ge><#lnqK1~zj}swznJCgN$# zP59WAAenT%0k@F!gDa`62CX8mpXN9lQr(iy;US1WY647k0bopjq&kbpz=wPvwe>p4 zz~_N6E2{r^v^l`Np*JmbMV#G__O>^hdiD z#zI3+-7TXfFg&TG{_Zb7pDA(Y9tr)?Wn?GvK_c_#Pq8CD1`QBXSRL zFc@NP9AzsV@NsBJc3`|sD-*$SGU#?Z>)Q}GnKzetZm+(#e^9-L(-&^}r$d6Bm7JB_ zLjMDbfB=i6v8k=0HH)OFo~@y{;adv>LzWkY=I?Ed$blWqKVB=c7DQ6utfP-?C4MTd%cgs9tMUD0@0I&zr22!rG ze0!h_Y|{t^1CpeQiH#TZ)pi*t6<3q3Hx+$5C|)nJFV%gj4bQ8k$d3c;fu9RTH6f`s_|~0jyYb ztO`|V|8%baq6EI`O-(#gdPFv04-Ck-&^PTHzII{aKy1}N{8g^EAB~NX>Cs2_>n)SK zFf(Wm)cb7@l)KOi0JR+?tRMQg-Z2`ufvnhsFh(iEr0WzA)Nfcis(JLKFEdC84Qmq! z>T7T+In}aYl3w&ZU7RxB!0gdmvZZQVxR2R7YkZ)IAx`0%*d#e@!Z%h(@wR&+t)T)9 z=mR?#tyHjx0e#@K@)DpAgcTP{I}snXu_=A&jfKv;9cVPBo&IhN$jLQ)%9hSPEhDy9 zNbVBjx4!|B`YJa-QlAk2eR;D#e85C)XjFw3=n{=L$cT{qVfl5l6OcYzk`3UIum&oJRZldN`Idy~HFz!GhwBGOzBD_cU->Y4Dyd!p1AmghpA zrxN(N0oH*>2u(>WT~hrW*%IQv zhH_pY+R+E-lyVUMO6O4QkGCT7!H*{mKAAi8iR1N;qI0j-*U8HPJ8!+}BmAPGAEfb! z1y_GZISVP#KTHXg5mBIxl-m=Lm-FfS?&?CGHL$8+RgLZ_Vn*u!*(0#gqF zIt6MA=pv_~z6U@7VSR)HrY=3xYMXB2Ux0@+w>`_+iNp~d_R*{#{b;7R5VNzESrg%3 zQsPscmC-%xn{q%(%q4s$`EN9&0dG263HwmGXH*EMY{bkBjazp*Qv{Z`Z%T9GH3t0aK6aVdY@=zl?n+v5fo>e5!U^T3ZPEK#CZN#%bxzf9?~C>mgcGgg!u5T zmui+OnE&4%(wPS#Q_Ud(RzbGLEWO6K;~xbo-_AEzM@<2F{a{fmEAA_7M&8N+q-sgM^fPt8B-G*_LWs5oUwZV@vob{&{3)q=HfOgXxbBu`BP*-wldJOJrdw=0<(EjDAwEWpTH#6P>*DcB$0ul@n;6^r ziFE_J+lPy@su7xAnUP;N%FXHJaJIR_{}p?A`R+h$l&t9dVb|p+R5DKgEme!&d~vue z{3pZJ>=D=RC@p9Yk+30&eYPP9hgc*avH$HR@C78Xe>o0*0w(r3BJkNU^((@EG7`PC z4f_aIvkSM1Uy?H(5a+*eTm7yi2cP0!8Kpo$%=1yw9eOyt#^NEGoZijL0acH(q6L=y zK;zl>j^dRg*cC#8eN;%k*q$24Vr!VT$c8Wp93hC+o6;ek*E=omE6<);V@~x@J9}%c zWOofLuY7Ba*DR^RU%2AxOwe>ywWi?cbZ)aMa~LMEZhhJVy-#J03MOHYl<{X5@#adu zFwOm3^85J>D0#M4fID;ai}{fPE8NOJDYrVZyzcsaXND-0c62%N#=+gH^@28~%iV2q zV_M55d!`PRRAIs;UJ57w8&%J!qJX#mk$o%GI#!q^`|IljDS>{fcXwQIjftmPgUd}DTDd9WXwS0`7K~P7iR4ov_8ux_9z?>-sul( z4)5kheDLn>op(7KbvZKKdyCU-;VLK`s7I@eh>xLMVUcRCZ0-`IJ4Ffm5P-ww~ z6kmcoR+3FYQU{_i?WZGc?bbCJi5Op8267!BMEhuq9pUd=N-q%Re~K7%=q4~Ds*#yzZnmqH(3{JiEKz#@*MK_gDC@@l`RX#S3lpo|;`DZt1^oDP)jaO4T23Dccaq@%=4D5xk{n+}~2B%mR&!SQJ3J7~!jBoQ*MU zpaLF{fqdvJ0uGn1JP+V-Sq5Yvd*DcQPU?A`Cghg#-y>DPc)snN_TxI&xhU-unTspE z;F1#iEPj?MnM0-o5z$Mh%uiirkLNa;Ug~%lUe<{f-VW6@Qlssn?D}JAp=SxK?!0{e zVXZ%@mDAzttb?06l3UPW+Ey*@o0LtZk#7Z6`8ZNM%q*WjG`dB=_L|SKY*xkl z2XH7z)qdL0k{qKS^na9@;iQnTh9FmXJ|~lxZAxm^ro#ygL1gTTswcVYOrZ~rGK|{u zPuG7k*c+vPqagx@AS&EB7%^dUAMr~OpI^xcx-y-2vFsnfkezvA^v%7CeR(Ta2Q7q@ zZu)T71&$0HtWp#~KKa2ug6b-O>H09kZ{^(&qfCtjA5bGiut0@@J+2d%GY?0{s|kyf zSjB^8s>u-Ea$q9zOf7%gcXiV|+>_!>%3)qnDOyrFQHiH7D^zga>Bz$zgp3XJ;3Xei zc!@Q6_iXC+WbIU=!9mprKr4)hw>X{BcWR4!PPtA*ix*(%CT z2A@30u)R2lg2U8qahpf3ReN)n`fa3H0{Dpb#_VqhYIdwBpmEV1w z!R~feRuBe}Ry6=={WRTtSloPZ&c=UNsqEn{`Nj5dVf^$SX+3OtpIsI3yS(we5K!JI z^;W>N$?Q%KFd`FG!i-_+E5oVSB5FfgqAjK@RL~O(0>9HQec!!kV94)eSXBi;5}+o! zdUFT>Nfs}u_2hQW_guHX^67IGzoMCTied^IV*HvLQt&=F=T3W?JV!8tn&!MmxKw(G>kypdVP!5hVb&*b0rxEaK^r-Nq!&*`qe*uCde7sN=WOD_N# ztuFF6jkXJSUo(H;3h|s)5GjxC_$#*~9*d1gX2bganjDMOdHxH=@O*AR_i&k&@bJQr zPAKo?)L}tj)RQgd7i#qk%DWgolyN*>HA`~*7zFdU^?OM1TyC>d+_=V*+gh+a?d*n` zL(e~@OFYgWh&mCQ{MF6jK`ct$Z^*{vkyDOr1+6JP9qTx<(J=7d&!~8alKsflKWFiislmS16x1VUWmcy&3 z;*al!9H$!%cW)+az^i944XL?9*TY8*8zJ44*M}pq_uU!4c9uQL#5wLi{`UEos4Y)( zO^U{plnrX+F8ltq(!mPe9YZy_`wtta8(oWZhM(TA7cTBFbNx6{1w+r3fZ#tKP#BH> z>cfG^hsAIfNtX!tNh81IA1MN}A`H~Dd0Or~NkG~^2!~||c|iZBC^i3AlqAkZA!oWI z#XRb3!r{Q(tn2NVAm8b)hV%;WW)8Daf|u89?X*m8+L%3cnrq*$jXONfUzof!ScEMP z8ou-SR02;b&E6o0%^i00ST$ZgJ~-QnGq|Ue3s}MkJLo50DdlU5c@=o0RDOqFsvhPo+p7|nwbp*Op}3R zXm0WkB@xNS7k~^60H*Cgb-}(_;n(4YSzz$&JlMN=9F3mDnFB2&^-1}m+E7v~K@clR z4?k&VYZ`VauZ>z$U&LO(x5gC!Apy&ybC>x}G^HWs(I;SebU@{&g7^!?QhO87BZ52X z9K!g%htRCCkW6&t+fye29H)=4euRf+ZR!>JArc|qClmur(8@lH4y9A6KNBFbDws%~ zc-mEGIt*S}K*M_Ob*ZW_#IT-ypP^}j7}nnd)7Rij&A+CvrvEd2Ws8YbqwPiQcIXP* zwF?EBnygsoq;3tu+}KclMAA9O(X`og*A@;xT)lWIRde*?YhdH(PpYWvZyV2nD+}B^ zs(h-7s;K7!PlcWrwDVWgt7NJHZLs2lW@>QM6hMeK6bSL!Miv{YmezMuBZC4WEYPsd zhiuKO3mDc-SX4&20K>W*(9|@h5`9Gf4SV}%=t~ciC(!^xg5%Q$7}md*Ed1mfmHrqb zJCs(HjQ1lalbJ{omt+b9VpxyY&f#vx8Kj9?Gzor{RxQelubIZrffZ#N{=<%4exe(# z*L5-LTr7akZT8EC33}G0+s^Jl^NATFW z2!5iS{Yxfm@D8P6n&4Bq>&7I3+^QLTtI*b&m(78%jX9scPY;#Beo0xN{05<{1_p`#m2Yxd1N-F&RBm-d<&v_C!L}iPCd@Sr5jcP425TQD z0`b!jt4lUxOcc54=UfRw3e)=b@&3vq;HL5o`ok+!B;Y#@`Esa~2R)8=B##Hsl3<`e znu&VxJlkMNr_mu%f9x=p+b|LMbJhG@tl0b|D&^N&u}~w@E@2(gYZeU4^r8w;V#6C3 zOsVLe1Y`HQ%H?uF%~n*|L;x{~ynje+jy>|D*X0NcH|z^a4JC9{wlQ%h;WKpX%*WA4^a# z>mVeDMY7MR`(a@9Ua-3VKT?qcKq|sKxz>K!J9m9e1W+X{x~CSuSHNY?<-#|W@L;Gn zUo#PE9}Osd+PeWly;39hD`0Or?_26VdA|+$6vzs=Cjx;vx|hUIP-*u`wvYr!mB>*Q zjmDzp#uJsrKb?Qv&}A3fyI$lctZEXYVlNE%m4VJDYq0Z4;}TPuSv#^*?8_vtyeWl_ zWPubz<(mqCNju@4Os%&^6XeUI`5KJb`EJKJ*(W{to+^P%YKvX&=PPHL_dPF=`3kA@ zUF`jQMKg6+GVI%L!E)l^EP@tPzumOneX19bijejcdJyTWPC$0R4NJ@SlUi*=w({{x%(kiP}T|^Ntn!?oIQW2?;O6P!v9SQZZY+Wssk!WQRY^+)~ z*~Bk!{KbHW{Yy=P)&$hBypiDW@q{K&^x_L^Pee&r8Iwc61sIlJEk6N-h>QVRK&*Et zRLjHS$^VJCO0z{zldj+4 zLM-c~3?+kNdR{T5<+caTK42O;&CXSZxPhU?8X@zbUzC{dEUY`n#bWLwzlQ4qDvttFLr|QMYQ6q=5d=oQpZ@69dOrJSPj%ld42~ zv%KPI+$5S**_{T?PD9l2cc(+jE;Xw;1_A|BkXZ`RSing>&piE4kqzGG$Aykm!UrAL z77d6NU~bo7%3%bpLG}dyJrE@=)rpAxlSpxZG^{p@xvIpn|;Vk<28+`!d%2HzgVBzSh4V%SPwV~w@ zKUs1`D+^_h1|1eNWZ4gd*1cBP{4^+vDMlkiQ-er z>iT3HTxfd1_+<5!Upg>lTag%jCB7Eo7bx6}8*2iiAIGXICc0qwlef4PZvfn$VXvibelJom53dC0=2{ONz(ME$pW z|M4P{Lc9AYr}~qg4AoFht5Qw#$7g1%$u{>3 zA3b5q9VzC_59VDTejO(6(@)wz$;igL)hraO1{Xdbotz{iY)(G8&()GCtS$j^5f!Hp z*mk_bqrXNeHm?Mkxz=;F#KJ;90A5vqPOI1XmAbx^N5=9l*l3?K`t?Nxn@$KYO1XOl z&}na8%(=2Xn6qB`c${+4>skcA*$ETE?To{XZ>GQL=l>RHkhF#7oHPzm0O+*06kD(x zE_7r!5IXIo$1i*ZcdtWViTyJ@-;2K&J{Ovl0_VWOXB~2k*wjUs|DR)oA3R2`M}jMI zUbWWYWHRM@(o$Q$jpk)Qp3pwx+M~DPsW14eFY5jnnP8wKoR%E}=Ct!2H@p&jKwp$? z&>`3twFUG=m2CojQA0Jn2{%vvF{dRo2IjQNh@oO5G!|4HMfmak0pPx;>GWKw4lhx$ zUVF=?E!Vfs;yKGL=}e|y?uwk^@u;2Oz%nG(eC8EW2#^=JRv~F}&Q^3e>{~nl|Ocu|Xs1CzF z_fbec`xbodi~q{;KyV)hgh$F7Kkv4ndebqqxQRQ8hBDR=dW?`PV z#j2-g*eU{0Dka=_3r8Bkj|Gq30;B_Z`=Nz7 zj_E;&=_o)`Tr_Yz1ki!ULo>93=F*d`lae=00TU?!pHqbQWKj_6yr`*ZS@yUaWLPlU zPB<(mkPyse%X^xkMLpZ~_LwQ)w5G@5MtIzRj`vU*VKW+PkIldy_>M)rNWu8@_}$$D zf^YxLT{ofCL2b*1Cqw72)|8zER{!4b1^&iX#;6CJi2#i7Y5!-O` zYhcjGVEP`gR+BfO{dzdFp&1E|L6odYbK0#PQW0o9hnb`)P3F(l3!4}+JUu?4bTy|A z%%AUAG&M2q?uBj6>f8e(LJ;u~8tKLE*umi*_TS1X^SyHnn}ATFF;5`)-xJuk z&ivwmU!2@3$zTBRXbIwd4Ln-n_OhP|W`U0u@7n9EjJji``$tPH@!iMb(L|}tcb7^9 zTIxTpkzVS@_jb8{?J_!yc86O;HMw@Azs5pD;aceptTbvT3?>Z7%0^!!6#xBZ(G1~L zF=06(HqfeC?*zPMcF6!S;z2s@09L(pR`x;MhZa5FqukS08~K+xLQybwZe9o^#O!e( z_U`BJ)`J0H?~z-ME#%;vMLQZl(hYdCIDG=%EZ=n-!Ws+*-Pn4{XcUf}Rvr%0tW`;h zMXjw7FAls&fXdU%ptL0E7bIB`loB>jHP&cLqe65{hJw+w9e+e-^h`X ztFUYm4Uy614!L&d?Ez#2I=ysAJ$<9L?#*LSbVOnV%FXHEabN~w|2^wIkw+(CV)3L07K3Y7OlV$0?XXB-mHAzyW(E}V(2_@zWYJ2^0b?2Qj^T~do>?i=E;Jjz0(UCUvZ6na`gQ;rcEY&b35 zipy{F_L+;d{CekZKemw*V+6F>GtFaB6?zn7ns0FN*o3@M;uy3Vux>$mFg} zP+)nx(v1zfjlQwqdX-w4tTk;Ei6Gq=Qh>{|6X6uS6K;E@!5wbj&1m|N%v`7NySYBf zN>#daGYb6(tdf98yQ~O2Z8r7`T4#+qSb8KF4EG~`Zxj%D4_AVGQdlL8Azwb3nC(O#7bi~>eg8sJf4!%&_*R)XsL_AKW`FqvDOxrtCE@a6>3&|PtNK0q067g z`(SALIK)<<74uC3j&bkdHtd5{UaEoZv?NP}-4KofTf&9q<#yQj4NnG2uGdn;wgX%> z>U=m%QC#t^Ls`EAj}vUu@#x)_2SD~87bCWmst@GefyP;vhu;t8W4mWaC?xZ%8a(LP zB6Igly3L*i3pVNLwxJn$4GZlo!O5oMN?U2%;$_llTF2t$7M~|$RvhK0aL~>2ehcW~ zEUb=6T(JmaytU9_rM)AGYhhnWqlW#7z2CPb-1fS`c}nJdzw^~|1>f{Po)`a;Oy&6J zUSElku9m651aFej26`{-ki7qUz{ugxGp>D`sp-t?@dFN>kzYuF6>ptL#3_Zi2i?2C$2cqVC@$wVIDzqqb_I?n(C| zfOKzb($_BfO}d{_JuNe0;G101GU0juwGF8`TTKA>5*L^wr6%BMMmqF0> ze*_M!9<{F&f4IBSE}{t|`9vtGzxkpnz- zG7|QEkpt(5V5|rPLyeU`RVz>)cUWRBzgAgxgB4nN+=7UHi{QHO&;f(sNunOCWWg#K zavzq;SfyQO!It0y2Bb36P*)O_AxT^0ZPNs15wAyZ9Y^USMHaJ-ETsNeUWI*04k8~L zJh9G!zm{Y)nl}l^`*utF-dOWE&r7b~9R-d)os)4$g6EC(;`lLA5BEASfNe~63*yGq z?41oE+f{S0n!Li-Fu6_g1;(M{*eF~6_Ei)z0C*RVG@tzAvGT9TRRBu+pMJ_2-rxO{ zvJuWOKE!zI%q7+OHX6r6)StEa0+LVnV#cVVcX$VI2vU6zu)njt46@h^mUL59AWlrZW^uv05bsE2Or=b zLLbPu9@_UnBKCBZ0AnUZ>@l&`0w5rQoj>z)=>r5r^ne)PZKvIKZFo?v&_|%y@fyGB zRFOc9>nK})=V#9^DInl5@nl^7^7iaUK*9-3=PPYccsG*GLD}QzDM=oD^Rw{m<}p z-h9Y0T(gr2;bU!EAG;c<^qko3rkoh42H*kM)#B|m7D);XEQvuMUq|Mr)m((>0v>~y zyRKDF^!I?Cdm3Tux=3Ky;q?Oy;4x)I+Js_YnH-?+C^C!`2sxXjuT?R^M271!aCE8x zF}%oPtKZX8G;n&Fy{VrB_Y~B(D@CBnh_@fCBLr{t3cIK!KP9 zDu@!Lo@+9T2248>8fHY+nLbjs)fJ|GY0IZ;M`ooTYJjtDviA;p>>GCUdf%_`a`a z_ST#pv5V@1+HI|0Nsg+@(pr^ire`6}Cdm^a;o4z_l+P6n2Fp=UpSG~(zCe^1Wi>zS zO5Drv<@00R(kPAA-<@~5Wwq-6TK-A!Y$S_9b*^If3-2mgzBxm%J$wf8`iMZ>3@AUG z_EFu5P)pbe_q>890vybJeFz777awMu10BLOk|}Q(7i2J6j-Ujpp-6#f-lH9EKy~Pd z1jAF~6y_NKpsZ9;lhO>H0Ye{xkD&w{-~!FfrRh18L7I6G5P%MM=fAq6mqK`6)BrE59XKjtIL9$z)6-hd$cQFs( zbF|2LoAm>l>^(n5&e2!-&couj0aJS%z<01SMQI>ul*$C#Dlr>OGI28j>2kr6m+fw# zE%8B&0yDcF+A6QbQ^8YQy6g)ITrM%exF=umoovVWlQ%2;(srl0E#|L%X*FS)nO6!M zJCTGpB(y%*V|~soM%&pgp(&=EG2=R)IQsJBd0ZO0x(Lal@)|)i+4`d!9b+7U6(^eV zS?qn@?XVJ>1$SYs#nAvVp|WE-T;nK-4Df({5rfbUY4k}7$4ZQN8L3Wq=S2%oN%;8cWM2R}_g_2i$v$QHlQ#zj zRe_RVE!~}I->bKPih1&PEgc!8mM*XPk$C zlTMfJ&1*cj9XRgAYLJT<77JZ+0b_jXyM9>1EuVj#igVTJ+)yv9(vbxW=wZO(~Smb$$mwTde%xc zDe$u^vqrWW@Ue$p&#%#1)Gx+7+fYoBRgZ7K&`(%gr&GE~8|*DmZ)%bL8l=Ph=~6_! zYz8~0IDVu8<>F0mw*L#ak$Ndny700KuV{g+A;c_d6&h= zx5_nuM(jjk=d+|$B046ikJ_@lhe?({kvnaW5CH}Ai?43@S`@@^3fd^U7SzNbEmBgz zT=$F@37|!QUl(o((jvgjINih-LW?jV2f+M%FB4;IndMWA8RiPRw8*AOPTEv8%(Zmz zi7r0(DRl10JPrAHP?Jr<_dyzR*8D;?SmfKjd|>u_p3ZYK!x6@L6ky&aus_k~Q+Wop zm%_K(xBM~=v6n0u=%_obUq?AwAYR?s=fT1NaI=?FD!>;c1#z?8wq^ge@1HdRq!n&b zIsimktI0{)MO@65(_U&k+GM`YEhZ5YrfBKP+wVK%5Kb2k_SG?68LJRklgx61a91L8kx+I?S; ze_sUocXLr!ROi4QJC=Tm?Ax30qY`S_GKYGiRMAgbqIePm;bde-g_Euv1D@Bs*b45g z#LYdUDb_cF^>Y*6FxrkG@CnBCiHkB3{lWeDY>z(kZo zobC9rg8zpX0hgaTXFD=fLpY5}HFxRG#Kx09029%#6e^3HBYYv1;d%8G`3aL-zAV-x zMP|0+=_&cuHY_g0rNyzulXUh)MZ=Q`otWdy%s-aXrWw$2h=77yKJ{F^VN0Ok_P`lY zt8#B>cvwqcT^wkx%-$l7YOL7}3kI5EBmlUqVg5c`*ZhCNb>x?wuIywcUYAyouDZX% zbv0d`Q|3OhkE&Km;Dk z78}qlr{`eKz%?>eM#_eU1yxEy7AsZ1C!$`!L{t$kQTg{`#Wz7q1+*O|8}U^?1RgP# zE#_k48K;qElHf#i)Dc3i>Vf2H#XrbZR7Tzk@DX$J|8qphc4qguFsdtG7D&jL&j3fn z8GJH*i(7QmmEx!%THQ~n(q^`x*|e%>Jd6as?#cBohrNF9K zOcRcN%4WkzWTDqO{R8~$v}ueRop)19t=ze#b29D7#mnXt@BpkTdt~**Tr-ZZa@&R9 z_!vHedrkEwXaH;Iwa?(J)eo3V29Ncx!a;fmVv1xckfO>sps4b4e8%dFXX-II&1LZe zYT-v+K3)O=UXcCDHNbx&0R1pgmcmr9U_Xqny&d=oNWec>K_fuAC*W!8Iz_;-s7|Yh zGxjM}jjp0=lPLWmQ8>y*8Br#T&C|WfB`Il=X11N zv5yBo{TZ$o_Nc?ZFJ04{zENt)jQ@CI;QfnyDP16HImpme*P6Mez5va`|NrQ=uhUNuX9gdVw7E` z6|i5w$A!KlvO6De@HjfKv%0m(zCA}(9(f`nUtf-*q8RuAspWmKedir_hc0UebjpS0 z@FQL#Y~3rvGYnZpKw$=zL)Au)#JC>TXBx!1+bc+1<%7sVY_($TIt7~oJXCs~I2ZsA z6+g&B1uD3n;$wo1;9^|ZjizM9yIZ9O;C8W;`jxF8Ftuv{ruJT5=@p}wq^AY0mHaHBHu>-#Nz=ty&RNt`5~v2GVCP(dvXjz+=1eLlxz1BMrMHKeQ39} z&*9G%Sr1a1m_cLysfU!p)}W|;TmC_kBq(a%{Q!vCn+6DW_3fWLBjX%I`pSx27paXj z{jfZ3bhx54N^XElNVbps$lvkB$1LGKZR*7GOOPcZBYX^Ot^3?dXmJ;p1yY^1I zZ5+yH^Wk^?{L%(Ztoe#SxV>LXjy*fy&s1Y*$K_&@x}&qq(6@LUk7JCHryx_k z4;MMPevP<<-0T7UD$}7A`&L3gG@(AxV4x)E@w(PNoR;?XVx=PtiB>0eP3U9qq}Gp? zsB(<)`_PXsMXlK75lB-WlUgo`E&48dok86&TVxVhexq6Xa>t*JY$1Y}D3T*t=S2%> zJYEV6wE>@nxw7R-(EfaeCB(}db|p{Ew&~-RaDs8G?sbk;C(?kSRlqkeViNdv>;kV% z!8Qh;p%K9b7t%m@W=HK%9xewkV14m{-R6ksd1aZU~!kC>E1i!A{5ZJKOx<9hLzWho|+LcZ|Eu z+kJ!05s=r1!+p9AE~=iVep$x?!mR@*A(Q|tP(s&uC06sc^S*?xC-B>P*s}+)96JFH z5EJ|B%m|BEm0ZeS4%Jzoehn65Jc(sfSEz!>9KVu^#gv#)h5 zuT~7WZ0!P=jfrUWZkkR+$g*`J=&xlfA_9=Ed(LPzK{MstKUtCAHoIMh5ZLj|+JoVLf?!@3*!i!^&@nMVRRQ)so0f}ak# z8r`NW7YDc&&D0NXGuYh-zebFp+2@=3(+=i06uUXZAXomZlD1~h!FNkP;eSx}CGc&P z@9j6L4`1GiJs9a0$nUNcQ+mBENs>e-LRCXl)G0b{<Ol6hX`trt6WxmK>izBdmevv0pt3yO9~}Ygix~C{%|A!nWugkd3R}r^osa0HJy}Q0x-G($IHHeE#{suPH`b zFhoLq#Fp?aO9Hp3AFkoyGKs)p)OU+yf*i#>)!+oAJ99%|15DwI(y-SZ1$1ptK zki>)|LD+odBSW>chShX^EG$Z#^7Kzf2KT=ONB?K|`M1$9OL`NY(UoopZ=DJ3k2-Kp z0>IHH9>STVq#^H3_ueImp}ZA*Bum-ObE0PQSJ;J&buh*7I9nhEZ*SiI*QD@$dlWx} z&;Xh%XMpC)l*izEBXJ?_$KN^oOPgMvecBXbM z(UYlWNN~O(l+C+t;(&x*inBRw9x~Ee2tm5DIZsk9W?XZSH#^}#LW3P7G(P&j?WzXf zBNN8K3T{P0Z{sGQH~6B8Z+S0@8X$*8S=-=S_D#;uD9&-bW7Z*0c`S1F4;vjFOX6(4 z4IAYG?~!-533d9M;uJvht+Uz(+L%Ye`NiXWE7{4J60Rr{S>%Rl1f1j%M5X6y*+74T z_E8>|O?mGoc|2AjVti!KfM(<64jsAB|^e35*aVihAqGLw3N!!t(dhF6ESA5IMd$cMjEDHV?8<;kpiynHLs@gEj%u&7ac+q< z<-?gmU0(4!X0iFfEqAic56mRSPA@PGh@kN8(k}8sP|p~WX~Wy%9K{PpOan#fV+O4) z3rolPc5yQ#qs7uI4}*IUszxFvJ~-xP^x~0+@dYV0wx(-HHv`dQae0?jC>iIT^p7iY^$7Dyc$Cb2WT&H;5E_((q0eLPI8IJeLzSc)U8i2{Uc}#=jQAblBKV}PLe{p7?CP!Si75-F=HcNOn-PyB~=z=dRaIz0a zQ5fTV8xW(%8c((huNq0CyIv8JsVE>fYw{lOgcv6$x%M3J!$hnz%Jg27!C+3j#t}HL z*>Qx5AVU^^*28w~l3apOXCIb3FXknn^LOB1@!&irfc){#e zs6LJtnDMX}>@HPC^p=F^lWy$~H>VFCYK`2j_dYnCWai-2=FBW+W@akdPy8edkO550 zjJ(IFsP3bF@U%}|+?tTk=!$jT_%1e(wlNclHuem4Aqw=C@GQdxMK9Isc`L1sUZugf zKURvp@h}*BBcEqC9pO_K(~2OtieT=B%QM^lLzd1QC zLz5)nT_dUVW|<%SQVkGJ^S5SsaMB;Q6P& zcP_Za}ohU;(rI>CqgmS}v8`}dI zA+?ridMSrHo*h0beCBLOzr5pC4V}m@fJ%omZoQa2V}77h%ERysf_AXkCUR0+130=- z;KB7%s^6VbyFjNDo~>3L7AG9u-#Gdl>IBd!^^#%4^!Gvq1z4!$14ctxaG~O)YE{!s z4ITIuyopp30t*!a^eJ@lu}b`e4Z>14BJ}&4NVb+Z?bQEOwy&?qfeNAQ2rQPER53Hb z{xXFaaG_%Qd!e$vT@@5zT~e8QtuRp)g?cEz%r_C4>%+z~esD?3^~=eS@o^D>Z2Q&p z;!_1n{8ZRDM}j7=EN+aaT3j>$hQLm2cYTzI4?%awP^{oWFp3_GL23o;*0Q{jO+CBxev+G zYtD{488U>rzo<0Y^KX&%e_+VeH?P0~Ym*+Jy5Vq~ZrMstCc+U9c(f@9 zHVCL;59qr~5&{4Zx=Ezy-4}xu5|r+eJz4@TKZXC2jL zy0&d31!)zKP66p|5NVKBx}>C$4w01ZMmj~LL^`CqyStI@hVOZPIPTfAeZMvTvRFDZ zYd!be_jR4;ak%{Ga10M3l4Pd6rCUe8M4ST{BghHRM6d#6Z6LfbNToCj55MV2?nHB- z9&flF=OS7$5aLk3YTVzFowaA5axonWluF$Tcoow9UCDQ?sHvcZRi>oAe5txunqyS2 zd?&n%?sN~$wQ_+(bAezs4tNzRbx`zuxmatU;TO0+8xiUVbKFnIzPn2H?Mp#&Xxz1T zaq_tz$}acMIcYv1cjD$hBg?ngNaT!pT#t~`w&h06vKN*e^U_haUZ}{;Tx$O)CTD74 ziQyJHbv!uWkEh7Li;gn>;}GGo1bFSUmo#Sx-GsX#48(h&6^8ChdAg7RrRHRs;;rkh z@L)PQ52~l_J5zGc%q2cYSy%aPhW}_Svui#?ZC?Jov3NV{dN(KC8GwDOCvNyqZfAB2 zReJ}D3W~8)lU@eu>^}OtOS@BvOg+lG$ILST6@u0XEMock30XeAo&T7VT9%S;>3S1#hS`)WmKy?5k&iMhkneQ;uGgjfmJ#IT-ffr3e)Y z2LkAMB-&zmA~Yi^!<=B)qa;-=!5fR96mzJ z7W_ZZ-l0OWK~#urCednfB?H{g%iqCKNH`2~Eg1u@C3nHm2OHc$p*L0mGmd>zU=hC)qM@6!1aEca~hS*uJb`tneV3qO_y%2jM;5-v%Szp+`Bjc+L!my41MN&uj|?D zkFPARGq7Y6YIqZi6(i+c-oIgXc{U`AmkR$7tF)~R>15J-?qYyBr0w{V#00!=F5$?m zd^UATJFa0)pG(w6UNVl6K^9l`0xnv%^T$MpNJ^$B^fC<$hwGVkJ<3dd4~-Yz=m~tyhssKiggPV( zm79}ezw5g{c8v<5pG_AJtl>jxl4;hn1E`OO9A<|Bx~p9zzG0hdT+uxadI;Pb0} zfun`bWh-tTmhUPS5@Ht;CIr414hTI7b`Apkk~P=m?;`y6niQI@69nLcr~a4&=lEAy zPcF89e9V2Y=Ms2rt?t9E5kZA@F7$!6zue^ z)0uSU67he)KYbwhC*=5v>?H*Jv#47+EwR(q$+tF~eLq+zv(aguJ5=LtFA99kuM3tG zL`#7j_z%tZz+O~SPwOX8C;7R4F={0o9jJcbn0F8lH0oD2gO1IzVgh4)?J@~tv0j;$ z_ZMd<=}vZYvRn3b;XYE=*j_R$_45(eGmcI{yPHh(W%c0026iOeO(w!`*y|D)N(HaS z|I;QJct?Bg3UGf$xwn~2dfDFo;{If~eX<4=wRJWm-0Bn;a zN5j4^JdT%*29_S9umi(JKl+abUzjDNX2P8Ckm9yVbt8KLOOL|}Ah}h(k}2XuD!Vkk zeHxCb8q8qAVx*PWa}$A;D7yAtVel9W+>7Sn2D83u`eXvrMzIl5jEt#w6G3e0X2z%(^ohlcXexY;JRjmoP=Jx%}~P8NDeN zsaVK%tc%!ke?!RAB);_1#naU#w)gp*Y^@wvZP`^QcEoBzjp^9ug9BRG2b&cpomCns zX;J3yD&kd>C}^eZGMwYGv=2oLzf~2@|4blE{G5xgv@Krw6ZFEB*>_A5#nROe64h*= zl`qDWAu5C04|^I2sUzhoR|UafntDLJLB`cR31Qp`WgPM~OAJXk)T0VU-E&C6*n(K$ z_JDx)IK&F~?Jz{g7i^d00__qQ9QjFN$Z(B~)Qh3|6S$5}k?2NS5zOcghx`emVPgzunjFdCw}+oY~|B zl*iw~%ShyTZF9Sa?UW1Bn`R;xq6zez{dP5~y4&r$Q#wUFymivHH-D zs!*nwsUt!IwW~+a45Al^a-sJM<+FEPPCY^k0}rP%oDT_K4|aGdx4mDHKFBzKLv`T^&UXr}7FvCY(D?Jxnvf+b2W?(dx0)m)YbsuJ*DokU2*RC zJI5O(KnH}GEGO+*%@|_`qTcC1)cch;C|^PNhkT``@J_zsOYoO`MYgH(F6vzo*#4J% zrRp#F$`15{pnMyE4pFd`>8*Q zgd#zm<0yTH_upjEv|S(MFontIHEuxEIA3|CO_JaWmpd>&xutTU7s+n8gT}iaN=|V} zBC&_Z?>J09;f;pbbTYvGA#w_;oI}**S)~MrwGA0ZC<#YcqKx5zp|O;5J4$>#ip8y{ zwHH=t(L>R(n1V1o*g;rFG7biDi?HVjMwAm@q{iA&0I|aKt^2eeL3N6?=i7(LN0=WG zwuC++=-jSD6{9Ib+qwqB8W3TT8;zXMgr&0m92y80i%iY@;cbV>Y8DoPhv{5m9*cjCs>bs3}0 z@@m!p%J3jG57D_kLtcxF5Jh(OCZW?@UB8nj8N;IVhc|YOrkz-u1^0cmG=V z^>UIlOlrn7Ol<*&ti+u|wiR&53IYz<4$vW6s&$wX@vgWlo;V&iA3HvTuDJ|R5~84f zQ`6kd2oi^b)B%RMI>aH%8ZzTbL>)eImd@_A3OHnCjT?+@WoRh!%TvX=JPb#SGShH- zU*U1mLt;}1)gL;JA3rsJo`t~{5-VehcVy769h%#sQY`Ouk!n8^KOA48qk7i8`v38Ege z5SfzMs6XC({+VB|2HNO=015@p4W%D;yAZEe8;Xu{E#U^vk=pqdZBJo4HnM7b%h3R? zclsj}^u6({*En9)q0oARXy=E{I9{hdOnF|&XO7B;?o7K#dMY=QfI0Tbpah2wV2%~* z5ff$tDa3;1KowONG}seTt%gvwM!Lj}q@!Dq;1H>FHtk-=8;TTGr=LD^u58=Hfv@q@ z!dVZd5(<}!<`<*496Qfw&uabb%K}r!V$D@R?2TaU1ZVx}y4W~|FDfe=L6|r!iMw_T zRm)+h(x*@0142|_@7A9V4bFcTwPgRtnb8ySkO{f=@R5@Te4G7E=2ryr=Zj_O9L*la z4wc`0`SvfyJ2E4Ud8Q0TL|%N=VI2zE9#3&QV2Yyz&J3crq@CJ~)nezzss$;Or)cVj zHxD5N^)fU_K|R;q`qZ%cwhaDv83g8eeb4DO_CQDyd)(s)={Ql5M zfg~*_b-<)$jKQ@a&`-~Bivwd+st}T>rgl&j5Tlxr#RX$jVyw1@2O8)*z>DG=8f4cA z$4AfikX0B1SX-z;NTR!sOoLIKW&%pgevw4sfL*7&$~$1!>DV(?lS@9m^&MJRF|Aa1 zs0nA06A=mjn<@qn+5RpK@P^H&Pw#lcd0$=vkn*V;U_PL{1dv1nfVBmY4#4O_C8MB& z>^co6aDWLTr{d{f^MP&1jY0wb6_Wf?g{A2d?2p|&Q>$PmCDyM&lkYYI42u=@eJ-Z; z6yu+K6thF}e@Bq0>+hsJq&Cu1fv$P6dI3mC{z2A%w41~0Ms>PM%xMMJX z#1t;$X;7_8C?WefWA$e#LxP3#cg;Y_^uEg1f*%TV5-W(WhKDH8)BPot+4ek z1os$qOxp6Fa;>9X9v67_SwGggEnQNy!J5kE^}c-~+W;fGkbCf`YCmf8;L)fIT+IjN z%Ka#g6>8dBW?*ta0{Yn=^~(1~+=hP!UmC4Fz+V-=2nM7?6$``_c{`eDu?-e5MfN=? z_^w7DW$~;`T{cyxEq(SZPoObf}S@7zzRzcqP^BSd|s60l3bLW zKWsg4z!*BbR0>hhZvhH=ES8X-sUbU*0J?$`t0FaFq0FL^&c9$4yVHMzRn&&vu(`#{ z{_l9f!V5B9V7wbI{2=*&x-wX&Wv$%nRBi=~7n6ZK#oWqiRrmU3gyOg;-pE%V$h_>U+-Irijih9fven_C?E3T|;C6bG8QGo$4 zKUoA=gQmoYJ}2zmGw`GuC|~rwYDSa2+Pm)xAqgMsWb&K=B;gQ%B|RIu6&5?p~K z;pDRgn0*LISOKV)`x1dUO65gg{%>n%T7MU)e?1LFWta!RfiQyL zl_42@8HU7FDXDlNZp?>u&|}Lo@YeMv_+=TF4r6sBVsC3$_tVtr9}@((&i8)b zA`pq^Pj+XBzVp~uH<*Q)HNN6VH#-u;@OcA7rrts#Q<9nTzamq>Sb|^V3+8tke4ZRV z25;6lkaHtIS<_jXvOAy{=t2nTp!;n%^9p2a*)%=b1~XHqEv45LL?=KTn`T)GxJTrG zn@Z=ORt18x=D4^Z=jL^Dk=lD8{jk0$C{Q2@R=;9io!h;w#l^E>o$EFJ8=t~zgXl2( zoR$2`?nCh9(G0#kC~!|mATJLU;N{Vx!K9};iZHmF=5mycQEh#9unkCcxEI;B$; zLVRO!HX=gNv3+nr2fY{ZeRh^8m9PJh-3CE6NdQifbbqG;OJ(y}D!67~ppyu^09_}Y z*5j%7{58Dc-fDX0k2y-`N>2CC(>!N=s`h|2>1$x=!$+K8`k|mkSX$X{d&+UET3p@S zm@7G*IlRr<>_T0lL+hBqgqe!I*U-%eu5FO3Jj#{}4qP+%1A~e5h3-_C%ctOEQZHM% zh`LIz^xAy#>ZmdkDTwpST1%Z`blpng=!a{bnXzr(Ews`}ss8z=?>L(GnWGNOohv8g z!h6};^Mwv>3Rnu$jBU+RR`E zokG97ej<;eFu>c@Q|iN_?~+RnmxdfVxyXQvH!hj2mb;x54BQ!}r>NBSHQ$%)KIVC} z_pSr}J3qs|0ujA-J|=@TTGT;?@NJCCGUd5rM5uZ@q^iN~re5^|0DB_eKP8Jm18Swx zILeTp0FR7F7v3-k*z@TCIEX+HvGl+8>JXz@FTS-bPoY~tK4ac@N=jWuK!1dML*VHt z*moV;Yg;*S)FaWIx<)3B>?22coVsL)2~!-D7#8Q~L44nT!4X@aBB4OMTP+Gn%(45&3TpM>0Er%~8$%0EM6kbMe`t+z-A!n=o_vBDCCz7h9w#m9Ja{zA}JX*fG;j zs!MFb+59xjGK!h^AK6f^or-y0_-SiiCc&(04wZcEFASUZiPjA2+lJi_}M?^o48GNk1n}J zM^g>)A5ctwmyzqtVj0HKF4&jO)#2CNmis!D(k9*Eg6)W0Jm(XzEBU~TQ)yRnaI!fg zO=1q(Gtl6x_?zHMMS7p72_IWEyF5r>=tgH?B=6ePI+T zXWS&tS;2BR?VUJ_Q;R{jkaVCvTV0oS-HUjZM;d zuI_oT-s3-Sf;or5G6f(@D8nfOjL_AcpDNMU%bRE4cDFL+QPD z)Ku-ivxgw*@%E}uoCq9cHhzjsbJ%-H4&UbOGGKY?+ASno)r*aT(EmZ>JehNqS!3wmTmXUWBqgA#vnpz zuc`tStb5tI@-xc|SU0wu`LPrI1z**cP!^<1QBkJz&|t)}`X+JsavRTec>=Y-i}h;2uOk32welbi3{_8_nf|=FHsAaKh;q!1Y=) zNf2EQx?a&-984U}9Q2T#_3oebVvFd_8wL4pyH(%qLExVgkSK}hh&brHQH-*pO?gvC zfX^B37x`%4;M9dE5SUx=L-rs<+&MzP9;ESDqETaVU;7L<7Qp^?Wn*r0cgBbrVGRw6 zjuy9w7MJ&u`Dt-xqv;J`<1@Z$AM;}?(QQdz{MI|%FzBUXPKe9B2nM47?C-Zc!4r`d zfy8_)-B{!H`~!<@S1JMpIRRO7!{9OWq>BO&`};Y=@@MhIE8O8@6i`C13)-V`Q7$4Z z5x&ie=PzM->d?nw5OpC$?E?1bHpFTd*{KHLn4pxVUaS7}lM&`f31u?HtHO zt-PdukpfgWo(f1+5o$_I!eR*x{;F^Qxu^(&{?Ba2_C!C*1`buQ;Hbq@K}k~h1b5Du z%U8}B{Ya>fiW#LZmWn>Ba0vP|nIQ;owF1;%ukl(GU)R8rq0yMg$Ki;q!Fq>tqQEgx zN8AHBCJ?dWMAu3b7FV!9d2}A`@t0f(^;Zf){q42HL%w}=wWcxU9&bz+Wfqv28m0a= zkBgrzZ_~$4nLUp{%J;HKKd!qN3ZJ;8>m3UI$g0V^ycCoD$<>UajUTYc*j@JF@LfIO zbm7LyiL58Fu4;#^s&ziZ5k9cFwXyXpPllf8lNbjsWDZqoG9V5B1&*iUfjg!TNxm(^ zZho!Bp@pBR+!nPZfE*MLFfgqBc#9H_>1mqCOS{tU-`u>wAuQ#A`IKpOZX#qCE(#@! zDe6KUDvn0DKabJ3fB~*P%9^JJPzV9)Z$Y^mS!fuX{#FogX$BrIw1=bJf|uBIxEL|e z-{}1+A8N6GA6bU1Qh6T39Iot`;jLNIm`Ho1*Yt)Z=t=*+|Z|6RfH<&E?vym9b+5N2g-JrVg5KfrMr64chpUk#db#QA@P;5tB4F3RF zpPtWSJ+?}&;5`yZBeihZPI=z0okjY_W=wxvmsd)papsFSr+m1h>@(;kuYelAfbN@Y z19-wctjOTqfxU<=x8Y+Ac3G(hDL3bEZ0*r5e>@ldRc4Zl;~!?E|FE#S!(O)l&H)^q zr(iP_ubZT-+U66!b?0t&K%j_Z%=9N)B4`|ALCn_=Hb>F{x4h!-JH%D=?(E^dfz{37 zm)YxJ0O8w^yHtFj1R#8SVN#N~wQeTxyk>Er`40sLa2(kocL;=0)TA7iXy$hsJY<{Vw z2F`}LLW8@r0fGeooOL@)d0g}t61>H%Km6Nc+#_m%t$Js&$`FM6o|QVHHMAU5ebTkI zeGl!=6H$2pv%Hw?PM~}YV#~l#CP}zdZ%#T%@1dP&Mc^lekNieE7%yG#SJ9ipnnMTv z=L!M$>k3gFs`dK{@z^lYpaZ-@fC9A%a;Sw@fI#g`)wBE9=wneaEothD#sG+jcFd9 za0Ep@at~pL{-$ijOnPk-$3B=Ed*O2_|nP&y=|sQ{Og8kaj1+`OKj7E z?k5HX-N+BjJ)a{7Z>CR8lexOEF@#;+?$JII2p#7gwRrx(Wn#nDB3AE3372{*-$34t zn(TdAu6ph~WsX2Wy^4{{F1pFgV2LFxj03F7x2IjkN|O>kDzgFeyUJw?^3^3DUpA@; zsHx{;BF<|y`rXD#WFka5GWy3dB8tmUvIOmy+4@SPBJyr;@3xcor?cCq$^u1-NRSAQ z_H;ksB{X7*zkR!?W>p(GNCck^kf<1fj}$L#AWxsr#T>9;LUb@8eeje?@e1xKM%oXC z;+_;;%-PG=Pd!XuHU?X6EZPN%tK1S};t6|ZMkDj`OYr(NCtxBj64`~g!P_d<(9Muw zMnR)p&V`F{HXR}$91O?o?A?DWQ5=X6>L@}8@Vau7(vV!;35Ca0)nmp5!Jc!6`?>4&Y@02u<{TY2v88 zY;O|?Jly3uUXXnyL5ZfdEz_w^;PT1~2u+mo+>|o?Cp5v_+60UzC|6Ml%H?5FL(pl+ z7&Ca7i>SLR7*5}fqoO9tHHQbBeM8{ieQ+G5u;ZEYsCy+8EObHBLd5VZXN4|XYrLdv zLjag&5Cqd;0`|1kViD2E@*}eQ+A2%F9~NQ(M*s-n6`>ggGLV26o^gy=A;AZWU;uN` zq&W>3POK4crl%7r6?>20LA~#|G(>C6#jU1(G9MK66F-YD4c7e)>Rqo7-WI?|1?09+ z0NfUuHFSTU2-!@)iBRTs%zr?}ebhqL^)Y?j7y`(9l|j;ZXcq!xAhYg+Q17^_=8Y=b z7UPF;$P!{hcYr)%0FdX-o-bZ}v0fUSJoTMX`~~!D-H>A1Px+AmP9k7Nnq9*E9c@XB z5$|gt1KGa7ICT%B`b3valdLRzVO%!6Y_iijij>u()gBm5NHG~c0Aw`Ui{h53R#oLB+n-WJPxyW5|+FIeFPVKIXg zOSlE-!q3-BFBL9sI8DfHl=Tr_I&y_vMX@X9lFYtkE3S&)VW%;!d*tYLra^lsF8RG3 zTS7nnDP{g%>FzFXMhqUdTE@U)y5fO&Z+J4P zcoS^g<01UEL^yu0V?+NbOC8;eJAo0jCCZ8NM*`ltlA?!sfK0I-6$nh6xf594=LsX; zCH%ntbC7P_qrsT`RO=fV&wJeLY;D+Eq$_a%py62!FYuxQUSQ{2ZGcLB*r$2r`Y>AR z-O}@)PZ-IK)|BP_9-aO~6?pa8m~F7~^BlS(ED-Ow#c&KON%m+v4MEs*RGt^SYF&rA z$N>`8P-v1K9KPBZ4&XHb)(l8kS2U>(0w5ZmS#$@^p&6di3FLb3|26+#j~KEd9wWWxx%$IFDn;CWwTDxbtU-uSyZHjI*} z=y`jCCF($Z9#%>)6{8VyA^fB1x`Z(=BuA1jaaRlmn6KuY$cv{k7OckH%8nCdoa3d= zuBK!O(F1w^aD=ch{=48M`#*x0z`a5oOkNG6RrrW}XRqIT<4#^b?YVCrCN#CvOTo3w zT1WI9D_7rXLx%SrG|r4?CZ;Mm5%v!yfY9(H4BV75#9b>_UJ|#hwVW5`pC9twZAuyb z+LWFczCUw7`E7H?c6U#ZovIVzL7mi50m%mhLdi*mP>y=evbD%2ihocOU!)xvT zwmB<=W@FioSpYU?C0*`7AbW|H%|%sKG1*oO04GQRoAa!B4+qGksnh$!bssB|LmS1b zJke3@LidIV1WpwF-jq70EyVp}Q~GN;@^U=dW;Rdbz69aEE3K%ep@L9fq>pF;*P4$H zE(5@%Au;SlY)j1&qw-blHwUv7B0=L%*UfXHHLPot^VqnT?HC4if0@#dKvUZPE=mEJ zk<WJdJQK$(#RATwJ3ZAv2p3A|RBnO(n3X_JFt z05lKfmnqF_W)^3ma+0Cw1m4@2cGxIa!z_dB=;DLc&d6eta?3`EUA5Zw0^^f6j*sJL z5KozH4~7f1w~Zo4Gf({6c{EpuU^}w8?Mn7OUq88s9`kg=t*&^PzOw00JT-4LfCh(b z_pvwirH-Dp7y(l*GmUOo$V%iS4~LwI$f=CHiln>wM{QeBTx46|5X%pWi`Fw#fCk38 z28}D#*+K*w*bD_S6kTGwC4tk>SwE--LL&mNh_TVE_i?Q~CZ>>!J7!}o!T|?hrBh2LWq7sSg99f8 zdda%wE;vmJY*tEm1%ZvKa%qDG#&rwijICEV@IOAi$&Bk`3Cez8Y54|6tK!z{O-=Nh z?i&$i=Rm3^2?Qr}0Jp2H*Ys%NTT`1rEzJDL$3IDjSQ!6R1e1x8?Vpo}U(Upz2zhc4 zdgi^S_pI@n%ZYu9W_l@X;s7|6I34}SVisO<6O^b!n&dO9_oO*vBTeNEsKf&H_o?a_ z0rbo|TIG%AwA&O~-HnV8b4Lcz$y$T@Ll=B@!j&DL>y2GH0Jtk!+0_CuG&|gG-9Fmr zmuUJX$c&-)SQx{WQWfY_pc;VenY5wDRvInV6B*NJ1^}Ka1bX-}>5A;kSH(I=Evt%a zY^e^U`hOYyJ)|6pTjltW?| z62<51!NFRc-|w&cz!n6;y-o5=8oG{G0`{b43hqWPOUfXQW|^=B_Zc6*ssl_GO_H+m zg<*$q_NhVZ;dE2z(3SD6@(3`7Z3HYkM#&vKfMrKzNt7cW90BeL>qId3$hHqb0LoTE zW^gYoa?*?v&Q1P!Ur`yfcM)BbQCF3`OnUhg?)nr}qPPAQYUxT99^DwBWas6Ok^cgT zFh}=00s$w}az#s~*^{z>^^>yMcHgY@wgu~=BO>XB#cw9MMzS)Bw^G`Dm6UX7&pgRz z$mpMuA&?kY-aXOG2W*6S~w@P{Zk%3-MBfCV;2Xs8j3FG;|(`N&+ss!td`H-89+wrMX$~t2x7K~ z!Nt7+tS8F?vw1~V0e!lmk^E8Skf$&(o-;;l33;SMvCb9=g}{|VpjSAmP6t(c zc|*DKhP(2%ghk-y1w_v}6ZrSNsw4F8z3PMK_1h`cbIshSqj&lcA1a?4s!q9JW9^jv zZ$O~)Yxq+-Kp(PPTR3SW{UM;AwfPx7LjKa1yE}(Q0jOuyo?QPbBA{$33kEtNsNO9N z&5S|^TtLrSVHkR8QV8fn!cs^_2P9DfeVUAczQ=#`tj`w5YxwAG(11_b*raNYG$vl3{< zgV=u}0Q=7rX>r7>YP1}0V_~$uy5b<{=m(U_nIMoWEZc{g{{^{110h#e!-2okSuj94 z>oYB9?)@?d_8$?z{zDDC0_`C{-y<@$9xQL6Y*T=G*16UtP6!9DB;Y5A{RcUCX1_Uj zG~lIUQ(R(Asy}1pd9fMm0C4H}NyvFe>h=9l+Fwy}5K{v6IF}#mRd2rSg=1W&NODSU zlBqpK?@4!BM^Qm`mBIGfO6@j5+4S(w{K!e|xM2%z9*U9FCM;mp3^j&Y071e@ZeKQfpcm7E&GF|9cfpUDWbjo z{Z&EN+32fpSBGOjT|^e3;0XYA5xF_C(|v$)6|`qJ@OWnl3~@Dl*lGX3+YzctA25%* z3kh)v*1QeIY+kEk-<~^H4<@$q7;@~BRVH{ur?x<2T6Vj8`Uy9Iuy-W3`a=qdvrEeP z(*Wj6%g;|7sfMIwJ)aXd*<7U)lz5(YJ?6jOV>lD-9{AIV!St`PoInucAKaRM1Tk>< zABjIW!Wsr30Hr^sAoj9f5Q?|h)gmxB9Xh=D3Zw%3M+Ul(2p53GyYb|54bPrizIYEL zF)Uqgq9I9)OYDb z`sMeDkqDnZ^y|c^(Ewg4b`>T6C3LRU_?yrfI5B+hP7DT&O`|Lyk)}6Ka@x8GY)5K^ z#DF}f@nb8q+2nto7$qDKQHWdL-$fx3N1^9U{}F|-{Ur+d0~SyAmiZ0P5Q9XxTH1Kz0q>j4;>`GXWZ6mQwl45lb1m`2!@D?|+jsO+a#H6x`d#4ZV=M z=YnDEW8!$Ee9CyOU*ybklJvA6`UzsQxPQaR%!iGuKN2x;+$5Hx+mvWu6Juzv_mG`7nS3pRBMZ@p|+-1^aocO+Zx3* zR%LHdr9K?`r&IFZl*x_~gS7-{>13UqIa zhk*~HddS-7${?0q z`~;id2pKSlbSrN>kVH^SFF%OAnr8rx48AKk&>-R~2AGiAQq zg{Z~5#VbmV#GE(0B<)N#?5?S1YrIiz>n%f7jd=drc2Ur>H@ItZ-aWLB1PsRyJj!UJJ zh^IiW&-+#Pu|#*`&XT}kX-a2%!6$*orfW*<0swGA`n25|1WqJeVhGdIb}ZGlOW{)u zhxL(-rav~NHNjs^=1w#L`ek>cQou6=j7nFDH@}Mr(EmbsJN@`QDrK2x6V0xrzC(B` z9}E5f>f(_6g+BX3+mc}lFU^Np;y;@-fndyI*;Z9 zMy2{v>Fcgxzg;4ie|L$HWz%eU0xpr@-!2hwRN6oLAD0Lz=n`SJN%V$Qr##1XcwC+E zG6M9K(GA#sr5}|D`&AcjF#+o0mQ6(|q`|&IlVB3!68ZkyCBg+_HJvh>k1=h( zpD4!5U1)+SZAiO}anYoU5_?G9X%quP(etL3u3#Cj19ZDnIvFdZZ`y;l+>>(?9;G24$^=6gt7=w zHo09M4-uEMiCk#PMOvh;!kZ96n=o=E>DZ>T4nCF>La%7(xxH@!(kEV62iw98qpO*R z1HXqMhyv0lsPLj~QHJH-#pk_ON;P!R*Po<#9!Ut(?_LRO1hsoJ?ori++#U7f7Avk} zG8w0P{s!KV@JY9d@!R?-?0CF5Cj~~mb4v~1@f334&+Z<7bXI>(R1^d=oGc1e5MH43 z1eAwx&>s4!v|`K!S%)Kzy$d>w8PdDO2vNO2k6ens{_r!D$q}P^9@k#=VsG$?=4q0f z%XzLNToFO9IDxRLAfs~lgOrQWW|8H^86*YAn0AVr2tG71`m=;~gCmB|@<(C5$@u8W z?r%+Q*`~U7jH{Y1u?6l)eePoYDq9txtXN-Lw-0wt5Qd zBJX_ee~*X%Lhgc8?pkQr>Fd&4MM(MFOaI~LrvOSq7A&8m9utOE2a6Tr8!zf|P0RQC zg5~pSNcr4&o;&zI<#UmcreEdrA4lKYFsfT?h5>KL$iT5?E9f$e1YL%_a%R+Z-70-b zCY44`6+y#GgPtbaSkCstk}s7Z@$m2PEm+Ezj-|ii;g;_Ydq9+gtHm8kBKHm@;nq!g zSoFW`GIL0~jNn(hj3cuzP2*yW+F>Qp0S}~dyWl6tcf2%NH;CwOFI}Dfp4QrB*Rh8V zpd|GAnE{>Fl_ z*if8Nn*7FwI?|o0Y;ZBM#;|l0i(-FV%D(xHUyMRN-TNRKNv90IFQYB1bicJXM|#dz zf<-~sSpDX+_JAsM75i-LPKDXM!A7F0&Cr6{Mc-Af={@iQ!Qj%5V?p!*$FdPE3NcgI zvW4i}Um*ExNo)^Hcy`CQQS#Lj!OG8K?7VG;sM|dXWSrdvzzOI>w>&=qh&TlJw^JSV+ph_=zb4<*tgLbqcF@dY94(*{3Z|6h!Va*~?IT{C$(&_Q4sqE0P(w@U zf0&XND62yGXz%>PvcK%?41_MR z|B`xuTsv5Wh@qS8iBZH8(hwg?D^gy`ViTkz`;qOC;ra4(RKYRR=hAkl6J^V=i z(Y5Nwv}Z#_wM!e{4%c6kN-NOD@^oCQWUWP9V5Ld;DRH7HtjQzg$Z+T_|&U-J8kUAVDS^bc8-n@vXaoeum_tCc zyXT}v!)q}x*R7@s^4Vv07Rs(BfH=%uiaY2;Aq0nsa;yW zpbDyLbi*A&+V(m2KH`ZIgFGqDzX8yR^X6=(Cw6fX1bkpctN@6x3D!_M-hM#cv-CHIP3Vs+W(jyx?JaVO0iJKG-uI=efV5~vBB7mFqQLDYUo`E(VWtDLDU0GURy7k;q z+%}0HXJaqz?oX+~8eU^gPi>5L$ryc~d9T1hB$lqa28T?BW+Rfy z36qjE^&`k5BKSz;M8mTct5x%Zsjv3WI!TEG0xHC@_=!|<1+z;B*$QL2oHqSUc%4|4 z;k5|E;q#v|YTI`4R*|yk`go2Ba{Z+!iS?qWOYjBE5j4aCypG{s4&+Zf@@+F6!h$F^ z8hFBy9V{an)C}E2St1ZR&g3E*4rqqRLI`TnW{968W|+YWkhX!`?I4xoGyq=3Q?|I+ zz_ioO1k}pR=sN4^To7`L zhELSTr6+P^jkq!uBctBh#eG>^!A)5C^X{ya=+3TpY z{ElUJOxl6UDu{faB{*iBJol_(IDznRf)nOo39ymD*<6s%xyEiT{k-XF_{)%tS_oOI zRs#jp)ps|WaPH7h8Ph9^urbr4iw>cbW6oMpHrfd$k#pn%G| zIHVHv%y7_~|K(o;3rCRSe}}aB;k99YyHkq&e8D z5QSRQ!;tUqos1ZJGO#4ZR!O}tQ?;wyOwssX^U$qhD(|=VD1|K!3uJMe}v8IQDiEshMeQGJrZ z=-|htF#)JPSPD+SU5YcBwgDYgu$2D|oq31sf z&s;LmwDm0m(NvV?PQ>Pa%`;DpAoI-Ipt6^nv#AW{_m1FT=297O8oLr;M|c^Gk>PK3 za25G}N@yy(2;nNWtwgr+#Yqo)=0-=u=h< z+kn->Rf3MNXMCw+5sFTS+^dKylZv0-`O_D%-*lVmxvT95+5)mWL>xb_-$H^~=BSXM z77du{F222Kz&UC~-%DZ$XsvI+LE9usC^RGBHqB51={7#~J{EnQpK+GTTzqGoSL*#m z@k{&|s+TUyj6&H~)EQrUF(#qzM2o)tRKn z+U?8o21a>;$^0}q-=aiy@g}Gr(YPm6NqyC0_xf7{mZ)jN86>GITjzz5r z#?WDH8iG`4wdIl%t^kPyuvyJl9=&W2H5$Xt@B^}&O*+4`n`=Suuz{r3hkh`rMYaB{ z3cUm|&nGj(*qk~#(Wd5M9tC$Q8j#ewyi01~fJrTbR#jocZF23U0uap)jgATk#DabA zc$dXmB)Vf-TcALUb?cIPFcTDr2~+m>hxE9aQkO-ac|P)**R``2Q_(R>S`zm^q*#9* z*(T5a^-C8d*DVCeb+4B1uyM3Exl1=#27ks%=QSmx4@IQYhoBuO4RY-_*TD-7=^9klY&CZnAHOMkN@&uk?Jw-fXb7 zxx;mD(G|AOhvNJbA3(Bc=pZEbInQNVp+&j3BOG+5Kp0`cyWA?2+$coMmDIhCZj=s3 z==pR{_06pqp(jAHAv+ime!vS06hCGi+aEjK2a6w6c&|&Eg}}(>%{{`1eJlIYzMROA0KcHYrk|Nr|ZSqT}Dy(-xwo6JNBrLuQ~?2*0q z$X?lml)bXIvdJcU@4dI*p1a8-97Ht{km=!R0VeH06KyWlUE^f zzh7NbX7z%ISN)pdGoovrL?5884s208zd%3LjP}2%Hj^16r;LpPI`e9lbMxaDWNkZk zs0{4qRZs>7aQq1{f~5imAXr`lRGa-Z%)9_M_7CU)Q4vkyntO#l_O&T}lxP0VziP~e z`1$J89lH@ZyYDWVZYRWf0kUu9*@!!+c1w0ZU+KjHBKj?Fb+4pNX!CoYfNC3zYLmLP z+;Ks*;SK*g)uyX@PI|la|91pMUo^iLdG@X@JN5#{?~VDIB^~S^mA_sHOBKra?p`0b zsfl4_U~fPfn13RLFCmDQ4$IJ$&VXnsfZ8O0y3+j%f+agtSK8uQ;0wUoYTMZm)aKd^ zNsoRU$sC4n91x*m^hQ^w>eL(EZ)a?zjWpejVn;-d?sj}arX6CcoaSmG13-_RB(fF;* zy8o!~jp+Hgs&D1af&N5hl5vBx$(rP?&68#4Sf1?;=V)n$2!1`Ab5b>l4Tp3~#lcWA zq{?p3t+KU9(qi;QDsl`BeGj#WS98?8?Zr8ER>ptuQ<5YmoM! zimg&u_X6c(g~Ui;(+k+OQwR15lrBx<3rhQSykL(PhDu9Gws5PfYhP@MSU)Lge$nk_ z(lx9Ts0-_>7_w)BatpI>FRM10&EB;shlppa`d;@IsX zZ2s%S$!%A_>o|4=qFfaa1IiU5`NYn^nwxH;5K$Xa^WCSCSfX8I+AJ@%p?UC>C{R@{ z#pY(~B!=18KwoRPEq+qgjVu#lS(3)fa=@=~8=?WHiegz2yQQ{vYubTSmVP#dz=-)a zd6+klDqXcACGa@?!W2PuX^OB(Asqn7nu`kMsY`fV$6LF~#LfVFDGY)<0MMG~4lfG#Fs{0JNuQV@>m~Fs_8P5Sht`3;- zVC8^01(!xlBh_rQx(mpaMBpgY;J(r(_~$$rR!z}9hN9*}`Lw#il*Qknd9W3o zqb>KiLu zd0_O{Jn;LMC*ruOeW06MO~-)N5l4vbp+mozG69afHvD|U(!TFIpGtN9;NgDwmn#D; znJ)&%Khznim6I1{GXcb*O9d*6s@Kc-PpcWkIVvR<6?*zx$1^jh&2xs#(kc$9PZQGP zkC+>466I1q_pL?dEw|2;9q=fr88+Qi{7lfnLE6*(6-k?xP<;6K_iS^xDwCmxY(s~cP=s;BC} ziRq?DzUZBIjS{Vl!Pt}X>GBo{XMJ5#D2eHa_8}`#RZi>LqSPT?;+i^5^{S=ev5NS2 zm4t8YrKCC@;R4=P6GuF}+fJq>!(-8|^|1gEv?h$Ul4B`!VF* z`ua-i5VuWFvkn2lm1Q1}Q6CzE{!}#k)uULx5|kN_z)7x@6Sg=^`vDhFh|JSJQ{2p* zUG;FD_$j_$Ebdz$3QjgQr?`d6^>TjcY`4arDfx=$DB_5j2n(;fIaU-q=0X~%3O?c5 z`AG&fvGguF_U5Rw!IQjQcCdQd4QD!s8Mo7zEk>UuFy%(QioJG7&O%(Rh(nr6(iA5a ztlG-k?Qb<=-FT-0A+!heu1GaQ9Qfbw@&job%LbXCTm7z92K0%$tWpZmdI{w^xgX)j zC=hUqnu`Vu;W-uGn-e29ojDTz$Kk=-qALYx2K4V^c~TOM}b(&5jQ&JD%3I-Lx> zQ>1KJ8aaMw=uKtk>d&>+nt}9!y@Q~+t%K;+yOJGDKn z5sBAi-FyI#*?dNlOU#NfPq+qBB(%~o)PI~I|H)~|&HXRiRA~Uw-=W%YwKdKLHBsts zJQ2`oc=E1@o;keQtu3|Ir7W4XMZG;?IgE9zBe~8-mDda zfK(t51u?ZjbI)kZ=_YVM{>l_PL zbhCOelIN7o8-)8YQ`VFCj(R=-bWJ%#$fx6fdU4j=zV{oNIUh0!{2Dk?ZV?1Y#9+VZ z2K&V|BJiGQl;JJyJxDBt+}wYHX3qZw%_JlO&`haIXeO{sHCy{cHIwfZZ*q-N#tjVv zH#c8!qv^`tvA9nruuKuKF#&Xq6k0&Cxhl<~EgE#+koA8Q4TEZ@Np#;arfM)M*5K`fpYdq+$S@Kn@Ge1zTGKN%X_<=ML9%o_r0cd!zRl^hW%`~!?z-e zF?q*QzAiYt-b#FVu8!@HuJo9w;3)fu;3#y!<$x`2EB{M>BYv~g=CWzm$Y;!l_#st# z!rP=X=G1D6EW45kB$5wNzcB1(tijd_wwzJ3pI2t?8}A|;A0^MyIO-nO-Go?oqb$F3H1YA#c?u|4tm2A2ajU#YEvSZOQ?;^$sxwqNvk_0Rx7(+V`psq*AwOYl& z*F7u|f{6I9l7rW3(IFx}b&dZpwZ&|x3}S4UZzG?wC&?jdE`oU#A}?H#@ip~+{gEWe zu6$QAol$}70=}Qjrd;hPPiiI+1;&sab1{HFdpH39#9Hp4c5DBmSnS#vKv)TIiE&dp zKH8atZksbpDZC5dOrbgD!5{C<56%=Y&bAGVv;BOAMIqh&_4}i2;)O<*MwMz}+m`{$ zJz8g83aVr45;rW1JH0!LFp*z*ZJRxl+{R8~vy&FQ_bQaM<-M`+z1)Q=f`hNt5 z(=mxP$0DJH8(#5OB{zh0S&yCC=xy#PNlH5ll1rE$_2rQAXvn`kIB4b6*!~dmr#Zp) zAN`g81K9oNpr~DTbgJ!^jW2M4r@xQGeqPNmn zSC@H7i@@q}rbpXbNI$*aFkVQ6F=XbisoO-sG1VY69U1HIFYx=*$`^b*&iV-kYSM_a`)Y0TiiwWO5PqNXcP;rU z66{u?c>&9Gpg1LINftmK47VFI0ueCBsrr&z@1lSbaUBNBBqCg@;KO$pgD#;MFj(f* z(TMEJOX%1|G2nL?eqZ$B650(eq2N}5iq=tfRVn8%+7ja9{puY4dU30;ggS?@IYBLX zb;GnZECc2ST|x`NCG_vL}BV$pBppV*t{ zTU3d-cO%Cnu7QDpe&{#s2MUK3t(b~u^AVeLewL9{l##{RYm-Hvm}p=^Enj(HVr=!< zZBiZ!>Injx?olw=&a{w#s)ztIF<6g}yU~w8%a^xFHRUP9%5yj0O(oiawR|l!k}M)$ zbPg9;_&LJpn4yk4k9u{!e=j%WW_qnwFC#VIQ!-WQZ5Zb|WB2R^#=t$4w6s3*xAT&2 zH5S|`dAI|*O+U}d^~Cekq{cM2jo92t*=AnrqUcjy;jeP#({1wVz7gRh25P+sIwOrb zZ*)8l@Kp=;fY_PBl}Fv^cz~U0x~WcKr9}}xqY(ngR(>uAH6f%`$OtY;fvr}qFY0v! zDqgqNAMgstOp)!w-%hdiaBvSx7$XrZVAUa|81=Jxd2Bn_pC)%7^TVsYSlbClLPi>qgkDoU!yqph4Su$spgRpr<2Ss533ISu@t8umyiC5Ohx zfiS`1+AqQ4Av86Xc-J`Tps8^iOpVGBt5>#+ms6vj{N1h8pe0L@e#3Z>;%NQ~lB2JH zfudYxE&mt@n1>erALo|{9V!7FZ+D8@VdRwqBw*V6$cxdj(-UGyNI!^I?0i-35ddMi z>8A!Q?YR75Snha#ysim7`Y&7a{V)Nuimc~Cuy_jz7CoK#+g*QE1F}Fb45%8AlMYr5 z==RG%VF59A<9{)BpKdxneMAD1qtctb<)nmBe+jEf|)&3Ht ztO=5%eY`X8q%V`B`I*-UFOs7agVz2773ol&C_wCf+!gFGH;4HrpyX&6NRD31`_WK8 zD0-wT-KuxtpD2d>6Mfa6FZ>f&kbhzjObuM9w1Xb_C%irH_aOyHUcN7qh~gCw>mSp( zeqnfNoUy_scWwL2qI!(i<45B+%?(Ux)_d#ll*IPrc=Ct)d{MmgsID_zvHzaR%m@TX z8wWX^A>U}?%7QJU!fnM|hxAbioRXtty1d&YVyk$nX!AXT=ugCW?b_N|vj@Vje8PC_ zz(C~!6wC<9$d`?14?g1wF)@lJ9(0$TeTONS%B4)j)A@+v)W=B~$6d1Wdr1U07*}8h zY`bTGkXOmY)QuJ9n*ziNu`RbizJn%-0~AQZ#Bk%ca0>*9jr$|(O=2(&Q^R2ai40cP z!EYwUFAP03M3d1+r>LO14&!fPJVhZ-uAY8o+9EO&k%@dpV#Ou)ap3~^t7Et0*y13WT^`aC1p53KxtX8Pktu1&P%`%PQtzJk5LY` z|75iUQ{!JUXLG2$6BjIY8ic;+PE8m&*2a8dnf6tPa6it0m^@GXc& zm|h4Qe4zLbcrD{fMH&|dD`iRht0|RCO$~AHk!nO-E zgj?rZznwY~>2D-j&qdfm4SG|RO59v~v_{1y0$%ucJsbDhcBu%s-;HB}#9iTfzo~0a z!;Nl$SnhrPm>->Qiv7pAv~p8K0`-vv#-rp{M^i!_C3VNWWHZ9`>7V zoti6Ww`QyGop2A$n((49Cjt}W)I7)vEeefkdkQhu4`Vkr6FAR|yd4CfzB?wcrpa{r~qP@m3-u`Fq&S&EO}teIWuI_-Y!iv$?K z+skE{`I6u*4H3Lor7j8HsTTzA7ncNYRzUFHjOANPub6YulsII4{Xprc&ekgAfuk9v(HG=<)X@?Q zb@}e2`n;K#n`Ll{%Z0U{xd&qNf_7bY9)ty+y=wu1(e@T7FuLCO23GeMb(_sBi@Vt1 z^X68m)@5Kc3bYX8Sx~8<5`N6Z8oug4|20&?e?JZI@8DWb@j=b=c-fkC<96JXHXxuSN<6SyU#2G#=6i zF3~R761pf{B%1rFFG6S2xC0Tn)2=%TC!HTX(fC2(-*g>pS!vv(d?pn2>dB63 zN=SnEtk26a*OxF?)l*RYks^F!md#XvQicMmB#wUveFA~K#b;f_VJLs7B21VTdUKFD zzdWMg%dQWQnJ9nu#PRAAjS^3pTLV^N?~I=QAjh?wztPe)VMP`8u{yS0biV$^wY7MZ z**p}FcaPu`##8yQTD&N6BdQ-gn6l;r-`E}Cx@oqkuHZtIfX@`DN8#>4m4MRDTY}D0 zkNMl)K1V68@xi2@oy3Hrro|t6e_A~rz^wM2M8l!DUh*v}Ou7+hyiL`R&O&f>cAZERZ{ztR~}&r?2lz#j+d^w9^A{_mcq| z@*s3BM~O^o@r^V>z}qE@ElU2Q`I7xVnJ>X3gXN#A$-kxrXcL4L21Wg=FsR=A4(*?Z zMO8}=nc1nG*}36s$J032AvMMgmM*7-sNE~)j(<_R;mIeC6511BbwPBuW0={6aD}Sz z-+Zns%=%HHl*4B`D~^K?b$^V@u5qXFi|P_n-rPeNaGViNU-Qf~V%&9SGBb>1P5-(v zzqI=0VpyaGP|l|ZWUsSb3=5--i(#SHU|S^9D%uK5m;Y`Pd4P0)8c%7cvE9x&@=@}&IMF6jQqdZ+lhH&(wxzUfF1bbp9BeSq2o zE6t!b!SYMo|Nqe@DEE&x!8ll(;Nl-}|N8%G6SUB!D3W~E4ZnO73w`>|8&9DX<7vkc znDE&RgwM2p3!hKXq>{~*X%@|X37>@NlTW|8Oov!B4}0eg8~#MkF+9=8^HoMg!Ko>tagm<0Ntxkb)r-UU^?A5JnTDQFzaL^zHO_rXF7`|4Ku6aYW}Ytdxu3^d>P?cE$ANPdcSg@Sz^T1{|^{ zij1lb@=SF&VW_Df*+G5iBOQM*LuwCmb=N0_8cpE1-qZ0uCfM{bc!_3&)WWlf#1CyI z()L?|_OQ(ah@eK3IFJa6Swns5%~(2=gR1&zZ;5+l%W5*@1WtMCflBS2F}1ooe(LF` z!?kSw5`3&bZJ0>EMDN_*1MEsKu>~J7Qa>?yYHX14XvPV&zelQZ=m+fDUP9EPHB_<5 zu>=BC#E=*Bx*M2MTtLZS*>tDEbf>!P8$|PkbWlfX+%CQabDwqQ8l2cMvDlrdq|I7n zr#r6SIq&HNBE&p^$I6?fARtKNh4Lj zi3rMq~3hNKwlkrk(2d;6@W8aWzhV!R-y1`gye~gpQPiKPE%j|C>LP{a>$( zW}}fy2$qEh1i@MmagKtY!%H!C<4!3bExqj(yLC*VpZ8>`eWS?>4qYkeVV>{I^hcea zC(OUz7sOSqqvK}w4|ttMqA)L|3@g^Zd9kW51W5J-GsO>AQ?~Q9jDei^HS*p%0|c1M^+3+ zm)?s#l5MlV{Eof{M~?HR4^{A)vKk#!{>OX~`I~}O<_#Vgfvv=_2GZ{aSm?nGGPF)> zZI}=RYyQ%%Jr1K_VLRMUXiozYD1E1HvegW7V;=z#W_zmG;VjZ|baU%tD4Z-`v20jQwM zQ_BXj3YAX1n`UuLiGe@O?Dc-TF2)}E3i_lEvgmOsBKyzC7B*3%fOBTIr z@*M`B*oN7$?p8eEeZ~`rT^VjQgS>9N5iqcU0l_EGPhl>Lj}=5f%HV}b8A`zWU`QqlGp}${h7@Ij z-o8e^)?MM@_>~kf2^rA_2Qlh&9!#m0o$kkEC|X{r{Ng2^NT+5vx^M_1&En@X-=wt^@)QGV}JdOX)*xEh#3L6 zF$t-zB@3XkynMscYsI&Q6sStmEe^y?z`hE%l>%ZWp@)e_kNXl^s&M+8XXYEmS@%FQ zk_bN9ubuO6SBF~G#8$AkWgbnMzj_o2`ow9~My47?W^G!Dj9w}AOdjp>pv!2$J!nJx-!7au-D>y?HP zX__vGG*U0Bh(HKbIgR9ze`&*eZ3Q*)Y7v{AoYyNY57v=D2vpiW7B89c{+Ey2O-b?k z9i>pw$2|6=&kt}djf)@!*HWqCRL)q>ds=@1CK?ngMI0AJ6?-r88sX3l1WO|J9jYY^ zNn;8&40zzUu>H9BwRG^V5GwKt5@mE@0V=?LHTmis z*fASG#~>3VOfXX2QDK5Qf&hUf;w~5gOErr@uvf#fVHf&*|5@%WQRV=TCBsy7E;YJM zzCiT!A9vX2B~<78@?y)@o@MaIKB~QLh4?P%(~#e zeTs*?0pk{QEk!!uT3up|>L0$zox8G~E>M`>y1`@ckZ3me#6zr?wq5XgcWuSz?^*CK z=qjuNJX5&_A054Vji40uRH?F}s7o6yD2>Bc*1m@{&ip%uq(jLY1n6vvv_3`P(*puK`)5gb8sg>GnzmHXzg@K}V1X z{~`-C1K1G+XRxz{E_4sCsRD>`H3!dY?*`%UB^wZGM8k7CY>a)-THQOV)$UHuwe(E9g6g7~Fb<0qyb)FQTyyONsn`~=_Mq?Wq{Y2&^o8mw^~ z(D+;!KpPNk{NR+!U>(#r{v6L}@)}ct0J0;Kvde3O)G(Cjfb)4~w>l*+f}Oh^ABY@l zaUw;~hw4Zq=cq8)eN)Ox8`dB6iZ_E5B&-;d{ls3{X)2)Hq;Z9eroj8-dwP;}A!e1t z#i*>cd-keN4mMgjgSC7-|1=ml{*yBk;Aj3F-w2rDfV|o}2&oVm&!6Y2_>~zBaR99P z6mdbu6G+htpG}R3+9XE0XF*h?_XHp^t1V-G{6=K$~L_|G)gSP;LL+2Xj^N(=Y870jF2ix0e+y`9?1z)R6#BM1se zmt8@AW8U4Nvl~RjZ!ZX0Q0sbsd}M%ASk(K3k(-~UA4J5J=zc>o(by=0k+o|TM059} zfogf-&1?|X_xZF>@l698)Bsgeeax=>_7t=U>hXa#!N*Dp0nqy(k0j=_|8MUDHE1|w zQ{5S5gcXS8vv@;of`&k~RN3OtG_XXrsMprLR4u{#AU&XtRDgp%Lzyn;=};?sLQnb! zX(g-7KGKe4EYGx>k>_p2NyE?0jHP*bboFJ1AI`iEbwn5E@B5PMA!jc+G<@Aq8nZ7g z&#(2iVpV*Ti?$RvNzQ)__LhD2sB|XJ>s#j1inkC?gwEGu4uHxmhM_X+QK}aW)agQX zvo27XX6pczS$?M54PFOZCauW%{N)~)g!QY*?}j9eT)I`m7WA7%9fSSwORYVX)%Q5+ zwemT;5X``V6mi1wp_xzseF>Uw)O;+CGW3Ju@)`8v!k6v(KJh7D0Pe~mbb}bA$ZH*~i zIb_pwQ9$f?j7B=}7_E_M3PG(+`eVWE&>b7ckT++Yk4~-@&rxTRTst^A*qovs4+n|z z!v(D4ND-U|6Bmi{hqh3n9F>M{ zOQYms4yJmTo>Z8`VK)YkUH^XUP#u^%&0FXm=TuJAnbHw|UAIU-`Sz0tuQZTX)y)ZIR{Dn*EG!l8< zzZCBq3F>Q0jolELwH zP&$vQhPfZ0Sg$?HCu5Bx?$l#(W$!C*od&D#q-1TR;`VYHCLTVc$&qT09;i%kE{Ufa$`8DGvIJQE!IpJG=W*7;nP8*iF1eNgB4R z+>C9bjOU29^*LlIYS~DLbf)IbTqp()C8nYfsUzQF_(R`oGtyY9xXUD6;_7tC%Sdb? z#=>I8VpMBmy6#`e;K|e^Np)wuK4L{w^8(EicPEQZ*WEk}XIkef6;x43kz4f+@jcj2 zUh>s6k<@xq+W@SUfieQ6>Ki8vdnWP_uW37hxF8Rm1IxrTLESrpPgWWoZlNMFXHEt^ zd*0GWe1qih`gMh-Gq~$twsv!~Sl9R9ADZ+{BQ)8OH?Ews7fd8QrHfk$p#lDjG!4hD z$KapIVdVNVjHG9O94G(D+xfp5r$pdC@**`*sMLAH^+0wfx5&y|4}%*3EMgnq-agDL z-zB|rtBBl((#yC5NEU1z&i25wrN-<ou$}?n|J#ewtUu?RYgghWO*lNYIN)bj z+Sd*S5FmRecWW&wTmt+Rqw_HbtVJ$yx1Z!7Uyk|_*}zsSD+KUKRav1@dBYa10giQ!ji7c zcPH?eHV0t4g{uNC$BDe%lIa&Axyx}v4ULoO%W=YbIZnuUw|gLJ&3#-(I6HkK?@!|my&+@b~^`Y!3C^#krL_8-{G^wm@R+;WYm}!fi z$e&HCJ}Modkpk9CI57MX*e{OjHF0a%@Y0LJi=V#G_1|TCpQN0@R2Y&`RrqC@>8VO_ z&MUHjP*zVl#CIa^=SA*Gf2|qQH3@}nEOx2gyl!(Z`m#La4f}TizFTgXv@x48RIgGc z7$HVkaaYWABX6gfXXry#;0tLV#aXOAa*{SbMLu@*w;uZ)UAef(!{P$^(3@oOB~y-} z1@L)xJ?iqsU+wyKlb6kOG8P@+yXlB}y|%^HD+=ThQb+G~+0{O(a`WdMv_>C<3Qm8f ztf$bayOFnePB@C@LT?g+x+Uln@Fp3pZ9uQ}G{^zw3+?3KY!{f%^Bk3*-j#~qG&kmlQ)NYw~Q3cdjhh|S;61>P4JMrD9 zhr(uUeUIfPysQjFzmqtQ+;FrG@l#;DHc7a%u{C@jxr${+eoTTC)znW2l`780iTF4P@;uG%(0ZW-i)l0s2@wD1( zK>{d6r%&)LmS9pMPEvSkPNeVykEnf&H6YPeLy~M?6p;R(Q9w%!EQHP~&g1IuBQ+w7ds^S#u&K7X`h34RVo7V(q2L@PSB1Xk zDO%aL)Chv1xSmJ0t7#(fCK-)mDOZ#dX3e)=!7DeT+^wG+iH?;ZV`@w3#?AW4=1Hvd z01@0yGbs|k?x~f%4u$u=@3fFE;H$AGvblqAzoDgE2dy!)()#^=J6BUhXu8j5sTZ52 z<4v_%w0DKDctRVTWlegQL<>w;%oT? zv4q_KeC$fz1VO4x($C5mouHFB(^ku7(Rjw#<(PD~tXjK({Xp=mKxJp%u}p(Zl2e`t zW8;u#<}oLKm{IOYqJ{Tqrm+O)0#X{eSe=d*5k{wV^s~$&3pYcq)<;Fw`TofH=wfE~ zn?+SizO%*ZJjTpnMpt8*vJHuKI_NDMh1;u6M<)M-HEsDiinmo%p_SghP+s4^NY& z+nDa2FSFX_$-bLoj;7{#h-#Jk0p*V)=093OS^i}SmG}#)6)yfH z%$Xbpy1;ACTF?l6y4U?+<%?5w3aO95JWD|g4YMHg>%oY}!6yeBoTS_B*3&bML`aA4 z-kiT$bBvsBojPgl2iTiv19NxXA~BrG*$-{BuCZ=ENzW8{y}G!saJLFIb93?FYd}to zt~sIMsGEtBLD7`nnq1zw87(Cl`?=$pSFVPO>(GSMuS0brFCJIE9sqSBq)?p*qWq}8 z!f5O|jzDW(%<@9ED8C#iI^E+cS^qF^hxV4A^N4XhCz6fT2c|u#o5!!%I zGAb-4mSqC&C~U@<+u)A!a<%@u0R={|8BMraF@S2t{yedxy}$m^1Gi01gi-#9h3bV- z;|ls~m;6~c%DJC+>r{1_KiL;tA&Z;iF?5FRC|U}}&l1Yb2m*9~P+~00-*7unR{+SU zIO$1|un=q7?>3PZ)CSNd!rb^6w23_G3=qBEe0KmAYPZe-p?1M#)s*k{zWr(U3>9v& zQ9OmUi4>z=3MD#-C_g}`-M{f7#9FLCG1aN635D9jpdBZplKw~e=j%PCutUnnjLkeK z)NY7DEk7~BlNKD39jOi{fkh2!HAFZnzHq1$hwvk|){Gj7a8?z%@^A>0eBWdxai4Yk zl>B42Ompx@MJ?gV(Vd&T9D>@nF{qk-1l~IPahee#3j6 z=zINE2!mYCJXySsbx&G0&!TDd!q5pcK@PeHNl1TP2O$vDLA78n86FwGh@%?8s z8ToD+N#&B3@%=XbfO1NkkRN6mf+bYq81tu7R(!jn3fc#a>2N3dy^Ht9Piq^i{kDyf zcbC^;?Wa7-VNm<&T}*q+C6hBd9a#Hm8!~7=)qL-DD&Qrc05H9eBq2_YYmMt#TiYj; z>AaD8Jppc$IxHPVP;q!*Pd`GHHiGy9V0sgHv(0~8v?N#bPYZ0CRzzTB0Zi{jOLEVL z>~~t+N)~Jmtz5269_%(;cs9)lp3z&{4T?pY?V|1VtTM<0cn?7XNj{aVuyQ-sOXD8{ z>`g_V2fg~=dXb`Dc&?n<0H_sJXv%2-I;n5X}|?bsXBz`#Iy@ex^Oght|9j*Q*~3 z>o`QMEA3KDf@+du$kXaqsGQNKh#wGhetKYH*Y9<`F~m`U z^YX+RM`P;7QRSQb{$S%uNKfbpGkYhH z>FwIE%8^;aE|2x@J#)q9jGwdl_cmO02DZ!1R_ctAaBi`At~X%wm6oqJ;%w;h39&v$ zicg@6x1REvLY)#gAQr4{BU(g?PsFvJKYwphN6<-%e7#ScbHcqK<>xmXDZU$0pw%o1 zFUkb%3751oscmnh@6Z#IlUlXA-cv*yF85YBNMf3zZZ_qH*CcheG~ z&nV^MWJ}tLnlL*=y#2XXI3eR}nyjUOX5@!JZCrjiZ3~+;$A`0i^9QCc4%snqm71if z`jf*I=@p5k9_(6Y3Z+`2Kj2Bf^Qi!<@y+TQ*FP22b^S|l@4de(suDm^{mZoRm!kSr z5HfAZ-hwHr+90=vG268cDXOXrAh*W9X$h+?6E(*1vIW&;c<8TG<0agY697Ty_sy10 zN(7fxGbXV(Ro1L|Q}%V%7zLAEFy8J3K}Q=R=zPQ0QE?52xi&`H8TFlYX$#|ZhdA+v zZ{M4A?sN6_+{0!EjJ+IFPO0Fkp;ohyk8HtdmMceg5~w*xpcH_O5hPqufCOTG3mCmn zp@b_qTmFv(GNvfB8bgwIxXD50ew2-Mjmu%3pEjV{x-BvtEXf$HPS+t0u4AMyq zt-5y{&2(x?sCQ-YHTYHk^+^Fa(xNhddab!zs;uSut#|nb*oI+hY@ox;$0FNH`nL!o zx7u|myV6$W}$uC`l!yla#Vf_nF#>^KQMa&&o*-&BIErM{Os>V-NUY2`ZfVvHW`V2MP_3PG% z>gtKJDh)+O%Uc1pqT$>3N@{8hk+Zheknp#LMa$?_ui{%6O*d%0p844@+8d7%c#StD zGTEScJKdhMBvF@!|2;!WXk_3tnmtFA`YLnH07V0u+R01%+U`wKQ{pvHZ&o!ytc`i# zy-^40Ay2{2SA(`b=*&{p4a|a#%6QPTGqGp)e90$0~R|3@3etSWzub`Bi>hC{JnHDF!Ao1J~?IiOc zNN4^Phvn|B0bURghYh!DfxIAI;vUo9%Up98gGF@>r>glY&{kC-ZM6fYt-h`rNp6Bw zBCd(OEG@bHOIzg+ywp}d*ez|!xUCJb?<{2JWVp!g`vA?0$a-dKFry6MyUNzqM5mh-C+X*o;lCc;Fyy1#JN~l$fi7yZaH?3cE~i zS#*_S+s}wE1F^QS!4l&Ch)^4*t%|^+ZP}cG298-{`drh+q{&anwr|D{v{*6LH4Hec znPPGscrq~crsY<%!mMDrDrzCf#@Duxy0W}p$}Y}MVl-zD`hJvtImWc8h?Wlv!^)Cb z2zXX`d9?^wI7BILPruh{IIuYmoBokOhE_YymZT@SRhl39NJ?d~G9@5#IvM@&)i%^Y z)H`Zk0DPl|ZAz=P8G8#ebe6ilb-w6O7WR$XQLf{zst;BB=7|&aNn%e#A=kSg z+$x9ZN~Akm2#Hr&)LgK?DPn3WuYM>st((MG7fP){#(U{Mdz)U`*c0)VD|&3CY3&gF zdj*UZ<_FGxi+;!^ET83yHBj&@F?tbSd5*%Vh5g;2V_ zFGej75LOcwy5HC#KdGj4Z?0y)n7nN{(C%sEDSE4Au1&OL*=iNtdNvv+%o)5XNnO~7;Z?u(Me!aAHzi?Q7oyzH9V--gmr9{kDr|k=Q)_`QK|y3{S$3JGPH?4tmXAE<8}1 zsTw-iCl0S#XUZK}kW~@ZgR2 z<_!{z(G>#=j9m!=w7{U2h(zOTN9oeN&e599yjud#(~TqOC2fshaWGS~+$Csl$Cep_ zccXEnGubp4u zT!((W*6Fno8Q7tul7zy~QFWi)-cI_EK1LY~XGMEcXe3G}4vb|R9PUyc-x^Tc#IfqQbz zee;jA;y?LLL5Vy2ztSq8c=ZN2%$&e?eNUf4M7ef-5Gj@+v&|$oZoBzpiHf7A) zy`0d|5N2g(A5Rha!?qaHyB|+LvsrlB`0P=B$$37f!1*KCW8?JaUyluGC&S;- zHfxZgKejvf5^t2ccx<>q(Kb{NZR6?H;alT?qHVz-+9p;?M!O#dqHWhfT1ARv;LH3) zTBQSuwvo(Trd7II@x%-Wx0S_$&0mT26u$>|T;JNMdzHW;z*4tBe)hy|A7Ww9+Ob`tUJJ#D`zy1!)y2 z2)@yOwQCRz3ky#EVm>=7?C4XwFOq72mxhnpyZ=YqTLsmbwe8lp zyF+l-;BLWP0|a+>cZcBa?(XjH?jGD-0)(LX7wPW(es6zWe|7DueFm#Y1rF9+&pq$! z8iSro>XXHMyW=<@Z%W^>NYHT-omBlZcM##rdqw59e);T6dSm%9h*1yatj3OrcV9R~ zhbx%&?@U=U`y8GtAX5fq%TL_#o;L;i%=-SydynmU7jy^wJ#VTQ>F0>3{X1`pq3!7T z)dbw$v?7f}>simVHMejnSL6-KbmtnQ!M4FG`8H1vU4{0J4~{0R%RUYRui6)VimL;G z#*}O}g--Nx+U6iu1^BVu*M#n;9~MbX;@3N$0j!G85IcUMaO!*NY>%Tu!_?P3HAPoFAGz&%`24Vr4D+L%|Z4tFyS6?}=X?6x*?(pP}u3jd= zhCM;~Z0!NoGHA$(o&f3x3|IO46Czb79ymlp)Ne6!%AUR!siZZjMJ6^*x<lS!KyhT8pu(CN-|18-If zI0_as=7V-aaZ}&%O1``m{!H(2dt3cSuB`h%xw6+2K&AdK z&X*1_$mQGGua9eX0K)ovuB<2|?^uo)PB|6f9`Col2*oT0kSkNT45sEyTmXm$1RMIy zNS$z`h?HG~RM?N4`zTrw9Pk>|_Z{w?PyWD$TK|C!)d1*==&Mfla{thnNd2WT5k0l* z@>jp0addP9oFB-;hZkmDkVbS>05^g)awKsinKIw`B<6cGb;}{`ciS!dcXI^`uyN7j zTLQb^1AFIu{Yl~2quYAd7j?>VM})QN4>48H7u?F@zn=L5s<9gYm#Se{^q%2@9=X=B z(ag+<({yWYZg}#M|25^iz+FHpQXU~b=i5vofFq0r;CziMGPj=pX>I0}82|o$3zA@@ zJOdxP9tduN=byR!hqd{g-Xq@7HG8)vXqgF+skXx-M~+D)VWaD3M;6;*p5*h=LDB#W z?v%q_-t@o0q2#|o!X~P=l$j1v63L(6{YCK`rb77}wnbHbd*r{9AUf>P?LY!C@gU`r26G%O<>_-Vj-H>yyHqd$x6;l%mm&*ES)UUo&H!=QthETC2gX*ixx7 z-+CRSAKW$&z|So-^N3AS(Nm+|HFJL1IaKxf%DLWjRV#N$1LNdDQx{oa)FpvTneHO~W(DN`>$D%AL>;p>@H`L?a>gEqDs+=uh=Cm>XI zjsfr>CRb~FVLn1gjw<9mphUfp;>z{iVD!C<+~cjcf~}Dd{3(O|pYfp~IqSB`Y0Ck! z5Zw2fMS=rgoa0?%^!~>;LqWcaQ`u3XS~oqrcD=vq?2BE8r&QmB?>E^vH%QPQ50pi^ z%!Y!!g3+;E<)G@O&WrE~SU|Fmkp$oLRx-tr5E3A}CV3!|VgiIEc?7YVHA$G;x8EWt zT7Sxof{z~wL~~r80~i~v+qefnKk-|?0!)bHfn|sr+Zda*iDX&pyMF6{9J}<7Jh=5; zbZvJZgqO$;fAv9^sM+ji=mGfhUq{cdE{QrhDhrti;Y-xhluh`3%wezgDH!Q4*Kibt z3G}yc>POgPWZ67>+F6W`H-`R{lHqgC_)rC)Sw4KDR$qCVuWyR0Jyk+&|LG}%^IyhK z8UA)o{Ea7?LkwuQWFk8Wz)0224SX$s@iulfZEbHm9}xlS)vibyZ{5W8Oj->8OMhto zJRzs^_{7@oqh21Z^9N6Klja?}LHCZ`xW61mdDkCy-5QYqT>|q|c~^DUIvy7Y(8V|o zsDj6WZ$z;RAs5NG4PBV;%#22HoY#4#(rvLDJ-8P0fR}Kqj$O5BwR>YK+AUMqIg}0a ze{W133t8#_ELM)R0sevclp=uHoeE%fcf%Ff?_+dZM|11-6a4BKr7A?DLQ9QsD~=~i z7qVmw&=05x^1LTMT;_2NHJVn2^Z!hK@KrDV-m4tR8$)yq9WT_^Z8t>8|_Mg=MrF zhvkk#N@_paT4@?`^TJ88K4|%QfY0<2S<)NLQHu+e1#DAPMa=XM{{T9`KhQ9)Qn2cI zwgCbm7#2<$6Gw@ z*s*8kylCpE7^SlZ8~=l-kyhR$pY@mnfq}L3dC`TnNDZ!|dqz|;fGL_vWy$szQxs+& z{Lq*Kn5tW5JRBJ9TQO*fIuosv|C&tob7M}MYEc53c@z;;AV!)jq=@(N6Hn{mF!oJ^ z-R+Oqyyo5UL#Uqs?q-#QN6EPXNpXi+Cuy#s>uC)Ci8e!;ZRG>+Y;@D#(d&%#nnsU6swT-po#^}bJ32)1TIf@@UK1lj{dXfHd2_!kOJEz zeJ{~>0dQsvBvXq?A7>B+%jxDaz1L&BV?^L*BLK{ikF$s{vhhyU1q8wIZF7iJ(oEwJ zy*Y%_G48`&cV8o6NWash$xM9)mvN{>rH&!Ub5aupOU?74ODZ zH8Q)BLV5~@+{yKuD55;2*Mh!e{=Az0v^zl1h78)P!Hh)13+4I?WPj?@W}=_!8!CV# zy4OvorAx>L&PVnp2J%i4MLsi^!i4%w66FSNB?1PJL`4B4(d3cf-z3p=PcU5b3UHrT z$MxNCM1nc&xg8QsA+9M`9cAfJQMFF+Rm!yel**~iFw2=t%Z^CPh_@3a5JWfGQRxRT z9tgx=&Ju(E{iQ*{h(5qOT8Xs(cw+pkgefQ6{{j$y`}7VVeg<8en3~Y`&Hdje#t$Tk z4ZDIqUtLtvU}_}S?4*1$l}9rN3WSj+g{cS(KkyM*6I zL;jAczZ(&)fk38wK6ZsV;z|UhzPpRwv!#vi*;1p<;YH6wK(-VIkS%SFyREaA`!icw zgKt+k{HGC7i+4vN>YysZobIL7z5VL_ks{LV%kPD3jlm9Q= z2ESr-`+pkr@9fYj7YlhyyT)k9auJp=mL!$O4u;?C&}^$e8uawPv!yZK=~svEMnrbg zhS~g@R#Vi^HY~Wwo_s>@Gs)qfGsz#>Qg)%sG0tg|_qvNKtM%`hAr($BV+djNQ?+=i#@E z9na^ufIqE&H+YE(_cw?90l*=TBJjeE20==|2B;B52p^+9T|(`nfV~&!&PQA z$WY_O;?W%1zcL*m{A{DXC%Hxg2`>REu>x9vSA5?qvFpGi=)fTqttkt6NK<}@1gc~G z%@72^T^y7hXMPWdI({+1s6c@)B0&3n;=-BSK!Rnl7QQiM-5uWLd&@vX;$oXmE=czH zfzsa5sicTTJ||U(V0HM--6Q+vM6@ofJl;QHpI|fb|KS*5VfdH1QI@~mWsY0Z{B6Kk z1KH48XwM5@iMlFsvHSA+8t1-(6Aidg*b)IE!Jdea4%^=m8V>!Bm|)c>z8P>s!PWk& zj`gn_ii_EQhVQt70XTmi&%ytHoIka&-|(HXJ0-;}VixFGm|%fZ2FX7L4EhIXdi#ry zPL9jO+2zd+^d7jiS1I%llgJOT)4ny?9ULp7f z0KRh!xS^;bj+*?|57>qPZYXZdn?i!#@t}ZASNm^KV(A}AbDQ_m!1H&et7`$|-oOt4 z-w8{3hwljXGakIdchcVBJMUtG@h8D2&IBYRqaMK1cno|y>yH|^>dD~ z?2H$`vf}$DPVE`GXV{ii-_r-wr3>?~!ArAbjMwBqUyk*#KRzy0+HftCvbcGDzp-BM zpvU4{JjnxBd7aM$v{Zu2d@cd8uEXJ&2*mK-$y4oeWxQNZa5ZT*argEqU1vU0B@dA( zOJ_#~K&}fd$sVdfq4StlMCwL8d`jy*VjdbUtg4w1r8RA$W<@^O)RNZ<3v2yO+?hax zH+VdiX%r`s=L$u6)xnR==Gh%3+3X{EZ^kkWJkR0b1Ddf*?b9P9jzE6te+0XJd(7U0 zU4){rqcVV2@Z}BEJ4*xdHU#CYRz|I*m+U)9i|~);7U8I~b_BLk>}-w`?-aR&%%6rQ z7oNoNB68!N{#5`xM`rq5C~lBi?~Ezf7&7*;8V^{l zdIa`CCf(WcFQ@z9<-Ke<10!MCtbT0)uMysdPr+Hwjcs|G23Z*vbn zX=*N3*(*=Tukr?Kk~&q;nm1_V>r8b=G7OLVNp|YjP7@;)DP1Z?h69(xq=UBq9r%}Z zACU;f-U%vd)ToaLxh8^<%84c-7!!=#FU-+JLD$yxopHHez>wek3;*$W`Ini|zq5y> zZ00{90j%sl5Dil^SBsSne8I%mky?omWCUA#{7`+eQ@sW(xU1sJ!2R-;?3uD2EV@Zg ziveTFG{DM^czPYM)p>OG?flKSSi74f(eeB7;-!FFen7POUhI|ZMO5|`&3g7ei{bmBoJ$(fPm@or02YU?=zcmMzjqjQR>%?a6`_J!-5+`$J zP;CRp)8OB838B}Q?1kaEoGP35xx|=RKuoG~wuT_y;7bhPIj}Tz3S>)~ z8*Lqe90hm|epIoVvAyE}Z&fjXsQ@^@)LUB86|T}{*D{WE!#L8AAW@62MF26{1{fzE zK!T*e4j4>60K{mx&vbJom2{AFeW>RQQIp;usFDC;G?svU01i;rtXI!bmWJ$O^E(bO zvP?lji#39ptwtw~oC}XZseN)diDIj&T8gi69X)G!U!cb3T<5ws-g)$WSCUlC<`HfR%E=OTr_>T_ZMz4-{?YG4N`@@M z+I?gL2s;!A0ra6x;0Ht3Z>h*b<^||20;Y{3ZM~5ufY)ND@tMm+$tru{-zO3uAnUuE zBfqb70w)JXP;ptH{wdd3V2n4H=EHJAss$!BhRR2aHKZ036xL>^QhLyKlSC;Zs)DdJ zfv&>s0bRaGurGdnvhGfg*WEY~uH|kHuhF^#V;mrxUC%9kv6$c_N&LKA18=0J1?UX= zpSMBxbOwkKy}ycx?x$SZb`hTHkwp1;_MFZ!%i(!VT* zgx?@*?xOHuCr^NsHWhIgZ45PX3=S$G?&Uq}XMn_4rSG6|MSr$zfdSEkm++qja|9<1 zMfEvOC4}Zfj*IY4#3n;@OCLRa0PCQY>mD!A&jsn1?H~Tq4Lov{h5V0)#=i=Rax!!N z*TzJ3^gljDDn%OIpYl0$GaB++VfgyomxY}B3tRN1gZZg9Nj+5ZJ>n31voXYvEysEb z@0S_BPmTYZ%M9n^1_8Pma~LJ`SoDpkuep@-MLc`Xjkd?a#0ZK>^z{eNMdHz92UMRD zb?Lg#3YvcrGj9EYH zCl~?F46~V-5wfGEJffl7D}YO}UIzI&hw;?3pYpiPk=zuD)>t6_mesTr&|<07rJK#w zY9fB$u9CZ3kLM9WLpQ;ExUK`Ep?Jh`0c=;LQG87)0WFrb@XQFj|9P7cxK_Y+ zUKjn$g{Mau@5u|Vn#gt}K3NA@10}jH(tC^;-Gt~!u5~%Cv&utkr;73;zO({h#VZnx z!TPt6fpKr~w^u3x@&9w55kR2^nQaAU=1y}_)2-^@Kb1Hn| zQ-H^V;sz}yu>Af?$g~gx;0J})1g6Z6b}2tNouFLgq&OB_SDT4J)IbEW3V9`&-ucT zz;P37Js^L*1UJ}L;&!@;J(iiThK19**?{#N&d$~%LqQ=Xj!bHL{aluR8zU&>5)=G8OU_2;P=Z2 z;)A2*|NV|<|S5nHU)8Ma}FT906akvje`gbTqQ37q!%L zG!iy4urV~Emo~CCaWo}lWMlqs(TOIvO$IyC`7MnqIhE@=W-=HYuy;?WA6n3btZgiZ zpe|S}h!}93Pd0WI!Qhc%Fbl0?v&-&;H}^W8wg`4kn5WsgY(qW_!y_#G*#)DDdajB(sntRCYMSPRcyR88s3EHa(U3P-e?KoAhg` zvqk+vd-!R;95`TnDACjqiV7V=76BgB4a`JRs*)*a$+H*MUQd7;-Tf%M&B%j;Y`)G- z+(42hd`z1a0ENWC4TNkzAsZNp5-G?s>@0=kmnW17HH~5{EKIW_DU9{aABxA?k%-th z)Kb_{geCM?!GAIkit~_=xbQAXnABZT<23QZOm zws5G9ecc0n#kh;ek#W-sOy)#R$>_HihMmJ*$HbbY6*hJ%B5V&zt7-T(QVRCREmP&o? zZ8a1@4tkme;1f`{md>fg@X-S8&TEtdu_M3gzRapc2vQDd=WysXz(PyrVtEEG2r@pd z=!N;!ilrzCah@|#20Lp2svboIB8o_ZKVjLz8KO?zQ36?*G~#-I!4L(pXo0NiNOK2$ zGZ<2U`pBR)KLHWKv3;T;jey8?kN_b;vPc-%2BVCO!>Rx(%)W@|GD{fHg)rro)VBq# z%^`*0MmkFvFqKLIyb9Hz(YFl+MHNa_KU!RFv7V zm=wYQ2@&wmAspGs7*#>(G8xiZ0N*n}vhb4CPFddZ2aZ6@6Gvd+3QE91_yPWpBp!52 z36SuZYcgnf7JUhj`0ZK&EKNb;WYQXFxY@YCAp*cJnjf>7L~08&fk9@c3N9#FXW8!X zfb<=SNpjcn`Z8fa50@itN!_|<)i=Xx%Z-a@U{AMsw8v^xIo$!vUIw-krynK}nOv?} z7518=Rdis7?|5pcab3_gl2N#60FHUzY(37RwH6eTNC&( zLH$uNJNvKoZ0(nuTN`${X&bpI8~ROcEwB1k_J_mG^>hyho6E`0|7YL)N_?K|_Sww9 z-`d>V$kzV#I?l`gdiVC@VLrYcv3t|Ah1|`<;mp`7V>!Yt?UeUW+lK80UwL)vw+#co9os5%?J7s5sr!y~7z7_t6)v*s=#&+{t zcb}-NuL}Rjci>!Jsg-BVe`u``JeIu9WRadcvVqv@rHGrEDY^#Hri_ahBaz~+X! zRAm^~HK~MYf5#!(pxO=YoZde8)AKHs@-0efbmifu#a^X4!RO%$a!h$oT<*!qS+#8T zZ@gz@KioYFrwjCK+?o}fK6E&hyK55O){a{`TGCySm(zt!s`V4_-S9M}I8}BOh#U91I%f}V z8p*b~LwI9YMFSGDdPcIc)!O7cwR>n=_nZY2HNEvqMXOn27UsxnqPE3Pg~O*+na8Rl z0<&MhcE7wa{`aRC6ASadTf#9j{Pzcy`l$8(Z~FZm=wyttre6>ua2$YsKL^MKJ|syU zG88|)mhKYAT8$=YC>Aj?8b_#nR-(IF6kXj&mUW7IE1d#BJ!>NoX?!CWz46T?NJ>6P~k zwB5%g!a)|`a3XC=>=P?=snG5sX{DwKQ?05(St?OJMdZUqR;+!LR|h+?3FPeSJ^8tf z(9zHk=vX?!$M&2$iz~lxAxbB*F^_=!(4Tos7%v{B_W82z4EX@}3)juC@g>Z3J6a}< z-$8`Dmwi`Ik{`Ay>l}jL`t^N_&ab%FCi2JIhTEw*DIa`bpC}jHr4#-Ya&$1952!8)G z#K3N>la#Bco%aH!3g~3WPnx^PH*mWfHfEtY;A3q*BQW-d63NT!n%r9)9~0gASL`0P zISXAow3Xy1DM{ElhV_t4A3x<>4xXL>1rY|H_*VmyC0(r&kDWZm9VQc5-}6=p+^Rdu^*GlJuia7fewPU7_HTvX{t zp&{Q?nRw{0Q;EO!T%ycmZlkzuxI{%O+*IT5zYtZoOQ)G}jSPQMD%JPe)e3q-d$!K# zdG4Yq53O~RHM!pAklvOxM$+Sw8DAeg8C{+^8%vwl{1o@nrL>lNS`-TOquF@~PVoZ; zHxYFOjqeA`d`|D~j_e^7bD2F?kwW}z0qbai6`@;!6HiG6n7v#sb_Za=^pb-LM`P0z zI}|%JL`>$E;7d^hp$9{F9Y>@`qGRn+p!``u$cp1jlf3zu(e#;3(<-y zDs!~N(pAwQ9rJ?bopTc{A-+R#X}%}2^+Rxvl)|ng zf>5wU%_7_EYag!dCe5s=RxDVTx2X>=GxITkH&x|9`MmVoT&mn-pxEP<7DhhRgAI$C zBIak8t-X5Q%J=x9bp4vV@QNS2u1f7rzDEN%Hg) z+4?x^R}<=D28P;#ggrx`jfp~O7QGDuYWl17+0$Jy;#O7F;#)61G)_v8Ri}5WTXYo9 zmod#;&`Rpn@(%_FetL@!k?bqZ?gHlZaXt8_Y=9i^_lFxrm$nkE@6V!nGtm))-3jkFRWl6P6v`z{ONN5=u>k4 zIOfw2NUt|u^KOJbaCXlR6)02vHB6MB%67(c3X#{+YLB{is&{U$&6r=F+OhqiFwSdM zqo>vAGNAj7A0FZpoc%{tzL`vY#5`%gW+ZXa( z7OWo;8lM}1+aRme()fBFOwnYPMJZZcD}Sz*+%?0?$wM;Prsc+ipf4~_@Y+nwe1=_h zUz$WUe6>!#xL@d|c4wThGnL5YgQSm_ru2AHb_^kdbZh#12jq345H zL@xCe(C?{%)izbV=aS`P&lFO_@E-3B3j7f+){$Yv--F zNz!LKgYBF`{gneOYhwC$t)9piB%Q}Y2?U|`O-QJffuqgX(ks*CMR(dcJA4*BoC4OW zvpq;m6}XgR>Mh)Ok?5>=N6bJ;T;}YRiI)wIs`Qy5d0Z+zGKtHI_Ue=HoE+s%Aiq@1 zWl>nMYmZDL2Z*0{ECL_FY}r-h!gp*Mmans?h?^4lkOhLybs) zyFT*5vKVMX=XpZRp`vAY`Nep1cU_l6aDEWcGrFsT)Bo#f(wNk76oshP(IUu&> zI_FBMUwhBAlB_X5b9#~YbR`@4q87oVqK410VzAo2PSnGW>2>Y7;+9Wg!n=Xem`@T7 zmTtWv)Kf!P6w5;kQ8n$i#+n`k zh$>H)`E5umswz-m2TZNakqAH+tawFR2s|p~kD!;N?Me{jz z8^5kTsQW-P#55g2dt#z|D91smJ+j{BhEEga?t|v~vZxheL0cZ`G0^(Dt%5((rW5(ulcBdasamzI&=z{#D=h6g74ASHo@?@d8M4e{ncQrVILypUR&UJGR( z=+VX2fzXC!DP~V%+HkuazF##La2fsZ`+0=1lu}$YH%?F~0#$cnG<(uVSr4Y9u znN6Qef`IOH5U00}m#^+#9B$tDN@Du1x3(i;kb^RXz}MimAj&iAHf6|uA^0HZ1nXo4 zW&1b?DUJpZWDS*OH&eH;@MOL{dW2n*~51ZcY>A$B(J66Z*$=c&NbH;YQ3?ov&%i5q0*S5LUUMPH3))M z1~u-Z!;^I8N=`e}`}6p4D7%p)Mzi=NwBE|+VpF>r&HNB@L%}=&h6o69WC<+X$_j!F zjPoh&mhl_Hh3$d^U(Tg}ZRL&jQ?#Z=T)@xiGv}IBr|VTs6g)SA1v4Ww1%BX$QnPvT z?O`E8Ha68%5WwP`tUxMm{c`<`M|_)%UaD#Y%E@S~8O~#fq%p#L(8VFCQwx0wsXA0L z)QEbvhMgaG`>iHH{*lmtllG1w;_{R<41bI~>Of+L8`I__h-sQ@A`UFQgh zJqDLb9`y>gV<#)T^#>fd)>5(g7Fe306(daOvlibl?!8H?Yx%KOzGm)@C?9$WDWH!i zF-DEbZq|6q@jcsy*?n^`(Te>H_L1CtD2}KJ;rbSqEx0w{D{zzvb(-4abpl^%Hd;Vt ztdkJrH9=U$^}y<&sjWY(ZcpCLE}2N-jgxF2Amf`i#w65NE;4ag39F*6vjexr7l3n$ zIaur#F4pZjV7Y3b{mO7u6*>dzR+!odOp?tDO{x`juzg~b_~9@o6rgT$IntOeKPNG( z=pUZY!QN{v)hk+#w`ay$(cfw242#1h!G&|3X41hu=`CpkC7^KmZRNve`{{Y1*~!Qw zXyY%e>YqQqnn*X$ulJD@d~89tb*YD0r*&WPjtzC7JBS_@fL^17dQiX9&^g1A-hwbMbHBt@*Hre80ITxs#^KA ziY&hb25+5C3k>QdyowLKLO+=mr_7%)sHz>)i5AlmNz3?^;p~vt+?u-y*#lfHlZ8%g zoaTkrhEExl>(or6xiU{ltLZJC{2nQU-#lI-H}uA!*Dh?w-dFb(UUFDaqeMy_t2%X5 z?cBz*=HpjP%B`_q9SRF?y$QG6S8Qbj)e9!IC<(z~GrZ^JQo z&>Ak0mO(-x<1`g?Uaje^WT;n!^~tXA8cy_X0qNzQn|l=>22BV-bb0Ps&b;F)=n-TLT&1q!lTlW(z&b?>o<`o+H{26 z;gDP|cNFOAY%y$XL`1d5BTjn#b&xG%q0*Cn;VY+tm`mC;&`yEwQD6$5|^{X` zqoJ~2ncE|>2$wU|!elaYA&;1^OPB(3;`cN)g$c?UHn4C}c_+BdR1FboXIV6b1weBP zm_GPRLQ}yJ$I0ZThgWGb9aTl;RTp0PL`4jq=aBJIz>Hgpao!q*p0&a0ZAQ|$8dj>e zr9I^2*~Ob|IgIiN#bhv{O=&=x&(cA)l+PzH9_JhT3mtR_zh#CJc_Y{FSDHq#$n39S zN1JKEsF6-%%jWUz=yP?L@?^NU8i#d?A&pwMf(|B=qBs-tg zYcP!EwU3auB*;iBvI!>3oI1ibX$ZS}IPV#x)O>936v}E`g->kffOFSyj_+P-)ij^m z9piYr{je~$*8n1C1fg!66?uJM{0rEXdp7o;K1=>xUz(HYzxzx7a~nq%w+7Vz8~Wt` zq;j`S_SZI!4Bu_YpxsIy3o5QRf=tnqH2aQ6WqORd-$w;}+b7>y?&XA8hhOvo(c=CM zwX7f>vU&;fpb~+v>?>p!cjKmy22Q{x7D(5v$Sf8I)}G$I*X!5L{+@3o;4wqKi^wap z7pp61ChJMlH5zod9JL{0G`r)MKfCCbI*qi0LGuqxfO}lxOtjNi##y6ZXFzK{JxCB{ zSDmnXTFH5V2{p-qKVsR9kFIj1%PyPN*NJM_WPC>IW;j6nwoA|2D?iR(rCqLBk@zi{ za!w}(Ww-t65|mx$*rEY z!hCW3;f{$6j9ZbpSl2CF_$=j?^>}YqW^5{=#h0Sof#JzI?bzo7&XF*!j^y1UEb!!sf6KX&C`K zY6c`E!z(e7F^?WSBn(Lc<8Yxf4=kT8{Kq0fhPuz-nbFFnwxHa4; z>YX`Pa=y7M_o3-9P0Hp3PsS*@Swu|Be&{&FqW3iK6v!A^WuhSNT1m1!;?OkCnHuSu zrdo8^qs`HElqBJhPV@m0Gf&bJe|^PS`#l61PbkR8t_yKy5rvkG{8b z2`Gsrhwv&RW+2;VGqcF~5{v7qC?eU%9**NeGeDz!;mosKj`RIX;}->1!MUX4EbWc& zeBPfMxm8%hO6bl8wskFql9eJ+ZjuJtzp#?m2WhW-n;}zn@I-L+)KdPIVUtz=;+t94 zm@8Fwh)dGET!K?XqqBiSRCrBf-!;l^1Uo;bLOVtE!KXbo2EEuY9Y@$Q?}+yu(XoS!jeEODt=7j`)$pwY}$Zp^EN@{z^yBCW8HNfNkBB z2}w^=0tgq^vGZJxpWcjF2D6KfKkNcU%U-TF8PG{9?>UzMt7;-jXlAX!Eqh)RbL|Rg zXNMg*L~BTIF0HaO&KeJj*0V=bg=uTf1$)gVXXsX(WSdkQMVTL3kAJ)s=aqIrDz^$w z!doSq)Blm{&Ry3_KBirDju=i6%n`z3yyCf83R!3nb{buW#Hy~8*$Br6cdAXqR5bID zw{_ayMs0cz+F_(j;D(nIw2yPH>w2t_#VRYC-h@PU7RTCr@%{ZhPE}&QI&Q!v3*F;x zdWb}u45c=mQk}kezZM56;9K5`EcV@N>VXjSBXWcyP{HV+0!-Pl5=>ngGmdA;CRE*R z>X!H=Cqh_*S%t*GWphLhngaE_*6iYeOeyhk&8Bf?YYtkPrj$y^dK8KB_ zYBz6$I(Og;(qN8s1gxPo@amUkMrRnxym6=?ETG~oBeH4s*u&RPiN78png3FCqGCc% zX_d1ZB}i|<&pwVebunFSi-(zNF?E0D>-<>p6I=pPba{b3)Z*0~NSln$wjk4G+KBHV zI_0XP%+-rL;(98O-bC;t1ZYG7T4R88;HCx8sfYzFVcJXAQZ7;Eu~R5Ru5)s3FAl%D zwFOr24f|~APZ87<`wShDUaZ}soy2|!p>fg{ZL1E$`Y|CXlTcG9Tb8iGF#J6cI9#}a zrLd}S`qU5_fp$Ne+|BUy%VucyuPwqsE;O(1YfW{r?&g)MdO9=ykk*G#m6aq}{T8zp z!s_H~n&fOfEaY(=&HM=@DX|(qjy&z_ap3t<*CSG6G)DXMCbKD!)jnOIYNn0g`ZgtO zu2HPJF=Pq;%v^bs(w8bQFm$%pv}U_i-)^QIQjM=@a9ScscSXO^$SYhnWZgC|Hl**f z7`_f=5#|o-4qHN%XF=^gpOZ4XkcJ^rEs80OzYqGrv%}Cp?jCW-<3k^$OE2tzzezb+ z`wDQpvQ0*M*Wel<{R~J2UIb_1+PnlK3=+{>TP9@MVMAx+1DuKec^!`oIISE zH`fpS1cH;Gjm+G47(h5gFnX?W{Z%OQ23|vZdYBByp)8r-zX#-N5}chpN_gc(e+T8X zt5_xsb8XG57&duq^w5IbLHX=Oz6zVUH$Q@0nubxI=19d%y)`U_0}#7RFV+=`Y#3kS z-jYQNLMDnGH8-RtMlB!T)XtSphiJGaZC+%_OxDXOkIgCGPigwwU!b(PD8Upj9_!9K z4+*I%sdbGFFOHzVC)rDs>kt4G8JzWx`u24bz2`kf5_Gqt^3qGpnP1*mebNwF6Z>N# z1d|EJsT|pc)<2^R`w}=VTNKO#tMOLh-v(>B<+NS>V9jqk8e`3FX2C9QpgScoOs`AQ zLw({=C`V*@>UtDGr+OG%4!Gx|z?~d6MYc2c(O7f-R7lzsn?{{BN46s7)P~ioAXB+Y z?VK+~ceB!r8vFfiX^oq7U1w>_*^pO_I4yN431YqnXayG}$_pliPM5uE#7-GAvC_Si z@4l6_!nRNk9YP+okf-?S`?0#v*PERP zJYSgo_wPY~OfF5O=yRJ3S|+PZgmWI#Mcll*KnFo(5O7GODH{1T1sn@n{EnTD$b_rc zmyz&E95%DjvM@rDX&aP9NA)v=_ocpPrj35-E_mBWW^PZ zT*1%jd{MT6z1ZTy{DpYY{K>;hV=Ks+s<0$-ox%ot4C~NHKahjYY9}p@y5X5Np0Yn( zu>B71r}oUI7834CptqxdPTQfsAj}+9Xw|27%7}+g+~FW+GnX5K=Tm1h-k^0=#z7hM zTg;-(4TZ^se8M&cr>VLAcl{a8V&;*-LdwGE^Ip^U5kt6Fe!qzKRm&?56vnynD#lCJ zMPF*2#|h!nL3umObAm7Y_%@hk`Ym&U2R|Vm`QcmR9~WkPnay6B+0t-foc`ihOozF_ zKAn8!ct!ARl09kS-DfI*;)7X8OPtA{ar9%ut#_wiP6wEo7rW-4POpDgm1bmQW%;k% zpxPur@delQKy?SALZ*m9)^nZvNj;}Irwg5Tp#3-4$?G*HZ-4fDVx|29yQ#nKatd}R z8o$EJBM)141Umq3O|bcz5(gFG{`0^Z+T+uJy7m!hsq}W@w#3n{+L3Tq)e}b*OvyJXk*3BP*y#gs zgG9Qv`h%#atkP6tF0f>DS00^iwO(}La@eNrCM(CnZrW(!92vn&x-0zQZ?6FB2*B4rjjDOO?1jJi@Dc>?vg{$gUM6@Q`LQXV8HvzwNm$ z6I6cxaSvW&80sC=q*q?^e&+$<8ls&EJu6e&6m}T=A+A&AYy$a*lrNS&SyG7R+#Psl zFELq|TjmwPqkCx7xVChk2HRU~$n~;zJ(+kuJbb>v2URgC;JHsY@1-dIMuP883YJwo zNBj`C8KYaBk6RLE90F6j0-LuB74KLd8F#)*&YpV`r{I6kAJUQ(X4LJEb%9jLTQ(>0 zqhVKnG|my304}Rp6U<7KTCei9GR|6X*FDyXHe9-8;28z|D9XVI0v4HF_as6o1xCy> zjV*`Nkg(=jR?0~>LFNZg242cd)&bjI+aGfsjHHi zLh8&vwKcg`rj0~??oo1xYv@;M!V+5S9K|YIpf(tJV~r4~bQ;PjkBZ3MU1)#d8bY$v z{2?5=v$zR2CuAmzy|9a8R8q1jirrCclgg z5lNVytWwwK-a{>8D5g^=roAZs?Q%z2u!$otUq$5>k2DGhi+ZMD``0>I- zq4SHmQ37w!h2+qnp~lV|L7K${6IIEeoes$*N)#`~I=b=^7@QNqE zrZXkjWGK2r9;~-B$e2_yZ-fNjZh~SjGM?WCYkw>CR?O{L$omTOB0c}{-i2lL5NZ~e zp4@$$F;xr9EP%7?t<}4NpRX!Zw0FBBP@I;mi|9P0e zF=1iv1c;WdeEGPBhF*1eql>uKqq@NjEAJNVZP3%#G*k8XDep?u>OLSZB+X_a=DX$# z?<(&B*!;zK1`xwHpEJM%*`jb0ayk`g!_*qWk~?HTV|eFjsBQ2eiVTT}6(k=!qDQ)r z2h;&JOTn6$xe1#}i(Ph`F>(;; z_)@u5n8R;FVR*%hPDkF|Q$@-*H6#VEDW8kQ%Sh5#pCnF7uwJVaPw_hIDuZ%$`zjc0jb+W6nu44w(U;2^kQb89g+ zQPfeQRx>$gFgvR=upNG*ZNc|ML5SpW5ISoU>rMe9%@xx*3zmIdIE6N%V-?;SSME~= zJ)n+#Rt9+mMWb_x*>Pu%WP{Pthk-{WJEUuNc^W`_Xspqbfz|eCnYB3QkeCmgcS^V@ zJMRZO%ilC}OVr(I5H&SSeT~pP+b!Q$7R{ni4Q1gQsMvj z<5ZyhaxzV-^iwqO3HO-dVJ|!IIRImvah+Ui_&X^p_5r1`4V8x=2GiGCi*RpY*3px7 z@Z^Guh^(;E{pq3!{9h7Q5N~xZg1Pg%({A$kiJzj)rlq!DSshwVpkQzei2@Me{H5ZvQr%~29 zT9RppmiRs|HBv}bk{iQ#pQ)^1ah^P<)MiVhnJGT+X`TXt8njyE1MP_ZqpNkr!|{7K z8=pr+s|~n+ykF-0S4DJ2#=qA+CZqP){(Ni`33~#C;6pQoy=yYH7C}s(kfz`0&w6?y zyEo9N%?vF*$y@no3^I&D~Hfd_XPiCn%N0Q=2j-`wZjU8|sBHQQaHA~2SR!p`ohMF=%tMhc zOC#+(^ezG#6ZaAmnmaufZoL^spKBeh^lk-A%L~s~>+t_S#@?~H(yme4jXJh%c5K`3 z*tYGCZQFLzv2EM7ZSVB6Hr{8|UAyk8`3L5Q>#Q-xi6en|)!hOwX4}NW?>P7Xb0WB@ z<}DhDR3LfMLwDWFy|B%Lg3VfOF)^SQ8*_j&}X zH_f6<79_i-H&^MDL@@Ha&QJBsI0fL8eu8oyiZP<&bEezkS0zt!id|HGTyZRY0;bis zc|x3IFFd0p5D{$pYsQc{Q|#Mt>N^o=_sq=XY_qhu=gc~Sd{K!sa=WwzX&qxLJAV)a zr6ur~ckVV1J+8tK$+PbVlJoIuL61jPX{`Dtlu=|gG`C4pBxzHXMhStGnpUAQ3FSRV zeP;Y6e1Oc1>Q!HEe?y^WL&Pq9uS6o)geIKs_~%PIC;f=$dGi4;5cXpF!O37J(;dNI zEBL`<98mOTuwRG5q1b!e<}sGHqPuWrZEersW6=pBlF8QFZvwDCo^e5io2ZI4Nqc;mF_c`feAL(*@y zzH@f26znvK z1Ydi#7Uw5_C8;Cw5!9x~yZPVJ_n;hn|D^;S5-E)@uThtCwF2qUp*z$A4IBbzWR0fv z;SQiPwgW6!wdVNSeCHeVtTytkd}o#mz3t`;ubV5b0PQ-Bh3(26(+saWS(4(jDe`a> zp5ITbW$S$W|8P!Y{+H!>dY1nlC|8|`A|`|GJfd**CDa85EmaB@6E9d-KG8_%bDWZ* zS?SBVeXV&ZE&6mXi=QxUP@7070m9;mxR|PcEvR64H$egX!gBf;*5SRo8!G$Qsp$NI zP@1LS`*oy(Qc(oI0PmwwJvr5t8PTH~0c`zZH-qlVOxpeY_JX!pB(qimn9;bXEUYX1 zHQrl9zE}9W&k38$H8zBmVko-9-h*P+VT3FC097rF1jqu>?yXl|wu0npiIB*EytdkC zeWlFe`@@-Hs2z3ag4A8H7OR~=fmI!aI;2V;m09AnWXWOCP@jx_uuRRLXlnFDdT+-= z^gKN>WoeJ*=2CjE4+Nz7;hzC4&wcw4+AtUPP@e@gOOzC+wgw54TOnX~*Pnao$O0xS zw`gzVxqP2wOVO4|CA^~L%~dWdp+NYM99EJKXa0w@W~?k4vIPuDirc$PXCWAou+zal zNrDPkBseB5U(n`JP9!rYgb2Qgn8jf)hWAfIy28zraoc*4*|64|?(lXGiF6Fx=xH7; zt5uEPb4+;>0{#oPM%!AOB*N>2;Pm%#>Y)%WFnx7LYPwq^4?ia~e^`RK+9FmCk@U zlsK_s5CWuuu^&n`(=|6w+7iQ-G(#Q#hAhSPCz%utE$6b&$^2|T`VMg}j|kVtnxkDh z@I@z)TQ$L8Dz$}*iDdchAlLoL;$Q(gKw_N6k<^a1i1U@2lLQ+8h8bP)%9W7MGW0xzGlAh@brj_q;-H8hA#)9IEjCi zxEUIFN2^C^W@kb_6vjeS@M_8YOnm2 z>U3ja6`3#C3H3j#jB>D+5Si2B?vC1Er>)Kz9Qtv@oX&19OGrqU`-$JZPa&0K>yY}WS7 zd(~6aikv$JGS4qKQV+51xlJ`MPn`gDqHN7#DIU60G)r;f%J&MD*}9uFU8PtqGeLAx z$;p*eMyuo@1c{feKuL#41V!Ia1x+#m?h;59(RF88r7zjM$*MG_ZEjgFuUXYn?u^#M zTN!TIyz`AUgJ0H!J)mV_f$MXCw+Ufk?Kp^We!r4sT+*3C-xu1w8qn9H@HTxa8+h-1 zeVs9{ope*NHIq{S-CcmQoxEu*ZA!EvtUNs{rQgL2SzUHHEYPfHSFgg&TB$&dAG7T4mTk^lBr)DFaFBA= z8C|%SYhLponr;%GNtVT}hci3HX7AaU$-IMX)+G#YSCM3uPbuT!fgKsPLIWSF`N<}W ze&i*Pb3aLh64t0lD0ISG@pqpTzbVH37(9T+>wLr7gkd`SM_v0r>UjS@ zjXQew|B8=YsEt(-k-={qQ9c7Al>k8!m!rkTiLFHLY9$Oj>`ju^r6_svDox*Gtu58$ zi!r9v*b1Ux!zvBf={zWXqgt|+K;E}X=Fq%e6M3^$E@Z(T_GrIREr5O;?d7`6fhEp> z%@5zG76Th-Py=k+F+8+LUl#))M{is&1DiBgtOnqD1pO=U^W!N?%P>aVF~*G6Z%Yu> zuHOE=hRiy8z}-6asK(Nc$|t4^?2&ZpBCx{}!$r{&dkQ4^1w9>hZ#Vs@If34->SJeq z4a)Bh8BjNukT_R25FzQYHrp~C66$P2#j9j8DapZ*SL3kcuJXmMmUR;Y*Z0Ycj-+l8<)?sJ;I1(fU)S6UHkYv4SmJ{oW1L~} zE+?HZdxAGlN%dcKdx`=5jvLLC(~e?PcQhC*>72SeloH2elm42ehfi0Vozas9Ns-^W z=pKq7cII1;yFP5z!2LCdBfK*AHmqZ<&{Q`Pk{IxmLgfa`mjeiFqStk7bdO3(9HluG z1u(M3xEKG?hO8$6aKuWyDIOMuRsv7bc0O*QKP}8uG>v^=6i9 z7Mu-s0W`UM)kb=*p_Jld2G}%X0aV7d?Du1HG_AMc&Ba5ixnpR56xX3`d5=pzsYw`A z&ESD+kW$n$n`8slVEM^bSKEY*%a!R8$~8{iq>zkEvXbBVotYHwQ0vHr4m3un8jU7bm2K_@6<8 z_@tOtDA`HL`fl9jVaZZijC5=j(`~;3e_2XR&)n^C(^KSa$L^45$i#br+}rivZ#1f% zRy~MOtUn|ju@^#VMHOtI(MYu}-d0olPb@+%tR(+58&*N07ARNlrh{wv4VZyFn)wNX z^M$Xf@{;5@H$Ze-g8G40L!h#N?*R57Hdqa#h)AcK2M!=H?L!i~P9%Opuf$FHD5dBb zv2y!&o+VlG-=-a?8ljJ=`_X!LC47uJP`ja2pMM?5lUMbk1)k9ZpW6Ap<5lQzt*6xe6CdWogA{F=aZOjH}Hp5Nf zOUL{e^!_QG5zy}YwZ@rnv_J2{ehV`eyXRLLguR2jjhBn7+YC;s6*-m?(RjPINwWKv zMuvF$7nI@Dhbq z+PqalRepaA-nuN-l3szxRw2?by9m>lKhm%bt^}cz)R$!e+`0^*`a&Qg0i~%QoQqV1 zOEAnOJa+%mpV1Tn>s_*b_PZzD&u(QN`$3of369>U)!2;JSg2&JzPA#S-S^UPx-iyTpiAc z$oxp>m}#+Mq2KqsY?+gG2at?M@r=1vc6ug}C_OZyx;u1?sVRP%P9XU^umfHhd6P`gQH5uki;(3;Be-xXJm91&UV z@&!!P&=TM#DU!CyDLS!)vy_{PbLX*g zk25c8H<29J9qrt2C&!R3M0@3?V2W&DEnhQ6|Rel~kHj28ewQ9}~A z)ZFUGSQlb%TNED(uOG=Q)H*3c(1V*G zPP2zx6YEJo=Yq8*eVcAJpegq&IGA;t!c=k^Nbf%iw11Ib7SX40kz*JmnDICE72FM` zouEtRK2$53lwCT@dgD3fmP#~Eo-QIy-VV}7ke#EtlxG3YDRPeeYNoW=jAfNfY>I$# zJ4)`7`g-W@8`e|`VrTx*!b8N(+$=d-GE%7kl2+Vttw~gJv-VkF-d}81lHj95l(45u ze3(cHa^BsZi-b(rIlV+=M#fQ2H?Pc;kJ6(dvX1hTqc5p(-GMr~FLJez>$eiFG@>x9 zw4k17Q1{?b12nbfPI6lzP$+u#Y?Csj=F=nI^Vi32*X<-#!{Ap&1b~(ZdaohszBVj` zg=6X}AfK&!IC7*9XxgmI51&`QDkT8bCJz)ot<^GsUyiO4I)y;Tpt|YMaf9;!p5|Ks ziAbpu?V1#TitEERNdRVQKx_quSQ-%9v?Ktxp)hFccy`}bS_f3dmPoJs4@&~pji7ZC zq#SVjDC0p31sej^ydJ}~4N;FQZ7Z=e-)AH3)R5{c39@3WX^ex(miDw((5^Bf35T3r zd>Fn2ph>?4#PcD{V?;+0n5iN5AeB}>5NebpQ1w(MZH?6Nulw)A=NU|BOk+DVOA>wcxXL*;w= z5SDU=E`qP}n$GSo$_nvT)4N~gF3IYIZ5?zgz;qsJPvFcvCq`o)sHO!oSp$~a`EEHG zhi+LpgLR#moADj+yo=B$u((hBS-KOjin80hTO?|7-z-}2vCv^yzYVQ}_Gh=af$QO|k#W4ch-W5ZY4rNd^oGAQ=AaTpu+Ke;o*hQNa;* z*KY^nbE?m#cLKPH5$T)siAe-*;EJfPl6s@swPVNo16(3jMv*w$JK;vPG&#Wtj~02T z41UxD*&3FC2P(PxtUocxkj%Bp;`-N7>CDgSDl`b$e2{K)^KtWC2{2db>Q~fN%}Py; zrHi9Z4X+N-oja%K&aG81#Gi;8YA5)p6VY3@|>l` zWhcy8vs!HdRk;#7^=_-vR9fc*8j5O)2Yto`{RW=KvUU&)*>H#9f0>{Lh-$Z{r2oN! zn)pLl3UEk&Sb4E#oBIV2^d~Zk`MFN9AUyH~&pf=1_!BJ5lLWqEgb?Qe!fz_8n!IEc) zv9xFt9v;tDV9ukcI60{dn#(tP-i0bB_Obx_2A(erumsci3^4Q2T)MN2kTutr4~;8Q z{O)gWbID}G;|8P>)?}-ehMBx8!UQt#{D$#>UT)qgC5=W$FDN3jm(vZnQU(WmVO zQt&fC+SjcsU(hT9Svx9a{8f_C8xmD`_*T6NDP+Pge~w$p*M!Hde$;2`o!zSIy#oR$ z)D2bXQ#R)4K?(osJ-bl@P`eSR-TcR}Csn=m4+M$3-8db#8tIM&M0~LD`ABHh2c?w* z&uQT!gF5~Px%ABi(0yq=k5JQ#x>4s+W>DKQ;h70!;Pa)_r9WH7Q{7%#g>GF~x;hym zURaNISdRx8A_-QAtg}@skFfL6uH2`Lhw1k%xDU+Bn~|>tGpE~M&Ualp9KS_hZO~3k zJ{g-nP3gs~f0;$*BAc1SS4=1z(R9>khLVj^ojf?veh?S>T{)cCJc5DAm)X{L$!h)S zvURT|+?_4dnMcuMCE_M+Q5gF2yLS;8uk3~(SF+z}WVk`C4HnxK$Gltzs#T+P`)rk$t=HtJ=gnoM%aZTYPjj{a4p>rS}d+$f9I{3_^obs`tedbGZf{ z^ZE5jus2{2fMDG}X%zjx<9IQ!{_jg_lmRpR#vRJ1uf?d6mxLTD5g=k4!U_RureiQn zUCP2ckCNAhOB`+*s7MKCYmJssa`c&9RXz`8zRy<#BdpEyFxDdOs#|8_Q zA>Ji7dNH7R=R!MaG0Ymej#mvM;j#$ooJjK=>po7{0>*a<5u#KE%lI1jF;CX9NaOjD> zr$S^OZ4~+`0I;hQ-l2U~8{qh6h|7uUk!Lz2^URr8<&F=lSSa}cMI(Y|2Q8Gbrt_S8 z!23B`8u@fhr~Lp_^Fq^8((T84P$BjzeN=Ay>38|<2k2*asBZ^4(b(q~=b-ynnE_`? zY6&t9)sQk_(N9V1q>tKI#=qwU9gPGXD@#E*8i7r2I)!W&0BV`v8S6VE!xY3z);5VK z^rYlE(1!Li<9}J^laf`D9vMCsm$n`K(ON=?Z$CT*{x~0lKsr#+7W7f(oEsp6vhG*e zP{)a_NMKd0TdfiYWESpX7}*J8C#}&b7&;%Jkp+DL*yug50@m1m;B?m0FPP2JI6gOB$D|-+KGpG4s>f{6Y^^XBX8CoHpLUJqK%de%5G#@WAyjm{ z$V5gyGrlq_R<^UqE1j}D;t-&w0ax^7#7BmKh1o_zYZK)@yn>kU)B!?pc%(dWfQqr| zm%uWn1No6c{UEy#hX%R{rF>v9Y3pqI%U}=;d#yg0;TZVQP~qEiJ`<2~7TYcO>JEZf zc&~K5DDmy^S!lpaznQt(AB=oyLcl-uU^c6F@MhQ8TO$=#uC0=o6++0{T^IV>X9AB8 zLIU!0-l<}a8#Y;Dt}f|f*BU&}-LMn1y0CI#pl{7P`ZH~hr{v|BeNw$e-3td=HUK_n z$n6NRrr>OR7okPq^;KBl$Vvvxw6#6N<{V?7Z7N6*`w#h&;rAPdlL0_d%Vfy%wm)-I zOh7Mr+RJimUL%MmgBaWGhq#k=+Ks?3_L;RV=}Cg+JN&^Hz{T}Ci^yXURJyx*`HEbC zcNGxB7dFZ~>_2=od4H0nh`4rg4_|T_;1BdXp@Wa3izQtw@HQz!8`cOI!GmG~12&}@ z4DyA2#`*G@;A62=U<{9jjPvC%#xQ)60~2_ift%eC`kU^x2bKM426q+3t#!%0nYxZy zxk6?v3d#szZwHm_E-m|#kCjOKLpz4SwkLvla694q{|C?bpVf}r=`%hTz zJM!-Z_&>EC)Q8Gr0wl5yM>vnuvt;B#jEU^Ig2}vP(6&KWV)=Km*m)CSPdR0bR}&?W zSDX1g6Zf}N9&gJmUd?X-%^l?c13$g3@LQlKW(LVAR!KgyAv2&u-}A}3w;MrsWg+c; zc^acFz~TIMUHLNcm4xwyy-Dh4WjM zA3R_RPmN+)byz`Ti?jFQsqsEq)T4L$eB{n;==#XfUGwNxXmoDWG-{MyE-J-XSGuWc zY%8S)2E|nN*SGEcnxR?DA?Z&-di#@3-7X1bV<5hSNBa$KrWbukmdGIhVOB+ABCh74 zl#)3zJj&%=s6LHH4!xSqV4A5-iR56n9D(&bp7Q^(hc3<`SYWc>{M}I1{&fiRcF#3b z&2`5#K*5D3WCy@?Y)Po3&iu+`;Xuq5tr-amOtB@|&-tY#GY#frj_RNak^_qa#>X^s zVyK?J?V8Me^p0cFj7!>#Wzs@E-ZB`#DJh55jddXaL4U#uY;_|>0Aw&%s)W+vN5M~; zoNpiwsc(zj|MnEICq-zZ)h&#F_6tp{yr1Iutx{TBG=w^C0o4FJ8j;0?_k3(Zll6jd zefET-7@5RadjD>lnAeJWrwU~nc9trG_=npd32sfX+mhBP)xP-V*kl-06GwX^`|qj? z1XRrUA7+SE1t3=);K&_(Hvq@WjE zN53EY;YSG)U?wJrz=GK++|zKT`|S_Cq*;(M9(`Q&7$>~zOCldKzpVC`z2yqLP62FU zFhnG+4i*f9yrfdmZQ@g#i5blVjp=AZ0AVsW1F_E!kU4IBj-}A%IBpTEdybh~M@*21 z3*~kYVWWdjLHqQYHph)_t9l0EN8?Isu~OO;*yjTU@7D(oHP#EqW!4K#W!rPdt(wP1 z1rBfnD^M?M>jwSWLO#>lz(;F5(;wz&To9HmF6E_V@4k}S#9Y3%X>7J>qA16^y)PgS zJ4xPqR62Lgl5ZX#pqv2q$fr({tHH>5(@rv+H>PJUfXz5K{57K-K|Pf^cT1#mI;Jip zAGWZj0c)PRU^cG1Ow~niZT&xeK&g=Hb+Lv)1aeIML5HViovc=rPRrQ>Skfd zzquG;WX10ew6BUWwu#AY;G5urE-B1@d1iw?h6=)%RKzjyr7-9RAZ0iKtJlNb%b*x& zB>nE~HnvME24xJ!uko{nASaiG;Y@W+oUg2sB1jo=Q1O&tg!pf)TNqt zp(K5XsWgJ?yTn3mRmslm@QCr;VeR6({ZX6PST~HZHqF5{08|H0M8+ewcQYE=lse0w zNi@`!Jm6LhOgcnoD}VcqC&2m?`tSVreXfy*ePGKvBCSx+wm;GLvFYZCbh1=AD^+FB zz zG9>uOa^Lo<=J`{6S458{Ekh%-fnT&2^_}oc zy3Z)LQxKVUMw0q~d8-b|Gd*!QcD;z4XeBUzHkx{J7XNBA6j`nGm#dkBYb9s5kil~9 zK8yS$u&NFb8DGY+fs=5h56ZzrCqFNa`Q(5gR5LUDLtHzvtQ8;B3K4%OQ&?r)m4e8YRJrSJEiOb} zjNtyDt?q5PHbXS@cS*@?X-J?9M)aFXY+_G%u$AP5ue&gBvTArO_EOIFUi+WIyLoUU zCx-TTIXNQ%Ytte+6J_fgoJs+SQfdjaRJq5 z-TS)2gDOFL)g3=L5}L|H0;e}~QOuSfL^cL@e3v@&&s|n1!Njdl2zvng>Shf{D(vA7 zKP64g!^c83R4k}vU!7-mkesZgplC=A$EaZJ+uoX_lcakWKw*nfXnp4BPU4;V5-rP( zc{Z9-nGr88*G7sxUG1OqjncxrCV3z4?ZsBxNEQ&d=i&~jmDf6nMLLuLV4||RRNxgp+8>(Q@`|reI~&i` z>o%R12uBH$CqjAex{1=ZxoW~o)y&7dl(KG7i&hC(JAOcH)o z=1xS(-bS8&^fc34yWLu5$bpNU00xqCXdvfZnygB^Q3!3@_8avzlH@3pgS6qdh|keX zFETV?zA}Z0RJZyW%yS}I{NRu*8lEVjC>y*;XA(F;lDF?12A-s;B*i%Yxu1{*j3{a z|L)wqe=6F=E}s^WxK-eHqc=`dJ6~YwD4dqpj$UUg0X}b)e4u?kVtIdRYkIGgWqS*M z@49a&o^<~Qr=CB6&RKMq%LSskX{CTl><8%m)S}TG0B^r{5kTQdl zvW#rJo_O_VOA0pQS3e`l&CumbE9JbyDAf?dKoxqx@2gZ!w$4tvWa=pjWK4bWYx%4m z2eo1esK`&%&N1dYy2vfG6}7kAC0Nzo?f7PIvuw1sS(51I_!EWD-q|}g^eLqi@7 zLngPeXOJBzZkzD4GiM^@&Oq&Dl#Vzw=mwA^49k^pW{+U~4f%L~Nf^QgGt*vkjgc~7;1g~d@9=Lzg&^sh zE3`RIU56z0Efj`h>XEpUPNNIjZ3c`85_86$ba>R7$nW#KC|+&?soHEtI-`5}5&_D( zMK`u??6Dbz19>`_f4B;fGUI36E;;Gp;t!%s;uk0bNp39`ru+eA9KtZ&ifs!Y%F`c0 z$49w7&MI)ykejWatqT`b#_7{8+9$Hs!%clXX0-0}qzWz5iO1m1{R%vnJ|<{xEMCk$ z=t0Q4wR{n_!hX#HBa9lXT>_WBUyG3}dE0ZOHp;PCOiAWfroF+n_)BkJ^hd>njm0}g zD1z^Tm-d^Ahy~IMHPL(1$|HQu+%~}M!bAc%pxSEqM8s4?g)VlJzw6j8H8cg6($)u3xQ_Gxnj*e){&EDr#p=efV4RX zq}e(%o4{9pRlQtA^h%hN%a?eCl>iBgx!dz`JwSjoL|Za+67!z32VA@b>$wXjnX4$9 z2VfWsAU5r2Ng8Z=Q&EtEHgZZLhSNH)pVJN-H&N*KM+x!lbxD68fY0@QX!~6|8Gs!q zx~$&S_gDjPjA`I_oH5E0KuG&m{~KUP^Jr)*Bp-Iyt5dbXU0)pfEC&z)Fx+~{6+aH_ zi!tg)yDf|zn`{RB=_H}6jcm$;H6phXI?5)3XLD0lTs==>9JE|ow~in_fhJ*$?S)~% zFK7fYQ!=8!OIQ%URY7%O{689^_&k%W?{plP>>f_E0OCQ`p!h;3G#=JJ@MS#UYy|M@ zwycbMfJK-!PvS-U7?1DAq{}+G+7hl`ifzC-s(AiU{{CG#<9iPDzvS<`B)k7NudH$m zr-~xp0S*p*uTB^aR2#dAF8rswag)ZTTbzzDr_70fazC zk``X5g?!tSyO!BwT#Ab^`>o(dnq-yM#%dStx@9 z8VY=p5%1?|axIGG=Z)bf|M*P-jr5%V7|F|GNUF5+DN$nfs`jG zg}kOZI(m6mS8^g#Croo;LW)x%8F)&Nu#~W1H}(vgqo3Q!*BF2rrqt;KMPanXfa;;&JV|7RP#+-)0dDiVEO2gr!jYeZI|@ZHtsAoxzg8HoJc2K+&djVP zjni-%-#*_oJ=aRKP4i@}Qu6XAi5o7GjnRoZo-P#Z)vRcr-2L=)KMoG*xV{-U+QOof zoW`Qc)b56z0AH{B&{ZbcJ8K%*C1uo?Nx;{AM7JM7>V#0#0bl`hxH(I(o*5W1y9R1b zmQaDwZYBZX@9U)?5ct&&f?R7W7zlFRm}|kHfE7S=BM3BDQ%Mil;|yZ>!|h0VehHoy z$FCIpBEo_*gWdqx+cQgiDH<(k5cm!cFk3$ltaTIKfM2AEGyYa5)Q)Ig=@bt#ubTAL zvczQ(&MM|tWzDk*PNo?4<}Jya04}_czL)?LEL436jSEpf)7ayf!|;NGpm2O-sa0uP z!>KJhIFl#i*RVBRQN~W^E^Kj!5v}{!t$Nv4_UC|j%GERuloDI;CNrJPxE-yd&|<87 z-tJoCJ<=Krg7$dSb5 z5$nbX`Zn^}gdZy3$7KJHM1EH~_LgfhZ=juv2K4C-mXpLzh=k>{QU1q2P6xle8h`ob z7XMt*se6+JyW68Rt(}0jgjMO=6p=9=!hh0*P3FzY5On@V!r9B&!&XhwpMP<^lYVoH zFUDbq-LKLKL-dit@1Q*V;gm_c~X)&04%F&OiZQSO9d>4VkvWaK5Ev5-uE}e>IFqb^x)L_peHRbB?nK-aEz+2M_BA(5MEu z>firkA+H9=ZHt=Ff71?3QXSyD(K)@kfMrV9W^wb@^W7s0)O3Em2@*COyWeTI9DPiV zNqv7T!N?TXzID=o#80aQQ>@>OHW38oE%N^~+G?}x{c2viQ2|IFn~K0-uL%QZ7+8n} z4Kp9SfGM*sbxn%Q1-^ac5aqNy(kwx&QIO5UZfVZLSxHm&Jvw9QveiBo2v^qOF=1iZ z(*%WJFDYTQ=sI|+0wz003rzOabp1xE+Y*7dgi2y@*43pJ6sYWSgA>n-RM2kE6Ivg4 zaBXWn@}6}+@2q)o{`&5+{f?2fFRZ0R z%fdUpFE>-AWmT)0JuTrFAbq8-)GsmzK1 zE~k*q$N|{9zz*pbs276eqh6rSa8rzI_&ecpz}P(y#XIZTt^RPV?T^r$njwujNhaX< z0OMnNv_Gr4cZo+wVUk-7nOKYR$5mHC)J6D)Xk!vTAS337LDzp`p24Qz$%kU&%7t?M z3VoOO$kU7#yOmYBG+ z`CjfhuN9I*3AiKP^p91ZkPPBaHb!u9fW=62ob@F0UNCYqKO!})0K>HDD`RjiKGw4R zbXj*rpF#T7M@72w2VO@XMk!C&H|b|$ufo;Inh3hO>GbL(BDtEx7!{z3D$w?ZFL3W_ z6&Jl8r{uLVk2p&m$kFA^wjfu!s$bUg0XrzqV@l?G5d97Op9jQvPLa~zZ0}*QYY4WT zcz;uaK$E`C5dU-xWc+t)#Psa{tD`#-^=+Vh--7Rf3&jeQb9My36EfER#lZEX%C z*oO&QQ~9VG2W9qG@z98lXo@6qyF|jb;>tP+N}%4#!o6K`#Z%9(7*lxRkHHYS3AJS#oM&i*z9b@fX&mk^qB&JBlI8dntArS!?4TRnRN`Z|>-bzP@(ZkOTu)IsQ zgp`8d8gvH3*K^I<@EQI6|8s&4}J8rpSfYg^R62iM;S9~W*PFpaV*E$$zZI&EX@ zyYY;?u$PWIe*?YgrL=YP4TbSP`Wvjh9!x%HNm?ykQqC5#$Sz?TE>z_bAyd;=UUD(l z*D?PQS~w{4Qjf%3A(8QKs0p};_V|8IOv!(RqR0~@WL67bKFZ;toRskp`f53oeJFob zj30p8iAs$n>L2#CL`;w z5baLJ&brhZvR0=E@Oz+5-YVs<4Ht(6u7)V)${T2)to0{EJhu1GpUHbF|FN4NEI`wX zN2X0F2nm4UD#3ZqaZE(RNnURFxTo7F@IrRJkn*B_YJ=PTT>9}v>H2X!W&h^wpPXuA zZ!eP;yMUBl!LCM;NpNC$Jlnu8&cLV<5<8Q6XTiRr(Kaw*I}J)EXau6x2}YKUOkCtUE_oqpkvU;E%NjP-2duRiV<{pN|E|R%jVw_RQ zQK)R!hw3@7Yl(wqjfSzp+Vfz1>6m}3P+r9>qAqno`napKl;SilmSIbmW>ZTw?&fE7 z2H8vbaPdMFj%ib?Q>eyKHA4kU6J)Hos904X#&}-H6n=;3p{)yP4Lx{f@}qnRLZ3}w zyhDfv3j_E#3*`=9I}N` zyUq4wrIi&^h(c^N-RDhf72gcTzAzv=j{n?#6UD;f{*OIK`0D?J zr60bx;)Yy#To!#<#eDD)j70?H_UDMQO(smfw+XyAg<`%Yxjf^Fw~XHFnm_GXc)x;3 z*T%aK-}RT*hDWf`_c6y`UYBOr4UfS0fBMHcT<>D{om}1F)pA5Bb2&KiqcqH-5wTF@+ za=KPs@pZIvI7UvEMs_acevVcx-BkH7drqc3a?vcR(%dnpiPlUpzZorle?HuYEzz}; zDtH@Ph{+{qyQ}Wa^ABN^gU$hCNXN&;L7xqmwc||Pzrh|>U5<~BY3M7n@as*W%2A1%&6wy9xQpVupF4aVCo;Vtz#z01Zh;mURWNgU*>+71i%^enxwOZVdMl# zWj51&FV6r9{4~jwfk$x|h%i*g`=cyioDNU`QU+EiA6%nZ=T6{V5z&6rPW4EyD#ccz z%<#AX86xkCDTb-gLfajklarwv@q;*>T;`9dLbWad1vVEul&=Pr#I^mstUHJi@8}{4 zW?m&z(mUPj;Bbkre47pqSs-?lPJT(#i9pX`3>kbwDT2@@c%VHvoplTkghU?xpL6T&{A7QmmVfdB>zFDz%Afdw3i))(UhZYmzIX~B1dqBbGJ~kf5^xSR>zzy9}Azoth zJEm4h>z*xo?8i~F^}e-^T+r7zAGrwi zyy5e&=Iq~ul3QxP{r=%dJ=9$`7d508;dfc!!rGpKbUIMY05*k1K%^ElIA9d|@) z;62J9Uc=3K3=k&h;ByV;$#(b!uH*RC;|(r7Y(}O{ZGmge5jiRlQep2 zVtQ^7ydtsGMEl)b0p&%S6=EuFUD>NH?*i3Xf=y+hj^dPUb^kPQM+%5`Unn=x&=riB z6YqM<`U3H*dl5<;F2Y)|Go_rzF2&>ddhYApf`RcLmFeHrIOtgZ*Sp+A)EXOf=as_o zj|vH55(&PTKA?>s?v!a7HNhhVb;%dG#hxE=uj1#+ldf|oRKK8&p*0Z2W3$D)oX1)J z-`SL*YKB*ZsxFhKEx5xCyzfgVLLNI;>M`|@VG#JYcV+w9{-4mYeRBA>H0^5!eCPzj z3EZv@Z$4)Sxy4B;r zT`t}>MCKipM_SuNfrTQAQ&qfjHO}0$UwHgB{k)5Vv#sFyhIKaWWoK*iw#>_1Dspf5 zC8%F;I>I@j$%GffQO}0LI9t({z4hrI3Z+Ks1t2HSdwSDtMI4MD>LA4jN*P~k-{R%J znA4G^_nDsJ-HrUN_<=O|Bc4hhmA+d)kAx>8cWbPS=;1rJd@vb?brHQ*zrV(IC6_aSYoq3Uw#Z0X=?d+Yh_;kj-9nZx@?0tVQy5hSpS zT?}b(Y#!2690%sOfU|h%z&Zgl=$&wV!(X&oXk>5uZC?FaOM%0x$kxAYL5t$+s5!m5 z1#8()GO}$irOjWqO`DRTpFwl`a?lgv=M%}h-KEATHgWyT4oEx81GWlLowPk7Od97F zGs_Jlwe@Y6twSxeS#0`EWct;Pu|RFsvC7M#*WQ6nX0not-#id)Jc{thMZn_Quh#P4 zWMgw~=8t^0~^Bf^MyMF(oK0~bp& zMAK)m1$Z=$Gk2F6E|@Mf^DB@d=h-XNSEcsY)$u+UBKH^~!8-FMS`QGd7WqCIBmE=k zt&8jmB0m%AMd6Yj0&Q+ZT0>V!zVwG#OFVDOUqP7RQ%EF(L#!3YQ`Vy69j$iuY_uf?!ccJ+ zZUny#G+^}mFD6i$L07hS&v$>7VCx1s;G8Jbc$I zN=UK%9Q(f*d#4~E*>e$k1P9TZqDU&lk5-UJ{6I;5AZGUVA=tfl4N94C{^_5&rsQvr(?OyW3IS4Ix!`Pndg3XqFB)AVh>x~>IB9vqdI&t;)S z8dC|Qn&O|1C20Aj>B^~pqDfh|UNWM34yRoe%wWXKiIP7lsuEo~Pm5fa7ihRpBS%bJ zD0`3}mMU8igRe%@2(~a1C>K5yt07fc-`X`8$LIK|dK&=LDiH-G?!x`lnrJ@IA#ST^ zDrp+=)0bf<{R7PdvX|fR%e(ndfI|m%5|(xWNhkcIO#VWBl zfVuGwn}S9S_qI+)ZqR;FoX-BwqVK%{DiZ)1xQGX(nHYWm*3s&+=#zW=RaXg7&v(fl zPf4F-uw!~j9~mx{?E`6X{HP}p=w;2XN+u<>Q#Sn>5G%5$suCh0ODZpP#aSF5G_|60 z+!--!xDm?M7Ni}pG6YAh6=Bp{G$oL7&pOExzX)%W)d2-MTlFKXGS!ncbFJG=Eq98F z7(VQwtWFh5Q+O`|XJle$+Lv8gaA>5mCkIe16V@9sHwrw$=5SFc$!JjqL+ogT%iUP2 z0KxImlz8$ak*r%W?LWV^$7jJ^CV4B2cYYo0XoBFMShaaPjtV5x26dx(*p&TbtQ_Kx z{Un)e=Dzxmq|H27J|XP$KNQfIf^gsOHRd5vKqSm!%ojHsB1`KnhHG%yEhwo1%aAKx z9=g@mvzV3SnPdDMIG=QI%wdfDUzH68U!mr$y6^*&Lj$N{KzO>)aX$S@VsR3Xs(!@E z*g4n0;$g2-K2IT?uaONwVl9JE$t085Q~+^tm`b`da#~7Ww@SenY1QCweH7Rbq(6Xv zumn{voI{n0xNRF7nQMad7_ zoH_{*AsJ;eC7i5;R?nmZ)>{EDtI{F()g&M1H4w%^&b@4>4U~V0U$E)qn>0HhZ>@oT zm6$$0={f=L(LJ3VPzf?%A#WP3zVn6NQ&C!Mgh_oB?pYyZAGY9eVbSpYBL7oZK(Hn8 z@-WY;QlGH&PxF%bKV8@OpU1Nwroa#8>A#tF@_z_!^8SUiPJEbyO{Ly*` zQxDo^q>6{jAWmR(B?*Ud5yPhnc_68izZD09zf}*M{^I_WTE;JbhZnv5{6n4>0hht1 z9WX!FP5=h((7fmJb(w?0Q3x}WNrRl=7cLL?Q^4e7B`_$9PUx zocFn520mfcHgZ)t6@30_VZMf4A8bBdcHLzbzRVGqF~w2V)p#A`gju&)-(l^jcyYCU zwH5aHl>|#?h>hX>K(cTywn!d`RA}GyfLNev&Yi11Qv71WI48?>>ENO?#qjFUl1gG_ zcCf0EJ@+u2|3X|4t^Gmb7yqCQqpnbukBkorM%_zA=^dss7_5oiG-`#`z_$)SBBWrC zqkbUjRt|%WBy!{M43mx-{NVH2sh3Ox?Qx2Ctdfx_iA((6t7_UK@0%#Njcy9&H$Q@6 zvl8>*4Afz}JpfSojbK36_1Impamx#dMbg`*H zp7MZg#DwzI1qdv{E?8aS0pd4~T|}pNG2EIi7gsz%)BKPdW}~StB_*tdx&eO9p&~B- znQH4TW>MRC$xjmT$2Fg`cCT;Z364>J7pH@YK9w>JL9`HlnPpK)hRq1DoC1ZA`rt3t zum)RTt6%{Ttt;d`y%Hpe&!L}msLa>~d$MQ}>pf3UUw5Np+?eO4yF)|V)|8q`y?-nC zEf}%lAmY*GWGL(JdN%E?nlYiJKsZ**I|=neWm0xKsQu;Cgx_Gy68V=(gLKx!_bI6x zL8b_W_1GqkD%1g!a=uvpOuxNOEB=1<*8^?8&%J%L`f|>-rGL8D_a{%mOq^Q0e|sD8 zb#T(Ul-2SvMgNw_^C0~SNqB3avSj*+Tl|keIpjnlH17Rszk51%N=O2WBcSWwcT6BT zp2z2s-j$F>F$%3Gpj%n$1}75NJilgkfP6iqeLVo+Cp^Tk2om5X0r)%ns$X4ZFcy(H z>y?{1?^rb{ScG*Au~g0} z4=yPAOUJC!%uU=Hy3)=aO!F1yo7p6+Ko=_rK7BzF<+zN83{8I_8jA~H=W;mZTetu` z)i~@t-t-C|&x_9|GtT+o*^Gv0GN)tq0$uNbM6NGOXbhWOi(jbUbt^h5nY8mq9tFBo)-35E7Nq)_nZpT{$>8b>!mPiFDIo9Z zo)VazNKs~(vL`u$*38jV^W8=is;2E_Zug~tZKh?CXo2C9>tu8jWs?C~p^Ej~5bU5i z0bZj{A#X$9K(XC!-Mw1C+pt~&Z&73b4x{gY+N9w(xH9!`uJi0<_Cc{p(e^;^V9c>n zMFU2?<7`oCcEz~fx&XJ4z+B|3Md{){$ml}9u}&ObjplI1NTiFF4qo|hQC#qO-@1Zk z9-W`;<>#b(&Ts}&pU}!=^TR8PxG>F2)@^}yDzJHrWNBw?`QUMTBDgcnPyVckXZE2z zSclG!_Fp9*UbS0hO}-p621{^ccxyzhPJ-r_?e;r+0|USn=l|0HW%iAkX;bS7anvCsFONPW7Z#cxRWWE`||u6=37YJ$zV7=2h>lCpMk_Ha;iXy@C_&23kw`~Goy@5@mh#q^COS1v$z&83_#{nXHIjZ(BW@`Lk}-80q8 zHN)#`@{gP_NCsZCB_4+`k4$uMH(rC&A9d`m4Q+Gi^=|y{6c`X;fDV(d0rN`JVrD;& zzUP)r3*33wy#3}IP0}0CyCh#6UiY7!`DqcOVn=UJ6kIKs847WA zHQ>%TLj&Q_9%pi>9xvzzg1E`Mk@^Z+hS3ywr63S-T!V;-Gf0E#xEZpu5o=#z<@I~_ zFkl1P!q7BST*6R7u@pp%^rAfFwO1nu%7Ju@K~iBgm~wrq|EF4;y!RVQ7Ci zFs{!7Hg<|go7;?SL&EnGi`W|5g0(>~OReK6e=2=8w#1g(qYFY~dgj_c*Fe3agHY6q zFa{o1=14|798wNpxzfAcqrOK1Vp z=_2=hKTC-<#6NYyk6G!t;lU`mvVmXa{hdkuA`ur4YPKbk44S6-)^Q zB|%|NGQV6w?KYcBt+P@nbDkP&AJIpjY^I)cR*z~R{8{G}ydWa+gYv)|M;`^3s1UDA zI$k5~uH>xE2@GWJ9#0q%YgqihJO4?UxU`E zj&6jH#Al*=N zfDO+AC>M(_!*VX`d}dr^0d*4nNrld5sk13*Q8@)jGakKQYAb6v+H|zTTZ>Ar)85MQ za0MpluR&7eXEU;!rs)0q_xuiZhhX7rP4k<$cujFtVMEmAIu%04@0ju^s@Nd(0KRe$ zCTL9gw+z2;Y|T3l5pZ`H5Qr6|C575j^7% ztNHJ1`09UQZTSSflcagpTeN88BxYSvn>dYXJSY3I5(d?WJY9yIO#j;I&E*Vt>D#Af zG18SmJnZ;_!`r-96LODMNoJ#$RCGr-3ri+B!}U^wyFf2#=iF}_m_~YxdZD@UM0@1X zR-mGm)Ag=JdO<)P%0*hp&9FbmH%D(p_kjj`{*B!LW9Vt#2Daon8Fq76e9f5^D*sRO zmGwWXH8ZmOk3jcOwY};m(7n7zy$4n%mdGRSu|Xt&jIoMc2c@_$cTcyd{efN;h?z2F zrM?TzfwTkbm_0es{^&ME&4FjgxCu3&oy`$tym>xF=1gOn<^la~N6QIf{&vh6QTBZiZSTH1 zgdn(zW;uhpZ7_Oj8$8G}bEst+CQC-Wzd zXRJV^U}>zuQ&f{LtE>Pe8-{{cUNehL)jcHAaE3mbOz_*_xcm6m#_`JH^qfxMaV@zi zJE3{NI@RoN1{0>2n>Xjkn;m;{Op#*3bey?9Q>`^;bz*;J1i8#3i7IxlBUKgTRbC2t zJ2Z$f{X>cu6 zijp0|Ohbo?ruBKGI*jc24}W1szSLKjZ~3%Mt>)D2LYS z=;X?{w+jE@8AmyQtEe#t>W6b0<*?TFjKOg=hw8@m{(0Zc2A1C zu?~3yZI@GL_dNH6*kI3GzlCg6-^YK0i~e1u>7GQ^oESpPLS3L8=)%_gawGuy{|BC7LX9EAJuJA>bTlyCI9~vsZxGI6VtUajO{tkP5D%I_=MKOH zi(sb`xmmDewS^H{^A_E4;Zp6EXy{1ErASp1^U6h(J5!O4T{L9)v>DyVw%jskVZfR9 zz+x5l;k!Vyd+(re?rkkN$>!1ALdDga`_&g1ce&HrPblMvZv;i)mRLw+W zbG4Sib;13rZl3fBcf84;WNL=0$<$5L>2x09zzR_c+?weeEP)|#Gn1r~Xd`27xqKipbT^cz7Ix-_$L#S5AWzN0Iw+canGQF9v z+Z7td!F(W?6733s`SHG!wd+6%;`LIc>qf-=LHR6lF!;)K9u^_2w*|56VQyZ+^%nSs zC?}vc%Iwi+3+v&NY-jG|C_jjn_XGIubuRZG2lRhfyr%n~F9@pRRqG=EdO=fbpO zg9k!a{~<*ipf9xNg`2;(r5nX6d3PUhJ=Bo!&JmmV>}d0&1s}vL5JnTG^{#BSTLYJHBz4+tZ!FHT)A7Gc{UuW;)M6-8u z{MD&iocd!YB0i6|4k8cQB_6B7dKc^*+OL7eQ2g~rofsVF(4%BcaxyTRxO;o8byVQ_ zMmb`RvD|^{UnnqHo zQmsPMJeGMzvz!XnvBBT@gzM($ker}W9!U22K54Tc^hI`zD0u6?`ziyD5dd^*}47=I!L4%rgD3xKG#blIDK^oTQW({e5oJjlse9|Ry{Ct8!{vq8*FV16)<(#rck|^e`%L34}!1U*eZDX*4~ywVdF3cr9^{^C&)~$^q7sld|z&! zf~YxWwN+n|pK8s6{N`(ciVJIq+_@$3d)?7Cc3Lz=6=`1)uRpgE{GG;ZV)P` zUV+AYA`ZQ352Uf9X5&`^?iF-(?GA=sPvNKy+NUR^)QnFO$lf z+-J}0^A}2{CpMT>^v-y~u5WNYInDu9PSN4dA0!7P+saQXX0_B@v%K;H)yg*ubW%Ye zrU&oYKF26~mUDITOmM%iPnu=>D@dwxpZx8*CC3b1U*}E5aVqAY1@P-1YVk?1J@TF2 z)KN4W5bs$@G*hMMy)pYPPr+ldrr4&t!>v$qRP&mBd6TV&d%fzL2N3Ca1qdRU(1qS1 zd=>q+2pX9?Kn%h!&_T`f+yk)l6sa8h9*-qjAd9U5uy)zNW$uSV!L==aF~uAzqYnz5 zR@U;8Y{OXonM@5+u8diR2VB)s6a=^KE1NaM6P;YA4@c8p<&SOXvJniC_P0qRH}pDs zl^N4pe9|Qv20#PSM0VXGlBt74?^t!xJe_O1V~U10@t@qMwD7obTx%uCeij`_Z25hM zziTi2ONaLuM05XgF!(}v_TUx=qnG@-OCu*r~F-lvbM_^2*_G=p#?Rq-%{kRL=euQ!eg^PaS=9wQG1>EoC@(UtY)iBnFDz;q%q;h2>vHbZ2Py$XxV?{^ee? zVhb_-S)Kmt{$eD$cAmd7P{{I(e4wKeJJ8$@?qOl^MSA$p2q%~rtdfHtzM9d#I-Bbu zI$lMeQ$oQOR|?lFYJl+_0{G--RsLRh?u1-EZl8Y7X5iV&EW91zpSg5ujl zpF==xA0&||n&sV5G^NGp{<*O;CmX>vEn|sLfGrwOQ=MGfdh`k&A-yZsBW2-9yOTky zZd}FX>zXKa^V{P5mY0U!ml!i=Wl`7$=;<{BxXOpH>ovIL28q!1?I`XpS+ zWt!QKBjE~@tdnqe2Th7udLKMEsF_0d`PdHfgTUb#18>O7_fS$+PW#kc07UKg|51M+ zFH@L9)bzwN%L~XL>X#UVlskJF0=G6UqnsYUA3t9no5{t#$BwyohMagmzk(no}@f$ z6cbY>zw=9gbA7)lU?MMg3yRxeY3xs2 z3K$nM2H&|yF^2o;ewu+6sE}fsQPAGIb5-@chnR?KI)hPw%aNA#2V;DykA$p|!^FqP zg|&r@!hi~&(5fM3-odVZ3D9N_kpbFvS~{{?X^hs_2S2w08yRWH>?+tQnwe?9+%2}t zQjcoV=zzF}>#U388Gw|hE5hx=dE%t+-;P7;@5km~e1-@*@Wkp_bkHqgX3QBqR9THs z=GtdERPF`{Zb_N->DkKn{x+vMMyZ+{CPvkBG2yXOi-p}oKjMRf{T+ModRG1tpuu~) zIJoXv9-CCH=H6+Y?a=A%4$764wNETm^!!aByo@BX?dS%3Yh*TQQrWVu9}mSkCCk*ZZ>0sU5obU~z%n?i`TbFJ|t zX|2_q81L4Fq!7(ckFFrr&9t9R?qx~!lP5RiPO?Gn#cr$A&b%;EgABeXa%f@MM1NI5 zPZniInxI_xTCNP(Z(}E~5fabm4Ls_8yv9GxYqtOFErFT-f38UX%xhw1m>IYGV_sVW`mQ}Y& z2660o!Zqi7*7pH9?)H=|JWvf_dhvud3Qt|QZ_r+;(x-!^%fpk91$YVzuJMCt{qJVsy~(3G+AXT(rJ^`I&wd_9t9yiH~szPS8xq^4F-q}?0~>0+xrIRSJwc|Z`i2r zn@Q-2Xmah%PfD{vYsrb4=@Vm|Jcx1>f28Sp(R=>wD`WTBf z!j_Jo0KG-6?|$~>II<(iY&`VCPC!TvH$0+w^|t(eoj|d#y|&T>7^YpVglJEHq>Lb} z#zrS{ztq!?sDnoBi@|ZkNQtYRE(gBzx2-&AdEB%0MM0zGN8sn4c}Q0#n4cV=1v;={ zX(%A0L11oWNKXudTbaes1;^=5EnbU;3?O*SqgOmT@9JNZDUxcgXOehoIYnBCvQqkk z3czL=AIsZNwuSN+gSuttW{uU!^&;* zRMrvpM+o9o;RdPqosafn1$3plIq~qFWOB;3v5SmNi}e*9Iiz*|Y}jRy)oQBdW6tqP zWE8Lh#pdf@I_2Y6mv>Cb8JU_M6D2|Dc858$kgFAD1TBwNBflc&7Mr` z#}6Rm85#-dby=YhDuJXkof8U^ks#z{Sz7ebE-lsGf47f%upeR_lvq~u=Qq{%ZZ*Ry zwD>2D2s9;){MfznLd+ctb&P`*5vtndLPQYti<-5%gE3nA=&kZBqcl{kN-g+VY$0rS z<77(;fn;(Lpxji%9?B>l%0m3a-?lti2AVQbM;!E$XV%HtBq5@4_7{!x)YcFqkwe0b zNYYD4vlDbIwW~=w{L!lg!V6kH-ijm9h!b$Sx|lUtd51Lw;jhhMD}~nX*EI$dM>}g5 z(K=>6qL<}5CQ`1y9KMtFRLkfRjxY0fUqraZo)0vZm-PkqyH}d4bkHT;Cs_^4LMBD~ z?|R5@(r#lIPOovEJ5`>=kKwtSkhem;-5ppLp?hsngA4bZ)}|%hVKI{xXX(`*pk^*$ zuK0pooNdrESFtzb^3)ybHuN~(B)CiFb3AG)=NwJ{n3lH;^04bChPLpQ#>;_Zlvm$P zpXljeGcpJrv-pj&xbv?)RMC>@zrTm%&FuG^;aAE4U(BB1xg*Xi@ALIyMH z2oQ2*ZP$(%uk_2Tyd1B8l3;84EWthRu{gsl8_MH-dn^A67sdnZ1Vrrw6m^7jT|1UO zzk;>yH*;wZbWL;7W9(?GzG>&4ct6|GbHGYJ(qtUGa6jy`40Syw5?-zlBe&s;7DD|C2fP4D|;dSS7@oBH`Us*wmZ-24a9{7WB-pI zjsFbE_Wx;=ObXB*?Gwsk2&SZB`XJp2N?~LF5Q9Wc7RV!P= zhyE8G{v_@5(Xq~`K|1Ejh7OEqc!bco4jenb(BWCN2fD|W#tYXBOQ@N4gO+MPedD zuSogkQq5z$&V4|{D=hiV1si4ib|_QMQ@VvMRl&)s<_FWg`T2;RiPV((!IYwwh9pQD zw!y+tR|lldnNso!h*B&Cj67d?V7zidGn6bWEnVG`Ix?j>=7@nAhFVt8Uw*3-11$PF zAQ$E7zbljHnsbKIX~+h->k2nK;Ue_s@i5yBB$nV4)GCq$0Ey4*@Yzd~xF(jdh>ORW z1`y3H2>ZjSgiYN8nN=nxP4cr})iknfkqug&OZDGnBbADhx4YV={4jM;+A)o6^Jd-& zSO$|#GfdOdjv3ccTuUwM$dwp=d*1s19MKoln_8>#YKNk)5Al1xfk|OzmrLmiYrxSn z%U}7jkdXn5zzrzOxXpt!P6h(j(b3I3@@EAvhk`Y*_ZI;{qQ9T_ljLt+_MY0eewlYh zJxI@Fq|np&O@@NMpdY9rjR{EX2XV{%3wmnlW32HFO9C*)WemmfKcW@&!4I`v|>q>)JnoI*dmoDMZ<~rAC9@xd$Ybi z4nkO>f%gvAT2WMPG>iRn_E}E=GSkwOYN}D!Ak@k0b!F?g?M)pEat9uZvyYXRaBZ4+ z<(mk_9BtbwD_s=MS{)CD>PheWmbLnC-+ImX_2(XBF2`e)nyn;G)~S>pZvW?Z8YTR- zW@{=XymbO4rK|Mr*=|!-dEXOcv1l1?__#?+6k#Vr4g)vCXGmoFovoqa#i>ileLtyu z2=br(-|?ece#s4>>}p_fQeY(QPGb7=GGC>mrZdQfc1vU%6!x!tyQ2&$lTR$;nvLda zM|T%}tVJ9C^Pv_AIJRdF=4%|G&DtXQ z=gURbh2%=8(u{{m@M3wR9b#k)Qc{&LaiHQ}O-$&?g{`Elw3DcV>THl!yWSps-{6%E z#NT?^?m_5tDZx@I9V=^lxztQT#t?1g19MsOGv!d_{_eI4E#`&_$;-`ro^P}{%8cwC zL<@|A5Ar2{tU=F!tg&)wqBfwId(8ziE%FRqDY;lu@k|5n-EqgJ9=Z=+>BVBc%~ zneq|}sZIKIT+aR=t>L-nz#VSf`fM)PZfN!$arb*BO1KbRKm){!$)tITF`$=da*DC@ zG}W49z<}{B)0*US=8?NAF$N=>TkEs3z`I5>Q$Ap9Df|jJzdnLVarwL*dS1SNIJ*nT zSV>&@pXTL%=zC`PUzXILM%n*sNsavp?0za`>i=a)U0Gh|{ocCGgAjbb$K61t;pBaue);}iS+V?EQVDz~09mCNLqk`3Laj0~eQZJ~iR$70sX@<2 zpVK1c@_33UvP^=K%tj7Zv#o3boNacfx(U9_;Ud7axF7`g;Ki&dUFE~Yj&p7!K&IE5 zl_dpA>_+<$=$*3qRj>f~i=z?i28~R+X^C9bQkv-fjKMBF=I!5A;vhi3na z!mxB!lJiTC%eLT4TAGhGkI(^n5WZ2jQ9J`@7~dTnG?sIs@^VXpbC8=ezPS62dj=|b zi_;FbRUNeJqj-Ud4!xL)!-PRTVZZFH!Ut6klu^uj!Kq(d^12hmMwYmfwLO|)L`1aSLrMyONZ+9Z2PEz3kRi$Hxs<2^} z1Qvn`jXy*vd@pJ-ZUXRiR!^J?Fr1Zf-ub4cUN9X}+v^DiV-Mb7N-9oXOn4kC) z1V7-$+!s?AoUVbmGXDV*?y}L(rc+l*rdulEWN>7SY?Y*mFCYm9ZvuJZAvw5YSdQW~ zgXCR$T^@DReXI+kv9YpBUc|XcW^ivANl9Nm82J*3z!|En@deRe&KwiT5*N|%E{+5C z$Y(v(CJFAuzUX|5j64NCV-?nzV)F=jWHVp>mEoJe)zk)=mE@Sg`IwI4Aa#mKcsJq+ zFVhUoPGKg&mdw%)G=6*3*N~vE(55zax+-e|S3*@;Tb~;Enij^<$0gZimY&j(Ym+ZV zDnQZ(1TlI7l0FCj5YS0V$>iQ^{$%Ex#*Udl4JX(p%4*#{mIpw;i9 z9|>dX&UaTa6UO;^`8tP2x!-<&AxAy>W=cU}-mWe&=GGy6G;lo>{lUFB9NRu@>A*VaK|T)f zh4pvLB7*m`i?>~!Pn@us0Zd_3S%It_&`DVg8KVqgj`w$ZAcZqZL%g3RrfX$sDHsP; zOX`qR6Yj(lN*9u|+~W22f=`pQ4UE?mnY7K?N#^Uul_HG{lg@84a z5H1B(M3sWOi2bh}r1;p`9S`O;UM1da$wPhv=FyNR5-Qh}4t7QB7%tZ_DU|bl#|ns1 zM169LQnTs!uu2h+;&}7SsFH(Hg+Bp;VZllIE*KP-CC%xOYSh`8;|Rv645uz2x-e|) zY6UppLR=`(e^W%5-l-SJ23yOKoY5t)C?isz8+F>0%B)6&Ya%}i!KwWXJZFaXVHGv( z0^C+er$=}uM;NTQtrbR zgAEPyl0q%3KXA9>oOYG{_#$iHmXwsBcK5wNE!pm=K$(tS*@DpD;>+Uuz#Ldq-K@Vh zCPW_x0)k=iuR$1;EVNBsBAe>iC%Y!PCCe!UV1qH^w&qdR&!G2QDKQ2*E65@vC9?!5C02AqUZb^eOHYC!W!<%47&|ezDgu6tz+_fwn-dn+A`J>Cz`D zVUS%Fb%uuSmRc*=wKskl0a#dEFbG4NNMWz|%u?CrQSW`os3@ZNwh9qTq}`t`R$qMON`>I57!TtkPf^ z`uesWknE1ckbA980RLVUs3Cm+w$_UKYwFA};2`ukj9pmflaN^_@^ED#2t?Y-HA}i_ zs%Cr>#5S2yqq_4XePFlNYqXOl#k%Zd#=M3)sMC^KQ$-Nu6f%7<_)GW@sG9ozXZ_&P z_N+kx68cXw4$s#EEw(S$KefA9=>D_IH6z3SACl;;AsaTpQrSI9yc?bz@B?+U1%pVOk(kxuvB{qo}bzgL=~@05d27J75R z^cRhVhfMF-B0nmda-$a!EY)}Iz_o%vUk&FNGWEf8Na3a9k~ZvuwPgUx8&jN$eA}Eaq26Vw ztG<<%cNEB+$#YdXFa=noj{PELuokK=&-ve)1}jYkVBdMb`<2b4ul} z?bCfdlChK0+zeyc8VdFk#oI0YW{c~NB0Jxx@CuYIq7QJ5zM!Oo?11)8nl}9T3c)l=h9!TBP69J$H?t+sB)Kz;EDrOrzU$ue>|!6 zFd7D1d{<7oIc2e1Xyn!()g=16zKw4&ORNdE*zx<>6QF_0k?QxVlo2%U)UMeII!ARz5CF4@`t#?hxp&W7&UW1Z)LWP?y*C`1NuATh@lU=zVm0K-_%kyi z>FE-mj!Me-p6#sO4m#vpQ|IHlv-EW913K#L&I>=b>NT|0{Hkt?t zKIb3C$6;rUf=f4RY@A41YJ+cappqaf&m818#cZo=2+iop0L;ueoEweTDMnhuyyTV+ zHh3Ii5R?H9Xv}9(F}Z1gp#mey)9EKa24q}@kqs{slv)GS%FJ`LUtsAaNK&jhV0H#` z9xO9NNnf989`am8!SCcpKFc&z@TO_><6M@#{W@Gtd*%e;!6|VLU};ct;+THInI6sDec;|}F)A3xlj}Cg>!8uHLQNw*8&FDF?SjU+SsuLZO{vu! zxYIhXFZw)E3RRr$r#PR=G>aSjhxY?Ij$`8GAI_32bpO$|0{j2kj#V9v!v4RE;6@uj zFb)tgpaUZz*8bpFqoL%9-r^6hvKBE5$LEoKk|teU5tA^j^Kv45iu>Mw`NRIrf4f!d z`lQHy4nMYbzd!%iDn6j!DsSqJCCsQ4;K8WT_s!E3JIoZ~hyqVShCkUc(8bo}H_|1W z2`3}q8b~RHANid>M0;68@EdMad#JAxQD&hS&lmZ$U}BaeTBv(13D&_m#v$ah;{^FN zo*|AQ)mNT18lDKW4|8G+bD$*t4~vP$k*SC%+njV9#x1H=Vb z>A1$PIDyI-XZq>)hKFRv^T+sNjPaT@8)t-)BPvoI>4sf3DR94Sez?9VFXyp1C<07= z2=tQB`^OXpU_h-4#|W^t01ePWpeM%C+U3z$F4-9!)=r!Py!jYJeO2F#_d(%8EmJ@W zb8xL)e}`4(1>Q5mWKMfQKr!%#`F$>&617(cfC6BPprq0;a+w{qUG26`Z!s= zhh-*?(g3ptH;0BBVRdH#CNZ>bIr5icrvl2-tiNaxc`d!P@$=%w_CY&TsM_wI3#c4=RK>z_c*8nC*Vg8na^BsYT)$S z(l||4aT8=rtYK{{IcLK*2VhP#Z5Dt>Q6(~;!5R-B@%JDcKpL-G!_<9>clO#;cAXfY z8qmhxcfv=;w?fmw9LKi`m3H@2!uRHP-}j)k2CUiV!1o+5O7$JD)x9?bkgucsN-c!t z8P<1x4H#0l-}gEq6m;qtD46!n_s8ZfZ~yX;&y!}4f>(v;XW#?jTwYW<2Yc(Dfy?Ok5So;fmw91h%AI6B89Cx>m9~-#)S+%M!|Qw65kGhM$8h5H3O^1YO7u@7 zfc`%V!Rh{YUvo6-C(r17{~@GNhljKLl??_E2iT5ypdQg}Gba7786Za8s4@*S>;tP` zM8HfEw}(8sym%B2xPJgICG?YKyisL)B_Cf;zKpMWd_+n$vHztzCPVHSikYCuiP*}( z|LU-h^0SX%80#Np_pqbcxmkXVHyKWCVk9$=j7=j7%kz$ztol7)=rwe1b9dq>n&wo? zWs`U-?@a5Qg!`-~$%Jv1VKDH{@l0$UP2^s2?x1r#IM%-bB@atx0IPpVRuVm~E;_CB zbc{905{74dfp)(pGV5=azrH?%sYH8qx?gxkDTA_}Xn}ZXQWSI~_*fUYu)pT7eu>Ay zaYj*jS7)uF87OIx?$Rsm| z1hA_SH?My6$Vfm1>GZPdIbk2`@ZpBew(oQONU_*!3F!`v+CQdhUr~F=#TB-1+jvrv zOTLl!YtO10bRSF7!kVs9L2k9IQtjw`0u#DUGnxzlj0gHq^si23&j`7xS{*`^jh)ka zl;vxa!c=M(-`@4SUoYdYe3zvi5FXdG8#3B%S7U8u@E;aG$)D^Amo&*+CGjcMw%HOP z%n#gH-^B}n!Zu%R^+lg7Ui^&}nuDV@M% zQ2@FS2y_6ZS$Y7a_yBes90bMz1TsAyNFLL{Aq4VnDH2qkn9G>^Fu#6m3ROraag1NR zS4Uv+vOv^1rg_OLae58nHeHiR<+PZ?7NgB8bv-vk8p<_j+cb(;oWhEf)y9%dbo!m# zO$pd*hT}fAqcY(DXcvmgTm4CJ+Tuy-{kzh`uH0%t3E%j225?J<*FjX?UBh1x0jHKR z670278C^qiAlL~I=?5XyLVq}moz-7Y)8`C<&Vjvg+bnk7W0rFQ?qAwZzyO35wD&!E zjK&)b##?kHovMrD5EC&qhMa2-d(Tg_^;{;<7^!1S^THM&E+<{x#&wCk7HyqQ#{S}7*re}PLZI*F{&~@_2S#3R&5o}dHjnRk z>-nE$5$JWl~r8)8G=WgCFhL0E3)ZG|qI0QFs z3asGLTO{?|{$KY9ZikyMW5(GpoL_iZ#vLlCj&PC91sk}$#S+xf?q!<#vNG9VKMLfp z-!OUlU}B^PyZd}g*kQI@ul6sFFR~=>fl7fsBsu`?9bW zJ(qccxsi_rd~S**&zyY2+kLH@$KX-09)O`|lXqK?j>bfXAf1t0sRo-9BTfy5hJ3(Q zByfHusO21HY>px?O!rzBE}Y4*BHe%Cg2Q47LMIYeNDu1S;A^zSMQ2reK=VhiM6e(! zQUh!qfEg|-_-K$`Fa7g|LBhUGq2>YJar0bEB>=c{i5uKQh)|wlP>3j5b0Eu|0oOZc z0y$5(X94yd#b=OcS+@Ia4+u!x{xX1#f{MdOiVaQSmMhjaNFb>|vbvIDi^`BtQN4gx zJ3DtIfUMYb1asnSGs+L|AKP&$@LW0zJ;+{5K)LM+Wx97E;CACp->-@vCYI@8Giike zfkj(`I{A@hQCb7q?ET^pJ47;e({N~%p3E^z$|*H_!sYWTC+AF@qeV#q_-hA+Z97`E z88OaYOiyR~i%zi2mpvK~=1kJm=4`rWk!%lx9X4$4=I$gP3h$XQ{q7hny3k;)>}b~p z+=WpF3J+%+k?Z>>Kr}}Nj$!t#xh`^BaGYN>1tm%cv(Xt(@7EWG5|rk?RR+9wQd1fm zot#p#N|;jG(yG)sT(9-gign2Mx`l04t|Z^SQjlOhb7NOa6wo5P&_`uR6SIQJ8Z4-R z7`D(%8)}x>xG#`l1-zd5e;7Nb?o796TgR$YY}>YNI~7-K+qP}nwr$(C?c`+db92^d z>tg+duYGTybB@t_e{83cix!GgfpU~9rHW63;?Sf~w-rzS*4ckzm2~2$E|6Gj+SoS^ z$LN$)HopBqEG{8c!>uYAQcRjoz6mv5&YpY(fOO>@Nt?+9lRytq`~~nw{)hlKWhVRR zSCB_i(q->>B-3VGMe5Pxp|tlLR_w<~Qv7{`N}TIAkvx`apY0O&O}3qD-Y&OOf{+RGhR3+{%*7|2GV6|YNYyw_Gl$hrNJ>}0lEd- z=Nam>KPxGZL!jfDtvax4kuz|j0xqjcC+9;Fxl&Iu3;#X`Q74gH5YXDm&EBBF5dxKU#YupG(x>Dsu52+ zRR)qB+S{v;GogBoK3k|5>`Stichsppaw>J7IhrT2JiN1%qo^>=ZE}mTtN68TH=(3I z58@eGYD*Eh*b}(k&LCy-hoioU(f$s8b7fX=oe!bSNZhiQS<8rIGhvH8ZLEj)Dq1y> z7@=jw6i0;o(xJo5q$$dj?zo!%T;9Et)fI3uTej{MIkPEUHU8Y~)+6MX*~KIY3!SpG zBdOlDQ5y#Rws&<9wdDH3b!yf-)wT3a|CFx3z6I!I!%=YpG^9oM{+@VD{hG+Z;_-N9 zjV4t6{5J{yuXGoNe=@TE^hW(y%{!leZf)|!3VB3$DT2P1zFR1hKV-mEDYsLcr-f}D z1q4gtCerxLRh+QF2zU(y@;Em)*``;E4%?4oX`nCXqgO=U&!Oe*@a^fLqPU6fpbqJT zNt!&+<4ICP%?A9$(nH+);8znb_LOYz$f6Yiz9SoYAr{i6{J)A+M>b#f*H}LGzO)n` zz4KGaSgomdh(uq~2b$2b?QcGF+5X4tF0rEYr`>_=1jtuV(^IZpeWmIjjxU=p2$m!} zOm79W^~^VPSp{J5g1-v3+`qV0?_t5kc@m%npGJSoC`Q{FO?9v+z-d}W?kBc0vB$A! zY?^y)3a7h9;hJW@onxtj(>D~WA=7or(3fE<1gBZIlEloYk-c^iP>}r1CISPn3e-dA zrE_IE_kHJxlzYZCz1>U)1I9JcO~bu3lT!{^urwTjqeHJugG1h}Y^@qAnR%L#%{$`+ z*qVib58k<`GtOHF@KFb@6T`z_XOWux3T|Zhp|}e1d>n%5NQJqflI5SoEGi^$o`%iN#Hlf8?jtoc+nft2dj!eAL)woB$<}? zfs$`Kf5?rO+?vLe4A+@;F`It;nxjF_PmkSy+A)wmakWV%aYl4=t9@6z7q*}8*7IpD;1Gv;EZJ_9CnsJ+XzY=Tjmixyoc<9KC0XD|bFZv-Wg;#vg_A`V`ftGN-!*FEMR zAz7kdavolw?Pw%YnlO6G21$u6Di0s?SThHgbevOH9GZh{E+svV<UKAId*T(7#iv2<65bNQZ@1EgWR1-2a#`sIE>Nq4G>1&b z%|$K-N?!qz-;*jwdK_{e;lkBuJY|5&-vV{VC9z2MVClro;DlasaW}_MDg}7yNe8XT7uX0r~=u&Ed0p?tJ0qRJ* z_dcRDoucm&dQaJS=4^zDyt)eL!KB&)f?t7ml-!@z5S{k#Mi~f*t2d1+gK=(Z67fpxT$YHHU@WxW3(+IIKdFM2~a~Z&!iK2u)Xv1kD z6qDj#eVl#p67U;1>e8A*N)M}JX&BOElwi9>COAi3#Nm+wMIs;QohYM zC9g6aWb3B~hu$2Gr@C1!m2)&0qSt`d^Hi&ZX=#P3?OxWKRY{~{FrCB6+Tk~SL+RbSuryUt6v)vgQ2?l!5f z!Q!)C=+hwgftFI>OuRdk<}U!>hs*>xp8!wf?!%VC+MZr#6WBIAFn zmSm=9{>NhUAMu+KR=9)zOMJ1XbW4#UasMAl?EaC&$C}K6`?VeZhp{ z>-aRHFU5H958C2j>zC#0m-n_7uk3(muQz8q2^Z9&%tfGrv@U58bzMWuSK~MPH-=9; z*3Xah%)Aho4F~6{Yj(np$ob9F>du5Ceu+R{`visl-RpK1w*pcZZrp~t7dV`8hYvt*AqKGP%2CAm&L0QDyw0_WFA3O*%1Pl2 z)EjbAEG8wiOCUiPC6{UJz%qCTk5MZ0X7*hM5tjk`X)ALuc7P|Q!R}*gB=ICZJf;i0 zILY>CK?gF_B0Gd3^IXrMM&4l<-?Q5C6~4w`AWLx8yk{K>6pUO$^&KNF_*bWl5|hAi zssa~zU%|5z0RJ2Va~ksK)vsbjZS0c{fq@|z^Umu8@^t)oUs+cpuO*}Dg%ZyucZJj1 zlA8o^Bmi|nKj(QFa`;M0g8BQ0EplCwSqm0Ir<&`MOf`TeOT<>5(8&-RE+0~{_71!t z2l@*c&}aaI)C>3iB!O=m^-lOUstu84GQjMX$-R`59dXs6rMJ2eUP zPpv-dNHt(E+&c(kJODczq&wR1He0_gwH2~0!|Z@j!7@3u!|YU0XDlSG1{dy?j-K;@ zW5NrQ@1pb)@WA-_I4SoZDOLbG(ws%(4wr16~%z+~q-M2)sc|*vW_O z+(z-Lc9|3kjom1>sisZ7`he$1W5}RJ3k#}+3*5mErJY0G8Lou5Wh}NhR8I3)IL2&5 zW3kpj$$V&8;>_^C*Nt^6DOB!M;psP%PCN()mS8>F{m8rIM?E|HMQ+Jb)C;zc1~%M? z2Cc<)K`cJ_FnrRBVJdW~Do-wPf>(}6&|!T@`#HJafM|<3LkCxF1JO*m`%8IK-JYwi z?(K54Y}Qq1Qn{NLR>l5Ef8yCp`Y^!u-i0UhO>H{&n4&?zyM4 z`B`%Fo19s49ACJVIkX@I_Z=~JqO#n=<@zc|^<^(+10bhQ&^u^CaPx=$#2}HwE6jqD zXz+1<{hW-gIN|0~blZX2=^{|{p(rz=iV;Lf8>%1ygb(B%r|X{ zb!LP>Vxj*cW3yKiEH#;kj@u-0QO* zS&W+{2{!o$O><%2UY?KHXgl>U*9W8#{)fHO2a1_@(D`}Ahvl%>ryv8b3vkdS%|u8q z#xM(*KYF%g@EY%N|oHN8z{!{Cz!b_!A9H^ht0hU%*s=9H!J#HYLSjmwV1JqNFO;`Gnj& zW8-*GT)9gx3NoJYw+nS?r9Q(j$hoV>spl}6e!_4{R{{%`&dSs3=h<&W(U(JxA?yLL zbvl;Alz?eY5mhv`yF#|@OirF=j}m=`!2)eePZo>2H*orqKR?f2+5zZw8_mJm#oN%Y z`P0pV)N?!-&8Fx3Tp=P(5~*6)L4WR|vtL5wu$R|%?X^YC zRvqr`NDQ(Cp-@X~kf(mwIlr1l+Lyj}J*~rv*m7{>1zrHG0Ur1b1uljk#+xm$ro_NT zP2BBbA)L6GIF+ zj}OZzP=35SR_Owfq7NFA*bw5Xl>UPS4@v(`it+`D+=4&EME~TDBTqtLgk=qUM>q|7 zuy6^-b<;yvg#;4FU-TKGy{8-;?71XgY~`Khy4zb<;nio*-69%=s*>@$1NPZoB@VR4 zJQ(K{i-)kgqVNfpsVl(L@$io(=H5TmhNV_3paihrV7QT z(U0aMF5jOs6Zd`bM;^I%lC3i~PGkK|K>kws4Y8Fa$9?)6cf$34k0CNtc1AwhI&T@H`KP=M!P z@GjQNsucRC7UkC6WvCLxF`gR0qy&lp0%{)dp~!0SmTe<&$)9 z`!xNwxr+zRi;a^L?#?L|d7eB3Lz^2%zVZ|P+=cer3uM3l`TG+u-_#I}HKl5KbR700 zcoNr1@iv;@cre!mv-IdRoRVHldR;;lQ4h>??3Mbd?n)qM?FM-WU?bDYr8m7tXnqQI zn`g5!h}d2`Y&W|n6n5V~pX54|b$)-nFUlyDBM0>_jsFN$lqo4i>}<*Kfl7akOkgWN zJc!&~K|l^j81s$$U`VYlK2EqA<-UO=wp3`_5om>ri+LT$2+pT0a?@lOQx$X6-kOot~Q6!@p^^a#)IhoSJC`W21Hi&f2JmX$ch;Ba6e?l3*4T}U>(X_ zZY49yN0m^GML`JsVw|^c+RWRP3m{)UVIU=Cy;o*hcOLJjxzDQ_;Mabd*bl+y7fCmr zLayt@Y?RGm+KtDmXr%VRw(t{$iA}1wgraMM|g@8RXrh~pUYNxtzo4qFmY^X=c6h0F8wG(czX^FpQuESffGS$$6DB=mGyn@ zix~!oKgQQwM~xLBGi*Z@&O(qy!?a~mc|~=WfQAvT8VMi=gnW|uIF+l3gc-@fs}(G+ zh9og_Lmk9#94a3lK_7%SI2$VlZF`h4mRPleLQCPy#T_167=5T(=Nv&*@WeM7uUU`e z+l_-LpV4i$6hGX3d27u}E6Mb3U>hLtpH3f%Uim3jpCWI+pdulAIP8=W!&c=h0Gxpn zziVp%oUh!z`~*%C)W}}dyBWI#F*Vu*#yeqgdLT~4;+J#t@fDPNIE-uH@N+% zRUJS=NYM%+E?*p_-9@VBKSYhf#|Et@*pm#S+0v!>6> zqjIz?A(kR9rBN56^|MPR2UX)mtm~_#aX6dvN-Ve!h$1GHo+!~-B<8DFAx`^ElaceJ z>{75NE~?Gi;V!|R$w!jsZ;3B`rFjsM6&BY*_FggV-$AFSFQgzECe*xOg`+4b>aw z{p2{q_G__+Uq1@VUQIh}A8tv2Ju}%qa#oGqva%v^osK?>|AtXR#;s;b-LVu8Ss=`W z7&(75Il}nc_s+ZI(X%JxWcq`ramK+;3A-sUuH3jMsa-!C{30@5YD}L2iCQTEF~Gzf zi27W}e#FYwkJ*0SL>)sCP35TfH4%i-ii<_%iX#Lk814zbYQJ3(AW2s;fFV`q0WdA$ zp~+Z~7`hlpJ3LrGD2FYcc>0>D96Ie2OI~Px&X*RfPaH6_6BUoyEP<)3XIM+6on;AS zA;Tn(>1~~R_D{c>xvjZw zeGu-m>1FH2;&7=*{m<~sd^*2Q(_Co)gHo|$!R3!d)K}t^`BmP1ngxE4hVxb@yu)^L zc?=U<&4K$hl{8!J$)0r0oSUilH;NMWp32fqRa=SKYwNJE2X@x2ci>xL4k#& zeRz77C3{g-{w)GHNh6GZM3t6&(zl+~@lnd9g|poHKY;i1?<)2Gr82(_gLW|=Enl)krk<_{Bh z2JOqA1n)cj=qBDg`}NiK>8r+a%R7(6X*S=wNq;~0SC_SV^oP^r(~G5k1ff2}3-{eR z=6-fWFZS~9WZ0irk_Yd&Sa(7p_7hdOCd?d5!$Q2tMPmS!xwD$g(5Qx^3tXq5L;3~{ zhXq=fb$88TRoxmB^;#4VvVWzNm%(9PLL?FWU!ARCK;ZG0lykN^a(VR?)gY0?vFpEe z4GEp{;%o+;dPI_Js%uo7y)qo`=*Eo)auV`M6ITzSwS4bpo@Uhz_!@{EQR$9>DVizR z@RXuC`BQA6-cCYcV=0k$7Cyr0Uh4k-33~)6O9zK+Xc@6xpF4lmjndi{SJi!JI0^^# zvwWXcBNs!W*Utw4Q)!-VbYd{^K-qi9oxP}?p9(jK?Nn@4(Z(wo1Xk~pS0v{`lNYjA zBrQoV5^IY&Xz!Y5oc(#%)ofH>^Kn=mBcZ&Hebt6_vM#r8Q1!uUy@9{tWJdO>Cmhwh zc4G}n8E~&u{*sCW`oEaLtOuaU-?qF6cn|^<^^5RFwr=~5osbFh6F2aj3sc-c5Cw!e zr+LS%8gFvE5wOh!!>qom_S!!7CYnQLC?SlVLPvTB1d9fi=SYEV`GIDhSA;tQga;z~ z{9T={+heDDh7Ekiez_r&gToaB+{MX(V36ezj;ktW#;umi#)AbBKf&7R=j%Hf%DUP+ zAbSgsz|4+S+opv{dJzeD=wOwL9c$%vL5iy+Iq0F? z-Jga*D=39~$!Lg#=ABW9Dx9GcqE#cIiM{{)=85iV`F-hc3N_L?K zL*=W(sceC2^*B)D5zZ1?Q*$wInr#_=Aj__8iLpVfV*EiW1v0a2udB^Z+yvVVSS*#K zMgb1ViWAYzlD~DfKfx#%=b!#n2mTv2jg|c$TeU$o&gdU#_|-k-2l!BI32RLX0UrY1 zCjL*isFTx@sokLR>pQ-%Jgi1mt7dHfW>1q;?80!f^K0FS@GfsBNYA&K>vx1~_uh4N z|KkrNW>{w;Zt0+xwt9W<5yL~12IuB1Y55(OR)Rf0Vb*2y<}C3JSE3h_hqA+4b!=~X zSVZvpG;8Vcw<+K?aHSS43C14UVbl{mZ4dX8<$?73B@P7z>#~z$Pr-({sfe!q*jn@Zg?D2~_>1Yri7wf#jzHyV2bR@z z_ME_JrQcgv7 zTi9CE5K{hJYiJqmYkvVrIRi&_It5fT@~SC036qY=CD)i=oxH6n{7IY)`81-VT_DtE zce~2;uJpVq<%$T{@-6c;aWUlAcTH#S_vfwzb101R0oMtka1QyneqLFjJNyJ=y5L%O zkhkXXvJmflQ|_>)1l20_K`t1ad7%2c1gX;|xioXEu@>Q02#frUCr{5)H?TxFjqxop zQh0Wi#{uLReV$oyIUp?v$kJp%keRwY6+?@BWVNhoG?j3Q#IZ{FM&tY$h8acpjjYki zwtJd3*(b%fa=YeC5s5?zBY7qSD{4FElWHv)0SmCuc3EEY)9OqD1E;DY=`L>@sMEA4wK}4Ff~7NY{uM6N~Vy zu%HQubERF7FlSr#(!IWPd>wnvwDDgd!(Uh!LcK%t+IEeW6=cncFJo8`UgWjd?u|*w zzN=(!^Fm>cmBBbHud;kq9;L5`F2yUDFJe@fI#Njc*ikw}lAq@kwOw=K+l{}>WpAMl zlrAgzXuY<_nudwi6S1)d3>jV|wC5IVl(-%fz$3EPK%5 zyo@pR7j{Oy`68F6!=b8Wc1-)X_9`wG%%-e;C%#5B4WU|LsIA))8fUZmX4{s$oA@-H zY(30~s#XpsE3*;#xO-O5d7cr?<+1Wv$|gPq!HIMQr8jLi zZT25uK!jCr97<^<&@ByK9W(f{2EWF~m<7(DX280lcxjg;8FJuq#(WjS(^U1P3e&l} z1FFxK!(HbS@ROC-@T8PMe#hwko!j3CSW?7j_Ev-qZIZS=`BaWJ6B`30{#FXNH-eqE3nj-pvME-DIYq%sc0JeU&TVdwdG0&#Ajge) z+5XmEP7~VWUwyYdf*Ad4B1NmOCJObq!of55a2`14)@0OUTmCTpqFXaXotv%$2(^WN z>h&-tkq8C8BbB1;t538EE6c?4pK6n^%*nDd@0P{sE5q6^A~T zw$}@)lZ6`Vzn-T5Z6C|X_K%?I;U7+GBG&&oO^;wJ1mqEj0f$fkX#nT2_h`g+AKm5; z!piTSqZ5Q8j||;C0TJ+Oz!}|cq+_$4-Z)kvU#4Z?UvZ0$X}R74vw2ysvvG=Xy_@12 zNrHXm_bmy`2?|ezMy~0&wY|LoAYgjbytZGY0Um&SWVyh;yufZgxW z5aVnDPXo4EPB{7*MZ7o-1dR3wrdQuCX#rGHwADt0pE6{5dIhl)wN%wAvB;)11vs)5 zk}?g}El||4OmoE(l)e0Tv+1}O1_|OUAO3W23Xfjj^Jyhpr#4ez1nMWWR>hRt4FL4* zF+M3o3f;$*?1^AwU!8}HI{q>^a2<#RcP_6&VqI7TEq`|DihB)ztG^Ul&GjQ({Ijs~ zpoV3fN)o!)Mv<=vWJ+=pHUi;<6)H3vPMp-4Wme&d&ChzpGOV1hqq-2UXK5=oFWRzi zFS*hpwSoX;mK)MR@8)`K&^!r-$0)r?3B`U4gH%R&X4YpmRfTXMHL~(r2BSCdp56C6 zug`sEb+9GV_GnV4DCo%vwvg935u8;vadU2<7d5{fU-;K!Y(o5x5vOM=){Uyz{esTC z_55*Jf1iCO6UV-X3UOBYPFeuLjQURILMA>qEf2LO=lP+1U!Wd+Ds+ong>+}>AF%z3 zPdWUG^9%;kaSRyv0?Fxu$JFnT0H1b*3{Dti0RxTu6ZlLFuDWEJlit6os!9*kAdf!J zNUK;SbATO7EbRTuttjo1*!TQwpwM-MlkG&n#{qw?6J|TTD6y&tgAMt$$8F|}H`0nw zmRlt(spT;9?Iz4|0;i^mr8(E)l0i`R#mc)}wXX3fb7!p#%vGr(iJIiB2y^Ad?72@q z?FlW(`QIf=$)yEj5$3IkYSr3y;Q8GfpM1I1LuH;7HVVALz&Z@P#=zJ~+3yk2(t}I= z)qBeEUrz@imA-T3-QT{DyFWBOW5aXV^ReJ8odM~ z(`JR0vR97f(vj!{is1{__-UVoB3ujDHnIKiY;nt;YBnInGW%HpPj#UvfU`3PD9cIs@!QxxVJ7Wq)r+Ca)7n^mDJPo)PzUu_Ppe$3s?dk%1K?e z>Tu0W5x0BPHfySr9Y%RQd#u$=#-nF~S0V7$HNKFZOgfD_`nBA1%o-8x zv%3;@-VGSkzV+=)S8+N%MpuxC*&h5CXxsjM0T89Ypn`BKXe5Rn*GJc4@(uzzKhOgt zD4!dkKgqY{+qlN288=^imHNV3QS=F%aH-wmWv|0Oz&uRZlMxjwk2Tgt9e-EPSQC{> zSCc^^)`qD4C9x9D*dTz%{~9P_^!U9tPuuw7WgOWHw!xg&qZ4%;Nf&z@X-)Z_>M1T1 zO_g`al}pBDYTM$IV8^ly%;R?aC65~)ef;l-5Dawdtsgrofu#F`4fe`(R?p|z@gnWkRdkJifK*18jO-=vsk+MFeYH}zqYOw_dI4|1R2Zzkp0; z9>T|7@ligEj7*PHR2)g%4<7t{!P~?D%U!F`f-X|p4iGRqU6k91w0XmhpPetDSw)CKaD&S~<%*kVwA7xrF#w;g$`F)0jS7 zY)kBY&lr(&ZSI;Qf8)AZMB6lV-kO&lq@L%y!@I~1$r3sDow$5%5bj>&Q&9F-ANj1m z$SSeUl3}nrPh0pD@7|sS^TC(k&gP{hS?>5)ykF6vBksL3g=9%HxtDmee|3B%L#9hI z9|NOMNpxNj?U)yO!o2w_S?GeA`YTlrC8k2KZ}9|1VuSc7FF`9l6WeAHBY9~_xKhzs z5vd`6Tr;ES{mi>$FdDGuNzpz9XhuvFuxCtm1aymURzOBRZk*RNjyW8DL2a43>vlP+ zJ{|+ynlrX|t5y1%pf^KNc0)pzhkaUK6J)2QaI!E>X?)Ec7`Er(Fb4rpmWwY6;LDs2 z51<41D5MU|o~>;u?c^_F;bn<3@i4QG_d;3`l1TwRs1tpAHQR~Z@`qGRUi2Dm?js`jU_k;D4&ERv!MG4Ot;B#dA#Ife@c7&~+)7&A%S3x? zI*pHE>hcWmfDG^pms4hUAPp89d9u9)38ppb14u@rvWsGHeIhtGM?HBd*LcxBkIX8$_c-h3Q$)`?XYg(~*6x8Yc z2yJ_Qdf;px`@>^;C%^5ufX&Lx%*aoSD5y_=sm3=ngKdcpZ9&HhYmde+MF-#7XN4%x3?HxuMtmv z;Cy8F47j<|zDexB7N-3Dw(t4wn!UdU@|6Dk_Wfc7d2<1e(#>V*Uwt<9MSzPtN^}6Q zmtA2C4tkwhu1A5ER>U!gIM=Fq-j|7d(KS}m>H8kI0SS*3ENqf+0xrtZ2vJnbk=tuKJfQ*{~_Y{TVi#$ z%5!#B5UzJ`Zd)4OZ&_MFD4JphEQA|w7};gss4e}wET3x+`CAg zt5oSLmH-1R4kom$uL<(XtRX;_5}M7z3qrUJ7=I~J)4>8DsgltG%_Kbm1AwYUboi&F zQR_Qu5jp3#l1D66c|68VEB*@g2{*GnVXF~}gHY8E&eL>6rM!+5HKKb&bBOmrzH6W) z<}-sC<_zA)5|z3=*A2yhBV+sGR>z}Qo7t+VUteD?K!Dpdsa#ie$DkH-tLY9M!cr|A zY{(DF6JM=WA zP0#%u>tY--0?2kw-f)D%s-u3vmkymYlUil(Y6>usf1%DPWkb;3>L6`O4#>f2jl2U4 zPe%0|pNI5t-;s)(ur$xGut%||oU4a^?tzXDBe|2iad;VP3(h-%X2R*$cBU?Psg-YM z1E@k`nTELH;W2|{X$n08v!F77%>c5xz+{@&pr7%?}PM>VY_jj`~vi`UEP3#E-K5f%rh` z`9x9-|8f>JuT5G<09jADi^7wiDoW%{570#N9dIOY6%+xs)BQnslKO_io1FE780n|r zvhsBtkm88goSl!VCO~6}))1q*ZF0YU=a$<=_eeTLH;eg~D1fygb&41@`n`w@;SXC{ zwy<?YOuoAocPu@JNV5qofoQo<)+*EE75w(MDoW%`e{e2I zJD+C&kt+JwiA2>VY|7) zbY-3mm~DHe{JJ|94)S2U#S@lX;Uk!qQ23feaP!JK3mTtCD4+%HCDVXE;B5{Ec86u} zD;#8k+=+KzD0AgK+jbSNM_=4D$-3eCCiPF* zy(G_kGSz8#^=J4i*&FV9^;seK0OeT2Y z=u8dSSyEKY*HB)R2Mp!IpQ_~W>ow&WP8y0eXC;V^U;@?LfaPxalyYGZC)HiMhRcPZFu)&d zeucbJJXsFJ@?Y_F5MU3YgL(!8!G`Edb(zNf*Z{CdEQdTkp-9l`@9 ze%k9AQ^~xRV%K^RFw#I6H_`PkLnGssrP3sm-q=-DXM@#*ZKw5fBEH#$~ zTvn%=S>Hb@?H$nwHEm5Ok8xAU4H|>^49Xs2#|a*H`_f;pEFG^|Eo z$>vEE>qcq=ZU3v-q_|O=Ypc(E-}B(n@O|vC|7NUG(h)m4a)XCXn;9M89isVG+bgIQ zYnNvK+|x?qnz{KU-(F)3LtS{#B#)NYZHlselY2 zDa9?At3n!X4i(t>b$odv(amwFm5s-K-nof6P~p7u=<({~Ea(Fif1*5L(ISzvQlQH2 z4})p@M+hfA+oCXv*#<3(Q$u~9X$33SSfyFNzO70H$H z*{m&O_12|?FCQeAY)%uxiXIc^Wwyl@&B4!F9q z^MPRgQY0N~$913(PzXy8e=J*kTS?c9ysiTs+bV4YxuNiG!d|_QLfILi&Oc#15F{?i zxbXKXw}78pimVp(7*#$P%Tm8TG1E3P{*pjHL|ImJk~#f-QVft1iMT6MSb-%9k&JL8 z|CX)!=Cs)QiS6U{Uv>JwP01M;|7k)0BOSf*zdHR>=a?uapWxGr1=RrR_N(oO8su2C zE@?kP?#)}k!&Nt&l_|`^4cb1mQb)w2AnTDZX}lj9&ufi#u$>y6eQ@gB`qlaRX+dSo zq9gT?q)3OD`@ca>tW~&b>hDzEN$~se_}5ofhSej8S+33$u_S^NaUXvInE|;6f@& z;>U}jf^$3526dD9KT!>^+@|+9rjQ*#D<*$7bc2`p6gPHRGxMcQ1kc5D*K>pwmAguv z)t(QK$fOdyro_vlPW=pRjeI(x8x~W`gBILJIBK;{r7#1M!W(jC1D=1=fm27_)5)7` znDuig*QHN-?6ltQLdh3w0$Ya)9I8ix7B%Ntjl(mB1}&)j_1qMD;1U)SeCZ*1gfK%n z`E$Vaa?%cN&CKUW;g3a+1TI~_X0jE z(EvyD_$B@Yk4-kc^)cDLM`r%C^SOT&%+1ydz40kV;HSx>SYei8HP)KYuO<|SC97Of z(Mp@ONEW7sa`qKwja*{i%|rn#uER}_5$zO#DU#7{YJ7@B_xack-$`;w)>cTEXe4aF zD{{9e7owA>yQrMuf$N;(!9%h*!c-53R_0Ax_7Ek2a1|krIftkYlQy%~X$|V)l;;L4 z_HFTt5H>LaUZT)8(HhX^5~tMs`}Sy!KbUDQPG)9SrC`XH3?8dXm~#3A8m1y(;S^Uf zox&~onX}8ri!z^!f8^RA7fnnOx7q((-!H*6_!R^gD6vTlV-kc{0aUHbrfE~c!wt5y zpBvd%w!KFc@>fP1j)4@Pw=J=r`qufJWocaD(EbXc7Hf1@MA^xLcK>AuhGyvU+j;^R zc_e+@kEpRV95xBmkF*PNDqq>R9^vR(5jh8`;^02IY)2jW#^hd9`NmS&*N!THsBF~^ zk6l|m3PfQ_Bo2>s6+z&`;SXYg%X5N`YfTqkbuOT*mga1%v;3V(i{g}8yEPSPDqS@Bz=A-;qjImibvs~uzM+1-mSHo-aZ42##hC@zZikU1BW^%jvZ7KdM-*qrl5p zS83a^%0w2X=bVEcnlKWL#CugH`_lx;s{*>ClP`n&dXDP#)q%N`6PIefaL@=d7Sk%)o2*` zo$4H!H?LwJFN|sz@IfD4rFG3;K|9|{M%bkB zEfu{>w-?^yKB{EBsz>3%0nNk~;?Ueqjz@GE9Ce$+v9ocotLzF$P@Ofsc!HJ#a8l`E{*ud^ zItlADQ2V|~i=&f;7baX`@6+{f&>VFY2*~(*7Zj{6WbwVoba1yb$7P9dj;!Hq^28)G z5L8FN=qFopjWraZ9P87DnRL(;!-Ti#lQh|-gsO61nq)>VG}aLQ{@hQB?b#*~&9PV* ztbC|+vI+=oDrq~ph)%qJ$v{fMN*L`#o{I-~q;%THo%1U}s6TH9L^WBftmSBdS2ZFd zhYZH5*7`2e!VbQbNlk?Fcsz}eT4Cx4XyYKm;7Zcl(*CvenBzR3WW&m0d{SW(Y^$z3 zpk-|SY^OxQ0>)?y>t=nX1Ym98|1fq=(Utw%mycN$TNT?z#kOtRb}F`Q+cqk$q@oks zHcp&$ez*TUM&IuHa9{S`k7t}c##(Ey@0_2>lN5TWAxC}J&BcWx%?2)2_+2)g(8Emj6BdZmO&b$CHs~H&= zVl0LJ@$2S#3JM{blCBUMBT{;eHCIqV)=`m$_ zw3~9^dMb?;mOwW;vy-kVSvWw_o!mt)24noB%x;&rYZ10f*upJepHhTZIj?q?QiEAY zF(BJUF~E$w-8)c0!y^I%OZ|ObIgd<8Z?6<5Oe9>GSmaW0C(`pYAxLK{+Xo*RCq|yd zaDH?3=zLt4R%>6{X)T_2I93UF-4}2zrbgNe%*N55h`dK^+)cCp`)ED}^2xHlhCK(B z14fa@B8cmtWYV!Jyle(s{>6X?Aey*|irPveELuR@Xd@a!2kjNb5RMbbSrN^*yxr=K zT_@m&`hh@adiP@hm*2<>pDspNJasK(8CTCda!37>yqkJwyJPeS$%}P$Z#8bhHNtx3 zE4~Ba%Kr&>LBxsbKaF%;|J`Dg`TtprYW|SuqRU|sNEm zGllQ=2uKsF;H0}c9!QWXu`F$8-IppIv+8Ka%8J-2tcs@A+VYbow4uv`EvEcx%ZcXE zdoZ_0O9*VJtw#Z zr3D*NLW7r;E{xMwhc@!JqSbaK=y8@nQC)XKtsDI5Msw2z18Fy+r@$)VK;J8KuP%5? z=DI%ckP^(_Gw_Z8c#8;+o^1S^7n;lRHNVRK3K+8%8g!WW4_;0)iPNCRg`Ryhr{0`{ z_*|3iW4uWm2A#pCi`Ls{8_Q*=(mrNbx>Ay8EV}cFcJ5FJ@A{ZW-X~Bf-gXYop4tVD z1-KVhp4{iB$nl*7Lnbf`ay_qLONf3M)TC=lf$FBlJqT|-SHyDrcwVsG>M`+=jGTcS zB40@c?fc&$Hzix{oJ$5jvJC9IRk=*(lO9NFXH_NL;_(S79ay-eo4@r+l* z+%ceEXmbx&SG&=q7!gz$Coet|`KInzmxF`J(p(ud_!h#iG`^$x@&Dk8S_`crb)1n5 zp?zkXZ$dc7yj2&KuS+5|Q^y1w-jw#AvWSL)B?QDo=IavbfosWYis|mwI;X`Jfhg zNE|&dqgPJO``~)%=fl$d>wN^G8Ln7;<%q37V>~(*R|beLJ(GeGh?u1uY{4NZJv(9- z)}GkDWGqIfGrTaZuG6OT0R6p5E1LX1998~uPs{*4g#}%#oM`p3cGTH?>Tn}7q-kOT z_eqJ}^>gZ4G(s)8KyBBIQFyVZ$et`h(JiUiayhg;peviUE@SY;?~jHe#=$j%38ATLzh9aw}xQ17N3CnVzupTjAh(Es{uusd zMCNn^@dLwE1YHqFQEf-<(WGO7`clrQk`*N?&r@B(Mu1_iLwZdfh!^b6)Og+l{5c#h z5yRd;i5}^AHAaXQAN7n49;%cn7mJK))S_!liHR$@0~(2AsyE-q<`|p+qrRQQ4pi_= zcUiQiz;;&t-eIh9&|S%VX0;nyHG3sCzmyx<^PEJqcL zf=*7}R)C3-K5sjOye-rp2_=SFL^&8(_){R*c+ZC{dW6vfLQZrj%Ly+?f>RPpMUFAC z8eG*;WdpF?#Ig9w+o{^2u)ey+_WMzRwqm3fkV=R|PeU!bgM=R@NK!sqwJUnJ#I4OE zKXR~sRM$FB#>hb>Z-GrKh2;cymux1?tgr6OxV57hvltzI8sf@qV%m>OS{;@z0C6Vh zwzx@+7Rlo4ZD&7QF+2nla0>oqzOGz}k{KBx?o`7C5>2;OjREW1OH@L2*c{ocSrwMv zhN5bN$_Yq4<(9J4+n7f(gns^g1)1-xo@3ntKyf5Xo_o@3{uX(`t<@T;lVkx(EV z0mw}jgwx|%-$@N+7IXPzt-a{&=F7wkgHmLcwx{n-D8RrIyFi z9ZOkN!GIfTr9YdgSmxD!DO(HsG?SD;B+UXd#1;aodH|`7Z(eLbnhn<$_*VjZ?^+dj z&?PVVD$avOl8P+7dAZ3omOp$;)aq3PYfVGO0!8l*mbwKmf8*$utJ5kUYTNk1t++{_!lURkG&#)Vz-54Soo{kIm0fkP0YT_8_|LW&SIp`%?#kW%^z$ zk@JscCdwCo`wjiNt7CI8swL|aJ8HYtR+$=R=;-*C>?CN>D$(*52k54ArT&U(YmMUE zxABN>ZPC4qzHclwgF9d9$-*9WB#&}EDu*d_;~%^Q9TqNIWsFisTk}hNNYF)Q3B{rj zoXbXW%(b3edCjA>`I>We$-noGh)D-i3--waOtf`Tw&zURinXj*SZ(7vad^#_7tW)Z zth^9kMEaVY9o?Q2T-oWf&2KPyEpidFM7v`)-VSRldg%>WWOJ}nN>^rtiwdC6>nPB> z)?UVi9(B`bDa+?nhjrH2K+dQ}iWtCs!F3+DU=wT5cW2;SEFg8J+ifHL(PK~lNPn-; zR##?_rqQJUxQG0m)o9BVmHu1i=$2lxkuIw4owis|f7XL2uyU#|X%$FTHEM0B?i$h% z_F)|bjkkk%jr^8UCx2&>NppLSqWh42rq~Vw6rdWt2mo6SYJ0QdjU`XcEsY*-b6eDn z2dnnji*M8Sh$DR7JlE#4=Co>(m$1if%a$fzX2ol}HdwzsQ-lJ;cafu>$fBr9j~Rug zs4{ulp_}{3u99M3`gtvbK7$Rv!_T2y(_7c$>zCPA|GstyaOFVmseG*sc-MFRgfbrm zehPI(z!2UN!T_iW*^rL{CNjCXlt?ucq<@uexB7N_E`d?!;v^}~7i*HUg@J|+F+#ByZpKperSLWC7Ew6b1 zV(8T=2Z}bti65vudvtPgJE~|6QiIP&vOjd5Vgr!Slq$?mcQvmER zdAq$`$S!_xajyL9R~`SgQxkZISXdh>70HHwdUD}z2TSLgSTC2~{6SMr`GY=(0OGG$ z!ULmqFxcVucT&)fep?W1P?!`Z>Q{vZl#qK5 z7HRE0x)wR+O01J5{?)oO;5Q?7z16@VAeD{bKn^8iCF5UtaZS%7^F3S?f6LcYI1+O+SlC{U}@CUSU0B2b<*K3l@0?R>7?}PAbyc zWDA~W?Ov_HdK4Q2E`>ASt@C%37`c<`>&~I%y94+ZlSUQyJt6sYa(KI9Oz>VeOO|HLq(V#jD+jdn0*wd(Z(x z?m-W(hIhYB0J1Sn7M!lOT$ZM*Mh0Z2sX}h7zs5mMMFwkuxRt(egbyhNXEKjT{cK5}+;0SWv8qx2P1`NHwhP_BJT^gf|-L)e*4;Xpnmr>sPHq81XzhZgG^YKAygs zeJCk2@o%J41*%vf@GsvrFA#j395QsS8bxCJ3j7N;o!u!#8onX9#=*9 zUUd)q%Vmq5--g&{ZQsfSEUXylR=j-coZH{ePCl1uBr84Z@f^FXm zRa{EnNsudp*l2wP5t9sLIGfOQt&1{YZ?V+Y5vxgbyl0@)v$VAjpa(%UoPfoi@Uy|R zD`1OHcD3wrO4392^3|!0+m->mWIVDI{u2F@fC@QrUgE1KZ!y{Er`N$R%^?ur+HQS8 zBHOl0hmm# z8y~j9ALJ9sF1D^cTMH|3dX6_)k?FzW>N=cpwaIE^)}1t_s$At~PZL>n?d>asE2FjT z$M;^wFi9ll=ev(F=EJtne!B}5{K)ovp_K2Nc$hx@miSGb1y5i#DU-;;2&XW_*ph)F`jSGY!~IkKB7w)_Kj zZme)XKFSHLsM9k=M_%Q+N0BzquMVHl`oM$oTL|UPGX&` zDEXIk7Zac~F7wr15%BRhLI7r^`JOyYMC7M>Dvx1*X-VXW50s4h_|oM^oXqZ4NGn>t znO*Chq7^+`#IFd!9F_S0&HIXHJ!ho)dtMz(WE6nG`~VhW`6uqShUBj+HyF)fBsPB7 zZNP)KdpX-e1I^=4zmfx2`dt(dLTwaG-L3nB>KaOmj|!rq*yL%*3(2=+R2k3!6V#h; z0jsE0Uk|NZOn>FZmcGf8qx!(bgRWhJ|I2= zbf$Y?RB#Y%cUzg1N0cjFHEbVRql+G%b6X&%8%yYwyE09G#-J!r@Bl|-$RuDVn*N5P zGCH15CI+4$_s{7O)1-j2Bk7I_h--t=`;K+8v-}KMDoR@aBA_;F2rw4SBQNTeiiF)6 z#M-Ve6zsD#$m@n~Fa-}{=TWa+gy1+NeQ$bjj;alaCuqvu#vrX-+8t(I7m`+?4LdWi z#a#C2MvPBd7-yL$KP&0cmT_{QP)Y;~;z;pJ2<0=*GRa83JE2T;N$0a|?ZauHK{F9nhO_UEDaiKUED`c-f6`5Zi8Y65|R`WrA>FJM6+;oXE#tnk#o=VTVO*E%-tHlvVv9gc$$vREOZTu z@ux2eD|}L#;%nC>SuAupDy~=T?cw`gMJTC5- z6jzAH?l~fEZJ|ve;d*%CGq36N!7g-~6ys9FPuAg7s0G(;Qr}juJjNdCWA7$~Z5#SI zSXcat{~na>SGPY;W*;hWyO`-)Kx5GJ5ipkq?8r!y7lskqDdyiw$!<*H==DwjzzMjh zHJgJpm-vEImNG)$`sHQcW`Akr6O<1;L$dYwOqW*7S~mf-%dILwIq##>=MDiDJu?eL zg-yt#`d-b0&29}>D|9|jC-7CRtUOzIV_qt&neV47VeYre%NXu~zjCLmruF4c zkG85C)y%I1bM#c|xkHOfLGDi$z9#npEb|jjW^z*FH+Ww@TyTH7EBZyYWasH_x906* zCkyDOo5S$b#X{Z>&lic#obtpkDOi;k4WUDlf!R zUQF&2j~w~If=h0#78CUP>LF`l_!ZI#_oEa+ij9s*FXa>r*#%uvirK-g%|-m*>rX0p zq-i$u*bU$)#w#xmDzkC;V6#?N$B{RggkF$7psTs#BIV14`1`;ytuayuGHj&~R4jU$ zZK%-EPN=&6KbIJcHr$NaPNCb^9}1vmNT-?!M^$~d?9zv>aJvKu+tEOiLwt#Kxxuq< z*-iHFR3a~zx3VFC}Suk&R?#8Yf5R@JDAnWPF~MKGs)5pOh$fEzwTXYS_f~7yRNF zyNkZ`%UYRiy>_^kf?RCL4AS&^MBkTiOipj`1;bi~nz5-Y77>^WEjx9re`P6(o&U_a zyRVvK5`T~_$tO}qg-CLBQu9?z|CS=7k@}(5S0#VOF3W-ZjHN(iK5i4hw?8@_NM%gh zlKLmTV{g9GafO4&x5PFDn}@>DF~BQHj&F($ZhGQk&PLX{)o#H9^HW!D1{~zq`j-dz zpYqicA!!`XG_0w+`>x`J?HJb&=p?7*LLiUbh}8;WxgzvftcE2h7Unlvnk5I3?H^ca zo#*P3l=8GG1Q+~B{dK_;*D{k$V=lB7H5wh(IraE9K~t=fX>cwk{Y5&4@WoufJF%6{ zn_%3p#a)$P+L4QdT}3HJ)vOAVMhtR-+#^Sf`32UYw3$?O?2V(f$!=)@CnP+Pp^Jl~ zD=%!k9MmqMNtmm?*qVcj-Zjs7-&Qd+Cy0g#FvNxsmP`KfX~8+xFP{8F4V&5C2}H;h zF;|;m95jtCy$-}K5r~C8$tSBFPx4ehKBSYc z8hj6-FJArU`0A1b*|@G%LMo6zrB_bB%pHru9F{f;48%@ogZ|R55*)k67I`4s0^U|J zydbtG=pcV&<5+J2-j-Y7SSo>oi^uxVYXJGRk(=SAR+p%U4w)&q9xAq-O6!3W3}sLVn|iFZfp>Zdh41|yA8mMK@IMtz=KoGV#>VvTEA#)0daZ$8 z!NGW4AfTP!CVHfHAOAl=0AJK=MD1G=M`o7gjPGtSoUtMaTjG(#yc=x@+>)R9&Jv%d zk8dfx?{Z80QPcK04g;>At{A~hy=O5flm)M=mX^UlFP~fcNAt&$*Mo-FXAS@)GVSW+ z4eL~s7AI=w=$<~J(y2MsFZy@VlHWU5qx{?g4779^P*_wYJQ9`(&@<*(Udi0oI%xza zB))t%^7o!NUis$tEWP{KE<~R)iL4vAIiVxo+b51I`af1g@PDeYb5o%i*c$se4T#C- zrPEPblc6RNq`EYX7I%)Yjyx5Lqn%MVfJn{ctI?xSM+R32CyqK`t&Ekc1_@+NyE-@5 z0^YEXxRCTZk-bGVz#&FfUpkP5>yrP_VqwiRaPF6-r$}$l0e(+2VNd(iA%Unth_Zu) z8`yx#mp*v(PML`1vczLI6AZwXsOH*kf_f1m*2A&)tIL4sK=q|4ZL7Bp=3&T1mZ#m` zw_In%LGwcyx_sxi$B&+1>)n#V-ch%|c$bG=HL-Yc4XlZFa$-Cry7K3Xq4(Z~rU-KL zvTYq(#)pqd7J}mIp~qkr$cAyE?WV&1;b83499Yv7czCR?E+$4&5^s3T>m*DbJnGCG zi>uVaB-*&|hG(OYQsR$ibWBS+V~gCxA*Dsd##HwgCoAE05H(0F;K#Iid^}j|i;J(E zWeFRE?j%ioGQGgv4!h!w8n$@c(cW}@N&$ipl7$yU65axMlIeQ28UF z8I4gb#o?bC+JzTe9^qdYBW&-{x8>Bp0%;W^-3ywF5Dr;WPD(q$>f}SZ+eCM&f^7Pi zIz#mJOjKxZ-yHF#H@;-As@=-QNll=k#lw+}(q1MJOtA~)lJ+;}Y1GAjPPMqh+D_#+ z$UBBVrl@hx^$jIRw(Oe&=r8BW6j1G8#VBIaVA(5Cl}t%)!gTv3zlG>ZZhd=~Cr_+| zG-_CLSuZ%}I#Kf2p|QxLv3R0r{!G3jSr&4&=KkIqPuwKTyP1(MT7E4h-}E8%-}_71 z`eFfLWVazm;8`tRn8_~Cl^k++Gd!_Jw$x1P)=o?}X*%TTI)Z5JW^wtWmsD+Lff=}0 z-zvC;3$=XT&){ME14|VEioHuRra2Djf zznMGtRad_NTzT>mTN59)T@22pZ)ZNCH@iJx{9V(u`_aCm#@t7z52)sX6XwmafQ+}q zmOrvIXu%%nN9xF<)wU#q$ywWevu@{Cf;QVgp*=9{ zU{Ixty)#B72hiVUt?})uFpKM85VK5Jwl^hoUa`3 z#8rLGh^~WaWD(O&lSYdg!N21I&U)kVU>Dqw zUb$(^AtXQY2s1y9CSu}29ld=&M|&*;@stv#7I3g4YSgpr((69;Y6{pviyxaOaoitr zXtdOeOv`i-Q!7JjfV1)2U{}&NW2{(NaOXPi5wppOlRtG?p0M>|0lZco08S!#gf!Nz-wrCzG1ch*e(7$SsfeGzrkA%w509V z+5dsJUVkw;5VisegnyL^*bDm7cxia|{IisJ`TCcfNTmv!S0C8jtVjd9(SF?d-pzcY zx{;+My2(Q!xb8!n*1uV*^LTG*_eaf%(|aSyKJ{VTHE@Miim3Z7v4+jj`bOu6sXsIw zw+k?*F~Y>>yzw9y;R1N#4)2}BK~sSivwC!dW8Op4@wRr(fN%69&1HVX`&k^PEIozs z0uWF2FB_m0p89`ES6nm8SF|}~B*bT86vNWqR0Yru=VQmKoU zBN4{nBq`2_XO?YB7hr_5?XSVsFap;O?-p6*;uqYNqCp<#!AS{|C{*1h=RahIzE#@+PPAWG2 z&N;1!sw9#!!ZJ6siaLD&Z|yk+X)V8!jiTIWmX*usf1Rv8bL6FVC?BVU-+<0g)dY;8 zh>|!q1+{~Bfbb1aApIp}UTlin%4Sfo2y!xs#*x9?T7WFJvi~`i-EyrjN~rAci$&{* zk%>i5c65UvJ2j2$DgRNb%>H_FmgcB+g#v<M(;CUi)~6nPJGTkN?Nt-WZ8IsqqVCJvgZiCDqM^*GoO= zOJIvC{?@s#=bb^PEEu1QUZ>YxKvv}jI9Ve^KMxswc#zu6utFKg>VsAy-e@+Ig%qTU zmUk!kuV?UdIqx3R))BsIG*78_p&Glyv?~=OoZ%6<9!*GBMtM2x0Q8Izg^c~UmY{D8 z%kp`?kg!|Qx-bL<4bPaL5#Qga-K4q->ae%j+2gRBJcSYn1%H~p*TU_qV$KWUeQG%- z4pJ<1EssTvl3K)+Epy?DhUp&3BrJKi&YQSB$E+U-dH_&Hg8+w=g z?E=hG9&>mmL4qL~o)7B{Lvde7_N_8i-~U|TJ=54tbsp&E$93s6k(L_S@oeSHBZ*P= zM98&|7@V2fl#bBo%{AsnoZz^B-0R0o^S4HDy3{(V`7w8^5x zso*eY(s8vXz0+rv03^Cx8X(z(|N5iqokJ@3sEkt1{Mi0cWKvNEfC*V=+k1&(uHb26-#leNJ z3Oa;C(oo#kPVvpJ#6xV)JpuG4ln-{h1S^nsIZY(!FxYg!9wsSTBfxXgCX|8y9scib zz{-DW8Z7^vo{{z6t%U#NJ+A$$X&fVl6PZ6je8Yz${of81Xm9+-IXtJ+t?6$+P)rjV zd(H+iC>sN5`3`UXCQV)&D+Cq$TR8~$J9)gz>G#dvJs!RrBhk0-Yz=%l2!DtLffeKQ zB5L6j^yG?vV1HosBJ}ls%j-=i3O5))U`X@KTlk&9*q#0PQ{wAmv2+y5%K(SS1E<9g zOx)hQgf&y_8Qf5b;5e+~8oF-!iV^fS*e^wCwn*Nwr8SYuM_UbC7HNEJ_IQZxL+zeV z-oNLK&&SVD_R9iTaat?@*;46QTt*FtYLQp=9?v$+7z4*kkO&i-{9UXmku(_amJ5SB z;e{tjnjxy5R5*;BOlmV1TOmUt)^n3+7H>}f^N)_kO0~vN9p%Ip^1gHC5r=S|#YuY< z;Sm{9!X^r-;dF%VIxXtCx<#sPy9Vc_5wcI=_c}m1TTs5Kru|q5J^O{Rg~j)^ko@L= z!SZC75sWJ?dg_rERxaIdRNw(`7_gLa{_5RI(Gb+ zQ(~x*G2^Csn`&5~Ia`OyRqGtKY={~bENs91w0^l62#dNOO(dKUdgwU?qB z1`c@g6=zi7foIvB?^jt)k+@I&XzJPcv*~n5j2N|0X`*D7iIFG^KfZ>6gDeD~ye(DS z&s8KYMNosXESPOWSU1Ek<*YTTpJ^F=z02J788Mo{IN3siB#Sk=<-@cdeqh}*87YZf zQV8=Gi8sF(m9}asXgs8)kVf)+9s)mP?52=oELzBKY%w3N0N%&*{v|WCi(P50O9Cs| zRIb}hPiJl3rRN_uH?y}ez7wlEUb`*L+ot2E;<_qTr%nE{co$L{835sK!%ZBeus00> zEJjfy9gN~X*<9eF(; z6Rbu)hgs&Go{Bgk({k>xaw18PhYa{?WF_MbxNdT5N1A?iR>`Obu23(S88FjjM{PP1 z7<%$x7pov_ewT8-xN4uPa=~F|H2l*>BE0Ftj$4t zn%nMn!}~Z~X6cWG^3zl`s&BvdDj7HD$zidI#>mU&p2|_DY3QA7FEw2ul3((cB8ZB! zk<@Z=3^8giMSiRhDVkY3MRCruzNovSU6X24qzQj6iNxsZ6#8Dvm9Nc-=8_(DCp%9h z-Bq~r$CC6hbfy{0sHDRBP)ROZ;shs%zGGfZIEM$n_r@_Y6*Ax9*XDbQtZK9KFSfv& z&LnCy$5lO}nEYzr-)w3snTVJ%=FRAv zw$705Xz{oHaP=kJw1Q&!9$zX+CtZ)lG`v?`857p-_+_sI-z!|mNisy zJb;S1=l;#QIlsD&`*k026j#*4cU}X}HfXi%o+_yc1)RFE$6wU4eJ!g`NI9TcEi*HQ zYHF^GP1Zv?P}@7V(P&zw2Y{<2^V$iq*Er?07^mOTce7_sT!wG@X`e-|8N^nsi*S(6 z5ruD@h!4`qLX{IET!uZDiw8bun>7@5G5nDfQT{!(ZLT)m^e zfUA)uqL3NyhTv-z2;of z8j7@tDG^6XYJMd*CftJ>I>lBx?A-m_NzddaNO!#Moo3?sMo9?`b51K%ibNbu_Xd zRULsX{kGWXBQ<#DCQlRWlaX8U7t;=9PfcvoJSv*}YBtS9s=w!5IU)9-y8K5AMuP$g z`xIAm1da_G;WUnxOCkosM!9f{8=0^Onr=&sz~c}SX09C9qoieQ^+%?24B0Qd%DBjA zz|^YevHU~Ti$bG|ras>Tv?jW(o}TmfR0=@-8Wohr3!WyfJWbx&Oz$*3X9WW)>)&r472-Zw zTF8(W7xRcxt*NkOiYBhy%ODnemUZ2v1nf`v+w*cQpa{g>;GCi(2o8w{pegR>!JyqLam>lsEx1d;^SdtxO`eN9?`B?4oyQYlWtmYY05c81=jAzgzD? z|IRg~$}JU8$R(YVlEgQ>p{-%~rmYo&8|1Aa?KG~_FjC$DMmC(qW6+RhLKuX4So zIc9;dHEDra}taqp=)F}SC?sB+uwP|s}MVxd3=;o$R12W7HGzFaO%M<>F$O6 zxo1P$L`UYF)Gn8Zh@@kr?5O2JKv^gv#c(`^st4{T%m5KgwMP*HlG=&k$l>>54y4c<3T z(o)Lz-F2Yeabl}&i@EXr({rw_kTt>Y;b=m&rR<9Iq&i646ELbqmu}-iWv31MqxTgT z94(peKbD*SE^3^a?ca#p7aFqmUqtRNip9U&(Nf6)1_=MCDCjb^XN412{=ryO`1cj_ z*?8Ja%QSY;DWFB{H1taF@hMKT=f!ZyeRLbf`~nB z@Kagxp*rr=e&N95;&2!bAcTkhF-Mcw(TyVWXc|Z{|Iq5ckvuO)Wbk5W{mCUA4|%|C zf|}j_=Mv(ifN#(`gWWUvf#eUOy>qxNJ3Jba)Z{nx;q4O1c={eEMf?Nf#m(g%_X~On z#mXk){lu6^`4AQHTyhbW`i|(T4lvsgLs3~_-Ih4@efU4q57ZIdY4I;GIxquAR`NZd zpk&1W5fLlt#eOK|iDjIanVA_-90p)>-q{?wc*oR+W&Dsqb-}iBkl>)RmBy;i-lDTH zo%Px`2$he;vXIo_lMsb7{QY6o3`Uenj_=X8rD6~vO1{*PJobgh6S3n~S{v|nWioX3 zI8auUz3mO;NC-PKq$FnaE9p7K{0JCU_Z-F+(V>}wJV3^#y z8rwLyg3-+G7=|{{Sgm%!_(3^-J?w#MUjr`63+<*Hs1&;V1ZByr(lLX0s;e7ymfH8z zqUpWkhTEYFF9)vP?F>wKZTXgvwGJh(y8|54&GwU9J=$XPh0#ppZO53{Vb`rAmas>k zbnDv=r*vS#Re4#7mHWqr5S(Yj46h1Jwi^pH-P{7sc_v*Y(2(PdCi$uUS_lHyaFISD zwUkDjYpfP56>MPi6wf<9O4qNV5?iC)V3;&`hig%Rq52FLY{ZaO2}Z% z&w48&q>AL7p2}f=nuXoaNcO&{_d1P_tVqb4QX^zT-UJ(ds{OkvVg}jKFn5rgjF}OV zodm-YYX5t#8s= zxU-=p28%fp(Oj0`&~uWS3VZ7%;2}M^{*G<-IA1F4rmzZVNWL@_*L}#9XQX;e>aKo+ zVj5&`Z>BN37ML{HZSlw-lxJj{boU9AeD-778_fBbG$L1iAvY@ZkJ&=wkEc5hNl8M( z#&z`bo*_mxD-J{dCmB4;gW~u(R!=)QLgN#?Zx7#MIc{#FRnC)Xv<+f{=xc@!uhzIuo%b;>a6!=>Mer z!%Cqm!U7NL&kb)XDXVEAT?%(WmXV%7Thy3hJVKT7)Plj-9aU*iKpBNQ@Vf^P_s50 zSfU5g_KP=q`ARmVCpVB<+Nh?Gm5iw^1S=V5&F&;ad#f-ZsKP?rRG4}f(p7MHgWZnQ zQ;Z~vK0#z=vE8Ywj91*MN0Yvcnrr`dhh zq#7SV6xQJ!qFg9J%L?X8RjS#XDPgsS&s6IyFbto_?+&cRuy&5{tVpP#ZlF^Qho6KL z3NC4$S9uPeFInx!fT;;F4#1#mA?GVFt)RPsy^y}Zs|u`hg~^lfv}C%4MXC^uwFI@F z`N{Wd+*+y^&85_|3c9!1=(ayi?K`H4#otxv>sBDR&xztiM1#vtJKA*#jd}gHwR|X4 z>b+4-V7Xq6>b98uqL)LF`x#mLY*-9bJ5z9xnw3tdlMB2CGYVHMlb+Zm&{|8Zr8R(| zsA7R;;@Gp=1usatJb(dZubeh;RS~_KHpZIFkqEt6!zh-N$qZMtD(WQl>*cvDwuq{G z9ilXKrh7*WhJv(+5Fd31KwJDA{{<_qINlE?7hXICm+t*$$BSiwjZwHz63k6$qadWN zQl5Y!c322zUtc(jiB>@${CnAVz^S=2Lka>lmRQS-B$7C|0QT4soo}(-psL=ktuq~I z*3eauRkA@lM63psi&9AFH;O27by9K#X{AyPS^>nj?tqHq{N$NR)qIFax~OCA*jZ`; z4Gh#!{=^ii;y^nrrph2G)$|St1(7Z0k|G$^Y7HQ#V$_3K94MGoV4UJziiNNcn|g7R z>Aa;V%_qDN90v7g6u(lrm|}3S(5*G(Qn3PeWW;F#sy0oCtDH@ZO6Fi_T=Z{3Wh|9= z6(VWs@esWR`s8>Oz#)2+CN*{(F-`>ZvS+h?%tiHb-__DP$ITUJWG)omO3ytu{v99MCjm+R1K()JrPQ{4<0cO`E__d3pIV3 znAD>|GCn>PF)v089C_Fr>)qt?i8((Dx)*^q;3qCFf-w}Psy2KvC5^QYN(8Uq>is^M zBG^-)qsPpNLn(xHU$2@UJQXo)(T^iagmZx?r3T6`T8}2$%1?gUG_rsS|J{H@x5)BP zj14WT!0}swPlQ;gAWNftbqLu6FtJF(w7TCD!ki{5MYKv9?3W*!m@~;d%GqtAnJX7P zmTFbJCEs}O$Z)in0+=oBA0So$TLo`uo*KY9Se<2l(IP7$j<3__?y9e^!{-fnvC%cL z^!Wzh@p~P7wEy&a-oFgv?|a^1^NoDEICxBBpwH_~eV7>aI6s@Xy6o-f@&TUtcRycl zJi6Qa<1&WcaMbDP_WtJA3yKqLpAkbS4cCS*6);A$7;3B2dq0h6a2>HjA%4mwg;s9i z4NK;&zl+Y%M)Jbe5-LWiVCwf@uIKObevSQcO-1-zHF3l^ZT)M+m~KE-IhF8v;>Tt0 z>&xG+r8EZq*SFihS^hm;J~wUr9|wQS&PFNDMlliIE0z250oSk$G_eAZFf~|CD$wVA z#!(Q%TI)xsW+eMW@^LjRankk!w8oa8ksz&TveyB*mfzyQgky%YtpXfN_6Q7c@$1cT z1|Q&D9ttMG&{4CCW{Notrd4PxAx^7vpLj9@$vy79$h8tsCc`WX45oJA!!BozT!PG) zAiab~J*2<;dKgUq98`jH;W6-0040(RKAl3CVfl*`5@IG;2El#kU?Due6Tl0gr5Hde z8x;C=IkQgio*R)WCdxm+N^8mOfvu$~?(cQ}Q<-jn7&hlD#;Ss>bpX`6R4eds(eVKe zsRCL=4PlvOX|Vz0MfR6xJQ^7*B7CZOEm1W>>gw_c9+U9#xM0OWhV}Jd;SlTom?y2>=*h*N(td|3Pd&4WwQT#QUD-U?@X`ahvJQH1T=(_*p4(WIz384p{I-R&6!+wGvwgZp3aTOEFJ*s(so3VNJypi3lT^QCHxs}c z48b={d^`155-0ij9&6AXk3t>b8!@x+RT*|`2ax+OAv3^6{^KI*%H`b#qGq0 zxWriINQ*7SlL64JpPUi7u90zm&wV`e*{&J9M(m{_DzK%%u(>MC?}}4?I^G`G&hxid zpE_F63gqT|)sU$}Y>Kf?*!`z{>Oh9XXb08f$xxRXK*rqJuQzyH4&d*|TF z+OF$2PN!qrw(X?jq+_FF+qP}nwr$(CZR4b$_dTb+=d1fv-BoK>?Y;J{Rr{Z7u4~OP z=J+Ly`VpE0cDM#=ll~#FyMw~T5@p<ZgGir8P9bt60MvE9esw;FK z85rZFWE_dCPz7z7b*^T9+r@98XtVt(%?H?-t*RaNJctYpx`jmE5Qq;mT3L^--V#1KBki9uce`jJ532y^R&Rcy|%+;vuEACav{Hn%z*@ zpyZK6x)o<)k3I4DxO1a-bIX0DCL_EyQ;vl5(J~%UpFKY%v%}zF+pS=3IoO;XMR}#mVDx;|ro?0qBO5+t(RUm}1bZq{@wy8r*@cKiA|?_4oDp5JX!ymlEuGiqSeN9M0h~TV_L`23NIF>A~=@ z;YP-Mq$eaHCU_F#l!8P=%mgwgv@i>d<)6%!#GeG1IIF!*mJx-c%Y(pfhibDrZ&Yg6 zBTY7pewg3aGb3j>aPCDp#7YBx9A~}=E?46m)No-9>GQx-GpxM1NE$SsTC_UYAi`bt zz%wf1qr8$MH%2^+Q-#O*5!Ox!eRmR#+!7T57osli*o=Vx>k@yJ*aBf+L?F0mjEP%> zWNGfjy{pdZiHq+xl$A~AVpY)`3eyDgBqXl#cTKA1dJUt4vIoEiK8y*(=om@% z=d7b;^8z!VX1bJ&T(cco0ygJd2aV_SQ|rX{aFbgOc;>b~M%&E#otJT`B*?vG#rUo?!qH@8APsR;nAkJ=)S>~7f(hAR*H#>{n> z4L!4lvDl=7tj1MwIje@T7ipZ}jZ25W(@YW#{9|5`)8L)3rjpN}!hyI9zI^k%9UGq7 z8$(!O<{acIv*vrzTq1b57p0RRI3Fxyz^8uS!e|&)mJYqLYo1tZ6Ru7=lHUF(sYoe1 zye>`3th8sVW`xSwSQuL(OEaikz3!f5Y`m`1tU=DgL2spxV&Aw!kzNk|6n1+xmks66 zQ+|%$3$4J;5qRjXWMp|)Z!>ALzr0#5LV`WV)T@No(};SgAP0AFMy47Ww?l{i&u0Wd zHAed{Ks?1p+<$l|WM%$W$Yy#5dglM?+N+LP60*Xz|BdR_9k#3$0}6xzj0I?+-c^tG z(^qZLhjkmhDoTq&w`GcTw199-58y^K2|O23bcm~8Ks89%!7T&2u9B6`dReP-|8TJV zI+6W&hAhoT1S}cKBPatFYQW!aQ;rJa#R=zU7zEsUv7JFt7&zE|q(p5DH+tUaAbg1?|7B+D)ajulc>Re$*%rbOkc&+|kUkief7+cZ^*>gP#zhN6c62`R)3MbCmoDxj@n#9f4 zXzh4FPz(11Qsmu0mPUn&_Tx0N8Cy8_?2zv<2SX!K5-C<8Q#PKj6jl(sHa*0g=(3nz zCD%EH3Xt!8k%~*)yhX=Qq9qJ!Y6klW`St=uUOr&~zs-Ye5nGvf15&L$ztL!G<7iAe66Q0W;x>6COUO;XYSo!& zJ4eo^>s7NyqOppQ_YcULRs5@HDF2MQODFQO=|;UnFsiS?CedLwsCF!vcv&a3f`2- zd>)q)=-5sYysZlSF&>^W=_q@IEZ)oFtv#e!IMCz&p5AaGrizDKhJ1nKv?(1oGSFYI zV&p};Na-5u+}_3Y{?y~N9)cU>!^Q<#W6cy5A%ymNsT-S6(u2jlQaH7k#n0^f1TC7K z(Vha{j0r-`l-y!xg<&pWwzRZnz>a|B+L>^19XW~T**=+3`uq_=lK$yK)dohx&QY(pNiSne^2)m#*metXNKT8UX_a@2FPOv+|{hyR<1 zjWAMw9wJ6^EW!YJPr2MjxZzQ-w^VnBxVNbO7=%7jF=t*7;}?A%L!Q&Zu*~x^(OKvA zXwt{yIWul&)m=T2gKdP=v|2ZDIg|l+%Kt+wX!WO0^=He=AQ1tpc--7`D2l+c_z&P6 zWRAB7@mccl#+#Vc85c~R+&i6)+3XYfR39D&FLAdQVT7FD; zW|5lR?j1l?m$?`OcT5SwoNa6j&zHr1!l2yDj(uwsD^(te=@s7jKuU$j_u~}N`xDt% zIly%n3;ZWU%0M&){zwivARZgy083c? zAunp^%$FbIsKR!KI-J0F@Fwz%nZk|DnInK!aj<6Wsa(ow7ct*(m7KXSFP;1z+zsPwZ-@xT;x>aSr{E2g_x`4R! zl@SKnPN1N9Jn~a@Xj=teq2GkUWIB9aY8)mB+lHedNsh(Jl_1h8!}Q{4(>aO1ZHc$# z#Mu^dw4R)h?`fQ}2g!1}cqlWF#JdaPt_q&g5o*mxjM9;0v3@7n7Toxfrl%K4v?_G)C2>4i7R7HHPoN8v9?MCPve(TS}EI|R?xP`VIpQ6g5 z;h&-wqeSqFM`O3ITOffoXYM^{i!mMm>f4shO4iK3;R`pWlGlcE$@>nPq_{!zPlbZ* z-#OkGng6R&9H@>&60$;lqfPFC3xbgvzGt_Ai2!Xe^R4({v{qa6VeC@3U`q;ElpmHC ze!CiCY=EvIklQ5SsGimV89c)(@O`qL-iLU73{Gt+XW?efPjzu5*xw#6%n7+n<8v&y z%=d6U*nip?L8XV==tHULz1zJ+pz8UOcX==bMrY;GC-QPfwKad8oj5&=$*&NGKLSXs z0#CB^05jr}Nb2?Au}e7)B0BGN`>LXh7mlAfUnHxv2=wG(SBvI?N(4>0LA`JMDcz4L z0Q1zh`?P0(d7D&2iir$Z)e4=or-?ci9Y3+jrXq}Vp^sDPIw9c~Bv%+PGCciS~V+ZR5g_3Oc>(Bx6xU<_r#uP&MzduAfC zrg_Tp;V9)?&d8z=m1VYE0fAI5{4**^q?r?PSd|lU$Itj|EV|wON?|2?e%1lO448eDd(qs-|D4UF!{Q+4S=|((56)>?W zaq6830_B2>Brz%Z!t(9X*>-v-vAgGZtUm+7sZF%eoO{GLxIskYW&_MQn&8xc1lpk4 zx)tyUkIepUnqJQZdKIm!n73V(iHd)q z?NTl%Ho79J`7uCX4m?}>JiM3)?tW!MDq7t97|IZhQSrI%qXShjZSX{J5aV&8%TF6n z0)7VcKUstP!&vRhmFevff=sAc@(qJfY_J^ip=?U2v4;bs;!8QG@rLc|HCN0j^8hzF zugL@Tpq}#k1Ou?aKb~5Qw@>k>TqDquw6WAP)-BUjbP10Pit(ywgfGaHk`IF@$Y{e? zcONx_^1_4gb~=)|lbG4}`Z0%;YTLbcg(`=QCyLN7v9hptxB@&H`cLqF@TH@EqtJiI zYiyaz849fG$AWQ_B6q7NA3pz>gW4`y28et!c7g_}F{ClCn{B~?sYw*>Tlx4(EhA3o z3raTgO<)hr4O=^xPZ&nU?T`WqxMzzyCww&e9fl`X%U8u9&FS@dN2J~=Vqw4PhVh5o z;@C_IW!INGM$@EL^nO?|c})8l(_{=9wXI-hcOo$}K1e-{j{TP{YVX#PKVX@k>M>0@ z6F1$U$s8eN^Lac2qP9#<8z z5+?)9)oDMR9*p&g`dR-z9S^hXe34qGe)Fu!VII*8%x8WY%*ES(vtF-oumyIuT=K7 z`zi~-Fd?MU7vQ%m6n2+F(wZ3TsEA_+W^jU*$aH2b3&b{JSIp9 zzbbUHQU3S{%_pLaG$&=83roRk#M$53>8odO$Gy*<&BEcz_hN4MlyK@Qnp$eRy6QX5 z!~MjrhakjY#G;DKzQ4BM!yYU?jPVNO4WjL%E!sKSI)@uN?uIThnO2JE8QR$%KeoX7 zz0{=@4uiJ3yeXS8x9}N;CXtDHQk3F1(opGjnR5kPveR1C z#{wxDO;iOgPQRe9g21b2nC`%cK{#As;wRor1?ugbZlV+?;JRP!+kUVFDt-yRkalo| z#F)&Uyt(^nEUl*KSgaMHKM>Ooq$d)hSPOr^jP0Jg8*jjnTA3<3kph%*Ys2&={CJI@ zh6>wt1RnUaL_gPweu}YUdZ6eK#Xs|b$m#jlBfMLW%;4N6=O%y*m*q9k-j%nBgN0zN z8i`3@JTTeCAQPoI%J9f(jiwSHT2Cr%f)Zeo6cTV6CKybc&d+#w9|*l>Ye{GE++A{y z+iChpG(M#|4fHx=$TLp$!`7HE@Y2PA0GTG=A)O<=&>1)tJGBTpS~LS|MS=IFhEtr$ z`<{)A@QB%~A=c4WhXu>5r@6~#i+fgC^zV%LF zN;l0uoFPb7=p~M0N|5U=l!Sbck8B`~eF1JtP@sV-VuE zlJzTM-z&A@6dMAPgeSH--4*HkaWk#DJ<#QTTsm>0?YR_ltrQyM-VQ~qSmA9E!7YIr zf}o}aY&~U_AXShDyikC_do*%t-N$lxJU6I zrMw`C{M6)72{d{gB#!M)J9%zNxD7>rZEmxwy@ToK+z#;O0rC7!JLh7!PEkRKWVepX0}>2bnIvHik@b+WHzQwd-IorB`-cox0@@4o^bc8rEad( zvvpJrlPIo^5*0(5uG@h)8U^62Cp{6#S+eWu&E^CK@e*AWM-;P7jp50}gopgXuISaO z2-O857?GA@-PEr7j+Cyqp$4kU$90@Y7Y*ElXEPr8CM;i1YgJ*c0otfKe%dJ>jVB{* zj;S~mnkMlEz%|0OJNL)r9{gJVM&I$zYt7u_M1AHxuW5=_b_@LUD5ru1&y6<|D&hpZd2!)k|AnJ(FKY~j2spvuf4Cmr$zZ({yszkq{_ih_QtNMfe z+g>>{M+L+zwvE{IIr#h&bAr1e@wH`K`aR4c>U$0uRBYRs@RS;s_FExJZegQ`&WR)rTC zb@NuwKCa7;)Hj-5rkohQbiOz}nuB@vygTzXvgna3WTsn3sMa!RjI_%f0z+Y@cKb+n zWt7^gV)|k^J!lfLvgS#dpN|)gO2)&*c&AIELhG^1AMd9Bb~E{Z&NqVo z6a*00^#=Y`8USW7JQT-2QD&_JGL_6|$dq{tT=)bJ-Da1SGxn6s#C%QJ+StODnNFN} zXrQFs#lEXhyhahKLAiM1{cWZxnqmIYS&^Ki__h@TkA#x-?^A>*ff)2mRdN3 zR;`~-+F68e_TW+$Ev&a;G1Gr?|m zY|JrgMl9;*V&c+1*zobWie}2#ZLDp>bH*giNdlu*R3anOkqX>`h7f+(Q9OW!vKp2V z6v7>rR8)O9tHVv9^X4j>Fv0ui%^|6oIHPvLE8i88y3j4-UOa4uAq2yr^c|M~s>v z#g;XRUXi9PL(+CwZKgSB5>-msg?iH8Eb8sOB~*V7EniUe?PwF)pIH-Cjw@3qY0kpT zKyP=cE`D;;J6r;4P^Zv$_2;#7?z9fd zuFfNNiJS#yJH2ol@N|w{NyTmuKHr)OU30ebyhZ=UTF+F+9i6U(Ra_|Ixp@4++3_P{ zCjLa?!fPYdp%8AMq5TR%kjfPk3SPMgh}XhdvJW9qX95A6K|%w?A`=V&hcd8%Bqv)+ zCG{!8B^4I?ZAAb>9yOAB)}ff+wd@9QRloOxbJnicU2WHcS8;{~Yc2oBmOyAb&-be& ze;Ai|i-6stqb8$3t-N4EHt*fh)3?v8oGY37aPL}bw4xmIFp$*(M<-LqQls8Zi^F!C z@NE>(n-k4oG8r8zA!BeoqxndWa;~<09L#TXA-*@0DX*L&%bu2jx2Ygk*_RA_ghLH~ zVx6?o05`Momlx@FGAtJ-;FfRd=}C}A2y_B;ex^4FRBE?1CEa>~cMPK*KcrA2aJLoE zHVp7K4$wA^zWdC_5YJn~)D&bEE26eR0ch6>5lNg%9sEU}&`$i6VF#JX+(NIVQtCwZ z{tOM-p|#9-UpCqs8QDr4IT^!ID+Xp)8%X`a)rGa?p$E7(md+x;FssiVF8?FI@KBK^ zz^|q^m>GcURh?no@u2>v4a79=_m4+`p4|qILU$<_L8#8rq(0xTU9VU*K7e&?s^U07 zZnpH_1+ueoT8k(=@7JL8+ar(vRHWJe4=>{Xzul0Yp6$QcR^Nkz|B3Vdk9)hAwK`ew zd(&>k|D8=jSI78wROBz(N_6E`Piq9lB2;McTIKMLP-r&vHNTwUd8!oT*=YVu#Qhby z>MtMm@pS0Vcb-!c9Nz^kg<6KLk|0PscmwapjjrVQV7~7YV$_nD&~v}GkN7ZT5H*5}6h>-8XA#8ukDPUX&;E+#VoH_m940oU zy)FB_?F48s+Jj%fDkb0jU=OG6kD~=zIp1?ozEtwdKVl~rjY#@ZQFQTHU^-_%21gNL zV!M5&(wW&h`+ypdQ$TKF8G16N1kXwXVM!WlQBg2&iT*GlBaLM>H-fw)q8Qn7buUU6 z9F$$Ft|#Zp(LnJ2e8^sLGwUh+y)p@}#VTWlSRH6UlgK4tifZ_=hev9!dAYYO#P>P3kdl>~ai zRBbqkl?A5|klfT;^OORJaa*@)Xir?{P@mV#75J_L+-AaMr=%>;+r_x)kE0UF#*S|c zz!INaTA(4miI@wcI9}$Ye)f;W165vg;pG;X0-Hacaw_++ujN#h!)TC}!~ShlY!9;R ze#kTq5?*Cn3*eihbp(FM5KxNkx(?MAw7~b>S72v;RUZ*);so>WmfJ9bS22&`2C>TX zw}nWT8rQ^q<3X`ZD0wNcwe}0(I-qe4xNal`!qBUfTOTc^4TFSu@>MD;lIRxsE&>+r z4XjL^LRJ8gzvU5tUDI`4P1J$;1?mnPJgaA9z0#~!OTplxsF70?;TX})CtX0#n-167tg6@@ehPe7)p|@BbplIZ$atEW@j4>lGN`}1#6hIt)wy+}e*D@gU z`+^q{6k@4cois3oSeVfo5zesk^z5;yrL_J;h5h7Sg_iHZOcTjuk_?a##;p@=6#?Ts zG6TIZwda^v<5i@?VLH3tEtp%D(0`IUF?pqrss$?0IM|Qiwnb?SrK+ScqLJt&N@ndK{Wp6k9QM6&@D=K6`o%xI{GKUWDL zng-Ax1Q^WveK2S_XFal0d+?0AZ%TRx#8Y3p#Z(&PK{kck>hY`<$Z8a(`Io7hu=>d< zEA!XDf)8v$g+e#^%5kIn^>QS&)!exyc;~!yU{6{cCjnfOjw5)tzQO_ANoNxSJj|U? z0F18zXlK{~TzWw1sL!$yci2duyFRZy2n_COWyM5EIrD%`Wy1YfiV&{t_PQe)sd-*>Wxqqjv)3g6yMehHlz5FFr<$C%A{7=s3L&b4VYAMceN(H#GHpPpXxr^h7IO6g#hMkhegO!VEG! zsq&!e1HqAhGU0V<^}zq(sL=HZuP{U0S{$j2bkBCa;QfRY%Axh?!Z66L$E8)XeE{S4 z(6e`z3`?`aEu`nm3-thKjCHg-WnCbG5aWg(^e&=DrS+*n{K@@U;K_^N`KR^_TU6N3 zp#%8#Fc28U2X@7jDEtN-D0&9AJ{b-KAsV8qN5ntuQjvAKZQli~lzu@F$^CMh`glUj z4V;_9WiH1L279z1c|qG^k;lbHL}}RB-4f-ciSx$F&9L_vDD269@2C#|eYnLP&9@?d z_uZSP#VA!-c4~y))H*w^K{pwx%?L)f{Wn0nfq{OwuL`?_es6{giw3bLYA0Dc&m7fT z|F(v$bUHm#QZbG^U>2}ycCf~pJk*?U36Z|O_Ra3Vz7a{A{- zw|;7LSfj)W*IWIZmHsh>TBmH;t*!dc z>YMn_>Pw`)bxWA8h3}=7p*yV8^xc(eHCdhzZ$poNbwoyTbCNlq$X>RlBwL81Co{Ke z!QkvthCoZ*TH9GK^b`Z=Mge@d&;+S|#{t~7gzv760BB?<VrxmG%JLJ(ftpQaSf12Z|7)tKS={EB4$u5Bv0r^ zPnU-nEd`PGn}YzSo!WZ6JKP@hTD8{QyZwYkbARO8duNo9UaFe+)NOHquXYUi*$5qTZJS*ralJ}O!GJtsSkQX9z49AQwBH>$cgb6-)j z)X4Nu`}D^373|V+)llW)qSOE}xgYeq5bD&J9VV^0ab?+m`ZFp1DbZpP9NsFuz-R8^3`A6%AvE;V6bA z#AD+^Tt@rN<@+lC+5Hv4;dNN_=jEzuw4X5q$i|c*xH2p8iFL$CCMwC!jQD3@z+X9w9UMoyM zmap79QYyy0@ya>8z+0IO=K(dbc|O7XCy-Yv$$=C)eVuIkN%&0QI7448L!xDQ1j?e;WI6+m{-e4 zqKN(}V&QA+SZVg6YvVBk*lN?p8K>eZ^$ta*7!t96=pkbtX(q-IngYApFOLKvc(5ug zYm8=&m%(vgZ3}gCwFy*QRF>O8F&6^5AvX*#ux`f_onX>M`}sp@26%7e^NV6%Oqg%a z-VF#Mn33dr&V{qao7b4pw-mm{V;d%LznRQwmJao*Gc)%SA2D%0bXsfH%f?PBt8K(( z+T=!3W5ulfdP46E{X6bWCos7U7t>VnngSYJ%*C0%?Lp+9a%*|1GTC;26z~{!kxdq4 zf6B&~2}CYLGvOCc{UkK;#0dOP%q8*Y&B3fSO6&3qvK$Ai{Ui3`o z7%bTxRhyjbY5cEaxTzJ-vkXU{*L(jaod$2b96@9>dLpkW?Wpx4B%O1w+g14A?^S|k zpGyhaKuM^^)Q2ijZ|lD0saOpS9RrMB1%YWE0YavN=$L2zz9d-zjFJyW#lRX&9f(U%+xLKmu=-9)$Q{YMV z^-QL(FGQwusI<#{OUy1qHsSliGNR>;JcQ_zLn8<}dVWR6W?q7~QOwWTn*FM4w?zq& z6qkW?CM6DI0q#^VT$?);kua=I&Jvz!+#X@lG#%9gN9(VyW+L19SAyp|i;-K!4Q}cJ z3IfV>cQ-AGpOT!g*Po8R`%t8eUhv{4lDOO=Crq!pgM!`|SWHB}Np0;z_hOT@B zzTb`bvv(PBTYv$eDpO<`X^vF)s){a2r9N%l0nQ13i%`@_2le9q>)z0p| z3CcV@V~2rQIN_#>ZzrnCTUYDt0CcFZ2+w5STp$oPaIgzEb&fI{{g}U}JM$6VDT1W> zI}0UfwxH0n+zLX_;fp6`f1B7^YMDqx*8Yawy%e#9dG^VND1V8+Hfnk)9fdzu-)9q4 zx{P;=Yb3Fi=qLb8*leC|b$aO%E1gt|red94^jl(nYK8%6O++G;nI{-JSzI+rCiNBm^V>MW?Uf_lHGMYKc2-3C zus2ma8_nhXU@yN3)g$6?&8J+HS=oi#AY9b|+B!QXT(MKw5HyD?-4*L(+}^<9jZLR* z17d5h%&@o{j`{*MRpbXegkn=$d(SXs-x2(<&Y+Iw8WT`NdHW_)URi;hoqvW{)S>}y zV=_fwXAvuT#aNCeph-==H0&w7SbVmj_v0K@ZA)33cP=5fJ51Y)+S2ROYB#X%yw2fj z%?bPq%Tq$>@xX)2x%EuuG0OptCmZE+Bb_Vzh}Cw4t2OO<@V#d66W3$kCtZ-1MuUjP zE-0t|?afjXJu+aYO#dmk)_DOV$8bni;QSH+DZY-`7$U@gm`7vLUBpWm^H%m@F7CB7 z@Y{+|7#;zvRt7UT?GvQsA#1!FZGX4$=alt9^|$C!y3ODTe&8=hZ(t(zC=TNgUhHs( zL`4i~IOm~cb~lcF*x{#GXwDBdT&E4Hh{dK--@?I$5e*9IsKACSg2wkfhxAz?= zaFW6%8w!qy6np86qo{s<*ox+4xv>Yuv@_SRWzeZe_-q3VV!L(ah7rUeHa<*dMgdbW z(R58Qmr7@Bz>xhpvL#FbD!sF2xK#LEn|D52^E|{3ZG72+C$|H*-s#<^rh?5atg8pOWM!h!C47A?iwzFhI%utGUR@3mIKXU?>Saqp!wOVggm^;@pI~xm> z!`}E1uy-jS+iR#7jl;Gya}ENmg1rUu)PvCsTGk+yg0aMOIEZB%)N-c}MU2SuxyKjl z1e~j}7WpYmOFdorC3EQn>kQr>aL5MgN~*#a;N8zKiKqj9h8@nY<9q7KQx?sc^!Ip(`b zeAELWvZGi4mV>!oqJpT>n!>pXcVuUUng1f@sM@4`$dRFHD30l^#mZuUfdU25hAHK+ zjAht$Q*MJYlGDB4!U^_3hmD$t1|}%xm?3>*2^J*vqB0`voF@ab+?V~*2`ds6HeD2w zISsc`$*&U>^TrXbz;S6+PPYRmO^Y+7A6$M*6bL2Z&x=35l{@$tZ5&Xi#Ft4qfPJGj zkC*9WuKlV_s;o( zkCto!s;u*daE&EX)J8SI&NL^pcO>B|o}V;vSK+x$B4*JtZ(y#X}I8a5K zl^J*2KudmM4dHav(#KA*gr*984B$%}C!JE(sZCggF9-#n*!Xj%Eqa(&VB;+-Vz)|R zAL6<1OE3Nxkq=Z;k@`&Z{b*6M#3MbG$u zcP>XF|K?5{ecKHR{_b)EI6y>!_E|)?e6dQ~O6^9l4&%3A$;BJnADSr{`FtS?AsZW_ zqr!%brmjt_{SLe=gS)*PonMBfdGD^G79N6%cHXkAhe^PH^v#{YrH9}{7Xi3G^vzu~ z)ivO&p7~TcneB`|EvmWJpaB2D{!^8NNV1>6)4++I#LRzqz@z2q^%~Id@;eRtHy;?G zlF(%e@;WV?&`B8u(t*&jBIt`UpdEX_`7h|cT+ArAs(rIz2H@H(qxP~qC^QuofwTnD zl!T5LuV=0bdmzp-b4|ue0qlg8T8Vl_9&O2MTXuF-ee{(^{7^I$^vcs7OZZW^Qj1*~ z(N-)H$l7CCOFa>GqgpHYl~u0OVFW)J8*Pfo{g!Jkot}J^c2rVv$s0vz)Szi&wK$|Z zGBN&z8*7WbU9xbCcVoOgATwi?5C4SAp_)NETD#s-p5zt=1?9-@o=!$!2N6K6OFC)5 zBsW0XZiu-fZ$Go{uzYxDblTrEdx%O;Fy%WbPR(4p4#<>`--763g*jC>yxaDxy@eCu z^{qWxv+(&4X@$I{OvN-R#gU&_2n$8R`kp3nNWWajWrOR0uXY!~3@|c;EhpYCX9>|R zV~OCc28CD&axDY5j31r^RGNmWl%nSh1P3W`a&-d!1|i9i*?`=VUH!uQatbVtl=rZu zam)d($pzo~HEOolO4ONR0h)3k}w$WvL3&3`p#fDuRrdkgth-yH?6&@ef*EKGo z{T2o3YoiN9i-del_U)-w*UsAE5>nAvt>5AKvZ@Ye$`4ZX(&#c7j|nHkVJc`RMBaWOCBY|gy1no7)h|Az?S~Du&9rz-bJ|pad6CSk zE5fG;a2~y3%mlV#)Qoh#Ec9r5hIuquf!WgTB*`gvVzW&|NIgDEtFVC{EVjB{MMx-% zO)>=gxd`L)%Al3L1DA8Vlq)DQV;f!^2Mc1bsB&`Z`Zd@k+nui1kOPZiOt?f|F&;WG zzVLl>MtWV+d-_myuPrYqU0KaYvm~uy>l|N4%Rkh0PZhevQAY0pBxtitKOG!#gO?t> z9C_JzqVe~4`YXnsiSBUe%aoqG*#P=AV0pu7f_ zNHLpPKq`AWpdE~t0vnNAOxCyuf4{bjsZtK`!UhpNd7 zIUlRf4*?uo8eYkvHue6fG3SLu`MFro^4yFdJ*Pf|xq{Fh67VRQSt)pWvf>pxzDio1 zm+~V6NX?THi+6PCsyI1qmSm^T$qU%pHn{d5i}k;Yz^7;UFSqW+|MIqv$nSxah~;vL zy07v7X5eRcB6BaFIna#Y7j=4)%cjn}yJSqzz=3?XVE5p?c;&vIP`2U~1HV*}y}!a; zUq`z>_s{NjKW~aX-+&coL%ip2N{3JRWG{X^UoPC-PHm!v4mxkY)p70BarKF1UaX)! z5uvJeg6j!zoYN85y*V$tm_3iscd(8>rJulj;e6>{bk14M!=w*-E83tyO@aSd2|hFS zt|OqLyjwC~*8#^b^RAO2>}pua57QVvY)dXV*9!LoP&GwRV-OI;>+)FaPTgK5+fXGk zjFgp#OIF^dDubc;DyWF;+P1`Ggw_0&>vZ8#jrj{UGoWcWBrmWqj#l2=(70k@q$xQt zj1INN(7u8dCu6EtX7g}?E;%J<=j^1~4(Ulqs-P&YMj7Er;MC-2v!dMO&&1l1l)H*O zNnORp=H~P|IIvEPe%%#qCqE`OKud8q%IyR%!tLXA$8NXc5&_L_%0an^h~z&5X<&hv z-P!19_LbW4<7hfq#;5@PiU7x!0LLT%_Jn(sS59wOhdfy%JXIv!lA~&wPXsjvgs2(&FQ#D60W1Z0%4tma3EbwoHgnXfU<=V0lt)&j0Lwe^pN;O;%> zKKS@!Sd{xlpFS^H;QJy2AC5qeAJfhujda=BJjtx;VwD7r+-kI4_&jPfQu~>bWS`52jc*ehlX{r$+rQhKAK@>aTVwinb1xnu?Y|S8 za@uI+*|RoW4VnG-R7ln~)lAb&hyRLoI*SOqrt#UX95FovzmhPI{E2CGgJ!E~yU1x= z`9F%NtVDC;&rpqn#XJ;^n|lK;7f>IXUWwFQn7V~xAIH; z!&ArpIJ%|KP|sN^6t>2zZzlIviE`Xh$jp4s1F~75P*}e(aemK_5q-4&=1&JTnHd$5|ZL(=FQX zeWm%BOMTt4BmFUmXYf=Ml33Yp*|fk8FE!A17Q)n@>l5kskGj^*jWFI#vz!LWNuT9E z{!0wcWMHt)4!T~i&-w9D;_TgLDOVFIS3BKLuf_2mhgmbu(9NFf9;;sgyBVSkF4shw zA%NvfJxD$MKaQ|LnbuI-)o%|l)OSXsS!M04lDM4BMcjn~^#qNBB$29a6 z%949NS=c6gQr7sH@x)0@WYp2W+#g8~iKK`|1Pag(P+NXkguRy|I#1+$lehEhOHFN` zd9XsM18_1SHFA8$j41_ge_-|@N7Je3;~C3=|FNDeV4M9`&d|dZXNf4mVC+?iwM9g0 z(c5~^7?4LpAqE~0{TfV)n`YmdYZ>p&=fx-z)G%c!H5!I+!myF_yA1sJw;nJk$2=vw z#@{TbMy%8zh@To{8H6-J(5GS!p!BS{?4gQBEFcN-@;E2t{WE7?dwd8(*<@u`5Bzx; z9?}`c$T?}N(pQn`h+h!&>bDD!oAyh{GrUTTR2#SzLQKdB?@SV94=OB*MEQ(euAWjt z0W472l60@Luj=JJxx21{mvXKv?VAijZ&w}}%LuTF7*xOa@@pEvVig#r0r|xJmhsun z9C1DbDoF+((-GD5(BgZY?-bR?pf^&+>(QH}>(PKtDU7>ebU!IIjI}(z9p$j?2}VL- zln7*{&SDZpXIfy!K3mYM9BFTutO@D+4>x z`X5o8m-PXPMD9PLcrmPq7ey^E9WsBWfTffWoPA0tUU!B(ynJK@YlB*8e``Zh9emYq zY3rtlmh!}2!2!Q3kv1I)XT7`NxWE$Ygc%X)*vrhG$z=`xGz{$DcaPG@;ouWo9m}&O z_XBlq_zg@K$s(#gaxCmFdQs^i6$D{*V=-fLJCyw6->SH>=-qi-V*L`3)-x-RW%&k- zGpuQ5V8~3;^71TSt+QfJH6fZOU?49F9h=))O|*$JfIkhurzOCIBh%Z8&)C@ zt|5;TqBed3xF_Z8ygAcls;uF-Q3q4#n0-QZNNbN&EzXVFOj+^)3&Bzpl-0}f~XP6ME`0`+#71Z;kw_qPz+jlb{Z zt~uGEU4ldpQ}+lgsg;Et+@3-7?R6-Kp}M}x>{kJ1D1K%HWNW9JhQ%Jh`uq~1KYSoN z{KFC2^E?c4DH5eSekS|B2PDn_TbjOPUDVm@>7s17Ao?894es|j-0I7L6xf4>iaa#b zZHnbaknXj+J4~%&)5gA}YGun*RM#A~S zQAoVAWu4?@P+xTv0AJ`2w+UCChi6d>N2~>cKTl~5Moe?_!LFFl$~q~G+8=dXZ;M_P zJ!E;)7oK=s66^`^96D?8Zp{>cy}+{OUtZVZ=m7@t{=`4~&S}pO@)kP#c4zs7-#BC3 zM#Md}Cw9H2t%r(!NbXU((+}PTBvIYGy`Vnqsh$rZ9LBIBse25Xho|0MQ0~}-(P`E~)QV=1;6X9S?_Cs2SF03_ z!^qDx3WE@>u1+3;hasf9T3`~-YE5oM3}5%&(2;TZy;&3rtQ5){di1DoBWZ6#S}7;} z{r|A`&cT(nYqW2ij_q`uj&0i=+qOHlI_%iCZQHhO+s;|v-us+7`_^~Q`RdlKxvEyx z`g_f1&i5JPHwITd&kG}#88O4c$Q!hEGx|>XU$Xch*M07|v?*1%2{dzTRS~d+LPAr? z*~!W>4%!omVG+w51C@G@hBGPY7UzgkIWph|tV!PkWGW}q;9S^5kA@;`A6iC%=p49! zTp~V!c7i)W(BVk2unxSJZZgx`fd!!JO&9pf*EW@@I9)*dRzm@8zyW;+;fKW1HO7DB zp!V|4d}&Vsf}!Dgp0`jfnr*Oh{2V4{14!f8$`+1u)oBUNOyn;ol;n?>*~@*|YCfp( z=OdW$wMVzi&fZnX(`;Q$eJv?ZR6yx#AOw6JFup`xkiG%LKw(y(+2}tyN0zG z+zap%vE+QB0M#H>1fQr^h8xtvqD-GFjRj?9Bv}3VI(yACr5HD*ZBKNsZS-sP_wb|= zXH|uMWoi;!RgWd;-mT401bTD3-|Ju?_Piz3Ql&I-OC2m#T(hQj8u5j3>l7~1VJz6X z(wm4qzNMcL@?~9#0371`%rj)o@RVR+F;QCGCnpV-0>naD}vgqFCU;v5+{q z6+?!(G0~|KkWB{BHEc|HWFd)-JGzbGwi(}3#j~0smA6FVz=BZ~dH9*ovl=^I$etL$ zjjwX@^RRFh%I0ycuB9E=H<9`2h6m_k1`kLY*&iOS=(A>$h-R#GL|&6iqy1L(w7KLS zCWX@h3q^LMP$aKD^^+#Q$l2(5@cCB=0WpMBVyBbScx5(#3Avz znM>eAgjKPoTqP_cR&$m%9Fum9rgiq{0ly*h&C}zJ4QAUG!?v-^n4>sdyl633Z*x^% zE!()Zq3k%QFP2|qnhHt^Y(*xX_$6Jz)1dDTf?^aKRbu_#d=S5^+TVVEcA<9VL?##} zd>OItr|L`bvcGXm36_Dr6y1L%Tn#mvb`DLgZ8v@KYdTc`<sshC&ND@sF>LQYbI}~OWFQwCja&3iAHe>j>(H^26NwNW+Q@N|Kqa2 zV|niLgY+SJrX6|6KFy{EYg`SP^cH2Stdm?W=*tg!*hiGd>rl7r_HOC)L*y?6w3PdJ zJCBpSY{vJse3<5q2;5XG=%3Ec2T-;RE#eeh7E1wuw16~7PSEMji@Kdgs! z1SAnNjHAXQlI$id$tZ({FA+&Uoqc^dfr+8B}MFVW8Ozyb#E5o#?0VPPu9;8Gf({5ZO_qJqcxV zY=L4=adUF%105;W5Bd9nCyocM$zhkSn2vQQNlOl7e@Qo|%5${CXvu-Oi0T>AgwbvW z$)X7YA*S;R1_-v|lN5#IO_^hph@u~BUo(H*Md7H2qTgK)+lv)#znTG-RCd6n>46+N z%nBe8)6^_sW+GOe)T6`ahOoOyWjLOID zY2`oCX>&ywg3kC=P=Ei-Lvrgiyh0*nS4j~hL-F4MGpLYejS#Sf2O-ugJlF`u84*h9 z;WQLV_(iVTF@`eqWwahf3U&R$72(WiIuYv(#$&rOOKr~^W0vEa_HN>2LrKlF@8arM z?nqm%4|8D8?zJ{O&p}mm;gC|Awn)+#lW6(;YpO%Sb$weuCyLyBgMJC)W#SzlH%zyi zy#o1rI%Dg>Xgf%lbUmVUP9^rMatGnt0`DU25*yD{)XHx42;!=Zd5c(Kz~uJ=8mxU8 z`ulp@=#JOl>D#?)2Z_J$J>oSzbJm$!o;EyW2KmIjk##@cd2tJI%U@@?mV140;;8Ol zM5)1tcsHhQ9({JiDz`bTGS-fOkqOP#G}(Ud#Va&~JfxZ&U@FO)t&dO;+H5LBl;83A zmzc_P;7@tf6L*N?sEpvq%_p)0X<{@;WY)34#29+A)hnI{?A?>t-40{rKSnxZ;{p&( z3p=2y4NJTD5|IGIg^FaOZ!&pMOjxJWnXts>_p1S0$Livg8g(@E@lyFquju+KO~sC5 zVfCw*iX7uyiR{mbfL4x!?9e}qAngf)p4QDT!Y=NEfnS3j#laN&_p{nS5mJLVtFU3NbhRZhKv+&vB+c zp!d%MHAD32p_Nq+V^j2Ofa?ND#nM2tM>$i=&d@QeCxYR^ZTf zPNPvJv6MVqv2u)}-AL|BU)75d$xoX|*;w;RRcLB?FmQvQp^6qa3zz2}rpSkS%m;I@ z0}^c-da^_>2>ApBq{t=n<5;SH=h{6mqE?l+>byFYHOueSG<>o8AsG7b^VcQG%b%I8 zH5*By<&Q0MO9h%ZzZaaYjyA4+!B;3iIUix;mIgG5zRgVMs}t*F<&78w%kp`Gp5XLZ z{q4m5XN(go^M6&yFZ{nSuNeTt0HZ|fiT1j(PZyEMN-YiF52g-&1_rCKe8*=*{M1X$ zBCdo_$0NcIrKd-hj*ryJF7&4?oi==*9@@tlzcU^DjJXb%9KcrGWvyfL(^Y;n&{2EN zNfnw_QoSG^aGum|J#*|zm&K%)UzN)YnS6F6H4tM?-JJ62{7h7-UkEGZ0)CwFr!Jfm zwBrjX3dDDl2jPcFk;)vNeSYu+K`|@o*GCRqFegDUa^8au1$|AwY;r6a_mA$>AVry0 zjq7}M+;PgEmyp4jVHO3`DcpK9g=iMOl>Xf@BZB2-rNzK%8!l$i7o8O1Osrz|P|h7++&0)z}Ri zk8d;Px&xk@7D)_k+bborX{zdkD>ReTkXWpWs7yxW&^ClE`EHnN;oPx*$Z<5D=IkZ#19>cq}rpkWQu-MT9peQEg3s|wLcKBg2J ztQsg#31z~gwuxC`;%-(%vm(O19XxSvO~QbHA*pb)!=Mq@#sYHkkkWC#rCuqjyPyoo z&3ME;dnlLiMaDry;CA%~p|+FY`viaP3z=0}Ph}#QfuBa|vT%1xM8Ug7&P%cvm077* zea8v6^iMZA0K)UbmRh{N}-;YGmk%bJF67#_09!yldwuBBu44(lG+5q;zG&Bd$;uB`plAu zEv)82z7TiS5HD(&vBK9*J5*|t^YvQ1vC<=!%X>Dv=F}P~BSZRyu#$rt1>teI=4v3agf!^U3;LY`#2j)PTdo%LeNfPO^+B#^b{DH?F zFcpuPnI(XvXfx4BVV6*yOeD`=bm(IcJKV%P<#EyDF(l&NVLK^2=XuEZ`Sc-% zPaKEr$SJ6G&|#e6Muuvx+JlFNph=M(3ikd|+%u|W=k4(4~&LL{rgQHdMiH|*s`7SIY%N4X9 zQewlRoPoOW3on|;u~%`uEnZhDUIbp(B>aveS@wuy)KiLsz2G(ViR0yDa^>-h^2@&q zo^QXX@Pa`^Q~xKV@fS5|MkRk;B3hWU85({nHlzSoN*|T_SUgh(I-LRON%dBzQ%6+i zo9VjgkH=!irv|3cN0k@*Zm=w0R=brNWY@Wqg z(9Et_Kiv?nV?WF)iwxve9H8S{^E-&CiD5nmHj1o7$ft^JRqM>2!?nO~|8SHeX^Xh! zbIo9_lF7x+aGruTIMWni?^#55IcFVgp%c{pRJ@7#O%r`v-V@y)k#!8u_-mSxzwY3F z=iq0pdKC5s3{L3GD$E?Mwaq)6Wviakf?OrHqM_5A;zg7g3S*TT2-m$gPTm9WiN0vV z!yTuL%jQHPAUHlon7lm3Fs?VhQu|aKj4JKdLG=spG12lOVH$mc8hcb9EK^oFHd~2V z$4Y3|Sp{2`S;?A2=FmoQz-G(yh%zC7mXY4INxkgTOa=mQVp48T1*j?v%yf0CHL@@L zOfw{{syT0V4yBI19XruibBC;{>jOZ}*5G|f^xr+W82=&n#q!@vZnYLbd=BEo2iiOE zj8RRiIEX(8AZg1KhKdPSJa6X5re5C1M}i z-&cm)ORr1U-PN7N$AOvmC!k=22{>hMA-X9hb_MC0GkNczs>1=`8v_Va$>{-Q4q(Au zQ9kr8=gk=_z^jNt#$YD6v_H?|Inp2Sbl}^7A#%h~&~B%?uH98mIgDfa=64!8TkdTM zibLZE>d~s&u@bp+%ce~m?5x%6cvwT-DDtk|5@z-*tfP7{JT{NK22rZY!I!VLeb!w# zKkz@iiFAra+h*ZR7ig9P)f62v)ZuoNkUEP4*H#a)g)Qc$sZnVdtVN+piqbOyq}mQT@E{x4-DScsMZXyMZm=uLF>GySa0#==oyC;XVp)C zk;C7(&#B3+qnCRSP{;$j5K;A{(dZCLOBq(KO_+$Cxs=n6V^vvpj)+1!Xkg(%qMk9A zG}DVBhN?@12mqs9ppGJ^Qj{BhGoC?b>2|d$5ib=??s;Lxz*pU!xzNOKkE4mV-u;7j z@>(q9UUn4#dL{-6I6SJIIGuLXOb zQ5F(e8UebeEN2#U^G;MkL$j;&>ySCvl*EgZd+`$C=c)t z#Db*$UVk=o!-)Si+Y?QqsV-e`RC}+g@FXdVV_sO9qu!%n^UFd%DqXz-`Olv*i8Y0T zG6Cv;fmH=&V9gvC9lolcIKT)YO@D2$fU7V88!R;In)(TV ztjetP-_3##>%u|hTZfUnF@g;{)lxA$dZGjlK74X!H=T~UbA#glrU?{ZBnzDV-URf` z4gu)E8mM@Z1IQ_SGd;8?CNO%_?T0gyrw4iv+qmGs?o7IT>2na~{oO%{K(3Yx#0ZFw zZGDJ7I?(2*L68rUFYqRoS%yrMuL`BgvAAc(E4|{y>TV97%ohGl6deO-Omdveec(U-{9Tl;||&Ja2}n~DvkpDWJgZziQC8R0?YKB~9RTG+;D4cAI#mu5@Ei|UNvH)_=6E``wJ>0QF=!^-fS0MTee%;Z zM#(w8Jdo)u6EOfnY!6AcD=LRvcB-H^G&sb=v)S=dr|0B%D;RCL>HAal?(9azQBJB{^cvM z>UU!7#zq<(#pUC}cSckLPY=XCDbbIktwlV>P8mHPVE@*w5I5~k!;H7zWC)iJRhclG zDMIA%Q=?Sa8`RXzGUr-X)N7Bfc}sNn1|#O!sssN5VkW?JXX4jxe$Hur0n;>C1%uEp zmckvParN>{Ez1b8Gd0XnMQX|2cc0nA(}9j?jZ|2hn0|EufK>C{ zF!O`43DiEP09w}19g=n4>7PJE~o%80U&+gqu zrX91|IO5qAh;o~Ho;u22d&)Q`TbhOkY&DAoIT|Ax!b(x7u%ZlDWWv^SW-@9wB%Js`uNP_g z8JJT(V>2Q5tY+^XAcm4EXcpz>Y3|qDPn9eqDi@I;N@TNA*W>CG5+IFj1TMpji4W;i zNxgY$pB2E4oLRU{K4p~3=0AdG&RtJIk2BsrWZI)@V|K9k!LRh{v87b4il0oPYg$VW zD#k}viv{+AHtsESN}b+`Mm@MGrTtvDtk2a|YyLnW-`_Z8iE#=a93Tm(7nOwNd&aY+ z&j*47UAb^}RG0#bAz`L>weVTQtI)ju(1U&VvD$t4G{k(H9HJNeVh?h|?Q1_`2=@RC zr$~JOqt!La5H2JO_ZXqM`=^NhF+*1W_vaBu;K^q|@mne+z_My_1hA}H#@=KezKr*1 z{mWWV-aRDox6|sMky%Wv{}qvSq0SWrSnyunQQbp|B9*XJ+aVD^MPDMi2ta#ur2SCU zO6bB@h(9d3iDXL~L+iQdehi`W$`=nS`fI`a=@%vrSn&E3>hjIq4ISPE*S&s{$pLYC zM4i5uf*fPUVuQ>UsUEG_$`1Y(o=V8Xc(Kvl=hE5dnojjd90KtY)#yt1=KB)d?HJ{R zgr(jn2F_@lQRx{Ep(6_~-*-~jRvQ-i?dI*n14m1e+gm25=?+tV`y)!^^=Cv_Jc1FJ z&zK-i_%vAjRwhgI4^QJvEs~`s5}I1!&1-3Pbrh*z%Vwf4%Cw4YlwHTd>UTzpw~6E# z=BeBrQArk31w%*Bs_8w(JtxVaJwNP3h{7Y2mmwPi=-e+HuumjN=U^AHtm_m5*jpbsy>^Ohd*DxJMMnpF-xY-b!541ftTQ&q_;67Sa*Sjn) zBc`7lxGUCCM4$m(Oqrpcw_Ysu2C`hFWIG25%}07Z3kzghl$4UPQp-QOpkw z>#GF2S1wM97m?v{Gd^I|70?WzgAt|D(YdkAM4vri-~sUVH4@{NSb+$_qH#?P89aXW zlOCQ^>0r;z+fvdH2$wusodaI@*GmPrHjYzss6%yUVk$!H(&n`p6%~yI5Q(eI%rNRw zKeg%fH%^N&9;YW6cX6NRfF|1%w(^UGMJF;KO6c2V>bX)%XzfSR1YH}!lTc_M zqw@-l>X(JQ8rp(K!+w~vE&ha$*sV8xaikNW!W8rU*x%J&G(+Ks+t`>d-ptq!$B$MEJ9@nV0~j`0vv{apa#Rz}tPt%0gH1hS1N2Up5A z)6yJyZARxww3hRuw~sZkUIPVz4B>@$HA1l$=g(hnh@oYTye4RlV%S_~k`NgO$F7=* zK9hR0W{H;r3zDE!0*x4V=_Z?p_Da$5+As{H=?9S4n#)#(*YOh2Fq#P*znjN5-vcx=IQ|yS3lM^KIG~vp zux&sjPXej5_AKO5zdGDkvj(|ZyRzx;Qp|^J1iTDHrAn?qqd*@QlOl$-Qitmu3{wd?N(J}%bfbf zQNCUfo2DV9)wH5BjwuQxI3Gkgfb08ef#5rc73YlT`~%kU1tTsF!qu~zp9}8#@B*Kn zuYp*Ik0$@~;!9@cFPYG^S$Fk!nDdclo4RDL_4%NSAtNNEn$1q^tE5)#b5^p*L2tGn zryrqOUch%nyTm)hN@>%$>yx%FV6mV1Lp zoJ#9z@}Y10o*M?AVRxo4tT33?`|V9QMCW(A5in6W0Stp@Q*Gy3co4NBp@W)R>l6m= zv-kc3MvnL|<~u@N!5$Yf)p5()@t_Iu9tKkLofz4~r4QPE`z*mjmTF4z*T|<7`7em#k$N=Ij<=LGzSh<&q=DY!!dT>4`_#@f z=Jke*n?>E#M_*apm@yP6B^Q$73W|Fr9xOsuNTC+uJ zgTGEP18a8~$b8(flNgcljj)tAS0TNDQ#0?@__sz~Jz$O2)b4;k_>8)4IF9`Kd%K7J z2yrqI90mAAwP2ib5FDI(y?C!Ulex(Tx)}GB{KR+op7%MTnTJ~_sAD;88G~G+EYu)Z z|2*xbsK%W!qKBl8Vf?Y|H8#jB&$&=R7jQd+pj+gA(DKb5>ytaWaTMgI)EB%DeAcf5 zOUs%+lSk=C|Keh(ZWr5y>-0^($^rM4f28sr~lk zHJf8$EwB~?mEEp`G)QV~Tp#xE;a1J4(2e`RIcixS>9)9WX@UwpE3mL%A=BshNU2bG z`Zn%DG`s_$O4uhuM$u7G zFe5*nzPlmQc?np0M$72vOovBu!6lx{~~7&Q{Q54%$3%^f|2ip+~1FVE!h!NUcmz4kkZx`aHp+Ssq1^ z?bgKoJzT8YDtumXr^3l#DWs-X6N3@+6GH3Rn_C|Xe|K7N>wh1+rNS8)0;9Em^&DvS z4?nkXIBV|pEV36F-S1N>9O>$iMgsDbN{dCr-drkNp96@q=*ZI@IXp>w2Vci7*gcYS z##bI!O^roS*IzS+sg9|VE39EPLXo_EE^C+kd+X?czHGf*wUo z(t}nJh)>+&-=^H6&M<%JVdTGoC7|Fu0H1e){LY_93&-heJ_W~ln>Ubc$kM?6qQ|o5 zFh~}G;B=CXK&GNs4?UlvIV@bhO*0*DH)>f2)0M7`+G(t+@pwr{<&enpSP3FUNBn(W ze@4=mX*Rry%|@X>wIUr>2m5}C52x@_Up)Kx568I$K>q@|;} zr?e_cq4xy!aa`S!Q@TW(hz2|{6U#RT5$}Q!g~&;M2?gKutZL7rc;li%#Epd7x1JLl zLmUC%mlbq!DL0sLZ_vyJgk#ieTD**z(G>IEMA@-ej`DiR=leOfj`pnEzn!oDjMZXh z{I4j$1%UnkU-OmX9mJmWG#H(JIH%jjZxec7l~0LyXsy+lbL@(C_A&#m z)cc39LVV*}(_BW_mt!#Em(tUx?E5PZ@0QBd7VSort~AE$c8^O^&0VV)pCcK<%|+|j zM-^MaJ7SilCvUv}v$G_{TV?#sO~u}uJ8w#luq0c&?hjtW^gnkxC|fUAWBBrEW%VVO zV2x~MwM1Tje&d_+D{%e@%ukPBwnP>c+TLJ zs0j>h!1Aj+*qa-oRPz^bvR+DzDEkHo4~jVrPR zlu)XDVkbY*T_#d3X8w_wGr^=szu3>_VW41Gx&IxZDj~(BpAuv*JV-WX zLi@Q8ZmkUI-$U_7p&0e65!nN!0#$hA2-&XwwjUKOxf#6MAAdcv`u4f7+z zMb}Q_R$ZE9bG?ufXwquonfbwSxH;IOy_VF7@xJ{zzDIF*S!j5O+q}kAr*Q$QdIbtu}z0DCk)PYDmd=3 zGUd){yM~Tz=9dwjc}u0#8n~qJ+XShTu^T$-ia^~~#|he$ymX0n4_f1hf{Pm*n7H$m zC&6+8${2l{-ZXcXnyO<9ceCC-JUnU*Dt$?C{x+;&8#Z|J#4t~D$>5f;6oZ{#i$!7Y zs|NzR^WO(cxWX0RP&$k@M~a*g>l5|iqA0GZr7B!Nru0ih9KIopZ!@G_Cu_To%Z$sa zl=En@#+U_(YOCi=*$6l- zJPgieH6gRiJ-qL4mLNO)su8LK>{7iN&qlN$wWAhwI1l>yE8sJFp?J(;8Dm-sxj=6t z-ueh#MB^aW#LCbeW&{LS1T_v|%qDiS$XQt6l17nbehWHBcvARMZ9-v2b}s@uKtu;BK^ z>|_tvB`U!l*+ZlZk!e0Ktq3X$1sjx2Hm0tsyk%FsL4Fvx^4gA68Mso4M-{ng7ds}^ z3u>288(dW@mpl*d8+w0?Y*A*&=Yem%(4$}Hc);Z1>TtLP%Hb#4&Y^4Q^4+}j$Afa+ zMUS~==94>NvMQoYWqdPdOn)w)LD0!*>AhND}4o0e!Y|SXX41N&1vz0 zeV7!@wv2vDo0~aY-6jhWYr_kV=zd}$E~>m<_FKZbqNFB$kr4++0QoV6A$fT6sgB}8 zTCVPx-+JJrD@l97mxd;VceXgJ6xMiA9BfR}V?dKqxts1?)@J+Kr|yUD&C)^e?tCM$ z=rnfW1^=z-#R0fe?^-fZhViW0FMCEnRmjOzI1sab=DYQ8*bm1DiFO$RY7vsb)Zd$VPY%SIgz>H3ct{vfz>WdSn;VFum76k?4^ z;=?NkuSS2#9mhzAII`Y0mLv=Dj54zBo|D7l?wZ=Xsj^ET%PD>uk4N7}%S`Mld#R}s_eApqc`K(>%9K~k z$aRqmTz+LPAPg1UFTLGtQb8o1i!M+PhP)h%N|4T7%;lGWqqA)84pgjF>nX%acrH@b zafYDi(cCr5SV7E16#Z$>s)zc8V)qVcFkWP${7NT#3VE-P2?f-;fe_h68>k4&w zhEt%_JF&S*01<&?Eo_wXObl$En~J{WLKZsEeHpd+y)tgW?UaZbhQH>l5Y5l^G$3eD z(~HK{+`cy&AF5xrqaze62yF0&t~$jb^)b&RqK9}XF#L?UTCpxM^W0GRL&57(T&^-( z*qr#N5}}z}Bh3R#QyhPkxS(#BP_&R3i~H=dQ7z|`L6=4+?CCAz^&4;GOjA&|Vg;Kv z^mg?o^mICoCVY&_POT%7o5@Kq5b{{`q4ut`Lt6Ew`t$rSl`ZW@8n5O|B6{f%wOOiE z(%7ZMqES?Yq0Sw-W968oo2+vUSbyfDcLphxcyqk-NQbt|h{hLB$5r)G%dE}hPwVJFxgze*o3nkTFdXuV}E^fUG2q!JS)Sy1)q6hW^+oL}7E9yyr_YimMVj zc${DNq%dsIzRNS_tT6XC@S0>Bpdgiw3s}tPl zSS&>Bq*dR+b-a8d@`m}RV5~uGWg`(Uw^Ri>t1%?Orby(ztcF10d{uamv0_d5R$(hq zKr<3}a4&&29P69ALa`IzJfm@G;*?NLfNAeqwSCXn|un__UOC{N8xk7@( zlf+a~xzb4~l2f!*8Qkpb>;A)L+Far+KIVFo-%(BdQ_&+rj-05jU3q9^C&|^`H2wvrNs1?QNQ25BOYkQ+u}K-??l|oqbvR<*@v)f?-g&jNwf?f|L4ed786F z0CyhFHwz+T2I~PT+aS`YW6FDV8ZFI5t0-v$ol$a69b;xU%eB1gfy^hjtebu+OW;SY z=cYHAqOZIy+5R&nH`Ugi@>cLRL`#cGrZU2G%3h2HJI%F!L-v8Wq=ggY0Mq=B0Fh!^ zrH^W?9YoG}1B#NYsKd4z2C=)Q8?7kemGkzaURa~flx+yE{>vHNLzg=dDz{^c859k> zVMj!2BP&uUp6lR@Az)IeS>RmZpK^VDmFr+`Q}w$uPJ&hCZk~a3UeGSIdNTBPz_HSp zro8iFY+h#N$JDS&UeWX90vF;08V z6>H@^jov(c+wOjy;h!Pan>(BLIKY;1znH@Ievz;hEWv5y&L_Aeo&0sxxRVUo3KyAJ zK!mBoqU4wX%U{(iNgRJfCZQ}3e1yGxrgT}c&j6LMRc4QD!DdTY}+1iWF6nAffL1y(1CXmRI(G%M=Xt9I2c$7bb&5`K{xud z;SbxA`yOZ_{OZH8Yf6;QiJo|DMS0<@L*X-3iAOQtRyb8=9>**=<168R1p!wvQaNUcCQKcKlbaYL2lX<|P)|py#7hUcEFM6kFY_Ekpsg zHuwPFcT^uXa_?r0_+5Z5xzJKRIC-TE0zUyrcAm_}Ke|KqMQj8jm(2p#HyZRc5t8s5W^69UH?2cd48mZy-E%Y8_46xQvz-0f%x!rvxp{N$`GjS-ol|V zNCx+9s!iU}1@oQ6hpm?>660UOa!xck%ml-x=mG^W&u^21lwDpa4YWx?a%I{qBc0Tl zhax>_U7yVecy3u7)>Uhr@lE;bdTiI=o9>6qvrD`a-?vtx?OQN5pSz1!6t{-O)a^UG z=Qo(+>jKFu&cikTqyJZM+N}O>`ae$D^4EXV|0{s{Kb4pK?+?O1QUCG&Z|Xl9EJO~a zHFD?sHG;Q4W5M4IG619VPZqa;+SLD@V*CFf|5M+*#1OHB0V1hp@284^01X3ks;>`Z z5mSGThVou75R}Zt@!C0c64->U*w_%0yM&>MAs- zpHkWx-aQ+vj8R=7!lq|$W^5sN+%UF@C}eQTWN;aNKg=SqV#^rdF!U!49`-dXxiyA* zNnKR+J&h~iADDLAa{{K_|`?6p#V>^h$i7!BWtD$|naDaSJfP9GeV6Mu% z;2pALGp5R*=;LY=k1E8=S3)im<=GGGQg8xm{^B%ESjgR+kx(66Om|E#gzk}cHwzd{AN0|(&=-TW(XNfcJbm=RU43yND%#ak!Z8{|m@ES5CXoJU%F4084hJZiEM zyx1((Kwr4lyz=(~OH=z#C++Fh1r}G+z$KHhA?CH+Q}lMVG;Gmx@bp~OU1=uIO*z5LeL%`Tu^@QU!_QCV;c+jL?D0$-G1(p=^LjnwyDSgA{OzFn zXJ{7#+kg9%)c&W!^cUJC!Q)2|3}WrKi9S(rOc-kV*GakF$47$4ilfnVPecj#8^Z~*z94Na@_lU8$?iVR0-8989@ZKJc zW?>jcXH8x|wJ|*EJbrV%czAz1z(7AznjOi*Fc*b0V*xMq-yQ_fnZy)6wnQQap@ykm z`XLU_h0s2zG>jXm`Z0`Zc<}RQ=sR=7Xj-k{PitdH56VQuDbTFGc-Fh_5=^AZz(h)( z%`&7MCJXGoCeMQ)R5U)Lh7`qb?U#pMzw2EdJ;h zD2U^n^3M|T6h+b_fE7cfV@s+rcWNp}P*iNm!^Az(R?H*U9m*cQ-6;4+abBW(@QW6G zQ~vhyt0*`3S=jTye(xHP>&8gL)M}4~dpntm0G}b(pE4Rbz+0mTkn&%w*>2B1o3jhC z!%Cjd1v1Z@#WK&gl=w`f)=Z-Eg*T<67*_#Bcejg=!xMVPZfSttM=q<3jaX$*3K#39 zj!ka7vY{ak_@yEmS;Ufy--S8p$h(IX`VEeR#L4c7G)H@f5hzYNsRoa6yIRnvbzxd4 zzse!t`NdB2a?Mz}CZv2ybr*t>54<=z?-lJDE=b zC!k2rJ6pib>fU;7X~ruj#R_Ttf!Z0=Cj9R|44KfM_~E6uRv{TSAvU3pP?~& zO(md(u9#@(fU#=pKCvODfrG?5vkHx-c|?MDr#vW_k;ig5NRqo${cWUmR(sfF?r3~| zF<-?sM~!I8#8C)ne~Lt9?jfSmHpE#S(6v&?t($Xty|l9t6$sNEZJCk zGITi$y3T4jBSZYU@adltN3DN?EhGoK)EBr;K;qt@xggLHjll-LQ~Zft2=N}J_X%#6 zWi74(d3goMP%>W%8nu8kl=y~It=*gN4@I9C6T}y}Mx`r2+1YpTXv~0f9e>bQQUJjf zS`>=rT;zC)!iulInG7Xajvw7Y?XS*TTg4V>#!F=2_9I|j#&a2uE3v~E83Ez;4ndws zQxyAt$e3&0F=G9KnbPaeIyP*Yx)Eqp*T@sna$@VZbrA2#=t$hjDQOD1LR1-^ltQp| z#e65VcQh1O(EIdm>*Bcf$-H~D9S^+yN7J-HT@}lcTm@FrFPN{Lk|H}N5#DgAbZVK< z7nk|Y7Ku9~c#2mehv;hRuClG)O{!Rpdy$MR?FW&Jz?$i1ws$)fVdc`7rh5Yj8-H4) zei&qWL&}PJShPw8C-QcizY+ifo^*k-ZD5N2cE0^15Q>%gzw@0^r^43g5eKilpgVlE z%|)>#5IxE312>^t67bHgW)%^0L24&g_{RojVg>T1?WCK2k``?)+)x0@S z{I(XYK5vVzxIf!Dyw%gDwx;(vQKHqaU|Tp97}0?71Jt|THPru1YOE&YZP}%}T2%xl zcI822l$)nPqu8Ow3J)W-?4%Fduf6MhZCmVQr?Q|uuMRMy{`yX~!HTF_kc}E+pc7k9 zs=myk3_%wtya*FDUW0F#0!Q?%Jfd+wcDai=S|ylD4Oxr?3D>BuJSWa!Q2m9ZF4L44 z;rx+mqj3I-z7nerG||>rW%9P<7^stWnK^;DzI}YH2G-=vIUU7KVElu~KAh)QV?d&- z3XGG>lenbLeaLE?D~U0!`|qYFd0&KM;-9K+^OoxEQN0^Hsf%Ktw0P2I#O*7@r|b;P z6sV7X3djS%D()oJXlo$I+*8 zv4A65?bwu>XNF!B|>pLww}2Fo2w|JT(@l5v~& za9rgOJjD%EstwflxR!eTfRU}G^|&?%%g6TtIe0(B^ml({)_-OOVWt1CGsOg;S@?ei zOU8&-@aG`_GybPpxWVZ^@#&=UiCUG7RC9CROkk6YY3BF#hz~M5rA+{5il4y8U73@* zCnu_{pRFxl?~Gor=Y{#PkbE8OGMmNQdyd!qE^HlIpRTj3>GeTpOkl4Ux+kr(Xbp`) zm3fQeE<+bZM*&0P9otIo#0{xT53TVqewQ&Gq?vyXo$igMHQnn|b<`&MVp*#?VIi?W zOtEg0Da^YlhIk5b>nMCW-$l2-hs%%fz|O>|!nU0o5C~Z~o7Yg`a4$Qdh3xhfp5LK& zIZgj$aFN~_*#agKUe;GVA*HTW;SLUws`C^mZhz5FL`A+i^l_u8F)s86zV9*Sr&_Yp zSJ`2R!ZwTn0xP3m76WDm3t~+(QIy@zG!7^jm{B|C(C_#eRKyrcCaF=3lJQKl2$fDz zv7_Mb(TZ~2S3E10c+g}8`*hfZCn;;Q=W?!kRsGsfzF*9PE2UfhL3P0E1^?aKEWI{! zpn7|#29+94@W&AJ_HSoFs}FODO9%ckv>$EROvDk>X@vLwuMk2TuLZeYQ*yQmWIEIr zu$HW;`Smg#5ec487d5-=&Z%9dpp;1})zF|B_N2{cb)bEav)tm`yRN(O8a9wt1k<8jsD_B~6)6{}JbgMWF#40F7Q$6}LbQraiYc zcQu#vuuB$IFOh>T3VL6y_?bsw&~At{+?}khFhN~^zv<>fhTAd1@xHE@bikTKvDCt6 zn>J!Vg$i?#&Ss_f+k0rTR2*dCs+raLV%Y;6?<~>*Z_HQ~MbfYw1SOSs-6|@j%Cd1M zr%Hq?0{CEB`Qm;9gqwq6y~i~!lf?0OhLq2O01cP5tpl7H1JBt-Fx}x9hoaK4C26;` zk}rApw3ybS&lq(u$BKgf$xfp5q#(Q?sAvySOcQj6dXBqUtZ>VaGzPo|d&uAn4h1Gb z#ZvIM`Y4m!4Oe(88CY>Z*f%dVaYYRDvIJ}mxxtW{s;T0(kSPQ~??&D@U{;hL3e_v* zZnkA$qwbi0wC0Q5>zez)P;VGpN)Cofs6g3g-zhb?Hx=>~(J|@;Q`0sPW4MuV7Z7W! z0>_P=+wzO$%&>nc4%ajf;==16io(~$@9;eABG8}?OCtkyS3@BX$_5LKxt z@FS(Lfrs#-5XKVmlNl>XIsNGd5g_E3MLPLBji}|8)wi#PfLzGA0b2&AOpBSjH6eviV~ZJXgx z`AJ2*!@7y&a*dnn>kR}b+5f@VJ4J`OF5S8rv2A?WePRkop8HqPZaA&=X0+rcD z^B8a~6C@gyJCAaGH$QMnPcc}$1VOCp8=g31(Ve(CUZVEIC#qn6j18T~C0W9;Z+x*3 z+8b4yxFok?ZScXhM%Kq$auvxBl+BvDF%s1qxGZ~$j^jco=^FO< zFQN-_{5~Xie1S0!^vY*ImexKGODKmCYU|GVWDbHSe(@^xPaeo0 zxAK4(^L^QX+Ou-PeWsv=KmR}^XwQmGei$FpBw0U6^&e}?ZgagPkDedrfm!sphM>Ij&IVG%YS?4&IIpcKDj%Mk)*ZjRp=h0c`S5Mk z;qP5Xk4=1Rj-7Q}PEYF-7J@Tk1KioZ3()&A`}a)m7+qhIe#fC01OdFd zQHi&$AdlMjOI9%t%oNGl>K?{L5qtMlc|L#Gsdj;}j%1ue=rRu?2?GTn0%P9_k6C0b z`);C;&D8&u>Bq$q@=ULQAKz(=l6RKL0kSG!i`0K|_wxAL{K%mvi)G~!QEC!un$%e zf}bdlz6~dI*L3Wx=UW*sN9q!NC|-CW%$jhwKgk**#?B!qHkg!I6(+qiq)Rt26hG0)JL zfQDbgSo`_gK4?5|aJ_R5oqB!$``g>47q;D((HC@o5x8RXE8K&9{L0K`fl3QC6;?lp6Zs#B}RRyxOlg&XMtdR@wBN^D?-kOZlyPVAT@SF^Ls0#?Yb zX}V5qUW*RbtGqJ$cwi^sb*&{&_36QqdZ{(KytR$GtOkoKr#t2I`!lmr8#=|qn88@3 zApb?v9Z9@v>qRiyGa_zL&dviB$D0x@j^$tdwgR?!E`cWxiHe?f2F}VA9l=4Lm}n(9 za_o=8r|{s5hc?R2`#qzPY?Fw%l2$LL6I3Snwr&`1<{5v|s3RjOePZ!gzbqmnCY0?V|=uxl}1+8#rGmU}L$&Pzx zg`kJ#^Os_sw%}(*SrZAxhAWc1t&mV?h+L1Bvc8i96Agl^3?+eCd^kC_)Qio0iT9_q zbOna&t~K!Z!ATo#a}w7Hu6UHdH_?5>-pv9%y^8|As$RA+sDLm0K|SoR+u|SZ5drs! z&tc&KsD0nhgZy2UD_T^rfoE~Zv~=m5154(wt21k~)M5#v-R!lYHOjaEBo3uq0ML4s zT%oWkV?fa9Go2D{Grx4xuwB3a&Sp3OQj6sl{E{JoSru5fbnxhEmgYta1z@s>b6w&Z z1x9E?HF^g_DW&MCeos>l_Dzn?-(6WRg?1^lAZxCqTGJ`upmFq zL+W&m*?!`LhdJ(xQlIVu+}eu~43io@v5nH$ z9iPojAC59SANn!$tV}_t4hkE`8#yW5*QzdS=>3;9BBy0KgjU9ZdA4LwAHDr%(69`&ZdIM z%G<;1%kfZ+bHfgWPTd2qbsbaG`F~K&gCg}V-MsAN(4E%(M#bBD4J=C+6NC5*1|7UX z&VaSqJ?q#3&*juA@a0xPM|l;9dpF3nSB`o_3xr3OYIq?Cd<%Jw5xcbFA;=574i})X zqJPfn>vkHVoKZh3y;X9=7oJN`0z?vA)fv{(P#;6NFEp8Z<*Lpb2_cO&qwk?iT1@9f zzA)jm5nndIT(^87`2VEeqtMnj<>J>GP%`X^dQX|Uyf>5U!|_34c4z^}3TptUUK(Kv z9Q<8KkM^lN_Og~!){M>_ea{$o!Adst6&w^U6IRZ+Qx4Es98)GTitCZhW8Ez@Lhe?_ z8b)zqpjkP7qxvgxZk%p$Rg;#S-o7Y#fAVFVo`S(NuK~UBtA17IehlvITv;1m7-sfa zZ&pZ46*>$C^ngf*F~jqwD3{WXvQ9UAV+kqt)|*CLvez&0*9(QivS54yv^5+OL*e%d zCP*O2YCI-$z3SV>?M5VcawQ;Sb|ogYLp5?>o#@rZs~Kwy{RAdq@kN{1zS)4mU+Ee` z$QCi=v96p$`d-tT(Ted%4AR@S=Na|O2>%e17h)p ziHC>jNA>InUs1X#Mr(H(b>cHg-2nj5=0@#70tiO)937Sk$tSVgLiPtxhV@b9*5{TuyO%Qb`qP&$V#EDh6|fwYOb@fpiKsj+3lZM~h9yvb$9QrU43JBM{F(ZnQ$ zu{={+`O_T6TR~eZA1f5gu}FfR8ggvuszdlAlk}P2*!0*5=g!W7xj#5=5$5>$+If$9 z(j7bYr@yL6*k07{XjW|{vk*R;C0Vi~cE7_0pCzd7rjK@)69)fW3WM-fN8NzPW>1Cjf#=zYt{P9vz#`vla_x+A~dyBf}xw~CH`_M8I zFZf}ZH8|vg#$ZM&Z6nLi%?8TdHNRExlx|C(EyHP(WB~#@xsSTXEx>1z<}94v9qK~+ z(nrU{zWDCz_OhXdxB~Anf*5pg!oGrzJM^b~30n&nX3xKjcrg#%?M|ufPtW5)`Zhd{ z=qVOYC$QWwILGt5s`wsQj2}xVe}5A9wj<|7WJiiXc|9oEleo`DC_7X^Mc)i~0|WIB zGVx2<1-3yZ=EbuwdDfgsC}RPzl?T^bR7&$W!Va+6xwkOVk2ujL3W4mdGT3aj#9HwN*K$c7q=Vmw5xvP9MtQYMxfgKlYl$PfEoP+2*yNuJ8_1lB5Uc;nrRmW}~44pdkI7o8QVaS~L23*=< zu`A!V1|qDS?}tKq)y9mQ(LgW3<%$y1agGr}On0FRUgEXZ!&kX%f2~_RtNy!gqA4yY zPqA!KJ|020U(W)}(%?_zyT`Hpv?&;zw(@{k5>p@3a580mR)~k{TeEt{1M07L zvyO)_vsRvCuEl;!;rYEnV=E(~^Hu%)RgK|uLm}RjvR{uZ>RnX^aPh(wZIsXgfJQqh z+0N^WW=Ua<3@N2}Xp4S@V6|&pOo4krd&W+AA{_O-q~WwGAN_7JDug(U!W#7pjA<~w za>I%yX5e~>7Y?bKFgq}C`!6~QEwxvjWF3LmKr)z|5#8ZWNU}^o^>Lk3dqccKdpt6k z6FTcuxW`n|l&CI8R=~}Mx2!WO*2lutt5;NyN{$i3aj(C$_U+P)WCcgmlEvm=lUs}H zM6NVi2opSfDY2vT0}%g8zH*&TDvF;v2YZ!RivS{$;}}P)B2uI!nLOXK19v&Edv*=x z_@;*%f2d{JblQPToWE|Eo;N+CU%h(KZ4RI2;=G|m?}$^)+a>JBb-P`rHKe&m19wA^QYoW6d7HYd!-#baj5is9BkFa?X%30e_H9=V}_TG^$nXMH1V zOl80pxa>aBdzv_jI-~laT$1FPxi4reY)!K8Wnk=~b`GO-I^+uYFuL1dHD$p$Wq4}F zsD5QeonC${m)S=go|!E9ACmsOO)@4&Jo!H^H&yb(t!Fz~JE(hXe{YVj8oUY}r_SJx zNrPSDXDF3KRaC5j=Q1zIFjp3jyoGWuJTN>%EuQLt)n zcJt$t_DWF%-?N|$(|vc){IZd^gLv_~{59w9!KcB?yHWzw1v{;!5zvtrc!FxPo|v;# zc?mYPCF)^&B^+E_7$npE0mVL@QT?BK8QXssd&5A-`tPA_GgZ2=&syNP1iEv7unAaugyik;u zdAvzWr*TgKHG%4SsO~%Zuqy8ffMY;c)64s3yRDVE)$;MeDamk zfmhW(X|X)jy@+&Op&H~~e=6hoY+iU6fNR zIBPv}q@4@vF}fU9payXp**xNI-8IdU(1tU^liFD@5*&scK#%Q88I_jb3AsZ}ub5r{ z9eNS@s%*qChbjb8XG_&?&vHzx~Q1sO-BBhq?_9WK>m|B3#4 z8(1EBn?k;xOcUt=8 z$jRc$l&L!nD%Pu|4**C`|EXfkrxS*OEpu@lxwCEre0GT>g1>1Ihz!kd0F3Oay@nNP z=o#x5%94)!jP7UP|0l9X&($0Y<_hghP0NPM9OTWCtr7DV zImqi~>w5l(qM)8D#AGdEvNNu}AOvL2R?JCzyX_F+HQznA`21m@^L8E^a{h!bb;N4w zorKt=6a%v>-*|Fv*=O4jW6ct>MW64$!YhL#Ea;Ti!;Q6X)@C-!`4DeIQ}VGLGO~2D zg8qBDDY?E5Sipm$=Zk3gWUFSSoUBO5+tinwm%@W1WP-;8`~)N09$QkfGZK_5d%q{D zj(^V$U%!S;BZ84)?U*kt#K5`imruE>!bfM_Hl`nLuJ3NXxYH`MVvRvXw#l$(wc<>! zIG+MoskQgnoj3!mSBk{KJ^#M+m0%eq?c$XK-c-xITX?@uE$6I$jw^e887DPzAo#7}CN^`t zlz_r{{%-92a59G0MBlHZC%F9#-|j_kr(|fz*j~rG2>wx@1fbE1!0a%AX0oq9!_KQY z)tZoRBdDHDsKxcN_A{N0VgBt)Th8P#!FWbtq;I)y(Ej5x};#%8&&NYz6wA}Q8F zY!Oe5*Ri$4kFHHXixmO-^Vwmjoe5j4J04GsUZO*{5Xf$ers5A-5cWYuI`Fp9$x$1> z%+vNhNU;Q@KGPA2DbCK+zG;@9sS}D3|CD${AJRzq{@O+@97<$U2}+Hb^|w+w4$Xzx z@E6@OxTC+>;IaB`ErC`xr1+S~7JGu9uMkmoLqUzb-(~odB4c-Dc5s;kdujPThUJ(n%y&~;=M9U#^`mp2rpQif3KliNDVt2kX^&wid(;?J~FUKd$2YV-`0<;SL z>y)9(O#*^{lp$&(cos~5^Q;J~jW2@EZMHgl+ZPS5waal7h@I~x3 za5?Ohw%85^je%7<&yAGZc5_gjoBk~8I7Y8 z&SCT1<>-aw$!77GuCxD{k{sJ5h(o4D?#<)3ix?7dh z7zu9t19SP+sj!;*_B_-*xz$OMZhEA=xIw|X)}W{CghtzGB(!yXfsBpIER@6*Pw-+8 z(4_MY{$1AFYYhHeCr4-0SL9pSWaUfmC3nSzyB|?43VdI#AZ*D*^)A=I{hEl%4Yzp1 zFwo{Nr-#6~D z26g$hm8)EtK5uX!!+WCtvEu)$#2I#`e+SN}O4zK^LI2>3e`IF~qH=J#BYHh7y3P8n zFq{Xo7j?MqYuk9GAqKCR#El@u0KiI8*NZ=xuSFe|pI^CqtG8T`w z5lTyELcr!;vRh|6`Da`=Sqtvp`$Om}|CBtiXE!70>*}Sdck^58*AR{9Klg-NT}3cy zgPyS4G6!Vqve)cxY#~H7{lV3rg0BgtN~|s-ke@~5+z1zW-;=zTs6b*FWbhEZuu~C) z4uGf514T|15A{O{FaTm1VoE@Ybw+Ui?2QjGs4*HvMO~mp7vISSa=De1?X>`B3WJEV zYI^jtpBxa^{v#6;p;W7`wK{$5M9zclYSH*Z z{6@BN3h!tsCxG&8711S4Rd%gH!Nr>UQk9iwxtmIJ1SZD3Eg=a?g0j?T7*2n+xmu>aD1(4l`pU$D2 zrd#wIkVWf+;A3+nt}oGp9K`$ol98zDu6F?!>u(i z9||>4EOoEY<(o3CQr5FaiU(5uiN-bTOgB$mJ%r~G*Q=zGG7e$3tYlnfe(GO(L3#-k zpe3{MNp}EMBp84U5@p*+^j0K$WNcz~a)Nehh6a-rr!(Jmt|IlIN;{Ke$0Njk<0!S@ zNnFMt!>r$Q75ju5x~iEbs!YG3GthF3Rj29nft|qIjqjj?uOZ(~f1)V^rX|pE)w#d}6k*c6eko^6;g{s!~_L|lFwO&tg zU=;TG7v(3CPag|<`uevulC`_$$n8A>3XLLZ#hMPnWtV;uQB zfh5xgNm!FNQjU6oB)E@6z4w1sCKFyCC%`=pme6qZ$j6wN(qA)509f9lTnC7D8jX55 zVnjSF_o2t6?d-GH(kJ^bL%IQ%_x%1-$+Q2ri)prhzj35&{?V`e55FpjO#H8}E-X|7 zh`R<;^WTsO;(3YZn&QuQl1II912={Qm^oB3#Qs_;xr2S89PCG>pUdHJ8Tg0A!YLH* zXWw#8#(VLfABwfIT6w~AF77miDh^O7Ily+OyXV(uFS;uOscP53SKqX5BzH2s37ikt z*O+mKI0p#0{$L4&Z2JidC@fOjgRE4hYv47kEApfuhMz;Le;likNUF(5$wZ%tw?~CV zy)cti^fCKw>FSY(enjz^@x?|1E;FfLc?*V{zK}NYGgBy3hcoEWtJ`=-D=+O-GIa){ z>~@PPknwO_6&p(D6OW~rJ;?V*M=NO8TQ1P9RoB?rsM<_NR5~QiTHAg+88j!4;9PHU z<@D`Z(&fj4s^|%aMO45NM%IXOel+XwSsg$sJ0Oq==4(w{4BFdqkgNcf+mR?KoVM`{ zgG6W&gfmtBGUNUHqIro!whE=Dot8Z=3rl_0{$YBgTUiQ*+lGGlq<&jN-10vgkM$wq zRev^hxZye;G>wWIn^}tyIhAy}@P+D3ciR{jG@g>c zULWMmz3@2s2Ee zg;}~sDdI1;2s*FWQFtatz?@YT>OmEvx|kui8qZc)+YQK z)nDP8gLXxF;Y&tGWU5G_rxxVIPFGng0cz+GNjxTsuwzp2F2B>HlP-faPzp=$iyV0c z2;EjAudm)|C{&6yI%q^^KhK^cJ&!L?vZt8>n(Z^TJM_t&<0v4t?<&dWH2Z-_F|K(G znD9!GYN}falLvu;-^5PySN7EO#B(l(8x`FY@R0=pM{!f$nvpE2Z>BaL(#_R*+5Plg zh6AJCvAwX`H^fQHv~JrN3&j-b(k8&_*xuaN zwx5|}uB9$$LFX%5%iq(kgg~hvF%%kiB16h@7zSmCV5&LHx{lvYvW051TL{@VBCapk zeof!-6+(TkK#-q%paSf$_77$QSr=<}VV_LR4{36ju91#l=od$4+dsZkLGZP@bm?9U z9L@bWY%5v$m=si=?;FP%22W9FI?zmLAM62_s=))H)b!VMlZK$oRRvDJHaUq7{`$} z&e+=0K3o!J(ee}@sR4}yBYQ(`(shR6W(1K9ZrYho2Vb;ici7ISX&VF>K}(WP3TGhCNRBuuC7@kFv zfNG3UlO$lxRGwIJ_=~$PiL-RMC~its^iDN2f&?3?(uMWNRyTMTU+?0z8J~p4QiIUo zp*tEC=ss$jOY&aRbYL`RngSjNo;;C*uPe}jLq-Q_p$Gy=E~OH#dzF+Z0}$63c@0n+ zH-aB0-Zh`_n>zlthMF#0;tg7kkWKQdHrW@Ajr&9J4n|OKGu;_;Kr#@%p9_rao3vU1 z*R~75`h+r2J2qiTYZJWsRWHu(!wx5LQATQ7`FRm=17{ZHq@J`7W>8omxo(uX$qJac zh`h@@-!E!e7r4JyHMX%|(%QV~FYBx34Jr9&!5v2ro_?`57YCNz;8HI^dFs!z$)wR&WQ7V2y&-$;q{R2LrcJK}2XIJPTX z5UFL~4utwLg)`BXd>YX85%9eW;c^Lv0`AFYVxWB%!5G6D<4*3PmKNdXQuuN!3jWm} zX%|*cukMoGQQA$gazv%UrtB=qU-X>FcT=mNs9wFy5^v_ zCb4jXV~{W$(m6FP>??MthLH+RBkT&l+v8cT`AZRjbDk>JhP9onEaDVfzim}cD!c2co@}p0<_5M&@Dz9twTyeWp!;NQ z%`s*OdK~r4pQzz+OBXDz0^Ua1ao13@rekSLk^PRW$ML`qG?$Ut60fLSTu(@`3R|@X z!+VTHnk#-)*CkHGna_%=?;DZm&uyh)E2YY{);l<>K$#iFAGZS-5 zsfWl$s-Lz1BY?Yd!wevPs@lt0hSOaTE#*JsCTN2}Y{zFDS8_9Tx4d0F3YigyOx##nrWk*bz~j1+xL|Hcr{aZa)Pcn8T##SX@74!&3XE;+@LbD}c5|)awpi&id!6=y@@PHFu!{Rd z0pcLKVw5hZ{+AVlnMZHCXGS|MWP9Q!DZa&2nW{Qdt!GE=E&=$#?Khg!=XxBjkpt*z z2SK6bA~|5a=`_wdq3oPURWM_`yP0~>J9Gp2Mp?;yX4y$B?h_V~_h^VbpEtC&OavVN z@xSw58R!}48U7uguQB;^NBAfCm3Bwkl!XQ>qp-{ZjvoR|<8wmgV| zgADWH`D7F<)XVZnrnjLJ1bQI$0Xjo;kKY1}?GDp4p8QC>b~A1~*!`DwNjeU$b^$#x zf@gQPP8R65BtF=t-tLL)OVHpVg?}59_|>OsSl68N)53>{_LI-*a!sP}I$bE3n4p1L z^C;1Vd0>q+@MzNh^kB`{P?l1dcRj2w!KQr8KGvi7t^H<9HLtNtwj;(S)&pDV0>*l@ zrov&6T6Sce7R4EVO#s|GtDQT7Y2bn>VqFhu4h3-|JK(tE;*mT_@o;g3Fma-QXm0ac zL_7XXtt*-m68+z1GbBoLh%{aNUwlUT zHv!@Tf~vT<8g{N=X87jgGpK1C38fL$(_xRHg9_H;FM%JC3wwu_Y48-ZO|fyP0KcI% zVgdGWK%$;)&s6yNkNF8lP#hbs25J+nS+W;=0fiS%j{^~ej6Iz#8umIn3v|wG4y_8B z7+F-6h${9vh%HCLW%`Iz`A{2>Uak792LzC*WN8sSF=Hqp%=i)l&LYH3Z?5sxsIa-o z(bSo%e5KAp%|(wWy`{pVt-1iYs8Mv$2U+bvMQ_}+8Z9s)P1U@3Fh~_E$A&_nS53-W z)BMWW$>>W~Uu`On>cpqLBDfRQF)L=u%LaJ{Z8OW}$DPj>(uPgaaAd)s3A5=hyQ+Jdffi~v#1Vdzte@PBwujisfrAfYc zfk?zGHPBH(PVZt#^rUmCpL*Cep|EW!Pf9Y9S~UT;GsK&NPE__@HbTV{CQK+y`(J`L zf3qwJYfUzpwTaOEoe1anNhDj z_K*;(9S-1Uv(Vh=sbjN8A%vg(^D|$`av7jg9)wxp9zG#v1_vwI@Nw<7UYt*dbDJ*# zPlv;Ik0sV zK14J3VP*IT~*Lxz&f`^5=OmUu3@Wlf-u_5EpHzYWGlBLz<8=4xw!8uV9kYA|IRk-wib&-R5jWL zHbXrQQ4g9hV+6hWV>MM6--+&1j+~I#?haaBkV-AfunJxx#VTJ3shb=^=v2Dx#8%ye;7q;XMZl&n5S@UF0QbU%eHI>~VG zu@=R653Ep0p2wHQj)))u1tcR_QIAPo?ll#J4Ja`ykkO&_o2Lyq4xRYRy1~YrJIiQOgglS@CILH>fR{P#LJP zCm!y3sFg$tQvCfIUAMn41_lVSQ>tysJ%6tpV4Y5aD?oarHMwHwByi3X1qVCmsPy2% zN<5AtV=G<$Y-S0Z-5FEU=^7$tacO3* zJ>n^lT~oD{FH4s+3Ze(vs1&Qgjx}e^HP;UKR;!H#7}@?rf3te`yfWh9?dMo*)g@4J z0*Z>G7r9l5t0|az2@^BkDp!Flb`@H-=>t#pfdnVHMmh^dXB^4YXgPCJ4~L}4C!c3)eu+FZ z*#YJzufQ!=I)S2}1Q~jWVtp1oiEsT>hlkOWNT6!c0}~J*Pe&-$r_PStn=UId2Ocdw zE82u!cw~Kp39|guit<=b^UEvB>gy+#aGLGb1*>260I&6xn6FI?=Ump zLnb02L}}ux7xqO+HrC3^y`=s9jYOsP1rq~pTgo8AMiW4kL*yF#s!1P&B0D7CID@BM z`5|#}GsUP!{r6=EOBG+(6;>d`&zS+<&nxZG4H_3JH<#6Hcze;;G}u;J#Bk6`+uk8)3L7_e}|hksmoKc2{W# zHRsQGj~0e6@pr_{^Meh05;g~v-u7Dt8uY`5r^E9>rTcBadhm6=Cz7$BHvo0Qlrs_% z!SI)SHIz#@(jpy5bm;=C6A#cMym}LIU z(DtG;AP3fDYy3Pq4Lm9GiBAcmmh8KuGZN-G-U!-M5bptf11*jW z2uybnZ%z?!jt`c%H>px#{mh9uo8Yg?s?(|Ds-Db+e$&tQSjEM$@(_Pu5(H=%ETME@ zaQUTied4TQIlHe!VxB))4;G0F5*QWy@nDsnDyHe%c~T1t>%L5N>2{|bNcq^V(Qjv_ zZ3uCZ;w%b%8R-WB4h*`U4fK|5(u=V-3{mp>bF^%KZxJ)szh(}~XAD@gQ4bo}vf1Xe za+@ua3#=k4S7yhJ(6MlZ@%gWUC!&uni*@mMA_eG*AB=#UvcNj-LT3mUYrVwf2g`T5 zP^&vGQ$(Op2|}_0_zdn;ktK|3FSK6RMI^W|yXtjg)2fA7r&r`Id_9bT$gSQJ;dZF$%UaQ5HbQr( zh|2=lb-cIN!;Ew931mqK*!4?A!aBihM)G*FK@`eOHASkP28a+T&k5i7z zJl_hMuCFl+EZmjWH>rVb*ulD5m{k`G9G{Gof9enMP$jCr6Xre)!sA$o8%5-kR{QFn z@ZAoML!K61Ki02CkZsjmIy72A&WKjSX5-e)Y`&FYzpN9DE#x_dW8}0xx`mskD`0YT z;0zZcm;wBuXYQw2a=p2gVE>|zrZP(fdjsym90X4j+* z!y2mbhCT?6KM;yW^9}@U#;>WBOPo>)=+~Y`QVYYM7K9LJs9^>V3d+p;0)mgAyP#7R z=lGpUGmcd4InAnY%K=N3r&$>JI=LxdmdlV%rptY4I?KwTTsb3tN96S~{8nf=U>*h# zT}Rp5#+zzvJoAR@T9zxpTt!KDf-5`pR|N{txLNkyx2wHSUWjag_WY^~iPdgL8z}GC z=*@>fX||`67^P``pQ^=T4EMT2#x_xRS)KPR7b6cRz{FhpAon+vHeQe5nVO`x+DI+@ zFb{PLAoF56$2on!%hO$7jn49CIwOa17z<3I7MGDqC?H`OtJS$=Y>q!f135XGA$98a z3>9$U?-nsm#7V_#o#D&8I8jano+@}avRWIKdvvE@9|cnLPLQ=NTfbIn{RsBWS4SH6 z97p<$#uihTG)eM)inO0Ajg&feJh@IE!jMrWe~PVn0m71Iz$ z>S}WGeIzU|SvQ$Oe66-iq}tEyeZ?k!9k5}ze)_V#Zg>bj%GC9H7r*!^yaLWJBmJq9 zdHmCtP5l$S@mX*oV9nz8_IXn~ zg6Il4mrrCyZr|k<|8cs--Wb&VRo>+tu7q|>^LDMmA9YW!YpcX^MchdmucpV@rMvSw z1(x3(?Xh{AS%Fz=?n@*deMj!GV=Bv3N#p2aUts2G2vuD+sPc2(^2PQO6L9C(ge=Jn z8Kp|(eh@X}jTDs?%}wRZmHDhF3|5cIX66+5yAq0J z;)m$D=M6H=RSSpW{b|Wfi3G$U-NgIr#5IPX5d%e!(zYF^~Xv0l=XGHs^F@sKrH}ZZ zmIKWHT`VdyQU zz*XAimyy*58aom`^2SvmmkCCUur;g{97e;lm{=k|vK4-#cnA){6_li3DvCxr3jdvx z`I%{>m%O8rdvR*y{Ie}#O94e=#9zB>OhvMW7THt@aO^}Awqy^)rQku)cmD?zX-g)6 z7?56lL!s57n)9*Xjii+{1fnEo01kDHbp+}iiuFYcIS&zc3Z|B~QUsix{(x4%o3&tO zL+U{Hgo-#~%2oT0*h;Ra)G7}yR3(J~oj*Yg1;`$fvciWwrg&0#0UxRo+sN-)EheQ6 z%3%AX@>!(=>=Xgx3o#`PHntt?jS1JELju^ztAG{vF-7yEk@_E;u0$%9F8Vozilp3v z)`Y88*O9qEk>rIniE{=7y3~cKAf9A}1Y>);%!NoF*P^Ggb&ZKbK@w?g9USGHjblc6 zti2h4X=TDDCN4laBE@B+Uer=n)XLm&NmDT9W?n= zl%4B(3|QNb)3zR-+!S41}#6fVhwD>myx*=?2ShK_* zC1)goPtvgn_pH6~+m@j`3NYnDE~gqWRg#Y{UotBxz6g`31rop$4GpAoJ#)4Oa7Jnh z==^%ldK$x8k8q!@H7nfKDIa`QiH;`;_+(hX;8F2=cgAm5RfFqe7h00cI057UUz0xmG8Z|&0O@L+@kK5><9NCfO#NZiXV5^e2 z@`Q;@d#fyGCb$2zYQ0Fw6KTEa8_s}`gHkVIJ1KQ2Hv~LYBi>%c_V1ZlH18jA z+vh1s%T8{$x;$LCCV^8p-nl&BWUI8^lpn*XMb1GQPywNwbmV|nhr zWRbD|_DQ}0vnF#1}S@d{Uo80k(fUe29l4w+R&#)Yc{-7KmS)Z4ZXhOnxYftDumZ4K~};{>~QZ;0VG z4ds&MqfS@gv%rw$6g*ZmKm2Gt>lO;0m&9WX3;@`8y=o9!B$wFro>34yj+}a1bo2BRD0f#~MxtNX$5d_B0>o zx_ie+z+$1t;bBYU&`<&4}Dt$gxcz0gN6e#~g2bj@QS!kP8g|W4+;i zU#lC+W^#85-N2!Mo~|YUg#{qf%(Hz;&X5E&)2BNaQ((z;qj)JG??CxjwJlQPe@T?P zAshmxCtWp2oW+!Kle7#2#|X;Q!%^4Pu8IvuC_syBGBhx>Ua$)oAk`K7eUVA69;kXS z=4;j3RBSKQ^>m9XpCUVku*Mn$h#>^Lb0$XheDV+sIkBcnzLbL#6k+mkzhCiBR&p&Lh%G9j13CK=eOrt@#X0tGc+`^n=@2?uryQ5_jnJ5(C?b= zsN*W>3t56`$%|8{`kp1$^tTj}IXgO4h^+}HZO#Q|VU}J_{z4pcnw*gy4V+1~H45zq zn?!{`r`56acT<>4zUut$4x7hJw-Ev92Sh9j?h!QiY&xd^j8y1 zkkgac+fj)MiWx+Q!=0oDfh!A@ zLJ1q*l;<^TA#{K2`jbSP5cR6Y&GKp3$>YtOG10a=;4`ehT``JrG^0&#^RAF^kT!_M zVXe#WTxWuTHlQbAn!|cdj>Ym)jhfdte&uv>@XQ&_2;m66<&Jv_r6gC##92x$nVmx> zcD^lC^0>4`2mEP+g)0er8c}$$+Iy-xmz=E-R}2@M7su2;P_mGhG?)5GOf4g%IIx#L z7ynq&J=X{-&L6wCmt37-CO7|xkYY$CN9vy+HY2_OJ5SkVB14M+Vo^xqoLM})QEUw1 zfwK7Av^^S>(SGB=#d>e_KWF}@#heO4R7Zp-IScWW>&*qNtCaN1}&gXv7^ay0*A#vMMP0QjXR|$AjNV)9PQXzTfdG2(0G$n>Gw)D?{ynluvpCAQzFS@$ciLTGbj;$N^aAtPs_-`Um0HF;djMS=HZW>9W9jk1m2BbUV8bVf6ur5l0AFa z0=}e%ZOn?>NK8BP2{}}tnCe5NP+!jrnm9}l;O;*~rDl2W< zwr$(CRcYI{?UQ@oIB{deSs&J?`2%Le=%e@X^wuCv*UK1>2<$PshOH+gsDG1BC?V^f zWj6-~?i1~OP2`0AxS{2DF?V=0nkdKJ{D-TZ5)S?vc*9Iv!_Xp$ z&Cl;4umHWElw@x-WX$cmu6p5x1?Ei{;43#qcmX10J8*E2w%84%_j)xvA7(Q36C>c> zQLmsS37Yo|tm*jx`Zx->{%?%}=l>MPXJ%pkkMzo+=D0O&8~o-m%^767V*ZxEKmipRWqtJ#4(z!`C{_CU=bFh=2#Pl;d~)n)Tw%W-RfX)9FB~fRSb{ z*SF>S?Rm@XiLGSVR27d&6e5|%XI9sO(KpfQn>WY0KX$^U1=4RyHK+HY1@Cb$g(_z< zB+A&prI97KEQ0gs+QN%2_4>Fm?gw>ojoTJ(ad)|BFw^D z-g@Lw%o08^_g*yn_s)V^e==ksi}lRcT^bPAK))-Ef4Xy1(AyY{wVwCBY5o&LFX6SD z{(_v`9&rF4&I8L+f#aL;2 zm8{!1y-t+TqT+LVvDp-|=9RD9T&&Njk!iU9`Y_?R9nfgJ(+0rX5#`RkY%)o2Frl*l z?I(94o8CR5NU5TV1aF5%P+S7nIWHT$?Mf$fKCmEUTas1eS!~MB%g{q#5##-8ljkB? z#IQ!!Lu=enp(3C0)$n2PniiU86_%&f6lR8bf|if$4_S4ZLr?wUn;uAUb2?wJIWbSh zZ+h|kYVoAetoIdJHg3(y7E)#poerOhnY#%b$cDLn>6;s|FRQGM*yLe;DZb z6cQ39mWjnv`_(Wje7F~ z_<9fMB{x9wg7;Zw2>B5}TIBN-uQ+Y^%u&?+;Iiu_FD3jm}%N#zWS3hEs=T_&v0&F|y5FM#bbksMlMCWF28&bwd_y57M zB8w1*+%4BzU5&zRM6|a1md?31RE+bPBlwBWx_!v1nvISy$hA#`WuJ)GNDKdN%i!Cs z$KR0`Q)BOaTHfo2V}%MZhX~+Vo?p#)zqqhXG+D`K8BZp&*EvwngxB4lbk&s*rq=um@VlWuJSGh^fC6aff-5^{ z9l+IR!?(^;N{lfw-gK&NZ-98xXnk1Olw^aEgij7zc5YvFHYg_qWEP5<;F#tAv5U9u z^!vq|@lS#mpWMZC<6+^&{;$3_uVl;%sQCDlkiS`S0lwL!s*=%n6{e$jInuvBnLjY> zuU%vl6!hKIqK+a*mD8$yxHlPe!4ZqoJ?{L%L)3q$0?LYt>a$8pNU54`h*H?+HWBRLzqfxk@W6~?L1^YCXGwCEwp#%9LR;ZI z4MZ!V<}7B8vKreZ?4aqVl{PF_7{u+SsajPVC>?M&me8B{X%x)XfOI2|L@ zM$P_8R1d?2GZi6~nirN+Kp8pdgM0Q0c?L0cpV^}Ehh>)Sp1ox|NLy!ZVyx<2d({cj z_{TxGNHeLL%HQKn4UA!_(XWVm~T1|{ArklzT zQZEND#!~c5qN*YCDs?v>w3oT35(AU7-Pt15kx`Nj+ca<6abzmUAQe$`x;#{=q-ZkF zjaz)qaVw!kE6G-d`3knct*4`-7vkt1_dLGY>1}d8NM#W&Vq>aV#!cDHNk5&ZVp%DI zs1%Rq?Lw4WK7qV|!q|{oqEA{3h;x+{v9UB|wl%^t5+$DgiV4is=USlQT_Dy_t0oDQ z&B0l`AuB_1R(&kl?3MUs*SNgp7YH$iTY4A6IX_il6BWh`>w+r*^*-54{L~`wYXQ%1 zg3gPF&1P7Mr7wfGr{dI3UyM#?+b+-L9O81`RqMQxh(8@mi?F}l&d!`m)@PjyBAp{+ z=zAq66VEsKsLz0~v?aT;-cdy+1~^L#T5NoA>gRvZ2^IU^nXzTTSoF*UVdduDN(u0t&S-O^HmS$c?9?nXvU zDVY(=#(i$WW1dd?)j`chKUnReoeOUP^~7?9_eFRS=&&X{p|9;o zYn|F!aXQjW9rr4~0j`X_kThJ-z61j-b4sb4#?(pHU3#E2)=#Rad}7uxnvQWAjB?2` z%_o%pYl+)dwe12-CIu7Ld4e>UxFXkBcAa3PZQh~*wfg`hbwRf@DWWO_Kc(K7@x+e4 z`is@(#Rn(}XjEvRw5pYIJ@1yyTrfg@u`%G>3>#eEX{=`iKL;$-Us$l}D(hv(%0EPZ zj39N7%H&RKTEFjOAPG;wH?HU=#$)P)ZUPhaoA8(tv_Rr~8Egn9RkFNySFiq-4j(Xv>35 zB>l&aJJF^1JgePR^AQc=$ELu4JqjrG?R0B%o(8U!xHO16PqODSgl+ue%mf9s&RSpQ=PJA^$NeJ*@6rFH=Mx4lA5N&!LKcM#sp zI&^?D&33Q%ThG?2YgP8{Ar^^YtW`x99i~XDNmW0^Pu0=et{v zNbjY^^nmt$1UOq~nlBZWpNRFZbTCsAj<|jqV>r{nIoBkzjSo@b21KyHiQ(CHDEt*o zSL6dykCgZ(4Er-ud2UG+>M0%7+dCigbrMTISuLp_UE{_hZDq7{6@`!YN3-UUR zxM_)UT0de1QAE^?i+eS8Q6~YS2f}$QJlLmYlvY-ZwxB<|j=3opWXhT1;2&~p%!v`~ z{Tq4Pqz}=4*N|!4dM}baFKXQ+7;k%t&Gl6ih2z;}bW#P@*cz-swSTarHTDp| z#&Hj0wCImMd<|W{U#FJ@emOzK_CMC3w+sKvEr4AQ2Sf!h_ zS5SnV8(1fTyp1S6xGEA4{}VO5gIG~si#*KTN1j>Ljgf@Te#P~d@<{go?fgDcvNbCF(JM+qNNW3;)?k-npyjiQp4fE6v4 zR{azV+B&YdT!z0;$=bjziu(>aePb2xteR5Nnv(6ShXE}&o)+>jQr?kBmGIge>b`{T zUj#{qe97iTFKQDT;hJXpojX*;Eh`;!foMOeX}u3Yb>4y}S%1~(+f}K*g$@@UHouRZ zY`{mQ`MTG&!Y&eGImQi$BoVJpJBGAv`6Td6nX3`0+y^w z4HdQCDE^WJs?kww^U$kf@<3I(F>PhU!AMm!$t1@CAlVX%LH&Dw5fln2?M5`4ye1v> z-}_pQTX9g$mmN7-p{TFDxF0N6mcag!Z8t!VP;aW?_6k`b)osX@jZ^yqd8>e6KpX zG?mJGR8A0Mdnis$GTT*slmTP82ok<>f3e?H@SY0U#Eeeg`|t#tcH2V#Ze zu%T6QQ~-fzf1-*DgG1J9Y6Ig%j+>QX6S)*S4{E`vv)8HN$TMSgCuF5n1~A1hzEl^?#KM({eYS4sS>*~fz3M~s zEH!RAf}h6WV=aEhBXDQ)a3i1)zwc;Ji_e?2(@FTn#h~?av3<*-&wPaU*=vL2sn|XE9jr~|(fo00DoVW^m~Ay8_$pclKkwOfg6ScTvjo2I z?{w@`%-S0{QX0NRZya- zI#v37X?Ymny?Zf#>scDz{jLT=qQKd4jGmI7P15CbNVB~U-F^N+QW2@58UNSf{yz;) znEpR6tpBe~;{{PTN&F0)*7N`8Yi~p29ZZvE*c`}ydzK21CkV@uHZ~?$fp&%i{J>EN zs3Z%U-#6N(?)aBQcKFxv_-<>qUtf>rpXqC1GS6hq8ze7gW6o*?>(*jcY zd798wSp+YkRge3?;o*NIG=5O9Dwz@j*d-6r_|M#As!Y4`v*9d_gx~?Bs!EN-h>?SE zfs8f1uv_xc`!B1B1)K#7zq^E*ZGW>@XtvL>?Sfb3Gmr?L`sZS<7MuJH?&4#t3`>Wn zBNGX9l4ygZ=@!AZHnOOe`Ze?78LdvZ2w{--`Y6bYdz`q~ho_m4PyxqS3J9YF@e>$e z=gnz#V`qa)o8ed0EAyu6(KyS3WFVPimGrE7(S9sH6n|9#TRp#vx6$}(R5i%`X2*wJ zTkT)znspN}f4iSPMt$2>D1)IvQ^b*TXWDho=3Whp(?6#`2WmI9|EeAuBiy-Pdjnmv zjsNKKaE%mG0HL;-?C9cG@CMQT91`+pCm37lIlK=qMdPEj25a#hUuv8i_%`ShFJhMB z>fGQI!-YqbC)5d1>=T`qw0KN2uDSU;*{j5RytSVHTi#VCS%-O@*hf177$QlKaU}h* z+7Nn@*=$Tw%i9sYEcp^fCZYCV$!xJ*o=xW_w0TN|n;%ZAF_finnCINVgt(;eJL!X( zd#Z+*LI%G>4o^c?%^)-V>+y|D z%>l=pRE{AW-cj{*AkqdTF9jROtPW2IH9oV`D?R2kYjNhEYWwJ5rJ10yrql4TKPWLa zKgrbMh$O_fr}R*6VNh#H_i4w*dwWSL^TY!^W}RHm_>T%4#_TZ3#i6D0U@3n+(o?Fm zcAUh+@dCjl-6GRDJ?ci&us=mJbLL=GXY=(}igl&-dkLBqmAQFL^NZUjU20-CyUIOv ze1cpeJaApWlpwQ{_tC4`N4sTwr&fjChh|pli|~}{%L|w(xtbGNo?HPOVwi1c2tpCCbP!eUAbaqCEOUn3 zf4j3m1ihCIte<0_NUKGYvWmp31Tai(dqGccCzS0g|0-&f2e3AMvMlJzb-n38y_|8r zFn3tfu)kTi_qnv(Uu2IR*=u_Cl&9E#_xnDM`XX!!8y=FZv}reziusI8eHI5GYt>@a=z}J zm)aW~e1aW@QP?++)$6I)A(V5QZ?z!+s)2k;&B>d1B2&Khd>ISoUN)oK92}G&DRR47 zOgC;@K2zb~viUWr@e@+Tzuc?V+O}@Jt@dChZw`8AB?lfUBi}_RkXwm6Yg-r)i{fNOuXxd|FM+ZUjM9ZFUb}ePP`u0 z%uu%NR;jvVV`HDV&Kq_v>OPvmsa?4>HL0A&y>)HEoVqM2jxtvwI`nP5mqyawD6jP^ zl0sv@YQd>!aL!s@xv;RXOjt{e+z;hf>tNSW?1)ul=Q~QG)`Cxn&exCF($yzn<{O#^ z{Y77}|?dLFQ=vBKs1df5ETc{t*X!DtPZ^bk_`XO4`ks8a!`k*9 zK9AY_3@JH%&$%$X>&Z=Jq`Ut`6pzZ1)jLh!M%=4q*qR@EJU+@LMtnUCh7I1C%#F=}HFX#v$ahf3AStM~ zQ%&M{TxQ3daWr&lI2w+G4)pu%1R({b)iXKn&+TN!-4T9JvRQJ!jP_Nz9=C+3n+95O zr6)%o8Mo_$!%d_#DB^2&?9w)jOOhDLgoc?D*{C*Q*8A#?M&zN*UC6SmW-8S`5HqLlMUILMmWd%aZBl~ zlLJ+5tH-jPVFdz2$53m8@fG$)gtpY{5ehq#Wd{tKX1?i&$1K2mJ_4365k$b~VpI}x zEYrqPx8QZ@E0q9Y_(mxdC0ucZd=1rU)IQ8Ew>(dui&m*MFIwx-h#kd98(mj$$QdjE z-i#ED^M2WgM#xLNU;6%|iFOTMocH>D8NaG>RTrFu$;b2Zg6Mm8jVpcQ8w*Fi5bA1O zi+==y1~YdM;>K#tw*hn1{gwUGcS#2GCU1r4W83nk`D$>w6M$C=G}|9=mqlQL-{fpf z7J0PULMx(ZVWz}-;7)_+0yie9#w;H=aj3O=5WHHhS$1^EFrS&s`pKpty~0GFTARXp zj9WaNz@m>(hV$m|=JZBd=B?r@Tp1oY5^0sZ>OmI_>^@+iaUfK-)dnVQ$fkEDSPo7% zhp$X`h!W7$-=^iS$NXRcbbbt;vREY;g0P%hiDY8aSQt5NG_QMrpW~)#A+H|V#J+ZF z`4*mLVg46Dhb2|6*d%&L_C}+!$P}+3u+pmB%v4p;lMtotdA;eZj+}4-M39Jw|GNnx zD&#KgKH#pUEW`-(Dt}Y;!37od^4+Lr{!QNGxLdNA)mf2Qryih|k-3qnv?2Yg>rZeL zXzX*s(5B%A%;ou&yMC!*jjx|k9Q5@Ulo^@Vx+St1P{X6!ILdt24PUM;91#^H!o@94< zGLd`(gZfjm1yMfOaeZ=#WlQI5X8ep}pz74xf%nfqYW?qt=qirf;FEQrIfR#;Ho1&_ zTfSlExC8A}$)hakWBxTqa9-J_KEbT|5N7kb=))5-Uo%nVwD~I~Nx3JY1y#~G6es0; z7<;$80fi>(_Gxp#0)#AyL$tFlwijox>=Dk%9&&1SE@uIHz#63RS#?d_>FwDIN3oDj>} zmu*%0)|o`EXOKlh4t|WYnC&MpWnDbYa4uy0S2I`efZ5#5jgspx%NV(eM*CQ-0<)z< zIw1>l(WxQGI12a}zEtBVE~H+u*sMoRWa_X}dx3H1X(fchTo3z~YAu6q(e&0{me{sQ+m6Th?Rws! z`svq5Df1^`!}~=`vccK{fy&`NmQ!=#EuGB?+7k_nML}1M!J3>=Rkm5&Kf!mwi&_wk zEy=Fx@qooDHRQY8ZTzK-#mPTtEFHefV~L9lRTTtvKpj0m^Hkg{VruKXv_LeJm!zI= zS2jV&#{U1`g2lqf_`eM_S=j%>+5CSB77oYH%Bk7}K`nLM0<8K(o`6*aH&8idDHNdw(4mX5UvH(ndRod`^IuKT-9bGbp-!0U4^#vu{(INsK~Jx2 zk-WJmhr}9bB2QshZYSNOoQd7CYRTN2(iRN{R%npbi|OeWKepit)0>FctOA*P9tSH6 z>jFyxQ8(GY5x%tQ$^x!Xc7JFDUB_%;ADHO`T>8El9`MnmUZhW2eqa0I>IBzcX+M#B zIMwx0(dxL2*CW!MQA-&F=GFi~;VvyO_)u+m{Q?s6(er~Jy4OHurP*zo59j5b*x@)A zQ9&HS6!d;hvn}jDqhoXxk6#2ftyR{{azd|>nnDV6uWojOr=BD3*KP0#Wf>5;Nyc(N zD?g}V;{>ZMa4vp4mZll&ZIaY%^@xa9(q9KhOI|_aGC?IJKV_xB4@>ho6H_5?va)G} z)kAZv(Pueat4;IB2bfHm(X{tjDK}m!o6%>b3A|2C#5a{AqH2v*_NsnNAE!kwt?Aj` zB;_Mm`fo~WkYEXi83~8RK zpNbhV+2S^1pS{7rF6H_e#g8d3YzaI0XuDlVDQqH^jRIx&YGza4Ak5*d8M<2b9CTv+a~(gXF?@MYdh8T zt7Klj7>f!L2N@&@GiJk4VYl2Z(}Q=;WT!+EZdZQv`4_rFWl2u0pz0kOYABAS^zJk9 zYb`oXjcAs{yPBIhk3%j!unlLR*svxd>y`Vm;wph03%iX%0Q29q5(F4V z5;bpAAk>^k@7~`^oyOlbj9jnB7*1aUl69AL;)4LmO*nYNx&n$ompQs5KOtR)PdPWt-N1^kYsWRjk|gY(&MGey3)(;V-EkWwhSH_o``G3@z} zuWauez5_$1VkWV%8yq#2^!v235WdLTX-FY;?pW114Rbca>3~HJMFKf!w64f09)f&{ z9lbYyW#RL=^4VgmbFE^`KPxO|DQD;U(@rN(*=!A*v5pp7^Tz{e(o$MqYX!!Kz zEp_M#$#ImA(BvG{X!k}D1{gZFHpk6H*IHnVTC1~k z&jt3gRm?9hPXsG$-?K`ap-rFSU<6IUwnNjbarS}_!$BGqUdAU4lj`)Vf+pimWknXH zADoDl#x7(LCQ2=0*u#3 zw$q9>kkIQ-zc(a3hCe&GH6iTQrrt>aj)Cp zx)Q^i7U*_7%~liif}C>*m3D{yvN589OzcaQ#B4ev%Q5EC2$~+BxAR;T|MXvx!CdL) z=ho}HnJEZgDO+n)g)k^+D^G<07!>^bcTs!9ay%FmDq#XS=oJhZ9w`hyJGk%ndUDaB z{Pzb3?2hDVmTT009}O-Jh7W}NjH5g~`rrTS(aiEc?cT94{YP5!Qe!;&oE>iSndSpj zfh^t~SP=b31+l5)=q!REVLT^uy;uGA1Kg@TRF~yxNf3m@oWP7WQt%87*^>yi3BY3g zPU{2xKHvRF%JDutuNnF*DcK#-vkj%@wjG!^vK4j12+jiSUf(@^jpR^jF8tp*S^KT6!d5T_&th zgY*&Oi)WWJCo6^t^;U?1H)_aI|q!&;M*XC-NLJ z7WWd+$r$E6Z#C}%B}s+t-ZJyoU!<4>&Kbeb{!Qc33q9kKSM|2<)dG?~c}-9W$+JWg z>a$xpkIY~($Zj8j`}z0>$ignmamDmRv@GgqFDPjwY#VTegx+BY5inNNYj-5BcnYi5 zZGya(PgozBRqhNwiU!&7phNJ8FYXg2kWxOn@v$GRCY?)+z)VCJkylx^YDjhL=-uZZ zc`mKST$71^QQ6dsC?im*)l<}@ElK#vU7c2xhI5DY(8`s3VA)PgE$Ph>FBPXIn!}SlFtu#bJtZ-l?GTiiPT~wLI?$R?MIm>YK{DxC1pB z?P~IaHF=X%Ub~1~!<|~r0Q%a@+sq7rtr*6Q?k&Xhr?l$0T+0i*_V3-N&~NwvJ^*(Rt|G?xpvi>_+dU!GgG>iwe<;iqF#^fhw6fWlLuFbUV~MscZ_{ zN!O)3y37+O&@%N>2c7KAqQj^MTPL%XYiE5ytZF)f=Mx7GR4?Ky8^`6t^d95uPTP(? zs5wj$sf4!2Cr<@8w0rMHC%*w4DZdk8#&21Yb2dKCRtEkgGRepAUY6tml+oG@9o)3@ zj`}w8k9Zu4R0G&~&8@e?(+%KYfK0xU^8jD*N9_@|G3i<&GIm>AJtl4N3z-j5zVsNLq87|GSQkZZ?4O_?rUa^UO-b!;&}3?JWb#aN36FvEZYD&!>Ra17m?x!C z-G?o`y1FkO?zctuc2Z55=^kqCi7-x9>v3QV?U$(4It)Apw_o7OdO1fAPoLVVt`;1h zPM)8(sYG`y$UNXS&h=R}m=qqb4Z0K^H{{HiECnb9&$}JVJHT>(h2oD%x_13v@y=Yt zsPlh4ZU49RD(3&3++1o*{xHA(4}0YSL_s9{4b&eO{b$qp|3>2_$p0_i(Cah)t?qDT z%9W+pv7;fCi6>b+?n78Hhxe@EN2U#_Ebzs4b{Cf8y?=ha`Z=KR`B9-FK@p>imy-mE z=cx>c@pL(Rc{tv}JdYwe_&IE&`b-RX@V~gfrq=T2+08==t!h<}HD-D1YN^Jaw6kyR zSGXLBk;SO?VCg;iF;2@0d5pwlJMk?PcHSM@Oh!v|e_7eBQrI~)Cr@PBI1M@{%MIIPG0P_t)P8amYVTR&js68 zQu3o+CnKk8#;Rll9c8IQ+u4=WigIZLq);}Ou8a)nG&c)T9^8E#mh#cyDaz|9gIsFM z1AwaS&KD_+0_OSpI3Hr(guG~F`kaii#4`eEgH;XkRX0|IyjOs^)}*ZP8UN`*8#}HX zLekvRb}+cD)Q&&1O3xO_{Z)-}6X}e`{?&E>qry7q`UN1_7?P&?OTa3MMM9W2*qTN+}MX^k@BnQH2LN&QvyAxOakbw=LNi>B|j?({qg= z4Iw>O$%0{vgVY1Tv0uKw@c}`l7yWa~J_Zvx&1jm_hLczK4q=aRT>-UUp}kOBD=WB%bj|i`UEO-fK^AO-mxN^FPJ`PqcTR$n z> z#I@Q-e_@vtOAl$a^XSUUhNOPdzrP0y{WekmBzZeMn4f^clDtVbm$ST)R-dH|Eeqt~;1 zRtK3M2&o&!KDIPHiE=QV0~~08ULl4#36sp|KCcQ-=AHm}F5Ru=16KDy0^YGGknU)l zIMjtle6clO$i!ckxC*ZO1w6MtF#}D5-=BN7+b(9i`QM-SN5vi?04aiq?Dtd@7+M0q zFaWk2W{9e5VGB25g2}Phmvim!Y^!#;Y+(H)9+PwzscgTFBbw2BB*)ll0&>CSyvJNG z!=+u~285m$}>xLeY*VdMv}52b={-Af*M`ex+Z8k34oAVle`6UIyyNy=p#7nJ%ZQWW`0(?37uOJ+KCd6W8rc^moyJf>s+niY zQgPqtzwzYBAvj=?^vLnc={!Wnbl#;Oh9XXEC?OuQ~dB9!_}xUB`L1 z%_2^fAmPl}R+~^h(5}7*9w>XCoq=u<_ng*qly_Dj~VT5On=`CZx8Jr3^*o?h$gS zh-o8Hs2$u8A3C#ry1vcczOuoGRrQJNZs{S^B{#$nNQ*Ucij|5kXAUPZevy;4DuD$7 z{YLT)5nIT+q_gf31J& zEc{#tN(Y-uWVEbF+Txi2%8L8l`*;Ktv6wDg`fw)^`jnAAz)Aa zXX0|>nzH|XQ`-*?*`dJKYYQ^wJ7eomj|w|(|G|QR8WKKkpZ|_BxF^}@PJDDVof{t4 z3I@oXsG5O6u4b)1ldU6w`XUdLgu z&Z}n$HD;Am6bh$BQz5IEDJ@Bf~w$9X&KT)dF1ZRej| z$KxwkOSt|>0>3h`TpD^>Iz`S(o1p$AOLjk0P=!tWlr>RZ|ggm>JJV=^n- z#|PI_N&%%pya2W?4EsU#Nai~9;j+pzL{OsdCnrC_ba$R3G+M3KmZCD=S^DFkcyAAiPIlxTsd(#| z5=ap@i2Gr2_gaEfDs$cKtAAUF@lXS*X8Swh5W^uouX38>@-=`hx_cI zj_so9Y@Im5sICQBh797gC>z@jZSp%Oi#^I(_qn?*BSbQbC3(|2d!crow}7VgDqE!u zfL5W5!sIJOw}E-QiO1K}Q`cG5hdAlBy@bSe%5Q<*MOWz|>MfO!LjnzogA2U`|M~X5 zc!aNIPvq0Om96tBfr3)v;{9Eo{j_`Tu?F(3toO}q-S^S-4BVs^AIbj#>Gbsd+2<%3 zNcrNo|!hroD$DP4Ovt^mMOU(Y@4qRuWwB}K6G1p?R=^r-~ zcm9{PJC|pV=d$HS!;vc{uhK~2kGLkNaf7TTi;<;6NAkQ&T#B6%UP4CTW+=J)i z^+D_T9_8%p9w@4Q^kM3EMP(z8yfdW@k`4*XVK|&fukT$Tv9rBLGG(6ojzW)epd|iw z(I}@-DC(KuE?3|ux=U0EajecEt5RhjM_gVrWiIYOv~ zr-owawb;+n^Uw4)ry<+rCWD_l?~DNNu$kcEKz*W{MePQnQa48$!RRA^qkc<^sbWK-FK)L zyxIM5;I&#jWEfKJx0P(!igJfkD@!~Y#bk0$U1AG`3R(-=B%ODxhi5D!OCFQ1V|<7! zI8&|E_+mbEt!MZSP24Y|WTDXabHBqHH;a1SO7$*5Lt>+%40z_B5p!W59)kngjH@i^vx zl+^-9MoB8JhM~gbi`jJ!?IgXw%$dxW({Ksu{XE!D2Vf?0E6Xg-5y*XE%84y|867N@ z4B>?To|G{;Ldrv_kz@~(JP=XUAQ@1g936||u=J?eJJ_Mk?Z;<^2m5;DldS{x(etaq zjT~$y3L(ZpGww=p3JH;~{~_rR)a(315=Qi_rNe*J`owf2Yq2NsJ#gRed^@AGYZ9$L zTRQeH6`C6dBV-vK^`9-&PfS`|QHr{7uXV(Bp|rQD%60V%4_ z7xLN7V=Tj+#D5wd!Dgz9LK>zO@o9FwFs0Jfau~h4)p@*sxHo=#mtuoN!*GxOZmynh zno!JoD+(#%Y^q4vY9e!wXRER)SY$EZeync5j7?k8=*ERnbBvbf$U#AcA|;iWNt(*a z##;)BTC&iwbFIwp-=ejM*bZLF#VVO;V@~jA0B4aeQ_72;yLnA=p2W)QDr-^8jc05( zy9m8sLQi7O(|sr_qGa;`kpe--DlCZQPnYv*rggOr)}QUWHaP6Py>=0(7!cKjiOC8Y z>~&TtH}As+RqJGfIj?Ni4cjQd~xv1tJ%@xB@xK?<@Uo_wr+6X2fvT5`{AG(Y!pP zy&_))XDPDT!})F$9$v9Ua$Xc3+D+VV1!T2GtL-Urv(**1nMxaCMCu} za{M2#wibEv|FtyzPg)ITMz;TWe_hlB#QbPAuI_0*Acx~hQ{dr>p<=hNnHs zrfb`&e0d8iCYowxduJ?vHbL;#~Z>;|Gxb^D%b)O3(40T-NJ&Z_$@_ z!2ZI@$5YA-R3hYrSPYCjJTolj;I zFyrts&D5*^IF;XcfnB@6*fVMr^p|};WQtxu$Op~FEi^{rd!)^8@BN&py4O37Y#X9I zat15D1CBImD{LMc=^m?Yh7|rB?;pb6Z~admzj*evS&f;w=dw%D4x#nX;a9FG8??dWqgZp)b3{eb zEYuuQ**shKvEXv<(-wN_`p67YCQNyAmzN;1#domRg_1liMU-A+0ItmQE0H`Dy9_b2 z?|gGETzsdnV^O7JG!KFFe=PVm9s#Jh)HPRQ`$X4QUP*hp7v)z8=u2DaC6BmyImP8> zLmssi`+u84@|`zk_!|DM>4*Kk!yz(+S%;07MfH=kmBAb>o29H&{(FC#mC+wd zzmaj5SgQ7GchF>n-S}Ez{91l2OeQ~8@48vv(|IJ-k06nRe3FK6SAG$7jp7|l6}yj?_X_4*`oa+F9@*9&$+iN@5D2lwEEk*JEMC-NSS4K(qMWZ5 zCn>kcX{LfvHWB0nUex(TBpDW)%UZ3V4k{2tTS-K7wwbrk1ziN!gh=8PqKMFNp4m?h z&}2Dhq!FT?TJxI(a?B0t>~&*;Z=|)+$a3^C#)mmtuH&{q`ZzJPlEFBr&Bdc3K>dqZ z_G_kwvLKEZw)aFAE(8(OB(T@yEU!;GHxf`t$?{0_Z=zIi^i`5%Btu1YaPJ%i21FLD z3=SATqHa5w9h9tldgU%6X4!FzCVwD?E5yWa(~fMA<#p&md*v5ZCJgal%{U#oOqfdI zQXgt=JM3s3nr|7mwBzB}oOns45?(S$a+s##YycA-OOcg*$J58pZ-!^aZ8TDJQ1Wo3 zUugiWT3(q}{sbi>xCPY!3_9U-`L)}&;;z_y1;l)0UYj5u$T!r6z%FalH+;WjIy*iT zF+yp>*gsQ7dpHrTJ}xjFb{5@)OZsfN>c(0e*7wmXCMmBg_%JdgTfwg3xB$ z85IT~IX>VP0g_%#b1QSxrmd?R=47tsWzp&h+)+R_5T{_&T!OXQYNj+?W@D?gu{)<$LdmneYrr zhkPF3vw%|9i=4avGFBm@X1Kg>$_xhhjV?7VAB9 z&;Z<5^XSY!YIMbR@;PHEj%>kNZVfT5Jh;z!*$;vj(_=MzeJXvWy=EEgKkMgPOWiHh z1Rv{?jIHaENn>lP^t0BenmUxlbduhlyIt^*#tqP_K5cW!OK<+AR+i`A%hs{8i{{Qe zncM7IMQ|{4a`L9ZN}?ybN*|_nDQVg}F*owC7|p*>{uQT_AARKH1C^3_=u17OZ{JRb z#xSIB7e47wB<(kvP;Y*umC_SFC;f;1qRZAiXpP~3;}U$!cpd5>i`~-29lEoTD|$U6eo4ahK|at9e2x$a=}?tjfz6<001r1&Rc5Q&zSd$s}{7~e%kLWuq~npF=05^0O$2ODz6h?Wpig;x!x{(qBr>W+5?R&lXwmj%Km=v z(NvQK#iB9nvnoc&UtMW03xA&W?0swhWKp#--BYy0w5Hxo)ZKRd5v3vbaiz=r9COiXEV?^>v!$xFRH)E~3UuPMZ}r#J#|{?WY}i3Csoil%}fc2V->y zI06;r{hj*p56k-k8#icinvzbXWe+;}_G+f1_KnWR1&ME?^*0?3v<(X4U*Q+Sa9k|9 zO;83Rt&#Caa|zz(JYIEy+Qn1(*Z`yUP93DAx`-1+RuGt;<7d-(o88XH|B&Fii<{=o z9Ch5#37NeVF_V7P1+|`gTb9|&U8Egxyssh-s7)+71 z(lh@DQ~l_-B9Mp;`j#LB_EBmRy(a$5i^mj?{3g3MV-or`D)Xt4|u#L}bz_P*pHZpUV43dE(TLRr}}ry#nf92y?M6kl4S0vDP^e$%H8lT+{m4 z!o+DLt?z46OQwkln^6hdwSsw)?&;5Wn(zhq~!_cs3m8bp>Y_DSkf%& zNAOE!-g(^RQAW>H4_6&{Nw6nY-K{C}X~|5dZ&uip)=bcl`YjZ+yZVsEwUJF;Vxlwr z!h0f5_?;#^}^8#xXg_gXkl-e0`xruH?1GqzaEuEox=e& zcU_tf4`Bv_($>k@{YYf2+1v5d4yDk$06XtRcF4G;j2@{)(H=|dYU99pR-Q8VZ-nrg zN@zBa)b!OS$R8X9>kw@+o}j{oIa0oCb#C$>t~<%TQof9#-)Dn=@^)A+?9VANDCXsM zvK622g|xGU<2PJOb@GJpt9sXy0-3I^6G!c&MHDmtQLtTK+fUn039?M{!D1jB+?EZ# z7}|T5Ku4QnexqmJ7eM8)eDQvAd-5CJQW^TDiL5bZ18qK@4Uee0f*yyWlXDF+8D}8F z0oVX-`8_l~c+|TGhNL1}1>r+Xt(np`f4V@^oNM6#GW8t-rV6m@wCi|lQW zr&B~$1KtjEDv1HK^K=3Rb^Wj4zW!p<`IDcZ~)JWm+jSoT2H4 zbQ`*hYGBTJ*{%>^RT}>*QS-+{;ewID>S4mD-qqP{usVFu7~5luk*hj8qG2+TCC$ZP z8DJJGTxd00uHBo23z;j2WwGW1Tj@{WIct)e?nAvUmcqu+>|HEAeHsRLgRlv;_-Vioo4U0ZOVPM&3>|6 zZES`3;MEfySTNyZFckmnhf8ihtyVkw#iPS1{;OLm!pw&F);^f1-oN|GgR*O5JRucv zyC0!Ioc_^*SOW$fkHn!z`tj%dQ~E<8?yoJmW>K}uF`fK4wag45)SaqERlMQKHJP#@ zb15m3zw9B}6cW3eLuBK0UO{`}Hnxh3P~P!l4s-@q354+5-Zmepg;D7plGY?0t;!^q z?Z#}pC=5D)RkrGAp<_Ji)seP_h~;BERQ`PdRc5NQ5`2bs7;$6>4TcOjyhYPC_wiIV zWy3>qCtDMU#dGhkY9~MjlgaX0E%7(zXl9Qb^~+Rt(R8eLPJLyK+ehbz>ht<^%+?}7 z*_#FQnq`WhDmm~fC8j>%A!X-03r2OU{ojv>qm50*>*a|T};q* zsm8USErNAp{hf+miJ@7HI9Nb&Zgw#l!Ys#jvx>~PpaXPUy@ya?Pu|DVnjRL>U% zx0`Kc_ni##AaGOT&^N1C?~j)t6cpcIpGk2$7C>=wL_RvTKeWl0QaN1w*H?Gb=X6ye zB4>+QjNJ4Xb>ZlOX}wiT-zZHe1UA7~rnGxx=&|!4dTZU^b?>Za3x;0Y)*M9CLl+va zOJOWJ^x0c`xIfbNf|F^$be82H<$!y>5#vHdxiH+S#;7J2UW9^a7oxTR*)o?c|F(RO z8s#5XUGzmYNoeC^onl^h)v7Pbq_P4fK)WIq(R#mIiE7F5NTCZw#FQr(^;zz>uK_%C z$J?RXSeUp?!tD{5EJRO9pjXifCjak2+_BI|N>r=x5QegOGcs*+d!X15Pj5k{*hh+3 zfeK;K|MOT#oVb)FBX?Tb&pis#9nRQOUFX6dwRqtG7i#DX=)fP90VU7{a-yKLnIK%w zlI6n_$F5bLgjVn2R%O|fmnaM?(dYG)WC~fkT*9%B(a8f5cC?X63zhYP8hUzUg#0>b z!;dBsj5%YvgW)RJm&ZeU4}64Q*yLpYy%P~A&QaW?)~L<2>J=2(HHKnwnI&Z-qm^kV zJqB`!pP&(65IRTFM494>UTv$u{U29c%|&d!6a{0i2DZ1yyPW(*VomOb2^$v<_YX$K zThB%IkLg&JIs0?x2M1%JToIWLQHfl}OWDJwMd9?ze%8pk>&?S0%Y27oIAG2jrrA&R z%4pEc$A`|`E{)#D@B>R{K2NiU1IK$L+Mv&bHMrsR)x>2>B>s<4$4^L2?$%HIl3&B0 zf@foP(28MQiz~zP@wdPIAvWJ2+;3F*|8*f^R3R>k20QHX?pm2^qyo3->meoHD!c@TmrM}YBiz^RQT&~sO(D;DsqN! z5|VxBk@#CHcY`o>etB+YwIbj}vPEE95KB;TB0IvJ$V)7dfV<@11Ei@O-mty~X~aXF zKRTNE2O>>UV`Dz1Zs+T?J^pxyH_vv1^&Jg+sB#>KtBFKIqHS@+%A9jjK%pM=+?HDA zeI>Y^5_dZE1;6ZWeZKet^3M z{eK-{Rvy>e_jBW2-07)4yBd7Tc2%*Dm@-+V57|f&`TIhs+mL`!nVgn-_rYOI-THSd zV?q}rSM?`hP7t;X&0Y*#4KYVo5|}3xU0rj z_0#H6MLWe=-WCr3+#+|DY~=d3$-1Bx%B8|>qcT+e0S*tt%O$F!8o2$l3*?}fYbqQ_dY62iRTk?SQb$S{_ zf>bFMq|7wU*Ttv+ZHF_iNDt!wy6XLk(+|r|5IgpvggzZKX87@pq}00)vlyOi<+?!> zkB+=WqiX~VC$G2%vt0^OyrXbJSpMO20#>F7-+J%O5dP8LMZW}13RiXIe`TQH(4mqS@8cIomNb|0lC14(c3!6Bqc z%t(p&p%eL`-is${Z{9g3U#2o_YzfUt&K5ftLRBuzvU`MqWMWaK*%~978{x?2H#>62Lt=X}yRBXfJstye#ECa)Pv>6byhq$aSVy)GI@nTIder!P6( z8=GPi@WBg&Rp%V0WfoL9BkimXiL<7Y4OYE{5%&&gi z_7pVw*RP^r7~OOh8;b`P=7|S@a`*gH_8b6JQi8!Uuveaos>^d(zsR<3 z!7#EiujM^rno@smmv&$ZP1Egg1c~{ebCj^lFqc(lujeKyuReLt=Gj*v7{Pv;2xvCI zrSpGl6N5w5{m_Ye%`ay31^0bQIob^dDg4E4{q)31CtrvTjWl4I#L&o)H{nvAJ6;`^o$t>*cp#C&7Om zIR9H{mW}y83M;SFC!!5mptl}SUcf1dr#0H!p@{kQ+45aNg;kW$u#6d~ymMBg6E;Pa zev!=>fa$bbD*Gd0SJ0&U4TlIjD}7XTAAvV2KvcBxe*NbE+xMICukk1LF-4~8Dc zCau(DaJZs{yyHnZZHX6YqBWxX2^2cJK|bB+deU)PJ`5`uD|TS2tUQLyZd6RISFVe) z222`VEy|x^gfuorv)lu}9hKX7jcEJqFIViXCc{8q&fh&p9|h>Qw>wdOJ~1~jR?Uny zC1}%?Xmt&B$(3G12!RU1uj9*CECl%$FyuE&CdMf z@?~G&X79{psRxhXNoR+}2@FTW!Dk1DjViRzHQqVi*}S%XF9v?#MFtq4$^y>vC3-@h z6gmWYu7#k4v?za%laY8Tn%UhKy(B56} ze_x^5(w*boj6fBi>s|77B^t^HiBv^8)apyQNoRjwHelg)?9UNva zG!g0@P@Xom4T;#NT9se4^0Gq-Y@b|cLDR5$!T!W9D`(`Dq`c`yCu)W=ZME4u3?c)Q zOZ5X>+s$CzRkVY#uXA@wYhnKA3>VNLCm;|O-o!TA;78tm zr(7*inl>~%-W3R~+L1iEYVcYubSX8FVlu+(n<0|70H;-gSL6T#mK`uwU*v$*$P#c^ z-LNC?@EbM42DyC&RR4)bmwlO?z%Dsj`Iaj-+(!8yc}6Lcp3=3FrM4w;3K~l@>a_5j%r8+lqn>q?8PS@~kIlz5+ z8h=-`BCCRjFEygaOx{Vi&FY3&deiN>dQM#5KTvaU&J&th`*s#mCR+D&4=n>EBaT@) zSU@H?za`A%0q@}3-QlPC4k4*Omh1f!fQNv?)fBCmLf#ih3YVnWS2eN~NiYTh<7?#R zp;Z{+aN7U08e)ww34KEtukxfk$Q2sp1WmxuOl3RG9iW_s#uOztdyI{_lDGm>RH{N? zny^~C9Z73^%USYQhb6f+6dIlZ|pZaL;`eu4tAg16c>1;mm{_Q&_9I6|uZA<`>j2^F;*lV~}onXQj(`P(5tWc{Cx)Cm24!+Oz2e11L32qF_^S{kSrvFLKWnlYHId|&+ zBfdNWE069|=H?0d{y)T*zGe}JG3?{S9k`Z#8MSLODNKw4t8l_!1bG)_d|J1(BjGV0 zCk6e_sN;{h_m?%VPI^yIrwrc@X|a(u@#vXT4slk};)1aM8&&bjRSnu-Vv<0=uS&Gx zR4cW~8lK-m;swZWqEmN3E6hC+h>%;`yMW&48uEHb1nr~s$5l_bGceGHKnku@GlEyx z9z99kwyXdfH=iA(lcU{@x8w{c>eMssHOrN|_g&NwfT#Fm1D}iAjVi4gpPp}quXj$b z4CAKKvz^c~L?#3CcTPJ(Q+^E+C-%*OfDDU6b@d58 zqDpTRSZoUln_ltc2Vp_ucOa${No#jgH(gE=%jLhI8%b%>b{{Lb60Y>B@INVYPI;*6 z=8+%KvNVO%u?(Je}@r{XS;~YYRQ=AIYBG@^oq`r@4Q||SJk2R2fm7P9DnIkVUa1q| zQAi`e(E2EyGGH6(z+l1XBln_QRKB1+4vuRqcVaSP{tf(w8?Im_s1TkM!1X~)9C-XE z6y%YVSaRKyySodK)&n+NAz@)TyEqBNSw@J&h$wv=1pQ)@ycA!ia{V0%=lJ5WWO6@LR0uC%vbgI z5RS$o!hA>=elkJ+F2w13f2UqnV{~}R2%Z%*awT(RZSRXNj3Ps&5vlRfxqbGqnM!g`lw)JO4YeZX8c_3PWdqg!tUpAHtnVTI1_Y@nhbhP(-Qidq z!!x$2=I`*OE(*zN(2JE1(Rrjy@x7{SD+;7;|6$bY-MMFy?Ulv)WRiiixCFS-deUCp zb;{!eS+m~Lv*S4YV;3*?>JrVFsS0!XgVEfgFMoW))OQw;{xb@_1vLqmUL9iij>qVT z*8C#AQn{+1c;7?|u0+Z`1iNY62>;xS!J{QP+qe-K?^o3CW0MvuXN>*;m-thM$;9*Q z&+zOJFSk5yYK$62@-mXV!=CS2Y|okC)L!Nj>i0&w^A|5ds4eZUI@40zF#%8Xyns$Q zjyKsH4?^|{E6E!ILSRtsu<)%2!%gTtQvH{*E#=6wFM1I3V3fz=SpaaI{v2?%nl zo;st`AW!6$g9oRbO!mI`Mhlcoix{>4O z^g=Xb9}U&3TN1)t7dS?o(vgf8dk*sSocDwgA6=w9f{n!rHWFGn0ra{BNF{JQVSOdF zW9LGe@z~3DXXg69gb^hjGNNW~N^7rqXNKxdhZLmC9sf_7GyVPp`IIKtvB1r8nfGnN zlGuD?*&ub9NFJWekwk)g(^V#Y`dHeMksu|JEl438^;~6l@o{&cpi+lnttE`4^AN8< zC67Yd6^>KUJ%3&MwqY@uH$oy|JR!wBWdjDQqqv|DB)Ks!94t0v8QDcihlD@kuMu7v zL5l$&JjHL+xveAv#o#N3nfGc6noamioMUfT3#sWHPMEZfn~28|_N4XMVVcw7wTe%z zJdH*rt?OLFESW&n-|dn$XQoq2(6o|g0$1i_ba4z)0K7~?7wJx__A%4l3AlBa^9?jE z*%jpP4Zl`*;m{j!jZbVRPPc18*be;7#y!yTAV~%|wm-HH04*~ZWVw?sjJacyZXwAl zj%Q{tup$!YOPbm3$}+bZBu(wc%#HJIaL477n&VHC>`|c3oRYTs^VM*xm8R!8(rv$c zXrxgds)L9LMyW+2vkr@mrM%<_Zn;TyP6L^>5KW`KA@F3bYD9$n(@?=H$}!X|C=>|> zGtOtfmY9HvJTV*?uPVwGVh4@ZrH#Rzuy04fN|}lj8oHOTESrpBBO2I8#(t{Cc7vGF zlxpPCS6rmn&a%Wt{$In65=kDBNfJpne1&Ku9zaSTv=txA2AIFWH>?gPER9bLHw95* z7s$Dzb&yu2Cj3o@8uha{=;zff_?3<5fnj5^)s+KY#x4PcNSC3NtcF zqE>iZRnc!en+MABeSs@w-Ru6>$@o9HrWn{+{zIZX`jsfL+5T^d@(WlpVF*iAO1GDF zSL)U{I3OzvhfFzlw8v&yxISiW0FfHdfAN$g!>PVpHKxH+eN%sfuf@>x=j#5kF3Q_# zMyKPYWauzG#Rv5yD~y-UWe%&>`mNO!PujV9=CkXw+f&usUDf-Ogm!5W#LTUgQP1y) z7Bs;?3zybsQv*uZ%2c-e%5NbH7;D{;l5F%UE1`)Y^V)Rxt;5P^mxnS#|K!N6&rsR!6v+9A{B{>#iWMD!c03ze~~bsMZ>Q^0f_1i^oD z9^;R!%XWd$_jpGRak4Aw0WtEOdfp#rDX~_N*xN}iL|TIq`gc|W5@;t@2$ZnSNx}`< z5m!0{%~vWB2FVDyQ}7X}iEM|^9(v?vSCQFulN8}mZM2l(rI!J}APlNOp@c(+X-)lrO6)q6yC;wWuwOOn|XiBWJH3xqdQB%2uhe%aBsViXQ16nNq*f@e}N}zR$<}B zNv({HhPA#}sfy4yrSe3O6v6-abrYqhKbm4HYGob4?|;c>jjr1BQ7pAkuL_RL9H|%S z3w6b##T5oV9NsWun6D*a8XhI#M`U(p=`Vt9KgmITx{YQ(_#FBwdQfh=QI^h{J4aQy z3Nn?h(rI=o?Q8b)ARlbV!*{78-g=WK{=R%mwZi z)tYj#RH`q59e<5l95^l8z7no%aW6Q@$PaW4U)%9s1%5n5-x8}#CQMZzf3CZ+!~G68H>b7ud$+*jeKjozKHL0bxUtf91yX| zYp+fLI$|b9ow*O~HXCi+qG3=H>mZR#_yeybu)VxVkg8MCsDeCf7Mtzsh=gUU&6wpp z#&*<-oK22e5AsBZXzx@y#hkOvmUQSYqEv(1&pe5-iUS}F2(fRXuca_Z6b>BdtY`$V z(rqy?<*C$QUC^RCBa4XsU@jip%Wj0P-pX(5<*nE14)j!k`G;{3ppK6%#ttvSWUBTd zgUD@za~@gi9>Didvx)%chCNCPPaVzljcoyTrz?(+12Q^I07|R@R8^e;P&hb;j*le* z)#M*_3QQQ9J8f8FbbWHeGpUwz2@PKW*S?|C__SG@;0ctaVh@b_F+O2t!Y*TNXiTC~ zCB<>!EN|y+=WqM~*D!6$2AKr)JYG~8ccqwJn$>5tqtQG#ib?ELM)^B8|Gh)pCp~kp z@dDYc4KUqBHR!d+CD12yVfdFGn-i%GSJ>@@43kBN_@aJi^L? zDW{2Yo+W=LQkAgKz$@m?KCKTWU;$bxO{98UI|_QsWw&`|FwZCyU5Q`t_Q^WG|FEr8rDkEtV*8J-I#q^ZL^UU{AzmYv=CpB6&U}7_{<_ z>kMa7shx&vQOs6D?g(%BqIiH;XO&<*%;w!I?_br{f^_W~mBs~U-cJ5?dsV+u^gt99 zT2#(kpA%<@6{*{D)LTk|YnJsP#)5B2T=3WuO$5oL+b#hf0JS_ZLyP++tDMU1txlCs(OlvCZGYMCTUUr_1 zR99)Cix!9kSR1_#?{Ie20t~W6nljrVbx>Z&CP?uCVfuAT!PV8kGp9;4Y+Fbwj}Sh` zaZ?YhKphB$b4cV((|8XmynE03O=G^tS>rjk%?>OQFsFNeXxm$RfsVuAz=h2w$pvy+ zd@oyoL#S?LMab^v4!}uYP2DdHzQ5n{)1%JqVkqHHp0#(Z8&1JWP3YWC&`N;~45z1q zE00!N{SVpZmunzp59sDsum>cW$rP8>clz^u4DC$9*3Mp*-*;vA4H-TL+MSBMjr2Xw zT=-@~AWaC|uYK7ReBSE64r2EIsiTCAiT?k8E8J3>vi@}({if!RK`SK+g~WaL1pS)% zZ6c19AK^FdwA({?o}MHn@Xz?DaxNkx83DDA|Mc=uw^U+zYIS@%e|qtJy*+L`J|vW0IQR?fn8I+PKUvXuyptM? zNrwzR*bix(@*?=bZhTcPnFGfcayT2JbL<%tj#SxR$Y;c*R1Hm^v`hD@zv1)PDsm}vHE7nA2-*M* zp6zCi`7NSD1K6~)a~Jnk`Q7*eu5k`2;+Tm3CT#NbhK@Na!|=J-rG_;uXZveq>#=Oh zI{K_}@YdMV0$R?@V)+gv6Q6O;KV>sym1MluESopRM3-KU>@Kd4h5~(#>xy zui+KVTUMK@8HNq75Z2H)tgX|e_L5@H@pn~m_F%S#=#*}3l`|Xgl7#pLEol|vfTy`B zV(QAI1#R2QfPxXTI9Y^{UPU)v9LHCk={99fK{gzsxDY?O9B1gfmL4oRK96&fX`P@a z5IZLdb;+W=0uYwWQ;Z#9NG{i8s0p9%8lK)LEH6E_ifSP#%vVMR>y3$z9HdB`?bW%=qOt2d*Od}kFXs{wFYbdLWxIpfw;?o8yZlRPtgH;@$ zxOk=4DR+8Qz@Orxjg&?L$q1L>0(do+B=>0It=X0xx|=%V(0Uy&%RyA=`ky=SfV2MC zkkz*PwZbAVEIH05oSE8SURHU~ScdI}=%#4^J z0z|7`obF)Hbcv1E+c#O#!!jU5^=-A|z28HJ|9EXDv{d-+-%0h&Xe1=E%~(i3uF7A) zm5KBuuhAXu1e`N6u+sip=@@P>fU}Y$PBeM)mKra%7ARo)Hy9=Q??%CV&R=8O%%xUn zA!frRFp?}vGMOb(5UdDFvO9Bb0*w`;tF4mF9#lD3-%N0L`xWoJDzj}lMcW^;~JbE6tp_(fC!=(<_#-#P+Edn z9sU1in>NY3_gY-UT*#)>6u<7RLw3DEekMT!L(B&a}MT11Yd>vrWiVt z7*VvWqsDK03da_F#bp;})f+Ac0Pf)r9u8S>%>19vl+!@=lEOQ5^)xD(n{8Qy!`(M> z;m}(vM{oC~cMj9+^o z_o%cW&nyIObP-xxd&M?$(g4#D-w-GW$I83};yj;nZvpNH;4L4c{l85@=KrZb=9jwn zA3>fj^{!~D7TD_>g;!ASxgL?;e&JuSwjE#tlp^}dsT|quhm?>)B2k3tz={?z=gE{f zeE&vtJjI9ZJ^$Y49Z~vQM+^7ouw>`{aa)oU{T#nBk=c2leKI;%k(&}PF?}YfH<{3sbYfe>ld(&v`9aQq%+C-e zMk%VCux_x?mM7EjNX~&y-5pYzfM-M`_#wRWZLD_B-x`DtKcZq;4Wc5LPVznvyVEtS z7WI)pHO@kfxSo;;MK8|vr-{9FyQft0)nmN>x!-@gWkY6d8HH0FgUQFPfeJEa%%_TA?UDU=}r%iP~dBFumqF~8s{yc4Cq>845@zi7~8WD3oOoy{hdkeAq+WyN-1I7iRCgo#RcYkQ^S~kJt z;Xo4f4I6hB!^FG?FH4Xq2b;1!ZMH)fB^dKZ7hiX>?%WjuGDG zM?1j4C7a>U-bw-AUvQ5as44A@SJ)hB6n)Pm?<|@e`y!e&Mu9Pbmp}RBc?oqL9u%=a zgyt>`MmP$_W73W z8c5eoYx)bFOxOX6surXSMu!x4T5HZU;&ctvc|~q`7@H)>TeOH4@*K3nIl0ynmNj! z%!xYzD)h{e#5K2!EDHplXXY#Tl{!!hbQdUwmEN-}$pBKt8T0s0q@Y62hhAQbc_V?D zDWLw_Iw)n#{W5Qr#8Tu(9+de8zX5SYe6Y%G(OzP!QEpy`eDBL%{dEN=J*wWaPi>J5 zgRaW1-JQzAn949A3ur`|64Edn2u})J+Om#kL%Q9m%9*NJ0mlG*n9-K7xSyLtdaWl2 zMwhTC7HM&Dyk~uO?&+%&;E`BF1d(uYvk6#1G(bcYXvsipT|#RQ3f)`^Ei~>hbM2nb zfsJQ3l;Rp^;bC5JWWN9%ZaN<~pL}dVHdYp-ZtIToVy{WdzB(fbhOSqjA=0iq%sZZ&1K29l3(_cWD&LZkkZO1VdQcFqF~+Gpi)m`hoi-#O`|x5Ybu#( ztl|PirBSsnyrKOq3=!1H=fWsTM?*bed8O`p-v`U2@=cyu5V`R19O1x)^UB(CK^;rU z$Qh$8bi(aF=H^NMxOmvEKKAnypEuE?4|^%uSziXskLqP9ux2lESZD42V2bM`abksQ zxZD#FF0)MKH$==cTHy2Vi??T)p%;Mk6p*GY82|ngqdsy9jF$@K8Z=VCTgVSavizK4 zX*}t(A4f(>UQ~5nUj-_b4X6T|XeG56@xLCUIo1T==-pz!bpUg^!-u>eeJ9#KQkk#sgt75HIoRkk> zlZ^#(*5j3hn5&Fx<=2{IMtf6eDe zgVlPkdSv6vaWUyIR3%Uf;gi+Xa3R-q+&y1==w1S!E7*_BRVAK2yOFeNcb5%?v$%MqyxFzYT8Y{GzEvvm_Mj=xRB(+bbu?0seo-?0I zdn3?`4y9>#*=3wg?>)+YTk>hl&W`%V>S@Vc%Yeerw|KRSqd=3ao<0Q3b2UpNZpsRXj;iO!F%r z51omkeMxt8>>$J(oYV~+Z^sc~YJ}#9iSm?jTQrj^KZtu6rsb32w=`9rcB_q$bsqpG zOb8F}&^dC7XVRPFpwJ0Wk}P%Ua4uT*{lKL7yzBV^Fvm}B_;0Hf%l}m0!N|z`>#>7$ zaI`nlvx0P8-%@XjCT>G`dirgiN+Jv}0g7S-5d%7;SSsHm{OiK@4>% z2C2lKL}nZ#4zL>`T3fJ5$kF^bDFM3b$=L2`TGrXPS=oA!ty#ePLHs?0GajBjF&Ocs zXqHF@KT9oKeBsee2VH6gK3n#vW(9;eU{wEjeraTAOh#oVW`3la|L5+}W`Ko)^#gi>CMo#zocR*D zzSzcvyF1LCdo75-bW>G`TCShR<O_>m~O(o@_c+heOse6Vg+3|9mb zKtF)E)Yn)3z24m(nz=}o_)J~e;@b6(=+-5Kktg{3wCz#$w3`S*3;@C?I8ohkEFaH+ z)g0)HJlr`J!JRA$>+L|kj}qWq(?E@azkM2|m#M&F({PWZCv1x0{I3a{qp?dqC-aFC zvwvG4sTTfVTRZ3#J)Jm{Y_wE6GpK;Ut#CmxONGwAp;B$U+oheAfODrFQ5h;W`$t5y(u{FQ55TyU7_MsA<{A9R~#<_ z)MQYls2w}raqOK!ytD2E?#%jyghc6tK4Lw?(`i~rN$;hBzbuVRPd>@#16F2cwFdH(id}fAQfoQj==W1;7-Y6)TK8oh(~Sy0rBN zJrm~XBW4kJ)(;1DY@Ny1!~4;WU>TTv`cUL@^~B_yC)q&;Q`OfOqW(Av*u;Ma^Qvot zI5m`N65Dv{Hdb~LY3)KpfsNTd7OCj*LFbKu;m8xYRj4r=ugvBoh7u>Ql@AW zB--mLQVzyt35`(iAIf+l_b6h8TBKucyjhR=dIcYm5!mFR`3;E`HpK zgt^Uc6V>2hQU0T%D+)gfC_lIzVqp;r?nr){Pa^{&WWc82fFF~*IB!(%)cJfke6v9u z#0d+pZOPeU@6s0q&UZ<>gj?=VkAZ9eYbJ{wDsh)^hkeSpP{MI? zd08m(5NZ2VtZ=sB(&kyKd=38GQm!Q}JLnuBh#xI_NwZQYDQS+woe-Ppsnn6MuBR?6IMJ)WY0j4I#; zl-Ugf@Bul^anhqy(fhoChE;<}OI$bW-~jo#yWJE>JIG;!*I04KRoSXu!nf|7^5erx zV;9i7vXy_nR9Q*%qL32cD5fwSlXI7~FLB>-XVjz%I1EQMuN(tFb`nh*Exa`)p|a$A zp~R6X?BNAVylpDfA&EV}IxQG_5k+QKKn3H2<%vX*nMpU!(u}}Un}L&Q;Uqyi@?tuZ z>tV46rdAg0FS@C=h;;_^yKO9xvm8+-L2++i+YjJ3t7=Y6AMCQ&8I!^vw4BFPZx*%6 zveSQIXe@qOT1s61ij?@1l~}y;${a0|+2>@o;`AAi>s7-$&!c-nv!t0%(|G7p^QiwV zEt0?uTABXjCa4$J4ZFynG~F23)cpKZ6_9wLJS{arbJR<6RN1hP;DKPw!jFS^Hmr@| z>i;H#H)x4tB{RXQ)ZuDm7ZK8>xV&3I9r8g4oh4jK+b#YFEpmF^LOuIB5JlppCV+HZ z&pQO764cxt036RSy+7{B7S!Z!A)KFo);u>&n;a6&Ox- z^L6Z3?N7Kv5O}nEinXuF{di|Q^z{S{%5Mr73)tNI$sm)C(syQk6f4__N5RE9fe_)H zmZh;w9gjz92iMbt=do+$s~xBiVtGhk0_yA;D=q6&;pyyXhpmw2@TSwjK3pg(-sSmo zWYe?%-Uqb{#ODI&>3#RnwyA#Ft#Z7hu)P)Z^7B;0@@>|a0A&GPvCb%C?>0RryHk8R zkL`e~MfTFfF-6Pj8RwbxRiCM)YVz~h&pGVrthbf#;iI<&PhjKcvmf6M1*1p%NBOVh zO4_VbHHi#_@d@erd3?KglD)Sanbnlo>Jss;axfaV$zg3@#1V<7JsIV{{Z?LwB~$9F zX!4!G^Dpa;L^``@X8Ur)yO@3*e9MXI!f zPjm{7(nYruc;CQe;fO{5brbp@o$~De;d{8koQNi3`Na=E!WGs{%p~Vy|G#vp1o8eL zp3AVEl5r)Y4jpkYzeaTtOXjU>`z{??CQpn@-P_-)nBL#2nBNu`zJr^Xr5!x&;2WR% zfTjavAZWT4f^~)=ZfwHc9r{j9Z!S#Wnqd%wNFOFrW6$oaOpbB&{hWrz=$)ERY@1J& z7a@=LuOl>Kv|zJLLZN))VBps|60$&uxFQ%NM4lY{y>ucW-Chp@r^3akN~3RtCR56t zei$!`*KoyFBDAGkMoUbxlJVM;;7s(e1d{q_3}wB8L)O43Bm`=k;51Zr_+rXPG?o!4 zA1j^SELh=wI-<_?pEICA2qGoe9sX#N#IO$R(Yy<>sUHne>vL zo$*|rt3{mcibhTTh2wb8Kal{8`6hM|mKvnHiJN{I#nlmX;IdyKlaQV8N% zvo5vnX4mnn>AblF%Yzz^+8ftz#S8+KD9A&ENRFhb0>n56;v#47rSMpJ3dJ~`(#u(n zC+LeQV0@C+<9U=Jn4;D;_8xYn(Y-E{zp=e>c{c*MmmHy~%Pa9dZfyOn* zs1CDI<1{@rdL%6&NsT430G0YQ+>Mqgvc;aR510WfWVfYQ0ew&i(lH2856~y5CgX}< z-k;_#C0{B1}@7C@eCo3yiv2EKax;esb@d zyE^e@gd<|E55IGUkW*#f9RFDiGi+iH`tvUg3xjRF^QX!W#ahQ7qbipk65+7*`GM{w zX+@)(c%owLk%draTKcj)&&MY@@+VyCw`iBnN2x+AJiE8QCkuVr?kz3IrfrZq1LQbNf zf3sJmAdR`MFXUTq0j8t=#A7-977d_?UK+fNXq@}(QNCugS^xU*SBJi4MxNu716YN|NKhyqXOypF2% zs|EWXEeSDt+BNWM9Cw&T`SJ&R2W4j!$?Hp$i8Dm)|s}39qm0@2w&o1}WZjQ7xE+$+`u~1M;zEgSb!A5mwR8 zq%b=7idpNe(J^5%4@!@yq?4ThrIFNWf9%t{38~kCpV3HkOsQ=eMGnGNZFXVG8ayJs zj6oi)O_myrdJ`I{^oO5^XX_#_l41l&v=jhhq^n|L+_jd3s7adefr$zcr^%ZGYnmb@ z((RUCBvs>qLb+e}i7>i?2pwx3aRS4eEpaynBjH@|q^&Hap)c9%quBU6I|F{`RJ=}X zOnTAZR1=9URGrI{_SEAcdMhn8o{sn*w21^OD$Zp64E?eiQr33Ra9tG`!jCe1m!(e8XX}( z!8Sxz>d1Lxqr<;*^ohKaX=>nO9XcDG;}f>F&&_vlEk!ZC7nd6maJ*!HLGV>-9n|v7 zy4j{!pCrDd>2W%`@#*e1lG6QNI=bXR(F05MUz=sybGP=NcO@*oOG&iZ$A9O6;hACI zT>tWS_gY*~!`^}3dc;33X+6gZkJ)hINZMv;udr3ZYB{5Xc58d<@OIL>rxU_l`zxF3 z2Iz=f_AE0~#c?Cwe zd`EESN3uDY;h{u9l*Eq`embEw^zWzDOOHhL>VpT3T26Vo0xDa{6(YX@C`4SQcz1E%!w*`7wLP_ z)F)kNDXqVjSL`EKF$nL^LV_M2uUOcvm@p>(qcqiuV=lo6~}f zu0=j`s+~I|{oz}J&F~I{=tHR05BqLnVlr!Cax^PCm82G5pT4dzm9+Bx+`+!K zf6DN`dJ^o(>UBV zaEJ6Bt}eIw2K@fUukFP;3vggH^8L~}Ed>gQtf9DIF1KqMlcor){UPdPgJfP#pKstM z&aJSz%EWKSw=xfw2oH%G8LoN}ZNOVj^uc2@kZr=RR3_IN@r;OX$*fM*9f&kAD^XX5 z^_Tu^8@{ZSDZ|3FIdS~3)_`(oS5iwWl|eZ*qF^#x`8s|mq5*=6Z`i;_v|adk(u(`{ zi}8J}xIngAG%wZe%z-LF9PT)l-;eab$za{IzB@}raseU?s>LTuQj@#EBBCR4cwn2! z0XUA?gca8lx7g(gOq0%iQ!v?hCcJm@AAgOs_@IFrL9V_GhwZ%cHi49hvoS{Gcg;%nMvDpJ!JW&&*}|xs0ni z>wvMHm17M0BU@g$xuVl6s+pn0J1W`gFjlmkSeiWqZ+9Tb3h5~_$zkJRjP!1)^U=El zccIFI+FIkA*S^*!KHma9<7m_0ShN!}9@ijuR?G2Yg@UxOeM7-QRky0fAYKEzEZoclw#Vk=puUh-l?hCjoJlWg#qB!^bZo-G&hUhF-oSUV9-<2vXy(18Tipig`XsX4y zG{%Tg1izA4OV(aKRhm>bZGRG_(?yO-@%NU&H@S{MR*AaaE>o1F*e|B@#a`%A^9=8& zV6|WiNBzXov?p(MTP!KTvuZ8{B}WcnRP$a&ttOY62%z<)Fe+N1(Q;1`7zy6tKCV})AWT|Rm^lpqwpj)j6fPp z@53=vSYJlK-$_Y89&metso$7(K6sFvM+1K%?JNjiaIJ9iWL=GL^W*>^Z+TL2?+h>z zU=^(YC};C*oV7B3Oukd>EIDp&^3-ZMw37$s?lc1&<5s_O0HSSQO1)Sa;*>O`ya4#^ zLpYP%j#q0p)~U~|Dq&Jg%``7s%#-Dqs(xc z3f;|Ov$}?7rG}ONUVqwhE;hg8I%urhkBGXfSZF6pgkH73d0C}GOP#F{CtXqO4_w#)qrcY#wrq3z5SL!(+06; zlDiLk9c2jX4gMrfyWipW-6UUk3=gg9#0uKazogFWA7bOen)U7h@hT%O_@)JmAVn>k2mPYJU{E-sd;mTUyHt}bN^rMWLK2>}c90Z_Tvg&%~YS?ZXH zuh3k8Iy84!UXy8%clsc-(*%g~Ut-{sQ4DP20vYvil)sdTO9qCz_I~b$-80eTQ6)2i z^`dZ!w|c5#?0)cwAnYJk0}L>avi@EElcrV?;bfVdFv5~0@tou!AbBdK^Ja`-=OKig zSY?(Xdg#Q+VVSIfubc`XHEk6VO^_#$;g%4C{e(mGCH=C7OtjU36(E^Ty^A$ga>+2+ zET{7IhS%8P_#(8CPU4j?2jAxLECw5WxTdJo$a?uye&@mnnF5-s$r8{z zM%@d*y37U$nSMW^Bx(8r4G{Vf%uRll;}eO96c%%cKx8Qh^wmDDUR>dVWpk>wG^H4ib&+_I$mV zFP6dUj2VxHn>oKL-sH7MlyNuv5K4**z+G9YhtW=b$Dd2h}tJdkgKaAMPg*94791WfSo3ZtOIJBo@pe3 z5QU6Sq@_4(;cGgJ(4u~@54@o1mD2F_^517f#A!rYqwbB_z-vGJu_hwbFiGYdw2SKn z?3`Mg{&(mD+3GB-qPi!`?AIq~4x)UB_5Izlo@(Uc~ zePy$oYYtyl`wupI=a-HGNwdTxdj)H760X9Bje7RZqxs=aogU+!Pqw8eq#L>|<~Z>@F1E-|~_=e71UXd$l-2l2rnuOMmM0gyh2 z@h;JC!}oHV?hha~+HN58=#xF|POd3-5JRR#v^}^?&WncYXqO@St+Q*`-t!-9!C@m2 z7ZC;YHbQ5S?K6q73xD0hCjs(tXKQ8_5?0jwk3ZBzq}MNbQMokK;cL-SUnDW}$@y}P z=)-Qo0ZiHAm8G4+BGfFGculC8sgfBx8W~f2Y%)3MT{I~TQ<9`Z*OeJCw1GPsZoVun zM;*qfyieDQan2e|!8+eSJqNgKJ$7Q(MO^RM)KIU8f^`rCsfkp6-&D_DRI%FB=;=Fu zgU#?MxUfmjb9(4Qo1+VyFd>x*kHf}~bN%dxvifj+rs7r!N;{ag>9*hT6*Jh*{_~Fx z@dm3FQ&N9gdrfKrtX1l1XY^L^TJ&yHMsD5QHm7OA+VG-J8>NCX&1z}NX8L2FV`xKB zeq}X+16U2%*efL`$70Zm?i?k$wgH0G7ngn)IPL)bt_hR`(wTm$!wute`S_cWgB%Xc zR&_M?Ds5v+|45S|C2&%Q=0AJgd}O?r^98@i!aUw5q|^_E7E@z?k^O;p6DixLBrBVW zaAcPwd;DHa-tlIX2>K>*$XyI|z>$r?+eOz-g_;`-b+OBVlV+CAmuHmlmY>dtavFDz zg`U=zeIIVH8lF+&?LX~Ib}Fm7<(zjJ>g7L88%hWAo5{#UZdc-jt%VwkJ&hxF+tDea zfN`~(@9~>PIO54sqhi#Rz;K7r*SJ9EmXCH0GO0Zda-KRLbsmr8A@?Ybap$fvnNpku zSjsU%ZPCj*df;W^4^ShsQiBLN;xxFzzz;@IO9b9^d&ERm&JS3wna93V)!1ffIgaQw z$;QSVFFQv{UIAYi`%n+H%onS%S+7Y12i&<^>_k;wv&x5AeLFo?`F7Q=Bd!$<7bJdn zTEwtyh15PSAf+&tda0d;p27NjiSew^Jjw7q3^aDl_nPd=>Ya`fLgJx*W=cQya+GIS zHoseoCU>N-F^WE=StvPR+V$oWZ>G}wt3{0egf-qpXjidVnrC!927oof_d5MpU+#ev zaKT&MR)$e)LU8LGMM8~Y^Z%~1f#bpg!jf=z_kVVjX#f~GsXP33pU2youNlkM3~CV2 zl84UHM52S9qFi0?(Je)}H7^QUeXrVhpfq|HJCqyeHGA9yAJjrGE8UbDiLcXsr74#b z$>S0U24k>)|3CcF0qq#%>l&wCsTeJxomZU5?2=Niby~sc0FQGYeY&s@8~rPUXYo5> zglC%bIrc64(@I9>$WL@Ht#u^29<#tMYo>HR&c`pGTzpUK0&;%k&%<6H*A;qSBR5 z!TearO9s2eT%`Y0FhMUNS)9j@Vr58}=7;2o6oH-z66Pvsc zB<-eqvis{cX)cKv^_GZcsUVX&jmiU*UM%Km81REd-->Bjv44D$KF%WE<9Edi z?Lw3k)hJe4bPp-14oKe7sOUt`MeT<0^t{tXVK+aC$*R?p zw%)Jj0W8BsT{A(ihU>dA1EHpdEat3i|Jo;4&wh!Q&!2&OflT@3Bn`bLzD*!sz|xr5 z&2i6Z+7gpP(`={Sn9ZB0_nnM*FRc%qq% zuwe>@Ed!^D@KC-1C?*opERVqPF;NQ(uXKm!dd^p6_ep66*RIej45ni8EdP4pmoPTv z@OJB!Z-!H?b5Zz)mBgQF2y3=2N2SV8nWUt!5O2ULah2Cx(utb*`rtlN{t!65TJq5} z473S5*3nC%jB2s=6x3A?OCK+ z0_ni9M{;39pTSnC%@~)gwDslgDaKsphLy{~F;!_^U>@A9Z);PkPVog3&&58a<=~p* zg^_N_joLMG_TrC78|e|z_BP2L)w%4|jUt2VsHmH-iR-Xi;@L8Qx$2#v{5Q$x7qB*4 zKtzKgD)zqX4MsZ0(F?SO>jizy7c9J5)93%2c{0(n{j-W8Bl~~MI9;eoL=%z0cO9u* zLrUiOf)JO(#m0%XR_xPDZ`A_c_#C5b-a|gMLZGJ zOYZXngYU}+4h&vjS$KRZH~BILqPx)%jD+~@+I}p|8NfpZ+&k|&e(aSb2ozEmxVT%& zLR!u7Mz3`3FydgdVI3w67?V}FeJ(4!+45MyK#_7L_El8pw_`SpT5>}Q2I<_W_0 zfAAk}G@CXkCuXm}MT&Irr31Sc>f9NDk;+ETiJR2GOihzq7&iKZM{dJUB-_VTavhFA z7vuqubn5|$6wix+R8MyoHgV=LbPg07;WP#o)s~|-^-XaEh8ZywAE6pMO+_$iWC-Rp zCQq5_r$$6sXkc)s%Ofuwjold4i)kXsOp*ClHsWNzpFtro)TKOr4`0&H5il-p~3SR|?@$qrQO>LtH3-ztkd9Zd^-()ekWz)VS9xE6&%<6T=N*&O@V^dHZc*?y|s;=@!;o1C`y_x$g9v z;_vfHH&%1==kzPe>1&)jOW4ci2?oeH^L8YYD3kCj+GCxb;9kN*&-D_l5!aTPIjm@!p2h4MQXa2t0dB1a zUm5VxV{K6BU-AJ*@H`=xOBnsi8EunnY!^6_)S1FSPvNO@!yX>{qsIp2%LZUCVbvR5 z-1Uea50+k&-_W#W#ylMthjCf?&PxgN&$jyR%1-4*wQ?fWBEah<684{n$l7qCeyF^t zIk2rERIAgeO2t}GbGX=u+L5D6kH>;}(mw|uf7?8qDNsb)$Lt%7RMu1;!1d-)ndgL6 z^#r@teVng;WB{90xSf$SdKF8Ynly`hhyr&0K4IxNznKqzC2!ia-{XExGtvf-J5jDf zN{-W|HM#7iHzXGZ{A*UU`6UDBzv}2envh{&VEfM^o$CMRu&hiXUqFmMqW8bEqV!BF zCxsq>`7Uqq5B4SluF-SqRgl35cn!ospWFHgw7tl9J{!W3ZYH|yg9|haAMFos2G&E< zF3d+(dq&V)@S{l+B`}vX3_yl9Z2Uun@wP6Jkpt(Kx9zW< zR($_@81`RT{_$qgq9M0fD;&_nxg9xG!D6>!)vsm57i{B*Nrl(D8OaD)KL_!OznN>M z^<;AS3?GiU5G$mTVerUh_y;TFSFJH$j`9bB()6>uoZ+}dtIer67o9UCxxu86d_V9K z1qLF^1ccZX?FKLy3wJ|rr^==7S%R9FUTjPH%5(nYg0}x|T?LX&5R+PwStQM+sG4pI zrb;&7nXM3oUnc*y=i$JHq@LsJ$(Q5ba!NvZShd)okjCj8Hoo38-o5;N4m>Aw5?4A1 ze?#9^(}`l1eRe!$lEUtayTPFmVRpL3%5+oBCQSNwcU$Bbfkxq+HY*_IwD^%S%a;%< zNq1U`@S&Z{KAE+EaDzK40|P$y*|~e9 z2)k6LORE^obpE3_@!69CB(3C?784eXq-oAbgAHVRy?RJjQhhN}Uv z86p6DbN_IOmKoVaZ>F{t!H(${zohxLw@#X3>n&3b4TQvzuq_i*D~0A)X7^gNmc`<| zR&}{-(FUii$IDDyo}n`$d`do;yt*w&Ij>=4#sjJmMPreXgk`T>DuBCAeoONMXl>$M zwFY06s;p;!y~tWhrJ=2sTg#1vbnG^BcTZwF5PyL^?esyJn1fVRojn?mZbL$~zz7?w zx8yA1o(7iBvvlOwN0(ZW+4VG#KVbhE58soBeZ?vYE{%16cj9zYOa zsI@5sHSq@Jm$B8MJfZ1~0kBlVLQ*7&H_O3!kTT^JkJ zTih|4A`b{T`8Gga6)Geg@SaQEveX`UM>Ky|J995#vv@(rWn2VeG0nOybH) zqUo|)6r*`v;euv%dkrddA%i+6PmUq%w^x{Ww{L3d9^U5JmZ-%zyHEWRJ zFW~*DL&ukkUJjTkgb^*;KU2No4!}{}+1{}mc6Dp1pfQ6XRzxErT~PJq={Kdk{V%S% zx(8xJXrl+y_C96n4pW51c79_wO4iAh4Kd|lJ!K_x{SJvG5MU+UiK1>!a9zw@-n&Nb z`mtb%TosPc(e^wvPmU)C_8O=z*e&c;)2FSW@fB#&NIntd_Fj$GyYH-IRXmN$Bzq2v{+3A~6pFHi2dj3nbKQZN( zJzo5JJz4hw@)JZSGI!-Kit$;+;xdFF0kAW_i?TZCVLxuRIlv;_IDacN(L%ZTdZRtN|fnp21Mo_(ZpK`dq7fz;V2@<9Q}N z3`)qo?zjX`qc26C-r6jBj78VjbbSCdsMLxF3UDY=Xfr?UOT(tAx-d%v&b`n5@H{fD zFIMZpGDEbrDVw6dxaIXv1Y+f4uHe~o&prXBcr1k+KBx_p0|_> zzb9pBA*1*}I)#OGkzmoTstq|kOpC`AAy@#Q*i}8TsA3*!dEPqra!Bgb^#X)$*w!_r z4i`OdPsdteLd0K#YgY20&Cp0>?JB)~xHlr>pQnLS^j%P0XvvCAyKes@Y{S$0r&!9% zvo6*6m3$hw&?1L<(oM?pR5g8@FrD>b7r$=z4_%|h*C|TfPjkZwHT##&lAuol#k-rf zH_nj*p8uEg$a)}#Un#<{#SH_Lb9I+Yub$VXlWd+AT?m_u zThO|I3>z%iMg_7vs}OZfkmQ2_DlRl68#c348i%yOirCG+I4N~f=v%;CA^=D5{TvN^ z(Jl&N?5E#-ZdAnJoYVNCg(FDZr;9FC+af#pdczO4pq=2^tUC~wJ+Ncmzt~P=HS#+u z)_<|}|44lg)c!YQdk2vt zk-}zFB2#=#D^$yt&-#oa(Ey0Bewg=o?}4 zP>%ho@@deTxU$L;l9Ei~T(iK-aj*}g-*yU+y0G0dr|Lxl3AV?-eFsLStVxx$O~m~w z^;ZmL=LtgN*qBTcf_heyC}?kPh!Ks=_PkB7TN+j+l6gY)>wZshS5zM8xzbX#^a>FF zX>(96I&_IoVv}D*&q0~TKxsJHr`Bo)BT>|?0)V>K2EX64?kw*dV&ySV?x6~$y0{!B zHQZ5?lLnHup0V8+la6lATVt>yDAKbNUFOpt7-)-0n++f!OXAm14?0sq*;b*B9!5RO zg7Jn%WOka@viA~B1_h6n)qe=53Jg+<3Ez*}#?#nvqPT7Rf+<1ow>&5Zj+3TX2ZlvFJYc5$6lAjpTC{5RCaKUwk>q%-aSb~fs;(Ma>?Ii@Yzy!muaNL`E_M_kSHyWs0+T$)Q-K)j&*^Fe8RKB zlc|FW=6)K#w*vn|(+}jAaOHXj>I!Mdwhuf?4>-y?54;uZPo4u*+;=foUX2W(Y7Wu- zNT78jGWRhYpl1Of%@C~cdV%aCOQG_P8?4+FY;n#q8fv!uQH|c)4`EbkR^(o&$ZBhG zOw^J;*e%eaGG=2%tU?HHii$2VYig~*RV_*OK2-VM_5utNI$ezP#Y@7edz|o(^cz^E z859XW&Ha?0(@N^w1W&pwiLU-;fgfC>y8mL$S(Y=O?Qa&E?)4Ff-bC+|5QZnNlytOm z%5i2{^a}?^Hw-rFyjagk2&&RKdSXaqoe;<(F*>$euryQ7wJGOHo-+!${8da^uVT-D zTewDBF;Ta-IllVK!Ihe@k=43GCBV9&Ma@ayc=+7ImJ*+3Et71%1S7mgaq(|gh;v+h z%NV=~@bOkub}dwLPc8~Bz%uhMKa&q*mWog11~s2Lh;XfOn&lFPT!r*0_u)2=!s2rc zHJJ9Xbf;N?O_C{@5;xR*1t#4Y!KH~YCllxdlk`Odw#7KL`ke2}`)oqKZR>v3Z8o1YR-AK?7&h1(1WC4-lDe-GgXaJz1(~?KY zA=mVh`Q!-oHq?A0*PP76XD9D5*LH38y7AdsqR0h-W7IRO;8UOb#uLrnGbS`==(~-u zs?nT@+~15O=dU^~m??rxEr$5tzd=xyANP6vM*MwWB8f8QZ+)!NHrKs72`+hf>$FUCj$?+etztvxN zyvmAN&O9A2BicbXt8A6H5@VOC8;^t>Ozx)1)~tzY$^Uuc@g zKR)gTL>rHj#WI{59+vY$Mc_9r#`=~AjloP9k5=?P-sSgkms1^15FIYPMJy*Vec8i< z^+Zd)@9%xqV*+vORhMcMo-aE(-oA8b|1C=7_-Euo2KxU{)Qi-A1CxBOyr4UKN)W|E zzfIa?b7*GP^14uXh^6Nwp1!HH-%0Sq$Rpt9oOCb`D$b7uQ8*S^*vszUX)vA*`u=k2 zo{8I=QdT!DuMcMmp3lvYN4g-8gDbPVmohBsztlsz z+BYjESPav3%yigo{b)f?viMv_(Ti$-*kJS&k{>L9m-yy_?Ce=XfbXHrSYr<0^%q?hBLS*(s3%OGVF;RuJ48%%|`z zLMRaaGcW(4{H64&Sa*yeUl_p~neR(;W1q;K4tI1*GStdrJ;`{Xx46G%%DXIg_)?aC z*507SIxy?7fwL_)46(JL)^&Vi=G8`^v4?=y#Y?(zW)nJ!9UlI2t$Ji3$*g0>7upLc*qs7IP$O;Hlgx-;=WVLGdHttqpcioBX-;3xUBn{Gq<;faSg^?JRevkP}3l)H_a#`d4_0qFMGF08ofMkV@B!`4 z=nmD1?NfRWvjgw;q!qhHeHNx&bq&+$JPVrFPKobWFJHb1f5z^fv4{94?FQ9ZzF#OViM!Bv z>kqwJHp5zEUtj1{;QS5Rmw^;{^$2gFB9%h!Y_qLF|MH;bcJ+Y!ubTAFAZ|bQ1ITRmE+lSCoaleAf3hZ-o5a^`OH0bFs7_UbK43W{e9bw)?KYU*gpB7E*P5pwMvJGvFHN3_Lw(=b6CCZSLCqTW~P1ym4PYrP40V~-tvl==-HeICEP38a36 z)4+t0H{78jQ9n{wX3(+SmYChF#aSmNkfVK99+F4O?~-~j;N#gUqPSM`mL3c%S39XY zMD^wr3wmk)Mhso8`#GXYeZMhBjG_uL|Ey{YjZ#+8bgd*z8ouGV!(B7{ya@!6Rn4vi zI$K=mA>wN(SbvL(4ra#dYYUR`Li&ajn?pt$t{O}4ylKyFpmbdskJpBxD83wM#0fC- zY(%pnJ7Lk7%zBXwL(Z4w+blEME1NCdHh7Bh&b5LL$ zRVEOXWi64>w1XZk2{DSR6A=xMQVQTVjx}=3>gXA@ zqj@i|nkfxO=N%zREiNomCJ<}9pvoXbpp0Tp@@M1FCf0+9+=so06EqBRQT}Hcl($n^ zFuzC$(TnA1cw`H2JPossf@0hT8u4Nk#$9=74tv&ah#D0pA%8l;cJC*zr&}MHcJkDb zc*kYjt1CkZ@(lxjsmO#m|G|zPc5V5PVZbn`eeRk*?o(4YkqOtVh;5g?acj6`w5XrS zi$^lijO0~rsOKPl>dsYD!0V^bm;;yqW?=Xmx@HCn#LU73~|R%0&W?V0VFKlT=GF48`i#6c#a zD50q=kaV!ooZwL57Q;RvZkC-6t*MBMH(x(se$nm6tTYexk;8T#4juw2JKQWIUM!vu6 z5{C>YZk6a5Q{ehj0cL@NsCkTA!^Co*I&sJSc^O|@?dNgSA|4T6dkgK=x%)?~>-glU zm-X2+ZsAc&$6ZF~V=32ufzbvpd*eG4=j;9D!SG{onXta_J!VRue{+Som7pOBf3h7y z8wT&kJuFT7*wKHHSq6HBf5ggUWc>fh?4&jJzge00Ao+iYA0W{^$Y)TGX-aH_;U24+ zlMiDQwE2ihE=-+GmMn(F6?$w*_hQ9D-=FhkYF-RG?B4gJKt7KqK8bujrl$GOu5>OZ zr@M10nuJ0QKTY$RDU6wfw_WI;g1av>`j4@JyI*q8v9UA5Yu?^I;g+QRo0yPd1_PuJ zR2i^U0ZK-m6{u#yCTgE#vVQ%(A01Os`Ifwa~)j&}GCA<|@1PE1Z4+2*Flqq&UBJn5d^K&vz(Q z-Mb$!7}zDGb`OpuN%KISVMw_3fdrBf`%PI zuqA~HOuXa)oq3E!tGKA1vca0j` z!WEt*i?MH{+>?%%K`UD@T3#m~3twKn3Pf{LN{INiYsL1s{rcsT;2uWt6!+!{aoHb~=p-$f^04{28@dJEK7@N0M+-Q!ar-XDM!< zYtUb!akqsI(v#%jOj3jGgh-hO4Uk{AUKIx9M)fwq7A^KIn{g!j+Hr9E$JS9ztSsj< zW0ox%xCaY=48S_71ggd%DN=)Ln@v4B_J4Kdz#;=CwfW^qD~O?^sa)yNNw&qaq|>V# z>&+!)bWgt0kS^W<%#?Ou`Q0_4;cs)eI+lO2E)Xt$@Tl%5sg~zAGo3V;rw0&N1HcD| zWNB;vEN5lyr5C^vUZa`}k-g`_Y3cE4Gb31b z^*wWI8+jtLVc;Dq4WZp((eplF)EB1Slulcjt{q{&j0o=%JwfkxW+qR%-x91( zyl+dT=vLZg1|v6yKDLxo4oI=Q?Vo`VlvSE)pn#{}0u%`6sMJcS58PRY zqb-&)X%|3hj(GZ|R|o6##~MSCYZMck1?9kM`SUA*;z^ZLi(`m}{geiw&2)$pyL_oP z=doo_4KmPk!YWgy``oQDU4~bSSX0^O7vh6w^Y@fy778sS_H}+`K5?6oGv1iIr z=$iSm6BxBA7XGxx;CkC!-S^z-&~?WLpvZ|pMxi92_lVuAa(2r@<}Cko(nTmtaGCa> zy-wh@qmi%lTj*Q=Lj%iy6|*K>l|BZWxZcvRaAr}uXQw)QAgUA3*|*@)kayp3=;j*} zz5<4c>xpZRjG1npl*M&JtUV88fMx!3S+ZY+xrg!xzbqn*%mp__w3v)$E~GMLMp`kj zX!_M%#hh;;ggxvlv&x} z+)6Wd?=>ras)+`g}rD_)Z9(mL}YEYG^X&C z9dC#H_VR0gq2+FawsEFrE-GW=+PUbri#)cU(l}J$ujt)=O1F_ER!rj9Ax1M#RV|jy z!g)!u?l;CI&nxC&p>5$DL+#yTRz?4_KgMYjX&$8)*+^)9J?rcit4n46T*3snV8U zX*l~MN;kb3gW}TdIJ=&O{G=6oVye|z&bJO!)Gz$O=c24{h|Rv9#ear7vwwMK^)z6* zd&~Uc2#GYFZBm-!m{^8?5~mhtmUKxY8RtMgudzff!V;HBLggKr^G1~TCGQSe*pAJw z_H%-5D~fn@Od$rQXsifVwhNbkg&aBQrQl@X_5qvv1eT=fjQmEdrUD##)KTJG3~7(T z6tm5Pqx&EgeRFt)a)G;jNRsgZnfoMd-_|034V2x&FUWYg#Z1O74GYZ7f345#*S00H zd6t(!F-NcqCQ;=I=Ujd8#hoQGw9F@Ip3VJ$!*xScT_DXDvkjyxD>Tb=)oi>Z54g-Q zN8@HkC*F9FdSVcTbLXHBH`Ob3m4JBu`mbf8RJn3_hYL)J`qtuYOo6<$yJaFX`Eo`( zuM2F2`c@P6r%Fb|#;rYfd=qme^D02*8HYVtd1k=mera3%m4lTcW>x3jnRp%fPi6za z_h(ZT|8+WC9ho>OIkeLLtZrQKQuV|atj;f@u2l!yMt)Q0y)(b{GNsbi$LQ*#k!tE( zIXkv4+>zSvi?euo4m)arb0sUC{=TwS<^MgE%?dnmYSRnKSFLBcQff=k)D26z2Xs~J z*E61T3+`yMdSV*YbF4Mx?~1&$W;7srwpv-`v78fS917o z0?Yi*x)zx@IQ}E4SC@$1WBn$xt31OAC5rL*^h_ z+MnEOUYz0gxPP_tv@?G_KYqPOXDvqQcHKW-I_p;cSE7IXCYr4B!lV)w=P`$+?=G9J z8&<@>kKbVos<`o&M1-#PqJ z7CD#I{;LeBdC;)Yrasbv3V+A7!+w-(G?!*?4j><-85i~n-y^*$;UQ;_-FN) zkzf|_({=`qMjW}bICk~U;h=`|CesNt?gW5}B`q~PlOB}bV;*$lr=Qf*kk`Wih-dCq z<6_Yv=@`3eQ3}2J4ZP31&EG!I?*E6ew+@Ok`?kN40KpS1xVyW%ySqD$yK5l9U4u*G z?(QzZHMqM=aPoHMD|hDJ`PDoBc0cu0bya`PUTd9w_OXf{LIE6}Ovi*n*H z9G-$@SsJT>J&ATgwASrUJ1{bGz7Nl=Z(#2?Yg*>pyu0Vxd&@DoYMJ!t)cqd!15 zhC(5pHX&CQ+$gorJEFqQzOo+8D=uhmYx7a2)w{RuF$%N7)XJWJ1jtw_}h|8>cj zdA@&b#(10b#_mcs)UhBj@LQG@hWyHCaqsl8ILk>L>aR)ohM?TuDGvdf_ZW9z>NxC8j~aA@@qCj7GaKX+(ho@=`ZgJ8^5(mqM~0wF)~qvt5V z*~o<)niV*~VnQJx!=tK;)Uw@u%;kw53F7;FA+?+dIYhF}S&E_E`0l`ubYr}tC6ZfS zVo$gNGa~zHYq^sk+fjCJN(Mz8Pk1kR!qb$SgqOOj1u0qXO>H-raZibfN(QMxa)sg;ybQj! zitR7-xKcRDix&va(kS`3-pu8_>9pn4IWKhWFe)BB@lIa@=48}oOlb@1eOv)MxDvmV zK(K`HM2`vTz#zs+Pr-D>hB5M4y3nbil&ZQf!I#YR zNSD?V#8Tt=%&LZMsO;$|lVRmbKkTc9xl1P@bry~OQYkI(icKYh0INb6=*g6*;9cMx z@A`PyR-e>YMDPX`XI!BFx6AiG(#M<}f0-tJrrBnv!-TN*jQ#{(h9aee^1~@VUek6zdTYDJcuZh*wu@ws}0rE*0 z6O-uulq*cz_of)&be#6*h{BB-?lc198qT)-<=>wbdVV)bmYkf?~TPiZbwV)E30v!=k7mcMlnx{Q$_F-wo zG4fC1q&&85T*iU}L)X!3z7E-_z%gI3!<<92t9ha+k`hs?qP@q2a97qO+myWfVxj5- zpc9WCMc19u%5%HG_U z;{9U5T+frs#G13mM9Bo`(N1$U_uF^%c>#&=ioS)Fyy{;z#>G_1`YPjAfsw|o_|}R> z_C)hU5QuGuuDDRATSpe`uhB-z?S1-x#; z3A~yfLy-}j+OGRy3iaIz!W|M1#S%@&@1X;ASqkU@Q*h9Ikv;m7OFS`+$?6zT9df>( z>_34AW=XcG)Z?{{Zb|v3t2^^F;31IdE=fC~6)JyGEA;LQDDVeSFhP&e^QBN6 zDO~M72`Id+@JcD$8&xSZCOPv;4KM7h>`Dx}`R; zOG;8Rs9sxdTuMdLc?~3!;>{x!t`CSy(X_?jsqj@V6Pcf5v=eBc2@%DtY}BfQ zkF#8p*Fh6E(ZR*}lTbZ91S8i2_G&jwXxzm(NDj?F^`&oQR{T^Eu4Qh$YQAoU2I)oa3n|H$^vaOs->|6f0ZSaV~Or=iB z%tWaqciO`84B}%(f%!$9giH>ThuuCgvy2jUPb4~QDzsJ=&&bBjA{3eU*Q~bMt0tXx6TV0sfEEk5m^9d!G*_emMqIrC-lBK zsLE3ZO?&BIk1bYa9&;LwzFMCo7NbI1SzfkO)b@E%rpc*l|I_ zbU*7OsiWZI&$$uYl_&(|mB!-G!>B9Q>Fk;JFosiXZ)&*fs0lOiBL^bL>VWC1%9SQR zNRgw(+!{uUw611{83ly$a`h@fHEHrT5c7_ub$<={=%2zqD>H50KD~cZC?_dT!Ge`$ zYaPZu{SLqKC$%Lios|hiHpcP-iY>8%5JWrua^wLG7?&>U8R(Zah^Av^h&x#TX4~NF zQ{NzLYy14=(>;LW0y%Q=y)2hq{wufV;^|fC>|tGuoB@7-#tO3Kd^C?{eKKoqNM0^- zg5NK;=9Wpz)J3;ehv3lyL-I703mC?ci9BLwKsf)}vvvmR!(Czg&~g8} z4|gPW3;G>58UX$lW3DMLWJ%u35{c{Xo~KVNnf8ZMD-I&cXJR%S0*ieqb%jytK7Vzn zO@E+U46pa(V#<#PbD(~gNRrF-=KQ{pXIW58=}k9KCH=Js$7Bjeq?^P5E$TCj3GZz- z2Z1I}WPQ{znCll!^v~#PSzqOp25nRODlc$3<3eGmw#UvrRxyrB^1tI=4@`_)53}>B zmAq=gRew22_~L0Zw1GDkF-e;)oqzLw1z)%>Ioj5gPsfJU`-abgi?13en#Sb9^ zv*Nh9XilXaYsC}=B5=p)wV3tJ`P|m+!H07|Vaes9=^2eXrL|-PcOdR~DOF7dA~#B- z>Q|;qUyGhtLVWM{ywE~XPxK1ayc`^4I5=LOvVA1WQM0Kjkfe?-{!_6XGW&`HA{htI zkyn7lL}J;-aWfE$je02)wmfCTM*wY08Ma;LD~WH?vf8xAgQhVj?3TVA4nz#CyPzuP2%ysgjmU^Z@h^ESS4LlgFS^9?!goE0b1b zv~yzT#v`ov#pe<$$D7DJ`WK8=`ae^ue0kTHvjll^mX!?k zj{>vgq(up-tmBRK;^_bg4h`?5`Y?=!nuMmWzdsq)iv_C+2i=fCXAb7nOuh_@=4u(m z&cqqDD?dfPmYq9(ivvi&d$V2c|FryqwM;6-3;FA5u~2as-u7*>Uh1W16Kqhfj;>;w zyr6shj#_ILYjc9hQwtztU4BGs>E@(Xt_5qu1di)8mIfC0X#sQA>^uiGQj7Us!_UUc zJDQCTX^;6kz0rgX+pPF>O9ofa&zIx+;f&_*8Axl1CA=BNrMTa3Qc+n4JeZvGJoR}~ zSS*~}lDH@Y7Ug3hs^|{152hW2kOYI!Yl2H?yS9R=i4=TR>$p1KATO-;QS-ZED-rxZsIT5OvKBc=cjN2YU z;dm;E3hw*56aoVH6Vs-mv7}~v)lj2o2N6E?b{opkjE=C!IgyqvzV?@q2xJL`ima*C z;BSuwkGa9!&lTCnWnPqOb`-8@ zsy&jakREv7v|F~(9y%deGd>{md1?6yM?KRED0Tj5n>y77aT0rBt<2AV$^P6=u@$V&%&L#QAh4p zi*9B645=E1P}GMMIFIi;b{A^0Qkcoda@L%o30-jKH_Bqr=GN*fffWA^bngHK%mNCL zMA@{Zcb-&K_Zukg9<@>b5y=g^HC|8cY)==$&RK;wJu4f{k9JQ7}CYyWBc^XlAO)gEZq zJbSoOsFciris8sDxUxWoy?1CfwN4tL9ke`s+9$Ho+MkD^8Ih1~GA(T`5z!qVS&4<| zxq}jocD!Fr27Ms8KLmK zz|8U$YQB^?9tEc`XK1Z~!cQd*8>IItQu)|U!`R0%I;AWr8eL-Si+~iRpS;FR$p*`m zUW&FZ-ebI)`42*;#eNyfhn%{hzB+di=fu#f3z%p!;b%+9#qRwoB0dHrdR{7D4)Eu! z?x#pp8JO_+*lbcKY(m41Bg*`Fy|zVB6OE~w?s0BxY`#ywFbb}>3Yvp`q9wP_LingH z>9h1?$DiJ&z2~P~R0=0Qic7fMKR1S6)LjK5I27)oZIZ}FZPkuHia38@r$$o?)L7u< z-(IWF7ei+%1BL_z?^h=EAtJl#^M8t@&~ldNl+n?Sa{5-V);N)`rxs@G)X^aWV@axA zcRxVlP`{hN>VmG7UmUf$fC!uUUd$E@qmPKXn*DjYrx7~_0)bnyY+VX2lx9kLCa&z= zJNjb$vpW{G&FNa7Z@trv;i&-+^W;GPWn+%i{py6^=zq@ysnL8`+gca|Em013!wD@ zZv^Lu*EP_`HH-o~7di;kE*Zm&y>iKgrJ9%^WBE~q*9|F_uEiii;<=_j7mq-`pV5%G z1l>bvoP>Wh;)*mP4~>xQNe_GcSFAYI2H^Hrq0;wta}Jyw-xCzjsWfK57PVz!KzY!Q zrjSn8FmWkzA`(5kD0X%pZK!^LULY2(E$BJr+vKHe;IvDy_{~P%^zAWg_zF(c8+cSL zMoyo#2Tp+taQauexRyRS@3u?8&k7mVQLfRP4rz=#B-@-HDZgJV##fC_u{e}>z0*6J z!R2&Iz)4lQLLQ#P@&tk;yOC8mWw;+hZzc6?Bma&apT{kAT(mOnr&H54b&$m6_l%dx zU>T-n?~sH75oz*YBDdZO+MnoZTf}){Y7aiPHN4D-PX}26SJDr9hzF33CGK{X#D|QC ze%j76wANud=$I(dQZ<^S1J^$)AYS=Kxtz;=%<@t!TN8;*5QKNXbmDX4{HL}K$yPpeoln3Q(-Uhs&(1c$~L?ccseEGfITI^Jq z;vBRg6K)=ab)5j`lKPHPfDnx3JdYH(Bb2rjw^LF;H`IJWhhHunuXb`e6RxfGJD6|S zSkWPPr1m6(StnFOtA&|ejAzYRn&1WZo%>pqz5;7^g5atU%k_W+NS!dnocSJ0|2(Cr z?koNBhS5{?A9yYxA{{|QrXl}9WS`c39ibdi_V8~aVIGfBCRv3Mp;vJ5@Xc5ox18CF zDJfEBXbU~4@rRRFs|J9tn%h&+$QH(!jB#^t?Zx}}GG(w-gLSmw$^nUo?v|{-WU%)@ z9Br_M|5!OChpe}!o2G1`48o|47l$3@{^sL#s3XHF%?yim^aMzp)BtDFPBDa#SkcZ? z3SUQghG&&_`7C~8kf-GMbj&Kvf&B`JZAK>;vUq8$8gdpT{>uW}?2&ov(*j_^+E8F+G`BcaPr-jQ7&hYN`eh_lyBg=nFBkMnD?D{|T@qcGOdjanx zSE-#uaMSYlgpv8K?o+Q!c7A6+fhd2U{jB{r`%(H&_H*+;+0Snr|C0Uu#<3ia+ZG5d zh)1L@W+>KVVWg7isFP*Xg#SN|bM3d|G z_<`b|=?S2X=bz&r&sZuZm}%q=kYE-5ljGDhE*@f+00~x_?LQnRA@AM)q(3EpPJd7( zey2Ym80Y?-{Aq^eak%KqtvqN ziSV)*x|GE1vQ8^ecHP{m?@s^~z$Ff+HT1i3qB!G8_!rqP65U&MoDM^w0&}vK(gEDKf1_afHU?0Swh|?7z!4?v#GN_ ztYjfomr(XwuTn&G6U9`*VtSf{31w0YhR`z>Z*+ElQgVCRMhNGC)-#_PnQTSP@3tOm zVE15M{aqkySarpk>KyL(DQKv^|6NBr6Z=29C*%J*$p5L2a|`LFkH3K=_7TB7<=hfR z`olo}j2w~?3>*$miu5WhT3A%Ovq`rIg1$wTBYcH%{*|wgefPwqBk+5B#3o)Yt6hr^ zJBIxM0Ikrg_+!_ypVbECXPuFRcZV=`2}PX9J~C6GabZn8qcoCjPu4BBbr4Jhm zk_YR!cwWQmZ6WwZKT)=)Re;Gy{o(=pGNu09UfbVE5{0RnVrW2eRkG)Wd3Ykwf`!mS zW;&IkPZk4s+T@p3wO^^;f-`TaE;hw1fxr%T?^M8aIR*|(N`jw)=7NaDriHZk`NUgu zF8uT`iS0~(?X{(1QY_i^5a3yganlnjvEm0hWuo8~qTs1P5X8P(xPa!rk90K^D*hN0V zdo%#s5uqAH2byZk&!<#s2U9WoL5KQ^kGKFUQ&xO8%uGZyugW3Zs+D?Yi^9w~RGOUI z^-0fU>lFoeuIeG$&$in2BSICTOE<;`^?ZA=Zft?i-VF=Xbvo!vN2XsEcS>nH*a(&n zgYNp<>dq~CJX!6dcjb)n+A@7yrG6_`kuy2`f7M6k;v9-kJGA5#F`m5NX#27U5l>Lhmz>`_EZea{!`AvXM3Lr74j`kcO%86S9ctkKw2{MpM7xGgJ zAh@N0@$erGu{)!jTBm;-$Y}=DXaKL^Gsr+Dp}G74B;kqY^%m&W#!4Z^^CR;$0FpYO z*ruk$;=9ONM-Y&o1|%k!06t$C@{VsCuoCSNo*CQVdetl^SlEB1VE(Zm&{Iwz>+l~7 zx$fHro&(lRS*Du-b_q_ndHnno0T>En|Mp)8DT-OjYn*8tfBzD?bii`oB7oR>iYz4H8mLJ{Ry%3Z(hF>o%ziV znjaNtB5TFPqBKNWa-VSRti;@IN7IHR+B1{ui;2x$UAh*hRvVm}w{j=O4g#-8ttVhD zEM>}+km~AJ7E!G1alms|*PeD4!K!SiII~rE&h5A1Rl2e7G@2J{&WF@rbz^mW!(sucgWj6XG3|-Od z!a8ej`EFJZ5iLWynVoKVw_BYU?ao ztD^HDwKqK(iMgI9%L07CMrfqq<{bst^c|QgD#_Cqh{-AwjCtrbzVpY3`Dqd+!o!~t zYSb;NOmm)-CgIckX-5h}j7m`Ywuv?E7fIByW!Lnf^&ckk8{*V&%Lto?pzWT-DjiMR z{I@2OsO8TlQi)##_}BtSG{_Klyb%Zf5(Jh*z4t)02hO(06E^tds`txdyJ>!=;TW~S`^Wp@H@{j1LZkS-Jm?jXbQ++I{8XWEpL!0 zq`uTp-5*PNxs;rX1SmvyY_Z<+i@4Puk0q)`zE2L>^d(daXtN&(QgN7XPxvcm04N}N#%TyCnwvX>j?K^ZRfzMRFv~xmRm>#wxLo7E~mO z&Pt_iP;dY3Als<$@&4@~#Xt_S+Dh_Jl+r55 zcCPBA_fXhv?E;pPCQ;3O9e<=ce;{eDom9}2EVA+y011j&UukzS1Fpl`<0>cwMm17A z3O`ygF0CJ4QUYrbv+IP!xLOi1mRD7Fkq03A`OBX0_J?{t>fIMvLR5 zXO=@4*T=3RL^rxdiBoyWoK8+3?tg#a&vNrm5-*$emj~WT1O5Mi@?patXKk)r-}07h zmU1iwHii=qRDrRhoT8Zl*<=x3f;fPmzssbF(#2AE!offu3^UIkPI4UNBo{H~U@&|h zAcDMnjv4aikGeokvXlAH6*}{^oJRyM$W_@|gfO-c*MDiADs`wdO|#ke26gWFyYb&r z`H%X3m>4-Y|J+Ehr!yXn%7oB)gXZ};xPPKb^)8^E&{1a^XPdDOir!(f|HS0Lf@jt; zWerSOw4O(r!i3^2V=|geZU8y=Yn}id?^G8G^2X6Qo}K~6Svt_;6+`ZMYfL$BqL z-Ul9-Ic-N?-&LBg@>GzZ%QXX)FU6=}LKKGX^UpplOP~Jkhe!L2b{6(UO?{ASqp#1% zqNi4rQwFQ`7P7%PSzqQlQ>+!>1S~0FS`)QR;-w=4uN$GSElDw{S=Y`wkgH|VX=|w6 zzI3hk;1Zvi^^D|R#|R;!x=9^0^6kO}K5cO{PHG7p+1Uhet#o&a8YJ7E+#O#j^7@S? z+gX@gR9b8*ogmB$XAOjul|e%tSs_%7>XJ_)YiQs)Zjogly1AnXe7T*D$QA}Bjpi;{ z%H@kubi#|qa({DPYW|)V;xsEF+yjEw~%TpUsBJ!!m^Cf4O_)e0>Gc5C*PZO*Cxy0_S$*1>vU7 zCLQPsKpsSk!_J5C_0g}<6$B6w6? z71xiXG}7>HIh{5)Q%b)B`$VC-+Y75fs|Dynx0)-~h>$!YFQFXDW?2ARW6JR?>c-;v zH6GQfoTbtw^VkZXGKGA7=Z79HPll-6VKK!`0G(Enu}QiM8#i&Cw{F?- z7`E4AYamRAi-Z0SZ$q2Vp$%FhMaDbja2l!ILPzj|8J(5NWypHwLjzOfA+_2dyd%3M zL2#UW_>}VUM#kh74YJko%y_2~R_aE(qqsb7yPBt;eeZG8L$-ZGY# zU54&A-AhG|H9Or`(ME<7E1zr9KXb+G7#}!_SK0uO!V={3bFyJzD9@ip2WzwOQBh125&`L)v?|0Q#S*X=dsA;x5f zp!F>sy6RWqubelWr-x+Fc$^v$bTa7i12PK(D zKAo6Cp5s9D!x>l9`jqKdOy#oM<3kJrpi^@dYrf8$qjM?T&Kt82riu##=jfOBlboZf z`7Yc7BJLxsdc^snGW)XEv8}xH>`6dlx*TQqn4B5Ed5BWVpKx$BAJJ%j!i}biE0!;z zQZ~Ia(-Ha+ee_BD=o2?Ix{i=*#_Q^wbXSRqqBBi#i-Dpo`oOAzSj~68PPRg?3d(B^ zLd2X>hRJfn&QInJZd-i(Z;}9yjh0&8HU@`*K4IXbwxaju77=HWe3G}4_{i6 zR~+6EcwNCXFC*sYuKVkQ$DIkSgR;&Co)BqnpBE~JVFMnNAN1nQ{&(>8Yag}$cJ=v3 zT}(`jf9;*vOP7h6V?-Fb@Co<%3@e3uKvc2++d6-67QrRwY13VTr0C>#!_S<6ckBBs z_)cwwRsPjE^SrAb(9NI&Y zE;a@k-#;1+u_Ts`<$~LCfRQ6tSJar$2>a6(wGj zn{w%{o(^T~w3v7h+6Rr`E83QlNIVvmo=Z+joXYF(u1P=Gjv>$aB#AJ$blprJgN|E` z@bS^THIalxTNR^UMFE6VMd-VE<~&{Zlw-H{k5GbezPhLCMV)y>V;@yw7)=Mc&|cCf zJQL|#;WsLuOcLj)c_#@P*TF1=5G+^%_iTSg-OQ|AMmP-^wO>ZG*fG#qI3x91)ssO1 zQ;JgrEGlKAd9{RLvsg4TERO)`w-&Yr7BbOp)X$=|LP4t}xZVw_^=uXL-q-jPHmN`F z4vlOzvXtqKVwUi{p-`leOv1m%uI(ES)5Q(P`(3pE#5!J>c2Ws2QbW5b;MKYmn$~FlR?^sqv*$Krv}l zVQge#DEk-u9FnphfG$s9f6#pal9oEyv}$qd(J@JyU2T+RR#x)FV)nth*glEfv3ecv zE1`@lJ7~(Ru%@*o=hs`$nXzH^x7{4|$>O0KHHGI&pDhxoDlE)2;(uG^MUgEXIAaJd z2?qA;ZvVvprn||HDNAp6@p%O59N1&XfDjG7vtWtgHA{=YX<^LpJ;1$AcXd6<{2AOx znL!pCxljQ-9~@oqSPje)7iu#(8`p(8z?^d?i7Gpt+elmmY;VPg;yVB?$LIa|*B)n{__6m6X$XLe zo*8cb-Acsy4=0Z?{#6HQjYNaa2mX7SB6VfJmPi1ppk2@d#;)Oyv;Ry}j1aY5v%3SM zBm9Ozt5m-2JwSb}MA8XQhxR(#3;9ar_$;o_HGAiJ^{gjJ(D9%F*vse0tD_XMypqdN znJHzge<688Gw5gdbai8|E{cW6>F9~zHX&&bY+n7vO$C*cm^&ucy18nJN5aaf9rP3A)p-9YRQ?5@N7v zgjf~U!tYhvVV{=`^0y7Mf;`(LMU?)aH)@?Razp&Vgg*|||*E!<)a zfg*9$-jYiuvBfkP!F)$(Nb0DL$YCDUF0JQMMJGLyx89PsL&R}zm-q3KZTFugANbg| z1X{>zM>9sPoG3)9D@M!ZqQ1`&*TF2LM&B0f_)SQk$&Skn-YVDEPH@h!&=_Q+GeHG7 z%9_!9#fTIYaJ(JfgqeP&bV^0F62cMRSO?k<{>EcwQ!)%mz&i^Fw9*4k_OYc@;aBwXvZXVrP~be z@p^12HEotkq^71ARys%$q1DcW{s2;B*fVh=U<}+^*qD#?y5y3doRk7a0Cjl+ViMv@ zjYfrviZWoC<L=MLk5KR$DUzqE^tp>GM^ z?y@2VJB6eA{s;dLdd5p^^D*qFrr#At=6 z1o}xevRWn2bSv8TVHF0IErPW=7Z$YG$7)--s{80UL7ss57-!t9XEt zRDY2#ChyG<)ccinY$AbCaan*2VK6BmP2T=Iy^PB^z>fSQHJ!cf#vu3=W@n_{&D}9Z zl-xn?C})coXpUZLR@M|7`yCi=)BdXR;*zRBjIt5`U4^w^cE>kHyVi_)jBRAh4G|jL z(gQ|RM9=a?QIV^`GS2LMG^hFIAwX>7_Va#^BR}+c%4|Tzj9PnjGO8H>s%gC-GvlGF9S{((^di2D@q&em=sjd8!QRH8##k z1wXC)zS2qyGd0z_x@{z&3wG9wTXX4|rkFy$9(XlX`Z~i|y{L9gR=gXxbipc13?EsqEFco&Ti1(z-fLT0AY0a zNC+EyPP_s|<#utJKSF1hw1Hd_LKj28lc0fq3Wq;NEQWvOc)E462~Fc~_nz>V+rx|4 zxnJVd%KnopBhlBbn4UN``a+{yKzHlbSipzKyRq*VeUp7fTWu*@D+DjGvc{WRd&yAX zmYAusv3m@Q2J{OMnlj9sBLS8!hEj!G@*j4wm$VgTzu8ywHeJtd+^UNmvyI0b)-}jO zcT|vW`o@8Il7`<5W{vJYHYJ?6KHcpVZ9RW-O;!G~eqe~medt@sLcwp*a~Nr;tGlo9 zL#pBf3Df=>F7ys9{EXSiARiO^Qb`_RUK1@lH)-F*7_vqD0d-UfB{D=fZYZ1?R1W8I zaW!?mamMzwb}+5}ODE59B0}&|o1O)C(^{n&8hW?bHU?uZ{n zRi|=~W;`$UJM6}YHrvTBT-`L&`DOo8|}P6}KnE@w8OOm#*~H+GxU z@QOt1iq6L7_*jh8uq=s%GRG{V9(IC(~$QkEYT%MZ5Bp1 zM69+)`Vz^`ViL1Wcb{23*R8X@>Pz%(uKsLM_`-+7`a`;l+EMyBl%w86?76jnNkXy# z8^}B^yhhf)h8lEyBrQ?x%0T_xcWz1IM)_5aAZn`c8Y))v}hxd;?hd!#wd9yKh$`z-(_-6$z z$eY6DtP2gBO0QA&wrU3R#ewyQ{Lw#1BVip}eO!-8uD@uuO81N%b#C)fqclGCJ`g0j`Zl+AIQnJ;3< zojVp8-c>E}r__2=FyfK0W}f!i`KARW3y3~=sAfgHKM{dJRZ;ErQLz;LBLQ`HGbYIWBm&_tOYVz)uc~R$|uV&t#taB7YfmvLWbZ zMsCG8Y5`hdP98Q)rlr?|#~Ks0N{Cxyt}q$Vz5xBIPFQ`O_7!~ZWA*-SiT#JeZCM!q z(r3H|l9)Ju4D5b_>5o;Tr4Psn`rIF2FYW^Ggc&8?vILWT{ams=Blk1UEKxR~dltYp zvK(<2etT)c7_{$ie%bBsDO+<-cKVYtX>{vXrp!K13ke0NO<9E2b7eUs&7v zS6&08R_}$!5*9IIOyX_WjqQ2AHhiCgC3BVOHnbmvkHbG(Q|7g+PC<@Hlp8 zK>4k9?&pP3W~aW!%bp2p7x@Y!OK$ z6l$P9E#r3`&8Q_IA1@4O$w1_pQu@(NjRhobiE*_Q-SbJ}8W}CWRIa;d6yOn`&wbzz z$>Vt^bs?1^a$RA{Z=A;DsgPf6!j7TwDn)RjK=LN2l5jhhrqQb(&vwNZW9cy8!nZix z_CS9zV|Hz$ELikDMazO+ja6REg{2FHZNI|l_DQgwL5*=2y%u}ImbKtLxvyRrF{c^$ zFCe9`s_D3RNex-416IPh*Dbdln^(r%FNc~MhH=%ZRfrXYcnIs2T7!_ZR{P*nUjTfU zqYaWoA$Q0?x^J?spN;zNx=2K^~+{<|T3y;(Jsdt2)@HI3c0>njQ%^}GSFQ1n>| z%r9~jfzXQu;g=}pqPgRoT|M+-9kHT0Y1FJZPfA5iL2MJXc-vISsGH(<*Jk%~NHB!T9(z`}tC20nY`=3x} zJf%@Bi+9uMmX#(N7%NII<8hiEM{ivlps1`ToZ)of_X3L&=6J^~2ZeEQDl-S?$ql#$ zxne{)XijC)Nwqf@4{4$c*yldoGjwS1eF{IAP>~;RhjE7OZICWr|47AO?nMyZh=*(* zXZ8anVt$y2J^4xOGiz`nEG5=iBFD@d$>*8q!rZ6{O-XQ40~5tft4@e|p@VBA?a_F6 zRF^oqSTZx@CFHee)A-kVnz7qc-5SV)z66TEX_q-4L2!Uvm57GyWd3$gjY?dke2qL? z_}S)Jd({ZH-@4X#zhf(*Ja`ZiIz}i93h#V&6*)}RR$feI$mkT^gQzj6CBU`?x%fV! z(HoET3>v`yLugT5IA(2o?HlYcbSsqj7PPq)9uICBTM;5s(%^y7ch>N_pLPg~+`Rdd zdd-K5N?*`dJHtGaRfeLK{4j4W4SL(pNVa!8nnXXx^l{U;UR4MM-rx?{nYhmU@{dW$ zOi{m#SCEaSr6`{r)sBx3jlUb8!T`Lt+)W6%(-mRsL}idkGFT}wvx-g{gn6b_k2d$N z3e~l6!)i5mBS!oTV+lo5qK_6B&e(7QkLt>;cQ8typW@@jK5WbXRg7gqzHXTf?0Y4W zujTG+=DdvV=tP!7NtRM}Yl)T|$&5T#_d>SoAx5p!s_NY3!`fKT&`e^qP7|f4+YZK8 zi=)9zslqNd3*#Qz3t6}Wmz=SuwTKm`X%tpEN1R2+naSwZ4vys=lQhpsrNt!=4x9Vq z{9B0$$i)65dev-ECw?vo?e+Jo?zI)a2CCahj1O=owlhU4a2G1VYo$n;025m$3jUBp zd|KFlv$!(TQ9!if7rGvR8y16cyK)3`7Ucf&SLpyLXP~Rp-?pWa!2yZPlvb5JG1i@yr?)2 zlA}YP!XnY#XqjuXC{us3s~r#}Zw=vh9TT|VFu&aMwz!zBx$HjUwG2*mtNHFT)LH7M z6WYk37sR61iNGXuBYm+K779Q7n`1|_ClpVXiv#++_rHvj6N`8bYU!4oSdP!c_0D#WLYg&sT1bt&jmcElv0ONM~*1|x9EIny^K zE3QZqQenCTrX(~kA&9>2izYo&(KaF%ZwCdkJG%c`|(8Az|QTo_oMylTyf(l$U3w7aPiS=gro{7(l!@r+w+3pyB*Aja?oB`c_JKY z(IqOaP%?zBhc~2qPw|+MHKVmfE=om#$k8;d>BaTYwzm98>@&5P%I5j81yjkw%_XrM zaBQ@nvId{^aP1SmU3*K=Ki#4U~8f)7&*zb<~nOKGzM1Z~GtrVQX6=NK=M zx=p#HEP0+`)Et!H7%QL|ry9WO1i#_M+tUk*jOJbFDTbW45QYV+#ht>9x9yZWd>cFM z)s;f%P+-&RgjbVZ0YXSnJDZ)61mg>*Pu+jWd9_8}lKiwy?ZSLHDys_#L_6q82xY$- zm{ykG*<5A54fUV)M(0#@&Q|0jHnKS0@*?=FsAK5*5)zi#!=1Ui z<&5sIrHo(fxfvMQ;yWO>b&o!voC_JH zE3`IRu$ijV5PyYfW&AB8CD5;@g=?R3j1GoA2FQD^4vZ{QlDFW4Q|$cOv!?Sc4k>S~ zT+@VME!y&CZqaJZgR@Rb>bdIFlzjZLlN1RZ-Hc;QA#q`R-(HHwk$3(=#&M3#Kc(=O z--qB??GFxY^YqSO(hT}lR4bMXioSHd+Kwt`nR;!mb390i+^Hf{lgV)_w^qM04i1`` zQk#5|F1&O{SCY+%`k#$p<7E5mk@fVB zXdI#sL(jZW44beBeJQ3bp^2i>?%{2eUoZMBod(oAUlGR6@e^nw(JBRn576PqCJ2JF z4S5$zKA9!%3jiUmCCWl9Dt-4(7SpfAgd~MtmDUB{i{oWL&585T%pg&I>DX&}syv@7 zs(X4ED0w#m)HpbK%c6KsUvje(16;VxY1oQ5Z)o&*@_Z{q_~>z>Rqx`cec~{^Y;xXf z#*Jqa`M9U3eHb_P{PJb&go;R@uc(2;;9GVL`nI=3!G@Flbz8*YfpZpNLFha}5VUo5 z*4DC5RGd) z+OH|~NiSXle>&InFY0`VbNG@lCFn~QpM4LmeNK-8LeHDOabenVW84h@d8xls51*Kx z)jS9^ara#e6l{GVV#t})OWte6(D*Vh*P_4Lh*guziM;rALize=IlgEQr7D5DdN%&% z1VO*88X+tBvuRLE=g5{T!PFU(g$cV23FRdnnmygvwM~QB=gI-`%LwmlN#tTW((4n$ zH6A0AZ-$ffM_}^ph|#KL(?$%;+|!Ytqtg$o9c4F*VYt`Xa!BUbU0!@U2`m>=4^4M) zKgON}BK`i<%EcxPW&v>c1#H1R%*6(hTUai~)k}-wPi!UU< zu+k>WPS)0?6n^|s@MHlvL9XTwi~1=GG6VZWBO$SCZxLA+EjovfOh!?ypA zv3HKnb35wy?1x*>)M%*H%X0T<7avB;P8I)+Swy@KMj$WF43fh@jkrL?!VxN?(Nk2)c3}z zpH!+FGCTAM?GJ;i`FZuFG^9y=`80t23g_;QY*E|m_GSHy7TwC*^qgh$au1sEp~vh! z=Z*beUfuEc@1T;VFTm!dRyL?q-elBG+lQsGK!vI|A@b8{nw9@5h2Mzwfmrv+zR#EC z`08%zZ+AoddprFEk}Ln!4DD%R#q3ui zQr4x)HxRQS?KDzevjv>WMwt*zUFfNrtl>?|E#>O(R{X*wMA&_&APt1WsN~FEex;Q(3*_YW zZC8%;r7V6H`Cg3lu!X1}{4EiKF6xk2oa%rexgIIZ9{Yjk5C7)5BO;%pN3{Ac-Yd{+ zHcq;tXV4oQZQ^R&u{|Z-VXvg)VG$i7aKuHJoW!yMy`4EHlaO3#4b$!^&sq7X`*r?< z#MEb0M8>WO@(kA$i>jst9UGgwcZ3GIesaeX8QXr52gDTDg}wV#C)>4S)cNB@Xf#F@F&r`&VRW>!zvC;k(Z-p308@8vq`PuIq*oym1C02($e>Y~TrD zl)&*qrbQt6V~k>^o2U5iPEc5M19Z!cMOm|U)O_d2WSWM zzd_o^AG-feu>Z4fqqPWukZr#{(JTxgk&yg?31Qv{`~`mboJ%V$*H%mZQv%@lk4nKfIsbjz zZC3B!1Q7b)2>=3uY&=ZLrg*dPMeW{z!+~Lv_=_k6a>WJX6^R}G8oW6nU zc^RfjN&;cU7f(o;{&eCi_3~B4A2EyA$`5Kgwgy$)Fq~-B>B#8$0dM-}qOJbME%yD@}Yq0 z%BI|I5aUwi(ursGNaKXQ6l}NC9Zr0-Jt~-N-a_mV@S$vt&m?6(_Nc3mo|Pp zk$D8iNUxMNb-3ea>$lgtB;&CZ)~4Qdh?XRHLglqqvMTD_u_U7#UQ$ex)&+5E%$z)j zL}H?8lDm30KoZ5?5c|n)dGH#9kVIBMqEq&c8^Bzw zKuS~$z`feQ`}DC`rZHVDkb&?75>-0DfyR)U@I>NXnaTQR2^okm5K;aDa$u z&JMgl=TIc8Qp^O$D0&AG>v#iADmYEUqs1ROi7moQmd4WJxBY*J@kCI-7jTf#Aunn@ z!=T{BS3)KtHO6dwsr>w_LY6mh3zc29`^y2NF@^2Sd!1EO&FX-hY@TCbNUlCLXP{tt z=pht9-lj#PFU;(n$R1zkr2|PH{==86|NisZo#w zBKMPPdv#{J$t9niAm)KH4ppR8?=$v@fPnuE)Y942{2wCs>y7b$wB3Q@--qrmY~!`R zRa9Ouor0VZfG&TcFyJ-+jmQJ`^Z3e1`m=)4&JW6QIl3dH0%hP*bS;skBYhITT8rjW zN$lc-VamAMip84m$l&1)ZI?!^?crp zRD+La%HL0Trn-Zepv`{bqMs7b`Yw4d#5`l7Da;dK9Nq?9_qfYwE5A;;8agTL-ySa6tugJxZH}3fj-3h_WDX_ERcn~Zk zh3DqCd0!@g$1d?soW^^ZXW|b(uNPYUZf#)MhVnF-`!x@tmN*V{jp@%kXe#^gV0JMdp5E$h~n+>_jcI#RIY^WY(@>F$q1i z84$bs9mhN6!AZc~73*Z9m7?m>G2?KCF|4@=|7w1{oZKT-u9ZUDhchK+m$?b~RqX5= z;0NqJMZzeX1xlVnW~%IzG%jFIhd(aM@;CBP%#8nzd-6`c1u5a{+9D*rod}Wz-oVf<5=)>F9n-(r!^l(wl_(jAdyNCh z(m&cXLCH2jTMv;Vs{8>8^h8|i3Np6@xn#GhKr8WRogW6~0yGWFjiW&)uZ0)k~e z;$^nH%P(nm*9%AHv)h`(=r{_dn^)gHY#BDV&-kSpO_k!l&qG3EMFGo%YxN1q1N_uH6 zYK#cRH7EQtP%<#aI&>noj5#F-Xo)yJwFl2Sh~Dt6RUoA#Iy!U)pp%>7wp^lAJo9VSg1;Oe{7Wr(2Aw1AZoxaiQ+{QqD9Fp!vT|4e_R z4T(bz6|Qp5ZJV#2#fw1QDL82DT=okX2H7F}Q^5X*OW}Vny1w{Y3ga;ST?&Wj0}bb5 z`$>kAD4|eoP&q5YJovM=?*8oX9Xiw1U;tO!P4e#JRvS8t`;0ysUWMbnp>9-oD-8kl zrMh|RYpU^nZ==!=aqf)}=(9Y@#=s3iNycCZOitKeKbW$+(dCVh_qw@>LKcF6RXd+f zb4UfS2%X0XG)v7kC}lF>Bnz*+ulu29N@z9GX0~A!C-YF65WDU$pR*tP;GNImb31Yk zV9-yu1Fb`pmUHMMt+`|DK87lF-*m0EWv>iil< ze|So(3u;P^9eBnrPtLNYN)K#^^DwRl5Ut^yM5no@m;` znyo8sNJ}MNQo4A9+ZH65atAQjD=L6W@Cnx+OdS>p^s7Dkvi~0z2`hj9gw0Qs|N5N%)4X^@;~HZ2#@0v?Ivq!xz=JYzw}0bW8N=#7-R%9mBOx5nVAkPDHQ;@PRLRM&5b1f- zj&3Rdog2Xr`I;hYL;trX7!OelpAfC&brTTPDBv)X!`}cBKquId#;pPhAWF)lIrKkg z-)@-~8h}`)viOn5gabI-UMv8Rw zuH1rjf>Lwkt-J7l1y)fvlzcB*|D&>pJzy*lv<@DO>G6T+zcvU#(**ogQ3V+Mt@h`n z&9@-k%>CsWvysG&;U9vQk^O%aE30_en=r^5St>i*Fvt-xGcq!WTR1v76ET0Wu6&(Z zJDWH%h+7*vn~0hi+x;+MkTJ0}b2cYp=HmSKEr&W^q&>s%ok!{mOrr%QBQHk4p+J5; z5dnB`+8n)M1IQqx;q3P8g11+9BPXZW6A=BMBt{K@(lJ%W`!!C>YZ^Yv^Z;v z1i#dm62MYzn?aSyn~2^Eq9_XEZSDc_&EAE0^;Luw(5-cvDo-Up@OJ`P+gC*h9%#u5 zR#Zeu(WbazC#0%XzoSXjQ5YZ;8!=%WC~(g|GewpyhgY<9o9i5FVK_yaDhIylOIF4P2wS-&UX%w??^ zkmMGUF2LyxL2VdVC*7Jmds3CA3r$Cy7An4RhlnCfSwgsxoM(Rd6P1olgyd(+?ri=? zRDpy6n@`Nit$AZWOOkeqjZD(A1(&ggwJ3WD3RycI0~$N?S)*cLrZ0K10ZJn)dTu)3Fc9i)EKaGb%Il-3>L89f<@& zWif+=0}Pkt?4oCq;RZci`nPf;mwUpziO-u!irHe<{ zwWwVf;$ax^GO3X|DYF3OAO#@>5bU8^GEQtP`NS}ja7dbGixhd;dY`XXcJg^$UXR!A zFAsTso(lr+J7I2qd_E7?dwE+QPv3-;0atR}0zNJ;Z}2&v*HjZ-eD9Y#_x&eP`k#9j zk8uLL9j`W`VE0=co-QvCpL_7P7L7Sb5v}IMa*E(Wl4!UwS9+Z;7M7DckM~wOwL=_8|g6cd%nI@^gEbg zyyGZk;0d1e2u6}SLJp2WV7yxv;P?K#SR3Xjt?7Qc{qu6sO(3uTei7&A@%sF{Y<8rt z-^uZ4T4kr;C^|uj;Q$vn!#P@E;xFy5*cb1JK{g%1mFGqT&KNibQjK-)f`Jn zF_RV^vL7(1ZGDZPdK8#LB^<$NkVfbFQ<0YE5K7nI44Vl)&ZPz36}j(Yu5HU?K|&Z| zMY}qMdPQH$2Z0!^05O-a-L6$ls{dmN))gN)WD?kGoGrY+%x8Ap&e^jxt2cz z&%$+B!C(AWRO~nw94<7(g=~WkQ5P`~GKFt3+JB}VW1h27uqTKzT!+*9{(`-OJ8I#&|06T0XAqXeE}}S*lr!%iWc27>~0xI?ryJ z%AB*t%kwRD9^h!Ln%g`D#vD=?zPt5oI>JwSEqpi(hWgeJv>95rhSH;UbZNPTnI0VJ zyGd(T7yJgVk>q(XXYiaQ;g(2EbuCN9HQ!J>25FKZsMs{bDdNGWaa?-2s5{2bMGl&G z2{Dy0fh=E`Lzo28G!ZMo8w5^o#v|>u>#F4Xg3cnC(T-KLd*Vxw6#u&8KF(+fZmqW* z?Mx6B)!u?uG*-8qvJo81VFI~N*Ix#pd=S5i)+xYm3+na=Gd}j(N10QZN#yJ}we09; zvfREiS;QVINC8cLaiX^x-wvgh>yD%ww^XBC0rng>aK{EQuY$YKp~TB?K@mh1dQfE+obdvE_z5Cmf0zPl}b~G4F7Clt?0~r(#)?|go#tNvrxljeTT75 z=`)_xPF(yM=u3xiuS1hd*mfRI8%J}X+@!+E*?z7N{n~V0u13wf)ZxMb!r5H1Wsefc z7?K$o1y`o+mR4P;*1eDt-i#mD=MIK=UNtOTr50nRt+;AWHQbTZEBytP*zv1l!B;h| zr6!%e>H2-yq&s<8ox!Pl;+^?%`f>hfnEjDuDYZgAD?5LQzDh_)jp26<$FG;#R-);t z{A07O^JN?zpCz4mGh=_LB?Z+D?x2deOtXE}Y;#W;|0BDLkx z=LdnZ@kJ2`ebw;=n)EC2k^A-}=9oMpp||L+R0*NpD*EJ)OHJQ)O>}J|+!4LL4Mbd| zAi32pCv(S>%C=5687j@Z_~Kg6eP`Uvx|U3rbDT+H{1E~Qo7Bkec2U0H7xbb3DW z9WPB^&0?DKX(b~_Em(c>*7?l|@EFgBi=f^QOmR7KL-52w5b7J2B75K|lQ}NiL13QK zD(E{Rv7>O5`u5tQNee*XMy$o!$)B$qyKw5&N5u@}9Kd8T56m*HL@!kN1(_Q)z=anD z)h4uCwfEVg?;fZBu>B5phTi<3blse+_{&;MubntLeAV7f|8psA%hFWZPbEK zLK}n9V^G~e=)%S9hh<6DLJF>uTd!+Uo1@4n{fe!Ux~;?pOLN{oiNV)oPsiZPy@nqC zO&k1`G`{V&aRFUa&hf3IIgGFPa^TC}mn7$}z1+k$*!nMf6vdap4~cEJfQ6h9y)SWU z8|td`>DauITfmpS|D*jS{@cx$*r;7n*F)>eDYt|+)K`Kp!IsE>Jr?*Y{r|d(@IfqZ zH`w~0M}8-9(Fa^cEp*l_bbf?^Zl<-}od+i^Yy{%M#B{xJbsg1wScxfnK&QsS3xFmQ;{_;lp{|XQus9laEmHsyNSpW{@J1;_DJU1kC z@i&Bgtp$biTKSG|u+snW^d+s_{Xc?U{&S#yf(Ir@tcUnGuAbU3?+M^gZKdUBpnkgY zGavt*)P;Ng9((CiPeOxV-sH@uPlrS=DPJ$bR9fiy{#&WD1+=sgv_*=u}6FC1n^zhN_v(>V; zUAtY*PG?icn)z?op>~EGqc-)WL!M6;KexQLt%r>ozvHRLO{n<`hG)Ja&kCOwf%gUz z8GP(L`!Y~trSp%C&qaq~Pf~a|oJ{kfbRWYBC~FY2?lp;{YZKhdGSqCuC$Oos9L#H( zY-1}6n8%3L4ZIJJC>>(W!(Q%c!zEjuV}TiZOluETy#g3- zfLS-pw~jS?V_x1wcj%Uux+CRUi4g|p2js|mw2nVnA70~=b$cNYmwo!*L>0X#wRWec+-1vg2~E6yOlFajd~gT zMixO2SgDslwOV#j>S*_wLb2P0w!NO2A(La8jR5FxQVm5eVb#oq1U=a>oI(mmSWMlq zEY1SJ(2W}MAQ~~awjm!xy~dqY>QrwJ4~ zcbhJ0o-0$HGoKm#`&(DE4b^K$aBR{@$s0fQ3Zh(JQ$V-`WnOmhVNmd6{I#VZS}kG- z=2gMIXs${kq_rQ9LURKaN-{G!#YLgu2`uq=_25vvB!MG%ibOaHw#Betq;1zioeP{L zy86)%mWG6_Xx}0e1=(+FiWDXTd=J%MP!^tkwCa%)hPZgfqp7Vqn*D^hsC3is8rvXl zg|#`S_gP?7{&~SbjiKK1R|9Oi7r8~E1`(1G^=+UCsLyYBE~}NYmD0s?$rLTXDRb3@ zi$#u(qdHg7-9c*7XKEJ`BAFwSnKJ6tmhgfCWNkCeRiS#Ui~TUb7G?^W(_Q1KG<9&T z$GfcdM&u{oPr*!=@NA6_+>IHF_>~5`)qZ-?v#a@eBp|(2#)?TDH+0hT zs8AdR1ijSzD^JRZXD2FW7djZ}iH$TEp3d|cO*aleHqDv@in>OUaVZbZhZzE7?R2zk zsGN##N15;nNN~hQOj5#0L;Rh3rpBmWLuL=gL3A=_!+t49?Nkx$CC+hWby0Appz}Y` z8^lj1erAbQi@WIbwI&MuC@0_B0Y7XJlc^t>-{>e2$;#wKqq0@=$*4G!sE+*>X5@xm zy=me1$26L2S<&d-bOUdv~ zVN`Z|6!AKhrUj*1eK#gSCuy1k6-$V!G=IREe_z$bGzw-(eD&L6hQx?+OjB&9$#+h| zB2wQ5DgK4a_&JVAjr??Z zpz5|{hJ5D-e0lZ}`MU96CzEc6Gxf?^4yUQ1Elm}iB%)e%45}bxt$R?8GjyxWN304R zwjS996d^e0VmL;Cn%sBE`rz31Ag6%R{9D*T7mVm_+za9Ck==J%%z_A)seWyDJ-g_3 zp!<5K`lfQI@fdnmi?uK%-isfu#=?e;*0JATpQK%(SXS=;;~4NC0Wp4!0sr>N^gwgc zcK%$J&5j&TjQ`LcwD|BirGxEDzZe0{ibFLpSa5e9)cV=;RprFt*phw7RG~luzpV@n812Y0ii!)!go;B5+bq27 z)8T4mmW@QONKA)#N{&{YqBh>zm&2&i6A)r7C~T0bV``2ySa~x2o?YR{9MdY47`MXS zB_k8rw^lKy)gF=!E9n>Q`YgM)jbpIi)mnIG9ieGaXDaN3SoOvwadHr_O%ytSdZ+L;(s zEV)%DV=MR3Jt&J9oxH^RLS>@vHO*KO21}X*0t#^>ZOWoXhf#T1U?Xp%6eZ-1*;gzp z0j|G`10|#~M`X)5dJJt*gqliY41K( z+Yw&kYWkwaCLrpO9iaQvE6i4g8-ZuzOg2l(`+p|I<;`&bJdqIKm0wdedkL_-z0w==s zX3PmhWDcSazv8Lo7wbr53r}eGl&Vs_!DdF-Cak^J^HPmuQ4tZ--RT5c<3!F1BK91d zK_v>y1TW2QM@*D|-v5yUrmYCQTkYDh&_uWIkc*n7H08;q=*Pm2ykGM*TvxJJmzPKq zSxN{B8kjv)1?xwPzwn@bq^K);4Y43}U;Ev#?UTC*GnvmK-p&~(GshMsGg*OXFLy$_ zG!Pa`h2B{d_`Gh$uL0%Rw)tz_fw11qak2)9Xv~9cdS6^W90iz2%F1DNaAV%e=!p5P z?iCufYHsZe+FVy2tMb`J593{|N^N$U6j5I+pIfti2)rkj|B%?_vMoq3m?_GsmWvGI zC*Fn-r!hL#Yt@F(Ir!0M!xVAJnP+tzsWV|(>82BpmzU(xI=DmU*CvI*)U z4^l^cue>hLeeA5WuQ;GTiH56P{YKMA=Z5&gc5qmvA~FsI?Qx3QPRmsWre2@6-SvWA zTLTqB_X5Wy7tldZ)cdvVqFPz6G-VC1kNkk`M$#KBt7r6#`5?qwV^6k>Un73wZqkTa z1}7kQsU+*<2p5z5AV$)g>Drv{4>7FeOXATr-k~_TZVNN(l~4%pl0rE^s3YVF!qHTJ zHQQo-hwMUHcBmRsGfRU;r^IDB-@DJi=MCJ7tW^p@`)>Da!ZTgikzmw)c!4k7g}M8b zD#E+6UDhUHYA|*Bv7FO1Y2E0qOHFzk8n$-M$h>C$3w7gK#a5**L-S^&KO%QivIb~1 zBUjHX7l`mrt3}qk(xMz}0Fw$We;IvO(C_?O|5G{OMi@rDOu);2Q?R_iJLIn(lb3%? z|Njx{C)>aCt2d?B*{(Cfg+B6w>u;+_qESIZF@G_?IK!S+9UJIp(@w@y)evgcgX+uV zM?q)JC^laey@_;#_tJn}JA#cU${{Xej`~XR60X{TdcOxK=pKwP@&ZGqwf2M*HG=i; zv$1RTsfRXJ^F>|U;Fs0+qas!2MM0nPuo-VI+R_5V09GznY}^u z?H4(kkNv#S5yN!cg!xrH17Tf@6m>@ybnF)Y$RF1^pr*8ul583AnrZ2P?M8n8=7$d6 z%447#paT{@HwBW0Q9QYDM;QX3tvhh?3wv9*)45_0s@|d#AW!6tt`mz5WW$N zm_I?wML>(R2`^0&PYG@z;|~Z{rO2s4#z^^5fQm1{`};Uq1tnJ=MM!1tnY&n%+-ELA zKBK8ZU_g7-yzq-Qnco3W0AKYSA}oTtS~drFxNIqwXQ46aY_;hCzW3XVw{W@xze>)Rf zl;-?>lB$v!AYUDYm||L#wM%Z@I7R5fAXL=UbxCf{vL(JKjRS9EUL@6UJ*s%0$eMLh z;x3ta;Y^xi3eZ-vsIWbSfKqfQIB&si&h6T1zGJ z>#Me#*+^{JM6uy}Ju^JRhKMWuy>JRV@N^zae-xi`WbIeU4?a~TyKbr8n)6I}kLeFq z&M!DK2DahlC1mU*j(p&VthRI;b}D!SIixrfxW{wXTBc(`GVGaAHu#LFZR$sBNy)60 zWd?ZFTuyukUn1K807g1LK&QhF1~}=eC>T7==#bXyFru6+@$IBX25&hRtTUPB**auc z>AFgSoUgS>){B}H&SoE*(Ezte;yZDN)+GJ$4~vu)?k0&!)er-X(`MOx8_O4MVJbAP zF4C=_iezYxLIjs{o9a60a~9*5^C`*AFN# z43qHN8btQQ9R4PC%R4fTga?ac?=GQLH+1C5dw(1WyQGwKkA2#| zeII)d>6v)?1KYZt=@!AG1lUpFDo>8fcBfP~QIP6A6iuLutEh{n0`5~2-TyPj^JAz& z;OXUc=R@}-KJcZ0mi$6S3G#1k=N8&(K4>-1XBoq3!;8BTAwSo@D9lcpnLX!v$z9rf zeV9XYW9qzT2eE?p^h*UYkXRGU>Ouyvjr)FMAqw|BCXf0GKvPN~d#d!BH_jCO64E>u7x>T4qzEim*F!}^a0E!p4d58MvBZRPs=GFk}^ znv5EDMkz`>GZNTkw`SyI9?gF6uMx|T`Z)E&^4T@aPdi8({a807)25}YA6znG!tpBh zAXAIeITK}ToKp+TUL|7%Q9z95f&#cysgPUtTD!>9R4(>GP7H6B(S2)9~ta<#v!hjJ*%kLSujh zUk?%4q;s}WooJRo>fcz}tveMr?d6~(IFN)b4xLzbyl}dN^JEcTfJmj)WgdZFcPtxN zd*<%%)0Cx=2PCr@OMOEqxVGP!1A;+!u`fTEe+~vYM$$4VS+Z?gC^=hYKdr3KNXVXF zBFRgxOzk%jPvmtvTRN8(GPo z>f#H(e^k_acfa@9+4wfbk@^5p^zn7(`A7*rpA~(NI5(wi@$@jqI9a??p`S|#7%Xpm zyw1Xvj*8miELc4n2_pl(UUjtNarZ^NT>*k_(RnLzaqBzU`T!S}kA?ro#PlB(opUk$ z8|+MzMr$lC(_h$`mjFew#5SOQF@I}+=cr$>O77l(Q4H;aN0HOoVFDUp5ZHFmszwsR zQHoA%$ecqFY~9i=22r)*|)!0$qt6jJnEA9R@z6o=5$`p z$J>GWWWTp!( z09Tmz8qNvfuqD>9H!A>*%)>j!NWkQZ{Qc(mB|OL-K);*+o_=o{6V4euT*(!O40&9h z*PfY#oHt!WOrSq|}i2U$>4et51z56BvFf@+x6E zpvA3x$Llx#?gZvA;Jfa|203*6^UDMz#K~z_1s9`)`lIe7u$}@ENB_t<6yn5x9gW!! zx@dSA<4BX*!c&GFNji8+P&{meb#kHBW_BgQqeu&mlJett=|p3?LgI2oeo`nTf=+A7 z0k9wUq&3o=HU)7&)kF+L-1bLHu=aFb>{sLvvM0iqHJx>G!>-H@H+4XW^sPwwr`diH z4ex1*P;QdVSi5!H1P+o+>+K2BUB<)=q#TtdPI5=3nwb;Kcg9(pMa3Q3<&+}98CtBJ z-aY;rA69A7HIzO8)BZ`4QaEhQ`pw8>SEB}>KUdAB+vbn({CYDH)!JXc)+yEF%SxnL?J9B~yqaXh=sxUf0gP}4P49ya;$4@TfM zIosZQ1`nlODq7OMQ`b_p-iFLl(v{BJKv`AM_#k3-^^y{}CXWgYX~2HBQ`0i0a2g1b zMWMa2KlcKS|9oXBZwxw_p1$wv*yE0)Y`ln^_^Wg0&$emxhrr)U^&@%{YRXfr#XKP$ zm0`E{>;ZANsnocU?NrYpPZ1zN5x#cF8trW@(!}&k`66uW3|A2I!$Gt+a(A6?4qx9B<4t$=#& zq`=rbe)!(pB7}ckNB`#S@O=W6yDhBv$JqW~1#|!ZHE~R=Y>fYgDWxMFx5ke2uSrKb zd00O&H0^)k@E>nR5-ipH3-kLmXGbK}dUSJg4w{_^MFeFO8$n=78JWc!dm{fi4x9H{ zpYL4YZvN`+_2~3v{O)hgTB@cq*1Z+Xm z%e_7&B5DBVoJ(r$7x{7_?>FiyhJ%2tTc}7$1Y0q! zgn&xNSz3dnp^umBlwmol$V)6_$;?}|J1`B=crjQkFj!PI{9a)wnPV)ft{;C~pEHU# zIPIB9vcId^BsPs6KTCLwX}#fq(=UWkxy;QK$~aFF(hpO38$X|rj}{NYQYd@wk;jRe zF~^NvdD?VP;lz1_^~iguSlf=vF^KtglYySs!v)qHGtgg&ZiFbf?$|GNdPzVpbBm-X znBEvVP!v=;4+UxNx7I!-Z{So_x{8je>wYl*MVldP7p}tN>53t)A>r^Ls3a8wo|64U z@I%O}f0>3$kQ}{cBusHqeFrXCvEzVfbXSBKY=X8QL69Y|zFejm(ryzKn9j^qGa#w! z=i~_h%!O#>BZ>8a#6blr5a$8;Ctz}k5pkNNpP&WIIfDksjNNkXMX?qIUVMK{0CVMp z@ov&_*zwd>KrT%f(E!S&BO~l5juPJ*0Meo^AVDrBG7LZ5Olm>8C(FlvfAMcFBR5dM zzAC|5EP)n}LdIaEbbeYwiW(Fd<+JbRJM>}})AA#I+XY`=lu2xjvA5$eKR|FTK5%9~ zwOqmakt}MM`SdWR+{pF_W46TX8@c>zIRc}|vn1X=m8+Bc=QxB$OoieGy_n)SE{rLL z*mxssXu6n}mx|k%Z1f*f704=9*+I!uJ4G7Yy0UIq>Lj8%t+Oi#FDs3! z&gWGFyKdv!ZaXPEd9V?mZBYaD{m&g#U`>m;yL(Y0uwt>!Q7U01$Z5lk8Gr>j6mtPE z0{oH}_!cuX5G#yu5?($%zdia0v1QxSTw~XhC>9q43hjWOV^L+QVjJdXzt|fju1f7? zAMk2?Mky4bk9i(s2lFXCB~m@WutcEvK+o4-LTdP_`fdAH(;*e|P@&xkbu5#lpHXNv zYj_K)5v8;?oOD`5u!KDVBc7{7d}XMNQdFWukJrhZ=<7KSFRflyReQ@27=(I^t8K^tr7Pf6<5AHJ)!r1KGG2E$-`)k-`zOAJ0v3Gyj*jQ z)ur2}XI^LC`?jZHvGI6VU*7uMIM3WzM^IdF=gQuApSU*<%)5U6#+d#RT3%J}{YH~N zcV};MTl>-}9a*}u&YFJ2IRR!DO&9wzH(Ur{jdQnD^4<9e4R30xTrYEc;VjzeH|7zAHEI*^LpQ#THf`( zvkf;cD_(SOoqXwaMZ6rlEFk(J1YI9;Mc?4+)x!j44~t%)y|~+IaYb!6kudU36u}&; z#TxmyIG<5M%(y#VoKlKMn;uX?fQu#FXD`YMK35FoJYp_xuKU++& zB6^~4zcslm%`EKg1HJ5Dw-BLxA-HC69v0!rU|Eav=$1kvM|-rH456q0_S0p2btI6$ z)}+_mbm!s2B@y7&bA0+U{|VWsNbpY?pZz~WQDyvpNFKD>W7oO=HJ$rH5iF;uwMX9G z1UdzIo zxa2Q6dlh+={tKfj&q>z_YgGFeMpYThr1-|+@|n0Re0sNEvg30(lClVtLQZ`r#W{a) zJNgfMC=K|X)@bFj&1x9{?MOUy^~ZKOWa|h;j;O7 z4>hUMahcz{YbQxSm;hz^*|MxI+NJoCVp(P=E138<&C-X&$xkk14^&Xrb5z`gnfe+& z?eiE`i~*!XJ{7#nY^qCw#=R<5wjpq zsR=e%#I8eSAe*N9GG@`#+xX(m9O4fnXTo-Rn6X%cn^^dKXX~vTH9UlavkSOIC;kZ` zQ&_4!Yti0z4vm>CjHIwR2XOG)HsZQ}f9}ojWsj-N%z^Ck6xF#zK;4J`%~0DIHck&u zbjc=`EaY@swPPs6^#k_v=C1h^cDA$obod=O4f3ZuyHj=TQ1D$aefk7f9}emiVw(Z; z5k!TIwYJ~bh+Sel| z?N3D`AktafDTAqE88J4>y&+)y^4Knw-0VUE;q689J8_jcm|}Kt^<2c|HYq@=jd^VA zH9quq!d0R!L{zoPiUc@y2i;lgxDqnU35(o?R7_AUvg&H06Z~()e6>SsEXXXciHVSh z+oNX7v_k>)I&V@8Fd2%@Cv!3ZIt$_|#QDe`q+$-kW~%m|_gaPsgbPGL2yQq1PbXyc z^=XB#-@f)9s1W9>O?QQq6{%2f3X6^)4HFYi=}Mv^S9C>HSohdd+5|)5snm%~E2bJl zXwy_5WD;GRXZ`+84Y!-y38KbsQYwxSH`cW1Qy;F}Dj%N25|1mQVVdAXm$Ler;jE5# z>DJdAYHlv#(w=&PwN<=n;d-kH$LgQIYj-@rdYf0CLiQ*)a6 z>5nj9=XjzvKGh%<=Wj;g)xj`TME|irrtmeVdL`$G6`RVNUo^v+cdWigmpgRKKoo49 z;)e>w0w0HdvB8DEZy(WWuAetPo2qt*|1rJ%hajcw|IdVS+?Iv|ZsU>W4``7TAlH9K zETCD?4fDSGm;`lr;}8Aizh00}&r9Y&b=nh=1>Hy#iV{RD6fnm=eQQ+sQxpREqPqJ` z!}l(=te^GD@fRtEJ~y7^|b5; z{wuva#|3?*7wk420BkI%Iit#XA2RPor}7vM^&up{6JG=n_s|zdt8|(0GuuJMBsXQw zIfF^^&ErKD$P&Aglw~ZRA&FIi1&55vP*#o1XUSQB;wDetx+4PEbmS9b;e!5t*a}Lwd^tEHKy+k1J9cxKDfm3I@ zLRcFbR$fSJgNkGhPtwAixHK+B%q%`A-YtMLC9}-vXAbcF=ZTde;=@naq3=N(z7Q)L z^Fh6O>vuwiH9|u%aS&c_a21^k{0i|NFL1T5VNn-*BE7kzONkaB)YySJNmW{`#@bpx zE{JEVs81`&jDFQqI!y4;_ElapVc2F~a)Y)5Jc5a_A~q+=zBMS8q`W+HrvKn!z@*(r zg$32CYnwxf?oEL=#Qpk=n$uOiR6srjEnOae)V zLEy38NF{0=hb3>;8;N|USyDdS!44?WW+G-{uUcHJE8(QFZuXT9gsGC3)XVj*qxEk$(SxAo4TRQu6J z`z|Mh>zrpHT@r?wJ-krSf&3w46z4;>1zn@EHrE zUxpHb*&psnp)I}6BuLc1u*WE|v+yKzV&W8WV2Ygfq-W{&qR5^T;o8GcJVMYz6mc5u z2xNlqd%y9;AlZO63#?C1`v!;9VNykpdcG7Xjwr$(C zZQHhO+qP}n?qt&6{O6ka=6Vm_lX~jeyY@a@yXs!+cdwPK@C^+rp#XF^>%SNc$p` zR))Y9d#$@xU~2KTcyWqWQaN+GSg;LzR8|w25Oz{e+fec)+o3U?;>%yb@pHV9(uVZq zMwAhIr0Rr@VZ6y3wwr&Fz|K6zhz6}F+%_`ZSQFP2WS#!}U z$xrF-H4iI0!;7C>JS}mxfgjk^dA*u zU$02E?wNVvwyx?c?!+k8GHu9srV^)KQyQgC(&YLkGD#}#1=L5?PWF;!T)#0k!W=e@ zbhPhis}wxG{7WAo;?_a82_((MMofpQrc6c=HYvTvM4EE;KC^*8S8t~9zf4Z<^&3ON`MlG@eK`k`3HRA8OTu}y=ghoJPBHZfPwHvIn1uKY%L2xw zK@k9^$AO=s7YInE9s2aLUep;KoRQWz5z+@ zsj5T91Q7%0-xnlK06*ZHU+ah)*|7ka9J`kq6yO86Z;N^%^|VtmTpsn)_^huM8)VUH zbYwb;4WR?o++#an4Gnf)XX^sEuNortND))R)`JqKFU*}tDz1RFu{TpjHWdk4E|i(M zk_PIQ6WVn{7Y31U!8_f24Yf3bsL?UHT;^GaFD_x!N?7Jof>9xt z7j_p^J$KBCpRhVxB;PN*%F0qB>wpc2U#XPaDWiEdG`SiFLIu&GF8?-#6V7IS&$PcP zWn;ieUi8Gcpp*)SDsHWaT?$X_`)+Rx&nmjq92Hc-c_eB?dp?xP=Q&S#l1J+B6YjYs zZ*i&xIT?78DtdA)#U1B`Fj^aJNk14c6Lz%%|{m<(kz*n(HS{>iVwDk9^4~6CTeK@2VTg{~U+q^8eVkHin z?QTKy)`_H|4TM97(vHbz{RX@;S?z0cbr-H$w<@i`7A$=LbsTNWS5o!153}*$Rl3f# zJ6&2FEz4IL^|!CdByXeY;CzC1J(Kp?I@yT2OOkjH6xP%4snU} zEU?+{YEhFl9Mz`w^zx#tDr!o`%l5VIg^EvUV1UNL>O5?={MpIHSTp)p8_kHD*GX&J z@m1@83LDJ-u7sZMzYAy%RY$F`{$q&z0@PoFV&y{v2J}BQ^f|K=2MD+xch|*X;>^Zv z>U9R{;y=n~_v9*+qXnNRRy~+>GCqJ1WxX<5zlbWg4_@7GKP@aKW<6*DEucp)I8+^U zxX_)p>?Y)=xsTxPXFXaNxxdaNn^<*dnvD_Th$D3ybxEKzn0#Z`???{JA9-2lmdRX5><@LYW~YKEpq z7cOT)c$XO5yJAIizwXhL-Gs8VN%m;QGz)I5@$Sq#dkD8B2f!%(+n1`3YgTeIXlD#* z+3y~R5d_6USOsVK<${{5+mq`L`yTy9rz_X`Pq%fCr+XY&>+I=|sJr^euG4$3=Shz? z)P4Fc|M&Zv(O+FS*@}J|XTOPzr<%TgPKPD%y}L6zlM0~5ufy6raCP` zRyf&=gj9Ca+y4#w5gWg~dDrt|6cUU)M=Z@U$)v$-But5+ROgktvaFXLwlu`VS9>{8 zdo@U+GW*GkU~_2mo0hL>>hNd2%OKe8NfZ)R8lo-~kZQKBFRy+|w%6GhdfsdsHomP1 zS+4`?hCs>{U=-ZRKdf>r=bR zdr{_Hw=+=vX}>zU^gWy9)+_fjs>Q97aU2$}atRfF(^g)wG>QCP3aNVCJHu734>Zvs zqwb=Un|wPVo<>x=Q#+A^WfIww(!@-(BBH>MEHbP^XFBuHnTA_@#j|fd`(SHOIu1Wi znRhO|FMhFa!a5=NTxvx2u20z4pEs-2j<4W_O$x!SeBO8L{GCfu6sWc6SI8#Y3(PuH zRMRKm|%)JkN_8 zbb0yAd18ZJEGtY0-_`87?7$R!I=QW~5~%*gbW3?aT5uXMs~VL%4zh;WYcHsVhm0Es znS1w(*lTTA$K%KHvxc8V7{0U)_S3`h|_p113ovKqG3#tT7(z0o`K*w7OLa?S7vW|V zU3-VgGqLifWnD%72JxqrmTumj`tH7gc_NyM(~=RF9-4Lph1W@|irIgtz{NquK0SUr zr9FXnJwcJA)EC|um1R@;&JXP|a%{*w11U-sJR}20?al7CP2J7?hwjhIz)%nezcH2C zKK8>Beqq6Tqn_;o1Zo z6yVmb%c0%fR(55(FqhAkDCr=FceRc}m~>wv`OxegWW)Sg*P?5pS`RV#M&gfWGmr^m zLDggz!u_#N)scWvi!^$z6a77cavgq` zRTQi63fbp*LKWl#oEp*&zE`=~FTvZO&I~&?I>lBD6Ecfdu-V6S6y>**SCDOg62Pw;f z>3kqj%;O={j~zo=YJLF_xHh9Y1WOSaiW0K-vPJ0?7X_MX#Gv|4?OCSZ@ebv5HUNJKm<-tAqaO`oa3K+$m=BZ%8)*AW9DF{0R3hB?6|&5-5{cHtR|EJ@>lSl&fpIAxc#ZqGn1i6I0@6 zYlKVQFQu!^0LtRPr6DvWkE>ypDM(*rc9l+k{##4+faSfh#FS#BY-bHygd#=WTF;+q z(=p>b`+^R>N|4XFZb%+mZ;@^-#Yy8qYrN~2YME?HzeM0DcVl23M79Plobcut$VGRR z_gzLI9)ckKge=a|9yNMJYV3E|7JP*t*I9aRm`&Zo7)g%}mD4L7V6mL;lqIL44+=%v zALqpG8qJ4}I8?5e6XuXM)$*G1#J<@CM@g&I`a65W#{PcS7 zEkBGqv&NhSO%NazekYSG@Hvbo(A!yP;rgqVFg&*Z3DPy{bpg=bXWsrC?RwhX9Zr)k zlwL=-?hQ-E4xbkDJzwv%p^`dDi(R;CnXt2A4I3q?wK+PeyD3CW+jG)gfLvg%+JmkLfeH?>2K_kv%LTob;pyITrodycB!ww@~OLt zCh`qf#S(-??=Fh~65Kw%kZ!1odua;E$c*#y7ZcER77UT9I{ zJ$gc1S4^5xfXME8$F$)0`A2z_`Crwe(=z@yj&!Lp`Q5|rf8$89#A10wcq6$y>N(AV z$4U?I(sZ2;aPDX4$q2+>?5n5bf=qO`<{U#}TJvl3d`;@7{RmYT~65-?lS71ldPB>1_=74 zuoxrW<%lkFC9$O4uN=KDURy_)$?l9;}b%lB?@#%HZu2?j*JRre?4^Wqx3qIt^1KU zM5rg?eb#PM&5^XJp&Wdds*Wz6?qN(SM!dr@x3^M6>XxhQhA1|{^OF3**|RHs;{xQN z*4w%5&Ff7tE#FH$5UC7ai1IN=Xqv!J0ah5+VSBG5##lOQu_XuG&Q($3DEpi9g~!m@ zwtz23gOE1iX^qvL#PsCnke-dv1X6h zk}vHD?u8Z_FyxKIK)lXc%oCF92Y~6b3uTJ-kVrKxiytE-PO(y+PGnb{+rkQgZy zpLa-aw6TcqFCVz`hpYbRj|Wh9^ami7#3y=JV{lvVY!gN zfxnC`SWKu+BwbJI1+{oq(ET{tN(kj@*9F54aBf*gu;$AjRWdQAvdwbJkJ827+AN#z zs|;W^Lw3Jsa(!QkSyl4|2xr0}Z@e{Yj_k(Yu58K@f?sPZHb2M32-w~x^cCJS&D~W+ zl)k{sQoQA0<}lwYU4K(WmEOLoz_@PORYjJb|2u2@UNcRq-d}IUx$RZ}_8?LzT^40} zo`~aPdY)XSzvfo-otu9vdaK=bD}GC9`YiRjXvQgHE2@kx`@-sel!bfQ7CF!VUien> zcVWp{N)y-Fw^<2S+4n-OGOoW1ao@j(@0aGEb$8Eyuj@d3Y+8UG3{t9gq8`;d`?pYH|s2=BnLPF8N21Y`Ms%= z1i*tdH1Tju;eLjxO9`K7--pS)u9aj&OPYaUIFbH)4*M6h#U=YM7Kt}Bq~vTWty5r2D0wrykP5pRbN5*C#g@u5L)NkV&h~h?8BnATlK?Avs0gnRbwU zpw<@vGT{Y-066XsC<}AQz<)ZWu>4Czh55fTaBAaK-z8n&8Mqf9qtV?M{vSc8AZtH1 zLB3OPebMgqrYNe1&-DGl65@3owm?lSBgh7_9vSv5d;2tJ<#l5>+~wde(Mz z)8X&Rg=DdBMShD&d26o4y(*7_xwjZ(l4M^c+>5^+$7TO~q$`US1Mp&RBco&Ylxgxv za+U5sR(H|@4B=_x-+}~V$3SIZ?E!{dBSqYjj(+SMc-n+|zd5@m5IknVvZu!#D!b4Q z-31|O8ULh>#20vE|*dbTHmP7OsGz~ey0e5~L7NelmSL%K^LaJWc~te>f`CW~Il z7lJcGZRJqF@?9@VSntUh-GYZCAm52)=(~iW<eC|IOZDaED0p~ZG%X#$Hq;11jM-F)K)i+o@h z>j&&~F5kw^&hYV0_MjXVchVj`tf>d=^iZJ<26vLwbXV~G3)Yl0iwjy7f8a|BP~;b< z#C^kJ?=))zD+Xha&r9*ED~x-3I@loBp^<+PrzA;#AU|)3?RCkfY$@}Dm-X+rdR})l&@AHrm??GkX89_ND~KXe zDfUzWm9k|lioMW67fAyzqSLIWD3W)b?}6N;>}wpkhez{$LP>5ZKs13tG>djlxm!M% zF-f-R($MTbP0D-#NQcuvwbb4JjX&IYF4kBhlr+s_-@-CtZ=EDU&Ih7m>hLp4??ZDO zFD8*Q*;uIK9&Z=mHmN+&@b=?~^?tsatvDfM>{8=e&9Sq+wFl(>qt#lja{^<(2%>Rq zt|LlgDv3?aQ(RJpa=Ll0oyQX!$kgp^=3z0d?IHJcoG}tNt?Og``Fqrm|L8Vti_|yU~iw znm}SNJlTx`33U*w+OBOV0Q;5f+i>i-3adZo3RmxCV-DC1Yh@V*2WJHo1P0a|wcPly z=C3ZHrM~6-_+y~}29PJJ8Rq(;B0VB%?KpWf^aohSQzPOAi0UipM6MY@`EFeV*i8q; zQ$4n4V~EDW(&}rK3mDn!tJ2Cq&DYOn3;DrJjV$@YMGC-+e0< zLGFUaU2863Z(n73i&B_Uvu~FX6{K)dm)%R0LRdaIl`96l=-3;R^VEoHk;zp-(%hb4 zLeD2Q{}^@t9lgT9`d`|}|K;o-ekc*kb@P08EpFnm4nICDlogq zyygW)lc6jD*{6rLkf*E?`kS#L@SF9*ys_JRVpX@(^KY?XtVM2e6>NUFcwv~KvgtAO zYR!rJk?k|*N6|kIIbI)wFjGt&8Xr=3PE)~Iv(`Ag|Hb`7YW?SJc1Y3agkWgPOa54 z#cIaZ8>7bX#UkBv7$BsBM;CCf>PYKRYmdAM#aZpkQd=8vMF$Ir=W;YNzO;^TEwXZC zg=;a*hWe%>_uFLeNNFHW{0RUjG?e(sWL9_Jh+B43>F{7zfatT_``#8_-M&zbJC(nC z>xA=oeKwoIT_P-vyOl4;yd*f^R$@8jxoN_$xmzRl;3vnNPMQddDqpV4eD}NCp3$-P zq=Q=R0M7=4ut~ppPc=f$j@Cx=2;nR)L7}Q+@cMAv1M)Dk&_KYTC2Kr+BrMaM)!Q^* zBkZ;?``6gCb)$2SS=5Ph2WUn?ud8{Qy2R0h z%LO~)D5v7~&{VU7%Gxh(VXN_6n>gcvUSFQ2(F4_@q1%8cH)*HzICitR5SL{Rl3#Mr zY~h8$V{+55NdD@Y=C&&5CiP6_*yboW=lf~;uh4z5uqB>N?%teD1{9_KodT0sHmboF z#|ZekgkaQD;4~{Xn16b74k&NcJDlU3=bY|(9O38a!u8F1@z+xiEt8oYKRVI^Ir-Kq zf!1HCc*YHdFz!Su;EO#b*BQey5*gRr+%d8Gi;P(zLjGV>KLZNugm$pLcQfK@EM=;% zQnt_g5(@a3JT9=Dr8UpX&8lT--Yb-kQqD6RXzF2Pp($7@o6jKBCCC5Kby@pv=yhAe z%O|B^#%CF`wPtt{qRb*GRYV{Hf(#BB5gOz5^x`EDY6G_k==ka6jvWlhkmax`+JLK>igVQ&4b)2DM~3j?^^#kM99D< z@&nkMl_{w~QuKv%`bSQ#`a^5tR>SFIA&^VAfqD2YLU^%Lgr!k=SEcdI@?8HpwzOxm zdFr?`?va=L(G1KEdf`V{s8 zuU?yrv&pRXemE7jjPY0<5Ch{y^>fw$w*uV#_(8$*I~+yi4ZB(PbsO+a!sW9&Qk_df z>1n!1Od`=OytgidNO1g#E0kSqiPX7n$uHB9xNwX5{HWo~V~V~%s&BNwl|Lo!xAQ+x zD(t5?qhr6C&+{oLd%B~oF|)ysL2kPjrz7^irfWw~Y`xmXs=Jm`D3F;w;U?-;-q@Z_ ze>Ox$dbS-TFO0#ml{dTcaQd#CMYa?>tMZ3YgrCnahWpRr zN4Nai_D2MOB{JDl{6ug5h!3H1*|?RiO8k)5e%P#rUrKLyMfQ7|bWZ;622PYDc`3&r z)>nWGa$9%GhndfifY}|>6nYFDEMU`wdAUrvo%3*a zJO?zidtnFAdwlnh-s?};w08M(GVjYtus3LNfU_=(3KdV;?!8U{GD(W+MGCn=tEMHzjTNr71 z2CI_!C`wi*37J=5UVs3Vn=U9D(mRrmqlWKjZLut$G#9`Z3KoA z^I_8+Xy2n@yB*T%QBP_k&_gf_1gG@H3nbtejyAOPtb>zOLM+(=S#o9jm;iF-NjoGJ zIs`u*hFcNK&aMaia7;B!8%MoMof4NDtDDCdQ^eOU^fVG6feZy?#nU2CQ$_>mTGTi( z;!@O>CI=e3I}rESVfH+?p9H?s=#mIhm12txfgVRbq}!Jw>=g7)O?(|?U=~h8S~<7n zS_jY&){?#AWx=K!Z>q6Sah9Q1Dd;E(aWF(JP`+argR45UVc;!B4OXA)0e8~IpAUN` zE08M5R;URLp^Oj6qaKr!QQvRq7#umIG9*3?pF$9?Yl FRi;y5Uqtr^BiCby4R0a z%CBo7j3#kxGhhtJQ0I^1x|HxaAvEX}_aWc(r4s>5yT!58T>#k?~umj|(y>r5DC=L(s^QmDtb1 zrEukpq@Q2a=lDs57fdPK$=66PLepMy(B{m$Q~aOh$ADeGs~;D^A@y7txrNG8OGx!F?O z=0sSlGq=MwSh$xMQm)xYW5%Z2Phf<6$22M@D}sJ(aN6ndi@o69z;5U=W{;r`iXwy( z2}<;>irEg8Mz%$TBf_bIj8cDSpm!)xJQ2hWHlLp)xMy4BvX>+pL|08Q1LoLfJn_`L z@WSNvoX2D%Bu)&Q7HQ<`AY2qpcSeB5+)=q(aI`b)XJdeTwnFrt5BFYx-;F#ZOJ!<|W_I16$dj?fqxAGr%vVx%2;A_!dyU zuYNxq_4nbZzZ682S@d5D;``zJZ(`!S zGLq&`x*k`uFj_Vy;wq$G9{Rhh!SK5N@muuocsClB|2n2zs_{mjlldz=C4Mt!#;F1(qrLS?GgyS%adX>35-9XMA@2oav^o z)_y!ymh|S-=tidyo!}1YM2<3oH0gD{UyOlDBBEmTPT!tHy`P``coC-=B>`m`b|##n zbD^hIg&4*9?cKowwu5E5R{#Nv2wrDo&*5{TxYEkQs*X$3Z7ku2xpl9PQo8Jr;vuG` zJzH+Cg_vm^${pQ}zGJdlJ696frCG=uZc0cW!UHnmasB9)I_S-1beHh0j3mOiovbcr zP(2xt`K0EJ@elT*>t(FtHSJY{(-V;Gh*I`GMv`*LX5dr!&ls}(suUu7wb#u?Gn zw)yno_t|At2wBH6__)P$-^V`?ef^Jk^5{y2%7gVShO}6M75!boj@9>q)dz+J`aF+4 zfc;lI!JQQMe?NuYd+K0l$-cs~TGzGV-sGjkvI*qBE;f{a4bOf`>hHu(izb1h$$>%n z>Imw5J>sqX?e(ps+>iR}X@A&8d#+Xo*474hav=_1(c8lPl~1-f<~^=TJdYZJ|0AEk zJ{{?U4R*aOH@XT9U0owx% zOqHBbLOud)nX^2|$wj%#aY&5Z$YoO(0_%9m_f?F%$nllDN=C&a{HBx3%fC=-#iAd4 z)~b^+LD2B;kjZc2U58_7u33mh#w+H^D?ikx5Iq&~6CTIGWs?e>pv-z#qK{eNX&6Z` z(j|=10AQ?1y{ZThmz^e|0Tj0dQD*Y1&?UgU0iEYai^&)ic$V+Qkn&)d18wS2OTN&Z zkEMAwzbHtu!p@J1UEx4SHBZV?KpL!>JK=Yp==~5+1vZ+@8m}kF`VpW(pe5dDrMma> zOnh8?eI{=f{jHx^sSSRH4+2rQ{N`RKSv*)mW6l&Qr`lYm9e7cO^}Swgw3jR!y2ebF z!j}te)zv)0orN1ozDT@(4w+m3a+uP4n#*JMaQXo}OhfDSq>SdmfHC2;>LI2O z4hrer)Ul*IHLxE)o_#HFkgjAL1;9t{c{s_?}b+ z{r*;Gnd2EA{viM{(EPj2Fg-Kt{|nqMs!3Y!Gr@O$2Oziz%dL_y7=)J zyazU9fa||dlJ0yFX-ulu01e1`FiJZvNqz&r%j0PZ?Kakb2(+p#-D%!F9jy53X=S{? zadd9xUoF2~>~Z;`nf@{7O8{EL8f1mLgU`Re;1vvRK2@@y8k$M6P)U(#eV9LqzX|va zTTp4&BDeQ@5`^tKg{(~rI<(0P>_>;0xVm}Qf8OLzxp`N+I<&b*9j!5;IAK>R@S9Rl zX`0RxxPz3|B}W0sBCH{Q$;q~+rImV7Jq~H1EKC*PXi!9AaZt~)AbZL%@R6^Vp~1C| z^_$XkU8%{$)!8&ojo{i_bE*6$YHLxHDY?0pF@-=H@C&QApC|5=cQ+G3wf{i56F4XB z>>GlE&F7{Zh=i5Ui=tyr)ej=!wOfmSqG6t4TwTZec}X)h=U|zE(mH;T_Bk`hQja-c7v zT|6Efpox$Vgsxa5Kh!F9a-dFm5T@EipjWK5JeoU@<~Cva#uNrc;|6#(Zo(VhDk0^f>wz zQIellOzh>RVc(L}_8-VN}De>071=dsCEjm=IBfW?z)22+*1rKsMdL zIjiGkryXc4}=&5*lvz6Fy(kX0fKGar0VWwrg!7otG{p=9Pvb!MF?n*WIM z*l(`1pW$rI@!t3(GpUc`>DAWL@iDcqlypw3+3Y|&_nN7fZl{T6mq~mrk0?=?fO8yO zq~Q7%v7?4uc;{)eS-L&|eVsm+|H##XcI_(`FO6VR*_V!zWjGO=O=9qoc6XuLZv{RK#3f&Am2LN)EbleFm= z{@XrWRXqAXwHnGVf4$zq;=X(K{U7gGUAkzkwqVZ3>*R(0Bz^W#31dHMniX24@dN=c z56>sqZBS;F*W)07JLBNtYP;uh4R5NU?5O_e?wuG3y`9|`x*B@l{Tlt4S-9b1?x!UJ zb#c6W4W!CIRC9D#ZyfLV#awmE@6=hZk0bsF-xpC|6XlS6Yw&RYl)rK)i)gIImF$pw zY?k<0=G2*%o2#;LqT5*^KzLh*!sH;A4Ry7#(dxn_%Y4l$d`^|MQ^9?w(Bxdh^&AQU znOo8y2hWq|7VK~fbVc#(aD@_<_$Gv9EQKm2eR&5VdHXps_( zOwK0BwwVm5E93Q@;YirMN(XK;@sR1@M1$8bi=TzOl@o%2i&|W8yOv^v_Me(`y3Ra} zqueM-nw9eS4@^vDt&^qAKx_%l9Df;<*BTvQH*<1AjbUmryfK54b1CgOG%ye zh$>kNeIiCf*`C932Z0%440G4keyhJZDQ7JL4QGM%aJBR?noPCtZRZ>z*V6YjxLH2P zk_&-9NiLsxMjnqT7QiDtT(E($+NLI~8MfiGj#WD}Te5vowvP;{yt&jOdNo`NR)#!a zxnggKzN<7G9Nfiwz|~BYH08ce6Peg-2vUR$rAcQuLMp!BYyPK%^oQiFOsAS?PZ3|Q zsB=Idm##eS7rE!qiJbIZ5Nw1H-<}4DR|@esMr$xBAVBtkSKx+s+#9?8o#>gi;2EQ5 zp@7J(ZDq8`J6drQ8Z~+hPN+bi|2#_Zujpi!PX8WE!EwN1MkU;>z(wQqPDTS=Bm2y? zCRHtR0g0v%!f_4##{m*LO~c3AjK%SDKa*CW^VR#26WFzm+l)~VOl{$F=a{Od?R6H7 zbFQ@Y7do7V!R>%tOz|-12a<>n%Wrg;;(3hMVFK&-mfRxKYi1WE(JuLMF@NYPE7as- z?VM$fiHJX!doX*KXT9^13sXz1@%Ad*NsoZ1n3q4U67*W1=L6fSfeR6ovaNQx z@<9i$E6|Buv!v#Jr+{5szj%|>-A+i>+F zdaKauDMwkYTC3x>Q~eezJ8S%QEj{X>Y3Wt$dMKOd>Beo;^-egFY>Q{d>>A#?WeU?w zF5P>E#=(z{2I|v~ELHHmqhA(I4zX7VmUEh=1QZU+mTu9}D`pNeT4+W>%cYiW=?M{U zA)v2w!WPl56weggdf{pHUkn+sAUgX6w%2HtF@d#9X7afbq0>$;cm3TWlO$~a7$^T7 zTEkCC+~D&d;5GBUp&ZOuNgv0tPLOru$|Wcqs$Doq z(|{YzXqJ#CqFA|kBupCbNA7c5BiwY;|IU87RPOpz+vLVf7o+<^yJIq>2@XNYV9u7X znFY<8y=#8m^q}G9OvUvMEn4B@IXYdGX`s$wm8l^^xp#QoKf&^`_x(-o(R;cx3T9R0 z;WzLsFg0kywt$*&jStT~r0klAf2s9?7`HFIJIFe%%yJI?iD8%eOaxjKC>?8Ab#1~1#MRfI70w6GDbEgPZwi`6=F^stT&>A@-{s&lY!S;NoeZMwAcJnC9(Sta)gqd-D!=S!q~aq!JW(l+x5ST2FeQ$ z&DueiBJCofvmz(4k1-3GC!NBW&k##?dicr0+tG+UoXbys%FXXTDwJW{&o`bHvni`q zG1>-c8fXr@8rbV6?50&vU%cdK>jcreSWRKWE}_lb>T(EXF>_AahHk#k1*Eet0;%fI zxBraAu(#Qo89+VPK=*WHUGe2b25#FCosFR``>5jaQ-oEzE4Wi~y(!}G8&ZT_-EANQ z%8fLn;_ukPWWk;73olajq8ngLC+^91?B zB;cLKSg@lqVAn~U0}7$=de-U?0lNkw1dh)aaH0%Y^!@f%K``Gg*P9LrHU02N^fr!j zVApVaCf1IVoS~pTDJZCX#aeB5l*@iTf3u$gI&Q%VA}%>l5+7q69B%WRa=s}nYV3)= z#*_1iu57vHt?UKN@S$wJp!SU;02-#_7oLZgSFnyYUB^<#IC-#Js-!KkB+he;IaFMl z#pcb;$BGrhr~dnw5)`SV5j8J*sarz$K4c~uqrNcx@5FAB%bIS!8WucJU(8bDZ$7mtf`)J5gyW=cFT+J=ksI|S%#>wvDN?zX4PBAGlgrU|1C|$2<1`*p;q8#?>cLuP4tqak1 zBjG3KwlgMcy9YS+j}qOm&=pA=SFF|{&C{;B$uJGln2Mu{sEK zMh9LA780LjH8K9(V^@rKFUT5Nah`o*fXeTAVW&w8FRhs(Ty)nM&P~TCPp`MWt=Ib< zNkSTKvTG_8M?=X;)_LDH6Z7H{(aPGeZ@c)>#kM|EopscHq{r`E+U7}0X&}xTb$*ER zCvK!JV}BHE({U73Rbuv%*Fcf;+F(g118r!lRB6CGueh~3lw&3}F@9D;8RG1AnxgEg z4={~I)2di02zix7z^XvWR?WUZJnz3dJqCD*kuefKgvDQ?oJliwDh!kwQW8<=@xN;M zcIt+K3o-CYKXUA~8fbLnS!wUH6Bojk{(OnW+Li^j`j3%&_( zUlZOvse+TBb#n=zKMvWo_qW2~8hV|m#`M$S78m5OTWZ-oYridZw*rtAA<`A?m-yEO zF=Zyxd%Wyw>tdpX{L>eM?%(aKS^nEn@Dii_y9&ByTKNR5BBnnX9F6=35#Stlon}m* z+WPWASozg+f9mcH{%Cubq>si_xMnW`<3R^5me~u(32z}cC$PwunagKFmY3x6@Z`0$ z^!L6x1wU%mA2+MYe_8)#-san)X7k43bH4;BBf(CL?7bo(d+v`T(_6}Lp9c-%&U}C~ z$);F51vbHF6y%7P65dzuc0024k<2S}FwG{?4-AvFzfCB`~qhQ3R%fDqQBuoj3iJ(Pazs~=!?rZt&;+r;J!S@|yI zTcwND95Rm*J`UzfTOUfZ__a@teylWxs!A2k^?aIAEM447BThadCsd2-k$<4+U>JzT z9FbPVkTy#Dcpp!}(&;8^iBii|>aHFuQv?zain+ObelUa?p;0cZp zc@6raIO?HB4CYUo;IEj)uS4+tk?Ku>epPg=R>AlP$1oT}*5a?%kz_d!c2u(i|9L%i zVw>HHj)$?H_+=3A!~Bf%2-UxVYdcmwqRJI8A_U4)ANxcigf$eOuG|oKJN||EbB;7J zqn@Z@V_bb8fN*!=2)0)ZS*^zE)CXgwV)~OqG^L=KBwDBw(ms{>R#*-0)rvC_3#>Cb zfO=~fU+Tz)`jFx5Azkg&5P~k8sE^7++J8z9 zPbevgPB!MZ%?0;eS6c&VO~o?CNZ1fYTsXJnBEPw6ejOf_0_9?kmdMj3vy+C_fDG7n}dPj(L zPAMrom@YMiLu(D3Af2ma@PW=KY#^YADe!XU{3G%xQE);p#o^8&=(2t?YB!uJ;XduHie+&0`|tipv!qpj@bP!pQk9%j;Nc1dv9isiO$yr-#FO`C913C}SL6G-=m z6BhEuA~3B2;ivnC@LOh+8zTonKQq`CuI8AK_jRVvzZa7dH< z<1NY?R$Dt8A9t!0as^Xm(bgs2IX2en)(%}~SAA`K6Y+SMQR^idBN*)o6|)5xM?P+1 zJrB%f^O5x~ih3<5MxfkGckXQjJDf;svjE6x>qE}ZZpSIX-sO8Ls+li8>+r_4L*mct zoIjOJ@k0LQbhUb_eT7Cx*WyXf>j=i)Rbn*&gXgk_x&ze`QxsRehP$mlJQUJT(s824 zzuY}a>Rh7XA}Mh=xMb#!2JUJk{f~d%gWO5pwRnJW)v6YAYWH^5ZEiP)4HUV}D8R;Q z?JB{xU$lyW*9Mp>pT(43E`i^j1}1jRRJIy&*{MJM$quF+pz+B4^9gL)jk|clkH!U~ z)H>^?9sG&mh0A4;9!ob*W|H1KQ^xfZq2xEqs4I0G2X0GnqSmlYJ|JCeQ`UPtd5*tr z**-5U@cpR6Jb6X%CrmRFiCQ;n$l?45#Zi`s78*tVS&+qP}n zwr$(CZ6_g?=4YR9r2a8Ss)pf#{&YO3yp}i+8nW@Baji~}xC8=yt(2|G6T~En#Z?FJI?orcs{)q%u ztD)@`ho9|n-3UXNbp@n=ghyDaO2Jk z96~8T9Al7KX}zhbS| z*d6fA>uzyTZie^d-t)W$Ak+H?ILFC72J+2F=w1e9pim_RX|B^y)kOk~+`S@{968=! z#+kF0h(Bmx6M|eDQ24&?<`a4u8aY*Ialj)r7+2JvxZ+e@CzQi8njfTK+36JtUgOU4 zACOjJ14qn^DY)_iY7b*?;xGx|zBHr=BiY4Tqi(23t8R;6N7m(tfFh3lIgdVUe-{kD0rfuAO_CVkGR}Jtan|aON1ogO3kU zx7q3Vh*LMkFaLhA(c{Z3Gs(VyIJ=G@-?G0LPV8ZTb&x&XYYH@V@zuAD7Z~?-U9}E# zZ!Gl~YZj%)_*yaTamc_uf01GSxT%C_JH$*_X>@>wUIZBE!NcSc-CsI;!@{u!I>E}G zovf3k`z>+j91zJ90cjERIJ(dbBxr4G;Ab!nwHLkfO8?U!3K3f5AP zvQ`38kMHF&-p}fG?1Oacg-JAC7==!nZUsOg#~x&$WGj-DZHu{3wBXQ+L;{ji&tZ$t zLn<^K348th&h%(Qx0W?*eQV3@h$Z<4)36U6!<2^Q0vSFw+Q_CZmjJ~r;nE?B4DEB~ z!zd>>Hk??u1FsGX^p}?GGpIP$DAa+SaUk+ZU>!Q7e*u)=TL@s1JT<0?0H6gO zL_ZD;@GmvQ{G<>901jlJ^9};Y881_{YZ#XS|L6fA1K=zUxU{xzY)Zb5YF@PSk?u2n z5x&$RdXwABqo?^*!YKI^8`7IxytuUF8tJ_?ZWa92SLRT~Tm7YDeIhPb$6(Dh&$V) zQT&T;yYQp1L2AtV^w7Y+qbwOd4#x{5|E}~$yYk#kIE^onEBUF}mCM?{JRv(6uAqy8 z!mCG;l2H(=o4fM^AMW)X6)q>xS=jPK z>Fv5Yb(9o0Fs+=-XO5lk-c?0_WFgMJGQAcei=ep=H;Z**zl4lQr(-46G{<6@9kY^b zGh#GLE83dH7GWd0Y@8L9h$N(>&|*;=ifGPtkdlwzt-U1E9+j-MpG#c+3FIf;_9ba{7QP4YDesd;UAxhrY@{~43&qoa{2+gD z8SBlpmT`eqBv98pF_i&2C%Ub2@j^|Xuxq~sw6~-V*78eMFtEEYi`0|03u1LwyfhC= zfvFDiZFrfPOzf(87#iW9rHIwGqBpr!9&OWD!8#czb zFAA-a*6zNE0ikYK`5%zK?v6kY;*mmU`Q}avt`mAS8~^>ip=+`pSH2E3K7CQ z&|yo1rAJa=2FEDqIV0oT6nTOjd=?4Clx8N2QfbqS7T&%ivg|=D3z6J%Acs!JxDMA> z8ccb)am-5+)0|*eyk=HyRe6Wa?pDN)waNY3E&bRZERC}HEkdmYxtj(YvXhoz=s>=1 zTk}A4+Ikk&7{z9=uX2$UFrMOsElJ3-mBS_+6skJ*|FXE6hQr+2FaUKa)QG7rlqddP z?28dfsRQsm{Xn>0&RCyw0+jYvks|`BW7~q`Z#z5$&G!y%0_5AX@^BC%hZi*1)0j9s z5XK8>fdcbTd|MHP!kx+tnK8a(bgJ036{Eedr|nCKa>?>z-?*dF+EA1IThRFkmzp|o zw!R!Dt?sNnbGz5o2S`ptBl{m^_`d^2u(AA4XY{v#cJp`G|G%8knt1BkzxnWhi2xm# z8Cvl{U0$4Nue(aVeASd_B9h8<$iNcTtFRI%8WTn|agAj&Nx913MP>T;dMr77M`d{r zH*r%>VJl}JdHRx0_rr2^D`OWNuk5(pV`^+Yy1rftP~D2lhgRQf<;fkCM^kq%D|+|m zv(>5#{i~Qj$svE}oYS~9?hM)QnmF*`r`fX+(==Fr9y#>nxV!Qs%fxttwuTgbg((@?A1b!nubePmtNU}; z{00aofWEll;=g%dtaD9vdU4S3Y$h7=<)Wbt?`aMQ83Nq(qrG+1H)n2M48w<}(LZm) z(!oYnUKTTcytq3q3A-I|e5$^=o_am+^X~nKN3zx7_5li-Uv0wBnhgam2G;TJ&`Kh~ z1Rz?1*@ZVzthg{WKrR}qcd~73YPP`&$@qF@^U64i>AzSkPE29xahs<}z&{@?fNV@_ zwiq8z9xomPG!m@bV_XfMd5=86Op~f-u@`K=@A7M!=vE_Q|LCWQ9bVq?!~5SnY@%N) z1`_Bf`GkacL5>ZBW)+@!(>uhnI`bwM@ZdAHG(q~*Te420<8z1pCfU_POdSu8#DwBN zDu%3B=d_p`W*`|A2>qQLYZD@3`> z>|AJ#7)hj!^;d$w6EyNh(v_$+Ah2~3^h8g?zMQ71?n4N%R{is1KFvYGtk#NopQQ{JK~qU?}V50WblhM5N!P zELz?2K5J~5#RwhkKost_g++W_-XrS5fFpz<*ys3)Y>2T6Pff83C-{d)l+YCw$s2WL zlhJ}2;qXNP2n`VA14`c(KvU6|HKOmdP4z11vH93K@_Cf>OOH!QpT0 zOBQhq8qZ;YFKXzW^qO-h1 zns%PptG<{xn^;;_^1M%{Y*8-cPBs;rvVr2Uv~#ZWq$Z^jLNuh!rT21vu|@X%$0@>k=;b~QW(bwGaw zL3ND_A+qJd9?}*vjgVM-1kTzpY&0DK7zyeu<2AsU&X=HNdPAo7uh5&}lI*HFd=X7s zB3F4>>;(FoCk-cT^1GNRJ(Z1X0$N5Xkcv-(=wT>3xsYO@g zZ~Z41aUNj%mLx>b9&z)fo(yZ%N>8bz?u~I9Jhg{_taiNh(OGZ~(h9ok9+b4y1w{ZJ zZOv1z3xoh}sH@&aNkZEX4&r`xbPn9|tM@*O9E+py*)^eJvg^s^u35N6QOleBBfv{N z?ezM$(7D6N`vx<}Cj(JHVspW@9wuKZXaORUqAoK2r@N6G1w^98h%;8}b1{B|nC^!> zx2~l0pDjjYPs<5SF`_Y}x7e2IV-G6F{C^z|`!QCch#+Jck#}{PMA@s(+*2uRA+~D^ z=lT4mU8N3?0sG3zeg_b>l zLoy%e(vr9Kn!_T6b!g)GkPfRHaV-rZ@?1NLOrGn;95F~NMO~7+U$c*t3DHGmh!Cir znR7ONxCN(XkXNZI30c;`HM$K6L)WneDpYR3!KU?o2G|5Ni}xB17&Ol3wll^98E?uW zE>htl;zGGNRC2OcX~4A~*rJ=bT!Ni#m>YFKd$bOk&8?G0$PvtM~Jtxj3e%+7zXz~L>Q<>S;7 z`nU&02f}W?!2%n!nE#_f{&#s?Hb&O}GY)s9(N+69JNzw|c>rEM{{nzP2W$kKr*Z5e z2=VdB`J-i>vJ)pB=^1T$DN)a#slQSmCZynvm(V%UCPKsbqa-!^)~CJQcl@i5Cvj&V zBW*_uW=$js-Om#nMt71R_-RQiZyPjrFFVtU=T*tFk`_B9%)EY8pE~B#;%7$R4Vx3PdbxF9=8#AJmH{^mZ^&ru@d>5&YbQFOIMef z?>}2T7M(o_`Zmj<=8bhwn`e|!PnYtxpXa1BXcF&s5PSVcc*<81#0HQdn!FH>iGUVK z&lAB;fqNA2L!3ezwfDpdCQDqL70wyR2Zva~UztH;lC{BMD`xU1-CyRr!uF)O-higV z59qU50#0Xv@YX9}ZwV;9B663%2|Rf8QG03WLx`~P9>?sxZxE>|3?eVd{<54a`ByER zL8|ibnSX=VR)9GQ>jtDPi;`pZncb9>3+2b|0oboyQ1KPENr|G#UtWGNBDQT#S>YjzCE6fm7wI7MCy4P)Sg5q#v0j?SSL z1}8#wrV0cTJgC^wH@f8sh@#Oz9h>}fzz0r995cHE90cH0{kyrZ>w#mP{pt=-wz@kr z1;YJYF=oEJzB>&I8hA;pghYISnlMpCSzgR_B#<=M7jRg{mL3^@8G4YyVJA#wA}F4q zZn6r=ZLCsKT>H?Kgo9&hS0l~7-J4;%&LDy^s`@_UgeFBW(!VjwXi-Iyy#cLo(TihU z{@z)gqhP3}2ZaP=rk7=+1KuTk2LF@LiLYY}D5ViIcawdxsBthFw=85Do3#QLv=E3h z?ZxX~X9paKSQUXl=14pNw>xTK`q(v<;2}Mt13$p?FOyZo_Z{b*b7^2Seh9t69-QDL z9tg}PEag?>gMmcFOBA9d9?{c3{4}`5mgPde&f(TK%mC3J!9QjO28>ej3~EA#xt-+@ zai$ueNQD3&EV_1gSDA8sQMaJ@I%tPcSNU_-l<2^34ofCf z>%OSL4;Z=X;L?_DXOU+=v`pSyJixPmban7Z&{=^ZZjMvJbGBKXd{Qg)+38nL^T<1v z23m_3Hxi$w6Vk%luD^}TY3*y@niJcGKq~fj?+JCc26;)oksE?-wa60MoE8MOP37q}li3&>NJ`oY)BAL3 zkiupSU~bO9%7>=Z3sbzUXDBzaX7e0%`jn<;8?bm8jICvZHh1s%_cNAJyqDIp=B9f& zeR@9AY6lHbQTr`gqdZ^8UJxY z!ouQgppE&apR--qEbC7cz?+Uif2&eFt0&W-$ z36twn#2LWlO2k$mHHl5pUCGWCptyf4mdylG&-WEOz(>L9KdB(|e-{d8`=8MKBh3GE z9?JGx$w2@aPdn-=0QKQ5n?zMReq$EOB$Uu-Y*hytsIOKpGadDSXZg;#Hny9WgS6Y1 z!Rynn$9M2>GI#=iv+%;VHn!do46yLw6X`0;AXf(Qidp)yabq|9cPL#y`VQUq5|xi{ z@BQQf|E7;1f^00;OoRxra9!ZMd;|((1c-!i5MLfa-yJJNn{cBxWV9;;hx(U@y)f1b z6_=ZuV{nfbWhuy3g)p<95od}NZ(d+seBcF>)M1gmR&W`y3XO`*=j(K;RL(kXJEpZD zPX>LK@k*%>9vsWQf+?9*KcUGX<`sVnTd9;uD@R?0=bRWyg+wnUht|d6tU4Y-6=y0z z0?+eQbm8_iS>Bhu_Rv5M!Zu2rFQPV!e|UW1z-gtG{Y>-_`;3Vad0IML9ZWLUAW}_d zDpyh>x7twU=Y?&bqQk`c-am~SC`=mc=?yfDo1vh0|MF$np6O9eVwKdEaf`wA< z*2&>R_^~2eBrERgQG_iVDDF{&L!7u71hd*Q5{ng4rW5sGeOPtGm}CLT$a=!?W9>R! z|L{H5PL{7>rEH*hDk0tcQH~D~PQhh8bXRW4&qw*?@{2aWafw?Li8f+f^}!cey`W_`Y#0&0t8ek}4nV z?PdgP3wBH!h?dRkJyvf{n~5F0GL97HFP=4hGt0QY$sAr>J{j4tOsqB&^Lh(*3w3ch zDX_lJtVB5aq*R&rfSx^ha;lZS$G!w2XNE0&%@AEmqsCF6j(5A)Aic(?aR7)P5E!up zQe9#Q(rJjgUW4w4RX&D4t{wNy!^AaVF!U|2QOjOz7H4zR zl8lnG!+Dorr8u!5pR{&Z&(EtIO!{yB$ZA-yv*rGfZ~tvkUc`?XHE62p^M|HsCk>+k zuT@GmYMi4^LXSd9OYmm0mSp?hDMmYmP}|z-i8;U%-q8qrS<=)5wPazKfSH!(9;OIs zS;jnG%cpP$w*`$q#x{d(0XV>G1b{9?(-%gHYQBD8go$K#e6&YxoUJ(Mt$N60)4rTu zkkwGj^2I!^@I|FlmZF$WZK9V(g5uj$=CJCiJQ>i zIvm*TR}k14JyzRMy#RsVGVR6YLZ%XajVF!V5*a9lXs?YYgE>&kYM5U1vhaI9bHRh7 zJkWpIP>hC!{3rmAon8=PT_QpyGUGEJGYB8Vf!99amj!PkJal0--ZW}RH^Psabe<{Y za8A&qBTF-{VWl=sY)6i%-6m;m0%EE_6u>N5RS`ve72?=R<1PE>#>`D@xUhxLX{cKD zDs$z%%FUFndCm0B_?FK;|9()H=e<}YZ0ty7bgqz#@YZ;tM!g=AcXYbLaKhU#hY&L| zUs|vpj(k}43Sl{#%}fV?moTroxhI@i_7mE1p`X@!H0t4U%;~J7oOS8YOyw6DeUhQB zgW*-EXc17jHkebScMsSc>wNu;RTmWuYJa}AL~3-~A+gvIr^w>n)(nanMbnPN*dMOL z3p6KF&_mIfddyMOTXi0y#L&zEZPEp;+M#^Ex9VoDGYPw|Xi_-crN8G76EQR|J&K*{ zw4Nw-y0%JcgFu-SiInA-I0H&E?s<_%K94F~hu&Bc>8yUOa%SydLCG@U%k`w6XflUp z{-gC8YQKSb&x@eTVb=q+a2(YZmOk!b)m&aBr{{A-T-R&K4cZnaBwQl{rwi^978yAN-$ah_XPt|Bl+5X-Z zdtWF%fpR4m`ScIv^MB!qKpm(&*1vuW-uri&WHGq{Rt%49l+Iv-Xd!tb5udNq+eslE z<%_&$&;`w_dxz)f&h`EK-G>atYi+WU zSoZZ_8Pu$P%w)xy4ChfhRN$m==SYHoG+K9LJ+riUH_a5q{X`qFn!|RBhEI9%j z1ch7)#WB+jh(>RXQb{eR&2}d1%0&o!A0~chJN3BeduVmO9CX8OYyL)}cW6rDwo3&` z1PbgqDA09t;w9Vd8Rp!d_|w9AHL3*939@t6aOeaBDV@R@-^DezXW}2&$2M;Ng~w`l z<%{Bbq^c+)^4AkJs0{jSO6;|c36@ZqtXF!|$V(2{%;WBW#U1sQv&&NlU?aU++VfAf z(aOP*i6t$ss^fQI_`?(b?+RYbpff1KWAn*Ks~*yke%f09aqTQmtr!RPHz0z^h&v%!Gw`iD(x6`XXm9L;6f?= zo|xH1-+0_8ZYX%zxWS-ba&(Rm%h%6dLCl(A;{zNiZ#6CAp8x(J7MsSPWm|0A=fBMe zP))WGLEM@Key<0~&QZsbg=Q;rr?r_!tGcpBrkMJ?IMw`Ke3XPECeH+00e=}YA=xy7 zoGBC!sxmn+Xj@^SLqr0aytL5lmD{)_!b!@X`EP`}e z>mD2ujq4$`;k9e^&PML4;A*BLS^J@nLX9&Gh4Bi5kN03F=(@rKV;1jZv0=T-Ox>(t zw1!D2LsbqOETyq*Wz!O5TT!=yZlpV7(dD8u7?hNv?XzXES7VGee7CD6MklU7dNe!Z z=#1o|gv3w<3U2inKE2$=x1h3{7 z-?S5IMsmjzQ}3jAOJd^(Ut8&}cR|-s!UnOHkVWe}QqZ8)S#ltbF(k(R8`9H^go1Wa z>(rSPLab#&wl9j`r%rd5AP~c(zHH?7W$C2WjJ!B~*QNeahMN~F{LGpJ;( zcVKn&)NDmj3O;fa93==5FEj%b%_HA`Xv_2FAg|B@ZV2&egRjNl=fi|+D zlO$7}lsW4(Ezkxq-_fE~C?ZHO|Apfu|KXF(a)$LFKl4azxLza!MHwjcwAE9*&Q&{t zIxPrGMp$O0L>L&;dWT4RJQ$2jz7Ys`t7y}gIlsHfW$Hi`LX~PMjfl>cX!>8ZZNnD= zSXpB2yzwU*b%erpl&x6Qg@3CI_NV~#o+}k!A%z(bieZ0-&)AJ{J$Y9vuO4szUIc3h zkW5#v+~^V>d71Ep=t7emXfDzA4bYnGRYo2a#58jU_C*)Pk>jGA+R=$q9L@*ql)&>B z0=i8_!0&0&rEj*;OJ88=6R9S%+ydNtJ|H0>35!q02t4?N5aW0fV?j(rB7%e;WX8+1 zH*x~QL@qgM1WtP5*7z(_r4EI>K%%&>fzM~^91AJ8Qi=6u0KBfi_=qmjf5P0YCGqL@5|p$K|XL&d3Fc*=RT@dh>rF<{46 zJo1JX*Yxb>7y}J=Ar&@1K-GNc$Us>pz*=lmVyi-uH4=uX!|zkxX)@v2ebJMRi-&ym ztl|%YCEz=3xZ2&lCA~RhjOv61WCzrLOhEwyKXDJcz_0~(~ICWKHhJ3^@%>oO-=2F5yS=u zn{^RD&O|c+=ci9s$BN(8fs@TA6|FTKs>eQ2Pk)jMmTX$zytvvvRdL56(uu%~WeQbg+zg1PP<@N=dt@m}z`rdPKcg-ElF4a@Dk3KYJgAotrz!hvRWY1)hq z`<2Fl<~7=o%n8)yWpkLsJ;6>x2lfMT9FPWz{0Sw+X8RiN6A+-vPcga1xV1iy^IGHx z>oisN#l9;ODKKd)ZeuoS!cxicL2rvu;mSZ{{ z2~1i-F;vm^5uKexbLqE>@_GaZiP<@NHb)iTUL3%plY-grx;VdJ*9%7x4y~WCX0#9( z93Cg}?uDJ?;Fz588z#(nvk4~=k_v9@@){=glAYv%`u@OaLirG$o#cXg0SukGA&+7QT0`L9?T6!rBcRKKScdu1R-pSJeYf)F)1xP1 zr_t*DmK|3|W|N^;%|NFtx)Dvz45waXrAHr1nI?iB>fcDF1@l>Qd5NOAQwuCuqE9g_ z*hI}_-|+gk?f@+$CStkZ#hq#COm7e(mC--VyqfU_HwS@zjJIX z#=<(LdA(N7p!ea;nxl}ZPOykgVp_BrP7|D&r8imbja1kUv7~gXMeGE4nPAm8Hp81Y z6LWrGV#Qc0mvtpzd0zClRmwP+)<^60vcSA3Xx9er0X{TU?j=sgSsk0bom+|YV5;{H zYzF-{yJ7g_V$ip}fnFKS0=EHT%ii~mZUMZ?oIGEh%Utivc3tAXXeTh?Lc_`m3&|Nlt3aBLqA#u)+u{Qre9m9}Z`2g$vCDJKkxXvGbS2f~@^ zLt91|SG=lwP2Jka2mSN2y!HP%vj2{h<2!g7x&9hC*;_E<5=O*r-+N@lkZl%=Shq2p5*9$Z1SO?A=-omY z3Cp7v%EAYrD}s0~4YAwt!x<|%?pGWRZ)Z(6uZp`Np!}s7CE;lTip}B=fxg59A|NU! zUE-H^2yjH|esPyP%~0dp5ZqO4L7Q|=ltrh&1@dMuG4iWE=G z1hryKST~%4;14+0u=?XZrisT;=2~gGvTAN{uukjdjl!|=MTzE=O$w7~k?J&(3&IGt zHgDtYOghm%s~ah3swOxydS~80A3bZD&?GVcZ`gvDiKoCBqkA_qWjv=T;5l`Ku4%0k z6SA!oeBupqVbx+Ya-k7juY8C!rjn;&PU~hU{;l&^32j=s*8m<8E&izt>PsN zd<+OvyWLm6v4k!Z7imly3jXWkA2F!&d5^who||L(^zAw-Jc_`fI7yd4lTAPLdw~?@ zE{39Ti+6$jYT#APlkZST+9yp?AADI)iwn-%53pxZfkKb9S{z}sOMJ#gY0`u=7$ zKe#?Pz2ycgoe0F<)LD@_SWg%?YS3KT!`<-xb(EOWa#$tEma7L?8p#0TluHX3$XBZ@ z=`30X2gru`8yxZ0n#}NDlT*!%VWzRE=e}y?`Md|fOfvOxU?fWV97j}a5;)%kzN#kS zRSHhi$yBmxxEy5HVX}xkrXh~87NjuUW3QdDsU1vV?))q_R!(v(5&HwOP?GXr0c(Hs zr@ES;=5(%>Y!8X_zz|@@cn34+LblUCw9K~6VhST24(vS8-ZWAgo-$-bR#r#Jv;gK> zdM)t;Q-}6tQt?tGJ+ZI1+g8~OQ!0WF7E{!Nu)KNOPF$bpKvLu*E8XZ3hzIy>ak7UUoB z;5XiR%^DJ7NRBjU(IiLKB0Ql>HNgw0`JFll+@?6PXV2lK+|&1I@H5ZXuh{D-$e4B8 zMV)s~Xl@qt>ChsQlnLi8^2unH&N&Plz0-J&)-%b%Nx*K{YGF?3LR%=!-dQeESXp=a z3A*lqG{IgRSv&?Ags?SAOLLAF$#=ZhoJlA2l;Vt^f1l}-0nY@5)z7=mn|PaY&acWU zb%-sip0=LyKDR6s%DPLkDmJJ=cnWuM?_FH2J~hv`bd^3E+l}%TXd#nO5NdLY&Ks9a zH|K$6I)p3ahXRT5;KYF!g$#8~FbV!i096aUz9JNtk>V$ENoBw>L5#FITbJwwzTMY@ z4fGteWizt*dkOJ8Dw`bP$6%wWbuKm2zUpm}-`41=s|~j2sVNh{cAcoa&KG^lHJy9* z(#w^QheF%Dg44`5BCfo?dd6&YX0oSDPgMr%xy(kHJDe5H@QixLBz<;`5aCcPhD`LKZi=LeV< z!7-IqVWwsYHzLNr5jez>)D@P9yIi4wa07&IZF#n)*~Hr^mU;~*I|bo%x7+fsPOUWt zIQeSRl$`s@Dp%|0FKOoib@tiU2?&|F!&IwIwqiJDfEdehgZ9?n>oYQc2K9v=9*vzw zOk~i%ws%=CIk7G&iargjVZnw42U>oeb+XRf^V3zE=|kIT>$lz1P%^L=zF`p&;)8jj zk`NIGB^T-wAVZSKSqMhV05MVa*3!p>0j zjD~0g4;|tqGhLI&9eQr3?ZHs*Ll=tdZf8mttKoWv9vh%4EgT=ldMl;hyn9pH+ zziyHj&-ySZH?ML#+Z)dm$u6l});9%2n`gh31yXIeN9P(br|?{*)$uR9z)nva7nzXr(N;DKaw zXHBRwt5m%E9hCHo#DO&YZ?IaPLBao|)U5xVQnUR}qVAPuN9-Xh!qgY)dqC;fJ}fmS zy*{>m>#cEU(DLJG1l#Ip-wkErkdWBR<0bnYwJS&qNu&BmRnSmQudHR_tDFqpt(@$P z-tC!M_xJi{pX`7b-xm`Hsdu`pDs;T%J0qq=h{M&?&ce;Y$yr(1*@)gHiiq=WX<0}a z2XS}I!opLW-2bK~IwI2jul)AwatPDx*8iK|4jP{M&2NX`nR|DPJW!~A>gSdyyJv93 zwQ|lP(b=%?q8DeRHvgf^@}=t5oB3U+W&QdT4$Q>JmpCt(h4Pe`$l6E*>lQ#<)Uik1 z2Y7R0ttlpf04@IEHYP@AJU{Ayh*L^qzCsBKFF#89l~=Vt7xugq(CYljbuD`sUrd zN;i%dnra0<;p)1W1pKor7GQgfmGn21z>)(3V$=tM4rZPWAC9+4#H}6kUHg{Gs6&fN z77`kra#`AU->Nb6Tp)3o(ACi>H7@57K@g7+Xq0eN7*NNe^CBkAXe~FP5ng()O;Iimo^9wKqE5}q*q-+ zc>QCPHPMCrF2IuJ@nX=Qpf!^njAgSATq_;b#|W!b7?_)pibpW;-OIv}bzGyk6$&+0 z^~E3^jjTXS2KP|-h$~q=nOa1Jd7googlOy{%g#x7h9IH|3TWCSC~!0E2)OjSD^Thd>9KxK+$eGP)57sGkjotwBZYnND7 z))9kgpl;L{ioGNhbNnz^n=$XgK#9qqLPuNXs8xwp_Z=13uP60~sv{xLVfC;cYY=FcPtyMxmq>G)Z-lk_N%rGz-v1gW?yBBjKl_bC+A(rK&ms45PA=1*I> zLP4TxRd$y(_*EmEjmsY1f#a##{Pg3|8B@GnmN=GZ;5>&vAK8ySIhJrNIeGWTb#_kO0*?5=p6JShITXlZEVYuZWmXBiv|J! z%MbvnUUEJwH{2^Jh=JWtGKLL0m0ft2yeU=WN#>-yWE1(HnQ~}Y z#{*7*rIT9O60xMRu)u`+Ba(7Z88bU;qLoVW3-8w2I%DiIcT(_=A}+v+USVUd+eZH> zye_UodgNq!Twrncp~=9hiYN_rQ?Im;Lamo-gfk1N%8o(P`6vZGzl)>+UjwT$Lx5`V zaBxwwKsawI@LFyM+N~)ys&o0oqr|lUAsTBhg~^L5O-n-cp&8*aRQAmJ4wmj1DToj{ z^al)OIxp8`D&|j5T@T~d`+F=51FOV{ROq_sje^?~KJq>Trd?&pBT2e|a#__j$kLQs zQ2~@Umzf=+Gw_En1+!Kz2bFZ=i_IgG`RtRqaZCDk9bXAxkFl5!--n`AkGzz~+z-R1 zQHPmXI>-d|u&dQgL5pgJ0zFE#g1_btUp)Q&N<#^vU8`H*`nYrMPrt2>f{zS|qx@+t ze0Aq6zv9-j{P{`wZ1ZqaHd$wM8x*qP(s8>{K>f>6de>f5iY5JFR2FezZKr_g3H zZsqK*H~BeT0&bg(tkP1&?j0>PmtDp$ZINGVT2`XgXFHtX4!j-jV_2KunqQG%BJ+*5uoD+?NKd=+9VaOvB-;G4D~alg3sj8PeyEfEj6bUC{TO!i{@ zPC`>z1vUFhbsLaa)%UL9VdtQckAD;!ZH@zw$AM_`OYE22Gbs^uy5Mm`W`2QdD};VH z|4ByK|2r9F`oD>f|6d)(<8K`XCNJP%6p%&0b>OznT!@LD+X8jt`R{aHNHUpv1L=Gl zO*9^&k=&7;+vymlqWEJyLv{gw0W`m_lgp=|Oz-sl;rx3+>*Zi(l{AI>_4;bwqbM+L zYZ`b<=f(Bgr;Y`y=1b)IS-6i_=jNd4tOYE8Ctw4PD_XorySlI4kH541=k9i7qmH@C z%5-T9u6n@VM3D7VfcCJflnU2%mpV(zc=I-CBhKeCBfEW3)yZ;)OX{Y8UFIbp9^u(# z6L7z`#ZJnK+zA%%)&*Bx;Dwk)`ln%JrV2AWH8 z6hD!iIlqQ>r5$j%2Hv3TV2D9FO`RrI&VIW*NwmV)(yY{JxzjW3Sf+`XcLx6o+Ztdl z5E9?e{`V|aR>dR**WU#nPh_ajP?+HYM?#mbTfN(eDl^54g$Z1S1^7V~tXI zlvqbSujJOx4HMT^xMpjRn`AlPWB<4?h>rnojUH6@8%E1UM;wI81B@uEQs`WqUYv4n zLxR8m4EuA^8i8Xd1*j1phi+P|MT2`@2c7q%1rHBfzQjqM^)w6qCD1t5N?1)z-c{6g zHlwhPEwE&bUUzsBIl&P_>t>8+pMCMKk-`Z8nIK|96*bG?3l)+QvY;vdVv|UZBGf1< zeDaHB+wLgkm`GjL(MWN3>QofV41iz$ePfZLcF{B$Us95$fG!DBMs*ex&%cBw(o&eD zs6ac_q@h9T_-HCBLa&lroUP0>6U9tqOh59g2#_6(9>t@;gnTLRDtGb-C?kq5@l5lW ztEepZiK>*GunfCoFNq*>KqqC1SjHSf&6p}@SlXIwQ^rO$a$K0M(|LeFb5bpza8lJ^ z6ze^==6$fm)@D-`*`8jtt4bs~s1!CmXu62GRh>IfF!uYwOr;v5&r)37jbX2D=Aj3b zOnm`E>QZMgL8dO3{!+!TtW!{pD5Bi;V?i&a>39<< zP9_41L@B#qEBtt%6EB--$Z_vWZKLE#avp*bTar;wTi#J5WAHvUgbOURW|$gmv`o7( zWylKYHsfGiA;~WIv`w3G;f-rd3ZPJbA78r|5Tfu&U~vC9g>y*EZ9z!ag5Eebh#zf9 zcT!0INx;+KYttMIo`GF(uf;I zH+aY-zi809=pfq@1u8zAqwV zDfzW_FqnV-?k4y>-QI`%yytB2MV+h&yq$*qfPs&LbKy`^EYf>pMz@Z$V|jh!e&g`M z_Ho1W{g{T87Yea)>xprgCAT@a_kOx8u6LWmZcb`g4V3le{b2ZugOY_F5vp2U$!T&W z6Mja^f!pH=ubBVDHQ4XKve9x}6d z&itr;4bRzL)(%(YIPmPry?P3qlh{tGexPg=)m#3 zb*ifETAXJFKZZXz0oN5ot?>c}Af`Ck3WDf-;0?^#M-zO{MOb(9M{uWN4-{kIzA{?1 zy5=v&hZVjZ4;710Z+FK2C+h@Flb^fPODjV4K3~%j!y^-yh~hjLGOKGY0uB$!5T!%^>Y4r`~Xd+GO?;Cu0<| zBR$9xtfM>7;y3;5<6tr%DX0XJ0D5JD)=oRN9yAo}k}eAQR;u*oUEE`hSgQ(UGFg(8 zZ@Q>RHa()&SXR1HUGx1~Ni*$2!jUfMLF!XCFAQ@1v2YrfZ@ zA=XEP4|SgwVdo_tvCJvdB5!(U;PO=OzJ7MwIcXv(;@L~eMRcTA)Nq>`eXw{U#oh{_ zw6Z)UA4?}M}pOB zdr?X8pevyRL&fMq6T{R;j`ITa2X+T@A*MT;jVM7Vuo8OLw1^1_A5E%bOvz_stYAlA zN1W{OrEjri*f1}`X|>Y!d_IQ}5&$h7xZ*6LgR@&iKkk1wd}-G}&ctijmiB}vGyM}& zXs>4&I;utJ8X{;QNJ|56@9jb)+l7ek8jinV!zO`E%Upn0Ee$)wPMWJJzTjMMSCJC= z#*RacQPNM}MlXzNo!-g1KSCZcIdli)cBGoa77YEoT=Gs-8Pf@ga_d~9Qerhj8B3gs zRTw((`q=FvbFe__7rjMDpHY62vIeY4L))TQw$vj?m1lLLIbramW$p6Ycbo0or@=I& zGPST|_?0$esDqdT1ZN2@rpbX-rAWbC&a6Lw;7VWgM5w z%dX0Ng#Y68(W#g$c;4dm?bS9$8{6>x5ttD|>yDeAGKtLGFGqC%+h`z(0mQKXCAo(8 zii9YQ$e9qdXigAc5w`$E+%cyOrbda|%8)I2daP*Cs>&(RHtF19%ijtW><~wXV znlrr9V;Sa-GwE-a{VCfncM%^=(N3tF^zV;-o|`EO&QjtV5#G{3uux~H-n2N@#WQf% zcY$hb64P|%_?iSFhauG#M;uadWs!|*Ji(J`iogX7Z5I&NM{riwAM_Rl2GeB$-{?mE!hIXQl;oiGicGl ztP_$82!k>F(0#gW{qo0|HLJ;?@y!A}3a4L(8%)54iP_aS6#;!M4C@Lch;UrHb`m~{ zDs0sR%XG=Jx&woSz_I23VeFlPEaA3o-K?~2SK78JZQHhO+qP}9(zb2ewr;Mq&p!9A z8~?+4n=xa)&4@O}=)JYCaqKs->S3$1Uy_*v(@TWasW<(+gS$2XfXCJ?p!nF(rd~!y z;K;74Sf7i$F-!P%x4HjvTx?7`uA+v=qiE2pzu_uFts7 z!N*Nf*{%CAo0T1O480S4TN3cgg*Q6>mh<2*Voy4oS0q|r*R3Gw6_Q$$AEUJzrB~UM zEtfsvLk?9&LgY8t4@7B3&g@ze7|d@AS=++sq}YCsSDe||Js25HdXYC8i?mQAwkUgo z&vJIIhcqhG0Imr46rfEU8Rw&qiq9@DBvmD-IvHM#>q% z7q8mA#!-`P6P+g0Wd*#9qKstef_`Y3XKTqnc{eT!>%{aL2_p^E!}gO8$J64raqN4f zh5gvFtN9ku!H(WBbgX9ztAN#tqy#uO-!9G+=O^zXfPtDUZX`CrY<4h(nluvbub4qi z7vrmdS>1DY??=+TaI+9Vb0>+>zy3PPF0;GumU(k|D|~VowCo0qZMJ_wz?52f0v_@o z&~cK6$NlpGnwHc__)iM(UxI9z=>KEqJE{7=rNa+^a>Q}@M7nYRQ_eQ^g9G7SeVF6E zD67$t_esX)gfK3N&>ym;ia>r1`;$}IMNt9$t%idAjrI5zl;eGPUX$@t2q^%0h9{&9 z7JhcX$7!&L7BpmG!;kl>@mbANo};}G)9sq%NFZ`{SPstYULoxX$5WOvj)xa%H-&x> zfv9ukS)WP(r@+Ac#2fiNjO+66U}R~D$0WtV0PZ< z_x>sCUD@Q0ojC)1I4XmbG=9>nHF>?Ql>^AidvdMful4-dp?nUtiiDDI>}?LLrS1&04adUHBbLTM%6>(V1}q*rrAQQR zbuq_N)Nncr%pP`&Q$z$5>#arWlk3649>=(lD8Y(QO#ntPZ22+;q;&hrygf}#y>2LW z) zUjx=6Q*JyaJF$V3dJB@|x}?k8Cyhh&D5J>UC?_rB9)|?K-e%gRq|SD<5}`q3%@p@VIjEW2|QycSVLyo|&Wuj@ndp-d6cor3A}-5cg}9$=?`V0orPa z#j{>ez80;#$NtPj6dX0;flVCS#WgVzIwxw&EJqns-5aKhX7V54lGOk-)gn)j;Q0)K z$gijqH%w62P1}Jn-xC^2gS(#(m2jMu6Yl;lxkf)El&l?+obeHy6u0OZSu{A)w5V)h zbz=vSR8x%Am)*3)pJE!hCdV^C#=lAV(ENFF+2i7})@s-vV38BU_YepTokQAXsu`c! z?X@?|1GT#r@}@;|qlayN8q6REU7}R>h-~i++-7Z((L`bSj+vmdW;@Z$!GbvM1Ish< zB<5C`G=zq5>&*F!mMTbHVPX{fxUuZ|}h?}w*H6QL!zqA&@%;Es_R=?(WD7qpJh&delTt^VB zBn2E|;&sD_eZz=~|F(A#phpdm5asdPDXb#|zs3rw^V~lvS^YYC&p*zR_6rUW3Tp`0 z_9XOASPI5(IeiB|I^6fwJhQs<@kd1}1Eyv;7+Ktd?nf$>oP$Z4d&I*RXo7#S==Hlb zg|2WYW4>E61AMOp)1leIDB|UK5_o7v2&H_G#K~xkH0@oVjXxPHL3Owa>>@Zg>WY0e ztuft3`(sRjppj|V_2M=-O(UbrYL;3Xz-q8eM>gy`by!1b{M3}T#8bGPdV*~>u6Zrk zW6CEW#v?P*YD3&6)j#~>-oc~Ccl;+MXJEjm!?)2lhved-6*jYUG_t1^w$yVp5;QWf zF*Kr;G_p2vG{vW9W&2Mgx%#N}&ra~)KnZ=-K_y;+5CAdX4bWTak={+K!~Y@eqPm!0 zIGIfU1@;fxP0d_o_yV3-7S7TRlL7i*nKY1Gp1hUNCPphId>vL zvpec=j-n{&-X(OmZ@1HK%E)ZSbeCG|1_*C*OSxqxPn70)w0+s_X=<~9Jrho6LScV< zzEuIyq#gEAWBwG&INVRP3cn3#h17vnqeQXn#&xuvr)jsIGd+!oKcnjG0XzphEJ+b< zcE;~Y_`or()x6&$osxk?B*h0a{!*pH$iXHv+e9e zc%adic#s)eV0}u{fN~3HJy3oRS1*r|@(-#4ourzU8x=Q*_})0oU*-a=jR6GfDK256 ztkDLsYq)zP@KOw(d~V{)ap~etEay9V4Q|BFM5Y>7*nKnYgd^&ENrZb-pldH65Z(qp zDtIt^hv&;Qr%47@SlcuQ(rj*S^nRukn;vk8E2`0G8_0*QLB1wJ3l^@OPF6SH!;eR@ zRnt21cP}0a4vS9}7F~p@&moVIAUJvAYd+9ID_Wdc-~n!@u&)yo>+US>g13*@?UF&L zad}Au{j?sH>x5uW`76eD!QWPeAm+NchB!fmB1-6hTD1U6cHn>ar6J?;slgFc0IS*F z?eJeUP3cF#yTD<)gA!c0#YrM7Nh=e}HlfOJ`KgbY5<}NLn@=~eQ2aLRmaZrfCGI{x z2}m4wwDWtITYJ(L)z~taF?cXL7h%~2$hOBiY!Pc<`2z4$fm!9MEH;QW05K+c$AY+! zGiN*dP+9}m^`2@&$oG_zLZe zJ_U;hqzmB>*0MJq+L5|cPG*}ADc!0VLtaz7vl~Zs_#f0w(Wbi{Zsi!J!k67ak%_k! z$C+)vyrKo?y0k@e9tv=-w_)$u=hmGICXVBY?j`6@)7_&vZ+3HDHpcJ>>~1y|m+=BY zR)q)2&bkLM)Msz{(Ckrp!~@ChNriEd-a2vfbk+jykVXa$ruLI=?Ymi2)}qK8GcPyRpKDc5G8NZ%Ei4vf#kb&v(PYq-)yAj_ z{CNtHq0`F87=s7SzBjD-9&%`c&39Tp1 zW$GF^yfFA0>Y3KSGF%|{5)PKYw^^LO%|R_z?p3<3(W){a83$|`kf>7`jN~}Ub-QE^ z`}C7Pt1-Rfn#&zxoMs``Bp{S|bLO}YK8honA~E|C>U47k#*l! zp$-{`L|AC@%}cbvRZJsYSbG9F4(nPmrg-}Yc1!eq_zzhJnp16+-^$$aPpRS^s)#Mk z&8F!XEw4dm*c-aXeij_HgEy(v(TqkW5x=e)h3tawUsJG*PocX*m>)8J{+B zlAb1=A((z}M_Dlg`#d*u9IWCw+e+ES2s)WMzYdIdZ7+zo;o1hkfVCugj>>Wej1=QG zl#}nydN=-DMh{vN_CPD$B`)ebUod9tZ-1V+2Al~3J8)3=#DoHDXPq(D8lK)E^Q!nq zmKD}~W!so_8cYhY>MmjyS$&Ra9vWLc*$5)8a;@c zg3{Pk-K{^IlzLP`n^@0CKdTOyEZ{wpcf0LR(TfvA`O0tH3E^PD3qi0t#`LSqZSQ(* z8tB4q3AHF!I>q!d@Qf5ot%s|qF!yD&w-3APVqaKoTGGa}Nn~fN4Mk)7XDq@xuhU5T zu(y@w;B&mO7eA(Rtmg~fEAHROeOmszfoU>=bmgDUP)64O>I`LK{LczFjme)g^nXG` z1>uE6;=DWmx2n2UjOG7SRVN;F->xw3uNp^^h(fQ|i^gq>d@`7IG0&*J`UT5*Tit&s zZFwi1*Q|b)3?B{al!}pnKu_*lAobXWPX5l_@VbAw8xCkfu5==EY1M2*)v1D6`FefH z5WN>&V*zsvPA$g|&-IBLYX+ZJa2q~;+L^V8Vq37c?`_z~5x+E>tRz(%m%h?Dh%RbQ zHnXx4Aa+ROQK@=iSn^fWlq;jN0g5?yp*|STuJ5{!;j}tc6-f@rH?X`_Oi{>Kq)j@m zi>AD(!+X)h{DV2LRxbY7v~5;t8etj2_L~NWJEhyf5*f-gIVi$?IrI~T z^ljTX9gpRg-vEp?y3t7A+nC>@H@U);U_?lahY!tV;1R&q85;)yc0 zt(I7Lg=`SuQ9d~L^ns8sZ?ed1kk#0Ajpwe+mUcYpNMA3%jh2z9M-~ya)7Jj}Sn;%g zCbj+=mADU`{Kbn)#-xK~(rNb_TF8gBn>A-Fe=7#<(J=E~9%fY6esd3dc%}s`7asY3 zh2YPEs>9{)?pW`Z?1j1IU)`QEcMu&*_S5@2sIvfRezXCB?%R(qH03zXWHFx3VxBnc zQL}=>NF^4t;q&sNY5_coDa^?X9Md$kLdG3y z)5{Vy3g-I)r}K(g*znUgQ7!i1^>G41JZwOD0yBJh>;r&G*}J(N{R*uWO+49Hqa@TZ zVT8H{ekRlg5c7M3@Lp@mdB8YO%eI1Iw#%~h9DFc11{`8d0HGC3yFM}skwXkNd8cP$ zZfP7MeX8kd4%r;ZTjr;!9Nlqkhs-J-p{~cUL1zXXNo6Q#XsdiI(fbqr_ZO}#(5_rd zgHacm+w_eP{aNow@vQWlV{;(YH1$H3h=Xaw+!~Do%AugHL&|F-ORt|c83Y>{)H#xk zx5CXdwvSvI3KA^!C_FYyAwfkN@W50(3trmK`k`1@I=D%t+P zgEEayj<~P={o&Q}iKC=cY&h5xjFaeg*fqHvtlWvqs66W}oxMu$&#V|=a#>$6$}<+U zdaG{%u6e*Y2$q^0lpFah8YY3t#4U={S8&%DCYb!XC#{Qc~yMi&rjCe-B zoX-axY?$I?30ER<*{kI77CKNr$89Enzdw(Sr1OcNEqGV9(Ri=R-&Zwi_B<6oujvwk zH+q`2-w<%{fNNkxJ9^5k-%#@N`F2&o-aY2!;x~KeIK7F<&-YVu&yv#JFt|UzuZW*- zV@c_ZgYav^At=c+C6_se9+~e2!W2{$m*!NLkuGSF7&YU{%8bVD60qmsgt1Kh95_|~ z0a+}P9IZmLWF~nBQ~0t(1g)S$^`^@(g7Oz zaN{zB2%!GKW-gpFbvyT0EfT+>#w#OQWsesQ2Lejmq9e@m=kwoBt{?@maVDwDz!8Hb z)m0ECSv{>lUro-7{zW13kYgXHTi6aEKOwyK*MUPFAB=u)B)ylDYY&_~jqbf5Ix~1{ zY*w8j9lO(NI81Is+$P8Es-OQM71$&U9w*^jHuVhhwdWRI^ausBewL%ds6Lv>^KDn> z8Y@cipXB|&WGOH)|HrWF^8YgTUV!vR^y7p819*T%0S}A~t@&W*=db=x#=$O*tZZ?- zabAoom|ApCy#`m!vk3Q5P0i>fM+x|2yL4IRAZVt%SD#H+}Y=(;?0Q0)F;d3TQqq1GGI#`sn#`If@Qo5L*-b;=ido3qk{H z2R7gWIpn$l^ExQT?b;vnMOHIcw53oTul!;jc?k7f1SS}du)Dti^fw%A3dw^i;n-yS zx&P|(%gQMO_Jy@o4JcU68K8KT*Bbx=Ah__-%C6>vpJ{U~{3Ov1G_0L@y> zKXjGPGkv019c{ccfLLYJZ#Xs}nQ*-GV5HKJL{T4NNF8>4;BO&NTM-Hpg(@Oae6yL* z#Fw(Ze9LAG_0m!=uV{p=TLi<`LVla=z8;oHsTk7s%sPURFQaeMvA|FtEIe+Y zB`h2%bvpbn*ZUyxja7!sTDxTQeSn@hjSr=Unhq3Bxa#e9022{4ee*lrZfcy@=?rZ*u+>{AM!kv z^z^skDbfNi{EW*?V8?*4%IfA`YyS<`X_YO(HH|qA15!=jPZw1On2laXS=gS8eSlmC**6;X;UIo`X*{NlxyM-0m1)#TFAJH98-p;y>`Bpbm5)J5umJ=2^?tSPmpSBY{OPJ6|#_fdQNFSw0Q&HotPMuv>I+ zRlVe8#nZXZ`{l$3{wU_84P8`R#Wwoqv0)+NS^SmMAGk2!{!@~~gTPF1r(ON*-h9wWu(zZ7JRRi? z{{C$<0rSsxi?T|5h8je3B$KP90M>Vi&8Ra!_ysmdF!ztsv ze^mVcjv>eJpY)t6)zP0ek$(-vUVw~6QC0r8e##Td-n3=iVHEo)aa)FZgJ>L=-P92( zo-Dqp(_N|Yt-6xo#YD;e#b)81)$<*vrpD#@TD&BFp?mDDw6p09p7&?B!3r{U0$mpK zQShaxvp{R|cyGgpqLm+U=Gh;lhK9HJ+dYe4?)Y3s#2}M#XdeYi`^vGF#}zyJ^#E~8 zfr;d0-cQH3YhTk7n$^9C_)+_f^xHaea9qcAaQpbrLXFAXcFKh@Q2ea!rX??qn<=kW zYL#$E*q0yji0N=US4kgY)ooi~Xm!Q>(i>)`x%48HruV*4i2t6vESQB`E7cQT{T~31 zzCq8*bDU00XC!x8w`A|ySynjWQdntH3p2W{mmopEDRO1LJjn2aQ}jJ~-Yz77AmAQy z&W`m6@cZPxUU@|u0&WNJGk+L}~pfQXE8kZ18ybeD|x!jz5Vcb@nz%C|aV(}s~P4u+oz<|-Dw znSpX5FXkcBn;ViCAL2d$#z^o+_6Q{tDf*J37`SN;P*!Em-wACZw%e>Y9{~Ifj)5vt zdQ_8a1Pa)aQ9zlpw(5dpWs#9!rMH?-kU?z|i@ARUm zKtrYG;IQ6NIZ@I1l>2=9G*FypGjNyS+V6&(3a~tmOG98h#QrT|?YQoiiFIK1(A8G) zsI!u9F+vIumHBy|^`_MtGJ^f^Fget3mu04BH>GxFTBcr~Iuw>BfGGB4P{50Mcni$e zh|K_Qw3Gc|tL7&6PnnNi1zf(Lo$AEs+osXW&37bj5qmZFX!aNOU+J-I7PO3L)h^c^ z+9E757!5l!q_mI;p67=jLshC+Pe1_n&1Uj}S%wZOocSUd+e#zn)%Mr7j(bR+h_J;& zZz#}Q(fdf-mIV1~Q(?dbF6djysxfm40)0~lzAm#>QNG#))%U_p`0Fru{;#JD1-r84za_VQ*XR zEBkMpK!@tPwpjw_(f!kedg)P}wAl%tbB54m4V9prw=r5oIL}-c(JU2m5vB%cov|9Z zgIh&54VBC&oi*p`ZRwDc&Llao8ZO7rgJN|oRhD2mj~FCyF=z~j0*d(erGz$vVc4Q8 z_a6;_%%a?OZ%@>X_FQ>#?Zyf=A|y`%;wA?c=Ob+_^L5QxNNgcSCd<&3yZf`*T^&FS z2H;p(*`7vH!((3y#xc4Qv@#!f@8(NnopYw$$tE5c)+8xUoEutTV#jJ&nSDr6vj{`e zxC=OTA&qPQ?l$#==EM6Z&1C-X772|1zgzN8w<*@YNGks}+Q}gj|ANAUECg|fI@6f# zkM6uGVn0~;>Fh%!p6rLSoSR2gGq8ja@-BQ)EUrmNWBO!N0C=09e}(#di{kOI$?nc9 z&hcqdkcaqHGVjD+0628&%PaFIi^iwR6sAVqU|~(C$$8hcc6P2j<_-p?W6}-z;*%*<6c$YEkn6 zqHX7NWl|Sz>-P(K#^supnzGX`TAChB(QNdM(t`}J-ZRk_5pWw2BtjE2D(-bl8v9HK zNuTOe`9*4v2>dDalE*V%QWkTbCCg3IF>=LJUz>%vrkC@vg(0}-F$JS{Az6nE^rMY= zNK_8-Npnv9=X78x7h`WO%#9uz+4o}VU> zyj(A*`WtPlXZis)UkWoN3ixpD5?PWRbI^p1YY0c_K}cLKxgiLqC(&*EjZ-va1znJQ`qVRp(jZ zq?^brWy5h>Rd!m;CJRs!eiJmi+b-JL917w`a%Hy!IJ)C)!cOA-z351mBdvLjv4E<+ zZnc0Lq`_lm`D*DG35$APi7QdodA6qO*{}imyU_kgL985OZ!lx=Kqx`45{D1&z>4A` z16y7Uh0CX+CVe!oB@v};&ir*=$PYQ+-P#PsI4g^w)M)+2z)lN78?db!k13gF|%Ol)sks4Qqcq)(bZ)-R0mlq(IfVhid}gno-s% zODmj?B1)UsJXxgZd=96m7eNht%$;?@>osy!XFMqVR!;A(DrudpRN@@_Jqgx^u!v7h zv_g0?IcyXZWM;h|k%G&fxWUwQ^`f_91M1m;zZ*T2SDhn)7WM9zo7Zu%0jfreM|~yl zpz6&yw*33G%f3#rRo94phM6_Q?Bckep0zsvIph0#?xl({VvHU35%gAl#Vz5<$9b^U zxyC5H+uteAd&p@$Ia8LF7$NU2n~IP0`A6=4GM%HTAD1a*ft^(i)5f!w`B6Gp*(pZI z(Cd3;*YV62Rq@I9KpseU2AaW#6jsjB{sBe;*p4%I^Zuo# zv>~b!u?jXIj0L$hNtet17G48*OaJ8Mpv%q{rF8b3wXO5Se7)k`!`}DLNz9x}0GA1C z+Qh$pPwvI0xFuL@`|>f*I$r8^^p9%H{9lcv>DU?nzqaSg|7&|b`KjxPk0<-(2lsE^ z^N$(}SlYP%ukYE-btw8$zoFMT4mdsU1$8jSdBOx}XcP`z_|@s?MeJuF-QBHxF5_{( zPpb=H3HxjEYf!KjI{|}W40Gb^VK~9zr}^~bFCpo)?aEJIvZPbe^PlJLuyoz}NrVD( zJ7Zp(url&c5hF#R_CO_9d<%_X96dclT1drM7A~}wxVsS@Dg7V!7IS(gX9e=!(Sz8*97+i~6}$TDfLlM_ z$Wp805uDcJFkU(y|KqJcT%6^|-#b17e439x*A{Lwn&nDhr5fTCeMG{Z4gx^Sfr1-! zYvX;ae8|1F>EXVxk6K)~fS`w>NGX37|1$9$YTKV_RL!fK(>KK{RL^HZm9!cFTbpGdF{wj;G`*vP3FTIz_IH6_j#Dv(uXw}t>W`$ z(E4ighn@BiK{#x-`KB{OlosVsi)ZQWou)lk#M*ISM6E*Y&K<#pa2u*K!sIOI&Q@*C zIy>Gl4@7oV=E(|!@^5n)=l0~Vxk)8UfNLw!N+|)^;$!Bwa?SKDU*FTRZ3H)|Smvg5 zwNIIAbj>)3|!Fu4?(=OOJ~c!_=c|WUtoD-sVL*+@Uav? z_z){ckWL9OLrs&X#N=k_I&i?>B)>6$JytG=LVw_nan(Uuf=H0|njm~};xWGX5u`Z4 z{h;9dM~XYSkZAaU=qXil!RXf{Tx~e;9-i#$$o&M&Q4g5-VyIWz}M0tGlP*QKy|@=Apc1 zm9`B1X1o)y3*(HCNe6i$A*ofSp;~Bd&;}AI$WKAO}iUyV^z2vC#*GdWB|`M$kLc8;4P!oBX1l<~u^9JOJVd!bdnl zgZOZ;OAtQ+#qR9Fd4y<(Z)7vMZey#Nr;NMp)gLfd!XAHP%2CgAEl)|tDusa&LI3HP z%v&lQThoZdoO<)}$4IDNKw89_GAeQAoz<#oNcKLD+(YAZFRu%25Z+`>x+06G(I(Dg zRM%NAJ{>F*>1zl+La8a7l)tKWSZ{6WW-@9GPa$^KegergrmqUGM`>@%iF&}PK0~PB zqZX(3Q*L;3!sE62qMA2Z%KAdtEw*5ma)wq<6B|O8uQoI3Cs@hCbSeNt)N*i=Dr&3G zFrd#l&X6$U94LIvj~4o_KN!qOUbF1EZy1->PV;~XZPwix3?TV??)S{lnlf590Xhrc zK2a)wFs22T5@BRIP5w}_Mm---(rJ=&G;jf3sZR(u;MKqpTcPIV8MUfu(IR=Q*KLD2 zZ>f&AZJ16g^=F$UD#FaOcG;D7nxG^o_x!E|U(<>UZ}pAM*+>I~(`daE*pJ%op2T68 ztM1Hj3f;&b$%>;MCVQzO95F=>7;P9{mCQ41mw{0BEU#o50 zM#XV>KeDV!TfzldUdBajINZAafMU~#OXW0LLB>U>-%RWx^K2Be{+cUk5t+% zLZX`QNU2!ab6(ih+fIHIyiF`g2cFp-%v@j$p_Hr6Tp?B=1fEFxO;=$nlwL>H{c-v; zU>-GI20$B(-xB-@419HTZtO_gj`F33kP9r_!6+!+_jCwYzUl02fH$SiM`gFSG5CF2 zUcE4%0`En)z1Z33DNcdW48NaBZZ6IEaSpC_?MZ&1nkWqBuR= zKWPoie+BfUXJr2mKimIX9e)N^8Ct0PGrH>`;YLac-_!~ z0|dO+b`Rf<6{F9Shx>!XI;lG%mMwZ6FHLUf5#COT zX^Ef#DAXf9#R2{2;8l|4T_n_!Ng+dQr)1RBUE;cM#z}&0QOS&c0cQ^HV>+IS0YI_& zZSv}$do==U`!h{u@ZQ$U5B5kvY`WwHI7q@U1Y)0N*^9^*amd*awcy_*t+MXgc|oE4u6+d| zaYb*!T<}?&NqscvkiDG9VYK98Y{Z5fT(i%fRTp`WVgE>()-6cd@KW0*t|}|->8f?a zP&8CoU7KqO-Q@6TB+K)*yZu|(DBxH@j4$u0|DAV=@>tjM&E&=4C6lq2NXJakmkf-< zxgN0Y_`?yvz+rXNsSnER$WfG5KF!aHHD2?SA;lZ)Ue;KX#2rfn{DA^C5H^kLGmGqs zHv_#^#HxxwdWQRKuFo&Gvp%(f~PX(HP}t*foXNf@)S&B zV=wiSQl$igiBW4IHo~VsWucNp^WiT@wIdb`KomP;aZH-E^W*pbpSj(A795bDquxm#ofKXDmv=>N?$m0H1q)H$*2IiS zLgHeCOWLzz+FdyD;$44ARCh_Dk8WY1jD^TzLKB`OSlSP3wqjk#v1Z#ogu)eC#WL&@ zP6Y1Ikj>VpeVVd|16=l3iG6U$vGiWmZr)_~?v7z{%CD7n5f8>*D&;lI<37bF_gl!B z36I||v-Q_wbP(e`)4c_&ytlD8VziKXvEB(Omz^c8B=Nqk174=BfH z+X^)26Z^TGm!rglY%m$braW#Nu5`zX&A0%b16n9Q}@yR23-kZCUA!JGz^(W)YxSCgyg=<@tUR|urAgxQ+=Oldi4N6&%H~!Hw}Hx5xhs{ z4|n&+tsyn21;ooJp7>JV;u^s4pB$h4O}iDV5};T=Q7gh5;qSf(tIf#cH`tW@-hdPo zGi{*{J2da?^Rq*7w|go!{R}q@6M%~F-x21l9!5ho&!Ls|JSs3Y%nF;G77cD*!Bb-x z?psw?a!-SHHESQ@o%_j_Y$~h%SVKqo8i6RA3o~A2nAQ>+;;{-!{^n%z`fCsHOcH1& zHwa3oO0Tu2S_8j|RQb=3k5A7H^`qzia8qS9kRVFwkkoI%Z{FcB$|M1X1ZJ!sU*blPw;Y?XIL6T0MRH)2RB?sNn**<`&O3#rQW z2K=DW1%k`7}lc5;!$?S_h?!K4A$7Ow$G2bY*XvZ{Y)WVznDOUlmQ`LaXr`nUS4{XYBb zQ_4X_9}92gUrIeq>hdM6FifnhMqAuBlf02Hu*S;TuaDQfFeB^=Q%s;bg27ttN#xhj z5gN)$pG&l1EESs#f2o#7kQ%!ZE|K!mWbrF_q<#aRNY6xecHF@h0ZLSP&22MHL(8!K zgIUpD8Q2~$n*3$aNTg}eBmU}6$qZp{?)`^3?8d89EVt7u<~E+hZQ`M*WUpTChfolSPB_8r{totA?W^Nf8gGVlJ=)u9CU(j6}Jv^zFjobDNb~3*~ z11r&^whknr3f5<`XUTNjFb4Zjg!z>ZVp;v@8-P4Qtw_+1pfs320nkAT(77^5t->ia@H{s~Rie)ekT?&(xMJObLTD-@`a(!lAO%sk9o`l=c=-yVKlA zOjLuKVjWNxQce75u&(dld100bw<)t5DaAZskbw_o;f(|#PO?C8x*C^GM&Y4 zy~>4~ZD$%<77quYSWZqSIqTaUFd)Kf$K%KodN;1M!;bR6Txh4y8?57@~6KmZW^grh@+@G-T@ZakXD~}`RH{UaXV!Hgw1MdCQEg>p9ohwzY{ja~a z4u_M}CT(0iB;q z++mvY-9Lu=hSdHz=y@cE7JDo&~iw{ zbWY6KWR3DqUd|ymdU{L)$5Sx@?91`Y^>x3B9(>4Ep@!7pVinz$CWSTRPs}x2q=FbJ zoOV7s^Di@KRiKsmUw!LaWuTMGdilt13u?{5{Rfe|oH;L7YDdga_!_i>1*&fY0~ras zs$n7{jqD%Gf!$;3Zal+54pJPBVj9)lzwPgcPkWGnMvrs(>DEHrC??O_j*IH+*D}3u zdSw9;#mTltNrAJ-yek|}6z6p*U$Mv~;j2Jv%_)#q3kixgy6ii2qJs=qgsiX|OdZ3U z<02Ds(~EcF-2ej$FfLjy z%Cw$dw18ZZOSC^$8Mn}0;;7EGaSu-nn7|RyFBB_`ELoc%+z20mwY3++0!tH4p3w;( z<`FTJ&%RNDEIgm8@-bG2T}Imjg2juz1JcEUk8UPIXQ z%ckYvE|mnUnh90}(p5yVC085^mfsQJ?mm`)j>-d?kFvZ zGCtfN-w%Cpj<=)_mU+TgV#C;z=mE!B+h9EH_I0-2xDY+NOMD$CXFkneT>%^ZKoM#Cs!FR`wgpuP|@jNU}Y& z$TO{mG>PEv@fC;CqpNY#PqSXkkJ!#%>R+O?7IB3#~6FjTJUHC{5<%rBz*^ z+Fn`U+8V-EcczWQuO7O_T-=kxjN0`=uHW;2?h@wE|4A#@{!14<-G7i;7S*I|u>V&q zDCD+%cmHjo=X+LusLknQ3dwwXmJrVuPS4V^$*jx5S6iuw6TIb)k0Fep<%bITZUp!J zPGa*OvgzJG&Z)@hz8IM9Hp^?0obp@I3S4G*AtQl%nGf4MtsyPC;3EeTe=SVp;rZ@- z2TEa&GrZd|OF~3aHS^yEdDrVTY$}k$t|RqCOti<$DX(whNltsn9J&lsekr+|1lE>u zm?r83dhf3O{D^M15*B=OM1u$a9b=Axnxr(YB-98PK)6(*ps@ zGGv-Laz3J2lw@3v*2#g##{hO59O49nRBi)SIfgjJnii-aE#Tv?)u-5(w)VN>>An(&Pq$``=Cewalv|dHqD9~rA&CX&I{18}!;WmG0oFW`CMIH7 z3%SGLPQ!*LfIn74&OM+V{$OLAMz7DCVtZsHqq54{t$DgZb`Lqkl=lCSvmiCZBdffh zZ`>#V@k)PgfAU-Lt8K=G&GZc-Y>!4IM4^-~Vb4bWAu|J(@KotJj);d=mpsXFI+hwc79=C=nGocDO zKCKpmcg~ZG230>vFXwSe@7o}il37vSBaf!-8&vQ~OGLHxCglnmy5$?%-Y4*y5`iq= z`LFouARrh_sDz8E^%BT;Jrc+ZyCaYjQWDrxdh=?O1)S#{RpVQ^3l20IzCh679R zdAkAR=#?xTa{0rB5u^4&>?vH~G0HA6vMo#);#As=WbIPWSySqkMmIj4Y3>E?5%1fP zNS3@>!Wn9a4U$S%^W22&Z$#ZZr&5 z&*>81QTjTdFLQAF*&+7WNJ-rx>TFvp2yEI)T&ABfT}^PM>_snig_nN;L_B9d7l#*i zEhey>vq-hhhRZZyOtCt+Nle*hJsfFsAbeHd2yJu(r}To~%fB7K?FP?u;$C4ni%ErIDMM?cL)Jp0>m>_zNYUY2!m1r5z>x|vlN^g{cbE*przZf-)E?352nF>Wap)gdrj7y zOu_kzuBB3sQonuU9J%eIx}ua323@BtWqe%RIw11!?dp}6*^bapkXjsv zaX7t3=#KAdFZT(Ud6d4zI$fu_N8Bv_q0F)g!p$aKyXdU;M76V&KWUJ|PgFJI998wG z!*PB{IdL_ntofyOm7^r ze{7TbBNX+bfIv9^dcHF3+Ho`kB%?2eL+gAiSOgk&Ti)~^n%f5ZZR5j+H#H}FDyBzR z$%+8~!3*bEp_T&m!RzZ_tnKzZ^F)`OBgF3G;f?KJYz;ant(jzwBSj~ZD3;`ddL-b5 zVElS9xIZn2EN%bf$qgTp8!DyS?+<>1H2JM3w6(GKOMS=v=bMHTG|7PQ*det?D&?Bk zHF??_#Babkx}f10byC!JNvZ<|svAj48Sy$JRKe7RUwH)Y)gOl_iC9w>5OYV)qPCQn z0IQ?8nR8M_W1?1i)Xuijtg(2LF-x08PNs7jna+X4{kwPay5&h*cfO%=Q^l!|6}02t zai!G7WV2`TTP3<*O(DKC;=yn0h!QFz!@oDhX<$WLri2=hBPis$mc>YQ9*PxX=$$jf z8j%wmyv*m+o~8{RiP~}F2vn{ek+>Xvdn5Z3`6FsAO3K?W3^fviOIQhq<5IzM$7!lC zMc=Ct{W-c^>`f2`F+qF#lFl!cS&d$XIGYozvuZn{%?saFes7r4JI_d39b)|=v7M_r z%4;Q)(-;L}JA&XTGa{Xhh7QaG@u3k)C4sd$Y@FdfZgL=Cv0eI`kih`Xif$pF3kqTz zdD6CVlu^VZ99s|Su1!*8O&vRtbYBD_uPPB8N08`;im%bz~)7JySNQz2~aO!Jnadac#({fAZJ+OuKIdhKlSd8LaA zW012-yCog9xk0Har{ihHkf+_0BCi}(@KXdd|`dP$OXcWna5i^@XNb*-ddCM{x0{Vb2np-yam9itApoZZ95K!uC zkRFck{`I~o=S!Y8!D)37C)h-CP z*bal7GANm9N8w}P*+333`-h7qw{5_{83(WI_e&u0S4l8<2?GTF#_Bx| zh>{k6sljhJ?QSq-gEw6MBDWLJ+{aO0d3tGaJ)jjH;c_K!JuuBB>mWB3(dxhsU&Kvo z{xQoJ0OJfzK*^9Bki>%VHoLHpw0ZB-Opwb;iCTlE}RyxfVq)`s2`5P9;3~TZ9>A%aIgV2F^BZ^08>3Ex z2)c!-bcIz&$TaAvpSLQ1@sq+)Aq$Vy70teRURm*Ch3sK&H8J7MNk;1C2uSpyFBXc` zjgRHi@QeAzLNLT#u;FQ*%Z(o@P1B&?Ya#{+fON}}*MB>~KyG|K#2JvQwZ9ZhlYjut(&m7@tBYX0#yFzW zf}w`g=}X2vGvOW7u~~eLfiw$_@fZgzZd;kc7KLW9`FA&R2ll&>oK?Ebg3%%8SW2Gl zSu!KhW=Yl-C86px<6~#T^IpkHY|Esd*sVG4$X2lKfFG;OK-*Yj!`QzjEz3*=aNAIn z1PEHwr4FemHT4FLLes_9OU97foBcKqkFOf-5{7m)4s#v zTz=KhnxvWx8KUNN*uw#XA!8Jo=kT4(V2A66?emY^eELO_m1VH=MW;@t`pt+P_t!o)5l!-NtzTnykd=S+aB!qbD<>P|KP zs!4rTlL8n>`E{!z&$1zdOhjT|d|1*nDPgK^;1TX|Awk3@khF#arxX|CijiUw^MN4` zPj8|?;GSlS-==jC5-47V0_RXO_LPb9%dzUE1I?yi0|00Q`^jSlWs8SSCWyn!Lxs^M z`W?8r9g52;E5;mwAEXnq8Uqd0ikN^qG74=p&`+rs)?Rx zfL0&A;OW;&dZ-j)jT()VEHB+yE3H#Rq|}U$J-#k403IsX;QPM2Ha76^wM%8_EaIJeMWF70Cb>3%;p6e#jArB~D%;8?WYdmFtbkqTp;5oh3` zWyf!4ehfwOn&3P33)8*k&auC%`rfSsYn%tDW69Z{g*PHga|4Ap{oQW3B;NJHb_E(Q zabNo@{ve_9P0R3eYoRMUP{1hj+J#zhH$H!%fypE@{uS8%JGOv->}?~3sxRb-75sdC98!O!+_HFd*^qk8e;=9iYxd3#`vl6nQVS_4_bn>xEN zt3rSDQq^XTy?5>NVD!vEk}ZjuBiy(8l4*qFAJHYial7i(u;n7V27^XE*JqI!A^yM6J8C*UnW}*6?Dc59TM2l z$&0d@mAlOB;%;#s8};r#A*YCYH(SFWkdYC^j(O;uXJ^fAt(ff3XT=wxuOsJHLTjv`bP-Tmv)X6Cl>{$ zwM+;F)2>WtsqPr(+@OPuKn;K$s4J|x$@9m`FO}52dEL|-9+~SbDpUMLE1&fALM|m% z16KgZUI6GuG}<&~>3%9=Wn}bey~b~zpzWNr4s)l&yPL3c2(+)40f$eANq^0%_dzPS zTXi^d6^Ors_VWl}U=@hZoeb|LnN0YN1>VO^CHD3L6!;A&5Ie7jQJQ2ygB)-=j^ICY zpEq^ef=iJ5Xmk%p0^a8*b6Nu6G?zpa2yibT5W_9BY6w2j9hY6)@z~t}4Be7VvMGz} z@>i2b?DoE^r?d`@b4x^rpz3#S$eJe09E%RZV*`6%lOgaCXx?%5eej4~F#Q4ap2@Vl z8sx?GT@kPI*?B9z{7uxJtjBKU2@B8cuPOHkT=3i0S6;Y|D|Rm|o>0}`wkTZiv=l{0 zHSU&qAY_l-Z$zHd&j@`~7E!49yb$s?Eb~{gfZToEkbv|t@E>&~62Z6<*S{bc>wlY2 z&Gx^f+A=Yltp6-YUVo(8KH`bKL)iagocZU7HtF*?kL_^214l82>rO3aQp@2KfzQC5 zERycwL7daIkODzk^R0)t`0eBIw^FU=?C$0GW8&cPp@!Kwg=qNf&N+OSxcCfSVMgD> z>+7M>l=z88 zB^dYFo3d$*>3R|~-!YvDj}A3FPRtUf+zA7ey5h-M+e@IbDKcG#>5!a9CapDfGb7&$ zcr#Vn3T4BH*IB`;z!Ss!MzzYMtmt#I;Lj>AzR`LupOYvZGk*rAg{Iu?4fuhRPhZqD z;AmWjRbibs$<*GP7uGegRI3b`)7vexTUxeW`kPi6I44PQ;Uvu44sf6Ge&%uHu}+cw z5qX+cWKQGsccgnU;WL&Gx1P9h$pXSr9wT`z>;}l1cd}81I}efC^qZUSr8O$wlM~Gz zQS1YOC2nI#cV-n7n>S3qT^;}UjlXk?$27$Ik)cy)tL7i9_Ful+JOE)4i-HW2DN{a- zvl9pGTsdwK&4?}A5VUg+1JB~ClPIYBg7SZ?#J4gcA@N8XNBTTcLvblFi653u88&OF zXUQ@&I;(KGH&UQ2Sq6MU8fO?uOGK$sH{`*XqycC{e7&oH5x`mjtRn#prx}#=)r0!L z!Apqz?gZHagmB=}LHbhOCU`u|XE8)QLQ`i{?FN$kJs~LHH~lngYygwG;&#G~WOgk2 z?C;FV;?pf18Rha;)>1zi*FvAlX7Ut4ny-Ke+n{R+vXczP1CB1%9eGQ%UPcAhm$_E2 z)zhdR&5Rw`$o0i03yfBWfiy7eb-6d?=`;{s4dg4EYRQLSlYG$XRyChv((XIDaMON^ zpYbriGZ9f~lK8cjSfWPj90f6)w@2h5O+`F6AK#_`-GWv2`NDc8|_#)Pf1AzO; zfr_6o5MlW4#?QJY0UjnOjlTd)3cUlEt<9QiCb8eDgQ**jT^#4cL)n+S2lOUg@4Q6J z|4N3o4z=kRk|)$l&g1W80}m9SYZ&@v9;0Tr9Q0(-t0oLww*RYliL@!tHVk}=AHo%`=+X1QjKRg8a(?0vf@l?xD3zdYzDJo( z9(#G<^Q?D~pr(gL2#I@jWv9PF19cQ&1~=rkp0uf ze+{G#leN&8Y1@)0-H$?|-Fi3$-_QJzxcuH&Vhp+Au9_6))I6q`rvJ{<)Rqu&kFwwZ znzsbjJ zaveoN0&jNoEmh1dRr5P))|R&v`m4>!F~A+xmb>P&&B;^aXish%qb^TEYuNX+#_HCx zSbvj!z!f@F{n<{z-cR-Luu8prTLt)#15_C=yL74Ek3@w}_o&ncqR5lg*bH{fOYy=> z@_fiyJ3rcm_)hZ^pq~QH`}2Ij;g^3AUU!Ks>RqG3|5ZFVG6D3X=mY|(`&%&xsSpX9 zcoR~(255lA>F+Mgl?hxg|%WO=Xg^uGe=e-%f~z(D_>0IDwa4}ktS4^QFLQ6zZ$ z`mlffGvadogP)f+bW;Q+AD^)vtMxQ9)5W&uM!2k6!O8}{2+&a3T*J& zo{;!@Znke|&)@MRNV2#+oZS_0oo*FmaNn*LkIq&S7!ITAMs0npm_cS`&*ooK8(v&ceZiT4SO-~6z8YD7F}(oXhta>5fQDR#cv8i&d* zQz^V36|=gNZ@4#<_^=e?MjI|K-{3y9TR7Jo%40A@7WQGRha0nqE(FjdFo&>&=^`KR zG#^3eAf*zqbTP~8^8YGVUJ^OCHsLq0Lc!qFA@185*LrlM6Qx>AEI(mXQ!1dDk5W7h zh;St)FZ%H{1s<6MCVTdwLWoQ3fBda- zEhZ;DbzkB@*egp$9t+(RD)9#nT3*kvCej*!(brg>la5~?WK*Y>B7ZAPutbrQ3`imV zk|#^1!HQW}0LkjDRxNRHt^g`u?d_fw6od);p=8HEFLO~g1Q+k`XG2_FZHXHJ@RBhnN1AA!1#=@>V6z--Ami|I`C!^XF=)0EsLqz`= z5=ksb_w@~&dMlM_*6G&dPQi3X$^LzOqDQ?$Rn%}5vuftmU~AshM%2wisE&jnwkta( zOX^_UVpZNlzbGMxB7!uHsg(ZgiSnVo=raB8BrTwvmN}l`s@TS;Gnp^$(WgTA!`O}NI0f@hXdAIbibbN88z@7vRc3lJS278Y>3M3X0)a*Euiuo z`{vv@igMk&brn^!C#A#iir3CTyYjJwxoi{a-y&2j8P>rsJKlirB>@rt21^Y8otE)` z)kH06OhjL>LT|lLeE=ztD9YiF=JRXic0^29pBmhs7rWZ4eSXI08%fDxleyx`Fdz{p zR}r0Kha(^DZRml@{4oLN|Mp<_Dyq;udsrEIk)s=k=}GNFPs$9~JK}cxDTx{w2J-IM zJ9-^ay#U}^e6)tud@p3VbTvE0oO#UPou0kn+2R`WhI-7iEVQk0{YklI{rDgZ*o#%Z z-`%J)kOwuyn6Nw>af>_*cZ6~8RryBhMjRo zi8PrY!_{9K%>`y&Khn?iV83l0-{OQOTLe_g$cSe$y(R&pI*OaYu`bNYn&2cVV%@Hh zT-;>tp{zHK?H0_q7|&GemSvXL$1IBUW)9m<2Mu3KWcyI(D`q~C{+wHtr^k=M)WRHV z+;{JKE#5-?R{_fCdTg81!|Ef(hG73ER6w80p3b#3s7m{Jk9!w%lrG@qGWVyVRYuQl zT>2sfVXTL{pa6fMf_}7l-44u?#~=@G?F*2?-p?{^<<*TL$03az}R|AF`sKvgtn=E@$J_0!ri_cW#keRhQ{3z)b_)&>8 zvaAR%eC415-xMoK`@#Fm8qQUGmIw_3dlO+r3u8Q6wD9zq`NBatGu=68-I${me*6IO zill`*k%L#YGMD0N2k~NVl0nEyxPJ!mY>s+Ahctq}o-)-=3N}_oGI_xJk4ak8;&@;V z36eCI!-XyJ%ahe3^96*AGVU^PWAWOIPl<0s93~*%xP&drZ8rXE58|x91G?(3{ep}T z3=4#b8$Jfdt&TXiY;SCjnoDKH3`y5AD7hxoL|^iYGgu1FMb+@745S=O6&xgeEL7FIFgfkMd<_7Rg7s`=wDI4bJA*YZeuU8^aB*m58CR4-($V96U5r z8dqBClVthnkcTbiky2yDoYrIYLM7V1n9M@y>B+E1 z=41slJSJ~Rl22bQYO*>#3=HNF4jcoZba{Nbx7mZUm|E%`!x%lctO4a8MkVOC%Poj$ z0AS-{8wm30$q@V_G42)2BGHOA$~T;mbwn8%mygfJyc*FP9^)}bzK(|At3sL9QBv~6 z_O*S`_`qBPhZZ|xb5VKHE#Ab$m#hd|_i;)xfCtr#UD$slFkiU_^l_Ha~K$0*kvMxC(?n87>^6wv69|ELt*WWALG35%bqtMvCQ=--pH+mf4O| z4*XFC+5J;6t^0Om`t?!g_GPEM^KF#W#OV%q{#reH&aZF<{(81_cfYZnsuv|-3!N2p z7oDSKxEqxdx3l9;i|xbr)nEP-`i2l|#%KXn`rGdJ7{M<-8Y%%!{=*ws^|7F&U45{y zXAzQn^6c}>03KDUuu$p)4{voa`~Bc^V1@WY^_ zshHWuA}t&mKw+_kmd60Nf!(G|=s<;$2X?nidX$@7QSpHS&)c6+=f5v@Yr_Y1TmGgx z9jjWg6hY;Kywzg*KN+FebV$uHgkp`&IO#$4QlS+kU`q>Wu&N5r{g@jSWH+0>iZgq* zk|D^8x=Poevf?+3YCl9Lr^cRpg~Yxb%G8B|$Hvf|E84ua;SO?5ongBG zt+pD8XrlA1)vU<8pa~m81Bkt~MB`z`$?_s|RuNn$&ucI@FALPa$MreL0`o-P@!^K9 zXebqyn;fxAg`b(uPi<$-DKa{2PS8-~_OCHed1&Q0c}LK>On}nOShVcnrk;lT7kK5M zP8@DzD&LufUk{5~VA52nirexFqP)=Cy1Sot9%bxwWNcein(X;<{B}IKrLDwva<3xhe$6O~RF>CWBqPO*> zAvK{`^OTNM;<90=Q=~?dp45B=CQZ&d&WYyTojl`gylR}FYLhEz9UgQj0p*J&zMhP> z@o0-;XI=L^%C5q|6fz&P=}=n^*6Q~m5(j_SNF1hoDEU030$KJj z;B|bL`s38F^yl>0*Kl;-=W!{EbbG-C3#r3lb*cARyJT*9x)qjZA3Qbly2$NWR$(Qe*CE?C`0T#}#fwqlEt44SS|4U9>^!4))TO>V4;= z*C8R*+yk0MT*6-oPe@_8ZKJ$sR92h%?1NtoQcH6d0OO0MV%mwLPnUPbV4PbPulHL! zlQ6ZF{|bQrU0?(g+kZH3u736@|99ls<4?$C`93K6|72XUitqSiud8yUOzO+NeJcNC zT!z(mc$)ZIrLqzy{1lxoJx^lr!kEl{%s}J5%E7I~d|ZireKdReyfAyc1HmeYfZ4dU z!%UOk^wV?hmf&O;>&j{tETsG9eB|Y_Y&N>seLbC#B|k?s;)>!2;YQ%s=4QFoP4~Nv z?d*Br(x_`7B&!VKIUb#m)acYm?+9<-`WQDw7<*|}^;cF;wr}xXr}3p!MP_C!k5pdi zOjv}}a1CGKN=zT}ocnlkb&kGedo{^Y3+dwT5UI{Vf>crD)VD15KLf8dWy{aSDS4d| z!isGC{7;GSM%=&6KA{>ImdWMae=gjb|6>D;;h2ovLvtD!@oQ8$JYal$zkRqR04uc? zoU}aZy=CMFiL=NRxVV1+?+ke5%JX!i}vAOc102SDl7kVilf(@0>O?VchkWb1^w0mca00g1)^LN83cO1 zc&#K@FSuelUjx#DGBhu%%8%|SNRqw9?nEVV`w*I8ldmN#KHhr=kX+9x`#Kh2szYSIEDkU$V_#~E#$Kn1g*MR-}5p-Zn*48PoKo+ij`u6d?fje^xExrTtyRG6J-Bg zD+$HH=6mTk&$=ip`R7Z4wRh*2$NIDL*}5S%<&?zle9$kcG9D!#*V^5HAefI1I}d5g zZ!9!*!i!5GiwQ5=Lzi(rdh0He-FXH$oH_1k)BSKg8Tseb_4tyGMN|X!!sa|7Yosjw zssJs_!IS$vevEb?UlSYKI0^BTllF;98|LFH?v>-H74DVd3cj0^in_Ri zEt~6s$Pg!>yJ`dvT{N-nS0W4TrFrl00T8zV<22V;Hff3E&1X<=ez z`tSNo8JPZ;rRM*|>3_nAe{h=F>*t_4Y7PGnPA@-dGlp;+y(kS0y3~%k|tp9i2av6#TtItEgNWmHN0>>dD4Hk#V5dHBWvb`>J!8dO7kc!yhAVS1a{ds5%}gi39zyS{yUDi5Zm^7d0egNqQ`^4dFEizE<{5 zIC$Xl;h1UfPtrwP`C_?U0*MC85d8DWZi^K=)-TXE+7`2PCZ3rLYCwIX5LG0uFyanI{9A zDLyDt?l*gGO_TOi=!v50I`vr%Z4tDsd-mkNXx>rc9O{)8w?b1r%UoO)-8qAbBeUbI z9q$4!`o5=3lp%FLhu#;gQ+YZC#fk;2Zz<6D|B$@5z_}hB^L>=zH02cB+&qJ{^RxFi z8UNUJT&Fw8k8s%2u*+-0BNq-kih34r&XvYiyI;A@(WoQ-@$6tg&Emc3*G~^`=E1=O zJN8AwD*5oc#~iw1LZloq@0naWzM{2W>j=e8B&u`@Z}FUzZ+XQuD(o2dL-S5X5!1Yt4YmsgB<^| zJsX(FwXV-QCm}CjEBLM-rFA&k+G5Chk#Kh%P}gftL?3CyKyy!?5m}lKzF=u#vb6Ao zUk|0?Kdg-djFRI)bkp>3SK3P9vE7#P#Mp32dU7t}`X+GR-(NAB$GH}6&d&4(a?M|H zAiMY64BIbeW^zNuJ(6|*-pWgVnj6}tYDGFj?vLfNuNAruL|Ad;!@|3dNBqEQRf>ET zxK3L*i&Bl%wDg z&mJB5rgztrIjA&5k>VJauE4gi>z0jQ-tERx*k2&!$ML_A>!8^xkUY#ko@^IM%ARQ8 zONl%R{KKayTq_nqj;F@TD;`vTv&~G+dFt>&e->9GqYb^mLCfPk%Ft`RVP81CpZnL+ zsOFe^Gbz(E^?~?4=1ple7R1Kc{(Wf|VH!xnGiAHq-KGvCJ#P7zXI2Px20kF&k6hL|FHK| zQY!BB8o+|g|LOvHsygkLLX@j<+h@L5`^*e3ZRYkTe=B88m7cM*6F^a*n6vX~myo zEnG#u2RnZ&8Xkw7NWk{ZqG*6yt5b7azsFEg)PZf3gL|A)N9-?;*Wcc5dLh4MSKXy? z)qA%O*6VNTBm}Y$qejl{+=#g%{qTpWo3)p-!5ON+2qM(8fvss|#yn~pY|gq_=U>45!d8EA*h}r?2H%$(H$4!nFal+r=yW3ZU{<xgpNni(qWYTVwy zr`!?cme2tj!sR!`OXo7V&BL@WgKk-!`;%qMVTq+Q<70ic3Pyr@N-#GABt%%Se6Hu+ zbe?+%t~6kdOwRC2eB786oK`5i6iC1kN2Ngav=L@juJyiM$8e%{I4O0Uslm}mQ+7k@ zH=^5+!PQZ*ZT7=qoi0$O3X0t&KtKeifO?U_E=oKbH}T8tG{jokrn(DD73Qn@Z!Amc z7k-i1<<+W1oddthD2@F-A@0tK2281j-0foawOsC?;JJ< zwzRe*9}GnP!^qQrq^G03cc-i{JNjpvL5{O7{5Pg=QL~f_n5HfNk_@{oo8%D~Q88GH zqEoF`aO9UYYuCkOto1c1o(ny&+FUDXW6hG{=p%|U%*b$Y64-SW>1>-pdya!=wup^` z(+Bey3pZ3JAsmE+V(x2e>Q=-L{<(1$?7Z(`y?TcWb8&-?3-yI5LZ(I1Mr1|WOllBS z7Kx**Pc~kK__g*@b{VK6qr=i6Yil&nkR$pEu96d3q6%tv>V;gK;aXAO?QRDboZ!1Fw z;Usm`*Bi%+M#Fpd=q(fdVt&s|%smsv$@dnWzBwLUTQ+tTP3p=fvHMQU(Va$Iv-Y4n z?jSZMLO1*}?%KQU|nKU>MtuO7btP%?`h~P~+J<;uTl^4#4eIq3sgR4LNMHu5;573Cbk} zA*;;TKt;x(QEuUFGwE0Xw%i0A{^qp9YesY_2k7hlg?LfF?z)B-UC5Pta?ipt`*RJs z>zLj?;CwOk@WlJvBVs^~53V`iL{&Ju!EA3&G_YlR4v#-w!)jyZ-hrGhpgSW3=f8j~ z)BkxoRCc#Brjs+UP;#=Slf`GGr~m2qb8vLRXJq)F%m2TsKPEQz{~YnPrD}}W5Vjwv zrV-U&+sBU_G{Qy4g@EGJg^4>9P~k<%1t)Xq#cyxky3a?hG8PCF=C3D3G$tG0o3CyX zf7`CuTXMFvH!c7C1g%bsSyy{o2&`638XD%w`e@1)$u4f?)2V0)PnBzxVtHek6&iZ z{2DzAXxOzs8LfNegp&&oiq)j~U!%u{-NkKjv;~ z1U6YANRiJO8_fgr!OdT5j&z0kKdZy_bn4=uy} zZV;R-HD8AwuL$tl&)KYv7zYucs-NUc5QJ&83#XD8-fS8_({=hX!kvI|4eh~yqhX+s zl`st+i@6Qc%s{6WEJT0+(uILb-q9~-b+A(%aN76AKV%wK*{px7SaaZB3B_r&+^K-} zbg{NeDQS<5nI{Lj5S%^pL2yPg=gr7BPUBMsX|F3SK>3RyisYc z{p7D;^&prl?ycGIBy6gy@)WFcouG_db5dM+yJ4kX&Fg6_UM z?C9+#^+_iY+XRQzv59~zv4ssPsJOTd>Y3Cls-R@2nRHL=Br++a#F{b zsUVYI-#8@HAVzOb`RC8ab=Co;syefCF~dTgZo=`pz3%gUyM5m7Ww6=q@OXXI@bw(D z@Ogb6+rr^>eIC=*^th|+DK66C`F!7=4UE(r-W~}-zklqx+V;4;-;ULMzx}On)$Q?q z*vQ9y&OoEX{R-vl{6&Xs27{ie6F900wK_%vS$Uj7r}J?>Jlh?j>g5lZ#{`v#iaP`~ z`0~7}J3nv>HXG`3SQae@m?g@a#D*n?8)Qxz!M; zwIB3(d!FL*ndKW?{Nv>Y@vXbo&zeP#gJWq5%=74yo$6UO0|Pv!f!?$s|-Y1_Qr#Z?Kl@N++jK z-Z^^s@@i8SUW7P7K1Lf1NdaKOyZtQpwAD*?H$mDMuB6DW!L$DEUk-Yk-XDOv2eC9a zoKd5mRI)bs>|NBar*xYmL9#F6cqx_QCIC(V%0R6+y(*dp!6M`bz~swklBvkI&gGil zy_iddE&JN`GvS$ajW1Z-%iSYfnZEDEzcE1`7FBFn#upG9_T%{KsV)chen#C5IKRw@ zPXz&0$;S*3Id%(v?km3&}EV>__J#l5ba%Gs_M zCx?5hfjA83-pjADQqa87!@A5`HCcj^3X`6I*6K{6N%B|2^<~97jL&V-UMU*UtO8?0{8Ghj?$0pdbYXS_nwjM5p*OHglj;q9nj^^0)-0*F zp%1U9G1d=b+-MWd4;o-Nn~)@?Z4<}hP-~{`dK_g=1f`+@>TguH*&Ee)trNTPj>5x| zizoIU;@!j4euikO!$wQ?tcSHSQ$TO2oYDhCU*0;wu^Wo0{c0u@9=ji$7yY9%?|~7~ z3uXvAgWwLcT8iGO!`oC|VL(qY3vD;Y>CBUw+SHDd z2W_>pevn!~H&=vWijcO~P>+nYe*V1ooE=cLFnfRm2Ot)#axi3DQ&5;){@l@?~6qT<5Nj(Bo1P*8}HL5mFF})a*Bvu??1yuS|DpGamiYR~=$B zjiE&)So1zRMbyGccPfewKJv`FT6xIGVL0K$x%|?H3tx9DX7$ze?p?dbZrPEGh1yQX z&fXesT{+m5i=`vq!Zinzu=eP00~NUCny;lb#+H@4L%E~e%jD*1QkGBU#DnUJcdF^E z=YaCAyye}mlLXci?9E-tVaUf(sS&Y7cKG6-qV4AEgx9_om_&-^M8tYs=X)K?^UNSW zWoWq?X&iUXVg>y992z;hHj-7!+a+e#uY*F&=k9zE>dk(oKP7l`_ta($`<;V62$RdKqm*@eVfv3sV(kJqT5_E8Dt6;9UVL1r~-G7AgfD0zVO zJG9%_x@sF@BaQauA$?*``S^Hs**XU1EYoWQ{t<4*^(B0B8+H&kwGMM<8tSC{7Da^J z87lOdDx*r__1<(*dayr)7W2OH+)C*A-tpd8)~V{=*y=Ln@p1zD$TW!#NzG|_ErsJe zN~If`dK~usa3b^Y=WWBf6)dtpf}k-^#%X+hs}?cdw`4}h-Nt_xbKG#p#!67kry~V8 z!KWi|^U-n&>r>hWfBo(YR>YLn@yjSMWIM~#{JF0~)%UX=9(%?xi1NfQeyo%g+Yhlz z8a%8G+Q+=B-pD#WcEiE=EOqaCY~<40#=n9f+zsY3m$(GfPAjRQ%7a`*Qz;*hylWq- z6wOaaY?2%AX&bl|3d_-TZ2t#{JLtcVnI_I_MgLkO{*AHUt~wi>9}k#|1wbdMojSr_(p= zDC;+x-aBrG*fMI)>9M;SlZG#j=cP$di!4L?zPCKLWBu>E%vYSi`j!ijc zcu}+L9uoz9dNMoD9oov9It}Sjrd_1w1zx&X1T0T0ra=1irGt=+akuU|eo?FIx+cQF zy^5Gn<$$JXYl&`(?9O|S-sQ8Ahl*?l>59q6pJT&A`aaW4th%pwwxPtTKU3kUr_RFU z*_eCJTU$TWFT9&NrW%)Ro9-YEFObLVCFYp3>5eI-Fp#C_Jx|dDC%g9p6SX$G9-FW( zQ)UkAq^z;yzFuv?m+U#>-`YA*%1|{ZjU;GxK{spC^L;$ES|>x5RXWbZ=US;RKJ6N9Iy!az5qYfm;*W`u8C>buh=lYM!Um zoow+n5i=mpm3M_s2cc8rd(>T=^FL1@Y*xaHIL!pmkUhP}3RnJ#Qi0cXd$Q9$t+i1r zdRol%!;n@Rh8Yj=`<*+|-OL((T_-HXMMY0e_Kgpc7C%%>@86;9mDJ>8sSZ=Cy(e&} z+LM1?+H|Ttjaqi%<&CTxEnr|RXQy0d*JU*wG&chu1V+hcpjqa)MX8~~q(Lov%~-xI zA9v>aQD7EOxu0=oG z;f_^Qb&uTJ8gfuy?xdWS)C3(Sh7@k4hhzc`8nmYQU;*L)5W|zmPyjjs;HUXgZ1<kVm{w=~ErK*D>WD5*euSD@%#x*u!`*Jz}gX3JAnG>;pJ&#Bq9NA@S3HR9`?>-yG+aL$^@rnuw%MR%syKXb=61 zBd+^kyi~o$Dd#6Sr<&6&wAHNee{uE}Ky?I9zbMYZ-912XcMBFIKmx(tU4mul<^d0tNLi&JjdNZk_sF&!y0sGTj)Uc@KT3+r#>9CaxtoS|^14iK@&rBF9GG|8WV zKa=HF(kVPmU1=y?Xrc31a`=2HjFAJ%+~kO}tX3dqf$fOhNEx&Gfe-2e1U@c+;C z8BPwK|K$Z(3BdXcdxP!Dp32By%z0o=Q4;X|(usFHNKvf0xsqUC zr!=p>n|EgmsK??edi@?o%zc(D@{e8qOCGXSt4vJ8E?BGiC^`E`{Ue#OHo-w)(>L(D zX;Ek{`W$D^B)3?(Z*DP43^$MXEh&{t^_NfE5E&K|op zC?Rim1==5}Yp3yREH}zJd7~}Ce}3(33TPG+bBE4az>ak520q^ zZtvF%|4VMX$V?mM1fA|g8DUe-ji1kPq7p2aiZ>Q!79fBlZVSChDtykD!S`6{v>TdVUr`q?>g=>Zufl_Z8rY*URfI_6|(62}@R@ zMhw>n4+``qa3k05X+j%gDaBPb4Su8KkRd)||H0@1LZTG4mSq9y#~}=E+`8}@~ zt*&1v`44ZJl`TfkCQG+1vu1Z+AO>jP6&8lI&dHwwtY(0g0q6=L;2Y;ep z<5Hnyv1*8-kcsrHUZ#@4p@21mKWk#gCD{mAg0A#K#E5GoA6ddNgUHy~pZ zu!LvGVJ5oD$my4K!J)0Q^sexiV;xLg+tf;C%TT?oS%tP@7+0o;uv$w$|Rx!*t%x_q-loqP!lL zqB@@Y-ugGZB71L!1wF5T17O3>!@_-@?|xXk zWf3GZOhth-dGLXsI!G&`IK+oQ=Pej*S;09)VBY+fGjcp`3P46+7c& zyfX&WD>c8Ek08A4cQ6?}Sp;vIV>58(9l~MxAf#sK8nEu>5wuRlO!ARZ!eMw_+Mm+k zGIdP%?P)dx-x-~!uq*36V6=5V=ZjMc$2NQ_Oz?!u7_{Iz?%RUEi zEkYo-PGZ}5+ZqVcG5r!h%hld7vI8DU-xZ`rhtcQ;b9NjCLH4Q zFtw`bvSpB+WCbjQKtVX9Or~cYup2!M^u7f2F6}&B%a=Vdwd&_I%~7zWVb^JiZm@+z zacnFbU71FNTX2Pco&xVK4UKF~(cixj(L3+b5c+c5$z7F2ggeX=>yhuJ^-caBc+K=VA!tTv4`rX>nom!?S1bN}6jr_A5!7~g ze)h4YoQ_s{iW?Cl^NPCZ3*%V0Cb#y`{c7XR>0tE?Ws0PY@m5%?gW=zBD$@vrw2NzC zqOW-3mt^Ryr0I}ORfpMF;i+cTa09*QGgG)B6IrU5Zh7^5quAz~MY@!26e=_Y_UOGzio{MbFu_ zZw=o!ub_=>#D1OVNT}C^+^g+H*Bz_FV-NZ~&KVvk9Bawh$){P9gGU`v5L{nc+a2rq z%?QrhY=ArQ_mux#UzmY-_oEV?}sWxtv%59tmb+d zKjlhV2@r2rfvaX3%!} zgw-zA(j~lG*N|9RHcqKb@jL7HyOd_Su)XBrLLeS$CMN+{4wF3;^GNZH(g46@DACLi zwv{|aXurcj`|kL8RJZ<6x4t-Q>i6(;oe@5}U%~^oaF|L;6h^HJ@N<7MwE}nvm-e3} zq>YGHZ%FHHXhPkQ^#AJQ=Gq~Dnqs^)wxQKmyV7p*<32Q*waXcf%gS$QA#hYsbla_CA-q`nTx zKs!o9@2?%oH{^H$wz?sTrQs0PP)@o;v{DnWHAquIIqJU8=AMvit zOyVPAnIfOPIn&%6jSQEts{VL6lRm)7%>S{eJ+f5rcg00V;p6thebTyu4O zyvhF1Vv0P0#g_`ec^7Q{1Xh=@q~)t5;Yx#HBpJ&Q#6CAIWx?=^7HZwy&cGDCm*4K~ zJk{lg&Mm4(9KR+4%MD!iZyuneKx zhW*Mc6sCeDE3mlH)(EDLjK|pSt6A!~HrjeJC*uNUnJ)141)$>Y6wt=jU%=NlO$fvz zvNeQ$VOZ9Wpf=94imi7$r2e9^&`inUGBx3h(3C|hA~%L9m;uUjGKo@o(P3L$cU5Cz zj_}X9~dDQI}j`kQhe_Y1FIx6V#lqQsfk} z7_aX>fCEt>lPt9Xn1R0{%mM!5f2r}?qwD7N7qWVrSum$*nbVZ|OF-|I`!4c= zYq?hEpXkc0Tq*>(Cmy%zXnJaP$*~;%jMRqs`Lluf&(hfFPWH8iPPS(Gld%E*D} z9w~tt_L8o6^)t56w%sTub)8SrMk?zsdDV31uMZogiE0Bg3`#iMv46N3g5&=EE5C4~ zz}-mOTCulY%;q}BV6WT@7iX)EMg>#^ACX^B0;^GU!s?voX+G54)5tFpnn=WhNXn}& zNxlY{>(z=*sP{L}a}6pkN5SSqU00=IS!W7ailfFX@LhKc?A(4|TKCmS^_aMXS{0p; zP@j0D>r-+U6Lay?yA(A`*(I?py)Wb!ICS5+xO?^#4KcYNU@bYp+;=y1G3Fd$R2$2~ z`cS^;!Fdl2a7Xs>Ai3zY0;XiM-H?|=m)6Cca|B1H7(xeAI<}t^v})`bln@yv&%6vS zuop9}>8q*z3cE^!zj=)@h?<0tXP-Q8FHw>QUy!X67EmlwdY+M$Oq2FdW7s znMb8#0Kk=bc3u6dpe{DxDkV=}1Qpl|ziV)kAw!5T&dNEt8Q}jy$e=AbKb}KH;ncoG zEo}7@65~I4D>oOlGA*|c0YFBW5@4C4uI)S~&3V4u#vw)A3d=D70qb$hpz+>lMh21> zvQfsjBT0-CQ<()~f{4eCZg&28^)EBx+JdVSkih(Syd zw&sR<{?^Dkv!}c{OpvWD3}A!3D>Gkf*F23*HV2o)1#bKGZWO6eAA~t$Il@?ndfk4% zxlt(6L5{SXKIxHuJoVOI6e%PI?alYJE8o8U^rMF;j`x?i1Yt^e7mw^CJx@Ijzb(BJ zqBv~-6^62CNAf)y-L&fE)`!Xm-U6!%`*#i3vuk8V2JjyH-rIW7-#mOz;mA7=cHRjL z6#&mQg?u>%um!HC{G!26nz0F{eD}z0Ru9!xJ{Z7CuA%$%7+1D|%Cr}8@}hJJ|55|( z0Ydv3=d$fKS6R#@sE{Ax@Hu=&Dzmx%*c*lsh&bzgPD)dH%9-!y{guzoNs=1vSbx0z#qqZ$+SBv)fv^@$cF&}Ab{D&;Eg{6f zmch@jo&JJNSyboab2yfph@Cdn6_L!EJUBkL+94;qjUB@}yX4^b3fLuUJy}zv-tpB6 zPsb{k9pO<{OKkOdBs0OD>9GF-w}i$=04dl@UR(Of5-b`+e(Y6B%k_z?l|d6?A=ul` z^DkjDMgH=%d?ibe`JG~}E#Qx1P~306^zG;1n>yj@a)*vzQ-ZSXkO0ORxIZs4|Jj4F z`lx`46{F5T}) zb(`>yL6FmuP0)>IHIKS5P;XKaPQg4?0>()HMCx5c&={eIe2)R zI+jQ<(GCRA$VAEHaQo@AZbQOr|Ls;N|TxX+%aHW%k*%h-34@|r#edjf3DD$j{?@(le<0Wb+_XDubZ@KqeuX2)p?3Cjsmv2 zgkIajaV6dP_`#4_gEg6fN6_eopKa+@{$pfc9U^iws~+#zWCGlj?SFZ2h3?}m{Kv=? zZ3J$-Sm+E0I6i!>6uW`nkhgTqsPkW zQK+6ee$iU%q4d<;82R04!iadr89aO%0EBHnU4B6Mz49{|*;pF3CU0*X`&m@!&Vu)4 z@B67_ZO$PfsnIn{d)r!wLB7nEo)68GOC*f!!v*~`U>lg-CBR!o0haVkpt4+wygj?i zP<(1`*Hj*_DDY-HsnNX_m(}`OUuC(ZVx+Qcz-hpG;!~Z$VL|x(0&M21`6x?#C_aF* z$)c5Ivli@{4#o3uNGRk>I|k;>!3DvALy=F_BxJD#T%5T2on5if&|R;((-U=yd`Vl?3v_c#tX=PPp1ro4&K zIntCF-bn^)M&jfuO_Fibl0*3BmwhXDVou~8JEW&T*0?|`(Gu&K=2vnOc@h-IZzAFR&Z{e8JB&D3L=rzNsX$m|eHu3hVYybD7}I{fg=JbtTK|`8BBHb?dQ5eyb7>!$5M$=}N!i zh%}B1Pq%5fbO(m4E-TcB%i=T|KRtFukmj$~-Z78lYn;aVz~d>?$m4kBN=!;%`*U0r zzTk9{p#vhTzTnrVPg3}$JL(C4KWLA$wvhBx>;nz9^c%2rUou{+hOf7lwB00+WH_>VAXs{7^93MRo98;AM(TtyqJkb-=Yc z0WD_U-iPBNf5p%#l$h#O{dzvb`|@DR3--snJr~mC2^od-mZ81VE7kg9rr`R|;S`5% zGP2e$fzd8qDc6JC`C;La4=4!P_^hHSNr4Dzhcc&2XxS@1{C+FJ(}B`>(T(vPZs- zRdo!Vo!A;rh7XUa@K*!7oeNeHIAcHfnr$=zHfB^EL%T?wPF87qYkv2$EiKg7jk!Q% zRj>|Dhl#DHx&RzrkB<6tk&d%Ds$r%Iv>yM9e?#_%D3~a-bAGD+dE(F0EX8^vSz;EJ zZ^iiIQ^ngY^XKqL` zU||NIWq=2xCLv{cUSenH^0`;Mbh$Qq$~Vt)ARY}A!CHm@d~S?6B;s@2@})!Qw2hw^ zDBpVOp3_0@FK)tbIY%a_!$h;5Ue?oIn~w#1?}PZ=ThDf>D}c@tfvJ-EhlY#e0hM$^ znRJ6kx^`Fh{VI-knC(&}H2GG&7|uQRnzUCX;}5`S_4#wREavML?q>*{i;ZXJUI4h%yk5SIy+QJ=*Zpr!O0aWq{!b?*{?D64EIh#Ty#J?%csV(^|JO|-t*;gI zO;*4r(KWCR*4T^k9SX6cS~^;+n!S~okjYq&Ab9VMod2-AN!Ej1Wxo&c+QpFu+x7Q{ zsNc=ITEufbtxLH|HTVyx1T!EnQxVq19->&ZC{zgpe(}u)c@n&6!%ylK50#z|xqtR& z%ugmqpc!a(t_r@AFceGIiPvTSmPX0|o)tSHJMooy68)W)g~DZM>Rg`sXjN#&*sJzulMYWVrQMxQrU z$gVDLy_0&5oH5XXFFmc1NAt3uq1F0|=$;9&yibuwv5JV#?GatCS-jM%4)N|IY9-jq zBye{&W2e9=B-^COD(M5ND^@KdQ?z1@jqBIF?EoEuN`9Y73ozV;U!?9dzoA2C zp@hGJS7ObY_=Q$l!>2h%&2z%kdj;t8=FJ?L z{V3_BSdz2FyT9bvdUi-_hCV4d@%s#-%o2Q&&P@lWi8+U~sLyF}zOd*wLlq&74T2%_ zYh^HrAb7@SC?l+?T`X~SX+MMRN2Tvp(0210>sFaqk`=+zw6@SN;<_#Dl4$eYl)pii zG@S~%Z3oG=kvG3?zB3l)=Y~w;Ll7j1gm(73j|6rGD$^IMar&#sl&B3s)GQD{5ZLc> zKyg+#E7h=1*GjSv2g0L1e&`pqU{$VRN9<8xhjMZV!t`ON-JCltQU}Ml{ZOeUS-RUf zLM!HR(2Xg-c^LZ=Fp|a0Af2?OuyX9s8e^E9s*-B zg9FGaZ|s4=a-*Y3H4??m>_*+9_A3eL6hDjpP|4!`NmLhhHpP5aAv{obqt9n%h`8fv z#ro~4pyT!WO7Qi3{Ox`?%j@;v%HQl`-}5e z_%F>jbWw>izB7HFM&ajywYS%-dTed-`Tn>21FyFWSh}or6}q~MqaW8Q0GRD4uhafe zGTZKPd8kyJe#{xn7eb_es~F@$c&wIHz1&hqC8bnJ0^1wW3s=<|h86}f*Mb>?@U%L_ z)ylr6{y^xnJcW8fddGgx4f=xg30XwmFKWP%xrWL3^!o~GV%Mrq7;FnHBeA%CqYJ9g z`R`mW|4tI!l`H7Ya}|Ty7PK|G1Pi6&B?+8fw`gla4>n)U(V-aOw0%2w^lrZ}8Xpp~%#@f@T}FvWolYX?`zCP)!)bHqhoIER zs`Q##mQ9|%7BW<=;m5Kb+5Bu1sqS~L|#GL#{U`@=WB)8R7p4# z(0Y8~#obbN^Dc-KD>+eF0n7o)gy&}WrFvc-e1YMv?K!S!YK`#k(VmckUFL71f=? z{XCp55y}o!B{IpA-s24x>*THR2gb2ipQwyywt>6@oO2ec2XK;~o={z8I|%b1nQ)gP zY&y_ZQO**hm5w}5;6As+IYY)A`Bw;S^Mcc(HhCtuS1|@WxnhGj=b*t0oNpN+=HPUE zI&BZ5#%z;447A_}JZT8unUGz`mt)>xe(N0T`rlq)H3@?bxRiUtm(xNjZM2xzx4KS! zqF}#vfH&Bl3a)SEkO@3LI4~i)R6Ja0jTG*b5CctKA8cHcJ(^1W?M|i|K36s|OS-VFy+EFA z^EJycK~uisTK}MPH_6qss~qi8#4rDvTP6OyG~X6nU-c7k3-67TcNKtlVSUmn$U2=6zORB4=)xgyy+LEBChqYp*Y9V#n$Ur*jhL@>viC|qM)## zAv`H~`EY!4k-)(h(Bkh6B*S_Fz2}?JA3Z6dgwYkTM$}}Vz#*#1O$CL7oS=ZAsp<_{ z*rU^TPow^&QuN`@n-p#l6*X&i>KKyYzw3AM!MubCgunix*fL%LiUFZKpUza;>Mcr? zDT))*2MGdrd%gS@sP`Tp40>HtcQoi)N|jG_=tw1f>!F|wB_kFo*Ixqv68na?&-%Q_sOhp5B;0HB!&{(WOv~=RyBJh6T>i8a3IqVVGRff zb$y#tl>ZRTS2Wfwx{Js(f+%-e#;xX4@i*#|hwmkeFPx1tC{1;qQR7F=o?lBEbU0y8 zzbtxI-Bh~wr^~lMRh-QC6;!sAoaI zhF=L8zTQA?$D2(0I1B9DY!_knQT=JagVAJp&#ph`QZxpm=Ke2 zD0>LJSb7k=G1vXR_Q_PQJl(AxV?pfy5Rwxpy`sim|KUFTaA->(Uf z@SDO3e!il3iaff#=p^}BgXTL7E5=K zIqUL?$raX6;;*N#@3AB;0j8mZ{DL={bSVkAjrxP{O`}3&>qQ2W``!lWUk&pbQ>8YQ z=f*wBmOA2fGi&0Nie^&d*fAEG;FRC?GVuBznUICL$WZo@r)PI&?uO|G(=7=z{FB$= z=ng1ie3QROJ+lCb(E6KBlFAxW1*v^(F$6SATx~8eT(Obp@2&Kbh$gBc8k2S5by;zet2&w#wKYqG*3SVSdpUlL>E203pmluLFxAn3$!X|9<}fO&62?=$9aw z6h+EC>JF}4bLNv703WXN~p3`U0c z91ml$G#T+u4#y%uqEdX(fQMKAa6lj9n zP`-MeF1V$2m0Mi~Y9}gU;{sQ50tGo2Q=6f?&Kt|>g{Y>_m)x}NFuS-a<4?OF2*R?W z8Y#`F$3U$8EPoh<_R?G~yZ$d@*-{a0iQm-}yRI_7kT$8+uEK_0eF{#g@Uyt8K5QVi zsy1IK#{fbDDDx}XM|bSxJ&!i$Dp5k%pUP_|ds2?HUkTHxS*&1H2~aWkHAH02d*g_m zAT8TI=sj(Ly+;&22+*Xb_aDOK2^t%ge~HVLc}j)N-uh#=h>;JRJN+^7eex}&%(}tQ zGmBx!3pr?rDSo?E@x}il%q|P3SSR9ajlQ1I^odRwX7BG0Um6IB7Px#6;mJp#I-Q^u zs3|V{+oO_h;$nCiG|NR~X0dfszD`V^+;VG-ze)ahc(fGi`XS03;>hORoIzn` zf}OmYGG>C}^i`fvo#i@}o-3=FS-)L4{%NA76PNa~LUc{5w7neJIqBr<*ce)mk=@c8 z)YPK=x9WwG==##4@+V*twB)#0PAGa*p0Q`h7`|iByjxP2eg`VduTe)~(#2YGU2u}A zNN;HOks`0ofgmFAFf7)s#Wc7#8!gmx+iGA^11-=In!G}O8oLMiZaqTWHpWHTlJi^p zlazn#pyCoV_sF2nTyu0Cjcvi^PB*BYR4#i0-q7!wiv&ji!O~?<-MjtvS8KE9TI=j} z{`C~a&2_6;*C7}#i=6bMdn7o^Mor+g(>%KBxS{ewZJizMhqG;H7FVhbePBHN!+36F z8}BR0b(=Ps2Uey01CD(C!^|W)(HZlJd}uMqK6+DVy3eDz1nIttd>ONb`ik3tbMUDH z<=T?)^rH&TbFT854jd51Z%(!Od9A2O?@Vhm!1~_j&!gMjz@4+##4teuG)EiR4+q2PpGm;4@2?~1+0+b7L^#ngE|A@Ay+-e8N!g^qBW&JJWz7C|fC5Pjy`?+M}& z&9z_@ZIDlw68{92TQx*HL@==Q?NQ?1;x^#WMEL&Md!|N@s}+SSuI-`N@tB0Ti}RN8 zgTxXXa&_*c6NE#OD)McqY*RIi9bT$|%UL+Vuf1&qSW+JL}cZCA=<>(!S+(Np4!uTq9jvis>6|QR9_{lfB zo=I1bu6vJaHZ#JL{Mm+MK}or62@3Nc8nl$iJ%NH>T+TqdU^NPE9;f8>lbGc zz@Og%;UbDnB@xhCd~Sq1(B$UXnn%0mr{23d0k;HNJCylI@t+XL^|{|q&p1aZymNM~ zgNFOs6N_Hy0BHCJfQE4ZG*mb|W5ddwCNXm3(`4|3&G*WAG45Y-`ObLaDC*>ib?z6x zCy{4&RITxJ1pn~dz788?`y7N+dBn(B{?k{xL$z6h_wD7(>vit!;X(H8?y7>?oh1XM z=4pyztJ&l^XZ<{3-*zp3Y=1`tI*42tm6n^(8a>AsvRT?))nP^X=dHEkhxzlU=+T?TaDcChE4nSsr=Wvn2e5Yi&+q!6#^XadgH zcPh5sxSK31dJi#0UXW_gmb3jtAhoX)g5ruJ6J;|Bo-fh33pPcrY43dyqcD0=Z+=oh zGDxH%6LbYiE|G9nuYVf0#^9W^v<_Jk;dmkl0ggP8S z%l}={%_9?HFJ6pDfeQm}1|uzyUKg_&^5dGh015x$874N|?U z5C^DGr5$ztlB6(U;TiPc0rfe}0@>!hA~znOQ+hbi?9DKZhiqK7N|F9sXPTnDjK!+S zn)?D^u8U&M=1<`3Q~fxlXQ85}{|Yjegbq(idk2!gHlw1g!@KPyV5!IzZH1gep1Lv{ z3P#!lyoD;AH?DQ>ARqvVXg~rM@a(%9YXQOeI})B08mN=c?-ijXtZSU9STtpzVa4e$ zxN*%&5)7;k<#`X;H$i#GRlW<9ffV=z@;wQAh;OU`;+6X{NKlF1!l}lz ztpuUzU*UlOF!BdOC@)T*r{HhewFHr}67TtW*=1nb}AQ$ zl+Du5FV|XJC{M4vXi}7U&Dnm0@<4mS*VGvzhoo-t|GMnCuHmA)L!cid`yT>b{{(d1 z;_U!H00dx-yMxEqC7ORgzcLn?%#j&GssOkyxV&W&@P;#?u7HX#u^Zo{^f)3N`^-CYgwVk6A)31|v_%cT3gD)rb z@{S&B&KNolp7K!PBIWfaE;1E(gQoZX%IrlyruW7_-G#LD@cdp?8SGt^y3eU`Uf&!$ z^$9z`m4{`?iGLJy?3DmL>#JQm61l%-M4D`U+RqIdC%aLtNqey(y|&9!kRh@R`b(3K zTrYZniQ$lR&+Iz)Q_#cf3>FAzJUECUFz@$|29iV$L3XDo&7vp+(T{EdzoK5GK%t+T zm^;C0u_lF`sfk1nv-#rVye5d;xC5sLLX)coIH=KghQKgG{wjY4RB=Eo@=KQc_9`s1 zzk&Og4`u*mFp}@2QTB1)Bq;w^=AvN3bWXTS;$WV>g#7rc);?&2Y27k z-+7@qlAxMj!Dc8w$*kRQeqUSrC{poY;<74%8Vr|7`aRqUnpYBYYny~3l*kGC(d|MX zMRbC(-x1str)8cGQeT9M8WRYZw8(rAbTC_s<$kI#5uv_~`Kn(KE2aX4ypNaxaG@Xa zM794@{h|B%h)HlnFy-2EIlhJHm0v`&-aO)^hWxcQ3sqMx{1yWOF?7=N|IRlu{y;EW zL4cYF1Y1=Ue*y=G@B4Sl|LS?z=jP44$Vv8@iK`eMqBd+2=t_iT5fvmy{hr+DtB6K4 zFMFdctUqr40@97@g5WvJ38>dy5dvfiS91gaI2EePRQ?8D zM4+~1Q&BP@CtNFPs6pghBV4%!ea~HI4scxvhC!2&5Q;4xC)Ce^^$phx|IhP7 z9PC{GpUw~czibV0{x9D_NzkgQrr`N;eS>9XZnO^%1_yzLa|bCu$bGko7~s&4PlfmM zjYQzK18DUWL##Qq+M zmkFky{@gGRgN3eIkD|Y!#a~h5l*to<*iH9&iT@H9=BWh=89zi9_WiV;6Rm)0D-%@2 ztY$=+0U!0?uf=0;5twEgxw@U$P|N-9#pO0INa95ED!$)Can5zX6y(^~%$=n( z?@ly97<8oO`5+XDXVx%|u{2lJ)G6>`c!?$;U@s|F)n z@wzVub>&<4=JyKEruKEGIzgwWb=#<>MGCjcUWYdwy-}YQdv>~88;Q%$eUcW z`YHmyPg7T^t2deJ){RIIRU77FhL=3^|$fN&4LDp)G3EcT8d8V5C9LkO-WTAt=_Su>t*y%^G%pTzXt%F?N08Cd9% z+;*;w%;Zicd{+7*O-F>ASnbQEJ8PqYL_K0>tR_sxU@diZ zj5|xC&Yfsu+F6S~OWeF(Z{j0=_{+e=5mVFoxYRSTnQI;yS#V<>jn&YtDR4qgs7Mb_ z^tqXtOxjO+qrp>Lw;CRWqx6MWKT-!v#2gf_1LFQv%Gi}R5skAu`ymJ zwNTmI<)|aoQ zRH(;LG`Dka5n$eCLo&RKCBTFsDQy6)5>%`7+}et$&{MkM{eYSdUx;i(w1G2w&gzMj zSAXb2Tc{dTOIo;Nc-$aYwrStp3GAwQF_F(O@0#zZ&bZ2`N?X7rQV$n<64gY@&HXwx zhMo!}i=TM}Jp;W$cAlwA&pOiA&Q#v&UM1fIaj^T;9?JtbF?8SynX9fUz9q2&Lb;>W zuK%U&*KQVDy1G#V+DsZNVucGiGcD3GZY6d2BDTZCL>5Tq%r7i^i3Ufg=VDfMfvj9= zkuyK8FtN&Ni8Jy>h6Zj3i=vf#{xWY_bRpya%AaAr@b`Nt?M@iOn5~TGAue((lNRl( z^wBdb9Dw<4Q%Wv0Tlwuf4mQU6yzNXD&o`x|j_guW)!l#^)M*EY?6avSmo@7V`ZJC-w%nsp0`L|U*lmQQJYwdVP9w)QIDpSD}bZ>qmI`pTPMZu$nJr>Y+Yu@TvVZM zZ!ND&4Hr!0A_<`nOB_oC#=i|7eB`uTzm(EKw#H2w@BfX7n>54=i>}vy4Cvo&-cZ9C z?@5cZ@WYWyP;%)OGE3JKY%kQfdUdbu{BCGZ&XZN5Msu`BWqGt~KQznADmVechCyfl z-%ldz%R3lz53Lj~BA;L%2qnEL9OsK2Nt|I@84Opz$Kk*ca}c6>Rap27=JW(Dydylk zGn7?0nOe&%wOzi!>Dsey(5>?bEVrvdS{_4Mb}mWn!ntVt;Rh!m*r3xjAoqs0vx3XF*zU9d$iBqa5hFpU^+LuM9TA>2Pr}63&6N;RZN-Rl03oY@X~w{B8eu zrrB6{)s0WTnP<4Bxse}WI-~cTzr3uJhvNo0jXz#OHa#I**T9_l2tDDV64cL7P(a*iIE;2wEXxNK=c!%8f4m{aAD)(QJ{&PN zY@pQ~t{ZCk>`@P({0}k^OL-b(#kj%Z&>_wJv(iy_vuoEUgyst6on)c-x@5TomUI8D zU&-rc5T5;>%st4V^9+YgKCfgWw1b2ENQ~z^cAXwHeQ>zY&_)?3iU8#vtz_geNY2L z%9nE(^g=rj02$!^GOXbCOt6*4C26%g+tnGv0R_lNp;`92v z!tjqzRxpZH9z*@#5+Kp}3WmrQp;^FxclGN78&Id0u3A8O{`>QsKJZ1(rB`b7^OA(U z92=vdmK@u+1kqYo7YN)!yriC~yfWbpswJPAgfavZIt`r2+-|bY5pFDG$u=#NhBM0k zYma%Dv@NMwaJDT)Zm49ug8%SUt6PZ5b#%~b3OJZcT4G!~of@lLbq$IMAuNLwcDyO2 z`9JyUzA>U}W^Jt9h&Qf)1Qm%b95LHbqPY#ow|qry0ZGD8g`Iams;R9*o^wV{=7M8w zsA)qD=;!^;@7~J+>8#7O68*@kh_N|-=bu@UaHrA1mJa7Za%1i-f)j?`_1qB9>E71D z7$?xOqRb-$e_96FpMcf(G&zASZ7^n$+PKewRx=-h?g-Xi`tNcsgA+tTJcuD+`Z6LA zI&62mMOK^alH*WRxMqcLpM-*WCo?R=KJ>yaV29M$?|7H?0bGDXc*F&jA0X)Oq#6<|h+lJ6 zv)e-Z34+8h(q0QpzrQGlIiO-a-88$Ev5mr( z6sM>SJ)BAVsnu(Fq8J(`LL<9y!G67P7j*nKHG!I0>r5SNPU8gK4^Y52gPBP#U#nv6 z%A^|fAZnzr7L<4E2|_lw$Si#l@iv2AS_xTipL{BcK1#~*h|V|Kq@%ZX4kHddRT+ld zRE||TmUcs`BduR-_?j?~1`g*gB@V5dcbW4@v`Y{l_Lijci z6bArBqQ)mt8Y;@X&7QP;iSZOMDfVN8kpiG-Sa`JrqtX2?J?YgpfdF@s#!qk=>t&^*pxW})X;3Ui{@ zd0~uRRjZ`n4f@cJBv7x<6b)OYMw4Ww_IsD22H#9)bAq`fIcnj zeTcrK$7SIjAy6*d0;K|zt>udk0S8Z6NEV$f=NsoGM{R2g+J5ZUdHwwt@&sKI&zk}6 z5VReS-YUldyZ2gny*Yt4s0khiY!d@snF9O89Jq=YRcJ>jblLUwZ4#6SZU-oB)a12z z!@;=fkTkm}p!9@ErUhGtpTM-sf?T3;y7+25*{^S<-e3E(K4}k^gMpN8IKG(ORMPX~R;Mmi0%m08mytd=SvU=7eSN)h@gcsCG^CAh&6k0n~I$)_oFZfhhsKyfzpjOizqTHJt}kqUOh>2Md3 z{8$}cS!y3-HA$eYMh3;<8WN#?WC3ZD3hJY_3VHT&Yjy+}my_6cd~Gy}b`?tQ)xGNM z_bVqc4aJ2*oxo(dBnKTjKcab35pXRK1I5-Odb(8oj4O1@6PE2XY4!v1xh7=l$p%~! zbPfi+3{(zAxD-?hNw`$+#^vI$)9uB~uIC_^uHFYwCP3gavlai5O%L+yk7XBiCtGx; z$&&Rbr16F%mY?7<-q`@z^q>RF+AMFmK4BE@*%sRcM~cHqfn}G`cK9jmxh)0)e~3BL z0IvX93Q};``rYR*ZRIar9R}4@j3>T`f>Fq5TP}MiuS1JaGWp_sdu@-Av!6X*yxYK{ zkbz&o{%?|l;4cOLPKGvaZ#Y_SJzP$%dJT!AnQ1JE=T+gfNfqV)5tIgNkL(|U6 zlN`x^k)W0%3sS--Ay6|##3+IZL5g#^^f|;$O!|Z0>N zRVc}j+}r0-^4p8B$N$CISHR}g>cfHq6Wor-6oSRSfVk zo{>IpzV+d_-+`h!NN@oH+rAsKFluL(a29~_=LehUl*^{B@>>cd=EXYxtMVlK^OnUI zqu?z^$cdP2@&U(1bC5t}LOO`S1HM|4f;aN#p(6f}FuZM2!#(HabawKL`@~|-8-iX+ ziHRu53XR0S%kC}ldr;P!H0r!t#^=vkSgRVII?e}n9!p-10bmR|>)Jo$z$KLYH5FFH zc^q5C>S;1D=b}~wBGvMLPQrG6RYLIVwgzWiR{`+3+Udj9{>THn!*I7XNA_kx(rRM!}A=j47&-2Y=rhobZrAsh- z4VSAmLSZzy;*lHCtzvt2XX?+G?pgv$0!wpkSU)4=FfjhRQk|yf)okCL!HMV1^;OFc zI|1jGnN@yG2i-ik=5JxS`LqJk7~)D|{4 zi*b5CstXb*Lw`Jg{tP@NFOFg3W>LSkvp3}PeUvZ3U&#q9wp4m$~B!?<= z7H{xYANb<%s;4QZ?=P!*7G}eu5j*6^i158~Q$PU+L}ROGM1UtD47bPkHi$!p+#1_W zj;}a*J+_K0xZnEBQ)_v%c=W#KPH9V9;50bt~7fK&0&8r&S=iuc0W}CsABV8bk`< zq4$7@U7Obg6^)B$$orK5okluw)z}o6%JJhC;V?T1s`CLiaw{Ni#5_u;GNHom;<$mE z4@%Z!15j)_(4 zM+dAXl}nu`EmkL-ycPZClz6j8Rjy6{ z-GvQX9m(EqzH@ZD6@6R4&F=o&+nvzv)pk9b7oGI{Cqa@~Nx5izp)!b1OT<8=k_0Bd zCcl=X@n5fRA2U&p)Ou<`xR~Syb1e;Qe~Mu8ukvZ2)V$UkkAGD%BtRw;YJ>PhOFSzj zH;F0)m{tzhPbd(lEqL)>fAGCXR{@vqnvk1>HAdNlbLc+(3y4o=Uj7C zOO{pu7d9-c$N@RUr$7>a!1~71)>mKRvwQ}DTbI+y($xxh0)>SXDJ0I)l?(XcU8=g( z(^J!SVn?XEvPz)_Rr*U#SU@lvniT>aJxuN_id>2&*s`2s)vM|sGD32acm?^iLOhEE zg#QRN@dF$RXo;_>v2l&^c5OncpqY)k1X(@zG6I02pES zO|`l=_<5h&u-_}O(jTx+_4Td+ibj<~Mw2Y!&+vCUfNmwZNHv-|mRLL(YdQwXCOMfF z-(r_F*E#_{eCQ8h!7e8%R&;cW;2*;OVt9iHKs>>8MN?ry>Wa?-N<5w;1p0ruBk)1- z&B?+&$sj~>G_giM4e|hP2plljW?{}psK434kv{!lNsHS!=%IE-AYtE%NVAA2;<&(I z^@RX9BLMFN+yPLA$FZ@qsZI+(=`k0_F?Wl727w9thMS6+ksAqyDwiJwY-tm4!KRp# zjsELV*ghokM=(?ei1`^lerF$k4d;Vw%B-eu-JUEUf;pO)K1A{+$DQ4?C;*88Z;t42 z0JZ3c(NgdJ?XE%*eUY_KMqf3385B}k=*#&)Sb0Wf*1372tn|Ifa5np9IZ(Er$m#&C znMdbK#ye5pwO_bK2_F2ia+!g(d{$Tr3M8aR5w@PLoI@qJ&u?M&uK5Wsi}xiYfbH)P zZA1`2<7^~fLBIoZ0MhM4?eMl+eyaB$Vk7STu*gAAb7qklyWZ2z5X&RVu^O z?X&@=gKPzgO{N~nLK+`*wnx$xARSx4`S&y?anz{iVSnakfA;idzVm~$WS*8XRIPkg zjv;-3*kcS?1n@yPakHRXcvg+wt-tCj7wI2!^;)cfGJ?WO1OZNnf24raye=RqAw>-F zd$n?dd^Vr3Ss~y<7>A!NkN8+1MwNS2Pn=;I)E&vbv`*_rok-UAu+DU-8cN2ZUcK zoL_Gtxvr&EEC>Jx0xn~$f)jko)|ph-gN2aEj4cRVRsiLOu?~Ww9dO-*0lnMXNsOP7 zjz@vsqu@YqO5H5-a5peW_3n@E*E$@}5Ps|L5aTaUIqkY0HD^vhd0<$2O4&H^h4AXd z`Phtz^z%JtIHJM={4BlRqCUc6ogQNXp6{xl{QAH#ur~Ojw4mUC_vHciqrrzAcyV)m zYqtIT2jKxFH^ImEq;h=EH{#1Jdo(@}o&fCL5I<|u?`HTUp(Fv{M*ZX407wB|H`M+i zep5gus=kDcT&BCMjD@dUC;l1to;l$RiK@;Zto^w*e53sS65#Q+ZTfzmXzMlW8qvu4 z;-vz4FM|{q9FdrQCIvCcBwE3UZHm1;3|bp*y9=V;k66LDq$(A#$PXg8i&Y0iJOO_* zP@>fej$o-EW*MDa$XEA0X@+}pfX5rm$}&tc^~Zz%Xa9C@{=;`r9d%f{|LzB3W9Iyi z+xq^$Q-nDGk1L|$wOXoanj-%31I?>`CUjvCV&t!c#Xgo9TwIK23?ehQd9M=B*t#K( zRY-HPy4a`|L>901AuG|4DycZm&p)ItYOmEkj3>|4qZh9$xI(2htxYrv6>ZmEo1}dE zxi>|182>}Ybcxz1xHLhf*biwQXLwt9>Su)^W^Gt&44fejsWuE#or+APY+;98=r{n; zgcGfU9bpL4sVId_KBji}O{k=7FgA@>kx-wyQW?S$E`R#^i9)JbTO=<#zhZiy^h?1q zB^l>H-q_@o%6FJoNzXYv@S@pcrRVUx0+q#6)58+=LKT<_rHbg#jvdKKOydA2Qy6<; zw5Pz-eB(iywr{A0jD|OzCI(Mif4^GOo6+u3(-uTOz1KfP!PDZ{PHzQajD8*@`SG(- zEqhk4W^2M&?^n7Fs81kHUDH^?7|Sh z2GXB1haq*eCcJgL*&P~ut8JYSCskiF$jquC@OjaF! z30^sHw_-12a$3b4^mAQ^a`O*AhVJ-s_!gS2csgCW6wqp^ilj`D-kc?(GSI1!&xF5p z3m))-V5I|!gD!8wj6=P1VRRRu?N|(I$vzP(cu1p({=)v_!@`H5AT#8?o@5UzCyWyt z84n7dWMCP$MqH4tzl=RL8Qmvz#CRE}SM25&WPahQSrN z9M*T~cB0a$@FC0&B7_amnJIQr+1p_(T9DMAnN?y`KT4~EjC-n2@i&5fI7eX~MA42% z!0U?K1lKQ|W8jXLNP!yy5sesS9*R0|I&EMp4K{qNP+^?S;B3eR({f-Ckg4`?n1yvU zIOtY?#m|FvR5|NzU|@wgM#TTET!#ShJ-yI_rTm(bP16tmhs}b|3DmLdoD*iGMQ;X1 zt`ic5Kj{V$m9U0yEC@>@(^yy+{1r%1S^Kkuta?6U0ouPcBbg}m}Y zO=i*PrzxD~is;&R7Z|HRuw6u$QSk7@1V86sv-M(q9+SgJr?=qGCf@f+)3Y9H`kIFl znD*ICVS~=Zo&}DD1Ml-<#6Va4WtHke(+08LWRg_T0X3sdC@DBXtU+jdU41LKL2Vb>|O@hF62lCCz+qnw;no7^f*X9QC8`Je-@o zra?>+4_GYy3MGO#6TfKcylJ-83Q*on`*#f9#hB|S@e(juva>le8d+I-gVs{B1xMym zH{0KOS$H<>P9`UDh5KVsx`tg!`!gVnT*~hP^*P_hQL5MAahr#Mp{aGE0w;A{j&Q=q zgG7u~y{nqQG&$w)UoWdrTeR<}Z{8j!fHU5J9HGbcj+dJOowv7+_qRu#_m`-5c)}H= z^>>Q}B=6@Lo%el0??2j?7iPZ$U+&57kO%y&KeLC-d_9|%o`%~3yIl8rxkPfOE~}1z zzrB8cy;3;I35(j|Ocm=n7nMyVsI6x)FI#C6tB^A?bPigS&?KUe4Llp1FZbtVTA8`K zgI25}{JbRuWK_f~5@VpU1BZx@enHn893SLcnPb28tNo3>Igtv~dS2hl|*8l_4ONHpy+$qG^dkORAyI3d? zrWQ<)LF&e@`oG~MP?}y^2T1~IIICGHZ&3zYV5Y`*{ss&hb*l*NFoDt#+wF2C6~!jI zD^fzVR5~M{bOT{3aGTU!eSsH&$q7BfBMTNgPCY^uaw2O(Hnzm)hVYtZk4BA+sC-Yu z<&UHgPR!PtCQb61kewqSF0{czBc*fqv0|0f?wG$z0xH4>mAX|#cZvy5%wlT)pem z<8W|6mE6&kx09JI?r`F@eWd}P)WyjIXS1edcJTePOJ&bh*)`-d?jDFxe-~&#_=XxN z6se1HXBTwF-@%?5g*^o2JKRzbA(=H4fx#heFih@jg$;d57g)^`I|lpy?Ao^Eq^ekV z2tKEeaP}`=G}p)qVNt}wX@G}<{aTxjP4@(RkuPfvQ8p1vEPhHVkQ$sCIo2JXPp0+-o^NkwePf#}lc-X|wWs-S z{vS>Dc5wrjAd##NSM~Zc> ztppgY$VS_v^AHWbQojEKs(0Tx5V-NFTo~BXT_E1AeA<()iZ6@TLUDz<2|>R?6o>gz z`ye0*{pXE{Jg+tiWU=hUuWlz*{Ws5r7G(P|ah18f-OSxH=>ba7j;0*`4;Y;+t~}Is z0Y`D((!Xq$0acG@r-GGDbRfJWj*iysb|RQ|5ZSGS+m09)L;Z_SCb$hvsBVG9LZl#I zKP2FxL!z-F{{S)2L5qmSGS69gZSf)T00C1Q-FKd+h{Ja%tVMZ9)q42xyYA2bI1dmu z%+i2tuJejn^iWXOz+P#K_!JW~ZDQCTtFPSrmwZx6Btmn_Q*aQ%n?!OA%A3Rq|3r;v z-`yRAXnPVwKy(Abm*k%+?#@8`^NfG;%pQ)$+?q5|$WO4mJ^dX5WU4I)8DuIUAe6%#v>u+f*ja^O_}tmt(6h78 z+o1V8M7kXD_t)T56=*Rfut$hYWta83y~LMVv#u@J3=QNBO^Y0`2uL;n`AJ|RfbAb$ z96aOWav*Cw-xd%1{RH1X>F+i&;8Dn=%6~2Vc58!y9QD35*cQK`8TS(mbU(*|h-iZ> z4iN$(E#SxU2d(l8>3TB9Ok1^!LhY9O+bt*}#wMyAdj&&WW`(u^h`9P?760Ip^|6}k zarGN@HRf5kyCYgw{Om&`$AyHP$0)fE>L*t5V=D?p*hAHe$vUul9k!}7z8LH zu{r|;vRL@bt)E)M6p8+otm?((t7pVCF4vC#8pph5j}B+sDybAq=6#7B(n?@B(E{sJu9d67dNfzB+d zbSR+N?hYY*7{NF=$>;P@i|5zR|J6bu>%7^4fGA5Y&K~ezxN#td^xD_kjfm$Ye*JK8 zd`y>N@U$X3m$u`=V?SCrSSPX z*h+-a9ipb@BCic2J|vYm4A48d0)HG#8KPayNs67=%-^a(utCFB<|rpAIo`@%_6AmI zM}q-h)C2~$pyz-_P%4w`5lK22AGnoxF!>)EI36As**IVj5Ol=Ke}ygX`G-NhyexDapVeOBSX&+pc2#!om7v`EA6Sxw%YdV&1psj1XElJZ z{yTK?-%;Fif9wV~G&%|+mSw2Nap(LaVHKR^5iPvM>>bs!O^*fjIs{Z5vF{Aho^+fs zgVvk^R@K+!W7ZlYL~7qR%8{nD4TPFOjXm7gSSGYGB87(|kB~+Q}T5%%put>#afsXG)#pO`oM$)$; zOK=8+!IFp>1^XQ{(s6g*E*4!Rp%^@yfClY$gDXbaZh{sMG+uzr82~qN991c7R-I_p zdt>+zFwyY{+;U(NWVxlmA<6NM2SODR@P8&?BQ=(d%Tg&MdA|W2A4GEBw zPV|0Vfl#X0``zF_KAJrM2(Cwm*m;_hC*c8qmWJDJf-3hnU4T$;131QCDr`dgn~xjZw7}5Q}{cj6eoLe&$ne#_ribQG%z1L8 zPs&Il!3w2VLU=~M^fDcFsslutJ8}gvL^H{-2K&a@7IVVqg)5Bt63-!FMq7Asl1$IG zC5LzeSvqfujvJv{iVj%f*ne`s0qS?%R2!~|Upa+sn?1zq7RcoIj1T$LTXeuMNhu=& z6$D@9>DPI)$J@3B6C7pE$5;ONP-K{l2Ix7KikN)GaD;P#gpwGk$pkC(7|6Ub_nGkD zqGnzx!Kb!w*1%C=_*ZqSAHS2VbVvkfA1R_@g%JGV7EgHY1jH4uj2eGX_`rxGgMu;h z%7-+Q1OuPh?gx^O4-sR04{e8^7!5-*W0g~#GpfI%{vPC1f`F9iKZK3(jkRs|Gu$vt zi}4Cy)G2z0@Yx;XX+lJfdIIzm!h5?UxAeL*XRS(M8TKT2>8Ke53Se9Zf0$ckAA z3y{wTZ+%(Rdz`~&vO67PDb#=G=sn4VWTfTyjROIb$VXAH)L$=cWVc!FYcKnHcaR zKAr?DJE_c@yiifo)$$^`L}EBvf=tNx5#>bKA(5gIA97yraSXnq2v|T>3rQHFNdZvu zoy61?IQ!(sDk2}E3Bd7`#0E*{E5)uD+97}(`Qm&O9Vbvy0#>Qzq(9hj}cZ3 zf&gQeID736+?~IC@WlC6_VNKkcclS4@R>bhH&;7)E^R&y?KO~&-fQUHBLSPPV(K62 zumjX#3G*hLv>5lQAX6sF_KF*JTTVIoy$`;b1CHJX84mD1HmDKy-ZrS;kANrucE`p3 z;|mb&N1F7<{49@%+0V7Uodl)26D)$-$ z+;{qbr&Az{1rS_WwLPvrbwkNsrwu~UbP-?u%e`-9bn+aqHdHVHufs!+S*KqIJ??p3 z4tS5hwKY)QUQ92kC)68oKLJ{wv=ca(L(;~E91cDOpaJaaPVkJ>vO_`J+|eO#0Er(V zh~RkWlDV@T)}g^QAeq)kZp#G$AK#d}C`w=rG;sQWrBg7Q1&G|wtM4)Mq5Rj{k5LTA zbBN@mbwc3J@p}ZDXB_Z0!8o9yKx{bhs2)7DhVCm+vlF$3r$7S^#5?s6)1e!| zkbqtAZ!L&oV0<06o6YOmpRsa^JAsN6ROKNl5<+v+0Khy?E0`2C)7r363((gvKV(_| zhxRDm*@6fb(lro_=KI;tsV(srJk~KtJwoBi=9IqKeDk_9!c+n2Cw3s;6nzz$lk11i z8S=hA@AZ70cOrC~&}VndDJLiTRv8m8s}Q{Xx1d4%afm(k@2mH?G&lBY8_;Y3em#8- zWE;FyJF^}8LI4i;*o*4CpF zk?MH9&iTUg*o3^^0Uz*T1FYmjR5%GrU%<{0^OdeW0+~r2xBdX2bp^I}=P$-@DPXYg zL=--K(f=%fpF`^_9CH**)&GKLPPqy=W8(u!?()m)l-?ZhrV6(;??;Jev|pi{YYwQg zp2K9onoFoQ&u7MO(H84;tov>%dftT2zSrJYbie)F*>|vd@=LCM_eu_m7Zrm>5LA;z zZg$6D$PSS-&xpzvdTN{;z8PaO8hOf+J@``M)a!2aHuC9u9=$^|WG!XWpf-BB#&i9; z%Mv?`E<1?F&ql=#=B2gZZr3k!VU*yrsoNXuG}9%&k<>fTUyV1W`EHIBhEFT@DQ07a z_0NE5!p~sa{3#3<6+BM=!H*QCF0w8qGdf_%wN0{tEl4_=^@TmY0l zejYZ)w-$WHKG)(BuUPi-|cIK_H02jnBiM>gr&EK>;NsNZqTm1HwIJFGuG?bw{X)4IP zK<8pr5IcMhhvK^Y4?e2>pBqz2Te1)33kqyNP;PDK_yxx-i zn5Kkoms5hNGCn$w2 zx_Z{1yKAX8tUvqlB`nP14cTiCIlsI_?cS~-cnwkJS;lu4o!V;69i}o~b>_RQAv~YWpKs}b znHbDPDXi9>735WzH|LVWoz}tJdj}`-_>1@7Jw@!yj12$#imU&@Q^fH<9VW-d@PB!V z+9Fw7Y)4$isxI3Ai@_H^M{>5EI6?fyQir>^aT+ya;e^TA zhq_-{N3FduqCTY}&+^l=Zp*Y*rD5tK(R57on7(E5j}CpJ0BI($Q@m6XH`VrBGCQTS zT#_YKzXindY=0*oIDAl{uGm^Iol^-$;z)NPASWH zS1WU_y;8e}uSmT6sX|!hQWqBO-lkm^nnhkQuhGA%;mSHhTw_#`P-RrIUqg^Pr}K*H za&{$|c|f^PvHJ}O%&dk!(k5*1!v>jSVZx%F_ z)Amgif^j4Gun9&BKs@Bh@I(!Kaj`2D)P*sfCKzy~^ zI-!;&uX9?1Z9t#JKUm-|jk%gzQEoEh4Hv;kbHZA`f!cVCISJvlwB})PE++=J@n+~s zj1R$>0|h1lxJwv(v1F8WfHFIwZ+WprAYXcGewX){;Net>qHabQnl zz@Q0t&U}``&hIwnTY*l~tiAsro)I(q#t3%`x${QVx9Vhq;rvSFlXX_=^s$@h10iO4 zEx75#F%Jux-xdWmr9K8oMT>VetxGp5R&|&!dvs~#4lK+;Va~Aze+EB!W?SobD9?vhNbTT6?MjYF7!RQq9%j#7Vy#g zM~mso1|Ah3V19a#Fm^Lp5^21b?JNy#G;Dl^s$Jb*C#BDjiY?Plwm}1zdfaLdLSu1C zCCtVQ*@dp9_Pe8mKL&N=v0I zsAsQ0yI5h5(PaHK#gBrdgvz4)APks-He_XVWi&5SV*>b!+V$77hWEFTb+1R@1h|Ki zj`v+4KWOA5Kj^Js;p%wbd#K|5X660idi|~2)9%mlkigqTt+Hxh8G^ErdGOrg*GjHZ z;5MQ2cO$|~zHRfB3zolzID<`H>PttJZ1s?(K)8M0AY-%B_o-VgmnF*Ai&b1Z^|Z1< zGnjgkm|h08-!tlwm!EaEo*Q)Dp3l8mT1&6H43YiS-ZuR;yjXtnPN-32wx=_H)kqA; zk&8!}kt-YyF{4tfvnRU@&s(r0qq5u$Cvl8GTb3{E=QyHLG{AF2FRn9ifyvtUUZQIS zt?vKw7!sv0{d=}w;7I(Z0g)qFT_0yV4Bn6W%WQbhA()tDPD<#C>uFT7I%ZS|iPJ0a zw1|tf#j-cipU3B-9cMuq9u(;>-X430J3Yb?E3R!S;{3UCM?3Z{{;(U<*nxgqa6NKz z9-DD+)ztg(UuLw6Rs?)7)PNub=v+BDcRh62pY-9~n|H0T$F(X)P8Et-BAleKwNxhG zek&Luf3+(P7ZQ=F%iK=AD5#1+Qj(Ji)xT@bgOE_tP72HWN-FqUvBk@$24&rycQ8V+ z>E15hxo7+w%DuVv6f#T=Ykx+L(f|wl$Pk`XI9+rH4n(};_|U;HgB{r%wrFJDldIVy1j2f`hZwe>!j||? z8%aC~1a0-mJV@cL-?Inn!AsER5t=pZGOt0E>&TJUD_xYCD}6^)7Br9F&iwUus1z8& zrxz=(i^I)Sew~&lc*1XibJADZapiUoQ-wiN=TeE)c%`c-OSh<7pv8NZ>ZHZUsV2r5 z{2usdZV>g}J!%ge#k+pheo@!Pmy9qVh^n`ek8#676SU@~~# ztJ`)%q7!>$np8R4<7%1WO_esBSh)VeuyWoXw)z~0x=hk!W0i7%GMu!S!t@u&bE%xj zk$v|ajn}b8-MGuCzZk(<4-`*QzS>B_O0IB_f0D2a&-Ke=dhItgo3r-qPtl;6+H}-e#3( z0zGeT*TlV=EBmAeE%f^!omf@Om}66p%#ELZWciP{2QEw{i4>#HXFYhKn1gPt0J5oM z4};p;Vb1n_36*6GD`ZA4GScYh*&$T{?_2M8$W^A^T zBqDU!HG+A}VtxeBt|J7o?7i1UvJ+Oay7<|K>y>dGiz>N(mI*Ya#TLm9_YL@l1zg7V ztzo-6j_)+ivqeFu_h5AN6NxCh3>8_ZRd_DnmI2Y`==y1E{Zp;NS&y)h=MePQV=2jK z1rt1k;{F|6lfAS3cycrr!+~|fNd$^LrZvlPZ0wer>uH>k=%I%26tPFp(H*I-;|Bey z*Z#_NEPzS`Ddx#n{#xzOB>>FZ#o^~M>2C}1m^I+4H(XnB=%nMnF`1k~irmDJ9gVc3 zk0;273`{po*?xZhOnbqKCxV|p11lypVmDKx03UEjq{x6KmN?Loi=H;UQ_l!jCqZyH zCe|n3-j7%f4>Rr7NN90UP(LQDX*0Dk z+W$smb3m7D1D#ayF%O`s;r=12Juixtx z#6t%*ZB@N$w!wq=^m}c7BB5L?eWKR(+Nkw}W z-DdAC$5xIQ(k@JtN^7&!(~5Ra~XP6=ReS20EHKEcn;SL#5jiF#Or zD_uX9wCerYgzJ=XZ7)1uoz7HTCM6_qNpTLFES%Je6r?wxRAiK*v4rydMuI zkJuhM);VyLSbB|7UHug=Q~I)xjZZNFc+5C)JFt)$-IY&r1}t%lN*&wk9YXvqQ)a-z zFFAq*6-;WShJet!DtC0zB@z&bZuIi0Mp?scaL(FxSm?(zuq2#%RG_lTd#zt4=$mDTD+>lbou4Z*GxRxztg8g#y zb9E8o0M7uB7NIyfigPSlfWGD^Y%KD@ZWw8$Wbo$6DM6{}X(7gT@cr}a-a$-ATiKnq z$2e};x^QFs-+)4#!-uKY#J38-eO_}>Fvn5$1v*T_CE-+6x#BAjU^L(eah5|yU{ zzLkVYev@(9PFAs~#*v}~>})FB@YRd9C3b1pOKAtDxV@TB6n#WY3h(%DNm-(j!PqUQWQzXV7s`kMr9}>%8FzE!SMN2~2}ohpVQ)g2WMpbl4&pkNV+42XgIL z;2i~Sn#r-N`R#wHH{G-Mu&HR6&X$HG>}K}X$E{-qvYO_-3`cpq}AOI4j+9J-%f10L0n5geG3czX|~ zKFpN|2rmv|Wc(BLANl}uF;DfwAUbg+lwRT-8KelQmw%B)PoN=dkJ}U@c zt)a7yMh>s&SH<>>FDq22vd5cQ4YLFnG)hjx{RU-V^p}Vji~1N6rYp$@Ae(x7j|pcX zuC@N)VSqLZX{e7~q;LT+LRXTnL1k@5qH>vnOA7+D=V($ouHr{`n>BXjd4zpW1IWm! z>96a-YOkoPrL9B0bGY57K{hkz3ekUL+pP1CJclOE%oXOxsY++gmg?0YR8?o$3sL*; zf5I0BT(;rJF>*^Cvw5EDt(@~t4um%~2@WtQ45Ze(NR*_^M~(xLUw{og885 z0Rm@l?;ojG{lVdmt67p**Vf?)^Q7^$l)}}g3p`ov{j;k?23RHAkf2?v1nkhz{WrM& z$?3bcLTc}*m!<0*ZH}fbj;7o?5fVhwd=1Z(hVTZqe~BcqejP)~cdKd!>(taVTFvYe z)W5ERdrnWp$SWq?+NOzy@7nr*)f?>q#3Hay)2x#Ky%-3E-;i}=y`GLssHU;TV zNK{1_?&Iyyb`uXb%WYw74?xp9l9Gv5oFA|aXZlCXyh3rz(4$P;lzA_feOm#_qm{If zJ3z&!S)5oS$B>`8RJGZup!=`5UW~u($8#1L*1xj-gNmFXOG0>#98EMXVpKl_F#ETy z^%NE->#_#GA-juBRXkR@PUBCFz9|pgotN`hHGEdr_2%se6+K8M5WiN{2-&k{fogOT z6A};;nYXsx$(}G)7}h8gR^-dper34WS=$zgzRnR2M}QWfG5Zydt`6OA-|MHtvHPEE^M;##W`i~PvW)GaSHxW zBP2}L#^OMS;2+rz_4(48z7g~fYmarQ5wWM;rGK*PFQOgFA0Y|KTaQG%oB=9U59pfJog18xw%)5Zc1+xA1l|GV zS|zs$O_tC3n9$Qs&_*a*l0)hkQK?%^Jy_?uruJ+Gld%00ogw@Jd3Iqb9gIl2Dz0+~ z>Ntc)E5Z15qwM{l-TU7_DD0l(G;Txqe_`=!8&SSH`GX4qHjDq#zStl9m4VZF5X%Zs zg%mLc@CQ6izyKyw2XykM{LQBJPsklcra_q+mQ_s?i4@ek z+$bz$L$UFXn3$t9wdg1j%gkd=Lk&Ufx@z2RB&3Prj(qL{NH2o${E2P!DRFJ@ZT{jV zA$uDrFLQ;mIwyNAKe>&BO{IkJmHSc919UC%(^!+d3>bdZaAZ^reQ7%5ef!vK`su#qjEccjte|E-D54q4Yf64oR)r*~T^aq1@kxPYoj#4)y$5??~Rb zr#!Irp2ame;$KH|eVX+m)L3Z)TQNxkB3V$mVxTR|!6B~3aDpdMEQ_!}<`Tj{<@Qrq zhuAZITX^GwdD5tA4d^jqydmb3Vt^t2yBc4Qe7gCC(*D{9{h^hhQsGwt_r?E5MQnmB z+kv&I@e2B}kf4z{5?|y}pBr<0?i1P&JQluz;<%(6s|xLZN} z7)@?6OBI@DZMzEj;c|ZR8aN<3thYha-XabV`0-lMFXC@P8^jL1LL0%Ct<`&;2G6l5 z2eDAr&^QCW%#b0qhpL=BoZ305+l1u}1Xu!{<*kB=n6XNGrp zLm5lMbHdUx_;Df*_wn^h&_C9)G~KJx63ULC_yr~5AAtH)S^I>fJI`mm7oijX3Uc(k z(tG)<`dri_(}%|+GIP+=dg)gC)00&i5+dUvUezligy%F;Pi6LlM;QetTdCBr{L6J+ zN>ckn$SEcvK&T0BAaua^U;N|sLb8%Q4Jt25*Z*7;Xk1sl4*f$lF^G+o^%?L4%0YUB zmyGb-F>Y@XeMw$SBzK$Huz)dS_w|Dd+E-#~36w>_a$@hmlZF<4nzGA0N37ll*Karc zmZkfnlO1xZLiE8G>3&R?V@W)Uox@b9aS~g2L$yj){0{a15@O%La`CkFcLn{Kl|bRaRG>rB3K z_<6qkcxk!px8Yn5A2L|pvDb(>0VX2gYiT$sJ22Ma!ib}G(#!yM)hh=eR*_85MHA+) zXQ8OKsV0=ojPQJu6YaFsXFlKaWSn+`W7ER%LrHxpErVLC39P&AB+$Y@j6}#z^HyPu z3hH>9<9~a}^nM+&M%7%|kn;~ri`r?6zrEjPsQm+)>~Vcofzqn@_-D`!@&cG*3+qy8mH}@vOqZ2o9?9EKytR+^>D;V7D+Cm>x4FbOOR2Go3~m}I&1A$EK*CaFsgPEH!rKp2WNWE z4DRWv{UW5=8?F`64r~QE;O6J8x0B1l`|Fxt108>YU5_RyBs2dY8s)SGp334*&+l&u zp-^eayF(>k_2EgjfG$`;x94wPHZUPFdz3D@SsI7r!0aLzMPp-$=Z`k}l*-kkKA1#Z zVQJ2H5euRx&nORw+b<~e#t(7hlhp{ku?YNKHRdh#vo$}&S9~il{PyXOc`(V zaguZB?+baZC0Wj0ouJ1jct7jgOBObuVw=E&6|QoX*g)5|prak%=zC%Zy}oUr>0j4= z^hsS4pT!Mb(fE?dN8s+Taw5d>j+tAV4bQd>M)|1EOlK2G@1-ttTD5&M7U|FIeaUGp z{(Hi#$F<`j94_teuZhOap|%GziJO7Q8Fp?&na95UqI;An9>=r`snO0(+qPbKc)WS3 zw1jWo=r505-P`Lk;A8k^zg*8qvjB`(wDikq$EV3(QbQh}j#0KJ9y~V2tf~4D`c8La zWC?FKt!v;m@pLLUEjjuY%=+e;_}B{sRNeq3=?O>t}V*l|4<)-SM2j?a8V ze@o#1urL`W=sgxBMf#Tiu+6A*mXv%|tOP0gRBR~|{-Ts`VEC#uM<%MRL4jkPHi7ndk+txC9%7;Un*cgfj7g}2$9DkSzTcWb4TDlU~uw<;$BrS zj}%gL3`Y(-jG|klyE%aNm1hWcN!4Nu^A5V#4=8(tmgh~|s?%i+FjVLn)TWEkkU{a)1<9GZN&L7{N0-Ms)h#Iiy%j3|5QKfW|t~_0baJbC21fhne>Bhkh3|ns;B6N;ulqy zps1e^5e8UrQmH|Ds}$2vK~?H_U&TWvBfz70MD*xks%bDP^7 z-#GMbECRkG3TMx*;6>K4gpw9-ulZ#ggizUX%+HV^4!EWCZZ19`kr5T+6B`ezGk#+O z0L+p+cq@{Ed2Sr_@zRC_f++G)S&kzE7^tPe1{#O7!2~_NX>zb+swXr-mzq=r1fhDX z7y}vxSbUMhb^_v2dU!clTTMSMHA4o(_`*p1^s(HbDTRd!r@J+Ne+v`xV_hwX_VGU> z$6L|o9ALOZhO+BrpzEW;Byg!Dj&O$==)dN8!|jPi*7mI&RJz>78F{{rS1I8U1<$jZf zlkKv&yvgQF`o3Z;JTHTbbB}->URv7RWiecgJ6hnsughk%k26|ur`5R=v~~&Q@EpmO zoasA^^B~g|%i}$XM0bo?($$>a)4dTeuJ>D^W$}JS&9069%tp;5ms4|o$rO>&Ardwi zjY}-B2gbmeq&3s&Mi()71hVAJW~s3du?7JVE_ewtIIu_5z@Fr2!V4_v?;W@X{B%pV zVUH`Uea!`)ReJosZvRp{T*AE*U)RDj~g^0vyz@rrz+eu;H22DP*K6(8H}4>8oSu`voqSXo;`)Fi%Q)BXTp^# z7*cID6_ds|7`~3~88zhEo*WRre6={i9Mfa%C`2r2y22~nJJC4!U#z`la2!F?CMafR zCd*=$#mry}MobnnGcz-@#b7ZrGqWsaW@grn-f!b>zqpOt{c#aF6%&!wm04Mtl}}Z7 zb?@ws`Em_x-pSQ3!-?wn9XWifOiF0>0PDSv?H0G#hM*?Etk8?j&x1W!Vy_V&KbI9f zEh2pGi{>WRDraXJ(wm_;;G|2}i|!*^2yK}F&?u-`A5yU@ZWhx;9o+4 znBtIos^g4R%uXz&ZL|vWfGhc*ZbrVbo1aL88R-SDSPIQ|lAp-x^RB!}848|r9HqWT zg=zmYQqQ&OaE~v#?j8vhWBIruP=h7e*m%(%pB1M~jE&+U8e^7%dGqiq_-_PS29~8uq(!qf?fK4Dos(imQJwcB7 zi}Z~ZDLNj;q1-)W83%e1sg4n^Fg?m((SIA5pL%~WdA;;W}L z#j=_L%8JZH29GcX)>qqIZP{~Gf>(7*3ZILY0*@ok#(>QfX|Bbfi!r*mp%J*K06F7rm?iOqSbt%?T3Rw;`fWy_sjnhC6be;wUaj zvNIq1S5WTuBK-WL5&Bda_pI`0aWWeY&-)#@4L=o3Hnk?=eFx1D z01w!Y1a}W|EVQMYK4PZPPZyhiQf9l=)jCOdSqAxM_(3s zs~m90>JzFfCtKbB;(ybruyJ;@Z%z&&>>1t#x-&aNYoBF6jHq?ISHzA|hz~AvORgM5 zWy;SLRjO#raEFB4KMM)%A#{PWYLtHv2P$Qw;W65{xftZnPS!Fh`HTp>hB>LCoV3TG ziY6k~w}MCf{Pb0U{Y6w<%?$e&{30^gD|0^_&8#7c3MP3h*e7*;`fm-0Ua`2G!vU**lt*RF2FF;d8@!U2d4wzMWQpjgKz>|sD zt(?BG=pXc)-raL|q{vY{tSoeQdX{GIl}siHox<&P?w$LaM*}TX9<0#DfkcBb)nO-} z>w0mnuiosm$YASTyeb0qGtJUYX(co5U+_u`tJ8`+&m*wq^EH<_vpPknx)6k5={B8e z8k+OTIWv*#wKQ%ks;pPYxIEVjo|F1zYVUTwGZ^+x-T4gtdBC}|u`GV+y0;(jtjcRN zccJff0Od)9#brdz8IW3k&M;8AA*&-cIGe0AO&5djk^ zS!YzkEOfrauIt$w&(L3ul<;E(X1*jvj_5?5?wMIOSjeZf|$F3ln%(I`l$K{vu1XdIC8F zH&@C??i|)b8Y*WVhf06_Ce}kZy9JkwvWyLJ=}hE^J`)5b$U-}l4JG+A=K~qY0c#V^ za5nu(XC7{rTHb1eX6tpJgPM&0$$L8f^#`u>Yeav3jcCTGx!L2L?L3DsPILkL{0ELp^ZCIs`E6rm$zwNC(Ia-E}V+CsKG}9ylvBT%AqKk_G!}Y((J_= zmR%CdhN(A)MLI_!2RM~)M44=8Y#((ul&W8Je}uDHp1CTz$R*K81gIHuxE6r+MSdTxb%&xA#LP!tPhDBhjxVIO)R~hU6esmx8h* zYM=X%w;*AU`iKcs@bL`eRAxJx;!Nm#0G*z}P=>U?e$_{8m%JJBV2Qu92b04WkG05u z#f=GX0FRlnjW83;H1R9c?Pmy$6Cy5{@L7x8&~PL5!%}Yj84?3mK z6wr;G7z8nc9&~q#$KDnt`8U+$F`}6a(%%v$>I`eY+6x@NvEucrsf}h%1sfA=XO@fcwYFUexspfH zTjL!g&UCkw<(Xe?zoLy7jQZ20TqL4sF89#&Z~H)_#3Z7{B#>4G;}yYthBwnX)8r@4 zCOpk4Z2l_df`d=|TIb=vb95Zcv>M|bGc^6HP9efN#xgigK8Av>?vO0AKnxw(LJYFE zI6_A?duoV=vFyasC~BXHK!4kb2$Bx{H|sG3ndQ{*0X@u#oQXsOlIWn zfg(AuY(WHZ4Rpdqtc~yt8*9dGs#u1V_Z%>v4xtZRJ|nFi8}eiB?Hd-uUf8qDLO5|b zIjFo*wycXF5F8pZV3hA0hQiL;v-CokaKY;8f4(moyqh9OP)-^V>$*@d=Pcv=fK@lv znI_jwi{ekPHF|g+=V!;CF`#tbgr)m+X5tJX)0?=A@&i`E7=D6WG>!0wL%oggPDhfQ z@9}7jmzai5Tq9_{>7;s}#$|YqfoQ6~z@I>>I!qI^ym8qKF7Nlm9Qs2OR}tyude*SZ z@vKa#P!>&R3ewTDo-|-RNE6w0%l*T&poi2|m95;7mtK*C`=Cr1K%$#0&_D zlz}WmFBo_JBNfZiX7%^;1z;vHRpd;`{ZC%h%vf`hT%5Jd9@wB|-B*KS#xE3W$g)-I z0xcuK1m9R#U+p5B$1R7L{S%jU3?QiMItE996;S3b?)9B_aB5QNIV4W<0)GJ6Fkfus zLGx!CnmgAD4lh3JcXUe?{vP8tj_VcdPAO=8Thxe z17>%h>~k)a<>agFgL5yQPEE7NDV5r|AsS8G4~kiqRo6)EoZV)8zuvR4nnpJ!0^;)e z*GHP=UIPg1x`3h3ig75SeAUC{ID4GKA4yi04pa*rPshzDfIxEa6;(j7N44UL>}>eT(_&ksn2>2F*2(16MV?C^^hIs>E2DyqmBX>M3~3Mv?_i96F45-G_NgZF zFopvzK9??z0esgaPRH}4Gp2!7X!z8x&Tu$^R1|z-mFWYx#uk68+tGGHftTqEoh-vY zk+_<0Dn*O?%a8hZjl8ScQOvy&%eV&pg2o1ssNiXt46@Zs_`lodCRDty0@i%uNImr1t2=|K7Z#bF zqMdVeDV0*`skIL{gswM6DEmG6@ZQlav{&$!IOMeB8}T|Voi>)t{jMfBp6%ac1J}Cf zM<($ocUbW)GPM7i6h#8xs@6S_>c3jtpzGRQ%< zb4~BJCO{|@vzI_Xqr2JrR)5~}ovJAdP z{G_6s+7Lh+>BOb%PPJl{CD(VJ;EW4hhT08;uY(`tAkQPX^xOY%l4KumuI;>vt?jHv zp9#I3i2DS@z647o=F<{q5-(=vxH^GFE>rLJlN;wpq9>$gewS@#!vEPGQ`IYsY&@{9 zc=ob$?RgDUrXeaTDSMkQKWFW3@~{7VSl~DkCM6mRzLKYiFp-R+{U;K+NYItOb1mm} z=<@K6D7mpoI6B?Op|9Chf-V}D!;h(0JBk5<{ z4OX}l8A>D;O_dDJ;WHt-9g;f80SZ6(L+`>Ijc3T#|O zx%h8lUpa`Di*^uj0XE#sVatU(!0vB`v9gFF9^+F0q7Pbl;zA=panx7Cs8tr3#I}jV zbbiI5-^SdP6?5{@TJhmxM;sDkG5ToV{-L~-S~BmvnTOuZwhnspo7BNH-bZnkleJ^B zE@}?5|M8c~I*$M`LnawPowp>Ox(8eUelnBMnUzZ(uBu;*GMT5*OH6)bVE5$185RkDhR3u0~ZJ?HuKfgyy8=s&lW(M`Nic_FA!Ly|xWk(RKF~_PKTz2*EM;94pe-j|SuS6>C_bT= zp9gRL-*K?MQ=a7513#+LZ;?} zcIP9fBDL13fgGnf1sxw4W!I?o&~aUPo^?W3e@JF-|RlAPf- z7YqN*qrS}dC;#kdtl)0k*_HK2krZm=-HbalHe<|RL^Rh<3$SCw;RBImCGpDi*(Ta^ zrFsJ;B85Wz0%S9`MXQoX7!`|_X2+k$nn@uD6Pj=g8`oL^4YXMnFGnf5iRJEgyeXe& zuACCrM|o=B_>%qqD$(=JH^cxsE&N>msq%eB0X&W%=`~wr;2kZF=_{ZZj_H#Wn4~!# zYpj<<=1I+J6#}f|y%ke}0lYtSO#;J`l(@+|j4+*(9ozMC36}c`iXh@QYOM`0kXifV z3!29N@o~+Di243}nW%D zdz%Vsj>pLbd)9A8uz|n`bm9?)gx{y4Y&8hftyZGtUP~R*OZ-GoYbp}lZ_QC?{T>2y zPjFz|sxj8kYG|ti2LCu$uLXzxc;|@3#{>aQd`it(z<|T;92X!`s%cMLh_hbZgjaBu zMF1C>(YF`dhB;2gg+Ul!*jmU*unArTiE#{S92XOGP)XgO8zV$fu8X6A1pMyJZoQ`s zb;U@zc`JX&NG?)eC$ik4Ha(qm`kUI3SaR~k}upuOf5L47dZp|vA5?Z_r+3M#7H_qgTqw7in!B(Mk$>WJQh*Wn~M#YQ6pD}Ea0Ln8JV=tUah zj+fvh`19JNpGu$=cZiD7Vikg5Th4QndB{Gj2x@)3R)!ld0+oT2CehOq_W;>~)tbB( zvIVj)kqWI~ZCyhO?oVR18LI*xj0+cR^*dODeJxX1-54N=l?6Jh=Wgly(NX4*>fle8 z*q7K7i*(|&@BI_WPj4#2qfnS@96DYkD^~USK%V(bGH^G82Gs5*i1$c*1>SZzGr$rW ziIX!PH){ZN!ES3$UgC}o!J*C_o0rxNj$DV1^w~Fb8?>PM2a@*bv)~OOv|+H?%>Xzb z@eya|N#SNLf}0%)g${4TdYtEV`F1_(P+hXPOsD)tEGlE)G(Hx?G?>K!n(jf#!llpW zSl7qCjSui#kk9*}&)YHZ6GDeo7FZg*842l4MdOO0ObMEopl6FRmf~yh-_dey#E=PprxTqjT7L%o!7+S6{PSghx6t zqzakg;ab(Zlbv+N=@`;mH=3e)ZDlI1E!iUZu80WNBB1N^{Smsn^1Xu`kV4)ng?1Gi z-wKLMU4mbopa24KW{3d-%A?K|dgEx-h^e<$!w(WRQRF2ZVqPdDfq>2<}0T2*^mj-8SW=QQfUjjDnjzNCY)qQe~a#3p^ch(}gMM~-fnFmusTb&>e0&^xR zM!H0KjB-)deA;oA*ZsHmrB_z?1xbo(&2Cbq6t0JlbnG6Wh9Gr8VsVaC!k#Z$fRR?FrfU50Xf0|5n1$JqVXz3UQY=M;MRmgIe|O%8cy&tw#xz z&tEzsp~o!R5^&a5{Apdh5rAvuTuiMpVeTP}3zm@UOI#NB>i0hiV)pQgGd+(7kcDzB zCNK*XN)b>270OR=0hLO4U>)MTb(M!JJ`WHJ6$TtXwz7mySE}K6kl3U#VUS_G5ZlLn zwM`D9ZsUD_RNXqL68K@&fL_AbD*N9s!>WA(Vd11Bg!=q3;@LG=tP5oP-0nIp%Gq4i zlbjtE1I~oPLn)T8;t;l0*kVZCrfpRAAmXcHe+d%%*u#>-_2tAsDx*%tKo*?=TOg5* z5n#}|^>*qoOe>??YN0@W6Ns;*n-Hl1)}s!gbko zD4jsr@Yzr>eX9WA0MIAAq(I&5f*XKV{XDeUyLD;(a-T(A$YMDWh6hm_jfXJkoaNUd ztmHYgwi)n7DDD(E2uaSH6lUjq2Z<& z=42-*so}!a$Xq{Al~r@pmc{&J;DPH90QR*9;tF+lOz+oow*;-BReE}5Wn_zl3M?M3 zKvF=KS~%HhG=U^h&4nrei-Kb#!8BDW28Gp@n(b?)#XYY<+@b--P_wkrPv9VlD)|Do zTWxtAL!EU-h93p8)4mZD~be8nnozpIOUx14_*G;THs`}N8I1vMDF5y-&RCc=R*l3 zJm`+BWkb2iR0L*rjB=?C32<+W6FxkkN&wFI+gu;heGPxhWr(_G?&T7MXj$^5jBsIK z6&m2|B(+Z>t&`W!0QV+BC<^Y2VdC^PYaxOt6w^Swl6O=Ys<6}$Zbf|yehGmZrkoS} zA;_PbHx2R}7%ps!9QFXnm~&beH7=5ApX~V!B0Wq=$!u4a5caFlS;qQ3psKTK{DcjD zx@4plspk=$5%cO4$h4!<)Ry;`wP?oDD89*fo^D6oD{LZJ*f&Bxz z4(0;3bDsTdues!!9{$CxJ{)f}(3hj&P(-7%7tVXuw1j1^oqK!h(Rc9JX z#HB_>E?DiEQ__)6OUz|fd|TTpOKMjjG|+V_r9|9nROEwwkmBxtjW_Jl^u=pde4Y7! zH29&rD!We(ba0dlFE?lCh}0RsD<%F$p0OUQ<5BCk?36v(vAxs+MBhzf z?hhLR|8(R7byzAT_UMvZ*)XX;j%*ZRHiwT|@n%~Tm&E-8x3HUzW?Szd1IxK`Uah=f z*0S06ejpJHhIc;a3shtB`}b+n!+12)`c=}kMS7`QJ};0KXLCWkY11O8FAW)}{ls}v z5(V?uk+&~^N@#p3@qz?b0uQp>@)yGQOiK|=@PP_Azm!iAtRE~Nu`YQ+t!{ffoG!nP zT4`6G+@k%;#>RXpiT}N|@DR}nv}ATK(E9(1Y{8q)dm00gk+XZP)=%#FutA||RU^9_ zr4c2;8Q0q>;xDPNfmxCB+Ni;?Ya|Fhr%>%vzB0?!HT( zpAIhzEGTZ=Sv#_XKyJ1*l-)b1xf@@&Rwg>ub*iFkJJm>U(IU?yFB`^}6OGmOV2OAW6#Syc~Ts3#Vq0Y|DTF>=pk;GRn&5 zLElDYD{tVnO=2!UhE4002--O9^E-etn`0Dqw~}7f+jvU5K9{62&C$gOdvQps;dVVq`?dV zx}`|HKn!KdI`(uxxES<;lDPmkO7^U(8T5`~DQu6|o7zP}PV77^poPbO#iaZm*CGUY zg@Mui{8=847iTc2IWM6pL`&Q~<5aL&gOM6xjN zzq;)tGW&>Mo{Cs#J_E|0gcpkhQZncJU;Hl&_2`r^dA|b80AIUN8NgpL=&^yiJsC-M zs}BZND>te6t!_Q86@UKumDub3me)SJjoNWLbpCCr{~)QO;MnV=n*D``$usxF({ng3MPCF!}IeB<6KRv?}Mm53?@f`i#@T{Sy>4;Gg8Un^iO zcuuH-Mje?cpR-(|rHw=8^zRCxppLUZF_8kkg zrIWIwH>tP@hAbcv@|(8t=_OxcdokmS6G{^A#JvIv@tsJ3PIKuJUZvU5xp^{h_5^uH zE8!Zt5*qz)7${6KY0!zZ)*mSB1I@68G9T4QiwOx`>1!fm-^sC6hv762VaOZ0v9$EU z1UhyBLrxh0*n#KBmr$f(6D@488}+)FUNRM(ffGb0E9YxV=j*d8u~iZ5CgAL1nO+T? z#>|DdQ3?R?XzhbBXPXtTbEFS{ns?__SrISg;h8IiSjc){zjDt~ZV1k4vZ0pdvEMQi z4K}#izv2*_?ig{teh}{;Uuah9on*8QFHFH1pt~~(gxYf=1bUM6{UCd+H1IuqQu_(9 zPsw{oOf7$CfY1R*&QCdng$&lKlRcI=4aDFev&HW?AhF`-5?9jkgbTkl&QPJs%|?^` z10sQ2hKlgazQj?by)`q)g#BtMxcmYjGy6VAehsO@Cl%d^d0^^ffL-I2W#iS^)t}UqfRyHmS7r9g?xprJ z-H@2=GNs7((o4ymxn_iJ0C2EDqVc>Cpn;PwyR?V8^OTrxrTDx)NGo0g3b^fDaS)Dg zzBn+PLI^cNYc8~c&st!n=NT6`1j)Q0F~SM907a!h7r*O-f>YNc(`5DsP7HI9&Q2#} z!3Y4;A`l^NFnlTM8qGg308+0^CgI+zPUO&2S^ zq80`ax5m^|-Vb_LV1K1;*x~t-FdV^rS($ziJSSje@=Jx7>Ts~?f2v~uU0wluc%Jsl z2I$Pb;+bEVcb0TzQ79KbUI=tgi5AMY3}{-ArwsQ{(C)+kfYH7DoauR$YkTnD+4Q_X z5_qGbAU)q{JVY0iDS9vf;pc83772OT^XZlls3$g9?~8gb#Rf`Z$0QK_-H&4t3tY5h zmI-f32sok|tecPacS(VjA8Rp!S#Ud{fw6ba2Ukf zkpZ|2dY={_A1R{xLdA~%0e4~u-4chjD7rH(bOeba);a?nER(u%_3$04lV1H=g!9|#ieS=qg;BJ zL{ilUhQXp}d&l@^4h;Nt0$CU84z!rYBO~AOHNK3`bUypDboQED{i{ANAL@0Iw`Y~P z;%DoLlxqAfrLxbrL*!DG7`hPI)>`HZ9dbooj1d^0Quj~iIFX^wlUlLO@m^!|HZ~OC)fYME3lZkfFB+eH?wp!vS$>x)N?cvH8QX< zG-CW^WNqSTO2Wd#%=ABRY-gtZti3Nr4LsBiQpq_`=55@LJCEKF3NhK}>gvDV{017# z$#=9$;71cN?(XXiU#NXy{(TAapE7+A?ILYcEW_nn(s;|5#owEyLwh#WbxhZE1>Nq% z7E4v#6=5?~N1=mJOoPt&i2Lw?k?L#O5tbN(o>~+6b~+AAa`lIlYp`Torl5UKBNH{K zA43#luBv&KEoGcCyGq*<~XM{b*KF3|^mOBiL6%#CNGc5aF`;PPX^C?G-YnnYC!O0M&%Q*(oAp~)iB z96Mn7WZCB4Re4$1`6lKua1bAn(AAFv&!<#xqiIDjBHRxpNCj6NRYQO7iUgfAb_R1I zvixT$0KV7g_ZDTdA7FtYLcHQKUM)QLGM++dn-p|I;Xr*97TFh}#0lAT zF)syrscwyrDl&BdTs%#kx7(h=^cuvYh0U$ISeFPnl^z0|sJdy?_zJ{>4X?RZzTZCr zTBa_%d^!~}rGw45=lfM=MDKhtCHSnk1cd+3R=2`{05;)#xD@q0GzK$>k{snIeF^x; zoDwQxeMi3F)F?PF0NS^|-5~TWWRc^c)sP}16U0oZZ2G)m55?V<6do$!Ogor$mvA@M z;>B~Z?8XDlKXWk2`&g#J_1CDkBX%$-D%HXi={&@nXCkM+@%z)&jUDiaw68J+85!f7 z36gFV_5JpiB05EYt)-!0&X#1=V>*>7kyRs?3uPB!85P46Pbn{}x+=NJ`u%sf{5cPm z#lNSm#`!+U`>m%|p|3x9mT`VkTzMM>Up{`kl`l!uxCYvqLZG@RZX|2=JFUP=F~o8L z^gt`$wDc764gLJ|xu0gm>(JCnt55pTvyhqpUu)#ZVBP^#;{zC@z!@rwF0=tQ`jI?V z$IoB=&YyR6Y31_eQmpDdyd$>rmhKCNF-yKOJ1v+|_Kz{@s1bY{zS7GE$%tb_IL+TZ z=;AOM(De+FRjBA`ASZUyjR=N_RO~Na_oH@N`4*Cv&Y3k+>CN#~r1a0iVAd)sXy_6( zvrKCbUc75&U!Z~(!q2{AVibKJH%=on?fnc#z~Q|O?|wBqd=B^$+M$w14z{i1WaFn zm<0B4YokJ`)N16xNi&Rp$gclbx!?489TNBydku9tZup>3`h3q8_4H`c)`OIJ zsT80+8Z*+0b7<+C0{h-;n78&|;g`N?n6pkkTLlSu9E@4t5)x$o53JEA0jEo)-mS>7 zjpwZy7x<)0HCbS*3r6G0MvP#IS2>IZAY;AytRGEv&*%IjDC4jT@00*IB5bE$fr)C z(r$n}2{Lp0w4uBesdT;jVJ5{TB)k;V3|4%52Ml+qPleR@GXpVx;eHEC15ZPYIiuWS z>3|5uMBdEb%Qf~qv9Tsvp83I9!_Abx@~i8Xl%tvrIIB9kYxAo+0oRRH)-#l^S#~S$ zznc=FFE4LM=?+Df)$I6{8DCr7qoNptzza(zd;AcwoeLaX-4dfPk4s)ch+{vndo$qg z&rhT8Hkfas?^FYO-1q{SU77-{;g$csIGt4&;b@KSq<=Ie1f3+DswC^WJohuF9Ocuw zSzBMo#$?r;+)b^Yzz<2P^+Z)zU#`@kU1Y++uW!tr3fq+eziI3pzLR80Fn&4RSX*c- z(UlP8+A={@TX<;%KOi98Y2DXWSv$M;TT>++A*>q3Xxb@vRBb0Z^9`d`&p}ZU;h{ z$d?BBlNT1^Tn4=6d*L%K(hfcMAxl^Mgx{(?<#1vyo{A5y=UA}&f-LsK7Kz{d2 za5$or^YjiHjQv`2g}gtu^{hJYH@$y_|K~rQs$&ulnVa<|eDmfQW=A4z;@N_qYkHIV z@`*r}oHcV7(($hYryAoE0gL-zhvqZ7Cxnb^OMGwU0SVRF#h17#;9*++?3K6iK@@IQ z+`cdup+P~_43E1jH-nzwN~>I6e&E-ERuZZp@oV;1SEHk9dL}I+M_(09G^d%hQH{BS zwJbuwH^LG3HQqATt@ziA%wr;KZ`^!{)MJ@x1QM84{$j~O-=;+#i|A>1kx{>P;8A7Q z^_KFyJefknv(uqy$1D|FSFQL*)l`pLMjoyY^c*Kq)3V>4ZwJ&Gf{P2N8ZA-1(hi!} z?dDRvR2}2cjExV@C5~blhy^39Czcbl99WKP*$WKiVdAcBUlv_mJH~_+nRk&G(9yBt z8~mh(M&Zd+-adHxZrnrV+0bk-w>9R)ImJu>Z0E=pI;<$ThQyIhmNnNvQzLPiBb;!m zw1w~qZvU;r?jt2O_ARps@b+=hvZF;DNR&;ET_8v8b@UTndT3z*No-anME#Si?hQM( zy@~CA2_KmM_xHvBH}HX(i}Sy|K{HcbX7+m#>e?%Y7uc_N`EIuM+KOpJjFsn)Ny8tv zt!7|5QW4Lt>#@p7%1P5y12}42mR=(rvdEL5(J`l8|^F^&4+zUF(FBb1f2%ONm(S(?UKHLNG#I@1sPK||E@d0 zNSdR)9prme>%4QMJW#0t8PkD=awSt)$)$rR2WqN%yG^>$w5=D=Ln7PaKGI)P_6=kU zLO5AGCmH}CgB7>MkoOKVrBLZB=ImjL5da0VS4yJ7%opzEPE~vZ$7p9`%d`FApNDw5 zCEOj^jFs074oxM0wa{iqpM_bWH3palCrgn<1~Y>rB~kok_R_6cW>LxEPzC6+?@DxJ@G#QNAdeSC3vorKM3HBBUCt zlL>TYXn0GA#73IK7tA6q1lkp!pVv34xDR~JexeVYx2*VQj%}c*TMk)0Y2bpq-HK;* zkBL(?C^GkHved#w03ts)uRNZH(6ojh1kPAvLo#zOOZn_rpv^jGujZCskWy{Lcq-iW zR%Hn=Mdl^d=+)xV5WA+D5cP}vQO9@1X+fy0?#9Dt^i}< zsxik>53w^*9Hanxr=mW%$#4meq{Pj|304y-{wxH0%v*7*YQ4^?=RAWISbjwdRaAB-l zgzC&a*8G4_+&*5?djSJIF&S2pXV|s(jG8U*2G?u=u}ZS1?w<_iyuuY{PsxP9m5(cc z_Kbf`C^GT$gxYCI3ZVf?k&<=bJYOMgZ#Cqa2_1}LN`Xu7$z!0k8UnfqlX!t?*c_Svy#k zW1G+s2Hh2!Dm}7}boyy0PlRx?rX26;LH_6lXl+3|n;~FUziJ}(aLc4?yj07=vTjsv zOTJ_4N9f*GRICc^yHaEu%x9fMN2c)a)BmPr$>NI&uzJm^G%=fdONO+}n{|%!hpYQt z%y>QmEl}7`Y8IhJ$&OXSe?PX;=4>zHzUi_8P`l}g5~G^(9yqKZ@MoibrQz^V<(ed= zKBZ90SW&cY)79bjSSnWSk)`i|an3V9J9@bWGG#aG?@H!+pWIua}~JZ+kJAlT;L=;-z)$kq#=hkg2FQ5CUOBQDR+59TOywT zhn~0>hf&LjeDwkBV4qrr`^2P=4ZQ1lVxt618|PimxWp9mr(+APX#D(a_CZC^N*Ma@ z3Um0m`$`85o^r(jNS{d4oE6n+4lG#%>wOw1WCn1dzDkqOOtd~|raGHfiC&^+OTIMvhKO=6P$C}JW z=o?~~Bon&gu=>>R4k1z=dnEBcEoa$%uE(~?jFXzE?<3j?Ap~S#o~n7Ws*=VCz-mH|X>UmH`XolY<@YSD!aP)D zrRNklO$jcn@Pu`Scn(dtyTli&aawj(bQ8VtA!%(E`CsCM|AXh}{x>**g^7vzzil(5 z{#@Aq&o%=jZFj67*y>gBIsb+b@l?ByPj2Z+88lWW(H#9d7#XX-r*Eq!9QE9?A{E=* z9@`U)RU(FcEt9<&DK>J}-=J|i#uBJqora5^QJ8;xkf&JgGOUSn!Y+04qZkax9f8Rb zpdBGx=I{;1X~Ve>6zD{Fw9GyI8isj63vIvdwzv%PcCl$aCYq;1ekD%VjX)sJ8~Iac?&oSrGK&B~T*8yju~1?x`8g+q zDuAj$OE);AwDPp8RFg=5N<>`9s@u8nD+;;pfRLzB_AQpYMHLabS{3LOXM)j*+N;z> z97s7iLBAnh4rbq<4-55JhQtXCEB(>321I`rwJdPYS`uY)BrUmE76PfE&a(V)L z>jR^f>(fI26tPpY4#b=B7)E?0chEd;_UU7=7+mRA>T6PUHtl z#s%^1)d&*1G<3!7=cM|MK_*4DlxoRK;%qA`{3#75@)OJidUC zsG4l54_qackf>OfDm;l{9tN<0h7d$$Exn@=s=rX1_e(5H8i7sR0$Q%pzksO>0*z|P z%GtGhMI0l*fBi2NL;9ifmfub#U;J-Mh*HB+X#sh)Rb0rRhTj$ml4ZUAz2Uj(nnqRx z7BVF&^<95=dZ;Y!qkS#n3%-l1|HLCl8#0-18%fj#-m@{TP?%^)3Dj1UtVxdL82&MD zYm8D;>i1?wGmxhojp?uIO^z8(BO)PHnFvr}f)i1>`iEyxB;3M=s?^*S{oCIO0dM}<0#z*MA*$%nZd3Fe1goa8(qvq){MtIt&xFe7n$Yu?f?k_7EO~;2gCMtmt zpqz#|%N&(ffb+@Nl~JHE>3_&(UGj}Oy7d#H7-ZfMwMoK#|6#yizDHn{CHfdeOgp0( zUgsm)blq^oE^c`)b62Jty1^06AWFGzaB7pc*;q)o!?`HQ-4QC=I+(sGTGZ5kViP|r zt&dOKlNEh{HB_dnT1(q=!Tf{~*+}#*Q}rhgzN2)0X=87P6ZM~G!kBafzfM2Z_klAT zeXY>)`sR>9#R!iy&u}|si`)TzJ*&N=Y`o%)Cp;el$*l008$kOCS>plMB9{JI<9o?K zM<-uHbBS`+zPDV#kC>7!rtJs&5?BLkjH$-cpYSvsweU14I6BPRSlC0<9|y*oEh+_< zCA{vVOAi=6O|?6{No2{_gZpIAO3rMKLi>P{p+<$Ns3dQ*oQOuHmAl_%KJguJjrtxH zzVNk=G(3&U&Yi2%fJ+9|E~RDuu}6I^IrPw(MnF5Q-xt4i>=<%+#T4f-^Krt>iOxLd z^?T8K$3)d!^P%4*+1*G%cR^;__+=W7M9^Dn&A`uJMbWW?7fdx&PmjD;RR(kB;UyW- zVvXNcvs9C`^wVq%t!9Z1@t0Ti^b#xZ4F14;cwyixy?IJoZjSXty?PRB49At&E^O{K zH{K)>ar9t8o+ZQHzWy3^)%!fhyAdb_7)R%K+I2jluig)~@R&C;?lr%PSScNGfCBrNh8yZ_u$a2U5yx=87(X&X3T=a6Y+M4BAr zd)zbK@PfkqXdnEG_x?{cD_Z}_zTG{(Lp6K5EkO6rrHo4UU8hQZJ%)$Ju149=i@36s z&PMSDZO!FmnB3o{h++Q|^1eGGHd`Py8OW zQe9#vcGq1|$z~OxjKWkr=_#>}(smi@`dwLBykR44y*k_Y99#DSJXbI|RjIM64WI4a z&|Blxe&jUjo20f1(zS0^+xnVwHFpBwdljDuQfvKuczalGtoLsHp+US^rf$@)Jy*YD z*M9sgS+|~Y6O^;at6A(cb1RV0(n$8dL=CL}f9x*&_;08oO``U^8CCR915yQ~N2$kB zB%eK((9v|^^)lh@V1@){UBIp9r*E2|ib_v=@&OEWeY#>XR(T}a3XIhY0#_1~Lu0H3 zys@_M1@*XwJJm?qM0|Li!RU z=qKI*H4A5{YR!zs^Z&)#I|XMFwrzkj6HW346FZsM*2LBu+qP}neq-CVC${ZmV%ysM zyL+%-)mOD!wg1Ue-BsPyCtZDC{aj+=y!mZ}g#BK?WO;>ES#upU2ZNn&A7;Gih6RQF zuFk&fy7Z>I8^H?C`p2Dp8N=+be#LCq%eZ#N1_c?rqc3Ec53~Mfs@w!2L6prtRBTUr zJ&YRO-=DvcUxj23{?d|2q1yw3N&zcw=EB1PWa_CB@P)r(DMsbhQK86X3en5!sn&H4)&qsUmJs7an(Oe|G9dy5-{sI4-#gl4&5W#mZjcBu zwSuE3Bxw!vIf=Uzl*0UR&AIaqR1T~BX9MnwqN14Vh!Wprsal(Lg~V-{CK z_(LrMnFk`Zkf>DN1a^t>>u~WboKk#A2-;rxkirmdIEG=awPZEvrBhbcS1IR;BJ((8 zB*@bj&mdS{;)m-?7;<|O)y=`*{Dt?w`H5ja5e$z4p@5u`@TL}JO+}baflu`%4MkVk zKA#V-_|*6;goROvm}j3KAE(uyAEz=W3oVZ&6rw*qI-v#{v)obck4A{(K4$t#HC!Us ziTu4Tdo*7=p@N8zrtrBH5p1~EMTD~PiKHTr7xNV(cF82{G(EDdYM)qE5^+d`4ZY(6 z=m!3e4(2G(RFYwddg{_?~pmbp>1T~xnwJ@@f~iIl_ie~&4VcW!DeB32~N`P5HL zp;2kVhERr_a>nWl+%x* z%&f(CqU-~cb2~vYU5%2cArd0W}-HSpLb<170aIj z(RwzP3n)%H?9QeI_uN4PXsdRT25t$OAx6&3ci<{+QMP}gTK*JU50JxS$a(RqZq7lY ze9V8pi?3JCPn3{(`O zi~qezovr%ht`vPU&g-#mlGW+#IZ5T~VVF z$Nh7y?qdU9cJaNH)R7bN>n?s2KEN1`UHe^OWw7vrbordnkYJgJq?xUPhevv3t*i#= z%(`(^oHt*U@-uSQ!Y`BX9gtrbVOIh%Lz8o?&A z`Q*QX1m^z*kig3NpCCb^j;0h&_!Un$`Zt`|KPI^5(W)z0%Jti~PG^zljRa!pe=QDp z=+j9JGf+2;^j}e-Y0Z6a7(v;q@G;8K88>ng7otsnxE}5HIHFIKqvOv^dp7l@df&-u z@Z%uKDTrC%>;2}3Ls$|(xLJG`lYi^`Pj@B|V**Wi1z`Hd5R=YBm3t_TOW4J6+Sd_d zqW!e~eFZ4|dvg`*xLS&J#o^WgVzz+vwJycw-!Z5Ol%ji(Y%B z1yVJVTlH{)V32*V?Qi0_v?IHdnn0|Fe>~RL;a8h7)1Cr4JS(rdXAI$0}Wxz@)?pD`a~5) zhyrm$DGC9YD?hk~g=8`7WXK08hhgXp`6nY)E0bB1D_GIlL*bQsM4`Mvqd@{tNN+%>VSjs1T_I&PRBeR| zMO1)NWKmA-A}XCC#Hre~e?U=%Ae6SVvIl9n)%K4gF<8cLxW4dT%XC(QENY-Qv{s^b z*qsHg+LT&x4%l$6f-foMY#|tt66p)7agdTDIbWM};%-Y2`s>1TEtVpL;g-t&K`=3?2f;by*oMJB19+>Iih%?Hdgyo>X?ZQ7@kJPyI9biP z3YC8f1!m#!j||c5(Us`u>j$h7Ki@t42)1jEK=kp*jN!s8T^43Tgq2 zzpX0bD`tCeC?FV(g=YAba)&WvS>%<@c4=ujZD3j@+J$s zRV2FqC@udJkhqICpZ`~;Te*k|74Ovl*Pv(Dy!a?5q9oUTSe3$%Sb(;K3@J)AXH&79 z@S0KH?3=@|^1{CY!i~`WEeE2E+3V)+kB3K}X`VC7GLhYam-o{xpSSC&?lgyP}u+d~W)iZTwfe z{bOoGFZp}zjLtbZl=u2(rwpO72)e?7m7x$it5XRNQ}JW!Zu!Z;X zPFyOJ;s7ecokz!Q%X6Dac|7T|{!iy5Sau6HhX-p@Ym^liLG(#^Z5jE)ft9f6AS!9v zd3>3d3)!r!^-5JYMzz|jy`(xS(F@?waYTZQ$sW2)@9oM-I@x1yt*s%U=gu%F8X#j0 zRF1aI{c}Enm^OoXZG4zH8I-C(NHgBSSy#uT!r7;Dwg+^1z~@xDJH$OO`J}KhNUuD( zy5vNwTF)$udgg?5see2PrfNE+Skshj$~D+O%kNler=l`(^URRb&e->MEc!U8KA7 za)54x%LX*HwD=qyO`ZOvi@8mZ+Nw2^!L3<&3z;yXmEX8Axm&nYuqx{Xa1<+QOgkMq z3@8)Oo<&vZYZCK3n}0&-$X--CS|-?0KDeiMlNs!F>{#%J%)pCyu~x!-&3U<2 z%KVe3w3Q^gu$$qeGZPIzGWx5j$8+lF4qls{!=cNS!e-9fy4N82-YWUN)?SP&cLOJ!J z?Ity#J(OWBnilJN9h`CAl18^g!8f^PW4(a3(4@~&|94is!s^s~b;qse5aNl%3MFdZ zjAuWR-(WjLC>Lsh{nVExVe5y3Pg7t--%nT;=0#j(wW`~qB8R;?1Rp^ z5gD3K?>&8V98bKQ789qd0Hx9_hKZKrf$c>~^?idS}G z-@?Kaoo?L&iT2guWkgx)^XG}ky!(GeZ>n<<^2(oi_s>RSrQxD2qp32|i6SH+P`w`= zoZBY(mWR}XYx8tKeorC_BIa8}R3GOvf;I%N2WJHP4V;!_Awc&g=#~Ei#0sy|)*22% z7F=+jM+rI;tyCL+Hq8a3^4m-MuTDcFJ|8jQk<@J}B!#-)QSSGI60{jQikRuLi7cxT z(+;LUjA}}1m7GPyV_}t}A;$JZCguCCn8cfmY}2#GYUqN_O_f>xVGQ4gjzA)A7iRDc z&Zn&ErYl9FGBVoJ*2y_=i$RjX2oVZij0i%`0%PL+gcl%*&dSv|#zw>G;zD5`#30j} zkVwGxAT5S2V#nnTkt?V@41!U0t)E9RU2_w65U5Kua0~-G6Vlq&_gt!Zy ztHQ@#&R$64X6w3(V8T8l5{VqP8ERLT-fF!I{^BIL9VimWM)q?^ca~02i?0z+v{M%q zpy(y}5=A^B$UDJu2DeS3L?d0Z0v@~fji{tO-_TyU{@c%ty!s0FWae=~$3B}o)Y0$ztM9{7RL9_kQII2GuiX+8F;1BIWLq`%1d0l`1^|H}}Srq4J z#w&F>Vb~1WgB}2{=z%b5hc=|P%1^@`IF;c!o^h94=2E|6)b><)A}-}bH?5w;L^rd* zzr$SUVZpl^igv8ZV}BE@6ZQ?OC?6|ymw_V34kxC-V%^lDEc^< z=A#Eg)$==I?O%PFJ}=Mct0CECB3aVxmr?W^*A78EjNR5^TTM|v*83h& zMsGwYWKx;du=UsnIFGxi5@mqLO(riF)C;WEYH}~br(F}LFK*gf8e{(Qm+x45ZEBs# z!4QR|&xPE_FrTAG;nf}-Jt~{@ZQB;sG&{EySy)5&_}S-Cv{`D+V=|}N zw@y=us5;2`0FEYT_C!xFk`w}%mm(F`mO{H-@7w@p9=e@{(?iR3I(GnL(QF=_0`}D7 zp;l}`Gn)bl@tc;Bnxn^QQ>(%e@^aBT_ehHQy?>O4oN6q?R!zK*v`X)F@@a3L!+^KC zcj2k=sXr`Ue{mxlBVHwq4fRZfqXV0J-L)9#1&<4$;r5VO+P!Rk*X3+i{@ir97nKFj zD7J{|YUr%5tx>wCS&pD!2w{3;Q@}gVv6@#+VcdV~1&u6YoxS(QW!c0Dtv;v-lMw)f ziy!Y4rrJpWG+g%h;#-~9ZfhwTTdeu$?vn^B#d&NJXzuD4OG}diQ>A293Q{`2t!^4> zST|7fjkS6BR1@0R{ao+AK`yO{rm%*Zy^pgP7AqySyHl<5D0E^{mDY1_>N&;T@%E10U`^8v^a^)O)f*{! zHHK{H;&7we^!7Kc3;K2fYB5FOGh_BxsX51y^j-Xzi0HNHx!C%AP7crQ5gqBd9Q(s)#x7 zqqxeiCc;qV#i-DbXfY&~H<_zceAHpMUDoSj6p&`P7h?5Le2jMaB4Zl*B>tL9?D;WG zdn@I;Uxx#sN>~1dltAjwrM&02ZfEm32Xh zz_|!A{2^W^p3-yJ4qKw-!ugrnyiFpa95fUT`;B~Ct-t$gyw1U!200-XnvlR3UFFoM zRV;|y7c_1!3_Ax;u9b1qs>`)&aT{})*6OUJi5Pvcez&rOvYzsYF z_ui>R7X4lK;BJhL+22Ycf53qz;7&OpDoU$x({M&`80doj??EObWVx|g(BEXS^0D~h z8qfCqVjWI;=SoPq!B*b>8dUE4h0uxE`-xhk@m^gO8j>XFRleC+DIE058n+uv5NUIl z*O9hQd?An7n^1J@%4pZxHBozWD>8`DnwitT2JPH7J*P;*NI<=Q4cRlGUvtjy*qm|5 z>^OPOeEt6v< z?)vhFKf1Hz5!&v zd^`gi%($E1x8~$wQ(VYD1JD!wSzYB!U;~n?;E7l7S>w=h#FR}V8i^Q0JKRM^ zAOBWEoD!qIN@(D^KAA|l8VcnC>nSkk1|acn3pxtywF)}A{p$vGy5C=3@qK1_;)!${ zPDk%AKi}RTyS<+yyx?!a{T&HBC+JrPm;>z3mZ$NVumm!V_X6YI3`A}iy6FAcU(<3P zuDJ=!1?~^tlJoNu&P^1>vLa*A;l18dYIVWh+dlS16>p{-K^NOM>CwrF|Dc=BjzT-z zP1!g`H-Yk;f3B{h_rnk!r`hS1|9v;;Sx%TkHAqS~=<7C)O~7|Z6SU>I_#-S%3&Jg) zcNgVep?|nT8N4}+l)`|+yvWz0PqJ`Pc8QeApv8!o(FAhx$d^}HF&!O4dCq@*s_D@@ z$DgkccGdFH93=zQ!ad|>M|4C?Q74OWaS_;loF6){X8i&%9#r}yFeI0-VIvR)rb#F6 zC_;tZEBc`2O13{l8`9!lie*_>2r%qs*8q$tUtZ|fLuOCYZ$VnGgGWP1MLeD<*MqL^ zZQ)4<+3n|}rA@zptIfAcBC5Q~(Z3J^ zEB(C^Pn~lFP1cqoFFZGAdfe9Taj_K&wQB67cZ-eDExCSb#W5_MIO|&UK&- zt^uSYuB$-JzszlO&yU=b{%MaL0#kw4{#9xeHXK==G|Sro%Z<3098wppSDW{3fP3&!eeT$(c$7NJ< zFEs)V6C+Wx$r-gZ`4`26fdMjKmuC&>HX3#ulr4}nR1HM2!}|%DT(iODsi<5xFOz#0 zdN4$O=?y`h)a?5BewP7rE!DY*%3H?t^ICV-WCuWGsxJH0gtvr;8a{qu05`kVHThrC zl&DMKRA-!Bw$Go9SKBtslILZn7x5Y!*1Ua>8|tHD8&tsRRZC&74Tz{!?6+WqIEd|Z7mdj3il)-V8UhdX=Y;3`Q@RoW@>cD|O zx11r}Zo>%XALG=gOy1MjW^lUlh-Ns^c|WmeA@ZJ4bu37ZZ=J7VDdoAi5VikalKaWy zS}5J2#ZrBgmbU6&-Rji!oMr<4$*yzTnS@K5uM)`pt~#B2nz!j=kJ)f$LEwcqDkQ1{ zsybXbQ$0bqlx(CK5G>WHAsC&Dj%+mxdf!;_`JTbq8uDKO0^9$>76KFd|C3cnOqFW- zzXXf_nUyoR5FK^CGd&jD z^ApMUT$zjb9`czW7(aJaVn=e)VyP%XXiZ6U;%hSHocxN32E{Pu+El~;VdSp{PFaSF ze@~GbK+UB$=O^GBsU;UdPL~?47^A_ZVO>o8qyMXUIkcy3Rs=SyQ4H1ycR~c#xH9Ui z&;2a?dlnd9WR-vtL49{xUTm109+;sq)dFNHSz5R(p&j=4FF_(>wVrzJC{wN(E1})6 z%|yA#lkdX$EfmY42azx2fw-~!1CsTtv@=*lqiT@@6me*Vh9a!?RFNqpwB*3H1au-5 z2j{E_Evs(>rNsB&&%aN|*`?BKpr9K{XxXWm@VNVtvao7*Fx}vwCYw%D+eu|=peCD8 z)%WkO02L6E$tZim#-uf*!^i5Qnts#Pb4Plv@J|uxEIO%l!Jx!KD@h^^3^z00#L?wr zh;(Hl*7x&KBKC&riApP8J+U&EmEYy0RK5 zPn=fJsXBc@qJ&-N_pc%VFwymw;G9YRtQwlX3oe|Om^5Y)_>=ZVB03V4)6HXz%p2oap0 zMMvxZ^|5M^`+lgnEq@Jju5v_*yFiHa(Fri~?~(um#j*yFxB#g=U)(*(bF6*|O`Ey3 zpc@_v(%4bZ=KC!J>{0>O2UWe0xe}V0eAekt1_}fel9VC%tSopi@}2|EONx! z0xe6&a>7wqU|XX}xONQCe4J(3M@$7&ZXXFeR{AcV{Gw04IE3cz&wyQ`Y;ft;49A7; zkM|+`&o=-S`DVipAC7k)K+QQLoo)zOvApd&tk} zd$In`?6((zB`b8QCTk_FxB>2eXXjBBsnTm8!-2)X+MLr#GD0`-((B0cK9lz>naNB5 zCV=B|P4k*v;yU%D)09fUWVF(=asXPt=dk}NeEQeqhuQR%W{;dlk_6xpZl4Nx$r;s_ zY6Jd0{%}DhtL{>;R%A;xNGi=vo^2$KKB$~wZ<@78n?XB1GI^(fZf$PXXLjFUHP;sR zzBt}DIX(pV+kS=~Xjjdx;6W5=acq(=(S@XRjNWDW^^<2e1Cgx|)1=vL;%NhWi>cLY za_6B&u%4AhI#?cc@JojJILJ<0cJf872ldusP@)z8)@yCIsdP1uw7$Oos^3Djv-fFonQ#VhPaDQ=ue%h-}h*{z6jQCaL`t-LtvcBFy`>tM9$@q7cz~l*DX{sx_TQl{lK03C~@yUHBzE5o(`||Ka@m|vNNZLn*mkWRE)*) zImM*eO_nmbefT#FFveIkn$#5Pps?c1oZS~|vQRaPs4;v$c zSTJ^O{q;C=HM%WijxCj}KxxZ@!}2FbgD>7-D@4Mx+p6NJjdL%7uJ7|@AI`-i=g49% zx_Sf7wr6QwN2ZGuL5kZNL+h%L=+B$3p-zV7!sOy7uMSD`+&^rcImD<#@2RETl&SWM zu&&!-GMz_q3D)J(?h+b>#y62cN9Gg2Atz>p;$g4oR?8C8+_6Gzb+yZLW7VUexQ_4^ z(=p9?Ri6g3)*eT-E2+oY5v2;%F>G~O_EwYnswQFc0jk5QS3`IgQ;{(%d(Z=o~EvB0+7_ACQ}!*Xem(?o5C!Dq|s z=KAWjPS3JObVTJ7_#(Ldn&{f2IuC{9V_<3jrOr%HcZP(}Yf>0Xhz_fPz%6~<$8{DK zHFHj~09$!HuT>e_s5bCEq*{1;d;N~~P!_n{3N^T-n6I_T+e$GgmEA1cWZ2OSdWVWi zYliu+bN|o(!rW*1kD%YguRMf3awOryPMAtQxaiw8k(d*M&VahC`;SviVIz^Bda(@T zR7T&HGI#M~vy!J{Y#nWm#k?C(dgWH-sFR6;T~Vs9Ln-hlQV=oA8W;L7$~v3-Fiw=u zYi1GX7;q?3_TI!w#pv)#A)y!h0wkv4W#D?W;ore}ocCl?mQLfiacH)Mt7!KfLDK~l zg~|3jz)p}__$~QkzI(jAKm{Yp?#vUyzBluf{GhIte6(l`snK4iSSoG&k@IwQR z7MA2{Uh>~_Xk06e+U^L0I%j^I+}$f84H_nW)=i;`n?II&g;Xu@GSAI!KwY0nZ7)xh zOKP&jgy6VjICtLmk8yj>w$h~c9%yDvRuD5$pVUYhB`=uK8Bk?J1XG*lTwtp#Ap6y} z3Xm49R!f3gWTn>+K#lrtne(HN$mDs+4#(o9(q!fLT@MHAaw|k+v*KMpIqRsNr50-j znMiG%>j^r+&5(R7oMJ^yzGPDBy@e>S%rFv(R6;lxGLHl{cU)a2oGEx*B9W1mF-6vx zrc8biojtnFo@tmjegH;16?v^rK)ESUP}vU7XmL@ouwn~C7!%tb$7qpN#DS2gVuyCr zbs?Z4u6}XkxU8XOlH3Bj@GtpyMY#g$%~~al_)p9bdDt6>8VbVL#4F+vRGlnpu}k-x zvE<2w_#|=#4a)FH3ko?@6pG(S6br~RWHCa`B?a$!V=zIHTNo3*!l_$~BfeSQu;$-buge8ooOTK{;o4migeIi$~#@a*TpqbM$grijy&-5I-DOr!`RFBB121N((KfZC+DL78%vzNMy$oGvJ`Nx)o34N!67 zDrNFUI11C1uy6<*2wPk=f^|9E9Z7sQs$dW@KXX;UcO;YES;^N$NKU!Fz&%`lB&*aq z2E|hM8+M?-asXT*NS-8NkE_%j=5JjoZMx!_5nE}f(IYS|S<9zTrW*@X!{+pMCLTxN z$Aq1vb?`h^HT%y%+V-JzKc`|f}2wXLingIjS>&V zieLon4l8{S%=4nmm2AhJ4EmanG!b@>%LKBJpA>nO?}ZqXGB@;l&u$7~2(c_-zN_zF z)NhF*wYF}2RE>`Nu~=+hHw!I{Uw^}fA;Npx{e@TZJiC6yM}zdsasQ5k;}2MEdVs$4 zEzOFPFJz&1XT^6pQM+y=1v1>ln%sPNw@kOdLz!L-_Nvd@%PsH!!33F#d5zvk-JkED z)n6I%)x1(6_kW0G%Vtaxbyl*hmHp6`KM>|ZbY7} zetCw@nLVaVW$1vsX5hTWj;xK$jJd)x93HPZ_p#e$cJZMA^{i91H6)dvWJ>kDN^|0Q zw5}WZtY9K+><(U2q1nokOycdzSrV6$IgJ%ZKT@(l{^$a zS?}KRit?H5Adej!vNfxB++xiFbY-r%wC%>at%tHFjfuMPpzD*{i#M4I26ynryXD$B z8GY~rtDoK0XkajURR_Tz@MYayO>X4}ez z)nS-{>)Oi0bj^8gu4T%UDOYrtRI|)Wcxz;*MtZ0GO8n9jb5(MWxMuPyp`W#wVyGqPHv@dv<+jer%sGuI$Sy{Cs-TZ(DmLLE)>&OI^f4GYkKc3 zAzxfJcUN5UMlCY|2kY&PlQ2Ri#~B9;ADdkIbsN~k6dUavxX$+peR*ZRDCB(a9~+s` zjSZIycXGGw#(2&Xp22t8caI+rgrk6xeN=inu_x@5l^ZH87(8dKTxaoVag=m3F<(`e z&U^MC%@euz5|SrGK@NMsb?8~c>Kx*VIrkn>t6a0zM3ngd`GFcV9)`w__)Nr_GIcc-zM)P@bx1wD&2FMG6m)dv zA5xfUuuZTuq~`yt-Jn!bf&hLhGchQCOeuvZ%-mAcA0s!GDuoWkU>`EPn5d9^%U#b% z+@wcB+bKzjw7?X$!tyCt^8t~F(TX_PRXS+HTs0e}otvF3azj2r`OF_l?YSlhnFa34 z!7bHfSox8iKipUXl2X@Wa#dZeX+2W4ckbC`V2``J_!Agev9KV0Tg__yNTkdS@%_zX^Bq!;@PYqWJj(QYD>h zRP~6-&nO|v;)^y z>IOJgjdCbw4ND`GILiMGnB*{vfS11GT3!gBc23Z|>~kN6R$HN16=XS_;aC>4 zb1g`84v+<ylr2Vlm=PWPHc=TD|D&+KFjJ-ER#`I~vH*&Yp59Y&|`An{i|L z^(T2DnHA_e1fi9I5QRiwZ+`+SL>D|A%WLnIJ#)}bp>m!UVWYX2*@seax+6KmiWM-i z4DkWmtAMHM^L?!P^O^2zPXJh~Pp0@)u#E5X_CZG+K84hOZn=ddlISf#EWUjX5s;Sg ztK9X{IBDBvc~K${<1#>F#$aDwE)Un{3x1UqTe+bUtP@7 zL+sAJHsByO%ejH66EO|z*Smn}XUg>S{SrE6!CiZ~-2N@YKJuXdjfbord!_hsIFD(_DEz-?j!m2U%Tx9oFdEA45F*F z5Iz)o@|US{FYdf?lbIsZdPF-*_pZ&my?_EE_muv+HpfA_3*;>IGIFRj7G8S9w#Hx+R6_aAaVe`?X54SEhw=LW&j}J90BS;CJF2?T>cSt}Cac zBP#>bnklbL$i?0SP%6sD!DuJZRh>79!Tt%?&FbLz6LQuj)Ie_(*4RkrrLcb4LQt_w zopKdVu#^W2bN6Ii%FCgUB#n1sdi!1`jMA2|_J}6pH3qVkppwt*gy8X8wCYEgdN$S_ z<&ndOjrwGGROz>@U&xqLDhk|gyk3PtJl7pVENe{`jaJZ>>XV~OrQml(p1Ohcn*YpW zPQ9zHd%v`u6xJ)vxd@kPRibBAva3xVO^?Gvbzl1lDwaE*CR7FWhX4&DCKQRcjLK42 zG{*@S+^KA24z}Z_kt&E>mq8659u8mA=O|f`53~KKX|o$z>lg)!!FJ*}6 z>nh94uU=9xbPx})tqR!Yv!&#|wyv*|AwAIGp1VcG8oYsyAfW+tL0{>zS_A-#%bIZy z_frdJR#SJe4_o)@i`gatnY*uZe=WrGw-;oj7kBf2!F&r(qE)uQ`o7o!{vaqT`%lt2|_0-fIgJpHh4;Rk?IxGI&$& z&!f0+?}fEF4GpJKHp0j2nwBnyu8i&pPxx|&P1yeh3b51v|4&I|VE@nhpD!rTL`()N zbf^tMC3YM4WZ6gL6Ya9SoBDW(-Lj@7JR3H~r2QQRF>WUdl{Y-)p9c8=5mV_S9O+C-3o#WK>d%cJlv2}X-< zmv!Sds9;WcO4W6dog76|PfIs(b>o|mm8yetS;gEPmz!XSMmFdJ5JPjrN=YkY z<||+Zk!IC#U~cyG7)mPv*EkF@iAXif??g)J^)E^x|-pNwH2Vq?zeq+4u}X(9cq-IiVr3JSl@0Ps7Z{ldlu$E{mid95U!>VL=a1=@LrHbJ2U0V;-J>*|tyONJ z{8UUUgDt=D#Vupu`Wqe&hj6E%ph!`ZrwEz6LdgaxN8UJ*z$8E5S5CA%ZYf=w1{T#x z$-yNnHRTUd$sC1H5e-$RZqU2k8;6GunuQI{r)SR7?}^oB-j9`MM4&Uj>Qf>5}U0t5to$LHO45B$6=a9V}2El=TmSk z87oRjZ-@gL*cde#4HF=e&{KZ(Mzm8NQac-|K||3dX(ac@6|*W;17X``5K_)@P&JKF zt!=NpTj&*k3F;rkmx<{GM63&;w}Y}pjeCsHo)Kxg3&lAx{Rk&->jL}*HAdiysRPG^ z@Q|fA(t|{|iAO6TWMH56}{`0>o?S&%_H*SFMrwqhpMqQ3lu*p@QRM_XNUwl=k06giEzP z?{>c&1;E!~^jgyyx~Bgd3V>1B-mHb^p*BWG^gq@4gNvQQSnLuebX84{B%$Jb_&-!r zS*|M++o0cl(ZnR0{Q9lKVb#&Iw%HroH4o2vTewn`*+#+_yLk&-({dd;_hC^%bWYi# zlWdm1u~qP8EIZud3i786Eu%*hj|i8#Uodk&QzOMf)MVn%fX87~1B1cUE&^SRPXhAQH@(Rl8^bCOWL=vZ z%h!$bo*kTRjP8d3=uUSZLQB1d)$fLVOT8tu=H=LUbn|u(^g32EBv?R7e|<@;Wkv|{aw zI~K~{Eb^N?>^tKMHP#GN6E@L#XqPoSDuy1GV<0@jM}qAuP4~m>$GjWg`q}X}R6Gv2 zhN$*09VQPiS+dA|Br+AZV9Y!?>vzx3N*=CD9@0}P(rjU{@G)FO#}={)<*(*W6nZ?u zlX*n~r^aj|yEo2UpgY2bJFM@We!5c}<(qF02i;;KBRVLY2e zk4FtUG$WiDb`nlUWdOjPf7VQIJpVP z*cxqZ-CyByE^$MU-ee7~t!MieE|y)`qblb&ckG82R2U&iAPKILv*_FP*@Zcx!>a{+ z1?Kx3=j<*AYwhaw?kP9gbFBTa+rrihkVzDf(<}i$TbBzTV}bK=NKUO=k5vaKu`a@{ zC0L%_U=ngesPmXZT-3cW=FG3QdP+*(T+?i*Pzaia5_9#=uE`GhKB`I|Lb&~NW#H+S*c z_4M+sL3yRr`dGL4sw6F- zEd(r4N{osL?};|4-TxAt$`UNiRj26TisUjEV+c7}5TK-qMDq}16)2b7R~0y&5uoKp zv0>lK@=slm)lY0i0@|(Yicc{v3q(mldXyLqZ~tsW$F$7V0|aF1Ff2b8)Xz=$3lG^} za!J=|2Helhp}BKuHBO%%mxXM?jZr|x6qloQWL3G_7D>uL&XHEgLF`aOUet|?8vq&4 zBUAcWL!!s^Jp=oB)np>exFX#bMX%y9_dyVUqsJ?tnT#IL&{Kn~Hq%5@FS20rz2*Bi z)1;%90y*X_=!|-B>&9Z3K2##E4WQ&M>HJX>}l(-TFME*XU5aE|Wp7_@-zQgQ?vBx?T4lsfyh7NPd*XznpUx zZNc9jFYOMwN?y$)!lJ)64K3MQ-I@>zNy{z9gcRXwpuG<6<5z5pOdXr*EXrS_UlrCu z;It-R0Ha5ni*LGQ<)^F?O)vQ=QoU=AiK;azk^{vJ z0`Nbo{Jv+{x+&|l=qgT#NG_nET9idbWpAHg7X4LnHNafI1L`O3_{q(>lLVKY7%-uN zXsf@1pK-^uNCNhhQGbKV(S>Wv3LkGl8CLzbATI2CE)ow>UKw%r2x1Q#xDfqBIyDHz zmausKdxgQ%lG4Fs6scKzaAR>fHRB|qc%w+9uh%Oy2X(#`@Q-dzF)wQcs(PY8<%y4g2a8a)7aJ*TIDJ(XS5Ux{zlxh;b$S}_ZTl0D z^*{)UOP0VANv}fcL4lwuo}$hj(F2tnARN*N?w6l*6cN%?{nZs!a%H<~RJqO9OKrhY zx5QD!IOA?5WW&g$tXb|~Xr3?WV|cr{t?qu8ekB)G8M+IQ^7*)bf5qqZk|?vCgQ>TR z{rOoj90y8Op67w@J+=^TtsK5L)dBn&&d2^gXnV_`HpBMqvq13z#ogWAt++eE-MzS5 zan}IFg1fsFcPLsscyV_E6j+{}{jl#l&+P2X{`Xtv%AMqzWG2^fpXYHNKdjemL^_eN zh#+mC;FyKP`SlYWE^i~w-3lu7wlNQmzu`>huDz>yzqW1Q3Z`MlLg-n*wtb<0|8m+5 ztYK<2tl=NIg)VEEZsLc$qRwJ}#iQ^z?7X(47%$e3Jfi`|H5zZ6Fe7f=D}LKXvOBwv z=D&Lic3uVPVh_ZDkY{3e2Kz6v_~BL8_4w;0-rLY2PadtDI#{kT|MaA+5^`pp_}z%< zXwTJekCun^>$;Zb&LlB}ohgOofK+=_KfGlId7yYTt+!PXF?F&A;D9A>2xBzN~};RB1epKd~wzeM-K;OPtH2>t*OY z)4iOiL+GxAD{`R(huk`9bVYM`0*2e#!gB49M`HJjgxHNzNRMmmbo_Awhao)-ij^H1 zGxWXp-Hn)*4#=_JzY`Fy-udiE`|$7j9d~4)V5ifnc_WJc5{>3CwD2L{#K8e0oPuv! zzFIngx_Vm4+%YWsZAkWQj7wx#*V{Uw#{AgZ4B6YJy5BZief<=$0vLZjO0)~pbKuf| zqkK#J=*J2}j3%3VLWCkAA(vtC>v@pr;Y3g##7P-vfwrfvEjg`lmGtN!_l53n^koGT z_m;(re2UNTSe^pM;&nLHAH&Wwyfn&TE9;n7z-Zo)( zh`0j~=i8<>@~W1^6Q2aq9NNtGaxLCE$TVp65IE#oRW0P3!YMK`>R-4=|DaF8Y_zqW z=i$~ovHa&sm;QDJ4zo3ko)`62GXE3{F^JToub+(lM#3(dzjEff^qQgTg@K~O@#KqJ zG$|O=X=49opzVe2-@gQC5j6Bz;EjVdT;|fR=N>+cdUazd)rYiZN~z3voxx_`F8}Ie ztVQMtG7!Lp?@q1pTswtX)kt7o0Tp^VbSbWTWWr|rxzECRWe5McFFrWGFBXRPQX*}d z@~9UEEIoDg<(}JLB|5@KgHbWMoi@jC9cFxWwhWo=HvJh5G@&mJAFy+>J@rl>O5T+Z z*Tq{=D4Ym~LT2cBCexiyyJE!xYO8`^N*n9-{_7e4|2?CSouA`>$udsMlxsbs`8eZ^ z!nJ~JIcz^r2-$y$A>IeCFA@Jwe;h4-IJo{@mE;*%T)pJ`a?0#J3`%}8Exd*~`MZxDxH zzZDNBGN0fc(UA_lc#B0`Fl?R&tO3!O3+R9GOA9?se{y;|b$=X#o z?@G1=_#@37oR1dnZmli*MTbzIJZ3HR61Q`#a-OflO*k>J*EOt)pWD-bO>ivhHmc%I ztTf7bu|k5)JW>;p!5z;qtkI5wC`a=+?h-ZAU#L@z^y_?Lenu8N4vugPioG~XAyw7a zvQ}x&6E*x64KyZ3BfUA)CWiIjQM%4zZd0gJ0!>m0)|YB{`GC)#V2mrdO>GuZ*{&*G z@Yw3-KiR?FyPbYEAdd4Dz+WBF+op+-7QMHmD8*Ew6rBUo8QNHg z$wlk1OgBlEFO+&j>qhPAerScLDV7p`nejc^_G(6cq>R;&u?tBTdWT!-a@61omU z+u~s!piH}3&KD=7f!%~4rKZg^4PqZV5ddsaV}@lWx?jH|1vu<9&Y8&Itf0*~^XO>- zgRvWAV{%8{%#x)^E3NgFLmxdA9gC8Tn>>YJn+HIN4`_%Q{0M$3_LoL&3hQ!~V+&Dl z|13~I$#o)8n!>%`Y>8duRu@t#uZJ`nT{=WUOE6QNW24hrsYrt!4ST+bdI-6&hOGkF zcmt#!g5|2h938*u0k9{CBGyVL$kt1t^^~H^k@RFyPWgR)=W+2L#ae; zlAgk^gul)3lL005qpf314`0a`{&r#d(#zxTP5?@rRc6+Xg#|UE`nPp?d{pebwO&Jw zDlc_+B2MZP>Zl4#ve~c}DkU%$01=UxWYftO9mg}eEtwuKG<2rnkHUfW7&=R1%9pwZ z*(?EIP?=w{oe)Mx%lHl3-8_r{h zEb4rTkf;B6cb3Jm8l#1NNn-ug(}~FupQ^lm){aHpF6auan@0LfI5(JT9z8SOI zb(!DwW%ktY2@W)eV16FBu!kl1O-qmSj4Q9j_)|-#^~z(x;DStBrU~;qFRz~WQ^z(Z z3R;E8O{NgAE>#nJ)nPLE(WQ9lTl#I?yPBT{3w`vXCVB=IAK1Tr93P*J!h%75Ps`&_ z{PorzmR}egCA^^huf@7&Y(4vg8xpHxhy&UUnf574jlhWzl@tGqd@q-*+tfv|e6%;x znCw6<+xlEC9cS81%iSIs`Bo11Q3meT`==Sd%Z(MJ{+GZjdT7gHOuRl|xI?~E-67?U zWu<1@fvU!Z_E?;=GbmqF$R@pfn_Jj6T?4U%nfr-+%GDpYT8K0xBk~va@4U$u`T7bT z*3a40#4ZxNmj*MSTCQA8<0xN1K#8qn;!Ww#Iu7o{<(R-z&Q0Owx}v+zxn?H><1ycw znETy5w93x!r%jcAJNPJdSLLh(S8-F63R$=&J0e#=Tz?-3&4T9RC@``Dj8jjQ>`TTC z2w6McLJJjh>Gq%bi!@9Xt~+ccZ2VCBunQs_zVlX?di9vGy^G|HoDUk4pMgh=6gIHi zKqA)v*5vMxo)z0gLWGxFVgD|V{4&c~Zl8UPzBYUCdvb?XSYPA?D`Hpm(apvOjLh@4^l0 zOh%3GdG;LFnK9qFSMOTVXfWlK_B+~Y@pw1=U7tkuqvP6^g*z{6>w8Xft730z!V?Xz z30xTEx4u>;ij&52Y`{!(b5CzW6rowqp;NKCGb~Hav6a8V;E~o+5L484syD?)tkC z|3uN??a@voCF*nzIRSg3d+oF^@3BA8@a)zu)IqZNmJ{K#S+;n$a&C3}yA|IaV$2!> zl#gpjfri13AAZVt`ZBK;BI$ta26J$sqZ<&mXjR5LpmH9~A(4jZyq5Aqn~=}bUFSz^AYOp9yq*EZX&yjF|+mBxXR-38UlefAh_$o^&9{7tpEQbSx_#W ziu z=-cW$^fmE-o_OwwO-7JHzeG=fX=TopCDMmqeQc+mAVF*8aa-mizOe>JT_~qUv(b%B zPD3Pxw_?{Wett25sL_3&(l3KW)Rp^K+>LG?kT`&ou~H`?C2Ci$-fyh_N1e}ZYCgPv zwj{R7p(r-AMIM)QbVr+Cpr-)2=;W&EW5U2P9(%-@xv|p5jwAuE0XcvSqa#7w)0}YA zWqH>bZJP<@U7*T}ZqaZxWz-tg;OLMD!{VEWS^|6}pKd_r zqp5XA4i20P3c0)bYyxKq&2*#b#g)0L83wF;+%3DR`N>LMpiwjTk96ciJ($Co6vDBJX;IM^el6rykQ7|Zo!r0K~y8r!uwygaWF(~@Y z42`fRHFu`S594GGE?TfGF!-h|lQ_GxSkNnl*fM=-UGZHjA+UyBgTH* zH$WG;f+Zdk9Z^7i@OLEPJ2M5eP*|oTkzWh)uw-Ibai+Gzuugzu)ov5qanIthT3&wz zwHC@j_n5C)0F4wiipKfiS%mo?Sd=!t{ULi|fpkiS*daPr)X-V;u+%9s%<{!<3 z#?{cFKzhm}I)Oq1ygYIeVjD)ySR+dXxn0>5WYj|Qh1PugsJgRK23E#pfrpgR&sMCp zyFfUt9D605IuAgRIWLIxg$H+*IFNAfLS!c%A|*-?B#sL*_5x%3aDHL9FR54`h6aa|@Y(xY=<^T%i zXw_p7igD_C1yi~cN(qv1o^M#pp_>>=EvPHwU#exuszjQfevC^HdewY!TyGI+o(s=O z`N8AvjlUM7rLguw>2Z-n=c_=Y z8^&}<;hwL9kD_mPoacio;>iT=X4jWN{~o|~TQ1Onq_pyiw8_u>bGx@;ho0#(P|sru z(Pfwn@B9S^F9OLbFGNS(Gu33e?;>I)w};W1FNp5%IakkGDQAkLD(b&NOa)XWL3gnG+4 zNqN?%jLJ^QJDX?cvO@Hw$U~P6oT2}e|9!cEr_c3mw;)k}PH5$&Po&GMzajG+n8;m0 zq>nZ(snaRY%k_|&5azL}W*aiRo|kNh1K~6Bo>&(P*__VxDo^CwzCZA*4vJt((*BC;GNjK5)Wky;n_Cu6DmLqBXOKjXcz)aG~f+q)Zc%M0KsJszrM zL{6wj3uM#H=_wximFuCqT`2x{&3!_^+X{FE-)BL>O zzIXiRTq*5~Kq^h~6$9U3Nl*9A)f&r?FGA}NfANWr&nxLh&dIeDivexFPa`xvW!{D- zchV>Nim`O}k$`i(-5yL@wk-b1Op{cUva0p`W~f`{d_=BF4MVk_VARq;v98Cint7`2 z)u1;!K9tOg6FSmCKRs3kXRr7LeEcRk@0-7RXg+#`J^F6~bzaR@zeIlKT~*##dkj}` zsJ`j$0c0yIF0pa2~`p>C9wlXz z8A>=-NYplOM&9LA=8E=L_%MG{&;ZLx{O!BhRRo4xMMOqMc`0X}8qW_D5{+s1uH&-U zT+1B9$BOWkwh#LKZD~_^X`M?aKYiVD!Q9<96%4)QZf%)bIk3Iuy8yq5_TOHA%G!SV z<_~?8yUc4qQW?m+&5^iF4~buDYVds(z?&%>Z*4f4yu2SAto&}F_$lC<2-Mxkzr6~t zs#$gw8tj7tZ{~WB<+;{Z28S2GQI8Ln&NFFn&p|COu>@~CAOE-=ss9o~HVt?_8Y$LVr4PmyhSmhU;Albp! zq#_r40}gF^Lf0BmVad;*s~YZa0<1`OMB@WoZnNXhv~$2f)Ns zR+?G&XuS_X>#?K<6&4KK_^h;!Yq$P;=Al0dqTn&6**iCBVJZlG_y0NrsL*;&gCY4s5-yz|@)_f2gg#(@AK$w}`?ij_F(4tV z-K@e5R11;BNEW^8Jgg6|(Phz}$nIL4np|={*8iT}M%4Dxp^6`jv(cudzeXWZaWkU6 zZa3q@iLYKv7i-+p+kA!Ehtd~56SNsA z<>xSd_MG~M5A*AjzW1(*^DR!1w4nab7#-iV#uT&}D4d2$*i=+CzD%z#B_`Y~Nr+aVMNzbGy3lg=HIbOpzyMv!z}9)8geUzhH;eMw@hUpL`@Ybhr2#ZAQdr`>o8mr zq~#z9d^RdKak~;}biIiwN}r+h zQw4U>J|VE ztEkU%Cvm>K;a^=t3%rW4JgwyW9OpFP8d@1CP1b(EwWp}jS5Hky=d;f^Th9KpR&<*F zhLg)rfkYprbF@ai6ZW&rD{EK4-3p5Sx~gR8Z_-^AYRq%&-G?E@?AG`W}7&kM(vEmLy|pKy`@x)M(HjL zJb1N6i*Kd?Xu@_)x_)fVA@p$yL=-o)P`z-P57ok!V}eak6b77iRwFXDiJR#7ho{6> zz*yIKA`24QNi58r%R%K5mZS4>Byj)9aH4~pm1DfB2GTHCZGhIzNg2q@Je){?J!DNg zJBoz89}ALcuLmU5>u0%^sq3j(^3kybC6`mJ;Gc&Kd8Ez)QFX!dYQjKWWYg^*3x|z; zFxfn8yoqWy6zuYivfJ%sV&<9TM)pVu*i|?{j=w?s zAq^3%JzD!eNUTPMg@qH%{`n1sS1?&f5w2wzu)i37PN>~ZJYj zGzg?cetqf{eS^GaY>heZ@K6RtARc-W*4kd?Ap-kc#2o_QAM@~|P4KN$%e;O;F7Yk8 zO@(~G^vpqtf5kk({Wou`WR>+nv_EMUR3EO`L*!jW;jJDnNnV|3P#c0;>yy6g@2z>+ zy#GFWol}YJ)?nz>suNkV>~-K6W$o%>%N?n+XQd2 z9q4dR3LP68j4S-WBP&p-qqt9n-}^jZf}-ZPB>uc{+$A@C$GH`)(z7_`hAilIOA=FH zSlHiMb@?LfKtpmyvOsjh?KOtudQJg4$5uT5ZU*Po>NCm==u9qEK`*)!^b5!FcTlrL z9e@xo(diP@@|4vLvJ)YiKY78zNa zg;fkA2KH*_uuIIxcQ4&n%H7==nv7(waeh|OF(Uq5@e<2 z=>)Eqsmc_fMeC2Ioq?Dup%S(4= zpb=zvJA4*99(LKF-B@DfHNq+*N4_p~{<@H(oOR^n_kuI5xrG^MZ{fe+GiipEK5R1p z*#>zfH7GTd*mw=p$z-x8NSwdr7O=i0`ZXV_*z(t9bt3K*!LY^xba1LZ9{K47=CZ>{ z=yw=zhF%_@?e4G6;(ru01b3DNji!5$LdL!FCglbjb;2zhI@5k8xYiN7hPar{@7i1cbSr4(=xua1JFWlAI;L zTd%k-EB@sTQtmF_WkpU(q@H(j4C@cKew z8Y3y3iydnu56HgtTVOV4@fgb0iA1UfVa?+_U^;e=eM062ymZ%S9PP zN1pDB-$-RHDQ92tNe*@c-maB;p#Z=b#JI!ZD9tA3jI-W74Zc z=M!gLIlQa+P+)Kb5q!XFA+$#Cs^^M=qF0bgu?DE#^{ zyFKDn`(siMmm^Ab7!i#{w7! zmgOLexq>&4PMZpzjEULlV>YcLY4?nR{_JF}$?Pnq@mmnuATDt`#B>GKfQ`vN!{sLz zbRVuRcMd!YUOc=kaIiyoR!8CAH<+Txu4cCHd+0VMU#j5=I=)Ck#g7?-m=%{fX-dIiVBQ)c*6~*WiWA0EwasomI?PuD$xn2?0+D4Q%TbCIORhJ& zaZKLH5Y*JBbnoQ$2NLS|WrKny1|v!mu1rb#6bo*_zt;=WL*|^C>-dR2@tsuiacuGM z=PfYB%H;%r)A%8K8C42+zR9RFQO3lvY6Oa?-y#Nustx8IOqF6T9(CyaCtsT|o*ZDP zDMm|Q_ky|Tilf9K7|NOsRX;fjui#H5v6he)(8JG>H~O+07Ugx(!+lKKJx4TtNej`y z^ADNVw5D=Pr>iVMY#M&MBoG);8Z~o#Ja;ghM-HSquaVr7MG&)<wtkT8kI7F?GR2#9MzwS=Ts#`XZiXngz!ONDQJO*(>Iix8 zvHh)huqiS1aSrt~s3va=2M94)#y7zk+?-P1Mg0>9i|0cr4?;1ZKr>LBp|}Yqa(Wx=s215&b3WCUxzfDOO6R=B8?J`!`=$;_w%Ukb|)W1bERKT5RyrB2nzoS8crf@`x zoU&XkLA1cYY%%~Q_bqqPgd?0~b`SeN!=KN8a_+Y9n_atpcq^P;eeic#NwkwL5M6t$ zhBEm^zpCI}2XV%j{w$N^|L26MHy5_iYc=%5J!1ok37VOm!NcGzzXtZ=8%7N%(LZ@( zSfullwo){?}Te{@*O+j09n)s8FI+1Fpow&qTX3f({ z{mwMjTG1BnkXnztQ5z4n;V-cgawmuV{gS_T&3d>aA*EUtnp$pir2aQQG(?UP0@zO=(OIw4+uxDh5m0#V2W{SB-kKE0hq(EI^#WUuqb}EZ( zUc$+eBc%fFRx8_v;k}-Z%CkFz4aucko?l?^mVZF;j!K+T78noE{Y@NJdF>c+jpAGnrrKb`}#jwbf|f3U>MTsN)z ztPj53W@*Dpm+~1a?_$eXp@hqRJqPL?w;qB~j*n~I=Of4irH^f}=9tIGBc*;d=cwtB zdpobb)e8?#FznzDo5|9ea(=G@ky5jR6JfuK%j6m0Z>CKTjgA1CN|1Z5(%g zm6BHK5Q!dWc=j=87EG*_oFkW83#D7SDFLu53cb?l>~}M0fXBKdEK4SO_=Vq`+B@5r z!m`)28MAp0!ksLEkjH%RLeE9x;(#*9LIY{(B+{YtMXi3#Z?zQp^x=%L#DOs95=eUA zZI{Zc)thXjhBKh`hz88M6eY&D%sZD`3CP&v$$i$2dxx&V?Ogk>THt>oYLNSXvlS?$ z?D2e&d=v>+CQF4}xuMiKs6gN_H=o`D^UW(2uw>ks1;jU~lE2X)d^^!=BssQWE|IvO zJ-MgbFYn%?yyZRZCeb~gHF{1~5cIwFlua4*yNtBq&%zQera{dj%{sHuVmw$=BY0?@ zP>XFIROgqs9&d)X5UGZvGeoYOE z1trh^9|w;WRMluFDZouwk2v4;PUze1oMZ6X9QYHq_%uw*wFNOL)Aa%uQE(EGRWYB6 z$Uu1ZZw8TX2^Pq-^%OWp-a8fOeiRqgK9ISPshy~sg$UZ5dLh}-MpJxaoffMdmZyQYBgY%h;okWv>z&30 z67udxN#^n132TgjpH4+HVo(XV8rWiTHtc8n@F1k4lqg&=i8#-}3>F(umGfEKi!;;b zz{WROT3A7}`Rq%iQ75BP{?&>UVu7BcFxF|f+3GPer3HR~eVt=0=H(W%X4M6(`%PNh za3me8g+W>+#MzcC8k{}>S=*Yw_TCe98|p{N8;P!+#O(uM*h<8XE=?_kdDWf*rBV5 z;jv>C3QMq!>D^s(jy(MMiJ zdR*3v50}lF)}7Tk7k~`*(y5-6a7h=2iUmhQ0|sD_=pJ%HcCnadwzrF);==mT+hAA>!BpFz@?OO()L#X=mKT2_Sty?x3@x8mbKclR%#zn6a9_S6i}}wE zl=-9!&?duAWHB^O6sQa&^w4CT`SovA7vB}WI{!7pR7~6(kVP@j%7*V+Ad>0sgRRjZ z)(1*lwnMR``)Q7n2$M;9D3Z&I|4L4vZt3T<6h@=pF0mlJc158J-j)_k)lq_I7s~s@ zGV)hq@dp9R)gj{J@eJXtd{_V^;}vU;JJ=~9yvQ6gVZ5?=ppC;C^x&k45Q`)!iF0An zjd$=&$rm&}^okqi)P&>zOA1^RSU2l3(sn=|MYnq2?lpi7CpT>~AqIN>5ACRbybLZ2*3|ke&pRaIpj{UeP*iD zSz~TF8u)&SY>3Z0{k+zi%0HIOeSaFCq~CUdlZ4>mjueNJ9ONk)HH9^7ljRxeu6btqpxPBKE@rB( z5GJg@Ef38PZemoY6|7UjFNgjr!Y=)f#j^JsHW{s)VN@?UGq&j;Moab{3ZUoxMBGxI zeM*(nQ+3zV_Vgi^%$ny#^Z9y5$zdn;^@jDRH#naOFV9Sut#)_|?nZE*#`U2NYcpMY z>wfWf)iO;|^LdpmSo_utr?aP*2_aX8V`IG3uuTH|I^Zcf9HiVq#|cLMD}VG}?0=E% zHE~F^>CxPLZi76+`f4Wy5n?&kYW}!amgVXh-#}nKjGbXgyFbdRV7PPik0%ky@J?;j?%;4{Vn-;uMlhVNTRL4nmaDqT5 zvB$&(&XM#=xWmcALv2S2^UDiSQ_6XkG2<##ng$s2__l2=mjQXYuDfu#Id=){i8p`F zw$L_gPYV`Li@Q7S=Go|79@noYc;EN_O>+MNVAmPHmjgaw20MMII*x9M;dd`lElW^_ zyCCbm;SX?yRhOxh5V&?9=otTN8RcVWme#P2G*YWmes~0I-T#7H*)dSzZ?sdod}!3h zI@(2&tG|WQ9$&u%l6ek-Drs(N{;x{leJDuHmKb5^xlKnrTF?lI&WUJa^S*)ub15&$AAlkj8Aq9Wbu{E_o0676 zb>XZ?XPtAI)AYphl5L@SU=|o%m}ouxPQ!8ykm~2?4p+6+>&UoV3JBa9vSn-+3J_)|d!Q<8K(XsVTNly|)dV z)~FKWfV|9%p-$jkI$JUV+sZc&&_pmc3R3A#MJ6|t3`ib}qiP9`t5=F}V$wqR)7oEV`?@Zj>xK7SS=ORE-a|{Y$ zkYf#Ae7Nx@#NCd#S+=k7cjaO-W#G0{(*A^odiq!KIFDk)DtcL8@%ZTK0TR6E=3NIt zGc6sm@uc8hYxA8J1%^sSIGmxY z6}6w%%Yf8E848p^W{Hc+Am8xog|spy=rCD;``+{q0NXt4S{D)pp+%_JDA{#*KaROV zTBWI%p{>b!}8%Is%? z2YFJPv#RQlkxI#emmT9pJI*=K!b@|d)+arz*{Jv?=J*we23AHsW|6+99nB*Z%`n_M zvKJrMPfZRg4_hsTzF&-vv2#d$)XWRD$A=@ST7s6UbXq&E=_wd2DN>GzRL*KM%61`A zN`#VU752-?eMOGipPBjN$M~}ih3xYfX1G~m7|_scNTl5QWL#Wvbg1pqyBf6v@~^WQ z(72qjp>2HC%d{yOQ>ran_yHs~)spLMH6axvQ%qhP!Kq>7TiYPbq$G4($~E zy9}qH(-i%4<~#Diu~Yv|w3D$Q7nT#=Ygox8vCYF8dP``gSHz`GCeu#^o=sf4cnjX$nvH!@mNc_yd zh}+1PGV{Dv?`&QLE`AknAD8akoB599<-%p>9#{?L4$|sWV*YJ2>P83r2;KmgH8!oL zGAv6PN4cK2Fal~DeeCjhJF21sU2b`~Gp(Qrn z@@l(1ho6ckLhc;lvlZ{0@=`@m!ZCIai;bIAs5iganGEV1BY1F9;`%Gau|U?m62_%3 zeH2z|4UH8ZcoDN1Z>C4Na!$HEez(P35Q+|X`e&}1qt+h%?93O5_E#J=VDb_uP4CS& zzo9(Sd!tx7POxnF4w?4@m-#Ev#GKoux8)l)gmq>P#`e2;P&#xqY+Qyc7u4^b%0GqF zM&H01YfwF^9_n?D`rcDG_-#`xR8_~y(zcpyG_)Yx+fjyJRK0WvKg4$cFB}v>5ss1i zvki5?=y_ODuzW|BEDn!H(tLm_t%9}h8DVOXDR{@h(mCQ+^abuFAqp!)-E z$s=#&-d*m$;)%P=n)Df|j*U-V9*tiu!QKb_-@DL6=Da2{JZI*vHaq4o>}OcUwX-ru zn+|EGpb1GBZJi8T0$A3BkT2q9coD1eI0Mr>#JpWZd2=G2J%e`tt^IPf$+myVbw%)f znYJ!*GA6R$XyI*}k;){TdGKp->~X55n^85&!<(te=@4ZX@hFAe|CO6}F7@;Z60lW2 zdD!O~{kXU@`*4OklTaltFP0-s{p9%j7|xnhTDa4C6;t;|YQtQb6MrhvlUUop*flHW zJIwUTe}xnAv;9vb4D$Rh^??7x3Z1p1{GVe6WT~I~W_W}eH|7M7u71Bf%7q(mFvO61 z-tUFiLgd&up;Yhnre9@cI2j|K=KM%x&LdlJWR&-9itZ`(g&poZ_tFy(+KQ+|3#EvL zpVc&+WNi13M9%6pR|^^j;9icEnu_iXP_4(9G2ZWr_6H;;2U;oB*)n|!h0#B^-+%l^2a{9yVcu+4SbtUEUlI6LnMvC_UFP*FKxWU}#inB#=Zl@Y z6w9Ww(}5J~g(__DkgdS5l z96qwP#L9JG2;_}_a4tBmK%RrvoFT7D z6NzApGTGi;V`wjm5v6DWvb?crQ*`vv$tTi$nWwOKAKTCo$J_fdU~8>~B`xuSPerux zbpZi@S8Xy_WYn5=g)mj#f*k+P|ql? z?fgY+!Lxv#Gj*0No?DxQSD1Y*EoLdr8wOBg?|9;CwjkATTrS!73u=|J*^`T1F2&m{ z7~yA%fg;C=+$xdkSuqKE5{q(3ur!h%4cRQ4FFC8&V3-cH>=Yvvd;3}0Z#U|0#@jw@ zB}J$V9}ugjoSaufm71kdokilu@;<_ZkTZTf3$LkK-ID;dXLUi59SDQa;K6<(v7oa| zo?o(ocVFhuFH|Ma_ORd+`mzv1hS|<90i1>_Cpys+OYFGu5j^2!sG*QQYlKcKh&)bUo|9vXO9WGT_rXUA=4xc;d1-(&deVSCF$YArtQa#3~W z7A-Zs3!88ZwCMP|V)V<|S_}7x&dns0#PIXYG%@X!sN+QjN&%KEWv9RJgeQmP;D0N@ zNE*|d#eBk4x5I)$sX5B)k7lr~LeR0dBUM8ABP&TkXQ#H{HyXCM|A$<_P(*0~X5w}q z!&9w-7RNKXwvYb3r820TZh?W;Dz|7NdJoz3+x2%{xzvQ9f3JD(&%Eb@${3#oR6-y# zLGO^ikG-$yjO;3$bPTjI{!`z&Y^B*nUuM3fwdUbVaq7ijE(J~ zv-$3udIriV1626EhMGj!MQjVfmz?2ks1VF% zhwGng-9Gs&U>D@U>(+Avj@|42V&?hV3E{Hhec$2~DPW>|7n%rhagsb7LyOBupZ3=M zmDa0zdI%R_?Jpp^);itnn2S6iiZl~5V~c$Ip9#aVqG~#o`@O7(*aUy;P@`?uqz@yf zBUoSKOz4-Ry)AeN2N?7~#ka-14SSgC@W@6Jv_ZIKjqSu8pmKEHGw+4E;hEEX&gU~U z9c;Nwh#NLt7Chraqy>3BmHq1LpUQ(`~uq#H_hsVL_HV_^L2BqR8gU(Ly!)I6vK+lb-vdaG|F8k(D!mvwMT@lKTDG<1_>E z4&&X`_TMW5{}WMz{Qn!UP$6ZQ>x=Ix@w1CRKGN7!NM%FUOh?YA)fm0em8n@Y-FRV$UXKuHT5y{RX*3TVTog+X^?o+ zNZpD!VMV06bol_CQAi1fL_CQvKJ!ABD!=!xl7MitH^WrHqJ}NXluC)P4v~6R=psc) za0k$J{ZBI4`x-U{4)ab;x|2@J-!-~p$LoGU2#{!S}6d0Q#(v9ybUrX&W@ewdC{ znqSjMdi{gx=?dk-u7%t#;rNJNgKQ9m^z5Y7v<@=20aesS@eg+W7(WG>c`PPOQbXM# z`3HE8QG6s_#9*u%%Py(GP6smvgfgc?$*($OURC`&TwOfkTLB+q4pd1KMZq^)a%<1? zJV0_rvDmby?|4%PetxjF>SuXvU#Ws5V{C8LIBW~BD5Iy6%T&C1etw%6G2J$|sH5pJ zgg=hVdN3e?!rH>J4u%+2X{qHDZ!h=D@7kfWS&$!=k(o9jGe-G3IlRzESnky<`$=?J zTAp|DH;ZM#p0x4}P|N&kd86D}NSr|>U<@c9!j`0KNnO8VGCpBKWV*Ot=gAMv;j2&} z>1|Q1ipY_sy;@TlTnG)_Q9s`xwymI0c2DJN-$;@r|Cd(aE4z&hysPwyPezVMDyoC$ zktDotH$5$VNeJ06zA)&}}`XVzMUQn)PqH$vCq)Ml6Te1&YS1$e-4bVxn@dW$NlVTC%o^ctT&`hysj zT?yYu(tX;A7~xD-6tRVz<5|e>Xz8L)nTCU08Yo&#Ocpf}0(4G*vi+yvj1yoICUOh3 zo^n}r<=dAMsdF0F2qbi=JK<^2D@&y{YAWYYqx_I&hEiH2PYbk0t(c_7{!`yUshJF+ zlGw-EyjI$w()rF=uo`07L{;+7w!$^nz}CXG7zRH8iSKIp^=}l#Dya^rhMLY@C@gxa zHv}7dJBZx_R|OOD!d2l(dAa+lNAk*<5aWwM*sunF*Oc0L9tCoJrA&Cbk&LUfZm{fQ zWs{v7-kwB_lyVU+azv~(wMQK7OmXHwl+oOA*mAO(6sOHeyZOGTzj7WlwlFkE|XJB<50e4e5fFrGS2c~JW zieTg+pizi&IU$gKJgYVCJ`$&q?Vfj}w0|JY#N2jWIsBtPUbZ^vw_1yr&4#miGwr-% zzJG2$`|Kot;d?yrALMdVn{M~bJ*t{JV;=PwTTo5758snhy#siCU|A3!S^F`~Ih4-e zCC_2l++V@D#fQ!`ee~_%bm6v**kR{HQrgO(=iq80%?#^8YG4E|R1kc7j-b$MPkQ+yfwAff!#)_?n47OMaDf{S;*G0?_E9S(G#J)bCUA&T;;l9 zKgkH|`O(9mJ6yczKlF@~>ZlR?_f$}6{F3!hF0X*cko#Zo1rRb z8i#c`|3lAtLhLDfq&_+k7d{%bRrym}z+b&yAgS34m&=YzJ&n`6QHQtEW(2+I(GstC zNAmk-U;XIwn#(=U08=A_efb*sL*tTT&re^jts zKK-OTV1gTbO0JSbji_2I@a6LzUwYe0uxg9eN&DKw^@%qM{JXmdjQ<;2gdG2L7vZZz zLE|O`^6$UN5`&YFR7c`H?9C&1SuDO@(K}h|LfdD5ghu)j;3K5~4|gc@_r?le_nlKT z9QK{<^t^=-;&BeRh)|0o^5V?A##Ss62RbQJKTAk2>>fy@o+42LGc&S|KhH3_slkg^ zY3tPTpsd7%d+d9(9E(FYhveW5(4oI6(xV3k0$};qQ?*z?q?@bl=IvU{XwDswqBW{W z-prOy83Xf-aWoCPQ6N@&=-_IFm3S@63>qayS5@rrg`=2KFczq->_P-5S+N~^+l|FI z`uIGRjveGN88ut$iVLBD935AS&_= zlQpMI-4GiIB@sXkQm%#`7>b*se6xs=NM?&An812LaUz6cJ3!yRqVNl$>+P^)l>Vkg z{8^?{YoXnQ+Bp1cA#%4;G%&U1M66VmB_@iXP;V|`$-VU4Tn7QVM91}@J~uP!{#&_) z&EJZsK@zpCa18X8Yec9qWS#f^T2ZElTh^gUkWsl`R3Xjs5zJCAoPdzB!Tgwr{YetDPx3sNr-4Pb zQyD}Behf%I2ElSow2sm+N`cKHI}7xB$zB+YQK&pXzK@3>WJmR?_T^HZPt;I=xpcX2^B;90aK2oQ@Fj#W!L%^xU?2%wqBCyEO-o=oRVFf`740@QLzlTFjpx_`? zCr^Y45UWll&w`v&DTb|~_JF^l0(ULgiDt)YBUR_UpaT17HWO_}o2Y_`te&F!Q5Z6A z)+SL%9aGNQdkJJZ;ov9KI<=RKX>r*g`vRi&`Z|9N0D;(@xXqu$DeqA+s}ky`h)K_L zB&n0*4#DJ04Ap_n7wjzuBuEW$!=KIG&>-DQ4Jq99eQ|wNPVF!vT~6%^CY5Nx8fa|^ ztE9nE1c0hPeKWq_bI0u8r}#g3d@;tbRbrI^ggfz{7Df+xzfooy&iNErcYY3R8;~>IzLrRi`@H4vyBr0*eUWt(O;s-p8I|VH=&q1rD zf127-S3_`+oAHLrHQlqOf3MDzm40ljnc>Oeq`mfPY|DQ#y{K5M`D3}74eA&y5_2EtoE-HI{<#fc!L!$d-oYu>t={) zSep}Bbaqt1BJuva(Qg^rI*-lTEu&^Ie7DnJPy@!)Mrx5LW-Y8?f9Kw-Z+$U#k^x^W zH8PR?Fegh#r5x^7 z*`@v@enG>_f8{8@osQSp@g!8g%#M3i(qjo-_V&U+mrYe5*;_Z_Y0MTF>a#8%wT?crE@RMI7xFNR`L#7?VFR8vC=%u+>NUGo_+v3H6aD zY)V;m9e^`+N`0wxWvZz#mG&^$X6wAz$kpauptgndS?EmQ)4LkK$mE%Ue0;H>df_-r zv!-qKuyX#Oa#d8tF*Y$-@T~|;t0|~*Cj(mCN`2;!m6&($Mtf42FWo|)CzWldB+1=I zN6~m@Gmcb~N%;q-CFKj|Tx3IN2vIEcqFDy>Jht`KnW|;c0jjlDyzK^8p7n77v~6G6 zxaNEMN`)d~`EmU9&^Q9TrpeTene=}hyUOm9|Q27yEblT+oueJB3VSIkRb;Uxg8uj;9`gMwVR8FS!1<>z}tKL1OFRm zW9+}(Bm8g36|(+Q=(a7$myEnh5Xms-QGQtgzj|e0^fvZWuc=9@xLp9C3 zCE9;yO7HfbAe-)_JF<9|zOaH15%)XVO(752HGVtFB9bS8(A4Sq!N@u?=FawNSApXk zl}AY!N@qAgH%dkAGP5W=8fRTB*&=qbr)7fv)rEFvYML{E^d4TN7(ceJq&nPW8m7%m zEceNryqPs4D7Q)_-emIU)oes31UugM<_Z-S^m|sBd3hHAa)GX;&omE?8tsk^OGkGfC z)+RU7V}~h*Ta0&9RHngfh)X0G?Kn*;G(^VX2VV zKr=Q6#bIGcjnmpU`an%(0`S-h|8X{ZRB|N05$NNKCSxggD5l=!Y@205Qwb0fU~UTl z6C`JguCyAZ3S7?Ttm~DC7SK4~uMi9+b?GTCUj`3Q{E99p_#a3xQe@DAf~D4+%9xo6 zVz7W12gPRl=_|wW+gFkpgQX0cpkirA@;~R%QPbVS#Qgk9hBj@WCJx~=m1!PkL;Wez zQ6kojo8Z7T(|vr3;;`kkO#EOZdo9)rhm7rgm|b#S4dh+QO{1q87z{1}$G^hcBj=LH zf&zwSb})(_(NA~~UZS)RuWcrYbCWPR-HX368n*2hUOG~;)C?NSQ%1~ zN(D>+QI1tlw(d?0g+huVNUuPI2zcL&5SO2yzvMI$@dMS1Ao0@iM87Jy!b0*0=A?pe zHl@+RB!-_t36Mvym@vwUu(ihCw(@Fgu7KnM9Ty}{OymzUN#0q55QB3}p*{})rZyXQ z54HtnddTef<@9iMP?s=sUhAl+uwk-y0b;5#2}y2?MXr&#O{%L*Dkq>Ahz#n82^Hv* z#8(9-nZyiKulSr&MV~;_QUL@hhJ2`pEC|B35-~OI|B` zuZEcZZtwp)!zue+;FF&mIlzmrM}%{54H_;})(C&dZ3Sth60;yO;K!dU=)o;!m<+nD z_K5>Gzhzt_#Ttjk`G9m!&a+wJ!_%S=S?Vi7>J{Pde+LK5}W2i<7{J@W#`FF$%WA;H6HSK zpSfykt{>tCsl_X)Xr6f^HTm&)3rcXF4@x&8?L3Qm=g5d)sS0y-?d(Y{1qWD1RJF8} z%Zv4nI~xR=n*;XkS$wzsN1XcKL>Ut!tUHz{xt4+ou^Jcpf&GGvF}H7W*KRi_6KSZ)uDB7mnkX4i?(fPv7{SWtPysl?eKzA}b^8nQ7Mxt9nQL;23srJO?=u+GHf!0`WYz}U=H_>H zQSq3+{E{>~q3tAk@>bH0rL|;>8Lc^M{kmTdI~L|Nx_S5gWXZ<+gZ5Zy_91D{HgbOK zC|@qV(1ad|g{vCEb)v$^B-5Eg*R0j#GDTUhSH-Xxo5HD+`AA zO9l7JX#>xX{dbbf=Xk+f;jNP(^Rk=FEqKn{`i~KQ@_VkIFQA+!pRR}PV~qnyl@b1_cTK_7pSc!OEX@ZuBH~f zZpc9uZ8sAYCK&Cu1ndC~N3%mj)k=i^j)4v0=gi!qSIE{P!Q~JaJq{&em#c7biyU2? z)qE0BJ{oN%tvqXEee ze@00j?A#7d?Wlf6QweN5k%ee_SRCw}79MP3!RP;&dZcPC41eT|h^m(*V63 zta*qo5iRSet;%8Rn?Z|^x-l!UVgzMoBLfjZk_j;gO`QgkUQ4`*NH-VmYNA5P5)$x_ zJRUOt(p(HAjyx_RJ=q39uyMgwqHMQpF{FHA@`EOQDsp2YFy_)PF`^?5hHlA2N~Gjd zS_%*sjBO0ep%6nP;G~L@>JYxZlsCm|o4oq!BOKr^3|fr8R&x@mTb?k8aGR!>>%wx2(j~H$joqbYW4)gU!y39kbW8w_pL$kmK56MEZB>c_%jZS#JqHp0 zT^wXjnDS>3A`GL;^Yj$hh8l#6V6gEbslx;oO$=QrUSN{FtjcfvxIo??3M$^&-X@|C zIcn)zeRvQ!-)e@q0M9{`cXS>8HcG31!nSLE(%cVA$QAe+Mf)prEfS##EGavw*)Rnb zhoOvmy&26@!mE}h8?{g~R>TjeErJ@`&m)1z)#NffK~nQX3Le(&M;EEti-j<$Jf-w< zaDI}M;RSAtfZj739QYTX-5St{eK{7hl43JO@Xep$*G(_lLE>nzO4Km<2 zw^FZe^1~M`LLP$IIVHzt8JZ))rAKBehmsBHg~<^`Fr>2IM*#>vN;}+Ovl7kxP!QuB z#d8-pFj<+?Dyt1fjYor=vF1BJS+(fH3+ILR#8LoWo|DkPQKk!oVbCrvkOFCFm#1F|9~SFUgX=(gTAjLr}oxDaQgCE zE^!p2!vAAhm-_nI2gPO}7?5yb)rAxpm&-Z5Dp!R+UJ|n+bwd8Cqn6^PS?v&QC^{C| zgi5XF#^!4{0KYzqO?_&jbKO4h&2j~}^Vj#PBiqSivR>{o>h_J*lv(hrc6}1wzGleQ z-q*=t zKIp}E!cITVm^RIcS+qbln0~0%qNv~AyMU{}J=C{;RN<+!6 zcxP1mWh7trt!JC%*=0s*RW2V2H?MfPC13c%NV%w2v1x4*gxvE27axiEsWoU8rO=x| zyh{TI!Zh)QX73)`CnR4;Y(RLGKQo&>duZJpkGiHF2HJX~ni|h5_(MB)C#W*&x^7HJ zGkdn&q*kV8b;A!-V8X#43k?R=GL|(~AGtW4!yCM(R_EVn%=Q9r9o$jJw(1HcTa?%Q z<8k^LGUkH=Gx{5@NG~@T$|X|FG^=Y-ds;H~dEYHn3MWl^Buzvm&^1OM>#tY6(R@KS z6!|Z5`6xTXZ(wGj@4@puy;He6Ot_`bE?3p`QtxHGktoi#3{%ygPI^^BHt2tRqt2R^Y9b5I+;BysC^x*?j;8I1vPAKN7EbU9k|>LHEBcZ9GWOom07FochwGk zMJsQlE+p4+WS4hIsrmT^uH!0zZZ~1ek#js#2>oGw|c+%5TF( zSIA-&{Do(9ZVP_vz1DY{_C3_b(rS*8w}qmmi^u&V=a@BhUGEx|#yKShd zi=_@->&70-z(Ha0Gl;5JeE=6$V-*r(yYI&M3-JnsqHhunW|9u`xX^pTnlCW-c?;6N z-5dP>OCT~aFtYqhHNsypf}o>HBGq4D-*_5#Brf(4cqZ4owxWw{jg4o&VgzYv0wUJ~ zu%)h5;yhyI@52Yz#|On17!#-ZGf~J&oDnHl8;FKKWg74(3-j{VqZ7_%c#nu1+~)Ot z_SK>`J8)CX_oIlLNH_z0OZVsV5-2z?C@KhoyLi|}di)LIln`xw>eut#B?wZb#Io;M zMEY@}P0p?Ia4V$0%B#)w`CCVXem^kLIvGjBa;6*q_+ywrHnNAY5p~#cGE9d%SUkL4 zt{^u%i^!Y?i4ozIDUin(9fKgXSO9G|60clC{NNFhP6YQH>}c6f^P&z&x#*~EVh9I6 zr*H#;Wg`CQ2QlH5ft^02gQZgR8V0E-GuOzDl?#&)|6j)3a{fgDs z9gEgNGP8NzKv00RGlr*`J#Q}{yA)st2Y2S!( zee!=lPUj$*WcOk0NH|rq2jJpXUOSu!I2=9^TQ+{PITo-bMA00q8p(Uo*HC0gQeaX1 zCHfXiwL8<(6ej6p_WN#H0kuV)3(DkNbm&bCDjO7*D{R`&8@Kvvq^byFhF5hzd{KU^ zDGs4=y?d?@Rlj>~3d)@bNlH{S+iY*H>^v*gok*fW8o8vnESp@v4xw0@7?ePoL-@5A zwx?qXpMgsC*Hl8k5!JI`k7LH8dcopqMo~YbsB0}K)H63sl|v=R#tD^ z0SSd~l<9GADZg1xzyprT2F$nm3=36Epg5N$~UuMUU@%B9nI;7KG7b#K54j42y2 zP@S-5%&vgaZy#oDx1S@<{uec<$xj6+0!+Y9gLYMiECJ~_fAgP=HvLBC=A**mWlDJ5 z%H=_El}-b0L#PFL?In{*lfZ4GI1ol7@t(?2GMAyHL!i}_`y!dAtOW?}LejI(=>^?D zDCJ)-bj$g}qo&$qkitj?Jz8)^#n zo-TR`h{Q3FUqLsd{;N1yqWfxcuyJVh$9`2?s>4^R+-<=h8Z(#VB}u~1OvGn&x5cDm z3#zmwXI)p+C^bu{w2-;S-1G-$6H&RW#YU4vStx?Q3@mN#jaz1w4#J96_l%<7=OK zvL)~pe1fi1J)N>;e|)$lVRcoKVczpl3$fbm&oR5F=tbU-C|Lo){f$YI@eb&x9+XiO>&FCQkX?(m*rvA{}TB zAE9Yxr7?JWxgKEnRLOkvKJb#fam?MHq(np$*owVlJD++7%Dr&R<cYqvWdxMiG?^3)>mHvHTWCj{4>N-L%A7a zJu?{)l(f_^Xz-TI$=(+aCDqpU81`JyM4PPpE9Jrl2ljYrXcYIw)0(owDxo}N5P5g0 zL5x3(SBLyQVRL6Rt+B4#IkKC(@=+*lll%Cz999beJLJFg>TK|EPNlZ`0$Rl+R$SCM zH+0lZr(JN+8J@{qZAsVx+D0%j(ey(b&+|P@RhD>PHSxZ+nD)TQTIZY0@8dIG>oxZ0 zuq9Tn%XYe-wM+2R;FV2ITAeE`;hCw|Fk+E}U3l6)UHb*+IZ^19o^b4?$Iz;)+FlxU zk$dRPmEf0?XSl~8OP*Yncn_gY_e$6G%`J=b$!xqX_REi!cM>O#SWO5TO}O>^mg*f$ zbivv?A&e1!e&;1;T*gu30MMWPhYn2HsMj`CnmQ`@sc#k*)@0=ll;3^Z*GdcSrbu9O z3p~FXKbT4Sv@QwMTj7nt<^m?`1w77t4c9(j#K!zj4o*~DtGZTSPdmIvSHSOKXHlK* zVtf)7sFxPq5E1KHJRQbZuUs!|d)`)sUMu4~boj~)xCQC6gr|&Ex#=X(r@x~EK0tFn zV>z$3rty__RJ7jq+PgY8zLF&XK3KjHGxG|&(ap1(=}Q}y9G}}gN^du=jbjTf4c7KI zQ*)cmOzA#+Zjg;4Tvl`GD$*4hKEHy^H=Xae8R>lW6XwD$s<`$z%|C&sNt?U=?H1zy zNg$D#<9`rHWMO9dXPKikndpP&ilE15RGm#D1=<@W5D0iM=s3|!A_)`w_(2+o_*A`L zg02i3b;Dg<`46XFPsnyZI+BdL7-Kb+6L^opWC3c)(cwba@TBlK9u#>LTorHT60OT2OF z3eJ`T&o^rVC!IM||Ge|@F*1g-|=M9cm=^DbIrNY{WI zEt&EitG0?`@ZL{J%Oc1>IQxA+b}MOw%=@e3re8AM%IwB@dHIv*5~1Xh7(?%68>TOzyVMYmpa>E0ony7WQdJ_a_og>kGhv14Y~n7nF%M6KNIN()$BzFbEe`*>aQ2pJ zw{ZkVC~tR2Bh{d{3Ag5*B2v3ScXI3)|s=%!8bEoNIXAeZhseoMxPJ zN7h4j9|XE|o&7ga4xnxdI1j zs;oa@h155~ZWQ0!*jT=hoLYt%OoIT}|_vMeuekR;eR#>_qUA8sO}$WI$s6z3JIgo0b?&H=^mk&4jHdxW%!3EBzk>)# zPtmlgZ$FiAXqG`NBhf7fe|tefkq@qZJ##K^%0|RB;0WpG4_}7hNAd^k0N!Nf0$y+} z9R|u8oQcs9I429DPD0lT0-T-itD`_m?2a5nv3-4OMc|(I)_MRx> zTHR8I=p&rVXA*CK!joLfgW_jukN-p!8)U=B`~#`yIyQ}EvMS_yM##i0;-i8`Tp4R^ zsZRsh!m5%jy}3gbweiLa6J~S5Qq}n(E%$2Jh|+#%S>rqPs^mKs`4wEFoTB@Rp6B7R z2y3j*g5DeI)iR@aT#ihD_uWJrKcDZ%Ehkk(W9q^C>)XXzR_EK>+eGwN`iGk2eim|v z;ykN8{HT~L?MyD}E8z!utRB&bh!j#H_~jmZ_z_L!9nK?tgm2U*+A#9)i2c;n);r(k z^P{Wp$Nfc-tM6OZ)D*wh^U2)M7VnJhR+sPN(v`3K$CGhA3E=ttq)3;~7ZYB};<0OM z>thL@?;Q(q9^+a6AxYwFuXm4VFL%#iZ+FihQbh?2d9WaAEQW~zQ)avwj*=xmBBB;f zK(we<$4vs$uN^K(jGKv0c$DA=3;rHcKAfs9;MjI5i~s#)3~?$e4@2kY+n=sacZ9LG z*Jq1N#t!+9J;2k>9i-0I$41+h@7ojQQd4wj(NClHpH5fcK7YUs*3gF|K_`y*4LOg+ zrlG33-tMcC50Xb-#$359~nntJ#%Yt0X6-&^j2uS#Cs|15qa9a!27+$HH|+-rGVqoHf|iIEVo!4|>dJc4aF34z z;+~CFAsyRrjTqW+ou4V{4uvBruBZCfpmAew$<_Le!zU{}=|Q z8@p3>wUDxa*rCxF@n~H@8GnOMW$}BJAth*pMH=F{mQA`)um$2^mF6u6M^W%1W{I#$ z7*A1C)TT_r26d%^sAGYTJ9I_z{22+A%My$V(Wl?`nmEJKF?1>>LZvVpAh=1iPb>77 zDXpUw(*6A>Y+4ryiv|P>dL$r*2Wlk11i-phE|mrDUN@Iofp+nXG*g2=GWh#`Tb%1X zWV#%wl@%m3#B?cmB-@bKE_AvMDV5EDVkm|@CK!m!k0-^NWZzF53=hdoWE;s({P$qU zG$xV;ac^(jWGBik5I6`5lstie9}p-A925gV_b)59<`__nZ+Zg1fPo>vFk-GynfDz$ zYP>YZLpnCMN~G~yZ(Oq`xReE(1O=dhNx>4n$qW4_uy*;3f&3@t?{CRxtwB5T17pL0 zbHh+9S7V~6T2T>XV&060n9_OjGA;EX3$l@d0IUH#=`4|Bzkop@;4m2Uy8i*pt<(AO z{6&b7jx4+D-!n#Zpl7DhJ3boQbZPz3C9u8h9;Z!ifn;Xa|27rjX4210{MYfB*qsOv z|C&aOhj}*zX{udQ_uAh3rWzyqL9~k|X!3$o8sa}ELInYZfumr^?*0X`wqE7WBj5)N z4uOIpuP5NAK*&G^CKlMe45pWbtrrtKY_xTT+_EqyX0b-6pi9;J1VrYTD&bZB)<}fD zLFVuV?gI#|O5XKLgDgO7qI7Bl4)G4dE^x0B-`$H07mxL+6`x(>m(SQaW_;AU<9@DIh)9xw!U zO2_~kayz3SAD#Y>%|vA`+T2BUni7Hq7{#)A^v7=&oI?JS-kcdE(<_gsW1WZW_!2K0 zDq97Kbay5;Ehjy>3xKn4#-Edly;m5W!zz+Z%D{NSNVBi7S$0#e*NFoS*%WR?2Mw&#)I{e7~=EZ8@ zsAbups7~1+F3?=^GtbUQc>cLc@=h>evVM~wiQrh_7tT=z4jPneE>SMEj{T+`HMJD? zqURRA^KJefs`6Jbr`m!Y)Wxpg50%-Qs9&Uz;{PSv9x8E`+8Rq-4{|meq=L!J48g6- zvm;UKYy8<%rUzk0(FC!nzewYVzmc=9{M7iWs)+GdYt~q8PAs!WNBUm)VqfWDeyF_F zM2yrPdZLKs67ykS#SfWDi_aaHw=P`+$2U#M7055ww1aXkIIgm0j@E@0RcjbwvKljj z)U{!`0V=6mlloXr(_si2f_9>i7021Axbbt5mghB~Hj{k3}J2RmDoWIzxL5sZK_j8hPFq>38Rl#A4C5I2pIg`u?cQJiD z2X>r?zf2DWgWYF=aemq<_b7miqfWHtx-a#NR6s|`eSZon3)=%@Cu=5w1&2l@QI3%p z6at5~w_&c7M<7woD&ok-ktkk{S2`b|%7^J$-&lNw=X zy~nX=9YRY;gMc}Gn-&y+1jhXfC{S`yi7vS(Am0KpE_Dn$ToffvTN^!iRCYEyi_tqq z7Pj6O@*-z>l33d$HMWSaR$9jfj3Y2{51$j%t?}5w5c~c0ib_o!{Os=fl&6C$y6Q!T z^TJ0>_Hn|T_tBbj<6xKY4v5BSkUvZv$I3amyGI356Bo_CdSQ)64%WR`4;QukvBP1N zJ4+?kcI>3`$c`27ckpuk!$gXH%!;51WJG7cV-1nAr#qTTK(qX^KA&6K})bDHvWUkS+}BK#~z(9X%pYN(EFrhlsJ$VeNT+;2n*d~}ED=qauw0qzrsF=q3N&Dar*f%CT-^c&LI zzffw&DQP2R%m33mp->iG8dhE;6W2qNf>XOqwI@5WRNVn${;&Rh=)egUfXEsuAl4i^EObum6Z|2M#Zj~qCkg{ zWx3d#DR7Gws%&7Xq>Pz9y(RO+e21x02Ti>Ik~U~ZlY7BnxqZAf#7U|-s9FQLkj7vm z?n%;1EzVHw^ilt}(dkyOS?Kon0a2&KLXxxG{s-wjQT5jpMrIaOc5}X3V2`aHctPJ=e0pa=xs&sn7YL01LeC<*dC?UmK6pxy56Up~@hS z)H^-SQgOl9Z1a}7fm6zPd=NRSOPJMFhgt{`4YLj(avj|3RMEI%ZH6X$=Bi4akp2M{C9s)~oXu#h;3*T)fxr9^G&z)L33fC=&F5ry zJ`w-AtUr6y{d~H}((Qsgl&mM<_kMo;{CIsB+xob8hx6-;q>{A_h*WQ@9v4_y{>%E@i;L@HAu(YqwDR26Kdc{a2h~>!VT6V z_HB1eU-slM0k8Kd|7K)QX|O0t4m*pFZ|-UQYtYOzF_%3t%#1NR%uNq`Fm_-NC(C$_ zJ_5X>S#n<=4&LRBU39P~&-z}@kZ^P`-VrmqQO6|&AOQPhA}(PhZd{GcPPv9~uTTTeaukX`tLT$>)OE`Py%GA`xw8ugM~d^N|u+ za^u95XQzJ%LsFB&XLMfc=1o(2;eoq{3Xwl5p*W?D`&}_zYeRI7b-Q9d(SdFmZ@0mD zML%?$yR+Vh5t2@hU!ioG_)I;K-(AH2aB^!#XZ0BN?)}C14GsmgPtQ=im%vbd@K?69 zJQ;;6x~_pxU&USalcT(u^p2A9uZ0)dbE0L@>TrGZKDr=nxM)l~W*!r_ad{I8<^*G2 zXQ`(kO$V*A=lBu2HI}D7E7&*WC(>)FZ9q4@-)|y=unR8sU|kb9onD=dt%7O`qfWWS1r! z7tV9ZYU-X!ur}m#$!m_DJ+SESJhJk#@{{tDPNynK*fs~kM}uAk2kz?q)?3!&<7|W{ z+QEu=iMM&PQF(${yzegfVo63|bbGH6-Ns;a#CG7V;7W=Nq~PdO$#EbD70*=ibf%GH zGhA0J>biS62o+?uk-ie}ZBTmTzcPSaK$fBZ4unYl2EJ(!QN(Aoik`G;iUgZPyc2!r zo~ePlJ*2;wlPQM#Ju2|;4T(G&1#H%!=;4Gmz&9csrjN zEpqL5z9qKWkcv$k_nPgX%8HGyDE=&1gP#I6#=keXqX@?Q)(0FDnw;*|IV*@2>6h$0 zaJkGOlLTA=$NvgUDe}w>>Ic&0$_S6V`ntS|gCx;!D5A^!tR3HSiVPFL#D3`gv)T5K z$zg+HlLo^k^Y7GHoFk$*Ylr%i?i&(b9!ykRJJAMo0a6b;O(*a#;A_N2U^XopUqw)_ zS062(vhYH5A-C<_wLCny$hUb2LF;b>Lh{&P4T4|h`tQVfGE^$9pf0V02E6FuLbc-? zBb`HWP%8lb%lU63{+sEE3e_7DIrq9r-MAi%3TO9b8tY9^APniSvD)U<`SHAnyM&80uTYdE5N}yJdW0-8}U;hXU@jH12uOrvAua8+o7TgDj=bp34NKrq5m@6v|(scGcsivF25}9 z5T5n*w3@dT%9JU?=ctQ~^~W z?SBTZ#9{A9qGkC9^?q}`?CVs)5R;>#6ns?%8%axSgoqjGxhxct0sm!kSTH05{$})t z`l}5MmKkdv>M>Ti=z~6P^Lb_YP=vSe4={!;399_sA#Sn$6J&slB-^NsLK1NLg5}q? zT&pc+o~PQHw&9$|rAW5s?S4;WzdBDZPH3X<9TzfKZe&WJ-g`S?8~Ow1=xfx%pRA?L z=l;{wv$yeT`rLc$a#H>2uwY%+T%YOZ4L8-F$$=r~6<8oL;Ds#_Q=KZGOW!Coov{k3$w_ zLxkjhNM@@-#mnOHrHkR>6gV%rr#s6!TYTJjN8^V+G7knz0G`m&3ygLGGx8og~Nm& zCYcpcT5=RC<9DIUnqh01hzHWxPv>&J>U=0ATk_)g9U<67Rc2c-KMrS{JSsLjXQc-& zi;u-8IW8Bx5>qg3p_C9z#)X8OgpFMw_wrqp_Z=+wgZq)3Oc% zCVL$ort763*vKZIw{I#?sxHa->}T(>tx!&lCxeo8Eoz%)mOSC2rj;acQ$3%)xFbMs zrrPm9I%XOVqyb{@EFWA_{DjV>`w!8wH9>2=*ZRnr=C>waHyZe53pRmRM6*CiHpS$bv8fUN zW53&(jncN-g~F`PQ?cnGYSg*BV5nrEvf~WS(pG1EBv_GUZOH!a>vxgD?3TREmWG+; zSW^zkY(i+?nX`MJ!)!RvGUc#!#6c6>%C22*yGh2YkTP>V@%=PUQiI;{n3BW|Y;W1Y zj$Rcz$>+1q&}?k?BJt%t-$=GxO)mtyP$9KjF>I|G3?l# zAbgSh$IkXcWUn~R)N9yBe4w&23lJ0W!xe>as;=DaPE4pKfR|am-F?wnneu)`WDhAF zfJrfmE&tRLp)RrccC#Hi3Wj1{a7JaW&7Wq*L*&3SaHmMePD7u+{E=?*>6!YDXc07F z>eERm%J)RcoaiKez(t8ylX^YPRPkMr#6vjDfgx{Pc|Qo|CU`OeN3OnL?i2VPULNPa zr&=&Fd_4#l2y6{3V0d`wmEG-(>E#S8l$@;TWeJ!V7``F`4vtO)OpJ_7|3h$qiJkqQ zWg|6vDoL8)+mEPU5LJ*x!@%Hlz3xfX_R;pgk%SYVb6>AQetJukE?mhx%9}kL(2D2L z#gdkaOpYHWoh3D{JFKOCq&duXEr?03N(wRSQBT0HX6MRLX-=4snrj-@up9S@SqQ8Y z$4!-Lj`980+_QqPjWC&S|1rV`&5nd$`VwcAvD%oPL!Te*N-ytCb!Z^G%+wrSe6_f~ zv1m%=s$m~>^Nh+lR3Kz0b zazsYEJ+1&=6}LW8A)IA{CETizj&20fIhSR_*%4LA8J3-8*P5tggl`xd?GBJA`g>N@ z%A!?RnY}y{?-Vt+t!%|F!2|AvrNQQOypg;mN<*IOCnUFUDk8-$b0Vl@RLQ)Osf2e9 zO=mN1(k_k}h`g!9ou7p+vXe;zsrt+?rNIQGLy+2?U$Jv~Yit%at21unIFby!Ly(A4 zKt89nfX8$h;%TgFn21syr*JO4reKi_`dr<4z)J`-Nh|3@ll0bMMT;<+gJYOTQ~sBS z)``LiV+ihtO)7#~VfgH<2((g}O=^pa#sh_|m3eW1Ohw_42n%cTF~r)M@m#{KpnSM> z?j^A5x!f568a_&cbb`p8AM{3Vq)eVwZsl@*TG(U~XKqQ4kjFO>C1K>JSa~OVK@=JI zf*ui}Jb-~DVJa4gHf4hQ!wRH+yv4`=VeB1%Jb9LX(cQ6a+qP|fXJ*H?ZQJ(j*w*gY zwr$(C-u%wJFYY-n&i}@X&Zw@g>WHeY{B(9@Rd!}XM4sN|SZ(@c+#re3XGAu=`DJxP zP|Op?y|uJ3vn=|P413(KDE7mTQj^r6q!scvMB11$fh;n4Mm^V_r+O+>DjT#6#-ieA z1Kl-sl3V>TD?@2n&(&qBk*Bz_KJ{gw4Ha=KN9zbUQ$rb9wz@4!m;L+keH4%UUabImg5d)v!PbG8b~!+Op=(`FKBo++9vE6;NMdxQ@* z^Wy79l@Sq>(|{ts924#`QPIWfPOD-{UnUEwDmjiaV$ctZ+S&+h57HN^w+7R?HGva3DS0uKrwKh_p~ehO0h_?;gMBI2vm{G1O?kRi@P zW3TwFttrDGh&mQ>!CBteTv~#qtP2=-dFrQAPE=)GP(paxk_)%!2wiAr=*G*}ZExk} zf4@FBYr5+Cyjkn&^lqXGs84%-J+Srtyjn}``n=`{WiH5VSGybDUC9Nsn7Q<-#15L;q|(zXu!*>RWTZKA641k#IGW(rhO3RxG27lCoKW>CeW3`z zDHPQDIDQ2+e`3Rs@q^8_SmZ``BsNO!e0=~BA{0&TyaThZT+$CXsmF~bCjM(vA{3_^ za-;~V?_OCIoFPPDL4wK!BZ2I>QA%-Cxa|nHV+}w@Q`_ngz z=Afe4pu)o3VZ`hPkYlOTwW3KZ8iGBhJ@xJ2bNPm=1_z^d_Qd%?V?a>iy?xCAinh{& z)TD1Sb@CD}z&49$iw3?bQC{t09-MAo3B)8KO7&0Zc(QIiVyU+mRxY!Byz12Ss_Vx$!0>H`8|*;e`5@ANnp zhNHs)*8|aE30i0XhZukzXc6D4nOqy-n&U8Y$Hv-TA)+9ESX?wd7KnKCCR+@ zu~Rg?^{GmU`3@KG8|}0;h{mTT!itOj{3bg!Rw(99nr$yosd<;t!V9lJhqjBLsa?{7 zizE~kteg-*HQO;E+#Tk$m}a!sAS$@O2){!jn8&m!Ss8kPR_tfn37Z3=6YiH&!#Qibr} zrwE6x3$G%h`YfhZIrEt^GvvJH_05?kzgaiXBHp!QwxE1bp`L#V+i(=fuaZ#`l>%-p5(SS6AZUR7MxYD! z*-mI46bT~G1U3I_hj^)fV0>MtXJi)IPX8<|^(ScO1ZsYSQ|McMy^>&j1=oV^b-}}} zhb2Sbe2n%s@$r8i%2vwkC7Xr5`~p`}zL=E%A4P=Bjcy6bI2FLPIs?a~+x3~2 zH*pG9>-r{!f{^jg;M+dERXmwA6BKF~?Mv+l3PK&haFF~1(4?2ta0JC!=Atj%?2Wik z)*rb4FNvxuXHYC3Jle#QH8ln}ybbZ(=LdEeUVZtVbYSx!rj2#1kqG&NqQu<$n}dSd z9({|kcBNin3Jxw*o_}8OiFkm7x?d6noPQab zdlwi(1jFQ|`BrgO{5&rG-^5pV{`IhgY5ZTO&+PyIrqAsEx9Kw{`+u4$Yfe-jG{SBk zQQm_Q--sjm69~i`vkOjZPm9jzplpnzv?Pjd@fBLV;^5=ArkFBrCm&3ai24*7XC*)% zB`J-xIG*wfj>Jh-kl6v1dz7)rsSN_;mm|MjpX@SKFZ45nP}ny~78Q+-dDF7i5)PMz z%L2)Cz~zzkfab2vp~v6*dZ+26{E`Aq1}yx1qff2&Fu)6}RJ0~L*$A@MQh}LdlOSWw zkcdz-Z&^F1G6a+~nIJDb&YDZ4MI?a^_4D(7#5d9^_dq_QH4ky zva-(6o$-*%k`dGi}|}gTya8JJ9^0i(+Jtw4${j}sX_b) zOR`guOz*F-otR8o2cjbQ71I`1(C z5=BWg9LWixC6UF#hT)ksX;@lcg=DMNeHV4+E(P4cG^{hM(qBpy?h+A7nwZFh4PtC& zimKkqiszd{hEDpc00`F9Rz4NdgZOM?i6oEjvC&Sg?iL;|+rv8HiZD7VfQH>L#ao-8>U@V@s2z ziFeT=6W~KqRB;;EL*F0*rr^6&@%Uju-x_9Povp%5kQtZYZaK7Gk|E z?QqCiS5b&n8D;;v#ZVgmN*6OA9ip zsT~F?msi$JWSU5uOG5+&d-dl<^~K|PRYtKFuTRBB^(lVjuoK_+{kG}r<7sb<{_FW^ z=qNR(>*MC3Ed}c1?g>6QWs#^vx9k0Z|LgT#7Fg7InxEFCp}bmgWAGH??M;EIc?|>g9UK6xD60iTI8{JL8|b*#e0hu+=@P?mBv<^Ickwds z7MuA`kjdk_1)12pA4_0B>YljEWWs_tL_8K_&%Fbn0E{BZ6tJJoIBX+R&xC?36ROHe z;Q+aSiPC8ble~Zt@i*Kc;KU6;>;TyZ0ww<5%@Zh;%ItZS(AXNpJAi3x@|YkPd+k}d zA$;I!G6=E=zmP&KRc#DZbXajS=gQLj$YHog0N4xCgIj16qbsupE81i(_5fBauvn9W zI0RT*?k9vGQ^49_?ZHY!{w>Qw7|)YyoF-)oM7j|Ug-p_^HhJ76omfjdq};sQ7~iyb zETF&AoVd*U&FDXpxB3{C;F%+6p1Nl$9=P$Aj;E{{4k-q=ppp+JVg^RK3vSL#@!;@& zuDxp=#i1Y(huV09dg@5A`K^5Di2K7lp=qe(*GBgWM5j@Jz*_{-#bYKB1m<>wNKrPS zVKKExtK|DRNTHAp$q;J76Z|hKsRC^@)mrXioqi0dy#Ttmt`sL!mcuB;dlyHP$`NcC z7wDa;08D4$Gaz(B0(YP(`r+hFe;bXlm>j_U2%G1~tM&P3EDteJT1;VTv5|`?vl&v` z%Mm+Jffg~7!rTBRfLG&!sT$($cidJdhqAE8s=5 zDSX84(uiEl@$2gN0TF8|SIaa4w~Ea)0*z6WTmO5-)CN)Mp2>gqPS%iTNV9+EBgg`7 zfqRudVABL}%4@jjU3nw=*@5NI%MjX%%~lzJOo4O9`8{oj%&ri zTZqu@@B|_u!ta4V^%;*Yw*)O~@2>Y87})N3`e1)ES9FCdV%IZlhYizVJj#y3AIF|| z3}$rUj;a&6nJaR{8)e}R3mFE7N|zQ9YARRc9q{(AT6(&&vq%&b@(3(r(a3NhIMQ0t zomn$5&?{Oe=X^6ng?i-t?Le$}X^-rGc)JH873vASkx7w`Jn(Wfd$hTmOsRK9@lAeg zl%qF3y(pol8^S2R1zRRjxHT>&QFsl$|Ihj6ZAutrkSX9en{k&D&znq?GcWzSteZ4x z%o%0$rI_&(4#nC{$*X>$D}blMA5khpa0R0GQ*9(v$|bM)2VE}oK2RG#+l_u@Zf1zxf<^Oo^?N$=$APA>I167b%S6JH_GiL_6>GlBI| z&G(YWbo&_Xm6P+HhWUrM?)&f*7VgZG^SO>#j$esins{9bj+zR5S!yi_)|v|Br6;L^ zHdocA-|8zq^-x}_Xw~sS2ya(Qv^`aHjLgtn$61*=jay>A-B7xn08 zG%PFqGCnCB?G$X$GJaBVPcAAQos~=;_?8ZKkU76rfT6@QO1)G_Vkz8g^Ey-#D=83$DNJ-1#=AG;~YwKW+;SdCuLBx|(@&9jRX6jrK9{AY z+9J-25(@g1aK3H_8^Y?fyHOb3LSGu+K>JYew2LDEWp7DbI5GBPK(sKNa zsJ%aP4rytZc*KWl1)&BSwQI1RWS5JZ#=T0|cm(GRftK`p+q!5O9$yN&WFaI7tx?m9 zf=)t}z{o1J>IcISegX(sNm3G} zZnS|s4-8Rvs19_=(q2Q7O=y^?KkMaVPA|NSF=!o3R_d^t6E4s9@5eY-lsqKR(2o5j zvm0X5rBohh6G>?(e2G<-pgX*9GH|)01`Zpw;H4|GMNw3xMm#M7tf<_TjRsX#z2_gk zuaXux;%%8gBU1Q)hdj3`(ncu>8=+k=ju)lpUyy+Nt54|sCw(!nWa+0Kx~2rpcp<9p zN+FuPqq4?_i%x;$s>vZKXc?C#QDNGtb82(QhF07#ZhwzS@w!a{sj*`fXJ6spS6&pE zU8*8d`*N2sSgF!{@&Y%XzePrhWpE9_cNU$|*{+;PY!cEjw3sx}OzMBr(#Z}QJo;tE z)j!C9M~q?VFyr24=}o0?u<&yzE^QlET*My&WJfO%u?u)rr$ZEY#K?>jo6}8ZC^#1c)oBRF8Ii0iS-Q$M`dZ+Mi<-If#mDEZT{Eyw^%2Kt zprhsMgBl5bmC@j6c&ymQ&~}XDk!g-sS4dji*b8$er<<9;o0bQ<@9cUmxH6)LBAn)K1X#=4^0%lG))hUq13cuWSp^R_v?;8{>i7 zkhNCdi0YN6VqW>44u@89oIh{et_D`)!)68C11^Jtz98xO&8wtXXxz7$s20W~yQRkc6DvOy`rz2&D=PM1%A)LPu7E5-{L{qtRBeoy6xK z03mcft^|cyx8Pf&;Pt9FJ}CsTRi;_pV{JgMM*tCTE>4U71*SL12Lq6fm=09R!k?{& z=&i8@>eaU__?q_aL-N|DIhL+x6@X!qT=5wn6#nrcaEVj~0)Yqwh<+Ncv3DY`1LLrH z_kujvePZGnc8;skQkirUyGK=FHxet>jY0&}hSU`ZgSsv72DM-D$L zZyGo$wa^p6Z2CZP5*3W5*$*@|pjYt`dmFyCsh5HV2A**?OhFA}n1CwSe_Q~}nbPo5 zWz(){7T18+mAcijiD+7S5LEtoL{YnE&spo*$s4F5htz7tS{OxyuP8uM=p6f0qF4B+ zEW}|uVBAy_O}Qh@YU688IoIWXHM)B|yvJX-Gr#Gn23#0@)FryPm zmx`0pdHWqvH#&oE)#hGjnSTdP$zS}|H2_!ZjVI49PcaPIF+2rs! z%zpHgw)5nR|D@*IS!U;n$*UC4P=w3GQX=}aiqSQRm}dNpicvi(rnTsI)*gfz0yPl8 z_&+A_If1{o3WZd?TRh=Xluov0FIoep15pbtuSdTPo^7$rftS}bA6VbbNb0&@nB0FD zy6+8Fw|4@nnMX6k)ME2@=p@}5pm3=dor?!ECW^DLn7;$32>x~o-iPHp0T^lXL)ROC z=SdHgH>uwgQ9xgSy3vn1pcrSZaF(E8adDf6^vVN9H$YbLWYe2KKBUyiLtBGh@~ZzR z86GAGzypNdr_-utr68DD4~xXglnhUiyaR}GFayO(gH~KT=Je*z48!_=OB?tEB$!a# zf&^dLT&Sk{aYLv5?Y|}5nEhZCm+m5V2^|GyHrMI7UkyXjF#U!z)W&4a`)*~l^>7r? zScXZBL&;#FJcYS;08<5gI9_g{8@I2HmJlYLV4g&scKjv^)XDvC)QCcPzSR8s5cm;Et`;QQmSQ+|DrQ_1`rc1!QB5R=@p)( zl7VMAST@HBDO7Ie@t?>crNJu$k;l9Jgnj3xEAZ5nf9lM>)H>u9=W=~ExVyXA_OL4~ zNVwGI&$5nwnS-j@@b5uRpuLm3`5}6lV5Ko7{}KS!I9!=4om~;n&1w=FIgE_*IgW83 zAv#*7L4gFTEv{gM^IU&?E!sGqkyq~$`uotv_eKG7dL5-*PxXHhf{Li8;!O6hdU9u4 z1dITIA55=-5udqW1mFaL0hF7f)LdQ>a5?#XCCAs4Y7v9_g0m7&xW#|yB^+u#?4!9) zi?Zb)2cS*<7g>N*5SJ`zE0%b+sEhVW8|-V} z&9$M4qD$Q*r;RS}ybkWDrqrx*zdsB8az00!kXJe0VEU|-I{K(VJl_~vi*y7H52#ah zexEkJcfTBVdpQhWbk52vB&TrA5vEtMHg*4)_sSn^9~_u2V{{y8muD54!Gz)!fV@c* zSgJW=PaP%;vP)gmJ+oXsv;0xD72tZz^Ve~5mB`uUl4R5OoGbRRxeOhTV8|wRD8ts3 zVz5q{oqhg`g~KVDMa5o+#NhJRd4vc}0g*oQ0pz*$=cmQ-V`KAYY7a;KJ=qU0<-KEt z7x>j$O4tvv14sw)hXOB@)i5BTIv^%rNGS#Gj(ww>N2Ga>X4W2XNX+EhY0PkZnshD` zF>b`hitpIQQDi|o>A&$RS3W{P6`DuDbb)IXzOCq)GYIhi_DFadude9voTg+8B`T0O zV!j!4u9a3W|K`>$?E3A;E&_a z^A0v1^5W0lYTHe*!3(8hSk>01*DIC7q`Eo z1tP>D0+CP{goFZtNDzXhP^G;Pm{29;Fb6YmshC8c2F`3dT8R^^*{Oy7Xde>7=5*4} zbDhX9c&zfJlK-anu`sg#ANwgWb1Nrf2YN9peJ5iPV?$dbV|p258&fAU0#?TV*y7Pn znz7hpKoH&fK=nBPi!zi#+JFEPj(Y{x*j8lD-~A`KGA|{1muLTKX|bcQHUuQbq_BmV zSXS$NtmBLfvFkODb6GNzYsteCv%2%ouGv&pWWuj{ZRYr1-?=426m*Cf0>iEr70Q3A$bBE}?Ch9FeH#=jn6@|lp5jIjY=*pfYspn?r# zg3c;_xf+S3bs!4lklw>CxkzkC4sn2DmFr4@VZp?>KoNFShctE&A-E6_+KB9F1BucE zp)J;3Or%}Pdu`%uLc#!%1J-hq8UAP~3MZKY-|yQJN(3T}c;-d(uCSaLN#;cfU1b-- zOiR;6762xt>HSnYau_P%K{zN>w$tXqLM5n|L4rOZ{cqtK8L+muA8Z+!Wfbx$wtv@K@PFj_NOsQTSJyxUrh2s^y^L4 z5w0yQ_xg^6b4onBwv;XTf()^;7gKiCIldr{Afu4=y|! z1t_!dx2PrGC4vt&`Z{5LhZ|q^TC!2ct2sJQNE&D<=}iP8g{%ij5+ddml>UZNe0H93 zE)o_+be<#v4vM6p5&>-V{W0YMrPC5YYvS?eHf6yUahMMYq%~}Su8JRCZGuP_?DzFN zjVG9OuD=mT6$l}ks1OaM1+Bt{dmwo;IS=T!11<&ma6SqSGb9|6*WB$~$ze88UQ`^C z(=vdzY=G{l_b^)#@ZaR)G@-`ypi$}l5)ATpmOTjj)Q+&PWqp5z{c>O zVkLRQVi$lScI6$R<$@7Gb~F_Lfkh2*F%DP*mq;uip2x`7xxXMEd94)&4NlHq`sV!XvS*R`*6f+!~3v6O?B&1zQoFNE7>=)Q8$~e?I1B+_6Ya@*qvgmIaM&kGyg=u z29j5R+N_5U7_lcZOb>0^BKLAvAojd&I^8=?vgL??>5hnrS!q~k-v9@Zfhk*w2Zcj4 zD1PQQ2Bv7Lf}asdZx4@<1AxxK?>tCrczpEuXF@y#v2-$xm`+f9(JdM=eebZMd}KWO zhy)4o0TD6c)Ubik%^lG@j5}Aj0P5pUm42S}PS>}8xxB?kOyWy})yWv`A z4i3?7!mxSM(cq))V{Q3GL6OCn&wC?WkyFy_dUAQ;F1G_okeVldpPPM5k$rO~GIuOd za(VG3cMDvR`BlmQoG`q7f&^f9FwU@F?&a9O+!4iMG{B<*!gL&*w7coU=B0VMYNtJ& zJX3|PnspxMBye$WzZTa$m?}G~EjIR+P#5>T@znXFxTKa$a#=!Y>H~0Cf_d&4V1#7b zeMlbb-q}XSEZ1BDoiU#KhA&Ib@?x64f)3~J+d{7R<7P}4{wq+K{w-|W{|r=CR;K?D zSV;<&YYZr2TX)p=%ZyT1V+k4%{%qz1(>8|YPnWAwCT3Q9B=8?kj!t~948lM|36*!+ zW3HX6)lJ%-Yvg^=WErNdu3fw&Ma3q(=K)G46>Rzq9?k;cKcy#y+Zf}pRBOT_u*&{VM!YsjVZJXZNlQ+#5j~(hXCWGT8 z#uq0%KIs{u#lEpy)lWV#vN&s(dN!LXZBC}Hm?5!lQ5!2pbq7qmbVJpb8E#nRTrtY7 zVRfQx+R}B)GD{9(CGw4E?in_sZ1lENtyL=4If5vLRixGu5JpdrQ-FjM%FfJ zgf=X|{e_FG6lI!&V+xd7NIWm%xgvCrxTYE58;~(18p3#>8QB&!q9{|81fx%Aa7k?l z(@2#^Xm}(-QXj{`9EBADqbCYHxaVM!fkuia3>yXj(8WW9xa0D2Z)0FU>0+J$af|W8 z=KM&Y@srR;b2oT6`y&VKEcwxGy}} zf+AJ85BGmfx(F=eD;c5xqLtnLVlTZVV&bsCz2Ar^ZQsiTy#6bloBtVa%*_9>lCGUF6A}2Y z`Bnsvi+V)5${HwQt45EpW$LPr0M<}7z%cAF&$la`+Iv|5h}_ZEBrQB+-@H2AzlFaz zkrcMl=9h8l6`mMU+iaCW%#`}Vus)gRsEXN;ESwN}KItLa(44A5yDz?+Hg(b!?VaE{ zc1wFEGrtk)0zytsIz|qs{Fo^}AfuwyP+_0pFnh4+t%qmDK-F2*BjYlrm}ssPTT?4x zb~6dS>S{g#EA6QNkN2dw^WTcnC7}ewQ!%;yXlfG$w(4a<<&Q{5_(n@w-{9Z-pGOo= z?G5;vQZ&H?oj~>oNjp&Wp|;lM1BlQ9bq>Iz0-Dm6Q%LfHbyvXkprpCDOyi>{e>#e~ z!Ho%?ISdGytN_koFxbCvg)nnZ8LOfvf?zVb*=#PS=X=fXYevRG8TSazziNrIi)Sc2 zya_i>MvR~EtHp{7{ySIx&BcI{vw_n;KN1K_iip|TIQ{ce0fX@WW!r;|ljT1nOlv@D zAuqM&KqLzGn_&i~&HUaDXftbYuHn9 zh(a2ECa&W-GxhU~De3(v{+wx@?Y&|QBH~0;l7hUPp0osI{s~2*G+Xu%wDbcw6%0gd zFsPq|k6(YcpAvdrA$*2Vu!nKjmQZ)X08^SV2eY* zt+6u?Cagk?qBzwDaNtL86ZOJcvL�@}Kl>vuGv?4P5LZOkTkjHV%=3C{^)L%8{+( z?rQ;lSv@}{w(s~H8kop9rCRT&=?zl0&PGuVqQi~d60*4t?`}nk$QY$CG2!9qI|r!9 z*ers$xcd!R<1=o-uJW^PE0@?;AKxE>p&GSTy_qpfG}$o8Fa;Y`acW>7!*`)xR^-o> z;;ycOVRUiW;t<8YQpR~T3!np0+5GGhG9`LNr84t*CkrsvM33-v;faDnCFs)Nd7{w_ z4H??J6os)e)Oo2>G_fMpr%yqE=bQT{uHFO?ruVL%xIRT5M|Zy5wtf})bb zJRDW}EP(MB4XXHn667zUWD!!Owo(-EU5wj?I1Mw$cw$U1GRTDWi-V;z>(Cy!Hr&r0 zjO}Mo-e@+dR4M8-^vqXoQtppwPm!yjP4vtXj-0cC%encZMrpOJPVcAD*U|gGId8NV zB^OVUUkg)|*>kN>)n%3Fo`&7|KU4P|T1F>kXjd=V{H4J=*{07wGd(|Y%>%2c*r+BQ zH??q=INdh3s|i)zbU(qV6ST$9(##N>`lVaB)@k-Iv}Q>Qo{UaiESt@=T?~r-?kc;C z$cVGJTmd#ta1jSc%8GrRt_sXcPPiwhpwP(JVNwf1orst)pr+juxE4iMd*SzPOf?Tb zEsivNg<8da>IPVGZjuIX+9jpvTc=Q#OX3(fSc8FIgF||1S=A&i6&Gl~NAUbouJN-w z{CtOAHiUJV%syR8U!I@UTGL5vAumf}Psaklx*nKqJLzKw<_sk^8H9#!qkQd<+or`{ zpsHJSu4~-W@&e&xEw(;E%$KblXdZE>7 zYLs94tD(&`@u54iZ&#VW)^j|d<#(!>f5}(D^Zd%MK`Gwqd@ArO={dR;{RwSnix(T> zp+@Dc$om2e07X}+_>RNk zfWh>M%@bs5`(`BtafiN*5_n`hO?4=Q2!&Aj#lXD4y1=UJnYHMgxq!Fh=j(wk2C+;k z-w9f^Xm!LMVk-r`hi1#K+$8Ns6oTt>`Y`7?j&m=brcE`hp-78>2A|Fm)+9ma7n)}3 zax4`H;_j@nIa$wAxNzsD#g$T%(@&exe)PdAWaqi8zKse`U6aEzwAKFHypQ6F{Q9~R zOe@sd6E@oHVPu9tkWeQ6^5=aW^uCN$8tc%W16aPB_}b+hz93xCX&V-1xcj%+X37E? zoK<3dAT$k_DL7-=bG}UEY{J9qycHiIvqd<1C@(@3w+|mYSZ{a!U8_~$(#gG$jm_w! zS@2d*;o$1yZK5lK(lgcLw_7lVK=7|^P-6YrpLSHc#yNzM&wkDJ9JRZ88Q8Ji><(dl zd%5_JJ5_U@UhLXXmij36&ZU0fMf47BL9X>_M4+AhgQf23LzDZ_0w7L}^a=Bl8kB6bvCXrGu=XAtjqY z|5Dcq=elIrfH54`V1BE##GN1eD0FjLe_V0n3ndSDX}=#r`r-`0)Oas+oO>U<(fN> ze%5PT2M9W3(y`)9aBHm{&THIxWCgzsglX%HAsdy6_j_6=BsOhtXu=s#R>lSH2PbyE zy|6!Jao?BihA%PF^aP?!V%}NIQL_WN$#kV`cj);49k#bC>lHBMO`X5ldcxTRA)D15+S-FWPP=8-G5tIy!#pLY$j z5Pik8bq@TeDg>j&1EU>NwCOYw0oP4na&Y^Q=Zbf;IQJcqbA+()@w;E_*UYx4hNWHM zkB$>f@zsL0GXACn4cmP3X_L~*#fpJC-;UO0q~#-&tSn{MRhLxUqsSj$A+j~?K}_%= zSwDb}^NJ_kRCDG0u-4U8tIYf+9O7i(px{>;8Hr^E`piO{3z^{9@}y#%bFntX#Oa~I zE#&ZPRL{kX%Xmgb%~yClPh@TnVOLq#Pos+#GC+h)stHr2Ma?CF_y$P`E;f;bbtD;e z6&792p)dKc_$_~8g}hnoD%`k)byJlwABdlVJi;tA7MOdAnC%u*=Ew%~@l<3&Bjc?H zeg;IP30u?;UKr+ZU6fceD zeug+n2MNH<*vF9k*&|+mjt|nprXivlN$pR&3=TrLuKwo?ie!W~O0GaeALo%VE}2J+ z!Cs<+HeEg(UjA-RCAPe|QxW3ZUlF_(ihOwu9{(M^epLUxFNjepe+7@@F9`1EMzS1g zVNzwFQVh(^b*QPWt`#WBs?)$~@XJacsJk4rP5ms285+1$c9O=|viCitJ-5YVi)(m> zSBEs+x7qw_Bwxp{xTH7?oI=2YZH?^VN~nhH;%M3eR1SPfH&mMaQ&om;jYSOI9yS}D zcw)v>Vx{OrFQCV29p@)*4o1I(~Q8m8S zR##M(HWqkjn4S2Fl1EcURuDg%!=LZ{lzP8I{fD?Ezq{Qv)%j!{bi*?5vDVwblS0uC z#gm5$$}`Xv;N77;wB@-(`ljxUyt9~$0b#G}q%>Z|@PK9lQYI0o@)9@rPEgNJHmg33 z-6h>H-8CPva+%@|%&|?!Ai<3CHCUfqD4hj#OF4#{XvK7i(p6u%w9pMIz(_*{3b}F(8*^MO@#i zt`cF0`Dp!~AX|C&2xPa=c@bI~zUDiVa$WgmxjS`RKnM=>(I*7_4j6Bm9c6n=9-<8`$~}F7GP87xle_K^S?i$bRt@9ZyP7%Jls?@V|%*8pVv=lvZv#HvYJw{(W{8@P(#n5DXbz)caGk z%c@wIxTlbRURqo*WYqU9DSp6`6C->8; zWpcBDux*-h{c7{B{*p)d?NRtMb1HqiYgJ1g2)c*iM_u>dDTz53aUV=UPPxJN<=BPw>E4|`WvRYWy^c`wII7gj}1zVZ=5%Rb{sx$|u2 zc`59dmK982g!1Rt2sr%lX=wB_#g!(4p%zB{3te`h{jqjVVvOm=;k3}_>Hsmw#_r*n5GoWE3V;y9*)+ZxkStZDWAmz)3)RPG}K3u z_PRi9cko9#+zX2+Q#fV=;r@HR{Fu)6DY0?Gi*|X@Na5U2%MMYsRZ8#?n`YZ0v6`bT zz#Vo|*bYNDX|OzOrtUKx#=(Nq|+QahxwdW zRvH<nhmo4rREYNIMw*hH;fA{!RryG$Td{dDb)#L7;AEp9v2{aj<%PLwoT+mSj zg>(5fju#~HN)i;NUpAv7^39=~_*>7l*6-#a-q)rGl%JmSmBt3xv7%jLJ#o5x;PSn^ z8`oi=ony-7t%*DB(T;E&&c`wf`j>%se9PK#+TCZ}duE!YC;pP_8)B_ZJp}AMMi`lJ zfh+L!+7l-Z#O3S1^OsDH-M=auFfHiVV6+M6pMs&uAyHjb-nnb;&do>NP?9rI7&>Z9 z7Ms=+(T-gOyM=eiTi|;OcspLGKm8vxIk&2MG7@gz~vW0Y|4pHJ(OcXJ%=sxs!BeP zY7#Zu2SV3=JI@`*Y{OPbOIos@gYuxjd%hDjH@Tv8*{9cbcVQq-1xnwl`|wfbt>3Cn z0)uDc=kR=;++b#auC)A8$^?b`ojWo4tac2GC%fIV=;ZCCtCJOAmG?;fG1FLTq+R&YwB9<69hIN07+RJ_qb-v%`CY;KvHiElX4=xW#wy zcwP;V@RbL9xAC1J6{0T>K+g=UrDmok)qJ#Bs@A!d1-jfkA$@&^GQA0;))`bTkR?l3 zQ>RhxIGV*3k&aaI<|=PgzwGO3_l#)j{Y=5S#A9#wS~!xhiS_V>f|;lzZ*QYWz0Ax0 zwEvkgzvFgQl(?2}zrUyaGxR}&OrfDCF$PYX@JJo!H6Vxs8}L34r}U1u`K2eZQ$Z>> zCap`!TlBn*R}LE5D>?(lM_Q8xfNN{kT`iiJ&AZR?lB;H8=3Xk3>gZqyi|jT;aKVQ9 zFoZXPUXd-X1iF-XjW^>TkVaO>yox9XxA3t|;iE4T2NY`pfXi3Mt}5~ZW4nSM?M!!C zm@r6&qwIIjw%4V;*Hxq#)n%nJLI_we?1n(&OYaUXeT{uaGHrsqRV>6L!&t!)k@6c~syA#g1q5Rtxs}2R& zLEV`~&Phb2l*P_DWv|O^Yn#{+Iem4edl94%szO*(oxqpy{GdgCD?Be0ERM^!$4wEA z&)Q^8W2JsRrgAyHK_)T##vVYuy2vCSNerof8sVq~wFqO$S-zIyXWcTz>PhG8pP?}( zHyVAShsp~P^!*^P_wcEGyd(X029)gSiEnO&6^SsQE5ltsAW3{ojx9~_!zQP7eFklL z>sW}G-cg-evO@zI)&oNOu=vIJE%r(kTIBKyyEg~H3-MeHsy8@XE<>Wn@WJr3bi1H| z$Jx%@wsod0+1+qLboTk-(JaG*(Z;sIK7V?$-srM-xb83yOn_b){^XW>`hByyv+q4o zvy@pX&)r-W#&6LX0M+6-%uPgO>X_D5OKcQM2S_cCT{=3>{Oh1#5<^smaB(0n*@FnX z)(q;dM`dIF*%KWwpyr+{YR~d_CC8Nc=v7qg)t%P|^|j}Is?%Ghl$)bZ6k}dLJ~L2o z8yFZz1UM*uk%gUZ&eSwr$z;%~KCw?n5eVRIX7~IqH53bFr{WW|!N_a!((Ig)^#HzV zA)nS~*$4fMEIx@c@9-2mq0QjA0py$PM{LKFl@j9=9zkM{MckHXfjEHo$Z#JdymY|t zs$Tb{oce$h80uc#JLx6}N3ppxVD4)QmxyuxnS|lQT-go{Q?|D2*TtsTSjWR1{#FpL zVQE?DA$N;|xfs;()y=4DGMSQUIyGU=GgfzbP29)!^l~BLO9uiGx;Jx}^mvJJL0nuuq5Zr)MZ!k0s?Gum!!nW)R zDzYc6NLTxDbB1q{|{yF z)FcY9ty`|LZQHhO+qP}nwyjmRZQHhOSM@sGFZ)F7=(zU}WWHw3Z+v4?hc5E15$Ev} z!{Hg_Ii+z#Qg9DR8rV5LdpWW=GCL@*v3KgaVTk`ON61o6%~l;=JVaGMf~3=Z^aEDn zstRhy2Y-B8474P7iSX zuxTh72{Y%)PCw*M%B$xp!QZCfs}xSE9+SusisS@gdC_2q8n3F08G|Q?kD%ZAz|K)u z<`*WX5%P)(DXTlBs3|mxDFN=de1Lj||F^rIsiT9u_Y7y|Wok$irDMmXG1|nQfIDOz zUQJO~pZ*wbVpq*Sv)!kK$22h?Hg7@3Z*qsfoCfe^sK=cdcrGvLQs6M+P%wP92zVI? zwD4Y}3uCpk?BoRW6m~(x>~dK8}$bQTnay&u1$Yf1f!gP>b?D2viq9?8SfQliSZ3~7YRaa;WkJ0*`?np_cUfPTW(?()5H`cG%l2KWkdNH7`5?zO@saKuDqf4jr6SKlX(v zky)EGu_e1+=6zcDj;an;hpl6gzZ+G={sLs%Vy+F&0xM)nxeK-R@Q-_3j}=rY0&%(^ z_ciHz0zgnosY63|`FjR4%XM5rjY=IkK}LYGyL1{BR1DrG;(+VheSnCfnbm@410nHg zYZZT)d?X&$2>|1$S@kmI=i#r*Gurkfv3QiKhNSZ zbahMP#|{QWai;B2U70dAt*;bXTEVtRWCt|zsMceNrk4Prv9J04Xjy+uP`~1({iP2l z5z28fm0_ej4&92lNgGUagb%n5LK#3xEPV{}tfr}a}AV9mInaC}Gv zKe$;eMwC6Jxj+^e7aqcg66xqhPA4JZ+uPe;W*D?mirN^oLad}pd=&>29ctcbzKS+g z<MkK(i(?cBsp3}p9DknTB)GU(E(Gd88m>!$=P~$h0+*u>YN*;2^mbPx?^m?;WLWtqZ&5=pVtojog z2ihzFvdDCUk9lDqOSAM7!@x>6iHYLQxunK ze?-GJsF6ZXzxv*SnztLjTF_T704a*T!GF)*SpH84G{*n6ZQV*=Kc1eR_D8$-Hf%rZ z_qP||53?fp-~WF8e-Li}x7i*G6T|3nwDE4 z)wh~ewdDm|0}8J?Ar-($+X=>M8tfwTg;h<4G|QJenp~_Z^{T6zqg>u4uN_Hsdrp7t z0ykc?er``a(DhTfPPV_S^I?TC6?aqM{S zL#}}%afKzwu`J2|C*6ztm+qC(WuRdqVYjd|Q*$yfGT3BxhK)wQGt^t$C+s6cOjzLJ zE|#UoH74ucOppi=C@@e!C?rhepUEF1x*a>Z9Y>}kJF+TrFpz3uV51^5nKUw*Hafbb z*D_KNQ1c34;Nm4AXYF0oXyYJcAeu_bvSmfB*pQ5aObbF_lk zRjXgOSl@f!qVVqAM3hHNOf%e1%+(F$kI_Kf_zge3>mk1zQjl3vv&3c!%am@FmoG^z zF<+Qmpje`^WO>H?Pq5cTZf8mG4=)g;DfypRFJ)u;dv(KM7@6L7Ck{72dI}Txv zC+MOu9Ea?KwZSzeNmDW>EBA&k7LQx-G=$H+x}5P~V0+Xd8H#^GD578qW?Dvx5||3< zZjaInW@Og_hTZ6LPvabIgs(F)AJip%Qr-uCSaEr7z>q zmCwIXHoZ~IG~7J^>yFu!Kp4yt*F&$%Bh`RiF5p|yv0(c2!GY2DNOCLVR!s7st%7kc zE0p+=KQGf#Yc41)n>;-EB+vXxPA;bfOO7(MX?}GYdK11Yh|Fnm#k)&;fjaJifeJF9 zVNH{I;5a!f*oW;P@4o{%@hT~WoVcGrG-j}JxtR#JSPPEOIV2Q#Y=Z6h z0BG(AvV-bWNtmi*cvD~Kz4AiiPftHN+(+{?V6x0F4f+WZeW-l>n7rfe|pE=`SS6suNp!u}kLq5*u zS&2&2@~@|crJ-^xXU)ylLA3Ks_3!$YrN<$h|oqi5%=`!J$7Il8KsM+NA{Bktfe0f>0)~e z-@Jhc_;wVl<}VLZ7fm)BM>>&aKK5XnN4?Vw%kKN!(j9nl9}bXhgOg!>rT(p6ghGLD z)g`5}2T^;5CLe!#l7y&pfgQU7E?+%$$KDy$;gZC?Z|~Mb=tdK#niaCzLa@s0wE7Lr z?zQYweVnnAo+faS!DbFY z*bm6ETB+<2TQMUIBBRg!GhlSx%`xc4TKqLX;36;rH-Q0@ilQ-$$yUlY4b~0PZIYP> z?>av9y>=zHL@1RKA{`f+IX0KJMvhbzq|~`Z!HRZ{3)EDVqG6fKYis$&vDj*>)%y-G zm_`l_)bAIG(;*f+e5p>$`~_nhjoWQLW-bOUVgu*`2~r5&d@i35Q{lRpwdG&lAeMJPbEwfh*yPR$W7=QU14#% z@>+xR#x~+W!dWE2Tjh5HyHncKna8;X<9hca%kim?vw6OG2jkG*=J(9wTXcmniRh;M zNBN=L&GBG@cCkRiN57^&)Gw^| zh6sSToDwtqZ}>B{^H~s>u6fVeJPo_p5vEKT2qAPc) z`Z_Lxig>ohU$DgR>Uw`yZ9W24zYbieSN6--K*IK7=mF$H5(nd)X7i4WvSx-+>OSXo zzPaBPiPf&`f+^s3yyNfiXTVqB0C9t{2Dz{c?q~t2oZZ+_Cgpt$YuQD0vvv-8x8;x! z`WRs9ODqJIAJw^ipRsoORr;qRyrqLba*T&xx?rvqv_nUzJTeAaSCPK@K2O%E!Ww9) zIR_Z1jNm@HLP#4Oe#G+z!I1xIQXvm}d_F>PjIgp6eCpWnKplG7=^`A!+0h-srKp^y zp4l{UZ0J~mFcGu%a90-;bTz~dDkvRg%@v+wKMGtqKi%ISo*j0&%@@jWi+_eq3<|C8 zA*}r~1irRInd5;4naJRaOhOn%6RX%DQM$@YykAZd&3ZYYg zhDhC)$$!|cR3v9;$2Ohk84zl?VhY61cg5ds2f5q5NFYId-9k`?_Rho0|%6J+XEj#Et@InaE; zuJ4gm|2-EDTXPgBh0q9bT&sH@gP-}F_o|ea<5Qqn6vPuqVa+W+{)N|=6_cn{ zfU*C1{2Zcc0wH=}H?XK9IKvLPK^Oo;l445xt*RiKK3l^Y6YUBJ{v*&O#O`|F6}E$v z70&L$&A@91fGtK=F5eY7y8aEru4Ns+QmITHF?@fLmYc+oE5WG~9crYU`H#*wIQ$-? z5W2)z8ez$0g5f58?TpD|rMu0*l3@@Su(c9cSY?jaw?7+PA;<>n3i#LJwTEam23> zh7aO8>SIs;kcKv(6D^0(5_yYqfYvlSKlIGRP*bQ`RK1JA?535Nzm1H&0sZa@pKZGHU7G3Qm~@SE!&_AT}x` zt}pyB8h60x;d^$NM|Z-VXd(WHQ31$eATT8S@Il+paFYa`| zQ}2~!uE?m++Bly9pS633Z;h9O34^(z+I#C7zmvvqicd3Ma$q}5_quk_Adf57 z0~uy8InvU9rOuRoVrI9VkjFkDM=0(p{nKf`L8DT=drf<;rPvKQOc9;VLlMNFZUj~I z*?>t^qQ=F=r5qAEVHAtaW{h=CTIp`>v>8%c5i=o=lSD|}?lll3fx@@629Q7`*U)R0 zu;-9#>{Q$;&u`qxspqeDkWgNN$A_4$@}){U2X_l!WdOy$ zjcsQ?^OajcN^UQBW^%jI9`C@j(n`&=j8od>eb~GNYQuKZ5hiM8Y-zaWRovcp;g%XG z{R`FxnbC8`_ujJL*}kN_E>Gk8dQ7jk0|j|s!C@LyT_^xe1Uk=6%U zMDi7Bh723_B#Ba-uD)(ypPxIo6YkXEHN^93_tdbP@ta}rttp=)kcEcxvn|VZ`~-EI zpsrKG4k6|=es(g4oVW4MlZYJg3sWxKpL(pzcq3N4J|(zUz6bJ_o=t>p93}Pj?HxHw z$pkm#byCHh#AtW}$6=}mDu%gzmM=7MlCW~-iJ{2v*zfZ5E_YvYdQT#TWty}Ea2A#8 zoK0n^VI`=CNhOQd$_`n8#oKmt6dU5w4`1U(Y1l8dvIkzQ*yErQ13HX~E5w^uySjL% zwQK0D`dixEC6L;UZICz{NkgRgE`)Ju@Sn|42$sAA0#t={jlo7So$$2QViS~@~k z9tF@w^vSrbNOvAR=dEy{+S&(BA=K3O@Vp@)ak-8sa^|^DUFvO2G`3nyox24A24$hT zUlYop$}PYOGP44UmGDmtsf`f~RwJQ~#!t$POQ|s`O9G*bMTT4TxxI>hNnMGyJu};; z8?Q7Rm$FH}FGzR3vO^t)YYj9Q#%IH(Xn%?PHOV*c>jnJp-eRtm)%Z-kUTPF2QX9z9%Af01Tgiv zlh{kQx4|7mh%6LeX?758idH`eZ>nDrB5laJ;P6=was#ZZp@n=x=8yVF2I5|{e3hh- zwXCwVu4Z$iD7Wy$Ra#loFf_Pzpn1}QYn^?Q#(g`)GZP_MC?Q)gC(+C>%|^M~CDEI6C-zwqQu{0#9K|E}m6`;p72t26{mi99yn9eiRR63ozViasWp9*#MG z8Q_%7xg#@dB7z5~=p{+afUP21kUY|I!B)Q}OM6nzcxNn=fuy^v<93oPh!8kuz1 zNT5iuEWjrklPB~S_7+TSXJY4sj%IzZ9f&gsd=S-_8YD>w7S!Sk0pGp?!NmN=i!VYx zHo!KRcq!;Wz@;1zo$q{g6<${5yh(X9um^PUd#_4%34l@ttc-|V9%#S;K{PZdB!$GY znvuoX)B!Nf;q%ap)dhi0jvYraPu;erjHKO&c&$Ge3b`=AH3}r(OwLlZjcssfut5Xs zof_wu9~)P<2G>T#%-I?aroy?ue;|o3j~UJS;$6|$Ci2pQ-I~JwxJcc(oxwha{yy_* z2U{nuw|sTwJX`zdI%x31=^kj_UFdzTCT$MkJx)Hi%Y-Vlt1SPGZuUNSn-aohaAAxo zofQMGVV)ridb@;IYmlq8V~A$tYV%e+6BQ8EHkku;N@5S5!2s_ngeli_&tVm-UfxS^ z{}DH=Uy-uYvW3YFWUZf?h{s5!$D48{fBf9n>SI6cObKF958Tsg%cPk z+ptkb3YUcxCW7ncb&~O|{%OQFC3Z(J^;~we8uei;rq2v;*hvJ&z!HZ%z_%yl+V3pm z0+?i06vem*g3gl2Zw8y20oCoyQdWrB9RL$M_`^=|oe6wV4v}jN`(!>QH48X>ohI%O zX=2|1?y?#LP(&PnoQclNNbin%O(o0%iY1z%rCUH}Hoatm+!&1(op?BeS(;gG0HmG7 zwzMO*bdw)uy*>U1sXnwsc$TMO)!~LK^?Ge0^m9pjcF!$Gu=k0wra&sB ztj$iU7J0Q^j7t%S^8I1je2RM5Kg^ff8&bMNLGTHe70ATo=gKO8J!8bK!lkoh?Kt78 zQcly)ylQ6r@A1NN{W(G8+z9*O{K!YF5&+sg{+0h|*g=2xl<^k)KGyO;1<^Oj0%Fe<_|DUa^5=}5|q|@DAc-pWcWe%ff*<1VDY89>O z$Q2c~17YJ^7=t)^K#5%9t2!}!XdpnwEiXFF<`x&_rIq>pzb!BAZ*#soQu3F-)xSNr zzdjJaZC;MEx3AyTx3_L&ebh7z0sQ)nhQ}TGf71FWlE|ta?-JiSgEM1kPe2`l1nfeM z=wngrTTr*)3D}kpW3FhduWi;%!d&47Q0NeN(FcJoZXa(^A3q%PU*&&l>*2iM*l^O< zy?{+k0wC&i)$y$Vu%defe-pq%c>Xre1HR&`#hKjT2JG|h&nuD1=5qTO$lE*rjZ1TD zyIvYkDvM$3o^5H)GVk0Po~9#boSGe7A(`8DeHY$LL9$T;5qS{vu@(aZ+34_e?|k#x z0QK0Yd0jK6f_ManX?%u+Ndyjy$uRHS*(94{Wh7skP5s5W*uULJJlVIUf^dEXZ-#k& zsna>o@7-~Akk@a!hQwow>!XL;gg~;k8RX`+?j9Tr;>%>F&^};cAYZadB% ztdl66l~M2VT>gNdN~QU7PWdiF8Y~*H;RzD7+2$G0@%|bl{ejtF15*VF0d0FT`a+9= z83;8Tteam$x29%=#fp>ZBQ;E_qgYe6#$?6G3h?=7FEur2tdFaUt8ZT;TjRFoZTZtU zh-w&BCs#kbhG<@3Oxu!1NqHf|K&8}`vw*;=INviP^%XP3DH4?EU(i$G3 z+Fhkxo%`Ch=%hWX)XjTtvMaTEX=1m#gL50A`C1R#R8#N!(o;2i#LM*wd+F6z+A8BO zgT;|)eHQlWbcMEfTcu9=Q{p!Tw#Y}0rO&q)7f=J_S176wvLxq>{e6kwD}V;JjoIaR z2Ov7oaAmR?P4FG648s7c!}9c0_qKm2CXMG{dbE*XK$I8zfYI!<e7_E(i29D@(1kCPfFm_JVRCOl?Rfb?;hChB9psqLcP|YD!C{Nf8g^01 zQo)^)xednGM*xo_f@H7Kp_wWRvKFL2k~hcvZ{eKz65L5-f-o@6zROl-l9USrsJi#B z|4iu*rgNvWiX5qZ!s`&3;B`cE0b{w{$Br~8C*pPfaAk&t!>)E$N^bX>g9g8cw2O^} zhl{V~AS=qIx|6(?93J;MZ^|<<>o{LZEqGn#EmDUAmxv^vC$eXck>2GGV`!7puT&8{Jk+F$dnljmmNr&g&Yc|yGc$&j5gBe^9L_bvx&Ui3?&q-^iuTp9f!U$m z=^spp#|$x(G+J*FAGUMUi&V|Hx!-<>$>3n05F zzD-6X2n=RGN)ecgt8eHlBEni8%P)H%tq{)PDApO=nfx9?F%efFsLFlJz$WhnUIz-R zX`GacnU=vt&a-vf$3i0wGG({K&vwN#y3nI^GI8eBbq3DVfHVkZ?Z{80G$+N@Ivu{V zh|+&QP=(KvTJyEb)lvDW8N~=5luDo+^j~l|J+RCt=Z6YQSffKK|I*~Z8et51i>M4F zno*~Uvu+szTovo)O4A%F6Bror#ScgC%0DmGCuC<=b(=+eqj4@oRWZ4UK@Nce_6HnjT|(yBe-4K|@VNvajU^;OVWjGFVt}70n=Ht< zq2u~uxMl_WyT{FqIk0L$9|Swl%_-H>g_HfQEj&5Jr43l=`m(s$a4^M+md!ykL$edG zzTjm7D)**F<3m)r_5Z;gYj<@TbZhGnY`n;hi~4j9x`^>)R0}4MriObD!g8L2P22XM z*&dbO<~JTCYDAZmX&}V%1SJX0%f}>KJ?X0t5Eon!27lo$UX7WX0+o5Laz^ha0@3Kt zLiTQ;2()K4qAmw20D%Sv0D&q8E-or6F3_E~AM8e@;iu#LVd;SFGi1SAD~HeqHnzHo zf`kMm1G6F_8y}jYJ!R)Au47dhGZZsqOH516PIlV>Aa-Dw0{Y46!SS75_mtA_l+Cxm zZzJ|Og$F6jcRF!q1%XfbL1RO$))c-I=q;O9QAybyw>J`=#%zBNToFvsyeT=|BpS}> zJH2FXqT7?#7mGuYK;5%nS%UmJVdC^Oz|Q+sp4s5@N{#W1+w~wC-e}l_euS0sotlAS zJYjKyhQhtMF(YZOwl!+a(h!ck$y=g9AuXVVTC8F06WJGKb(cE_*5X;;$5|^hd`fNU zjQ*}I+eh14$2l?9ZJ_6emsZ6%y^nDjwORQyd31wq2WdUoXX_TBVcHa^Vp9qt2@PJ) zd1JzOqtG0`Mu=(l!fEhO!=OyZf5e%T_ARLikfQcOuv{W&O{qVpo-1b;ama>ewy#%=qql6WBCm?8r znL%Kac=c>zQb4Kq$ZOX0S@*sZ2Ya@^7#}a<)ud<8yk5E)Ge^o2dS+0y0y0~RD-Gq= z`oJ3UyZFk{0M3h8ZMW08p3diGySL$5a7&dpqifM?_cS;ZEG?9x)}{A5yuyH*b;+&h zwGRtB_-=Q%S^Du;;T|xt*Qd%}qhvS8#%K2ID?4}~ho5!+rjCpQOh_=v4?p%rMo9^9 zM760qnjL1);fp-zm_=#Wnk^JuOMu}4@SA00L~tP)byMbMlZdaLIvA5StXZ8DCF z9v{Tak%Zk&;z%K*sc*a4K!v@IEW`N+x!uYcQ9QzAUVsp@7}>OvMFT^+zU6(b^$Fp- z-&PgBEWKFI9#O!vX+l zpKhTE2jJTIQvu)33uwb_h%g9!Ttt56xvx5A84)O&&7Nq=WPi|0&AVGJ>0TwroORn#e9ZOi`T6-;UFuj2{cg;00iVEsI^W(cpaQUa7? zz~Ve}+s(!F#Uhu6gg|9h>I?{n2z3*YCL<$V=8|wtiv4zZcgk=IyfUfkMxTWq(9g0Q zISB*>+H?$R8u3b}m~C2n2R(5jYg?N+@zc<76yJKygu{H#PO@J>7(t>2&f)2m zD2;amuI6BFFK*8cx}UoejZ&upjk-t}Cy)x|Wg3FP-!evi6A2Ear3F&DBEL50b4@2} zCv%d{#&U|rWKzEPKHj95r~DatceZPHx4?=j9^rau3?x+)@Zc0_uE;I&a@Zvl*PP`IfQAQ_nn)gyty_k z%fVN&v<2y+3p(n-Is_zsS;_eL!jZIw0p;X*d_~l6|Dn>N@pv*bn?|KV&=p`PQ}v4J ziSdcjHuHTpz|GanqL{lB=PO$(&waEdLp;|Rr zZT4Ch_0jyd)|I`LJ6dfY$^4KKL3J>-D7k`#W^R#>Llp!(XF2fO7q(z{r=wc<1#>(4 zWzy%v4|!78jg7a5MJUK~i>wXOH>B3MN@fZFwj zrzzA_B*Y^LV=Kjd! z$3)b=c+gB&hOYPbchg+r`2=RC4P_7M@k%Q?)Fpfi5lwF)X z$3~C@$a;C*_5p-mm|&Z~IweOMdgIwbAMrVajjtf|6{x=eXhWbJ9b<8SR9WWu z$ArH4>93n%&ArwA3RN;ta;1k!NlJZe8y|D~Vio|Z*>!(H9n73t#uIh6PUz^!*0?2b z1suZ100WA^p?SlC(YA2oq$ePv`+Y0itZeLRy2D>ej^Y|WJy+bUL3$$>*!5()9^#$d zJ!6<)Xk%$=h`Lx3L>c?r|Jc~T)SS%9p+>3ZzXZ(NSszG29g_}k&!KC#lo=xo!f}MJE)?gCTz!D_70W1 z(c}$#G|hdcm!TtA;g!<$cIz877Bph?8{f}uxORJhW}aitC3c!3aAgPlPJ{V?rc(RX z+8)jQc4Ph0JLz6ZIEQ1{ymh771L#~9iR-u|G-&sO%?{eA^9cSFNHy}9lu|*C>2sh* zMoFng8MP+aE{P%HlJbqUCmBA)oWdwH5_9XxjL)D}GF1vC;EFMcLu}dib1LnY>jy>F zaI;JH&Q_=Wp*NuTdaKNO-&q>gN;P}gFT^g=D`mIn+k3!!<&@{`nOyeNIwT(!PFGs9 zi+FuB)y5gpIaMaVdppWM*=TcJMv1`(NCLgt!a5?*&6K{Lq@-pDPL((WO591ubK(gW z>2W|0{!yQV8)^0)oilQ0jPHuYemg7579<2#Zlv!g!sPVVR84@WyS9I{JeZ`q&bv1n zWmCFKSJ5WBgsr~fdRAuWrvRO^$idsM3!6p&Y0mj*qOl;toKYJ(ZP39U)7dZ-EmDC3 zliO*5UDyW>%77R9UF6iwevL5M%1~61hi!ce@%oJUo==bAitPf#6Yd!&3fTKB$`1$3 ztMApODny}MkTP0>L+Zr=3m>bJ%!MD?cTM-Ev5+Ck259U-pn%`~GZcb&= zzBb@X=vu4X`u;Z#zyQ1*px#j5#7*o&F1Rd^P)j;F=!U-kq01J(P}k1MFp2t>#ES<@ zD#jS!@@<0f`9T*{BeueJvD!Q-}kQi%!E+cMEmefO8xqFN4=5rPuTs*UoHhOW_)Y-fX>X2{9RsX`KWQ+{|IR$9LCR+VCYy^l>HlH>F`f_IV|YX8<0796L~n9%4Yv42yYVp`=IqUa$y zs+b48x!7=15O9+oHbc~$@|7km&(;6syZAIGZtB=->69HUB(dYb*v;NX{uBX|7)XBu z?$sCDuwCX6@6%1=>g`zP^#STl;d8&I2E6gBd+tZ$%tC^r(zW)ezbSAd;{Z4;b;yg7 zYu6Dnf^TsgcMQd5-YsM7Szxx=z8u&*{=2WNzy$-MAHgNXDYZHzDkjD>i7H82U6}nA zs+_9#$5ARn6mWyPV?lj7e*DpDf+}-^!gy2VjrKF_@oVu<+{IqP4Lj)Ur$&;=$lmR+ z27eYl$auM=X~Gm2XYx*><6D?J>%Qqz2o22TBq(o1hwlsLGZW&rXc79;yH>p{XivmT zDOKr*=P);?JI=L6JbvV6fE-chB-9&SNh(k)D_kh|)v~L0%fG6pHzwr!_(W_`x0+=&~AMp`7y zM{WN7)7yYhAl7%m_cqI#MZN-~osp3t7_uUKG3Da%QU)aMHiwU;&m*)E^i839ZzyDz zt`7w*SesLu#JA&WWy%rsnQ4zIYAY_MkQR^23&*!gs4=?%Jp*#A$r)gb+GwBEsW-bq znY5H~=kl)O&uU9Ka~@PFOoq$SjVFDj3}3c8M=7a`m}PaDiimh_EnTzu<3L8hBO{!x z{t9lAo;<6@F@@4wC<8#TXyaHyI6(P^b&6)z^dA|~L4}b~`~FK@7_TjFXc~8S^m199 z5g3X_3-&)caKU)^X8p8la^B4PVurkjTDQ4}iAE;1I-2&8mQ}W$P&ABXZ>i8=P5{kD|04y2X{Uy?XF>DXBg=$@2@cz%>fX-;jkr30;9xfU{q& zfxI5m2ZtP{@3W1hMNRg%c~0?RR$<1Do$NtOO5wKVCT75@Ne}*@ZNYWOx!!m6XVhXV z`H2pYE&|_fapw&5K71%5yYnJ^@ML zh7IKT1_P~8P~NN7ag0Q1;MCF3Wa}c>mx_;w-h#17m0v!~-J;zBQNc);ldUxk6OUFB z`vrdTk5#jRM#?mC@bXYd%;e+!HVrN!@?+A!{)Aw7cwmD5ye+`a9?<~0*X)mXepP_C z_2Zi_3}$=Li|yLQI{>swV4Gm>3Me2a-l_Lvgowb{W9w+bAbVJgaK?u!d8>c;zZFDh zS*SljUlqObu)#%bg%{-8mqj?H1r01fi&j?ym@s3j9YvWUXIdsI!|}xiQ-HP+E}X1N z6?lrDkEh+iUJ>zPbmXeT@9noEbCVn71Hdxn8<0Y>@hBH(Y(yAW9>qG`8v+l{X@nJ{8fq9ziF8Jwi0jCb5tNnWg?kQm?EoCN|{7%!AfrM z5^l>vhY%fk|Xco&;l5ajCV;pk_l2p2Z z2bh^S^3`&2W_gPYB0rH4l`@(sHxK9P$DBn%=iB8m^N|9r8RzX#j!Zs49t)q~${mu1 z-sTkgy=|1e{+f%mGxwJ3xO52gihy zy@9PuDBfn zqZKkHz!U}L$94i9GeTMuS3xy6Sc$?hLvSR2wu3O9r)9_HxMT^E=wVmB@d%`s!ke$jV7 zV8Y(B;~a2W(&k^iw@O?tjgd$mwjubrt*Wm{%LR)3*i8tK1NW*_5$taJ`yD#N4*)8R zD16kcd=c_2FnWu-C+_Qy?rb&n`gZ^AON0NcZX8TOC~1()`6RvLqLfB!B*4$apN`G= zJgP~bBJvFG;o^feS~cbzslF79$SP^eQ3`n*Rfh-(5vxT@$CYu&y_DGtUJ>h6K<1#N z1IZXht;d;WvECW+$0@S{qcjA$74t;MGeH+u0J;NfS|s14lxI4ycSQZ!?Gd@un;ENu zck6*eVtQl@;F1v#!6F|v#YFy+;9T<#*Ca(W9Px2~LYjb#Xh*R}{*qIwe0owp{#pP8n}x0%&>=J->xRsGdFHtrKAC% zikXAyS14=G&`bx5(D(R}Xa~4An{xso0iwA3OV`$kHd*thYrAklR#9V2LiHn%-r%5p zR-Nye53kY$M8pY))@uGkQ(W?M;(g^r!30W^c<^Zv!!v&>W(y7s<(?Yj)`{Ta)*OiO zpDtsQq5Fm<{2tj_eo$tplKq5xfKAbb?WDMqLsLK@Yo+0(WX1N(XlojvFhMzXl#;y* zXPJ&{$>bq+s_Da$%Gyz>6E4d>{iNA)aSpXUF!c5j0!dsfl(czy730f6gdM$_W}Z24jF)D$-FR zY?TXr-*=M~$7kOc2t=+LP{>gipjBI)qVT;CH8m{dS=RcsWB6q4deb!IG; ze3QFBxf4)n5-Mj*FPS(?ux)OGnv&iLL@*Sl1!Nx(VptJwh=cYANFKUSP&nXcfA~gc zS@UN8vI&H1JD0Qu#BSQwQFO}Oe0x!2B@Z(cC?_f=q>e=kOXgBu+&yuNh=QtYLr?r@ zQR9&V?RcM{Z<2uP1l6Vi)BHq})|P|>Es(FoClpbYRun}J5|Kav$X@G)&9vrlYYg{^ zY;k{iKO3kp(7^(8we!JvZ>vJIC)I5^D<#WBWcsTvn5Twg^>q(5HuI;*piJ@;FE;BE zU)Kz~zr@<@Q)9{^xWHTqx>q2REB#HEmhZQxE!E2BpM5^e@~H`n#{y8xs@Y)TFyv|| zRFFepw(q{zuBM2ERODw4s(Db$>DPPKP}N{+$}bQPzUbT;OnUD~6dg8u$pwIuQ$phho2}EYZK!p6b`}zQ zI%8y=#hudXcgo7zW?Gic`D4lX=l5VeBIVx4A?a22lVy`^KJ8)p33$l}3Gpi~)AM_RH4vQ)d1to){dUmir^?Y zNNR*$OrgO?-K34aMDBh>aanm;?lvsONztQ}D3bi$CY%kIdC_bL&j&CgUviqgi{y5~ zA5e}D^ICx4FxLg*`g~V>!sxHZCvHMQFXy16-#B~dlRZH;fPejM1Z}~hQFhgR9cHqR zCr_u^+rCC(qR{N_?%tiIpw8ea-W0)3FQw&H)}ktnEV~E~lZ+WdN2MVA3+aO@W`7>O zI7oZF5>rwWNOM@=p0#z3n>y>8LfMu=e}3P?q`h`M2>hu!++2@uB4>lIU3|aoWjzdZ zRZ)u+D^>pdJzS*dT?(O6WsEohNIR#%u{mX{E3-KL{SsR77WJuq{#7wqWGQvy(`Y*Q zrS5J%H(24t-u61uhaNOd$CVRdMZ{^X0|vEhbS5kF(Iz%x4+CYz-y2pE$rQ(}$Lgs^kUu>W5inrCuoxMcM)*}s$YbmKn<%iyxCEPQn1%@a+Yan3;do6YN;kvqkvk~x6TV)^Bqbcd~xjQu8gT1uvC=A zm)@dZQ+h#XpZXN>lngikLn^wQG-)Z~EI2hiN;Jm$_>2G4=ID>VT=;+I{s76P zNx{6MpB`U`^ZYi{WJdh$7R(Vp)l1AxK?T3_JQiyoB z&sSFeH@Td6cY?|btk9V;zq{!I>2oy3x4=ZE)ZD7z>_8o{o zsKh>$^Xzo1*XX)QPto^B%*-a+26-X!LJ(v7lYiX6Bp>+$u-FFVoTUJVr3evFrj`Ae&ro<;{b0k}MT;%@o#`sAR zS2dc3nKVO2gV_YdKN6Vk8!|_%m(As5=}IlN*Aa^X9g0*nvY7HbNX;yunxyhwWU#ve zxv7t9b`M91wpvF!RX006&T)}&jUBUhXc;n&q;g5XS)BSZX=*PG^fH(dBr9cvxU__1 zSSm1Uo$`rEV|%Q{ja);obRUg?nh2{D$|uEI-kwNn`b%1srSTeC7pQY+E%OVW7g4j+ zLYvuM%g99+s$P>avhoVPb#k4(w)krc8CaljldETd>1En@6=ZdoRkaD#rE;F2xq}s~ zd~$M)@B9cSD^yX(EwlQ22OWBY16Mb8A*7c6-N2yAm2u_%& zf_h{%NTwjCE3RwxQ-*D7%7~iaLrBRM4mi9LF|uJvT(|k$UY!GewMq(V64Hv;!+O&< zn5+uzgt?N>ItjTx3M;3ix2yB2*1vN{O>aggrP;y~H5d+?Ocu3Vi(9%0o zF|j`sTa11m$v{=T#V4FN1BTr@okx2q_1i#|Y2gj8s{7akcQbJix6o>`f(m^H8onF= zE@rt^Gkmebs(ewKxC+r~+peZcfbBv~=PGT>!Pj2~A(mLhz}j9ONo%|bxheU?n*!2%jNZ@9D7e26tZI|Do(HpyCR)HQ^+c#mWT*%hJwhrR#0&*#K>RkSFBgK!(W@hF++xG{A%@obwZl_^9t19(^ z7?SNaTFMu=2{EqB7qIRps<^&J8q2!v) z#5B&77R2>`M<^ z3?P*aZE!}_Xs>^QGyJ+_gyyCCqaMccbSU1KUj_C!%F2>#^{iF2lsLfXSrRIr$#|kc zmN+W521}Y=rEkjZNa_{M{rO!eb6tP@Si4DWl!Oj@)4M|{%-dWNgGBHprR&aI#MYJc z`kXN@C#Zk|_T=_nDoevgVbh=a@>~y*YqMxz$lJ+!r|t9Jt1n-c6-PY{3J$ghTT%r6 zS-h09KEnJ%Oulj5gELQhO1ZIk&E#lgPrNTIbUBdhUB$U5hnCzom8%(FOK~@TLXJyX6LWEmde1_RN~h zuQQP!_KS-hY&v#&Vxhd`rHzX3M~(4gCx72cED4eMwgGDPfFpbjidAi`*>6^S$3N!V zgNvB@vDe2S>5XGwwELu?xaxuWd6XfBx&McTi>yb0j-AhdE}|^F*{PhKzh?zNsbqplg0QgSKj4TbIiesR1M(*>5PY&epA(J?asxH3?pv%#G=B`!uv1 zj6b6MBy+)0kp`nD^F8BlrbE!t0I5SFgnkR4*j7YotBl+;TGtUuh z4s8Hb1>@^L(WVr!2Yx{)_H6~hW`jHi)YBz7{>oSarKquFbQr5*CN|R?h@M(^-OsUx zf-UYZdF(Iuj(#nVpS&?3sx-_?IW9J9vh5$5uGN-j2|Rsf4BOsvP|P|;_3+C4d)OZ3 zzc17h*thzNZXe@!=Ih;V_)`5!yHZ)xQ&)phB@f?mt;hE>ss|keHSfZ!A<8Vdk9fG{ zR`FM4l+rKJ0)3Vo(*|Upeggwbu1j7j^eKKG-yP3)N(j9X)d>r5?4C4@Y#o;^END2L z8U%eC$3En?-r|0MyPv?XgXaKZ`R$&>blyt0?0Vpj2g(jCuGXCXT^t>apeR)RQWj$jjgc)3t@c_1i*z5U`pNV8 z=~=!B)0vyHkMn}wo98xO7?`kmxH#+uExj2C2ijg_D5T7xt%DF1qRtpxxX4xO*_#UH z{p_+H&vx02%$fuu4a@%7+`~B6Nf)z`f}Qr*Qz%x-bg_j>%$>%n6u-dGv%4(P zX`k}`D17eepVKLUg#l8FpL_{R#7)gQAPHM~z0>lVS}=wF4Ho?N0;TlBMN9Dy_Y50a z`LwZ)HlwZm!N8%JU92sN#*ETh?dZ#FX?Pji@i&2bW1h32L)sVmv%ukHOiSmLHl-%E5@*CVEVGYTri^gO zQE9k>ufhzHlo&L>MXRW|y?rY0w6KM2fa#1)RvTX>iNt@Nq9Q?DiXYJ|kS=Vj9V4S< z7G~~HoyOIm*OKUk;tOcp@9V@#?vPvoeoJUq*4d&(3cOOz?A?d%eCm^8#Oh4-j^u42 zlc^0S1Xx{MZTPW;-ojmr3+0NI2O$Fnha${on(RMx$TU>2O2Wh8MAfgBg=+*^u4%Pb zL}n;C?@yS=O(yR|NKU?UKdAQ{hr@`_(lh6i^20FyFq>mR(GQV6UWmO@*6d@L%bYM) zJBhLjQC4Fv#jSt0@7eS~)sKUel42fA;6-Ek=?8Bn66yAn;`?hBc*vO0>Gjt}dz%w~ zqf*-NF3KWfcyCpYA}$KKNpb@HLbOi+cSQ20x7fpM4r`c7)j5%R6JFnUl_r z=pF>bR{5$`FvZq^pi0h94x*R&AHllyvCLA#GQ@-hE~P>$-Xqn7Bhfp!>O_P@F4*E; ze+R+-VdTUe0?|&PV`XtA$==D>1TiGh{U`89>bB*TH>bzXtth{*NYo*c2dc1#pve`f zj&_jxl;u1!&>U#m*wsyjMlDYgHqr@!*lbkk@_a40vbFG|1fZSr$hFFOIPp5DS#YMc zG8KHZc`)u*BN}e}rNpPf>TfB!>NWS!--e=u3uv#0lsJ{>XcZU>M}|>;k(jz7w1);w z%k3R?v8XnLzHO)j6INaYrfZvLV7A?>0BR+MmGaDW%t7vkWg<-Qcd^2x;?i5@v!C6K ztG|+G8L05{TO2Ot(D$9FyiwI#)R({~b9=l4KBxBBus4brtmpro+- zHTIO)_A63DiBXeCBV8zmeQ9Qxf)(Qcv&q#IIZKllxOAUG=^ixK%9X5mr=caq=Kc5x zr2*_eSYl~nqvomhfiN&LR+N{nUitL-wW#1W4pvD4f?|K2{raLBsWA06G} z6hKp3pMbz%d3?juCTkG`$NbgR(<|~->S*)6zN6tL#6H5vEre$9p7}K{d@g{QgV6L< zHOw||8XbK)VS;VGx0vC2;bf2@Rl+dSQ01?h^9d%tev>kXZosuv=9&sb>eH9>KIW2* zxybA#p?>lZtiS53IMP8)n`N5X{S(&^5~PkjgkcPjmJ zfucX8v#N9Ni+MR&4HmziU%*}sZx!oapuqK-oN}pjY~zva{(!JXa!%&v#QT`4yKYPt zP%95KqD;HwFRGv3SU~Z^IukN4lKOs0ua#8p=5P5P$!88u1?kszD3>f7v=j4zyC$Ea zm!B8T1)6K!9E^AvmDGOs{wmnBVyh-Z_7jAI`{uJy(9sKOpljgi{nges0EXr4-YaysZe_fP4fS=c_j;ljF1I~zXzDGWRqRiA z8nr}SeDahz!K0Fs3AYuTRa-UG)Fc`We(woxF3WwHO;Rhe)s>aA6BCr?sgF&*e@{(1 z7Dc6XN_AzW5V6LWr;%G^5++8v%s=!>v&O_#==nPYIad`WEnNuvyN4s;Gi^)=Nap#$ z38J(dq>)UDL`)&iqu#AKEom-^rKgr7kfuFRkSIw4VC2^@Sk<`s>D^^oV3DM_i`KB^dxw6m==;kh?avY;Dg4+Q0Pb_H^sq z*=Aow@<2p($B3Cb)({`HK)bK;N?(q|sz+`h7H%qheOWtfIQiHh@!1NBuxAxDd+b&i zQ%U+KrOzIl#ey1c(Rhq~Vfs~B*$ko~^7Gqq2-=-(UyrMAMRI-8e$~vq{+ODJ)yG3i zfpKuHitJn$E}rk+G|Wlv4s_z=?_#xIDQX=73kLaz34Ygi5CYhnG4I^w#Ln5}HdYpy zh__WwGF;tqTb0?Nho6thoW^cu;{5((bT0^>L zHHN91+v{sA2D{3c*4!tvX20a$HUXe6Pdp1BLeC>Y*mnE{{x~b#4%^yQsb*K!0ukEw z9eWlcA4Q>P$r~suzJ+7z9s^9geB_Ypc1_?@x(3F0i5GMiAg;HE?f~1QWKKhwGszA13;>LbMoB!xp>r z`o=upx>Xk3?b%hus-!OOG`xSwPX&Vl&9GA2w$o0iQDl`Eg13{BkCR`lx@r*V=gVwS zH(gzPJ>nK^;X>)DLBUhlmN#)NKKMBhp!r*}mhO)*0a~9|1fqXbnkJ+MWqn`l8xLl> zjJmyumWBp^U^vV%1?8Aye$=ka&2`vg7hV3Tt2}$aPczxk=>d^V$Zb~D>QS~$9C2ss zv;Ec){`TpQjoA;KXo0-AkK~Mf_QS(NnW=)4WOq}M9&o4+e|u=H zl6KB8vWCRKrJlGNV_Q!`8wizghY`1uDSdeSId;zH(X@7`cJVUSk@$Y}xGPvBG@ zFG31NrPG!Kb{dO*N*K0jP_%xejq+T07R;>8dKC5ay^CHLw8VCJ{5i(xBC!;txqJvi zFl_buNc5!e5*k&zWn2!}4mef+>iEZqU%vAFyT&V^^giYn+>f%wo=jN$w-wb+$sK)% zhs><3tvN@DQ#kc`@a&B;!aRD_^etlbZQvnZf#3KLr{?TNcv0}S)rO4!@Gf$;{~n9) zf$3WJ{FbLwTV`{dmDr&Hp2pCsTO-}vOnYTB8IrP|6>#P+TK(s_U=6YCk6gSM#}bp4 zs0Rf7x-3NYB#nd>?U)?2Z^GYKf9q3oo6#N&L{l$nq9a@gGJN;#*32ItOPPwCR1AU@ z#(GM=Y6Vu>7^5U#@S?S2)T5XTCRR0~#%RDX079vVszZE+v5sq^&a}&7N)ZnuIsh(; z9%D(DFmf$mn3WoYQ34>AJzHjhIR!9fbVkrisTt(Wm6~k;^1*9zRn1jlx2gLv+fXAJ zo%Uj0ttsPwl)OHeG%fj|$O&Aq`lxlRFlf^3P1M~o zf+VxIC``hz{}tDQ)*H`YGpKt0Vyq-6#xyj$YWu!17A7RJb)|9p=5mExf%ET;j6s&( zgj~}3Qp~_kVah%57`LM3;SP_|CpcML-q#mWuyk@q^(jADNMBV|uf z(Jif9{E!^fxwxeMLufOuYNSzUfn&xLs&a=714+k5PC|MlO6?6;0Vpjv3Yk*JUMBTD z<`?A-ZJsjYtWHI;Uyp>>=R=Xl~B1#eHO}tfCKk5yrj3G*k5HYi~Q}^oaVQjUh&bvKiR4XEH-RbS0GpW&BTF2ryPf8t+I0K74E&Y8VG1lvrNh&G2;0xIPy zz(3TFe|N;zBLfGfI}omc3-X%X!|Tz>6kj=e`?%?umNUkfzk-zQ((}q5qiDp<@_Jfh zPtN^a@XO_{aJ4&|;(7~2Ddy|=kb5L=!n30T%>EEJL~eY>VPvQ@Mu?=6CSRZpA$gPR zVnEx337+aM;NfBfY#B|=ks8T&*g zQR}(#l}>gFB}8kF@co%Ed@_pLbG71C)Be4p0+)JozwUy#BOpAMoo6CsXaO>PY%b8@ z@P$2Vl-;5hhx9XyxfXeU74HVvZjPr@+Y8CkCVRcj?bt(rK#)tP{+{1&qAe+RJE^IWMV&+_nR@*yHJU9s9UvVlvKI=d0Zy# z4Tb&%ApZqYjFc=yz;O)@ZX$k=Uw|^_J9%-P=KPZG^Q2&N-ICzy-*281XLn%FgX%cA zNk>m5C8de+3^%L2@l3b(_m=hdRVQs3caCmTF!55mSzG~&TC0!7mZqfT4;KFER4GAO zL1-B<3k%i^R{Y%*2kN{mzK-t2v+cgHtqeC@(DMnx-&?|_l^t~ zt0kl<$^g5CVcLc5&c)mjvs-MB3?W`RUOGXToP$1%^ZfadYgeY`LC@{M^rx~)GqufZ zX}f;QrF@P|5VR zGPIM{k|xs(?G|36Ttx2prDi14fG`2O^gyq}FS!|7`t7LoO*S?u>88Pf%qhojr@Mce7&|*&C(rbNG}{UZ}LOnF!1x+8?OR6{V0P-3WSxjPNcw3 zN;126q(QkssT~V*1YqQe$Ttd@ctlDBG*YpG__5AGLj4ee&m8zAR)XXBu}_kT^hYH2 zzBm2WRQNx!-Bfv;$CG%2cmq>>d7z_QCiH}{NbbpCyTr+k>d@!XK`7NU4IFOA?jm*T z2aeomcpyR!Yp!MW#$n}(DbP(@NgSKuFbk~wC4Oxarm>XVuVm}vnz}Hb=+(x2@CaTZ9^D*`? z{=pWesm@r=iqRvhk`G(7cq8y+am@AW|>hjB)PE6hLnvs4jn z6ZvZF?csx6Gk42?ILq%xOz**qI0&#ZYD>aQBtW)`Cu+9*+^Xq&i zQdNE0y_V%gSp0lB27^?%jrRn(s2(DZC%rwOYjw&f(77vE6E~mD^OMIt{Z@sf4Eb5t zgd=^W6?BkxLW~#5i>PECqt8;3BfAVh?Ng9 zdM<)u)W6~|8N73+$xY7ld_}7L=D304@tuu=1#gBjMhPibEYmPKNU7uIyA-`oM8Jy`vt`-~j#t08o=br15Eu$hj`V7y~xr>g^rLaqY=QHfOhRkX_ z#{I%BcB_Gr6@Gh~TW)v>fj_fqOu94WYoBl*;h#e?`(ibS;6RZd{9rLr%Qsz|W%0@} zab{rO-u>IhvdQSP{4TUuDX4NG1}B~1XxVmowZeSl5ybL@ey8GdF^T;nr~3QDr`R`n z;%PXw>>Nvw4g^a~(F#ei-PKaKN#hWjJ2YXJ*92TtU6Ylg(#XXu!9)11%w=r;jh_dX z4jG3gmYFpFb-&PYFg>9J;VbrvcY+5A-{OUtSBjknU+}k4Ehu%!wrn-iFIdpi1yw3@ z##oM%@}2In>!1C&pq~O2i=M`~5jOLptPBGm8b=pzrvlbdP|8N?Xxx zu4%$|6ZCD%#1MvR19~|4C%MXx;$m=PSrN^Qc&|dm93)Lsk#@F`WzX6ouI)`uzl{3G zHzSdQhlE<-s~#5v@>eVPlT#-n zW2H5dn|l1j6KF@2PmaD2pIyF2-!-nDm3ehSq~WnLQ5;HUkWjE*v)b^ciWI{t8LgCoSQwqw4MN_Ms(rVIb%HUC87}519*nv1 zo+;p-$7PLaY3-ZexoQa~Yy6f}?}5=dJ;T{h7jUyzkzH^q--vd3vudoSh`SX4K3=U` zr`xP4<3H<$A;V!ZDd6>vPgnUP{|6+4L&D<zI~q1{;zzU1FiR14iO z&8nkx`aa9)QIv%{6>EEMLVg%(A=yHN@zu2Zv(%@(s$zOgnc>(1gJEA3A-qtRqKHOz zQi&-t>=glC;hHE+*A^3aTQI~xxrqF%t1PbU@sNQ#ysp}3#Ar;`%1%cZE&`J}U52_- zx6Li~%+G^;&pZP^a+{ab`|JlexMsuPOH2PuYr+ZX2%qrWSLFv246cx^*adrKLPQJuk?$z$b$a|Cn7`SF<})g33w@$36;#ujm z6W9Jh3T6rUS2u*HpczZ%L_LCFLQ_NcW=byT-f@)i79L^i+69VzW6&xd0fD3GnZcY- zRF4vrDM`*s6t$MyJJOk6hs(d^t{nd)Wb}XG#{Vrt4i!}uRlmA7*Q5*W6Sg#@`oFt4 zI|tW)N#OsZ-ZZn4sjZs31G6G2D>v&$>1kIt_m3X$Kf3nr7Ou=v_9pHY5*B7o<`&HI z7LHc#)}$Qltp9TFI{oEX0$!m1devY9n6>yrqo@@TAKDMk$+yADxuFO=d63&rq^LkGpx;K=V2#BfqfL9GI^)(B*7cLs2MLlO$F?(i1Vsq!!PWO^2;e4$;RY)H03U zn{gZsrobq5)k%uVFiigGrs$~7IJm1XHEi)ZP?l&aF`cwBCZ$(%)2jh+fc~0kIJbHf z%_>9x%O+1m^G6=3Wsw*)O$B+S@(%@CzQLnf29s2Nj}v(Yh6KZ+s9mU7|5EYbE7@}# ze3l|p@?7|^(lqV#e31yEI;`W{6&JLSkcbRZB0T=_-14#n;}#>N|QG$X2?;TMolhTFUXJxGs7& zF%XU1+q<@f&88m+nwII;*SP~ZMovxRPke6{c54j9(wNv)4&^g(7mw;krpdMV#FO(! z3QL$|8yKTPn<6Qp2is&c-z(UDy%vZK&1qrkJxKNaC{hhFe#ejWEhkQjb#BI=Fdg{5OI={ z-kplc@8r{!5(2HLVZ<%8$XK>%_*aX-aPEe3piB?e8nD?tuh_w+m|s0miB262GWJ() zv)_q1mBHj;)AwPI&t{w*2y6|;BZiNA>9fp6!cJPk1_3K;RfcEnD?;vy?W+!jD%(ki zYn5;NPe%caE~JOtF~7=V#%itJ$v!zX+_x}$o;Td%lPcf|8=r~yxgPGG-HG~ODz11! z^f8N|%?sx-D2L`m+qZ?{<}ym9g->w+41<8gMTi)Q5lE~-c2Nm&eXxumNW&m8#>796 zR9S2hPHB`WYm{C2Xo_UJ{*>J0i$dal{L@bQEh;;BocRu=I=l^4mK=LR6|Jh=##lhDNUs>H0rg#{PXowJOxQQ76x)=WIzDjaVgQ6Z(#9JiRCr4@Yv2OHe-? zeh)7{j}^@R30pk-M}u+g^+f4KAY`n^J&!je;*83YkR^t<0O<;6ZWY30sZ9taZ=UMriNf^ zX_(gSMJci2Y)_ewm&V6In=FDI>_J5}#|yK@%`xL8j%*}v+ibK_E#CMjU0NGBSpoi2 zL1k#sAvFpU$w)!^{!5iVap-Qee<1rBl(*0moxd&lTBBFTcC7`2PJw1>B;L?Mv3A^% z0{NEK*=S-}#i@F<0iR`gT0$pD41CSVmY(K*;OS>#P$&|5ZD7k922C%eOfiZ?-08m& zra_j3NN;WE(ddyZ$C58a2rx>c{Y6iFX#6Slu_2U3FMBDLoH!fcZ<|Uvg`Sv{FXI9y z>$M_Av3ey_>9;jN-Q_RKi|V4^s6$=_@zID4)=cfUPWwJv@qvPdO6{w5UcB#|~htwZgL&*z<&F{y(LiCeXT6Of7 z84ef1KO1v`QHPFSxWQ&2QV@{5d2-HPGdy1Q*-2L1eK#XRqPqo|Je9D3k_6ziA6mE~=8x%1W(E$%FNFe3kg^OR=m@#JVgly^iZ89~ z?2o`Aag(PSj)I#*po>8E@#D+zSFHpYFTz?&icTgtEi znsZ!FbQ*g8?_Su%Xv&}j2^Ju1mJ;~_6Pj6?#Lh*^*pSTZ!U+_E6m~bQ4XdnfG!UC& z2AuwS8D{XToF2!H^$kQ4c$I<)Hj{^Hiic*I{v-v6x{UgqU*8uF8NG!4@m}oUf`pDi z<)@n?fz%Bn8-12`=?k%a4=qJ$A)zWox%((HOhbOCo&lgdWxp--jW{)a>#~15`TJLe zR-s2}%A1FMm#lS9D)Z;^gzZgO3`CzB!iS^geb$M2TY<16TX8woL2?u>n<7a;?){G; z{|{&Fis&d<)^%#d`6RyHj%#wB(Fc1S%`yRdEkLrzyF=wx2=_WsPENA;DK|tsKeX#I z1S$5ogYe$rdty+6DvK(-lx&v_9WEUdMWJy4X7qm@v{~yb{3G&!Nh3uRShp*Xe(h># znq^PJp7GeTKUG6^;YKJABuReH&tg3(PjJphX8$udc5Ps!%QKn&Kj7}0eXcc)hexs> z%9fkif4iF?$Qs1@kEx+1*$!$)_j8k`NF`SMe|9_1JwJD>L%jsxpw4~)X0jN$!kq#~ zqDMhMIU{zyu=X(eFNN{BP=CWAyXx+f1!Ez*PMbb9O+87N;Us;!k}%_&pE$E4jQ=Q0 z({Uzq(e0N>^MKJRpqSoMF#dOb`8U_?AIN$%+@Lr)<#9$wl4T@dxxDFB60=dqV`dJ$XI(qyZHd^+CJC1>qk?;GvqmuPE7g8Z{g}u(9|~8v=_i%`l;CVeRD~rXxu^~i zX$)M#frv~Ep6L6&wY#unD&l`F>D%``h@58ARN!*QRe9N2-|lM(%I-+flH!5p$=@YMVtqlEwYv3SA4MiH^3#qyW|mmU7$i@-Q?R&n`S2<|m(JI_NC2lwt|b!cupAr3Xfh*^hs1USO)K`%)U%X7F4$ zX&U|F(5jb=g71r-_I{?6Z23;FcC2V|k(y)Sl_5C|rSo0Yaj5-(Cd$>XkYRZ8cj4d| zo^K_HS#NbD3u%kZ{}r|du2=cD-?qL`P`LF-lyW-i+*+@KyB$p#t)`4l`;aYE13)wE z7ZQWGt2PLurm!w#RhG8Q-g7!hnDR%jOZ=JQ_tdb4-eQ@JBSQgu#p)-L27Q1?7=cX%}L zF|t>0PX}n6Dk;m2g#G-#{`GtFt9>m{SrhQp{2fr&78vOHsaf*4$QT9L-4PjKFVFu1y3EtNVFZ_PdEv$+4I->_`5w`wz~oKYte41xb+eaibj?{ z5JwRF4&;3}*QqL$S`Ed!y*fTlckmXktSTzCX`n)I7s!9D*55Dx3pE;ed3sdUaPFy9 zLs{0=Zu_T9F2S^j*Eaj`y~fwmmodMAiYB_KAcbbE>iv1|miZjoWRyfEjfG0#$)EuI z5x(|(E&#~l`)`Ax`On|i0qjow;?uom(>qWFshP%fHd}-?)2`F4ewVAv=W8c$6fY01 zZr=A{7r%)yQM|TS&o>pUpYVUTDiNeUie;}>GP~){UvTCQ;R8gK;cWY<2*ZZ&Fu<}i_xn8Jp8+mXd$BvcE_NeRh%f z8*2doV>rNU>btld&zmlpvo^%(rem*zij(t!B=R( zgG|QCW|4)6U(a(VoMH1`Nbnoyd;eYZgoA_ae~X@It6Eqx10?hWxOhxW*-R|Wxhz;% zIN5o4SWQ?h%`Mq^*eux0P1wxYg#O>ZFkn`7a&m|NNAyRP8Q^H?MEZ}rsWPkC_*js# zvT$&)Gi&LwlCqPs8T?JJpWR_P+-+tJMrB6{+-u~L>UcDMOj(7mq?`x3TFjN z#pUxo6ciSYJ}Qo~y1Fxjr)V!0CKj3sroOWNGKa%o8vnHV^?IGOJrzoe+&BH{U~zC(owHuo`FyB%{PA4%=dh?%Tu-qj08-?e>yKm8-&MU$T};r%ftO zrN$Fy12C|nQRB(6Niv9srkWEDaU4ky#yu5NZ&Av351HZx48JVXy)5II0&tCiC6u+r z9;1gm5LS6inK47AfKiV3Z^$1n5BTvuZypjgm(NVSl8v~3SqvBefp-1+-6?dYsV=>g za)7-Es-{KC5t+Rxi-1Z%5~v{3VyZ#DCdfQNJE=d_oGPNy1*@{3vk{x!Ia6D6jpf}| z@ZFZqgW7TvdL=xag@Ah-dnIz21*Tyec_pHS1;^8j_^hj~5#>ILYTIZme|TSov52V? z!V4AQ5|y~0LOVqI5|?45tDV1T**VfqPUo8<0$_-AQ)%YG!E;#2V71}lTDbgO<(uGx55Psnv53t9VtXvxy z_Ps?9i0K!+?VXnPUC9sdM%x7TeGL!D%NK$HopBFv!rM4yk|(En4@O1~?|Q9uIam(X z(lC5eKOJv!NS@4Kz&nA<(Q^q_mP8&jh@IoO;RYXxucc2q&xz#xNJiU1VFvm+3 z0AA)Ue0MQU!Sy?(5yRNK2{4!v%GCRmpeTMPM|(+3-Zi{HnIZcrZHHyZ1pHzH1jNP@ zqK#y~4^v7~O7~r@l7a}Sc&U>*9+g0Z6ueAHPDcu^89S67tVtVi;Fp}vn~Z{ej$68! zC&VOEysSPqFJk5m$<~nMOZX%+C_}7~j%Zf9a`PCzJO=ZMUyEMGfO`lZQOWcNIT)dNxCn*rnn z6$$DzR(^1$>(Re)3W&au3sos~H>QlgW;Stuw1H8iOfm2J0&rtqS)pMzLf3@Vr2KkjDCY@wrxq0QP z&R>o2THE;gQFx8W^Jf1OqI#6(IXd%}a~g7OPz_sLqg|(s5T091qkXF>VZP4HXBcq) zrgM3E4=^*2+TUR=NU^ub1fr#@VdJ(~1!DWO$CFIw z|8eK1G(JL#YVNx(ndt8J1(bZSaR0_9!tgc5qr~&{x&!Q6##>av$Q~B#Ff+o~&IBI# zZPw4y+qgH5DpvL!c2kVD1pnTMNiwcZwMmQRyAU31vv>rtS^kvN}Ot@Jicw41H_@QTrDHhMiGf z0P|Uy+N69T|TkR-Eyt6IA^1kPXPyYhB5*f=(oe}oA z>4;`HkLSBD>0l@iy&HIss7q))mG#wg<@MlmNv_BAIzMB^=F_L}Y-OuP&lcO~+B?Q0 ze_!8@2JAn1NT&xPG|iJS#0hOiqaC+q2BI@>3!nK-|I-mGziVhA_B-N|t5y$1uV-Fz zp8v?j4HX3AgqlI#^$X!fs4U<-oBSEfg{@6`D=*~#$T#o&!2=7k{Vz6?EjXwe)!ovG z61w^i05Zh(d`znt&g6>Slo`=#&ZROgl{zCFb9oa({|Uf;^Ne6R9-RG6KlwhWM&+HI z55QuBvHk0D%B3e9sCdY zZTb6sM*$;~M65L1&Z$o5-Wc5B5?sJ>ZK?T%Dm)Mx8MD`K$oc)OlC<3#)m^K`_J6P6 z((?;*cpw(ukbVito@$Y-n{RMZ3FON4mv>^c#3 zD&l_6WK}L`>Mk!tu!|@{?ykg*US)x7F+)M@V>yXvWBEW>!{G5xOGba~5$mIWMOv^k z3vyR3kNi&NIbM_nW5i4kE3$Ns5GY^yeGPI(n)4sC=!{GMHe^Da;FvCTO%mJ;hy{*j z8#5#FuQT6xXDSbZmDztljQ)y-%+lamJ2_VPpU4kU@`kE@=!gqcCFbL|Je`rRb9r%o zoRwX5DL;;#1wZs=9Xn$h;c8vj9nl^YLv%(oKZZg7e|MNYuPMw|tIU>+Q00=@`~QyG zkgwCTY-gMM`OhkD+WaTQ`A?6zY0*l4rI3i%k#Xrkt-hgA-fO4*bN&+gKiuWHG3VTd zK`YIb(mMBXsfEFH@%c8yf2TK1gK@HBx`x%*nPp=OLClv}?fu*fkxrLH^_#vg-$^b( zgG#Y!b$*tNPfQn%21GcmdRog)+<%yF=l*xDEAd9(^}%;M7<11;J}=-wfDxcg{sUz} zt6-Q=)0Dw;&9u53bHZq`LCo#9DjL^R>(Bqh8*A+S=40AO}K3vq> zgz{ZYJSh8SUzt$Lj3V%?$hONd>^jvz2jF8LFf?b1IV<3|wzyxQ8U7G8_>RyL=nk|8 z-(@)gsVMb&m$+9y=xlu?r)3c!DPbqvxkEAmH&m8uSqiR(6)MfyF&!}fyZyh@C5srP>;W?8#QNr zFrL52X_TM>@RgFg_la_d@{y9eZ)t}>=N`yu>hPEaK#pI*va_oO zAOmM2Z~aRF@PMGav=!t?BC-AqX=;0Q>mw0CUr46%dXyb=L7w$pClfU%FX%OM2to4^bujZ9kKQxqQcl;DFL z_-*OlK7-twYVQ55gPK?2N~-+*oST|geEKWbp%YLQ*kJ1Rur^{rdEU3DV~Q@=@I+c4 zyDaY-y8~MIa-Oy$Fk}UWdM^aD4#2&7Hk@~~28K}M03_@;+wnXida3IN2|@bQ;3&rC zDM~FFLQ{eVdQc*$v5%`f4DeM(z?5L~nZ6SE5XHC|3it}(3wOvk*JziTR5P2{1DI<{|E>q(0QN>!l(qn}fQUHDjO+Egcz}!r+jdp}#ttNPP+r~r8jYfpD{RWj7!r@>BTZ)xUv3vay*vpydW zoc8N?rxm(@-{GhH?T^<<=A{d7Pr~w7vF6PSZ{rOPHWaC3^?^5IG53`0eRtyPJR~xf zQKv>isXG*anuUO;bLvM4AbEY@a|u8QG>Wy%{GJVHj~~TYCXvx!J1yV|9M|~b)UJF| z-$acAlr;VS_DK+5BC}wGy1WU*ne@fE<_{4lDv(2*dLjE% z4dRaa;gUOR{12oyHf+EF{ruwawavGDGAAz$D{fLFu0yO*5-v`=(&(e;CH|d0C(K7N zNX3x#oeaQhfZ3ABRhb3T8p9=9Pm{h#*W4l8cPRhe8mFa^eKNoquS*& zF1xf1!BMRMS-j)EADSVpd3E#JM45nz<+V+_ZJ7l#OPS5g4Vk!$nzEZafl!qfGtEO% zdzFymDEo6E`6GZxBgMGA;2OwrG$&vBE-fQ+%TjT3U^UbA3M6Vs?`W2*Fj2KSLc|+o zgSu9IFf4=Sk!`rR*)|GCX`r%P4!p}D25(0BcUYky4**f3`XF+ZDSF3JVN>d3763a_ zF%)6%j5>-6aXDZ+$%vR(%56q$v~c&l(K)xH6n5Yt56Kyd*cbpz8_~P>^;)fEQ)jA& z4wR{YX$Us9OX~+fz(}-vO56n%2cY1m=CTyfMw$5Dg+d6*2%C`qoe!##@$ruM*!~E> z%E&QZTAmEBf;c8fyEH-yQ=88kzV(qbm3?yF@IYOLGihxq9vNy^o&k7Di#1Uu%A@#b z!og$!4x$?mW7L_TpnoCa(-Jc4SOPP`tvX)%2^L~$cB97+i17Dnxw8ShZ@hz~p`HsEj;}&%5&^fxw_B~pV~}Ev_!^TM z6aXsT%?GWC2iS`jg{HWxLSAcp3mw^31%%-dQ$8j&X#h*{KRHm;%|2`K!B7fC3l&bQ zZ|DImLf8rU$TElu#077$7!qD%bUZeHWx}N9rE8T2mghRr0Ckb}`0t)WmQi$EemCoy zI~pH9{i7|@6-0c7XiiZj3Zl-^ww6Zz`dk*dn(X6nov4NiLhMGZ`cN)H&JY5*vRt)^ zj}f61R#3njK>T#ppv*8t#Zi3Xzzn@~DdS4A)K2Y20|1R*|HVpNmdTJ$&aLD09@lt{ za1mz|7|@Sj&ytWCHdb*EKbRi*yUM8&$$DEEu6jf-#KU|Olo?9i)IF1f5-jlxtgiqr zquF>I+D8uY#ucj(85(itBBWG9KXino58%d&%#Pd@m$3zqPfY0O+^Vt3wrGXLT|!+) z^la7o8*-|H-!mZ&NwAe658XhE%i3Nfr?x(Y1BrJL$&T(Qe$+1-lmsN6M5)rUXSByP zAgGJv5)QSn0xaS+Lh9d;GlQSz&GYPn$NKV_~joo;=x^6G6d4*h)B2#in6F}x} zoqoLti0QUn8A%?ypm~YxS!Uvkp22ANU{#3Oe1v9~U*xnMO*t~F)p}c(sEG*Qlql1?&~Sz9 zv-cCg2T_dMP}0u)m^>4&!Mq!*9(>zUk-WOB0s#~6Bf_mQtTZq!1j zZv5fTYht~$e^L(zopHkY7443{Fp&7r?*8c;>JzYIku=1ZC;s0{s zk@)Q$X?RkkEv&rWE5ezBP+8r7JgyVXQCzgYK0u-}N(Kkk2VRo?k=Ic=YuIImPdQlK=(U-C{N3W0W=R zE=L9kqXubr*{zTs)aQ6lw%)%4)(-LGEE<4n78u-(01|^Zb?4zOpG?M$zZUl2|3Xz# zXK?iow)fw$PH6VP=>Op+ubFl&XdH2;$!9B6FgxI{T@7%S{~N|RJ6L!fv~Sr{m*6?# zhnAN{#L5k-Tc@Mz@n3viLLR)CZ-N)p|87$=YKga>xLMZiFW)ia`IRa0`ClqqZ|bcK zUR+p^uc(2eT~YHpa@^{Z2BWY46BHmEnjaes^_+0%_W$LL5=VK{8dp?^0sLXPEA2V; z+x2KuvpjHVBOURq&B{5jrlS^2Hy|=vJiU1 z{Ss6EQ;e-g|+|xF~Zrv-H1#=e+~f@ z(->1vU|tWt5*%MI`zs5O=!&f`s>}Q+OAJL&Y~4|goKjd$m>UOVyMCze=ZEs&tT7t> z9*E(nhsOHBO%;d~>N1VYPJ>*6q{W5!VIg@&X$c`ar_hYcwpUli+LR%BsQWZ>+f&qI zPASx_83pV?2I8AEz5##$5t=U3T1Mms>gtML7F6X8z<4yBvpgb=)Z%x3o1l4Qh5;)h z#wIGS0d}LTOC~CBT@&i1_A?;Ssb1#;yY$g`lvk1De}kC#Jt`|P$t^pFI<0(`Fnu&T z_CHNIqHec05%dlb5V!O69jA{kon;ZGWim`_tVbgn+W{b>&4e8#OA{3|z-jcrJstv2 z75_NEGE$-Ma%>=NKP#wTFJ)h!x&b^dGi@Sn%sR)PFOHe3t*g)cyX3cVrlqlT9%FCtk9DFL&A_4!o+i>l%d= z3&~yJdLhnZ={i;~uP3%xBLDi+g%{y}2wSucd}0!t&M zqZbdUq(VH0N~UdReCG&H&clR#?#pBt&~i?;odOY`qi(G44zL1$TsX;3Sq&vZ z`NO*1r@Wv&nlxGO{)}5i$&~^72f>6NEaahPjKRz zn5fAxEWibFdv`y@M2;Z1R`CBT7JMDktu%=ZzGoP8k3D|1Ge3wY1@>=bA$&#H3V7N+mcM zMF-zIt#fS*rPE;$8c(S@nLEwx)gu@h*Z3>!zhV<=Iqg5#l0dj%Th)b);?}j|=8?~v zx%L7FQQ}AbM{cq%wxtd~8et%LA-tL+r+5LJS={|qXkV&p)mD7w5wsBt)9bDQme~67pCgy5Mp7UlT{5g_1AF=Qcx= zZMEVHu2TQyTD?0<_d^NKlMDQGzpyl$-+B9v*(to2OcB6W2ISh7h7{cSFD|(rV*gmn zUkUdbDQYUzHpe1aj%CT`541fOB=@+khwOm*HDk!{sO-QW-ND5vdgqzI5Y`1J#mtDZ zkT<`m|5iK;sS!)6VU4);drl5ZKjHaI0Y0f^pOQgi2~A*_@M_0pPCUT5m!{#Puj~+F zv#}FS=@>*Uh^)1~(-fghzcjrb4});R*UL1$scOh?qvsErg$}NsmN~c)9?g~x z=RdGDCiPL|70w?tyyUPdc*d6dv)jL~wuZH35VyS;U7HH}4C(NenTu^s7X7W9W1~+n zFC-G;G`NNOUc8BmA3Ndnk+`)@tvU=L5B?Q7r+4abf+GETnL<%k@r~BX$y#yeEG>d3<2)xHEYMd8?Q}gF*?+V$UTqX8fry1HD=P zdXO-*Pgk#{==+%Q@mxOHj@39rsJfnr)FQh>SFxAaS1YIcHw{;o7a$HV1FO%D%#GtV zx0jX|?nuN=33u(xi%^zLke$F+8MR{E>qoKfC1jFk5T97pv5CI^7&f=Go~xjLkNJ|Z z8Gv~P+78H0VtXfbwgQY13NYR2V2$>^aB6puWaSh%^sd=;f4PH!SBgCC>I}x*Fy;mB z8L*`lCIhm7d%yr*&<*##uYR97|J;dE3rK_ z@e{7%jG6N>V?&FHF86sbI^NsG!DM;W+{aAE|EK}z;f^OGyNwpSqfH(`-^ht;2s%ok z`6CUcg;6m>uPa5YoDw!!zM$1T_>*HpfYP$do8$` ztp%&2Ng|(fYaW(GNp)B@#|PSK#j#Je;`tIog{K!FdDvH1>yHjj2OwpvgdPF0-KTUQ zlylkNmgq0WfTv=rpNslmBKH(vq8cj}sN0F5FEuxLMlcqMGgxRul|)vl^WrTM3n?4ovqJ`>aa>ixlwR~JKS=4?VO>HU z>B`8sR!ig;wEc+)^80W!8+1oSB+F|TRD=wInc;dQ72KF*_GQk#46Ho8C5T69QsGmP`w@RoE6nj^zJ!Ybv&dbVUTv$k zZIu1m&)lj12i3M-fP3ukQTLjPV* zQwo9}RWHi9;PUT_FhCFn)(~{UjCL7$ckL)q;S(W!E3QB`!$NVX6JuB6^hgX`gaIKR zEXLdvPDXx2W+DN}hGPfxhH^|e6?%CwXhRu$V@x{NZ6=>oEfB;j zXYQUV^JVL()08Y(^!e=KV~#2hHZ)M2PW&Pe;J$E~v+@7cI_7obU@Nrc+~Aa;LDM(Q zD9Jke5929>DjvD2XwC^hAJ0zs!kxQ$VBao$nZHaep|hww9|Ks_jTU{WA7N-CJ5wa@^Oi2X1m1OujG?GiQL za%L>#@dCw_gHN0FeNV4`kmPQ;oip;QIbkd@<16lLq_oAH>uILEeQepYBlNO>bfg}A zyZ5f+#8Ir-SmhXJz9nT`x~_Om=b$b)VrC5NlQMw1?IIMLImtjT@;y9TpfOg ziEE@FZ@2KJIEy^U)0G_4){_a2_7TA)v+Bu>$LTRcv6X8At8QU!I-HCTT&2VdyAI~| zo(a=BYBtz(qoh-Z&M3>zfNk5n z9=Fz6Yg)GUPbIh@ZGlwo2V7qV@adlN`k~w9ki*YOo z+}Br<$lae(%tp^Mn=Ug^OI9*9_bTg6yEN-hSWjvpwJdyk#%yAdiPedcE#touS24y9 z7=%YiE!YLfQTn?I3yrt}hhnsdZDmaw&8- z-!}mcO;lP3ZQPwG*Dr1Y);Rv6baEE;(<{uwI?)9-FI5>l`YqRXj@pS>Rl5AZ2Qzqz z9AA|oj?BLIPGyuXS;%+YHSnA?s?-BZ7st5#W7__t*sd*=GlyfLEi`qP)VVA#@#En` zjk}?dQkp$}?^_83b1vsA2DA%Q)#L(f`(r5$73w1Y<)CCNqIeMYeO-&5I&&l~xhVYA zkFDhGN_U{dLPk5Zzok?{+vUXO2M#}a1Z^i`UM(=@)0E>rcGv6CF`g|7k$dJbkI;J}xJmE{~l(2cx z%^-c$O;KOF*xH`Lm=|%mK2mX3io-j>fp# z9D`h{i)Tx0+)bHaeDkCwk-&=1)AdKV=ZScEgYh2d4t^Jr=k2a$9@wp%*x6A$GL%FWK&a*aQ6ZR41|!uh ztS3)@>WCRKN+GMaTpM}ylypT7Mn_Nu$+6Oi3+{HTbs)X^#{>F<-A;L5m=I5qyBLhF zx_efGmzj9O-H4Zde>fNuU8bDCS>kG3%-!l(%>ZHJ`QF89x1f{$Z2_ZLBNP z(*pE79KVHl$hix$hYKWq&Y5$;Gt zkZ8Z5e{baCkqS$?*J#wSpmUU;Rt8~F{$VbyIURDvBilGCr;*yNfpJC@QAQACu1N1V zsEI+co;WL1-1JD;VCn)D#ND!@B`QmMp8fstVaEKg!6c5%F{ilPUFfymJr%d<)TLc) z=>3P9G!(hN+@q=1`XVn^9d??u zOM3uJke~0kka$DFu#$H{P5Ermq&!tRNsPL{(Gl;x#r!D+l}ifECgIts1Q5$~(l%}U zLu=yTn&5aB5?NZ}Kf9>eEo6{I);amnaP|IT^3;$J*L%s6^8-vth)%MhgdxSmLnK(z z&+9UrCO8VAgweq^FAS@WexDD%5th;0mjO#(J5CR=PbpqB5?wzZK6$?u$2jZHMb(t* zz?4}WR3PaWrhNTW&_RVzw|Tm50q@!&{C zqZ1I@RTh-x&O8HF+BTLO^7zqxxn9uUY3&q~?Wic(4l5psQK$Y1$^xz`6TVqY2$fS= z7L~BY^<^%2auT+VDp4i23I9wWp)VjA{!gSA;=&NhJ=F{_Q#kuI=$Ryac!JAdK#tPH znKd)a`6X4t#1&op)Du%oXwO{(5#@SzV{aB4+B+4)I6cILADL4B3irFR{=vtL9oU?+ zR)tG|W>u`|2gNSVs@Jl1>V@4A`%TmXre_Pk0Na#G2hQ+VuaZc3iJ%vfvYh_kb@x+` zA)~(7NjcMTF`;`M15FVF1HL~yveN!f8rwpO;1`qxl-Bq@e=9}ri;TYVS*Bxt6k}d? zy6l`&{k=oEFfsR2YD>4xPSM>h!RC5;eP&10Yo1Gn zye<=O_yOOE5LKEwjbvzZ^I5cYtYcZ}lGe}P8@65KPeji3T^dl~OYg%S5<-141V7Y` zm9;HBpz}Kt9)^Cy$Sv5C{P-iK5&YykW8sAsKAjvHC~H39rscyKJM5WgPt!Tmg*arK zZjsVS)DU9+esUcAy#!}b$u~cTstk&-owvQYoWikCFoZamtzK~{gOhdxVJmJ69^;;K z=BpCO7nF5ruxC*Ew)2V2n`1)w-h9G#Oi*QcyVq!>;X-elw*)bm8j>VA#hq4B6#iZN zdnX3D2NLyP%!Gi?q7f%OS|cS}q*SF6%vVF3+MA#gy+|)y>WrFh=iF9u*-_+ZQ(U8T zfc~CT2D3GDk>R?b7!vQZ#=R;d6j106^5#%3SrtjT_W>J7?7piuFI_|l; zv^A)oQUB+nuAzgqB<_3CnDVKZ_ba$f^TjgOZAp@E0_hx%D)pq7a3(G7eoV!FC zA)MUxL?Z>OPh~?2#xn*^OIxIb@>-?zlwjiJEao=PQo}kd{w@~}4*A3Bo~5jh5_taR z7swx_$=GS?kFA%>ZAY{@aRwOa#?);6GxlNCMcpH%H9*z~=@OBsKNgU~S>^%AzdF!% zk>ZecE2{A`1#g3#mr;!DLd70ja|)xmL;z>Zy6ax`_I65A);b7e$hzxB1uLIo`Vmu$ zQ?})$W0VQCle#*|NcmF3?mCW+k)3@?x(puFO%XEENfhZw6pez&w-}YP^pv_z*K_+z zI_Bv{7Zh9fu|Z9x3k}dc;jDGAof;Q?+==4(Jj?c`IbuN$Hs~) zTgTUh<5M*b#W?GLk#ALA_8O?9GjQLJ74O)BkqxFbqUw)$IdbYW{U4oIvLb%sIOCLE zAIn9=cZtwgiuuGKvNF>#rY>KKuIe`yJ!;TWR4oud(A9WT@QW&q_=kL>#Us@?HE z0GkA|&1 zcCAZ*k>@?dHVAP!Roe87PZbuGYx68!7mL-cU()VjPK#dl$?PA0T1drLs36@v`w$+} zu4Bc4ru4HV;m1E8*;v1lF98o&*!*xd7d1bI5L%a^=l=>p*qN_B_jS1t-P@1X|$Ny$z0_=D&xd?)B(UpjmMx^1sZ2(_D^w-`u;taR!XM^Z6*{ z!+5$4d8sd>lC|jAu^1#I1>*)+TIk*RrS1E4J_YIEP?uLuy;#h`p6*Q5NaZwPBB%HR z#RB{D0~bc!0+zcjah&VIlP*@V;W;T=q!=^4WxQi2svuWmaP7VBERw9msKD7Eb*)lv z?p3&{6iy?N3_H>YLXYllhfEsV;dy@Gu=8uMsO)!L$oNBzgu3@qbXI?tZRv!I*lQSP z?3wU~F%(4dkcAIkvXAy$sJ8Oyl&BZtqgf!ui#ImUVPVh~yqaWl~Dl!f}}0wgp1h%}#bYXQxYicO|w zJrj~_cahI867bigyPsm0p9!P1evmz+4ZF}lzM>s~Ka&>lVI`8|KLtcIQzctm+KyVo z1ZO98k&Tu@&Q~2f?6zXDkEn8GRu~vk$y<06Rx)0u#zUZ8hu+D#Ggg9oCY1jJo(%30 zL^2%L`Lcg$DW3_Mx`Dg}Oaw^E=3@ty9z8K5D=E@WhrXaxC1D-212vRSgiK$6zL(7g zGFL`*bP|i!RXDCTYlc_1M?KrqhI5h3R%5k{wf~aAUze^G8Mes<9$9rh(u(J}FLzqN z(u*|WEK{X$ItIJn>)+9UBOv`uN?GF@WYSow%LOcD&FMkPkXX$G7#wvcKdw|j)X zVv9+?+Gosrs>cG3GP6$9J<~AevRXXf%hA`yzy$0?s(V!I4$w!`Ehs>o2Tee^_!DGN{MiUh{9-g++!VE)6acOJ31m9l@U^G+WFr7GUlw#@ZyPO(Il&d-sRfx zkT6Nb4u4Yd3McTA`nf9o>E;;Hhp@+h7V5^k*(5i*RTR0O^5@Pkp9L-!>9D`^RWs)E z`<~|L8uud()8+eIkId38_KYSfE%Y|9QX6LQio(f}^BItw7swRvYZbJKl@IQMbft@< zcn^THoq7dFh_ckmP5KH&!iM_N~9V$ac!d%5iond?PSpEB*K!z%yI z?}OPtF6=2JU&eIwMN#dZNlA8b2PI(dP*c_}bIO#TqOYzPgyKTKs3BV9e66BT_H;jl zu}=(@zd1%;RDW9un#f!S&*1{7Et{5f<;0Gl>_oQCe8yj2gMJ?uy5@ID`HzMyjGWQk zHF?Kw(X@(>-tB@^pG)&1geOP_^mgUAHBEx*b55-{e?l~zkP&r$&pbtnp-G+2{zAI6 zcW(MD{lU6~F;nRHl5p&l#v#LATr%<$nQ(M=6Qi&drCAt)hEl;E2RKd%B&^sVq}orV8nH%kieDVgD@ba((1S!Nuy6OpH~8 z!W8!gA@ZegbT4CGbwp>yz!RUoh0TEF%ceIS1W&55|1!1t}(*6hc<=b|3A%{6rnJwrytF7&KIkY1vmf*4CwCsJ=V7wj?|%aHwuMQ#3tld!V8^4%SbrP| zqSU4<%=`U21B_i4fZf9J(C(0%DKD9z+bxZf(d-}ZZNv>Jr<)-v5=?7x=HNl$nugp$ z!ySi6jw-fW2Z517dEDBtE1PcD$5tn%NRQ8%;xjn+&U|lR_R7R+-u~YyQL1)ffXiWH zX1F!@$ip5#%SfcqyeE>OXx>sYb9*m3=)`8>++pUSM18R1uMq#uzKt`BM#(NB^g3x~ z5VY-l1sDk~O@i^a9C!$U*BYJ9diM7*k|-p?$HH2;q?3UirOS zs{sf&j=L8;TU zY#JNbWIuGQt4d0`GLMj(QTq?m?ny&&TibIKmY2%jhMgav354GH*ByTy7C-sC1FP|( zfGr2jf5uNX*i)SGKx$bnf`yT}Yu?GHY35Fd|O5jUNs!kZV)XB3ez zdB&JIPrJ_9%iz^M$nnP!QyLwS4%I@N`9)$IPIXC?;eg8=JZxlkB0$#mCDQxLu|V9t zh+N#El)UkGzk3o-70JHk#ABT&H6-Tx1PnOcrp`>z8@8`KzYy1A9TSeFi@Z*FprZR zxsIrwo%;!jd)PLd^U}_|E{%gq>beuEd6*s_#v?z3pozs3CjAqo9(Z+<2)D7nB->dz z8g`wxz+F^2@R4B2SQQ_=Ima~T1zK5zxvxJawGjSHhVFw~+%5^1dU_0AbB{9b_e@Ig z!}zi1aadRSVlnIc!raYXl42Nh&U{h57n>K}xEJMjDop6(q&+%xSJ!X+fbDtzyraRl?>s#WRjoNexB7a;S2tU-6Qtdu_8qamIE zDXwhVmt3;9Cp~5lGmxVk^|SvX92cS|d8?)W(_8Gn`{Yxd@MXo6_VZ~K@MP6T+_gZn zqs%Lwr~MBF=(ikE;P;pM(5CaAwZYQ`)DS^05ZnC$+z3q%)DO!&>{bBP^CSE87yn|) zi+%b%NzPwQfV9=w-7ypVGA{H{`Z_2xTy7Zz7JDYmu_~M#G~cFlt|1aADLW-k4aWTV z$~O7zMWwvu=7h`a5i4ZM&CBE622|UR5n~TfO5*6}k9z2VZ=X|Yl8`!dbrVMGifXa+ zydz9XQh)EA!`^MXx?dxjHGjJvEk$-Ir(z}Q1(-W2NUm_L3c|AdFA9pGp6kyi_9|85 zHFk{3E_)2o;OaMLeMFW&5up2+EP`{{c9$C!!Gzw4xzQ9ui&d{?&d8A@-6wj!?zxyb z#hqz$YjvCIGpMWI67O;|XM3B<-m5WB#J?0aHakrBaq)2rNa}ck`PLUnWiKX(J>#04 zwm_aLp}gO(_%y!kcY3woFP5!IuanOajzu;jg;UjN>aQCNEPNoS(mAc#vWM20M z=|KC>_(Q{8Ih~QcDD!2XB9khdFl{jylz==5r}2(b9ybcrCn2Mmr}RMSyH(o8{wvI` zDNZ6Z?Sk|uwg%Shi{9rHdk}KPvdvwvfn#^_C7;qm%P#k70~wA{^6=k^X>_FuDLk6f zgx0Tu*?Z|~vklx$E*kj@y0;GIV&gQ#`pw%~@)k?=_q@M5%XeK1ZSO;R>@nXR$*yL@ zlsSDL$UH+m@OP0>GywNJem@=^5?sKjTVRB1E(gEjfWIbAj=Ocnsp=l*Ku}6GdfZO< z#fM_TNp==LoBLwcaKyq`WDby%b%rR5#!TB}$0J{V@}%N=-HHu$8I3toVzgKa;IM8-5e?OBQf@EC#DYpOa{9ctDeYj;s zedj}Xv8km9XTnFz)=eZ^iD{pKf7i1nE8x=6#0f zh@2IXvEsn<29t++n(tB!YeD%I2f3-km}undwKy#<)?S3_n01xlugv3*)NCIe;Xewv zrdfR9)jwS4MgezT@!!cidUNW~tJnJc#0wWL7+JomI(Cx(+?M)@OOqvj!HRQmxQF5_ zd=_3>2v>xcMjr&TMs>cF?%>=GT9E#gD_>f>M^Cr8{LbB#%GI&@64JUg&U9M6r>p0> zzi$Ejmuu*UA`9NwEUQHls3~iHy$%)UlQU~$(tXj(+xPN)Y_9B|Pl;WZlL}J#C z_owW1k7qv2${D2y=uq%f%kbhKB|l_BvEXjkKRF9zht@@ZHy_?}8|Tmk0m6oU{}hd6 zovk8D*2d;);Z%3C1kkE@r4&BlNKKoM5#V!EWBiMRXW(1TT@P=KR;I#1>6F^#O{@y$tZrzF8lrg^H$N8G| zTihktWR=E zfT-bgEIvAAj6bef&pnG?uh3hsz|3ftbWyXtm&lT}vMgiu%~_QYP@d}aEklIL#+Wit z>00FDdd+XEBjMtyilmav};<>U*(&pgprQMJ*j6E}X5+ zqGC0wO>5_YB{BLM(f#5I!$N%VkTKJ-on*bgf>I+{l`#J;9&P2a$QH#}RYNl9z_((K zca|ih-~GhVW!zN9GQZDsbMBCx?{Y+CVbUMhkPV3dLA}|#-ZVwvwrOe|p(tp$w`S#r z7*J&OcbpP1;|YkMr>Yh)CMNE+bB^rX^P>EVy7WVwq?M-9`tj9R;^S<>`1%06H5B~a z{-)bEB7NiQNbSh(kEYR5muO#%0&^%^B122fKKPK8>G8PcFY}jVV23=af#_{OaEg-v zx=zY1G##`B)DzecoCug1^^2HV^{`L~K_7g)ir$_%wh7zM`}E^_+LJDHj4bRCIbNhZ z^c{!Wlz~6JlHJx@nYf>>JKc64op-FDgmLD2JPoS+ovss}9 zd-hOllS-GjENep}qDo!*QRN1&R4~Xs;dD3DZ)WBRG_4uejL&jW;oW?xd&hrP!Rf*L zkTm?bd#R?_=WyGw$*Z%&kJ5Zq)|$T_hEAxpt$F>yROV_2XVm?>IP_J^)pDIfW*1y| z=YIF)5({+55m_PYxuc_k-!8x(P>*uHQP3P))-c?Q0xGG7e))T(4QiqW*WNsXi;k$iJRB75cS-NF zdPW`Y(wsAP*6l&8t*p$njSB6$XJ>%h?`7t z{>@ePyIn_OO}H79_PPeOopJcWLNE zE8z)reVKdXMrJ~lcqD?oza_-C9UGpZ7%{nlS7F9sB#T zINf^#iE?YH7)EHW3n<{xzy+gKRnP|mUmY|K?CCBpgq9`hOiR?XWNQ|Q5G?!0yS^n2 zrHu`z2M>H}s%L1VAtVCVsxZ>u+=G)?zw$DnPJgd}d@sm(x&k&YB!6br`_2{tq<^T$ zM4GJJ4Yo@Ey3xGyc#oQ`<-%Eu0&wbGKKSWj9iLDFx;Al6UeSfTbk&e7@aRFIak+78 zrhp47e^$q5&6-8yA2{!4&=8mJmQ=bLl$_ojN*OKjSr7CtJid{30d^#_S^<=-9z5Ou z-KcOlJT#{Z0~`_PcAYu6PIen8w_ADKKq=(&e@SeqdRw-w>310(g-`6*Pu5eGb3BiC zo%OAG~USmx!`@0Q@6c!Yu+z<&$#$k>W~hAJvayjMbu_Uf*Hf+2z{iI0L~tT2m;6r(_DHJ?UI z0%lt#t9$gmsdn(&KctbRT@(=fX9qf)8|~rn_oCC}{g92cruG;QQ~$J@2F%2}5s(6e z+rNa%Nf6B}Wg|`)B6N!4h^uL;;5ommpa}&EAfosQQ8-uRo2?!~h;M7J>@8J}Sd8^; z({D)oF#5%+BKoa$g}62Ct5UGQRu(J#zD<@{LdiFe+Rv_rt@!=T2iB53BxmAIdr7uJ zVf5cyvl6pf-qY4DD)h;tXzQ6m&ub#vX>ldpjMTu53vF(`&)sXOl;)!DvTsPQYckVz z4>f%aUZ-uG>c>@-?V9hE5RZG216=6UZ<$Y5NkZb9wzLhoKXODdaWXI)zu;oYH-`XP zD~lBWl>?U-mQTsR-6)m8mQZPU7-gfm=hUp$)4YKD{xh&|tY1mg>>~X2``#qAC6c4~ z1(|L1ca3koD&&t!2Y^D6tPzxmxR0Ms(eEtaJwJ@CLK&tv&^F|fpL+6N!1v&&I{e49 zS#IOM8G~>Y&}V)DQ2utU`n5=#p1Ng|=$D_$)!yN@PlDzYoh;RSi}L>%--RFEl_|`@ zdZ`xrWS#9C9(N%5g<>;6+VgHpZUZ}Hk1U}eeW-!NF8%ja=c{&A`It|a z7;&C}vPM@4;$pLOAqcnG0aGoK5nHnjX}T8ZY6kCK`y{#@k0Eu7wW}o0-X@>vcL+YL z_eTpZk$uwzsqFV&%~!5%W^fZ8x`2T1{<;i5M$AtA9MsU{wv7Ai<3D^GIuJ`L^&oy; zQ{nRch;bxs&bVTyFsr3c{Fax?n`3i<`40mAzQJneYxa-NR1=5I##3<3ourE0uBiRitlmJ@-!f#Ph&C*A2-3>nQn06JBev zf{e_FSeDsKAoYH=>$tiJf47-I()n}QzDvOc1p?*UC-0=snOM&bbIt_0pS=3)QV{}+ zafXg>aem?lDU^89#nKv-uh7s?p_0F4SqI{;eC?0n8GkwifzI9q9O+VS?K%k!GZxc` zUsaZKbB*>g_)|VJw<&|(RfInXF)#z)OYn##s@JngLXDvfAulWAAdZ=?IFTQT9{cws zw6D!Nw7MJ5uG-Hik=Rw!IjNyS-t9953#4%u84X|fnaU}_m1!U__z0Ty&^m+X;(c2u z62P?f@*Z0OS#JvrZEeYrdn=zAY>dm{!ZZcc4BO8r==y&C6qr`~ywunCLR+`%Lk#(t zi|!-#G_fF~?mE#K((DxsAKcICS zF?joHYX8cg7UZ#wD7TlQ@6L0H)||&ByFUCK_05fB^XD^cC+Ie`HO_UE8a#WNB%xXw zk1@k!covYn(n$irUOvBDF5CY|8YSyU!K1#+c<;T`+juE@--^V~V*LJHF~i1u`;=H~ zPO?*r)p0hG4#9S$8!46{32Inn5beX9T9@9 zf8hI$ZI!?rej8k2oV>zI^4lsS1vY+uA|i*?szq}Jy={<0OKpiO{nhIC48I`bY3IIN zI)e|tNy!6m;A^mYf3IzPL{8kd%4@#az?-EkXXf_fz5PzZspB9)nl@=rf0WDIcpa5<(tgfk?FH!%-#ZKw06E7pXMbo`;_zUC2JN`V*}R9^1+qjp9d5UR`(@#u3%w*2o#GTwP<`56ta+Ife zfyp$IH6`yby@SlfC}ndoN0gsqSN7to94IEUFy7=_9Or0r`KFlMvyR&`hRLHoo1bun zm=ntDxs_QfEo%=g7Lyr3dw7JWd4bo(WVCz*AL=_~-N{m>Kbuw}b@()Mhx(ppOX@Y> zReT%M?r%lA{72DVU5fU5r|96BMMrKbI_^x-DaVS=I#+bT)uKzU6T*r<4g4=kCUvdX`@gVnb zANMnPkH6+&p5##;=eNAYb3D!b=0CEW=lK&a@-lDoDzEcre^F+t-sNppFxgk~6(ITQ zABfKvfqbw3qom%yJyWa|Pqx=)RaR$Be#Gb4fOT2QCTz$?Y{8~%#&&#`t=NYB*@@4y z17Bcgc4c?I%oo{{{n(p*_$tTobq?S_mhlY^;YbeUaE|3$9L3R`&xw4O<2j9!IE7O= zo6|Xy^LU1z@nbILQm)_@uI4&!gjj3a|d58BMp_cMP{$Weil6wEsTU}bA=Bz08CZ1S__4zcL@?Cc1vuw?F?7&yp zg+2HZdvge1Wq%IjV2I2Yg&oT5DPH|K8;(S5t+nqr!Dv z;i|82W-FYv3TLgtd8u%9S2%YS#ryjcTd_Oau{}Gn8~gJ`=Kt7-{rDM2au5fzj3YRi zqd1oDaT4coDyMT6=W+!Xa1obqId5nb(|=Udj)6lLg-8Z(>T7A1PN;{-dO{@n0&>X$fnx9&57>+wy7FXHzy}3pQgL zwq#E}&ra;hm)MOxJVhK({)}bp!~X2c*Z4XIa3J60M2_Gvj^;?d&2gN-Ih?`|ID;Q@ z1?Tf)F6MInnM?VQJGh!_`8n5d1GjS%H*+hGa}RfNHxF_zzv5vY;}xFdxBQ-`_yf=J zGB5BVf9DPU#MGkO{F!%I-~--wrruy(rsg~WMX3hizD&jra_kur-^p z1zWNw+p{g7V;6Q{Cw6C^MPFxczRLa_#QmJeG7jNL4&`u;=35-a2^_<5e29Gx! host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`SAFETY_ISLAND_CLK_SEL`](#safety_island_clk_sel) | 0x88 | 4 | Safety Island pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`SECURITY_ISLAND_CLK_SEL`](#security_island_clk_sel) | 0x8c | 4 | Security Island pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`PULP_CLUSTER_CLK_SEL`](#pulp_cluster_clk_sel) | 0x90 | 4 | PULP Cluster pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`SPATZ_CLUSTER_CLK_SEL`](#spatz_cluster_clk_sel) | 0x94 | 4 | Spatz Cluster pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`L2_CLK_SEL`](#l2_clk_sel) | 0x98 | 4 | L2 Memory pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`PERIPH_CLK_DIV_VALUE`](#periph_clk_div_value) | 0x9c | 4 | Periph Domain clk divider value | +| carfield.[`SAFETY_ISLAND_CLK_DIV_VALUE`](#safety_island_clk_div_value) | 0xa0 | 4 | Safety Island clk divider value | +| carfield.[`SECURITY_ISLAND_CLK_DIV_VALUE`](#security_island_clk_div_value) | 0xa4 | 4 | Security Island clk divider value | +| carfield.[`PULP_CLUSTER_CLK_DIV_VALUE`](#pulp_cluster_clk_div_value) | 0xa8 | 4 | PULP Cluster clk divider value | +| carfield.[`SPATZ_CLUSTER_CLK_DIV_VALUE`](#spatz_cluster_clk_div_value) | 0xac | 4 | Spatz Cluster clk divider value | +| carfield.[`L2_CLK_DIV_VALUE`](#l2_clk_div_value) | 0xb0 | 4 | L2 Memory clk divider value | +| carfield.[`HOST_FETCH_ENABLE`](#host_fetch_enable) | 0xb4 | 4 | Host Domain fetch enable | +| carfield.[`SAFETY_ISLAND_FETCH_ENABLE`](#safety_island_fetch_enable) | 0xb8 | 4 | Safety Island fetch enable | +| carfield.[`SECURITY_ISLAND_FETCH_ENABLE`](#security_island_fetch_enable) | 0xbc | 4 | Security Island fetch enable | +| carfield.[`PULP_CLUSTER_FETCH_ENABLE`](#pulp_cluster_fetch_enable) | 0xc0 | 4 | PULP Cluster fetch enable | +| carfield.[`SPATZ_CLUSTER_DEBUG_REQ`](#spatz_cluster_debug_req) | 0xc4 | 4 | Spatz Cluster debug req | +| carfield.[`HOST_BOOT_ADDR`](#host_boot_addr) | 0xc8 | 4 | Host boot address | +| carfield.[`SAFETY_ISLAND_BOOT_ADDR`](#safety_island_boot_addr) | 0xcc | 4 | Safety Island boot address | +| carfield.[`SECURITY_ISLAND_BOOT_ADDR`](#security_island_boot_addr) | 0xd0 | 4 | Security Island boot address | +| carfield.[`PULP_CLUSTER_BOOT_ADDR`](#pulp_cluster_boot_addr) | 0xd4 | 4 | PULP Cluster boot address | +| carfield.[`SPATZ_CLUSTER_BOOT_ADDR`](#spatz_cluster_boot_addr) | 0xd8 | 4 | Spatz Cluster boot address | +| carfield.[`PULP_CLUSTER_BOOT_ENABLE`](#pulp_cluster_boot_enable) | 0xdc | 4 | PULP Cluster boot enable | +| carfield.[`SPATZ_CLUSTER_BUSY`](#spatz_cluster_busy) | 0xe0 | 4 | Spatz Cluster busy | +| carfield.[`PULP_CLUSTER_BUSY`](#pulp_cluster_busy) | 0xe4 | 4 | PULP Cluster busy | +| carfield.[`PULP_CLUSTER_EOC`](#pulp_cluster_eoc) | 0xe8 | 4 | PULP Cluster end of computation | +| carfield.[`ETH_RGMII_PHY_CLK_DIV_EN`](#eth_rgmii_phy_clk_div_en) | 0xec | 4 | Ethernet RGMII PHY clock divider enable bit | +| carfield.[`ETH_RGMII_PHY_CLK_DIV_VALUE`](#eth_rgmii_phy_clk_div_value) | 0xf0 | 4 | Ethernet RGMII PHY clock divider value | +| carfield.[`ETH_MDIO_CLK_DIV_EN`](#eth_mdio_clk_div_en) | 0xf4 | 4 | Ethernet MDIO clock divider enable bit | +| carfield.[`ETH_MDIO_CLK_DIV_VALUE`](#eth_mdio_clk_div_value) | 0xf8 | 4 | Ethernet MDIO clock divider value | + +## VERSION0 +Cheshire sha256 commit +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VERSION0", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:0 | ro | 0x0 | VERSION0 | | + +## VERSION1 +Safety Island sha256 commit +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VERSION1", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:0 | ro | 0x0 | VERSION1 | | + +## VERSION2 +Security Island sha256 commit +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VERSION2", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:0 | ro | 0x0 | VERSION2 | | + +## VERSION3 +PULP Cluster sha256 commit +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VERSION3", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:0 | ro | 0x0 | VERSION3 | | + +## VERSION4 +Spatz CLuster sha256 commit +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VERSION4", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:0 | ro | 0x0 | VERSION4 | | + +## JEDEC_IDCODE +JEDEC ID CODE -TODO assign- +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "JEDEC_IDCODE", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:--------------| +| 31:0 | rw | 0x0 | JEDEC_IDCODE | | + +## GENERIC_SCRATCH0 +Scratch +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "GENERIC_SCRATCH0", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:0 | rw | 0x0 | GENERIC_SCRATCH0 | | + +## GENERIC_SCRATCH1 +Scratch +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "GENERIC_SCRATCH1", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:0 | rw | 0x0 | GENERIC_SCRATCH1 | | + +## HOST_RST +Host Domain reset -active high, inverted in HW- +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "HOST_RST", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 100}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | HOST_RST | | + +## PERIPH_RST +Periph Domain reset -active high, inverted in HW- +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PERIPH_RST | | + +## SAFETY_ISLAND_RST +Safety Island reset -active high, inverted in HW- +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SAFETY_ISLAND_RST | | + +## SECURITY_ISLAND_RST +Security Island reset -active high, inverted in HW- +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 210}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SECURITY_ISLAND_RST | | + +## PULP_CLUSTER_RST +PULP Cluster reset -active high, inverted in HW- +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PULP_CLUSTER_RST | | + +## SPATZ_CLUSTER_RST +Spatz Cluster reset -active high, inverted in HW- +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SPATZ_CLUSTER_RST | | + +## L2_RST +L2 reset -active high, inverted in HW- +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "L2_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | L2_RST | | + +## PERIPH_ISOLATE +Periph Domain AXI isolate +- Offset: `0x3c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 160}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PERIPH_ISOLATE | | + +## SAFETY_ISLAND_ISOLATE +Safety Island AXI isolate +- Offset: `0x40` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | SAFETY_ISLAND_ISOLATE | | + +## SECURITY_ISLAND_ISOLATE +Security Island AXI isolate +- Offset: `0x44` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 250}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | SECURITY_ISLAND_ISOLATE | | + +## PULP_CLUSTER_ISOLATE +PULP Cluster AXI isolate +- Offset: `0x48` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 220}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | PULP_CLUSTER_ISOLATE | | + +## SPATZ_CLUSTER_ISOLATE +Spatz Cluster AXI isolate +- Offset: `0x4c` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | SPATZ_CLUSTER_ISOLATE | | + +## L2_ISOLATE +L2 AXI isolate +- Offset: `0x50` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "L2_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | L2_ISOLATE | | + +## PERIPH_ISOLATE_STATUS +Periph Domain AXI isolate status +- Offset: `0x54` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PERIPH_ISOLATE_STATUS | | + +## SAFETY_ISLAND_ISOLATE_STATUS +Safety Island AXI isolate status +- Offset: `0x58` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 300}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SAFETY_ISLAND_ISOLATE_STATUS | | + +## SECURITY_ISLAND_ISOLATE_STATUS +Security Island AXI isolate status +- Offset: `0x5c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 320}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SECURITY_ISLAND_ISOLATE_STATUS | | + +## PULP_CLUSTER_ISOLATE_STATUS +PULP Cluster AXI isolate status +- Offset: `0x60` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 290}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PULP_CLUSTER_ISOLATE_STATUS | | + +## SPATZ_CLUSTER_ISOLATE_STATUS +Spatz Cluster AXI isolate status +- Offset: `0x64` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 300}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SPATZ_CLUSTER_ISOLATE_STATUS | | + +## L2_ISOLATE_STATUS +L2 AXI isolate status +- Offset: `0x68` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "L2_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | L2_ISOLATE_STATUS | | + +## PERIPH_CLK_EN +Periph Domain clk gate enable +- Offset: `0x6c` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 150}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | PERIPH_CLK_EN | | + +## SAFETY_ISLAND_CLK_EN +Safety Island clk gate enable +- Offset: `0x70` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 220}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SAFETY_ISLAND_CLK_EN | | + +## SECURITY_ISLAND_CLK_EN +Security Island clk gate enable +- Offset: `0x74` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 240}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SECURITY_ISLAND_CLK_EN | | + +## PULP_CLUSTER_CLK_EN +PULP Cluster clk gate enable +- Offset: `0x78` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 210}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PULP_CLUSTER_CLK_EN | | + +## SPATZ_CLUSTER_CLK_EN +Spatz Cluster clk gate enable +- Offset: `0x7c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 220}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SPATZ_CLUSTER_CLK_EN | | + +## L2_CLK_EN +Shared L2 memory clk gate enable +- Offset: `0x80` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "L2_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | L2_CLK_EN | | + +## PERIPH_CLK_SEL +Periph Domain pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x84` +- Reset default: `0x2` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 160}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x2 | PERIPH_CLK_SEL | | + +## SAFETY_ISLAND_CLK_SEL +Safety Island pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x88` +- Reset default: `0x1` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x1 | SAFETY_ISLAND_CLK_SEL | | + +## SECURITY_ISLAND_CLK_SEL +Security Island pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x8c` +- Reset default: `0x1` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 250}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x1 | SECURITY_ISLAND_CLK_SEL | | + +## PULP_CLUSTER_CLK_SEL +PULP Cluster pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x90` +- Reset default: `0x1` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 220}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x1 | PULP_CLUSTER_CLK_SEL | | + +## SPATZ_CLUSTER_CLK_SEL +Spatz Cluster pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x94` +- Reset default: `0x1` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x1 | SPATZ_CLUSTER_CLK_SEL | | + +## L2_CLK_SEL +L2 Memory pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x98` +- Reset default: `0x1` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "L2_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x1 | L2_CLK_SEL | | + +## PERIPH_CLK_DIV_VALUE +Periph Domain clk divider value +- Offset: `0x9c` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | PERIPH_CLK_DIV_VALUE | | + +## SAFETY_ISLAND_CLK_DIV_VALUE +Safety Island clk divider value +- Offset: `0xa0` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | SAFETY_ISLAND_CLK_DIV_VALUE | | + +## SECURITY_ISLAND_CLK_DIV_VALUE +Security Island clk divider value +- Offset: `0xa4` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | SECURITY_ISLAND_CLK_DIV_VALUE | | + +## PULP_CLUSTER_CLK_DIV_VALUE +PULP Cluster clk divider value +- Offset: `0xa8` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | PULP_CLUSTER_CLK_DIV_VALUE | | + +## SPATZ_CLUSTER_CLK_DIV_VALUE +Spatz Cluster clk divider value +- Offset: `0xac` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | SPATZ_CLUSTER_CLK_DIV_VALUE | | + +## L2_CLK_DIV_VALUE +L2 Memory clk divider value +- Offset: `0xb0` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "L2_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | L2_CLK_DIV_VALUE | | + +## HOST_FETCH_ENABLE +Host Domain fetch enable +- Offset: `0xb4` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "HOST_FETCH_ENABLE", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | HOST_FETCH_ENABLE | | + +## SAFETY_ISLAND_FETCH_ENABLE +Safety Island fetch enable +- Offset: `0xb8` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_FETCH_ENABLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 280}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SAFETY_ISLAND_FETCH_ENABLE | | + +## SECURITY_ISLAND_FETCH_ENABLE +Security Island fetch enable +- Offset: `0xbc` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_FETCH_ENABLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 300}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SECURITY_ISLAND_FETCH_ENABLE | | + +## PULP_CLUSTER_FETCH_ENABLE +PULP Cluster fetch enable +- Offset: `0xc0` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_FETCH_ENABLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 270}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PULP_CLUSTER_FETCH_ENABLE | | + +## SPATZ_CLUSTER_DEBUG_REQ +Spatz Cluster debug req +- Offset: `0xc4` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_DEBUG_REQ", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 250}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x0 | SPATZ_CLUSTER_DEBUG_REQ | | + +## HOST_BOOT_ADDR +Host boot address +- Offset: `0xc8` +- Reset default: `0x1000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "HOST_BOOT_ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:--------------| +| 31:0 | rw | 0x1000 | HOST_BOOT_ADDR | | + +## SAFETY_ISLAND_BOOT_ADDR +Safety Island boot address +- Offset: `0xcc` +- Reset default: `0x70000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_BOOT_ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:------------------------|:--------------| +| 31:0 | rw | 0x70000000 | SAFETY_ISLAND_BOOT_ADDR | | + +## SECURITY_ISLAND_BOOT_ADDR +Security Island boot address +- Offset: `0xd0` +- Reset default: `0x70000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_BOOT_ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:--------------------------|:--------------| +| 31:0 | rw | 0x70000000 | SECURITY_ISLAND_BOOT_ADDR | | + +## PULP_CLUSTER_BOOT_ADDR +PULP Cluster boot address +- Offset: `0xd4` +- Reset default: `0x70000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_BOOT_ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:-----------------------|:--------------| +| 31:0 | rw | 0x70000000 | PULP_CLUSTER_BOOT_ADDR | | + +## SPATZ_CLUSTER_BOOT_ADDR +Spatz Cluster boot address +- Offset: `0xd8` +- Reset default: `0x70000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_BOOT_ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:------------------------|:--------------| +| 31:0 | rw | 0x70000000 | SPATZ_CLUSTER_BOOT_ADDR | | + +## PULP_CLUSTER_BOOT_ENABLE +PULP Cluster boot enable +- Offset: `0xdc` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_BOOT_ENABLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 260}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PULP_CLUSTER_BOOT_ENABLE | | + +## SPATZ_CLUSTER_BUSY +Spatz Cluster busy +- Offset: `0xe0` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_BUSY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 200}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | SPATZ_CLUSTER_BUSY | | + +## PULP_CLUSTER_BUSY +PULP Cluster busy +- Offset: `0xe4` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_BUSY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | PULP_CLUSTER_BUSY | | + +## PULP_CLUSTER_EOC +PULP Cluster end of computation +- Offset: `0xe8` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_EOC", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | PULP_CLUSTER_EOC | | + +## ETH_RGMII_PHY_CLK_DIV_EN +Ethernet RGMII PHY clock divider enable bit +- Offset: `0xec` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "ETH_RGMII_PHY_CLK_DIV_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 260}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | ETH_RGMII_PHY_CLK_DIV_EN | | + +## ETH_RGMII_PHY_CLK_DIV_VALUE +Ethernet RGMII PHY clock divider value +- Offset: `0xf0` +- Reset default: `0x64` +- Reset mask: `0xfffff` + +### Fields + +```wavejson +{"reg": [{"name": "ETH_RGMII_PHY_CLK_DIV_VALUE", "bits": 20, "attr": ["rw"], "rotate": 0}, {"bits": 12}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------------|:--------------| +| 31:20 | | | | Reserved | +| 19:0 | rw | 0x64 | ETH_RGMII_PHY_CLK_DIV_VALUE | | + +## ETH_MDIO_CLK_DIV_EN +Ethernet MDIO clock divider enable bit +- Offset: `0xf4` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "ETH_MDIO_CLK_DIV_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 210}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | ETH_MDIO_CLK_DIV_EN | | + +## ETH_MDIO_CLK_DIV_VALUE +Ethernet MDIO clock divider value +- Offset: `0xf8` +- Reset default: `0x64` +- Reset mask: `0xfffff` + +### Fields + +```wavejson +{"reg": [{"name": "ETH_MDIO_CLK_DIV_VALUE", "bits": 20, "attr": ["rw"], "rotate": 0}, {"bits": 12}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------|:--------------| +| 31:20 | | | | Reserved | +| 19:0 | rw | 0x64 | ETH_MDIO_CLK_DIV_VALUE | | + + + + + +## cheshire + + + +### registers.md + +## Summary + +| Name | Offset | Length | Description | +|:-------------------------------------------|:---------|---------:|:---------------------------------------------------| +| cheshire.[`scratch_0`](#scratch) | 0x0 | 4 | Registers for use by software | +| cheshire.[`scratch_1`](#scratch) | 0x4 | 4 | Registers for use by software | +| cheshire.[`scratch_2`](#scratch) | 0x8 | 4 | Registers for use by software | +| cheshire.[`scratch_3`](#scratch) | 0xc | 4 | Registers for use by software | +| cheshire.[`scratch_4`](#scratch) | 0x10 | 4 | Registers for use by software | +| cheshire.[`scratch_5`](#scratch) | 0x14 | 4 | Registers for use by software | +| cheshire.[`scratch_6`](#scratch) | 0x18 | 4 | Registers for use by software | +| cheshire.[`scratch_7`](#scratch) | 0x1c | 4 | Registers for use by software | +| cheshire.[`scratch_8`](#scratch) | 0x20 | 4 | Registers for use by software | +| cheshire.[`scratch_9`](#scratch) | 0x24 | 4 | Registers for use by software | +| cheshire.[`scratch_10`](#scratch) | 0x28 | 4 | Registers for use by software | +| cheshire.[`scratch_11`](#scratch) | 0x2c | 4 | Registers for use by software | +| cheshire.[`scratch_12`](#scratch) | 0x30 | 4 | Registers for use by software | +| cheshire.[`scratch_13`](#scratch) | 0x34 | 4 | Registers for use by software | +| cheshire.[`scratch_14`](#scratch) | 0x38 | 4 | Registers for use by software | +| cheshire.[`scratch_15`](#scratch) | 0x3c | 4 | Registers for use by software | +| cheshire.[`boot_mode`](#boot_mode) | 0x40 | 4 | Method to load boot code (connected to input pins) | +| cheshire.[`rtc_freq`](#rtc_freq) | 0x44 | 4 | Frequency (Hz) configured for RTC | +| cheshire.[`platform_rom`](#platform_rom) | 0x48 | 4 | Address of platform ROM | +| cheshire.[`num_int_harts`](#num_int_harts) | 0x4c | 4 | Number of internal harts | +| cheshire.[`hw_features`](#hw_features) | 0x50 | 4 | Specifies which hardware features are available | +| cheshire.[`llc_size`](#llc_size) | 0x54 | 4 | Total size of LLC in bytes | +| cheshire.[`vga_params`](#vga_params) | 0x58 | 4 | VGA hardware parameters | + +## scratch +Registers for use by software +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:-----------|:---------| +| scratch_0 | 0x0 | +| scratch_1 | 0x4 | +| scratch_2 | 0x8 | +| scratch_3 | 0xc | +| scratch_4 | 0x10 | +| scratch_5 | 0x14 | +| scratch_6 | 0x18 | +| scratch_7 | 0x1c | +| scratch_8 | 0x20 | +| scratch_9 | 0x24 | +| scratch_10 | 0x28 | +| scratch_11 | 0x2c | +| scratch_12 | 0x30 | +| scratch_13 | 0x34 | +| scratch_14 | 0x38 | +| scratch_15 | 0x3c | + + +### Fields + +```wavejson +{"reg": [{"name": "scratch", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:------------------------------| +| 31:0 | rw | 0x0 | scratch | Registers for use by software | + +## boot_mode +Method to load boot code (connected to input pins) +- Offset: `0x40` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "boot_mode", "bits": 2, "attr": ["ro"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------------| +| 31:2 | | | Reserved | +| 1:0 | ro | x | [boot_mode](#boot_mode--boot_mode) | + +### boot_mode . boot_mode +Method to load boot code (connected to input pins) + +| Value | Name | Description | +|:--------|:--------------|:-------------------------------------| +| 0x0 | passive | Wait for external preload and launch | +| 0x1 | spi_sdcard | Boot from SD Card in SPI mode | +| 0x2 | spi_s25fs512s | Boot from S25FS512S SPI NOR flash | +| 0x3 | i2c_24xx1025 | Boot from 24xx1025 I2C EEPROM | + + +## rtc_freq +Frequency (Hz) configured for RTC +- Offset: `0x44` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "ref_freq", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:----------------------------------| +| 31:0 | ro | x | ref_freq | Frequency (Hz) configured for RTC | + +## platform_rom +Address of platform ROM +- Offset: `0x48` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "platform_rom", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:------------------------| +| 31:0 | ro | x | platform_rom | Address of platform ROM | + +## num_int_harts +Number of internal harts +- Offset: `0x4c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "num_harts", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-------------------------| +| 31:0 | ro | x | num_harts | Number of internal harts | + +## hw_features +Specifies which hardware features are available +- Offset: `0x50` +- Reset default: `0x0` +- Reset mask: `0x1fff` + +### Fields + +```wavejson +{"reg": [{"name": "bootrom", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "llc", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "uart", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "spi_host", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "i2c", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "gpio", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "dma", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "serial_link", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "vga", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "axirt", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "clic", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "irq_router", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "bus_err", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 19}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:---------------------------------| +| 31:13 | | | | Reserved | +| 12 | ro | x | bus_err | Whether UNBENT is available | +| 11 | ro | x | irq_router | Whether IRQ router is available | +| 10 | ro | x | clic | Whether CLIC is available | +| 9 | ro | x | axirt | Whether AXI RT is available | +| 8 | ro | x | vga | Whether VGA is available | +| 7 | ro | x | serial_link | Whether serial link is available | +| 6 | ro | x | dma | Whether DMA is available | +| 5 | ro | x | gpio | Whether GPIO is available | +| 4 | ro | x | i2c | Whether I2C is available | +| 3 | ro | x | spi_host | Whether SPI host is available | +| 2 | ro | x | uart | Whether UART is available | +| 1 | ro | x | llc | Whether LLC is available | +| 0 | ro | x | bootrom | Whether boot ROM is available | + +## llc_size +Total size of LLC in bytes +- Offset: `0x54` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "llc_size", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:---------------------------| +| 31:0 | ro | x | llc_size | Total size of LLC in bytes | + +## vga_params +VGA hardware parameters +- Offset: `0x58` +- Reset default: `0x0` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "red_width", "bits": 8, "attr": ["ro"], "rotate": 0}, {"name": "green_width", "bits": 8, "attr": ["ro"], "rotate": 0}, {"name": "blue_width", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:--------------------| +| 31:24 | | | | Reserved | +| 23:16 | ro | x | blue_width | Blue channel width | +| 15:8 | ro | x | green_width | Green channel width | +| 7:0 | ro | x | red_width | Red channel width | + + + + + +## clic + + + +### clicint_registers.md + +## Summary + +| Name | Offset | Length | Description | +|:------------------------------|:---------|---------:|:------------------------------------------------------| +| CLICINT.[`CLICINT`](#clicint) | 0x0 | 4 | CLIC interrupt pending, enable, attribute and control | + +## CLICINT +CLIC interrupt pending, enable, attribute and control +- Offset: `0x0` +- Reset default: `0xc00000` +- Reset mask: `0xffc70101` + +### Fields + +```wavejson +{"reg": [{"name": "IP", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 7}, {"name": "IE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 7}, {"name": "ATTR_SHV", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ATTR_TRIG", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 3}, {"name": "ATTR_MODE", "bits": 2, "attr": ["rw"], "rotate": -90}, {"name": "CTL", "bits": 8, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:---------------------------------------------| +| 31:24 | rw | 0x0 | CTL | interrupt control for interrupt | +| 23:22 | rw | 0x3 | ATTR_MODE | privilege mode of this interrupt | +| 21:19 | | | | Reserved | +| 18:17 | rw | 0x0 | ATTR_TRIG | specify trigger type for this interrupt | +| 16 | rw | 0x0 | ATTR_SHV | enable hardware vectoring for this interrupt | +| 15:9 | | | | Reserved | +| 8 | rw | 0x0 | IE | interrupt enable for interrupt | +| 7:1 | | | | Reserved | +| 0 | rw | 0x0 | IP | interrupt pending for interrupt | + + + + + +### clictv_registers.md + +## Summary + +| Name | Offset | Length | Description | +|:---------------------------------|:---------|---------:|:------------------------------| +| CLICINTV.[`CLICINTV`](#clicintv) | 0x0 | 4 | CLIC interrupt virtualization | + +## CLICINTV +CLIC interrupt virtualization +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xfdfdfdfd` + +### Fields + +```wavejson +{"reg": [{"name": "V0", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 1}, {"name": "VSID0", "bits": 6, "attr": ["rw"], "rotate": 0}, {"name": "V1", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 1}, {"name": "VSID1", "bits": 6, "attr": ["rw"], "rotate": 0}, {"name": "V2", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 1}, {"name": "VSID2", "bits": 6, "attr": ["rw"], "rotate": 0}, {"name": "V3", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 1}, {"name": "VSID3", "bits": 6, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------| +| 31:26 | rw | 0x0 | VSID3 | interrupt VS id | +| 25 | | | | Reserved | +| 24 | rw | 0x0 | V3 | interrupt delegated to VS-mode | +| 23:18 | rw | 0x0 | VSID2 | interrupt VS id | +| 17 | | | | Reserved | +| 16 | rw | 0x0 | V2 | interrupt delegated to VS-mode | +| 15:10 | rw | 0x0 | VSID1 | interrupt VS id | +| 9 | | | | Reserved | +| 8 | rw | 0x0 | V1 | interrupt delegated to VS-mode | +| 7:2 | rw | 0x0 | VSID0 | interrupt VS id | +| 1 | | | | Reserved | +| 0 | rw | 0x0 | V0 | interrupt delegated to VS-mode | + + + + + +### clicvs_registers.md + +## Summary + +| Name | Offset | Length | Description | +|:---------------------------|:---------|---------:|:---------------------------------| +| CLICVS.[`vsprio`](#vsprio) | 0x0 | 4 | CLIC virtual supervisor priority | + +## vsprio +CLIC virtual supervisor priority +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0x1010101` + +### Fields + +```wavejson +{"reg": [{"name": "prio0", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 7}, {"name": "prio1", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 7}, {"name": "prio2", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 7}, {"name": "prio3", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 7}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:25 | | | | Reserved | +| 24 | rw | 0x0 | prio3 | VS3 priority | +| 23:17 | | | | Reserved | +| 16 | rw | 0x0 | prio2 | VS2 priority | +| 15:9 | | | | Reserved | +| 8 | rw | 0x0 | prio1 | VS1 priority | +| 7:1 | | | | Reserved | +| 0 | rw | 0x0 | prio0 | VS0 priority | + + + + + +### mclic_registers.md + +## Summary + +| Name | Offset | Length | Description | +|:----------------------------------------|:---------|---------:|:---------------------------------------| +| MCLIC.[`MCLICCFG`](#mcliccfg) | 0x0 | 4 | CLIC configuration | +| MCLIC.[`CLICMNXTICONF`](#clicmnxticonf) | 0x4 | 4 | CLIC enable mnxti irq forwarding logic | + +## MCLICCFG +CLIC configuration +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xff0f003f` + +### Fields + +```wavejson +{"reg": [{"name": "mnlbits", "bits": 4, "attr": ["rw"], "rotate": -90}, {"name": "nmbits", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 10}, {"name": "snlbits", "bits": 4, "attr": ["rw"], "rotate": -90}, {"bits": 4}, {"name": "unlbits", "bits": 4, "attr": ["rw"], "rotate": -90}, {"name": "reserved", "bits": 4, "attr": ["ro"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 100}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:-------------------------------------------------| +| 31:28 | ro | 0x0 | reserved | reserved | +| 27:24 | rw | 0x0 | unlbits | number of privilege mode bits in user mode | +| 23:20 | | | | Reserved | +| 19:16 | rw | 0x0 | snlbits | number of privilege mode bits in supervisor mode | +| 15:6 | | | | Reserved | +| 5:4 | rw | 0x0 | nmbits | number of privilege mode bits | +| 3:0 | rw | 0x0 | mnlbits | number of interrupt level bits in machine mode | + +## CLICMNXTICONF +CLIC enable mnxti irq forwarding logic +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "CLICMNXTICONF", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 150}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | CLICMNXTICONF | | + + + + + +## clint + + + +### registers.md + +## Summary + +| Name | Offset | Length | Description | +|:------------------------------------------|:---------|---------:|:-----------------------------------| +| CLINT.[`MSIP_0`](#msip) | 0x0 | 4 | Machine Software Interrupt Pending | +| CLINT.[`MSIP_1`](#msip) | 0x4 | 4 | Machine Software Interrupt Pending | +| CLINT.[`MTIMECMP_LOW0`](#mtimecmp_low0) | 0x4000 | 4 | Machine Timer Compare for Core 0 | +| CLINT.[`MTIMECMP_HIGH0`](#mtimecmp_high0) | 0x4004 | 4 | Machine Timer Compare for Core 0 | +| CLINT.[`MTIMECMP_LOW1`](#mtimecmp_low1) | 0x4008 | 4 | Machine Timer Compare for Core 1 | +| CLINT.[`MTIMECMP_HIGH1`](#mtimecmp_high1) | 0x400c | 4 | Machine Timer Compare for Core 1 | +| CLINT.[`MTIME_LOW`](#mtime_low) | 0xbff8 | 4 | Timer Register Low | +| CLINT.[`MTIME_HIGH`](#mtime_high) | 0xbffc | 4 | Timer Register High | + +## MSIP +Machine Software Interrupt Pending +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:-------|:---------| +| MSIP_0 | 0x0 | +| MSIP_1 | 0x4 | + + +### Fields + +```wavejson +{"reg": [{"name": "P", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RSVD", "bits": 31, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------| +| 31:1 | ro | 0x0 | RSVD | Reserved | +| 0 | rw | 0x0 | P | Machine Software Interrupt Pending | + +## MTIMECMP_LOW0 +Machine Timer Compare for Core 0 +- Offset: `0x4000` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MTIMECMP_LOW", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:----------------------------------| +| 31:0 | rw | 0x0 | MTIMECMP_LOW | Machine Time Compare (Low) Core 0 | + +## MTIMECMP_HIGH0 +Machine Timer Compare for Core 0 +- Offset: `0x4004` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MTIMECMP_HIGH", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:-----------------------------------| +| 31:0 | rw | 0x0 | MTIMECMP_HIGH | Machine Time Compare (High) Core 0 | + +## MTIMECMP_LOW1 +Machine Timer Compare for Core 1 +- Offset: `0x4008` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MTIMECMP_LOW", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:----------------------------------| +| 31:0 | rw | 0x0 | MTIMECMP_LOW | Machine Time Compare (Low) Core 1 | + +## MTIMECMP_HIGH1 +Machine Timer Compare for Core 1 +- Offset: `0x400c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MTIMECMP_HIGH", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:-----------------------------------| +| 31:0 | rw | 0x0 | MTIMECMP_HIGH | Machine Time Compare (High) Core 1 | + +## MTIME_LOW +Timer Register Low +- Offset: `0xbff8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MTIME_LOW", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-------------------| +| 31:0 | rw | 0x0 | MTIME_LOW | Machine Time (Low) | + +## MTIME_HIGH +Timer Register High +- Offset: `0xbffc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "MTIME_HIGH", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------------| +| 31:0 | rw | 0x0 | MTIME_HIGH | Machine Time (High) | + + + + + +## ethernet + + + +### registers.md + +## Summary + +| Name | Offset | Length | Description | +|:----------------------------------|:---------|---------:|:-------------------------------------------------------------------------------------------| +| eth_framing.[`CONFIG0`](#config0) | 0x0 | 4 | Configures the lower 4 bytes of the devices MAC address | +| eth_framing.[`CONFIG1`](#config1) | 0x4 | 4 | Configures the: upper 2 bytes of the devices MAC address, promiscuous flag, MDIO interface | +| eth_framing.[`CONFIG2`](#config2) | 0x8 | 4 | The FCS TX status | +| eth_framing.[`CONFIG3`](#config3) | 0xc | 4 | The FCS RX status | + +## CONFIG0 +Configures the lower 4 bytes of the devices MAC address +- Offset: `0x0` +- Reset default: `0x890702` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "lower_mac_address", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:--------:|:------------------|:----------------------------------------| +| 31:0 | rw | 0x890702 | lower_mac_address | Lower 32 bit of the devices MAC address | + +## CONFIG1 +Configures the: upper 2 bytes of the devices MAC address, promiscuous flag, MDIO interface +- Offset: `0x4` +- Reset default: `0x2301` +- Reset mask: `0xfffff` + +### Fields + +```wavejson +{"reg": [{"name": "upper_mac_address", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "promiscuous", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "phy_mdclk", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "phy_mdio_o", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "phy_mdio_oe", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 12}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:----------------------------------------| +| 31:20 | | | | Reserved | +| 19 | rw | 0x0 | phy_mdio_oe | MDIO output enable | +| 18 | rw | 0x0 | phy_mdio_o | MDIO output | +| 17 | rw | 0x0 | phy_mdclk | MDIO clock | +| 16 | rw | 0x0 | promiscuous | promiscuous flag | +| 15:0 | rw | 0x2301 | upper_mac_address | Upper 16 bit of the devices MAC address | + +## CONFIG2 +The FCS TX status +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "tx_fcs_reg", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:0 | ro | 0x0 | tx_fcs_reg | FCS TX status | + +## CONFIG3 +The FCS RX status +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "rx_fcs_reg", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:0 | ro | 0x0 | rx_fcs_reg | FCS RX status | + + + + + +## fp_cluster + + + +### registers.md + +## Summary + +| Name | Offset | Length | Description | +|:-----------------------------------------------------------------------------|:---------|---------:|:----------------------------------------------------------------------------------------------------| +| spatz_cluster_peripheral.[`PERF_COUNTER_ENABLE_0`](#perf_counter_enable) | 0x0 | 8 | Enable particular performance counter and start tracking. | +| spatz_cluster_peripheral.[`PERF_COUNTER_ENABLE_1`](#perf_counter_enable) | 0x8 | 8 | Enable particular performance counter and start tracking. | +| spatz_cluster_peripheral.[`HART_SELECT_0`](#hart_select) | 0x10 | 8 | Select from which hart in the cluster, starting from `0`, | +| spatz_cluster_peripheral.[`HART_SELECT_1`](#hart_select) | 0x18 | 8 | Select from which hart in the cluster, starting from `0`, | +| spatz_cluster_peripheral.[`PERF_COUNTER_0`](#perf_counter) | 0x20 | 8 | Performance counter. Set corresponding PERF_COUNTER_ENABLE bits depending on what | +| spatz_cluster_peripheral.[`PERF_COUNTER_1`](#perf_counter) | 0x28 | 8 | Performance counter. Set corresponding PERF_COUNTER_ENABLE bits depending on what | +| spatz_cluster_peripheral.[`CL_CLINT_SET`](#cl_clint_set) | 0x30 | 8 | Set bits in the cluster-local CLINT. Writing a 1 at location i sets the cluster-local interrupt | +| spatz_cluster_peripheral.[`CL_CLINT_CLEAR`](#cl_clint_clear) | 0x38 | 8 | Clear bits in the cluster-local CLINT. Writing a 1 at location i clears the cluster-local interrupt | +| spatz_cluster_peripheral.[`HW_BARRIER`](#hw_barrier) | 0x40 | 8 | Hardware barrier register. Loads to this register will block until all cores have | +| spatz_cluster_peripheral.[`ICACHE_PREFETCH_ENABLE`](#icache_prefetch_enable) | 0x48 | 8 | Controls prefetching of the instruction cache. | +| spatz_cluster_peripheral.[`SPATZ_STATUS`](#spatz_status) | 0x50 | 8 | Sets the status of the Spatz cluster. | +| spatz_cluster_peripheral.[`CLUSTER_BOOT_CONTROL`](#cluster_boot_control) | 0x58 | 8 | Controls the cluster boot process. | + +## PERF_COUNTER_ENABLE +Enable particular performance counter and start tracking. +- Reset default: `0x0` +- Reset mask: `0x7fffffff` + +### Instances + +| Name | Offset | +|:----------------------|:---------| +| PERF_COUNTER_ENABLE_0 | 0x0 | +| PERF_COUNTER_ENABLE_1 | 0x8 | + + +### Fields + +```wavejson +{"reg": [{"name": "CYCLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "TCDM_ACCESSED", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "TCDM_CONGESTED", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ISSUE_FPU", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ISSUE_FPU_SEQ", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ISSUE_CORE_TO_FPU", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RETIRED_INSTR", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RETIRED_LOAD", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RETIRED_I", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RETIRED_ACC", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_AW_STALL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_AR_STALL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_R_STALL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_W_STALL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_BUF_W_STALL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_BUF_R_STALL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_AW_DONE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_AW_BW", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_AR_DONE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_AR_BW", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_R_DONE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_R_BW", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_W_DONE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_W_BW", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_B_DONE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_BUSY", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ICACHE_MISS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ICACHE_HIT", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ICACHE_PREFETCH", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ICACHE_DOUBLE_HIT", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ICACHE_STALL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 33}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-------------------------------------------------------------| +| 63:31 | | | Reserved | +| 30 | rw | 0x0 | [ICACHE_STALL](#perf_counter_enable--icache_stall) | +| 29 | rw | 0x0 | [ICACHE_DOUBLE_HIT](#perf_counter_enable--icache_double_hit) | +| 28 | rw | 0x0 | [ICACHE_PREFETCH](#perf_counter_enable--icache_prefetch) | +| 27 | rw | 0x0 | [ICACHE_HIT](#perf_counter_enable--icache_hit) | +| 26 | rw | 0x0 | [ICACHE_MISS](#perf_counter_enable--icache_miss) | +| 25 | rw | 0x0 | [DMA_BUSY](#perf_counter_enable--dma_busy) | +| 24 | rw | 0x0 | [DMA_B_DONE](#perf_counter_enable--dma_b_done) | +| 23 | rw | 0x0 | [DMA_W_BW](#perf_counter_enable--dma_w_bw) | +| 22 | rw | 0x0 | [DMA_W_DONE](#perf_counter_enable--dma_w_done) | +| 21 | rw | 0x0 | [DMA_R_BW](#perf_counter_enable--dma_r_bw) | +| 20 | rw | 0x0 | [DMA_R_DONE](#perf_counter_enable--dma_r_done) | +| 19 | rw | 0x0 | [DMA_AR_BW](#perf_counter_enable--dma_ar_bw) | +| 18 | rw | 0x0 | [DMA_AR_DONE](#perf_counter_enable--dma_ar_done) | +| 17 | rw | 0x0 | [DMA_AW_BW](#perf_counter_enable--dma_aw_bw) | +| 16 | rw | 0x0 | [DMA_AW_DONE](#perf_counter_enable--dma_aw_done) | +| 15 | rw | 0x0 | [DMA_BUF_R_STALL](#perf_counter_enable--dma_buf_r_stall) | +| 14 | rw | 0x0 | [DMA_BUF_W_STALL](#perf_counter_enable--dma_buf_w_stall) | +| 13 | rw | 0x0 | [DMA_W_STALL](#perf_counter_enable--dma_w_stall) | +| 12 | rw | 0x0 | [DMA_R_STALL](#perf_counter_enable--dma_r_stall) | +| 11 | rw | 0x0 | [DMA_AR_STALL](#perf_counter_enable--dma_ar_stall) | +| 10 | rw | 0x0 | [DMA_AW_STALL](#perf_counter_enable--dma_aw_stall) | +| 9 | rw | 0x0 | [RETIRED_ACC](#perf_counter_enable--retired_acc) | +| 8 | rw | 0x0 | [RETIRED_I](#perf_counter_enable--retired_i) | +| 7 | rw | 0x0 | [RETIRED_LOAD](#perf_counter_enable--retired_load) | +| 6 | rw | 0x0 | [RETIRED_INSTR](#perf_counter_enable--retired_instr) | +| 5 | rw | 0x0 | [ISSUE_CORE_TO_FPU](#perf_counter_enable--issue_core_to_fpu) | +| 4 | rw | 0x0 | [ISSUE_FPU_SEQ](#perf_counter_enable--issue_fpu_seq) | +| 3 | rw | 0x0 | [ISSUE_FPU](#perf_counter_enable--issue_fpu) | +| 2 | rw | 0x0 | [TCDM_CONGESTED](#perf_counter_enable--tcdm_congested) | +| 1 | rw | 0x0 | [TCDM_ACCESSED](#perf_counter_enable--tcdm_accessed) | +| 0 | rw | 0x0 | [CYCLE](#perf_counter_enable--cycle) | + +### PERF_COUNTER_ENABLE . ICACHE_STALL + Incremented for instruction cache stalls. + _This is a hart-local signal_ + + +### PERF_COUNTER_ENABLE . ICACHE_DOUBLE_HIT + Incremented for instruction cache double hit. + _This is a hart-local signal_ + + +### PERF_COUNTER_ENABLE . ICACHE_PREFETCH + Incremented for instruction cache prefetches. + _This is a hart-local signal_ + + +### PERF_COUNTER_ENABLE . ICACHE_HIT + Incremented for instruction cache hits. + _This is a hart-local signal_ + + +### PERF_COUNTER_ENABLE . ICACHE_MISS + Incremented for instruction cache misses. + _This is a hart-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_BUSY + Incremented whenever DMA is busy. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_B_DONE + Incremented whenever B handshake occurs. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_W_BW + Whenever W handshake occurs, the counter is incremented + by the number of bytes transfered in this cycle + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_W_DONE + Incremented whenvever W handshake occurs. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_R_BW + Whenever R handshake occurs, the counter is incremented + by the number of bytes transfered in this cycle + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_R_DONE + Incremented whenever R handshake occurs. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_AR_BW + Whenever AR handshake occurs, the counter is incremented + by the number of bytes transfered for this transaction + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_AR_DONE + Incremented whenever AR handshake occurs. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_AW_BW + Whenever AW handshake occurs, the counter is incremented + by the number of bytes transfered for this transaction + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_AW_DONE + Incremented whenever AW handshake occurs. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_BUF_R_STALL + Incremented whenever r_valid = 1 but r_ready = 0. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_BUF_W_STALL + Incremented whenever w_ready = 1 but w_valid = 0. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_W_STALL + Incremented whenever w_valid = 1 but w_ready = 0. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_R_STALL + Incremented whenever r_ready = 1 but r_valid = 0. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_AR_STALL + Incremented whenever ar_valid = 1 but ar_ready = 0. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_AW_STALL + Incremented whenever aw_valid = 1 but aw_ready = 0. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . RETIRED_ACC + Offloaded instructions retired by the core. _This is a hart-local signal._ + + +### PERF_COUNTER_ENABLE . RETIRED_I + Base instructions retired by the core. _This is a hart-local signal._ + + +### PERF_COUNTER_ENABLE . RETIRED_LOAD + Load instructions retired by the core. _This is a hart-local signal._ + + +### PERF_COUNTER_ENABLE . RETIRED_INSTR + Instructions retired by the core. _This is a hart-local signal._ + + +### PERF_COUNTER_ENABLE . ISSUE_CORE_TO_FPU +Incremented whenever the core issues an FPU instruction. + _This is a hart-local signal._ + +### PERF_COUNTER_ENABLE . ISSUE_FPU_SEQ + Incremented whenever the FPU Sequencer issues an FPU instruction. + Might be non available if the hardware doesn't support FREP. + _This is a hart-local signal._ + + +### PERF_COUNTER_ENABLE . ISSUE_FPU + Core operations performed in the FPU. _This is a hart-local signal._ + + +### PERF_COUNTER_ENABLE . TCDM_CONGESTED + Incremented whenever an access twoards the TCDM is made but the arbitration + logic didn't grant the access (due to congestion). Is strictly less than TCDM_ACCESSED. + _This is a cluster-global signal._ + + +### PERF_COUNTER_ENABLE . TCDM_ACCESSED + Increased whenever the TCDM is accessed. Each individual access is tracked, + so if `n` cores access the TCDM, `n` will be added. Accesses are tracked at the TCDM, + so it doesn't matter whether the cores or the for example the SSR hardware accesses + the TCDM. _This is a cluster-global signal._ + + +### PERF_COUNTER_ENABLE . CYCLE +Cycle counter. Counts up as long as the cluster is powered. + +## HART_SELECT +Select from which hart in the cluster, starting from `0`, + the event should be counted. For each performance counter + the cores can be selected individually. If a hart greater + than the clusters total hart size is selected the selection + will wrap and the hart corresponding to `hart_select % total_harts_in_cluster` + will be selected. +- Reset default: `0x0` +- Reset mask: `0x3ff` + +### Instances + +| Name | Offset | +|:--------------|:---------| +| HART_SELECT_0 | 0x10 | +| HART_SELECT_1 | 0x18 | + + +### Fields + +```wavejson +{"reg": [{"name": "HART_SELECT", "bits": 10, "attr": ["rw"], "rotate": -90}, {"bits": 54}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:----------------------------------------------| +| 63:10 | | | | Reserved | +| 9:0 | rw | 0x0 | HART_SELECT | Select source of per-hart performance counter | + +## PERF_COUNTER +Performance counter. Set corresponding PERF_COUNTER_ENABLE bits depending on what +performance metric you would like to track. +- Reset default: `0x0` +- Reset mask: `0xffffffffffff` + +### Instances + +| Name | Offset | +|:---------------|:---------| +| PERF_COUNTER_0 | 0x20 | +| PERF_COUNTER_1 | 0x28 | + + +### Fields + +```wavejson +{"reg": [{"name": "PERF_COUNTER", "bits": 48, "attr": ["rw"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:--------------------| +| 63:48 | | | | Reserved | +| 47:0 | rw | x | PERF_COUNTER | Performance counter | + +## CL_CLINT_SET +Set bits in the cluster-local CLINT. Writing a 1 at location i sets the cluster-local interrupt +of hart i, where i is relative to the first hart in the cluster, ignoring the cluster base hart ID. +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CL_CLINT_SET", "bits": 32, "attr": ["wo"], "rotate": 0}, {"bits": 32}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:--------------------------------------| +| 63:32 | | | | Reserved | +| 31:0 | wo | x | CL_CLINT_SET | Set cluster-local interrupt of hart i | + +## CL_CLINT_CLEAR +Clear bits in the cluster-local CLINT. Writing a 1 at location i clears the cluster-local interrupt +of hart i, where i is relative to the first hart in the cluster, ignoring the cluster base hart ID. +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CL_CLINT_CLEAR", "bits": 32, "attr": ["wo"], "rotate": 0}, {"bits": 32}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:----------------------------------------| +| 63:32 | | | | Reserved | +| 31:0 | wo | x | CL_CLINT_CLEAR | Clear cluster-local interrupt of hart i | + +## HW_BARRIER +Hardware barrier register. Loads to this register will block until all cores have +performed the load. At this stage we know that they reached the same point in the control flow, +i.e., the cores are synchronized. +- Offset: `0x40` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "HW_BARRIER", "bits": 32, "attr": ["ro"], "rotate": 0}, {"bits": 32}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:---------------------------| +| 63:32 | | | | Reserved | +| 31:0 | ro | x | HW_BARRIER | Hardware barrier register. | + +## ICACHE_PREFETCH_ENABLE +Controls prefetching of the instruction cache. +- Offset: `0x48` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "ICACHE_PREFETCH_ENABLE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 63}], "config": {"lanes": 1, "fontsize": 10, "vspace": 240}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------|:---------------------------| +| 63:1 | | | | Reserved | +| 0 | wo | 0x1 | ICACHE_PREFETCH_ENABLE | Hardware barrier register. | + +## SPATZ_STATUS +Sets the status of the Spatz cluster. +- Offset: `0x50` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_PROBE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 63}], "config": {"lanes": 1, "fontsize": 10, "vspace": 210}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------|:---------------------------------------------| +| 63:1 | | | | Reserved | +| 0 | wo | 0x0 | SPATZ_CLUSTER_PROBE | Indicates the cluster is computing a kernel. | + +## CLUSTER_BOOT_CONTROL +Controls the cluster boot process. +- Offset: `0x58` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "ENTRY_POINT", "bits": 32, "attr": ["rw"], "rotate": 0}, {"bits": 32}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:--------------------------------| +| 63:32 | | | | Reserved | +| 31:0 | rw | 0x0 | ENTRY_POINT | Post-bootstrapping entry point. | + + + + + +## gpio + + + +### registers.md + +## Summary + +| Name | Offset | Length | Description | +|:-----------------------------------------------------|:---------|---------:|:----------------------------------------------| +| gpio.[`INTR_STATE`](#intr_state) | 0x0 | 4 | Interrupt State Register | +| gpio.[`INTR_ENABLE`](#intr_enable) | 0x4 | 4 | Interrupt Enable Register | +| gpio.[`INTR_TEST`](#intr_test) | 0x8 | 4 | Interrupt Test Register | +| gpio.[`ALERT_TEST`](#alert_test) | 0xc | 4 | Alert Test Register | +| gpio.[`DATA_IN`](#data_in) | 0x10 | 4 | GPIO Input data read value | +| gpio.[`DIRECT_OUT`](#direct_out) | 0x14 | 4 | GPIO direct output data write value | +| gpio.[`MASKED_OUT_LOWER`](#masked_out_lower) | 0x18 | 4 | GPIO write data lower with mask. | +| gpio.[`MASKED_OUT_UPPER`](#masked_out_upper) | 0x1c | 4 | GPIO write data upper with mask. | +| gpio.[`DIRECT_OE`](#direct_oe) | 0x20 | 4 | GPIO Output Enable. | +| gpio.[`MASKED_OE_LOWER`](#masked_oe_lower) | 0x24 | 4 | GPIO write Output Enable lower with mask. | +| gpio.[`MASKED_OE_UPPER`](#masked_oe_upper) | 0x28 | 4 | GPIO write Output Enable upper with mask. | +| gpio.[`INTR_CTRL_EN_RISING`](#intr_ctrl_en_rising) | 0x2c | 4 | GPIO interrupt enable for GPIO, rising edge. | +| gpio.[`INTR_CTRL_EN_FALLING`](#intr_ctrl_en_falling) | 0x30 | 4 | GPIO interrupt enable for GPIO, falling edge. | +| gpio.[`INTR_CTRL_EN_LVLHIGH`](#intr_ctrl_en_lvlhigh) | 0x34 | 4 | GPIO interrupt enable for GPIO, level high. | +| gpio.[`INTR_CTRL_EN_LVLLOW`](#intr_ctrl_en_lvllow) | 0x38 | 4 | GPIO interrupt enable for GPIO, level low. | +| gpio.[`CTRL_EN_INPUT_FILTER`](#ctrl_en_input_filter) | 0x3c | 4 | filter enable for GPIO input bits. | + +## INTR_STATE +Interrupt State Register +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "gpio", "bits": 32, "attr": ["rw1c"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------| +| 31:0 | rw1c | 0x0 | gpio | raised if any of GPIO pin detects configured interrupt mode | + +## INTR_ENABLE +Interrupt Enable Register +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "gpio", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------| +| 31:0 | rw | 0x0 | gpio | Enable interrupt when corresponding bit in [`INTR_STATE.gpio`](#intr_state) is set. | + +## INTR_TEST +Interrupt Test Register +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "gpio", "bits": 32, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------| +| 31:0 | wo | 0x0 | gpio | Write 1 to force corresponding bit in [`INTR_STATE.gpio`](#intr_state) to 1. | + +## ALERT_TEST +Alert Test Register +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "fatal_fault", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:-------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | fatal_fault | Write 1 to trigger one alert event of this kind. | + +## DATA_IN +GPIO Input data read value +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "DATA_IN", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------| +| 31:0 | ro | x | DATA_IN | | + +## DIRECT_OUT +GPIO direct output data write value +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "DIRECT_OUT", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:0 | rw | x | DIRECT_OUT | | + +## MASKED_OUT_LOWER +GPIO write data lower with mask. + +Masked write for DATA_OUT[15:0]. + +Upper 16 bits of this register are used as mask. Writing +lower 16 bits of the register changes DATA_OUT[15:0] value +if mask bits are set. + +Read-back of this register returns upper 16 bits as zero +and lower 16 bits as DATA_OUT[15:0]. +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "data", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "mask", "bits": 16, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------| +| 31:16 | wo | x | mask | Write data mask[15:0]. A value of 1 in mask[i] allows the updating of DATA_OUT[i], 0 <= i <= 15 | +| 15:0 | rw | x | data | Write data value[15:0]. Value to write into DATA_OUT[i], valid in the presence of mask[i]==1 | + +## MASKED_OUT_UPPER +GPIO write data upper with mask. + +Masked write for DATA_OUT[31:16]. + +Upper 16 bits of this register are used as mask. Writing +lower 16 bits of the register changes DATA_OUT[31:16] value +if mask bits are set. + +Read-back of this register returns upper 16 bits as zero +and lower 16 bits as DATA_OUT[31:16]. +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "data", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "mask", "bits": 16, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------------------| +| 31:16 | wo | x | mask | Write data mask[31:16]. A value of 1 in mask[i] allows the updating of DATA_OUT[i], 16 <= i <= 31 | +| 15:0 | rw | x | data | Write data value[31:16]. Value to write into DATA_OUT[i], valid in the presence of mask[i]==1 | + +## DIRECT_OE +GPIO Output Enable. + +Setting direct_oe[i] to 1 enables output mode for GPIO[i] +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "DIRECT_OE", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:--------------| +| 31:0 | rw | x | DIRECT_OE | | + +## MASKED_OE_LOWER +GPIO write Output Enable lower with mask. + +Masked write for DATA_OE[15:0], the register that controls +output mode for GPIO pins [15:0]. + +Upper 16 bits of this register are used as mask. Writing +lower 16 bits of the register changes DATA_OE[15:0] value +if mask bits are set. + +Read-back of this register returns upper 16 bits as zero +and lower 16 bits as DATA_OE[15:0]. +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "data", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "mask", "bits": 16, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------| +| 31:16 | rw | x | mask | Write OE mask[15:0]. A value of 1 in mask[i] allows the updating of DATA_OE[i], 0 <= i <= 15 | +| 15:0 | rw | x | data | Write OE value[15:0]. Value to write into DATA_OE[i], valid in the presence of mask[i]==1 | + +## MASKED_OE_UPPER +GPIO write Output Enable upper with mask. + +Masked write for DATA_OE[31:16], the register that controls +output mode for GPIO pins [31:16]. + +Upper 16 bits of this register are used as mask. Writing +lower 16 bits of the register changes DATA_OE[31:16] value +if mask bits are set. + +Read-back of this register returns upper 16 bits as zero +and lower 16 bits as DATA_OE[31:16]. +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "data", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "mask", "bits": 16, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------------------------| +| 31:16 | rw | x | mask | Write OE mask[31:16]. A value of 1 in mask[i] allows the updating of DATA_OE[i], 16 <= i <= 31 | +| 15:0 | rw | x | data | Write OE value[31:16]. Value to write into DATA_OE[i], valid in the presence of mask[i]==1 | + +## INTR_CTRL_EN_RISING +GPIO interrupt enable for GPIO, rising edge. + +If [`INTR_ENABLE`](#intr_enable)[i] is true, a value of 1 on [`INTR_CTRL_EN_RISING`](#intr_ctrl_en_rising)[i] +enables rising-edge interrupt detection on GPIO[i]. +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "INTR_CTRL_EN_RISING", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------|:--------------| +| 31:0 | rw | 0x0 | INTR_CTRL_EN_RISING | | + +## INTR_CTRL_EN_FALLING +GPIO interrupt enable for GPIO, falling edge. + +If [`INTR_ENABLE`](#intr_enable)[i] is true, a value of 1 on [`INTR_CTRL_EN_FALLING`](#intr_ctrl_en_falling)[i] +enables falling-edge interrupt detection on GPIO[i]. +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "INTR_CTRL_EN_FALLING", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:0 | rw | 0x0 | INTR_CTRL_EN_FALLING | | + +## INTR_CTRL_EN_LVLHIGH +GPIO interrupt enable for GPIO, level high. + +If [`INTR_ENABLE`](#intr_enable)[i] is true, a value of 1 on [`INTR_CTRL_EN_LVLHIGH`](#intr_ctrl_en_lvlhigh)[i] +enables level high interrupt detection on GPIO[i]. +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "INTR_CTRL_EN_LVLHIGH", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:0 | rw | 0x0 | INTR_CTRL_EN_LVLHIGH | | + +## INTR_CTRL_EN_LVLLOW +GPIO interrupt enable for GPIO, level low. + +If [`INTR_ENABLE`](#intr_enable)[i] is true, a value of 1 on [`INTR_CTRL_EN_LVLLOW`](#intr_ctrl_en_lvllow)[i] +enables level low interrupt detection on GPIO[i]. +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "INTR_CTRL_EN_LVLLOW", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------|:--------------| +| 31:0 | rw | 0x0 | INTR_CTRL_EN_LVLLOW | | + +## CTRL_EN_INPUT_FILTER +filter enable for GPIO input bits. + +If [`CTRL_EN_INPUT_FILTER`](#ctrl_en_input_filter)[i] is true, a value of input bit [i] +must be stable for 16 cycles before transitioning. +- Offset: `0x3c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CTRL_EN_INPUT_FILTER", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:0 | rw | 0x0 | CTRL_EN_INPUT_FILTER | | + + + + + +## gp_timer1_system_timer + + + +### registers.md + +## Summary + +| Name | Offset | Length | Description | +|:-----------------------------------|:---------|---------:|:--------------------------------------| +| timer_unit.[`CFG_LO`](#cfg_lo) | 0x0 | 4 | Timer Low Configuration register. | +| timer_unit.[`CFG_HI`](#cfg_hi) | 0x4 | 4 | Timer HIGH Configuration register. | +| timer_unit.[`CNT_LO`](#cnt_lo) | 0x8 | 4 | Timer Low counter value register. | +| timer_unit.[`CNT_HI`](#cnt_hi) | 0xc | 4 | Timer High counter value register. | +| timer_unit.[`CMP_LO`](#cmp_lo) | 0x10 | 4 | Timer Low comparator value register. | +| timer_unit.[`CMP_HI`](#cmp_hi) | 0x14 | 4 | Timer High comparator value register. | +| timer_unit.[`START_LO`](#start_lo) | 0x18 | 4 | Start Timer Low counting register. | +| timer_unit.[`START_HI`](#start_hi) | 0x1c | 4 | Start Timer High counting register. | +| timer_unit.[`RESET_LO`](#reset_lo) | 0x20 | 4 | Reset Timer Low counter register. | +| timer_unit.[`RESET_HI`](#reset_hi) | 0x24 | 4 | Reset Timer High counter register. | + +## CFG_LO +Timer Low Configuration register. +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0x8000ffff` + +### Fields + +```wavejson +{"reg": [{"name": "ENABLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RESET", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "IRQEN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "IEM", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "MODE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ONE_S", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "PEN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CCFG", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "PVAL", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 15}, {"name": "CASC", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31 | rw | 0x0 | CASC | Timer low + Timer high 64bit cascaded mode configuration bitfield. | +| 30:16 | | | | Reserved | +| 15:8 | rw | 0x0 | PVAL | Timer low prescaler value bitfield. Ftimer = Fclk / (1 + PRESC_VAL) | +| 7 | rw | 0x0 | CCFG | Timer low clock source configuration bitfield: - 1'b0: FLL or FLL+Prescaler - 1'b1: Reference clock at 32kHz | +| 6 | rw | 0x0 | PEN | Timer low prescaler enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 5 | rw | 0x0 | ONE_S | Timer low one shot configuration bitfield: - 1'b0: let Timer low enabled counting when compare match with CMP_LO occurs. - 1'b1: disable Timer low when compare match with CMP_LO occurs. | +| 4 | rw | 0x0 | MODE | Timer low continuous mode configuration bitfield: - 1'b0: Continue mode - continue incrementing Timer low counter when compare match with CMP_LO occurs. - 1'b1: Cycle mode - reset Timer low counter when compare match with CMP_LO occurs. | +| 3 | rw | 0x0 | IEM | Timer low input event mask configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 2 | rw | 0x0 | IRQEN | Timer low compare match interrupt enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 1 | rw | 0x0 | RESET | Timer low counter reset command bitfield. Cleared after Timer Low reset execution. | +| 0 | rw | 0x0 | ENABLE | Timer low enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | + +## CFG_HI +Timer HIGH Configuration register. +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "ENABLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RESET", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "IRQEN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "IEM", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "MODE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ONE_S", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "PEN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CLKCFG", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7 | rw | 0x0 | CLKCFG | Timer high clock source configuration bitfield: - 1'b0: FLL or FLL+Prescaler - 1'b1: Reference clock at 32kHz | +| 6 | rw | 0x0 | PEN | Timer high prescaler enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 5 | rw | 0x0 | ONE_S | Timer high one shot configuration bitfield: - 1'b0: let Timer high enabled counting when compare match with CMP_HI occurs. - 1'b1: disable Timer high when compare match with CMP_HI occurs. | +| 4 | rw | 0x0 | MODE | Timer high continuous mode configuration bitfield: - 1'b0: Continue mode - continue incrementing Timer high counter when compare match with CMP_HI occurs. - 1'b1: Cycle mode - reset Timer high counter when compare match with CMP_HI occurs. | +| 3 | rw | 0x0 | IEM | Timer high input event mask configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 2 | rw | 0x0 | IRQEN | Timer high compare match interrupt enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 1 | wo | 0x0 | RESET | Timer high counter reset command bitfield. Cleared after Timer high reset execution. | +| 0 | rw | 0x0 | ENABLE | Timer high enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | + +## CNT_LO +Timer Low counter value register. +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "cnt_lo", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------| +| 31:0 | rw | 0x0 | cnt_lo | Timer Low counter value bitfield. | + +## CNT_HI +Timer High counter value register. +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "cnt_hi", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------| +| 31:0 | rw | 0x0 | cnt_hi | Timer High counter value bitfield. | + +## CMP_LO +Timer Low comparator value register. +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "cmp_lo", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------| +| 31:0 | rw | 0x0 | cmp_lo | Timer Low comparator value bitfield. | + +## CMP_HI +Timer High comparator value register. +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "cmp_hi", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------| +| 31:0 | rw | 0x0 | cmp_hi | Timer High comparator value bitfield. | + +## START_LO +Start Timer Low counting register. +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "strt_lo", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:-----------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | strt_lo | Timer Low start command bitfield. When executed, CFG_LO.ENABLE is set. | + +## START_HI +Start Timer High counting register. +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "strt_hi", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | strt_hi | Timer High start command bitfield. When executed, CFG_HI.ENABLE is set. | + +## RESET_LO +Reset Timer Low counter register. +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "rst_lo", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | rst_lo | Timer Low counter reset command bitfield. When executed, CFG_LO.RESET is set. | + +## RESET_HI +Reset Timer High counter register. +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "rst_hi", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | rst_hi | Timer High counter reset command bitfield. When executed, CFG_HI.RESET is set. | + + + + + +## gp_timer2_advanced_timer + + + +### registers.md + +## Summary + +| Name | Offset | Length | Description | +|:--------------------------------------------------|:---------|---------:|:---------------------------------------------------------| +| apb_adv_timer.[`T0_CMD`](#t0_cmd) | 0x0 | 4 | ADV_TIMER0 command register. | +| apb_adv_timer.[`T0_CONFIG`](#t0_config) | 0x4 | 4 | ADV_TIMER0 configuration register. | +| apb_adv_timer.[`T0_THRESHOLD`](#t0_threshold) | 0x8 | 4 | ADV_TIMER0 threshold configuration register. | +| apb_adv_timer.[`T0_TH_CHANNEL0`](#t0_th_channel0) | 0xc | 4 | ADV_TIMER0 channel 0 threshold configuration register. | +| apb_adv_timer.[`T0_TH_CHANNEL1`](#t0_th_channel1) | 0x10 | 4 | ADV_TIMER0 channel 1 threshold configuration register. | +| apb_adv_timer.[`T0_TH_CHANNEL2`](#t0_th_channel2) | 0x14 | 4 | ADV_TIMER0 channel 2 threshold configuration register. | +| apb_adv_timer.[`T0_TH_CHANNEL3`](#t0_th_channel3) | 0x18 | 4 | ADV_TIMER0 channel 3 threshold configuration register. | +| apb_adv_timer.[`T0_COUNTER`](#t0_counter) | 0x1c | 4 | ADV_TIMER0 counter register. | +| apb_adv_timer.[`T1_CMD`](#t1_cmd) | 0x20 | 4 | ADV_TIMER1 command register. | +| apb_adv_timer.[`T1_CONFIG`](#t1_config) | 0x24 | 4 | ADV_TIMER1 configuration register. | +| apb_adv_timer.[`T1_THRESHOLD`](#t1_threshold) | 0x28 | 4 | ADV_TIMER1 threshold configuration register. | +| apb_adv_timer.[`T1_TH_CHANNEL0`](#t1_th_channel0) | 0x2c | 4 | ADV_TIMER1 channel 0 threshold configuration register. | +| apb_adv_timer.[`T1_TH_CHANNEL1`](#t1_th_channel1) | 0x30 | 4 | ADV_TIMER1 channel 1 threshold configuration register. | +| apb_adv_timer.[`T1_TH_CHANNEL2`](#t1_th_channel2) | 0x34 | 4 | ADV_TIMER1 channel 2 threshold configuration register. | +| apb_adv_timer.[`T1_TH_CHANNEL3`](#t1_th_channel3) | 0x38 | 4 | ADV_TIMER1 channel 3 threshold configuration register. | +| apb_adv_timer.[`T1_COUNTER`](#t1_counter) | 0x3c | 4 | ADV_TIMER1 counter register. | +| apb_adv_timer.[`T2_CMD`](#t2_cmd) | 0x40 | 4 | ADV_TIMER2 command register. | +| apb_adv_timer.[`T2_CONFIG`](#t2_config) | 0x44 | 4 | ADV_TIMER2 configuration register. | +| apb_adv_timer.[`T2_THRESHOLD`](#t2_threshold) | 0x48 | 4 | ADV_TIMER2 threshold configuration register. | +| apb_adv_timer.[`T2_TH_CHANNEL0`](#t2_th_channel0) | 0x4c | 4 | ADV_TIMER2 channel 0 threshold configuration register. | +| apb_adv_timer.[`T2_TH_CHANNEL1`](#t2_th_channel1) | 0x50 | 4 | ADV_TIMER2 channel 1 threshold configuration register. | +| apb_adv_timer.[`T2_TH_CHANNEL2`](#t2_th_channel2) | 0x54 | 4 | ADV_TIMER2 channel 2 threshold configuration register. | +| apb_adv_timer.[`T2_TH_CHANNEL3`](#t2_th_channel3) | 0x58 | 4 | ADV_TIMER2 channel 3 threshold configuration register. | +| apb_adv_timer.[`T2_COUNTER`](#t2_counter) | 0x5c | 4 | ADV_TIMER2 counter register. | +| apb_adv_timer.[`T3_CMD`](#t3_cmd) | 0x60 | 4 | ADV_TIMER3 command register. | +| apb_adv_timer.[`T3_CONFIG`](#t3_config) | 0x64 | 4 | ADV_TIMER3 configuration register. | +| apb_adv_timer.[`T3_THRESHOLD`](#t3_threshold) | 0x68 | 4 | ADV_TIMER3 threshold configuration register. | +| apb_adv_timer.[`T3_TH_CHANNEL0`](#t3_th_channel0) | 0x6c | 4 | ADV_TIMER3 channel 0 threshold configuration register. | +| apb_adv_timer.[`T3_TH_CHANNEL1`](#t3_th_channel1) | 0x70 | 4 | ADV_TIMER3 channel 1 threshold configuration register. | +| apb_adv_timer.[`T3_TH_CHANNEL2`](#t3_th_channel2) | 0x74 | 4 | ADV_TIMER3 channel 2 threshold configuration register. | +| apb_adv_timer.[`T3_TH_CHANNEL3`](#t3_th_channel3) | 0x78 | 4 | ADV_TIMER3 channel 3 threshold configuration register. | +| apb_adv_timer.[`T3_COUNTER`](#t3_counter) | 0x7c | 4 | ADV_TIMER3 counter register. | +| apb_adv_timer.[`EVENT_CFG`](#event_cfg) | 0x80 | 4 | ADV_TIMERS events configuration register. | +| apb_adv_timer.[`CG`](#cg) | 0x84 | 4 | ADV_TIMERS channels clock gating configuration register. | + +## T0_CMD +ADV_TIMER0 command register. +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "START", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "STOP", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "UPDATE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RESET", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "ARM", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RFU", "bits": 27, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------| +| 31:5 | wo | 0x0 | RFU | ? | +| 4 | wo | 0x0 | ARM | ADV_TIMER0 arm command bitfield. | +| 3 | wo | 0x0 | RESET | ADV_TIMER0 reset command bitfield. | +| 2 | wo | 0x0 | UPDATE | ADV_TIMER0 update command bitfield. | +| 1 | wo | 0x0 | STOP | ADV_TIMER0 stop command bitfield. | +| 0 | wo | 0x0 | START | ADV_TIMER0 start command bitfield. | + +## T0_CONFIG +ADV_TIMER0 configuration register. +- Offset: `0x4` +- Reset default: `0x1000` +- Reset mask: `0xff1fff` + +### Fields + +```wavejson +{"reg": [{"name": "INSEL", "bits": 8, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"name": "CLKSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "UPDOWNSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 3}, {"name": "PRESC", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------------| +| 31:24 | | | Reserved | +| 23:16 | rw | 0x0 | [PRESC](#t0_config--presc) | +| 15:13 | | | Reserved | +| 12 | rw | 0x1 | [UPDOWNSEL](#t0_config--updownsel) | +| 11 | rw | 0x0 | [CLKSEL](#t0_config--clksel) | +| 10:8 | rw | 0x0 | [MODE](#t0_config--mode) | +| 7:0 | rw | 0x0 | [INSEL](#t0_config--insel) | + +### T0_CONFIG . PRESC +ADV_TIMER0 prescaler value configuration bitfield. + +### T0_CONFIG . UPDOWNSEL +ADV_TIMER0 center-aligned mode configuration bitfield: +- 1'b0: The counter counts up and down alternatively. +- 1'b1: The counter counts up and resets to 0 when reach threshold. + +### T0_CONFIG . CLKSEL +ADV_TIMER0 clock source configuration bitfield: +- 1'b0: FLL +- 1'b1: reference clock at 32kHz + +### T0_CONFIG . MODE +ADV_TIMER0 trigger mode configuration bitfield: +- 3'h0: trigger event at each clock cycle. +- 3'h1: trigger event if input source is 0 +- 3'h2: trigger event if input source is 1 +- 3'h3: trigger event on input source rising edge +- 3'h4: trigger event on input source falling edge +- 3'h5: trigger event on input source falling or rising edge +- 3'h6: trigger event on input source rising edge when armed +- 3'h7: trigger event on input source falling edge when armed + +### T0_CONFIG . INSEL +ADV_TIMER0 input source configuration bitfield: +- 0-31: GPIO[0] to GPIO[31] +- 32-35: Channel 0 to 3 of ADV_TIMER0 +- 36-39: Channel 0 to 3 of ADV_TIMER1 +- 40-43: Channel 0 to 3 of ADV_TIMER2 +- 44-47: Channel 0 to 3 of ADV_TIMER3 + +## T0_THRESHOLD +ADV_TIMER0 threshold configuration register. +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH_LO", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "TH_HI", "bits": 16, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------| +| 31:16 | rw | 0x0 | TH_HI | ADV_TIMER0 threshold high part configuration bitfield. It defines end counter value. | +| 15:0 | rw | 0x0 | TH_LO | ADV_TIMER0 threshold low part configuration bitfield. It defines start counter value. | + +## T0_TH_CHANNEL0 +ADV_TIMER0 channel 0 threshold configuration register. +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t0_th_channel0--mode) | +| 15:0 | rw | 0x0 | [TH](#t0_th_channel0--th) | + +### T0_TH_CHANNEL0 . MODE +ADV_TIMER0 channel 0 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T0_TH_CHANNEL0 . TH +ADV_TIMER0 channel 0 threshold configuration bitfield. + +## T0_TH_CHANNEL1 +ADV_TIMER0 channel 1 threshold configuration register. +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t0_th_channel1--mode) | +| 15:0 | rw | 0x0 | [TH](#t0_th_channel1--th) | + +### T0_TH_CHANNEL1 . MODE +ADV_TIMER0 channel 1 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T0_TH_CHANNEL1 . TH +ADV_TIMER0 channel 1 threshold configuration bitfield. + +## T0_TH_CHANNEL2 +ADV_TIMER0 channel 2 threshold configuration register. +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t0_th_channel2--mode) | +| 15:0 | rw | 0x0 | [TH](#t0_th_channel2--th) | + +### T0_TH_CHANNEL2 . MODE +ADV_TIMER0 channel 2 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T0_TH_CHANNEL2 . TH +ADV_TIMER0 channel 2 threshold configuration bitfield. + +## T0_TH_CHANNEL3 +ADV_TIMER0 channel 3 threshold configuration register. +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t0_th_channel3--mode) | +| 15:0 | rw | 0x0 | [TH](#t0_th_channel3--th) | + +### T0_TH_CHANNEL3 . MODE +ADV_TIMER0 channel 3 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T0_TH_CHANNEL3 . TH +ADV_TIMER0 channel 3 threshold configuration bitfield. + +## T0_COUNTER +ADV_TIMER0 counter register. +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "COUNTER", "bits": 16, "attr": ["ro"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------------------| +| 31:16 | | | | Reserved | +| 15:0 | ro | 0x0 | COUNTER | ADV_TIMER0 counter value. | + +## T1_CMD +ADV_TIMER1 command register. +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0x1f` + +### Fields + +```wavejson +{"reg": [{"name": "START", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "STOP", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "UPDATE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RESET", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "ARM", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 27}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------| +| 31:5 | | | | Reserved | +| 4 | wo | 0x0 | ARM | ADV_TIMER1 arm command bitfield. | +| 3 | wo | 0x0 | RESET | ADV_TIMER1 reset command bitfield. | +| 2 | wo | 0x0 | UPDATE | ADV_TIMER1 update command bitfield. | +| 1 | wo | 0x0 | STOP | ADV_TIMER1 stop command bitfield. | +| 0 | wo | 0x0 | START | ADV_TIMER1 start command bitfield. | + +## T1_CONFIG +ADV_TIMER1 configuration register. +- Offset: `0x24` +- Reset default: `0x1000` +- Reset mask: `0xff1fff` + +### Fields + +```wavejson +{"reg": [{"name": "INSEL", "bits": 8, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"name": "CLKSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "UPDOWNSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 3}, {"name": "PRESC", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------------| +| 31:24 | | | Reserved | +| 23:16 | rw | 0x0 | [PRESC](#t1_config--presc) | +| 15:13 | | | Reserved | +| 12 | rw | 0x1 | [UPDOWNSEL](#t1_config--updownsel) | +| 11 | rw | 0x0 | [CLKSEL](#t1_config--clksel) | +| 10:8 | rw | 0x0 | [MODE](#t1_config--mode) | +| 7:0 | rw | 0x0 | [INSEL](#t1_config--insel) | + +### T1_CONFIG . PRESC +ADV_TIMER1 prescaler value configuration bitfield. + +### T1_CONFIG . UPDOWNSEL +ADV_TIMER1 center-aligned mode configuration bitfield: +- 1'b0: The counter counts up and down alternatively. +- 1'b1: The counter counts up and resets to 0 when reach threshold. + +### T1_CONFIG . CLKSEL +ADV_TIMER1 clock source configuration bitfield: +- 1'b0: FLL +- 1'b1: reference clock at 32kHz + +### T1_CONFIG . MODE +ADV_TIMER1 trigger mode configuration bitfield: +- 3'h0: trigger event at each clock cycle. +- 3'h1: trigger event if input source is 0 +- 3'h2: trigger event if input source is 1 +- 3'h3: trigger event on input source rising edge +- 3'h4: trigger event on input source falling edge +- 3'h5: trigger event on input source falling or rising edge +- 3'h6: trigger event on input source rising edge when armed +- 3'h7: trigger event on input source falling edge when armed + +### T1_CONFIG . INSEL +ADV_TIMER1 input source configuration bitfield: +- 0-31: GPIO[0] to GPIO[31] +- 32-35: Channel 0 to 3 of ADV_TIMER0 +- 36-39: Channel 0 to 3 of ADV_TIMER1 +- 40-43: Channel 0 to 3 of ADV_TIMER2 +- 44-47: Channel 0 to 3 of ADV_TIMER3 + +## T1_THRESHOLD +ADV_TIMER1 threshold configuration register. +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH_LO", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "TH_HI", "bits": 16, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------| +| 31:16 | rw | 0x0 | TH_HI | ADV_TIMER1 threshold high part configuration bitfield. It defines end counter value. | +| 15:0 | rw | 0x0 | TH_LO | ADV_TIMER1 threshold low part configuration bitfield. It defines start counter value. | + +## T1_TH_CHANNEL0 +ADV_TIMER1 channel 0 threshold configuration register. +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t1_th_channel0--mode) | +| 15:0 | rw | 0x0 | [TH](#t1_th_channel0--th) | + +### T1_TH_CHANNEL0 . MODE +ADV_TIMER1 channel 0 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T1_TH_CHANNEL0 . TH +ADV_TIMER1 channel 0 threshold configuration bitfield. + +## T1_TH_CHANNEL1 +ADV_TIMER1 channel 1 threshold configuration register. +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t1_th_channel1--mode) | +| 15:0 | rw | 0x0 | [TH](#t1_th_channel1--th) | + +### T1_TH_CHANNEL1 . MODE +ADV_TIMER1 channel 1 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T1_TH_CHANNEL1 . TH +ADV_TIMER1 channel 1 threshold configuration bitfield. + +## T1_TH_CHANNEL2 +ADV_TIMER1 channel 2 threshold configuration register. +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t1_th_channel2--mode) | +| 15:0 | rw | 0x0 | [TH](#t1_th_channel2--th) | + +### T1_TH_CHANNEL2 . MODE +ADV_TIMER1 channel 2 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T1_TH_CHANNEL2 . TH +ADV_TIMER1 channel 2 threshold configuration bitfield. + +## T1_TH_CHANNEL3 +ADV_TIMER1 channel 3 threshold configuration register. +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t1_th_channel3--mode) | +| 15:0 | rw | 0x0 | [TH](#t1_th_channel3--th) | + +### T1_TH_CHANNEL3 . MODE +ADV_TIMER1 channel 3 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T1_TH_CHANNEL3 . TH +ADV_TIMER1 channel 3 threshold configuration bitfield. + +## T1_COUNTER +ADV_TIMER1 counter register. +- Offset: `0x3c` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "COUNTER", "bits": 16, "attr": ["ro"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------------------| +| 31:16 | | | | Reserved | +| 15:0 | ro | 0x0 | COUNTER | ADV_TIMER1 counter value. | + +## T2_CMD +ADV_TIMER2 command register. +- Offset: `0x40` +- Reset default: `0x0` +- Reset mask: `0x1f` + +### Fields + +```wavejson +{"reg": [{"name": "START", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "STOP", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "UPDATE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RESET", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "ARM", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 27}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------| +| 31:5 | | | | Reserved | +| 4 | wo | 0x0 | ARM | ADV_TIMER2 arm command bitfield. | +| 3 | wo | 0x0 | RESET | ADV_TIMER2 reset command bitfield. | +| 2 | wo | 0x0 | UPDATE | ADV_TIMER2 update command bitfield. | +| 1 | wo | 0x0 | STOP | ADV_TIMER2 stop command bitfield. | +| 0 | wo | 0x0 | START | ADV_TIMER2 start command bitfield. | + +## T2_CONFIG +ADV_TIMER2 configuration register. +- Offset: `0x44` +- Reset default: `0x1000` +- Reset mask: `0xff1fff` + +### Fields + +```wavejson +{"reg": [{"name": "INSEL", "bits": 8, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"name": "CLKSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "UPDOWNSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 3}, {"name": "PRESC", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------------| +| 31:24 | | | Reserved | +| 23:16 | rw | 0x0 | [PRESC](#t2_config--presc) | +| 15:13 | | | Reserved | +| 12 | rw | 0x1 | [UPDOWNSEL](#t2_config--updownsel) | +| 11 | rw | 0x0 | [CLKSEL](#t2_config--clksel) | +| 10:8 | rw | 0x0 | [MODE](#t2_config--mode) | +| 7:0 | rw | 0x0 | [INSEL](#t2_config--insel) | + +### T2_CONFIG . PRESC +ADV_TIMER2 prescaler value configuration bitfield. + +### T2_CONFIG . UPDOWNSEL +ADV_TIMER2 center-aligned mode configuration bitfield: +- 1'b0: The counter counts up and down alternatively. +- 1'b1: The counter counts up and resets to 0 when reach threshold. + +### T2_CONFIG . CLKSEL +ADV_TIMER2 clock source configuration bitfield: +- 1'b0: FLL +- 1'b1: reference clock at 32kHz + +### T2_CONFIG . MODE +ADV_TIMER2 trigger mode configuration bitfield: +- 3'h0: trigger event at each clock cycle. +- 3'h1: trigger event if input source is 0 +- 3'h2: trigger event if input source is 1 +- 3'h3: trigger event on input source rising edge +- 3'h4: trigger event on input source falling edge +- 3'h5: trigger event on input source falling or rising edge +- 3'h6: trigger event on input source rising edge when armed +- 3'h7: trigger event on input source falling edge when armed + +### T2_CONFIG . INSEL +ADV_TIMER2 input source configuration bitfield: +- 0-31: GPIO[0] to GPIO[31] +- 32-35: Channel 0 to 3 of ADV_TIMER0 +- 36-39: Channel 0 to 3 of ADV_TIMER1 +- 40-43: Channel 0 to 3 of ADV_TIMER2 +- 44-47: Channel 0 to 3 of ADV_TIMER3 + +## T2_THRESHOLD +ADV_TIMER2 threshold configuration register. +- Offset: `0x48` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH_LO", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "TH_HI", "bits": 16, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------| +| 31:16 | rw | 0x0 | TH_HI | ADV_TIMER2 threshold high part configuration bitfield. It defines end counter value. | +| 15:0 | rw | 0x0 | TH_LO | ADV_TIMER2 threshold low part configuration bitfield. It defines start counter value. | + +## T2_TH_CHANNEL0 +ADV_TIMER2 channel 0 threshold configuration register. +- Offset: `0x4c` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t2_th_channel0--mode) | +| 15:0 | rw | 0x0 | [TH](#t2_th_channel0--th) | + +### T2_TH_CHANNEL0 . MODE +ADV_TIMER2 channel 0 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T2_TH_CHANNEL0 . TH +ADV_TIMER2 channel 0 threshold configuration bitfield. + +## T2_TH_CHANNEL1 +ADV_TIMER2 channel 1 threshold configuration register. +- Offset: `0x50` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t2_th_channel1--mode) | +| 15:0 | rw | 0x0 | [TH](#t2_th_channel1--th) | + +### T2_TH_CHANNEL1 . MODE +ADV_TIMER2 channel 1 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T2_TH_CHANNEL1 . TH +ADV_TIMER2 channel 1 threshold configuration bitfield. + +## T2_TH_CHANNEL2 +ADV_TIMER2 channel 2 threshold configuration register. +- Offset: `0x54` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t2_th_channel2--mode) | +| 15:0 | rw | 0x0 | [TH](#t2_th_channel2--th) | + +### T2_TH_CHANNEL2 . MODE +ADV_TIMER2 channel 2 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T2_TH_CHANNEL2 . TH +ADV_TIMER2 channel 2 threshold configuration bitfield. + +## T2_TH_CHANNEL3 +ADV_TIMER2 channel 3 threshold configuration register. +- Offset: `0x58` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t2_th_channel3--mode) | +| 15:0 | rw | 0x0 | [TH](#t2_th_channel3--th) | + +### T2_TH_CHANNEL3 . MODE +ADV_TIMER2 channel 3 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T2_TH_CHANNEL3 . TH +ADV_TIMER2 channel 3 threshold configuration bitfield. + +## T2_COUNTER +ADV_TIMER2 counter register. +- Offset: `0x5c` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "COUNTER", "bits": 16, "attr": ["ro"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------------------| +| 31:16 | | | | Reserved | +| 15:0 | ro | 0x0 | COUNTER | ADV_TIMER2 counter value. | + +## T3_CMD +ADV_TIMER3 command register. +- Offset: `0x60` +- Reset default: `0x0` +- Reset mask: `0x1f` + +### Fields + +```wavejson +{"reg": [{"name": "START", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "STOP", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "UPDATE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RESET", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "ARM", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 27}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------| +| 31:5 | | | | Reserved | +| 4 | wo | 0x0 | ARM | ADV_TIMER3 arm command bitfield. | +| 3 | wo | 0x0 | RESET | ADV_TIMER3 reset command bitfield. | +| 2 | wo | 0x0 | UPDATE | ADV_TIMER3 update command bitfield. | +| 1 | wo | 0x0 | STOP | ADV_TIMER3 stop command bitfield. | +| 0 | wo | 0x0 | START | ADV_TIMER3 start command bitfield. | + +## T3_CONFIG +ADV_TIMER3 configuration register. +- Offset: `0x64` +- Reset default: `0x1000` +- Reset mask: `0xff1fff` + +### Fields + +```wavejson +{"reg": [{"name": "INSEL", "bits": 8, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"name": "CLKSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "UPDOWNSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 3}, {"name": "PRESC", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------------| +| 31:24 | | | Reserved | +| 23:16 | rw | 0x0 | [PRESC](#t3_config--presc) | +| 15:13 | | | Reserved | +| 12 | rw | 0x1 | [UPDOWNSEL](#t3_config--updownsel) | +| 11 | rw | 0x0 | [CLKSEL](#t3_config--clksel) | +| 10:8 | rw | 0x0 | [MODE](#t3_config--mode) | +| 7:0 | rw | 0x0 | [INSEL](#t3_config--insel) | + +### T3_CONFIG . PRESC +ADV_TIMER3 prescaler value configuration bitfield. + +### T3_CONFIG . UPDOWNSEL +ADV_TIMER3 center-aligned mode configuration bitfield: +- 1'b0: The counter counts up and down alternatively. +- 1'b1: The counter counts up and resets to 0 when reach threshold. + +### T3_CONFIG . CLKSEL +ADV_TIMER3 clock source configuration bitfield: +- 1'b0: FLL +- 1'b1: reference clock at 32kHz + +### T3_CONFIG . MODE +ADV_TIMER3 trigger mode configuration bitfield: +- 3'h0: trigger event at each clock cycle. +- 3'h1: trigger event if input source is 0 +- 3'h2: trigger event if input source is 1 +- 3'h3: trigger event on input source rising edge +- 3'h4: trigger event on input source falling edge +- 3'h5: trigger event on input source falling or rising edge +- 3'h6: trigger event on input source rising edge when armed +- 3'h7: trigger event on input source falling edge when armed + +### T3_CONFIG . INSEL +ADV_TIMER3 input source configuration bitfield: +- 0-31: GPIO[0] to GPIO[31] +- 32-35: Channel 0 to 3 of ADV_TIMER0 +- 36-39: Channel 0 to 3 of ADV_TIMER1 +- 40-43: Channel 0 to 3 of ADV_TIMER2 +- 44-47: Channel 0 to 3 of ADV_TIMER3 + +## T3_THRESHOLD +ADV_TIMER3 threshold configuration register. +- Offset: `0x68` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH_LO", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "TH_HI", "bits": 16, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------| +| 31:16 | rw | 0x0 | TH_HI | ADV_TIMER3 threshold high part configuration bitfield. It defines end counter value. | +| 15:0 | rw | 0x0 | TH_LO | ADV_TIMER3 threshold low part configuration bitfield. It defines start counter value. | + +## T3_TH_CHANNEL0 +ADV_TIMER3 channel 0 threshold configuration register. +- Offset: `0x6c` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t3_th_channel0--mode) | +| 15:0 | rw | 0x0 | [TH](#t3_th_channel0--th) | + +### T3_TH_CHANNEL0 . MODE +ADV_TIMER3 channel 0 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T3_TH_CHANNEL0 . TH +ADV_TIMER3 channel 0 threshold configuration bitfield. + +## T3_TH_CHANNEL1 +ADV_TIMER3 channel 1 threshold configuration register. +- Offset: `0x70` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t3_th_channel1--mode) | +| 15:0 | rw | 0x0 | [TH](#t3_th_channel1--th) | + +### T3_TH_CHANNEL1 . MODE +ADV_TIMER3 channel 1 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T3_TH_CHANNEL1 . TH +ADV_TIMER3 channel 1 threshold configuration bitfield. + +## T3_TH_CHANNEL2 +ADV_TIMER3 channel 2 threshold configuration register. +- Offset: `0x74` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t3_th_channel2--mode) | +| 15:0 | rw | 0x0 | [TH](#t3_th_channel2--th) | + +### T3_TH_CHANNEL2 . MODE +ADV_TIMER3 channel 2 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T3_TH_CHANNEL2 . TH +ADV_TIMER3 channel 2 threshold configuration bitfield. + +## T3_TH_CHANNEL3 +ADV_TIMER3 channel 3 threshold configuration register. +- Offset: `0x78` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t3_th_channel3--mode) | +| 15:0 | rw | 0x0 | [TH](#t3_th_channel3--th) | + +### T3_TH_CHANNEL3 . MODE +ADV_TIMER3 channel 3 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T3_TH_CHANNEL3 . TH +ADV_TIMER3 channel 3 threshold configuration bitfield. + +## T3_COUNTER +ADV_TIMER3 counter register. +- Offset: `0x7c` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "COUNTER", "bits": 16, "attr": ["ro"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------------------| +| 31:16 | | | | Reserved | +| 15:0 | ro | 0x0 | COUNTER | ADV_TIMER3 counter value. | + +## EVENT_CFG +ADV_TIMERS events configuration register. +- Offset: `0x80` +- Reset default: `0x0` +- Reset mask: `0xfffff` + +### Fields + +```wavejson +{"reg": [{"name": "SEL0", "bits": 4, "attr": ["rw"], "rotate": 0}, {"name": "SEL1", "bits": 4, "attr": ["rw"], "rotate": 0}, {"name": "SEL2", "bits": 4, "attr": ["rw"], "rotate": 0}, {"name": "SEL3", "bits": 4, "attr": ["rw"], "rotate": 0}, {"name": "ENA", "bits": 4, "attr": ["rw"], "rotate": 0}, {"bits": 12}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-------------------------| +| 31:20 | | | Reserved | +| 19:16 | rw | 0x0 | [ENA](#event_cfg--ena) | +| 15:12 | rw | 0x0 | [SEL3](#event_cfg--sel3) | +| 11:8 | rw | 0x0 | [SEL2](#event_cfg--sel2) | +| 7:4 | rw | 0x0 | [SEL1](#event_cfg--sel1) | +| 3:0 | rw | 0x0 | [SEL0](#event_cfg--sel0) | + +### EVENT_CFG . ENA +ADV_TIMER output event enable configuration bitfield. ENA[i]=1 enables output event i generation. + +### EVENT_CFG . SEL3 +ADV_TIMER output event 3 source configuration bitfiled: +- 4'h0: ADV_TIMER0 channel 0. +- 4'h1: ADV_TIMER0 channel 1. +- 4'h2: ADV_TIMER0 channel 2. +- 4'h3: ADV_TIMER0 channel 3. +- 4'h4: ADV_TIMER1 channel 0. +- 4'h5: ADV_TIMER1 channel 1. +- 4'h6: ADV_TIMER1 channel 2. +- 4'h7: ADV_TIMER1 channel 3. +- 4'h8: ADV_TIMER2 channel 0. +- 4'h9: ADV_TIMER2 channel 1. +- 4'hA: ADV_TIMER2 channel 2. +- 4'hB: ADV_TIMER2 channel 3. +- 4'hC: ADV_TIMER3 channel 0. +- 4'hD: ADV_TIMER3 channel 1. +- 4'hE: ADV_TIMER3 channel 2. +- 4'hF: ADV_TIMER3 channel 3. + +### EVENT_CFG . SEL2 +ADV_TIMER output event 2 source configuration bitfiled: +- 4'h0: ADV_TIMER0 channel 0. +- 4'h1: ADV_TIMER0 channel 1. +- 4'h2: ADV_TIMER0 channel 2. +- 4'h3: ADV_TIMER0 channel 3. +- 4'h4: ADV_TIMER1 channel 0. +- 4'h5: ADV_TIMER1 channel 1. +- 4'h6: ADV_TIMER1 channel 2. +- 4'h7: ADV_TIMER1 channel 3. +- 4'h8: ADV_TIMER2 channel 0. +- 4'h9: ADV_TIMER2 channel 1. +- 4'hA: ADV_TIMER2 channel 2. +- 4'hB: ADV_TIMER2 channel 3. +- 4'hC: ADV_TIMER3 channel 0. +- 4'hD: ADV_TIMER3 channel 1. +- 4'hE: ADV_TIMER3 channel 2. +- 4'hF: ADV_TIMER3 channel 3. + +### EVENT_CFG . SEL1 +ADV_TIMER output event 1 source configuration bitfiled: +- 4'h0: ADV_TIMER0 channel 0. +- 4'h1: ADV_TIMER0 channel 1. +- 4'h2: ADV_TIMER0 channel 2. +- 4'h3: ADV_TIMER0 channel 3. +- 4'h4: ADV_TIMER1 channel 0. +- 4'h5: ADV_TIMER1 channel 1. +- 4'h6: ADV_TIMER1 channel 2. +- 4'h7: ADV_TIMER1 channel 3. +- 4'h8: ADV_TIMER2 channel 0. +- 4'h9: ADV_TIMER2 channel 1. +- 4'hA: ADV_TIMER2 channel 2. +- 4'hB: ADV_TIMER2 channel 3. +- 4'hC: ADV_TIMER3 channel 0. +- 4'hD: ADV_TIMER3 channel 1. +- 4'hE: ADV_TIMER3 channel 2. +- 4'hF: ADV_TIMER3 channel 3. + +### EVENT_CFG . SEL0 +ADV_TIMER output event 0 source configuration bitfiled: +- 4'h0: ADV_TIMER0 channel 0. +- 4'h1: ADV_TIMER0 channel 1. +- 4'h2: ADV_TIMER0 channel 2. +- 4'h3: ADV_TIMER0 channel 3. +- 4'h4: ADV_TIMER1 channel 0. +- 4'h5: ADV_TIMER1 channel 1. +- 4'h6: ADV_TIMER1 channel 2. +- 4'h7: ADV_TIMER1 channel 3. +- 4'h8: ADV_TIMER2 channel 0. +- 4'h9: ADV_TIMER2 channel 1. +- 4'hA: ADV_TIMER2 channel 2. +- 4'hB: ADV_TIMER2 channel 3. +- 4'hC: ADV_TIMER3 channel 0. +- 4'hD: ADV_TIMER3 channel 1. +- 4'hE: ADV_TIMER3 channel 2. +- 4'hF: ADV_TIMER3 channel 3. + +## CG +ADV_TIMERS channels clock gating configuration register. +- Offset: `0x84` +- Reset default: `0x0` +- Reset mask: `0xf` + +### Fields + +```wavejson +{"reg": [{"name": "ENA", "bits": 4, "attr": ["rw"], "rotate": 0}, {"bits": 28}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------------------------------------------| +| 31:4 | | | | Reserved | +| 3:0 | rw | 0x0 | ENA | ADV_TIMER clock gating configuration bitfield. - ENA[i]=0: clock gate ADV_TIMERi. - ENA[i]=1: enable ADV_TIMERi. | + + + + + +## hyperbus + + + +### registers.md + +## Summary + +| Name | Offset | Length | Description | +|:-----------------------------------------------------------|:---------|---------:|:--------------------------------------------| +| hyperbus.[`T_LATENCY_ACCESS`](#t_latency_access) | 0x0 | 4 | Initial latency | +| hyperbus.[`EN_LATENCY_ADDITIONAL`](#en_latency_additional) | 0x4 | 4 | Force 2x Latency count | +| hyperbus.[`T_BURST_MAX`](#t_burst_max) | 0x8 | 4 | Max burst Length between two memory refresh | +| hyperbus.[`T_READ_WRITE_RECOVERY`](#t_read_write_recovery) | 0xc | 4 | Idle time between transactions | +| hyperbus.[`T_RX_CLOCK_DELAY`](#t_rx_clock_delay) | 0x10 | 4 | RX Delay Line | +| hyperbus.[`T_TX_CLOCK_DELAY`](#t_tx_clock_delay) | 0x14 | 4 | TX Delay Line | +| hyperbus.[`ADDRESS_MASK_MSB`](#address_mask_msb) | 0x18 | 4 | Address Mask MSB | +| hyperbus.[`ADDRESS_SPACE`](#address_space) | 0x1c | 4 | L2 sleep configuration register | +| hyperbus.[`PHYS_IN_USE`](#phys_in_use) | 0x20 | 4 | Number of PHYs on use | +| hyperbus.[`WHICH_PHY`](#which_phy) | 0x24 | 4 | PHY used in single PHY mode | +| hyperbus.[`CS0_BASE`](#cs0_base) | 0x28 | 4 | CS0 Base address range | +| hyperbus.[`CS0_END`](#cs0_end) | 0x2c | 4 | CS0 End address range | +| hyperbus.[`CS1_BASE`](#cs1_base) | 0x30 | 4 | CS1 Base address range | +| hyperbus.[`CS1_END`](#cs1_end) | 0x34 | 4 | CS1 End address range | +| hyperbus.[`CS2_BASE`](#cs2_base) | 0x38 | 4 | CS2 Base address range | +| hyperbus.[`CS2_END`](#cs2_end) | 0x3c | 4 | CS2 End address range | +| hyperbus.[`CS3_BASE`](#cs3_base) | 0x40 | 4 | CS3 Base address range | +| hyperbus.[`CS3_END`](#cs3_end) | 0x44 | 4 | CS3 End address range | + +## T_LATENCY_ACCESS +Initial latency +- Offset: `0x0` +- Reset default: `0x6` +- Reset mask: `0xf` + +### Fields + +```wavejson +{"reg": [{"name": "T_LATENCY_ACCESS", "bits": 4, "attr": ["rw"], "rotate": -90}, {"bits": 28}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:----------------| +| 31:4 | | | | Reserved | +| 3:0 | rw | 0x6 | T_LATENCY_ACCESS | Initial latency | + +## EN_LATENCY_ADDITIONAL +Force 2x Latency count +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "EN_LATENCY_ADDITIONAL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:-----------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | EN_LATENCY_ADDITIONAL | Force 2x Latency count | + +## T_BURST_MAX +Max burst Length between two memory refresh +- Offset: `0x8` +- Reset default: `0x15e` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "T_BURST_MAX", "bits": 16, "attr": ["rw"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:--------------------------------------------| +| 31:16 | | | | Reserved | +| 15:0 | rw | 0x15e | T_BURST_MAX | Max burst Length between two memory refresh | + +## T_READ_WRITE_RECOVERY +Idle time between transactions +- Offset: `0xc` +- Reset default: `0x6` +- Reset mask: `0xf` + +### Fields + +```wavejson +{"reg": [{"name": "T_READ_WRITE_RECOVERY", "bits": 4, "attr": ["rw"], "rotate": -90}, {"bits": 28}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:-------------------------------| +| 31:4 | | | | Reserved | +| 3:0 | rw | 0x6 | T_READ_WRITE_RECOVERY | Idle time between transactions | + +## T_RX_CLOCK_DELAY +RX Delay Line +- Offset: `0x10` +- Reset default: `0x8` +- Reset mask: `0xf` + +### Fields + +```wavejson +{"reg": [{"name": "T_RX_CLOCK_DELAY", "bits": 4, "attr": ["rw"], "rotate": -90}, {"bits": 28}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:4 | | | | Reserved | +| 3:0 | rw | 0x8 | T_RX_CLOCK_DELAY | RX Delay Line | + +## T_TX_CLOCK_DELAY +TX Delay Line +- Offset: `0x14` +- Reset default: `0x8` +- Reset mask: `0xf` + +### Fields + +```wavejson +{"reg": [{"name": "T_TX_CLOCK_DELAY", "bits": 4, "attr": ["rw"], "rotate": -90}, {"bits": 28}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:4 | | | | Reserved | +| 3:0 | rw | 0x8 | T_TX_CLOCK_DELAY | TX Delay Line | + +## ADDRESS_MASK_MSB +Address Mask MSB +- Offset: `0x18` +- Reset default: `0x19` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "ADDRESS_MASK_MSB", "bits": 19, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:-----------------| +| 31:19 | | | | Reserved | +| 18:0 | rw | 0x19 | ADDRESS_MASK_MSB | Address Mask MSB | + +## ADDRESS_SPACE +L2 sleep configuration register +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "ADDRESS_SPACE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 150}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:--------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | ADDRESS_SPACE | L2 sleep configuration register | + +## PHYS_IN_USE +Number of PHYs on use +- Offset: `0x20` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PHYS_IN_USE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:--------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | PHYS_IN_USE | Number of PHYs on use: - 1'b0: Uses 1 PHY - 1'b1: Uses 2 PHYs | + +## WHICH_PHY +PHY used in single PHY mode +- Offset: `0x24` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "WHICH_PHY", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | WHICH_PHY | PHY used in single PHY mode: - 1'b0: PHY 0 is used - 1'b1: PHY 1 is used | + +## CS0_BASE +CS0 Base address range +- Offset: `0x28` +- Reset default: `0x80000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CS0_BASE", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:---------|:-----------------------| +| 31:0 | rw | 0x80000000 | CS0_BASE | CS0 Base address range | + +## CS0_END +CS0 End address range +- Offset: `0x2c` +- Reset default: `0x81000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CS0_END", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:--------|:----------------------| +| 31:0 | rw | 0x81000000 | CS0_END | CS0 End address range | + +## CS1_BASE +CS1 Base address range +- Offset: `0x30` +- Reset default: `0x81000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CS1_BASE", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:---------|:-----------------------| +| 31:0 | rw | 0x81000000 | CS1_BASE | CS1 Base address range | + +## CS1_END +CS1 End address range +- Offset: `0x34` +- Reset default: `0x82000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CS1_END", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:--------|:----------------------| +| 31:0 | rw | 0x82000000 | CS1_END | CS1 End address range | + +## CS2_BASE +CS2 Base address range +- Offset: `0x38` +- Reset default: `0x82000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CS2_BASE", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:---------|:-----------------------| +| 31:0 | rw | 0x82000000 | CS2_BASE | CS2 Base address range | + +## CS2_END +CS2 End address range +- Offset: `0x3c` +- Reset default: `0x83000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CS2_END", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:--------|:----------------------| +| 31:0 | rw | 0x83000000 | CS2_END | CS2 End address range | + +## CS3_BASE +CS3 Base address range +- Offset: `0x40` +- Reset default: `0x83000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CS3_BASE", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:---------|:-----------------------| +| 31:0 | rw | 0x83000000 | CS3_BASE | CS3 Base address range | + +## CS3_END +CS3 End address range +- Offset: `0x44` +- Reset default: `0x84000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CS3_END", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:--------|:----------------------| +| 31:0 | rw | 0x84000000 | CS3_END | CS3 End address range | + + + + + +## i2c + + + +### registers.md + +## Summary + +| Name | Offset | Length | Description | +|:--------------------------------------------------------------|:---------|---------:|:----------------------------------------------------------------------------------------------------------| +| i2c.[`INTR_STATE`](#intr_state) | 0x0 | 4 | Interrupt State Register | +| i2c.[`INTR_ENABLE`](#intr_enable) | 0x4 | 4 | Interrupt Enable Register | +| i2c.[`INTR_TEST`](#intr_test) | 0x8 | 4 | Interrupt Test Register | +| i2c.[`ALERT_TEST`](#alert_test) | 0xc | 4 | Alert Test Register | +| i2c.[`CTRL`](#ctrl) | 0x10 | 4 | I2C Control Register | +| i2c.[`STATUS`](#status) | 0x14 | 4 | I2C Live Status Register for Host and Target modes | +| i2c.[`RDATA`](#rdata) | 0x18 | 4 | I2C Read Data | +| i2c.[`FDATA`](#fdata) | 0x1c | 4 | I2C Host Format Data | +| i2c.[`FIFO_CTRL`](#fifo_ctrl) | 0x20 | 4 | I2C FIFO control register | +| i2c.[`HOST_FIFO_CONFIG`](#host_fifo_config) | 0x24 | 4 | Host mode FIFO configuration | +| i2c.[`TARGET_FIFO_CONFIG`](#target_fifo_config) | 0x28 | 4 | Target mode FIFO configuration | +| i2c.[`HOST_FIFO_STATUS`](#host_fifo_status) | 0x2c | 4 | Host mode FIFO status register | +| i2c.[`TARGET_FIFO_STATUS`](#target_fifo_status) | 0x30 | 4 | Target mode FIFO status register | +| i2c.[`OVRD`](#ovrd) | 0x34 | 4 | I2C Override Control Register | +| i2c.[`VAL`](#val) | 0x38 | 4 | Oversampled RX values | +| i2c.[`TIMING0`](#timing0) | 0x3c | 4 | Detailed I2C Timings (directly corresponding to table 10 in the I2C Specification). | +| i2c.[`TIMING1`](#timing1) | 0x40 | 4 | Detailed I2C Timings (directly corresponding to table 10 in the I2C Specification). | +| i2c.[`TIMING2`](#timing2) | 0x44 | 4 | Detailed I2C Timings (directly corresponding to table 10 in the I2C Specification). | +| i2c.[`TIMING3`](#timing3) | 0x48 | 4 | Detailed I2C Timings (directly corresponding to table 10, in the I2C Specification). | +| i2c.[`TIMING4`](#timing4) | 0x4c | 4 | Detailed I2C Timings (directly corresponding to table 10, in the I2C Specification). | +| i2c.[`TIMEOUT_CTRL`](#timeout_ctrl) | 0x50 | 4 | I2C clock stretching and bus timeout control. | +| i2c.[`TARGET_ID`](#target_id) | 0x54 | 4 | I2C target address and mask pairs | +| i2c.[`ACQDATA`](#acqdata) | 0x58 | 4 | I2C target acquired data | +| i2c.[`TXDATA`](#txdata) | 0x5c | 4 | I2C target transmit data | +| i2c.[`HOST_TIMEOUT_CTRL`](#host_timeout_ctrl) | 0x60 | 4 | I2C host clock generation timeout value (in units of input clock frequency). | +| i2c.[`TARGET_TIMEOUT_CTRL`](#target_timeout_ctrl) | 0x64 | 4 | I2C target internal stretching timeout control. | +| i2c.[`TARGET_NACK_COUNT`](#target_nack_count) | 0x68 | 4 | Number of times the I2C target has NACK'ed a new transaction since the last read of this register. | +| i2c.[`TARGET_ACK_CTRL`](#target_ack_ctrl) | 0x6c | 4 | Controls for mid-transfer (N)ACK phase handling | +| i2c.[`ACQ_FIFO_NEXT_DATA`](#acq_fifo_next_data) | 0x70 | 4 | The data byte pending to be written to the ACQ FIFO. | +| i2c.[`HOST_NACK_HANDLER_TIMEOUT`](#host_nack_handler_timeout) | 0x74 | 4 | Timeout in Host-Mode for an unhandled NACK before hardware automatically ends the transaction. | +| i2c.[`CONTROLLER_EVENTS`](#controller_events) | 0x78 | 4 | Latched events that explain why the controller halted. | +| i2c.[`TARGET_EVENTS`](#target_events) | 0x7c | 4 | Latched events that can cause the target module to stretch the clock at the beginning of a read transfer. | + +## INTR_STATE +Interrupt State Register +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0x7fff` + +### Fields + +```wavejson +{"reg": [{"name": "fmt_threshold", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "rx_threshold", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "acq_threshold", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "rx_overflow", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "controller_halt", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "scl_interference", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "sda_interference", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "stretch_timeout", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "sda_unstable", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "cmd_complete", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "tx_stretch", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "tx_threshold", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "acq_stretch", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "unexp_stop", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "host_timeout", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"bits": 17}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:15 | | | | Reserved | +| 14 | rw1c | 0x0 | host_timeout | target mode interrupt: raised if the host stops sending the clock during an ongoing transaction. | +| 13 | rw1c | 0x0 | unexp_stop | target mode interrupt: raised if STOP is received without a preceding NACK during an external host read. | +| 12 | ro | 0x0 | acq_stretch | target mode interrupt: raised if the target is stretching clocks due to full ACQ FIFO or zero count in [`TARGET_ACK_CTRL.NBYTES`](#target_ack_ctrl) (if enabled). This is a level status interrupt. | +| 11 | ro | 0x0 | tx_threshold | target mode interrupt: asserted whilst the TX FIFO level is below the low threshold. This is a level status interrupt. | +| 10 | ro | 0x0 | tx_stretch | target mode interrupt: raised if the target is stretching clocks for a read command. This is a level status interrupt. | +| 9 | rw1c | 0x0 | cmd_complete | host and target mode interrupt. In host mode, raised if the host issues a repeated START or terminates the transaction by issuing STOP. In target mode, raised if the external host issues a STOP or repeated START. | +| 8 | rw1c | 0x0 | sda_unstable | host mode interrupt: raised if the target does not assert a constant value of SDA during transmission. | +| 7 | rw1c | 0x0 | stretch_timeout | host mode interrupt: raised if target stretches the clock beyond the allowed timeout period | +| 6 | rw1c | 0x0 | sda_interference | host mode interrupt: raised if the SDA line goes low when host is trying to assert high | +| 5 | rw1c | 0x0 | scl_interference | host mode interrupt: raised if the SCL line drops early (not supported without clock synchronization). | +| 4 | ro | 0x0 | controller_halt | host mode interrupt: raised if the controller FSM is halted, such as on an unexpected NACK or lost arbitration. Check [`CONTROLLER_EVENTS`](#controller_events) for the reason. The interrupt will be released when the bits in [`CONTROLLER_EVENTS`](#controller_events) are cleared. | +| 3 | rw1c | 0x0 | rx_overflow | host mode interrupt: raised if the RX FIFO has overflowed. | +| 2 | ro | 0x0 | acq_threshold | target mode interrupt: asserted whilst the ACQ FIFO level is above the high threshold. This is a level status interrupt. | +| 1 | ro | 0x0 | rx_threshold | host mode interrupt: asserted whilst the RX FIFO level is above the high threshold. This is a level status interrupt. | +| 0 | ro | 0x0 | fmt_threshold | host mode interrupt: asserted whilst the FMT FIFO level is below the low threshold. This is a level status interrupt. | + +## INTR_ENABLE +Interrupt Enable Register +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0x7fff` + +### Fields + +```wavejson +{"reg": [{"name": "fmt_threshold", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "rx_threshold", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "acq_threshold", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "rx_overflow", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "controller_halt", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "scl_interference", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "sda_interference", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "stretch_timeout", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "sda_unstable", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "cmd_complete", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "tx_stretch", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "tx_threshold", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "acq_stretch", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "unexp_stop", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "host_timeout", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 17}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:---------------------------------------------------------------------------| +| 31:15 | | | | Reserved | +| 14 | rw | 0x0 | host_timeout | Enable interrupt when [`INTR_STATE.host_timeout`](#intr_state) is set. | +| 13 | rw | 0x0 | unexp_stop | Enable interrupt when [`INTR_STATE.unexp_stop`](#intr_state) is set. | +| 12 | rw | 0x0 | acq_stretch | Enable interrupt when [`INTR_STATE.acq_stretch`](#intr_state) is set. | +| 11 | rw | 0x0 | tx_threshold | Enable interrupt when [`INTR_STATE.tx_threshold`](#intr_state) is set. | +| 10 | rw | 0x0 | tx_stretch | Enable interrupt when [`INTR_STATE.tx_stretch`](#intr_state) is set. | +| 9 | rw | 0x0 | cmd_complete | Enable interrupt when [`INTR_STATE.cmd_complete`](#intr_state) is set. | +| 8 | rw | 0x0 | sda_unstable | Enable interrupt when [`INTR_STATE.sda_unstable`](#intr_state) is set. | +| 7 | rw | 0x0 | stretch_timeout | Enable interrupt when [`INTR_STATE.stretch_timeout`](#intr_state) is set. | +| 6 | rw | 0x0 | sda_interference | Enable interrupt when [`INTR_STATE.sda_interference`](#intr_state) is set. | +| 5 | rw | 0x0 | scl_interference | Enable interrupt when [`INTR_STATE.scl_interference`](#intr_state) is set. | +| 4 | rw | 0x0 | controller_halt | Enable interrupt when [`INTR_STATE.controller_halt`](#intr_state) is set. | +| 3 | rw | 0x0 | rx_overflow | Enable interrupt when [`INTR_STATE.rx_overflow`](#intr_state) is set. | +| 2 | rw | 0x0 | acq_threshold | Enable interrupt when [`INTR_STATE.acq_threshold`](#intr_state) is set. | +| 1 | rw | 0x0 | rx_threshold | Enable interrupt when [`INTR_STATE.rx_threshold`](#intr_state) is set. | +| 0 | rw | 0x0 | fmt_threshold | Enable interrupt when [`INTR_STATE.fmt_threshold`](#intr_state) is set. | + +## INTR_TEST +Interrupt Test Register +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0x7fff` + +### Fields + +```wavejson +{"reg": [{"name": "fmt_threshold", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "rx_threshold", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "acq_threshold", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "rx_overflow", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "controller_halt", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "scl_interference", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "sda_interference", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "stretch_timeout", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "sda_unstable", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "cmd_complete", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "tx_stretch", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "tx_threshold", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "acq_stretch", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "unexp_stop", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "host_timeout", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 17}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------------------------------------------------------------| +| 31:15 | | | | Reserved | +| 14 | wo | 0x0 | host_timeout | Write 1 to force [`INTR_STATE.host_timeout`](#intr_state) to 1. | +| 13 | wo | 0x0 | unexp_stop | Write 1 to force [`INTR_STATE.unexp_stop`](#intr_state) to 1. | +| 12 | wo | 0x0 | acq_stretch | Write 1 to force [`INTR_STATE.acq_stretch`](#intr_state) to 1. | +| 11 | wo | 0x0 | tx_threshold | Write 1 to force [`INTR_STATE.tx_threshold`](#intr_state) to 1. | +| 10 | wo | 0x0 | tx_stretch | Write 1 to force [`INTR_STATE.tx_stretch`](#intr_state) to 1. | +| 9 | wo | 0x0 | cmd_complete | Write 1 to force [`INTR_STATE.cmd_complete`](#intr_state) to 1. | +| 8 | wo | 0x0 | sda_unstable | Write 1 to force [`INTR_STATE.sda_unstable`](#intr_state) to 1. | +| 7 | wo | 0x0 | stretch_timeout | Write 1 to force [`INTR_STATE.stretch_timeout`](#intr_state) to 1. | +| 6 | wo | 0x0 | sda_interference | Write 1 to force [`INTR_STATE.sda_interference`](#intr_state) to 1. | +| 5 | wo | 0x0 | scl_interference | Write 1 to force [`INTR_STATE.scl_interference`](#intr_state) to 1. | +| 4 | wo | 0x0 | controller_halt | Write 1 to force [`INTR_STATE.controller_halt`](#intr_state) to 1. | +| 3 | wo | 0x0 | rx_overflow | Write 1 to force [`INTR_STATE.rx_overflow`](#intr_state) to 1. | +| 2 | wo | 0x0 | acq_threshold | Write 1 to force [`INTR_STATE.acq_threshold`](#intr_state) to 1. | +| 1 | wo | 0x0 | rx_threshold | Write 1 to force [`INTR_STATE.rx_threshold`](#intr_state) to 1. | +| 0 | wo | 0x0 | fmt_threshold | Write 1 to force [`INTR_STATE.fmt_threshold`](#intr_state) to 1. | + +## ALERT_TEST +Alert Test Register +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "fatal_fault", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:-------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | fatal_fault | Write 1 to trigger one alert event of this kind. | + +## CTRL +I2C Control Register +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0x7f` + +### Fields + +```wavejson +{"reg": [{"name": "ENABLEHOST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ENABLETARGET", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "LLPBK", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "NACK_ADDR_AFTER_TIMEOUT", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ACK_CTRL_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "MULTI_CONTROLLER_MONITOR_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "TX_STRETCH_CTRL_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 25}], "config": {"lanes": 1, "fontsize": 10, "vspace": 290}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------------------------------------------| +| 31:7 | | | Reserved | +| 6 | rw | 0x0 | [TX_STRETCH_CTRL_EN](#ctrl--tx_stretch_ctrl_en) | +| 5 | rw | 0x0 | [MULTI_CONTROLLER_MONITOR_EN](#ctrl--multi_controller_monitor_en) | +| 4 | rw | 0x0 | [ACK_CTRL_EN](#ctrl--ack_ctrl_en) | +| 3 | rw | 0x0 | [NACK_ADDR_AFTER_TIMEOUT](#ctrl--nack_addr_after_timeout) | +| 2 | rw | 0x0 | [LLPBK](#ctrl--llpbk) | +| 1 | rw | 0x0 | [ENABLETARGET](#ctrl--enabletarget) | +| 0 | rw | 0x0 | [ENABLEHOST](#ctrl--enablehost) | + +### CTRL . TX_STRETCH_CTRL_EN +If set to 1, this bit causes a read transfer addressed to this target to set the corresponding bit in [`TARGET_EVENTS.`](#target_events) + +While [`TARGET_EVENTS.TX_PENDING`](#target_events) is 1, subsequent read transactions will stretch the clock, even if there is data in the TX FIFO. + +If enabled, this function allows software to confirm the data in the TX FIFO should be released for the current read. +This may be useful for cases where the TX FIFO has data that does not apply to the current transfer. +For example, the transaction could've targeted an alternate function via another address. + +### CTRL . MULTI_CONTROLLER_MONITOR_EN +Enable the bus monitor in multi-controller mode. + +If a 0->1 transition happens while [`CTRL.ENABLEHOST`](#ctrl) and [`CTRL.ENABLETARGET`](#ctrl) are both 0, the bus monitor will enable and begin in the "bus busy" state. +To transition to a bus free state, [`HOST_TIMEOUT_CTRL`](#host_timeout_ctrl) must be nonzero, so the bus monitor may count out idle cycles to confirm the freedom to transmit. +In addition, the bus monitor will track whether the bus is free based on the enabled timeouts and detected Stop symbols. +For multi-controller mode, ensure [`CTRL.MULTI_CONTROLLER_MONITOR_EN`](#ctrl) becomes 1 no later than [`CTRL.ENABLEHOST`](#ctrl) or [`CTRL.ENABLETARGET.`](#ctrl) +This bit can be set at the same time as either or both of the other two, though. + +Note that if [`CTRL.MULTI_CONTROLLER_MONITOR_EN`](#ctrl) is set after [`CTRL.ENABLEHOST`](#ctrl) or [`CTRL.ENABLETARGET`](#ctrl), the bus monitor will begin in the "bus free" state instead. +This would violate the proper protocol for a controller to join a multi-controller environment. +However, if this controller is known to be the first to join, this ordering will enable skipping the idle wait. + +When 0, the bus monitor will report that the bus is always free, so the controller FSM is never blocked from transmitting. + +### CTRL . ACK_CTRL_EN +Enable I2C Target ACK Control Mode. + +ACK Control Mode works together with [`TARGET_ACK_CTRL.NBYTES`](#target_ack_ctrl) to allow software to control upper-layer protocol (N)ACKing (e.g. as in SMBus). +This bit enables the mode when 1, and [`TARGET_ACK_CTRL.NBYTES`](#target_ack_ctrl) limits how many bytes may be automatically ACK'd while the ACQ FIFO has space. +If it is 0, the decision to ACK or NACK is made only from stretching timeouts and [`CTRL.NACK_ADDR_AFTER_TIMEOUT.`](#ctrl) + +### CTRL . NACK_ADDR_AFTER_TIMEOUT +Enable NACKing the address on a stretch timeout. + +This is a Target mode feature. +If enabled (1), a stretch timeout will cause the device to NACK the address byte. +If disabled (0), a stretch timeout will cause the device to ACK the address byte. +SMBus requires that devices always ACK their address, even for read commands. +However, non-SMBus protocols may have a different approach and can choose to NACK instead. + +Note that both cases handle data bytes the same way. +For writes, the Target module will NACK all subsequent data bytes until it receives a Stop. +For reads, the Target module will release SDA, causing 0xff to be returned for all data bytes until it receives a Stop. + +### CTRL . LLPBK +Enable I2C line loopback test +If line loopback is enabled, the internal design sees ACQ and RX data as "1" + +### CTRL . ENABLETARGET +Enable Target I2C functionality + +### CTRL . ENABLEHOST +Enable Host I2C functionality + +## STATUS +I2C Live Status Register for Host and Target modes +- Offset: `0x14` +- Reset default: `0x33c` +- Reset mask: `0x7ff` + +### Fields + +```wavejson +{"reg": [{"name": "FMTFULL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RXFULL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "FMTEMPTY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "HOSTIDLE", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "TARGETIDLE", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RXEMPTY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "TXFULL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "ACQFULL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "TXEMPTY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "ACQEMPTY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "ACK_CTRL_STRETCH", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 21}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:---------------------------------------------------------------------------------------------------------| +| 31:11 | | | | Reserved | +| 10 | ro | x | ACK_CTRL_STRETCH | Target mode stretching at (N)ACK phase due to zero count in [`TARGET_ACK_CTRL.NBYTES`](#target_ack_ctrl) | +| 9 | ro | 0x1 | ACQEMPTY | Target mode receive FIFO is empty | +| 8 | ro | 0x1 | TXEMPTY | Target mode TX FIFO is empty | +| 7 | ro | x | ACQFULL | Target mode receive FIFO is full | +| 6 | ro | x | TXFULL | Target mode TX FIFO is full | +| 5 | ro | 0x1 | RXEMPTY | Host mode RX FIFO is empty | +| 4 | ro | 0x1 | TARGETIDLE | Target functionality is idle. No Target transaction is in progress | +| 3 | ro | 0x1 | HOSTIDLE | Host functionality is idle. No Host transaction is in progress | +| 2 | ro | 0x1 | FMTEMPTY | Host mode FMT FIFO is empty | +| 1 | ro | x | RXFULL | Host mode RX FIFO is full | +| 0 | ro | x | FMTFULL | Host mode FMT FIFO is full | + +## RDATA +I2C Read Data +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "RDATA", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | x | RDATA | | + +## FDATA +I2C Host Format Data + +Writes to this register are used to define and drive Controller-Mode transactions. +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0x1fff` + +### Fields + +```wavejson +{"reg": [{"name": "FBYTE", "bits": 8, "attr": ["wo"], "rotate": 0}, {"name": "START", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "STOP", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "READB", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RCONT", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "NAKOK", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 19}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------| +| 31:13 | | | Reserved | +| 12 | wo | 0x0 | [NAKOK](#fdata--nakok) | +| 11 | wo | 0x0 | [RCONT](#fdata--rcont) | +| 10 | wo | 0x0 | [READB](#fdata--readb) | +| 9 | wo | 0x0 | [STOP](#fdata--stop) | +| 8 | wo | 0x0 | [START](#fdata--start) | +| 7:0 | wo | 0x0 | [FBYTE](#fdata--fbyte) | + +### FDATA . NAKOK +For the currrent controller-transmitter byte (WRITE), do not halt via CONTROLLER_EVENTS +or assert the 'controller_halt' interrupt if the current byte is not ACK'd. + +### FDATA . RCONT +Do not NACK the last byte read, let the read operation continue. + +### FDATA . READB +Transfer Direction Indicator. + +If unset, this write to FDATA defines a controller-transmitter operation (WRITE). +A single byte of data (FBYTE) is written to the bus. + +If set, this write to FDATA defines a controller-receiver operation (READ). +The value of FBYTE defines the number of bytes read from the bus. (256 if FBYTE==0)" +After this number of bytes are read, the final byte will be NACKed to end the transfer +unless RCONT is also set. + +### FDATA . STOP +Issue a STOP condition after transmitting FBYTE. + +### FDATA . START +Issue a START condition before transmitting FBYTE. + +### FDATA . FBYTE +Format Byte. + +If no flags are set, hardware will transmit this byte directly. + +If READB is set, this field becomes the number of bytes hardware will automatically +read from the bus. + +## FIFO_CTRL +I2C FIFO control register +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0x183` + +### Fields + +```wavejson +{"reg": [{"name": "RXRST", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "FMTRST", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 5}, {"name": "ACQRST", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "TXRST", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 23}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------| +| 31:9 | | | | Reserved | +| 8 | wo | 0x0 | TXRST | TX FIFO reset. Write 1 to the register resets it. Read returns 0 | +| 7 | wo | 0x0 | ACQRST | ACQ FIFO reset. Write 1 to the register resets it. Read returns 0 | +| 6:2 | | | | Reserved | +| 1 | wo | 0x0 | FMTRST | FMT fifo reset. Write 1 to the register resets FMT_FIFO. Read returns 0 | +| 0 | wo | 0x0 | RXRST | RX fifo reset. Write 1 to the register resets RX_FIFO. Read returns 0 | + +## HOST_FIFO_CONFIG +Host mode FIFO configuration +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0xfff0fff` + +### Fields + +```wavejson +{"reg": [{"name": "RX_THRESH", "bits": 12, "attr": ["rw"], "rotate": 0}, {"bits": 4}, {"name": "FMT_THRESH", "bits": 12, "attr": ["rw"], "rotate": 0}, {"bits": 4}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:-----------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:28 | | | | Reserved | +| 27:16 | rw | 0x0 | FMT_THRESH | Threshold level for FMT interrupts. Whilst the number of used entries in the FMT FIFO is below this setting, the fmt_threshold interrupt will be asserted. | +| 15:12 | | | | Reserved | +| 11:0 | rw | 0x0 | RX_THRESH | Threshold level for RX interrupts. Whilst the level of data in the RX FIFO is above this setting, the rx_threshold interrupt will be asserted. | + +## TARGET_FIFO_CONFIG +Target mode FIFO configuration +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0xfff0fff` + +### Fields + +```wavejson +{"reg": [{"name": "TX_THRESH", "bits": 12, "attr": ["rw"], "rotate": 0}, {"bits": 4}, {"name": "ACQ_THRESH", "bits": 12, "attr": ["rw"], "rotate": 0}, {"bits": 4}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:28 | | | | Reserved | +| 27:16 | rw | 0x0 | ACQ_THRESH | Threshold level for ACQ interrupts. Whilst the level of data in the ACQ FIFO is above this setting, the acq_threshold interrupt will be asserted. | +| 15:12 | | | | Reserved | +| 11:0 | rw | 0x0 | TX_THRESH | Threshold level for TX interrupts. Whilst the number of used entries in the TX FIFO is below this setting, the tx_threshold interrupt will be asserted. | + +## HOST_FIFO_STATUS +Host mode FIFO status register +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0xfff0fff` + +### Fields + +```wavejson +{"reg": [{"name": "FMTLVL", "bits": 12, "attr": ["ro"], "rotate": 0}, {"bits": 4}, {"name": "RXLVL", "bits": 12, "attr": ["ro"], "rotate": 0}, {"bits": 4}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------| +| 31:28 | | | | Reserved | +| 27:16 | ro | x | RXLVL | Current fill level of RX fifo | +| 15:12 | | | | Reserved | +| 11:0 | ro | x | FMTLVL | Current fill level of FMT fifo | + +## TARGET_FIFO_STATUS +Target mode FIFO status register +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0xfff0fff` + +### Fields + +```wavejson +{"reg": [{"name": "TXLVL", "bits": 12, "attr": ["ro"], "rotate": 0}, {"bits": 4}, {"name": "ACQLVL", "bits": 12, "attr": ["ro"], "rotate": 0}, {"bits": 4}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------| +| 31:28 | | | | Reserved | +| 27:16 | ro | x | ACQLVL | Current fill level of ACQ fifo | +| 15:12 | | | | Reserved | +| 11:0 | ro | x | TXLVL | Current fill level of TX fifo | + +## OVRD +I2C Override Control Register +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "TXOVRDEN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "SCLVAL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "SDAVAL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 100}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------------------------------------------------------------------| +| 31:3 | | | | Reserved | +| 2 | rw | 0x0 | SDAVAL | Value for SDA Override. Set to 0 to drive TX Low, and set to 1 for high-Z | +| 1 | rw | 0x0 | SCLVAL | Value for SCL Override. Set to 0 to drive TX Low, and set to 1 for high-Z | +| 0 | rw | 0x0 | TXOVRDEN | Override the SDA and SCL TX signals. | + +## VAL +Oversampled RX values +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SCL_RX", "bits": 16, "attr": ["ro"], "rotate": 0}, {"name": "SDA_RX", "bits": 16, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------| +| 31:16 | ro | x | SDA_RX | Last 16 oversampled values of SDA. Most recent bit is bit 16, oldest 31. | +| 15:0 | ro | x | SCL_RX | Last 16 oversampled values of SCL. Most recent bit is bit 0, oldest 15. | + +## TIMING0 +Detailed I2C Timings (directly corresponding to table 10 in the I2C Specification). +All values are expressed in units of the input clock period. +These must be greater than 2 in order for the change in SCL to propagate to the input of the FSM so that acknowledgements are detected correctly. +- Offset: `0x3c` +- Reset default: `0x0` +- Reset mask: `0x1fff1fff` + +### Fields + +```wavejson +{"reg": [{"name": "THIGH", "bits": 13, "attr": ["rw"], "rotate": 0}, {"bits": 3}, {"name": "TLOW", "bits": 13, "attr": ["rw"], "rotate": 0}, {"bits": 3}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:29 | | | | Reserved | +| 28:16 | rw | 0x0 | TLOW | The actual time to hold SCL low between any two SCL pulses. This field is sized to have a range of at least Standard Mode's 4.7 us max with a core clock at 1 GHz. | +| 15:13 | | | | Reserved | +| 12:0 | rw | 0x0 | THIGH | The actual time to hold SCL high in a given pulse. This field is sized to have a range of at least Standard Mode's 4.0 us max with a core clock at 1 GHz. | + +## TIMING1 +Detailed I2C Timings (directly corresponding to table 10 in the I2C Specification). +All values are expressed in units of the input clock period. +- Offset: `0x40` +- Reset default: `0x0` +- Reset mask: `0x1ff03ff` + +### Fields + +```wavejson +{"reg": [{"name": "T_R", "bits": 10, "attr": ["rw"], "rotate": 0}, {"bits": 6}, {"name": "T_F", "bits": 9, "attr": ["rw"], "rotate": 0}, {"bits": 7}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:25 | | | | Reserved | +| 24:16 | rw | 0x0 | T_F | The nominal fall time to anticipate for the bus (influences SDA hold times). This field is sized to have a range of at least Standard Mode's 300 ns max with a core clock at 1 GHz. | +| 15:10 | | | | Reserved | +| 9:0 | rw | 0x0 | T_R | The nominal rise time to anticipate for the bus (depends on capacitance). This field is sized to have a range of at least Standard Mode's 1000 ns max with a core clock at 1 GHz. | + +## TIMING2 +Detailed I2C Timings (directly corresponding to table 10 in the I2C Specification). +All values are expressed in units of the input clock period. +- Offset: `0x44` +- Reset default: `0x0` +- Reset mask: `0x1fff1fff` + +### Fields + +```wavejson +{"reg": [{"name": "TSU_STA", "bits": 13, "attr": ["rw"], "rotate": 0}, {"bits": 3}, {"name": "THD_STA", "bits": 13, "attr": ["rw"], "rotate": 0}, {"bits": 3}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:-----------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:29 | | | | Reserved | +| 28:16 | rw | 0x0 | THD_STA | Actual hold time for start signals. This field is sized to have a range of at least Standard Mode's 4.0 us max with a core clock at 1 GHz. | +| 15:13 | | | | Reserved | +| 12:0 | rw | 0x0 | TSU_STA | Actual setup time for repeated start signals. This field is sized to have a range of at least Standard Mode's 4.7 us max with a core clock at 1 GHz. | + +## TIMING3 +Detailed I2C Timings (directly corresponding to table 10, in the I2C Specification). +All values are expressed in units of the input clock period. +- Offset: `0x48` +- Reset default: `0x0` +- Reset mask: `0x1fff01ff` + +### Fields + +```wavejson +{"reg": [{"name": "TSU_DAT", "bits": 9, "attr": ["rw"], "rotate": 0}, {"bits": 7}, {"name": "THD_DAT", "bits": 13, "attr": ["rw"], "rotate": 0}, {"bits": 3}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------| +| 31:29 | | | Reserved | +| 28:16 | rw | 0x0 | [THD_DAT](#timing3--thd_dat) | +| 15:9 | | | Reserved | +| 8:0 | rw | 0x0 | [TSU_DAT](#timing3--tsu_dat) | + +### TIMING3 . THD_DAT +Actual hold time for data (or ack) bits. +(Note, where required, the parameters TVD_DAT is taken to be THD_DAT+T_F) +This field is sized to have a range that accommodates Standard Mode's 3.45 us max for TVD_DAT with a core clock at 1 GHz. +However, this field is generally expected to represent a time substantially shorter than that. +It should be long enough to cover the maximum round-trip latency from output pins, through pads and voltage transitions on the board, and back to the input pins, but it should not be substantially greater. + +### TIMING3 . TSU_DAT +Actual setup time for data (or ack) bits. +This field is sized to have a range of at least Standard Mode's 250 ns max with a core clock at 1 GHz. + +## TIMING4 +Detailed I2C Timings (directly corresponding to table 10, in the I2C Specification). +All values are expressed in units of the input clock period. +- Offset: `0x4c` +- Reset default: `0x0` +- Reset mask: `0x1fff1fff` + +### Fields + +```wavejson +{"reg": [{"name": "TSU_STO", "bits": 13, "attr": ["rw"], "rotate": 0}, {"bits": 3}, {"name": "T_BUF", "bits": 13, "attr": ["rw"], "rotate": 0}, {"bits": 3}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:29 | | | | Reserved | +| 28:16 | rw | 0x0 | T_BUF | Actual time between each STOP signal and the following START signal. This field is sized to have a range of at least Standard Mode's 4.7 us max with a core clock at 1 GHz. | +| 15:13 | | | | Reserved | +| 12:0 | rw | 0x0 | TSU_STO | Actual setup time for stop signals. This field is sized to have a range of at least Standard Mode's 4.0 us max with a core clock at 1 GHz. | + +## TIMEOUT_CTRL +I2C clock stretching and bus timeout control. + +This timeout must be enabled by setting [`TIMEOUT_CTRL.EN`](#timeout_ctrl) to 1, and the behavior of this feature depends on the value of [`TIMEOUT_CTRL.MODE.`](#timeout_ctrl) + +If the mode is "STRETCH_TIMEOUT", this is used in I2C controller mode to detect whether a connected target is stretching a single low time beyond the timeout value. +Configured as such, this timeout is more informative and doesn't do more than assert the "stretch_timeout" interrupt. + +If the mode is "BUS_TIMEOUT", it is used to detect whether the clock has been held low for too long instead, inclusive of the controller's clock low time. +This is useful for an SMBus context, where the VAL programmed should be tTIMEOUT:MIN. +- Offset: `0x50` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VAL", "bits": 30, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "EN", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:----------------------------| +| 31 | rw | 0x0 | [EN](#timeout_ctrl--en) | +| 30 | rw | 0x0 | [MODE](#timeout_ctrl--mode) | +| 29:0 | rw | 0x0 | [VAL](#timeout_ctrl--val) | + +### TIMEOUT_CTRL . EN +Enable stretch timeout or bus timeout feature + +### TIMEOUT_CTRL . MODE +Selects the timeout mode, between a stretch timeout and a bus timeout. + +Between the two modes, the primary difference is how much of the clock low period is counted. +For a stretch timeout, only the time that another device holds the clock low will be counted. +For a bus timeout, the entire clock low time is counted, consistent with the SMBus tTIMEOUT type. + +[`TIMEOUT_CTRL.EN`](#timeout_ctrl) must be 1 for either of these features to be enabled. + +| Value | Name | Description | +|:--------|:----------------|:-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 0x0 | STRETCH_TIMEOUT | The timeout is a target stretch timeout. The counter will track how long the clock has been stretched by another device while the controller is active. | +| 0x1 | BUS_TIMEOUT | The timeout is a clock low timeout. The counter will track how long the clock low period is, inclusive of the controller's ordinary low count. A timeout will set !!CONTROLLER_EVENTS.BUS_TIMEOUT and cause a "controller_halt" interrupt. | + + +### TIMEOUT_CTRL . VAL +Clock stretching timeout value (in units of input clock frequency) + +## TARGET_ID +I2C target address and mask pairs +- Offset: `0x54` +- Reset default: `0x0` +- Reset mask: `0xfffffff` + +### Fields + +```wavejson +{"reg": [{"name": "ADDRESS0", "bits": 7, "attr": ["rw"], "rotate": 0}, {"name": "MASK0", "bits": 7, "attr": ["rw"], "rotate": 0}, {"name": "ADDRESS1", "bits": 7, "attr": ["rw"], "rotate": 0}, {"name": "MASK1", "bits": 7, "attr": ["rw"], "rotate": 0}, {"bits": 4}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:----------------------------------------------------------------------------------------------| +| 31:28 | | | | Reserved | +| 27:21 | rw | 0x0 | MASK1 | I2C target mask number 1. At least one bit in MASK1 must be set to 1 for ADDRESS1 to be used. | +| 20:14 | rw | 0x0 | ADDRESS1 | I2C target address number 1 | +| 13:7 | rw | 0x0 | MASK0 | I2C target mask number 0. At least one bit in MASK0 must be set to 1 for ADDRESS0 to be used. | +| 6:0 | rw | 0x0 | ADDRESS0 | I2C target address number 0 | + +## ACQDATA +I2C target acquired data +- Offset: `0x58` +- Reset default: `0x0` +- Reset mask: `0x7ff` + +### Fields + +```wavejson +{"reg": [{"name": "ABYTE", "bits": 8, "attr": ["ro"], "rotate": 0}, {"name": "SIGNAL", "bits": 3, "attr": ["ro"], "rotate": -90}, {"bits": 21}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:---------------------------| +| 31:11 | | | Reserved | +| 10:8 | ro | x | [SIGNAL](#acqdata--signal) | +| 7:0 | ro | x | [ABYTE](#acqdata--abyte) | + +### ACQDATA . SIGNAL +Indicates any control symbols associated with the ABYTE. + +For the STOP symbol, a stretch timeout or other unexpected events will cause a NACK_STOP to appear in the ACQ FIFO. +If the ACQ FIFO doesn't have enough space to record a START and a STOP, the transaction will be dropped entirely on a stretch timeout. +In that case, the START byte will not appear (neither as START nor NACK_START), but a standalone NACK_STOP may, if there was space. +Software can discard any standalone NACK_STOP that appears. + +See the associated values for more information about the contents. + +| Value | Name | Description | +|:--------|:-----------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 0x0 | NONE | ABYTE contains an ordinary data byte that was received and ACK'd. | +| 0x1 | START | A START condition preceded the ABYTE to start a new transaction. ABYTE contains the 7-bit I2C address plus R/W command bit in the order received on the bus, MSB first. | +| 0x2 | STOP | A STOP condition was received for a transaction including a transfer that addressed this Target. No transfers addressing this Target in that transaction were NACK'd. ABYTE contains no data. | +| 0x3 | RESTART | A repeated START condition preceded the ABYTE, extending the current transaction with a new transfer. ABYTE contains the 7-bit I2C address plus R/W command bit in the order received on the bus, MSB first. | +| 0x4 | NACK | ABYTE contains an ordinary data byte that was received and NACK'd. | +| 0x5 | NACK_START | A START condition preceded the ABYTE (including repeated START) that was part of a NACK'd transfer. The ABYTE contains the matching I2C address and command bit. The ABYTE was ACK'd, but the rest of the transaction was NACK'ed. | +| 0x6 | NACK_STOP | A transaction including a transfer that addressed this Target was ended, but the transaction ended abnormally and/or the transfer was NACK'd. The end can be due to a STOP condition or unexpected events, such as a bus timeout (if enabled). ABYTE contains no data. NACKing can occur for multiple reasons, including a stretch timeout, a SW-directed NACK, or lost arbitration. This signal is a bucket for all these error-type terminations. | + +Other values are reserved. + +### ACQDATA . ABYTE +Address for accepted transaction or acquired byte + +## TXDATA +I2C target transmit data +- Offset: `0x5c` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "TXDATA", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | TXDATA | | + +## HOST_TIMEOUT_CTRL +I2C host clock generation timeout value (in units of input clock frequency). + +In an active transaction in Target-Mode, if the Controller ceases to send SCL pulses +for this number of cycles then the "host_timeout" interrupt will be asserted. + +In multi-controller monitoring mode, [`HOST_TIMEOUT_CTRL`](#host_timeout_ctrl) is required to be nonzero to transition out of the initial busy state. +Set this CSR to 0 to disable this behaviour. +- Offset: `0x60` +- Reset default: `0x0` +- Reset mask: `0xfffff` + +### Fields + +```wavejson +{"reg": [{"name": "HOST_TIMEOUT_CTRL", "bits": 20, "attr": ["rw"], "rotate": 0}, {"bits": 12}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:20 | | | | Reserved | +| 19:0 | rw | 0x0 | HOST_TIMEOUT_CTRL | | + +## TARGET_TIMEOUT_CTRL +I2C target internal stretching timeout control. +When the target has stretched beyond this time it will send a NACK for incoming data bytes or release SDA for outgoing data bytes. +The behavior for the address byte is configurable via [`CTRL.ACK_ADDR_AFTER_TIMEOUT.`](#ctrl) +Note that the count accumulates stretching time over the course of a transaction. +In other words, this is equivalent to the SMBus cumulative target clock extension time. +- Offset: `0x64` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VAL", "bits": 31, "attr": ["rw"], "rotate": 0}, {"name": "EN", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------| +| 31 | rw | 0x0 | EN | Enable timeout feature and send NACK once the timeout has been reached | +| 30:0 | rw | 0x0 | VAL | Clock stretching timeout value (in units of input clock frequency) | + +## TARGET_NACK_COUNT +Number of times the I2C target has NACK'ed a new transaction since the last read of this register. +Reading this register clears it. +This is useful because when the ACQ FIFO is full the software know that a NACK has occurred, but without this register would not know how many transactions it missed. +When it reaches its maximum value it will stay at that value. +- Offset: `0x68` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "TARGET_NACK_COUNT", "bits": 8, "attr": ["rc"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:8 | | | | Reserved | +| 7:0 | rc | 0x0 | TARGET_NACK_COUNT | | + +## TARGET_ACK_CTRL +Controls for mid-transfer (N)ACK phase handling +- Offset: `0x6c` +- Reset default: `0x0` +- Reset mask: `0x800001ff` + +### Fields + +```wavejson +{"reg": [{"name": "NBYTES", "bits": 9, "attr": ["rw"], "rotate": 0}, {"bits": 22}, {"name": "NACK", "bits": 1, "attr": ["wo"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------------| +| 31 | wo | x | [NACK](#target_ack_ctrl--nack) | +| 30:9 | | | Reserved | +| 8:0 | rw | x | [NBYTES](#target_ack_ctrl--nbytes) | + +### TARGET_ACK_CTRL . NACK +When the Target module stretches on the (N)ACK phase of a Write due to [`TARGET_ACK_CTRL.NBYTES`](#target_ack_ctrl) being 0, writing a 1 here will cause it to send a NACK. + +If software chooses to NACK, note that the NACKing behavior is the same as if a stretch timeout occurred. +The rest of the transaction will be NACK'd, including subsequent transfers. +For the address byte, the (N)ACK phase of subsequent transfers will follow the behavior specified by [`CTRL.NACK_ADDR_AFTER_TIMEOUT.`](#ctrl) + +Automatically clears to 0. + +### TARGET_ACK_CTRL . NBYTES +Remaining number of bytes the Target module may ACK automatically. + +If [`CTRL.ACK_CTRL_EN`](#ctrl) is set to 1, the Target module will stretch the clock at the (N)ACK phase of a byte if this CSR is 0, awaiting software's instructions. + +At the beginning of each Write transfer, this byte count is reset to 0. +Writes to this CSR also are only accepted while the Target module is stretching the clock. +The Target module will always ACK its address if the ACQ FIFO has space. +For data bytes afterwards, it will stop at the (N)ACK phase and stretch the clock when this CSR is 0. +For each data byte that is ACK'd in a transaction, the byte count will decrease by 1. + +Note that a full ACQ FIFO can still cause the Target module to halt at the beginning of a new byte. +The ACK Control Mode provides an additional synchronization point, during the (N)ACK phase instead of after. +For both cases, [`TARGET_TIMEOUT_CTRL`](#target_timeout_ctrl) applies, and stretching past the timeout will produce an automatic NACK. + +This mode can be used to implement the mid-transfer (N)ACK responses required by various SMBus protocols. + +## ACQ_FIFO_NEXT_DATA +The data byte pending to be written to the ACQ FIFO. + +This CSR is only valid while the Target module is stretching in the (N)ACK phase, indicated by [`STATUS.ACK_CTRL_STRETCH`](#status) . +It is intended to be used with ACK Control Mode, so software may check the current byte. +- Offset: `0x70` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "ACQ_FIFO_NEXT_DATA", "bits": 8, "attr": ["ro"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 200}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------|:--------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | x | ACQ_FIFO_NEXT_DATA | | + +## HOST_NACK_HANDLER_TIMEOUT +Timeout in Host-Mode for an unhandled NACK before hardware automatically ends the transaction. +(in units of input clock frequency) + +If an active Controller-Transmitter transfer receives a NACK from the Target, the [`CONTROLLER_EVENTS.NACK`](#controller_events) bit is set. +In turn, this causes the Controller FSM to halt awaiting software intervention, and the 'controller_halt' interrupt may assert. +Software must clear the [`CONTROLLER_EVENTS.NACK`](#controller_events) bit to allow the state machine to continue, typically after clearing out the FMTFIFO to start a new transfer. +While halted, the active transaction is not ended (no STOP (P) condition is created), and the block asserts SCL and leaves SDA released. + +This timeout can be used to automatically produce a STOP condition, whether as a backstop for slow software responses (longer timeout) or as a convenience (short timeout). +If the timeout expires, the Controller FSM will issue a STOP (P) condition on the bus to end the active transaction. +Additionally, the [`CONTROLLER_EVENTS.UNHANDLED_NACK_TIMEOUT`](#controller_events) bit is set to alert software, and the FSM will return to the idle state and halt until the bit is cleared. + +The enable bit must be set for this feature to operate. +- Offset: `0x74` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VAL", "bits": 31, "attr": ["rw"], "rotate": 0}, {"name": "EN", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------| +| 31 | rw | 0x0 | EN | Timeout enable | +| 30:0 | rw | 0x0 | VAL | Unhandled NAK timeout value (in units of input clock frequency) | + +## CONTROLLER_EVENTS +Latched events that explain why the controller halted. + +Any bits that are set must be written (with a 1) to clear the CONTROLLER_HALT interrupt. +- Offset: `0x78` +- Reset default: `0x0` +- Reset mask: `0xf` + +### Fields + +```wavejson +{"reg": [{"name": "NACK", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "UNHANDLED_NACK_TIMEOUT", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "BUS_TIMEOUT", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "ARBITRATION_LOST", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"bits": 28}], "config": {"lanes": 1, "fontsize": 10, "vspace": 240}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------|:--------------------------------------------------------------------------------------------------------------------------| +| 31:4 | | | | Reserved | +| 3 | rw1c | 0x0 | ARBITRATION_LOST | A Host-Mode active transaction has terminated due to lost arbitration. | +| 2 | rw1c | 0x0 | BUS_TIMEOUT | A Host-Mode active transaction has terminated due to a bus timeout activated by [`TIMEOUT_CTRL.`](#timeout_ctrl) | +| 1 | rw1c | 0x0 | UNHANDLED_NACK_TIMEOUT | A Host-Mode active transaction has been ended by the [`HOST_NACK_HANDLER_TIMEOUT`](#host_nack_handler_timeout) mechanism. | +| 0 | rw1c | 0x0 | NACK | Received an unexpected NACK | + +## TARGET_EVENTS +Latched events that can cause the target module to stretch the clock at the beginning of a read transfer. + +These events cause TX FIFO-related stretching even when the TX FIFO has data available. +Any bits that are set must be written (with a 1) to clear the tx_stretch interrupt. + +This CSR serves as a gate to prevent the Target module from responding to a read command with unrelated, leftover data. +- Offset: `0x7c` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "TX_PENDING", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "BUS_TIMEOUT", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "ARBITRATION_LOST", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------------------------------| +| 31:3 | | | Reserved | +| 2 | rw1c | 0x0 | [ARBITRATION_LOST](#target_events--arbitration_lost) | +| 1 | rw1c | 0x0 | [BUS_TIMEOUT](#target_events--bus_timeout) | +| 0 | rw1c | 0x0 | [TX_PENDING](#target_events--tx_pending) | + +### TARGET_EVENTS . ARBITRATION_LOST +A Target-Mode read transfer has terminated due to lost arbitration. + +### TARGET_EVENTS . BUS_TIMEOUT +A Target-Mode read transfer has terminated due to a bus timeout activated by [`TIMEOUT_CTRL.`](#timeout_ctrl) + +### TARGET_EVENTS . TX_PENDING +A new Target-Mode read transfer has arrived that addressed this target. + +This bit is used by software to confirm the release of the contents in the TX FIFO. +If the contents do not apply, software should first reset the TX FIFO, then load it with the correct data, then clear this bit. + +Optionally enabled by [`CTRL.TX_STRETCH_CTRL_EN.`](#ctrl) + + + + + +## irq_router + + + +### registers.md + +## Summary + +| Name | Offset | Length | Description | +|:-------------------------------------------------|:---------|---------:|:------------------------------------------| +| irq_router.[`IRQ_TARGET_MASK`](#irq_target_mask) | 0x0 | 4 | Target selection bitmask control register | + +## IRQ_TARGET_MASK +Target selection bitmask control register +- Offset: `0x0` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "mask", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------------------------------------------------------------| +| 31:0 | rw | 0x1 | mask | Target selection bitmask control register for single interrupt line. Reflects interrupt line logic level. | + + + + + +## l2_ecc_config + + + +### registers.md + +## Summary + +| Name | Offset | Length | Description | +|:----------------------------------------------------------------------|:---------|---------:|:------------------------------------------------| +| ECC_manager.[`mismatch_count`](#mismatch_count) | 0x0 | 4 | Correctable mismatches caught by ecc on access | +| ECC_manager.[`scrub_interval`](#scrub_interval) | 0x4 | 4 | Interval between scrubs | +| ECC_manager.[`scrub_fix_count`](#scrub_fix_count) | 0x8 | 4 | Correctable mismatches caught by ecc on scrub | +| ECC_manager.[`scrub_uncorrectable_count`](#scrub_uncorrectable_count) | 0xc | 4 | Uncorrectable mismatches caught by ecc on scrub | +| ECC_manager.[`write_mask_data_n`](#write_mask_data_n) | 0x10 | 4 | Testing: Inverted write mask for data bits | +| ECC_manager.[`write_mask_ecc_n`](#write_mask_ecc_n) | 0x14 | 4 | Testing: Inverted write mask for ECC bits | + +## mismatch_count +Correctable mismatches caught by ecc on access +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "correctable_mismatches", "bits": 32, "attr": ["rw0c"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------|:-----------------------------------------------| +| 31:0 | rw0c | 0x0 | correctable_mismatches | Correctable mismatches caught by ecc on access | + +## scrub_interval +Interval between scrubs +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "scrub_interval", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:------------------------| +| 31:0 | rw | 0x0 | scrub_interval | Interval between scrubs | + +## scrub_fix_count +Correctable mismatches caught by ecc on scrub +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "correctable_mismatches", "bits": 32, "attr": ["rw0c"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------|:----------------------------------------------| +| 31:0 | rw0c | 0x0 | correctable_mismatches | Correctable mismatches caught by ecc on scrub | + +## scrub_uncorrectable_count +Uncorrectable mismatches caught by ecc on scrub +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "uncorrectable_mismatches", "bits": 32, "attr": ["rw0c"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------------|:------------------------------------------------| +| 31:0 | rw0c | 0x0 | uncorrectable_mismatches | Uncorrectable mismatches caught by ecc on scrub | + +## write_mask_data_n +Testing: Inverted write mask for data bits +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "write_mask_data_n", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:-------------------------------------------| +| 31:0 | rw | 0x0 | write_mask_data_n | Testing: Inverted write mask for data bits | + +## write_mask_ecc_n +Testing: Inverted write mask for ECC bits +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0x7f` + +### Fields + +```wavejson +{"reg": [{"name": "write_mask_ecc_n", "bits": 7, "attr": ["rw"], "rotate": -90}, {"bits": 25}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:------------------------------------------| +| 31:7 | | | | Reserved | +| 6:0 | rw | 0x0 | write_mask_ecc_n | Testing: Inverted write mask for ECC bits | + + + + + +## mailbox + + + +### registers.md + +## Summary + +| Name | Offset | Length | Description | +|:----------------------------------------|:---------|---------:|:--------------------------------------------| +| mailbox.[`IRQ_SND_STAT`](#irq_snd_stat) | 0x0 | 4 | Sender interrupt status register | +| mailbox.[`IRQ_SND_SET`](#irq_snd_set) | 0x4 | 4 | Sender interrupt set register | +| mailbox.[`IRQ_SND_CLR`](#irq_snd_clr) | 0x8 | 4 | Sender interrupt clear register | +| mailbox.[`IRQ_SND_EN`](#irq_snd_en) | 0xc | 4 | Sender interrupt enable register | +| mailbox.[`IRQ_RCV_STAT`](#irq_rcv_stat) | 0x40 | 4 | Receiver interrupt status register | +| mailbox.[`IRQ_RCV_SET`](#irq_rcv_set) | 0x44 | 4 | Receiver interrupt set register | +| mailbox.[`IRQ_RCV_CLR`](#irq_rcv_clr) | 0x48 | 4 | Receiver interrupt clear register | +| mailbox.[`IRQ_RCV_EN`](#irq_rcv_en) | 0x4c | 4 | Receiver interrupt enable register | +| mailbox.[`LETTER0`](#letter0) | 0x80 | 4 | Memory region 0 to put a message or pointer | +| mailbox.[`LETTER1`](#letter1) | 0x84 | 4 | Memory region 1 to put a message or pointer | + +## IRQ_SND_STAT +Sender interrupt status register +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "stat", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "reserved", "bits": 31, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:---------------------------------------------------------------------------------------------| +| 31:1 | ro | x | reserved | reserved | +| 0 | ro | x | stat | Sender side interrupt status. Receiver confirms letter. Reflects interrupt line logic level. | + +## IRQ_SND_SET +Sender interrupt set register +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "set", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "reserved", "bits": 31, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:-----------------------------------------------------| +| 31:1 | ro | x | reserved | reserved | +| 0 | wo | x | set | Sender side interrupt set. Receiver confirms letter. | + +## IRQ_SND_CLR +Sender interrupt clear register +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "clr", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "reserved", "bits": 31, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:-------------------------------------------------------| +| 31:1 | ro | x | reserved | reserved | +| 0 | wo | x | clr | Sender side interrupt clear. Receiver confirms letter. | + +## IRQ_SND_EN +Sender interrupt enable register +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "en", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "reserved", "bits": 31, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------------------------------------------------| +| 31:1 | ro | 0x0 | reserved | reserved | +| 0 | rw | 0x0 | en | Sender side interrupt enable. Receiver confirms letter. | + +## IRQ_RCV_STAT +Receiver interrupt status register +- Offset: `0x40` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "stat", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "reserved", "bits": 31, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:------------------------------------------------------------------------------------------------------------------------| +| 31:1 | ro | x | reserved | reserved | +| 0 | ro | x | stat | Receiver side interrupt status. Sender notifies receiver of a new letter arriving. Reflects interrupt line logic level. | + +## IRQ_RCV_SET +Receiver interrupt set register +- Offset: `0x44` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "set", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "reserved", "bits": 31, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------------------------------------------------------------------------| +| 31:1 | ro | x | reserved | reserved | +| 0 | wo | x | set | Receiver side interrupt set. Sender notifies receiver of a new letter arriving. | + +## IRQ_RCV_CLR +Receiver interrupt clear register +- Offset: `0x48` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "clr", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "reserved", "bits": 31, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:----------------------------------------------------------------------------------| +| 31:1 | ro | x | reserved | reserved | +| 0 | wo | x | clr | Receiver side interrupt clear. Sender notifies receiver of a new letter arriving. | + +## IRQ_RCV_EN +Receiver interrupt enable register +- Offset: `0x4c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "en", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "reserved", "bits": 31, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:-----------------------------------------------------------------------------------| +| 31:1 | ro | 0x0 | reserved | reserved | +| 0 | rw | 0x0 | en | Receiver side interrupt enable. Sender notifies receiver of a new letter arriving. | + +## LETTER0 +Memory region 0 to put a message or pointer +- Offset: `0x80` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "LETTER0", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------| +| 31:0 | rw | 0x0 | LETTER0 | | + +## LETTER1 +Memory region 1 to put a message or pointer +- Offset: `0x84` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "LETTER1", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------| +| 31:0 | rw | 0x0 | LETTER1 | | + + + + + +## plic + + + +### registers.md + +## Summary + +| Name | Offset | Length | Description | +|:------------------------------------|:----------|---------:|:-------------------------------------------------------------------| +| rv_plic.[`PRIO0`](#prio0) | 0x0 | 4 | Interrupt Source 0 Priority | +| rv_plic.[`PRIO1`](#prio1) | 0x4 | 4 | Interrupt Source 1 Priority | +| rv_plic.[`PRIO2`](#prio2) | 0x8 | 4 | Interrupt Source 2 Priority | +| rv_plic.[`PRIO3`](#prio3) | 0xc | 4 | Interrupt Source 3 Priority | +| rv_plic.[`PRIO4`](#prio4) | 0x10 | 4 | Interrupt Source 4 Priority | +| rv_plic.[`PRIO5`](#prio5) | 0x14 | 4 | Interrupt Source 5 Priority | +| rv_plic.[`PRIO6`](#prio6) | 0x18 | 4 | Interrupt Source 6 Priority | +| rv_plic.[`PRIO7`](#prio7) | 0x1c | 4 | Interrupt Source 7 Priority | +| rv_plic.[`PRIO8`](#prio8) | 0x20 | 4 | Interrupt Source 8 Priority | +| rv_plic.[`PRIO9`](#prio9) | 0x24 | 4 | Interrupt Source 9 Priority | +| rv_plic.[`PRIO10`](#prio10) | 0x28 | 4 | Interrupt Source 10 Priority | +| rv_plic.[`PRIO11`](#prio11) | 0x2c | 4 | Interrupt Source 11 Priority | +| rv_plic.[`PRIO12`](#prio12) | 0x30 | 4 | Interrupt Source 12 Priority | +| rv_plic.[`PRIO13`](#prio13) | 0x34 | 4 | Interrupt Source 13 Priority | +| rv_plic.[`PRIO14`](#prio14) | 0x38 | 4 | Interrupt Source 14 Priority | +| rv_plic.[`PRIO15`](#prio15) | 0x3c | 4 | Interrupt Source 15 Priority | +| rv_plic.[`PRIO16`](#prio16) | 0x40 | 4 | Interrupt Source 16 Priority | +| rv_plic.[`PRIO17`](#prio17) | 0x44 | 4 | Interrupt Source 17 Priority | +| rv_plic.[`PRIO18`](#prio18) | 0x48 | 4 | Interrupt Source 18 Priority | +| rv_plic.[`PRIO19`](#prio19) | 0x4c | 4 | Interrupt Source 19 Priority | +| rv_plic.[`PRIO20`](#prio20) | 0x50 | 4 | Interrupt Source 20 Priority | +| rv_plic.[`PRIO21`](#prio21) | 0x54 | 4 | Interrupt Source 21 Priority | +| rv_plic.[`PRIO22`](#prio22) | 0x58 | 4 | Interrupt Source 22 Priority | +| rv_plic.[`PRIO23`](#prio23) | 0x5c | 4 | Interrupt Source 23 Priority | +| rv_plic.[`PRIO24`](#prio24) | 0x60 | 4 | Interrupt Source 24 Priority | +| rv_plic.[`PRIO25`](#prio25) | 0x64 | 4 | Interrupt Source 25 Priority | +| rv_plic.[`PRIO26`](#prio26) | 0x68 | 4 | Interrupt Source 26 Priority | +| rv_plic.[`PRIO27`](#prio27) | 0x6c | 4 | Interrupt Source 27 Priority | +| rv_plic.[`PRIO28`](#prio28) | 0x70 | 4 | Interrupt Source 28 Priority | +| rv_plic.[`PRIO29`](#prio29) | 0x74 | 4 | Interrupt Source 29 Priority | +| rv_plic.[`PRIO30`](#prio30) | 0x78 | 4 | Interrupt Source 30 Priority | +| rv_plic.[`PRIO31`](#prio31) | 0x7c | 4 | Interrupt Source 31 Priority | +| rv_plic.[`IP`](#IP) | 0x1000 | 4 | Interrupt Pending | +| rv_plic.[`IE0`](#IE0) | 0x2000 | 4 | Interrupt Enable for Target 0 | +| rv_plic.[`THRESHOLD0`](#threshold0) | 0x200000 | 4 | Threshold of priority for Target 0 | +| rv_plic.[`CC0`](#cc0) | 0x200004 | 4 | Claim interrupt by read, complete interrupt by write for Target 0. | +| rv_plic.[`MSIP0`](#msip0) | 0x4000000 | 4 | msip for Hart 0. | +| rv_plic.[`ALERT_TEST`](#alert_test) | 0x4004000 | 4 | Alert Test Register. | + +## PRIO0 +Interrupt Source 0 Priority +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO0", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO0 | | + +## PRIO1 +Interrupt Source 1 Priority +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO1", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO1 | | + +## PRIO2 +Interrupt Source 2 Priority +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO2", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO2 | | + +## PRIO3 +Interrupt Source 3 Priority +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO3", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO3 | | + +## PRIO4 +Interrupt Source 4 Priority +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO4", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO4 | | + +## PRIO5 +Interrupt Source 5 Priority +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO5", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO5 | | + +## PRIO6 +Interrupt Source 6 Priority +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO6", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO6 | | + +## PRIO7 +Interrupt Source 7 Priority +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO7", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO7 | | + +## PRIO8 +Interrupt Source 8 Priority +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO8", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO8 | | + +## PRIO9 +Interrupt Source 9 Priority +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO9", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO9 | | + +## PRIO10 +Interrupt Source 10 Priority +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO10", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO10 | | + +## PRIO11 +Interrupt Source 11 Priority +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO11", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO11 | | + +## PRIO12 +Interrupt Source 12 Priority +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO12", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO12 | | + +## PRIO13 +Interrupt Source 13 Priority +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO13", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO13 | | + +## PRIO14 +Interrupt Source 14 Priority +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO14", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO14 | | + +## PRIO15 +Interrupt Source 15 Priority +- Offset: `0x3c` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO15", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO15 | | + +## PRIO16 +Interrupt Source 16 Priority +- Offset: `0x40` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO16", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO16 | | + +## PRIO17 +Interrupt Source 17 Priority +- Offset: `0x44` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO17", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO17 | | + +## PRIO18 +Interrupt Source 18 Priority +- Offset: `0x48` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO18", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO18 | | + +## PRIO19 +Interrupt Source 19 Priority +- Offset: `0x4c` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO19", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO19 | | + +## PRIO20 +Interrupt Source 20 Priority +- Offset: `0x50` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO20", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO20 | | + +## PRIO21 +Interrupt Source 21 Priority +- Offset: `0x54` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO21", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO21 | | + +## PRIO22 +Interrupt Source 22 Priority +- Offset: `0x58` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO22", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO22 | | + +## PRIO23 +Interrupt Source 23 Priority +- Offset: `0x5c` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO23", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO23 | | + +## PRIO24 +Interrupt Source 24 Priority +- Offset: `0x60` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO24", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO24 | | + +## PRIO25 +Interrupt Source 25 Priority +- Offset: `0x64` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO25", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO25 | | + +## PRIO26 +Interrupt Source 26 Priority +- Offset: `0x68` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO26", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO26 | | + +## PRIO27 +Interrupt Source 27 Priority +- Offset: `0x6c` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO27", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO27 | | + +## PRIO28 +Interrupt Source 28 Priority +- Offset: `0x70` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO28", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO28 | | + +## PRIO29 +Interrupt Source 29 Priority +- Offset: `0x74` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO29", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO29 | | + +## PRIO30 +Interrupt Source 30 Priority +- Offset: `0x78` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO30", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO30 | | + +## PRIO31 +Interrupt Source 31 Priority +- Offset: `0x7c` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "PRIO31", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | PRIO31 | | + +## IP +Interrupt Pending +- Offset: `0x1000` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "P_0", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_1", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_2", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_3", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_4", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_5", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_6", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_7", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_8", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_9", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_10", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_11", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_12", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_13", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_14", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_15", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_16", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_17", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_18", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_19", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_20", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_21", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_22", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_23", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_24", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_25", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_26", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_27", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_28", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_29", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_30", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "P_31", "bits": 1, "attr": ["ro"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------| +| 31 | ro | 0x0 | P_31 | Interrupt Pending of Source | +| 30 | ro | 0x0 | P_30 | Interrupt Pending of Source | +| 29 | ro | 0x0 | P_29 | Interrupt Pending of Source | +| 28 | ro | 0x0 | P_28 | Interrupt Pending of Source | +| 27 | ro | 0x0 | P_27 | Interrupt Pending of Source | +| 26 | ro | 0x0 | P_26 | Interrupt Pending of Source | +| 25 | ro | 0x0 | P_25 | Interrupt Pending of Source | +| 24 | ro | 0x0 | P_24 | Interrupt Pending of Source | +| 23 | ro | 0x0 | P_23 | Interrupt Pending of Source | +| 22 | ro | 0x0 | P_22 | Interrupt Pending of Source | +| 21 | ro | 0x0 | P_21 | Interrupt Pending of Source | +| 20 | ro | 0x0 | P_20 | Interrupt Pending of Source | +| 19 | ro | 0x0 | P_19 | Interrupt Pending of Source | +| 18 | ro | 0x0 | P_18 | Interrupt Pending of Source | +| 17 | ro | 0x0 | P_17 | Interrupt Pending of Source | +| 16 | ro | 0x0 | P_16 | Interrupt Pending of Source | +| 15 | ro | 0x0 | P_15 | Interrupt Pending of Source | +| 14 | ro | 0x0 | P_14 | Interrupt Pending of Source | +| 13 | ro | 0x0 | P_13 | Interrupt Pending of Source | +| 12 | ro | 0x0 | P_12 | Interrupt Pending of Source | +| 11 | ro | 0x0 | P_11 | Interrupt Pending of Source | +| 10 | ro | 0x0 | P_10 | Interrupt Pending of Source | +| 9 | ro | 0x0 | P_9 | Interrupt Pending of Source | +| 8 | ro | 0x0 | P_8 | Interrupt Pending of Source | +| 7 | ro | 0x0 | P_7 | Interrupt Pending of Source | +| 6 | ro | 0x0 | P_6 | Interrupt Pending of Source | +| 5 | ro | 0x0 | P_5 | Interrupt Pending of Source | +| 4 | ro | 0x0 | P_4 | Interrupt Pending of Source | +| 3 | ro | 0x0 | P_3 | Interrupt Pending of Source | +| 2 | ro | 0x0 | P_2 | Interrupt Pending of Source | +| 1 | ro | 0x0 | P_1 | Interrupt Pending of Source | +| 0 | ro | 0x0 | P_0 | Interrupt Pending of Source | + +## IE0 +Interrupt Enable for Target 0 +- Offset: `0x2000` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "E_0", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_1", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_2", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_3", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_4", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_5", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_6", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_7", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_8", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_9", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_10", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_11", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_12", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_13", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_14", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_15", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_16", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_17", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_18", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_19", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_20", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_21", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_22", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_23", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_24", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_25", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_26", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_27", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_28", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_29", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_30", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "E_31", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------| +| 31 | rw | 0x0 | E_31 | Interrupt Enable of Source | +| 30 | rw | 0x0 | E_30 | Interrupt Enable of Source | +| 29 | rw | 0x0 | E_29 | Interrupt Enable of Source | +| 28 | rw | 0x0 | E_28 | Interrupt Enable of Source | +| 27 | rw | 0x0 | E_27 | Interrupt Enable of Source | +| 26 | rw | 0x0 | E_26 | Interrupt Enable of Source | +| 25 | rw | 0x0 | E_25 | Interrupt Enable of Source | +| 24 | rw | 0x0 | E_24 | Interrupt Enable of Source | +| 23 | rw | 0x0 | E_23 | Interrupt Enable of Source | +| 22 | rw | 0x0 | E_22 | Interrupt Enable of Source | +| 21 | rw | 0x0 | E_21 | Interrupt Enable of Source | +| 20 | rw | 0x0 | E_20 | Interrupt Enable of Source | +| 19 | rw | 0x0 | E_19 | Interrupt Enable of Source | +| 18 | rw | 0x0 | E_18 | Interrupt Enable of Source | +| 17 | rw | 0x0 | E_17 | Interrupt Enable of Source | +| 16 | rw | 0x0 | E_16 | Interrupt Enable of Source | +| 15 | rw | 0x0 | E_15 | Interrupt Enable of Source | +| 14 | rw | 0x0 | E_14 | Interrupt Enable of Source | +| 13 | rw | 0x0 | E_13 | Interrupt Enable of Source | +| 12 | rw | 0x0 | E_12 | Interrupt Enable of Source | +| 11 | rw | 0x0 | E_11 | Interrupt Enable of Source | +| 10 | rw | 0x0 | E_10 | Interrupt Enable of Source | +| 9 | rw | 0x0 | E_9 | Interrupt Enable of Source | +| 8 | rw | 0x0 | E_8 | Interrupt Enable of Source | +| 7 | rw | 0x0 | E_7 | Interrupt Enable of Source | +| 6 | rw | 0x0 | E_6 | Interrupt Enable of Source | +| 5 | rw | 0x0 | E_5 | Interrupt Enable of Source | +| 4 | rw | 0x0 | E_4 | Interrupt Enable of Source | +| 3 | rw | 0x0 | E_3 | Interrupt Enable of Source | +| 2 | rw | 0x0 | E_2 | Interrupt Enable of Source | +| 1 | rw | 0x0 | E_1 | Interrupt Enable of Source | +| 0 | rw | 0x0 | E_0 | Interrupt Enable of Source | + +## THRESHOLD0 +Threshold of priority for Target 0 +- Offset: `0x200000` +- Reset default: `0x0` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "THRESHOLD0", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:3 | | | | Reserved | +| 2:0 | rw | 0x0 | THRESHOLD0 | | + +## CC0 +Claim interrupt by read, complete interrupt by write for Target 0. +Value read/written is interrupt ID. Reading a value of 0 means no pending interrupts. +- Offset: `0x200004` +- Reset default: `0x0` +- Reset mask: `0x1f` + +### Fields + +```wavejson +{"reg": [{"name": "CC0", "bits": 5, "attr": ["rw"], "rotate": 0}, {"bits": 27}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:5 | | | | Reserved | +| 4:0 | rw | x | CC0 | | + +## MSIP0 +msip for Hart 0. +Write 1 to here asserts software interrupt for Hart msip_o[0], write 0 to clear. +- Offset: `0x4000000` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "MSIP0", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | MSIP0 | Software Interrupt Pending register | + +## ALERT_TEST +Alert Test Register. +- Offset: `0x4004000` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "fatal_fault", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:---------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | x | fatal_fault | 'Write 1 to trigger one alert event of this kind.' | + + + + + +## safety_island + + + +### registers.md + +## Summary + +| Name | Offset | Length | Description | +|:--------------------------------------------|:---------|---------:|:---------------------------------------| +| safety_soc_ctrl.[`bootaddr`](#bootaddr) | 0x0 | 4 | Core Boot Address | +| safety_soc_ctrl.[`fetchen`](#fetchen) | 0x4 | 4 | Core Fetch Enable | +| safety_soc_ctrl.[`corestatus`](#corestatus) | 0x8 | 4 | Core Return Status (return value, EOC) | +| safety_soc_ctrl.[`bootmode`](#bootmode) | 0xc | 4 | Core Boot Mode | + +## bootaddr +Core Boot Address +- Offset: `0x0` +- Reset default: `0x1a000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "bootaddr", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:---------|:--------------| +| 31:0 | rw | 0x1a000000 | bootaddr | Boot Address | + +## fetchen +Core Fetch Enable +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "fetchen", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | fetchen | Fetch Enable | + +## corestatus +Core Return Status (return value, EOC) +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "core_status", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:--------------------------------------------------------| +| 31:0 | rw | 0x0 | core_status | Core Return Status (EOC(bit[31]) and status(bit[30:0])) | + +## bootmode +Core Boot Mode +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "bootmode", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 100}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x0 | bootmode | Boot Mode | + + + + + +## serial_link + + + +### registers.md + +## Summary + +| Name | Offset | Length | Description | +|:--------------------------------------------------------------------------|:---------|---------:|:------------------------------------------------------------------------------| +| serial_link.[`CTRL`](#ctrl) | 0x0 | 4 | Global clock, isolation and reset control configuration | +| serial_link.[`ISOLATED`](#isolated) | 0x4 | 4 | Isolation status of AXI ports | +| serial_link.[`TX_PHY_CLK_DIV_0`](#tx_phy_clk_div) | 0x8 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_1`](#tx_phy_clk_div) | 0xc | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_2`](#tx_phy_clk_div) | 0x10 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_3`](#tx_phy_clk_div) | 0x14 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_4`](#tx_phy_clk_div) | 0x18 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_5`](#tx_phy_clk_div) | 0x1c | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_6`](#tx_phy_clk_div) | 0x20 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_7`](#tx_phy_clk_div) | 0x24 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_8`](#tx_phy_clk_div) | 0x28 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_9`](#tx_phy_clk_div) | 0x2c | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_10`](#tx_phy_clk_div) | 0x30 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_11`](#tx_phy_clk_div) | 0x34 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_12`](#tx_phy_clk_div) | 0x38 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_13`](#tx_phy_clk_div) | 0x3c | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_14`](#tx_phy_clk_div) | 0x40 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_15`](#tx_phy_clk_div) | 0x44 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_16`](#tx_phy_clk_div) | 0x48 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_17`](#tx_phy_clk_div) | 0x4c | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_18`](#tx_phy_clk_div) | 0x50 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_19`](#tx_phy_clk_div) | 0x54 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_20`](#tx_phy_clk_div) | 0x58 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_21`](#tx_phy_clk_div) | 0x5c | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_22`](#tx_phy_clk_div) | 0x60 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_23`](#tx_phy_clk_div) | 0x64 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_24`](#tx_phy_clk_div) | 0x68 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_25`](#tx_phy_clk_div) | 0x6c | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_26`](#tx_phy_clk_div) | 0x70 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_27`](#tx_phy_clk_div) | 0x74 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_28`](#tx_phy_clk_div) | 0x78 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_29`](#tx_phy_clk_div) | 0x7c | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_30`](#tx_phy_clk_div) | 0x80 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_31`](#tx_phy_clk_div) | 0x84 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_32`](#tx_phy_clk_div) | 0x88 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_33`](#tx_phy_clk_div) | 0x8c | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_34`](#tx_phy_clk_div) | 0x90 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_35`](#tx_phy_clk_div) | 0x94 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_36`](#tx_phy_clk_div) | 0x98 | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_DIV_37`](#tx_phy_clk_div) | 0x9c | 4 | Holds clock divider factor for forwarded clock of the TX Phys | +| serial_link.[`TX_PHY_CLK_START_0`](#tx_phy_clk_start) | 0xa0 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_1`](#tx_phy_clk_start) | 0xa4 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_2`](#tx_phy_clk_start) | 0xa8 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_3`](#tx_phy_clk_start) | 0xac | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_4`](#tx_phy_clk_start) | 0xb0 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_5`](#tx_phy_clk_start) | 0xb4 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_6`](#tx_phy_clk_start) | 0xb8 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_7`](#tx_phy_clk_start) | 0xbc | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_8`](#tx_phy_clk_start) | 0xc0 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_9`](#tx_phy_clk_start) | 0xc4 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_10`](#tx_phy_clk_start) | 0xc8 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_11`](#tx_phy_clk_start) | 0xcc | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_12`](#tx_phy_clk_start) | 0xd0 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_13`](#tx_phy_clk_start) | 0xd4 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_14`](#tx_phy_clk_start) | 0xd8 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_15`](#tx_phy_clk_start) | 0xdc | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_16`](#tx_phy_clk_start) | 0xe0 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_17`](#tx_phy_clk_start) | 0xe4 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_18`](#tx_phy_clk_start) | 0xe8 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_19`](#tx_phy_clk_start) | 0xec | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_20`](#tx_phy_clk_start) | 0xf0 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_21`](#tx_phy_clk_start) | 0xf4 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_22`](#tx_phy_clk_start) | 0xf8 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_23`](#tx_phy_clk_start) | 0xfc | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_24`](#tx_phy_clk_start) | 0x100 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_25`](#tx_phy_clk_start) | 0x104 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_26`](#tx_phy_clk_start) | 0x108 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_27`](#tx_phy_clk_start) | 0x10c | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_28`](#tx_phy_clk_start) | 0x110 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_29`](#tx_phy_clk_start) | 0x114 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_30`](#tx_phy_clk_start) | 0x118 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_31`](#tx_phy_clk_start) | 0x11c | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_32`](#tx_phy_clk_start) | 0x120 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_33`](#tx_phy_clk_start) | 0x124 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_34`](#tx_phy_clk_start) | 0x128 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_35`](#tx_phy_clk_start) | 0x12c | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_36`](#tx_phy_clk_start) | 0x130 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_START_37`](#tx_phy_clk_start) | 0x134 | 4 | Controls duty cycle and phase of rising edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_0`](#tx_phy_clk_end) | 0x138 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_1`](#tx_phy_clk_end) | 0x13c | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_2`](#tx_phy_clk_end) | 0x140 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_3`](#tx_phy_clk_end) | 0x144 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_4`](#tx_phy_clk_end) | 0x148 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_5`](#tx_phy_clk_end) | 0x14c | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_6`](#tx_phy_clk_end) | 0x150 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_7`](#tx_phy_clk_end) | 0x154 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_8`](#tx_phy_clk_end) | 0x158 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_9`](#tx_phy_clk_end) | 0x15c | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_10`](#tx_phy_clk_end) | 0x160 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_11`](#tx_phy_clk_end) | 0x164 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_12`](#tx_phy_clk_end) | 0x168 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_13`](#tx_phy_clk_end) | 0x16c | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_14`](#tx_phy_clk_end) | 0x170 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_15`](#tx_phy_clk_end) | 0x174 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_16`](#tx_phy_clk_end) | 0x178 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_17`](#tx_phy_clk_end) | 0x17c | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_18`](#tx_phy_clk_end) | 0x180 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_19`](#tx_phy_clk_end) | 0x184 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_20`](#tx_phy_clk_end) | 0x188 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_21`](#tx_phy_clk_end) | 0x18c | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_22`](#tx_phy_clk_end) | 0x190 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_23`](#tx_phy_clk_end) | 0x194 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_24`](#tx_phy_clk_end) | 0x198 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_25`](#tx_phy_clk_end) | 0x19c | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_26`](#tx_phy_clk_end) | 0x1a0 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_27`](#tx_phy_clk_end) | 0x1a4 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_28`](#tx_phy_clk_end) | 0x1a8 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_29`](#tx_phy_clk_end) | 0x1ac | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_30`](#tx_phy_clk_end) | 0x1b0 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_31`](#tx_phy_clk_end) | 0x1b4 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_32`](#tx_phy_clk_end) | 0x1b8 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_33`](#tx_phy_clk_end) | 0x1bc | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_34`](#tx_phy_clk_end) | 0x1c0 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_35`](#tx_phy_clk_end) | 0x1c4 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_36`](#tx_phy_clk_end) | 0x1c8 | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`TX_PHY_CLK_END_37`](#tx_phy_clk_end) | 0x1cc | 4 | Controls duty cycle and phase of falling edge in TX Phys | +| serial_link.[`RAW_MODE_EN`](#raw_mode_en) | 0x1d0 | 4 | Enables Raw mode | +| serial_link.[`RAW_MODE_IN_CH_SEL`](#raw_mode_in_ch_sel) | 0x1d4 | 4 | Receive channel select in RAW mode | +| serial_link.[`RAW_MODE_IN_DATA_VALID_0`](#RAW_MODE_IN_DATA_VALID_0) | 0x1d8 | 4 | Mask for valid data in RX FIFOs during RAW mode. | +| serial_link.[`RAW_MODE_IN_DATA_VALID_1`](#RAW_MODE_IN_DATA_VALID_1) | 0x1dc | 4 | Mask for valid data in RX FIFOs during RAW mode. | +| serial_link.[`RAW_MODE_IN_DATA`](#raw_mode_in_data) | 0x1e0 | 4 | Data received by the selected channel in RAW mode | +| serial_link.[`RAW_MODE_OUT_CH_MASK_0`](#RAW_MODE_OUT_CH_MASK_0) | 0x1e4 | 4 | Selects channels to send out data in RAW mode, '1 corresponds to broadcasting | +| serial_link.[`RAW_MODE_OUT_CH_MASK_1`](#RAW_MODE_OUT_CH_MASK_1) | 0x1e8 | 4 | Selects channels to send out data in RAW mode, '1 corresponds to broadcasting | +| serial_link.[`RAW_MODE_OUT_DATA_FIFO`](#raw_mode_out_data_fifo) | 0x1ec | 4 | Data that will be pushed to the RAW mode output FIFO | +| serial_link.[`RAW_MODE_OUT_DATA_FIFO_CTRL`](#raw_mode_out_data_fifo_ctrl) | 0x1f0 | 4 | Status and control register for the RAW mode data out FIFO | +| serial_link.[`RAW_MODE_OUT_EN`](#raw_mode_out_en) | 0x1f4 | 4 | Enable transmission of data currently hold in the output FIFO | +| serial_link.[`FLOW_CONTROL_FIFO_CLEAR`](#flow_control_fifo_clear) | 0x1f8 | 4 | Clears the flow control Fifo | +| serial_link.[`CHANNEL_ALLOC_TX_CFG`](#channel_alloc_tx_cfg) | 0x1fc | 4 | Configuration settings for the TX side in the channel allocator | +| serial_link.[`CHANNEL_ALLOC_TX_CH_EN_0`](#CHANNEL_ALLOC_TX_CH_EN_0) | 0x200 | 4 | Channel enable mask for the TX side. | +| serial_link.[`CHANNEL_ALLOC_TX_CH_EN_1`](#CHANNEL_ALLOC_TX_CH_EN_1) | 0x204 | 4 | Channel enable mask for the TX side. | +| serial_link.[`CHANNEL_ALLOC_TX_CTRL`](#channel_alloc_tx_ctrl) | 0x208 | 4 | Soft clear or force flush the TX side of the channel allocator | +| serial_link.[`CHANNEL_ALLOC_RX_CFG`](#channel_alloc_rx_cfg) | 0x20c | 4 | Configuration settings for the RX side in the channel allocator | +| serial_link.[`CHANNEL_ALLOC_RX_CTRL`](#channel_alloc_rx_ctrl) | 0x210 | 4 | Soft clear the RX side of the channel allocator | +| serial_link.[`CHANNEL_ALLOC_RX_CH_EN_0`](#CHANNEL_ALLOC_RX_CH_EN_0) | 0x214 | 4 | Channel enable mask for the RX side. | +| serial_link.[`CHANNEL_ALLOC_RX_CH_EN_1`](#CHANNEL_ALLOC_RX_CH_EN_1) | 0x218 | 4 | Channel enable mask for the RX side. | + +## CTRL +Global clock, isolation and reset control configuration +- Offset: `0x0` +- Reset default: `0x302` +- Reset mask: `0x303` + +### Fields + +```wavejson +{"reg": [{"name": "clk_ena", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "reset_n", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 6}, {"name": "axi_in_isolate", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "axi_out_isolate", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 22}], "config": {"lanes": 1, "fontsize": 10, "vspace": 170}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------|:-------------------------------------------------------------------| +| 31:10 | | | | Reserved | +| 9 | rw | 0x1 | axi_out_isolate | Isolate AXI master out port. (active-high) | +| 8 | rw | 0x1 | axi_in_isolate | Isolate AXI slave in port. (active-high) | +| 7:2 | | | | Reserved | +| 1 | rw | 0x1 | reset_n | SW controlled synchronous reset. (active-low) | +| 0 | rw | 0x0 | clk_ena | Clock gate enable for network, link, physical layer. (active-high) | + +## ISOLATED +Isolation status of AXI ports +- Offset: `0x4` +- Reset default: `0x3` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "axi_in", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "axi_out", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:----------------------------| +| 31:2 | | | | Reserved | +| 1 | ro | 0x1 | axi_out | master out isolation status | +| 0 | ro | 0x1 | axi_in | slave in isolation status | + +## TX_PHY_CLK_DIV +Holds clock divider factor for forwarded clock of the TX Phys +- Reset default: `0x8` +- Reset mask: `0x7ff` + +### Instances + +| Name | Offset | +|:------------------|:---------| +| TX_PHY_CLK_DIV_0 | 0x8 | +| TX_PHY_CLK_DIV_1 | 0xc | +| TX_PHY_CLK_DIV_2 | 0x10 | +| TX_PHY_CLK_DIV_3 | 0x14 | +| TX_PHY_CLK_DIV_4 | 0x18 | +| TX_PHY_CLK_DIV_5 | 0x1c | +| TX_PHY_CLK_DIV_6 | 0x20 | +| TX_PHY_CLK_DIV_7 | 0x24 | +| TX_PHY_CLK_DIV_8 | 0x28 | +| TX_PHY_CLK_DIV_9 | 0x2c | +| TX_PHY_CLK_DIV_10 | 0x30 | +| TX_PHY_CLK_DIV_11 | 0x34 | +| TX_PHY_CLK_DIV_12 | 0x38 | +| TX_PHY_CLK_DIV_13 | 0x3c | +| TX_PHY_CLK_DIV_14 | 0x40 | +| TX_PHY_CLK_DIV_15 | 0x44 | +| TX_PHY_CLK_DIV_16 | 0x48 | +| TX_PHY_CLK_DIV_17 | 0x4c | +| TX_PHY_CLK_DIV_18 | 0x50 | +| TX_PHY_CLK_DIV_19 | 0x54 | +| TX_PHY_CLK_DIV_20 | 0x58 | +| TX_PHY_CLK_DIV_21 | 0x5c | +| TX_PHY_CLK_DIV_22 | 0x60 | +| TX_PHY_CLK_DIV_23 | 0x64 | +| TX_PHY_CLK_DIV_24 | 0x68 | +| TX_PHY_CLK_DIV_25 | 0x6c | +| TX_PHY_CLK_DIV_26 | 0x70 | +| TX_PHY_CLK_DIV_27 | 0x74 | +| TX_PHY_CLK_DIV_28 | 0x78 | +| TX_PHY_CLK_DIV_29 | 0x7c | +| TX_PHY_CLK_DIV_30 | 0x80 | +| TX_PHY_CLK_DIV_31 | 0x84 | +| TX_PHY_CLK_DIV_32 | 0x88 | +| TX_PHY_CLK_DIV_33 | 0x8c | +| TX_PHY_CLK_DIV_34 | 0x90 | +| TX_PHY_CLK_DIV_35 | 0x94 | +| TX_PHY_CLK_DIV_36 | 0x98 | +| TX_PHY_CLK_DIV_37 | 0x9c | + + +### Fields + +```wavejson +{"reg": [{"name": "clk_divs", "bits": 11, "attr": ["rw"], "rotate": 0}, {"bits": 21}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:----------------------------------| +| 31:11 | | | | Reserved | +| 10:0 | rw | 0x8 | clk_divs | Clock division factor of TX clock | + +## TX_PHY_CLK_START +Controls duty cycle and phase of rising edge in TX Phys +- Reset default: `0x2` +- Reset mask: `0x7ff` + +### Instances + +| Name | Offset | +|:--------------------|:---------| +| TX_PHY_CLK_START_0 | 0xa0 | +| TX_PHY_CLK_START_1 | 0xa4 | +| TX_PHY_CLK_START_2 | 0xa8 | +| TX_PHY_CLK_START_3 | 0xac | +| TX_PHY_CLK_START_4 | 0xb0 | +| TX_PHY_CLK_START_5 | 0xb4 | +| TX_PHY_CLK_START_6 | 0xb8 | +| TX_PHY_CLK_START_7 | 0xbc | +| TX_PHY_CLK_START_8 | 0xc0 | +| TX_PHY_CLK_START_9 | 0xc4 | +| TX_PHY_CLK_START_10 | 0xc8 | +| TX_PHY_CLK_START_11 | 0xcc | +| TX_PHY_CLK_START_12 | 0xd0 | +| TX_PHY_CLK_START_13 | 0xd4 | +| TX_PHY_CLK_START_14 | 0xd8 | +| TX_PHY_CLK_START_15 | 0xdc | +| TX_PHY_CLK_START_16 | 0xe0 | +| TX_PHY_CLK_START_17 | 0xe4 | +| TX_PHY_CLK_START_18 | 0xe8 | +| TX_PHY_CLK_START_19 | 0xec | +| TX_PHY_CLK_START_20 | 0xf0 | +| TX_PHY_CLK_START_21 | 0xf4 | +| TX_PHY_CLK_START_22 | 0xf8 | +| TX_PHY_CLK_START_23 | 0xfc | +| TX_PHY_CLK_START_24 | 0x100 | +| TX_PHY_CLK_START_25 | 0x104 | +| TX_PHY_CLK_START_26 | 0x108 | +| TX_PHY_CLK_START_27 | 0x10c | +| TX_PHY_CLK_START_28 | 0x110 | +| TX_PHY_CLK_START_29 | 0x114 | +| TX_PHY_CLK_START_30 | 0x118 | +| TX_PHY_CLK_START_31 | 0x11c | +| TX_PHY_CLK_START_32 | 0x120 | +| TX_PHY_CLK_START_33 | 0x124 | +| TX_PHY_CLK_START_34 | 0x128 | +| TX_PHY_CLK_START_35 | 0x12c | +| TX_PHY_CLK_START_36 | 0x130 | +| TX_PHY_CLK_START_37 | 0x134 | + + +### Fields + +```wavejson +{"reg": [{"name": "clk_shift_start", "bits": 11, "attr": ["rw"], "rotate": 0}, {"bits": 21}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------|:----------------------------------------| +| 31:11 | | | | Reserved | +| 10:0 | rw | 0x2 | clk_shift_start | Positive Edge of divided, shifted clock | + +## TX_PHY_CLK_END +Controls duty cycle and phase of falling edge in TX Phys +- Reset default: `0x6` +- Reset mask: `0x7ff` + +### Instances + +| Name | Offset | +|:------------------|:---------| +| TX_PHY_CLK_END_0 | 0x138 | +| TX_PHY_CLK_END_1 | 0x13c | +| TX_PHY_CLK_END_2 | 0x140 | +| TX_PHY_CLK_END_3 | 0x144 | +| TX_PHY_CLK_END_4 | 0x148 | +| TX_PHY_CLK_END_5 | 0x14c | +| TX_PHY_CLK_END_6 | 0x150 | +| TX_PHY_CLK_END_7 | 0x154 | +| TX_PHY_CLK_END_8 | 0x158 | +| TX_PHY_CLK_END_9 | 0x15c | +| TX_PHY_CLK_END_10 | 0x160 | +| TX_PHY_CLK_END_11 | 0x164 | +| TX_PHY_CLK_END_12 | 0x168 | +| TX_PHY_CLK_END_13 | 0x16c | +| TX_PHY_CLK_END_14 | 0x170 | +| TX_PHY_CLK_END_15 | 0x174 | +| TX_PHY_CLK_END_16 | 0x178 | +| TX_PHY_CLK_END_17 | 0x17c | +| TX_PHY_CLK_END_18 | 0x180 | +| TX_PHY_CLK_END_19 | 0x184 | +| TX_PHY_CLK_END_20 | 0x188 | +| TX_PHY_CLK_END_21 | 0x18c | +| TX_PHY_CLK_END_22 | 0x190 | +| TX_PHY_CLK_END_23 | 0x194 | +| TX_PHY_CLK_END_24 | 0x198 | +| TX_PHY_CLK_END_25 | 0x19c | +| TX_PHY_CLK_END_26 | 0x1a0 | +| TX_PHY_CLK_END_27 | 0x1a4 | +| TX_PHY_CLK_END_28 | 0x1a8 | +| TX_PHY_CLK_END_29 | 0x1ac | +| TX_PHY_CLK_END_30 | 0x1b0 | +| TX_PHY_CLK_END_31 | 0x1b4 | +| TX_PHY_CLK_END_32 | 0x1b8 | +| TX_PHY_CLK_END_33 | 0x1bc | +| TX_PHY_CLK_END_34 | 0x1c0 | +| TX_PHY_CLK_END_35 | 0x1c4 | +| TX_PHY_CLK_END_36 | 0x1c8 | +| TX_PHY_CLK_END_37 | 0x1cc | + + +### Fields + +```wavejson +{"reg": [{"name": "clk_shift_end", "bits": 11, "attr": ["rw"], "rotate": 0}, {"bits": 21}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:----------------------------------------| +| 31:11 | | | | Reserved | +| 10:0 | rw | 0x6 | clk_shift_end | Negative Edge of divided, shifted clock | + +## RAW_MODE_EN +Enables Raw mode +- Offset: `0x1d0` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "RAW_MODE_EN", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | RAW_MODE_EN | | + +## RAW_MODE_IN_CH_SEL +Receive channel select in RAW mode +- Offset: `0x1d4` +- Reset default: `0x0` +- Reset mask: `0x3f` + +### Fields + +```wavejson +{"reg": [{"name": "RAW_MODE_IN_CH_SEL", "bits": 6, "attr": ["wo"], "rotate": -90}, {"bits": 26}], "config": {"lanes": 1, "fontsize": 10, "vspace": 200}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------|:--------------| +| 31:6 | | | | Reserved | +| 5:0 | wo | 0x0 | RAW_MODE_IN_CH_SEL | | + +## RAW_MODE_IN_DATA_VALID_0 +Mask for valid data in RX FIFOs during RAW mode. +- Offset: `0x1d8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "RAW_MODE_IN_DATA_VALID_0", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_1", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_2", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_3", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_4", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_5", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_6", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_7", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_8", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_9", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_10", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_11", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_12", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_13", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_14", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_15", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_16", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_17", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_18", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_19", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_20", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_21", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_22", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_23", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_24", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_25", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_26", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_27", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_28", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_29", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_30", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_31", "bits": 1, "attr": ["ro"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 270}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------------|:--------------| +| 31 | ro | x | RAW_MODE_IN_DATA_VALID_31 | | +| 30 | ro | x | RAW_MODE_IN_DATA_VALID_30 | | +| 29 | ro | x | RAW_MODE_IN_DATA_VALID_29 | | +| 28 | ro | x | RAW_MODE_IN_DATA_VALID_28 | | +| 27 | ro | x | RAW_MODE_IN_DATA_VALID_27 | | +| 26 | ro | x | RAW_MODE_IN_DATA_VALID_26 | | +| 25 | ro | x | RAW_MODE_IN_DATA_VALID_25 | | +| 24 | ro | x | RAW_MODE_IN_DATA_VALID_24 | | +| 23 | ro | x | RAW_MODE_IN_DATA_VALID_23 | | +| 22 | ro | x | RAW_MODE_IN_DATA_VALID_22 | | +| 21 | ro | x | RAW_MODE_IN_DATA_VALID_21 | | +| 20 | ro | x | RAW_MODE_IN_DATA_VALID_20 | | +| 19 | ro | x | RAW_MODE_IN_DATA_VALID_19 | | +| 18 | ro | x | RAW_MODE_IN_DATA_VALID_18 | | +| 17 | ro | x | RAW_MODE_IN_DATA_VALID_17 | | +| 16 | ro | x | RAW_MODE_IN_DATA_VALID_16 | | +| 15 | ro | x | RAW_MODE_IN_DATA_VALID_15 | | +| 14 | ro | x | RAW_MODE_IN_DATA_VALID_14 | | +| 13 | ro | x | RAW_MODE_IN_DATA_VALID_13 | | +| 12 | ro | x | RAW_MODE_IN_DATA_VALID_12 | | +| 11 | ro | x | RAW_MODE_IN_DATA_VALID_11 | | +| 10 | ro | x | RAW_MODE_IN_DATA_VALID_10 | | +| 9 | ro | x | RAW_MODE_IN_DATA_VALID_9 | | +| 8 | ro | x | RAW_MODE_IN_DATA_VALID_8 | | +| 7 | ro | x | RAW_MODE_IN_DATA_VALID_7 | | +| 6 | ro | x | RAW_MODE_IN_DATA_VALID_6 | | +| 5 | ro | x | RAW_MODE_IN_DATA_VALID_5 | | +| 4 | ro | x | RAW_MODE_IN_DATA_VALID_4 | | +| 3 | ro | x | RAW_MODE_IN_DATA_VALID_3 | | +| 2 | ro | x | RAW_MODE_IN_DATA_VALID_2 | | +| 1 | ro | x | RAW_MODE_IN_DATA_VALID_1 | | +| 0 | ro | x | RAW_MODE_IN_DATA_VALID_0 | | + +## RAW_MODE_IN_DATA_VALID_1 +Mask for valid data in RX FIFOs during RAW mode. +- Offset: `0x1dc` +- Reset default: `0x0` +- Reset mask: `0x3f` + +### Fields + +```wavejson +{"reg": [{"name": "RAW_MODE_IN_DATA_VALID_32", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_33", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_34", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_35", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_36", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RAW_MODE_IN_DATA_VALID_37", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 26}], "config": {"lanes": 1, "fontsize": 10, "vspace": 270}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------------|:----------------------------| +| 31:6 | | | | Reserved | +| 5 | ro | x | RAW_MODE_IN_DATA_VALID_37 | For RAW_MODE_IN_DATA_VALID1 | +| 4 | ro | x | RAW_MODE_IN_DATA_VALID_36 | For RAW_MODE_IN_DATA_VALID1 | +| 3 | ro | x | RAW_MODE_IN_DATA_VALID_35 | For RAW_MODE_IN_DATA_VALID1 | +| 2 | ro | x | RAW_MODE_IN_DATA_VALID_34 | For RAW_MODE_IN_DATA_VALID1 | +| 1 | ro | x | RAW_MODE_IN_DATA_VALID_33 | For RAW_MODE_IN_DATA_VALID1 | +| 0 | ro | x | RAW_MODE_IN_DATA_VALID_32 | For RAW_MODE_IN_DATA_VALID1 | + +## RAW_MODE_IN_DATA +Data received by the selected channel in RAW mode +- Offset: `0x1e0` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "RAW_MODE_IN_DATA", "bits": 16, "attr": ["ro"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:16 | | | | Reserved | +| 15:0 | ro | x | RAW_MODE_IN_DATA | | + +## RAW_MODE_OUT_CH_MASK_0 +Selects channels to send out data in RAW mode, '1 corresponds to broadcasting +- Offset: `0x1e4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "RAW_MODE_OUT_CH_MASK_0", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_1", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_2", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_3", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_4", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_5", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_6", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_7", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_8", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_9", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_10", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_11", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_12", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_13", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_14", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_15", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_16", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_17", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_18", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_19", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_20", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_21", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_22", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_23", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_24", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_25", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_26", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_27", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_28", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_29", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_30", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_31", "bits": 1, "attr": ["wo"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 250}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------|:--------------| +| 31 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_31 | | +| 30 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_30 | | +| 29 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_29 | | +| 28 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_28 | | +| 27 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_27 | | +| 26 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_26 | | +| 25 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_25 | | +| 24 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_24 | | +| 23 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_23 | | +| 22 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_22 | | +| 21 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_21 | | +| 20 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_20 | | +| 19 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_19 | | +| 18 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_18 | | +| 17 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_17 | | +| 16 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_16 | | +| 15 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_15 | | +| 14 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_14 | | +| 13 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_13 | | +| 12 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_12 | | +| 11 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_11 | | +| 10 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_10 | | +| 9 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_9 | | +| 8 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_8 | | +| 7 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_7 | | +| 6 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_6 | | +| 5 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_5 | | +| 4 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_4 | | +| 3 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_3 | | +| 2 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_2 | | +| 1 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_1 | | +| 0 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_0 | | + +## RAW_MODE_OUT_CH_MASK_1 +Selects channels to send out data in RAW mode, '1 corresponds to broadcasting +- Offset: `0x1e8` +- Reset default: `0x0` +- Reset mask: `0x3f` + +### Fields + +```wavejson +{"reg": [{"name": "RAW_MODE_OUT_CH_MASK_32", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_33", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_34", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_35", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_36", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RAW_MODE_OUT_CH_MASK_37", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 26}], "config": {"lanes": 1, "fontsize": 10, "vspace": 250}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------|:--------------------------| +| 31:6 | | | | Reserved | +| 5 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_37 | For RAW_MODE_OUT_CH_MASK1 | +| 4 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_36 | For RAW_MODE_OUT_CH_MASK1 | +| 3 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_35 | For RAW_MODE_OUT_CH_MASK1 | +| 2 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_34 | For RAW_MODE_OUT_CH_MASK1 | +| 1 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_33 | For RAW_MODE_OUT_CH_MASK1 | +| 0 | wo | 0x0 | RAW_MODE_OUT_CH_MASK_32 | For RAW_MODE_OUT_CH_MASK1 | + +## RAW_MODE_OUT_DATA_FIFO +Data that will be pushed to the RAW mode output FIFO +- Offset: `0x1ec` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "RAW_MODE_OUT_DATA_FIFO", "bits": 16, "attr": ["wo"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------|:--------------| +| 31:16 | | | | Reserved | +| 15:0 | wo | 0x0 | RAW_MODE_OUT_DATA_FIFO | | + +## RAW_MODE_OUT_DATA_FIFO_CTRL +Status and control register for the RAW mode data out FIFO +- Offset: `0x1f0` +- Reset default: `0x0` +- Reset mask: `0x80000701` + +### Fields + +```wavejson +{"reg": [{"name": "clear", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 7}, {"name": "fill_state", "bits": 3, "attr": ["ro"], "rotate": -90}, {"bits": 20}, {"name": "is_full", "bits": 1, "attr": ["ro"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31 | ro | 0x0 | is_full | If '1' the FIFO is full and does not accept any more items. Any additional write to the data fill register will be ignored until there is sufficient space again. | +| 30:11 | | | | Reserved | +| 10:8 | ro | 0x0 | fill_state | The number of elements currently stored in the RAW mode TX FIFO that are ready to be sent. | +| 7:1 | | | | Reserved | +| 0 | wo | x | clear | Clears the raw mode TX FIFO. | + +## RAW_MODE_OUT_EN +Enable transmission of data currently hold in the output FIFO +- Offset: `0x1f4` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "RAW_MODE_OUT_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 170}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | RAW_MODE_OUT_EN | | + +## FLOW_CONTROL_FIFO_CLEAR +Clears the flow control Fifo +- Offset: `0x1f8` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "FLOW_CONTROL_FIFO_CLEAR", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 250}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | FLOW_CONTROL_FIFO_CLEAR | | + +## CHANNEL_ALLOC_TX_CFG +Configuration settings for the TX side in the channel allocator +- Offset: `0x1fc` +- Reset default: `0x203` +- Reset mask: `0xff03` + +### Fields + +```wavejson +{"reg": [{"name": "bypass_en", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "auto_flush_en", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 6}, {"name": "auto_flush_count", "bits": 8, "attr": ["rw"], "rotate": -90}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:---------------------------------------------------------------------------------------------| +| 31:16 | | | | Reserved | +| 15:8 | rw | 0x2 | auto_flush_count | The number of cycles to wait before auto flushing (sending) packets in the channel allocator | +| 7:2 | | | | Reserved | +| 1 | rw | 0x1 | auto_flush_en | Enable the auto-flush feature of the TX side in the channel allocator | +| 0 | rw | 0x1 | bypass_en | Enable bypassing the TX channel allocator | + +## CHANNEL_ALLOC_TX_CH_EN_0 +Channel enable mask for the TX side. +- Offset: `0x200` +- Reset default: `0xffffffff` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CHANNEL_ALLOC_TX_CH_EN_0", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_1", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_2", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_3", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_4", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_5", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_6", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_7", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_8", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_9", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_10", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_11", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_12", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_13", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_14", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_15", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_16", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_17", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_18", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_19", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_20", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_21", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_22", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_23", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_24", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_25", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_26", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_27", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_28", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_29", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_30", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_31", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 270}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------------|:--------------| +| 31 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_31 | | +| 30 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_30 | | +| 29 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_29 | | +| 28 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_28 | | +| 27 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_27 | | +| 26 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_26 | | +| 25 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_25 | | +| 24 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_24 | | +| 23 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_23 | | +| 22 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_22 | | +| 21 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_21 | | +| 20 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_20 | | +| 19 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_19 | | +| 18 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_18 | | +| 17 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_17 | | +| 16 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_16 | | +| 15 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_15 | | +| 14 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_14 | | +| 13 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_13 | | +| 12 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_12 | | +| 11 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_11 | | +| 10 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_10 | | +| 9 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_9 | | +| 8 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_8 | | +| 7 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_7 | | +| 6 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_6 | | +| 5 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_5 | | +| 4 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_4 | | +| 3 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_3 | | +| 2 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_2 | | +| 1 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_1 | | +| 0 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_0 | | + +## CHANNEL_ALLOC_TX_CH_EN_1 +Channel enable mask for the TX side. +- Offset: `0x204` +- Reset default: `0x3f` +- Reset mask: `0x3f` + +### Fields + +```wavejson +{"reg": [{"name": "CHANNEL_ALLOC_TX_CH_EN_32", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_33", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_34", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_35", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_36", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_TX_CH_EN_37", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 26}], "config": {"lanes": 1, "fontsize": 10, "vspace": 270}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------------|:----------------------------| +| 31:6 | | | | Reserved | +| 5 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_37 | For CHANNEL_ALLOC_TX_CH_EN1 | +| 4 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_36 | For CHANNEL_ALLOC_TX_CH_EN1 | +| 3 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_35 | For CHANNEL_ALLOC_TX_CH_EN1 | +| 2 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_34 | For CHANNEL_ALLOC_TX_CH_EN1 | +| 1 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_33 | For CHANNEL_ALLOC_TX_CH_EN1 | +| 0 | rw | 0x1 | CHANNEL_ALLOC_TX_CH_EN_32 | For CHANNEL_ALLOC_TX_CH_EN1 | + +## CHANNEL_ALLOC_TX_CTRL +Soft clear or force flush the TX side of the channel allocator +- Offset: `0x208` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "clear", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "flush", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------| +| 31:2 | | | | Reserved | +| 1 | wo | x | flush | Flush (transmit remaining data) in the TX side of the channel allocator. | +| 0 | wo | x | clear | Software clear the TX side of the channel allocator | + +## CHANNEL_ALLOC_RX_CFG +Configuration settings for the RX side in the channel allocator +- Offset: `0x20c` +- Reset default: `0x10203` +- Reset mask: `0x1ff03` + +### Fields + +```wavejson +{"reg": [{"name": "bypass_en", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "auto_flush_en", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 6}, {"name": "auto_flush_count", "bits": 8, "attr": ["rw"], "rotate": -90}, {"name": "sync_en", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 15}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:---------------------------------------------------------------------------------------------------------------| +| 31:17 | | | | Reserved | +| 16 | rw | 0x1 | sync_en | Enable (1) or disable (0) the synchronization barrier between the channels (needs to be disabled in raw mode). | +| 15:8 | rw | 0x2 | auto_flush_count | The number of cycles to wait before synchronizing on partial packets on the RX side | +| 7:2 | | | | Reserved | +| 1 | rw | 0x1 | auto_flush_en | Enable the auto-flush feature of the RX side in the channel allocator | +| 0 | rw | 0x1 | bypass_en | Enable bypassing the RX channel allocator | + +## CHANNEL_ALLOC_RX_CTRL +Soft clear the RX side of the channel allocator +- Offset: `0x210` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "clear", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | x | clear | Software clear the TX side of the channel allocator | + +## CHANNEL_ALLOC_RX_CH_EN_0 +Channel enable mask for the RX side. +- Offset: `0x214` +- Reset default: `0xffffffff` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CHANNEL_ALLOC_RX_CH_EN_0", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_1", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_2", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_3", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_4", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_5", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_6", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_7", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_8", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_9", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_10", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_11", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_12", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_13", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_14", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_15", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_16", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_17", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_18", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_19", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_20", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_21", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_22", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_23", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_24", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_25", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_26", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_27", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_28", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_29", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_30", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_31", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 270}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------------|:--------------| +| 31 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_31 | | +| 30 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_30 | | +| 29 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_29 | | +| 28 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_28 | | +| 27 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_27 | | +| 26 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_26 | | +| 25 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_25 | | +| 24 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_24 | | +| 23 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_23 | | +| 22 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_22 | | +| 21 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_21 | | +| 20 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_20 | | +| 19 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_19 | | +| 18 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_18 | | +| 17 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_17 | | +| 16 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_16 | | +| 15 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_15 | | +| 14 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_14 | | +| 13 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_13 | | +| 12 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_12 | | +| 11 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_11 | | +| 10 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_10 | | +| 9 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_9 | | +| 8 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_8 | | +| 7 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_7 | | +| 6 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_6 | | +| 5 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_5 | | +| 4 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_4 | | +| 3 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_3 | | +| 2 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_2 | | +| 1 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_1 | | +| 0 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_0 | | + +## CHANNEL_ALLOC_RX_CH_EN_1 +Channel enable mask for the RX side. +- Offset: `0x218` +- Reset default: `0x3f` +- Reset mask: `0x3f` + +### Fields + +```wavejson +{"reg": [{"name": "CHANNEL_ALLOC_RX_CH_EN_32", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_33", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_34", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_35", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_36", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CHANNEL_ALLOC_RX_CH_EN_37", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 26}], "config": {"lanes": 1, "fontsize": 10, "vspace": 270}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------------|:----------------------------| +| 31:6 | | | | Reserved | +| 5 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_37 | For CHANNEL_ALLOC_RX_CH_EN1 | +| 4 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_36 | For CHANNEL_ALLOC_RX_CH_EN1 | +| 3 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_35 | For CHANNEL_ALLOC_RX_CH_EN1 | +| 2 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_34 | For CHANNEL_ALLOC_RX_CH_EN1 | +| 1 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_33 | For CHANNEL_ALLOC_RX_CH_EN1 | +| 0 | rw | 0x1 | CHANNEL_ALLOC_RX_CH_EN_32 | For CHANNEL_ALLOC_RX_CH_EN1 | + + + + + +## spim + + + +### registers.md + +## Summary + +| Name | Offset | Length | Description | +|:-----------------------------------------|:---------|---------:|:---------------------------------------------------------| +| spi_host.[`INTR_STATE`](#intr_state) | 0x0 | 4 | Interrupt State Register | +| spi_host.[`INTR_ENABLE`](#intr_enable) | 0x4 | 4 | Interrupt Enable Register | +| spi_host.[`INTR_TEST`](#intr_test) | 0x8 | 4 | Interrupt Test Register | +| spi_host.[`ALERT_TEST`](#alert_test) | 0xc | 4 | Alert Test Register | +| spi_host.[`CONTROL`](#control) | 0x10 | 4 | Control register | +| spi_host.[`STATUS`](#status) | 0x14 | 4 | Status register | +| spi_host.[`CONFIGOPTS`](#configopts) | 0x18 | 4 | Configuration options register. | +| spi_host.[`CSID`](#csid) | 0x1c | 4 | Chip-Select ID | +| spi_host.[`COMMAND`](#command) | 0x20 | 4 | Command Register | +| spi_host.[`RXDATA`](#rxdata) | 0x24 | 4 | SPI Receive Data. | +| spi_host.[`TXDATA`](#txdata) | 0x28 | 4 | SPI Transmit Data. | +| spi_host.[`ERROR_ENABLE`](#error_enable) | 0x2c | 4 | Controls which classes of errors raise an interrupt. | +| spi_host.[`ERROR_STATUS`](#error_status) | 0x30 | 4 | Indicates that any errors that have occurred. | +| spi_host.[`EVENT_ENABLE`](#event_enable) | 0x34 | 4 | Controls which classes of SPI events raise an interrupt. | + +## INTR_STATE +Interrupt State Register +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "error", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "spi_event", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:---------------------------------------------------------------------------------------------| +| 31:2 | | | | Reserved | +| 1 | ro | 0x0 | spi_event | Event-related interrupts, see [`EVENT_ENABLE`](#event_enable) register for more information. | +| 0 | rw1c | 0x0 | error | Error-related interrupts, see [`ERROR_ENABLE`](#error_enable) register for more information. | + +## INTR_ENABLE +Interrupt Enable Register +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "error", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "spi_event", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:--------------------------------------------------------------------| +| 31:2 | | | | Reserved | +| 1 | rw | 0x0 | spi_event | Enable interrupt when [`INTR_STATE.spi_event`](#intr_state) is set. | +| 0 | rw | 0x0 | error | Enable interrupt when [`INTR_STATE.error`](#intr_state) is set. | + +## INTR_TEST +Interrupt Test Register +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "error", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "spi_event", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-------------------------------------------------------------| +| 31:2 | | | | Reserved | +| 1 | wo | 0x0 | spi_event | Write 1 to force [`INTR_STATE.spi_event`](#intr_state) to 1. | +| 0 | wo | 0x0 | error | Write 1 to force [`INTR_STATE.error`](#intr_state) to 1. | + +## ALERT_TEST +Alert Test Register +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "fatal_fault", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:-------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | fatal_fault | Write 1 to trigger one alert event of this kind. | + +## CONTROL +Control register +- Offset: `0x10` +- Reset default: `0x7f` +- Reset mask: `0xe000ffff` + +### Fields + +```wavejson +{"reg": [{"name": "RX_WATERMARK", "bits": 8, "attr": ["rw"], "rotate": 0}, {"name": "TX_WATERMARK", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 13}, {"name": "OUTPUT_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "SW_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "SPIEN", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:---------------------------------------| +| 31 | rw | 0x0 | [SPIEN](#control--spien) | +| 30 | rw | 0x0 | [SW_RST](#control--sw_rst) | +| 29 | rw | 0x0 | [OUTPUT_EN](#control--output_en) | +| 28:16 | | | Reserved | +| 15:8 | rw | 0x0 | [TX_WATERMARK](#control--tx_watermark) | +| 7:0 | rw | 0x7f | [RX_WATERMARK](#control--rx_watermark) | + +### CONTROL . SPIEN +Enables the SPI host. On reset, this field is 0, meaning + that no transactions can proceed. + +### CONTROL . SW_RST +Clears the internal state (not registers) to the reset state when set to 1, + including the FIFOs, the CDC's, the core state machine and the shift register. + In the current implementation, the CDC FIFOs are drained not reset. + Therefore software must confirm that both FIFO's empty before releasing + the IP from reset. + +### CONTROL . OUTPUT_EN +Enable the SPI host output buffers for the sck, csb, and sd lines. This allows + the SPI_HOST IP to connect to the same bus as other SPI controllers without + interference. + +### CONTROL . TX_WATERMARK +If [`EVENT_ENABLE.TXWM`](#event_enable) is set, the IP will send + an interrupt when the depth of the TX FIFO drops below + TX_WATERMARK words (32b each). + +### CONTROL . RX_WATERMARK +If [`EVENT_ENABLE.RXWM`](#event_enable) is set, the IP will send + an interrupt when the depth of the RX FIFO reaches + RX_WATERMARK words (32b each). + +## STATUS +Status register +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0xffdfffff` + +### Fields + +```wavejson +{"reg": [{"name": "TXQD", "bits": 8, "attr": ["ro"], "rotate": 0}, {"name": "RXQD", "bits": 8, "attr": ["ro"], "rotate": 0}, {"name": "CMDQD", "bits": 4, "attr": ["ro"], "rotate": 0}, {"name": "RXWM", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 1}, {"name": "BYTEORDER", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RXSTALL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RXEMPTY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RXFULL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "TXWM", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "TXSTALL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "TXEMPTY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "TXFULL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "ACTIVE", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "READY", "bits": 1, "attr": ["ro"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:--------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31 | ro | 0x0 | READY | When high, indicates the SPI host is ready to receive commands. Writing to COMMAND when READY is low is an error, and will trigger an interrupt. | +| 30 | ro | 0x0 | ACTIVE | When high, indicates the SPI host is processing a previously issued command. | +| 29 | ro | 0x0 | TXFULL | When high, indicates that the transmit data fifo is full. Any further writes to [`TXDATA`](#txdata) will create an error interrupt. | +| 28 | ro | 0x0 | TXEMPTY | When high, indicates that the transmit data fifo is empty. | +| 27 | ro | 0x0 | TXSTALL | If high, signifies that an ongoing transaction has stalled due to lack of data in the TX FIFO | +| 26 | ro | 0x0 | TXWM | If high, the amount of data in the TX FIFO has fallen below the level of [`CONTROL.TX_WATERMARK`](#control) words (32b each). | +| 25 | ro | 0x0 | RXFULL | When high, indicates that the receive fifo is full. Any ongoing transactions will stall until firmware reads some data from [`RXDATA.`](#rxdata) | +| 24 | ro | 0x0 | RXEMPTY | When high, indicates that the receive fifo is empty. Any reads from RX FIFO will cause an error interrupt. | +| 23 | ro | 0x0 | RXSTALL | If high, signifies that an ongoing transaction has stalled due to lack of available space in the RX FIFO | +| 22 | ro | 0x0 | BYTEORDER | The value of the ByteOrder parameter, provided so that firmware can confirm proper IP configuration. | +| 21 | | | | Reserved | +| 20 | ro | 0x0 | RXWM | If high, the number of 32-bits in the RX FIFO now exceeds the [`CONTROL.RX_WATERMARK`](#control) entries (32b each). | +| 19:16 | ro | 0x0 | CMDQD | Command queue depth. Indicates how many unread 32-bit words are currently in the command segment queue. | +| 15:8 | ro | 0x0 | RXQD | Receive queue depth. Indicates how many unread 32-bit words are currently in the RX FIFO. When active, this result may an underestimate due to synchronization delays. | +| 7:0 | ro | 0x0 | TXQD | Transmit queue depth. Indicates how many unsent 32-bit words are currently in the TX FIFO. When active, this result may be an overestimate due to synchronization delays. | + +## CONFIGOPTS +Configuration options register. + + Contains options for controlling the current peripheral. + Firmware needs to configure the options before the transfer. +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xefffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CLKDIV", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "CSNIDLE", "bits": 4, "attr": ["rw"], "rotate": -90}, {"name": "CSNTRAIL", "bits": 4, "attr": ["rw"], "rotate": -90}, {"name": "CSNLEAD", "bits": 4, "attr": ["rw"], "rotate": -90}, {"bits": 1}, {"name": "FULLCYC", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CPHA", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CPOL", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 100}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:----------------------------------| +| 31 | rw | 0x0 | [CPOL](#configopts--cpol) | +| 30 | rw | 0x0 | [CPHA](#configopts--cpha) | +| 29 | rw | 0x0 | [FULLCYC](#configopts--fullcyc) | +| 28 | | | Reserved | +| 27:24 | rw | 0x0 | [CSNLEAD](#configopts--csnlead) | +| 23:20 | rw | 0x0 | [CSNTRAIL](#configopts--csntrail) | +| 19:16 | rw | 0x0 | [CSNIDLE](#configopts--csnidle) | +| 15:0 | rw | 0x0 | [CLKDIV](#configopts--clkdiv) | + +### CONFIGOPTS . CPOL +The polarity of the sck clock signal. When CPOL is 0, + sck is low when idle, and emits high pulses. When CPOL + is 1, sck is high when idle, and emits a series of low + pulses. + +### CONFIGOPTS . CPHA +The phase of the sck clock signal relative to the data. When + CPHA = 0, the data changes on the trailing edge of sck + and is typically sampled on the leading edge. Conversely + if CPHA = 1 high, data lines change on the leading edge of + sck and are typically sampled on the trailing edge. + CPHA should be chosen to match the phase of the selected + device. The sampling behavior is modified by the + [`CONFIGOPTS.FULLCYC`](#configopts) bit. + +### CONFIGOPTS . FULLCYC +Full cycle. Modifies the CPHA sampling behaviour to allow + for longer device logic setup times. Rather than sampling the SD + bus a half cycle after shifting out data, the data is sampled + a full cycle after shifting data out. This means that if + CPHA = 0, data is shifted out on the trailing edge, and + sampled a full cycle later. If CPHA = 1, data is shifted and + sampled with the trailing edge, also separated by a + full cycle. + +### CONFIGOPTS . CSNLEAD +CS_N Leading Time. Indicates the number of half sck cycles, + CSNLEAD+1, to leave between the falling edge of cs_n and + the first edge of sck. Setting this register to zero + corresponds to the minimum delay of one-half sck cycle + +### CONFIGOPTS . CSNTRAIL +CS_N Trailing Time. Indicates the number of half sck cycles, + CSNTRAIL+1, to leave between last edge of sck and the rising + edge of cs_n. Setting this register to zero corresponds + to the minimum delay of one-half sck cycle. + +### CONFIGOPTS . CSNIDLE +Minimum idle time between commands. Indicates the minimum + number of sck half-cycles to hold cs_n high between commands. + Setting this register to zero creates a minimally-wide CS_N-high + pulse of one-half sck cycle. + +### CONFIGOPTS . CLKDIV +Core clock divider. Slows down subsequent SPI transactions by a + factor of (CLKDIV+1) relative to the core clock frequency. The + period of sck, T(sck) then becomes `2*(CLK_DIV+1)*T(core)` + +## CSID +Chip-Select ID + + Controls which device to target with the next command. This register + is passed to the core whenever [`COMMAND`](#command) is written. The core then + asserts cio_csb_o[[`CSID`](#csid)] during the execution of the command. +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CSID", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------| +| 31:0 | rw | 0x0 | CSID | Chip Select ID | + +## COMMAND +Command Register + + Parameters specific to each command segment. Unlike the [`CONFIGOPTS`](#configopts) multi-register, + there is only one command register for controlling all attached SPI devices +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0x1ffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CSAAT", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "SPEED", "bits": 2, "attr": ["wo"], "rotate": -90}, {"name": "DIRECTION", "bits": 2, "attr": ["wo"], "rotate": -90}, {"name": "LEN", "bits": 20, "attr": ["wo"], "rotate": 0}, {"bits": 7}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:---------------------------------| +| 31:25 | | | Reserved | +| 24:5 | wo | 0x0 | [LEN](#command--len) | +| 4:3 | wo | 0x0 | [DIRECTION](#command--direction) | +| 2:1 | wo | 0x0 | [SPEED](#command--speed) | +| 0 | wo | 0x0 | [CSAAT](#command--csaat) | + +### COMMAND . LEN +Segment Length. + + For read or write segments, this field controls the + number of 1-byte bursts to transmit and or receive in + this command segment. The number of cyles required + to send or received a byte will depend on [`COMMAND.SPEED.`](#command) + For dummy segments, ([`COMMAND.DIRECTION`](#command) == 0), this register + controls the number of dummy cycles to issue. + The number of bytes (or dummy cycles) in the segment will be + equal to [`COMMAND.LEN`](#command) + 1. + +### COMMAND . DIRECTION +The direction for the following command: "0" = Dummy cycles + (no TX/RX). "1" = Rx only, "2" = Tx only, "3" = Bidirectional + Tx/Rx (Standard SPI mode only). + +### COMMAND . SPEED +The speed for this command segment: "0" = Standard SPI. "1" = Dual SPI. + "2"=Quad SPI, "3": RESERVED. + +### COMMAND . CSAAT +**C**hip **S**elect **A**ctive **A**fter **T**ransaction. + If [`COMMAND.CSAAT`](#command) = 0, the chip select line is raised immediately + at the end of the command segment. + If [`COMMAND.CSAAT`](#command) = 1, the chip select line is left low at the + end of the current transaction segment. + This allows the creation of longer, more complete SPI transactions, + consisting of several separate segments for issuing instructions, + pausing for dummy cycles, and transmitting or receiving data from + the device. + +## RXDATA +SPI Receive Data. + + Reads from this window pull data from the RXFIFO. + + The serial order of bit transmission + is chosen to match SPI flash devices. Individual bytes + are always transmitted with the most significant bit first. + Only four-byte reads are supported. If ByteOrder = 0, + the first byte received is packed in the MSB of !!RXDATA. + For some processor architectures, this could lead to shuffling + of flash data as compared to how it is written in memory. + In which case, choosing ByteOrder = 1 can reverse the + byte-order of each data read, causing the first byte + received to be packed into the LSB of !!RXDATA. (Though within + each byte the most significant bit is always pulled + from the bus first.) + +- Word Aligned Offset Range: `0x24`to`0x24` +- Size (words): `1` +- Access: `ro` +- Byte writes are *not* supported. + +## TXDATA +SPI Transmit Data. + + Data written to this window is placed into the TXFIFO. + Byte-enables are supported for writes. + + The serial order of bit transmission + is chosen to match SPI flash devices. Individual bytes + are always transmitted with the most significant bit first. + Multi-byte writes are also supported, and if ByteOrder = 0, + the bits of !!TXDATA are transmitted strictly in order of + decreasing signficance (i.e. most signicant bit first). + For some processor architectures, this could lead to shuffling + of flash data as compared to how it is written in memory. + In which case, choosing ByteOrder = 1 can reverse the + byte-order of multi-byte data writes. (Though within + each byte the most significant bit is always sent first.) + +- Word Aligned Offset Range: `0x28`to`0x28` +- Size (words): `1` +- Access: `wo` +- Byte writes are supported. + +## ERROR_ENABLE +Controls which classes of errors raise an interrupt. +- Offset: `0x2c` +- Reset default: `0x1f` +- Reset mask: `0x1f` + +### Fields + +```wavejson +{"reg": [{"name": "CMDBUSY", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "OVERFLOW", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "UNDERFLOW", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CMDINVAL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CSIDINVAL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 27}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:5 | | | | Reserved | +| 4 | rw | 0x1 | CSIDINVAL | Invalid CSID: If this bit is set, the block sends an error interrupt whenever a command is submitted, but CSID exceeds NumCS. | +| 3 | rw | 0x1 | CMDINVAL | Invalid Command Errors: If this bit is set, the block sends an error interrupt whenever a command is sent with invalid values for [`COMMAND.SPEED`](#command) or [`COMMAND.DIRECTION.`](#command) | +| 2 | rw | 0x1 | UNDERFLOW | Underflow Errors: If this bit is set, the block sends an error interrupt whenever there is a read from [`RXDATA`](#rxdata) but the RX FIFO is empty. | +| 1 | rw | 0x1 | OVERFLOW | Overflow Errors: If this bit is set, the block sends an error interrupt whenever the TX FIFO overflows. | +| 0 | rw | 0x1 | CMDBUSY | Command Error: If this bit is set, the block sends an error interrupt whenever a command is issued while busy (i.e. a 1 is when [`STATUS.READY`](#status) is not asserted.) | + +## ERROR_STATUS +Indicates that any errors that have occurred. + When an error + occurs, the corresponding bit must be cleared here before + issuing any further commands. +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0x3f` + +### Fields + +```wavejson +{"reg": [{"name": "CMDBUSY", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "OVERFLOW", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "UNDERFLOW", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "CMDINVAL", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "CSIDINVAL", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "ACCESSINVAL", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"bits": 26}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:6 | | | | Reserved | +| 5 | rw1c | 0x0 | ACCESSINVAL | Indicates that TLUL attempted to write to TXDATA with no bytes enabled. Such 'zero byte' writes are not supported. | +| 4 | rw1c | 0x0 | CSIDINVAL | Indicates a command was attempted with an invalid value for [`CSID.`](#csid) | +| 3 | rw1c | 0x0 | CMDINVAL | Indicates an invalid command segment, meaning either an invalid value of [`COMMAND.SPEED`](#command) or a request for bidirectional data transfer at dual or quad speed | +| 2 | rw1c | 0x0 | UNDERFLOW | Indicates that firmware has attempted to read from [`RXDATA`](#rxdata) when the RX FIFO is empty. | +| 1 | rw1c | 0x0 | OVERFLOW | Indicates that firmware has overflowed the TX FIFO | +| 0 | rw1c | 0x0 | CMDBUSY | Indicates a write to [`COMMAND`](#command) when [`STATUS.READY`](#status) = 0. | + +## EVENT_ENABLE +Controls which classes of SPI events raise an interrupt. +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0x3f` + +### Fields + +```wavejson +{"reg": [{"name": "RXFULL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "TXEMPTY", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RXWM", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "TXWM", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "READY", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "IDLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 26}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:----------------------------------| +| 31:6 | | | Reserved | +| 5 | rw | 0x0 | [IDLE](#event_enable--idle) | +| 4 | rw | 0x0 | [READY](#event_enable--ready) | +| 3 | rw | 0x0 | [TXWM](#event_enable--txwm) | +| 2 | rw | 0x0 | [RXWM](#event_enable--rxwm) | +| 1 | rw | 0x0 | [TXEMPTY](#event_enable--txempty) | +| 0 | rw | 0x0 | [RXFULL](#event_enable--rxfull) | + +### EVENT_ENABLE . IDLE +Assert to send a spi_event interrupt whenever [`STATUS.ACTIVE`](#status) + goes low + +### EVENT_ENABLE . READY +Assert to send a spi_event interrupt whenever [`STATUS.READY`](#status) + goes high + +### EVENT_ENABLE . TXWM +Assert to send a spi_event interrupt whenever the number of 32-bit words in + the TX FIFO is less than [`CONTROL.TX_WATERMARK.`](#control) To prevent the + reassertion of this interrupt add more data to the TX FIFO, or + reduce [`CONTROL.TX_WATERMARK.`](#control) + +### EVENT_ENABLE . RXWM +Assert to send a spi_event interrupt whenever the number of 32-bit words in + the RX FIFO is greater than [`CONTROL.RX_WATERMARK.`](#control) To prevent the + reassertion of this interrupt, read more data from the RX FIFO, or + increase [`CONTROL.RX_WATERMARK.`](#control) + +### EVENT_ENABLE . TXEMPTY +Assert to send a spi_event interrupt whenever [`STATUS.TXEMPTY`](#status) + goes high + +### EVENT_ENABLE . RXFULL +Assert to send a spi_event interrupt whenever [`STATUS.RXFULL`](#status) + goes high + + + + + +## tagger + + + +### registers.md + +## Summary + +| Name | Offset | Length | Description | +|:---------------------------------------|:---------|---------:|:----------------------------------------| +| tagger_reg.[`PAT_COMMIT`](#PAT_COMMIT) | 0x0 | 4 | Partition configuration commit register | +| tagger_reg.[`PAT_ADDR_0`](#pat_addr) | 0x4 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_1`](#pat_addr) | 0x8 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_2`](#pat_addr) | 0xc | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_3`](#pat_addr) | 0x10 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_4`](#pat_addr) | 0x14 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_5`](#pat_addr) | 0x18 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_6`](#pat_addr) | 0x1c | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_7`](#pat_addr) | 0x20 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_8`](#pat_addr) | 0x24 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_9`](#pat_addr) | 0x28 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_10`](#pat_addr) | 0x2c | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_11`](#pat_addr) | 0x30 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_12`](#pat_addr) | 0x34 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_13`](#pat_addr) | 0x38 | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_14`](#pat_addr) | 0x3c | 4 | Partition address | +| tagger_reg.[`PAT_ADDR_15`](#pat_addr) | 0x40 | 4 | Partition address | +| tagger_reg.[`PATID_0`](#patid) | 0x44 | 4 | Partition ID | +| tagger_reg.[`PATID_1`](#patid) | 0x48 | 4 | Partition ID | +| tagger_reg.[`PATID_2`](#patid) | 0x4c | 4 | Partition ID | +| tagger_reg.[`ADDR_CONF`](#addr_conf) | 0x50 | 4 | Address encoding mode switch register | + +## PAT_COMMIT +Partition configuration commit register +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "commit_0", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 100}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | commit_0 | commit changes of partition configuration | + +## PAT_ADDR +Partition address +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:------------|:---------| +| PAT_ADDR_0 | 0x4 | +| PAT_ADDR_1 | 0x8 | +| PAT_ADDR_2 | 0xc | +| PAT_ADDR_3 | 0x10 | +| PAT_ADDR_4 | 0x14 | +| PAT_ADDR_5 | 0x18 | +| PAT_ADDR_6 | 0x1c | +| PAT_ADDR_7 | 0x20 | +| PAT_ADDR_8 | 0x24 | +| PAT_ADDR_9 | 0x28 | +| PAT_ADDR_10 | 0x2c | +| PAT_ADDR_11 | 0x30 | +| PAT_ADDR_12 | 0x34 | +| PAT_ADDR_13 | 0x38 | +| PAT_ADDR_14 | 0x3c | +| PAT_ADDR_15 | 0x40 | + + +### Fields + +```wavejson +{"reg": [{"name": "PAT_ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:-----------------------------------------| +| 31:0 | rw | 0x0 | PAT_ADDR | Single partition configurations: address | + +## PATID +Partition ID +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:--------|:---------| +| PATID_0 | 0x44 | +| PATID_1 | 0x48 | +| PATID_2 | 0x4c | + + +### Fields + +```wavejson +{"reg": [{"name": "PATID", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------| +| 31:0 | rw | 0x0 | PATID | Partition ID (PatID) for each partition, length determined by params | + +## ADDR_CONF +Address encoding mode switch register +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Instances + +| Name | Offset | +|:----------|:---------| +| ADDR_CONF | 0x50 | + + +### Fields + +```wavejson +{"reg": [{"name": "addr_conf", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:----------------------------------------------------------------------------| +| 31:0 | rw | 0x0 | addr_conf | 2 bits configuration for each partition. 2'b00: OFF, 2'b01: TOR, 2'b10: NA4 | + + + + + +## uart + + + +### registers.md + +## Summary + +| Name | Offset | Length | Description | +|:-------------------------------------|:---------|---------:|:-------------------------------------------------------------------| +| uart.[`INTR_STATE`](#intr_state) | 0x0 | 4 | Interrupt State Register | +| uart.[`INTR_ENABLE`](#intr_enable) | 0x4 | 4 | Interrupt Enable Register | +| uart.[`INTR_TEST`](#intr_test) | 0x8 | 4 | Interrupt Test Register | +| uart.[`ALERT_TEST`](#alert_test) | 0xc | 4 | Alert Test Register | +| uart.[`CTRL`](#ctrl) | 0x10 | 4 | UART control register | +| uart.[`STATUS`](#status) | 0x14 | 4 | UART live status register | +| uart.[`RDATA`](#rdata) | 0x18 | 4 | UART read data | +| uart.[`WDATA`](#wdata) | 0x1c | 4 | UART write data | +| uart.[`FIFO_CTRL`](#fifo_ctrl) | 0x20 | 4 | UART FIFO control register | +| uart.[`FIFO_STATUS`](#fifo_status) | 0x24 | 4 | UART FIFO status register | +| uart.[`OVRD`](#ovrd) | 0x28 | 4 | TX pin override control. Gives direct SW control over TX pin state | +| uart.[`VAL`](#val) | 0x2c | 4 | UART oversampled values | +| uart.[`TIMEOUT_CTRL`](#timeout_ctrl) | 0x30 | 4 | UART RX timeout control | + +## INTR_STATE +Interrupt State Register +- Offset: `0x0` +- Reset default: `0x101` +- Reset mask: `0x1ff` + +### Fields + +```wavejson +{"reg": [{"name": "tx_watermark", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "rx_watermark", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "tx_done", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "rx_overflow", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "rx_frame_err", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "rx_break_err", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "rx_timeout", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "rx_parity_err", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "tx_empty", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 23}], "config": {"lanes": 1, "fontsize": 10, "vspace": 150}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:---------------------------------------------------------------------------------------------------------------| +| 31:9 | | | | Reserved | +| 8 | ro | 0x1 | tx_empty | raised if the transmit FIFO is empty. | +| 7 | rw1c | 0x0 | rx_parity_err | raised if the receiver has detected a parity error. | +| 6 | rw1c | 0x0 | rx_timeout | raised if RX FIFO has characters remaining in the FIFO without being retrieved for the programmed time period. | +| 5 | rw1c | 0x0 | rx_break_err | raised if break condition has been detected on receive. | +| 4 | rw1c | 0x0 | rx_frame_err | raised if a framing error has been detected on receive. | +| 3 | rw1c | 0x0 | rx_overflow | raised if the receive FIFO has overflowed. | +| 2 | rw1c | 0x0 | tx_done | raised if the transmit FIFO has emptied and no transmit is ongoing. | +| 1 | ro | 0x0 | rx_watermark | raised if the receive FIFO is past the high-water mark. | +| 0 | ro | 0x1 | tx_watermark | raised if the transmit FIFO is past the high-water mark. | + +## INTR_ENABLE +Interrupt Enable Register +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0x1ff` + +### Fields + +```wavejson +{"reg": [{"name": "tx_watermark", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "rx_watermark", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "tx_done", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "rx_overflow", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "rx_frame_err", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "rx_break_err", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "rx_timeout", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "rx_parity_err", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "tx_empty", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 23}], "config": {"lanes": 1, "fontsize": 10, "vspace": 150}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:------------------------------------------------------------------------| +| 31:9 | | | | Reserved | +| 8 | rw | 0x0 | tx_empty | Enable interrupt when [`INTR_STATE.tx_empty`](#intr_state) is set. | +| 7 | rw | 0x0 | rx_parity_err | Enable interrupt when [`INTR_STATE.rx_parity_err`](#intr_state) is set. | +| 6 | rw | 0x0 | rx_timeout | Enable interrupt when [`INTR_STATE.rx_timeout`](#intr_state) is set. | +| 5 | rw | 0x0 | rx_break_err | Enable interrupt when [`INTR_STATE.rx_break_err`](#intr_state) is set. | +| 4 | rw | 0x0 | rx_frame_err | Enable interrupt when [`INTR_STATE.rx_frame_err`](#intr_state) is set. | +| 3 | rw | 0x0 | rx_overflow | Enable interrupt when [`INTR_STATE.rx_overflow`](#intr_state) is set. | +| 2 | rw | 0x0 | tx_done | Enable interrupt when [`INTR_STATE.tx_done`](#intr_state) is set. | +| 1 | rw | 0x0 | rx_watermark | Enable interrupt when [`INTR_STATE.rx_watermark`](#intr_state) is set. | +| 0 | rw | 0x0 | tx_watermark | Enable interrupt when [`INTR_STATE.tx_watermark`](#intr_state) is set. | + +## INTR_TEST +Interrupt Test Register +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0x1ff` + +### Fields + +```wavejson +{"reg": [{"name": "tx_watermark", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "rx_watermark", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "tx_done", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "rx_overflow", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "rx_frame_err", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "rx_break_err", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "rx_timeout", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "rx_parity_err", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "tx_empty", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 23}], "config": {"lanes": 1, "fontsize": 10, "vspace": 150}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:-----------------------------------------------------------------| +| 31:9 | | | | Reserved | +| 8 | wo | 0x0 | tx_empty | Write 1 to force [`INTR_STATE.tx_empty`](#intr_state) to 1. | +| 7 | wo | 0x0 | rx_parity_err | Write 1 to force [`INTR_STATE.rx_parity_err`](#intr_state) to 1. | +| 6 | wo | 0x0 | rx_timeout | Write 1 to force [`INTR_STATE.rx_timeout`](#intr_state) to 1. | +| 5 | wo | 0x0 | rx_break_err | Write 1 to force [`INTR_STATE.rx_break_err`](#intr_state) to 1. | +| 4 | wo | 0x0 | rx_frame_err | Write 1 to force [`INTR_STATE.rx_frame_err`](#intr_state) to 1. | +| 3 | wo | 0x0 | rx_overflow | Write 1 to force [`INTR_STATE.rx_overflow`](#intr_state) to 1. | +| 2 | wo | 0x0 | tx_done | Write 1 to force [`INTR_STATE.tx_done`](#intr_state) to 1. | +| 1 | wo | 0x0 | rx_watermark | Write 1 to force [`INTR_STATE.rx_watermark`](#intr_state) to 1. | +| 0 | wo | 0x0 | tx_watermark | Write 1 to force [`INTR_STATE.tx_watermark`](#intr_state) to 1. | + +## ALERT_TEST +Alert Test Register +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "fatal_fault", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:-------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | fatal_fault | Write 1 to trigger one alert event of this kind. | + +## CTRL +UART control register +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffff03f7` + +### Fields + +```wavejson +{"reg": [{"name": "TX", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RX", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "NF", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 1}, {"name": "SLPBK", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "LLPBK", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "PARITY_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "PARITY_ODD", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RXBLVL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 6}, {"name": "NCO", "bits": 16, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:--------------------------------| +| 31:16 | rw | 0x0 | [NCO](#ctrl--nco) | +| 15:10 | | | Reserved | +| 9:8 | rw | 0x0 | [RXBLVL](#ctrl--rxblvl) | +| 7 | rw | 0x0 | [PARITY_ODD](#ctrl--parity_odd) | +| 6 | rw | 0x0 | [PARITY_EN](#ctrl--parity_en) | +| 5 | rw | 0x0 | [LLPBK](#ctrl--llpbk) | +| 4 | rw | 0x0 | [SLPBK](#ctrl--slpbk) | +| 3 | | | Reserved | +| 2 | rw | 0x0 | [NF](#ctrl--nf) | +| 1 | rw | 0x0 | [RX](#ctrl--rx) | +| 0 | rw | 0x0 | [TX](#ctrl--tx) | + +### CTRL . NCO +BAUD clock rate control. + +### CTRL . RXBLVL +Trigger level for RX break detection. Sets the number of character +times the line must be low to detect a break. + +| Value | Name | Description | +|:--------|:--------|:--------------| +| 0x0 | break2 | 2 characters | +| 0x1 | break4 | 4 characters | +| 0x2 | break8 | 8 characters | +| 0x3 | break16 | 16 characters | + + +### CTRL . PARITY_ODD +If PARITY_EN is true, this determines the type, 1 for odd parity, 0 for even. + +### CTRL . PARITY_EN +If true, parity is enabled in both RX and TX directions. + +### CTRL . LLPBK +Line loopback enable. + +If this bit is turned on, incoming bits are forwarded to TX for testing purpose. +See Block Diagram. Note that the internal design sees RX value as 1 always if line +loopback is enabled. + +### CTRL . SLPBK +System loopback enable. + +If this bit is turned on, any outgoing bits to TX are received through RX. +See Block Diagram. Note that the TX line goes 1 if System loopback is enabled. + +### CTRL . NF +RX noise filter enable. +If the noise filter is enabled, RX line goes through the 3-tap +repetition code. It ignores single IP clock period noise. + +### CTRL . RX +RX enable + +### CTRL . TX +TX enable + +## STATUS +UART live status register +- Offset: `0x14` +- Reset default: `0x3c` +- Reset mask: `0x3f` + +### Fields + +```wavejson +{"reg": [{"name": "TXFULL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RXFULL", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "TXEMPTY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "TXIDLE", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RXIDLE", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "RXEMPTY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 26}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:----------------------------------------------------| +| 31:6 | | | | Reserved | +| 5 | ro | 0x1 | RXEMPTY | RX FIFO is empty | +| 4 | ro | 0x1 | RXIDLE | RX is idle | +| 3 | ro | 0x1 | TXIDLE | TX FIFO is empty and all bits have been transmitted | +| 2 | ro | 0x1 | TXEMPTY | TX FIFO is empty | +| 1 | ro | x | RXFULL | RX buffer is full | +| 0 | ro | x | TXFULL | TX buffer is full | + +## RDATA +UART read data +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "RDATA", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:8 | | | | Reserved | +| 7:0 | ro | x | RDATA | | + +## WDATA +UART write data +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "WDATA", "bits": 8, "attr": ["wo"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:8 | | | | Reserved | +| 7:0 | wo | 0x0 | WDATA | | + +## FIFO_CTRL +UART FIFO control register +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "RXRST", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "TXRST", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RXILVL", "bits": 3, "attr": ["rw"], "rotate": -90}, {"name": "TXILVL", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------| +| 31:8 | | | Reserved | +| 7:5 | rw | 0x0 | [TXILVL](#fifo_ctrl--txilvl) | +| 4:2 | rw | 0x0 | [RXILVL](#fifo_ctrl--rxilvl) | +| 1 | wo | 0x0 | [TXRST](#fifo_ctrl--txrst) | +| 0 | wo | 0x0 | [RXRST](#fifo_ctrl--rxrst) | + +### FIFO_CTRL . TXILVL +Trigger level for TX interrupts. If the FIFO depth is less than the setting, it +raises tx_watermark interrupt. + +| Value | Name | Description | +|:--------|:--------|:--------------| +| 0x0 | txlvl1 | 1 character | +| 0x1 | txlvl2 | 2 characters | +| 0x2 | txlvl4 | 4 characters | +| 0x3 | txlvl8 | 8 characters | +| 0x4 | txlvl16 | 16 characters | + +Other values are reserved. + +### FIFO_CTRL . RXILVL +Trigger level for RX interrupts. If the FIFO depth is greater than or equal to +the setting, it raises rx_watermark interrupt. + +| Value | Name | Description | +|:--------|:--------|:--------------| +| 0x0 | rxlvl1 | 1 character | +| 0x1 | rxlvl2 | 2 characters | +| 0x2 | rxlvl4 | 4 characters | +| 0x3 | rxlvl8 | 8 characters | +| 0x4 | rxlvl16 | 16 characters | +| 0x5 | rxlvl32 | 32 characters | +| 0x6 | rxlvl62 | 62 characters | + +Other values are reserved. + +### FIFO_CTRL . TXRST +TX fifo reset. Write 1 to the register resets TX_FIFO. Read returns 0 + +### FIFO_CTRL . RXRST +RX fifo reset. Write 1 to the register resets RX_FIFO. Read returns 0 + +## FIFO_STATUS +UART FIFO status register +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0xff00ff` + +### Fields + +```wavejson +{"reg": [{"name": "TXLVL", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 8}, {"name": "RXLVL", "bits": 8, "attr": ["ro"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------| +| 31:24 | | | | Reserved | +| 23:16 | ro | x | RXLVL | Current fill level of RX fifo | +| 15:8 | | | | Reserved | +| 7:0 | ro | x | TXLVL | Current fill level of TX fifo | + +## OVRD +TX pin override control. Gives direct SW control over TX pin state +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "TXEN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "TXVAL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------| +| 31:2 | | | | Reserved | +| 1 | rw | 0x0 | TXVAL | Write to set the value of the TX pin | +| 0 | rw | 0x0 | TXEN | Enable TX pin override control | + +## VAL +UART oversampled values +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "RX", "bits": 16, "attr": ["ro"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------| +| 31:16 | | | | Reserved | +| 15:0 | ro | x | RX | Last 16 oversampled values of RX. Most recent bit is bit 0, oldest 15. | + +## TIMEOUT_CTRL +UART RX timeout control +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0x80ffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VAL", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 7}, {"name": "EN", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------| +| 31 | rw | 0x0 | EN | Enable RX timeout feature | +| 30:24 | | | | Reserved | +| 23:0 | rw | 0x0 | VAL | RX timeout value in UART bit times | + + + + + +## unbent + + + +### registers.md + +## Summary + +| Name | Offset | Length | Description | +|:---------------------------------------------|:---------|---------:|:------------------------------------| +| bus_err_unit.[`err_addr`](#err_addr) | 0x0 | 4 | Address of the bus error | +| bus_err_unit.[`err_addr_top`](#err_addr_top) | 0x4 | 4 | Top of the address of the bus error | +| bus_err_unit.[`err_code`](#err_code) | 0x8 | 4 | Error code of the bus error | +| bus_err_unit.[`meta`](#meta) | 0xc | 4 | Meta information of the bus error | + +## err_addr +Address of the bus error +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "err_addr", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:-------------------------| +| 31:0 | ro | x | err_addr | Address of the bus error | + +## err_addr_top +Top of the address of the bus error +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "err_addr", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:-------------------------| +| 31:0 | ro | x | err_addr | Address of the bus error | + +## err_code +Error code of the bus error +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "err_code", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:----------------------------| +| 31:0 | ro | x | err_code | Error code of the bus error | + +## meta +Meta information of the bus error +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "meta", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------| +| 31:0 | ro | x | meta | Meta information of the bus error | + + + + + +## vga + + + +### registers.md + +## Summary + +| Name | Offset | Length | Description | +|:----------------------------------------------------------|:---------|---------:|:------------------------------------------| +| axi_vga.[`CONTROL`](#control) | 0x0 | 4 | Control register | +| axi_vga.[`CLK_DIV`](#clk_div) | 0x4 | 4 | Clock divider | +| axi_vga.[`HORI_VISIBLE_SIZE`](#hori_visible_size) | 0x8 | 4 | Size of horizontal visible area | +| axi_vga.[`HORI_FRONT_PORCH_SIZE`](#hori_front_porch_size) | 0xc | 4 | Size of horizontal front porch | +| axi_vga.[`HORI_SYNC_SIZE`](#hori_sync_size) | 0x10 | 4 | Size of horizontal sync area | +| axi_vga.[`HORI_BACK_PORCH_SIZE`](#hori_back_porch_size) | 0x14 | 4 | Size of horizontal back porch | +| axi_vga.[`VERT_VISIBLE_SIZE`](#vert_visible_size) | 0x18 | 4 | Size of vertical visible area | +| axi_vga.[`VERT_FRONT_PORCH_SIZE`](#vert_front_porch_size) | 0x1c | 4 | Size of vertical front porch | +| axi_vga.[`VERT_SYNC_SIZE`](#vert_sync_size) | 0x20 | 4 | Size of vertical sync area | +| axi_vga.[`VERT_BACK_PORCH_SIZE`](#vert_back_porch_size) | 0x24 | 4 | Size of vertical back porch | +| axi_vga.[`START_ADDR_LOW`](#start_addr_low) | 0x28 | 4 | Low end of start address of frame buffer | +| axi_vga.[`START_ADDR_HIGH`](#start_addr_high) | 0x2c | 4 | High end of start address of frame buffer | +| axi_vga.[`FRAME_SIZE`](#frame_size) | 0x30 | 4 | Size of whole frame | +| axi_vga.[`BURST_LEN`](#burst_len) | 0x34 | 4 | Number of beats in a burst | + +## CONTROL +Control register +- Offset: `0x0` +- Reset default: `0x6` +- Reset mask: `0x7` + +### Fields + +```wavejson +{"reg": [{"name": "enable", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "hsync_pol", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "vsync_pol", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 29}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-------------------------------------------------------| +| 31:3 | | | | Reserved | +| 2 | rw | 0x1 | vsync_pol | Sets polarity for VSYNC 0 - Active Low 1 - Active High | +| 1 | rw | 0x1 | hsync_pol | Sets polarity for HSYNC 0 - Active Low 1 - Active High | +| 0 | rw | 0x0 | enable | Enables FSM. | + +## CLK_DIV +Clock divider +- Offset: `0x4` +- Reset default: `0x1` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "clk_div", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:---------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x1 | clk_div | Clock divider. | + +## HORI_VISIBLE_SIZE +Size of horizontal visible area +- Offset: `0x8` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "hori_visible_size", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:---------------------------------| +| 31:0 | rw | 0x1 | hori_visible_size | Size of horizontal visible area. | + +## HORI_FRONT_PORCH_SIZE +Size of horizontal front porch +- Offset: `0xc` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "hori_front_porch_size", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:--------------------------------| +| 31:0 | rw | 0x1 | hori_front_porch_size | Size of horizontal front porch. | + +## HORI_SYNC_SIZE +Size of horizontal sync area +- Offset: `0x10` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "hori_sync_size", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:------------------------------| +| 31:0 | rw | 0x1 | hori_sync_size | Size of horizontal sync area. | + +## HORI_BACK_PORCH_SIZE +Size of horizontal back porch +- Offset: `0x14` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "hori_back_porch_size", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:-------------------------------| +| 31:0 | rw | 0x1 | hori_back_porch_size | Size of horizontal back porch. | + +## VERT_VISIBLE_SIZE +Size of vertical visible area +- Offset: `0x18` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "vert_visible_size", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:-------------------------------| +| 31:0 | rw | 0x1 | vert_visible_size | Size of vertical visible area. | + +## VERT_FRONT_PORCH_SIZE +Size of vertical front porch +- Offset: `0x1c` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "vert_front_porch_size", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:------------------------------| +| 31:0 | rw | 0x1 | vert_front_porch_size | Size of vertical front porch. | + +## VERT_SYNC_SIZE +Size of vertical sync area +- Offset: `0x20` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "vert_sync_size", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:----------------------------| +| 31:0 | rw | 0x1 | vert_sync_size | Size of vertical sync area. | + +## VERT_BACK_PORCH_SIZE +Size of vertical back porch +- Offset: `0x24` +- Reset default: `0x1` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "vert_back_porch_size", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:-----------------------------| +| 31:0 | rw | 0x1 | vert_back_porch_size | Size of vertical back porch. | + +## START_ADDR_LOW +Low end of start address of frame buffer +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "start_addr_low", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:------------------------------------------| +| 31:0 | rw | 0x0 | start_addr_low | Low end of start address of frame buffer. | + +## START_ADDR_HIGH +High end of start address of frame buffer +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "start_addr_high", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------|:-------------------------------------------| +| 31:0 | rw | 0x0 | start_addr_high | High end of start address of frame buffer. | + +## FRAME_SIZE +Size of whole frame +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "frame_size", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:---------------------| +| 31:0 | rw | 0x0 | frame_size | Size of whole frame. | + +## BURST_LEN +Number of beats in a burst +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "burst_len", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:----------------------------| +| 31:8 | | | | Reserved | +| 7:0 | rw | 0x0 | burst_len | Number of beats in a burst. | + + + + + +## watchdog_timer + + + +### registers.md + +## Summary + +| Name | Offset | Length | Description | +|:------------------------------------------------|:---------|---------:|:---------------------------------------| +| aon_timer.[`ALERT_TEST`](#alert_test) | 0x0 | 4 | Alert Test Register | +| aon_timer.[`WKUP_CTRL`](#wkup_ctrl) | 0x4 | 4 | Wakeup Timer Control register | +| aon_timer.[`WKUP_THOLD`](#wkup_thold) | 0x8 | 4 | Wakeup Timer Threshold Register | +| aon_timer.[`WKUP_COUNT`](#wkup_count) | 0xc | 4 | Wakeup Timer Count Register | +| aon_timer.[`WDOG_REGWEN`](#wdog_regwen) | 0x10 | 4 | Watchdog Timer Write Enable Register | +| aon_timer.[`WDOG_CTRL`](#wdog_ctrl) | 0x14 | 4 | Watchdog Timer Control register | +| aon_timer.[`WDOG_BARK_THOLD`](#wdog_bark_thold) | 0x18 | 4 | Watchdog Timer Bark Threshold Register | +| aon_timer.[`WDOG_BITE_THOLD`](#wdog_bite_thold) | 0x1c | 4 | Watchdog Timer Bite Threshold Register | +| aon_timer.[`WDOG_COUNT`](#wdog_count) | 0x20 | 4 | Watchdog Timer Count Register | +| aon_timer.[`INTR_STATE`](#intr_state) | 0x24 | 4 | Interrupt State Register | +| aon_timer.[`INTR_TEST`](#intr_test) | 0x28 | 4 | Interrupt Test Register | +| aon_timer.[`WKUP_CAUSE`](#wkup_cause) | 0x2c | 4 | Wakeup request status | + +## ALERT_TEST +Alert Test Register +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "fatal_fault", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:-------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | fatal_fault | Write 1 to trigger one alert event of this kind. | + +## WKUP_CTRL +Wakeup Timer Control register +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0x1fff` + +### Fields + +```wavejson +{"reg": [{"name": "enable", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "prescaler", "bits": 12, "attr": ["rw"], "rotate": 0}, {"bits": 19}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-------------------------------------------| +| 31:13 | | | | Reserved | +| 12:1 | rw | 0x0 | prescaler | Pre-scaler value for wakeup timer count | +| 0 | rw | 0x0 | enable | When set to 1, the wakeup timer will count | + +## WKUP_THOLD +Wakeup Timer Threshold Register +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "threshold", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:----------------------------------------------------------| +| 31:0 | rw | 0x0 | threshold | The count at which a wakeup interrupt should be generated | + +## WKUP_COUNT +Wakeup Timer Count Register +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "count", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------| +| 31:0 | rw | 0x0 | count | The current wakeup counter value | + +## WDOG_REGWEN +Watchdog Timer Write Enable Register +- Offset: `0x10` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "regwen", "bits": 1, "attr": ["rw0c"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw0c | 0x1 | regwen | Once cleared, the watchdog configuration will be locked until the next reset | + +## WDOG_CTRL +Watchdog Timer Control register +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0x3` +- Register enable: [`WDOG_REGWEN`](#wdog_regwen) + +### Fields + +```wavejson +{"reg": [{"name": "enable", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "pause_in_sleep", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 160}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:--------------------------------------------------------------| +| 31:2 | | | | Reserved | +| 1 | rw | 0x0 | pause_in_sleep | When set to 1, the watchdog timer will not count during sleep | +| 0 | rw | 0x0 | enable | When set to 1, the watchdog timer will count | + +## WDOG_BARK_THOLD +Watchdog Timer Bark Threshold Register +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` +- Register enable: [`WDOG_REGWEN`](#wdog_regwen) + +### Fields + +```wavejson +{"reg": [{"name": "threshold", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-----------------------------------------------------------------| +| 31:0 | rw | 0x0 | threshold | The count at which a watchdog bark interrupt should be generated | + +## WDOG_BITE_THOLD +Watchdog Timer Bite Threshold Register +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` +- Register enable: [`WDOG_REGWEN`](#wdog_regwen) + +### Fields + +```wavejson +{"reg": [{"name": "threshold", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:-------------------------------------------------------------| +| 31:0 | rw | 0x0 | threshold | The count at which a watchdog bite reset should be generated | + +## WDOG_COUNT +Watchdog Timer Count Register +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "count", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------| +| 31:0 | rw | 0x0 | count | The current watchdog counter value | + +## INTR_STATE +Interrupt State Register +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "wkup_timer_expired", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"name": "wdog_timer_bark", "bits": 1, "attr": ["rw1c"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 200}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------|:-----------------------------------------------------------| +| 31:2 | | | | Reserved | +| 1 | rw1c | 0x0 | wdog_timer_bark | Raised if the watchdog timer has hit the bark threshold | +| 0 | rw1c | 0x0 | wkup_timer_expired | Raised if the wakeup timer has hit the specified threshold | + +## INTR_TEST +Interrupt Test Register +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "wkup_timer_expired", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "wdog_timer_bark", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 200}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------|:----------------------------------------------| +| 31:2 | | | | Reserved | +| 1 | wo | x | wdog_timer_bark | Write 1 to force wdog_timer_bark interrupt | +| 0 | wo | x | wkup_timer_expired | Write 1 to force wkup_timer_expired interrupt | + +## WKUP_CAUSE +Wakeup request status +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "cause", "bits": 1, "attr": ["rw0c"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | rw0c | 0x0 | cause | AON timer requested wakeup, write 0 to clear | + + + diff --git a/docs/um/arch.md b/docs/um/arch.md index 4e46ed2c..4f26926a 100644 --- a/docs/um/arch.md +++ b/docs/um/arch.md @@ -69,20 +69,20 @@ clarity. |--------------------------|-------------------------|------------------|----------|-----------------|---------------|-------------|--------------|----------------------------------------------------------------------| | **Internal to Cheshire** | | | | | | | | | | `0x0000_0000` | `0x0004_0000` | `0x04_0000` | 256 KiB | (debug) | | | Debug | Debug CVA6 | -| `0x0004_0000` | `0x0100_0000` | | | | | | *Reserved* | | -| `0x0100_0000` | `0x0100_1000` | `0x00_1000` | 4 KiB | rw | | | Config | AXI DMA Config | +| `0x0004_0000` | `0x0100_0000` | | | | | | *Reserved* | | +| `0x0100_0000` | `0x0100_1000` | `0x00_1000` | 4 KiB | rw | | | Config | carfield/docs/um/ip/axi_dma_config/doc/idma_desc64_frontend_doc Config | | `0x0100_1000` | `0x0200_0000` | | | | | | *Reserved* | | | `0x0200_0000` | `0x0204_0000` | `0x04_0000` | 256 KiB | rx | | | Memory | Boot ROM | | `0x0204_0000` | `0x0208_0000` | `0x04_0000` | 256 KiB | rw | | | Irq | CLINT | -| `0x0208_0000` | `0x020c_0000` | `0x04_0000` | 256 KiB | rw | | | Irq | IRQ Routing | -| `0x020c_0000` | `0x0210_0000` | `0x04_0000` | 256 KiB | rw | | | Irq | AXI-REALM unit | +| `0x0208_0000` | `0x020c_0000` | `0x04_0000` | 256 KiB | rw | | | Irq | carfield/docs/um/ip/irq_router/doc/registers.md | +| `0x020c_0000` | `0x0210_0000` | `0x04_0000` | 256 KiB | rw | | | Irq | carfield/docs/um/ip/axi_realm/doc/registers.md | | `0x020c_0000` | `0x0300_0000` | | | | | | *Reserved* | | -| `0x0300_0000` | `0x0300_1000` | `0x00_1000` | 4 KiB | rw | | | Config | Cheshire PCRs | +| `0x0300_0000` | `0x0300_1000` | `0x00_1000` | 4 KiB | rw | | | Config | carfield/docs/um/ip/cheshire/doc/registers.md | | `0x0300_1000` | `0x0300_2000` | `0x00_1000` | 4 KiB | rw | | | Config | LLC | -| `0x0300_2000` | `0x0300_3000` | `0x00_1000` | 4 KiB | rw | | | I/O | [UART](https://opentitan.org/book/hw/ip/uart/doc/registers.html) | -| `0x0300_3000` | `0x0300_4000` | `0x00_1000` | 4 KiB | rw | | | I/O | [I2C](https://opentitan.org/book/hw/ip/i2c/doc/registers.html) | -| `0x0300_4000` | `0x0300_5000` | `0x00_1000` | 4 KiB | rw | | | I/O | [SPIM](https://opentitan.org/book/hw/ip/spi_host/doc/registers.html) | -| `0x0300_5000` | `0x0300_6000` | `0x00_1000` | 4 KiB | rw | | | I/O | [GPIO](https://opentitan.org/book/hw/ip/gpio/doc/registers.html) | +| `0x0300_2000` | `0x0300_3000` | `0x00_1000` | 4 KiB | rw | | | I/O | carfield/docs/um/ip/uart/doc/registers.md | +| `0x0300_3000` | `0x0300_4000` | `0x00_1000` | 4 KiB | rw | | | I/O | carfield/docs/um/ip/i2c/doc/registers.md | +| `0x0300_4000` | `0x0300_5000` | `0x00_1000` | 4 KiB | rw | | | I/O | carfield/docs/um/ip/spim/doc/registers.md | +| `0x0300_5000` | `0x0300_6000` | `0x00_1000` | 4 KiB | rw | | | I/O | carfield/docs/um/ip/gpio/doc/registers.md | | `0x0300_6000` | `0x0300_7000` | `0x00_1000` | 4 KiB | rw | | | Config | Serial Link | | `0x0300_7000` | `0x0300_8000` | `0x00_1000` | 4 KiB | rw | | | Config | VGA | | `0x0300_8000` | `0x0300_A000` | `0x00_1000` | 8 KiB | rw | | | Config | UNBENT (bus error unit) | diff --git a/docs/um/ip/carfield_regs/data/carfield_regs_Doc.hjson b/docs/um/ip/carfield_regs/data/carfield_regs_Doc.hjson new file mode 100644 index 00000000..dad20d5d --- /dev/null +++ b/docs/um/ip/carfield_regs/data/carfield_regs_Doc.hjson @@ -0,0 +1,713 @@ +// Copyright lowRISC contributors (OpenTitan project). +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 +// +// Robert Balas +// Luca Valente +{ + name: "carfield", + cip_id: "2", + version: "1.0.1", + clocking: [ + {clock: "clk_i", reset: "rst_ni", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device" } + ], + regwidth: "32", + registers :[ + + { name: "VERSION0", + desc: "Cheshire sha256 commit", + swaccess: "ro", + hwaccess: "none", + resval: "0", + hwqe: "0", + fields: [ + { bits: "31:0" } + ], + } + + { name: "VERSION1", + desc: "Safety Island sha256 commit", + swaccess: "ro", + hwaccess: "none", + resval: "0", + hwqe: "0", + fields: [ + { bits: "31:0" } + ], + } + + { name: "VERSION2", + desc: "Security Island sha256 commit", + swaccess: "ro", + hwaccess: "none", + resval: "0", + hwqe: "0", + fields: [ + { bits: "31:0" } + ], + } + + { name: "VERSION3", + desc: "PULP Cluster sha256 commit", + swaccess: "ro", + hwaccess: "none", + resval: "0", + hwqe: "0", + fields: [ + { bits: "31:0" } + ], + } + + { name: "VERSION4", + desc: "Spatz CLuster sha256 commit", + swaccess: "ro", + hwaccess: "none", + resval: "0", + hwqe: "0", + fields: [ + { bits: "31:0" } + ], + } + + { name: "JEDEC_IDCODE", + desc: "JEDEC ID CODE -TODO assign-", + swaccess: "rw", + hwaccess: "none", + resval: "0", + hwqe: "0", + fields: [ + { bits: "31:0" } + ], + } + + { name: "GENERIC_SCRATCH0", + desc: "Scratch", + swaccess: "rw", + hwaccess: "hrw", + resval: "0", + hwqe: "0", + fields: [ + { bits: "31:0" } + ], + } + + { name: "GENERIC_SCRATCH1", + desc: "Scratch", + swaccess: "rw", + hwaccess: "hrw", + resval: "0", + hwqe: "0", + fields: [ + { bits: "31:0" } + ], + } + + { name: "HOST_RST", + desc: "Host Domain reset -active high, inverted in HW-", + swaccess: "ro", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "PERIPH_RST", + desc: "Periph Domain reset -active high, inverted in HW-", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SAFETY_ISLAND_RST", + desc: "Safety Island reset -active high, inverted in HW-", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SECURITY_ISLAND_RST", + desc: "Security Island reset -active high, inverted in HW-", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "PULP_CLUSTER_RST", + desc: "PULP Cluster reset -active high, inverted in HW-", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SPATZ_CLUSTER_RST", + desc: "Spatz Cluster reset -active high, inverted in HW-", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "L2_RST", + desc: "L2 reset -active high, inverted in HW-", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "PERIPH_ISOLATE", + desc: "Periph Domain AXI isolate", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SAFETY_ISLAND_ISOLATE", + desc: "Safety Island AXI isolate", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SECURITY_ISLAND_ISOLATE", + desc: "Security Island AXI isolate", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "PULP_CLUSTER_ISOLATE", + desc: "PULP Cluster AXI isolate", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SPATZ_CLUSTER_ISOLATE", + desc: "Spatz Cluster AXI isolate", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "L2_ISOLATE", + desc: "L2 AXI isolate", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "PERIPH_ISOLATE_STATUS", + desc: "Periph Domain AXI isolate status", + swaccess: "rw", + hwaccess: "hwo", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SAFETY_ISLAND_ISOLATE_STATUS", + desc: "Safety Island AXI isolate status", + swaccess: "rw", + hwaccess: "hwo", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SECURITY_ISLAND_ISOLATE_STATUS", + desc: "Security Island AXI isolate status", + swaccess: "rw", + hwaccess: "hwo", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "PULP_CLUSTER_ISOLATE_STATUS", + desc: "PULP Cluster AXI isolate status", + swaccess: "rw", + hwaccess: "hwo", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SPATZ_CLUSTER_ISOLATE_STATUS", + desc: "Spatz Cluster AXI isolate status", + swaccess: "rw", + hwaccess: "hwo", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "L2_ISOLATE_STATUS", + desc: "L2 AXI isolate status", + swaccess: "rw", + hwaccess: "hwo", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "PERIPH_CLK_EN", + desc: "Periph Domain clk gate enable", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SAFETY_ISLAND_CLK_EN", + desc: "Safety Island clk gate enable", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SECURITY_ISLAND_CLK_EN", + desc: "Security Island clk gate enable", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "PULP_CLUSTER_CLK_EN", + desc: "PULP Cluster clk gate enable", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SPATZ_CLUSTER_CLK_EN", + desc: "Spatz Cluster clk gate enable", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "L2_CLK_EN", + desc: "Shared L2 memory clk gate enable", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "PERIPH_CLK_SEL", + desc: "Periph Domain pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll)", + swaccess: "rw", + hwaccess: "hro", + resval: "2", + hwqe: "0", + fields: [ + { bits: "1:0" } + ], + } + + { name: "SAFETY_ISLAND_CLK_SEL", + desc: "Safety Island pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll)", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "0", + fields: [ + { bits: "1:0" } + ], + } + + { name: "SECURITY_ISLAND_CLK_SEL", + desc: "Security Island pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll)", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "0", + fields: [ + { bits: "1:0" } + ], + } + + { name: "PULP_CLUSTER_CLK_SEL", + desc: "PULP Cluster pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll)", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "0", + fields: [ + { bits: "1:0" } + ], + } + + { name: "SPATZ_CLUSTER_CLK_SEL", + desc: "Spatz Cluster pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll)", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "0", + fields: [ + { bits: "1:0" } + ], + } + + { name: "L2_CLK_SEL", + desc: "L2 Memory pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll)", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "0", + fields: [ + { bits: "1:0" } + ], + } + + { name: "PERIPH_CLK_DIV_VALUE", + desc: "Periph Domain clk divider value", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "1", + fields: [ + { bits: "23:0" } + ], + } + + { name: "SAFETY_ISLAND_CLK_DIV_VALUE", + desc: "Safety Island clk divider value", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "1", + fields: [ + { bits: "23:0" } + ], + } + + { name: "SECURITY_ISLAND_CLK_DIV_VALUE", + desc: "Security Island clk divider value", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "1", + fields: [ + { bits: "23:0" } + ], + } + + { name: "PULP_CLUSTER_CLK_DIV_VALUE", + desc: "PULP Cluster clk divider value", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "1", + fields: [ + { bits: "23:0" } + ], + } + + { name: "SPATZ_CLUSTER_CLK_DIV_VALUE", + desc: "Spatz Cluster clk divider value", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "1", + fields: [ + { bits: "23:0" } + ], + } + + { name: "L2_CLK_DIV_VALUE", + desc: "L2 Memory clk divider value", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "1", + fields: [ + { bits: "23:0" } + ], + } + + { name: "HOST_FETCH_ENABLE", + desc: "Host Domain fetch enable", + swaccess: "ro", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SAFETY_ISLAND_FETCH_ENABLE", + desc: "Safety Island fetch enable", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SECURITY_ISLAND_FETCH_ENABLE", + desc: "Security Island fetch enable", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "PULP_CLUSTER_FETCH_ENABLE", + desc: "PULP Cluster fetch enable", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SPATZ_CLUSTER_DEBUG_REQ", + desc: "Spatz Cluster debug req", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "1:0" } + ], + } + + { name: "HOST_BOOT_ADDR", + desc: "Host boot address", + swaccess: "rw", + hwaccess: "hro", + resval: "0x1000", + hwqe: "0", + fields: [ + { bits: "31:0" } + ], + } + + { name: "SAFETY_ISLAND_BOOT_ADDR", + desc: "Safety Island boot address", + swaccess: "rw", + hwaccess: "hro", + resval: "0x70000000", + hwqe: "0", + fields: [ + { bits: "31:0" } + ], + } + + { name: "SECURITY_ISLAND_BOOT_ADDR", + desc: "Security Island boot address", + swaccess: "rw", + hwaccess: "hro", + resval: "0x70000000", + hwqe: "0", + fields: [ + { bits: "31:0" } + ], + } + + { name: "PULP_CLUSTER_BOOT_ADDR", + desc: "PULP Cluster boot address", + swaccess: "rw", + hwaccess: "hro", + resval: "0x70000000", + hwqe: "0", + fields: [ + { bits: "31:0" } + ], + } + + { name: "SPATZ_CLUSTER_BOOT_ADDR", + desc: "Spatz Cluster boot address", + swaccess: "rw", + hwaccess: "hro", + resval: "0x70000000", + hwqe: "0", + fields: [ + { bits: "31:0" } + ], + } + + { name: "PULP_CLUSTER_BOOT_ENABLE", + desc: "PULP Cluster boot enable", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "SPATZ_CLUSTER_BUSY", + desc: "Spatz Cluster busy", + swaccess: "ro", + hwaccess: "hrw", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "PULP_CLUSTER_BUSY", + desc: "PULP Cluster busy", + swaccess: "ro", + hwaccess: "hrw", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "PULP_CLUSTER_EOC", + desc: "PULP Cluster end of computation", + swaccess: "ro", + hwaccess: "hrw", + resval: "0", + hwqe: "0", + fields: [ + { bits: "0:0" } + ], + } + + { name: "ETH_RGMII_PHY_CLK_DIV_EN", + desc: "Ethernet RGMII PHY clock divider enable bit", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "1", + fields: [ + { bits: "0:0" } + ], + } + + { name: "ETH_RGMII_PHY_CLK_DIV_VALUE", + desc: "Ethernet RGMII PHY clock divider value", + swaccess: "rw", + hwaccess: "hro", + resval: "100", + hwqe: "1", + fields: [ + { bits: "19:0" } + ], + } + + { name: "ETH_MDIO_CLK_DIV_EN", + desc: "Ethernet MDIO clock divider enable bit", + swaccess: "rw", + hwaccess: "hro", + resval: "1", + hwqe: "1", + fields: [ + { bits: "0:0" } + ], + } + + { name: "ETH_MDIO_CLK_DIV_VALUE", + desc: "Ethernet MDIO clock divider value", + swaccess: "rw", + hwaccess: "hro", + resval: "100", + hwqe: "1", + fields: [ + { bits: "19:0" } + ], + } + ], +} diff --git a/docs/um/ip/carfield_regs/doc/carfield_regs.md b/docs/um/ip/carfield_regs/doc/carfield_regs.md new file mode 100644 index 00000000..d4e1fa9e --- /dev/null +++ b/docs/um/ip/carfield_regs/doc/carfield_regs.md @@ -0,0 +1,1126 @@ +## Summary + +| Name | Offset | Length | Description | +|:-----------------------------------------------------------------------------|:---------|---------:|:-----------------------------------------------------------------------| +| carfield.[`VERSION0`](#version0) | 0x0 | 4 | Cheshire sha256 commit | +| carfield.[`VERSION1`](#version1) | 0x4 | 4 | Safety Island sha256 commit | +| carfield.[`VERSION2`](#version2) | 0x8 | 4 | Security Island sha256 commit | +| carfield.[`VERSION3`](#version3) | 0xc | 4 | PULP Cluster sha256 commit | +| carfield.[`VERSION4`](#version4) | 0x10 | 4 | Spatz CLuster sha256 commit | +| carfield.[`JEDEC_IDCODE`](#jedec_idcode) | 0x14 | 4 | JEDEC ID CODE -TODO assign- | +| carfield.[`GENERIC_SCRATCH0`](#generic_scratch0) | 0x18 | 4 | Scratch | +| carfield.[`GENERIC_SCRATCH1`](#generic_scratch1) | 0x1c | 4 | Scratch | +| carfield.[`HOST_RST`](#host_rst) | 0x20 | 4 | Host Domain reset -active high, inverted in HW- | +| carfield.[`PERIPH_RST`](#periph_rst) | 0x24 | 4 | Periph Domain reset -active high, inverted in HW- | +| carfield.[`SAFETY_ISLAND_RST`](#safety_island_rst) | 0x28 | 4 | Safety Island reset -active high, inverted in HW- | +| carfield.[`SECURITY_ISLAND_RST`](#security_island_rst) | 0x2c | 4 | Security Island reset -active high, inverted in HW- | +| carfield.[`PULP_CLUSTER_RST`](#pulp_cluster_rst) | 0x30 | 4 | PULP Cluster reset -active high, inverted in HW- | +| carfield.[`SPATZ_CLUSTER_RST`](#spatz_cluster_rst) | 0x34 | 4 | Spatz Cluster reset -active high, inverted in HW- | +| carfield.[`L2_RST`](#l2_rst) | 0x38 | 4 | L2 reset -active high, inverted in HW- | +| carfield.[`PERIPH_ISOLATE`](#periph_isolate) | 0x3c | 4 | Periph Domain AXI isolate | +| carfield.[`SAFETY_ISLAND_ISOLATE`](#safety_island_isolate) | 0x40 | 4 | Safety Island AXI isolate | +| carfield.[`SECURITY_ISLAND_ISOLATE`](#security_island_isolate) | 0x44 | 4 | Security Island AXI isolate | +| carfield.[`PULP_CLUSTER_ISOLATE`](#pulp_cluster_isolate) | 0x48 | 4 | PULP Cluster AXI isolate | +| carfield.[`SPATZ_CLUSTER_ISOLATE`](#spatz_cluster_isolate) | 0x4c | 4 | Spatz Cluster AXI isolate | +| carfield.[`L2_ISOLATE`](#l2_isolate) | 0x50 | 4 | L2 AXI isolate | +| carfield.[`PERIPH_ISOLATE_STATUS`](#periph_isolate_status) | 0x54 | 4 | Periph Domain AXI isolate status | +| carfield.[`SAFETY_ISLAND_ISOLATE_STATUS`](#safety_island_isolate_status) | 0x58 | 4 | Safety Island AXI isolate status | +| carfield.[`SECURITY_ISLAND_ISOLATE_STATUS`](#security_island_isolate_status) | 0x5c | 4 | Security Island AXI isolate status | +| carfield.[`PULP_CLUSTER_ISOLATE_STATUS`](#pulp_cluster_isolate_status) | 0x60 | 4 | PULP Cluster AXI isolate status | +| carfield.[`SPATZ_CLUSTER_ISOLATE_STATUS`](#spatz_cluster_isolate_status) | 0x64 | 4 | Spatz Cluster AXI isolate status | +| carfield.[`L2_ISOLATE_STATUS`](#l2_isolate_status) | 0x68 | 4 | L2 AXI isolate status | +| carfield.[`PERIPH_CLK_EN`](#periph_clk_en) | 0x6c | 4 | Periph Domain clk gate enable | +| carfield.[`SAFETY_ISLAND_CLK_EN`](#safety_island_clk_en) | 0x70 | 4 | Safety Island clk gate enable | +| carfield.[`SECURITY_ISLAND_CLK_EN`](#security_island_clk_en) | 0x74 | 4 | Security Island clk gate enable | +| carfield.[`PULP_CLUSTER_CLK_EN`](#pulp_cluster_clk_en) | 0x78 | 4 | PULP Cluster clk gate enable | +| carfield.[`SPATZ_CLUSTER_CLK_EN`](#spatz_cluster_clk_en) | 0x7c | 4 | Spatz Cluster clk gate enable | +| carfield.[`L2_CLK_EN`](#l2_clk_en) | 0x80 | 4 | Shared L2 memory clk gate enable | +| carfield.[`PERIPH_CLK_SEL`](#periph_clk_sel) | 0x84 | 4 | Periph Domain pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`SAFETY_ISLAND_CLK_SEL`](#safety_island_clk_sel) | 0x88 | 4 | Safety Island pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`SECURITY_ISLAND_CLK_SEL`](#security_island_clk_sel) | 0x8c | 4 | Security Island pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`PULP_CLUSTER_CLK_SEL`](#pulp_cluster_clk_sel) | 0x90 | 4 | PULP Cluster pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`SPATZ_CLUSTER_CLK_SEL`](#spatz_cluster_clk_sel) | 0x94 | 4 | Spatz Cluster pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`L2_CLK_SEL`](#l2_clk_sel) | 0x98 | 4 | L2 Memory pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) | +| carfield.[`PERIPH_CLK_DIV_VALUE`](#periph_clk_div_value) | 0x9c | 4 | Periph Domain clk divider value | +| carfield.[`SAFETY_ISLAND_CLK_DIV_VALUE`](#safety_island_clk_div_value) | 0xa0 | 4 | Safety Island clk divider value | +| carfield.[`SECURITY_ISLAND_CLK_DIV_VALUE`](#security_island_clk_div_value) | 0xa4 | 4 | Security Island clk divider value | +| carfield.[`PULP_CLUSTER_CLK_DIV_VALUE`](#pulp_cluster_clk_div_value) | 0xa8 | 4 | PULP Cluster clk divider value | +| carfield.[`SPATZ_CLUSTER_CLK_DIV_VALUE`](#spatz_cluster_clk_div_value) | 0xac | 4 | Spatz Cluster clk divider value | +| carfield.[`L2_CLK_DIV_VALUE`](#l2_clk_div_value) | 0xb0 | 4 | L2 Memory clk divider value | +| carfield.[`HOST_FETCH_ENABLE`](#host_fetch_enable) | 0xb4 | 4 | Host Domain fetch enable | +| carfield.[`SAFETY_ISLAND_FETCH_ENABLE`](#safety_island_fetch_enable) | 0xb8 | 4 | Safety Island fetch enable | +| carfield.[`SECURITY_ISLAND_FETCH_ENABLE`](#security_island_fetch_enable) | 0xbc | 4 | Security Island fetch enable | +| carfield.[`PULP_CLUSTER_FETCH_ENABLE`](#pulp_cluster_fetch_enable) | 0xc0 | 4 | PULP Cluster fetch enable | +| carfield.[`SPATZ_CLUSTER_DEBUG_REQ`](#spatz_cluster_debug_req) | 0xc4 | 4 | Spatz Cluster debug req | +| carfield.[`HOST_BOOT_ADDR`](#host_boot_addr) | 0xc8 | 4 | Host boot address | +| carfield.[`SAFETY_ISLAND_BOOT_ADDR`](#safety_island_boot_addr) | 0xcc | 4 | Safety Island boot address | +| carfield.[`SECURITY_ISLAND_BOOT_ADDR`](#security_island_boot_addr) | 0xd0 | 4 | Security Island boot address | +| carfield.[`PULP_CLUSTER_BOOT_ADDR`](#pulp_cluster_boot_addr) | 0xd4 | 4 | PULP Cluster boot address | +| carfield.[`SPATZ_CLUSTER_BOOT_ADDR`](#spatz_cluster_boot_addr) | 0xd8 | 4 | Spatz Cluster boot address | +| carfield.[`PULP_CLUSTER_BOOT_ENABLE`](#pulp_cluster_boot_enable) | 0xdc | 4 | PULP Cluster boot enable | +| carfield.[`SPATZ_CLUSTER_BUSY`](#spatz_cluster_busy) | 0xe0 | 4 | Spatz Cluster busy | +| carfield.[`PULP_CLUSTER_BUSY`](#pulp_cluster_busy) | 0xe4 | 4 | PULP Cluster busy | +| carfield.[`PULP_CLUSTER_EOC`](#pulp_cluster_eoc) | 0xe8 | 4 | PULP Cluster end of computation | +| carfield.[`ETH_RGMII_PHY_CLK_DIV_EN`](#eth_rgmii_phy_clk_div_en) | 0xec | 4 | Ethernet RGMII PHY clock divider enable bit | +| carfield.[`ETH_RGMII_PHY_CLK_DIV_VALUE`](#eth_rgmii_phy_clk_div_value) | 0xf0 | 4 | Ethernet RGMII PHY clock divider value | +| carfield.[`ETH_MDIO_CLK_DIV_EN`](#eth_mdio_clk_div_en) | 0xf4 | 4 | Ethernet MDIO clock divider enable bit | +| carfield.[`ETH_MDIO_CLK_DIV_VALUE`](#eth_mdio_clk_div_value) | 0xf8 | 4 | Ethernet MDIO clock divider value | + +## VERSION0 +Cheshire sha256 commit +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VERSION0", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:0 | ro | 0x0 | VERSION0 | | + +## VERSION1 +Safety Island sha256 commit +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VERSION1", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:0 | ro | 0x0 | VERSION1 | | + +## VERSION2 +Security Island sha256 commit +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VERSION2", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:0 | ro | 0x0 | VERSION2 | | + +## VERSION3 +PULP Cluster sha256 commit +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VERSION3", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:0 | ro | 0x0 | VERSION3 | | + +## VERSION4 +Spatz CLuster sha256 commit +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "VERSION4", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:0 | ro | 0x0 | VERSION4 | | + +## JEDEC_IDCODE +JEDEC ID CODE -TODO assign- +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "JEDEC_IDCODE", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:--------------| +| 31:0 | rw | 0x0 | JEDEC_IDCODE | | + +## GENERIC_SCRATCH0 +Scratch +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "GENERIC_SCRATCH0", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:0 | rw | 0x0 | GENERIC_SCRATCH0 | | + +## GENERIC_SCRATCH1 +Scratch +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "GENERIC_SCRATCH1", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:0 | rw | 0x0 | GENERIC_SCRATCH1 | | + +## HOST_RST +Host Domain reset -active high, inverted in HW- +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "HOST_RST", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 100}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------|:--------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | HOST_RST | | + +## PERIPH_RST +Periph Domain reset -active high, inverted in HW- +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PERIPH_RST | | + +## SAFETY_ISLAND_RST +Safety Island reset -active high, inverted in HW- +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SAFETY_ISLAND_RST | | + +## SECURITY_ISLAND_RST +Security Island reset -active high, inverted in HW- +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 210}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SECURITY_ISLAND_RST | | + +## PULP_CLUSTER_RST +PULP Cluster reset -active high, inverted in HW- +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PULP_CLUSTER_RST | | + +## SPATZ_CLUSTER_RST +Spatz Cluster reset -active high, inverted in HW- +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SPATZ_CLUSTER_RST | | + +## L2_RST +L2 reset -active high, inverted in HW- +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "L2_RST", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | L2_RST | | + +## PERIPH_ISOLATE +Periph Domain AXI isolate +- Offset: `0x3c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 160}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PERIPH_ISOLATE | | + +## SAFETY_ISLAND_ISOLATE +Safety Island AXI isolate +- Offset: `0x40` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | SAFETY_ISLAND_ISOLATE | | + +## SECURITY_ISLAND_ISOLATE +Security Island AXI isolate +- Offset: `0x44` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 250}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | SECURITY_ISLAND_ISOLATE | | + +## PULP_CLUSTER_ISOLATE +PULP Cluster AXI isolate +- Offset: `0x48` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 220}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | PULP_CLUSTER_ISOLATE | | + +## SPATZ_CLUSTER_ISOLATE +Spatz Cluster AXI isolate +- Offset: `0x4c` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | SPATZ_CLUSTER_ISOLATE | | + +## L2_ISOLATE +L2 AXI isolate +- Offset: `0x50` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "L2_ISOLATE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | L2_ISOLATE | | + +## PERIPH_ISOLATE_STATUS +Periph Domain AXI isolate status +- Offset: `0x54` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PERIPH_ISOLATE_STATUS | | + +## SAFETY_ISLAND_ISOLATE_STATUS +Safety Island AXI isolate status +- Offset: `0x58` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 300}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SAFETY_ISLAND_ISOLATE_STATUS | | + +## SECURITY_ISLAND_ISOLATE_STATUS +Security Island AXI isolate status +- Offset: `0x5c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 320}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SECURITY_ISLAND_ISOLATE_STATUS | | + +## PULP_CLUSTER_ISOLATE_STATUS +PULP Cluster AXI isolate status +- Offset: `0x60` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 290}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PULP_CLUSTER_ISOLATE_STATUS | | + +## SPATZ_CLUSTER_ISOLATE_STATUS +Spatz Cluster AXI isolate status +- Offset: `0x64` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 300}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SPATZ_CLUSTER_ISOLATE_STATUS | | + +## L2_ISOLATE_STATUS +L2 AXI isolate status +- Offset: `0x68` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "L2_ISOLATE_STATUS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | L2_ISOLATE_STATUS | | + +## PERIPH_CLK_EN +Periph Domain clk gate enable +- Offset: `0x6c` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 150}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | PERIPH_CLK_EN | | + +## SAFETY_ISLAND_CLK_EN +Safety Island clk gate enable +- Offset: `0x70` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 220}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SAFETY_ISLAND_CLK_EN | | + +## SECURITY_ISLAND_CLK_EN +Security Island clk gate enable +- Offset: `0x74` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 240}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SECURITY_ISLAND_CLK_EN | | + +## PULP_CLUSTER_CLK_EN +PULP Cluster clk gate enable +- Offset: `0x78` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 210}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PULP_CLUSTER_CLK_EN | | + +## SPATZ_CLUSTER_CLK_EN +Spatz Cluster clk gate enable +- Offset: `0x7c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 220}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SPATZ_CLUSTER_CLK_EN | | + +## L2_CLK_EN +Shared L2 memory clk gate enable +- Offset: `0x80` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "L2_CLK_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | L2_CLK_EN | | + +## PERIPH_CLK_SEL +Periph Domain pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x84` +- Reset default: `0x2` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 160}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x2 | PERIPH_CLK_SEL | | + +## SAFETY_ISLAND_CLK_SEL +Safety Island pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x88` +- Reset default: `0x1` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x1 | SAFETY_ISLAND_CLK_SEL | | + +## SECURITY_ISLAND_CLK_SEL +Security Island pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x8c` +- Reset default: `0x1` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 250}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x1 | SECURITY_ISLAND_CLK_SEL | | + +## PULP_CLUSTER_CLK_SEL +PULP Cluster pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x90` +- Reset default: `0x1` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 220}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x1 | PULP_CLUSTER_CLK_SEL | | + +## SPATZ_CLUSTER_CLK_SEL +Spatz Cluster pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x94` +- Reset default: `0x1` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 230}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x1 | SPATZ_CLUSTER_CLK_SEL | | + +## L2_CLK_SEL +L2 Memory pll select (0 -> host pll, 1 -> alt PLL, 2 -> per pll) +- Offset: `0x98` +- Reset default: `0x1` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "L2_CLK_SEL", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x1 | L2_CLK_SEL | | + +## PERIPH_CLK_DIV_VALUE +Periph Domain clk divider value +- Offset: `0x9c` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "PERIPH_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | PERIPH_CLK_DIV_VALUE | | + +## SAFETY_ISLAND_CLK_DIV_VALUE +Safety Island clk divider value +- Offset: `0xa0` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | SAFETY_ISLAND_CLK_DIV_VALUE | | + +## SECURITY_ISLAND_CLK_DIV_VALUE +Security Island clk divider value +- Offset: `0xa4` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | SECURITY_ISLAND_CLK_DIV_VALUE | | + +## PULP_CLUSTER_CLK_DIV_VALUE +PULP Cluster clk divider value +- Offset: `0xa8` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | PULP_CLUSTER_CLK_DIV_VALUE | | + +## SPATZ_CLUSTER_CLK_DIV_VALUE +Spatz Cluster clk divider value +- Offset: `0xac` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | SPATZ_CLUSTER_CLK_DIV_VALUE | | + +## L2_CLK_DIV_VALUE +L2 Memory clk divider value +- Offset: `0xb0` +- Reset default: `0x1` +- Reset mask: `0xffffff` + +### Fields + +```wavejson +{"reg": [{"name": "L2_CLK_DIV_VALUE", "bits": 24, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:24 | | | | Reserved | +| 23:0 | rw | 0x1 | L2_CLK_DIV_VALUE | | + +## HOST_FETCH_ENABLE +Host Domain fetch enable +- Offset: `0xb4` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "HOST_FETCH_ENABLE", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | HOST_FETCH_ENABLE | | + +## SAFETY_ISLAND_FETCH_ENABLE +Safety Island fetch enable +- Offset: `0xb8` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_FETCH_ENABLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 280}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SAFETY_ISLAND_FETCH_ENABLE | | + +## SECURITY_ISLAND_FETCH_ENABLE +Security Island fetch enable +- Offset: `0xbc` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_FETCH_ENABLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 300}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | SECURITY_ISLAND_FETCH_ENABLE | | + +## PULP_CLUSTER_FETCH_ENABLE +PULP Cluster fetch enable +- Offset: `0xc0` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_FETCH_ENABLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 270}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PULP_CLUSTER_FETCH_ENABLE | | + +## SPATZ_CLUSTER_DEBUG_REQ +Spatz Cluster debug req +- Offset: `0xc4` +- Reset default: `0x0` +- Reset mask: `0x3` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_DEBUG_REQ", "bits": 2, "attr": ["rw"], "rotate": -90}, {"bits": 30}], "config": {"lanes": 1, "fontsize": 10, "vspace": 250}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------------|:--------------| +| 31:2 | | | | Reserved | +| 1:0 | rw | 0x0 | SPATZ_CLUSTER_DEBUG_REQ | | + +## HOST_BOOT_ADDR +Host boot address +- Offset: `0xc8` +- Reset default: `0x1000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "HOST_BOOT_ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:--------------| +| 31:0 | rw | 0x1000 | HOST_BOOT_ADDR | | + +## SAFETY_ISLAND_BOOT_ADDR +Safety Island boot address +- Offset: `0xcc` +- Reset default: `0x70000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SAFETY_ISLAND_BOOT_ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:------------------------|:--------------| +| 31:0 | rw | 0x70000000 | SAFETY_ISLAND_BOOT_ADDR | | + +## SECURITY_ISLAND_BOOT_ADDR +Security Island boot address +- Offset: `0xd0` +- Reset default: `0x70000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SECURITY_ISLAND_BOOT_ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:--------------------------|:--------------| +| 31:0 | rw | 0x70000000 | SECURITY_ISLAND_BOOT_ADDR | | + +## PULP_CLUSTER_BOOT_ADDR +PULP Cluster boot address +- Offset: `0xd4` +- Reset default: `0x70000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_BOOT_ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:-----------------------|:--------------| +| 31:0 | rw | 0x70000000 | PULP_CLUSTER_BOOT_ADDR | | + +## SPATZ_CLUSTER_BOOT_ADDR +Spatz Cluster boot address +- Offset: `0xd8` +- Reset default: `0x70000000` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_BOOT_ADDR", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:----------:|:------------------------|:--------------| +| 31:0 | rw | 0x70000000 | SPATZ_CLUSTER_BOOT_ADDR | | + +## PULP_CLUSTER_BOOT_ENABLE +PULP Cluster boot enable +- Offset: `0xdc` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_BOOT_ENABLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 260}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x0 | PULP_CLUSTER_BOOT_ENABLE | | + +## SPATZ_CLUSTER_BUSY +Spatz Cluster busy +- Offset: `0xe0` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_BUSY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 200}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | SPATZ_CLUSTER_BUSY | | + +## PULP_CLUSTER_BUSY +PULP Cluster busy +- Offset: `0xe4` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_BUSY", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | PULP_CLUSTER_BUSY | | + +## PULP_CLUSTER_EOC +PULP Cluster end of computation +- Offset: `0xe8` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "PULP_CLUSTER_EOC", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | ro | 0x0 | PULP_CLUSTER_EOC | | + +## ETH_RGMII_PHY_CLK_DIV_EN +Ethernet RGMII PHY clock divider enable bit +- Offset: `0xec` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "ETH_RGMII_PHY_CLK_DIV_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 260}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | ETH_RGMII_PHY_CLK_DIV_EN | | + +## ETH_RGMII_PHY_CLK_DIV_VALUE +Ethernet RGMII PHY clock divider value +- Offset: `0xf0` +- Reset default: `0x64` +- Reset mask: `0xfffff` + +### Fields + +```wavejson +{"reg": [{"name": "ETH_RGMII_PHY_CLK_DIV_VALUE", "bits": 20, "attr": ["rw"], "rotate": 0}, {"bits": 12}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:----------------------------|:--------------| +| 31:20 | | | | Reserved | +| 19:0 | rw | 0x64 | ETH_RGMII_PHY_CLK_DIV_VALUE | | + +## ETH_MDIO_CLK_DIV_EN +Ethernet MDIO clock divider enable bit +- Offset: `0xf4` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "ETH_MDIO_CLK_DIV_EN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 210}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------|:--------------| +| 31:1 | | | | Reserved | +| 0 | rw | 0x1 | ETH_MDIO_CLK_DIV_EN | | + +## ETH_MDIO_CLK_DIV_VALUE +Ethernet MDIO clock divider value +- Offset: `0xf8` +- Reset default: `0x64` +- Reset mask: `0xfffff` + +### Fields + +```wavejson +{"reg": [{"name": "ETH_MDIO_CLK_DIV_VALUE", "bits": 20, "attr": ["rw"], "rotate": 0}, {"bits": 12}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------|:--------------| +| 31:20 | | | | Reserved | +| 19:0 | rw | 0x64 | ETH_MDIO_CLK_DIV_VALUE | | + diff --git a/docs/um/ip/fp_cluster/data/spatz_cluster_peripheral_reg.hjson b/docs/um/ip/fp_cluster/data/spatz_cluster_peripheral_reg.hjson new file mode 100644 index 00000000..0be5f06a --- /dev/null +++ b/docs/um/ip/fp_cluster/data/spatz_cluster_peripheral_reg.hjson @@ -0,0 +1,431 @@ +// Copyright 2020 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51, see LICENSE for details. +{ + param_list: [ + { name: "NumPerfCounters", + desc: "Number of performance counters", + type: "int", + default: "2" + }, + ], + name: "spatz_cluster_peripheral", + clock_primary: "clk_i", + bus_interfaces: [ + { protocol: "reg_iface", direction: "device"} + ] + regwidth: 64, + registers: [{ + multireg: { + name: "PERF_COUNTER_ENABLE", + desc: "Enable particular performance counter and start tracking.", + swaccess: "rw", + hwaccess: "hro", + count: "NumPerfCounters", + cname: "performance_counter_enable", + fields: [{ + bits: "0:0", + resval: "0", + name: "CYCLE", + desc: ''' + Cycle counter. Counts up as long as the cluster is powered. + ''' + }, + { + bits: "1:1", + resval: "0", + name: "TCDM_ACCESSED" + desc: ''' + Increased whenever the TCDM is accessed. Each individual access is tracked, + so if `n` cores access the TCDM, `n` will be added. Accesses are tracked at the TCDM, + so it doesn't matter whether the cores or the for example the SSR hardware accesses + the TCDM. _This is a cluster-global signal._ + ''' + }, + { + bits: "2:2", + resval: "0", + name: "TCDM_CONGESTED" + desc: ''' + Incremented whenever an access twoards the TCDM is made but the arbitration + logic didn't grant the access (due to congestion). Is strictly less than TCDM_ACCESSED. + _This is a cluster-global signal._ + ''' + }, + { + bits: "3:3", + resval: "0", + name: "ISSUE_FPU" + desc: ''' + Core operations performed in the FPU. _This is a hart-local signal._ + ''' + }, + { + bits: "4:4", + resval: "0", + name: "ISSUE_FPU_SEQ" + desc: ''' + Incremented whenever the FPU Sequencer issues an FPU instruction. + Might be non available if the hardware doesn't support FREP. + _This is a hart-local signal._ + ''' + }, + { + bits: "5:5", + resval: "0", + name: "ISSUE_CORE_TO_FPU" + desc: '''Incremented whenever the core issues an FPU instruction. + _This is a hart-local signal._''' + }, + { + bits: "6:6", + resval: "0", + name: "RETIRED_INSTR" + desc: ''' + Instructions retired by the core. _This is a hart-local signal._ + ''' + }, + { + bits: "7:7", + resval: "0", + name: "RETIRED_LOAD" + desc: ''' + Load instructions retired by the core. _This is a hart-local signal._ + ''' + }, + { + bits: "8:8", + resval: "0", + name: "RETIRED_I" + desc: ''' + Base instructions retired by the core. _This is a hart-local signal._ + ''' + }, + { + bits: "9:9", + resval: "0", + name: "RETIRED_ACC" + desc: ''' + Offloaded instructions retired by the core. _This is a hart-local signal._ + ''' + }, + { + bits: "10:10", + resval: "0", + name: "DMA_AW_STALL" + desc: ''' + Incremented whenever aw_valid = 1 but aw_ready = 0. + _This is a DMA-local signal_ + ''' + }, + { + bits: "11:11", + resval: "0", + name: "DMA_AR_STALL" + desc: ''' + Incremented whenever ar_valid = 1 but ar_ready = 0. + _This is a DMA-local signal_ + ''' + }, + { + bits: "12:12", + resval: "0", + name: "DMA_R_STALL" + desc: ''' + Incremented whenever r_ready = 1 but r_valid = 0. + _This is a DMA-local signal_ + ''' + }, + { + bits: "13:13", + resval: "0", + name: "DMA_W_STALL" + desc: ''' + Incremented whenever w_valid = 1 but w_ready = 0. + _This is a DMA-local signal_ + ''' + }, + { + bits: "14:14", + resval: "0", + name: "DMA_BUF_W_STALL" + desc: ''' + Incremented whenever w_ready = 1 but w_valid = 0. + _This is a DMA-local signal_ + ''' + }, + { + bits: "15:15", + resval: "0", + name: "DMA_BUF_R_STALL" + desc: ''' + Incremented whenever r_valid = 1 but r_ready = 0. + _This is a DMA-local signal_ + ''' + }, + { + bits: "16:16", + resval: "0", + name: "DMA_AW_DONE" + desc: ''' + Incremented whenever AW handshake occurs. + _This is a DMA-local signal_ + ''' + }, + { + bits: "17:17", + resval: "0", + name: "DMA_AW_BW" + desc: ''' + Whenever AW handshake occurs, the counter is incremented + by the number of bytes transfered for this transaction + _This is a DMA-local signal_ + ''' + }, + { + bits: "18:18", + resval: "0", + name: "DMA_AR_DONE" + desc: ''' + Incremented whenever AR handshake occurs. + _This is a DMA-local signal_ + ''' + }, + { + bits: "19:19", + resval: "0", + name: "DMA_AR_BW" + desc: ''' + Whenever AR handshake occurs, the counter is incremented + by the number of bytes transfered for this transaction + _This is a DMA-local signal_ + ''' + }, + { + bits: "20:20", + resval: "0", + name: "DMA_R_DONE" + desc: ''' + Incremented whenever R handshake occurs. + _This is a DMA-local signal_ + ''' + }, + { + bits: "21:21", + resval: "0", + name: "DMA_R_BW" + desc: ''' + Whenever R handshake occurs, the counter is incremented + by the number of bytes transfered in this cycle + _This is a DMA-local signal_ + ''' + }, + { + bits: "22:22", + resval: "0", + name: "DMA_W_DONE" + desc: ''' + Incremented whenvever W handshake occurs. + _This is a DMA-local signal_ + ''' + }, + { + bits: "23:23", + resval: "0", + name: "DMA_W_BW" + desc: ''' + Whenever W handshake occurs, the counter is incremented + by the number of bytes transfered in this cycle + _This is a DMA-local signal_ + ''' + }, + { + bits: "24:24", + resval: "0", + name: "DMA_B_DONE" + desc: ''' + Incremented whenever B handshake occurs. + _This is a DMA-local signal_ + ''' + }, + { + bits: "25:25", + resval: "0", + name: "DMA_BUSY" + desc: ''' + Incremented whenever DMA is busy. + _This is a DMA-local signal_ + ''' + }, + { + bits: "26:26", + resval: "0", + name: "ICACHE_MISS" + desc: ''' + Incremented for instruction cache misses. + _This is a hart-local signal_ + ''' + }, + { + bits: "27:27", + resval: "0", + name: "ICACHE_HIT" + desc: ''' + Incremented for instruction cache hits. + _This is a hart-local signal_ + ''' + }, + { + bits: "28:28", + resval: "0", + name: "ICACHE_PREFETCH" + desc: ''' + Incremented for instruction cache prefetches. + _This is a hart-local signal_ + ''' + }, + { + bits: "29:29", + resval: "0", + name: "ICACHE_DOUBLE_HIT" + desc: ''' + Incremented for instruction cache double hit. + _This is a hart-local signal_ + ''' + }, + { + bits: "30:30", + resval: "0", + name: "ICACHE_STALL" + desc: ''' + Incremented for instruction cache stalls. + _This is a hart-local signal_ + ''' + }, + ] + } + }, + { + multireg: { + name: "HART_SELECT", + desc: '''Select from which hart in the cluster, starting from `0`, + the event should be counted. For each performance counter + the cores can be selected individually. If a hart greater + than the clusters total hart size is selected the selection + will wrap and the hart corresponding to `hart_select % total_harts_in_cluster` + will be selected.''' + swaccess: "rw", + hwaccess: "hro", + count: "NumPerfCounters", + cname: "hart_select", + compact: "false", + fields: [{ + bits: "9:0", + name: "HART_SELECT", + desc: "Select source of per-hart performance counter" + }] + } + } + { + multireg: { + name: "PERF_COUNTER", + desc: '''Performance counter. Set corresponding PERF_COUNTER_ENABLE bits depending on what + performance metric you would like to track.''' + swaccess: "rw", + hwaccess: "hrw", + count: "NumPerfCounters", + cname: "performance_counter", + hwext: "true", + hwqe: "true", + fields: [{ + bits: "47:0", + name: "PERF_COUNTER", + desc: "Performance counter" + }] + } + }, + { + name: "CL_CLINT_SET", + desc: ''' + Set bits in the cluster-local CLINT. Writing a 1 at location i sets the cluster-local interrupt + of hart i, where i is relative to the first hart in the cluster, ignoring the cluster base hart ID. + ''' + hwext: "true", + hwqe: "true", + swaccess: "wo", + hwaccess: "hro", + fields: [{ + bits: "31:0", + name: "CL_CLINT_SET", + desc: "Set cluster-local interrupt of hart i" + }] + }, + { + name: "CL_CLINT_CLEAR", + desc: ''' + Clear bits in the cluster-local CLINT. Writing a 1 at location i clears the cluster-local interrupt + of hart i, where i is relative to the first hart in the cluster, ignoring the cluster base hart ID. + ''' + hwext: "true", + hwqe: "true", + swaccess: "wo", + hwaccess: "hro", + fields: [{ + bits: "31:0", + name: "CL_CLINT_CLEAR", + desc: "Clear cluster-local interrupt of hart i" + }] + }, + { + name: "HW_BARRIER", + desc: '''Hardware barrier register. Loads to this register will block until all cores have + performed the load. At this stage we know that they reached the same point in the control flow, + i.e., the cores are synchronized.''' + swaccess: "ro", + hwaccess: "hrw", + hwext: "true", + fields: [{ + bits: "31:0", + name: "HW_BARRIER", + desc: "Hardware barrier register." + }] + }, + { + name: "ICACHE_PREFETCH_ENABLE", + desc: '''Controls prefetching of the instruction cache.''' + swaccess: "wo", + hwaccess: "hro", + resval: "1", + fields: [{ + bits: "0:0", + name: "ICACHE_PREFETCH_ENABLE", + desc: "Hardware barrier register." + }] + }, + { + name: "SPATZ_STATUS", + desc: '''Sets the status of the Spatz cluster.''' + swaccess: "wo", + hwaccess: "hro", + fields: [{ + bits: "0:0", + resval: "0", + name: "SPATZ_CLUSTER_PROBE", + desc: "Indicates the cluster is computing a kernel." + }] + }, + { + name: "CLUSTER_BOOT_CONTROL", + desc: '''Controls the cluster boot process.''' + swaccess: "rw", + hwaccess: "hro", + resval: "0", + fields: [{ + bits: "31:0", + name: "ENTRY_POINT", + desc: "Post-bootstrapping entry point." + }] + } + ] +} \ No newline at end of file diff --git a/docs/um/ip/fp_cluster/data/spatz_cluster_peripheral_reg_doc.hjson b/docs/um/ip/fp_cluster/data/spatz_cluster_peripheral_reg_doc.hjson new file mode 100644 index 00000000..17337b00 --- /dev/null +++ b/docs/um/ip/fp_cluster/data/spatz_cluster_peripheral_reg_doc.hjson @@ -0,0 +1,435 @@ +// Copyright 2020 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51, see LICENSE for details. +{ + param_list: [ + { name: "NumPerfCounters", + desc: "Number of performance counters", + type: "int", + default: "2" + }, + ], + name: "spatz_cluster_peripheral", + cip_id: "36", + version: "0.4.3", + clocking: [ + {clock: "clk_i", reset: "rst_ni", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device"} + ] + regwidth: 64, + registers: [{ + multireg: { + name: "PERF_COUNTER_ENABLE", + desc: "Enable particular performance counter and start tracking.", + swaccess: "rw", + hwaccess: "hro", + count: "NumPerfCounters", + cname: "performance_counter_enable", + fields: [{ + bits: "0:0", + resval: "0", + name: "CYCLE", + desc: ''' + Cycle counter. Counts up as long as the cluster is powered. + ''' + }, + { + bits: "1:1", + resval: "0", + name: "TCDM_ACCESSED" + desc: ''' + Increased whenever the TCDM is accessed. Each individual access is tracked, + so if `n` cores access the TCDM, `n` will be added. Accesses are tracked at the TCDM, + so it doesn't matter whether the cores or the for example the SSR hardware accesses + the TCDM. _This is a cluster-global signal._ + ''' + }, + { + bits: "2:2", + resval: "0", + name: "TCDM_CONGESTED" + desc: ''' + Incremented whenever an access twoards the TCDM is made but the arbitration + logic didn't grant the access (due to congestion). Is strictly less than TCDM_ACCESSED. + _This is a cluster-global signal._ + ''' + }, + { + bits: "3:3", + resval: "0", + name: "ISSUE_FPU" + desc: ''' + Core operations performed in the FPU. _This is a hart-local signal._ + ''' + }, + { + bits: "4:4", + resval: "0", + name: "ISSUE_FPU_SEQ" + desc: ''' + Incremented whenever the FPU Sequencer issues an FPU instruction. + Might be non available if the hardware doesn't support FREP. + _This is a hart-local signal._ + ''' + }, + { + bits: "5:5", + resval: "0", + name: "ISSUE_CORE_TO_FPU" + desc: '''Incremented whenever the core issues an FPU instruction. + _This is a hart-local signal._''' + }, + { + bits: "6:6", + resval: "0", + name: "RETIRED_INSTR" + desc: ''' + Instructions retired by the core. _This is a hart-local signal._ + ''' + }, + { + bits: "7:7", + resval: "0", + name: "RETIRED_LOAD" + desc: ''' + Load instructions retired by the core. _This is a hart-local signal._ + ''' + }, + { + bits: "8:8", + resval: "0", + name: "RETIRED_I" + desc: ''' + Base instructions retired by the core. _This is a hart-local signal._ + ''' + }, + { + bits: "9:9", + resval: "0", + name: "RETIRED_ACC" + desc: ''' + Offloaded instructions retired by the core. _This is a hart-local signal._ + ''' + }, + { + bits: "10:10", + resval: "0", + name: "DMA_AW_STALL" + desc: ''' + Incremented whenever aw_valid = 1 but aw_ready = 0. + _This is a DMA-local signal_ + ''' + }, + { + bits: "11:11", + resval: "0", + name: "DMA_AR_STALL" + desc: ''' + Incremented whenever ar_valid = 1 but ar_ready = 0. + _This is a DMA-local signal_ + ''' + }, + { + bits: "12:12", + resval: "0", + name: "DMA_R_STALL" + desc: ''' + Incremented whenever r_ready = 1 but r_valid = 0. + _This is a DMA-local signal_ + ''' + }, + { + bits: "13:13", + resval: "0", + name: "DMA_W_STALL" + desc: ''' + Incremented whenever w_valid = 1 but w_ready = 0. + _This is a DMA-local signal_ + ''' + }, + { + bits: "14:14", + resval: "0", + name: "DMA_BUF_W_STALL" + desc: ''' + Incremented whenever w_ready = 1 but w_valid = 0. + _This is a DMA-local signal_ + ''' + }, + { + bits: "15:15", + resval: "0", + name: "DMA_BUF_R_STALL" + desc: ''' + Incremented whenever r_valid = 1 but r_ready = 0. + _This is a DMA-local signal_ + ''' + }, + { + bits: "16:16", + resval: "0", + name: "DMA_AW_DONE" + desc: ''' + Incremented whenever AW handshake occurs. + _This is a DMA-local signal_ + ''' + }, + { + bits: "17:17", + resval: "0", + name: "DMA_AW_BW" + desc: ''' + Whenever AW handshake occurs, the counter is incremented + by the number of bytes transfered for this transaction + _This is a DMA-local signal_ + ''' + }, + { + bits: "18:18", + resval: "0", + name: "DMA_AR_DONE" + desc: ''' + Incremented whenever AR handshake occurs. + _This is a DMA-local signal_ + ''' + }, + { + bits: "19:19", + resval: "0", + name: "DMA_AR_BW" + desc: ''' + Whenever AR handshake occurs, the counter is incremented + by the number of bytes transfered for this transaction + _This is a DMA-local signal_ + ''' + }, + { + bits: "20:20", + resval: "0", + name: "DMA_R_DONE" + desc: ''' + Incremented whenever R handshake occurs. + _This is a DMA-local signal_ + ''' + }, + { + bits: "21:21", + resval: "0", + name: "DMA_R_BW" + desc: ''' + Whenever R handshake occurs, the counter is incremented + by the number of bytes transfered in this cycle + _This is a DMA-local signal_ + ''' + }, + { + bits: "22:22", + resval: "0", + name: "DMA_W_DONE" + desc: ''' + Incremented whenvever W handshake occurs. + _This is a DMA-local signal_ + ''' + }, + { + bits: "23:23", + resval: "0", + name: "DMA_W_BW" + desc: ''' + Whenever W handshake occurs, the counter is incremented + by the number of bytes transfered in this cycle + _This is a DMA-local signal_ + ''' + }, + { + bits: "24:24", + resval: "0", + name: "DMA_B_DONE" + desc: ''' + Incremented whenever B handshake occurs. + _This is a DMA-local signal_ + ''' + }, + { + bits: "25:25", + resval: "0", + name: "DMA_BUSY" + desc: ''' + Incremented whenever DMA is busy. + _This is a DMA-local signal_ + ''' + }, + { + bits: "26:26", + resval: "0", + name: "ICACHE_MISS" + desc: ''' + Incremented for instruction cache misses. + _This is a hart-local signal_ + ''' + }, + { + bits: "27:27", + resval: "0", + name: "ICACHE_HIT" + desc: ''' + Incremented for instruction cache hits. + _This is a hart-local signal_ + ''' + }, + { + bits: "28:28", + resval: "0", + name: "ICACHE_PREFETCH" + desc: ''' + Incremented for instruction cache prefetches. + _This is a hart-local signal_ + ''' + }, + { + bits: "29:29", + resval: "0", + name: "ICACHE_DOUBLE_HIT" + desc: ''' + Incremented for instruction cache double hit. + _This is a hart-local signal_ + ''' + }, + { + bits: "30:30", + resval: "0", + name: "ICACHE_STALL" + desc: ''' + Incremented for instruction cache stalls. + _This is a hart-local signal_ + ''' + }, + ] + } + }, + { + multireg: { + name: "HART_SELECT", + desc: '''Select from which hart in the cluster, starting from `0`, + the event should be counted. For each performance counter + the cores can be selected individually. If a hart greater + than the clusters total hart size is selected the selection + will wrap and the hart corresponding to `hart_select % total_harts_in_cluster` + will be selected.''' + swaccess: "rw", + hwaccess: "hro", + count: "NumPerfCounters", + cname: "hart_select", + compact: "false", + fields: [{ + bits: "9:0", + name: "HART_SELECT", + desc: "Select source of per-hart performance counter" + }] + } + } + { + multireg: { + name: "PERF_COUNTER", + desc: '''Performance counter. Set corresponding PERF_COUNTER_ENABLE bits depending on what + performance metric you would like to track.''' + swaccess: "rw", + hwaccess: "hrw", + count: "NumPerfCounters", + cname: "performance_counter", + hwext: "true", + hwqe: "true", + fields: [{ + bits: "47:0", + name: "PERF_COUNTER", + desc: "Performance counter" + }] + } + }, + { + name: "CL_CLINT_SET", + desc: ''' + Set bits in the cluster-local CLINT. Writing a 1 at location i sets the cluster-local interrupt + of hart i, where i is relative to the first hart in the cluster, ignoring the cluster base hart ID. + ''' + hwext: "true", + hwqe: "true", + swaccess: "wo", + hwaccess: "hro", + fields: [{ + bits: "31:0", + name: "CL_CLINT_SET", + desc: "Set cluster-local interrupt of hart i" + }] + }, + { + name: "CL_CLINT_CLEAR", + desc: ''' + Clear bits in the cluster-local CLINT. Writing a 1 at location i clears the cluster-local interrupt + of hart i, where i is relative to the first hart in the cluster, ignoring the cluster base hart ID. + ''' + hwext: "true", + hwqe: "true", + swaccess: "wo", + hwaccess: "hro", + fields: [{ + bits: "31:0", + name: "CL_CLINT_CLEAR", + desc: "Clear cluster-local interrupt of hart i" + }] + }, + { + name: "HW_BARRIER", + desc: '''Hardware barrier register. Loads to this register will block until all cores have + performed the load. At this stage we know that they reached the same point in the control flow, + i.e., the cores are synchronized.''' + swaccess: "ro", + hwaccess: "hrw", + hwext: "true", + fields: [{ + bits: "31:0", + name: "HW_BARRIER", + desc: "Hardware barrier register." + }] + }, + { + name: "ICACHE_PREFETCH_ENABLE", + desc: '''Controls prefetching of the instruction cache.''' + swaccess: "wo", + hwaccess: "hro", + resval: "1", + fields: [{ + bits: "0:0", + name: "ICACHE_PREFETCH_ENABLE", + desc: "Hardware barrier register." + }] + }, + { + name: "SPATZ_STATUS", + desc: '''Sets the status of the Spatz cluster.''' + swaccess: "wo", + hwaccess: "hro", + fields: [{ + bits: "0:0", + resval: "0", + name: "SPATZ_CLUSTER_PROBE", + desc: "Indicates the cluster is computing a kernel." + }] + }, + { + name: "CLUSTER_BOOT_CONTROL", + desc: '''Controls the cluster boot process.''' + swaccess: "rw", + hwaccess: "hro", + resval: "0", + fields: [{ + bits: "31:0", + name: "ENTRY_POINT", + desc: "Post-bootstrapping entry point." + }] + } + ] +} \ No newline at end of file diff --git a/docs/um/ip/fp_cluster/doc/registers.md b/docs/um/ip/fp_cluster/doc/registers.md new file mode 100644 index 00000000..79bc211c --- /dev/null +++ b/docs/um/ip/fp_cluster/doc/registers.md @@ -0,0 +1,386 @@ +## Summary + +| Name | Offset | Length | Description | +|:-----------------------------------------------------------------------------|:---------|---------:|:----------------------------------------------------------------------------------------------------| +| spatz_cluster_peripheral.[`PERF_COUNTER_ENABLE_0`](#perf_counter_enable) | 0x0 | 8 | Enable particular performance counter and start tracking. | +| spatz_cluster_peripheral.[`PERF_COUNTER_ENABLE_1`](#perf_counter_enable) | 0x8 | 8 | Enable particular performance counter and start tracking. | +| spatz_cluster_peripheral.[`HART_SELECT_0`](#hart_select) | 0x10 | 8 | Select from which hart in the cluster, starting from `0`, | +| spatz_cluster_peripheral.[`HART_SELECT_1`](#hart_select) | 0x18 | 8 | Select from which hart in the cluster, starting from `0`, | +| spatz_cluster_peripheral.[`PERF_COUNTER_0`](#perf_counter) | 0x20 | 8 | Performance counter. Set corresponding PERF_COUNTER_ENABLE bits depending on what | +| spatz_cluster_peripheral.[`PERF_COUNTER_1`](#perf_counter) | 0x28 | 8 | Performance counter. Set corresponding PERF_COUNTER_ENABLE bits depending on what | +| spatz_cluster_peripheral.[`CL_CLINT_SET`](#cl_clint_set) | 0x30 | 8 | Set bits in the cluster-local CLINT. Writing a 1 at location i sets the cluster-local interrupt | +| spatz_cluster_peripheral.[`CL_CLINT_CLEAR`](#cl_clint_clear) | 0x38 | 8 | Clear bits in the cluster-local CLINT. Writing a 1 at location i clears the cluster-local interrupt | +| spatz_cluster_peripheral.[`HW_BARRIER`](#hw_barrier) | 0x40 | 8 | Hardware barrier register. Loads to this register will block until all cores have | +| spatz_cluster_peripheral.[`ICACHE_PREFETCH_ENABLE`](#icache_prefetch_enable) | 0x48 | 8 | Controls prefetching of the instruction cache. | +| spatz_cluster_peripheral.[`SPATZ_STATUS`](#spatz_status) | 0x50 | 8 | Sets the status of the Spatz cluster. | +| spatz_cluster_peripheral.[`CLUSTER_BOOT_CONTROL`](#cluster_boot_control) | 0x58 | 8 | Controls the cluster boot process. | + +## PERF_COUNTER_ENABLE +Enable particular performance counter and start tracking. +- Reset default: `0x0` +- Reset mask: `0x7fffffff` + +### Instances + +| Name | Offset | +|:----------------------|:---------| +| PERF_COUNTER_ENABLE_0 | 0x0 | +| PERF_COUNTER_ENABLE_1 | 0x8 | + + +### Fields + +```wavejson +{"reg": [{"name": "CYCLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "TCDM_ACCESSED", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "TCDM_CONGESTED", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ISSUE_FPU", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ISSUE_FPU_SEQ", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ISSUE_CORE_TO_FPU", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RETIRED_INSTR", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RETIRED_LOAD", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RETIRED_I", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RETIRED_ACC", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_AW_STALL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_AR_STALL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_R_STALL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_W_STALL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_BUF_W_STALL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_BUF_R_STALL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_AW_DONE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_AW_BW", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_AR_DONE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_AR_BW", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_R_DONE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_R_BW", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_W_DONE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_W_BW", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_B_DONE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "DMA_BUSY", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ICACHE_MISS", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ICACHE_HIT", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ICACHE_PREFETCH", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ICACHE_DOUBLE_HIT", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ICACHE_STALL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 33}], "config": {"lanes": 1, "fontsize": 10, "vspace": 190}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-------------------------------------------------------------| +| 63:31 | | | Reserved | +| 30 | rw | 0x0 | [ICACHE_STALL](#perf_counter_enable--icache_stall) | +| 29 | rw | 0x0 | [ICACHE_DOUBLE_HIT](#perf_counter_enable--icache_double_hit) | +| 28 | rw | 0x0 | [ICACHE_PREFETCH](#perf_counter_enable--icache_prefetch) | +| 27 | rw | 0x0 | [ICACHE_HIT](#perf_counter_enable--icache_hit) | +| 26 | rw | 0x0 | [ICACHE_MISS](#perf_counter_enable--icache_miss) | +| 25 | rw | 0x0 | [DMA_BUSY](#perf_counter_enable--dma_busy) | +| 24 | rw | 0x0 | [DMA_B_DONE](#perf_counter_enable--dma_b_done) | +| 23 | rw | 0x0 | [DMA_W_BW](#perf_counter_enable--dma_w_bw) | +| 22 | rw | 0x0 | [DMA_W_DONE](#perf_counter_enable--dma_w_done) | +| 21 | rw | 0x0 | [DMA_R_BW](#perf_counter_enable--dma_r_bw) | +| 20 | rw | 0x0 | [DMA_R_DONE](#perf_counter_enable--dma_r_done) | +| 19 | rw | 0x0 | [DMA_AR_BW](#perf_counter_enable--dma_ar_bw) | +| 18 | rw | 0x0 | [DMA_AR_DONE](#perf_counter_enable--dma_ar_done) | +| 17 | rw | 0x0 | [DMA_AW_BW](#perf_counter_enable--dma_aw_bw) | +| 16 | rw | 0x0 | [DMA_AW_DONE](#perf_counter_enable--dma_aw_done) | +| 15 | rw | 0x0 | [DMA_BUF_R_STALL](#perf_counter_enable--dma_buf_r_stall) | +| 14 | rw | 0x0 | [DMA_BUF_W_STALL](#perf_counter_enable--dma_buf_w_stall) | +| 13 | rw | 0x0 | [DMA_W_STALL](#perf_counter_enable--dma_w_stall) | +| 12 | rw | 0x0 | [DMA_R_STALL](#perf_counter_enable--dma_r_stall) | +| 11 | rw | 0x0 | [DMA_AR_STALL](#perf_counter_enable--dma_ar_stall) | +| 10 | rw | 0x0 | [DMA_AW_STALL](#perf_counter_enable--dma_aw_stall) | +| 9 | rw | 0x0 | [RETIRED_ACC](#perf_counter_enable--retired_acc) | +| 8 | rw | 0x0 | [RETIRED_I](#perf_counter_enable--retired_i) | +| 7 | rw | 0x0 | [RETIRED_LOAD](#perf_counter_enable--retired_load) | +| 6 | rw | 0x0 | [RETIRED_INSTR](#perf_counter_enable--retired_instr) | +| 5 | rw | 0x0 | [ISSUE_CORE_TO_FPU](#perf_counter_enable--issue_core_to_fpu) | +| 4 | rw | 0x0 | [ISSUE_FPU_SEQ](#perf_counter_enable--issue_fpu_seq) | +| 3 | rw | 0x0 | [ISSUE_FPU](#perf_counter_enable--issue_fpu) | +| 2 | rw | 0x0 | [TCDM_CONGESTED](#perf_counter_enable--tcdm_congested) | +| 1 | rw | 0x0 | [TCDM_ACCESSED](#perf_counter_enable--tcdm_accessed) | +| 0 | rw | 0x0 | [CYCLE](#perf_counter_enable--cycle) | + +### PERF_COUNTER_ENABLE . ICACHE_STALL + Incremented for instruction cache stalls. + _This is a hart-local signal_ + + +### PERF_COUNTER_ENABLE . ICACHE_DOUBLE_HIT + Incremented for instruction cache double hit. + _This is a hart-local signal_ + + +### PERF_COUNTER_ENABLE . ICACHE_PREFETCH + Incremented for instruction cache prefetches. + _This is a hart-local signal_ + + +### PERF_COUNTER_ENABLE . ICACHE_HIT + Incremented for instruction cache hits. + _This is a hart-local signal_ + + +### PERF_COUNTER_ENABLE . ICACHE_MISS + Incremented for instruction cache misses. + _This is a hart-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_BUSY + Incremented whenever DMA is busy. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_B_DONE + Incremented whenever B handshake occurs. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_W_BW + Whenever W handshake occurs, the counter is incremented + by the number of bytes transfered in this cycle + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_W_DONE + Incremented whenvever W handshake occurs. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_R_BW + Whenever R handshake occurs, the counter is incremented + by the number of bytes transfered in this cycle + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_R_DONE + Incremented whenever R handshake occurs. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_AR_BW + Whenever AR handshake occurs, the counter is incremented + by the number of bytes transfered for this transaction + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_AR_DONE + Incremented whenever AR handshake occurs. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_AW_BW + Whenever AW handshake occurs, the counter is incremented + by the number of bytes transfered for this transaction + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_AW_DONE + Incremented whenever AW handshake occurs. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_BUF_R_STALL + Incremented whenever r_valid = 1 but r_ready = 0. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_BUF_W_STALL + Incremented whenever w_ready = 1 but w_valid = 0. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_W_STALL + Incremented whenever w_valid = 1 but w_ready = 0. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_R_STALL + Incremented whenever r_ready = 1 but r_valid = 0. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_AR_STALL + Incremented whenever ar_valid = 1 but ar_ready = 0. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . DMA_AW_STALL + Incremented whenever aw_valid = 1 but aw_ready = 0. + _This is a DMA-local signal_ + + +### PERF_COUNTER_ENABLE . RETIRED_ACC + Offloaded instructions retired by the core. _This is a hart-local signal._ + + +### PERF_COUNTER_ENABLE . RETIRED_I + Base instructions retired by the core. _This is a hart-local signal._ + + +### PERF_COUNTER_ENABLE . RETIRED_LOAD + Load instructions retired by the core. _This is a hart-local signal._ + + +### PERF_COUNTER_ENABLE . RETIRED_INSTR + Instructions retired by the core. _This is a hart-local signal._ + + +### PERF_COUNTER_ENABLE . ISSUE_CORE_TO_FPU +Incremented whenever the core issues an FPU instruction. + _This is a hart-local signal._ + +### PERF_COUNTER_ENABLE . ISSUE_FPU_SEQ + Incremented whenever the FPU Sequencer issues an FPU instruction. + Might be non available if the hardware doesn't support FREP. + _This is a hart-local signal._ + + +### PERF_COUNTER_ENABLE . ISSUE_FPU + Core operations performed in the FPU. _This is a hart-local signal._ + + +### PERF_COUNTER_ENABLE . TCDM_CONGESTED + Incremented whenever an access twoards the TCDM is made but the arbitration + logic didn't grant the access (due to congestion). Is strictly less than TCDM_ACCESSED. + _This is a cluster-global signal._ + + +### PERF_COUNTER_ENABLE . TCDM_ACCESSED + Increased whenever the TCDM is accessed. Each individual access is tracked, + so if `n` cores access the TCDM, `n` will be added. Accesses are tracked at the TCDM, + so it doesn't matter whether the cores or the for example the SSR hardware accesses + the TCDM. _This is a cluster-global signal._ + + +### PERF_COUNTER_ENABLE . CYCLE +Cycle counter. Counts up as long as the cluster is powered. + +## HART_SELECT +Select from which hart in the cluster, starting from `0`, + the event should be counted. For each performance counter + the cores can be selected individually. If a hart greater + than the clusters total hart size is selected the selection + will wrap and the hart corresponding to `hart_select % total_harts_in_cluster` + will be selected. +- Reset default: `0x0` +- Reset mask: `0x3ff` + +### Instances + +| Name | Offset | +|:--------------|:---------| +| HART_SELECT_0 | 0x10 | +| HART_SELECT_1 | 0x18 | + + +### Fields + +```wavejson +{"reg": [{"name": "HART_SELECT", "bits": 10, "attr": ["rw"], "rotate": -90}, {"bits": 54}], "config": {"lanes": 1, "fontsize": 10, "vspace": 130}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:----------------------------------------------| +| 63:10 | | | | Reserved | +| 9:0 | rw | 0x0 | HART_SELECT | Select source of per-hart performance counter | + +## PERF_COUNTER +Performance counter. Set corresponding PERF_COUNTER_ENABLE bits depending on what +performance metric you would like to track. +- Reset default: `0x0` +- Reset mask: `0xffffffffffff` + +### Instances + +| Name | Offset | +|:---------------|:---------| +| PERF_COUNTER_0 | 0x20 | +| PERF_COUNTER_1 | 0x28 | + + +### Fields + +```wavejson +{"reg": [{"name": "PERF_COUNTER", "bits": 48, "attr": ["rw"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:--------------------| +| 63:48 | | | | Reserved | +| 47:0 | rw | x | PERF_COUNTER | Performance counter | + +## CL_CLINT_SET +Set bits in the cluster-local CLINT. Writing a 1 at location i sets the cluster-local interrupt +of hart i, where i is relative to the first hart in the cluster, ignoring the cluster base hart ID. +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CL_CLINT_SET", "bits": 32, "attr": ["wo"], "rotate": 0}, {"bits": 32}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------|:--------------------------------------| +| 63:32 | | | | Reserved | +| 31:0 | wo | x | CL_CLINT_SET | Set cluster-local interrupt of hart i | + +## CL_CLINT_CLEAR +Clear bits in the cluster-local CLINT. Writing a 1 at location i clears the cluster-local interrupt +of hart i, where i is relative to the first hart in the cluster, ignoring the cluster base hart ID. +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "CL_CLINT_CLEAR", "bits": 32, "attr": ["wo"], "rotate": 0}, {"bits": 32}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:----------------------------------------| +| 63:32 | | | | Reserved | +| 31:0 | wo | x | CL_CLINT_CLEAR | Clear cluster-local interrupt of hart i | + +## HW_BARRIER +Hardware barrier register. Loads to this register will block until all cores have +performed the load. At this stage we know that they reached the same point in the control flow, +i.e., the cores are synchronized. +- Offset: `0x40` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "HW_BARRIER", "bits": 32, "attr": ["ro"], "rotate": 0}, {"bits": 32}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------|:---------------------------| +| 63:32 | | | | Reserved | +| 31:0 | ro | x | HW_BARRIER | Hardware barrier register. | + +## ICACHE_PREFETCH_ENABLE +Controls prefetching of the instruction cache. +- Offset: `0x48` +- Reset default: `0x1` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "ICACHE_PREFETCH_ENABLE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 63}], "config": {"lanes": 1, "fontsize": 10, "vspace": 240}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------|:---------------------------| +| 63:1 | | | | Reserved | +| 0 | wo | 0x1 | ICACHE_PREFETCH_ENABLE | Hardware barrier register. | + +## SPATZ_STATUS +Sets the status of the Spatz cluster. +- Offset: `0x50` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "SPATZ_CLUSTER_PROBE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 63}], "config": {"lanes": 1, "fontsize": 10, "vspace": 210}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------------------|:---------------------------------------------| +| 63:1 | | | | Reserved | +| 0 | wo | 0x0 | SPATZ_CLUSTER_PROBE | Indicates the cluster is computing a kernel. | + +## CLUSTER_BOOT_CONTROL +Controls the cluster boot process. +- Offset: `0x58` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "ENTRY_POINT", "bits": 32, "attr": ["rw"], "rotate": 0}, {"bits": 32}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------|:--------------------------------| +| 63:32 | | | | Reserved | +| 31:0 | rw | 0x0 | ENTRY_POINT | Post-bootstrapping entry point. | + diff --git a/docs/um/ip/gp_timer1_system_timer/data/timer_unit.hjson b/docs/um/ip/gp_timer1_system_timer/data/timer_unit.hjson new file mode 100644 index 00000000..2065c2cb --- /dev/null +++ b/docs/um/ip/gp_timer1_system_timer/data/timer_unit.hjson @@ -0,0 +1,282 @@ +// Copyright 2018-2021 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51, see LICENSE for details. +// +// Author: Florent Rotenberg +# timer unit(system timer) register + +{ + name: "timer_unit" + one_paragraph_desc: ''' + BASIC TIMER component manages the following features: + - 2 general purpose 32bits up counter timers + - Input trigger sources: + - FLL clock + - FLL clock + Prescaler + - Reference clock at 32kHz + - External event + - 8bit programmable prescaler to FLL clock + - Counting modes: + - One shot mode: timer is stopped after first comparison match + - Continuous mode: timer continues counting after comparison match + - Cycle mode: timer resets to 0 after comparison match and continues counting + - 64 bit cascaded mode + - Interrupt request generation on comparison match + ''' + cip_id: "36", + version: "1.0.3" + clocking: [ + {clock: "clk_i", reset: "rst_ni", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device" } + ], + regwidth: "32" + registers: [ + { name: "CFG_LO" + desc: "Timer Low Configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "0" + name: "ENABLE" + resval: 0x0 + desc: '''Timer low enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "1" + name: "RESET" + resval: 0x0 + desc: "Timer low counter reset command bitfield. Cleared after Timer Low reset execution." + } + { bits: "2" + name: "IRQEN" + resval: 0x0 + desc: '''Timer low compare match interrupt enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "3" + name: "IEM" + resval: 0x0 + desc: '''Timer low input event mask configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "4" + name: "MODE" + resval: 0x0 + desc: '''Timer low continuous mode configuration bitfield: + - 1'b0: Continue mode - continue incrementing Timer low counter when compare match with CMP_LO occurs. + - 1'b1: Cycle mode - reset Timer low counter when compare match with CMP_LO occurs. + ''' + } + { bits: "5" + name: "ONE_S" + resval: 0x0 + desc: '''Timer low one shot configuration bitfield: + - 1'b0: let Timer low enabled counting when compare match with CMP_LO occurs. + - 1'b1: disable Timer low when compare match with CMP_LO occurs. + ''' + } + { bits: "6" + name: "PEN" + resval: 0x0 + desc: '''Timer low prescaler enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "7" + name: "CCFG" + resval: 0x0 + desc: '''Timer low clock source configuration bitfield: + - 1'b0: FLL or FLL+Prescaler + - 1'b1: Reference clock at 32kHz + ''' + } + { bits: "15:8" + name: "PVAL" + resval: 0x0 + desc: "Timer low prescaler value bitfield. Ftimer = Fclk / (1 + PRESC_VAL)" + } + { bits: "31" + name: "CASC" + resval: 0x0 + desc: "Timer low + Timer high 64bit cascaded mode configuration bitfield." + } + ] + } + { name: "CFG_HI" + desc: "Timer HIGH Configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "0" + name: "ENABLE" + resval: 0x0 + desc: '''Timer high enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "1" + name: "RESET" + swaccess: "wo" + hwaccess: "hro" + resval: 0x0 + desc: "Timer high counter reset command bitfield. Cleared after Timer high reset execution." + } + { bits: "2" + name: "IRQEN" + resval: 0x0 + desc: '''Timer high compare match interrupt enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "3" + name: "IEM" + resval: 0x0 + desc: '''Timer high input event mask configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "4" + name: "MODE" + resval: 0x0 + desc: '''Timer high continuous mode configuration bitfield: + - 1'b0: Continue mode - continue incrementing Timer high counter when compare match with CMP_HI occurs. + - 1'b1: Cycle mode - reset Timer high counter when compare match with CMP_HI occurs. + ''' + } + { bits: "5" + name: "ONE_S" + resval: 0x0 + desc: '''Timer high one shot configuration bitfield: + - 1'b0: let Timer high enabled counting when compare match with CMP_HI occurs. + - 1'b1: disable Timer high when compare match with CMP_HI occurs. + ''' + } + { bits: "6" + name: "PEN" + resval: 0x0 + desc: '''Timer high prescaler enable configuration bitfield: + - 1'b0: disabled + - 1'b1: enabled + ''' + } + { bits: "7" + name: "CLKCFG" + resval: 0x0 + desc: '''Timer high clock source configuration bitfield: + - 1'b0: FLL or FLL+Prescaler + - 1'b1: Reference clock at 32kHz + ''' + } + ] + } + { name: "CNT_LO" + desc: "Timer Low counter value register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "31:0" + name: "cnt_lo" + resval: 0x0 + desc: "Timer Low counter value bitfield." + } + ] + } + { name: "CNT_HI" + desc: "Timer High counter value register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "31:0" + name: "cnt_hi" + resval: 0x0 + desc: "Timer High counter value bitfield." + } + ] + } + { name: "CMP_LO" + desc: "Timer Low comparator value register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "31:0" + name: "cmp_lo" + resval: 0x0 + desc: "Timer Low comparator value bitfield." + } + ] + } + { name: "CMP_HI" + desc: "Timer High comparator value register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "31:0" + name: "cmp_hi" + resval: 0x0 + desc: "Timer High comparator value bitfield." + } + ] + } + { name: "START_LO" + desc: "Start Timer Low counting register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "0:0" + name: "strt_lo" + resval: 0x0 + desc: "Timer Low start command bitfield. When executed, CFG_LO.ENABLE is set." + } + ] + } + { name: "START_HI" + desc: "Start Timer High counting register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "0:0" + name: "strt_hi" + resval: 0x0 + desc: "Timer High start command bitfield. When executed, CFG_HI.ENABLE is set." + } + ] + } + { name: "RESET_LO" + desc: "Reset Timer Low counter register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "0:0" + name: "rst_lo" + resval: 0x0 + desc: "Timer Low counter reset command bitfield. When executed, CFG_LO.RESET is set." + } + ] + } + { name: "RESET_HI" + desc: "Reset Timer High counter register." + swaccess: "wo" + hwaccess: "hro" + fields: [ + { bits: "0:0" + name: "rst_hi" + resval: 0x0 + desc: "Timer High counter reset command bitfield. When executed, CFG_HI.RESET is set." + } + ] + } + ] +} diff --git a/docs/um/ip/gp_timer1_system_timer/doc/registers.md b/docs/um/ip/gp_timer1_system_timer/doc/registers.md new file mode 100644 index 00000000..c4dc75d0 --- /dev/null +++ b/docs/um/ip/gp_timer1_system_timer/doc/registers.md @@ -0,0 +1,197 @@ +## Summary + +| Name | Offset | Length | Description | +|:-----------------------------------|:---------|---------:|:--------------------------------------| +| timer_unit.[`CFG_LO`](#cfg_lo) | 0x0 | 4 | Timer Low Configuration register. | +| timer_unit.[`CFG_HI`](#cfg_hi) | 0x4 | 4 | Timer HIGH Configuration register. | +| timer_unit.[`CNT_LO`](#cnt_lo) | 0x8 | 4 | Timer Low counter value register. | +| timer_unit.[`CNT_HI`](#cnt_hi) | 0xc | 4 | Timer High counter value register. | +| timer_unit.[`CMP_LO`](#cmp_lo) | 0x10 | 4 | Timer Low comparator value register. | +| timer_unit.[`CMP_HI`](#cmp_hi) | 0x14 | 4 | Timer High comparator value register. | +| timer_unit.[`START_LO`](#start_lo) | 0x18 | 4 | Start Timer Low counting register. | +| timer_unit.[`START_HI`](#start_hi) | 0x1c | 4 | Start Timer High counting register. | +| timer_unit.[`RESET_LO`](#reset_lo) | 0x20 | 4 | Reset Timer Low counter register. | +| timer_unit.[`RESET_HI`](#reset_hi) | 0x24 | 4 | Reset Timer High counter register. | + +## CFG_LO +Timer Low Configuration register. +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0x8000ffff` + +### Fields + +```wavejson +{"reg": [{"name": "ENABLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RESET", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "IRQEN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "IEM", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "MODE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ONE_S", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "PEN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CCFG", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "PVAL", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 15}, {"name": "CASC", "bits": 1, "attr": ["rw"], "rotate": -90}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31 | rw | 0x0 | CASC | Timer low + Timer high 64bit cascaded mode configuration bitfield. | +| 30:16 | | | | Reserved | +| 15:8 | rw | 0x0 | PVAL | Timer low prescaler value bitfield. Ftimer = Fclk / (1 + PRESC_VAL) | +| 7 | rw | 0x0 | CCFG | Timer low clock source configuration bitfield: - 1'b0: FLL or FLL+Prescaler - 1'b1: Reference clock at 32kHz | +| 6 | rw | 0x0 | PEN | Timer low prescaler enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 5 | rw | 0x0 | ONE_S | Timer low one shot configuration bitfield: - 1'b0: let Timer low enabled counting when compare match with CMP_LO occurs. - 1'b1: disable Timer low when compare match with CMP_LO occurs. | +| 4 | rw | 0x0 | MODE | Timer low continuous mode configuration bitfield: - 1'b0: Continue mode - continue incrementing Timer low counter when compare match with CMP_LO occurs. - 1'b1: Cycle mode - reset Timer low counter when compare match with CMP_LO occurs. | +| 3 | rw | 0x0 | IEM | Timer low input event mask configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 2 | rw | 0x0 | IRQEN | Timer low compare match interrupt enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 1 | rw | 0x0 | RESET | Timer low counter reset command bitfield. Cleared after Timer Low reset execution. | +| 0 | rw | 0x0 | ENABLE | Timer low enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | + +## CFG_HI +Timer HIGH Configuration register. +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xff` + +### Fields + +```wavejson +{"reg": [{"name": "ENABLE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "RESET", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "IRQEN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "IEM", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "MODE", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "ONE_S", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "PEN", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "CLKCFG", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 24}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| +| 31:8 | | | | Reserved | +| 7 | rw | 0x0 | CLKCFG | Timer high clock source configuration bitfield: - 1'b0: FLL or FLL+Prescaler - 1'b1: Reference clock at 32kHz | +| 6 | rw | 0x0 | PEN | Timer high prescaler enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 5 | rw | 0x0 | ONE_S | Timer high one shot configuration bitfield: - 1'b0: let Timer high enabled counting when compare match with CMP_HI occurs. - 1'b1: disable Timer high when compare match with CMP_HI occurs. | +| 4 | rw | 0x0 | MODE | Timer high continuous mode configuration bitfield: - 1'b0: Continue mode - continue incrementing Timer high counter when compare match with CMP_HI occurs. - 1'b1: Cycle mode - reset Timer high counter when compare match with CMP_HI occurs. | +| 3 | rw | 0x0 | IEM | Timer high input event mask configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 2 | rw | 0x0 | IRQEN | Timer high compare match interrupt enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | +| 1 | wo | 0x0 | RESET | Timer high counter reset command bitfield. Cleared after Timer high reset execution. | +| 0 | rw | 0x0 | ENABLE | Timer high enable configuration bitfield: - 1'b0: disabled - 1'b1: enabled | + +## CNT_LO +Timer Low counter value register. +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "cnt_lo", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:----------------------------------| +| 31:0 | rw | 0x0 | cnt_lo | Timer Low counter value bitfield. | + +## CNT_HI +Timer High counter value register. +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "cnt_hi", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------| +| 31:0 | rw | 0x0 | cnt_hi | Timer High counter value bitfield. | + +## CMP_LO +Timer Low comparator value register. +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "cmp_lo", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------| +| 31:0 | rw | 0x0 | cmp_lo | Timer Low comparator value bitfield. | + +## CMP_HI +Timer High comparator value register. +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "cmp_hi", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------| +| 31:0 | rw | 0x0 | cmp_hi | Timer High comparator value bitfield. | + +## START_LO +Start Timer Low counting register. +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "strt_lo", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:-----------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | strt_lo | Timer Low start command bitfield. When executed, CFG_LO.ENABLE is set. | + +## START_HI +Start Timer High counting register. +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "strt_hi", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 90}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | strt_hi | Timer High start command bitfield. When executed, CFG_HI.ENABLE is set. | + +## RESET_LO +Reset Timer Low counter register. +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "rst_lo", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | rst_lo | Timer Low counter reset command bitfield. When executed, CFG_LO.RESET is set. | + +## RESET_HI +Reset Timer High counter register. +- Offset: `0x24` +- Reset default: `0x0` +- Reset mask: `0x1` + +### Fields + +```wavejson +{"reg": [{"name": "rst_hi", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------| +| 31:1 | | | | Reserved | +| 0 | wo | 0x0 | rst_hi | Timer High counter reset command bitfield. When executed, CFG_HI.RESET is set. | + diff --git a/docs/um/ip/gp_timer2_advanced_timer/data/apb_adv_timer.hjson b/docs/um/ip/gp_timer2_advanced_timer/data/apb_adv_timer.hjson new file mode 100644 index 00000000..016be8a8 --- /dev/null +++ b/docs/um/ip/gp_timer2_advanced_timer/data/apb_adv_timer.hjson @@ -0,0 +1,1020 @@ +// Copyright 2018-2021 ETH Zurich and University of Bologna. +// Solderpad Hardware License, Version 0.51, see LICENSE for details. +// SPDX-License-Identifier: SHL-0.51 +// Licensed under Solderpad Hardware License, Version 0.51, see LICENSE for details. +// +// Author: Florent Rotenberg +# APB Advanced timer register +{ + name: "apb_adv_timer" + one_paragraph_desc: ''' + ADV_ TIMER component manages the following features: + - 4 advanced timers with 4 output signal channels each. Provides PWM generation functionality + - multiple trigger input sources: + - output signal channels of all timers + - 32 GPIOs + - reference clock at 32kHz + - FLL clock + - configurable input trigger modes + - configurable prescaler for each timer + - configurable counting mode for each timer + - configurable channel threshold action for each timer + - 4 configurable output events + - configurable clock gating of each timer + ''' + cip_id: "36", + version: "1.0.4" + clocking: [ + {clock: "clk_i", reset: "rst_ni", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", direction: "device" } + ], + regwidth: "32" + registers: [ + { name: "T0_CMD" + desc: "ADV_TIMER0 command register." + swaccess: "wo" + hwaccess: "hwo" + fields: [ + { bits: "0" + name: "START" + resval: 0x0 + desc: "ADV_TIMER0 start command bitfield." + } + { bits: "1" + name: "STOP" + resval: 0x0 + desc: "ADV_TIMER0 stop command bitfield." + } + { bits: "2" + name: "UPDATE" + resval: 0x0 + desc: "ADV_TIMER0 update command bitfield." + } + { bits: "3" + name: "RESET" + resval: 0x0 + desc: "ADV_TIMER0 reset command bitfield." + } + { bits: "4" + name: "ARM" + resval: 0x0 + desc: "ADV_TIMER0 arm command bitfield." + } + { bits: "31:5" + name: "RFU" + resval: 0x0 + desc: "?" + } + ] + } + { name: "T0_CONFIG" + desc: "ADV_TIMER0 configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "7:0" + name: "INSEL" + resval: 0x0 + desc: '''ADV_TIMER0 input source configuration bitfield: + - 0-31: GPIO[0] to GPIO[31] + - 32-35: Channel 0 to 3 of ADV_TIMER0 + - 36-39: Channel 0 to 3 of ADV_TIMER1 + - 40-43: Channel 0 to 3 of ADV_TIMER2 + - 44-47: Channel 0 to 3 of ADV_TIMER3 + ''' + } + { bits: "10:8" + name: "MODE" + swaccess: "rw" + hwaccess: "hrw" + resval: 0x0 + desc: '''ADV_TIMER0 trigger mode configuration bitfield: + - 3'h0: trigger event at each clock cycle. + - 3'h1: trigger event if input source is 0 + - 3'h2: trigger event if input source is 1 + - 3'h3: trigger event on input source rising edge + - 3'h4: trigger event on input source falling edge + - 3'h5: trigger event on input source falling or rising edge + - 3'h6: trigger event on input source rising edge when armed + - 3'h7: trigger event on input source falling edge when armed + ''' + } + { bits: "11" + name: "CLKSEL" + resval: 0x0 + desc: '''ADV_TIMER0 clock source configuration bitfield: + - 1'b0: FLL + - 1'b1: reference clock at 32kHz + ''' + } + { bits: "12" + name: "UPDOWNSEL" + resval: 0x1 + desc: '''ADV_TIMER0 center-aligned mode configuration bitfield: + - 1'b0: The counter counts up and down alternatively. + - 1'b1: The counter counts up and resets to 0 when reach threshold. + ''' + } + { bits: "23:16" + name: "PRESC" + resval: 0x0 + desc: "ADV_TIMER0 prescaler value configuration bitfield." + } + ] + } + { name: "T0_THRESHOLD" + desc: "ADV_TIMER0 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH_LO" + resval: 0x0 + desc: "ADV_TIMER0 threshold low part configuration bitfield. It defines start counter value." + } + { bits: "31:16" + name: "TH_HI" + resval: 0x0 + desc: "ADV_TIMER0 threshold high part configuration bitfield. It defines end counter value." + } + ] + } + { name: "T0_TH_CHANNEL0" + desc: "ADV_TIMER0 channel 0 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER0 channel 0 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER0 channel 0 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T0_TH_CHANNEL1" + desc: "ADV_TIMER0 channel 1 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER0 channel 1 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER0 channel 1 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T0_TH_CHANNEL2" + desc: "ADV_TIMER0 channel 2 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER0 channel 2 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER0 channel 2 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T0_TH_CHANNEL3" + desc: "ADV_TIMER0 channel 3 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER0 channel 3 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER0 channel 3 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T0_COUNTER" + desc: "ADV_TIMER0 counter register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "15:0" + name: "COUNTER" + resval: 0x0 + desc: "ADV_TIMER0 counter value." + } + ] + } + { name: "T1_CMD" + desc: "ADV_TIMER1 command register." + swaccess: "wo" + hwaccess: "hwo" + fields: [ + { bits: "0" + name: "START" + resval: 0x0 + desc: "ADV_TIMER1 start command bitfield." + } + { bits: "1" + name: "STOP" + resval: 0x0 + desc: "ADV_TIMER1 stop command bitfield." + } + { bits: "2" + name: "UPDATE" + resval: 0x0 + desc: "ADV_TIMER1 update command bitfield." + } + { bits: "3" + name: "RESET" + resval: 0x0 + desc: "ADV_TIMER1 reset command bitfield." + } + { bits: "4" + name: "ARM" + resval: 0x0 + desc: "ADV_TIMER1 arm command bitfield." + } + ] + } + { name: "T1_CONFIG" + desc: "ADV_TIMER1 configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "7:0" + name: "INSEL" + resval: 0x0 + desc: '''ADV_TIMER1 input source configuration bitfield: + - 0-31: GPIO[0] to GPIO[31] + - 32-35: Channel 0 to 3 of ADV_TIMER0 + - 36-39: Channel 0 to 3 of ADV_TIMER1 + - 40-43: Channel 0 to 3 of ADV_TIMER2 + - 44-47: Channel 0 to 3 of ADV_TIMER3 + ''' + } + { bits: "10:8" + name: "MODE" + swaccess: "rw" + hwaccess: "hrw" + resval: 0x0 + desc: '''ADV_TIMER1 trigger mode configuration bitfield: + - 3'h0: trigger event at each clock cycle. + - 3'h1: trigger event if input source is 0 + - 3'h2: trigger event if input source is 1 + - 3'h3: trigger event on input source rising edge + - 3'h4: trigger event on input source falling edge + - 3'h5: trigger event on input source falling or rising edge + - 3'h6: trigger event on input source rising edge when armed + - 3'h7: trigger event on input source falling edge when armed + ''' + } + { bits: "11" + name: "CLKSEL" + resval: 0x0 + desc: '''ADV_TIMER1 clock source configuration bitfield: + - 1'b0: FLL + - 1'b1: reference clock at 32kHz + ''' + } + { bits: "12" + name: "UPDOWNSEL" + resval: 0x1 + desc: '''ADV_TIMER1 center-aligned mode configuration bitfield: + - 1'b0: The counter counts up and down alternatively. + - 1'b1: The counter counts up and resets to 0 when reach threshold. + ''' + } + { bits: "23:16" + name: "PRESC" + resval: 0x0 + desc: "ADV_TIMER1 prescaler value configuration bitfield." + } + ] + } + { name: "T1_THRESHOLD" + desc: "ADV_TIMER1 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH_LO" + resval: 0x0 + desc: "ADV_TIMER1 threshold low part configuration bitfield. It defines start counter value." + } + { bits: "31:16" + name: "TH_HI" + resval: 0x0 + desc: "ADV_TIMER1 threshold high part configuration bitfield. It defines end counter value." + } + ] + } + { name: "T1_TH_CHANNEL0" + desc: "ADV_TIMER1 channel 0 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER1 channel 0 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER1 channel 0 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T1_TH_CHANNEL1" + desc: "ADV_TIMER1 channel 1 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER1 channel 1 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER1 channel 1 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T1_TH_CHANNEL2" + desc: "ADV_TIMER1 channel 2 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER1 channel 2 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER1 channel 2 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T1_TH_CHANNEL3" + desc: "ADV_TIMER1 channel 3 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER1 channel 3 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER1 channel 3 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T1_COUNTER" + desc: "ADV_TIMER1 counter register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "15:0" + name: "COUNTER" + resval: 0x0 + desc: "ADV_TIMER1 counter value." + } + ] + } + { name: "T2_CMD" + desc: "ADV_TIMER2 command register." + swaccess: "wo" + hwaccess: "hwo" + fields: [ + { bits: "0" + name: "START" + resval: 0x0 + desc: "ADV_TIMER2 start command bitfield." + } + { bits: "1" + name: "STOP" + resval: 0x0 + desc: "ADV_TIMER2 stop command bitfield." + } + { bits: "2" + name: "UPDATE" + resval: 0x0 + desc: "ADV_TIMER2 update command bitfield." + } + { bits: "3" + name: "RESET" + resval: 0x0 + desc: "ADV_TIMER2 reset command bitfield." + } + { bits: "4" + name: "ARM" + resval: 0x0 + desc: "ADV_TIMER2 arm command bitfield." + } + ] + } + { name: "T2_CONFIG" + desc: "ADV_TIMER2 configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "7:0" + name: "INSEL" + resval: 0x0 + desc: '''ADV_TIMER2 input source configuration bitfield: + - 0-31: GPIO[0] to GPIO[31] + - 32-35: Channel 0 to 3 of ADV_TIMER0 + - 36-39: Channel 0 to 3 of ADV_TIMER1 + - 40-43: Channel 0 to 3 of ADV_TIMER2 + - 44-47: Channel 0 to 3 of ADV_TIMER3 + ''' + } + { bits: "10:8" + name: "MODE" + swaccess: "rw" + hwaccess: "hrw" + resval: 0x0 + desc: '''ADV_TIMER2 trigger mode configuration bitfield: + - 3'h0: trigger event at each clock cycle. + - 3'h1: trigger event if input source is 0 + - 3'h2: trigger event if input source is 1 + - 3'h3: trigger event on input source rising edge + - 3'h4: trigger event on input source falling edge + - 3'h5: trigger event on input source falling or rising edge + - 3'h6: trigger event on input source rising edge when armed + - 3'h7: trigger event on input source falling edge when armed + ''' + } + { bits: "11" + name: "CLKSEL" + resval: 0x0 + desc: '''ADV_TIMER2 clock source configuration bitfield: + - 1'b0: FLL + - 1'b1: reference clock at 32kHz + ''' + } + { bits: "12" + name: "UPDOWNSEL" + resval: 0x1 + desc: '''ADV_TIMER2 center-aligned mode configuration bitfield: + - 1'b0: The counter counts up and down alternatively. + - 1'b1: The counter counts up and resets to 0 when reach threshold. + ''' + } + { bits: "23:16" + name: "PRESC" + resval: 0x0 + desc: "ADV_TIMER2 prescaler value configuration bitfield." + } + ] + } + { name: "T2_THRESHOLD" + desc: "ADV_TIMER2 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH_LO" + resval: 0x0 + desc: "ADV_TIMER2 threshold low part configuration bitfield. It defines start counter value." + } + { bits: "31:16" + name: "TH_HI" + resval: 0x0 + desc: "ADV_TIMER2 threshold high part configuration bitfield. It defines end counter value." + } + ] + } + { name: "T2_TH_CHANNEL0" + desc: "ADV_TIMER2 channel 0 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER2 channel 0 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER2 channel 0 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T2_TH_CHANNEL1" + desc: "ADV_TIMER2 channel 1 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER2 channel 1 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER2 channel 1 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T2_TH_CHANNEL2" + desc: "ADV_TIMER2 channel 2 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER2 channel 2 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER2 channel 2 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T2_TH_CHANNEL3" + desc: "ADV_TIMER2 channel 3 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER2 channel 3 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER2 channel 3 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T2_COUNTER" + desc: "ADV_TIMER2 counter register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "15:0" + name: "COUNTER" + resval: 0x0 + desc: "ADV_TIMER2 counter value." + } + ] + } + { name: "T3_CMD" + desc: "ADV_TIMER3 command register." + swaccess: "wo" + hwaccess: "hwo" + fields: [ + { bits: "0" + name: "START" + resval: 0x0 + desc: "ADV_TIMER3 start command bitfield." + } + { bits: "1" + name: "STOP" + resval: 0x0 + desc: "ADV_TIMER3 stop command bitfield." + } + { bits: "2" + name: "UPDATE" + resval: 0x0 + desc: "ADV_TIMER3 update command bitfield." + } + { bits: "3" + name: "RESET" + resval: 0x0 + desc: "ADV_TIMER3 reset command bitfield." + } + { bits: "4" + name: "ARM" + resval: 0x0 + desc: "ADV_TIMER3 arm command bitfield." + } + ] + } + { name: "T3_CONFIG" + desc: "ADV_TIMER3 configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "7:0" + name: "INSEL" + resval: 0x0 + desc: '''ADV_TIMER3 input source configuration bitfield: + - 0-31: GPIO[0] to GPIO[31] + - 32-35: Channel 0 to 3 of ADV_TIMER0 + - 36-39: Channel 0 to 3 of ADV_TIMER1 + - 40-43: Channel 0 to 3 of ADV_TIMER2 + - 44-47: Channel 0 to 3 of ADV_TIMER3 + ''' + } + { bits: "10:8" + name: "MODE" + swaccess: "rw" + hwaccess: "hrw" + resval: 0x0 + desc: '''ADV_TIMER3 trigger mode configuration bitfield: + - 3'h0: trigger event at each clock cycle. + - 3'h1: trigger event if input source is 0 + - 3'h2: trigger event if input source is 1 + - 3'h3: trigger event on input source rising edge + - 3'h4: trigger event on input source falling edge + - 3'h5: trigger event on input source falling or rising edge + - 3'h6: trigger event on input source rising edge when armed + - 3'h7: trigger event on input source falling edge when armed + ''' + } + { bits: "11" + name: "CLKSEL" + resval: 0x0 + desc: '''ADV_TIMER3 clock source configuration bitfield: + - 1'b0: FLL + - 1'b1: reference clock at 32kHz + ''' + } + { bits: "12" + name: "UPDOWNSEL" + resval: 0x1 + desc: '''ADV_TIMER3 center-aligned mode configuration bitfield: + - 1'b0: The counter counts up and down alternatively. + - 1'b1: The counter counts up and resets to 0 when reach threshold. + ''' + } + { bits: "23:16" + name: "PRESC" + resval: 0x0 + desc: "ADV_TIMER3 prescaler value configuration bitfield." + } + ] + } + { name: "T3_THRESHOLD" + desc: "ADV_TIMER3 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH_LO" + resval: 0x0 + desc: "ADV_TIMER3 threshold low part configuration bitfield. It defines start counter value." + } + { bits: "31:16" + name: "TH_HI" + resval: 0x0 + desc: "ADV_TIMER3 threshold high part configuration bitfield. It defines end counter value." + } + ] + } + { name: "T3_TH_CHANNEL0" + desc: "ADV_TIMER3 channel 0 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER3 channel 0 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER3 channel 0 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T3_TH_CHANNEL1" + desc: "ADV_TIMER3 channel 1 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER3 channel 1 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER3 channel 1 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T3_TH_CHANNEL2" + desc: "ADV_TIMER3 channel 2 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER3 channel 2 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER3 channel 2 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T3_TH_CHANNEL3" + desc: "ADV_TIMER3 channel 3 threshold configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "15:0" + name: "TH" + resval: 0x0 + desc: "ADV_TIMER3 channel 3 threshold configuration bitfield." + } + { bits: "18:16" + name: "MODE" + resval: 0x0 + desc: '''ADV_TIMER3 channel 3 threshold match action on channel output signal configuration bitfield: + - 3'h0: set. + - 3'h1: toggle then next threshold match action is clear. + - 3'h2: set then next threshold match action is clear. + - 3'h3: toggle. + - 3'h4: clear. + - 3'h5: toggle then next threshold match action is set. + - 3'h6: clear then next threshold match action is set. + ''' + } + ] + } + { name: "T3_COUNTER" + desc: "ADV_TIMER3 counter register." + swaccess: "ro" + hwaccess: "hwo" + fields: [ + { bits: "15:0" + name: "COUNTER" + resval: 0x0 + desc: "ADV_TIMER3 counter value." + } + ] + } + { name: "EVENT_CFG" + desc: "ADV_TIMERS events configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "3:0" + name: "SEL0" + resval: 0x0 + desc: '''ADV_TIMER output event 0 source configuration bitfiled: + - 4'h0: ADV_TIMER0 channel 0. + - 4'h1: ADV_TIMER0 channel 1. + - 4'h2: ADV_TIMER0 channel 2. + - 4'h3: ADV_TIMER0 channel 3. + - 4'h4: ADV_TIMER1 channel 0. + - 4'h5: ADV_TIMER1 channel 1. + - 4'h6: ADV_TIMER1 channel 2. + - 4'h7: ADV_TIMER1 channel 3. + - 4'h8: ADV_TIMER2 channel 0. + - 4'h9: ADV_TIMER2 channel 1. + - 4'hA: ADV_TIMER2 channel 2. + - 4'hB: ADV_TIMER2 channel 3. + - 4'hC: ADV_TIMER3 channel 0. + - 4'hD: ADV_TIMER3 channel 1. + - 4'hE: ADV_TIMER3 channel 2. + - 4'hF: ADV_TIMER3 channel 3. + ''' + } + { bits: "7:4" + name: "SEL1" + resval: 0x0 + desc: '''ADV_TIMER output event 1 source configuration bitfiled: + - 4'h0: ADV_TIMER0 channel 0. + - 4'h1: ADV_TIMER0 channel 1. + - 4'h2: ADV_TIMER0 channel 2. + - 4'h3: ADV_TIMER0 channel 3. + - 4'h4: ADV_TIMER1 channel 0. + - 4'h5: ADV_TIMER1 channel 1. + - 4'h6: ADV_TIMER1 channel 2. + - 4'h7: ADV_TIMER1 channel 3. + - 4'h8: ADV_TIMER2 channel 0. + - 4'h9: ADV_TIMER2 channel 1. + - 4'hA: ADV_TIMER2 channel 2. + - 4'hB: ADV_TIMER2 channel 3. + - 4'hC: ADV_TIMER3 channel 0. + - 4'hD: ADV_TIMER3 channel 1. + - 4'hE: ADV_TIMER3 channel 2. + - 4'hF: ADV_TIMER3 channel 3. + ''' + } + { bits: "11:8" + name: "SEL2" + resval: 0x0 + desc: '''ADV_TIMER output event 2 source configuration bitfiled: + - 4'h0: ADV_TIMER0 channel 0. + - 4'h1: ADV_TIMER0 channel 1. + - 4'h2: ADV_TIMER0 channel 2. + - 4'h3: ADV_TIMER0 channel 3. + - 4'h4: ADV_TIMER1 channel 0. + - 4'h5: ADV_TIMER1 channel 1. + - 4'h6: ADV_TIMER1 channel 2. + - 4'h7: ADV_TIMER1 channel 3. + - 4'h8: ADV_TIMER2 channel 0. + - 4'h9: ADV_TIMER2 channel 1. + - 4'hA: ADV_TIMER2 channel 2. + - 4'hB: ADV_TIMER2 channel 3. + - 4'hC: ADV_TIMER3 channel 0. + - 4'hD: ADV_TIMER3 channel 1. + - 4'hE: ADV_TIMER3 channel 2. + - 4'hF: ADV_TIMER3 channel 3. + ''' + } + { bits: "15:12" + name: "SEL3" + resval: 0x0 + desc: '''ADV_TIMER output event 3 source configuration bitfiled: + - 4'h0: ADV_TIMER0 channel 0. + - 4'h1: ADV_TIMER0 channel 1. + - 4'h2: ADV_TIMER0 channel 2. + - 4'h3: ADV_TIMER0 channel 3. + - 4'h4: ADV_TIMER1 channel 0. + - 4'h5: ADV_TIMER1 channel 1. + - 4'h6: ADV_TIMER1 channel 2. + - 4'h7: ADV_TIMER1 channel 3. + - 4'h8: ADV_TIMER2 channel 0. + - 4'h9: ADV_TIMER2 channel 1. + - 4'hA: ADV_TIMER2 channel 2. + - 4'hB: ADV_TIMER2 channel 3. + - 4'hC: ADV_TIMER3 channel 0. + - 4'hD: ADV_TIMER3 channel 1. + - 4'hE: ADV_TIMER3 channel 2. + - 4'hF: ADV_TIMER3 channel 3. + ''' + } + { bits: "19:16" + name: "ENA" + resval: 0x0 + desc: "ADV_TIMER output event enable configuration bitfield. ENA[i]=1 enables output event i generation." + } + ] + } + { name: "CG" + desc: "ADV_TIMERS channels clock gating configuration register." + swaccess: "rw" + hwaccess: "hrw" + fields: [ + { bits: "3:0" + name: "ENA" + resval: 0x0 + desc: '''ADV_TIMER clock gating configuration bitfield. + - ENA[i]=0: clock gate ADV_TIMERi. + - ENA[i]=1: enable ADV_TIMERi. + ''' + } + ] + } + ] +} diff --git a/docs/um/ip/gp_timer2_advanced_timer/doc/registers.md b/docs/um/ip/gp_timer2_advanced_timer/doc/registers.md new file mode 100644 index 00000000..d52b1b7b --- /dev/null +++ b/docs/um/ip/gp_timer2_advanced_timer/doc/registers.md @@ -0,0 +1,1088 @@ +## Summary + +| Name | Offset | Length | Description | +|:--------------------------------------------------|:---------|---------:|:---------------------------------------------------------| +| apb_adv_timer.[`T0_CMD`](#t0_cmd) | 0x0 | 4 | ADV_TIMER0 command register. | +| apb_adv_timer.[`T0_CONFIG`](#t0_config) | 0x4 | 4 | ADV_TIMER0 configuration register. | +| apb_adv_timer.[`T0_THRESHOLD`](#t0_threshold) | 0x8 | 4 | ADV_TIMER0 threshold configuration register. | +| apb_adv_timer.[`T0_TH_CHANNEL0`](#t0_th_channel0) | 0xc | 4 | ADV_TIMER0 channel 0 threshold configuration register. | +| apb_adv_timer.[`T0_TH_CHANNEL1`](#t0_th_channel1) | 0x10 | 4 | ADV_TIMER0 channel 1 threshold configuration register. | +| apb_adv_timer.[`T0_TH_CHANNEL2`](#t0_th_channel2) | 0x14 | 4 | ADV_TIMER0 channel 2 threshold configuration register. | +| apb_adv_timer.[`T0_TH_CHANNEL3`](#t0_th_channel3) | 0x18 | 4 | ADV_TIMER0 channel 3 threshold configuration register. | +| apb_adv_timer.[`T0_COUNTER`](#t0_counter) | 0x1c | 4 | ADV_TIMER0 counter register. | +| apb_adv_timer.[`T1_CMD`](#t1_cmd) | 0x20 | 4 | ADV_TIMER1 command register. | +| apb_adv_timer.[`T1_CONFIG`](#t1_config) | 0x24 | 4 | ADV_TIMER1 configuration register. | +| apb_adv_timer.[`T1_THRESHOLD`](#t1_threshold) | 0x28 | 4 | ADV_TIMER1 threshold configuration register. | +| apb_adv_timer.[`T1_TH_CHANNEL0`](#t1_th_channel0) | 0x2c | 4 | ADV_TIMER1 channel 0 threshold configuration register. | +| apb_adv_timer.[`T1_TH_CHANNEL1`](#t1_th_channel1) | 0x30 | 4 | ADV_TIMER1 channel 1 threshold configuration register. | +| apb_adv_timer.[`T1_TH_CHANNEL2`](#t1_th_channel2) | 0x34 | 4 | ADV_TIMER1 channel 2 threshold configuration register. | +| apb_adv_timer.[`T1_TH_CHANNEL3`](#t1_th_channel3) | 0x38 | 4 | ADV_TIMER1 channel 3 threshold configuration register. | +| apb_adv_timer.[`T1_COUNTER`](#t1_counter) | 0x3c | 4 | ADV_TIMER1 counter register. | +| apb_adv_timer.[`T2_CMD`](#t2_cmd) | 0x40 | 4 | ADV_TIMER2 command register. | +| apb_adv_timer.[`T2_CONFIG`](#t2_config) | 0x44 | 4 | ADV_TIMER2 configuration register. | +| apb_adv_timer.[`T2_THRESHOLD`](#t2_threshold) | 0x48 | 4 | ADV_TIMER2 threshold configuration register. | +| apb_adv_timer.[`T2_TH_CHANNEL0`](#t2_th_channel0) | 0x4c | 4 | ADV_TIMER2 channel 0 threshold configuration register. | +| apb_adv_timer.[`T2_TH_CHANNEL1`](#t2_th_channel1) | 0x50 | 4 | ADV_TIMER2 channel 1 threshold configuration register. | +| apb_adv_timer.[`T2_TH_CHANNEL2`](#t2_th_channel2) | 0x54 | 4 | ADV_TIMER2 channel 2 threshold configuration register. | +| apb_adv_timer.[`T2_TH_CHANNEL3`](#t2_th_channel3) | 0x58 | 4 | ADV_TIMER2 channel 3 threshold configuration register. | +| apb_adv_timer.[`T2_COUNTER`](#t2_counter) | 0x5c | 4 | ADV_TIMER2 counter register. | +| apb_adv_timer.[`T3_CMD`](#t3_cmd) | 0x60 | 4 | ADV_TIMER3 command register. | +| apb_adv_timer.[`T3_CONFIG`](#t3_config) | 0x64 | 4 | ADV_TIMER3 configuration register. | +| apb_adv_timer.[`T3_THRESHOLD`](#t3_threshold) | 0x68 | 4 | ADV_TIMER3 threshold configuration register. | +| apb_adv_timer.[`T3_TH_CHANNEL0`](#t3_th_channel0) | 0x6c | 4 | ADV_TIMER3 channel 0 threshold configuration register. | +| apb_adv_timer.[`T3_TH_CHANNEL1`](#t3_th_channel1) | 0x70 | 4 | ADV_TIMER3 channel 1 threshold configuration register. | +| apb_adv_timer.[`T3_TH_CHANNEL2`](#t3_th_channel2) | 0x74 | 4 | ADV_TIMER3 channel 2 threshold configuration register. | +| apb_adv_timer.[`T3_TH_CHANNEL3`](#t3_th_channel3) | 0x78 | 4 | ADV_TIMER3 channel 3 threshold configuration register. | +| apb_adv_timer.[`T3_COUNTER`](#t3_counter) | 0x7c | 4 | ADV_TIMER3 counter register. | +| apb_adv_timer.[`EVENT_CFG`](#event_cfg) | 0x80 | 4 | ADV_TIMERS events configuration register. | +| apb_adv_timer.[`CG`](#cg) | 0x84 | 4 | ADV_TIMERS channels clock gating configuration register. | + +## T0_CMD +ADV_TIMER0 command register. +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "START", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "STOP", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "UPDATE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RESET", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "ARM", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RFU", "bits": 27, "attr": ["wo"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------| +| 31:5 | wo | 0x0 | RFU | ? | +| 4 | wo | 0x0 | ARM | ADV_TIMER0 arm command bitfield. | +| 3 | wo | 0x0 | RESET | ADV_TIMER0 reset command bitfield. | +| 2 | wo | 0x0 | UPDATE | ADV_TIMER0 update command bitfield. | +| 1 | wo | 0x0 | STOP | ADV_TIMER0 stop command bitfield. | +| 0 | wo | 0x0 | START | ADV_TIMER0 start command bitfield. | + +## T0_CONFIG +ADV_TIMER0 configuration register. +- Offset: `0x4` +- Reset default: `0x1000` +- Reset mask: `0xff1fff` + +### Fields + +```wavejson +{"reg": [{"name": "INSEL", "bits": 8, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"name": "CLKSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "UPDOWNSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 3}, {"name": "PRESC", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------------| +| 31:24 | | | Reserved | +| 23:16 | rw | 0x0 | [PRESC](#t0_config--presc) | +| 15:13 | | | Reserved | +| 12 | rw | 0x1 | [UPDOWNSEL](#t0_config--updownsel) | +| 11 | rw | 0x0 | [CLKSEL](#t0_config--clksel) | +| 10:8 | rw | 0x0 | [MODE](#t0_config--mode) | +| 7:0 | rw | 0x0 | [INSEL](#t0_config--insel) | + +### T0_CONFIG . PRESC +ADV_TIMER0 prescaler value configuration bitfield. + +### T0_CONFIG . UPDOWNSEL +ADV_TIMER0 center-aligned mode configuration bitfield: +- 1'b0: The counter counts up and down alternatively. +- 1'b1: The counter counts up and resets to 0 when reach threshold. + +### T0_CONFIG . CLKSEL +ADV_TIMER0 clock source configuration bitfield: +- 1'b0: FLL +- 1'b1: reference clock at 32kHz + +### T0_CONFIG . MODE +ADV_TIMER0 trigger mode configuration bitfield: +- 3'h0: trigger event at each clock cycle. +- 3'h1: trigger event if input source is 0 +- 3'h2: trigger event if input source is 1 +- 3'h3: trigger event on input source rising edge +- 3'h4: trigger event on input source falling edge +- 3'h5: trigger event on input source falling or rising edge +- 3'h6: trigger event on input source rising edge when armed +- 3'h7: trigger event on input source falling edge when armed + +### T0_CONFIG . INSEL +ADV_TIMER0 input source configuration bitfield: +- 0-31: GPIO[0] to GPIO[31] +- 32-35: Channel 0 to 3 of ADV_TIMER0 +- 36-39: Channel 0 to 3 of ADV_TIMER1 +- 40-43: Channel 0 to 3 of ADV_TIMER2 +- 44-47: Channel 0 to 3 of ADV_TIMER3 + +## T0_THRESHOLD +ADV_TIMER0 threshold configuration register. +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH_LO", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "TH_HI", "bits": 16, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------| +| 31:16 | rw | 0x0 | TH_HI | ADV_TIMER0 threshold high part configuration bitfield. It defines end counter value. | +| 15:0 | rw | 0x0 | TH_LO | ADV_TIMER0 threshold low part configuration bitfield. It defines start counter value. | + +## T0_TH_CHANNEL0 +ADV_TIMER0 channel 0 threshold configuration register. +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t0_th_channel0--mode) | +| 15:0 | rw | 0x0 | [TH](#t0_th_channel0--th) | + +### T0_TH_CHANNEL0 . MODE +ADV_TIMER0 channel 0 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T0_TH_CHANNEL0 . TH +ADV_TIMER0 channel 0 threshold configuration bitfield. + +## T0_TH_CHANNEL1 +ADV_TIMER0 channel 1 threshold configuration register. +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t0_th_channel1--mode) | +| 15:0 | rw | 0x0 | [TH](#t0_th_channel1--th) | + +### T0_TH_CHANNEL1 . MODE +ADV_TIMER0 channel 1 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T0_TH_CHANNEL1 . TH +ADV_TIMER0 channel 1 threshold configuration bitfield. + +## T0_TH_CHANNEL2 +ADV_TIMER0 channel 2 threshold configuration register. +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t0_th_channel2--mode) | +| 15:0 | rw | 0x0 | [TH](#t0_th_channel2--th) | + +### T0_TH_CHANNEL2 . MODE +ADV_TIMER0 channel 2 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T0_TH_CHANNEL2 . TH +ADV_TIMER0 channel 2 threshold configuration bitfield. + +## T0_TH_CHANNEL3 +ADV_TIMER0 channel 3 threshold configuration register. +- Offset: `0x18` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t0_th_channel3--mode) | +| 15:0 | rw | 0x0 | [TH](#t0_th_channel3--th) | + +### T0_TH_CHANNEL3 . MODE +ADV_TIMER0 channel 3 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T0_TH_CHANNEL3 . TH +ADV_TIMER0 channel 3 threshold configuration bitfield. + +## T0_COUNTER +ADV_TIMER0 counter register. +- Offset: `0x1c` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "COUNTER", "bits": 16, "attr": ["ro"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------------------| +| 31:16 | | | | Reserved | +| 15:0 | ro | 0x0 | COUNTER | ADV_TIMER0 counter value. | + +## T1_CMD +ADV_TIMER1 command register. +- Offset: `0x20` +- Reset default: `0x0` +- Reset mask: `0x1f` + +### Fields + +```wavejson +{"reg": [{"name": "START", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "STOP", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "UPDATE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RESET", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "ARM", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 27}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------| +| 31:5 | | | | Reserved | +| 4 | wo | 0x0 | ARM | ADV_TIMER1 arm command bitfield. | +| 3 | wo | 0x0 | RESET | ADV_TIMER1 reset command bitfield. | +| 2 | wo | 0x0 | UPDATE | ADV_TIMER1 update command bitfield. | +| 1 | wo | 0x0 | STOP | ADV_TIMER1 stop command bitfield. | +| 0 | wo | 0x0 | START | ADV_TIMER1 start command bitfield. | + +## T1_CONFIG +ADV_TIMER1 configuration register. +- Offset: `0x24` +- Reset default: `0x1000` +- Reset mask: `0xff1fff` + +### Fields + +```wavejson +{"reg": [{"name": "INSEL", "bits": 8, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"name": "CLKSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "UPDOWNSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 3}, {"name": "PRESC", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------------| +| 31:24 | | | Reserved | +| 23:16 | rw | 0x0 | [PRESC](#t1_config--presc) | +| 15:13 | | | Reserved | +| 12 | rw | 0x1 | [UPDOWNSEL](#t1_config--updownsel) | +| 11 | rw | 0x0 | [CLKSEL](#t1_config--clksel) | +| 10:8 | rw | 0x0 | [MODE](#t1_config--mode) | +| 7:0 | rw | 0x0 | [INSEL](#t1_config--insel) | + +### T1_CONFIG . PRESC +ADV_TIMER1 prescaler value configuration bitfield. + +### T1_CONFIG . UPDOWNSEL +ADV_TIMER1 center-aligned mode configuration bitfield: +- 1'b0: The counter counts up and down alternatively. +- 1'b1: The counter counts up and resets to 0 when reach threshold. + +### T1_CONFIG . CLKSEL +ADV_TIMER1 clock source configuration bitfield: +- 1'b0: FLL +- 1'b1: reference clock at 32kHz + +### T1_CONFIG . MODE +ADV_TIMER1 trigger mode configuration bitfield: +- 3'h0: trigger event at each clock cycle. +- 3'h1: trigger event if input source is 0 +- 3'h2: trigger event if input source is 1 +- 3'h3: trigger event on input source rising edge +- 3'h4: trigger event on input source falling edge +- 3'h5: trigger event on input source falling or rising edge +- 3'h6: trigger event on input source rising edge when armed +- 3'h7: trigger event on input source falling edge when armed + +### T1_CONFIG . INSEL +ADV_TIMER1 input source configuration bitfield: +- 0-31: GPIO[0] to GPIO[31] +- 32-35: Channel 0 to 3 of ADV_TIMER0 +- 36-39: Channel 0 to 3 of ADV_TIMER1 +- 40-43: Channel 0 to 3 of ADV_TIMER2 +- 44-47: Channel 0 to 3 of ADV_TIMER3 + +## T1_THRESHOLD +ADV_TIMER1 threshold configuration register. +- Offset: `0x28` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH_LO", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "TH_HI", "bits": 16, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------| +| 31:16 | rw | 0x0 | TH_HI | ADV_TIMER1 threshold high part configuration bitfield. It defines end counter value. | +| 15:0 | rw | 0x0 | TH_LO | ADV_TIMER1 threshold low part configuration bitfield. It defines start counter value. | + +## T1_TH_CHANNEL0 +ADV_TIMER1 channel 0 threshold configuration register. +- Offset: `0x2c` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t1_th_channel0--mode) | +| 15:0 | rw | 0x0 | [TH](#t1_th_channel0--th) | + +### T1_TH_CHANNEL0 . MODE +ADV_TIMER1 channel 0 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T1_TH_CHANNEL0 . TH +ADV_TIMER1 channel 0 threshold configuration bitfield. + +## T1_TH_CHANNEL1 +ADV_TIMER1 channel 1 threshold configuration register. +- Offset: `0x30` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t1_th_channel1--mode) | +| 15:0 | rw | 0x0 | [TH](#t1_th_channel1--th) | + +### T1_TH_CHANNEL1 . MODE +ADV_TIMER1 channel 1 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T1_TH_CHANNEL1 . TH +ADV_TIMER1 channel 1 threshold configuration bitfield. + +## T1_TH_CHANNEL2 +ADV_TIMER1 channel 2 threshold configuration register. +- Offset: `0x34` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t1_th_channel2--mode) | +| 15:0 | rw | 0x0 | [TH](#t1_th_channel2--th) | + +### T1_TH_CHANNEL2 . MODE +ADV_TIMER1 channel 2 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T1_TH_CHANNEL2 . TH +ADV_TIMER1 channel 2 threshold configuration bitfield. + +## T1_TH_CHANNEL3 +ADV_TIMER1 channel 3 threshold configuration register. +- Offset: `0x38` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t1_th_channel3--mode) | +| 15:0 | rw | 0x0 | [TH](#t1_th_channel3--th) | + +### T1_TH_CHANNEL3 . MODE +ADV_TIMER1 channel 3 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T1_TH_CHANNEL3 . TH +ADV_TIMER1 channel 3 threshold configuration bitfield. + +## T1_COUNTER +ADV_TIMER1 counter register. +- Offset: `0x3c` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "COUNTER", "bits": 16, "attr": ["ro"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------------------| +| 31:16 | | | | Reserved | +| 15:0 | ro | 0x0 | COUNTER | ADV_TIMER1 counter value. | + +## T2_CMD +ADV_TIMER2 command register. +- Offset: `0x40` +- Reset default: `0x0` +- Reset mask: `0x1f` + +### Fields + +```wavejson +{"reg": [{"name": "START", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "STOP", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "UPDATE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RESET", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "ARM", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 27}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------| +| 31:5 | | | | Reserved | +| 4 | wo | 0x0 | ARM | ADV_TIMER2 arm command bitfield. | +| 3 | wo | 0x0 | RESET | ADV_TIMER2 reset command bitfield. | +| 2 | wo | 0x0 | UPDATE | ADV_TIMER2 update command bitfield. | +| 1 | wo | 0x0 | STOP | ADV_TIMER2 stop command bitfield. | +| 0 | wo | 0x0 | START | ADV_TIMER2 start command bitfield. | + +## T2_CONFIG +ADV_TIMER2 configuration register. +- Offset: `0x44` +- Reset default: `0x1000` +- Reset mask: `0xff1fff` + +### Fields + +```wavejson +{"reg": [{"name": "INSEL", "bits": 8, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"name": "CLKSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "UPDOWNSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 3}, {"name": "PRESC", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------------| +| 31:24 | | | Reserved | +| 23:16 | rw | 0x0 | [PRESC](#t2_config--presc) | +| 15:13 | | | Reserved | +| 12 | rw | 0x1 | [UPDOWNSEL](#t2_config--updownsel) | +| 11 | rw | 0x0 | [CLKSEL](#t2_config--clksel) | +| 10:8 | rw | 0x0 | [MODE](#t2_config--mode) | +| 7:0 | rw | 0x0 | [INSEL](#t2_config--insel) | + +### T2_CONFIG . PRESC +ADV_TIMER2 prescaler value configuration bitfield. + +### T2_CONFIG . UPDOWNSEL +ADV_TIMER2 center-aligned mode configuration bitfield: +- 1'b0: The counter counts up and down alternatively. +- 1'b1: The counter counts up and resets to 0 when reach threshold. + +### T2_CONFIG . CLKSEL +ADV_TIMER2 clock source configuration bitfield: +- 1'b0: FLL +- 1'b1: reference clock at 32kHz + +### T2_CONFIG . MODE +ADV_TIMER2 trigger mode configuration bitfield: +- 3'h0: trigger event at each clock cycle. +- 3'h1: trigger event if input source is 0 +- 3'h2: trigger event if input source is 1 +- 3'h3: trigger event on input source rising edge +- 3'h4: trigger event on input source falling edge +- 3'h5: trigger event on input source falling or rising edge +- 3'h6: trigger event on input source rising edge when armed +- 3'h7: trigger event on input source falling edge when armed + +### T2_CONFIG . INSEL +ADV_TIMER2 input source configuration bitfield: +- 0-31: GPIO[0] to GPIO[31] +- 32-35: Channel 0 to 3 of ADV_TIMER0 +- 36-39: Channel 0 to 3 of ADV_TIMER1 +- 40-43: Channel 0 to 3 of ADV_TIMER2 +- 44-47: Channel 0 to 3 of ADV_TIMER3 + +## T2_THRESHOLD +ADV_TIMER2 threshold configuration register. +- Offset: `0x48` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH_LO", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "TH_HI", "bits": 16, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------| +| 31:16 | rw | 0x0 | TH_HI | ADV_TIMER2 threshold high part configuration bitfield. It defines end counter value. | +| 15:0 | rw | 0x0 | TH_LO | ADV_TIMER2 threshold low part configuration bitfield. It defines start counter value. | + +## T2_TH_CHANNEL0 +ADV_TIMER2 channel 0 threshold configuration register. +- Offset: `0x4c` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t2_th_channel0--mode) | +| 15:0 | rw | 0x0 | [TH](#t2_th_channel0--th) | + +### T2_TH_CHANNEL0 . MODE +ADV_TIMER2 channel 0 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T2_TH_CHANNEL0 . TH +ADV_TIMER2 channel 0 threshold configuration bitfield. + +## T2_TH_CHANNEL1 +ADV_TIMER2 channel 1 threshold configuration register. +- Offset: `0x50` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t2_th_channel1--mode) | +| 15:0 | rw | 0x0 | [TH](#t2_th_channel1--th) | + +### T2_TH_CHANNEL1 . MODE +ADV_TIMER2 channel 1 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T2_TH_CHANNEL1 . TH +ADV_TIMER2 channel 1 threshold configuration bitfield. + +## T2_TH_CHANNEL2 +ADV_TIMER2 channel 2 threshold configuration register. +- Offset: `0x54` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t2_th_channel2--mode) | +| 15:0 | rw | 0x0 | [TH](#t2_th_channel2--th) | + +### T2_TH_CHANNEL2 . MODE +ADV_TIMER2 channel 2 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T2_TH_CHANNEL2 . TH +ADV_TIMER2 channel 2 threshold configuration bitfield. + +## T2_TH_CHANNEL3 +ADV_TIMER2 channel 3 threshold configuration register. +- Offset: `0x58` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t2_th_channel3--mode) | +| 15:0 | rw | 0x0 | [TH](#t2_th_channel3--th) | + +### T2_TH_CHANNEL3 . MODE +ADV_TIMER2 channel 3 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T2_TH_CHANNEL3 . TH +ADV_TIMER2 channel 3 threshold configuration bitfield. + +## T2_COUNTER +ADV_TIMER2 counter register. +- Offset: `0x5c` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "COUNTER", "bits": 16, "attr": ["ro"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------------------| +| 31:16 | | | | Reserved | +| 15:0 | ro | 0x0 | COUNTER | ADV_TIMER2 counter value. | + +## T3_CMD +ADV_TIMER3 command register. +- Offset: `0x60` +- Reset default: `0x0` +- Reset mask: `0x1f` + +### Fields + +```wavejson +{"reg": [{"name": "START", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "STOP", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "UPDATE", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "RESET", "bits": 1, "attr": ["wo"], "rotate": -90}, {"name": "ARM", "bits": 1, "attr": ["wo"], "rotate": -90}, {"bits": 27}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:------------------------------------| +| 31:5 | | | | Reserved | +| 4 | wo | 0x0 | ARM | ADV_TIMER3 arm command bitfield. | +| 3 | wo | 0x0 | RESET | ADV_TIMER3 reset command bitfield. | +| 2 | wo | 0x0 | UPDATE | ADV_TIMER3 update command bitfield. | +| 1 | wo | 0x0 | STOP | ADV_TIMER3 stop command bitfield. | +| 0 | wo | 0x0 | START | ADV_TIMER3 start command bitfield. | + +## T3_CONFIG +ADV_TIMER3 configuration register. +- Offset: `0x64` +- Reset default: `0x1000` +- Reset mask: `0xff1fff` + +### Fields + +```wavejson +{"reg": [{"name": "INSEL", "bits": 8, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"name": "CLKSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "UPDOWNSEL", "bits": 1, "attr": ["rw"], "rotate": -90}, {"bits": 3}, {"name": "PRESC", "bits": 8, "attr": ["rw"], "rotate": 0}, {"bits": 8}], "config": {"lanes": 1, "fontsize": 10, "vspace": 110}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-----------------------------------| +| 31:24 | | | Reserved | +| 23:16 | rw | 0x0 | [PRESC](#t3_config--presc) | +| 15:13 | | | Reserved | +| 12 | rw | 0x1 | [UPDOWNSEL](#t3_config--updownsel) | +| 11 | rw | 0x0 | [CLKSEL](#t3_config--clksel) | +| 10:8 | rw | 0x0 | [MODE](#t3_config--mode) | +| 7:0 | rw | 0x0 | [INSEL](#t3_config--insel) | + +### T3_CONFIG . PRESC +ADV_TIMER3 prescaler value configuration bitfield. + +### T3_CONFIG . UPDOWNSEL +ADV_TIMER3 center-aligned mode configuration bitfield: +- 1'b0: The counter counts up and down alternatively. +- 1'b1: The counter counts up and resets to 0 when reach threshold. + +### T3_CONFIG . CLKSEL +ADV_TIMER3 clock source configuration bitfield: +- 1'b0: FLL +- 1'b1: reference clock at 32kHz + +### T3_CONFIG . MODE +ADV_TIMER3 trigger mode configuration bitfield: +- 3'h0: trigger event at each clock cycle. +- 3'h1: trigger event if input source is 0 +- 3'h2: trigger event if input source is 1 +- 3'h3: trigger event on input source rising edge +- 3'h4: trigger event on input source falling edge +- 3'h5: trigger event on input source falling or rising edge +- 3'h6: trigger event on input source rising edge when armed +- 3'h7: trigger event on input source falling edge when armed + +### T3_CONFIG . INSEL +ADV_TIMER3 input source configuration bitfield: +- 0-31: GPIO[0] to GPIO[31] +- 32-35: Channel 0 to 3 of ADV_TIMER0 +- 36-39: Channel 0 to 3 of ADV_TIMER1 +- 40-43: Channel 0 to 3 of ADV_TIMER2 +- 44-47: Channel 0 to 3 of ADV_TIMER3 + +## T3_THRESHOLD +ADV_TIMER3 threshold configuration register. +- Offset: `0x68` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH_LO", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "TH_HI", "bits": 16, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:--------------------------------------------------------------------------------------| +| 31:16 | rw | 0x0 | TH_HI | ADV_TIMER3 threshold high part configuration bitfield. It defines end counter value. | +| 15:0 | rw | 0x0 | TH_LO | ADV_TIMER3 threshold low part configuration bitfield. It defines start counter value. | + +## T3_TH_CHANNEL0 +ADV_TIMER3 channel 0 threshold configuration register. +- Offset: `0x6c` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t3_th_channel0--mode) | +| 15:0 | rw | 0x0 | [TH](#t3_th_channel0--th) | + +### T3_TH_CHANNEL0 . MODE +ADV_TIMER3 channel 0 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T3_TH_CHANNEL0 . TH +ADV_TIMER3 channel 0 threshold configuration bitfield. + +## T3_TH_CHANNEL1 +ADV_TIMER3 channel 1 threshold configuration register. +- Offset: `0x70` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t3_th_channel1--mode) | +| 15:0 | rw | 0x0 | [TH](#t3_th_channel1--th) | + +### T3_TH_CHANNEL1 . MODE +ADV_TIMER3 channel 1 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T3_TH_CHANNEL1 . TH +ADV_TIMER3 channel 1 threshold configuration bitfield. + +## T3_TH_CHANNEL2 +ADV_TIMER3 channel 2 threshold configuration register. +- Offset: `0x74` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t3_th_channel2--mode) | +| 15:0 | rw | 0x0 | [TH](#t3_th_channel2--th) | + +### T3_TH_CHANNEL2 . MODE +ADV_TIMER3 channel 2 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T3_TH_CHANNEL2 . TH +ADV_TIMER3 channel 2 threshold configuration bitfield. + +## T3_TH_CHANNEL3 +ADV_TIMER3 channel 3 threshold configuration register. +- Offset: `0x78` +- Reset default: `0x0` +- Reset mask: `0x7ffff` + +### Fields + +```wavejson +{"reg": [{"name": "TH", "bits": 16, "attr": ["rw"], "rotate": 0}, {"name": "MODE", "bits": 3, "attr": ["rw"], "rotate": 0}, {"bits": 13}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:------------------------------| +| 31:19 | | | Reserved | +| 18:16 | rw | 0x0 | [MODE](#t3_th_channel3--mode) | +| 15:0 | rw | 0x0 | [TH](#t3_th_channel3--th) | + +### T3_TH_CHANNEL3 . MODE +ADV_TIMER3 channel 3 threshold match action on channel output signal configuration bitfield: +- 3'h0: set. +- 3'h1: toggle then next threshold match action is clear. +- 3'h2: set then next threshold match action is clear. +- 3'h3: toggle. +- 3'h4: clear. +- 3'h5: toggle then next threshold match action is set. +- 3'h6: clear then next threshold match action is set. + +### T3_TH_CHANNEL3 . TH +ADV_TIMER3 channel 3 threshold configuration bitfield. + +## T3_COUNTER +ADV_TIMER3 counter register. +- Offset: `0x7c` +- Reset default: `0x0` +- Reset mask: `0xffff` + +### Fields + +```wavejson +{"reg": [{"name": "COUNTER", "bits": 16, "attr": ["ro"], "rotate": 0}, {"bits": 16}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:--------|:--------------------------| +| 31:16 | | | | Reserved | +| 15:0 | ro | 0x0 | COUNTER | ADV_TIMER3 counter value. | + +## EVENT_CFG +ADV_TIMERS events configuration register. +- Offset: `0x80` +- Reset default: `0x0` +- Reset mask: `0xfffff` + +### Fields + +```wavejson +{"reg": [{"name": "SEL0", "bits": 4, "attr": ["rw"], "rotate": 0}, {"name": "SEL1", "bits": 4, "attr": ["rw"], "rotate": 0}, {"name": "SEL2", "bits": 4, "attr": ["rw"], "rotate": 0}, {"name": "SEL3", "bits": 4, "attr": ["rw"], "rotate": 0}, {"name": "ENA", "bits": 4, "attr": ["rw"], "rotate": 0}, {"bits": 12}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | +|:------:|:------:|:-------:|:-------------------------| +| 31:20 | | | Reserved | +| 19:16 | rw | 0x0 | [ENA](#event_cfg--ena) | +| 15:12 | rw | 0x0 | [SEL3](#event_cfg--sel3) | +| 11:8 | rw | 0x0 | [SEL2](#event_cfg--sel2) | +| 7:4 | rw | 0x0 | [SEL1](#event_cfg--sel1) | +| 3:0 | rw | 0x0 | [SEL0](#event_cfg--sel0) | + +### EVENT_CFG . ENA +ADV_TIMER output event enable configuration bitfield. ENA[i]=1 enables output event i generation. + +### EVENT_CFG . SEL3 +ADV_TIMER output event 3 source configuration bitfiled: +- 4'h0: ADV_TIMER0 channel 0. +- 4'h1: ADV_TIMER0 channel 1. +- 4'h2: ADV_TIMER0 channel 2. +- 4'h3: ADV_TIMER0 channel 3. +- 4'h4: ADV_TIMER1 channel 0. +- 4'h5: ADV_TIMER1 channel 1. +- 4'h6: ADV_TIMER1 channel 2. +- 4'h7: ADV_TIMER1 channel 3. +- 4'h8: ADV_TIMER2 channel 0. +- 4'h9: ADV_TIMER2 channel 1. +- 4'hA: ADV_TIMER2 channel 2. +- 4'hB: ADV_TIMER2 channel 3. +- 4'hC: ADV_TIMER3 channel 0. +- 4'hD: ADV_TIMER3 channel 1. +- 4'hE: ADV_TIMER3 channel 2. +- 4'hF: ADV_TIMER3 channel 3. + +### EVENT_CFG . SEL2 +ADV_TIMER output event 2 source configuration bitfiled: +- 4'h0: ADV_TIMER0 channel 0. +- 4'h1: ADV_TIMER0 channel 1. +- 4'h2: ADV_TIMER0 channel 2. +- 4'h3: ADV_TIMER0 channel 3. +- 4'h4: ADV_TIMER1 channel 0. +- 4'h5: ADV_TIMER1 channel 1. +- 4'h6: ADV_TIMER1 channel 2. +- 4'h7: ADV_TIMER1 channel 3. +- 4'h8: ADV_TIMER2 channel 0. +- 4'h9: ADV_TIMER2 channel 1. +- 4'hA: ADV_TIMER2 channel 2. +- 4'hB: ADV_TIMER2 channel 3. +- 4'hC: ADV_TIMER3 channel 0. +- 4'hD: ADV_TIMER3 channel 1. +- 4'hE: ADV_TIMER3 channel 2. +- 4'hF: ADV_TIMER3 channel 3. + +### EVENT_CFG . SEL1 +ADV_TIMER output event 1 source configuration bitfiled: +- 4'h0: ADV_TIMER0 channel 0. +- 4'h1: ADV_TIMER0 channel 1. +- 4'h2: ADV_TIMER0 channel 2. +- 4'h3: ADV_TIMER0 channel 3. +- 4'h4: ADV_TIMER1 channel 0. +- 4'h5: ADV_TIMER1 channel 1. +- 4'h6: ADV_TIMER1 channel 2. +- 4'h7: ADV_TIMER1 channel 3. +- 4'h8: ADV_TIMER2 channel 0. +- 4'h9: ADV_TIMER2 channel 1. +- 4'hA: ADV_TIMER2 channel 2. +- 4'hB: ADV_TIMER2 channel 3. +- 4'hC: ADV_TIMER3 channel 0. +- 4'hD: ADV_TIMER3 channel 1. +- 4'hE: ADV_TIMER3 channel 2. +- 4'hF: ADV_TIMER3 channel 3. + +### EVENT_CFG . SEL0 +ADV_TIMER output event 0 source configuration bitfiled: +- 4'h0: ADV_TIMER0 channel 0. +- 4'h1: ADV_TIMER0 channel 1. +- 4'h2: ADV_TIMER0 channel 2. +- 4'h3: ADV_TIMER0 channel 3. +- 4'h4: ADV_TIMER1 channel 0. +- 4'h5: ADV_TIMER1 channel 1. +- 4'h6: ADV_TIMER1 channel 2. +- 4'h7: ADV_TIMER1 channel 3. +- 4'h8: ADV_TIMER2 channel 0. +- 4'h9: ADV_TIMER2 channel 1. +- 4'hA: ADV_TIMER2 channel 2. +- 4'hB: ADV_TIMER2 channel 3. +- 4'hC: ADV_TIMER3 channel 0. +- 4'hD: ADV_TIMER3 channel 1. +- 4'hE: ADV_TIMER3 channel 2. +- 4'hF: ADV_TIMER3 channel 3. + +## CG +ADV_TIMERS channels clock gating configuration register. +- Offset: `0x84` +- Reset default: `0x0` +- Reset mask: `0xf` + +### Fields + +```wavejson +{"reg": [{"name": "ENA", "bits": 4, "attr": ["rw"], "rotate": 0}, {"bits": 28}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------|:-----------------------------------------------------------------------------------------------------------------| +| 31:4 | | | | Reserved | +| 3:0 | rw | 0x0 | ENA | ADV_TIMER clock gating configuration bitfield. - ENA[i]=0: clock gate ADV_TIMERi. - ENA[i]=1: enable ADV_TIMERi. | + diff --git a/docs/um/ip/l2_ecc_config/data/ecc_sram_wrapper.hjson b/docs/um/ip/l2_ecc_config/data/ecc_sram_wrapper.hjson new file mode 100644 index 00000000..412bda5d --- /dev/null +++ b/docs/um/ip/l2_ecc_config/data/ecc_sram_wrapper.hjson @@ -0,0 +1,86 @@ +{ + name: "ECC_manager", + clock_primary: "clk_i", + reset_primary: "rst_ni", + bus_interfaces: [ + { protocol: "reg_iface", + direction: "device" + } + ], + + regwidth: "32", + + registers: [ + { name: "mismatch_count", + desc: "Correctable mismatches caught by ecc on access", + swaccess: "rw0c", + hwaccess: "hrw", + resval: "0", + fields: [ + { bits: "31:0", + name: "correctable_mismatches", + desc: "Correctable mismatches caught by ecc on access" + } + ] + }, + { name: "scrub_interval", + desc: "Interval between scrubs", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0" + name: "scrub_interval" + desc: "Interval between scrubs" + } + ] + }, + { name: "scrub_fix_count", + desc: "Correctable mismatches caught by ecc on scrub", + swaccess: "rw0c", + hwaccess: "hrw", + resval: "0", + fields: [ + { bits: "31:0", + name: "correctable_mismatches", + desc: "Correctable mismatches caught by ecc on scrub" + } + ] + }, + { name: "scrub_uncorrectable_count", + desc: "Uncorrectable mismatches caught by ecc on scrub", + swaccess: "rw0c", + hwaccess: "hrw", + resval: "0", + fields: [ + { bits: "31:0", + name: "uncorrectable_mismatches", + desc: "Uncorrectable mismatches caught by ecc on scrub" + } + ] + }, + { name: "write_mask_data_n", + desc: "Testing: Inverted write mask for data bits", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + fields: [ + { bits: "31:0", + name: "write_mask_data_n", + desc: "Testing: Inverted write mask for data bits" + } + ] + }, + { name: "write_mask_ecc_n", + desc: "Testing: Inverted write mask for ECC bits", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + fields: [ + { bits: "6:0", + name: "write_mask_ecc_n", + desc: "Testing: Inverted write mask for ECC bits" + } + ] + } + ], +} \ No newline at end of file diff --git a/docs/um/ip/l2_ecc_config/data/ecc_sram_wrapper_doc.hjson b/docs/um/ip/l2_ecc_config/data/ecc_sram_wrapper_doc.hjson new file mode 100644 index 00000000..7a2db8a3 --- /dev/null +++ b/docs/um/ip/l2_ecc_config/data/ecc_sram_wrapper_doc.hjson @@ -0,0 +1,94 @@ +// Copyright 2020 ETH Zurich and University of Bologna. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 +// +// Author: Michael Rogenmoser + +{ + name: "ECC_manager", + cip_id: "36", + version: "0.0.0", // null, commit 5616a36 + clocking: [ + {clock: "clk_i", reset: "rst_ni", idle: "idle_o", primary: true} + ], + bus_interfaces: [ + { protocol: "tlul", + direction: "device" + } + ], + + regwidth: "32", + registers: [ + { name: "mismatch_count", + desc: "Correctable mismatches caught by ecc on access", + swaccess: "rw0c", + hwaccess: "hrw", + resval: "0", + fields: [ + { bits: "31:0", + name: "correctable_mismatches", + desc: "Correctable mismatches caught by ecc on access" + } + ] + }, + { name: "scrub_interval", + desc: "Interval between scrubs", + swaccess: "rw", + hwaccess: "hro", + fields: [ + { bits: "31:0" + name: "scrub_interval" + desc: "Interval between scrubs" + } + ] + }, + { name: "scrub_fix_count", + desc: "Correctable mismatches caught by ecc on scrub", + swaccess: "rw0c", + hwaccess: "hrw", + resval: "0", + fields: [ + { bits: "31:0", + name: "correctable_mismatches", + desc: "Correctable mismatches caught by ecc on scrub" + } + ] + }, + { name: "scrub_uncorrectable_count", + desc: "Uncorrectable mismatches caught by ecc on scrub", + swaccess: "rw0c", + hwaccess: "hrw", + resval: "0", + fields: [ + { bits: "31:0", + name: "uncorrectable_mismatches", + desc: "Uncorrectable mismatches caught by ecc on scrub" + } + ] + }, + { name: "write_mask_data_n", + desc: "Testing: Inverted write mask for data bits", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + fields: [ + { bits: "31:0", + name: "write_mask_data_n", + desc: "Testing: Inverted write mask for data bits" + } + ] + }, + { name: "write_mask_ecc_n", + desc: "Testing: Inverted write mask for ECC bits", + swaccess: "rw", + hwaccess: "hro", + resval: "0", + fields: [ + { bits: "6:0", + name: "write_mask_ecc_n", + desc: "Testing: Inverted write mask for ECC bits" + } + ] + } + ], +} \ No newline at end of file diff --git a/docs/um/ip/l2_ecc_config/doc/registers.md b/docs/um/ip/l2_ecc_config/doc/registers.md new file mode 100644 index 00000000..6a6d27df --- /dev/null +++ b/docs/um/ip/l2_ecc_config/doc/registers.md @@ -0,0 +1,108 @@ +## Summary + +| Name | Offset | Length | Description | +|:----------------------------------------------------------------------|:---------|---------:|:------------------------------------------------| +| ECC_manager.[`mismatch_count`](#mismatch_count) | 0x0 | 4 | Correctable mismatches caught by ecc on access | +| ECC_manager.[`scrub_interval`](#scrub_interval) | 0x4 | 4 | Interval between scrubs | +| ECC_manager.[`scrub_fix_count`](#scrub_fix_count) | 0x8 | 4 | Correctable mismatches caught by ecc on scrub | +| ECC_manager.[`scrub_uncorrectable_count`](#scrub_uncorrectable_count) | 0xc | 4 | Uncorrectable mismatches caught by ecc on scrub | +| ECC_manager.[`write_mask_data_n`](#write_mask_data_n) | 0x10 | 4 | Testing: Inverted write mask for data bits | +| ECC_manager.[`write_mask_ecc_n`](#write_mask_ecc_n) | 0x14 | 4 | Testing: Inverted write mask for ECC bits | + +## mismatch_count +Correctable mismatches caught by ecc on access +- Offset: `0x0` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "correctable_mismatches", "bits": 32, "attr": ["rw0c"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------|:-----------------------------------------------| +| 31:0 | rw0c | 0x0 | correctable_mismatches | Correctable mismatches caught by ecc on access | + +## scrub_interval +Interval between scrubs +- Offset: `0x4` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "scrub_interval", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:---------------|:------------------------| +| 31:0 | rw | 0x0 | scrub_interval | Interval between scrubs | + +## scrub_fix_count +Correctable mismatches caught by ecc on scrub +- Offset: `0x8` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "correctable_mismatches", "bits": 32, "attr": ["rw0c"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------------|:----------------------------------------------| +| 31:0 | rw0c | 0x0 | correctable_mismatches | Correctable mismatches caught by ecc on scrub | + +## scrub_uncorrectable_count +Uncorrectable mismatches caught by ecc on scrub +- Offset: `0xc` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "uncorrectable_mismatches", "bits": 32, "attr": ["rw0c"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-------------------------|:------------------------------------------------| +| 31:0 | rw0c | 0x0 | uncorrectable_mismatches | Uncorrectable mismatches caught by ecc on scrub | + +## write_mask_data_n +Testing: Inverted write mask for data bits +- Offset: `0x10` +- Reset default: `0x0` +- Reset mask: `0xffffffff` + +### Fields + +```wavejson +{"reg": [{"name": "write_mask_data_n", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:------------------|:-------------------------------------------| +| 31:0 | rw | 0x0 | write_mask_data_n | Testing: Inverted write mask for data bits | + +## write_mask_ecc_n +Testing: Inverted write mask for ECC bits +- Offset: `0x14` +- Reset default: `0x0` +- Reset mask: `0x7f` + +### Fields + +```wavejson +{"reg": [{"name": "write_mask_ecc_n", "bits": 7, "attr": ["rw"], "rotate": -90}, {"bits": 25}], "config": {"lanes": 1, "fontsize": 10, "vspace": 180}} +``` + +| Bits | Type | Reset | Name | Description | +|:------:|:------:|:-------:|:-----------------|:------------------------------------------| +| 31:7 | | | | Reserved | +| 6:0 | rw | 0x0 | write_mask_ecc_n | Testing: Inverted write mask for ECC bits | + From fa81cb61f81e93eb9fdbf7fa5113354712735e64 Mon Sep 17 00:00:00 2001 From: Arya Saraei Date: Thu, 5 Jun 2025 10:59:26 +0200 Subject: [PATCH 5/5] new update of carfield documentation --- docs/um/carfield_full_doc-online.pdf | Bin 0 -> 2493965 bytes docs/um/carfield_full_doc.md | 28699 ++++++++++++++++ docs/um/carfield_full_doc.pdf | Bin 0 -> 1215028 bytes .../pulp_cluster_peripherals_memory_map.md | 40 + 4 files changed, 28739 insertions(+) create mode 100644 docs/um/carfield_full_doc-online.pdf create mode 100644 docs/um/carfield_full_doc.md create mode 100644 docs/um/carfield_full_doc.pdf create mode 100644 docs/um/ip/integer_cluster/doc/pulp_cluster_peripherals_memory_map.md diff --git a/docs/um/carfield_full_doc-online.pdf b/docs/um/carfield_full_doc-online.pdf new file mode 100644 index 0000000000000000000000000000000000000000..2746140a694c1e9fa38a14597d3c1db24bc1b80a GIT binary patch literal 2493965 zcmb@tRcs|p%r+L-BpYVt4Kp({(}tOulM`lUW@hFM^9eIEXLEuZW={HkZ7=?+YA>ov zqw&aNKbGz1W@HV8vbZDz3nM!m#Q|t;366t=nZ(h=29BQ}j>*)RgawXCRDpy^(b2`; z*bYum5YF7e?0>E~{}(eck^eFKKaAzYNSNW6SS#CpQpIFyS1sgl#8*~f5EH)uFB>vVvhDsjt=Gy01|FECP`~MfVm3^lcb$7 zz+Bwi)Y0reRC#j;%l}~6xc?_bSAdJTu|1q;?)x_}bO#O&&eylp@t4%!|5+8#!Yt?` zf*9?}gWzB_&p@mHDailn@PC$u>;Ly;eoKk|R|o}TS6h<*snqZPFNv}LUo!KX>r@&v zA{cf4qKU+#g4w}EK$6(ffq#s|DbzvH zIY-XMsfAVQ8`^sQq<8CvQ6NW?AxBejWX#C1@n5qxM$DE#`C%{+Iii07=$cgLRC523 zX0S!V6Aw8*WD+r?;%S_MY>2XkA21q;#bj&*wq@u3k=0Av*3ma$nQnFV20d-l8g%%@ z7|)f$tzPB6O9LHD3~teM@mJ|W;!9PzSa>fj`#E7Jk_#(y!)_u;9^oAa1x8_SG<{n3U%zS6qA+nH9g14-!()*&}q~>QZ5#i0bKSuF^lH zJV>zem49>5rQ3XrM!qiB!zNCg3N1m_?3-!xivcCfGxXwE zWjC}PdYUx>V2cTJJ^y#ku(19wr1?L{$U?%-!p-v^x&Pk?%gV{d{D1B2MGq_hW2H-| z>$$$ErsAKMJn|X9(&Q&O=^2UwO$h6cV0qX@G&AU+P#NL*LV4)a$lz$m!pg#5K|c`2 zd49R%qKK$q5C}sNl;n~ffSvj8)nAc#&-R}8@9H@AdhB)SR~cU7b=j`9_y2vq?4|oj z7HS5DRTLD$=b`^Opn@!_1tS%Kc&=@r-Q;~Y*C>QVx&&!j9$ybjw}Fq!`VDu&6_>?E z*VuO4%kxv4NFs6$-;mAtUtN~&zW3VJPv(Mpt~>Tc6<9_hJ*5!`Q9_zE`XG+9d zd8N-IkHayDY5Go9DCNXsVEp8tBaA~Hd>vfzj0kr6l_aeXB!ON+9%Iflip|}A-t;@w zWC;={r#v7bQz%B1k%n0Q#ZZWJ2KFe8Y^A&qi4e%j3Xu)QM9Rhru9Jv6A59;~35*$! zuMI>pg9Jc)#p{iOn{&B{Y=mqF8elFZ!pukXMC~OSj)2KRBK#6E;)MeX2MdtErT&Q{ zc@~HYG*qU91Ggwb0NP=IPphzCn^Q6tB2mLPmPF?%BNVCLb!u};JQiVf!(WE z0wGc}xD(*iFT%V2>#Z-)L@n_JRzjU#BrI@8onB%GtU**FP_x7Y$cmxx0k2c^;|6b; z@J2@sZXNQbppvQ!t`WNnuaS#ZE>~=g6zawsfM`SvU@$Vod@mvj{8Ui_x-9eElHnB| z2m=U>pt^{hQ2wR7fbSF@7%gKv{rs0B(2EkSpm?sTE-X!6@1cb}inFZdlws zPXHXDWfW=Tw-&;y!V5$(IM6W=%hbPrtB60pGPh2j5>%L3;X1Ww(7J`03_HS@oK z&_LBwK>*dh4FG%p)5`gP+*^2r!wPm^rv>3gq=jHs@P{XwKng0UTTYhkE1+$M|Npmacjm`nt7v>H@B;F0SC&>gsB+3wYUAPk%q0S%t z1lAYx1ko4qmChX<|DW8I3V`_l>qYQHxRmRO5mdV+Yazbj_Qt&V!3*}%6kSjl0OlWU z0QrH?o6jArSnUbdo5dX~DCG$5AA|(qUv*&pz`2hL_<2L`4Rb>WAiqU=(;0D`?+)B6 zenyL!_c*2Af2M6Keg+Q^9z%01Azp|GJW>0gdi!}}c*?!6boyi83o}5nfE=k9{!|rc zIByx)578IqFGd9(AXNdzR6GaHRJ9)7C*KowaLR53kq7=^Sn&1Tqx609?Nso!^WCKM zecXR@w)c^v^!@hV!SFLjN$5Rbe@V&k>5T2`aH;=;$@eXzTIu_4&-V@cKY0LG@D=uN zsbAUe4O{c&VeWgTqTsjR8_h~Z!5i`EQo?ut;nLpse^L4cKLc`=z6)lTzE9pBzN0I? z8U*PwK|1ETL_7k<$5IRW80!5>p-iiTY4zIA+cwcE~pJ@t+JPbTO2^qDQFx(%Q zz65vN_iDAI0@E}LChnE&HF+>>koJAeFh`*Gpfbte%=NxWt=+xv|8(+6gxBDDMsR6D zjYRoLPaLEfXz%;`z}7q8VWQp1Sw)aN;5&{D( z_PTL)4CL4YgNGR-2G)zSd49!_#KaXUAl*c_hY)Qwp?@qATEV(v^tJvt(BtK|hkB{> zarz#%yNRdT=q7=9fZ0EF$_lBUlX~Z%Y{^5&p%u1x_j* ztYqh*K!%49Z_e;T6FCr~n>w37i1R=fZ`LWpVD-F__9Pq*HYA7{8dDhn9|8@%SQj$6 z!8E-@{-FCPw*^(0`-&i|-@ z!f*wC{RqzqGU5NZ7fE#h<%!#eEEJ3Um+ZyX1rb-YJdrpnN}l1K>q$oox|waGyQ6Fy z?(5vs{6qL-=Y=V%KB^3b7+V;j19|h%+4IlNK41Kh3tCI&kd9p-MPP_0bsu8-)~&z` zY!9yEz>HG{*$ey!;urQ8t|7URY$z2G8u?jc=s1E4omU{gEYgrmsIQX0DS@DwKMG`$nL+?Kf6_?H2(M$;q zao3StV&Y9A_+27!{zh0Kz+*`<_B{BcLz?;f5-pfNt{?(mjw|G3+%PJT4nH<|Cr-nV zQk7c(_%#%bUt~Zi?|GDFoh#LE>3RxC590pS}J9#A6|A;cm z(wylvty7-lmGheV8r%ug3#J&5tu0WnB(r1mA>@nBn-QG#AMqcFJ4AA^^o%N)WIED) z34q%PtqFrOPDDZ1fb9-_9s@hqDGsZReY$8JX7k-O8z_KN6%eB+0UGoOUD zqTPtiND1r6GIMf$y(;A+3Y=|1O??0x{G+q4I zhko@09}cbLV15n8g!kvxA0^u~re6--I!b#TKNC87D4BRgl-5y@nQCdbn2=I zVvq-uY{kR5eFy4d0ht`ax!d9FN97LM!42<&j(o%4U3({t>phCes;I^$jQ%{$UBWLS znNo=Z9fRy2BsE=`ioBo1_RGzq(ooLrflEt87F>{H0*FelklTN~Er=%*kV&@Cd$aI7 zcT<3J1u`#9Kjd$)jJkamR3RcH;X5Ze)~L-j4b?Y$$#wM9v=aAP~3Hc6>%`D9& z2XTuYjDXj2_uku#6+;fqI@6RJR`cgA$&whJ@#a4z3BAL-HDU0`R^sf)0iTbAXZ}{~ z1UP;pLH|a<2>yMZ*y2I1{4);{GOPlofxcbJl6!u4`ckArmQ}WxMhG`37v3t*DHlQ| z;HbeK`FMv{L&VkDbm}p1RhkQ=hKRg~7G}7b%n6g#BR$w$2w0lfluUPacU1a+(bw!u!bv5azvz$IklKpk$0w1EKn2 zWeFWY!|h@|(kB*nXFF1KjT6sxMNS#{ku%OWK~khw!3fO{ujN-`?@-@c8Ut%rC$AMVHw6OF-si7f=sZ+7NjC>g zqoF?F2=tKY@Nn~U?0A$#G3g%w@4(mot-cYN0c3!DkU3SQC~(xP#1{B1z%yS7tB;?p zCDe(RJ*vMK>5z%N{nwqYJ1Df<2kKvhT6l1rdA{<>Y5wk|hFZW-4`l|L)90)F7}A!x z>hH!a#8EYoivB;$S9d(Er3Q*}pAH@L+VZv-{~+NOaB$EAv(>`)v!ZEY=_DUbqyMtL zs2RU#fV8ZVWa6@kRvuko1r+=D#>0-33%@LX;Gx)je$7cqR>a>JzgmjNs3|el;N?0p zaUCCX9v>=WqIwJGh!QqvJj3(3XD*3~7UA)L;iC{&gKfmu)1Dz5AVXV2Hdv|5&onM+ zaaFQ*5({(rxRaE*I;fLXm0Lcw7BnH2S^nFc)BEyv`^ny^T^7Q=lN4>?+OPS7Y z@*d#ot#{|!KTzZ!BB=)Ly`ouRw&gfp@RWQK!&D%bhQ}a4i;FCi78#*37yLWE$CqWN zYMJAY@e4@3jA-juWMSGrRD#nTYE8p}VOkoT5226Wat8#T>0PfN+bSE*^usT&{`Z2X zZ#4mZ0Z7bnl6A-N$T#mZr4!+mWUh;p&A`zT(zF5L1W9%bdNzarhA6)gK;0cXEy*9E z2Z;Ip!=mM@0>+2ZN%fne&5b58M<>AJW3O1y?&Hd1i7uKOR|JGhr9an(($m`7L$!lu zZu)ROX8!0dU5&5?y0eTF$2Uq4f7YpTQ+5nMj^RG=RWP0yhLR(smXw%TL#y5ri*1hi z+h}tg^I}YoP<&o9H0l@CZe^2=yS1X6K5MD+c4;N{-@g6L|?+F$CK7bVi5k2Frr8R$J=(to4)0v3t2U~#c1 z9BQ;;>9G57l{WTsmPNpKqz^a9dXskxPss_JXvK2JuYDDwN`#Y2qsUQ|lq-s{8#zTQ zIMUDihU2!S8c8_P0vYu$*%Wn#^k|Vg8Mrj6qr+CK>M+1^rWdI7yAS_v>%rF%r8Jm` zt%(r|UAj;wSP#a#o*e9vC#^1}zeLv^#Q#FR12Iniscku6FE-||HtV>Rn2On5V`%UR zPyn$sks?lMC53|&e!ir{vg?REN%M-h|BDO0V9xYP88R}iMGDDVCxFIo;(2s1xtBH= z{g-|9{h#K_!z2yLgU^b91EB-82)USeGd^&K7|FaN<;XK zb&Pe^B--Ef?T;> z=CN*Yn24O9*qX0yBR*~dp?1pMgEcXD>m*1W8uU9j zkt94lLZ}P@|BA8mxYtZzeV)6N>>QH;bPO$6R(_pf#1Rz5G&q0Nc!dC?wY9hHrDvcv z)aW#?ZtObb@tIb20KRVY=?P6D18za_sMKz=fywzepW_3YAM4~I6Td`hs2HXax}m{& z&D`%wdQbwv&p*~@!N+x)iM64?Qghz+p9X&sG-Cj!uHmNhk;|lBjzSkh)CG-XmWHXUAPfR|TaU2+EQjI~dcpYWT=n5t{ zQv!TD5H^2Wb*n7-2kJp-93>*ai)w{_M(CU18{FSq#22M1d^LSRJv!BTSeg^Qn7)1g zgR*6pWKe?z_8gImRMG+hVTj+++pg?w$R67YJ%}|U?f1?wstGOiKaJEm_{Md!SfzTe z3g6*fiF?)txF8Hr$kTyg)87bmd+Y?Yl?J~vN9O?kn~eAKKho*)?8&i7+G4gOb(YL^ zL8x_>4y#NpB zvfb`=_k)O+{)1oJe$a=P6c>#1k0v7t<<{elzu4l?J!jaX()>X;Ev&4GCxx4z}ZJ%tsSiUd< ze#%$@6=8!HUH6@7QzP+E8$;!i#BtU|e4CV6QQ}0GNV|8z7`jE|N`7oVe^_^_KN8ke zla9;CohD}>E7%-`O*`yFyAxL9>~d_z@c=5_B}%tB-XuG&IXc4RDOE|4+?Dk>O2bKy zItUzaMTcirfKZHW$3$;t6{dIE%bh)~azxco##qqyYl(K-e_W}4aE)J~8bG&NDr-5T z>1-^TVYZXHL+0)Qt6O_eR9hLes{|sf^afj)(!`7WaM?Y%OwbB08zp7r4%jG+;snQy z25T+bSVFTxn7J+IbvqPI`Xmo+t)3a2T-&S#KUh6yHF!2wm*qy)rpB7K_3&GJ7!Yq| zv7bM$HSi3>MSWSE--Qbn=VvVh_mg{tgFO-hpRN-FH;g%kY~*u)J6OD$n{~Q(-YP&= zptdM3PA%@OuB{BQ4YMwCF1m$SMl(zBjk?6xN7rn!C2UX5EzEK;f{4*pCmnf}5=}o? zF2^L>x5ivF3Jk6@t5kxEg8308@o<0HgzT}WNJ5W*NkK{nRdc);7$(6Xg0*(4X{qUP zYs8pTX8JSNVr|IlN9`cUBJ7g0nIu&)u}mZ>cL9;}TmVD4gw6GNz5vks{nb{l`9Ls( zu7lw`mt?#Nmf_<^Wx3~pI6qN<+qoFi!Po)vmnV|aa7sXCOKRJQ49dJjVqB;NEqM6o z3(W>cXg>|~(Tk0VXc&0$zDrVzvB`I#_+%a2oHX4VJ@@Ak3tESuW(dx77BZjN!q zk91*AScU$A4{3{ad~10DQ9fA#GM@UrOLPwl>Sy6N<)@=~$2ljuSDe=z1qJ!6M|XaJ_iJ7g+UVQHfSdp?MlfK`2kbsZQi{O3+K>z=sO0I*D1Q=<>f(? zb~XdEdENzSVtrV5$tJ_%R5JjAu($cAVWuPr>OeES+EaPHsc~x7yloM!KM`iaX1c8c z8-?sTN53i5WypqW*R4~s1o?ohVikIj)OL#oDn4}BB{=ajKevLDekDqC;n9koRg+Q; z{p40LFbb2C7)JGX*-6MD?z^0ox^w_#BJx15LQ82X*z&g@+4-R_hB z{I_54qr;r4cN9D`gAs;KouZ==6v5&-GiD-$&=Xqu&a=1PdhODN)(O!c*v@frilO6s zms%!W$9x`IW&vRcx54R18%WgHUoN5Ic)Yy2PPa&FDm^gRAyn%XR^QCwNDQ8jPwqb4 z1%D#%n@Uw$f2Aj$h zX-|x|{GqtW3bA zbtN&9i&6+fKuzhR>zrJTlCG`S=w0&l2PJA;1D^lAzwiGklpLPj5#G^e zrHLTtRTJ^DxJ)V@*!|3WJ`gn# z^Mg&!&;H@!7!#po4#r}RMyJe}LN*U?>{1;3zGk`g>y`lvahOF2g%GjXD5ozdZkR_` zra%_tm7UR`q{W*(`Mc<+AuzmUQkcXy#AdGU4jeGkrgRa5iGrJoD2Y}(#yQHo>KGc} z)sdD|b)d~|ZIh!l@2Z|~k8f>@3Cpep8;+G^GAP8dDgRd$4es*@d04Zzt0J@cMW#^$6&FTxu&0dPd4@I*Zym7Meohl%J)W>wb$+8dVz$ z@M`FLbl*m10_qxU^n5Q?G+EZ@5CvFmapI{;hOBIMS^_O>F^0eeEdC}$)udyxQX}W7MZ;ZkZ|#olQn_e6D-cyo48bpm_5|iptlC(fTAZKoX%u?* zB6`3Ui$R)^Vsl%3I<;ZaoOxMwBr<-P<6#J zrfQ*kxG<-P9kvPL+#D3VN>X{r)lDQB=BK4g8wIRwJl1~3Yt?F64W(5FQLSyeJRSM% zDQ0zDplRoQ}Qs@s>DBPhu%tx!j$`A0ZorNc4L- z!Z_Euk8nh+&bRs{qx8DIG%CByH)maZ1v|MWF^p->hlTxgP!v~R?i7F$KTj)u*BHNQ zA5p75pCZRHpD@QfzZjo}cis05U|8T0?K|kH&b^%6hhB-b>K!h~E^h#gc>E5LJ+`=S z5}tG9ZwaOhn{7GKWIv2l5?1Z>1NQZD(53+!hrp8gLN*3E3&&yK*BaP{cNv=v7Yjy7 zuKuHdX3Ai&yp3L?1c`353`G)Ztt@j^+NxbE6OMqVu>{xlWm#1>qw(KX^}6<%?-TU7 z0uq>lYz~jHbSQYPgMqsb>(A?#O34!fPN*2-yy3g9myARXKTJpOzvkupN%}BE`Z5f$ zg*!$TavPDGYZ|pbw2*Ft!*9yyRinMIT*7865l|;dxuUD=%F}h=nZ4Cnk~?V>6pVKe ztszz2PUp)kN&HAAdSpKBA$5uY`BlAgKK)NJmplwG$+6NBza6bJ*%dcw{77MSCP?Oe z;L7;taJ4R7(Po-N^=N7|Oi@J%m{R}zZfXlXpH6Qg2b#E-H1*1sC7QHWO<=~A*iSgX z@Tkj>_sb~Y%~aYqoF0{)E7M-uG`RWPLCxug^ci(GH!NL;diw5qVqfaz8S{BUKDD3FB63} zlx2pQD1JGm)C-r(IRKrhCV&+*gyb$oEH0Rov8^{m&^s~RB_PBE(%2Tnb$iEIeX;G+;DChsr)e zX`6BqkELo3swwyIW!3iioK>+L(8L%q#y0?oo#;yEuK`ut1t>G1pt-yyk5WE~;qmrB<*3;rsONtj?!BJ z0-na$KW)g8GV& z|LuB&3_M@}E*E3i91Uvrt?^ma5 zfTLjh$@8wKV-FQ>(ArhsV?L&lfUQVLANXsw8g!d;z<6L~iGKMoJi-2xopukS=hqxdA_|hb0%cMX3XbJkX|;$KLzJB$ zx9dkJMNRlx?;lowp*|ZG=RN=4YhV5^mV9s3(y_>7Qd^DDb{C&&_k`}VvybUsH}p15 z4`T=Bjj@d9tb9M`kV3lr#rJS8{Ytk4CEt-5@NQW#2H8g(RvyG2Z_Q7f#y4$iH!Eiy zNS!f(G5)f>8TNC-HDZy9C4X5q+-d9b7Iw;rIo2aj$glHL{ceKm#XcIhCw&vnLsK%?Nw`VvB2`l5MriK_rVl)o@ zWN0W&r+0CY9Y z`)R-aWv#wMB-jlJJOu>v0RngezCU&Q2zVYZ7ODD4N~aRA4F{HX`9dNbgxnfI;VVkR z0X^4cFIxVuB#!RvNlPSLw0ZF1!#zxiri z_nUv#$R0HET?n_sR!VcPbF3_Y>G8jCe_eK>wrkF0^B8^kMWhe6gHHXF+|Ja$_8B1C zM)!`N))(LQ2!wq1vpjvLPV05M-Oe6omMjA%ZdDjOA?$)?9gyRBxnTb?grRYs8A1JHw~WMvs+|C*Bi$@`{Q4Omc; zK|;+Sp-DP_GlZKsabp?ERY zHDs46F#O6vqK!EhkWq_05Nah<_;;Q=1{oQD-B5Y#VqVBhGUGxA75#KjHsaDr^z2%H z{8*Pe85Fr#369rN025STj%39FOU2tRq_6OcB+IZt)RHk?f1sjk;tN&$F&*lDp*us5 zBbyX;rc_=ZO}ufV;_K&%UjO1LFj_;l70h*=-Dmb)H*jE{x$W`ZStGM?-*LGdo7H`* zKukEqmP6ITpQx#-DQI;IJUT}n4yeP|4^?QP;0n4dt>NWJdiotWp=$?44_cDOFC{}u z;udZBg(D`6@}iYTbRNaIQTPu?p$G4cIS&FO?^t=m6WHpV%)+lpW2zKOCt3g9>hpsg z0S#?s(8)pYvN?j|M~Ai0tKat*Xa3gG6Fcs$kK^L929nShtC~IPa0CpyR!H=$6!~f1arBS`WBN- zCruYi$LUax_cSF zZL(<-zK#~g!Ja|&%>0jBi7x53{LCiVPCG1z>6`rQrs3mcUIW1(er^u-L#7wseS=(m zdOKx+q%L|fg$Ja)LXY^_U@5kQgn~@D+PFtbeM&f+Toy8}aXcWGhml2lTedCVC;e07 zkQ@v9&zKf3mY?iGW(bsgAVg>orT(&f0_Q+q=H?$jPPxM~N7m)Ti{+#`V}~lYZ(5~u zXFY`diZq_e0ZuxiQ*s)}2pJ<1Ms!FH?cirjR3T;(HH$d>c1u_)^(a4*<33)e-!@JB z(OdLGCZ`e*ypT2yf~+O6ELsC!n&;09tz(dHZClzg`*NymRd!nXB4%xd3)bc{yl%xN zHdUlcl@=Vq2rR(}B!M}X2|6*RW)-RI=e!_y3MFBFX$alqBF7Fo)aR>R24VCQwGy$K zZG80EDs_!k$-{t0c#&1i@z-rt@o}83<*+gXHKIBO!SD@L=IRv{v2oF*v5O@{t3Edj zUV(z3ozLGzvBQgYXU-LGyLjIE%!X5DaJs`pY1cBWyI2#HpD8Y7ADDm7?dZ=2Qe<&k z2K09!M?S3S^j=UzdrZwut|QHMXd0)YzWpC%dsQVaK`ShCq}P&od|(i&DmL za6b zO;Vz;&WwYhwh_8c0qk$Ly+_Oh<_!Pq8KNGo@%%2F!mb-?tv`lwje8DUwpG}4KP>4M zeT7j562+wraa4xTic!VWVTF$g;jNs7b&Kj&SFO%lay3HdYr3onec3QWQf3)6A7@%m znD{K&E@>eY=iFuCeyZA9VWsV=I6=O_)}P`Y&)2=BqCDT#Hy`?am&}#Z8=} zR!t;4h^p3c>h-iT45her3D(K$XnCj~Rt$I{86XE3=j)SfP`7~~!Cvz#V(!!5v30iV zocGHA=sX*Jy9oeo~dxka}44D-(SWzEo0#*`O+fsia zR3qlaI-$~>iy;9JPogpOSG{Zqu7#N?WGr--#Nj3=?bb}>t!8y<(UsMdS96a3m31*U zWg$)+a4`|kL$udjhx+WD@^7xCtvRPc5XQ!p{|oBLm(}?&4n!1l#2B;d4ieBOA^QN0 zRQa!NC%+U=TrdV+c9uU(L!j>{P0=T+>YCcXp9tB=#*ohqJ-XP)&C#(Hp>RGtJ|QBk z#y==N&dyJBOtUd2rQ;JXJF>Ll^mF=}ry}y|1I=2p!Uq)vGXR?ersCO$7NDURA zhrBl&)%6!p!K(5ph5^5f_()gcmmTi+C4UF(U%omLGR)y^3OW0K&sz`iLBIROb1`c3 z?GI3aytea$9H)IAv~;*lfft?(SARUsn>4I)W)87ux*dvnZH>$h=$`n-J@1tDyZ{Jn z;dv9&CL2x`r09=NMsGhqm%LwnEFNYFrqy7{mclJ}>{-mt$Z*L+CJ;Q>utL4VecXsp zaj@|4`XuiI+XMCSlD_}tJZew8n|}Jm?k>tdUX0%J64b3EpZ-n z7=OMtOJR7Xlky{3mJYE<-}4h{1|?Xxmc+9n?ZfHC**ZZU2OV+J{*4zb$ouO{$dMn} z-9Q=q$GNTBmf2(!^&VxV#Jw}uCC?%4ds|aDBF9)ji4U)6#tIu<@sVdW7*#vkm%QJW zHe_~OErMzJ_E?Q6c;;VYGg2!@Ws!trUnTM5=-}BLQa#Rwfd5pX47$Vj8l=)!Tk4kS zc2}9RX$uZ#vOYAIzx6Af}=BT2#Pm=LSZ;S&$ zW`Phz&HF4*GxA*SBO<>Tk>`13<+K%(TrBdb9bnSWZd1)(N66Tla`tU1J^68#-%&OLl968QV$H=m z645wx8?v_wNv%sjhX|kn&>h>S*>8krw4$>iE*J?FozUR^4$n4p7{Z;PQFC3UwRhCO z((=NaCr7&yz!122rL=jwCX1~u z;<5qUCMRGO9W-m2FaG-xrK+E;u^-Hrh&ucM`+|wCvVDvInkhZP#<21R8+6^FQx%^|UIt6ld7&udNyTlY76tAoD%5 zL?IYwya$n~#`A+NPF zgx_Bkm^0Jx!X~D4kf8eR7qf2jhoGmn#J{qf+%nj0wlZxzTfbvtGEJJaRBM@7FtTIl zlQ%?{oY|nnXkpeW+BA=kC-K>NkXtIQ+YfYG$p zTVGoL)^tM{&@D|$+lo%jLBQ6R?CFwX#&8pDkIH-{KX(!Pg z4zZFANkn4^GuGG#ByIw(0`Jw@O=j8ZSG8;r;HtexzDf-OEW5Uj0~QblGX#i>%`?k(*am81kK$0 zI1H%NM_*?l4b+e+;Lj-u-%f&;IyIyc&O4e~cm)3zAuWmQZOJ-M4r)FI7~4D{JH@|< z3GSA*ZEE+oI4FLs;CY&?)?4RXT!=@`OmKmrx4f$h69H; ziIrEa;a~a?4v_<81Z|GtS~?5u{wsf6Y1x0YS#w!#x{+dVeSTxQkdD( zfBL+IKO7~dm0`HdiX4{xCq#Ww7&m5|qHD;n6`3CZvx?$18#nObZRW(<-)`n7Nb)81 zt{JHr{>$>=Tc0AEyVPCbw)2 zxX2&&8YZ8u8TwZLS6Deo!C^CpT3ZNKVDF)lt>xA!5?n5nJt*GQPWV9tL+7pUgZ|{d z@boKdGIh*{NsGA|+_8Ik*&i4yIZ-Gyg+3oiiegD6GLrFo;TL0;Y|sH`HSh z)g-YP2G*+>g0!`v9wC{i9h@wlI8@JDRv+k>Q2;|$JY3iE;cH*ztJ4SYdMRASP*+#Z zqtKJ9n+QjNj}pCp{aWc89LA_ibCkq&TZC4OGBBaF9p^Hzu{3q7>553pgWO z^*fuPwQyy--(K(2Z8t!poENOayp?zEG?9N6ko?xq`4G@+T*hKjTux5Y&vutT%fA`c)YOcCwc9);zy%H~xA@8Ye1$)~ zd5GrW>fw*!p+UNi>lQByKpX^v(FM_b^@~{!jRsBOUe>aD1IZi#9iq6wfmke;l3$jz z06ZI#Wb6&BzrXa0t6?6(;O>gwi_OF^qzH{Iy-#8@UWfQ^@6GxDc4I7Qa{|PPQzQDq zes8)TBbXOgY*myFZfqU~%0DE${%k2>sC|lCiY=7Zhl6KL5&P6c=a6XJveW1$!!SP0 z3~(Vr(i={V-x2WI+C8^0FyuZO{*k+9`$~Afh?ln%zuo(>0jCX;-aB{O_BDDNuUDl~ z@cotSzBa!*$AH^t6}VF9VHsLxP1sOf?Y3HfS`mA-Wqs8dBUev5T43RIRC_nOrn$#` zQ>|MBl_3hhNW{-e{FQmfe+(E!s82i}aW?;w6uNz1>V4g{?dAA_7BV!UY0c<*-+J#h zHIX;8j@@u{QNnUuP-0hXR&u?*Ctk~Q%60NHe%-z8J)de({R-W~+~>vT)4lItEg5{| z(r^NGqFW0!_fPR|SQvQ)^BdeeC(qc<^RmTTHPx!OtZec!)Z~RJyiymyqW?h_dujvc zI&jT=1hMj?u&p0;*Hd#$I6xDkm$_}cEg6w|&dz)B{M7j1gwTfIuBKZ}n2;!y>Gq~@N7=5p++8|h zhQ^kaQ&+RFc2=-@xqOlA{tw{3^Lr;Fl%+I*Rgr7g*eo`a*0zA(t+oPhr4YIWJWuo_ zFc3FR$En$(LBq*gyKXHq4mTWty!=Zn=RD#De7iMaE!|lQ=wBpHB8sgv0KQVOyhvlr z_PgQc3K|jyVuKgtdmj7LB&OQZi~wtY0q}u{A)K(zfcggyozbj8OJ5G~*-T){jr?W> z<#f0EAM71>nGWAsaxvulG8r6r-ZCo=E#7C+Z?-M49i?j~5N!oeS!p;XE>0}xMw(8# zq8UFL`vvt?E+VcD?82JSb1AZo>Rj%e1Qfgj@2bvYk76IC#yslTs-ZVN zzx24&yZs%iLqw^Pi>}R>NWZy1zxV_l6Pw~#tjx)*(lwY# zl^G<@r^l%6Si{XP_3Dk`_FR>-}pG1_`la_8t~mdfhTGUHA)g&r6Za>WwEX%^l-AKMme+0C|`10 zz;WrbDbh_!kFrj%6QB6E8#ux1PgB%0?%GZtUD@`8Oq1zzc}nF}bV>P~+_~Cgk3&_& zUaVJoaMNC}_gY*Sn1=L-Q2v?zZyq05d0>5m2Tz?LrlMU)$yQOQlJMvtM92>>1$U|; zQ;WUcxESisM3z zgI{{zLhIZ}*XfdZ=O>hPasC2sFIroYUQL*}CwX1FiS1xiX!vDR z_=$5St3V%tGr;ADk1~or5UrS;FmEy0`YKU9-BUds;?ntu-~z zVO3rDB1{Jik?2Ai?{GgZFZQtgWPvCL7P=)=^z@^X9QGl`5)rE~Znk=t;j2gFb2aCy zxJN|$#`N{2fyw&l3Kitf&`iQa5B1HCt6y%@`IftZX|{r)hgtKEQjKb3n%ri63vVmB zYPyO0QYU%Q8r(qzD>e(AD;o<2Ld7lxcdkdKnfc1!h4<(4E0~{6*_@W91rIS#Q*;*c zo10u~)$iiA;!Y)d)3(x1kCB}5<&1prUx;oDOGXS1tZ9ur9a9#GzZ1wH&gXj{ z!W67DDzt`NdqgYMIMvA2tzPv#DlHxH>~z-&+pBON<5e1_poS{8@$VY%8th6M_6|Qq z8xQ(#Vd%8tn?RNc3T=oWUh$j-R1~i(VI5XJ&z7}TmnQNGHf{~zISEC6=4MVz{90zr z1-Cj>Qj^8axxD^3!u_<552L*{yH0%lqLd7@o~Go8Q&3*i)h9 zWC>L?n%eHD6xpETD!)xS(U+I!o|F7w-J8Da_1LmT=!9N4>{09NaitS?`DhHAOT+e!O6wG~5DKzP&id z6~Avrs=dm1QZj7e<$rXvwx++HUv5XTu{i)Cuzh#J9{^tq7G|Od)JFXs9oLt=Y^a7f zMPfc_q||0X8vINVD4)vUs1i6S{ta0(vIOFSoZcx{iY%=Zi22-TyyCAVc2cL&3{_*P zF5%2J36gGd+4#NkE4~?HDU?>iy3pg}m=PnV!5Cn4FpN@~ppp@WAjt~i>5FkEBE_a+ zfp_W+Z(Q*NF#Kr!MRYymy2ia0`FW!K;>~5XFNCjRIUb80kCIUOC+=|WqiVJwuxSVL z!Qcf3(Qxj)UuP>lf4mBf@ftKTV(u1}OC^sb-Pq)PJaY6)O~L4o~h9EOZQZ4H4|hUvI*6 zU3P`D)sxyI^r3N;34x~*l%fvUIedZatJ~hYfrHh`!C-8l7k>tC)FS;syVMdWjb%_6 z1op+(o?YN@CIl50{6aV`6am89@#rQOx(4?>bZx%+apkV_QRM(O$W%P3#Kr143y!N* z$PW`m8V4hho{K7>L|99Oq@+0c*AW``ufxjldsm3Li97vcXL4t!4$R^<<%j-Gd_iYB z_t0z`zEz?MM_T>D^P{;57whLkF1d+$2H(+dGZvxknpMSLx|``v?S9ewcC9CN;0=|l z)RoKiD?AHAD44yRvI9pReoyV-UToccU5UiqbzB)ldw=2ZcD$!k2qac*S3eiSgD5W8 z*>frg=-p$hk#@*@p+|mBVsIlPIXGBwq~LS`baTc49a+EPr*3InenB%xhzWU1IJR3u z@n0b6KsKXn?LDbYwPyO*q>)^Hot@7I>mAUZq3jsb&3uI#CPH+xVpHVb@%FijfM?hI zu3_JCC>`V;)Rjm8?;D`V-UIA&2<&4=$3z9>r+%;DvxH(2gEf>56mo-FQQ;OrZye^P zSsa^7edHu`EaJy}2EG7>-(&r;-_L?)dFELq= z=F2my5y6IT@XIvK!+K15nv;xJG(6JQP4F;wIZ=cOu^jT8pXAs8T8L`xIAC!5XC9Ka z(>P2G7AiB}9%hm3$`K_CBd)U&=Q!9oaI>GYDietw**w40roGeFa;yZ7KK?Q)fj1yq zjug;Y``z;GK=!j_5=8j+@33%ow^~J}QV6k9xB%dHF6)yNDf=3fr8)`|U#*`%gi9;AeAna{b_Q$YV9;>CBM~|4*10DkguMUrWyCO?d0KPz`!e+ z!#|fa0@5M8wO{w}l3t*CeCm_?G@@k#irb(l4qW0o^QdOy2;#4&XP;{crj3g30b(+BMN}S_L6=|^+fPA+^Trh~jDjh{xL61EaS(gHv5de}d zKSE3ai=C`<Q;#o%aO>{{M^9!tJD-9U}!U8n*Np4SEPafs{xXvW_B)o|O zRBe)1DnsZ~o!yEjrIYgO;@+iIrQW4r;eNdR`=hN*LQNv)6L-nt!=??J#RJAwBOvME zvJ39qq$k5$qa4Hrno30$Wpdw&HJ1|PuOMjmZFqR7FGF=tCSG3c|#_n)@sw&S(=PS9$@$`_JAeuP*M(RW~ zEdc|rR?E+k#vjyA1c2>#Ib8}jWb3&b zl=QM14j~=e*>kTy;Yhfv$PtvVte-reeLk2USHD%gRiA&I2ReJN>#6$Ezt<)jNq!uz z;}n-EDjwNBu({nu-@$HG!)g&oyX{iQ3p46vSNwyig=Y?RO@-~<=+=y-~lwy@~PkDlR3bl8H z>~f`dzyc1OeA)pfc`G4{Z->vcSS3dCP20}6OTegR&d0;hMNHP}W&Iid(!-M7=_>mz z-;awy+D&Xt=@#?UZK?5d{MOfS&v&Lo_q%!ZT;HQPT>6>ietZTU4^#_r;pT%yoOmropD={Vmp*1GkZBH&{kI7p-*=Sg#{*y!{@YKLI!vKrg0 z*&8Ddm$56^zS6_n=BONlyS`iX-P{A)#sM85`I}NF?+?mOuFmML)Xj9a-Uqcu$Ebc! za6VgS@kd-;&$zFGVHte^HK8ZloaRAm>Tv9j+sRV*#!F3*aYX=WsHi zW=B;E)ua7{iSW*T@ZQ3m*J9-4_o?Hd;L-uxB0_q6nODGX*qKEVj~08_RJn)%S`^t< z>&a0Czb|4Y{hK=%H+pBA2fh;*3NNVdQ19G6+WlRt@-IWf7aq-_k5Q{%$sxmyUW1H#&_4&>wRL zKv;}tmp8HvSwI#|A%BjcgiRA9NS^uv7A7@V_T3(RC?N+ONI5pKV@hjktN*<8tbrTg zIj-B3%iEJB>I^UeAYOl#fz3*=;zM!Ud~N`5U(bBb}jr0w?dCvT;^ zdF_gG+A-(?D85;*iKnY zNLU!|yD3j8B*6Ln`U(hY!G^n0#UPBCFHpJ!xR6ivS>d{O2QFzp1{NnbQo`jBr{pW~ zk+Bq%_2RK;YXo7%+t@I6LDdjhwl==Vno(~^+3efwG{d>>aF5XK+uYHe!@s->Az$lZ zc19C?>WoCHe-2KaK@Mu3KI!Gp*Mld_M-FlTU4|sQf+-H8b2$^qTVA?uD_zJ54KDzZ zQcJ-4%0mwb@#8brRQ4kX2?{U|3dC@OGVn|e8{kNtI)L~5xxLlH^BuAuNh2pVfhUIB z_g#7Hg@21sm#u?li`&yf)870%?W&m7XWS<}BTcW?q#j{qQu_;b-tU)-_}fkH?5Kyj zcPFDg$ELZHu$SWY4OS1Cr!U)8Ebm6yqFGS()?UG|pU zzlJ)NFlo1|=#|q<*O;o?FCMdV+ZeDrisOkV3qN&n@a;%vYf*hk{^d}Xuu$<8@w@Kk z=-Cc|2?1JezkGaYmV6lW4AGF{V`v`6dltVTcj1fLdp8hkV-9ERCAjfApqo=vQGpe4 zP<<#5|7a$EruC6EfLJ_tQG;&OqAjPfKJQC?9Uwwd(nT_1+&m%yg9FQ`l#OvfO$4I8 zEn1mHF$F@lma&aA!l@X;T1_Y4r8(easyyh(A@$=kO2}oRJJAZ&7Gf{b6I;gD_yca% z4#CxYMdeEBE4lfYRP84KIO6-B;EU<*lx5{=fbRzMSjwZoX;#KyHD=Ji+xIBTtyp#&zXKz<4Prvh+w-q{tk=B{S zXU(==e6(*m_^+%Bo=7$~>#tS~aphPO2W72$Bf?TiDHDj%Ie7XN=HcMq{qbnC%quT{ zcAH-*UmQm8(X5xYUWiu88NdiV-AT*xnU zp$=T=i-<{X>8h>Wjq9=xzsfrkJV$+`9)*2|9fG|RhpXA+jRqauT2~Utj>ybv-uBG? zn(R|tm3ihumqOT!43Er>oJa%=omAf=tgvOQx%Q=a6?%=%J3)e0W=OEVOi7O__&z5k zrby~ME+U432d4;eD|$mLKev|_KOTvelCXPbgja4%LE?0*kxOljwHr{^+haQg50F4Q zz`w@#Ug+IQcjp|nq5#V2J5@KG1@B-=rdWZ_6ugPOZk-OveEU*A7J+Z3X|Ii8fohoE z)1h!lq)$7WwxgT_UPnJ?mR`vr9Q|!=br@v&L7-Bx@nd@ku07Af@WI57V#f89Nh!i% zg?4oMWR=?+cZ9@2xDC#$Vb9I)EMtj*wlQ8fo7WZ18Dc)-Qo!NR`ifNxzR#$kz5(=S z1e#*S>Q;LW`?>kAU=Ndm1O0G6BZejhl@^JObG!G7c~s0A8rsx~38=5y#IKIbO|@jC zoxf$XsQQRFrW_X!;>kB}SUa^Z9$Q8?o@e5-OR-xvx7gTk5_tvip}iDBc_GMAgMXf5jHZ|SS~nlc4+kZO7VnZ!(Ft+k%57JNTd_ab^Z8VgVrTt z+{=EhF3bYAQpr#AmjeKM9jcdPOFi@`!P-oh$8JTQ9h4jQvdokg;qh>9-|Lg( zZtm&~8{G<*^UW9ou{Q&8ERp>Uf zypaX9Ll<^gDwJ^9VYLZ&mlTAy|lqta!AmuKn6#XW)K~zWvs~0j}^Ht1cMB5;rx!KyampDQo9DpYnIi z7&Wy19B!G4&;><_H)T zu*B>pR8A?WmJa9U``3#1fExoO+2iHg7q%_#_-}o$2nQ{`CzqQk8M4gk6y_=l{=Z#BQr`eO{jaAW8yfz z)DyV+-{iv0H|pOYaDQT%p)40so*}%-m2ItYN^p_)loT%~nbn<%x2*a3%ZF@H)xr7r zSVn!Ian1Sas{d*3X?zr}kfOOZh31mxHZiNT#7L{0N?DnaB(=ggUL|6!x`?H*WVB?+8el>?Z4Mv_1qfC->;hV zz9qlhdYjlSj;_yuFY_aubKNe+n%wi)txor3t8ehfmI3g0a&T=u95zQ)IihA}ms;yx zfpt^SFHU==@?O4uA>HiIi#u2`)k{9d#aMbj_k-@H3uBe3i|O{?!FkE z9AbD)<6M_q5w1QzX9&jB4-kn6lyO9-d3~)q2;~CZo@uOM#nO^tENK-2tGR*uJ-J!G z$={M3o0WOoCLnxMeNCvfwoV(L&)OQ@%;0-)MsT(&g%ykPl4Z!TpV{nSG%j$kpl__U zy?;dn!Xh&|y6?xy^UV0Kt0yg}_t@*Sv*51h{p$Tk<5ag)U3btx_vxdV&6T#ilJe<$ zs6`YR3dz6(H4WJ@ODE%K3^j!4H;#+=iIoT|V=^iCLO+jJ0{NwZk`ReSP#ae?3Q(Ld zN&}dyWCzk6p>3L7xMz3C-}r2t=(0uDlPaWgi(#AwJI9sZD{tf^L$b@<=9iTxj&UdQ zdRf)x1!60HY!tg!4M;EKATAu&1}x*Tw*A7bzcJY^ln^|p>9cQ}pusgXyqN)kSg_po zXf7ljE&4@v%jz_Q0dr%tE%|BJ-9p*ZJ5V487O4gV*gA{n!&cwyy7;3p*VnAbU4HI4 ztTm;lIWyB#|9LT&yRGmB({teWd}J!!(r>nXs&=1xuLV|q^Impulh^8T^i)r*&b^I+ zR6-qV>%1p~*3CD(LuSWox_0ncohO*qPgQk{!yBh*a#)lHth$wrRYDbM_$}!Vnr*@j zgj~V48@2CKo!i?q4>z=n%iG2i6HYFDDcx&z5cC@liCz4_jo35z+@8*OW+zie!fyKP zJSx9lQ}Aef)J#N9Y>OVQeK?MQFQMAtLulOaeBYN)j5()qG@&5U!8IG$LIY8_x8XR9 z(9ITrHs4OWjv$P@fhWpvMWh9Z&>Pse@PX-9gGw7qjOyK}*}oiU#wE+v>GIT~oRz>% zl39&0LMY<6u`@Joc09r0|j=;IP3(5j#ZCy8fvqU-(JyE7*Sdw${q z=j`)Zxcx|U{RokHq`C*s^U!tBn<1lfO-LU{o%hx*$oyuzc%ZJ;me~ zHLX`HLD7k)y_EAe5LCw$@%ONzsK zigcG^N=T{%F9fdl28vAO~lA%z^6gN7P_=A;(s(hzP}LSkm1wrWGva5D7Hly9AP;!xyv{ z0J$U-Wt+>1AzZ*GuBtvN0p?W|fo!B6y33?7SPFFVKz8pn2FJJ3j@I=C0=&vF1PCUG zaFuz~p|7CgPK+ruWp#a2kr|bv<;0P7dr%>QZ?p0zVB7`Z<-O!fDl6qQcE>6Z2O=B& zBU=-!G0l-!5|UoJTF7|xMC^5rcnRA%15$=D#>V;}ROKaQ5&4`Vs!S}xtSqVv=rsjj z03=7yfm9U&7Or7PsR+^I;gty9YFTa$=1gwaF`tP3WEMj9J9Nw^^p@m4Kfy0Uj%&d+ zJa$>-<#4~8Q>7QzpeT+a7VRu;QjuQLGphZgg5u$-$|)-gIPmKFgs*{2r4mpKJljE| zMwk19?BjI005aHM-fmp_@05OrNYtMxG+xm0hs>wHF?{)WP`Pi@98maaQ?u_Y(K@L+cq5^`kJ=eyv2(;fNos{LXYc|4}EE+M=Knx{T>b!Q^+3-V88 zR&%qCW){d)E=g|FUa?=N$fQsE$&EyR3k%M_@Yf98B5(}Y0=lgYUm!!hZYadDznn`j z>>&%%9Lhib)CJYrjQ(oVcNSnpV_S=wAwLJ%j5*g3PT?vGWlOf(U-(?0l0=#q4n|C^ znQSzUa)y_PdtkdIw3$q(bOHff0;+3fTEMOcKx{VsdU5}3Kn1GG|1x|?;K0s_j zOzuJAZ$yJCDL{i+78N8L_YMdK1GNPJpuqyRFqBwwcap(2uo*sLhZT$Y-W}omT+~_`ph@9+)e)NpnaoDHCCIoKl+r^)uCi8#IRLKP@pKw4s(;q)M`rDU;cK zoJiXh6XM7AIk~8oC3v4%$bv=11d2k<%8ALXLfk34zZ644(xmA(2=F1{JB}m)vJ@^s zpF|92pG4`bq>7@Vj*g<5wsk*s!tHz`Mk7i^wb__j5{`lt8d;)!o-8>ASvAWqubh_n zC{@uTpTOO(4oq&Ag2UHGkV*+LF;FPQ8~RWaB1{Oe4$YfqlTn<_?HwIF;DvS7bn440 z2XeoeW=}F4WSv_h+P)4YQ6<~N_2I-dQRPh-vCtMbPJ6v2aVKVFNXYTHn=rX$TFbWc zRS8J_nr8(UDdSfOrxPtVFR-XNx>bwetZ8m*YeSn~WM^MoY+&ANkMr=OHq+=JBT&0XEk|YZg2KuWvWnf0ZB9|0Cgq-4-rqq zVV;1$_%2&tR#pZ&k;Q2`IewHn!RW}0+qVCe?YfSW*>pU;6%8BeG4`{9uyA!gk;>*4 zaE}L`NZXsnluag`*LXAumcl9xVWT=Ae5Vx4EM8w>(?NCB*9@H5m5tkD+#6vN=3PR({fr;%czXOYu^cd65#{c1qp(#{qSsl-X1 zX!;35y@sp-3RH-D?$ba75A0ur!MoH%XO<{*A19@NUif>>i)NX21--C9*a>*xBst2* zA2bZeUmSV{qv*iZ!cQ_1_DX|r`3?HjB5ujOptZqwu{>epg`%t@9dsp@fHz?EaVk)_ zb^|eoQ~e&!{GhkE@KC;hFlMrXKG$%2Sifg`z4LRMEkYjHf4{GmFAR0zdwsu)7_1(! zMXX|H{3%*3;v%BIq8Pk#nDfxf@a<3wxnHQp6s1YA(HnwStDljQ`yR_4EO9(rG|Rsy z_sdR`J&Vg;VXO%4nt|-9_6&Ig=Eqm+8J-3dTA>P}4R|Wt=>vVR1aSXNkT)LcPEczx z_Cj3067#Q}lyfH*PP8jv4{#FJZDv%8hZENTXEMBXkRkRwR)ufNzQexxd%*+sRsKs- zFolQae!+)a@b9sU=)ohsP{W>qzia$%t`E9EN3~!VQAE$wo+94I63PdwY2aSXz>BPL z3Xg&tT2U}3*&$hbYd))@|Hw*Sf#Za`ZNhx$M7p}ewEVGH-iq6!XYBooy=Inie(_|# zs1<-d7&!?V1;#)L=7S+X(LE2+4tfW|LBo|%2dWRZ})?vaYcQpdL_-JOPjkx3lj8#=9T;cw)6z~0Ot;0+dQmo zXU>oN-F6)RN1T-^YB*_R7`ujule|sXi_=zL-7w1Itv(Cx@~W1sTo3IXI{w>M1&E^G zBgh!24Tv4c9hAOp9-rSc$Q{@XI0s+~H|_v&_!_P|7IZ^k9>o2l9v&wrNGT3+4Pwy> zaTUSUrz`dRjNUICHWZtL zGKcXqYSDP1$Kif@A5Klfez;`=0?jG6171PQh3bNkaFBhv3h(W|ob z>7jx-X;xWigbv;rUaACn-Uk?wvedSFpYHFeE03Zd|82k7KK`|QN%ZHWtF)l8ZCWHO_*+n{CIO1dGTy~vmibwajWFs?O!zPBFoZr<)RS#!lWAKT&kbRTT5M{tkdhp2$z&Ecyr)WCSr z=UubaX=<-We=fbUz#~pKXs-9uGT@^0nzUDG{RJ&D~Q#!z?3k%2LYTr0h~g& zEojTWeljxh6*LlWj7VCX0HOTfQPO=4%W~Or;(ryANRjnnXn{&)TO*u zC>rSa^6P6}hSW7)gi0To5xf}`UDJ4joEBOWTt|Tqj9x0eDWMToeYO>Trs3E!Hm-rN zRh+XuSE&ON#V^yxtiXEvAmOY?I*+Me;hkgoS_^9nliO_Y>ae#*G<{5l`!M4K&xj>~ zPEL*6F>jx!6^B@7-uPXU5e&Ak$X@Rf*w$)X^J0RnUlEsMh+LcmeZ89sbF;ggfId+d zXCZSw4vQ#a@L0&(iWyGgwR*Xd%{)CT_~5v z9-qdcA5YUJprlIL>KV0Xb0UM#DPV|cR^&Q0D{%oPduQuhv0A6e!%^jFJXJYQR-ckO zu7z0J@t%WQbA5ZS^C|jVZ&?;u;HRhE-OI`o>_MC7>DR_<{`}ggC&9yOtb+ z9N8&V`9BvcH~%UZR^8LX%fK_|+yZZXDGCx=Dafm{JHx{IzM^fKf%Aqr!S*M7wLQEIe6xSeU% zJy6P|9-iel<6@r3mJm{K1~3*-Tmzu`B- zhQ$0Y$T*DuLdN+oHk6pHjgyG6qoISjos+G@2SCopy_|vd2lkVogSml~tjY(;%D~j| z5AKwpqv0RiCr$=dIwp2zmJiAw$v-4oCPqd&PDU1n4~QLQCu3_h01GP}2PX&12M83s zuz}tGg_mMy{Gc*1Fn=IfNje!=nHvh)m|7YCfw%h8tdNkc8$g?ujg5tlm6d^=13=5n z#6ri;z|O!7U}9k6pkw|J1u!x&v(qs$a58h~{8#J)(#Mzy@E_10r9Ze#{}(xmk>P*! z^}jNIJq9rTiOC-nC<901KUVz9@qgg5ge67(u>M4h>BApM5fxi;NfB8CI{>|;(TD%$ zP9OMKA7o{B#}DTvZA@$de;~h={Wx5`ri^WD+?Vb2LlT`fR&Yvj**p# zndPG<2gk<=2W$+CfAGW@IT=0@!p_MKU}k2fWB3Rs4-Fsr`Ir8`HUGBs zPf6!PC4h<09FQuf9d?&CdWUn|CRcy>2EuKX@Bee<^Icxf2{q>QxcuM>Yue^vaY{Vg&5W8B};A5DMn z{t1T;;G;KuMD?#Q2P;7PZ~Ffu_D{tB*7`&LCqg;^PDTLdN5Vgdj127m%JoNAVP^wq z|BcL_Zv2n-4=xACziWStV-fZLcK!buyUZT~e~|J1jH3T9$S!8a|BRS_K<0GfWo-i) z5JD~sdJYD)+6qv`Sezcp)aAZkK)FRxz=o0LfVQak7cM;8(sq<$K9j9v02GNuUJNT=dhLg^qn*S8$ zk|@GgD-jh-5=|hk3b!b-jz+5f8KHd;I)gxuZs`C}pl(91q-x3E@(+6%#)mSFNm8Vf zA93(`_WxZkSA+EZfGNh<`d+gl^4@;DMLX+)Nz-t<(}%rHw2{YmvL*Z1|9hF>{8#k< zt`h%(5Bx*?n6&?wDO1$u0|W5S1ozLxNGtI_%Y>1EjnkiL)DfWlpUGM2Bk?M>sy5~y zBE|s5KRN$@OyK{<{`(&oHzqbF=KmiUH%2yQCe}am=s&&UtOMFhWqyVIsj_kPw9L~( zGCf`9b2_?&5F8X!Qqbq}eg)!uc7KK9Fnvf=2+<$#Ujo(zD8VtO12IH-pFD2dXb!S8 zVm^zCR;IU3X)(iY<89t^-#>SH`rbdUyI!2W>snr@-gzw4zfILIY~TPu@`%Df3I{PT zHjUQ#Q2nrh7T&LUZ6Px!``LpJ2p}gDvsg0LnCm<8AZ$Ea-8UFxU|3#QJh1w{=mMWP zE8On_k`A{-L2@=3Hf-FbDYHsGnXI}S*H%vs4~B!J9Yo`_7Li!AL!@}nZGf1Z#wVcT?m zmXTQvQglZ|F(6rnLgRbJSAs1{MEA*|?0~KRE=!>pNTVdB8c_!Z+Ggz>iAe_r2I?l` zLG6M{rT7&8iV7Iwdtyu%0P(MtMS~E61&zH)-sX5IiVQ?@0wN{FM|_9oEdWIb6JsFG z=ngX5Hv?rZfcjj30c5ZBXMLky>Ipdn;VwulgvSHwbtBS=AdAztpn7i!%7D^;`!d8L z5&n*F6c=$A%F++ABaaf~)Q@mU5(4l`gB9$j84i1gSw;~W_m}Da8p8{q_QAXY;4&h# zhCSlJ=ZU{SQwH($6T^_)1$p)BD)?z21c#9+1ZlwW?rsX(#u!h-|G<3{IiJCCvHwd~gU-(x}B){?pb8HxIMjn_aq6NFkV2chuY~nEC zJpLVpep`KP1OYrGa8z*t#Bca>#4&pua8M*MAw*$@`erYd*kks12$9Ww!3=ozJW&Fb zp=}T9cBoMzR(^_MpY&OFL}C*45q6BQLziH%h;_&9;i6)F{mb1@cT~&-vIgzBWWwIT zO}a(;(-~mxF=fQEChU<|h$n+1Q4a(^?RdqccB}M5G9cO$$;A31MRKt9MLn3-Vw(`t z`D=zrbJ7KJhK(7}?ZBnQx={@!+eyACYe2%IsP_r=v*OVQiiTO{bH2fTMT$gS>`8FL ztqd&=Q}1T#r#9f+QLP07TEr}N7X!Qc8f($)!7GKZudn+5Xs`gSw+yKZsp&t!2T&VYt~mp zZc1?cK%+bT^`3(_*U$+Xy%#dd^4WjKEWH;zor<@AYJP_; z^&R7U)t)@sbdckp;Cy8{xS7qGm49E&dSgAfso^a3o#6bL?dZXMaN{z0be1){%30d% zC};bQCHJ1-_>`J8+qIYVMs{#R&r#~z!}$t7d8B72_a5N*g!RGN%6c1k$CS$*;`Ams zxOvQ)rQgo#+}hl_At+ng{p@?@f3EkzBU?u~-%Q7+)vVdg zovb&^gPUfK(yrT&wlY5`ALf!D+_1lwa=fA++$eu&x0mA|;QY_cd#ocDh-~!^2MR2I zY;eBGzQ}r2Qlka1y%CXe|1=ATlFyOj z41`0p@)+;WzOC}H@&~u?$m~ayZjV2py}q$&A#~d#4`aB+Oho%moDX0Qyoy3 z_TQmfteebj@wQxmM~4k7SJ*-5#eRN(j4{O%+yh}6x4`4S?@8PIO8!HmB9%y(2IDUC1RsS5e%M-R>fR}oO$Wg9Gq zDt<}=dJpDx?9gC$OPRY)8Or~O8kj(nARH2BZ$!5&>Qf9?Rir+>ej_f3=3r0%=^P6Q zju3_rb~8e_KY6FLjwlD0kRbPy9?m8Xe+YuPa79jJ1~Y20J>#()bJG!=(O&eDw(GVJ zd))^3FuS5rS|LXQe{cLf{)@zTQQB95@?jbWSWQU+3g{7oE3QWp>mubN?;BPkQkniX z*Fr92H1SC30scXN8tN+EDi${e`_TQ6UX*XJZbVQc^o;57-~wyjSsU2nyV%|ibR0>p z0J&8U*QPl61GJRffDQ@L4taVJG!;O!C@PBFa9D&XlZK>XIC&4ME_zMwoS3!*uP z$KNv~jurtm1U4~Pv{&lmK!Daun9=K^%O8~A-ZlHbGU|1FY_s$d^3r)xdeLN(V3$}e zUM-R@k~fNDZLQ(a$|2b#7XN*ZE{Ib&u0*H4K&AdAbh-@wh(OebKg7YO;8~+Eai*z5 zG{+x#grG-|kf`uTw=OUZ5_uf!oYYpTZ<|X?R9gby8Fn)f!w8ZiICL0iuT)s2=pv!E zCG|9*)Q;4;IU*WABjWK z)sUV>Y}GEd@|X3}g*H(plK+Mgz2*c0y7m?K@7dW2=KUw*`UPnnD0_)yiZi$mKZ(@UV&sE7sn z7P&t*IKP+1qE!A39+lT$O+jFtkf;M9aYUBmNw3fVTMDaZy?1tx(9Z8G`6TB4mU49w zaVy+VZ{hS81XRSsBYYI3Zst9~ZG5y4ivDCHqGf`bBeNjFJ>H$&UcNFJndmOGXLxtN z4pe@rF40&ZhJlwATdVZVPD=-Z_yt;094JB0iz|`gDJXtOogL4H-_x;(jk0~xBC%t% zU*w1@$G2)Bs^s{u*pkfpd}lQfM$mo<;3(lD<qV5;J5_WWXBjMn$`rLUP z9P8?tgmHTO_<3nr2M%sqbmT(UP3CD#5@+(%og-)rDA0y$VCUH&wdyjp`cJ3hh#+YQ zG9s`_T-vAS(7L4?4@%8pS%60V*UDlHzbk#Ea3qVOoQg@c^5DwhuE1II1;#7`h5RYg zIZ8nLw4s8@A+%Q9TVg^7tOytlNU{6z{69}+3HoFHLjP`Fro(8eEISLJvCS3aXJD}_ z=>!no9U)?~=zkx;x7ZM0dxb$(aFxyVMt36jD#z3_Q;>~hX9?pKii}fbb`~2uWJF{Q zR0`;Ug?ywn+Pax;z=T0G`w`@hhCN(i9uM6_*^$xxbpfx1ua^G(p=3f4v4k}^npuds zM9#(xwM0(eS))(mA`kQam~E<+64M5EsW$(49o;}V+SJBRl-+s-#cY|ia!wy&|pRYX?tD+tYSQlWIurH^R~8J^9^n4w2LLVrxZ>FLn! zPxvc!5p&J&n($k&1JH%I468wWqLkPAaks~}GcYoJ5@Sz{h~aJ^CB>(q5{hm@@Ydg4 zV_Y}vV@zEaTsMwJH_(M{dAnapO(W^rPo@f5PgxzG8c-H}?LAF)-Y)I)w++eJAS~Ee z$&9&Qdau8QKV#_JC*)&3cS8{clMAzmZn-LcqHrZMiH9yjkx_{eaO%RQ#PA_5W3D{o48lzcvZWwPh& zM>(eLpL<@RUqJ&GYj5ve4SjcGOWaE?#xrTuq}yF;oYBwum#Q14>?vcUvklhXx3mtP z2EE%u-D2DiJl=a%LpvW;4Uf6uOEk)Trrn)8{O{@A&#}1)Put(=yL_e@wVTz|18CLS zd0a-p&^*m){J{F|6t76BMCdj1e?JSN6&79kfp`Q%BB5O#8-=fz0^~37ymwmS?Idylfw(#-L1Z+ln3SzQ&M0w8 z`$TMdS%LoqN5Zj>Qo&xRn#CJz!QQywaU+e!8LT1D*>r{V#WM8xSeI9lB!59k+g;N= z9AU0(d8D>|QAhLrCgt}JJ$0JsXd*RYOBFs+vZ& zZ`lqJ_|xOUm-3Dh*|SW zSs@6URZp*}T>5d)kxaf&(JQJ2>5ciGvC80e(Z01Zpsz;dyc3OQe+9W}>L1=#iKR=2l3Bd}TPkE$=}gLzxMb3ggN+(oK@%FcXr; zTN78Lao2F?_$u04(P%qU&HAmD630aFJCZuE@Vj@Q3bt-Vw*IfsfoQ>Yn&ebtCSE|% z>oxw5SsdIjCIGvm%_*z>T0~F#7{NuZ_M$jxX zlw+5Q_Fp=Zl}%C$-|etJOFt=Ep`QPgt{29sOHfu*Q#uvGLRx3jR0|j#ojYppYRPwU z`}h{0wd@LU|LEiGa5kdpNc>vnfXORm{d_b9`&H%=S8E2pO0=ht!H94kEDP4(cT;#8P3kGzmab{QBBX zi_J`}=jO%rTI+q=k@AJp+0^^*cyPihEmeNLyA4bFH-Uxr^OpSw<5VkDTMSzr z4#(LPY9{2)%Y*DOf(n}Dg$J+G!q_DbDU#!1(O-(wf#F4>Pf}uai!F;zOAi6SC`GjB zzNiL?GPUZYYPJn?kMWzLqasQ1??_Q~k~7j@=8wn%B|!^kj3AVg`bp>nonQjOutACV3A#%sf#j74TR|?lm3jz z)Xl{c7Au51bXOmGjr$Om_H_>BPyyRyPmA9 ztc>c;?B9c$&xSRHIQripg8 zNeOG5y`WpV(9bYEjzc_cKnW?Zk1Y%!WL}!oHq=JuV7e8=L0WR2sRUlHo9LAJ))uqp z^z#)ymcqXgp>7VB87IRL+P?D?e5Fu_$J%Z?Q;~A}^6s!$IlW_-q|<5p8L+sC{*rxu zb||rGe`3{%>!5FKJYxi&O*pQsa3mLEt-YZGd$2@()X0q(9I7Zll#;+Xvc+*_i+j8I zrI3F+x?=5VZw+%g1&d+28ol0q@R_{`s?Boik(FE;RKL7@J?q2u>vG^`A4D7T-EKEN z+B|ux{e3vfTjO!&f_tj=O$~xMcOe<3EmX9f+&l7|mAgz%hakMwWS4)E7w2%d+ z{ss;`m2;)i0ir~zI=O6z(kAiuOV)-TkXJ5jVqXFhNz_oZutr%|L(2**7>OLq4oz!0 zCF>_f8a$!ko97~50)*+Mrh;W;TwK4eS!cDy;`71tg~{?%)7Q)jBTN5fqJ;vLmBepS z45HOllC&z?6Dg>^twKYm;a1(TfxucRDE#7~C`+}k&wA`CjqR9C^2g}uXph?CE5+~C z*Y=AYv&)a$cD-Y5m+?Uw_M=0^ffs(1`cl`}sgyzPYFJNYh@6s$r-MzHsIf~nerHi9Z7at}hXOR14Uf=j9d ziu7A%1Pne22~{YVVR{8ZvJ%K7QPN@v;8Q_Blh5Q(c#6mg2PCd^dP)eg2s6A4Tn4RY zV$v(+nLni+6Net@BU;MWK;@bn>+F6(Az%=*NZ2F<$d<>9kTIJa!Ow-lqqC5yEdm=g z@D&VT!TAAzf~~UF&GDCfUbGtnJ9FF;mJ($v06Pv!&dq9@jb^O~tR*vad(R(6>qcWm zdJ}bqBXIyZHC@fXvdaT5fPpN-DgZ{BMlkyH5BF0&^u^-3VPK_QmMobCCZ?67Vp0_= z*Q=6EGNXzdG8uUbs{8WZAcc@s@H!iq4d|-sJ00dOQp<(NrI}%+D6z$u4it|-hM&(| zv&|R6MvA~0SF8x>iPJgp(c8SY82$$8DO(-)8^ptA`6<|B*9f!iW@Trw{8o#tNA2~& z)VhOBaKe@0WMh8u#<|Y5;k~X(Ry3g39ji7MZ$Z>&+}&Zg>H5T6te5?Md5($ zK+dds!LJo*=H<>opKhjE9#07zK^L>J*NAThzZCO3zbHQw(MkLtVEeE>%$cBt5=WlI z2HevCop^L~8H;Ul8l)d^)Q*S9J5|&Ve_$1;*Y7sEbYl;BqCR=CuuD8#U%o@4rmv7d0%L6DX_~Rpv+Sg9$|8Yfn)k zTm)q0mnrl)vo5?i&);4;u3eYu5lhZ{LY#^u^^2Pd5;>|vMKyIK4J;4(cQt;Yi`Lo@ zEa;|?{m$KHt1`AEUs-dW6LBsfm~6|!%2%+&^fV)%_}%30NGM{ z$b(rpFXc@l5VHqmtSQn1H&j(jU}STEuSp=;L;y`y5Su;xOx6Mt4aO|DU*;NXW11+5 zXx-TUh#H^F2=abFRr#Y@RYl*__S@Ja6EpLGr!RvQ0eB7ztN;)*FsCyh;DR?dE8$%i z^TTvAbfpx2ooxZVFdvisbV1w9)LaCg74wQV^wLOLJ7 zxspLJ>qexoN#Vy5?HVP}DtzLmCD5>KGkO z?K|jz!rihE%Pn>YC70*3FmN=P@4P6WDXw!}s z(ztayZ7_eD>eCXS-VSoaso947*qZ^8^JyYm!klgp|P z<+>iTR#QBLN1374Ul)rgcXPmH^w&XV5MG3aE7AC-Q)A z#T(g3Wncnr8R1z`nXzCBACEtkx^1~AJD9F(r`xuEiOO9{bXM84;#?PoqCN$Nmn7|Me)3iC$6gG@@Kp?C> zIzS>_rl=m8lkqEjr8?hTqRPa}+v;#;k9B;ViA#V&T9K+v*C0C_d6=#s-xFJ7`&IG8 zZ;YI2unTV~of=hZp;lug9s<7_3pO>bSH%L|Elz$Wo+9`uiifK$_Jsb3HhWfIFC2&D z&M;8BFCEfv&|qYoIzh8@o=iSBuAs2>_bDcs z4X7Qjbz;TOA>5*j4xh^6NHvQ|CbRIlxFs;gYGiyUPNl{3!3GX(d9rXb)Yd}Zg{;yB zl84BJX!*belFqKiJHiXFOAvw}dQ9U!7IIUKjY-f(B_vZzG;KzaD%2dUy7*2FTLNV$ zySmjWBcjZ6Vlh)GTu4Kby7}INNcQ+nl(CTwr;I2L8`bextwC%~CC-n%@vhZbHz!!v zwVf85w*pOgU_}VZkA6x&YpEh}YlUk2zBoobyD9~CQ(@Mqf85qQ%lU>Uai`3RB{0ccVsrz3AKS%MBS>AH*- z8fzMgMjOE-Lj%K~Fcp>JdB8<`t%ftHGVNJK@=~~{?nbC?Xl1Sup$}ndR3aQdm- z4TrwkluEtU@=^R6oVEM%Q=G!K18r}m8cg$^)z>*Mu+({+_QDprfch9=3KH$qC351cXQbm&ecMwds-D1{d+AWd=~dUt=Bp^5Qk{@-5V6L+a+)x44#kW<@w}mkB|?S$@ki0Pq!UQe+7Q=~9id9NsCca9R zC8Uj26u@?3nklC)>o*IFst%Mt0y1&vAV}zb$*E+IekX64@V+BX&Y@4WQGiR@WpS2< zdqRTF*qB+%5F6`{g#Uew$+W_@HuaJ!njU5ZfEf-?%tjnHfw6NyRNJ73RFiLq(BAjf zlce#U01~_B4}QiR-EufMOHS3@cD9TJBK+#Xk@dAoQo82Geilgc9eo=53l1X{EfY}ekWvSymQkoq zM4+CD#ZAMH?aBCwHWBw8xaHHd5wbr{&XZ?lds6$VXT7w)G+zcpan7|wx@4!w*= z#kMw;cd6YBF-FJtvUj^V9;kFbCABNZFP08PGGB>Ru>bxwD{t3pAG?Yhco2sbBzB1Z zCJZ&oUuS8^#48X6o9Q=sYNtvI5jU%Y08zGjW*5lAM^2Uci_CV$qc>^~252=P zlQKPtUQ61Y7&|okp{NlQ)JbwHHeuUSnY9t2Fh6-|ac;@RRJL>A)j5utr97wQ zs??(Yr!w65Ub=mF-u*RhvU^f*ZJymJ)`ihb8aN@Q0Y4@aMY1z5)Sh-e+iYm56Qi@_ zq*P(pczQx>TYU`d=|ZyJLUqclYnd+D;TcSpK5Dcultb9Rk}j!eB< zKSmJP-7CHAB+1;{uMiiW@seYi2?gSu%9PRw-v;RU2NuJr-Oz#TiucgR`Ia~0t^PvjDyF%qn*5@JR zlx(Koq^|%+#jwH$bG>+@N+H`P%(96Fr$KRQn}U77o22D*>Z+CMkxY-GoAFAj3?W8m zJ*0?;8(3nTSu%aZijhMxqV_2gX_%K}^)*BaCW?dSkVKB)iC#U};OsMUmZJqJvRUl=o$msfE9cn!8ZSc@8hb{R!X?DSY_C@LoIn!268*p#4hd zxIG1A1y4yFJ70syo)_^Pi(doWBqGb{MDj!c5eQ*$lgY$H2%ww{+2SiHM#ZX1giA@s z_+%Gb7Gi`{e6c8OI-i3?219z~$f%6Hx>FD|gNTYopn>?x^D53n|p*g6r%mq8^lPzDb_y8AEgUabdspXL)t(^_0J zP0JKmT_9*ljEN)oaj}(xV*efn_H?=7ul;CT_G%1Y?fy(XwV^z_;cJo-vk>ON=EhVt zoDusaCy+)k1z(M94SyYjph$p(OR!P?CGh31l~%4rxk1)V6ta?7RyKc5$O{9hkU+@0 zAnT7?Is+h8I{+toty8V+Sf+(6XOMwAc5yCJU>*+}3~&x6ngH3#2IR;omKR&2m7zrd zYiiG^Y}+fq$lnjw6y_n7dmed0zhwQHnRpPZhW{teRv2Kk%KiyaD&6Pf@H& z$&sp;gbg91N=$k1w=pdp)DyBOC@wB9teNPjuW`wvM#YG z2aywVydmnDDcbV9ih)PGfRN~UAu|E5@Vi`WgS;Cb8_^(PAQ)eX`6?nH#-T^4qweue zV=t`>=82ojua$J;jN%Dcc&)pHDpz8&owxu1z5)I6ASocgA|DPTDav6KGAx=w@d=A@ zcw+^Y69pC>u;J>wK3+Nd)fXFYCwc>RZSeMm8|^O4)5qNry(TZ=F`JlSsoEz?l2qRx zcWw(41Fp9Q&c~#G7`Jty;`m9 zS08u*73{BR1Jk}4dzjqml^;uAk#Q_-44?8&@}fU*P*c(b91QFzl$E|l)YM3-FL8cvUS(^|=@ReBvzP*c z&Yz62k^4Yh>29Jmq(S=@I{08uokja`N7#wvtRa$JI!#uY*7V0W3hH%D#@p0j4gP8H zUbI{})bljR8ZVzdaSIG`RzefCa&d7!Jfi-DY*XyKe@WluLTjw2BAygfMD}L4~?zW-@UJ%K;@gp4g6epnTm( zz}URD!jZLO(7Rq@&awxlzAY58^UTku%y1d?lR>Pi0;pa(+Fha`wKbZCgF6;qKN>J+ zWFfx&V-Wdx(Z9+1Ct9jguid)8mvSnXak*QWPJM!_PG{)o5V_)9Mf^HbX~Dfme0$h} zCC7M2LYG2p8sevlD`3URdL;igRiHOsVO&wf5d@hysg!UVO)u@NYPQz3_JPIS_%Fgb z3H4o-ef3N)o*220JimB;f5IQJetB{uP;S3+OvLK(NW|&ujGfXEgW|CP2t^<_X)RJU z#l3W5R9Z-lr#Rn8$WG}eSv=06hr2siA15o5Gc&wx*7LZ;ixycvn5i(jU2U!FG84LA zcTSa|hqJtGw(Oa&TIx$oCwETcn=Uczm(MTUeW~^B2XR-p$N_hgMT8=|wK`VlW?8rK z9&8^UmqQ$ra-~ScDH;MY5A_lS=T?@9^d~MH>H7eu#p=fFFn8*?5HWthz=ZcF`=i$2IE*{e%mo#X~e_}ruJ(p06`Nv8$z2>M@o*-EsOqA7{ z_WVYqvqR0~3;HzZwz47@Z7GcWI=gf5+MUn3cZUOqQp(WH`cA6Rlbq3-90orn#DJbz z#@LK$Y%77{W~%!&YcRG8xgNarJUl>xK$M$7X+u;egjl86d~T&6xOzZ$IonC{ z$^R}GQ*TCWTEXkz=v*uS_{1!YhohP}F1}ejDZ9mG|4dsPoupRw3)GqklBprN4fqEu_y>h;qS6sy^9 zcVnj_6pQSb8nX4n*cYyXA7hEBsH6q8m) z0WYEylD8QsOl?XOG}ewYJ7ZWl0nycXp37D%g{+zc>ct*vWh!?L+K8|gd`-NB3iCEAcdofq z9wQwhec<=;*HH;;U#aF+%uv%)J&n8+h?F-#HHJx5gGANwz>!Z;al_W>NF z{WZD`tmD%@byQXDfEHhF{_e?h-2U^^35UQXy0hVEDdGXdx&{)HV{fRHS6OYo7y1dy z+j+dg_h~*A6MhI;5fa16)$@hO4vv@*@QNQ=A8||p+F3Yg-7dhVRtcLnib<>3LSY#l z8^`@V81zko{~FHz9h$ zDGJ?($}kme`@YS*d$@Jpxr@6~-jjON<*n|=YPL%#;X}T{T0i@Wd+CRoZs)Gre&VA! z$GK;7+1Ku~#D~UL>t@Cnaagb1=c^UY)CfcPcXByYNZ|VULnn3)t?cPZBe}Y)k7Cp` z6zr5sE0C|F9!||_W6I|AVs;EJ*EZ<;$9xB1mXnG8E`{cGWAhp;Lg5}B;|8o{c+Uh3 z(?Uo<%cBUT$0a7QtjH21hLo)Y%5>Dr2Ffb-_GkIZeGB~w_oew=OjUaOnc^(A%Zp`_ zawh~ucRsyK4T}LKQ^RWE=R5Pe%g^hsJL4*g6wj-%gAu^dg+TCx%Bef#&wvzU&aHW= z!TXNBsAGOMwT_lco#AQe!>|Tn!3%m?cBHUO(QF3uUWv5j*{-uh^KK&Vw})v5*=&$w z?WJ0O&+KjAHih82W*GYc-T8{2`3gvLND6hZbzW`0FV$tPfVC1Jn+}I0 zlRr|?)K<%W<wI~}_8gq)1FQ}tipmA^&1cdm z6HcLsiO3Ffc^yz6K8MHR=Y(f(X0NWpMP?69Q7xWwa$v}2UdaWXTDscdA>$PQnr2H| z+t=BL@JJ1Md6??iQjvb*F!`WprzOKiePdkJ1&gb}4U zl+3zylAYi4^+aU_8xcJlFEN)KkaU7(kYFfqRaTaC{+7h_22G9uc_T<5I0=cD)zeJU zo*jUQ7^4F^yWu z->=VP4-EIJG*|8Wv>)~tj^|y>e4`YO{iwlzGg2IaT*=x%*vTHO^#+Yo#8RYjv--wv z#sEHjDM~1)r9uouV+m={7Pd*XbyrujHXMAyN@}#n00j?aG1;9h!=M?Qc^&^ym#W92w5hiEKWQFIZN zR;M}5yV&EG)y0!9+n@9v3no-ssSrbR4l}y6@7m7MqY%9R>NGHPjeUf4!{FL!(0i5Q zJYWkh3z9ZxsME$eo3I8B2SPXN&6yp`H;OM*e_3J6mt{h`9VH+iFGnHB?~Ooo#b7#_ zgMXYam1yh@K!20WpL$1AsZ0Yp_ISR4!dj$QvN}xvPADr%n|d>905V=qPezmu zF;hrP2G4Si_*f02<69-%;QLDw{SMM+a4?^#JpZpq28Q8+!1Wh;u8Q}1n7$Z?Qk0E z>sazrUAO1i3Lo=%*ke zE&cEl3Gxaiy6AQ8uS;Uz9%Na&P#jgqv}t(!-(1gDZZz7^Imi{jjk`lFK=09CFZg^+zWE?3lw^Sf$9|U#IRD zlZtxJPh>8J6%G86x;Z8-`A}4pCNKZ6!+22Jp;XPfn0|W8r^*X`GG~u|E`#2Lhsi7w zOa*JeCnaSBV@H#s)svsvn_+cWTwGjGtUfmn8KXC0>}pAxbf18s4R(K;3a#lD_2KKI zhS>90JUbj}YGT0W6PT0HeAe6!t3wa~Q(qsX-zhkg3Ilg*^9?*|(F+VHDzXzp;(GS2 zC_0p?EkD=e)qmb!ghCGH;gE^cA%mBMKp(Qah zPHUzp2O>&VmHSe0-oK&dxFzlYTS!}Z>h}0_A=3QtC&YJYupacWI!sPLNJ@AX6T^@> zDbaWR2<(dM^HrIRuaJW2qSTGWDeImTf>!45{&*rT*_X$eXdidJrX5-Hk3g!q?>mH*41y!1zx_F7}LE{04L#@)Wb%G1-U$J~|SAA3re()EDX6odLmN9VR$SN4q> zDHX0rLq+?nKcIJQaVK_ny}i1AL}d!5G^g$>bZn`*(nS9= z7eDyp>Z9B0!?Gso%9r?tC1{x0C1eKP76D8C1_p=k>0(0pxny_bY7_fdN`_udCA=T=i>oG|Hq`sd++c+Xm8rM>qF^n$17?*ZVIcL+ZzjrT&Z zM=Ts72Jt5T!Cd#HL`D683=I4leoF!h@p!zy8aD9`0^lLs|(OM#MVYC3n z=lO^J?e5w;`A70IGVpVyxSvZH%KJR+{6I(OXAn=qA{||iIqJo*9@LBZ%~4JV32yLr z!U@OEIDo9i6hqE~>qG55>ia)uckqi3A{^>e?3j1QI)swPN!)IkLrTLHOigK z7NWYx&y4Cs5=0)eyb4f%5lh+9Cy; zYfFeL4To=RAt|AYB~3_;d|lQ8b}83~frywfaHHde&4Dp-qig2_g7EpcTsw>?+Nlnp z(`a;AoFJux&AwQ~pIF#+**4i_Cg*q?uQ0Qu2tpljv!E8KVy6&&V5E`lfTqNgrLgo* z?^ZzPTe*WAvZyvcY?~e4qJqqTFTn%Z#@WW^F(eZfr>aUi^CD=HfeAc^G9 zzZ)gtCLI<|fzb+!_Cs_`-l;3R@%|Yo>0J3=k%E6IC;yKT@wZa&x9svC(#t$jn_Bq?P4YKV@=uiI-#;yEmU^?E&JuIMMn`jGSVdVJHLiw@DEZ)!BbY=2^&_ zXI~#1?lU?ME$jJ)g|N2C<_C>7foYge@qiski-zZO6aLKqImmTA6pQ#eS~ZnV3F|MXMY~G}jKQS#Aovt1V zf{)A|WmjJA+sPE0nNoAABYbnXfB>z&FiF1y1SJ+kR(gQ|{Br2|HdHii6b2Go*sT~q z&HCtu3^$D4L-&KCqEcZ&91V0Z1Qg~zGTJsnZ|sMjT(h>1KlVMj=aXNR7Ax5rGuRxb zO5NEZVSd!$-TaU@PDt3aJG=t@F%aTxJXw~$!60s;9{lq1qe=Z(ldd?DeMtSs1##{B zm1}Y(#OKFOWjBb;1{e;c_Da)9+*@lm`_Fe5X_Ri0sX|MgUqCn~2Avdb&v${@0xwEF zGHg789=Gq}OBdts_u@YGG}R;F$P=kwuaZGv72dzkq17XpFR0P>e^jofOlx_Jjxk~@ zt~cvsMcPgdjvq~`Vz=T2J*d7|Q>E4yNtQKYf~3rczwFGhCR2=fdGbU z0Zv&C9$HV#2?#z4tfUSf!@0>%`#l7eUO$uhStup}kQLa>9g+7RRG6DPeD^-+v*1|+ zPdmS;^R$Nl9d7WAc+m8S3h;q(e$oC;4Z;15W5i2i3)dI2&BtVbd&Gl6i(Chb z&vwKMrN?!Ehr~l*3jl^oeG3UOTl*UfCOj9W7BC1Wi4S&926H@zz!qaH7l9UxAC?^E z3$#B6q84rpHkcow7K{u=7{?0|KNqeREeJo#k8EHzBv}Zj7aEzmsvu|O- zXAyWbkW2$IC71zzj5{@N%hiBGGtwfFhd~a57F+P+{n_4rBwa7SuRw z^~^2uH^`D~W4Z^U0ZI!6R!ZP!&nEO-%dHT{Je!~fxVT&y!NXMaqgcCdFrW#!|v~7yYf+oVc$_2c+)}O z`>?e`W%o0WO3*U~f5HK(lz?DLKNQ=^XI8^7hMT;$4un z{5eCa`?UtPdp`%*Z`?7reYSBvkvW2&iSF^Re2!ta{gC0T`>}Tf2by;a2e5ZApDFj+ z+4P`8uKUSDKz11ipm!VxpudZ8_g%wq`)%WUL0A(&^<+D|18xai`2Py=4r+$^0`L~; z0L?yg`Mo9d4zb1iPTmphqB1iHV=p_t+G-YKe}zhY6<5uFy})OFHdf7dFFC$0w@G~k zf4`M`e(!z4_JRGqJ1p(+O8Z@U(eYLGf3|svmip?RJI(%#c6`lt%=|RgEPgs=>y%zT z_5419z;}N8cj4kM?UQ@YFYNEd27m2zm(5FmM+m6;=Vrj$;q~j<;kEd$ivH{MgGXN4 zHX}qJ+BLzBhthnI-Dsiar36+uhbk>(&4B1El(2=onrGBq&bta;AX6>iu(2e4iVu?> zys=lXMfu@wp!n-3Ejgw5>5(2=7rNkl7gprheiq=z)uuuSwJ3(3Aw`ikKum;zh$owD z);6&#!Een2_XY~$&}fLk+dm_OP=xK+&ROusb&)HxaxJpZQUn}JqygunnxW$|(vf|e zZr*#Uc8+_r6y2bPHv~~T(j2^;+(75qk!_dYSM&>B&Uum>K1wzO62w*+Z|*Lh{`xII zPtVpP)U$ZEE6a;3T8wukOt&0r-2g3F+hiCDSwfRF$sr?=gd^7!D-z)F*SlQPf{^b& zIDGZV2s+;Z8?2FYsn(=CHpWxhAf25vP)xy@m0Y0Q(?U43!(OfFuTGXjGa0}@0`)_+ zbA}LR*N%2ml6sH}{3ME?Z-)jW z$G(4^t`^%!b^)_=r&8;YWw}-@*{|;1d_@yGSa#6V!>oFNxOizM@COv7vU}$|%Qrt& zyRuA3Rck;-&W+mgRV#pR?A6-%y599V^PdihFNhU2plVI^kc@QT@{Df}U!UykhyPq2 zxu#LO0$8|(&b4~sygFkJ^|?%r6SBiq6|y3Jis3@b*PgX@P3;c)^1Vj3+xNW1hLfKW zbDyjsbcEH+;`SAioy?ZVRHB&mqz|VL;alho`&@K`Zc1)iZv1Q{Dv*xD zE%%P+7Uvr8uHV34zYv0-_gpBp0_({02{e5(T97OIr49zQ7Sg(fqda`dZ7`I3rTGZ_ z_N(w73ceBQuWR7PJQx39L94y%_;~85YVeM}nY#l+_XWI+gEOK}db%%BP zb^Ch z|C(q(tq`-_#};dMA;^R65EpHN{e_1KbRDO(w~xJ>1Xeu{!x6P+LcS^d6h~W=t~9TD zZ>5l#9V;xmtsQ_hQh9)9N6H};6$5)9CMUYo%f2uLAYt3bY zHaj=rVwht*Gn!pfP*X0by$zPL|K&v7k|&!WsfFEEa_??{?iq8=OFAg#S`_3e#Hye~ z$ozxsDh_%CX(M>w+biqq3O+lUt1o##+)f1bDj2`duuo~1R=4>EeHYS}#O_V)KE^A$ z>51j65+^md=~MhUX{3dT>;5dCWowt^k*Fnw$^K23;x_-m4c%BS^wY_XC|QqO8UN{O z=%WMsX^3_K{y0C`E=Fdr7j?4#)6k;$=L-kAId=rP3*>1Z`yW|z znnKHxMmJjt?A$|cU{FsDei`b8Sk;xKW)t3Hedzw2*bBbu57Y$(`JAXX&O7#W672he70O9_B$=bQ&Ie^~?8s6M|xCm_hFV2HP;Gy?Mt zX|wrd!ciq?TB@*=)aYtzavBT;H8|YVaq01xQ(!>9Qc+J$y|S10omerQ(iioZP$A3k z#PfRW6MAB7cVCxuD4H3Ej)RCLNc3KAFgj?D8_+9jakk31>!m1G%9O#gROS2Az`xWb zDOKgsD?}@L%}S`y;4qM(hPFz;LE1-K=hJ9B`88WuQP}f}iO)|f-PQt5WqyPD?RSKq z`_ay!VIY@xTihPmRywY1Q2DblaX9&^F#tN10!yILApQwhcY>WZ$s;Z?-U!h|Fo1_5 zJAz)041ei!v;d@~GTz8|sU0$v+&`P+%RS1&rKNMyajaBfY!409*N@wh zv;j?rv;e(An`?i0wIZLeq-2abCd06N5FjuNu`@B~^)LX;m&qR?8iBde0RhE2m z*Enc;vG&&Cyk8f+cv#Ry-CA74reRY7oY4GfD3HIQn^^Uf9OOI*tN2PtAG|D%Uau=J zhNwKsF+)bL-)@cTmQ6)awvnGg?Mn-uxZc>x(&Q5C1y_DFDC?4q%^zkTI2f+G#Z>2` zf~yeLC2JqT)C`C)v?S;P{lLIlKL8@UITa0gjC~VMZCQqcIx9Ac4I@asfD3=2gUgH~ zSi+G{nGnjGBrC`xJ)$M9O43y5zKsT{88NVQ{f5NEd#Hq#DI>zmUxfY#mAVNBn{Cn; zVWX}7UldBs`Wt(&w0obadqAUiL8!YyrpHV`!aj(l+Gi!vwMa}MHnrUILx`VnH$ zUIgNibWC|S6YnGRcg7J@EvfytcdZS&N3H41<;Dq%`2cGjty~xt+Z%1JQqFmvRxBov z)>paFGr~;Gk>;2xGgkvyl%}<>=jpa^;iDmVMjkBp*(7V6e#DqgLTHcF)!I2t(ptfx z&(>9U^i|Wd`Y2PJqv#LkbY9V3o>U$LU3iQlnsUhSyjN|S5m`q}Q5*DKj}0hrFLo-UTQf3DOy>yD|eGp)V8K1#jLSzM`>6oIFW69@qx1Ajmfpwy?wwU9W@qfPz< zz&_?ld}jHXO#x;*c8TAbljDC0WS#pU;OPB;aDIC>`mreEZ+cD|kX!iuFN-99o*7eC z!~-{JQvfV^e-CQ(eZgB(huRyaEUt4#`>aFQs4=jpAuuOb?oqvdK0vqfBC;=rEyM$H z*D>dLOU-40wjjkM`7^sUPOG+^7k0Lz$+jlv z`8-*~-RFk>gLCQ`$Rf|Tee1#LmpA`g;cK-KAvz@Cyi@$t5?6eNJgU6#g>_jgEJpD# z3!r!7<~rJ+Q!3c=RxjConnFxyZ-M%&CQLwQgA&?`zEC(a0VB< zfhx!?{gT_uDN;}p9OM8jWuGl4bw!kw&N*#QsWXdGa{APYp>546G6 z?4d+J8V_HXW*sMprTNxM1$PMpbJEFJXVH-mv!KE9)uo1DOymF=F+QIPE>e8MpCkd2?J-=c$o{*qYfu9cYFv+ z*5Y$D4M819a>%Jp)(E@En zptTku8McIODQYt*H7^ct)0nbRirT~l$z%mIQ7e$N7{*uQ*D@%MMTxc748skJ^X42g zu2tGl*-+b1`c9Z-e^FEUlQ zFf}7S<#Tzz;Y1WuJO5DzyRooXOl&PV!ABNB%YCDSzCa~G2f`M;NfdD-`@XfK{34t! z+l$(j)27CCmzDe{6FbBa_w5nix=FKSroD=x;Ep`oap?1#r2ua9!!3IE8N`4X&(niT z9qU-~Py079K6Vq2jg`>pEkvC>G>yV=_O4&&_3R;iy`aT>ZlKRaqiT1Gm68^fx| zE^RN-I=ADoh^LZGMqLitR3OUY?|rG*iK2$KulMGFXhfoK{4p33*74UX+Xvql@nVjZ z@jP8wvb))=Z-wtwne`+m7q~VFv{@{S-RIZo*7yt6gM}P^<|SIk78$LCDNfqYb3sJ{ zv519qF=gbp5nvy=G*-B_+X`pIGQz)krM55b64I2Hm;NFOg{Ofne=NsK4WDU$(F%%Xm= zWbY6at<@Z}+i4{2&)qd0cDOqlg6T&YnfL< ziGY+$?`3x@Utr^wgJ;T-Gevy?!N;qIwCbhzu|c)fkaI*QfBfnuNzc{g&|z6uD^|k_ z%0;ywbRl|Pg+!e8tACMK@)LDjYuZ;q+{qcy%xP#a8kI@rY)rmr zyYtjo9)eOZk??SejgZbt#d7Xs?QoaxfGW@!PZ}EWX3r2We*vHICQyGZN*C#HEqWb`sMo(|o zfTQD;Up=kVH zcc5Jc@=dj|GMn6k9ZpJ9p8t-#K+=Y6-veYCb65jVI=l+Wh_qNNdy0IBLbTQ}MWhMh z!HWMg!?o0%^)kjEG6N zi*uie2zE~yx;AZ4G!~?~5kkMf#K?umpRbI8kS!asIdHD=U2GInKj7I|RR+zlbf&aO zZ4x;5q@UqQJNrAxy~*<8GzmmnVr~?lRn}o!{MN{anhy;HW(%l9Tr??{v_^R*6y;G0 z_`qW8fG*c7$#ZtdGD5PKDyN|JVfhMU_X^TQF!%{)Mb&Afa#9_6GKk5gQ%R%>ck?+5 zh6=W3;EoROs_(Fw1x+)V#MB9`;xn@e)-EX_!FlMa`zNxi=+>(G8#6%65bgT6F1G@p zH2OQkigHr|LyGe$gumkoTmnx)j%W-N_!xUYkbQ2t4`VfxNQ6>&-nf zP=ckDVTb&Y?(7IZ?U7qI&DD4|B9zuDirqrf$+PrsAn}N{_N}eImmB)@TnBOIrbf+10Sri{vz}tZ}=^Q=fFO1mE^4J>U zU4CLd6Vl7*ye_Y=6=^=L-acNoTb_X;QgHZlUrY~ivO3b%w7hH`>I65TOjTHETFTcL z7)#Ay_(1X7%D1(SGR)XVI_7Ni?;4B}9zcsK?VP`9ZJ$~b zk7`(hypq0R{I&Z@dwID$(~5_)jJQ-$k=y_jltWU*A3;DxgF{@8MM_qSxauil2C3hRFp+_-^nZ+Z=jPJ>Q4p}Wt zGOZ2=u%v-IbzfF-fXFyRFYAP{r7pj`+I%O(BvIuSG;gfkFvTS($?b6(G&)dy_^1jp zKc=356dduJf&}7w51Bi~w5a-s@+_Zze$w#XW&1%@?TtSzg>1VBBF@eXR%US#U+CUT z7;p@%1@!xGF#GvL%^x~5xblESG7PEH#MC+filCq(Y>QQ(!Fj6$BKkV3s=HKCR^W18c|Wb z-doL{+e6DsO{GVAB_3?lUT1{->7LPjIf_KQg=_eslE?}?N~VkJw~xKc2tow2*||iB zqmiSArm75_W0A~C$w0-(%MIE<>R2Y%Mb}I@H^hIQ#Jy&T+Igza(EwI_MP+a^^Px3m zU&x9dDxOwiVFW@RM8(PM#64r~C_JG`XTIsxe>fuer?63ck97VjVtBByR_5qpUFa=X zui_QeF2ehp7art5vEsWm>Dm$Yo3maJm4hz4gyBJR!)RH^9$=9cT+5Ci8f~Uu-5wbX zg6+!g~v z9LZ#5G6pbrg%9w+vJd(B@$frw((dxU2#faZ1qIXYhSO>s_Jw8s=|8w zf@K9h?c^nBh{J}1KfEE`yPv- z?ux&fQ*M9raD%_KuW7sc*vUtyJv8HZKQ~HHRbz-`3C2Y`FNz~gsd}t%X&_>mp zv19(gHC}Qn{+IrAUUl9Y@;;CIP6vC`7nJ?VsrQ6Sl+V78%zBl#szP+3nLYb39v8uJ z7v@*xx%)f4YqM*knJ3LVV9JSM8ccIc{n16pu)Gy@WgK5x!d9wRMV5)mDc#nldCQQ< zQM_oqiC`m-q#hGPX#D-`ZLI@hIX2Gxf;Dq~^;G1Z)2P7KLdTskR#`W1)0S}0{Q`w< z#_owf*`lgE#Lm0P5uF}y2&vEHe&{i{1ZQwuhsy_tf^Jx8<()bMNbv5F!KcG16=I%s z?E%Ld-^|sFW7vz<5cNY*E{QgjLc|U0~VWzQ27NbFXFmg6h*ihRYtpIyT+TpaZ+Pt%De|l%YtA#;{}3*ct53SA7dp0O=iE^hDO=43?VrRto#Wk?z!iWwHZoe;wR=v5;9U^&GIX zLn845@daf^(yMh*6Q)jM=b7i$OXefgHPkcI5Nc&yu0gXwvqh|DY}@9VrKWzo@G|8_ zg0^)-^=d7js?Ext`}{|6+t5e22L0(x5(@LF`6@bdQra@Mj(LGeuTnlMK06Vx%}w4LmTnhSZ+>H+MHaXNXy#$~*4(DG#)b@e~KaDe4okkK)Y0Nc`2qt@XZ9Kkz zV%p*U+-7`HS_w~Kt8@8Z8`C9Aq!PNMFoz-n6Qik4s29}CrKuq;5VACb4WN)m?5~RfpYkpWgXAUs z5IC=N$cp%c_s+RB-#Kkcng`J5cN@YEY?@!&jS={CrX)R@#x%-w`N20uez zO0T)^v#;~-Dn{b1#aztH(B+bh8-=JV4>fIC*^+2rQkdN=A9N*crmueK*)TPwmaJHq z@EkLC){~JpolX@o`i>mVt38i211Qh#bN8xs*|lf7HkcJ`XDiN}wJl++%N^kxD_{@+ z=x72`ZtVC<${2%-;Y~_nba@JuoT01u5_0Bs_sh4|{M5O!eRhj>^+M3E$mL09`Wt!W z$4gquoUlL^%PYFovD^j0YU}K>_pYOY#~{BzA1GLkq~XH!wL&@6rxpXv9SIjbf=i}R zI^635H5uxpC&~fF_$-W8-N!6Awn=^3{>v`!Jc@saEBuB!$!>RmqsdatofY?;`wsTQ zz~s|br3Qbx4KBWOjm~amCgZ{Sw!Zcd!0Y^9aO!@I#+@6K!*34SC-!T_a~F*%*eKPh*dXQeCBrDd zDORFr#Xi*j6bNYpQV7;N#w(JPjqcECDA>|UQmzw*&U^BQ zmPfXattDwA{`%pqo|(+tju1pk&`K2UgdU}!8(LfVS34|v;DXT1-;|6{-twVi@-!bG z$GBoEku~=#=}MQXA1_Kdl`C49T+WWLS8nb zWOg;2KC}Jf%__{X69KOJ4!ssaEV-F_r=B7sSlYL5+nChsV626($${pY)hn9 zr8z7KrS>mke(nogeL1uqF2l4RU%r&H5p=htON9m%R_H%_XbzPW=JIu|OL^n180(@r zFixW(&;m1Hn4}a9^=2bQhl?O-^4Srei+Hj0DM|Z9+)GfW-oI>RE2f>L8f`Ot@18O$ z=fTtUS(sx;Mv-kT6>xJFy`jQU>>gQEA9Wwx@Hzdf!ebjFSY{M z*s`TEjY=Y2!X9OxmP%8efI;Hm`+DZrU2Pw83gZ0C(C7)X!fiY^VA#W`mlJz=N|U__ zb@h~8x{7np%h48puE#ZJf(Yw1cZIjpuJqPIrF>AxvTTA(;fGu8C>m#lFNxX@4{K2NZAzstNZ}U7)M}u&3lN4 z2$GmB)JpwG<1z_6Kelw*Mh`oA4c(%VZES9-bkYeJU2#ioE@)jICvvQ8u)* zQ0zS;rn$!fh@m`csD&b{8G%IX5bH&j!{dDT)AsLrxqFGR-JqE}??wauwZXI(n?eCx z_NH9xxtEVB+gY-%7fko}41bU^_aAyT_?G4og-jInS|Q{eqhI%n2|(hNjWT9^SV5%Y zfBa^zS4{o5@bN>ra~I@`cTEsCMRf{+G7|Zjm7cm3bz3~s^gD`H+7`Hy49oSWx5Ujp z_b2rBE?|PG|M24qzjB&HGiT)`Et|Kls2c+sZdm5FJLF(?fy;cZKF41Cu26F7UTE1 zKE4haQZT5zkEXu)Z%hzmY#AXXLnT>c={*=A+FIH&H0auV`%?4YZO6o^I%F|rKnO7? z$;J3d^}rCne|Zk3>g1;zve;zZ_uJE6U^*wGyXq!*NYVms9LZba&&&=&6ZhOx_i7Ys ztq6D+V$w0YA~aFGDL*EdUD??A0Naw)egfTG7d{~ZZ#7OYSqFabh>e+0k}^ToYXw7e z^nTqoy&<0E$N{$b#`YC9gNi1pyBotN>T?96K$-Y{KYX4uui?v%^Sr}%hFb8Om{!nN z{x*Hb5Nm_@uu(Z1CQXr{k==GDJ%eb#e!&SIM)&LI-%LwIR`=t$kc&Uizc%} z<@(iO2Bb7=^(wVDvljGYR~t1BGbvKQ(M8(Y+W%QLF!?1sHz4Q$2F0xu1+U|Zd2Q493OI-F^72H2&b)9^0 zt&gC`m=U6)4#Al$LYHZ2BJqwNZoZwSm}GG~JUlzCy`~+XxrddJTCSiJ)qhkv1kLNX zi+q;swXt=gFO9=+GF9zeu}vnRj(M=k*fx|q*=OuSmEoO)j+3NF<<98-IE;(cWIYOn z76rn5b_tba-ouy(?;?q_lg&aOp|968IbqCD;FU8Qv7-Ck6gVlX%MmAAaXoR}w=!2s zQb{G)fM@x$ZGW=lYwB~q?{>tJ^B}Ot#YWo@P3HruWSEpl)SYyC3B(j_lLaCVY0$n6 z_7-3VzN15+hF6d*{6B+pxy{ZY+?nX|p<>wPHGTBe0I_ zvcJQ&b&GPD*B#y4Bjd>);X-rtq5v;@ z!AWAUnv1hI_xWB=C-JU+ENqDZ1*gXw+bOjmmG?<64*zbETdH+xsKi;P-S&Ff(v(L1 z_oPNUuQ!?NkEf6)@OzU-@1A={ZZDZ7!pF-WKI>n)l};SI7024N@Iq6@;ZY#VKq~t; z4Ye(;>uyW+>A}M9NDO*KEy5Kd=9i^ZES_WiZzkmACV&S@<0-5ltDcrtT$Yb5UpZc- zU%ztNH1X58s|VZ`)n_5xNgWvPn@yzU`r8`o^Ad+n;8Hp)V1qCLX2n&?+ ze|E~Q*zO64CLQykD%8iolFS&;mReZxn7kFo%t<`0uhEv4Jry=T)I9OpMi!7wDW@BJ z)hgYfTsk@J47^OpkWG$hX=~Lwt0<#0#$Vsuv?cobg-95v%6Kf=ju*?5YBxs^1k{8Pr(W^* zSNPd)?b^76n2DUe&EBf9%e{LFf~iB{jj$qkP@0hreFN_=?aKOnp9;&mNF-3F zbsb+d#n{YjxvF(BQ>_&h7~xhQI$9jW?S5;@{`_sZasY7}*Wo&|?j7TVGc1eg1<~uI z%0)CYS_3K|&zhPW9;SJO)K!^0Ng#rqb$=RbBJKOcHQbEOMV_4*7Qc84n{|SE98*^)#DvXusx<(YFkO5EH!mM5|2c}m$a=Of8usB#w69x7^*T8p zYM9uv1{}o^cbKyOWG3e2LdD=~If!wQx+!zntY$P+wWD#V0J8$cW7$exqBlT$nohkKfw2;JmI>VjRLA zN|P>~Sh`p{;n?ChK>n`h@SBt;y}Wx~a)d_v2vjA$IF5N)BF+fWeqh*FywM81Z}#fs z%JqgqFT>%Fv!Rs9pw;+>Lz2NE!yRsRwjWEaDW@G{kf(BoL2w)+w%O9fbs9?HXTPA- zKXv#pV4|&+ocW*!_=lyPfDNI|L&v+W2ja~k*!(xfC(ZhO7mG{>%P`9|5b5up`pgxL z%+p|NdKAYd2$(juekb-jGw4%OEi|ZfM#j#kDBM4XKhVP}hy4mQNrnswK40_1X0hH_ zB{pL{mgB?XpoxpPEzu}L#2zU%0^P52{&_BZXGwV-k}MmYC(ctQzFYdHnq z<<>>rGG$NM(@f5N@m|v8&+H4XyBj{>dmv0U+K+vh(p*__K}kxbGqwB!si`mw z$*=F6w(TRk*BT2LPNg3W0rC^wa}>ZjeKPy(UU1Yx;3ZmhXq3M|2Zlfj zr#YWRq0~cBvObgrrcOU{ls>J|d+O-dDgvm_t|f0c8;SO=s=>El?>@64rifxxL|g^y z?wt@q2?bt0Z|>M!~%1vL{F`7&D#F z7WM{GREno}OTjletO>oFl{Xp>yBdc29D-`o7q`>HytQlCQt&JoF$LmBMST+z&%~gI z4G`C>mxtRucGdG`l2e1Rcv|QMO!>F2Hh*Qg!Sn~r`#bqv13&%pR&iB%{^7awMC>tw zivUZmQyLV$)#LI8v7PV8|18a|M}^ReXk#J18cdcImhDK&Gw(n#h7LaZYhUpF`*rZ% zV~}Jro$0rdCe=6vo0`el(PfSDEO$m?k}b&+;sXpuqpG4k^?+(#9@JxE-R|tKBI9j- z{U&ZDK~HgknH?$O9m(RIN#@U6uJi?Ex}p>cT1C0~V1*$rm`n=DlZS>yAsrmtA?C~3 z=qnip#epq`M757AV2P)gvZF7E+y@GD+qTu-ME!R8>^OvtDw)KIT3v*dPrKJuSsM{R z3_i|vSA9Wu*B^Cq!r{$v>MPO&=c|ca$4Z&jNp8a;ds@fIV$sCBm&mvM;%GE7coTa` zh6(uxvHWIe==ck9VzbVDV%Pckdsi*;J{bEV#RkvhCt>X#i5zh@%7?c}#TLT}Clzlj zW>GIRpD}LY%y#YmBF3z^drd&FoBBK^uT&z z6Mh4Mn(*mge968Y9gaX++kb^S$2ugrw# zbcZ$0;h{s4WS}Wd>RJTWOSCUO%v-Q_SNv1MQ2$M>5Pag=?9EY=8$9Hq@ercFr|^hb zJ-2qvFhm?$5X=|zQm#=5s2J+{$7C9`@r-y6{tfJCUVSxqNySl+V_Zh+hAw?V@-5yG zg;PT-+ryREW2JrG3nRI^oALZWr;hA^nYNB&#>WmzF1g~A9KYJ6bmGmP!ea5)Me>S zNOy#0iV%Y~Hp-b#H2nL8ohjzJ5#`-#4v%lnHWA(Z5R6n8{T{Uy2Ybdbtv%I-Am2UU6!`sz+w@A+m zDEYt=#sy8_oDj(AH;XXM!WJM;q~2g1rTtn4nn6Xkt%azY)aAVh!Wys+$kfXdvkT^P z)fUwR!*G9Yg%u&0C+*prvRWH~V_`hMg%mrT*T20V`txGw_n~`hk zaYqVgc#6bsuxoqf+k(zHzHedibM@-iaskM`0f}$EtU`IE7^Tq4gkW)%rKvgXzR+bz z#5n|e1hdsQ(Uf89Y)yuy1|En_OkUekWwT;SxFZ%;#8^2x?FhK`Np}?=sJhzF6<~gE zyO$j|XG1#AbKdXF35mpN`rek2YK|X<5JX}?YS`t2or1JEushYEJ_!)Xh)Qxu5yJc4 zMV@b>XvgPcq0m&6nBZk%XSZ_?#Bxk2itmq}G8S3974M4bdi=k>8yorMQgqjbnpI;s zla6tH0Ee*dsLDoM*BbtiFs4WMvebb`dn zqW@!@b^*ge8tEfzm9=2C>HYPASV*$*vO2}P(vuuLW!#uCvd>>gIBi59C=Q}8>KrrN zHK+WWF8s6;!wyA=upem3iM<-QNQi#-k2kZ|@%vurhQzdEpWN zcT7<5Qw?MGuo>Mew==(rY&5!PuT`E`1xc(Rm^zfC32V@_1t8@qUFP)I0U`}5gk&Pr zNYEwiM!-oLq~b>8a&-#__;{$lmQe56a%8Z*Xha}gfl%xotKrf-|IA9+OvPrR5g5TS%*qOBiEU1sEPce**WJm16u~asVrwTWuoA`$2}pZw*rOewVK6{Dt2K`Wq6g@@>(sk(dmt?^beBW@eg5k3B||2ouj&C?{8xk43Q7FItO7m738%i5sc* zM_~cTAtcSX5t6ZSenc@A!!W3Ab(WW%s*J@}O85;FBxLj&s45bUx-629uP7Qpg5QF# zUOUz{9Y^k>DH|3T+yRhK&v*Q6gcmJJ%xR3Eyf_6$hElAZ4LINL&jn!E4mUiCJXcsJ#<*8 zMPLM(pPtcx?89zU6%x|!J|&GapO1y5ogKZQE`Xnp$LcaTKjW7NqUj1UWp-Xfnpb*q zV!kKLjFJ#lRaxPGGD@Z>ja{y+8L8s-vjseqJ8pDr3_rLfmVQ78^e~GNc7Rfey4%^X z+xyQbR%bLGPnP>)P;L6OM~^7nlPs4&caq*?zTbBZ35|OZWdG^t$ZmHI+&4y&07sq4 z+ooq5{|hSX&GWrSMwtPFRj=2-<_luA>3leZ!XUuT(>*)uG4B)EM#f;Kzz!^8jly7t zBuK_wWNXh2$L7tSxhAJugxvDR%`(P*jMJfO`@waNQsJBRK0WlC0NUVltwSQ_A~CDz zO^mbZy^UcTncK3D4!p0Tm+Cy!>IrQ<{IMxaX_`w`r6>zDuG%9w zGb=$$TUO_*es-%m*45oqIF8XAKSP`}=BKDh4a$u4dYx}}Jv8@0nT318RjAtsHw zY=;=rz6TY_oB3jV_9&+2I<<2q9ArbB$eTU9S{0Pk|9Txy6AydIEDJzBd!*XdC-bGR z4u6j&mJCdxgF?|ADNt>MPTVPJfDYAb{&*DwzV|CyFmX!k5pTv?jkfOZDrer=Y8>(M zvtiiG2r3w>_CTlVZ@d8~_qMb$E)5DuP7AVw_lnRXp<0~#^u*$epEMF(E8N9u=bd)I zY-EOWha*T@erNyeOB4qaLGed_DOQ15Y(ct|>StTok}d8nLu$#8OgMJ2i1EEP=a{AH zr3cL57aF)Hop7~5+wnkW5+Hnk_|$p3tIKLbr1IxJy4Y`YQOht=XLS)t8jveoP;Xhw z{tg^~#)|GnFRMDZ0ewm*TfRB1##CP(MBJ+Akb-<_r+eSz$i80w zY{5azl5v5WQ7~heJ9a{C0hpe$_+<;#TmT>Vr3qzMGW<|494swuY(m6fYOusft=#B* zSqDbBYFo4U;%jB11EC3!CiYLiZSnHv7-Dv9OkdHRTHgZ*7ku5-9F*nGQ>Waq|ZBRuZv9 zFTmdn!n}dl$+?cSp5I+0etC(ut&kmo*MpnW@dQ6Vqdn?sMqX!5PM7&uuWkf|9n;jTHy6mxqv1r_ggrS~!?SJ-Rh@1-|nPucP%o8f;UzmT<(4Gkc-(1Y1!3B=AS({*UMAL~Gq=b&Fu+D-ruIB5=o8U{U)oVz784Uo-Z;#9{%yYFbiK zHJ`#KXZg8mI>zn1Pnrhj(1UO7G!| z&qrBLwMihA;4I2na7d(AG*2oQ#-_B6e}R;R7?7c#CF<8;HlKegr$}uZ7kLUFrT>G_ zS2eH5+!X0GA~&<5n^HV4^<4DI^y|;MUtB6boKd3FAVn+qhY+=w9Qlg#*=%R?(H%s< zVfBm0Bf^Cz9CsOYegb8*^Z{)c>M)EhLDGLf_R&DY88l-E5C<|q3!&N5f!w)+s&^SEg!cj62dr9p_Gu!F!E#Y0#U_dGvf6{K5niqM1Up#_ zOuDxOMJQd#Pq8<*a_Gd6T&*%~tR ziIe>o*b^t%gKje?S^elnYZdECZAvU6sd5xENbq}~{ZklFAk_l0Y!&>YrDGV-;7zsi zy&($r5(;ELC5pRFwi|!8EMau zT+XP5=EP(LcmDdQHx@vR+V~=^vw|`C`|&Yu;`?oNV2NpNlEhx$T;Q?0Nx~r~+nvZ% zIW@)_aAAd7%IgeZ&5v|3P_5P)sNfcQw!#}Zi=TN|=E}19DRgOc^XkpR3NUm;bQoLc z_;nvhB?5cYvjK@LlBPl5$}j2Gq|({zCSt@Ep@RgxZy+>ZQNts0%dW{y}iE=9}_b{IQ(u7?2wlZ$)yp1gA))CDaMO)tGm4uV|;>A3f;Z? zxvqR&%OgWW-A~J4wv`{hqcGiU?Oe^aN~|PHSs=YYVr)izZp2#8&v`}wv2P{R8-`ps z+uT7xH!@I37@WW((PSIbvGmkl0v)8w_ShnOI&IG%eE~+40F}rh z&4+Uq?<*(<(U4zLFHIkXy{q#*;twX z7fd<2{~*e-FtF0FGqAI;1Bh~fC`>F&0Jt0j9U~(R3p+g%04T@AO2fuX&&={4K)HYL zn*Iae^aphI-{GYGFQD8%67$~x<^I+C|3Bd5G#FR`Ibj4ONehpG9Z%!mtT`<_08EaN z{cqqnCc6KG%l#by_wOix%mE;A{|3wb1&{kT4i1m?UoHL(Mfdku{~b*3@8CIhCPo@I zCRP>}Ej$2NPUA1m+h5K8&%S^6@oy*k*U$dFD}TlL%ge^bPD9T^M-OP8jUJDU@oz!? z0h;^Q%YOsV{dW!i75cAy{N?+b_1{A17#ROHME^$!9RtIEAjPy|rL6n#-~%3cK*yZF zqa&u*#~P8_VT^=*6kEgn?q+LHH1HqkZK56T4^bq-oY?go?~Yc!&td5>IsQYT%XI3P zfi1k=L8?YfcaJmlJ=T7<@b_k}XAuKlACC(HQ0S78Kn;#fR5RMsR{Ep?6gtUSm!h8g zgK?bBGLrs@fmI!}Zr8!MT0@N1>NyLGt<|rpq06OuWkWQcSxTdjB}^Cek}Iqul&=}_8(WSqM7oA~ZdMjk#F><>q~$UQP3 z4&k-o{lKC8G>L2@;ex%O+p)HG`Rj_&<+7TGMAmkrpdnKd31rr?@%Gz0^*Mq!0aW#e z#!>px?gx&G70sCmu&7m3jSq`(PIff)K(A5U!A)D3&D`HPS49Ud;p!Okd;e>Bq-X!z zui~%r`2P-{`&XIxU!vy#tjGTwJ@=1M@E?`yzk=}itgUSv|8_ExX4V#fqKOA6%KSF= zh5#6y#-G4+fRZS0WZ;OW!4A0WS?Orl>Dk%Y@R$KtG7~#HfX2zl#`aGi;EjBETwIW} z|LiNDfuos?HJ|}JS|xcg$UlNdX6oo@>%c)vYwKibOKl5a-5J~1ThW-9Ihs1@)0o-N z8kib6n3~xe(K=bt>e(BZ(vtrfq=1K!wc($_%kX!k=l?Xk0r*gs{}|sJT5FL+Eq0z+ zRmCR2G{l!gx@gJA8;f=2pl2>4v%Sj+de5I<8C}B!gcVgLBKMfvdyCs-jBgOWLucX< z#<`q|zg{{oe7^5ue~fRghmjL+eO%oZeZClGv~j*%f^}&PZgOv2RJyr@)31NLTxNaT z<63*?kY1=QwXS7-z9MpK>9-4A)=4S$WMMeZ zOuQ$#-6rAkydP|Ad9)@uY9+P2Ulpkvo+gwaue3>Qqg1ZJ@p``$oz`Aw+3>y%kse;o zVCwL9oCoo4o`7Difnr|L7tF41()v%+B+HJu5F5MZ-%&QuvaG;U>HIuZsdR@PNv0Te zBIYd~?Bewx;&$D$k2+~O=A-rVRP;;=b9#*B7PI88VO}Qcw7usT?eITq_nsD-!iG4I zlY`)ltrSuJc^)J6kmNo8ld7Ec>=l=Xg#@+t-F`4It;TCr!6v&*pztYvg3|a_bpB(E zaG#5*NDDd*f`_R-DAh|<*;R27JY!rT{}IWuW&3k!hO&p{3>d~eX`>^Q&GqH;ME^(! z`?c%yuI)slaJO2E{H>@(v)LUnuPtC!Q{HmZ=qYyVO{3lOF{>iD%26iommd0{HOaPB ziNIN@Qi@?>7=9b^c61otc?_GW|D0-}p2j7_`=zcJ{{7Y?u*~kqOZz9+=#@ovO#se0 z-GQ|^W2sqdssGX%pK9>Ci@8MG-1Ff)Ns8C8Zk#)h#ktW+Q~~rZ5wFUIIvJM9K=%yKo}bUXa7|f- ztc}Q$pT<231J}i0Fk`dvm#i@qW!k#J87AP5Om!*Os_9gQxaz0;J6DAjWYr}AlC-V%xmmsMdN0Np@sR%o}icpC+?9CQ)~1S9KR zz>aqC#VN|26P(&B~$#!rOa* zlx^x!pWU@6eoNG;QR(h#9!C;w@}}h?3kMrgyy8mau+Vr4aE6ac>Nf#Febb*ne z@j7n>V$ktbXIlGYC#6x7_s{qkZAPTiTkfai+X{qJJyMz)Yg)SD#Y&(jzZ8pSa(aiJ z`tdJFMnrs*+Ciz0}ra_ATvtWr52TUXgo-mBx#JS_hxE z819yoXY(nFWc&MD$xR@NjnPXRN9}0ix0`{N*=+U12!Eq2`EM{1^ooVI;BIWsrg;^n ztt!`S0xpANL|K@|R^b)>;-3}tFlAk->sf_kBh2+YNQ@g|1Myxa)a(9f6BWHjn96B# z0yQs=g@x>>nCh6CZ3^@!J`mVtpUEz2k6g61#&h9F^8wr-4KXMf9z>|cz1zfMKeH$*|9okiHr8aZ; zedjeSIVv9e8m2kUZB&I#GY(ee`^<|3&KfG5f1Wrt>)mqSuLM@)b-rV~^hpq9;*@sf z9C^^XBi7nfRBH)IV0Sh&ZM4j@)E~FKB$Yy33`Sq~=&{&U0YO_bgF)LdV@RU3f)93p zeD%{Eg%XDPhBCMy&lgjQVQ>qV<@I(~bio#uJaC-IV6vz)Y$O4*8;j2}W>gb|#wT0K z461`IghkzO=fc{|#xb8`omAtJL8Mq?)>AW9jDkewY}JUR_+W>k7KMBoN#Gn2q`l*aWVak>W$J=try6ytdJ7tZV*%$FCIL$8JQl7xNVi?T zv>48f6m^c_N1*#UbOqrqGxS4(ERF{!gKy<}Scv=<&BPO=q;XkM{W8eH8VxsbJ1|Dy z$~uLyam=}G=wOYWt2)mah6pJHTL4zbWN2Cte~meq57Rl^SuypzwO;F4Vg{s+yd1p8 zG#iYrY5|3=Z^4*O^$0upAr=_ghnxnD5>Ew9Ndj2N+&o;;9c52on&OSfMB2wYD=K8S=6rq3GhZN z4p{k0M|??bp1>X%YaxWudhxt4rAzZoasXfaa?r2}WPG&0?$ZH0_h5gay5n1eP~YOm zESq0AIP76}AsUC>YJh&8b^x2oraW?J_3>@p3D$ep- zr{DhEd{)ux5(33I75~k7Vw1TDLxoug1m19@d54aH)RP^f0kwkZ1w*T_6|V0?OeNP+qP}5wr$&7ZQHhO+qP}nHde2; zd3x{f`%m3_&#Agq?|3sZlZ?#FN+q*0pD~`P`jL~0I%QhJOe3Kl*6ZC2nZ)DMZl?@x z(|ddwL+S_#2ChBc2+Udi2YcQ`zBQFV9{!O2D)PoeO_MWRH zvPX63uXBYADiCjfHwI2p&4!Cu04IF&r%ybpr*T@Ou#hUngs~LAdCegN$YBYkLk8x# z9B#Jh;q_$Hoo@&O)X1aAOgrZh1ZU;b>KrkX8QP;H&m@GfTFkEhzWvRz12n|PfOg(%oz2-`0hHY*B`yScIBZ>yY zSPAfFf&88*up#1CwN*-bH5(JxK{MvX1eyEy@yOzeQr>6e-d@Jo(J4V{?8c)N{65XM zM|F^nmDUx}Ycxj0`Oosx@HDR>w~K;Hpof zE6d5`K!O_QBm`Z_Ck^55_GI$naUPK}rD-P#(un4CL5~`_i`o#_4*(g)cj?E1b3c+c z9t`GZzkq;P1+8GaHespidHyIZ_jTh`qS5Vld@3G zeqzd06^*G`Tf8hk!7vi|c+G@Iaux*+nRu%Y<)D#K_mh<#2@G0jYe9fVa{1B5-Qwn$ z@T}INz?HUAi}w$r`17JrE3BHU^T0Nm1Mtnhp%PniYW$##8i45Ia6O@t7~hi!Qj0aL z>&sCN`%yG=?_ne3Di?yrRnAd{DwqXME0_%!aY!Cuz#+K?1qOaD`J1w*32G(F8t5fo zF=z#7C+DzO&F@)Fz*@`KNZ5JjE4*sbq!sjobV;;`GP9_a zV!g*Q4Y;SU;pZ#g;|j;XOX^YL#eqa6S&-uU_PEU}MBai`Z`25fjv~P^lZ!}>?KiCIUO-z{l6lsSBr>)9&8y4o zT75f6bV1$SNwX8{l%41<`>Y@9(xqUhvLn!?+8lACmu#-O)UpCJy$Tc4sP*JZX2LQB{6EWn#7`Fv`)PHF zln7+$g3aYWsS_jU0ErU8gAr6vwzNM(KMDkQy5MjJ-E;6ETqEUJ@L@F=1AV(4j5S!` zGFptl&!S(GNNwd1tY8eHrY{p6|B9tCwyHhgyhsa<@w(xuJ&N*|Pu<6Ao&NgcYOOM; zFk`8^w|eq#W|NQ={tW5#K1=3kCN;m~+b}Al+qF}Qz4xn|hjah#^h(C+?vm%-2C>Y? zI$NZA%(p#-V6HQn=d;@TqolwSwr?wPaCD-e=<%+tuJA$mML~ z2W2ZK+(jOxj9?S7@~EDt%+kZP&e`wbP&-qj9;>#BY^kn9=rGuu-AA>9-UDp>)?Tm2 zzbm1hJGS2%v`6Ip*~M8>n%ysul5+|)`=fFt@;TA9iqs_@3326|N;3~QK>S?z_?Y+I0=9#*f7ENab13lo_s z*Ekifvq4ZgfJx8JYIh_IYc2@4^Cg6sDMp17!yH`eKyZ1uUZr~d<8^wTH7dcTRzJ`r zU6u8&#e0fL;RoWEd+fR}4o9&M4d|#xcn`5Qzo$Q&(B>9RP9MM51yrvTcra<<(giD7 zin|joCEKwzIlvxDVWU5Zarmr3%Lw?ssiQ0P%@zxbx+8mi|$cmOItA zAGXEtKURi?$8*Utbt1!RcJu+MC^}vuam9=eS{7ywuFtUp|Lx-dfd@ZtjNZ29iV|bA?&44Nk8> z4IG{W<{X~`>VAZw-BaMK-E+RKnPUGLy>ssXDo_j)gD!UBi8OqtqH-?*q&0`w`I3C} zfd&!oQ^TQ4e6M-6gCARfik3ClMhdB?n+C=HKA?^%HJTxQGNl{6-6|;iN0#*}ky=S1 zclF{O+DP_4*M0#YzBf1aWyH}t8}mK1^)4+NumZm-u2$`-$KBi&)0zFkpniaz+K7~9 zjYES;B4AqQ{}Q<{kD5S7C;52u0*Lnch?DUX2}6uofD`is9qp})L<~PE1yHGC32sT? z)LkW|Q)l$4y$-D2NcTd;VN1XU30HCy=(OX$JQeKnPt)6!PrII)`AEU6wS48at-In{ zr6`FEX6IEmyKnRD-p%Y^HknazD8#>SHkRhrvgSeC<=dL@Ni%e`=HRxlL9sHU!Q4}e z6n)Q9UA+y?7kf3TtyS5RL@#<-;%U^!>#9oPA()HCafMh6cHxO)LlMXA^7u*~CsJ ze>O2tfEq;(q!8FnkS4ZZ#BZ9f^`x-n>=A8V{=t z8VGy z1SBU1r9na>nq)mEJEZ|RIjOXRqM)3t*=EFvJWA!np4DN8xhFR~j&&d#Ug=&|~N*c*$lDiquD{xh_F`aZopcFP1y*~n&b z$}2sQ@!(X&&hmU%?QD}L<^6CH`m-y|#{0uPpTnCP-dI!Izd_)H=li!+EM0}0e>U02VKUZO(KV{>a80I++dvigRQHy zp$vggQOYZRG3GLqAaRo+dp#uFCEnOhLchcG0DUgr=BU1}j146x_fv&r2hY!#G%BVs zQ>{c{lBGhy7KUn+X%{u}GEJ{n{1)c0)2xge=syDvB?qru)92zYR<&9n%JHOLJ4cqA z0igv`oto);ImmccLzITkqbfn%A}hh(av>vIlPY15!kKbXx8R-<=(>bY!3rp-UQ=$r zt<56+u1MR{LrwgkCLiymB70FAM)^`v=pnr98->bupwpjrB5}r@x z2R6?PoA>-)x+(W=k@wunW5e!k`ng!7+i5BOiIgp^`Iz{twbh+~&L4uH`(lBQCD$Mk zo?ybe(zZW1O0OZCXZU~t-z+x-ez3?ebp^WeePB;(ai&XPl1OWN;+SH6K-g=z#EX4k zl6Y%-CsygWPE{_o)h$gcgvdjakzV{9ktLTZbfSUNT1((u4eAR!=OShD{E_bY6zGK7 zio59Z`~m`tMwbzys%8|Br$xcARX{hOZU(@WAR9H~E4;*I2EcMQYy7Vx+JSN|Ykg>v zw!hh!Qg%>`KzK;(&ep6z?6uQi5b?^^eZCfC!mmp%=T#>7HAyUEy1__OiHyxG8 zu@yl6PAhx_QDJFnW4?25q>K(8znPA9snd8Ew`Q5rb!9}ql=Kpr*0@<~CjbbLVY|^? zu*lb3sH}w0^_x`OEU6pMq;yL(u~McZBx#u83KF>VUU# z1nrJdCZl>2g6zpqp|*QAvN+!hEn7$;V3EH(Fwg)NR3^2)605zWT@aDu7WOg+iW*jA zVLIZ3iMq#teAgEYTw3%tZXXL;GCVW0s>5)jz0E& zXn#%~76XqBA_iqEE)3Q?9VrY^xK1qY{PgAQP|@nA-TToz1CLV20q2Tkvc@e(UBFuK%#Y`q_HJ7=d>Pncc}no6ba)3=D27k=uj$uax9@=zh*#ZVjvDwo9HK(a%f!rnumTM*^>*Rf%=3?hE#(-!k^T zA-Czq0^Z$qmUrVKGE-qP8@%hxR1)S-5zcn`U77 zM_iM%@vdHHgGuY(<&!iy1EKCp*xk18a*fIYr`|KK`dmTk>INcD>>G3~j|<^#jLrah z48$1yVd27!L+~VzBjsw4xw?Gd7ZX@Cxt!SPBJW-y=py$&wM>Ie+G*r;N${I&ttS5q z5_g5vzN+e&3j+NtvDZGa&VP&98=}~GZ@pNIE4c$NjEUYSyE15|w2@A+M%JWEjeEAD zgaar=#jcw2VW-V892lS)QP9hgqW6$zf*X7$Tk<&cr#y!d&=Y4pro<&oR%%?Ug}6sH zHnL!o{3uE8Bs_TjmBuSay-S1rlbSBZr>?l_T?`xk+pO>azgqgkCU1Z?I=Oro7G*1e zpA?T=edrJb%0?pZ1m7BItHIzB&zg6OSns6XR0QrtmpICdda@ z8g#c9PIh|2$ZqMMDbQV*eCow4ZzlzWdTll=fe%XzxYoT$YtOkk$f4=JCI(#W*re+i zvqC*H|CayTmtE`++vym5p@91`hh{oKOtsjLhgZQXefb_gBDt?sz{oy2NvF}@Y5R`~ z+oogNGwfk8AqGe=o{f|X*T0!_j~Ps#mlj+;qqT9lJGZG>L2qR`__@~pS~O%=65}9a zv}lcJBl-eseMDF^c$v+6V3SiOwA1|wP2rjj4uP}R@T_(?rsJ73WEQXEu)J&q@2ynsh5#9(S`c%HJ2q>a(^|*`1Uo|j3U_3aWG;60RRwvJOfEXM zoirxZz6Ju8#V{@!(t65{?z_gnyg#Rnw~T)YoY1hzm+UdOCH_J&i8G&sP0A&+vU_$b zn`T(Td0INQH~8DwH`q1XpaKGhVf4nxia*6^202B6hCxHakD*Rsg%MPhR#0Xab7HDR z8?s8LCw}kg!D%{#^ligMbHa`j3J^R`d3wk!Z|L-ylo~kyc&Hx})|!h$Otj-OHidZG zvS>CF){3u9jG@DIcoOCIuE8F-uzpyC(=`?4KMCmI?+k>v{{(2fp99d{uM3R&8xqj; zw?@Due|w;(!pxL_^+?TS_9Er!3A4OIhtELdBzXBB(|#O6TRvtJyt@RW|vm;X1B03!_!QYD041PyNuQ$MkIUvCwTC@dTX%GG~|Ey!^a#Mi&)Z zpEWGw+RZ0;ifiiF7GDdFjcs@>Vz$m|1=b&7>-_sh!aU*N&4qPrlQeB(nKXR`<${`N z*x0G3PyB1bgiRH=Wt0|(`nV-f1lze0+X(1zXl(jQW`^NIom^yo2WPbQZST?l%rrO7 z`*k=Tv-U))1bSx8ZO4)4Cgl{IbJinvn<)P4bpUSh&B)i!IS}#mx;&yKn-_j)>&bD7 zKG41i*0CM`tOvG>1t8xa))5;p00R3Y1Q-N|_2vWwguEs9pog4#!)NO~r^*c2HkKd9 zdX(@ELu?a)Af|=z%AQ&K1S5KK-_E8oL5R-`4?KJh5sso&*6{`s=zsxLc-;QsXVRPg z&!o3+(kach1?9jL+w=)|`}x;5#<70Szx2eh4qQGk!>)=dw60@}X|ePAC?TdkG?O~T zIQnvoEPM|}6&oDH5wk_j2h_wA6S|+TszwtFRJW^B#}u<27!f!#!kMPZDty)WG1P+H z2=_UxG!ZK1jwZD@vd>cfeQ=lJ^o;8R*W!Hj{6!$~25@k-)m zfml+Qbwuebb3s!}KEe1CVUfv)hgi28F-zwa8Hh~h5~>Rif=FViCOK|lQ5Eb%!I9!a zGJgW4jguDcSK~4By{hP1@nAJ)2mmYg=R1s>xh1l|36O?{u&|HbRZ3S?&8Et-{&v}I zd@_&qUJkv@ViKd105#$k%L_Y&P(I)=4Tw60K)J>7k02*hcS8aSCMT4?B>~CJDKeN$ zWOpn|=sPwp(T2f(P$kCZYl;bld8ERu3ohh3lRZDsogI)!Uv)H7;Gnb z1@~XDWM>%+&_DliH!~2(yBh)SAFyPfs<{}*gdILNJe}^%Q zJ_asKAcX|RD25BnW%wJuui5vTgn}rg8L!QR|8dOj?`A8%7HpIP@Jb5at~QSdqgY zh7>YTnvqY9@VV2r_^?#w;QcY6ZQwq*H8G z-n#9C`mP@RxS`>{((!-M?{CR{p#5@Wz(DIdpKQCHK*F33X{@+)O|Ari`^qF z&s3nJ{Qn3nZmA(tg`PgO#DocoD)2~Z(lmt`SDKR|TOmIggS@&2Lz(;n1Aqp#$owwO zcsMf+zZ#mGPdg-oMkTqgg1bajyx|hE zZV&u*@OTi!tvS4KdhLkZx2(Otv;`-z)6hjT1d}y!QFc0<_w6k|11Ho5fW3LYd;#{t z`-T5c+|vIE6_PhF{b8e&F*Y(c5VUps4=#v>B9Sn^f z{{;fcJJ=d38UH|s=;eh)3FwuL-JA&MC9Hp}3H~<~`fn=n10E7_a}rZ>`k}x4x2@O@ zQR_drCMbF_76R6PwI3J|y}I0Qi+|8a|KN<&Sqc6(Kb z;z9t3!T}D3;{1RH3SoQgRBrYls9mjCn<}n6Xt(NxXFz`hOm=J^ zr3H~bXWzNMPrY5q?$3Yx1#>Rmc6KWu2OtRX{6w~15+f&TcsiK^5uOD99E}r? z$k1+b(!o6z&z--mmriST*xy5z5*RHL4dG;T+s&8v7{M>$iXkehWOS1A<=+@C%A9mKlA&*SliDK)z&O~(o3i~-CG z7{c^Nk7_a4u2;p*=NhwdMr&%vkQ+N+240ZI?WBt7gyiRJS>6|sut2ZNYY-I zZu8;epz(x;x9Oe-c?q7d$QQ)miKPopz<0U2!r=u>?`mvH&@ntu5fQeKSXe|It;R&Y zcePE#lunQlsvvZoo{>TKQIt_mls$9$go`1p|DpIdhBSjH-7;GU&zYDtnt42Dra#BL zv1gpF05Br}Ry^Vyh#N|JJmg#fLFkkpcY~3yKtO=%5a0#^yczfhCPy5=nXoE9dV{gA zAdv$=2kHX>c^>+W*pUz&KOYhxFcerk`8z&}B12S{AL7v@o`3?VA(Z48JcgM6rGavu zJ|Pq!82~(B@Sqb!w6bV0Likwft!ZM6HyksC&0H4s10>(a3WjG38pU9AWsJ{I&q&kUy#4@VQXwd?T zK7}%{8+K)AcB~t0C+-ShoWKx(7|;)NPQYd07^NFwW)wSaiz%Pz4Ad+?qrSvBhQ36= zUP0t}yFLjhSyAFfy#mTJ_P%l`S)oF}(!#?=y*x~)oPZI477BLc=xIFu>NAi&R%SRm zG|pe|92wCgz&RCr=4F_6a2aviu_sjQ@Yx`49Rc_ALzjH>K+KRga!_=_iH*7WOmirG zOsLvHB|vmwA1KX*=6wdnX zr6%A0bi$>8xoa;b=fL zf~Ej9U>^X^c}#$-6mF!NAa1CdS)bS)Sk1sSBBp>fLQ(*=fL{1IktsmBrF)NOmzSPr zU`}v*(NH@7S4wuk9XK~Wp!oc1M!UlB1*ks+u#$Z;W-3pxO_1A0b29R>#OsuO=xzV0bFw(mwNMtP`oiUfR}=+K)ir2SR3Irz+1sK0A5Jj zN#3YD!8TxCSld8tTKzm{E0@$~n4q~Lt$@6tHsD*4S7SX99?qOQO_0axQaVY(_eEKc})dh=j?tAKj^?{lAiwiGX99t7{`4`?0;H`buL0@#4N zBAJb|h0iEn_&gvlY@mGn@TSiN@bkoe_>@1-o%9{&4SWOY<<|z-3*-je3*|<>Oqxj=lBAJh>TRB)*8*Niid!XjS-l0`q12>uJQ2VH~ z!{MdyC&?8KOT9{|R!LWsWucthRz2=r$wCQ^e)3a>1is>E$l=(J?9p>P(W3;%#@jUA zVa;%XAkc(JktNW*-!6$(a(^E`29qAx?@TmerDI8+B-^#q$Y#78+)A zA}g%dDOMx!ZWmZ4m=4ZK^VmaWCHb)?xL)r?hMm)c1tIr=y1{FaUa$N?h;eS~7c(gn z<))fC-C3OkKHjf4EJDuTEW5P?&>lt$wjBm4&j?Tx+eYJMuIu~7FlD#RwCFa07{Y&k8@%UNsQPD)Rq)9b0NM&Ri1 zU%mEnop_ETmc}|LpRDXrVN9|aJ?F9C4&9oKz8|en6rjvn&d~@lF)!VcH}E+{xfmp@ zvYILWo;wVr@2^Fda=kjQK@;3vAaNgy`)2|0stJwkt^wlEpHS#4{W2KNY4;iob(DM{SkQ9iG2~ ze=7WZvikx)vs65H{7?Rrz4#m8P4n)Pws-EX?~A+k0iRzla^j}*6I9@w&#%YCxu*Bk z^k-DN7R8^*nGeySO4!NwTeJV%>U7CJm36HZXYTnHe;T`RjXXf8(EdgVFJ!6-VVA&I zx{}|R9{W|sQ=G&>0%w6=p5%UXWl25}*fbzktU}mK<%j~y=}JZm4C`DmHETBasoFOR zfT-p*#{#dUm{Fd6`D*^NP;7^VVpMwQbCn?51Y=Yh$iJIWY!d7wfct=#{83@m4UOt3 z{KkC1b)!$(M$pP;uFGae!CJ~M2fh|LWAd;DGy3)6U^I81XnKD-1w2FfYx;2J3$HC$w#S}y+* zActb;%{s0xTw>ZSlZ3I%hOpaU4q3Sttlls$@Vl6*4W^Y0V5A6q+(OAVgjoYmx*$FD z;QTHpCs=XA^?I8Xz@lvfpdYo}Z&fKXwKcJQdbzy3B#J9RCKT0$GxcT<35`FWayl_M z>CW*r;T?b5-$5qq;D-M_){HQ29fGlMdnR;~@@PbqKExfxjW914+V+f<*2rZ*rYDGR zNL$nAtUf}0BXoq5a=s3|)gM5u30=>X{b@;1(1}jeNQ-cI88~*tb92R%)=wmRAn}6Y zh1dh67hOAweIxXO_(5Mlbj<|g2>Fiwq?hj6_;y*n9(~h|7w1nv1v0V3f9VS*%&Rwe zPihCncEBc)P=qms<;j?ScWJ+Fynag95S7RNV9igwmp&@c#D`sQG)chu4z2x;H6#r_ z=c}KBQ8fxQC4wM!Bk^M7#Ts>B@PT_p2$!b^t0CT!(3(zikHr=2U1aJxlCz%iN|!io zGvi{C8|W6Z&bZvJ59sEvH@$Fln~OrAzh zo4@XKN=caUuSzB|C+Sn2>9Y+Xmsgjkd9afDQHyij7>6P^AJlWp2(`9B@jcM>2j~d* z-thBV25Hu~E`wpfP}>>$TZj5bN;k~h=sTr{pbX!WwOl+ z8zW5= zEg-#~e2Gpq&;{vH2Z(%P%#G`MXma4UjwM(lidg2@h8;5+2=WEX{td|ux?GpbpqB9K zNXSeptY&bwkLgMfdYsM+ey$ko=$2+H%GOkJez*zlR%{itS>=i%dR^W4<+Bi!Y)T}`cFVzzYf>#qZ z-$ayX?1A1|>RM{w{3oc%0(e&CFr(dAcOEgBzflMVWLpW?)-lSBFSJ=7GJ+i3A@sN) zGyd+BS1?>MZqSD`>>HJ}DoG;bdqH?o|5qY+K!wCqo)CbXx*Dr9VX zi0*h$$jQsTNA?WZgQqG$IRLoa@|`tD=+2Pt0G`aZ_;o#g%NqXG0J$=BInAC3hD@{zvso-QD9!Ybz`-h{^8nH+2e>@H)1|>){NF1 zW&|l*8XGHX(Jx(E8JCQoFI;TGO9zE*d}C>H2Fo{J>f_DsXD!yU)0e~an896Ant4om z_xMex9(%D^zBeXbci)T{uaBO?Ye1D$i-nkuc6q5fahP<+S!@;HKmmddBGw^`k9av` z-5;M_IK$CxXtW8@wp|G3tyE+l!<#J_djTuY%wN8UsqsPK0yiw_&n~vYBN?{>5_sVx zCK`2#LQH%H!I{1`rcvt5DwoFT5JZlWks|ASP@+WK$n_J=zLd1wNkC>|)u|$rlVxHR z#JTH??=e$gbGu{klFCE5o(H|QF7{=7@S_m4WN4IQ(L&iZ#% z=sCuD27b|UOiXhB%p-Ei)6de(ZjH4CTtix~V2xY2S6Le*f#d0b&=alw%i4mx2dIZp zJU56}CF;Bl#vBUPI<^c7S@uz1*}uxDl?3la}F3v`fjAn<=S2X7+t|+tkI|=;C{?{D`Q^xglae1_PWX38zU<&_Lr*Sh@WzJN&w2Vsdd8=7f5_IxX=LA*{6S-^5cM=a1_v`eY$xWiZ z@lDj;jh*u3w=bHkLC(8}4%y3>z(q%g)6pCpOfG}BrM3E3GaT8)P{HrP$c_f^ zbCrqxHRD$Umlaa*l~9;6c#NF-K!3nSBup-Q53x|6zIKH?e@;$Ok$^(Z4NenhGZl*W@ct@7R4$Ly_-R^9J{VVUyRe&4E_v#p=~f zNvm(CtP{6o6&lH_aJ(7MEZdyktzJ?)_nWG^UkyYao>q#NBWvIZ$UDo5&Rq?Dv}-Et zeEBlmDP5e+RL<<(O>6Spl}GCfr;|0*wzX*r=T(}@*3~}kCQ{qQkNF|{p)KFxwNh;!}jS zwP)i~u7tK355x2wa08 z*ONaJn(KQBfQ92E>Q-gk+PI%Y5Gw~?T@D!iA~Q zZ`ftG$dMF`LX_1^LRHW=E7PlrHBGBp`W#JyEu7K61W!a?LMxy{R+P0A*^_ZKbyh^a zK3^bksaUf*){}*!qtmz+wig$=b2oFT32Hh^Gkt^1WN(jP~FtPJyy2;?m&@D=?mD*>^jLQ(Tdm;q|*QS=i5 z`zjjH3CO|t$3LK-(dgPiV*fg2aknsm-BJGu@%+;TSG%soC!M+-i`BSGfEk11Wwrjv z(p_s_)(yHzfk;JNF)@jg0Y!^0;AkB;YM(egQPw%AZRww&)3PJNdL1MeD zfU!Q9qJJ2Jm|~5~z=*KG2F(`R1be1Vj)@wc>)uDpDkQYcb!-fQa`+#DC=$b3(q$WS z5WSaQZTI6&^_4RvgD{ozTGN|b;^HKSXgyG|h0dLr(VB;U&r^sSl3YBlb?L^A{=Mxe zRP8ruhT^PdrMh7i*jwDA^;9YAgXL|IHC_>o&y#ATSQ%z$=(7yM)TCVy9(4~GP#TMx z)_GA~FG%J&49Ww0Yv4oGUkb)H8hi;50WIRE@z|G8LytKbua@sD-Jx~Zwn1OrUXYQZ zOOy35+uBvvf@Z1+qxr0(j!Za-Z0n|;7O5$EQUgVU5SLHc9*iOG@bs)N~v)wXlg(m9#bzeQ!NdrdRhz1U1 z<4SOU&fGkvg|lI<$0-wV_I^Q~OOckPC%d{q+f`Pwe(GEnZmmBGh&&x9HH_&GAgH+s zyan?FSZy34Tl(k|WMY=htNv>2W?-dLj}Ro`yAnMJn<3Mn|eC+r%fw9y$YT^C2b=A2}q5y@k7vL}>+YxhX}Xg>Bl-_KjD+-SgVmbA?>z#{xwjxs#KS8w!0ADizd1C; z94g|aBUYH@%1UlNUotw7&%uM<9NSh?sWK|5M&NCc!+0B*-hqENgtnA42j>;}@`J7m z{T!&nJM@j_e9ju`HqKPBBxbMU3)p_wEt|?NQX{S7ABpErSi+?Z4q$5bs_~1k*DwYX zpU4NsS;#|DC68|du)Z#jN*2PJ)E`}CtHVx^IE&bf={NU907`VCo>U)OI=+EOFFPp? zNzlzxate2vA*)!_j-K9n0^zCRra~17QWDl%1S;4rVK$3KD-@d)G2kaF%w43|E8-?9 zWYDJA4kI?Gw4ge2Mpb3z5G6E6YHf<1q1Yj8G6Q#$%T=ED2r+K$NgwQ?C)_@F!mdV6l z3&o7YGYaplc-C0-sq3`1SeLD2#75VzXG~g(0Z|J4)dw=Nj|+*+wI)E`H8~k1c`_+= zvc-AQK(s3!i7aVIPkR@;hl8An^jqMsy;`-cWCxUmm|lC1SKE(2Q8qeUIgHLGgZnt| z)V#yX#@qPhjCVC5ktk#CrTf8FFKf^+1>E0!oGyHv0s3|P{sit0l{t@&2EGY2-RLIH z*h_P?44$f)hD0l2QLoIZ!zfYc=O$Sxvq&gSkSayQk0#dK@Hq&)P1!rVgYmA>c*#9TXKX!2!0Xe}DE)XU?&F3@)y3`GPUk(w-OQBMAoa+hW z%J1n-OXS-yOt*Mrib$UyAYqeyM@i(Gzcw8F-9@}a`XdJ3p|9w-jJI;;(m}cl7t|B= zp@|`V7to&3g`-%3je!X(cRnfg5VB4QqvbQR8#Be>zhRGIQUuqYqq1L(5mMO#C@VR!4J`dV z?XdR=k+%uqzv=QX+jAHSNZ>h2h-Vp?T*IszR}TX^0zFOm2^|kfzZA2XxSXGbZvvi; zT8$@3h3YF^IJ22v(FLk#8CMdjEwFqu-}>t<-~0DoJYR0Rgz}##oa?Obp(-xkM3byU zci+|EG*iex2{u~l zz$WMq3ho*jqcH?jJgETNvh|uYrI(^5x5#F%m$zm0*DF2~~z7g?;PzCBt>xMq2dc#hv#nTO?qQ z^*?Jj2${=>VO4b2NdEjqK=QD}bk(_)&GSpuzH1YxqE#!G*}WW^bacwI;ZpH=f6g7l z^()68olgrwDm3L&E?<>J%^#RrYC2uYZ!KWNYTQs)sUjj$I@KDPmy{^E>X7EKlMV;+ zab?t4T!4$W;Bq;N>Rvhx^S6a@iocU>R4S)bzBvBEiO2Y}01f9#`_V9VaKyf84X^k9 zQ8lXhVWWVv?Xz8tF5AvJd<(Y2a{Qrn?cvP2u3c~VB%_z5H~^V7*>H3_Y`B^&T@2zn zmDXOWz64%c~zM0BywC@$qHjssD9JMTtW($z#bhtq0Rk4C&WYdtEaWKK0fg2X__DS}2-EDeygocOx2$>```fVfJ(@^HHzbiah%nf|=+b z7I!`RRbYDT#)|zJS2!EK=P6|4@!{K*%og3&)34)H9W-WvxnCg_2u~YRS^RtWT)H3i zjH)dS{O8 zc2VEf+%kOv7Bc8SU%`w*3slnTKXZA>#yh4DP*^aIz$D^ggA8ER zJE7O~r#^64(jJzbpP2))wbo-_f)_vfNFMK~la`kJF4qrhc0k)9QpaeXH)23^j*uB+ zH-mNE4>jUSc-Si*E&$auldf1`gwp_ehyomyw#P)ZIAEOUG}G=rC{*ZPsaeAwhM&;L zA>kdNf-3b}&+ke&%@)U4x8B3RHN@?@8G?0Gz4UzZXUeItu%OZSo(V>_)P~z3L1E=i zU8j|NrqlFVedA~>Sw;Snz{J;cJ(8! z#m+N{3Cksb^vm6@Q;D3j=lm4o8o#uSIXdD1u=`NCC>#n|*jtkO49lp+-k5?7FYPAlaYs{1DpcpRMn(mOFO6b>Y-M1D^^Y9ZgLk-H{ve#u7JxQS1eaDy~WE$il+0HwZ~xu0OT>f4o2$=dSHy+*0cdg=8u-;3mbR(iGQ`N6QpkxYy<9?WoTB*Dexba(9?B#I)5GpVP9~r2e^27*t?@L_fC*jqM~lY zJ{K;qfvCv6f)llaYR7>uGn9(@VBy!Ds@kv4Q0q*N4E|>2}QP4({lY zu6rG}pDI;t6OT#eG{$Kd8si}g+7&fS*Dn~%T8WzLpt<(=TA^$|p_>y?E*+3C=Q z=YoLo;_T|abl>(d7#cGxL$k#Bcr4$KN!)_gwlAA0{3C7*9U3CQgHJItDrE7=ajtm@ zS*TzQiVK&wGc07k)9OeRh~lXRf{Grs(c9%*(pECA7~^AQ)|AIGrE#to?*)tEau}r) z-31e%kbA_5iVc&5+;-#^_VP;#hgP(UNZ72;*3OG#Q)93qFhk>!H< zt;(#V#PQY(EQPsS+<QS#@_I{KxRp1AEZ$h<&)f zadVF~@ZM~w@!IE>li__g{in^i{}%u~K*GP5EA}XHF!fuN#J{rK0tRHIN^x3O7P*ou zF9P3H+ZPjm-_l+TF>=3#|D~#OwFZn7{p1o~%pkWH=Yx$99(00XA`J8Ap7-1DRx)pY zp*RdL`B90wAHcT`Q<`6(?(zETz6^YdS7u)8b&Hv=X`b$vXZzgbmE_c(JLn446yTw0 zz(ZaXM`d`f{M44j=Hy@W&l}#;tJWqul6M4ei`|ucB&PmzbXjak^6d0l{aV|a=-QZe z5;uoireDl0<`)Z#t(q~xaiQa*W0Nb)sxr%vU|py#)|eQQ9BDa@)9Q-Fpf}`+c@m!D zh$WHKp3glQeW92c6+Aw6PH;uAqvVF*hTx8%Hl>BYCW(;GLA0tQ#y)LH(9A>%%w@s2 zuTXNtC9U7*FD)x`Xo*7`iCK&RW3jQ(INsQ5Tx8T3yYOXlVLFC*jwcp=9lwX)$A7{f zd1)IiMvZ7Z zVpI;hW3qFO?KH>yqQ$l)j>WF+PJOkvs$`5~Ow|nMjLHSh(<`s=-cqbDFSP_cVT>59 z+2O1%3r74Fh*1SYWP4JGRU6i@{#de_VM$VFmb7glNpjbDBuiq zxNd55dV1*eEBVdb>?=kmzsdvAeXSB7p|PEYlgD;OCrk%V!V7*AZ$s2M@@2o-;cz&; zE=TVQ8Fe^7(tC3)dDl0txVQ8TO-Qj6c~61blOm?FvO<6s=6yPkPAl&us>w^QpEX&Q zhR3~_+rDsfGjA6h$&+52KV#z>T~ zYi6t6!8?mjX^D77Z@y;A<_j^i2K4uxAbaP4?D;^|8RgK``qhS2!fNYk+m-gUfwjSo z&{gq{!nFybp#aB&g9lh)~@`qtnsL~gea`J7rp>y@fPB?;!!@drz3tXiAoj=wpfA|VsRIx{C*q+Y7-=;ci~#BJr=bb69#IqKnN6|{`4Ou z3PBbsf(gCdY%y7k7K4RVOR;#YAXXS-)mFhK5OpY)&_|1K&>ktmF-x)thlM~~91>EnuI_>NOl;NAsWipCfE&bs2%OEdMfrO!l7WYo}>o%=acN`MwNIFO~S-K%&kV-iYnspb@uqVt`KMk5GITv$S$pocVj)_e9T zeu&C*5+CF+;+AvkxPu(aiIqp5pmNk_Qeg7AJUwVijE1K@^~Y#2c=l0$Dzy9t5pc`k zJba!6)qhNb+j9x}jHj0d7K5L;gHC+UMFWX2z+W)wf13nAgXLg3t^mtXk0rV0%HXX* zQp`1S<2mMd+H6*m zh_O2V+@hkiA7kVm8ka2EfR<>*hLwv3nH6O_4X31G6n#d$z5U0`OKpB7SVCFlPON_8&r5ersKV&e6E2;S zBNe{h@8)cHYv$(4s^)cDSKr!!RUL~;Z5Frx>450;OXvhEdE-d109ONvUD#&&0;y`k&&o#OZpS0V+Z?-#*<7e#FeUR5f;*^q{+ti{k|Ccj81lJOWl9q& z#>Iu@#l>aizEu5i+QeBJ1C69H+0@uLyvbLeiz5u`WIl|@1rY{EVLpaP#+3V53UEO( zT2K&+`jSH`X;Txb!8OT>nwrWA-;hYyk1*DWWl}1Y3`*{pluYJghWa5x^bk;#`=b^9 zXp`&>RNU3HrHQO<`nZWSb&*}NXQbc{g?N7nk;yv3j3@gDv5;1>h%n?yvI~tsWAM9l zW%^JHNG^5$K#Y_1O58>zww^``icd(9&%20&S>-otzhC*Is|Mdg(Ev*Fq!>((&SGnH z$NgYWWJoh;SAYTE`1<-qPx|l6eMT|jH&=#~8 zdyD-;RprJKTZz5V+vq=0)nt@yvVE*~yl=eUuCpkdW2{n^Nr96BO5Iz9yxsuvi8)`$ z0GdDN3%LYZkK3zwyItUYu7D&8lIS8t(pn^)PD_JOemsXcF?i+2u09`#QXPm*sowoR zA?0sT>sRZhp?;1(-D@#u?er7H$-iF7!w)?+S;r=mYTwPEeYe28N$3ap!i$+@)(dQ_ z$(77nYlrPehgL@nHiMnHmE57(r1^sT-1fOc&2n?O$GFFAY?)RHMk*n|3W@>mhc1^d zps@%B0~-tw0ko;hNmZ$A;v11{k*9t@P)ihojG_%Z>{dcxLzK|L=Jnp73CmmlsBl9?ASTZ*^xjpV% zKACbVu2R_dhvSYb@LxTF9O#>7jHZD`yai@?I5}Q!aiv{V?qSjL%JS-}<3clr%?m9Y zc5djxVI6YEuv_HYhHV+PYuGF0Rtu^sA6Y)7g0+N`Rii3~RZcG5+xVQkXPDL#_LR;K z&o8~cVoQ2s)tBL)(mz${%Z4LV+RM$!0o-gxUhFLo0z(IVVxmMz*aXw-(xfDf)9H1k z>2yh{FHwqeylzG+tSTSC?gnspa_n9hq4j3TA_b%piII|FYHxgn;n1)Oxr%KZ9xg=! z@`u8N4`pTjt-Hjq5*k4)tnbJV-5Lx>3d1TO(2&PrglA2VH;6p~h{r6@oR0;^9xb+sp(S_7cU)lP+5zf|9XOYc_0B(K>|W(pIT=$vp zfS-&)V`}!GedsOxzV{8^5p)C}@#$kI?u+}Sn&Z4vybt=H@V|}T#&7$+#$WnOQ~lVe zNSF048cGKslrFSdEP~Z%3@Gjkhr-Qa5-ya&;h5wL6e|vlp{%^BtgN!iS8Pxzb!|DT z)v8#Z!DG+e%!MtkfQz^aZ7!GH=JOO4IdL0Mit?@WnY(h^@A-xvQReh}Ka$fvU17r?EUti`X> z|Mbgxy(}TDuZx^7JFG#5wXy#3*4M2cTfeiiRY%1!~=N`s`HoE+0bBUJ%PB`4j$IW#r9@}j*fwMDL^>LPA$()Ii9Q~Up(57w^O z?z6yeZ^se*>wO8m5{mKfZe56wJKHi(aknYP3u$nWz-Jp>Eb zpW6Y9J;<7rVllrIje_yH;4zO)0?GG6QPyLFUXQgtuOCAICVLP{$+1dHYJ93SwJ5bV z^>Ip_au*TCFL-EotI%p)WL;}LXk{%{Y!%aWf9ea|+G#d}%VnadJ8>ZAkk#iMvfTbw zC2q@WdJEQqR>wBp3&44lwZUmh`u=~}dHc2Ft!VF1&a~@ZMC{uTdu1&)^X)RxueddO^~Fqn2QN9N3m-N(L8C{&21I7 zTDRIe9lKpSMeW0uN4O2bJ=S~e_c^w>Hi_CP)(MUl*InEV*6SR%yKWJ+BdsItBOPO0 zCy3K6)47ubZK12qQe~~S*Sb!$jNwKKT7z1z^{74CLQC8lw?phJVpeOlm{_E7f+Nbu z^o%)1)Ad1Ag4QDyI@cD{h}+yv7v#6@(k(P}Ij!%v8Z^0{&#%+H+%3QpI~;m1-zaot zk8Fb@*OmQoo8W46(5;tdo2Sv?a`+lu6m(tLPqtY^dg^O>RCQ(F?W-FET7Q-vb@`)} z9>E#5)9Z4_L$VnhV|&mf47K_JFkRTTijAiHkRo|_CCG!fdd}Z~wt0#T?)T6&(&4#DGC8Hk9 ze7YV_!)9#3Q`cuc+xQwDm3ir-uQTuAk(9T#fhL&&nk0hK=%DOk-KlKO-Y@5+8Fb7#9Rcayj_p}o$1Lx2qSS${j?D(!PYQ%bxQLH?Lvi8e+_H0pw| zt1xB(C)Zt^1~-rsi;f&y4CqZk(+o6?AX<Nd3=4GP?be zCYgUHmDVf3%0|pse*Gm9!kvS2Xy9>t`S6Fwm5pt#o1FOx8(Z!jyXn%*JNT2#(t#5F z>goxX#%kQwi6@^o^wc})yq})s+0#L$i%=czl3Q0MSCn*A+?2ef;=zLZ6ZaKqg$1Sa z%ZWbDBt3Ck(w3Icn3AT7rmEv>$JVt(r^hD8TS`tYpHwlWdPeOjb*CjyE1g%-R{coH zy%p=LpDKB*d}~E#^%He}N&clITw<&SZhx#!U!slD;-Rgj+H%UQ(~`!xwlG~-TUpSU zs7u$?9v?j}c~x{x{IcZbMVFVXuDUIHTl~7@x}qCOZmHUU?oYmz{Hpfnk|PyIs(!BX zR#n&5u@&VdOiBu4a6lqqTLeOixgevU_$O~Q%+++^)v}d|Icp@OD~lC63z>+{JU4~9 zaLZQQ9i-;LRaqRPsn%esB(*-JN}XF7lf)q);az>3Q$WhOBR%_R>aMYvX6_)y+%JCa zf`j4-m@nFUOab)nuT>Tilx-&Rs7SqNX)HR;FEl0#0E(zWsPY3;P^h9C(JLra`JrDG z-H2X6p^9!qub_~$fqdgZLOBh$s5JRK2YpLN%2vDFx>Ek9A`+>j;!1_q+D~A~S&L7u znmVaIRCk=$C^+@@F*Q|*>qnN3p3`8{@h<1C2fhPY26@ix`>;=%LlgO+vsiFiEe2Om ztTOVv%4M^0D+}?MFR6TI9?X27Ih=WboHj_x>8i%lAmwRPjqiQ}g|d6)6N90lNt@F( zbVlXe(z8n$O|q_ZOzCv@)Y7HFrK$5Oud3XT*i`zu^iJTd;K$NC>F*@oBI!y;21bR> zOI;D@NL>@SC$Ks7V(_KVfuza5EBhnTAcnkYgGl5KJUP>To(02^68Ke1w@s z{^BAkmX;$Gk|w60p;bW!|-3@IP*B0JYxTR24D2}{i zCl2)6ZMnZ29K+l%?sBWhz01fwys}9=x9Kvs%~r|#mzK~yYFPQ{*Ps>R+$JJFq05i? z4U)av1@rrl^7|y?Qs1sy=DM8cCOEO`-pkkAS9C(#+|9$LOgr%0hnLZ5&7IkG=bev_ z8d-Al8>gJ|*2A6bP%ovP!)$aTG9y|0!N7M-z@E`o)jaUAc5TR>3`a^7NZoA-4uYw07o-=hw^*88x>K^*ZKHd9_=`(JfA-+ z0nHSV3JYD5pqB)m_`q)shx`~X0@@G@8jo7(&(+FAw_mFruWQvU(k;`i)v0u1X}>t9 zMM;%Xu5CG%H0=v;{t2`RaFj(TbQ129$5Uy1;_c_ zW}`nBrQG)Pr6;eRr^K?k26kxA@JA2Me&Iaww6aX7M61KsJbS{Orz$PI`4%p3d6IaV z?A0KRs|20k8k21EUCZtB{p9*7seceX=p#m3ZcT|Rw{x7$?lamQ;RJ001;1D#NaCb6 zX`jSOQeje(5=mb;i44kOl53F$(_a=Y(m)(rNHiLT_zVPxM0)agpRe5I^NB8B$mO&X zjQ#L{Aj_^KI4n+=&FOSG9SJEcN+FwMWF$j46fznO1Ys?VI4PC5nq8f)gD%!Zmw^pV zA{EZskwndSZ-mC?E7Z>;DE`DQM z+2CzsO77wh8}ej^m^8mBQXye(Cs72K|5hv6aCT_B%W5)Pop<9EYJACh zmklZ|T$4M>>`z?55#8deL&j+vP(XBk$aJ6k#~`Am1Bi-k7|$Y zONXwFYvbF5HY@u&!JLD0$`0Adx`@Z=7Xvi>jjQ3Zl_?fiF~m zjB2He&Y}zGh()(s_p$CfT^3|+ol2)ut9(Wk8+6kyHeag``zl4B&n^0bq6-m+GuV~+ zS+20NOwgucS-;(819MOS+~N{#E|*9!VX)ujgtC(`1T%iS19~`!nc|D6r3$YBbDU)X}LX; z-N0?%irjuT*OTmNr!KGSfXMZ2|pD-qhGmci;XnlKo~Y(K@@b z2Oo8Cz1|j0#ne09e2Iju+= z0!-u4XV{^AE1hAc_~;wVKlxGq!^sce#s;~nFRhSf|kwmMph zCe+L_p6NKVXjaXgMeAxF2zLoxp{|OqrWb`5LoZgm*z`X7rsBKC?xz2s@A3Cs*af#O z!$K1;G)1^@gbP)am*G%FMUx;1{!oQ26sjnTa02JYWj2h<2zbn#WRdh%NsvNPP;w8K znxqP;QW{b!l}W)aa-Qr3k6W*GYln~o`K|(2NKH+RH8qWqNKsL|i8|Rr<1iH`VXQJ5 zRX(55;qYPF%v)5&szzX|R+UQS9$6+upmj%lt`EM6p4X2Dkz3?reBy{*SW-5e*>e_9 z9CyeCN>c=+c2FF*-zD_siA73rdQxckJ{(>0;pmbN z7Z&`DoY~|6Fxq;fx@mcxtgNgH*|)dBH9{90;WFh2R|+(10~afGxSk%j4!ng0UW!Uq z?o*!qUbdQ@jl6~THu5Sv1!)Mac z0ooQMQ+j&(b`U?E8J;Vf9cs{vU-T^_wcvaE@%*X4^QQyPm*Lx=K;i5c+nfRVJMJ&! zN~_rTSQzUfx-u~$md%gMFH=t!W;$AZ(?hH_bXxfO@P;t^pU{sHq7LaI_K+B1d(%#p z`5-g58^zSO6(tl-mO{%mt_T-(k!NK?Sy54GnJ-y}dc)Dmd^jpv>3_v>&^~=z*b`A@ zM^Zc)iN~W6Um_9?V=l}iM%0x>tff*iDkT#^Dd7$Yg0kZT-06taT!zcK$nG7W)FqyS zl57b{NEk1yrCamL`+Iuhx|Lu59ct;$JJPx3N@agReSL3i(ofGF9-#GpqCGfEX z7^kIx6f-rXkr~e{W6rgl!>uN(7)#CpFz6=d?R{>SQ39f%9GN)_VR%;MH=Bq6K@iqj zS=CF8Il#^doKybK@2EEe5B)m#z*Vos{E>c{m^ z%h>l1o9OS)`v2T)@Ndt?cG~;QlO_AZqr}|1Q;hEK*}>3%jlgwfKiif+KJGL(62=m! z&uM~|P^j|Q@7MT{9ou`COqtBl_sFK6H|X*xd8cPGxtz}K1A_RkFA$GL$r5ic|A0`L0b<7=z*cAtdQK}K9My695`D9t(Tl>Ijs3UBH2!++ z*4oEMz3J77uPXZGlU)9kz4qtbbU>=Fm0yy=2(l9xRy7Y<&iQV?m^1G6GEG+6|lw4Va0ca&YiWa0WrAkK#u9!-4!9 z9POQh!84#bwktL-OPG13|L&eGs$q0j%Fjxa3wIpX^Sa8Ni69d)ZP(1e2DZ33_g_&4 zY-nLW`{iC`0$T#2*zz0aBVd(NDBPiD?JGm~U8NhXgO zk}x52LK09Af(Sx{$Xgy_0|b1am3Zx~T123TieSyX);m%zmuB_S$Q$?K>2F!*agTX~14wg4xII z5Br!q%fDB?v-}y$?($bE->LkhQdcbXGkaxUG$BT#k|-5(1rB#?jEKg>Fk5ZXmyYSj zr{x>){l&;oEwVTPRoIkM=E$9HtBf6i*VzvZSngNL<iF;b77d)FlDU7k+gj7puUR&0 z9+B;qLEF!QUK>EgII^Ftn)b>@TY|2bBy+$;?j7EQ)9ZCPr9e>2Vxv%KYB%=dMF$H- zy&wYTwn#2v13-DTdSiiTg_>tHzLM|^WD=Y_F}$zj+F4-K&SbS|zsar0p<|*D-e*?hM`$dLVc>^rCby z>H;cquGeTQ?jQQo{-8^7y3vkTw_!W95pwc~$n(OZM65W^G8C6Q_M3jJ8T`k=54XLN zr@Q`x55E8X4+yCKF!1)PgMWYd*xzy}8Zz}r2r`GtqHm5IUi*Zrk_iQ_Dk9fBGo_0PBWy6J>-RkB2)E>tha4Qm4 zbiZAUX^nj)N_QcuVM|5EJs1@?s%r zVX8Z?I6;ByOjd7t#3V-%rV^5j66BG1G__dp^NyL$JkdI6}xQM){h_TixXP2)KlXn zm>18$|9LVFt}L{xtWZ4ukwMUB(Q!ILVn)WrAyfhjSAj1gg3UtUoWr_^cbG;EGi>3M zW?0ly<<52Gd?RNSqmY>If3)V;cii#o&JQ1<_p9F9{>XdpJ+l2h)gLb0LTJm6kKb|n zw%bpwKaM|8dUE%NA9jIRzC!w!gW^bS*kYs9ull<3&=K604b@*3??)E?E-x1gmd|qu`=Qh&wGQXu=V(_uwj<>oo(Ar`tTD^z1C1|_1f*Ws#)0o`tv|J{?9!d z_wLz5c#Ge_8t4Y-nMw499Fx~NI#ZkABLVADV9*QJth_)#0lQ=GLJ^DGf2=EWy2U$iUr>Z+BLV!=7dvr zu5!NRR5`t=b%*dTvpTv{s98|G?Nhq?s3)xI0Ch((%CfP2l%B4oB<_a>Ee)Z#KNiA7 zIC{@LSF}ZeNY)&C#IJC7oSCorX>105uM<2e#Ox96eT?yGisc%9?XW#76DKR^ks zd0=90&A=QY{c*#JT`rxAl;=DT96s~?PYRX-8iTD?2gU41xcVRVEVETjZNuU6~y5`%*A zN{?W33(%I9;I>LpFvLZ)tx&5=Ga9VH#RUQu3H+t$HHZ-={yJSL=PLai#H^25J;bKApjz6oPtCX9t!U@X+)S#sG9-vxnDVJBX! zS*O{8A7;Ao51Ag^#~7a0{78F1eNg+V_C4(>pVp_dyD8na@*$q#=X!YF?UC%U1Z8+i z=T?-KCMu+u&7jbGGd9nqn>Lb7;a`o>xmo_Twu;<`Q;Et{s;W||#l)~u6)P@==B`C5 zt<9j*3*J*64D-ZOvT-aDh03E9Cn}hVe*EXYx`_*hEyH6SX3&t;B4hF?=84?!^nEnHbC2=KJ&%dQOi=4 zZ$ak_ryQ49Wn^oB*>cwgJc<190S{fWP5L|0&s5vre}C}Wum6@ukAPz#zwE%^-E1xW zWd-O-Ic_5^_ZS;H$J!PE9xkxf+J(As7t_UVw_2v^HtU|$?G79cr~^7bQ3wdYm{l8L zRr~C7DwSkZez0sYYJ4-i0_U)}wgt&1?L67eFf1Dknan~#L8}U@yurixApSM-jBFrM zbEMoR?ZBDL7Xu@|nQE1m~FqTuy!-r68=%qfFITIt+vAl_5xs@|!mO6gq zV2&km311Q|kCh~gQ+1I{bX+WxT*0ph8*g&puw#saiSwYI1D^6uZt4bsmY-) z@+~T%1eBVVE%jwz)SDEBE&hqdh+waMC|=L$_@Ob7hErK%!41~W4Q z3$+UaYqe_w>M`1?K#R5|FjK3p(AA8iWAD^hJa$6E*sV5&MaNVqiPg4hrg}o6y1F7EjhP^m#3iSi zaMOfLQ0`K|q7GB{gyyP0*BxtWVVIS#8ajG0~{gV73TummEq}xVl`7 z>+8aTpiopu?hCsLnZmCdP(sKw5K$CrINETcfo8+ES=h!)8CQ`2rJEvBc-_$sPMq4Y(O2;+PB=bj(w_UQMr#U9IiXGK;i}b&LJ%PXE&y=FU(bKESYn(25X)u!>=VI!=)kSe+p! z$Ei#u7UI-=LUuM$I8Gai+M>)Tw$q%Nps<})=~@jwj87v0FOnSvqDl)K zD970idV}CQ<;7ky5!fj6xuv2Tm`^X^JV#iaEZ?bgyn*vT}SM zqY0>?SNU}X3g=luIZywvN+S;)ivbl}nhU`ca+aWfzHOGP*uO9e(g!gQ_v*}+4{yM4`Flg)0DOEl6 z0wZ$ctK?eFrE>9Z7yCMX-S`gkTlMd>?-(^VYnR)ZCCn1la@}&n3iC?)630z$ol|73 zqMkMCwI&f!k00I)#TGZkve}vHLD+^W(0pM3`kDJ=4<~A5;txcIG98+uniHDSnsXYp zrXPRY=K&IuTRFhwbatS9HR0!TzPvATEN}$5fIH-e&L6Px7T$e$=wq0&KkhRJ?ZJ^1 zT|3>;pc_s&K73Ziu$w(1J{>jNX*Vy%&?cIj z&1>mgX|7=536wn=&p+YX=fk}9o3Q$jfR+rx2d!!l#Xf&MXL_$eAT7MA_T1kiq?Xv zz+06s{-$hKPWXMco-W}pw}Ss>HQ{^#Rk5jptO?4flCW98q}3~jez(6Ue32^&VqC2Z zG9q6gV(cr9sEef8llQE<>pwdO2VVT>L1ja(BTuOP#M_VUIC*l%qbJ#gJLb$?dt%MO z!J+2|HHywE@C9kg&@A72;;k)P-#S6$fzWo(K-+~;0$)RXIeyV=t&5S)S8J`?i+=3i z8)c`XdA`NyTfP-yC%VgbYx%uslkdCbI|_G|K3e|M!ab!wD!2bIjCaO%3%g^i!rNQ& z1u+W!H9C)HNv}d`rxQ|}W89IisLYe*2$O9o69Wc4k1Xq%*sV6WaQbQ!SKaN2Or zz#4p&B_eT6*B$B!sZNAWht7rAkhdZy#?6<_P;*5fuh6JO1w2!KIl;^~Qquf}^(n5Y z62Qnt`BLKKvzU+fL(9fSwX7mHzoJc{B9@Gd642~Cg_=Uj%%>L~3 z#*>ddc9H<|`VP{97hcJ=DE{hsj1N9HG&p(di4$A5zV(*km0fiMdmHh}F7tO;aH+o4 zu!6gTdw_dH^MpeiPy{KVm;&V@*Aw$b6Q60D?_{xv4*FG6%pFGuqNy+9e8MD(o+nG z75ic8jGZoea~>(Nz3!h^&xhu*XPf7sgSWW2K#mp44y}v)vRp~d$uK{Bs%7#$UWdWr z2q(QYJCEYEl)t`(ETi9`c7E)_lMl~a;&XVlj<9d`?!hE&0nYAbUdZv_DJXM=zIMrnKUh}AgDaYOC$+7;>bwRfiPDlt17~(@-bG6i8UbB?oE#yC)&j(LqAR(U6lZL$z14ySx;{3h~b#GrAfWI1TKqX)=Ypr2Wo~CdY-TkJPGn9 zQkcUp=a!B*Va_u<;5B(>2O|!eiwYxIU#RR|%9@kxpVdykZ`0KDgo^L(YhEz#SFgRc zLFY76!vn87yrbiX-PcYZeC_^gPHx-F#tWdUZVCEa-uj~2x_GL-IAC>n!gpPD^N*KE zyu}xM7W%KVJXDcc-#j&u5R%L4S8gEv_4~k6rHTD9dR>lO@ME*z=VyLsIB0m;@V4QM zL4B*`yO!;iA6Z^CzH8LDb;LXRUZlcnWT#H0(&{8^a()cm&N!cQ>qN}N zl?};DeAOxY7(TzjX!Pkr$ly1Hkg|`Fbt;k@;&y)YR#0K;;(ZO56Bu{uabU1^-RhaI z*6?PV$1MC~^|rlKMSdq~40a(I-2=bAdSSI-Cg)y=Q@*#3NsvV9=Zw_j9H_@Ob|ET4 zL$b-BI_P4GUD&6y>M5NyC3Gf}UME?V4NIecYIei2NF?`V#P#?DArcVxN}F`He`ozP+}5o8yS7G&4gEADBtT4`A|rhj(Q z%gL-c2l4;wP}xI>)9^|iD+A7v9dIuqCk!+fFgM)L$JsqNs!~yuSJAW;YDR8z8WrE& zbNo*EIz=+GZ0ei4X@!4IR|R+OYMQ-{3DRocG=0SjN>q{AlG;v_)7GK3!+4%txf}21 z_BdFycB1z2sRaVQzk|DwIQ4*awMLv_7ab|bE&H<`j#Bi-c^|qf?lkhX#Lq zJrzSypP3tRGK$NUBd6-g_QOopO#RZ4=A5W3=W_F9?a+|wVQ9%>wp4z)*j42IF8hq@ zX?H(!$aTQ2LyV2t;M(lk=lYrJlxxtX>t=eG6AY_U>6{*w$63t8RK?CBcde?{d6nua z=PcDMeztSAcXshj_-55I=Ti4l@6zHsRku4Ib3Nkz5wlzM6KA*kAag|3@9c3u?|r`b zb=Pa|-?~n^|J!xO9XGoCt~e8S#ohOL?yP-4?k|}Ot}oqoMJvZ* z8&=Cv3>o&yrK=(sMTCePVb76RcjT=IyDHKZVTfe|6N&7gW(`u-tYNPln@0_ZSYq7J zs%Jmf<9*b^fh9gy^gF1=qm;F9fL>Wpkf7!blHm1hr{)bqljN$Ld4n))-XP?eHwby= z4MNtu;V3>0%jdPwn@$taAU-XJRcHpr>7uE_YHb zJ5w9fo7D_4gJ9Gz;*U`*Z^V4j-ab4_pCzUa?ZgrS{syQWM0?H-B7Xi;l8HPQTl!?q z*W1q6=%JGTOG}7L1nTYWt1qzxx?Eybt28G;I9ROn>QuH7)&;K-wJckdGj+%D*-{StwD~PoCQ^MaCV)6enGZNK7vCH^w}%c_@?FE?3r$b%k} z*vpwUP*Vm$F=e184uWFhz@%~7ng&AYNONg1Eu?*w>8f-j9Zr{wPdBAg>0~-B=gb(2 z%FBx~ZR%t{E_@a*s6Z|oeRRR8eufM+G5>p2`Y#T$2BT9#j zBMk5{TaZ{J1c`-&H2kTH%^P6C&RRHpEbBRA#vU|snQC%y%Or@{4K8QisN%i;1{>j|s|f21n9Jg({-I-iHl9eO zkI80;gzF&?NpMA{8HByYitXDsnM`C)6u5$#yC%$Z<9iBuE3B^nMmqn-!9#;b=tMR6 zdC+Hd6ykdZpNTji{}VEAEyjLau$T;$Pe^VAzcRR4>oRAzf$9cdQ$&eK3TYK_`kU2>RGYvu5l_SLpefz0KE19?nNR!8wZ zT{+#oyiXy%-$Zl&S;i-KYa3l!tFzVX>J{TmoIA_yirs6}{-emO99-`W`pixjwVhav zXW{9qvlclvzI@=bduiXJM&nouG?+6x^^^#=GW(S-1f6R{(nDzRS%lcXKyPxR|CS9F zBHG0|i-CD@=nG^X`VtwCimWiS3F-_=GPr1$X?7&64u{Puxh$CB7{P4e&1Q?)#8|M) z%$TsnDj+v-w}R1R!0oEE)sQiC5ILLI)!so4CH1V!6Rl0jY6_njHj$_sIq?cen&Q@! zQ8uC(GF<~%q8KO>;P-lgF6Bs(=NoM+sQZsNcH*2LWUZLO!)N`l?+$EaYN-yx0Akh* ze4#AYCJ&6Ghnyat%)GpYL|)6<1U#+!1FA%i9ejs-M`E-PL`Was?-tS?N9m=R-&rr9cEH1juvAvi{l3)>;vLir;SB4B`pSLwNaeQ^aQ$IMsY=ycqBk>UQ zr)t@3L^z2eTAkODwHm3PLJz`%Cd!^et-Kqv6=(NtJgU84-A5{4eFuAV_xz2uRlkHr&OYd2lDhlYus@G9-cken6?nyrvT>!F>tar*qwH(qKzZaCvZBE?uNC>|JL+Dp*nkSgvY!LO3uTT#dTUb7?Lo}ltzyU@KR7_W zinjH>MVimL`MMBNmC9OyKNnm#XgydxBzsK8>m4G@z&#{g@#wIQVBG+{fHs zcQ@$g`$w1k!Mltt7wn?rD;!b zzoFkqvq*e9+-;#1r6!Kj;6Q>u@eDbQYV`GZYc-?)>B~3S!Y=snenle6gUAj~<+gnr zP>&fXQfXCC_qAbMSDK&;#hg=LC>rnN=D<&_zZa|4SweuK^~<4`2qLM5KI9veJE*{k zM_r9+i%?C6`CxyZ)BpL^ww$6dx*p^;mL9Bz_;SXAT&luLXj=?M@8enE>4(-YAMBH- z8pk&+-X2N4TjIh@z2POXoU@6Om#oJtIrNOmMJ+lX{1S~WdUN&Ry6e2nC~TV#*!rSI9p5%${q|1uocm(8aHlZHgNK(^WsfPZgtVWNKT_!FSSpN(xKCP*V}h zhHe&`M#md|@N_@DS%r zAbcKqe-L?p6gf&%i4)oZIx(H*h-4PR2Fg2&l4S;24O1)Fg4{#c&*bw5a`Nb?r7taG zEu7E#xvBY3h2siynoEhK$J)8ZM6}1+Bev6Aw}79p=t6%*J>^`eXRxub%*4-7258<6 zM76m`wQ)t3fvBMdFyi3QAF6-;idK#e0|^%w+}QeIHrE6-6%26%sS4@90_QfCSQ+MT zmuUf&`bdwc1=jls$u&f^r4qIUXqMLI;aZ^*^*DV%AR4nSrmHaZ!B7H+e zIhJDz2&7_yH)p`Y8C=91OEocx( zNxAUJUbeU#*ADO`VW(K(8pt#qHfqQzG=60rAKVayWd(%}b095Xx#RmHOiiLq*CQ8S zVl-GnwIK(;BtQWWL+*cJ)=jN7*xzo(>&?pNQpBS5SVB% zEONcnI@+mS%d_vpT#LuF@4I$M+X+eV!soJnmrxv<(DkV=ucnsQDx{+?*lE_!1Tx{0 z4KE}|{}Bo$-s8oWjmDW?uL*Dq-VlWbp$44#3ZP%UsNr%bo-BqwX8JNm0Fx#4)jkc; z7M!ahMWdo9>hT;#;TiB;#LN!cT9wN>r)1Ufad1y1XxhLsjI#g*>`ItZzDds;(Vsf9 z$<7-UGDJ$KfEpASaqcrQ2|t`GnVW8lFCr`+Cy!HLI7l(NtoMX1q8LB)$!S9cyqpg8 zv4^d84KaREW10jZQK)-Ox9Q>gZ^_B=XDhFE2al7d&sK=8D|pIJ4X+gOXTLL_o*J?n zItdbyN!@PkFU9Lg`Rl{fbf{dU@{-3gw>nV6ecaQM6Ic%MWQmd6seV!zkK) zmgK7+AU6B_KS-i6_&-oWMacL96Njh7DE&c+QL+byiMHA+adNmp7t0>hImEim$XI^- zl~o2Dmo>#&pd{W)m+>@MR6~3;xhYfjAcY#U(IT#4T8s5YiDmjTv4CiZ_|!s06G*BC z^r{Ag&~lX=T+MiN?7)EKE0T-QEK}x7RAqD1Ce{P5Q<6#CjIT31JA!5P_(Va&3;b%p zE&M6XYy)wjbsUTPt(&Wq{XT`Ol8lRxz2?Fv7|H>iW5%vJ(;4%r@exwPX%aYcI4@s2C9>2R| zp_v~b!8bvASW!uV<9cReLCBBmtV8i)m*85$O`L!RB6M5JKX2y|*_74DJ5o%dH=ku_ z9}3+<^I#Q){s|N2-y8g?xY~e7?t2T0g6s|Lz%~xnc0gl6pjV*0z9sOE2+-{i z46>64IV&p5sQ~X-=$qJ+Z~*-U?G5j`2XeEqGIFr+aIhgV-3@SeiGhuonUR%;m4^$F zN!bBpsY=4h&B)Ep#mT`5bRpEYkpzKFOo6_G+^meOtoIkC9P}-~hC)^*79bMlAKxx~ z--nTbm4%U=o1Kk|gM@*Ti-(bu8+gUZ#>L19d?O193o|P-BhaCdnFr`^cz4g@U<(i{ z$$baIKesew<^H#be|+X2xJmA32I!0^tZxsx8}6_0l^qQn?q^IyO7!kO?xv3wKqV!r zVl5#hDyMG)^m{Y{W&!NrdVg8j)gG7vDJx^^``(R8AQP~?gPki0wUCju0f+{XNx{wt zWCyk~A))^LbHGJqM;jXpkmcQMGT*gSWKz59NeQ%~E6)=<; zA}}BSAS*Bt4j?;#uoghONl}oYwGq(Y@<%gAVB-I|O`~?0oYfmqb=PCm3D_Hfiug)>4}A@E{=N_pdzE^ne4jX%3Z5k{Usiv+n@MFFeI;GWfwTH zQP{MUOZ78y#q%ZkV^xu5QH+l7tS|&X2flP_i0}dRBp+Qp=OM!&1v1xDyvEX}J59xo zD{fAE*l-n)O3$NHOM~Q#gWb(xeSM8CrMv17dIZdf2z7%*J_k^G1>@Xg97R zTzMt93fdpU^E~;Gis$V^1rL|-Q|2n&Ta%)6P4F zRRUoKay!pX_VK>|o7BRdNZ4>t)1D>oodJUr|qT-1XWbu~LdehoY;6U62MN;) zB`L(aKP1$q4h}Zm{Q=-$a{H?nrNQn6MvGM3c0GO_^KFagyT^Q}0S(v~!O!_WhT_a0iuV7ShWEf(0JuMZv$8U>-&2s2 zmFovpe+h6y3$T^LJzfARpwd8g_WuUnU4z^IC5zs{e^X50v~39sX}j;hmmg2juNH^4;OQSEKAaKhUxK8a>1Mx1?kL zvtReW0mu0R91CFOSxEqQ{1;jWdmHfIY8CdM;J@4x?H^hNU`Y-V_Ft+|Ol$yu=5MqK z`%iLb*#DtT{xAvbziE?S!;bdAQbgZE7qIQ-e+%*_xi0K?k_OmufGt_rf0wyCjq=NU zHYXGPzXkV`92d4bh4L?s3)^oB<<~eaj#dW1s_}2}{UoP_?Khor=Wql203>X8TIG(I zzeHI&=$n}Qy+g+Sle`r+K+=Ar-5-p}#{Sy^{Tq6`?*jZu&J626mPdbRRn}j+JOVkGg6yn7e{1nMev(JS@{c9b z9|&1~sYhd|Z>4MCX#aPHk>e-1G%SE4bI*@|-b7?!|4p6#8hvVFqw4^+1lh6Z+TVu@ zew_U+;-BQ`u>5W${|WKk^8QZmu>BGX@;hQyU40`beJewd(SH;3PjY{L_gnuA`8VH{ z{nyagS>M6X)X3W8zlrnD4$yxJ=5TWGaNO;r13@K_z9phd;;y!N=t`aKbyIV?ARKew zDKs1A8Et0(g&$l zZ?!3|PWgmhy;psgsT3G^RuhyBdqwy#~mz6$R9bE_#{=ZE{ZcIQkM zq(<~9B6}yw=C^!=px%Y$1x4(u{e>G3nuV()Yu#73Cidquw;ru)-IqbtoLk;rOU1Ym zXG@1D9%nP5OwG4eOwziqt{&Bt5y5CTP~*?8b`|U1kYph!OkMA+ml5kAl+akzi5&@j;RHyc^x&dX8q)H#ezm z6Hm-&uYInYwf>oiOZ3kj2O|p?B-co%9IB{%DAm&gSGCWqEi0rbFb^LcAE3dXS$rby zQ66mGt9ahH<5ZVZ+Y=_Kx*L8fE*P?7CuJ5>q1v_)u#7@<9TY4~8)JP~C{U_eirT6D zW?OfundK6C&E&i7#$sWp`L^iFPP5bPT2!hy934jdXFC0jjL4;Z-SqG_br2MPmN<9* zqWJX%r8Kz%GAYLKmqF^t&M+GgvS$U$Rb%Xm0ya3<`_<(qF+3)ZNLBl=2b6a3BE(O1 zjg*A*Y6fwFB{g1eg76TeN7;QCUFzC03%#GPQ&X|zK>#ftyXqu|vi(?(hmOQFn0#b~ z?8B%K;I6d;D5%3ka4t4B$sWZz>Zgx|<*8s031k$kIs3HAp_5N}52%?HJbL~_z&MIU z=s^G}wlIw>7J7(4T{sWXu{>$f3Br!kx2eUHit0hqvBa&KhaS0n_yUPetl=*5uM&h; zm_6n6%P%lJHV>mp@tXB>>3W)ZIP+U2$iBtUFERTy@leGYI{sJ3ZTe|L8p1<~&ZCLAaS_w0G`YJagQpSo&j3re8wOlz4FaM|O!e zNxRy^fn+WDi5owML*<9L@>s$mxNV*1mCLaxy*QG{uZI?I^ z_$g_kpD!mChovN?FAP$oIjmbpWKpXU4u|R9WXvA;27RulX|Ci`FSbg~@SLr+=^T5~ zF{OBU-uQObRX9fC*pdudzx-`JHceRG^14Dk&t!ay802GqJE##@xXD=ITk4Er8o7DHYrs)cP5Q4b_N@W*2%*t zZx78~LOvixRp{K0pb})yi=RO54M#{RYRikM5A z-r(1r4oyQ&A3po;x_@NJkNaG;u4H}L($;iC$S2PZ9KGM4^jz2KVD^E;X~TPU%X8Up zAw3GTt{dJ?HZ&N#Rk=sU)Gukm+1{n9`E?T9=)Aln8rKlyWub+oHE>ufqZ9O$A7x8D z!jaH4ZF)2i5{iVUl1Q=|t8yDD!az;wQx&6^Ip~-PlPB7imExy^yJbTSvap(etua$R zj_Y$m=30z>sDjqnzPf&hH(gP2@^r`JHH~x{l!qUJEF;2`jAbYU-XPLl_sLDDN@?Z} zrSJtI6vO8aFkP`}G&%-Po?0**lq0LM$km8tSR`dPCazi_(KyB%e7@-QOXahj?}?rOs1|zq)+ON7!uA7dM2D4 zRM@;Z-Kbzz_cYSLY2e4`gN09*WWThOV4sPP-7`K30qbQ9a*RET`R<<>4iP(awi{B4 zk@8A;#B~d*4i^ail`tJlMw9BWE5j z*F<$Pm_t_!MP>r(lUjAcIhjS`g)^w%lrWn5=-|ft(#*&gy26=R4g_AM54F)WN9H)n zBWZp%Hys(CJ}nu6F~dnGgUO3~hNCOJ@qmSBmrN`lXS&Hhi3#m0^s_65Z0aFVJx5IZkR>`3-3AVm*ziHtn|F#9E%_`b=d6xcgPxTi@>)1#_OV&pI7Eb8bwj>y=03$ozspK(C;i^e~QRk3u%YfyN(mGT5cflj40h!}108mEYyXXK$+L^sKH%5zj!r9?isDZI&ihC>FdTbFI@@?_ zWcij!HKe$CgcvRL&lc1pBf#|$5L6KfPIs{tSDc2q%`D5eda38>{z?`t=5Z-&6E6y0 z9+^T`*cEd6G_`bSR$%epxVUhe2x#`UQ;HYkFjg-4zD^-E7JOCEBl; zNfqvOTymG-_L7LbBO<3^r(UT`L;2}oKCttERQs~;TkgsHPjIe|Vt?OgCou$l3slPuQ?+9=qOHnAUhWjU{u$s3hkiwqoGS z1iJ3nvh)$utH2(2>BSb+DwA-OGmk6{nkOU%8neoU6dwG={zLLgv6AT&_y-!Bw$25H zRpQx`RBtcgienPw`CRR9_;I@xl9+OGE_*9dI8p1r0(_%J;ICC0-lb)W=iITGOecS0 z5U$9&tMP@(S3Ql^`pc_9Y}kciLJ0)zZ#CUp1llWd8ZO&3ZXoKHJy}@z2b)MK=Y194 z&uJ&#J(lj)(s_@V#T+Gif5%%KMIYj`lyctEtuEyb`Y8$d8bAwZKj|IG7-VE{Fzdy4 zVxjjVe6zX556tp_+DE7dt@8}Y&kH^UC276ahAkgE7cYYpv>lp{w{SKrZKLf}D_DF6 zfIw-9*=KWNL)oi+?LQr}%z;6gd0hc!KbTy6iszD>Hp)_nniV3H;}0D=ZbW{d*r`)6 zi*AdST}<(H(3;3rU02aPE_-vr z;7BQohwV{xls^cdrnm*QSVPbn6;BeWJEsiACKYT1{R$?F=%50xamZDFMMXM-`Zr=7 zMSbnhfk!2$`iK?OBDY^S{5wsMs9z8nh*-A^=lQ(G*3x>fgQzS8FslxoCrMNMEb=5T zy;T6wc@`Pn+H4&XkFJz#mLN;^bc_r)#uWfj*Wd7CPByg}M`U{LSQ?gCqB3%q3N%e% ztf>Qnltbw5rr68ZMcchEHUy{Z8EPvi^IY`3T=(JW(^FbwEJUP=P_uGhW3xVh(xFi= zE0=@SycC#*m!ApyAWgkICTyV8hMS1T7L4-4r`D$6Pey|_lNF^PJ1TnR5FV6i8XW1H)kYWS@c5;w4cJ{Q$a}%fjxaXSXZ)4b5)OHRsj|r%Pzv z)2Go#Iiagpo8JaGW$1jzTBn)0xB&dcqZ8UYbbAK|$ z4RYQhj0q*~Q6F8#4JzygW+_=<|HL1MjjKuD`;q;3m7`UY+~n=_54;nUv{NJ5+x$l~31d3i*3> z9rl%x$y6_q33@KJCuv3V;~=)E&a zQis9%Nv($~EvbRW6aMML(}aSsLf*KDcJeVPeM@6Ep3*YIRrEJ=c2dl$0-*)_w`+I^|N8ELB6YWB&WTGM}QP@EQxE|luFHiFKJ9d8OPq7*36jtg|{t9nfTfS-@4diL4H zh82u)_NtKQTK!yAifM%wJz+5OMa4x}`T|ee#(@Ba{$w$%rD(R~I0Y)zjw2i30X#?U}B>HOFk5ZMo zn~3}?W3-o8@p#>aH8+RbhqY*B%~yUzb+!EKjr+&*(*`j7sItq^Z&h5xWv9+x??)g9 zrmBTh0T0+4gjqkyv9xN1SD4>^EBf|(*wSO0cMmAd?sfw-jf$Gk^yOQ`vT+{pFD3_N zQg_#r0PN@x#;kyeX6{0Tu^_|5b=oXs8QcG$2D8HaiW=hY>M{~oCc*z3o zW$9zRL7~kZ(?zNyVwp)dAy#Revf}c|^tw*_Z=2oupPC!if7@0txRy&K=P_7Eks7wn z<**#HpxW>$yhc*@qAi_rr7cZUkppBXC&(9l)i7?GwR{_abG_(J>Lpe?6#5Z!&bf8`2Ijp$)MPJT)TH9a?0e0(rmWpq zAiO+eZjrk*RLsfU)rBY4T>@ww2cAg*U84u<)&-gYpQ6viVX>tY@e}~jbF2ECm~Vz$ zG>Z|2XC;cOR}qA4`3(!01iG-4?=BLSpDHZ;tJWw(3o<+jc(89K-#MNx)AVM#+AT&@ zfr+IKK7Uj3KMiyF(!Jz@$an#~$QyE@g%i)5lGGcGzaD)ZHkJ*78OJe&Ek>5LKOweU zkmwt+>t;T-*@}YB;EcQxWUfQU8A=-$CgB~YmiBuD2u@F{lY!nR(SA}iOesY&f9B(% zaI!VZM+E6ZA~rmZA*_J z_)#9j&=oDxctq<>=_5YMb-X|q`@^-SCWUFlY55!dJ^jY|+6nisxtd~D^<2Zn5zbvj zF1O-)nS_iVMwjNgCLXF?tD}f}6~JZ?53rrk57gKvzEL~*3KD2Bn&46LWtPu4nK4)q zzu0I7J;TtKPsXs~lyw~F^B{TV&0`B#w#rOVMS#!OcG`r_pHW!a#6-VyaFHGtHt5KW z9Ip#aW<--weU}Q29lK!hx-=26YGzU>nVo|Y6J&xt*KpQ3%I^-zi=xm~n>E(VPyoN9!X{7*?Aaygln3aUa4hQ>e~pQ19H^y~OwT3OEt z4wxYtbkKRYW=H3Jsf1YIV`2HK-w3O#0$N@5#6qif0ajts`Kw$2Be=P`K8ipWplwD& zhydZ1MnhswDbnWLONrTPc)-vBA3_m{exrC_o#b;3hGyUmO!E!@NMbW(BHInDl2>A(W_ z?P>JB*&}tcOo|?y9&>o&%QCOFi-L9uYaPH~+l@L9VG_&Ez=K7a*D#c=c!d?b{ND-OO?d zv$C?G4b~%c4&Qq0OLB{$lhzD%S7Kk1tsVI|_yAg4RUA(UoBy&>APTFCwIi!plhq3C5Y-cY$P{2t5{q<8##@=Mzy`+lBG54ajvqu>V8ueZWq!bd(a7x>!ii zhwKMbQsJX3M;f9lE7#E(xE+O$C|ek2wnFJES9t^n|dVI8eX7H+^H1;<6d8!=q zcX^j2YzezFG|mdckdH2`Xf$^Qbi@Ra5?=W09O1*W?a)Q|Uv}Z2uv|wSXW8bu#kWx4-*h zjAis+^s#d#3lElthD#WgBG+gD$Lqr8q%8+GAV9&hh$DDh`jX_TCys8qD*-ObgRoLP zoWMx9aN-t?C*;>6z!}Hl|ew|2a}?xI0=&q$OR~JlClIw6aMWe^4n1gi2I4TI7lcv z02M^{pOs)ExeFrS*Pz^2Tist3XD7LfRRL8~;@l)GcX9N)mpmjazh7lxBVoOZRNjB? zu9oRO@fav_xi4T*B4N8rE&vYqA0=VC{|XYeJIKJr`wx<^-Iv3Vu-y+ya-Z$1L~@@O z3moo}FMz|3QP_Ws!v13v_8+6%XM_R&@?(_y+#)5C`|KOwaF?F~9Da;)pXdOb{TSsw zW)7VF7=`1Q%*0!)s`ePIVst;6vfQbm2cyMnFzk^WTN!ugXjV7S=sBeL9_e=2U_ zV&l2b4q^QzL0VIwn#u0J5qjtRN%=3FJU?R2tbant$@2r@uPNWLVATZ~8veO@=RYK+ zasH$%7*3$*>bG*MKT;?-e=E28HH0+Ow=)KVER61wn0_Qu{L_`c7VdD~3BXS%YT;x7 zG7A4C|CJM{F}s8RYoJ={gDniKUH&e2g7YV(!*Fl|X=!(0{>-w>|Iofazv2wYoCE<` zu)2m8j(1g8_dxIJ?tZ_Z3&1X)_!x$0W#+x$!68RuV3%Kxk$gyTno z^Pll^{KntEhQPn!{xi(GIrvw6KPfkco%=@;@SpLq^ZZsW`Ad|py}mKX!BrP*Zvm7X z{w*8-gmjqu%u1lth3l>`_;+aq%8Y+h5wddsNZI>u5%Ygr2g-S8Nq<*6|0(N*otcgG zpR!(7wP!*Is?j|cieuLyvb(<$!b6!(gr{J_e}Xu!MFH)+-|ORV&G=n{g3O2c%08}3jrG^NGb7C@&!nl^y{eC;7QB)4X!#j< z1T5Z%RWICrJDw1ny?KPlyq66HS$CuQ`qiMktKX`l%iEf_f?nt6oStXb6FJ0Q(bc-Q zM_7UGhF0PG!;Hw)4b9zU8AD(Y|<$giF zK5SFOur9r{!0T}{vb!yqBH*PBfgbLflZis2@dT}#WR$J3sfQDFkw;%PHQiQ&=zwbY9Lbyl}WUaNR;J-Prp4d&Q3YQ&DOB0j73~LntmPUKwhP0)_hiZ>mNRfJp&#{$Ey^PE0s`!zm*(Ug} z3jGhHeK86UpT9;LR%&9RglK+>K!<`U?M^Vx@CL16amE*>AaOZfQa5kZ_w|sNp3h(m zhVMf5v-MzHgBIUne_WBxxTQrCX|4pz*h^zr*+wkNV1pvrNLD|8=7S3L@6;oN@Mcm7O^ZT3{GTG ziSDSY`u%3$*dFNfti_gn*YXZSjnJRW{7$aa_Lk&0i_p)S{Yqnd`GDz(2}Da=^nM@i zAaAs(dUgPJ?OQbdypRNV*ED$=HxH^+SK8~M^-Yarug?etQ|Q_WJ?(nU#HtS^CQfT| z(#@Yf)}ApOs>BT~>I-`xgcXE|8z_4n%j=qEr+Nd{6nxO!Kz{v7o$Vtr;jHq-lK-(t zfXD^uS;?zWGGf8Y!!tXA1r*7($`NI>HWnCL(X(mzrxB|8E7i)I$pu(V6qM+*bH0PU z4Q#~hV};bcG2N3sLcR!JnOQ%@NloHW3M3lfwkCF(Wg@4bB=hn%}@ZN0m1u3Oc&uP}fEdM2@`7`dXpO)YhpI5SS!#8C>28`NpJfMPBMmCqbkP2(LZV_$&N|^RuBbY}e5Pijz zy8NM&3t8E@4~_qA$6tipF-@vBppnvYRDeB9Gnr#vWz6wlYvjzckm< zuqZ!eRLF6Bo>ak-BjAd{aWzkWIGvd4se%oDtM_=c&qrT9jGdtu=4cj?%ri@grlk1r zfeq{iqSSepth*sh0}J!=6Z!~P!Ro8PinKeHlVC#@DmAb5rG{usJm{}L&X2UqgZJEg zgPZOwAz_)eD}n}_vb2E?z7B}AA%*t@`!8wA*>-%BoxxYv^Km~fx^nxd?S$ogc!EES)V;3zO(-BCT=r^jw`ERoy&``wr%H^XfYOo&#;ZpYvIDbl5TB(HB3T zhM6aOmS2=R1*V2j>tAEk5Ed*#?R%EAJB_qHHRMV?3z&Nr2PP`RZz*sXv@#3R<0_3c z`wAW;@WfkoC^YIwrPcX7^)>NO2G2t|x8P_m`5`_mA05sGW{s;X$WpuiF>+h`iwo(j zRNT?G+wbq>wTs?_uf4@kcAmAu50~JZrq9bsW}4N@VYnmc*IVSR=YGTi%%Flot1XF4 zUnHRo89w9%3(`>v^N=c(*>bSvH}}9tQiMI;!wE3MbZ>e~#Rdsb_6|%r9@l;OekM>* z-xk65D(p$jY)Zaf$|>T`k7*PKyUwHO_hQ;64-M%noV`OE%f4@l?Quv)BN;;%ZI%)IC!e!Y0!YJ5 zJ<7sts2CjEKCCEsghz-aB(K;-2I3Uw`*C>tE27=ROQrEy9~lT;>4l_H93hJKpl2E= zZC1Tfk?uwdfcf^cYrih{T0W-t$%H>jdZZ!AET2qN_Vl+b@OKo6!pDT)g`p^OObl^r zgVA$ls=pqiT~8pC<)?c!Bg@#8iF8M**t}o`b<`p<9_aWzjgg&OPL|Gok0+f?Kp>r6 zKp>wj9cI`)Y817BylhNn>C~4L9&=IgWrE zD*FYGkTS&MPcUCudUgn6;dX-jQXhue3}F-qfANK&4L|Z%IThu$gFhMAG*d|o>YMm|lx|MDtF6CO}gVZpgA8Jt- zup|rTOspd)@Lcin(j$fK3-`dh*(;I!M(M5BCE|2bSgvu!ZAGFYQ8B$S;i5^C$`v-s z$Mfh>Y!QU+>}FXr)kkhDzOroL-P4AWb(<4+Src%!+QZMY`_`z(1UwJUkczMVcfA?uV*UCYFyhtJ@N zx%TG$QrBIUgdj^onV-byC#L+LB zoCF`dQ$U;-naoH5aPn=GvVU?8DP4$OD#7wi(k_qrR<7C_*74WLD)N%i7zyuJgeRj8 zUT_nH$n=JvbNty53q!iB)*Qr#RL@kzpARSWxP3m=7u04Z&78XmAINA3uHo}yRc#g6 zN11HL6egTy!xZ+5X-p)?6wdCgMwWwr8xRq%MpB|9+ZVXo`_X`vQ-}VeDnpf_YPNOM zBQoMn1al+X^d}6XLmjmqURKDIWAcS#+TY_-pm4{hL6e^67vbac%gNoh!FJ^5&3O?5 zz~7;+iWkHq<4Xn+Ra-~XAJ?7pb|yygynR3AHgI-}JUL?8teLh*@n@_SeR9QWyk9Rd zan|!WT#khmrH8x1crT4Ff%inO9xB&_UzlQcDC? zouab4snD{4JAF^7j#K`?@iRsNzY#*_WB}!R?4W4HAi^qNMB7@*js10`f<~1mHrjZGtvr1mjqEud(4eJg%@w@>;O~n*{pR7}PpF?LFedTmz z+u-p~+JjM7IJ%jbQrB_a?A#}AVRv}{9OxN7(mWJw%LJylYU`=Oi`o{J*k~ao&aASW zbNy(dQ;~r~+nAv>WT^R`zbn_&(|Zw$X`;Mh|MOgWfj;V2m}#P~7;MT7<>z&~RoNorrKY)4_DTq= zE`)&LSxVEasf<{f53z~h2jT294E9$ezl*dZ1sJ`{jy;?W6lLblqUDG*2>x&2j zh+k}47&WS{xj2H~zTt;{k)98dG%{~*h0NL zYM%X=`L_M_z>FUeItE#$hwg=^&q!pU~s!+O(d$>++yi6wcviccchFFLLU ziNE3WoL|gxsl$qEqTVkrS4JenpD}jSh8q>;P&_s>DwVO_BVjmmm<)jEp((YO^QrM>ByjBH>xB znN;NJ`1(q);?c9D!hjX~(%H`4xFtOf)vnVV@qN1Dl0MV#;P%yzCXH|0-Gqi#*V(x^ zQnq60&_l$}K6)I~6HI=uwEn~xP=>6-*$i)B$F4u0%&RhM<)q!uEokYGL}hvEnpwZ2 z=R7qsmv!P4^K?Ob@5>&BV-u4u>eZp2HsvREwXrRtJ=(_dd}clFnHNxuyC3T+Gq@nu z4upf*n~5x5dDflx&96*Po*e|7i;a zc=XplKL)Ntb0%bl6V3BfZKL)XmX5ItWFXXbAMXGI@-g%@)w9=FrWd!*T%&T;%lye! z`#MYLW!mHH{rE+~h~8E#Ews!o_?MoUdWS}9n)?YhCEYwlppn?TMd?6aHhADwYqV#U zHHf@$%X@t@auC{VXhfy6ZaI*$b}5Kscx^e&)e3ieIc@m=@Ex`2>t-NBtL zHO{h3Ui8bZYx7xlU1Ukl3vUi5ZdtW%1sb)v@UUjzEA5-1Hl8~$G|X9xL*YYG#sv8> zx5eS*ypZ|W>4CpL4T=n*6)QPj1rar;)-Ay- z_8H!g%YzczNIT=KmyR(VYTi80nwZxX?QXHTQ6YpW>0U3CyYt9sbvj$WXsR8!;j1cv zrOR}&r;1xXNVU~l%XXE_qxx!_IzXkydScO^VWVxAkbk)cX4JBuU0ai7f5`MLRxp5Z zo{?>ZRFkdOOupg3%GyQCUnj3E&Shd&&1WneN-FEw3#HU}nn|0KEvHY9XL5(0<_W2a zp`ZbOCFGVm(MQo{Lnf!G%sx10!G6pYqUBJOLLrbwY26Jdw8((1S2FyVn`VX>FKyPF zcK@$ioMsjZW}^k=#d$YASlg6J7Wx#)m=#+r^dlseO67AJ--;kJc&2CjPcRaHi{W49?AYEt8%cMQby`Fwz)={S??XQa5mT0ybGd<>IOk45BVo=1A&G!K9DnJH74n>HEjqJ?zfpca zj#^()%vL=#T4lMSh55W?beW{}J+@v`18hI!lx3;;gA~q2S-8*|&NsWrXyD|W5PqUQ1Efq95ZlbM{ znLrNz8uj^0R)TG%7R8Df*mQF+N!9nN_qDc7KIvu1-1CJ2p!$`dqHw0Foc<5uueEL_ zxz*vin6MCOLDx8HWX8M040Y1gv*TS_V)3y~vDM)#&s&IPpsvc4%0eA!^r&aDG@PQ$ zY76~0UFTGyD<0RDDSb>?*7#JR{Sl;==O=|N@}6}*Dd-H`2dkVY=}kNq>4ElztAFaL$hk)^^K0e5{x`%ov zYA6cE{F9V|Q9rU|_%RKm(t4MbY2dfvS%*o@+y_S|IXfsLsXIpDf?itX<%4mUFOndI zvbU#PL6ZX_x6&J{Bb_7&-1YpHpSv~jhS|;=ZuL-Ub`4Jsv?Xs0rd&maj7{pXbk(k9 zZkVpfEDEU?XOarJX$(PC^YLtTvfdwx8<-=AlvWcNq`s}k?$3uumPbdHe`1K~*8=s& zJNLYtj4D4lNbGwRW;f2hUSQy9KhC+jlaYzQlfOb{QXb^q^^$Vi&dEx^pWSkwb~bM+ zI9R&k2wvMYQHaNC=Xv}ma>t$Lb>R|nYhg8x_)%u-L&vMni5G~!^ZRC=uY^lLImd$* zO`uo6VYEjW&X-`I|MYEy5N@%qp?W)({E#!(Un)dtpdTJSbrE75JV zcyHfp7Y|kNulAqo|0DMQKjk_6ksxqylmCOs{&QUUKbmYF=6|mBZTz#zCYbks5C~Pp zm9YL8=}#70Di8~-8R>^-HEymRofWr~NWN*4$%C}{b>Y+1c6;rG*&{)|y~L!OGpCDF zicJ2V1Fjb`?}N$_6J*w^IXgEtFLiSkyy9;V+!N!Hs*$RCs>^QS`sc1F&lZ(ku1{R! zv75Y}dS21z6yGMb?e)iYQ-fe0JkJ!IdZbH@%a*Ot^IO$dmoti8-1nTq z3e#q>^G!*wjAdtWMrNB|vw*I10EuPRX zec&VP&9NNIvE))JEguf=;gjISJ%IfV(oy|Dpj(Y%RHFV4do!QMS-ab}6Q zc6^4IBe4Y3QMPq#d!+}r&RTl&O@^FPp_dP4+i%EPBRn?Db(~F<3m5m~?4o7uDlvTy z=RM*1EeCuO%<-iCFpVeb@NUXNve3lRjE&SZuy->_b3H~IE*y( zSPDDCz8djuLNjhTA;{mvs$Vi29 zr2a2FC8 zBRb8VJt*I|-A{n6Ly~oho>;mHBTQy8^R+}TF^1oYQ2Q8$E4Ppgwln(G4t88vPoAzz z!faQYtR%h9|Do`o7DUr)JXGHN0e*Fq6%&UHSTxwXB|0Z{sARYqbH_wh}+kx z@J`$x3-*hFp0;=b@r->)_3?P$c`zKFXJwwn36;k|*_!yegI205=ek2Unax_kK#D`n6MOT@vE9w~PR9?ny^y3V`Zs!C_rsL3(a z8uZK%(4(bdRh`_@<=vVN9DRjqGD6h{=!@cN;pLh6rQW2bL}=4oFKRnG-uc#@yMzl*$KOgBboL3d%vi`$mSW0l-NxW-Wrz5MFl})KP zcKZbPXVw?&=-r`NEo~VW>taAaIj@_1YC?pv#e4gXcS6b*b|re0gUg(Kc<15MN%J+h z0rg8tc178Q1?;mL%K+%J)?7;@%8ZdGVFft^~$9D(pk`c3} zMWxerrfRJikk@rq@;I}stA(peWul)N^xox|vv4UjALKbTi}PZ+v@KWf-(gdZ8*S&C z$uw!69kE*MNID-j026yn7)s7NV&zimKd1|LXNBA!iXA(0#D#{iuP)!Ih-I5D+*v9^ z)Ia?Z%O)^yXH*i$C`pY$c~S!B;Cf9wvS|PS;ni;|zpHR$oi4lsW}cvbX!EV?ZbYTk zc*%_xjyru?dF;WqnG)v6Q!}u%JyA+?-bu0xOWvE&K@(EnG1c^_3CsL)< zDpuJ^l0Qq{D})0)q&@%$Sz1%1c2|cxTex2Ho^Xw`>9>?lI|#SJvpcE*t5#p46@H%` zzVDF9G-=7wGmpc}vQ9p|Rx`SyZ)S-~Gkvl0ais2M@n?3> zwrj%boN-e&t}(}rDljE`39hlJn?#)Aak0xdVSg)&M046ZafdF98-tM5IsK;WF(Zx} z6<|bliPX`ln*{9QezD8BidJ>fQzEScXH%V%y4nQEGmJV;3jeNEG)<$lYa7rfC$hlG z_S`%1UT}%l(aG8*?BZE5{@L7(GH@7u4ajdN1=$Wxy2k+%A*G2sL`C8JXH9ha%``>Z zmRwWG<%2``bPxs@{=M^(8PzCywEo#2i4L=Q&pf_XrXng{66OWRzSh7}rY2BQ;|(|7 zxq8iX;m&93TsWfcAImMkZbIF{ID3G$iofr3B3BsX2z|NoC=B2#gb}cDGk<`REi|1vi zRZ=f~uqh2VDSy4;;a(TJ{4X9;{z|_6e{z}PpL&T4-c>zhr&UG58?;Q<(TA$@a<WIKG;oIFk0xFJ!z#z0vK0N zzQML#6P$n#2OoYKU&hi~tqvomulD$p&fNbX`Lt)J}>vqGQ3 zP|X^7PzFHPdbkG4R*W~28kLDp(Gs6fV%-%7Uff`6SG38tb+PZ7Xzz*=-J_d^m4@?C zSYr^MsZBsIRZ)zyNPfhc>JbHCNoE9on01&Cj1t1D8Z~>jRbo;Dai+%t>^66S{DU*}TGmIx3!) zrsbYy&X49c`0IKmR8A2yZQ-MvXzl*z?hRVZ7(vOFMoYe})LkNJ>2g}w7L3OMU_{q> z)U73toWmoc*{lfSt5eU_fSxA@O!XZc!i2Q9`1`T~_5`>@TCVd_xw(RXn;Ns4AG>I@ zjFuLaNCTq>)}{nMSOC)7IT9)*k&hth>uvVc5w(+i=AFi|ogGC%bSaEX&RJ?YORAG> zIUW$2P3|fBQ}(-s&R$_z`xfH|{!5iX7?hZTZ_MJ962Z_Cjg1~yo69FJ6KBz52EaG; zt|Z1X9YUD>hh-RFSp!)}Y*(Z~g`;!1(q@UhEYaFON<$y6YAgrsmDUKQQ3vhW`;)+P z%t!l1{4;DU|Mt>ni7rbM zdqNQ#bHI2hp-Q}-o4)y_Gr%n~!uQW62<%ZCg!b zQ~jK|YMvip42T*>*QP7V*6bnXq^@Q61bnn|9W+r71z3*!=yI_JEpL;*Io>2QR@`PH zYVC>oaF;u3#vJI!$(3?5$>OyvdSk84dXIH11#us?kWYwwypi3N-XmY-*%yC$PUI#t zV1APAZhoA^WaXF?XvOsFZ8jqy;vJY3{xi2vDB)c^v zHZPdS-IIl9sUgzBTVXOStj$B=v@0z5>-Kiw?T^6Q!$QI^pp+~h_m6~o$DRvH?y`Gg z6UssuJO>1MmKyLM*gB&C2LiV@*>=WW3Ug1gdaW~#vIP-_JdfP4 z6z6!BN#|rWF#?)Q?@G;^2T>Sf;b?$mz*@)Gpo|l ztVx0VO0S@@PP}mSc1=Xb$BR=eliy?%U|1l)aacrqcu!NXOfgfKCcnrqBguG}bR)Rh z26^a~kYCs`v~E`nDqY&NB{qL(*OO|;lH2s z{|y{1BmFN~?%%FO80hF(ehG8~X=%WJ>`?iC&PY2L)7raQIhgzvWM}y|0J8KzDZF1W zED-Vr`Xc&;d$TeE_0xf&-_$G<+iwK=pA*Xa8zK9rZxnrN%m3^&vkT^Io!C{yD6Sn*m={k?#cNR)ixYoY1+379-fzox9iI@hkn~U zC&*f^H-P#hMzj>lkf%?YuGW70+wETb?IzFb$#nXwh4$;on@85N{ezSZjb>!p`FwEd z_0Dak$HTC7`s+2IJ>mRvSzBD)k#n~GU>Gq~03*Bs{OrJ19KTc_xYp+L$@k%fw|n>>g6ZAR!r zkB1X&?IG~DrJM_qj>3YOl*K$t=keS8;KpDN(~|GS&)$(g#l?*GOBKL#xOoqUX4N03 zAiZky7qrKx8!pf6O;;^rzKrItwYZ+&n3OT(ZAqRSotk^Qowhzc8lVh*q0gWQrVGn{ zO^q#av?t$s=V3k6YWV5;0kg0fQFN7u((#U_ko4(9?rvTA@brxErbmt^(>@}{Dm~WC zEq&%^y*QV*c42;d;LOzxK_SmD-Gf{F%y7rYp3A|>yk!-x^;We*{4sp)6 zYfEbgFB&pk1=TyJsVZ4l%g1cNq}+UG7bxzt5~2J_xm5<;;-*96V-}jXwpp zQ=__n6M)%yer%B6Ny{E_v~8?hDl?z@i2NdxucvydZHjXt-zs)GFsLZ6=?;+aCdO&Y zbf#Gl2!Bo-i#5iXTf7ls{;?UIuKcsAE|R#kw|tj;5@%jx)7t@+yO$^l5w6?V`8yxo z4fuIR8Z#fQ8sybQn{af*oinG_rj4ureV%Y_ ze=4V3e5D<2X_r*DpSW54s?3f1Y(Xk$2ZBh=SZkhFZ_QJWS=3+(lV_yzBmoxPt%qF* zuO`IASpg^ikOzNkfd-YsV9TIJm`_8u9x!4mHF^4hIeIOs9kjD`%xTtu`7r=#B@7ua zNt$4kG0)6FIq{|W;p_F`^tiieR!;x4Gf_e7<=zN=I~#}7)e~p>+0+u^WqognM*J(K z4u4baC=xpyMz4)0!^|G#_f3#CIM}7eZkBG(w{P0(YgfiJl+{?!+7}eZ9}eSEbGdkz z4x2Yq&)VJ=n(a~i^hn`%5$Py!8Le33cjR}xL8rYURyb`=ppaO7-A`7yyTbB~`n-+G z!gn5+ArD3-l3~TB?W4h&hzcYR4#Qb$cSc zTKe=iwersDlZ%8=#XSU!iUXAo#wx}Jm3lDtg8t$Yf#%=oSzJ}J^BZBdCAw*?OS-tb zhc1Sj;Jj+KncqgP6d7&@=%?YfVfM5VQ*I)pD_urz;MOMB>AT(KUyoSi z+J3#Do;JRW6rkfSutf6|UsoY7uIh>>=TqN3ja#Nk*M20Cl==*nl+3Q&fMigfuhJ&?Z(w-;GT8TElmzU@pODbfJ5CsMK^mE*ZTx~MT&FmCY@ zxf|ffam2s}=iI5QBF^D_AAxsj_)~Vb{bR2UInIWdKV@DMTA(iV$;u{=R|Cy1QS443 zT6Zp7(iOpXt1?zNbJIP9w~OwZG81t~fj;?;&7(rH+o%Q?cTw@STH!M$8B-%d1}wR7}(-D zNBOlmL$ciI_FIlPdv~^R9MZS1)EJiCY1yQ&UIl?M%h)yIZ=*Nj4TnE`&icNE|_*v zbqu1pzFjlx-E*C5*2l9R4yvWeiojesCzfl-HOB`fQb?R9L1h3nxt0W*H!sRwSTdLN z#|a*~PTi=}`MuQv9?B`Yel{_~9|%$lO@P&%z@wR4SzG}jt{tg!r(%^g(nBRr+Uo4# zSho$ReJAxrM>SuHx?Fbn>u+erRnMlVl@XSpD|t#yy`?s+a>KFCPI6ObD2PSsgY-j5 zh0*|h)c0y#$n>fyfWth<#h_8g+RQC0*4}Ps7yf;EArT zuLuAbM+(M|yY{1drMb@);@4;rUli)8(F|C28v!TuPhl|Mb;DgqbXGWqoZRs$SltS% zK7dbWpGKnH^c}OKK3iPmL7$9#!(^lw30FBebPrgU!@zw1#;(~Par=$R%X11I#(f<5 zQdYU^$%Rzq!-p=HBK5=PdmuVOEY@T3w7d7%a3(8kJ;bzb^srdRbh%fLaz<*#zPo13 z`sR}L&6@hsC9>z+d=1S9UOHYM-+uHwj^;n(!p5MBje*Cl^;)N&2V!;MFQHb@Ni zdCc5>&w=@*Y_l0q!GIZegmy*Z-W3%x`SeZjaZP*wbiWI&%=ht%Ra&fdhbV=lX{O@n zvR2S|#ZaOjj|JIIy;6tZ7)lIIe=IEZ^`me)qp~nub1-?-*#{(Ft9#rdwv?t+0**yMHeZ$7M8x z?rCm9U~UPI_%fW|?)i9xec^vMpU@|?z%d4KKgj(_n6m(BYu~m)95JGBYTiGAfG1#9 zO8YA%K{7pIyb`lx*)Y$@!ipfj^K)P#c1l0~?edtRJ~>l(Y;G&64R_H=cjHIy@f*jw zW&`I6iiZBa8?Ep1l-v}}Ek9OS=a}`5=I4xY%&pQ|6CtV7z#o^E4yz(YEP=;e)+)8gk6t8~ors1}U!s0zki zQ^{e`Q`L=!d@YTJe2Wqpn%U%yXpM$!k-jG`zk>CtqhaT@L}FMPIcy#<=|7WCE|VcL z8gkPei}9cxi8)7QV#qcYJ7q~KT^xy_g1!a?e)~cFIG1ZYlv%o&iD*3J%FB~do#j*l zzNRMLk>X$ZXqSMeXGubzIKTJ-dz`U?d&0Wv=qRiWA}4Xp%e0YvOgFT)Pvz(LT9ool zes%q@HfA+E3+0Z;?mNRO#8apfPUmux_Gp?FH2hDPsU_Q*xK6p>rssM&rJl!CK%5g@ zW<+*+w^jCYZ17`6Ciw!J%scnbD3gX5vIZ{hY6G~2sGlpu=-AsVK^332@Kd>}Mz!FO zWj-R*R0wSMpk{ z&KW2z_2Z|Tw7vQ`A}Nw9jD)lzCs?a{z466yOxd-yne~*@uDRG~L_0@wr=RP^KsJxA z;eFPcdemS@!8B5<1oT$7XhcHDY@#f$q4tA$QEpTzx=9UZ-fULWLziP$GGvukJBQF~ zb%#6d+^@~MzIk;*c)B@cIUR@f+J}YEIR`&{^)If~nQl^}{Hj)pM51h-+2*UV3-BAI zC>Q-0(DCsWd3WFcp-PRYW~H`d4vMmrwiwWLZ5Afes8+0^T^gW=IBXV1JJ#E2p-)3} zZff62{{+AwseZEu_ajO*PbH6TBuT1DE(XM0Y8Xp;-iNL6PajsPQNnV^&J%~m1OXGH zaSxhRt6(~9045)Daebt6P_3?P4z@(N8ZYQF)9}M?focvaHl)@U;JH*mGq(h;RWjAEj7q+dqnsT=v{Nu^jFgOXhz6_@m!(J7Yd9_sBpJ>BJE`B=e)1LW-$I#Gqu zEV^YoO~NS>M#zxrHVb@*S~0q|*I;$A!zl{3$hsheV-dU7~YfUEWQ`^iSf}?!Sl+lpQvfFiy2SKh9O}T^FIicgO*Vg3ZiSgVuqqFWAJk!nYNxOU-O)1PGIg4i~I3MeixZpR#ma=Rrk}j%U7I3we4}}^EQ_~__abzTa44%4rr^D zGw2KEb{yIFzWzfXgZ=z0O^+k6FO=@jwlRUzqcqT<-l{lP#-cGPWsjh>{W zjGK4GMhHx2Ytz@#rD69Y7$Sy*(Ji!mq9=%Ai3%MiWuAS17qDhh#>&R!D{NZnR1?m? z(ZA(qgr!m_ZEIyurm>gv?0nU-F++eD%reFt?G*Uc2kdOH3{B=C_4!r^)=P)_lcJA^ zIq{mB3~JZjhI9W&h|n0%Z*2e5;%O5;+kE4N_x zZ=$P~lsB*Uk}$o4@hW=Ir)1RF%L4k3wG-YP%eyDpH>o+-Lmd=G4`Nf1UaDFQjpVaG zQDx5V)SqrOs$g@mHG(;`IG-|5_0@y-dDEno8%_p{mRGItr|h0(PJe^w~dqnyjmUkC=@Wg5ZQv*21zxMJtFgm_o2%_x)bl8yu( z?$C!TPr@jaSd~19BIer1CI4r){vu7EZiXhF5Sj)xJtxyFyfg}Z$>(``bW@g-A;{z54k+6y1{u{9 zU%;>`ytW}PqU z*0X229D5n#wjB8vT*r~CTo-5hmM8*RqRDRC+cnYS4wcz*(Z)%=osGxS z0H5kP%Fab?0;H2DO~fVbz%2_*%g$Bp!7U3#%QD~rqiEN#rcsn8$&z*fdr_!02tvXjB-+X+0^D9L^0^ybKCkT@TT`~oELlU~bQF%-l$P(5TN#TL1&cNy* z@I`}jf=OC9KuX#=V23eVEck-^XnkN(|7tQ>on;h~S+bcvUL{Dk9!%tDNVxHEekC?PkKl-3aorqDD;Ho5lGd4!P zqaBJ)-#Hzf%PBf5gfku|6a-9LAL09SgGrw|-yfahsyJTRbrUg7Re~c))OvFkNLS(1 zdQ%oi?l<7!fIN8ho}5KOl2LSe%Z1-3fMXx=LY7v-ZpWSPW`{sWPXmWe@QNkf5*v4g z6*`#9dsw(<@Gr1wyd z0Z}3R5>j?vcz-eA1qKjZw^F_W4ReJOMt<(qAt;YXY8z&HNi;m>FgGW2theLWYvfP+ z*ZJg82hQ>i(*m*s)A9N2&q9`&ZY9SW&^{e{bFc)cCFWNe(3zU=%s<{`t&RX4Y^2(i(sP87xSMe&=<(vQqTyxe zOqPdkfhx_OkC8s$r{mU*AK|v8vwgRv@Fb@@=iqKg+3*`S+dtasM>kv`hKHl2Q|@Lt(v6ETgK9fklzREZ1TPG(LU%_K+|5+cwpH}E~e z*pO2@SR~Zrtn_fTZ4X(V;~_Bcn9TRBouvnt$PzNNUvV@jm^uP8EW=JS;KQx5YscPa zX=+n2ClCrqS8~wk01QgYHWSC~IssmWt=65B)-Va*_Xf{d5zpENvnS685lExrz$bb( zeMt~7oO<|Z9V2`A%B>@NHn+lAHD-LkTH6I7kZG*q(EW#U1$%|?H@{3p(Mq}RkaSdR z>TZCnP}`uLa;e@fd)bl_#IXM*;JoD5ZJjy6Z8UpIF)>;G76xu z=!79SQ^{QWtddzrqe5^z70tE}jKs*5m@OiG*=riWmrr`3tFr(!;@v5?3k)2pN3bAB zTYnZPEjWQ6&)D>xZ>D`R!Xot)q zMqnYD-~IY>|AC1nZU<9eX?meYms_t=nm0_0b}8_2E$+d*BrU zdTuPytD+iww(yleXGKdOLWnBiQH}Mm3x`==M4kI0O+hfSr46i-sJ<%rSt>D;5*w72KSiS-AmeWXuR#B)QwhQr9#vKY)bQiH3{pS927Vih zgsAabuuPe+z_1haZr|q`RLbtg8`%(WHKYmMJB;c&iX4GVsy01CnfhS23qI0rb{Ty4 zD|;UtPZrO>lWjLWJ_abXF*1k?+irXX)@t1kZoNH8*QPq2pp%4$AVoFOeu8WHK7<$3 z9XNgyAtb1N9|qv2m_dP4s3D!S6$CZV5t`8Ws=(cbPX=jc#^jL-?|wR!*tOvYjz_NI zfwLIQrYdkh8Nh54ghhtY2a2U7y6<<`5aht{qmRreJ~-M#21KyG3@8h#oQx#FXSGAK z+bI6S&rE3TnIBwc^nA5QzS+DB(S5=RtWZI>zQ9I!uS=`-k@*vY!oce@Q=mTz8<=*> zDNoO5dU2W{*Y3~s)(ynF)bTm?-JcI)Ft;I28;Db}X+-zFiBC1|L^)Uizjk~c6rsV4 z@04o9WHNOjPU3M!#0h}(RC^3QJ)dMlBlq1X&Tl}E0qR1%B@@f}L{UNw|1s7v_Hu%)q( zU*q8Y1Zj0TGukVlFxJJ?nRREk!;lxV(~Y7XJOh2v<-rWVLK3D;&>GyI~ z{ds!{!K_sLb$}-dbOM`hLNH47!VR6ssUjVuHcog4X3)CO2(ae#RZzr4(D&9|e13b9 z?|mYqWPN$E7dr3q|L8vMhDi2lNrF%%XVe<$Ziie)AiGp7rPu{TQ7O(yqGQPb$uT#{ z=&Nu6yEPlAaWpn@gu?i*0{33qA6!uF2KLe9pq%l@4Z=||{R4dAy0+Ax4`yDJP{Nrw$tREZZ`J9cxv` zmbuAi%f~ zU|C~Ya8q#OjjY_)5F0H$=JY%c&zZt?=uJI6uy(5MgV=dn#oRA=9R0Bz2GXAC8ZFDt zeYTl_dnN6qO(HO~o&``=uhBOdomVdqa}yHR>--QlN0rcB&(*evU=Em@|dQVc#*Ii#?NXlhsl15sx78(CX# zIdgxGEVXMk@9l2BeyyrK>l!YT*Wwn&!eo;x(y_X=_fO^2&l&n2^f_=>8=j$PZ&U>s z+BMilc-Q8Rb#SCGgp^gf4H;4vEH?c%e5s388Ac5iY_+R8tyr@Gk?;xtS@=0P7IPx_ z(a5Mx14m+Jzch%5FZnazQLG=X9X>KufxtpN_z4DSfa(cr>7hNOG6*Qw=`>^@*s;hk zu9PW7=_pby@{Zah+YNp*`(}<7%zw&W+)5PY|YFCbEPo%oYC{)WBlao zO>eHr8pN;aAs8!FmZjw(gC^|@vY4E1#9EeK0ypnXvxjMbKb305zyrdiAP(_wfy&U=q2Gxu@Tlit-dMe%A7_l4G{9HFMKHN#yASuQn% z*nK01Gj5>H56vZGr7SXgXHK7U;O9aUXBTfEPW8Ge2 zKZN5z087+YmI?;p=N>xz^hDvb-B==3mHpf1kr4i4$EEFe)vVdq6g`|yf&S(m?8nouyItNeN*?Z({|gZBuOgQJuY!2A!T|i=TEV{% zrhkV*GRq$#0KXwNIsD%Ym>dw#`j3r;zqzXaeq$l)Uw0?`%OamFe=uV}_Kk)4H?jv* zBmh!ke}ZHzEDZlV#`mv6V}HLb@_&oG{lW}?BX2BBjK50C3e=*e2hxZvfZtNX%)exX zzZlv(;FJB*RkgEov~i&Rn_8-&mBBA9O4h&Pp8s+!(lY{`T>mNuu!8_8ykDFh5QAg^ z7KEAkx4z~-C2#z<3jA;3!T+Qk`i~6W-*4aeUsfmMFXzv|1ITa!by0y<0L=i<(c?3* z{hQc9Rz?Q8e=PT32l>BT{XqZJzl!|}-~@Vi26h8rCuaK91WdoJ_}vTsuN3P4wf3!T zfb!p_4!Tyf4t9oyw11OWrndi!IxXwJfvTkk06R4B0Cp)R`rjiHXb>Y%Q=N(7w~7B6 z$oU^-{|$5MSzDX`mYxL;3Oj29M|}rVYbzQP2TO~8Y@B}sUd!;S^8gKD!Dj?|PyaPE zn1O=t0N~hQr2kFZ{&US^WNKl^PD@McU}-}uscUC$VC`(BU@c={Bm&gYwEzkwTQHg% zJ3E@X(AYWC)7m@#l@(_FH!!xpyodkUD)ekXN8-PS2oq561xP;s(eeHjy!O8x=zlNx z{6}wdb)dD=wJ|lYGt{?sGPHC3hlXPNdjj`=Ir^D_THe1727LNov%+uF7}$Vj0S^{@ zde%R>9rM3p;6L)ibc{4~tSofQ|5*CJ7q$7{mi|wOn;D;;5$Gr3S2v>vs{aGq2v~e3 ze0sp2#i##Q%J1y#Ok=NaYWT~6xhb&f9cX?L-GBZ^l3m(_op~D&{+d;@&n-i_U``M+JD6`18dXY{{%pEpPrrx zK+DL?2%u-C|HpRu`ziW=;=1YoqBeBmxfrg=@eAxGOozWV9Rt<*_`^Z`#iIG0H*bA0 z?627KU@U=XpT^h{l@*2250#85?N21FAOaIU!mWjl?zFQAzCGn*KPRTN8K&C1 zJb2YQ}#1hlZ6Io>sVUnww^!i{FdW|*F8qSVl9QhMwA)#hrj zf16aVJB%d2R@OnH0n<8rHVd{}(p}#orHNxDMtM?|p2>^ldnN({8uBV{* zz2)V>+w*Zcoo8{1?l5tkCsE9x>4!N<@)Ay?ui;p7@li{;4qTjaL1PnJjMin^oSfJ* z4dTG;C>WOg?2uo+BY0}vW6@Vg_9d97l;LK5u@4_{N{#F#(>Ev*QfR3Q%v7{hQTQ(OPPWo;S+&VE34@Jy;P*%3D4E8-CSzXH3;}#Ct>GaUo@WYbSvL6oDq|#sK{bj@n^Y;G z?K6q4d3-`y7zlkWN2MNGjTh2U?oEb@dUky;y9H4+i~fQ#Q*~~;huwU7kL@b;m(+rw zM>*Nsl%h5~?0mvggZ7E`9ziBX4DCjw&0TE9iy2Vr9r1kZU-DQ6~dL@+P&&`2r!%$qIo39@+V0 zEyFkN=huCFNb`kkTGFV{2<%Gv96BWGB~?B81@149)UEdrY9{XO4+=L#r4V=&9-^d5 z1D~olLuhe64kFg?ol;oHGh%a4VPRGZ+~rbeJ?qngi@yo+>^_o<;ZUk+7lFjVCL5Hp zC4XA*dbw(El?_l+mK@VwQlmWfD2<`aSqHqGmWi31i}K9M1T|Ak%^;74vd`nqQMNNf zw35ycdlO-rDY1JN!5q#55jU6J$(76c@|sKc6%55qhg$1~bfbWnBSXR3n2_4nqLDcE z%r-ftu)R|1*5M@Nm&Ujk_L!|#F2r@Q?6q5~{9*CjCXZ!}@ga^v1j&yMnJyNVmg|Qn zPatCMPeKh|Zf_5T9ssyt5bYSJ!is)6%42#9R40&DDLx7`uv66Ak1Q}8KD`p?YVba@ zIp|m)I=@WjRG@rJO$SCo8SGHiC3R6;z&wU=m#FSq!_B5yIO1zXY71gFvc@yZPDNJG z@G(=cb4Sc%UwJ}CbJ}-SsDAqRuxj#+eJQ#NcW_LnS7vVeR~8%rskwt$z?8GofGGoi z$t>=Y+9;|(X^>xl)VDQiY%0m0NzBdL6Bcy)XWh!b&muExz(1;$ zbTw?6S%N*ec@4}`IbQb821ltg5oA{9H6|bmu;Aswo;@+Ju_xo+oV1}!pe#RH#G{DX$xbS>)? z_J;HleL(5<<_Rq1gHU>FyA+PKX5p~HI%A;`H>0x+|t?-uFNvor2<)gDg(}&p+wHEVXQ< z>EzB|$z^9DXBGz!ZDeIJG!zwt{>rsFcxXXL(9lIzw(-zB#W77`=4etzR@hZW_ClQ% zQoY)y>h|_$4{pvD)_$vRaqeBZimF+DR=Dk8GSczULuIg;hP-U@&#SVk2hKgpm0`r6 ztuar8@cVnSB6YY$9{bc@@#qge=*hXYh&c&%^)n8uYhrWE&0ycBWG}LxY~u(&S^A6_ zI-K8%z`AG$5U3g%JG$;F6&{l&HAR!a1wS~Qd-mdoN2 zVdd`o7tk?s3xN<8PI%-cQ;3}9Y@`pKK2a}-QVDa~=BtP#awMO7H2EOuEZR1{RO;dGNCw+EN!iJXGpy-5N5j`(qK~CY_b&VQD zYFIonbcx*nD??7{NChJW2H~8b(?+Q}m-SH*T5(Z{&m~dWTRq9r*gumEel?46YYmj) zzHR#gjqnm~S053%9%fXK%_VvsGtY$tA#PChV*_lC%xJPJrtG^hAFNL?7->bHYzQ}D zLytzt8ga!J(DcU}kuM zPbxQG%+Ln9n3zrYJ~y+A@*X4z5+OkZS44q6qsWMbHC=SwMac=U%SK$G$>bOVpR~L|2pIt>wR(K|V)5)Wrk}{{`Bv7H!byFg>6hTK6 zVT;~nq(0>}pD?UbsJwDw>wBk3#{hQDgruTziE?Jx{83;1_6%X^?&GQM=6RM(W)8P2 zq0v@b)0&GbV`PPEdkX3pBknWf7^owYLHcLws?}lDo?TwJLrrX5LWP{V>{1wh5 zrY$3-pC7ZV)m5O04@``y%DLMNz74Y|JK^<#6n06QtJe&?W;78B>cHM^_mFu?a!eVs zod?8ueE~~v_&?mebyQtV*6^7G0>L%726uONcXtc!t`~QAcL?t8?(Xgc2<~okljrH4 zneO$@H~mfjHEU6;&MD3<+a>!{onP%038x!TcVk!zEhDWx4oe~A#iIg|Mf4X^kKmIM zjGsRZP$A0SZ?heoE~xQYBT9r}#z-m$&~78fP*P{pdo3gT@E6#qf*ZB{zFq15z)ZAF z$jrV1_skmLc_*JuCu?NCzZ_B)s`?SZ*;qLKV`YyAc8xCg)BYP zA~Ly!h&%z@g5u1Vl4bQ9Z59G!k#mBkale7420E*|U+CI*zo3@xehH-d^*kFay<*>X zNz-{EIVFfZ>%O}JzowiQWjZmB!tuqvm`*Dqbr% zE!zexiOUUak(5I?iIfBExBHWv#trC#Po%x#!>x(MbktRqP}F9R*wSjiY`ucF0>@cT zk4Wd1TS!`!&530-EQ{VY0Qx!9vq=C~9uCS`W{D;Oppv*zhxdJiiv{c#sg{I!+i|4j zY*x-0T#H;>rY5%ryx#rq#q}I6+uujxIkabZis9YPn@^>{!t~va(VQ?D5JsEY!ty@ za0#Qan8=;Ngogi)*-lY7$$%MpV$cF@l~yqjHBej^)0m46s4eLh<#Ey~z9c65xv?2B ztk4iQY+TGvQ|Q;%y&+MU-_)xHSZZDw{ZWx+@*t6Txb_#-u69qTwhXv#X?1I5p+xvQ zAjJU(z2nRl-9noGXLkpseR2x#Kp#l?Lhw7`22OKGcj7!{z%;Jwchoo|E)*suq4%?zx=R zq|k;zrOT`X^fcdjEauo=1MO11inJMpPwZ^2pp_N!T5#fp*_&S$b6PG@*-lLNtL?Nl z#XNvg+fG1R?WBjamjf><5VN{6`hW@mFq|3L4-+$VyFZXzH|c?T60ws@*mUNYZy01# z5PyC(Xs1lUHx{l)m~7eo%bw}EMEt|lIcecP-^u!%^&;$zY^rn6)|O;rWbDU*(S^bE zZxK(VZ1)H2+tB5rtqpr{kJk@*n2BJU@{GP*efjQ56Ge~PL1dJp6H&zHlf3GQdcf%> zT!z-EF1NI)PZT&GdX%@ccwCF1XmP+oo&?tAx*{OW6!4h>{z`@gdW5Zbq@V68Zqw`GG3gGKna zZn9~<*17vYd9kY(g5I)aV>oth2owAUNNf%e7`dKJ$97!->Ld*agMD6e2fhgGsBCgz0~jN z-6f@-0g)d+rM+$IafnJ?N%EJg(X0+Y0c<*zAHEg1q&`~bIFw@CI<3KX3Ug0Bx5P|- zU?_yQC$+wFL|?nSYFl13wE67@N3V&OQT>jo1vk!)>D#WZpr2dlfX~0u)r0^a>bL&( zJe>Aj#}DzRscUN`huar6!;O<;{Z0b#i8R1E-Jh4}(b|;-^3-Tv%`wFneaEySisv`k4o;T$b z6q5bni4Vh^aT^xf^i8xfU@T({hvO*Jeo)unZF)J;wUbHyT-FARUi5H6EhQVzT%%Zd zK||TkfrO!TLL39?;8=UJL6g78!$2F~z*iMaCv|aFZ~E*-&|S4oLp#=P!4+FVU{V>kTJkxDbPxk47-G8++AS zu+kPIEe(d|i}nzOS}h{34gm}~*l;EsfqHw1sJ>axoRr~6TXi3X~&n|o^(_mG7{ zb(WNxMV1t8t+JRwaD?Y8^?YK3jkaaG6*P({P`Y%Mk)f(JVa1Enoa>VvUeqze=rFuY` zO0Ma2O*HrI>!S<8mnMXDkYyM-uUbShQPfw79Es)kH5DdjiTKu&fm5arRiWs)mQgP1 zw(!MaUy6e$b1pY zJq|xi>pjuRhpF?T=KH?|NP^kbG7pT<3XJy_SH2UpJ5nn&FQ!V7Is(!Tm-9arr zFEIua^}*zcc4a@|0`=rALB z&DU?nWpbRG(90B4!0ey_vx5rBlX*C~>?uG*A=_QNV^%U>D!iwg#Hao?T|ofCCDU%u$SGbhgpYMQa(r^1;u2W-Nq_+tyZ2-}-4fRg7H0jl zF|2({XQ~Dkf4y$Dt=-L#a$mNf%bAr!1344Y6BTdXJgmd7zfqUw?b|wyFuwf-E2O; zjbx{sTTr`4zpZSg1Tn->Y_l4MJyj8ijqImC>5giz^EaRjkDd$-^Ql?j`eq=Kw)bjF zVP)CkQ=iA<$&_YWv$K)GgRX=iFr7>%A(={8vAQY2i&3>tZ;By?{I#ObBT1WV$GAPx zI_%pWooS2h@)APmXYt*`crG-HP;|2#M6Vh~)pR=iC^&VNgXAWu0XMj@`86>W+D)2DTVRJW;V7va6L0 zan!E@a90;LrEFBCbEi;=K>#-PlGD&RG3qZdUvq3or|4CNrgx2#K4YfXPdz#8oMQ`M zaNu7mFC3W;t)eI^VnAOdgXQQE_%R8Czk8CqxkgT8s&uIk<$l5`5LVthfeo6DZt!k= z)z|mX#9TG-p%Tu$bK;?1mS;Y@RUHS~JIH+!is2Gc_vnM{Wbry9E_C^p(C5%4kLC8l zo)D7Y^)?>2fAs^3o;f;(h`Gw!-a_}|;x!*=We^1vYZe^&76zv3)}x2)$AfFW&zh6q zUtJ<$+PW|>MZF}0CCoWO3w;h8SS5hlP+F@3Cghl68~6r)_&f8`*!f&!E`oV9o#}=Oq{h8Tjt=Yazdx_oK9BBbzqFtM74t`5=Xmb(mulP9+v_U+N}r ziPz0kIyKDo!2yf&$SQZx_<(b zsRwnJbWP!~rk`!#ZIu_t=yIivx4?@_nC0%S)}rNU`b7a+;;6*YSGopI4FFeEH=XI$ zSvZ*>V`iIJVp7B9A*p|BAVh*=cL1aU2mgHLc@NIIeVp|KSP2f+Ui&_v^P&9U{+*M% zcIciYkJPK^48gmNIq4b=$s&*Qc=TPWM)Np=(%2?u54ytk?IufY=LL#YM_#9k$<@H8 zI6Hn1dWIyQ(l|PeVc0IP`H(-+91!4{q?3;Y+#ul$zrqv0(7@7HKOmn zcR7?1m{}j?Bk0+IKggqz+YELG5S-maklsWz{lc_uH!1WEoAmCEnB)zL0Qzi&q90YV zKIYj=$9$4z6M}58MW<~u!_0}WSFMYnHO15`wDd0@&1QijF;_*R$1iRIa|7zD5SURP z?|^T!m{EMV-5r^@#~9Ok(g;ntda5b&>TS~pw5(O&EMJxFy}W#8MdnA1w&OHxJ?r3b z`)oct$JI}sEj_+vO(gc}zSe5wY@REq6_yU-qM}maxVQ(Es#V>A>`|;*b8Y8ZtE?fc zr_bH3Fk*6~1jV54se3Uc1vIVZHUm;kQed}E1^3hMtxvdKeQim`FoM+x^%DosxF#6j zp=PKDeLS)2ZEJ#Yg`w zo>s^m!=mX*+<^zmMu{%5S4-yVr&ijc9H}4cND}l2=ix2X!`!=NIOWqv zjMcb=`cW++VBx7*8oBogT{WEH(vyNo7VC#_jJ)gTq}`L0rTATvL2^!(gSxdEct*MM z63J0%#?y-L>rdn&Cg-=+rEkp>{sjq_CnJa)&tX zZZ!{G{#vA~9eC6{d}RE&P4JFO2*F0VYM1fE)F*vgtAffjrJQ^=USKt=4APpiR;=~B z>OT!ZyxfCIIW}W-&F?!?A+%s86BJ}>lBS}cgc%UI6bPo#M)e%KxjD@I1y=}$kMcBG zV3_zFz(lM0Q!?5GJaOp`e0^^znj{0~$As!=V{+6!$vZSQle2#cdksSP9?80dKM5nQ zi=x)xF?LW&NamceTrc9X-f5uBy^p6ZJL`OGqZy{Uc8T#%_d~g*pxI6bWt=;t3oI`N zA8eS+a}dasSwWLK0>%pt-?s7rhIEW>G@E!_f@=txD6UC*eHq}!El({=3e3z4mc zL9uP|3(>3=gg`q9zDS^qoKG9#zpum9+jfW`NqEZ^(x%z%sL-bRd?b=}i|R<{&U|L1 zC5C#cX;C}RMFNF|H}Saw?k6B031STkMbcvuUIo(CFT{IPw}%9OW0URw=*g8bP@*9| z@+D`)<49PFdbQb4k~apYXy?N_=y$N4>JXP^!r8PmWwqgHP{k>R64tItlG)fDq*yz< z8FlV6im&ND_*AklK>b?qfHfgQjNip%5IxPZ&aUTE=nd~z@Q2&)U~Yr94!(GCjSe*` zYOxTcGayP>TZ?h%mK`aaFh-0iia$&#!Grt4|76rC!RiR|3kGt5#iP0!{>Vo`b>T;@ zCnQ;uqIET~%s8ga0`orj52PlCd-uPh7)B{|3d%>TkMt8<6FdWJH#PDk8|FvCol76( z7&gkmB&5#nU>S~Hx-v^zPS83ouCELvA{%-l+yIayb2NS-fEh;iJ1n(#dJ`W;y> zd+g2;%wM)VK1_>qIt{yWM*4ej+{_mjq~@AuC=VhQ$|&Anx{p12AYl(K+rRWpN7<$aEgi$gLUQdP$X!DMMt;p$XDI|9l<@+P%nyb}T5?V7 z@9N?%DX!1N|Iy|ue26+S5M-euE!=NrmH;B~an^;ZgHC$_vgU+l}&K3mwDQ z_Mzs59qUR#%+6%n-Japi(h9l$RtF|2$g`sJV30U@mmm*{ZAa7|4PWK-iQATG(^`BW zO^@}Ymh9}z|MLF8CcinzYg^6nizAa1Js)j-@#a}?_M$aSu^;l3cal%x!Et);fkf~M zQt^|=QIPe+)*L=ZyZpDz<~@+~S_)1E_)!>d8{Qg^-Qx%8bIKuysy>3nma}yQwQoxu z+ST@D)bXxyh1t@q$1?`t8rjC<0YON++QeaRRN(^YRt;H`qhZ;j!X$x=lX1U%+~z<; zaxA%uz7AX(ah@{X>rH|1*Y4>=as1CN&ite}}pe$LcM@YO@VZzoI>)!BK6(QjA zVR+WV+uz2EC!H^(qeX?1T+G*5>Y(G>Oy3I|lyq9mxVmAJ3B}dX;qE#|ykW_6nN$YK zwfv#9!hE+BKet+VD(OLf2oVqD27gJcdq?A<|K_V>21=yR(>Jnobs`!J(k|gp(vHtM zl3B`F8rW+~J&m>*f5B0gPq-ZYZp)-Zu4O8cRb6LMkON^qsqd*c1h+9+a&jYu{PR?jAhSIk zDXxw^mG%{SMVbxO^)!0cBj1d30|5-iHxngwz~PaDyjP2eUY?7>40xdCxE9ky-$%>< zf@%f3gWf2eiII!DY&e{6)~P}tsLD(=O+K@f7ho>}Y_>TMIx16cnKmUj?8<{Zj7kgR zLCJJ(4e&b(%~D4Bm_!G@O+<6E7Ag)|4$`mMj0;oDEiyTz3pgWpM`3K@GR5yoF$pXW z&dG%JEag;VuzMU8;Lh6@_??DUw{N?FKk8o^z1FR8HN9l@MuQv$|{vun@EX)T@zP}(nTkb^MK-U zn>&^+7)&W6rXx)`MC1x`?612`^`L(gP9JFPhD@1|$k+BG9@O=dMSk#~ETBsxVaTz+ zOk@`;eE@vX4&WlW^Fs(PC+^bL_d;pjzE=i!9AXsCSf=J#1dr(YKA zTxqH|-}ko$?Cei8JD}*}E|HN22x7auNEh!MEaxj4Rgo4^Cf*W+$FwS1jJns4r2V1!d+Isb`l@&UoUA z!4-bgXXJCofM!H-I#z(Wf*N$$+lvoGE<5`VPM@yc+r-q-JrEzKlB^O81~YXOJm8D_ zvRe#Uv1p#VAaCr6b#d|jNR$nb-a9FGsbVx%iD`q3`aJp$qVW@p@!!EZ)_?!r{{LTK z-5)Ye9uIhqJ1rj2`%QQOy+23c;{oxLKX-qzcdUO5@Z$YpL*()PU=%>_cl`jp-{0*2 z-+(-}KN0?qr|Gl(7Z|MHSjlhVf)$UM?GMMm$cD#A3&iti{{vX&f5|f0+vqvC{p;8M z{{<3@j+X5=^aeb29*D*O?Eo+^()|tpFawdF-|)|WL@8KM>ls-70TqD2!k;tf{|PKG z(XuiCnGOafAe_d`@~=htZva@o5xBnu!Nm4E>p-ZCf$<+!0hs?fVxQ?h!eRbL-pAg` z)WN_+$H2nT9!M$vYhnHi5Y`{wijnP)2$+EA2vAIaaWTMZ{0+-6{YPd2{>O5BceT>7 zx3T=!0{l0?D>^znhQDak-*6x6UvM0dDfU-ssFJAz{d1% zng2b1{C~|n(8LNI^B>yzcT1uN8Y=lcUjPGH{xHw1|D7Sp&d}KO_h6*+2b?z2Gcf$O z!u%J&X&`9$yYc*H4*vou|DyK(F*^M=%>wK&!1?6AA`weHQwx1-7ad37aQkni`M=KH z|BtL2Ei)_azZx-#Bx;UacLxY@V5GA#FMx%N+HYG?Q!*7=WP+Lzo>rLhP>iqp43YAB|1!95-=@IHZk*=Rc$7^a-x!nX?`uge_wbwCI(^41~ zNz+AdDq|qy^9{QpZ8KUsjV?5E$4dl7Fms6?|`SM0L_ z&&D^=lElCr?Coc8QIpA!Bz~H>8;|Zpk7URY%rntp)vr^|@{P55_-RlBGQXXzr>SfM* zzuP-!+|%)TzM9-Dig$fH-4s>*?(;)u?Kaly@${bNJvZJ}VZ{80X1-U*Tf<&w@bqTp z+d}8dV$$Z@eG-syD{(TISAXtJ&5uCMl2s&vpx*1ydVgqyQv8wQ)#33Cc`d=X`sI!H zy26q-ThAj z*J0m{Vvphc23(roXq!~M(1>UDo_cj1v@3X^7wSJO;06}nlK45khOk2)%eX`5mM?01CNq}!jZBIzbxyqRcf-1DP!K4(7AYF;DPq7k?7vt-Z$Q}r=heOraX z%NS+;K9-Nav4tBy!Gd${)si>>8X&%mzTY2(Arpb%C3}f^OOPe}I#d|oDY#XJ`&c&@ z_0l{Q^}=>OiLQAl0xI)t4`zDHEYEXwVCFS(ap*GWcbv<^#{+3L7j88QeB-zVi zD`tJ#+uteY>-I@Df?a4A-V8S)sR;Murd+8h;HOGEy0|smQ%n@p>ktFdPB!l2l2dqY zK+XyEXR0w!re7kNUQKd5SDF*RXAWq7`JAtzF%^q|&Tiq(5hyb#JQ~PGT@lDed8ihN zJZjXs#itqOJI$@ofH@H;jrojxrPJtX;}FpfQ&WB3)4b75n{2Gl%N~u@+pUja4^Cy6 zVlCa7PU1=m`f)NTn{g7PNaE~Yq<~1s+5YM4;@a4QaYAvv|LsTT10H!je#7CQ3Ze(8 z_Ip)&8^bK8*RcL7GOPNiIo)OmK)1Pv(aSN{2$EPqE+^H3snrnxQtEBa6b@7R)FDkM zYr#%=AqkGOxSl5MD^anU+#^yv)Gf?_{o0iBu@DSw-Q={L@+u`Wp)>h+t>tAjWXmx` zqM9iwz+^DHs*;lm<$D8ubyWk|h|Zo(X1pG4+qO;d_c<;>+!Z{q5>`3dgiR!>-gwmK z9DOWH%6G6bC%{OqDEtm_`7!!Euj9(BT?L~v(&fU7+qCfuCn0pbK$4UnOoms)yW>z& z!8-eYO9T<0gBX_ zsyR_HYYU5UOo$CLFa1a6VLqyu zMElL=ulFzk**9}eP#A7p-;S3-fN?=iyVS@@%+J+Mn&Su9qP>sNj;(p{Q`If@&Uop{+9-bZPU*HNAFad-!DfRhrZz8=1 zoZ$Q)g=4d0VP2r)GxO)o_r`cl!{_u3gvB{1MUN6Jwn(z$`&RgX_B7rg#4V@lxCol@ z$v&fr`HC}NAjuw?aOo<{&`M;82SpBmiT$BCYJ9SM{$fG`?*p<+t4*#}Ap-VN-*xaCspE;B(-Eo4XMZ5b^Bv@!x7c)Nd3=}z7wH(pa#{wT$&di%!SEWr zl7b}SQHPCrOF_f3!mHvz`C3lndQy4uykNlN^n5?hr}3&a`O-dPpPg9OnVhE{RF>qiToo2q(zZwZ$4`ovyB`HlX`^ikoB1|}m5uehlNBOB#mc%5!c;MCa>1Qk z%P9^slJ*FK5=YLEyLem-J(GAL&XRMULPY8@e$}aCk)YtEy>hBT$B?T6JEvn3-~B-~ z{Yj?u2tD21D`TCmFavzv;6R*^^)0NH?m+`fro$eVq$5BiN#b^+s(e=YX^C2DhryaK za5rC1Iz&H#Dg~QYoy#Qx-O=7euQ1wnJ;x;AD%$h zBpl^oT*CvBnL2VynW=cS&fTCea!yw?uh+tBor+4m7Wijvl<=Pxu&q-Srm?ltxntSS zfV*c`*77g{*mW)X%cE8&MQ!7S(&KSIDao5Vccf}x4d)J~q^euy+hHJ)!I;sQnh(o8 zo-tRaun`@`?r-LVbpgtsh*W&O&UhUKn&%Nf$g7>C1-M+uKL>*W6arYlpW%#Kmw{&4 zV7-!NTDGsVs!-u~bF9cqvo?Cl8=8sq)4`g^BRebs*7&R}DOXffFiNB6;Tp94U2Q0y zeU(~P-}4NbxWL7N*ehzGUydf`Z|y~(X!}H>RC^eEbe~gsui4}y>m9JdJ^{)1XR~bbl__b!D9*+z^6e+;xnVC3s`)~6o_VE4a76H zfvq04LF4~FZ!XaE?R|*)0zIMehhA;rHoe{4ih>@Dq9A?lZXXb`^Mg{ql(?%x+7y9T zeV}m+ zw-nO~Rg`Y$+Ar0^z?6D*PY>`vHFKKbGs|`aEd^VL(3uRtW14iLErosfz7?8GW&fdO zt3Elv{)63lH**$#pAot$FHQZ2%^L5vgDpyj>Tkm}^A+OBeBw1dy$B5Z@v(tm+jyp$ zs-hU5xX8d_aY2PW?V}m^#n)aK*cNIOMu(=B&@W)|C> zAvHZR!0Io@!MePVO2;Y(uts1IvF>`CrDsG4uts6h$jyA%l;f`ZyR6`10%=WZGw`eu z7@t&P2bu$bu_ZEsQWHuw2t)vr5}Sc%K42fZNIv%NUYWFtXM98uO;yGrg7J_D=VOsb zUGSumfV|(j1`C0VJ^QK+Ihb=1jbT+>ljnJX=*!- znIX!TYw>4OWc91XK~m1?0nJh%uY``w=>ckNbb7E~fmKbO-kpGhv@g32Widlk0(_cG z5$&j34hQ)36n8p1@F5h%-Ee68BH9bY9}=nokOF^e-+m4d_C+>egRmMd1{4}AFrMfBE^U8E5S2cQ z;uj=_(rfjx9yZ0M``>EW4+#s~hNe7slBQFFj~1olt{a0Lj${tzG^Jwu#7U>_!lj8$ z7S%L@%gVirW_{MHQEs0_{Lih|i@o6NKf~=LjjG%nN0=DF4yTCgJg;DGN_ntXJ(6cx zWU+)Zg$j-vy1#5Cl^4jBFGaS$I5BsxKQP}f#O_a@*pFK9-=;73)dN4*0^Kct&~eu! zhPN0Qk(8t2KL>4t4Eu&N2xkONS9OlznS8+) zFh#hTd^!dPS^M=ayJw6CIr1oUaPXKRAP*%_JuR*?7Axs2blZmT)x~ovvz8q~^G;9O zNNg=A^JYM&{>WiUytF0E{t|cbiMFtyfnSp!qW@=AkVOI3+I3+`XqFde8&gPaFD&e` z!pC{+dQ)S|7Nt&BGnvm$f=v(IaL5c#n$v1n9Y|zsZcdI_<}FEHR=wO84yZ32yFXue zlHhMrSes{S#dp&K!TZ_r6$A9(S`lNFRC~@zY0xnaVhC1_4VD<8NaML8$3j~XIgG^k z&vu^Ac8RogyYCyUpCAC%>B@6CKFX4(ln}UH8DCZvY`;y+;sLpw$OVlj>@Nf2%(RME z*|p~;#iJk*bYiBAk&Nazhq*CdK*Uss!8|#C)Sc#ce>E|{BjtKDA?MHx7XAiJs7HkP za2Y>yH)h{LWR{AjMA4hs#tbu#%qmNCw7f0DTXA=p{Z;bVM^lQQuz41CS7u8TWudm$ z*pBCvp&NbXXk+N%hW~}v0%VA`virlM?6$BX{IPJY)p32cxlAky|ox7nrSxt0kfQ@DPg@dd+^3 zO^*+Em`bkdbA~(P_>aiT3Hw;-1lPoTMRU%FjOQccz_k%l1T;ojcAlp@;7v&-l#&P3BQed!rofHHCYt zkp`PMe4{6K6hzmV;mS9I|iFY&D`#-B# zzedZl1}_TqPG7ca6C>=gtaj&+Z&Hvn#+eInF}^IUDzq%l7@gl>I6ci@Z**Oj4H=(o zxu8f>^XyG~`W5@#vzM>@?lSP>--3>g`c4B`gAmmWQ{7&CPj>sD5!kcl{Z`|KZR#7+M+_>x8yWcqFRe zcbg`>Zw653j)5fSj?7B&o_BtWi?>DYfW50c;6?fH@v&Lr&C}5-D#$8LTL=5!!!QLU zb+ET58!Fe*{Lz5-&DBe;ahbWmYz=qu|VRYpY^DWo}Q!ttX z^;>Y)aCt^|fJW=BnUlG(jUCW!FHBtgT$tGU?Rv^Hwuj5P{G>o#xk9s_(1M&x!3#fm zAQ?-U<4#lxLr4o{V-#BM!b@KaNFeidIU{40|5eaaKF~{8M?^mAajR2k>a`WB*0(6& z)qn{Yf?)Q6MV=q@Hjw(Lc zp4(erNaJi-biFtmDKBzcg5eR;f6u9W;gfw9c_oq(AM9tF7QPTKr3Q>sly3wveAz7$ z(HmQCCef4JDuY983jUO>#xBA@&wA_!N}c-wEfeUlXl^F9zCn6#tKojHf-rDn{j&Rn zR_Iy^E(ENPei3tA$W&nnNTO_v&#Jrdp)J7r7y#Bs&Ohq|O{5-v0CeIB&xZmKO+Z8p zh!*%ZfJOjzfJPu(NcsV6ko3cVa&Gc2A+a2m8BdTsa{nVj@QyN$5S<6qpspnf?81U4 z)>4LII!FWss|Ln<-=MvWD9E6^NFXR)fNSJAK~3M(y5gZYe!j>T<@% zwbozkRUl;$&i-^((et!gOFj&8vLy2UQ;rJfSMpJy^*L5cAt5ZT`fNTS&nfA!Ol$N{ z&u}_=)IkPJPJH>L|vCu_A#fz+dSJjvBM64H>dsfGook#t$Zm!W=g=(TUpNt(- zyAs&P?@Gloh;0(LfEpDm2Z!X!O)=^Uqw$M+u#K-Vg6Gl7up9C=uqG~mHR1A>Se^I9 z8n}R~NKu7yidjCOK779kI=roN+9c;1)ZVaREiJjFz_U`g zX}(E==6iYGM?6C+{Ms@@o0(K}O_OnHpy9ret$Zeirm0l)%sL}5lJb=9fQ7M(?>$4h z^Qjq;er=XfdhGXZx<@*j>5^#e06bZCB0TqKvuK430laB;8ovE+n|$(je`}aO#(s3@ z;)ted~@}Y6_G5^B;l0%aCVrkyXBZ?WmTq(>=cZ9pH*~ zUG3N@a&V3%Dt+U%&=@MmsOHaxZzYWovfOs` z4~72Aum0Mlm-#7(wFWDP{IIRBuM**PuXEE5Cmi}4IFDCt=eai+mV56P7RAS3TW;nQ+ zISNAny$yVjt3x4CgI|)ZTfd!iLZo#eY*+YYzGmHRy|W2rEQZOc6yB7n%7(pnz#-}kwXu_$+AZb_S1jN99EdGL< zrO4QJuu_RdQ>Mt6-y=^XQJ^psxYgNM_Hs3T-^+Lo{XZG-98w-kmMi1FB#) zI=0isL+rFJ$M2Z=LoX-Q?Mvt~kns1sax@$~m<9x#ip<)qg&jo&9}&!@IN;YG!}2(; zUEtO2j`K<-n5rP|&AD&`8Fem|_A4)^oPQ2uqjx|jG$!?3N1oe>p@5ahuX1)#p?3s< zMULU3`-mM$ygj7KbY$#M%KOj5nl}1a+P#qB*_DAvIiBxB2!g-cAM-^Rx2dzS4Mc%0wFxN2Jcue|lL?&9DmLsj9%W?G061NsW=abNMuRA`cknUgd zhrE!zFlw*h@1T1caRlY9S8y0?2~RWoJ`OKl5{-EB-wZmd^wjDW{Xa6=hB++mLfWOWN%-3WNfHc*kHH(tB4IYjX5P_wIg7a6C{ z6qD~7owWs?gRe$eEwyF8ELYv9LpzFKe!*cf39D>6&s(Dlx9=__QasjfRD#aE&jpQJ zm?{rfBSjiD?wx2Jv6=K8ec5vUXm=E!%tzV*s&NSp0iN|ugw>qnSJ;WCz9iz!$0ae~ zF)J6-H$?I;b+_6#I^tNg1BF3Tyr7t5svZ!LH-HVbt~-x&J_SDWNQ-qB`m_p@LNia^ z$~2@6z^`}iAL|Q08*2m6JK2yoG~gN+HUM^QURu^)}t#ELa!k2V9#PL_%jZA;1KS9`dLvi%5?P{=^1c zMFz0O(EaEQ)CG-*p|PE@D+6}MPXS3=y~PrtH27$NWUmLJda5iRPV#v#i5_g8CUoHp zW8;}fbm&~j*?2$x72G>_8rwRj=(sw~k~tH^&scZ3>h&o5vL|qv1lP~A7PRB|9P!-H z>`U>Se#F6IMRz4Aehbjba;(fAAL6^ZSUKRhN4O8||E#$qZOi!?*J^WA`{O*90RoG* z7M+=-K|?l}OQ$*m9T-k|S^tyTs5K2Q<|o$@sDR$t8_;vFQ);+3n3Z1=yog3k43=md z>O!WE-h8%q-dRTN_3%j$YEr35-7MMVVE8#Kpoz0rimu0OAGKkA9o6L7hH3;nyqH~D zH5*%LmL!6-E2v${-(q<5VEM{L-OG!#HzlQZlRYJL3*DH{*-oJMZpE8=cMBDK3@ilI zhL)bLgr?5bLC>@s_+BO4Da^GYv5q64Ygh^HOM96HU$wjno|BP*82m}71Yf_-{)@f@ z2Mzwy*GE{o(tl{V=&u;JJKAPoh3RzA)OG`cr~AMQX>@S3^gJE(47&kZ*8Olj3xt=E z3*;A!`qEd<4G93(QFmoKCuk>dMng+K|8WLXaNQkg91nnNLkV8`MvqDp$s05Wx!|iF z9q7*(^%pC}uz~{8@rH?Ii2meu(28PvEe_^0Bt6fSwf^R&kUS@CH%P$aiP~AeNhOLt zq(sizTlMEZxJiHg@Di!pK{3BakfH4XakmrIGD>OJ!ZfL4D++&!5c3OZYFRUt=mY75My znPq5GgrGBe483M0MPe>TL={z?V{`f~pl3 zj#-&w9c7zicDt2pl(aZ?f441ein=&OFyHiHwV&xGBdJIdxG446N0+U;1 zl1ojB#1^WgNKUpefIF#FL_`L5B0?h@dE%2R47WgI!=6O*Uyo71WUertv~dzbUdqYb z<;)Y&%Jif~q4Pu8s+s~ju4Tr`fYF@nU_34SUYAlPP6sp8Un^V3K+TfUfYbxQrPo@tA`^SZ{BHL-e%yZ!_%Vnn?RCTCsLNTM$brLYSTFmPP@eW7IhT$ zL;1R#_*=H{Fz%c_rr1_|Rb;nNPYc>jI`G03b6DFc%<}tGm?fc)0*(n7s%tiSW-O^; zl_f#(55J$4QF0}9ZnB@cS>#mf?{ZYlM@z3ErE7|P1)Z$fTx8lPl)F0+ z!F$$ljeotM!U`zYV%5g{%-R5?EWslfSPd}XY@I#=LGp$UHq`c|{Ts_e8AvIyx+^}@ zTao-a+;p)tL4diDSjU}U;jF7(l7k7%>=f$|or;jrXbZIa!U?{+uPP<~>6zWrr-%0Lwe~7OHD&yQuwycgRSsQMJBR0uuNj13 z<8;hBaRHgh%pAVyFn zcON)3WB~5;%fe{p(v-!d#En>E(XGyHUJ7LvLUh{8*b}6S2m|$ysjp`)oVHu%MP6p9 zSEtBIg^k0Tor$5D_}~~nb~=K#dtgQsPL6<_>_F0ML|jf~a)BSe0A1G~p-7gBXF!~i zz#Fubi1--HFVw~0yFbYTD2j&$dj=Fp*!Y)vE|VSP*hTsL!i8#)?5~4nOGpmH40eG9 z*kLE+@iV}eMhsbe6@5)nZM>MYuZF366O_;==wEzrmQI9M*YnpuJhSBH-N%QLN>iUw zBlmL?_X6bY&PD3{z^@KNTdWT?gdtdUo9U*{2T(m#b3y^9y2-Bp?1dM3uAmbzf8ik9a(&=bUScu$0WMJylRo$ zxA9yxOZL{iF1%%W`kYa2vdFQ&oYjU~*zx*nf1*CFK%4iObcV~qK7k#VX3vt-DIyOv z_ByX`5FbU?|4Edc$1)FL<7v4aamDKKRfsCm%6LRnOR>X?`kEjo;Q>=rSwfU8bIL%8 z#NxAcv@Ct;hZ7J;;E>rXz2+Ul1fPS;zX?70--WdDECAU~L}0)%3z-?nc1-#SzfZXehld;vALK+M%}5?vdr{#L*gsAS{?`t zZMUdm5%X5Gl1&XD7J5S8h9-3Uvss?VY_*7QMh}t{vx_bkM4Jw~ZMKyxCzB%YR^fc! z6Jz1=j_FThWzB&ZO>6@!hTCn`p)i-(qJ)dqVo{s1v3KPmX*gU4t47bJ=v|&#`p@Y* z%PeLy2V?dlJ0_U8wTosI;}+*j#2Oc$e`T?lzEiUXu?mox(XciwEp?aC+mqR^Pu#OhH;$rmoxU%xes$R zS}9&LI=lyOjlO!k2W6@T>HBFCEP)7I#h4sCrQ-mLS$yZ+72ohJicPs}Rh8o%03rzhgTh(7YtejxsM9EH=!k_2|CenjDa9Irk~QPgdSk6`W>}hgIT;Ot&YBMcvObh=Fq4UOpe+|AQ0l1{mMBdMZT#R zz-A$hS+!`L(sNkCEV3YlVVcnUVXO_^Cy22&vAfY+vTnu|AcUjCNG%jYtAEchOQPv({d)yRFh_ zYNosv;h;amNvjFB@wC}hMASa+a#OR%Kz-Ha@hIJ3T|nyDG{&vy(t&GX?Q$`z7;jk( zw(f-Hj!oJVd$EaDQEouu3-|eZL*e;lDd%*gK84=QQF4)0D`n=uta6iBcI_D83NL51 zRF!krb4J@#+E6kPQyI-lfOu;1tkia104-AIbxf>_{+I>Cj2Te{bH-=`?h&!lSjYuc z1a2$pd@hpa%&3)uQHz@&>q-0wq;X^S{To_>YP=X0EhAK(-^T zouR`&3)=umH^5=}zl4=DG5-}&`mO!+hbHnzLkTE1^dC<7uacIvv9+y(`+t?uqNo3l zB#HkOfSQSwj^RJyr`NPsqKTW}ytAtg_CL@Z`+SW2u-3upBU8=C^P{E%(gm*f(HDO< zGoiFq*?S4I3Vr9$B#}HW0bV>zxeoGh#}@+p-A8Rwwdi5H<^Jqq1c;69grq>neB=Bj zYsXJVgNAC8412~R()KgEtMld9HiTCoBB*7S@WN&Ts|YV}wpx=H!&rS3@9u`9H^5Rba z`hnDo1`nsp!xge^PIk@$Eo;=R+UE1B(GD;Lls<_RgZ z8+4Ug+`{a4kkFuEn#)Yb>;nZ`&d?Jowg+SQoem$XzrrDvJTM#%k76H4oMmPFR$AOwSRz*l1L^(RoGrl&9BbTO zN%LB^X&zaC;xjVC*eDCsar1>!1@dOeT3}z<_am^X5~nd0rTUZo4N3Loeq@ImR}s;m!YUMaH=k){*TndT zq%>L9JJEL2ew>zn`2>x@NgzF^iEnX6?gN$!XBn`ayy?(e#fNi2g{XQ#6$|kK-TSfY z(-g(pjw(LF18NvpmykNRbN|AKnK=`W8D;?w#EZp_U__m`|2%yXR>fl>K_I+zGGtfv zI?@pn_93%nnw539u3qSOkZ@f;woO(1%FX0W*o4jB%{2(PI@F=QK+ghOu>VoTr`27> zhkF4N+BaGLv&yMtOVu*w0_I+rlmPp(Oq{QfMYFrA5WQ9>9DHbb+wx%!u%l|Frh23N z0$n=zP=KhC!4P}^pQqLjpR`l>)pmbg#`J_@5v6AEmnWvhfTk5%C;BKQ{gTG2%65Bb zTosfkQPt=0dxw?KFhI$dQXU+T^Kf8-zyexmL_MGFSPGPKXj! zG)QRP&WG)^omea**UX&{xrnWfIDA^bUvQiYuu|o4-2Q|8nEi*PGDHczAF){M@Xb|@ zIJ*q}`NI%9=trLowZGtr^ie{A%Mmk!uapwNjwmND+T(W^HdnDsTh22rEobh0b#jCB z0R6600^ypvgIAIEK%fSE z%q#d&#Ar7cfI)raVW=0)(k9O$s2r_knx z6zA0TgOC-|UJX9Tp3>Lq-oT7T-wrOSMv_vl964&=Nrz~C4i$C52rI3E081(YeySc* z@sSS)2`*kY8~#1|r&IU$g3tlW?8LiK#*p@rHpKw^Ln zbs~a}da-OfW+}8bp%3HRt$v%z2n%6 zMTE+B$Ue7)OU!@O;IA*`t*uQ1b{^nzNrhH^{K%1Oz5&+5Y`06^y+^$so-O|!dwEE4 z84~h#xY!XLA&eiN6ld58b2)TX zB7;ecQGJbW z)wEI07$gY@7LwZWR_PnJtDgd*bGqW6QOXP?>lD%XGidKAK)%{7NOoUqMH1odMdkwp z6cy7PQVZ=K#_9?d2Uy^C?h)8eDDF!g-V-Z7#EF@HRPIqT#wZfASAC$la7~vV)X}FQ zq#+bn;yvb^yCin^6LTgAses|o5^Ql&qT`XIXB>9%kzTrEAFj+CBiC$p7iOi{LxIa; zUfW1At6GHGr5ImGaP zN6rpRt*9%L$QY0!?#}oWc9h>5MO@Jm@l-QIfEKF?Ody;RSF zJ9kjrq-;M`J_R#l^w7Po(xtJa+EQd3+A=RoRSj;H43#CnW*oqxs+`(-XWX^)U9R-( z-nhXVylgl}c|BGR>sFD4TP{dIo8}-tHWDs#69}@pAS3e>hI;?%OGWZ^OHua|TwO$E=(40{^II@`wIT!fY+bg{7K~G%qRzcVjgA`(_Z1zD zu|Ne*uJ7T2Pu#p)=0WHLTF2#M#xPM=OEcHWB!{&y8O^@Q*1TYfa36^iG1^w0FkbJP zE?k-=Z$U$Z{ODlwbT5BIUoUm2Qe+D~J)TZ_nrNN8p?JTV;skPDQpHaPT$?GC?MF`? zeVhXoGvg-;GJWI4W=F9ioWh-wphv5zjc({VAEaQ;xd=;rAIt&>d-^XCf41waUd+Lu z!fS;#`?vKSR!8vt+X?u3+8c8rUzWR~BkSSjGjucuM)wkWH6EPvY3-v!e#toLbN0Ff z%!)a08*re(TrcHzbu@=x3q$jUmZfOm>nVHF@g0Z(dQ2nU?zXW=&_>v1GMh=2Mm~IZ z36(hfThXk?Cl0RR)D8+F5F}{%Wqy$p8sdOll1)xlONJe^nw=?BRKDbl@TK@niU#zS zU~&JkzCPhoKL=cDRafBzj%sQ%3-lOR)uDu!fGzESj(LI zGDc9!#<5$uTZ3b#VmnOU+JS*$L%M?1ecbiqY6#0|kNt5E=IvR9ZKhQzbOg4EJXp_BX#bB~|b16UGpkOW)pJgwT4@^UfQHJ8%9Slfi;ZQsiJ%lxDfzT;Sc>zvC z`L%83(vQLn;FkcU5|yDJI4w?wZ>m-1DI@w%HKxKLL^I^;VF# z(~bhXa9DY4lXF6ae`0vp7c@oqTMavHBXf*v(PdLVaU!a=k|;|dnJ0qkmS8-1QBvm^ zmLR6XU9F6ivJ-#n56OflEH`o4BAm@YR;R}t5^A=Zg3z}e_ht$}i9xqTVliLe8V7vI zKUS!TRp`Ux=N+g&PEjQJWnxg8G*kHtjj)rW34^x4hQL4%Mf*-onRQQAi?%e-!8vqS zzi9pX7NKk2kTjhe3p&b9*zEOX7~IzVwfVr)g=n2|@KfsXe3q*h6oGrw9UW!`{ispE z%N`wwIu!uC3N=yb$13#1XQyV_L22S1U=3TOJ%9^TX+D@&?XGe%2)+uStsb2q|3fS5 zGT~O~e)zIhdq+!9c_t_kyYI~K&9O!GN4;7RP91oFW9(up=;XmxHccLeWH3mPh9r@r zO(OhS6$%>_|H`_YD|Ne;1kVg*(C|z~%N`HKfyORl5m(`LKv*rzKv`s`GHLI1zLLg>pOJePL@9Q~{<&?TMvb{MB6un;oDdW`5$3ZO^cfWTMdFHv%a&g90&EZu1l#QSUr!!ffkij-|!{Tr0htMi>;YSLVn)+Aeh^Wk)!asijy$SWWzhem?TX@z& zF`+lL736y4UYg>pZBvL)_CIfE`v$pV$03M|;W+k=#?{p~Zv!bh%EKF}KDyLekk*uM zc|O=V4PcoSIjOTP=CN|*e%ip17)Fq-u|JMobc@Lr0Tfz|V!B7oio87}*EqUWVEb71 zWn>CRvFb7guIq8q_o|r`odd_jip-1k%+)03B8&VprM%0s;A0p@^TSk%Syy8NdsEm~ zj_$kVT~4G3c29F3RVl9)1Y@_7cLDA#Rl=>j)u*@Hr{48QeLxrE_l^ZKm(!X(Z5hOx z6vnhfSMcT-X1`>FaOQL7AiQm)wguHk?@P%0nB`R8V)11dFIy;(b0)##j81C(5KP1f z3Pwnu37R)UWmz46cgaAPs;AxMbRHLXq+SD=R|k`U_mxz>d;US9*;0u86PIl+;KebY z2DzhmR8#8kQrR3_(aumbdcxk&+U?z%nG&ToT9Wu{u;~P3JpFs7>DtviE=j7FhLdB{ z;qqqa;oT5Y96p8GVJgCbGk`*byqxd=S&_bV9)Tx1GCZ1*DM)!veAOpY*`osk$s9L1Oa=aBGbS2Ma=Hg#_#1P>c+N0 z5PQ#W4SjSW30Lq!TPbSW6#GuCQ_%A|w_|u}zt~DdP+EV{OFX-x3hhgfKoxhl4Lds0 zJR6qmj?NpljI;KEQSqR&6WLYRz#dxDhi7ko+>zn+QyWbU$nS0vvY22FX^aUUKckDl zUA?z2!s7#;K<;ZmZqMwV&yaZx5aK|JlCgBy$0jN#9$lP^4xQN(`RWwIRQuE9C>;$5akVtDDj~gv# zDsRCArPrb345-=VXK~lZ4?x49#F-r>@G=Zfs*mBc6jkDbR76^a2e0*)2;URTEDNIJ zFUHyhgN`Rvc9m0BhPaGDZHfk5Uhz~2UNcP#18WeXx9?<2Z~umQ|3(G> zQ~IL6F}nXn{FeS-kzC^+xmkcQPli8w-+y$=S%A?`MxZeB?-W4)np`tZ=GMUM6#t`C z4#2t_xnhmHN{U_DQpR6sv^Hls!{KG&8Od9ep2}A#TFK7*{Yz=6w^?xVb z_#@7)BrYwipsOq+uB7W=Y+~&2TZNj&&C1d3zs9TS|9Rfx|2($~FpbFXOdP=eGW|`0 z!umVi(eGiSXZpu5{%gif-_Af+-^fMxPtX6UEC0J$I9OTOS^iTH`Sf=XxyAl>5ZM%j zlH{BiA0s7eZL01R?B!!TN%tbE-sAg6Q95^aei3I?=LM-Ml2e1pH8QHy$Q6A$F%#`_ zs@txjfVcNCu(#25t#Aqw-q)>U+4t)q4p;k^4aMgun#G@s5&JQ10X$y}2W5Sqt7P9F zX=QzPIcY?B&NmzPb?XW?ntvL-{k&ov{rvuZ-sQ{T`?!+L`+9eOb~pi)o3^E;=Mg@y zlYR;0RX*87$nKg9$@YD^S*h9`>MhEC6S7uzAN}UZz>{`!Geev0kR9#AVKJ|u7@g*HGqZB%%GFm5 zB(R@GbDx(z#O!b6byQV3e_T>8P|n0u zlBflHa&K0=E4`{3i&+djZ0|3vdRVw~wLPb*U*YlO$|k%zpY7Ejdu;QyF$tImchOww zr@DW-W_;z@Pouu*tlm&vvAwdHcy@?*4$Kj7ZH42F_Z3YpK0}dJtsQH?-D23;`f1#G zaem)CYPHRh9JUwUJ|~>!8OSx}rrhx^XA=)6q~Tp|J9_o=-ac{a;}+#1u4=0E>K^5i z-)K%r7sD{ZyHhgy8p#*iweY{_$K{n?njNvHnfKrrz1d6K zfFPFjy#&1b%xiyjjCo3(*2>KoolfoDThTJ)!qMKTTm?yM9%HupV_uQ~nty5m)oqVQ`*}AN-%@hz!YQw0_fG~X16$3TW0Jx?una&$k znMWy2JFUE|TTK=y*j|sb_C;4T-oedS;u+McGc>Dg>t{0CCUrFayqu2T;3a~{?tyae47aj|QJk5MCQ&T1-XF&~l=_$s})qY|XZ!^+X`CENSq@K(j zSm4e_qU_z2;tvr^IQhtPIMg6GeFDBN?-`J*xo1l2=`G$M-}0>w5L}}PCVQ<(kqSas zjjdx?q}fOF80rVo&0OH6ofeuuO0OE_Iy8$Kn-v>-Lz(Lxw3}Anru}ioL9Xwdj(PXxyq+OZJJpV#8tS!iT*v~}> z{nUW10ufMiP8qsUHUG$$GwH}Od2O*jcsA50Umj((@w8dX+fBT+>1~sX+zWIwj*9Rukj)E?H1^h2g~SNm zB=+16?Kh=T*a%v5e(TB!TN!04ir0>sm_eBXb$6&M{8l5Ka|jBvJZJUt92I1p`D_}P z33WkjGIofaertV6u@cQy!=-(QhIh#xfvM`gynr_XC1j&M-rO zx7MifK*A-dBlXogW$pyWHJ@V#{j>>L;NcnO_4lw9Db~WIjTNUVp+vHpBR~Im<0i@0 z#UI=uiEkc74atL@$A;)s34jqkVnyq&l-Z zVw}#|51ZTQ8a+I?boW7PdfM`7@MC5@SV0%8Vp$k<5^svWYnd1zr-=gll!6vxNz@QO zajA{)+Bx4;3ens&VmdmqOd3&Gdg$aN%{m4b#WRv`e=48(#67W9R`nP?;jQzjm?X8K z!ls2*@z^kY4p|xj4O`rTW96Xh{&@SbWAI`(L7%wZn-nJ@jLQWKzNX%e) z*#eU2Ya>!>*qogf`W;eX=VL?rTeQAr$34#ogI0c7THl~BhBys&LIk-=wNM1FZ4CVA z{tvnY{%iF8cOORSiJvKzpDbYOy-^IQ%j&RGl&YtrU{$i8o#V*H-AW>n^UET;MBimq z2jAkqanc2&F>7KGBu`B(MIe|`ZoZ0{^W5is4C+@jG2=Sq{mNc^AbE2)2991?9TTw zBR~3Aedd2%dTcap?!peC-HKEznXZn%p?n<2qLFlsZ6#Y6dZYj-k-uiKJ9 zxXN*^rrrIJ^(lg&u<63~rpo~(*;g}WJO1*K{A@$=yVM(g&_y?y~F0w zW3*8YVnyn|=i$-hZ@JIQ=b{T>xoY9Kq8o$SK?mF)9}GmKz)J*0#VGV1(9pY^7DRsa zXPfko_Gym|dg_y+3L4!~fNz3^A`bimISe7Jl_qmiAL)swa{mkypnigafBy)f#dW#73prt)~rtJ8sxQZpSNpv(qnBb zMG&BVW%^ueoLSIX2TyOZ%e_S-7k6||0mYm=C^*63@nvUZ#N9U39!fG7mVuXD0``iGta7~`0efSKNQ zQ|yZ$wiwUyAl1j4`VoFd<2NfVsjC*hq$?Kij?4BV2mhN8cI;}F{$E&9+!fg*nl013 z>CFH>MH-3NFE!6lCU_PI7;jzRz0;Hy{5wn*9{Gx$GOhQA}cII3sv&QWydK9tf z9Ro1#$Z(iFBK&nGR`Z4Fz0L|nj&I_P3F1)fkwt~z8gEA4M<+S^X;4t4Mg(*upYvBi zr}6e*6@>#^k&i`-7`SN@)Jj}?q}X1}o6L#)hYqj5(G|*$jdwowI|X+?LY;x+N-|`G)<>|qLRp>N=--L{$wIj$+Tqwf9M7iGmz+-u}a|m^LQ9QoX;Uz2X z%Sgi2Fb);34GhW9D!Uzf+feYEs=r|ze}di_Z^%{bF;eN52tJXNp>z`799ILih)gW+ zQ3F+=sis5oTW^l4frKvrME;{n_+nfQ7QR0>0>UhqyVC=ohv zk`WI}fCr;hsQ*(3(F80u*jQSPx~D!s!ppUv(9RU_iMc;qSRe2SxF)9$s0_0L8tzvM zyc{o2tbr_yrj0~x%QRHSEYtbak9ALE*j+aX;n_5)F8V%IQ&fxrB1nZnE$B;F3!hjM ztQ~I9jWkiksB+Zu?KDVnF`Nah!lQ5hx~7Va@H$Yi9BLxtps5QXqq^{EbUW0{;JBGP z&XF!kx))xBEV_t8rtcDT)9JyjlxFsTHp`#L_zghySWo819Jy^CL&RJiq{U^8E*W6y zCc?zv#~izJh?vu~?9aopUjs+OqxoiaOSiyp5bw4=sDmiGAq7U8ErTP>IJPn4W>g+i zp2Pq3KnErlAJqI34J}90iZtgtV|XS~X>TY*0}&_eXRxu98q9PXoNM{74$!YP9pVNpy4hbk;Zre8lRL41;> zCmR#1V#qYfhiKG+QaxQmx8Wv6MVd?`Gzgj#jU?F#SGHccCID|!4>$OMG$zIPetDJ8 zl${-wX+2D@18Mx!*!Sj7?hF#wPaG%oO-f*JoEX+ds^@zT@l>y4iZC}rGd)xQ^fx-K zB2qI^@NWq5;ut6TaBtlg{luszQa$Gv2~rF+vaFe7UqyF_x*tvN@udp!5#`C5gf^5A zdk;&7gT!STRuaVv!~9J~7bB@tiLrd6U293Y7=N1;+HoP(w=+ZrcO})IO(aeY7Z0WYf)6ph zc9?5Fe_;9R!TL{PR0;B9ED0tKeo{W=y#L2&dT!yOqXG?ozTYjehposB$$|SRfMy`- zvzC{T-c0|T=n1)2ivhj>2(ICd(03X!fILxwr@Eb$JfL{>*;2li?*aLl)Hiwt(}Wuz z4tXGfRD*m609U3qs7@~+2gjN6V!VFnOrN>c)`+6Ec=ar)Zy)6ILfkS+7BImlZE&0s z^<5d5lBIlLr@+>vwkHDE7*X??ccLD8VwPHeKmBq*LVBj;t=o-oo!VjNdsAWUjr{OJ z$Q)d&U`P(l9Goj>NKOf46N--*l$}81h37#7UZ`;;G|&)8s3SroqAul%>2dj@rpjj* zX$4oKOz4ER;xNYYJTdMC5%VDtu?~&MA;V0Ik;S2BqXSu_P?!w+O-_Qa1XYUZjYz0r z)TKuR6pHDIfkko2KgIk^EWv5umLRMlj-tdiQz^3Ir_s2Q{GO; z6ci#qY9<+4M|%1MoX0)*)|L-*24=ry?5uZH(rYFg$aD?&Q($83j_z{~~i{FwqY z`P29d@W0e?7ZIyP8ro5bF&3lbW3EF_!)CR?e8(UAt`KYDMkS_Njh_D)v{8%CO(R(2 z*a#9N??pN*XZrqqnS;cy2Ot3_yjns)elMdfz>jqsJ(Zp4e^U>9v?qZbrX>D*D~jwO z{DVE|&ur<44n@<*2syd=z{a#-rXwl9%!8Z!nf%7a&8fw*lTG+N))BzWz0jWYmSLvr z-VYWPl_LFeP$QFac#+gaCu)pPa8090c2Hrai-L41#0FMjrWa%!Hwi#%+U`>#-j8d# zE{;%ad2=rBkd+gYbgyWZB4WKkJ_KNU(ic~&a=dhA^l$d-z*3&{T>uw0Bj*1oqMn@e z@enUrY6TCbobsV;F%oQ=yyG(!5hM1IGYh@UBHI0&C8W3EOk*4Q7C4*kO4#JQS_24*f_&C}(ZSQq8XSy6hw|8qyTC5$y5y>(taD$T-P? zq{&Oe2L}=1L3TF-mVr%{JOjB@d6F`eR?JoCHCW0Zo8TrAM)2RiL`>A5E0LxC-Xe)7 z8V9(^rmZ~bextZ}P~W~Tai`Eo@#~rR3H$^YQ9|xfDJEjfeRnbX0JKv?Z^+n~Ay0CA zkBJ(v5*f~KERtBRaA0DWE>GV)QH-%>q6AyXNZEhK!J4O;nf}9Ow_)5{M?hBoX!U`7 z%g-iVehhd|&JV9DQV^;nFtC^!~K0n9!F9x>Fl|@{$R+$I6Y66;>b(E(_!xh zEmHIRLU99p%m$OfMsPZVZ)4LaJ5{RZ2Q&2fL8Qoum~&?Gr< z(eJNA(ZbkV^L;_$EYilA1C_1#m~f-(8M>E;*|B z#WSXW0upW3nF{u^W=~mCM)|rt%eIfTb_>Qj!ZDBamy7Ds)nz%xf`w6F3wVQC?BhDm&dLxkv!+eJOw7XJ6Ggah9hkTCvQN=wHJyOSUah(I{Jo()X1p z&DNwZkoE#f*F+jxcfkPxBpge91vDJO)Wf>mS9h~XzlEyk7_VoXG61cP!HjB49-Y9z3xE2i8`T9b>i8fv$Krv5yi~13-7s!u&G5b3*3&lls6nV+WlXI|?}UKxbkAzcH2Qu(58H zk=@F0_a<<|R3^XU5+)NmbrrGG1eIfx0}WNcyyPauj?WFH8;XbCIcn?C0Z;2~0t%5H zIhdhwv25>L&R*ibJt#5jBj03%Ly&aHih=ur01&H_uiD1eO&6jwSzkgKB!uD zk?Wedv(lG79k%beEeJL|PjdfNu87`{rNy>Ep1RNUMaG+mJDQchrz~y$^L8npZh=1s zSQ%NXU)r;$#l@}czIQQKFYNpI-~6UafVrF<|P92yVR$wLWlVf|MJ0Rnpx3eKz$ zkpJ$4;ds|j)20Yuty_A!VNuJA32iwO{dU@#V_yukYGdOBroXxn&`A;?Wp3-ia6D}Z zv=ZrXP07a!pp758OQ8vT;^^x}bGq3H%EuvMIE5z2WJb@nmJ$#X;>R)L7v?-LTevQ?gQ|RjH!`Xp3;WBc>-H3%5fVCKktIOUuY=>&< zq<%`ge=_p%^{ehLv;9GA3w6tE;-orG+xc;38iScvGs_L{_>nB%>$wf7Px}?>+-+=s z!*pG>n222w{GylEt0O-k`D6s?L0fA{_QLd|Mp_7}2~N8<*uW{?t&fn-B2&${P?6V* zF-+kD;1`Hp_@}0_P0cpmu|VXA4sZ=u>iC4)&NNOog3Y z^xy=!d__!?U!i?~&`rVxKEpJWscWCB6MqyWxma+G$*CCh_`M^ZXJs*;F=?5y*nc?B z&9O-)QBw;o;E?8z8Nv7bZ0USOY>R&ehza6X&JSXOeAl;lg)JyX$gl$x2+heU<-sPh zhT!QPwps}6Q?U3DT~Uz;?a{8DKo_qe2}v4ZEN7A}?_1+orj}6lQ-ODhbx3ia766E{ ztah>=@FnYqp_JqYeID^=4L*>r7za|{jT5nFvk|seZ-psfgb&tsgb(#(gs<<(7}HEE z7%X@R9w4&GsJ~@!hmgcpNL-EMukdqvXciGrE2Z7TfOzx;&9*Sg-(+mDoI2SrocY-g z5xi-~3YKzU=^Jn{zr_0u; zEVCt35o%TgZK0phGxsT}CEd*J~h=YVVQ|PjRa|NTRz$D|6m}4H)jk3~usfggt}$?DxCux~FeP zCp$`YeKT?}2lTK%06pvxpocvN^so{0`^~;!^)%zQ3hjODAkzKs9(EQ6${vB8Defoc zy)YkN0_uR3PE7DbpjF#v6O7g35V~DR>Ypn}%TKSEEw8n5vK^qajAx=pex^`lH=MVT zZ!i;g%ay4m=t#8M0fdeIY4mU-D1E_1xw`vVi(O_Z?E3|@uWh@x^@hpS@$_r=%No-^ zYb8@+y_4wzR%rCW6SaGSTy-k<0T`>}>ItpxdYq=+7cNhc-KRI00mC%5Sn^L_|=+dLBW{~iu~0OuBFKCA7`U+82-8uRxOe# z!JGe~AuXB>7bwQ&%sM?gUeoS_M#+?J=VUs=XZ8q<3f&3yS?{HmS3*~)?Bq$sZJ+T^ zcqCkOHf@2X_d%MXyBU2-;h~Am=g1<;5g1a>G+X*W&$#IfnWn(ke6J}ZU@l(K&kKf?iTChMmxL6hJuJxnmk-A3b();&e<{cNrVhY2MDo7|s-R z-cCgy&Qy8c&Su0K*sowmN=wA{EP{$nkKlU$XUu8nDzal)yXxR;D$ARZ&GL6bl=4z7^}JGV?vG%k&}qQW?7JSUajO<-FxPoI5o0)4^71YC zAm-Ja8gO5ztt-M)=t|n@%FU!zB`0Ycj1v5kSNP`4-Wn9kweqkbpHKgE7Ahu{{Z#@6p;C^sDS^cun$^M zpit7k0Xb+zY;BzIe@mK(Fya5<=K)K<=i>kDKr6xy)GPT%@qZ2g`Gej70zm%YAAT?Y znZQT?|3Tnm_>UwmDPtQ`Co_6{HU>rp;OUrK0g(y#v?4(98Dk-1Lt7(bXxhKK;4{)O z(EsPz_$6;I#oG>uiwSn|GlYEUPhu2}lLDVWy22Yh$XepZa?;5HMYq7zWBPvXSgJ7Cn|V>iIV19ts*|i! zpuE;1Un_-TD|-a6a(($RA`UD7g_d@x+7Tps6heW=a-s`{6j8bBTwxeV^cw=Q1|XG% z_Ds_%`q(OyE>EUTkeoH~Iz%t5TO#EQ8$U?5Ov(#21EIDW)C}LCG=o;ElWar-bwZq- zAYO@hf^X|#(jG- z6xGC?b(6NDryrUIa^Eno27mE9=_)bxRacXUY#duuV9`~+$Za&4L3;EsStY@=0J)qqUJd-Oo*V3ZtI)2 zp7X8i8~GDPU4g0#`c)Y`bRRs|Nx|lk7iu5;7ul`P4}{*xt}}Ssl6$rnL|cl@A#WJZ zhcnH|Z|I#?ouS!~+1($X6upApV08;7wk`Ky*Z^FFT;WwS**iSf7(RZ_hmLMv-xMCG zyaIS)Y^Qa1H213Pr5--v=F@Jk+_1WZz9sR*Bwx^ZV}kF-efM??>=f_~+F=v(4LP6O z*lD{__KN8g@eTXzmhkqmf-8#bQ1gMn z8=E)xd@_5d$}K#rd*()aYvbbc6E1i7eGuLzrUx2t!Ttr~vTTgrhl#Wh{q1UZwzAW_ zE(p9rKi|o_cLoxY!D>Mnj`C^d#a*{Kd$O~5?H8W;2Wd7C=V>!hc3zOOi&`f+9YW^o zOK3}r9>j&#t`jX6 zK=S3|Tx_nzq*`-c9vKFlU8hpzOx2@ireYEP?x-To(cm`MY) zzbWtWfKXYUZU_DBy}Nd&V-XpAz4oY3vpKrW2?8Tp!oUKQnO$;y(%t=4O(0s4L^jbB zY1XI_zpqIH8)Kn!tOS;KxE~#jOth3Mli8C;n`P`(tIce+JCy|YW!|#9K@&TIvkXp&Hm5dqbBuXp7%Uz&%_H z3trwlt0&7uhw+^`c^<7%2-6S%?W82HOv4kLI z;UdWWp+}>b*(#G{%vy?Te7D^|m_GdZE^d9FQ`0j`yRevG$q+`KH)Hw5Pi|}Xp|hF&>SG_pc5sZKh*N-98&3*r8zc|Au27e zQ_ICNlM~b^Lz{oVyaQ5kAEz4YZWvJ>V32H(qq&TYgeG;WDeK6i=Q-^2gMO~5`*yd4>rZ&fU|G8zz2Y96 z(SA<(t7Fz|9WQF&qi%$$(HooS+3S*mOB+!bRG+Z0p~Nc9TxtT7?0uF($t1V#Tsfq%)R6h_&o$fK z1>>L=0T1x7M{&*D-{SZ>c%o*QZH_)p5r~)Hu2u0V^PN3J7C7{X+AO8TY~As-VBd35 z^zV;2!;CF2mrC_V9@-glgDGoiIp*sRV6jqfF~AIuD>LEUiaeNADnfZVR z#l>7x424?O{Q3H4@o})@02ssB=l=CqtJG1W4vuvTR3{R&0xTEpsMhU0uRO2h+|P?7 zs~Bt&ZuH`cgEl#c&@RyGMqb=2G*~4rvQRA!2zK3mtv%_IlP*b4$us+{ut;B`$Cl_0 zwsdGF@2TZF5XN8=N7V3jN)IS*y8`ai$att3g z!eJrkk4Mx$aL{@mE=&&E1teyDx0gXK8QIdOwNFs%$83tzr_nFP2(`piH*1^~Y4>E` zWtB7ADXGKbGD+o`dX>d-o_bh2dX;Gxgk1?bF}N*T0dK}Bqj7B&Ui+EdKf6ES@bKW^ zDk-FmHZkXa&7$k!paRcwSdx4lH|p9bZf!NG%)B>@b=3#_ptlT0K_gf}E|$8td;lu8dDX(+B`u4&6f%!^ zKfY2sq2~3?1eEqSro4K>qY{ zQ z0eCE3HEw7`fOjOQ+<9b zV+%uk`ak6g2v|GgtJ45=DOs7>nVHyF{^hnnEnQ&TlYf>B#BjeoDR6IN2!wY3-u=kG zZDjsZn`HQVD3G`7|K$2Fdx3kce{9bLbnOk_uJ~8G6&&;cKs8HzIze%vxBtDVRsuIv zz#~O#QE?$@T^oElaRZ?FrT~}Urxjd)AaF}@D%IP2<2<2S$9M*92NDr2OZC zzl>!3*PZeIw9R8=WcjyUo@Qj1SvNh5|EVVw&XS<*DPOy4%zK>z&?((|uP zlkxusSAzp6)chOu&kB@7|;Q(p_zeTQL1NK8;?4AEiulav3h5E0U|GyC(_`e8f z^9w0y{~G<^lrq))#ZiY|yRbCwG?E|0uFGXQ%o8R3R7=F&$&X`Wm+S>d#g#)Oa zYG-ZW@H;213Bc0gf8{$c{$HSOFal+f|2#U&o2Kn=Co(fJ;IsZwv;EIp_}>@;j6Gy( zL#JzP^@p-S_ct5=aU_R_4Gl^KI-Guznl6-bN3>2G;)Xpilp3c)*eRFR^VF7NEoaQCZ>{r%0XzmH!3 zu~`gnBHX_{#l-dx5n>=uh~*zOaGIme&+3h%49zx8GFn2U+a@s@Trcq9*v4(wSeDjMuKi2(mD+2H3*2m$*=BWeg$r01dnRg`(;26rV{PLoW_p+sJ z<+Vi>&ZNC-yL4IM@@$=2!)o*RtMB#s#i`*iq2qO@+uCc_%Im%Z-rY3l9JOtn)%MV< ze14EjyJI@$V@B#&N|14N10G+Gog)8{A2zG2neS)q(o-G!rtb>{+x8z70Q)zhR`~ZO zJ{6T*V@$@pZ0V#;%byQCEIYBR$EQC(bZfw>NK#V3hVQD5^Nj8Xo9bM2E$ii{fT6jT zEc7q>xP!Pw2V-iu+qsvAbz#o&%X_xcUb#ziMiZGr;mQQamI_*sMiq&-)-E&Rk|ca- z-P7Whw;KZ?5aSkrqX-b*b8d_-lNI1Uuk0c*_NCm?{a!~)V;0emA%;r!kFTDZ#jx3O zKkQmplL&HVjt#Y7%74F{)65DWqwsbhHsBD4B&D{?c50W`?Y8O{XUm4nEVbu9_Mu1K6?8;F5tE>mYq76~7&Pf~Qkf7-7TRHLum8Qp! ziu__fc*i$nN_WcZ-9`o8%TLIS{Q&rmXCXFVHNHsI%9#!?UpQDbKA&v`c=5=p@9j=q z>mP|1CwXODwG=QM?K@2_UO(QVS!F;n9Xs{$Jmc(Xn~hH~WKJfE%Mm1b?|SQs@wZ^*J8G)m5eg%y#xzjlKwljQJUZGkV<#?txr zy$jP{x>Chd!Rga#hR^aIZ8|b6P?^#Az@azfPOE-ZjpRN1u=oyZEfLIhYh>mfeC#$R zwnWkH7=kcxL0klM|G%(gkL=l~eJHXM=x*J#s_ z-S|NOan7FhDV!95f%bSR#pgO-zcpntE=jDxFWN~@9%Ogfv#~%kR6B*bW{l4 zDlhV${VJQlQ=99%XC;rCy#nwTwjx|vE(b?h2tmnZw9JDqa#~6fSsc(RB@Q!fNjqj? z)j^*oQ0$jLoolc~NpK5dm~SQlGd~5&&n^P4^pE9l*y_@_Y}M zc7K>Vy-zKJiJ>S|i)5FBosEKr$-+W;5jOPQd^b--v`BMm@hq$zy`+C!B&29Vjy{UP zR+mtq9GvmsTUS^Rx?FV!BQY2hf|(T)7&=z}N$_>siB!+Vkg!jRU71ubF;$Ea!Fy%QQ#bqYr$M$04?V&v zP@b-XVdCh2Z#$m>pD=E|`bierzw0z_HBi+X{^^a>!Y5lu=(l^B;jyL8cTv0)& zj&?2)G3d(+gNAWw8cn3sKN!o&kG6w{WI#@V$q$+G!avD7u6ujK0#9_&7ZdO{kdq)d zmWP0HHe!A{(4vW)0RNx20klzRpHBxUy8l4xwdMy&{L(b!feG-&it~fQz@zCu39vL_ z8W}z3kQfLHM@L)30#}H6Q;motkXuB3`jaE(2cUfL^t`Ewu(PD%JS2dom7d~gnuh)9 zo`GwE{u$C%zJs*ExriyWseDE++qzfjTw{SUU4j}2c~=54vp@+$ltgH(LGi{^M`#5m zOQqrbVPz1j3&CAoN)zQ4Gw?ZNp^iVz*VFfOa=i9}1re{*A~AW~O(2?d_7E4KuEMeZ zi9aY4(8Zy)`0K{iKa@aDEQB+EDER`D^*$wE(<!JrqX!Wm}OJQZdaqt`C5evbjQG8)#iJE45L$&7WKTPSz zrVy=pSZ)r2sMwOs=#fc_+TYh0wlJ#KL)93T(5u%|))*G_=q^x<#HS5eH071|77o!2 z(j?ME_%`a)j|^T~kklB0kHkL@Sv=Fbj+%h;z?=k)u|EV@aS`*wgBL}?`uj(+71Jsk zmAI}M2mR%zL>ep-xM309dJ9FP;esC)_lk)$8JIPOV|oRC3wF{@3BuKbNQ*80{E?u zhIn8CqDgM)8->5ZP|Bfnt1Eu(8soXqu;1CDhdEq;Ykaqgv}||-k8LjTfj3azr$YwT z+gMif!>xwvTH`-qv2J39T(|TCBB;yVI$o0@xQnPL5UQ~n96oO4sS`BCdNyIj=nC1C z{tbn}omRUn%APpM(@YiM2VKCyrEz!2__eol)^0}uII zr|{BKD4_~h+GOixEMrn})4?q;*&Fym{}NhHX+CC>pi(+61DeH;X3s> z-HZ(D=xePfu4iBzEy{)t%Yv!9CE4*U3qoI_;XW@#>-!IdHG_B#?j1nvS}@Ji^~XV} zZTZGVd`wrFn00r-=HS%a$bRW7;Y=Z~@}CMD!mPI7>6TB|lX&h)W7^tHcWAF%jX`%^X z2z7~^)}8Q8Gv|3HqlD#U;k$dF$>rt0$q}1u!#%+fOJm~^({>?7iv-{71=T@t${|A} zH-7ABOAR*~B)Drli;_e}_1{M0M*xeejN&>=ku(d!jhM14!h?_)6FWCon}?X7fUnQY zNr}`}!dndP&;W?$k`LD56R~@3%fGf~htheycsXcaeG|E<1ZT#UNt2~PNzgGH&eK}c zWHEbE_&8=PwzWg0!UC2*x$9t+fjQS1=efHV{#xd32_G3BS-INXaLEo*%LGz7WmW=O ze%$zFEaX}%-nHR+Nso}Z|u3{zOwH^>|ep{AjJ)Tf(@e8wQHUqafe!&wS%v>y) z?%B6sw!`@uNb<(D*%h!SHID!0hPql;QkpXu%FNKKvh~BR9(tu;X;SnY4HVNh_R2*Y z9vxSVm>#yplQ`Fv7?%M#W#d~1Bjz?UiCe;Y=Tuw0d$Svw+ih~hZFp^^=jp;Tt@a`u zvY{W7apPvIl>mcODA;xM>CN4Q;vhCM@!2#XCsy8zxbZJe_S26=L}yV4XyXslWa~W@ z1t8l@YuhumLi4Fp3= z>xzZ0HHlK$ogWj#DgE=m2V7oh#CKQ4ub~{IVu!yQ&jOb&T<1FDKq8+XMdqWCe-QE+ zC>!}e55Ww404IEs@q;2d#|>G%2qN`OJ_?df1$+|$&^7PaaBk9VF^^C3oLZXnwsrq? zKB`X#qD!2>)D`e0R0Wmbefq@+D)SK*4@v7_f1LAffN$7tlsVv4CLM9U?amKrsFGVs z!&`2Z0)JP}8)clsx$}r_m_tLk{^nRK@lIj@f-9P-Pk(xf&y~(@^ zl(9Pn%GgbKVFPIpS3nxX6_5t8p;~Z5I9DqvM-7~sH#V8MWJ8WcAAAF8esL?{;?V`` zN-#)aZAk3h)89WF)zN3D*Od~JKU}`omckK_aDxnEJk2?GE%=!Z(SxSxM(CG8P&YdJ zs;o4C6OcoA$bwpy0N3HzO*gzO7CvURV?vv)4jpI)^R;q1pnhAwdjX5h@UUl_R-pa>!xjtFph<3VhCMgkvPtdb$`@j+fYHLBws!NK6+? z69^2OJwy)7tMC!dKMT}jznrE|c3UPN8a@z$#eE=57}fgR^H##TR_nmt*n~!NgB`Q3 z#CwEp_4jYDI<4QvNycv6@yH)Th1ZMS+O^2a_e@e!(YAEw7!Ua{S;;WnxVA-S*RTKh^!*luGWq%AWODSoj;!fUKLx?gWQByzLm*y! z>mPV=Nv&HAgCQ6~^$WM7(aax*F90_=P9LlarpEr&P^;Fl^`XO1iq^3+R5v%7-d{H% z+t-Ibx367z&N$zeunp%AZ%bI2ptiRvYiuLNd8@M1s@ux-v)zE!6Y*swi3LKT&G@c! zb!XVTC&LzX_aLGqWWE>o36oP9tJ-WHVMP^bh&QN8qnsjJo^h(8Uo#__&PR;dQsQ| zNfw&|fT0<^wZq9e)N=Dg_iXd4F_hQwQCRJP)26CEL;wYCS^f?RN^*2d?*=iPe30YG zhBciP<;y_S4`m9=q5T1DZV6oku%x$XkaS;}<^?33D14VD12_rP!jL=~uh|hC><5?k z5ytuq_2Is6lOMb@nV|6F_?Q;$DPo8(9S4UA;h-&|{i_^V*-(vhS=Bui6ubT_7}%It z0z}KZ@&+}*8pRSVb53vN+75nDjq!|&Lxno|sewc)XSvNQ74UYj0#D(_BC z*Xr_6RrxQ9Bbql@)Px3VeH-?z&oAtFOQ@g#M*nDd@7LZF{=lM-xQ!W*~NW< z>j?{A`>@RkLt$0AFLsI+fy5r{cf8!a=F`|3;{@P7kKD97mI`h4X+lP`AwaFQhxdZt zyg;;DbfzSQs9E?DP5*LM{3_rCsTjWT@_(#wePwU*BCJ4M-paGF)bpiJEv1wP@uk`v*+aAVd$?* z#ROAFZ>f3!Q|J5pbJ}?d zMm=MRa> zWxU-z&w5GTxX{oJSVkeJ1Mu_9Fbwd%=&_95UnF1a^TsmcF#NTQ(1B%C#$te#jeI)w z)Bi%j^p+WTX@SyDb${S?J8cp8j6*O1paFb*!29Qn*hp_C_D%GSf;L>IJ`9F}Naj92 zmA%Vt%g3rvjyq`}!7!yNhOUD#H_TP5tYeJUQbaQ&P*FuMiVqc5RYbeW=JenH;TL5# zp{9XegxZ)F7G=hu5ykbvE^3NJqTze9D}?BMBQDQ}6TdO02R|!T;?EJ&A^Z78KgR>$ zqJpmUnoUzORT)^R=%f@StCUEKh1IE$_Im+Ys6I5H<1mx4=DOKxy7dflG$NPKNHfKC z!pCMbINe+b*J{m`Gn0OK@m5+9LW-w`D-uEyG%H8#=;IM|8X#k#!{nvAUGUfYsdgTB!{v(Urp9}w)xhkH7 z2Bv$xk6w=EcQJ}X&DmPBD0S84^TW-XzL^j7E;>sgQwCpuHoXL|2NP*4n6FhR^P(}_4!_YV(=PO)!gr7-km zz9{rD?+Zplz04B&a=s-DrJ~553^3@NqLB}OwzYR$)3w2ZKvy3 z29NCVMU)4^%%TLg!uljO4h-rD6Mb z(}JD+Tdv#qjcDQR6Li=Gf*-J_@M*$dfrZ3o32uB$TfZaSgY`1R*n@I^JdM3|LE zY(j4VZB%q{@>=?z!ShBy{Hbm|EIRlrc@UrEh%s%f;@y&QK^!ot+dD)7L@pJ+SCCsp zHMZHx%{FSpSmh|XDr_vpI63@eBQM9e>`cc1aSL+`T<$E0z$W->`E~$cq1KWYQ9Vsi z zBctUeH(;!Mdol&Y2Fdqrz#7nl_(??coQa6R*aY;x5D@#b2^8y)Ta?$}}UJ?cMt zdf$Se0oQZJDbe5bv!~a46a?2#6cRp*6*^@`{k5JGkPs0MU}_v)M_1I#HHd9U#aK47 zfjMD7%)!EAXuLqshr(lMJ%3yNnsYvJGT)nM!Mpncm%lc$0pq}KSC-fPwv;2c=EwoQ zE}`5%)9u(kT7+ZZfig_CcRk>8D6C2XmUWRZU4^XsrqN8F8>P|K*C^hj0wMd=&|&mm=wq0@4*v zEG+#XcI0}Rq#AAyr%7-A4=Eb@ke$SSbbX9dW>kX=?IsE1cL9D5&R($&Nf}*+Nx*>` zkQ&`cTAAV^tpRL-ZwGyDK?Kg%5->BB6&F64KR*88rAt{v^33~HR`4}guVZ60f}{Vo zweA_DM9)+vPD;CnEi6K(n1r`rd98W>>2iNF#g*qs*GD*h@w(pY`{5(1+_m12Y|OAL z|F32r!8OS2^pA{3w=u0~v)nFF66vX3Jd03f>Durs{hWd2@#S?Ix_{&I|4p;DLu43O`;N^*wg-En{9fDfXrrqyr<$jjF zb-q<-iT2d4wA=5=bg~2#t^KD_R;_5!eQpF46G~!kwJ6aN?)-!CNb^V7vljOb5P@{$ z3wEt&;a#gV*rhqI?3D$Dd%&4~`dHZsxZeF(nzjO4V=hBh_f(-$`-LXf{D&K1T*)FXtv-9>uRX-#WH|ErS1h{9+c zzL?}Clq5Kae85K<_%2LK>VfGK2QmdIxL}nKSuY6kj`yGIhvL~@Bl~i7cIf*g2;PI} zuDjxR*hAJpf*Y6n`rdDU8?-tjhsMyV!B%jH-y&I^*vrQjrA7u+fQ&Y&N(O5U)lv4{-z-x^A zEg$OL-jo}60V6jWcH@0;{p2A6*SN|OsR&1kbyZN*C?ixw-w}z#-H95OigrWL1W<$L zat=&$+QUt9$L4(pt)r+(<3Q(FuD;Vm!95g?jAGv$?W54?ZoJUJK-Cjl>ST;TH4HXrO->t)qU_WbhQ> z3tz-sL7b^3(1K)aD?xEQ%n4wh1(1lx0NJt3&-f*v8NqwGz5znjzu)&sM0EQc#fHYl zI*roQvs00voFR(?Uo~oxJU5T?O)3n|3D<|@xGbiu&NQ?cz`sUigxm}Z_VKxQ)_w!y zYk6`HMuU(Vr)s+y@rZ25;k9>cvZ^O%scf74Np z+hlqHDbP(@6_4agxcl(_u*Q=1#q?B=ZaHcA7p#vgI?R1K1CkS&^DltQQb*oTCb#xe zzT9wy;;OiNA0=s9q7aoQ;{ZK!A?ag(iZ8Dash`e>$Xia$+O5*RLn^HK&tGCg@Mh@Y z$!V0R*BoZQWOdlUJR72I@h(M-29D3kzMk~b6SvN=NeF5_?)!Xf7nB>{-yj<3IC)2> z1ik#Esti+%)wf{GoAGGjhWUJ76?8unhiZ`!>*cs$nzl>C4|ed{Sn^*X zsjO)Yo`-^WPmOXS!w=1-2#LNaptov?u4(jia((&rz>oAPifu5f2(ALx2N-AS&5@dZ zPtB1rYrn9B)XPr^+A1OyuITw7ID{MTSqO3wgKxf-dSdJ})vcKO#6GyX9}U6v_nfFl@z%+qYJ=QDwMy{Qq{ zF$yr875^lpcC9s6p0@cSD&g4aDYglM07q*c`m)}2n`cP+z_L{u;OPWbEk71*DwyM5 zdX0ssdF7!Ta7&90spvX8Z`b|$`h04|b$8nlc^Due*s6@A9@J2rbJsqNrx(Mg_^_X< zOE)~m2MgL0z!n8<=8U&2K^-IK`IvEjv+}9|b8}pu%RIMRHYM)9kdIqgmt|AxK*U(~ zC0Ba5lF*i2c6`0U`%oU%dFAk2ky?w2DrnQ2r1glPdS2{epKNJLe*3ZRX4|j9%b&-R za|p$eY!$yHN~l3(?MOa_w@@i@%CFzGZ7OG;m)ubbF zcvyr2vI#gZ62=*m2K()V|MAckynp+vhMy;ra%WTG%ZBLb3jdF@YFralwxy5u=hcoy z8EfC-;~(wI_1dVf#0iq`C+5lPWkY*Mw;^gg>=v0IkJHLuaDG~GTf%2q-K9q&AZ>H` zBZ*^!tB>APV4EXdryq+c%&6Q`kD1a9hO-GSr+J^j@CW*Q&O5}XIrh;=_^5%WTUok2 zH7YDgWHj>%UmUVh_}@YJ{*LYW{}B&RMOM%34H5N51yo_he*^6N2BiL<2!j8`3Ivh` zfowsBf93?DS^p^u$nYC92&4x7hS9yHzbS&i^fxaMnEqxY0@L5wf$8s9(m*iJe`x>$ z@iG6S1|ZYFLfZbK5HbKkL2u~X|A9jY1o<*>{2RRV*cH-Q;p@Y#+gO|GBB^C`zNFeB zvGi?iZftxWvR#W@mH@P&X_NpIO$Z@H2zmCm7E}}sn~e8PIL6F0z_$!NUACtKP}}^;omF!qgK&7Bv^o4u25Q zJ}>K|Nyz*KVz5|y04bd(eN7cKk4$)2W44 zy?e>|D<<@Pf^?Qt?JO0Iv39Cq)!^y#Au`W(12O`U%()=85N%tzOqd6 z69$>$r4ciXp_3f)MlA5JVSZ(dmOJiG6?&gTfr&22@EIv-8p!|^or)gLIhEP~OpOB0 zgb11*_l{>_5K8J(q8RHnmjodfy=tZp;OeBNYUs67^ib$spuoPJKcvAU&Xb&L1RIwb1kl^FsXlva&!_7 zfx^A_6z`1%$CkM7M7$^#EsTZw)(rwzAaG3|mf6)A^JS*#f z;6j1oOO|dY6lS@nOx%YO6OhVekq_qIz)h*+-kX~upHWjPzw&RHFxzm4y`O#0ms2wc zpZXcfCcD$M_zPbiSTTqUB70Ktv}~c=I&$%QnLM>?{bW)b&NNVqY)&1fvr}fDF|c$& zq;E{#cyiFvAY<9C>lS8TUPay~gIMGZc5-~!mCt!lHp`*tbo9P7DSjXrEiml_{eUJP z3s+6rP6Dpg7Y@E@&4mG2uN!^iG%*0EYjP-u*BKp&_~Zo-RlDz_VFn9Rtz5)8zRl(cIgJl)-VSgI789B?t7eU7rWK+yWdP{e9Du|I$p+0b zzvSEP*L0Zu9%Qz)sP9k-7v=!9(u|$R`@hFKd}= z6VjdipuGGIg%t{cR-lfMNBLo$G@WxMR4ZWa(N^HRpzd+$`CQ+40Aw~;D|zh#OZ!&q zOaS;Z)d!X{j>X(|sg8ot&Rx)xOt+bYJlET|w?Jd5TYR=Rn)}JKk?{O!MLEnca~-!!?HBg1=zgeP|PweYb|%m?Cfh=NeG| z?iONMQnq+}iq{pYQG31RiusJ^K+a3n3*nB}@}uYHrJ3DA+4c9XV0Q#O1-z18D0gfR zJZD6U@1MBZGI<5@rtrRH{FGTQ=mbVOXoGkHe@1YQ)RJ$Q*u7#r`_%T~>AMyvZvNaf zE~h}n#}4E>l(sBh=~rauSXb}fr)hJ~c)kQh8-1NV1cN%J3trIdxFDn2o^3G`e^AWW424-gsJ)OxNCwDlh77@l7r z6IY)lrT9>$UutY8Ty#UIqpEsP5PH>^UJ1VlIg(HBOLLyo;s{waDt3=t$OShARquYG81;Wy$|4xa zQ0^!2)Dpf$ho0`Q${`Q@n$TI{)w`+U-;9nR7~w$;FL%v9??R>4QW)?oV-`vGm2G28 zM5r#slnRR)d|UbP6}4Re_D6$sATfLu`mbN;-)Obd!ab}&9Q~6j&CahzNOrGFHg0EV z_iptv5<|(FAQOxhw5!c->Ql>d=oQiq4g>YUj%b)niDGP2Rlu-@aks=LQzmb7yT{Z* zT8#CMf0>&HIG@oQm4v|6ASw+NyRcYq%w2@J7XU)si&`{9T^OvI=Il)k_#&qOoxVe7if7D7pfQh z4(YBWrV-}d?oCxx5&r%ZDr@}+s`VQu@LhYI^8t)}>8Ey{tl9)|Vz84OlO&U1`~0R2 z+?t-;8i+3fZ4zzD9!e`Y?EyHkTcJ_j&n<9FJfJP}l%>nkfq@Z3^+$O?hWOX&-Xl9l zs+Nf7aGtSrLpPPglzaV2`hC=Wilo8dRyj`!3)nTh6G%KI^J$}0-3y&VW&B@j-wPi; zQCm^fURS9(vZnMHRlZ}^8ZFm{uSq+yr@c&i5~omCBh;iWi)NMR-=@CTyT@4xwvoJx zKVz*E)AUEs4#7$3e!*s^3+)#(?utRxPf+(xGe@B|gLTZJ(luUm_?W)#wC;|{P>UAz z%bv3@J29!Znpw%$90bd!z)Wv=;rdAC=G`OJqpwFdhREhl_niqRK}1#TMtJ>UB<-HTIg3o&rFnrf-|QPRq!BgT=dnZ!f4`R7Jl zza8!_R~w!XbMQx^CBKEWVYteUnk|^V;hH9RqV&Pt^RG_`FW75?-SVNalrHocJMvt= zuH^SI_X)VW)h81s+3ZTO>5PYSwjJ+{?iqkuOC9bS$|Wh8Enlo>v@5jng0R~PM2VET zB{MT>jP5!hnO=y!g3x{txxT_{%vD+Mp(u%a89!HE9NK7#Wc-N8zofijpx)sH79@o~3)Wqd2w;ud}ct z`k4!9y^*;ZrNxm89qYCuY}fC%gWcP^I(hmVc@%p*Nrwv(^S^jB@&oQAD_3am7KEI8 zkIz;|&tjlLInl^!C|QHhAN_@+;xxg{GeE~%;kH~tarK|&(KYm|PE9W;=)R{}_Y?)_ z$R*8pTj#FTaGY(GQDYjX!|z+{7p8v0*$Pa}FOhR`hC5aun=lVlLEZm&q;Oj05Qt?w z(L#+-5GHH}Sz4uR*~ebdqiSDVE|3szvOI(~0qsBf0DrafK;W9+qB57CQd%IKc zfA0cdl_rQ*5E2hRd^+5+y*3O#kkIV}J`7nc{_yU+MzUE!jSMsoGFlrGCPga7;05RP zyI0@qkK1#cC%JZiKl-8DY2|6I88C-hPK_}5fbRYuT-^}?r*PIVYv@{7ClKHd+T7y8SO)W2_bUA1r&5 ztePBo$^0^UspoqmHd@aJWazAQPH?@$Gy|vZn4ghTpV0IJCS|HW&d!IcJkm=b&JOwG zbVgwCVVN_=uxA6{92e1S^_rEFp>Q;RsN(*zW>miO9O92v4Sg;Of9dO6Z@qvI)iZz9 z)NvDfrB`X#$IH`y&=&8HJD*%xC*iEW~ zQkK$9ZFcr`ZSdy-zv3$68_1>)*(rx3=}@j?k8-kxnFV&mWHpULMXi;cU$<=iTuXS$ zaar}{kuKO2-I6u41PS^0w|6Y$=yTQ`x8RheFTR^82ZCy_WK~h20%k#qvnr@an}-x; za5YsvYfdl>^x>mPTmS%7xeQVU&hpZ#Xkg;LN~Yr?M>L|RN6g%JXCPT<(qB(0=GM|Ag^2Q?Y#EP0XJvWzK3 zK;FEjPxtzJ17|GYTy&5RIcr&I1~9r`RwQpMeIbybbad3(hqB0Bw11`4;6FP0)7#Bu zcK-9O$`|d5QN3#Tj}!hCJVTv=b#7+0$(>E*Ut$X;YcemF-=PxcF$u*eH@7Ir$67jH zN*38V$e3O<3ce`H+M8cz(sDV-Xf^d_HDVjrBclRTOFz~upkSd5CXN&sFUr;hrS6sQ z9FS%t%jAa*Fu@spvKw{KC6>nJ9)N&d6#cThjIie~%hauz#Y)}%*3kIe(T^{Fem&^@fp(_4 zUBS4khx?U{kvb2BS&$7Z3HS87Rt@#Vhpx!UJ_07kx%uAJA-{4RV>T~Y1DrpbFW6R- z=oZgb-xv%REq%mIJXNx_l7+yik$vt}Mcgt+jrCL6e9dq2$ZRX0P+&6^i7Clv`joWP zOko@gwkVov7P2jH{#9C@GGg1gm{?6Wh)LFA7D_rlGS!c-t#Z2_*9Re=+$_=DVgQld z{9Q`U%1MTcLWHYOizG4MGAf2q;fR}&%QVIglfUsnEWHj#%A9o4!~%xLub*VDg88Li z6j4hF4aT5)gWcVgob-+qE2xmM1_a&(art4=4^QUC`HMR95|}f zA*g^h93z{3er5b%`7ZwA)fL8ela7LFdq9FzvgsT|xQ}pCFc4PCQ&0iFu1@um`&c%C zrH&#OZR&9LhlxSE9;l!26KrAHhYr{ow{vhh%XW)Srj?HkX*b?r6e+5GVU*No_@acn zLpSU2EXi`sA8fiy#}JBeo$Mou!D@KIf8MjyG_^GbJK+;m>=!6$Ibw*Z0A$1Q9s>m12Waq2Y-O$mbm-8tnwx%BzH!j@Ay17y@CdlBHx&9pWj-gxW3N z?3}IbXeS+|jJ*zp1e|nHqano+e*q(E1LPP)GA=#0`N;A$6EnVQcd7OZ$N=g9e`E$H z5l7R(%B&MTZ2qf@iikCq)l)pW@$SLA*D(Yi@Ca;-(LWkXQmv zToe?`=yb+*gQuQ5kJzJa)EK6z=;JNg7`mxA5Bf))7szMGgk;k(#q7~*yt$nuiK%DBy5~ZVpX=NB{Zw)k%_fwYrUtxZpnXL*$NfNh>@A&>~D?G+FLEF zwWM%6I2!r+h)cF|zbM(y{1Ehgv(OQfmvveMpSF?&t zE}N=~{Cu>hy{9|KEL&HBP?CFrW@01FEhy3JG#b?svX8>VRL$59j zd*d38qFAjccYCL0xtY9SY~R2|?p*?J_uxfXlMG=+f=gS1rXxmJO0|5I!ER4twR96M z2N~(GASshTTtX|EI!}_u&^88c8aNi?$c|zOS_bN@fMlY>d}UT|tPYv1h@;GRW1VAv zH6je9=;OhkWb;S?sPOuh4o-6&-FDr0UX1tQi$q(`L+lZv>guLuw}$2|Y-{e9ZJg$f z1_P02EiGDbc*EmVvr1~sU%HW;${_t{RqdvvD_8Okz%MxWbuT7$4S#qZF5R>xJ=*iu zcv!r$U)H2<-E5_sU0NPPUfM;ZTrrRuVHu}HPFc9EwewwOKG#SI26tN! zrtz*uC7Up+XHyqZ*99~+82#*ZQHeZlP+NBKFT`cl3fg=SauNyk)N8KCMin&`eeedX zMz&L>6%-)%nVVZ24j9EA577>t48+&qfO=u7l*W@F!AaNpCe%BVx#yNm5qQ0dR$dFz zs1!$iGO8m9!pU`33TQMQ0A&AWlsJ4Szr@A+V9P}Y8Yu^tNbu3R)WFC#-YtCbOy51+NA7pfotDfYmHB}VZ5u?K1Ck0QYLge z?|LL#(4I<};x_$psF8o4#L_+L+3;EGnfH;mpX@>QID_+LFk=7JluP$@_CAfwDzRN@ z+!Fd2I%Zs&V~%6oo@#A-dHufZ^8NU2cp|fpOmNV+l(7i+N&HhaBF$H+@X+YGK1~tN zo&&r>t(@`Dmh=)`nzyxukS3u zg#>e;qm^LbS`|qjx4$`4!Z#^FWQ7q4YPKX<-{bbr>?+e61?!xLP|3 z6&YmaIaB@jjTv+HLDsudRmEJ$_D5nJJ)bMsfU1+@nX@vfvZqF9gKE@al43RsAxH09 z44iUDopn0V>Szwh9np`}JYNw@LzJQ819c$+A=BlJP%iUt8@-T!IPa0yxR>=7y{N%< zc-o|H;#Jg~tl??RXlH?vNzW_msc$mFu2w^>A_g?w`!F7wuI8*Ewej6(E^$G+MX%Ym zrZijsB&%9GJH7gqfK8WYx0H1kfynEKEfu#Wy~?!5^b+*4wdYfnu>fN^xC`g{<<@3e zkfDQt57AgF^jQa59(>X&_XiXtLiz%W;Lx-T`?2e6-(>Eqb1|t6XGT&|3t@Eu@%IOJgTZhMl3keq8v*aiMT11<7Z}q4(w{ zI)ukg^PBF=Byi>Y0Qi&iewHermU!843t?hCQdqM}t=CN%5lNZ(x<^$-iBk8@Nhyeh zRTyh9K6?`}D&IKdilQaQcc-`Ss*<@EC!~!>He)l8GzVH?SqDZZ`5Nm}o_s62l&WR& zy(-hdu^n0y*7AF&0QFPH?OXa;he2_so)gQim*?|IRNY`CIGi6!-|lfg=O4rVVD3e= z2&u6d{Grd&%szNP5c1XH2U&xzFQg^GF={WuZiAVQ+!5*ayC@QkABeSal8E(b1bW|Q zo~^0do~px8ENfyXR*xvGPW8=I^D7_1Ftxa~j;7}-EHRkc8*_E87D7<{v|ppn^&PAO zt`qbf%#2-LbC+BXjaAJZ4Rdeqv<9 zblZja-%mU84Vl@wiCs990t|z z>k%u&jw{9@>$ByNaN$r0*H@S5&7!oST&C0AY(?S4d+f$&h?kNxiDPokBTHA$MefTm za|GY%peZ$reMEAsrtt}p%qA)lhwd}XoA?-Hg2QT;iBdG%oR=j>6{1)hQGsV7N_kQ~ zbF#`CiTy>dSR&*z?d}(8RbN5LxWd@f=xVz`WSo_5Gzu1BpJQQRACg-epBf|S(G5(B z^89vxE_0Qz%|Xf{IsdrXBMhEqjf~t})Ocb|18)Z$8_DgPmL@k@2|)M~Zcb!<*;lD6 zv#hQ~T~+f19Y|G26*!fv_*h$i<2yx6iKO`ny~!z3&VXirRMRW#F-y+gdxF+v_(?8 ztx>&)vn&Jl%)|C7gWYNsr?Q9%J_?j{DEU-jPMfSh7s)bBv1(gN&Nxba6wr*G=kLug z#<9D`j5mYJu`JUYrV&=0E}ulKdM1Sp!Jh7cm3KJb{C|jh3!u7|bzM8bU4y$raG1Ee zJHaKmyL)hVCrEG)1b26LcMt9^|4i08d#`o&uJhk>@2NUe(LG0x9*iD6yPZr94a@cJ%{`eC0OkVmWf?t@dk)i7r2*p)?fb+gAJ1I~Jug6>XS1P?tO{38ZD z2D|ta4K>f9jWTI{4VqzDDLKOCy05IC`A#Z>kGYN^kHwBB(Ur~7EKWF^b8WeFynsMr z1RePykr<(fr>zbmXMPf?0Pe+W#I+=gs9XerKZfw11>TWP7+pp3R`|hOUdJ|gTU_<+D$DB$UjP} zpBCC0Kj~GuqUtu#CwRB;=1JTlAI6B;(@B;1s74 z*r$Ku%&f(W;k&qJ3fYA8Rq>Pvi{VMReASP@!m>VLz!t+hhIak}bec8^n}30e&iNqO zYu>9-ZecZIX22@u{qj7(72>M;hMCEIerP)B`9P_IJ#0lHhwrOV<7M($lqbKd%|Z67 zL+QeCa2Cxl6`H~GwhOBjZ|RFlg;Gl=-i2y}dOJgv$hB$$8hX_A?w)Kp4r^#A$LX6> z?*S1^v(4wP6Ky^dd`mtQvLLO8t>&?(s(i0bATseDX1p(#lg0<3)0dEp^iq(Q%5KJd zC(5r%chfb~m*EG_O`o1>gHtYyzYsh+ve#=2h)svW9c`D|exLVt(f@|ER3W=Vxzo+A zi?D-5Hf0gZO+oTP6qj5SX)JQdG?r^X>~>NQzZlzs&yn--Wd7r4ZSj+i&<@yQU+iKe zxeq;1%cdYQokg{CMqBkX;n@`_5Ytc_sV>dLcg?cRsz(HQyESo~6Dqg5YYL*&ukgv? z_SrT>qaqeaCjx1Zt!{;<&t{`a#3NTlpPo7UMWO`@CO~4}F7CAihZT2NEJa=h6&$}9 z(1~v4m@BM55}03RV5h=Xm-BRj7e3Mmt+MBVdJ376ekU#);Qy{Rqp}etB2KZL`GDDN zZ#Qpvph=#o`?Z(#0=~qU0sn&FmEeiRO36jMzb+vW>a)}r#{M5dmIf6m5Umxwp9 z$I*r4O%t0Lkm8|Ah>1;IifiCX1Pf1dxwU?if1W68qx~q zKy3VE!6E!gL^OafKqvkIfQyW+m`@_uU3lF>2el7;bka?>UwVDS@@Y>CGch)PdI4)=C zP2Q9eQxVq1ql+Xj+0BwtItyFY4t<~CVoScY!LTX?LY7Psrz(d^EWPJ`w^^AXS)(E- zLFTT!6-zBaF)OLl!&<03R;WNVr9f$6ma0rR6&vdquyaBOE*GQ>Mk`X;MGVI+J0w5_ znUAY5Bus^xFAY}>l@iM35Q89+M&(w+gg!ZocZP(1bm(j%!sH(wo)y2sz7vh2y`pJu z9uA7eI7JxYfFznll0T&bC1zlL7o%^dX@0k`ByOx|U>EpFaw{B66@(8W-a*ni&rN)r zq_~=^b*eG)(>Zw=NN1FEiWO?XP{0F=p1HJ|32H$^U4q@6+T%w^q{TDQ&FpxT?OTDkc*34YXKExKh6PDtyiQM0|+h>|fsk zG2dVjv7w`DliGthG1d`jKt3YLzW*FNP!4X5)HvD^GjM{`TI(?vR<%3hr7^A@1BxUu z6YlZg-6meyc+XpTEOh2Ydg1kqtYER}F`4t=8zh1RKJ_lv4y8rv+AZL$lWP@!2{QH` z-y0uycyRqEU8sY~^_9y#K*1Yy{-{Bx`{v_!RfcRkK^;`Nn~#03AB&MfpNkOrISFwH zxd=H&#w=XxMxWuoAr|q2AeFya)Zkxo&$D_HxIe{Q!D?6gM$DZ{9q6xt7qC1N4@eI5 z#(c8<#^TAb12O6ohA1%OU=s#Qj-myJsJeY_F!VR~tHfTJsMqr8PO8CiA{M{5xDv9}+??^xm zzj0{V&lqxXX2YN&vjAyd=|E{zDZZ>RaJl9UXg><5OhQ+`KdTLBm|sV~nkoONpfbPx zvy%y{tMQeX8AJoXBo)@ozeZ>;^mZ}kT^<^f*i1TTDzusJ2nx$IkxY#70Gz@!RH|Y& zNTDF0z@1^%->l_x38WHF%3-H6{jUP?S1auAQ^okwH-5j0Up-oXcgrlo=f3glN6cih zwcXhhTp~P)am%q{C4FZWID*Ww&u=WKL0Bz3>L`wyhs7i`0}w3WFAyw%ZvHCw;MWa_ zK)~*~aSr`Q<=aj1>&O?_ob^WqJp0d1QM|S-)a;KPlaRny*U-NT-&{moFTY>K#sR2U z)~|x#R}YGRbTh+!M!7}O?N!_$>))hZ@3uG%w6P3|w)Cs0=`<`gERP?<$S_ zoP+eL@Q!cLx81OlnrQ>i+BFn*EpBXIXrKGQvTz#>KjP6N;#DWYj=8T1+Q7Pdq0k_p z7Sjw(R4XbLL(el1)8u{MSARPbJx46ee4JdT3(?+K@8x={u_Hn$A}K;4LVqG28WF1A z!2@ah2v^Zi-YvMjB@bF5bH0mytZ zt#8I3%(lM6C5?7&mP#M53Lcc5W_>QMPo# z;AnTb8;}ll@IKHv^c?0{!?KTdTq~V*;$jOez}#1?pI+((W^Gz$hP`FUQabI9HD$?s74uXH*9Yov>QK2W)rYBUVCsd&4KV3;Q`k8Gh0^Oi& z(lCM*JJLPZaz~VDsrD=#wx*t`c`b*`U0q0hhgM67_k5}^HFnw+#&SQ`P8xHyH#m4J zpHpXEZSYW#Yfo_%SM}gXR1Psb6F`!8rCb$L9(7ot?4C?EABY?2l-(!6oaTOiFtK#V ziNQX@Mu!=i`zKAb6fFX7Xb7>U&tg&N3;&yF=0Dm`kgE=#pjl9+*uiVWcqaCrj z5TO{N3rnk%=AKgWNjtIRMcE#Qaj)etNSXFiMN@WTDvIiT{7W6K5PUQa>kKCAXCjD?@za9!vn;HEGXQQiQl;Qe z7LKEqOMNe%jxsl_yrNQRU+Xwn9ehR&%h!HjA-a_iq)$hCpUe2<5g3`hP#%fBFx_L8 z>qaHPT@NF@FpV9|e>(bJd}`k;cUz3+Wj=mf{V>A&RU~UPmUoJu;LglzODsn7+O9wP zKA9JbFIR3%?)G7@V!Kw(W4GOk^QF6P(r|8`#XRt~bnZ)G0Uioex#kZ-jvD8v;o3;i zA8iAOI@O>Kdvp_1bGP_&`(_mgk(bKNP2|6<<0oLs-Kq+k!c}IZ%?>rPYgAq2RLJLD zHA=tM&y3&EbNZh)#XD-hKJaB*wiS$2*v-;EhVF@IIJEZFif?P=+09bl_>~%G?|H$? zXp5Fueoy0wvEF2ytbF7zX>MeioMIGh=%94DJe)aU`XNTyw~WgK45}H2%qgoWsAaQs zUep$-olp$N7VOOCt`sjXlEjk3mXv2o`oTUA7ZyDFylT+#4tw|Q?_cM|pA5%apsQrP zQlu|6uQbE?tij4s2||aNspsiGFwvX6l{10cgMj;LP{rWeUKtIi)eh~StK_%dn4YP^ zIaxk*M3?kHvWfCeFvSqbWZcG6QR?|$yE?&Y;AfLx)#lz>!zkwj7 z$07flj8^7No)9IWhYz{~zhW@VsbVCG<8{jbQZ z09HC?c2+hZGnJN&k%0~X-~i^OvN15yv9dBSvI4VCnHYf(SVjONF!A))lK|63f8kkw zXO{jA&&vF-49s8s|G4U(&kwxx*AyxK70dZ==iwi~!v76YD?9sdWFrFy8!IdD!T&R* zmHDrj#s4aimWh?^Z)vpJv7_dJ3`l`@Zei+cbaWRGwX`AfG~gI7*>#9W@skkdDEeCW zx1-Umfe>(>V;mHz&?k@mI@E~QqgagJf+fs;+Om8_g(4Y~jE4m+4&b9a(ces(_>6x$ zyFGO@7*p{6+gWy#dwus$fiz?rC@&|Jj49@H-e#inO7*8mSaYDMrDhC!V4jJ!?!6y> z{K?9&ys9@Juo5-Ic< z5e0Ckyk=pi#NuJctfHYI&V797W41GQPjxbNbrY81wdd-gi~8e`fdbcI_R%A#o;|Gt z-bn6RJRBA5iVFS6$nWb>Zq5s|1`78SN4|e4r3+Nv!;a_;J|90X0pQ2rVFWCQt zcK!Xv{(V{hYl`}Rn`_9#_y-k~osb0xOa24x%EbH!r}5W91N>_H#W)3S6GuWyLmMkS zGi!(6#K`~P0yF;);39u4>gr_nty!zN4Kv6m7SCx2R7;tw>t5PW`QWAftp9zlPeQjjC ze>(E_bP6NL^fh3ZKD(K1&p5%pD+ufL(H@ihCGr&! zuU`~1V70+Xv=`a+^tk)@`fb9^lqQ4avDbaz2u#G=f273mrTCEAFi43 zeEE#(!XG2zdHL7tE9l$ZRKKi(ir?N;oI8_JL4N$%?Pg5sI4`;01{^l6LD%!??adke z3Vxg$cy875Jm30;uX{A&HBq4P*w0J;@EH>MXlRQ=)Wm*}AUjEo%Z=b(Q1WfiZ>_go zliA1iaZfPcXOEZY$R{~@D<|Fq)1s6pTm2-PcjIS|j{<3s%N`B~QDUXa%0h4IgkRia zX?QLmE4fuYCwpxbh`cM1r21AJsYd--dJ;aBe}I*qTIB01p;fCGmY6w&HVSjDd@`r< zzEO zU%GD=?+6a7u$mOV3BQ*4G`ZItQ)?;sbN8LqY5e+pMWdXlkCYYnoho@G-ednbU(62~ z{COi+X>7I{hs?EDw~+;J3WFe)9hU^z@okf=zVIVA3NPi%v&_d{#yq%Z5mw(1OFhLtlJm##hE>{$?&3 ze*XPkdZ@=El}Np}-!ha(5aPaKUA}a=R9wt!#yC-yGK1uvPi%KDn{02w|k?tNV(L98+o61)Wo5P;nMw&E~RM;x@( z5bUnQSM=;bDvR1N8FZZ|M#nlBX?bMLm(CPe8|=Pv`$n0LwIJ5s#0~Cxst%cB+78cJ zrh0P%4^Ry8Xd4Z1hv1(z0a!|3mF!O6VZ=}Es8m?GDq+$#^wlxwg9-nb=*3ql`CJ*( ze=CnZGGUAf>&#s?oD3~ zsqbyn>S=!HT?T|3(;FtRG#3!oFY2Vid6TLx=JT~ZgW*ekpw^1AC%a@T87rcbX8^mP zDT#sZBJ*yyab&_6O?j3oHO^hQR(Cw4`35MdG9%>zDf@?y7n_OtBHaw$3j=eT4+%1+0Wz{MjP!K8&&`$`RfOsl5qA~qCAZ&_fNL&NY zguFz~gscIXin$af4fbhfP}o!Yju1hJ%_7}4CKL*L^|b-)Bjurfv9Lgm{Gk6qF4GU< zG|6gdWFDgQLB|ur96i0wa_In8HCJlXY%5|^-*(7<+%I5GfLw5y5Ve~e+mIN5z@+db zt$05%*mEB;Abc!qq@NnhgbgB$h4Q|zOfy+Lm3!L{h&NKNwpfrRC&qdf|6V0UKOju# zjSjJ>?4g0r%vO;|UQ`!qV zYN@r5J>%FsaV=NG?rIq)mvYEftGF)amLQ(A{Ui!=rzb*k+%aauyO&(kM6S7e;_)wq z>I;U8a;{L^qXJ3AnQFa=Oo>nlLX(Bi>lNk_h3>RJXNt(O%je@J0F!aD{wrpQqyT6= zO$kt|^L*8~3G)=wMA8~{`H;xCfV$8);FC)P)#Z?8{7fX}EfB;C&Yo(P72oCd6TNv) z=W8C-q*kJjM5~NubgY1H7h#H7X)HBnocT0}qQF+tCoBNUtBxrMp4D zfSCDXS|p(;n!4TcF)c?Ee5!^~xQ=}6Sk8xd;g6nbB1w909-nqRcU@4PatPb_=*Ju9 z8P#x%YXv_C#P>NUW2@@{%EL<%Z%XN4#Bz-D5lNOzd@GP};y8#5t~>GANG}K(^#SJT zvEiiWxSYC9c9TP{Q*(+NW4!~ccrkjO*PSUgd7H~C&&5CHaTOuknEjafE;EREN&D7L zdwL6Sx2U~ph9+eqTCi1!%X}e-9!H!6BcbHIi>a*u_EAMa3p%?aP_>^4(=u*Zo(AfV zT@Ngu)w-FyzuvP%j%W7t1~*VI@c|$_d@}Lz1B@&EMeR-Jz((v0wuJ2z;o4l_h=d3q zcwVSG^~K~{Q5eHXJNQeWExlaP;VY@Q#i6?FO+xZ}_`#;^!ip9`0>t8Rji?QgKg9tm z3?n4`Hn=CQa9{UBlOlCNHOPN{JOYEpnlyx&3MEIB^vetO=w49LXh-3ub-kc^CLU$n zG~#Rs2}WOX-IL0zK2%ncZtIXUvj-`V3hEJ#F1w#nZ{P3P)R1 zS*;{Km+-UmB^6|SfK(Z&wRc@v$a2d_I!PQSn?RCN;Z7*S2(=k>ag~Y zDqo_W2VE99Ka2GPbD~tov8M^;6e`e?Woc$6F_x2)Q{AAL5P40LKfL)iX@y0WL={Uw z2J=0%t$=|Bb(Aj&ZyWMRr{&rLe3pnjc&U-!jQUSO-{CmEAxI8()gd$-AzOpYPG=dE z8BHPSecv@$UM*1tBz!5?3?8$C+anR)dbA{7!5MbmG?p^eTM$lf9ypWObXwIIrLo9q;+>V;}NYR+YZaNLRWPF2DIgA%Kf(!T&J~-OEYNd{Dd&JF@QO6@lccj&Ybe%qi3~#kT z@#+be+G!%8m2KSYamu*n`)*fOg2s*jV}f@lC!aHVLBm|Mm!;;yI~0f?v{kkphh2(S z{0bK@GGbbx4*j+ePQdNq#MX~mQZ7s_8N=q|30Zn+R}x|>*&_Q=4ao>#PerfAMeFU5}LcskR&E1(Qz%Iqzu?R zntl-VsZw?J3u}YVOk|A-@7E{Y#D**}El{q-vCMB+N1~-)r8_0xkp}mK9STO5APObQ z1Qp$bKDW9)1x#MthA#63&4Yh!`R?k*(?I_n@8!vH%qH&>Oew+{JYu;~fEzX5W+BF@ z7v%|A>Q(eB{5A*7c_c!WX@URq^>I1w0|ElI-lxeoh&lf^ zG%m~Uf^v%ukO$YvoiBFRjWEX z4&XTf=9BVfMi+Ft)?w#&`JWSJckdn>#YUwuPj4dkI3d)vDfe|6C=NCfNzhED5#gi_(9_M|B9Bq1_%oXPVOMKjHV z!P?N-t!hxEWmC({lZ(f9>sugl+{me=$($N+nbVjq^?d#=9(6fiW6i>c6V?l*E8k#> z9?hlG9T7$ziypedn&n9~3z5rg;G! zX=_Rtb0$fvK}miRT{M)E@kln($(k0`!bYSXorW_LFM)~2E}Ta9sPVKO056`t6Vr%`f}YPz!5Q)|PNY6MpsC1ZrG zWY;`jJ#9)Aqgz(jG2Tt0)>`we(b+td%pg-cwnCVTBW5D$_01-YEZ^8tkMIS-MW`_cSE1ccWxkV!QOjQ6ocz~>< zGB16$Ky?(0_S%V?hrd~-G50Ayf4wPjr0m_yWt}#edr)g?38QhxpljL3!A`%y?eQz_ zuK}gZo7dWolk`*jsXe8WjbYCMOnTVm-#T5!xh-%%IQDhV3U#JZ-HNcj!obKyG_h1-Tqihq?W0_n7M+Cz!vOV=~B_Xd!ByDZ+`eo)GV}n zhiwE6_I}sILH7eaCr4V#u7oUM6-)HeXf|9|tpOQynqF%%U?=xo54rE=ZQt^@j#_c4 zy$asH?~2X18el_y(MYq6>Oi_hJ-N(`rgRkIa!Gi}hM2sN&I3OwxYLuP#hgsScC0n% z`6hzAG(}s*-QMHBw+;RY?`+X_jaSI=|U-u3uqFL$emYaAofa`>6@ix}^3*v$cAL9dW9J6=Y4j1 z&J~GnWW=q#^SRP$1Ai+DSz0>lO2>|gbBq3gN6`ns3=(a)6F!?0m3v3> z6;WGp$YR37f-sgbe1d>n+P1aOZQblD%hp-h4*;-nJ?h2?u9S zL>MDBp`9U{Z!lh8z`U@03`TZG+b@xG--NotCh@Vo)+9_n!E&R^C6zIUi0~4crmXQJ zReE7)d@8_dUpTHwkNfs*A&nG9GPkI-O46OxR-;Avuz7qMYx91l12PPI*IA4IQiKhJ zS<5t?WYKBogbbU73C}Xi&HTGbau6A#Xc%Yq6AS9aDm{i;O|&_^XGTF$H?oC|gLT!p zNV0JRISXgJi3vd5^T$0~07a4d>b;_4b6m`@Eq;o%)p7Irk!YpG9sft*;HY6z#VHbEFy@{)38-uW?MUecK&?hwg1;@8PKa6l zbat8<(AhNL5CcW?stgL#@6q&mzhbddkY1;?VUBPu-Z!X9slFBV)GP1F@qnV$&QFY< z9VGR(Oguwor8$?6cpRoEm0lL4k$b1-$32#-o+J}9dmfF=Iw1R4j5Iw+7dTC}5xar3 z#X$5;%uv|B4p#9<&u&gp7mI180GHGhR+Y42gvvjGX)(cCZTWW8S`bjU*SF0O^o5KV zf0!QxRi`nId=dPsZ@O83$1}Lf<4#StX>vv(2BCa!a(_Ji$2t=#c2${tB;aJ&ce z(9E4ltz`|Xm2*##YpZF7fv_)_tx6*0ZY5dyhmR>GUO1qG&MNrELn@ifb8E4tl0U95 zdftf&O4`4H>_fkWrc*4+q}tEEfu^f|OHuu-y;a8qG$FuSm$xo$t+3N{dsDYQLJS$R z?=8GBMNI$Li~C%13E(i-5>ws=l&y5@mJTR|62z#24INdS7d^TkmI+96)Ot>I2d3Yln`iB2@GCv zu>2)j0<^2t)iX4-|69D|_sIYL{{6SZHjMuq1{=rk5Dn0hkCB-HI1KhbeCgQP{}HqS zT1YuM{XIAW_}5tQe}4=B_CGAXSO|e}l3zA}tn5G^PGF!GI6XkCJm6^l!@BH`z>S0b zznKk|e_hT0FC$?B03%kvt@?gBkg*Ulu>cL!{`7?Va}@tN8!UgFjsGg_0st`o_RMqu zTEgjB!MLWMXf0ds)giatDIGNNf4Gna5qZBH>agnU%get+O6d#=@bdY_%smE|ulv{< z#YPo3s(&K46_eggVehI|EAh~720_4p0K;|oFU!8;ea?R9U{Rn@c`&C~`?@F5Yr?&aET z@-G7v_fHWSOYis<7VPey*ljUjg2peoLQ)?y>CYCG-y(%o;t7V&(1*A#S2T_lAC?bC zs|FnsVvTsB>h?IZ5Dtq@_}$7+PFl4fhm?2Ky_2tpgC-%$NZQ}D9@B;`F2560X{?*# zTsHsU7HceND?B-nOC}IqR6#siwm3#Lf6_{H`y9XQK4`t0tJ%8R^7FMo`HHPNTP)w| z;riQj+5;83;p`e+$YP#VNy;>o2#%iv8qE39of^AZMeA6RMm_D;S8t`xzA!Ue-Hx&< zjp8u%^J^^)i!=Y?BB{pf0@nDYubqOc$R!RC<}_+G_);U3NeV1ErEaLfx0$zHF+^toS9Ro zz5m38>dvF?<^4(4g5<-={HRqYwmx#b0lV%A4B5dplrvLftq{!T&l5VjMJcScwYf%& zg8dG|qKNNc1uoh^_VlezCSbmiKLnZ~GDK>BbBBOCPKpG;fe_x`b-`hLmDvnFhUngT zP_PRZ4_Ae}EWb9@6_iFq4BXpjJsl>gR!Cpnz!e6mLnL$rEceia$tn!XF2c;| zmRGC!$gNj;k$fo7;sy?6NRVfm`Sl|mlZ1^_VMEux^L9}SPX-`2NvuTu^sJ?!KnKSs z4+UqGpa~i6$w^2H`SYb;k%aZ;A*jBS;JEo78W>r{yE)4eu!;mRe^qz8F6vzTJ+pkC z5h9D~)T0tSjh`i-JHL@@5DgiP5hG8DdR+F1jzMx&Njs#pS~Xvj&%WKt$1U4dK|pB zRC4j)0ILa49gY(PoydLh$+^UvMdC6kEArT!h<%D?6`)4Bw?DNoeCQ#*ytR{^6`ALi zkC_d6+*hYhYx3;l*>7Sf28|3~wWJON*iqkCy0-68;l_$Br!7CI?cdzL_6_fIG?6>p zGTedVL4742-s2AZ?rzF~nO#vp{hU_k<~=?=!C4lQ5p-M-UY2a*yksJUqu!1(h_+bb zqkd|3J!(VY9rtBA{f3dr1(^~0!=^e_bze>5mzf`EQzLy8AYaC6!hEF|de`mn_v45J zb~82IkL%PX4ofs^P#RJ3GD0q5lTDEAn#<~ZEp|yklYGYTiBO{yceVA5k8ne>x5IxX zHqv%LJPV@b!b6jVSSLp;mlXK4wzpC`Phdhh8KmuY8drUu0c2VPV5(AD)}x4n67Kn&B^h{*S3 zphmCAEk*%0g3@DOk^FUgTA&rijb%c>EEdb4f4I#B6pic}mW`%aQVI60zc6AIx-c5@ z%Y7szd0PW82^HZHGDA-(Fzp_EBvOk1&dFp#EJ+LuOO(ImG=s_y*3 zfvP{94&7p%#tgivG}NdAxv-HpCSxjrsAU>}h>}9)3yX)f{**F)q=XW^EV&GD#~Cdr z5S+rB=ro^BMb2(tInEiDdt@D-7ZsTVXR&8=fC){6x-e(F zBd_ib8C}#ndKsbkBI60NkRB|cyr+j0?}pjqj0rvws(^G9vE^@=aGSzuhbq+Sr7XUk z!xGsicLWkyGpUXpCqoNx{Q5{)2q&V%YD#X$Rd6+1<)_?|Apy>iiYID0hM;LGI1lrIO1i-fPE|4kFB@drN67+H9IooEaaWKFW6jP&qAQ1(DTwobF)Hm7Qa6x zwIt&W z{&No7qdB2F)b1)xr=($D0v)r>XmH@LU~^5tAe_ac@yfL|Z(!k;3mAPfji!ja$;=}e zY92STR?3nu?2@TC~0Ag56+I zYZ(VD67pE^&2fb}d$YkaDioEm)`$5-2Jd7K+rWK=Tv4I6h-rX}zNy!(jmV)(d++m#4&A0Iaw zJ}Hw><-v}&8lQGw(JCur>2K`y=6!1xR^g7jaV0F3EqBImAi2S3Icn&Ml|>L?l*@D9 z*H%?s@%7;HLW+vOIYYY%!*9#boF5;Is!ADNq$-eA_0>~ZYZIEh)zUW$o-0*7|3p$_ zU*qht^Weg~@nbujzJq(blg@Ff-Go@LZeV!sJ)UkjN9^X*(lvWuDSd6_N0K0>p(a|W znjWK;*)oW{g7R|s-5=J z-mQa^9G-(mKnZm;N3vsM4~%R$i5^!qA&-v;M6yfjGUu!<&(G$TD-4gZMvpU<$($K4 zw0C7ajq%a*$yFR#?cXe{&&`#`!oJmL?uz+g-4H{7xTnccQ}M*G?DcU!(K~maat8}pPGXocB`Z0tA2DIs1B5gy z83%{WQZ3JcSdIp@z5K&@!y1EYyRIt+sY)_&tI|;9lz| z*k&qOL?u<7j3?7z?4(8VOu|>MPF!z1?Nw#(X;M4oBvV51|QgDj{Xc zZSicb-64Q6a){c^t2nZU+DM?j$WxZ=mHQq8n``ex+KQmd#ughT`SD)|Zrb~pR9)%>95jrZV@r0$oAmpZlfAmvM847XLX&ZB2Q z7nxME*@)E{Rx2a)Jk7~L4mX}c>ijhbS)U7mfk8gDYQhjiXeq=I{7E5rR$c7FKxDgN z4ZBsW{ar+MN`Qsv(HYL<&JW{#Q zI(>dvy!evai-8%oGo3JD%U7T$X3^Sj;nzO&#DtB2IO-?2?2$(lo~C!BU4 zd>e8bh8&@f=%5EV$?pdV4S1Xw@IKMN`w#%{vtX;k-?qtZFq#)-#cmV56y%`TV#8i| z!yx9c1qExy?x4+vr-#+_`Nu{NGJ1(7x{eNR1Ww7SnH@uvN{xrRh(V4* zTv&2FBf2Fq8lP@|NKs4FkI&EdlASvjiGG*c)Zp9wsxaiy6(1al(JG*dU1=qHhmSBr zF%M6?+oECtfBAc_qth=wBPP*1KF^2}-+(v$V6HCkkuDS`45n}V#|P<50|Di=el-T~ zsQk~DxKaWX8g`eweSV`gTRUD6Sf!#)3R7X>=_=_h(Xn$v+M|O{m=fK^SHS;{*jz4o zMRNey>_V-8o;0E<%S!y>{hlc?<@U!(c8x{kMq!dcvLP-kSk_o6fX9yC6}bf61QZ1(?{>Nvo9hBXS2(+Uelnl~j$}>Y!{i5;y2U*c60Jez2+TZ}E6iIb)ps1}9 z0aFY?6roC36sYh6@mM#^5@heWfl3GMrq+9;BZ9vC0L zm%Jc`OibGT8>tiUuZjErt5PSu7z^QVUGi7%?Y|X0fhyde;A_!;vbKSp|E6vJR^Nb{ zCg4x3HsDXJHsDXq6YwWi8}O&*3HVd<{H>J%uVeWwnF8zI66fDE(BD$lf1!c?zSaM$ z`1nuZj|nJx0+XYGuy028KQgv~!XE=rf&3)~{zHJYcCymdcXKrQPa5R^K;AgxUxva4 z%wPXQ`C|vZ`mI4Sv9tb*`e$!uXrv32BLA+*{*^}le=80Db1cljkE{I0SpK1hGXBWw{$UZt82Vy+$7 z+68CDW3)+1u@t4oSJ`!M)?BX-<_7Ia2X%+$wDkl&ZVz|ihychd8SBJeJjeG| z@5JkM-(D~0`Bq*2=?btoh#d1JhK# z;Pj|@7OeTWFK#$LN3UmPX~ql7)CHgpd-S$b%Tm^<_?T5LcV=`>ih!S4O|f@e=*b+c z_9s{H^?dbT?$5Ga8nrw{uRG8l1lUXeyuC|0?|afZ)?bU_(7>W|O0qVLDhG52+}wk$B&1uUoH=$l_VD)QVnp zO@7NcvK8eWft}2{`>>7oJT~BBVkrG{_tA6JGf;3$g6j6>VFXSjYkhnD)OPB5m0-a@ z6oCs~{_rFj1NX_f@AX=B?2uFUD(K9fgk5lY?1G@aF?(F1iWizf+ zKQ}fe;|SnPtDl&zrS=w|FgOat%f`i{XxoEh%Mu1531qZXj|`-i7Uw$$*nw&9v&e|h zB^`W(ij#D=LVU|El7ro|{hEH?HO8u;p^(<6L{NRq#4ze@C4bs|BrR>&FSOa?QZcZB zv@=@jj!ldf>a1okB-c_Ry!a`QY>U}~Z6!fDJm`&vmrVpS3aED*dH3wJo@3TcZ zFI}4*g+(?;J)XZ{2172TAR+cM+Tk}?gmU);GrE3+%MHy--9!61i>FZDZJhLae~H-g zu$mol3q-O#pt#NZdz~X>qz`|m(%PAx;oPSh=9*l$0Z&D!)bZW3VV-o|BFA}zLNxneV1UyrIJ%GYC<(pz1tW7Ly zxzFBGG*ZLX)8wtAE$flIwtoACrC8Xf-Nq92D0?ChbW^eh?^ldg37A_a^r4Y^dec+Dd-gbl$Ly2VryEQw&}JzKWMxvC?})#^-M;h zLU+ARsPjqB(n)fac{r5(>@;Jgd1iTFl0bN#6}s5u>^iCF$YMtSJ#oQz3hDWqfW@XZ z(Nc7zJs?ZmOE{(c2wJ8#WGJ&TqIxHhM~_VO(;{jK^;1yfP@8Bu#>jA4Li%cDT0Hzf z$utLxO79q1rF$}M5?bFhP1%>sJ%d^vW&rh2q1069(Kip3xmy;E!7mKj%c#Z{PuS&# z{3#_T&{efO+1UkOYw%Ad5>xFcq8UjnJOo|Bgf<(z?vTA+Ljyx$=npYV+tl68X^E&<2^a1@`PV!%SbL}+2;<3olwStK2%d0-$Lwk z35aPLZkON(_Hr5_2i|woSkm(XcV#(fm2vO&f>bu7nTn7`HX-yLZT%}zb>5d^Ar-KI zc10NTf186t!jYX#>$D5KfKeO$97!TLY7XJBMeI5b@Hc~tMd-w}X1EIbP@U6hyD&0i zq3=sQxdC50z_Nfx8>jMpAP~VB(3p^e$PUH1iC$94Qa|CAxtBEMJ-MP-l$yMvsBssk zDao^)G-XWFm>;F7xyn*8L5AO%%Yk^qf+QElNS4WMaL7G6N9-nu;Bel9XS|(W1vfJI z&4W0D9j=KFEq}r{vmhakHhiis+f@pd-kvPA`r?K z|C|KpP=z7WF)E`d65=vBabf+ehLFWZVdT}%R7RLGJ5s#437aA2c&t}fX^OUZS(?FG z1}&`!Kb^JuF!F?&ybcR&iiODA;BQQpN8c=Bbz{&|>pv`4%h71z&l6{S{r|XotGGC} zw0#@v5ZocSySqcs;L^A|!6kT*5ZqlF3GVI?+=IJoaQEO4zD{P|clO>h@0`q>{J(>u zs;ipnTD5*_J*%#|?`L(t*w2t@q1YEoT-tpK#~xf3&X(Xp-j(!lVw^H+_X@)vToNvn zxcrJah5!(`s{VhoVNW{yg#YTAt7*@a$XG#VK@@+mBvPzx=O{MJtH7XMH;% z=9z~fMf^WFh@V<>`=S`K&Kj&ck0))p4vJqCCS^y&`0Q$FTMQ7MZ*|Jq_zZH(7T~(r zUc2|Lv1nCu52zl86xh188rsL)rr-!8u>(BC`f8z(l*f@d$_St)>E`iE@_eC>fDk{S zYD^81H4>YewRR|o9k4R2txDe#B4`FO80^z|BulGX3NSWWx!P^2*(w_3VI+&(78Na` z!9C!93o3q3fNyT)D&AJHh@a%7BzxUpZeJ7!iC19i8?+&AI=QB#R)@hQaA-EU#ypzi z&1oRPPb>wKIxpIp+WcDAzVyZnITlV|<7B0i?5m&8kYlsW?!MY=l)+F(c=y1o)clsb zgzq&unBsM>Cs^`XxJC$cNwj}JOCzbEP;idWL?9*RiH1;Nbw|9KP?D!Z!p{?BWs)}2 zH&+&DF}fIgWtzfT*w0qP>}!UnLo+;RiJsIl?Hr*7ip3?CbIZeM6uB+QOZ072rvz}w zNkbyl)}iZ81!E({gBP|NB)B>$QmU0*lrFa>V^`xI7ao`Xb3l4!&;1IaUfUA&# zf#aA~*2H5=icWeUhF}Md6j_132Nfx~$qDG@jMw+|5?l*k8}^~bq$lAC;VreZF-YX; zoqw8GQu4{tJHzBz1|s`1l#`SoGvO707xOVOe5;VaDrtsEYh&DG4~l3z_kl`Cj}H;W z7ZiB1-wztFhp#?>0{6~Xhzpauo-#nC~cyp#MFN} zjO}BHyu4vE`miBKHG&hSm$qPK9Wf=bkKL@{-ABbpTnl%^c=9fAXm(dRI}Yh4L22;S z$h#m8v9BizdZ*6n%Rn<%OFNCP?f2l3Sy zj{=A819`O_4vPlsTnQ4bjs)Ynk$t1-!9$0eJ?0s<8Jt&m$Gq(0uD55TC@F3?TLvvS zZJ)J@mk8;-XUa-P~wTH?4|5^D(b9f9zXNy2?`NH(jT^I0Zv{zJ7Um$ z9j_nJphT$#9$chEBjjREj$)8%*+d#D#kk~#VeXGz27+X+S(oQY@y#XtR@O}9L@5T2 zU8J5Q1Xr7wYUK}(gHH4peQh$+!2f6hX|tX_t{<#RWrTlWV-UP8Y3}(5UhDoE^U|Vi z-}rnHm>D<`6!0jD1%FL^rWJXSB_D0O7JT*+q7*yOyd?5X>_Je;y8<|TBDH9)8(CR$ z&}fQe=PUHj*fZqQ)|+H@ibS^Q4XB}p`oY`%Sc6!jpZguagCf~jl1l&QanG#SQU2I( z{qLb`UlT&H&iT?|iw$mk#g2E3_F#Ll{~+9XlWm_!Eg^2CHWF#NgxpBd zWdx2Pmx3iCZXc%-m-4eRA>7|~Qz(^2@rt;;hZ?1UqsXPWG9|}<2ZQ@&)=@zh=0rE= zwLMD&n;g{?rOvD)U$*x9(c@Ms%%+bO7f8|UbB1nF>;sBnN@2ADexPC%RQ_U>utpbn z;{pYd<2(fsRb_axARuaOVO{{945-_t77(efs{d;`({sj^P%gz4E2mT*MV*e2D{RR&I z4qW{=#C!iBG;EyU90$J@Yixg)((#b6{URj42-2Ux)dw>NGiOU@OZ&g1J@^gh{)?c7 zi|c<$+W+D!ZqC1uG_dgO7rruea{e=|`D5OI{~TYjvHwna@Qdnkg8|y#P#Rd{_!p{Y z=I(4@Y5M02`6JW&cS<^TUUtsEV54Qb?S3@xd5sY#i0NZbZd90%Z9QRXv>22s6Ie*D zx9Kmiz}fj`hafy@?AFh1Np8C_-lY|MWqdXswG}g;nE0RW&B+aFxpi3cw}(*-h<;uf zepx2?=|r08YQi1e*g|+3HMu*?{NjH1NX+!okG-6+?7eXN(6IDr%b$LsBFc#AZm)9P zU@6$Z$LH?G)9wDg17)GL*FALYeVRi+CQ*aCtD`R%C2cLNE=08~Gpb~d6PiG)th ziSKZHyn-@?8_#z6@0PndG6w`-RXjdaugRX3&XYgot<7VA{}i6gqeh>sJzrVvJwDgl zZa?GQ*=;|!uP=X#yCOV-^JaA5w>GF;ob&lXIdAeEwvcRj^T}GLPU7GQlMDamGSl;= z;JR{dS7P1lTF^%M#H53eUGt}nlM(bqqk zXyct_9*R%FU>T({io=cZJ%`14#TPr?%~`g)Yp$=ob|OHpq3V)PZwhJKtuxc4bB6V3 z$=%dEhGCbFy#}hbzQMHkRlBnoTJ9SQET$EA)S{`OSLTxqAvVFE4^k1mOC;_z{G$wAZA;T8mqG=I!+aWQOFS}ViPCB6{p&7 zcG#PXe|T#B77xe7io<6K$|AiyaLSi}D*N*?<2zil6cA8kJ=~$ntop2o1k-(`NB}@A z!lnp0!bguwNjXa6D=i7R@2d>qLis@wa%2;}C=zly1>ToVrOU|ah2#ymkP+ZQN~UZn zG2>(8wDV9Yw7D|IKDadkBK?fmu$iZu7^-T<)E-<%?*s}HY!qqov0vJ^GWF%i_v1(# zILxA0L3vZtv&72LS~MyWp?D;*$GoU`1<9s@lb1>rDT3%&`8Z#UoVbp8VbyeVB;hIb zC^Uo&tm7&;(Wb_$xh!qhgf-KCSn9p#r9BPRNpCVU&r>lr?Jn0zPxW|O#n&y*Tg2Br zw=Gd{4z*avpU>3WPf|%gKGsR|oeM5e5S~k{TtL~z{kU(xT##>@l2~R}M~Pl)r*M*h zX(giy!j1x=yQ6SE6c4$JeQ)IoXi;2mEh*PmQ!<#`Tso{sQKX$A%VmjqN(4=Id><4g ztGAl*{IurW)_hrSyP|W?%F$7L*EC*kYC7@e`U_`n>ZQB8(p4M`s#+WgRXuVqFd~QQ zf_EqthSb`lEd*2{jT+fvrUqv`!CxwaI;{qmlaE!;E`R;?ebwD(4T@`YY2WuwakTND zr4$4U#Xp?!y2RzjOT;<*r26MQ_gLi-k?v9^_O66DR2fyDQ8P<<-IS1s$k7pmbahLJ zY_jjh-FItzH{6gco9#-bp+gtf!|(~YCU8Cr{PLwj3N-;M^jp`5mrnXPS4%aDTHa!* zIi8W8hX4@uO(=Wj7g^J_)yOWtEd0p8VGd>lhDz0_Y9n?bMOpOBt8W8^)+AJ!LToah zj}4UINy31r7<90r+B>iLk7qM*^GT>^0j%X2WOTDCy?GzQKn0lM`4h_3q|Okz@Y*TK zq15AcA;a;I(heiVu_URoBpZ_0vQSQ`fiUMB#2eVg7NYPb@4CDC``RnhwX^bbuzU07 zK7;1?x{0vrNvMhetcru9zg`vPAGl8cF>?TUITAuTN; ziYHO65VEoxux0$gH2T#U3n7>ro65ZQ=I-t)=xZN!T&bfC;a zV@RqqNas70%oY-w%=X$6D54RQ=hwLRQzS;FO!ad zNr$rXb<$hBJ^Ijj_`K3!H!P{G$XixsG%4vvPZ(g?OR@5r0f_|R0VC9b)u+O@GOyGv z7Z^V$Al_No@u10<&d&1?lP9bSJsqG6RUR3=lk?H{gqV5cR~s!II!@VsYMA(xiu4Ej=b1*ts9V+`a2&jlJkR3UYMO6rjg$@(RNd??;g+>|W}q|lF+ zIOyId$(GSpcDZL3_cCfHl_T|v0(U1JZ&2V7N-9VOTjs-}C3@Ty@^GwfItXMs>BRoG zTPlD%&QuHy43WM^Wo0BbFSPdRHI0l0C83}tataxf;lGnI+j>1@BhaG1xdodM*(gho zpE)Yc)!uJphi%3sR5;qoMHCV|jmd!M9Hdy9qt;q!+i#KxF6jc0Z0K^ z;o#I-*t*R_#LJu}Kho7VwGv;Vx;OBShX#ic>2d1(&P>1|tH1)V-oLL)3G0%F&-y!1 z!e{xZpW9~UVRa%~0F)%?L*%tB6>$$Ux7eEHo^*sZGGQN5+fkL#btq}Y2#>2@ERRUpK7a$A8Ab@n(A?^Nr@`qz-ruIEYu8u%|?fdhXY6uex&Mk(8bT#&n z0jmPzr#Iq(36fAn7~R%^0q5GRl&$Isvus#s^>TeP%!TTzPamv$J~BcZ2vnNQ?Ia3R z+NmeW!|LAOr7jIEe}hu@QN(G6|7;eg#v(Ud4lGF1OklHRcBieqVYp#5%SR-UOk%?V zr%3NprG?&S!iozEH9^Hv`9?xV7bT)PB13-m;HE-P=fjOvU7gEcY4(t>HC(n^nsfjy zp+7Q$%WA)}Bl5age0QTo;B|FGzi9uyvAM1IBtDnek1~*>g>Q6>{@_~`VmKhV<9>&q zS~?%RK5KTY>anl7lIY%)bzguakTpM6RrMS`Y$r}*rAzue3_dc?C|*N1u9b~R$6(n<&rUqlQ*%jIh*WVc(C9sNNT+myM zQ&s&w%13CfPoPp32MkF6I=LyquK6LwT`G^$vj1)G@EZoy8P82Sy*}{Cs52fp#eSr# zZ7xcmbJK(K4&4ejz^xhkILRCvd>?;-&^!D_`L8(AKkH2X|G|-dYp4Ei6Xz{>( z|A{M=gZ+0N)nC=~4;2>JO!}Al`6m??*B_0k|2fzDm1Xtsb@SUC%K^^c{Ab|#FRa2` z{|ub}qgw$^I19dpU$yeTY>@+OAO4;9^&hqJFW4g2A0=u3g_{9RBn_4>{-sWS<(d9d zoB5}f%k|G4=YMiPz)7(Gr%wJ?w#fd=O8zGh{deyBSJ@)hA93q{eoNSYdCC7Gp=AG? zpZpIk=Ko;OVDtB1UrhW*_k{~AT>M=<{{ZytV2S6SYv-4;^#20%Tz~9h{~e3wVBz{J zi(ZUc1+(bP%J08e^ywkeYbcBUxXk$11F$^Rfp6JR_g+4$UTf>gugQ)@V8b>zmwTct z>M#b+_K|7W8b8=Co{ziHKjOYESMGb0lqn?mv?qdJi}zq}w9b{Uku^OU^qzn3_;R^} z=;uY@j)qmW9ckt}?^}bmXE#)m=LwD=?fvm}AKlC3bsvwrpYLj)F4tkLh`#6$yq(C9 zyt_AYk^LFI*LYSOnom`lZ?qEhBAJevr~YZYO2ZuX6$JfvMtK6*0fUDCqIF@f7ljmw zgPrGbo-+#mbSG_{^WjHDluv71kFGs08wO8rJIB+Wbe?@*@SYx%zT}?s=kyR=m5ozq_f(MBpOMy(+_h1m5WkUS+2rUFq%+9O0EQ?b(|=eqKzCy7Ze*DB_+MsAQxZ&Dpq;qYa00LF(@g5j_YQf3xS@3ZP;J1a25WTRm(IBWS zqr%-$;S9+(08y^(n3)_1cp#gO(mS<4x0DwglwHR>Z@Uh^>8FZrRAiny+9RIo{o+$Y zp(8B$L#&`8vnHT4oWl*#OgHX<+(~|#How_+N{(S~frFX=uM&|T<-Ej0-P)%8~kJ@k)TO=u>@Kw-~z~O4ui^)nL<^*Z7ltLLnwl+2x zt{KURlne4iuER-)Efah>;MyU@l(QClL*x8WjYTQHes0V|MG1eJCv8ct?ES~ic4*}H zNTUo!kiOdF^<*M=8WSN#0I(^s+@`PSn*f@u{L>-QUDlmZhu^m%)BS#vte~SX+qdt^ zSMkJp>o1DG&U%`tZp%9K-V1>otC4x>Evj@G>}KcgxD?PcbrSphMJMbehHea-WR9Z_ zbtf6PaFMNbJyMyDUYW?AE&H|`E+s%N&aeQHEUj$dtVSajwXuHsu7IQ^j7n!f(uziB z+5=h}0yS|UQA`C*#@tQS+2SGdPF02A8ZDT$);BTu{kRO}au!tsY!_Xw%jmH5<27&6 zvqNkg(x_Ity29`_%PMvYg$2DjK~EtTQ_>as+UVh?W8E3$K>fZkZO82`g7>STr7^yt zpV(s?KJQ`?#DCMsQVAPWj~Eh+~)LUt@e zMv7K9T`iAp*8sx_3;XsQQms1|$yFpD`!4wTd}MI}n4-az&2nbjZPMG_JMt!*w)d1~ z44jCycQfHjNFYnreiRyl5ndrXdbr9!BV>{z+(4NE6Lt!xMHl$l+9Fx`<3Jg3#J9zd z1Qa+CIpUy1p!&tnFv+WkUDkRG6o|y3shu%t7-P2Sf6zdQEU6#B$|Huh^qot-)!!dW zqF2jkRPhWLZk;{ddP~zKvxt+Il`mdK>&q|8GN4>~;rga*G90(KPh6U@=_R!YP#vm` zx}1%@U~VO11Lk_JMSw~0o_J*hBmNb?q6lsDxh6oucG5>s+J}=Md~ZA@Nk&_%mGDFK zrjF~r594LV8$`N&-v;v$Qfo!kLRXc)(5GT;8+Xewg$x!2ve;5Iz7Ym6283n>X7O5( zs=i_j7|aT+qO~AZdc_z;g*SvF!gzq1o3xa!B8wl4ul)s;dw|c;uGu?uWgwiPiCHxk zNngc`zexjRoK#Y_n|~V$V7%a}&Z7WeKAl*yiNvdNy@!2xlcmby~O4^3?>dP|<}v(B_fH(Ce4xt}u4GcC$Am6=RP zG9AAT@qA%2lUK->eY_{H$-X>|QgLh1qP9Qmn`4S=wF@bvemB}D#?T=0=sBDFGX`z-C1twP!TsE=Y`!fr-_ zIV?l!gdM_YK5NK$v;S;0bnqn)fe8pp*g=4vDRzG=^dLipyRj}8FvkzDnpNKTpk=U8 zRLKqNUF`1s-GVfD8hBIGw^Q*-cKZWya>W>^$KvG4R~Ts5v^2}Ee)rK_Z^8bZrvG5q zwu+nmfT1Ze6T3MFqfyFU_VuB|yKk0esLOCUEhE0)f(%Xt31M050wf}Ej)Bups}4e&Hxf3JA#-kI9 zVioI-%a@+-OJz*GIVsmv-f588drO8Md!2fZF4NVAuw3_r*{Ts{8dQJk6P|}(Niry$ zc68#-BwAX;JI3oD6Fxz{kIk0!Y=(_D;Ax-}r2`q6!g?y$_*I?DB&rYkh)1 z@B?44aFm0bjxGtv?E}QEf{;MtX(i^Yi-rjMwQZyB(@}GjK1WK+>BL@p9^-uBF#S zWwracz_j^_Ey$G-a<0%2RbY870+G zDN9#|oC>MTg0g_$W z+P$>M51o8MNVWn21&x}8zFeO1*y27(q(;p*AU;3UT0&mdxk`LGJ&d*+$RhMbs6(}V zL_XgCd3NF5ol6yb3yMCKCSF+)YCRC7be71*wXtS`hg=Qk(@$V1gyLoy9MyWpC#^x` zG|B-lD!6nx3Q5^ia!1*6JVsfD3}W&{TM|WZ7c7`f)MYaPH)JybVPrEAiDarz8{f!g ze420sZ|pw0P!LzmE8i4fe;jW1)lVM8Swi4xk@}eZ9!>8%Ws$@HOH!7r%K~Bj*PPjG z7%a3H$|5)n@Dfj1^cqjgFSV)~hEqfZ&Pr4Q&Z=7+yqLmSK}o>T8L4HPGl(z-Yr|RD zugNMc^7yCVYWXcu3xUd0WR=nwUJ0|*z$6a3IxvFID6cgtc9xj6DSh45I{vtTh;PwR zL5L_LjtU=;qJ*0E8qiIY{dPpZYX`}Z3Nyqrzz_VoGK4+*ZF=bv23-bdP?H?9MOw5t z_$%DJT~qlji*GtYf5V*J^6eIKgCoGNgvkj|F?X1;vJrNTkSDFHT zR}=!MHonpY>5upNEr>IO$fJxz#^tjX0jNASEF=&=Tc#z9)oa7O8p_*JD&ol`I(;h3a~Xn zBKl?#z#6@U81CZ8tS{mmrh%HaiPgL74(OuQcdVwFm5^pSKqXIJN{^Stdnfy$n0=E= z>-|`HV`c2JN8+p7V7mG)r-pm!^@>m)>$0zh-mVwtUo%sUOwv8AcGtjj^x6rjL1!I( z?+7ong7Bh`{xph%zRDoca+e@KxGZ=?o5uY~!0f6f8U4UE-)(=POLa`x3|eZ5*>fo9 z`aD%}@!T%+Dgnv<(++JKO~9o#WvQJ0#6EKpJ~wqnO}3ucq^5PI;J#~%?@3N9bY>Y5 zW85)xdzN3lRKxW(9cMl_dURjJiaM--+$A9ug-74>x$oe-0zc3T&B=K7v&Sysm-w$z zdu<`-Xene~-KGJG3j`bd#09T2SuUi!x_4h^PO!SX4Ur>6<@$EZgoPUcZfjOvXI_{W z-uxpugL6m-{9x0}TU!;A&o){R2=0rbS{5tf-J<(ceAuh(q_tJ8#XYA*qgdrplWkXa zVW)8MlY&N0&e0pw2@w=>6y$KJ{+^;{4vHYeQ@AugPblzam+oW{R+qQXjQ`_YI^fnj zy=&|kbGb1T#nsx)_>nHW3+*@|!nB((eONx*TTSC?vL(9>VL5qF^5*j{)GdeJv8ob0 z8Ad*8(#~qH*u)5pj|xUEDwWf#fYCuI(RY%h;%x9nq}1_ma#87UDUA}9p9%oEbv+{i zI@}|3SH5w|OEaL`1ON*&*Z_38Al|(KPT|iAkHMDfSAx`%%c0>+_nJ~t`$mc;WTWPt zs0d;*BOE3ARg{-s%&j>^g4AR|e1PA+I8BIrfZu`~&1;2#DJC>lDN*U*H`z10=}JpH z=}LzIJlQj$PNE00+X2A9F5Ey!3ci zET@ngnM&>zUBKuqPiw{+4~PY~2$c(#E?`KN!iWt^dciB%e@q3oKgFt_8@YwdW)uC$8 z_&gB&QLe$?)AAlzRq%TRDA6*W5qNCk708fxdzv;Z3XGk5fp`tu!}YId_&>vo|A%S# zZ|>qmqQeSK3J6Y;2!@Wo81Jw3-;Kk+@#e43zvnyq1ttG}{O?BO-;C?m@!v2Vy#952 z{+w*_H(mKRdQI*>!rXsPU%0vcssxN8_=e=YUJ2TRuyb22^(FCjW4z}L_4V>4;D7xc z!tp2Z>%r#gfztymOUkz*6p^mG&Kg+Z$C@N9Tm)Txo{(pCIGT;^DIbJBxj+1DbL2L$C-(V#62oUik8JjNlGw-dVXHmZjsFSu z<@*kMt4~qpX!QAXSBKj%0rWS)wtT01kGnPMJG2dea9jBvnWTHs-tpPu{oTjny)7Q0 zOxkmqO|SJavnxm5M$!J}P?} zo>#`FYmzO~mrf_t^RLM%qkf zjI6rXf9J=j!~LEQL;BQ!CBV&t9`|Rk^^_f3cxa4{oU?6^WK;t>Vf#0e4Kws}-O&>s zBZtQI44cLM?o9fc#eMsbd#GkRP2YS-=qMRd4u&odVn^r8NlDqF^_wqa5e~{1UyZN@ ziJgr}!sL3sixJw|MhtRtoMMl!jGoE}V-$3J9t0vHQ<5`4-=HDEwYV^G)n&CBuDmHL z26n%EZTmbuosA~ni=n%jya9(!x}b=QU`7BJGzPfol?c<38B6Jwh?dHrZE=Zr zbfVNDZsOZC_m?#xOy{$s(mX2gF(E`WS6FkD4S){sGgo?3L(ouV85bcBU92Nx(gn7Y z>`nT~u}Q%=wU_g=R5_C0SbZ16NVe?zUbS2z2tDnY{T|v+6`IxmP0YfIdTxrHqRQyF zTx4(wzo}3wuL8l*!lCO(U#fUGJ=Y*kA)%-4N{giloPR+*rJ+*C=#G{}Hsz2lQkPXV zS~hX!Pso%rIKi2C<2^vw^AHD%6U*BVW*?L`G&VA7bn|Fvdjzg?#<1~{NyeGQ)V47x zi}Q-40ab)2qE3xe~8xO(6} zNQ=ZH7>4OW@RKBObAE*=7ywkov{B%^)q|t|3SsU)Q7il%8v?75V%_$TvT=g6pV6CV zFR6NL(^4&?k2Gx|9PIUEQaI(Tbxve7Vozx4)nFH!+{H8cILbgiJEi3{%%W{BlAl_s z1(#%oa)qEYBMHZ(BS+n&whg4HO~^?BunaOlSemnfRN&1;3IN(cz+B|=>cc@}*P z7HESEs~@Uy)mdZ*Q?(#eM!+)4T1=7^0u6J>GUSY2s0qkwh>{Qhi!}ImjUkoLWThiD zzekc_^Yw=0qwMvv&298fZG)G--Cj2CfzW(QzbhGy1$2%gZE5<|R}#xsz5A5qZ=@2> zrs1);+BeRK3eeA`Fp9>^t)00@!ydMiX{H$xigU#KB5EmRKxPemU(HOEh}~=7&8c0~ z2O*|Gm+ug$7KfAri)zXFFMrxd@!^vl4sUT$CPf%z$>X{wT1A&kzBJNxWUEs;fOR@v zEN&jHYPg+d!j)=+=I+Dll$kdw+KFCI^xBDu*(ty^@IjlJ%;^%-Era=zZG?^jwLzTL zyr{=3&XcHnp$;S04nbVkLm0ATQM}2=@{2NA_bEGpqxU7H(IN7|fd&<8$5ZD;7$4zn z&)%0W5dqwp2*c%w<=^{fEWQ7sZ%Sly6{oOx?PZDbl9d|cgF;pcD{gijGDt;X%(!g& zHDcXlR90)qA0&5#Hf<@G!&d%IuHZW4ppHm+k%gqJ@Y+X_teiMl3y-(J=-ymUi3>3Z z?C2!aF)U_UW*80)*48`~nE5vKvA`lJ8YMmedb-bik+b}^MZ;3i*qt6!cpWmk;uJel zTt>tiJ4>Ed`%zpkv{B6i*}PG7RH5+t^-vvAl^u|J>fxhB!L>|h%| z=87Za%ZG|^O6>HZqe8pnb1O-jB~5Y}=Btk#dzI56=?ILG1AB>@odSNE12TS^6Tmpl z0brQsgerKgYCXGi1S`$JW0Q}Sx>8vuYCIs6NBtR4KGDxt-Wdca|IxD&`N*-dzUL>v z)@&i*clgRZZ#42U=9q3HTef7FzIdX&jUv%5%E7QmL#!1OJA3dR(tbK`p7)91hW1{$RtCrGV%gon--N~_6f6@C zyrEx?nMJnl$Xd3BIpC~}NI0agBi%Emwv{quAEb9jkiLXpV~T6_;|}Mjgemm^*y9Wa z0PL|30su;hRo@vYL>M3lx9NR{xG0SLH4l*_PP3m`ZnuSy+`zpCN)#1tbap!=k*!my z08$^9T}V+RS!`6R=W}eU|9?lmt#l31cqrr#2>)Fg*|}Js(}jy zS%{LEdL{MxQR=oO3yw-Q_Ald$FkDyMQ(zM?g#vJZy;CroYYRKOKKyP2g001Vu%hz| z=xmQ74O6yCb>)&F`n59W2CWFZ^KVSahW8)8^j1CEm&Cu3+`B3#cF*JeD4nL0w)ZUX zvcZ&dT<0B$O!maWT)RB?t>fd1QPNo(!;9<9Plr;LsI}+92KYTh`z5*vH#=Q{DLQcb zxK=gMPQ1J+@3weWEP%ap^GFQPtg@f;z>(%8lg{1w5itM zq+j&2X_+y-icFF0_({qcb-%LX#dt6p&+FCk&7mG!!-+tx?vv)I$%yqVf!g3tQ0liP zCv-2VHWMPxXt{OKax-FnZ_V;whlj8|6ScoJJs$uTS9QZk6>Jr7zna6BW-S|L5(eE=yj$?P+lA&E7M5-$|ah!4gGwOjHVX1>Nj|W0#kKbSL*=i+&=T^`n3@ygn^G3tXlSD z1(_cQ=SuuASd|^f@(>in&ALKCG(2d)NCp@)a)c^7Mf$_hj}~)jCOoCw;0BnirDcy? zjZ;_;du=}7iw;nqO;fASStH=0SyCq#U_O$6LSNQ6h#C*<=Ois+!uDB}VhK}BRfdSy z179=_{bO0PW{8%x`Vqu#q$wtZ7+N|M$ikR3p$(kvp~%JU)re`G_+yYm@ zEs!bIRKV-um3vm?mrGx83;evS_KntzE+t-s`yCI9j*U82`eyDfW~Zqe0qbnfkkI#Q z>wL^;Zs^(tD_<1#4`8LA3PgN5RLm|W1XkhQ1QH%aq3WZe!a)yjVT21dGeVe3^FsJM zIMV%GRjuw7QCUQ1z3^3SMhoMb3z@J6e!V&$N^9%~x4`m?bXRFQ%lSMg5E)pNC`E}Y zPv<*0$79^g8C7HxNltaPLtfyy6+)*iVlyFA6Q}-QbUNUTcY5I@LWHNsK_u#pAh57& z?xE>ge|~;)xYf&sHHw>^MnM2#;u?lG4h6Wiqazsp@WxhP@U6FRcbGJu8-zDx(+a(( z(SlS(LokffgqT`&6gP7d_+~c^qO1jXBn;q=BTAy3g$)no6=f$Us&nxeiw;UUHua>rKf*Nh2uPlZ01;@U16bNQ)mLzc7M}J#w$-TLgn6HD| zRrL5Vy|m>ByW~;U^~SYn#kmqU*D7Rp)X^qE#|QTlEw{7#*~q@yb#kS?piQK_?n_-=#j(ueRZ`hSy;Uh^0lp7yhBx8W z-o>d$>FjsqjXIMD8MyOb2QR+B4zkL+jk)IgJ5zu3Le3i&SZHo>veydYm3>))k-n^n z-YY$;To_}$f+x$QEEq2@mOCSC*=*uP!QxRna1F+^9RE)04c&j9LzzmJfgvuA%@|PL zrsk(=k2OK&SsD7l?LZ`uBR zq`A<7oj+3tTK*Kbd1*jICvzWchUgv1NwAx9A-J4r3Ix+ms!q zlO~NcAk_S|Q3d~4i0xP2p{+VwffwZZt-7L~PEP6IcdZB$wdR$_!e-&cpOPWRGN7b0BdR);Ms~}W5 z@OecTUeg+jD4~aQ=BLbrPy?2;r5Q|k$dkSzyK#_bVx}8AjdQ{(!XwL{E3q6(cNJ)N z(f9lsb^Qu->B1YAyYlJ{3y$%e+GmuN?k>zAme@*?yeq8m@(;B&@LYYi+O}ILb^r`K z4TY|Zrftkm4)h?UK3X9bg$v~mVH%BodmJl^mLh$$;KnAXzXHFDzq7HR*4@)!8HE8~ ztceD{B#It(8==&i9I*L?3iFI3+r6-*)K~kyRP8m!x)q6>cj;%Pi}F|96uIu+%%Hb@ zG;6N@+JiJ}6%l?t^QTsN?_4#4--fem-{-$-@9FC*e**T*fV&HYPsK({*%qFWuiL1w zKK;Z;UoYwynsZ+^@H>Bh_h_Iyi@g6YKn(XktI_@+1~LDzxBkW<{|=Y@QR(&Xa0xpv z8}DCm$)X*>Jev33FXLq6Sv!OXgmThTy7*h6w^4*J4!%4uD0zn!^*=^pFy(c887J{F zmfcEsoYh>$1=A}}I>J8-uM=#~qaQ2VmhW8N?*+dI@tmPVzvvB6o2;Upf3W|4m;h{j zx*P}3KyYwLeC!CCs_d!0wQqUhW))A%GU((z2E06-Jj%YD4=bXq` z25hp8op1HTGCecvb_g{xp|ucPY{t34{VcC4n)vwK)d|>#!8p`AT$oAx(=O1_KX+jOsPOAu>(CN-~JtOZ6W=mxJsAM;(D*U863OkKE4Ki}S-W08aXYUJ?jRoE#9k76T&T#OFL&+SB7ZWyJ9e0FT3WLcI<*!%wsqH&^J381 zpbkIkY2v!AAL1Mn6z8tsZhf(_KEg8@6x6)y${%Pajcjk~;JcyN<}kw)in=Id*k1E{ z({fr}$dIbr&aY*#Z*BTm(x&*sTVJ>I@V4nTX@u~x$WWC*>$t7F4xvSk@ODqg}3x^^f!BO3+raYkF}3Xk0DM19TOkL>T7 zrW;|H66AIjdM^6yQkB~?Uv>2(X>aQ2+tnyurO$BMKc7J6@IFl~;$=S$o@CUYGetKt z6HhJA8{~)bZ#hd>IJUllm0xW;L(gEUS*ecjP(FF z^L6qYOtXz)+kSuhebnH2!O(jsU<v>R;offX#%I--U?lr^i@<7Q+QO5mg&@9h`Lf5w;Nq3HxMKH+V#F zwvW*}`Bo#y;Rsfg8BxL;aZOe`i$s5``B2i=c_q==A#MGK`wfE_Bi-B-bAG!uO}t>|em_+j?KIof zbTwZ5Tbd&URltw%<0G=P*Y?Qnw^ofde5MHzhQ z{%0pt5gB$bcD1up)+@fWV$yM=qP|8rtm=_`W#UwwthEMi+0_qWfz4-_#FR;l7DKO9 z{&o-4QDv)BH6c`bp}^7iwIfzF1UUR=VHnd&Vj%R7fX8#wy--n*-X2QL&D0EQD@)2!Kf@Yyl!dtk ztNAc|N&t4G0OzBb{v1H2g%39ST{ zY)1?~6>ctb8SP;Y?qA6w(Dm{OFcvj&#A1`oi4|adC*gonM~7EC`e-35O4Vzs?h6`& zN8QnaBx9q0EB77{GE|mj#7I48wk8BlaO&?_ck)4u?-lOi9&S(H}DN(NF+ods0DH<l? z=Ns`6>Ja>)>c*3k@W$bq4<=GpnYAfP7X(4tPZ=@I{knKAVBB(O<(WG}TPRg@r7)?i zy(kKHaL=MC&Ljn?1Il~z{^q&-B2Le0r4K15Ne=X-@ zc;v^p9IBI-h@1lUD1@Ea@KjvPN533%U;fdFg~RpLJ=YGX=TxSJUb>hTtiGm; z5M*rl7NCJwcm*|(Z*xap;ZfCm4l1_E%FdaXU{SWP0MT)9sBS|O;@?9&k-;Oic)ZK< z1QC`*!AS^JB{!I?w*?YXPLG~Cd<-`WUe)p9C(rU*%YIUq7Esp1OEtrVBq;%(=b}Wl z$21%AE%k6R(iWVEzpChj(uIOpPcJ_bQar8*w1i|#T6N;ZXET^wOEZ|3$FbJ~0wWXY zUWG=?=_wV{v|Vw4D*!bDNW5XBt<_7-iq_iWpe+J|X~-VfNr6$$uaaaIbS#t93sgZez&T2*V-ob#Dkx%Qu7?jI_C96?Z2(BUm0?-m;A zI26mg<5v>yo?Fl6OhZ*rOd{HYUV!fXzD!!4y7Uv!NbNSsH2NGsUIX0S{OCLeU=^Ja zB@H(sR#kdCAL#YUi)hTeaV~)!4rWbCSd2|f$&|$+5EzV3mHCzhWFoXXzB%A*E>#n! zp0hG6iyoIOqOL?1eOsi&!nDDI?oiAGRqijaOo7>CxCZj{8Eh_#zOXDZoJguBazZa~ z>7eTzm!NZIN0ZU-K~AGYL)}ZJB^9XW5NeOGNx0cTg*{s*=j)~u8}Ua=6xj^foSL95 z!i-XYgaSm;2T2GjlcAii0BvW81r#ws1<~(0q$NmL6*Y`gC9m)WXkRW(Q`-%tqCUi= zo&`&+;&o-(((xK`!znTB!3!18jA^1piMp^qh10<5(o}UyBbkoaQf;bKdV3%-3VTYl|C+TWnV5kNQ5WALUC3RMrlf0iuf#V@ z5{p;|x`bY|*@7Ic%qB9t*Lzq3vb`B~?NH2@Yf#z3s%%|tY4SiR}!PFzyD z$O$2EhAKtEWDFgalniCOQo5hSMrQm*bmzKLjsxRHOo#lqMHN$Iuqr?4CSsP(%{flD zrO4D?+76X_k*J&bY>#Y~nP66pO;}*RQK%O_;8y};db8P%dRiPj;(`|Ld)}VY{wXxr zJqd8sMIWRQ&d8dq>7(hAR);yb59fzxzjko+?bpY>%mPMFb71r&21d^<#6czLGs+-y zXFW;jvjoM^s#s<3$@tB%LiDKTe2`Mq0>f2#9J1a74Mqot#Rv&ecF1wS@;*RP`Rw2x zzBf?XCozAMl@glcHK@kek}X?)jzhfVxl6!!lQY~m*i(4{fe}oaaIQ|YJ5&*XSKVihEqH8;%7erIPByUtT5kefl zByShW!|*2}p^;!A`R*tC`vr}xv+O=C+8PHyCex}D^=}+rb(kvB`T`Gkr&-SrR}N0s zMf7d^D+w9h@N@}`;fGHiJ#PlG64$E-T6Z3J@Vz?I9zMWP`@`GQjTvFy-z`TC|Jc0F zdfE9nNiX<#4c?Z7o%F@05yt#x-zZ}E2f}>Re1ptK25U_lY2WwjP?$T`RUb6CzS9$S zQKv#QV{bvWt9cl%J@o1BZ4CsS2x2#3w|U>g^p?;-DdAU=7w&9T0n)d|Q{VTGpYfjT z*WA8)okQHao<3yi8fUN0CtYfL>e(Z;G%RzQIUKwBtt)Id+4^j*z4^{G@XbhndHK6; z;YS73`R}f_OM3|{&N!lRNDSr=)@ioZ*2Ype2=||rO$=TZ(RCgjCVC$6T)bSmDclzu z+U;8i_)@Z;d$1Gq{_@r*LbkH@x`gBOySCbg0cxFw+V4dZwpu9&y*zxP( ziK-<(IRH^@=d+yNPCvD?bN9_Gykw5bJHOx-2@`G`P`SLV)+ye+u7t89a98k4L!HK3 z2>`Kb?jL^ZykhqlWh&45@zA{Wnm(u1-u_gffw-b;F`P4X(lAQm+rCL4f3B^51wh1F z+%S+Ks!Q?->9VK`;2o|GY8Ixmr^7h5((MYUYI%3; z;^H}C6(H=7klfDY$jiAfY#iR^GMf*9d^gpIbV1zqjlxdkck&;;^OWo5fiIEiew=ZI z;$4;1*;~WSWXLC@5~03cInUVhStjUDI&?xz>sh+wg06k3ZC+Otd#QfmE(|{o<LpEk#wMWXeH4dC|W%a95rwMUP}f%z6%VMKHH8 z%9Uw$>gyAe6Na}eaxY+{=iVHxlr1-?Id8@{W?S~opZa_)3d_@@Qh)v$HAOP|ny-(A zy6`pQj-(58^4>B0mj@r{^e`KpjOec%pRuj6Ph+Wz!Oc$&;khb{lsI$CRYE1H3~Xkw zJByVbVGWvQwG-E8cB<*8llERWTpEpfpBf+)-ODPP#~B>b@3Z1;U>A_ye?x}YR_^L% zhx&?6XfkjMTA2IdhzR*GGSTcu`^Ib)DSPoc$?H(Q!n0?Kq@O$j!49r?IpRDQN)O{h z&&wTGq$bct$jwrL?J8l9aXU)S4{?%AQeCWptvhSZ*d}Rp^TB=#oN;-~z1yz*zRUuNY>;ga8i16LkyVmF;4>xz;Zr6y# z{=Dad#Fsv_a&z;MH<4*u*{8N?)++j8NRjawl?$I!P6NL~pxyg4k<|`~NeUS3d=R#M zu^HiyX19z!a(K*ZH?`5ml0vneIB6%m8sy{IU$7LHkwi0X-kLs_Fn%yW33WUz(zJy2jWR1c-{p-+ylr(=?Yb)-Vj`)X){u6V+8%+HEo2eI z2-cxYkKbUhX%^kMNRQVCNBTS^PZtH6@PDkBdI zz)B0(-}F)yfHIWvWk;w@+0b4R_8{9+qQzEY%aCqNLlPN@Lz16ysfuj67Dp<=DzR+% z8U3P34N>>mYAL~jfO@9mH#t5p;y-z?Q9%*QQ3to80_%ZI;)SLkKU$?LBl|9As9{XMJ4Oe*rKSOIsY(`1mfN?=fjFTY^TCs0@tY%( zY%@yniQgLHTMB(`zbn_>T8BV2TUHdYeKIkxe`bwUzga${iX4{$3wmDvtRz1d<0E>|oFb`{0|4$SXP@OSa(F7i=qq)ocuH z+7|b&mr7PCp@r!aa;S*1SZStE4IiOplmNn|wgYKl2~;D0s5V&K48Tcj04ps9oF3_$ zo0MmsW#=XybQ}j{CoYK<7q}J8u^94U5EN{yZJm;~Y-v^RJw#HXe`kHq$0>N)jZ zVCHms-sgl$y-8uTDAGvMA)$&%ih|ZB>F>;ps-zVT zS-v=f5wmt8$J+67Rm$^&0{Sc8bqz88TA;^$1$vx^26RMVB^xHEUK`yC~Zp;Kh>rpodOIJ zb)m|4-6`u!??Z*>0WYXB98;PnAG7$W5q8i8OF{4XcwdJnv!lGLa(FmkUD`$I2|TJ% zsrOSr$V;k^W$hK;1>Dmby7}IA;YrcHh1CWZn}judULRXW^GY2cIWfeld$L|`3BX_8 za1$d$bh6=!w1KhB6lSwgv`JeWxy~wSr$`riPmH1z7M z43O;o?N>S^LI$cu4oRjFBcXzedFv7eEk)Z9G9i5;Z)rNxb5B<+vaQK=zU&}ID~Cmg z>_;Ppx>Nf(G*vydMLb-;Frn7xOk_KK3yDgM;)9P`z$eJ%(RoHOfybC|`+!eXwaDCh zJAoo5uD1aJpSZirFi8fh-7rX`9@F4r#Hgzbf=6C^DG@tfeW*c}qUbC^=KkKX9j7Z- zXI##BwOAUrxee_`)Os4?vP=tKYy2* zeC4hPV@wc5#VJ%d{nK}FB@aOm%ZY^S-a~{odYajkU~63do2-G*@;Bwdw;&zv^Ce=^^OHgZ%;$2}bf6>Q zB|$o+`aXcTDf?X}#9k#k9gW}(EOL_W=fY1~P$+{m7|TuCdap2)^PgG7<|{KR<&`Iw zDyggT-4!RhUnntOe#y(tm2NSvNC&g;r9N8Z)AK-N^~sdy$}?uL6`w>m>c_)y72j1I z4*y&zpk8DXis>@6N|LTyxC3IPBgGP$;XVq5aV$wD!4m2qOZvH5N~NlbPD5)}klC@B z2n%Z`T)wQD-eV{CUdQZuklqAHYyS=VN|(cF^}X?e3I-i^y9s8gE~dc&{uR^wi)opW zXIKfGWh$|Qk%#e6^)x9^FX^Ssy7nafv<^hc`sjS8M>c1bjzS5T;C`S857OP(NU?;i zM<(~#r)u4cC->nE(&-cQXZ9#YWuZ+?e38i`o_UqswTl#Ktk5uVdU?R*s!|WatPeIx zv;#Qajj$_ zedO|V@)`XU=ZX^6hdDnMlH~Z^U?qLp%l!I9G;qRF%Lz;5NzrY~QSy^K`V4r&A2vnE zQ?`!b5=?2YtZ7s+Sz*fzzKus8JbY;a?P#c$%U*7MNNE|q>>C30$GztbO8^FQI`t`| z6KeITA5HgtwbGMf)SOtfXD4I#NZLnhL;ns6{JSaA|6(ZcpL(&MNFSj4`U$f=mB000 zKVhb)_rLXIKOq<3{ZGK-uez|G2*iINI&uBE<^B^w!N$bQ`WK?ps_tSW0iX-Zs%jnw zU#au~_XA6``6UZO<9(6+Qx>L0o79=cmMIp)Hjyz6*yAx2Nx6>VkIi50fj*ybKEG{* z^itKaZn?kM-!Whu``)va1$S#w&iicbE5b@fENzm(;}zh#qxU0(6j9~QhwJ)>UDP8* ziV6IfJ>$)_f}s9gkO7d7@Jiy%?an$QSAC(g6ft_z>#Hn-Nay{>&p$3(5JI@NgRwM3 zFHhgdouMuj3%WIHml@gXNNCTm7HSKXPZH9=&a>p$6nO3ps?LE-vVvAH4R{3&)alCZUK)ov3S^8p!_I|aZ>&D zg1Btj>Ycqhb5_~2iq7R|w>Uek*=K&-R^kUM!TSdL7S>rr;&xn8)ywDPAT^c%H#IVP z9~2{>`E>&XAHvd=iY<=uTZaO#x@%KU)l|ai>mWk(PCU=x9+ebx7lIM0k6z0SVi(NL zf#(g(TV5CXH{;Dr&aEWDpQ=TFOqFmpe?DT&(%0q3?MjTqXJ~-~<+Lh3$L#v_HX+(6 z9AemEU4e@yXlCFBAJKRzV{id~=wrI*A%0ijSNvcoUUA+e(?6Fa4vgowA1tLVr>hcA7ro0W$*O-!O5LagaAtiy_BtluDMF%z!Wq zYgMA8@-z_u=T&RK z{!s%x_uC!r2C&>>V9G`xY-#llQbP$26swIqJ>yrLkJ(EGJVGo17&-I^X*17ip&H7E zd*kNWdUx7{r09XChQV`~lFc!rvCXjsSe#NQhdyMxQRP6s6;qPGk%&v z8pJbx$>)Ar&u-!Y4Hsk`QGN=P(jZ;16d>h&SKuXuTD;TA-<}ym858_$U zMRxhr;&9OF6*e;%#9%=un^04n(rUWF9qaMFTp7?o%0Az__jD3TI6bI9sAJGxM z#)6skNqI?Fjha?k5>KKN?OXcCh^5Zzk` zTggrivG^WJJc;LEoT;XKRPgNBQc@x7Zsgqn?UBFSqx+<1JZ!^UOGmtHucvd}o9McZ z0WAyZ{FSTyLV*>nWgqSy;ije_V$s$zJE!!jmUOVl{WO4C`ezl~&evV@ zu6C|6_*-^X>ouFZ&$<$)T-7ZFnB1csi|DXw3>`MX8M~Mtck^a6)>L~YNKEn{IIMb` zGe`=G9+XLOjLh~*;3ayE#39I#9F+u;qewO`< zJ#K(&sgC;2PHh;mS22&5E|zsaFtb;^o|if$zO3|Ep=a?yXy~tXy{p!qPd1;G_UA8{ zWB+-74z$=Dw0OOr83>}Vppp%!$!2an z(B&vzQm2(XQO{@zY}${v7d{+BR^u%bn(Fd^Lhb`tX#j`eT)IZ-41gm5RztgA@is;; z%NvLwMHu-B*xXokTn@{E1u_d$Jqo+_LgF85P}15dw4`Ts96}@jufcy?85U->fUlcI zY}6kyQFt?CW2&0gJmDF6hY3b68IUh2RSOCqJ<}Mg6T)zo>>9RQJKYdNjJ%9!H$QRJ zNED^suUMGT#MNm!Uw%URL%pRb0%iRa6nPh|)2oq}8JifjuXeXYap*7ur!;5W<>-dt z)zYkA?dyT4IU{S^J+r*w+NLNOKg;@Q5_vpP3rP|ax2ZvAuYf@-R1=Js7*psr%|~oI z&8PPQC^4#t8r}Oe25HX$=WK3-%NzRWK!BKp01%UK0b&vxRgtvCsXQ=KTLflmOrt0Y zBZ+~)Ozq}3F=^kV;HKCEiYca?C_fHE45I>!!V-!op`3^+F2OIAdh5Mmf@?_i5Wc(? zFoxM-Vw8-SvQ|Y<4i3#g!U0Mq)3U?>^{IT8@CK3#ffD~igsS<27<-)W2|rZ$zbTJu z%#v0eCeM{!eKO}Iy+++R)$~K@ zCgjYqHDQtnv?@1rjqyc&>$488);9MY{}Xpe;ZUfu?)Tp}Jscl`tKQM|-87;c(nmy2 zy-YqgI$CoZl^fH#=kTih;(YRA{&w^%?s=N=+pYSmLj842_vz`MxK<9-q>j zh)QVZJj}kd4cQ`W%Od)w`1-rAbKXIE(%=%T%vU9WqI}y>5XVBIICVf*%zLn;N9iT4zn;2n7 zkDX5@sR^>I?`RJxWONp}7rTeH7R@xe6=rH--$6aP)wR2 z5ADyd;IufL^n5_k#ePsdia2n1J|@x0IaW^>GL?qUa+ma;<*LYsHJw{C%BA^1K;DttC8YO$@^{OA~sPcisuJ z050(KK$;Xy9E9u^pf6h&u~7hh`AFSEH<~)-n{dnkRLJ5~b!m12Nfex`?4-2P02Ind zF4`3Hn$dCcQMIdTjr3rsS||_0f^Z)VInw(?I;{eeF`8F|Sow~{NfDQd=IO(Q`fZ$& z4_>8y{ava!Vc0IZ(bzdw#uYC*6lmt7TH0OTB*5|>S9xw3Qc+?AJy;9V1WPHuu27?w z>eH$Mn6W8UM1|)VVy2yb$s-!bag6@FG?oQMaq7Bn(uDDy^(Z2N;e}8EGIl~!hLpIz zQOGaCCeeRK84hN>KtO~}Y|nta3@}2o-;m@7_KCa{XT!st2`SVw2U)#~H75z~!uPOZY zRU^dL_g|rq4l_!##$V1#`Cf4f7WXuhV z3a!z_Ocff8>cqQVdT+81waPkfvLi@kwh1k&=*f^S-Yh*ETpl!&^7}9&0{gB&KsgWj zRoo^h<=1)g4VQc~>O2If>PKBHfy!u9u)T&@h+i_567m!|Z0@}|IdA_P^;+Xnabd+d zs$(~u__KHOR1Z^?N^=g%c~6HY_C`yp)?v4GKVLGX)vzX7HKx{OxSKXCD`BNyTgkIY z^4-G+ISCgy?TD!S)R)YfQgp(ZfhWL_pRLeCN~6%@Ho~nhLV{@%-TREnzL=yNDai%6 zrS$`n0paH)d?v4e^uWxN6@BP{QLSf55+^OT2QogaQ6UVLpyIa5xdg;Xt2jpIqi##N zgBsZYDKq(}xKjckk;Dj0iMt1Kr|~y_1W*mxAWf&0`k7iCtl_r_D~a2j*+7K2I~vPA z4S8Dq%z&4E=oKRvN^a@2MUidSl6u}&?*qGMaN%&BzLgf@`MC)eb^-T!l!?e|m1V5~ zdi$mQ=wvly9{8Qcp_;J*h*8CSi0jM=HDo^coq06IQc9g=!e9KgV)+mStNZAvrOc$h zaq*=D-g!?AY+MgnAdezUI4tWFyyH#~fpDjZQkDU>hy1z*mt`lCMfJGJUa6u?&%~w| zVtzE~j9t;{jNP`piR3OZ@xkrP1Aa3N(D{rw8{hN{R5KY)EepE5tBdj z5`Hlwp70VUSVkF36TqqFm;VgQ6T3$lV14{7eoDcVi8!CW3KYLS@*A1>1w0UO|JumR z^y`bv%)k9@n18=#{Z$h)+pjv9e=83v?5T7wF7Me^uNE8!=9osvvF~<_}5lp`FUpi zqjUZzxQ&&a^IuJ{b?kQ@`B)K}=ByzonnJc!bE%Oi>yls-JLAvpv~)B7guW0t-8)vR?3G>)HvFOUu~>$#$p+J(K5hDdj5 zNgL|IvbJ@i0g!nxN|64MB2w*UCaT|V9ruw_eeqL~RG{vcJ^OXW{muC-!p;YMdclY5 zcMImSr1eh821!l*H@zMbs~hPUFqd{75BI0$#3PjN9=imDHX@vcVwnw>P#Yra|yG7IZZ7u=5#;UP0P8m0u zOH1W9!{6?Pdy3}yvrfS~q@|cLtY6I51iV^`l&KJSftQj_BRjEp(+_4eOVn{Fp~&Ev z^W6&#og;MTG7GNdz)8RMjh7~)IQ}~?VX_4>-aiW`K_z2PI5M&?Wgp2 z0tP@e+e@eEY`B20BG;q~%rw;&xAk}G9_{_CoP2-lqd3vxCNZnHyjKo7*$>dOT}AL~ z6@5GHISKG;c!sO%1 z=%bQ4i6{0q~>_5`D(%)yPn!PP25ow`mUx{b9>Vd##tXWw7bYJ}t^Y_a!MDtMC88U*k0_%>W1AnntwHb-f-R#0qn z(cRo#sP(f)er3?c*W%aaix-_%ierrllJn*Gm=X?hwM9zHaC*tiYcNSL;u|EC#5Fl= zrU82W!@s4BN?9a)rJaMN#Bs5A76UP*DN-v>J8P-r_QingN(D(O6;^5KlFVFuROBRG z(Wvi7=UuD9fbu<7dJ215zOFsKZ*(kmuX*tZCCml7nekj{aeCrkUdwp#Z3?d8yjz_e zfz_%qQJ3A63(I`2&uOZDM|RVyvN&6vN~_)h_c5?61-*7jM!f>HBoVh}mcu*Z^*+v8 zX4ou~snRalTA)e_`k}!=>yh{RNRi_MJ#>MkE!0~HH8Dc zhS!a&Can%7vPJY5sm0x1nz<8w-^r}+WFw(NXm%5C2u%tiM$p`539+4wlnriLuAuE% zU`P6n6kHNm&k*a{YeJ@@_>&Z;6mYzaXld+usNo?Uo&`ROu75p%8=vw;NQmI*APlWfL=k8ff&( zv|7C-3r`bwOieZLm*kG$XaGC-a}T}mz)U8SoV3!v`lURC)+*SF%WYF*aYr$DO4}T_ z)CWX3jL2PJkvE=fQ@9DEx^b64x#c)7ZkI&6;lxcZ@4;hyLv?PZPH@>n#QSE4W@esAEUcq$t=!&dV4R2Xv8f-fdY3! z*LUe|ee~!$*omBxG8Hz6mtaqB&8&jfKmwz+U1R0riODI4o%tym^)tMU=q{Z%ea!12 z+B1<{V}z{?3UrA+hH!@i%gP;zi2S1kvZ}$>Zimy;8lJOjQyHH(?W6HgdJpm;$8k~X z{qzz5_KdIO>uV+Ef-79tmoUpH;EcSvM&_00KPCiGD*W__H5D4?m05LuTp?Xk3CB(O z-rj>5Mc9knh-q~l1X%DWev7ey4&H8X>NknabHfQw1SKAZv_g>*M+hq{IYsKc62~Zk zeuSX-GDk?likQGm_)=;fCu7{bdK%0assS6#F|!^LnR!{-sA+b!zCe#`&&02EJ6#Ut}DioVnj_5XrQ&5*kD)7k3`)l(?$!6m%(9 zvJ#Xf*n7)paVp+ySY_KNYRT8wV+4gnqgduv$$m50dQsG3WyyXd(6ZE{D*?kyEAweW zgy^PLeC|`v+@l);zB$m*Y#8aN4xkiJr-%wS1}-wCj&cxy^@ZRlMst9}PH})iP3OY= zS`Tj`%_hR&oF`O_hOURKG?nh85EI_?r{XXP+w6NwRTDxiZL}AxyyGB9i?+F@Nip`& zNFU?nt^^(BU(Cka3t!?U77q$yS}qIxVk`EV-84ntYpCQEHK%`iVRc(UkVAkKf4sP( zkyo*w#7A&7zf9o2y*A&b5z$@~ZDDyY)kd$uGgW8;Wr;Tkt6T(>Dz$#~5hhS2Dzzf@ zuykFKAC*&ED3gquhdJNzaShG5BPWobI#`G8ywjTLhG;I15|vS5dmaEntux|Dqvth* z%e0ozbKv3LbVD-@&KrUJLHDTe&$gJKF&2??n* zgE*lWni9=`uDH(^&h|^3NXNI&*EcXINQVzSroLQ-+e_D9ST&%}$(?MZsBOS3d(A}~ z*yXzQKxG%`3=b2AEgR$LN3Hs*>7?F)&9-%xj>=~h=}$8hP19CcnrppjFQjMaEIej! zO?tVqd1JjaWucACn8x4~~Pz1t&S?6}p}{$e8h@yL2fm-^&KYNMDxqoP?|627}! zS}DvTC_(Vm#IiTxtsgFwg47~jl?`hrG)j|nxogmgq|u?~WUMrU^gza3Lt542%Yxye z4z+wa3*Q6}H;nVusG8!C!E6PTJ*HQ;scWWTIKf!Px8T&YJKTIR#Hlep{i1BH zOc`jw9GSq9g%-S&^fH(w@ntXvQ1T?cB&kS8ZO0x)YDgh3aKTROWO+w7UZG-q>!1%d zoCdfP`{}85qn?%WxQbiwn6>z@|LUQ~Q7^t=O{2WC*aDVwlrAV9sl%_qLiHQLLixAB zLNhgYLiJBe$(>Md&E4C26UEjqQ7=kL2vBHvc}du~M@A3)lUe6NSer~`Oc3>*yEd~+ z%i*wVl*Y@=UevW%`LFSjy5|TMW-daGRy`K(cWZhG4XJt%Eh&zZP3ewb7#4a`O!foI zt|x`kb0Kh62-swLp&T$=a45~it{zR-;!%9XAtrpqR3StvQ!9MMsb^f-^#P7T)HEA! zl~o78|9ZMX?WRIZ*0b_w3vpw*p{2saJL&XPme30 zUG>T8p1q)Uwzlv`&zIwdUBymyL_cO`a7Lnb7DP6&$IrLqCV^d*g@-7dupIzbj%L$f z3E@#^A*~PzMI_CSH~ZRWiv9Jg91&7DA1k4tDLCKMfwYGhX2R(w`qHgvWtWkfZ0sHz z>`}8c#AuNwC<#g7B}i)L6O`^?>Lpoj*va(E9%TgIcPOgSJafz;(0Q?=;skNU#st$6 zw0mLTs<9AkiquE=s;Svy<0F~_V zccsi8ca~LY#!}Gk#f}CU%vfT^^22FXmf=Pg*m249Iy-le(yO%8r98LfB9#*cS>Idt zmD8L24hgDaFA z{rrRt07&TPy#1;C4Iu%5#1rhq%>COU`5#ad_iu}2?%xm+_iu^}kkIVc=YLUTSeSl6 zN-Rvj>I0;0KlcL}t$vrkAupz%_5FmJ?3_*QoSgu)=@-z#sA%K}Yyem`e*<2A2J??u z{r{uT=ns&A{STcHfOY&`W%LtSFf}pwJJ#`c-hdG)6-o`hGwu#P|QpT7&Q{t?Z; z;y*tR*nh80{?MVZ014WD120cdY(zaRwrqhUDyQ01|5{Cid2 zKk=V`Jw_}{f5zzkBLKw3#r7Az)iJ=g!XH5KUa$IM4q-Lx1Lg-#|LS0o1N;q`=^zsk zMB?L12eS;V6!xQ(omgn77+nX7*25uE3ffY01!JdMC#sw8qf%=WMdRg8@&iEzSwGHA z%K7Pka39cSts2F16!k1u__c{v@82B1RCx0^eP(a-x>QxiaQ%GsXg>{E#E-KuJO}Ci z`~1tOyUiwp%+7~N!VmY?Fll?pk)L&0P$X_{_u(ZTo?l1J7laH@6bY6CP8yHgH$4gJ zZ^|4T%%1NZaaK1FvuY+>er&$%OW!;HUSz-CBAT}KFkYPsQu0|i8Z&f&w0$`HF<*2N z@0UV-El-{GneyYIc|klBzP=ZPATCq;9>Tr%`q%T*rLM=C%?AOSqD-AP!CeoPt5Nf8 z7bVNqdpbH_L_2QJ&wdyv*slv}1;m9N+*}TB*WC!JZ9^Ip1h?4e+9l7!)NF$;I*pi< zw;&oL8L-_WiUks2-OUwwT4$Jy=|J+lc`iNab`=pY#7lv9y8Xao=arLirVPkD4>+_k zMMp%uA~Z~-H7g5O!V|VGykp)#f;o@)vrU|eFsbR`GiQ|a4rerCdP6M_0;Y6sQ%&3y zEiU7Fb@SG@4tLwewTH?*mQE~VDtZ3X?sx-CeeN4GgbXaKK`I^?83l-Ecmn~u8Wtjq zqGA%(kp*}kbuWxRE-)o);MkARk!iZ6Eb4+AGFQq#eJV05vP2iMWyq6V1~*HN0iQx< z>U%X!@K!__KWtg#+Cq~3MPbiy0WNw8=e4K5!U?J!Lk?$8xm>WgaTaI9a*GJ=#wa=) zN^76R5d8Gi%7MVADGkzBf_x8X3-;q|m1`z=gPQNjlwD>OG6WN+02b#R+pvxH5j0~{@v(^7 zK?Hnew;C1JupiINw8I!(2rAEHRj-sgFJ8u9shZmy9bb}3I%^U&(sozob0j+h@mhIJ zzF%TG%SfAv#<^(X4_qnFQEH~ie(FwUXroAF&EC6Cboxq6x&oq>B(1mU@^}v{3!gFC zPGO@-wlIVstBCqNplUF`^(KEbVdoB>MA=FJ9^WYo$7|38zcR-(6D}v`F~St%u0t