diff --git a/external/SPIRV-Headers b/external/SPIRV-Headers
index b824a462d4..04f10f650d 160000
--- a/external/SPIRV-Headers
+++ b/external/SPIRV-Headers
@@ -1 +1 @@
-Subproject commit b824a462d4256d720bebb40e78b9eb8f78bbb305
+Subproject commit 04f10f650d514df88b76d25e83db360142c7b174
diff --git a/external/SPIRV-Tools b/external/SPIRV-Tools
index 262bdab481..fbe4f3ad91 160000
--- a/external/SPIRV-Tools
+++ b/external/SPIRV-Tools
@@ -1 +1 @@
-Subproject commit 262bdab48146c937467f826699a40da0fdfc0f1a
+Subproject commit fbe4f3ad913c44fe8700545f8ffe35d1382b7093
diff --git a/tools/clang/test/CodeGenSPIRV/intrinsics.sm6_5.multiprefix.hlsl b/tools/clang/test/CodeGenSPIRV/intrinsics.sm6_5.multiprefix.hlsl
index 7b15e17558..a71664b063 100644
--- a/tools/clang/test/CodeGenSPIRV/intrinsics.sm6_5.multiprefix.hlsl
+++ b/tools/clang/test/CodeGenSPIRV/intrinsics.sm6_5.multiprefix.hlsl
@@ -3,7 +3,7 @@
 
 // CHECK-ERROR: error: Vulkan 1.1 is required for Wave Operation but not permitted to use
 
-// CHECK: OpCapability GroupNonUniformPartitionedNV
+// CHECK: OpCapability GroupNonUniformPartitionedEXT
 // CHECK: OpExtension "SPV_NV_shader_subgroup_partitioned"
 
 StructuredBuffer<uint4> g_mask;
@@ -13,37 +13,37 @@ uint4 main(int4 input0 : ATTR0, uint4 input1 : ATTR1) : SV_Target {
 
 // CHECK: [[input0:%[0-9]+]] = OpLoad %v4int %input0
 // CHECK:   [[mask:%[0-9]+]] = OpLoad %v4uint %mask
-// CHECK:        {{%[0-9]+}} = OpGroupNonUniformIMul %v4int %uint_3 PartitionedExclusiveScanNV [[input0]] [[mask]]
+// CHECK:        {{%[0-9]+}} = OpGroupNonUniformIMul %v4int %uint_3 PartitionedExclusiveScanEXT [[input0]] [[mask]]
     int4 res = WaveMultiPrefixProduct(input0, mask);
 
 // CHECK: [[input1:%[0-9]+]] = OpLoad %v4uint %input1
 // CHECK:   [[mask:%[0-9]+]] = OpLoad %v4uint %mask
-// CHECK:        {{%[0-9]+}} = OpGroupNonUniformIMul %v4uint %uint_3 PartitionedExclusiveScanNV [[input1]] [[mask]]
+// CHECK:        {{%[0-9]+}} = OpGroupNonUniformIMul %v4uint %uint_3 PartitionedExclusiveScanEXT [[input1]] [[mask]]
     res += WaveMultiPrefixProduct(input1, mask);
 
 // CHECK: [[input0:%[0-9]+]] = OpLoad %v4int %input0
 // CHECK:   [[mask:%[0-9]+]] = OpLoad %v4uint %mask
-// CHECK:        {{%[0-9]+}} = OpGroupNonUniformIAdd %v4int %uint_3 PartitionedExclusiveScanNV [[input0]] [[mask]]
+// CHECK:        {{%[0-9]+}} = OpGroupNonUniformIAdd %v4int %uint_3 PartitionedExclusiveScanEXT [[input0]] [[mask]]
     res += WaveMultiPrefixSum(input0, mask);
 
 // CHECK: [[input1:%[0-9]+]] = OpLoad %v4uint %input1
 // CHECK:   [[mask:%[0-9]+]] = OpLoad %v4uint %mask
-// CHECK:        {{%[0-9]+}} = OpGroupNonUniformIAdd %v4uint %uint_3 PartitionedExclusiveScanNV [[input1]] [[mask]]
+// CHECK:        {{%[0-9]+}} = OpGroupNonUniformIAdd %v4uint %uint_3 PartitionedExclusiveScanEXT [[input1]] [[mask]]
     res += WaveMultiPrefixSum(input1, mask);
 
 // CHECK: [[input1:%[0-9]+]] = OpLoad %v4uint %input1
 // CHECK:   [[mask:%[0-9]+]] = OpLoad %v4uint %mask
-// CHECK:        {{%[0-9]+}} = OpGroupNonUniformBitwiseAnd %v4uint %uint_3 PartitionedExclusiveScanNV [[input1]] [[mask]]
+// CHECK:        {{%[0-9]+}} = OpGroupNonUniformBitwiseAnd %v4uint %uint_3 PartitionedExclusiveScanEXT [[input1]] [[mask]]
     res += WaveMultiPrefixBitAnd(input1, mask);
 
 // CHECK: [[input1:%[0-9]+]] = OpLoad %v4uint %input1
 // CHECK:   [[mask:%[0-9]+]] = OpLoad %v4uint %mask
-// CHECK:        {{%[0-9]+}} = OpGroupNonUniformBitwiseOr %v4uint %uint_3 PartitionedExclusiveScanNV [[input1]] [[mask]]
+// CHECK:        {{%[0-9]+}} = OpGroupNonUniformBitwiseOr %v4uint %uint_3 PartitionedExclusiveScanEXT [[input1]] [[mask]]
     res += WaveMultiPrefixBitOr(input1, mask);
 
 // CHECK: [[input1:%[0-9]+]] = OpLoad %v4uint %input1
 // CHECK:   [[mask:%[0-9]+]] = OpLoad %v4uint %mask
-// CHECK:        {{%[0-9]+}} = OpGroupNonUniformBitwiseXor %v4uint %uint_3 PartitionedExclusiveScanNV [[input1]] [[mask]]
+// CHECK:        {{%[0-9]+}} = OpGroupNonUniformBitwiseXor %v4uint %uint_3 PartitionedExclusiveScanEXT [[input1]] [[mask]]
     res += WaveMultiPrefixBitXor(input1, mask);
     return res;
 }
diff --git a/tools/clang/test/CodeGenSPIRV/sm6_5.wave-match.hlsl b/tools/clang/test/CodeGenSPIRV/sm6_5.wave-match.hlsl
index 582be080d0..2040139dfa 100644
--- a/tools/clang/test/CodeGenSPIRV/sm6_5.wave-match.hlsl
+++ b/tools/clang/test/CodeGenSPIRV/sm6_5.wave-match.hlsl
@@ -3,12 +3,12 @@
 
 // CHECK-ERROR: error: Vulkan 1.1 is required for Wave Operation but not permitted to use
 
-// CHECK: OpCapability GroupNonUniformPartitionedNV
+// CHECK: OpCapability GroupNonUniformPartitionedEXT
 // CHECK: OpExtension "SPV_NV_shader_subgroup_partitioned"
 
 uint4 main(uint4 input : ATTR0) : SV_Target {
 // CHECK: [[input:%[0-9]+]] = OpLoad %v4uint %input
-// CHECK:       {{%[0-9]+}} = OpGroupNonUniformPartitionNV %v4uint [[input]]
+// CHECK:       {{%[0-9]+}} = OpGroupNonUniformPartitionEXT %v4uint [[input]]
     uint4 res = WaveMatch(input);
     return res;
 }