eMMC/SD card driver

[akku1139]

deps: #2 #11

https://github.com/TeamYogaBlade2/linux/blob/32749c5e80a99cef9f2d94c64954e86b228c88f6/Documentation/devicetree/bindings/mmc/mtk-sd.yaml

Reg

#define MSDC_0_BASE                  0xF1230000
#define MSDC_1_BASE                  0xF1240000
#define MSDC_2_BASE                  0xF1250000
#define MSDC_3_BASE                  0xF1260000
#define MSDC_4_BASE                  0xF1270000

https://github.com/TeamYogaBlade2/android_kernel_lenovo_b8000-jellybean_osc/blob/main/mediatek/platform/mt6589/kernel/core/include/mach/mt_reg_base.h

https://github.com/TeamYogaBlade2/android_kernel_lenovo_b8000-jellybean_osc/blob/main/mediatek/platform/mt6589/kernel/core/mt_devs.c#L407-L488

11230000-11230108 : mtk-msdc.0
  11230000-11230108 : mtk-msdc
11240000-11240108 : mtk-msdc.1
  11240000-11240108 : mtk-msdc
11260000-11260108 : mtk-msdc.3
  11260000-11260108 : mtk-msdc

MT6589 has up to 5 mmc support, blade uses 0, 1, 3.

https://github.com/TeamYogaBlade2/android_kernel_lenovo_b8000-jellybean_osc/blob/2b134a8e223ecf90cd0c7d7b898c230ade334a69/mediatek/custom/lenovo89_tb_x8_jb2/kernel/core/src/board-custom.h#L17-L23

/*
SDIO slot index number used by connectivity combo chip:
0: invalid (used by memory card)
1: MSDC1
2: MSDC2
*/
#define CONFIG_MTK_WCN_CMB_SDIO_SLOT  (3) /* MSDC3 */

IRQ

#define MT_MSDC0_IRQ_ID                     (GIC_PRIVATE_SIGNALS + 39)
#define MT_MSDC1_IRQ_ID                     (GIC_PRIVATE_SIGNALS + 40)
#define MT_MSDC2_IRQ_ID                     (GIC_PRIVATE_SIGNALS + 41)
#define MT_MSDC3_IRQ_ID                     (GIC_PRIVATE_SIGNALS + 42)
#define MT_MSDC4_IRQ_ID                     (GIC_PRIVATE_SIGNALS + 83)

#define MT_MSDC0_WAKEUP_PS_ID               (GIC_PRIVATE_SIGNALS + 79)
#define MT_MSDC1_WAKEUP_PS_ID               (GIC_PRIVATE_SIGNALS + 80)
#define MT_MSDC2_WAKEUP_PS_ID               (GIC_PRIVATE_SIGNALS + 81)
#define MT_MSDC3_WAKEUP_PS_ID               (GIC_PRIVATE_SIGNALS + 82)
#define MT_MSDC4_WAKEUP_PS_ID               (GIC_PRIVATE_SIGNALS + 84)

https://github.com/TeamYogaBlade2/android_kernel_lenovo_b8000-jellybean_osc/blob/main/mediatek/platform/mt6589/kernel/core/include/mach/mt_irq.h

/*=======================================================================*/
/* MT6589 MSDC Hosts                                                       */
/*=======================================================================*/
#if defined(CFG_DEV_MSDC0)
static struct resource mt_resource_msdc0[] = {
    {
        .start  = IO_VIRT_TO_PHYS(MSDC_0_BASE),
        .end    = IO_VIRT_TO_PHYS(MSDC_0_BASE) + 0x108,
        .flags  = IORESOURCE_MEM,
    },
    {
        .start  = MT_MSDC0_IRQ_ID,
        .flags  = IORESOURCE_IRQ,
    },
};
#endif

https://github.com/TeamYogaBlade2/android_kernel_lenovo_b8000-jellybean_osc/blob/2b134a8e223ecf90cd0c7d7b898c230ade334a69/mediatek/platform/mt6589/kernel/core/mt_devs.c#L407-L477

clock

enum {
    MT_CG_PERI0_MSDC0               = 13,
    MT_CG_PERI0_MSDC1               = 14,
    MT_CG_PERI0_MSDC2               = 15,
    MT_CG_PERI0_MSDC3               = 16,
    MT_CG_PERI0_MSDC4               = 17,
};

    }, {
        .name = __stringify(MUX_MSDC1),
        .base_addr = CLK_CFG_2,
        .sel_mask = 0x00000007,
        .pdn_mask = 0x00000080,
        .offset = 0,
        .nr_inputs = 6,
        .ops = &clkmux_ops,
        .pll = &plls[MSDCPLL],
    }, {
        .name = __stringify(MUX_MSDC2),
        .base_addr = CLK_CFG_2,
        .sel_mask = 0x00000700,
        .pdn_mask = 0x00008000,
        .offset = 8,
        .nr_inputs = 6,
        .ops = &clkmux_ops,
        .pll = &plls[MSDCPLL],
    }, {
        .name = __stringify(MUX_MSDC3),
        .base_addr = CLK_CFG_2,
        .sel_mask = 0x00070000,
        .pdn_mask = 0x00800000,
        .offset = 16,
        .nr_inputs = 6,
        .ops = &clkmux_ops,
        .pll = &plls[MSDCPLL],
    }, {
        .name = __stringify(MUX_MSDC4),
        .base_addr = CLK_CFG_2,
        .sel_mask = 0x07000000,
        .pdn_mask = 0x80000000,
        .offset = 24,
        .nr_inputs = 6,
        .ops = &clkmux_ops,
        .pll = &plls[MSDCPLL],
    }, {
        .name = __stringify(MUX_MSDC0),
        .base_addr = CLK_CFG_8,
        .sel_mask = 0x00000700,
        .pdn_mask = 0x00008000,
        .offset = 8,
        .nr_inputs = 6,
        .ops = &clkmux_ops,
        .pll = &plls[MSDCPLL],
    }, {

    clks[MT_CG_PERI0_MSDC0].mux = &muxs[MT_MUX_MSDC0];
    clks[MT_CG_PERI0_MSDC1].mux = &muxs[MT_MUX_MSDC1];
    clks[MT_CG_PERI0_MSDC2].mux = &muxs[MT_MUX_MSDC2];
    clks[MT_CG_PERI0_MSDC3].mux = &muxs[MT_MUX_MSDC3];
    clks[MT_CG_PERI0_MSDC4].mux = &muxs[MT_MUX_MSDC4];

#define CLK_CFG_2           (TOPRGU_BASE + 0x0148)

enum {
    //CLK_CFG_2
    MT_MUX_MSDC1        = 6,
    MT_MUX_MSDC2        = 7,
    MT_MUX_MSDC3        = 8,
    MT_MUX_MSDC4        = 9,
    //CLK_CFG_8
    MT_MUX_MSDC0        = 20,};

https://github.com/TeamYogaBlade2/android_kernel_lenovo_b8000-jellybean_osc/blob/2b134a8e223ecf90cd0c7d7b898c230ade334a69/mediatek/platform/mt6589/kernel/core/mt_clkmgr.c
https://github.com/TeamYogaBlade2/android_kernel_lenovo_b8000-jellybean_osc/blob/main/mediatek/platform/mt6589/kernel/core/include/mach/mt_clkmgr.h

MT2701

	mmc0: mmc@11230000 {
		compatible = "mediatek,mt7623-mmc",
			     "mediatek,mt2701-mmc";
		reg = <0 0x11230000 0 0x1000>;
		interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_LOW>;
		clocks = <&pericfg CLK_PERI_MSDC30_0>,
			 <&topckgen CLK_TOP_MSDC30_0_SEL>;
		clock-names = "source", "hclk";
		status = "disabled";
	};

#define CLK_PERI_MSDC30_0			14
#define CLK_PERI_MSDC30_1			15
#define CLK_PERI_MSDC30_2			16
#define CLK_PERI_MSDC30_3			17
#define CLK_PERI_MSDC50_3			18

#define CLK_TOP_MSDC30_0_SEL			84
#define CLK_TOP_MSDC30_1_SEL			91
#define CLK_TOP_MSDC30_2_SEL			90
#define CLK_TOP_MSDC30_3_SEL			115

https://github.com/TeamYogaBlade2/linux/blob/32749c5e80a99cef9f2d94c64954e86b228c88f6/include/dt-bindings/clock/mt2701-clk.h